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authorUwe Kleine-Koenig <ukl@pengutronix.de>2008-12-12 05:18:54 -0500
committerUwe Kleine-Koenig <ukl@pengutronix.de>2008-12-12 05:18:54 -0500
commit7971db5a4b4176ad5df590fce07a962c643a2740 (patch)
tree6ad8e09c5376c4e4c532c3411b0171ba1011acd9 /arch
parentd403700bf8fc903584e830967f5d64075770848c (diff)
parentc4edfced662fa64deeed89c7d8c9f96d86130c19 (diff)
Merge branch 'for-rmk-misc' into for-rmk
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/Kconfig1
-rw-r--r--arch/arm/configs/netx_defconfig6
-rw-r--r--arch/arm/configs/picotux200_defconfig6
-rw-r--r--arch/arm/include/asm/bitops.h16
-rw-r--r--arch/arm/include/asm/processor.h2
-rw-r--r--arch/arm/kernel/armksyms.c4
-rw-r--r--arch/arm/kernel/ftrace.c2
-rw-r--r--arch/arm/mach-at91/at91rm9200_time.c9
-rw-r--r--arch/arm/mach-omap1/io.c2
-rw-r--r--arch/arm/mm/alignment.c26
-rw-r--r--arch/arm/plat-omap/include/mach/omapfb.h4
-rw-r--r--arch/arm/plat-omap/sram.c8
-rw-r--r--arch/arm/plat-orion/pcie.c2
-rw-r--r--arch/powerpc/kernel/cpu_setup_44x.S1
-rw-r--r--arch/powerpc/kernel/cputable.c3
-rw-r--r--arch/x86/kernel/amd_iommu.c13
-rw-r--r--arch/x86/kernel/paravirt-spinlocks.c3
17 files changed, 73 insertions, 35 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 1bce9caea27c..fb2877526d58 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -156,7 +156,6 @@ config ARCH_MTD_XIP
156 bool 156 bool
157 157
158config GENERIC_HARDIRQS_NO__DO_IRQ 158config GENERIC_HARDIRQS_NO__DO_IRQ
159 bool
160 def_bool y 159 def_bool y
161 160
162if OPROFILE 161if OPROFILE
diff --git a/arch/arm/configs/netx_defconfig b/arch/arm/configs/netx_defconfig
index 0884f2370c3a..61d0fc5b2417 100644
--- a/arch/arm/configs/netx_defconfig
+++ b/arch/arm/configs/netx_defconfig
@@ -728,9 +728,9 @@ CONFIG_RTC_CLASS=m
728# 728#
729# RTC interfaces 729# RTC interfaces
730# 730#
731CONFIG_RTC_INTF_SYSFS=m 731CONFIG_RTC_INTF_SYSFS=y
732CONFIG_RTC_INTF_PROC=m 732CONFIG_RTC_INTF_PROC=y
733CONFIG_RTC_INTF_DEV=m 733CONFIG_RTC_INTF_DEV=y
734 734
735# 735#
736# RTC drivers 736# RTC drivers
diff --git a/arch/arm/configs/picotux200_defconfig b/arch/arm/configs/picotux200_defconfig
index 14826f0dabde..59e4463c2da2 100644
--- a/arch/arm/configs/picotux200_defconfig
+++ b/arch/arm/configs/picotux200_defconfig
@@ -1069,9 +1069,9 @@ CONFIG_RTC_CLASS=m
1069# 1069#
1070# RTC interfaces 1070# RTC interfaces
1071# 1071#
1072CONFIG_RTC_INTF_SYSFS=m 1072CONFIG_RTC_INTF_SYSFS=y
1073CONFIG_RTC_INTF_PROC=m 1073CONFIG_RTC_INTF_PROC=y
1074CONFIG_RTC_INTF_DEV=m 1074CONFIG_RTC_INTF_DEV=y
1075# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set 1075# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
1076 1076
1077# 1077#
diff --git a/arch/arm/include/asm/bitops.h b/arch/arm/include/asm/bitops.h
index 9a1db20e032a..63a481fbbed4 100644
--- a/arch/arm/include/asm/bitops.h
+++ b/arch/arm/include/asm/bitops.h
@@ -237,6 +237,7 @@ extern int _find_next_bit_be(const unsigned long *p, int size, int offset);
237#if __LINUX_ARM_ARCH__ < 5 237#if __LINUX_ARM_ARCH__ < 5
238 238
239#include <asm-generic/bitops/ffz.h> 239#include <asm-generic/bitops/ffz.h>
240#include <asm-generic/bitops/__fls.h>
240#include <asm-generic/bitops/__ffs.h> 241#include <asm-generic/bitops/__ffs.h>
241#include <asm-generic/bitops/fls.h> 242#include <asm-generic/bitops/fls.h>
242#include <asm-generic/bitops/ffs.h> 243#include <asm-generic/bitops/ffs.h>
@@ -277,16 +278,19 @@ static inline int constant_fls(int x)
277 * the clz instruction for much better code efficiency. 278 * the clz instruction for much better code efficiency.
278 */ 279 */
279 280
280#define __fls(x) \
281 ( __builtin_constant_p(x) ? constant_fls(x) : \
282 ({ int __r; asm("clz\t%0, %1" : "=r"(__r) : "r"(x) : "cc"); 32-__r; }) )
283
284/* Implement fls() in C so that 64-bit args are suitably truncated */
285static inline int fls(int x) 281static inline int fls(int x)
286{ 282{
287 return __fls(x); 283 int ret;
284
285 if (__builtin_constant_p(x))
286 return constant_fls(x);
287
288 asm("clz\t%0, %1" : "=r" (ret) : "r" (x) : "cc");
289 ret = 32 - ret;
290 return ret;
288} 291}
289 292
293#define __fls(x) (fls(x) - 1)
290#define ffs(x) ({ unsigned long __t = (x); fls(__t & -__t); }) 294#define ffs(x) ({ unsigned long __t = (x); fls(__t & -__t); })
291#define __ffs(x) (ffs(x) - 1) 295#define __ffs(x) (ffs(x) - 1)
292#define ffz(x) __ffs( ~(x) ) 296#define ffz(x) __ffs( ~(x) )
diff --git a/arch/arm/include/asm/processor.h b/arch/arm/include/asm/processor.h
index 517a4d6ffc74..6ff33790f47b 100644
--- a/arch/arm/include/asm/processor.h
+++ b/arch/arm/include/asm/processor.h
@@ -23,7 +23,7 @@
23#include <asm/types.h> 23#include <asm/types.h>
24 24
25#ifdef __KERNEL__ 25#ifdef __KERNEL__
26#define STACK_TOP ((current->personality == PER_LINUX_32BIT) ? \ 26#define STACK_TOP ((current->personality & ADDR_LIMIT_32BIT) ? \
27 TASK_SIZE : TASK_SIZE_26) 27 TASK_SIZE : TASK_SIZE_26)
28#define STACK_TOP_MAX TASK_SIZE 28#define STACK_TOP_MAX TASK_SIZE
29#endif 29#endif
diff --git a/arch/arm/kernel/armksyms.c b/arch/arm/kernel/armksyms.c
index c74f766ffc12..23af3c972c9a 100644
--- a/arch/arm/kernel/armksyms.c
+++ b/arch/arm/kernel/armksyms.c
@@ -115,6 +115,8 @@ EXPORT_SYMBOL(__strnlen_user);
115EXPORT_SYMBOL(__strncpy_from_user); 115EXPORT_SYMBOL(__strncpy_from_user);
116 116
117#ifdef CONFIG_MMU 117#ifdef CONFIG_MMU
118EXPORT_SYMBOL(copy_page);
119
118EXPORT_SYMBOL(__copy_from_user); 120EXPORT_SYMBOL(__copy_from_user);
119EXPORT_SYMBOL(__copy_to_user); 121EXPORT_SYMBOL(__copy_to_user);
120EXPORT_SYMBOL(__clear_user); 122EXPORT_SYMBOL(__clear_user);
@@ -181,8 +183,6 @@ EXPORT_SYMBOL(_find_first_bit_be);
181EXPORT_SYMBOL(_find_next_bit_be); 183EXPORT_SYMBOL(_find_next_bit_be);
182#endif 184#endif
183 185
184EXPORT_SYMBOL(copy_page);
185
186#ifdef CONFIG_FUNCTION_TRACER 186#ifdef CONFIG_FUNCTION_TRACER
187EXPORT_SYMBOL(mcount); 187EXPORT_SYMBOL(mcount);
188#endif 188#endif
diff --git a/arch/arm/kernel/ftrace.c b/arch/arm/kernel/ftrace.c
index 6c90479e8974..c63842766229 100644
--- a/arch/arm/kernel/ftrace.c
+++ b/arch/arm/kernel/ftrace.c
@@ -95,7 +95,7 @@ int ftrace_update_ftrace_func(ftrace_func_t func)
95 return ret; 95 return ret;
96} 96}
97 97
98/* run from kstop_machine */ 98/* run from ftrace_init with irqs disabled */
99int __init ftrace_dyn_arch_init(void *data) 99int __init ftrace_dyn_arch_init(void *data)
100{ 100{
101 ftrace_mcount_set(data); 101 ftrace_mcount_set(data);
diff --git a/arch/arm/mach-at91/at91rm9200_time.c b/arch/arm/mach-at91/at91rm9200_time.c
index a72e798a2a40..d140eae53ded 100644
--- a/arch/arm/mach-at91/at91rm9200_time.c
+++ b/arch/arm/mach-at91/at91rm9200_time.c
@@ -141,6 +141,15 @@ clkevt32k_next_event(unsigned long delta, struct clock_event_device *dev)
141 /* Use "raw" primitives so we behave correctly on RT kernels. */ 141 /* Use "raw" primitives so we behave correctly on RT kernels. */
142 raw_local_irq_save(flags); 142 raw_local_irq_save(flags);
143 143
144 /*
145 * According to Thomas Gleixner irqs are already disabled here. Simply
146 * removing raw_local_irq_save above (and the matching
147 * raw_local_irq_restore) was not accepted. See
148 * http://thread.gmane.org/gmane.linux.ports.arm.kernel/41174
149 * So for now (2008-11-20) just warn once if irqs were not disabled ...
150 */
151 WARN_ON_ONCE(!raw_irqs_disabled_flags(flags));
152
144 /* The alarm IRQ uses absolute time (now+delta), not the relative 153 /* The alarm IRQ uses absolute time (now+delta), not the relative
145 * time (delta) in our calling convention. Like all clockevents 154 * time (delta) in our calling convention. Like all clockevents
146 * using such "match" hardware, we have a race to defend against. 155 * using such "match" hardware, we have a race to defend against.
diff --git a/arch/arm/mach-omap1/io.c b/arch/arm/mach-omap1/io.c
index b3bd8ca85118..4c3e582f3d3c 100644
--- a/arch/arm/mach-omap1/io.c
+++ b/arch/arm/mach-omap1/io.c
@@ -128,7 +128,7 @@ void __init omap1_map_common_io(void)
128 * Common low-level hardware init for omap1. This should only get called from 128 * Common low-level hardware init for omap1. This should only get called from
129 * board specific init. 129 * board specific init.
130 */ 130 */
131void __init omap1_init_common_hw() 131void __init omap1_init_common_hw(void)
132{ 132{
133 /* REVISIT: Refer to OMAP5910 Errata, Advisory SYS_1: "Timeout Abort 133 /* REVISIT: Refer to OMAP5910 Errata, Advisory SYS_1: "Timeout Abort
134 * on a Posted Write in the TIPB Bridge". 134 * on a Posted Write in the TIPB Bridge".
diff --git a/arch/arm/mm/alignment.c b/arch/arm/mm/alignment.c
index 133e65d166b3..2d5884ce0435 100644
--- a/arch/arm/mm/alignment.c
+++ b/arch/arm/mm/alignment.c
@@ -70,6 +70,10 @@ static unsigned long ai_dword;
70static unsigned long ai_multi; 70static unsigned long ai_multi;
71static int ai_usermode; 71static int ai_usermode;
72 72
73#define UM_WARN (1 << 0)
74#define UM_FIXUP (1 << 1)
75#define UM_SIGNAL (1 << 2)
76
73#ifdef CONFIG_PROC_FS 77#ifdef CONFIG_PROC_FS
74static const char *usermode_action[] = { 78static const char *usermode_action[] = {
75 "ignored", 79 "ignored",
@@ -754,7 +758,7 @@ do_alignment(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
754 user: 758 user:
755 ai_user += 1; 759 ai_user += 1;
756 760
757 if (ai_usermode & 1) 761 if (ai_usermode & UM_WARN)
758 printk("Alignment trap: %s (%d) PC=0x%08lx Instr=0x%0*lx " 762 printk("Alignment trap: %s (%d) PC=0x%08lx Instr=0x%0*lx "
759 "Address=0x%08lx FSR 0x%03x\n", current->comm, 763 "Address=0x%08lx FSR 0x%03x\n", current->comm,
760 task_pid_nr(current), instrptr, 764 task_pid_nr(current), instrptr,
@@ -762,10 +766,10 @@ do_alignment(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
762 thumb_mode(regs) ? tinstr : instr, 766 thumb_mode(regs) ? tinstr : instr,
763 addr, fsr); 767 addr, fsr);
764 768
765 if (ai_usermode & 2) 769 if (ai_usermode & UM_FIXUP)
766 goto fixup; 770 goto fixup;
767 771
768 if (ai_usermode & 4) 772 if (ai_usermode & UM_SIGNAL)
769 force_sig(SIGBUS, current); 773 force_sig(SIGBUS, current);
770 else 774 else
771 set_cr(cr_no_alignment); 775 set_cr(cr_no_alignment);
@@ -796,6 +800,22 @@ static int __init alignment_init(void)
796 res->write_proc = proc_alignment_write; 800 res->write_proc = proc_alignment_write;
797#endif 801#endif
798 802
803 /*
804 * ARMv6 and later CPUs can perform unaligned accesses for
805 * most single load and store instructions up to word size.
806 * LDM, STM, LDRD and STRD still need to be handled.
807 *
808 * Ignoring the alignment fault is not an option on these
809 * CPUs since we spin re-faulting the instruction without
810 * making any progress.
811 */
812 if (cpu_architecture() >= CPU_ARCH_ARMv6 && (cr_alignment & CR_U)) {
813 cr_alignment &= ~CR_A;
814 cr_no_alignment &= ~CR_A;
815 set_cr(cr_alignment);
816 ai_usermode = UM_FIXUP;
817 }
818
799 hook_fault_code(1, do_alignment, SIGILL, "alignment exception"); 819 hook_fault_code(1, do_alignment, SIGILL, "alignment exception");
800 hook_fault_code(3, do_alignment, SIGILL, "alignment exception"); 820 hook_fault_code(3, do_alignment, SIGILL, "alignment exception");
801 821
diff --git a/arch/arm/plat-omap/include/mach/omapfb.h b/arch/arm/plat-omap/include/mach/omapfb.h
index ec67fb428607..7b74d1255e0b 100644
--- a/arch/arm/plat-omap/include/mach/omapfb.h
+++ b/arch/arm/plat-omap/include/mach/omapfb.h
@@ -353,8 +353,8 @@ struct omapfb_device {
353 u32 pseudo_palette[17]; 353 u32 pseudo_palette[17];
354 354
355 struct lcd_panel *panel; /* LCD panel */ 355 struct lcd_panel *panel; /* LCD panel */
356 struct lcd_ctrl *ctrl; /* LCD controller */ 356 const struct lcd_ctrl *ctrl; /* LCD controller */
357 struct lcd_ctrl *int_ctrl; /* internal LCD ctrl */ 357 const struct lcd_ctrl *int_ctrl; /* internal LCD ctrl */
358 struct lcd_ctrl_extif *ext_if; /* LCD ctrl external 358 struct lcd_ctrl_extif *ext_if; /* LCD ctrl external
359 interface */ 359 interface */
360 struct device *dev; 360 struct device *dev;
diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c
index 9f9a921829c0..dcd9d16da2e9 100644
--- a/arch/arm/plat-omap/sram.c
+++ b/arch/arm/plat-omap/sram.c
@@ -255,7 +255,7 @@ void omap_sram_reprogram_clock(u32 dpllctl, u32 ckctl)
255 if (!_omap_sram_reprogram_clock) 255 if (!_omap_sram_reprogram_clock)
256 omap_sram_error(); 256 omap_sram_error();
257 257
258 return _omap_sram_reprogram_clock(dpllctl, ckctl); 258 _omap_sram_reprogram_clock(dpllctl, ckctl);
259} 259}
260 260
261int __init omap1_sram_init(void) 261int __init omap1_sram_init(void)
@@ -282,8 +282,8 @@ void omap2_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl,
282 if (!_omap2_sram_ddr_init) 282 if (!_omap2_sram_ddr_init)
283 omap_sram_error(); 283 omap_sram_error();
284 284
285 return _omap2_sram_ddr_init(slow_dll_ctrl, fast_dll_ctrl, 285 _omap2_sram_ddr_init(slow_dll_ctrl, fast_dll_ctrl,
286 base_cs, force_unlock); 286 base_cs, force_unlock);
287} 287}
288 288
289static void (*_omap2_sram_reprogram_sdrc)(u32 perf_level, u32 dll_val, 289static void (*_omap2_sram_reprogram_sdrc)(u32 perf_level, u32 dll_val,
@@ -294,7 +294,7 @@ void omap2_sram_reprogram_sdrc(u32 perf_level, u32 dll_val, u32 mem_type)
294 if (!_omap2_sram_reprogram_sdrc) 294 if (!_omap2_sram_reprogram_sdrc)
295 omap_sram_error(); 295 omap_sram_error();
296 296
297 return _omap2_sram_reprogram_sdrc(perf_level, dll_val, mem_type); 297 _omap2_sram_reprogram_sdrc(perf_level, dll_val, mem_type);
298} 298}
299 299
300static u32 (*_omap2_set_prcm)(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass); 300static u32 (*_omap2_set_prcm)(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass);
diff --git a/arch/arm/plat-orion/pcie.c b/arch/arm/plat-orion/pcie.c
index 883902fead89..d41d41d78ad9 100644
--- a/arch/arm/plat-orion/pcie.c
+++ b/arch/arm/plat-orion/pcie.c
@@ -35,7 +35,7 @@
35#define PCIE_CONF_REG(r) ((((r) & 0xf00) << 16) | ((r) & 0xfc)) 35#define PCIE_CONF_REG(r) ((((r) & 0xf00) << 16) | ((r) & 0xfc))
36#define PCIE_CONF_BUS(b) (((b) & 0xff) << 16) 36#define PCIE_CONF_BUS(b) (((b) & 0xff) << 16)
37#define PCIE_CONF_DEV(d) (((d) & 0x1f) << 11) 37#define PCIE_CONF_DEV(d) (((d) & 0x1f) << 11)
38#define PCIE_CONF_FUNC(f) (((f) & 0x3) << 8) 38#define PCIE_CONF_FUNC(f) (((f) & 0x7) << 8)
39#define PCIE_CONF_DATA_OFF 0x18fc 39#define PCIE_CONF_DATA_OFF 0x18fc
40#define PCIE_MASK_OFF 0x1910 40#define PCIE_MASK_OFF 0x1910
41#define PCIE_CTRL_OFF 0x1a00 41#define PCIE_CTRL_OFF 0x1a00
diff --git a/arch/powerpc/kernel/cpu_setup_44x.S b/arch/powerpc/kernel/cpu_setup_44x.S
index 31c18b52affb..10b4ab1008af 100644
--- a/arch/powerpc/kernel/cpu_setup_44x.S
+++ b/arch/powerpc/kernel/cpu_setup_44x.S
@@ -40,6 +40,7 @@ _GLOBAL(__setup_cpu_460gt)
40 mtlr r4 40 mtlr r4
41 blr 41 blr
42 42
43_GLOBAL(__setup_cpu_440x5)
43_GLOBAL(__setup_cpu_440gx) 44_GLOBAL(__setup_cpu_440gx)
44_GLOBAL(__setup_cpu_440spe) 45_GLOBAL(__setup_cpu_440spe)
45 b __fixup_440A_mcheck 46 b __fixup_440A_mcheck
diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c
index b1eb834bc0fc..7e8719504f39 100644
--- a/arch/powerpc/kernel/cputable.c
+++ b/arch/powerpc/kernel/cputable.c
@@ -39,6 +39,7 @@ extern void __setup_cpu_440epx(unsigned long offset, struct cpu_spec* spec);
39extern void __setup_cpu_440gx(unsigned long offset, struct cpu_spec* spec); 39extern void __setup_cpu_440gx(unsigned long offset, struct cpu_spec* spec);
40extern void __setup_cpu_440grx(unsigned long offset, struct cpu_spec* spec); 40extern void __setup_cpu_440grx(unsigned long offset, struct cpu_spec* spec);
41extern void __setup_cpu_440spe(unsigned long offset, struct cpu_spec* spec); 41extern void __setup_cpu_440spe(unsigned long offset, struct cpu_spec* spec);
42extern void __setup_cpu_440x5(unsigned long offset, struct cpu_spec* spec);
42extern void __setup_cpu_460ex(unsigned long offset, struct cpu_spec* spec); 43extern void __setup_cpu_460ex(unsigned long offset, struct cpu_spec* spec);
43extern void __setup_cpu_460gt(unsigned long offset, struct cpu_spec* spec); 44extern void __setup_cpu_460gt(unsigned long offset, struct cpu_spec* spec);
44extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec); 45extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec);
@@ -1500,6 +1501,8 @@ static struct cpu_spec __initdata cpu_specs[] = {
1500 .cpu_user_features = COMMON_USER_BOOKE, 1501 .cpu_user_features = COMMON_USER_BOOKE,
1501 .icache_bsize = 32, 1502 .icache_bsize = 32,
1502 .dcache_bsize = 32, 1503 .dcache_bsize = 32,
1504 .cpu_setup = __setup_cpu_440x5,
1505 .machine_check = machine_check_440A,
1503 .platform = "ppc440", 1506 .platform = "ppc440",
1504 }, 1507 },
1505 { /* 460EX */ 1508 { /* 460EX */
diff --git a/arch/x86/kernel/amd_iommu.c b/arch/x86/kernel/amd_iommu.c
index 5662e226b0c9..a7b6dec6fc3f 100644
--- a/arch/x86/kernel/amd_iommu.c
+++ b/arch/x86/kernel/amd_iommu.c
@@ -344,7 +344,7 @@ static int iommu_map(struct protection_domain *dom,
344 u64 __pte, *pte, *page; 344 u64 __pte, *pte, *page;
345 345
346 bus_addr = PAGE_ALIGN(bus_addr); 346 bus_addr = PAGE_ALIGN(bus_addr);
347 phys_addr = PAGE_ALIGN(bus_addr); 347 phys_addr = PAGE_ALIGN(phys_addr);
348 348
349 /* only support 512GB address spaces for now */ 349 /* only support 512GB address spaces for now */
350 if (bus_addr > IOMMU_MAP_SIZE_L3 || !(prot & IOMMU_PROT_MASK)) 350 if (bus_addr > IOMMU_MAP_SIZE_L3 || !(prot & IOMMU_PROT_MASK))
@@ -600,7 +600,7 @@ static void dma_ops_free_pagetable(struct dma_ops_domain *dma_dom)
600 continue; 600 continue;
601 601
602 p2 = IOMMU_PTE_PAGE(p1[i]); 602 p2 = IOMMU_PTE_PAGE(p1[i]);
603 for (j = 0; j < 512; ++i) { 603 for (j = 0; j < 512; ++j) {
604 if (!IOMMU_PTE_PRESENT(p2[j])) 604 if (!IOMMU_PTE_PRESENT(p2[j]))
605 continue; 605 continue;
606 p3 = IOMMU_PTE_PAGE(p2[j]); 606 p3 = IOMMU_PTE_PAGE(p2[j]);
@@ -910,7 +910,7 @@ static void dma_ops_domain_unmap(struct amd_iommu *iommu,
910 if (address >= dom->aperture_size) 910 if (address >= dom->aperture_size)
911 return; 911 return;
912 912
913 WARN_ON(address & 0xfffULL || address > dom->aperture_size); 913 WARN_ON(address & ~PAGE_MASK || address >= dom->aperture_size);
914 914
915 pte = dom->pte_pages[IOMMU_PTE_L1_INDEX(address)]; 915 pte = dom->pte_pages[IOMMU_PTE_L1_INDEX(address)];
916 pte += IOMMU_PTE_L0_INDEX(address); 916 pte += IOMMU_PTE_L0_INDEX(address);
@@ -922,8 +922,8 @@ static void dma_ops_domain_unmap(struct amd_iommu *iommu,
922 922
923/* 923/*
924 * This function contains common code for mapping of a physically 924 * This function contains common code for mapping of a physically
925 * contiguous memory region into DMA address space. It is uses by all 925 * contiguous memory region into DMA address space. It is used by all
926 * mapping functions provided by this IOMMU driver. 926 * mapping functions provided with this IOMMU driver.
927 * Must be called with the domain lock held. 927 * Must be called with the domain lock held.
928 */ 928 */
929static dma_addr_t __map_single(struct device *dev, 929static dma_addr_t __map_single(struct device *dev,
@@ -983,7 +983,8 @@ static void __unmap_single(struct amd_iommu *iommu,
983 dma_addr_t i, start; 983 dma_addr_t i, start;
984 unsigned int pages; 984 unsigned int pages;
985 985
986 if ((dma_addr == 0) || (dma_addr + size > dma_dom->aperture_size)) 986 if ((dma_addr == bad_dma_address) ||
987 (dma_addr + size > dma_dom->aperture_size))
987 return; 988 return;
988 989
989 pages = iommu_num_pages(dma_addr, size, PAGE_SIZE); 990 pages = iommu_num_pages(dma_addr, size, PAGE_SIZE);
diff --git a/arch/x86/kernel/paravirt-spinlocks.c b/arch/x86/kernel/paravirt-spinlocks.c
index 0e9f1982b1dd..95777b0faa73 100644
--- a/arch/x86/kernel/paravirt-spinlocks.c
+++ b/arch/x86/kernel/paravirt-spinlocks.c
@@ -7,7 +7,8 @@
7 7
8#include <asm/paravirt.h> 8#include <asm/paravirt.h>
9 9
10static void default_spin_lock_flags(struct raw_spinlock *lock, unsigned long flags) 10static inline void
11default_spin_lock_flags(raw_spinlock_t *lock, unsigned long flags)
11{ 12{
12 __raw_spin_lock(lock); 13 __raw_spin_lock(lock);
13} 14}