diff options
author | Sheng Yang <sheng@linux.intel.com> | 2009-01-21 03:52:16 -0500 |
---|---|---|
committer | Avi Kivity <avi@redhat.com> | 2009-02-14 19:47:37 -0500 |
commit | 2aaf69dcee864f4fb6402638dd2f263324ac839f (patch) | |
tree | 52df0acd746ee31592d0c2e7463ba7a091ab7a55 /arch | |
parent | abe6655dd699069b53bcccbc65b2717f60203b12 (diff) |
KVM: MMU: Map device MMIO as UC in EPT
Software are not allow to access device MMIO using cacheable memory type, the
patch limit MMIO region with UC and WC(guest can select WC using PAT and
PCD/PWT).
Signed-off-by: Sheng Yang <sheng@linux.intel.com>
Signed-off-by: Avi Kivity <avi@redhat.com>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/x86/kvm/mmu.c | 9 | ||||
-rw-r--r-- | arch/x86/kvm/vmx.c | 3 |
2 files changed, 8 insertions, 4 deletions
diff --git a/arch/x86/kvm/mmu.c b/arch/x86/kvm/mmu.c index 83f11c7474a1..2d4477c71473 100644 --- a/arch/x86/kvm/mmu.c +++ b/arch/x86/kvm/mmu.c | |||
@@ -1698,8 +1698,13 @@ static int set_spte(struct kvm_vcpu *vcpu, u64 *shadow_pte, | |||
1698 | if (largepage) | 1698 | if (largepage) |
1699 | spte |= PT_PAGE_SIZE_MASK; | 1699 | spte |= PT_PAGE_SIZE_MASK; |
1700 | if (mt_mask) { | 1700 | if (mt_mask) { |
1701 | mt_mask = get_memory_type(vcpu, gfn) << | 1701 | if (!kvm_is_mmio_pfn(pfn)) { |
1702 | kvm_x86_ops->get_mt_mask_shift(); | 1702 | mt_mask = get_memory_type(vcpu, gfn) << |
1703 | kvm_x86_ops->get_mt_mask_shift(); | ||
1704 | mt_mask |= VMX_EPT_IGMT_BIT; | ||
1705 | } else | ||
1706 | mt_mask = MTRR_TYPE_UNCACHABLE << | ||
1707 | kvm_x86_ops->get_mt_mask_shift(); | ||
1703 | spte |= mt_mask; | 1708 | spte |= mt_mask; |
1704 | } | 1709 | } |
1705 | 1710 | ||
diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c index 6259d7467648..07491c9c6ed0 100644 --- a/arch/x86/kvm/vmx.c +++ b/arch/x86/kvm/vmx.c | |||
@@ -3687,8 +3687,7 @@ static int __init vmx_init(void) | |||
3687 | if (vm_need_ept()) { | 3687 | if (vm_need_ept()) { |
3688 | bypass_guest_pf = 0; | 3688 | bypass_guest_pf = 0; |
3689 | kvm_mmu_set_base_ptes(VMX_EPT_READABLE_MASK | | 3689 | kvm_mmu_set_base_ptes(VMX_EPT_READABLE_MASK | |
3690 | VMX_EPT_WRITABLE_MASK | | 3690 | VMX_EPT_WRITABLE_MASK); |
3691 | VMX_EPT_IGMT_BIT); | ||
3692 | kvm_mmu_set_mask_ptes(0ull, 0ull, 0ull, 0ull, | 3691 | kvm_mmu_set_mask_ptes(0ull, 0ull, 0ull, 0ull, |
3693 | VMX_EPT_EXECUTABLE_MASK, | 3692 | VMX_EPT_EXECUTABLE_MASK, |
3694 | VMX_EPT_DEFAULT_MT << VMX_EPT_MT_EPTE_SHIFT); | 3693 | VMX_EPT_DEFAULT_MT << VMX_EPT_MT_EPTE_SHIFT); |