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authorKevin Corry <kevcorry@us.ibm.com>2006-11-20 12:45:14 -0500
committerPaul Mackerras <paulus@samba.org>2006-12-04 04:40:11 -0500
commite4f6948cfc8b9626022db0f93e7cf2ce5c0998cd (patch)
treeffc39ea93cbae7bb391678b42958e19252867c44 /arch
parentc93dfa0766bae3c92ec8311bddbbf16b8e661f59 (diff)
[POWERPC] cell: Move PMU-related stuff to include/asm-powerpc/cell-pmu.h
Move some PMU-related macros and function prototypes from cbe_regs.h and pmu.h in arch/powerpc/platforms/cell/ to a new header at include/asm-powerpc/cell-pmu.h This is cleaner to use from the oprofile code, since that sits in arch/powerpc/oprofile, not in the cell platform directory. Signed-off-by: Kevin Corry <kevcorry@us.ibm.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/powerpc/platforms/cell/cbe_regs.h31
-rw-r--r--arch/powerpc/platforms/cell/pmu.c1
-rw-r--r--arch/powerpc/platforms/cell/pmu.h57
3 files changed, 2 insertions, 87 deletions
diff --git a/arch/powerpc/platforms/cell/cbe_regs.h b/arch/powerpc/platforms/cell/cbe_regs.h
index bc94e664c617..a29f4a5f52c5 100644
--- a/arch/powerpc/platforms/cell/cbe_regs.h
+++ b/arch/powerpc/platforms/cell/cbe_regs.h
@@ -15,6 +15,8 @@
15#ifndef CBE_REGS_H 15#ifndef CBE_REGS_H
16#define CBE_REGS_H 16#define CBE_REGS_H
17 17
18#include <asm/cell-pmu.h>
19
18/* 20/*
19 * 21 *
20 * Some HID register definitions 22 * Some HID register definitions
@@ -35,32 +37,6 @@
35 * 37 *
36 */ 38 */
37 39
38/* Macros for the pm_control register. */
39#define CBE_PM_16BIT_CTR(ctr) (1 << (24 - ((ctr) & (NR_PHYS_CTRS - 1))))
40#define CBE_PM_ENABLE_PERF_MON 0x80000000
41#define CBE_PM_STOP_AT_MAX 0x40000000
42#define CBE_PM_TRACE_MODE_GET(pm_control) (((pm_control) >> 28) & 0x3)
43#define CBE_PM_TRACE_MODE_SET(mode) (((mode) & 0x3) << 28)
44#define CBE_PM_COUNT_MODE_SET(count) (((count) & 0x3) << 18)
45#define CBE_PM_FREEZE_ALL_CTRS 0x00100000
46#define CBE_PM_ENABLE_EXT_TRACE 0x00008000
47
48/* Macros for the trace_address register. */
49#define CBE_PM_TRACE_BUF_FULL 0x00000800
50#define CBE_PM_TRACE_BUF_EMPTY 0x00000400
51#define CBE_PM_TRACE_BUF_DATA_COUNT(ta) ((ta) & 0x3ff)
52#define CBE_PM_TRACE_BUF_MAX_COUNT 0x400
53
54/* Macros for the pm07_control registers. */
55#define CBE_PM_CTR_INPUT_MUX(pm07_control) (((pm07_control) >> 26) & 0x3f)
56#define CBE_PM_CTR_INPUT_CONTROL 0x02000000
57#define CBE_PM_CTR_POLARITY 0x01000000
58#define CBE_PM_CTR_COUNT_CYCLES 0x00800000
59#define CBE_PM_CTR_ENABLE 0x00400000
60
61/* Macros for the pm_status register. */
62#define CBE_PM_CTR_OVERFLOW_INTR(ctr) (1 << (31 - ((ctr) & 7)))
63
64union spe_reg { 40union spe_reg {
65 u64 val; 41 u64 val;
66 u8 spe[8]; 42 u8 spe[8];
@@ -160,9 +136,6 @@ extern struct cbe_pmd_regs __iomem *cbe_get_cpu_pmd_regs(int cpu);
160 * counters currently have a value waiting to be written. 136 * counters currently have a value waiting to be written.
161 */ 137 */
162 138
163#define NR_PHYS_CTRS 4
164#define NR_CTRS (NR_PHYS_CTRS * 2)
165
166struct cbe_pmd_shadow_regs { 139struct cbe_pmd_shadow_regs {
167 u32 group_control; 140 u32 group_control;
168 u32 debug_bus_control; 141 u32 debug_bus_control;
diff --git a/arch/powerpc/platforms/cell/pmu.c b/arch/powerpc/platforms/cell/pmu.c
index 22ac732b1f89..ae6fd1c12d4e 100644
--- a/arch/powerpc/platforms/cell/pmu.c
+++ b/arch/powerpc/platforms/cell/pmu.c
@@ -30,7 +30,6 @@
30 30
31#include "cbe_regs.h" 31#include "cbe_regs.h"
32#include "interrupt.h" 32#include "interrupt.h"
33#include "pmu.h"
34 33
35/* 34/*
36 * When writing to write-only mmio addresses, save a shadow copy. All of the 35 * When writing to write-only mmio addresses, save a shadow copy. All of the
diff --git a/arch/powerpc/platforms/cell/pmu.h b/arch/powerpc/platforms/cell/pmu.h
deleted file mode 100644
index eb1e8e0af910..000000000000
--- a/arch/powerpc/platforms/cell/pmu.h
+++ /dev/null
@@ -1,57 +0,0 @@
1/*
2 * Cell Broadband Engine Performance Monitor
3 *
4 * (C) Copyright IBM Corporation 2001,2006
5 *
6 * Author:
7 * David Erb (djerb@us.ibm.com)
8 * Kevin Corry (kevcorry@us.ibm.com)
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2, or (at your option)
13 * any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 */
24
25#ifndef __PERFMON_H__
26#define __PERFMON_H__
27
28enum pm_reg_name {
29 group_control,
30 debug_bus_control,
31 trace_address,
32 ext_tr_timer,
33 pm_status,
34 pm_control,
35 pm_interval,
36 pm_start_stop,
37};
38
39extern u32 cbe_read_phys_ctr(u32 cpu, u32 phys_ctr);
40extern void cbe_write_phys_ctr(u32 cpu, u32 phys_ctr, u32 val);
41extern u32 cbe_read_ctr(u32 cpu, u32 ctr);
42extern void cbe_write_ctr(u32 cpu, u32 ctr, u32 val);
43
44extern u32 cbe_read_pm07_control(u32 cpu, u32 ctr);
45extern void cbe_write_pm07_control(u32 cpu, u32 ctr, u32 val);
46extern u32 cbe_read_pm (u32 cpu, enum pm_reg_name reg);
47extern void cbe_write_pm (u32 cpu, enum pm_reg_name reg, u32 val);
48
49extern u32 cbe_get_ctr_size(u32 cpu, u32 phys_ctr);
50extern void cbe_set_ctr_size(u32 cpu, u32 phys_ctr, u32 ctr_size);
51
52extern void cbe_enable_pm(u32 cpu);
53extern void cbe_disable_pm(u32 cpu);
54
55extern void cbe_read_trace_buffer(u32 cpu, u64 *buf);
56
57#endif