Merge branch 'linus' into core/iommu

Conflicts:
	arch/x86/Kconfig

764 files changed, 34059 insertions, 23998 deletions

diff --git a/arch/alpha/include/asm/socket.h b/arch/alpha/include/asm/socket.h
index a1057c2d95e7..3641ec1452f4 100644
--- a/arch/alpha/include/asm/socket.h
+++ b/arch/alpha/include/asm/socket.h
@@ -62,6 +62,9 @@
 
 #define SO_MARK                 36
 
+#define SO_TIMESTAMPING         37
+#define SCM_TIMESTAMPING        SO_TIMESTAMPING
+
 /* O_NONBLOCK clashes with the bits used for socket types.  Therefore we
  * have to define SOCK_NONBLOCK to a different value here.
  */
diff --git a/arch/alpha/include/asm/statfs.h b/arch/alpha/include/asm/statfs.h
index de35cd438a10..ccd2e186bfd8 100644
--- a/arch/alpha/include/asm/statfs.h
+++ b/arch/alpha/include/asm/statfs.h
@@ -1,6 +1,8 @@
 #ifndef _ALPHA_STATFS_H
 #define _ALPHA_STATFS_H
 
+#include <linux/types.h>
+
 /* Alpha is the only 64-bit platform with 32-bit statfs. And doesn't
    even seem to implement statfs64 */
 #define __statfs_word __u32
diff --git a/arch/alpha/include/asm/swab.h b/arch/alpha/include/asm/swab.h
index 68e7089e02d5..4d682b16c7c4 100644
--- a/arch/alpha/include/asm/swab.h
+++ b/arch/alpha/include/asm/swab.h
@@ -1,7 +1,7 @@
 #ifndef _ALPHA_SWAB_H
 #define _ALPHA_SWAB_H
 
-#include <asm/types.h>
+#include <linux/types.h>
 #include <linux/compiler.h>
 #include <asm/compiler.h>
 
diff --git a/arch/alpha/kernel/entry.S b/arch/alpha/kernel/entry.S
index e4a54b615894..b45d913a51c3 100644
--- a/arch/alpha/kernel/entry.S
+++ b/arch/alpha/kernel/entry.S
@@ -903,8 +903,9 @@ sys_alpha_pipe:
         stq     $26, 0($sp)
         .prologue 0
 
+        mov     $31, $17
         lda     $16, 8($sp)
-        jsr     $26, do_pipe
+        jsr     $26, do_pipe_flags
 
         ldq     $26, 0($sp)
         bne     $0, 1f
diff --git a/arch/alpha/kernel/irq.c b/arch/alpha/kernel/irq.c
index 703731accda6..cc7834661427 100644
--- a/arch/alpha/kernel/irq.c
+++ b/arch/alpha/kernel/irq.c
@@ -55,7 +55,7 @@ int irq_select_affinity(unsigned int irq)
                 cpu = (cpu < (NR_CPUS-1) ? cpu + 1 : 0);
         last_cpu = cpu;
 
-        irq_desc[irq].affinity = cpumask_of_cpu(cpu);
+        cpumask_copy(irq_desc[irq].affinity, cpumask_of(cpu));
         irq_desc[irq].chip->set_affinity(irq, cpumask_of(cpu));
         return 0;
 }
@@ -90,7 +90,7 @@ show_interrupts(struct seq_file *p, void *v)
                 seq_printf(p, "%10u ", kstat_irqs(irq));
 #else
                 for_each_online_cpu(j)
-                        seq_printf(p, "%10u ", kstat_cpu(j).irqs[irq]);
+                        seq_printf(p, "%10u ", kstat_irqs_cpu(irq, j));
 #endif
                 seq_printf(p, " %14s", irq_desc[irq].chip->typename);
                 seq_printf(p, "  %c%s",
diff --git a/arch/alpha/kernel/irq_alpha.c b/arch/alpha/kernel/irq_alpha.c
index e16aeb6e79ef..67c19f8a9944 100644
--- a/arch/alpha/kernel/irq_alpha.c
+++ b/arch/alpha/kernel/irq_alpha.c
@@ -64,7 +64,7 @@ do_entInt(unsigned long type, unsigned long vector,
                 smp_percpu_timer_interrupt(regs);
                 cpu = smp_processor_id();
                 if (cpu != boot_cpuid) {
-                        kstat_cpu(cpu).irqs[RTC_IRQ]++;
+                        kstat_incr_irqs_this_cpu(RTC_IRQ, irq_to_desc(RTC_IRQ));
                 } else {
                         handle_irq(RTC_IRQ);
                 }
diff --git a/arch/alpha/kernel/osf_sys.c b/arch/alpha/kernel/osf_sys.c
index ae41f097864b..42ee05981e71 100644
--- a/arch/alpha/kernel/osf_sys.c
+++ b/arch/alpha/kernel/osf_sys.c
@@ -46,8 +46,6 @@
 #include <asm/hwrpb.h>
 #include <asm/processor.h>
 
-extern int do_pipe(int *);
-
 /*
  * Brk needs to return an error.  Still support Linux's brk(0) query idiom,
  * which OSF programs just shouldn't be doing.  We're still not quite
diff --git a/arch/alpha/mm/init.c b/arch/alpha/mm/init.c
index 5d7a16eab312..af71d38c8e41 100644
--- a/arch/alpha/mm/init.c
+++ b/arch/alpha/mm/init.c
@@ -189,9 +189,21 @@ callback_init(void * kernel_end)
 
         if (alpha_using_srm) {
                 static struct vm_struct console_remap_vm;
-                unsigned long vaddr = VMALLOC_START;
+                unsigned long nr_pages = 0;
+                unsigned long vaddr;
                 unsigned long i, j;
 
+                /* calculate needed size */
+                for (i = 0; i < crb->map_entries; ++i)
+                        nr_pages += crb->map[i].count;
+
+                /* register the vm area */
+                console_remap_vm.flags = VM_ALLOC;
+                console_remap_vm.size = nr_pages << PAGE_SHIFT;
+                vm_area_register_early(&console_remap_vm, PAGE_SIZE);
+
+                vaddr = (unsigned long)console_remap_vm.addr;
+
                 /* Set up the third level PTEs and update the virtual
                    addresses of the CRB entries.  */
                 for (i = 0; i < crb->map_entries; ++i) {
@@ -213,12 +225,6 @@ callback_init(void * kernel_end)
                                 vaddr += PAGE_SIZE;
                         }
                 }
-
-                /* Let vmalloc know that we've allocated some space.  */
-                console_remap_vm.flags = VM_ALLOC;
-                console_remap_vm.addr = (void *) VMALLOC_START;
-                console_remap_vm.size = vaddr - VMALLOC_START;
-                vmlist = &console_remap_vm;
         }
 
         callback_init_done = 1;
diff --git a/arch/arm/include/asm/a.out.h b/arch/arm/include/asm/a.out.h
index 79489fdcc8b8..083894b2e3bc 100644
--- a/arch/arm/include/asm/a.out.h
+++ b/arch/arm/include/asm/a.out.h
@@ -2,7 +2,7 @@
 #define __ARM_A_OUT_H__
 
 #include <linux/personality.h>
-#include <asm/types.h>
+#include <linux/types.h>
 
 struct exec
 {
diff --git a/arch/arm/include/asm/setup.h b/arch/arm/include/asm/setup.h
index f2cd18a0932b..ee1304f22f94 100644
--- a/arch/arm/include/asm/setup.h
+++ b/arch/arm/include/asm/setup.h
@@ -14,7 +14,7 @@
 #ifndef __ASMARM_SETUP_H
 #define __ASMARM_SETUP_H
 
-#include <asm/types.h>
+#include <linux/types.h>
 
 #define COMMAND_LINE_SIZE 1024
 
diff --git a/arch/arm/include/asm/socket.h b/arch/arm/include/asm/socket.h
index 6817be9573a6..537de4e0ef50 100644
--- a/arch/arm/include/asm/socket.h
+++ b/arch/arm/include/asm/socket.h
@@ -54,4 +54,7 @@
 
 #define SO_MARK                 36
 
+#define SO_TIMESTAMPING         37
+#define SCM_TIMESTAMPING        SO_TIMESTAMPING
+
 #endif /* _ASM_SOCKET_H */
diff --git a/arch/arm/include/asm/swab.h b/arch/arm/include/asm/swab.h
index 27a689be0856..ca2bf2f6d6ea 100644
--- a/arch/arm/include/asm/swab.h
+++ b/arch/arm/include/asm/swab.h
@@ -16,7 +16,7 @@
 #define __ASM_ARM_SWAB_H
 
 #include <linux/compiler.h>
-#include <asm/types.h>
+#include <linux/types.h>
 
 #if !defined(__STRICT_ANSI__) || defined(__KERNEL__)
 #  define __SWAB_64_THRU_32__
diff --git a/arch/arm/kernel/irq.c b/arch/arm/kernel/irq.c
index 363db186cb93..6874c7dca75a 100644
--- a/arch/arm/kernel/irq.c
+++ b/arch/arm/kernel/irq.c
@@ -76,7 +76,7 @@ int show_interrupts(struct seq_file *p, void *v)
 
                 seq_printf(p, "%3d: ", i);
                 for_each_present_cpu(cpu)
-                        seq_printf(p, "%10u ", kstat_cpu(cpu).irqs[i]);
+                        seq_printf(p, "%10u ", kstat_irqs_cpu(i, cpu));
                 seq_printf(p, " %10s", irq_desc[i].chip->name ? : "-");
                 seq_printf(p, "  %s", action->name);
                 for (action = action->next; action; action = action->next)
@@ -104,6 +104,11 @@ static struct irq_desc bad_irq_desc = {
         .lock = __SPIN_LOCK_UNLOCKED(bad_irq_desc.lock),
 };
 
+#ifdef CONFIG_CPUMASK_OFFSTACK
+/* We are not allocating bad_irq_desc.affinity or .pending_mask */
+#error "ARM architecture does not support CONFIG_CPUMASK_OFFSTACK."
+#endif
+
 /*
  * do_IRQ handles all hardware IRQ's.  Decoded IRQs should not
  * come via this function.  Instead, they should provide their
@@ -161,7 +166,7 @@ void __init init_IRQ(void)
                 irq_desc[irq].status |= IRQ_NOREQUEST | IRQ_NOPROBE;
 
 #ifdef CONFIG_SMP
-        bad_irq_desc.affinity = CPU_MASK_ALL;
+        cpumask_setall(bad_irq_desc.affinity);
         bad_irq_desc.cpu = smp_processor_id();
 #endif
         init_arch_irq();
@@ -191,15 +196,16 @@ void migrate_irqs(void)
                 struct irq_desc *desc = irq_desc + i;
 
                 if (desc->cpu == cpu) {
-                        unsigned int newcpu = any_online_cpu(desc->affinity);
-
-                        if (newcpu == NR_CPUS) {
+                        unsigned int newcpu = cpumask_any_and(desc->affinity,
+                                                              cpu_online_mask);
+                        if (newcpu >= nr_cpu_ids) {
                                 if (printk_ratelimit())
                                         printk(KERN_INFO "IRQ%u no longer affine to CPU%u\n",
                                                i, cpu);
 
-                                cpus_setall(desc->affinity);
-                                newcpu = any_online_cpu(desc->affinity);
+                                cpumask_setall(desc->affinity);
+                                newcpu = cpumask_any_and(desc->affinity,
+                                                         cpu_online_mask);
                         }
 
                         route_irq(desc, i, newcpu);
diff --git a/arch/arm/kernel/vmlinux.lds.S b/arch/arm/kernel/vmlinux.lds.S
index 00216071eaf7..1602373e539c 100644
--- a/arch/arm/kernel/vmlinux.lds.S
+++ b/arch/arm/kernel/vmlinux.lds.S
@@ -64,7 +64,9 @@ SECTIONS
                 __initramfs_end = .;
 #endif
                 . = ALIGN(4096);
+                __per_cpu_load = .;
                 __per_cpu_start = .;
+                        *(.data.percpu.page_aligned)
                         *(.data.percpu)
                         *(.data.percpu.shared_aligned)
                 __per_cpu_end = .;
diff --git a/arch/arm/mach-kirkwood/common.c b/arch/arm/mach-kirkwood/common.c
index b3404b7775b3..0d2074f51a59 100644
--- a/arch/arm/mach-kirkwood/common.c
+++ b/arch/arm/mach-kirkwood/common.c
@@ -231,14 +231,17 @@ static struct platform_device kirkwood_switch_device = {
 
 void __init kirkwood_ge00_switch_init(struct dsa_platform_data *d, int irq)
 {
+        int i;
+
         if (irq != NO_IRQ) {
                 kirkwood_switch_resources[0].start = irq;
                 kirkwood_switch_resources[0].end = irq;
                 kirkwood_switch_device.num_resources = 1;
         }
 
-        d->mii_bus = &kirkwood_ge00_shared.dev;
         d->netdev = &kirkwood_ge00.dev;
+        for (i = 0; i < d->nr_chips; i++)
+                d->chip[i].mii_bus = &kirkwood_ge00_shared.dev;
         kirkwood_switch_device.dev.platform_data = d;
 
         platform_device_register(&kirkwood_switch_device);
diff --git a/arch/arm/mach-kirkwood/rd88f6281-setup.c b/arch/arm/mach-kirkwood/rd88f6281-setup.c
index 9a0e905d10cd..e1c0516c4df3 100644
--- a/arch/arm/mach-kirkwood/rd88f6281-setup.c
+++ b/arch/arm/mach-kirkwood/rd88f6281-setup.c
@@ -75,7 +75,7 @@ static struct mv643xx_eth_platform_data rd88f6281_ge00_data = {
         .duplex         = DUPLEX_FULL,
 };
 
-static struct dsa_platform_data rd88f6281_switch_data = {
+static struct dsa_chip_data rd88f6281_switch_chip_data = {
         .port_names[0]  = "lan1",
         .port_names[1]  = "lan2",
         .port_names[2]  = "lan3",
@@ -83,6 +83,11 @@ static struct dsa_platform_data rd88f6281_switch_data = {
         .port_names[5]  = "cpu",
 };
 
+static struct dsa_platform_data rd88f6281_switch_plat_data = {
+        .nr_chips       = 1,
+        .chip           = &rd88f6281_switch_chip_data,
+};
+
 static struct mv643xx_eth_platform_data rd88f6281_ge01_data = {
         .phy_addr       = MV643XX_ETH_PHY_ADDR(11),
 };
@@ -105,12 +110,12 @@ static void __init rd88f6281_init(void)
         kirkwood_ge00_init(&rd88f6281_ge00_data);
         kirkwood_pcie_id(&dev, &rev);
         if (rev == MV88F6281_REV_A0) {
-                rd88f6281_switch_data.sw_addr = 10;
+                rd88f6281_switch_chip_data.sw_addr = 10;
                 kirkwood_ge01_init(&rd88f6281_ge01_data);
         } else {
-                rd88f6281_switch_data.port_names[4] = "wan";
+                rd88f6281_switch_chip_data.port_names[4] = "wan";
         }
-        kirkwood_ge00_switch_init(&rd88f6281_switch_data, NO_IRQ);
+        kirkwood_ge00_switch_init(&rd88f6281_switch_plat_data, NO_IRQ);
 
         kirkwood_rtc_init();
         kirkwood_sata_init(&rd88f6281_sata_data);
diff --git a/arch/arm/mach-ns9xxx/irq.c b/arch/arm/mach-ns9xxx/irq.c
index 22e0eb6e9ec4..feb0e54a91de 100644
--- a/arch/arm/mach-ns9xxx/irq.c
+++ b/arch/arm/mach-ns9xxx/irq.c
@@ -63,7 +63,6 @@ static struct irq_chip ns9xxx_chip = {
 #else
 static void handle_prio_irq(unsigned int irq, struct irq_desc *desc)
 {
-        unsigned int cpu = smp_processor_id();
         struct irqaction *action;
         irqreturn_t action_ret;
 
@@ -72,7 +71,7 @@ static void handle_prio_irq(unsigned int irq, struct irq_desc *desc)
         BUG_ON(desc->status & IRQ_INPROGRESS);
 
         desc->status &= ~(IRQ_REPLAY | IRQ_WAITING);
-        kstat_cpu(cpu).irqs[irq]++;
+        kstat_incr_irqs_this_cpu(irq, desc);
 
         action = desc->action;
         if (unlikely(!action || (desc->status & IRQ_DISABLED)))
diff --git a/arch/arm/mach-orion5x/common.c b/arch/arm/mach-orion5x/common.c
index 8a0e49d84256..68cc3efae567 100644
--- a/arch/arm/mach-orion5x/common.c
+++ b/arch/arm/mach-orion5x/common.c
@@ -31,6 +31,7 @@
 #include <plat/ehci-orion.h>
 #include <plat/mv_xor.h>
 #include <plat/orion_nand.h>
+#include <plat/orion5x_wdt.h>
 #include <plat/time.h>
 #include "common.h"
 
@@ -219,14 +220,17 @@ static struct platform_device orion5x_switch_device = {
 
 void __init orion5x_eth_switch_init(struct dsa_platform_data *d, int irq)
 {
+        int i;
+
         if (irq != NO_IRQ) {
                 orion5x_switch_resources[0].start = irq;
                 orion5x_switch_resources[0].end = irq;
                 orion5x_switch_device.num_resources = 1;
         }
 
-        d->mii_bus = &orion5x_eth_shared.dev;
         d->netdev = &orion5x_eth.dev;
+        for (i = 0; i < d->nr_chips; i++)
+                d->chip[i].mii_bus = &orion5x_eth_shared.dev;
         orion5x_switch_device.dev.platform_data = d;
 
         platform_device_register(&orion5x_switch_device);
@@ -533,6 +537,29 @@ void __init orion5x_xor_init(void)
 
 
 /*****************************************************************************
+ * Watchdog
+ ****************************************************************************/
+static struct orion5x_wdt_platform_data orion5x_wdt_data = {
+        .tclk                   = 0,
+};
+
+static struct platform_device orion5x_wdt_device = {
+        .name           = "orion5x_wdt",
+        .id             = -1,
+        .dev            = {
+                .platform_data  = &orion5x_wdt_data,
+        },
+        .num_resources  = 0,
+};
+
+void __init orion5x_wdt_init(void)
+{
+        orion5x_wdt_data.tclk = orion5x_tclk;
+        platform_device_register(&orion5x_wdt_device);
+}
+
+
+/*****************************************************************************
  * Time handling
  ****************************************************************************/
 int orion5x_tclk;
@@ -631,6 +658,11 @@ void __init orion5x_init(void)
                 printk(KERN_INFO "Orion: Applying 5281 D0 WFI workaround.\n");
                 disable_hlt();
         }
+
+        /*
+         * Register watchdog driver
+         */
+        orion5x_wdt_init();
 }
 
 /*
diff --git a/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c b/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c
index 15f53235ee30..9c1ca41730ba 100644
--- a/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c
+++ b/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c
@@ -94,7 +94,7 @@ static struct mv643xx_eth_platform_data rd88f5181l_fxo_eth_data = {
         .duplex         = DUPLEX_FULL,
 };
 
-static struct dsa_platform_data rd88f5181l_fxo_switch_data = {
+static struct dsa_chip_data rd88f5181l_fxo_switch_chip_data = {
         .port_names[0]  = "lan2",
         .port_names[1]  = "lan1",
         .port_names[2]  = "wan",
@@ -103,6 +103,11 @@ static struct dsa_platform_data rd88f5181l_fxo_switch_data = {
         .port_names[7]  = "lan3",
 };
 
+static struct dsa_platform_data rd88f5181l_fxo_switch_plat_data = {
+        .nr_chips       = 1,
+        .chip           = &rd88f5181l_fxo_switch_chip_data,
+};
+
 static void __init rd88f5181l_fxo_init(void)
 {
         /*
@@ -117,7 +122,7 @@ static void __init rd88f5181l_fxo_init(void)
          */
         orion5x_ehci0_init();
         orion5x_eth_init(&rd88f5181l_fxo_eth_data);
-        orion5x_eth_switch_init(&rd88f5181l_fxo_switch_data, NO_IRQ);
+        orion5x_eth_switch_init(&rd88f5181l_fxo_switch_plat_data, NO_IRQ);
         orion5x_uart0_init();
 
         orion5x_setup_dev_boot_win(RD88F5181L_FXO_NOR_BOOT_BASE,
diff --git a/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c b/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c
index 8ad3934399d4..ee1399ff0ced 100644
--- a/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c
+++ b/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c
@@ -95,7 +95,7 @@ static struct mv643xx_eth_platform_data rd88f5181l_ge_eth_data = {
         .duplex         = DUPLEX_FULL,
 };
 
-static struct dsa_platform_data rd88f5181l_ge_switch_data = {
+static struct dsa_chip_data rd88f5181l_ge_switch_chip_data = {
         .port_names[0]  = "lan2",
         .port_names[1]  = "lan1",
         .port_names[2]  = "wan",
@@ -104,6 +104,11 @@ static struct dsa_platform_data rd88f5181l_ge_switch_data = {
         .port_names[7]  = "lan3",
 };
 
+static struct dsa_platform_data rd88f5181l_ge_switch_plat_data = {
+        .nr_chips       = 1,
+        .chip           = &rd88f5181l_ge_switch_chip_data,
+};
+
 static struct i2c_board_info __initdata rd88f5181l_ge_i2c_rtc = {
         I2C_BOARD_INFO("ds1338", 0x68),
 };
@@ -122,7 +127,8 @@ static void __init rd88f5181l_ge_init(void)
          */
         orion5x_ehci0_init();
         orion5x_eth_init(&rd88f5181l_ge_eth_data);
-        orion5x_eth_switch_init(&rd88f5181l_ge_switch_data, gpio_to_irq(8));
+        orion5x_eth_switch_init(&rd88f5181l_ge_switch_plat_data,
+                                gpio_to_irq(8));
         orion5x_i2c_init();
         orion5x_uart0_init();
 
diff --git a/arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c b/arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c
index 262e25e4dace..7737cf9a8f50 100644
--- a/arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c
+++ b/arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c
@@ -35,7 +35,7 @@ static struct mv643xx_eth_platform_data rd88f6183ap_ge_eth_data = {
         .duplex         = DUPLEX_FULL,
 };
 
-static struct dsa_platform_data rd88f6183ap_ge_switch_data = {
+static struct dsa_chip_data rd88f6183ap_ge_switch_chip_data = {
         .port_names[0]  = "lan1",
         .port_names[1]  = "lan2",
         .port_names[2]  = "lan3",
@@ -44,6 +44,11 @@ static struct dsa_platform_data rd88f6183ap_ge_switch_data = {
         .port_names[5]  = "cpu",
 };
 
+static struct dsa_platform_data rd88f6183ap_ge_switch_plat_data = {
+        .nr_chips       = 1,
+        .chip           = &rd88f6183ap_ge_switch_chip_data,
+};
+
 static struct mtd_partition rd88f6183ap_ge_partitions[] = {
         {
                 .name   = "kernel",
@@ -89,7 +94,8 @@ static void __init rd88f6183ap_ge_init(void)
          */
         orion5x_ehci0_init();
         orion5x_eth_init(&rd88f6183ap_ge_eth_data);
-        orion5x_eth_switch_init(&rd88f6183ap_ge_switch_data, gpio_to_irq(3));
+        orion5x_eth_switch_init(&rd88f6183ap_ge_switch_plat_data,
+                                gpio_to_irq(3));
         spi_register_board_info(rd88f6183ap_ge_spi_slave_info,
                                 ARRAY_SIZE(rd88f6183ap_ge_spi_slave_info));
         orion5x_spi_init();
diff --git a/arch/arm/mach-orion5x/wrt350n-v2-setup.c b/arch/arm/mach-orion5x/wrt350n-v2-setup.c
index cc8f89200865..1b4ad9d5e2eb 100644
--- a/arch/arm/mach-orion5x/wrt350n-v2-setup.c
+++ b/arch/arm/mach-orion5x/wrt350n-v2-setup.c
@@ -106,7 +106,7 @@ static struct mv643xx_eth_platform_data wrt350n_v2_eth_data = {
         .duplex         = DUPLEX_FULL,
 };
 
-static struct dsa_platform_data wrt350n_v2_switch_data = {
+static struct dsa_chip_data wrt350n_v2_switch_chip_data = {
         .port_names[0]  = "lan2",
         .port_names[1]  = "lan1",
         .port_names[2]  = "wan",
@@ -115,6 +115,11 @@ static struct dsa_platform_data wrt350n_v2_switch_data = {
         .port_names[7]  = "lan4",
 };
 
+static struct dsa_platform_data wrt350n_v2_switch_plat_data = {
+        .nr_chips       = 1,
+        .chip           = &wrt350n_v2_switch_chip_data,
+};
+
 static void __init wrt350n_v2_init(void)
 {
         /*
@@ -129,7 +134,7 @@ static void __init wrt350n_v2_init(void)
          */
         orion5x_ehci0_init();
         orion5x_eth_init(&wrt350n_v2_eth_data);
-        orion5x_eth_switch_init(&wrt350n_v2_switch_data, NO_IRQ);
+        orion5x_eth_switch_init(&wrt350n_v2_switch_plat_data, NO_IRQ);
         orion5x_uart0_init();
 
         orion5x_setup_dev_boot_win(WRT350N_V2_NOR_BOOT_BASE,
diff --git a/arch/arm/mach-pxa/e740.c b/arch/arm/mach-pxa/e740.c
index 6d48e00f4f0b..a6fff782e7a8 100644
--- a/arch/arm/mach-pxa/e740.c
+++ b/arch/arm/mach-pxa/e740.c
@@ -135,6 +135,11 @@ static unsigned long e740_pin_config[] __initdata = {
         /* IrDA */
         GPIO38_GPIO | MFP_LPM_DRIVE_HIGH,
 
+        /* Audio power control */
+        GPIO16_GPIO,  /* AC97 codec AVDD2 supply (analogue power) */
+        GPIO40_GPIO,  /* Mic amp power */
+        GPIO41_GPIO,  /* Headphone amp power */
+
         /* PC Card */
         GPIO8_GPIO,   /* CD0 */
         GPIO44_GPIO,  /* CD1 */
diff --git a/arch/arm/mach-pxa/e750.c b/arch/arm/mach-pxa/e750.c
index be1ab8edb973..665066fd280e 100644
--- a/arch/arm/mach-pxa/e750.c
+++ b/arch/arm/mach-pxa/e750.c
@@ -133,6 +133,11 @@ static unsigned long e750_pin_config[] __initdata = {
         /* IrDA */
         GPIO38_GPIO | MFP_LPM_DRIVE_HIGH,
 
+        /* Audio power control */
+        GPIO4_GPIO,  /* Headphone amp power */
+        GPIO7_GPIO,  /* Speaker amp power */
+        GPIO37_GPIO, /* Headphone detect */
+
         /* PC Card */
         GPIO8_GPIO,   /* CD0 */
         GPIO44_GPIO,  /* CD1 */
diff --git a/arch/arm/mach-pxa/h5000.c b/arch/arm/mach-pxa/h5000.c
index da6e4422c0f3..295ec413d804 100644
--- a/arch/arm/mach-pxa/h5000.c
+++ b/arch/arm/mach-pxa/h5000.c
@@ -153,6 +153,13 @@ static unsigned long h5000_pin_config[] __initdata = {
         GPIO23_SSP1_SCLK,
         GPIO25_SSP1_TXD,
         GPIO26_SSP1_RXD,
+
+        /* I2S */
+        GPIO28_I2S_BITCLK_OUT,
+        GPIO29_I2S_SDATA_IN,
+        GPIO30_I2S_SDATA_OUT,
+        GPIO31_I2S_SYNC,
+        GPIO32_I2S_SYSCLK,
 };
 
 /*
diff --git a/arch/arm/mach-pxa/include/mach/eseries-gpio.h b/arch/arm/mach-pxa/include/mach/eseries-gpio.h
index efbd2aa9ecec..f3e5509820d7 100644
--- a/arch/arm/mach-pxa/include/mach/eseries-gpio.h
+++ b/arch/arm/mach-pxa/include/mach/eseries-gpio.h
@@ -45,6 +45,21 @@
 /* e7xx IrDA power control */
 #define GPIO_E7XX_IR_OFF         38
 
+/* e740 audio control GPIOs */
+#define GPIO_E740_WM9705_nAVDD2  16
+#define GPIO_E740_MIC_ON         40
+#define GPIO_E740_AMP_ON         41
+
+/* e750 audio control GPIOs */
+#define GPIO_E750_HP_AMP_OFF      4
+#define GPIO_E750_SPK_AMP_OFF     7
+#define GPIO_E750_HP_DETECT      37
+
+/* e800 audio control GPIOs */
+#define GPIO_E800_HP_DETECT      81
+#define GPIO_E800_HP_AMP_OFF     82
+#define GPIO_E800_SPK_AMP_ON     83
+
 /* ASIC related GPIOs */
 #define GPIO_ESERIES_TMIO_IRQ        5
 #define GPIO_ESERIES_TMIO_PCLR      19
diff --git a/arch/arm/mach-pxa/include/mach/regs-ssp.h b/arch/arm/mach-pxa/include/mach/regs-ssp.h
index cf31986f6f05..018f6d65b57b 100644
--- a/arch/arm/mach-pxa/include/mach/regs-ssp.h
+++ b/arch/arm/mach-pxa/include/mach/regs-ssp.h
@@ -50,7 +50,7 @@
 #define SSCR0_TUM       (1 << 23)       /* Transmit FIFO underrun interrupt mask */
 #define SSCR0_FRDC      (0x07000000)    /* Frame rate divider control (mask) */
 #define SSCR0_SlotsPerFrm(x) (((x) - 1) << 24)  /* Time slots per frame [1..8] */
-#define SSCR0_ADC       (1 << 30)       /* Audio clock select */
+#define SSCR0_ACS       (1 << 30)       /* Audio clock select */
 #define SSCR0_MOD       (1 << 31)       /* Mode (normal or network) */
 #endif
 
@@ -109,6 +109,11 @@
 #define SSSR_TINT               (1 << 19)       /* Receiver Time-out Interrupt */
 #define SSSR_PINT               (1 << 18)       /* Peripheral Trailing Byte Interrupt */
 
+#if defined(CONFIG_PXA3xx)
+#define SSPSP_EDMYSTOP(x)       ((x) << 28)     /* Extended Dummy Stop */
+#define SSPSP_EDMYSTRT(x)       ((x) << 26)     /* Extended Dummy Start */
+#endif
+
 #define SSPSP_FSRT              (1 << 25)       /* Frame Sync Relative Timing */
 #define SSPSP_DMYSTOP(x)        ((x) << 23)     /* Dummy Stop */
 #define SSPSP_SFRMWDTH(x)       ((x) << 16)     /* Serial Frame Width */
diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c
index 6d447c9ce8ab..0d62d311d41a 100644
--- a/arch/arm/mach-pxa/spitz.c
+++ b/arch/arm/mach-pxa/spitz.c
@@ -105,6 +105,12 @@ static unsigned long spitz_pin_config[] __initdata = {
         GPIO57_nIOIS16,
         GPIO104_PSKTSEL,
 
+        /* I2S */
+        GPIO28_I2S_BITCLK_OUT,
+        GPIO29_I2S_SDATA_IN,
+        GPIO30_I2S_SDATA_OUT,
+        GPIO31_I2S_SYNC,
+
         /* MMC */
         GPIO32_MMC_CLK,
         GPIO112_MMC_CMD,
diff --git a/arch/arm/mach-s3c2410/dma.c b/arch/arm/mach-s3c2410/dma.c
index 552b4c778fdc..440c014e24b3 100644
--- a/arch/arm/mach-s3c2410/dma.c
+++ b/arch/arm/mach-s3c2410/dma.c
@@ -28,7 +28,7 @@
 #include <mach/regs-mem.h>
 #include <mach/regs-lcd.h>
 #include <mach/regs-sdi.h>
-#include <asm/plat-s3c24xx/regs-iis.h>
+#include <plat/regs-iis.h>
 #include <plat/regs-spi.h>
 
 static struct s3c24xx_dma_map __initdata s3c2410_dma_mappings[] = {
diff --git a/arch/arm/mach-s3c2410/usb-simtec.c b/arch/arm/mach-s3c2410/usb-simtec.c
index 6078f09b7df5..8331e8d97e20 100644
--- a/arch/arm/mach-s3c2410/usb-simtec.c
+++ b/arch/arm/mach-s3c2410/usb-simtec.c
@@ -29,13 +29,14 @@
 
 #include <mach/bast-map.h>
 #include <mach/bast-irq.h>
-#include <mach/usb-control.h>
 #include <mach/regs-gpio.h>
 
 #include <mach/hardware.h>
 #include <asm/irq.h>
 
+#include <plat/usb-control.h>
 #include <plat/devs.h>
+
 #include "usb-simtec.h"
 
 /* control power and monitor over-current events on various Simtec
diff --git a/arch/arm/mach-s3c2412/dma.c b/arch/arm/mach-s3c2412/dma.c
index 919856c9433f..9e3478506c6f 100644
--- a/arch/arm/mach-s3c2412/dma.c
+++ b/arch/arm/mach-s3c2412/dma.c
@@ -29,8 +29,8 @@
 #include <mach/regs-mem.h>
 #include <mach/regs-lcd.h>
 #include <mach/regs-sdi.h>
-#include <asm/plat-s3c24xx/regs-s3c2412-iis.h>
-#include <asm/plat-s3c24xx/regs-iis.h>
+#include <plat/regs-s3c2412-iis.h>
+#include <plat/regs-iis.h>
 #include <plat/regs-spi.h>
 
 #define MAP(x) { (x)| DMA_CH_VALID, (x)| DMA_CH_VALID, (x)| DMA_CH_VALID, (x)| DMA_CH_VALID }
diff --git a/arch/arm/mach-s3c2440/dma.c b/arch/arm/mach-s3c2440/dma.c
index 5b5ee0b8f4e0..69b6cf34df47 100644
--- a/arch/arm/mach-s3c2440/dma.c
+++ b/arch/arm/mach-s3c2440/dma.c
@@ -28,7 +28,7 @@
 #include <mach/regs-mem.h>
 #include <mach/regs-lcd.h>
 #include <mach/regs-sdi.h>
-#include <asm/plat-s3c24xx/regs-iis.h>
+#include <plat/regs-iis.h>
 #include <plat/regs-spi.h>
 
 static struct s3c24xx_dma_map __initdata s3c2440_dma_mappings[] = {
diff --git a/arch/arm/mach-s3c2443/dma.c b/arch/arm/mach-s3c2443/dma.c
index 2a58a4d5aa5a..8430e5829186 100644
--- a/arch/arm/mach-s3c2443/dma.c
+++ b/arch/arm/mach-s3c2443/dma.c
@@ -29,7 +29,7 @@
 #include <mach/regs-mem.h>
 #include <mach/regs-lcd.h>
 #include <mach/regs-sdi.h>
-#include <asm/plat-s3c24xx/regs-iis.h>
+#include <plat/regs-iis.h>
 #include <plat/regs-spi.h>
 
 #define MAP(x) { \
diff --git a/arch/arm/oprofile/op_model_mpcore.c b/arch/arm/oprofile/op_model_mpcore.c
index 6d6bd5899240..853d42bb8682 100644
--- a/arch/arm/oprofile/op_model_mpcore.c
+++ b/arch/arm/oprofile/op_model_mpcore.c
@@ -263,7 +263,7 @@ static void em_route_irq(int irq, unsigned int cpu)
         const struct cpumask *mask = cpumask_of(cpu);
 
         spin_lock_irq(&desc->lock);
-        desc->affinity = *mask;
+        cpumask_copy(desc->affinity, mask);
         desc->chip->set_affinity(irq, mask);
         spin_unlock_irq(&desc->lock);
 }
diff --git a/arch/arm/plat-orion/include/plat/orion5x_wdt.h b/arch/arm/plat-orion/include/plat/orion5x_wdt.h
new file mode 100644
index 000000000000..3c9cf6a305ef
--- /dev/null
+++ b/arch/arm/plat-orion/include/plat/orion5x_wdt.h
@@ -0,0 +1,18 @@
+/*
+ * arch/arm/plat-orion/include/plat/orion5x_wdt.h
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#ifndef __PLAT_ORION5X_WDT_H
+#define __PLAT_ORION5X_WDT_H
+
+struct orion5x_wdt_platform_data {
+        u32     tclk;           /* no <linux/clk.h> support yet */
+};
+
+
+#endif
+
diff --git a/arch/arm/mach-s3c2410/include/mach/audio.h b/arch/arm/plat-s3c/include/plat/audio.h
index de0e8da48bc3..de0e8da48bc3 100644
--- a/arch/arm/mach-s3c2410/include/mach/audio.h
+++ b/arch/arm/plat-s3c/include/plat/audio.h
diff --git a/arch/arm/plat-s3c/include/plat/regs-s3c2412-iis.h b/arch/arm/plat-s3c/include/plat/regs-s3c2412-iis.h
new file mode 100644
index 000000000000..0fad7571030e
--- /dev/null
+++ b/arch/arm/plat-s3c/include/plat/regs-s3c2412-iis.h
@@ -0,0 +1,75 @@
+/* linux/include/asm-arm/plat-s3c24xx/regs-s3c2412-iis.h
+ *
+ * Copyright 2007 Simtec Electronics <linux@simtec.co.uk>
+ *      http://armlinux.simtec.co.uk/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * S3C2412 IIS register definition
+*/
+
+#ifndef __ASM_ARCH_REGS_S3C2412_IIS_H
+#define __ASM_ARCH_REGS_S3C2412_IIS_H
+
+#define S3C2412_IISCON                  (0x00)
+#define S3C2412_IISMOD                  (0x04)
+#define S3C2412_IISFIC                  (0x08)
+#define S3C2412_IISPSR                  (0x0C)
+#define S3C2412_IISTXD                  (0x10)
+#define S3C2412_IISRXD                  (0x14)
+
+#define S3C2412_IISCON_LRINDEX          (1 << 11)
+#define S3C2412_IISCON_TXFIFO_EMPTY     (1 << 10)
+#define S3C2412_IISCON_RXFIFO_EMPTY     (1 << 9)
+#define S3C2412_IISCON_TXFIFO_FULL      (1 << 8)
+#define S3C2412_IISCON_RXFIFO_FULL      (1 << 7)
+#define S3C2412_IISCON_TXDMA_PAUSE      (1 << 6)
+#define S3C2412_IISCON_RXDMA_PAUSE      (1 << 5)
+#define S3C2412_IISCON_TXCH_PAUSE       (1 << 4)
+#define S3C2412_IISCON_RXCH_PAUSE       (1 << 3)
+#define S3C2412_IISCON_TXDMA_ACTIVE     (1 << 2)
+#define S3C2412_IISCON_RXDMA_ACTIVE     (1 << 1)
+#define S3C2412_IISCON_IIS_ACTIVE       (1 << 0)
+
+#define S3C64XX_IISMOD_IMS_PCLK         (0 << 10)
+#define S3C64XX_IISMOD_IMS_SYSMUX       (1 << 10)
+
+#define S3C2412_IISMOD_MASTER_INTERNAL  (0 << 10)
+#define S3C2412_IISMOD_MASTER_EXTERNAL  (1 << 10)
+#define S3C2412_IISMOD_SLAVE            (2 << 10)
+#define S3C2412_IISMOD_MASTER_MASK      (3 << 10)
+#define S3C2412_IISMOD_MODE_TXONLY      (0 << 8)
+#define S3C2412_IISMOD_MODE_RXONLY      (1 << 8)
+#define S3C2412_IISMOD_MODE_TXRX        (2 << 8)
+#define S3C2412_IISMOD_MODE_MASK        (3 << 8)
+#define S3C2412_IISMOD_LR_LLOW          (0 << 7)
+#define S3C2412_IISMOD_LR_RLOW          (1 << 7)
+#define S3C2412_IISMOD_SDF_IIS          (0 << 5)
+#define S3C2412_IISMOD_SDF_MSB          (1 << 5)
+#define S3C2412_IISMOD_SDF_LSB          (2 << 5)
+#define S3C2412_IISMOD_SDF_MASK         (3 << 5)
+#define S3C2412_IISMOD_RCLK_256FS       (0 << 3)
+#define S3C2412_IISMOD_RCLK_512FS       (1 << 3)
+#define S3C2412_IISMOD_RCLK_384FS       (2 << 3)
+#define S3C2412_IISMOD_RCLK_768FS       (3 << 3)
+#define S3C2412_IISMOD_RCLK_MASK        (3 << 3)
+#define S3C2412_IISMOD_BCLK_32FS        (0 << 1)
+#define S3C2412_IISMOD_BCLK_48FS        (1 << 1)
+#define S3C2412_IISMOD_BCLK_16FS        (2 << 1)
+#define S3C2412_IISMOD_BCLK_24FS        (3 << 1)
+#define S3C2412_IISMOD_BCLK_MASK        (3 << 1)
+#define S3C2412_IISMOD_8BIT             (1 << 0)
+
+#define S3C2412_IISPSR_PSREN            (1 << 15)
+
+#define S3C2412_IISFIC_TXFLUSH          (1 << 15)
+#define S3C2412_IISFIC_RXFLUSH          (1 << 7)
+#define S3C2412_IISFIC_TXCOUNT(x)       (((x) >>  8) & 0xf)
+#define S3C2412_IISFIC_RXCOUNT(x)       (((x) >>  0) & 0xf)
+
+
+
+#endif /* __ASM_ARCH_REGS_S3C2412_IIS_H */
+
diff --git a/arch/arm/mach-s3c2410/include/mach/usb-control.h b/arch/arm/plat-s3c/include/plat/usb-control.h
index cd91d1591f31..822c87fe948e 100644
--- a/arch/arm/mach-s3c2410/include/mach/usb-control.h
+++ b/arch/arm/plat-s3c/include/plat/usb-control.h
@@ -1,9 +1,9 @@
-/* arch/arm/mach-s3c2410/include/mach/usb-control.h
+/* arch/arm/plat-s3c/include/plat/usb-control.h
  *
  * Copyright (c) 2004 Simtec Electronics
  *      Ben Dooks <ben@simtec.co.uk>
  *
- * S3C2410 - usb port information
+ * S3C - USB host port information
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as
@@ -11,7 +11,7 @@
 */
 
 #ifndef __ASM_ARCH_USBCONTROL_H
-#define __ASM_ARCH_USBCONTROL_H "arch/arm/mach-s3c2410/include/mach/usb-control.h"
+#define __ASM_ARCH_USBCONTROL_H
 
 #define S3C_HCDFLG_USED (1)
 
diff --git a/arch/arm/plat-s3c24xx/include/plat/regs-iis.h b/arch/arm/plat-s3c24xx/include/plat/regs-iis.h
new file mode 100644
index 000000000000..a6f1d5df13b4
--- /dev/null
+++ b/arch/arm/plat-s3c24xx/include/plat/regs-iis.h
@@ -0,0 +1,77 @@
+/* arch/arm/mach-s3c2410/include/mach/regs-iis.h
+ *
+ * Copyright (c) 2003 Simtec Electronics <linux@simtec.co.uk>
+ *                    http://www.simtec.co.uk/products/SWLINUX/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * S3C2410 IIS register definition
+*/
+
+#ifndef __ASM_ARCH_REGS_IIS_H
+#define __ASM_ARCH_REGS_IIS_H
+
+#define S3C2410_IISCON   (0x00)
+
+#define S3C2410_IISCON_LRINDEX    (1<<8)
+#define S3C2410_IISCON_TXFIFORDY  (1<<7)
+#define S3C2410_IISCON_RXFIFORDY  (1<<6)
+#define S3C2410_IISCON_TXDMAEN    (1<<5)
+#define S3C2410_IISCON_RXDMAEN    (1<<4)
+#define S3C2410_IISCON_TXIDLE     (1<<3)
+#define S3C2410_IISCON_RXIDLE     (1<<2)
+#define S3C2410_IISCON_PSCEN      (1<<1)
+#define S3C2410_IISCON_IISEN      (1<<0)
+
+#define S3C2410_IISMOD   (0x04)
+
+#define S3C2440_IISMOD_MPLL       (1<<9)
+#define S3C2410_IISMOD_SLAVE      (1<<8)
+#define S3C2410_IISMOD_NOXFER     (0<<6)
+#define S3C2410_IISMOD_RXMODE     (1<<6)
+#define S3C2410_IISMOD_TXMODE     (2<<6)
+#define S3C2410_IISMOD_TXRXMODE   (3<<6)
+#define S3C2410_IISMOD_LR_LLOW    (0<<5)
+#define S3C2410_IISMOD_LR_RLOW    (1<<5)
+#define S3C2410_IISMOD_IIS        (0<<4)
+#define S3C2410_IISMOD_MSB        (1<<4)
+#define S3C2410_IISMOD_8BIT       (0<<3)
+#define S3C2410_IISMOD_16BIT      (1<<3)
+#define S3C2410_IISMOD_BITMASK    (1<<3)
+#define S3C2410_IISMOD_256FS      (0<<2)
+#define S3C2410_IISMOD_384FS      (1<<2)
+#define S3C2410_IISMOD_16FS       (0<<0)
+#define S3C2410_IISMOD_32FS       (1<<0)
+#define S3C2410_IISMOD_48FS       (2<<0)
+#define S3C2410_IISMOD_FS_MASK    (3<<0)
+
+#define S3C2410_IISPSR          (0x08)
+#define S3C2410_IISPSR_INTMASK  (31<<5)
+#define S3C2410_IISPSR_INTSHIFT (5)
+#define S3C2410_IISPSR_EXTMASK  (31<<0)
+#define S3C2410_IISPSR_EXTSHFIT (0)
+
+#define S3C2410_IISFCON  (0x0c)
+
+#define S3C2410_IISFCON_TXDMA     (1<<15)
+#define S3C2410_IISFCON_RXDMA     (1<<14)
+#define S3C2410_IISFCON_TXENABLE  (1<<13)
+#define S3C2410_IISFCON_RXENABLE  (1<<12)
+#define S3C2410_IISFCON_TXMASK    (0x3f << 6)
+#define S3C2410_IISFCON_TXSHIFT   (6)
+#define S3C2410_IISFCON_RXMASK    (0x3f)
+#define S3C2410_IISFCON_RXSHIFT   (0)
+
+#define S3C2400_IISFCON_TXDMA     (1<<11)
+#define S3C2400_IISFCON_RXDMA     (1<<10)
+#define S3C2400_IISFCON_TXENABLE  (1<<9)
+#define S3C2400_IISFCON_RXENABLE  (1<<8)
+#define S3C2400_IISFCON_TXMASK    (0x07 << 4)
+#define S3C2400_IISFCON_TXSHIFT   (4)
+#define S3C2400_IISFCON_RXMASK    (0x07)
+#define S3C2400_IISFCON_RXSHIFT   (0)
+
+#define S3C2410_IISFIFO  (0x10)
+#endif /* __ASM_ARCH_REGS_IIS_H */
diff --git a/arch/avr32/Kconfig b/arch/avr32/Kconfig
index b189680d18b0..05fe3053dcae 100644
--- a/arch/avr32/Kconfig
+++ b/arch/avr32/Kconfig
@@ -181,7 +181,7 @@ source "kernel/Kconfig.preempt"
 config QUICKLIST
         def_bool y
 
-config HAVE_ARCH_BOOTMEM_NODE
+config HAVE_ARCH_BOOTMEM
         def_bool n
 
 config ARCH_HAVE_MEMORY_PRESENT
diff --git a/arch/avr32/boards/hammerhead/flash.c b/arch/avr32/boards/hammerhead/flash.c
index a98c6dd3a028..559bbcb03f9b 100644
--- a/arch/avr32/boards/hammerhead/flash.c
+++ b/arch/avr32/boards/hammerhead/flash.c
@@ -15,7 +15,6 @@
 #include <linux/mtd/physmap.h>
 #include <linux/usb/isp116x.h>
 #include <linux/dma-mapping.h>
-#include <linux/platform_device.h>
 #include <linux/delay.h>
 
 #include <mach/portmux.h>
diff --git a/arch/avr32/include/asm/socket.h b/arch/avr32/include/asm/socket.h
index 35863f260929..04c860619700 100644
--- a/arch/avr32/include/asm/socket.h
+++ b/arch/avr32/include/asm/socket.h
@@ -54,4 +54,7 @@
 
 #define SO_MARK                 36
 
+#define SO_TIMESTAMPING         37
+#define SCM_TIMESTAMPING        SO_TIMESTAMPING
+
 #endif /* __ASM_AVR32_SOCKET_H */
diff --git a/arch/avr32/include/asm/swab.h b/arch/avr32/include/asm/swab.h
index a14aa5b46d98..14cc737bbca6 100644
--- a/arch/avr32/include/asm/swab.h
+++ b/arch/avr32/include/asm/swab.h
@@ -4,7 +4,7 @@
 #ifndef __ASM_AVR32_SWAB_H
 #define __ASM_AVR32_SWAB_H
 
-#include <asm/types.h>
+#include <linux/types.h>
 #include <linux/compiler.h>
 
 #define __SWAB_64_THRU_32__
diff --git a/arch/avr32/include/asm/uaccess.h b/arch/avr32/include/asm/uaccess.h
index ed092395215e..245b2ee213c9 100644
--- a/arch/avr32/include/asm/uaccess.h
+++ b/arch/avr32/include/asm/uaccess.h
@@ -230,10 +230,10 @@ extern int __put_user_bad(void);
         asm volatile(                                                   \
                 "1:     ld." suffix "   %1, %3                  \n"     \
                 "2:                                             \n"     \
-                "       .section .fixup, \"ax\"                 \n"     \
+                "       .subsection 1                           \n"     \
                 "3:     mov     %0, %4                          \n"     \
                 "       rjmp    2b                              \n"     \
-                "       .previous                               \n"     \
+                "       .subsection 0                           \n"     \
                 "       .section __ex_table, \"a\"              \n"     \
                 "       .long   1b, 3b                          \n"     \
                 "       .previous                               \n"     \
@@ -295,10 +295,10 @@ extern int __put_user_bad(void);
         asm volatile(                                                   \
                 "1:     st." suffix "   %1, %3                  \n"     \
                 "2:                                             \n"     \
-                "       .section .fixup, \"ax\"                 \n"     \
+                "       .subsection 1                           \n"     \
                 "3:     mov     %0, %4                          \n"     \
                 "       rjmp    2b                              \n"     \
-                "       .previous                               \n"     \
+                "       .subsection 0                           \n"     \
                 "       .section __ex_table, \"a\"              \n"     \
                 "       .long   1b, 3b                          \n"     \
                 "       .previous                               \n"     \
diff --git a/arch/avr32/kernel/entry-avr32b.S b/arch/avr32/kernel/entry-avr32b.S
index 33d49377b8be..009a80155d67 100644
--- a/arch/avr32/kernel/entry-avr32b.S
+++ b/arch/avr32/kernel/entry-avr32b.S
@@ -150,10 +150,10 @@ page_not_present:
         tlbmiss_restore
         sub     sp, 4
         stmts   --sp, r0-lr
-        rcall   save_full_context_ex
+        call    save_full_context_ex
         mfsr    r12, SYSREG_ECR
         mov     r11, sp
-        rcall   do_page_fault
+        call    do_page_fault
         rjmp    ret_from_exception
 
         .align  2
@@ -250,7 +250,7 @@ syscall_badsys:
 
         .global ret_from_fork
 ret_from_fork:
-        rcall   schedule_tail
+        call   schedule_tail
 
         /* check for syscall tracing */
         get_thread_info r0
@@ -261,7 +261,7 @@ ret_from_fork:
 
 syscall_trace_enter:
         pushm   r8-r12
-        rcall   syscall_trace
+        call    syscall_trace
         popm    r8-r12
         rjmp    syscall_trace_cont
 
@@ -269,14 +269,14 @@ syscall_exit_work:
         bld     r1, TIF_SYSCALL_TRACE
         brcc    1f
         unmask_interrupts
-        rcall   syscall_trace
+        call    syscall_trace
         mask_interrupts
         ld.w    r1, r0[TI_flags]
 
 1:      bld     r1, TIF_NEED_RESCHED
         brcc    2f
         unmask_interrupts
-        rcall   schedule
+        call    schedule
         mask_interrupts
         ld.w    r1, r0[TI_flags]
         rjmp    1b
@@ -287,7 +287,7 @@ syscall_exit_work:
         unmask_interrupts
         mov     r12, sp
         mov     r11, r0
-        rcall   do_notify_resume
+        call    do_notify_resume
         mask_interrupts
         ld.w    r1, r0[TI_flags]
         rjmp    1b
@@ -394,7 +394,7 @@ handle_critical:
 
         mfsr    r12, SYSREG_ECR
         mov     r11, sp
-        rcall   do_critical_exception
+        call    do_critical_exception
 
         /* We should never get here... */
 bad_return:
@@ -407,18 +407,18 @@ bad_return:
 do_bus_error_write:
         sub     sp, 4
         stmts   --sp, r0-lr
-        rcall   save_full_context_ex
+        call    save_full_context_ex
         mov     r11, 1
         rjmp    1f
 
 do_bus_error_read:
         sub     sp, 4
         stmts   --sp, r0-lr
-        rcall   save_full_context_ex
+        call    save_full_context_ex
         mov     r11, 0
 1:      mfsr    r12, SYSREG_BEAR
         mov     r10, sp
-        rcall   do_bus_error
+        call    do_bus_error
         rjmp    ret_from_exception
 
         .align  1
@@ -433,7 +433,7 @@ do_nmi_ll:
 1:      pushm   r8, r9  /* PC and SR */
         mfsr    r12, SYSREG_ECR
         mov     r11, sp
-        rcall   do_nmi
+        call    do_nmi
         popm    r8-r9
         mtsr    SYSREG_RAR_NMI, r8
         tst     r0, r0
@@ -457,29 +457,29 @@ do_nmi_ll:
 handle_address_fault:
         sub     sp, 4
         stmts   --sp, r0-lr
-        rcall   save_full_context_ex
+        call    save_full_context_ex
         mfsr    r12, SYSREG_ECR
         mov     r11, sp
-        rcall   do_address_exception
+        call    do_address_exception
         rjmp    ret_from_exception
 
 handle_protection_fault:
         sub     sp, 4
         stmts   --sp, r0-lr
-        rcall   save_full_context_ex
+        call    save_full_context_ex
         mfsr    r12, SYSREG_ECR
         mov     r11, sp
-        rcall   do_page_fault
+        call    do_page_fault
         rjmp    ret_from_exception
 
         .align  1
 do_illegal_opcode_ll:
         sub     sp, 4
         stmts   --sp, r0-lr
-        rcall   save_full_context_ex
+        call    save_full_context_ex
         mfsr    r12, SYSREG_ECR
         mov     r11, sp
-        rcall   do_illegal_opcode
+        call    do_illegal_opcode
         rjmp    ret_from_exception
 
 do_dtlb_modified:
@@ -513,11 +513,11 @@ do_dtlb_modified:
 do_fpe_ll:
         sub     sp, 4
         stmts   --sp, r0-lr
-        rcall   save_full_context_ex
+        call    save_full_context_ex
         unmask_interrupts
         mov     r12, 26
         mov     r11, sp
-        rcall   do_fpe
+        call    do_fpe
         rjmp    ret_from_exception
 
 ret_from_exception:
@@ -553,7 +553,7 @@ fault_resume_kernel:
         lddsp   r4, sp[REG_SR]
         bld     r4, SYSREG_GM_OFFSET
         brcs    1f
-        rcall   preempt_schedule_irq
+        call    preempt_schedule_irq
 1:
 #endif
 
@@ -582,7 +582,7 @@ fault_exit_work:
         bld     r1, TIF_NEED_RESCHED
         brcc    1f
         unmask_interrupts
-        rcall   schedule
+        call    schedule
         mask_interrupts
         ld.w    r1, r0[TI_flags]
         rjmp    fault_exit_work
@@ -593,7 +593,7 @@ fault_exit_work:
         unmask_interrupts
         mov     r12, sp
         mov     r11, r0
-        rcall   do_notify_resume
+        call    do_notify_resume
         mask_interrupts
         ld.w    r1, r0[TI_flags]
         rjmp    fault_exit_work
@@ -616,10 +616,10 @@ handle_debug:
 
 .Ldebug_fixup_cont:
 #ifdef CONFIG_TRACE_IRQFLAGS
-        rcall   trace_hardirqs_off
+        call    trace_hardirqs_off
 #endif
         mov     r12, sp
-        rcall   do_debug
+        call    do_debug
         mov     sp, r12
 
         lddsp   r2, sp[REG_SR]
@@ -643,7 +643,7 @@ handle_debug:
         mtsr    SYSREG_RSR_DBG, r11
         mtsr    SYSREG_RAR_DBG, r10
 #ifdef CONFIG_TRACE_IRQFLAGS
-        rcall   trace_hardirqs_on
+        call    trace_hardirqs_on
 1:
 #endif
         ldmts   sp++, r0-lr
@@ -676,7 +676,7 @@ debug_resume_kernel:
 #ifdef CONFIG_TRACE_IRQFLAGS
         bld     r11, SYSREG_GM_OFFSET
         brcc    1f
-        rcall   trace_hardirqs_on
+        call    trace_hardirqs_on
 1:
 #endif
         mfsr    r2, SYSREG_SR
@@ -747,7 +747,7 @@ irq_level\level:
         mov     r11, sp
         mov     r12, \level
 
-        rcall   do_IRQ
+        call    do_IRQ
 
         lddsp   r4, sp[REG_SR]
         bfextu  r4, r4, SYSREG_M0_OFFSET, 3
@@ -767,7 +767,7 @@ irq_level\level:
 
 1:
 #ifdef CONFIG_TRACE_IRQFLAGS
-        rcall   trace_hardirqs_on
+        call    trace_hardirqs_on
 #endif
         popm    r8-r9
         mtsr    rar_int\level, r8
@@ -807,7 +807,7 @@ irq_level\level:
         lddsp   r4, sp[REG_SR]
         bld     r4, SYSREG_GM_OFFSET
         brcs    1b
-        rcall   preempt_schedule_irq
+        call    preempt_schedule_irq
 #endif
         rjmp    1b
         .endm
diff --git a/arch/avr32/kernel/irq.c b/arch/avr32/kernel/irq.c
index a8e767d836aa..9f572229d318 100644
--- a/arch/avr32/kernel/irq.c
+++ b/arch/avr32/kernel/irq.c
@@ -58,7 +58,7 @@ int show_interrupts(struct seq_file *p, void *v)
 
                 seq_printf(p, "%3d: ", i);
                 for_each_online_cpu(cpu)
-                        seq_printf(p, "%10u ", kstat_cpu(cpu).irqs[i]);
+                        seq_printf(p, "%10u ", kstat_irqs_cpu(i, cpu));
                 seq_printf(p, " %8s", irq_desc[i].chip->name ? : "-");
                 seq_printf(p, "  %s", action->name);
                 for (action = action->next; action; action = action->next)
diff --git a/arch/avr32/kernel/syscall-stubs.S b/arch/avr32/kernel/syscall-stubs.S
index 673178e235f3..f7244cd02fbb 100644
--- a/arch/avr32/kernel/syscall-stubs.S
+++ b/arch/avr32/kernel/syscall-stubs.S
@@ -61,7 +61,7 @@ __sys_execve:
 __sys_mmap2:
         pushm   lr
         st.w    --sp, ARG6
-        rcall   sys_mmap2
+        call    sys_mmap2
         sub     sp, -4
         popm    pc
 
@@ -70,7 +70,7 @@ __sys_mmap2:
 __sys_sendto:
         pushm   lr
         st.w    --sp, ARG6
-        rcall   sys_sendto
+        call    sys_sendto
         sub     sp, -4
         popm    pc
 
@@ -79,7 +79,7 @@ __sys_sendto:
 __sys_recvfrom:
         pushm   lr
         st.w    --sp, ARG6
-        rcall   sys_recvfrom
+        call    sys_recvfrom
         sub     sp, -4
         popm    pc
 
@@ -88,7 +88,7 @@ __sys_recvfrom:
 __sys_pselect6:
         pushm   lr
         st.w    --sp, ARG6
-        rcall   sys_pselect6
+        call    sys_pselect6
         sub     sp, -4
         popm    pc
 
@@ -97,7 +97,7 @@ __sys_pselect6:
 __sys_splice:
         pushm   lr
         st.w    --sp, ARG6
-        rcall   sys_splice
+        call    sys_splice
         sub     sp, -4
         popm    pc
 
@@ -106,7 +106,7 @@ __sys_splice:
 __sys_epoll_pwait:
         pushm   lr
         st.w    --sp, ARG6
-        rcall   sys_epoll_pwait
+        call    sys_epoll_pwait
         sub     sp, -4
         popm    pc
 
@@ -115,6 +115,6 @@ __sys_epoll_pwait:
 __sys_sync_file_range:
         pushm   lr
         st.w    --sp, ARG6
-        rcall   sys_sync_file_range
+        call    sys_sync_file_range
         sub     sp, -4
         popm    pc
diff --git a/arch/avr32/lib/strnlen_user.S b/arch/avr32/lib/strnlen_user.S
index 65ce11afa66a..e46f4724962b 100644
--- a/arch/avr32/lib/strnlen_user.S
+++ b/arch/avr32/lib/strnlen_user.S
@@ -48,7 +48,7 @@ adjust_length:
         lddpc   lr, _task_size
         sub     r11, lr, r12
         mov     r9, r11
-        rcall   __strnlen_user
+        call    __strnlen_user
         cp.w    r12, r9
         brgt    1f
         popm    pc
diff --git a/arch/blackfin/include/asm/percpu.h b/arch/blackfin/include/asm/percpu.h
index 797c0c165069..c94c7bc88c71 100644
--- a/arch/blackfin/include/asm/percpu.h
+++ b/arch/blackfin/include/asm/percpu.h
@@ -3,14 +3,4 @@
 
 #include <asm-generic/percpu.h>
 
-#ifdef CONFIG_MODULES
-#define PERCPU_MODULE_RESERVE 8192
-#else
-#define PERCPU_MODULE_RESERVE 0
-#endif
-
-#define PERCPU_ENOUGH_ROOM \
-        (ALIGN(__per_cpu_end - __per_cpu_start, SMP_CACHE_BYTES) + \
-         PERCPU_MODULE_RESERVE)
-
 #endif  /* __ARCH_BLACKFIN_PERCPU__ */
diff --git a/arch/blackfin/include/asm/socket.h b/arch/blackfin/include/asm/socket.h
index 2ca702e44d47..fac7fe9e1f8a 100644
--- a/arch/blackfin/include/asm/socket.h
+++ b/arch/blackfin/include/asm/socket.h
@@ -53,4 +53,7 @@
 
 #define SO_MARK                 36
 
+#define SO_TIMESTAMPING         37
+#define SCM_TIMESTAMPING        SO_TIMESTAMPING
+
 #endif                          /* _ASM_SOCKET_H */
diff --git a/arch/blackfin/include/asm/swab.h b/arch/blackfin/include/asm/swab.h
index 69a051b612bd..6403ad2932eb 100644
--- a/arch/blackfin/include/asm/swab.h
+++ b/arch/blackfin/include/asm/swab.h
@@ -1,7 +1,7 @@
 #ifndef _BLACKFIN_SWAB_H
 #define _BLACKFIN_SWAB_H
 
-#include <asm/types.h>
+#include <linux/types.h>
 #include <linux/compiler.h>
 
 #if defined(__GNUC__) && !defined(__STRICT_ANSI__) || defined(__KERNEL__)
diff --git a/arch/blackfin/kernel/irqchip.c b/arch/blackfin/kernel/irqchip.c
index 7fd126564846..401bd32aa499 100644
--- a/arch/blackfin/kernel/irqchip.c
+++ b/arch/blackfin/kernel/irqchip.c
@@ -70,6 +70,11 @@ static struct irq_desc bad_irq_desc = {
 #endif
 };
 
+#ifdef CONFIG_CPUMASK_OFFSTACK
+/* We are not allocating a variable-sized bad_irq_desc.affinity */
+#error "Blackfin architecture does not support CONFIG_CPUMASK_OFFSTACK."
+#endif
+
 int show_interrupts(struct seq_file *p, void *v)
 {
         int i = *(loff_t *) v, j;
@@ -83,7 +88,7 @@ int show_interrupts(struct seq_file *p, void *v)
                         goto skip;
                 seq_printf(p, "%3d: ", i);
                 for_each_online_cpu(j)
-                        seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
+                        seq_printf(p, "%10u ", kstat_irqs_cpu(i, j));
                 seq_printf(p, " %8s", irq_desc[i].chip->name);
                 seq_printf(p, "  %s", action->name);
                 for (action = action->next; action; action = action->next)
diff --git a/arch/cris/include/asm/socket.h b/arch/cris/include/asm/socket.h
index 9df0ca82f5de..d5cf74005408 100644
--- a/arch/cris/include/asm/socket.h
+++ b/arch/cris/include/asm/socket.h
@@ -56,6 +56,9 @@
 
 #define SO_MARK                 36
 
+#define SO_TIMESTAMPING         37
+#define SCM_TIMESTAMPING        SO_TIMESTAMPING
+
 #endif /* _ASM_SOCKET_H */
 
 
diff --git a/arch/cris/kernel/irq.c b/arch/cris/kernel/irq.c
index 2dfac8c79090..7f642fcffbfc 100644
--- a/arch/cris/kernel/irq.c
+++ b/arch/cris/kernel/irq.c
@@ -66,7 +66,7 @@ int show_interrupts(struct seq_file *p, void *v)
                 seq_printf(p, "%10u ", kstat_irqs(i));
 #else
                 for_each_online_cpu(j)
-                        seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
+                        seq_printf(p, "%10u ", kstat_irqs_cpu(i, j));
 #endif
                 seq_printf(p, " %14s", irq_desc[i].chip->typename);
                 seq_printf(p, "  %s", action->name);
diff --git a/arch/frv/kernel/irq.c b/arch/frv/kernel/irq.c
index 73abae767fdc..af3e824b91b3 100644
--- a/arch/frv/kernel/irq.c
+++ b/arch/frv/kernel/irq.c
@@ -74,7 +74,7 @@ int show_interrupts(struct seq_file *p, void *v)
                 if (action) {
                         seq_printf(p, "%3d: ", i);
                         for_each_present_cpu(cpu)
-                                seq_printf(p, "%10u ", kstat_cpu(cpu).irqs[i]);
+                                seq_printf(p, "%10u ", kstat_irqs_cpu(i, cpu));
                         seq_printf(p, " %10s", irq_desc[i].chip->name ? : "-");
                         seq_printf(p, "  %s", action->name);
                         for (action = action->next;
diff --git a/arch/h8300/include/asm/socket.h b/arch/h8300/include/asm/socket.h
index da2520dbf254..602518a70a1a 100644
--- a/arch/h8300/include/asm/socket.h
+++ b/arch/h8300/include/asm/socket.h
@@ -54,4 +54,7 @@
 
 #define SO_MARK                 36
 
+#define SO_TIMESTAMPING         37
+#define SCM_TIMESTAMPING        SO_TIMESTAMPING
+
 #endif /* _ASM_SOCKET_H */
diff --git a/arch/h8300/include/asm/swab.h b/arch/h8300/include/asm/swab.h
index c108f39b8bc4..39abbf52807d 100644
--- a/arch/h8300/include/asm/swab.h
+++ b/arch/h8300/include/asm/swab.h
@@ -1,7 +1,7 @@
 #ifndef _H8300_SWAB_H
 #define _H8300_SWAB_H
 
-#include <asm/types.h>
+#include <linux/types.h>
 
 #if defined(__GNUC__) && !defined(__STRICT_ANSI__) || defined(__KERNEL__)
 #  define __SWAB_64_THRU_32__
diff --git a/arch/h8300/kernel/irq.c b/arch/h8300/kernel/irq.c
index ef4f0047067d..74f8dd7b34d2 100644
--- a/arch/h8300/kernel/irq.c
+++ b/arch/h8300/kernel/irq.c
@@ -183,7 +183,7 @@ asmlinkage void do_IRQ(int irq)
 #if defined(CONFIG_PROC_FS)
 int show_interrupts(struct seq_file *p, void *v)
 {
-        int i = *(loff_t *) v, j;
+        int i = *(loff_t *) v;
         struct irqaction * action;
         unsigned long flags;
 
@@ -196,7 +196,7 @@ int show_interrupts(struct seq_file *p, void *v)
                 if (!action)
                         goto unlock;
                 seq_printf(p, "%3d: ",i);
-                seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
+                seq_printf(p, "%10u ", kstat_irqs(i));
                 seq_printf(p, " %14s", irq_desc[i].chip->name);
                 seq_printf(p, "-%-8s", irq_desc[i].name);
                 seq_printf(p, "  %s", action->name);
diff --git a/arch/ia64/ia32/ia32_entry.S b/arch/ia64/ia32/ia32_entry.S
index a46f8395e9a5..af9405cd70e5 100644
--- a/arch/ia64/ia32/ia32_entry.S
+++ b/arch/ia64/ia32/ia32_entry.S
@@ -240,7 +240,7 @@ ia32_syscall_table:
         data8 sys_ni_syscall
         data8 sys_umask           /* 60 */
         data8 sys_chroot
-        data8 sys_ustat
+        data8 compat_sys_ustat
         data8 sys_dup2
         data8 sys_getppid
         data8 sys_getpgrp         /* 65 */
diff --git a/arch/ia64/include/asm/fpu.h b/arch/ia64/include/asm/fpu.h
index 3859558ff0a4..0c26157cffa5 100644
--- a/arch/ia64/include/asm/fpu.h
+++ b/arch/ia64/include/asm/fpu.h
@@ -6,8 +6,6 @@
  *      David Mosberger-Tang <davidm@hpl.hp.com>
  */
 
-#include <asm/types.h>
-
 /* floating point status register: */
 #define FPSR_TRAP_VD    (1 << 0)        /* invalid op trap disabled */
 #define FPSR_TRAP_DD    (1 << 1)        /* denormal trap disabled */
diff --git a/arch/ia64/include/asm/gcc_intrin.h b/arch/ia64/include/asm/gcc_intrin.h
index 0f5b55921758..c2c5fd8fcac4 100644
--- a/arch/ia64/include/asm/gcc_intrin.h
+++ b/arch/ia64/include/asm/gcc_intrin.h
@@ -6,6 +6,7 @@
  * Copyright (C) 2002,2003 Suresh Siddha <suresh.b.siddha@intel.com>
  */
 
+#include <linux/types.h>
 #include <linux/compiler.h>
 
 /* define this macro to get some asm stmts included in 'c' files */
diff --git a/arch/ia64/include/asm/intrinsics.h b/arch/ia64/include/asm/intrinsics.h
index a3e44a5ed497..c47830e26cb7 100644
--- a/arch/ia64/include/asm/intrinsics.h
+++ b/arch/ia64/include/asm/intrinsics.h
@@ -10,6 +10,7 @@
 
 #ifndef __ASSEMBLY__
 
+#include <linux/types.h>
 /* include compiler specific intrinsics */
 #include <asm/ia64regs.h>
 #ifdef __INTEL_COMPILER
diff --git a/arch/ia64/include/asm/kvm.h b/arch/ia64/include/asm/kvm.h
index bfa86b6af7cd..18a7e49abbc5 100644
--- a/arch/ia64/include/asm/kvm.h
+++ b/arch/ia64/include/asm/kvm.h
@@ -21,8 +21,7 @@
  *
  */
 
-#include <asm/types.h>
-
+#include <linux/types.h>
 #include <linux/ioctl.h>
 
 /* Select x86 specific features in <linux/kvm.h> */
@@ -166,7 +165,40 @@ struct saved_vpd {
         unsigned long  vcpuid[5];
         unsigned long  vpsr;
         unsigned long  vpr;
-        unsigned long  vcr[128];
+        union {
+                unsigned long  vcr[128];
+                struct {
+                        unsigned long dcr;
+                        unsigned long itm;
+                        unsigned long iva;
+                        unsigned long rsv1[5];
+                        unsigned long pta;
+                        unsigned long rsv2[7];
+                        unsigned long ipsr;
+                        unsigned long isr;
+                        unsigned long rsv3;
+                        unsigned long iip;
+                        unsigned long ifa;
+                        unsigned long itir;
+                        unsigned long iipa;
+                        unsigned long ifs;
+                        unsigned long iim;
+                        unsigned long iha;
+                        unsigned long rsv4[38];
+                        unsigned long lid;
+                        unsigned long ivr;
+                        unsigned long tpr;
+                        unsigned long eoi;
+                        unsigned long irr[4];
+                        unsigned long itv;
+                        unsigned long pmv;
+                        unsigned long cmcv;
+                        unsigned long rsv5[5];
+                        unsigned long lrr0;
+                        unsigned long lrr1;
+                        unsigned long rsv6[46];
+                };
+        };
 };
 
 struct kvm_regs {
@@ -214,4 +246,18 @@ struct kvm_sregs {
 struct kvm_fpu {
 };
 
+#define KVM_IA64_VCPU_STACK_SHIFT       16
+#define KVM_IA64_VCPU_STACK_SIZE        (1UL << KVM_IA64_VCPU_STACK_SHIFT)
+
+struct kvm_ia64_vcpu_stack {
+        unsigned char stack[KVM_IA64_VCPU_STACK_SIZE];
+};
+
+struct kvm_debug_exit_arch {
+};
+
+/* for KVM_SET_GUEST_DEBUG */
+struct kvm_guest_debug_arch {
+};
+
 #endif
diff --git a/arch/ia64/include/asm/kvm_host.h b/arch/ia64/include/asm/kvm_host.h
index 348663661659..4542651e6acb 100644
--- a/arch/ia64/include/asm/kvm_host.h
+++ b/arch/ia64/include/asm/kvm_host.h
@@ -112,7 +112,11 @@
 #define VCPU_STRUCT_SHIFT       16
 #define VCPU_STRUCT_SIZE        (__IA64_UL_CONST(1) << VCPU_STRUCT_SHIFT)
 
-#define KVM_STK_OFFSET          VCPU_STRUCT_SIZE
+/*
+ * This must match KVM_IA64_VCPU_STACK_{SHIFT,SIZE} arch/ia64/include/asm/kvm.h
+ */
+#define KVM_STK_SHIFT           16
+#define KVM_STK_OFFSET          (__IA64_UL_CONST(1)<< KVM_STK_SHIFT)
 
 #define KVM_VM_STRUCT_SHIFT     19
 #define KVM_VM_STRUCT_SIZE      (__IA64_UL_CONST(1) << KVM_VM_STRUCT_SHIFT)
@@ -153,10 +157,10 @@ struct kvm_vm_data {
         struct kvm_vcpu_data vcpu_data[KVM_MAX_VCPUS];
 };
 
-#define VCPU_BASE(n)    KVM_VM_DATA_BASE + \
-                                offsetof(struct kvm_vm_data, vcpu_data[n])
-#define VM_BASE         KVM_VM_DATA_BASE + \
-                                offsetof(struct kvm_vm_data, kvm_vm_struct)
+#define VCPU_BASE(n)    (KVM_VM_DATA_BASE + \
+                                offsetof(struct kvm_vm_data, vcpu_data[n]))
+#define KVM_VM_BASE     (KVM_VM_DATA_BASE + \
+                                offsetof(struct kvm_vm_data, kvm_vm_struct))
 #define KVM_MEM_DIRTY_LOG_BASE  KVM_VM_DATA_BASE + \
                                 offsetof(struct kvm_vm_data, kvm_mem_dirty_log)
 
@@ -235,8 +239,6 @@ struct kvm_vm_data {
 
 struct kvm;
 struct kvm_vcpu;
-struct kvm_guest_debug{
-};
 
 struct kvm_mmio_req {
         uint64_t addr;          /*  physical address            */
@@ -462,6 +464,8 @@ struct kvm_arch {
         unsigned long   metaphysical_rr4;
         unsigned long   vmm_init_rr;
 
+        int             online_vcpus;
+
         struct kvm_ioapic *vioapic;
         struct kvm_vm_stat stat;
         struct kvm_sal_data rdv_sal_data;
diff --git a/arch/ia64/include/asm/msidef.h b/arch/ia64/include/asm/msidef.h
new file mode 100644
index 000000000000..592c1047a0c5
--- /dev/null
+++ b/arch/ia64/include/asm/msidef.h
@@ -0,0 +1,42 @@
+#ifndef _IA64_MSI_DEF_H
+#define _IA64_MSI_DEF_H
+
+/*
+ * Shifts for APIC-based data
+ */
+
+#define     MSI_DATA_VECTOR_SHIFT       0
+#define     MSI_DATA_VECTOR(v)          (((u8)v) << MSI_DATA_VECTOR_SHIFT)
+#define     MSI_DATA_VECTOR_MASK        0xffffff00
+
+#define     MSI_DATA_DELIVERY_MODE_SHIFT        8
+#define     MSI_DATA_DELIVERY_FIXED     (0 << MSI_DATA_DELIVERY_MODE_SHIFT)
+#define     MSI_DATA_DELIVERY_LOWPRI    (1 << MSI_DATA_DELIVERY_MODE_SHIFT)
+
+#define     MSI_DATA_LEVEL_SHIFT        14
+#define     MSI_DATA_LEVEL_DEASSERT     (0 << MSI_DATA_LEVEL_SHIFT)
+#define     MSI_DATA_LEVEL_ASSERT       (1 << MSI_DATA_LEVEL_SHIFT)
+
+#define     MSI_DATA_TRIGGER_SHIFT      15
+#define     MSI_DATA_TRIGGER_EDGE       (0 << MSI_DATA_TRIGGER_SHIFT)
+#define     MSI_DATA_TRIGGER_LEVEL      (1 << MSI_DATA_TRIGGER_SHIFT)
+
+/*
+ * Shift/mask fields for APIC-based bus address
+ */
+
+#define     MSI_ADDR_DEST_ID_SHIFT      4
+#define     MSI_ADDR_HEADER             0xfee00000
+
+#define     MSI_ADDR_DEST_ID_MASK       0xfff0000f
+#define     MSI_ADDR_DEST_ID_CPU(cpu)   ((cpu) << MSI_ADDR_DEST_ID_SHIFT)
+
+#define     MSI_ADDR_DEST_MODE_SHIFT    2
+#define     MSI_ADDR_DEST_MODE_PHYS     (0 << MSI_ADDR_DEST_MODE_SHIFT)
+#define     MSI_ADDR_DEST_MODE_LOGIC    (1 << MSI_ADDR_DEST_MODE_SHIFT)
+
+#define     MSI_ADDR_REDIRECTION_SHIFT  3
+#define     MSI_ADDR_REDIRECTION_CPU    (0 << MSI_ADDR_REDIRECTION_SHIFT)
+#define     MSI_ADDR_REDIRECTION_LOWPRI (1 << MSI_ADDR_REDIRECTION_SHIFT)
+
+#endif/* _IA64_MSI_DEF_H */
diff --git a/arch/ia64/include/asm/percpu.h b/arch/ia64/include/asm/percpu.h
index 77f30b664b4e..30cf46534dd2 100644
--- a/arch/ia64/include/asm/percpu.h
+++ b/arch/ia64/include/asm/percpu.h
@@ -27,12 +27,12 @@ extern void *per_cpu_init(void);
 
 #else /* ! SMP */
 
-#define PER_CPU_ATTRIBUTES      __attribute__((__section__(".data.percpu")))
-
 #define per_cpu_init()                          (__phys_per_cpu_start)
 
 #endif  /* SMP */
 
+#define PER_CPU_BASE_SECTION ".data.percpu"
+
 /*
  * Be extremely careful when taking the address of this variable!  Due to virtual
  * remapping, it is different from the canonical address returned by __get_cpu_var(var)!
diff --git a/arch/ia64/include/asm/socket.h b/arch/ia64/include/asm/socket.h
index d5ef0aa3e312..745421225ec6 100644
--- a/arch/ia64/include/asm/socket.h
+++ b/arch/ia64/include/asm/socket.h
@@ -63,4 +63,7 @@
 
 #define SO_MARK                 36
 
+#define SO_TIMESTAMPING         37
+#define SCM_TIMESTAMPING        SO_TIMESTAMPING
+
 #endif /* _ASM_IA64_SOCKET_H */
diff --git a/arch/ia64/include/asm/swab.h b/arch/ia64/include/asm/swab.h
index 6aa58b699eea..c89a8cb5d8a5 100644
--- a/arch/ia64/include/asm/swab.h
+++ b/arch/ia64/include/asm/swab.h
@@ -6,7 +6,7 @@
  *      David Mosberger-Tang <davidm@hpl.hp.com>, Hewlett-Packard Co.
  */
 
-#include <asm/types.h>
+#include <linux/types.h>
 #include <asm/intrinsics.h>
 #include <linux/compiler.h>
 
diff --git a/arch/ia64/include/asm/topology.h b/arch/ia64/include/asm/topology.h
index 32f3af1641c5..3193f4417e16 100644
--- a/arch/ia64/include/asm/topology.h
+++ b/arch/ia64/include/asm/topology.h
@@ -84,7 +84,7 @@ void build_cpu_to_node_map(void);
         .child                  = NULL,                 \
         .groups                 = NULL,                 \
         .min_interval           = 8,                    \
-        .max_interval           = 8*(min(num_online_cpus(), 32)), \
+        .max_interval           = 8*(min(num_online_cpus(), 32U)), \
         .busy_factor            = 64,                   \
         .imbalance_pct          = 125,                  \
         .cache_nice_tries       = 2,                    \
diff --git a/arch/ia64/include/asm/uv/uv.h b/arch/ia64/include/asm/uv/uv.h
new file mode 100644
index 000000000000..61b5bdfd980e
--- /dev/null
+++ b/arch/ia64/include/asm/uv/uv.h
@@ -0,0 +1,13 @@
+#ifndef _ASM_IA64_UV_UV_H
+#define _ASM_IA64_UV_UV_H
+
+#include <asm/system.h>
+#include <asm/sn/simulator.h>
+
+static inline int is_uv_system(void)
+{
+        /* temporary support for running on hardware simulator */
+        return IS_MEDUSA() || ia64_platform_is("uv");
+}
+
+#endif  /* _ASM_IA64_UV_UV_H */
diff --git a/arch/ia64/kernel/acpi.c b/arch/ia64/kernel/acpi.c
index d541671caf4a..bdef2ce38c8b 100644
--- a/arch/ia64/kernel/acpi.c
+++ b/arch/ia64/kernel/acpi.c
@@ -199,6 +199,10 @@ char *__init __acpi_map_table(unsigned long phys_addr, unsigned long size)
         return __va(phys_addr);
 }
 
+void __init __acpi_unmap_table(char *map, unsigned long size)
+{
+}
+
 /* --------------------------------------------------------------------------
                             Boot-time Table Parsing
    -------------------------------------------------------------------------- */
diff --git a/arch/ia64/kernel/iosapic.c b/arch/ia64/kernel/iosapic.c
index e13125058bed..166e0d839fa0 100644
--- a/arch/ia64/kernel/iosapic.c
+++ b/arch/ia64/kernel/iosapic.c
@@ -880,7 +880,7 @@ iosapic_unregister_intr (unsigned int gsi)
         if (iosapic_intr_info[irq].count == 0) {
 #ifdef CONFIG_SMP
                 /* Clear affinity */
-                cpus_setall(idesc->affinity);
+                cpumask_setall(idesc->affinity);
 #endif
                 /* Clear the interrupt information */
                 iosapic_intr_info[irq].dest = 0;
diff --git a/arch/ia64/kernel/irq.c b/arch/ia64/kernel/irq.c
index a58f64ca9f0e..7429752ef5ad 100644
--- a/arch/ia64/kernel/irq.c
+++ b/arch/ia64/kernel/irq.c
@@ -80,7 +80,7 @@ int show_interrupts(struct seq_file *p, void *v)
                 seq_printf(p, "%10u ", kstat_irqs(i));
 #else
                 for_each_online_cpu(j) {
-                        seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
+                        seq_printf(p, "%10u ", kstat_irqs_cpu(i, j));
                 }
 #endif
                 seq_printf(p, " %14s", irq_desc[i].chip->name);
@@ -103,7 +103,7 @@ static char irq_redir [NR_IRQS]; // = { [0 ... NR_IRQS-1] = 1 };
 void set_irq_affinity_info (unsigned int irq, int hwid, int redir)
 {
         if (irq < NR_IRQS) {
-                cpumask_copy(&irq_desc[irq].affinity,
+                cpumask_copy(irq_desc[irq].affinity,
                              cpumask_of(cpu_logical_id(hwid)));
                 irq_redir[irq] = (char) (redir & 0xff);
         }
@@ -148,7 +148,7 @@ static void migrate_irqs(void)
                 if (desc->status == IRQ_PER_CPU)
                         continue;
 
-                if (cpumask_any_and(&irq_desc[irq].affinity, cpu_online_mask)
+                if (cpumask_any_and(irq_desc[irq].affinity, cpu_online_mask)
                     >= nr_cpu_ids) {
                         /*
                          * Save it for phase 2 processing
diff --git a/arch/ia64/kernel/irq_ia64.c b/arch/ia64/kernel/irq_ia64.c
index 28d3d483db92..acc4d19ae62a 100644
--- a/arch/ia64/kernel/irq_ia64.c
+++ b/arch/ia64/kernel/irq_ia64.c
@@ -493,14 +493,15 @@ ia64_handle_irq (ia64_vector vector, struct pt_regs *regs)
         saved_tpr = ia64_getreg(_IA64_REG_CR_TPR);
         ia64_srlz_d();
         while (vector != IA64_SPURIOUS_INT_VECTOR) {
+                int irq = local_vector_to_irq(vector);
+                struct irq_desc *desc = irq_to_desc(irq);
+
                 if (unlikely(IS_LOCAL_TLB_FLUSH(vector))) {
                         smp_local_flush_tlb();
-                        kstat_this_cpu.irqs[vector]++;
-                } else if (unlikely(IS_RESCHEDULE(vector)))
-                        kstat_this_cpu.irqs[vector]++;
-                else {
-                        int irq = local_vector_to_irq(vector);
-
+                        kstat_incr_irqs_this_cpu(irq, desc);
+                } else if (unlikely(IS_RESCHEDULE(vector))) {
+                        kstat_incr_irqs_this_cpu(irq, desc);
+                } else {
                         ia64_setreg(_IA64_REG_CR_TPR, vector);
                         ia64_srlz_d();
 
@@ -543,22 +544,24 @@ void ia64_process_pending_intr(void)
 
         vector = ia64_get_ivr();
 
-         irq_enter();
-         saved_tpr = ia64_getreg(_IA64_REG_CR_TPR);
-         ia64_srlz_d();
+        irq_enter();
+        saved_tpr = ia64_getreg(_IA64_REG_CR_TPR);
+        ia64_srlz_d();
 
          /*
           * Perform normal interrupt style processing
           */
         while (vector != IA64_SPURIOUS_INT_VECTOR) {
+                int irq = local_vector_to_irq(vector);
+                struct irq_desc *desc = irq_to_desc(irq);
+
                 if (unlikely(IS_LOCAL_TLB_FLUSH(vector))) {
                         smp_local_flush_tlb();
-                        kstat_this_cpu.irqs[vector]++;
-                } else if (unlikely(IS_RESCHEDULE(vector)))
-                        kstat_this_cpu.irqs[vector]++;
-                else {
+                        kstat_incr_irqs_this_cpu(irq, desc);
+                } else if (unlikely(IS_RESCHEDULE(vector))) {
+                        kstat_incr_irqs_this_cpu(irq, desc);
+                } else {
                         struct pt_regs *old_regs = set_irq_regs(NULL);
-                        int irq = local_vector_to_irq(vector);
 
                         ia64_setreg(_IA64_REG_CR_TPR, vector);
                         ia64_srlz_d();
diff --git a/arch/ia64/kernel/msi_ia64.c b/arch/ia64/kernel/msi_ia64.c
index 890339339035..2b15e233f7fe 100644
--- a/arch/ia64/kernel/msi_ia64.c
+++ b/arch/ia64/kernel/msi_ia64.c
@@ -7,44 +7,7 @@
 #include <linux/msi.h>
 #include <linux/dmar.h>
 #include <asm/smp.h>
-
-/*
- * Shifts for APIC-based data
- */
-
-#define MSI_DATA_VECTOR_SHIFT           0
-#define     MSI_DATA_VECTOR(v)          (((u8)v) << MSI_DATA_VECTOR_SHIFT)
-#define MSI_DATA_VECTOR_MASK            0xffffff00
-
-#define MSI_DATA_DELIVERY_SHIFT         8
-#define     MSI_DATA_DELIVERY_FIXED     (0 << MSI_DATA_DELIVERY_SHIFT)
-#define     MSI_DATA_DELIVERY_LOWPRI    (1 << MSI_DATA_DELIVERY_SHIFT)
-
-#define MSI_DATA_LEVEL_SHIFT            14
-#define     MSI_DATA_LEVEL_DEASSERT     (0 << MSI_DATA_LEVEL_SHIFT)
-#define     MSI_DATA_LEVEL_ASSERT       (1 << MSI_DATA_LEVEL_SHIFT)
-
-#define MSI_DATA_TRIGGER_SHIFT          15
-#define     MSI_DATA_TRIGGER_EDGE       (0 << MSI_DATA_TRIGGER_SHIFT)
-#define     MSI_DATA_TRIGGER_LEVEL      (1 << MSI_DATA_TRIGGER_SHIFT)
-
-/*
- * Shift/mask fields for APIC-based bus address
- */
-
-#define MSI_TARGET_CPU_SHIFT            4
-#define MSI_ADDR_HEADER                 0xfee00000
-
-#define MSI_ADDR_DESTID_MASK            0xfff0000f
-#define     MSI_ADDR_DESTID_CPU(cpu)    ((cpu) << MSI_TARGET_CPU_SHIFT)
-
-#define MSI_ADDR_DESTMODE_SHIFT         2
-#define     MSI_ADDR_DESTMODE_PHYS      (0 << MSI_ADDR_DESTMODE_SHIFT)
-#define     MSI_ADDR_DESTMODE_LOGIC     (1 << MSI_ADDR_DESTMODE_SHIFT)
-
-#define MSI_ADDR_REDIRECTION_SHIFT      3
-#define     MSI_ADDR_REDIRECTION_CPU    (0 << MSI_ADDR_REDIRECTION_SHIFT)
-#define     MSI_ADDR_REDIRECTION_LOWPRI (1 << MSI_ADDR_REDIRECTION_SHIFT)
+#include <asm/msidef.h>
 
 static struct irq_chip  ia64_msi_chip;
 
@@ -65,8 +28,8 @@ static void ia64_set_msi_irq_affinity(unsigned int irq,
         read_msi_msg(irq, &msg);
 
         addr = msg.address_lo;
-        addr &= MSI_ADDR_DESTID_MASK;
-        addr |= MSI_ADDR_DESTID_CPU(cpu_physical_id(cpu));
+        addr &= MSI_ADDR_DEST_ID_MASK;
+        addr |= MSI_ADDR_DEST_ID_CPU(cpu_physical_id(cpu));
         msg.address_lo = addr;
 
         data = msg.data;
@@ -75,7 +38,7 @@ static void ia64_set_msi_irq_affinity(unsigned int irq,
         msg.data = data;
 
         write_msi_msg(irq, &msg);
-        irq_desc[irq].affinity = cpumask_of_cpu(cpu);
+        cpumask_copy(irq_desc[irq].affinity, cpumask_of(cpu));
 }
 #endif /* CONFIG_SMP */
 
@@ -98,9 +61,9 @@ int ia64_setup_msi_irq(struct pci_dev *pdev, struct msi_desc *desc)
         msg.address_hi = 0;
         msg.address_lo =
                 MSI_ADDR_HEADER |
-                MSI_ADDR_DESTMODE_PHYS |
+                MSI_ADDR_DEST_MODE_PHYS |
                 MSI_ADDR_REDIRECTION_CPU |
-                MSI_ADDR_DESTID_CPU(dest_phys_id);
+                MSI_ADDR_DEST_ID_CPU(dest_phys_id);
 
         msg.data =
                 MSI_DATA_TRIGGER_EDGE |
@@ -183,11 +146,11 @@ static void dmar_msi_set_affinity(unsigned int irq, const struct cpumask *mask)
 
         msg.data &= ~MSI_DATA_VECTOR_MASK;
         msg.data |= MSI_DATA_VECTOR(cfg->vector);
-        msg.address_lo &= ~MSI_ADDR_DESTID_MASK;
-        msg.address_lo |= MSI_ADDR_DESTID_CPU(cpu_physical_id(cpu));
+        msg.address_lo &= ~MSI_ADDR_DEST_ID_MASK;
+        msg.address_lo |= MSI_ADDR_DEST_ID_CPU(cpu_physical_id(cpu));
 
         dmar_msi_write(irq, &msg);
-        irq_desc[irq].affinity = *mask;
+        cpumask_copy(irq_desc[irq].affinity, mask);
 }
 #endif /* CONFIG_SMP */
 
@@ -215,9 +178,9 @@ msi_compose_msg(struct pci_dev *pdev, unsigned int irq, struct msi_msg *msg)
         msg->address_hi = 0;
         msg->address_lo =
                 MSI_ADDR_HEADER |
-                MSI_ADDR_DESTMODE_PHYS |
+                MSI_ADDR_DEST_MODE_PHYS |
                 MSI_ADDR_REDIRECTION_CPU |
-                MSI_ADDR_DESTID_CPU(dest);
+                MSI_ADDR_DEST_ID_CPU(dest);
 
         msg->data =
                 MSI_DATA_TRIGGER_EDGE |
diff --git a/arch/ia64/kernel/perfmon.c b/arch/ia64/kernel/perfmon.c
index 0e499757309b..5c0f408cfd71 100644
--- a/arch/ia64/kernel/perfmon.c
+++ b/arch/ia64/kernel/perfmon.c
@@ -2196,7 +2196,7 @@ pfmfs_delete_dentry(struct dentry *dentry)
         return 1;
 }
 
-static struct dentry_operations pfmfs_dentry_operations = {
+static const struct dentry_operations pfmfs_dentry_operations = {
         .d_delete = pfmfs_delete_dentry,
 };
 
diff --git a/arch/ia64/kernel/vmlinux.lds.S b/arch/ia64/kernel/vmlinux.lds.S
index 10a7d47e8510..3765efc5f963 100644
--- a/arch/ia64/kernel/vmlinux.lds.S
+++ b/arch/ia64/kernel/vmlinux.lds.S
@@ -213,16 +213,9 @@ SECTIONS
         { *(.data.cacheline_aligned) }
 
   /* Per-cpu data: */
-  percpu : { } :percpu
   . = ALIGN(PERCPU_PAGE_SIZE);
-  __phys_per_cpu_start = .;
-  .data.percpu PERCPU_ADDR : AT(__phys_per_cpu_start - LOAD_OFFSET)
-        {
-                __per_cpu_start = .;
-                *(.data.percpu)
-                *(.data.percpu.shared_aligned)
-                __per_cpu_end = .;
-        }
+  PERCPU_VADDR(PERCPU_ADDR, :percpu)
+  __phys_per_cpu_start = __per_cpu_load;
   . = __phys_per_cpu_start + PERCPU_PAGE_SIZE;  /* ensure percpu data fits
                                                  * into percpu page size
                                                  */
diff --git a/arch/ia64/kvm/Kconfig b/arch/ia64/kvm/Kconfig
index f833a0b4188d..0a2d6b86075a 100644
--- a/arch/ia64/kvm/Kconfig
+++ b/arch/ia64/kvm/Kconfig
@@ -4,6 +4,10 @@
 config HAVE_KVM
         bool
 
+config HAVE_KVM_IRQCHIP
+       bool
+       default y
+
 menuconfig VIRTUALIZATION
         bool "Virtualization"
         depends on HAVE_KVM || IA64
diff --git a/arch/ia64/kvm/irq.h b/arch/ia64/kvm/irq.h
index c6786e8b1bf4..c0785a728271 100644
--- a/arch/ia64/kvm/irq.h
+++ b/arch/ia64/kvm/irq.h
@@ -23,6 +23,8 @@
 #ifndef __IRQ_H
 #define __IRQ_H
 
+#include "lapic.h"
+
 static inline int irqchip_in_kernel(struct kvm *kvm)
 {
         return 1;
diff --git a/arch/ia64/kvm/kvm-ia64.c b/arch/ia64/kvm/kvm-ia64.c
index 28f982045f29..076b00d1dbff 100644
--- a/arch/ia64/kvm/kvm-ia64.c
+++ b/arch/ia64/kvm/kvm-ia64.c
@@ -182,7 +182,7 @@ int kvm_dev_ioctl_check_extension(long ext)
         switch (ext) {
         case KVM_CAP_IRQCHIP:
         case KVM_CAP_MP_STATE:
-
+        case KVM_CAP_IRQ_INJECT_STATUS:
                 r = 1;
                 break;
         case KVM_CAP_COALESCED_MMIO:
@@ -314,7 +314,7 @@ static struct kvm_vcpu *lid_to_vcpu(struct kvm *kvm, unsigned long id,
         union ia64_lid lid;
         int i;
 
-        for (i = 0; i < KVM_MAX_VCPUS; i++) {
+        for (i = 0; i < kvm->arch.online_vcpus; i++) {
                 if (kvm->vcpus[i]) {
                         lid.val = VCPU_LID(kvm->vcpus[i]);
                         if (lid.id == id && lid.eid == eid)
@@ -388,7 +388,7 @@ static int handle_global_purge(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
 
         call_data.ptc_g_data = p->u.ptc_g_data;
 
-        for (i = 0; i < KVM_MAX_VCPUS; i++) {
+        for (i = 0; i < kvm->arch.online_vcpus; i++) {
                 if (!kvm->vcpus[i] || kvm->vcpus[i]->arch.mp_state ==
                                                 KVM_MP_STATE_UNINITIALIZED ||
                                         vcpu == kvm->vcpus[i])
@@ -788,6 +788,8 @@ struct  kvm *kvm_arch_create_vm(void)
                 return ERR_PTR(-ENOMEM);
         kvm_init_vm(kvm);
 
+        kvm->arch.online_vcpus = 0;
+
         return kvm;
 
 }
@@ -919,7 +921,13 @@ long kvm_arch_vm_ioctl(struct file *filp,
                 r = kvm_ioapic_init(kvm);
                 if (r)
                         goto out;
+                r = kvm_setup_default_irq_routing(kvm);
+                if (r) {
+                        kfree(kvm->arch.vioapic);
+                        goto out;
+                }
                 break;
+        case KVM_IRQ_LINE_STATUS:
         case KVM_IRQ_LINE: {
                 struct kvm_irq_level irq_event;
 
@@ -927,10 +935,17 @@ long kvm_arch_vm_ioctl(struct file *filp,
                 if (copy_from_user(&irq_event, argp, sizeof irq_event))
                         goto out;
                 if (irqchip_in_kernel(kvm)) {
+                        __s32 status;
                         mutex_lock(&kvm->lock);
-                        kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
+                        status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
                                     irq_event.irq, irq_event.level);
                         mutex_unlock(&kvm->lock);
+                        if (ioctl == KVM_IRQ_LINE_STATUS) {
+                                irq_event.status = status;
+                                if (copy_to_user(argp, &irq_event,
+                                                        sizeof irq_event))
+                                        goto out;
+                        }
                         r = 0;
                 }
                 break;
@@ -1149,7 +1164,7 @@ int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
 
                 /*Initialize itc offset for vcpus*/
                 itc_offset = 0UL - ia64_getreg(_IA64_REG_AR_ITC);
-                for (i = 0; i < KVM_MAX_VCPUS; i++) {
+                for (i = 0; i < kvm->arch.online_vcpus; i++) {
                         v = (struct kvm_vcpu *)((char *)vcpu +
                                         sizeof(struct kvm_vcpu_data) * i);
                         v->arch.itc_offset = itc_offset;
@@ -1283,6 +1298,8 @@ struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
                 goto fail;
         }
 
+        kvm->arch.online_vcpus++;
+
         return vcpu;
 fail:
         return ERR_PTR(r);
@@ -1303,8 +1320,8 @@ int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
         return -EINVAL;
 }
 
-int kvm_arch_vcpu_ioctl_debug_guest(struct kvm_vcpu *vcpu,
-                struct kvm_debug_guest *dbg)
+int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
+                                        struct kvm_guest_debug *dbg)
 {
         return -EINVAL;
 }
@@ -1421,6 +1438,23 @@ int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
         return 0;
 }
 
+int kvm_arch_vcpu_ioctl_get_stack(struct kvm_vcpu *vcpu,
+                                  struct kvm_ia64_vcpu_stack *stack)
+{
+        memcpy(stack, vcpu, sizeof(struct kvm_ia64_vcpu_stack));
+        return 0;
+}
+
+int kvm_arch_vcpu_ioctl_set_stack(struct kvm_vcpu *vcpu,
+                                  struct kvm_ia64_vcpu_stack *stack)
+{
+        memcpy(vcpu + 1, &stack->stack[0] + sizeof(struct kvm_vcpu),
+               sizeof(struct kvm_ia64_vcpu_stack) - sizeof(struct kvm_vcpu));
+
+        vcpu->arch.exit_data = ((struct kvm_vcpu *)stack)->arch.exit_data;
+        return 0;
+}
+
 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
 {
 
@@ -1430,9 +1464,78 @@ void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
 
 
 long kvm_arch_vcpu_ioctl(struct file *filp,
-                unsigned int ioctl, unsigned long arg)
+                         unsigned int ioctl, unsigned long arg)
 {
-        return -EINVAL;
+        struct kvm_vcpu *vcpu = filp->private_data;
+        void __user *argp = (void __user *)arg;
+        struct kvm_ia64_vcpu_stack *stack = NULL;
+        long r;
+
+        switch (ioctl) {
+        case KVM_IA64_VCPU_GET_STACK: {
+                struct kvm_ia64_vcpu_stack __user *user_stack;
+                void __user *first_p = argp;
+
+                r = -EFAULT;
+                if (copy_from_user(&user_stack, first_p, sizeof(void *)))
+                        goto out;
+
+                if (!access_ok(VERIFY_WRITE, user_stack,
+                               sizeof(struct kvm_ia64_vcpu_stack))) {
+                        printk(KERN_INFO "KVM_IA64_VCPU_GET_STACK: "
+                               "Illegal user destination address for stack\n");
+                        goto out;
+                }
+                stack = kzalloc(sizeof(struct kvm_ia64_vcpu_stack), GFP_KERNEL);
+                if (!stack) {
+                        r = -ENOMEM;
+                        goto out;
+                }
+
+                r = kvm_arch_vcpu_ioctl_get_stack(vcpu, stack);
+                if (r)
+                        goto out;
+
+                if (copy_to_user(user_stack, stack,
+                                 sizeof(struct kvm_ia64_vcpu_stack)))
+                        goto out;
+
+                break;
+        }
+        case KVM_IA64_VCPU_SET_STACK: {
+                struct kvm_ia64_vcpu_stack __user *user_stack;
+                void __user *first_p = argp;
+
+                r = -EFAULT;
+                if (copy_from_user(&user_stack, first_p, sizeof(void *)))
+                        goto out;
+
+                if (!access_ok(VERIFY_READ, user_stack,
+                            sizeof(struct kvm_ia64_vcpu_stack))) {
+                        printk(KERN_INFO "KVM_IA64_VCPU_SET_STACK: "
+                               "Illegal user address for stack\n");
+                        goto out;
+                }
+                stack = kmalloc(sizeof(struct kvm_ia64_vcpu_stack), GFP_KERNEL);
+                if (!stack) {
+                        r = -ENOMEM;
+                        goto out;
+                }
+                if (copy_from_user(stack, user_stack,
+                                   sizeof(struct kvm_ia64_vcpu_stack)))
+                        goto out;
+
+                r = kvm_arch_vcpu_ioctl_set_stack(vcpu, stack);
+                break;
+        }
+
+        default:
+                r = -EINVAL;
+        }
+
+out:
+        kfree(stack);
+        return r;
 }
 
 int kvm_arch_set_memory_region(struct kvm *kvm,
@@ -1472,7 +1575,7 @@ void kvm_arch_flush_shadow(struct kvm *kvm)
 }
 
 long kvm_arch_dev_ioctl(struct file *filp,
-                unsigned int ioctl, unsigned long arg)
+                        unsigned int ioctl, unsigned long arg)
 {
         return -EINVAL;
 }
@@ -1737,7 +1840,7 @@ struct kvm_vcpu *kvm_get_lowest_prio_vcpu(struct kvm *kvm, u8 vector,
         struct kvm_vcpu *lvcpu = kvm->vcpus[0];
         int i;
 
-        for (i = 1; i < KVM_MAX_VCPUS; i++) {
+        for (i = 1; i < kvm->arch.online_vcpus; i++) {
                 if (!kvm->vcpus[i])
                         continue;
                 if (lvcpu->arch.xtp > kvm->vcpus[i]->arch.xtp)
diff --git a/arch/ia64/kvm/kvm_fw.c b/arch/ia64/kvm/kvm_fw.c
index cb7600bdff9d..a8ae52ed5635 100644
--- a/arch/ia64/kvm/kvm_fw.c
+++ b/arch/ia64/kvm/kvm_fw.c
@@ -227,6 +227,18 @@ static struct ia64_pal_retval pal_proc_get_features(struct kvm_vcpu *vcpu)
         return result;
 }
 
+static struct ia64_pal_retval pal_register_info(struct kvm_vcpu *vcpu)
+{
+
+        struct ia64_pal_retval result = {0, 0, 0, 0};
+        long in0, in1, in2, in3;
+
+        kvm_get_pal_call_data(vcpu, &in0, &in1, &in2, &in3);
+        result.status = ia64_pal_register_info(in1, &result.v1, &result.v2);
+
+        return result;
+}
+
 static struct ia64_pal_retval pal_cache_info(struct kvm_vcpu *vcpu)
 {
 
@@ -268,8 +280,12 @@ static struct ia64_pal_retval pal_vm_summary(struct kvm_vcpu *vcpu)
 static struct ia64_pal_retval pal_vm_info(struct kvm_vcpu *vcpu)
 {
         struct ia64_pal_retval result;
+        unsigned long in0, in1, in2, in3;
 
-        INIT_PAL_STATUS_UNIMPLEMENTED(result);
+        kvm_get_pal_call_data(vcpu, &in0, &in1, &in2, &in3);
+
+        result.status = ia64_pal_vm_info(in1, in2,
+                        (pal_tc_info_u_t *)&result.v1, &result.v2);
 
         return result;
 }
@@ -292,6 +308,108 @@ static void prepare_for_halt(struct kvm_vcpu *vcpu)
         vcpu->arch.timer_fired = 0;
 }
 
+static struct ia64_pal_retval pal_perf_mon_info(struct kvm_vcpu *vcpu)
+{
+        long status;
+        unsigned long in0, in1, in2, in3, r9;
+        unsigned long pm_buffer[16];
+
+        kvm_get_pal_call_data(vcpu, &in0, &in1, &in2, &in3);
+        status = ia64_pal_perf_mon_info(pm_buffer,
+                                (pal_perf_mon_info_u_t *) &r9);
+        if (status != 0) {
+                printk(KERN_DEBUG"PAL_PERF_MON_INFO fails ret=%ld\n", status);
+        } else {
+                if (in1)
+                        memcpy((void *)in1, pm_buffer, sizeof(pm_buffer));
+                else {
+                        status = PAL_STATUS_EINVAL;
+                        printk(KERN_WARNING"Invalid parameters "
+                                                "for PAL call:0x%lx!\n", in0);
+                }
+        }
+        return (struct ia64_pal_retval){status, r9, 0, 0};
+}
+
+static struct ia64_pal_retval pal_halt_info(struct kvm_vcpu *vcpu)
+{
+        unsigned long in0, in1, in2, in3;
+        long status;
+        unsigned long res = 1000UL | (1000UL << 16) | (10UL << 32)
+                                        | (1UL << 61) | (1UL << 60);
+
+        kvm_get_pal_call_data(vcpu, &in0, &in1, &in2, &in3);
+        if (in1) {
+                memcpy((void *)in1, &res, sizeof(res));
+                status = 0;
+        } else{
+                status = PAL_STATUS_EINVAL;
+                printk(KERN_WARNING"Invalid parameters "
+                                        "for PAL call:0x%lx!\n", in0);
+        }
+
+        return (struct ia64_pal_retval){status, 0, 0, 0};
+}
+
+static struct ia64_pal_retval pal_mem_attrib(struct kvm_vcpu *vcpu)
+{
+        unsigned long r9;
+        long status;
+
+        status = ia64_pal_mem_attrib(&r9);
+
+        return (struct ia64_pal_retval){status, r9, 0, 0};
+}
+
+static void remote_pal_prefetch_visibility(void *v)
+{
+        s64 trans_type = (s64)v;
+        ia64_pal_prefetch_visibility(trans_type);
+}
+
+static struct ia64_pal_retval pal_prefetch_visibility(struct kvm_vcpu *vcpu)
+{
+        struct ia64_pal_retval result = {0, 0, 0, 0};
+        unsigned long in0, in1, in2, in3;
+        kvm_get_pal_call_data(vcpu, &in0, &in1, &in2, &in3);
+        result.status = ia64_pal_prefetch_visibility(in1);
+        if (result.status == 0) {
+                /* Must be performed on all remote processors
+                in the coherence domain. */
+                smp_call_function(remote_pal_prefetch_visibility,
+                                        (void *)in1, 1);
+                /* Unnecessary on remote processor for other vcpus!*/
+                result.status = 1;
+        }
+        return result;
+}
+
+static void remote_pal_mc_drain(void *v)
+{
+        ia64_pal_mc_drain();
+}
+
+static struct ia64_pal_retval pal_get_brand_info(struct kvm_vcpu *vcpu)
+{
+        struct ia64_pal_retval result = {0, 0, 0, 0};
+        unsigned long in0, in1, in2, in3;
+
+        kvm_get_pal_call_data(vcpu, &in0, &in1, &in2, &in3);
+
+        if (in1 == 0 && in2) {
+                char brand_info[128];
+                result.status = ia64_pal_get_brand_info(brand_info);
+                if (result.status == PAL_STATUS_SUCCESS)
+                        memcpy((void *)in2, brand_info, 128);
+        } else {
+                result.status = PAL_STATUS_REQUIRES_MEMORY;
+                printk(KERN_WARNING"Invalid parameters for "
+                                        "PAL call:0x%lx!\n", in0);
+        }
+
+        return result;
+}
+
 int kvm_pal_emul(struct kvm_vcpu *vcpu, struct kvm_run *run)
 {
 
@@ -300,14 +418,22 @@ int kvm_pal_emul(struct kvm_vcpu *vcpu, struct kvm_run *run)
         int ret = 1;
 
         gr28 = kvm_get_pal_call_index(vcpu);
-        /*printk("pal_call index:%lx\n",gr28);*/
         switch (gr28) {
         case PAL_CACHE_FLUSH:
                 result = pal_cache_flush(vcpu);
                 break;
+        case PAL_MEM_ATTRIB:
+                result = pal_mem_attrib(vcpu);
+                break;
         case PAL_CACHE_SUMMARY:
                 result = pal_cache_summary(vcpu);
                 break;
+        case PAL_PERF_MON_INFO:
+                result = pal_perf_mon_info(vcpu);
+                break;
+        case PAL_HALT_INFO:
+                result = pal_halt_info(vcpu);
+                break;
         case PAL_HALT_LIGHT:
         {
                 INIT_PAL_STATUS_SUCCESS(result);
@@ -317,6 +443,16 @@ int kvm_pal_emul(struct kvm_vcpu *vcpu, struct kvm_run *run)
         }
                 break;
 
+        case PAL_PREFETCH_VISIBILITY:
+                result = pal_prefetch_visibility(vcpu);
+                break;
+        case PAL_MC_DRAIN:
+                result.status = ia64_pal_mc_drain();
+                /* FIXME: All vcpus likely call PAL_MC_DRAIN.
+                   That causes the congestion. */
+                smp_call_function(remote_pal_mc_drain, NULL, 1);
+                break;
+
         case PAL_FREQ_RATIOS:
                 result = pal_freq_ratios(vcpu);
                 break;
@@ -346,6 +482,9 @@ int kvm_pal_emul(struct kvm_vcpu *vcpu, struct kvm_run *run)
                 INIT_PAL_STATUS_SUCCESS(result);
                 result.v1 = (1L << 32) | 1L;
                 break;
+        case PAL_REGISTER_INFO:
+                result = pal_register_info(vcpu);
+                break;
         case PAL_VM_PAGE_SIZE:
                 result.status = ia64_pal_vm_page_size(&result.v0,
                                                         &result.v1);
@@ -365,12 +504,18 @@ int kvm_pal_emul(struct kvm_vcpu *vcpu, struct kvm_run *run)
                 result.status = ia64_pal_version(
                                 (pal_version_u_t *)&result.v0,
                                 (pal_version_u_t *)&result.v1);
-
                 break;
         case PAL_FIXED_ADDR:
                 result.status = PAL_STATUS_SUCCESS;
                 result.v0 = vcpu->vcpu_id;
                 break;
+        case PAL_BRAND_INFO:
+                result = pal_get_brand_info(vcpu);
+                break;
+        case PAL_GET_PSTATE:
+        case PAL_CACHE_SHARED_INFO:
+                INIT_PAL_STATUS_UNIMPLEMENTED(result);
+                break;
         default:
                 INIT_PAL_STATUS_UNIMPLEMENTED(result);
                 printk(KERN_WARNING"kvm: Unsupported pal call,"
diff --git a/arch/ia64/kvm/process.c b/arch/ia64/kvm/process.c
index 230eae482f32..b1dc80952d91 100644
--- a/arch/ia64/kvm/process.c
+++ b/arch/ia64/kvm/process.c
@@ -167,7 +167,6 @@ static u64 vcpu_get_itir_on_fault(struct kvm_vcpu *vcpu, u64 ifa)
         return (rr1.val);
 }
 
-
 /*
  * Set vIFA & vITIR & vIHA, when vPSR.ic =1
  * Parameter:
@@ -222,8 +221,6 @@ void itlb_fault(struct kvm_vcpu *vcpu, u64 vadr)
         inject_guest_interruption(vcpu, IA64_INST_TLB_VECTOR);
 }
 
-
-
 /*
  * Data Nested TLB Fault
  *  @ Data Nested TLB Vector
@@ -245,7 +242,6 @@ void alt_dtlb(struct kvm_vcpu *vcpu, u64 vadr)
         inject_guest_interruption(vcpu, IA64_ALT_DATA_TLB_VECTOR);
 }
 
-
 /*
  * Data TLB Fault
  *  @ Data TLB vector
@@ -265,8 +261,6 @@ static void _vhpt_fault(struct kvm_vcpu *vcpu, u64 vadr)
         /* If vPSR.ic, IFA, ITIR, IHA*/
         set_ifa_itir_iha(vcpu, vadr, 1, 1, 1);
         inject_guest_interruption(vcpu, IA64_VHPT_TRANS_VECTOR);
-
-
 }
 
 /*
@@ -279,7 +273,6 @@ void ivhpt_fault(struct kvm_vcpu *vcpu, u64 vadr)
         _vhpt_fault(vcpu, vadr);
 }
 
-
 /*
  * VHPT Data Fault
  *  @ VHPT Translation vector
@@ -290,8 +283,6 @@ void dvhpt_fault(struct kvm_vcpu *vcpu, u64 vadr)
         _vhpt_fault(vcpu, vadr);
 }
 
-
-
 /*
  * Deal with:
  *  General Exception vector
@@ -301,7 +292,6 @@ void _general_exception(struct kvm_vcpu *vcpu)
         inject_guest_interruption(vcpu, IA64_GENEX_VECTOR);
 }
 
-
 /*
  * Illegal Operation Fault
  *  @ General Exception Vector
@@ -419,19 +409,16 @@ static void __page_not_present(struct kvm_vcpu *vcpu, u64 vadr)
         inject_guest_interruption(vcpu, IA64_PAGE_NOT_PRESENT_VECTOR);
 }
 
-
 void data_page_not_present(struct kvm_vcpu *vcpu, u64 vadr)
 {
         __page_not_present(vcpu, vadr);
 }
 
-
 void inst_page_not_present(struct kvm_vcpu *vcpu, u64 vadr)
 {
         __page_not_present(vcpu, vadr);
 }
 
-
 /* Deal with
  *  Data access rights vector
  */
@@ -563,22 +550,64 @@ void reflect_interruption(u64 ifa, u64 isr, u64 iim,
         inject_guest_interruption(vcpu, vector);
 }
 
+static unsigned long kvm_trans_pal_call_args(struct kvm_vcpu *vcpu,
+                                                unsigned long arg)
+{
+        struct thash_data *data;
+        unsigned long gpa, poff;
+
+        if (!is_physical_mode(vcpu)) {
+                /* Depends on caller to provide the DTR or DTC mapping.*/
+                data = vtlb_lookup(vcpu, arg, D_TLB);
+                if (data)
+                        gpa = data->page_flags & _PAGE_PPN_MASK;
+                else {
+                        data = vhpt_lookup(arg);
+                        if (!data)
+                                return 0;
+                        gpa = data->gpaddr & _PAGE_PPN_MASK;
+                }
+
+                poff = arg & (PSIZE(data->ps) - 1);
+                arg = PAGEALIGN(gpa, data->ps) | poff;
+        }
+        arg = kvm_gpa_to_mpa(arg << 1 >> 1);
+
+        return (unsigned long)__va(arg);
+}
+
 static void set_pal_call_data(struct kvm_vcpu *vcpu)
 {
         struct exit_ctl_data *p = &vcpu->arch.exit_data;
+        unsigned long gr28 = vcpu_get_gr(vcpu, 28);
+        unsigned long gr29 = vcpu_get_gr(vcpu, 29);
+        unsigned long gr30 = vcpu_get_gr(vcpu, 30);
 
         /*FIXME:For static and stacked convention, firmware
          * has put the parameters in gr28-gr31 before
          * break to vmm  !!*/
 
-        p->u.pal_data.gr28 = vcpu_get_gr(vcpu, 28);
-        p->u.pal_data.gr29 = vcpu_get_gr(vcpu, 29);
-        p->u.pal_data.gr30 = vcpu_get_gr(vcpu, 30);
+        switch (gr28) {
+        case PAL_PERF_MON_INFO:
+        case PAL_HALT_INFO:
+                p->u.pal_data.gr29 =  kvm_trans_pal_call_args(vcpu, gr29);
+                p->u.pal_data.gr30 = vcpu_get_gr(vcpu, 30);
+                break;
+        case PAL_BRAND_INFO:
+                p->u.pal_data.gr29 = gr29;;
+                p->u.pal_data.gr30 = kvm_trans_pal_call_args(vcpu, gr30);
+                break;
+        default:
+                p->u.pal_data.gr29 = gr29;;
+                p->u.pal_data.gr30 = vcpu_get_gr(vcpu, 30);
+        }
+        p->u.pal_data.gr28 = gr28;
         p->u.pal_data.gr31 = vcpu_get_gr(vcpu, 31);
+
         p->exit_reason = EXIT_REASON_PAL_CALL;
 }
 
-static void set_pal_call_result(struct kvm_vcpu *vcpu)
+static void get_pal_call_result(struct kvm_vcpu *vcpu)
 {
         struct exit_ctl_data *p = &vcpu->arch.exit_data;
 
@@ -606,7 +635,7 @@ static void set_sal_call_data(struct kvm_vcpu *vcpu)
         p->exit_reason = EXIT_REASON_SAL_CALL;
 }
 
-static void set_sal_call_result(struct kvm_vcpu *vcpu)
+static void get_sal_call_result(struct kvm_vcpu *vcpu)
 {
         struct exit_ctl_data *p = &vcpu->arch.exit_data;
 
@@ -629,13 +658,13 @@ void  kvm_ia64_handle_break(unsigned long ifa, struct kvm_pt_regs *regs,
                 if (iim == DOMN_PAL_REQUEST) {
                         set_pal_call_data(v);
                         vmm_transition(v);
-                        set_pal_call_result(v);
+                        get_pal_call_result(v);
                         vcpu_increment_iip(v);
                         return;
                 } else if (iim == DOMN_SAL_REQUEST) {
                         set_sal_call_data(v);
                         vmm_transition(v);
-                        set_sal_call_result(v);
+                        get_sal_call_result(v);
                         vcpu_increment_iip(v);
                         return;
                 }
@@ -703,7 +732,6 @@ void vhpi_detection(struct kvm_vcpu *vcpu)
         }
 }
 
-
 void leave_hypervisor_tail(void)
 {
         struct kvm_vcpu *v = current_vcpu;
@@ -737,7 +765,6 @@ void leave_hypervisor_tail(void)
         }
 }
 
-
 static inline void handle_lds(struct kvm_pt_regs *regs)
 {
         regs->cr_ipsr |= IA64_PSR_ED;
diff --git a/arch/ia64/kvm/vcpu.c b/arch/ia64/kvm/vcpu.c
index ecd526b55323..d4d280505878 100644
--- a/arch/ia64/kvm/vcpu.c
+++ b/arch/ia64/kvm/vcpu.c
@@ -112,7 +112,6 @@ void switch_to_physical_rid(struct kvm_vcpu *vcpu)
         return;
 }
 
-
 void switch_to_virtual_rid(struct kvm_vcpu *vcpu)
 {
         unsigned long psr;
@@ -166,8 +165,6 @@ void switch_mm_mode(struct kvm_vcpu *vcpu, struct ia64_psr old_psr,
         return;
 }
 
-
-
 /*
  * In physical mode, insert tc/tr for region 0 and 4 uses
  * RID[0] and RID[4] which is for physical mode emulation.
@@ -269,7 +266,6 @@ static inline unsigned long fph_index(struct kvm_pt_regs *regs,
         return rotate_reg(96, rrb_fr, (regnum - IA64_FIRST_ROTATING_FR));
 }
 
-
 /*
  * The inverse of the above: given bspstore and the number of
  * registers, calculate ar.bsp.
@@ -811,12 +807,15 @@ static inline void vcpu_set_itm(struct kvm_vcpu *vcpu, u64 val);
 static void vcpu_set_itc(struct kvm_vcpu *vcpu, u64 val)
 {
         struct kvm_vcpu *v;
+        struct kvm *kvm;
         int i;
         long itc_offset = val - ia64_getreg(_IA64_REG_AR_ITC);
         unsigned long vitv = VCPU(vcpu, itv);
 
+        kvm = (struct kvm *)KVM_VM_BASE;
+
         if (vcpu->vcpu_id == 0) {
-                for (i = 0; i < KVM_MAX_VCPUS; i++) {
+                for (i = 0; i < kvm->arch.online_vcpus; i++) {
                         v = (struct kvm_vcpu *)((char *)vcpu +
                                         sizeof(struct kvm_vcpu_data) * i);
                         VMX(v, itc_offset) = itc_offset;
@@ -1039,8 +1038,6 @@ u64 vcpu_tak(struct kvm_vcpu *vcpu, u64 vadr)
         return key;
 }
 
-
-
 void kvm_thash(struct kvm_vcpu *vcpu, INST64 inst)
 {
         unsigned long thash, vadr;
@@ -1050,7 +1047,6 @@ void kvm_thash(struct kvm_vcpu *vcpu, INST64 inst)
         vcpu_set_gr(vcpu, inst.M46.r1, thash, 0);
 }
 
-
 void kvm_ttag(struct kvm_vcpu *vcpu, INST64 inst)
 {
         unsigned long tag, vadr;
@@ -1131,7 +1127,6 @@ int vcpu_tpa(struct kvm_vcpu *vcpu, u64 vadr, u64 *padr)
         return IA64_NO_FAULT;
 }
 
-
 int kvm_tpa(struct kvm_vcpu *vcpu, INST64 inst)
 {
         unsigned long r1, r3;
@@ -1154,7 +1149,6 @@ void kvm_tak(struct kvm_vcpu *vcpu, INST64 inst)
         vcpu_set_gr(vcpu, inst.M46.r1, r1, 0);
 }
 
-
 /************************************
  * Insert/Purge translation register/cache
  ************************************/
@@ -1385,7 +1379,6 @@ void kvm_mov_to_ar_reg(struct kvm_vcpu *vcpu, INST64 inst)
         vcpu_set_itc(vcpu, r2);
 }
 
-
 void kvm_mov_from_ar_reg(struct kvm_vcpu *vcpu, INST64 inst)
 {
         unsigned long r1;
@@ -1393,8 +1386,9 @@ void kvm_mov_from_ar_reg(struct kvm_vcpu *vcpu, INST64 inst)
         r1 = vcpu_get_itc(vcpu);
         vcpu_set_gr(vcpu, inst.M31.r1, r1, 0);
 }
+
 /**************************************************************************
-  struct kvm_vcpu*protection key register access routines
+  struct kvm_vcpu protection key register access routines
  **************************************************************************/
 
 unsigned long vcpu_get_pkr(struct kvm_vcpu *vcpu, unsigned long reg)
@@ -1407,20 +1401,6 @@ void vcpu_set_pkr(struct kvm_vcpu *vcpu, unsigned long reg, unsigned long val)
         ia64_set_pkr(reg, val);
 }
 
-
-unsigned long vcpu_get_itir_on_fault(struct kvm_vcpu *vcpu, unsigned long ifa)
-{
-        union ia64_rr rr, rr1;
-
-        rr.val = vcpu_get_rr(vcpu, ifa);
-        rr1.val = 0;
-        rr1.ps = rr.ps;
-        rr1.rid = rr.rid;
-        return (rr1.val);
-}
-
-
-
 /********************************
  * Moves to privileged registers
  ********************************/
@@ -1464,8 +1444,6 @@ unsigned long vcpu_set_rr(struct kvm_vcpu *vcpu, unsigned long reg,
         return (IA64_NO_FAULT);
 }
 
-
-
 void kvm_mov_to_rr(struct kvm_vcpu *vcpu, INST64 inst)
 {
         unsigned long r3, r2;
@@ -1510,8 +1488,6 @@ void kvm_mov_to_pkr(struct kvm_vcpu *vcpu, INST64 inst)
         vcpu_set_pkr(vcpu, r3, r2);
 }
 
-
-
 void kvm_mov_from_rr(struct kvm_vcpu *vcpu, INST64 inst)
 {
         unsigned long r3, r1;
@@ -1557,7 +1533,6 @@ void kvm_mov_from_pmc(struct kvm_vcpu *vcpu, INST64 inst)
         vcpu_set_gr(vcpu, inst.M43.r1, r1, 0);
 }
 
-
 unsigned long vcpu_get_cpuid(struct kvm_vcpu *vcpu, unsigned long reg)
 {
         /* FIXME: This could get called as a result of a rsvd-reg fault */
@@ -1609,7 +1584,6 @@ unsigned long kvm_mov_to_cr(struct kvm_vcpu *vcpu, INST64 inst)
         return 0;
 }
 
-
 unsigned long kvm_mov_from_cr(struct kvm_vcpu *vcpu, INST64 inst)
 {
         unsigned long tgt = inst.M33.r1;
@@ -1633,8 +1607,6 @@ unsigned long kvm_mov_from_cr(struct kvm_vcpu *vcpu, INST64 inst)
         return 0;
 }
 
-
-
 void vcpu_set_psr(struct kvm_vcpu *vcpu, unsigned long val)
 {
 
@@ -1776,9 +1748,6 @@ void vcpu_bsw1(struct kvm_vcpu *vcpu)
         }
 }
 
-
-
-
 void vcpu_rfi(struct kvm_vcpu *vcpu)
 {
         unsigned long ifs, psr;
@@ -1796,7 +1765,6 @@ void vcpu_rfi(struct kvm_vcpu *vcpu)
         regs->cr_iip = VCPU(vcpu, iip);
 }
 
-
 /*
    VPSR can't keep track of below bits of guest PSR
    This function gets guest PSR
diff --git a/arch/ia64/kvm/vcpu.h b/arch/ia64/kvm/vcpu.h
index b2f12a562bdf..042af92ced83 100644
--- a/arch/ia64/kvm/vcpu.h
+++ b/arch/ia64/kvm/vcpu.h
@@ -703,7 +703,7 @@ extern u64 guest_vhpt_lookup(u64 iha, u64 *pte);
 extern void thash_purge_entries(struct kvm_vcpu *v, u64 va, u64 ps);
 extern void thash_purge_entries_remote(struct kvm_vcpu *v, u64 va, u64 ps);
 extern u64 translate_phy_pte(u64 *pte, u64 itir, u64 va);
-extern int thash_purge_and_insert(struct kvm_vcpu *v, u64 pte,
+extern void thash_purge_and_insert(struct kvm_vcpu *v, u64 pte,
                 u64 itir, u64 ifa, int type);
 extern void thash_purge_all(struct kvm_vcpu *v);
 extern struct thash_data *vtlb_lookup(struct kvm_vcpu *v,
@@ -738,7 +738,7 @@ void kvm_init_vhpt(struct kvm_vcpu *v);
 void thash_init(struct thash_cb *hcb, u64 sz);
 
 void panic_vm(struct kvm_vcpu *v, const char *fmt, ...);
-
+u64 kvm_gpa_to_mpa(u64 gpa);
 extern u64 ia64_call_vsa(u64 proc, u64 arg1, u64 arg2, u64 arg3,
                 u64 arg4, u64 arg5, u64 arg6, u64 arg7);
 
diff --git a/arch/ia64/kvm/vtlb.c b/arch/ia64/kvm/vtlb.c
index 6b6307a3bd55..38232b37668b 100644
--- a/arch/ia64/kvm/vtlb.c
+++ b/arch/ia64/kvm/vtlb.c
@@ -164,11 +164,11 @@ static void vhpt_insert(u64 pte, u64 itir, u64 ifa, u64 gpte)
         unsigned long ps, gpaddr;
 
         ps = itir_ps(itir);
+        rr.val = ia64_get_rr(ifa);
 
-        gpaddr = ((gpte & _PAGE_PPN_MASK) >> ps << ps) |
-                (ifa & ((1UL << ps) - 1));
+         gpaddr = ((gpte & _PAGE_PPN_MASK) >> ps << ps) |
+                                        (ifa & ((1UL << ps) - 1));
 
-        rr.val = ia64_get_rr(ifa);
         head = (struct thash_data *)ia64_thash(ifa);
         head->etag = INVALID_TI_TAG;
         ia64_mf();
@@ -412,16 +412,14 @@ u64 translate_phy_pte(u64 *pte, u64 itir, u64 va)
 
 /*
  * Purge overlap TCs and then insert the new entry to emulate itc ops.
- *    Notes: Only TC entry can purge and insert.
- *    1 indicates this is MMIO
+ * Notes: Only TC entry can purge and insert.
  */
-int thash_purge_and_insert(struct kvm_vcpu *v, u64 pte, u64 itir,
+void  thash_purge_and_insert(struct kvm_vcpu *v, u64 pte, u64 itir,
                                                 u64 ifa, int type)
 {
         u64 ps;
         u64 phy_pte, io_mask, index;
         union ia64_rr vrr, mrr;
-        int ret = 0;
 
         ps = itir_ps(itir);
         vrr.val = vcpu_get_rr(v, ifa);
@@ -441,25 +439,19 @@ int thash_purge_and_insert(struct kvm_vcpu *v, u64 pte, u64 itir,
                 phy_pte &= ~_PAGE_MA_MASK;
         }
 
-        if (pte & VTLB_PTE_IO)
-                ret = 1;
-
         vtlb_purge(v, ifa, ps);
         vhpt_purge(v, ifa, ps);
 
-        if (ps == mrr.ps) {
-                if (!(pte&VTLB_PTE_IO)) {
-                        vhpt_insert(phy_pte, itir, ifa, pte);
-                } else {
-                        vtlb_insert(v, pte, itir, ifa);
-                        vcpu_quick_region_set(VMX(v, tc_regions), ifa);
-                }
-        } else if (ps > mrr.ps) {
+        if ((ps != mrr.ps) || (pte & VTLB_PTE_IO)) {
                 vtlb_insert(v, pte, itir, ifa);
                 vcpu_quick_region_set(VMX(v, tc_regions), ifa);
-                if (!(pte&VTLB_PTE_IO))
-                        vhpt_insert(phy_pte, itir, ifa, pte);
-        } else {
+        }
+        if (pte & VTLB_PTE_IO)
+                return;
+
+        if (ps >= mrr.ps)
+                vhpt_insert(phy_pte, itir, ifa, pte);
+        else {
                 u64 psr;
                 phy_pte  &= ~PAGE_FLAGS_RV_MASK;
                 psr = ia64_clear_ic();
@@ -469,7 +461,6 @@ int thash_purge_and_insert(struct kvm_vcpu *v, u64 pte, u64 itir,
         if (!(pte&VTLB_PTE_IO))
                 mark_pages_dirty(v, pte, ps);
 
-        return ret;
 }
 
 /*
@@ -509,7 +500,6 @@ void thash_purge_all(struct kvm_vcpu *v)
         local_flush_tlb_all();
 }
 
-
 /*
  * Lookup the hash table and its collision chain to find an entry
  * covering this address rid:va or the entry.
@@ -517,7 +507,6 @@ void thash_purge_all(struct kvm_vcpu *v)
  * INPUT:
  *  in: TLB format for both VHPT & TLB.
  */
-
 struct thash_data *vtlb_lookup(struct kvm_vcpu *v, u64 va, int is_data)
 {
         struct thash_data  *cch;
@@ -547,7 +536,6 @@ struct thash_data *vtlb_lookup(struct kvm_vcpu *v, u64 va, int is_data)
         return NULL;
 }
 
-
 /*
  * Initialize internal control data before service.
  */
@@ -573,6 +561,10 @@ void thash_init(struct thash_cb *hcb, u64 sz)
 u64 kvm_get_mpt_entry(u64 gpfn)
 {
         u64 *base = (u64 *) KVM_P2M_BASE;
+
+        if (gpfn >= (KVM_P2M_SIZE >> 3))
+                panic_vm(current_vcpu, "Invalid gpfn =%lx\n", gpfn);
+
         return *(base + gpfn);
 }
 
@@ -589,7 +581,6 @@ u64 kvm_gpa_to_mpa(u64 gpa)
         return (pte >> PAGE_SHIFT << PAGE_SHIFT) | (gpa & ~PAGE_MASK);
 }
 
-
 /*
  * Fetch guest bundle code.
  * INPUT:
@@ -631,7 +622,6 @@ int fetch_code(struct kvm_vcpu *vcpu, u64 gip, IA64_BUNDLE *pbundle)
         return IA64_NO_FAULT;
 }
 
-
 void kvm_init_vhpt(struct kvm_vcpu *v)
 {
         v->arch.vhpt.num = VHPT_NUM_ENTRIES;
diff --git a/arch/ia64/sn/kernel/msi_sn.c b/arch/ia64/sn/kernel/msi_sn.c
index ca553b0429ce..81e428943d73 100644
--- a/arch/ia64/sn/kernel/msi_sn.c
+++ b/arch/ia64/sn/kernel/msi_sn.c
@@ -205,7 +205,7 @@ static void sn_set_msi_irq_affinity(unsigned int irq,
         msg.address_lo = (u32)(bus_addr & 0x00000000ffffffff);
 
         write_msi_msg(irq, &msg);
-        irq_desc[irq].affinity = *cpu_mask;
+        cpumask_copy(irq_desc[irq].affinity, cpu_mask);
 }
 #endif /* CONFIG_SMP */
 
diff --git a/arch/m32r/kernel/irq.c b/arch/m32r/kernel/irq.c
index 2aeae4670098..8dfd31e87c4c 100644
--- a/arch/m32r/kernel/irq.c
+++ b/arch/m32r/kernel/irq.c
@@ -49,7 +49,7 @@ int show_interrupts(struct seq_file *p, void *v)
                 seq_printf(p, "%10u ", kstat_irqs(i));
 #else
                 for_each_online_cpu(j)
-                        seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
+                        seq_printf(p, "%10u ", kstat_irqs_cpu(i, j));
 #endif
                 seq_printf(p, " %14s", irq_desc[i].chip->typename);
                 seq_printf(p, "  %s", action->name);
diff --git a/arch/m68k/Makefile b/arch/m68k/Makefile
index 8133dbc44964..570d85c3f97f 100644
--- a/arch/m68k/Makefile
+++ b/arch/m68k/Makefile
@@ -117,3 +117,6 @@ endif
 
 archclean:
         rm -f vmlinux.gz vmlinux.bz2
+
+install:
+        sh $(srctree)/arch/m68k/install.sh $(KERNELRELEASE) vmlinux.gz System.map "$(INSTALL_PATH)"
diff --git a/arch/m68k/include/asm/irq_mm.h b/arch/m68k/include/asm/irq_mm.h
index 226bfc0f21b1..0cab42cad79e 100644
--- a/arch/m68k/include/asm/irq_mm.h
+++ b/arch/m68k/include/asm/irq_mm.h
@@ -3,6 +3,7 @@
 
 #include <linux/linkage.h>
 #include <linux/hardirq.h>
+#include <linux/irqreturn.h>
 #include <linux/spinlock_types.h>
 
 /*
@@ -80,7 +81,7 @@ struct pt_regs;
  * interrupt source (if it supports chaining).
  */
 typedef struct irq_node {
-        int             (*handler)(int, void *);
+        irqreturn_t     (*handler)(int, void *);
         void            *dev_id;
         struct irq_node *next;
         unsigned long   flags;
diff --git a/arch/m68k/include/asm/macintosh.h b/arch/m68k/include/asm/macintosh.h
index 05309f7e3d06..50db3591ca15 100644
--- a/arch/m68k/include/asm/macintosh.h
+++ b/arch/m68k/include/asm/macintosh.h
@@ -34,6 +34,7 @@ struct mac_model
         char scc_type;
         char ether_type;
         char nubus_type;
+        char floppy_type;
 };
 
 #define MAC_ADB_NONE            0
@@ -71,6 +72,12 @@ struct mac_model
 #define MAC_NO_NUBUS            0
 #define MAC_NUBUS               1
 
+#define MAC_FLOPPY_IWM          0
+#define MAC_FLOPPY_SWIM_ADDR1   1
+#define MAC_FLOPPY_SWIM_ADDR2   2
+#define MAC_FLOPPY_SWIM_IOP     3
+#define MAC_FLOPPY_AV           4
+
 /*
  *      Gestalt numbers
  */
diff --git a/arch/m68k/include/asm/param.h b/arch/m68k/include/asm/param.h
index 40d1112a4588..85c41b75aa78 100644
--- a/arch/m68k/include/asm/param.h
+++ b/arch/m68k/include/asm/param.h
@@ -1,5 +1,26 @@
+#ifndef _M68K_PARAM_H
+#define _M68K_PARAM_H
+
+#ifdef __KERNEL__
+# define HZ             CONFIG_HZ       /* Internal kernel timer frequency */
+# define USER_HZ        100             /* .. some user interfaces are in "ticks" */
+# define CLOCKS_PER_SEC (USER_HZ)       /* like times() */
+#endif
+
+#ifndef HZ
+#define HZ 100
+#endif
+
 #ifdef __uClinux__
-#include "param_no.h"
+#define EXEC_PAGESIZE   4096
 #else
-#include "param_mm.h"
+#define EXEC_PAGESIZE   8192
+#endif
+
+#ifndef NOGROUP
+#define NOGROUP         (-1)
 #endif
+
+#define MAXHOSTNAMELEN  64      /* max length of hostname */
+
+#endif /* _M68K_PARAM_H */
diff --git a/arch/m68k/include/asm/param_mm.h b/arch/m68k/include/asm/param_mm.h
deleted file mode 100644
index 536a27888358..000000000000
--- a/arch/m68k/include/asm/param_mm.h
+++ /dev/null
@@ -1,22 +0,0 @@
-#ifndef _M68K_PARAM_H
-#define _M68K_PARAM_H
-
-#ifdef __KERNEL__
-# define HZ             CONFIG_HZ       /* Internal kernel timer frequency */
-# define USER_HZ        100             /* .. some user interfaces are in "ticks" */
-# define CLOCKS_PER_SEC (USER_HZ)       /* like times() */
-#endif
-
-#ifndef HZ
-#define HZ 100
-#endif
-
-#define EXEC_PAGESIZE   8192
-
-#ifndef NOGROUP
-#define NOGROUP         (-1)
-#endif
-
-#define MAXHOSTNAMELEN  64      /* max length of hostname */
-
-#endif /* _M68K_PARAM_H */
diff --git a/arch/m68k/include/asm/param_no.h b/arch/m68k/include/asm/param_no.h
deleted file mode 100644
index 6044397adb64..000000000000
--- a/arch/m68k/include/asm/param_no.h
+++ /dev/null
@@ -1,22 +0,0 @@
-#ifndef _M68KNOMMU_PARAM_H
-#define _M68KNOMMU_PARAM_H
-
-#ifdef __KERNEL__
-#define HZ CONFIG_HZ
-#define USER_HZ         HZ
-#define CLOCKS_PER_SEC  (USER_HZ)
-#endif
-
-#ifndef HZ
-#define HZ      100
-#endif
-
-#define EXEC_PAGESIZE   4096
-
-#ifndef NOGROUP
-#define NOGROUP         (-1)
-#endif
-
-#define MAXHOSTNAMELEN  64      /* max length of hostname */
-
-#endif /* _M68KNOMMU_PARAM_H */
diff --git a/arch/m68k/include/asm/ptrace.h b/arch/m68k/include/asm/ptrace.h
index e83cd2f66101..8c9194b98548 100644
--- a/arch/m68k/include/asm/ptrace.h
+++ b/arch/m68k/include/asm/ptrace.h
@@ -1,5 +1,87 @@
-#ifdef __uClinux__
-#include "ptrace_no.h"
+#ifndef _M68K_PTRACE_H
+#define _M68K_PTRACE_H
+
+#define PT_D1      0
+#define PT_D2      1
+#define PT_D3      2
+#define PT_D4      3
+#define PT_D5      4
+#define PT_D6      5
+#define PT_D7      6
+#define PT_A0      7
+#define PT_A1      8
+#define PT_A2      9
+#define PT_A3      10
+#define PT_A4      11
+#define PT_A5      12
+#define PT_A6      13
+#define PT_D0      14
+#define PT_USP     15
+#define PT_ORIG_D0 16
+#define PT_SR      17
+#define PT_PC      18
+
+#ifndef __ASSEMBLY__
+
+/* this struct defines the way the registers are stored on the
+   stack during a system call. */
+
+struct pt_regs {
+  long     d1;
+  long     d2;
+  long     d3;
+  long     d4;
+  long     d5;
+  long     a0;
+  long     a1;
+  long     a2;
+  long     d0;
+  long     orig_d0;
+  long     stkadj;
+#ifdef CONFIG_COLDFIRE
+  unsigned format :  4; /* frame format specifier */
+  unsigned vector : 12; /* vector offset */
+  unsigned short sr;
+  unsigned long  pc;
 #else
-#include "ptrace_mm.h"
+  unsigned short sr;
+  unsigned long  pc;
+  unsigned format :  4; /* frame format specifier */
+  unsigned vector : 12; /* vector offset */
 #endif
+};
+
+/*
+ * This is the extended stack used by signal handlers and the context
+ * switcher: it's pushed after the normal "struct pt_regs".
+ */
+struct switch_stack {
+        unsigned long  d6;
+        unsigned long  d7;
+        unsigned long  a3;
+        unsigned long  a4;
+        unsigned long  a5;
+        unsigned long  a6;
+        unsigned long  retpc;
+};
+
+/* Arbitrarily choose the same ptrace numbers as used by the Sparc code. */
+#define PTRACE_GETREGS            12
+#define PTRACE_SETREGS            13
+#define PTRACE_GETFPREGS          14
+#define PTRACE_SETFPREGS          15
+
+#ifdef __KERNEL__
+
+#ifndef PS_S
+#define PS_S  (0x2000)
+#define PS_M  (0x1000)
+#endif
+
+#define user_mode(regs) (!((regs)->sr & PS_S))
+#define instruction_pointer(regs) ((regs)->pc)
+#define profile_pc(regs) instruction_pointer(regs)
+extern void show_regs(struct pt_regs *);
+#endif /* __KERNEL__ */
+#endif /* __ASSEMBLY__ */
+#endif /* _M68K_PTRACE_H */
diff --git a/arch/m68k/include/asm/ptrace_mm.h b/arch/m68k/include/asm/ptrace_mm.h
deleted file mode 100644
index 57e763d79bf4..000000000000
--- a/arch/m68k/include/asm/ptrace_mm.h
+++ /dev/null
@@ -1,80 +0,0 @@
-#ifndef _M68K_PTRACE_H
-#define _M68K_PTRACE_H
-
-#define PT_D1      0
-#define PT_D2      1
-#define PT_D3      2
-#define PT_D4      3
-#define PT_D5      4
-#define PT_D6      5
-#define PT_D7      6
-#define PT_A0      7
-#define PT_A1      8
-#define PT_A2      9
-#define PT_A3      10
-#define PT_A4      11
-#define PT_A5      12
-#define PT_A6      13
-#define PT_D0      14
-#define PT_USP     15
-#define PT_ORIG_D0 16
-#define PT_SR      17
-#define PT_PC      18
-
-#ifndef __ASSEMBLY__
-
-/* this struct defines the way the registers are stored on the
-   stack during a system call. */
-
-struct pt_regs {
-  long     d1;
-  long     d2;
-  long     d3;
-  long     d4;
-  long     d5;
-  long     a0;
-  long     a1;
-  long     a2;
-  long     d0;
-  long     orig_d0;
-  long     stkadj;
-  unsigned short sr;
-  unsigned long  pc;
-  unsigned format :  4; /* frame format specifier */
-  unsigned vector : 12; /* vector offset */
-};
-
-/*
- * This is the extended stack used by signal handlers and the context
- * switcher: it's pushed after the normal "struct pt_regs".
- */
-struct switch_stack {
-        unsigned long  d6;
-        unsigned long  d7;
-        unsigned long  a3;
-        unsigned long  a4;
-        unsigned long  a5;
-        unsigned long  a6;
-        unsigned long  retpc;
-};
-
-/* Arbitrarily choose the same ptrace numbers as used by the Sparc code. */
-#define PTRACE_GETREGS            12
-#define PTRACE_SETREGS            13
-#define PTRACE_GETFPREGS          14
-#define PTRACE_SETFPREGS          15
-
-#ifdef __KERNEL__
-
-#ifndef PS_S
-#define PS_S  (0x2000)
-#define PS_M  (0x1000)
-#endif
-
-#define user_mode(regs) (!((regs)->sr & PS_S))
-#define instruction_pointer(regs) ((regs)->pc)
-#define profile_pc(regs) instruction_pointer(regs)
-extern void show_regs(struct pt_regs *);
-#endif /* __KERNEL__ */
-#endif /* __ASSEMBLY__ */
-#endif /* _M68K_PTRACE_H */
diff --git a/arch/m68k/include/asm/ptrace_no.h b/arch/m68k/include/asm/ptrace_no.h
deleted file mode 100644
index 8c9194b98548..000000000000
--- a/arch/m68k/include/asm/ptrace_no.h
+++ /dev/null
@@ -1,87 +0,0 @@
-#ifndef _M68K_PTRACE_H
-#define _M68K_PTRACE_H
-
-#define PT_D1      0
-#define PT_D2      1
-#define PT_D3      2
-#define PT_D4      3
-#define PT_D5      4
-#define PT_D6      5
-#define PT_D7      6
-#define PT_A0      7
-#define PT_A1      8
-#define PT_A2      9
-#define PT_A3      10
-#define PT_A4      11
-#define PT_A5      12
-#define PT_A6      13
-#define PT_D0      14
-#define PT_USP     15
-#define PT_ORIG_D0 16
-#define PT_SR      17
-#define PT_PC      18
-
-#ifndef __ASSEMBLY__
-
-/* this struct defines the way the registers are stored on the
-   stack during a system call. */
-
-struct pt_regs {
-  long     d1;
-  long     d2;
-  long     d3;
-  long     d4;
-  long     d5;
-  long     a0;
-  long     a1;
-  long     a2;
-  long     d0;
-  long     orig_d0;
-  long     stkadj;
-#ifdef CONFIG_COLDFIRE
-  unsigned format :  4; /* frame format specifier */
-  unsigned vector : 12; /* vector offset */
-  unsigned short sr;
-  unsigned long  pc;
-#else
-  unsigned short sr;
-  unsigned long  pc;
-  unsigned format :  4; /* frame format specifier */
-  unsigned vector : 12; /* vector offset */
-#endif
-};
-
-/*
- * This is the extended stack used by signal handlers and the context
- * switcher: it's pushed after the normal "struct pt_regs".
- */
-struct switch_stack {
-        unsigned long  d6;
-        unsigned long  d7;
-        unsigned long  a3;
-        unsigned long  a4;
-        unsigned long  a5;
-        unsigned long  a6;
-        unsigned long  retpc;
-};
-
-/* Arbitrarily choose the same ptrace numbers as used by the Sparc code. */
-#define PTRACE_GETREGS            12
-#define PTRACE_SETREGS            13
-#define PTRACE_GETFPREGS          14
-#define PTRACE_SETFPREGS          15
-
-#ifdef __KERNEL__
-
-#ifndef PS_S
-#define PS_S  (0x2000)
-#define PS_M  (0x1000)
-#endif
-
-#define user_mode(regs) (!((regs)->sr & PS_S))
-#define instruction_pointer(regs) ((regs)->pc)
-#define profile_pc(regs) instruction_pointer(regs)
-extern void show_regs(struct pt_regs *);
-#endif /* __KERNEL__ */
-#endif /* __ASSEMBLY__ */
-#endif /* _M68K_PTRACE_H */
diff --git a/arch/m68k/include/asm/setup.h b/arch/m68k/include/asm/setup.h
index 842f86f75ccd..4dfb3952b375 100644
--- a/arch/m68k/include/asm/setup.h
+++ b/arch/m68k/include/asm/setup.h
@@ -1,5 +1,376 @@
-#ifdef __uClinux__
-#include "setup_no.h"
+/*
+** asm/setup.h -- Definition of the Linux/m68k setup information
+**
+** Copyright 1992 by Greg Harp
+**
+** This file is subject to the terms and conditions of the GNU General Public
+** License.  See the file COPYING in the main directory of this archive
+** for more details.
+**
+** Created 09/29/92 by Greg Harp
+**
+** 5/2/94 Roman Hodek:
+**   Added bi_atari part of the machine dependent union bi_un; for now it
+**   contains just a model field to distinguish between TT and Falcon.
+** 26/7/96 Roman Zippel:
+**   Renamed to setup.h; added some useful macros to allow gcc some
+**   optimizations if possible.
+** 5/10/96 Geert Uytterhoeven:
+**   Redesign of the boot information structure; moved boot information
+**   structure to bootinfo.h
+*/
+
+#ifndef _M68K_SETUP_H
+#define _M68K_SETUP_H
+
+
+
+    /*
+     *  Linux/m68k Architectures
+     */
+
+#define MACH_AMIGA    1
+#define MACH_ATARI    2
+#define MACH_MAC      3
+#define MACH_APOLLO   4
+#define MACH_SUN3     5
+#define MACH_MVME147  6
+#define MACH_MVME16x  7
+#define MACH_BVME6000 8
+#define MACH_HP300    9
+#define MACH_Q40     10
+#define MACH_SUN3X   11
+
+#define COMMAND_LINE_SIZE 256
+
+#ifdef __KERNEL__
+
+#define CL_SIZE COMMAND_LINE_SIZE
+
+#ifndef __ASSEMBLY__
+extern unsigned long m68k_machtype;
+#endif /* !__ASSEMBLY__ */
+
+#if !defined(CONFIG_AMIGA)
+#  define MACH_IS_AMIGA (0)
+#elif defined(CONFIG_ATARI) || defined(CONFIG_MAC) || defined(CONFIG_APOLLO) \
+        || defined(CONFIG_MVME16x) || defined(CONFIG_BVME6000)               \
+        || defined(CONFIG_HP300) || defined(CONFIG_Q40)                      \
+        || defined(CONFIG_SUN3X) || defined(CONFIG_MVME147)
+#  define MACH_IS_AMIGA (m68k_machtype == MACH_AMIGA)
 #else
-#include "setup_mm.h"
+#  define MACH_AMIGA_ONLY
+#  define MACH_IS_AMIGA (1)
+#  define MACH_TYPE (MACH_AMIGA)
 #endif
+
+#if !defined(CONFIG_ATARI)
+#  define MACH_IS_ATARI (0)
+#elif defined(CONFIG_AMIGA) || defined(CONFIG_MAC) || defined(CONFIG_APOLLO) \
+        || defined(CONFIG_MVME16x) || defined(CONFIG_BVME6000)               \
+        || defined(CONFIG_HP300) || defined(CONFIG_Q40)                      \
+        || defined(CONFIG_SUN3X) || defined(CONFIG_MVME147)
+#  define MACH_IS_ATARI (m68k_machtype == MACH_ATARI)
+#else
+#  define MACH_ATARI_ONLY
+#  define MACH_IS_ATARI (1)
+#  define MACH_TYPE (MACH_ATARI)
+#endif
+
+#if !defined(CONFIG_MAC)
+#  define MACH_IS_MAC (0)
+#elif defined(CONFIG_AMIGA) || defined(CONFIG_ATARI) || defined(CONFIG_APOLLO) \
+        || defined(CONFIG_MVME16x) || defined(CONFIG_BVME6000)                 \
+        || defined(CONFIG_HP300) || defined(CONFIG_Q40)                        \
+        || defined(CONFIG_SUN3X) || defined(CONFIG_MVME147)
+#  define MACH_IS_MAC (m68k_machtype == MACH_MAC)
+#else
+#  define MACH_MAC_ONLY
+#  define MACH_IS_MAC (1)
+#  define MACH_TYPE (MACH_MAC)
+#endif
+
+#if defined(CONFIG_SUN3)
+#define MACH_IS_SUN3 (1)
+#define MACH_SUN3_ONLY (1)
+#define MACH_TYPE (MACH_SUN3)
+#else
+#define MACH_IS_SUN3 (0)
+#endif
+
+#if !defined (CONFIG_APOLLO)
+#  define MACH_IS_APOLLO (0)
+#elif defined(CONFIG_AMIGA) || defined(CONFIG_MAC) || defined(CONFIG_ATARI) \
+        || defined(CONFIG_MVME16x) || defined(CONFIG_BVME6000)              \
+        || defined(CONFIG_HP300) || defined(CONFIG_Q40)                     \
+        || defined(CONFIG_SUN3X) || defined(CONFIG_MVME147)
+#  define MACH_IS_APOLLO (m68k_machtype == MACH_APOLLO)
+#else
+#  define MACH_APOLLO_ONLY
+#  define MACH_IS_APOLLO (1)
+#  define MACH_TYPE (MACH_APOLLO)
+#endif
+
+#if !defined (CONFIG_MVME147)
+#  define MACH_IS_MVME147 (0)
+#elif defined(CONFIG_AMIGA) || defined(CONFIG_MAC) || defined(CONFIG_ATARI) \
+        || defined(CONFIG_APOLLO) || defined(CONFIG_BVME6000)               \
+        || defined(CONFIG_HP300) || defined(CONFIG_Q40)                     \
+        || defined(CONFIG_SUN3X) || defined(CONFIG_MVME16x)
+#  define MACH_IS_MVME147 (m68k_machtype == MACH_MVME147)
+#else
+#  define MACH_MVME147_ONLY
+#  define MACH_IS_MVME147 (1)
+#  define MACH_TYPE (MACH_MVME147)
+#endif
+
+#if !defined (CONFIG_MVME16x)
+#  define MACH_IS_MVME16x (0)
+#elif defined(CONFIG_AMIGA) || defined(CONFIG_MAC) || defined(CONFIG_ATARI) \
+        || defined(CONFIG_APOLLO) || defined(CONFIG_BVME6000)               \
+        || defined(CONFIG_HP300) || defined(CONFIG_Q40)                     \
+        || defined(CONFIG_SUN3X) || defined(CONFIG_MVME147)
+#  define MACH_IS_MVME16x (m68k_machtype == MACH_MVME16x)
+#else
+#  define MACH_MVME16x_ONLY
+#  define MACH_IS_MVME16x (1)
+#  define MACH_TYPE (MACH_MVME16x)
+#endif
+
+#if !defined (CONFIG_BVME6000)
+#  define MACH_IS_BVME6000 (0)
+#elif defined(CONFIG_AMIGA) || defined(CONFIG_MAC) || defined(CONFIG_ATARI) \
+        || defined(CONFIG_APOLLO) || defined(CONFIG_MVME16x)                \
+        || defined(CONFIG_HP300) || defined(CONFIG_Q40)                     \
+        || defined(CONFIG_SUN3X) || defined(CONFIG_MVME147)
+#  define MACH_IS_BVME6000 (m68k_machtype == MACH_BVME6000)
+#else
+#  define MACH_BVME6000_ONLY
+#  define MACH_IS_BVME6000 (1)
+#  define MACH_TYPE (MACH_BVME6000)
+#endif
+
+#if !defined (CONFIG_HP300)
+#  define MACH_IS_HP300 (0)
+#elif defined(CONFIG_AMIGA) || defined(CONFIG_MAC) || defined(CONFIG_ATARI) \
+        || defined(CONFIG_APOLLO) || defined(CONFIG_MVME16x) \
+        || defined(CONFIG_BVME6000) || defined(CONFIG_Q40) \
+        || defined(CONFIG_SUN3X) || defined(CONFIG_MVME147)
+#  define MACH_IS_HP300 (m68k_machtype == MACH_HP300)
+#else
+#  define MACH_HP300_ONLY
+#  define MACH_IS_HP300 (1)
+#  define MACH_TYPE (MACH_HP300)
+#endif
+
+#if !defined (CONFIG_Q40)
+#  define MACH_IS_Q40 (0)
+#elif defined(CONFIG_AMIGA) || defined(CONFIG_MAC) || defined(CONFIG_ATARI) \
+        || defined(CONFIG_APOLLO) || defined(CONFIG_MVME16x)                \
+        || defined(CONFIG_BVME6000) || defined(CONFIG_HP300)                \
+        || defined(CONFIG_SUN3X) || defined(CONFIG_MVME147)
+#  define MACH_IS_Q40 (m68k_machtype == MACH_Q40)
+#else
+#  define MACH_Q40_ONLY
+#  define MACH_IS_Q40 (1)
+#  define MACH_TYPE (MACH_Q40)
+#endif
+
+#if !defined (CONFIG_SUN3X)
+#  define MACH_IS_SUN3X (0)
+#elif defined(CONFIG_AMIGA) || defined(CONFIG_MAC) || defined(CONFIG_ATARI) \
+        || defined(CONFIG_APOLLO) || defined(CONFIG_MVME16x)                \
+        || defined(CONFIG_BVME6000) || defined(CONFIG_HP300)                \
+        || defined(CONFIG_Q40) || defined(CONFIG_MVME147)
+#  define MACH_IS_SUN3X (m68k_machtype == MACH_SUN3X)
+#else
+#  define CONFIG_SUN3X_ONLY
+#  define MACH_IS_SUN3X (1)
+#  define MACH_TYPE (MACH_SUN3X)
+#endif
+
+#ifndef MACH_TYPE
+#  define MACH_TYPE (m68k_machtype)
+#endif
+
+#endif /* __KERNEL__ */
+
+
+    /*
+     *  CPU, FPU and MMU types
+     *
+     *  Note: we may rely on the following equalities:
+     *
+     *      CPU_68020 == MMU_68851
+     *      CPU_68030 == MMU_68030
+     *      CPU_68040 == FPU_68040 == MMU_68040
+     *      CPU_68060 == FPU_68060 == MMU_68060
+     */
+
+#define CPUB_68020     0
+#define CPUB_68030     1
+#define CPUB_68040     2
+#define CPUB_68060     3
+
+#define CPU_68020      (1<<CPUB_68020)
+#define CPU_68030      (1<<CPUB_68030)
+#define CPU_68040      (1<<CPUB_68040)
+#define CPU_68060      (1<<CPUB_68060)
+
+#define FPUB_68881     0
+#define FPUB_68882     1
+#define FPUB_68040     2                       /* Internal FPU */
+#define FPUB_68060     3                       /* Internal FPU */
+#define FPUB_SUNFPA    4                       /* Sun-3 FPA */
+
+#define FPU_68881      (1<<FPUB_68881)
+#define FPU_68882      (1<<FPUB_68882)
+#define FPU_68040      (1<<FPUB_68040)
+#define FPU_68060      (1<<FPUB_68060)
+#define FPU_SUNFPA     (1<<FPUB_SUNFPA)
+
+#define MMUB_68851     0
+#define MMUB_68030     1                       /* Internal MMU */
+#define MMUB_68040     2                       /* Internal MMU */
+#define MMUB_68060     3                       /* Internal MMU */
+#define MMUB_APOLLO    4                       /* Custom Apollo */
+#define MMUB_SUN3      5                       /* Custom Sun-3 */
+
+#define MMU_68851      (1<<MMUB_68851)
+#define MMU_68030      (1<<MMUB_68030)
+#define MMU_68040      (1<<MMUB_68040)
+#define MMU_68060      (1<<MMUB_68060)
+#define MMU_SUN3       (1<<MMUB_SUN3)
+#define MMU_APOLLO     (1<<MMUB_APOLLO)
+
+#ifdef __KERNEL__
+
+#ifndef __ASSEMBLY__
+extern unsigned long m68k_cputype;
+extern unsigned long m68k_fputype;
+extern unsigned long m68k_mmutype;
+#ifdef CONFIG_VME
+extern unsigned long vme_brdtype;
+#endif
+
+    /*
+     *  m68k_is040or060 is != 0 for a '040 or higher;
+     *  used numbers are 4 for 68040 and 6 for 68060.
+     */
+
+extern int m68k_is040or060;
+#endif /* !__ASSEMBLY__ */
+
+#if !defined(CONFIG_M68020)
+#  define CPU_IS_020 (0)
+#  define MMU_IS_851 (0)
+#  define MMU_IS_SUN3 (0)
+#elif defined(CONFIG_M68030) || defined(CONFIG_M68040) || defined(CONFIG_M68060)
+#  define CPU_IS_020 (m68k_cputype & CPU_68020)
+#  define MMU_IS_851 (m68k_mmutype & MMU_68851)
+#  define MMU_IS_SUN3 (0)       /* Sun3 not supported with other CPU enabled */
+#else
+#  define CPU_M68020_ONLY
+#  define CPU_IS_020 (1)
+#ifdef MACH_SUN3_ONLY
+#  define MMU_IS_SUN3 (1)
+#  define MMU_IS_851 (0)
+#else
+#  define MMU_IS_SUN3 (0)
+#  define MMU_IS_851 (1)
+#endif
+#endif
+
+#if !defined(CONFIG_M68030)
+#  define CPU_IS_030 (0)
+#  define MMU_IS_030 (0)
+#elif defined(CONFIG_M68020) || defined(CONFIG_M68040) || defined(CONFIG_M68060)
+#  define CPU_IS_030 (m68k_cputype & CPU_68030)
+#  define MMU_IS_030 (m68k_mmutype & MMU_68030)
+#else
+#  define CPU_M68030_ONLY
+#  define CPU_IS_030 (1)
+#  define MMU_IS_030 (1)
+#endif
+
+#if !defined(CONFIG_M68040)
+#  define CPU_IS_040 (0)
+#  define MMU_IS_040 (0)
+#elif defined(CONFIG_M68020) || defined(CONFIG_M68030) || defined(CONFIG_M68060)
+#  define CPU_IS_040 (m68k_cputype & CPU_68040)
+#  define MMU_IS_040 (m68k_mmutype & MMU_68040)
+#else
+#  define CPU_M68040_ONLY
+#  define CPU_IS_040 (1)
+#  define MMU_IS_040 (1)
+#endif
+
+#if !defined(CONFIG_M68060)
+#  define CPU_IS_060 (0)
+#  define MMU_IS_060 (0)
+#elif defined(CONFIG_M68020) || defined(CONFIG_M68030) || defined(CONFIG_M68040)
+#  define CPU_IS_060 (m68k_cputype & CPU_68060)
+#  define MMU_IS_060 (m68k_mmutype & MMU_68060)
+#else
+#  define CPU_M68060_ONLY
+#  define CPU_IS_060 (1)
+#  define MMU_IS_060 (1)
+#endif
+
+#if !defined(CONFIG_M68020) && !defined(CONFIG_M68030)
+#  define CPU_IS_020_OR_030 (0)
+#else
+#  define CPU_M68020_OR_M68030
+#  if defined(CONFIG_M68040) || defined(CONFIG_M68060)
+#    define CPU_IS_020_OR_030 (!m68k_is040or060)
+#  else
+#    define CPU_M68020_OR_M68030_ONLY
+#    define CPU_IS_020_OR_030 (1)
+#  endif
+#endif
+
+#if !defined(CONFIG_M68040) && !defined(CONFIG_M68060)
+#  define CPU_IS_040_OR_060 (0)
+#else
+#  define CPU_M68040_OR_M68060
+#  if defined(CONFIG_M68020) || defined(CONFIG_M68030)
+#    define CPU_IS_040_OR_060 (m68k_is040or060)
+#  else
+#    define CPU_M68040_OR_M68060_ONLY
+#    define CPU_IS_040_OR_060 (1)
+#  endif
+#endif
+
+#define CPU_TYPE (m68k_cputype)
+
+#ifdef CONFIG_M68KFPU_EMU
+#  ifdef CONFIG_M68KFPU_EMU_ONLY
+#    define FPU_IS_EMU (1)
+#  else
+#    define FPU_IS_EMU (!m68k_fputype)
+#  endif
+#else
+#  define FPU_IS_EMU (0)
+#endif
+
+
+    /*
+     *  Miscellaneous
+     */
+
+#define NUM_MEMINFO     4
+
+#ifndef __ASSEMBLY__
+struct mem_info {
+        unsigned long addr;             /* physical address of memory chunk */
+        unsigned long size;             /* length of memory chunk (in bytes) */
+};
+
+extern int m68k_num_memory;             /* # of memory blocks found (and used) */
+extern int m68k_realnum_memory;         /* real # of memory blocks found */
+extern struct mem_info m68k_memory[NUM_MEMINFO];/* memory description */
+#endif
+
+#endif /* __KERNEL__ */
+
+#endif /* _M68K_SETUP_H */
diff --git a/arch/m68k/include/asm/setup_mm.h b/arch/m68k/include/asm/setup_mm.h
deleted file mode 100644
index 4dfb3952b375..000000000000
--- a/arch/m68k/include/asm/setup_mm.h
+++ /dev/null
@@ -1,376 +0,0 @@
-/*
-** asm/setup.h -- Definition of the Linux/m68k setup information
-**
-** Copyright 1992 by Greg Harp
-**
-** This file is subject to the terms and conditions of the GNU General Public
-** License.  See the file COPYING in the main directory of this archive
-** for more details.
-**
-** Created 09/29/92 by Greg Harp
-**
-** 5/2/94 Roman Hodek:
-**   Added bi_atari part of the machine dependent union bi_un; for now it
-**   contains just a model field to distinguish between TT and Falcon.
-** 26/7/96 Roman Zippel:
-**   Renamed to setup.h; added some useful macros to allow gcc some
-**   optimizations if possible.
-** 5/10/96 Geert Uytterhoeven:
-**   Redesign of the boot information structure; moved boot information
-**   structure to bootinfo.h
-*/
-
-#ifndef _M68K_SETUP_H
-#define _M68K_SETUP_H
-
-
-
-    /*
-     *  Linux/m68k Architectures
-     */
-
-#define MACH_AMIGA    1
-#define MACH_ATARI    2
-#define MACH_MAC      3
-#define MACH_APOLLO   4
-#define MACH_SUN3     5
-#define MACH_MVME147  6
-#define MACH_MVME16x  7
-#define MACH_BVME6000 8
-#define MACH_HP300    9
-#define MACH_Q40     10
-#define MACH_SUN3X   11
-
-#define COMMAND_LINE_SIZE 256
-
-#ifdef __KERNEL__
-
-#define CL_SIZE COMMAND_LINE_SIZE
-
-#ifndef __ASSEMBLY__
-extern unsigned long m68k_machtype;
-#endif /* !__ASSEMBLY__ */
-
-#if !defined(CONFIG_AMIGA)
-#  define MACH_IS_AMIGA (0)
-#elif defined(CONFIG_ATARI) || defined(CONFIG_MAC) || defined(CONFIG_APOLLO) \
-        || defined(CONFIG_MVME16x) || defined(CONFIG_BVME6000)               \
-        || defined(CONFIG_HP300) || defined(CONFIG_Q40)                      \
-        || defined(CONFIG_SUN3X) || defined(CONFIG_MVME147)
-#  define MACH_IS_AMIGA (m68k_machtype == MACH_AMIGA)
-#else
-#  define MACH_AMIGA_ONLY
-#  define MACH_IS_AMIGA (1)
-#  define MACH_TYPE (MACH_AMIGA)
-#endif
-
-#if !defined(CONFIG_ATARI)
-#  define MACH_IS_ATARI (0)
-#elif defined(CONFIG_AMIGA) || defined(CONFIG_MAC) || defined(CONFIG_APOLLO) \
-        || defined(CONFIG_MVME16x) || defined(CONFIG_BVME6000)               \
-        || defined(CONFIG_HP300) || defined(CONFIG_Q40)                      \
-        || defined(CONFIG_SUN3X) || defined(CONFIG_MVME147)
-#  define MACH_IS_ATARI (m68k_machtype == MACH_ATARI)
-#else
-#  define MACH_ATARI_ONLY
-#  define MACH_IS_ATARI (1)
-#  define MACH_TYPE (MACH_ATARI)
-#endif
-
-#if !defined(CONFIG_MAC)
-#  define MACH_IS_MAC (0)
-#elif defined(CONFIG_AMIGA) || defined(CONFIG_ATARI) || defined(CONFIG_APOLLO) \
-        || defined(CONFIG_MVME16x) || defined(CONFIG_BVME6000)                 \
-        || defined(CONFIG_HP300) || defined(CONFIG_Q40)                        \
-        || defined(CONFIG_SUN3X) || defined(CONFIG_MVME147)
-#  define MACH_IS_MAC (m68k_machtype == MACH_MAC)
-#else
-#  define MACH_MAC_ONLY
-#  define MACH_IS_MAC (1)
-#  define MACH_TYPE (MACH_MAC)
-#endif
-
-#if defined(CONFIG_SUN3)
-#define MACH_IS_SUN3 (1)
-#define MACH_SUN3_ONLY (1)
-#define MACH_TYPE (MACH_SUN3)
-#else
-#define MACH_IS_SUN3 (0)
-#endif
-
-#if !defined (CONFIG_APOLLO)
-#  define MACH_IS_APOLLO (0)
-#elif defined(CONFIG_AMIGA) || defined(CONFIG_MAC) || defined(CONFIG_ATARI) \
-        || defined(CONFIG_MVME16x) || defined(CONFIG_BVME6000)              \
-        || defined(CONFIG_HP300) || defined(CONFIG_Q40)                     \
-        || defined(CONFIG_SUN3X) || defined(CONFIG_MVME147)
-#  define MACH_IS_APOLLO (m68k_machtype == MACH_APOLLO)
-#else
-#  define MACH_APOLLO_ONLY
-#  define MACH_IS_APOLLO (1)
-#  define MACH_TYPE (MACH_APOLLO)
-#endif
-
-#if !defined (CONFIG_MVME147)
-#  define MACH_IS_MVME147 (0)
-#elif defined(CONFIG_AMIGA) || defined(CONFIG_MAC) || defined(CONFIG_ATARI) \
-        || defined(CONFIG_APOLLO) || defined(CONFIG_BVME6000)               \
-        || defined(CONFIG_HP300) || defined(CONFIG_Q40)                     \
-        || defined(CONFIG_SUN3X) || defined(CONFIG_MVME16x)
-#  define MACH_IS_MVME147 (m68k_machtype == MACH_MVME147)
-#else
-#  define MACH_MVME147_ONLY
-#  define MACH_IS_MVME147 (1)
-#  define MACH_TYPE (MACH_MVME147)
-#endif
-
-#if !defined (CONFIG_MVME16x)
-#  define MACH_IS_MVME16x (0)
-#elif defined(CONFIG_AMIGA) || defined(CONFIG_MAC) || defined(CONFIG_ATARI) \
-        || defined(CONFIG_APOLLO) || defined(CONFIG_BVME6000)               \
-        || defined(CONFIG_HP300) || defined(CONFIG_Q40)                     \
-        || defined(CONFIG_SUN3X) || defined(CONFIG_MVME147)
-#  define MACH_IS_MVME16x (m68k_machtype == MACH_MVME16x)
-#else
-#  define MACH_MVME16x_ONLY
-#  define MACH_IS_MVME16x (1)
-#  define MACH_TYPE (MACH_MVME16x)
-#endif
-
-#if !defined (CONFIG_BVME6000)
-#  define MACH_IS_BVME6000 (0)
-#elif defined(CONFIG_AMIGA) || defined(CONFIG_MAC) || defined(CONFIG_ATARI) \
-        || defined(CONFIG_APOLLO) || defined(CONFIG_MVME16x)                \
-        || defined(CONFIG_HP300) || defined(CONFIG_Q40)                     \
-        || defined(CONFIG_SUN3X) || defined(CONFIG_MVME147)
-#  define MACH_IS_BVME6000 (m68k_machtype == MACH_BVME6000)
-#else
-#  define MACH_BVME6000_ONLY
-#  define MACH_IS_BVME6000 (1)
-#  define MACH_TYPE (MACH_BVME6000)
-#endif
-
-#if !defined (CONFIG_HP300)
-#  define MACH_IS_HP300 (0)
-#elif defined(CONFIG_AMIGA) || defined(CONFIG_MAC) || defined(CONFIG_ATARI) \
-        || defined(CONFIG_APOLLO) || defined(CONFIG_MVME16x) \
-        || defined(CONFIG_BVME6000) || defined(CONFIG_Q40) \
-        || defined(CONFIG_SUN3X) || defined(CONFIG_MVME147)
-#  define MACH_IS_HP300 (m68k_machtype == MACH_HP300)
-#else
-#  define MACH_HP300_ONLY
-#  define MACH_IS_HP300 (1)
-#  define MACH_TYPE (MACH_HP300)
-#endif
-
-#if !defined (CONFIG_Q40)
-#  define MACH_IS_Q40 (0)
-#elif defined(CONFIG_AMIGA) || defined(CONFIG_MAC) || defined(CONFIG_ATARI) \
-        || defined(CONFIG_APOLLO) || defined(CONFIG_MVME16x)                \
-        || defined(CONFIG_BVME6000) || defined(CONFIG_HP300)                \
-        || defined(CONFIG_SUN3X) || defined(CONFIG_MVME147)
-#  define MACH_IS_Q40 (m68k_machtype == MACH_Q40)
-#else
-#  define MACH_Q40_ONLY
-#  define MACH_IS_Q40 (1)
-#  define MACH_TYPE (MACH_Q40)
-#endif
-
-#if !defined (CONFIG_SUN3X)
-#  define MACH_IS_SUN3X (0)
-#elif defined(CONFIG_AMIGA) || defined(CONFIG_MAC) || defined(CONFIG_ATARI) \
-        || defined(CONFIG_APOLLO) || defined(CONFIG_MVME16x)                \
-        || defined(CONFIG_BVME6000) || defined(CONFIG_HP300)                \
-        || defined(CONFIG_Q40) || defined(CONFIG_MVME147)
-#  define MACH_IS_SUN3X (m68k_machtype == MACH_SUN3X)
-#else
-#  define CONFIG_SUN3X_ONLY
-#  define MACH_IS_SUN3X (1)
-#  define MACH_TYPE (MACH_SUN3X)
-#endif
-
-#ifndef MACH_TYPE
-#  define MACH_TYPE (m68k_machtype)
-#endif
-
-#endif /* __KERNEL__ */
-
-
-    /*
-     *  CPU, FPU and MMU types
-     *
-     *  Note: we may rely on the following equalities:
-     *
-     *      CPU_68020 == MMU_68851
-     *      CPU_68030 == MMU_68030
-     *      CPU_68040 == FPU_68040 == MMU_68040
-     *      CPU_68060 == FPU_68060 == MMU_68060
-     */
-
-#define CPUB_68020     0
-#define CPUB_68030     1
-#define CPUB_68040     2
-#define CPUB_68060     3
-
-#define CPU_68020      (1<<CPUB_68020)
-#define CPU_68030      (1<<CPUB_68030)
-#define CPU_68040      (1<<CPUB_68040)
-#define CPU_68060      (1<<CPUB_68060)
-
-#define FPUB_68881     0
-#define FPUB_68882     1
-#define FPUB_68040     2                       /* Internal FPU */
-#define FPUB_68060     3                       /* Internal FPU */
-#define FPUB_SUNFPA    4                       /* Sun-3 FPA */
-
-#define FPU_68881      (1<<FPUB_68881)
-#define FPU_68882      (1<<FPUB_68882)
-#define FPU_68040      (1<<FPUB_68040)
-#define FPU_68060      (1<<FPUB_68060)
-#define FPU_SUNFPA     (1<<FPUB_SUNFPA)
-
-#define MMUB_68851     0
-#define MMUB_68030     1                       /* Internal MMU */
-#define MMUB_68040     2                       /* Internal MMU */
-#define MMUB_68060     3                       /* Internal MMU */
-#define MMUB_APOLLO    4                       /* Custom Apollo */
-#define MMUB_SUN3      5                       /* Custom Sun-3 */
-
-#define MMU_68851      (1<<MMUB_68851)
-#define MMU_68030      (1<<MMUB_68030)
-#define MMU_68040      (1<<MMUB_68040)
-#define MMU_68060      (1<<MMUB_68060)
-#define MMU_SUN3       (1<<MMUB_SUN3)
-#define MMU_APOLLO     (1<<MMUB_APOLLO)
-
-#ifdef __KERNEL__
-
-#ifndef __ASSEMBLY__
-extern unsigned long m68k_cputype;
-extern unsigned long m68k_fputype;
-extern unsigned long m68k_mmutype;
-#ifdef CONFIG_VME
-extern unsigned long vme_brdtype;
-#endif
-
-    /*
-     *  m68k_is040or060 is != 0 for a '040 or higher;
-     *  used numbers are 4 for 68040 and 6 for 68060.
-     */
-
-extern int m68k_is040or060;
-#endif /* !__ASSEMBLY__ */
-
-#if !defined(CONFIG_M68020)
-#  define CPU_IS_020 (0)
-#  define MMU_IS_851 (0)
-#  define MMU_IS_SUN3 (0)
-#elif defined(CONFIG_M68030) || defined(CONFIG_M68040) || defined(CONFIG_M68060)
-#  define CPU_IS_020 (m68k_cputype & CPU_68020)
-#  define MMU_IS_851 (m68k_mmutype & MMU_68851)
-#  define MMU_IS_SUN3 (0)       /* Sun3 not supported with other CPU enabled */
-#else
-#  define CPU_M68020_ONLY
-#  define CPU_IS_020 (1)
-#ifdef MACH_SUN3_ONLY
-#  define MMU_IS_SUN3 (1)
-#  define MMU_IS_851 (0)
-#else
-#  define MMU_IS_SUN3 (0)
-#  define MMU_IS_851 (1)
-#endif
-#endif
-
-#if !defined(CONFIG_M68030)
-#  define CPU_IS_030 (0)
-#  define MMU_IS_030 (0)
-#elif defined(CONFIG_M68020) || defined(CONFIG_M68040) || defined(CONFIG_M68060)
-#  define CPU_IS_030 (m68k_cputype & CPU_68030)
-#  define MMU_IS_030 (m68k_mmutype & MMU_68030)
-#else
-#  define CPU_M68030_ONLY
-#  define CPU_IS_030 (1)
-#  define MMU_IS_030 (1)
-#endif
-
-#if !defined(CONFIG_M68040)
-#  define CPU_IS_040 (0)
-#  define MMU_IS_040 (0)
-#elif defined(CONFIG_M68020) || defined(CONFIG_M68030) || defined(CONFIG_M68060)
-#  define CPU_IS_040 (m68k_cputype & CPU_68040)
-#  define MMU_IS_040 (m68k_mmutype & MMU_68040)
-#else
-#  define CPU_M68040_ONLY
-#  define CPU_IS_040 (1)
-#  define MMU_IS_040 (1)
-#endif
-
-#if !defined(CONFIG_M68060)
-#  define CPU_IS_060 (0)
-#  define MMU_IS_060 (0)
-#elif defined(CONFIG_M68020) || defined(CONFIG_M68030) || defined(CONFIG_M68040)
-#  define CPU_IS_060 (m68k_cputype & CPU_68060)
-#  define MMU_IS_060 (m68k_mmutype & MMU_68060)
-#else
-#  define CPU_M68060_ONLY
-#  define CPU_IS_060 (1)
-#  define MMU_IS_060 (1)
-#endif
-
-#if !defined(CONFIG_M68020) && !defined(CONFIG_M68030)
-#  define CPU_IS_020_OR_030 (0)
-#else
-#  define CPU_M68020_OR_M68030
-#  if defined(CONFIG_M68040) || defined(CONFIG_M68060)
-#    define CPU_IS_020_OR_030 (!m68k_is040or060)
-#  else
-#    define CPU_M68020_OR_M68030_ONLY
-#    define CPU_IS_020_OR_030 (1)
-#  endif
-#endif
-
-#if !defined(CONFIG_M68040) && !defined(CONFIG_M68060)
-#  define CPU_IS_040_OR_060 (0)
-#else
-#  define CPU_M68040_OR_M68060
-#  if defined(CONFIG_M68020) || defined(CONFIG_M68030)
-#    define CPU_IS_040_OR_060 (m68k_is040or060)
-#  else
-#    define CPU_M68040_OR_M68060_ONLY
-#    define CPU_IS_040_OR_060 (1)
-#  endif
-#endif
-
-#define CPU_TYPE (m68k_cputype)
-
-#ifdef CONFIG_M68KFPU_EMU
-#  ifdef CONFIG_M68KFPU_EMU_ONLY
-#    define FPU_IS_EMU (1)
-#  else
-#    define FPU_IS_EMU (!m68k_fputype)
-#  endif
-#else
-#  define FPU_IS_EMU (0)
-#endif
-
-
-    /*
-     *  Miscellaneous
-     */
-
-#define NUM_MEMINFO     4
-
-#ifndef __ASSEMBLY__
-struct mem_info {
-        unsigned long addr;             /* physical address of memory chunk */
-        unsigned long size;             /* length of memory chunk (in bytes) */
-};
-
-extern int m68k_num_memory;             /* # of memory blocks found (and used) */
-extern int m68k_realnum_memory;         /* real # of memory blocks found */
-extern struct mem_info m68k_memory[NUM_MEMINFO];/* memory description */
-#endif
-
-#endif /* __KERNEL__ */
-
-#endif /* _M68K_SETUP_H */
diff --git a/arch/m68k/include/asm/setup_no.h b/arch/m68k/include/asm/setup_no.h
deleted file mode 100644
index 45d286ce9398..000000000000
--- a/arch/m68k/include/asm/setup_no.h
+++ /dev/null
@@ -1,10 +0,0 @@
-#ifdef __KERNEL__
-
-#include <asm/setup_mm.h>
-
-/* We have a bigger command line buffer. */
-#undef COMMAND_LINE_SIZE
-
-#endif  /*  __KERNEL__  */
-
-#define COMMAND_LINE_SIZE       512
diff --git a/arch/m68k/include/asm/sigcontext.h b/arch/m68k/include/asm/sigcontext.h
index bff6d40345a9..523db2a51cf3 100644
--- a/arch/m68k/include/asm/sigcontext.h
+++ b/arch/m68k/include/asm/sigcontext.h
@@ -1,5 +1,24 @@
+#ifndef _ASM_M68k_SIGCONTEXT_H
+#define _ASM_M68k_SIGCONTEXT_H
+
+struct sigcontext {
+        unsigned long  sc_mask;         /* old sigmask */
+        unsigned long  sc_usp;          /* old user stack pointer */
+        unsigned long  sc_d0;
+        unsigned long  sc_d1;
+        unsigned long  sc_a0;
+        unsigned long  sc_a1;
 #ifdef __uClinux__
-#include "sigcontext_no.h"
-#else
-#include "sigcontext_mm.h"
+        unsigned long  sc_a5;
+#endif
+        unsigned short sc_sr;
+        unsigned long  sc_pc;
+        unsigned short sc_formatvec;
+#ifndef __uClinux__
+        unsigned long  sc_fpregs[2*3];  /* room for two fp registers */
+        unsigned long  sc_fpcntl[3];
+        unsigned char  sc_fpstate[216];
+#endif
+};
+
 #endif
diff --git a/arch/m68k/include/asm/sigcontext_mm.h b/arch/m68k/include/asm/sigcontext_mm.h
deleted file mode 100644
index 64fbe34cf26f..000000000000
--- a/arch/m68k/include/asm/sigcontext_mm.h
+++ /dev/null
@@ -1,19 +0,0 @@
-#ifndef _ASM_M68k_SIGCONTEXT_H
-#define _ASM_M68k_SIGCONTEXT_H
-
-struct sigcontext {
-        unsigned long  sc_mask;         /* old sigmask */
-        unsigned long  sc_usp;          /* old user stack pointer */
-        unsigned long  sc_d0;
-        unsigned long  sc_d1;
-        unsigned long  sc_a0;
-        unsigned long  sc_a1;
-        unsigned short sc_sr;
-        unsigned long  sc_pc;
-        unsigned short sc_formatvec;
-        unsigned long  sc_fpregs[2*3];  /* room for two fp registers */
-        unsigned long  sc_fpcntl[3];
-        unsigned char  sc_fpstate[216];
-};
-
-#endif
diff --git a/arch/m68k/include/asm/sigcontext_no.h b/arch/m68k/include/asm/sigcontext_no.h
deleted file mode 100644
index 36c293fc133d..000000000000
--- a/arch/m68k/include/asm/sigcontext_no.h
+++ /dev/null
@@ -1,17 +0,0 @@
-#ifndef _ASM_M68KNOMMU_SIGCONTEXT_H
-#define _ASM_M68KNOMMU_SIGCONTEXT_H
-
-struct sigcontext {
-        unsigned long  sc_mask;         /* old sigmask */
-        unsigned long  sc_usp;          /* old user stack pointer */
-        unsigned long  sc_d0;
-        unsigned long  sc_d1;
-        unsigned long  sc_a0;
-        unsigned long  sc_a1;
-        unsigned long  sc_a5;
-        unsigned short sc_sr;
-        unsigned long  sc_pc;
-        unsigned short sc_formatvec;
-};
-
-#endif
diff --git a/arch/m68k/include/asm/siginfo.h b/arch/m68k/include/asm/siginfo.h
index 61219d7affc8..ca7dde8fd223 100644
--- a/arch/m68k/include/asm/siginfo.h
+++ b/arch/m68k/include/asm/siginfo.h
@@ -1,5 +1,97 @@
-#ifdef __uClinux__
-#include "siginfo_no.h"
+#ifndef _M68K_SIGINFO_H
+#define _M68K_SIGINFO_H
+
+#ifndef __uClinux__
+#define HAVE_ARCH_SIGINFO_T
+#define HAVE_ARCH_COPY_SIGINFO
+#endif
+
+#include <asm-generic/siginfo.h>
+
+#ifndef __uClinux__
+
+typedef struct siginfo {
+        int si_signo;
+        int si_errno;
+        int si_code;
+
+        union {
+                int _pad[SI_PAD_SIZE];
+
+                /* kill() */
+                struct {
+                        __kernel_pid_t _pid;    /* sender's pid */
+                        __kernel_uid_t _uid;    /* backwards compatibility */
+                        __kernel_uid32_t _uid32; /* sender's uid */
+                } _kill;
+
+                /* POSIX.1b timers */
+                struct {
+                        timer_t _tid;           /* timer id */
+                        int _overrun;           /* overrun count */
+                        char _pad[sizeof( __ARCH_SI_UID_T) - sizeof(int)];
+                        sigval_t _sigval;       /* same as below */
+                        int _sys_private;       /* not to be passed to user */
+                } _timer;
+
+                /* POSIX.1b signals */
+                struct {
+                        __kernel_pid_t _pid;    /* sender's pid */
+                        __kernel_uid_t _uid;    /* backwards compatibility */
+                        sigval_t _sigval;
+                        __kernel_uid32_t _uid32; /* sender's uid */
+                } _rt;
+
+                /* SIGCHLD */
+                struct {
+                        __kernel_pid_t _pid;    /* which child */
+                        __kernel_uid_t _uid;    /* backwards compatibility */
+                        int _status;            /* exit code */
+                        clock_t _utime;
+                        clock_t _stime;
+                        __kernel_uid32_t _uid32; /* sender's uid */
+                } _sigchld;
+
+                /* SIGILL, SIGFPE, SIGSEGV, SIGBUS */
+                struct {
+                        void *_addr; /* faulting insn/memory ref. */
+                } _sigfault;
+
+                /* SIGPOLL */
+                struct {
+                        int _band;      /* POLL_IN, POLL_OUT, POLL_MSG */
+                        int _fd;
+                } _sigpoll;
+        } _sifields;
+} siginfo_t;
+
+#define UID16_SIGINFO_COMPAT_NEEDED
+
+/*
+ * How these fields are to be accessed.
+ */
+#undef si_uid
+#ifdef __KERNEL__
+#define si_uid          _sifields._kill._uid32
+#define si_uid16        _sifields._kill._uid
 #else
-#include "siginfo_mm.h"
+#define si_uid          _sifields._kill._uid
+#endif
+
+#ifdef __KERNEL__
+
+#include <linux/string.h>
+
+static inline void copy_siginfo(struct siginfo *to, struct siginfo *from)
+{
+        if (from->si_code < 0)
+                memcpy(to, from, sizeof(*to));
+        else
+                /* _sigchld is currently the largest know union member */
+                memcpy(to, from, 3*sizeof(int) + sizeof(from->_sifields._sigchld));
+}
+
+#endif /* __KERNEL__ */
+#endif /* !__uClinux__ */
+
 #endif
diff --git a/arch/m68k/include/asm/siginfo_mm.h b/arch/m68k/include/asm/siginfo_mm.h
deleted file mode 100644
index 05a8d6d90b58..000000000000
--- a/arch/m68k/include/asm/siginfo_mm.h
+++ /dev/null
@@ -1,92 +0,0 @@
-#ifndef _M68K_SIGINFO_H
-#define _M68K_SIGINFO_H
-
-#define HAVE_ARCH_SIGINFO_T
-#define HAVE_ARCH_COPY_SIGINFO
-
-#include <asm-generic/siginfo.h>
-
-typedef struct siginfo {
-        int si_signo;
-        int si_errno;
-        int si_code;
-
-        union {
-                int _pad[SI_PAD_SIZE];
-
-                /* kill() */
-                struct {
-                        __kernel_pid_t _pid;    /* sender's pid */
-                        __kernel_uid_t _uid;    /* backwards compatibility */
-                        __kernel_uid32_t _uid32; /* sender's uid */
-                } _kill;
-
-                /* POSIX.1b timers */
-                struct {
-                        timer_t _tid;           /* timer id */
-                        int _overrun;           /* overrun count */
-                        char _pad[sizeof( __ARCH_SI_UID_T) - sizeof(int)];
-                        sigval_t _sigval;       /* same as below */
-                        int _sys_private;       /* not to be passed to user */
-                } _timer;
-
-                /* POSIX.1b signals */
-                struct {
-                        __kernel_pid_t _pid;    /* sender's pid */
-                        __kernel_uid_t _uid;    /* backwards compatibility */
-                        sigval_t _sigval;
-                        __kernel_uid32_t _uid32; /* sender's uid */
-                } _rt;
-
-                /* SIGCHLD */
-                struct {
-                        __kernel_pid_t _pid;    /* which child */
-                        __kernel_uid_t _uid;    /* backwards compatibility */
-                        int _status;            /* exit code */
-                        clock_t _utime;
-                        clock_t _stime;
-                        __kernel_uid32_t _uid32; /* sender's uid */
-                } _sigchld;
-
-                /* SIGILL, SIGFPE, SIGSEGV, SIGBUS */
-                struct {
-                        void *_addr; /* faulting insn/memory ref. */
-                } _sigfault;
-
-                /* SIGPOLL */
-                struct {
-                        int _band;      /* POLL_IN, POLL_OUT, POLL_MSG */
-                        int _fd;
-                } _sigpoll;
-        } _sifields;
-} siginfo_t;
-
-#define UID16_SIGINFO_COMPAT_NEEDED
-
-/*
- * How these fields are to be accessed.
- */
-#undef si_uid
-#ifdef __KERNEL__
-#define si_uid          _sifields._kill._uid32
-#define si_uid16        _sifields._kill._uid
-#else
-#define si_uid          _sifields._kill._uid
-#endif
-
-#ifdef __KERNEL__
-
-#include <linux/string.h>
-
-static inline void copy_siginfo(struct siginfo *to, struct siginfo *from)
-{
-        if (from->si_code < 0)
-                memcpy(to, from, sizeof(*to));
-        else
-                /* _sigchld is currently the largest know union member */
-                memcpy(to, from, 3*sizeof(int) + sizeof(from->_sifields._sigchld));
-}
-
-#endif /* __KERNEL__ */
-
-#endif
diff --git a/arch/m68k/include/asm/siginfo_no.h b/arch/m68k/include/asm/siginfo_no.h
deleted file mode 100644
index b18e5f4064ae..000000000000
--- a/arch/m68k/include/asm/siginfo_no.h
+++ /dev/null
@@ -1,6 +0,0 @@
-#ifndef _M68KNOMMU_SIGINFO_H
-#define _M68KNOMMU_SIGINFO_H
-
-#include <asm-generic/siginfo.h>
-
-#endif
diff --git a/arch/m68k/include/asm/signal.h b/arch/m68k/include/asm/signal.h
index 3c19988bd93c..08788fdefde0 100644
--- a/arch/m68k/include/asm/signal.h
+++ b/arch/m68k/include/asm/signal.h
@@ -1,5 +1,213 @@
-#ifdef __uClinux__
-#include "signal_no.h"
+#ifndef _M68K_SIGNAL_H
+#define _M68K_SIGNAL_H
+
+#include <linux/types.h>
+
+/* Avoid too many header ordering problems.  */
+struct siginfo;
+
+#ifdef __KERNEL__
+/* Most things should be clean enough to redefine this at will, if care
+   is taken to make libc match.  */
+
+#define _NSIG           64
+#define _NSIG_BPW       32
+#define _NSIG_WORDS     (_NSIG / _NSIG_BPW)
+
+typedef unsigned long old_sigset_t;             /* at least 32 bits */
+
+typedef struct {
+        unsigned long sig[_NSIG_WORDS];
+} sigset_t;
+
 #else
-#include "signal_mm.h"
-#endif
+/* Here we must cater to libcs that poke about in kernel headers.  */
+
+#define NSIG            32
+typedef unsigned long sigset_t;
+
+#endif /* __KERNEL__ */
+
+#define SIGHUP           1
+#define SIGINT           2
+#define SIGQUIT          3
+#define SIGILL           4
+#define SIGTRAP          5
+#define SIGABRT          6
+#define SIGIOT           6
+#define SIGBUS           7
+#define SIGFPE           8
+#define SIGKILL          9
+#define SIGUSR1         10
+#define SIGSEGV         11
+#define SIGUSR2         12
+#define SIGPIPE         13
+#define SIGALRM         14
+#define SIGTERM         15
+#define SIGSTKFLT       16
+#define SIGCHLD         17
+#define SIGCONT         18
+#define SIGSTOP         19
+#define SIGTSTP         20
+#define SIGTTIN         21
+#define SIGTTOU         22
+#define SIGURG          23
+#define SIGXCPU         24
+#define SIGXFSZ         25
+#define SIGVTALRM       26
+#define SIGPROF         27
+#define SIGWINCH        28
+#define SIGIO           29
+#define SIGPOLL         SIGIO
+/*
+#define SIGLOST         29
+*/
+#define SIGPWR          30
+#define SIGSYS          31
+#define SIGUNUSED       31
+
+/* These should not be considered constants from userland.  */
+#define SIGRTMIN        32
+#define SIGRTMAX        _NSIG
+
+/*
+ * SA_FLAGS values:
+ *
+ * SA_ONSTACK indicates that a registered stack_t will be used.
+ * SA_RESTART flag to get restarting signals (which were the default long ago)
+ * SA_NOCLDSTOP flag to turn off SIGCHLD when children stop.
+ * SA_RESETHAND clears the handler when the signal is delivered.
+ * SA_NOCLDWAIT flag on SIGCHLD to inhibit zombies.
+ * SA_NODEFER prevents the current signal from being masked in the handler.
+ *
+ * SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single
+ * Unix names RESETHAND and NODEFER respectively.
+ */
+#define SA_NOCLDSTOP    0x00000001
+#define SA_NOCLDWAIT    0x00000002
+#define SA_SIGINFO      0x00000004
+#define SA_ONSTACK      0x08000000
+#define SA_RESTART      0x10000000
+#define SA_NODEFER      0x40000000
+#define SA_RESETHAND    0x80000000
+
+#define SA_NOMASK       SA_NODEFER
+#define SA_ONESHOT      SA_RESETHAND
+
+/*
+ * sigaltstack controls
+ */
+#define SS_ONSTACK      1
+#define SS_DISABLE      2
+
+#define MINSIGSTKSZ     2048
+#define SIGSTKSZ        8192
+
+#include <asm-generic/signal.h>
+
+#ifdef __KERNEL__
+struct old_sigaction {
+        __sighandler_t sa_handler;
+        old_sigset_t sa_mask;
+        unsigned long sa_flags;
+        __sigrestore_t sa_restorer;
+};
+
+struct sigaction {
+        __sighandler_t sa_handler;
+        unsigned long sa_flags;
+        __sigrestore_t sa_restorer;
+        sigset_t sa_mask;               /* mask last for extensibility */
+};
+
+struct k_sigaction {
+        struct sigaction sa;
+};
+#else
+/* Here we must cater to libcs that poke about in kernel headers.  */
+
+struct sigaction {
+        union {
+          __sighandler_t _sa_handler;
+          void (*_sa_sigaction)(int, struct siginfo *, void *);
+        } _u;
+        sigset_t sa_mask;
+        unsigned long sa_flags;
+        void (*sa_restorer)(void);
+};
+
+#define sa_handler      _u._sa_handler
+#define sa_sigaction    _u._sa_sigaction
+
+#endif /* __KERNEL__ */
+
+typedef struct sigaltstack {
+        void __user *ss_sp;
+        int ss_flags;
+        size_t ss_size;
+} stack_t;
+
+#ifdef __KERNEL__
+#include <asm/sigcontext.h>
+
+#ifndef __uClinux__
+#define __HAVE_ARCH_SIG_BITOPS
+
+static inline void sigaddset(sigset_t *set, int _sig)
+{
+        asm ("bfset %0{%1,#1}"
+                : "+od" (*set)
+                : "id" ((_sig - 1) ^ 31)
+                : "cc");
+}
+
+static inline void sigdelset(sigset_t *set, int _sig)
+{
+        asm ("bfclr %0{%1,#1}"
+                : "+od" (*set)
+                : "id" ((_sig - 1) ^ 31)
+                : "cc");
+}
+
+static inline int __const_sigismember(sigset_t *set, int _sig)
+{
+        unsigned long sig = _sig - 1;
+        return 1 & (set->sig[sig / _NSIG_BPW] >> (sig % _NSIG_BPW));
+}
+
+static inline int __gen_sigismember(sigset_t *set, int _sig)
+{
+        int ret;
+        asm ("bfextu %1{%2,#1},%0"
+                : "=d" (ret)
+                : "od" (*set), "id" ((_sig-1) ^ 31)
+                : "cc");
+        return ret;
+}
+
+#define sigismember(set,sig)                    \
+        (__builtin_constant_p(sig) ?            \
+         __const_sigismember(set,sig) :         \
+         __gen_sigismember(set,sig))
+
+static inline int sigfindinword(unsigned long word)
+{
+        asm ("bfffo %1{#0,#0},%0"
+                : "=d" (word)
+                : "d" (word & -word)
+                : "cc");
+        return word ^ 31;
+}
+
+struct pt_regs;
+extern void ptrace_signal_deliver(struct pt_regs *regs, void *cookie);
+
+#else
+
+#undef __HAVE_ARCH_SIG_BITOPS
+#define ptrace_signal_deliver(regs, cookie) do { } while (0)
+
+#endif /* __uClinux__ */
+#endif /* __KERNEL__ */
+
+#endif /* _M68K_SIGNAL_H */
diff --git a/arch/m68k/include/asm/signal_mm.h b/arch/m68k/include/asm/signal_mm.h
deleted file mode 100644
index 3db8a81942f1..000000000000
--- a/arch/m68k/include/asm/signal_mm.h
+++ /dev/null
@@ -1,206 +0,0 @@
-#ifndef _M68K_SIGNAL_H
-#define _M68K_SIGNAL_H
-
-#include <linux/types.h>
-
-/* Avoid too many header ordering problems.  */
-struct siginfo;
-
-#ifdef __KERNEL__
-/* Most things should be clean enough to redefine this at will, if care
-   is taken to make libc match.  */
-
-#define _NSIG           64
-#define _NSIG_BPW       32
-#define _NSIG_WORDS     (_NSIG / _NSIG_BPW)
-
-typedef unsigned long old_sigset_t;             /* at least 32 bits */
-
-typedef struct {
-        unsigned long sig[_NSIG_WORDS];
-} sigset_t;
-
-#else
-/* Here we must cater to libcs that poke about in kernel headers.  */
-
-#define NSIG            32
-typedef unsigned long sigset_t;
-
-#endif /* __KERNEL__ */
-
-#define SIGHUP           1
-#define SIGINT           2
-#define SIGQUIT          3
-#define SIGILL           4
-#define SIGTRAP          5
-#define SIGABRT          6
-#define SIGIOT           6
-#define SIGBUS           7
-#define SIGFPE           8
-#define SIGKILL          9
-#define SIGUSR1         10
-#define SIGSEGV         11
-#define SIGUSR2         12
-#define SIGPIPE         13
-#define SIGALRM         14
-#define SIGTERM         15
-#define SIGSTKFLT       16
-#define SIGCHLD         17
-#define SIGCONT         18
-#define SIGSTOP         19
-#define SIGTSTP         20
-#define SIGTTIN         21
-#define SIGTTOU         22
-#define SIGURG          23
-#define SIGXCPU         24
-#define SIGXFSZ         25
-#define SIGVTALRM       26
-#define SIGPROF         27
-#define SIGWINCH        28
-#define SIGIO           29
-#define SIGPOLL         SIGIO
-/*
-#define SIGLOST         29
-*/
-#define SIGPWR          30
-#define SIGSYS          31
-#define SIGUNUSED       31
-
-/* These should not be considered constants from userland.  */
-#define SIGRTMIN        32
-#define SIGRTMAX        _NSIG
-
-/*
- * SA_FLAGS values:
- *
- * SA_ONSTACK indicates that a registered stack_t will be used.
- * SA_RESTART flag to get restarting signals (which were the default long ago)
- * SA_NOCLDSTOP flag to turn off SIGCHLD when children stop.
- * SA_RESETHAND clears the handler when the signal is delivered.
- * SA_NOCLDWAIT flag on SIGCHLD to inhibit zombies.
- * SA_NODEFER prevents the current signal from being masked in the handler.
- *
- * SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single
- * Unix names RESETHAND and NODEFER respectively.
- */
-#define SA_NOCLDSTOP    0x00000001
-#define SA_NOCLDWAIT    0x00000002
-#define SA_SIGINFO      0x00000004
-#define SA_ONSTACK      0x08000000
-#define SA_RESTART      0x10000000
-#define SA_NODEFER      0x40000000
-#define SA_RESETHAND    0x80000000
-
-#define SA_NOMASK       SA_NODEFER
-#define SA_ONESHOT      SA_RESETHAND
-
-/*
- * sigaltstack controls
- */
-#define SS_ONSTACK      1
-#define SS_DISABLE      2
-
-#define MINSIGSTKSZ     2048
-#define SIGSTKSZ        8192
-
-#include <asm-generic/signal.h>
-
-#ifdef __KERNEL__
-struct old_sigaction {
-        __sighandler_t sa_handler;
-        old_sigset_t sa_mask;
-        unsigned long sa_flags;
-        __sigrestore_t sa_restorer;
-};
-
-struct sigaction {
-        __sighandler_t sa_handler;
-        unsigned long sa_flags;
-        __sigrestore_t sa_restorer;
-        sigset_t sa_mask;               /* mask last for extensibility */
-};
-
-struct k_sigaction {
-        struct sigaction sa;
-};
-#else
-/* Here we must cater to libcs that poke about in kernel headers.  */
-
-struct sigaction {
-        union {
-          __sighandler_t _sa_handler;
-          void (*_sa_sigaction)(int, struct siginfo *, void *);
-        } _u;
-        sigset_t sa_mask;
-        unsigned long sa_flags;
-        void (*sa_restorer)(void);
-};
-
-#define sa_handler      _u._sa_handler
-#define sa_sigaction    _u._sa_sigaction
-
-#endif /* __KERNEL__ */
-
-typedef struct sigaltstack {
-        void __user *ss_sp;
-        int ss_flags;
-        size_t ss_size;
-} stack_t;
-
-#ifdef __KERNEL__
-#include <asm/sigcontext.h>
-
-#define __HAVE_ARCH_SIG_BITOPS
-
-static inline void sigaddset(sigset_t *set, int _sig)
-{
-        asm ("bfset %0{%1,#1}"
-                : "+od" (*set)
-                : "id" ((_sig - 1) ^ 31)
-                : "cc");
-}
-
-static inline void sigdelset(sigset_t *set, int _sig)
-{
-        asm ("bfclr %0{%1,#1}"
-                : "+od" (*set)
-                : "id" ((_sig - 1) ^ 31)
-                : "cc");
-}
-
-static inline int __const_sigismember(sigset_t *set, int _sig)
-{
-        unsigned long sig = _sig - 1;
-        return 1 & (set->sig[sig / _NSIG_BPW] >> (sig % _NSIG_BPW));
-}
-
-static inline int __gen_sigismember(sigset_t *set, int _sig)
-{
-        int ret;
-        asm ("bfextu %1{%2,#1},%0"
-                : "=d" (ret)
-                : "od" (*set), "id" ((_sig-1) ^ 31)
-                : "cc");
-        return ret;
-}
-
-#define sigismember(set,sig)                    \
-        (__builtin_constant_p(sig) ?            \
-         __const_sigismember(set,sig) :         \
-         __gen_sigismember(set,sig))
-
-static inline int sigfindinword(unsigned long word)
-{
-        asm ("bfffo %1{#0,#0},%0"
-                : "=d" (word)
-                : "d" (word & -word)
-                : "cc");
-        return word ^ 31;
-}
-
-struct pt_regs;
-extern void ptrace_signal_deliver(struct pt_regs *regs, void *cookie);
-
-#endif /* __KERNEL__ */
-
-#endif /* _M68K_SIGNAL_H */
diff --git a/arch/m68k/include/asm/signal_no.h b/arch/m68k/include/asm/signal_no.h
deleted file mode 100644
index 216c08be54a0..000000000000
--- a/arch/m68k/include/asm/signal_no.h
+++ /dev/null
@@ -1,159 +0,0 @@
-#ifndef _M68KNOMMU_SIGNAL_H
-#define _M68KNOMMU_SIGNAL_H
-
-#include <linux/types.h>
-
-/* Avoid too many header ordering problems.  */
-struct siginfo;
-
-#ifdef __KERNEL__
-/* Most things should be clean enough to redefine this at will, if care
-   is taken to make libc match.  */
-
-#define _NSIG           64
-#define _NSIG_BPW       32
-#define _NSIG_WORDS     (_NSIG / _NSIG_BPW)
-
-typedef unsigned long old_sigset_t;             /* at least 32 bits */
-
-typedef struct {
-        unsigned long sig[_NSIG_WORDS];
-} sigset_t;
-
-#else
-/* Here we must cater to libcs that poke about in kernel headers.  */
-
-#define NSIG            32
-typedef unsigned long sigset_t;
-
-#endif /* __KERNEL__ */
-
-#define SIGHUP           1
-#define SIGINT           2
-#define SIGQUIT          3
-#define SIGILL           4
-#define SIGTRAP          5
-#define SIGABRT          6
-#define SIGIOT           6
-#define SIGBUS           7
-#define SIGFPE           8
-#define SIGKILL          9
-#define SIGUSR1         10
-#define SIGSEGV         11
-#define SIGUSR2         12
-#define SIGPIPE         13
-#define SIGALRM         14
-#define SIGTERM         15
-#define SIGSTKFLT       16
-#define SIGCHLD         17
-#define SIGCONT         18
-#define SIGSTOP         19
-#define SIGTSTP         20
-#define SIGTTIN         21
-#define SIGTTOU         22
-#define SIGURG          23
-#define SIGXCPU         24
-#define SIGXFSZ         25
-#define SIGVTALRM       26
-#define SIGPROF         27
-#define SIGWINCH        28
-#define SIGIO           29
-#define SIGPOLL         SIGIO
-/*
-#define SIGLOST         29
-*/
-#define SIGPWR          30
-#define SIGSYS          31
-#define SIGUNUSED       31
-
-/* These should not be considered constants from userland.  */
-#define SIGRTMIN        32
-#define SIGRTMAX        _NSIG
-
-/*
- * SA_FLAGS values:
- *
- * SA_ONSTACK indicates that a registered stack_t will be used.
- * SA_RESTART flag to get restarting signals (which were the default long ago)
- * SA_NOCLDSTOP flag to turn off SIGCHLD when children stop.
- * SA_RESETHAND clears the handler when the signal is delivered.
- * SA_NOCLDWAIT flag on SIGCHLD to inhibit zombies.
- * SA_NODEFER prevents the current signal from being masked in the handler.
- *
- * SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single
- * Unix names RESETHAND and NODEFER respectively.
- */
-#define SA_NOCLDSTOP    0x00000001
-#define SA_NOCLDWAIT    0x00000002
-#define SA_SIGINFO      0x00000004
-#define SA_ONSTACK      0x08000000
-#define SA_RESTART      0x10000000
-#define SA_NODEFER      0x40000000
-#define SA_RESETHAND    0x80000000
-
-#define SA_NOMASK       SA_NODEFER
-#define SA_ONESHOT      SA_RESETHAND
-
-/* 
- * sigaltstack controls
- */
-#define SS_ONSTACK      1
-#define SS_DISABLE      2
-
-#define MINSIGSTKSZ     2048
-#define SIGSTKSZ        8192
-
-#include <asm-generic/signal.h>
-
-#ifdef __KERNEL__
-struct old_sigaction {
-        __sighandler_t sa_handler;
-        old_sigset_t sa_mask;
-        unsigned long sa_flags;
-        void (*sa_restorer)(void);
-};
-
-struct sigaction {
-        __sighandler_t sa_handler;
-        unsigned long sa_flags;
-        void (*sa_restorer)(void);
-        sigset_t sa_mask;               /* mask last for extensibility */
-};
-
-struct k_sigaction {
-        struct sigaction sa;
-};
-#else
-/* Here we must cater to libcs that poke about in kernel headers.  */
-
-struct sigaction {
-        union {
-          __sighandler_t _sa_handler;
-          void (*_sa_sigaction)(int, struct siginfo *, void *);
-        } _u;
-        sigset_t sa_mask;
-        unsigned long sa_flags;
-        void (*sa_restorer)(void);
-};
-
-#define sa_handler      _u._sa_handler
-#define sa_sigaction    _u._sa_sigaction
-
-#endif /* __KERNEL__ */
-
-typedef struct sigaltstack {
-        void *ss_sp;
-        int ss_flags;
-        size_t ss_size;
-} stack_t;
-
-#ifdef __KERNEL__
-
-#include <asm/sigcontext.h>
-#undef __HAVE_ARCH_SIG_BITOPS
-
-#define ptrace_signal_deliver(regs, cookie) do { } while (0)
-
-#endif /* __KERNEL__ */
-
-#endif /* _M68KNOMMU_SIGNAL_H */
diff --git a/arch/m68k/include/asm/socket.h b/arch/m68k/include/asm/socket.h
index dbc64e92c41a..ca87f938b03f 100644
--- a/arch/m68k/include/asm/socket.h
+++ b/arch/m68k/include/asm/socket.h
@@ -54,4 +54,7 @@
 
 #define SO_MARK                 36
 
+#define SO_TIMESTAMPING         37
+#define SCM_TIMESTAMPING        SO_TIMESTAMPING
+
 #endif /* _ASM_SOCKET_H */
diff --git a/arch/m68k/include/asm/swab.h b/arch/m68k/include/asm/swab.h
index 7d7dde1c73ec..9e3054ea59e9 100644
--- a/arch/m68k/include/asm/swab.h
+++ b/arch/m68k/include/asm/swab.h
@@ -1,5 +1,27 @@
-#ifdef __uClinux__
-#include "swab_no.h"
-#else
-#include "swab_mm.h"
+#ifndef _M68K_SWAB_H
+#define _M68K_SWAB_H
+
+#include <asm/types.h>
+#include <linux/compiler.h>
+
+#define __SWAB_64_THRU_32__
+
+#if defined (__mcfisaaplus__) || defined (__mcfisac__)
+static inline __attribute_const__ __u32 __arch_swab32(__u32 val)
+{
+        __asm__("byterev %0" : "=d" (val) : "0" (val));
+        return val;
+}
+
+#define __arch_swab32 __arch_swab32
+#elif !defined(__uClinux__)
+
+static inline __attribute_const__ __u32 __arch_swab32(__u32 val)
+{
+        __asm__("rolw #8,%0; swap %0; rolw #8,%0" : "=d" (val) : "0" (val));
+        return val;
+}
+#define __arch_swab32 __arch_swab32
 #endif
+
+#endif /* _M68K_SWAB_H */
diff --git a/arch/m68k/include/asm/swab_mm.h b/arch/m68k/include/asm/swab_mm.h
deleted file mode 100644
index 7221e3066825..000000000000
--- a/arch/m68k/include/asm/swab_mm.h
+++ /dev/null
@@ -1,16 +0,0 @@
-#ifndef _M68K_SWAB_H
-#define _M68K_SWAB_H
-
-#include <asm/types.h>
-#include <linux/compiler.h>
-
-#define __SWAB_64_THRU_32__
-
-static inline __attribute_const__ __u32 __arch_swab32(__u32 val)
-{
-        __asm__("rolw #8,%0; swap %0; rolw #8,%0" : "=d" (val) : "0" (val));
-        return val;
-}
-#define __arch_swab32 __arch_swab32
-
-#endif /* _M68K_SWAB_H */
diff --git a/arch/m68k/include/asm/swab_no.h b/arch/m68k/include/asm/swab_no.h
deleted file mode 100644
index e582257db300..000000000000
--- a/arch/m68k/include/asm/swab_no.h
+++ /dev/null
@@ -1,24 +0,0 @@
-#ifndef _M68KNOMMU_SWAB_H
-#define _M68KNOMMU_SWAB_H
-
-#include <linux/types.h>
-
-#if defined(__GNUC__) && !defined(__STRICT_ANSI__) || defined(__KERNEL__)
-#  define __SWAB_64_THRU_32__
-#endif
-
-#if defined (__mcfisaaplus__) || defined (__mcfisac__)
-static inline __attribute_const__ __u32 __arch_swab32(__u32 val)
-{
-        asm(
-                        "byterev %0"
-                        : "=d" (val)
-                        : "0" (val)
-           );
-        return val;
-}
-
-#define __arch_swab32 __arch_swab32
-#endif
-
-#endif /* _M68KNOMMU_SWAB_H */
diff --git a/arch/m68k/include/asm/unistd.h b/arch/m68k/include/asm/unistd.h
index df1d9d4cb1fd..3c19027331fa 100644
--- a/arch/m68k/include/asm/unistd.h
+++ b/arch/m68k/include/asm/unistd.h
@@ -1,5 +1,372 @@
-#ifdef __uClinux__
-#include "unistd_no.h"
-#else
-#include "unistd_mm.h"
-#endif
+#ifndef _ASM_M68K_UNISTD_H_
+#define _ASM_M68K_UNISTD_H_
+
+/*
+ * This file contains the system call numbers.
+ */
+
+#define __NR_restart_syscall      0
+#define __NR_exit                 1
+#define __NR_fork                 2
+#define __NR_read                 3
+#define __NR_write                4
+#define __NR_open                 5
+#define __NR_close                6
+#define __NR_waitpid              7
+#define __NR_creat                8
+#define __NR_link                 9
+#define __NR_unlink              10
+#define __NR_execve              11
+#define __NR_chdir               12
+#define __NR_time                13
+#define __NR_mknod               14
+#define __NR_chmod               15
+#define __NR_chown               16
+#define __NR_break               17
+#define __NR_oldstat             18
+#define __NR_lseek               19
+#define __NR_getpid              20
+#define __NR_mount               21
+#define __NR_umount              22
+#define __NR_setuid              23
+#define __NR_getuid              24
+#define __NR_stime               25
+#define __NR_ptrace              26
+#define __NR_alarm               27
+#define __NR_oldfstat            28
+#define __NR_pause               29
+#define __NR_utime               30
+#define __NR_stty                31
+#define __NR_gtty                32
+#define __NR_access              33
+#define __NR_nice                34
+#define __NR_ftime               35
+#define __NR_sync                36
+#define __NR_kill                37
+#define __NR_rename              38
+#define __NR_mkdir               39
+#define __NR_rmdir               40
+#define __NR_dup                 41
+#define __NR_pipe                42
+#define __NR_times               43
+#define __NR_prof                44
+#define __NR_brk                 45
+#define __NR_setgid              46
+#define __NR_getgid              47
+#define __NR_signal              48
+#define __NR_geteuid             49
+#define __NR_getegid             50
+#define __NR_acct                51
+#define __NR_umount2             52
+#define __NR_lock                53
+#define __NR_ioctl               54
+#define __NR_fcntl               55
+#define __NR_mpx                 56
+#define __NR_setpgid             57
+#define __NR_ulimit              58
+#define __NR_oldolduname         59
+#define __NR_umask               60
+#define __NR_chroot              61
+#define __NR_ustat               62
+#define __NR_dup2                63
+#define __NR_getppid             64
+#define __NR_getpgrp             65
+#define __NR_setsid              66
+#define __NR_sigaction           67
+#define __NR_sgetmask            68
+#define __NR_ssetmask            69
+#define __NR_setreuid            70
+#define __NR_setregid            71
+#define __NR_sigsuspend          72
+#define __NR_sigpending          73
+#define __NR_sethostname         74
+#define __NR_setrlimit           75
+#define __NR_getrlimit           76
+#define __NR_getrusage           77
+#define __NR_gettimeofday        78
+#define __NR_settimeofday        79
+#define __NR_getgroups           80
+#define __NR_setgroups           81
+#define __NR_select              82
+#define __NR_symlink             83
+#define __NR_oldlstat            84
+#define __NR_readlink            85
+#define __NR_uselib              86
+#define __NR_swapon              87
+#define __NR_reboot              88
+#define __NR_readdir             89
+#define __NR_mmap                90
+#define __NR_munmap              91
+#define __NR_truncate            92
+#define __NR_ftruncate           93
+#define __NR_fchmod              94
+#define __NR_fchown              95
+#define __NR_getpriority         96
+#define __NR_setpriority         97
+#define __NR_profil              98
+#define __NR_statfs              99
+#define __NR_fstatfs            100
+#define __NR_ioperm             101
+#define __NR_socketcall         102
+#define __NR_syslog             103
+#define __NR_setitimer          104
+#define __NR_getitimer          105
+#define __NR_stat               106
+#define __NR_lstat              107
+#define __NR_fstat              108
+#define __NR_olduname           109
+#define __NR_iopl               /* 110 */ not supported
+#define __NR_vhangup            111
+#define __NR_idle               /* 112 */ Obsolete
+#define __NR_vm86               /* 113 */ not supported
+#define __NR_wait4              114
+#define __NR_swapoff            115
+#define __NR_sysinfo            116
+#define __NR_ipc                117
+#define __NR_fsync              118
+#define __NR_sigreturn          119
+#define __NR_clone              120
+#define __NR_setdomainname      121
+#define __NR_uname              122
+#define __NR_cacheflush         123
+#define __NR_adjtimex           124
+#define __NR_mprotect           125
+#define __NR_sigprocmask        126
+#define __NR_create_module      127
+#define __NR_init_module        128
+#define __NR_delete_module      129
+#define __NR_get_kernel_syms    130
+#define __NR_quotactl           131
+#define __NR_getpgid            132
+#define __NR_fchdir             133
+#define __NR_bdflush            134
+#define __NR_sysfs              135
+#define __NR_personality        136
+#define __NR_afs_syscall        137 /* Syscall for Andrew File System */
+#define __NR_setfsuid           138
+#define __NR_setfsgid           139
+#define __NR__llseek            140
+#define __NR_getdents           141
+#define __NR__newselect         142
+#define __NR_flock              143
+#define __NR_msync              144
+#define __NR_readv              145
+#define __NR_writev             146
+#define __NR_getsid             147
+#define __NR_fdatasync          148
+#define __NR__sysctl            149
+#define __NR_mlock              150
+#define __NR_munlock            151
+#define __NR_mlockall           152
+#define __NR_munlockall         153
+#define __NR_sched_setparam             154
+#define __NR_sched_getparam             155
+#define __NR_sched_setscheduler         156
+#define __NR_sched_getscheduler         157
+#define __NR_sched_yield                158
+#define __NR_sched_get_priority_max     159
+#define __NR_sched_get_priority_min     160
+#define __NR_sched_rr_get_interval      161
+#define __NR_nanosleep          162
+#define __NR_mremap             163
+#define __NR_setresuid          164
+#define __NR_getresuid          165
+#define __NR_getpagesize        166
+#define __NR_query_module       167
+#define __NR_poll               168
+#define __NR_nfsservctl         169
+#define __NR_setresgid          170
+#define __NR_getresgid          171
+#define __NR_prctl              172
+#define __NR_rt_sigreturn       173
+#define __NR_rt_sigaction       174
+#define __NR_rt_sigprocmask     175
+#define __NR_rt_sigpending      176
+#define __NR_rt_sigtimedwait    177
+#define __NR_rt_sigqueueinfo    178
+#define __NR_rt_sigsuspend      179
+#define __NR_pread64            180
+#define __NR_pwrite64           181
+#define __NR_lchown             182
+#define __NR_getcwd             183
+#define __NR_capget             184
+#define __NR_capset             185
+#define __NR_sigaltstack        186
+#define __NR_sendfile           187
+#define __NR_getpmsg            188     /* some people actually want streams */
+#define __NR_putpmsg            189     /* some people actually want streams */
+#define __NR_vfork              190
+#define __NR_ugetrlimit         191
+#define __NR_mmap2              192
+#define __NR_truncate64         193
+#define __NR_ftruncate64        194
+#define __NR_stat64             195
+#define __NR_lstat64            196
+#define __NR_fstat64            197
+#define __NR_chown32            198
+#define __NR_getuid32           199
+#define __NR_getgid32           200
+#define __NR_geteuid32          201
+#define __NR_getegid32          202
+#define __NR_setreuid32         203
+#define __NR_setregid32         204
+#define __NR_getgroups32        205
+#define __NR_setgroups32        206
+#define __NR_fchown32           207
+#define __NR_setresuid32        208
+#define __NR_getresuid32        209
+#define __NR_setresgid32        210
+#define __NR_getresgid32        211
+#define __NR_lchown32           212
+#define __NR_setuid32           213
+#define __NR_setgid32           214
+#define __NR_setfsuid32         215
+#define __NR_setfsgid32         216
+#define __NR_pivot_root         217
+#define __NR_getdents64         220
+#define __NR_gettid             221
+#define __NR_tkill              222
+#define __NR_setxattr           223
+#define __NR_lsetxattr          224
+#define __NR_fsetxattr          225
+#define __NR_getxattr           226
+#define __NR_lgetxattr          227
+#define __NR_fgetxattr          228
+#define __NR_listxattr          229
+#define __NR_llistxattr         230
+#define __NR_flistxattr         231
+#define __NR_removexattr        232
+#define __NR_lremovexattr       233
+#define __NR_fremovexattr       234
+#define __NR_futex              235
+#define __NR_sendfile64         236
+#define __NR_mincore            237
+#define __NR_madvise            238
+#define __NR_fcntl64            239
+#define __NR_readahead          240
+#define __NR_io_setup           241
+#define __NR_io_destroy         242
+#define __NR_io_getevents       243
+#define __NR_io_submit          244
+#define __NR_io_cancel          245
+#define __NR_fadvise64          246
+#define __NR_exit_group         247
+#define __NR_lookup_dcookie     248
+#define __NR_epoll_create       249
+#define __NR_epoll_ctl          250
+#define __NR_epoll_wait         251
+#define __NR_remap_file_pages   252
+#define __NR_set_tid_address    253
+#define __NR_timer_create       254
+#define __NR_timer_settime      255
+#define __NR_timer_gettime      256
+#define __NR_timer_getoverrun   257
+#define __NR_timer_delete       258
+#define __NR_clock_settime      259
+#define __NR_clock_gettime      260
+#define __NR_clock_getres       261
+#define __NR_clock_nanosleep    262
+#define __NR_statfs64           263
+#define __NR_fstatfs64          264
+#define __NR_tgkill             265
+#define __NR_utimes             266
+#define __NR_fadvise64_64       267
+#define __NR_mbind              268
+#define __NR_get_mempolicy      269
+#define __NR_set_mempolicy      270
+#define __NR_mq_open            271
+#define __NR_mq_unlink          272
+#define __NR_mq_timedsend       273
+#define __NR_mq_timedreceive    274
+#define __NR_mq_notify          275
+#define __NR_mq_getsetattr      276
+#define __NR_waitid             277
+#define __NR_vserver            278
+#define __NR_add_key            279
+#define __NR_request_key        280
+#define __NR_keyctl             281
+#define __NR_ioprio_set         282
+#define __NR_ioprio_get         283
+#define __NR_inotify_init       284
+#define __NR_inotify_add_watch  285
+#define __NR_inotify_rm_watch   286
+#define __NR_migrate_pages      287
+#define __NR_openat             288
+#define __NR_mkdirat            289
+#define __NR_mknodat            290
+#define __NR_fchownat           291
+#define __NR_futimesat          292
+#define __NR_fstatat64          293
+#define __NR_unlinkat           294
+#define __NR_renameat           295
+#define __NR_linkat             296
+#define __NR_symlinkat          297
+#define __NR_readlinkat         298
+#define __NR_fchmodat           299
+#define __NR_faccessat          300
+#define __NR_pselect6           301
+#define __NR_ppoll              302
+#define __NR_unshare            303
+#define __NR_set_robust_list    304
+#define __NR_get_robust_list    305
+#define __NR_splice             306
+#define __NR_sync_file_range    307
+#define __NR_tee                308
+#define __NR_vmsplice           309
+#define __NR_move_pages         310
+#define __NR_sched_setaffinity  311
+#define __NR_sched_getaffinity  312
+#define __NR_kexec_load         313
+#define __NR_getcpu             314
+#define __NR_epoll_pwait        315
+#define __NR_utimensat          316
+#define __NR_signalfd           317
+#define __NR_timerfd_create     318
+#define __NR_eventfd            319
+#define __NR_fallocate          320
+#define __NR_timerfd_settime    321
+#define __NR_timerfd_gettime    322
+#define __NR_signalfd4          323
+#define __NR_eventfd2           324
+#define __NR_epoll_create1      325
+#define __NR_dup3               326
+#define __NR_pipe2              327
+#define __NR_inotify_init1      328
+
+#ifdef __KERNEL__
+
+#define NR_syscalls             329
+
+#define __ARCH_WANT_IPC_PARSE_VERSION
+#define __ARCH_WANT_OLD_READDIR
+#define __ARCH_WANT_OLD_STAT
+#define __ARCH_WANT_STAT64
+#define __ARCH_WANT_SYS_ALARM
+#define __ARCH_WANT_SYS_GETHOSTNAME
+#define __ARCH_WANT_SYS_PAUSE
+#define __ARCH_WANT_SYS_SGETMASK
+#define __ARCH_WANT_SYS_SIGNAL
+#define __ARCH_WANT_SYS_TIME
+#define __ARCH_WANT_SYS_UTIME
+#define __ARCH_WANT_SYS_WAITPID
+#define __ARCH_WANT_SYS_SOCKETCALL
+#define __ARCH_WANT_SYS_FADVISE64
+#define __ARCH_WANT_SYS_GETPGRP
+#define __ARCH_WANT_SYS_LLSEEK
+#define __ARCH_WANT_SYS_NICE
+#define __ARCH_WANT_SYS_OLD_GETRLIMIT
+#define __ARCH_WANT_SYS_OLDUMOUNT
+#define __ARCH_WANT_SYS_SIGPENDING
+#define __ARCH_WANT_SYS_SIGPROCMASK
+#define __ARCH_WANT_SYS_RT_SIGACTION
+
+/*
+ * "Conditional" syscalls
+ *
+ * What we want is __attribute__((weak,alias("sys_ni_syscall"))),
+ * but it doesn't work on all toolchains, so we just do it by hand
+ */
+#define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall")
+
+#endif /* __KERNEL__ */
+#endif /* _ASM_M68K_UNISTD_H_ */
diff --git a/arch/m68k/include/asm/unistd_mm.h b/arch/m68k/include/asm/unistd_mm.h
deleted file mode 100644
index 3c19027331fa..000000000000
--- a/arch/m68k/include/asm/unistd_mm.h
+++ /dev/null
@@ -1,372 +0,0 @@
-#ifndef _ASM_M68K_UNISTD_H_
-#define _ASM_M68K_UNISTD_H_
-
-/*
- * This file contains the system call numbers.
- */
-
-#define __NR_restart_syscall      0
-#define __NR_exit                 1
-#define __NR_fork                 2
-#define __NR_read                 3
-#define __NR_write                4
-#define __NR_open                 5
-#define __NR_close                6
-#define __NR_waitpid              7
-#define __NR_creat                8
-#define __NR_link                 9
-#define __NR_unlink              10
-#define __NR_execve              11
-#define __NR_chdir               12
-#define __NR_time                13
-#define __NR_mknod               14
-#define __NR_chmod               15
-#define __NR_chown               16
-#define __NR_break               17
-#define __NR_oldstat             18
-#define __NR_lseek               19
-#define __NR_getpid              20
-#define __NR_mount               21
-#define __NR_umount              22
-#define __NR_setuid              23
-#define __NR_getuid              24
-#define __NR_stime               25
-#define __NR_ptrace              26
-#define __NR_alarm               27
-#define __NR_oldfstat            28
-#define __NR_pause               29
-#define __NR_utime               30
-#define __NR_stty                31
-#define __NR_gtty                32
-#define __NR_access              33
-#define __NR_nice                34
-#define __NR_ftime               35
-#define __NR_sync                36
-#define __NR_kill                37
-#define __NR_rename              38
-#define __NR_mkdir               39
-#define __NR_rmdir               40
-#define __NR_dup                 41
-#define __NR_pipe                42
-#define __NR_times               43
-#define __NR_prof                44
-#define __NR_brk                 45
-#define __NR_setgid              46
-#define __NR_getgid              47
-#define __NR_signal              48
-#define __NR_geteuid             49
-#define __NR_getegid             50
-#define __NR_acct                51
-#define __NR_umount2             52
-#define __NR_lock                53
-#define __NR_ioctl               54
-#define __NR_fcntl               55
-#define __NR_mpx                 56
-#define __NR_setpgid             57
-#define __NR_ulimit              58
-#define __NR_oldolduname         59
-#define __NR_umask               60
-#define __NR_chroot              61
-#define __NR_ustat               62
-#define __NR_dup2                63
-#define __NR_getppid             64
-#define __NR_getpgrp             65
-#define __NR_setsid              66
-#define __NR_sigaction           67
-#define __NR_sgetmask            68
-#define __NR_ssetmask            69
-#define __NR_setreuid            70
-#define __NR_setregid            71
-#define __NR_sigsuspend          72
-#define __NR_sigpending          73
-#define __NR_sethostname         74
-#define __NR_setrlimit           75
-#define __NR_getrlimit           76
-#define __NR_getrusage           77
-#define __NR_gettimeofday        78
-#define __NR_settimeofday        79
-#define __NR_getgroups           80
-#define __NR_setgroups           81
-#define __NR_select              82
-#define __NR_symlink             83
-#define __NR_oldlstat            84
-#define __NR_readlink            85
-#define __NR_uselib              86
-#define __NR_swapon              87
-#define __NR_reboot              88
-#define __NR_readdir             89
-#define __NR_mmap                90
-#define __NR_munmap              91
-#define __NR_truncate            92
-#define __NR_ftruncate           93
-#define __NR_fchmod              94
-#define __NR_fchown              95
-#define __NR_getpriority         96
-#define __NR_setpriority         97
-#define __NR_profil              98
-#define __NR_statfs              99
-#define __NR_fstatfs            100
-#define __NR_ioperm             101
-#define __NR_socketcall         102
-#define __NR_syslog             103
-#define __NR_setitimer          104
-#define __NR_getitimer          105
-#define __NR_stat               106
-#define __NR_lstat              107
-#define __NR_fstat              108
-#define __NR_olduname           109
-#define __NR_iopl               /* 110 */ not supported
-#define __NR_vhangup            111
-#define __NR_idle               /* 112 */ Obsolete
-#define __NR_vm86               /* 113 */ not supported
-#define __NR_wait4              114
-#define __NR_swapoff            115
-#define __NR_sysinfo            116
-#define __NR_ipc                117
-#define __NR_fsync              118
-#define __NR_sigreturn          119
-#define __NR_clone              120
-#define __NR_setdomainname      121
-#define __NR_uname              122
-#define __NR_cacheflush         123
-#define __NR_adjtimex           124
-#define __NR_mprotect           125
-#define __NR_sigprocmask        126
-#define __NR_create_module      127
-#define __NR_init_module        128
-#define __NR_delete_module      129
-#define __NR_get_kernel_syms    130
-#define __NR_quotactl           131
-#define __NR_getpgid            132
-#define __NR_fchdir             133
-#define __NR_bdflush            134
-#define __NR_sysfs              135
-#define __NR_personality        136
-#define __NR_afs_syscall        137 /* Syscall for Andrew File System */
-#define __NR_setfsuid           138
-#define __NR_setfsgid           139
-#define __NR__llseek            140
-#define __NR_getdents           141
-#define __NR__newselect         142
-#define __NR_flock              143
-#define __NR_msync              144
-#define __NR_readv              145
-#define __NR_writev             146
-#define __NR_getsid             147
-#define __NR_fdatasync          148
-#define __NR__sysctl            149
-#define __NR_mlock              150
-#define __NR_munlock            151
-#define __NR_mlockall           152
-#define __NR_munlockall         153
-#define __NR_sched_setparam             154
-#define __NR_sched_getparam             155
-#define __NR_sched_setscheduler         156
-#define __NR_sched_getscheduler         157
-#define __NR_sched_yield                158
-#define __NR_sched_get_priority_max     159
-#define __NR_sched_get_priority_min     160
-#define __NR_sched_rr_get_interval      161
-#define __NR_nanosleep          162
-#define __NR_mremap             163
-#define __NR_setresuid          164
-#define __NR_getresuid          165
-#define __NR_getpagesize        166
-#define __NR_query_module       167
-#define __NR_poll               168
-#define __NR_nfsservctl         169
-#define __NR_setresgid          170
-#define __NR_getresgid          171
-#define __NR_prctl              172
-#define __NR_rt_sigreturn       173
-#define __NR_rt_sigaction       174
-#define __NR_rt_sigprocmask     175
-#define __NR_rt_sigpending      176
-#define __NR_rt_sigtimedwait    177
-#define __NR_rt_sigqueueinfo    178
-#define __NR_rt_sigsuspend      179
-#define __NR_pread64            180
-#define __NR_pwrite64           181
-#define __NR_lchown             182
-#define __NR_getcwd             183
-#define __NR_capget             184
-#define __NR_capset             185
-#define __NR_sigaltstack        186
-#define __NR_sendfile           187
-#define __NR_getpmsg            188     /* some people actually want streams */
-#define __NR_putpmsg            189     /* some people actually want streams */
-#define __NR_vfork              190
-#define __NR_ugetrlimit         191
-#define __NR_mmap2              192
-#define __NR_truncate64         193
-#define __NR_ftruncate64        194
-#define __NR_stat64             195
-#define __NR_lstat64            196
-#define __NR_fstat64            197
-#define __NR_chown32            198
-#define __NR_getuid32           199
-#define __NR_getgid32           200
-#define __NR_geteuid32          201
-#define __NR_getegid32          202
-#define __NR_setreuid32         203
-#define __NR_setregid32         204
-#define __NR_getgroups32        205
-#define __NR_setgroups32        206
-#define __NR_fchown32           207
-#define __NR_setresuid32        208
-#define __NR_getresuid32        209
-#define __NR_setresgid32        210
-#define __NR_getresgid32        211
-#define __NR_lchown32           212
-#define __NR_setuid32           213
-#define __NR_setgid32           214
-#define __NR_setfsuid32         215
-#define __NR_setfsgid32         216
-#define __NR_pivot_root         217
-#define __NR_getdents64         220
-#define __NR_gettid             221
-#define __NR_tkill              222
-#define __NR_setxattr           223
-#define __NR_lsetxattr          224
-#define __NR_fsetxattr          225
-#define __NR_getxattr           226
-#define __NR_lgetxattr          227
-#define __NR_fgetxattr          228
-#define __NR_listxattr          229
-#define __NR_llistxattr         230
-#define __NR_flistxattr         231
-#define __NR_removexattr        232
-#define __NR_lremovexattr       233
-#define __NR_fremovexattr       234
-#define __NR_futex              235
-#define __NR_sendfile64         236
-#define __NR_mincore            237
-#define __NR_madvise            238
-#define __NR_fcntl64            239
-#define __NR_readahead          240
-#define __NR_io_setup           241
-#define __NR_io_destroy         242
-#define __NR_io_getevents       243
-#define __NR_io_submit          244
-#define __NR_io_cancel          245
-#define __NR_fadvise64          246
-#define __NR_exit_group         247
-#define __NR_lookup_dcookie     248
-#define __NR_epoll_create       249
-#define __NR_epoll_ctl          250
-#define __NR_epoll_wait         251
-#define __NR_remap_file_pages   252
-#define __NR_set_tid_address    253
-#define __NR_timer_create       254
-#define __NR_timer_settime      255
-#define __NR_timer_gettime      256
-#define __NR_timer_getoverrun   257
-#define __NR_timer_delete       258
-#define __NR_clock_settime      259
-#define __NR_clock_gettime      260
-#define __NR_clock_getres       261
-#define __NR_clock_nanosleep    262
-#define __NR_statfs64           263
-#define __NR_fstatfs64          264
-#define __NR_tgkill             265
-#define __NR_utimes             266
-#define __NR_fadvise64_64       267
-#define __NR_mbind              268
-#define __NR_get_mempolicy      269
-#define __NR_set_mempolicy      270
-#define __NR_mq_open            271
-#define __NR_mq_unlink          272
-#define __NR_mq_timedsend       273
-#define __NR_mq_timedreceive    274
-#define __NR_mq_notify          275
-#define __NR_mq_getsetattr      276
-#define __NR_waitid             277
-#define __NR_vserver            278
-#define __NR_add_key            279
-#define __NR_request_key        280
-#define __NR_keyctl             281
-#define __NR_ioprio_set         282
-#define __NR_ioprio_get         283
-#define __NR_inotify_init       284
-#define __NR_inotify_add_watch  285
-#define __NR_inotify_rm_watch   286
-#define __NR_migrate_pages      287
-#define __NR_openat             288
-#define __NR_mkdirat            289
-#define __NR_mknodat            290
-#define __NR_fchownat           291
-#define __NR_futimesat          292
-#define __NR_fstatat64          293
-#define __NR_unlinkat           294
-#define __NR_renameat           295
-#define __NR_linkat             296
-#define __NR_symlinkat          297
-#define __NR_readlinkat         298
-#define __NR_fchmodat           299
-#define __NR_faccessat          300
-#define __NR_pselect6           301
-#define __NR_ppoll              302
-#define __NR_unshare            303
-#define __NR_set_robust_list    304
-#define __NR_get_robust_list    305
-#define __NR_splice             306
-#define __NR_sync_file_range    307
-#define __NR_tee                308
-#define __NR_vmsplice           309
-#define __NR_move_pages         310
-#define __NR_sched_setaffinity  311
-#define __NR_sched_getaffinity  312
-#define __NR_kexec_load         313
-#define __NR_getcpu             314
-#define __NR_epoll_pwait        315
-#define __NR_utimensat          316
-#define __NR_signalfd           317
-#define __NR_timerfd_create     318
-#define __NR_eventfd            319
-#define __NR_fallocate          320
-#define __NR_timerfd_settime    321
-#define __NR_timerfd_gettime    322
-#define __NR_signalfd4          323
-#define __NR_eventfd2           324
-#define __NR_epoll_create1      325
-#define __NR_dup3               326
-#define __NR_pipe2              327
-#define __NR_inotify_init1      328
-
-#ifdef __KERNEL__
-
-#define NR_syscalls             329
-
-#define __ARCH_WANT_IPC_PARSE_VERSION
-#define __ARCH_WANT_OLD_READDIR
-#define __ARCH_WANT_OLD_STAT
-#define __ARCH_WANT_STAT64
-#define __ARCH_WANT_SYS_ALARM
-#define __ARCH_WANT_SYS_GETHOSTNAME
-#define __ARCH_WANT_SYS_PAUSE
-#define __ARCH_WANT_SYS_SGETMASK
-#define __ARCH_WANT_SYS_SIGNAL
-#define __ARCH_WANT_SYS_TIME
-#define __ARCH_WANT_SYS_UTIME
-#define __ARCH_WANT_SYS_WAITPID
-#define __ARCH_WANT_SYS_SOCKETCALL
-#define __ARCH_WANT_SYS_FADVISE64
-#define __ARCH_WANT_SYS_GETPGRP
-#define __ARCH_WANT_SYS_LLSEEK
-#define __ARCH_WANT_SYS_NICE
-#define __ARCH_WANT_SYS_OLD_GETRLIMIT
-#define __ARCH_WANT_SYS_OLDUMOUNT
-#define __ARCH_WANT_SYS_SIGPENDING
-#define __ARCH_WANT_SYS_SIGPROCMASK
-#define __ARCH_WANT_SYS_RT_SIGACTION
-
-/*
- * "Conditional" syscalls
- *
- * What we want is __attribute__((weak,alias("sys_ni_syscall"))),
- * but it doesn't work on all toolchains, so we just do it by hand
- */
-#define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall")
-
-#endif /* __KERNEL__ */
-#endif /* _ASM_M68K_UNISTD_H_ */
diff --git a/arch/m68k/include/asm/unistd_no.h b/arch/m68k/include/asm/unistd_no.h
deleted file mode 100644
index b034a2f7b444..000000000000
--- a/arch/m68k/include/asm/unistd_no.h
+++ /dev/null
@@ -1,372 +0,0 @@
-#ifndef _ASM_M68K_UNISTD_H_
-#define _ASM_M68K_UNISTD_H_
-
-/*
- * This file contains the system call numbers.
- */
-
-#define __NR_restart_syscall      0
-#define __NR_exit                 1
-#define __NR_fork                 2
-#define __NR_read                 3
-#define __NR_write                4
-#define __NR_open                 5
-#define __NR_close                6
-#define __NR_waitpid              7
-#define __NR_creat                8
-#define __NR_link                 9
-#define __NR_unlink              10
-#define __NR_execve              11
-#define __NR_chdir               12
-#define __NR_time                13
-#define __NR_mknod               14
-#define __NR_chmod               15
-#define __NR_chown               16
-#define __NR_break               17
-#define __NR_oldstat             18
-#define __NR_lseek               19
-#define __NR_getpid              20
-#define __NR_mount               21
-#define __NR_umount              22
-#define __NR_setuid              23
-#define __NR_getuid              24
-#define __NR_stime               25
-#define __NR_ptrace              26
-#define __NR_alarm               27
-#define __NR_oldfstat            28
-#define __NR_pause               29
-#define __NR_utime               30
-#define __NR_stty                31
-#define __NR_gtty                32
-#define __NR_access              33
-#define __NR_nice                34
-#define __NR_ftime               35
-#define __NR_sync                36
-#define __NR_kill                37
-#define __NR_rename              38
-#define __NR_mkdir               39
-#define __NR_rmdir               40
-#define __NR_dup                 41
-#define __NR_pipe                42
-#define __NR_times               43
-#define __NR_prof                44
-#define __NR_brk                 45
-#define __NR_setgid              46
-#define __NR_getgid              47
-#define __NR_signal              48
-#define __NR_geteuid             49
-#define __NR_getegid             50
-#define __NR_acct                51
-#define __NR_umount2             52
-#define __NR_lock                53
-#define __NR_ioctl               54
-#define __NR_fcntl               55
-#define __NR_mpx                 56
-#define __NR_setpgid             57
-#define __NR_ulimit              58
-#define __NR_oldolduname         59
-#define __NR_umask               60
-#define __NR_chroot              61
-#define __NR_ustat               62
-#define __NR_dup2                63
-#define __NR_getppid             64
-#define __NR_getpgrp             65
-#define __NR_setsid              66
-#define __NR_sigaction           67
-#define __NR_sgetmask            68
-#define __NR_ssetmask            69
-#define __NR_setreuid            70
-#define __NR_setregid            71
-#define __NR_sigsuspend          72
-#define __NR_sigpending          73
-#define __NR_sethostname         74
-#define __NR_setrlimit           75
-#define __NR_getrlimit           76
-#define __NR_getrusage           77
-#define __NR_gettimeofday        78
-#define __NR_settimeofday        79
-#define __NR_getgroups           80
-#define __NR_setgroups           81
-#define __NR_select              82
-#define __NR_symlink             83
-#define __NR_oldlstat            84
-#define __NR_readlink            85
-#define __NR_uselib              86
-#define __NR_swapon              87
-#define __NR_reboot              88
-#define __NR_readdir             89
-#define __NR_mmap                90
-#define __NR_munmap              91
-#define __NR_truncate            92
-#define __NR_ftruncate           93
-#define __NR_fchmod              94
-#define __NR_fchown              95
-#define __NR_getpriority         96
-#define __NR_setpriority         97
-#define __NR_profil              98
-#define __NR_statfs              99
-#define __NR_fstatfs            100
-#define __NR_ioperm             101
-#define __NR_socketcall         102
-#define __NR_syslog             103
-#define __NR_setitimer          104
-#define __NR_getitimer          105
-#define __NR_stat               106
-#define __NR_lstat              107
-#define __NR_fstat              108
-#define __NR_olduname           109
-#define __NR_iopl               /* 110 */ not supported
-#define __NR_vhangup            111
-#define __NR_idle               /* 112 */ Obsolete
-#define __NR_vm86               /* 113 */ not supported
-#define __NR_wait4              114
-#define __NR_swapoff            115
-#define __NR_sysinfo            116
-#define __NR_ipc                117
-#define __NR_fsync              118
-#define __NR_sigreturn          119
-#define __NR_clone              120
-#define __NR_setdomainname      121
-#define __NR_uname              122
-#define __NR_cacheflush         123
-#define __NR_adjtimex           124
-#define __NR_mprotect           125
-#define __NR_sigprocmask        126
-#define __NR_create_module      127
-#define __NR_init_module        128
-#define __NR_delete_module      129
-#define __NR_get_kernel_syms    130
-#define __NR_quotactl           131
-#define __NR_getpgid            132
-#define __NR_fchdir             133
-#define __NR_bdflush            134
-#define __NR_sysfs              135
-#define __NR_personality        136
-#define __NR_afs_syscall        137 /* Syscall for Andrew File System */
-#define __NR_setfsuid           138
-#define __NR_setfsgid           139
-#define __NR__llseek            140
-#define __NR_getdents           141
-#define __NR__newselect         142
-#define __NR_flock              143
-#define __NR_msync              144
-#define __NR_readv              145
-#define __NR_writev             146
-#define __NR_getsid             147
-#define __NR_fdatasync          148
-#define __NR__sysctl            149
-#define __NR_mlock              150
-#define __NR_munlock            151
-#define __NR_mlockall           152
-#define __NR_munlockall         153
-#define __NR_sched_setparam             154
-#define __NR_sched_getparam             155
-#define __NR_sched_setscheduler         156
-#define __NR_sched_getscheduler         157
-#define __NR_sched_yield                158
-#define __NR_sched_get_priority_max     159
-#define __NR_sched_get_priority_min     160
-#define __NR_sched_rr_get_interval      161
-#define __NR_nanosleep          162
-#define __NR_mremap             163
-#define __NR_setresuid          164
-#define __NR_getresuid          165
-#define __NR_getpagesize        166
-#define __NR_query_module       167
-#define __NR_poll               168
-#define __NR_nfsservctl         169
-#define __NR_setresgid          170
-#define __NR_getresgid          171
-#define __NR_prctl              172
-#define __NR_rt_sigreturn       173
-#define __NR_rt_sigaction       174
-#define __NR_rt_sigprocmask     175
-#define __NR_rt_sigpending      176
-#define __NR_rt_sigtimedwait    177
-#define __NR_rt_sigqueueinfo    178
-#define __NR_rt_sigsuspend      179
-#define __NR_pread64            180
-#define __NR_pwrite64           181
-#define __NR_lchown             182
-#define __NR_getcwd             183
-#define __NR_capget             184
-#define __NR_capset             185
-#define __NR_sigaltstack        186
-#define __NR_sendfile           187
-#define __NR_getpmsg            188     /* some people actually want streams */
-#define __NR_putpmsg            189     /* some people actually want streams */
-#define __NR_vfork              190
-#define __NR_ugetrlimit         191
-#define __NR_mmap2              192
-#define __NR_truncate64         193
-#define __NR_ftruncate64        194
-#define __NR_stat64             195
-#define __NR_lstat64            196
-#define __NR_fstat64            197
-#define __NR_chown32            198
-#define __NR_getuid32           199
-#define __NR_getgid32           200
-#define __NR_geteuid32          201
-#define __NR_getegid32          202
-#define __NR_setreuid32         203
-#define __NR_setregid32         204
-#define __NR_getgroups32        205
-#define __NR_setgroups32        206
-#define __NR_fchown32           207
-#define __NR_setresuid32        208
-#define __NR_getresuid32        209
-#define __NR_setresgid32        210
-#define __NR_getresgid32        211
-#define __NR_lchown32           212
-#define __NR_setuid32           213
-#define __NR_setgid32           214
-#define __NR_setfsuid32         215
-#define __NR_setfsgid32         216
-#define __NR_pivot_root         217
-#define __NR_getdents64         220
-#define __NR_gettid             221
-#define __NR_tkill              222
-#define __NR_setxattr           223
-#define __NR_lsetxattr          224
-#define __NR_fsetxattr          225
-#define __NR_getxattr           226
-#define __NR_lgetxattr          227
-#define __NR_fgetxattr          228
-#define __NR_listxattr          229
-#define __NR_llistxattr         230
-#define __NR_flistxattr         231
-#define __NR_removexattr        232
-#define __NR_lremovexattr       233
-#define __NR_fremovexattr       234
-#define __NR_futex              235
-#define __NR_sendfile64         236
-#define __NR_mincore            237
-#define __NR_madvise            238
-#define __NR_fcntl64            239
-#define __NR_readahead          240
-#define __NR_io_setup           241
-#define __NR_io_destroy         242
-#define __NR_io_getevents       243
-#define __NR_io_submit          244
-#define __NR_io_cancel          245
-#define __NR_fadvise64          246
-#define __NR_exit_group         247
-#define __NR_lookup_dcookie     248
-#define __NR_epoll_create       249
-#define __NR_epoll_ctl          250
-#define __NR_epoll_wait         251
-#define __NR_remap_file_pages   252
-#define __NR_set_tid_address    253
-#define __NR_timer_create       254
-#define __NR_timer_settime      255
-#define __NR_timer_gettime      256
-#define __NR_timer_getoverrun   257
-#define __NR_timer_delete       258
-#define __NR_clock_settime      259
-#define __NR_clock_gettime      260
-#define __NR_clock_getres       261
-#define __NR_clock_nanosleep    262
-#define __NR_statfs64           263
-#define __NR_fstatfs64          264
-#define __NR_tgkill             265
-#define __NR_utimes             266
-#define __NR_fadvise64_64       267
-#define __NR_mbind              268
-#define __NR_get_mempolicy      269
-#define __NR_set_mempolicy      270
-#define __NR_mq_open            271
-#define __NR_mq_unlink          272
-#define __NR_mq_timedsend       273
-#define __NR_mq_timedreceive    274
-#define __NR_mq_notify          275
-#define __NR_mq_getsetattr      276
-#define __NR_waitid             277
-#define __NR_vserver            278
-#define __NR_add_key            279
-#define __NR_request_key        280
-#define __NR_keyctl             281
-#define __NR_ioprio_set         282
-#define __NR_ioprio_get         283
-#define __NR_inotify_init       284
-#define __NR_inotify_add_watch  285
-#define __NR_inotify_rm_watch   286
-#define __NR_migrate_pages      287
-#define __NR_openat             288
-#define __NR_mkdirat            289
-#define __NR_mknodat            290
-#define __NR_fchownat           291
-#define __NR_futimesat          292
-#define __NR_fstatat64          293
-#define __NR_unlinkat           294
-#define __NR_renameat           295
-#define __NR_linkat             296
-#define __NR_symlinkat          297
-#define __NR_readlinkat         298
-#define __NR_fchmodat           299
-#define __NR_faccessat          300
-#define __NR_pselect6           301
-#define __NR_ppoll              302
-#define __NR_unshare            303
-#define __NR_set_robust_list    304
-#define __NR_get_robust_list    305
-#define __NR_splice             306
-#define __NR_sync_file_range    307
-#define __NR_tee                308
-#define __NR_vmsplice           309
-#define __NR_move_pages         310
-#define __NR_sched_setaffinity  311
-#define __NR_sched_getaffinity  312
-#define __NR_kexec_load         313
-#define __NR_getcpu             314
-#define __NR_epoll_pwait        315
-#define __NR_utimensat          316
-#define __NR_signalfd           317
-#define __NR_timerfd_create     318
-#define __NR_eventfd            319
-#define __NR_fallocate          320
-#define __NR_timerfd_settime    321
-#define __NR_timerfd_gettime    322
-#define __NR_signalfd4          323
-#define __NR_eventfd2           324
-#define __NR_epoll_create1      325
-#define __NR_dup3               326
-#define __NR_pipe2              327
-#define __NR_inotify_init1      328
-
-#ifdef __KERNEL__
-
-#define NR_syscalls             329
-
-#define __ARCH_WANT_IPC_PARSE_VERSION
-#define __ARCH_WANT_OLD_READDIR
-#define __ARCH_WANT_OLD_STAT
-#define __ARCH_WANT_STAT64
-#define __ARCH_WANT_SYS_ALARM
-#define __ARCH_WANT_SYS_GETHOSTNAME
-#define __ARCH_WANT_SYS_PAUSE
-#define __ARCH_WANT_SYS_SGETMASK
-#define __ARCH_WANT_SYS_SIGNAL
-#define __ARCH_WANT_SYS_TIME
-#define __ARCH_WANT_SYS_UTIME
-#define __ARCH_WANT_SYS_WAITPID
-#define __ARCH_WANT_SYS_SOCKETCALL
-#define __ARCH_WANT_SYS_FADVISE64
-#define __ARCH_WANT_SYS_GETPGRP
-#define __ARCH_WANT_SYS_LLSEEK
-#define __ARCH_WANT_SYS_NICE
-#define __ARCH_WANT_SYS_OLD_GETRLIMIT
-#define __ARCH_WANT_SYS_OLDUMOUNT
-#define __ARCH_WANT_SYS_SIGPENDING
-#define __ARCH_WANT_SYS_SIGPROCMASK
-#define __ARCH_WANT_SYS_RT_SIGACTION
-
-/*
- * "Conditional" syscalls
- *
- * What we want is __attribute__((weak,alias("sys_ni_syscall"))),
- * but it doesn't work on all toolchains, so we just do it by hand
- */
-#define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall")
-
-#endif /* __KERNEL__ */
-#endif /* _ASM_M68K_UNISTD_H_ */
diff --git a/arch/m68k/install.sh b/arch/m68k/install.sh
new file mode 100644
index 000000000000..9c6bae6112e3
--- /dev/null
+++ b/arch/m68k/install.sh
@@ -0,0 +1,52 @@
+#!/bin/sh
+#
+# This file is subject to the terms and conditions of the GNU General Public
+# License.  See the file "COPYING" in the main directory of this archive
+# for more details.
+#
+# Copyright (C) 1995 by Linus Torvalds
+#
+# Adapted from code in arch/i386/boot/Makefile by H. Peter Anvin
+#
+# "make install" script for m68k architecture
+#
+# Arguments:
+#   $1 - kernel version
+#   $2 - kernel image file
+#   $3 - kernel map file
+#   $4 - default install path (blank if root directory)
+#
+
+verify () {
+        if [ ! -f "$1" ]; then
+                echo ""                                                   1>&2
+                echo " *** Missing file: $1"                              1>&2
+                echo ' *** You need to run "make" before "make install".' 1>&2
+                echo ""                                                   1>&2
+                exit 1
+        fi
+}
+
+# Make sure the files actually exist
+verify "$2"
+verify "$3"
+
+# User may have a custom install script
+
+if [ -x ~/bin/${CROSS_COMPILE}installkernel ]; then exec ~/bin/${CROSS_COMPILE}installkernel "$@"; fi
+if [ -x /sbin/${CROSS_COMPILE}installkernel ]; then exec /sbin/${CROSS_COMPILE}installkernel "$@"; fi
+
+# Default install - same as make zlilo
+
+if [ -f $4/vmlinuz ]; then
+        mv $4/vmlinuz $4/vmlinuz.old
+fi
+
+if [ -f $4/System.map ]; then
+        mv $4/System.map $4/System.old
+fi
+
+cat $2 > $4/vmlinuz
+cp $3 $4/System.map
+
+sync
diff --git a/arch/m68k/mac/config.c b/arch/m68k/mac/config.c
index 98b6bcfb37bf..be017984a456 100644
--- a/arch/m68k/mac/config.c
+++ b/arch/m68k/mac/config.c
@@ -22,6 +22,7 @@
 /* keyb */
 #include <linux/init.h>
 #include <linux/vt_kern.h>
+#include <linux/platform_device.h>
 
 #define BOOTINFO_COMPAT_1_0
 #include <asm/setup.h>
@@ -43,6 +44,10 @@
 #include <asm/mac_oss.h>
 #include <asm/mac_psc.h>
 
+/* platform device info */
+
+#define SWIM_IO_SIZE 0x2000     /* SWIM IO resource size */
+
 /* Mac bootinfo struct */
 
 struct mac_booter_data mac_bi_data;
@@ -224,7 +229,8 @@ static struct mac_model mac_data_table[] = {
                 .via_type       = MAC_VIA_II,
                 .scsi_type      = MAC_SCSI_OLD,
                 .scc_type       = MAC_SCC_II,
-                .nubus_type     = MAC_NUBUS
+                .nubus_type     = MAC_NUBUS,
+                .floppy_type    = MAC_FLOPPY_IWM
         },
 
         /*
@@ -239,7 +245,8 @@ static struct mac_model mac_data_table[] = {
                 .via_type       = MAC_VIA_II,
                 .scsi_type      = MAC_SCSI_OLD,
                 .scc_type       = MAC_SCC_II,
-                .nubus_type     = MAC_NUBUS
+                .nubus_type     = MAC_NUBUS,
+                .floppy_type    = MAC_FLOPPY_IWM
         }, {
                 .ident          = MAC_MODEL_IIX,
                 .name           = "IIx",
@@ -247,7 +254,8 @@ static struct mac_model mac_data_table[] = {
                 .via_type       = MAC_VIA_II,
                 .scsi_type      = MAC_SCSI_OLD,
                 .scc_type       = MAC_SCC_II,
-                .nubus_type     = MAC_NUBUS
+                .nubus_type     = MAC_NUBUS,
+                .floppy_type    = MAC_FLOPPY_SWIM_ADDR2
         }, {
                 .ident          = MAC_MODEL_IICX,
                 .name           = "IIcx",
@@ -255,7 +263,8 @@ static struct mac_model mac_data_table[] = {
                 .via_type       = MAC_VIA_II,
                 .scsi_type      = MAC_SCSI_OLD,
                 .scc_type       = MAC_SCC_II,
-                .nubus_type     = MAC_NUBUS
+                .nubus_type     = MAC_NUBUS,
+                .floppy_type    = MAC_FLOPPY_SWIM_ADDR2
         }, {
                 .ident          = MAC_MODEL_SE30,
                 .name           = "SE/30",
@@ -263,7 +272,8 @@ static struct mac_model mac_data_table[] = {
                 .via_type       = MAC_VIA_II,
                 .scsi_type      = MAC_SCSI_OLD,
                 .scc_type       = MAC_SCC_II,
-                .nubus_type     = MAC_NUBUS
+                .nubus_type     = MAC_NUBUS,
+                .floppy_type    = MAC_FLOPPY_SWIM_ADDR2
         },
 
         /*
@@ -280,7 +290,8 @@ static struct mac_model mac_data_table[] = {
                 .via_type       = MAC_VIA_IIci,
                 .scsi_type      = MAC_SCSI_OLD,
                 .scc_type       = MAC_SCC_II,
-                .nubus_type     = MAC_NUBUS
+                .nubus_type     = MAC_NUBUS,
+                .floppy_type    = MAC_FLOPPY_SWIM_ADDR2
         }, {
                 .ident          = MAC_MODEL_IIFX,
                 .name           = "IIfx",
@@ -288,7 +299,8 @@ static struct mac_model mac_data_table[] = {
                 .via_type       = MAC_VIA_IIci,
                 .scsi_type      = MAC_SCSI_OLD,
                 .scc_type       = MAC_SCC_IOP,
-                .nubus_type     = MAC_NUBUS
+                .nubus_type     = MAC_NUBUS,
+                .floppy_type    = MAC_FLOPPY_SWIM_IOP
         }, {
                 .ident          = MAC_MODEL_IISI,
                 .name           = "IIsi",
@@ -296,7 +308,8 @@ static struct mac_model mac_data_table[] = {
                 .via_type       = MAC_VIA_IIci,
                 .scsi_type      = MAC_SCSI_OLD,
                 .scc_type       = MAC_SCC_II,
-                .nubus_type     = MAC_NUBUS
+                .nubus_type     = MAC_NUBUS,
+                .floppy_type    = MAC_FLOPPY_SWIM_ADDR2
         }, {
                 .ident          = MAC_MODEL_IIVI,
                 .name           = "IIvi",
@@ -304,7 +317,8 @@ static struct mac_model mac_data_table[] = {
                 .via_type       = MAC_VIA_IIci,
                 .scsi_type      = MAC_SCSI_OLD,
                 .scc_type       = MAC_SCC_II,
-                .nubus_type     = MAC_NUBUS
+                .nubus_type     = MAC_NUBUS,
+                .floppy_type    = MAC_FLOPPY_SWIM_ADDR2
         }, {
                 .ident          = MAC_MODEL_IIVX,
                 .name           = "IIvx",
@@ -312,7 +326,8 @@ static struct mac_model mac_data_table[] = {
                 .via_type       = MAC_VIA_IIci,
                 .scsi_type      = MAC_SCSI_OLD,
                 .scc_type       = MAC_SCC_II,
-                .nubus_type     = MAC_NUBUS
+                .nubus_type     = MAC_NUBUS,
+                .floppy_type    = MAC_FLOPPY_SWIM_ADDR2
         },
 
         /*
@@ -326,7 +341,8 @@ static struct mac_model mac_data_table[] = {
                 .via_type       = MAC_VIA_IIci,
                 .scsi_type      = MAC_SCSI_OLD,
                 .scc_type       = MAC_SCC_II,
-                .nubus_type     = MAC_NUBUS
+                .nubus_type     = MAC_NUBUS,
+                .floppy_type    = MAC_FLOPPY_SWIM_ADDR2
         }, {
                 .ident          = MAC_MODEL_CCL,
                 .name           = "Color Classic",
@@ -334,7 +350,9 @@ static struct mac_model mac_data_table[] = {
                 .via_type       = MAC_VIA_IIci,
                 .scsi_type      = MAC_SCSI_OLD,
                 .scc_type       = MAC_SCC_II,
-                .nubus_type     = MAC_NUBUS},
+                .nubus_type     = MAC_NUBUS,
+                .floppy_type    = MAC_FLOPPY_SWIM_ADDR2
+        },
 
         /*
          *      Some Mac LC machines. Basically the same as the IIci, ADB like IIsi
@@ -347,7 +365,8 @@ static struct mac_model mac_data_table[] = {
                 .via_type       = MAC_VIA_IIci,
                 .scsi_type      = MAC_SCSI_OLD,
                 .scc_type       = MAC_SCC_II,
-                .nubus_type     = MAC_NUBUS
+                .nubus_type     = MAC_NUBUS,
+                .floppy_type    = MAC_FLOPPY_SWIM_ADDR2
         }, {
                 .ident          = MAC_MODEL_LCII,
                 .name           = "LC II",
@@ -355,7 +374,8 @@ static struct mac_model mac_data_table[] = {
                 .via_type       = MAC_VIA_IIci,
                 .scsi_type      = MAC_SCSI_OLD,
                 .scc_type       = MAC_SCC_II,
-                .nubus_type     = MAC_NUBUS
+                .nubus_type     = MAC_NUBUS,
+                .floppy_type    = MAC_FLOPPY_SWIM_ADDR2
         }, {
                 .ident          = MAC_MODEL_LCIII,
                 .name           = "LC III",
@@ -363,7 +383,8 @@ static struct mac_model mac_data_table[] = {
                 .via_type       = MAC_VIA_IIci,
                 .scsi_type      = MAC_SCSI_OLD,
                 .scc_type       = MAC_SCC_II,
-                .nubus_type     = MAC_NUBUS
+                .nubus_type     = MAC_NUBUS,
+                .floppy_type    = MAC_FLOPPY_SWIM_ADDR2
         },
 
         /*
@@ -383,7 +404,8 @@ static struct mac_model mac_data_table[] = {
                 .via_type       = MAC_VIA_QUADRA,
                 .scsi_type      = MAC_SCSI_QUADRA,
                 .scc_type       = MAC_SCC_QUADRA,
-                .nubus_type     = MAC_NUBUS
+                .nubus_type     = MAC_NUBUS,
+                .floppy_type    = MAC_FLOPPY_SWIM_ADDR1
         }, {
                 .ident          = MAC_MODEL_Q605_ACC,
                 .name           = "Quadra 605",
@@ -391,7 +413,8 @@ static struct mac_model mac_data_table[] = {
                 .via_type       = MAC_VIA_QUADRA,
                 .scsi_type      = MAC_SCSI_QUADRA,
                 .scc_type       = MAC_SCC_QUADRA,
-                .nubus_type     = MAC_NUBUS
+                .nubus_type     = MAC_NUBUS,
+                .floppy_type    = MAC_FLOPPY_SWIM_ADDR1
         }, {
                 .ident          = MAC_MODEL_Q610,
                 .name           = "Quadra 610",
@@ -400,7 +423,8 @@ static struct mac_model mac_data_table[] = {
                 .scsi_type      = MAC_SCSI_QUADRA,
                 .scc_type       = MAC_SCC_QUADRA,
                 .ether_type     = MAC_ETHER_SONIC,
-                .nubus_type     = MAC_NUBUS
+                .nubus_type     = MAC_NUBUS,
+                .floppy_type    = MAC_FLOPPY_SWIM_ADDR1
         }, {
                 .ident          = MAC_MODEL_Q630,
                 .name           = "Quadra 630",
@@ -410,7 +434,8 @@ static struct mac_model mac_data_table[] = {
                 .ide_type       = MAC_IDE_QUADRA,
                 .scc_type       = MAC_SCC_QUADRA,
                 .ether_type     = MAC_ETHER_SONIC,
-                .nubus_type     = MAC_NUBUS
+                .nubus_type     = MAC_NUBUS,
+                .floppy_type    = MAC_FLOPPY_SWIM_ADDR1
         }, {
                 .ident          = MAC_MODEL_Q650,
                 .name           = "Quadra 650",
@@ -419,7 +444,8 @@ static struct mac_model mac_data_table[] = {
                 .scsi_type      = MAC_SCSI_QUADRA,
                 .scc_type       = MAC_SCC_QUADRA,
                 .ether_type     = MAC_ETHER_SONIC,
-                .nubus_type     = MAC_NUBUS
+                .nubus_type     = MAC_NUBUS,
+                .floppy_type    = MAC_FLOPPY_SWIM_ADDR1
         },
         /*      The Q700 does have a NS Sonic */
         {
@@ -430,7 +456,8 @@ static struct mac_model mac_data_table[] = {
                 .scsi_type      = MAC_SCSI_QUADRA2,
                 .scc_type       = MAC_SCC_QUADRA,
                 .ether_type     = MAC_ETHER_SONIC,
-                .nubus_type     = MAC_NUBUS
+                .nubus_type     = MAC_NUBUS,
+                .floppy_type    = MAC_FLOPPY_SWIM_ADDR1
         }, {
                 .ident          = MAC_MODEL_Q800,
                 .name           = "Quadra 800",
@@ -439,7 +466,8 @@ static struct mac_model mac_data_table[] = {
                 .scsi_type      = MAC_SCSI_QUADRA,
                 .scc_type       = MAC_SCC_QUADRA,
                 .ether_type     = MAC_ETHER_SONIC,
-                .nubus_type     = MAC_NUBUS
+                .nubus_type     = MAC_NUBUS,
+                .floppy_type    = MAC_FLOPPY_SWIM_ADDR1
         }, {
                 .ident          = MAC_MODEL_Q840,
                 .name           = "Quadra 840AV",
@@ -448,7 +476,8 @@ static struct mac_model mac_data_table[] = {
                 .scsi_type      = MAC_SCSI_QUADRA3,
                 .scc_type       = MAC_SCC_PSC,
                 .ether_type     = MAC_ETHER_MACE,
-                .nubus_type     = MAC_NUBUS
+                .nubus_type     = MAC_NUBUS,
+                .floppy_type    = MAC_FLOPPY_AV
         }, {
                 .ident          = MAC_MODEL_Q900,
                 .name           = "Quadra 900",
@@ -457,7 +486,8 @@ static struct mac_model mac_data_table[] = {
                 .scsi_type      = MAC_SCSI_QUADRA2,
                 .scc_type       = MAC_SCC_IOP,
                 .ether_type     = MAC_ETHER_SONIC,
-                .nubus_type     = MAC_NUBUS
+                .nubus_type     = MAC_NUBUS,
+                .floppy_type    = MAC_FLOPPY_SWIM_IOP
         }, {
                 .ident          = MAC_MODEL_Q950,
                 .name           = "Quadra 950",
@@ -466,7 +496,8 @@ static struct mac_model mac_data_table[] = {
                 .scsi_type      = MAC_SCSI_QUADRA2,
                 .scc_type       = MAC_SCC_IOP,
                 .ether_type     = MAC_ETHER_SONIC,
-                .nubus_type     = MAC_NUBUS
+                .nubus_type     = MAC_NUBUS,
+                .floppy_type    = MAC_FLOPPY_SWIM_IOP
         },
 
         /*
@@ -480,7 +511,8 @@ static struct mac_model mac_data_table[] = {
                 .via_type       = MAC_VIA_IIci,
                 .scsi_type      = MAC_SCSI_OLD,
                 .scc_type       = MAC_SCC_II,
-                .nubus_type     = MAC_NUBUS
+                .nubus_type     = MAC_NUBUS,
+                .floppy_type    = MAC_FLOPPY_SWIM_ADDR2
         }, {
                 .ident          = MAC_MODEL_P475,
                 .name           =  "Performa 475",
@@ -488,7 +520,8 @@ static struct mac_model mac_data_table[] = {
                 .via_type       = MAC_VIA_QUADRA,
                 .scsi_type      = MAC_SCSI_QUADRA,
                 .scc_type       = MAC_SCC_II,
-                .nubus_type     = MAC_NUBUS
+                .nubus_type     = MAC_NUBUS,
+                .floppy_type    = MAC_FLOPPY_SWIM_ADDR1
         }, {
                 .ident          = MAC_MODEL_P475F,
                 .name           =  "Performa 475",
@@ -496,7 +529,8 @@ static struct mac_model mac_data_table[] = {
                 .via_type       = MAC_VIA_QUADRA,
                 .scsi_type      = MAC_SCSI_QUADRA,
                 .scc_type       = MAC_SCC_II,
-                .nubus_type     = MAC_NUBUS
+                .nubus_type     = MAC_NUBUS,
+                .floppy_type    = MAC_FLOPPY_SWIM_ADDR1
         }, {
                 .ident          = MAC_MODEL_P520,
                 .name           =  "Performa 520",
@@ -504,7 +538,8 @@ static struct mac_model mac_data_table[] = {
                 .via_type       = MAC_VIA_IIci,
                 .scsi_type      = MAC_SCSI_OLD,
                 .scc_type       = MAC_SCC_II,
-                .nubus_type     = MAC_NUBUS
+                .nubus_type     = MAC_NUBUS,
+                .floppy_type    = MAC_FLOPPY_SWIM_ADDR2
         }, {
                 .ident          = MAC_MODEL_P550,
                 .name           =  "Performa 550",
@@ -512,7 +547,8 @@ static struct mac_model mac_data_table[] = {
                 .via_type       = MAC_VIA_IIci,
                 .scsi_type      = MAC_SCSI_OLD,
                 .scc_type       = MAC_SCC_II,
-                .nubus_type     = MAC_NUBUS
+                .nubus_type     = MAC_NUBUS,
+                .floppy_type    = MAC_FLOPPY_SWIM_ADDR2
         },
         /* These have the comm slot, and therefore the possibility of SONIC ethernet */
         {
@@ -523,7 +559,8 @@ static struct mac_model mac_data_table[] = {
                 .scsi_type      = MAC_SCSI_QUADRA,
                 .scc_type       = MAC_SCC_II,
                 .ether_type     = MAC_ETHER_SONIC,
-                .nubus_type     = MAC_NUBUS
+                .nubus_type     = MAC_NUBUS,
+                .floppy_type    = MAC_FLOPPY_SWIM_ADDR1
         }, {
                 .ident          = MAC_MODEL_P588,
                 .name           = "Performa 588",
@@ -533,7 +570,8 @@ static struct mac_model mac_data_table[] = {
                 .ide_type       = MAC_IDE_QUADRA,
                 .scc_type       = MAC_SCC_II,
                 .ether_type     = MAC_ETHER_SONIC,
-                .nubus_type     = MAC_NUBUS
+                .nubus_type     = MAC_NUBUS,
+                .floppy_type    = MAC_FLOPPY_SWIM_ADDR1
         }, {
                 .ident          = MAC_MODEL_TV,
                 .name           = "TV",
@@ -541,7 +579,8 @@ static struct mac_model mac_data_table[] = {
                 .via_type       = MAC_VIA_QUADRA,
                 .scsi_type      = MAC_SCSI_OLD,
                 .scc_type       = MAC_SCC_II,
-                .nubus_type     = MAC_NUBUS
+                .nubus_type     = MAC_NUBUS,
+                .floppy_type    = MAC_FLOPPY_SWIM_ADDR2
         }, {
                 .ident          = MAC_MODEL_P600,
                 .name           = "Performa 600",
@@ -549,7 +588,8 @@ static struct mac_model mac_data_table[] = {
                 .via_type       = MAC_VIA_IIci,
                 .scsi_type      = MAC_SCSI_OLD,
                 .scc_type       = MAC_SCC_II,
-                .nubus_type     = MAC_NUBUS
+                .nubus_type     = MAC_NUBUS,
+                .floppy_type    = MAC_FLOPPY_SWIM_ADDR2
         },
 
         /*
@@ -565,7 +605,8 @@ static struct mac_model mac_data_table[] = {
                 .scsi_type      = MAC_SCSI_QUADRA,
                 .scc_type       = MAC_SCC_QUADRA,
                 .ether_type     = MAC_ETHER_SONIC,
-                .nubus_type     = MAC_NUBUS
+                .nubus_type     = MAC_NUBUS,
+                .floppy_type    = MAC_FLOPPY_SWIM_ADDR1
         }, {
                 .ident          = MAC_MODEL_C650,
                 .name           = "Centris 650",
@@ -574,7 +615,8 @@ static struct mac_model mac_data_table[] = {
                 .scsi_type      = MAC_SCSI_QUADRA,
                 .scc_type       = MAC_SCC_QUADRA,
                 .ether_type     = MAC_ETHER_SONIC,
-                .nubus_type     = MAC_NUBUS
+                .nubus_type     = MAC_NUBUS,
+                .floppy_type    = MAC_FLOPPY_SWIM_ADDR1
         }, {
                 .ident          = MAC_MODEL_C660,
                 .name           = "Centris 660AV",
@@ -583,7 +625,8 @@ static struct mac_model mac_data_table[] = {
                 .scsi_type      = MAC_SCSI_QUADRA3,
                 .scc_type       = MAC_SCC_PSC,
                 .ether_type     = MAC_ETHER_MACE,
-                .nubus_type     = MAC_NUBUS
+                .nubus_type     = MAC_NUBUS,
+                .floppy_type    = MAC_FLOPPY_AV
         },
 
         /*
@@ -599,7 +642,8 @@ static struct mac_model mac_data_table[] = {
                 .via_type       = MAC_VIA_QUADRA,
                 .scsi_type      = MAC_SCSI_OLD,
                 .scc_type       = MAC_SCC_QUADRA,
-                .nubus_type     = MAC_NUBUS
+                .nubus_type     = MAC_NUBUS,
+                .floppy_type    = MAC_FLOPPY_SWIM_ADDR2
         }, {
                 .ident          = MAC_MODEL_PB145,
                 .name           = "PowerBook 145",
@@ -607,7 +651,8 @@ static struct mac_model mac_data_table[] = {
                 .via_type       = MAC_VIA_QUADRA,
                 .scsi_type      = MAC_SCSI_OLD,
                 .scc_type       = MAC_SCC_QUADRA,
-                .nubus_type     = MAC_NUBUS
+                .nubus_type     = MAC_NUBUS,
+                .floppy_type    = MAC_FLOPPY_SWIM_ADDR2
         }, {
                 .ident          = MAC_MODEL_PB150,
                 .name           = "PowerBook 150",
@@ -616,7 +661,8 @@ static struct mac_model mac_data_table[] = {
                 .scsi_type      = MAC_SCSI_OLD,
                 .ide_type       = MAC_IDE_PB,
                 .scc_type       = MAC_SCC_QUADRA,
-                .nubus_type     = MAC_NUBUS
+                .nubus_type     = MAC_NUBUS,
+                .floppy_type    = MAC_FLOPPY_SWIM_ADDR2
         }, {
                 .ident          = MAC_MODEL_PB160,
                 .name           = "PowerBook 160",
@@ -624,7 +670,8 @@ static struct mac_model mac_data_table[] = {
                 .via_type       = MAC_VIA_QUADRA,
                 .scsi_type      = MAC_SCSI_OLD,
                 .scc_type       = MAC_SCC_QUADRA,
-                .nubus_type     = MAC_NUBUS
+                .nubus_type     = MAC_NUBUS,
+                .floppy_type    = MAC_FLOPPY_SWIM_ADDR2
         }, {
                 .ident          = MAC_MODEL_PB165,
                 .name           = "PowerBook 165",
@@ -632,7 +679,8 @@ static struct mac_model mac_data_table[] = {
                 .via_type       = MAC_VIA_QUADRA,
                 .scsi_type      = MAC_SCSI_OLD,
                 .scc_type       = MAC_SCC_QUADRA,
-                .nubus_type     = MAC_NUBUS
+                .nubus_type     = MAC_NUBUS,
+                .floppy_type    = MAC_FLOPPY_SWIM_ADDR2
         }, {
                 .ident          = MAC_MODEL_PB165C,
                 .name           = "PowerBook 165c",
@@ -640,7 +688,8 @@ static struct mac_model mac_data_table[] = {
                 .via_type       = MAC_VIA_QUADRA,
                 .scsi_type      = MAC_SCSI_OLD,
                 .scc_type       = MAC_SCC_QUADRA,
-                .nubus_type     = MAC_NUBUS
+                .nubus_type     = MAC_NUBUS,
+                .floppy_type    = MAC_FLOPPY_SWIM_ADDR2
         }, {
                 .ident          = MAC_MODEL_PB170,
                 .name           = "PowerBook 170",
@@ -648,7 +697,8 @@ static struct mac_model mac_data_table[] = {
                 .via_type       = MAC_VIA_QUADRA,
                 .scsi_type      = MAC_SCSI_OLD,
                 .scc_type       = MAC_SCC_QUADRA,
-                .nubus_type     = MAC_NUBUS
+                .nubus_type     = MAC_NUBUS,
+                .floppy_type    = MAC_FLOPPY_SWIM_ADDR2
         }, {
                 .ident          = MAC_MODEL_PB180,
                 .name           = "PowerBook 180",
@@ -656,7 +706,8 @@ static struct mac_model mac_data_table[] = {
                 .via_type       = MAC_VIA_QUADRA,
                 .scsi_type      = MAC_SCSI_OLD,
                 .scc_type       = MAC_SCC_QUADRA,
-                .nubus_type     = MAC_NUBUS
+                .nubus_type     = MAC_NUBUS,
+                .floppy_type    = MAC_FLOPPY_SWIM_ADDR2
         }, {
                 .ident          = MAC_MODEL_PB180C,
                 .name           = "PowerBook 180c",
@@ -664,7 +715,8 @@ static struct mac_model mac_data_table[] = {
                 .via_type       = MAC_VIA_QUADRA,
                 .scsi_type      = MAC_SCSI_OLD,
                 .scc_type       = MAC_SCC_QUADRA,
-                .nubus_type     = MAC_NUBUS
+                .nubus_type     = MAC_NUBUS,
+                .floppy_type    = MAC_FLOPPY_SWIM_ADDR2
         }, {
                 .ident          = MAC_MODEL_PB190,
                 .name           = "PowerBook 190",
@@ -673,7 +725,8 @@ static struct mac_model mac_data_table[] = {
                 .scsi_type      = MAC_SCSI_OLD,
                 .ide_type       = MAC_IDE_BABOON,
                 .scc_type       = MAC_SCC_QUADRA,
-                .nubus_type     = MAC_NUBUS
+                .nubus_type     = MAC_NUBUS,
+                .floppy_type    = MAC_FLOPPY_SWIM_ADDR2
         }, {
                 .ident          = MAC_MODEL_PB520,
                 .name           = "PowerBook 520",
@@ -682,7 +735,8 @@ static struct mac_model mac_data_table[] = {
                 .scsi_type      = MAC_SCSI_OLD,
                 .scc_type       = MAC_SCC_QUADRA,
                 .ether_type     = MAC_ETHER_SONIC,
-                .nubus_type     = MAC_NUBUS
+                .nubus_type     = MAC_NUBUS,
+                .floppy_type    = MAC_FLOPPY_SWIM_ADDR2
         },
 
         /*
@@ -702,7 +756,8 @@ static struct mac_model mac_data_table[] = {
                 .via_type       = MAC_VIA_IIci,
                 .scsi_type      = MAC_SCSI_OLD,
                 .scc_type       = MAC_SCC_QUADRA,
-                .nubus_type     = MAC_NUBUS
+                .nubus_type     = MAC_NUBUS,
+                .floppy_type    = MAC_FLOPPY_SWIM_ADDR2
         }, {
                 .ident          = MAC_MODEL_PB230,
                 .name           = "PowerBook Duo 230",
@@ -710,7 +765,8 @@ static struct mac_model mac_data_table[] = {
                 .via_type       = MAC_VIA_IIci,
                 .scsi_type      = MAC_SCSI_OLD,
                 .scc_type       = MAC_SCC_QUADRA,
-                .nubus_type     = MAC_NUBUS
+                .nubus_type     = MAC_NUBUS,
+                .floppy_type    = MAC_FLOPPY_SWIM_ADDR2
         }, {
                 .ident          = MAC_MODEL_PB250,
                 .name           = "PowerBook Duo 250",
@@ -718,7 +774,8 @@ static struct mac_model mac_data_table[] = {
                 .via_type       = MAC_VIA_IIci,
                 .scsi_type      = MAC_SCSI_OLD,
                 .scc_type       = MAC_SCC_QUADRA,
-                .nubus_type     = MAC_NUBUS
+                .nubus_type     = MAC_NUBUS,
+                .floppy_type    = MAC_FLOPPY_SWIM_ADDR2
         }, {
                 .ident          = MAC_MODEL_PB270C,
                 .name           = "PowerBook Duo 270c",
@@ -726,7 +783,8 @@ static struct mac_model mac_data_table[] = {
                 .via_type       = MAC_VIA_IIci,
                 .scsi_type      = MAC_SCSI_OLD,
                 .scc_type       = MAC_SCC_QUADRA,
-                .nubus_type     = MAC_NUBUS
+                .nubus_type     = MAC_NUBUS,
+                .floppy_type    = MAC_FLOPPY_SWIM_ADDR2
         }, {
                 .ident          = MAC_MODEL_PB280,
                 .name           = "PowerBook Duo 280",
@@ -734,7 +792,8 @@ static struct mac_model mac_data_table[] = {
                 .via_type       = MAC_VIA_IIci,
                 .scsi_type      = MAC_SCSI_OLD,
                 .scc_type       = MAC_SCC_QUADRA,
-                .nubus_type     = MAC_NUBUS
+                .nubus_type     = MAC_NUBUS,
+                .floppy_type    = MAC_FLOPPY_SWIM_ADDR2
         }, {
                 .ident          = MAC_MODEL_PB280C,
                 .name           = "PowerBook Duo 280c",
@@ -742,7 +801,8 @@ static struct mac_model mac_data_table[] = {
                 .via_type       = MAC_VIA_IIci,
                 .scsi_type      = MAC_SCSI_OLD,
                 .scc_type       = MAC_SCC_QUADRA,
-                .nubus_type     = MAC_NUBUS
+                .nubus_type     = MAC_NUBUS,
+                .floppy_type    = MAC_FLOPPY_SWIM_ADDR2
         },
 
         /*
@@ -815,3 +875,42 @@ static void mac_get_model(char *str)
         strcpy(str, "Macintosh ");
         strcat(str, macintosh_config->name);
 }
+
+static struct resource swim_resources[1];
+
+static struct platform_device swim_device = {
+        .name           = "swim",
+        .id             = -1,
+        .num_resources  = ARRAY_SIZE(swim_resources),
+        .resource       = swim_resources,
+};
+
+static struct platform_device *mac_platform_devices[] __initdata = {
+        &swim_device
+};
+
+int __init mac_platform_init(void)
+{
+        u8 *swim_base;
+
+        switch (macintosh_config->floppy_type) {
+        case MAC_FLOPPY_SWIM_ADDR1:
+                swim_base = (u8 *)(VIA1_BASE + 0x1E000);
+                break;
+        case MAC_FLOPPY_SWIM_ADDR2:
+                swim_base = (u8 *)(VIA1_BASE + 0x16000);
+                break;
+        default:
+                return 0;
+        }
+
+        swim_resources[0].name = "swim-regs";
+        swim_resources[0].start = (resource_size_t)swim_base;
+        swim_resources[0].end = (resource_size_t)(swim_base + SWIM_IO_SIZE);
+        swim_resources[0].flags = IORESOURCE_MEM;
+
+        return platform_add_devices(mac_platform_devices,
+                                    ARRAY_SIZE(mac_platform_devices));
+}
+
+arch_initcall(mac_platform_init);
diff --git a/arch/m68k/mac/via.c b/arch/m68k/mac/via.c
index 7d97ba54536e..11bce3cb6482 100644
--- a/arch/m68k/mac/via.c
+++ b/arch/m68k/mac/via.c
@@ -645,3 +645,12 @@ int via_irq_pending(int irq)
         }
         return 0;
 }
+
+void via1_set_head(int head)
+{
+        if (head == 0)
+                via1[vBufA] &= ~VIA1A_vHeadSel;
+        else
+                via1[vBufA] |= VIA1A_vHeadSel;
+}
+EXPORT_SYMBOL(via1_set_head);
diff --git a/arch/m68knommu/platform/520x/config.c b/arch/m68knommu/platform/520x/config.c
index 06d887cdcbfb..855fc6a79d72 100644
--- a/arch/m68knommu/platform/520x/config.c
+++ b/arch/m68knommu/platform/520x/config.c
@@ -49,8 +49,39 @@ static struct platform_device m520x_uart = {
         .dev.platform_data      = m520x_uart_platform,
 };
 
+static struct resource m520x_fec_resources[] = {
+        {
+                .start          = MCF_MBAR + 0x30000,
+                .end            = MCF_MBAR + 0x30000 + 0x7ff,
+                .flags          = IORESOURCE_MEM,
+        },
+        {
+                .start          = 64 + 36,
+                .end            = 64 + 36,
+                .flags          = IORESOURCE_IRQ,
+        },
+        {
+                .start          = 64 + 40,
+                .end            = 64 + 40,
+                .flags          = IORESOURCE_IRQ,
+        },
+        {
+                .start          = 64 + 42,
+                .end            = 64 + 42,
+                .flags          = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device m520x_fec = {
+        .name                   = "fec",
+        .id                     = 0,
+        .num_resources          = ARRAY_SIZE(m520x_fec_resources),
+        .resource               = m520x_fec_resources,
+};
+
 static struct platform_device *m520x_devices[] __initdata = {
         &m520x_uart,
+        &m520x_fec,
 };
 
 /***************************************************************************/
@@ -103,6 +134,30 @@ static void __init m520x_uarts_init(void)
 
 /***************************************************************************/
 
+static void __init m520x_fec_init(void)
+{
+        u32 imr;
+        u8 v;
+
+        /* Unmask FEC interrupts at ColdFire interrupt controller */
+        writeb(0x4, MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_ICR0 + 36);
+        writeb(0x4, MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_ICR0 + 40);
+        writeb(0x4, MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_ICR0 + 42);
+
+        imr = readl(MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_IMRH);
+        imr &= ~0x0001FFF0;
+        writel(imr, MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_IMRH);
+
+        /* Set multi-function pins to ethernet mode */
+        v = readb(MCF_IPSBAR + MCF_GPIO_PAR_FEC);
+        writeb(v | 0xf0, MCF_IPSBAR + MCF_GPIO_PAR_FEC);
+
+        v = readb(MCF_IPSBAR + MCF_GPIO_PAR_FECI2C);
+        writeb(v | 0x0f, MCF_IPSBAR + MCF_GPIO_PAR_FECI2C);
+}
+
+/***************************************************************************/
+
 /*
  *  Program the vector to be an auto-vectored.
  */
@@ -118,6 +173,7 @@ void __init config_BSP(char *commandp, int size)
 {
         mach_reset = coldfire_reset;
         m520x_uarts_init();
+        m520x_fec_init();
 }
 
 /***************************************************************************/
diff --git a/arch/m68knommu/platform/523x/config.c b/arch/m68knommu/platform/523x/config.c
index 13f02611ea23..74133f27b30c 100644
--- a/arch/m68knommu/platform/523x/config.c
+++ b/arch/m68knommu/platform/523x/config.c
@@ -50,8 +50,39 @@ static struct platform_device m523x_uart = {
         .dev.platform_data      = m523x_uart_platform,
 };
 
+static struct resource m523x_fec_resources[] = {
+        {
+                .start          = MCF_MBAR + 0x1000,
+                .end            = MCF_MBAR + 0x1000 + 0x7ff,
+                .flags          = IORESOURCE_MEM,
+        },
+        {
+                .start          = 64 + 23,
+                .end            = 64 + 23,
+                .flags          = IORESOURCE_IRQ,
+        },
+        {
+                .start          = 64 + 27,
+                .end            = 64 + 27,
+                .flags          = IORESOURCE_IRQ,
+        },
+        {
+                .start          = 64 + 29,
+                .end            = 64 + 29,
+                .flags          = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device m523x_fec = {
+        .name                   = "fec",
+        .id                     = 0,
+        .num_resources          = ARRAY_SIZE(m523x_fec_resources),
+        .resource               = m523x_fec_resources,
+};
+
 static struct platform_device *m523x_devices[] __initdata = {
         &m523x_uart,
+        &m523x_fec,
 };
 
 /***************************************************************************/
@@ -83,6 +114,25 @@ static void __init m523x_uarts_init(void)
 
 /***************************************************************************/
 
+static void __init m523x_fec_init(void)
+{
+        u32 imr;
+
+        /* Unmask FEC interrupts at ColdFire interrupt controller */
+        writeb(0x28, MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_ICR0 + 23);
+        writeb(0x27, MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_ICR0 + 27);
+        writeb(0x26, MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_ICR0 + 29);
+
+        imr = readl(MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_IMRH);
+        imr &= ~0xf;
+        writel(imr, MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_IMRH);
+        imr = readl(MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_IMRL);
+        imr &= ~0xff800001;
+        writel(imr, MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_IMRL);
+}
+
+/***************************************************************************/
+
 void mcf_disableall(void)
 {
         *((volatile unsigned long *) (MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_IMRH)) = 0xffffffff;
@@ -103,6 +153,7 @@ void __init config_BSP(char *commandp, int size)
         mcf_disableall();
         mach_reset = coldfire_reset;
         m523x_uarts_init();
+        m523x_fec_init();
 }
 
 /***************************************************************************/
diff --git a/arch/m68knommu/platform/5272/config.c b/arch/m68knommu/platform/5272/config.c
index 230bae691a7f..e049245f4092 100644
--- a/arch/m68knommu/platform/5272/config.c
+++ b/arch/m68knommu/platform/5272/config.c
@@ -55,8 +55,39 @@ static struct platform_device m5272_uart = {
         .dev.platform_data      = m5272_uart_platform,
 };
 
+static struct resource m5272_fec_resources[] = {
+        {
+                .start          = MCF_MBAR + 0x840,
+                .end            = MCF_MBAR + 0x840 + 0x1cf,
+                .flags          = IORESOURCE_MEM,
+        },
+        {
+                .start          = 86,
+                .end            = 86,
+                .flags          = IORESOURCE_IRQ,
+        },
+        {
+                .start          = 87,
+                .end            = 87,
+                .flags          = IORESOURCE_IRQ,
+        },
+        {
+                .start          = 88,
+                .end            = 88,
+                .flags          = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device m5272_fec = {
+        .name                   = "fec",
+        .id                     = 0,
+        .num_resources          = ARRAY_SIZE(m5272_fec_resources),
+        .resource               = m5272_fec_resources,
+};
+
 static struct platform_device *m5272_devices[] __initdata = {
         &m5272_uart,
+        &m5272_fec,
 };
 
 /***************************************************************************/
@@ -91,6 +122,22 @@ static void __init m5272_uarts_init(void)
 
 /***************************************************************************/
 
+static void __init m5272_fec_init(void)
+{
+        u32 imr;
+
+        /* Unmask FEC interrupts at ColdFire interrupt controller */
+        imr = readl(MCF_MBAR + MCFSIM_ICR3);
+        imr = (imr & ~0x00000fff) | 0x00000ddd;
+        writel(imr, MCF_MBAR + MCFSIM_ICR3);
+
+        imr = readl(MCF_MBAR + MCFSIM_ICR1);
+        imr = (imr & ~0x0f000000) | 0x0d000000;
+        writel(imr, MCF_MBAR + MCFSIM_ICR1);
+}
+
+/***************************************************************************/
+
 void mcf_disableall(void)
 {
         volatile unsigned long  *icrp;
@@ -155,6 +202,7 @@ void __init config_BSP(char *commandp, int size)
 static int __init init_BSP(void)
 {
         m5272_uarts_init();
+        m5272_fec_init();
         platform_add_devices(m5272_devices, ARRAY_SIZE(m5272_devices));
         return 0;
 }
diff --git a/arch/m68knommu/platform/527x/config.c b/arch/m68knommu/platform/527x/config.c
index 73cd1aef4a90..49343fb157b0 100644
--- a/arch/m68knommu/platform/527x/config.c
+++ b/arch/m68knommu/platform/527x/config.c
@@ -50,8 +50,73 @@ static struct platform_device m527x_uart = {
         .dev.platform_data      = m527x_uart_platform,
 };
 
+static struct resource m527x_fec0_resources[] = {
+        {
+                .start          = MCF_MBAR + 0x1000,
+                .end            = MCF_MBAR + 0x1000 + 0x7ff,
+                .flags          = IORESOURCE_MEM,
+        },
+        {
+                .start          = 64 + 23,
+                .end            = 64 + 23,
+                .flags          = IORESOURCE_IRQ,
+        },
+        {
+                .start          = 64 + 27,
+                .end            = 64 + 27,
+                .flags          = IORESOURCE_IRQ,
+        },
+        {
+                .start          = 64 + 29,
+                .end            = 64 + 29,
+                .flags          = IORESOURCE_IRQ,
+        },
+};
+
+static struct resource m527x_fec1_resources[] = {
+        {
+                .start          = MCF_MBAR + 0x1800,
+                .end            = MCF_MBAR + 0x1800 + 0x7ff,
+                .flags          = IORESOURCE_MEM,
+        },
+        {
+                .start          = 128 + 23,
+                .end            = 128 + 23,
+                .flags          = IORESOURCE_IRQ,
+        },
+        {
+                .start          = 128 + 27,
+                .end            = 128 + 27,
+                .flags          = IORESOURCE_IRQ,
+        },
+        {
+                .start          = 128 + 29,
+                .end            = 128 + 29,
+                .flags          = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device m527x_fec[] = {
+        {
+                .name           = "fec",
+                .id             = 0,
+                .num_resources  = ARRAY_SIZE(m527x_fec0_resources),
+                .resource       = m527x_fec0_resources,
+        },
+        {
+                .name           = "fec",
+                .id             = 1,
+                .num_resources  = ARRAY_SIZE(m527x_fec1_resources),
+                .resource       = m527x_fec1_resources,
+        },
+};
+
 static struct platform_device *m527x_devices[] __initdata = {
         &m527x_uart,
+        &m527x_fec[0],
+#ifdef CONFIG_FEC2
+        &m527x_fec[1],
+#endif
 };
 
 /***************************************************************************/
@@ -97,6 +162,51 @@ static void __init m527x_uarts_init(void)
 
 /***************************************************************************/
 
+static void __init m527x_fec_irq_init(int nr)
+{
+        unsigned long base;
+        u32 imr;
+
+        base = MCF_IPSBAR + (nr ? MCFICM_INTC1 : MCFICM_INTC0);
+
+        writeb(0x28, base + MCFINTC_ICR0 + 23);
+        writeb(0x27, base + MCFINTC_ICR0 + 27);
+        writeb(0x26, base + MCFINTC_ICR0 + 29);
+
+        imr = readl(base + MCFINTC_IMRH);
+        imr &= ~0xf;
+        writel(imr, base + MCFINTC_IMRH);
+        imr = readl(base + MCFINTC_IMRL);
+        imr &= ~0xff800001;
+        writel(imr, base + MCFINTC_IMRL);
+}
+
+static void __init m527x_fec_init(void)
+{
+        u16 par;
+        u8 v;
+
+        m527x_fec_irq_init(0);
+
+        /* Set multi-function pins to ethernet mode for fec0 */
+        par = readw(MCF_IPSBAR + 0x100082);
+        writew(par | 0xf00, MCF_IPSBAR + 0x100082);
+        v = readb(MCF_IPSBAR + 0x100078);
+        writeb(v | 0xc0, MCF_IPSBAR + 0x100078);
+
+#ifdef CONFIG_FEC2
+        m527x_fec_irq_init(1);
+
+        /* Set multi-function pins to ethernet mode for fec1 */
+        par = readw(MCF_IPSBAR + 0x100082);
+        writew(par | 0xa0, MCF_IPSBAR + 0x100082);
+        v = readb(MCF_IPSBAR + 0x100079);
+        writeb(v | 0xc0, MCF_IPSBAR + 0x100079);
+#endif
+}
+
+/***************************************************************************/
+
 void mcf_disableall(void)
 {
         *((volatile unsigned long *) (MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_IMRH)) = 0xffffffff;
@@ -116,13 +226,14 @@ void __init config_BSP(char *commandp, int size)
 {
         mcf_disableall();
         mach_reset = coldfire_reset;
+        m527x_uarts_init();
+        m527x_fec_init();
 }
 
 /***************************************************************************/
 
 static int __init init_BSP(void)
 {
-        m527x_uarts_init();
         platform_add_devices(m527x_devices, ARRAY_SIZE(m527x_devices));
         return 0;
 }
diff --git a/arch/m68knommu/platform/528x/config.c b/arch/m68knommu/platform/528x/config.c
index 44baeb225dc7..bee526f4d1af 100644
--- a/arch/m68knommu/platform/528x/config.c
+++ b/arch/m68knommu/platform/528x/config.c
@@ -57,8 +57,40 @@ static struct platform_device m528x_uart = {
         .dev.platform_data      = m528x_uart_platform,
 };
 
+static struct resource m528x_fec_resources[] = {
+        {
+                .start          = MCF_MBAR + 0x1000,
+                .end            = MCF_MBAR + 0x1000 + 0x7ff,
+                .flags          = IORESOURCE_MEM,
+        },
+        {
+                .start          = 64 + 23,
+                .end            = 64 + 23,
+                .flags          = IORESOURCE_IRQ,
+        },
+        {
+                .start          = 64 + 27,
+                .end            = 64 + 27,
+                .flags          = IORESOURCE_IRQ,
+        },
+        {
+                .start          = 64 + 29,
+                .end            = 64 + 29,
+                .flags          = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device m528x_fec = {
+        .name                   = "fec",
+        .id                     = 0,
+        .num_resources          = ARRAY_SIZE(m528x_fec_resources),
+        .resource               = m528x_fec_resources,
+};
+
+
 static struct platform_device *m528x_devices[] __initdata = {
         &m528x_uart,
+        &m528x_fec,
 };
 
 /***************************************************************************/
@@ -99,6 +131,31 @@ static void __init m528x_uarts_init(void)
 
 /***************************************************************************/
 
+static void __init m528x_fec_init(void)
+{
+        u32 imr;
+        u16 v16;
+
+        /* Unmask FEC interrupts at ColdFire interrupt controller */
+        writeb(0x28, MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_ICR0 + 23);
+        writeb(0x27, MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_ICR0 + 27);
+        writeb(0x26, MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_ICR0 + 29);
+
+        imr = readl(MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_IMRH);
+        imr &= ~0xf;
+        writel(imr, MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_IMRH);
+        imr = readl(MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_IMRL);
+        imr &= ~0xff800001;
+        writel(imr, MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_IMRL);
+
+        /* Set multi-function pins to ethernet mode for fec0 */
+        v16 = readw(MCF_IPSBAR + 0x100056);
+        writew(v16 | 0xf00, MCF_IPSBAR + 0x100056);
+        writeb(0xc0, MCF_IPSBAR + 0x100058);
+}
+
+/***************************************************************************/
+
 void mcf_disableall(void)
 {
         *((volatile unsigned long *) (MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_IMRH)) = 0xffffffff;
@@ -158,6 +215,7 @@ void __init config_BSP(char *commandp, int size)
 static int __init init_BSP(void)
 {
         m528x_uarts_init();
+        m528x_fec_init();
         platform_add_devices(m528x_devices, ARRAY_SIZE(m528x_devices));
         return 0;
 }
diff --git a/arch/m68knommu/platform/532x/config.c b/arch/m68knommu/platform/532x/config.c
index a347623d6ee6..591f2f801134 100644
--- a/arch/m68knommu/platform/532x/config.c
+++ b/arch/m68knommu/platform/532x/config.c
@@ -61,8 +61,38 @@ static struct platform_device m532x_uart = {
         .dev.platform_data      = m532x_uart_platform,
 };
 
+static struct resource m532x_fec_resources[] = {
+        {
+                .start          = 0xfc030000,
+                .end            = 0xfc0307ff,
+                .flags          = IORESOURCE_MEM,
+        },
+        {
+                .start          = 64 + 36,
+                .end            = 64 + 36,
+                .flags          = IORESOURCE_IRQ,
+        },
+        {
+                .start          = 64 + 40,
+                .end            = 64 + 40,
+                .flags          = IORESOURCE_IRQ,
+        },
+        {
+                .start          = 64 + 42,
+                .end            = 64 + 42,
+                .flags          = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device m532x_fec = {
+        .name                   = "fec",
+        .id                     = 0,
+        .num_resources          = ARRAY_SIZE(m532x_fec_resources),
+        .resource               = m532x_fec_resources,
+};
 static struct platform_device *m532x_devices[] __initdata = {
         &m532x_uart,
+        &m532x_fec,
 };
 
 /***************************************************************************/
@@ -93,6 +123,24 @@ static void __init m532x_uarts_init(void)
         for (line = 0; (line < nrlines); line++)
                 m532x_uart_init_line(line, m532x_uart_platform[line].irq);
 }
+/***************************************************************************/
+
+static void __init m532x_fec_init(void)
+{
+        /* Unmask FEC interrupts at ColdFire interrupt controller */
+        MCF_INTC0_ICR36 = 0x2;
+        MCF_INTC0_ICR40 = 0x2;
+        MCF_INTC0_ICR42 = 0x2;
+
+        MCF_INTC0_IMRH &= ~(MCF_INTC_IMRH_INT_MASK36 |
+                MCF_INTC_IMRH_INT_MASK40 | MCF_INTC_IMRH_INT_MASK42);
+
+        /* Set multi-function pins to ethernet mode for fec0 */
+        MCF_GPIO_PAR_FECI2C |= (MCF_GPIO_PAR_FECI2C_PAR_MDC_EMDC |
+                MCF_GPIO_PAR_FECI2C_PAR_MDIO_EMDIO);
+        MCF_GPIO_PAR_FEC = (MCF_GPIO_PAR_FEC_PAR_FEC_7W_FEC |
+                MCF_GPIO_PAR_FEC_PAR_FEC_MII_FEC);
+}
 
 /***************************************************************************/
 
@@ -150,6 +198,7 @@ void __init config_BSP(char *commandp, int size)
 static int __init init_BSP(void)
 {
         m532x_uarts_init();
+        m532x_fec_init();
         platform_add_devices(m532x_devices, ARRAY_SIZE(m532x_devices));
         return 0;
 }
diff --git a/arch/mips/basler/excite/excite_iodev.c b/arch/mips/basler/excite/excite_iodev.c
index a1e3526b4a94..dfbfd7e2ac08 100644
--- a/arch/mips/basler/excite/excite_iodev.c
+++ b/arch/mips/basler/excite/excite_iodev.c
@@ -33,8 +33,8 @@
 
 
 static const struct resource *iodev_get_resource(struct platform_device *, const char *, unsigned int);
-static int __init iodev_probe(struct device *);
-static int __exit iodev_remove(struct device *);
+static int __init iodev_probe(struct platform_device *);
+static int __exit iodev_remove(struct platform_device *);
 static int iodev_open(struct inode *, struct file *);
 static int iodev_release(struct inode *, struct file *);
 static ssize_t iodev_read(struct file *, char __user *, size_t s, loff_t *);
@@ -65,13 +65,13 @@ static struct miscdevice miscdev =
         .fops           = &fops
 };
 
-static struct device_driver iodev_driver =
-{
-        .name           = (char *) iodev_name,
-        .bus            = &platform_bus_type,
-        .owner          = THIS_MODULE,
+static struct platform_driver iodev_driver = {
+        .driver = {
+                .name           = iodev_name,
+                .owner          = THIS_MODULE,
+        },
         .probe          = iodev_probe,
-        .remove         = __exit_p(iodev_remove)
+        .remove         = __devexit_p(iodev_remove),
 };
 
 
@@ -89,11 +89,10 @@ iodev_get_resource(struct platform_device *pdv, const char *name,
 
 
 /* No hotplugging on the platform bus - use __init */
-static int __init iodev_probe(struct device *dev)
+static int __init iodev_probe(struct platform_device *dev)
 {
-        struct platform_device * const pdv = to_platform_device(dev);
         const struct resource * const ri =
-                iodev_get_resource(pdv, IODEV_RESOURCE_IRQ, IORESOURCE_IRQ);
+                iodev_get_resource(dev, IODEV_RESOURCE_IRQ, IORESOURCE_IRQ);
 
         if (unlikely(!ri))
                 return -ENXIO;
@@ -104,7 +103,7 @@ static int __init iodev_probe(struct device *dev)
 
 
 
-static int __exit iodev_remove(struct device *dev)
+static int __exit iodev_remove(struct platform_device *dev)
 {
         return misc_deregister(&miscdev);
 }
@@ -160,14 +159,14 @@ static irqreturn_t iodev_irqhdl(int irq, void *ctxt)
 
 static int __init iodev_init_module(void)
 {
-        return driver_register(&iodev_driver);
+        return platform_driver_register(&iodev_driver);
 }
 
 
 
 static void __exit iodev_cleanup_module(void)
 {
-        driver_unregister(&iodev_driver);
+        platform_driver_unregister(&iodev_driver);
 }
 
 module_init(iodev_init_module);
diff --git a/arch/mips/include/asm/irq.h b/arch/mips/include/asm/irq.h
index abc62aa744ac..3214ade02d10 100644
--- a/arch/mips/include/asm/irq.h
+++ b/arch/mips/include/asm/irq.h
@@ -66,7 +66,7 @@ extern void smtc_forward_irq(unsigned int irq);
  */
 #define IRQ_AFFINITY_HOOK(irq)                                          \
 do {                                                                    \
-    if (!cpu_isset(smp_processor_id(), irq_desc[irq].affinity)) {       \
+    if (!cpumask_test_cpu(smp_processor_id(), irq_desc[irq].affinity)) {\
         smtc_forward_irq(irq);                                          \
         irq_exit();                                                     \
         return;                                                         \
diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h
index 0417516503f6..526f327475ce 100644
--- a/arch/mips/include/asm/mipsregs.h
+++ b/arch/mips/include/asm/mipsregs.h
@@ -1391,11 +1391,11 @@ static inline void tlb_write_random(void)
 static inline unsigned int                                      \
 set_c0_##name(unsigned int set)                                 \
 {                                                               \
-        unsigned int res;                                       \
+        unsigned int res, new;                                  \
                                                                 \
         res = read_c0_##name();                                 \
-        res |= set;                                             \
-        write_c0_##name(res);                                   \
+        new = res | set;                                        \
+        write_c0_##name(new);                                   \
                                                                 \
         return res;                                             \
 }                                                               \
@@ -1403,24 +1403,24 @@ set_c0_##name(unsigned int set)					\
 static inline unsigned int                                      \
 clear_c0_##name(unsigned int clear)                             \
 {                                                               \
-        unsigned int res;                                       \
+        unsigned int res, new;                                  \
                                                                 \
         res = read_c0_##name();                                 \
-        res &= ~clear;                                          \
-        write_c0_##name(res);                                   \
+        new = res & ~clear;                                     \
+        write_c0_##name(new);                                   \
                                                                 \
         return res;                                             \
 }                                                               \
                                                                 \
 static inline unsigned int                                      \
-change_c0_##name(unsigned int change, unsigned int new)         \
+change_c0_##name(unsigned int change, unsigned int val)         \
 {                                                               \
-        unsigned int res;                                       \
+        unsigned int res, new;                                  \
                                                                 \
         res = read_c0_##name();                                 \
-        res &= ~change;                                         \
-        res |= (new & change);                                  \
-        write_c0_##name(res);                                   \
+        new = res & ~change;                                    \
+        new |= (val & change);                                  \
+        write_c0_##name(new);                                   \
                                                                 \
         return res;                                             \
 }
diff --git a/arch/mips/include/asm/sigcontext.h b/arch/mips/include/asm/sigcontext.h
index 9ce0607d7a4e..9e89cf99d4e4 100644
--- a/arch/mips/include/asm/sigcontext.h
+++ b/arch/mips/include/asm/sigcontext.h
@@ -9,6 +9,7 @@
 #ifndef _ASM_SIGCONTEXT_H
 #define _ASM_SIGCONTEXT_H
 
+#include <linux/types.h>
 #include <asm/sgidefs.h>
 
 #if _MIPS_SIM == _MIPS_SIM_ABI32
diff --git a/arch/mips/include/asm/socket.h b/arch/mips/include/asm/socket.h
index facc2d7a87ca..2abca1780169 100644
--- a/arch/mips/include/asm/socket.h
+++ b/arch/mips/include/asm/socket.h
@@ -75,6 +75,9 @@ To add: #define SO_REUSEPORT 0x0200	/* Allow local address and port reuse.  */
 
 #define SO_MARK                 36
 
+#define SO_TIMESTAMPING         37
+#define SCM_TIMESTAMPING        SO_TIMESTAMPING
+
 #ifdef __KERNEL__
 
 /** sock_type - Socket types
diff --git a/arch/mips/include/asm/swab.h b/arch/mips/include/asm/swab.h
index 88f1f7d555cb..99993c0d6c12 100644
--- a/arch/mips/include/asm/swab.h
+++ b/arch/mips/include/asm/swab.h
@@ -9,7 +9,7 @@
 #define _ASM_SWAB_H
 
 #include <linux/compiler.h>
-#include <asm/types.h>
+#include <linux/types.h>
 
 #define __SWAB_64_THRU_32__
 
diff --git a/arch/mips/kernel/irq-gic.c b/arch/mips/kernel/irq-gic.c
index 494a49a317e9..87deb8f6c458 100644
--- a/arch/mips/kernel/irq-gic.c
+++ b/arch/mips/kernel/irq-gic.c
@@ -187,7 +187,7 @@ static void gic_set_affinity(unsigned int irq, const struct cpumask *cpumask)
                 set_bit(irq, pcpu_masks[first_cpu(tmp)].pcpu_mask);
 
         }
-        irq_desc[irq].affinity = *cpumask;
+        cpumask_copy(irq_desc[irq].affinity, cpumask);
         spin_unlock_irqrestore(&gic_lock, flags);
 
 }
diff --git a/arch/mips/kernel/irq.c b/arch/mips/kernel/irq.c
index 4b4007b3083a..7b845ba9dff4 100644
--- a/arch/mips/kernel/irq.c
+++ b/arch/mips/kernel/irq.c
@@ -108,7 +108,7 @@ int show_interrupts(struct seq_file *p, void *v)
                 seq_printf(p, "%10u ", kstat_irqs(i));
 #else
                 for_each_online_cpu(j)
-                        seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
+                        seq_printf(p, "%10u ", kstat_irqs_cpu(i, j));
 #endif
                 seq_printf(p, " %14s", irq_desc[i].chip->name);
                 seq_printf(p, "  %s", action->name);
diff --git a/arch/mips/kernel/linux32.c b/arch/mips/kernel/linux32.c
index 1a86f84fa947..2a472713de8e 100644
--- a/arch/mips/kernel/linux32.c
+++ b/arch/mips/kernel/linux32.c
@@ -32,7 +32,6 @@
 #include <linux/module.h>
 #include <linux/binfmts.h>
 #include <linux/security.h>
-#include <linux/syscalls.h>
 #include <linux/compat.h>
 #include <linux/vfs.h>
 #include <linux/ipc.h>
@@ -356,40 +355,6 @@ SYSCALL_DEFINE1(32_personality, unsigned long, personality)
         return ret;
 }
 
-/* ustat compatibility */
-struct ustat32 {
-        compat_daddr_t  f_tfree;
-        compat_ino_t    f_tinode;
-        char            f_fname[6];
-        char            f_fpack[6];
-};
-
-extern asmlinkage long sys_ustat(dev_t dev, struct ustat __user * ubuf);
-
-SYSCALL_DEFINE2(32_ustat, dev_t, dev, struct ustat32 __user *, ubuf32)
-{
-        int err;
-        struct ustat tmp;
-        struct ustat32 tmp32;
-        mm_segment_t old_fs = get_fs();
-
-        set_fs(KERNEL_DS);
-        err = sys_ustat(dev, (struct ustat __user *)&tmp);
-        set_fs(old_fs);
-
-        if (err)
-                goto out;
-
-        memset(&tmp32, 0, sizeof(struct ustat32));
-        tmp32.f_tfree = tmp.f_tfree;
-        tmp32.f_tinode = tmp.f_tinode;
-
-        err = copy_to_user(ubuf32, &tmp32, sizeof(struct ustat32)) ? -EFAULT : 0;
-
-out:
-        return err;
-}
-
 SYSCALL_DEFINE4(32_sendfile, long, out_fd, long, in_fd,
         compat_off_t __user *, offset, s32, count)
 {
diff --git a/arch/mips/kernel/scall64-n32.S b/arch/mips/kernel/scall64-n32.S
index 7438e92f8a01..f61d6b0e5731 100644
--- a/arch/mips/kernel/scall64-n32.S
+++ b/arch/mips/kernel/scall64-n32.S
@@ -253,7 +253,7 @@ EXPORT(sysn32_call_table)
         PTR     compat_sys_utime                /* 6130 */
         PTR     sys_mknod
         PTR     sys_32_personality
-        PTR     sys_32_ustat
+        PTR     compat_sys_ustat
         PTR     compat_sys_statfs
         PTR     compat_sys_fstatfs              /* 6135 */
         PTR     sys_sysfs
diff --git a/arch/mips/kernel/scall64-o32.S b/arch/mips/kernel/scall64-o32.S
index b0fef4ff9827..60997f1f69d4 100644
--- a/arch/mips/kernel/scall64-o32.S
+++ b/arch/mips/kernel/scall64-o32.S
@@ -265,7 +265,7 @@ sys_call_table:
         PTR     sys_olduname
         PTR     sys_umask                       /* 4060 */
         PTR     sys_chroot
-        PTR     sys_32_ustat
+        PTR     compat_sys_ustat
         PTR     sys_dup2
         PTR     sys_getppid
         PTR     sys_getpgrp                     /* 4065 */
diff --git a/arch/mips/kernel/smtc.c b/arch/mips/kernel/smtc.c
index b6cca01ff82b..5f5af7d4c890 100644
--- a/arch/mips/kernel/smtc.c
+++ b/arch/mips/kernel/smtc.c
@@ -686,7 +686,7 @@ void smtc_forward_irq(unsigned int irq)
          * and efficiency, we just pick the easiest one to find.
          */
 
-        target = first_cpu(irq_desc[irq].affinity);
+        target = cpumask_first(irq_desc[irq].affinity);
 
         /*
          * We depend on the platform code to have correctly processed
@@ -921,11 +921,13 @@ void ipi_decode(struct smtc_ipi *pipi)
         struct clock_event_device *cd;
         void *arg_copy = pipi->arg;
         int type_copy = pipi->type;
+        int irq = MIPS_CPU_IRQ_BASE + 1;
+
         smtc_ipi_nq(&freeIPIq, pipi);
         switch (type_copy) {
         case SMTC_CLOCK_TICK:
                 irq_enter();
-                kstat_this_cpu.irqs[MIPS_CPU_IRQ_BASE + 1]++;
+                kstat_incr_irqs_this_cpu(irq, irq_to_desc(irq));
                 cd = &per_cpu(mips_clockevent_device, cpu);
                 cd->event_handler(cd);
                 irq_exit();
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
index b2d7041341b8..29fadaccecdd 100644
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -1520,7 +1520,9 @@ void __cpuinit per_cpu_trap_init(void)
 #endif /* CONFIG_MIPS_MT_SMTC */
 
         if (cpu_has_veic || cpu_has_vint) {
+                unsigned long sr = set_c0_status(ST0_BEV);
                 write_c0_ebase(ebase);
+                write_c0_status(sr);
                 /* Setting vector spacing enables EI/VI mode  */
                 change_c0_intctl(0x3e0, VECTORSPACING);
         }
@@ -1602,8 +1604,6 @@ void __cpuinit set_uncached_handler(unsigned long offset, void *addr,
 #ifdef CONFIG_64BIT
         unsigned long uncached_ebase = TO_UNCAC(ebase);
 #endif
-        if (cpu_has_mips_r2)
-                uncached_ebase += (read_c0_ebase() & 0x3ffff000);
 
         if (!addr)
                 panic(panic_null_cerr);
@@ -1635,9 +1635,11 @@ void __init trap_init(void)
                 return; /* Already done */
 #endif
 
-        if (cpu_has_veic || cpu_has_vint)
-                ebase = (unsigned long) alloc_bootmem_low_pages(0x200 + VECTORSPACING*64);
-        else {
+        if (cpu_has_veic || cpu_has_vint) {
+                unsigned long size = 0x200 + VECTORSPACING*64;
+                ebase = (unsigned long)
+                        __alloc_bootmem(size, 1 << fls(size), 0);
+        } else {
                 ebase = CAC_BASE;
                 if (cpu_has_mips_r2)
                         ebase += (read_c0_ebase() & 0x3ffff000);
diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c
index c43f4b26a690..871e828bc62a 100644
--- a/arch/mips/mm/c-r4k.c
+++ b/arch/mips/mm/c-r4k.c
@@ -780,7 +780,7 @@ static void __cpuinit probe_pcache(void)
                 c->dcache.ways = 2;
                 c->dcache.waybit = 0;
 
-                c->options |= MIPS_CPU_CACHE_CDEX_P;
+                c->options |= MIPS_CPU_CACHE_CDEX_P | MIPS_CPU_PREFETCH;
                 break;
 
         case CPU_TX49XX:
diff --git a/arch/mips/mm/dma-default.c b/arch/mips/mm/dma-default.c
index 546e6977d4ff..bed56f1ac837 100644
--- a/arch/mips/mm/dma-default.c
+++ b/arch/mips/mm/dma-default.c
@@ -225,7 +225,7 @@ void dma_unmap_page(struct device *dev, dma_addr_t dma_address, size_t size,
         if (!plat_device_is_coherent(dev) && direction != DMA_TO_DEVICE) {
                 unsigned long addr;
 
-                addr = plat_dma_addr_to_phys(dma_address);
+                addr = dma_addr_to_virt(dma_address);
                 dma_cache_wback_inv(addr, size);
         }
 
diff --git a/arch/mips/mti-malta/malta-smtc.c b/arch/mips/mti-malta/malta-smtc.c
index aabd7274507b..5ba31888fefb 100644
--- a/arch/mips/mti-malta/malta-smtc.c
+++ b/arch/mips/mti-malta/malta-smtc.c
@@ -116,7 +116,7 @@ struct plat_smp_ops msmtc_smp_ops = {
 
 void plat_set_irq_affinity(unsigned int irq, const struct cpumask *affinity)
 {
-        cpumask_t tmask = *affinity;
+        cpumask_t tmask;
         int cpu = 0;
         void smtc_set_irq_affinity(unsigned int irq, cpumask_t aff);
 
@@ -139,11 +139,12 @@ void plat_set_irq_affinity(unsigned int irq, const struct cpumask *affinity)
          * be made to forward to an offline "CPU".
          */
 
+        cpumask_copy(&tmask, affinity);
         for_each_cpu(cpu, affinity) {
                 if ((cpu_data[cpu].vpe_id != 0) || !cpu_online(cpu))
                         cpu_clear(cpu, tmask);
         }
-        irq_desc[irq].affinity = tmask;
+        cpumask_copy(irq_desc[irq].affinity, &tmask);
 
         if (cpus_empty(tmask))
                 /*
diff --git a/arch/mips/sgi-ip22/ip22-int.c b/arch/mips/sgi-ip22/ip22-int.c
index f8b18af141a1..0ecd5fe9486e 100644
--- a/arch/mips/sgi-ip22/ip22-int.c
+++ b/arch/mips/sgi-ip22/ip22-int.c
@@ -155,7 +155,7 @@ static void indy_buserror_irq(void)
         int irq = SGI_BUSERR_IRQ;
 
         irq_enter();
-        kstat_this_cpu.irqs[irq]++;
+        kstat_incr_irqs_this_cpu(irq, irq_to_desc(irq));
         ip22_be_interrupt(irq);
         irq_exit();
 }
diff --git a/arch/mips/sgi-ip22/ip22-time.c b/arch/mips/sgi-ip22/ip22-time.c
index 3dcb27ec0c53..c8f7d2328b24 100644
--- a/arch/mips/sgi-ip22/ip22-time.c
+++ b/arch/mips/sgi-ip22/ip22-time.c
@@ -122,7 +122,7 @@ void indy_8254timer_irq(void)
         char c;
 
         irq_enter();
-        kstat_this_cpu.irqs[irq]++;
+        kstat_incr_irqs_this_cpu(irq, irq_to_desc(irq));
         printk(KERN_ALERT "Oops, got 8254 interrupt.\n");
         ArcRead(0, &c, 1, &cnt);
         ArcEnterInteractiveMode();
diff --git a/arch/mips/sibyte/bcm1480/smp.c b/arch/mips/sibyte/bcm1480/smp.c
index dddfda8e8294..314691648c97 100644
--- a/arch/mips/sibyte/bcm1480/smp.c
+++ b/arch/mips/sibyte/bcm1480/smp.c
@@ -178,9 +178,10 @@ struct plat_smp_ops bcm1480_smp_ops = {
 void bcm1480_mailbox_interrupt(void)
 {
         int cpu = smp_processor_id();
+        int irq = K_BCM1480_INT_MBOX_0_0;
         unsigned int action;
 
-        kstat_this_cpu.irqs[K_BCM1480_INT_MBOX_0_0]++;
+        kstat_incr_irqs_this_cpu(irq, irq_to_desc(irq));
         /* Load the mailbox register to figure out what we're supposed to do */
         action = (__raw_readq(mailbox_0_regs[cpu]) >> 48) & 0xffff;
 
diff --git a/arch/mips/sibyte/sb1250/smp.c b/arch/mips/sibyte/sb1250/smp.c
index 5950a288a7da..cad14003b84f 100644
--- a/arch/mips/sibyte/sb1250/smp.c
+++ b/arch/mips/sibyte/sb1250/smp.c
@@ -166,9 +166,10 @@ struct plat_smp_ops sb_smp_ops = {
 void sb1250_mailbox_interrupt(void)
 {
         int cpu = smp_processor_id();
+        int irq = K_INT_MBOX_0;
         unsigned int action;
 
-        kstat_this_cpu.irqs[K_INT_MBOX_0]++;
+        kstat_incr_irqs_this_cpu(irq, irq_to_desc(irq));
         /* Load the mailbox register to figure out what we're supposed to do */
         action = (____raw_readq(mailbox_regs[cpu]) >> 48) & 0xffff;
 
diff --git a/arch/mn10300/kernel/irq.c b/arch/mn10300/kernel/irq.c
index 56c64ccc9c21..50fdb5c16e0c 100644
--- a/arch/mn10300/kernel/irq.c
+++ b/arch/mn10300/kernel/irq.c
@@ -221,7 +221,7 @@ int show_interrupts(struct seq_file *p, void *v)
                 if (action) {
                         seq_printf(p, "%3d: ", i);
                         for_each_present_cpu(cpu)
-                                seq_printf(p, "%10u ", kstat_cpu(cpu).irqs[i]);
+                                seq_printf(p, "%10u ", kstat_irqs_cpu(i, cpu));
                         seq_printf(p, " %14s.%u", irq_desc[i].chip->name,
                                    (GxICR(i) & GxICR_LEVEL) >>
                                    GxICR_LEVEL_SHIFT);
diff --git a/arch/mn10300/kernel/mn10300-watchdog.c b/arch/mn10300/kernel/mn10300-watchdog.c
index 10811e981d20..2e370d88a87a 100644
--- a/arch/mn10300/kernel/mn10300-watchdog.c
+++ b/arch/mn10300/kernel/mn10300-watchdog.c
@@ -130,6 +130,7 @@ void watchdog_interrupt(struct pt_regs *regs, enum exception_code excep)
          * the stack NMI-atomically, it's safe to use smp_processor_id().
          */
         int sum, cpu = smp_processor_id();
+        int irq = NMIIRQ;
         u8 wdt, tmp;
 
         wdt = WDCTR & ~WDCTR_WDCNE;
@@ -138,7 +139,7 @@ void watchdog_interrupt(struct pt_regs *regs, enum exception_code excep)
         NMICR = NMICR_WDIF;
 
         nmi_count(cpu)++;
-        kstat_this_cpu.irqs[NMIIRQ]++;
+        kstat_incr_irqs_this_cpu(irq, irq_to_desc(irq));
         sum = irq_stat[cpu].__irq_count;
 
         if (last_irq_sums[cpu] == sum) {
diff --git a/arch/parisc/include/asm/pdc.h b/arch/parisc/include/asm/pdc.h
index c584b00c6074..430f1aeea0b8 100644
--- a/arch/parisc/include/asm/pdc.h
+++ b/arch/parisc/include/asm/pdc.h
@@ -336,10 +336,11 @@
 #define NUM_PDC_RESULT  32
 
 #if !defined(__ASSEMBLY__)
-#ifdef __KERNEL__
 
 #include <linux/types.h>
 
+#ifdef __KERNEL__
+
 extern int pdc_type;
 
 /* Values for pdc_type */
diff --git a/arch/parisc/include/asm/socket.h b/arch/parisc/include/asm/socket.h
index fba402c95ac2..885472bf7b78 100644
--- a/arch/parisc/include/asm/socket.h
+++ b/arch/parisc/include/asm/socket.h
@@ -54,6 +54,9 @@
 
 #define SO_MARK                 0x401f
 
+#define SO_TIMESTAMPING         0x4020
+#define SCM_TIMESTAMPING        SO_TIMESTAMPING
+
 /* O_NONBLOCK clashes with the bits used for socket types.  Therefore we
  * have to define SOCK_NONBLOCK to a different value here.
  */
diff --git a/arch/parisc/include/asm/swab.h b/arch/parisc/include/asm/swab.h
index 3ff16c5a3358..e78403b129ef 100644
--- a/arch/parisc/include/asm/swab.h
+++ b/arch/parisc/include/asm/swab.h
@@ -1,7 +1,7 @@
 #ifndef _PARISC_SWAB_H
 #define _PARISC_SWAB_H
 
-#include <asm/types.h>
+#include <linux/types.h>
 #include <linux/compiler.h>
 
 #define __SWAB_64_THRU_32__
diff --git a/arch/parisc/kernel/irq.c b/arch/parisc/kernel/irq.c
index 29e70e16ede8..1c740f5cbd63 100644
--- a/arch/parisc/kernel/irq.c
+++ b/arch/parisc/kernel/irq.c
@@ -138,7 +138,7 @@ static void cpu_set_affinity_irq(unsigned int irq, const struct cpumask *dest)
         if (cpu_dest < 0)
                 return;
 
-        cpumask_copy(&irq_desc[irq].affinity, &cpumask_of_cpu(cpu_dest));
+        cpumask_copy(&irq_desc[irq].affinity, dest);
 }
 #endif
 
@@ -185,7 +185,7 @@ int show_interrupts(struct seq_file *p, void *v)
                 seq_printf(p, "%3d: ", i);
 #ifdef CONFIG_SMP
                 for_each_online_cpu(j)
-                        seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
+                        seq_printf(p, "%10u ", kstat_irqs_cpu(i, j));
 #else
                 seq_printf(p, "%10u ", kstat_irqs(i));
 #endif
diff --git a/arch/parisc/kernel/syscall_table.S b/arch/parisc/kernel/syscall_table.S
index 303d2b647e41..03b9a01bc16c 100644
--- a/arch/parisc/kernel/syscall_table.S
+++ b/arch/parisc/kernel/syscall_table.S
@@ -130,7 +130,7 @@
         ENTRY_OURS(newuname)
         ENTRY_SAME(umask)               /* 60 */
         ENTRY_SAME(chroot)
-        ENTRY_SAME(ustat)
+        ENTRY_COMP(ustat)
         ENTRY_SAME(dup2)
         ENTRY_SAME(getppid)
         ENTRY_SAME(getpgrp)             /* 65 */
diff --git a/arch/powerpc/boot/dts/canyonlands.dts b/arch/powerpc/boot/dts/canyonlands.dts
index 8b5ba8261a36..4447def69dc5 100644
--- a/arch/powerpc/boot/dts/canyonlands.dts
+++ b/arch/powerpc/boot/dts/canyonlands.dts
@@ -127,6 +127,13 @@
                         dcr-reg = <0x010 0x002>;
                 };
 
+                CRYPTO: crypto@180000 {
+                        compatible = "amcc,ppc460ex-crypto", "amcc,ppc4xx-crypto";
+                        reg = <4 0x00180000 0x80400>;
+                        interrupt-parent = <&UIC0>;
+                        interrupts = <0x1d 0x4>;
+                };
+
                 MAL0: mcmal {
                         compatible = "ibm,mcmal-460ex", "ibm,mcmal2";
                         dcr-reg = <0x180 0x062>;
diff --git a/arch/powerpc/boot/dts/kilauea.dts b/arch/powerpc/boot/dts/kilauea.dts
index 2804444812e5..5e6b08ff6f67 100644
--- a/arch/powerpc/boot/dts/kilauea.dts
+++ b/arch/powerpc/boot/dts/kilauea.dts
@@ -97,6 +97,13 @@
                                       0x6 0x4>; /* ECC SEC Error */ 
                 };
 
+                CRYPTO: crypto@ef700000 {
+                        compatible = "amcc,ppc405ex-crypto", "amcc,ppc4xx-crypto";
+                        reg = <0xef700000 0x80400>;
+                        interrupt-parent = <&UIC0>;
+                        interrupts = <0x17 0x2>;
+                };
+
                 MAL0: mcmal {
                         compatible = "ibm,mcmal-405ex", "ibm,mcmal2";
                         dcr-reg = <0x180 0x062>;
diff --git a/arch/powerpc/configs/ps3_defconfig b/arch/powerpc/configs/ps3_defconfig
index b6eee7c93cdd..ac14f5245d2a 100644
--- a/arch/powerpc/configs/ps3_defconfig
+++ b/arch/powerpc/configs/ps3_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.27-rc3
-# Wed Aug 20 08:16:53 2008
+# Linux kernel version: 2.6.29-rc8
+# Fri Mar 13 09:28:45 2009
 #
 CONFIG_PPC64=y
 
@@ -16,13 +16,14 @@ CONFIG_PPC_FPU=y
 CONFIG_ALTIVEC=y
 # CONFIG_VSX is not set
 CONFIG_PPC_STD_MMU=y
+CONFIG_PPC_STD_MMU_64=y
 CONFIG_PPC_MM_SLICES=y
 CONFIG_VIRT_CPU_ACCOUNTING=y
 CONFIG_SMP=y
 CONFIG_NR_CPUS=2
 CONFIG_64BIT=y
 CONFIG_WORD_SIZE=64
-CONFIG_PPC_MERGE=y
+CONFIG_ARCH_PHYS_ADDR_T_64BIT=y
 CONFIG_MMU=y
 CONFIG_GENERIC_CMOS_UPDATE=y
 CONFIG_GENERIC_TIME=y
@@ -46,7 +47,7 @@ CONFIG_PPC=y
 CONFIG_EARLY_PRINTK=y
 CONFIG_COMPAT=y
 CONFIG_SYSVIPC_COMPAT=y
-CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
+CONFIG_SCHED_OMIT_FRAME_POINTER=y
 CONFIG_ARCH_MAY_HAVE_PC_FDC=y
 CONFIG_PPC_OF=y
 CONFIG_OF=y
@@ -74,10 +75,19 @@ CONFIG_POSIX_MQUEUE=y
 # CONFIG_BSD_PROCESS_ACCT is not set
 # CONFIG_TASKSTATS is not set
 # CONFIG_AUDIT is not set
+
+#
+# RCU Subsystem
+#
+CONFIG_CLASSIC_RCU=y
+# CONFIG_TREE_RCU is not set
+# CONFIG_PREEMPT_RCU is not set
+# CONFIG_TREE_RCU_TRACE is not set
+# CONFIG_PREEMPT_RCU_TRACE is not set
 # CONFIG_IKCONFIG is not set
 CONFIG_LOG_BUF_SHIFT=17
-# CONFIG_CGROUPS is not set
 # CONFIG_GROUP_SCHED is not set
+# CONFIG_CGROUPS is not set
 CONFIG_SYSFS_DEPRECATED=y
 CONFIG_SYSFS_DEPRECATED_V2=y
 # CONFIG_RELAY is not set
@@ -86,11 +96,13 @@ CONFIG_NAMESPACES=y
 # CONFIG_IPC_NS is not set
 # CONFIG_USER_NS is not set
 # CONFIG_PID_NS is not set
+# CONFIG_NET_NS is not set
 CONFIG_BLK_DEV_INITRD=y
 CONFIG_INITRAMFS_SOURCE=""
 CONFIG_CC_OPTIMIZE_FOR_SIZE=y
 CONFIG_SYSCTL=y
-# CONFIG_EMBEDDED is not set
+CONFIG_ANON_INODES=y
+CONFIG_EMBEDDED=y
 CONFIG_SYSCTL_SYSCALL=y
 CONFIG_KALLSYMS=y
 CONFIG_KALLSYMS_ALL=y
@@ -99,37 +111,36 @@ CONFIG_HOTPLUG=y
 CONFIG_PRINTK=y
 CONFIG_BUG=y
 CONFIG_ELF_CORE=y
-# CONFIG_COMPAT_BRK is not set
 CONFIG_BASE_FULL=y
 CONFIG_FUTEX=y
-CONFIG_ANON_INODES=y
 CONFIG_EPOLL=y
 CONFIG_SIGNALFD=y
 CONFIG_TIMERFD=y
 CONFIG_EVENTFD=y
 CONFIG_SHMEM=y
+CONFIG_AIO=y
 CONFIG_VM_EVENT_COUNTERS=y
+# CONFIG_COMPAT_BRK is not set
 CONFIG_SLAB=y
 # CONFIG_SLUB is not set
 # CONFIG_SLOB is not set
 CONFIG_PROFILING=y
-# CONFIG_MARKERS is not set
+CONFIG_TRACEPOINTS=y
+CONFIG_MARKERS=y
 CONFIG_OPROFILE=m
 CONFIG_HAVE_OPROFILE=y
 # CONFIG_KPROBES is not set
 CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y
+CONFIG_HAVE_SYSCALL_WRAPPERS=y
 CONFIG_HAVE_IOREMAP_PROT=y
 CONFIG_HAVE_KPROBES=y
 CONFIG_HAVE_KRETPROBES=y
 CONFIG_HAVE_ARCH_TRACEHOOK=y
 CONFIG_HAVE_DMA_ATTRS=y
 CONFIG_USE_GENERIC_SMP_HELPERS=y
-# CONFIG_HAVE_CLK is not set
-CONFIG_PROC_PAGE_MONITOR=y
 # CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
 CONFIG_SLABINFO=y
 CONFIG_RT_MUTEXES=y
-# CONFIG_TINY_SHMEM is not set
 CONFIG_BASE_SMALL=0
 CONFIG_MODULES=y
 # CONFIG_MODULE_FORCE_LOAD is not set
@@ -137,7 +148,6 @@ CONFIG_MODULE_UNLOAD=y
 # CONFIG_MODULE_FORCE_UNLOAD is not set
 # CONFIG_MODVERSIONS is not set
 # CONFIG_MODULE_SRCVERSION_ALL is not set
-CONFIG_KMOD=y
 CONFIG_STOP_MACHINE=y
 CONFIG_BLOCK=y
 # CONFIG_BLK_DEV_IO_TRACE is not set
@@ -157,7 +167,7 @@ CONFIG_DEFAULT_AS=y
 # CONFIG_DEFAULT_CFQ is not set
 # CONFIG_DEFAULT_NOOP is not set
 CONFIG_DEFAULT_IOSCHED="anticipatory"
-CONFIG_CLASSIC_RCU=y
+# CONFIG_FREEZER is not set
 
 #
 # Platform support
@@ -183,18 +193,20 @@ CONFIG_PS3_STORAGE=y
 CONFIG_PS3_DISK=y
 CONFIG_PS3_ROM=y
 CONFIG_PS3_FLASH=y
-CONFIG_OPROFILE_PS3=y
+CONFIG_PS3_VRAM=m
 CONFIG_PS3_LPM=m
 CONFIG_PPC_CELL=y
 # CONFIG_PPC_CELL_NATIVE is not set
 # CONFIG_PPC_IBM_CELL_BLADE is not set
 # CONFIG_PPC_CELLEB is not set
+# CONFIG_PPC_CELL_QPACE is not set
 
 #
 # Cell Broadband Engine options
 #
 CONFIG_SPU_FS=y
 CONFIG_SPU_FS_64K_LS=y
+# CONFIG_SPU_TRACE is not set
 CONFIG_SPU_BASE=y
 # CONFIG_PQ2ADS is not set
 # CONFIG_IPIC is not set
@@ -210,6 +222,7 @@ CONFIG_SPU_BASE=y
 # CONFIG_GENERIC_IOMAP is not set
 # CONFIG_CPU_FREQ is not set
 # CONFIG_FSL_ULI1575 is not set
+# CONFIG_SIMPLE_GPIO is not set
 
 #
 # Kernel options
@@ -229,6 +242,8 @@ CONFIG_PREEMPT_NONE=y
 # CONFIG_PREEMPT is not set
 CONFIG_BINFMT_ELF=y
 CONFIG_COMPAT_BINFMT_ELF=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+# CONFIG_HAVE_AOUT is not set
 CONFIG_BINFMT_MISC=y
 CONFIG_HUGETLB_PAGE_SIZE_VARIABLE=y
 # CONFIG_IOMMU_VMERGE is not set
@@ -251,7 +266,6 @@ CONFIG_SELECT_MEMORY_MODEL=y
 CONFIG_SPARSEMEM_MANUAL=y
 CONFIG_SPARSEMEM=y
 CONFIG_HAVE_MEMORY_PRESENT=y
-# CONFIG_SPARSEMEM_STATIC is not set
 CONFIG_SPARSEMEM_EXTREME=y
 CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y
 # CONFIG_SPARSEMEM_VMEMMAP is not set
@@ -261,11 +275,14 @@ CONFIG_MEMORY_HOTPLUG_SPARSE=y
 CONFIG_PAGEFLAGS_EXTENDED=y
 CONFIG_SPLIT_PTLOCK_CPUS=4
 CONFIG_MIGRATION=y
-CONFIG_RESOURCES_64BIT=y
+CONFIG_PHYS_ADDR_T_64BIT=y
 CONFIG_ZONE_DMA_FLAG=1
 CONFIG_BOUNCE=y
+CONFIG_UNEVICTABLE_LRU=y
 CONFIG_ARCH_MEMORY_PROBE=y
 CONFIG_PPC_HAS_HASH_64K=y
+CONFIG_PPC_4K_PAGES=y
+# CONFIG_PPC_16K_PAGES is not set
 # CONFIG_PPC_64K_PAGES is not set
 CONFIG_FORCE_MAX_ZONEORDER=13
 CONFIG_SCHED_SMT=y
@@ -299,6 +316,7 @@ CONFIG_NET=y
 #
 # Networking options
 #
+CONFIG_COMPAT_NET_DEV_OPS=y
 CONFIG_PACKET=y
 CONFIG_PACKET_MMAP=y
 CONFIG_UNIX=y
@@ -361,6 +379,7 @@ CONFIG_IPV6_NDISC_NODETYPE=y
 # CONFIG_TIPC is not set
 # CONFIG_ATM is not set
 # CONFIG_BRIDGE is not set
+# CONFIG_NET_DSA is not set
 # CONFIG_VLAN_8021Q is not set
 # CONFIG_DECNET is not set
 # CONFIG_LLC2 is not set
@@ -371,6 +390,7 @@ CONFIG_IPV6_NDISC_NODETYPE=y
 # CONFIG_ECONET is not set
 # CONFIG_WAN_ROUTER is not set
 # CONFIG_NET_SCHED is not set
+# CONFIG_DCB is not set
 
 #
 # Network testing
@@ -392,39 +412,37 @@ CONFIG_BT_HIDP=m
 #
 # Bluetooth device drivers
 #
-CONFIG_BT_HCIUSB=m
-CONFIG_BT_HCIUSB_SCO=y
+CONFIG_BT_HCIBTUSB=m
 # CONFIG_BT_HCIUART is not set
 # CONFIG_BT_HCIBCM203X is not set
 # CONFIG_BT_HCIBPA10X is not set
 # CONFIG_BT_HCIBFUSB is not set
 # CONFIG_BT_HCIVHCI is not set
 # CONFIG_AF_RXRPC is not set
-
-#
-# Wireless
-#
+# CONFIG_PHONET is not set
+CONFIG_WIRELESS=y
 CONFIG_CFG80211=m
+# CONFIG_CFG80211_REG_DEBUG is not set
 CONFIG_NL80211=y
+# CONFIG_WIRELESS_OLD_REGULATORY is not set
 CONFIG_WIRELESS_EXT=y
 # CONFIG_WIRELESS_EXT_SYSFS is not set
+# CONFIG_LIB80211 is not set
 CONFIG_MAC80211=m
 
 #
 # Rate control algorithm selection
 #
 CONFIG_MAC80211_RC_PID=y
+# CONFIG_MAC80211_RC_MINSTREL is not set
 CONFIG_MAC80211_RC_DEFAULT_PID=y
+# CONFIG_MAC80211_RC_DEFAULT_MINSTREL is not set
 CONFIG_MAC80211_RC_DEFAULT="pid"
 # CONFIG_MAC80211_MESH is not set
 # CONFIG_MAC80211_LEDS is not set
 # CONFIG_MAC80211_DEBUGFS is not set
 # CONFIG_MAC80211_DEBUG_MENU is not set
-CONFIG_IEEE80211=m
-# CONFIG_IEEE80211_DEBUG is not set
-CONFIG_IEEE80211_CRYPT_WEP=m
-CONFIG_IEEE80211_CRYPT_CCMP=m
-CONFIG_IEEE80211_CRYPT_TKIP=m
+# CONFIG_WIMAX is not set
 # CONFIG_RFKILL is not set
 # CONFIG_NET_9P is not set
 
@@ -450,6 +468,7 @@ CONFIG_MTD_DEBUG=y
 CONFIG_MTD_DEBUG_VERBOSE=0
 # CONFIG_MTD_CONCAT is not set
 # CONFIG_MTD_PARTITIONS is not set
+# CONFIG_MTD_TESTS is not set
 
 #
 # User Modules And Translation Layers
@@ -494,7 +513,6 @@ CONFIG_MTD_CFI_I2=y
 #
 # CONFIG_MTD_SLRAM is not set
 # CONFIG_MTD_PHRAM is not set
-CONFIG_MTD_PS3VRAM=y
 # CONFIG_MTD_MTDRAM is not set
 # CONFIG_MTD_BLOCK2MTD is not set
 
@@ -508,6 +526,11 @@ CONFIG_MTD_PS3VRAM=y
 # CONFIG_MTD_ONENAND is not set
 
 #
+# LPDDR flash memory drivers
+#
+# CONFIG_MTD_LPDDR is not set
+
+#
 # UBI - Unsorted block images
 #
 # CONFIG_MTD_UBI is not set
@@ -528,8 +551,13 @@ CONFIG_BLK_DEV_RAM_SIZE=65535
 # CONFIG_ATA_OVER_ETH is not set
 # CONFIG_BLK_DEV_HD is not set
 CONFIG_MISC_DEVICES=y
-# CONFIG_EEPROM_93CX6 is not set
 # CONFIG_ENCLOSURE_SERVICES is not set
+# CONFIG_C2PORT is not set
+
+#
+# EEPROM support
+#
+# CONFIG_EEPROM_93CX6 is not set
 CONFIG_HAVE_IDE=y
 # CONFIG_IDE is not set
 
@@ -575,7 +603,17 @@ CONFIG_SCSI_WAIT_SCAN=m
 # CONFIG_SCSI_LOWLEVEL is not set
 # CONFIG_SCSI_DH is not set
 # CONFIG_ATA is not set
-# CONFIG_MD is not set
+CONFIG_MD=y
+# CONFIG_BLK_DEV_MD is not set
+CONFIG_BLK_DEV_DM=m
+# CONFIG_DM_DEBUG is not set
+# CONFIG_DM_CRYPT is not set
+# CONFIG_DM_SNAPSHOT is not set
+# CONFIG_DM_MIRROR is not set
+# CONFIG_DM_ZERO is not set
+# CONFIG_DM_MULTIPATH is not set
+# CONFIG_DM_DELAY is not set
+# CONFIG_DM_UEVENT is not set
 # CONFIG_MACINTOSH_DRIVERS is not set
 CONFIG_NETDEVICES=y
 # CONFIG_DUMMY is not set
@@ -591,6 +629,9 @@ CONFIG_MII=m
 # CONFIG_IBM_NEW_EMAC_RGMII is not set
 # CONFIG_IBM_NEW_EMAC_TAH is not set
 # CONFIG_IBM_NEW_EMAC_EMAC4 is not set
+# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
+# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
+# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
 # CONFIG_B44 is not set
 CONFIG_NETDEV_1000=y
 CONFIG_GELIC_NET=y
@@ -604,6 +645,7 @@ CONFIG_GELIC_WIRELESS_OLD_PSK_INTERFACE=y
 # CONFIG_WLAN_PRE80211 is not set
 CONFIG_WLAN_80211=y
 # CONFIG_LIBERTAS is not set
+# CONFIG_LIBERTAS_THINFIRM is not set
 # CONFIG_USB_ZD1201 is not set
 # CONFIG_USB_NET_RNDIS_WLAN is not set
 # CONFIG_RTL8187 is not set
@@ -615,13 +657,11 @@ CONFIG_WLAN_80211=y
 # CONFIG_B43LEGACY is not set
 CONFIG_ZD1211RW=m
 # CONFIG_ZD1211RW_DEBUG is not set
-CONFIG_RT2X00=m
-CONFIG_RT2X00_LIB=m
-CONFIG_RT2X00_LIB_USB=m
-CONFIG_RT2X00_LIB_FIRMWARE=y
-# CONFIG_RT2500USB is not set
-CONFIG_RT73USB=m
-# CONFIG_RT2X00_DEBUG is not set
+# CONFIG_RT2X00 is not set
+
+#
+# Enable WiMAX (Networking options) to see the WiMAX drivers
+#
 
 #
 # USB Network Adapters
@@ -634,6 +674,7 @@ CONFIG_USB_USBNET=m
 CONFIG_USB_NET_AX8817X=m
 # CONFIG_USB_NET_CDCETHER is not set
 # CONFIG_USB_NET_DM9601 is not set
+# CONFIG_USB_NET_SMSC95XX is not set
 # CONFIG_USB_NET_GL620A is not set
 # CONFIG_USB_NET_NET1080 is not set
 # CONFIG_USB_NET_PLUSB is not set
@@ -664,7 +705,7 @@ CONFIG_SLHC=m
 # Input device support
 #
 CONFIG_INPUT=y
-# CONFIG_INPUT_FF_MEMLESS is not set
+CONFIG_INPUT_FF_MEMLESS=m
 # CONFIG_INPUT_POLLDEV is not set
 
 #
@@ -735,8 +776,10 @@ CONFIG_DEVKMEM=y
 # Non-8250 serial port support
 #
 CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
 CONFIG_LEGACY_PTYS=y
 CONFIG_LEGACY_PTY_COUNT=16
+# CONFIG_HVC_UDBG is not set
 # CONFIG_IPMI_HANDLER is not set
 # CONFIG_HW_RANDOM is not set
 # CONFIG_R3964 is not set
@@ -753,11 +796,11 @@ CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
 # CONFIG_THERMAL is not set
 # CONFIG_THERMAL_HWMON is not set
 # CONFIG_WATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
 
 #
 # Sonics Silicon Backplane
 #
-CONFIG_SSB_POSSIBLE=y
 # CONFIG_SSB is not set
 
 #
@@ -767,6 +810,7 @@ CONFIG_SSB_POSSIBLE=y
 # CONFIG_MFD_SM501 is not set
 # CONFIG_HTC_PASIC3 is not set
 # CONFIG_MFD_TMIO is not set
+# CONFIG_REGULATOR is not set
 
 #
 # Multimedia devices
@@ -792,6 +836,7 @@ CONFIG_VIDEO_OUTPUT_CONTROL=m
 CONFIG_FB=y
 # CONFIG_FIRMWARE_EDID is not set
 # CONFIG_FB_DDC is not set
+# CONFIG_FB_BOOT_VESA_SUPPORT is not set
 # CONFIG_FB_CFB_FILLRECT is not set
 # CONFIG_FB_CFB_COPYAREA is not set
 # CONFIG_FB_CFB_IMAGEBLIT is not set
@@ -817,6 +862,8 @@ CONFIG_FB_SYS_FOPS=y
 CONFIG_FB_PS3=y
 CONFIG_FB_PS3_DEFAULT_SIZE_M=9
 # CONFIG_FB_VIRTUAL is not set
+# CONFIG_FB_METRONOME is not set
+# CONFIG_FB_MB862XX is not set
 # CONFIG_BACKLIGHT_LCD_SUPPORT is not set
 
 #
@@ -841,6 +888,7 @@ CONFIG_FB_LOGO_EXTRA=y
 # CONFIG_LOGO_LINUX_VGA16 is not set
 CONFIG_LOGO_LINUX_CLUT224=y
 CONFIG_SOUND=m
+# CONFIG_SOUND_OSS_CORE is not set
 CONFIG_SND=m
 CONFIG_SND_TIMER=m
 CONFIG_SND_PCM=m
@@ -849,6 +897,7 @@ CONFIG_SND_RAWMIDI=m
 # CONFIG_SND_SEQUENCER is not set
 # CONFIG_SND_MIXER_OSS is not set
 # CONFIG_SND_PCM_OSS is not set
+# CONFIG_SND_HRTIMER is not set
 # CONFIG_SND_DYNAMIC_MINORS is not set
 CONFIG_SND_SUPPORT_OLD_API=y
 CONFIG_SND_VERBOSE_PROCFS=y
@@ -873,15 +922,40 @@ CONFIG_HIDRAW=y
 # USB Input Devices
 #
 CONFIG_USB_HID=m
-# CONFIG_USB_HIDINPUT_POWERBOOK is not set
-# CONFIG_HID_FF is not set
-# CONFIG_USB_HIDDEV is not set
+# CONFIG_HID_PID is not set
+CONFIG_USB_HIDDEV=y
 
 #
 # USB HID Boot Protocol drivers
 #
 # CONFIG_USB_KBD is not set
 # CONFIG_USB_MOUSE is not set
+
+#
+# Special HID drivers
+#
+# CONFIG_HID_COMPAT is not set
+# CONFIG_HID_A4TECH is not set
+# CONFIG_HID_APPLE is not set
+# CONFIG_HID_BELKIN is not set
+# CONFIG_HID_CHERRY is not set
+# CONFIG_HID_CHICONY is not set
+# CONFIG_HID_CYPRESS is not set
+# CONFIG_HID_EZKEY is not set
+# CONFIG_HID_GYRATION is not set
+# CONFIG_HID_LOGITECH is not set
+# CONFIG_HID_MICROSOFT is not set
+# CONFIG_HID_MONTEREY is not set
+# CONFIG_HID_NTRIG is not set
+# CONFIG_HID_PANTHERLORD is not set
+# CONFIG_HID_PETALYNX is not set
+# CONFIG_HID_SAMSUNG is not set
+# CONFIG_HID_SONY is not set
+# CONFIG_HID_SUNPLUS is not set
+# CONFIG_GREENASIA_FF is not set
+# CONFIG_HID_TOPSEED is not set
+# CONFIG_THRUSTMASTER_FF is not set
+# CONFIG_ZEROPLUS_FF is not set
 CONFIG_USB_SUPPORT=y
 CONFIG_USB_ARCH_HAS_HCD=y
 CONFIG_USB_ARCH_HAS_OHCI=y
@@ -898,7 +972,11 @@ CONFIG_USB_DEVICEFS=y
 # CONFIG_USB_DYNAMIC_MINORS is not set
 CONFIG_USB_SUSPEND=y
 # CONFIG_USB_OTG is not set
-CONFIG_USB_MON=y
+# CONFIG_USB_OTG_WHITELIST is not set
+# CONFIG_USB_OTG_BLACKLIST_HUB is not set
+CONFIG_USB_MON=m
+# CONFIG_USB_WUSB is not set
+# CONFIG_USB_WUSB_CBAF is not set
 
 #
 # USB Host Controller Drivers
@@ -909,6 +987,7 @@ CONFIG_USB_EHCI_HCD=m
 # CONFIG_USB_EHCI_TT_NEWSCHED is not set
 CONFIG_USB_EHCI_BIG_ENDIAN_MMIO=y
 # CONFIG_USB_EHCI_HCD_PPC_OF is not set
+# CONFIG_USB_OXU210HP_HCD is not set
 # CONFIG_USB_ISP116X_HCD is not set
 # CONFIG_USB_ISP1760_HCD is not set
 CONFIG_USB_OHCI_HCD=m
@@ -918,6 +997,7 @@ CONFIG_USB_OHCI_BIG_ENDIAN_MMIO=y
 CONFIG_USB_OHCI_LITTLE_ENDIAN=y
 # CONFIG_USB_SL811_HCD is not set
 # CONFIG_USB_R8A66597_HCD is not set
+# CONFIG_USB_HWA_HCD is not set
 
 #
 # Enable Host or Gadget support to see Inventra options
@@ -929,20 +1009,20 @@ CONFIG_USB_OHCI_LITTLE_ENDIAN=y
 # CONFIG_USB_ACM is not set
 # CONFIG_USB_PRINTER is not set
 # CONFIG_USB_WDM is not set
+# CONFIG_USB_TMC is not set
 
 #
-# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
+# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed;
 #
 
 #
-# may also be needed; see USB_STORAGE Help for more information
+# see USB_STORAGE Help for more information
 #
 CONFIG_USB_STORAGE=m
 # CONFIG_USB_STORAGE_DEBUG is not set
 # CONFIG_USB_STORAGE_DATAFAB is not set
 # CONFIG_USB_STORAGE_FREECOM is not set
 # CONFIG_USB_STORAGE_ISD200 is not set
-# CONFIG_USB_STORAGE_DPCM is not set
 # CONFIG_USB_STORAGE_USBAT is not set
 # CONFIG_USB_STORAGE_SDDR09 is not set
 # CONFIG_USB_STORAGE_SDDR55 is not set
@@ -950,7 +1030,6 @@ CONFIG_USB_STORAGE=m
 # CONFIG_USB_STORAGE_ALAUDA is not set
 # CONFIG_USB_STORAGE_ONETOUCH is not set
 # CONFIG_USB_STORAGE_KARMA is not set
-# CONFIG_USB_STORAGE_SIERRA is not set
 # CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
 # CONFIG_USB_LIBUSUAL is not set
 
@@ -971,6 +1050,7 @@ CONFIG_USB_STORAGE=m
 # CONFIG_USB_EMI62 is not set
 # CONFIG_USB_EMI26 is not set
 # CONFIG_USB_ADUTUX is not set
+# CONFIG_USB_SEVSEG is not set
 # CONFIG_USB_RIO500 is not set
 # CONFIG_USB_LEGOTOWER is not set
 # CONFIG_USB_LCD is not set
@@ -988,7 +1068,12 @@ CONFIG_USB_STORAGE=m
 # CONFIG_USB_IOWARRIOR is not set
 # CONFIG_USB_TEST is not set
 # CONFIG_USB_ISIGHTFW is not set
+# CONFIG_USB_VST is not set
 # CONFIG_USB_GADGET is not set
+
+#
+# OTG and related infrastructure
+#
 # CONFIG_MMC is not set
 # CONFIG_MEMSTICK is not set
 # CONFIG_NEW_LEDS is not set
@@ -1014,12 +1099,15 @@ CONFIG_RTC_INTF_DEV=y
 # Platform RTC drivers
 #
 # CONFIG_RTC_DRV_CMOS is not set
+# CONFIG_RTC_DRV_DS1286 is not set
 # CONFIG_RTC_DRV_DS1511 is not set
 # CONFIG_RTC_DRV_DS1553 is not set
 # CONFIG_RTC_DRV_DS1742 is not set
 # CONFIG_RTC_DRV_STK17TA8 is not set
 # CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_M48T35 is not set
 # CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_BQ4802 is not set
 # CONFIG_RTC_DRV_V3020 is not set
 
 #
@@ -1028,6 +1116,7 @@ CONFIG_RTC_INTF_DEV=y
 CONFIG_RTC_DRV_PPC=m
 # CONFIG_DMADEVICES is not set
 # CONFIG_UIO is not set
+# CONFIG_STAGING is not set
 
 #
 # File systems
@@ -1035,26 +1124,35 @@ CONFIG_RTC_DRV_PPC=m
 CONFIG_EXT2_FS=m
 # CONFIG_EXT2_FS_XATTR is not set
 # CONFIG_EXT2_FS_XIP is not set
-CONFIG_EXT3_FS=y
+CONFIG_EXT3_FS=m
 CONFIG_EXT3_FS_XATTR=y
 # CONFIG_EXT3_FS_POSIX_ACL is not set
 # CONFIG_EXT3_FS_SECURITY is not set
-# CONFIG_EXT4DEV_FS is not set
-CONFIG_JBD=y
+CONFIG_EXT4_FS=y
+# CONFIG_EXT4DEV_COMPAT is not set
+CONFIG_EXT4_FS_XATTR=y
+# CONFIG_EXT4_FS_POSIX_ACL is not set
+# CONFIG_EXT4_FS_SECURITY is not set
+CONFIG_JBD=m
 # CONFIG_JBD_DEBUG is not set
+CONFIG_JBD2=y
+# CONFIG_JBD2_DEBUG is not set
 CONFIG_FS_MBCACHE=y
 # CONFIG_REISERFS_FS is not set
 # CONFIG_JFS_FS is not set
 # CONFIG_FS_POSIX_ACL is not set
+CONFIG_FILE_LOCKING=y
 # CONFIG_XFS_FS is not set
 # CONFIG_GFS2_FS is not set
 # CONFIG_OCFS2_FS is not set
+# CONFIG_BTRFS_FS is not set
 CONFIG_DNOTIFY=y
 CONFIG_INOTIFY=y
 CONFIG_INOTIFY_USER=y
 CONFIG_QUOTA=y
 # CONFIG_QUOTA_NETLINK_INTERFACE is not set
 CONFIG_PRINT_QUOTA_WARNING=y
+CONFIG_QUOTA_TREE=y
 # CONFIG_QFMT_V1 is not set
 CONFIG_QFMT_V2=y
 CONFIG_QUOTACTL=y
@@ -1087,16 +1185,14 @@ CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
 CONFIG_PROC_FS=y
 CONFIG_PROC_KCORE=y
 CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_PAGE_MONITOR=y
 CONFIG_SYSFS=y
 CONFIG_TMPFS=y
 # CONFIG_TMPFS_POSIX_ACL is not set
 CONFIG_HUGETLBFS=y
 CONFIG_HUGETLB_PAGE=y
 # CONFIG_CONFIGFS_FS is not set
-
-#
-# Miscellaneous filesystems
-#
+CONFIG_MISC_FILESYSTEMS=y
 # CONFIG_ADFS_FS is not set
 # CONFIG_AFFS_FS is not set
 # CONFIG_HFS_FS is not set
@@ -1106,6 +1202,7 @@ CONFIG_HUGETLB_PAGE=y
 # CONFIG_EFS_FS is not set
 # CONFIG_JFFS2_FS is not set
 # CONFIG_CRAMFS is not set
+# CONFIG_SQUASHFS is not set
 # CONFIG_VXFS_FS is not set
 # CONFIG_MINIX_FS is not set
 # CONFIG_OMFS_FS is not set
@@ -1126,6 +1223,7 @@ CONFIG_LOCKD_V4=y
 CONFIG_NFS_COMMON=y
 CONFIG_SUNRPC=y
 CONFIG_SUNRPC_GSS=y
+# CONFIG_SUNRPC_REGISTER_V4 is not set
 CONFIG_RPCSEC_GSS_KRB5=y
 # CONFIG_RPCSEC_GSS_SPKM3 is not set
 # CONFIG_SMB_FS is not set
@@ -1190,9 +1288,9 @@ CONFIG_NLS_ISO8859_1=y
 # Library routines
 #
 CONFIG_BITREVERSE=y
-# CONFIG_GENERIC_FIND_FIRST_BIT is not set
+CONFIG_GENERIC_FIND_LAST_BIT=y
 CONFIG_CRC_CCITT=m
-# CONFIG_CRC16 is not set
+CONFIG_CRC16=y
 CONFIG_CRC_T10DIF=y
 CONFIG_CRC_ITU_T=m
 CONFIG_CRC32=y
@@ -1250,27 +1348,44 @@ CONFIG_DEBUG_WRITECOUNT=y
 CONFIG_DEBUG_MEMORY_INIT=y
 CONFIG_DEBUG_LIST=y
 # CONFIG_DEBUG_SG is not set
-CONFIG_FRAME_POINTER=y
+# CONFIG_DEBUG_NOTIFIERS is not set
 # CONFIG_BOOT_PRINTK_DELAY is not set
 # CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
 # CONFIG_BACKTRACE_SELF_TEST is not set
+# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
 # CONFIG_FAULT_INJECTION is not set
 # CONFIG_LATENCYTOP is not set
 CONFIG_SYSCTL_SYSCALL_CHECK=y
-CONFIG_HAVE_FTRACE=y
+CONFIG_NOP_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACER=y
 CONFIG_HAVE_DYNAMIC_FTRACE=y
-# CONFIG_FTRACE is not set
+CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_RING_BUFFER=y
+CONFIG_TRACING=y
+
+#
+# Tracers
+#
+# CONFIG_FUNCTION_TRACER is not set
 # CONFIG_IRQSOFF_TRACER is not set
 # CONFIG_SCHED_TRACER is not set
 # CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_BOOT_TRACER is not set
+# CONFIG_TRACE_BRANCH_PROFILING is not set
+# CONFIG_STACK_TRACER is not set
+# CONFIG_FTRACE_STARTUP_TEST is not set
+# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
 # CONFIG_SAMPLES is not set
 CONFIG_HAVE_ARCH_KGDB=y
 # CONFIG_KGDB is not set
+CONFIG_PRINT_STACK_DEPTH=64
 CONFIG_DEBUG_STACKOVERFLOW=y
 # CONFIG_DEBUG_STACK_USAGE is not set
 # CONFIG_DEBUG_PAGEALLOC is not set
 # CONFIG_CODE_PATCHING_SELFTEST is not set
 # CONFIG_FTR_FIXUP_SELFTEST is not set
+# CONFIG_MSI_BITMAP_SELFTEST is not set
 # CONFIG_XMON is not set
 CONFIG_IRQSTACKS=y
 # CONFIG_VIRQ_DEBUG is not set
@@ -1282,16 +1397,26 @@ CONFIG_IRQSTACKS=y
 #
 # CONFIG_KEYS is not set
 # CONFIG_SECURITY is not set
+# CONFIG_SECURITYFS is not set
 # CONFIG_SECURITY_FILE_CAPABILITIES is not set
 CONFIG_CRYPTO=y
 
 #
 # Crypto core or helper
 #
+# CONFIG_CRYPTO_FIPS is not set
 CONFIG_CRYPTO_ALGAPI=y
+CONFIG_CRYPTO_ALGAPI2=y
 CONFIG_CRYPTO_AEAD=m
+CONFIG_CRYPTO_AEAD2=y
 CONFIG_CRYPTO_BLKCIPHER=y
+CONFIG_CRYPTO_BLKCIPHER2=y
+CONFIG_CRYPTO_HASH=y
+CONFIG_CRYPTO_HASH2=y
+CONFIG_CRYPTO_RNG=m
+CONFIG_CRYPTO_RNG2=y
 CONFIG_CRYPTO_MANAGER=y
+CONFIG_CRYPTO_MANAGER2=y
 CONFIG_CRYPTO_GF128MUL=m
 # CONFIG_CRYPTO_NULL is not set
 # CONFIG_CRYPTO_CRYPTD is not set
@@ -1363,6 +1488,11 @@ CONFIG_CRYPTO_SALSA20=m
 #
 # CONFIG_CRYPTO_DEFLATE is not set
 CONFIG_CRYPTO_LZO=m
+
+#
+# Random Number Generation
+#
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
 CONFIG_CRYPTO_HW=y
 # CONFIG_PPC_CLOCK is not set
 # CONFIG_VIRTUALIZATION is not set
diff --git a/arch/powerpc/include/asm/bootx.h b/arch/powerpc/include/asm/bootx.h
index 57b82e3f89ce..60a3c9ef3017 100644
--- a/arch/powerpc/include/asm/bootx.h
+++ b/arch/powerpc/include/asm/bootx.h
@@ -9,7 +9,7 @@
 #ifndef __ASM_BOOTX_H__
 #define __ASM_BOOTX_H__
 
-#include <asm/types.h>
+#include <linux/types.h>
 
 #ifdef macintosh
 #include <Types.h>
diff --git a/arch/powerpc/include/asm/cputable.h b/arch/powerpc/include/asm/cputable.h
index 4911104791c3..21172badd708 100644
--- a/arch/powerpc/include/asm/cputable.h
+++ b/arch/powerpc/include/asm/cputable.h
@@ -241,9 +241,11 @@ extern const char *powerpc_base_platform;
 /* We need to mark all pages as being coherent if we're SMP or we have a
  * 74[45]x and an MPC107 host bridge. Also 83xx and PowerQUICC II
  * require it for PCI "streaming/prefetch" to work properly.
+ * This is also required by 52xx family.
  */
 #if defined(CONFIG_SMP) || defined(CONFIG_MPC10X_BRIDGE) \
-        || defined(CONFIG_PPC_83xx) || defined(CONFIG_8260)
+        || defined(CONFIG_PPC_83xx) || defined(CONFIG_8260) \
+        || defined(CONFIG_PPC_MPC52xx)
 #define CPU_FTR_COMMON                  CPU_FTR_NEED_COHERENT
 #else
 #define CPU_FTR_COMMON                  0
diff --git a/arch/powerpc/include/asm/elf.h b/arch/powerpc/include/asm/elf.h
index cd46f023ec6d..b5600ce6055e 100644
--- a/arch/powerpc/include/asm/elf.h
+++ b/arch/powerpc/include/asm/elf.h
@@ -7,7 +7,7 @@
 #include <asm/string.h>
 #endif
 
-#include <asm/types.h>
+#include <linux/types.h>
 #include <asm/ptrace.h>
 #include <asm/cputable.h>
 #include <asm/auxvec.h>
diff --git a/arch/powerpc/include/asm/kvm.h b/arch/powerpc/include/asm/kvm.h
index f993e4198d5c..bb2de6aa5ce0 100644
--- a/arch/powerpc/include/asm/kvm.h
+++ b/arch/powerpc/include/asm/kvm.h
@@ -20,7 +20,7 @@
 #ifndef __LINUX_KVM_POWERPC_H
 #define __LINUX_KVM_POWERPC_H
 
-#include <asm/types.h>
+#include <linux/types.h>
 
 struct kvm_regs {
         __u64 pc;
@@ -52,4 +52,11 @@ struct kvm_fpu {
         __u64 fpr[32];
 };
 
+struct kvm_debug_exit_arch {
+};
+
+/* for KVM_SET_GUEST_DEBUG */
+struct kvm_guest_debug_arch {
+};
+
 #endif /* __LINUX_KVM_POWERPC_H */
diff --git a/arch/powerpc/include/asm/kvm_44x.h b/arch/powerpc/include/asm/kvm_44x.h
index f49031b632ca..d22d39942a92 100644
--- a/arch/powerpc/include/asm/kvm_44x.h
+++ b/arch/powerpc/include/asm/kvm_44x.h
@@ -28,6 +28,13 @@
  * need to find some way of advertising it. */
 #define KVM44x_GUEST_TLB_SIZE 64
 
+struct kvmppc_44x_tlbe {
+        u32 tid; /* Only the low 8 bits are used. */
+        u32 word0;
+        u32 word1;
+        u32 word2;
+};
+
 struct kvmppc_44x_shadow_ref {
         struct page *page;
         u16 gtlb_index;
diff --git a/arch/powerpc/include/asm/kvm_asm.h b/arch/powerpc/include/asm/kvm_asm.h
index 2197764796d9..56bfae59837f 100644
--- a/arch/powerpc/include/asm/kvm_asm.h
+++ b/arch/powerpc/include/asm/kvm_asm.h
@@ -42,7 +42,12 @@
 #define BOOKE_INTERRUPT_DTLB_MISS 13
 #define BOOKE_INTERRUPT_ITLB_MISS 14
 #define BOOKE_INTERRUPT_DEBUG 15
-#define BOOKE_MAX_INTERRUPT 15
+
+/* E500 */
+#define BOOKE_INTERRUPT_SPE_UNAVAIL 32
+#define BOOKE_INTERRUPT_SPE_FP_DATA 33
+#define BOOKE_INTERRUPT_SPE_FP_ROUND 34
+#define BOOKE_INTERRUPT_PERFORMANCE_MONITOR 35
 
 #define RESUME_FLAG_NV          (1<<0)  /* Reload guest nonvolatile state? */
 #define RESUME_FLAG_HOST        (1<<1)  /* Resume host? */
diff --git a/arch/powerpc/include/asm/kvm_e500.h b/arch/powerpc/include/asm/kvm_e500.h
new file mode 100644
index 000000000000..9d497ce49726
--- /dev/null
+++ b/arch/powerpc/include/asm/kvm_e500.h
@@ -0,0 +1,67 @@
+/*
+ * Copyright (C) 2008 Freescale Semiconductor, Inc. All rights reserved.
+ *
+ * Author: Yu Liu, <yu.liu@freescale.com>
+ *
+ * Description:
+ * This file is derived from arch/powerpc/include/asm/kvm_44x.h,
+ * by Hollis Blanchard <hollisb@us.ibm.com>.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License, version 2, as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __ASM_KVM_E500_H__
+#define __ASM_KVM_E500_H__
+
+#include <linux/kvm_host.h>
+
+#define BOOKE_INTERRUPT_SIZE 36
+
+#define E500_PID_NUM   3
+#define E500_TLB_NUM   2
+
+struct tlbe{
+        u32 mas1;
+        u32 mas2;
+        u32 mas3;
+        u32 mas7;
+};
+
+struct kvmppc_vcpu_e500 {
+        /* Unmodified copy of the guest's TLB. */
+        struct tlbe *guest_tlb[E500_TLB_NUM];
+        /* TLB that's actually used when the guest is running. */
+        struct tlbe *shadow_tlb[E500_TLB_NUM];
+        /* Pages which are referenced in the shadow TLB. */
+        struct page **shadow_pages[E500_TLB_NUM];
+
+        unsigned int guest_tlb_size[E500_TLB_NUM];
+        unsigned int shadow_tlb_size[E500_TLB_NUM];
+        unsigned int guest_tlb_nv[E500_TLB_NUM];
+
+        u32 host_pid[E500_PID_NUM];
+        u32 pid[E500_PID_NUM];
+
+        u32 mas0;
+        u32 mas1;
+        u32 mas2;
+        u32 mas3;
+        u32 mas4;
+        u32 mas5;
+        u32 mas6;
+        u32 mas7;
+        u32 l1csr1;
+        u32 hid0;
+        u32 hid1;
+
+        struct kvm_vcpu vcpu;
+};
+
+static inline struct kvmppc_vcpu_e500 *to_e500(struct kvm_vcpu *vcpu)
+{
+        return container_of(vcpu, struct kvmppc_vcpu_e500, vcpu);
+}
+
+#endif /* __ASM_KVM_E500_H__ */
diff --git a/arch/powerpc/include/asm/kvm_host.h b/arch/powerpc/include/asm/kvm_host.h
index c1e436fe7738..dfdf13c9fefd 100644
--- a/arch/powerpc/include/asm/kvm_host.h
+++ b/arch/powerpc/include/asm/kvm_host.h
@@ -64,13 +64,6 @@ struct kvm_vcpu_stat {
         u32 halt_wakeup;
 };
 
-struct kvmppc_44x_tlbe {
-        u32 tid; /* Only the low 8 bits are used. */
-        u32 word0;
-        u32 word1;
-        u32 word2;
-};
-
 enum kvm_exit_types {
         MMIO_EXITS,
         DCR_EXITS,
@@ -118,11 +111,6 @@ struct kvm_arch {
 struct kvm_vcpu_arch {
         u32 host_stack;
         u32 host_pid;
-        u32 host_dbcr0;
-        u32 host_dbcr1;
-        u32 host_dbcr2;
-        u32 host_iac[4];
-        u32 host_msr;
 
         u64 fpr[32];
         ulong gpr[32];
@@ -157,7 +145,7 @@ struct kvm_vcpu_arch {
         u32 tbu;
         u32 tcr;
         u32 tsr;
-        u32 ivor[16];
+        u32 ivor[64];
         ulong ivpr;
         u32 pir;
 
@@ -170,6 +158,7 @@ struct kvm_vcpu_arch {
         u32 ccr1;
         u32 dbcr0;
         u32 dbcr1;
+        u32 dbsr;
 
 #ifdef CONFIG_KVM_EXIT_TIMING
         struct kvmppc_exit_timing timing_exit;
@@ -200,10 +189,4 @@ struct kvm_vcpu_arch {
         unsigned long pending_exceptions;
 };
 
-struct kvm_guest_debug {
-        int enabled;
-        unsigned long bp[4];
-        int singlestep;
-};
-
 #endif /* __POWERPC_KVM_HOST_H__ */
diff --git a/arch/powerpc/include/asm/kvm_ppc.h b/arch/powerpc/include/asm/kvm_ppc.h
index 36d2a50a8487..2c6ee349df5e 100644
--- a/arch/powerpc/include/asm/kvm_ppc.h
+++ b/arch/powerpc/include/asm/kvm_ppc.h
@@ -52,13 +52,19 @@ extern int kvmppc_emulate_instruction(struct kvm_run *run,
 extern int kvmppc_emulate_mmio(struct kvm_run *run, struct kvm_vcpu *vcpu);
 extern void kvmppc_emulate_dec(struct kvm_vcpu *vcpu);
 
+/* Core-specific hooks */
+
 extern void kvmppc_mmu_map(struct kvm_vcpu *vcpu, u64 gvaddr, gpa_t gpaddr,
-                           u64 asid, u32 flags, u32 max_bytes,
                            unsigned int gtlb_idx);
 extern void kvmppc_mmu_priv_switch(struct kvm_vcpu *vcpu, int usermode);
 extern void kvmppc_mmu_switch_pid(struct kvm_vcpu *vcpu, u32 pid);
-
-/* Core-specific hooks */
+extern void kvmppc_mmu_destroy(struct kvm_vcpu *vcpu);
+extern int kvmppc_mmu_dtlb_index(struct kvm_vcpu *vcpu, gva_t eaddr);
+extern int kvmppc_mmu_itlb_index(struct kvm_vcpu *vcpu, gva_t eaddr);
+extern gpa_t kvmppc_mmu_xlate(struct kvm_vcpu *vcpu, unsigned int gtlb_index,
+                              gva_t eaddr);
+extern void kvmppc_mmu_dtlb_miss(struct kvm_vcpu *vcpu);
+extern void kvmppc_mmu_itlb_miss(struct kvm_vcpu *vcpu);
 
 extern struct kvm_vcpu *kvmppc_core_vcpu_create(struct kvm *kvm,
                                                 unsigned int id);
@@ -71,9 +77,6 @@ extern int kvmppc_core_vcpu_translate(struct kvm_vcpu *vcpu,
 extern void kvmppc_core_vcpu_load(struct kvm_vcpu *vcpu, int cpu);
 extern void kvmppc_core_vcpu_put(struct kvm_vcpu *vcpu);
 
-extern void kvmppc_core_load_guest_debugstate(struct kvm_vcpu *vcpu);
-extern void kvmppc_core_load_host_debugstate(struct kvm_vcpu *vcpu);
-
 extern void kvmppc_core_deliver_interrupts(struct kvm_vcpu *vcpu);
 extern int kvmppc_core_pending_dec(struct kvm_vcpu *vcpu);
 extern void kvmppc_core_queue_program(struct kvm_vcpu *vcpu);
diff --git a/arch/powerpc/include/asm/mmu-fsl-booke.h b/arch/powerpc/include/asm/mmu-fsl-booke.h
index 3f941c0f7e8e..4285b64a65e0 100644
--- a/arch/powerpc/include/asm/mmu-fsl-booke.h
+++ b/arch/powerpc/include/asm/mmu-fsl-booke.h
@@ -75,6 +75,8 @@
 
 #ifndef __ASSEMBLY__
 
+extern unsigned int tlbcam_index;
+
 typedef struct {
         unsigned int    id;
         unsigned int    active;
diff --git a/arch/powerpc/include/asm/ps3fb.h b/arch/powerpc/include/asm/ps3fb.h
index 3f121fe4010d..e7233a849680 100644
--- a/arch/powerpc/include/asm/ps3fb.h
+++ b/arch/powerpc/include/asm/ps3fb.h
@@ -19,6 +19,7 @@
 #ifndef _ASM_POWERPC_PS3FB_H_
 #define _ASM_POWERPC_PS3FB_H_
 
+#include <linux/types.h>
 #include <linux/ioctl.h>
 
 /* ioctl */
diff --git a/arch/powerpc/include/asm/socket.h b/arch/powerpc/include/asm/socket.h
index f5a4e168e498..1e5cfad0e3f7 100644
--- a/arch/powerpc/include/asm/socket.h
+++ b/arch/powerpc/include/asm/socket.h
@@ -61,4 +61,7 @@
 
 #define SO_MARK                 36
 
+#define SO_TIMESTAMPING         37
+#define SCM_TIMESTAMPING        SO_TIMESTAMPING
+
 #endif  /* _ASM_POWERPC_SOCKET_H */
diff --git a/arch/powerpc/include/asm/spu_info.h b/arch/powerpc/include/asm/spu_info.h
index 3545efbf9891..1286c823f0d8 100644
--- a/arch/powerpc/include/asm/spu_info.h
+++ b/arch/powerpc/include/asm/spu_info.h
@@ -23,9 +23,10 @@
 #ifndef _SPU_INFO_H
 #define _SPU_INFO_H
 
+#include <linux/types.h>
+
 #ifdef __KERNEL__
 #include <asm/spu.h>
-#include <linux/types.h>
 #else
 struct mfc_cq_sr {
         __u64 mfc_cq_data0_RW;
diff --git a/arch/powerpc/include/asm/swab.h b/arch/powerpc/include/asm/swab.h
index ef824ae4b79c..c581e3ef73ed 100644
--- a/arch/powerpc/include/asm/swab.h
+++ b/arch/powerpc/include/asm/swab.h
@@ -8,7 +8,7 @@
  * 2 of the License, or (at your option) any later version.
  */
 
-#include <asm/types.h>
+#include <linux/types.h>
 #include <linux/compiler.h>
 
 #ifdef __GNUC__
diff --git a/arch/powerpc/include/asm/systbl.h b/arch/powerpc/include/asm/systbl.h
index 72353f6070a4..fe166491e9dc 100644
--- a/arch/powerpc/include/asm/systbl.h
+++ b/arch/powerpc/include/asm/systbl.h
@@ -65,7 +65,7 @@ SYSCALL(ni_syscall)
 SYSX(sys_ni_syscall,sys_olduname, sys_olduname)
 COMPAT_SYS_SPU(umask)
 SYSCALL_SPU(chroot)
-SYSCALL(ustat)
+COMPAT_SYS(ustat)
 SYSCALL_SPU(dup2)
 SYSCALL_SPU(getppid)
 SYSCALL_SPU(getpgrp)
diff --git a/arch/powerpc/kernel/asm-offsets.c b/arch/powerpc/kernel/asm-offsets.c
index 19ee491e9e23..42fe4da4e8ae 100644
--- a/arch/powerpc/kernel/asm-offsets.c
+++ b/arch/powerpc/kernel/asm-offsets.c
@@ -49,7 +49,7 @@
 #include <asm/iseries/alpaca.h>
 #endif
 #ifdef CONFIG_KVM
-#include <asm/kvm_44x.h>
+#include <linux/kvm_host.h>
 #endif
 
 #if defined(CONFIG_BOOKE) || defined(CONFIG_40x)
@@ -361,8 +361,6 @@ int main(void)
         DEFINE(PTE_SIZE, sizeof(pte_t));
 
 #ifdef CONFIG_KVM
-        DEFINE(TLBE_BYTES, sizeof(struct kvmppc_44x_tlbe));
-
         DEFINE(VCPU_HOST_STACK, offsetof(struct kvm_vcpu, arch.host_stack));
         DEFINE(VCPU_HOST_PID, offsetof(struct kvm_vcpu, arch.host_pid));
         DEFINE(VCPU_GPRS, offsetof(struct kvm_vcpu, arch.gpr));
diff --git a/arch/powerpc/kernel/head_32.S b/arch/powerpc/kernel/head_32.S
index a1c4cfd25ded..d794a637e421 100644
--- a/arch/powerpc/kernel/head_32.S
+++ b/arch/powerpc/kernel/head_32.S
@@ -511,8 +511,11 @@ InstructionTLBMiss:
         and     r1,r1,r2                /* writable if _RW and _DIRTY */
         rlwimi  r3,r3,32-1,30,30        /* _PAGE_USER -> PP msb */
         rlwimi  r3,r3,32-1,31,31        /* _PAGE_USER -> PP lsb */
-        ori     r1,r1,0xe14             /* clear out reserved bits and M */
+        ori     r1,r1,0xe04             /* clear out reserved bits */
         andc    r1,r3,r1                /* PP = user? (rw&dirty? 2: 3): 0 */
+BEGIN_FTR_SECTION
+        rlwinm  r1,r1,0,~_PAGE_COHERENT /* clear M (coherence not required) */
+END_FTR_SECTION_IFCLR(CPU_FTR_NEED_COHERENT)
         mtspr   SPRN_RPA,r1
         mfspr   r3,SPRN_IMISS
         tlbli   r3
@@ -585,8 +588,11 @@ DataLoadTLBMiss:
         and     r1,r1,r2                /* writable if _RW and _DIRTY */
         rlwimi  r3,r3,32-1,30,30        /* _PAGE_USER -> PP msb */
         rlwimi  r3,r3,32-1,31,31        /* _PAGE_USER -> PP lsb */
-        ori     r1,r1,0xe14             /* clear out reserved bits and M */
+        ori     r1,r1,0xe04             /* clear out reserved bits */
         andc    r1,r3,r1                /* PP = user? (rw&dirty? 2: 3): 0 */
+BEGIN_FTR_SECTION
+        rlwinm  r1,r1,0,~_PAGE_COHERENT /* clear M (coherence not required) */
+END_FTR_SECTION_IFCLR(CPU_FTR_NEED_COHERENT)
         mtspr   SPRN_RPA,r1
         mfspr   r3,SPRN_DMISS
         tlbld   r3
@@ -653,8 +659,11 @@ DataStoreTLBMiss:
         stw     r3,0(r2)                /* update PTE (accessed/dirty bits) */
         /* Convert linux-style PTE to low word of PPC-style PTE */
         rlwimi  r3,r3,32-1,30,30        /* _PAGE_USER -> PP msb */
-        li      r1,0xe15                /* clear out reserved bits and M */
+        li      r1,0xe05                /* clear out reserved bits & PP lsb */
         andc    r1,r3,r1                /* PP = user? 2: 0 */
+BEGIN_FTR_SECTION
+        rlwinm  r1,r1,0,~_PAGE_COHERENT /* clear M (coherence not required) */
+END_FTR_SECTION_IFCLR(CPU_FTR_NEED_COHERENT)
         mtspr   SPRN_RPA,r1
         mfspr   r3,SPRN_DMISS
         tlbld   r3
diff --git a/arch/powerpc/kernel/irq.c b/arch/powerpc/kernel/irq.c
index 23b8b5e36f98..1b55ffdf0026 100644
--- a/arch/powerpc/kernel/irq.c
+++ b/arch/powerpc/kernel/irq.c
@@ -190,7 +190,7 @@ int show_interrupts(struct seq_file *p, void *v)
                 seq_printf(p, "%3d: ", i);
 #ifdef CONFIG_SMP
                 for_each_online_cpu(j)
-                        seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
+                        seq_printf(p, "%10u ", kstat_irqs_cpu(i, j));
 #else
                 seq_printf(p, "%10u ", kstat_irqs(i));
 #endif /* CONFIG_SMP */
@@ -231,7 +231,7 @@ void fixup_irqs(cpumask_t map)
                 if (irq_desc[irq].status & IRQ_PER_CPU)
                         continue;
 
-                cpus_and(mask, irq_desc[irq].affinity, map);
+                cpumask_and(&mask, irq_desc[irq].affinity, &map);
                 if (any_online_cpu(mask) == NR_CPUS) {
                         printk("Breaking affinity for irq %i\n", irq);
                         mask = map;
diff --git a/arch/powerpc/kernel/vmlinux.lds.S b/arch/powerpc/kernel/vmlinux.lds.S
index 161b9b9691f0..67f07f453385 100644
--- a/arch/powerpc/kernel/vmlinux.lds.S
+++ b/arch/powerpc/kernel/vmlinux.lds.S
@@ -181,13 +181,7 @@ SECTIONS
                 __initramfs_end = .;
         }
 #endif
-        . = ALIGN(PAGE_SIZE);
-        .data.percpu  : AT(ADDR(.data.percpu) - LOAD_OFFSET) {
-                __per_cpu_start = .;
-                *(.data.percpu)
-                *(.data.percpu.shared_aligned)
-                __per_cpu_end = .;
-        }
+        PERCPU(PAGE_SIZE)
 
         . = ALIGN(8);
         .machine.desc : AT(ADDR(.machine.desc) - LOAD_OFFSET) {
diff --git a/arch/powerpc/kvm/44x.c b/arch/powerpc/kvm/44x.c
index a66bec57265a..0cef809cec21 100644
--- a/arch/powerpc/kvm/44x.c
+++ b/arch/powerpc/kvm/44x.c
@@ -28,72 +28,6 @@
 
 #include "44x_tlb.h"
 
-/* Note: clearing MSR[DE] just means that the debug interrupt will not be
- * delivered *immediately*. Instead, it simply sets the appropriate DBSR bits.
- * If those DBSR bits are still set when MSR[DE] is re-enabled, the interrupt
- * will be delivered as an "imprecise debug event" (which is indicated by
- * DBSR[IDE].
- */
-static void kvm44x_disable_debug_interrupts(void)
-{
-        mtmsr(mfmsr() & ~MSR_DE);
-}
-
-void kvmppc_core_load_host_debugstate(struct kvm_vcpu *vcpu)
-{
-        kvm44x_disable_debug_interrupts();
-
-        mtspr(SPRN_IAC1, vcpu->arch.host_iac[0]);
-        mtspr(SPRN_IAC2, vcpu->arch.host_iac[1]);
-        mtspr(SPRN_IAC3, vcpu->arch.host_iac[2]);
-        mtspr(SPRN_IAC4, vcpu->arch.host_iac[3]);
-        mtspr(SPRN_DBCR1, vcpu->arch.host_dbcr1);
-        mtspr(SPRN_DBCR2, vcpu->arch.host_dbcr2);
-        mtspr(SPRN_DBCR0, vcpu->arch.host_dbcr0);
-        mtmsr(vcpu->arch.host_msr);
-}
-
-void kvmppc_core_load_guest_debugstate(struct kvm_vcpu *vcpu)
-{
-        struct kvm_guest_debug *dbg = &vcpu->guest_debug;
-        u32 dbcr0 = 0;
-
-        vcpu->arch.host_msr = mfmsr();
-        kvm44x_disable_debug_interrupts();
-
-        /* Save host debug register state. */
-        vcpu->arch.host_iac[0] = mfspr(SPRN_IAC1);
-        vcpu->arch.host_iac[1] = mfspr(SPRN_IAC2);
-        vcpu->arch.host_iac[2] = mfspr(SPRN_IAC3);
-        vcpu->arch.host_iac[3] = mfspr(SPRN_IAC4);
-        vcpu->arch.host_dbcr0 = mfspr(SPRN_DBCR0);
-        vcpu->arch.host_dbcr1 = mfspr(SPRN_DBCR1);
-        vcpu->arch.host_dbcr2 = mfspr(SPRN_DBCR2);
-
-        /* set registers up for guest */
-
-        if (dbg->bp[0]) {
-                mtspr(SPRN_IAC1, dbg->bp[0]);
-                dbcr0 |= DBCR0_IAC1 | DBCR0_IDM;
-        }
-        if (dbg->bp[1]) {
-                mtspr(SPRN_IAC2, dbg->bp[1]);
-                dbcr0 |= DBCR0_IAC2 | DBCR0_IDM;
-        }
-        if (dbg->bp[2]) {
-                mtspr(SPRN_IAC3, dbg->bp[2]);
-                dbcr0 |= DBCR0_IAC3 | DBCR0_IDM;
-        }
-        if (dbg->bp[3]) {
-                mtspr(SPRN_IAC4, dbg->bp[3]);
-                dbcr0 |= DBCR0_IAC4 | DBCR0_IDM;
-        }
-
-        mtspr(SPRN_DBCR0, dbcr0);
-        mtspr(SPRN_DBCR1, 0);
-        mtspr(SPRN_DBCR2, 0);
-}
-
 void kvmppc_core_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
 {
         kvmppc_44x_tlb_load(vcpu);
@@ -149,8 +83,6 @@ int kvmppc_core_vcpu_setup(struct kvm_vcpu *vcpu)
 int kvmppc_core_vcpu_translate(struct kvm_vcpu *vcpu,
                                struct kvm_translation *tr)
 {
-        struct kvmppc_vcpu_44x *vcpu_44x = to_44x(vcpu);
-        struct kvmppc_44x_tlbe *gtlbe;
         int index;
         gva_t eaddr;
         u8 pid;
@@ -166,9 +98,7 @@ int kvmppc_core_vcpu_translate(struct kvm_vcpu *vcpu,
                 return 0;
         }
 
-        gtlbe = &vcpu_44x->guest_tlb[index];
-
-        tr->physical_address = tlb_xlate(gtlbe, eaddr);
+        tr->physical_address = kvmppc_mmu_xlate(vcpu, index, eaddr);
         /* XXX what does "writeable" and "usermode" even mean? */
         tr->valid = 1;
 
diff --git a/arch/powerpc/kvm/44x_emulate.c b/arch/powerpc/kvm/44x_emulate.c
index 82489a743a6f..61af58fcecee 100644
--- a/arch/powerpc/kvm/44x_emulate.c
+++ b/arch/powerpc/kvm/44x_emulate.c
@@ -27,25 +27,12 @@
 #include "booke.h"
 #include "44x_tlb.h"
 
-#define OP_RFI      19
-
-#define XOP_RFI     50
-#define XOP_MFMSR   83
-#define XOP_WRTEE   131
-#define XOP_MTMSR   146
-#define XOP_WRTEEI  163
 #define XOP_MFDCR   323
 #define XOP_MTDCR   451
 #define XOP_TLBSX   914
 #define XOP_ICCCI   966
 #define XOP_TLBWE   978
 
-static void kvmppc_emul_rfi(struct kvm_vcpu *vcpu)
-{
-        vcpu->arch.pc = vcpu->arch.srr0;
-        kvmppc_set_msr(vcpu, vcpu->arch.srr1);
-}
-
 int kvmppc_core_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu,
                            unsigned int inst, int *advance)
 {
@@ -59,48 +46,9 @@ int kvmppc_core_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu,
         int ws;
 
         switch (get_op(inst)) {
-        case OP_RFI:
-                switch (get_xop(inst)) {
-                case XOP_RFI:
-                        kvmppc_emul_rfi(vcpu);
-                        kvmppc_set_exit_type(vcpu, EMULATED_RFI_EXITS);
-                        *advance = 0;
-                        break;
-
-                default:
-                        emulated = EMULATE_FAIL;
-                        break;
-                }
-                break;
-
         case 31:
                 switch (get_xop(inst)) {
 
-                case XOP_MFMSR:
-                        rt = get_rt(inst);
-                        vcpu->arch.gpr[rt] = vcpu->arch.msr;
-                        kvmppc_set_exit_type(vcpu, EMULATED_MFMSR_EXITS);
-                        break;
-
-                case XOP_MTMSR:
-                        rs = get_rs(inst);
-                        kvmppc_set_exit_type(vcpu, EMULATED_MTMSR_EXITS);
-                        kvmppc_set_msr(vcpu, vcpu->arch.gpr[rs]);
-                        break;
-
-                case XOP_WRTEE:
-                        rs = get_rs(inst);
-                        vcpu->arch.msr = (vcpu->arch.msr & ~MSR_EE)
-                                                         | (vcpu->arch.gpr[rs] & MSR_EE);
-                        kvmppc_set_exit_type(vcpu, EMULATED_WRTEE_EXITS);
-                        break;
-
-                case XOP_WRTEEI:
-                        vcpu->arch.msr = (vcpu->arch.msr & ~MSR_EE)
-                                                         | (inst & MSR_EE);
-                        kvmppc_set_exit_type(vcpu, EMULATED_WRTEE_EXITS);
-                        break;
-
                 case XOP_MFDCR:
                         dcrn = get_dcrn(inst);
                         rt = get_rt(inst);
@@ -186,186 +134,51 @@ int kvmppc_core_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu,
                 emulated = EMULATE_FAIL;
         }
 
+        if (emulated == EMULATE_FAIL)
+                emulated = kvmppc_booke_emulate_op(run, vcpu, inst, advance);
+
         return emulated;
 }
 
 int kvmppc_core_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, int rs)
 {
+        int emulated = EMULATE_DONE;
+
         switch (sprn) {
-        case SPRN_MMUCR:
-                vcpu->arch.mmucr = vcpu->arch.gpr[rs]; break;
         case SPRN_PID:
                 kvmppc_set_pid(vcpu, vcpu->arch.gpr[rs]); break;
+        case SPRN_MMUCR:
+                vcpu->arch.mmucr = vcpu->arch.gpr[rs]; break;
         case SPRN_CCR0:
                 vcpu->arch.ccr0 = vcpu->arch.gpr[rs]; break;
         case SPRN_CCR1:
                 vcpu->arch.ccr1 = vcpu->arch.gpr[rs]; break;
-        case SPRN_DEAR:
-                vcpu->arch.dear = vcpu->arch.gpr[rs]; break;
-        case SPRN_ESR:
-                vcpu->arch.esr = vcpu->arch.gpr[rs]; break;
-        case SPRN_DBCR0:
-                vcpu->arch.dbcr0 = vcpu->arch.gpr[rs]; break;
-        case SPRN_DBCR1:
-                vcpu->arch.dbcr1 = vcpu->arch.gpr[rs]; break;
-        case SPRN_TSR:
-                vcpu->arch.tsr &= ~vcpu->arch.gpr[rs]; break;
-        case SPRN_TCR:
-                vcpu->arch.tcr = vcpu->arch.gpr[rs];
-                kvmppc_emulate_dec(vcpu);
-                break;
-
-        /* Note: SPRG4-7 are user-readable. These values are
-         * loaded into the real SPRGs when resuming the
-         * guest. */
-        case SPRN_SPRG4:
-                vcpu->arch.sprg4 = vcpu->arch.gpr[rs]; break;
-        case SPRN_SPRG5:
-                vcpu->arch.sprg5 = vcpu->arch.gpr[rs]; break;
-        case SPRN_SPRG6:
-                vcpu->arch.sprg6 = vcpu->arch.gpr[rs]; break;
-        case SPRN_SPRG7:
-                vcpu->arch.sprg7 = vcpu->arch.gpr[rs]; break;
-
-        case SPRN_IVPR:
-                vcpu->arch.ivpr = vcpu->arch.gpr[rs];
-                break;
-        case SPRN_IVOR0:
-                vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL] = vcpu->arch.gpr[rs];
-                break;
-        case SPRN_IVOR1:
-                vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK] = vcpu->arch.gpr[rs];
-                break;
-        case SPRN_IVOR2:
-                vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE] = vcpu->arch.gpr[rs];
-                break;
-        case SPRN_IVOR3:
-                vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE] = vcpu->arch.gpr[rs];
-                break;
-        case SPRN_IVOR4:
-                vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL] = vcpu->arch.gpr[rs];
-                break;
-        case SPRN_IVOR5:
-                vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT] = vcpu->arch.gpr[rs];
-                break;
-        case SPRN_IVOR6:
-                vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM] = vcpu->arch.gpr[rs];
-                break;
-        case SPRN_IVOR7:
-                vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL] = vcpu->arch.gpr[rs];
-                break;
-        case SPRN_IVOR8:
-                vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL] = vcpu->arch.gpr[rs];
-                break;
-        case SPRN_IVOR9:
-                vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL] = vcpu->arch.gpr[rs];
-                break;
-        case SPRN_IVOR10:
-                vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER] = vcpu->arch.gpr[rs];
-                break;
-        case SPRN_IVOR11:
-                vcpu->arch.ivor[BOOKE_IRQPRIO_FIT] = vcpu->arch.gpr[rs];
-                break;
-        case SPRN_IVOR12:
-                vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG] = vcpu->arch.gpr[rs];
-                break;
-        case SPRN_IVOR13:
-                vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS] = vcpu->arch.gpr[rs];
-                break;
-        case SPRN_IVOR14:
-                vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS] = vcpu->arch.gpr[rs];
-                break;
-        case SPRN_IVOR15:
-                vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG] = vcpu->arch.gpr[rs];
-                break;
-
         default:
-                return EMULATE_FAIL;
+                emulated = kvmppc_booke_emulate_mtspr(vcpu, sprn, rs);
         }
 
         kvmppc_set_exit_type(vcpu, EMULATED_MTSPR_EXITS);
-        return EMULATE_DONE;
+        return emulated;
 }
 
 int kvmppc_core_emulate_mfspr(struct kvm_vcpu *vcpu, int sprn, int rt)
 {
+        int emulated = EMULATE_DONE;
+
         switch (sprn) {
-        /* 440 */
+        case SPRN_PID:
+                vcpu->arch.gpr[rt] = vcpu->arch.pid; break;
         case SPRN_MMUCR:
                 vcpu->arch.gpr[rt] = vcpu->arch.mmucr; break;
         case SPRN_CCR0:
                 vcpu->arch.gpr[rt] = vcpu->arch.ccr0; break;
         case SPRN_CCR1:
                 vcpu->arch.gpr[rt] = vcpu->arch.ccr1; break;
-
-        /* Book E */
-        case SPRN_PID:
-                vcpu->arch.gpr[rt] = vcpu->arch.pid; break;
-        case SPRN_IVPR:
-                vcpu->arch.gpr[rt] = vcpu->arch.ivpr; break;
-        case SPRN_DEAR:
-                vcpu->arch.gpr[rt] = vcpu->arch.dear; break;
-        case SPRN_ESR:
-                vcpu->arch.gpr[rt] = vcpu->arch.esr; break;
-        case SPRN_DBCR0:
-                vcpu->arch.gpr[rt] = vcpu->arch.dbcr0; break;
-        case SPRN_DBCR1:
-                vcpu->arch.gpr[rt] = vcpu->arch.dbcr1; break;
-
-        case SPRN_IVOR0:
-                vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL];
-                break;
-        case SPRN_IVOR1:
-                vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK];
-                break;
-        case SPRN_IVOR2:
-                vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE];
-                break;
-        case SPRN_IVOR3:
-                vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE];
-                break;
-        case SPRN_IVOR4:
-                vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL];
-                break;
-        case SPRN_IVOR5:
-                vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT];
-                break;
-        case SPRN_IVOR6:
-                vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM];
-                break;
-        case SPRN_IVOR7:
-                vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL];
-                break;
-        case SPRN_IVOR8:
-                vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL];
-                break;
-        case SPRN_IVOR9:
-                vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL];
-                break;
-        case SPRN_IVOR10:
-                vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER];
-                break;
-        case SPRN_IVOR11:
-                vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_FIT];
-                break;
-        case SPRN_IVOR12:
-                vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG];
-                break;
-        case SPRN_IVOR13:
-                vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS];
-                break;
-        case SPRN_IVOR14:
-                vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS];
-                break;
-        case SPRN_IVOR15:
-                vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG];
-                break;
-
         default:
-                return EMULATE_FAIL;
+                emulated = kvmppc_booke_emulate_mfspr(vcpu, sprn, rt);
         }
 
         kvmppc_set_exit_type(vcpu, EMULATED_MFSPR_EXITS);
-        return EMULATE_DONE;
+        return emulated;
 }
 
diff --git a/arch/powerpc/kvm/44x_tlb.c b/arch/powerpc/kvm/44x_tlb.c
index 9a34b8edb9e2..4a16f472cc18 100644
--- a/arch/powerpc/kvm/44x_tlb.c
+++ b/arch/powerpc/kvm/44x_tlb.c
@@ -208,20 +208,38 @@ int kvmppc_44x_tlb_index(struct kvm_vcpu *vcpu, gva_t eaddr, unsigned int pid,
         return -1;
 }
 
-int kvmppc_44x_itlb_index(struct kvm_vcpu *vcpu, gva_t eaddr)
+gpa_t kvmppc_mmu_xlate(struct kvm_vcpu *vcpu, unsigned int gtlb_index,
+                       gva_t eaddr)
+{
+        struct kvmppc_vcpu_44x *vcpu_44x = to_44x(vcpu);
+        struct kvmppc_44x_tlbe *gtlbe = &vcpu_44x->guest_tlb[gtlb_index];
+        unsigned int pgmask = get_tlb_bytes(gtlbe) - 1;
+
+        return get_tlb_raddr(gtlbe) | (eaddr & pgmask);
+}
+
+int kvmppc_mmu_itlb_index(struct kvm_vcpu *vcpu, gva_t eaddr)
 {
         unsigned int as = !!(vcpu->arch.msr & MSR_IS);
 
         return kvmppc_44x_tlb_index(vcpu, eaddr, vcpu->arch.pid, as);
 }
 
-int kvmppc_44x_dtlb_index(struct kvm_vcpu *vcpu, gva_t eaddr)
+int kvmppc_mmu_dtlb_index(struct kvm_vcpu *vcpu, gva_t eaddr)
 {
         unsigned int as = !!(vcpu->arch.msr & MSR_DS);
 
         return kvmppc_44x_tlb_index(vcpu, eaddr, vcpu->arch.pid, as);
 }
 
+void kvmppc_mmu_itlb_miss(struct kvm_vcpu *vcpu)
+{
+}
+
+void kvmppc_mmu_dtlb_miss(struct kvm_vcpu *vcpu)
+{
+}
+
 static void kvmppc_44x_shadow_release(struct kvmppc_vcpu_44x *vcpu_44x,
                                       unsigned int stlb_index)
 {
@@ -248,7 +266,7 @@ static void kvmppc_44x_shadow_release(struct kvmppc_vcpu_44x *vcpu_44x,
         KVMTRACE_1D(STLB_INVAL, &vcpu_44x->vcpu, stlb_index, handler);
 }
 
-void kvmppc_core_destroy_mmu(struct kvm_vcpu *vcpu)
+void kvmppc_mmu_destroy(struct kvm_vcpu *vcpu)
 {
         struct kvmppc_vcpu_44x *vcpu_44x = to_44x(vcpu);
         int i;
@@ -269,15 +287,19 @@ void kvmppc_core_destroy_mmu(struct kvm_vcpu *vcpu)
  * Caller must ensure that the specified guest TLB entry is safe to insert into
  * the shadow TLB.
  */
-void kvmppc_mmu_map(struct kvm_vcpu *vcpu, u64 gvaddr, gpa_t gpaddr, u64 asid,
-                    u32 flags, u32 max_bytes, unsigned int gtlb_index)
+void kvmppc_mmu_map(struct kvm_vcpu *vcpu, u64 gvaddr, gpa_t gpaddr,
+                    unsigned int gtlb_index)
 {
         struct kvmppc_44x_tlbe stlbe;
         struct kvmppc_vcpu_44x *vcpu_44x = to_44x(vcpu);
+        struct kvmppc_44x_tlbe *gtlbe = &vcpu_44x->guest_tlb[gtlb_index];
         struct kvmppc_44x_shadow_ref *ref;
         struct page *new_page;
         hpa_t hpaddr;
         gfn_t gfn;
+        u32 asid = gtlbe->tid;
+        u32 flags = gtlbe->word2;
+        u32 max_bytes = get_tlb_bytes(gtlbe);
         unsigned int victim;
 
         /* Select TLB entry to clobber. Indirectly guard against races with the TLB
@@ -448,10 +470,8 @@ int kvmppc_44x_emul_tlbwe(struct kvm_vcpu *vcpu, u8 ra, u8 rs, u8 ws)
         }
 
         if (tlbe_is_host_safe(vcpu, tlbe)) {
-                u64 asid;
                 gva_t eaddr;
                 gpa_t gpaddr;
-                u32 flags;
                 u32 bytes;
 
                 eaddr = get_tlb_eaddr(tlbe);
@@ -462,10 +482,7 @@ int kvmppc_44x_emul_tlbwe(struct kvm_vcpu *vcpu, u8 ra, u8 rs, u8 ws)
                 eaddr &= ~(bytes - 1);
                 gpaddr &= ~(bytes - 1);
 
-                asid = (tlbe->word0 & PPC44x_TLB_TS) | tlbe->tid;
-                flags = tlbe->word2 & 0xffff;
-
-                kvmppc_mmu_map(vcpu, eaddr, gpaddr, asid, flags, bytes, gtlb_index);
+                kvmppc_mmu_map(vcpu, eaddr, gpaddr, gtlb_index);
         }
 
         KVMTRACE_5D(GTLB_WRITE, vcpu, gtlb_index, tlbe->tid, tlbe->word0,
diff --git a/arch/powerpc/kvm/44x_tlb.h b/arch/powerpc/kvm/44x_tlb.h
index 772191f29e62..a9ff80e51526 100644
--- a/arch/powerpc/kvm/44x_tlb.h
+++ b/arch/powerpc/kvm/44x_tlb.h
@@ -25,8 +25,6 @@
 
 extern int kvmppc_44x_tlb_index(struct kvm_vcpu *vcpu, gva_t eaddr,
                                 unsigned int pid, unsigned int as);
-extern int kvmppc_44x_dtlb_index(struct kvm_vcpu *vcpu, gva_t eaddr);
-extern int kvmppc_44x_itlb_index(struct kvm_vcpu *vcpu, gva_t eaddr);
 
 extern int kvmppc_44x_emul_tlbsx(struct kvm_vcpu *vcpu, u8 rt, u8 ra, u8 rb,
                                  u8 rc);
@@ -85,11 +83,4 @@ static inline unsigned int get_mmucr_sts(const struct kvm_vcpu *vcpu)
         return (vcpu->arch.mmucr >> 16) & 0x1;
 }
 
-static inline gpa_t tlb_xlate(struct kvmppc_44x_tlbe *tlbe, gva_t eaddr)
-{
-        unsigned int pgmask = get_tlb_bytes(tlbe) - 1;
-
-        return get_tlb_raddr(tlbe) | (eaddr & pgmask);
-}
-
 #endif /* __KVM_POWERPC_TLB_H__ */
diff --git a/arch/powerpc/kvm/Kconfig b/arch/powerpc/kvm/Kconfig
index 6dbdc4817d80..5a152a52796f 100644
--- a/arch/powerpc/kvm/Kconfig
+++ b/arch/powerpc/kvm/Kconfig
@@ -2,6 +2,9 @@
 # KVM configuration
 #
 
+config HAVE_KVM_IRQCHIP
+       bool
+
 menuconfig VIRTUALIZATION
         bool "Virtualization"
         ---help---
@@ -43,6 +46,19 @@ config KVM_EXIT_TIMING
 
           If unsure, say N.
 
+config KVM_E500
+        bool "KVM support for PowerPC E500 processors"
+        depends on EXPERIMENTAL && E500
+        select KVM
+        ---help---
+          Support running unmodified E500 guest kernels in virtual machines on
+          E500 host processors.
+
+          This module provides access to the hardware capabilities through
+          a character device node named /dev/kvm.
+
+          If unsure, say N.
+
 config KVM_TRACE
         bool "KVM trace support"
         depends on KVM && MARKERS && SYSFS
diff --git a/arch/powerpc/kvm/Makefile b/arch/powerpc/kvm/Makefile
index df7ba59e6d53..4b2df66c79d8 100644
--- a/arch/powerpc/kvm/Makefile
+++ b/arch/powerpc/kvm/Makefile
@@ -16,8 +16,18 @@ AFLAGS_booke_interrupts.o := -I$(obj)
 
 kvm-440-objs := \
         booke.o \
+        booke_emulate.o \
         booke_interrupts.o \
         44x.o \
         44x_tlb.o \
         44x_emulate.o
 obj-$(CONFIG_KVM_440) += kvm-440.o
+
+kvm-e500-objs := \
+        booke.o \
+        booke_emulate.o \
+        booke_interrupts.o \
+        e500.o \
+        e500_tlb.o \
+        e500_emulate.o
+obj-$(CONFIG_KVM_E500) += kvm-e500.o
diff --git a/arch/powerpc/kvm/booke.c b/arch/powerpc/kvm/booke.c
index 35485dd6927e..642e4204cf25 100644
--- a/arch/powerpc/kvm/booke.c
+++ b/arch/powerpc/kvm/booke.c
@@ -30,10 +30,8 @@
 #include <asm/kvm_ppc.h>
 #include "timing.h"
 #include <asm/cacheflush.h>
-#include <asm/kvm_44x.h>
 
 #include "booke.h"
-#include "44x_tlb.h"
 
 unsigned long kvmppc_booke_handlers;
 
@@ -120,6 +118,9 @@ static int kvmppc_booke_irqprio_deliver(struct kvm_vcpu *vcpu,
         case BOOKE_IRQPRIO_DATA_STORAGE:
         case BOOKE_IRQPRIO_INST_STORAGE:
         case BOOKE_IRQPRIO_FP_UNAVAIL:
+        case BOOKE_IRQPRIO_SPE_UNAVAIL:
+        case BOOKE_IRQPRIO_SPE_FP_DATA:
+        case BOOKE_IRQPRIO_SPE_FP_ROUND:
         case BOOKE_IRQPRIO_AP_UNAVAIL:
         case BOOKE_IRQPRIO_ALIGNMENT:
                 allowed = 1;
@@ -165,7 +166,7 @@ void kvmppc_core_deliver_interrupts(struct kvm_vcpu *vcpu)
         unsigned int priority;
 
         priority = __ffs(*pending);
-        while (priority <= BOOKE_MAX_INTERRUPT) {
+        while (priority <= BOOKE_IRQPRIO_MAX) {
                 if (kvmppc_booke_irqprio_deliver(vcpu, priority))
                         break;
 
@@ -263,6 +264,21 @@ int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu,
                 r = RESUME_GUEST;
                 break;
 
+        case BOOKE_INTERRUPT_SPE_UNAVAIL:
+                kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SPE_UNAVAIL);
+                r = RESUME_GUEST;
+                break;
+
+        case BOOKE_INTERRUPT_SPE_FP_DATA:
+                kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SPE_FP_DATA);
+                r = RESUME_GUEST;
+                break;
+
+        case BOOKE_INTERRUPT_SPE_FP_ROUND:
+                kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SPE_FP_ROUND);
+                r = RESUME_GUEST;
+                break;
+
         case BOOKE_INTERRUPT_DATA_STORAGE:
                 vcpu->arch.dear = vcpu->arch.fault_dear;
                 vcpu->arch.esr = vcpu->arch.fault_esr;
@@ -284,29 +300,27 @@ int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu,
                 r = RESUME_GUEST;
                 break;
 
-        /* XXX move to a 440-specific file. */
         case BOOKE_INTERRUPT_DTLB_MISS: {
-                struct kvmppc_vcpu_44x *vcpu_44x = to_44x(vcpu);
-                struct kvmppc_44x_tlbe *gtlbe;
                 unsigned long eaddr = vcpu->arch.fault_dear;
                 int gtlb_index;
+                gpa_t gpaddr;
                 gfn_t gfn;
 
                 /* Check the guest TLB. */
-                gtlb_index = kvmppc_44x_dtlb_index(vcpu, eaddr);
+                gtlb_index = kvmppc_mmu_dtlb_index(vcpu, eaddr);
                 if (gtlb_index < 0) {
                         /* The guest didn't have a mapping for it. */
                         kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DTLB_MISS);
                         vcpu->arch.dear = vcpu->arch.fault_dear;
                         vcpu->arch.esr = vcpu->arch.fault_esr;
+                        kvmppc_mmu_dtlb_miss(vcpu);
                         kvmppc_account_exit(vcpu, DTLB_REAL_MISS_EXITS);
                         r = RESUME_GUEST;
                         break;
                 }
 
-                gtlbe = &vcpu_44x->guest_tlb[gtlb_index];
-                vcpu->arch.paddr_accessed = tlb_xlate(gtlbe, eaddr);
-                gfn = vcpu->arch.paddr_accessed >> PAGE_SHIFT;
+                gpaddr = kvmppc_mmu_xlate(vcpu, gtlb_index, eaddr);
+                gfn = gpaddr >> PAGE_SHIFT;
 
                 if (kvm_is_visible_gfn(vcpu->kvm, gfn)) {
                         /* The guest TLB had a mapping, but the shadow TLB
@@ -315,13 +329,13 @@ int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu,
                          * b) the guest used a large mapping which we're faking
                          * Either way, we need to satisfy the fault without
                          * invoking the guest. */
-                        kvmppc_mmu_map(vcpu, eaddr, vcpu->arch.paddr_accessed, gtlbe->tid,
-                                       gtlbe->word2, get_tlb_bytes(gtlbe), gtlb_index);
+                        kvmppc_mmu_map(vcpu, eaddr, gpaddr, gtlb_index);
                         kvmppc_account_exit(vcpu, DTLB_VIRT_MISS_EXITS);
                         r = RESUME_GUEST;
                 } else {
                         /* Guest has mapped and accessed a page which is not
                          * actually RAM. */
+                        vcpu->arch.paddr_accessed = gpaddr;
                         r = kvmppc_emulate_mmio(run, vcpu);
                         kvmppc_account_exit(vcpu, MMIO_EXITS);
                 }
@@ -329,10 +343,7 @@ int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu,
                 break;
         }
 
-        /* XXX move to a 440-specific file. */
         case BOOKE_INTERRUPT_ITLB_MISS: {
-                struct kvmppc_vcpu_44x *vcpu_44x = to_44x(vcpu);
-                struct kvmppc_44x_tlbe *gtlbe;
                 unsigned long eaddr = vcpu->arch.pc;
                 gpa_t gpaddr;
                 gfn_t gfn;
@@ -341,18 +352,18 @@ int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu,
                 r = RESUME_GUEST;
 
                 /* Check the guest TLB. */
-                gtlb_index = kvmppc_44x_itlb_index(vcpu, eaddr);
+                gtlb_index = kvmppc_mmu_itlb_index(vcpu, eaddr);
                 if (gtlb_index < 0) {
                         /* The guest didn't have a mapping for it. */
                         kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ITLB_MISS);
+                        kvmppc_mmu_itlb_miss(vcpu);
                         kvmppc_account_exit(vcpu, ITLB_REAL_MISS_EXITS);
                         break;
                 }
 
                 kvmppc_account_exit(vcpu, ITLB_VIRT_MISS_EXITS);
 
-                gtlbe = &vcpu_44x->guest_tlb[gtlb_index];
-                gpaddr = tlb_xlate(gtlbe, eaddr);
+                gpaddr = kvmppc_mmu_xlate(vcpu, gtlb_index, eaddr);
                 gfn = gpaddr >> PAGE_SHIFT;
 
                 if (kvm_is_visible_gfn(vcpu->kvm, gfn)) {
@@ -362,8 +373,7 @@ int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu,
                          * b) the guest used a large mapping which we're faking
                          * Either way, we need to satisfy the fault without
                          * invoking the guest. */
-                        kvmppc_mmu_map(vcpu, eaddr, gpaddr, gtlbe->tid,
-                                       gtlbe->word2, get_tlb_bytes(gtlbe), gtlb_index);
+                        kvmppc_mmu_map(vcpu, eaddr, gpaddr, gtlb_index);
                 } else {
                         /* Guest mapped and leaped at non-RAM! */
                         kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_MACHINE_CHECK);
diff --git a/arch/powerpc/kvm/booke.h b/arch/powerpc/kvm/booke.h
index cf7c94ca24bf..d59bcca1f9d8 100644
--- a/arch/powerpc/kvm/booke.h
+++ b/arch/powerpc/kvm/booke.h
@@ -22,6 +22,7 @@
 
 #include <linux/types.h>
 #include <linux/kvm_host.h>
+#include <asm/kvm_ppc.h>
 #include "timing.h"
 
 /* interrupt priortity ordering */
@@ -30,17 +31,24 @@
 #define BOOKE_IRQPRIO_ALIGNMENT 2
 #define BOOKE_IRQPRIO_PROGRAM 3
 #define BOOKE_IRQPRIO_FP_UNAVAIL 4
-#define BOOKE_IRQPRIO_SYSCALL 5
-#define BOOKE_IRQPRIO_AP_UNAVAIL 6
-#define BOOKE_IRQPRIO_DTLB_MISS 7
-#define BOOKE_IRQPRIO_ITLB_MISS 8
-#define BOOKE_IRQPRIO_MACHINE_CHECK 9
-#define BOOKE_IRQPRIO_DEBUG 10
-#define BOOKE_IRQPRIO_CRITICAL 11
-#define BOOKE_IRQPRIO_WATCHDOG 12
-#define BOOKE_IRQPRIO_EXTERNAL 13
-#define BOOKE_IRQPRIO_FIT 14
-#define BOOKE_IRQPRIO_DECREMENTER 15
+#define BOOKE_IRQPRIO_SPE_UNAVAIL 5
+#define BOOKE_IRQPRIO_SPE_FP_DATA 6
+#define BOOKE_IRQPRIO_SPE_FP_ROUND 7
+#define BOOKE_IRQPRIO_SYSCALL 8
+#define BOOKE_IRQPRIO_AP_UNAVAIL 9
+#define BOOKE_IRQPRIO_DTLB_MISS 10
+#define BOOKE_IRQPRIO_ITLB_MISS 11
+#define BOOKE_IRQPRIO_MACHINE_CHECK 12
+#define BOOKE_IRQPRIO_DEBUG 13
+#define BOOKE_IRQPRIO_CRITICAL 14
+#define BOOKE_IRQPRIO_WATCHDOG 15
+#define BOOKE_IRQPRIO_EXTERNAL 16
+#define BOOKE_IRQPRIO_FIT 17
+#define BOOKE_IRQPRIO_DECREMENTER 18
+#define BOOKE_IRQPRIO_PERFORMANCE_MONITOR 19
+#define BOOKE_IRQPRIO_MAX 19
+
+extern unsigned long kvmppc_booke_handlers;
 
 /* Helper function for "full" MSR writes. No need to call this if only EE is
  * changing. */
@@ -57,4 +65,9 @@ static inline void kvmppc_set_msr(struct kvm_vcpu *vcpu, u32 new_msr)
         };
 }
 
+int kvmppc_booke_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu,
+                            unsigned int inst, int *advance);
+int kvmppc_booke_emulate_mfspr(struct kvm_vcpu *vcpu, int sprn, int rt);
+int kvmppc_booke_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, int rs);
+
 #endif /* __KVM_BOOKE_H__ */
diff --git a/arch/powerpc/kvm/booke_emulate.c b/arch/powerpc/kvm/booke_emulate.c
new file mode 100644
index 000000000000..aebc65e93f4b
--- /dev/null
+++ b/arch/powerpc/kvm/booke_emulate.c
@@ -0,0 +1,266 @@
+/*
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License, version 2, as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
+ *
+ * Copyright IBM Corp. 2008
+ *
+ * Authors: Hollis Blanchard <hollisb@us.ibm.com>
+ */
+
+#include <linux/kvm_host.h>
+#include <asm/disassemble.h>
+
+#include "booke.h"
+
+#define OP_19_XOP_RFI     50
+
+#define OP_31_XOP_MFMSR   83
+#define OP_31_XOP_WRTEE   131
+#define OP_31_XOP_MTMSR   146
+#define OP_31_XOP_WRTEEI  163
+
+static void kvmppc_emul_rfi(struct kvm_vcpu *vcpu)
+{
+        vcpu->arch.pc = vcpu->arch.srr0;
+        kvmppc_set_msr(vcpu, vcpu->arch.srr1);
+}
+
+int kvmppc_booke_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu,
+                            unsigned int inst, int *advance)
+{
+        int emulated = EMULATE_DONE;
+        int rs;
+        int rt;
+
+        switch (get_op(inst)) {
+        case 19:
+                switch (get_xop(inst)) {
+                case OP_19_XOP_RFI:
+                        kvmppc_emul_rfi(vcpu);
+                        kvmppc_set_exit_type(vcpu, EMULATED_RFI_EXITS);
+                        *advance = 0;
+                        break;
+
+                default:
+                        emulated = EMULATE_FAIL;
+                        break;
+                }
+                break;
+
+        case 31:
+                switch (get_xop(inst)) {
+
+                case OP_31_XOP_MFMSR:
+                        rt = get_rt(inst);
+                        vcpu->arch.gpr[rt] = vcpu->arch.msr;
+                        kvmppc_set_exit_type(vcpu, EMULATED_MFMSR_EXITS);
+                        break;
+
+                case OP_31_XOP_MTMSR:
+                        rs = get_rs(inst);
+                        kvmppc_set_exit_type(vcpu, EMULATED_MTMSR_EXITS);
+                        kvmppc_set_msr(vcpu, vcpu->arch.gpr[rs]);
+                        break;
+
+                case OP_31_XOP_WRTEE:
+                        rs = get_rs(inst);
+                        vcpu->arch.msr = (vcpu->arch.msr & ~MSR_EE)
+                                                         | (vcpu->arch.gpr[rs] & MSR_EE);
+                        kvmppc_set_exit_type(vcpu, EMULATED_WRTEE_EXITS);
+                        break;
+
+                case OP_31_XOP_WRTEEI:
+                        vcpu->arch.msr = (vcpu->arch.msr & ~MSR_EE)
+                                                         | (inst & MSR_EE);
+                        kvmppc_set_exit_type(vcpu, EMULATED_WRTEE_EXITS);
+                        break;
+
+                default:
+                        emulated = EMULATE_FAIL;
+                }
+
+                break;
+
+        default:
+                emulated = EMULATE_FAIL;
+        }
+
+        return emulated;
+}
+
+int kvmppc_booke_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, int rs)
+{
+        int emulated = EMULATE_DONE;
+
+        switch (sprn) {
+        case SPRN_DEAR:
+                vcpu->arch.dear = vcpu->arch.gpr[rs]; break;
+        case SPRN_ESR:
+                vcpu->arch.esr = vcpu->arch.gpr[rs]; break;
+        case SPRN_DBCR0:
+                vcpu->arch.dbcr0 = vcpu->arch.gpr[rs]; break;
+        case SPRN_DBCR1:
+                vcpu->arch.dbcr1 = vcpu->arch.gpr[rs]; break;
+        case SPRN_DBSR:
+                vcpu->arch.dbsr &= ~vcpu->arch.gpr[rs]; break;
+        case SPRN_TSR:
+                vcpu->arch.tsr &= ~vcpu->arch.gpr[rs]; break;
+        case SPRN_TCR:
+                vcpu->arch.tcr = vcpu->arch.gpr[rs];
+                kvmppc_emulate_dec(vcpu);
+                break;
+
+        /* Note: SPRG4-7 are user-readable. These values are
+         * loaded into the real SPRGs when resuming the
+         * guest. */
+        case SPRN_SPRG4:
+                vcpu->arch.sprg4 = vcpu->arch.gpr[rs]; break;
+        case SPRN_SPRG5:
+                vcpu->arch.sprg5 = vcpu->arch.gpr[rs]; break;
+        case SPRN_SPRG6:
+                vcpu->arch.sprg6 = vcpu->arch.gpr[rs]; break;
+        case SPRN_SPRG7:
+                vcpu->arch.sprg7 = vcpu->arch.gpr[rs]; break;
+
+        case SPRN_IVPR:
+                vcpu->arch.ivpr = vcpu->arch.gpr[rs];
+                break;
+        case SPRN_IVOR0:
+                vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL] = vcpu->arch.gpr[rs];
+                break;
+        case SPRN_IVOR1:
+                vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK] = vcpu->arch.gpr[rs];
+                break;
+        case SPRN_IVOR2:
+                vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE] = vcpu->arch.gpr[rs];
+                break;
+        case SPRN_IVOR3:
+                vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE] = vcpu->arch.gpr[rs];
+                break;
+        case SPRN_IVOR4:
+                vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL] = vcpu->arch.gpr[rs];
+                break;
+        case SPRN_IVOR5:
+                vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT] = vcpu->arch.gpr[rs];
+                break;
+        case SPRN_IVOR6:
+                vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM] = vcpu->arch.gpr[rs];
+                break;
+        case SPRN_IVOR7:
+                vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL] = vcpu->arch.gpr[rs];
+                break;
+        case SPRN_IVOR8:
+                vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL] = vcpu->arch.gpr[rs];
+                break;
+        case SPRN_IVOR9:
+                vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL] = vcpu->arch.gpr[rs];
+                break;
+        case SPRN_IVOR10:
+                vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER] = vcpu->arch.gpr[rs];
+                break;
+        case SPRN_IVOR11:
+                vcpu->arch.ivor[BOOKE_IRQPRIO_FIT] = vcpu->arch.gpr[rs];
+                break;
+        case SPRN_IVOR12:
+                vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG] = vcpu->arch.gpr[rs];
+                break;
+        case SPRN_IVOR13:
+                vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS] = vcpu->arch.gpr[rs];
+                break;
+        case SPRN_IVOR14:
+                vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS] = vcpu->arch.gpr[rs];
+                break;
+        case SPRN_IVOR15:
+                vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG] = vcpu->arch.gpr[rs];
+                break;
+
+        default:
+                emulated = EMULATE_FAIL;
+        }
+
+        return emulated;
+}
+
+int kvmppc_booke_emulate_mfspr(struct kvm_vcpu *vcpu, int sprn, int rt)
+{
+        int emulated = EMULATE_DONE;
+
+        switch (sprn) {
+        case SPRN_IVPR:
+                vcpu->arch.gpr[rt] = vcpu->arch.ivpr; break;
+        case SPRN_DEAR:
+                vcpu->arch.gpr[rt] = vcpu->arch.dear; break;
+        case SPRN_ESR:
+                vcpu->arch.gpr[rt] = vcpu->arch.esr; break;
+        case SPRN_DBCR0:
+                vcpu->arch.gpr[rt] = vcpu->arch.dbcr0; break;
+        case SPRN_DBCR1:
+                vcpu->arch.gpr[rt] = vcpu->arch.dbcr1; break;
+        case SPRN_DBSR:
+                vcpu->arch.gpr[rt] = vcpu->arch.dbsr; break;
+
+        case SPRN_IVOR0:
+                vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL];
+                break;
+        case SPRN_IVOR1:
+                vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK];
+                break;
+        case SPRN_IVOR2:
+                vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE];
+                break;
+        case SPRN_IVOR3:
+                vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE];
+                break;
+        case SPRN_IVOR4:
+                vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL];
+                break;
+        case SPRN_IVOR5:
+                vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT];
+                break;
+        case SPRN_IVOR6:
+                vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM];
+                break;
+        case SPRN_IVOR7:
+                vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL];
+                break;
+        case SPRN_IVOR8:
+                vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL];
+                break;
+        case SPRN_IVOR9:
+                vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL];
+                break;
+        case SPRN_IVOR10:
+                vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER];
+                break;
+        case SPRN_IVOR11:
+                vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_FIT];
+                break;
+        case SPRN_IVOR12:
+                vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG];
+                break;
+        case SPRN_IVOR13:
+                vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS];
+                break;
+        case SPRN_IVOR14:
+                vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS];
+                break;
+        case SPRN_IVOR15:
+                vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG];
+                break;
+
+        default:
+                emulated = EMULATE_FAIL;
+        }
+
+        return emulated;
+}
diff --git a/arch/powerpc/kvm/booke_interrupts.S b/arch/powerpc/kvm/booke_interrupts.S
index 084ebcd7dd83..d0c6f841bbd1 100644
--- a/arch/powerpc/kvm/booke_interrupts.S
+++ b/arch/powerpc/kvm/booke_interrupts.S
@@ -86,6 +86,9 @@ KVM_HANDLER BOOKE_INTERRUPT_WATCHDOG
 KVM_HANDLER BOOKE_INTERRUPT_DTLB_MISS
 KVM_HANDLER BOOKE_INTERRUPT_ITLB_MISS
 KVM_HANDLER BOOKE_INTERRUPT_DEBUG
+KVM_HANDLER BOOKE_INTERRUPT_SPE_UNAVAIL
+KVM_HANDLER BOOKE_INTERRUPT_SPE_FP_DATA
+KVM_HANDLER BOOKE_INTERRUPT_SPE_FP_ROUND
 
 _GLOBAL(kvmppc_handler_len)
         .long kvmppc_handler_1 - kvmppc_handler_0
@@ -347,7 +350,9 @@ lightweight_exit:
         lwz     r3, VCPU_SHADOW_PID(r4)
         mtspr   SPRN_PID, r3
 
+#ifdef CONFIG_44x
         iccci   0, 0 /* XXX hack */
+#endif
 
         /* Load some guest volatiles. */
         lwz     r0, VCPU_GPR(r0)(r4)
diff --git a/arch/powerpc/kvm/e500.c b/arch/powerpc/kvm/e500.c
new file mode 100644
index 000000000000..d8067fd81cdd
--- /dev/null
+++ b/arch/powerpc/kvm/e500.c
@@ -0,0 +1,169 @@
+/*
+ * Copyright (C) 2008 Freescale Semiconductor, Inc. All rights reserved.
+ *
+ * Author: Yu Liu, <yu.liu@freescale.com>
+ *
+ * Description:
+ * This file is derived from arch/powerpc/kvm/44x.c,
+ * by Hollis Blanchard <hollisb@us.ibm.com>.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License, version 2, as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/kvm_host.h>
+#include <linux/err.h>
+
+#include <asm/reg.h>
+#include <asm/cputable.h>
+#include <asm/tlbflush.h>
+#include <asm/kvm_e500.h>
+#include <asm/kvm_ppc.h>
+
+#include "booke.h"
+#include "e500_tlb.h"
+
+void kvmppc_core_load_host_debugstate(struct kvm_vcpu *vcpu)
+{
+}
+
+void kvmppc_core_load_guest_debugstate(struct kvm_vcpu *vcpu)
+{
+}
+
+void kvmppc_core_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
+{
+        kvmppc_e500_tlb_load(vcpu, cpu);
+}
+
+void kvmppc_core_vcpu_put(struct kvm_vcpu *vcpu)
+{
+        kvmppc_e500_tlb_put(vcpu);
+}
+
+int kvmppc_core_check_processor_compat(void)
+{
+        int r;
+
+        if (strcmp(cur_cpu_spec->cpu_name, "e500v2") == 0)
+                r = 0;
+        else
+                r = -ENOTSUPP;
+
+        return r;
+}
+
+int kvmppc_core_vcpu_setup(struct kvm_vcpu *vcpu)
+{
+        struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
+
+        kvmppc_e500_tlb_setup(vcpu_e500);
+
+        /* Use the same core vertion as host's */
+        vcpu->arch.pvr = mfspr(SPRN_PVR);
+
+        return 0;
+}
+
+/* 'linear_address' is actually an encoding of AS|PID|EADDR . */
+int kvmppc_core_vcpu_translate(struct kvm_vcpu *vcpu,
+                               struct kvm_translation *tr)
+{
+        int index;
+        gva_t eaddr;
+        u8 pid;
+        u8 as;
+
+        eaddr = tr->linear_address;
+        pid = (tr->linear_address >> 32) & 0xff;
+        as = (tr->linear_address >> 40) & 0x1;
+
+        index = kvmppc_e500_tlb_search(vcpu, eaddr, pid, as);
+        if (index < 0) {
+                tr->valid = 0;
+                return 0;
+        }
+
+        tr->physical_address = kvmppc_mmu_xlate(vcpu, index, eaddr);
+        /* XXX what does "writeable" and "usermode" even mean? */
+        tr->valid = 1;
+
+        return 0;
+}
+
+struct kvm_vcpu *kvmppc_core_vcpu_create(struct kvm *kvm, unsigned int id)
+{
+        struct kvmppc_vcpu_e500 *vcpu_e500;
+        struct kvm_vcpu *vcpu;
+        int err;
+
+        vcpu_e500 = kmem_cache_zalloc(kvm_vcpu_cache, GFP_KERNEL);
+        if (!vcpu_e500) {
+                err = -ENOMEM;
+                goto out;
+        }
+
+        vcpu = &vcpu_e500->vcpu;
+        err = kvm_vcpu_init(vcpu, kvm, id);
+        if (err)
+                goto free_vcpu;
+
+        err = kvmppc_e500_tlb_init(vcpu_e500);
+        if (err)
+                goto uninit_vcpu;
+
+        return vcpu;
+
+uninit_vcpu:
+        kvm_vcpu_uninit(vcpu);
+free_vcpu:
+        kmem_cache_free(kvm_vcpu_cache, vcpu_e500);
+out:
+        return ERR_PTR(err);
+}
+
+void kvmppc_core_vcpu_free(struct kvm_vcpu *vcpu)
+{
+        struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
+
+        kvmppc_e500_tlb_uninit(vcpu_e500);
+        kvm_vcpu_uninit(vcpu);
+        kmem_cache_free(kvm_vcpu_cache, vcpu_e500);
+}
+
+static int kvmppc_e500_init(void)
+{
+        int r, i;
+        unsigned long ivor[3];
+        unsigned long max_ivor = 0;
+
+        r = kvmppc_booke_init();
+        if (r)
+                return r;
+
+        /* copy extra E500 exception handlers */
+        ivor[0] = mfspr(SPRN_IVOR32);
+        ivor[1] = mfspr(SPRN_IVOR33);
+        ivor[2] = mfspr(SPRN_IVOR34);
+        for (i = 0; i < 3; i++) {
+                if (ivor[i] > max_ivor)
+                        max_ivor = ivor[i];
+
+                memcpy((void *)kvmppc_booke_handlers + ivor[i],
+                       kvmppc_handlers_start + (i + 16) * kvmppc_handler_len,
+                       kvmppc_handler_len);
+        }
+        flush_icache_range(kvmppc_booke_handlers,
+                        kvmppc_booke_handlers + max_ivor + kvmppc_handler_len);
+
+        return kvm_init(NULL, sizeof(struct kvmppc_vcpu_e500), THIS_MODULE);
+}
+
+static void kvmppc_e500_exit(void)
+{
+        kvmppc_booke_exit();
+}
+
+module_init(kvmppc_e500_init);
+module_exit(kvmppc_e500_exit);
diff --git a/arch/powerpc/kvm/e500_emulate.c b/arch/powerpc/kvm/e500_emulate.c
new file mode 100644
index 000000000000..3f760414b9f8
--- /dev/null
+++ b/arch/powerpc/kvm/e500_emulate.c
@@ -0,0 +1,202 @@
+/*
+ * Copyright (C) 2008 Freescale Semiconductor, Inc. All rights reserved.
+ *
+ * Author: Yu Liu, <yu.liu@freescale.com>
+ *
+ * Description:
+ * This file is derived from arch/powerpc/kvm/44x_emulate.c,
+ * by Hollis Blanchard <hollisb@us.ibm.com>.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License, version 2, as
+ * published by the Free Software Foundation.
+ */
+
+#include <asm/kvm_ppc.h>
+#include <asm/disassemble.h>
+#include <asm/kvm_e500.h>
+
+#include "booke.h"
+#include "e500_tlb.h"
+
+#define XOP_TLBIVAX 786
+#define XOP_TLBSX   914
+#define XOP_TLBRE   946
+#define XOP_TLBWE   978
+
+int kvmppc_core_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu,
+                           unsigned int inst, int *advance)
+{
+        int emulated = EMULATE_DONE;
+        int ra;
+        int rb;
+
+        switch (get_op(inst)) {
+        case 31:
+                switch (get_xop(inst)) {
+
+                case XOP_TLBRE:
+                        emulated = kvmppc_e500_emul_tlbre(vcpu);
+                        break;
+
+                case XOP_TLBWE:
+                        emulated = kvmppc_e500_emul_tlbwe(vcpu);
+                        break;
+
+                case XOP_TLBSX:
+                        rb = get_rb(inst);
+                        emulated = kvmppc_e500_emul_tlbsx(vcpu,rb);
+                        break;
+
+                case XOP_TLBIVAX:
+                        ra = get_ra(inst);
+                        rb = get_rb(inst);
+                        emulated = kvmppc_e500_emul_tlbivax(vcpu, ra, rb);
+                        break;
+
+                default:
+                        emulated = EMULATE_FAIL;
+                }
+
+                break;
+
+        default:
+                emulated = EMULATE_FAIL;
+        }
+
+        if (emulated == EMULATE_FAIL)
+                emulated = kvmppc_booke_emulate_op(run, vcpu, inst, advance);
+
+        return emulated;
+}
+
+int kvmppc_core_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, int rs)
+{
+        struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
+        int emulated = EMULATE_DONE;
+
+        switch (sprn) {
+        case SPRN_PID:
+                vcpu_e500->pid[0] = vcpu->arch.shadow_pid =
+                        vcpu->arch.pid = vcpu->arch.gpr[rs];
+                break;
+        case SPRN_PID1:
+                vcpu_e500->pid[1] = vcpu->arch.gpr[rs]; break;
+        case SPRN_PID2:
+                vcpu_e500->pid[2] = vcpu->arch.gpr[rs]; break;
+        case SPRN_MAS0:
+                vcpu_e500->mas0 = vcpu->arch.gpr[rs]; break;
+        case SPRN_MAS1:
+                vcpu_e500->mas1 = vcpu->arch.gpr[rs]; break;
+        case SPRN_MAS2:
+                vcpu_e500->mas2 = vcpu->arch.gpr[rs]; break;
+        case SPRN_MAS3:
+                vcpu_e500->mas3 = vcpu->arch.gpr[rs]; break;
+        case SPRN_MAS4:
+                vcpu_e500->mas4 = vcpu->arch.gpr[rs]; break;
+        case SPRN_MAS6:
+                vcpu_e500->mas6 = vcpu->arch.gpr[rs]; break;
+        case SPRN_MAS7:
+                vcpu_e500->mas7 = vcpu->arch.gpr[rs]; break;
+        case SPRN_L1CSR1:
+                vcpu_e500->l1csr1 = vcpu->arch.gpr[rs]; break;
+        case SPRN_HID0:
+                vcpu_e500->hid0 = vcpu->arch.gpr[rs]; break;
+        case SPRN_HID1:
+                vcpu_e500->hid1 = vcpu->arch.gpr[rs]; break;
+
+        case SPRN_MMUCSR0:
+                emulated = kvmppc_e500_emul_mt_mmucsr0(vcpu_e500,
+                                vcpu->arch.gpr[rs]);
+                break;
+
+        /* extra exceptions */
+        case SPRN_IVOR32:
+                vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_UNAVAIL] = vcpu->arch.gpr[rs];
+                break;
+        case SPRN_IVOR33:
+                vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_DATA] = vcpu->arch.gpr[rs];
+                break;
+        case SPRN_IVOR34:
+                vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_ROUND] = vcpu->arch.gpr[rs];
+                break;
+        case SPRN_IVOR35:
+                vcpu->arch.ivor[BOOKE_IRQPRIO_PERFORMANCE_MONITOR] = vcpu->arch.gpr[rs];
+                break;
+
+        default:
+                emulated = kvmppc_booke_emulate_mtspr(vcpu, sprn, rs);
+        }
+
+        return emulated;
+}
+
+int kvmppc_core_emulate_mfspr(struct kvm_vcpu *vcpu, int sprn, int rt)
+{
+        struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
+        int emulated = EMULATE_DONE;
+
+        switch (sprn) {
+        case SPRN_PID:
+                vcpu->arch.gpr[rt] = vcpu_e500->pid[0]; break;
+        case SPRN_PID1:
+                vcpu->arch.gpr[rt] = vcpu_e500->pid[1]; break;
+        case SPRN_PID2:
+                vcpu->arch.gpr[rt] = vcpu_e500->pid[2]; break;
+        case SPRN_MAS0:
+                vcpu->arch.gpr[rt] = vcpu_e500->mas0; break;
+        case SPRN_MAS1:
+                vcpu->arch.gpr[rt] = vcpu_e500->mas1; break;
+        case SPRN_MAS2:
+                vcpu->arch.gpr[rt] = vcpu_e500->mas2; break;
+        case SPRN_MAS3:
+                vcpu->arch.gpr[rt] = vcpu_e500->mas3; break;
+        case SPRN_MAS4:
+                vcpu->arch.gpr[rt] = vcpu_e500->mas4; break;
+        case SPRN_MAS6:
+                vcpu->arch.gpr[rt] = vcpu_e500->mas6; break;
+        case SPRN_MAS7:
+                vcpu->arch.gpr[rt] = vcpu_e500->mas7; break;
+
+        case SPRN_TLB0CFG:
+                vcpu->arch.gpr[rt] = mfspr(SPRN_TLB0CFG);
+                vcpu->arch.gpr[rt] &= ~0xfffUL;
+                vcpu->arch.gpr[rt] |= vcpu_e500->guest_tlb_size[0];
+                break;
+
+        case SPRN_TLB1CFG:
+                vcpu->arch.gpr[rt] = mfspr(SPRN_TLB1CFG);
+                vcpu->arch.gpr[rt] &= ~0xfffUL;
+                vcpu->arch.gpr[rt] |= vcpu_e500->guest_tlb_size[1];
+                break;
+
+        case SPRN_L1CSR1:
+                vcpu->arch.gpr[rt] = vcpu_e500->l1csr1; break;
+        case SPRN_HID0:
+                vcpu->arch.gpr[rt] = vcpu_e500->hid0; break;
+        case SPRN_HID1:
+                vcpu->arch.gpr[rt] = vcpu_e500->hid1; break;
+
+        case SPRN_MMUCSR0:
+                vcpu->arch.gpr[rt] = 0; break;
+
+        /* extra exceptions */
+        case SPRN_IVOR32:
+                vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_UNAVAIL];
+                break;
+        case SPRN_IVOR33:
+                vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_DATA];
+                break;
+        case SPRN_IVOR34:
+                vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_ROUND];
+                break;
+        case SPRN_IVOR35:
+                vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_PERFORMANCE_MONITOR];
+                break;
+        default:
+                emulated = kvmppc_booke_emulate_mfspr(vcpu, sprn, rt);
+        }
+
+        return emulated;
+}
+
diff --git a/arch/powerpc/kvm/e500_tlb.c b/arch/powerpc/kvm/e500_tlb.c
new file mode 100644
index 000000000000..0e773fc2d5e4
--- /dev/null
+++ b/arch/powerpc/kvm/e500_tlb.c
@@ -0,0 +1,757 @@
+/*
+ * Copyright (C) 2008 Freescale Semiconductor, Inc. All rights reserved.
+ *
+ * Author: Yu Liu, yu.liu@freescale.com
+ *
+ * Description:
+ * This file is based on arch/powerpc/kvm/44x_tlb.c,
+ * by Hollis Blanchard <hollisb@us.ibm.com>.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License, version 2, as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/types.h>
+#include <linux/string.h>
+#include <linux/kvm.h>
+#include <linux/kvm_host.h>
+#include <linux/highmem.h>
+#include <asm/kvm_ppc.h>
+#include <asm/kvm_e500.h>
+
+#include "../mm/mmu_decl.h"
+#include "e500_tlb.h"
+
+#define to_htlb1_esel(esel) (tlb1_entry_num - (esel) - 1)
+
+static unsigned int tlb1_entry_num;
+
+void kvmppc_dump_tlbs(struct kvm_vcpu *vcpu)
+{
+        struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
+        struct tlbe *tlbe;
+        int i, tlbsel;
+
+        printk("| %8s | %8s | %8s | %8s | %8s |\n",
+                        "nr", "mas1", "mas2", "mas3", "mas7");
+
+        for (tlbsel = 0; tlbsel < 2; tlbsel++) {
+                printk("Guest TLB%d:\n", tlbsel);
+                for (i = 0; i < vcpu_e500->guest_tlb_size[tlbsel]; i++) {
+                        tlbe = &vcpu_e500->guest_tlb[tlbsel][i];
+                        if (tlbe->mas1 & MAS1_VALID)
+                                printk(" G[%d][%3d] |  %08X | %08X | %08X | %08X |\n",
+                                        tlbsel, i, tlbe->mas1, tlbe->mas2,
+                                        tlbe->mas3, tlbe->mas7);
+                }
+        }
+
+        for (tlbsel = 0; tlbsel < 2; tlbsel++) {
+                printk("Shadow TLB%d:\n", tlbsel);
+                for (i = 0; i < vcpu_e500->shadow_tlb_size[tlbsel]; i++) {
+                        tlbe = &vcpu_e500->shadow_tlb[tlbsel][i];
+                        if (tlbe->mas1 & MAS1_VALID)
+                                printk(" S[%d][%3d] |  %08X | %08X | %08X | %08X |\n",
+                                        tlbsel, i, tlbe->mas1, tlbe->mas2,
+                                        tlbe->mas3, tlbe->mas7);
+                }
+        }
+}
+
+static inline unsigned int tlb0_get_next_victim(
+                struct kvmppc_vcpu_e500 *vcpu_e500)
+{
+        unsigned int victim;
+
+        victim = vcpu_e500->guest_tlb_nv[0]++;
+        if (unlikely(vcpu_e500->guest_tlb_nv[0] >= KVM_E500_TLB0_WAY_NUM))
+                vcpu_e500->guest_tlb_nv[0] = 0;
+
+        return victim;
+}
+
+static inline unsigned int tlb1_max_shadow_size(void)
+{
+        return tlb1_entry_num - tlbcam_index;
+}
+
+static inline int tlbe_is_writable(struct tlbe *tlbe)
+{
+        return tlbe->mas3 & (MAS3_SW|MAS3_UW);
+}
+
+static inline u32 e500_shadow_mas3_attrib(u32 mas3, int usermode)
+{
+        /* Mask off reserved bits. */
+        mas3 &= MAS3_ATTRIB_MASK;
+
+        if (!usermode) {
+                /* Guest is in supervisor mode,
+                 * so we need to translate guest
+                 * supervisor permissions into user permissions. */
+                mas3 &= ~E500_TLB_USER_PERM_MASK;
+                mas3 |= (mas3 & E500_TLB_SUPER_PERM_MASK) << 1;
+        }
+
+        return mas3 | E500_TLB_SUPER_PERM_MASK;
+}
+
+static inline u32 e500_shadow_mas2_attrib(u32 mas2, int usermode)
+{
+#ifdef CONFIG_SMP
+        return (mas2 & MAS2_ATTRIB_MASK) | MAS2_M;
+#else
+        return mas2 & MAS2_ATTRIB_MASK;
+#endif
+}
+
+/*
+ * writing shadow tlb entry to host TLB
+ */
+static inline void __write_host_tlbe(struct tlbe *stlbe)
+{
+        mtspr(SPRN_MAS1, stlbe->mas1);
+        mtspr(SPRN_MAS2, stlbe->mas2);
+        mtspr(SPRN_MAS3, stlbe->mas3);
+        mtspr(SPRN_MAS7, stlbe->mas7);
+        __asm__ __volatile__ ("tlbwe\n" : : );
+}
+
+static inline void write_host_tlbe(struct kvmppc_vcpu_e500 *vcpu_e500,
+                int tlbsel, int esel)
+{
+        struct tlbe *stlbe = &vcpu_e500->shadow_tlb[tlbsel][esel];
+
+        local_irq_disable();
+        if (tlbsel == 0) {
+                __write_host_tlbe(stlbe);
+        } else {
+                unsigned register mas0;
+
+                mas0 = mfspr(SPRN_MAS0);
+
+                mtspr(SPRN_MAS0, MAS0_TLBSEL(1) | MAS0_ESEL(to_htlb1_esel(esel)));
+                __write_host_tlbe(stlbe);
+
+                mtspr(SPRN_MAS0, mas0);
+        }
+        local_irq_enable();
+}
+
+void kvmppc_e500_tlb_load(struct kvm_vcpu *vcpu, int cpu)
+{
+        struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
+        int i;
+        unsigned register mas0;
+
+        /* Load all valid TLB1 entries to reduce guest tlb miss fault */
+        local_irq_disable();
+        mas0 = mfspr(SPRN_MAS0);
+        for (i = 0; i < tlb1_max_shadow_size(); i++) {
+                struct tlbe *stlbe = &vcpu_e500->shadow_tlb[1][i];
+
+                if (get_tlb_v(stlbe)) {
+                        mtspr(SPRN_MAS0, MAS0_TLBSEL(1)
+                                        | MAS0_ESEL(to_htlb1_esel(i)));
+                        __write_host_tlbe(stlbe);
+                }
+        }
+        mtspr(SPRN_MAS0, mas0);
+        local_irq_enable();
+}
+
+void kvmppc_e500_tlb_put(struct kvm_vcpu *vcpu)
+{
+        _tlbil_all();
+}
+
+/* Search the guest TLB for a matching entry. */
+static int kvmppc_e500_tlb_index(struct kvmppc_vcpu_e500 *vcpu_e500,
+                gva_t eaddr, int tlbsel, unsigned int pid, int as)
+{
+        int i;
+
+        /* XXX Replace loop with fancy data structures. */
+        for (i = 0; i < vcpu_e500->guest_tlb_size[tlbsel]; i++) {
+                struct tlbe *tlbe = &vcpu_e500->guest_tlb[tlbsel][i];
+                unsigned int tid;
+
+                if (eaddr < get_tlb_eaddr(tlbe))
+                        continue;
+
+                if (eaddr > get_tlb_end(tlbe))
+                        continue;
+
+                tid = get_tlb_tid(tlbe);
+                if (tid && (tid != pid))
+                        continue;
+
+                if (!get_tlb_v(tlbe))
+                        continue;
+
+                if (get_tlb_ts(tlbe) != as && as != -1)
+                        continue;
+
+                return i;
+        }
+
+        return -1;
+}
+
+static void kvmppc_e500_shadow_release(struct kvmppc_vcpu_e500 *vcpu_e500,
+                int tlbsel, int esel)
+{
+        struct tlbe *stlbe = &vcpu_e500->shadow_tlb[tlbsel][esel];
+        struct page *page = vcpu_e500->shadow_pages[tlbsel][esel];
+
+        if (page) {
+                vcpu_e500->shadow_pages[tlbsel][esel] = NULL;
+
+                if (get_tlb_v(stlbe)) {
+                        if (tlbe_is_writable(stlbe))
+                                kvm_release_page_dirty(page);
+                        else
+                                kvm_release_page_clean(page);
+                }
+        }
+}
+
+static void kvmppc_e500_stlbe_invalidate(struct kvmppc_vcpu_e500 *vcpu_e500,
+                int tlbsel, int esel)
+{
+        struct tlbe *stlbe = &vcpu_e500->shadow_tlb[tlbsel][esel];
+
+        kvmppc_e500_shadow_release(vcpu_e500, tlbsel, esel);
+        stlbe->mas1 = 0;
+        KVMTRACE_5D(STLB_INVAL, &vcpu_e500->vcpu, index_of(tlbsel, esel),
+                        stlbe->mas1, stlbe->mas2, stlbe->mas3, stlbe->mas7,
+                        handler);
+}
+
+static void kvmppc_e500_tlb1_invalidate(struct kvmppc_vcpu_e500 *vcpu_e500,
+                gva_t eaddr, gva_t eend, u32 tid)
+{
+        unsigned int pid = tid & 0xff;
+        unsigned int i;
+
+        /* XXX Replace loop with fancy data structures. */
+        for (i = 0; i < vcpu_e500->guest_tlb_size[1]; i++) {
+                struct tlbe *stlbe = &vcpu_e500->shadow_tlb[1][i];
+                unsigned int tid;
+
+                if (!get_tlb_v(stlbe))
+                        continue;
+
+                if (eend < get_tlb_eaddr(stlbe))
+                        continue;
+
+                if (eaddr > get_tlb_end(stlbe))
+                        continue;
+
+                tid = get_tlb_tid(stlbe);
+                if (tid && (tid != pid))
+                        continue;
+
+                kvmppc_e500_stlbe_invalidate(vcpu_e500, 1, i);
+                write_host_tlbe(vcpu_e500, 1, i);
+        }
+}
+
+static inline void kvmppc_e500_deliver_tlb_miss(struct kvm_vcpu *vcpu,
+                unsigned int eaddr, int as)
+{
+        struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
+        unsigned int victim, pidsel, tsized;
+        int tlbsel;
+
+        /* since we only have two TLBs, only lower bit is used. */
+        tlbsel = (vcpu_e500->mas4 >> 28) & 0x1;
+        victim = (tlbsel == 0) ? tlb0_get_next_victim(vcpu_e500) : 0;
+        pidsel = (vcpu_e500->mas4 >> 16) & 0xf;
+        tsized = (vcpu_e500->mas4 >> 8) & 0xf;
+
+        vcpu_e500->mas0 = MAS0_TLBSEL(tlbsel) | MAS0_ESEL(victim)
+                | MAS0_NV(vcpu_e500->guest_tlb_nv[tlbsel]);
+        vcpu_e500->mas1 = MAS1_VALID | (as ? MAS1_TS : 0)
+                | MAS1_TID(vcpu_e500->pid[pidsel])
+                | MAS1_TSIZE(tsized);
+        vcpu_e500->mas2 = (eaddr & MAS2_EPN)
+                | (vcpu_e500->mas4 & MAS2_ATTRIB_MASK);
+        vcpu_e500->mas3 &= MAS3_U0 | MAS3_U1 | MAS3_U2 | MAS3_U3;
+        vcpu_e500->mas6 = (vcpu_e500->mas6 & MAS6_SPID1)
+                | (get_cur_pid(vcpu) << 16)
+                | (as ? MAS6_SAS : 0);
+        vcpu_e500->mas7 = 0;
+}
+
+static inline void kvmppc_e500_shadow_map(struct kvmppc_vcpu_e500 *vcpu_e500,
+        u64 gvaddr, gfn_t gfn, struct tlbe *gtlbe, int tlbsel, int esel)
+{
+        struct page *new_page;
+        struct tlbe *stlbe;
+        hpa_t hpaddr;
+
+        stlbe = &vcpu_e500->shadow_tlb[tlbsel][esel];
+
+        /* Get reference to new page. */
+        new_page = gfn_to_page(vcpu_e500->vcpu.kvm, gfn);
+        if (is_error_page(new_page)) {
+                printk(KERN_ERR "Couldn't get guest page for gfn %lx!\n", gfn);
+                kvm_release_page_clean(new_page);
+                return;
+        }
+        hpaddr = page_to_phys(new_page);
+
+        /* Drop reference to old page. */
+        kvmppc_e500_shadow_release(vcpu_e500, tlbsel, esel);
+
+        vcpu_e500->shadow_pages[tlbsel][esel] = new_page;
+
+        /* Force TS=1 IPROT=0 TSIZE=4KB for all guest mappings. */
+        stlbe->mas1 = MAS1_TSIZE(BOOKE_PAGESZ_4K)
+                | MAS1_TID(get_tlb_tid(gtlbe)) | MAS1_TS | MAS1_VALID;
+        stlbe->mas2 = (gvaddr & MAS2_EPN)
+                | e500_shadow_mas2_attrib(gtlbe->mas2,
+                                vcpu_e500->vcpu.arch.msr & MSR_PR);
+        stlbe->mas3 = (hpaddr & MAS3_RPN)
+                | e500_shadow_mas3_attrib(gtlbe->mas3,
+                                vcpu_e500->vcpu.arch.msr & MSR_PR);
+        stlbe->mas7 = (hpaddr >> 32) & MAS7_RPN;
+
+        KVMTRACE_5D(STLB_WRITE, &vcpu_e500->vcpu, index_of(tlbsel, esel),
+                        stlbe->mas1, stlbe->mas2, stlbe->mas3, stlbe->mas7,
+                        handler);
+}
+
+/* XXX only map the one-one case, for now use TLB0 */
+static int kvmppc_e500_stlbe_map(struct kvmppc_vcpu_e500 *vcpu_e500,
+                int tlbsel, int esel)
+{
+        struct tlbe *gtlbe;
+
+        gtlbe = &vcpu_e500->guest_tlb[tlbsel][esel];
+
+        kvmppc_e500_shadow_map(vcpu_e500, get_tlb_eaddr(gtlbe),
+                        get_tlb_raddr(gtlbe) >> PAGE_SHIFT,
+                        gtlbe, tlbsel, esel);
+
+        return esel;
+}
+
+/* Caller must ensure that the specified guest TLB entry is safe to insert into
+ * the shadow TLB. */
+/* XXX for both one-one and one-to-many , for now use TLB1 */
+static int kvmppc_e500_tlb1_map(struct kvmppc_vcpu_e500 *vcpu_e500,
+                u64 gvaddr, gfn_t gfn, struct tlbe *gtlbe)
+{
+        unsigned int victim;
+
+        victim = vcpu_e500->guest_tlb_nv[1]++;
+
+        if (unlikely(vcpu_e500->guest_tlb_nv[1] >= tlb1_max_shadow_size()))
+                vcpu_e500->guest_tlb_nv[1] = 0;
+
+        kvmppc_e500_shadow_map(vcpu_e500, gvaddr, gfn, gtlbe, 1, victim);
+
+        return victim;
+}
+
+/* Invalidate all guest kernel mappings when enter usermode,
+ * so that when they fault back in they will get the
+ * proper permission bits. */
+void kvmppc_mmu_priv_switch(struct kvm_vcpu *vcpu, int usermode)
+{
+        if (usermode) {
+                struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
+                int i;
+
+                /* XXX Replace loop with fancy data structures. */
+                for (i = 0; i < tlb1_max_shadow_size(); i++)
+                        kvmppc_e500_stlbe_invalidate(vcpu_e500, 1, i);
+
+                _tlbil_all();
+        }
+}
+
+static int kvmppc_e500_gtlbe_invalidate(struct kvmppc_vcpu_e500 *vcpu_e500,
+                int tlbsel, int esel)
+{
+        struct tlbe *gtlbe = &vcpu_e500->guest_tlb[tlbsel][esel];
+
+        if (unlikely(get_tlb_iprot(gtlbe)))
+                return -1;
+
+        if (tlbsel == 1) {
+                kvmppc_e500_tlb1_invalidate(vcpu_e500, get_tlb_eaddr(gtlbe),
+                                get_tlb_end(gtlbe),
+                                get_tlb_tid(gtlbe));
+        } else {
+                kvmppc_e500_stlbe_invalidate(vcpu_e500, tlbsel, esel);
+        }
+
+        gtlbe->mas1 = 0;
+
+        return 0;
+}
+
+int kvmppc_e500_emul_mt_mmucsr0(struct kvmppc_vcpu_e500 *vcpu_e500, ulong value)
+{
+        int esel;
+
+        if (value & MMUCSR0_TLB0FI)
+                for (esel = 0; esel < vcpu_e500->guest_tlb_size[0]; esel++)
+                        kvmppc_e500_gtlbe_invalidate(vcpu_e500, 0, esel);
+        if (value & MMUCSR0_TLB1FI)
+                for (esel = 0; esel < vcpu_e500->guest_tlb_size[1]; esel++)
+                        kvmppc_e500_gtlbe_invalidate(vcpu_e500, 1, esel);
+
+        _tlbil_all();
+
+        return EMULATE_DONE;
+}
+
+int kvmppc_e500_emul_tlbivax(struct kvm_vcpu *vcpu, int ra, int rb)
+{
+        struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
+        unsigned int ia;
+        int esel, tlbsel;
+        gva_t ea;
+
+        ea = ((ra) ? vcpu->arch.gpr[ra] : 0) + vcpu->arch.gpr[rb];
+
+        ia = (ea >> 2) & 0x1;
+
+        /* since we only have two TLBs, only lower bit is used. */
+        tlbsel = (ea >> 3) & 0x1;
+
+        if (ia) {
+                /* invalidate all entries */
+                for (esel = 0; esel < vcpu_e500->guest_tlb_size[tlbsel]; esel++)
+                        kvmppc_e500_gtlbe_invalidate(vcpu_e500, tlbsel, esel);
+        } else {
+                ea &= 0xfffff000;
+                esel = kvmppc_e500_tlb_index(vcpu_e500, ea, tlbsel,
+                                get_cur_pid(vcpu), -1);
+                if (esel >= 0)
+                        kvmppc_e500_gtlbe_invalidate(vcpu_e500, tlbsel, esel);
+        }
+
+        _tlbil_all();
+
+        return EMULATE_DONE;
+}
+
+int kvmppc_e500_emul_tlbre(struct kvm_vcpu *vcpu)
+{
+        struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
+        int tlbsel, esel;
+        struct tlbe *gtlbe;
+
+        tlbsel = get_tlb_tlbsel(vcpu_e500);
+        esel = get_tlb_esel(vcpu_e500, tlbsel);
+
+        gtlbe = &vcpu_e500->guest_tlb[tlbsel][esel];
+        vcpu_e500->mas0 &= ~MAS0_NV(~0);
+        vcpu_e500->mas0 |= MAS0_NV(vcpu_e500->guest_tlb_nv[tlbsel]);
+        vcpu_e500->mas1 = gtlbe->mas1;
+        vcpu_e500->mas2 = gtlbe->mas2;
+        vcpu_e500->mas3 = gtlbe->mas3;
+        vcpu_e500->mas7 = gtlbe->mas7;
+
+        return EMULATE_DONE;
+}
+
+int kvmppc_e500_emul_tlbsx(struct kvm_vcpu *vcpu, int rb)
+{
+        struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
+        int as = !!get_cur_sas(vcpu_e500);
+        unsigned int pid = get_cur_spid(vcpu_e500);
+        int esel, tlbsel;
+        struct tlbe *gtlbe = NULL;
+        gva_t ea;
+
+        ea = vcpu->arch.gpr[rb];
+
+        for (tlbsel = 0; tlbsel < 2; tlbsel++) {
+                esel = kvmppc_e500_tlb_index(vcpu_e500, ea, tlbsel, pid, as);
+                if (esel >= 0) {
+                        gtlbe = &vcpu_e500->guest_tlb[tlbsel][esel];
+                        break;
+                }
+        }
+
+        if (gtlbe) {
+                vcpu_e500->mas0 = MAS0_TLBSEL(tlbsel) | MAS0_ESEL(esel)
+                        | MAS0_NV(vcpu_e500->guest_tlb_nv[tlbsel]);
+                vcpu_e500->mas1 = gtlbe->mas1;
+                vcpu_e500->mas2 = gtlbe->mas2;
+                vcpu_e500->mas3 = gtlbe->mas3;
+                vcpu_e500->mas7 = gtlbe->mas7;
+        } else {
+                int victim;
+
+                /* since we only have two TLBs, only lower bit is used. */
+                tlbsel = vcpu_e500->mas4 >> 28 & 0x1;
+                victim = (tlbsel == 0) ? tlb0_get_next_victim(vcpu_e500) : 0;
+
+                vcpu_e500->mas0 = MAS0_TLBSEL(tlbsel) | MAS0_ESEL(victim)
+                        | MAS0_NV(vcpu_e500->guest_tlb_nv[tlbsel]);
+                vcpu_e500->mas1 = (vcpu_e500->mas6 & MAS6_SPID0)
+                        | (vcpu_e500->mas6 & (MAS6_SAS ? MAS1_TS : 0))
+                        | (vcpu_e500->mas4 & MAS4_TSIZED(~0));
+                vcpu_e500->mas2 &= MAS2_EPN;
+                vcpu_e500->mas2 |= vcpu_e500->mas4 & MAS2_ATTRIB_MASK;
+                vcpu_e500->mas3 &= MAS3_U0 | MAS3_U1 | MAS3_U2 | MAS3_U3;
+                vcpu_e500->mas7 = 0;
+        }
+
+        return EMULATE_DONE;
+}
+
+int kvmppc_e500_emul_tlbwe(struct kvm_vcpu *vcpu)
+{
+        struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
+        u64 eaddr;
+        u64 raddr;
+        u32 tid;
+        struct tlbe *gtlbe;
+        int tlbsel, esel, stlbsel, sesel;
+
+        tlbsel = get_tlb_tlbsel(vcpu_e500);
+        esel = get_tlb_esel(vcpu_e500, tlbsel);
+
+        gtlbe = &vcpu_e500->guest_tlb[tlbsel][esel];
+
+        if (get_tlb_v(gtlbe) && tlbsel == 1) {
+                eaddr = get_tlb_eaddr(gtlbe);
+                tid = get_tlb_tid(gtlbe);
+                kvmppc_e500_tlb1_invalidate(vcpu_e500, eaddr,
+                                get_tlb_end(gtlbe), tid);
+        }
+
+        gtlbe->mas1 = vcpu_e500->mas1;
+        gtlbe->mas2 = vcpu_e500->mas2;
+        gtlbe->mas3 = vcpu_e500->mas3;
+        gtlbe->mas7 = vcpu_e500->mas7;
+
+        KVMTRACE_5D(GTLB_WRITE, vcpu, vcpu_e500->mas0,
+                        gtlbe->mas1, gtlbe->mas2, gtlbe->mas3, gtlbe->mas7,
+                        handler);
+
+        /* Invalidate shadow mappings for the about-to-be-clobbered TLBE. */
+        if (tlbe_is_host_safe(vcpu, gtlbe)) {
+                switch (tlbsel) {
+                case 0:
+                        /* TLB0 */
+                        gtlbe->mas1 &= ~MAS1_TSIZE(~0);
+                        gtlbe->mas1 |= MAS1_TSIZE(BOOKE_PAGESZ_4K);
+
+                        stlbsel = 0;
+                        sesel = kvmppc_e500_stlbe_map(vcpu_e500, 0, esel);
+
+                        break;
+
+                case 1:
+                        /* TLB1 */
+                        eaddr = get_tlb_eaddr(gtlbe);
+                        raddr = get_tlb_raddr(gtlbe);
+
+                        /* Create a 4KB mapping on the host.
+                         * If the guest wanted a large page,
+                         * only the first 4KB is mapped here and the rest
+                         * are mapped on the fly. */
+                        stlbsel = 1;
+                        sesel = kvmppc_e500_tlb1_map(vcpu_e500, eaddr,
+                                        raddr >> PAGE_SHIFT, gtlbe);
+                        break;
+
+                default:
+                        BUG();
+                }
+                write_host_tlbe(vcpu_e500, stlbsel, sesel);
+        }
+
+        return EMULATE_DONE;
+}
+
+int kvmppc_mmu_itlb_index(struct kvm_vcpu *vcpu, gva_t eaddr)
+{
+        unsigned int as = !!(vcpu->arch.msr & MSR_IS);
+
+        return kvmppc_e500_tlb_search(vcpu, eaddr, get_cur_pid(vcpu), as);
+}
+
+int kvmppc_mmu_dtlb_index(struct kvm_vcpu *vcpu, gva_t eaddr)
+{
+        unsigned int as = !!(vcpu->arch.msr & MSR_DS);
+
+        return kvmppc_e500_tlb_search(vcpu, eaddr, get_cur_pid(vcpu), as);
+}
+
+void kvmppc_mmu_itlb_miss(struct kvm_vcpu *vcpu)
+{
+        unsigned int as = !!(vcpu->arch.msr & MSR_IS);
+
+        kvmppc_e500_deliver_tlb_miss(vcpu, vcpu->arch.pc, as);
+}
+
+void kvmppc_mmu_dtlb_miss(struct kvm_vcpu *vcpu)
+{
+        unsigned int as = !!(vcpu->arch.msr & MSR_DS);
+
+        kvmppc_e500_deliver_tlb_miss(vcpu, vcpu->arch.fault_dear, as);
+}
+
+gpa_t kvmppc_mmu_xlate(struct kvm_vcpu *vcpu, unsigned int index,
+                        gva_t eaddr)
+{
+        struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
+        struct tlbe *gtlbe =
+                &vcpu_e500->guest_tlb[tlbsel_of(index)][esel_of(index)];
+        u64 pgmask = get_tlb_bytes(gtlbe) - 1;
+
+        return get_tlb_raddr(gtlbe) | (eaddr & pgmask);
+}
+
+void kvmppc_mmu_destroy(struct kvm_vcpu *vcpu)
+{
+        struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
+        int tlbsel, i;
+
+        for (tlbsel = 0; tlbsel < 2; tlbsel++)
+                for (i = 0; i < vcpu_e500->guest_tlb_size[tlbsel]; i++)
+                        kvmppc_e500_shadow_release(vcpu_e500, tlbsel, i);
+
+        /* discard all guest mapping */
+        _tlbil_all();
+}
+
+void kvmppc_mmu_map(struct kvm_vcpu *vcpu, u64 eaddr, gpa_t gpaddr,
+                        unsigned int index)
+{
+        struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
+        int tlbsel = tlbsel_of(index);
+        int esel = esel_of(index);
+        int stlbsel, sesel;
+
+        switch (tlbsel) {
+        case 0:
+                stlbsel = 0;
+                sesel = esel;
+                break;
+
+        case 1: {
+                gfn_t gfn = gpaddr >> PAGE_SHIFT;
+                struct tlbe *gtlbe
+                        = &vcpu_e500->guest_tlb[tlbsel][esel];
+
+                stlbsel = 1;
+                sesel = kvmppc_e500_tlb1_map(vcpu_e500, eaddr, gfn, gtlbe);
+                break;
+        }
+
+        default:
+                BUG();
+                break;
+        }
+        write_host_tlbe(vcpu_e500, stlbsel, sesel);
+}
+
+int kvmppc_e500_tlb_search(struct kvm_vcpu *vcpu,
+                                gva_t eaddr, unsigned int pid, int as)
+{
+        struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
+        int esel, tlbsel;
+
+        for (tlbsel = 0; tlbsel < 2; tlbsel++) {
+                esel = kvmppc_e500_tlb_index(vcpu_e500, eaddr, tlbsel, pid, as);
+                if (esel >= 0)
+                        return index_of(tlbsel, esel);
+        }
+
+        return -1;
+}
+
+void kvmppc_e500_tlb_setup(struct kvmppc_vcpu_e500 *vcpu_e500)
+{
+        struct tlbe *tlbe;
+
+        /* Insert large initial mapping for guest. */
+        tlbe = &vcpu_e500->guest_tlb[1][0];
+        tlbe->mas1 = MAS1_VALID | MAS1_TSIZE(BOOKE_PAGESZ_256M);
+        tlbe->mas2 = 0;
+        tlbe->mas3 = E500_TLB_SUPER_PERM_MASK;
+        tlbe->mas7 = 0;
+
+        /* 4K map for serial output. Used by kernel wrapper. */
+        tlbe = &vcpu_e500->guest_tlb[1][1];
+        tlbe->mas1 = MAS1_VALID | MAS1_TSIZE(BOOKE_PAGESZ_4K);
+        tlbe->mas2 = (0xe0004500 & 0xFFFFF000) | MAS2_I | MAS2_G;
+        tlbe->mas3 = (0xe0004500 & 0xFFFFF000) | E500_TLB_SUPER_PERM_MASK;
+        tlbe->mas7 = 0;
+}
+
+int kvmppc_e500_tlb_init(struct kvmppc_vcpu_e500 *vcpu_e500)
+{
+        tlb1_entry_num = mfspr(SPRN_TLB1CFG) & 0xFFF;
+
+        vcpu_e500->guest_tlb_size[0] = KVM_E500_TLB0_SIZE;
+        vcpu_e500->guest_tlb[0] =
+                kzalloc(sizeof(struct tlbe) * KVM_E500_TLB0_SIZE, GFP_KERNEL);
+        if (vcpu_e500->guest_tlb[0] == NULL)
+                goto err_out;
+
+        vcpu_e500->shadow_tlb_size[0] = KVM_E500_TLB0_SIZE;
+        vcpu_e500->shadow_tlb[0] =
+                kzalloc(sizeof(struct tlbe) * KVM_E500_TLB0_SIZE, GFP_KERNEL);
+        if (vcpu_e500->shadow_tlb[0] == NULL)
+                goto err_out_guest0;
+
+        vcpu_e500->guest_tlb_size[1] = KVM_E500_TLB1_SIZE;
+        vcpu_e500->guest_tlb[1] =
+                kzalloc(sizeof(struct tlbe) * KVM_E500_TLB1_SIZE, GFP_KERNEL);
+        if (vcpu_e500->guest_tlb[1] == NULL)
+                goto err_out_shadow0;
+
+        vcpu_e500->shadow_tlb_size[1] = tlb1_entry_num;
+        vcpu_e500->shadow_tlb[1] =
+                kzalloc(sizeof(struct tlbe) * tlb1_entry_num, GFP_KERNEL);
+        if (vcpu_e500->shadow_tlb[1] == NULL)
+                goto err_out_guest1;
+
+        vcpu_e500->shadow_pages[0] = (struct page **)
+                kzalloc(sizeof(struct page *) * KVM_E500_TLB0_SIZE, GFP_KERNEL);
+        if (vcpu_e500->shadow_pages[0] == NULL)
+                goto err_out_shadow1;
+
+        vcpu_e500->shadow_pages[1] = (struct page **)
+                kzalloc(sizeof(struct page *) * tlb1_entry_num, GFP_KERNEL);
+        if (vcpu_e500->shadow_pages[1] == NULL)
+                goto err_out_page0;
+
+        return 0;
+
+err_out_page0:
+        kfree(vcpu_e500->shadow_pages[0]);
+err_out_shadow1:
+        kfree(vcpu_e500->shadow_tlb[1]);
+err_out_guest1:
+        kfree(vcpu_e500->guest_tlb[1]);
+err_out_shadow0:
+        kfree(vcpu_e500->shadow_tlb[0]);
+err_out_guest0:
+        kfree(vcpu_e500->guest_tlb[0]);
+err_out:
+        return -1;
+}
+
+void kvmppc_e500_tlb_uninit(struct kvmppc_vcpu_e500 *vcpu_e500)
+{
+        kfree(vcpu_e500->shadow_pages[1]);
+        kfree(vcpu_e500->shadow_pages[0]);
+        kfree(vcpu_e500->shadow_tlb[1]);
+        kfree(vcpu_e500->guest_tlb[1]);
+        kfree(vcpu_e500->shadow_tlb[0]);
+        kfree(vcpu_e500->guest_tlb[0]);
+}
diff --git a/arch/powerpc/kvm/e500_tlb.h b/arch/powerpc/kvm/e500_tlb.h
new file mode 100644
index 000000000000..45b064b76906
--- /dev/null
+++ b/arch/powerpc/kvm/e500_tlb.h
@@ -0,0 +1,185 @@
+/*
+ * Copyright (C) 2008 Freescale Semiconductor, Inc. All rights reserved.
+ *
+ * Author: Yu Liu, yu.liu@freescale.com
+ *
+ * Description:
+ * This file is based on arch/powerpc/kvm/44x_tlb.h,
+ * by Hollis Blanchard <hollisb@us.ibm.com>.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License, version 2, as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __KVM_E500_TLB_H__
+#define __KVM_E500_TLB_H__
+
+#include <linux/kvm_host.h>
+#include <asm/mmu-fsl-booke.h>
+#include <asm/tlb.h>
+#include <asm/kvm_e500.h>
+
+#define KVM_E500_TLB0_WAY_SIZE_BIT      7       /* Fixed */
+#define KVM_E500_TLB0_WAY_SIZE          (1UL << KVM_E500_TLB0_WAY_SIZE_BIT)
+#define KVM_E500_TLB0_WAY_SIZE_MASK     (KVM_E500_TLB0_WAY_SIZE - 1)
+
+#define KVM_E500_TLB0_WAY_NUM_BIT       1       /* No greater than 7 */
+#define KVM_E500_TLB0_WAY_NUM           (1UL << KVM_E500_TLB0_WAY_NUM_BIT)
+#define KVM_E500_TLB0_WAY_NUM_MASK      (KVM_E500_TLB0_WAY_NUM - 1)
+
+#define KVM_E500_TLB0_SIZE  (KVM_E500_TLB0_WAY_SIZE * KVM_E500_TLB0_WAY_NUM)
+#define KVM_E500_TLB1_SIZE  16
+
+#define index_of(tlbsel, esel)  (((tlbsel) << 16) | ((esel) & 0xFFFF))
+#define tlbsel_of(index)        ((index) >> 16)
+#define esel_of(index)          ((index) & 0xFFFF)
+
+#define E500_TLB_USER_PERM_MASK (MAS3_UX|MAS3_UR|MAS3_UW)
+#define E500_TLB_SUPER_PERM_MASK (MAS3_SX|MAS3_SR|MAS3_SW)
+#define MAS2_ATTRIB_MASK \
+          (MAS2_X0 | MAS2_X1)
+#define MAS3_ATTRIB_MASK \
+          (MAS3_U0 | MAS3_U1 | MAS3_U2 | MAS3_U3 \
+           | E500_TLB_USER_PERM_MASK | E500_TLB_SUPER_PERM_MASK)
+
+extern void kvmppc_dump_tlbs(struct kvm_vcpu *);
+extern int kvmppc_e500_emul_mt_mmucsr0(struct kvmppc_vcpu_e500 *, ulong);
+extern int kvmppc_e500_emul_tlbwe(struct kvm_vcpu *);
+extern int kvmppc_e500_emul_tlbre(struct kvm_vcpu *);
+extern int kvmppc_e500_emul_tlbivax(struct kvm_vcpu *, int, int);
+extern int kvmppc_e500_emul_tlbsx(struct kvm_vcpu *, int);
+extern int kvmppc_e500_tlb_search(struct kvm_vcpu *, gva_t, unsigned int, int);
+extern void kvmppc_e500_tlb_put(struct kvm_vcpu *);
+extern void kvmppc_e500_tlb_load(struct kvm_vcpu *, int);
+extern int kvmppc_e500_tlb_init(struct kvmppc_vcpu_e500 *);
+extern void kvmppc_e500_tlb_uninit(struct kvmppc_vcpu_e500 *);
+extern void kvmppc_e500_tlb_setup(struct kvmppc_vcpu_e500 *);
+
+/* TLB helper functions */
+static inline unsigned int get_tlb_size(const struct tlbe *tlbe)
+{
+        return (tlbe->mas1 >> 8) & 0xf;
+}
+
+static inline gva_t get_tlb_eaddr(const struct tlbe *tlbe)
+{
+        return tlbe->mas2 & 0xfffff000;
+}
+
+static inline u64 get_tlb_bytes(const struct tlbe *tlbe)
+{
+        unsigned int pgsize = get_tlb_size(tlbe);
+        return 1ULL << 10 << (pgsize << 1);
+}
+
+static inline gva_t get_tlb_end(const struct tlbe *tlbe)
+{
+        u64 bytes = get_tlb_bytes(tlbe);
+        return get_tlb_eaddr(tlbe) + bytes - 1;
+}
+
+static inline u64 get_tlb_raddr(const struct tlbe *tlbe)
+{
+        u64 rpn = tlbe->mas7;
+        return (rpn << 32) | (tlbe->mas3 & 0xfffff000);
+}
+
+static inline unsigned int get_tlb_tid(const struct tlbe *tlbe)
+{
+        return (tlbe->mas1 >> 16) & 0xff;
+}
+
+static inline unsigned int get_tlb_ts(const struct tlbe *tlbe)
+{
+        return (tlbe->mas1 >> 12) & 0x1;
+}
+
+static inline unsigned int get_tlb_v(const struct tlbe *tlbe)
+{
+        return (tlbe->mas1 >> 31) & 0x1;
+}
+
+static inline unsigned int get_tlb_iprot(const struct tlbe *tlbe)
+{
+        return (tlbe->mas1 >> 30) & 0x1;
+}
+
+static inline unsigned int get_cur_pid(struct kvm_vcpu *vcpu)
+{
+        return vcpu->arch.pid & 0xff;
+}
+
+static inline unsigned int get_cur_spid(
+                const struct kvmppc_vcpu_e500 *vcpu_e500)
+{
+        return (vcpu_e500->mas6 >> 16) & 0xff;
+}
+
+static inline unsigned int get_cur_sas(
+                const struct kvmppc_vcpu_e500 *vcpu_e500)
+{
+        return vcpu_e500->mas6 & 0x1;
+}
+
+static inline unsigned int get_tlb_tlbsel(
+                const struct kvmppc_vcpu_e500 *vcpu_e500)
+{
+        /*
+         * Manual says that tlbsel has 2 bits wide.
+         * Since we only have two TLBs, only lower bit is used.
+         */
+        return (vcpu_e500->mas0 >> 28) & 0x1;
+}
+
+static inline unsigned int get_tlb_nv_bit(
+                const struct kvmppc_vcpu_e500 *vcpu_e500)
+{
+        return vcpu_e500->mas0 & 0xfff;
+}
+
+static inline unsigned int get_tlb_esel_bit(
+                const struct kvmppc_vcpu_e500 *vcpu_e500)
+{
+        return (vcpu_e500->mas0 >> 16) & 0xfff;
+}
+
+static inline unsigned int get_tlb_esel(
+                const struct kvmppc_vcpu_e500 *vcpu_e500,
+                int tlbsel)
+{
+        unsigned int esel = get_tlb_esel_bit(vcpu_e500);
+
+        if (tlbsel == 0) {
+                esel &= KVM_E500_TLB0_WAY_NUM_MASK;
+                esel |= ((vcpu_e500->mas2 >> 12) & KVM_E500_TLB0_WAY_SIZE_MASK)
+                                << KVM_E500_TLB0_WAY_NUM_BIT;
+        } else {
+                esel &= KVM_E500_TLB1_SIZE - 1;
+        }
+
+        return esel;
+}
+
+static inline int tlbe_is_host_safe(const struct kvm_vcpu *vcpu,
+                        const struct tlbe *tlbe)
+{
+        gpa_t gpa;
+
+        if (!get_tlb_v(tlbe))
+                return 0;
+
+        /* Does it match current guest AS? */
+        /* XXX what about IS != DS? */
+        if (get_tlb_ts(tlbe) != !!(vcpu->arch.msr & MSR_IS))
+                return 0;
+
+        gpa = get_tlb_raddr(tlbe);
+        if (!gfn_to_memslot(vcpu->kvm, gpa >> PAGE_SHIFT))
+                /* Mapping is not for RAM. */
+                return 0;
+
+        return 1;
+}
+
+#endif /* __KVM_E500_TLB_H__ */
diff --git a/arch/powerpc/kvm/emulate.c b/arch/powerpc/kvm/emulate.c
index d1d38daa93fb..a561d6e8da1c 100644
--- a/arch/powerpc/kvm/emulate.c
+++ b/arch/powerpc/kvm/emulate.c
@@ -30,6 +30,39 @@
 #include <asm/disassemble.h>
 #include "timing.h"
 
+#define OP_TRAP 3
+
+#define OP_31_XOP_LWZX      23
+#define OP_31_XOP_LBZX      87
+#define OP_31_XOP_STWX      151
+#define OP_31_XOP_STBX      215
+#define OP_31_XOP_STBUX     247
+#define OP_31_XOP_LHZX      279
+#define OP_31_XOP_LHZUX     311
+#define OP_31_XOP_MFSPR     339
+#define OP_31_XOP_STHX      407
+#define OP_31_XOP_STHUX     439
+#define OP_31_XOP_MTSPR     467
+#define OP_31_XOP_DCBI      470
+#define OP_31_XOP_LWBRX     534
+#define OP_31_XOP_TLBSYNC   566
+#define OP_31_XOP_STWBRX    662
+#define OP_31_XOP_LHBRX     790
+#define OP_31_XOP_STHBRX    918
+
+#define OP_LWZ  32
+#define OP_LWZU 33
+#define OP_LBZ  34
+#define OP_LBZU 35
+#define OP_STW  36
+#define OP_STWU 37
+#define OP_STB  38
+#define OP_STBU 39
+#define OP_LHZ  40
+#define OP_LHZU 41
+#define OP_STH  44
+#define OP_STHU 45
+
 void kvmppc_emulate_dec(struct kvm_vcpu *vcpu)
 {
         if (vcpu->arch.tcr & TCR_DIE) {
@@ -78,7 +111,7 @@ int kvmppc_emulate_instruction(struct kvm_run *run, struct kvm_vcpu *vcpu)
         kvmppc_set_exit_type(vcpu, EMULATED_INST_EXITS);
 
         switch (get_op(inst)) {
-        case 3:                                             /* trap */
+        case OP_TRAP:
                 vcpu->arch.esr |= ESR_PTR;
                 kvmppc_core_queue_program(vcpu);
                 advance = 0;
@@ -87,31 +120,31 @@ int kvmppc_emulate_instruction(struct kvm_run *run, struct kvm_vcpu *vcpu)
         case 31:
                 switch (get_xop(inst)) {
 
-                case 23:                                        /* lwzx */
+                case OP_31_XOP_LWZX:
                         rt = get_rt(inst);
                         emulated = kvmppc_handle_load(run, vcpu, rt, 4, 1);
                         break;
 
-                case 87:                                        /* lbzx */
+                case OP_31_XOP_LBZX:
                         rt = get_rt(inst);
                         emulated = kvmppc_handle_load(run, vcpu, rt, 1, 1);
                         break;
 
-                case 151:                                       /* stwx */
+                case OP_31_XOP_STWX:
                         rs = get_rs(inst);
                         emulated = kvmppc_handle_store(run, vcpu,
                                                        vcpu->arch.gpr[rs],
                                                        4, 1);
                         break;
 
-                case 215:                                       /* stbx */
+                case OP_31_XOP_STBX:
                         rs = get_rs(inst);
                         emulated = kvmppc_handle_store(run, vcpu,
                                                        vcpu->arch.gpr[rs],
                                                        1, 1);
                         break;
 
-                case 247:                                       /* stbux */
+                case OP_31_XOP_STBUX:
                         rs = get_rs(inst);
                         ra = get_ra(inst);
                         rb = get_rb(inst);
@@ -126,12 +159,12 @@ int kvmppc_emulate_instruction(struct kvm_run *run, struct kvm_vcpu *vcpu)
                         vcpu->arch.gpr[rs] = ea;
                         break;
 
-                case 279:                                       /* lhzx */
+                case OP_31_XOP_LHZX:
                         rt = get_rt(inst);
                         emulated = kvmppc_handle_load(run, vcpu, rt, 2, 1);
                         break;
 
-                case 311:                                       /* lhzux */
+                case OP_31_XOP_LHZUX:
                         rt = get_rt(inst);
                         ra = get_ra(inst);
                         rb = get_rb(inst);
@@ -144,7 +177,7 @@ int kvmppc_emulate_instruction(struct kvm_run *run, struct kvm_vcpu *vcpu)
                         vcpu->arch.gpr[ra] = ea;
                         break;
 
-                case 339:                                       /* mfspr */
+                case OP_31_XOP_MFSPR:
                         sprn = get_sprn(inst);
                         rt = get_rt(inst);
 
@@ -185,7 +218,7 @@ int kvmppc_emulate_instruction(struct kvm_run *run, struct kvm_vcpu *vcpu)
                         }
                         break;
 
-                case 407:                                       /* sthx */
+                case OP_31_XOP_STHX:
                         rs = get_rs(inst);
                         ra = get_ra(inst);
                         rb = get_rb(inst);
@@ -195,7 +228,7 @@ int kvmppc_emulate_instruction(struct kvm_run *run, struct kvm_vcpu *vcpu)
                                                        2, 1);
                         break;
 
-                case 439:                                       /* sthux */
+                case OP_31_XOP_STHUX:
                         rs = get_rs(inst);
                         ra = get_ra(inst);
                         rb = get_rb(inst);
@@ -210,7 +243,7 @@ int kvmppc_emulate_instruction(struct kvm_run *run, struct kvm_vcpu *vcpu)
                         vcpu->arch.gpr[ra] = ea;
                         break;
 
-                case 467:                                       /* mtspr */
+                case OP_31_XOP_MTSPR:
                         sprn = get_sprn(inst);
                         rs = get_rs(inst);
                         switch (sprn) {
@@ -246,7 +279,7 @@ int kvmppc_emulate_instruction(struct kvm_run *run, struct kvm_vcpu *vcpu)
                         }
                         break;
 
-                case 470:                                       /* dcbi */
+                case OP_31_XOP_DCBI:
                         /* Do nothing. The guest is performing dcbi because
                          * hardware DMA is not snooped by the dcache, but
                          * emulated DMA either goes through the dcache as
@@ -254,15 +287,15 @@ int kvmppc_emulate_instruction(struct kvm_run *run, struct kvm_vcpu *vcpu)
                          * coherence. */
                         break;
 
-                case 534:                                       /* lwbrx */
+                case OP_31_XOP_LWBRX:
                         rt = get_rt(inst);
                         emulated = kvmppc_handle_load(run, vcpu, rt, 4, 0);
                         break;
 
-                case 566:                                       /* tlbsync */
+                case OP_31_XOP_TLBSYNC:
                         break;
 
-                case 662:                                       /* stwbrx */
+                case OP_31_XOP_STWBRX:
                         rs = get_rs(inst);
                         ra = get_ra(inst);
                         rb = get_rb(inst);
@@ -272,12 +305,12 @@ int kvmppc_emulate_instruction(struct kvm_run *run, struct kvm_vcpu *vcpu)
                                                        4, 0);
                         break;
 
-                case 790:                                       /* lhbrx */
+                case OP_31_XOP_LHBRX:
                         rt = get_rt(inst);
                         emulated = kvmppc_handle_load(run, vcpu, rt, 2, 0);
                         break;
 
-                case 918:                                       /* sthbrx */
+                case OP_31_XOP_STHBRX:
                         rs = get_rs(inst);
                         ra = get_ra(inst);
                         rb = get_rb(inst);
@@ -293,37 +326,37 @@ int kvmppc_emulate_instruction(struct kvm_run *run, struct kvm_vcpu *vcpu)
                 }
                 break;
 
-        case 32:                                                /* lwz */
+        case OP_LWZ:
                 rt = get_rt(inst);
                 emulated = kvmppc_handle_load(run, vcpu, rt, 4, 1);
                 break;
 
-        case 33:                                                /* lwzu */
+        case OP_LWZU:
                 ra = get_ra(inst);
                 rt = get_rt(inst);
                 emulated = kvmppc_handle_load(run, vcpu, rt, 4, 1);
                 vcpu->arch.gpr[ra] = vcpu->arch.paddr_accessed;
                 break;
 
-        case 34:                                                /* lbz */
+        case OP_LBZ:
                 rt = get_rt(inst);
                 emulated = kvmppc_handle_load(run, vcpu, rt, 1, 1);
                 break;
 
-        case 35:                                                /* lbzu */
+        case OP_LBZU:
                 ra = get_ra(inst);
                 rt = get_rt(inst);
                 emulated = kvmppc_handle_load(run, vcpu, rt, 1, 1);
                 vcpu->arch.gpr[ra] = vcpu->arch.paddr_accessed;
                 break;
 
-        case 36:                                                /* stw */
+        case OP_STW:
                 rs = get_rs(inst);
                 emulated = kvmppc_handle_store(run, vcpu, vcpu->arch.gpr[rs],
                                                4, 1);
                 break;
 
-        case 37:                                                /* stwu */
+        case OP_STWU:
                 ra = get_ra(inst);
                 rs = get_rs(inst);
                 emulated = kvmppc_handle_store(run, vcpu, vcpu->arch.gpr[rs],
@@ -331,13 +364,13 @@ int kvmppc_emulate_instruction(struct kvm_run *run, struct kvm_vcpu *vcpu)
                 vcpu->arch.gpr[ra] = vcpu->arch.paddr_accessed;
                 break;
 
-        case 38:                                                /* stb */
+        case OP_STB:
                 rs = get_rs(inst);
                 emulated = kvmppc_handle_store(run, vcpu, vcpu->arch.gpr[rs],
                                                1, 1);
                 break;
 
-        case 39:                                                /* stbu */
+        case OP_STBU:
                 ra = get_ra(inst);
                 rs = get_rs(inst);
                 emulated = kvmppc_handle_store(run, vcpu, vcpu->arch.gpr[rs],
@@ -345,25 +378,25 @@ int kvmppc_emulate_instruction(struct kvm_run *run, struct kvm_vcpu *vcpu)
                 vcpu->arch.gpr[ra] = vcpu->arch.paddr_accessed;
                 break;
 
-        case 40:                                                /* lhz */
+        case OP_LHZ:
                 rt = get_rt(inst);
                 emulated = kvmppc_handle_load(run, vcpu, rt, 2, 1);
                 break;
 
-        case 41:                                                /* lhzu */
+        case OP_LHZU:
                 ra = get_ra(inst);
                 rt = get_rt(inst);
                 emulated = kvmppc_handle_load(run, vcpu, rt, 2, 1);
                 vcpu->arch.gpr[ra] = vcpu->arch.paddr_accessed;
                 break;
 
-        case 44:                                                /* sth */
+        case OP_STH:
                 rs = get_rs(inst);
                 emulated = kvmppc_handle_store(run, vcpu, vcpu->arch.gpr[rs],
                                                2, 1);
                 break;
 
-        case 45:                                                /* sthu */
+        case OP_STHU:
                 ra = get_ra(inst);
                 rs = get_rs(inst);
                 emulated = kvmppc_handle_store(run, vcpu, vcpu->arch.gpr[rs],
diff --git a/arch/powerpc/kvm/powerpc.c b/arch/powerpc/kvm/powerpc.c
index 5f81256287f5..9057335fdc61 100644
--- a/arch/powerpc/kvm/powerpc.c
+++ b/arch/powerpc/kvm/powerpc.c
@@ -216,46 +216,23 @@ int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
 
 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
 {
-        kvmppc_core_destroy_mmu(vcpu);
+        kvmppc_mmu_destroy(vcpu);
 }
 
 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
 {
-        if (vcpu->guest_debug.enabled)
-                kvmppc_core_load_guest_debugstate(vcpu);
-
         kvmppc_core_vcpu_load(vcpu, cpu);
 }
 
 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
 {
-        if (vcpu->guest_debug.enabled)
-                kvmppc_core_load_host_debugstate(vcpu);
-
-        /* Don't leave guest TLB entries resident when being de-scheduled. */
-        /* XXX It would be nice to differentiate between heavyweight exit and
-         * sched_out here, since we could avoid the TLB flush for heavyweight
-         * exits. */
-        _tlbil_all();
         kvmppc_core_vcpu_put(vcpu);
 }
 
-int kvm_arch_vcpu_ioctl_debug_guest(struct kvm_vcpu *vcpu,
-                                    struct kvm_debug_guest *dbg)
+int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
+                                        struct kvm_guest_debug *dbg)
 {
-        int i;
-
-        vcpu->guest_debug.enabled = dbg->enabled;
-        if (vcpu->guest_debug.enabled) {
-                for (i=0; i < ARRAY_SIZE(vcpu->guest_debug.bp); i++) {
-                        if (dbg->breakpoints[i].enabled)
-                                vcpu->guest_debug.bp[i] = dbg->breakpoints[i].address;
-                        else
-                                vcpu->guest_debug.bp[i] = 0;
-                }
-        }
-
-        return 0;
+        return -EINVAL;
 }
 
 static void kvmppc_complete_dcr_load(struct kvm_vcpu *vcpu,
diff --git a/arch/powerpc/platforms/cell/interrupt.c b/arch/powerpc/platforms/cell/interrupt.c
index 28c04dab2633..882e47080e74 100644
--- a/arch/powerpc/platforms/cell/interrupt.c
+++ b/arch/powerpc/platforms/cell/interrupt.c
@@ -237,8 +237,6 @@ extern int noirqdebug;
 
 static void handle_iic_irq(unsigned int irq, struct irq_desc *desc)
 {
-        const unsigned int cpu = smp_processor_id();
-
         spin_lock(&desc->lock);
 
         desc->status &= ~(IRQ_REPLAY | IRQ_WAITING);
@@ -254,7 +252,7 @@ static void handle_iic_irq(unsigned int irq, struct irq_desc *desc)
                 goto out_eoi;
         }
 
-        kstat_cpu(cpu).irqs[irq]++;
+        kstat_incr_irqs_this_cpu(irq, desc);
 
         /* Mark the IRQ currently in progress.*/
         desc->status |= IRQ_INPROGRESS;
diff --git a/arch/powerpc/platforms/cell/spufs/sched.c b/arch/powerpc/platforms/cell/spufs/sched.c
index 6a0ad196aeb3..f085369301b1 100644
--- a/arch/powerpc/platforms/cell/spufs/sched.c
+++ b/arch/powerpc/platforms/cell/spufs/sched.c
@@ -508,7 +508,7 @@ static void __spu_add_to_rq(struct spu_context *ctx)
                 list_add_tail(&ctx->rq, &spu_prio->runq[ctx->prio]);
                 set_bit(ctx->prio, spu_prio->bitmap);
                 if (!spu_prio->nr_waiting++)
-                        __mod_timer(&spusched_timer, jiffies + SPUSCHED_TICK);
+                        mod_timer(&spusched_timer, jiffies + SPUSCHED_TICK);
         }
 }
 
diff --git a/arch/powerpc/platforms/ps3/Kconfig b/arch/powerpc/platforms/ps3/Kconfig
index 920cf7a454b1..740ef56a1550 100644
--- a/arch/powerpc/platforms/ps3/Kconfig
+++ b/arch/powerpc/platforms/ps3/Kconfig
@@ -128,6 +128,13 @@ config PS3_FLASH
           be disabled on the kernel command line using "ps3flash=off", to
           not allocate this fixed buffer.
 
+config PS3_VRAM
+        tristate "PS3 Video RAM Storage Driver"
+        depends on FB_PS3=y && BLOCK && m
+        help
+          This driver allows you to use excess PS3 video RAM as volatile
+          storage or system swap.
+
 config PS3_LPM
         tristate "PS3 Logical Performance Monitor support"
         depends on PPC_PS3
diff --git a/arch/powerpc/platforms/ps3/system-bus.c b/arch/powerpc/platforms/ps3/system-bus.c
index 58311a867851..a705fffbb498 100644
--- a/arch/powerpc/platforms/ps3/system-bus.c
+++ b/arch/powerpc/platforms/ps3/system-bus.c
@@ -376,7 +376,7 @@ static int ps3_system_bus_probe(struct device *_dev)
         struct ps3_system_bus_driver *drv;
 
         BUG_ON(!dev);
-        pr_debug(" -> %s:%d: %s\n", __func__, __LINE__, _dev->bus_id);
+        dev_dbg(_dev, "%s:%d\n", __func__, __LINE__);
 
         drv = ps3_system_bus_dev_to_system_bus_drv(dev);
         BUG_ON(!drv);
@@ -398,7 +398,7 @@ static int ps3_system_bus_remove(struct device *_dev)
         struct ps3_system_bus_driver *drv;
 
         BUG_ON(!dev);
-        pr_debug(" -> %s:%d: %s\n", __func__, __LINE__, _dev->bus_id);
+        dev_dbg(_dev, "%s:%d\n", __func__, __LINE__);
 
         drv = ps3_system_bus_dev_to_system_bus_drv(dev);
         BUG_ON(!drv);
diff --git a/arch/powerpc/platforms/pseries/xics.c b/arch/powerpc/platforms/pseries/xics.c
index 84e058f1e1cc..80b513449f4c 100644
--- a/arch/powerpc/platforms/pseries/xics.c
+++ b/arch/powerpc/platforms/pseries/xics.c
@@ -153,9 +153,10 @@ static int get_irq_server(unsigned int virq, unsigned int strict_check)
 {
         int server;
         /* For the moment only implement delivery to all cpus or one cpu */
-        cpumask_t cpumask = irq_desc[virq].affinity;
+        cpumask_t cpumask;
         cpumask_t tmp = CPU_MASK_NONE;
 
+        cpumask_copy(&cpumask, irq_desc[virq].affinity);
         if (!distribute_irqs)
                 return default_server;
 
@@ -869,7 +870,7 @@ void xics_migrate_irqs_away(void)
                        virq, cpu);
 
                 /* Reset affinity to all cpus */
-                irq_desc[virq].affinity = CPU_MASK_ALL;
+                cpumask_setall(irq_desc[virq].affinity);
                 desc->chip->set_affinity(virq, cpu_all_mask);
 unlock:
                 spin_unlock_irqrestore(&desc->lock, flags);
diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
index a35297dbac28..532e205303a2 100644
--- a/arch/powerpc/sysdev/mpic.c
+++ b/arch/powerpc/sysdev/mpic.c
@@ -566,9 +566,10 @@ static void __init mpic_scan_ht_pics(struct mpic *mpic)
 #ifdef CONFIG_SMP
 static int irq_choose_cpu(unsigned int virt_irq)
 {
-        cpumask_t mask = irq_desc[virt_irq].affinity;
+        cpumask_t mask;
         int cpuid;
 
+        cpumask_copy(&mask, irq_desc[virt_irq].affinity);
         if (cpus_equal(mask, CPU_MASK_ALL)) {
                 static int irq_rover;
                 static DEFINE_SPINLOCK(irq_rover_lock);
diff --git a/arch/s390/Kconfig b/arch/s390/Kconfig
index 6b0a3538dc63..2a8af5e16345 100644
--- a/arch/s390/Kconfig
+++ b/arch/s390/Kconfig
@@ -343,13 +343,6 @@ source "mm/Kconfig"
 
 comment "I/O subsystem configuration"
 
-config MACHCHK_WARNING
-        bool "Process warning machine checks"
-        help
-          Select this option if you want the machine check handler on IBM S/390 or
-          zSeries to process warning machine checks (e.g. on power failures).
-          If unsure, say "Y".
-
 config QDIO
         tristate "QDIO support"
         ---help---
@@ -521,7 +514,7 @@ config APPLDATA_OS
 
 config APPLDATA_NET_SUM
         tristate "Monitor overall network statistics"
-        depends on APPLDATA_BASE
+        depends on APPLDATA_BASE && NET
         help
           This provides network related data to the Linux - VM Monitor Stream,
           currently there is only a total sum of network I/O statistics, no
@@ -552,7 +545,7 @@ config KEXEC
           but is independent of hardware/microcode support.
 
 config ZFCPDUMP
-        tristate "zfcpdump support"
+        bool "zfcpdump support"
         select SMP
         default n
         help
diff --git a/arch/s390/crypto/prng.c b/arch/s390/crypto/prng.c
index eca724d229ec..b49c00ce65e9 100644
--- a/arch/s390/crypto/prng.c
+++ b/arch/s390/crypto/prng.c
@@ -201,8 +201,7 @@ out_free:
 static void __exit prng_exit(void)
 {
         /* wipe me */
-        memset(p->buf, 0, prng_chunk_size);
-        kfree(p->buf);
+        kzfree(p->buf);
         kfree(p);
 
         misc_deregister(&prng_dev);
diff --git a/arch/s390/crypto/sha.h b/arch/s390/crypto/sha.h
index 1ceafa571eab..f4e9dc71675f 100644
--- a/arch/s390/crypto/sha.h
+++ b/arch/s390/crypto/sha.h
@@ -29,7 +29,9 @@ struct s390_sha_ctx {
         int func;               /* KIMD function to use */
 };
 
-void s390_sha_update(struct crypto_tfm *tfm, const u8 *data, unsigned int len);
-void s390_sha_final(struct crypto_tfm *tfm, u8 *out);
+struct shash_desc;
+
+int s390_sha_update(struct shash_desc *desc, const u8 *data, unsigned int len);
+int s390_sha_final(struct shash_desc *desc, u8 *out);
 
 #endif
diff --git a/arch/s390/crypto/sha1_s390.c b/arch/s390/crypto/sha1_s390.c
index b3cb5a89b00d..e85ba348722a 100644
--- a/arch/s390/crypto/sha1_s390.c
+++ b/arch/s390/crypto/sha1_s390.c
@@ -23,17 +23,17 @@
  * any later version.
  *
  */
+#include <crypto/internal/hash.h>
 #include <linux/init.h>
 #include <linux/module.h>
-#include <linux/crypto.h>
 #include <crypto/sha.h>
 
 #include "crypt_s390.h"
 #include "sha.h"
 
-static void sha1_init(struct crypto_tfm *tfm)
+static int sha1_init(struct shash_desc *desc)
 {
-        struct s390_sha_ctx *sctx = crypto_tfm_ctx(tfm);
+        struct s390_sha_ctx *sctx = shash_desc_ctx(desc);
 
         sctx->state[0] = SHA1_H0;
         sctx->state[1] = SHA1_H1;
@@ -42,34 +42,36 @@ static void sha1_init(struct crypto_tfm *tfm)
         sctx->state[4] = SHA1_H4;
         sctx->count = 0;
         sctx->func = KIMD_SHA_1;
+
+        return 0;
 }
 
-static struct crypto_alg alg = {
-        .cra_name       =       "sha1",
-        .cra_driver_name=       "sha1-s390",
-        .cra_priority   =       CRYPT_S390_PRIORITY,
-        .cra_flags      =       CRYPTO_ALG_TYPE_DIGEST,
-        .cra_blocksize  =       SHA1_BLOCK_SIZE,
-        .cra_ctxsize    =       sizeof(struct s390_sha_ctx),
-        .cra_module     =       THIS_MODULE,
-        .cra_list       =       LIST_HEAD_INIT(alg.cra_list),
-        .cra_u          =       { .digest = {
-        .dia_digestsize =       SHA1_DIGEST_SIZE,
-        .dia_init       =       sha1_init,
-        .dia_update     =       s390_sha_update,
-        .dia_final      =       s390_sha_final } }
+static struct shash_alg alg = {
+        .digestsize     =       SHA1_DIGEST_SIZE,
+        .init           =       sha1_init,
+        .update         =       s390_sha_update,
+        .final          =       s390_sha_final,
+        .descsize       =       sizeof(struct s390_sha_ctx),
+        .base           =       {
+                .cra_name       =       "sha1",
+                .cra_driver_name=       "sha1-s390",
+                .cra_priority   =       CRYPT_S390_PRIORITY,
+                .cra_flags      =       CRYPTO_ALG_TYPE_SHASH,
+                .cra_blocksize  =       SHA1_BLOCK_SIZE,
+                .cra_module     =       THIS_MODULE,
+        }
 };
 
 static int __init sha1_s390_init(void)
 {
         if (!crypt_s390_func_available(KIMD_SHA_1))
                 return -EOPNOTSUPP;
-        return crypto_register_alg(&alg);
+        return crypto_register_shash(&alg);
 }
 
 static void __exit sha1_s390_fini(void)
 {
-        crypto_unregister_alg(&alg);
+        crypto_unregister_shash(&alg);
 }
 
 module_init(sha1_s390_init);
diff --git a/arch/s390/crypto/sha256_s390.c b/arch/s390/crypto/sha256_s390.c
index 19c03fb6ba7e..f9fefc569632 100644
--- a/arch/s390/crypto/sha256_s390.c
+++ b/arch/s390/crypto/sha256_s390.c
@@ -16,17 +16,17 @@
  * any later version.
  *
  */
+#include <crypto/internal/hash.h>
 #include <linux/init.h>
 #include <linux/module.h>
-#include <linux/crypto.h>
 #include <crypto/sha.h>
 
 #include "crypt_s390.h"
 #include "sha.h"
 
-static void sha256_init(struct crypto_tfm *tfm)
+static int sha256_init(struct shash_desc *desc)
 {
-        struct s390_sha_ctx *sctx = crypto_tfm_ctx(tfm);
+        struct s390_sha_ctx *sctx = shash_desc_ctx(desc);
 
         sctx->state[0] = SHA256_H0;
         sctx->state[1] = SHA256_H1;
@@ -38,22 +38,24 @@ static void sha256_init(struct crypto_tfm *tfm)
         sctx->state[7] = SHA256_H7;
         sctx->count = 0;
         sctx->func = KIMD_SHA_256;
+
+        return 0;
 }
 
-static struct crypto_alg alg = {
-        .cra_name       =       "sha256",
-        .cra_driver_name =      "sha256-s390",
-        .cra_priority   =       CRYPT_S390_PRIORITY,
-        .cra_flags      =       CRYPTO_ALG_TYPE_DIGEST,
-        .cra_blocksize  =       SHA256_BLOCK_SIZE,
-        .cra_ctxsize    =       sizeof(struct s390_sha_ctx),
-        .cra_module     =       THIS_MODULE,
-        .cra_list       =       LIST_HEAD_INIT(alg.cra_list),
-        .cra_u          =       { .digest = {
-        .dia_digestsize =       SHA256_DIGEST_SIZE,
-        .dia_init       =       sha256_init,
-        .dia_update     =       s390_sha_update,
-        .dia_final      =       s390_sha_final } }
+static struct shash_alg alg = {
+        .digestsize     =       SHA256_DIGEST_SIZE,
+        .init           =       sha256_init,
+        .update         =       s390_sha_update,
+        .final          =       s390_sha_final,
+        .descsize       =       sizeof(struct s390_sha_ctx),
+        .base           =       {
+                .cra_name       =       "sha256",
+                .cra_driver_name=       "sha256-s390",
+                .cra_priority   =       CRYPT_S390_PRIORITY,
+                .cra_flags      =       CRYPTO_ALG_TYPE_SHASH,
+                .cra_blocksize  =       SHA256_BLOCK_SIZE,
+                .cra_module     =       THIS_MODULE,
+        }
 };
 
 static int sha256_s390_init(void)
@@ -61,12 +63,12 @@ static int sha256_s390_init(void)
         if (!crypt_s390_func_available(KIMD_SHA_256))
                 return -EOPNOTSUPP;
 
-        return crypto_register_alg(&alg);
+        return crypto_register_shash(&alg);
 }
 
 static void __exit sha256_s390_fini(void)
 {
-        crypto_unregister_alg(&alg);
+        crypto_unregister_shash(&alg);
 }
 
 module_init(sha256_s390_init);
diff --git a/arch/s390/crypto/sha512_s390.c b/arch/s390/crypto/sha512_s390.c
index 23c7861f6aeb..83192bfc8048 100644
--- a/arch/s390/crypto/sha512_s390.c
+++ b/arch/s390/crypto/sha512_s390.c
@@ -12,16 +12,16 @@
  * any later version.
  *
  */
+#include <crypto/internal/hash.h>
 #include <linux/init.h>
 #include <linux/module.h>
-#include <linux/crypto.h>
 
 #include "sha.h"
 #include "crypt_s390.h"
 
-static void sha512_init(struct crypto_tfm *tfm)
+static int sha512_init(struct shash_desc *desc)
 {
-        struct s390_sha_ctx *ctx = crypto_tfm_ctx(tfm);
+        struct s390_sha_ctx *ctx = shash_desc_ctx(desc);
 
         *(__u64 *)&ctx->state[0] = 0x6a09e667f3bcc908ULL;
         *(__u64 *)&ctx->state[2] = 0xbb67ae8584caa73bULL;
@@ -33,29 +33,31 @@ static void sha512_init(struct crypto_tfm *tfm)
         *(__u64 *)&ctx->state[14] = 0x5be0cd19137e2179ULL;
         ctx->count = 0;
         ctx->func = KIMD_SHA_512;
+
+        return 0;
 }
 
-static struct crypto_alg sha512_alg = {
-        .cra_name       =       "sha512",
-        .cra_driver_name =      "sha512-s390",
-        .cra_priority   =       CRYPT_S390_PRIORITY,
-        .cra_flags      =       CRYPTO_ALG_TYPE_DIGEST,
-        .cra_blocksize  =       SHA512_BLOCK_SIZE,
-        .cra_ctxsize    =       sizeof(struct s390_sha_ctx),
-        .cra_module     =       THIS_MODULE,
-        .cra_list       =       LIST_HEAD_INIT(sha512_alg.cra_list),
-        .cra_u          =       { .digest = {
-        .dia_digestsize =       SHA512_DIGEST_SIZE,
-        .dia_init       =       sha512_init,
-        .dia_update     =       s390_sha_update,
-        .dia_final      =       s390_sha_final } }
+static struct shash_alg sha512_alg = {
+        .digestsize     =       SHA512_DIGEST_SIZE,
+        .init           =       sha512_init,
+        .update         =       s390_sha_update,
+        .final          =       s390_sha_final,
+        .descsize       =       sizeof(struct s390_sha_ctx),
+        .base           =       {
+                .cra_name       =       "sha512",
+                .cra_driver_name=       "sha512-s390",
+                .cra_priority   =       CRYPT_S390_PRIORITY,
+                .cra_flags      =       CRYPTO_ALG_TYPE_SHASH,
+                .cra_blocksize  =       SHA512_BLOCK_SIZE,
+                .cra_module     =       THIS_MODULE,
+        }
 };
 
 MODULE_ALIAS("sha512");
 
-static void sha384_init(struct crypto_tfm *tfm)
+static int sha384_init(struct shash_desc *desc)
 {
-        struct s390_sha_ctx *ctx = crypto_tfm_ctx(tfm);
+        struct s390_sha_ctx *ctx = shash_desc_ctx(desc);
 
         *(__u64 *)&ctx->state[0] = 0xcbbb9d5dc1059ed8ULL;
         *(__u64 *)&ctx->state[2] = 0x629a292a367cd507ULL;
@@ -67,22 +69,25 @@ static void sha384_init(struct crypto_tfm *tfm)
         *(__u64 *)&ctx->state[14] = 0x47b5481dbefa4fa4ULL;
         ctx->count = 0;
         ctx->func = KIMD_SHA_512;
+
+        return 0;
 }
 
-static struct crypto_alg sha384_alg = {
-        .cra_name       =       "sha384",
-        .cra_driver_name =      "sha384-s390",
-        .cra_priority   =       CRYPT_S390_PRIORITY,
-        .cra_flags      =       CRYPTO_ALG_TYPE_DIGEST,
-        .cra_blocksize  =       SHA384_BLOCK_SIZE,
-        .cra_ctxsize    =       sizeof(struct s390_sha_ctx),
-        .cra_module     =       THIS_MODULE,
-        .cra_list       =       LIST_HEAD_INIT(sha384_alg.cra_list),
-        .cra_u          =       { .digest = {
-        .dia_digestsize =       SHA384_DIGEST_SIZE,
-        .dia_init       =       sha384_init,
-        .dia_update     =       s390_sha_update,
-        .dia_final      =       s390_sha_final } }
+static struct shash_alg sha384_alg = {
+        .digestsize     =       SHA384_DIGEST_SIZE,
+        .init           =       sha384_init,
+        .update         =       s390_sha_update,
+        .final          =       s390_sha_final,
+        .descsize       =       sizeof(struct s390_sha_ctx),
+        .base           =       {
+                .cra_name       =       "sha384",
+                .cra_driver_name=       "sha384-s390",
+                .cra_priority   =       CRYPT_S390_PRIORITY,
+                .cra_flags      =       CRYPTO_ALG_TYPE_SHASH,
+                .cra_blocksize  =       SHA384_BLOCK_SIZE,
+                .cra_ctxsize    =       sizeof(struct s390_sha_ctx),
+                .cra_module     =       THIS_MODULE,
+        }
 };
 
 MODULE_ALIAS("sha384");
@@ -93,18 +98,18 @@ static int __init init(void)
 
         if (!crypt_s390_func_available(KIMD_SHA_512))
                 return -EOPNOTSUPP;
-        if ((ret = crypto_register_alg(&sha512_alg)) < 0)
+        if ((ret = crypto_register_shash(&sha512_alg)) < 0)
                 goto out;
-        if ((ret = crypto_register_alg(&sha384_alg)) < 0)
-                crypto_unregister_alg(&sha512_alg);
+        if ((ret = crypto_register_shash(&sha384_alg)) < 0)
+                crypto_unregister_shash(&sha512_alg);
 out:
         return ret;
 }
 
 static void __exit fini(void)
 {
-        crypto_unregister_alg(&sha512_alg);
-        crypto_unregister_alg(&sha384_alg);
+        crypto_unregister_shash(&sha512_alg);
+        crypto_unregister_shash(&sha384_alg);
 }
 
 module_init(init);
diff --git a/arch/s390/crypto/sha_common.c b/arch/s390/crypto/sha_common.c
index 9d6eb8c3d37e..7903ec47e6b9 100644
--- a/arch/s390/crypto/sha_common.c
+++ b/arch/s390/crypto/sha_common.c
@@ -13,14 +13,14 @@
  *
  */
 
-#include <linux/crypto.h>
+#include <crypto/internal/hash.h>
 #include "sha.h"
 #include "crypt_s390.h"
 
-void s390_sha_update(struct crypto_tfm *tfm, const u8 *data, unsigned int len)
+int s390_sha_update(struct shash_desc *desc, const u8 *data, unsigned int len)
 {
-        struct s390_sha_ctx *ctx = crypto_tfm_ctx(tfm);
-        unsigned int bsize = crypto_tfm_alg_blocksize(tfm);
+        struct s390_sha_ctx *ctx = shash_desc_ctx(desc);
+        unsigned int bsize = crypto_shash_blocksize(desc->tfm);
         unsigned int index;
         int ret;
 
@@ -51,13 +51,15 @@ void s390_sha_update(struct crypto_tfm *tfm, const u8 *data, unsigned int len)
 store:
         if (len)
                 memcpy(ctx->buf + index , data, len);
+
+        return 0;
 }
 EXPORT_SYMBOL_GPL(s390_sha_update);
 
-void s390_sha_final(struct crypto_tfm *tfm, u8 *out)
+int s390_sha_final(struct shash_desc *desc, u8 *out)
 {
-        struct s390_sha_ctx *ctx = crypto_tfm_ctx(tfm);
-        unsigned int bsize = crypto_tfm_alg_blocksize(tfm);
+        struct s390_sha_ctx *ctx = shash_desc_ctx(desc);
+        unsigned int bsize = crypto_shash_blocksize(desc->tfm);
         u64 bits;
         unsigned int index, end, plen;
         int ret;
@@ -87,9 +89,11 @@ void s390_sha_final(struct crypto_tfm *tfm, u8 *out)
         BUG_ON(ret != end);
 
         /* copy digest to out */
-        memcpy(out, ctx->state, crypto_hash_digestsize(crypto_hash_cast(tfm)));
+        memcpy(out, ctx->state, crypto_shash_digestsize(desc->tfm));
         /* wipe context */
         memset(ctx, 0, sizeof *ctx);
+
+        return 0;
 }
 EXPORT_SYMBOL_GPL(s390_sha_final);
 
diff --git a/arch/s390/include/asm/bitops.h b/arch/s390/include/asm/bitops.h
index 8e9243ae0c19..b30606f6d523 100644
--- a/arch/s390/include/asm/bitops.h
+++ b/arch/s390/include/asm/bitops.h
@@ -57,7 +57,7 @@
  * with operation of the form "set_bit(bitnr, flags)".
  */
 
-/* bitmap tables from arch/S390/kernel/bitmap.S */
+/* bitmap tables from arch/s390/kernel/bitmap.c */
 extern const char _oi_bitmap[];
 extern const char _ni_bitmap[];
 extern const char _zb_findmap[];
@@ -525,16 +525,16 @@ static inline unsigned long __ffs_word_loop(const unsigned long *addr,
 static inline unsigned long __ffz_word(unsigned long nr, unsigned long word)
 {
 #ifdef __s390x__
-        if (likely((word & 0xffffffff) == 0xffffffff)) {
+        if ((word & 0xffffffff) == 0xffffffff) {
                 word >>= 32;
                 nr += 32;
         }
 #endif
-        if (likely((word & 0xffff) == 0xffff)) {
+        if ((word & 0xffff) == 0xffff) {
                 word >>= 16;
                 nr += 16;
         }
-        if (likely((word & 0xff) == 0xff)) {
+        if ((word & 0xff) == 0xff) {
                 word >>= 8;
                 nr += 8;
         }
@@ -549,16 +549,16 @@ static inline unsigned long __ffz_word(unsigned long nr, unsigned long word)
 static inline unsigned long __ffs_word(unsigned long nr, unsigned long word)
 {
 #ifdef __s390x__
-        if (likely((word & 0xffffffff) == 0)) {
+        if ((word & 0xffffffff) == 0) {
                 word >>= 32;
                 nr += 32;
         }
 #endif
-        if (likely((word & 0xffff) == 0)) {
+        if ((word & 0xffff) == 0) {
                 word >>= 16;
                 nr += 16;
         }
-        if (likely((word & 0xff) == 0)) {
+        if ((word & 0xff) == 0) {
                 word >>= 8;
                 nr += 8;
         }
diff --git a/arch/s390/include/asm/crw.h b/arch/s390/include/asm/crw.h
new file mode 100644
index 000000000000..2185a6d619d3
--- /dev/null
+++ b/arch/s390/include/asm/crw.h
@@ -0,0 +1,68 @@
+/*
+ *   Data definitions for channel report processing
+ *    Copyright IBM Corp. 2000,2009
+ *    Author(s): Ingo Adlung <adlung@de.ibm.com>,
+ *               Martin Schwidefsky <schwidefsky@de.ibm.com>,
+ *               Cornelia Huck <cornelia.huck@de.ibm.com>,
+ *               Heiko Carstens <heiko.carstens@de.ibm.com>,
+ */
+
+#ifndef _ASM_S390_CRW_H
+#define _ASM_S390_CRW_H
+
+#include <linux/types.h>
+
+/*
+ * Channel Report Word
+ */
+struct crw {
+        __u32 res1 :  1;   /* reserved zero */
+        __u32 slct :  1;   /* solicited */
+        __u32 oflw :  1;   /* overflow */
+        __u32 chn  :  1;   /* chained */
+        __u32 rsc  :  4;   /* reporting source code */
+        __u32 anc  :  1;   /* ancillary report */
+        __u32 res2 :  1;   /* reserved zero */
+        __u32 erc  :  6;   /* error-recovery code */
+        __u32 rsid : 16;   /* reporting-source ID */
+} __attribute__ ((packed));
+
+typedef void (*crw_handler_t)(struct crw *, struct crw *, int);
+
+extern int crw_register_handler(int rsc, crw_handler_t handler);
+extern void crw_unregister_handler(int rsc);
+extern void crw_handle_channel_report(void);
+
+#define NR_RSCS 16
+
+#define CRW_RSC_MONITOR  0x2  /* monitoring facility */
+#define CRW_RSC_SCH      0x3  /* subchannel */
+#define CRW_RSC_CPATH    0x4  /* channel path */
+#define CRW_RSC_CONFIG   0x9  /* configuration-alert facility */
+#define CRW_RSC_CSS      0xB  /* channel subsystem */
+
+#define CRW_ERC_EVENT    0x00 /* event information pending */
+#define CRW_ERC_AVAIL    0x01 /* available */
+#define CRW_ERC_INIT     0x02 /* initialized */
+#define CRW_ERC_TERROR   0x03 /* temporary error */
+#define CRW_ERC_IPARM    0x04 /* installed parm initialized */
+#define CRW_ERC_TERM     0x05 /* terminal */
+#define CRW_ERC_PERRN    0x06 /* perm. error, fac. not init */
+#define CRW_ERC_PERRI    0x07 /* perm. error, facility init */
+#define CRW_ERC_PMOD     0x08 /* installed parameters modified */
+
+static inline int stcrw(struct crw *pcrw)
+{
+        int ccode;
+
+        asm volatile(
+                "       stcrw   0(%2)\n"
+                "       ipm     %0\n"
+                "       srl     %0,28\n"
+                : "=d" (ccode), "=m" (*pcrw)
+                : "a" (pcrw)
+                : "cc" );
+        return ccode;
+}
+
+#endif /* _ASM_S390_CRW_H */
diff --git a/arch/s390/include/asm/dasd.h b/arch/s390/include/asm/dasd.h
index e2db6f16d9c8..218bce81ec70 100644
--- a/arch/s390/include/asm/dasd.h
+++ b/arch/s390/include/asm/dasd.h
@@ -162,15 +162,15 @@ typedef struct dasd_profile_info_t {
         unsigned int dasd_io_nr_req[32]; /* histogram of # of requests in chanq */
 } dasd_profile_info_t;
 
-/* 
+/*
  * struct format_data_t
  * represents all data necessary to format a dasd
  */
 typedef struct format_data_t {
-        int start_unit; /* from track */
-        int stop_unit;  /* to track */
-        int blksize;    /* sectorsize */
-        int intensity;  
+        unsigned int start_unit; /* from track */
+        unsigned int stop_unit;  /* to track */
+        unsigned int blksize;    /* sectorsize */
+        unsigned int intensity;
 } format_data_t;
 
 /*
diff --git a/arch/s390/include/asm/idals.h b/arch/s390/include/asm/idals.h
index e82c10efe65a..aae276d00383 100644
--- a/arch/s390/include/asm/idals.h
+++ b/arch/s390/include/asm/idals.h
@@ -44,24 +44,18 @@ idal_is_needed(void *vaddr, unsigned int length)
 /*
  * Return the number of idal words needed for an address/length pair.
  */
-static inline unsigned int
-idal_nr_words(void *vaddr, unsigned int length)
+static inline unsigned int idal_nr_words(void *vaddr, unsigned int length)
 {
-#ifdef __s390x__
-        if (idal_is_needed(vaddr, length))
-                return ((__pa(vaddr) & (IDA_BLOCK_SIZE-1)) + length + 
-                        (IDA_BLOCK_SIZE-1)) >> IDA_SIZE_LOG;
-#endif
-        return 0;
+        return ((__pa(vaddr) & (IDA_BLOCK_SIZE-1)) + length +
+                (IDA_BLOCK_SIZE-1)) >> IDA_SIZE_LOG;
 }
 
 /*
  * Create the list of idal words for an address/length pair.
  */
-static inline unsigned long *
-idal_create_words(unsigned long *idaws, void *vaddr, unsigned int length)
+static inline unsigned long *idal_create_words(unsigned long *idaws,
+                                               void *vaddr, unsigned int length)
 {
-#ifdef __s390x__
         unsigned long paddr;
         unsigned int cidaw;
 
@@ -74,7 +68,6 @@ idal_create_words(unsigned long *idaws, void *vaddr, unsigned int length)
                 paddr += IDA_BLOCK_SIZE;
                 *idaws++ = paddr;
         }
-#endif
         return idaws;
 }
 
diff --git a/arch/s390/include/asm/kvm.h b/arch/s390/include/asm/kvm.h
index e1f54654e3ae..0b2f829f6d50 100644
--- a/arch/s390/include/asm/kvm.h
+++ b/arch/s390/include/asm/kvm.h
@@ -42,4 +42,11 @@ struct kvm_fpu {
         __u64 fprs[16];
 };
 
+struct kvm_debug_exit_arch {
+};
+
+/* for KVM_SET_GUEST_DEBUG */
+struct kvm_guest_debug_arch {
+};
+
 #endif
diff --git a/arch/s390/include/asm/kvm_host.h b/arch/s390/include/asm/kvm_host.h
index 3c55e4107dcc..c6e674f5fca9 100644
--- a/arch/s390/include/asm/kvm_host.h
+++ b/arch/s390/include/asm/kvm_host.h
@@ -21,9 +21,6 @@
 /* memory slots that does not exposed to userspace */
 #define KVM_PRIVATE_MEM_SLOTS 4
 
-struct kvm_guest_debug {
-};
-
 struct sca_entry {
         atomic_t scn;
         __u64   reserved;
diff --git a/arch/s390/include/asm/lowcore.h b/arch/s390/include/asm/lowcore.h
index f3720defdd16..b349f1c7fdfa 100644
--- a/arch/s390/include/asm/lowcore.h
+++ b/arch/s390/include/asm/lowcore.h
@@ -11,129 +11,118 @@
 #ifndef _ASM_S390_LOWCORE_H
 #define _ASM_S390_LOWCORE_H
 
-#ifndef __s390x__
-#define __LC_EXT_OLD_PSW                0x018
-#define __LC_SVC_OLD_PSW                0x020
-#define __LC_PGM_OLD_PSW                0x028
-#define __LC_MCK_OLD_PSW                0x030
-#define __LC_IO_OLD_PSW                 0x038
-#define __LC_EXT_NEW_PSW                0x058
-#define __LC_SVC_NEW_PSW                0x060
-#define __LC_PGM_NEW_PSW                0x068
-#define __LC_MCK_NEW_PSW                0x070
-#define __LC_IO_NEW_PSW                 0x078
-#else /* !__s390x__ */
-#define __LC_EXT_OLD_PSW                0x0130
-#define __LC_SVC_OLD_PSW                0x0140
-#define __LC_PGM_OLD_PSW                0x0150
-#define __LC_MCK_OLD_PSW                0x0160
-#define __LC_IO_OLD_PSW                 0x0170
-#define __LC_EXT_NEW_PSW                0x01b0
-#define __LC_SVC_NEW_PSW                0x01c0
-#define __LC_PGM_NEW_PSW                0x01d0
-#define __LC_MCK_NEW_PSW                0x01e0
-#define __LC_IO_NEW_PSW                 0x01f0
-#endif /* !__s390x__ */
-
-#define __LC_IPL_PARMBLOCK_PTR          0x014
-#define __LC_EXT_PARAMS                 0x080
-#define __LC_CPU_ADDRESS                0x084
-#define __LC_EXT_INT_CODE               0x086
-
-#define __LC_SVC_ILC                    0x088
-#define __LC_SVC_INT_CODE               0x08A
-#define __LC_PGM_ILC                    0x08C
-#define __LC_PGM_INT_CODE               0x08E
+#define __LC_IPL_PARMBLOCK_PTR          0x0014
+#define __LC_EXT_PARAMS                 0x0080
+#define __LC_CPU_ADDRESS                0x0084
+#define __LC_EXT_INT_CODE               0x0086
 
-#define __LC_PER_ATMID                  0x096
-#define __LC_PER_ADDRESS                0x098
-#define __LC_PER_ACCESS_ID              0x0A1
-#define __LC_AR_MODE_ID                 0x0A3
+#define __LC_SVC_ILC                    0x0088
+#define __LC_SVC_INT_CODE               0x008a
+#define __LC_PGM_ILC                    0x008c
+#define __LC_PGM_INT_CODE               0x008e
 
-#define __LC_SUBCHANNEL_ID              0x0B8
-#define __LC_SUBCHANNEL_NR              0x0BA
-#define __LC_IO_INT_PARM                0x0BC
-#define __LC_IO_INT_WORD                0x0C0
-#define __LC_MCCK_CODE                  0x0E8
+#define __LC_PER_ATMID                  0x0096
+#define __LC_PER_ADDRESS                0x0098
+#define __LC_PER_ACCESS_ID              0x00a1
+#define __LC_AR_MODE_ID                 0x00a3
 
-#define __LC_LAST_BREAK                 0x110
-
-#define __LC_RETURN_PSW                 0x200
-
-#define __LC_SAVE_AREA                  0xC00
-
-#ifndef __s390x__
-#define __LC_IRB                        0x208
-#define __LC_SYNC_ENTER_TIMER           0x248
-#define __LC_ASYNC_ENTER_TIMER          0x250
-#define __LC_EXIT_TIMER                 0x258
-#define __LC_USER_TIMER                 0x260
-#define __LC_SYSTEM_TIMER               0x268
-#define __LC_STEAL_TIMER                0x270
-#define __LC_LAST_UPDATE_TIMER          0x278
-#define __LC_LAST_UPDATE_CLOCK          0x280
-#define __LC_RETURN_MCCK_PSW            0x288
-#define __LC_KERNEL_STACK               0xC40
-#define __LC_THREAD_INFO                0xC44
-#define __LC_ASYNC_STACK                0xC48
-#define __LC_KERNEL_ASCE                0xC4C
-#define __LC_USER_ASCE                  0xC50
-#define __LC_PANIC_STACK                0xC54
-#define __LC_CPUID                      0xC60
-#define __LC_CPUADDR                    0xC68
-#define __LC_IPLDEV                     0xC7C
-#define __LC_CURRENT                    0xC90
-#define __LC_INT_CLOCK                  0xC98
-#else /* __s390x__ */
-#define __LC_IRB                        0x210
-#define __LC_SYNC_ENTER_TIMER           0x250
-#define __LC_ASYNC_ENTER_TIMER          0x258
-#define __LC_EXIT_TIMER                 0x260
-#define __LC_USER_TIMER                 0x268
-#define __LC_SYSTEM_TIMER               0x270
-#define __LC_STEAL_TIMER                0x278
-#define __LC_LAST_UPDATE_TIMER          0x280
-#define __LC_LAST_UPDATE_CLOCK          0x288
-#define __LC_RETURN_MCCK_PSW            0x290
-#define __LC_KERNEL_STACK               0xD40
-#define __LC_THREAD_INFO                0xD48
-#define __LC_ASYNC_STACK                0xD50
-#define __LC_KERNEL_ASCE                0xD58
-#define __LC_USER_ASCE                  0xD60
-#define __LC_PANIC_STACK                0xD68
-#define __LC_CPUID                      0xD80
-#define __LC_CPUADDR                    0xD88
-#define __LC_IPLDEV                     0xDB8
-#define __LC_CURRENT                    0xDD8
-#define __LC_INT_CLOCK                  0xDE8
-#define __LC_VDSO_PER_CPU               0xE38
-#endif /* __s390x__ */
+#define __LC_SUBCHANNEL_ID              0x00b8
+#define __LC_SUBCHANNEL_NR              0x00ba
+#define __LC_IO_INT_PARM                0x00bc
+#define __LC_IO_INT_WORD                0x00c0
+#define __LC_MCCK_CODE                  0x00e8
 
-#define __LC_PASTE                      0xE40
+#define __LC_DUMP_REIPL                 0x0e00
 
-#define __LC_PANIC_MAGIC                0xE00
 #ifndef __s390x__
-#define __LC_PFAULT_INTPARM             0x080
-#define __LC_CPU_TIMER_SAVE_AREA        0x0D8
-#define __LC_CLOCK_COMP_SAVE_AREA       0x0E0
-#define __LC_PSW_SAVE_AREA              0x100
-#define __LC_PREFIX_SAVE_AREA           0x108
-#define __LC_AREGS_SAVE_AREA            0x120
-#define __LC_FPREGS_SAVE_AREA           0x160
-#define __LC_GPREGS_SAVE_AREA           0x180
-#define __LC_CREGS_SAVE_AREA            0x1C0
+#define __LC_EXT_OLD_PSW                0x0018
+#define __LC_SVC_OLD_PSW                0x0020
+#define __LC_PGM_OLD_PSW                0x0028
+#define __LC_MCK_OLD_PSW                0x0030
+#define __LC_IO_OLD_PSW                 0x0038
+#define __LC_EXT_NEW_PSW                0x0058
+#define __LC_SVC_NEW_PSW                0x0060
+#define __LC_PGM_NEW_PSW                0x0068
+#define __LC_MCK_NEW_PSW                0x0070
+#define __LC_IO_NEW_PSW                 0x0078
+#define __LC_SAVE_AREA                  0x0200
+#define __LC_RETURN_PSW                 0x0240
+#define __LC_RETURN_MCCK_PSW            0x0248
+#define __LC_SYNC_ENTER_TIMER           0x0250
+#define __LC_ASYNC_ENTER_TIMER          0x0258
+#define __LC_EXIT_TIMER                 0x0260
+#define __LC_USER_TIMER                 0x0268
+#define __LC_SYSTEM_TIMER               0x0270
+#define __LC_STEAL_TIMER                0x0278
+#define __LC_LAST_UPDATE_TIMER          0x0280
+#define __LC_LAST_UPDATE_CLOCK          0x0288
+#define __LC_CURRENT                    0x0290
+#define __LC_THREAD_INFO                0x0294
+#define __LC_KERNEL_STACK               0x0298
+#define __LC_ASYNC_STACK                0x029c
+#define __LC_PANIC_STACK                0x02a0
+#define __LC_KERNEL_ASCE                0x02a4
+#define __LC_USER_ASCE                  0x02a8
+#define __LC_USER_EXEC_ASCE             0x02ac
+#define __LC_CPUID                      0x02b0
+#define __LC_INT_CLOCK                  0x02c8
+#define __LC_IRB                        0x0300
+#define __LC_PFAULT_INTPARM             0x0080
+#define __LC_CPU_TIMER_SAVE_AREA        0x00d8
+#define __LC_CLOCK_COMP_SAVE_AREA       0x00e0
+#define __LC_PSW_SAVE_AREA              0x0100
+#define __LC_PREFIX_SAVE_AREA           0x0108
+#define __LC_AREGS_SAVE_AREA            0x0120
+#define __LC_FPREGS_SAVE_AREA           0x0160
+#define __LC_GPREGS_SAVE_AREA           0x0180
+#define __LC_CREGS_SAVE_AREA            0x01c0
 #else /* __s390x__ */
-#define __LC_PFAULT_INTPARM             0x11B8
+#define __LC_LAST_BREAK                 0x0110
+#define __LC_EXT_OLD_PSW                0x0130
+#define __LC_SVC_OLD_PSW                0x0140
+#define __LC_PGM_OLD_PSW                0x0150
+#define __LC_MCK_OLD_PSW                0x0160
+#define __LC_IO_OLD_PSW                 0x0170
+#define __LC_EXT_NEW_PSW                0x01b0
+#define __LC_SVC_NEW_PSW                0x01c0
+#define __LC_PGM_NEW_PSW                0x01d0
+#define __LC_MCK_NEW_PSW                0x01e0
+#define __LC_IO_NEW_PSW                 0x01f0
+#define __LC_SAVE_AREA                  0x0200
+#define __LC_RETURN_PSW                 0x0280
+#define __LC_RETURN_MCCK_PSW            0x0290
+#define __LC_SYNC_ENTER_TIMER           0x02a0
+#define __LC_ASYNC_ENTER_TIMER          0x02a8
+#define __LC_EXIT_TIMER                 0x02b0
+#define __LC_USER_TIMER                 0x02b8
+#define __LC_SYSTEM_TIMER               0x02c0
+#define __LC_STEAL_TIMER                0x02c8
+#define __LC_LAST_UPDATE_TIMER          0x02d0
+#define __LC_LAST_UPDATE_CLOCK          0x02d8
+#define __LC_CURRENT                    0x02e0
+#define __LC_THREAD_INFO                0x02e8
+#define __LC_KERNEL_STACK               0x02f0
+#define __LC_ASYNC_STACK                0x02f8
+#define __LC_PANIC_STACK                0x0300
+#define __LC_KERNEL_ASCE                0x0308
+#define __LC_USER_ASCE                  0x0310
+#define __LC_USER_EXEC_ASCE             0x0318
+#define __LC_CPUID                      0x0320
+#define __LC_INT_CLOCK                  0x0340
+#define __LC_VDSO_PER_CPU               0x0350
+#define __LC_IRB                        0x0380
+#define __LC_PASTE                      0x03c0
+#define __LC_PFAULT_INTPARM             0x11b8
 #define __LC_FPREGS_SAVE_AREA           0x1200
-#define __LC_GPREGS_SAVE_AREA           0x1280
+#define __LC_GPREGS_SAVE_AREA           0x1280
 #define __LC_PSW_SAVE_AREA              0x1300
 #define __LC_PREFIX_SAVE_AREA           0x1318
-#define __LC_FP_CREG_SAVE_AREA          0x131C
+#define __LC_FP_CREG_SAVE_AREA          0x131c
 #define __LC_TODREG_SAVE_AREA           0x1324
-#define __LC_CPU_TIMER_SAVE_AREA        0x1328
+#define __LC_CPU_TIMER_SAVE_AREA        0x1328
 #define __LC_CLOCK_COMP_SAVE_AREA       0x1331
-#define __LC_AREGS_SAVE_AREA            0x1340
-#define __LC_CREGS_SAVE_AREA            0x1380
+#define __LC_AREGS_SAVE_AREA            0x1340
+#define __LC_CREGS_SAVE_AREA            0x1380
 #endif /* __s390x__ */
 
 #ifndef __ASSEMBLY__
@@ -198,222 +187,240 @@ union save_area {
 struct _lowcore
 {
 #ifndef __s390x__
-        /* prefix area: defined by architecture */
-        psw_t        restart_psw;              /* 0x000 */
-        __u32        ccw2[4];                  /* 0x008 */
-        psw_t        external_old_psw;         /* 0x018 */
-        psw_t        svc_old_psw;              /* 0x020 */
-        psw_t        program_old_psw;          /* 0x028 */
-        psw_t        mcck_old_psw;             /* 0x030 */
-        psw_t        io_old_psw;               /* 0x038 */
-        __u8         pad1[0x58-0x40];          /* 0x040 */
-        psw_t        external_new_psw;         /* 0x058 */
-        psw_t        svc_new_psw;              /* 0x060 */
-        psw_t        program_new_psw;          /* 0x068 */
-        psw_t        mcck_new_psw;             /* 0x070 */
-        psw_t        io_new_psw;               /* 0x078 */
-        __u32        ext_params;               /* 0x080 */
-        __u16        cpu_addr;                 /* 0x084 */
-        __u16        ext_int_code;             /* 0x086 */
-        __u16        svc_ilc;                  /* 0x088 */
-        __u16        svc_code;                 /* 0x08a */
-        __u16        pgm_ilc;                  /* 0x08c */
-        __u16        pgm_code;                 /* 0x08e */
-        __u32        trans_exc_code;           /* 0x090 */
-        __u16        mon_class_num;            /* 0x094 */
-        __u16        per_perc_atmid;           /* 0x096 */
-        __u32        per_address;              /* 0x098 */
-        __u32        monitor_code;             /* 0x09c */
-        __u8         exc_access_id;            /* 0x0a0 */
-        __u8         per_access_id;            /* 0x0a1 */
-        __u8         pad2[0xB8-0xA2];          /* 0x0a2 */
-        __u16        subchannel_id;            /* 0x0b8 */
-        __u16        subchannel_nr;            /* 0x0ba */
-        __u32        io_int_parm;              /* 0x0bc */
-        __u32        io_int_word;              /* 0x0c0 */
-        __u8         pad3[0xc8-0xc4];          /* 0x0c4 */
-        __u32        stfl_fac_list;            /* 0x0c8 */
-        __u8         pad4[0xd4-0xcc];          /* 0x0cc */
-        __u32        extended_save_area_addr;  /* 0x0d4 */
-        __u32        cpu_timer_save_area[2];   /* 0x0d8 */
-        __u32        clock_comp_save_area[2];  /* 0x0e0 */
-        __u32        mcck_interruption_code[2]; /* 0x0e8 */
-        __u8         pad5[0xf4-0xf0];          /* 0x0f0 */
-        __u32        external_damage_code;     /* 0x0f4 */
-        __u32        failing_storage_address;  /* 0x0f8 */
-        __u8         pad6[0x100-0xfc];         /* 0x0fc */
-        __u32        st_status_fixed_logout[4];/* 0x100 */
-        __u8         pad7[0x120-0x110];        /* 0x110 */
-        __u32        access_regs_save_area[16];/* 0x120 */
-        __u32        floating_pt_save_area[8]; /* 0x160 */
-        __u32        gpregs_save_area[16];     /* 0x180 */
-        __u32        cregs_save_area[16];      /* 0x1c0 */      
-
-        psw_t        return_psw;               /* 0x200 */
-        __u8         irb[64];                  /* 0x208 */
-        __u64        sync_enter_timer;         /* 0x248 */
-        __u64        async_enter_timer;        /* 0x250 */
-        __u64        exit_timer;               /* 0x258 */
-        __u64        user_timer;               /* 0x260 */
-        __u64        system_timer;             /* 0x268 */
-        __u64        steal_timer;              /* 0x270 */
-        __u64        last_update_timer;        /* 0x278 */
-        __u64        last_update_clock;        /* 0x280 */
-        psw_t        return_mcck_psw;          /* 0x288 */
-        __u8         pad8[0xc00-0x290];        /* 0x290 */
-
-        /* System info area */
-        __u32        save_area[16];            /* 0xc00 */
-        __u32        kernel_stack;             /* 0xc40 */
-        __u32        thread_info;              /* 0xc44 */
-        __u32        async_stack;              /* 0xc48 */
-        __u32        kernel_asce;              /* 0xc4c */
-        __u32        user_asce;                /* 0xc50 */
-        __u32        panic_stack;              /* 0xc54 */
-        __u32        user_exec_asce;           /* 0xc58 */
-        __u8         pad10[0xc60-0xc5c];       /* 0xc5c */
-        /* entry.S sensitive area start */
-        struct       cpuinfo_S390 cpu_data;    /* 0xc60 */
-        __u32        ipl_device;               /* 0xc7c */
-        /* entry.S sensitive area end */
-
-        /* SMP info area: defined by DJB */
-        __u64        clock_comparator;         /* 0xc80 */
-        __u32        ext_call_fast;            /* 0xc88 */
-        __u32        percpu_offset;            /* 0xc8c */
-        __u32        current_task;             /* 0xc90 */
-        __u32        softirq_pending;          /* 0xc94 */
-        __u64        int_clock;                /* 0xc98 */
-        __u8         pad11[0xe00-0xca0];       /* 0xca0 */
-
-        /* 0xe00 is used as indicator for dump tools */
-        /* whether the kernel died with panic() or not */
-        __u32        panic_magic;              /* 0xe00 */
-
-        /* Align to the top 1k of prefix area */
-        __u8         pad12[0x1000-0xe04];      /* 0xe04 */
+        /* 0x0000 - 0x01ff: defined by architecture */
+        psw_t   restart_psw;                    /* 0x0000 */
+        __u32   ccw2[4];                        /* 0x0008 */
+        psw_t   external_old_psw;               /* 0x0018 */
+        psw_t   svc_old_psw;                    /* 0x0020 */
+        psw_t   program_old_psw;                /* 0x0028 */
+        psw_t   mcck_old_psw;                   /* 0x0030 */
+        psw_t   io_old_psw;                     /* 0x0038 */
+        __u8    pad_0x0040[0x0058-0x0040];      /* 0x0040 */
+        psw_t   external_new_psw;               /* 0x0058 */
+        psw_t   svc_new_psw;                    /* 0x0060 */
+        psw_t   program_new_psw;                /* 0x0068 */
+        psw_t   mcck_new_psw;                   /* 0x0070 */
+        psw_t   io_new_psw;                     /* 0x0078 */
+        __u32   ext_params;                     /* 0x0080 */
+        __u16   cpu_addr;                       /* 0x0084 */
+        __u16   ext_int_code;                   /* 0x0086 */
+        __u16   svc_ilc;                        /* 0x0088 */
+        __u16   svc_code;                       /* 0x008a */
+        __u16   pgm_ilc;                        /* 0x008c */
+        __u16   pgm_code;                       /* 0x008e */
+        __u32   trans_exc_code;                 /* 0x0090 */
+        __u16   mon_class_num;                  /* 0x0094 */
+        __u16   per_perc_atmid;                 /* 0x0096 */
+        __u32   per_address;                    /* 0x0098 */
+        __u32   monitor_code;                   /* 0x009c */
+        __u8    exc_access_id;                  /* 0x00a0 */
+        __u8    per_access_id;                  /* 0x00a1 */
+        __u8    pad_0x00a2[0x00b8-0x00a2];      /* 0x00a2 */
+        __u16   subchannel_id;                  /* 0x00b8 */
+        __u16   subchannel_nr;                  /* 0x00ba */
+        __u32   io_int_parm;                    /* 0x00bc */
+        __u32   io_int_word;                    /* 0x00c0 */
+        __u8    pad_0x00c4[0x00c8-0x00c4];      /* 0x00c4 */
+        __u32   stfl_fac_list;                  /* 0x00c8 */
+        __u8    pad_0x00cc[0x00d4-0x00cc];      /* 0x00cc */
+        __u32   extended_save_area_addr;        /* 0x00d4 */
+        __u32   cpu_timer_save_area[2];         /* 0x00d8 */
+        __u32   clock_comp_save_area[2];        /* 0x00e0 */
+        __u32   mcck_interruption_code[2];      /* 0x00e8 */
+        __u8    pad_0x00f0[0x00f4-0x00f0];      /* 0x00f0 */
+        __u32   external_damage_code;           /* 0x00f4 */
+        __u32   failing_storage_address;        /* 0x00f8 */
+        __u8    pad_0x00fc[0x0100-0x00fc];      /* 0x00fc */
+        __u32   st_status_fixed_logout[4];      /* 0x0100 */
+        __u8    pad_0x0110[0x0120-0x0110];      /* 0x0110 */
+
+        /* CPU register save area: defined by architecture */
+        __u32   access_regs_save_area[16];      /* 0x0120 */
+        __u32   floating_pt_save_area[8];       /* 0x0160 */
+        __u32   gpregs_save_area[16];           /* 0x0180 */
+        __u32   cregs_save_area[16];            /* 0x01c0 */
+
+        /* Return psws. */
+        __u32   save_area[16];                  /* 0x0200 */
+        psw_t   return_psw;                     /* 0x0240 */
+        psw_t   return_mcck_psw;                /* 0x0248 */
+
+        /* CPU time accounting values */
+        __u64   sync_enter_timer;               /* 0x0250 */
+        __u64   async_enter_timer;              /* 0x0258 */
+        __u64   exit_timer;                     /* 0x0260 */
+        __u64   user_timer;                     /* 0x0268 */
+        __u64   system_timer;                   /* 0x0270 */
+        __u64   steal_timer;                    /* 0x0278 */
+        __u64   last_update_timer;              /* 0x0280 */
+        __u64   last_update_clock;              /* 0x0288 */
+
+        /* Current process. */
+        __u32   current_task;                   /* 0x0290 */
+        __u32   thread_info;                    /* 0x0294 */
+        __u32   kernel_stack;                   /* 0x0298 */
+
+        /* Interrupt and panic stack. */
+        __u32   async_stack;                    /* 0x029c */
+        __u32   panic_stack;                    /* 0x02a0 */
+
+        /* Address space pointer. */
+        __u32   kernel_asce;                    /* 0x02a4 */
+        __u32   user_asce;                      /* 0x02a8 */
+        __u32   user_exec_asce;                 /* 0x02ac */
+
+        /* SMP info area */
+        cpuid_t cpu_id;                         /* 0x02b0 */
+        __u32   cpu_nr;                         /* 0x02b8 */
+        __u32   softirq_pending;                /* 0x02bc */
+        __u32   percpu_offset;                  /* 0x02c0 */
+        __u32   ext_call_fast;                  /* 0x02c4 */
+        __u64   int_clock;                      /* 0x02c8 */
+        __u64   clock_comparator;               /* 0x02d0 */
+        __u8    pad_0x02d8[0x0300-0x02d8];      /* 0x02d8 */
+
+        /* Interrupt response block */
+        __u8    irb[64];                        /* 0x0300 */
+
+        __u8    pad_0x0400[0x0e00-0x0400];      /* 0x0400 */
+
+        /*
+         * 0xe00 contains the address of the IPL Parameter Information
+         * block. Dump tools need IPIB for IPL after dump.
+         * Note: do not change the position of any fields in 0x0e00-0x0f00
+         */
+        __u32   ipib;                           /* 0x0e00 */
+        __u32   ipib_checksum;                  /* 0x0e04 */
+
+        /* Align to the top 1k of prefix area */
+        __u8    pad_0x0e08[0x1000-0x0e08];      /* 0x0e08 */
 #else /* !__s390x__ */
-        /* prefix area: defined by architecture */
-        __u32        ccw1[2];                  /* 0x000 */
-        __u32        ccw2[4];                  /* 0x008 */
-        __u8         pad1[0x80-0x18];          /* 0x018 */
-        __u32        ext_params;               /* 0x080 */
-        __u16        cpu_addr;                 /* 0x084 */
-        __u16        ext_int_code;             /* 0x086 */
-        __u16        svc_ilc;                  /* 0x088 */
-        __u16        svc_code;                 /* 0x08a */
-        __u16        pgm_ilc;                  /* 0x08c */
-        __u16        pgm_code;                 /* 0x08e */
-        __u32        data_exc_code;            /* 0x090 */
-        __u16        mon_class_num;            /* 0x094 */
-        __u16        per_perc_atmid;           /* 0x096 */
-        addr_t       per_address;              /* 0x098 */
-        __u8         exc_access_id;            /* 0x0a0 */
-        __u8         per_access_id;            /* 0x0a1 */
-        __u8         op_access_id;             /* 0x0a2 */
-        __u8         ar_access_id;             /* 0x0a3 */
-        __u8         pad2[0xA8-0xA4];          /* 0x0a4 */
-        addr_t       trans_exc_code;           /* 0x0A0 */
-        addr_t       monitor_code;             /* 0x09c */
-        __u16        subchannel_id;            /* 0x0b8 */
-        __u16        subchannel_nr;            /* 0x0ba */
-        __u32        io_int_parm;              /* 0x0bc */
-        __u32        io_int_word;              /* 0x0c0 */
-        __u8         pad3[0xc8-0xc4];          /* 0x0c4 */
-        __u32        stfl_fac_list;            /* 0x0c8 */
-        __u8         pad4[0xe8-0xcc];          /* 0x0cc */
-        __u32        mcck_interruption_code[2]; /* 0x0e8 */
-        __u8         pad5[0xf4-0xf0];          /* 0x0f0 */
-        __u32        external_damage_code;     /* 0x0f4 */
-        addr_t       failing_storage_address;  /* 0x0f8 */
-        __u8         pad6[0x120-0x100];        /* 0x100 */
-        psw_t        restart_old_psw;          /* 0x120 */
-        psw_t        external_old_psw;         /* 0x130 */
-        psw_t        svc_old_psw;              /* 0x140 */
-        psw_t        program_old_psw;          /* 0x150 */
-        psw_t        mcck_old_psw;             /* 0x160 */
-        psw_t        io_old_psw;               /* 0x170 */
-        __u8         pad7[0x1a0-0x180];        /* 0x180 */
-        psw_t        restart_psw;              /* 0x1a0 */
-        psw_t        external_new_psw;         /* 0x1b0 */
-        psw_t        svc_new_psw;              /* 0x1c0 */
-        psw_t        program_new_psw;          /* 0x1d0 */
-        psw_t        mcck_new_psw;             /* 0x1e0 */
-        psw_t        io_new_psw;               /* 0x1f0 */
-        psw_t        return_psw;               /* 0x200 */
-        __u8         irb[64];                  /* 0x210 */
-        __u64        sync_enter_timer;         /* 0x250 */
-        __u64        async_enter_timer;        /* 0x258 */
-        __u64        exit_timer;               /* 0x260 */
-        __u64        user_timer;               /* 0x268 */
-        __u64        system_timer;             /* 0x270 */
-        __u64        steal_timer;              /* 0x278 */
-        __u64        last_update_timer;        /* 0x280 */
-        __u64        last_update_clock;        /* 0x288 */
-        psw_t        return_mcck_psw;          /* 0x290 */
-        __u8         pad8[0xc00-0x2a0];        /* 0x2a0 */
-        /* System info area */
-        __u64        save_area[16];            /* 0xc00 */
-        __u8         pad9[0xd40-0xc80];        /* 0xc80 */
-        __u64        kernel_stack;             /* 0xd40 */
-        __u64        thread_info;              /* 0xd48 */
-        __u64        async_stack;              /* 0xd50 */
-        __u64        kernel_asce;              /* 0xd58 */
-        __u64        user_asce;                /* 0xd60 */
-        __u64        panic_stack;              /* 0xd68 */
-        __u64        user_exec_asce;           /* 0xd70 */
-        __u8         pad10[0xd80-0xd78];       /* 0xd78 */
-        /* entry.S sensitive area start */
-        struct       cpuinfo_S390 cpu_data;    /* 0xd80 */
-        __u32        ipl_device;               /* 0xdb8 */
-        __u32        pad11;                    /* 0xdbc */
-        /* entry.S sensitive area end */
-
-        /* SMP info area: defined by DJB */
-        __u64        clock_comparator;         /* 0xdc0 */
-        __u64        ext_call_fast;            /* 0xdc8 */
-        __u64        percpu_offset;            /* 0xdd0 */
-        __u64        current_task;             /* 0xdd8 */
-        __u32        softirq_pending;          /* 0xde0 */
-        __u32        pad_0x0de4;               /* 0xde4 */
-        __u64        int_clock;                /* 0xde8 */
-        __u8         pad12[0xe00-0xdf0];       /* 0xdf0 */
-
-        /* 0xe00 is used as indicator for dump tools */
-        /* whether the kernel died with panic() or not */
-        __u32        panic_magic;              /* 0xe00 */
+        /* 0x0000 - 0x01ff: defined by architecture */
+        __u32   ccw1[2];                        /* 0x0000 */
+        __u32   ccw2[4];                        /* 0x0008 */
+        __u8    pad_0x0018[0x0080-0x0018];      /* 0x0018 */
+        __u32   ext_params;                     /* 0x0080 */
+        __u16   cpu_addr;                       /* 0x0084 */
+        __u16   ext_int_code;                   /* 0x0086 */
+        __u16   svc_ilc;                        /* 0x0088 */
+        __u16   svc_code;                       /* 0x008a */
+        __u16   pgm_ilc;                        /* 0x008c */
+        __u16   pgm_code;                       /* 0x008e */
+        __u32   data_exc_code;                  /* 0x0090 */
+        __u16   mon_class_num;                  /* 0x0094 */
+        __u16   per_perc_atmid;                 /* 0x0096 */
+        addr_t  per_address;                    /* 0x0098 */
+        __u8    exc_access_id;                  /* 0x00a0 */
+        __u8    per_access_id;                  /* 0x00a1 */
+        __u8    op_access_id;                   /* 0x00a2 */
+        __u8    ar_access_id;                   /* 0x00a3 */
+        __u8    pad_0x00a4[0x00a8-0x00a4];      /* 0x00a4 */
+        addr_t  trans_exc_code;                 /* 0x00a8 */
+        addr_t  monitor_code;                   /* 0x00b0 */
+        __u16   subchannel_id;                  /* 0x00b8 */
+        __u16   subchannel_nr;                  /* 0x00ba */
+        __u32   io_int_parm;                    /* 0x00bc */
+        __u32   io_int_word;                    /* 0x00c0 */
+        __u8    pad_0x00c4[0x00c8-0x00c4];      /* 0x00c4 */
+        __u32   stfl_fac_list;                  /* 0x00c8 */
+        __u8    pad_0x00cc[0x00e8-0x00cc];      /* 0x00cc */
+        __u32   mcck_interruption_code[2];      /* 0x00e8 */
+        __u8    pad_0x00f0[0x00f4-0x00f0];      /* 0x00f0 */
+        __u32   external_damage_code;           /* 0x00f4 */
+        addr_t  failing_storage_address;        /* 0x00f8 */
+        __u8    pad_0x0100[0x0120-0x0100];      /* 0x0100 */
+        psw_t   restart_old_psw;                /* 0x0120 */
+        psw_t   external_old_psw;               /* 0x0130 */
+        psw_t   svc_old_psw;                    /* 0x0140 */
+        psw_t   program_old_psw;                /* 0x0150 */
+        psw_t   mcck_old_psw;                   /* 0x0160 */
+        psw_t   io_old_psw;                     /* 0x0170 */
+        __u8    pad_0x0180[0x01a0-0x0180];      /* 0x0180 */
+        psw_t   restart_psw;                    /* 0x01a0 */
+        psw_t   external_new_psw;               /* 0x01b0 */
+        psw_t   svc_new_psw;                    /* 0x01c0 */
+        psw_t   program_new_psw;                /* 0x01d0 */
+        psw_t   mcck_new_psw;                   /* 0x01e0 */
+        psw_t   io_new_psw;                     /* 0x01f0 */
+
+        /* Entry/exit save area & return psws. */
+        __u64   save_area[16];                  /* 0x0200 */
+        psw_t   return_psw;                     /* 0x0280 */
+        psw_t   return_mcck_psw;                /* 0x0290 */
+
+        /* CPU accounting and timing values. */
+        __u64   sync_enter_timer;               /* 0x02a0 */
+        __u64   async_enter_timer;              /* 0x02a8 */
+        __u64   exit_timer;                     /* 0x02b0 */
+        __u64   user_timer;                     /* 0x02b8 */
+        __u64   system_timer;                   /* 0x02c0 */
+        __u64   steal_timer;                    /* 0x02c8 */
+        __u64   last_update_timer;              /* 0x02d0 */
+        __u64   last_update_clock;              /* 0x02d8 */
+
+        /* Current process. */
+        __u64   current_task;                   /* 0x02e0 */
+        __u64   thread_info;                    /* 0x02e8 */
+        __u64   kernel_stack;                   /* 0x02f0 */
+
+        /* Interrupt and panic stack. */
+        __u64   async_stack;                    /* 0x02f8 */
+        __u64   panic_stack;                    /* 0x0300 */
+
+        /* Address space pointer. */
+        __u64   kernel_asce;                    /* 0x0308 */
+        __u64   user_asce;                      /* 0x0310 */
+        __u64   user_exec_asce;                 /* 0x0318 */
+
+        /* SMP info area */
+        cpuid_t cpu_id;                         /* 0x0320 */
+        __u32   cpu_nr;                         /* 0x0328 */
+        __u32   softirq_pending;                /* 0x032c */
+        __u64   percpu_offset;                  /* 0x0330 */
+        __u64   ext_call_fast;                  /* 0x0338 */
+        __u64   int_clock;                      /* 0x0340 */
+        __u64   clock_comparator;               /* 0x0348 */
+        __u64   vdso_per_cpu_data;              /* 0x0350 */
+        __u8    pad_0x0358[0x0380-0x0358];      /* 0x0358 */
+
+        /* Interrupt response block. */
+        __u8    irb[64];                        /* 0x0380 */
 
         /* Per cpu primary space access list */
-        __u8         pad_0xe04[0xe38-0xe04];   /* 0xe04 */
-        __u64        vdso_per_cpu_data;        /* 0xe38 */
-        __u32        paste[16];                /* 0xe40 */
-
-        __u8         pad13[0x11b8-0xe80];      /* 0xe80 */
-
-        /* 64 bit extparam used for pfault, diag 250 etc  */
-        __u64        ext_params2;               /* 0x11B8 */
-
-        __u8         pad14[0x1200-0x11C0];      /* 0x11C0 */
-
-        /* System info area */ 
-
-        __u64        floating_pt_save_area[16]; /* 0x1200 */
-        __u64        gpregs_save_area[16];      /* 0x1280 */
-        __u32        st_status_fixed_logout[4]; /* 0x1300 */
-        __u8         pad15[0x1318-0x1310];      /* 0x1310 */
-        __u32        prefixreg_save_area;       /* 0x1318 */
-        __u32        fpt_creg_save_area;        /* 0x131c */
-        __u8         pad16[0x1324-0x1320];      /* 0x1320 */
-        __u32        tod_progreg_save_area;     /* 0x1324 */
-        __u32        cpu_timer_save_area[2];    /* 0x1328 */
-        __u32        clock_comp_save_area[2];   /* 0x1330 */
-        __u8         pad17[0x1340-0x1338];      /* 0x1338 */
-        __u32        access_regs_save_area[16]; /* 0x1340 */ 
-        __u64        cregs_save_area[16];       /* 0x1380 */
+        __u32   paste[16];                      /* 0x03c0 */
+
+        __u8    pad_0x0400[0x0e00-0x0400];      /* 0x0400 */
+
+        /*
+         * 0xe00 contains the address of the IPL Parameter Information
+         * block. Dump tools need IPIB for IPL after dump.
+         * Note: do not change the position of any fields in 0x0e00-0x0f00
+         */
+        __u64   ipib;                           /* 0x0e00 */
+        __u32   ipib_checksum;                  /* 0x0e08 */
+        __u8    pad_0x0e0c[0x11b8-0x0e0c];      /* 0x0e0c */
+
+        /* 64 bit extparam used for pfault/diag 250: defined by architecture */
+        __u64   ext_params2;                    /* 0x11B8 */
+        __u8    pad_0x11c0[0x1200-0x11C0];      /* 0x11C0 */
+
+        /* CPU register save area: defined by architecture */
+        __u64   floating_pt_save_area[16];      /* 0x1200 */
+        __u64   gpregs_save_area[16];           /* 0x1280 */
+        __u32   st_status_fixed_logout[4];      /* 0x1300 */
+        __u8    pad_0x1310[0x1318-0x1310];      /* 0x1310 */
+        __u32   prefixreg_save_area;            /* 0x1318 */
+        __u32   fpt_creg_save_area;             /* 0x131c */
+        __u8    pad_0x1320[0x1324-0x1320];      /* 0x1320 */
+        __u32   tod_progreg_save_area;          /* 0x1324 */
+        __u32   cpu_timer_save_area[2];         /* 0x1328 */
+        __u32   clock_comp_save_area[2];        /* 0x1330 */
+        __u8    pad_0x1338[0x1340-0x1338];      /* 0x1338 */
+        __u32   access_regs_save_area[16];      /* 0x1340 */
+        __u64   cregs_save_area[16];            /* 0x1380 */
 
         /* align to the top of the prefix area */
-
-        __u8         pad18[0x2000-0x1400];      /* 0x1400 */
+        __u8    pad_0x1400[0x2000-0x1400];      /* 0x1400 */
 #endif /* !__s390x__ */
 } __attribute__((packed)); /* End structure*/
 
@@ -433,8 +440,6 @@ static inline __u32 store_prefix(void)
         return address;
 }
 
-#define __PANIC_MAGIC           0xDEADC0DE
-
 #endif
 
 #endif
diff --git a/arch/s390/include/asm/mman.h b/arch/s390/include/asm/mman.h
index 7839767d837e..da01432e8f44 100644
--- a/arch/s390/include/asm/mman.h
+++ b/arch/s390/include/asm/mman.h
@@ -22,4 +22,9 @@
 #define MCL_CURRENT     1               /* lock all current mappings */
 #define MCL_FUTURE      2               /* lock all future mappings */
 
+#if defined(__KERNEL__) && !defined(__ASSEMBLY__) && defined(CONFIG_64BIT)
+int s390_mmap_check(unsigned long addr, unsigned long len);
+#define arch_mmap_check(addr,len,flags) s390_mmap_check(addr,len)
+#endif
+
 #endif /* __S390_MMAN_H__ */
diff --git a/arch/s390/include/asm/mmu_context.h b/arch/s390/include/asm/mmu_context.h
index 28ec870655af..fc7edd6f41b6 100644
--- a/arch/s390/include/asm/mmu_context.h
+++ b/arch/s390/include/asm/mmu_context.h
@@ -74,7 +74,7 @@ static inline void update_mm(struct mm_struct *mm, struct task_struct *tsk)
 static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
                              struct task_struct *tsk)
 {
-        cpu_set(smp_processor_id(), next->cpu_vm_mask);
+        cpumask_set_cpu(smp_processor_id(), mm_cpumask(next));
         update_mm(next, tsk);
 }
 
diff --git a/arch/s390/include/asm/nmi.h b/arch/s390/include/asm/nmi.h
new file mode 100644
index 000000000000..f4b60441adca
--- /dev/null
+++ b/arch/s390/include/asm/nmi.h
@@ -0,0 +1,66 @@
+/*
+ *   Machine check handler definitions
+ *
+ *    Copyright IBM Corp. 2000,2009
+ *    Author(s): Ingo Adlung <adlung@de.ibm.com>,
+ *               Martin Schwidefsky <schwidefsky@de.ibm.com>,
+ *               Cornelia Huck <cornelia.huck@de.ibm.com>,
+ *               Heiko Carstens <heiko.carstens@de.ibm.com>,
+ */
+
+#ifndef _ASM_S390_NMI_H
+#define _ASM_S390_NMI_H
+
+#include <linux/types.h>
+
+struct mci {
+        __u32 sd :  1; /* 00 system damage */
+        __u32 pd :  1; /* 01 instruction-processing damage */
+        __u32 sr :  1; /* 02 system recovery */
+        __u32    :  1; /* 03 */
+        __u32 cd :  1; /* 04 timing-facility damage */
+        __u32 ed :  1; /* 05 external damage */
+        __u32    :  1; /* 06 */
+        __u32 dg :  1; /* 07 degradation */
+        __u32 w  :  1; /* 08 warning pending */
+        __u32 cp :  1; /* 09 channel-report pending */
+        __u32 sp :  1; /* 10 service-processor damage */
+        __u32 ck :  1; /* 11 channel-subsystem damage */
+        __u32    :  2; /* 12-13 */
+        __u32 b  :  1; /* 14 backed up */
+        __u32    :  1; /* 15 */
+        __u32 se :  1; /* 16 storage error uncorrected */
+        __u32 sc :  1; /* 17 storage error corrected */
+        __u32 ke :  1; /* 18 storage-key error uncorrected */
+        __u32 ds :  1; /* 19 storage degradation */
+        __u32 wp :  1; /* 20 psw mwp validity */
+        __u32 ms :  1; /* 21 psw mask and key validity */
+        __u32 pm :  1; /* 22 psw program mask and cc validity */
+        __u32 ia :  1; /* 23 psw instruction address validity */
+        __u32 fa :  1; /* 24 failing storage address validity */
+        __u32    :  1; /* 25 */
+        __u32 ec :  1; /* 26 external damage code validity */
+        __u32 fp :  1; /* 27 floating point register validity */
+        __u32 gr :  1; /* 28 general register validity */
+        __u32 cr :  1; /* 29 control register validity */
+        __u32    :  1; /* 30 */
+        __u32 st :  1; /* 31 storage logical validity */
+        __u32 ie :  1; /* 32 indirect storage error */
+        __u32 ar :  1; /* 33 access register validity */
+        __u32 da :  1; /* 34 delayed access exception */
+        __u32    :  7; /* 35-41 */
+        __u32 pr :  1; /* 42 tod programmable register validity */
+        __u32 fc :  1; /* 43 fp control register validity */
+        __u32 ap :  1; /* 44 ancillary report */
+        __u32    :  1; /* 45 */
+        __u32 ct :  1; /* 46 cpu timer validity */
+        __u32 cc :  1; /* 47 clock comparator validity */
+        __u32    : 16; /* 47-63 */
+};
+
+struct pt_regs;
+
+extern void s390_handle_mcck(void);
+extern void s390_do_machine_check(struct pt_regs *regs);
+
+#endif /* _ASM_S390_NMI_H */
diff --git a/arch/s390/include/asm/processor.h b/arch/s390/include/asm/processor.h
index 066b99502e09..61862b3ac794 100644
--- a/arch/s390/include/asm/processor.h
+++ b/arch/s390/include/asm/processor.h
@@ -42,26 +42,12 @@ static inline void get_cpu_id(cpuid_t *ptr)
         asm volatile("stidp 0(%1)" : "=m" (*ptr) : "a" (ptr));
 }
 
-struct cpuinfo_S390
-{
-        cpuid_t  cpu_id;
-        __u16    cpu_addr;
-        __u16    cpu_nr;
-        unsigned long loops_per_jiffy;
-        unsigned long *pgd_quick;
-#ifdef __s390x__
-        unsigned long *pmd_quick;
-#endif /* __s390x__ */
-        unsigned long *pte_quick;
-        unsigned long pgtable_cache_sz;
-};
-
 extern void s390_adjust_jiffies(void);
-extern void print_cpu_info(struct cpuinfo_S390 *);
+extern void print_cpu_info(void);
 extern int get_cpu_capability(unsigned int *);
 
 /*
- * User space process size: 2GB for 31 bit, 4TB for 64 bit.
+ * User space process size: 2GB for 31 bit, 4TB or 8PT for 64 bit.
  */
 #ifndef __s390x__
 
@@ -70,8 +56,7 @@ extern int get_cpu_capability(unsigned int *);
 
 #else /* __s390x__ */
 
-#define TASK_SIZE_OF(tsk)       (test_tsk_thread_flag(tsk,TIF_31BIT) ? \
-                                        (1UL << 31) : (1UL << 53))
+#define TASK_SIZE_OF(tsk)       ((tsk)->mm->context.asce_limit)
 #define TASK_UNMAPPED_BASE      (test_thread_flag(TIF_31BIT) ? \
                                         (1UL << 30) : (1UL << 41))
 #define TASK_SIZE               TASK_SIZE_OF(current)
diff --git a/arch/s390/include/asm/ptrace.h b/arch/s390/include/asm/ptrace.h
index 8920025c3c02..f1b051630c50 100644
--- a/arch/s390/include/asm/ptrace.h
+++ b/arch/s390/include/asm/ptrace.h
@@ -172,6 +172,8 @@
 #define NUM_CRS         16
 #define NUM_ACRS        16
 
+#define NUM_CR_WORDS    3
+
 #define FPR_SIZE        8
 #define FPC_SIZE        4
 #define FPC_PAD_SIZE    4 /* gcc insists on aligning the fpregs */
@@ -334,7 +336,7 @@ struct pt_regs
  */
 typedef struct
 {
-        unsigned long cr[3];
+        unsigned long cr[NUM_CR_WORDS];
 } per_cr_words;
 
 #define PER_EM_MASK 0xE8000000UL
diff --git a/arch/s390/include/asm/qdio.h b/arch/s390/include/asm/qdio.h
index 27fc1746de15..402d6dcf0d26 100644
--- a/arch/s390/include/asm/qdio.h
+++ b/arch/s390/include/asm/qdio.h
@@ -314,6 +314,7 @@ typedef void qdio_handler_t(struct ccw_device *, unsigned int, int,
                             int, int, unsigned long);
 
 /* qdio errors reported to the upper-layer program */
+#define QDIO_ERROR_SIGA_TARGET                  0x02
 #define QDIO_ERROR_SIGA_ACCESS_EXCEPTION        0x10
 #define QDIO_ERROR_SIGA_BUSY                    0x20
 #define QDIO_ERROR_ACTIVATE_CHECK_CONDITION     0x40
diff --git a/arch/s390/include/asm/smp.h b/arch/s390/include/asm/smp.h
index 024b91e06239..2009158a4502 100644
--- a/arch/s390/include/asm/smp.h
+++ b/arch/s390/include/asm/smp.h
@@ -50,12 +50,7 @@ extern void machine_power_off_smp(void);
  
 #define PROC_CHANGE_PENALTY     20              /* Schedule penalty */
 
-#define raw_smp_processor_id()  (S390_lowcore.cpu_data.cpu_nr)
-
-static inline __u16 hard_smp_processor_id(void)
-{
-        return stap();
-}
+#define raw_smp_processor_id()  (S390_lowcore.cpu_nr)
 
 /*
  * returns 1 if cpu is in stopped/check stopped state or not operational
diff --git a/arch/s390/include/asm/socket.h b/arch/s390/include/asm/socket.h
index c786ab623b2d..02330c50241b 100644
--- a/arch/s390/include/asm/socket.h
+++ b/arch/s390/include/asm/socket.h
@@ -62,4 +62,7 @@
 
 #define SO_MARK                 36
 
+#define SO_TIMESTAMPING         37
+#define SCM_TIMESTAMPING        SO_TIMESTAMPING
+
 #endif /* _ASM_SOCKET_H */
diff --git a/arch/s390/include/asm/string.h b/arch/s390/include/asm/string.h
index d074673a6d9b..cd0241db5a46 100644
--- a/arch/s390/include/asm/string.h
+++ b/arch/s390/include/asm/string.h
@@ -100,6 +100,7 @@ static inline char *strcat(char *dst, const char *src)
 
 static inline char *strcpy(char *dst, const char *src)
 {
+#if __GNUC__ < 4
         register int r0 asm("0") = 0;
         char *ret = dst;
 
@@ -109,10 +110,14 @@ static inline char *strcpy(char *dst, const char *src)
                 : "+&a" (dst), "+&a" (src) : "d" (r0)
                 : "cc", "memory");
         return ret;
+#else
+        return __builtin_strcpy(dst, src);
+#endif
 }
 
 static inline size_t strlen(const char *s)
 {
+#if __GNUC__ < 4
         register unsigned long r0 asm("0") = 0;
         const char *tmp = s;
 
@@ -121,6 +126,9 @@ static inline size_t strlen(const char *s)
                 "       jo      0b"
                 : "+d" (r0), "+a" (tmp) :  : "cc");
         return r0 - (unsigned long) s;
+#else
+        return __builtin_strlen(s);
+#endif
 }
 
 static inline size_t strnlen(const char * s, size_t n)
@@ -135,7 +143,13 @@ static inline size_t strnlen(const char * s, size_t n)
                 : "+a" (end), "+a" (tmp) : "d" (r0)  : "cc");
         return end - s;
 }
-
+#else /* IN_ARCH_STRING_C */
+void *memchr(const void * s, int c, size_t n);
+void *memscan(void *s, int c, size_t n);
+char *strcat(char *dst, const char *src);
+char *strcpy(char *dst, const char *src);
+size_t strlen(const char *s);
+size_t strnlen(const char * s, size_t n);
 #endif /* !IN_ARCH_STRING_C */
 
 #endif /* __KERNEL__ */
diff --git a/arch/s390/include/asm/sysinfo.h b/arch/s390/include/asm/sysinfo.h
index ad93212d9e16..9d70057d828c 100644
--- a/arch/s390/include/asm/sysinfo.h
+++ b/arch/s390/include/asm/sysinfo.h
@@ -100,6 +100,7 @@ struct sysinfo_3_2_2 {
                 char reserved_1[24];
 
         } vm[8];
+        char reserved_544[3552];
 };
 
 static inline int stsi(void *sysinfo, int fc, int sel1, int sel2)
diff --git a/arch/s390/include/asm/tlbflush.h b/arch/s390/include/asm/tlbflush.h
index d60394b9745e..304cffa623e1 100644
--- a/arch/s390/include/asm/tlbflush.h
+++ b/arch/s390/include/asm/tlbflush.h
@@ -51,7 +51,7 @@ static inline void __tlb_flush_full(struct mm_struct *mm)
          * If the process only ran on the local cpu, do a local flush.
          */
         local_cpumask = cpumask_of_cpu(smp_processor_id());
-        if (cpus_equal(mm->cpu_vm_mask, local_cpumask))
+        if (cpumask_equal(mm_cpumask(mm), &local_cpumask))
                 __tlb_flush_local();
         else
                 __tlb_flush_global();
@@ -73,7 +73,7 @@ static inline void __tlb_flush_idte(unsigned long asce)
 
 static inline void __tlb_flush_mm(struct mm_struct * mm)
 {
-        if (unlikely(cpus_empty(mm->cpu_vm_mask)))
+        if (unlikely(cpumask_empty(mm_cpumask(mm))))
                 return;
         /*
          * If the machine has IDTE we prefer to do a per mm flush
diff --git a/arch/s390/include/asm/topology.h b/arch/s390/include/asm/topology.h
index c93eb50e1d09..5e0ad618dc45 100644
--- a/arch/s390/include/asm/topology.h
+++ b/arch/s390/include/asm/topology.h
@@ -5,7 +5,6 @@
 
 #define mc_capable()    (1)
 
-cpumask_t cpu_coregroup_map(unsigned int cpu);
 const struct cpumask *cpu_coregroup_mask(unsigned int cpu);
 
 extern cpumask_t cpu_core_map[NR_CPUS];
@@ -30,6 +29,8 @@ static inline void s390_init_cpu_topology(void)
 };
 #endif
 
+#define SD_MC_INIT SD_CPU_INIT
+
 #include <asm-generic/topology.h>
 
 #endif /* _ASM_S390_TOPOLOGY_H */
diff --git a/arch/s390/include/asm/vtoc.h b/arch/s390/include/asm/vtoc.h
index 3a5267d90d29..8406a2b3157a 100644
--- a/arch/s390/include/asm/vtoc.h
+++ b/arch/s390/include/asm/vtoc.h
@@ -39,7 +39,7 @@ struct vtoc_labeldate
         __u16 day;
 } __attribute__ ((packed));
 
-struct vtoc_volume_label
+struct vtoc_volume_label_cdl
 {
         char volkey[4];         /* volume key = volume label */
         char vollbl[4];         /* volume label */
@@ -56,6 +56,14 @@ struct vtoc_volume_label
         char res3[29];          /* reserved */
 } __attribute__ ((packed));
 
+struct vtoc_volume_label_ldl {
+        char vollbl[4];         /* volume label */
+        char volid[6];          /* volume identifier */
+        char res3[69];          /* reserved */
+        char ldl_version;       /* version number, valid for ldl format */
+        __u64 formatted_blocks; /* valid when ldl_version >= f2  */
+} __attribute__ ((packed));
+
 struct vtoc_extent
 {
         __u8 typeind;                   /* extent type indicator */
@@ -140,7 +148,11 @@ struct vtoc_format4_label
         char res2[10];          /* reserved */
         __u8 DS4EFLVL;          /* extended free-space management level */
         struct vtoc_cchhb DS4EFPTR; /* pointer to extended free-space info */
-        char res3[9];           /* reserved */
+        char res3;              /* reserved */
+        __u32 DS4DCYL;          /* number of logical cyls */
+        char res4[2];           /* reserved */
+        __u8 DS4DEVF2;          /* device flags */
+        char res5;              /* reserved */
 } __attribute__ ((packed));
 
 struct vtoc_ds5ext
diff --git a/arch/s390/kernel/Makefile b/arch/s390/kernel/Makefile
index 3edc6c6f258b..228e3105ded7 100644
--- a/arch/s390/kernel/Makefile
+++ b/arch/s390/kernel/Makefile
@@ -17,10 +17,12 @@ CFLAGS_smp.o	:= -Wno-nonnull
 #
 CFLAGS_ptrace.o         += -DUTS_MACHINE='"$(UTS_MACHINE)"'
 
+CFLAGS_sysinfo.o += -Iinclude/math-emu -Iarch/s390/math-emu -w
+
 obj-y   :=  bitmap.o traps.o time.o process.o base.o early.o setup.o \
             processor.o sys_s390.o ptrace.o signal.o cpcmd.o ebcdic.o \
             s390_ext.o debug.o irq.o ipl.o dis.o diag.o mem_detect.o \
-            vdso.o vtime.o
+            vdso.o vtime.o sysinfo.o nmi.o
 
 obj-y   += $(if $(CONFIG_64BIT),entry64.o,entry.o)
 obj-y   += $(if $(CONFIG_64BIT),reipl64.o,reipl.o)
diff --git a/arch/s390/kernel/bitmap.S b/arch/s390/kernel/bitmap.S
deleted file mode 100644
index dfb41f946e23..000000000000
--- a/arch/s390/kernel/bitmap.S
+++ /dev/null
@@ -1,56 +0,0 @@
-/*
- *  arch/s390/kernel/bitmap.S
- *    Bitmaps for set_bit, clear_bit, test_and_set_bit, ...
- *    See include/asm-s390/{bitops.h|posix_types.h} for details
- *
- *  S390 version
- *    Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation
- *    Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
- */
-
-         .globl _oi_bitmap
-_oi_bitmap:
-         .byte  0x01,0x02,0x04,0x08,0x10,0x20,0x40,0x80
-
-         .globl _ni_bitmap
-_ni_bitmap:
-         .byte  0xFE,0xFD,0xFB,0xF7,0xEF,0xDF,0xBF,0x7F
-
-         .globl _zb_findmap
-_zb_findmap:
-         .byte  0,1,0,2,0,1,0,3,0,1,0,2,0,1,0,4
-         .byte  0,1,0,2,0,1,0,3,0,1,0,2,0,1,0,5
-         .byte  0,1,0,2,0,1,0,3,0,1,0,2,0,1,0,4 
-         .byte  0,1,0,2,0,1,0,3,0,1,0,2,0,1,0,6
-         .byte  0,1,0,2,0,1,0,3,0,1,0,2,0,1,0,4
-         .byte  0,1,0,2,0,1,0,3,0,1,0,2,0,1,0,5
-         .byte  0,1,0,2,0,1,0,3,0,1,0,2,0,1,0,4
-         .byte  0,1,0,2,0,1,0,3,0,1,0,2,0,1,0,7
-         .byte  0,1,0,2,0,1,0,3,0,1,0,2,0,1,0,4
-         .byte  0,1,0,2,0,1,0,3,0,1,0,2,0,1,0,5
-         .byte  0,1,0,2,0,1,0,3,0,1,0,2,0,1,0,4
-         .byte  0,1,0,2,0,1,0,3,0,1,0,2,0,1,0,6
-         .byte  0,1,0,2,0,1,0,3,0,1,0,2,0,1,0,4
-         .byte  0,1,0,2,0,1,0,3,0,1,0,2,0,1,0,5
-         .byte  0,1,0,2,0,1,0,3,0,1,0,2,0,1,0,4
-         .byte  0,1,0,2,0,1,0,3,0,1,0,2,0,1,0,8
-
-         .globl _sb_findmap
-_sb_findmap:
-         .byte  8,0,1,0,2,0,1,0,3,0,1,0,2,0,1,0
-         .byte  4,0,1,0,2,0,1,0,3,0,1,0,2,0,1,0
-         .byte  5,0,1,0,2,0,1,0,3,0,1,0,2,0,1,0
-         .byte  4,0,1,0,2,0,1,0,3,0,1,0,2,0,1,0
-         .byte  6,0,1,0,2,0,1,0,3,0,1,0,2,0,1,0
-         .byte  4,0,1,0,2,0,1,0,3,0,1,0,2,0,1,0
-         .byte  5,0,1,0,2,0,1,0,3,0,1,0,2,0,1,0
-         .byte  4,0,1,0,2,0,1,0,3,0,1,0,2,0,1,0
-         .byte  7,0,1,0,2,0,1,0,3,0,1,0,2,0,1,0
-         .byte  4,0,1,0,2,0,1,0,3,0,1,0,2,0,1,0
-         .byte  5,0,1,0,2,0,1,0,3,0,1,0,2,0,1,0
-         .byte  4,0,1,0,2,0,1,0,3,0,1,0,2,0,1,0
-         .byte  6,0,1,0,2,0,1,0,3,0,1,0,2,0,1,0
-         .byte  4,0,1,0,2,0,1,0,3,0,1,0,2,0,1,0
-         .byte  5,0,1,0,2,0,1,0,3,0,1,0,2,0,1,0
-         .byte  4,0,1,0,2,0,1,0,3,0,1,0,2,0,1,0
-
diff --git a/arch/s390/kernel/bitmap.c b/arch/s390/kernel/bitmap.c
new file mode 100644
index 000000000000..3ae4757b006a
--- /dev/null
+++ b/arch/s390/kernel/bitmap.c
@@ -0,0 +1,54 @@
+/*
+ *    Bitmaps for set_bit, clear_bit, test_and_set_bit, ...
+ *    See include/asm/{bitops.h|posix_types.h} for details
+ *
+ *    Copyright IBM Corp. 1999,2009
+ *    Author(s): Martin Schwidefsky <schwidefsky@de.ibm.com>,
+ */
+
+#include <linux/bitops.h>
+#include <linux/module.h>
+
+const char _oi_bitmap[] = { 0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80 };
+EXPORT_SYMBOL(_oi_bitmap);
+
+const char _ni_bitmap[] = { 0xfe, 0xfd, 0xfb, 0xf7, 0xef, 0xdf, 0xbf, 0x7f };
+EXPORT_SYMBOL(_ni_bitmap);
+
+const char _zb_findmap[] = {
+        0,1,0,2,0,1,0,3,0,1,0,2,0,1,0,4,
+        0,1,0,2,0,1,0,3,0,1,0,2,0,1,0,5,
+        0,1,0,2,0,1,0,3,0,1,0,2,0,1,0,4,
+        0,1,0,2,0,1,0,3,0,1,0,2,0,1,0,6,
+        0,1,0,2,0,1,0,3,0,1,0,2,0,1,0,4,
+        0,1,0,2,0,1,0,3,0,1,0,2,0,1,0,5,
+        0,1,0,2,0,1,0,3,0,1,0,2,0,1,0,4,
+        0,1,0,2,0,1,0,3,0,1,0,2,0,1,0,7,
+        0,1,0,2,0,1,0,3,0,1,0,2,0,1,0,4,
+        0,1,0,2,0,1,0,3,0,1,0,2,0,1,0,5,
+        0,1,0,2,0,1,0,3,0,1,0,2,0,1,0,4,
+        0,1,0,2,0,1,0,3,0,1,0,2,0,1,0,6,
+        0,1,0,2,0,1,0,3,0,1,0,2,0,1,0,4,
+        0,1,0,2,0,1,0,3,0,1,0,2,0,1,0,5,
+        0,1,0,2,0,1,0,3,0,1,0,2,0,1,0,4,
+        0,1,0,2,0,1,0,3,0,1,0,2,0,1,0,8 };
+EXPORT_SYMBOL(_zb_findmap);
+
+const char _sb_findmap[] = {
+        8,0,1,0,2,0,1,0,3,0,1,0,2,0,1,0,
+        4,0,1,0,2,0,1,0,3,0,1,0,2,0,1,0,
+        5,0,1,0,2,0,1,0,3,0,1,0,2,0,1,0,
+        4,0,1,0,2,0,1,0,3,0,1,0,2,0,1,0,
+        6,0,1,0,2,0,1,0,3,0,1,0,2,0,1,0,
+        4,0,1,0,2,0,1,0,3,0,1,0,2,0,1,0,
+        5,0,1,0,2,0,1,0,3,0,1,0,2,0,1,0,
+        4,0,1,0,2,0,1,0,3,0,1,0,2,0,1,0,
+        7,0,1,0,2,0,1,0,3,0,1,0,2,0,1,0,
+        4,0,1,0,2,0,1,0,3,0,1,0,2,0,1,0,
+        5,0,1,0,2,0,1,0,3,0,1,0,2,0,1,0,
+        4,0,1,0,2,0,1,0,3,0,1,0,2,0,1,0,
+        6,0,1,0,2,0,1,0,3,0,1,0,2,0,1,0,
+        4,0,1,0,2,0,1,0,3,0,1,0,2,0,1,0,
+        5,0,1,0,2,0,1,0,3,0,1,0,2,0,1,0,
+        4,0,1,0,2,0,1,0,3,0,1,0,2,0,1,0 };
+EXPORT_SYMBOL(_sb_findmap);
diff --git a/arch/s390/kernel/compat_ptrace.h b/arch/s390/kernel/compat_ptrace.h
index a2be3a978d5c..123dd660d7fb 100644
--- a/arch/s390/kernel/compat_ptrace.h
+++ b/arch/s390/kernel/compat_ptrace.h
@@ -1,10 +1,11 @@
 #ifndef _PTRACE32_H
 #define _PTRACE32_H
 
+#include <asm/ptrace.h>    /* needed for NUM_CR_WORDS */
 #include "compat_linux.h"  /* needed for psw_compat_t */
 
 typedef struct {
-        __u32 cr[3];
+        __u32 cr[NUM_CR_WORDS];
 } per_cr_words32;
 
 typedef struct {
diff --git a/arch/s390/kernel/compat_wrapper.S b/arch/s390/kernel/compat_wrapper.S
index 62c706eb0de6..87cf5a79a351 100644
--- a/arch/s390/kernel/compat_wrapper.S
+++ b/arch/s390/kernel/compat_wrapper.S
@@ -252,7 +252,7 @@ sys32_chroot_wrapper:
 sys32_ustat_wrapper:
         llgfr   %r2,%r2                 # dev_t
         llgtr   %r3,%r3                 # struct ustat *
-        jg      sys_ustat
+        jg      compat_sys_ustat
 
         .globl  sys32_dup2_wrapper
 sys32_dup2_wrapper:
diff --git a/arch/s390/kernel/debug.c b/arch/s390/kernel/debug.c
index ba03fc0a3a56..be8bceaf37d9 100644
--- a/arch/s390/kernel/debug.c
+++ b/arch/s390/kernel/debug.c
@@ -603,7 +603,7 @@ debug_input(struct file *file, const char __user *user_buf, size_t length,
 static int
 debug_open(struct inode *inode, struct file *file)
 {
-        int i = 0, rc = 0;
+        int i, rc = 0;
         file_private_info_t *p_info;
         debug_info_t *debug_info, *debug_info_snapshot;
 
@@ -642,8 +642,7 @@ found:
         p_info = kmalloc(sizeof(file_private_info_t),
                                                 GFP_KERNEL);
         if(!p_info){
-                if(debug_info_snapshot)
-                        debug_info_free(debug_info_snapshot);
+                debug_info_free(debug_info_snapshot);
                 rc = -ENOMEM;
                 goto out;
         }
@@ -698,8 +697,7 @@ debug_info_t *debug_register_mode(const char *name, int pages_per_area,
         if ((uid != 0) || (gid != 0))
                 pr_warning("Root becomes the owner of all s390dbf files "
                            "in sysfs\n");
-        if (!initialized)
-                BUG();
+        BUG_ON(!initialized);
         mutex_lock(&debug_mutex);
 
         /* create new debug_info */
@@ -1156,7 +1154,6 @@ debug_unregister_view(debug_info_t * id, struct debug_view *view)
         else {
                 debugfs_remove(id->debugfs_entries[i]);
                 id->views[i] = NULL;
-                rc = 0;
         }
         spin_unlock_irqrestore(&id->lock, flags);
 out:
diff --git a/arch/s390/kernel/early.c b/arch/s390/kernel/early.c
index 2a2ca268b1dd..4d221c81c849 100644
--- a/arch/s390/kernel/early.c
+++ b/arch/s390/kernel/early.c
@@ -6,6 +6,7 @@
  *               Heiko Carstens <heiko.carstens@de.ibm.com>
  */
 
+#include <linux/compiler.h>
 #include <linux/init.h>
 #include <linux/errno.h>
 #include <linux/string.h>
@@ -20,6 +21,7 @@
 #include <asm/processor.h>
 #include <asm/sections.h>
 #include <asm/setup.h>
+#include <asm/sysinfo.h>
 #include <asm/cpcmd.h>
 #include <asm/sclp.h>
 #include "entry.h"
@@ -173,19 +175,21 @@ static noinline __init void init_kernel_storage_key(void)
                 page_set_storage_key(init_pfn << PAGE_SHIFT, PAGE_DEFAULT_KEY);
 }
 
+static __initdata struct sysinfo_3_2_2 vmms __aligned(PAGE_SIZE);
+
 static noinline __init void detect_machine_type(void)
 {
-        struct cpuinfo_S390 *cpuinfo = &S390_lowcore.cpu_data;
-
-        get_cpu_id(&S390_lowcore.cpu_data.cpu_id);
-
-        /* Running under z/VM ? */
-        if (cpuinfo->cpu_id.version == 0xff)
-                machine_flags |= MACHINE_FLAG_VM;
+        /* No VM information? Looks like LPAR */
+        if (stsi(&vmms, 3, 2, 2) == -ENOSYS)
+                return;
+        if (!vmms.count)
+                return;
 
-        /* Running under KVM ? */
-        if (cpuinfo->cpu_id.version == 0xfe)
+        /* Running under KVM? If not we assume z/VM */
+        if (!memcmp(vmms.vm[0].cpi, "\xd2\xe5\xd4", 3))
                 machine_flags |= MACHINE_FLAG_KVM;
+        else
+                machine_flags |= MACHINE_FLAG_VM;
 }
 
 static __init void early_pgm_check_handler(void)
@@ -348,7 +352,6 @@ static void __init setup_boot_command_line(void)
 
         /* copy arch command line */
         strlcpy(boot_command_line, COMMAND_LINE, ARCH_COMMAND_LINE_SIZE);
-        boot_command_line[ARCH_COMMAND_LINE_SIZE - 1] = 0;
 
         /* append IPL PARM data to the boot command line */
         if (MACHINE_IS_VM) {
diff --git a/arch/s390/kernel/head.S b/arch/s390/kernel/head.S
index ec7e35f6055b..1046c2c9f8d1 100644
--- a/arch/s390/kernel/head.S
+++ b/arch/s390/kernel/head.S
@@ -469,6 +469,8 @@ start:
         .org    0x10000
 startup:basr    %r13,0                  # get base
 .LPG0:
+        xc      0x200(256),0x200        # partially clear lowcore
+        xc      0x300(256),0x300
 
 #ifndef CONFIG_MARCH_G5
         # check processor version against MARCH_{G5,Z900,Z990,Z9_109,Z10}
diff --git a/arch/s390/kernel/head31.S b/arch/s390/kernel/head31.S
index db476d114caa..2ced846065b7 100644
--- a/arch/s390/kernel/head31.S
+++ b/arch/s390/kernel/head31.S
@@ -20,7 +20,6 @@ startup_continue:
         lctl    %c0,%c15,.Lctl-.LPG1(%r13) # load control registers
         l       %r12,.Lparmaddr-.LPG1(%r13) # pointer to parameter area
                                         # move IPL device to lowcore
-        mvc     __LC_IPLDEV(4),IPL_DEVICE-PARMAREA(%r12)
 #
 # Setup stack
 #
diff --git a/arch/s390/kernel/head64.S b/arch/s390/kernel/head64.S
index f9f70aa15244..65667b2e65ce 100644
--- a/arch/s390/kernel/head64.S
+++ b/arch/s390/kernel/head64.S
@@ -86,7 +86,6 @@ startup_continue:
         lctlg   %c0,%c15,.Lctl-.LPG1(%r13)      # load control registers
         lg      %r12,.Lparmaddr-.LPG1(%r13)     # pointer to parameter area
                                         # move IPL device to lowcore
-        mvc     __LC_IPLDEV(4),IPL_DEVICE+4-PARMAREA(%r12)
         lghi    %r0,__LC_PASTE
         stg     %r0,__LC_VDSO_PER_CPU
 #
diff --git a/arch/s390/kernel/ipl.c b/arch/s390/kernel/ipl.c
index 2dcf590faba6..6f3711a0eaaa 100644
--- a/arch/s390/kernel/ipl.c
+++ b/arch/s390/kernel/ipl.c
@@ -23,7 +23,7 @@
 #include <asm/ebcdic.h>
 #include <asm/reset.h>
 #include <asm/sclp.h>
-#include <asm/setup.h>
+#include <asm/checksum.h>
 
 #define IPL_PARM_BLOCK_VERSION 0
 
@@ -56,13 +56,14 @@ struct shutdown_trigger {
 };
 
 /*
- * Five shutdown action types are supported:
+ * The following shutdown action types are supported:
  */
 #define SHUTDOWN_ACTION_IPL_STR         "ipl"
 #define SHUTDOWN_ACTION_REIPL_STR       "reipl"
 #define SHUTDOWN_ACTION_DUMP_STR        "dump"
 #define SHUTDOWN_ACTION_VMCMD_STR       "vmcmd"
 #define SHUTDOWN_ACTION_STOP_STR        "stop"
+#define SHUTDOWN_ACTION_DUMP_REIPL_STR  "dump_reipl"
 
 struct shutdown_action {
         char *name;
@@ -146,6 +147,7 @@ static enum ipl_method reipl_method = REIPL_METHOD_DEFAULT;
 static struct ipl_parameter_block *reipl_block_fcp;
 static struct ipl_parameter_block *reipl_block_ccw;
 static struct ipl_parameter_block *reipl_block_nss;
+static struct ipl_parameter_block *reipl_block_actual;
 
 static int dump_capabilities = DUMP_TYPE_NONE;
 static enum dump_type dump_type = DUMP_TYPE_NONE;
@@ -835,6 +837,7 @@ static int reipl_set_type(enum ipl_type type)
                         reipl_method = REIPL_METHOD_CCW_VM;
                 else
                         reipl_method = REIPL_METHOD_CCW_CIO;
+                reipl_block_actual = reipl_block_ccw;
                 break;
         case IPL_TYPE_FCP:
                 if (diag308_set_works)
@@ -843,6 +846,7 @@ static int reipl_set_type(enum ipl_type type)
                         reipl_method = REIPL_METHOD_FCP_RO_VM;
                 else
                         reipl_method = REIPL_METHOD_FCP_RO_DIAG;
+                reipl_block_actual = reipl_block_fcp;
                 break;
         case IPL_TYPE_FCP_DUMP:
                 reipl_method = REIPL_METHOD_FCP_DUMP;
@@ -852,6 +856,7 @@ static int reipl_set_type(enum ipl_type type)
                         reipl_method = REIPL_METHOD_NSS_DIAG;
                 else
                         reipl_method = REIPL_METHOD_NSS;
+                reipl_block_actual = reipl_block_nss;
                 break;
         case IPL_TYPE_UNKNOWN:
                 reipl_method = REIPL_METHOD_DEFAULT;
@@ -960,7 +965,6 @@ static void reipl_run(struct shutdown_trigger *trigger)
                 diag308(DIAG308_IPL, NULL);
                 break;
         case REIPL_METHOD_FCP_DUMP:
-        default:
                 break;
         }
         disabled_wait((unsigned long) __builtin_return_address(0));
@@ -1069,10 +1073,12 @@ static int __init reipl_fcp_init(void)
 {
         int rc;
 
-        if ((!diag308_set_works) && (ipl_info.type != IPL_TYPE_FCP))
-                return 0;
-        if ((!diag308_set_works) && (ipl_info.type == IPL_TYPE_FCP))
-                make_attrs_ro(reipl_fcp_attrs);
+        if (!diag308_set_works) {
+                if (ipl_info.type == IPL_TYPE_FCP)
+                        make_attrs_ro(reipl_fcp_attrs);
+                else
+                        return 0;
+        }
 
         reipl_block_fcp = (void *) get_zeroed_page(GFP_KERNEL);
         if (!reipl_block_fcp)
@@ -1253,7 +1259,6 @@ static void dump_run(struct shutdown_trigger *trigger)
                 diag308(DIAG308_DUMP, NULL);
                 break;
         case DUMP_METHOD_NONE:
-        default:
                 return;
         }
         printk(KERN_EMERG "Dump failed!\n");
@@ -1332,6 +1337,49 @@ static struct shutdown_action __refdata dump_action = {
         .init   = dump_init,
 };
 
+static void dump_reipl_run(struct shutdown_trigger *trigger)
+{
+        preempt_disable();
+        /*
+         * Bypass dynamic address translation (DAT) when storing IPL parameter
+         * information block address and checksum into the prefix area
+         * (corresponding to absolute addresses 0-8191).
+         * When enhanced DAT applies and the STE format control in one,
+         * the absolute address is formed without prefixing. In this case a
+         * normal store (stg/st) into the prefix area would no more match to
+         * absolute addresses 0-8191.
+         */
+#ifdef CONFIG_64BIT
+        asm volatile("sturg %0,%1"
+                :: "a" ((unsigned long) reipl_block_actual),
+                "a" (&lowcore_ptr[smp_processor_id()]->ipib));
+#else
+        asm volatile("stura %0,%1"
+                :: "a" ((unsigned long) reipl_block_actual),
+                "a" (&lowcore_ptr[smp_processor_id()]->ipib));
+#endif
+        asm volatile("stura %0,%1"
+                :: "a" (csum_partial(reipl_block_actual,
+                                     reipl_block_actual->hdr.len, 0)),
+                "a" (&lowcore_ptr[smp_processor_id()]->ipib_checksum));
+        preempt_enable();
+        dump_run(trigger);
+}
+
+static int __init dump_reipl_init(void)
+{
+        if (!diag308_set_works)
+                return -EOPNOTSUPP;
+        else
+                return 0;
+}
+
+static struct shutdown_action __refdata dump_reipl_action = {
+        .name   = SHUTDOWN_ACTION_DUMP_REIPL_STR,
+        .fn     = dump_reipl_run,
+        .init   = dump_reipl_init,
+};
+
 /*
  * vmcmd shutdown action: Trigger vm command on shutdown.
  */
@@ -1421,7 +1469,8 @@ static struct shutdown_action stop_action = {SHUTDOWN_ACTION_STOP_STR,
 /* action list */
 
 static struct shutdown_action *shutdown_actions_list[] = {
-        &ipl_action, &reipl_action, &dump_action, &vmcmd_action, &stop_action};
+        &ipl_action, &reipl_action, &dump_reipl_action, &dump_action,
+        &vmcmd_action, &stop_action};
 #define SHUTDOWN_ACTIONS_COUNT (sizeof(shutdown_actions_list) / sizeof(void *))
 
 /*
@@ -1434,11 +1483,11 @@ static int set_trigger(const char *buf, struct shutdown_trigger *trigger,
                        size_t len)
 {
         int i;
+
         for (i = 0; i < SHUTDOWN_ACTIONS_COUNT; i++) {
                 if (!shutdown_actions_list[i])
                         continue;
-                if (strncmp(buf, shutdown_actions_list[i]->name,
-                            strlen(shutdown_actions_list[i]->name)) == 0) {
+                if (sysfs_streq(buf, shutdown_actions_list[i]->name)) {
                         trigger->action = shutdown_actions_list[i];
                         return len;
                 }
@@ -1672,7 +1721,7 @@ static int on_panic_notify(struct notifier_block *self,
 
 static struct notifier_block on_panic_nb = {
         .notifier_call = on_panic_notify,
-        .priority = 0,
+        .priority = INT_MIN,
 };
 
 void __init setup_ipl(void)
@@ -1696,7 +1745,6 @@ void __init setup_ipl(void)
                         sizeof(ipl_info.data.nss.name));
                 break;
         case IPL_TYPE_UNKNOWN:
-        default:
                 /* We have no info to copy */
                 break;
         }
diff --git a/arch/s390/kernel/mcount.S b/arch/s390/kernel/mcount.S
index 397d131a345f..80641224a095 100644
--- a/arch/s390/kernel/mcount.S
+++ b/arch/s390/kernel/mcount.S
@@ -5,6 +5,8 @@
  *
  */
 
+#include <asm/asm-offsets.h>
+
 #ifndef CONFIG_64BIT
 .globl _mcount
 _mcount:
@@ -14,7 +16,7 @@ _mcount:
         ahi     %r15,-96
         l       %r3,100(%r15)
         la      %r2,0(%r14)
-        st      %r1,0(%r15)
+        st      %r1,__SF_BACKCHAIN(%r15)
         la      %r3,0(%r3)
         bras    %r14,0f
         .long   ftrace_trace_function
@@ -38,7 +40,7 @@ _mcount:
         stg     %r14,112(%r15)
         lgr     %r1,%r15
         aghi    %r15,-160
-        stg     %r1,0(%r15)
+        stg     %r1,__SF_BACKCHAIN(%r15)
         lgr     %r2,%r14
         lg      %r3,168(%r15)
         larl    %r14,ftrace_trace_function
diff --git a/arch/s390/kernel/module.c b/arch/s390/kernel/module.c
index 59b4e796680a..eed4a00cb676 100644
--- a/arch/s390/kernel/module.c
+++ b/arch/s390/kernel/module.c
@@ -310,15 +310,20 @@ apply_rela(Elf_Rela *rela, Elf_Addr base, Elf_Sym *symtab,
                         info->plt_initialized = 1;
                 }
                 if (r_type == R_390_PLTOFF16 ||
-                    r_type == R_390_PLTOFF32
-                    || r_type == R_390_PLTOFF64
-                        )
+                    r_type == R_390_PLTOFF32 ||
+                    r_type == R_390_PLTOFF64)
                         val = me->arch.plt_offset - me->arch.got_offset +
                                 info->plt_offset + rela->r_addend;
-                else
-                        val =  (Elf_Addr) me->module_core +
-                                me->arch.plt_offset + info->plt_offset + 
-                                rela->r_addend - loc;
+                else {
+                        if (!((r_type == R_390_PLT16DBL &&
+                               val - loc + 0xffffUL < 0x1ffffeUL) ||
+                              (r_type == R_390_PLT32DBL &&
+                               val - loc + 0xffffffffULL < 0x1fffffffeULL)))
+                                val = (Elf_Addr) me->module_core +
+                                        me->arch.plt_offset +
+                                        info->plt_offset;
+                        val += rela->r_addend - loc;
+                }
                 if (r_type == R_390_PLT16DBL)
                         *(unsigned short *) loc = val >> 1;
                 else if (r_type == R_390_PLTOFF16)
diff --git a/arch/s390/kernel/nmi.c b/arch/s390/kernel/nmi.c
new file mode 100644
index 000000000000..4bfdc421d7e9
--- /dev/null
+++ b/arch/s390/kernel/nmi.c
@@ -0,0 +1,376 @@
+/*
+ *   Machine check handler
+ *
+ *    Copyright IBM Corp. 2000,2009
+ *    Author(s): Ingo Adlung <adlung@de.ibm.com>,
+ *               Martin Schwidefsky <schwidefsky@de.ibm.com>,
+ *               Cornelia Huck <cornelia.huck@de.ibm.com>,
+ *               Heiko Carstens <heiko.carstens@de.ibm.com>,
+ */
+
+#include <linux/init.h>
+#include <linux/errno.h>
+#include <linux/time.h>
+#include <linux/module.h>
+#include <asm/lowcore.h>
+#include <asm/smp.h>
+#include <asm/etr.h>
+#include <asm/cpu.h>
+#include <asm/nmi.h>
+#include <asm/crw.h>
+
+struct mcck_struct {
+        int kill_task;
+        int channel_report;
+        int warning;
+        unsigned long long mcck_code;
+};
+
+static DEFINE_PER_CPU(struct mcck_struct, cpu_mcck);
+
+static NORET_TYPE void s390_handle_damage(char *msg)
+{
+        smp_send_stop();
+        disabled_wait((unsigned long) __builtin_return_address(0));
+        while (1);
+}
+
+/*
+ * Main machine check handler function. Will be called with interrupts enabled
+ * or disabled and machine checks enabled or disabled.
+ */
+void s390_handle_mcck(void)
+{
+        unsigned long flags;
+        struct mcck_struct mcck;
+
+        /*
+         * Disable machine checks and get the current state of accumulated
+         * machine checks. Afterwards delete the old state and enable machine
+         * checks again.
+         */
+        local_irq_save(flags);
+        local_mcck_disable();
+        mcck = __get_cpu_var(cpu_mcck);
+        memset(&__get_cpu_var(cpu_mcck), 0, sizeof(struct mcck_struct));
+        clear_thread_flag(TIF_MCCK_PENDING);
+        local_mcck_enable();
+        local_irq_restore(flags);
+
+        if (mcck.channel_report)
+                crw_handle_channel_report();
+        /*
+         * A warning may remain for a prolonged period on the bare iron.
+         * (actually until the machine is powered off, or the problem is gone)
+         * So we just stop listening for the WARNING MCH and avoid continuously
+         * being interrupted.  One caveat is however, that we must do this per
+         * processor and cannot use the smp version of ctl_clear_bit().
+         * On VM we only get one interrupt per virtally presented machinecheck.
+         * Though one suffices, we may get one interrupt per (virtual) cpu.
+         */
+        if (mcck.warning) {     /* WARNING pending ? */
+                static int mchchk_wng_posted = 0;
+
+                /* Use single cpu clear, as we cannot handle smp here. */
+                __ctl_clear_bit(14, 24);        /* Disable WARNING MCH */
+                if (xchg(&mchchk_wng_posted, 1) == 0)
+                        kill_cad_pid(SIGPWR, 1);
+        }
+        if (mcck.kill_task) {
+                local_irq_enable();
+                printk(KERN_EMERG "mcck: Terminating task because of machine "
+                       "malfunction (code 0x%016llx).\n", mcck.mcck_code);
+                printk(KERN_EMERG "mcck: task: %s, pid: %d.\n",
+                       current->comm, current->pid);
+                do_exit(SIGSEGV);
+        }
+}
+EXPORT_SYMBOL_GPL(s390_handle_mcck);
+
+/*
+ * returns 0 if all registers could be validated
+ * returns 1 otherwise
+ */
+static int notrace s390_revalidate_registers(struct mci *mci)
+{
+        int kill_task;
+        u64 tmpclock;
+        u64 zero;
+        void *fpt_save_area, *fpt_creg_save_area;
+
+        kill_task = 0;
+        zero = 0;
+
+        if (!mci->gr) {
+                /*
+                 * General purpose registers couldn't be restored and have
+                 * unknown contents. Process needs to be terminated.
+                 */
+                kill_task = 1;
+        }
+        if (!mci->fp) {
+                /*
+                 * Floating point registers can't be restored and
+                 * therefore the process needs to be terminated.
+                 */
+                kill_task = 1;
+        }
+#ifndef CONFIG_64BIT
+        asm volatile(
+                "       ld      0,0(%0)\n"
+                "       ld      2,8(%0)\n"
+                "       ld      4,16(%0)\n"
+                "       ld      6,24(%0)"
+                : : "a" (&S390_lowcore.floating_pt_save_area));
+#endif
+
+        if (MACHINE_HAS_IEEE) {
+#ifdef CONFIG_64BIT
+                fpt_save_area = &S390_lowcore.floating_pt_save_area;
+                fpt_creg_save_area = &S390_lowcore.fpt_creg_save_area;
+#else
+                fpt_save_area = (void *) S390_lowcore.extended_save_area_addr;
+                fpt_creg_save_area = fpt_save_area + 128;
+#endif
+                if (!mci->fc) {
+                        /*
+                         * Floating point control register can't be restored.
+                         * Task will be terminated.
+                         */
+                        asm volatile("lfpc 0(%0)" : : "a" (&zero), "m" (zero));
+                        kill_task = 1;
+
+                } else
+                        asm volatile("lfpc 0(%0)" : : "a" (fpt_creg_save_area));
+
+                asm volatile(
+                        "       ld      0,0(%0)\n"
+                        "       ld      1,8(%0)\n"
+                        "       ld      2,16(%0)\n"
+                        "       ld      3,24(%0)\n"
+                        "       ld      4,32(%0)\n"
+                        "       ld      5,40(%0)\n"
+                        "       ld      6,48(%0)\n"
+                        "       ld      7,56(%0)\n"
+                        "       ld      8,64(%0)\n"
+                        "       ld      9,72(%0)\n"
+                        "       ld      10,80(%0)\n"
+                        "       ld      11,88(%0)\n"
+                        "       ld      12,96(%0)\n"
+                        "       ld      13,104(%0)\n"
+                        "       ld      14,112(%0)\n"
+                        "       ld      15,120(%0)\n"
+                        : : "a" (fpt_save_area));
+        }
+        /* Revalidate access registers */
+        asm volatile(
+                "       lam     0,15,0(%0)"
+                : : "a" (&S390_lowcore.access_regs_save_area));
+        if (!mci->ar) {
+                /*
+                 * Access registers have unknown contents.
+                 * Terminating task.
+                 */
+                kill_task = 1;
+        }
+        /* Revalidate control registers */
+        if (!mci->cr) {
+                /*
+                 * Control registers have unknown contents.
+                 * Can't recover and therefore stopping machine.
+                 */
+                s390_handle_damage("invalid control registers.");
+        } else {
+#ifdef CONFIG_64BIT
+                asm volatile(
+                        "       lctlg   0,15,0(%0)"
+                        : : "a" (&S390_lowcore.cregs_save_area));
+#else
+                asm volatile(
+                        "       lctl    0,15,0(%0)"
+                        : : "a" (&S390_lowcore.cregs_save_area));
+#endif
+        }
+        /*
+         * We don't even try to revalidate the TOD register, since we simply
+         * can't write something sensible into that register.
+         */
+#ifdef CONFIG_64BIT
+        /*
+         * See if we can revalidate the TOD programmable register with its
+         * old contents (should be zero) otherwise set it to zero.
+         */
+        if (!mci->pr)
+                asm volatile(
+                        "       sr      0,0\n"
+                        "       sckpf"
+                        : : : "0", "cc");
+        else
+                asm volatile(
+                        "       l       0,0(%0)\n"
+                        "       sckpf"
+                        : : "a" (&S390_lowcore.tod_progreg_save_area)
+                        : "0", "cc");
+#endif
+        /* Revalidate clock comparator register */
+        asm volatile(
+                "       stck    0(%1)\n"
+                "       sckc    0(%1)"
+                : "=m" (tmpclock) : "a" (&(tmpclock)) : "cc", "memory");
+
+        /* Check if old PSW is valid */
+        if (!mci->wp)
+                /*
+                 * Can't tell if we come from user or kernel mode
+                 * -> stopping machine.
+                 */
+                s390_handle_damage("old psw invalid.");
+
+        if (!mci->ms || !mci->pm || !mci->ia)
+                kill_task = 1;
+
+        return kill_task;
+}
+
+#define MAX_IPD_COUNT   29
+#define MAX_IPD_TIME    (5 * 60 * USEC_PER_SEC) /* 5 minutes */
+
+#define ED_STP_ISLAND   6       /* External damage STP island check */
+#define ED_STP_SYNC     7       /* External damage STP sync check */
+#define ED_ETR_SYNC     12      /* External damage ETR sync check */
+#define ED_ETR_SWITCH   13      /* External damage ETR switch to local */
+
+/*
+ * machine check handler.
+ */
+void notrace s390_do_machine_check(struct pt_regs *regs)
+{
+        static int ipd_count;
+        static DEFINE_SPINLOCK(ipd_lock);
+        static unsigned long long last_ipd;
+        struct mcck_struct *mcck;
+        unsigned long long tmp;
+        struct mci *mci;
+        int umode;
+
+        lockdep_off();
+        s390_idle_check();
+
+        mci = (struct mci *) &S390_lowcore.mcck_interruption_code;
+        mcck = &__get_cpu_var(cpu_mcck);
+        umode = user_mode(regs);
+
+        if (mci->sd) {
+                /* System damage -> stopping machine */
+                s390_handle_damage("received system damage machine check.");
+        }
+        if (mci->pd) {
+                if (mci->b) {
+                        /* Processing backup -> verify if we can survive this */
+                        u64 z_mcic, o_mcic, t_mcic;
+#ifdef CONFIG_64BIT
+                        z_mcic = (1ULL<<63 | 1ULL<<59 | 1ULL<<29);
+                        o_mcic = (1ULL<<43 | 1ULL<<42 | 1ULL<<41 | 1ULL<<40 |
+                                  1ULL<<36 | 1ULL<<35 | 1ULL<<34 | 1ULL<<32 |
+                                  1ULL<<30 | 1ULL<<21 | 1ULL<<20 | 1ULL<<17 |
+                                  1ULL<<16);
+#else
+                        z_mcic = (1ULL<<63 | 1ULL<<59 | 1ULL<<57 | 1ULL<<50 |
+                                  1ULL<<29);
+                        o_mcic = (1ULL<<43 | 1ULL<<42 | 1ULL<<41 | 1ULL<<40 |
+                                  1ULL<<36 | 1ULL<<35 | 1ULL<<34 | 1ULL<<32 |
+                                  1ULL<<30 | 1ULL<<20 | 1ULL<<17 | 1ULL<<16);
+#endif
+                        t_mcic = *(u64 *)mci;
+
+                        if (((t_mcic & z_mcic) != 0) ||
+                            ((t_mcic & o_mcic) != o_mcic)) {
+                                s390_handle_damage("processing backup machine "
+                                                   "check with damage.");
+                        }
+
+                        /*
+                         * Nullifying exigent condition, therefore we might
+                         * retry this instruction.
+                         */
+                        spin_lock(&ipd_lock);
+                        tmp = get_clock();
+                        if (((tmp - last_ipd) >> 12) < MAX_IPD_TIME)
+                                ipd_count++;
+                        else
+                                ipd_count = 1;
+                        last_ipd = tmp;
+                        if (ipd_count == MAX_IPD_COUNT)
+                                s390_handle_damage("too many ipd retries.");
+                        spin_unlock(&ipd_lock);
+                } else {
+                        /* Processing damage -> stopping machine */
+                        s390_handle_damage("received instruction processing "
+                                           "damage machine check.");
+                }
+        }
+        if (s390_revalidate_registers(mci)) {
+                if (umode) {
+                        /*
+                         * Couldn't restore all register contents while in
+                         * user mode -> mark task for termination.
+                         */
+                        mcck->kill_task = 1;
+                        mcck->mcck_code = *(unsigned long long *) mci;
+                        set_thread_flag(TIF_MCCK_PENDING);
+                } else {
+                        /*
+                         * Couldn't restore all register contents while in
+                         * kernel mode -> stopping machine.
+                         */
+                        s390_handle_damage("unable to revalidate registers.");
+                }
+        }
+        if (mci->cd) {
+                /* Timing facility damage */
+                s390_handle_damage("TOD clock damaged");
+        }
+        if (mci->ed && mci->ec) {
+                /* External damage */
+                if (S390_lowcore.external_damage_code & (1U << ED_ETR_SYNC))
+                        etr_sync_check();
+                if (S390_lowcore.external_damage_code & (1U << ED_ETR_SWITCH))
+                        etr_switch_to_local();
+                if (S390_lowcore.external_damage_code & (1U << ED_STP_SYNC))
+                        stp_sync_check();
+                if (S390_lowcore.external_damage_code & (1U << ED_STP_ISLAND))
+                        stp_island_check();
+        }
+        if (mci->se)
+                /* Storage error uncorrected */
+                s390_handle_damage("received storage error uncorrected "
+                                   "machine check.");
+        if (mci->ke)
+                /* Storage key-error uncorrected */
+                s390_handle_damage("received storage key-error uncorrected "
+                                   "machine check.");
+        if (mci->ds && mci->fa)
+                /* Storage degradation */
+                s390_handle_damage("received storage degradation machine "
+                                   "check.");
+        if (mci->cp) {
+                /* Channel report word pending */
+                mcck->channel_report = 1;
+                set_thread_flag(TIF_MCCK_PENDING);
+        }
+        if (mci->w) {
+                /* Warning pending */
+                mcck->warning = 1;
+                set_thread_flag(TIF_MCCK_PENDING);
+        }
+        lockdep_on();
+}
+
+static int __init machine_check_init(void)
+{
+        ctl_set_bit(14, 25);    /* enable external damage MCH */
+        ctl_set_bit(14, 27);    /* enable system recovery MCH */
+        ctl_set_bit(14, 24);    /* enable warning MCH */
+        return 0;
+}
+arch_initcall(machine_check_init);
diff --git a/arch/s390/kernel/process.c b/arch/s390/kernel/process.c
index 5cd38a90e64d..b48e961a38f6 100644
--- a/arch/s390/kernel/process.c
+++ b/arch/s390/kernel/process.c
@@ -1,18 +1,10 @@
 /*
- *  arch/s390/kernel/process.c
+ * This file handles the architecture dependent parts of process handling.
  *
- *  S390 version
- *    Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation
- *    Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
- *               Hartmut Penner (hp@de.ibm.com),
- *               Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
- *
- *  Derived from "arch/i386/kernel/process.c"
- *    Copyright (C) 1995, Linus Torvalds
- */
-
-/*
- * This file handles the architecture-dependent parts of process handling..
+ *    Copyright IBM Corp. 1999,2009
+ *    Author(s): Martin Schwidefsky <schwidefsky@de.ibm.com>,
+ *               Hartmut Penner <hp@de.ibm.com>,
+ *               Denis Joseph Barrow,
  */
 
 #include <linux/compiler.h>
@@ -47,6 +39,7 @@
 #include <asm/processor.h>
 #include <asm/irq.h>
 #include <asm/timer.h>
+#include <asm/nmi.h>
 #include "entry.h"
 
 asmlinkage void ret_from_fork(void) asm ("ret_from_fork");
@@ -76,7 +69,6 @@ unsigned long thread_saved_pc(struct task_struct *tsk)
         return sf->gprs[8];
 }
 
-extern void s390_handle_mcck(void);
 /*
  * The idle loop on a S390...
  */
@@ -149,6 +141,7 @@ int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags)
         return do_fork(flags | CLONE_VM | CLONE_UNTRACED,
                        0, &regs, 0, NULL, NULL);
 }
+EXPORT_SYMBOL(kernel_thread);
 
 /*
  * Free current thread data structures etc..
@@ -168,34 +161,35 @@ void release_thread(struct task_struct *dead_task)
 }
 
 int copy_thread(int nr, unsigned long clone_flags, unsigned long new_stackp,
-        unsigned long unused,
-        struct task_struct * p, struct pt_regs * regs)
+                unsigned long unused,
+                struct task_struct *p, struct pt_regs *regs)
 {
-        struct fake_frame
-          {
-            struct stack_frame sf;
-            struct pt_regs childregs;
-          } *frame;
-
-        frame = container_of(task_pt_regs(p), struct fake_frame, childregs);
-        p->thread.ksp = (unsigned long) frame;
+        struct thread_info *ti;
+        struct fake_frame
+        {
+                struct stack_frame sf;
+                struct pt_regs childregs;
+        } *frame;
+
+        frame = container_of(task_pt_regs(p), struct fake_frame, childregs);
+        p->thread.ksp = (unsigned long) frame;
         /* Store access registers to kernel stack of new process. */
-        frame->childregs = *regs;
+        frame->childregs = *regs;
         frame->childregs.gprs[2] = 0;   /* child returns 0 on fork. */
-        frame->childregs.gprs[15] = new_stackp;
-        frame->sf.back_chain = 0;
+        frame->childregs.gprs[15] = new_stackp;
+        frame->sf.back_chain = 0;
 
-        /* new return point is ret_from_fork */
-        frame->sf.gprs[8] = (unsigned long) ret_from_fork;
+        /* new return point is ret_from_fork */
+        frame->sf.gprs[8] = (unsigned long) ret_from_fork;
 
-        /* fake return stack for resume(), don't go back to schedule */
-        frame->sf.gprs[9] = (unsigned long) frame;
+        /* fake return stack for resume(), don't go back to schedule */
+        frame->sf.gprs[9] = (unsigned long) frame;
 
         /* Save access registers to new thread structure. */
         save_access_regs(&p->thread.acrs[0]);
 
 #ifndef CONFIG_64BIT
-        /*
+        /*
          * save fprs to current->thread.fp_regs to merge them with
          * the emulated registers and then copy the result to the child.
          */
@@ -220,10 +214,13 @@ int copy_thread(int nr, unsigned long clone_flags, unsigned long new_stackp,
 #endif /* CONFIG_64BIT */
         /* start new process with ar4 pointing to the correct address space */
         p->thread.mm_segment = get_fs();
-        /* Don't copy debug registers */
-        memset(&p->thread.per_info,0,sizeof(p->thread.per_info));
-
-        return 0;
+        /* Don't copy debug registers */
+        memset(&p->thread.per_info, 0, sizeof(p->thread.per_info));
+        /* Initialize per thread user and system timer values */
+        ti = task_thread_info(p);
+        ti->user_timer = 0;
+        ti->system_timer = 0;
+        return 0;
 }
 
 SYSCALL_DEFINE0(fork)
@@ -311,7 +308,7 @@ out:
 int dump_fpu (struct pt_regs * regs, s390_fp_regs *fpregs)
 {
 #ifndef CONFIG_64BIT
-        /*
+        /*
          * save fprs to current->thread.fp_regs to merge them with
          * the emulated registers and then copy the result to the dump.
          */
@@ -322,6 +319,7 @@ int dump_fpu (struct pt_regs * regs, s390_fp_regs *fpregs)
 #endif /* CONFIG_64BIT */
         return 1;
 }
+EXPORT_SYMBOL(dump_fpu);
 
 unsigned long get_wchan(struct task_struct *p)
 {
@@ -346,4 +344,3 @@ unsigned long get_wchan(struct task_struct *p)
         }
         return 0;
 }
-
diff --git a/arch/s390/kernel/processor.c b/arch/s390/kernel/processor.c
index 82c1872cfe80..802c8ab247f3 100644
--- a/arch/s390/kernel/processor.c
+++ b/arch/s390/kernel/processor.c
@@ -18,10 +18,11 @@
 #include <asm/lowcore.h>
 #include <asm/param.h>
 
-void __cpuinit print_cpu_info(struct cpuinfo_S390 *cpuinfo)
+void __cpuinit print_cpu_info(void)
 {
         pr_info("Processor %d started, address %d, identification %06X\n",
-                cpuinfo->cpu_nr, cpuinfo->cpu_addr, cpuinfo->cpu_id.ident);
+                S390_lowcore.cpu_nr, S390_lowcore.cpu_addr,
+                S390_lowcore.cpu_id.ident);
 }
 
 /*
@@ -30,48 +31,46 @@ void __cpuinit print_cpu_info(struct cpuinfo_S390 *cpuinfo)
 
 static int show_cpuinfo(struct seq_file *m, void *v)
 {
-        static const char *hwcap_str[8] = {
+        static const char *hwcap_str[9] = {
                 "esan3", "zarch", "stfle", "msa", "ldisp", "eimm", "dfp",
-                "edat"
+                "edat", "etf3eh"
         };
-       struct cpuinfo_S390 *cpuinfo;
-       unsigned long n = (unsigned long) v - 1;
-       int i;
+        struct _lowcore *lc;
+        unsigned long n = (unsigned long) v - 1;
+        int i;
 
-       s390_adjust_jiffies();
-       preempt_disable();
-       if (!n) {
-               seq_printf(m, "vendor_id       : IBM/S390\n"
-                          "# processors    : %i\n"
-                          "bogomips per cpu: %lu.%02lu\n",
-                          num_online_cpus(), loops_per_jiffy/(500000/HZ),
-                          (loops_per_jiffy/(5000/HZ))%100);
-               seq_puts(m, "features\t: ");
-               for (i = 0; i < 8; i++)
-                       if (hwcap_str[i] && (elf_hwcap & (1UL << i)))
-                               seq_printf(m, "%s ", hwcap_str[i]);
-               seq_puts(m, "\n");
-       }
+        s390_adjust_jiffies();
+        preempt_disable();
+        if (!n) {
+                seq_printf(m, "vendor_id       : IBM/S390\n"
+                           "# processors    : %i\n"
+                           "bogomips per cpu: %lu.%02lu\n",
+                           num_online_cpus(), loops_per_jiffy/(500000/HZ),
+                           (loops_per_jiffy/(5000/HZ))%100);
+                seq_puts(m, "features\t: ");
+                for (i = 0; i < 9; i++)
+                        if (hwcap_str[i] && (elf_hwcap & (1UL << i)))
+                                seq_printf(m, "%s ", hwcap_str[i]);
+                seq_puts(m, "\n");
+        }
 
-       if (cpu_online(n)) {
+        if (cpu_online(n)) {
 #ifdef CONFIG_SMP
-               if (smp_processor_id() == n)
-                       cpuinfo = &S390_lowcore.cpu_data;
-               else
-                       cpuinfo = &lowcore_ptr[n]->cpu_data;
+                lc = (smp_processor_id() == n) ?
+                        &S390_lowcore : lowcore_ptr[n];
 #else
-               cpuinfo = &S390_lowcore.cpu_data;
+                lc = &S390_lowcore;
 #endif
-               seq_printf(m, "processor %li: "
-                          "version = %02X,  "
-                          "identification = %06X,  "
-                          "machine = %04X\n",
-                          n, cpuinfo->cpu_id.version,
-                          cpuinfo->cpu_id.ident,
-                          cpuinfo->cpu_id.machine);
-       }
-       preempt_enable();
-       return 0;
+                seq_printf(m, "processor %li: "
+                           "version = %02X,  "
+                           "identification = %06X,  "
+                           "machine = %04X\n",
+                           n, lc->cpu_id.version,
+                           lc->cpu_id.ident,
+                           lc->cpu_id.machine);
+        }
+        preempt_enable();
+        return 0;
 }
 
 static void *c_start(struct seq_file *m, loff_t *pos)
diff --git a/arch/s390/kernel/reipl64.S b/arch/s390/kernel/reipl64.S
index c41930499a5f..774147824c3d 100644
--- a/arch/s390/kernel/reipl64.S
+++ b/arch/s390/kernel/reipl64.S
@@ -1,10 +1,7 @@
 /*
- *  arch/s390/kernel/reipl.S
- *
- *  S390 version
- *    Copyright (C) 2000 IBM Deutschland Entwicklung GmbH, IBM Corporation
- *    Author(s): Holger Smolinski (Holger.Smolinski@de.ibm.com)
-                 Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
+ *    Copyright IBM Corp 2000,2009
+ *    Author(s): Holger Smolinski <Holger.Smolinski@de.ibm.com>,
+ *               Denis Joseph Barrow,
  */
 
 #include <asm/lowcore.h>
@@ -30,7 +27,7 @@ do_reipl_asm:	basr	%r13,0
                 mvc     __LC_PREFIX_SAVE_AREA-0x1000(4,%r1),0(%r10)
                 stfpc   __LC_FP_CREG_SAVE_AREA-0x1000(%r1)
                 stckc   .Lclkcmp-.Lpg0(%r13)
-                mvc     __LC_CLOCK_COMP_SAVE_AREA-0x1000(8,%r1),.Lclkcmp-.Lpg0(%r13)
+                mvc     __LC_CLOCK_COMP_SAVE_AREA-0x1000(7,%r1),.Lclkcmp-.Lpg0(%r13)
                 stpt    __LC_CPU_TIMER_SAVE_AREA-0x1000(%r1)
                 stg     %r13, __LC_PSW_SAVE_AREA-0x1000+8(%r1)
 
diff --git a/arch/s390/kernel/s390_ksyms.c b/arch/s390/kernel/s390_ksyms.c
index 46b90cb03707..656fcbb9bd83 100644
--- a/arch/s390/kernel/s390_ksyms.c
+++ b/arch/s390/kernel/s390_ksyms.c
@@ -1,49 +1,5 @@
-/*
- *  arch/s390/kernel/s390_ksyms.c
- *
- *  S390 version
- */
-#include <linux/highuid.h>
 #include <linux/module.h>
-#include <linux/mm.h>
-#include <linux/smp.h>
-#include <linux/syscalls.h>
-#include <linux/interrupt.h>
-#include <asm/checksum.h>
-#include <asm/cpcmd.h>
-#include <asm/delay.h>
-#include <asm/pgalloc.h>
-#include <asm/setup.h>
 #include <asm/ftrace.h>
-#ifdef CONFIG_IP_MULTICAST
-#include <net/arp.h>
-#endif
-
-/*
- * memory management
- */
-EXPORT_SYMBOL(_oi_bitmap);
-EXPORT_SYMBOL(_ni_bitmap);
-EXPORT_SYMBOL(_zb_findmap);
-EXPORT_SYMBOL(_sb_findmap);
-
-/*
- * binfmt_elf loader 
- */
-extern int dump_fpu (struct pt_regs * regs, s390_fp_regs *fpregs);
-EXPORT_SYMBOL(dump_fpu);
-EXPORT_SYMBOL(empty_zero_page);
-
-/*
- * misc.
- */
-EXPORT_SYMBOL(machine_flags);
-EXPORT_SYMBOL(__udelay);
-EXPORT_SYMBOL(kernel_thread);
-EXPORT_SYMBOL(csum_fold);
-EXPORT_SYMBOL(console_mode);
-EXPORT_SYMBOL(console_devno);
-EXPORT_SYMBOL(console_irq);
 
 #ifdef CONFIG_FUNCTION_TRACER
 EXPORT_SYMBOL(_mcount);
diff --git a/arch/s390/kernel/setup.c b/arch/s390/kernel/setup.c
index c5cfb6185eac..06201b93cbbf 100644
--- a/arch/s390/kernel/setup.c
+++ b/arch/s390/kernel/setup.c
@@ -74,9 +74,17 @@ EXPORT_SYMBOL(uaccess);
  * Machine setup..
  */
 unsigned int console_mode = 0;
+EXPORT_SYMBOL(console_mode);
+
 unsigned int console_devno = -1;
+EXPORT_SYMBOL(console_devno);
+
 unsigned int console_irq = -1;
+EXPORT_SYMBOL(console_irq);
+
 unsigned long machine_flags;
+EXPORT_SYMBOL(machine_flags);
+
 unsigned long elf_hwcap = 0;
 char elf_platform[ELF_PLATFORM_SIZE];
 
@@ -86,6 +94,10 @@ volatile int __cpu_logical_map[NR_CPUS]; /* logical cpu to cpu address */
 int __initdata memory_end_set;
 unsigned long __initdata memory_end;
 
+/* An array with a pointer to the lowcore of every CPU. */
+struct _lowcore *lowcore_ptr[NR_CPUS];
+EXPORT_SYMBOL(lowcore_ptr);
+
 /*
  * This is set up by the setup-routine at boot-time
  * for S390 need to find out, what we have to setup
@@ -109,13 +121,10 @@ static struct resource data_resource = {
  */
 void __cpuinit cpu_init(void)
 {
-        int addr = hard_smp_processor_id();
-
         /*
          * Store processor id in lowcore (used e.g. in timer_interrupt)
          */
-        get_cpu_id(&S390_lowcore.cpu_data.cpu_id);
-        S390_lowcore.cpu_data.cpu_addr = addr;
+        get_cpu_id(&S390_lowcore.cpu_id);
 
         /*
          * Force FPU initialization:
@@ -125,8 +134,7 @@ void __cpuinit cpu_init(void)
 
         atomic_inc(&init_mm.mm_count);
         current->active_mm = &init_mm;
-        if (current->mm)
-                BUG();
+        BUG_ON(current->mm);
         enter_lazy_tlb(&init_mm, current);
 }
 
@@ -217,7 +225,7 @@ static void __init conmode_default(void)
         }
 }
 
-#if defined(CONFIG_ZFCPDUMP) || defined(CONFIG_ZFCPDUMP_MODULE)
+#ifdef CONFIG_ZFCPDUMP
 static void __init setup_zfcpdump(unsigned int console_devno)
 {
         static char str[41];
@@ -289,11 +297,7 @@ static int __init early_parse_mem(char *p)
 early_param("mem", early_parse_mem);
 
 #ifdef CONFIG_S390_SWITCH_AMODE
-#ifdef CONFIG_PGSTE
-unsigned int switch_amode = 1;
-#else
 unsigned int switch_amode = 0;
-#endif
 EXPORT_SYMBOL_GPL(switch_amode);
 
 static int set_amode_and_uaccess(unsigned long user_amode,
@@ -414,7 +418,6 @@ setup_lowcore(void)
                 PSW_ADDR_AMODE | (unsigned long) mcck_int_handler;
         lc->io_new_psw.mask = psw_kernel_bits;
         lc->io_new_psw.addr = PSW_ADDR_AMODE | (unsigned long) io_int_handler;
-        lc->ipl_device = S390_lowcore.ipl_device;
         lc->clock_comparator = -1ULL;
         lc->kernel_stack = ((unsigned long) &init_thread_union) + THREAD_SIZE;
         lc->async_stack = (unsigned long)
@@ -434,6 +437,7 @@ setup_lowcore(void)
         lc->vdso_per_cpu_data = (unsigned long) &lc->paste[0];
 #endif
         set_prefix((u32)(unsigned long) lc);
+        lowcore_ptr[0] = lc;
 }
 
 static void __init
@@ -510,7 +514,7 @@ static void __init setup_memory_end(void)
         unsigned long max_mem;
         int i;
 
-#if defined(CONFIG_ZFCPDUMP) || defined(CONFIG_ZFCPDUMP_MODULE)
+#ifdef CONFIG_ZFCPDUMP
         if (ipl_info.type == IPL_TYPE_FCP_DUMP) {
                 memory_end = ZFCPDUMP_HSA_SIZE;
                 memory_end_set = 1;
@@ -677,7 +681,6 @@ setup_memory(void)
 static void __init setup_hwcaps(void)
 {
         static const int stfl_bits[6] = { 0, 2, 7, 17, 19, 21 };
-        struct cpuinfo_S390 *cpuinfo = &S390_lowcore.cpu_data;
         unsigned long long facility_list_extended;
         unsigned int facility_list;
         int i;
@@ -693,15 +696,22 @@ static void __init setup_hwcaps(void)
          *   Bit 17: the message-security assist is installed
          *   Bit 19: the long-displacement facility is installed
          *   Bit 21: the extended-immediate facility is installed
+         *   Bit 22: extended-translation facility 3 is installed
+         *   Bit 30: extended-translation facility 3 enhancement facility
          * These get translated to:
          *   HWCAP_S390_ESAN3 bit 0, HWCAP_S390_ZARCH bit 1,
          *   HWCAP_S390_STFLE bit 2, HWCAP_S390_MSA bit 3,
-         *   HWCAP_S390_LDISP bit 4, and HWCAP_S390_EIMM bit 5.
+         *   HWCAP_S390_LDISP bit 4, HWCAP_S390_EIMM bit 5 and
+         *   HWCAP_S390_ETF3EH bit 8 (22 && 30).
          */
         for (i = 0; i < 6; i++)
                 if (facility_list & (1UL << (31 - stfl_bits[i])))
                         elf_hwcap |= 1UL << i;
 
+        if ((facility_list & (1UL << (31 - 22)))
+            && (facility_list & (1UL << (31 - 30))))
+                elf_hwcap |= 1UL << 8;
+
         /*
          * Check for additional facilities with store-facility-list-extended.
          * stfle stores doublewords (8 byte) with bit 1ULL<<63 as bit 0
@@ -710,20 +720,22 @@ static void __init setup_hwcaps(void)
          * How many facility words are stored depends on the number of
          * doublewords passed to the instruction. The additional facilites
          * are:
-         *   Bit 43: decimal floating point facility is installed
+         *   Bit 42: decimal floating point facility is installed
+         *   Bit 44: perform floating point operation facility is installed
          * translated to:
-         *   HWCAP_S390_DFP bit 6.
+         *   HWCAP_S390_DFP bit 6 (42 && 44).
          */
         if ((elf_hwcap & (1UL << 2)) &&
             __stfle(&facility_list_extended, 1) > 0) {
-                if (facility_list_extended & (1ULL << (64 - 43)))
+                if ((facility_list_extended & (1ULL << (63 - 42)))
+                    && (facility_list_extended & (1ULL << (63 - 44))))
                         elf_hwcap |= 1UL << 6;
         }
 
         if (MACHINE_HAS_HPAGE)
                 elf_hwcap |= 1UL << 7;
 
-        switch (cpuinfo->cpu_id.machine) {
+        switch (S390_lowcore.cpu_id.machine) {
         case 0x9672:
 #if !defined(CONFIG_64BIT)
         default:        /* Use "g5" as default for 31 bit kernels. */
@@ -816,7 +828,7 @@ setup_arch(char **cmdline_p)
         setup_lowcore();
 
         cpu_init();
-        __cpu_logical_map[0] = S390_lowcore.cpu_data.cpu_addr;
+        __cpu_logical_map[0] = stap();
         s390_init_cpu_topology();
 
         /*
diff --git a/arch/s390/kernel/smp.c b/arch/s390/kernel/smp.c
index 2d337cbb9329..006ed5016eb4 100644
--- a/arch/s390/kernel/smp.c
+++ b/arch/s390/kernel/smp.c
@@ -32,6 +32,7 @@
 #include <linux/delay.h>
 #include <linux/cache.h>
 #include <linux/interrupt.h>
+#include <linux/irqflags.h>
 #include <linux/cpu.h>
 #include <linux/timex.h>
 #include <linux/bootmem.h>
@@ -50,12 +51,6 @@
 #include <asm/vdso.h>
 #include "entry.h"
 
-/*
- * An array with a pointer the lowcore of every CPU.
- */
-struct _lowcore *lowcore_ptr[NR_CPUS];
-EXPORT_SYMBOL(lowcore_ptr);
-
 static struct task_struct *current_set[NR_CPUS];
 
 static u8 smp_cpu_type;
@@ -81,9 +76,7 @@ void smp_send_stop(void)
 
         /* Disable all interrupts/machine checks */
         __load_psw_mask(psw_kernel_bits & ~PSW_MASK_MCHECK);
-
-        /* write magic number to zero page (absolute 0) */
-        lowcore_ptr[smp_processor_id()]->panic_magic = __PANIC_MAGIC;
+        trace_hardirqs_off();
 
         /* stop all processors */
         for_each_online_cpu(cpu) {
@@ -233,7 +226,7 @@ EXPORT_SYMBOL(smp_ctl_clear_bit);
  */
 #define CPU_INIT_NO     1
 
-#if defined(CONFIG_ZFCPDUMP) || defined(CONFIG_ZFCPDUMP_MODULE)
+#ifdef CONFIG_ZFCPDUMP
 
 /*
  * zfcpdump_prefix_array holds prefix registers for the following scenario:
@@ -274,7 +267,7 @@ EXPORT_SYMBOL_GPL(zfcpdump_save_areas);
 
 static inline void smp_get_save_area(unsigned int cpu, unsigned int phy_cpu) { }
 
-#endif /* CONFIG_ZFCPDUMP || CONFIG_ZFCPDUMP_MODULE */
+#endif /* CONFIG_ZFCPDUMP */
 
 static int cpu_stopped(int cpu)
 {
@@ -304,8 +297,8 @@ static int smp_rescan_cpus_sigp(cpumask_t avail)
 {
         int cpu_id, logical_cpu;
 
-        logical_cpu = first_cpu(avail);
-        if (logical_cpu == NR_CPUS)
+        logical_cpu = cpumask_first(&avail);
+        if (logical_cpu >= nr_cpu_ids)
                 return 0;
         for (cpu_id = 0; cpu_id <= 65535; cpu_id++) {
                 if (cpu_known(cpu_id))
@@ -316,8 +309,8 @@ static int smp_rescan_cpus_sigp(cpumask_t avail)
                         continue;
                 cpu_set(logical_cpu, cpu_present_map);
                 smp_cpu_state[logical_cpu] = CPU_STATE_CONFIGURED;
-                logical_cpu = next_cpu(logical_cpu, avail);
-                if (logical_cpu == NR_CPUS)
+                logical_cpu = cpumask_next(logical_cpu, &avail);
+                if (logical_cpu >= nr_cpu_ids)
                         break;
         }
         return 0;
@@ -329,8 +322,8 @@ static int smp_rescan_cpus_sclp(cpumask_t avail)
         int cpu_id, logical_cpu, cpu;
         int rc;
 
-        logical_cpu = first_cpu(avail);
-        if (logical_cpu == NR_CPUS)
+        logical_cpu = cpumask_first(&avail);
+        if (logical_cpu >= nr_cpu_ids)
                 return 0;
         info = kmalloc(sizeof(*info), GFP_KERNEL);
         if (!info)
@@ -351,8 +344,8 @@ static int smp_rescan_cpus_sclp(cpumask_t avail)
                         smp_cpu_state[logical_cpu] = CPU_STATE_STANDBY;
                 else
                         smp_cpu_state[logical_cpu] = CPU_STATE_CONFIGURED;
-                logical_cpu = next_cpu(logical_cpu, avail);
-                if (logical_cpu == NR_CPUS)
+                logical_cpu = cpumask_next(logical_cpu, &avail);
+                if (logical_cpu >= nr_cpu_ids)
                         break;
         }
 out:
@@ -379,7 +372,7 @@ static void __init smp_detect_cpus(void)
 
         c_cpus = 1;
         s_cpus = 0;
-        boot_cpu_addr = S390_lowcore.cpu_data.cpu_addr;
+        boot_cpu_addr = __cpu_logical_map[0];
         info = kmalloc(sizeof(*info), GFP_KERNEL);
         if (!info)
                 panic("smp_detect_cpus failed to allocate memory\n");
@@ -453,7 +446,7 @@ int __cpuinit start_secondary(void *cpuvoid)
         /* Switch on interrupts */
         local_irq_enable();
         /* Print info about this processor */
-        print_cpu_info(&S390_lowcore.cpu_data);
+        print_cpu_info();
         /* cpu_idle will call schedule for us */
         cpu_idle();
         return 0;
@@ -515,7 +508,6 @@ out:
         return -ENOMEM;
 }
 
-#ifdef CONFIG_HOTPLUG_CPU
 static void smp_free_lowcore(int cpu)
 {
         struct _lowcore *lowcore;
@@ -534,7 +526,6 @@ static void smp_free_lowcore(int cpu)
         free_pages((unsigned long) lowcore, lc_order);
         lowcore_ptr[cpu] = NULL;
 }
-#endif /* CONFIG_HOTPLUG_CPU */
 
 /* Upping and downing of CPUs */
 int __cpuinit __cpu_up(unsigned int cpu)
@@ -543,16 +534,23 @@ int __cpuinit __cpu_up(unsigned int cpu)
         struct _lowcore *cpu_lowcore;
         struct stack_frame *sf;
         sigp_ccode ccode;
+        u32 lowcore;
 
         if (smp_cpu_state[cpu] != CPU_STATE_CONFIGURED)
                 return -EIO;
         if (smp_alloc_lowcore(cpu))
                 return -ENOMEM;
-
-        ccode = signal_processor_p((__u32)(unsigned long)(lowcore_ptr[cpu]),
-                                   cpu, sigp_set_prefix);
-        if (ccode)
-                return -EIO;
+        do {
+                ccode = signal_processor(cpu, sigp_initial_cpu_reset);
+                if (ccode == sigp_busy)
+                        udelay(10);
+                if (ccode == sigp_not_operational)
+                        goto err_out;
+        } while (ccode == sigp_busy);
+
+        lowcore = (u32)(unsigned long)lowcore_ptr[cpu];
+        while (signal_processor_p(lowcore, cpu, sigp_set_prefix) == sigp_busy)
+                udelay(10);
 
         idle = current_set[cpu];
         cpu_lowcore = lowcore_ptr[cpu];
@@ -571,9 +569,8 @@ int __cpuinit __cpu_up(unsigned int cpu)
                 : : "a" (&cpu_lowcore->access_regs_save_area) : "memory");
         cpu_lowcore->percpu_offset = __per_cpu_offset[cpu];
         cpu_lowcore->current_task = (unsigned long) idle;
-        cpu_lowcore->cpu_data.cpu_nr = cpu;
+        cpu_lowcore->cpu_nr = cpu;
         cpu_lowcore->kernel_asce = S390_lowcore.kernel_asce;
-        cpu_lowcore->ipl_device = S390_lowcore.ipl_device;
         eieio();
 
         while (signal_processor(cpu, sigp_restart) == sigp_busy)
@@ -582,6 +579,10 @@ int __cpuinit __cpu_up(unsigned int cpu)
         while (!cpu_online(cpu))
                 cpu_relax();
         return 0;
+
+err_out:
+        smp_free_lowcore(cpu);
+        return -EIO;
 }
 
 static int __init setup_possible_cpus(char *s)
@@ -589,9 +590,8 @@ static int __init setup_possible_cpus(char *s)
         int pcpus, cpu;
 
         pcpus = simple_strtoul(s, NULL, 0);
-        cpu_possible_map = cpumask_of_cpu(0);
-        for (cpu = 1; cpu < pcpus && cpu < NR_CPUS; cpu++)
-                cpu_set(cpu, cpu_possible_map);
+        for (cpu = 0; cpu < pcpus && cpu < nr_cpu_ids; cpu++)
+                set_cpu_possible(cpu, true);
         return 0;
 }
 early_param("possible_cpus", setup_possible_cpus);
@@ -663,7 +663,7 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
         /* request the 0x1201 emergency signal external interrupt */
         if (register_external_interrupt(0x1201, do_ext_call_interrupt) != 0)
                 panic("Couldn't request external interrupt 0x1201");
-        print_cpu_info(&S390_lowcore.cpu_data);
+        print_cpu_info();
 
         /* Reallocate current lowcore, but keep its contents. */
         lc_order = sizeof(long) == 8 ? 1 : 0;
diff --git a/arch/s390/kernel/sysinfo.c b/arch/s390/kernel/sysinfo.c
new file mode 100644
index 000000000000..b5e75e1061c8
--- /dev/null
+++ b/arch/s390/kernel/sysinfo.c
@@ -0,0 +1,428 @@
+/*
+ *  Copyright IBM Corp. 2001, 2009
+ *  Author(s): Ulrich Weigand <Ulrich.Weigand@de.ibm.com>,
+ *             Martin Schwidefsky <schwidefsky@de.ibm.com>,
+ */
+
+#include <linux/kernel.h>
+#include <linux/mm.h>
+#include <linux/proc_fs.h>
+#include <linux/seq_file.h>
+#include <linux/init.h>
+#include <linux/delay.h>
+#include <linux/module.h>
+#include <asm/ebcdic.h>
+#include <asm/sysinfo.h>
+#include <asm/cpcmd.h>
+
+/* Sigh, math-emu. Don't ask. */
+#include <asm/sfp-util.h>
+#include <math-emu/soft-fp.h>
+#include <math-emu/single.h>
+
+static inline int stsi_0(void)
+{
+        int rc = stsi(NULL, 0, 0, 0);
+        return rc == -ENOSYS ? rc : (((unsigned int) rc) >> 28);
+}
+
+static int stsi_1_1_1(struct sysinfo_1_1_1 *info, char *page, int len)
+{
+        if (stsi(info, 1, 1, 1) == -ENOSYS)
+                return len;
+
+        EBCASC(info->manufacturer, sizeof(info->manufacturer));
+        EBCASC(info->type, sizeof(info->type));
+        EBCASC(info->model, sizeof(info->model));
+        EBCASC(info->sequence, sizeof(info->sequence));
+        EBCASC(info->plant, sizeof(info->plant));
+        EBCASC(info->model_capacity, sizeof(info->model_capacity));
+        EBCASC(info->model_perm_cap, sizeof(info->model_perm_cap));
+        EBCASC(info->model_temp_cap, sizeof(info->model_temp_cap));
+        len += sprintf(page + len, "Manufacturer:         %-16.16s\n",
+                       info->manufacturer);
+        len += sprintf(page + len, "Type:                 %-4.4s\n",
+                       info->type);
+        if (info->model[0] != '\0')
+                /*
+                 * Sigh: the model field has been renamed with System z9
+                 * to model_capacity and a new model field has been added
+                 * after the plant field. To avoid confusing older programs
+                 * the "Model:" prints "model_capacity model" or just
+                 * "model_capacity" if the model string is empty .
+                 */
+                len += sprintf(page + len,
+                               "Model:                %-16.16s %-16.16s\n",
+                               info->model_capacity, info->model);
+        else
+                len += sprintf(page + len, "Model:                %-16.16s\n",
+                               info->model_capacity);
+        len += sprintf(page + len, "Sequence Code:        %-16.16s\n",
+                       info->sequence);
+        len += sprintf(page + len, "Plant:                %-4.4s\n",
+                       info->plant);
+        len += sprintf(page + len, "Model Capacity:       %-16.16s %08u\n",
+                       info->model_capacity, *(u32 *) info->model_cap_rating);
+        if (info->model_perm_cap[0] != '\0')
+                len += sprintf(page + len,
+                               "Model Perm. Capacity: %-16.16s %08u\n",
+                               info->model_perm_cap,
+                               *(u32 *) info->model_perm_cap_rating);
+        if (info->model_temp_cap[0] != '\0')
+                len += sprintf(page + len,
+                               "Model Temp. Capacity: %-16.16s %08u\n",
+                               info->model_temp_cap,
+                               *(u32 *) info->model_temp_cap_rating);
+        return len;
+}
+
+static int stsi_1_2_2(struct sysinfo_1_2_2 *info, char *page, int len)
+{
+        struct sysinfo_1_2_2_extension *ext;
+        int i;
+
+        if (stsi(info, 1, 2, 2) == -ENOSYS)
+                return len;
+        ext = (struct sysinfo_1_2_2_extension *)
+                ((unsigned long) info + info->acc_offset);
+
+        len += sprintf(page + len, "\n");
+        len += sprintf(page + len, "CPUs Total:           %d\n",
+                       info->cpus_total);
+        len += sprintf(page + len, "CPUs Configured:      %d\n",
+                       info->cpus_configured);
+        len += sprintf(page + len, "CPUs Standby:         %d\n",
+                       info->cpus_standby);
+        len += sprintf(page + len, "CPUs Reserved:        %d\n",
+                       info->cpus_reserved);
+
+        if (info->format == 1) {
+                /*
+                 * Sigh 2. According to the specification the alternate
+                 * capability field is a 32 bit floating point number
+                 * if the higher order 8 bits are not zero. Printing
+                 * a floating point number in the kernel is a no-no,
+                 * always print the number as 32 bit unsigned integer.
+                 * The user-space needs to know about the strange
+                 * encoding of the alternate cpu capability.
+                 */
+                len += sprintf(page + len, "Capability:           %u %u\n",
+                               info->capability, ext->alt_capability);
+                for (i = 2; i <= info->cpus_total; i++)
+                        len += sprintf(page + len,
+                                       "Adjustment %02d-way:    %u %u\n",
+                                       i, info->adjustment[i-2],
+                                       ext->alt_adjustment[i-2]);
+
+        } else {
+                len += sprintf(page + len, "Capability:           %u\n",
+                               info->capability);
+                for (i = 2; i <= info->cpus_total; i++)
+                        len += sprintf(page + len,
+                                       "Adjustment %02d-way:    %u\n",
+                                       i, info->adjustment[i-2]);
+        }
+
+        if (info->secondary_capability != 0)
+                len += sprintf(page + len, "Secondary Capability: %d\n",
+                               info->secondary_capability);
+        return len;
+}
+
+static int stsi_2_2_2(struct sysinfo_2_2_2 *info, char *page, int len)
+{
+        if (stsi(info, 2, 2, 2) == -ENOSYS)
+                return len;
+
+        EBCASC(info->name, sizeof(info->name));
+
+        len += sprintf(page + len, "\n");
+        len += sprintf(page + len, "LPAR Number:          %d\n",
+                       info->lpar_number);
+
+        len += sprintf(page + len, "LPAR Characteristics: ");
+        if (info->characteristics & LPAR_CHAR_DEDICATED)
+                len += sprintf(page + len, "Dedicated ");
+        if (info->characteristics & LPAR_CHAR_SHARED)
+                len += sprintf(page + len, "Shared ");
+        if (info->characteristics & LPAR_CHAR_LIMITED)
+                len += sprintf(page + len, "Limited ");
+        len += sprintf(page + len, "\n");
+
+        len += sprintf(page + len, "LPAR Name:            %-8.8s\n",
+                       info->name);
+
+        len += sprintf(page + len, "LPAR Adjustment:      %d\n",
+                       info->caf);
+
+        len += sprintf(page + len, "LPAR CPUs Total:      %d\n",
+                       info->cpus_total);
+        len += sprintf(page + len, "LPAR CPUs Configured: %d\n",
+                       info->cpus_configured);
+        len += sprintf(page + len, "LPAR CPUs Standby:    %d\n",
+                       info->cpus_standby);
+        len += sprintf(page + len, "LPAR CPUs Reserved:   %d\n",
+                       info->cpus_reserved);
+        len += sprintf(page + len, "LPAR CPUs Dedicated:  %d\n",
+                       info->cpus_dedicated);
+        len += sprintf(page + len, "LPAR CPUs Shared:     %d\n",
+                       info->cpus_shared);
+        return len;
+}
+
+static int stsi_3_2_2(struct sysinfo_3_2_2 *info, char *page, int len)
+{
+        int i;
+
+        if (stsi(info, 3, 2, 2) == -ENOSYS)
+                return len;
+        for (i = 0; i < info->count; i++) {
+                EBCASC(info->vm[i].name, sizeof(info->vm[i].name));
+                EBCASC(info->vm[i].cpi, sizeof(info->vm[i].cpi));
+                len += sprintf(page + len, "\n");
+                len += sprintf(page + len, "VM%02d Name:            %-8.8s\n",
+                               i, info->vm[i].name);
+                len += sprintf(page + len, "VM%02d Control Program: %-16.16s\n",
+                               i, info->vm[i].cpi);
+
+                len += sprintf(page + len, "VM%02d Adjustment:      %d\n",
+                               i, info->vm[i].caf);
+
+                len += sprintf(page + len, "VM%02d CPUs Total:      %d\n",
+                               i, info->vm[i].cpus_total);
+                len += sprintf(page + len, "VM%02d CPUs Configured: %d\n",
+                               i, info->vm[i].cpus_configured);
+                len += sprintf(page + len, "VM%02d CPUs Standby:    %d\n",
+                               i, info->vm[i].cpus_standby);
+                len += sprintf(page + len, "VM%02d CPUs Reserved:   %d\n",
+                               i, info->vm[i].cpus_reserved);
+        }
+        return len;
+}
+
+static int proc_read_sysinfo(char *page, char **start,
+                             off_t off, int count,
+                             int *eof, void *data)
+{
+        unsigned long info = get_zeroed_page(GFP_KERNEL);
+        int level, len;
+
+        if (!info)
+                return 0;
+
+        len = 0;
+        level = stsi_0();
+        if (level >= 1)
+                len = stsi_1_1_1((struct sysinfo_1_1_1 *) info, page, len);
+
+        if (level >= 1)
+                len = stsi_1_2_2((struct sysinfo_1_2_2 *) info, page, len);
+
+        if (level >= 2)
+                len = stsi_2_2_2((struct sysinfo_2_2_2 *) info, page, len);
+
+        if (level >= 3)
+                len = stsi_3_2_2((struct sysinfo_3_2_2 *) info, page, len);
+
+        free_page(info);
+        return len;
+}
+
+static __init int create_proc_sysinfo(void)
+{
+        create_proc_read_entry("sysinfo", 0444, NULL,
+                               proc_read_sysinfo, NULL);
+        return 0;
+}
+device_initcall(create_proc_sysinfo);
+
+/*
+ * Service levels interface.
+ */
+
+static DECLARE_RWSEM(service_level_sem);
+static LIST_HEAD(service_level_list);
+
+int register_service_level(struct service_level *slr)
+{
+        struct service_level *ptr;
+
+        down_write(&service_level_sem);
+        list_for_each_entry(ptr, &service_level_list, list)
+                if (ptr == slr) {
+                        up_write(&service_level_sem);
+                        return -EEXIST;
+                }
+        list_add_tail(&slr->list, &service_level_list);
+        up_write(&service_level_sem);
+        return 0;
+}
+EXPORT_SYMBOL(register_service_level);
+
+int unregister_service_level(struct service_level *slr)
+{
+        struct service_level *ptr, *next;
+        int rc = -ENOENT;
+
+        down_write(&service_level_sem);
+        list_for_each_entry_safe(ptr, next, &service_level_list, list) {
+                if (ptr != slr)
+                        continue;
+                list_del(&ptr->list);
+                rc = 0;
+                break;
+        }
+        up_write(&service_level_sem);
+        return rc;
+}
+EXPORT_SYMBOL(unregister_service_level);
+
+static void *service_level_start(struct seq_file *m, loff_t *pos)
+{
+        down_read(&service_level_sem);
+        return seq_list_start(&service_level_list, *pos);
+}
+
+static void *service_level_next(struct seq_file *m, void *p, loff_t *pos)
+{
+        return seq_list_next(p, &service_level_list, pos);
+}
+
+static void service_level_stop(struct seq_file *m, void *p)
+{
+        up_read(&service_level_sem);
+}
+
+static int service_level_show(struct seq_file *m, void *p)
+{
+        struct service_level *slr;
+
+        slr = list_entry(p, struct service_level, list);
+        slr->seq_print(m, slr);
+        return 0;
+}
+
+static const struct seq_operations service_level_seq_ops = {
+        .start          = service_level_start,
+        .next           = service_level_next,
+        .stop           = service_level_stop,
+        .show           = service_level_show
+};
+
+static int service_level_open(struct inode *inode, struct file *file)
+{
+        return seq_open(file, &service_level_seq_ops);
+}
+
+static const struct file_operations service_level_ops = {
+        .open           = service_level_open,
+        .read           = seq_read,
+        .llseek         = seq_lseek,
+        .release        = seq_release
+};
+
+static void service_level_vm_print(struct seq_file *m,
+                                   struct service_level *slr)
+{
+        char *query_buffer, *str;
+
+        query_buffer = kmalloc(1024, GFP_KERNEL | GFP_DMA);
+        if (!query_buffer)
+                return;
+        cpcmd("QUERY CPLEVEL", query_buffer, 1024, NULL);
+        str = strchr(query_buffer, '\n');
+        if (str)
+                *str = 0;
+        seq_printf(m, "VM: %s\n", query_buffer);
+        kfree(query_buffer);
+}
+
+static struct service_level service_level_vm = {
+        .seq_print = service_level_vm_print
+};
+
+static __init int create_proc_service_level(void)
+{
+        proc_create("service_levels", 0, NULL, &service_level_ops);
+        if (MACHINE_IS_VM)
+                register_service_level(&service_level_vm);
+        return 0;
+}
+subsys_initcall(create_proc_service_level);
+
+/*
+ * Bogomips calculation based on cpu capability.
+ */
+int get_cpu_capability(unsigned int *capability)
+{
+        struct sysinfo_1_2_2 *info;
+        int rc;
+
+        info = (void *) get_zeroed_page(GFP_KERNEL);
+        if (!info)
+                return -ENOMEM;
+        rc = stsi(info, 1, 2, 2);
+        if (rc == -ENOSYS)
+                goto out;
+        rc = 0;
+        *capability = info->capability;
+out:
+        free_page((unsigned long) info);
+        return rc;
+}
+
+/*
+ * CPU capability might have changed. Therefore recalculate loops_per_jiffy.
+ */
+void s390_adjust_jiffies(void)
+{
+        struct sysinfo_1_2_2 *info;
+        const unsigned int fmil = 0x4b189680;   /* 1e7 as 32-bit float. */
+        FP_DECL_S(SA); FP_DECL_S(SB); FP_DECL_S(SR);
+        FP_DECL_EX;
+        unsigned int capability;
+
+        info = (void *) get_zeroed_page(GFP_KERNEL);
+        if (!info)
+                return;
+
+        if (stsi(info, 1, 2, 2) != -ENOSYS) {
+                /*
+                 * Major sigh. The cpu capability encoding is "special".
+                 * If the first 9 bits of info->capability are 0 then it
+                 * is a 32 bit unsigned integer in the range 0 .. 2^23.
+                 * If the first 9 bits are != 0 then it is a 32 bit float.
+                 * In addition a lower value indicates a proportionally
+                 * higher cpu capacity. Bogomips are the other way round.
+                 * To get to a halfway suitable number we divide 1e7
+                 * by the cpu capability number. Yes, that means a floating
+                 * point division .. math-emu here we come :-)
+                 */
+                FP_UNPACK_SP(SA, &fmil);
+                if ((info->capability >> 23) == 0)
+                        FP_FROM_INT_S(SB, info->capability, 32, int);
+                else
+                        FP_UNPACK_SP(SB, &info->capability);
+                FP_DIV_S(SR, SA, SB);
+                FP_TO_INT_S(capability, SR, 32, 0);
+        } else
+                /*
+                 * Really old machine without stsi block for basic
+                 * cpu information. Report 42.0 bogomips.
+                 */
+                capability = 42;
+        loops_per_jiffy = capability * (500000/HZ);
+        free_page((unsigned long) info);
+}
+
+/*
+ * calibrate the delay loop
+ */
+void __cpuinit calibrate_delay(void)
+{
+        s390_adjust_jiffies();
+        /* Print the good old Bogomips line .. */
+        printk(KERN_DEBUG "Calibrating delay loop (skipped)... "
+               "%lu.%02lu BogoMIPS preset\n", loops_per_jiffy/(500000/HZ),
+               (loops_per_jiffy/(5000/HZ)) % 100);
+}
diff --git a/arch/s390/kernel/time.c b/arch/s390/kernel/time.c
index fc468cae4460..f72d41068dc2 100644
--- a/arch/s390/kernel/time.c
+++ b/arch/s390/kernel/time.c
@@ -331,6 +331,7 @@ static unsigned long long adjust_time(unsigned long long old,
 }
 
 static DEFINE_PER_CPU(atomic_t, clock_sync_word);
+static DEFINE_MUTEX(clock_sync_mutex);
 static unsigned long clock_sync_flags;
 
 #define CLOCK_SYNC_HAS_ETR      0
@@ -394,6 +395,20 @@ static void enable_sync_clock(void)
         atomic_set_mask(0x80000000, sw_ptr);
 }
 
+/*
+ * Function to check if the clock is in sync.
+ */
+static inline int check_sync_clock(void)
+{
+        atomic_t *sw_ptr;
+        int rc;
+
+        sw_ptr = &get_cpu_var(clock_sync_word);
+        rc = (atomic_read(sw_ptr) & 0x80000000U) != 0;
+        put_cpu_var(clock_sync_sync);
+        return rc;
+}
+
 /* Single threaded workqueue used for etr and stp sync events */
 static struct workqueue_struct *time_sync_wq;
 
@@ -485,6 +500,8 @@ static void etr_reset(void)
         if (etr_setr(&etr_eacr) == 0) {
                 etr_tolec = get_clock();
                 set_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags);
+                if (etr_port0_online && etr_port1_online)
+                        set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
         } else if (etr_port0_online || etr_port1_online) {
                 pr_warning("The real or virtual hardware system does "
                            "not provide an ETR interface\n");
@@ -533,8 +550,7 @@ void etr_switch_to_local(void)
 {
         if (!etr_eacr.sl)
                 return;
-        if (test_bit(CLOCK_SYNC_ETR, &clock_sync_flags))
-                disable_sync_clock(NULL);
+        disable_sync_clock(NULL);
         set_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events);
         queue_work(time_sync_wq, &etr_work);
 }
@@ -549,8 +565,7 @@ void etr_sync_check(void)
 {
         if (!etr_eacr.es)
                 return;
-        if (test_bit(CLOCK_SYNC_ETR, &clock_sync_flags))
-                disable_sync_clock(NULL);
+        disable_sync_clock(NULL);
         set_bit(ETR_EVENT_SYNC_CHECK, &etr_events);
         queue_work(time_sync_wq, &etr_work);
 }
@@ -914,7 +929,7 @@ static struct etr_eacr etr_handle_update(struct etr_aib *aib,
          * Do not try to get the alternate port aib if the clock
          * is not in sync yet.
          */
-        if (!test_bit(CLOCK_SYNC_STP, &clock_sync_flags) && !eacr.es)
+        if (!check_sync_clock())
                 return eacr;
 
         /*
@@ -997,7 +1012,6 @@ static void etr_work_fn(struct work_struct *work)
                 on_each_cpu(disable_sync_clock, NULL, 1);
                 del_timer_sync(&etr_timer);
                 etr_update_eacr(eacr);
-                clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
                 goto out_unlock;
         }
 
@@ -1071,18 +1085,13 @@ static void etr_work_fn(struct work_struct *work)
                 /* Both ports not usable. */
                 eacr.es = eacr.sl = 0;
                 sync_port = -1;
-                clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
         }
 
-        if (!test_bit(CLOCK_SYNC_ETR, &clock_sync_flags))
-                eacr.es = 0;
-
         /*
          * If the clock is in sync just update the eacr and return.
          * If there is no valid sync port wait for a port update.
          */
-        if (test_bit(CLOCK_SYNC_STP, &clock_sync_flags) ||
-            eacr.es || sync_port < 0) {
+        if (check_sync_clock() || sync_port < 0) {
                 etr_update_eacr(eacr);
                 etr_set_tolec_timeout(now);
                 goto out_unlock;
@@ -1103,13 +1112,11 @@ static void etr_work_fn(struct work_struct *work)
          * and set up a timer to try again after 0.5 seconds
          */
         etr_update_eacr(eacr);
-        set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
         if (now < etr_tolec + (1600000 << 12) ||
             etr_sync_clock_stop(&aib, sync_port) != 0) {
                 /* Sync failed. Try again in 1/2 second. */
                 eacr.es = 0;
                 etr_update_eacr(eacr);
-                clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
                 etr_set_sync_timeout();
         } else
                 etr_set_tolec_timeout(now);
@@ -1191,19 +1198,30 @@ static ssize_t etr_online_store(struct sys_device *dev,
                 return -EINVAL;
         if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags))
                 return -EOPNOTSUPP;
+        mutex_lock(&clock_sync_mutex);
         if (dev == &etr_port0_dev) {
                 if (etr_port0_online == value)
-                        return count;   /* Nothing to do. */
+                        goto out;       /* Nothing to do. */
                 etr_port0_online = value;
+                if (etr_port0_online && etr_port1_online)
+                        set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
+                else
+                        clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
                 set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
                 queue_work(time_sync_wq, &etr_work);
         } else {
                 if (etr_port1_online == value)
-                        return count;   /* Nothing to do. */
+                        goto out;       /* Nothing to do. */
                 etr_port1_online = value;
+                if (etr_port0_online && etr_port1_online)
+                        set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
+                else
+                        clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
                 set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
                 queue_work(time_sync_wq, &etr_work);
         }
+out:
+        mutex_unlock(&clock_sync_mutex);
         return count;
 }
 
@@ -1471,8 +1489,6 @@ static void stp_timing_alert(struct stp_irq_parm *intparm)
  */
 void stp_sync_check(void)
 {
-        if (!test_bit(CLOCK_SYNC_STP, &clock_sync_flags))
-                return;
         disable_sync_clock(NULL);
         queue_work(time_sync_wq, &stp_work);
 }
@@ -1485,8 +1501,6 @@ void stp_sync_check(void)
  */
 void stp_island_check(void)
 {
-        if (!test_bit(CLOCK_SYNC_STP, &clock_sync_flags))
-                return;
         disable_sync_clock(NULL);
         queue_work(time_sync_wq, &stp_work);
 }
@@ -1513,10 +1527,6 @@ static int stp_sync_clock(void *data)
 
         enable_sync_clock();
 
-        set_bit(CLOCK_SYNC_STP, &clock_sync_flags);
-        if (test_and_clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags))
-                queue_work(time_sync_wq, &etr_work);
-
         rc = 0;
         if (stp_info.todoff[0] || stp_info.todoff[1] ||
             stp_info.todoff[2] || stp_info.todoff[3] ||
@@ -1535,9 +1545,6 @@ static int stp_sync_clock(void *data)
         if (rc) {
                 disable_sync_clock(NULL);
                 stp_sync->in_sync = -EAGAIN;
-                clear_bit(CLOCK_SYNC_STP, &clock_sync_flags);
-                if (etr_port0_online || etr_port1_online)
-                        queue_work(time_sync_wq, &etr_work);
         } else
                 stp_sync->in_sync = 1;
         xchg(&first, 0);
@@ -1569,6 +1576,10 @@ static void stp_work_fn(struct work_struct *work)
         if (rc || stp_info.c == 0)
                 goto out_unlock;
 
+        /* Skip synchronization if the clock is already in sync. */
+        if (check_sync_clock())
+                goto out_unlock;
+
         memset(&stp_sync, 0, sizeof(stp_sync));
         get_online_cpus();
         atomic_set(&stp_sync.cpus, num_online_cpus() - 1);
@@ -1684,8 +1695,14 @@ static ssize_t stp_online_store(struct sysdev_class *class,
                 return -EINVAL;
         if (!test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
                 return -EOPNOTSUPP;
+        mutex_lock(&clock_sync_mutex);
         stp_online = value;
+        if (stp_online)
+                set_bit(CLOCK_SYNC_STP, &clock_sync_flags);
+        else
+                clear_bit(CLOCK_SYNC_STP, &clock_sync_flags);
         queue_work(time_sync_wq, &stp_work);
+        mutex_unlock(&clock_sync_mutex);
         return count;
 }
 
diff --git a/arch/s390/kernel/topology.c b/arch/s390/kernel/topology.c
index cc362c9ea8f1..3c72c9cf22b6 100644
--- a/arch/s390/kernel/topology.c
+++ b/arch/s390/kernel/topology.c
@@ -74,7 +74,7 @@ static DEFINE_SPINLOCK(topology_lock);
 
 cpumask_t cpu_core_map[NR_CPUS];
 
-cpumask_t cpu_coregroup_map(unsigned int cpu)
+static cpumask_t cpu_coregroup_map(unsigned int cpu)
 {
         struct core_info *core = &core_info;
         unsigned long flags;
diff --git a/arch/s390/kernel/traps.c b/arch/s390/kernel/traps.c
index 4584d81984c0..c2e42cc65ce7 100644
--- a/arch/s390/kernel/traps.c
+++ b/arch/s390/kernel/traps.c
@@ -61,9 +61,11 @@ extern pgm_check_handler_t do_asce_exception;
 #define stack_pointer ({ void **sp; asm("la %0,0(15)" : "=&d" (sp)); sp; })
 
 #ifndef CONFIG_64BIT
+#define LONG "%08lx "
 #define FOURLONG "%08lx %08lx %08lx %08lx\n"
 static int kstack_depth_to_print = 12;
 #else /* CONFIG_64BIT */
+#define LONG "%016lx "
 #define FOURLONG "%016lx %016lx %016lx %016lx\n"
 static int kstack_depth_to_print = 20;
 #endif /* CONFIG_64BIT */
@@ -155,7 +157,7 @@ void show_stack(struct task_struct *task, unsigned long *sp)
                         break;
                 if (i && ((i * sizeof (long) % 32) == 0))
                         printk("\n       ");
-                printk("%p ", (void *)*stack++);
+                printk(LONG, *stack++);
         }
         printk("\n");
         show_trace(task, sp);
diff --git a/arch/s390/kernel/vdso.c b/arch/s390/kernel/vdso.c
index 690e17819686..89b2e7f1b7a9 100644
--- a/arch/s390/kernel/vdso.c
+++ b/arch/s390/kernel/vdso.c
@@ -144,7 +144,6 @@ out:
         return -ENOMEM;
 }
 
-#ifdef CONFIG_HOTPLUG_CPU
 void vdso_free_per_cpu(int cpu, struct _lowcore *lowcore)
 {
         unsigned long segment_table, page_table, page_frame;
@@ -163,7 +162,6 @@ void vdso_free_per_cpu(int cpu, struct _lowcore *lowcore)
         free_page(page_table);
         free_pages(segment_table, SEGMENT_ORDER);
 }
-#endif /* CONFIG_HOTPLUG_CPU */
 
 static void __vdso_init_cr5(void *dummy)
 {
diff --git a/arch/s390/kernel/vmlinux.lds.S b/arch/s390/kernel/vmlinux.lds.S
index d796d05c9c01..7a2063eb88f0 100644
--- a/arch/s390/kernel/vmlinux.lds.S
+++ b/arch/s390/kernel/vmlinux.lds.S
@@ -108,6 +108,8 @@ SECTIONS
                 EXIT_TEXT
         }
 
+        /* early.c uses stsi, which requires page aligned data. */
+        . = ALIGN(PAGE_SIZE);
         .init.data : {
                 INIT_DATA
         }
diff --git a/arch/s390/kvm/Kconfig b/arch/s390/kvm/Kconfig
index e051cad1f1e0..3e260b7e37b2 100644
--- a/arch/s390/kvm/Kconfig
+++ b/arch/s390/kvm/Kconfig
@@ -4,6 +4,9 @@
 config HAVE_KVM
        bool
 
+config HAVE_KVM_IRQCHIP
+       bool
+
 menuconfig VIRTUALIZATION
         bool "Virtualization"
         default y
diff --git a/arch/s390/kvm/intercept.c b/arch/s390/kvm/intercept.c
index 61236102203e..9d19803111ba 100644
--- a/arch/s390/kvm/intercept.c
+++ b/arch/s390/kvm/intercept.c
@@ -103,7 +103,7 @@ static int handle_lctl(struct kvm_vcpu *vcpu)
 static intercept_handler_t instruction_handlers[256] = {
         [0x83] = kvm_s390_handle_diag,
         [0xae] = kvm_s390_handle_sigp,
-        [0xb2] = kvm_s390_handle_priv,
+        [0xb2] = kvm_s390_handle_b2,
         [0xb7] = handle_lctl,
         [0xeb] = handle_lctlg,
 };
diff --git a/arch/s390/kvm/interrupt.c b/arch/s390/kvm/interrupt.c
index f4fe28a2521a..0189356fe209 100644
--- a/arch/s390/kvm/interrupt.c
+++ b/arch/s390/kvm/interrupt.c
@@ -555,9 +555,14 @@ int kvm_s390_inject_vcpu(struct kvm_vcpu *vcpu,
                 VCPU_EVENT(vcpu, 3, "inject: program check %d (from user)",
                            s390int->parm);
                 break;
+        case KVM_S390_SIGP_SET_PREFIX:
+                inti->prefix.address = s390int->parm;
+                inti->type = s390int->type;
+                VCPU_EVENT(vcpu, 3, "inject: set prefix to %x (from user)",
+                           s390int->parm);
+                break;
         case KVM_S390_SIGP_STOP:
         case KVM_S390_RESTART:
-        case KVM_S390_SIGP_SET_PREFIX:
         case KVM_S390_INT_EMERGENCY:
                 VCPU_EVENT(vcpu, 3, "inject: type %x", s390int->type);
                 inti->type = s390int->type;
diff --git a/arch/s390/kvm/kvm-s390.c b/arch/s390/kvm/kvm-s390.c
index 0d33893e1e89..f4d56e9939c9 100644
--- a/arch/s390/kvm/kvm-s390.c
+++ b/arch/s390/kvm/kvm-s390.c
@@ -23,7 +23,7 @@
 #include <linux/timer.h>
 #include <asm/lowcore.h>
 #include <asm/pgtable.h>
-
+#include <asm/nmi.h>
 #include "kvm-s390.h"
 #include "gaccess.h"
 
@@ -286,7 +286,7 @@ int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
         setup_timer(&vcpu->arch.ckc_timer, kvm_s390_idle_wakeup,
                  (unsigned long) vcpu);
         get_cpu_id(&vcpu->arch.cpu_id);
-        vcpu->arch.cpu_id.version = 0xfe;
+        vcpu->arch.cpu_id.version = 0xff;
         return 0;
 }
 
@@ -422,8 +422,8 @@ int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
         return -EINVAL; /* not implemented yet */
 }
 
-int kvm_arch_vcpu_ioctl_debug_guest(struct kvm_vcpu *vcpu,
-                                    struct kvm_debug_guest *dbg)
+int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
+                                        struct kvm_guest_debug *dbg)
 {
         return -EINVAL; /* not implemented yet */
 }
@@ -440,8 +440,6 @@ int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
         return -EINVAL; /* not implemented yet */
 }
 
-extern void s390_handle_mcck(void);
-
 static void __vcpu_run(struct kvm_vcpu *vcpu)
 {
         memcpy(&vcpu->arch.sie_block->gg14, &vcpu->arch.guest_gprs[14], 16);
diff --git a/arch/s390/kvm/kvm-s390.h b/arch/s390/kvm/kvm-s390.h
index 3893cf12eacf..00bbe69b78da 100644
--- a/arch/s390/kvm/kvm-s390.h
+++ b/arch/s390/kvm/kvm-s390.h
@@ -50,7 +50,7 @@ int kvm_s390_inject_vcpu(struct kvm_vcpu *vcpu,
 int kvm_s390_inject_program_int(struct kvm_vcpu *vcpu, u16 code);
 
 /* implemented in priv.c */
-int kvm_s390_handle_priv(struct kvm_vcpu *vcpu);
+int kvm_s390_handle_b2(struct kvm_vcpu *vcpu);
 
 /* implemented in sigp.c */
 int kvm_s390_handle_sigp(struct kvm_vcpu *vcpu);
diff --git a/arch/s390/kvm/priv.c b/arch/s390/kvm/priv.c
index 3605df45dd41..4b88834b8dd8 100644
--- a/arch/s390/kvm/priv.c
+++ b/arch/s390/kvm/priv.c
@@ -304,12 +304,24 @@ static intercept_handler_t priv_handlers[256] = {
         [0xb1] = handle_stfl,
 };
 
-int kvm_s390_handle_priv(struct kvm_vcpu *vcpu)
+int kvm_s390_handle_b2(struct kvm_vcpu *vcpu)
 {
         intercept_handler_t handler;
 
+        /*
+         * a lot of B2 instructions are priviledged. We first check for
+         * the priviledges ones, that we can handle in the kernel. If the
+         * kernel can handle this instruction, we check for the problem
+         * state bit and (a) handle the instruction or (b) send a code 2
+         * program check.
+         * Anything else goes to userspace.*/
         handler = priv_handlers[vcpu->arch.sie_block->ipa & 0x00ff];
-        if (handler)
-                return handler(vcpu);
+        if (handler) {
+                if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
+                        return kvm_s390_inject_program_int(vcpu,
+                                                   PGM_PRIVILEGED_OPERATION);
+                else
+                        return handler(vcpu);
+        }
         return -ENOTSUPP;
 }
diff --git a/arch/s390/kvm/sigp.c b/arch/s390/kvm/sigp.c
index 2a01b9e02801..f27dbedf0866 100644
--- a/arch/s390/kvm/sigp.c
+++ b/arch/s390/kvm/sigp.c
@@ -153,8 +153,6 @@ static int __sigp_set_arch(struct kvm_vcpu *vcpu, u32 parameter)
 
         switch (parameter & 0xff) {
         case 0:
-                printk(KERN_WARNING "kvm: request to switch to ESA/390 mode"
-                                                        " not supported");
                 rc = 3; /* not operational */
                 break;
         case 1:
diff --git a/arch/s390/lib/delay.c b/arch/s390/lib/delay.c
index 6ccb9fab055a..3f5f680726ed 100644
--- a/arch/s390/lib/delay.c
+++ b/arch/s390/lib/delay.c
@@ -9,6 +9,7 @@
 #include <linux/sched.h>
 #include <linux/delay.h>
 #include <linux/timex.h>
+#include <linux/module.h>
 #include <linux/irqflags.h>
 #include <linux/interrupt.h>
 
@@ -92,6 +93,7 @@ out:
         local_irq_restore(flags);
         preempt_enable();
 }
+EXPORT_SYMBOL(__udelay);
 
 /*
  * Simple udelay variant. To be used on startup and reboot
diff --git a/arch/s390/lib/div64.c b/arch/s390/lib/div64.c
index a5f8300bf3ee..d9e62c0b576a 100644
--- a/arch/s390/lib/div64.c
+++ b/arch/s390/lib/div64.c
@@ -61,7 +61,7 @@ static uint32_t __div64_31(uint64_t *n, uint32_t base)
                 "       clr     %0,%3\n"
                 "       jl      0f\n"
                 "       slr     %0,%3\n"
-                "       alr     %1,%2\n"
+                "       ahi     %1,1\n"
                 "0:\n"
                 : "+d" (reg2), "+d" (reg3), "=d" (tmp)
                 : "d" (base), "2" (1UL) : "cc" );
diff --git a/arch/s390/lib/string.c b/arch/s390/lib/string.c
index ae5cf5d03d41..4143b7c19096 100644
--- a/arch/s390/lib/string.c
+++ b/arch/s390/lib/string.c
@@ -44,7 +44,11 @@ static inline char *__strnend(const char *s, size_t n)
  */
 size_t strlen(const char *s)
 {
+#if __GNUC__ < 4
         return __strend(s) - s;
+#else
+        return __builtin_strlen(s);
+#endif
 }
 EXPORT_SYMBOL(strlen);
 
@@ -70,6 +74,7 @@ EXPORT_SYMBOL(strnlen);
  */
 char *strcpy(char *dest, const char *src)
 {
+#if __GNUC__ < 4
         register int r0 asm("0") = 0;
         char *ret = dest;
 
@@ -78,6 +83,9 @@ char *strcpy(char *dest, const char *src)
                       : "+&a" (dest), "+&a" (src) : "d" (r0)
                       : "cc", "memory" );
         return ret;
+#else
+        return __builtin_strcpy(dest, src);
+#endif
 }
 EXPORT_SYMBOL(strcpy);
 
diff --git a/arch/s390/lib/uaccess_pt.c b/arch/s390/lib/uaccess_pt.c
index d66215b0fde9..b0b84c35b0ad 100644
--- a/arch/s390/lib/uaccess_pt.c
+++ b/arch/s390/lib/uaccess_pt.c
@@ -119,8 +119,6 @@ retry:
                         goto fault;
 
                 pfn = pte_pfn(*pte);
-                if (!pfn_valid(pfn))
-                        goto out;
 
                 offset = uaddr & (PAGE_SIZE - 1);
                 size = min(n - done, PAGE_SIZE - offset);
@@ -135,7 +133,6 @@ retry:
                 done += size;
                 uaddr += size;
         } while (done < n);
-out:
         spin_unlock(&mm->page_table_lock);
         return n - done;
 fault:
@@ -163,9 +160,6 @@ retry:
                 goto fault;
 
         pfn = pte_pfn(*pte);
-        if (!pfn_valid(pfn))
-                goto out;
-
         ret = (pfn << PAGE_SHIFT) + (uaddr & (PAGE_SIZE - 1));
 out:
         return ret;
@@ -244,11 +238,6 @@ retry:
                         goto fault;
 
                 pfn = pte_pfn(*pte);
-                if (!pfn_valid(pfn)) {
-                        done = -1;
-                        goto out;
-                }
-
                 offset = uaddr & (PAGE_SIZE-1);
                 addr = (char *)(pfn << PAGE_SHIFT) + offset;
                 len = min(count - done, PAGE_SIZE - offset);
@@ -256,7 +245,6 @@ retry:
                 done += len_str;
                 uaddr += len_str;
         } while ((len_str == len) && (done < count));
-out:
         spin_unlock(&mm->page_table_lock);
         return done + 1;
 fault:
@@ -325,12 +313,7 @@ retry:
                 }
 
                 pfn_from = pte_pfn(*pte_from);
-                if (!pfn_valid(pfn_from))
-                        goto out;
                 pfn_to = pte_pfn(*pte_to);
-                if (!pfn_valid(pfn_to))
-                        goto out;
-
                 offset_from = uaddr_from & (PAGE_SIZE-1);
                 offset_to = uaddr_from & (PAGE_SIZE-1);
                 offset_max = max(offset_from, offset_to);
@@ -342,7 +325,6 @@ retry:
                 uaddr_from += size;
                 uaddr_to += size;
         } while (done < n);
-out:
         spin_unlock(&mm->page_table_lock);
         return n - done;
 fault:
diff --git a/arch/s390/mm/fault.c b/arch/s390/mm/fault.c
index 4d537205e83c..833e8366c351 100644
--- a/arch/s390/mm/fault.c
+++ b/arch/s390/mm/fault.c
@@ -200,29 +200,6 @@ static void do_low_address(struct pt_regs *regs, unsigned long error_code)
         do_no_context(regs, error_code, 0);
 }
 
-/*
- * We ran out of memory, or some other thing happened to us that made
- * us unable to handle the page fault gracefully.
- */
-static int do_out_of_memory(struct pt_regs *regs, unsigned long error_code,
-                            unsigned long address)
-{
-        struct task_struct *tsk = current;
-        struct mm_struct *mm = tsk->mm;
-
-        up_read(&mm->mmap_sem);
-        if (is_global_init(tsk)) {
-                yield();
-                down_read(&mm->mmap_sem);
-                return 1;
-        }
-        printk("VM: killing process %s\n", tsk->comm);
-        if (regs->psw.mask & PSW_MASK_PSTATE)
-                do_group_exit(SIGKILL);
-        do_no_context(regs, error_code, address);
-        return 0;
-}
-
 static void do_sigbus(struct pt_regs *regs, unsigned long error_code,
                       unsigned long address)
 {
@@ -367,7 +344,6 @@ good_area:
                         goto bad_area;
         }
 
-survive:
         if (is_vm_hugetlb_page(vma))
                 address &= HPAGE_MASK;
         /*
@@ -378,8 +354,8 @@ survive:
         fault = handle_mm_fault(mm, vma, address, write);
         if (unlikely(fault & VM_FAULT_ERROR)) {
                 if (fault & VM_FAULT_OOM) {
-                        if (do_out_of_memory(regs, error_code, address))
-                                goto survive;
+                        up_read(&mm->mmap_sem);
+                        pagefault_out_of_memory();
                         return;
                 } else if (fault & VM_FAULT_SIGBUS) {
                         do_sigbus(regs, error_code, address);
diff --git a/arch/s390/mm/init.c b/arch/s390/mm/init.c
index f0258ca3b17e..c634dfbe92e9 100644
--- a/arch/s390/mm/init.c
+++ b/arch/s390/mm/init.c
@@ -40,7 +40,9 @@
 DEFINE_PER_CPU(struct mmu_gather, mmu_gathers);
 
 pgd_t swapper_pg_dir[PTRS_PER_PGD] __attribute__((__aligned__(PAGE_SIZE)));
+
 char  empty_zero_page[PAGE_SIZE] __attribute__((__aligned__(PAGE_SIZE)));
+EXPORT_SYMBOL(empty_zero_page);
 
 /*
  * paging_init() sets up the page tables
diff --git a/arch/s390/mm/mmap.c b/arch/s390/mm/mmap.c
index 5932a824547a..e008d236cc15 100644
--- a/arch/s390/mm/mmap.c
+++ b/arch/s390/mm/mmap.c
@@ -35,7 +35,7 @@
  * Leave an at least ~128 MB hole.
  */
 #define MIN_GAP (128*1024*1024)
-#define MAX_GAP (TASK_SIZE/6*5)
+#define MAX_GAP (STACK_TOP/6*5)
 
 static inline unsigned long mmap_base(void)
 {
@@ -46,7 +46,7 @@ static inline unsigned long mmap_base(void)
         else if (gap > MAX_GAP)
                 gap = MAX_GAP;
 
-        return TASK_SIZE - (gap & PAGE_MASK);
+        return STACK_TOP - (gap & PAGE_MASK);
 }
 
 static inline int mmap_is_legacy(void)
@@ -89,42 +89,58 @@ EXPORT_SYMBOL_GPL(arch_pick_mmap_layout);
 
 #else
 
+int s390_mmap_check(unsigned long addr, unsigned long len)
+{
+        if (!test_thread_flag(TIF_31BIT) &&
+            len >= TASK_SIZE && TASK_SIZE < (1UL << 53))
+                return crst_table_upgrade(current->mm, 1UL << 53);
+        return 0;
+}
+
 static unsigned long
 s390_get_unmapped_area(struct file *filp, unsigned long addr,
                 unsigned long len, unsigned long pgoff, unsigned long flags)
 {
         struct mm_struct *mm = current->mm;
+        unsigned long area;
         int rc;
 
-        addr = arch_get_unmapped_area(filp, addr, len, pgoff, flags);
-        if (addr & ~PAGE_MASK)
-                return addr;
-        if (unlikely(mm->context.asce_limit < addr + len)) {
-                rc = crst_table_upgrade(mm, addr + len);
+        area = arch_get_unmapped_area(filp, addr, len, pgoff, flags);
+        if (!(area & ~PAGE_MASK))
+                return area;
+        if (area == -ENOMEM &&
+            !test_thread_flag(TIF_31BIT) && TASK_SIZE < (1UL << 53)) {
+                /* Upgrade the page table to 4 levels and retry. */
+                rc = crst_table_upgrade(mm, 1UL << 53);
                 if (rc)
                         return (unsigned long) rc;
+                area = arch_get_unmapped_area(filp, addr, len, pgoff, flags);
         }
-        return addr;
+        return area;
 }
 
 static unsigned long
-s390_get_unmapped_area_topdown(struct file *filp, const unsigned long addr0,
+s390_get_unmapped_area_topdown(struct file *filp, const unsigned long addr,
                           const unsigned long len, const unsigned long pgoff,
                           const unsigned long flags)
 {
         struct mm_struct *mm = current->mm;
-        unsigned long addr = addr0;
+        unsigned long area;
         int rc;
 
-        addr = arch_get_unmapped_area_topdown(filp, addr, len, pgoff, flags);
-        if (addr & ~PAGE_MASK)
-                return addr;
-        if (unlikely(mm->context.asce_limit < addr + len)) {
-                rc = crst_table_upgrade(mm, addr + len);
+        area = arch_get_unmapped_area_topdown(filp, addr, len, pgoff, flags);
+        if (!(area & ~PAGE_MASK))
+                return area;
+        if (area == -ENOMEM &&
+            !test_thread_flag(TIF_31BIT) && TASK_SIZE < (1UL << 53)) {
+                /* Upgrade the page table to 4 levels and retry. */
+                rc = crst_table_upgrade(mm, 1UL << 53);
                 if (rc)
                         return (unsigned long) rc;
+                area = arch_get_unmapped_area_topdown(filp, addr, len,
+                                                      pgoff, flags);
         }
-        return addr;
+        return area;
 }
 /*
  * This function, called very early during the creation of a new
diff --git a/arch/s390/mm/pgtable.c b/arch/s390/mm/pgtable.c
index 0767827540b1..be6c1cf4ad5a 100644
--- a/arch/s390/mm/pgtable.c
+++ b/arch/s390/mm/pgtable.c
@@ -117,6 +117,7 @@ repeat:
                 crst_table_init(table, entry);
                 pgd_populate(mm, (pgd_t *) table, (pud_t *) pgd);
                 mm->pgd = (pgd_t *) table;
+                mm->task_size = mm->context.asce_limit;
                 table = NULL;
         }
         spin_unlock(&mm->page_table_lock);
@@ -154,6 +155,7 @@ void crst_table_downgrade(struct mm_struct *mm, unsigned long limit)
                         BUG();
                 }
                 mm->pgd = (pgd_t *) (pgd_val(*pgd) & _REGION_ENTRY_ORIGIN);
+                mm->task_size = mm->context.asce_limit;
                 crst_table_free(mm, (unsigned long *) pgd);
         }
         update_mm(mm, current);
@@ -256,6 +258,10 @@ int s390_enable_sie(void)
         struct task_struct *tsk = current;
         struct mm_struct *mm, *old_mm;
 
+        /* Do we have switched amode? If no, we cannot do sie */
+        if (!switch_amode)
+                return -EINVAL;
+
         /* Do we have pgstes? if yes, we are done */
         if (tsk->mm->context.has_pgste)
                 return 0;
@@ -290,7 +296,7 @@ int s390_enable_sie(void)
         tsk->mm = tsk->active_mm = mm;
         preempt_disable();
         update_mm(mm, tsk);
-        cpu_set(smp_processor_id(), mm->cpu_vm_mask);
+        cpumask_set_cpu(smp_processor_id(), mm_cpumask(mm));
         preempt_enable();
         task_unlock(tsk);
         mmput(old_mm);
diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig
index ebabe518e729..8d50d527c595 100644
--- a/arch/sh/Kconfig
+++ b/arch/sh/Kconfig
@@ -107,6 +107,9 @@ config SYS_SUPPORTS_NUMA
 config SYS_SUPPORTS_PCI
         bool
 
+config SYS_SUPPORTS_CMT
+        bool
+
 config STACKTRACE_SUPPORT
         def_bool y
 
@@ -176,6 +179,10 @@ config CPU_SHX2
 config CPU_SHX3
         bool
 
+config ARCH_SHMOBILE
+        bool
+        select ARCH_SUSPEND_POSSIBLE
+
 choice
         prompt "Processor sub-type selection"
 
@@ -188,6 +195,7 @@ choice
 config CPU_SUBTYPE_SH7619
         bool "Support SH7619 processor"
         select CPU_SH2
+        select SYS_SUPPORTS_CMT
 
 # SH-2A Processor Support
 
@@ -200,15 +208,18 @@ config CPU_SUBTYPE_SH7203
         bool "Support SH7203 processor"
         select CPU_SH2A
         select CPU_HAS_FPU
+        select SYS_SUPPORTS_CMT
 
 config CPU_SUBTYPE_SH7206
         bool "Support SH7206 processor"
         select CPU_SH2A
+        select SYS_SUPPORTS_CMT
 
 config CPU_SUBTYPE_SH7263
         bool "Support SH7263 processor"
         select CPU_SH2A
         select CPU_HAS_FPU
+        select SYS_SUPPORTS_CMT
 
 config CPU_SUBTYPE_MXG
         bool "Support MX-G processor"
@@ -323,7 +334,9 @@ config CPU_SUBTYPE_SH7723
         bool "Support SH7723 processor"
         select CPU_SH4A
         select CPU_SHX2
+        select ARCH_SHMOBILE
         select ARCH_SPARSEMEM_ENABLE
+        select SYS_SUPPORTS_CMT
         help
           Select SH7723 if you have an SH-MobileR2 CPU.
 
@@ -348,6 +361,14 @@ config CPU_SUBTYPE_SH7785
         select ARCH_SPARSEMEM_ENABLE
         select SYS_SUPPORTS_NUMA
 
+config CPU_SUBTYPE_SH7786
+        bool "Support SH7786 processor"
+        select CPU_SH4A
+        select CPU_SHX3
+        select CPU_HAS_PTEAEX
+        select ARCH_SPARSEMEM_ENABLE
+        select SYS_SUPPORTS_NUMA
+
 config CPU_SUBTYPE_SHX3
         bool "Support SH-X3 processor"
         select CPU_SH4A
@@ -362,20 +383,26 @@ config CPU_SUBTYPE_SHX3
 config CPU_SUBTYPE_SH7343
         bool "Support SH7343 processor"
         select CPU_SH4AL_DSP
+        select ARCH_SHMOBILE
+        select SYS_SUPPORTS_CMT
 
 config CPU_SUBTYPE_SH7722
         bool "Support SH7722 processor"
         select CPU_SH4AL_DSP
         select CPU_SHX2
+        select ARCH_SHMOBILE
         select ARCH_SPARSEMEM_ENABLE
         select SYS_SUPPORTS_NUMA
+        select SYS_SUPPORTS_CMT
 
 config CPU_SUBTYPE_SH7366
         bool "Support SH7366 processor"
         select CPU_SH4AL_DSP
         select CPU_SHX2
+        select ARCH_SHMOBILE
         select ARCH_SPARSEMEM_ENABLE
         select SYS_SUPPORTS_NUMA
+        select SYS_SUPPORTS_CMT
 
 # SH-5 Processor Support
 
@@ -398,25 +425,34 @@ source "arch/sh/boards/Kconfig"
 menu "Timer and clock configuration"
 
 config SH_TMU
-        def_bool y
-        prompt "TMU timer support"
+        bool "TMU timer support"
         depends on CPU_SH3 || CPU_SH4
+        default y
         select GENERIC_TIME
         select GENERIC_CLOCKEVENTS
         help
           This enables the use of the TMU as the system timer.
 
 config SH_CMT
-        def_bool y
-        prompt "CMT timer support"
-        depends on CPU_SH2 && !CPU_SUBTYPE_MXG
+        bool "CMT timer support"
+        depends on SYS_SUPPORTS_CMT && CPU_SH2
+        default y
         help
           This enables the use of the CMT as the system timer.
 
+#
+# Support for the new-style CMT driver. This will replace SH_CMT
+# once its other dependencies are merged.
+#
+config SH_TIMER_CMT
+        bool "CMT clockevents driver"
+        depends on SYS_SUPPORTS_CMT && !SH_CMT
+        select GENERIC_CLOCKEVENTS
+
 config SH_MTU2
-        def_bool n
-        prompt "MTU2 timer support"
+        bool "MTU2 timer support"
         depends on CPU_SH2A
+        default y
         help
           This enables the use of the MTU2 as the system timer.
 
@@ -426,7 +462,8 @@ config SH_TIMER_IRQ
                         CPU_SUBTYPE_SH7763
         default "86" if CPU_SUBTYPE_SH7619
         default "140" if CPU_SUBTYPE_SH7206
-        default "142" if CPU_SUBTYPE_SH7203
+        default "142" if CPU_SUBTYPE_SH7203 && SH_CMT
+        default "153" if CPU_SUBTYPE_SH7203 && SH_MTU2
         default "238" if CPU_SUBTYPE_MXG
         default "16"
 
@@ -438,7 +475,8 @@ config SH_PCLK_FREQ
         default "33333333" if CPU_SUBTYPE_SH7770 || CPU_SUBTYPE_SH7723 || \
                               CPU_SUBTYPE_SH7760 || CPU_SUBTYPE_SH7705 || \
                               CPU_SUBTYPE_SH7203 || CPU_SUBTYPE_SH7206 || \
-                              CPU_SUBTYPE_SH7263 || CPU_SUBTYPE_MXG
+                              CPU_SUBTYPE_SH7263 || CPU_SUBTYPE_MXG    || \
+                              CPU_SUBTYPE_SH7786
         default "60000000" if CPU_SUBTYPE_SH7751 || CPU_SUBTYPE_SH7751R
         default "66000000" if CPU_SUBTYPE_SH4_202
         default "50000000"
@@ -521,6 +559,13 @@ config CRASH_DUMP
 
           For more details see Documentation/kdump/kdump.txt
 
+config KEXEC_JUMP
+        bool "kexec jump (EXPERIMENTAL)"
+        depends on SUPERH32 && KEXEC && HIBERNATION && EXPERIMENTAL
+        help
+          Jump between original kernel and kexeced kernel and invoke
+          code via KEXEC
+
 config SECCOMP
         bool "Enable seccomp to safely compute untrusted bytecode"
         depends on PROC_FS
diff --git a/arch/sh/Kconfig.cpu b/arch/sh/Kconfig.cpu
index 0e27fe3b182b..c7d704381a6d 100644
--- a/arch/sh/Kconfig.cpu
+++ b/arch/sh/Kconfig.cpu
@@ -104,6 +104,9 @@ config CPU_HAS_SR_RB
 config CPU_HAS_PTEA
         bool
 
+config CPU_HAS_PTEAEX
+        bool
+
 config CPU_HAS_DSP
         bool
 
diff --git a/arch/sh/Makefile b/arch/sh/Makefile
index 4067b0d9287b..bece1f7535f2 100644
--- a/arch/sh/Makefile
+++ b/arch/sh/Makefile
@@ -80,6 +80,7 @@ OBJCOPYFLAGS	:= -O binary -R .note -R .note.gnu.build-id -R .comment \
 defaultimage-$(CONFIG_SUPERH32)                 := zImage
 defaultimage-$(CONFIG_SH_SH7785LCR)             := uImage
 defaultimage-$(CONFIG_SH_RSK)                   := uImage
+defaultimage-$(CONFIG_SH_URQUELL)               := uImage
 defaultimage-$(CONFIG_SH_7206_SOLUTION_ENGINE)  := vmlinux
 defaultimage-$(CONFIG_SH_7619_SOLUTION_ENGINE)  := vmlinux
 
diff --git a/arch/sh/boards/Kconfig b/arch/sh/boards/Kconfig
index 861914747e4e..dcc1af8a2cfe 100644
--- a/arch/sh/boards/Kconfig
+++ b/arch/sh/boards/Kconfig
@@ -155,17 +155,22 @@ config SH_SH7785LCR
 
 config SH_SH7785LCR_29BIT_PHYSMAPS
         bool "SH7785LCR 29bit physmaps"
-        depends on SH_SH7785LCR
+        depends on SH_SH7785LCR && 29BIT
         default y
         help
           This board has 2 physical memory maps. It can be changed with
           DIP switch(S2-5). If you set the DIP switch for S2-5 = ON,
           you can access all on-board device in 29bit address mode.
 
+config SH_URQUELL
+        bool "Urquell"
+        depends on CPU_SUBTYPE_SH7786
+        select ARCH_REQUIRE_GPIOLIB
+
 config SH_MIGOR
         bool "Migo-R"
         depends on CPU_SUBTYPE_SH7722
-        select GENERIC_GPIO
+        select ARCH_REQUIRE_GPIOLIB
         help
           Select Migo-R if configuring for the SH7722 Migo-R platform
           by Renesas System Solutions Asia Pte. Ltd.
@@ -173,7 +178,7 @@ config SH_MIGOR
 config SH_AP325RXA
         bool "AP-325RXA"
         depends on CPU_SUBTYPE_SH7723
-        select GENERIC_GPIO
+        select ARCH_REQUIRE_GPIOLIB
         help
           Renesas "AP-325RXA" support.
           Compatible with ALGO SYSTEM CO.,LTD. "AP-320A"
@@ -185,6 +190,13 @@ config SH_SH7763RDP
           Select SH7763RDP if configuring for a Renesas SH7763
           evaluation board.
 
+config SH_ESPT
+        bool "ESPT"
+        depends on CPU_SUBTYPE_SH7763
+        help
+          Select ESPT if configuring for a Renesas SH7763
+          with gigabit ether evaluation board.
+
 config SH_EDOSK7705
         bool "EDOSK7705"
         depends on CPU_SUBTYPE_SH7705
@@ -240,7 +252,7 @@ config SH_X3PROTO
 config SH_MAGIC_PANEL_R2
         bool "Magic Panel R2"
         depends on CPU_SUBTYPE_SH7720
-        select GENERIC_GPIO
+        select ARCH_REQUIRE_GPIOLIB
         help
           Select Magic Panel R2 if configuring for Magic Panel R2.
 
@@ -249,6 +261,13 @@ config SH_CAYMAN
         depends on CPU_SUBTYPE_SH5_101 || CPU_SUBTYPE_SH5_103
         select SYS_SUPPORTS_PCI
 
+config SH_POLARIS
+        bool "SMSC Polaris"
+        select CPU_HAS_IPR_IRQ
+        depends on CPU_SUBTYPE_SH7709
+        help
+          Select if configuring for an SMSC Polaris development board
+
 endmenu
 
 source "arch/sh/boards/mach-r2d/Kconfig"
diff --git a/arch/sh/boards/Makefile b/arch/sh/boards/Makefile
index 269ae2be49ef..7baa21090231 100644
--- a/arch/sh/boards/Makefile
+++ b/arch/sh/boards/Makefile
@@ -4,5 +4,8 @@
 obj-$(CONFIG_SH_AP325RXA)       += board-ap325rxa.o
 obj-$(CONFIG_SH_MAGIC_PANEL_R2) += board-magicpanelr2.o
 obj-$(CONFIG_SH_SH7785LCR)      += board-sh7785lcr.o
+obj-$(CONFIG_SH_URQUELL)        += board-urquell.o
 obj-$(CONFIG_SH_SHMIN)          += board-shmin.o
 obj-$(CONFIG_SH_EDOSK7760)      += board-edosk7760.o
+obj-$(CONFIG_SH_ESPT)           += board-espt.o
+obj-$(CONFIG_SH_POLARIS)        += board-polaris.o
diff --git a/arch/sh/boards/board-ap325rxa.c b/arch/sh/boards/board-ap325rxa.c
index 15b6d450fbf0..a64e38841c49 100644
--- a/arch/sh/boards/board-ap325rxa.c
+++ b/arch/sh/boards/board-ap325rxa.c
@@ -166,6 +166,16 @@ static void ap320_wvga_power_on(void *board_data)
         ctrl_outw(0x100, FPGA_BKLREG);
 }
 
+static void ap320_wvga_power_off(void *board_data)
+{
+        /* backlight */
+        ctrl_outw(0, FPGA_BKLREG);
+        gpio_set_value(GPIO_PTS3, 1);
+
+        /* ASD AP-320/325 LCD OFF */
+        ctrl_outw(0, FPGA_LCDREG);
+}
+
 static struct sh_mobile_lcdc_info lcdc_info = {
         .clock_source = LCDC_CLK_EXTERNAL,
         .ch[0] = {
@@ -191,6 +201,7 @@ static struct sh_mobile_lcdc_info lcdc_info = {
                 },
                 .board_cfg = {
                         .display_on = ap320_wvga_power_on,
+                        .display_off = ap320_wvga_power_off,
                 },
         }
 };
diff --git a/arch/sh/boards/board-espt.c b/arch/sh/boards/board-espt.c
new file mode 100644
index 000000000000..d5ce5e18eb37
--- /dev/null
+++ b/arch/sh/boards/board-espt.c
@@ -0,0 +1,102 @@
+/*
+ * Data Technology Inc. ESPT-GIGA board suport
+ *
+ * Copyright (C) 2008, 2009 Renesas Solutions Corp.
+ * Copyright (C) 2008, 2009 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/interrupt.h>
+#include <linux/mtd/physmap.h>
+#include <linux/io.h>
+#include <asm/machvec.h>
+#include <asm/sizes.h>
+#include <asm/sh_eth.h>
+
+/* NOR Flash */
+static struct mtd_partition espt_nor_flash_partitions[] = {
+        {
+                .name = "U-Boot",
+                .offset = 0,
+                .size = (2 * SZ_128K),
+                .mask_flags = MTD_WRITEABLE,    /* Read-only */
+        }, {
+                .name = "Linux-Kernel",
+                .offset = MTDPART_OFS_APPEND,
+                .size = (20 * SZ_128K),
+        }, {
+                .name = "Root Filesystem",
+                .offset = MTDPART_OFS_APPEND,
+                .size = MTDPART_SIZ_FULL,
+        },
+};
+
+static struct physmap_flash_data espt_nor_flash_data = {
+        .width = 2,
+        .parts = espt_nor_flash_partitions,
+        .nr_parts = ARRAY_SIZE(espt_nor_flash_partitions),
+};
+
+static struct resource espt_nor_flash_resources[] = {
+        [0] = {
+                .name = "NOR Flash",
+                .start = 0,
+                .end = SZ_8M - 1,
+                .flags = IORESOURCE_MEM,
+        },
+};
+
+static struct platform_device espt_nor_flash_device = {
+        .name = "physmap-flash",
+        .resource = espt_nor_flash_resources,
+        .num_resources = ARRAY_SIZE(espt_nor_flash_resources),
+        .dev = {
+                .platform_data = &espt_nor_flash_data,
+        },
+};
+
+/* SH-Ether */
+static struct resource sh_eth_resources[] = {
+        {
+                .start  = 0xFEE00800,   /* use eth1 */
+                .end    = 0xFEE00F7C - 1,
+                .flags  = IORESOURCE_MEM,
+        }, {
+                .start  = 57,   /* irq number */
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct sh_eth_plat_data sh7763_eth_pdata = {
+        .phy = 0,
+        .edmac_endian = EDMAC_LITTLE_ENDIAN,
+};
+
+static struct platform_device espt_eth_device = {
+        .name       = "sh-eth",
+        .resource   = sh_eth_resources,
+        .num_resources  = ARRAY_SIZE(sh_eth_resources),
+        .dev        = {
+                .platform_data = &sh7763_eth_pdata,
+        },
+};
+
+static struct platform_device *espt_devices[] __initdata = {
+        &espt_nor_flash_device,
+        &espt_eth_device,
+};
+
+static int __init espt_devices_setup(void)
+{
+        return platform_add_devices(espt_devices,
+                                    ARRAY_SIZE(espt_devices));
+}
+device_initcall(espt_devices_setup);
+
+static struct sh_machine_vector mv_espt __initmv = {
+        .mv_name = "ESPT-GIGA",
+};
diff --git a/arch/sh/boards/board-polaris.c b/arch/sh/boards/board-polaris.c
new file mode 100644
index 000000000000..62607eb51004
--- /dev/null
+++ b/arch/sh/boards/board-polaris.c
@@ -0,0 +1,149 @@
+/*
+ * June 2006 steve.glendinning@smsc.com
+ *
+ * Polaris-specific resource declaration
+ *
+ */
+
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/platform_device.h>
+#include <linux/smsc911x.h>
+#include <linux/io.h>
+#include <asm/irq.h>
+#include <asm/machvec.h>
+#include <asm/heartbeat.h>
+#include <cpu/gpio.h>
+#include <mach-se/mach/se.h>
+
+#define BCR2            (0xFFFFFF62)
+#define WCR2            (0xFFFFFF66)
+#define AREA5_WAIT_CTRL (0x1C00)
+#define WAIT_STATES_10  (0x7)
+
+static struct resource smsc911x_resources[] = {
+        [0] = {
+                .name           = "smsc911x-memory",
+                .start          = PA_EXT5,
+                .end            = PA_EXT5 + 0x1fff,
+                .flags          = IORESOURCE_MEM,
+        },
+        [1] = {
+                .name           = "smsc911x-irq",
+                .start          = IRQ0_IRQ,
+                .end            = IRQ0_IRQ,
+                .flags          = IORESOURCE_IRQ,
+        },
+};
+
+static struct smsc911x_platform_config smsc911x_config = {
+        .irq_polarity   = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
+        .irq_type       = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
+        .flags          = SMSC911X_USE_32BIT,
+        .phy_interface  = PHY_INTERFACE_MODE_MII,
+};
+
+static struct platform_device smsc911x_device = {
+        .name           = "smsc911x",
+        .id             = 0,
+        .num_resources  = ARRAY_SIZE(smsc911x_resources),
+        .resource       = smsc911x_resources,
+        .dev = {
+                .platform_data = &smsc911x_config,
+        },
+};
+
+static unsigned char heartbeat_bit_pos[] = { 0, 1, 2, 3 };
+
+static struct heartbeat_data heartbeat_data = {
+        .bit_pos        = heartbeat_bit_pos,
+        .nr_bits        = ARRAY_SIZE(heartbeat_bit_pos),
+        .regsize        = 8,
+};
+
+static struct resource heartbeat_resources[] = {
+        [0] = {
+                .start  = PORT_PCDR,
+                .end    = PORT_PCDR,
+                .flags  = IORESOURCE_MEM,
+        },
+};
+
+static struct platform_device heartbeat_device = {
+        .name           = "heartbeat",
+        .id             = -1,
+        .dev    = {
+                .platform_data  = &heartbeat_data,
+        },
+        .num_resources  = ARRAY_SIZE(heartbeat_resources),
+        .resource       = heartbeat_resources,
+};
+
+static struct platform_device *polaris_devices[] __initdata = {
+        &smsc911x_device,
+        &heartbeat_device,
+};
+
+static int __init polaris_initialise(void)
+{
+        u16 wcr, bcr_mask;
+
+        printk(KERN_INFO "Configuring Polaris external bus\n");
+
+        /* Configure area 5 with 2 wait states */
+        wcr = ctrl_inw(WCR2);
+        wcr &= (~AREA5_WAIT_CTRL);
+        wcr |= (WAIT_STATES_10 << 10);
+        ctrl_outw(wcr, WCR2);
+
+        /* Configure area 5 for 32-bit access */
+        bcr_mask = ctrl_inw(BCR2);
+        bcr_mask |= 1 << 10;
+        ctrl_outw(bcr_mask, BCR2);
+
+        return platform_add_devices(polaris_devices,
+                                    ARRAY_SIZE(polaris_devices));
+}
+arch_initcall(polaris_initialise);
+
+static struct ipr_data ipr_irq_table[] = {
+        /* External IRQs */
+        { IRQ0_IRQ, 0,  0,  1, },       /* IRQ0 */
+        { IRQ1_IRQ, 0,  4,  1, },       /* IRQ1 */
+};
+
+static unsigned long ipr_offsets[] = {
+        INTC_IPRC
+};
+
+static struct ipr_desc ipr_irq_desc = {
+        .ipr_offsets    = ipr_offsets,
+        .nr_offsets     = ARRAY_SIZE(ipr_offsets),
+
+        .ipr_data       = ipr_irq_table,
+        .nr_irqs        = ARRAY_SIZE(ipr_irq_table),
+        .chip = {
+                .name   = "sh7709-ext",
+        },
+};
+
+static void __init init_polaris_irq(void)
+{
+        /* Disable all interrupts */
+        ctrl_outw(0, BCR_ILCRA);
+        ctrl_outw(0, BCR_ILCRB);
+        ctrl_outw(0, BCR_ILCRC);
+        ctrl_outw(0, BCR_ILCRD);
+        ctrl_outw(0, BCR_ILCRE);
+        ctrl_outw(0, BCR_ILCRF);
+        ctrl_outw(0, BCR_ILCRG);
+
+        register_ipr_controller(&ipr_irq_desc);
+}
+
+static struct sh_machine_vector mv_polaris __initmv = {
+        .mv_name                = "Polaris",
+        .mv_nr_irqs             = 61,
+        .mv_init_irq            = init_polaris_irq,
+};
diff --git a/arch/sh/boards/board-sh7785lcr.c b/arch/sh/boards/board-sh7785lcr.c
index 38a64968d7bf..94c0296bc35d 100644
--- a/arch/sh/boards/board-sh7785lcr.c
+++ b/arch/sh/boards/board-sh7785lcr.c
@@ -275,7 +275,18 @@ void __init init_sh7785lcr_IRQ(void)
 
 static void sh7785lcr_power_off(void)
 {
-        ctrl_outb(0x01, P2SEGADDR(PLD_POFCR));
+        unsigned char *p;
+
+        p = ioremap(PLD_POFCR, PLD_POFCR + 1);
+        if (!p) {
+                printk(KERN_ERR "%s: ioremap error.\n", __func__);
+                return;
+        }
+        *p = 0x01;
+        iounmap(p);
+        set_bl_bit();
+        while (1)
+                cpu_relax();
 }
 
 /* Initialize the board */
diff --git a/arch/sh/boards/board-urquell.c b/arch/sh/boards/board-urquell.c
new file mode 100644
index 000000000000..17036ce20086
--- /dev/null
+++ b/arch/sh/boards/board-urquell.c
@@ -0,0 +1,162 @@
+/*
+ * Renesas Technology Corp. SH7786 Urquell Support.
+ *
+ * Copyright (C) 2008  Kuninori Morimoto <morimoto.kuninori@renesas.com>
+ * Copyright (C) 2008  Yoshihiro Shimoda
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/fb.h>
+#include <linux/smc91x.h>
+#include <linux/mtd/physmap.h>
+#include <linux/delay.h>
+#include <linux/gpio.h>
+#include <linux/irq.h>
+#include <mach/urquell.h>
+#include <cpu/sh7786.h>
+#include <asm/heartbeat.h>
+#include <asm/sizes.h>
+
+static struct resource heartbeat_resources[] = {
+        [0] = {
+                .start  = BOARDREG(SLEDR),
+                .end    = BOARDREG(SLEDR),
+                .flags  = IORESOURCE_MEM,
+        },
+};
+
+static struct heartbeat_data heartbeat_data = {
+        .regsize = 16,
+};
+
+static struct platform_device heartbeat_device = {
+        .name           = "heartbeat",
+        .id             = -1,
+        .dev    = {
+                .platform_data  = &heartbeat_data,
+        },
+        .num_resources  = ARRAY_SIZE(heartbeat_resources),
+        .resource       = heartbeat_resources,
+};
+
+static struct smc91x_platdata smc91x_info = {
+        .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
+};
+
+static struct resource smc91x_eth_resources[] = {
+        [0] = {
+                .name   = "SMC91C111" ,
+                .start  = 0x05800300,
+                .end    = 0x0580030f,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 11,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device smc91x_eth_device = {
+        .name           = "smc91x",
+        .num_resources  = ARRAY_SIZE(smc91x_eth_resources),
+        .resource       = smc91x_eth_resources,
+        .dev    = {
+                .platform_data  = &smc91x_info,
+        },
+};
+
+static struct mtd_partition nor_flash_partitions[] = {
+        {
+                .name           = "loader",
+                .offset         = 0x00000000,
+                .size           = SZ_512K,
+                .mask_flags     = MTD_WRITEABLE,        /* Read-only */
+        },
+        {
+                .name           = "bootenv",
+                .offset         = MTDPART_OFS_APPEND,
+                .size           = SZ_512K,
+                .mask_flags     = MTD_WRITEABLE,        /* Read-only */
+        },
+        {
+                .name           = "kernel",
+                .offset         = MTDPART_OFS_APPEND,
+                .size           = SZ_4M,
+        },
+        {
+                .name           = "data",
+                .offset         = MTDPART_OFS_APPEND,
+                .size           = MTDPART_SIZ_FULL,
+        },
+};
+
+static struct physmap_flash_data nor_flash_data = {
+        .width          = 2,
+        .parts          = nor_flash_partitions,
+        .nr_parts       = ARRAY_SIZE(nor_flash_partitions),
+};
+
+static struct resource nor_flash_resources[] = {
+        [0] = {
+                .start  = NOR_FLASH_ADDR,
+                .end    = NOR_FLASH_ADDR + NOR_FLASH_SIZE - 1,
+                .flags  = IORESOURCE_MEM,
+        }
+};
+
+static struct platform_device nor_flash_device = {
+        .name           = "physmap-flash",
+        .dev            = {
+                .platform_data  = &nor_flash_data,
+        },
+        .num_resources  = ARRAY_SIZE(nor_flash_resources),
+        .resource       = nor_flash_resources,
+};
+
+static struct platform_device *urquell_devices[] __initdata = {
+        &heartbeat_device,
+        &smc91x_eth_device,
+        &nor_flash_device,
+};
+
+static int __init urquell_devices_setup(void)
+{
+        /* USB */
+        gpio_request(GPIO_FN_USB_OVC0,  NULL);
+        gpio_request(GPIO_FN_USB_PENC0, NULL);
+
+        return platform_add_devices(urquell_devices,
+                                    ARRAY_SIZE(urquell_devices));
+}
+device_initcall(urquell_devices_setup);
+
+static void urquell_power_off(void)
+{
+        __raw_writew(0xa5a5, UBOARDREG(SRSTR));
+}
+
+static void __init urquell_init_irq(void)
+{
+        plat_irq_setup_pins(IRQ_MODE_IRL3210_MASK);
+}
+
+/* Initialize the board */
+static void __init urquell_setup(char **cmdline_p)
+{
+        printk(KERN_INFO "Renesas Technology Corp. Urquell support.\n");
+
+        pm_power_off = urquell_power_off;
+}
+
+/*
+ * The Machine Vector
+ */
+static struct sh_machine_vector mv_urquell __initmv = {
+        .mv_name        = "Urquell",
+        .mv_setup       = urquell_setup,
+        .mv_init_irq    = urquell_init_irq,
+};
diff --git a/arch/sh/boards/mach-highlander/Kconfig b/arch/sh/boards/mach-highlander/Kconfig
index 08057f62687b..def49cc0a7b9 100644
--- a/arch/sh/boards/mach-highlander/Kconfig
+++ b/arch/sh/boards/mach-highlander/Kconfig
@@ -18,7 +18,7 @@ config SH_R7780MP
 config SH_R7785RP
         bool "R7785RP board support"
         depends on CPU_SUBTYPE_SH7785
-        select GENERIC_GPIO
+        select ARCH_REQUIRE_GPIOLIB
 
 endchoice
 
diff --git a/arch/sh/boards/mach-hp6xx/pm_wakeup.S b/arch/sh/boards/mach-hp6xx/pm_wakeup.S
index 44b648cf6f23..4f18d44e0541 100644
--- a/arch/sh/boards/mach-hp6xx/pm_wakeup.S
+++ b/arch/sh/boards/mach-hp6xx/pm_wakeup.S
@@ -10,47 +10,32 @@
 #include <linux/linkage.h>
 #include <cpu/mmu_context.h>
 
-#define k0      r0
-#define k1      r1
-#define k2      r2
-#define k3      r3
-#define k4      r4
-
 /*
  * Kernel mode register usage:
  *      k0      scratch
  *      k1      scratch
- *      k2      scratch (Exception code)
- *      k3      scratch (Return address)
- *      k4      scratch
- *      k5      reserved
- *      k6      Global Interrupt Mask (0--15 << 4)
- *      k7      CURRENT_THREAD_INFO (pointer to current thread info)
+ * For more details, please have a look at entry.S
  */
 
+#define k0      r0
+#define k1      r1
+
 ENTRY(wakeup_start)
 ! clear STBY bit
-        mov     #-126, k2
+        mov     #-126, k1
         and     #127, k0
-        mov.b   k0, @k2
+        mov.b   k0, @k1
 ! enable refresh
         mov.l   5f, k1
         mov.w   6f, k0
         mov.w   k0, @k1
 ! jump to handler
-        mov.l   2f, k2
-        mov.l   3f, k3
-        mov.l   @k2, k2
-
         mov.l   4f, k1
         jmp     @k1
-        nop
+         nop
 
         .align  2
-1:      .long   EXPEVT
-2:      .long   INTEVT
-3:      .long   ret_from_irq
-4:      .long   handle_exception
+4:      .long   handle_interrupt
 5:      .long   0xffffff68
 6:      .word   0x0524
 
diff --git a/arch/sh/boards/mach-hp6xx/setup.c b/arch/sh/boards/mach-hp6xx/setup.c
index 746742bdc014..8f305b36358b 100644
--- a/arch/sh/boards/mach-hp6xx/setup.c
+++ b/arch/sh/boards/mach-hp6xx/setup.c
@@ -115,7 +115,6 @@ static struct sh_machine_vector mv_hp6xx __initmv = {
         .mv_setup = hp6xx_setup,
         /* IRQ's : CPU(64) + CCHIP(16) + FREE_TO_USE(6) */
         .mv_nr_irqs = HD64461_IRQBASE + HD64461_IRQ_NUM + 6,
-        .mv_irq_demux = hd64461_irq_demux,
         /* Enable IRQ0 -> IRQ3 in IRQ_MODE */
         .mv_init_irq = hp6xx_init_irq,
 };
diff --git a/arch/sh/boards/mach-migor/setup.c b/arch/sh/boards/mach-migor/setup.c
index 28e56c5809a2..bc35b4cae6b3 100644
--- a/arch/sh/boards/mach-migor/setup.c
+++ b/arch/sh/boards/mach-migor/setup.c
@@ -450,6 +450,14 @@ static struct spi_board_info migor_spi_devices[] = {
 
 static int __init migor_devices_setup(void)
 {
+
+#ifdef CONFIG_PM
+        /* Let D11 LED show STATUS0 */
+        gpio_request(GPIO_FN_STATUS0, NULL);
+
+        /* Lit D12 LED show PDSTATUS */
+        gpio_request(GPIO_FN_PDSTATUS, NULL);
+#else
         /* Lit D11 LED */
         gpio_request(GPIO_PTJ7, NULL);
         gpio_direction_output(GPIO_PTJ7, 1);
@@ -459,6 +467,7 @@ static int __init migor_devices_setup(void)
         gpio_request(GPIO_PTJ5, NULL);
         gpio_direction_output(GPIO_PTJ5, 1);
         gpio_export(GPIO_PTJ5, 0);
+#endif
 
         /* SMC91C111 - Enable IRQ0, Setup CS4 for 16-bit fast access */
         gpio_request(GPIO_FN_IRQ0, NULL);
diff --git a/arch/sh/boards/mach-rsk/Kconfig b/arch/sh/boards/mach-rsk/Kconfig
index bff095dffc02..aeff3b042205 100644
--- a/arch/sh/boards/mach-rsk/Kconfig
+++ b/arch/sh/boards/mach-rsk/Kconfig
@@ -10,7 +10,7 @@ config SH_RSK7201
 
 config SH_RSK7203
         bool "RSK7203"
-        select GENERIC_GPIO
+        select ARCH_REQUIRE_GPIOLIB
         depends on CPU_SUBTYPE_SH7203
 
 endchoice
diff --git a/arch/sh/boards/mach-sh7763rdp/setup.c b/arch/sh/boards/mach-sh7763rdp/setup.c
index 6f926fd2162b..390534a0b35c 100644
--- a/arch/sh/boards/mach-sh7763rdp/setup.c
+++ b/arch/sh/boards/mach-sh7763rdp/setup.c
@@ -63,15 +63,19 @@ static struct platform_device sh7763rdp_nor_flash_device = {
         },
 };
 
-/* SH-Ether */
+/*
+ * SH-Ether
+ *
+ * SH Ether of SH7763 has multi IRQ handling.
+ * (57,58,59 -> 57)
+ */
 static struct resource sh_eth_resources[] = {
         {
                 .start  = 0xFEE00800,   /* use eth1 */
                 .end    = 0xFEE00F7C - 1,
                 .flags  = IORESOURCE_MEM,
         }, {
-                .start  = 58,   /* irq number */
-                .end    = 58,
+                .start  = 57,   /* irq number */
                 .flags  = IORESOURCE_IRQ,
         },
 };
diff --git a/arch/sh/boot/Makefile b/arch/sh/boot/Makefile
index c16ccd4bfa16..95483d161258 100644
--- a/arch/sh/boot/Makefile
+++ b/arch/sh/boot/Makefile
@@ -33,20 +33,24 @@ $(obj)/zImage: $(obj)/compressed/vmlinux FORCE
 $(obj)/compressed/vmlinux: FORCE
         $(Q)$(MAKE) $(build)=$(obj)/compressed $@
 
-ifeq ($(CONFIG_32BIT),y)
-KERNEL_LOAD     := $(shell /bin/bash -c 'printf "0x%08x" \
-                     $$[$(CONFIG_PAGE_OFFSET)  + \
-                        $(CONFIG_ZERO_PAGE_OFFSET)]')
-else
+KERNEL_MEMORY := 0x00000000
+ifeq ($(CONFIG_PMB_FIXED),y)
+KERNEL_MEMORY := $(shell /bin/bash -c 'printf "0x%08x" \
+                     $$[$(CONFIG_MEMORY_START) & 0x1fffffff]')
+endif
+ifeq ($(CONFIG_29BIT),y)
+KERNEL_MEMORY := $(shell /bin/bash -c 'printf "0x%08x" \
+                     $$[$(CONFIG_MEMORY_START)]')
+endif
+
 KERNEL_LOAD     := $(shell /bin/bash -c 'printf "0x%08x" \
                      $$[$(CONFIG_PAGE_OFFSET)  + \
-                        $(CONFIG_MEMORY_START) + \
+                        $(KERNEL_MEMORY) + \
                         $(CONFIG_ZERO_PAGE_OFFSET)]')
-endif
 
 KERNEL_ENTRY    := $(shell /bin/bash -c 'printf "0x%08x" \
                      $$[$(CONFIG_PAGE_OFFSET)  + \
-                        $(CONFIG_MEMORY_START) + \
+                        $(KERNEL_MEMORY) + \
                         $(CONFIG_ZERO_PAGE_OFFSET) + $(CONFIG_ENTRY_OFFSET)]')
 
 quiet_cmd_uimage = UIMAGE  $@
diff --git a/arch/sh/cchips/hd6446x/hd64461.c b/arch/sh/cchips/hd6446x/hd64461.c
index 27ceeb948bb1..25ef91061521 100644
--- a/arch/sh/cchips/hd6446x/hd64461.c
+++ b/arch/sh/cchips/hd6446x/hd64461.c
@@ -53,21 +53,22 @@ static struct irq_chip hd64461_irq_chip = {
         .unmask         = hd64461_unmask_irq,
 };
 
-int hd64461_irq_demux(int irq)
+static void hd64461_irq_demux(unsigned int irq, struct irq_desc *desc)
 {
-        if (irq == CONFIG_HD64461_IRQ) {
-                unsigned short bit;
-                unsigned short nirr = inw(HD64461_NIRR);
-                unsigned short nimr = inw(HD64461_NIMR);
-                int i;
-
-                nirr &= ~nimr;
-                for (bit = 1, i = 0; i < 16; bit <<= 1, i++)
-                        if (nirr & bit)
-                                break;
-                irq = HD64461_IRQBASE + i;
+        unsigned short intv = ctrl_inw(HD64461_NIRR);
+        struct irq_desc *ext_desc;
+        unsigned int ext_irq = HD64461_IRQBASE;
+
+        intv &= (1 << HD64461_IRQ_NUM) - 1;
+
+        while (intv) {
+                if (intv & 1) {
+                        ext_desc = irq_desc + ext_irq;
+                        handle_level_irq(ext_irq, ext_desc);
+                }
+                intv >>= 1;
+                ext_irq++;
         }
-        return irq;
 }
 
 int __init setup_hd64461(void)
@@ -93,6 +94,9 @@ int __init setup_hd64461(void)
                 set_irq_chip_and_handler(i, &hd64461_irq_chip,
                                          handle_level_irq);
 
+        set_irq_chained_handler(CONFIG_HD64461_IRQ, hd64461_irq_demux);
+        set_irq_type(CONFIG_HD64461_IRQ, IRQ_TYPE_LEVEL_LOW);
+
 #ifdef CONFIG_HD64461_ENABLER
         printk(KERN_INFO "HD64461: enabling PCMCIA devices\n");
         __raw_writeb(0x4c, HD64461_PCC1CSCIER);
diff --git a/arch/sh/configs/espt_defconfig b/arch/sh/configs/espt_defconfig
new file mode 100644
index 000000000000..873ec42c6e69
--- /dev/null
+++ b/arch/sh/configs/espt_defconfig
@@ -0,0 +1,1190 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.29-rc7
+# Tue Mar 17 13:25:58 2009
+#
+CONFIG_SUPERH=y
+CONFIG_SUPERH32=y
+CONFIG_ARCH_DEFCONFIG="arch/sh/configs/shx3_defconfig"
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_GENERIC_BUG=y
+CONFIG_GENERIC_FIND_NEXT_BIT=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
+CONFIG_GENERIC_IRQ_PROBE=y
+# CONFIG_GENERIC_GPIO is not set
+CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+# CONFIG_ARCH_SUSPEND_POSSIBLE is not set
+# CONFIG_ARCH_HIBERNATION_POSSIBLE is not set
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_HAVE_LATENCYTOP_SUPPORT=y
+# CONFIG_ARCH_HAS_ILOG2_U32 is not set
+# CONFIG_ARCH_HAS_ILOG2_U64 is not set
+CONFIG_ARCH_NO_VIRT_TO_BUS=y
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+# CONFIG_POSIX_MQUEUE is not set
+# CONFIG_BSD_PROCESS_ACCT is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_AUDIT is not set
+
+#
+# RCU Subsystem
+#
+CONFIG_CLASSIC_RCU=y
+# CONFIG_TREE_RCU is not set
+# CONFIG_PREEMPT_RCU is not set
+# CONFIG_TREE_RCU_TRACE is not set
+# CONFIG_PREEMPT_RCU_TRACE is not set
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_LOG_BUF_SHIFT=14
+CONFIG_GROUP_SCHED=y
+CONFIG_FAIR_GROUP_SCHED=y
+# CONFIG_RT_GROUP_SCHED is not set
+CONFIG_USER_SCHED=y
+# CONFIG_CGROUP_SCHED is not set
+# CONFIG_CGROUPS is not set
+CONFIG_SYSFS_DEPRECATED=y
+CONFIG_SYSFS_DEPRECATED_V2=y
+# CONFIG_RELAY is not set
+CONFIG_NAMESPACES=y
+CONFIG_UTS_NS=y
+CONFIG_IPC_NS=y
+# CONFIG_USER_NS is not set
+# CONFIG_PID_NS is not set
+# CONFIG_NET_NS is not set
+# CONFIG_BLK_DEV_INITRD is not set
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL=y
+CONFIG_EMBEDDED=y
+CONFIG_UID16=y
+# CONFIG_SYSCTL_SYSCALL is not set
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_COMPAT_BRK=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_ANON_INODES=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_AIO=y
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_SLAB=y
+# CONFIG_SLUB is not set
+# CONFIG_SLOB is not set
+CONFIG_PROFILING=y
+CONFIG_TRACEPOINTS=y
+# CONFIG_MARKERS is not set
+CONFIG_OPROFILE=y
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_KPROBES is not set
+CONFIG_HAVE_IOREMAP_PROT=y
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+CONFIG_HAVE_ARCH_TRACEHOOK=y
+CONFIG_HAVE_CLK=y
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
+# CONFIG_MODULE_UNLOAD is not set
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_BLOCK=y
+# CONFIG_LBD is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+CONFIG_DEFAULT_AS=y
+# CONFIG_DEFAULT_DEADLINE is not set
+# CONFIG_DEFAULT_CFQ is not set
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="anticipatory"
+# CONFIG_FREEZER is not set
+
+#
+# System type
+#
+CONFIG_CPU_SH4=y
+CONFIG_CPU_SH4A=y
+# CONFIG_CPU_SUBTYPE_SH7619 is not set
+# CONFIG_CPU_SUBTYPE_SH7201 is not set
+# CONFIG_CPU_SUBTYPE_SH7203 is not set
+# CONFIG_CPU_SUBTYPE_SH7206 is not set
+# CONFIG_CPU_SUBTYPE_SH7263 is not set
+# CONFIG_CPU_SUBTYPE_MXG is not set
+# CONFIG_CPU_SUBTYPE_SH7705 is not set
+# CONFIG_CPU_SUBTYPE_SH7706 is not set
+# CONFIG_CPU_SUBTYPE_SH7707 is not set
+# CONFIG_CPU_SUBTYPE_SH7708 is not set
+# CONFIG_CPU_SUBTYPE_SH7709 is not set
+# CONFIG_CPU_SUBTYPE_SH7710 is not set
+# CONFIG_CPU_SUBTYPE_SH7712 is not set
+# CONFIG_CPU_SUBTYPE_SH7720 is not set
+# CONFIG_CPU_SUBTYPE_SH7721 is not set
+# CONFIG_CPU_SUBTYPE_SH7750 is not set
+# CONFIG_CPU_SUBTYPE_SH7091 is not set
+# CONFIG_CPU_SUBTYPE_SH7750R is not set
+# CONFIG_CPU_SUBTYPE_SH7750S is not set
+# CONFIG_CPU_SUBTYPE_SH7751 is not set
+# CONFIG_CPU_SUBTYPE_SH7751R is not set
+# CONFIG_CPU_SUBTYPE_SH7760 is not set
+# CONFIG_CPU_SUBTYPE_SH4_202 is not set
+# CONFIG_CPU_SUBTYPE_SH7723 is not set
+CONFIG_CPU_SUBTYPE_SH7763=y
+# CONFIG_CPU_SUBTYPE_SH7770 is not set
+# CONFIG_CPU_SUBTYPE_SH7780 is not set
+# CONFIG_CPU_SUBTYPE_SH7785 is not set
+# CONFIG_CPU_SUBTYPE_SH7786 is not set
+# CONFIG_CPU_SUBTYPE_SHX3 is not set
+# CONFIG_CPU_SUBTYPE_SH7343 is not set
+# CONFIG_CPU_SUBTYPE_SH7722 is not set
+# CONFIG_CPU_SUBTYPE_SH7366 is not set
+# CONFIG_CPU_SUBTYPE_SH5_101 is not set
+# CONFIG_CPU_SUBTYPE_SH5_103 is not set
+
+#
+# Memory management options
+#
+CONFIG_QUICKLIST=y
+CONFIG_MMU=y
+CONFIG_PAGE_OFFSET=0x80000000
+CONFIG_MEMORY_START=0x0c000000
+CONFIG_MEMORY_SIZE=0x04000000
+CONFIG_29BIT=y
+CONFIG_VSYSCALL=y
+CONFIG_ARCH_FLATMEM_ENABLE=y
+CONFIG_ARCH_SPARSEMEM_ENABLE=y
+CONFIG_ARCH_SPARSEMEM_DEFAULT=y
+CONFIG_MAX_ACTIVE_REGIONS=1
+CONFIG_ARCH_POPULATES_NODE_MAP=y
+CONFIG_ARCH_SELECT_MEMORY_MODEL=y
+CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
+CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y
+CONFIG_PAGE_SIZE_4KB=y
+# CONFIG_PAGE_SIZE_8KB is not set
+# CONFIG_PAGE_SIZE_16KB is not set
+# CONFIG_PAGE_SIZE_64KB is not set
+CONFIG_ENTRY_OFFSET=0x00001000
+CONFIG_SELECT_MEMORY_MODEL=y
+# CONFIG_FLATMEM_MANUAL is not set
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+CONFIG_SPARSEMEM_MANUAL=y
+CONFIG_SPARSEMEM=y
+CONFIG_HAVE_MEMORY_PRESENT=y
+CONFIG_SPARSEMEM_STATIC=y
+# CONFIG_MEMORY_HOTPLUG is not set
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4
+CONFIG_MIGRATION=y
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=0
+CONFIG_NR_QUICK=2
+CONFIG_UNEVICTABLE_LRU=y
+
+#
+# Cache configuration
+#
+# CONFIG_SH_DIRECT_MAPPED is not set
+CONFIG_CACHE_WRITEBACK=y
+# CONFIG_CACHE_WRITETHROUGH is not set
+# CONFIG_CACHE_OFF is not set
+
+#
+# Processor features
+#
+CONFIG_CPU_LITTLE_ENDIAN=y
+# CONFIG_CPU_BIG_ENDIAN is not set
+CONFIG_SH_FPU=y
+# CONFIG_SH_STORE_QUEUES is not set
+CONFIG_CPU_HAS_INTEVT=y
+CONFIG_CPU_HAS_SR_RB=y
+CONFIG_CPU_HAS_FPU=y
+
+#
+# Board support
+#
+# CONFIG_SH_SH7763RDP is not set
+CONFIG_SH_ESPT=y
+
+#
+# Timer and clock configuration
+#
+CONFIG_SH_TMU=y
+CONFIG_SH_TIMER_IRQ=28
+CONFIG_SH_PCLK_FREQ=66666666
+# CONFIG_NO_HZ is not set
+# CONFIG_HIGH_RES_TIMERS is not set
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+
+#
+# CPU Frequency scaling
+#
+# CONFIG_CPU_FREQ is not set
+
+#
+# DMA support
+#
+# CONFIG_SH_DMA is not set
+
+#
+# Companion Chips
+#
+
+#
+# Additional SuperH Device Drivers
+#
+# CONFIG_HEARTBEAT is not set
+# CONFIG_PUSH_SWITCH is not set
+
+#
+# Kernel features
+#
+# CONFIG_HZ_100 is not set
+CONFIG_HZ_250=y
+# CONFIG_HZ_300 is not set
+# CONFIG_HZ_1000 is not set
+CONFIG_HZ=250
+# CONFIG_SCHED_HRTICK is not set
+# CONFIG_KEXEC is not set
+# CONFIG_CRASH_DUMP is not set
+CONFIG_SECCOMP=y
+CONFIG_PREEMPT_NONE=y
+# CONFIG_PREEMPT_VOLUNTARY is not set
+# CONFIG_PREEMPT is not set
+CONFIG_GUSA=y
+
+#
+# Boot options
+#
+CONFIG_ZERO_PAGE_OFFSET=0x00001000
+CONFIG_BOOT_LINK_OFFSET=0x00800000
+CONFIG_CMDLINE_BOOL=y
+CONFIG_CMDLINE="console=ttySC0,115200 root=/dev/nfs ip=bootp"
+
+#
+# Bus options
+#
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+# CONFIG_PCCARD is not set
+
+#
+# Executable file formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+# CONFIG_HAVE_AOUT is not set
+# CONFIG_BINFMT_MISC is not set
+
+#
+# Power management options (EXPERIMENTAL)
+#
+# CONFIG_PM is not set
+# CONFIG_CPU_IDLE is not set
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_COMPAT_NET_DEV_OPS=y
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+CONFIG_UNIX=y
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+# CONFIG_XFRM_SUB_POLICY is not set
+# CONFIG_XFRM_MIGRATE is not set
+# CONFIG_XFRM_STATISTICS is not set
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_ARPD is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+# CONFIG_INET_TUNNEL is not set
+CONFIG_INET_XFRM_MODE_TRANSPORT=y
+CONFIG_INET_XFRM_MODE_TUNNEL=y
+CONFIG_INET_XFRM_MODE_BEET=y
+# CONFIG_INET_LRO is not set
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+# CONFIG_IPV6 is not set
+# CONFIG_NETWORK_SECMARK is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_NET_DSA is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_SCHED is not set
+# CONFIG_DCB is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_AF_RXRPC is not set
+# CONFIG_PHONET is not set
+# CONFIG_WIRELESS is not set
+# CONFIG_WIMAX is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+CONFIG_FW_LOADER=y
+CONFIG_FIRMWARE_IN_KERNEL=y
+CONFIG_EXTRA_FIRMWARE=""
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_CONNECTOR is not set
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_CONCAT is not set
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_TESTS is not set
+# CONFIG_MTD_REDBOOT_PARTS is not set
+CONFIG_MTD_CMDLINE_PARTS=y
+# CONFIG_MTD_AR7_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_MTD_OOPS is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=y
+CONFIG_MTD_JEDECPROBE=y
+CONFIG_MTD_GEN_PROBE=y
+CONFIG_MTD_CFI_ADV_OPTIONS=y
+CONFIG_MTD_CFI_NOSWAP=y
+# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set
+# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set
+CONFIG_MTD_CFI_GEOMETRY=y
+# CONFIG_MTD_MAP_BANK_WIDTH_1 is not set
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+# CONFIG_MTD_MAP_BANK_WIDTH_4 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+# CONFIG_MTD_OTP is not set
+# CONFIG_MTD_CFI_INTELEXT is not set
+CONFIG_MTD_CFI_AMDSTD=y
+# CONFIG_MTD_CFI_STAA is not set
+CONFIG_MTD_CFI_UTIL=y
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+
+#
+# Mapping drivers for chip access
+#
+CONFIG_MTD_COMPLEX_MAPPINGS=y
+CONFIG_MTD_PHYSMAP=y
+# CONFIG_MTD_PHYSMAP_COMPAT is not set
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+# CONFIG_MTD_NAND is not set
+# CONFIG_MTD_ONENAND is not set
+
+#
+# LPDDR flash memory drivers
+#
+# CONFIG_MTD_LPDDR is not set
+
+#
+# UBI - Unsorted block images
+#
+# CONFIG_MTD_UBI is not set
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_COW_COMMON is not set
+# CONFIG_BLK_DEV_LOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_UB is not set
+# CONFIG_BLK_DEV_RAM is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+# CONFIG_BLK_DEV_HD is not set
+# CONFIG_MISC_DEVICES is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+CONFIG_SCSI=y
+CONFIG_SCSI_DMA=y
+# CONFIG_SCSI_TGT is not set
+# CONFIG_SCSI_NETLINK is not set
+CONFIG_SCSI_PROC_FS=y
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+# CONFIG_CHR_DEV_ST is not set
+# CONFIG_CHR_DEV_OSST is not set
+# CONFIG_BLK_DEV_SR is not set
+# CONFIG_CHR_DEV_SG is not set
+# CONFIG_CHR_DEV_SCH is not set
+
+#
+# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
+#
+# CONFIG_SCSI_MULTI_LUN is not set
+# CONFIG_SCSI_CONSTANTS is not set
+# CONFIG_SCSI_LOGGING is not set
+# CONFIG_SCSI_SCAN_ASYNC is not set
+CONFIG_SCSI_WAIT_SCAN=m
+
+#
+# SCSI Transports
+#
+# CONFIG_SCSI_SPI_ATTRS is not set
+# CONFIG_SCSI_FC_ATTRS is not set
+# CONFIG_SCSI_ISCSI_ATTRS is not set
+# CONFIG_SCSI_SAS_LIBSAS is not set
+# CONFIG_SCSI_SRP_ATTRS is not set
+CONFIG_SCSI_LOWLEVEL=y
+# CONFIG_ISCSI_TCP is not set
+# CONFIG_LIBFC is not set
+# CONFIG_SCSI_DEBUG is not set
+# CONFIG_SCSI_DH is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+CONFIG_NETDEVICES=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_VETH is not set
+CONFIG_PHYLIB=y
+
+#
+# MII PHY device drivers
+#
+# CONFIG_MARVELL_PHY is not set
+# CONFIG_DAVICOM_PHY is not set
+# CONFIG_QSEMI_PHY is not set
+# CONFIG_LXT_PHY is not set
+# CONFIG_CICADA_PHY is not set
+# CONFIG_VITESSE_PHY is not set
+# CONFIG_SMSC_PHY is not set
+# CONFIG_BROADCOM_PHY is not set
+# CONFIG_ICPLUS_PHY is not set
+# CONFIG_REALTEK_PHY is not set
+# CONFIG_NATIONAL_PHY is not set
+# CONFIG_STE10XP is not set
+# CONFIG_LSI_ET1011C_PHY is not set
+# CONFIG_FIXED_PHY is not set
+CONFIG_MDIO_BITBANG=y
+CONFIG_NET_ETHERNET=y
+CONFIG_MII=y
+# CONFIG_AX88796 is not set
+# CONFIG_STNIC is not set
+CONFIG_SH_ETH=y
+# CONFIG_SMC91X is not set
+# CONFIG_SMC911X is not set
+# CONFIG_SMSC911X is not set
+# CONFIG_IBM_NEW_EMAC_ZMII is not set
+# CONFIG_IBM_NEW_EMAC_RGMII is not set
+# CONFIG_IBM_NEW_EMAC_TAH is not set
+# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
+# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
+# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
+# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
+# CONFIG_B44 is not set
+# CONFIG_NETDEV_1000 is not set
+# CONFIG_NETDEV_10000 is not set
+
+#
+# Wireless LAN
+#
+# CONFIG_WLAN_PRE80211 is not set
+# CONFIG_WLAN_80211 is not set
+# CONFIG_IWLWIFI_LEDS is not set
+
+#
+# Enable WiMAX (Networking options) to see the WiMAX drivers
+#
+
+#
+# USB Network Adapters
+#
+# CONFIG_USB_CATC is not set
+# CONFIG_USB_KAWETH is not set
+# CONFIG_USB_PEGASUS is not set
+# CONFIG_USB_RTL8150 is not set
+# CONFIG_USB_USBNET is not set
+# CONFIG_WAN is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_ISDN is not set
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+# CONFIG_INPUT_POLLDEV is not set
+
+#
+# Userland interfaces
+#
+# CONFIG_INPUT_MOUSEDEV is not set
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_CONSOLE_TRANSLATIONS=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_VT_HW_CONSOLE_BINDING is not set
+CONFIG_DEVKMEM=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_SH_SCI=y
+CONFIG_SERIAL_SH_SCI_NR_UARTS=3
+CONFIG_SERIAL_SH_SCI_CONSOLE=y
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=256
+# CONFIG_IPMI_HANDLER is not set
+CONFIG_HW_RANDOM=y
+# CONFIG_R3964 is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+# CONFIG_I2C is not set
+# CONFIG_SPI is not set
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+# CONFIG_THERMAL is not set
+# CONFIG_THERMAL_HWMON is not set
+# CONFIG_WATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
+
+#
+# Sonics Silicon Backplane
+#
+# CONFIG_SSB is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_CORE is not set
+# CONFIG_MFD_SM501 is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_REGULATOR is not set
+
+#
+# Multimedia devices
+#
+
+#
+# Multimedia core support
+#
+# CONFIG_VIDEO_DEV is not set
+# CONFIG_DVB_CORE is not set
+# CONFIG_VIDEO_MEDIA is not set
+
+#
+# Multimedia drivers
+#
+# CONFIG_DAB is not set
+
+#
+# Graphics support
+#
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+CONFIG_FB=y
+# CONFIG_FIRMWARE_EDID is not set
+# CONFIG_FB_DDC is not set
+# CONFIG_FB_BOOT_VESA_SUPPORT is not set
+CONFIG_FB_CFB_FILLRECT=y
+CONFIG_FB_CFB_COPYAREA=y
+CONFIG_FB_CFB_IMAGEBLIT=y
+# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
+# CONFIG_FB_SYS_FILLRECT is not set
+# CONFIG_FB_SYS_COPYAREA is not set
+# CONFIG_FB_SYS_IMAGEBLIT is not set
+CONFIG_FB_FOREIGN_ENDIAN=y
+CONFIG_FB_BOTH_ENDIAN=y
+# CONFIG_FB_BIG_ENDIAN is not set
+# CONFIG_FB_LITTLE_ENDIAN is not set
+# CONFIG_FB_SYS_FOPS is not set
+# CONFIG_FB_SVGALIB is not set
+# CONFIG_FB_MACMODES is not set
+# CONFIG_FB_BACKLIGHT is not set
+# CONFIG_FB_MODE_HELPERS is not set
+# CONFIG_FB_TILEBLITTING is not set
+
+#
+# Frame buffer hardware drivers
+#
+# CONFIG_FB_S1D13XXX is not set
+# CONFIG_FB_SH_MOBILE_LCDC is not set
+CONFIG_FB_SH7760=y
+# CONFIG_FB_VIRTUAL is not set
+# CONFIG_FB_METRONOME is not set
+# CONFIG_FB_MB862XX is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+
+#
+# Console display driver support
+#
+CONFIG_DUMMY_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE=y
+# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
+# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
+# CONFIG_FONTS is not set
+CONFIG_FONT_8x8=y
+CONFIG_FONT_8x16=y
+CONFIG_LOGO=y
+CONFIG_LOGO_LINUX_MONO=y
+CONFIG_LOGO_LINUX_VGA16=y
+CONFIG_LOGO_LINUX_CLUT224=y
+CONFIG_LOGO_SUPERH_MONO=y
+CONFIG_LOGO_SUPERH_VGA16=y
+CONFIG_LOGO_SUPERH_CLUT224=y
+# CONFIG_SOUND is not set
+# CONFIG_HID_SUPPORT is not set
+CONFIG_USB_SUPPORT=y
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
+# CONFIG_USB_ARCH_HAS_EHCI is not set
+CONFIG_USB=y
+# CONFIG_USB_DEBUG is not set
+# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
+
+#
+# Miscellaneous USB options
+#
+# CONFIG_USB_DEVICEFS is not set
+CONFIG_USB_DEVICE_CLASS=y
+# CONFIG_USB_DYNAMIC_MINORS is not set
+# CONFIG_USB_OTG is not set
+# CONFIG_USB_OTG_WHITELIST is not set
+# CONFIG_USB_OTG_BLACKLIST_HUB is not set
+CONFIG_USB_MON=y
+# CONFIG_USB_WUSB is not set
+# CONFIG_USB_WUSB_CBAF is not set
+
+#
+# USB Host Controller Drivers
+#
+# CONFIG_USB_C67X00_HCD is not set
+# CONFIG_USB_OXU210HP_HCD is not set
+# CONFIG_USB_ISP116X_HCD is not set
+CONFIG_USB_OHCI_HCD=y
+# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
+# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
+CONFIG_USB_OHCI_LITTLE_ENDIAN=y
+# CONFIG_USB_SL811_HCD is not set
+# CONFIG_USB_R8A66597_HCD is not set
+# CONFIG_USB_HWA_HCD is not set
+
+#
+# USB Device Class drivers
+#
+# CONFIG_USB_ACM is not set
+# CONFIG_USB_PRINTER is not set
+# CONFIG_USB_WDM is not set
+# CONFIG_USB_TMC is not set
+
+#
+# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed;
+#
+
+#
+# see USB_STORAGE Help for more information
+#
+CONFIG_USB_STORAGE=y
+# CONFIG_USB_STORAGE_DEBUG is not set
+# CONFIG_USB_STORAGE_DATAFAB is not set
+# CONFIG_USB_STORAGE_FREECOM is not set
+# CONFIG_USB_STORAGE_ISD200 is not set
+# CONFIG_USB_STORAGE_USBAT is not set
+# CONFIG_USB_STORAGE_SDDR09 is not set
+# CONFIG_USB_STORAGE_SDDR55 is not set
+# CONFIG_USB_STORAGE_JUMPSHOT is not set
+# CONFIG_USB_STORAGE_ALAUDA is not set
+# CONFIG_USB_STORAGE_ONETOUCH is not set
+# CONFIG_USB_STORAGE_KARMA is not set
+# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
+# CONFIG_USB_LIBUSUAL is not set
+
+#
+# USB Imaging devices
+#
+# CONFIG_USB_MDC800 is not set
+# CONFIG_USB_MICROTEK is not set
+
+#
+# USB port drivers
+#
+# CONFIG_USB_SERIAL is not set
+
+#
+# USB Miscellaneous drivers
+#
+# CONFIG_USB_EMI62 is not set
+# CONFIG_USB_EMI26 is not set
+# CONFIG_USB_ADUTUX is not set
+# CONFIG_USB_SEVSEG is not set
+# CONFIG_USB_RIO500 is not set
+# CONFIG_USB_LEGOTOWER is not set
+# CONFIG_USB_LCD is not set
+# CONFIG_USB_BERRY_CHARGE is not set
+# CONFIG_USB_LED is not set
+# CONFIG_USB_CYPRESS_CY7C63 is not set
+# CONFIG_USB_CYTHERM is not set
+# CONFIG_USB_PHIDGET is not set
+# CONFIG_USB_IDMOUSE is not set
+# CONFIG_USB_FTDI_ELAN is not set
+# CONFIG_USB_APPLEDISPLAY is not set
+# CONFIG_USB_LD is not set
+# CONFIG_USB_TRANCEVIBRATOR is not set
+# CONFIG_USB_IOWARRIOR is not set
+# CONFIG_USB_ISIGHTFW is not set
+# CONFIG_USB_VST is not set
+# CONFIG_USB_GADGET is not set
+
+#
+# OTG and related infrastructure
+#
+# CONFIG_MMC is not set
+# CONFIG_MEMSTICK is not set
+# CONFIG_NEW_LEDS is not set
+# CONFIG_ACCESSIBILITY is not set
+# CONFIG_RTC_CLASS is not set
+# CONFIG_DMADEVICES is not set
+# CONFIG_UIO is not set
+# CONFIG_STAGING is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT2_FS_XIP is not set
+CONFIG_EXT3_FS=y
+CONFIG_EXT3_FS_XATTR=y
+# CONFIG_EXT3_FS_POSIX_ACL is not set
+# CONFIG_EXT3_FS_SECURITY is not set
+# CONFIG_EXT4_FS is not set
+CONFIG_JBD=y
+# CONFIG_JBD_DEBUG is not set
+CONFIG_FS_MBCACHE=y
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+CONFIG_FS_POSIX_ACL=y
+CONFIG_FILE_LOCKING=y
+# CONFIG_XFS_FS is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_BTRFS_FS is not set
+CONFIG_DNOTIFY=y
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_QUOTA is not set
+CONFIG_AUTOFS_FS=y
+CONFIG_AUTOFS4_FS=y
+# CONFIG_FUSE_FS is not set
+CONFIG_GENERIC_ACL=y
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_MSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+CONFIG_TMPFS_POSIX_ACL=y
+# CONFIG_HUGETLBFS is not set
+# CONFIG_HUGETLB_PAGE is not set
+# CONFIG_CONFIGFS_FS is not set
+CONFIG_MISC_FILESYSTEMS=y
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+# CONFIG_JFFS2_FS is not set
+CONFIG_CRAMFS=y
+# CONFIG_SQUASHFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_OMFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+CONFIG_ROMFS_FS=y
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+CONFIG_NETWORK_FILESYSTEMS=y
+CONFIG_NFS_FS=y
+# CONFIG_NFS_V3 is not set
+# CONFIG_NFS_V4 is not set
+CONFIG_ROOT_NFS=y
+# CONFIG_NFSD is not set
+CONFIG_LOCKD=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+# CONFIG_SUNRPC_REGISTER_V4 is not set
+# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="iso8859-1"
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_CODEPAGE_737=y
+CONFIG_NLS_CODEPAGE_775=y
+CONFIG_NLS_CODEPAGE_850=y
+CONFIG_NLS_CODEPAGE_852=y
+CONFIG_NLS_CODEPAGE_855=y
+CONFIG_NLS_CODEPAGE_857=y
+CONFIG_NLS_CODEPAGE_860=y
+CONFIG_NLS_CODEPAGE_861=y
+CONFIG_NLS_CODEPAGE_862=y
+CONFIG_NLS_CODEPAGE_863=y
+CONFIG_NLS_CODEPAGE_864=y
+CONFIG_NLS_CODEPAGE_865=y
+CONFIG_NLS_CODEPAGE_866=y
+CONFIG_NLS_CODEPAGE_869=y
+CONFIG_NLS_CODEPAGE_936=y
+CONFIG_NLS_CODEPAGE_950=y
+CONFIG_NLS_CODEPAGE_932=y
+CONFIG_NLS_CODEPAGE_949=y
+CONFIG_NLS_CODEPAGE_874=y
+CONFIG_NLS_ISO8859_8=y
+CONFIG_NLS_CODEPAGE_1250=y
+CONFIG_NLS_CODEPAGE_1251=y
+CONFIG_NLS_ASCII=y
+CONFIG_NLS_ISO8859_1=y
+CONFIG_NLS_ISO8859_2=y
+CONFIG_NLS_ISO8859_3=y
+CONFIG_NLS_ISO8859_4=y
+CONFIG_NLS_ISO8859_5=y
+CONFIG_NLS_ISO8859_6=y
+CONFIG_NLS_ISO8859_7=y
+CONFIG_NLS_ISO8859_9=y
+CONFIG_NLS_ISO8859_13=y
+CONFIG_NLS_ISO8859_14=y
+CONFIG_NLS_ISO8859_15=y
+CONFIG_NLS_KOI8_R=y
+CONFIG_NLS_KOI8_U=y
+CONFIG_NLS_UTF8=y
+# CONFIG_DLM is not set
+
+#
+# Kernel hacking
+#
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+# CONFIG_PRINTK_TIME is not set
+# CONFIG_ENABLE_WARN_DEPRECATED is not set
+# CONFIG_ENABLE_MUST_CHECK is not set
+CONFIG_FRAME_WARN=1024
+# CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+CONFIG_DEBUG_FS=y
+# CONFIG_HEADERS_CHECK is not set
+# CONFIG_DEBUG_KERNEL is not set
+CONFIG_STACKTRACE=y
+# CONFIG_DEBUG_BUGVERBOSE is not set
+# CONFIG_DEBUG_MEMORY_INIT is not set
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
+# CONFIG_LATENCYTOP is not set
+CONFIG_NOP_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_DYNAMIC_FTRACE=y
+CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_RING_BUFFER=y
+CONFIG_TRACING=y
+
+#
+# Tracers
+#
+# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+# CONFIG_SH_STANDARD_BIOS is not set
+# CONFIG_EARLY_SCIF_CONSOLE is not set
+# CONFIG_MORE_COMPILE_OPTIONS is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITYFS is not set
+# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+CONFIG_CRYPTO=y
+
+#
+# Crypto core or helper
+#
+# CONFIG_CRYPTO_FIPS is not set
+# CONFIG_CRYPTO_MANAGER is not set
+# CONFIG_CRYPTO_MANAGER2 is not set
+# CONFIG_CRYPTO_GF128MUL is not set
+# CONFIG_CRYPTO_NULL is not set
+# CONFIG_CRYPTO_CRYPTD is not set
+# CONFIG_CRYPTO_AUTHENC is not set
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Authenticated Encryption with Associated Data
+#
+# CONFIG_CRYPTO_CCM is not set
+# CONFIG_CRYPTO_GCM is not set
+# CONFIG_CRYPTO_SEQIV is not set
+
+#
+# Block modes
+#
+# CONFIG_CRYPTO_CBC is not set
+# CONFIG_CRYPTO_CTR is not set
+# CONFIG_CRYPTO_CTS is not set
+# CONFIG_CRYPTO_ECB is not set
+# CONFIG_CRYPTO_LRW is not set
+# CONFIG_CRYPTO_PCBC is not set
+# CONFIG_CRYPTO_XTS is not set
+
+#
+# Hash modes
+#
+# CONFIG_CRYPTO_HMAC is not set
+# CONFIG_CRYPTO_XCBC is not set
+
+#
+# Digest
+#
+# CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_MD4 is not set
+# CONFIG_CRYPTO_MD5 is not set
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_RMD128 is not set
+# CONFIG_CRYPTO_RMD160 is not set
+# CONFIG_CRYPTO_RMD256 is not set
+# CONFIG_CRYPTO_RMD320 is not set
+# CONFIG_CRYPTO_SHA1 is not set
+# CONFIG_CRYPTO_SHA256 is not set
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_WP512 is not set
+
+#
+# Ciphers
+#
+# CONFIG_CRYPTO_AES is not set
+# CONFIG_CRYPTO_ANUBIS is not set
+# CONFIG_CRYPTO_ARC4 is not set
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_CAMELLIA is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+# CONFIG_CRYPTO_DES is not set
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_SALSA20 is not set
+# CONFIG_CRYPTO_SEED is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_TEA is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+
+#
+# Compression
+#
+# CONFIG_CRYPTO_DEFLATE is not set
+# CONFIG_CRYPTO_LZO is not set
+
+#
+# Random Number Generation
+#
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
+CONFIG_CRYPTO_HW=y
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+CONFIG_GENERIC_FIND_LAST_BIT=y
+# CONFIG_CRC_CCITT is not set
+# CONFIG_CRC16 is not set
+CONFIG_CRC_T10DIF=y
+# CONFIG_CRC_ITU_T is not set
+CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_PLIST=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
diff --git a/arch/sh/configs/polaris_defconfig b/arch/sh/configs/polaris_defconfig
new file mode 100644
index 000000000000..320def233b2f
--- /dev/null
+++ b/arch/sh/configs/polaris_defconfig
@@ -0,0 +1,969 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.29-rc4
+# Wed Feb 11 18:41:59 2009
+#
+CONFIG_SUPERH=y
+CONFIG_SUPERH32=y
+CONFIG_ARCH_DEFCONFIG="arch/sh/configs/shx3_defconfig"
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_GENERIC_BUG=y
+CONFIG_GENERIC_FIND_NEXT_BIT=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
+CONFIG_GENERIC_IRQ_PROBE=y
+# CONFIG_GENERIC_GPIO is not set
+CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+# CONFIG_ARCH_SUSPEND_POSSIBLE is not set
+# CONFIG_ARCH_HIBERNATION_POSSIBLE is not set
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_HAVE_LATENCYTOP_SUPPORT=y
+# CONFIG_ARCH_HAS_ILOG2_U32 is not set
+# CONFIG_ARCH_HAS_ILOG2_U64 is not set
+CONFIG_ARCH_NO_VIRT_TO_BUS=y
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_LOCK_KERNEL=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+# CONFIG_LOCALVERSION_AUTO is not set
+# CONFIG_SWAP is not set
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+CONFIG_POSIX_MQUEUE=y
+CONFIG_BSD_PROCESS_ACCT=y
+CONFIG_BSD_PROCESS_ACCT_V3=y
+# CONFIG_TASKSTATS is not set
+CONFIG_AUDIT=y
+# CONFIG_AUDITSYSCALL is not set
+
+#
+# RCU Subsystem
+#
+CONFIG_CLASSIC_RCU=y
+# CONFIG_TREE_RCU is not set
+# CONFIG_PREEMPT_RCU is not set
+# CONFIG_TREE_RCU_TRACE is not set
+# CONFIG_PREEMPT_RCU_TRACE is not set
+# CONFIG_IKCONFIG is not set
+CONFIG_LOG_BUF_SHIFT=14
+CONFIG_GROUP_SCHED=y
+CONFIG_FAIR_GROUP_SCHED=y
+# CONFIG_RT_GROUP_SCHED is not set
+CONFIG_USER_SCHED=y
+# CONFIG_CGROUP_SCHED is not set
+# CONFIG_CGROUPS is not set
+CONFIG_SYSFS_DEPRECATED=y
+CONFIG_SYSFS_DEPRECATED_V2=y
+# CONFIG_RELAY is not set
+# CONFIG_NAMESPACES is not set
+# CONFIG_BLK_DEV_INITRD is not set
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_SYSCTL=y
+CONFIG_EMBEDDED=y
+CONFIG_UID16=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_KALLSYMS=y
+CONFIG_KALLSYMS_ALL=y
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_COMPAT_BRK=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_ANON_INODES=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_AIO=y
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_SLAB=y
+# CONFIG_SLUB is not set
+# CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_KPROBES is not set
+CONFIG_HAVE_IOREMAP_PROT=y
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+CONFIG_HAVE_ARCH_TRACEHOOK=y
+CONFIG_HAVE_CLK=y
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+CONFIG_MODVERSIONS=y
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_BLOCK=y
+# CONFIG_LBD is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+# CONFIG_IOSCHED_AS is not set
+# CONFIG_IOSCHED_DEADLINE is not set
+CONFIG_IOSCHED_CFQ=y
+# CONFIG_DEFAULT_AS is not set
+# CONFIG_DEFAULT_DEADLINE is not set
+CONFIG_DEFAULT_CFQ=y
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="cfq"
+# CONFIG_FREEZER is not set
+
+#
+# System type
+#
+CONFIG_CPU_SH3=y
+# CONFIG_CPU_SUBTYPE_SH7619 is not set
+# CONFIG_CPU_SUBTYPE_SH7201 is not set
+# CONFIG_CPU_SUBTYPE_SH7203 is not set
+# CONFIG_CPU_SUBTYPE_SH7206 is not set
+# CONFIG_CPU_SUBTYPE_SH7263 is not set
+# CONFIG_CPU_SUBTYPE_MXG is not set
+# CONFIG_CPU_SUBTYPE_SH7705 is not set
+# CONFIG_CPU_SUBTYPE_SH7706 is not set
+# CONFIG_CPU_SUBTYPE_SH7707 is not set
+# CONFIG_CPU_SUBTYPE_SH7708 is not set
+CONFIG_CPU_SUBTYPE_SH7709=y
+# CONFIG_CPU_SUBTYPE_SH7710 is not set
+# CONFIG_CPU_SUBTYPE_SH7712 is not set
+# CONFIG_CPU_SUBTYPE_SH7720 is not set
+# CONFIG_CPU_SUBTYPE_SH7721 is not set
+# CONFIG_CPU_SUBTYPE_SH7750 is not set
+# CONFIG_CPU_SUBTYPE_SH7091 is not set
+# CONFIG_CPU_SUBTYPE_SH7750R is not set
+# CONFIG_CPU_SUBTYPE_SH7750S is not set
+# CONFIG_CPU_SUBTYPE_SH7751 is not set
+# CONFIG_CPU_SUBTYPE_SH7751R is not set
+# CONFIG_CPU_SUBTYPE_SH7760 is not set
+# CONFIG_CPU_SUBTYPE_SH4_202 is not set
+# CONFIG_CPU_SUBTYPE_SH7723 is not set
+# CONFIG_CPU_SUBTYPE_SH7763 is not set
+# CONFIG_CPU_SUBTYPE_SH7770 is not set
+# CONFIG_CPU_SUBTYPE_SH7780 is not set
+# CONFIG_CPU_SUBTYPE_SH7785 is not set
+# CONFIG_CPU_SUBTYPE_SHX3 is not set
+# CONFIG_CPU_SUBTYPE_SH7343 is not set
+# CONFIG_CPU_SUBTYPE_SH7722 is not set
+# CONFIG_CPU_SUBTYPE_SH7366 is not set
+# CONFIG_CPU_SUBTYPE_SH5_101 is not set
+# CONFIG_CPU_SUBTYPE_SH5_103 is not set
+
+#
+# Memory management options
+#
+CONFIG_QUICKLIST=y
+CONFIG_MMU=y
+CONFIG_PAGE_OFFSET=0x80000000
+CONFIG_MEMORY_START=0x0C000000
+CONFIG_MEMORY_SIZE=0x04000000
+CONFIG_29BIT=y
+CONFIG_VSYSCALL=y
+CONFIG_ARCH_FLATMEM_ENABLE=y
+CONFIG_ARCH_SPARSEMEM_ENABLE=y
+CONFIG_ARCH_SPARSEMEM_DEFAULT=y
+CONFIG_MAX_ACTIVE_REGIONS=1
+CONFIG_ARCH_POPULATES_NODE_MAP=y
+CONFIG_ARCH_SELECT_MEMORY_MODEL=y
+CONFIG_PAGE_SIZE_4KB=y
+# CONFIG_PAGE_SIZE_8KB is not set
+# CONFIG_PAGE_SIZE_16KB is not set
+# CONFIG_PAGE_SIZE_64KB is not set
+CONFIG_ENTRY_OFFSET=0x00001000
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+CONFIG_SPARSEMEM_STATIC=y
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=0
+CONFIG_NR_QUICK=2
+CONFIG_UNEVICTABLE_LRU=y
+
+#
+# Cache configuration
+#
+# CONFIG_SH_DIRECT_MAPPED is not set
+CONFIG_CACHE_WRITEBACK=y
+# CONFIG_CACHE_WRITETHROUGH is not set
+# CONFIG_CACHE_OFF is not set
+
+#
+# Processor features
+#
+CONFIG_CPU_LITTLE_ENDIAN=y
+# CONFIG_CPU_BIG_ENDIAN is not set
+CONFIG_SH_FPU_EMU=y
+CONFIG_SH_ADC=y
+CONFIG_CPU_HAS_INTEVT=y
+CONFIG_CPU_HAS_IPR_IRQ=y
+CONFIG_CPU_HAS_SR_RB=y
+
+#
+# Board support
+#
+# CONFIG_SH_SOLUTION_ENGINE is not set
+# CONFIG_SH_HP6XX is not set
+CONFIG_SH_POLARIS=y
+
+#
+# Timer and clock configuration
+#
+CONFIG_SH_TMU=y
+CONFIG_SH_TIMER_IRQ=16
+CONFIG_SH_PCLK_FREQ=33000000
+CONFIG_TICK_ONESHOT=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+
+#
+# CPU Frequency scaling
+#
+# CONFIG_CPU_FREQ is not set
+
+#
+# DMA support
+#
+CONFIG_SH_DMA_API=y
+CONFIG_SH_DMA=y
+CONFIG_NR_ONCHIP_DMA_CHANNELS=4
+# CONFIG_NR_DMA_CHANNELS_BOOL is not set
+
+#
+# Companion Chips
+#
+
+#
+# Additional SuperH Device Drivers
+#
+CONFIG_HEARTBEAT=y
+# CONFIG_PUSH_SWITCH is not set
+
+#
+# Kernel features
+#
+CONFIG_HZ_100=y
+# CONFIG_HZ_250 is not set
+# CONFIG_HZ_300 is not set
+# CONFIG_HZ_1000 is not set
+CONFIG_HZ=100
+CONFIG_SCHED_HRTICK=y
+# CONFIG_KEXEC is not set
+# CONFIG_CRASH_DUMP is not set
+# CONFIG_SECCOMP is not set
+# CONFIG_PREEMPT_NONE is not set
+# CONFIG_PREEMPT_VOLUNTARY is not set
+CONFIG_PREEMPT=y
+CONFIG_GUSA=y
+# CONFIG_GUSA_RB is not set
+
+#
+# Boot options
+#
+CONFIG_ZERO_PAGE_OFFSET=0x00001000
+CONFIG_BOOT_LINK_OFFSET=0x00800000
+CONFIG_CMDLINE_BOOL=y
+CONFIG_CMDLINE="console=ttySC1,115200 root=/dev/mtdblock2 rootfstype=jffs2 mem=63M mtdparts=physmap-flash.0:0x00100000(bootloader)ro,0x00500000(Kernel)ro,0x00A00000(Filesystem)"
+
+#
+# Bus options
+#
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+# CONFIG_PCCARD is not set
+
+#
+# Executable file formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+# CONFIG_HAVE_AOUT is not set
+# CONFIG_BINFMT_MISC is not set
+
+#
+# Power management options (EXPERIMENTAL)
+#
+# CONFIG_PM is not set
+# CONFIG_CPU_IDLE is not set
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_COMPAT_NET_DEV_OPS=y
+CONFIG_PACKET=y
+CONFIG_PACKET_MMAP=y
+CONFIG_UNIX=y
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+# CONFIG_IP_PNP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_IP_MROUTE is not set
+# CONFIG_ARPD is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+# CONFIG_INET_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+# CONFIG_INET_LRO is not set
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+# CONFIG_IPV6 is not set
+# CONFIG_NETWORK_SECMARK is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_NET_DSA is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_SCHED is not set
+# CONFIG_DCB is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_AF_RXRPC is not set
+# CONFIG_PHONET is not set
+# CONFIG_WIRELESS is not set
+# CONFIG_WIMAX is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+CONFIG_FW_LOADER=y
+# CONFIG_FIRMWARE_IN_KERNEL is not set
+CONFIG_EXTRA_FIRMWARE=""
+# CONFIG_DEBUG_DRIVER is not set
+# CONFIG_DEBUG_DEVRES is not set
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_CONNECTOR is not set
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_CONCAT is not set
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_TESTS is not set
+# CONFIG_MTD_REDBOOT_PARTS is not set
+CONFIG_MTD_CMDLINE_PARTS=y
+# CONFIG_MTD_AR7_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_MTD_OOPS is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=y
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_GEN_PROBE=y
+CONFIG_MTD_CFI_ADV_OPTIONS=y
+CONFIG_MTD_CFI_NOSWAP=y
+# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set
+# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set
+# CONFIG_MTD_CFI_GEOMETRY is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+# CONFIG_MTD_OTP is not set
+CONFIG_MTD_CFI_INTELEXT=y
+# CONFIG_MTD_CFI_AMDSTD is not set
+# CONFIG_MTD_CFI_STAA is not set
+CONFIG_MTD_CFI_UTIL=y
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+CONFIG_MTD_PHYSMAP=y
+CONFIG_MTD_PHYSMAP_COMPAT=y
+CONFIG_MTD_PHYSMAP_START=0x00000000
+CONFIG_MTD_PHYSMAP_LEN=0x01000000
+CONFIG_MTD_PHYSMAP_BANKWIDTH=2
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+# CONFIG_MTD_NAND is not set
+# CONFIG_MTD_ONENAND is not set
+
+#
+# LPDDR flash memory drivers
+#
+# CONFIG_MTD_LPDDR is not set
+# CONFIG_MTD_QINFO_PROBE is not set
+
+#
+# UBI - Unsorted block images
+#
+# CONFIG_MTD_UBI is not set
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_COW_COMMON is not set
+# CONFIG_BLK_DEV_LOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_RAM is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+# CONFIG_BLK_DEV_HD is not set
+CONFIG_MISC_DEVICES=y
+# CONFIG_ENCLOSURE_SERVICES is not set
+# CONFIG_C2PORT is not set
+
+#
+# EEPROM support
+#
+# CONFIG_EEPROM_93CX6 is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+# CONFIG_SCSI is not set
+# CONFIG_SCSI_DMA is not set
+# CONFIG_SCSI_NETLINK is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+CONFIG_NETDEVICES=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_VETH is not set
+CONFIG_PHYLIB=y
+
+#
+# MII PHY device drivers
+#
+# CONFIG_MARVELL_PHY is not set
+# CONFIG_DAVICOM_PHY is not set
+# CONFIG_QSEMI_PHY is not set
+# CONFIG_LXT_PHY is not set
+# CONFIG_CICADA_PHY is not set
+# CONFIG_VITESSE_PHY is not set
+CONFIG_SMSC_PHY=y
+# CONFIG_BROADCOM_PHY is not set
+# CONFIG_ICPLUS_PHY is not set
+# CONFIG_REALTEK_PHY is not set
+# CONFIG_NATIONAL_PHY is not set
+# CONFIG_STE10XP is not set
+# CONFIG_LSI_ET1011C_PHY is not set
+# CONFIG_FIXED_PHY is not set
+# CONFIG_MDIO_BITBANG is not set
+CONFIG_NET_ETHERNET=y
+CONFIG_MII=y
+# CONFIG_AX88796 is not set
+# CONFIG_STNIC is not set
+# CONFIG_SMC91X is not set
+# CONFIG_SMC911X is not set
+CONFIG_SMSC911X=y
+# CONFIG_IBM_NEW_EMAC_ZMII is not set
+# CONFIG_IBM_NEW_EMAC_RGMII is not set
+# CONFIG_IBM_NEW_EMAC_TAH is not set
+# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
+# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
+# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
+# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
+# CONFIG_B44 is not set
+# CONFIG_NETDEV_1000 is not set
+# CONFIG_NETDEV_10000 is not set
+
+#
+# Wireless LAN
+#
+# CONFIG_WLAN_PRE80211 is not set
+# CONFIG_WLAN_80211 is not set
+# CONFIG_IWLWIFI_LEDS is not set
+
+#
+# Enable WiMAX (Networking options) to see the WiMAX drivers
+#
+# CONFIG_WAN is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_ISDN is not set
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+# CONFIG_INPUT_POLLDEV is not set
+
+#
+# Userland interfaces
+#
+# CONFIG_INPUT_MOUSEDEV is not set
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_CONSOLE_TRANSLATIONS=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+CONFIG_VT_HW_CONSOLE_BINDING=y
+CONFIG_DEVKMEM=y
+CONFIG_SERIAL_NONSTANDARD=y
+# CONFIG_N_HDLC is not set
+# CONFIG_RISCOM8 is not set
+# CONFIG_SPECIALIX is not set
+# CONFIG_RIO is not set
+# CONFIG_STALDRV is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_SH_SCI=y
+CONFIG_SERIAL_SH_SCI_NR_UARTS=3
+CONFIG_SERIAL_SH_SCI_CONSOLE=y
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
+# CONFIG_LEGACY_PTYS is not set
+# CONFIG_IPMI_HANDLER is not set
+# CONFIG_HW_RANDOM is not set
+# CONFIG_R3964 is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+# CONFIG_I2C is not set
+# CONFIG_SPI is not set
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+# CONFIG_THERMAL is not set
+# CONFIG_THERMAL_HWMON is not set
+# CONFIG_WATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
+
+#
+# Sonics Silicon Backplane
+#
+# CONFIG_SSB is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_CORE is not set
+# CONFIG_MFD_SM501 is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_REGULATOR is not set
+
+#
+# Multimedia devices
+#
+
+#
+# Multimedia core support
+#
+# CONFIG_VIDEO_DEV is not set
+# CONFIG_DVB_CORE is not set
+# CONFIG_VIDEO_MEDIA is not set
+
+#
+# Multimedia drivers
+#
+# CONFIG_DAB is not set
+
+#
+# Graphics support
+#
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+# CONFIG_FB is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+
+#
+# Console display driver support
+#
+CONFIG_DUMMY_CONSOLE=y
+# CONFIG_SOUND is not set
+# CONFIG_HID_SUPPORT is not set
+# CONFIG_USB_SUPPORT is not set
+# CONFIG_MMC is not set
+# CONFIG_MEMSTICK is not set
+# CONFIG_NEW_LEDS is not set
+# CONFIG_ACCESSIBILITY is not set
+CONFIG_RTC_LIB=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_HCTOSYS=y
+CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
+# CONFIG_RTC_DEBUG is not set
+
+#
+# RTC interfaces
+#
+CONFIG_RTC_INTF_SYSFS=y
+CONFIG_RTC_INTF_PROC=y
+CONFIG_RTC_INTF_DEV=y
+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
+# CONFIG_RTC_DRV_TEST is not set
+
+#
+# SPI RTC drivers
+#
+
+#
+# Platform RTC drivers
+#
+# CONFIG_RTC_DRV_DS1286 is not set
+# CONFIG_RTC_DRV_DS1511 is not set
+# CONFIG_RTC_DRV_DS1553 is not set
+# CONFIG_RTC_DRV_DS1742 is not set
+# CONFIG_RTC_DRV_STK17TA8 is not set
+# CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_M48T35 is not set
+# CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_BQ4802 is not set
+# CONFIG_RTC_DRV_V3020 is not set
+
+#
+# on-CPU RTC drivers
+#
+CONFIG_RTC_DRV_SH=y
+# CONFIG_DMADEVICES is not set
+# CONFIG_UIO is not set
+# CONFIG_STAGING is not set
+
+#
+# File systems
+#
+# CONFIG_EXT2_FS is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_EXT4_FS is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
+CONFIG_FILE_LOCKING=y
+# CONFIG_XFS_FS is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_BTRFS_FS is not set
+# CONFIG_DNOTIFY is not set
+# CONFIG_INOTIFY is not set
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_MSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
+# CONFIG_HUGETLBFS is not set
+# CONFIG_HUGETLB_PAGE is not set
+# CONFIG_CONFIGFS_FS is not set
+CONFIG_MISC_FILESYSTEMS=y
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+CONFIG_JFFS2_FS=y
+CONFIG_JFFS2_FS_DEBUG=0
+# CONFIG_JFFS2_FS_WRITEBUFFER is not set
+# CONFIG_JFFS2_SUMMARY is not set
+# CONFIG_JFFS2_FS_XATTR is not set
+# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
+CONFIG_JFFS2_ZLIB=y
+# CONFIG_JFFS2_LZO is not set
+CONFIG_JFFS2_RTIME=y
+# CONFIG_JFFS2_RUBIN is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_SQUASHFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_OMFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+CONFIG_NETWORK_FILESYSTEMS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+# CONFIG_NFS_V3_ACL is not set
+# CONFIG_NFS_V4 is not set
+# CONFIG_NFSD is not set
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+# CONFIG_SUNRPC_REGISTER_V4 is not set
+# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+# CONFIG_NLS is not set
+# CONFIG_DLM is not set
+
+#
+# Kernel hacking
+#
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+# CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_WARN_DEPRECATED=y
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=1024
+# CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
+CONFIG_DEBUG_KERNEL=y
+CONFIG_DEBUG_SHIRQ=y
+CONFIG_DETECT_SOFTLOCKUP=y
+# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
+CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
+# CONFIG_SCHED_DEBUG is not set
+# CONFIG_SCHEDSTATS is not set
+# CONFIG_TIMER_STATS is not set
+# CONFIG_DEBUG_OBJECTS is not set
+# CONFIG_DEBUG_SLAB is not set
+CONFIG_DEBUG_PREEMPT=y
+CONFIG_DEBUG_RT_MUTEXES=y
+CONFIG_DEBUG_PI_LIST=y
+# CONFIG_RT_MUTEX_TESTER is not set
+CONFIG_DEBUG_SPINLOCK=y
+CONFIG_DEBUG_MUTEXES=y
+CONFIG_DEBUG_LOCK_ALLOC=y
+# CONFIG_PROVE_LOCKING is not set
+CONFIG_LOCKDEP=y
+# CONFIG_LOCK_STAT is not set
+# CONFIG_DEBUG_LOCKDEP is not set
+CONFIG_DEBUG_SPINLOCK_SLEEP=y
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+CONFIG_STACKTRACE=y
+# CONFIG_DEBUG_KOBJECT is not set
+CONFIG_DEBUG_BUGVERBOSE=y
+CONFIG_DEBUG_INFO=y
+# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_WRITECOUNT is not set
+# CONFIG_DEBUG_MEMORY_INIT is not set
+# CONFIG_DEBUG_LIST is not set
+CONFIG_DEBUG_SG=y
+# CONFIG_DEBUG_NOTIFIERS is not set
+CONFIG_FRAME_POINTER=y
+# CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
+# CONFIG_BACKTRACE_SELF_TEST is not set
+# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_FAULT_INJECTION is not set
+# CONFIG_LATENCYTOP is not set
+CONFIG_SYSCTL_SYSCALL_CHECK=y
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_DYNAMIC_FTRACE=y
+CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+
+#
+# Tracers
+#
+# CONFIG_FUNCTION_TRACER is not set
+# CONFIG_IRQSOFF_TRACER is not set
+# CONFIG_PREEMPT_TRACER is not set
+# CONFIG_SCHED_TRACER is not set
+# CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_BOOT_TRACER is not set
+# CONFIG_TRACE_BRANCH_PROFILING is not set
+# CONFIG_STACK_TRACER is not set
+# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+# CONFIG_KGDB is not set
+# CONFIG_SH_STANDARD_BIOS is not set
+CONFIG_EARLY_SCIF_CONSOLE=y
+CONFIG_EARLY_SCIF_CONSOLE_PORT=0x00000000
+CONFIG_EARLY_PRINTK=y
+# CONFIG_DEBUG_BOOTMEM is not set
+# CONFIG_DEBUG_STACKOVERFLOW is not set
+# CONFIG_DEBUG_STACK_USAGE is not set
+# CONFIG_4KSTACKS is not set
+# CONFIG_IRQSTACKS is not set
+CONFIG_DUMP_CODE=y
+# CONFIG_SH_NO_BSS_INIT is not set
+# CONFIG_MORE_COMPILE_OPTIONS is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITYFS is not set
+# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+# CONFIG_CRYPTO is not set
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+CONFIG_GENERIC_FIND_LAST_BIT=y
+# CONFIG_CRC_CCITT is not set
+# CONFIG_CRC16 is not set
+# CONFIG_CRC_T10DIF is not set
+# CONFIG_CRC_ITU_T is not set
+CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
+# CONFIG_LIBCRC32C is not set
+CONFIG_AUDIT_GENERIC=y
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
+CONFIG_PLIST=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
diff --git a/arch/sh/configs/sh7785lcr_32bit_defconfig b/arch/sh/configs/sh7785lcr_32bit_defconfig
new file mode 100644
index 000000000000..54e1dee8e24a
--- /dev/null
+++ b/arch/sh/configs/sh7785lcr_32bit_defconfig
@@ -0,0 +1,1553 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.29-rc4
+# Fri Feb 20 18:25:29 2009
+#
+CONFIG_SUPERH=y
+CONFIG_SUPERH32=y
+CONFIG_ARCH_DEFCONFIG="arch/sh/configs/shx3_defconfig"
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_GENERIC_BUG=y
+CONFIG_GENERIC_FIND_NEXT_BIT=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
+CONFIG_GENERIC_IRQ_PROBE=y
+# CONFIG_GENERIC_GPIO is not set
+CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+# CONFIG_ARCH_SUSPEND_POSSIBLE is not set
+# CONFIG_ARCH_HIBERNATION_POSSIBLE is not set
+CONFIG_SYS_SUPPORTS_NUMA=y
+CONFIG_SYS_SUPPORTS_PCI=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_HAVE_LATENCYTOP_SUPPORT=y
+# CONFIG_ARCH_HAS_ILOG2_U32 is not set
+# CONFIG_ARCH_HAS_ILOG2_U64 is not set
+CONFIG_ARCH_NO_VIRT_TO_BUS=y
+CONFIG_IO_TRAPPED=y
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_LOCK_KERNEL=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+# CONFIG_POSIX_MQUEUE is not set
+CONFIG_BSD_PROCESS_ACCT=y
+# CONFIG_BSD_PROCESS_ACCT_V3 is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_AUDIT is not set
+
+#
+# RCU Subsystem
+#
+CONFIG_CLASSIC_RCU=y
+# CONFIG_TREE_RCU is not set
+# CONFIG_PREEMPT_RCU is not set
+# CONFIG_TREE_RCU_TRACE is not set
+# CONFIG_PREEMPT_RCU_TRACE is not set
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_LOG_BUF_SHIFT=14
+CONFIG_GROUP_SCHED=y
+CONFIG_FAIR_GROUP_SCHED=y
+# CONFIG_RT_GROUP_SCHED is not set
+CONFIG_USER_SCHED=y
+# CONFIG_CGROUP_SCHED is not set
+# CONFIG_CGROUPS is not set
+CONFIG_SYSFS_DEPRECATED=y
+CONFIG_SYSFS_DEPRECATED_V2=y
+# CONFIG_RELAY is not set
+# CONFIG_NAMESPACES is not set
+# CONFIG_BLK_DEV_INITRD is not set
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL=y
+CONFIG_EMBEDDED=y
+CONFIG_UID16=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_ALL is not set
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_COMPAT_BRK=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_ANON_INODES=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_AIO=y
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_PCI_QUIRKS=y
+CONFIG_SLAB=y
+# CONFIG_SLUB is not set
+# CONFIG_SLOB is not set
+CONFIG_PROFILING=y
+# CONFIG_OPROFILE is not set
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_KPROBES is not set
+CONFIG_HAVE_IOREMAP_PROT=y
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+CONFIG_HAVE_ARCH_TRACEHOOK=y
+CONFIG_HAVE_CLK=y
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_BLOCK=y
+# CONFIG_LBD is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+# CONFIG_DEFAULT_AS is not set
+# CONFIG_DEFAULT_DEADLINE is not set
+CONFIG_DEFAULT_CFQ=y
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="cfq"
+# CONFIG_FREEZER is not set
+
+#
+# System type
+#
+CONFIG_CPU_SH4=y
+CONFIG_CPU_SH4A=y
+CONFIG_CPU_SHX2=y
+# CONFIG_CPU_SUBTYPE_SH7619 is not set
+# CONFIG_CPU_SUBTYPE_SH7201 is not set
+# CONFIG_CPU_SUBTYPE_SH7203 is not set
+# CONFIG_CPU_SUBTYPE_SH7206 is not set
+# CONFIG_CPU_SUBTYPE_SH7263 is not set
+# CONFIG_CPU_SUBTYPE_MXG is not set
+# CONFIG_CPU_SUBTYPE_SH7705 is not set
+# CONFIG_CPU_SUBTYPE_SH7706 is not set
+# CONFIG_CPU_SUBTYPE_SH7707 is not set
+# CONFIG_CPU_SUBTYPE_SH7708 is not set
+# CONFIG_CPU_SUBTYPE_SH7709 is not set
+# CONFIG_CPU_SUBTYPE_SH7710 is not set
+# CONFIG_CPU_SUBTYPE_SH7712 is not set
+# CONFIG_CPU_SUBTYPE_SH7720 is not set
+# CONFIG_CPU_SUBTYPE_SH7721 is not set
+# CONFIG_CPU_SUBTYPE_SH7750 is not set
+# CONFIG_CPU_SUBTYPE_SH7091 is not set
+# CONFIG_CPU_SUBTYPE_SH7750R is not set
+# CONFIG_CPU_SUBTYPE_SH7750S is not set
+# CONFIG_CPU_SUBTYPE_SH7751 is not set
+# CONFIG_CPU_SUBTYPE_SH7751R is not set
+# CONFIG_CPU_SUBTYPE_SH7760 is not set
+# CONFIG_CPU_SUBTYPE_SH4_202 is not set
+# CONFIG_CPU_SUBTYPE_SH7723 is not set
+# CONFIG_CPU_SUBTYPE_SH7763 is not set
+# CONFIG_CPU_SUBTYPE_SH7770 is not set
+# CONFIG_CPU_SUBTYPE_SH7780 is not set
+CONFIG_CPU_SUBTYPE_SH7785=y
+# CONFIG_CPU_SUBTYPE_SHX3 is not set
+# CONFIG_CPU_SUBTYPE_SH7343 is not set
+# CONFIG_CPU_SUBTYPE_SH7722 is not set
+# CONFIG_CPU_SUBTYPE_SH7366 is not set
+# CONFIG_CPU_SUBTYPE_SH5_101 is not set
+# CONFIG_CPU_SUBTYPE_SH5_103 is not set
+
+#
+# Memory management options
+#
+CONFIG_QUICKLIST=y
+CONFIG_MMU=y
+CONFIG_PAGE_OFFSET=0x80000000
+CONFIG_MEMORY_START=0x40000000
+CONFIG_MEMORY_SIZE=0x20000000
+# CONFIG_29BIT is not set
+CONFIG_32BIT=y
+CONFIG_PMB_ENABLE=y
+# CONFIG_PMB is not set
+CONFIG_PMB_FIXED=y
+# CONFIG_X2TLB is not set
+CONFIG_VSYSCALL=y
+# CONFIG_NUMA is not set
+CONFIG_ARCH_FLATMEM_ENABLE=y
+CONFIG_ARCH_SPARSEMEM_ENABLE=y
+CONFIG_ARCH_SPARSEMEM_DEFAULT=y
+CONFIG_MAX_ACTIVE_REGIONS=2
+CONFIG_ARCH_POPULATES_NODE_MAP=y
+CONFIG_ARCH_SELECT_MEMORY_MODEL=y
+CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
+CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y
+CONFIG_PAGE_SIZE_4KB=y
+# CONFIG_PAGE_SIZE_8KB is not set
+# CONFIG_PAGE_SIZE_16KB is not set
+# CONFIG_PAGE_SIZE_64KB is not set
+CONFIG_ENTRY_OFFSET=0x00001000
+CONFIG_SELECT_MEMORY_MODEL=y
+# CONFIG_FLATMEM_MANUAL is not set
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+CONFIG_SPARSEMEM_MANUAL=y
+CONFIG_SPARSEMEM=y
+CONFIG_HAVE_MEMORY_PRESENT=y
+CONFIG_SPARSEMEM_STATIC=y
+# CONFIG_MEMORY_HOTPLUG is not set
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4
+CONFIG_MIGRATION=y
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=0
+CONFIG_NR_QUICK=2
+CONFIG_UNEVICTABLE_LRU=y
+
+#
+# Cache configuration
+#
+# CONFIG_SH_DIRECT_MAPPED is not set
+CONFIG_CACHE_WRITEBACK=y
+# CONFIG_CACHE_WRITETHROUGH is not set
+# CONFIG_CACHE_OFF is not set
+
+#
+# Processor features
+#
+CONFIG_CPU_LITTLE_ENDIAN=y
+# CONFIG_CPU_BIG_ENDIAN is not set
+CONFIG_SH_FPU=y
+CONFIG_SH_STORE_QUEUES=y
+CONFIG_CPU_HAS_INTEVT=y
+CONFIG_CPU_HAS_SR_RB=y
+CONFIG_CPU_HAS_PTEA=y
+CONFIG_CPU_HAS_FPU=y
+
+#
+# Board support
+#
+# CONFIG_SH_HIGHLANDER is not set
+CONFIG_SH_SH7785LCR=y
+
+#
+# Timer and clock configuration
+#
+CONFIG_SH_TMU=y
+CONFIG_SH_TIMER_IRQ=28
+CONFIG_SH_PCLK_FREQ=50000000
+CONFIG_TICK_ONESHOT=y
+# CONFIG_NO_HZ is not set
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+
+#
+# CPU Frequency scaling
+#
+# CONFIG_CPU_FREQ is not set
+
+#
+# DMA support
+#
+# CONFIG_SH_DMA is not set
+
+#
+# Companion Chips
+#
+
+#
+# Additional SuperH Device Drivers
+#
+CONFIG_HEARTBEAT=y
+# CONFIG_PUSH_SWITCH is not set
+
+#
+# Kernel features
+#
+# CONFIG_HZ_100 is not set
+CONFIG_HZ_250=y
+# CONFIG_HZ_300 is not set
+# CONFIG_HZ_1000 is not set
+CONFIG_HZ=250
+CONFIG_SCHED_HRTICK=y
+CONFIG_KEXEC=y
+# CONFIG_CRASH_DUMP is not set
+# CONFIG_SECCOMP is not set
+# CONFIG_PREEMPT_NONE is not set
+# CONFIG_PREEMPT_VOLUNTARY is not set
+CONFIG_PREEMPT=y
+CONFIG_GUSA=y
+
+#
+# Boot options
+#
+CONFIG_ZERO_PAGE_OFFSET=0x00001000
+CONFIG_BOOT_LINK_OFFSET=0x00800000
+# CONFIG_CMDLINE_BOOL is not set
+
+#
+# Bus options
+#
+CONFIG_PCI=y
+CONFIG_SH_PCIDMA_NONCOHERENT=y
+CONFIG_PCI_AUTO=y
+CONFIG_PCI_AUTO_UPDATE_RESOURCES=y
+# CONFIG_PCIEPORTBUS is not set
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+CONFIG_PCI_LEGACY=y
+# CONFIG_PCI_DEBUG is not set
+# CONFIG_PCI_STUB is not set
+# CONFIG_PCCARD is not set
+# CONFIG_HOTPLUG_PCI is not set
+
+#
+# Executable file formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+# CONFIG_HAVE_AOUT is not set
+# CONFIG_BINFMT_MISC is not set
+
+#
+# Power management options (EXPERIMENTAL)
+#
+# CONFIG_PM is not set
+# CONFIG_CPU_IDLE is not set
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_COMPAT_NET_DEV_OPS=y
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+CONFIG_UNIX=y
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+# CONFIG_XFRM_SUB_POLICY is not set
+# CONFIG_XFRM_MIGRATE is not set
+# CONFIG_XFRM_STATISTICS is not set
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+CONFIG_IP_ADVANCED_ROUTER=y
+CONFIG_ASK_IP_FIB_HASH=y
+# CONFIG_IP_FIB_TRIE is not set
+CONFIG_IP_FIB_HASH=y
+# CONFIG_IP_MULTIPLE_TABLES is not set
+# CONFIG_IP_ROUTE_MULTIPATH is not set
+# CONFIG_IP_ROUTE_VERBOSE is not set
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+# CONFIG_IP_PNP_BOOTP is not set
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_ARPD is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+# CONFIG_INET_TUNNEL is not set
+CONFIG_INET_XFRM_MODE_TRANSPORT=y
+CONFIG_INET_XFRM_MODE_TUNNEL=y
+CONFIG_INET_XFRM_MODE_BEET=y
+# CONFIG_INET_LRO is not set
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+# CONFIG_IPV6 is not set
+# CONFIG_NETWORK_SECMARK is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_NET_DSA is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_SCHED is not set
+# CONFIG_DCB is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_AF_RXRPC is not set
+# CONFIG_PHONET is not set
+CONFIG_WIRELESS=y
+# CONFIG_CFG80211 is not set
+# CONFIG_WIRELESS_OLD_REGULATORY is not set
+CONFIG_WIRELESS_EXT=y
+CONFIG_WIRELESS_EXT_SYSFS=y
+# CONFIG_LIB80211 is not set
+# CONFIG_MAC80211 is not set
+# CONFIG_WIMAX is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+# CONFIG_FW_LOADER is not set
+# CONFIG_DEBUG_DRIVER is not set
+# CONFIG_DEBUG_DEVRES is not set
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_CONNECTOR is not set
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+CONFIG_MTD_CONCAT=y
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_TESTS is not set
+# CONFIG_MTD_REDBOOT_PARTS is not set
+# CONFIG_MTD_CMDLINE_PARTS is not set
+# CONFIG_MTD_AR7_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_MTD_OOPS is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=y
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_GEN_PROBE=y
+# CONFIG_MTD_CFI_ADV_OPTIONS is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+# CONFIG_MTD_CFI_INTELEXT is not set
+CONFIG_MTD_CFI_AMDSTD=y
+# CONFIG_MTD_CFI_STAA is not set
+CONFIG_MTD_CFI_UTIL=y
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+CONFIG_MTD_PHYSMAP=y
+# CONFIG_MTD_PHYSMAP_COMPAT is not set
+# CONFIG_MTD_INTEL_VR_NOR is not set
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_PMC551 is not set
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+# CONFIG_MTD_NAND is not set
+# CONFIG_MTD_ONENAND is not set
+
+#
+# LPDDR flash memory drivers
+#
+# CONFIG_MTD_LPDDR is not set
+# CONFIG_MTD_QINFO_PROBE is not set
+
+#
+# UBI - Unsorted block images
+#
+# CONFIG_MTD_UBI is not set
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_CPQ_CISS_DA is not set
+# CONFIG_BLK_DEV_DAC960 is not set
+# CONFIG_BLK_DEV_UMEM is not set
+# CONFIG_BLK_DEV_COW_COMMON is not set
+# CONFIG_BLK_DEV_LOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_SX8 is not set
+# CONFIG_BLK_DEV_UB is not set
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=16
+CONFIG_BLK_DEV_RAM_SIZE=4096
+# CONFIG_BLK_DEV_XIP is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+# CONFIG_BLK_DEV_HD is not set
+# CONFIG_MISC_DEVICES is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+CONFIG_SCSI=y
+CONFIG_SCSI_DMA=y
+# CONFIG_SCSI_TGT is not set
+# CONFIG_SCSI_NETLINK is not set
+CONFIG_SCSI_PROC_FS=y
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+# CONFIG_CHR_DEV_ST is not set
+# CONFIG_CHR_DEV_OSST is not set
+# CONFIG_BLK_DEV_SR is not set
+# CONFIG_CHR_DEV_SG is not set
+# CONFIG_CHR_DEV_SCH is not set
+
+#
+# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
+#
+# CONFIG_SCSI_MULTI_LUN is not set
+# CONFIG_SCSI_CONSTANTS is not set
+# CONFIG_SCSI_LOGGING is not set
+# CONFIG_SCSI_SCAN_ASYNC is not set
+CONFIG_SCSI_WAIT_SCAN=m
+
+#
+# SCSI Transports
+#
+# CONFIG_SCSI_SPI_ATTRS is not set
+# CONFIG_SCSI_FC_ATTRS is not set
+# CONFIG_SCSI_ISCSI_ATTRS is not set
+# CONFIG_SCSI_SAS_LIBSAS is not set
+# CONFIG_SCSI_SRP_ATTRS is not set
+# CONFIG_SCSI_LOWLEVEL is not set
+# CONFIG_SCSI_DH is not set
+CONFIG_ATA=y
+# CONFIG_ATA_NONSTANDARD is not set
+CONFIG_SATA_PMP=y
+# CONFIG_SATA_AHCI is not set
+# CONFIG_SATA_SIL24 is not set
+CONFIG_ATA_SFF=y
+# CONFIG_SATA_SVW is not set
+# CONFIG_ATA_PIIX is not set
+# CONFIG_SATA_MV is not set
+# CONFIG_SATA_NV is not set
+# CONFIG_PDC_ADMA is not set
+# CONFIG_SATA_QSTOR is not set
+# CONFIG_SATA_PROMISE is not set
+# CONFIG_SATA_SX4 is not set
+CONFIG_SATA_SIL=y
+# CONFIG_SATA_SIS is not set
+# CONFIG_SATA_ULI is not set
+# CONFIG_SATA_VIA is not set
+# CONFIG_SATA_VITESSE is not set
+# CONFIG_SATA_INIC162X is not set
+# CONFIG_PATA_ALI is not set
+# CONFIG_PATA_AMD is not set
+# CONFIG_PATA_ARTOP is not set
+# CONFIG_PATA_ATIIXP is not set
+# CONFIG_PATA_CMD640_PCI is not set
+# CONFIG_PATA_CMD64X is not set
+# CONFIG_PATA_CS5520 is not set
+# CONFIG_PATA_CS5530 is not set
+# CONFIG_PATA_CYPRESS is not set
+# CONFIG_PATA_EFAR is not set
+# CONFIG_ATA_GENERIC is not set
+# CONFIG_PATA_HPT366 is not set
+# CONFIG_PATA_HPT37X is not set
+# CONFIG_PATA_HPT3X2N is not set
+# CONFIG_PATA_HPT3X3 is not set
+# CONFIG_PATA_IT821X is not set
+# CONFIG_PATA_IT8213 is not set
+# CONFIG_PATA_JMICRON is not set
+# CONFIG_PATA_TRIFLEX is not set
+# CONFIG_PATA_MARVELL is not set
+# CONFIG_PATA_MPIIX is not set
+# CONFIG_PATA_OLDPIIX is not set
+# CONFIG_PATA_NETCELL is not set
+# CONFIG_PATA_NINJA32 is not set
+# CONFIG_PATA_NS87410 is not set
+# CONFIG_PATA_NS87415 is not set
+# CONFIG_PATA_OPTI is not set
+# CONFIG_PATA_OPTIDMA is not set
+# CONFIG_PATA_PDC_OLD is not set
+# CONFIG_PATA_RADISYS is not set
+# CONFIG_PATA_RZ1000 is not set
+# CONFIG_PATA_SC1200 is not set
+# CONFIG_PATA_SERVERWORKS is not set
+# CONFIG_PATA_PDC2027X is not set
+# CONFIG_PATA_SIL680 is not set
+# CONFIG_PATA_SIS is not set
+# CONFIG_PATA_VIA is not set
+# CONFIG_PATA_WINBOND is not set
+# CONFIG_PATA_PLATFORM is not set
+# CONFIG_PATA_SCH is not set
+# CONFIG_MD is not set
+# CONFIG_FUSION is not set
+
+#
+# IEEE 1394 (FireWire) support
+#
+
+#
+# Enable only one of the two stacks, unless you know what you are doing
+#
+# CONFIG_FIREWIRE is not set
+# CONFIG_IEEE1394 is not set
+# CONFIG_I2O is not set
+CONFIG_NETDEVICES=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_VETH is not set
+# CONFIG_ARCNET is not set
+# CONFIG_NET_ETHERNET is not set
+CONFIG_MII=y
+CONFIG_NETDEV_1000=y
+# CONFIG_ACENIC is not set
+# CONFIG_DL2K is not set
+# CONFIG_E1000 is not set
+# CONFIG_E1000E is not set
+# CONFIG_IP1000 is not set
+# CONFIG_IGB is not set
+# CONFIG_NS83820 is not set
+# CONFIG_HAMACHI is not set
+# CONFIG_YELLOWFIN is not set
+CONFIG_R8169=y
+# CONFIG_SIS190 is not set
+# CONFIG_SKGE is not set
+# CONFIG_SKY2 is not set
+# CONFIG_VIA_VELOCITY is not set
+# CONFIG_TIGON3 is not set
+# CONFIG_BNX2 is not set
+# CONFIG_QLA3XXX is not set
+# CONFIG_ATL1 is not set
+# CONFIG_ATL1E is not set
+# CONFIG_JME is not set
+# CONFIG_NETDEV_10000 is not set
+# CONFIG_TR is not set
+
+#
+# Wireless LAN
+#
+# CONFIG_WLAN_PRE80211 is not set
+# CONFIG_WLAN_80211 is not set
+# CONFIG_IWLWIFI_LEDS is not set
+
+#
+# Enable WiMAX (Networking options) to see the WiMAX drivers
+#
+
+#
+# USB Network Adapters
+#
+# CONFIG_USB_CATC is not set
+# CONFIG_USB_KAWETH is not set
+# CONFIG_USB_PEGASUS is not set
+# CONFIG_USB_RTL8150 is not set
+# CONFIG_USB_USBNET is not set
+# CONFIG_WAN is not set
+# CONFIG_FDDI is not set
+# CONFIG_HIPPI is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+# CONFIG_NET_FC is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_ISDN is not set
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+CONFIG_INPUT_FF_MEMLESS=m
+# CONFIG_INPUT_POLLDEV is not set
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+CONFIG_INPUT_KEYBOARD=y
+# CONFIG_KEYBOARD_ATKBD is not set
+# CONFIG_KEYBOARD_SUNKBD is not set
+# CONFIG_KEYBOARD_LKKBD is not set
+# CONFIG_KEYBOARD_XTKBD is not set
+# CONFIG_KEYBOARD_NEWTON is not set
+# CONFIG_KEYBOARD_STOWAWAY is not set
+# CONFIG_KEYBOARD_SH_KEYSC is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_CONSOLE_TRANSLATIONS=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+CONFIG_VT_HW_CONSOLE_BINDING=y
+CONFIG_DEVKMEM=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+# CONFIG_NOZOMI is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_SH_SCI=y
+CONFIG_SERIAL_SH_SCI_NR_UARTS=6
+CONFIG_SERIAL_SH_SCI_CONSOLE=y
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+# CONFIG_SERIAL_JSM is not set
+CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=256
+# CONFIG_IPMI_HANDLER is not set
+CONFIG_HW_RANDOM=y
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+CONFIG_DEVPORT=y
+CONFIG_I2C=y
+CONFIG_I2C_BOARDINFO=y
+# CONFIG_I2C_CHARDEV is not set
+CONFIG_I2C_HELPER_AUTO=y
+CONFIG_I2C_ALGOPCA=y
+
+#
+# I2C Hardware Bus support
+#
+
+#
+# PC SMBus host controller drivers
+#
+# CONFIG_I2C_ALI1535 is not set
+# CONFIG_I2C_ALI1563 is not set
+# CONFIG_I2C_ALI15X3 is not set
+# CONFIG_I2C_AMD756 is not set
+# CONFIG_I2C_AMD8111 is not set
+# CONFIG_I2C_I801 is not set
+# CONFIG_I2C_ISCH is not set
+# CONFIG_I2C_PIIX4 is not set
+# CONFIG_I2C_NFORCE2 is not set
+# CONFIG_I2C_SIS5595 is not set
+# CONFIG_I2C_SIS630 is not set
+# CONFIG_I2C_SIS96X is not set
+# CONFIG_I2C_VIA is not set
+# CONFIG_I2C_VIAPRO is not set
+
+#
+# I2C system bus drivers (mostly embedded / system-on-chip)
+#
+# CONFIG_I2C_OCORES is not set
+# CONFIG_I2C_SH_MOBILE is not set
+# CONFIG_I2C_SIMTEC is not set
+
+#
+# External I2C/SMBus adapter drivers
+#
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_TAOS_EVM is not set
+# CONFIG_I2C_TINY_USB is not set
+
+#
+# Graphics adapter I2C/DDC channel drivers
+#
+# CONFIG_I2C_VOODOO3 is not set
+
+#
+# Other I2C/SMBus bus drivers
+#
+CONFIG_I2C_PCA_PLATFORM=y
+# CONFIG_I2C_STUB is not set
+
+#
+# Miscellaneous I2C Chip support
+#
+# CONFIG_DS1682 is not set
+# CONFIG_SENSORS_PCF8574 is not set
+# CONFIG_PCF8575 is not set
+# CONFIG_SENSORS_PCA9539 is not set
+# CONFIG_SENSORS_PCF8591 is not set
+# CONFIG_SENSORS_MAX6875 is not set
+# CONFIG_SENSORS_TSL2550 is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# CONFIG_I2C_DEBUG_CHIP is not set
+# CONFIG_SPI is not set
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+# CONFIG_THERMAL is not set
+# CONFIG_THERMAL_HWMON is not set
+# CONFIG_WATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
+
+#
+# Sonics Silicon Backplane
+#
+# CONFIG_SSB is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_CORE is not set
+CONFIG_MFD_SM501=y
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_TWL4030_CORE is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_PMIC_DA903X is not set
+# CONFIG_MFD_WM8400 is not set
+# CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_PCF50633 is not set
+# CONFIG_REGULATOR is not set
+
+#
+# Multimedia devices
+#
+
+#
+# Multimedia core support
+#
+# CONFIG_VIDEO_DEV is not set
+# CONFIG_DVB_CORE is not set
+# CONFIG_VIDEO_MEDIA is not set
+
+#
+# Multimedia drivers
+#
+# CONFIG_DAB is not set
+
+#
+# Graphics support
+#
+# CONFIG_DRM is not set
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+CONFIG_FB=y
+# CONFIG_FIRMWARE_EDID is not set
+# CONFIG_FB_DDC is not set
+# CONFIG_FB_BOOT_VESA_SUPPORT is not set
+CONFIG_FB_CFB_FILLRECT=y
+CONFIG_FB_CFB_COPYAREA=y
+CONFIG_FB_CFB_IMAGEBLIT=y
+# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
+CONFIG_FB_SYS_FILLRECT=m
+CONFIG_FB_SYS_COPYAREA=m
+CONFIG_FB_SYS_IMAGEBLIT=m
+# CONFIG_FB_FOREIGN_ENDIAN is not set
+CONFIG_FB_SYS_FOPS=m
+CONFIG_FB_DEFERRED_IO=y
+# CONFIG_FB_SVGALIB is not set
+# CONFIG_FB_MACMODES is not set
+# CONFIG_FB_BACKLIGHT is not set
+# CONFIG_FB_MODE_HELPERS is not set
+# CONFIG_FB_TILEBLITTING is not set
+
+#
+# Frame buffer hardware drivers
+#
+# CONFIG_FB_CIRRUS is not set
+# CONFIG_FB_PM2 is not set
+# CONFIG_FB_CYBER2000 is not set
+# CONFIG_FB_ASILIANT is not set
+# CONFIG_FB_IMSTT is not set
+# CONFIG_FB_S1D13XXX is not set
+# CONFIG_FB_NVIDIA is not set
+# CONFIG_FB_RIVA is not set
+# CONFIG_FB_MATROX is not set
+# CONFIG_FB_RADEON is not set
+# CONFIG_FB_ATY128 is not set
+# CONFIG_FB_ATY is not set
+# CONFIG_FB_S3 is not set
+# CONFIG_FB_SAVAGE is not set
+# CONFIG_FB_SIS is not set
+# CONFIG_FB_VIA is not set
+# CONFIG_FB_NEOMAGIC is not set
+# CONFIG_FB_KYRO is not set
+# CONFIG_FB_3DFX is not set
+# CONFIG_FB_VOODOO1 is not set
+# CONFIG_FB_VT8623 is not set
+# CONFIG_FB_TRIDENT is not set
+# CONFIG_FB_ARK is not set
+# CONFIG_FB_PM3 is not set
+# CONFIG_FB_CARMINE is not set
+CONFIG_FB_SH_MOBILE_LCDC=m
+CONFIG_FB_SM501=y
+# CONFIG_FB_VIRTUAL is not set
+# CONFIG_FB_METRONOME is not set
+# CONFIG_FB_MB862XX is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+
+#
+# Console display driver support
+#
+CONFIG_DUMMY_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE=y
+# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
+# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
+# CONFIG_FONTS is not set
+CONFIG_FONT_8x8=y
+CONFIG_FONT_8x16=y
+CONFIG_LOGO=y
+# CONFIG_LOGO_LINUX_MONO is not set
+# CONFIG_LOGO_LINUX_VGA16 is not set
+CONFIG_LOGO_LINUX_CLUT224=y
+# CONFIG_LOGO_SUPERH_MONO is not set
+# CONFIG_LOGO_SUPERH_VGA16 is not set
+# CONFIG_LOGO_SUPERH_CLUT224 is not set
+# CONFIG_SOUND is not set
+CONFIG_HID_SUPPORT=y
+CONFIG_HID=y
+# CONFIG_HID_DEBUG is not set
+# CONFIG_HIDRAW is not set
+
+#
+# USB Input Devices
+#
+CONFIG_USB_HID=y
+# CONFIG_HID_PID is not set
+# CONFIG_USB_HIDDEV is not set
+
+#
+# Special HID drivers
+#
+CONFIG_HID_COMPAT=y
+CONFIG_HID_A4TECH=y
+CONFIG_HID_APPLE=y
+CONFIG_HID_BELKIN=y
+CONFIG_HID_CHERRY=y
+CONFIG_HID_CHICONY=y
+CONFIG_HID_CYPRESS=y
+CONFIG_HID_EZKEY=y
+CONFIG_HID_GYRATION=y
+CONFIG_HID_LOGITECH=y
+# CONFIG_LOGITECH_FF is not set
+# CONFIG_LOGIRUMBLEPAD2_FF is not set
+CONFIG_HID_MICROSOFT=y
+CONFIG_HID_MONTEREY=y
+# CONFIG_HID_NTRIG is not set
+CONFIG_HID_PANTHERLORD=y
+# CONFIG_PANTHERLORD_FF is not set
+CONFIG_HID_PETALYNX=y
+CONFIG_HID_SAMSUNG=y
+CONFIG_HID_SONY=y
+CONFIG_HID_SUNPLUS=y
+# CONFIG_GREENASIA_FF is not set
+# CONFIG_HID_TOPSEED is not set
+CONFIG_THRUSTMASTER_FF=m
+CONFIG_ZEROPLUS_FF=m
+CONFIG_USB_SUPPORT=y
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
+CONFIG_USB_ARCH_HAS_EHCI=y
+CONFIG_USB=y
+# CONFIG_USB_DEBUG is not set
+# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
+
+#
+# Miscellaneous USB options
+#
+CONFIG_USB_DEVICEFS=y
+CONFIG_USB_DEVICE_CLASS=y
+# CONFIG_USB_DYNAMIC_MINORS is not set
+# CONFIG_USB_OTG is not set
+# CONFIG_USB_OTG_WHITELIST is not set
+# CONFIG_USB_OTG_BLACKLIST_HUB is not set
+CONFIG_USB_MON=y
+# CONFIG_USB_WUSB is not set
+# CONFIG_USB_WUSB_CBAF is not set
+
+#
+# USB Host Controller Drivers
+#
+# CONFIG_USB_C67X00_HCD is not set
+CONFIG_USB_EHCI_HCD=m
+# CONFIG_USB_EHCI_ROOT_HUB_TT is not set
+# CONFIG_USB_EHCI_TT_NEWSCHED is not set
+# CONFIG_USB_OXU210HP_HCD is not set
+# CONFIG_USB_ISP116X_HCD is not set
+# CONFIG_USB_ISP1760_HCD is not set
+CONFIG_USB_OHCI_HCD=m
+# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
+# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
+CONFIG_USB_OHCI_LITTLE_ENDIAN=y
+# CONFIG_USB_UHCI_HCD is not set
+# CONFIG_USB_SL811_HCD is not set
+CONFIG_USB_R8A66597_HCD=y
+# CONFIG_USB_WHCI_HCD is not set
+# CONFIG_USB_HWA_HCD is not set
+
+#
+# USB Device Class drivers
+#
+# CONFIG_USB_ACM is not set
+# CONFIG_USB_PRINTER is not set
+# CONFIG_USB_WDM is not set
+# CONFIG_USB_TMC is not set
+
+#
+# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed;
+#
+
+#
+# see USB_STORAGE Help for more information
+#
+CONFIG_USB_STORAGE=y
+# CONFIG_USB_STORAGE_DEBUG is not set
+# CONFIG_USB_STORAGE_DATAFAB is not set
+# CONFIG_USB_STORAGE_FREECOM is not set
+# CONFIG_USB_STORAGE_ISD200 is not set
+# CONFIG_USB_STORAGE_USBAT is not set
+# CONFIG_USB_STORAGE_SDDR09 is not set
+# CONFIG_USB_STORAGE_SDDR55 is not set
+# CONFIG_USB_STORAGE_JUMPSHOT is not set
+# CONFIG_USB_STORAGE_ALAUDA is not set
+# CONFIG_USB_STORAGE_ONETOUCH is not set
+# CONFIG_USB_STORAGE_KARMA is not set
+# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
+# CONFIG_USB_LIBUSUAL is not set
+
+#
+# USB Imaging devices
+#
+# CONFIG_USB_MDC800 is not set
+# CONFIG_USB_MICROTEK is not set
+
+#
+# USB port drivers
+#
+# CONFIG_USB_SERIAL is not set
+
+#
+# USB Miscellaneous drivers
+#
+# CONFIG_USB_EMI62 is not set
+# CONFIG_USB_EMI26 is not set
+# CONFIG_USB_ADUTUX is not set
+# CONFIG_USB_SEVSEG is not set
+# CONFIG_USB_RIO500 is not set
+# CONFIG_USB_LEGOTOWER is not set
+# CONFIG_USB_LCD is not set
+# CONFIG_USB_BERRY_CHARGE is not set
+# CONFIG_USB_LED is not set
+# CONFIG_USB_CYPRESS_CY7C63 is not set
+# CONFIG_USB_CYTHERM is not set
+# CONFIG_USB_PHIDGET is not set
+# CONFIG_USB_IDMOUSE is not set
+# CONFIG_USB_FTDI_ELAN is not set
+# CONFIG_USB_APPLEDISPLAY is not set
+# CONFIG_USB_SISUSBVGA is not set
+# CONFIG_USB_LD is not set
+# CONFIG_USB_TRANCEVIBRATOR is not set
+# CONFIG_USB_IOWARRIOR is not set
+CONFIG_USB_TEST=m
+# CONFIG_USB_ISIGHTFW is not set
+# CONFIG_USB_VST is not set
+# CONFIG_USB_GADGET is not set
+
+#
+# OTG and related infrastructure
+#
+# CONFIG_UWB is not set
+# CONFIG_MMC is not set
+# CONFIG_MEMSTICK is not set
+# CONFIG_NEW_LEDS is not set
+# CONFIG_ACCESSIBILITY is not set
+# CONFIG_INFINIBAND is not set
+CONFIG_RTC_LIB=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_HCTOSYS=y
+CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
+# CONFIG_RTC_DEBUG is not set
+
+#
+# RTC interfaces
+#
+CONFIG_RTC_INTF_SYSFS=y
+CONFIG_RTC_INTF_PROC=y
+CONFIG_RTC_INTF_DEV=y
+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
+# CONFIG_RTC_DRV_TEST is not set
+
+#
+# I2C RTC drivers
+#
+# CONFIG_RTC_DRV_DS1307 is not set
+# CONFIG_RTC_DRV_DS1374 is not set
+# CONFIG_RTC_DRV_DS1672 is not set
+# CONFIG_RTC_DRV_MAX6900 is not set
+CONFIG_RTC_DRV_RS5C372=y
+# CONFIG_RTC_DRV_ISL1208 is not set
+# CONFIG_RTC_DRV_X1205 is not set
+# CONFIG_RTC_DRV_PCF8563 is not set
+# CONFIG_RTC_DRV_PCF8583 is not set
+# CONFIG_RTC_DRV_M41T80 is not set
+# CONFIG_RTC_DRV_S35390A is not set
+# CONFIG_RTC_DRV_FM3130 is not set
+# CONFIG_RTC_DRV_RX8581 is not set
+
+#
+# SPI RTC drivers
+#
+
+#
+# Platform RTC drivers
+#
+# CONFIG_RTC_DRV_DS1286 is not set
+# CONFIG_RTC_DRV_DS1511 is not set
+# CONFIG_RTC_DRV_DS1553 is not set
+# CONFIG_RTC_DRV_DS1742 is not set
+# CONFIG_RTC_DRV_STK17TA8 is not set
+# CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_M48T35 is not set
+# CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_BQ4802 is not set
+# CONFIG_RTC_DRV_V3020 is not set
+
+#
+# on-CPU RTC drivers
+#
+# CONFIG_RTC_DRV_SH is not set
+# CONFIG_DMADEVICES is not set
+# CONFIG_UIO is not set
+# CONFIG_STAGING is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT2_FS_XIP is not set
+CONFIG_EXT3_FS=y
+CONFIG_EXT3_FS_XATTR=y
+# CONFIG_EXT3_FS_POSIX_ACL is not set
+# CONFIG_EXT3_FS_SECURITY is not set
+# CONFIG_EXT4_FS is not set
+CONFIG_JBD=y
+CONFIG_FS_MBCACHE=y
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+CONFIG_FS_POSIX_ACL=y
+CONFIG_FILE_LOCKING=y
+# CONFIG_XFS_FS is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_BTRFS_FS is not set
+CONFIG_DNOTIFY=y
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=y
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
+CONFIG_NTFS_FS=y
+# CONFIG_NTFS_DEBUG is not set
+CONFIG_NTFS_RW=y
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
+# CONFIG_HUGETLBFS is not set
+# CONFIG_HUGETLB_PAGE is not set
+# CONFIG_CONFIGFS_FS is not set
+CONFIG_MISC_FILESYSTEMS=y
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+# CONFIG_JFFS2_FS is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_SQUASHFS is not set
+# CONFIG_VXFS_FS is not set
+CONFIG_MINIX_FS=y
+# CONFIG_OMFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+CONFIG_NETWORK_FILESYSTEMS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+# CONFIG_NFS_V3_ACL is not set
+CONFIG_NFS_V4=y
+CONFIG_ROOT_NFS=y
+CONFIG_NFSD=y
+CONFIG_NFSD_V3=y
+# CONFIG_NFSD_V3_ACL is not set
+CONFIG_NFSD_V4=y
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_EXPORTFS=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+CONFIG_SUNRPC_GSS=y
+# CONFIG_SUNRPC_REGISTER_V4 is not set
+CONFIG_RPCSEC_GSS_KRB5=y
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="iso8859-1"
+CONFIG_NLS_CODEPAGE_437=y
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+CONFIG_NLS_CODEPAGE_932=y
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+# CONFIG_NLS_ASCII is not set
+CONFIG_NLS_ISO8859_1=y
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+# CONFIG_NLS_UTF8 is not set
+# CONFIG_DLM is not set
+
+#
+# Kernel hacking
+#
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+# CONFIG_PRINTK_TIME is not set
+# CONFIG_ENABLE_WARN_DEPRECATED is not set
+# CONFIG_ENABLE_MUST_CHECK is not set
+CONFIG_FRAME_WARN=1024
+# CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_DEBUG_SHIRQ is not set
+CONFIG_DETECT_SOFTLOCKUP=y
+# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
+CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
+CONFIG_SCHED_DEBUG=y
+# CONFIG_SCHEDSTATS is not set
+# CONFIG_TIMER_STATS is not set
+# CONFIG_DEBUG_OBJECTS is not set
+# CONFIG_DEBUG_SLAB is not set
+CONFIG_DEBUG_PREEMPT=y
+# CONFIG_DEBUG_RT_MUTEXES is not set
+# CONFIG_RT_MUTEX_TESTER is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+# CONFIG_DEBUG_MUTEXES is not set
+# CONFIG_DEBUG_LOCK_ALLOC is not set
+# CONFIG_PROVE_LOCKING is not set
+# CONFIG_LOCK_STAT is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+# CONFIG_DEBUG_KOBJECT is not set
+# CONFIG_DEBUG_BUGVERBOSE is not set
+# CONFIG_DEBUG_INFO is not set
+# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_WRITECOUNT is not set
+# CONFIG_DEBUG_MEMORY_INIT is not set
+# CONFIG_DEBUG_LIST is not set
+# CONFIG_DEBUG_SG is not set
+# CONFIG_DEBUG_NOTIFIERS is not set
+# CONFIG_FRAME_POINTER is not set
+# CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
+# CONFIG_BACKTRACE_SELF_TEST is not set
+# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_FAULT_INJECTION is not set
+# CONFIG_LATENCYTOP is not set
+CONFIG_SYSCTL_SYSCALL_CHECK=y
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_DYNAMIC_FTRACE=y
+CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+
+#
+# Tracers
+#
+# CONFIG_FUNCTION_TRACER is not set
+# CONFIG_IRQSOFF_TRACER is not set
+# CONFIG_PREEMPT_TRACER is not set
+# CONFIG_SCHED_TRACER is not set
+# CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_BOOT_TRACER is not set
+# CONFIG_TRACE_BRANCH_PROFILING is not set
+# CONFIG_STACK_TRACER is not set
+# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+# CONFIG_KGDB is not set
+# CONFIG_SH_STANDARD_BIOS is not set
+# CONFIG_EARLY_SCIF_CONSOLE is not set
+# CONFIG_DEBUG_BOOTMEM is not set
+# CONFIG_DEBUG_STACKOVERFLOW is not set
+# CONFIG_DEBUG_STACK_USAGE is not set
+# CONFIG_4KSTACKS is not set
+# CONFIG_IRQSTACKS is not set
+# CONFIG_DUMP_CODE is not set
+# CONFIG_SH_NO_BSS_INIT is not set
+# CONFIG_MORE_COMPILE_OPTIONS is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITYFS is not set
+# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+CONFIG_CRYPTO=y
+
+#
+# Crypto core or helper
+#
+# CONFIG_CRYPTO_FIPS is not set
+CONFIG_CRYPTO_ALGAPI=y
+CONFIG_CRYPTO_ALGAPI2=y
+CONFIG_CRYPTO_AEAD2=y
+CONFIG_CRYPTO_BLKCIPHER=y
+CONFIG_CRYPTO_BLKCIPHER2=y
+CONFIG_CRYPTO_HASH=y
+CONFIG_CRYPTO_HASH2=y
+CONFIG_CRYPTO_RNG2=y
+CONFIG_CRYPTO_MANAGER=y
+CONFIG_CRYPTO_MANAGER2=y
+# CONFIG_CRYPTO_GF128MUL is not set
+# CONFIG_CRYPTO_NULL is not set
+# CONFIG_CRYPTO_CRYPTD is not set
+# CONFIG_CRYPTO_AUTHENC is not set
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Authenticated Encryption with Associated Data
+#
+# CONFIG_CRYPTO_CCM is not set
+# CONFIG_CRYPTO_GCM is not set
+# CONFIG_CRYPTO_SEQIV is not set
+
+#
+# Block modes
+#
+CONFIG_CRYPTO_CBC=y
+# CONFIG_CRYPTO_CTR is not set
+# CONFIG_CRYPTO_CTS is not set
+# CONFIG_CRYPTO_ECB is not set
+# CONFIG_CRYPTO_LRW is not set
+# CONFIG_CRYPTO_PCBC is not set
+# CONFIG_CRYPTO_XTS is not set
+
+#
+# Hash modes
+#
+CONFIG_CRYPTO_HMAC=y
+# CONFIG_CRYPTO_XCBC is not set
+
+#
+# Digest
+#
+# CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_MD4 is not set
+CONFIG_CRYPTO_MD5=y
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_RMD128 is not set
+# CONFIG_CRYPTO_RMD160 is not set
+# CONFIG_CRYPTO_RMD256 is not set
+# CONFIG_CRYPTO_RMD320 is not set
+# CONFIG_CRYPTO_SHA1 is not set
+# CONFIG_CRYPTO_SHA256 is not set
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_WP512 is not set
+
+#
+# Ciphers
+#
+# CONFIG_CRYPTO_AES is not set
+# CONFIG_CRYPTO_ANUBIS is not set
+# CONFIG_CRYPTO_ARC4 is not set
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_CAMELLIA is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+CONFIG_CRYPTO_DES=y
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_SALSA20 is not set
+# CONFIG_CRYPTO_SEED is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_TEA is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+
+#
+# Compression
+#
+# CONFIG_CRYPTO_DEFLATE is not set
+# CONFIG_CRYPTO_LZO is not set
+
+#
+# Random Number Generation
+#
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
+# CONFIG_CRYPTO_HW is not set
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+CONFIG_GENERIC_FIND_LAST_BIT=y
+# CONFIG_CRC_CCITT is not set
+# CONFIG_CRC16 is not set
+# CONFIG_CRC_T10DIF is not set
+# CONFIG_CRC_ITU_T is not set
+CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
+# CONFIG_LIBCRC32C is not set
+CONFIG_PLIST=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
diff --git a/arch/sh/configs/urquell_defconfig b/arch/sh/configs/urquell_defconfig
new file mode 100644
index 000000000000..be726c7cdf91
--- /dev/null
+++ b/arch/sh/configs/urquell_defconfig
@@ -0,0 +1,1332 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.29-rc4
+# Thu Mar  5 17:28:13 2009
+#
+CONFIG_SUPERH=y
+CONFIG_SUPERH32=y
+CONFIG_ARCH_DEFCONFIG="arch/sh/configs/shx3_defconfig"
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_GENERIC_BUG=y
+CONFIG_GENERIC_FIND_NEXT_BIT=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_GENERIC_GPIO=y
+CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+# CONFIG_ARCH_SUSPEND_POSSIBLE is not set
+# CONFIG_ARCH_HIBERNATION_POSSIBLE is not set
+CONFIG_SYS_SUPPORTS_NUMA=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_HAVE_LATENCYTOP_SUPPORT=y
+# CONFIG_ARCH_HAS_ILOG2_U32 is not set
+# CONFIG_ARCH_HAS_ILOG2_U64 is not set
+CONFIG_ARCH_NO_VIRT_TO_BUS=y
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_LOCK_KERNEL=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+# CONFIG_POSIX_MQUEUE is not set
+CONFIG_BSD_PROCESS_ACCT=y
+# CONFIG_BSD_PROCESS_ACCT_V3 is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_AUDIT is not set
+
+#
+# RCU Subsystem
+#
+CONFIG_CLASSIC_RCU=y
+# CONFIG_TREE_RCU is not set
+# CONFIG_PREEMPT_RCU is not set
+# CONFIG_TREE_RCU_TRACE is not set
+# CONFIG_PREEMPT_RCU_TRACE is not set
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_LOG_BUF_SHIFT=14
+CONFIG_GROUP_SCHED=y
+CONFIG_FAIR_GROUP_SCHED=y
+# CONFIG_RT_GROUP_SCHED is not set
+CONFIG_USER_SCHED=y
+# CONFIG_CGROUP_SCHED is not set
+# CONFIG_CGROUPS is not set
+CONFIG_SYSFS_DEPRECATED=y
+CONFIG_SYSFS_DEPRECATED_V2=y
+# CONFIG_RELAY is not set
+# CONFIG_NAMESPACES is not set
+# CONFIG_BLK_DEV_INITRD is not set
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL=y
+CONFIG_EMBEDDED=y
+CONFIG_UID16=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_COMPAT_BRK=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_ANON_INODES=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_AIO=y
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_SLAB=y
+# CONFIG_SLUB is not set
+# CONFIG_SLOB is not set
+CONFIG_PROFILING=y
+# CONFIG_OPROFILE is not set
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_KPROBES is not set
+CONFIG_HAVE_IOREMAP_PROT=y
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+CONFIG_HAVE_ARCH_TRACEHOOK=y
+CONFIG_HAVE_CLK=y
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_BLOCK=y
+# CONFIG_LBD is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+# CONFIG_DEFAULT_AS is not set
+# CONFIG_DEFAULT_DEADLINE is not set
+CONFIG_DEFAULT_CFQ=y
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="cfq"
+# CONFIG_FREEZER is not set
+
+#
+# System type
+#
+CONFIG_CPU_SH4=y
+CONFIG_CPU_SH4A=y
+CONFIG_CPU_SHX3=y
+# CONFIG_CPU_SUBTYPE_SH7619 is not set
+# CONFIG_CPU_SUBTYPE_SH7201 is not set
+# CONFIG_CPU_SUBTYPE_SH7203 is not set
+# CONFIG_CPU_SUBTYPE_SH7206 is not set
+# CONFIG_CPU_SUBTYPE_SH7263 is not set
+# CONFIG_CPU_SUBTYPE_MXG is not set
+# CONFIG_CPU_SUBTYPE_SH7705 is not set
+# CONFIG_CPU_SUBTYPE_SH7706 is not set
+# CONFIG_CPU_SUBTYPE_SH7707 is not set
+# CONFIG_CPU_SUBTYPE_SH7708 is not set
+# CONFIG_CPU_SUBTYPE_SH7709 is not set
+# CONFIG_CPU_SUBTYPE_SH7710 is not set
+# CONFIG_CPU_SUBTYPE_SH7712 is not set
+# CONFIG_CPU_SUBTYPE_SH7720 is not set
+# CONFIG_CPU_SUBTYPE_SH7721 is not set
+# CONFIG_CPU_SUBTYPE_SH7750 is not set
+# CONFIG_CPU_SUBTYPE_SH7091 is not set
+# CONFIG_CPU_SUBTYPE_SH7750R is not set
+# CONFIG_CPU_SUBTYPE_SH7750S is not set
+# CONFIG_CPU_SUBTYPE_SH7751 is not set
+# CONFIG_CPU_SUBTYPE_SH7751R is not set
+# CONFIG_CPU_SUBTYPE_SH7760 is not set
+# CONFIG_CPU_SUBTYPE_SH4_202 is not set
+# CONFIG_CPU_SUBTYPE_SH7723 is not set
+# CONFIG_CPU_SUBTYPE_SH7763 is not set
+# CONFIG_CPU_SUBTYPE_SH7770 is not set
+# CONFIG_CPU_SUBTYPE_SH7780 is not set
+# CONFIG_CPU_SUBTYPE_SH7785 is not set
+CONFIG_CPU_SUBTYPE_SH7786=y
+# CONFIG_CPU_SUBTYPE_SHX3 is not set
+# CONFIG_CPU_SUBTYPE_SH7343 is not set
+# CONFIG_CPU_SUBTYPE_SH7722 is not set
+# CONFIG_CPU_SUBTYPE_SH7366 is not set
+# CONFIG_CPU_SUBTYPE_SH5_101 is not set
+# CONFIG_CPU_SUBTYPE_SH5_103 is not set
+
+#
+# Memory management options
+#
+CONFIG_QUICKLIST=y
+CONFIG_MMU=y
+CONFIG_PAGE_OFFSET=0x80000000
+CONFIG_MEMORY_START=0x08000000
+CONFIG_MEMORY_SIZE=0x08000000
+CONFIG_29BIT=y
+# CONFIG_X2TLB is not set
+CONFIG_VSYSCALL=y
+# CONFIG_NUMA is not set
+CONFIG_ARCH_FLATMEM_ENABLE=y
+CONFIG_ARCH_SPARSEMEM_ENABLE=y
+CONFIG_ARCH_SPARSEMEM_DEFAULT=y
+CONFIG_MAX_ACTIVE_REGIONS=1
+CONFIG_ARCH_POPULATES_NODE_MAP=y
+CONFIG_ARCH_SELECT_MEMORY_MODEL=y
+CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
+CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y
+CONFIG_PAGE_SIZE_4KB=y
+# CONFIG_PAGE_SIZE_8KB is not set
+# CONFIG_PAGE_SIZE_16KB is not set
+# CONFIG_PAGE_SIZE_64KB is not set
+CONFIG_ENTRY_OFFSET=0x00001000
+CONFIG_SELECT_MEMORY_MODEL=y
+# CONFIG_FLATMEM_MANUAL is not set
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+CONFIG_SPARSEMEM_MANUAL=y
+CONFIG_SPARSEMEM=y
+CONFIG_HAVE_MEMORY_PRESENT=y
+CONFIG_SPARSEMEM_STATIC=y
+# CONFIG_MEMORY_HOTPLUG is not set
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4
+CONFIG_MIGRATION=y
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=0
+CONFIG_NR_QUICK=2
+CONFIG_UNEVICTABLE_LRU=y
+
+#
+# Cache configuration
+#
+# CONFIG_SH_DIRECT_MAPPED is not set
+CONFIG_CACHE_WRITEBACK=y
+# CONFIG_CACHE_WRITETHROUGH is not set
+# CONFIG_CACHE_OFF is not set
+
+#
+# Processor features
+#
+CONFIG_CPU_LITTLE_ENDIAN=y
+# CONFIG_CPU_BIG_ENDIAN is not set
+CONFIG_SH_FPU=y
+CONFIG_SH_STORE_QUEUES=y
+CONFIG_CPU_HAS_INTEVT=y
+CONFIG_CPU_HAS_SR_RB=y
+CONFIG_CPU_HAS_FPU=y
+
+#
+# Board support
+#
+CONFIG_SH_URQUELL=y
+
+#
+# Timer and clock configuration
+#
+CONFIG_SH_TMU=y
+CONFIG_SH_TIMER_IRQ=16
+CONFIG_SH_PCLK_FREQ=33333333
+CONFIG_TICK_ONESHOT=y
+# CONFIG_NO_HZ is not set
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+
+#
+# CPU Frequency scaling
+#
+# CONFIG_CPU_FREQ is not set
+
+#
+# DMA support
+#
+# CONFIG_SH_DMA is not set
+
+#
+# Companion Chips
+#
+
+#
+# Additional SuperH Device Drivers
+#
+CONFIG_HEARTBEAT=y
+# CONFIG_PUSH_SWITCH is not set
+
+#
+# Kernel features
+#
+# CONFIG_HZ_100 is not set
+CONFIG_HZ_250=y
+# CONFIG_HZ_300 is not set
+# CONFIG_HZ_1000 is not set
+CONFIG_HZ=250
+CONFIG_SCHED_HRTICK=y
+CONFIG_KEXEC=y
+# CONFIG_CRASH_DUMP is not set
+# CONFIG_SECCOMP is not set
+# CONFIG_PREEMPT_NONE is not set
+# CONFIG_PREEMPT_VOLUNTARY is not set
+CONFIG_PREEMPT=y
+CONFIG_GUSA=y
+
+#
+# Boot options
+#
+CONFIG_ZERO_PAGE_OFFSET=0x00001000
+CONFIG_BOOT_LINK_OFFSET=0x00800000
+CONFIG_CMDLINE_BOOL=y
+CONFIG_CMDLINE="console=ttySC1, 38400 earlyprintk=serial ip=on ignore_loglevel root=/dev/nfs ip=dhcp memchunk.vpu=4m"
+
+#
+# Bus options
+#
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+# CONFIG_PCCARD is not set
+
+#
+# Executable file formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+# CONFIG_HAVE_AOUT is not set
+# CONFIG_BINFMT_MISC is not set
+
+#
+# Power management options (EXPERIMENTAL)
+#
+# CONFIG_PM is not set
+# CONFIG_CPU_IDLE is not set
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_COMPAT_NET_DEV_OPS=y
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+CONFIG_UNIX=y
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+# CONFIG_XFRM_SUB_POLICY is not set
+# CONFIG_XFRM_MIGRATE is not set
+# CONFIG_XFRM_STATISTICS is not set
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+CONFIG_IP_ADVANCED_ROUTER=y
+CONFIG_ASK_IP_FIB_HASH=y
+# CONFIG_IP_FIB_TRIE is not set
+CONFIG_IP_FIB_HASH=y
+# CONFIG_IP_MULTIPLE_TABLES is not set
+# CONFIG_IP_ROUTE_MULTIPATH is not set
+# CONFIG_IP_ROUTE_VERBOSE is not set
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+# CONFIG_IP_PNP_BOOTP is not set
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_ARPD is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+# CONFIG_INET_TUNNEL is not set
+CONFIG_INET_XFRM_MODE_TRANSPORT=y
+CONFIG_INET_XFRM_MODE_TUNNEL=y
+CONFIG_INET_XFRM_MODE_BEET=y
+# CONFIG_INET_LRO is not set
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+# CONFIG_IPV6 is not set
+# CONFIG_NETWORK_SECMARK is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_NET_DSA is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_SCHED is not set
+# CONFIG_DCB is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_AF_RXRPC is not set
+# CONFIG_PHONET is not set
+CONFIG_WIRELESS=y
+# CONFIG_CFG80211 is not set
+# CONFIG_WIRELESS_OLD_REGULATORY is not set
+CONFIG_WIRELESS_EXT=y
+CONFIG_WIRELESS_EXT_SYSFS=y
+# CONFIG_LIB80211 is not set
+# CONFIG_MAC80211 is not set
+# CONFIG_WIMAX is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+# CONFIG_FW_LOADER is not set
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_CONNECTOR is not set
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+CONFIG_MTD_CONCAT=y
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_TESTS is not set
+# CONFIG_MTD_REDBOOT_PARTS is not set
+# CONFIG_MTD_CMDLINE_PARTS is not set
+# CONFIG_MTD_AR7_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_MTD_OOPS is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=y
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_GEN_PROBE=y
+# CONFIG_MTD_CFI_ADV_OPTIONS is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+# CONFIG_MTD_CFI_INTELEXT is not set
+CONFIG_MTD_CFI_AMDSTD=y
+# CONFIG_MTD_CFI_STAA is not set
+CONFIG_MTD_CFI_UTIL=y
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+CONFIG_MTD_PHYSMAP=y
+# CONFIG_MTD_PHYSMAP_COMPAT is not set
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+# CONFIG_MTD_NAND is not set
+# CONFIG_MTD_ONENAND is not set
+
+#
+# LPDDR flash memory drivers
+#
+# CONFIG_MTD_LPDDR is not set
+# CONFIG_MTD_QINFO_PROBE is not set
+
+#
+# UBI - Unsorted block images
+#
+# CONFIG_MTD_UBI is not set
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_COW_COMMON is not set
+# CONFIG_BLK_DEV_LOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_UB is not set
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=16
+CONFIG_BLK_DEV_RAM_SIZE=4096
+# CONFIG_BLK_DEV_XIP is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+# CONFIG_BLK_DEV_HD is not set
+# CONFIG_MISC_DEVICES is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+CONFIG_SCSI=y
+CONFIG_SCSI_DMA=y
+# CONFIG_SCSI_TGT is not set
+# CONFIG_SCSI_NETLINK is not set
+CONFIG_SCSI_PROC_FS=y
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+# CONFIG_CHR_DEV_ST is not set
+# CONFIG_CHR_DEV_OSST is not set
+# CONFIG_BLK_DEV_SR is not set
+# CONFIG_CHR_DEV_SG is not set
+# CONFIG_CHR_DEV_SCH is not set
+
+#
+# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
+#
+# CONFIG_SCSI_MULTI_LUN is not set
+# CONFIG_SCSI_CONSTANTS is not set
+# CONFIG_SCSI_LOGGING is not set
+# CONFIG_SCSI_SCAN_ASYNC is not set
+CONFIG_SCSI_WAIT_SCAN=m
+
+#
+# SCSI Transports
+#
+# CONFIG_SCSI_SPI_ATTRS is not set
+# CONFIG_SCSI_FC_ATTRS is not set
+# CONFIG_SCSI_ISCSI_ATTRS is not set
+# CONFIG_SCSI_SAS_LIBSAS is not set
+# CONFIG_SCSI_SRP_ATTRS is not set
+# CONFIG_SCSI_LOWLEVEL is not set
+# CONFIG_SCSI_DH is not set
+CONFIG_ATA=y
+# CONFIG_ATA_NONSTANDARD is not set
+CONFIG_SATA_PMP=y
+CONFIG_ATA_SFF=y
+# CONFIG_SATA_MV is not set
+# CONFIG_PATA_PLATFORM is not set
+# CONFIG_MD is not set
+CONFIG_NETDEVICES=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_VETH is not set
+CONFIG_PHYLIB=y
+
+#
+# MII PHY device drivers
+#
+# CONFIG_MARVELL_PHY is not set
+# CONFIG_DAVICOM_PHY is not set
+# CONFIG_QSEMI_PHY is not set
+# CONFIG_LXT_PHY is not set
+# CONFIG_CICADA_PHY is not set
+# CONFIG_VITESSE_PHY is not set
+# CONFIG_SMSC_PHY is not set
+# CONFIG_BROADCOM_PHY is not set
+# CONFIG_ICPLUS_PHY is not set
+# CONFIG_REALTEK_PHY is not set
+# CONFIG_NATIONAL_PHY is not set
+# CONFIG_STE10XP is not set
+# CONFIG_LSI_ET1011C_PHY is not set
+# CONFIG_FIXED_PHY is not set
+# CONFIG_MDIO_BITBANG is not set
+CONFIG_NET_ETHERNET=y
+CONFIG_MII=y
+# CONFIG_AX88796 is not set
+# CONFIG_STNIC is not set
+CONFIG_SMC91X=y
+# CONFIG_SMC911X is not set
+# CONFIG_SMSC911X is not set
+# CONFIG_IBM_NEW_EMAC_ZMII is not set
+# CONFIG_IBM_NEW_EMAC_RGMII is not set
+# CONFIG_IBM_NEW_EMAC_TAH is not set
+# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
+# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
+# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
+# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
+# CONFIG_B44 is not set
+# CONFIG_NETDEV_1000 is not set
+# CONFIG_NETDEV_10000 is not set
+
+#
+# Wireless LAN
+#
+# CONFIG_WLAN_PRE80211 is not set
+# CONFIG_WLAN_80211 is not set
+# CONFIG_IWLWIFI_LEDS is not set
+
+#
+# Enable WiMAX (Networking options) to see the WiMAX drivers
+#
+
+#
+# USB Network Adapters
+#
+# CONFIG_USB_CATC is not set
+# CONFIG_USB_KAWETH is not set
+# CONFIG_USB_PEGASUS is not set
+# CONFIG_USB_RTL8150 is not set
+# CONFIG_USB_USBNET is not set
+# CONFIG_WAN is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_ISDN is not set
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+CONFIG_INPUT_FF_MEMLESS=m
+# CONFIG_INPUT_POLLDEV is not set
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+CONFIG_INPUT_KEYBOARD=y
+# CONFIG_KEYBOARD_ATKBD is not set
+# CONFIG_KEYBOARD_SUNKBD is not set
+# CONFIG_KEYBOARD_LKKBD is not set
+# CONFIG_KEYBOARD_XTKBD is not set
+# CONFIG_KEYBOARD_NEWTON is not set
+# CONFIG_KEYBOARD_STOWAWAY is not set
+# CONFIG_KEYBOARD_GPIO is not set
+# CONFIG_KEYBOARD_SH_KEYSC is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_CONSOLE_TRANSLATIONS=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+CONFIG_VT_HW_CONSOLE_BINDING=y
+CONFIG_DEVKMEM=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_SH_SCI=y
+CONFIG_SERIAL_SH_SCI_NR_UARTS=6
+CONFIG_SERIAL_SH_SCI_CONSOLE=y
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=256
+# CONFIG_IPMI_HANDLER is not set
+CONFIG_HW_RANDOM=y
+# CONFIG_R3964 is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+CONFIG_I2C=y
+CONFIG_I2C_BOARDINFO=y
+# CONFIG_I2C_CHARDEV is not set
+CONFIG_I2C_HELPER_AUTO=y
+CONFIG_I2C_ALGOPCA=y
+
+#
+# I2C Hardware Bus support
+#
+
+#
+# I2C system bus drivers (mostly embedded / system-on-chip)
+#
+# CONFIG_I2C_GPIO is not set
+# CONFIG_I2C_OCORES is not set
+# CONFIG_I2C_SH_MOBILE is not set
+# CONFIG_I2C_SIMTEC is not set
+
+#
+# External I2C/SMBus adapter drivers
+#
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_TAOS_EVM is not set
+# CONFIG_I2C_TINY_USB is not set
+
+#
+# Other I2C/SMBus bus drivers
+#
+CONFIG_I2C_PCA_PLATFORM=y
+# CONFIG_I2C_STUB is not set
+
+#
+# Miscellaneous I2C Chip support
+#
+# CONFIG_DS1682 is not set
+# CONFIG_SENSORS_PCF8574 is not set
+# CONFIG_PCF8575 is not set
+# CONFIG_SENSORS_PCA9539 is not set
+# CONFIG_SENSORS_PCF8591 is not set
+# CONFIG_SENSORS_MAX6875 is not set
+# CONFIG_SENSORS_TSL2550 is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# CONFIG_I2C_DEBUG_CHIP is not set
+# CONFIG_SPI is not set
+CONFIG_ARCH_REQUIRE_GPIOLIB=y
+CONFIG_GPIOLIB=y
+# CONFIG_GPIO_SYSFS is not set
+
+#
+# Memory mapped GPIO expanders:
+#
+
+#
+# I2C GPIO expanders:
+#
+# CONFIG_GPIO_MAX732X is not set
+# CONFIG_GPIO_PCA953X is not set
+# CONFIG_GPIO_PCF857X is not set
+
+#
+# PCI GPIO expanders:
+#
+
+#
+# SPI GPIO expanders:
+#
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+# CONFIG_THERMAL is not set
+# CONFIG_THERMAL_HWMON is not set
+# CONFIG_WATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
+
+#
+# Sonics Silicon Backplane
+#
+# CONFIG_SSB is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_CORE is not set
+CONFIG_MFD_SM501=y
+# CONFIG_MFD_SM501_GPIO is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_TPS65010 is not set
+# CONFIG_TWL4030_CORE is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_PMIC_DA903X is not set
+# CONFIG_MFD_WM8400 is not set
+# CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_PCF50633 is not set
+# CONFIG_REGULATOR is not set
+
+#
+# Multimedia devices
+#
+
+#
+# Multimedia core support
+#
+# CONFIG_VIDEO_DEV is not set
+# CONFIG_DVB_CORE is not set
+# CONFIG_VIDEO_MEDIA is not set
+
+#
+# Multimedia drivers
+#
+# CONFIG_DAB is not set
+
+#
+# Graphics support
+#
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+CONFIG_FB=y
+# CONFIG_FIRMWARE_EDID is not set
+# CONFIG_FB_DDC is not set
+# CONFIG_FB_BOOT_VESA_SUPPORT is not set
+CONFIG_FB_CFB_FILLRECT=y
+CONFIG_FB_CFB_COPYAREA=y
+CONFIG_FB_CFB_IMAGEBLIT=y
+# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
+CONFIG_FB_SYS_FILLRECT=m
+CONFIG_FB_SYS_COPYAREA=m
+CONFIG_FB_SYS_IMAGEBLIT=m
+# CONFIG_FB_FOREIGN_ENDIAN is not set
+CONFIG_FB_SYS_FOPS=m
+CONFIG_FB_DEFERRED_IO=y
+# CONFIG_FB_SVGALIB is not set
+# CONFIG_FB_MACMODES is not set
+# CONFIG_FB_BACKLIGHT is not set
+# CONFIG_FB_MODE_HELPERS is not set
+# CONFIG_FB_TILEBLITTING is not set
+
+#
+# Frame buffer hardware drivers
+#
+# CONFIG_FB_S1D13XXX is not set
+CONFIG_FB_SH_MOBILE_LCDC=m
+CONFIG_FB_SM501=y
+# CONFIG_FB_VIRTUAL is not set
+# CONFIG_FB_METRONOME is not set
+# CONFIG_FB_MB862XX is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+
+#
+# Console display driver support
+#
+CONFIG_DUMMY_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE=y
+# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
+# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
+# CONFIG_FONTS is not set
+CONFIG_FONT_8x8=y
+CONFIG_FONT_8x16=y
+CONFIG_LOGO=y
+# CONFIG_LOGO_LINUX_MONO is not set
+# CONFIG_LOGO_LINUX_VGA16 is not set
+CONFIG_LOGO_LINUX_CLUT224=y
+# CONFIG_LOGO_SUPERH_MONO is not set
+# CONFIG_LOGO_SUPERH_VGA16 is not set
+# CONFIG_LOGO_SUPERH_CLUT224 is not set
+# CONFIG_SOUND is not set
+CONFIG_HID_SUPPORT=y
+CONFIG_HID=y
+# CONFIG_HID_DEBUG is not set
+# CONFIG_HIDRAW is not set
+
+#
+# USB Input Devices
+#
+CONFIG_USB_HID=y
+# CONFIG_HID_PID is not set
+# CONFIG_USB_HIDDEV is not set
+
+#
+# Special HID drivers
+#
+CONFIG_HID_COMPAT=y
+CONFIG_HID_A4TECH=y
+CONFIG_HID_APPLE=y
+CONFIG_HID_BELKIN=y
+CONFIG_HID_CHERRY=y
+CONFIG_HID_CHICONY=y
+CONFIG_HID_CYPRESS=y
+CONFIG_HID_EZKEY=y
+CONFIG_HID_GYRATION=y
+CONFIG_HID_LOGITECH=y
+# CONFIG_LOGITECH_FF is not set
+# CONFIG_LOGIRUMBLEPAD2_FF is not set
+CONFIG_HID_MICROSOFT=y
+CONFIG_HID_MONTEREY=y
+# CONFIG_HID_NTRIG is not set
+CONFIG_HID_PANTHERLORD=y
+# CONFIG_PANTHERLORD_FF is not set
+CONFIG_HID_PETALYNX=y
+CONFIG_HID_SAMSUNG=y
+CONFIG_HID_SONY=y
+CONFIG_HID_SUNPLUS=y
+# CONFIG_GREENASIA_FF is not set
+# CONFIG_HID_TOPSEED is not set
+CONFIG_THRUSTMASTER_FF=m
+CONFIG_ZEROPLUS_FF=m
+CONFIG_USB_SUPPORT=y
+CONFIG_USB_ARCH_HAS_HCD=y
+# CONFIG_USB_ARCH_HAS_OHCI is not set
+# CONFIG_USB_ARCH_HAS_EHCI is not set
+CONFIG_USB=y
+# CONFIG_USB_DEBUG is not set
+CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
+
+#
+# Miscellaneous USB options
+#
+CONFIG_USB_DEVICEFS=y
+CONFIG_USB_DEVICE_CLASS=y
+# CONFIG_USB_DYNAMIC_MINORS is not set
+# CONFIG_USB_OTG is not set
+# CONFIG_USB_OTG_WHITELIST is not set
+# CONFIG_USB_OTG_BLACKLIST_HUB is not set
+CONFIG_USB_MON=y
+# CONFIG_USB_WUSB is not set
+# CONFIG_USB_WUSB_CBAF is not set
+
+#
+# USB Host Controller Drivers
+#
+# CONFIG_USB_C67X00_HCD is not set
+# CONFIG_USB_OXU210HP_HCD is not set
+# CONFIG_USB_ISP116X_HCD is not set
+# CONFIG_USB_SL811_HCD is not set
+# CONFIG_USB_R8A66597_HCD is not set
+# CONFIG_USB_HWA_HCD is not set
+
+#
+# USB Device Class drivers
+#
+# CONFIG_USB_ACM is not set
+# CONFIG_USB_PRINTER is not set
+# CONFIG_USB_WDM is not set
+# CONFIG_USB_TMC is not set
+
+#
+# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed;
+#
+
+#
+# see USB_STORAGE Help for more information
+#
+CONFIG_USB_STORAGE=y
+# CONFIG_USB_STORAGE_DEBUG is not set
+# CONFIG_USB_STORAGE_DATAFAB is not set
+# CONFIG_USB_STORAGE_FREECOM is not set
+# CONFIG_USB_STORAGE_ISD200 is not set
+# CONFIG_USB_STORAGE_USBAT is not set
+# CONFIG_USB_STORAGE_SDDR09 is not set
+# CONFIG_USB_STORAGE_SDDR55 is not set
+# CONFIG_USB_STORAGE_JUMPSHOT is not set
+# CONFIG_USB_STORAGE_ALAUDA is not set
+# CONFIG_USB_STORAGE_ONETOUCH is not set
+# CONFIG_USB_STORAGE_KARMA is not set
+# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
+# CONFIG_USB_LIBUSUAL is not set
+
+#
+# USB Imaging devices
+#
+# CONFIG_USB_MDC800 is not set
+# CONFIG_USB_MICROTEK is not set
+
+#
+# USB port drivers
+#
+# CONFIG_USB_SERIAL is not set
+
+#
+# USB Miscellaneous drivers
+#
+# CONFIG_USB_EMI62 is not set
+# CONFIG_USB_EMI26 is not set
+# CONFIG_USB_ADUTUX is not set
+# CONFIG_USB_SEVSEG is not set
+# CONFIG_USB_RIO500 is not set
+# CONFIG_USB_LEGOTOWER is not set
+# CONFIG_USB_LCD is not set
+# CONFIG_USB_BERRY_CHARGE is not set
+# CONFIG_USB_LED is not set
+# CONFIG_USB_CYPRESS_CY7C63 is not set
+# CONFIG_USB_CYTHERM is not set
+# CONFIG_USB_PHIDGET is not set
+# CONFIG_USB_IDMOUSE is not set
+# CONFIG_USB_FTDI_ELAN is not set
+# CONFIG_USB_APPLEDISPLAY is not set
+# CONFIG_USB_LD is not set
+# CONFIG_USB_TRANCEVIBRATOR is not set
+# CONFIG_USB_IOWARRIOR is not set
+# CONFIG_USB_TEST is not set
+# CONFIG_USB_ISIGHTFW is not set
+# CONFIG_USB_VST is not set
+# CONFIG_USB_GADGET is not set
+
+#
+# OTG and related infrastructure
+#
+# CONFIG_USB_GPIO_VBUS is not set
+# CONFIG_MMC is not set
+# CONFIG_MEMSTICK is not set
+# CONFIG_NEW_LEDS is not set
+# CONFIG_ACCESSIBILITY is not set
+# CONFIG_RTC_CLASS is not set
+# CONFIG_DMADEVICES is not set
+# CONFIG_UIO is not set
+# CONFIG_STAGING is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT2_FS_XIP is not set
+CONFIG_EXT3_FS=y
+CONFIG_EXT3_FS_XATTR=y
+# CONFIG_EXT3_FS_POSIX_ACL is not set
+# CONFIG_EXT3_FS_SECURITY is not set
+# CONFIG_EXT4_FS is not set
+CONFIG_JBD=y
+CONFIG_FS_MBCACHE=y
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+CONFIG_FS_POSIX_ACL=y
+CONFIG_FILE_LOCKING=y
+# CONFIG_XFS_FS is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_BTRFS_FS is not set
+CONFIG_DNOTIFY=y
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=y
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
+CONFIG_NTFS_FS=y
+# CONFIG_NTFS_DEBUG is not set
+CONFIG_NTFS_RW=y
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
+# CONFIG_HUGETLBFS is not set
+# CONFIG_HUGETLB_PAGE is not set
+# CONFIG_CONFIGFS_FS is not set
+CONFIG_MISC_FILESYSTEMS=y
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+# CONFIG_JFFS2_FS is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_SQUASHFS is not set
+# CONFIG_VXFS_FS is not set
+CONFIG_MINIX_FS=y
+# CONFIG_OMFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+CONFIG_NETWORK_FILESYSTEMS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+# CONFIG_NFS_V3_ACL is not set
+CONFIG_NFS_V4=y
+CONFIG_ROOT_NFS=y
+CONFIG_NFSD=y
+CONFIG_NFSD_V3=y
+# CONFIG_NFSD_V3_ACL is not set
+CONFIG_NFSD_V4=y
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_EXPORTFS=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+CONFIG_SUNRPC_GSS=y
+# CONFIG_SUNRPC_REGISTER_V4 is not set
+CONFIG_RPCSEC_GSS_KRB5=y
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="iso8859-1"
+CONFIG_NLS_CODEPAGE_437=y
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+CONFIG_NLS_CODEPAGE_932=y
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+# CONFIG_NLS_ASCII is not set
+CONFIG_NLS_ISO8859_1=y
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+# CONFIG_NLS_UTF8 is not set
+# CONFIG_DLM is not set
+
+#
+# Kernel hacking
+#
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+# CONFIG_PRINTK_TIME is not set
+# CONFIG_ENABLE_WARN_DEPRECATED is not set
+# CONFIG_ENABLE_MUST_CHECK is not set
+CONFIG_FRAME_WARN=1024
+# CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
+# CONFIG_DEBUG_KERNEL is not set
+# CONFIG_DEBUG_BUGVERBOSE is not set
+# CONFIG_DEBUG_MEMORY_INIT is not set
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
+# CONFIG_LATENCYTOP is not set
+CONFIG_SYSCTL_SYSCALL_CHECK=y
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_DYNAMIC_FTRACE=y
+CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+
+#
+# Tracers
+#
+# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+# CONFIG_SH_STANDARD_BIOS is not set
+# CONFIG_EARLY_SCIF_CONSOLE is not set
+# CONFIG_MORE_COMPILE_OPTIONS is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITYFS is not set
+# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+CONFIG_CRYPTO=y
+
+#
+# Crypto core or helper
+#
+# CONFIG_CRYPTO_FIPS is not set
+CONFIG_CRYPTO_ALGAPI=y
+CONFIG_CRYPTO_ALGAPI2=y
+CONFIG_CRYPTO_AEAD2=y
+CONFIG_CRYPTO_BLKCIPHER=y
+CONFIG_CRYPTO_BLKCIPHER2=y
+CONFIG_CRYPTO_HASH=y
+CONFIG_CRYPTO_HASH2=y
+CONFIG_CRYPTO_RNG2=y
+CONFIG_CRYPTO_MANAGER=y
+CONFIG_CRYPTO_MANAGER2=y
+# CONFIG_CRYPTO_GF128MUL is not set
+# CONFIG_CRYPTO_NULL is not set
+# CONFIG_CRYPTO_CRYPTD is not set
+# CONFIG_CRYPTO_AUTHENC is not set
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Authenticated Encryption with Associated Data
+#
+# CONFIG_CRYPTO_CCM is not set
+# CONFIG_CRYPTO_GCM is not set
+# CONFIG_CRYPTO_SEQIV is not set
+
+#
+# Block modes
+#
+CONFIG_CRYPTO_CBC=y
+# CONFIG_CRYPTO_CTR is not set
+# CONFIG_CRYPTO_CTS is not set
+# CONFIG_CRYPTO_ECB is not set
+# CONFIG_CRYPTO_LRW is not set
+# CONFIG_CRYPTO_PCBC is not set
+# CONFIG_CRYPTO_XTS is not set
+
+#
+# Hash modes
+#
+CONFIG_CRYPTO_HMAC=y
+# CONFIG_CRYPTO_XCBC is not set
+
+#
+# Digest
+#
+# CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_MD4 is not set
+CONFIG_CRYPTO_MD5=y
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_RMD128 is not set
+# CONFIG_CRYPTO_RMD160 is not set
+# CONFIG_CRYPTO_RMD256 is not set
+# CONFIG_CRYPTO_RMD320 is not set
+# CONFIG_CRYPTO_SHA1 is not set
+# CONFIG_CRYPTO_SHA256 is not set
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_WP512 is not set
+
+#
+# Ciphers
+#
+# CONFIG_CRYPTO_AES is not set
+# CONFIG_CRYPTO_ANUBIS is not set
+# CONFIG_CRYPTO_ARC4 is not set
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_CAMELLIA is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+CONFIG_CRYPTO_DES=y
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_SALSA20 is not set
+# CONFIG_CRYPTO_SEED is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_TEA is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+
+#
+# Compression
+#
+# CONFIG_CRYPTO_DEFLATE is not set
+# CONFIG_CRYPTO_LZO is not set
+
+#
+# Random Number Generation
+#
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
+# CONFIG_CRYPTO_HW is not set
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+CONFIG_GENERIC_FIND_LAST_BIT=y
+# CONFIG_CRC_CCITT is not set
+# CONFIG_CRC16 is not set
+# CONFIG_CRC_T10DIF is not set
+# CONFIG_CRC_ITU_T is not set
+CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
+# CONFIG_LIBCRC32C is not set
+CONFIG_PLIST=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
diff --git a/arch/sh/drivers/dma/Kconfig b/arch/sh/drivers/dma/Kconfig
index 01936368b8b0..f13a05285a9d 100644
--- a/arch/sh/drivers/dma/Kconfig
+++ b/arch/sh/drivers/dma/Kconfig
@@ -9,13 +9,21 @@ config SH_DMA
         select SH_DMA_API
         default n
 
+config SH_DMA_IRQ_MULTI
+        bool
+        depends on SH_DMA
+        default y if CPU_SUBTYPE_SH7750 || CPU_SUBTYPE_SH7751 || \
+                CPU_SUBTYPE_SH7750S || CPU_SUBTYPE_SH7750R || CPU_SUBTYPE_SH7751R || \
+                CPU_SUBTYPE_SH7091 || CPU_SUBTYPE_SH7763 || CPU_SUBTYPE_SH7764 || \
+                CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7785
+
 config NR_ONCHIP_DMA_CHANNELS
         int
         depends on SH_DMA
-        default "6" if CPU_SUBTYPE_SH7720 || CPU_SUBTYPE_SH7721
-        default "8" if CPU_SUBTYPE_SH7750R || CPU_SUBTYPE_SH7751R
-        default "12" if CPU_SUBTYPE_SH7780
-        default "4"
+        default "4" if CPU_SUBTYPE_SH7750 || CPU_SUBTYPE_SH7751 || CPU_SUBTYPE_SH7750S
+        default "8" if CPU_SUBTYPE_SH7750R || CPU_SUBTYPE_SH7751R || CPU_SUBTYPE_SH7760
+        default "12" if CPU_SUBTYPE_SH7723 || CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7785
+        default "6"
         help
           This allows you to specify the number of channels that the on-chip
           DMAC supports. This will be 4 for SH7750/SH7751 and 8 for the
@@ -46,4 +54,28 @@ config SH_DMABRG
           of the SH7760.
           Say Y if you want to use Audio/USB DMA on your SH7760 board.
 
+config PVR2_DMA
+        tristate "PowerVR 2 DMAC support"
+        depends on SH_DREAMCAST && SH_DMA
+        help
+          Selecting this will enable support for the PVR2 DMA controller.
+          As this chains off of the on-chip DMAC, that must also be
+          enabled by default.
+
+          This is primarily used by the pvr2fb framebuffer driver for
+          certain optimizations, but is not necessary for functionality.
+
+          If in doubt, say N.
+
+config G2_DMA
+        tristate "G2 Bus DMA support"
+        depends on SH_DREAMCAST
+        select SH_DMA_API
+        help
+          This enables support for the DMA controller for the Dreamcast's
+          G2 bus. Drivers that want this will generally enable this on
+          their own.
+
+          If in doubt, say N.
+
 endmenu
diff --git a/arch/sh/drivers/dma/Makefile b/arch/sh/drivers/dma/Makefile
index ab956adacb47..c6068137b46f 100644
--- a/arch/sh/drivers/dma/Makefile
+++ b/arch/sh/drivers/dma/Makefile
@@ -4,5 +4,6 @@
 
 obj-$(CONFIG_SH_DMA_API)        += dma-api.o dma-sysfs.o
 obj-$(CONFIG_SH_DMA)            += dma-sh.o
-obj-$(CONFIG_SH_DREAMCAST)      += dma-pvr2.o dma-g2.o
+obj-$(CONFIG_PVR2_DMA)          += dma-pvr2.o
+obj-$(CONFIG_G2_DMA)            += dma-g2.o
 obj-$(CONFIG_SH_DMABRG)         += dmabrg.o
diff --git a/arch/sh/drivers/dma/dma-sh.c b/arch/sh/drivers/dma/dma-sh.c
index 50887a592dd0..37fb5b8bbc3f 100644
--- a/arch/sh/drivers/dma/dma-sh.c
+++ b/arch/sh/drivers/dma/dma-sh.c
@@ -17,28 +17,16 @@
 #include <mach-dreamcast/mach/dma.h>
 #include <asm/dma.h>
 #include <asm/io.h>
-#include "dma-sh.h"
-
-static int dmte_irq_map[] = {
-        DMTE0_IRQ,
-        DMTE1_IRQ,
-        DMTE2_IRQ,
-        DMTE3_IRQ,
-#if defined(CONFIG_CPU_SUBTYPE_SH7720)  ||      \
-    defined(CONFIG_CPU_SUBTYPE_SH7721)  ||      \
-    defined(CONFIG_CPU_SUBTYPE_SH7751R) ||      \
-    defined(CONFIG_CPU_SUBTYPE_SH7760)  ||      \
-    defined(CONFIG_CPU_SUBTYPE_SH7709)  ||      \
-    defined(CONFIG_CPU_SUBTYPE_SH7780)
-        DMTE4_IRQ,
-        DMTE5_IRQ,
-#endif
-#if defined(CONFIG_CPU_SUBTYPE_SH7751R) ||      \
-    defined(CONFIG_CPU_SUBTYPE_SH7760)  ||      \
-    defined(CONFIG_CPU_SUBTYPE_SH7780)
-        DMTE6_IRQ,
-        DMTE7_IRQ,
+#include <asm/dma-sh.h>
+
+#if defined(DMAE1_IRQ)
+#define NR_DMAE         2
+#else
+#define NR_DMAE         1
 #endif
+
+static const char *dmae_name[] = {
+        "DMAC Address Error0", "DMAC Address Error1"
 };
 
 static inline unsigned int get_dmte_irq(unsigned int chan)
@@ -46,7 +34,14 @@ static inline unsigned int get_dmte_irq(unsigned int chan)
         unsigned int irq = 0;
         if (chan < ARRAY_SIZE(dmte_irq_map))
                 irq = dmte_irq_map[chan];
+
+#if defined(CONFIG_SH_DMA_IRQ_MULTI)
+        if (irq > DMTE6_IRQ)
+                return DMTE6_IRQ;
+        return DMTE0_IRQ;
+#else
         return irq;
+#endif
 }
 
 /*
@@ -59,7 +54,7 @@ static inline unsigned int get_dmte_irq(unsigned int chan)
  */
 static inline unsigned int calc_xmit_shift(struct dma_channel *chan)
 {
-        u32 chcr = ctrl_inl(CHCR[chan->chan]);
+        u32 chcr = ctrl_inl(dma_base_addr[chan->chan] + CHCR);
 
         return ts_shift[(chcr & CHCR_TS_MASK)>>CHCR_TS_SHIFT];
 }
@@ -75,13 +70,13 @@ static irqreturn_t dma_tei(int irq, void *dev_id)
         struct dma_channel *chan = dev_id;
         u32 chcr;
 
-        chcr = ctrl_inl(CHCR[chan->chan]);
+        chcr = ctrl_inl(dma_base_addr[chan->chan] + CHCR);
 
         if (!(chcr & CHCR_TE))
                 return IRQ_NONE;
 
         chcr &= ~(CHCR_IE | CHCR_DE);
-        ctrl_outl(chcr, CHCR[chan->chan]);
+        ctrl_outl(chcr, (dma_base_addr[chan->chan] + CHCR));
 
         wake_up(&chan->wait_queue);
 
@@ -94,7 +89,12 @@ static int sh_dmac_request_dma(struct dma_channel *chan)
                 return 0;
 
         return request_irq(get_dmte_irq(chan->chan), dma_tei,
-                           IRQF_DISABLED, chan->dev_id, chan);
+#if defined(CONFIG_SH_DMA_IRQ_MULTI)
+                                IRQF_SHARED,
+#else
+                                IRQF_DISABLED,
+#endif
+                                chan->dev_id, chan);
 }
 
 static void sh_dmac_free_dma(struct dma_channel *chan)
@@ -115,7 +115,7 @@ sh_dmac_configure_channel(struct dma_channel *chan, unsigned long chcr)
                 chan->flags &= ~DMA_TEI_CAPABLE;
         }
 
-        ctrl_outl(chcr, CHCR[chan->chan]);
+        ctrl_outl(chcr, (dma_base_addr[chan->chan] + CHCR));
 
         chan->flags |= DMA_CONFIGURED;
         return 0;
@@ -126,13 +126,13 @@ static void sh_dmac_enable_dma(struct dma_channel *chan)
         int irq;
         u32 chcr;
 
-        chcr = ctrl_inl(CHCR[chan->chan]);
+        chcr = ctrl_inl(dma_base_addr[chan->chan] + CHCR);
         chcr |= CHCR_DE;
 
         if (chan->flags & DMA_TEI_CAPABLE)
                 chcr |= CHCR_IE;
 
-        ctrl_outl(chcr, CHCR[chan->chan]);
+        ctrl_outl(chcr, (dma_base_addr[chan->chan] + CHCR));
 
         if (chan->flags & DMA_TEI_CAPABLE) {
                 irq = get_dmte_irq(chan->chan);
@@ -150,9 +150,9 @@ static void sh_dmac_disable_dma(struct dma_channel *chan)
                 disable_irq(irq);
         }
 
-        chcr = ctrl_inl(CHCR[chan->chan]);
+        chcr = ctrl_inl(dma_base_addr[chan->chan] + CHCR);
         chcr &= ~(CHCR_DE | CHCR_TE | CHCR_IE);
-        ctrl_outl(chcr, CHCR[chan->chan]);
+        ctrl_outl(chcr, (dma_base_addr[chan->chan] + CHCR));
 }
 
 static int sh_dmac_xfer_dma(struct dma_channel *chan)
@@ -183,12 +183,13 @@ static int sh_dmac_xfer_dma(struct dma_channel *chan)
          */
         if (chan->sar || (mach_is_dreamcast() &&
                           chan->chan == PVR2_CASCADE_CHAN))
-                ctrl_outl(chan->sar, SAR[chan->chan]);
+                ctrl_outl(chan->sar, (dma_base_addr[chan->chan]+SAR));
         if (chan->dar || (mach_is_dreamcast() &&
                           chan->chan == PVR2_CASCADE_CHAN))
-                ctrl_outl(chan->dar, DAR[chan->chan]);
+                ctrl_outl(chan->dar, (dma_base_addr[chan->chan] + DAR));
 
-        ctrl_outl(chan->count >> calc_xmit_shift(chan), DMATCR[chan->chan]);
+        ctrl_outl(chan->count >> calc_xmit_shift(chan),
+                (dma_base_addr[chan->chan] + TCR));
 
         sh_dmac_enable_dma(chan);
 
@@ -197,36 +198,26 @@ static int sh_dmac_xfer_dma(struct dma_channel *chan)
 
 static int sh_dmac_get_dma_residue(struct dma_channel *chan)
 {
-        if (!(ctrl_inl(CHCR[chan->chan]) & CHCR_DE))
+        if (!(ctrl_inl(dma_base_addr[chan->chan] + CHCR) & CHCR_DE))
                 return 0;
 
-        return ctrl_inl(DMATCR[chan->chan]) << calc_xmit_shift(chan);
+        return ctrl_inl(dma_base_addr[chan->chan] + TCR)
+                 << calc_xmit_shift(chan);
 }
 
-#if defined(CONFIG_CPU_SUBTYPE_SH7720) || \
-    defined(CONFIG_CPU_SUBTYPE_SH7721) || \
-    defined(CONFIG_CPU_SUBTYPE_SH7780) || \
-    defined(CONFIG_CPU_SUBTYPE_SH7709)
-#define dmaor_read_reg()        ctrl_inw(DMAOR)
-#define dmaor_write_reg(data)   ctrl_outw(data, DMAOR)
-#else
-#define dmaor_read_reg()        ctrl_inl(DMAOR)
-#define dmaor_write_reg(data)   ctrl_outl(data, DMAOR)
-#endif
-
-static inline int dmaor_reset(void)
+static inline int dmaor_reset(int no)
 {
-        unsigned long dmaor = dmaor_read_reg();
+        unsigned long dmaor = dmaor_read_reg(no);
 
         /* Try to clear the error flags first, incase they are set */
         dmaor &= ~(DMAOR_NMIF | DMAOR_AE);
-        dmaor_write_reg(dmaor);
+        dmaor_write_reg(no, dmaor);
 
         dmaor |= DMAOR_INIT;
-        dmaor_write_reg(dmaor);
+        dmaor_write_reg(no, dmaor);
 
         /* See if we got an error again */
-        if ((dmaor_read_reg() & (DMAOR_AE | DMAOR_NMIF))) {
+        if ((dmaor_read_reg(no) & (DMAOR_AE | DMAOR_NMIF))) {
                 printk(KERN_ERR "dma-sh: Can't initialize DMAOR.\n");
                 return -EINVAL;
         }
@@ -237,10 +228,33 @@ static inline int dmaor_reset(void)
 #if defined(CONFIG_CPU_SH4)
 static irqreturn_t dma_err(int irq, void *dummy)
 {
-        dmaor_reset();
+#if defined(CONFIG_SH_DMA_IRQ_MULTI)
+        int cnt = 0;
+        switch (irq) {
+#if defined(DMTE6_IRQ) && defined(DMAE1_IRQ)
+        case DMTE6_IRQ:
+                cnt++;
+#endif
+        case DMTE0_IRQ:
+                if (dmaor_read_reg(cnt) & (DMAOR_NMIF | DMAOR_AE)) {
+                        disable_irq(irq);
+                        /* DMA multi and error IRQ */
+                        return IRQ_HANDLED;
+                }
+        default:
+                return IRQ_NONE;
+        }
+#else
+        dmaor_reset(0);
+#if defined(CONFIG_CPU_SUBTYPE_SH7723)  || \
+                defined(CONFIG_CPU_SUBTYPE_SH7780)      || \
+                defined(CONFIG_CPU_SUBTYPE_SH7785)
+        dmaor_reset(1);
+#endif
         disable_irq(irq);
 
         return IRQ_HANDLED;
+#endif
 }
 #endif
 
@@ -259,24 +273,59 @@ static struct dma_info sh_dmac_info = {
         .flags          = DMAC_CHANNELS_TEI_CAPABLE,
 };
 
+#ifdef CONFIG_CPU_SH4
+static unsigned int get_dma_error_irq(int n)
+{
+#if defined(CONFIG_SH_DMA_IRQ_MULTI)
+        return (n == 0) ? get_dmte_irq(0) : get_dmte_irq(6);
+#else
+        return (n == 0) ? DMAE0_IRQ :
+#if defined(DMAE1_IRQ)
+                                DMAE1_IRQ;
+#else
+                                -1;
+#endif
+#endif
+}
+#endif
+
 static int __init sh_dmac_init(void)
 {
         struct dma_info *info = &sh_dmac_info;
         int i;
 
 #ifdef CONFIG_CPU_SH4
-        i = request_irq(DMAE_IRQ, dma_err, IRQF_DISABLED, "DMAC Address Error", 0);
-        if (unlikely(i < 0))
-                return i;
+        int n;
+
+        for (n = 0; n < NR_DMAE; n++) {
+                i = request_irq(get_dma_error_irq(n), dma_err,
+#if defined(CONFIG_SH_DMA_IRQ_MULTI)
+                                IRQF_SHARED,
+#else
+                                IRQF_DISABLED,
 #endif
+                                dmae_name[n], (void *)dmae_name[n]);
+                if (unlikely(i < 0)) {
+                        printk(KERN_ERR "%s request_irq fail\n", dmae_name[n]);
+                        return i;
+                }
+        }
+#endif /* CONFIG_CPU_SH4 */
 
         /*
          * Initialize DMAOR, and clean up any error flags that may have
          * been set.
          */
-        i = dmaor_reset();
+        i = dmaor_reset(0);
+        if (unlikely(i != 0))
+                return i;
+#if defined(CONFIG_CPU_SUBTYPE_SH7723)  || \
+                defined(CONFIG_CPU_SUBTYPE_SH7780)      || \
+                defined(CONFIG_CPU_SUBTYPE_SH7785)
+        i = dmaor_reset(1);
         if (unlikely(i != 0))
                 return i;
+#endif
 
         return register_dmac(info);
 }
@@ -284,8 +333,12 @@ static int __init sh_dmac_init(void)
 static void __exit sh_dmac_exit(void)
 {
 #ifdef CONFIG_CPU_SH4
-        free_irq(DMAE_IRQ, 0);
-#endif
+        int n;
+
+        for (n = 0; n < NR_DMAE; n++) {
+                free_irq(get_dma_error_irq(n), (void *)dmae_name[n]);
+        }
+#endif /* CONFIG_CPU_SH4 */
         unregister_dmac(&sh_dmac_info);
 }
 
diff --git a/arch/sh/drivers/dma/dma-sh.h b/arch/sh/drivers/dma/dma-sh.h
deleted file mode 100644
index 05fecd5428e4..000000000000
--- a/arch/sh/drivers/dma/dma-sh.h
+++ /dev/null
@@ -1,75 +0,0 @@
-/*
- * arch/sh/drivers/dma/dma-sh.h
- *
- * Copyright (C) 2000  Takashi YOSHII
- * Copyright (C) 2003  Paul Mundt
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-#ifndef __DMA_SH_H
-#define __DMA_SH_H
-
-#include <cpu/dma.h>
-
-/* Definitions for the SuperH DMAC */
-#define REQ_L   0x00000000
-#define REQ_E   0x00080000
-#define RACK_H  0x00000000
-#define RACK_L  0x00040000
-#define ACK_R   0x00000000
-#define ACK_W   0x00020000
-#define ACK_H   0x00000000
-#define ACK_L   0x00010000
-#define DM_INC  0x00004000
-#define DM_DEC  0x00008000
-#define SM_INC  0x00001000
-#define SM_DEC  0x00002000
-#define RS_IN   0x00000200
-#define RS_OUT  0x00000300
-#define TS_BLK  0x00000040
-#define TM_BUR  0x00000020
-#define CHCR_DE 0x00000001
-#define CHCR_TE 0x00000002
-#define CHCR_IE 0x00000004
-
-/* DMAOR definitions */
-#define DMAOR_AE        0x00000004
-#define DMAOR_NMIF      0x00000002
-#define DMAOR_DME       0x00000001
-
-/*
- * Define the default configuration for dual address memory-memory transfer.
- * The 0x400 value represents auto-request, external->external.
- */
-#define RS_DUAL (DM_INC | SM_INC | 0x400 | TS_32)
-
-#define MAX_DMAC_CHANNELS       (CONFIG_NR_ONCHIP_DMA_CHANNELS)
-
-/*
- * Subtypes that have fewer channels than this simply need to change
- * CONFIG_NR_ONCHIP_DMA_CHANNELS. Likewise, subtypes with a larger number
- * of channels should expand on this.
- *
- * For most subtypes we can easily figure these values out with some
- * basic calculation, unfortunately on other subtypes these are more
- * scattered, so we just leave it unrolled for simplicity.
- */
-#define SAR     ((unsigned long[]){SH_DMAC_BASE + 0x00, SH_DMAC_BASE + 0x10, \
-                                   SH_DMAC_BASE + 0x20, SH_DMAC_BASE + 0x30, \
-                                   SH_DMAC_BASE + 0x50, SH_DMAC_BASE + 0x60})
-#define DAR     ((unsigned long[]){SH_DMAC_BASE + 0x04, SH_DMAC_BASE + 0x14, \
-                                   SH_DMAC_BASE + 0x24, SH_DMAC_BASE + 0x34, \
-                                   SH_DMAC_BASE + 0x54, SH_DMAC_BASE + 0x64})
-#define DMATCR  ((unsigned long[]){SH_DMAC_BASE + 0x08, SH_DMAC_BASE + 0x18, \
-                                   SH_DMAC_BASE + 0x28, SH_DMAC_BASE + 0x38, \
-                                   SH_DMAC_BASE + 0x58, SH_DMAC_BASE + 0x68})
-#define CHCR    ((unsigned long[]){SH_DMAC_BASE + 0x0c, SH_DMAC_BASE + 0x1c, \
-                                   SH_DMAC_BASE + 0x2c, SH_DMAC_BASE + 0x3c, \
-                                   SH_DMAC_BASE + 0x5c, SH_DMAC_BASE + 0x6c})
-
-#define DMAOR   (SH_DMAC_BASE + 0x40)
-
-#endif /* __DMA_SH_H */
-
diff --git a/arch/sh/drivers/pci/pci-sh7780.c b/arch/sh/drivers/pci/pci-sh7780.c
index 078dc44d6b08..773d575a04b9 100644
--- a/arch/sh/drivers/pci/pci-sh7780.c
+++ b/arch/sh/drivers/pci/pci-sh7780.c
@@ -127,8 +127,8 @@ int __init sh7780_pcic_init(struct sh4_pci_address_map *map)
         pci_write_reg(word, SH4_PCILSR0);
         pci_write_reg(0x00000001, SH4_PCILSR1);
         /* Set the values on window 0 PCI config registers */
-        word = (CONFIG_MEMORY_SIZE > 0x08000000) ? 0x10000000 : 0x08000000;
-        pci_write_reg(word | 0xa0000000, SH4_PCILAR0);
+        word = CONFIG_MEMORY_START | (CONFIG_MEMORY_SIZE - 0x01000000);
+        pci_write_reg(word, SH4_PCILAR0);
         pci_write_reg(word, SH7780_PCIMBAR0);
         /* Set the values on window 1 PCI config registers */
         pci_write_reg(0x00000000, SH4_PCILAR1);
diff --git a/arch/sh/include/asm/addrspace.h b/arch/sh/include/asm/addrspace.h
index 36736c7e93db..80d40813e057 100644
--- a/arch/sh/include/asm/addrspace.h
+++ b/arch/sh/include/asm/addrspace.h
@@ -31,7 +31,7 @@
 /* Returns the physical address of a PnSEG (n=1,2) address   */
 #define PHYSADDR(a)     (((unsigned long)(a)) & 0x1fffffff)
 
-#ifdef CONFIG_29BIT
+#if defined(CONFIG_29BIT) || defined(CONFIG_PMB_FIXED)
 /*
  * Map an address to a certain privileged segment
  */
@@ -43,7 +43,7 @@
         ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P3SEG))
 #define P4SEGADDR(a)    \
         ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P4SEG))
-#endif /* 29BIT */
+#endif /* 29BIT || PMB_FIXED */
 #endif /* P1SEG */
 
 /* Check if an address can be reached in 29 bits */
diff --git a/arch/sh/include/asm/atomic-irq.h b/arch/sh/include/asm/atomic-irq.h
index 74f7943cff6f..a0b348068cae 100644
--- a/arch/sh/include/asm/atomic-irq.h
+++ b/arch/sh/include/asm/atomic-irq.h
@@ -11,7 +11,7 @@ static inline void atomic_add(int i, atomic_t *v)
         unsigned long flags;
 
         local_irq_save(flags);
-        *(long *)v += i;
+        v->counter += i;
         local_irq_restore(flags);
 }
 
@@ -20,7 +20,7 @@ static inline void atomic_sub(int i, atomic_t *v)
         unsigned long flags;
 
         local_irq_save(flags);
-        *(long *)v -= i;
+        v->counter -= i;
         local_irq_restore(flags);
 }
 
@@ -29,9 +29,9 @@ static inline int atomic_add_return(int i, atomic_t *v)
         unsigned long temp, flags;
 
         local_irq_save(flags);
-        temp = *(long *)v;
+        temp = v->counter;
         temp += i;
-        *(long *)v = temp;
+        v->counter = temp;
         local_irq_restore(flags);
 
         return temp;
@@ -42,9 +42,9 @@ static inline int atomic_sub_return(int i, atomic_t *v)
         unsigned long temp, flags;
 
         local_irq_save(flags);
-        temp = *(long *)v;
+        temp = v->counter;
         temp -= i;
-        *(long *)v = temp;
+        v->counter = temp;
         local_irq_restore(flags);
 
         return temp;
@@ -55,7 +55,7 @@ static inline void atomic_clear_mask(unsigned int mask, atomic_t *v)
         unsigned long flags;
 
         local_irq_save(flags);
-        *(long *)v &= ~mask;
+        v->counter &= ~mask;
         local_irq_restore(flags);
 }
 
@@ -64,7 +64,7 @@ static inline void atomic_set_mask(unsigned int mask, atomic_t *v)
         unsigned long flags;
 
         local_irq_save(flags);
-        *(long *)v |= mask;
+        v->counter |= mask;
         local_irq_restore(flags);
 }
 
diff --git a/arch/sh/include/asm/bitops-llsc.h b/arch/sh/include/asm/bitops-llsc.h
index 1d2fc0b010ad..d8328be06191 100644
--- a/arch/sh/include/asm/bitops-llsc.h
+++ b/arch/sh/include/asm/bitops-llsc.h
@@ -1,7 +1,7 @@
 #ifndef __ASM_SH_BITOPS_LLSC_H
 #define __ASM_SH_BITOPS_LLSC_H
 
-static inline void set_bit(int nr, volatile void * addr)
+static inline void set_bit(int nr, volatile void *addr)
 {
         int     mask;
         volatile unsigned int *a = addr;
@@ -13,16 +13,16 @@ static inline void set_bit(int nr, volatile void * addr)
         __asm__ __volatile__ (
                 "1:                                             \n\t"
                 "movli.l        @%1, %0 ! set_bit               \n\t"
-                "or             %3, %0                          \n\t"
+                "or             %2, %0                          \n\t"
                 "movco.l        %0, @%1                         \n\t"
                 "bf             1b                              \n\t"
-                : "=&z" (tmp), "=r" (a)
-                : "1" (a), "r" (mask)
+                : "=&z" (tmp)
+                : "r" (a), "r" (mask)
                 : "t", "memory"
         );
 }
 
-static inline void clear_bit(int nr, volatile void * addr)
+static inline void clear_bit(int nr, volatile void *addr)
 {
         int     mask;
         volatile unsigned int *a = addr;
@@ -34,16 +34,16 @@ static inline void clear_bit(int nr, volatile void * addr)
         __asm__ __volatile__ (
                 "1:                                             \n\t"
                 "movli.l        @%1, %0 ! clear_bit             \n\t"
-                "and            %3, %0                          \n\t"
+                "and            %2, %0                          \n\t"
                 "movco.l        %0, @%1                         \n\t"
                 "bf             1b                              \n\t"
-                : "=&z" (tmp), "=r" (a)
-                : "1" (a), "r" (~mask)
+                : "=&z" (tmp)
+                : "r" (a), "r" (~mask)
                 : "t", "memory"
         );
 }
 
-static inline void change_bit(int nr, volatile void * addr)
+static inline void change_bit(int nr, volatile void *addr)
 {
         int     mask;
         volatile unsigned int *a = addr;
@@ -55,16 +55,16 @@ static inline void change_bit(int nr, volatile void * addr)
         __asm__ __volatile__ (
                 "1:                                             \n\t"
                 "movli.l        @%1, %0 ! change_bit            \n\t"
-                "xor            %3, %0                          \n\t"
+                "xor            %2, %0                          \n\t"
                 "movco.l        %0, @%1                         \n\t"
                 "bf             1b                              \n\t"
-                : "=&z" (tmp), "=r" (a)
-                : "1" (a), "r" (mask)
+                : "=&z" (tmp)
+                : "r" (a), "r" (mask)
                 : "t", "memory"
         );
 }
 
-static inline int test_and_set_bit(int nr, volatile void * addr)
+static inline int test_and_set_bit(int nr, volatile void *addr)
 {
         int     mask, retval;
         volatile unsigned int *a = addr;
@@ -75,21 +75,21 @@ static inline int test_and_set_bit(int nr, volatile void * addr)
 
         __asm__ __volatile__ (
                 "1:                                             \n\t"
-                "movli.l        @%1, %0 ! test_and_set_bit      \n\t"
-                "mov            %0, %2                          \n\t"
-                "or             %4, %0                          \n\t"
-                "movco.l        %0, @%1                         \n\t"
+                "movli.l        @%2, %0 ! test_and_set_bit      \n\t"
+                "mov            %0, %1                          \n\t"
+                "or             %3, %0                          \n\t"
+                "movco.l        %0, @%2                         \n\t"
                 "bf             1b                              \n\t"
-                "and            %4, %2                          \n\t"
-                : "=&z" (tmp), "=r" (a), "=&r" (retval)
-                : "1" (a), "r" (mask)
+                "and            %3, %1                          \n\t"
+                : "=&z" (tmp), "=&r" (retval)
+                : "r" (a), "r" (mask)
                 : "t", "memory"
         );
 
         return retval != 0;
 }
 
-static inline int test_and_clear_bit(int nr, volatile void * addr)
+static inline int test_and_clear_bit(int nr, volatile void *addr)
 {
         int     mask, retval;
         volatile unsigned int *a = addr;
@@ -100,22 +100,22 @@ static inline int test_and_clear_bit(int nr, volatile void * addr)
 
         __asm__ __volatile__ (
                 "1:                                             \n\t"
-                "movli.l        @%1, %0 ! test_and_clear_bit    \n\t"
-                "mov            %0, %2                          \n\t"
-                "and            %5, %0                          \n\t"
-                "movco.l        %0, @%1                         \n\t"
+                "movli.l        @%2, %0 ! test_and_clear_bit    \n\t"
+                "mov            %0, %1                          \n\t"
+                "and            %4, %0                          \n\t"
+                "movco.l        %0, @%2                         \n\t"
                 "bf             1b                              \n\t"
-                "and            %4, %2                          \n\t"
+                "and            %3, %1                          \n\t"
                 "synco                                          \n\t"
-                : "=&z" (tmp), "=r" (a), "=&r" (retval)
-                : "1" (a), "r" (mask), "r" (~mask)
+                : "=&z" (tmp), "=&r" (retval)
+                : "r" (a), "r" (mask), "r" (~mask)
                 : "t", "memory"
         );
 
         return retval != 0;
 }
 
-static inline int test_and_change_bit(int nr, volatile void * addr)
+static inline int test_and_change_bit(int nr, volatile void *addr)
 {
         int     mask, retval;
         volatile unsigned int *a = addr;
@@ -126,15 +126,15 @@ static inline int test_and_change_bit(int nr, volatile void * addr)
 
         __asm__ __volatile__ (
                 "1:                                             \n\t"
-                "movli.l        @%1, %0 ! test_and_change_bit   \n\t"
-                "mov            %0, %2                          \n\t"
-                "xor            %4, %0                          \n\t"
-                "movco.l        %0, @%1                         \n\t"
+                "movli.l        @%2, %0 ! test_and_change_bit   \n\t"
+                "mov            %0, %1                          \n\t"
+                "xor            %3, %0                          \n\t"
+                "movco.l        %0, @%2                         \n\t"
                 "bf             1b                              \n\t"
-                "and            %4, %2                          \n\t"
+                "and            %3, %1                          \n\t"
                 "synco                                          \n\t"
-                : "=&z" (tmp), "=r" (a), "=&r" (retval)
-                : "1" (a), "r" (mask)
+                : "=&z" (tmp), "=&r" (retval)
+                : "r" (a), "r" (mask)
                 : "t", "memory"
         );
 
diff --git a/arch/sh/include/asm/clock.h b/arch/sh/include/asm/clock.h
index f9c88583d90a..2f6c9627bc1f 100644
--- a/arch/sh/include/asm/clock.h
+++ b/arch/sh/include/asm/clock.h
@@ -15,6 +15,7 @@ struct clk_ops {
         void (*disable)(struct clk *clk);
         void (*recalc)(struct clk *clk);
         int (*set_rate)(struct clk *clk, unsigned long rate, int algo_id);
+        int (*set_parent)(struct clk *clk, struct clk *parent);
         long (*round_rate)(struct clk *clk, unsigned long rate);
 };
 
diff --git a/arch/sh/include/asm/cmpxchg-llsc.h b/arch/sh/include/asm/cmpxchg-llsc.h
index aee3bf286581..0fac3da536ca 100644
--- a/arch/sh/include/asm/cmpxchg-llsc.h
+++ b/arch/sh/include/asm/cmpxchg-llsc.h
@@ -8,14 +8,14 @@ static inline unsigned long xchg_u32(volatile u32 *m, unsigned long val)
 
         __asm__ __volatile__ (
                 "1:                                     \n\t"
-                "movli.l        @%1, %0 ! xchg_u32      \n\t"
-                "mov            %0, %2                  \n\t"
-                "mov            %4, %0                  \n\t"
-                "movco.l        %0, @%1                 \n\t"
+                "movli.l        @%2, %0 ! xchg_u32      \n\t"
+                "mov            %0, %1                  \n\t"
+                "mov            %3, %0                  \n\t"
+                "movco.l        %0, @%2                 \n\t"
                 "bf             1b                      \n\t"
                 "synco                                  \n\t"
-                : "=&z"(tmp), "=r" (m), "=&r" (retval)
-                : "1" (m), "r" (val)
+                : "=&z"(tmp), "=&r" (retval)
+                : "r" (m), "r" (val)
                 : "t", "memory"
         );
 
@@ -29,14 +29,14 @@ static inline unsigned long xchg_u8(volatile u8 *m, unsigned long val)
 
         __asm__ __volatile__ (
                 "1:                                     \n\t"
-                "movli.l        @%1, %0 ! xchg_u8       \n\t"
-                "mov            %0, %2                  \n\t"
-                "mov            %4, %0                  \n\t"
-                "movco.l        %0, @%1                 \n\t"
+                "movli.l        @%2, %0 ! xchg_u8       \n\t"
+                "mov            %0, %1                  \n\t"
+                "mov            %3, %0                  \n\t"
+                "movco.l        %0, @%2                 \n\t"
                 "bf             1b                      \n\t"
                 "synco                                  \n\t"
-                : "=&z"(tmp), "=r" (m), "=&r" (retval)
-                : "1" (m), "r" (val & 0xff)
+                : "=&z"(tmp), "=&r" (retval)
+                : "r" (m), "r" (val & 0xff)
                 : "t", "memory"
         );
 
@@ -51,17 +51,17 @@ __cmpxchg_u32(volatile int *m, unsigned long old, unsigned long new)
 
         __asm__ __volatile__ (
                 "1:                                             \n\t"
-                "movli.l        @%1, %0 ! __cmpxchg_u32         \n\t"
-                "mov            %0, %2                          \n\t"
-                "cmp/eq         %2, %4                          \n\t"
+                "movli.l        @%2, %0 ! __cmpxchg_u32         \n\t"
+                "mov            %0, %1                          \n\t"
+                "cmp/eq         %1, %3                          \n\t"
                 "bf             2f                              \n\t"
-                "mov            %5, %0                          \n\t"
+                "mov            %3, %0                          \n\t"
                 "2:                                             \n\t"
-                "movco.l        %0, @%1                         \n\t"
+                "movco.l        %0, @%2                         \n\t"
                 "bf             1b                              \n\t"
                 "synco                                          \n\t"
-                : "=&z" (tmp), "=r" (m), "=&r" (retval)
-                : "1" (m), "r" (old), "r" (new)
+                : "=&z" (tmp), "=&r" (retval)
+                : "r" (m), "r" (old), "r" (new)
                 : "t", "memory"
         );
 
diff --git a/arch/sh/include/asm/cpu-features.h b/arch/sh/include/asm/cpu-features.h
index 86308aa39731..694abe490edb 100644
--- a/arch/sh/include/asm/cpu-features.h
+++ b/arch/sh/include/asm/cpu-features.h
@@ -21,5 +21,6 @@
 #define CPU_HAS_LLSC            0x0040  /* movli.l/movco.l */
 #define CPU_HAS_L2_CACHE        0x0080  /* Secondary cache / URAM */
 #define CPU_HAS_OP32            0x0100  /* 32-bit instruction support */
+#define CPU_HAS_PTEAEX          0x0200  /* PTE ASID Extension support */
 
 #endif /* __ASM_SH_CPU_FEATURES_H */
diff --git a/arch/sh/include/asm/dma-sh.h b/arch/sh/include/asm/dma-sh.h
new file mode 100644
index 000000000000..0c8f8e14622a
--- /dev/null
+++ b/arch/sh/include/asm/dma-sh.h
@@ -0,0 +1,118 @@
+/*
+ * arch/sh/include/asm/dma-sh.h
+ *
+ * Copyright (C) 2000  Takashi YOSHII
+ * Copyright (C) 2003  Paul Mundt
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#ifndef __DMA_SH_H
+#define __DMA_SH_H
+
+#include <asm/dma.h>
+#include <cpu/dma.h>
+
+/* DMAOR contorl: The DMAOR access size is different by CPU.*/
+#if defined(CONFIG_CPU_SUBTYPE_SH7723)  || \
+    defined(CONFIG_CPU_SUBTYPE_SH7780)  || \
+    defined(CONFIG_CPU_SUBTYPE_SH7785)
+#define dmaor_read_reg(n) \
+    (n ? ctrl_inw(SH_DMAC_BASE1 + DMAOR) \
+        : ctrl_inw(SH_DMAC_BASE0 + DMAOR))
+#define dmaor_write_reg(n, data) \
+    (n ? ctrl_outw(data, SH_DMAC_BASE1 + DMAOR) \
+    : ctrl_outw(data, SH_DMAC_BASE0 + DMAOR))
+#else /* Other CPU */
+#define dmaor_read_reg(n) ctrl_inw(SH_DMAC_BASE0 + DMAOR)
+#define dmaor_write_reg(n, data) ctrl_outw(data, SH_DMAC_BASE0 + DMAOR)
+#endif
+
+static int dmte_irq_map[] __maybe_unused = {
+#if (MAX_DMA_CHANNELS >= 4)
+    DMTE0_IRQ,
+    DMTE0_IRQ + 1,
+    DMTE0_IRQ + 2,
+    DMTE0_IRQ + 3,
+#endif
+#if (MAX_DMA_CHANNELS >= 6)
+    DMTE4_IRQ,
+    DMTE4_IRQ + 1,
+#endif
+#if (MAX_DMA_CHANNELS >= 8)
+    DMTE6_IRQ,
+    DMTE6_IRQ + 1,
+#endif
+#if (MAX_DMA_CHANNELS >= 12)
+    DMTE8_IRQ,
+    DMTE9_IRQ,
+    DMTE10_IRQ,
+    DMTE11_IRQ,
+#endif
+};
+
+/* Definitions for the SuperH DMAC */
+#define REQ_L   0x00000000
+#define REQ_E   0x00080000
+#define RACK_H  0x00000000
+#define RACK_L  0x00040000
+#define ACK_R   0x00000000
+#define ACK_W   0x00020000
+#define ACK_H   0x00000000
+#define ACK_L   0x00010000
+#define DM_INC  0x00004000
+#define DM_DEC  0x00008000
+#define SM_INC  0x00001000
+#define SM_DEC  0x00002000
+#define RS_IN   0x00000200
+#define RS_OUT  0x00000300
+#define TS_BLK  0x00000040
+#define TM_BUR  0x00000020
+#define CHCR_DE 0x00000001
+#define CHCR_TE 0x00000002
+#define CHCR_IE 0x00000004
+
+/* DMAOR definitions */
+#define DMAOR_AE        0x00000004
+#define DMAOR_NMIF      0x00000002
+#define DMAOR_DME       0x00000001
+
+/*
+ * Define the default configuration for dual address memory-memory transfer.
+ * The 0x400 value represents auto-request, external->external.
+ */
+#define RS_DUAL (DM_INC | SM_INC | 0x400 | TS_32)
+
+/* DMA base address */
+static u32 dma_base_addr[] __maybe_unused = {
+#if (MAX_DMA_CHANNELS >= 4)
+        SH_DMAC_BASE0 + 0x00,   /* channel 0 */
+        SH_DMAC_BASE0 + 0x10,
+        SH_DMAC_BASE0 + 0x20,
+        SH_DMAC_BASE0 + 0x30,
+#endif
+#if (MAX_DMA_CHANNELS >= 6)
+        SH_DMAC_BASE0 + 0x50,
+        SH_DMAC_BASE0 + 0x60,
+#endif
+#if (MAX_DMA_CHANNELS >= 8)
+        SH_DMAC_BASE1 + 0x00,
+        SH_DMAC_BASE1 + 0x10,
+#endif
+#if (MAX_DMA_CHANNELS >= 12)
+        SH_DMAC_BASE1 + 0x20,
+        SH_DMAC_BASE1 + 0x30,
+        SH_DMAC_BASE1 + 0x50,
+        SH_DMAC_BASE1 + 0x60, /* channel 11 */
+#endif
+};
+
+/* DMA register */
+#define SAR     0x00
+#define DAR     0x04
+#define TCR     0x08
+#define CHCR    0x0C
+#define DMAOR   0x40
+
+#endif /* __DMA_SH_H */
diff --git a/arch/sh/include/asm/dma.h b/arch/sh/include/asm/dma.h
index beca7128e2ab..6bd178473878 100644
--- a/arch/sh/include/asm/dma.h
+++ b/arch/sh/include/asm/dma.h
@@ -25,9 +25,9 @@
 #define MAX_DMA_ADDRESS         (PAGE_OFFSET+0x10000000)
 
 #ifdef CONFIG_NR_DMA_CHANNELS
-#  define MAX_DMA_CHANNELS      (CONFIG_NR_DMA_CHANNELS)
+#  define MAX_DMA_CHANNELS   (CONFIG_NR_DMA_CHANNELS)
 #else
-#  define MAX_DMA_CHANNELS      (CONFIG_NR_ONCHIP_DMA_CHANNELS)
+#  define MAX_DMA_CHANNELS   (CONFIG_NR_ONCHIP_DMA_CHANNELS)
 #endif
 
 /*
diff --git a/arch/sh/include/asm/entry-macros.S b/arch/sh/include/asm/entry-macros.S
index 2dab0b8d9454..3a4752a65722 100644
--- a/arch/sh/include/asm/entry-macros.S
+++ b/arch/sh/include/asm/entry-macros.S
@@ -31,3 +31,8 @@
 #endif  
         .endm
 
+#if defined(CONFIG_CPU_SH2A) || defined(CONFIG_CPU_SH4)
+# define PREF(x)        pref    @x
+#else
+# define PREF(x)        nop
+#endif
diff --git a/arch/sh/include/asm/gpio.h b/arch/sh/include/asm/gpio.h
index 90673658eb14..61f93da2c62e 100644
--- a/arch/sh/include/asm/gpio.h
+++ b/arch/sh/include/asm/gpio.h
@@ -19,8 +19,42 @@
 #include <cpu/gpio.h>
 #endif
 
+#define ARCH_NR_GPIOS 512
+#include <asm-generic/gpio.h>
+
+#ifdef CONFIG_GPIOLIB
+
+static inline int gpio_get_value(unsigned gpio)
+{
+        return __gpio_get_value(gpio);
+}
+
+static inline void gpio_set_value(unsigned gpio, int value)
+{
+        __gpio_set_value(gpio, value);
+}
+
+static inline int gpio_cansleep(unsigned gpio)
+{
+        return __gpio_cansleep(gpio);
+}
+
+static inline int gpio_to_irq(unsigned gpio)
+{
+        WARN_ON(1);
+        return -ENOSYS;
+}
+
+static inline int irq_to_gpio(unsigned int irq)
+{
+        WARN_ON(1);
+        return -EINVAL;
+}
+
+#endif /* CONFIG_GPIOLIB */
+
 typedef unsigned short pinmux_enum_t;
-typedef unsigned char pinmux_flag_t;
+typedef unsigned short pinmux_flag_t;
 
 #define PINMUX_TYPE_NONE            0
 #define PINMUX_TYPE_FUNCTION        1
@@ -34,6 +68,11 @@ typedef unsigned char pinmux_flag_t;
 #define PINMUX_FLAG_WANT_PULLUP     (1 << 3)
 #define PINMUX_FLAG_WANT_PULLDOWN   (1 << 4)
 
+#define PINMUX_FLAG_DBIT_SHIFT      5
+#define PINMUX_FLAG_DBIT            (0x1f << PINMUX_FLAG_DBIT_SHIFT)
+#define PINMUX_FLAG_DREG_SHIFT      10
+#define PINMUX_FLAG_DREG            (0x3f << PINMUX_FLAG_DREG_SHIFT)
+
 struct pinmux_gpio {
         pinmux_enum_t enum_id;
         pinmux_flag_t flags;
@@ -54,7 +93,7 @@ struct pinmux_cfg_reg {
         .enum_ids = (pinmux_enum_t [(r_width / f_width) * (1 << f_width)]) \
 
 struct pinmux_data_reg {
-        unsigned long reg, reg_width;
+        unsigned long reg, reg_width, reg_shadow;
         pinmux_enum_t *enum_ids;
 };
 
@@ -89,34 +128,9 @@ struct pinmux_info {
         unsigned int gpio_data_size;
 
         unsigned long *gpio_in_use;
+        struct gpio_chip chip;
 };
 
 int register_pinmux(struct pinmux_info *pip);
 
-int __gpio_request(unsigned gpio);
-static inline int gpio_request(unsigned gpio, const char *label)
-{
-        return __gpio_request(gpio);
-}
-void gpio_free(unsigned gpio);
-int gpio_direction_input(unsigned gpio);
-int gpio_direction_output(unsigned gpio, int value);
-int gpio_get_value(unsigned gpio);
-void gpio_set_value(unsigned gpio, int value);
-
-/* IRQ modes are unspported */
-static inline int gpio_to_irq(unsigned gpio)
-{
-        WARN_ON(1);
-        return -EINVAL;
-}
-
-static inline int irq_to_gpio(unsigned irq)
-{
-        WARN_ON(1);
-        return -EINVAL;
-}
-
-#include <asm-generic/gpio.h>
-
 #endif /* __ASM_SH_GPIO_H */
diff --git a/arch/sh/include/asm/hd64461.h b/arch/sh/include/asm/hd64461.h
index 8c1353baf00f..52b4b6238277 100644
--- a/arch/sh/include/asm/hd64461.h
+++ b/arch/sh/include/asm/hd64461.h
@@ -242,7 +242,6 @@
 #include <asm/io_generic.h>
 
 /* arch/sh/cchips/hd6446x/hd64461/setup.c */
-int hd64461_irq_demux(int irq);
 void hd64461_register_irq_demux(int irq,
                                 int (*demux) (int irq, void *dev), void *dev);
 void hd64461_unregister_irq_demux(int irq);
diff --git a/arch/sh/include/asm/io.h b/arch/sh/include/asm/io.h
index 61f6dae40534..0454f8d68059 100644
--- a/arch/sh/include/asm/io.h
+++ b/arch/sh/include/asm/io.h
@@ -238,7 +238,7 @@ extern void onchip_unmap(unsigned long vaddr);
 static inline void __iomem *
 __ioremap_mode(unsigned long offset, unsigned long size, unsigned long flags)
 {
-#ifdef CONFIG_SUPERH32
+#if defined(CONFIG_SUPERH32) && !defined(CONFIG_PMB_FIXED)
         unsigned long last_addr = offset + size - 1;
 #endif
         void __iomem *ret;
@@ -247,7 +247,7 @@ __ioremap_mode(unsigned long offset, unsigned long size, unsigned long flags)
         if (ret)
                 return ret;
 
-#ifdef CONFIG_SUPERH32
+#if defined(CONFIG_SUPERH32) && !defined(CONFIG_PMB_FIXED)
         /*
          * For P1 and P2 space this is trivial, as everything is already
          * mapped. Uncached access for P1 addresses are done through P2.
diff --git a/arch/sh/include/asm/kprobes.h b/arch/sh/include/asm/kprobes.h
index 6078d8e551d4..613644a758e8 100644
--- a/arch/sh/include/asm/kprobes.h
+++ b/arch/sh/include/asm/kprobes.h
@@ -16,7 +16,7 @@ typedef u16 kprobe_opcode_t;
         ? (MAX_STACK_SIZE) \
         : (((unsigned long)current_thread_info()) + THREAD_SIZE - (ADDR)))
 
-#define regs_return_value(regs)         ((regs)->regs[0])
+#define regs_return_value(_regs)                ((_regs)->regs[0])
 #define flush_insn_slot(p)              do { } while (0)
 #define kretprobe_blacklist_size        0
 
diff --git a/arch/sh/include/asm/mmu_context.h b/arch/sh/include/asm/mmu_context.h
index 5d9157bd474d..2a9c55f1a83f 100644
--- a/arch/sh/include/asm/mmu_context.h
+++ b/arch/sh/include/asm/mmu_context.h
@@ -19,13 +19,18 @@
  *    (a) TLB cache version (or round, cycle whatever expression you like)
  *    (b) ASID (Address Space IDentifier)
  */
+#ifdef CONFIG_CPU_HAS_PTEAEX
+#define MMU_CONTEXT_ASID_MASK           0x0000ffff
+#else
 #define MMU_CONTEXT_ASID_MASK           0x000000ff
-#define MMU_CONTEXT_VERSION_MASK        0xffffff00
-#define MMU_CONTEXT_FIRST_VERSION       0x00000100
-#define NO_CONTEXT                      0UL
+#endif
 
-/* ASID is 8-bit value, so it can't be 0x100 */
-#define MMU_NO_ASID                     0x100
+#define MMU_CONTEXT_VERSION_MASK        (~0UL & ~MMU_CONTEXT_ASID_MASK)
+#define MMU_CONTEXT_FIRST_VERSION       (MMU_CONTEXT_ASID_MASK + 1)
+
+/* Impossible ASID value, to differentiate from NO_CONTEXT. */
+#define MMU_NO_ASID                     MMU_CONTEXT_FIRST_VERSION
+#define NO_CONTEXT                      0UL
 
 #define asid_cache(cpu)         (cpu_data[cpu].asid_cache)
 
diff --git a/arch/sh/include/asm/mmu_context_32.h b/arch/sh/include/asm/mmu_context_32.h
index f4f9aebd68b7..8ef800c549ab 100644
--- a/arch/sh/include/asm/mmu_context_32.h
+++ b/arch/sh/include/asm/mmu_context_32.h
@@ -10,6 +10,17 @@ static inline void destroy_context(struct mm_struct *mm)
         /* Do nothing */
 }
 
+#ifdef CONFIG_CPU_HAS_PTEAEX
+static inline void set_asid(unsigned long asid)
+{
+        __raw_writel(asid, MMU_PTEAEX);
+}
+
+static inline unsigned long get_asid(void)
+{
+        return __raw_readl(MMU_PTEAEX) & MMU_CONTEXT_ASID_MASK;
+}
+#else
 static inline void set_asid(unsigned long asid)
 {
         unsigned long __dummy;
@@ -33,6 +44,7 @@ static inline unsigned long get_asid(void)
         asid &= MMU_CONTEXT_ASID_MASK;
         return asid;
 }
+#endif /* CONFIG_CPU_HAS_PTEAEX */
 
 /* MMU_TTB is used for optimizing the fault handling. */
 static inline void set_TTB(pgd_t *pgd)
diff --git a/arch/sh/include/asm/page.h b/arch/sh/include/asm/page.h
index 5871d78e47e5..9c6d21ec0240 100644
--- a/arch/sh/include/asm/page.h
+++ b/arch/sh/include/asm/page.h
@@ -129,7 +129,12 @@ typedef struct page *pgtable_t;
  * is not visible (it is part of the PMB mapping) and so needs to be
  * added or subtracted as required.
  */
-#ifdef CONFIG_32BIT
+#if defined(CONFIG_PMB_FIXED)
+/* phys = virt - PAGE_OFFSET - (__MEMORY_START & 0xe0000000) */
+#define PMB_OFFSET      (PAGE_OFFSET - PXSEG(__MEMORY_START))
+#define __pa(x) ((unsigned long)(x) - PMB_OFFSET)
+#define __va(x) ((void *)((unsigned long)(x) + PMB_OFFSET))
+#elif defined(CONFIG_32BIT)
 #define __pa(x) ((unsigned long)(x)-PAGE_OFFSET+__MEMORY_START)
 #define __va(x) ((void *)((unsigned long)(x)+PAGE_OFFSET-__MEMORY_START))
 #else
diff --git a/arch/sh/include/asm/processor.h b/arch/sh/include/asm/processor.h
index 1ef4b24d7619..1fd58b421438 100644
--- a/arch/sh/include/asm/processor.h
+++ b/arch/sh/include/asm/processor.h
@@ -31,7 +31,7 @@ enum cpu_type {
         CPU_SH7760, CPU_SH4_202, CPU_SH4_501,
 
         /* SH-4A types */
-        CPU_SH7763, CPU_SH7770, CPU_SH7780, CPU_SH7781, CPU_SH7785,
+        CPU_SH7763, CPU_SH7770, CPU_SH7780, CPU_SH7781, CPU_SH7785, CPU_SH7786,
         CPU_SH7723, CPU_SHX3,
 
         /* SH4AL-DSP types */
diff --git a/arch/sh/include/asm/processor_32.h b/arch/sh/include/asm/processor_32.h
index d79063c5eb9c..efdd78a53b11 100644
--- a/arch/sh/include/asm/processor_32.h
+++ b/arch/sh/include/asm/processor_32.h
@@ -108,12 +108,12 @@ extern int ubc_usercnt;
 /*
  * Do necessary setup to start up a newly executed thread.
  */
-#define start_thread(regs, new_pc, new_sp)       \
+#define start_thread(_regs, new_pc, new_sp)      \
         set_fs(USER_DS);                         \
-        regs->pr = 0;                            \
-        regs->sr = SR_FD;       /* User mode. */ \
-        regs->pc = new_pc;                       \
-        regs->regs[15] = new_sp
+        _regs->pr = 0;                           \
+        _regs->sr = SR_FD;      /* User mode. */ \
+        _regs->pc = new_pc;                      \
+        _regs->regs[15] = new_sp
 
 /* Forward declaration, a strange C thing */
 struct task_struct;
@@ -189,10 +189,9 @@ extern unsigned long get_wchan(struct task_struct *p);
 #define KSTK_EIP(tsk)  (task_pt_regs(tsk)->pc)
 #define KSTK_ESP(tsk)  (task_pt_regs(tsk)->regs[15])
 
-#define user_stack_pointer(regs)        ((regs)->regs[15])
+#define user_stack_pointer(_regs)       ((_regs)->regs[15])
 
-#if defined(CONFIG_CPU_SH2A) || defined(CONFIG_CPU_SH3) || \
-    defined(CONFIG_CPU_SH4)
+#if defined(CONFIG_CPU_SH2A) || defined(CONFIG_CPU_SH4)
 #define PREFETCH_STRIDE         L1_CACHE_BYTES
 #define ARCH_HAS_PREFETCH
 #define ARCH_HAS_PREFETCHW
diff --git a/arch/sh/include/asm/processor_64.h b/arch/sh/include/asm/processor_64.h
index 803177fcf086..5727d31b0ccf 100644
--- a/arch/sh/include/asm/processor_64.h
+++ b/arch/sh/include/asm/processor_64.h
@@ -145,13 +145,13 @@ struct thread_struct {
  */
 #define SR_USER (SR_MMU | SR_FD)
 
-#define start_thread(regs, new_pc, new_sp)                      \
+#define start_thread(_regs, new_pc, new_sp)                     \
         set_fs(USER_DS);                                        \
-        regs->sr = SR_USER;     /* User mode. */                \
-        regs->pc = new_pc - 4;  /* Compensate syscall exit */   \
-        regs->pc |= 1;          /* Set SHmedia ! */             \
-        regs->regs[18] = 0;                                     \
-        regs->regs[15] = new_sp
+        _regs->sr = SR_USER;    /* User mode. */                \
+        _regs->pc = new_pc - 4; /* Compensate syscall exit */   \
+        _regs->pc |= 1;         /* Set SHmedia ! */             \
+        _regs->regs[18] = 0;                                    \
+        _regs->regs[15] = new_sp
 
 /* Forward declaration, a strange C thing */
 struct task_struct;
@@ -226,7 +226,7 @@ extern unsigned long get_wchan(struct task_struct *p);
 #define KSTK_EIP(tsk)  ((tsk)->thread.pc)
 #define KSTK_ESP(tsk)  ((tsk)->thread.sp)
 
-#define user_stack_pointer(regs)        ((regs)->regs[15])
+#define user_stack_pointer(_regs)       ((_regs)->regs[15])
 
 #endif  /* __ASSEMBLY__ */
 #endif /* __ASM_SH_PROCESSOR_64_H */
diff --git a/arch/sh/include/asm/ptrace.h b/arch/sh/include/asm/ptrace.h
index 12912ab80c15..81c6568fdb3e 100644
--- a/arch/sh/include/asm/ptrace.h
+++ b/arch/sh/include/asm/ptrace.h
@@ -122,14 +122,12 @@ extern void user_disable_single_step(struct task_struct *);
 #ifdef CONFIG_SH_DSP
 #define task_pt_regs(task) \
         ((struct pt_regs *) (task_stack_page(task) + THREAD_SIZE \
-                 - sizeof(struct pt_dspregs) - sizeof(unsigned long)) - 1)
+                 - sizeof(struct pt_dspregs)) - 1)
 #define task_pt_dspregs(task) \
-        ((struct pt_dspregs *) (task_stack_page(task) + THREAD_SIZE \
-                 - sizeof(unsigned long)) - 1)
+        ((struct pt_dspregs *) (task_stack_page(task) + THREAD_SIZE) - 1)
 #else
 #define task_pt_regs(task) \
-        ((struct pt_regs *) (task_stack_page(task) + THREAD_SIZE \
-                 - sizeof(unsigned long)) - 1)
+        ((struct pt_regs *) (task_stack_page(task) + THREAD_SIZE) - 1)
 #endif
 
 static inline unsigned long profile_pc(struct pt_regs *regs)
diff --git a/arch/sh/include/asm/sections.h b/arch/sh/include/asm/sections.h
index 8f8f4ad400df..01a4076a3719 100644
--- a/arch/sh/include/asm/sections.h
+++ b/arch/sh/include/asm/sections.h
@@ -3,6 +3,7 @@
 
 #include <asm-generic/sections.h>
 
+extern void __nosave_begin, __nosave_end;
 extern long __machvec_start, __machvec_end;
 extern char __uncached_start, __uncached_end;
 extern char _ebss[];
diff --git a/arch/sh/include/asm/socket.h b/arch/sh/include/asm/socket.h
index 6d4bf6512959..345653b96826 100644
--- a/arch/sh/include/asm/socket.h
+++ b/arch/sh/include/asm/socket.h
@@ -54,4 +54,7 @@
 
 #define SO_MARK                 36
 
+#define SO_TIMESTAMPING         37
+#define SCM_TIMESTAMPING        SO_TIMESTAMPING
+
 #endif /* __ASM_SH_SOCKET_H */
diff --git a/arch/sh/include/asm/suspend.h b/arch/sh/include/asm/suspend.h
new file mode 100644
index 000000000000..b1b995370e79
--- /dev/null
+++ b/arch/sh/include/asm/suspend.h
@@ -0,0 +1,22 @@
+#ifndef _ASM_SH_SUSPEND_H
+#define _ASM_SH_SUSPEND_H
+
+#ifndef __ASSEMBLY__
+static inline int arch_prepare_suspend(void) { return 0; }
+
+#include <asm/ptrace.h>
+
+struct swsusp_arch_regs {
+        struct pt_regs user_regs;
+        unsigned long bank1_regs[8];
+};
+#endif
+
+/* flags passed to assembly suspend code */
+#define SUSP_SH_SLEEP           (1 << 0) /* Regular sleep mode */
+#define SUSP_SH_STANDBY         (1 << 1) /* SH-Mobile Software standby mode */
+#define SUSP_SH_RSTANDBY        (1 << 2) /* SH-Mobile R-standby mode */
+#define SUSP_SH_USTANDBY        (1 << 3) /* SH-Mobile U-standby mode */
+#define SUSP_SH_SF              (1 << 4) /* Enable self-refresh */
+
+#endif /* _ASM_SH_SUSPEND_H */
diff --git a/arch/sh/include/asm/timer.h b/arch/sh/include/asm/timer.h
index a7ca3a195bb5..4c3b66e30af2 100644
--- a/arch/sh/include/asm/timer.h
+++ b/arch/sh/include/asm/timer.h
@@ -9,7 +9,6 @@ struct sys_timer_ops {
         int (*init)(void);
         int (*start)(void);
         int (*stop)(void);
-        cycle_t (*read)(void);
 #ifndef CONFIG_GENERIC_TIME
         unsigned long (*get_offset)(void);
 #endif
@@ -39,6 +38,7 @@ struct sys_timer *get_sys_timer(void);
 
 /* arch/sh/kernel/time.c */
 void handle_timer_tick(void);
-extern unsigned long sh_hpt_frequency;
+
+extern struct clocksource clocksource_sh;
 
 #endif /* __ASM_SH_TIMER_H */
diff --git a/arch/sh/include/asm/tlb.h b/arch/sh/include/asm/tlb.h
index 88ff1ae8a6b8..9c16f737074a 100644
--- a/arch/sh/include/asm/tlb.h
+++ b/arch/sh/include/asm/tlb.h
@@ -6,22 +6,106 @@
 #endif
 
 #ifndef __ASSEMBLY__
+#include <linux/pagemap.h>
+
+#ifdef CONFIG_MMU
+#include <asm/pgalloc.h>
+#include <asm/tlbflush.h>
+
+/*
+ * TLB handling.  This allows us to remove pages from the page
+ * tables, and efficiently handle the TLB issues.
+ */
+struct mmu_gather {
+        struct mm_struct        *mm;
+        unsigned int            fullmm;
+        unsigned long           start, end;
+};
 
-#define tlb_start_vma(tlb, vma) \
-        flush_cache_range(vma, vma->vm_start, vma->vm_end)
+DECLARE_PER_CPU(struct mmu_gather, mmu_gathers);
 
-#define tlb_end_vma(tlb, vma)   \
-        flush_tlb_range(vma, vma->vm_start, vma->vm_end)
+static inline void init_tlb_gather(struct mmu_gather *tlb)
+{
+        tlb->start = TASK_SIZE;
+        tlb->end = 0;
 
-#define __tlb_remove_tlb_entry(tlb, pte, address)       do { } while (0)
+        if (tlb->fullmm) {
+                tlb->start = 0;
+                tlb->end = TASK_SIZE;
+        }
+}
+
+static inline struct mmu_gather *
+tlb_gather_mmu(struct mm_struct *mm, unsigned int full_mm_flush)
+{
+        struct mmu_gather *tlb = &get_cpu_var(mmu_gathers);
+
+        tlb->mm = mm;
+        tlb->fullmm = full_mm_flush;
+
+        init_tlb_gather(tlb);
+
+        return tlb;
+}
+
+static inline void
+tlb_finish_mmu(struct mmu_gather *tlb, unsigned long start, unsigned long end)
+{
+        if (tlb->fullmm)
+                flush_tlb_mm(tlb->mm);
+
+        /* keep the page table cache within bounds */
+        check_pgt_cache();
+
+        put_cpu_var(mmu_gathers);
+}
+
+static inline void
+tlb_remove_tlb_entry(struct mmu_gather *tlb, pte_t *ptep, unsigned long address)
+{
+        if (tlb->start > address)
+                tlb->start = address;
+        if (tlb->end < address + PAGE_SIZE)
+                tlb->end = address + PAGE_SIZE;
+}
 
 /*
- * Flush whole TLBs for MM
+ * In the case of tlb vma handling, we can optimise these away in the
+ * case where we're doing a full MM flush.  When we're doing a munmap,
+ * the vmas are adjusted to only cover the region to be torn down.
  */
-#define tlb_flush(tlb)                          flush_tlb_mm((tlb)->mm)
+static inline void
+tlb_start_vma(struct mmu_gather *tlb, struct vm_area_struct *vma)
+{
+        if (!tlb->fullmm)
+                flush_cache_range(vma, vma->vm_start, vma->vm_end);
+}
+
+static inline void
+tlb_end_vma(struct mmu_gather *tlb, struct vm_area_struct *vma)
+{
+        if (!tlb->fullmm && tlb->end) {
+                flush_tlb_range(vma, tlb->start, tlb->end);
+                init_tlb_gather(tlb);
+        }
+}
+
+#define tlb_remove_page(tlb,page)       free_page_and_swap_cache(page)
+#define pte_free_tlb(tlb, ptep)         pte_free((tlb)->mm, ptep)
+#define pmd_free_tlb(tlb, pmdp)         pmd_free((tlb)->mm, pmdp)
+#define pud_free_tlb(tlb, pudp)         pud_free((tlb)->mm, pudp)
+
+#define tlb_migrate_finish(mm)          do { } while (0)
+
+#else /* CONFIG_MMU */
+
+#define tlb_start_vma(tlb, vma)                         do { } while (0)
+#define tlb_end_vma(tlb, vma)                           do { } while (0)
+#define __tlb_remove_tlb_entry(tlb, pte, address)       do { } while (0)
+#define tlb_flush(tlb)                                  do { } while (0)
 
-#include <linux/pagemap.h>
 #include <asm-generic/tlb.h>
 
+#endif /* CONFIG_MMU */
 #endif /* __ASSEMBLY__ */
 #endif /* __ASM_SH_TLB_H */
diff --git a/arch/sh/include/cpu-sh3/cpu/dma.h b/arch/sh/include/cpu-sh3/cpu/dma.h
index 6813c3220a1d..0ea15f3f2363 100644
--- a/arch/sh/include/cpu-sh3/cpu/dma.h
+++ b/arch/sh/include/cpu-sh3/cpu/dma.h
@@ -1,22 +1,17 @@
 #ifndef __ASM_CPU_SH3_DMA_H
 #define __ASM_CPU_SH3_DMA_H
 
-
 #if defined(CONFIG_CPU_SUBTYPE_SH7720) || \
-    defined(CONFIG_CPU_SUBTYPE_SH7721)
-#define SH_DMAC_BASE    0xa4010020
-#else
-#define SH_DMAC_BASE    0xa4000020
+    defined(CONFIG_CPU_SUBTYPE_SH7721) || \
+    defined(CONFIG_CPU_SUBTYPE_SH7710) || \
+    defined(CONFIG_CPU_SUBTYPE_SH7712)
+#define SH_DMAC_BASE0   0xa4010020
+#else /* SH7705/06/07/09 */
+#define SH_DMAC_BASE0   0xa4000020
 #endif
 
-#if defined(CONFIG_CPU_SUBTYPE_SH7720) || defined(CONFIG_CPU_SUBTYPE_SH7709)
 #define DMTE0_IRQ       48
-#define DMTE1_IRQ       49
-#define DMTE2_IRQ       50
-#define DMTE3_IRQ       51
 #define DMTE4_IRQ       76
-#define DMTE5_IRQ       77
-#endif
 
 /* Definitions for the SuperH DMAC */
 #define TM_BURST        0x00000020
diff --git a/arch/sh/include/cpu-sh4/cpu/dma-sh4a.h b/arch/sh/include/cpu-sh4/cpu/dma-sh4a.h
new file mode 100644
index 000000000000..0ed5178fed69
--- /dev/null
+++ b/arch/sh/include/cpu-sh4/cpu/dma-sh4a.h
@@ -0,0 +1,94 @@
+#ifndef __ASM_SH_CPU_SH4_DMA_SH7780_H
+#define __ASM_SH_CPU_SH4_DMA_SH7780_H
+
+#if defined(CONFIG_CPU_SUBTYPE_SH7343) || \
+        defined(CONFIG_CPU_SUBTYPE_SH7722) || \
+        defined(CONFIG_CPU_SUBTYPE_SH7730)
+#define DMTE0_IRQ       48
+#define DMTE4_IRQ       76
+#define DMAE0_IRQ       78      /* DMA Error IRQ*/
+#define SH_DMAC_BASE0   0xFE008020
+#define SH_DMARS_BASE   0xFE009000
+#elif defined(CONFIG_CPU_SUBTYPE_SH7763) || \
+        defined(CONFIG_CPU_SUBTYPE_SH7764)
+#define DMTE0_IRQ       34
+#define DMTE4_IRQ       44
+#define DMAE0_IRQ       38
+#define SH_DMAC_BASE0   0xFF608020
+#define SH_DMARS_BASE   0xFF609000
+#elif defined(CONFIG_CPU_SUBTYPE_SH7723)
+#define DMTE0_IRQ       48      /* DMAC0A*/
+#define DMTE4_IRQ       40      /* DMAC0B */
+#define DMTE6_IRQ       42
+#define DMTE8_IRQ       76      /* DMAC1A */
+#define DMTE9_IRQ       77
+#define DMTE10_IRQ      72      /* DMAC1B */
+#define DMTE11_IRQ      73
+#define DMAE0_IRQ       78      /* DMA Error IRQ*/
+#define DMAE1_IRQ       74      /* DMA Error IRQ*/
+#define SH_DMAC_BASE0   0xFE008020
+#define SH_DMAC_BASE1   0xFDC08020
+#define SH_DMARS_BASE   0xFDC09000
+#elif defined(CONFIG_CPU_SUBTYPE_SH7780)
+#define DMTE0_IRQ       34
+#define DMTE4_IRQ       44
+#define DMTE6_IRQ       46
+#define DMTE8_IRQ       92
+#define DMTE9_IRQ       93
+#define DMTE10_IRQ      94
+#define DMTE11_IRQ      95
+#define DMAE0_IRQ       38      /* DMA Error IRQ */
+#define SH_DMAC_BASE0   0xFC808020
+#define SH_DMAC_BASE1   0xFC818020
+#define SH_DMARS_BASE   0xFC809000
+#else /* SH7785 */
+#define DMTE0_IRQ       33
+#define DMTE4_IRQ       37
+#define DMTE6_IRQ       52
+#define DMTE8_IRQ       54
+#define DMTE9_IRQ       55
+#define DMTE10_IRQ      56
+#define DMTE11_IRQ      57
+#define DMAE0_IRQ       39      /* DMA Error IRQ0 */
+#define DMAE1_IRQ       58      /* DMA Error IRQ1 */
+#define SH_DMAC_BASE0   0xFC808020
+#define SH_DMAC_BASE1   0xFCC08020
+#define SH_DMARS_BASE   0xFC809000
+#endif
+
+#define REQ_HE  0x000000C0
+#define REQ_H   0x00000080
+#define REQ_LE  0x00000040
+#define TM_BURST 0x0000020
+#define TS_8    0x00000000
+#define TS_16   0x00000008
+#define TS_32   0x00000010
+#define TS_16BLK        0x00000018
+#define TS_32BLK        0x00100000
+
+/*
+ * The SuperH DMAC supports a number of transmit sizes, we list them here,
+ * with their respective values as they appear in the CHCR registers.
+ *
+ * Defaults to a 64-bit transfer size.
+ */
+enum {
+        XMIT_SZ_8BIT,
+        XMIT_SZ_16BIT,
+        XMIT_SZ_32BIT,
+        XMIT_SZ_128BIT,
+        XMIT_SZ_256BIT,
+};
+
+/*
+ * The DMA count is defined as the number of bytes to transfer.
+ */
+static unsigned int ts_shift[] __maybe_unused = {
+        [XMIT_SZ_8BIT]          = 0,
+        [XMIT_SZ_16BIT]         = 1,
+        [XMIT_SZ_32BIT]         = 2,
+        [XMIT_SZ_128BIT]        = 4,
+        [XMIT_SZ_256BIT]        = 5,
+};
+
+#endif /* __ASM_SH_CPU_SH4_DMA_SH7780_H */
diff --git a/arch/sh/include/cpu-sh4/cpu/dma-sh7780.h b/arch/sh/include/cpu-sh4/cpu/dma-sh7780.h
deleted file mode 100644
index 71b426a6e482..000000000000
--- a/arch/sh/include/cpu-sh4/cpu/dma-sh7780.h
+++ /dev/null
@@ -1,39 +0,0 @@
-#ifndef __ASM_SH_CPU_SH4_DMA_SH7780_H
-#define __ASM_SH_CPU_SH4_DMA_SH7780_H
-
-#define REQ_HE  0x000000C0
-#define REQ_H   0x00000080
-#define REQ_LE  0x00000040
-#define TM_BURST 0x0000020
-#define TS_8    0x00000000
-#define TS_16   0x00000008
-#define TS_32   0x00000010
-#define TS_16BLK        0x00000018
-#define TS_32BLK        0x00100000
-
-/*
- * The SuperH DMAC supports a number of transmit sizes, we list them here,
- * with their respective values as they appear in the CHCR registers.
- *
- * Defaults to a 64-bit transfer size.
- */
-enum {
-        XMIT_SZ_8BIT,
-        XMIT_SZ_16BIT,
-        XMIT_SZ_32BIT,
-        XMIT_SZ_128BIT,
-        XMIT_SZ_256BIT,
-};
-
-/*
- * The DMA count is defined as the number of bytes to transfer.
- */
-static unsigned int ts_shift[] __maybe_unused = {
-        [XMIT_SZ_8BIT]          = 0,
-        [XMIT_SZ_16BIT]         = 1,
-        [XMIT_SZ_32BIT]         = 2,
-        [XMIT_SZ_128BIT]        = 4,
-        [XMIT_SZ_256BIT]        = 5,
-};
-
-#endif /* __ASM_SH_CPU_SH4_DMA_SH7780_H */
diff --git a/arch/sh/include/cpu-sh4/cpu/dma.h b/arch/sh/include/cpu-sh4/cpu/dma.h
index 235b7cd1fc9a..bcb30246e85c 100644
--- a/arch/sh/include/cpu-sh4/cpu/dma.h
+++ b/arch/sh/include/cpu-sh4/cpu/dma.h
@@ -1,31 +1,29 @@
 #ifndef __ASM_CPU_SH4_DMA_H
 #define __ASM_CPU_SH4_DMA_H
 
-#define DMAOR_INIT      ( 0x8000 | DMAOR_DME )
-
 /* SH7751/7760/7780 DMA IRQ sources */
-#define DMTE0_IRQ       34
-#define DMTE1_IRQ       35
-#define DMTE2_IRQ       36
-#define DMTE3_IRQ       37
-#define DMTE4_IRQ       44
-#define DMTE5_IRQ       45
-#define DMTE6_IRQ       46
-#define DMTE7_IRQ       47
-#define DMAE_IRQ        38
 
 #ifdef CONFIG_CPU_SH4A
-#define SH_DMAC_BASE    0xfc808020
 
+#define DMAOR_INIT      (DMAOR_DME)
 #define CHCR_TS_MASK    0x18
 #define CHCR_TS_SHIFT   3
 
-#include <cpu/dma-sh7780.h>
-#else
-#define SH_DMAC_BASE    0xffa00000
+#include <cpu/dma-sh4a.h>
+#else /* CONFIG_CPU_SH4A */
+/*
+ * SH7750/SH7751/SH7760
+ */
+#define DMTE0_IRQ       34
+#define DMTE4_IRQ       44
+#define DMTE6_IRQ       46
+#define DMAE0_IRQ       38
 
+#define DMAOR_INIT      (0x8000|DMAOR_DME)
+#define SH_DMAC_BASE0   0xffa00000
+#define SH_DMAC_BASE1   0xffa00070
 /* Definitions for the SuperH DMAC */
-#define TM_BURST        0x0000080
+#define TM_BURST        0x00000080
 #define TS_8            0x00000010
 #define TS_16           0x00000020
 #define TS_32           0x00000030
diff --git a/arch/sh/include/cpu-sh4/cpu/freq.h b/arch/sh/include/cpu-sh4/cpu/freq.h
index c23af81c2e70..749d1c434337 100644
--- a/arch/sh/include/cpu-sh4/cpu/freq.h
+++ b/arch/sh/include/cpu-sh4/cpu/freq.h
@@ -29,6 +29,10 @@
 #define FRQCR0                  0xffc80000
 #define FRQCR1                  0xffc80004
 #define FRQMR1                  0xffc80014
+#elif defined(CONFIG_CPU_SUBTYPE_SH7786)
+#define FRQCR0                  0xffc40000
+#define FRQCR1                  0xffc40004
+#define FRQMR1                  0xffc40014
 #elif defined(CONFIG_CPU_SUBTYPE_SHX3)
 #define FRQCR                   0xffc00014
 #else
diff --git a/arch/sh/include/cpu-sh4/cpu/mmu_context.h b/arch/sh/include/cpu-sh4/cpu/mmu_context.h
index 9ea8eb27b18e..3ce7ef6c2978 100644
--- a/arch/sh/include/cpu-sh4/cpu/mmu_context.h
+++ b/arch/sh/include/cpu-sh4/cpu/mmu_context.h
@@ -14,28 +14,35 @@
 #define MMU_PTEL        0xFF000004      /* Page table entry register LOW */
 #define MMU_TTB         0xFF000008      /* Translation table base register */
 #define MMU_TEA         0xFF00000C      /* TLB Exception Address */
-#define MMU_PTEA        0xFF000034      /* Page table entry assistance register */
+#define MMU_PTEA        0xFF000034      /* PTE assistance register */
+#define MMU_PTEAEX      0xFF00007C      /* PTE ASID extension register */
 
 #define MMUCR           0xFF000010      /* MMU Control Register */
 
-#define MMU_ITLB_ADDRESS_ARRAY  0xF2000000
 #define MMU_UTLB_ADDRESS_ARRAY  0xF6000000
+#define MMU_UTLB_ADDRESS_ARRAY2 0xF6800000
 #define MMU_PAGE_ASSOC_BIT      0x80
 
 #define MMUCR_TI                (1<<2)
 
-#ifdef CONFIG_X2TLB
-#define MMUCR_ME                (1 << 7)
-#else
-#define MMUCR_ME                (0)
-#endif
-
 #if defined(CONFIG_32BIT) && defined(CONFIG_CPU_SUBTYPE_ST40)
 #define MMUCR_SE                (1 << 4)
 #else
 #define MMUCR_SE                (0)
 #endif
 
+#ifdef CONFIG_CPU_HAS_PTEAEX
+#define MMUCR_AEX               (1 << 6)
+#else
+#define MMUCR_AEX               (0)
+#endif
+
+#ifdef CONFIG_X2TLB
+#define MMUCR_ME                (1 << 7)
+#else
+#define MMUCR_ME                (0)
+#endif
+
 #ifdef CONFIG_SH_STORE_QUEUES
 #define MMUCR_SQMD              (1 << 9)
 #else
@@ -43,17 +50,7 @@
 #endif
 
 #define MMU_NTLB_ENTRIES        64
-#define MMU_CONTROL_INIT        (0x05|MMUCR_SQMD|MMUCR_ME|MMUCR_SE)
-
-#define MMU_ITLB_DATA_ARRAY     0xF3000000
-#define MMU_UTLB_DATA_ARRAY     0xF7000000
-
-#define MMU_UTLB_ENTRIES           64
-#define MMU_U_ENTRY_SHIFT           8
-#define MMU_UTLB_VALID          0x100
-#define MMU_ITLB_ENTRIES            4
-#define MMU_I_ENTRY_SHIFT           8
-#define MMU_ITLB_VALID          0x100
+#define MMU_CONTROL_INIT        (0x05|MMUCR_SQMD|MMUCR_ME|MMUCR_SE|MMUCR_AEX)
 
 #define TRA     0xff000020
 #define EXPEVT  0xff000024
diff --git a/arch/sh/include/cpu-sh4/cpu/sh7786.h b/arch/sh/include/cpu-sh4/cpu/sh7786.h
new file mode 100644
index 000000000000..48688adc0c84
--- /dev/null
+++ b/arch/sh/include/cpu-sh4/cpu/sh7786.h
@@ -0,0 +1,192 @@
+/*
+ * SH7786 Pinmux
+ *
+ * Copyright (C) 2008, 2009  Renesas Solutions Corp.
+ * Kuninori Morimoto <morimoto.kuninori@renesas.com>
+ *
+ *  Based on sh7785.h
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+
+#ifndef __CPU_SH7786_H__
+#define __CPU_SH7786_H__
+
+enum {
+        /* PA */
+        GPIO_PA7, GPIO_PA6, GPIO_PA5, GPIO_PA4,
+        GPIO_PA3, GPIO_PA2, GPIO_PA1, GPIO_PA0,
+
+        /* PB */
+        GPIO_PB7, GPIO_PB6, GPIO_PB5, GPIO_PB4,
+        GPIO_PB3, GPIO_PB2, GPIO_PB1, GPIO_PB0,
+
+        /* PC */
+        GPIO_PC7, GPIO_PC6, GPIO_PC5, GPIO_PC4,
+        GPIO_PC3, GPIO_PC2, GPIO_PC1, GPIO_PC0,
+
+        /* PD */
+        GPIO_PD7, GPIO_PD6, GPIO_PD5, GPIO_PD4,
+        GPIO_PD3, GPIO_PD2, GPIO_PD1, GPIO_PD0,
+
+        /* PE */
+        GPIO_PE5, GPIO_PE4, GPIO_PE3, GPIO_PE2,
+        GPIO_PE1, GPIO_PE0,
+
+        /* PF */
+        GPIO_PF7, GPIO_PF6, GPIO_PF5, GPIO_PF4,
+        GPIO_PF3, GPIO_PF2, GPIO_PF1, GPIO_PF0,
+
+        /* PG */
+        GPIO_PG7, GPIO_PG6, GPIO_PG5, GPIO_PG4,
+        GPIO_PG3, GPIO_PG2, GPIO_PG1, GPIO_PG0,
+
+        /* PH */
+        GPIO_PH7, GPIO_PH6, GPIO_PH5, GPIO_PH4,
+        GPIO_PH3, GPIO_PH2, GPIO_PH1, GPIO_PH0,
+
+        /* PJ */
+        GPIO_PJ7, GPIO_PJ6, GPIO_PJ5, GPIO_PJ4,
+        GPIO_PJ3, GPIO_PJ2, GPIO_PJ1, GPIO_PJ0,
+
+        GPIO_FN_CDE,
+        GPIO_FN_ETH_MAGIC,
+        GPIO_FN_DISP,
+        GPIO_FN_ETH_LINK,
+        GPIO_FN_DR5,
+        GPIO_FN_ETH_TX_ER,
+        GPIO_FN_DR4,
+        GPIO_FN_ETH_TX_EN,
+        GPIO_FN_DR3,
+        GPIO_FN_ETH_TXD3,
+        GPIO_FN_DR2,
+        GPIO_FN_ETH_TXD2,
+        GPIO_FN_DR1,
+        GPIO_FN_ETH_TXD1,
+        GPIO_FN_DR0,
+        GPIO_FN_ETH_TXD0,
+        GPIO_FN_VSYNC,
+        GPIO_FN_HSPI_CLK,
+        GPIO_FN_ODDF,
+        GPIO_FN_HSPI_CS,
+        GPIO_FN_DG5,
+        GPIO_FN_ETH_MDIO,
+        GPIO_FN_DG4,
+        GPIO_FN_ETH_RX_CLK,
+        GPIO_FN_DG3,
+        GPIO_FN_ETH_MDC,
+        GPIO_FN_DG2,
+        GPIO_FN_ETH_COL,
+        GPIO_FN_DG1,
+        GPIO_FN_ETH_TX_CLK,
+        GPIO_FN_DG0,
+        GPIO_FN_ETH_CRS,
+        GPIO_FN_DCLKIN,
+        GPIO_FN_HSPI_RX,
+        GPIO_FN_HSYNC,
+        GPIO_FN_HSPI_TX,
+        GPIO_FN_DB5,
+        GPIO_FN_ETH_RXD3,
+        GPIO_FN_DB4,
+        GPIO_FN_ETH_RXD2,
+        GPIO_FN_DB3,
+        GPIO_FN_ETH_RXD1,
+        GPIO_FN_DB2,
+        GPIO_FN_ETH_RXD0,
+        GPIO_FN_DB1,
+        GPIO_FN_ETH_RX_DV,
+        GPIO_FN_DB0,
+        GPIO_FN_ETH_RX_ER,
+        GPIO_FN_DCLKOUT,
+        GPIO_FN_SCIF1_SLK,
+        GPIO_FN_SCIF1_RXD,
+        GPIO_FN_SCIF1_TXD,
+        GPIO_FN_DACK1,
+        GPIO_FN_BACK,
+        GPIO_FN_FALE,
+        GPIO_FN_DACK0,
+        GPIO_FN_FCLE,
+        GPIO_FN_DREQ1,
+        GPIO_FN_BREQ,
+        GPIO_FN_USB_OVC1,
+        GPIO_FN_DREQ0,
+        GPIO_FN_USB_OVC0,
+        GPIO_FN_USB_PENC1,
+        GPIO_FN_USB_PENC0,
+        GPIO_FN_HAC1_SDOUT,
+        GPIO_FN_SSI1_SDATA,
+        GPIO_FN_SDIF1CMD,
+        GPIO_FN_HAC1_SDIN,
+        GPIO_FN_SSI1_SCK,
+        GPIO_FN_SDIF1CD,
+        GPIO_FN_HAC1_SYNC,
+        GPIO_FN_SSI1_WS,
+        GPIO_FN_SDIF1WP,
+        GPIO_FN_HAC1_BITCLK,
+        GPIO_FN_SSI1_CLK,
+        GPIO_FN_SDIF1CLK,
+        GPIO_FN_HAC0_SDOUT,
+        GPIO_FN_SSI0_SDATA,
+        GPIO_FN_SDIF1D3,
+        GPIO_FN_HAC0_SDIN,
+        GPIO_FN_SSI0_SCK,
+        GPIO_FN_SDIF1D2,
+        GPIO_FN_HAC0_SYNC,
+        GPIO_FN_SSI0_WS,
+        GPIO_FN_SDIF1D1,
+        GPIO_FN_HAC0_BITCLK,
+        GPIO_FN_SSI0_CLK,
+        GPIO_FN_SDIF1D0,
+        GPIO_FN_SCIF3_SCK,
+        GPIO_FN_SSI2_SDATA,
+        GPIO_FN_SCIF3_RXD,
+        GPIO_FN_TCLK,
+        GPIO_FN_SSI2_SCK,
+        GPIO_FN_SCIF3_TXD,
+        GPIO_FN_HAC_RES,
+        GPIO_FN_SSI2_WS,
+        GPIO_FN_DACK3,
+        GPIO_FN_SDIF0CMD,
+        GPIO_FN_DACK2,
+        GPIO_FN_SDIF0CD,
+        GPIO_FN_DREQ3,
+        GPIO_FN_SDIF0WP,
+        GPIO_FN_SCIF0_CTS,
+        GPIO_FN_DREQ2,
+        GPIO_FN_SDIF0CLK,
+        GPIO_FN_SCIF0_RTS,
+        GPIO_FN_IRL7,
+        GPIO_FN_SDIF0D3,
+        GPIO_FN_SCIF0_SCK,
+        GPIO_FN_IRL6,
+        GPIO_FN_SDIF0D2,
+        GPIO_FN_SCIF0_RXD,
+        GPIO_FN_IRL5,
+        GPIO_FN_SDIF0D1,
+        GPIO_FN_SCIF0_TXD,
+        GPIO_FN_IRL4,
+        GPIO_FN_SDIF0D0,
+        GPIO_FN_SCIF5_SCK,
+        GPIO_FN_FRB,
+        GPIO_FN_SCIF5_RXD,
+        GPIO_FN_IOIS16,
+        GPIO_FN_SCIF5_TXD,
+        GPIO_FN_CE2B,
+        GPIO_FN_DRAK3,
+        GPIO_FN_CE2A,
+        GPIO_FN_SCIF4_SCK,
+        GPIO_FN_DRAK2,
+        GPIO_FN_SSI3_WS,
+        GPIO_FN_SCIF4_RXD,
+        GPIO_FN_DRAK1,
+        GPIO_FN_SSI3_SDATA,
+        GPIO_FN_FSTATUS,
+        GPIO_FN_SCIF4_TXD,
+        GPIO_FN_DRAK0,
+        GPIO_FN_SSI3_SCK,
+        GPIO_FN_FSE,
+};
+
+#endif /* __CPU_SH7786_H__ */
diff --git a/arch/sh/include/mach-common/mach/urquell.h b/arch/sh/include/mach-common/mach/urquell.h
new file mode 100644
index 000000000000..14b3e1d01777
--- /dev/null
+++ b/arch/sh/include/mach-common/mach/urquell.h
@@ -0,0 +1,68 @@
+#ifndef __MACH_URQUELL_H
+#define __MACH_URQUELL_H
+
+/*
+ * ------ 0x00000000 ------------------------------------
+ *  CS0 | (SW1,SW47)    EEPROM, SRAM, NOR FLASH
+ * -----+ 0x04000000 ------------------------------------
+ *  CS1 | (SW47)        SRAM, SRAM-LAN-PCMCIA, NOR FLASH
+ * -----+ 0x08000000 ------------------------------------
+ *  CS2 |               DDR3
+ *  CS3 |
+ * -----+ 0x10000000 ------------------------------------
+ *  CS4 |               PCIe
+ * -----+ 0x14000000 ------------------------------------
+ *  CS5 | (SW47)        LRAM/URAM, SRAM-LAN-PCMCIA
+ * -----+ 0x18000000 ------------------------------------
+ *  CS6 |               ATA, NAND FLASH
+ * -----+ 0x1c000000 ------------------------------------
+ *  CS7 |               SH7786 register
+ * -----+------------------------------------------------
+ */
+
+#define NOR_FLASH_ADDR  0x00000000
+#define NOR_FLASH_SIZE  0x04000000
+
+#define CS1_BASE        0x05000000
+#define CS5_BASE        0x15000000
+#define FPGA_BASE       CS1_BASE
+
+#define BOARDREG(ofs)   (FPGA_BASE + ofs##_OFS)
+#define UBOARDREG(ofs)  (0xa0000000 + FPGA_BASE + ofs##_OFS)
+
+#define SRSTR_OFS       0x0000 /* System reset register */
+#define BDMR_OFS        0x0010 /* Board operating mode resister */
+#define IRL0SR_OFS      0x0020 /* IRL0 Status register */
+#define IRL0MSKR_OFS    0x0030 /* IRL0 Mask register */
+#define IRL1SR_OFS      0x0040 /* IRL1 Status register */
+#define IRL1MSKR_OFS    0x0050 /* IRL1 Mask register */
+#define IRL2SR_OFS      0x0060 /* IRL2 Status register */
+#define IRL2MSKR_OFS    0x0070 /* IRL2 Mask register */
+#define IRL3SR_OFS      0x0080 /* IRL3 Status register */
+#define IRL3MSKR_OFS    0x0090 /* IRL3 Mask register */
+#define SOFTINTR_OFS    0x0120 /* Softwear Interrupt register */
+#define SLEDR_OFS       0x0130 /* LED control resister */
+#define MAPSCIFSWR_OFS  0x0140 /* Map/SCIF Switch register */
+#define FPVERR_OFS      0x0150 /* FPGA Version register */
+#define FPDATER_OFS     0x0160 /* FPGA Date register */
+#define FPYEARR_OFS     0x0170 /* FPGA Year register */
+#define TCLKCR_OFS      0x0180 /* TCLK Control register */
+#define DIPSWMR_OFS     0x1000 /* DIPSW monitor register */
+#define FPODR_OFS       0x1010 /* Output port data register */
+#define ATACNR_OFS      0x1020 /* ATA-CN Control/status register */
+#define FPINDR_OFS      0x1030 /* Input port data register */
+#define MDSWMR_OFS      0x1040 /* MODE SW monitor register */
+#define DDR3BUPCR_OFS   0x1050 /* DDR3 Backup control register */
+#define SSICODECCR_OFS  0x1060 /* SSI-CODEC control register */
+#define PCIESLOTSR_OFS  0x1070 /* PCIexpress Slot status register */
+#define ETHERPORTSR_OFS 0x1080 /* EtherPhy Port status register */
+#define LATCHCR_OFS     0x3000 /* Latch control register */
+#define LATCUAR_OFS     0x3010 /* Latch upper address register */
+#define LATCLAR_OFS     0x3012 /* Latch lower address register */
+#define LATCLUDR_OFS    0x3024 /* Latch D31-16 register */
+#define LATCLLDR_OFS    0x3026 /* Latch D15-0 register */
+
+#define CHARLED_OFS     0x2000 /* Character LED */
+
+#endif  /* __MACH_URQUELL_H */
+
diff --git a/arch/sh/kernel/Makefile_32 b/arch/sh/kernel/Makefile_32
index 2e1b86e16ab5..82a3a150c00d 100644
--- a/arch/sh/kernel/Makefile_32
+++ b/arch/sh/kernel/Makefile_32
@@ -30,5 +30,6 @@ obj-$(CONFIG_KPROBES)		+= kprobes.o
 obj-$(CONFIG_GENERIC_GPIO)      += gpio.o
 obj-$(CONFIG_DYNAMIC_FTRACE)    += ftrace.o
 obj-$(CONFIG_DUMP_CODE)         += disassemble.o
+obj-$(CONFIG_HIBERNATION)       += swsusp.o
 
 EXTRA_CFLAGS += -Werror
diff --git a/arch/sh/kernel/asm-offsets.c b/arch/sh/kernel/asm-offsets.c
index 57cf0e0680f3..99aceb28ee24 100644
--- a/arch/sh/kernel/asm-offsets.c
+++ b/arch/sh/kernel/asm-offsets.c
@@ -12,8 +12,10 @@
 #include <linux/types.h>
 #include <linux/mm.h>
 #include <linux/kbuild.h>
+#include <linux/suspend.h>
 
 #include <asm/thread_info.h>
+#include <asm/suspend.h>
 
 int main(void)
 {
@@ -25,5 +27,11 @@ int main(void)
         DEFINE(TI_PRE_COUNT,    offsetof(struct thread_info, preempt_count));
         DEFINE(TI_RESTART_BLOCK,offsetof(struct thread_info, restart_block));
 
+#ifdef CONFIG_HIBERNATION
+        DEFINE(PBE_ADDRESS, offsetof(struct pbe, address));
+        DEFINE(PBE_ORIG_ADDRESS, offsetof(struct pbe, orig_address));
+        DEFINE(PBE_NEXT, offsetof(struct pbe, next));
+        DEFINE(SWSUSP_ARCH_REGS_SIZE, sizeof(struct swsusp_arch_regs));
+#endif
         return 0;
 }
diff --git a/arch/sh/kernel/cpu/Makefile b/arch/sh/kernel/cpu/Makefile
index f471d242774e..2600641a483f 100644
--- a/arch/sh/kernel/cpu/Makefile
+++ b/arch/sh/kernel/cpu/Makefile
@@ -11,6 +11,7 @@ obj-$(CONFIG_CPU_SH5)		= sh5/
 # Special cases for family ancestry.
 
 obj-$(CONFIG_CPU_SH4A)          += sh4a/
+obj-$(CONFIG_ARCH_SHMOBILE)     += shmobile/
 
 # Common interfaces.
 
diff --git a/arch/sh/kernel/cpu/clock.c b/arch/sh/kernel/cpu/clock.c
index 7b17137536d6..1dc896483b59 100644
--- a/arch/sh/kernel/cpu/clock.c
+++ b/arch/sh/kernel/cpu/clock.c
@@ -20,6 +20,8 @@
 #include <linux/mutex.h>
 #include <linux/list.h>
 #include <linux/kref.h>
+#include <linux/kobject.h>
+#include <linux/sysdev.h>
 #include <linux/seq_file.h>
 #include <linux/err.h>
 #include <linux/platform_device.h>
@@ -239,6 +241,35 @@ void clk_recalc_rate(struct clk *clk)
 }
 EXPORT_SYMBOL_GPL(clk_recalc_rate);
 
+int clk_set_parent(struct clk *clk, struct clk *parent)
+{
+        int ret = -EINVAL;
+        struct clk *old;
+
+        if (!parent || !clk)
+                return ret;
+
+        old = clk->parent;
+        if (likely(clk->ops && clk->ops->set_parent)) {
+                unsigned long flags;
+                spin_lock_irqsave(&clock_lock, flags);
+                ret = clk->ops->set_parent(clk, parent);
+                spin_unlock_irqrestore(&clock_lock, flags);
+                clk->parent = (ret ? old : parent);
+        }
+
+        if (unlikely(clk->flags & CLK_RATE_PROPAGATES))
+                propagate_rate(clk);
+        return ret;
+}
+EXPORT_SYMBOL_GPL(clk_set_parent);
+
+struct clk *clk_get_parent(struct clk *clk)
+{
+        return clk->parent;
+}
+EXPORT_SYMBOL_GPL(clk_get_parent);
+
 long clk_round_rate(struct clk *clk, unsigned long rate)
 {
         if (likely(clk->ops && clk->ops->round_rate)) {
@@ -329,6 +360,70 @@ static int show_clocks(char *buf, char **start, off_t off,
         return p - buf;
 }
 
+#ifdef CONFIG_PM
+static int clks_sysdev_suspend(struct sys_device *dev, pm_message_t state)
+{
+        static pm_message_t prev_state;
+        struct clk *clkp;
+
+        switch (state.event) {
+        case PM_EVENT_ON:
+                /* Resumeing from hibernation */
+                if (prev_state.event == PM_EVENT_FREEZE) {
+                        list_for_each_entry(clkp, &clock_list, node)
+                                if (likely(clkp->ops)) {
+                                        unsigned long rate = clkp->rate;
+
+                                        if (likely(clkp->ops->set_parent))
+                                                clkp->ops->set_parent(clkp,
+                                                        clkp->parent);
+                                        if (likely(clkp->ops->set_rate))
+                                                clkp->ops->set_rate(clkp,
+                                                        rate, NO_CHANGE);
+                                        else if (likely(clkp->ops->recalc))
+                                                clkp->ops->recalc(clkp);
+                                        }
+                }
+                break;
+        case PM_EVENT_FREEZE:
+                break;
+        case PM_EVENT_SUSPEND:
+                break;
+        }
+
+        prev_state = state;
+        return 0;
+}
+
+static int clks_sysdev_resume(struct sys_device *dev)
+{
+        return clks_sysdev_suspend(dev, PMSG_ON);
+}
+
+static struct sysdev_class clks_sysdev_class = {
+        .name = "clks",
+};
+
+static struct sysdev_driver clks_sysdev_driver = {
+        .suspend = clks_sysdev_suspend,
+        .resume = clks_sysdev_resume,
+};
+
+static struct sys_device clks_sysdev_dev = {
+        .cls = &clks_sysdev_class,
+};
+
+static int __init clk_sysdev_init(void)
+{
+        sysdev_class_register(&clks_sysdev_class);
+        sysdev_driver_register(&clks_sysdev_class, &clks_sysdev_driver);
+        sysdev_register(&clks_sysdev_dev);
+
+        return 0;
+}
+subsys_initcall(clk_sysdev_init);
+#endif
+
 int __init clk_init(void)
 {
         int i, ret = 0;
diff --git a/arch/sh/kernel/cpu/sh2/setup-sh7619.c b/arch/sh/kernel/cpu/sh2/setup-sh7619.c
index 56e5878e5516..0e32d8e448ca 100644
--- a/arch/sh/kernel/cpu/sh2/setup-sh7619.c
+++ b/arch/sh/kernel/cpu/sh2/setup-sh7619.c
@@ -2,6 +2,7 @@
  * SH7619 Setup
  *
  *  Copyright (C) 2006  Yoshinori Sato
+ *  Copyright (C) 2009  Paul Mundt
  *
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
@@ -18,15 +19,10 @@ enum {
         /* interrupt sources */
         IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7,
         WDT, EDMAC, CMT0, CMT1,
-        SCIF0_ERI, SCIF0_RXI, SCIF0_BRI, SCIF0_TXI,
-        SCIF1_ERI, SCIF1_RXI, SCIF1_BRI, SCIF1_TXI,
-        SCIF2_ERI, SCIF2_RXI, SCIF2_BRI, SCIF2_TXI,
+        SCIF0, SCIF1, SCIF2,
         HIF_HIFI, HIF_HIFBI,
         DMAC0, DMAC1, DMAC2, DMAC3,
         SIOF,
-
-        /* interrupt groups */
-        SCIF0, SCIF1, SCIF2,
 };
 
 static struct intc_vect vectors[] __initdata = {
@@ -36,24 +32,18 @@ static struct intc_vect vectors[] __initdata = {
         INTC_IRQ(IRQ6, 82), INTC_IRQ(IRQ7, 83),
         INTC_IRQ(WDT, 84), INTC_IRQ(EDMAC, 85),
         INTC_IRQ(CMT0, 86), INTC_IRQ(CMT1, 87),
-        INTC_IRQ(SCIF0_ERI, 88), INTC_IRQ(SCIF0_RXI, 89),
-        INTC_IRQ(SCIF0_BRI, 90), INTC_IRQ(SCIF0_TXI, 91),
-        INTC_IRQ(SCIF1_ERI, 92), INTC_IRQ(SCIF1_RXI, 93),
-        INTC_IRQ(SCIF1_BRI, 94), INTC_IRQ(SCIF1_TXI, 95),
-        INTC_IRQ(SCIF2_ERI, 96), INTC_IRQ(SCIF2_RXI, 97),
-        INTC_IRQ(SCIF2_BRI, 98), INTC_IRQ(SCIF2_TXI, 99),
+        INTC_IRQ(SCIF0, 88), INTC_IRQ(SCIF0, 89),
+        INTC_IRQ(SCIF0, 90), INTC_IRQ(SCIF0, 91),
+        INTC_IRQ(SCIF1, 92), INTC_IRQ(SCIF1, 93),
+        INTC_IRQ(SCIF1, 94), INTC_IRQ(SCIF1, 95),
+        INTC_IRQ(SCIF2, 96), INTC_IRQ(SCIF2, 97),
+        INTC_IRQ(SCIF2, 98), INTC_IRQ(SCIF2, 99),
         INTC_IRQ(HIF_HIFI, 100), INTC_IRQ(HIF_HIFBI, 101),
         INTC_IRQ(DMAC0, 104), INTC_IRQ(DMAC1, 105),
         INTC_IRQ(DMAC2, 106), INTC_IRQ(DMAC3, 107),
         INTC_IRQ(SIOF, 108),
 };
 
-static struct intc_group groups[] __initdata = {
-        INTC_GROUP(SCIF0, SCIF0_ERI, SCIF0_RXI, SCIF0_BRI, SCIF0_TXI),
-        INTC_GROUP(SCIF1, SCIF1_ERI, SCIF1_RXI, SCIF1_BRI, SCIF1_TXI),
-        INTC_GROUP(SCIF2, SCIF2_ERI, SCIF2_RXI, SCIF2_BRI, SCIF2_TXI),
-};
-
 static struct intc_prio_reg prio_registers[] __initdata = {
         { 0xf8140006, 0, 16, 4, /* IPRA */ { IRQ0, IRQ1, IRQ2, IRQ3 } },
         { 0xf8140008, 0, 16, 4, /* IPRB */ { IRQ4, IRQ5, IRQ6, IRQ7 } },
@@ -64,7 +54,7 @@ static struct intc_prio_reg prio_registers[] __initdata = {
         { 0xf8080008, 0, 16, 4, /* IPRG */ { SIOF } },
 };
 
-static DECLARE_INTC_DESC(intc_desc, "sh7619", vectors, groups,
+static DECLARE_INTC_DESC(intc_desc, "sh7619", vectors, NULL,
                          NULL, prio_registers, NULL);
 
 static struct plat_sci_port sci_platform_data[] = {
@@ -72,17 +62,17 @@ static struct plat_sci_port sci_platform_data[] = {
                 .mapbase        = 0xf8400000,
                 .flags          = UPF_BOOT_AUTOCONF,
                 .type           = PORT_SCIF,
-                .irqs           =  { 88, 89, 91, 90},
+                .irqs           = { 88, 88, 88, 88 },
         }, {
                 .mapbase        = 0xf8410000,
                 .flags          = UPF_BOOT_AUTOCONF,
                 .type           = PORT_SCIF,
-                .irqs           =  { 92, 93, 95, 94},
+                .irqs           = { 92, 92, 92, 92 },
         }, {
                 .mapbase        = 0xf8420000,
                 .flags          = UPF_BOOT_AUTOCONF,
                 .type           = PORT_SCIF,
-                .irqs           =  { 96, 97, 99, 98},
+                .irqs           = { 96, 96, 96, 96 },
         }, {
                 .flags = 0,
         }
diff --git a/arch/sh/kernel/cpu/sh2a/setup-mxg.c b/arch/sh/kernel/cpu/sh2a/setup-mxg.c
index e611d79fac4c..844293723cfc 100644
--- a/arch/sh/kernel/cpu/sh2a/setup-mxg.c
+++ b/arch/sh/kernel/cpu/sh2a/setup-mxg.c
@@ -1,7 +1,7 @@
 /*
  * Renesas MX-G (R8A03022BG) Setup
  *
- *  Copyright (C) 2008  Paul Mundt
+ *  Copyright (C) 2008, 2009  Paul Mundt
  *
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
@@ -20,23 +20,15 @@ enum {
         IRQ8, IRQ9, IRQ10, IRQ11, IRQ12, IRQ13, IRQ14, IRQ15,
 
         PINT0, PINT1, PINT2, PINT3, PINT4, PINT5, PINT6, PINT7,
-
         SINT8, SINT7, SINT6, SINT5, SINT4, SINT3, SINT2, SINT1,
 
-        SCIF0_BRI, SCIF0_ERI, SCIF0_RXI, SCIF0_TXI,
-        SCIF1_BRI, SCIF1_ERI, SCIF1_RXI, SCIF1_TXI,
+        SCIF0, SCIF1,
 
-        MTU2_TGI0A, MTU2_TGI0B, MTU2_TGI0C, MTU2_TGI0D,
-        MTU2_TCI0V, MTU2_TGI0E, MTU2_TGI0F,
-        MTU2_TGI1A, MTU2_TGI1B, MTU2_TCI1V, MTU2_TCI1U,
-        MTU2_TGI2A, MTU2_TGI2B, MTU2_TCI2V, MTU2_TCI2U,
-        MTU2_TGI3A, MTU2_TGI3B, MTU2_TGI3C, MTU2_TGI3D, MTU2_TCI3V,
-        MTU2_TGI4A, MTU2_TGI4B, MTU2_TGI4C, MTU2_TGI4D, MTU2_TCI4V,
-        MTU2_TGI5U, MTU2_TGI5V, MTU2_TGI5W,
+        MTU2_GROUP1, MTU2_GROUP2, MTU2_GROUP3, MTU2_GROUP4, MTU2_GROUP5
+        MTU2_TGI3B, MTU2_TGI3C,
 
         /* interrupt groups */
-        PINT, SCIF0, SCIF1,
-        MTU2_GROUP1, MTU2_GROUP2, MTU2_GROUP3, MTU2_GROUP4, MTU2_GROUP5
+        PINT,
 };
 
 static struct intc_vect vectors[] __initdata = {
@@ -59,47 +51,36 @@ static struct intc_vect vectors[] __initdata = {
         INTC_IRQ(SINT4, 98), INTC_IRQ(SINT3, 99),
         INTC_IRQ(SINT2, 100), INTC_IRQ(SINT1, 101),
 
-        INTC_IRQ(SCIF0_RXI, 220), INTC_IRQ(SCIF0_TXI, 221),
-        INTC_IRQ(SCIF0_BRI, 222), INTC_IRQ(SCIF0_ERI, 223),
-        INTC_IRQ(SCIF1_RXI, 224), INTC_IRQ(SCIF1_TXI, 225),
-        INTC_IRQ(SCIF1_BRI, 226), INTC_IRQ(SCIF1_ERI, 227),
+        INTC_IRQ(SCIF0, 220), INTC_IRQ(SCIF0, 221),
+        INTC_IRQ(SCIF0, 222), INTC_IRQ(SCIF0, 223),
+        INTC_IRQ(SCIF1, 224), INTC_IRQ(SCIF1, 225),
+        INTC_IRQ(SCIF1, 226), INTC_IRQ(SCIF1, 227),
 
-        INTC_IRQ(MTU2_TGI0A, 228), INTC_IRQ(MTU2_TGI0B, 229),
-        INTC_IRQ(MTU2_TGI0C, 230), INTC_IRQ(MTU2_TGI0D, 231),
-        INTC_IRQ(MTU2_TCI0V, 232), INTC_IRQ(MTU2_TGI0E, 233),
+        INTC_IRQ(MTU2_GROUP1, 228), INTC_IRQ(MTU2_GROUP1, 229),
+        INTC_IRQ(MTU2_GROUP1, 230), INTC_IRQ(MTU2_GROUP1, 231),
+        INTC_IRQ(MTU2_GROUP1, 232), INTC_IRQ(MTU2_GROUP1, 233),
 
-        INTC_IRQ(MTU2_TGI0F, 234), INTC_IRQ(MTU2_TGI1A, 235),
-        INTC_IRQ(MTU2_TGI1B, 236), INTC_IRQ(MTU2_TCI1V, 237),
-        INTC_IRQ(MTU2_TCI1U, 238), INTC_IRQ(MTU2_TGI2A, 239),
+        INTC_IRQ(MTU2_GROUP2, 234), INTC_IRQ(MTU2_GROUP2, 235),
+        INTC_IRQ(MTU2_GROUP2, 236), INTC_IRQ(MTU2_GROUP2, 237),
+        INTC_IRQ(MTU2_GROUP2, 238), INTC_IRQ(MTU2_GROUP2, 239),
 
-        INTC_IRQ(MTU2_TGI2B, 240), INTC_IRQ(MTU2_TCI2V, 241),
-        INTC_IRQ(MTU2_TCI2U, 242), INTC_IRQ(MTU2_TGI3A, 243),
+        INTC_IRQ(MTU2_GROUP3, 240), INTC_IRQ(MTU2_GROUP3, 241),
+        INTC_IRQ(MTU2_GROUP3, 242), INTC_IRQ(MTU2_GROUP3, 243),
 
         INTC_IRQ(MTU2_TGI3B, 244),
         INTC_IRQ(MTU2_TGI3C, 245),
 
-        INTC_IRQ(MTU2_TGI3D, 246), INTC_IRQ(MTU2_TCI3V, 247),
-        INTC_IRQ(MTU2_TGI4A, 248), INTC_IRQ(MTU2_TGI4B, 249),
-        INTC_IRQ(MTU2_TGI4C, 250), INTC_IRQ(MTU2_TGI4D, 251),
+        INTC_IRQ(MTU2_GROUP4, 246), INTC_IRQ(MTU2_GROUP4, 247),
+        INTC_IRQ(MTU2_GROUP4, 248), INTC_IRQ(MTU2_GROUP4, 249),
+        INTC_IRQ(MTU2_GROUP4, 250), INTC_IRQ(MTU2_GROUP4, 251),
 
-        INTC_IRQ(MTU2_TCI4V, 252), INTC_IRQ(MTU2_TGI5U, 253),
-        INTC_IRQ(MTU2_TGI5V, 254), INTC_IRQ(MTU2_TGI5W, 255),
+        INTC_IRQ(MTU2_GROUP5, 252), INTC_IRQ(MTU2_GROUP5, 253),
+        INTC_IRQ(MTU2_GROUP5, 254), INTC_IRQ(MTU2_GROUP5, 255),
 };
 
 static struct intc_group groups[] __initdata = {
         INTC_GROUP(PINT, PINT0, PINT1, PINT2, PINT3,
                    PINT4, PINT5, PINT6, PINT7),
-        INTC_GROUP(MTU2_GROUP1, MTU2_TGI0A, MTU2_TGI0B, MTU2_TGI0C, MTU2_TGI0D,
-                   MTU2_TCI0V, MTU2_TGI0E),
-        INTC_GROUP(MTU2_GROUP2, MTU2_TGI0F, MTU2_TGI1A, MTU2_TGI1B,
-                   MTU2_TCI1V, MTU2_TCI1U, MTU2_TGI2A),
-        INTC_GROUP(MTU2_GROUP3, MTU2_TGI2B, MTU2_TCI2V, MTU2_TCI2U,
-                   MTU2_TGI3A),
-        INTC_GROUP(MTU2_GROUP4, MTU2_TGI3D, MTU2_TCI3V, MTU2_TGI4A,
-                   MTU2_TGI4B, MTU2_TGI4C, MTU2_TGI4D),
-        INTC_GROUP(MTU2_GROUP5, MTU2_TCI4V, MTU2_TGI5U, MTU2_TGI5V, MTU2_TGI5W),
-        INTC_GROUP(SCIF0, SCIF0_BRI, SCIF0_ERI, SCIF0_RXI, SCIF0_TXI),
-        INTC_GROUP(SCIF1, SCIF1_BRI, SCIF1_ERI, SCIF1_RXI, SCIF1_TXI),
 };
 
 static struct intc_prio_reg prio_registers[] __initdata = {
@@ -137,7 +118,7 @@ static struct plat_sci_port sci_platform_data[] = {
                 .mapbase        = 0xff804000,
                 .flags          = UPF_BOOT_AUTOCONF,
                 .type           = PORT_SCIF,
-                .irqs           = { 223, 220, 221, 222 },
+                .irqs           = { 220, 220, 220, 220 },
         }, {
                 .flags = 0,
         }
diff --git a/arch/sh/kernel/cpu/sh2a/setup-sh7201.c b/arch/sh/kernel/cpu/sh2a/setup-sh7201.c
index 0631e421c022..00f42f9e3f5c 100644
--- a/arch/sh/kernel/cpu/sh2a/setup-sh7201.c
+++ b/arch/sh/kernel/cpu/sh2a/setup-sh7201.c
@@ -2,6 +2,7 @@
  *  SH7201 setup
  *
  *  Copyright (C) 2008  Peter Griffin pgriffin@mpc-data.co.uk
+ *  Copyright (C) 2009  Paul Mundt
  *
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
@@ -18,57 +19,32 @@ enum {
         /* interrupt sources */
         IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7,
         PINT0, PINT1, PINT2, PINT3, PINT4, PINT5, PINT6, PINT7,
+
         ADC_ADI,
-        MTU2_TGI0A, MTU2_TGI0B, MTU2_TGI0C, MTU2_TGI0D,
-        MTU2_TCI0V, MTU2_TGI0E, MTU2_TGI0F,
-        MTU2_TGI1A, MTU2_TGI1B, MTU2_TCI1V, MTU2_TCI1U,
-        MTU2_TGI2A, MTU2_TGI2B, MTU2_TCI2V, MTU2_TCI2U,
-        MTU2_TGI3A, MTU2_TGI3B, MTU2_TGI3C, MTU2_TGI3D, MTU2_TCI3V,
-        MTU2_TGI4A, MTU2_TGI4B, MTU2_TGI4C, MTU2_TGI4D, MTU2_TCI4V,
-        MTU2_TGI5U, MTU2_TGI5V, MTU2_TGI5W,
-        RTC_ARM, RTC_PRD, RTC_CUP,
-        WDT,
-        IIC30_STPI, IIC30_NAKI, IIC30_RXI, IIC30_TXI, IIC30_TEI,
-        IIC31_STPI, IIC31_NAKI, IIC31_RXI, IIC31_TXI, IIC31_TEI,
-        IIC32_STPI, IIC32_NAKI, IIC32_RXI, IIC32_TXI, IIC32_TEI,
+
+        MTU20_ABCD, MTU20_VEF, MTU21_AB, MTU21_VU, MTU22_AB, MTU22_VU,
+        MTU23_ABCD, MTU24_ABCD, MTU25_UVW, MTU2_TCI3V, MTU2_TCI4V,
+
+        RTC, WDT,
+
+        IIC30, IIC31, IIC32,
 
         DMAC0_DMINT0, DMAC1_DMINT1,
         DMAC2_DMINT2, DMAC3_DMINT3,
 
-        SCIF0_BRI, SCIF0_ERI, SCIF0_RXI, SCIF0_TXI,
-        SCIF1_BRI, SCIF1_ERI, SCIF1_RXI, SCIF1_TXI,
-        SCIF2_BRI, SCIF2_ERI, SCIF2_RXI, SCIF2_TXI,
-        SCIF3_BRI, SCIF3_ERI, SCIF3_RXI, SCIF3_TXI,
-        SCIF4_BRI, SCIF4_ERI, SCIF4_RXI, SCIF4_TXI,
-        SCIF5_BRI, SCIF5_ERI, SCIF5_RXI, SCIF5_TXI,
-        SCIF6_BRI, SCIF6_ERI, SCIF6_RXI, SCIF6_TXI,
-        SCIF7_BRI, SCIF7_ERI, SCIF7_RXI, SCIF7_TXI,
+        SCIF0, SCIF1, SCIF2, SCIF3, SCIF4, SCIF5, SCIF6, SCIF7,
 
         DMAC0_DMINTA, DMAC4_DMINT4, DMAC5_DMINT5, DMAC6_DMINT6,
         DMAC7_DMINT7,
 
-        RCAN0_ERS, RCAN0_OVR,
-        RCAN0_SLE,
-        RCAN0_RM0, RCAN0_RM1,
-
-        RCAN1_ERS, RCAN1_OVR,
-        RCAN1_SLE,
-        RCAN1_RM0, RCAN1_RM1,
+        RCAN0, RCAN1,
 
         SSI0_SSII, SSI1_SSII,
 
-        TMR0_CMIA0, TMR0_CMIB0, TMR0_OVI0,
-        TMR1_CMIA1, TMR1_CMIB1, TMR1_OVI1,
+        TMR0, TMR1,
 
         /* interrupt groups */
-
-        IRQ, PINT, ADC,
-        MTU20_ABCD, MTU20_VEF, MTU21_AB, MTU21_VU, MTU22_AB, MTU22_VU,
-        MTU23_ABCD, MTU24_ABCD, MTU25_UVW,
-        RTC, IIC30, IIC31, IIC32,
-        SCIF0, SCIF1, SCIF2, SCIF3, SCIF4, SCIF5, SCIF6, SCIF7,
-        RCAN0, RCAN1, TMR0, TMR1
-
+        PINT,
 };
 
 static struct intc_vect vectors[] __initdata = {
@@ -76,6 +52,7 @@ static struct intc_vect vectors[] __initdata = {
         INTC_IRQ(IRQ2, 66), INTC_IRQ(IRQ3, 67),
         INTC_IRQ(IRQ4, 68), INTC_IRQ(IRQ5, 69),
         INTC_IRQ(IRQ6, 70), INTC_IRQ(IRQ7, 71),
+
         INTC_IRQ(PINT0, 80), INTC_IRQ(PINT1, 81),
         INTC_IRQ(PINT2, 82), INTC_IRQ(PINT3, 83),
         INTC_IRQ(PINT4, 84), INTC_IRQ(PINT5, 85),
@@ -83,123 +60,92 @@ static struct intc_vect vectors[] __initdata = {
 
         INTC_IRQ(ADC_ADI, 92),
 
-        INTC_IRQ(MTU2_TGI0A, 108), INTC_IRQ(MTU2_TGI0B, 109),
-        INTC_IRQ(MTU2_TGI0C, 110), INTC_IRQ(MTU2_TGI0D, 111),
-        INTC_IRQ(MTU2_TCI0V, 112),
-        INTC_IRQ(MTU2_TGI0E, 113), INTC_IRQ(MTU2_TGI0F, 114),
+        INTC_IRQ(MTU20_ABCD, 108), INTC_IRQ(MTU20_ABCD, 109),
+        INTC_IRQ(MTU20_ABCD, 110), INTC_IRQ(MTU20_ABCD, 111),
+
+        INTC_IRQ(MTU20_VEF, 112), INTC_IRQ(MTU20_VEF, 113),
+        INTC_IRQ(MTU20_VEF, 114),
+
+        INTC_IRQ(MTU21_AB, 116), INTC_IRQ(MTU21_AB, 117),
+        INTC_IRQ(MTU21_VU, 120), INTC_IRQ(MTU21_VU, 121),
 
-        INTC_IRQ(MTU2_TGI1A, 116), INTC_IRQ(MTU2_TGI1B, 117),
-        INTC_IRQ(MTU2_TCI1V, 120), INTC_IRQ(MTU2_TCI1U, 121),
+        INTC_IRQ(MTU22_AB, 124), INTC_IRQ(MTU22_AB, 125),
+        INTC_IRQ(MTU22_VU, 128), INTC_IRQ(MTU22_VU, 129),
 
-        INTC_IRQ(MTU2_TGI2A, 124), INTC_IRQ(MTU2_TGI2B, 125),
-        INTC_IRQ(MTU2_TCI2V, 128), INTC_IRQ(MTU2_TCI2U, 129),
+        INTC_IRQ(MTU23_ABCD, 132), INTC_IRQ(MTU23_ABCD, 133),
+        INTC_IRQ(MTU23_ABCD, 134), INTC_IRQ(MTU23_ABCD, 135),
 
-        INTC_IRQ(MTU2_TGI3A, 132), INTC_IRQ(MTU2_TGI3B, 133),
-        INTC_IRQ(MTU2_TGI3C, 134), INTC_IRQ(MTU2_TGI3D, 135),
         INTC_IRQ(MTU2_TCI3V, 136),
 
-        INTC_IRQ(MTU2_TGI4A, 140), INTC_IRQ(MTU2_TGI4B, 141),
-        INTC_IRQ(MTU2_TGI4C, 142), INTC_IRQ(MTU2_TGI4D, 143),
+        INTC_IRQ(MTU24_ABCD, 140), INTC_IRQ(MTU24_ABCD, 141),
+        INTC_IRQ(MTU24_ABCD, 142), INTC_IRQ(MTU24_ABCD, 143),
+
         INTC_IRQ(MTU2_TCI4V, 144),
 
-        INTC_IRQ(MTU2_TGI5U, 148), INTC_IRQ(MTU2_TGI5V, 149),
-        INTC_IRQ(MTU2_TGI5W, 150),
+        INTC_IRQ(MTU25_UVW, 148), INTC_IRQ(MTU25_UVW, 149),
+        INTC_IRQ(MTU25_UVW, 150),
+
+        INTC_IRQ(RTC, 152), INTC_IRQ(RTC, 153),
+        INTC_IRQ(RTC, 154),
 
-        INTC_IRQ(RTC_ARM, 152), INTC_IRQ(RTC_PRD, 153),
-        INTC_IRQ(RTC_CUP, 154), INTC_IRQ(WDT, 156),
+        INTC_IRQ(WDT, 156),
 
-        INTC_IRQ(IIC30_STPI, 157), INTC_IRQ(IIC30_NAKI, 158),
-        INTC_IRQ(IIC30_RXI, 159), INTC_IRQ(IIC30_TXI, 160),
-        INTC_IRQ(IIC30_TEI, 161),
+        INTC_IRQ(IIC30, 157), INTC_IRQ(IIC30, 158),
+        INTC_IRQ(IIC30, 159), INTC_IRQ(IIC30, 160),
+        INTC_IRQ(IIC30, 161),
 
-        INTC_IRQ(IIC31_STPI, 164), INTC_IRQ(IIC31_NAKI, 165),
-        INTC_IRQ(IIC31_RXI, 166), INTC_IRQ(IIC31_TXI, 167),
-        INTC_IRQ(IIC31_TEI, 168),
+        INTC_IRQ(IIC31, 164), INTC_IRQ(IIC31, 165),
+        INTC_IRQ(IIC31, 166), INTC_IRQ(IIC31, 167),
+        INTC_IRQ(IIC31, 168),
 
-        INTC_IRQ(IIC32_STPI, 170), INTC_IRQ(IIC32_NAKI, 171),
-        INTC_IRQ(IIC32_RXI, 172), INTC_IRQ(IIC32_TXI, 173),
-        INTC_IRQ(IIC32_TEI, 174),
+        INTC_IRQ(IIC32, 170), INTC_IRQ(IIC32, 171),
+        INTC_IRQ(IIC32, 172), INTC_IRQ(IIC32, 173),
+        INTC_IRQ(IIC32, 174),
 
         INTC_IRQ(DMAC0_DMINT0, 176), INTC_IRQ(DMAC1_DMINT1, 177),
         INTC_IRQ(DMAC2_DMINT2, 178), INTC_IRQ(DMAC3_DMINT3, 179),
 
-        INTC_IRQ(SCIF0_BRI, 180), INTC_IRQ(SCIF0_ERI, 181),
-        INTC_IRQ(SCIF0_RXI, 182), INTC_IRQ(SCIF0_TXI, 183),
-        INTC_IRQ(SCIF1_BRI, 184), INTC_IRQ(SCIF1_ERI, 185),
-        INTC_IRQ(SCIF1_RXI, 186), INTC_IRQ(SCIF1_TXI, 187),
-        INTC_IRQ(SCIF2_BRI, 188), INTC_IRQ(SCIF2_ERI, 189),
-        INTC_IRQ(SCIF2_RXI, 190), INTC_IRQ(SCIF2_TXI, 191),
-        INTC_IRQ(SCIF3_BRI, 192), INTC_IRQ(SCIF3_ERI, 193),
-        INTC_IRQ(SCIF3_RXI, 194), INTC_IRQ(SCIF3_TXI, 195),
-        INTC_IRQ(SCIF4_BRI, 196), INTC_IRQ(SCIF4_ERI, 197),
-        INTC_IRQ(SCIF4_RXI, 198), INTC_IRQ(SCIF4_TXI, 199),
-        INTC_IRQ(SCIF5_BRI, 200), INTC_IRQ(SCIF5_ERI, 201),
-        INTC_IRQ(SCIF5_RXI, 202), INTC_IRQ(SCIF5_TXI, 203),
-        INTC_IRQ(SCIF6_BRI, 204), INTC_IRQ(SCIF6_ERI, 205),
-        INTC_IRQ(SCIF6_RXI, 206), INTC_IRQ(SCIF6_TXI, 207),
-        INTC_IRQ(SCIF7_BRI, 208), INTC_IRQ(SCIF7_ERI, 209),
-        INTC_IRQ(SCIF7_RXI, 210), INTC_IRQ(SCIF7_TXI, 211),
+        INTC_IRQ(SCIF0, 180), INTC_IRQ(SCIF0, 181),
+        INTC_IRQ(SCIF0, 182), INTC_IRQ(SCIF0, 183),
+        INTC_IRQ(SCIF1, 184), INTC_IRQ(SCIF1, 185),
+        INTC_IRQ(SCIF1, 186), INTC_IRQ(SCIF1, 187),
+        INTC_IRQ(SCIF2, 188), INTC_IRQ(SCIF2, 189),
+        INTC_IRQ(SCIF2, 190), INTC_IRQ(SCIF2, 191),
+        INTC_IRQ(SCIF3, 192), INTC_IRQ(SCIF3, 193),
+        INTC_IRQ(SCIF3, 194), INTC_IRQ(SCIF3, 195),
+        INTC_IRQ(SCIF4, 196), INTC_IRQ(SCIF4, 197),
+        INTC_IRQ(SCIF4, 198), INTC_IRQ(SCIF4, 199),
+        INTC_IRQ(SCIF5, 200), INTC_IRQ(SCIF5, 201),
+        INTC_IRQ(SCIF5, 202), INTC_IRQ(SCIF5, 203),
+        INTC_IRQ(SCIF6, 204), INTC_IRQ(SCIF6, 205),
+        INTC_IRQ(SCIF6, 206), INTC_IRQ(SCIF6, 207),
+        INTC_IRQ(SCIF7, 208), INTC_IRQ(SCIF7, 209),
+        INTC_IRQ(SCIF7, 210), INTC_IRQ(SCIF7, 211),
 
         INTC_IRQ(DMAC0_DMINTA, 212), INTC_IRQ(DMAC4_DMINT4, 216),
         INTC_IRQ(DMAC5_DMINT5, 217), INTC_IRQ(DMAC6_DMINT6, 218),
         INTC_IRQ(DMAC7_DMINT7, 219),
 
-        INTC_IRQ(RCAN0_ERS, 228), INTC_IRQ(RCAN0_OVR, 229),
-        INTC_IRQ(RCAN0_SLE, 230),
-        INTC_IRQ(RCAN0_RM0, 231), INTC_IRQ(RCAN0_RM1, 232),
+        INTC_IRQ(RCAN0, 228), INTC_IRQ(RCAN0, 229),
+        INTC_IRQ(RCAN0, 230),
+        INTC_IRQ(RCAN0, 231), INTC_IRQ(RCAN0, 232),
 
-        INTC_IRQ(RCAN1_ERS, 234), INTC_IRQ(RCAN1_OVR, 235),
-        INTC_IRQ(RCAN1_SLE, 236),
-        INTC_IRQ(RCAN1_RM0, 237), INTC_IRQ(RCAN1_RM1, 238),
+        INTC_IRQ(RCAN1, 234), INTC_IRQ(RCAN1, 235),
+        INTC_IRQ(RCAN1, 236),
+        INTC_IRQ(RCAN1, 237), INTC_IRQ(RCAN1, 238),
 
         INTC_IRQ(SSI0_SSII, 244), INTC_IRQ(SSI1_SSII, 245),
 
-        INTC_IRQ(TMR0_CMIA0, 246), INTC_IRQ(TMR0_CMIB0, 247),
-        INTC_IRQ(TMR0_OVI0, 248),
-
-        INTC_IRQ(TMR1_CMIA1, 252), INTC_IRQ(TMR1_CMIB1, 253),
-        INTC_IRQ(TMR1_OVI1, 254),
+        INTC_IRQ(TMR0, 246), INTC_IRQ(TMR0, 247),
+        INTC_IRQ(TMR0, 248),
 
+        INTC_IRQ(TMR1, 252), INTC_IRQ(TMR1, 253),
+        INTC_IRQ(TMR1, 254),
 };
 
 static struct intc_group groups[] __initdata = {
         INTC_GROUP(PINT, PINT0, PINT1, PINT2, PINT3,
                    PINT4, PINT5, PINT6, PINT7),
-        INTC_GROUP(MTU20_ABCD, MTU2_TGI0A, MTU2_TGI0B, MTU2_TGI0C, MTU2_TGI0D),
-        INTC_GROUP(MTU20_VEF, MTU2_TCI0V, MTU2_TGI0E, MTU2_TGI0F),
-
-        INTC_GROUP(MTU21_AB, MTU2_TGI1A, MTU2_TGI1B),
-        INTC_GROUP(MTU21_VU, MTU2_TCI1V, MTU2_TCI1U),
-        INTC_GROUP(MTU22_AB, MTU2_TGI2A, MTU2_TGI2B),
-        INTC_GROUP(MTU22_VU, MTU2_TCI2V, MTU2_TCI2U),
-        INTC_GROUP(MTU23_ABCD, MTU2_TGI3A, MTU2_TGI3B, MTU2_TGI3C, MTU2_TGI3D),
-        INTC_GROUP(MTU24_ABCD, MTU2_TGI4A, MTU2_TGI4B, MTU2_TGI4C, MTU2_TGI4D),
-        INTC_GROUP(MTU25_UVW, MTU2_TGI5U, MTU2_TGI5V, MTU2_TGI5W),
-        INTC_GROUP(RTC, RTC_ARM, RTC_PRD, RTC_CUP ),
-
-        INTC_GROUP(IIC30, IIC30_STPI, IIC30_NAKI, IIC30_RXI, IIC30_TXI,
-                   IIC30_TEI),
-        INTC_GROUP(IIC31, IIC31_STPI, IIC31_NAKI, IIC31_RXI, IIC31_TXI,
-                   IIC31_TEI),
-        INTC_GROUP(IIC32, IIC32_STPI, IIC32_NAKI, IIC32_RXI, IIC32_TXI,
-                   IIC32_TEI),
-
-        INTC_GROUP(SCIF0, SCIF0_BRI, SCIF0_ERI, SCIF0_RXI, SCIF0_TXI),
-        INTC_GROUP(SCIF1, SCIF1_BRI, SCIF1_ERI, SCIF1_RXI, SCIF1_TXI),
-        INTC_GROUP(SCIF2, SCIF2_BRI, SCIF2_ERI, SCIF2_RXI, SCIF2_TXI),
-        INTC_GROUP(SCIF3, SCIF3_BRI, SCIF3_ERI, SCIF3_RXI, SCIF3_TXI),
-        INTC_GROUP(SCIF4, SCIF4_BRI, SCIF4_ERI, SCIF4_RXI, SCIF4_TXI),
-        INTC_GROUP(SCIF5, SCIF5_BRI, SCIF5_ERI, SCIF5_RXI, SCIF5_TXI),
-        INTC_GROUP(SCIF6, SCIF6_BRI, SCIF6_ERI, SCIF6_RXI, SCIF6_TXI),
-        INTC_GROUP(SCIF7, SCIF7_BRI, SCIF7_ERI, SCIF7_RXI, SCIF7_TXI),
-
-        INTC_GROUP(RCAN0, RCAN0_ERS, RCAN0_OVR, RCAN0_RM0, RCAN0_RM1,
-                   RCAN0_SLE),
-        INTC_GROUP(RCAN1, RCAN1_ERS, RCAN1_OVR, RCAN1_RM0, RCAN1_RM1,
-                   RCAN1_SLE),
-
-        INTC_GROUP(TMR0, TMR0_CMIA0, TMR0_CMIB0, TMR0_OVI0),
-        INTC_GROUP(TMR1, TMR1_CMIA1, TMR1_CMIB1, TMR1_OVI1),
 };
 
 static struct intc_prio_reg prio_registers[] __initdata = {
@@ -212,7 +158,7 @@ static struct intc_prio_reg prio_registers[] __initdata = {
 
         { 0xfffe9806, 0, 16, 4, /* IPR09 */ { RTC, WDT, IIC30, 0 } },
         { 0xfffe9808, 0, 16, 4, /* IPR10 */ { IIC31, IIC32, DMAC0_DMINT0, DMAC1_DMINT1 } },
-        { 0xfffe980a, 0, 16, 4, /* IPR11 */ { DMAC2_DMINT2, DMAC3_DMINT3, SCIF0 , SCIF1 } },
+        { 0xfffe980a, 0, 16, 4, /* IPR11 */ { DMAC2_DMINT2, DMAC3_DMINT3, SCIF0, SCIF1 } },
         { 0xfffe980c, 0, 16, 4, /* IPR12 */ { SCIF2, SCIF3, SCIF4, SCIF5 } },
         { 0xfffe980e, 0, 16, 4, /* IPR13 */ { SCIF6, SCIF7, DMAC0_DMINTA, DMAC4_DMINT4  } },
         { 0xfffe9810, 0, 16, 4, /* IPR14 */ { DMAC5_DMINT5, DMAC6_DMINT6, DMAC7_DMINT7, 0 } },
@@ -234,42 +180,42 @@ static struct plat_sci_port sci_platform_data[] = {
                 .mapbase        = 0xfffe8000,
                 .flags          = UPF_BOOT_AUTOCONF,
                 .type           = PORT_SCIF,
-                .irqs           = { 181, 182, 183, 180}
+                .irqs           = { 180, 180, 180, 180 }
         }, {
                 .mapbase        = 0xfffe8800,
                 .flags          = UPF_BOOT_AUTOCONF,
                 .type           = PORT_SCIF,
-                .irqs           = { 185, 186, 187, 184}
+                .irqs           = { 184, 184, 184, 184 }
         }, {
                 .mapbase        = 0xfffe9000,
                 .flags          = UPF_BOOT_AUTOCONF,
                 .type           = PORT_SCIF,
-                .irqs           = { 189, 186, 187, 188}
+                .irqs           = { 188, 188, 188, 188 }
         }, {
                 .mapbase        = 0xfffe9800,
                 .flags          = UPF_BOOT_AUTOCONF,
                 .type           = PORT_SCIF,
-                .irqs           = { 193, 194, 195, 192}
+                .irqs           = { 192, 192, 192, 192 }
         }, {
                 .mapbase        = 0xfffea000,
                 .flags          = UPF_BOOT_AUTOCONF,
                 .type           = PORT_SCIF,
-                .irqs           = { 196, 198, 199, 196}
+                .irqs           = { 196, 196, 196, 196 }
         }, {
                 .mapbase        = 0xfffea800,
                 .flags          = UPF_BOOT_AUTOCONF,
                 .type           = PORT_SCIF,
-                .irqs           = { 201, 202, 203, 200}
+                .irqs           = { 200, 200, 200, 200 }
         }, {
                 .mapbase        = 0xfffeb000,
                 .flags          = UPF_BOOT_AUTOCONF,
                 .type           = PORT_SCIF,
-                .irqs           = { 205, 206, 207, 204}
+                .irqs           = { 204, 204, 204, 204 }
         }, {
                 .mapbase        = 0xfffeb800,
                 .flags          = UPF_BOOT_AUTOCONF,
                 .type           = PORT_SCIF,
-                .irqs           = { 209, 210, 211, 208}
+                .irqs           = { 208, 208, 208, 208 }
         }, {
                 .flags = 0,
         }
@@ -290,17 +236,7 @@ static struct resource rtc_resources[] = {
                 .flags  = IORESOURCE_IO,
         },
         [1] = {
-                /* Period IRQ */
-                .start  = 153,
-                .flags  = IORESOURCE_IRQ,
-        },
-        [2] = {
-                /* Carry IRQ */
-                .start  = 154,
-                .flags  = IORESOURCE_IRQ,
-        },
-        [3] = {
-                /* Alarm IRQ */
+                /* Shared Period/Carry/Alarm IRQ */
                 .start  = 152,
                 .flags  = IORESOURCE_IRQ,
         },
diff --git a/arch/sh/kernel/cpu/sh2a/setup-sh7203.c b/arch/sh/kernel/cpu/sh2a/setup-sh7203.c
index e98dc4450352..820dfb2e8656 100644
--- a/arch/sh/kernel/cpu/sh2a/setup-sh7203.c
+++ b/arch/sh/kernel/cpu/sh2a/setup-sh7203.c
@@ -1,7 +1,7 @@
 /*
  * SH7203 and SH7263 Setup
  *
- *  Copyright (C) 2007  Paul Mundt
+ *  Copyright (C) 2007 - 2009  Paul Mundt
  *
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
@@ -18,50 +18,27 @@ enum {
         /* interrupt sources */
         IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7,
         PINT0, PINT1, PINT2, PINT3, PINT4, PINT5, PINT6, PINT7,
-        DMAC0_DEI, DMAC0_HEI, DMAC1_DEI, DMAC1_HEI,
-        DMAC2_DEI, DMAC2_HEI, DMAC3_DEI, DMAC3_HEI,
-        DMAC4_DEI, DMAC4_HEI, DMAC5_DEI, DMAC5_HEI,
-        DMAC6_DEI, DMAC6_HEI, DMAC7_DEI, DMAC7_HEI,
+        DMAC0, DMAC1, DMAC2, DMAC3, DMAC4, DMAC5, DMAC6, DMAC7,
         USB, LCDC, CMT0, CMT1, BSC, WDT,
-        MTU2_TGI0A, MTU2_TGI0B, MTU2_TGI0C, MTU2_TGI0D,
-        MTU2_TCI0V, MTU2_TGI0E, MTU2_TGI0F,
-        MTU2_TGI1A, MTU2_TGI1B, MTU2_TCI1V, MTU2_TCI1U,
-        MTU2_TGI2A, MTU2_TGI2B, MTU2_TCI2V, MTU2_TCI2U,
-        MTU2_TGI3A, MTU2_TGI3B, MTU2_TGI3C, MTU2_TGI3D, MTU2_TCI3V,
-        MTU2_TGI4A, MTU2_TGI4B, MTU2_TGI4C, MTU2_TGI4D, MTU2_TCI4V,
-        ADC_ADI,
-        IIC30_STPI, IIC30_NAKI, IIC30_RXI, IIC30_TXI, IIC30_TEI,
-        IIC31_STPI, IIC31_NAKI, IIC31_RXI, IIC31_TXI, IIC31_TEI,
-        IIC32_STPI, IIC32_NAKI, IIC32_RXI, IIC32_TXI, IIC32_TEI,
-        IIC33_STPI, IIC33_NAKI, IIC33_RXI, IIC33_TXI, IIC33_TEI,
-        SCIF0_BRI, SCIF0_ERI, SCIF0_RXI, SCIF0_TXI,
-        SCIF1_BRI, SCIF1_ERI, SCIF1_RXI, SCIF1_TXI,
-        SCIF2_BRI, SCIF2_ERI, SCIF2_RXI, SCIF2_TXI,
-        SCIF3_BRI, SCIF3_ERI, SCIF3_RXI, SCIF3_TXI,
-        SSU0_SSERI, SSU0_SSRXI, SSU0_SSTXI,
-        SSU1_SSERI, SSU1_SSRXI, SSU1_SSTXI,
-        SSI0_SSII, SSI1_SSII, SSI2_SSII, SSI3_SSII,
 
-        /* ROM-DEC, SDHI, SRC, and IEB are SH7263 specific */
-        ROMDEC_ISY, ROMDEC_IERR, ROMDEC_IARG, ROMDEC_ISEC, ROMDEC_IBUF,
-        ROMDEC_IREADY,
+        MTU0_ABCD, MTU0_VEF, MTU1_AB, MTU1_VU, MTU2_AB, MTU2_VU,
+        MTU3_ABCD, MTU4_ABCD, MTU2_TCI3V, MTU2_TCI4V,
 
-        FLCTL_FLSTEI, FLCTL_FLTENDI, FLCTL_FLTREQ0I, FLCTL_FLTREQ1I,
+        ADC_ADI,
+
+        IIC30, IIC31, IIC32, IIC33,
+        SCIF0, SCIF1, SCIF2, SCIF3,
 
-        SDHI3, SDHI0, SDHI1,
+        SSU0, SSU1,
 
-        RTC_ARM, RTC_PRD, RTC_CUP,
-        RCAN0_ERS, RCAN0_OVR, RCAN0_RM0, RCAN0_RM1, RCAN0_SLE,
-        RCAN1_ERS, RCAN1_OVR, RCAN1_RM0, RCAN1_RM1, RCAN1_SLE,
+        SSI0_SSII, SSI1_SSII, SSI2_SSII, SSI3_SSII,
 
-        SRC_OVF, SRC_ODFI, SRC_IDEI, IEBI,
+        /* ROM-DEC, SDHI, SRC, and IEB are SH7263 specific */
+        ROMDEC, FLCTL, SDHI, RTC, RCAN0, RCAN1,
+        SRC, IEBI,
 
         /* interrupt groups */
-        PINT, DMAC0, DMAC1, DMAC2, DMAC3, DMAC4, DMAC5, DMAC6, DMAC7,
-        MTU0_ABCD, MTU0_VEF, MTU1_AB, MTU1_VU, MTU2_AB, MTU2_VU,
-        MTU3_ABCD, MTU4_ABCD,
-        IIC30, IIC31, IIC32, IIC33, SCIF0, SCIF1, SCIF2, SCIF3,
-        SSU0, SSU1, ROMDEC, SDHI, FLCTL, RTC, RCAN0, RCAN1, SRC
+        PINT,
 };
 
 static struct intc_vect vectors[] __initdata = {
@@ -73,79 +50,80 @@ static struct intc_vect vectors[] __initdata = {
         INTC_IRQ(PINT2, 82), INTC_IRQ(PINT3, 83),
         INTC_IRQ(PINT4, 84), INTC_IRQ(PINT5, 85),
         INTC_IRQ(PINT6, 86), INTC_IRQ(PINT7, 87),
-        INTC_IRQ(DMAC0_DEI, 108), INTC_IRQ(DMAC0_HEI, 109),
-        INTC_IRQ(DMAC1_DEI, 112), INTC_IRQ(DMAC1_HEI, 113),
-        INTC_IRQ(DMAC2_DEI, 116), INTC_IRQ(DMAC2_HEI, 117),
-        INTC_IRQ(DMAC3_DEI, 120), INTC_IRQ(DMAC3_HEI, 121),
-        INTC_IRQ(DMAC4_DEI, 124), INTC_IRQ(DMAC4_HEI, 125),
-        INTC_IRQ(DMAC5_DEI, 128), INTC_IRQ(DMAC5_HEI, 129),
-        INTC_IRQ(DMAC6_DEI, 132), INTC_IRQ(DMAC6_HEI, 133),
-        INTC_IRQ(DMAC7_DEI, 136), INTC_IRQ(DMAC7_HEI, 137),
+        INTC_IRQ(DMAC0, 108), INTC_IRQ(DMAC0, 109),
+        INTC_IRQ(DMAC1, 112), INTC_IRQ(DMAC1, 113),
+        INTC_IRQ(DMAC2, 116), INTC_IRQ(DMAC2, 117),
+        INTC_IRQ(DMAC3, 120), INTC_IRQ(DMAC3, 121),
+        INTC_IRQ(DMAC4, 124), INTC_IRQ(DMAC4, 125),
+        INTC_IRQ(DMAC5, 128), INTC_IRQ(DMAC5, 129),
+        INTC_IRQ(DMAC6, 132), INTC_IRQ(DMAC6, 133),
+        INTC_IRQ(DMAC7, 136), INTC_IRQ(DMAC7, 137),
         INTC_IRQ(USB, 140), INTC_IRQ(LCDC, 141),
         INTC_IRQ(CMT0, 142), INTC_IRQ(CMT1, 143),
         INTC_IRQ(BSC, 144), INTC_IRQ(WDT, 145),
-        INTC_IRQ(MTU2_TGI0A, 146), INTC_IRQ(MTU2_TGI0B, 147),
-        INTC_IRQ(MTU2_TGI0C, 148), INTC_IRQ(MTU2_TGI0D, 149),
-        INTC_IRQ(MTU2_TCI0V, 150),
-        INTC_IRQ(MTU2_TGI0E, 151), INTC_IRQ(MTU2_TGI0F, 152),
-        INTC_IRQ(MTU2_TGI1A, 153), INTC_IRQ(MTU2_TGI1B, 154),
-        INTC_IRQ(MTU2_TCI1V, 155), INTC_IRQ(MTU2_TCI1U, 156),
-        INTC_IRQ(MTU2_TGI2A, 157), INTC_IRQ(MTU2_TGI2B, 158),
-        INTC_IRQ(MTU2_TCI2V, 159), INTC_IRQ(MTU2_TCI2U, 160),
-        INTC_IRQ(MTU2_TGI3A, 161), INTC_IRQ(MTU2_TGI3B, 162),
-        INTC_IRQ(MTU2_TGI3C, 163), INTC_IRQ(MTU2_TGI3D, 164),
+        INTC_IRQ(MTU0_ABCD, 146), INTC_IRQ(MTU0_ABCD, 147),
+        INTC_IRQ(MTU0_ABCD, 148), INTC_IRQ(MTU0_ABCD, 149),
+        INTC_IRQ(MTU0_VEF, 150),
+        INTC_IRQ(MTU0_VEF, 151), INTC_IRQ(MTU0_VEF, 152),
+        INTC_IRQ(MTU1_AB, 153), INTC_IRQ(MTU1_AB, 154),
+        INTC_IRQ(MTU1_VU, 155), INTC_IRQ(MTU1_VU, 156),
+        INTC_IRQ(MTU2_AB, 157), INTC_IRQ(MTU2_AB, 158),
+        INTC_IRQ(MTU2_VU, 159), INTC_IRQ(MTU2_VU, 160),
+        INTC_IRQ(MTU3_ABCD, 161), INTC_IRQ(MTU3_ABCD, 162),
+        INTC_IRQ(MTU3_ABCD, 163), INTC_IRQ(MTU3_ABCD, 164),
         INTC_IRQ(MTU2_TCI3V, 165),
-        INTC_IRQ(MTU2_TGI4A, 166), INTC_IRQ(MTU2_TGI4B, 167),
-        INTC_IRQ(MTU2_TGI4C, 168), INTC_IRQ(MTU2_TGI4D, 169),
+        INTC_IRQ(MTU4_ABCD, 166), INTC_IRQ(MTU4_ABCD, 167),
+        INTC_IRQ(MTU4_ABCD, 168), INTC_IRQ(MTU4_ABCD, 169),
         INTC_IRQ(MTU2_TCI4V, 170),
         INTC_IRQ(ADC_ADI, 171),
-        INTC_IRQ(IIC30_STPI, 172), INTC_IRQ(IIC30_NAKI, 173),
-        INTC_IRQ(IIC30_RXI, 174), INTC_IRQ(IIC30_TXI, 175),
-        INTC_IRQ(IIC30_TEI, 176),
-        INTC_IRQ(IIC31_STPI, 177), INTC_IRQ(IIC31_NAKI, 178),
-        INTC_IRQ(IIC31_RXI, 179), INTC_IRQ(IIC31_TXI, 180),
-        INTC_IRQ(IIC31_TEI, 181),
-        INTC_IRQ(IIC32_STPI, 182), INTC_IRQ(IIC32_NAKI, 183),
-        INTC_IRQ(IIC32_RXI, 184), INTC_IRQ(IIC32_TXI, 185),
-        INTC_IRQ(IIC32_TEI, 186),
-        INTC_IRQ(IIC33_STPI, 187), INTC_IRQ(IIC33_NAKI, 188),
-        INTC_IRQ(IIC33_RXI, 189), INTC_IRQ(IIC33_TXI, 190),
-        INTC_IRQ(IIC33_TEI, 191),
-        INTC_IRQ(SCIF0_BRI, 192), INTC_IRQ(SCIF0_ERI, 193),
-        INTC_IRQ(SCIF0_RXI, 194), INTC_IRQ(SCIF0_TXI, 195),
-        INTC_IRQ(SCIF1_BRI, 196), INTC_IRQ(SCIF1_ERI, 197),
-        INTC_IRQ(SCIF1_RXI, 198), INTC_IRQ(SCIF1_TXI, 199),
-        INTC_IRQ(SCIF2_BRI, 200), INTC_IRQ(SCIF2_ERI, 201),
-        INTC_IRQ(SCIF2_RXI, 202), INTC_IRQ(SCIF2_TXI, 203),
-        INTC_IRQ(SCIF3_BRI, 204), INTC_IRQ(SCIF3_ERI, 205),
-        INTC_IRQ(SCIF3_RXI, 206), INTC_IRQ(SCIF3_TXI, 207),
-        INTC_IRQ(SSU0_SSERI, 208), INTC_IRQ(SSU0_SSRXI, 209),
-        INTC_IRQ(SSU0_SSTXI, 210),
-        INTC_IRQ(SSU1_SSERI, 211), INTC_IRQ(SSU1_SSRXI, 212),
-        INTC_IRQ(SSU1_SSTXI, 213),
+        INTC_IRQ(IIC30, 172), INTC_IRQ(IIC30, 173),
+        INTC_IRQ(IIC30, 174), INTC_IRQ(IIC30, 175),
+        INTC_IRQ(IIC30, 176),
+        INTC_IRQ(IIC31, 177), INTC_IRQ(IIC31, 178),
+        INTC_IRQ(IIC31, 179), INTC_IRQ(IIC31, 180),
+        INTC_IRQ(IIC31, 181),
+        INTC_IRQ(IIC32, 182), INTC_IRQ(IIC32, 183),
+        INTC_IRQ(IIC32, 184), INTC_IRQ(IIC32, 185),
+        INTC_IRQ(IIC32, 186),
+        INTC_IRQ(IIC33, 187), INTC_IRQ(IIC33, 188),
+        INTC_IRQ(IIC33, 189), INTC_IRQ(IIC33, 190),
+        INTC_IRQ(IIC33, 191),
+        INTC_IRQ(SCIF0, 192), INTC_IRQ(SCIF0, 193),
+        INTC_IRQ(SCIF0, 194), INTC_IRQ(SCIF0, 195),
+        INTC_IRQ(SCIF1, 196), INTC_IRQ(SCIF1, 197),
+        INTC_IRQ(SCIF1, 198), INTC_IRQ(SCIF1, 199),
+        INTC_IRQ(SCIF2, 200), INTC_IRQ(SCIF2, 201),
+        INTC_IRQ(SCIF2, 202), INTC_IRQ(SCIF2, 203),
+        INTC_IRQ(SCIF3, 204), INTC_IRQ(SCIF3, 205),
+        INTC_IRQ(SCIF3, 206), INTC_IRQ(SCIF3, 207),
+        INTC_IRQ(SSU0, 208), INTC_IRQ(SSU0, 209),
+        INTC_IRQ(SSU0, 210),
+        INTC_IRQ(SSU1, 211), INTC_IRQ(SSU1, 212),
+        INTC_IRQ(SSU1, 213),
         INTC_IRQ(SSI0_SSII, 214), INTC_IRQ(SSI1_SSII, 215),
         INTC_IRQ(SSI2_SSII, 216), INTC_IRQ(SSI3_SSII, 217),
-        INTC_IRQ(FLCTL_FLSTEI, 224), INTC_IRQ(FLCTL_FLTENDI, 225),
-        INTC_IRQ(FLCTL_FLTREQ0I, 226), INTC_IRQ(FLCTL_FLTREQ1I, 227),
-        INTC_IRQ(RTC_ARM, 231), INTC_IRQ(RTC_PRD, 232),
-        INTC_IRQ(RTC_CUP, 233),
-        INTC_IRQ(RCAN0_ERS, 234), INTC_IRQ(RCAN0_OVR, 235),
-        INTC_IRQ(RCAN0_RM0, 236), INTC_IRQ(RCAN0_RM1, 237),
-        INTC_IRQ(RCAN0_SLE, 238),
-        INTC_IRQ(RCAN1_ERS, 239), INTC_IRQ(RCAN1_OVR, 240),
-        INTC_IRQ(RCAN1_RM0, 241), INTC_IRQ(RCAN1_RM1, 242),
-        INTC_IRQ(RCAN1_SLE, 243),
+        INTC_IRQ(FLCTL, 224), INTC_IRQ(FLCTL, 225),
+        INTC_IRQ(FLCTL, 226), INTC_IRQ(FLCTL, 227),
+        INTC_IRQ(RTC, 231), INTC_IRQ(RTC, 232),
+        INTC_IRQ(RTC, 233),
+        INTC_IRQ(RCAN0, 234), INTC_IRQ(RCAN0, 235),
+        INTC_IRQ(RCAN0, 236), INTC_IRQ(RCAN0, 237),
+        INTC_IRQ(RCAN0, 238),
+        INTC_IRQ(RCAN1, 239), INTC_IRQ(RCAN1, 240),
+        INTC_IRQ(RCAN1, 241), INTC_IRQ(RCAN1, 242),
+        INTC_IRQ(RCAN1, 243),
 
         /* SH7263-specific trash */
 #ifdef CONFIG_CPU_SUBTYPE_SH7263
-        INTC_IRQ(ROMDEC_ISY, 218), INTC_IRQ(ROMDEC_IERR, 219),
-        INTC_IRQ(ROMDEC_IARG, 220), INTC_IRQ(ROMDEC_ISEC, 221),
-        INTC_IRQ(ROMDEC_IBUF, 222), INTC_IRQ(ROMDEC_IREADY, 223),
+        INTC_IRQ(ROMDEC, 218), INTC_IRQ(ROMDEC, 219),
+        INTC_IRQ(ROMDEC, 220), INTC_IRQ(ROMDEC, 221),
+        INTC_IRQ(ROMDEC, 222), INTC_IRQ(ROMDEC, 223),
 
-        INTC_IRQ(SDHI3, 228), INTC_IRQ(SDHI0, 229), INTC_IRQ(SDHI1, 230),
+        INTC_IRQ(SDHI, 228), INTC_IRQ(SDHI, 229),
+        INTC_IRQ(SDHI, 230),
 
-        INTC_IRQ(SRC_OVF, 244), INTC_IRQ(SRC_ODFI, 245),
-        INTC_IRQ(SRC_IDEI, 246),
+        INTC_IRQ(SRC, 244), INTC_IRQ(SRC, 245),
+        INTC_IRQ(SRC, 246),
 
         INTC_IRQ(IEBI, 247),
 #endif
@@ -154,50 +132,6 @@ static struct intc_vect vectors[] __initdata = {
 static struct intc_group groups[] __initdata = {
         INTC_GROUP(PINT, PINT0, PINT1, PINT2, PINT3,
                    PINT4, PINT5, PINT6, PINT7),
-        INTC_GROUP(DMAC0, DMAC0_DEI, DMAC0_HEI),
-        INTC_GROUP(DMAC1, DMAC1_DEI, DMAC1_HEI),
-        INTC_GROUP(DMAC2, DMAC2_DEI, DMAC2_HEI),
-        INTC_GROUP(DMAC3, DMAC3_DEI, DMAC3_HEI),
-        INTC_GROUP(DMAC4, DMAC4_DEI, DMAC4_HEI),
-        INTC_GROUP(DMAC5, DMAC5_DEI, DMAC5_HEI),
-        INTC_GROUP(DMAC6, DMAC6_DEI, DMAC6_HEI),
-        INTC_GROUP(DMAC7, DMAC7_DEI, DMAC7_HEI),
-        INTC_GROUP(MTU0_ABCD, MTU2_TGI0A, MTU2_TGI0B, MTU2_TGI0C, MTU2_TGI0D),
-        INTC_GROUP(MTU0_VEF, MTU2_TCI0V, MTU2_TGI0E, MTU2_TGI0F),
-        INTC_GROUP(MTU1_AB, MTU2_TGI1A, MTU2_TGI1B),
-        INTC_GROUP(MTU1_VU, MTU2_TCI1V, MTU2_TCI1U),
-        INTC_GROUP(MTU2_AB, MTU2_TGI2A, MTU2_TGI2B),
-        INTC_GROUP(MTU2_VU, MTU2_TCI2V, MTU2_TCI2U),
-        INTC_GROUP(MTU3_ABCD, MTU2_TGI3A, MTU2_TGI3B, MTU2_TGI3C, MTU2_TGI3D),
-        INTC_GROUP(MTU4_ABCD, MTU2_TGI4A, MTU2_TGI4B, MTU2_TGI4C, MTU2_TGI4D),
-        INTC_GROUP(IIC30, IIC30_STPI, IIC30_NAKI, IIC30_RXI, IIC30_TXI,
-                   IIC30_TEI),
-        INTC_GROUP(IIC31, IIC31_STPI, IIC31_NAKI, IIC31_RXI, IIC31_TXI,
-                   IIC31_TEI),
-        INTC_GROUP(IIC32, IIC32_STPI, IIC32_NAKI, IIC32_RXI, IIC32_TXI,
-                   IIC32_TEI),
-        INTC_GROUP(IIC33, IIC33_STPI, IIC33_NAKI, IIC33_RXI, IIC33_TXI,
-                   IIC33_TEI),
-        INTC_GROUP(SCIF0, SCIF0_BRI, SCIF0_ERI, SCIF0_RXI, SCIF0_TXI),
-        INTC_GROUP(SCIF1, SCIF1_BRI, SCIF1_ERI, SCIF1_RXI, SCIF1_TXI),
-        INTC_GROUP(SCIF2, SCIF2_BRI, SCIF2_ERI, SCIF2_RXI, SCIF2_TXI),
-        INTC_GROUP(SCIF3, SCIF3_BRI, SCIF3_ERI, SCIF3_RXI, SCIF3_TXI),
-        INTC_GROUP(SSU0, SSU0_SSERI, SSU0_SSRXI, SSU0_SSTXI),
-        INTC_GROUP(SSU1, SSU1_SSERI, SSU1_SSRXI, SSU1_SSTXI),
-        INTC_GROUP(FLCTL, FLCTL_FLSTEI, FLCTL_FLTENDI, FLCTL_FLTREQ0I,
-                   FLCTL_FLTREQ1I),
-        INTC_GROUP(RTC, RTC_ARM, RTC_PRD, RTC_CUP),
-        INTC_GROUP(RCAN0, RCAN0_ERS, RCAN0_OVR, RCAN0_RM0, RCAN0_RM1,
-                   RCAN0_SLE),
-        INTC_GROUP(RCAN1, RCAN1_ERS, RCAN1_OVR, RCAN1_RM0, RCAN1_RM1,
-                   RCAN1_SLE),
-
-#ifdef CONFIG_CPU_SUBTYPE_SH7263
-        INTC_GROUP(ROMDEC, ROMDEC_ISY, ROMDEC_IERR, ROMDEC_IARG,
-                   ROMDEC_ISEC, ROMDEC_IBUF, ROMDEC_IREADY),
-        INTC_GROUP(SDHI, SDHI3, SDHI0, SDHI1),
-        INTC_GROUP(SRC, SRC_OVF, SRC_ODFI, SRC_IDEI),
-#endif
 };
 
 static struct intc_prio_reg prio_registers[] __initdata = {
@@ -242,22 +176,22 @@ static struct plat_sci_port sci_platform_data[] = {
                 .mapbase        = 0xfffe8000,
                 .flags          = UPF_BOOT_AUTOCONF,
                 .type           = PORT_SCIF,
-                .irqs           =  { 193, 194, 195, 192 },
+                .irqs           =  { 192, 192, 192, 192 },
         }, {
                 .mapbase        = 0xfffe8800,
                 .flags          = UPF_BOOT_AUTOCONF,
                 .type           = PORT_SCIF,
-                .irqs           =  { 197, 198, 199, 196 },
+                .irqs           =  { 196, 196, 196, 196 },
         }, {
                 .mapbase        = 0xfffe9000,
                 .flags          = UPF_BOOT_AUTOCONF,
                 .type           = PORT_SCIF,
-                .irqs           =  { 201, 202, 203, 200 },
+                .irqs           =  { 200, 200, 200, 200 },
         }, {
                 .mapbase        = 0xfffe9800,
                 .flags          = UPF_BOOT_AUTOCONF,
                 .type           = PORT_SCIF,
-                .irqs           =  { 205, 206, 207, 204 },
+                .irqs           =  { 204, 204, 204, 204 },
         }, {
                 .flags = 0,
         }
@@ -278,17 +212,7 @@ static struct resource rtc_resources[] = {
                 .flags  = IORESOURCE_IO,
         },
         [1] = {
-                /* Period IRQ */
-                .start  = 232,
-                .flags  = IORESOURCE_IRQ,
-        },
-        [2] = {
-                /* Carry IRQ */
-                .start  = 233,
-                .flags  = IORESOURCE_IRQ,
-        },
-        [3] = {
-                /* Alarm IRQ */
+                /* Shared Period/Carry/Alarm IRQ */
                 .start  = 231,
                 .flags  = IORESOURCE_IRQ,
         },
diff --git a/arch/sh/kernel/cpu/sh2a/setup-sh7206.c b/arch/sh/kernel/cpu/sh2a/setup-sh7206.c
index e6d4ec445dd8..c46a8355726d 100644
--- a/arch/sh/kernel/cpu/sh2a/setup-sh7206.c
+++ b/arch/sh/kernel/cpu/sh2a/setup-sh7206.c
@@ -2,6 +2,7 @@
  * SH7206 Setup
  *
  *  Copyright (C) 2006  Yoshinori Sato
+ *  Copyright (C) 2009  Paul Mundt
  *
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
@@ -19,34 +20,23 @@ enum {
         IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7,
         PINT0, PINT1, PINT2, PINT3, PINT4, PINT5, PINT6, PINT7,
         ADC_ADI0, ADC_ADI1,
-        DMAC0_DEI, DMAC0_HEI, DMAC1_DEI, DMAC1_HEI,
-        DMAC2_DEI, DMAC2_HEI, DMAC3_DEI, DMAC3_HEI,
-        DMAC4_DEI, DMAC4_HEI, DMAC5_DEI, DMAC5_HEI,
-        DMAC6_DEI, DMAC6_HEI, DMAC7_DEI, DMAC7_HEI,
+
+        DMAC0, DMAC1, DMAC2, DMAC3, DMAC4, DMAC5, DMAC6, DMAC7,
+
+        MTU0_ABCD, MTU0_VEF, MTU1_AB, MTU1_VU, MTU2_AB, MTU2_VU,
+        MTU3_ABCD, MTU4_ABCD, MTU5, POE2_12, MTU3S_ABCD, MTU4S_ABCD, MTU5S,
+        IIC3,
+
         CMT0, CMT1, BSC, WDT,
-        MTU2_TGI0A, MTU2_TGI0B, MTU2_TGI0C, MTU2_TGI0D,
-        MTU2_TCI0V, MTU2_TGI0E, MTU2_TGI0F,
-        MTU2_TGI1A, MTU2_TGI1B, MTU2_TCI1V, MTU2_TCI1U,
-        MTU2_TGI2A, MTU2_TGI2B, MTU2_TCI2V, MTU2_TCI2U,
-        MTU2_TGI3A, MTU2_TGI3B, MTU2_TGI3C, MTU2_TGI3D, MTU2_TCI3V,
-        MTU2_TGI4A, MTU2_TGI4B, MTU2_TGI4C, MTU2_TGI4D, MTU2_TCI4V,
-        MTU2_TGI5U, MTU2_TGI5V, MTU2_TGI5W,
-        POE2_OEI1, POE2_OEI2,
-        MTU2S_TGI3A, MTU2S_TGI3B, MTU2S_TGI3C, MTU2S_TGI3D, MTU2S_TCI3V,
-        MTU2S_TGI4A, MTU2S_TGI4B, MTU2S_TGI4C, MTU2S_TGI4D, MTU2S_TCI4V,
-        MTU2S_TGI5U, MTU2S_TGI5V, MTU2S_TGI5W,
+
+        MTU2_TCI3V, MTU2_TCI4V, MTU2S_TCI3V, MTU2S_TCI4V,
+
         POE2_OEI3,
-        IIC3_STPI, IIC3_NAKI, IIC3_RXI, IIC3_TXI, IIC3_TEI,
-        SCIF0_BRI, SCIF0_ERI, SCIF0_RXI, SCIF0_TXI,
-        SCIF1_BRI, SCIF1_ERI, SCIF1_RXI, SCIF1_TXI,
-        SCIF2_BRI, SCIF2_ERI, SCIF2_RXI, SCIF2_TXI,
-        SCIF3_BRI, SCIF3_ERI, SCIF3_RXI, SCIF3_TXI,
+
+        SCIF0, SCIF1, SCIF2, SCIF3,
 
         /* interrupt groups */
-        PINT, DMAC0, DMAC1, DMAC2, DMAC3, DMAC4, DMAC5, DMAC6, DMAC7,
-        MTU0_ABCD, MTU0_VEF, MTU1_AB, MTU1_VU, MTU2_AB, MTU2_VU,
-        MTU3_ABCD, MTU4_ABCD, MTU5, POE2_12, MTU3S_ABCD, MTU4S_ABCD, MTU5S,
-        IIC3, SCIF0, SCIF1, SCIF2, SCIF3,
+        PINT,
 };
 
 static struct intc_vect vectors[] __initdata = {
@@ -59,86 +49,58 @@ static struct intc_vect vectors[] __initdata = {
         INTC_IRQ(PINT4, 84), INTC_IRQ(PINT5, 85),
         INTC_IRQ(PINT6, 86), INTC_IRQ(PINT7, 87),
         INTC_IRQ(ADC_ADI0, 92), INTC_IRQ(ADC_ADI1, 96),
-        INTC_IRQ(DMAC0_DEI, 108), INTC_IRQ(DMAC0_HEI, 109),
-        INTC_IRQ(DMAC1_DEI, 112), INTC_IRQ(DMAC1_HEI, 113),
-        INTC_IRQ(DMAC2_DEI, 116), INTC_IRQ(DMAC2_HEI, 117),
-        INTC_IRQ(DMAC3_DEI, 120), INTC_IRQ(DMAC3_HEI, 121),
-        INTC_IRQ(DMAC4_DEI, 124), INTC_IRQ(DMAC4_HEI, 125),
-        INTC_IRQ(DMAC5_DEI, 128), INTC_IRQ(DMAC5_HEI, 129),
-        INTC_IRQ(DMAC6_DEI, 132), INTC_IRQ(DMAC6_HEI, 133),
-        INTC_IRQ(DMAC7_DEI, 136), INTC_IRQ(DMAC7_HEI, 137),
+        INTC_IRQ(DMAC0, 108), INTC_IRQ(DMAC0, 109),
+        INTC_IRQ(DMAC1, 112), INTC_IRQ(DMAC1, 113),
+        INTC_IRQ(DMAC2, 116), INTC_IRQ(DMAC2, 117),
+        INTC_IRQ(DMAC3, 120), INTC_IRQ(DMAC3, 121),
+        INTC_IRQ(DMAC4, 124), INTC_IRQ(DMAC4, 125),
+        INTC_IRQ(DMAC5, 128), INTC_IRQ(DMAC5, 129),
+        INTC_IRQ(DMAC6, 132), INTC_IRQ(DMAC6, 133),
+        INTC_IRQ(DMAC7, 136), INTC_IRQ(DMAC7, 137),
         INTC_IRQ(CMT0, 140), INTC_IRQ(CMT1, 144),
         INTC_IRQ(BSC, 148), INTC_IRQ(WDT, 152),
-        INTC_IRQ(MTU2_TGI0A, 156), INTC_IRQ(MTU2_TGI0B, 157),
-        INTC_IRQ(MTU2_TGI0C, 158), INTC_IRQ(MTU2_TGI0D, 159),
-        INTC_IRQ(MTU2_TCI0V, 160),
-        INTC_IRQ(MTU2_TGI0E, 161), INTC_IRQ(MTU2_TGI0F, 162),
-        INTC_IRQ(MTU2_TGI1A, 164), INTC_IRQ(MTU2_TGI1B, 165),
-        INTC_IRQ(MTU2_TCI1V, 168), INTC_IRQ(MTU2_TCI1U, 169),
-        INTC_IRQ(MTU2_TGI2A, 172), INTC_IRQ(MTU2_TGI2B, 173),
-        INTC_IRQ(MTU2_TCI2V, 176), INTC_IRQ(MTU2_TCI2U, 177),
-        INTC_IRQ(MTU2_TGI3A, 180), INTC_IRQ(MTU2_TGI3B, 181),
-        INTC_IRQ(MTU2_TGI3C, 182), INTC_IRQ(MTU2_TGI3D, 183),
+        INTC_IRQ(MTU0_ABCD, 156), INTC_IRQ(MTU0_ABCD, 157),
+        INTC_IRQ(MTU0_ABCD, 158), INTC_IRQ(MTU0_ABCD, 159),
+        INTC_IRQ(MTU0_VEF, 160), INTC_IRQ(MTU0_VEF, 161),
+        INTC_IRQ(MTU0_VEF, 162),
+        INTC_IRQ(MTU1_AB, 164), INTC_IRQ(MTU1_AB, 165),
+        INTC_IRQ(MTU1_VU, 168), INTC_IRQ(MTU1_VU, 169),
+        INTC_IRQ(MTU2_AB, 172), INTC_IRQ(MTU2_AB, 173),
+        INTC_IRQ(MTU2_VU, 176), INTC_IRQ(MTU2_VU, 177),
+        INTC_IRQ(MTU3_ABCD, 180), INTC_IRQ(MTU3_ABCD, 181),
+        INTC_IRQ(MTU3_ABCD, 182), INTC_IRQ(MTU3_ABCD, 183),
         INTC_IRQ(MTU2_TCI3V, 184),
-        INTC_IRQ(MTU2_TGI4A, 188), INTC_IRQ(MTU2_TGI4B, 189),
-        INTC_IRQ(MTU2_TGI4C, 190), INTC_IRQ(MTU2_TGI4D, 191),
+        INTC_IRQ(MTU4_ABCD, 188), INTC_IRQ(MTU4_ABCD, 189),
+        INTC_IRQ(MTU4_ABCD, 190), INTC_IRQ(MTU4_ABCD, 191),
         INTC_IRQ(MTU2_TCI4V, 192),
-        INTC_IRQ(MTU2_TGI5U, 196), INTC_IRQ(MTU2_TGI5V, 197),
-        INTC_IRQ(MTU2_TGI5W, 198),
-        INTC_IRQ(POE2_OEI1, 200), INTC_IRQ(POE2_OEI2, 201),
-        INTC_IRQ(MTU2S_TGI3A, 204), INTC_IRQ(MTU2S_TGI3B, 205),
-        INTC_IRQ(MTU2S_TGI3C, 206), INTC_IRQ(MTU2S_TGI3D, 207),
+        INTC_IRQ(MTU5, 196), INTC_IRQ(MTU5, 197),
+        INTC_IRQ(MTU5, 198),
+        INTC_IRQ(POE2_12, 200), INTC_IRQ(POE2_12, 201),
+        INTC_IRQ(MTU3S_ABCD, 204), INTC_IRQ(MTU3S_ABCD, 205),
+        INTC_IRQ(MTU3S_ABCD, 206), INTC_IRQ(MTU3S_ABCD, 207),
         INTC_IRQ(MTU2S_TCI3V, 208),
-        INTC_IRQ(MTU2S_TGI4A, 212), INTC_IRQ(MTU2S_TGI4B, 213),
-        INTC_IRQ(MTU2S_TGI4C, 214), INTC_IRQ(MTU2S_TGI4D, 215),
+        INTC_IRQ(MTU4S_ABCD, 212), INTC_IRQ(MTU4S_ABCD, 213),
+        INTC_IRQ(MTU4S_ABCD, 214), INTC_IRQ(MTU4S_ABCD, 215),
         INTC_IRQ(MTU2S_TCI4V, 216),
-        INTC_IRQ(MTU2S_TGI5U, 220), INTC_IRQ(MTU2S_TGI5V, 221),
-        INTC_IRQ(MTU2S_TGI5W, 222),
+        INTC_IRQ(MTU5S, 220), INTC_IRQ(MTU5S, 221),
+        INTC_IRQ(MTU5S, 222),
         INTC_IRQ(POE2_OEI3, 224),
-        INTC_IRQ(IIC3_STPI, 228), INTC_IRQ(IIC3_NAKI, 229),
-        INTC_IRQ(IIC3_RXI, 230), INTC_IRQ(IIC3_TXI, 231),
-        INTC_IRQ(IIC3_TEI, 232),
-        INTC_IRQ(SCIF0_BRI, 240), INTC_IRQ(SCIF0_ERI, 241),
-        INTC_IRQ(SCIF0_RXI, 242), INTC_IRQ(SCIF0_TXI, 243),
-        INTC_IRQ(SCIF1_BRI, 244), INTC_IRQ(SCIF1_ERI, 245),
-        INTC_IRQ(SCIF1_RXI, 246), INTC_IRQ(SCIF1_TXI, 247),
-        INTC_IRQ(SCIF2_BRI, 248), INTC_IRQ(SCIF2_ERI, 249),
-        INTC_IRQ(SCIF2_RXI, 250), INTC_IRQ(SCIF2_TXI, 251),
-        INTC_IRQ(SCIF3_BRI, 252), INTC_IRQ(SCIF3_ERI, 253),
-        INTC_IRQ(SCIF3_RXI, 254), INTC_IRQ(SCIF3_TXI, 255),
+        INTC_IRQ(IIC3, 228), INTC_IRQ(IIC3, 229),
+        INTC_IRQ(IIC3, 230), INTC_IRQ(IIC3, 231),
+        INTC_IRQ(IIC3, 232),
+        INTC_IRQ(SCIF0, 240), INTC_IRQ(SCIF0, 241),
+        INTC_IRQ(SCIF0, 242), INTC_IRQ(SCIF0, 243),
+        INTC_IRQ(SCIF1, 244), INTC_IRQ(SCIF1, 245),
+        INTC_IRQ(SCIF1, 246), INTC_IRQ(SCIF1, 247),
+        INTC_IRQ(SCIF2, 248), INTC_IRQ(SCIF2, 249),
+        INTC_IRQ(SCIF2, 250), INTC_IRQ(SCIF2, 251),
+        INTC_IRQ(SCIF3, 252), INTC_IRQ(SCIF3, 253),
+        INTC_IRQ(SCIF3, 254), INTC_IRQ(SCIF3, 255),
 };
 
 static struct intc_group groups[] __initdata = {
         INTC_GROUP(PINT, PINT0, PINT1, PINT2, PINT3,
                    PINT4, PINT5, PINT6, PINT7),
-        INTC_GROUP(DMAC0, DMAC0_DEI, DMAC0_HEI),
-        INTC_GROUP(DMAC1, DMAC1_DEI, DMAC1_HEI),
-        INTC_GROUP(DMAC2, DMAC2_DEI, DMAC2_HEI),
-        INTC_GROUP(DMAC3, DMAC3_DEI, DMAC3_HEI),
-        INTC_GROUP(DMAC4, DMAC4_DEI, DMAC4_HEI),
-        INTC_GROUP(DMAC5, DMAC5_DEI, DMAC5_HEI),
-        INTC_GROUP(DMAC6, DMAC6_DEI, DMAC6_HEI),
-        INTC_GROUP(DMAC7, DMAC7_DEI, DMAC7_HEI),
-        INTC_GROUP(MTU0_ABCD, MTU2_TGI0A, MTU2_TGI0B, MTU2_TGI0C, MTU2_TGI0D),
-        INTC_GROUP(MTU0_VEF, MTU2_TCI0V, MTU2_TGI0E, MTU2_TGI0F),
-        INTC_GROUP(MTU1_AB, MTU2_TGI1A, MTU2_TGI1B),
-        INTC_GROUP(MTU1_VU, MTU2_TCI1V, MTU2_TCI1U),
-        INTC_GROUP(MTU2_AB, MTU2_TGI2A, MTU2_TGI2B),
-        INTC_GROUP(MTU2_VU, MTU2_TCI2V, MTU2_TCI2U),
-        INTC_GROUP(MTU3_ABCD, MTU2_TGI3A, MTU2_TGI3B, MTU2_TGI3C, MTU2_TGI3D),
-        INTC_GROUP(MTU4_ABCD, MTU2_TGI4A, MTU2_TGI4B, MTU2_TGI4C, MTU2_TGI4D),
-        INTC_GROUP(MTU5, MTU2_TGI5U, MTU2_TGI5V, MTU2_TGI5W),
-        INTC_GROUP(POE2_12, POE2_OEI1, POE2_OEI2),
-        INTC_GROUP(MTU3S_ABCD, MTU2S_TGI3A, MTU2S_TGI3B,
-                   MTU2S_TGI3C, MTU2S_TGI3D),
-        INTC_GROUP(MTU4S_ABCD, MTU2S_TGI4A, MTU2S_TGI4B,
-                   MTU2S_TGI4C, MTU2S_TGI4D),
-        INTC_GROUP(MTU5S, MTU2S_TGI5U, MTU2S_TGI5V, MTU2S_TGI5W),
-        INTC_GROUP(IIC3, IIC3_STPI, IIC3_NAKI, IIC3_RXI, IIC3_TXI, IIC3_TEI),
-        INTC_GROUP(SCIF0, SCIF0_BRI, SCIF0_ERI, SCIF0_RXI, SCIF0_TXI),
-        INTC_GROUP(SCIF1, SCIF1_BRI, SCIF1_ERI, SCIF1_RXI, SCIF1_TXI),
-        INTC_GROUP(SCIF2, SCIF2_BRI, SCIF2_ERI, SCIF2_RXI, SCIF2_TXI),
-        INTC_GROUP(SCIF3, SCIF3_BRI, SCIF3_ERI, SCIF3_RXI, SCIF3_TXI),
 };
 
 static struct intc_prio_reg prio_registers[] __initdata = {
@@ -174,22 +136,22 @@ static struct plat_sci_port sci_platform_data[] = {
                 .mapbase        = 0xfffe8000,
                 .flags          = UPF_BOOT_AUTOCONF,
                 .type           = PORT_SCIF,
-                .irqs           =  { 241, 242, 243, 240 },
+                .irqs           = { 240, 240, 240, 240 },
         }, {
                 .mapbase        = 0xfffe8800,
                 .flags          = UPF_BOOT_AUTOCONF,
                 .type           = PORT_SCIF,
-                .irqs           =  { 245, 246, 247, 244 },
+                .irqs           = { 244, 244, 244, 244 },
         }, {
                 .mapbase        = 0xfffe9000,
                 .flags          = UPF_BOOT_AUTOCONF,
                 .type           = PORT_SCIF,
-                .irqs           =  { 249, 250, 251, 248 },
+                .irqs           = { 248, 248, 248, 248 },
         }, {
                 .mapbase        = 0xfffe9800,
                 .flags          = UPF_BOOT_AUTOCONF,
                 .type           = PORT_SCIF,
-                .irqs           =  { 253, 254, 255, 252 },
+                .irqs           = { 252, 252, 252, 252 },
         }, {
                 .flags = 0,
         }
diff --git a/arch/sh/kernel/cpu/sh3/Makefile b/arch/sh/kernel/cpu/sh3/Makefile
index e07c69e16d9b..ecab274141a8 100644
--- a/arch/sh/kernel/cpu/sh3/Makefile
+++ b/arch/sh/kernel/cpu/sh3/Makefile
@@ -4,6 +4,8 @@
 
 obj-y   := ex.o probe.o entry.o setup-sh3.o
 
+obj-$(CONFIG_HIBERNATION)               += swsusp.o
+
 # CPU subtype setup
 obj-$(CONFIG_CPU_SUBTYPE_SH7705)        += setup-sh7705.o
 obj-$(CONFIG_CPU_SUBTYPE_SH7706)        += setup-sh770x.o
diff --git a/arch/sh/kernel/cpu/sh3/entry.S b/arch/sh/kernel/cpu/sh3/entry.S
index b4106d0c68ec..55da0ff9848d 100644
--- a/arch/sh/kernel/cpu/sh3/entry.S
+++ b/arch/sh/kernel/cpu/sh3/entry.S
@@ -16,6 +16,7 @@
 #include <asm/unistd.h>
 #include <cpu/mmu_context.h>
 #include <asm/page.h>
+#include <asm/cache.h>
 
 ! NOTE:
 ! GNU as (as of 2.9.1) changes bf/s into bt/s and bra, when the address
@@ -187,44 +188,35 @@ call_dae:
 #if defined(CONFIG_SH_STANDARD_BIOS)
         /* Unwind the stack and jmp to the debug entry */
 ENTRY(sh_bios_handler)
-        mov.l   @r15+, r0
-        mov.l   @r15+, r1
-        mov.l   @r15+, r2
-        mov.l   @r15+, r3
-        mov.l   @r15+, r4
-        mov.l   @r15+, r5
-        mov.l   @r15+, r6
-        mov.l   @r15+, r7
-        stc     sr, r8
-        mov.l   1f, r9                  ! BL =1, RB=1, IMASK=0x0F
-        or      r9, r8
-        ldc     r8, sr                  ! here, change the register bank
-        mov.l   @r15+, r8
-        mov.l   @r15+, r9
-        mov.l   @r15+, r10
-        mov.l   @r15+, r11
-        mov.l   @r15+, r12
-        mov.l   @r15+, r13
-        mov.l   @r15+, r14
-        mov.l   @r15+, k0
-        ldc.l   @r15+, spc
-        lds.l   @r15+, pr
-        mov.l   @r15+, k1
-        ldc.l   @r15+, gbr
-        lds.l   @r15+, mach
-        lds.l   @r15+, macl
-        mov     k0, r15
+        mov.l   1f, r8
+        bsr     restore_regs
+         nop
+
+        lds     k2, pr                  ! restore pr
+        mov     k4, r15
         !
         mov.l   2f, k0
         mov.l   @k0, k0
         jmp     @k0
-         ldc    k1, ssr
+         ldc    k3, ssr
         .align  2
 1:      .long   0x300000f0
 2:      .long   gdb_vbr_vector
 #endif /* CONFIG_SH_STANDARD_BIOS */
 
-restore_all:
+! restore_regs()
+! - restore r0, r1, r2, r3, r4, r5, r6, r7 from the stack
+! - switch bank
+! - restore r8, r9, r10, r11, r12, r13, r14, r15 from the stack
+! - restore spc, pr*, ssr, gbr, mach, macl, skip default tra
+! k2 returns original pr
+! k3 returns original sr
+! k4 returns original stack pointer
+! r8 passes SR bitmask, overwritten with restored data on return
+! r9 trashed
+! BL=0 on entry, on exit BL=1 (depending on r8).
+
+ENTRY(restore_regs)
         mov.l   @r15+, r0
         mov.l   @r15+, r1
         mov.l   @r15+, r2
@@ -234,10 +226,9 @@ restore_all:
         mov.l   @r15+, r6
         mov.l   @r15+, r7
         !
-        stc     sr, r8
-        mov.l   7f, r9
-        or      r9, r8                  ! BL =1, RB=1
-        ldc     r8, sr                  ! here, change the register bank
+        stc     sr, r9
+        or      r8, r9
+        ldc     r9, sr
         !
         mov.l   @r15+, r8
         mov.l   @r15+, r9
@@ -248,12 +239,20 @@ restore_all:
         mov.l   @r15+, r14
         mov.l   @r15+, k4               ! original stack pointer
         ldc.l   @r15+, spc
-        lds.l   @r15+, pr
+        mov.l   @r15+, k2               ! original PR
         mov.l   @r15+, k3               ! original SR
         ldc.l   @r15+, gbr
         lds.l   @r15+, mach
         lds.l   @r15+, macl
-        add     #4, r15                 ! Skip syscall number
+        rts
+         add    #4, r15                 ! Skip syscall number
+
+restore_all:
+        mov.l   7f, r8
+        bsr     restore_regs
+         nop
+
+        lds     k2, pr                  ! restore pr
         !
 #ifdef CONFIG_SH_DSP
         mov.l   @r15+, k0               ! DSP mode marker
@@ -294,7 +293,7 @@ skip_restore:
         mov     #0xf0, k1
         extu.b  k1, k1
         not     k1, k1
-        and     k1, k2                  ! Mask orignal SR value
+        and     k1, k2                  ! Mask original SR value
         !
         mov     k3, k0                  ! Calculate IMASK-bits
         shlr2   k0
@@ -313,7 +312,6 @@ skip_restore:
         mov     #0, k1
         mov.b   k1, @k0
 #endif
-        mov.l   @r15+, k2               ! restore EXPEVT
         mov     k4, r15
         rte
          nop
@@ -336,81 +334,55 @@ skip_restore:
 ENTRY(vbr_base)
         .long   0
 !
+! 0x100: General exception vector
+!
         .balign         256,0,256
 general_exception:
-        mov.l   1f, k2
-        mov.l   2f, k3
-#ifdef CONFIG_CPU_SUBTYPE_SHX3
-        mov.l   @k2, k2
+#ifndef CONFIG_CPU_SUBTYPE_SHX3
+        bra     handle_exception
+         sts    pr, k3          ! save original pr value in k3
+#else
+        mov.l   1f, k4
+        mov.l   @k4, k4
 
         ! Is EXPEVT larger than 0x800?
         mov     #0x8, k0
         shll8   k0
-        cmp/hs  k0, k2
+        cmp/hs  k0, k4
         bf      0f
 
         ! then add 0x580 (k2 is 0xd80 or 0xda0)
         mov     #0x58, k0
         shll2   k0
         shll2   k0
-        add     k0, k2
+        add     k0, k4
 0:
-        bra     handle_exception
+        ! Setup stack and save DSP context (k0 contains original r15 on return)
+        bsr     prepare_stack_save_dsp
          nop
-#else
-        bra     handle_exception
-         mov.l  @k2, k2
-#endif
-        .align  2
-1:      .long   EXPEVT
-2:      .long   ret_from_exception
-!
-!
 
-        .balign         1024,0,1024
-tlb_miss:
-        mov.l   1f, k2
-        mov.l   4f, k3
-        bra     handle_exception
-         mov.l  @k2, k2
-!
-        .balign         512,0,512
-interrupt:
-        mov.l   3f, k3
-#if defined(CONFIG_KGDB)
-        mov.l   2f, k2
-        ! Debounce (filter nested NMI)
-        mov.l   @k2, k0
-        mov.l   5f, k1
-        cmp/eq  k1, k0
-        bf      0f
-        mov.l   6f, k1
-        tas.b   @k1
-        bt      0f
-        rte
+        ! Save registers / Switch to bank 0
+        mov             k4, k2          ! keep vector in k2
+        mov.l   1f, k4          ! SR bits to clear in k4
+        bsr     save_regs       ! needs original pr value in k3
+         nop
+
+        bra     handle_exception_special
          nop
-        .align  2
-2:      .long   INTEVT
-5:      .long   NMI_VEC
-6:      .long   in_nmi
-0:
-#endif /* defined(CONFIG_KGDB) */
-        bra     handle_exception
-         mov    #-1, k2         ! interrupt exception marker
 
         .align  2
 1:      .long   EXPEVT
-3:      .long   ret_from_irq
-4:      .long   ret_from_exception
+#endif
 
-!
-!
-        .align  2
-ENTRY(handle_exception)
-        ! Using k0, k1 for scratch registers (r0_bank1, r1_bank),
-        ! save all registers onto stack.
-        !
+! prepare_stack_save_dsp()
+! - roll back gRB
+! - switch to kernel stack
+! - save DSP
+! k0 returns original sp (after roll back)
+! k1 trashed
+! k2 trashed
 
+prepare_stack_save_dsp:
 #ifdef CONFIG_GUSA
         ! Check for roll back gRB (User and Kernel)
         mov     r15, k0
@@ -430,7 +402,7 @@ ENTRY(handle_exception)
 2:      mov     k1, r15         ! SP = r1
 1:
 #endif
-
+        ! Switch to kernel stack if needed
         stc     ssr, k0         ! Is it from kernel space?
         shll    k0              ! Check MD bit (bit30) by shifting it into...
         shll    k0              !       ...the T bit
@@ -443,18 +415,17 @@ ENTRY(handle_exception)
         add     current, k1
         mov     k1, r15         ! change to kernel stack
         !
-1:      mov.l   2f, k1
-        !
+1:
 #ifdef CONFIG_SH_DSP
-        mov.l   r2, @-r15               ! Save r2, we need another reg
-        stc     sr, k4
-        mov.l   1f, r2
-        tst     r2, k4                  ! Check if in DSP mode
-        mov.l   @r15+, r2               ! Restore r2 now
+        ! Save DSP context if needed
+        stc     sr, k1
+        mov     #0x10, k2
+        shll8   k2                      ! DSP=1 (0x00001000)
+        tst     k2, k1                  ! Check if in DSP mode (passed in k2)
         bt/s    skip_save
-         mov    #0, k4                  ! Set marker for no stack frame
+         mov    #0, k1                  ! Set marker for no stack frame
 
-        mov     r2, k4                  ! Backup r2 (in k4) for later
+        mov     k2, k1                  ! Save has-frame marker
 
         ! Save DSP registers on stack
         stc.l   mod, @-r15
@@ -473,35 +444,74 @@ ENTRY(handle_exception)
         ! as we're not at all interested in supporting ancient toolchains at
         ! this point. -- PFM.
 
-        mov     r15, r2
+        mov     r15, k2
         .word   0xf653                  ! movs.l        a1, @-r2
         .word   0xf6f3                  ! movs.l        a0g, @-r2
         .word   0xf6d3                  ! movs.l        a1g, @-r2
         .word   0xf6c3                  ! movs.l        m0, @-r2
         .word   0xf6e3                  ! movs.l        m1, @-r2
-        mov     r2, r15
+        mov     k2, r15
 
-        mov     k4, r2                  ! Restore r2
-        mov.l   1f, k4                  ! Force DSP stack frame
 skip_save:
-        mov.l   k4, @-r15               ! Push DSP mode marker onto stack
+        mov.l   k1, @-r15               ! Push DSP mode marker onto stack
 #endif
-        ! Save the user registers on the stack.
-        mov.l   k2, @-r15       ! EXPEVT
-
-        mov     #-1, k4
-        mov.l   k4, @-r15       ! set TRA (default: -1)
-        !
+        rts
+         nop
+!
+! 0x400: Instruction and Data TLB miss exception vector
+!
+        .balign         1024,0,1024
+tlb_miss:
+        sts     pr, k3          ! save original pr value in k3
+
+handle_exception:
+        mova    exception_data, k0
+
+        ! Setup stack and save DSP context (k0 contains original r15 on return)
+        bsr     prepare_stack_save_dsp
+         PREF(k0)
+
+        ! Save registers / Switch to bank 0
+        mov.l   5f, k2          ! vector register address
+        mov.l   1f, k4          ! SR bits to clear in k4
+        bsr     save_regs       ! needs original pr value in k3
+         mov.l  @k2, k2         ! read out vector and keep in k2
+
+handle_exception_special:
+        ! Setup return address and jump to exception handler
+        mov.l   7f, r9          ! fetch return address
+        stc     r2_bank, r0     ! k2 (vector)
+        mov.l   6f, r10
+        shlr2   r0
+        shlr    r0
+        mov.l   @(r0, r10), r10
+        jmp     @r10
+         lds    r9, pr          ! put return address in pr
+
+        .align  L1_CACHE_SHIFT
+
+! save_regs()
+! - save default tra, macl, mach, gbr, ssr, pr* and spc on the stack
+! - save r15*, r14, r13, r12, r11, r10, r9, r8 on the stack
+! - switch bank
+! - save r7, r6, r5, r4, r3, r2, r1, r0 on the stack
+! k0 contains original stack pointer*
+! k1 trashed
+! k3 passes original pr*
+! k4 passes SR bitmask
+! BL=1 on entry, on exit BL=0.
+
+ENTRY(save_regs)
+        mov     #-1, r1
+        mov.l   k1, @-r15       ! set TRA (default: -1)
         sts.l   macl, @-r15
         sts.l   mach, @-r15
         stc.l   gbr, @-r15
         stc.l   ssr, @-r15
-        sts.l   pr, @-r15
+        mov.l   k3, @-r15       ! original pr in k3
         stc.l   spc, @-r15
-        !
-        lds     k3, pr          ! Set the return address to pr
-        !
-        mov.l   k0, @-r15       ! save orignal stack
+
+        mov.l   k0, @-r15       ! original stack pointer in k0
         mov.l   r14, @-r15
         mov.l   r13, @-r15
         mov.l   r12, @-r15
@@ -509,13 +519,23 @@ skip_save:
         mov.l   r10, @-r15
         mov.l   r9, @-r15
         mov.l   r8, @-r15
-        !
-        stc     sr, r8          ! Back to normal register bank, and
-        or      k1, r8          ! Block all interrupts
-        mov.l   3f, k1
-        and     k1, r8          ! ...
-        ldc     r8, sr          ! ...changed here.
-        !
+
+        mov.l   0f, k3          ! SR bits to set in k3
+
+        ! fall-through
+
+! save_low_regs()
+! - modify SR for bank switch
+! - save r7, r6, r5, r4, r3, r2, r1, r0 on the stack
+! k3 passes bits to set in SR
+! k4 passes bits to clear in SR
+
+ENTRY(save_low_regs)
+        stc     sr, r8
+        or      k3, r8
+        and     k4, r8
+        ldc     r8, sr
+
         mov.l   r7, @-r15
         mov.l   r6, @-r15
         mov.l   r5, @-r15
@@ -523,52 +543,63 @@ skip_save:
         mov.l   r3, @-r15
         mov.l   r2, @-r15
         mov.l   r1, @-r15
-        mov.l   r0, @-r15
-
-        /*
-         * This gets a bit tricky.. in the INTEVT case we don't want to use
-         * the VBR offset as a destination in the jump call table, since all
-         * of the destinations are the same. In this case, (interrupt) sets
-         * a marker in r2 (now r2_bank since SR.RB changed), which we check
-         * to determine the exception type. For all other exceptions, we
-         * forcibly read EXPEVT from memory and fix up the jump address, in
-         * the interrupt exception case we jump to do_IRQ() and defer the
-         * INTEVT read until there. As a bonus, we can also clean up the SR.RB
-         * checks that do_IRQ() was doing..
-         */
-        stc     r2_bank, r8
-        cmp/pz  r8
-        bf      interrupt_exception
-        shlr2   r8
-        shlr    r8
-        mov.l   4f, r9
-        add     r8, r9
-        mov.l   @r9, r9
-        jmp     @r9
-         nop
         rts
-         nop
+         mov.l  r0, @-r15
 
+!
+! 0x600: Interrupt / NMI vector
+!
+        .balign         512,0,512
+ENTRY(handle_interrupt)
+#if defined(CONFIG_KGDB)
+        mov.l   2f, k2
+        ! Debounce (filter nested NMI)
+        mov.l   @k2, k0
+        mov.l   9f, k1
+        cmp/eq  k1, k0
+        bf      11f
+        mov.l   10f, k1
+        tas.b   @k1
+        bt      11f
+        rte
+         nop
         .align  2
-1:      .long   0x00001000      ! DSP=1
-2:      .long   0x000080f0      ! FD=1, IMASK=15
-3:      .long   0xcfffffff      ! RB=0, BL=0
-4:      .long   exception_handling_table
+9:      .long   NMI_VEC
+10:     .long   in_nmi
+11:
+#endif /* defined(CONFIG_KGDB) */
+        sts     pr, k3          ! save original pr value in k3
+        mova    exception_data, k0
 
-interrupt_exception:
-        mov.l   1f, r9
+        ! Setup stack and save DSP context (k0 contains original r15 on return)
+        bsr     prepare_stack_save_dsp
+         PREF(k0)
+
+        ! Save registers / Switch to bank 0
+        mov.l   1f, k4          ! SR bits to clear in k4
+        bsr     save_regs       ! needs original pr value in k3
+         mov    #-1, k2         ! default vector kept in k2
+
+        ! Setup return address and jump to do_IRQ
+        mov.l   4f, r9          ! fetch return address
+        lds     r9, pr          ! put return address in pr
         mov.l   2f, r4
-        mov.l   @r4, r4
+        mov.l   3f, r9
+        mov.l   @r4, r4         ! pass INTEVT vector as arg0
         jmp     @r9
-         mov    r15, r5
-        rts
-         nop
-
-        .align 2
-1:      .long   do_IRQ
-2:      .long   INTEVT
+         mov    r15, r5         ! pass saved registers as arg1
 
-        .align  2
 ENTRY(exception_none)
         rts
          nop
+
+        .align  L1_CACHE_SHIFT
+exception_data:
+0:      .long   0x000080f0      ! FD=1, IMASK=15
+1:      .long   0xcfffffff      ! RB=0, BL=0
+2:      .long   INTEVT
+3:      .long   do_IRQ
+4:      .long   ret_from_irq
+5:      .long   EXPEVT
+6:      .long   exception_handling_table
+7:      .long   ret_from_exception
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7705.c b/arch/sh/kernel/cpu/sh3/setup-sh7705.c
index 6468ae86b944..63b67badd67e 100644
--- a/arch/sh/kernel/cpu/sh3/setup-sh7705.c
+++ b/arch/sh/kernel/cpu/sh3/setup-sh7705.c
@@ -1,7 +1,7 @@
 /*
  * SH7705 Setup
  *
- *  Copyright (C) 2006, 2007  Paul Mundt
+ *  Copyright (C) 2006 - 2009  Paul Mundt
  *  Copyright (C) 2007  Nobuhiro Iwamatsu
  *
  * This file is subject to the terms and conditions of the GNU General Public
@@ -21,51 +21,36 @@ enum {
         /* interrupt sources */
         IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5,
         PINT07, PINT815,
-        DMAC_DEI0, DMAC_DEI1, DMAC_DEI2, DMAC_DEI3,
-        SCIF0_ERI, SCIF0_RXI, SCIF0_TXI,
-        SCIF2_ERI, SCIF2_RXI, SCIF2_TXI,
-        ADC_ADI,
-        USB_USI0, USB_USI1,
+
+        DMAC, SCIF0, SCIF2, ADC_ADI, USB,
+
         TPU0, TPU1, TPU2, TPU3,
-        TMU0, TMU1, TMU2_TUNI, TMU2_TICPI,
-        RTC_ATI, RTC_PRI, RTC_CUI,
-        WDT,
-        REF_RCMI,
+        TMU0, TMU1, TMU2,
 
-        /* interrupt groups */
-        RTC, TMU2, DMAC, USB, SCIF2, SCIF0,
+        RTC, WDT, REF_RCMI,
 };
 
 static struct intc_vect vectors[] __initdata = {
         /* IRQ0->5 are handled in setup-sh3.c */
         INTC_VECT(PINT07, 0x700), INTC_VECT(PINT815, 0x720),
-        INTC_VECT(DMAC_DEI0, 0x800), INTC_VECT(DMAC_DEI1, 0x820),
-        INTC_VECT(DMAC_DEI2, 0x840), INTC_VECT(DMAC_DEI3, 0x860),
-        INTC_VECT(SCIF0_ERI, 0x880), INTC_VECT(SCIF0_RXI, 0x8a0),
-        INTC_VECT(SCIF0_TXI, 0x8e0),
-        INTC_VECT(SCIF2_ERI, 0x900), INTC_VECT(SCIF2_RXI, 0x920),
-        INTC_VECT(SCIF2_TXI, 0x960),
+        INTC_VECT(DMAC, 0x800), INTC_VECT(DMAC, 0x820),
+        INTC_VECT(DMAC, 0x840), INTC_VECT(DMAC, 0x860),
+        INTC_VECT(SCIF0, 0x880), INTC_VECT(SCIF0, 0x8a0),
+        INTC_VECT(SCIF0, 0x8e0),
+        INTC_VECT(SCIF2, 0x900), INTC_VECT(SCIF2, 0x920),
+        INTC_VECT(SCIF2, 0x960),
         INTC_VECT(ADC_ADI, 0x980),
-        INTC_VECT(USB_USI0, 0xa20), INTC_VECT(USB_USI1, 0xa40),
+        INTC_VECT(USB, 0xa20), INTC_VECT(USB, 0xa40),
         INTC_VECT(TPU0, 0xc00), INTC_VECT(TPU1, 0xc20),
         INTC_VECT(TPU2, 0xc80), INTC_VECT(TPU3, 0xca0),
         INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420),
-        INTC_VECT(TMU2_TUNI, 0x440), INTC_VECT(TMU2_TICPI, 0x460),
-        INTC_VECT(RTC_ATI, 0x480), INTC_VECT(RTC_PRI, 0x4a0),
-        INTC_VECT(RTC_CUI, 0x4c0),
+        INTC_VECT(TMU2, 0x440), INTC_VECT(TMU2, 0x460),
+        INTC_VECT(RTC, 0x480), INTC_VECT(RTC, 0x4a0),
+        INTC_VECT(RTC, 0x4c0),
         INTC_VECT(WDT, 0x560),
         INTC_VECT(REF_RCMI, 0x580),
 };
 
-static struct intc_group groups[] __initdata = {
-        INTC_GROUP(RTC, RTC_ATI, RTC_PRI, RTC_CUI),
-        INTC_GROUP(TMU2, TMU2_TUNI, TMU2_TICPI),
-        INTC_GROUP(DMAC, DMAC_DEI0, DMAC_DEI1, DMAC_DEI2, DMAC_DEI3),
-        INTC_GROUP(USB, USB_USI0, USB_USI1),
-        INTC_GROUP(SCIF0, SCIF0_ERI, SCIF0_RXI, SCIF0_TXI),
-        INTC_GROUP(SCIF2, SCIF2_ERI, SCIF2_RXI, SCIF2_TXI),
-};
-
 static struct intc_prio_reg prio_registers[] __initdata = {
         { 0xfffffee2, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } },
         { 0xfffffee4, 0, 16, 4, /* IPRB */ { WDT, REF_RCMI, 0, 0 } },
@@ -78,7 +63,7 @@ static struct intc_prio_reg prio_registers[] __initdata = {
 
 };
 
-static DECLARE_INTC_DESC(intc_desc, "sh7705", vectors, groups,
+static DECLARE_INTC_DESC(intc_desc, "sh7705", vectors, NULL,
                          NULL, prio_registers, NULL);
 
 static struct plat_sci_port sci_platform_data[] = {
@@ -86,12 +71,12 @@ static struct plat_sci_port sci_platform_data[] = {
                 .mapbase        = 0xa4410000,
                 .flags          = UPF_BOOT_AUTOCONF,
                 .type           = PORT_SCIF,
-                .irqs           = { 56, 57, 59 },
+                .irqs           = { 56, 56, 56 },
         }, {
                 .mapbase        = 0xa4400000,
                 .flags          = UPF_BOOT_AUTOCONF,
                 .type           = PORT_SCIF,
-                .irqs           = { 52, 53, 55 },
+                .irqs           = { 52, 52, 52 },
         }, {
                 .flags = 0,
         }
@@ -115,14 +100,6 @@ static struct resource rtc_resources[] = {
                 .start  = 20,
                 .flags  = IORESOURCE_IRQ,
         },
-        [2] =   {
-                .start  = 21,
-                .flags  = IORESOURCE_IRQ,
-        },
-        [3] =   {
-                .start  = 22,
-                .flags  = IORESOURCE_IRQ,
-        },
 };
 
 static struct sh_rtc_platform_info rtc_info = {
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh770x.c b/arch/sh/kernel/cpu/sh3/setup-sh770x.c
index 93c55e2ed952..a74f960b5e79 100644
--- a/arch/sh/kernel/cpu/sh3/setup-sh770x.c
+++ b/arch/sh/kernel/cpu/sh3/setup-sh770x.c
@@ -2,6 +2,7 @@
  * SH3 Setup code for SH7706, SH7707, SH7708, SH7709
  *
  *  Copyright (C) 2007  Magnus Damm
+ *  Copyright (C) 2009  Paul Mundt
  *
  * Based on setup-sh7709.c
  *
@@ -24,46 +25,37 @@ enum {
         /* interrupt sources */
         IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5,
         PINT07, PINT815,
-        DMAC_DEI0, DMAC_DEI1, DMAC_DEI2, DMAC_DEI3,
-        SCIF0_ERI, SCIF0_RXI, SCIF0_BRI, SCIF0_TXI,
-        SCIF2_ERI, SCIF2_RXI, SCIF2_BRI, SCIF2_TXI,
-        SCI_ERI, SCI_RXI, SCI_TXI, SCI_TEI,
-        ADC_ADI,
+        DMAC, SCIF0, SCIF2, SCI, ADC_ADI,
         LCDC, PCC0, PCC1,
-        TMU0, TMU1, TMU2_TUNI, TMU2_TICPI,
-        RTC_ATI, RTC_PRI, RTC_CUI,
-        WDT,
-        REF_RCMI, REF_ROVI,
-
-        /* interrupt groups */
-        RTC, REF, TMU2, DMAC, SCI, SCIF2, SCIF0,
+        TMU0, TMU1, TMU2,
+        RTC, WDT, REF,
 };
 
 static struct intc_vect vectors[] __initdata = {
         INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420),
-        INTC_VECT(TMU2_TUNI, 0x440), INTC_VECT(TMU2_TICPI, 0x460),
-        INTC_VECT(RTC_ATI, 0x480), INTC_VECT(RTC_PRI, 0x4a0),
-        INTC_VECT(RTC_CUI, 0x4c0),
-        INTC_VECT(SCI_ERI, 0x4e0), INTC_VECT(SCI_RXI, 0x500),
-        INTC_VECT(SCI_TXI, 0x520), INTC_VECT(SCI_TEI, 0x540),
+        INTC_VECT(TMU2, 0x440), INTC_VECT(TMU2, 0x460),
+        INTC_VECT(RTC, 0x480), INTC_VECT(RTC, 0x4a0),
+        INTC_VECT(RTC, 0x4c0),
+        INTC_VECT(SCI, 0x4e0), INTC_VECT(SCI, 0x500),
+        INTC_VECT(SCI, 0x520), INTC_VECT(SCI, 0x540),
         INTC_VECT(WDT, 0x560),
-        INTC_VECT(REF_RCMI, 0x580),
-        INTC_VECT(REF_ROVI, 0x5a0),
+        INTC_VECT(REF, 0x580),
+        INTC_VECT(REF, 0x5a0),
 #if defined(CONFIG_CPU_SUBTYPE_SH7706) || \
     defined(CONFIG_CPU_SUBTYPE_SH7707) || \
     defined(CONFIG_CPU_SUBTYPE_SH7709)
         /* IRQ0->5 are handled in setup-sh3.c */
-        INTC_VECT(DMAC_DEI0, 0x800), INTC_VECT(DMAC_DEI1, 0x820),
-        INTC_VECT(DMAC_DEI2, 0x840), INTC_VECT(DMAC_DEI3, 0x860),
+        INTC_VECT(DMAC, 0x800), INTC_VECT(DMAC, 0x820),
+        INTC_VECT(DMAC, 0x840), INTC_VECT(DMAC, 0x860),
         INTC_VECT(ADC_ADI, 0x980),
-        INTC_VECT(SCIF2_ERI, 0x900), INTC_VECT(SCIF2_RXI, 0x920),
-        INTC_VECT(SCIF2_BRI, 0x940), INTC_VECT(SCIF2_TXI, 0x960),
+        INTC_VECT(SCIF2, 0x900), INTC_VECT(SCIF2, 0x920),
+        INTC_VECT(SCIF2, 0x940), INTC_VECT(SCIF2, 0x960),
 #endif
 #if defined(CONFIG_CPU_SUBTYPE_SH7707) || \
     defined(CONFIG_CPU_SUBTYPE_SH7709)
         INTC_VECT(PINT07, 0x700), INTC_VECT(PINT815, 0x720),
-        INTC_VECT(SCIF0_ERI, 0x880), INTC_VECT(SCIF0_RXI, 0x8a0),
-        INTC_VECT(SCIF0_BRI, 0x8c0), INTC_VECT(SCIF0_TXI, 0x8e0),
+        INTC_VECT(SCIF0, 0x880), INTC_VECT(SCIF0, 0x8a0),
+        INTC_VECT(SCIF0, 0x8c0), INTC_VECT(SCIF0, 0x8e0),
 #endif
 #if defined(CONFIG_CPU_SUBTYPE_SH7707)
         INTC_VECT(LCDC, 0x9a0),
@@ -71,16 +63,6 @@ static struct intc_vect vectors[] __initdata = {
 #endif
 };
 
-static struct intc_group groups[] __initdata = {
-        INTC_GROUP(RTC, RTC_ATI, RTC_PRI, RTC_CUI),
-        INTC_GROUP(TMU2, TMU2_TUNI, TMU2_TICPI),
-        INTC_GROUP(REF, REF_RCMI, REF_ROVI),
-        INTC_GROUP(DMAC, DMAC_DEI0, DMAC_DEI1, DMAC_DEI2, DMAC_DEI3),
-        INTC_GROUP(SCI, SCI_ERI, SCI_RXI, SCI_TXI, SCI_TEI),
-        INTC_GROUP(SCIF0, SCIF0_ERI, SCIF0_RXI, SCIF0_BRI, SCIF0_TXI),
-        INTC_GROUP(SCIF2, SCIF2_ERI, SCIF2_RXI, SCIF2_BRI, SCIF2_TXI),
-};
-
 static struct intc_prio_reg prio_registers[] __initdata = {
         { 0xfffffee2, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } },
         { 0xfffffee4, 0, 16, 4, /* IPRB */ { WDT, REF, SCI, 0 } },
@@ -101,7 +83,7 @@ static struct intc_prio_reg prio_registers[] __initdata = {
 #endif
 };
 
-static DECLARE_INTC_DESC(intc_desc, "sh770x", vectors, groups,
+static DECLARE_INTC_DESC(intc_desc, "sh770x", vectors, NULL,
                          NULL, prio_registers, NULL);
 
 static struct resource rtc_resources[] = {
@@ -111,14 +93,6 @@ static struct resource rtc_resources[] = {
                 .flags  = IORESOURCE_IO,
         },
         [1] =   {
-                .start  = 21,
-                .flags  = IORESOURCE_IRQ,
-        },
-        [2] =   {
-                .start  = 22,
-                .flags  = IORESOURCE_IRQ,
-        },
-        [3] =   {
                 .start  = 20,
                 .flags  = IORESOURCE_IRQ,
         },
@@ -136,7 +110,7 @@ static struct plat_sci_port sci_platform_data[] = {
                 .mapbase        = 0xfffffe80,
                 .flags          = UPF_BOOT_AUTOCONF,
                 .type           = PORT_SCI,
-                .irqs           = { 23, 24, 25, 0 },
+                .irqs           = { 23, 23, 23, 0 },
         },
 #if defined(CONFIG_CPU_SUBTYPE_SH7706) || \
     defined(CONFIG_CPU_SUBTYPE_SH7707) || \
@@ -145,7 +119,7 @@ static struct plat_sci_port sci_platform_data[] = {
                 .mapbase        = 0xa4000150,
                 .flags          = UPF_BOOT_AUTOCONF,
                 .type           = PORT_SCIF,
-                .irqs           = { 56, 57, 59, 58 },
+                .irqs           = { 56, 56, 56, 56 },
         },
 #endif
 #if defined(CONFIG_CPU_SUBTYPE_SH7707) || \
@@ -154,7 +128,7 @@ static struct plat_sci_port sci_platform_data[] = {
                 .mapbase        = 0xa4000140,
                 .flags          = UPF_BOOT_AUTOCONF,
                 .type           = PORT_IRDA,
-                .irqs           = { 52, 53, 55, 54 },
+                .irqs           = { 52, 52, 52, 52 },
         },
 #endif
         {
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7710.c b/arch/sh/kernel/cpu/sh3/setup-sh7710.c
index 77eee481de47..335098b66e2f 100644
--- a/arch/sh/kernel/cpu/sh3/setup-sh7710.c
+++ b/arch/sh/kernel/cpu/sh3/setup-sh7710.c
@@ -1,7 +1,7 @@
 /*
  * SH3 Setup code for SH7710, SH7712
  *
- *  Copyright (C) 2006, 2007  Paul Mundt
+ *  Copyright (C) 2006 - 2009  Paul Mundt
  *  Copyright (C) 2007  Nobuhiro Iwamatsu
  *
  * This file is subject to the terms and conditions of the GNU General Public
@@ -20,59 +20,40 @@ enum {
 
         /* interrupt sources */
         IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5,
-        DMAC_DEI0, DMAC_DEI1, DMAC_DEI2, DMAC_DEI3,
-        SCIF0_ERI, SCIF0_RXI, SCIF0_BRI, SCIF0_TXI,
-        SCIF1_ERI, SCIF1_RXI, SCIF1_BRI, SCIF1_TXI,
-        DMAC_DEI4, DMAC_DEI5,
-        IPSEC,
+        DMAC1, SCIF0, SCIF1, DMAC2, IPSEC,
         EDMAC0, EDMAC1, EDMAC2,
-        SIOF0_ERI, SIOF0_TXI, SIOF0_RXI, SIOF0_CCI,
-        SIOF1_ERI, SIOF1_TXI, SIOF1_RXI, SIOF1_CCI,
-        TMU0, TMU1, TMU2,
-        RTC_ATI, RTC_PRI, RTC_CUI,
-        WDT,
-        REF,
+        SIOF0, SIOF1,
 
-        /* interrupt groups */
-        RTC, DMAC1, SCIF0, SCIF1, DMAC2, SIOF0, SIOF1,
+        TMU0, TMU1, TMU2,
+        RTC, WDT, REF,
 };
 
 static struct intc_vect vectors[] __initdata = {
         /* IRQ0->5 are handled in setup-sh3.c */
-        INTC_VECT(DMAC_DEI0, 0x800), INTC_VECT(DMAC_DEI1, 0x820),
-        INTC_VECT(DMAC_DEI2, 0x840), INTC_VECT(DMAC_DEI3, 0x860),
-        INTC_VECT(SCIF0_ERI, 0x880), INTC_VECT(SCIF0_RXI, 0x8a0),
-        INTC_VECT(SCIF0_BRI, 0x8c0), INTC_VECT(SCIF0_TXI, 0x8e0),
-        INTC_VECT(SCIF1_ERI, 0x900), INTC_VECT(SCIF1_RXI, 0x920),
-        INTC_VECT(SCIF1_BRI, 0x940), INTC_VECT(SCIF1_TXI, 0x960),
-        INTC_VECT(DMAC_DEI4, 0xb80), INTC_VECT(DMAC_DEI5, 0xba0),
+        INTC_VECT(DMAC1, 0x800), INTC_VECT(DMAC1, 0x820),
+        INTC_VECT(DMAC1, 0x840), INTC_VECT(DMAC1, 0x860),
+        INTC_VECT(SCIF0, 0x880), INTC_VECT(SCIF0, 0x8a0),
+        INTC_VECT(SCIF0, 0x8c0), INTC_VECT(SCIF0, 0x8e0),
+        INTC_VECT(SCIF1, 0x900), INTC_VECT(SCIF1, 0x920),
+        INTC_VECT(SCIF1, 0x940), INTC_VECT(SCIF1, 0x960),
+        INTC_VECT(DMAC2, 0xb80), INTC_VECT(DMAC2, 0xba0),
 #ifdef CONFIG_CPU_SUBTYPE_SH7710
         INTC_VECT(IPSEC, 0xbe0),
 #endif
         INTC_VECT(EDMAC0, 0xc00), INTC_VECT(EDMAC1, 0xc20),
         INTC_VECT(EDMAC2, 0xc40),
-        INTC_VECT(SIOF0_ERI, 0xe00), INTC_VECT(SIOF0_TXI, 0xe20),
-        INTC_VECT(SIOF0_RXI, 0xe40), INTC_VECT(SIOF0_CCI, 0xe60),
-        INTC_VECT(SIOF1_ERI, 0xe80), INTC_VECT(SIOF1_TXI, 0xea0),
-        INTC_VECT(SIOF1_RXI, 0xec0), INTC_VECT(SIOF1_CCI, 0xee0),
+        INTC_VECT(SIOF0, 0xe00), INTC_VECT(SIOF0, 0xe20),
+        INTC_VECT(SIOF0, 0xe40), INTC_VECT(SIOF0, 0xe60),
+        INTC_VECT(SIOF1, 0xe80), INTC_VECT(SIOF1, 0xea0),
+        INTC_VECT(SIOF1, 0xec0), INTC_VECT(SIOF1, 0xee0),
         INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420),
         INTC_VECT(TMU2, 0x440),
-        INTC_VECT(RTC_ATI, 0x480), INTC_VECT(RTC_PRI, 0x4a0),
-        INTC_VECT(RTC_CUI, 0x4c0),
+        INTC_VECT(RTC, 0x480), INTC_VECT(RTC, 0x4a0),
+        INTC_VECT(RTC, 0x4c0),
         INTC_VECT(WDT, 0x560),
         INTC_VECT(REF, 0x580),
 };
 
-static struct intc_group groups[] __initdata = {
-        INTC_GROUP(RTC, RTC_ATI, RTC_PRI, RTC_CUI),
-        INTC_GROUP(DMAC1, DMAC_DEI0, DMAC_DEI1, DMAC_DEI2, DMAC_DEI3),
-        INTC_GROUP(SCIF0, SCIF0_ERI, SCIF0_RXI, SCIF0_BRI, SCIF0_TXI),
-        INTC_GROUP(SCIF1, SCIF1_ERI, SCIF1_RXI, SCIF1_BRI, SCIF1_TXI),
-        INTC_GROUP(DMAC2, DMAC_DEI4, DMAC_DEI5),
-        INTC_GROUP(SIOF0, SIOF0_ERI, SIOF0_TXI, SIOF0_RXI, SIOF0_CCI),
-        INTC_GROUP(SIOF1, SIOF1_ERI, SIOF1_TXI, SIOF1_RXI, SIOF1_CCI),
-};
-
 static struct intc_prio_reg prio_registers[] __initdata = {
         { 0xfffffee2, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } },
         { 0xfffffee4, 0, 16, 4, /* IPRB */ { WDT, REF, 0, 0 } },
@@ -85,7 +66,7 @@ static struct intc_prio_reg prio_registers[] __initdata = {
         { 0xa4080006, 0, 16, 4, /* IPRI */ { 0, 0, SIOF1 } },
 };
 
-static DECLARE_INTC_DESC(intc_desc, "sh7710", vectors, groups,
+static DECLARE_INTC_DESC(intc_desc, "sh7710", vectors, NULL,
                          NULL, prio_registers, NULL);
 
 static struct resource rtc_resources[] = {
@@ -98,14 +79,6 @@ static struct resource rtc_resources[] = {
                 .start  = 20,
                 .flags  = IORESOURCE_IRQ,
         },
-        [2] =   {
-                .start  = 21,
-                .flags  = IORESOURCE_IRQ,
-        },
-        [3] =   {
-                .start  = 22,
-                .flags  = IORESOURCE_IRQ,
-        },
 };
 
 static struct sh_rtc_platform_info rtc_info = {
@@ -127,12 +100,12 @@ static struct plat_sci_port sci_platform_data[] = {
                 .mapbase        = 0xa4400000,
                 .flags          = UPF_BOOT_AUTOCONF,
                 .type           = PORT_SCIF,
-                .irqs           = { 52, 53, 55, 54 },
+                .irqs           = { 52, 52, 52, 52 },
         }, {
                 .mapbase        = 0xa4410000,
                 .flags          = UPF_BOOT_AUTOCONF,
                 .type           = PORT_SCIF,
-                .irqs           = { 56, 57, 59, 58 },
+                .irqs           = { 56, 56, 56, 56 },
         }, {
 
                 .flags = 0,
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7720.c b/arch/sh/kernel/cpu/sh3/setup-sh7720.c
index f807a21b066c..003874a2fd2a 100644
--- a/arch/sh/kernel/cpu/sh3/setup-sh7720.c
+++ b/arch/sh/kernel/cpu/sh3/setup-sh7720.c
@@ -2,6 +2,7 @@
  * SH7720 Setup
  *
  *  Copyright (C) 2007  Markus Brunner, Mark Jonas
+ *  Copyright (C) 2009  Paul Mundt
  *
  *  Based on arch/sh/kernel/cpu/sh4/setup-sh7750.c:
  *
@@ -26,17 +27,7 @@ static struct resource rtc_resources[] = {
                 .flags  = IORESOURCE_IO,
         },
         [1] = {
-                /* Period IRQ */
-                .start  = 21,
-                .flags  = IORESOURCE_IRQ,
-        },
-        [2] = {
-                /* Carry IRQ */
-                .start  = 22,
-                .flags  = IORESOURCE_IRQ,
-        },
-        [3] = {
-                /* Alarm IRQ */
+                /* Shared Period/Carry/Alarm IRQ */
                 .start  = 20,
                 .flags  = IORESOURCE_IRQ,
         },
@@ -150,62 +141,49 @@ enum {
         UNUSED = 0,
 
         /* interrupt sources */
-        TMU0, TMU1, TMU2, RTC_ATI, RTC_PRI, RTC_CUI,
-        WDT, REF_RCMI, SIM_ERI, SIM_RXI, SIM_TXI, SIM_TEND,
+        TMU0, TMU1, TMU2, RTC,
+        WDT, REF_RCMI, SIM,
         IRQ0, IRQ1, IRQ2, IRQ3,
         USBF_SPD, TMU_SUNI, IRQ5, IRQ4,
-        DMAC1_DEI0, DMAC1_DEI1, DMAC1_DEI2, DMAC1_DEI3, LCDC, SSL,
-        ADC, DMAC2_DEI4, DMAC2_DEI5, USBFI0, USBFI1, CMT,
+        DMAC1, LCDC, SSL,
+        ADC, DMAC2, USBFI, CMT,
         SCIF0, SCIF1,
-        PINT07, PINT815, TPU0, TPU1, TPU2, TPU3, IIC,
-        SIOF0, SIOF1, MMCI0, MMCI1, MMCI2, MMCI3, PCC,
+        PINT07, PINT815, TPU, IIC,
+        SIOF0, SIOF1, MMC, PCC,
         USBHI, AFEIF,
         H_UDI,
-        /* interrupt groups */
-        TMU, RTC, SIM, DMAC1, USBFI, DMAC2, USB, TPU, MMC,
 };
 
 static struct intc_vect vectors[] __initdata = {
         /* IRQ0->5 are handled in setup-sh3.c */
         INTC_VECT(TMU0, 0x400),       INTC_VECT(TMU1, 0x420),
-        INTC_VECT(TMU2, 0x440),       INTC_VECT(RTC_ATI, 0x480),
-        INTC_VECT(RTC_PRI, 0x4a0),    INTC_VECT(RTC_CUI, 0x4c0),
-        INTC_VECT(SIM_ERI, 0x4e0),    INTC_VECT(SIM_RXI, 0x500),
-        INTC_VECT(SIM_TXI, 0x520),    INTC_VECT(SIM_TEND, 0x540),
+        INTC_VECT(TMU2, 0x440),       INTC_VECT(RTC, 0x480),
+        INTC_VECT(RTC, 0x4a0),        INTC_VECT(RTC, 0x4c0),
+        INTC_VECT(SIM, 0x4e0),        INTC_VECT(SIM, 0x500),
+        INTC_VECT(SIM, 0x520),        INTC_VECT(SIM, 0x540),
         INTC_VECT(WDT, 0x560),        INTC_VECT(REF_RCMI, 0x580),
         /* H_UDI cannot be masked */  INTC_VECT(TMU_SUNI, 0x6c0),
-        INTC_VECT(USBF_SPD, 0x6e0),   INTC_VECT(DMAC1_DEI0, 0x800),
-        INTC_VECT(DMAC1_DEI1, 0x820), INTC_VECT(DMAC1_DEI2, 0x840),
-        INTC_VECT(DMAC1_DEI3, 0x860), INTC_VECT(LCDC, 0x900),
+        INTC_VECT(USBF_SPD, 0x6e0),   INTC_VECT(DMAC1, 0x800),
+        INTC_VECT(DMAC1, 0x820),      INTC_VECT(DMAC1, 0x840),
+        INTC_VECT(DMAC1, 0x860),      INTC_VECT(LCDC, 0x900),
 #if defined(CONFIG_CPU_SUBTYPE_SH7720)
         INTC_VECT(SSL, 0x980),
 #endif
-        INTC_VECT(USBFI0, 0xa20),     INTC_VECT(USBFI1, 0xa40),
+        INTC_VECT(USBFI, 0xa20),      INTC_VECT(USBFI, 0xa40),
         INTC_VECT(USBHI, 0xa60),
-        INTC_VECT(DMAC2_DEI4, 0xb80), INTC_VECT(DMAC2_DEI5, 0xba0),
+        INTC_VECT(DMAC2, 0xb80),      INTC_VECT(DMAC2, 0xba0),
         INTC_VECT(ADC, 0xbe0),        INTC_VECT(SCIF0, 0xc00),
         INTC_VECT(SCIF1, 0xc20),      INTC_VECT(PINT07, 0xc80),
         INTC_VECT(PINT815, 0xca0),    INTC_VECT(SIOF0, 0xd00),
-        INTC_VECT(SIOF1, 0xd20),      INTC_VECT(TPU0, 0xd80),
-        INTC_VECT(TPU1, 0xda0),       INTC_VECT(TPU2, 0xdc0),
-        INTC_VECT(TPU3, 0xde0),       INTC_VECT(IIC, 0xe00),
-        INTC_VECT(MMCI0, 0xe80),      INTC_VECT(MMCI1, 0xea0),
-        INTC_VECT(MMCI2, 0xec0),      INTC_VECT(MMCI3, 0xee0),
+        INTC_VECT(SIOF1, 0xd20),      INTC_VECT(TPU, 0xd80),
+        INTC_VECT(TPU, 0xda0),        INTC_VECT(TPU, 0xdc0),
+        INTC_VECT(TPU, 0xde0),        INTC_VECT(IIC, 0xe00),
+        INTC_VECT(MMC, 0xe80),        INTC_VECT(MMC, 0xea0),
+        INTC_VECT(MMC, 0xec0),        INTC_VECT(MMC, 0xee0),
         INTC_VECT(CMT, 0xf00),        INTC_VECT(PCC, 0xf60),
         INTC_VECT(AFEIF, 0xfe0),
 };
 
-static struct intc_group groups[] __initdata = {
-        INTC_GROUP(TMU, TMU0, TMU1, TMU2),
-        INTC_GROUP(RTC, RTC_ATI, RTC_PRI, RTC_CUI),
-        INTC_GROUP(SIM, SIM_ERI, SIM_RXI, SIM_TXI, SIM_TEND),
-        INTC_GROUP(DMAC1, DMAC1_DEI0, DMAC1_DEI1, DMAC1_DEI2, DMAC1_DEI3),
-        INTC_GROUP(USBFI, USBFI0, USBFI1),
-        INTC_GROUP(DMAC2, DMAC2_DEI4, DMAC2_DEI5),
-        INTC_GROUP(TPU, TPU0, TPU1, TPU2, TPU3),
-        INTC_GROUP(MMC, MMCI0, MMCI1, MMCI2, MMCI3),
-};
-
 static struct intc_prio_reg prio_registers[] __initdata = {
         { 0xA414FEE2UL, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } },
         { 0xA414FEE4UL, 0, 16, 4, /* IPRB */ { WDT, REF_RCMI, SIM, 0 } },
@@ -219,7 +197,7 @@ static struct intc_prio_reg prio_registers[] __initdata = {
         { 0xA4080008UL, 0, 16, 4, /* IPRJ */ { 0, USBHI, 0, AFEIF } },
 };
 
-static DECLARE_INTC_DESC(intc_desc, "sh7720", vectors, groups,
+static DECLARE_INTC_DESC(intc_desc, "sh7720", vectors, NULL,
                 NULL, prio_registers, NULL);
 
 void __init plat_irq_setup(void)
diff --git a/arch/sh/kernel/cpu/sh3/swsusp.S b/arch/sh/kernel/cpu/sh3/swsusp.S
new file mode 100644
index 000000000000..01145426a2b8
--- /dev/null
+++ b/arch/sh/kernel/cpu/sh3/swsusp.S
@@ -0,0 +1,147 @@
+/*
+ * arch/sh/kernel/cpu/sh3/swsusp.S
+ *
+ * Copyright (C) 2009 Magnus Damm
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#include <linux/sys.h>
+#include <linux/errno.h>
+#include <linux/linkage.h>
+#include <asm/asm-offsets.h>
+#include <asm/page.h>
+
+#define k0      r0
+#define k1      r1
+#define k2      r2
+#define k3      r3
+#define k4      r4
+
+! swsusp_arch_resume()
+! - copy restore_pblist pages
+! - restore registers from swsusp_arch_regs_cpu0
+
+ENTRY(swsusp_arch_resume)
+        mov.l   1f, r15
+        mov.l   2f, r4
+        mov.l   @r4, r4
+
+swsusp_copy_loop:
+        mov     r4, r0
+        cmp/eq  #0, r0
+        bt      swsusp_restore_regs
+
+        mov.l   @(PBE_ADDRESS, r4), r2
+        mov.l   @(PBE_ORIG_ADDRESS, r4), r5
+
+        mov     #(PAGE_SIZE >> 10), r3
+        shll8   r3
+        shlr2   r3 /* PAGE_SIZE / 16 */
+swsusp_copy_page:
+        dt      r3
+        mov.l   @r2+,r1   /*  16n+0 */
+        mov.l   r1,@r5
+        add     #4,r5
+        mov.l   @r2+,r1   /*  16n+4 */
+        mov.l   r1,@r5
+        add     #4,r5
+        mov.l   @r2+,r1   /*  16n+8 */
+        mov.l   r1,@r5
+        add     #4,r5
+        mov.l   @r2+,r1   /*  16n+12 */
+        mov.l   r1,@r5
+        bf/s    swsusp_copy_page
+         add    #4,r5
+
+        bra     swsusp_copy_loop
+         mov.l  @(PBE_NEXT, r4), r4
+
+swsusp_restore_regs:
+        ! BL=0: R7->R0 is bank0
+        mov.l   3f, r8
+        mov.l   4f, r5
+        jsr     @r5
+         nop
+
+        ! BL=1: R7->R0 is bank1
+        lds     k2, pr
+        ldc     k3, ssr
+
+        mov.l   @r15+, r0
+        mov.l   @r15+, r1
+        mov.l   @r15+, r2
+        mov.l   @r15+, r3
+        mov.l   @r15+, r4
+        mov.l   @r15+, r5
+        mov.l   @r15+, r6
+        mov.l   @r15+, r7
+
+        rte
+         nop
+        ! BL=0: R7->R0 is bank0
+
+        .align  2
+1:      .long   swsusp_arch_regs_cpu0
+2:      .long   restore_pblist
+3:      .long   0x20000000 ! RB=1
+4:      .long   restore_regs
+
+! swsusp_arch_suspend()
+! - prepare pc for resume, return from function without swsusp_save on resume
+! - save registers in swsusp_arch_regs_cpu0
+! - call swsusp_save write suspend image
+
+ENTRY(swsusp_arch_suspend)
+        sts     pr, r0          ! save pr in r0
+        mov     r15, r2         ! save sp in r2
+        mov     r8, r5          ! save r8 in r5
+        stc     sr, r1
+        ldc     r1, ssr         ! save sr in ssr
+        mov.l   1f, r1
+        ldc     r1, spc         ! setup pc value for resuming
+        mov.l   5f, r15         ! use swsusp_arch_regs_cpu0 as stack
+        mov.l   6f, r3
+        add     r3, r15         ! save from top of structure
+
+        ! BL=0: R7->R0 is bank0
+        mov.l   2f, r3          ! get new SR value for bank1
+        mov     #0, r4
+        mov.l   7f, r1
+        jsr     @r1             ! switch to bank1 and save bank1 r7->r0
+         not    r4, r4
+
+        ! BL=1: R7->R0 is bank1
+        stc     r2_bank, k0     ! fetch old sp from r2_bank0
+        mov.l   3f, k4          ! SR bits to clear in k4
+        mov.l   8f, k1
+        jsr     @k1             ! switch to bank0 and save all regs
+         stc    r0_bank, k3     ! fetch old pr from r0_bank0
+
+        ! BL=0: R7->R0 is bank0
+        mov     r2, r15         ! restore old sp
+        mov     r5, r8          ! restore old r8
+        stc     ssr, r1
+        ldc     r1, sr          ! restore old sr
+        lds     r0, pr          ! restore old pr
+        mov.l   4f, r0
+        jmp     @r0
+         nop
+
+swsusp_call_save:
+        mov     r2, r15         ! restore old sp
+        mov     r5, r8          ! restore old r8
+        lds     r0, pr          ! restore old pr
+        rts
+         mov    #0, r0
+
+        .align  2
+1:      .long   swsusp_call_save
+2:      .long   0x20000000 ! RB=1
+3:      .long   0xdfffffff ! RB=0
+4:      .long   swsusp_save
+5:      .long   swsusp_arch_regs_cpu0
+6:      .long   SWSUSP_ARCH_REGS_SIZE
+7:      .long   save_low_regs
+8:      .long   save_regs
diff --git a/arch/sh/kernel/cpu/sh4/Makefile b/arch/sh/kernel/cpu/sh4/Makefile
index d608557c7a3f..203b18347b83 100644
--- a/arch/sh/kernel/cpu/sh4/Makefile
+++ b/arch/sh/kernel/cpu/sh4/Makefile
@@ -5,6 +5,7 @@
 obj-y   := probe.o common.o
 common-y        += $(addprefix ../sh3/, entry.o ex.o)
 
+obj-$(CONFIG_HIBERNATION)               += $(addprefix ../sh3/, swsusp.o)
 obj-$(CONFIG_SH_FPU)                    += fpu.o softfloat.o
 obj-$(CONFIG_SH_STORE_QUEUES)           += sq.o
 
diff --git a/arch/sh/kernel/cpu/sh4/probe.c b/arch/sh/kernel/cpu/sh4/probe.c
index 2e42572b1b11..3d3a3c4425a9 100644
--- a/arch/sh/kernel/cpu/sh4/probe.c
+++ b/arch/sh/kernel/cpu/sh4/probe.c
@@ -129,6 +129,13 @@ int __init detect_cpu_and_cache_system(void)
                 boot_cpu_data.flags |= CPU_HAS_FPU | CPU_HAS_PERF_COUNTER |
                                           CPU_HAS_LLSC;
                 break;
+        case 0x4004:
+                boot_cpu_data.type = CPU_SH7786;
+                boot_cpu_data.icache.ways = 4;
+                boot_cpu_data.dcache.ways = 4;
+                boot_cpu_data.flags |= CPU_HAS_FPU | CPU_HAS_PERF_COUNTER |
+                        CPU_HAS_LLSC | CPU_HAS_PTEAEX;
+                break;
         case 0x3008:
                 boot_cpu_data.icache.ways = 4;
                 boot_cpu_data.dcache.ways = 4;
diff --git a/arch/sh/kernel/cpu/sh4/setup-sh7750.c b/arch/sh/kernel/cpu/sh4/setup-sh7750.c
index ec884039b914..a1c80d909cd6 100644
--- a/arch/sh/kernel/cpu/sh4/setup-sh7750.c
+++ b/arch/sh/kernel/cpu/sh4/setup-sh7750.c
@@ -21,17 +21,7 @@ static struct resource rtc_resources[] = {
                 .flags  = IORESOURCE_IO,
         },
         [1] = {
-                /* Period IRQ */
-                .start  = 21,
-                .flags  = IORESOURCE_IRQ,
-        },
-        [2] = {
-                /* Carry IRQ */
-                .start  = 22,
-                .flags  = IORESOURCE_IRQ,
-        },
-        [3] = {
-                /* Alarm IRQ */
+                /* Shared Period/Carry/Alarm IRQ */
                 .start  = 20,
                 .flags  = IORESOURCE_IRQ,
         },
@@ -50,13 +40,13 @@ static struct plat_sci_port sci_platform_data[] = {
                 .mapbase        = 0xffe00000,
                 .flags          = UPF_BOOT_AUTOCONF,
                 .type           = PORT_SCI,
-                .irqs           = { 23, 24, 25, 0 },
+                .irqs           = { 23, 23, 23, 0 },
         }, {
 #endif
                 .mapbase        = 0xffe80000,
                 .flags          = UPF_BOOT_AUTOCONF,
                 .type           = PORT_SCIF,
-                .irqs           = { 40, 41, 43, 42 },
+                .irqs           = { 40, 40, 40, 40 },
         }, {
                 .flags = 0,
         }
@@ -87,43 +77,27 @@ enum {
 
         /* interrupt sources */
         IRL0, IRL1, IRL2, IRL3, /* only IRLM mode supported */
-        HUDI, GPIOI,
-        DMAC_DMTE0, DMAC_DMTE1, DMAC_DMTE2, DMAC_DMTE3,
-        DMAC_DMTE4, DMAC_DMTE5, DMAC_DMTE6, DMAC_DMTE7,
-        DMAC_DMAE,
+        HUDI, GPIOI, DMAC,
         PCIC0_PCISERR, PCIC1_PCIERR, PCIC1_PCIPWDWN, PCIC1_PCIPWON,
         PCIC1_PCIDMA0, PCIC1_PCIDMA1, PCIC1_PCIDMA2, PCIC1_PCIDMA3,
-        TMU3, TMU4, TMU0, TMU1, TMU2_TUNI, TMU2_TICPI,
-        RTC_ATI, RTC_PRI, RTC_CUI,
-        SCI1_ERI, SCI1_RXI, SCI1_TXI, SCI1_TEI,
-        SCIF_ERI, SCIF_RXI, SCIF_BRI, SCIF_TXI,
-        WDT,
-        REF_RCMI, REF_ROVI,
+        TMU3, TMU4, TMU0, TMU1, TMU2, RTC, SCI1, SCIF, WDT, REF,
 
         /* interrupt groups */
-        DMAC, PCIC1, TMU2, RTC, SCI1, SCIF, REF,
+        PCIC1,
 };
 
 static struct intc_vect vectors[] __initdata = {
         INTC_VECT(HUDI, 0x600), INTC_VECT(GPIOI, 0x620),
         INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420),
-        INTC_VECT(TMU2_TUNI, 0x440), INTC_VECT(TMU2_TICPI, 0x460),
-        INTC_VECT(RTC_ATI, 0x480), INTC_VECT(RTC_PRI, 0x4a0),
-        INTC_VECT(RTC_CUI, 0x4c0),
-        INTC_VECT(SCI1_ERI, 0x4e0), INTC_VECT(SCI1_RXI, 0x500),
-        INTC_VECT(SCI1_TXI, 0x520), INTC_VECT(SCI1_TEI, 0x540),
-        INTC_VECT(SCIF_ERI, 0x700), INTC_VECT(SCIF_RXI, 0x720),
-        INTC_VECT(SCIF_BRI, 0x740), INTC_VECT(SCIF_TXI, 0x760),
+        INTC_VECT(TMU2, 0x440), INTC_VECT(TMU2, 0x460),
+        INTC_VECT(RTC, 0x480), INTC_VECT(RTC, 0x4a0),
+        INTC_VECT(RTC, 0x4c0),
+        INTC_VECT(SCI1, 0x4e0), INTC_VECT(SCI1, 0x500),
+        INTC_VECT(SCI1, 0x520), INTC_VECT(SCI1, 0x540),
+        INTC_VECT(SCIF, 0x700), INTC_VECT(SCIF, 0x720),
+        INTC_VECT(SCIF, 0x740), INTC_VECT(SCIF, 0x760),
         INTC_VECT(WDT, 0x560),
-        INTC_VECT(REF_RCMI, 0x580), INTC_VECT(REF_ROVI, 0x5a0),
-};
-
-static struct intc_group groups[] __initdata = {
-        INTC_GROUP(TMU2, TMU2_TUNI, TMU2_TICPI),
-        INTC_GROUP(RTC, RTC_ATI, RTC_PRI, RTC_CUI),
-        INTC_GROUP(SCI1, SCI1_ERI, SCI1_RXI, SCI1_TXI, SCI1_TEI),
-        INTC_GROUP(SCIF, SCIF_ERI, SCIF_RXI, SCIF_BRI, SCIF_TXI),
-        INTC_GROUP(REF, REF_RCMI, REF_ROVI),
+        INTC_VECT(REF, 0x580), INTC_VECT(REF, 0x5a0),
 };
 
 static struct intc_prio_reg prio_registers[] __initdata = {
@@ -136,7 +110,7 @@ static struct intc_prio_reg prio_registers[] __initdata = {
                                                  PCIC1, PCIC0_PCISERR } },
 };
 
-static DECLARE_INTC_DESC(intc_desc, "sh7750", vectors, groups,
+static DECLARE_INTC_DESC(intc_desc, "sh7750", vectors, NULL,
                          NULL, prio_registers, NULL);
 
 /* SH7750, SH7750S, SH7751 and SH7091 all have 4-channel DMA controllers */
@@ -145,39 +119,28 @@ static DECLARE_INTC_DESC(intc_desc, "sh7750", vectors, groups,
         defined(CONFIG_CPU_SUBTYPE_SH7751) || \
         defined(CONFIG_CPU_SUBTYPE_SH7091)
 static struct intc_vect vectors_dma4[] __initdata = {
-        INTC_VECT(DMAC_DMTE0, 0x640), INTC_VECT(DMAC_DMTE1, 0x660),
-        INTC_VECT(DMAC_DMTE2, 0x680), INTC_VECT(DMAC_DMTE3, 0x6a0),
-        INTC_VECT(DMAC_DMAE, 0x6c0),
-};
-
-static struct intc_group groups_dma4[] __initdata = {
-        INTC_GROUP(DMAC, DMAC_DMTE0, DMAC_DMTE1, DMAC_DMTE2,
-                   DMAC_DMTE3, DMAC_DMAE),
+        INTC_VECT(DMAC, 0x640), INTC_VECT(DMAC, 0x660),
+        INTC_VECT(DMAC, 0x680), INTC_VECT(DMAC, 0x6a0),
+        INTC_VECT(DMAC, 0x6c0),
 };
 
 static DECLARE_INTC_DESC(intc_desc_dma4, "sh7750_dma4",
-                         vectors_dma4, groups_dma4,
+                         vectors_dma4, NULL,
                          NULL, prio_registers, NULL);
 #endif
 
 /* SH7750R and SH7751R both have 8-channel DMA controllers */
 #if defined(CONFIG_CPU_SUBTYPE_SH7750R) || defined(CONFIG_CPU_SUBTYPE_SH7751R)
 static struct intc_vect vectors_dma8[] __initdata = {
-        INTC_VECT(DMAC_DMTE0, 0x640), INTC_VECT(DMAC_DMTE1, 0x660),
-        INTC_VECT(DMAC_DMTE2, 0x680), INTC_VECT(DMAC_DMTE3, 0x6a0),
-        INTC_VECT(DMAC_DMTE4, 0x780), INTC_VECT(DMAC_DMTE5, 0x7a0),
-        INTC_VECT(DMAC_DMTE6, 0x7c0), INTC_VECT(DMAC_DMTE7, 0x7e0),
-        INTC_VECT(DMAC_DMAE, 0x6c0),
-};
-
-static struct intc_group groups_dma8[] __initdata = {
-        INTC_GROUP(DMAC, DMAC_DMTE0, DMAC_DMTE1, DMAC_DMTE2,
-                   DMAC_DMTE3, DMAC_DMTE4, DMAC_DMTE5,
-                   DMAC_DMTE6, DMAC_DMTE7, DMAC_DMAE),
+        INTC_VECT(DMAC, 0x640), INTC_VECT(DMAC, 0x660),
+        INTC_VECT(DMAC, 0x680), INTC_VECT(DMAC, 0x6a0),
+        INTC_VECT(DMAC, 0x780), INTC_VECT(DMAC, 0x7a0),
+        INTC_VECT(DMAC, 0x7c0), INTC_VECT(DMAC, 0x7e0),
+        INTC_VECT(DMAC, 0x6c0),
 };
 
 static DECLARE_INTC_DESC(intc_desc_dma8, "sh7750_dma8",
-                         vectors_dma8, groups_dma8,
+                         vectors_dma8, NULL,
                          NULL, prio_registers, NULL);
 #endif
 
diff --git a/arch/sh/kernel/cpu/sh4a/Makefile b/arch/sh/kernel/cpu/sh4a/Makefile
index 8e344ec5847e..1a92361feeb9 100644
--- a/arch/sh/kernel/cpu/sh4a/Makefile
+++ b/arch/sh/kernel/cpu/sh4a/Makefile
@@ -7,6 +7,7 @@ obj-$(CONFIG_CPU_SUBTYPE_SH7763)	+= setup-sh7763.o
 obj-$(CONFIG_CPU_SUBTYPE_SH7770)        += setup-sh7770.o
 obj-$(CONFIG_CPU_SUBTYPE_SH7780)        += setup-sh7780.o
 obj-$(CONFIG_CPU_SUBTYPE_SH7785)        += setup-sh7785.o
+obj-$(CONFIG_CPU_SUBTYPE_SH7786)        += setup-sh7786.o
 obj-$(CONFIG_CPU_SUBTYPE_SH7343)        += setup-sh7343.o
 obj-$(CONFIG_CPU_SUBTYPE_SH7722)        += setup-sh7722.o
 obj-$(CONFIG_CPU_SUBTYPE_SH7723)        += setup-sh7723.o
@@ -21,6 +22,7 @@ clock-$(CONFIG_CPU_SUBTYPE_SH7763)	:= clock-sh7763.o
 clock-$(CONFIG_CPU_SUBTYPE_SH7770)      := clock-sh7770.o
 clock-$(CONFIG_CPU_SUBTYPE_SH7780)      := clock-sh7780.o
 clock-$(CONFIG_CPU_SUBTYPE_SH7785)      := clock-sh7785.o
+clock-$(CONFIG_CPU_SUBTYPE_SH7786)      := clock-sh7786.o
 clock-$(CONFIG_CPU_SUBTYPE_SH7343)      := clock-sh7722.o
 clock-$(CONFIG_CPU_SUBTYPE_SH7722)      := clock-sh7722.o
 clock-$(CONFIG_CPU_SUBTYPE_SH7723)      := clock-sh7722.o
@@ -31,6 +33,7 @@ clock-$(CONFIG_CPU_SUBTYPE_SHX3)	:= clock-shx3.o
 pinmux-$(CONFIG_CPU_SUBTYPE_SH7722)     := pinmux-sh7722.o
 pinmux-$(CONFIG_CPU_SUBTYPE_SH7723)     := pinmux-sh7723.o
 pinmux-$(CONFIG_CPU_SUBTYPE_SH7785)     := pinmux-sh7785.o
+pinmux-$(CONFIG_CPU_SUBTYPE_SH7786)     := pinmux-sh7786.o
 
 obj-y                   += $(clock-y)
 obj-$(CONFIG_SMP)       += $(smp-y)
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7786.c b/arch/sh/kernel/cpu/sh4a/clock-sh7786.c
new file mode 100644
index 000000000000..f84a9c134471
--- /dev/null
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7786.c
@@ -0,0 +1,148 @@
+/*
+ * arch/sh/kernel/cpu/sh4a/clock-sh7786.c
+ *
+ * SH7786 support for the clock framework
+ *
+ * Copyright (C) 2008, 2009  Renesas Solutions Corp.
+ * Kuninori Morimoto <morimoto.kuninori@renesas.com>
+ *
+ * Based on SH7785
+ *  Copyright (C) 2007  Paul Mundt
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <asm/clock.h>
+#include <asm/freq.h>
+#include <asm/io.h>
+
+static int ifc_divisors[] = { 1, 2, 4, 1 };
+static int sfc_divisors[] = { 1, 1, 4, 1 };
+static int bfc_divisors[] = { 1, 1, 1, 1, 1, 12, 16, 1,
+                             24, 32, 1, 1, 1, 1, 1, 1 };
+static int mfc_divisors[] = { 1, 1, 4, 1 };
+static int pfc_divisors[] = { 1, 1, 1, 1, 1, 1, 16, 1,
+                              24, 32, 1, 48, 1, 1, 1, 1 };
+
+static void master_clk_init(struct clk *clk)
+{
+        clk->rate *= pfc_divisors[ctrl_inl(FRQMR1) & 0x000f];
+}
+
+static struct clk_ops sh7786_master_clk_ops = {
+        .init           = master_clk_init,
+};
+
+static void module_clk_recalc(struct clk *clk)
+{
+        int idx = (ctrl_inl(FRQMR1) & 0x000f);
+        clk->rate = clk->parent->rate / pfc_divisors[idx];
+}
+
+static struct clk_ops sh7786_module_clk_ops = {
+        .recalc         = module_clk_recalc,
+};
+
+static void bus_clk_recalc(struct clk *clk)
+{
+        int idx = ((ctrl_inl(FRQMR1) >> 16) & 0x000f);
+        clk->rate = clk->parent->rate / bfc_divisors[idx];
+}
+
+static struct clk_ops sh7786_bus_clk_ops = {
+        .recalc         = bus_clk_recalc,
+};
+
+static void cpu_clk_recalc(struct clk *clk)
+{
+        int idx = ((ctrl_inl(FRQMR1) >> 28) & 0x0003);
+        clk->rate = clk->parent->rate / ifc_divisors[idx];
+}
+
+static struct clk_ops sh7786_cpu_clk_ops = {
+        .recalc         = cpu_clk_recalc,
+};
+
+static struct clk_ops *sh7786_clk_ops[] = {
+        &sh7786_master_clk_ops,
+        &sh7786_module_clk_ops,
+        &sh7786_bus_clk_ops,
+        &sh7786_cpu_clk_ops,
+};
+
+void __init arch_init_clk_ops(struct clk_ops **ops, int idx)
+{
+        if (idx < ARRAY_SIZE(sh7786_clk_ops))
+                *ops = sh7786_clk_ops[idx];
+}
+
+static void shyway_clk_recalc(struct clk *clk)
+{
+        int idx = ((ctrl_inl(FRQMR1) >> 20) & 0x0003);
+        clk->rate = clk->parent->rate / sfc_divisors[idx];
+}
+
+static struct clk_ops sh7786_shyway_clk_ops = {
+        .recalc         = shyway_clk_recalc,
+};
+
+static struct clk sh7786_shyway_clk = {
+        .name           = "shyway_clk",
+        .flags          = CLK_ALWAYS_ENABLED,
+        .ops            = &sh7786_shyway_clk_ops,
+};
+
+static void ddr_clk_recalc(struct clk *clk)
+{
+        int idx = ((ctrl_inl(FRQMR1) >> 12) & 0x0003);
+        clk->rate = clk->parent->rate / mfc_divisors[idx];
+}
+
+static struct clk_ops sh7786_ddr_clk_ops = {
+        .recalc         = ddr_clk_recalc,
+};
+
+static struct clk sh7786_ddr_clk = {
+        .name           = "ddr_clk",
+        .flags          = CLK_ALWAYS_ENABLED,
+        .ops            = &sh7786_ddr_clk_ops,
+};
+
+/*
+ * Additional SH7786-specific on-chip clocks that aren't already part of the
+ * clock framework
+ */
+static struct clk *sh7786_onchip_clocks[] = {
+        &sh7786_shyway_clk,
+        &sh7786_ddr_clk,
+};
+
+static int __init sh7786_clk_init(void)
+{
+        struct clk *clk = clk_get(NULL, "master_clk");
+        int i;
+
+        for (i = 0; i < ARRAY_SIZE(sh7786_onchip_clocks); i++) {
+                struct clk *clkp = sh7786_onchip_clocks[i];
+
+                clkp->parent = clk;
+                clk_register(clkp);
+                clk_enable(clkp);
+        }
+
+        /*
+         * Now that we have the rest of the clocks registered, we need to
+         * force the parent clock to propagate so that these clocks will
+         * automatically figure out their rate. We cheat by handing the
+         * parent clock its current rate and forcing child propagation.
+         */
+        clk_set_rate(clk, clk_get_rate(clk));
+
+        clk_put(clk);
+
+        return 0;
+}
+arch_initcall(sh7786_clk_init);
diff --git a/arch/sh/kernel/cpu/sh4a/pinmux-sh7786.c b/arch/sh/kernel/cpu/sh4a/pinmux-sh7786.c
new file mode 100644
index 000000000000..373b3447bfdf
--- /dev/null
+++ b/arch/sh/kernel/cpu/sh4a/pinmux-sh7786.c
@@ -0,0 +1,950 @@
+/*
+ * SH7786 Pinmux
+ *
+ * Copyright (C) 2008, 2009  Renesas Solutions Corp.
+ * Kuninori Morimoto <morimoto.kuninori@renesas.com>
+ *
+ *  Based on SH7785 pinmux
+ *
+ *  Copyright (C) 2008  Magnus Damm
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/gpio.h>
+#include <cpu/sh7786.h>
+
+enum {
+        PINMUX_RESERVED = 0,
+
+        PINMUX_DATA_BEGIN,
+        PA7_DATA, PA6_DATA, PA5_DATA, PA4_DATA,
+        PA3_DATA, PA2_DATA, PA1_DATA, PA0_DATA,
+        PB7_DATA, PB6_DATA, PB5_DATA, PB4_DATA,
+        PB3_DATA, PB2_DATA, PB1_DATA, PB0_DATA,
+        PC7_DATA, PC6_DATA, PC5_DATA, PC4_DATA,
+        PC3_DATA, PC2_DATA, PC1_DATA, PC0_DATA,
+        PD7_DATA, PD6_DATA, PD5_DATA, PD4_DATA,
+        PD3_DATA, PD2_DATA, PD1_DATA, PD0_DATA,
+        PE7_DATA, PE6_DATA,
+        PF7_DATA, PF6_DATA, PF5_DATA, PF4_DATA,
+        PF3_DATA, PF2_DATA, PF1_DATA, PF0_DATA,
+        PG7_DATA, PG6_DATA, PG5_DATA,
+        PH7_DATA, PH6_DATA, PH5_DATA, PH4_DATA,
+        PH3_DATA, PH2_DATA, PH1_DATA, PH0_DATA,
+        PJ7_DATA, PJ6_DATA, PJ5_DATA, PJ4_DATA,
+        PJ3_DATA, PJ2_DATA, PJ1_DATA,
+        PINMUX_DATA_END,
+
+        PINMUX_INPUT_BEGIN,
+        PA7_IN, PA6_IN, PA5_IN, PA4_IN,
+        PA3_IN, PA2_IN, PA1_IN, PA0_IN,
+        PB7_IN, PB6_IN, PB5_IN, PB4_IN,
+        PB3_IN, PB2_IN, PB1_IN, PB0_IN,
+        PC7_IN, PC6_IN, PC5_IN, PC4_IN,
+        PC3_IN, PC2_IN, PC1_IN, PC0_IN,
+        PD7_IN, PD6_IN, PD5_IN, PD4_IN,
+        PD3_IN, PD2_IN, PD1_IN, PD0_IN,
+        PE7_IN, PE6_IN,
+        PF7_IN, PF6_IN, PF5_IN, PF4_IN,
+        PF3_IN, PF2_IN, PF1_IN, PF0_IN,
+        PG7_IN, PG6_IN, PG5_IN,
+        PH7_IN, PH6_IN, PH5_IN, PH4_IN,
+        PH3_IN, PH2_IN, PH1_IN, PH0_IN,
+        PJ7_IN, PJ6_IN, PJ5_IN, PJ4_IN,
+        PJ3_IN, PJ2_IN, PJ1_IN,
+        PINMUX_INPUT_END,
+
+        PINMUX_INPUT_PULLUP_BEGIN,
+        PA7_IN_PU, PA6_IN_PU, PA5_IN_PU, PA4_IN_PU,
+        PA3_IN_PU, PA2_IN_PU, PA1_IN_PU, PA0_IN_PU,
+        PB7_IN_PU, PB6_IN_PU, PB5_IN_PU, PB4_IN_PU,
+        PB3_IN_PU, PB2_IN_PU, PB1_IN_PU, PB0_IN_PU,
+        PC7_IN_PU, PC6_IN_PU, PC5_IN_PU, PC4_IN_PU,
+        PC3_IN_PU, PC2_IN_PU, PC1_IN_PU, PC0_IN_PU,
+        PD7_IN_PU, PD6_IN_PU, PD5_IN_PU, PD4_IN_PU,
+        PD3_IN_PU, PD2_IN_PU, PD1_IN_PU, PD0_IN_PU,
+        PE7_IN_PU, PE6_IN_PU,
+        PF7_IN_PU, PF6_IN_PU, PF5_IN_PU, PF4_IN_PU,
+        PF3_IN_PU, PF2_IN_PU, PF1_IN_PU, PF0_IN_PU,
+        PG7_IN_PU, PG6_IN_PU, PG5_IN_PU,
+        PH7_IN_PU, PH6_IN_PU, PH5_IN_PU, PH4_IN_PU,
+        PH3_IN_PU, PH2_IN_PU, PH1_IN_PU, PH0_IN_PU,
+        PJ7_IN_PU, PJ6_IN_PU, PJ5_IN_PU, PJ4_IN_PU,
+        PJ3_IN_PU, PJ2_IN_PU, PJ1_IN_PU,
+        PINMUX_INPUT_PULLUP_END,
+
+        PINMUX_OUTPUT_BEGIN,
+        PA7_OUT, PA6_OUT, PA5_OUT, PA4_OUT,
+        PA3_OUT, PA2_OUT, PA1_OUT, PA0_OUT,
+        PB7_OUT, PB6_OUT, PB5_OUT, PB4_OUT,
+        PB3_OUT, PB2_OUT, PB1_OUT, PB0_OUT,
+        PC7_OUT, PC6_OUT, PC5_OUT, PC4_OUT,
+        PC3_OUT, PC2_OUT, PC1_OUT, PC0_OUT,
+        PD7_OUT, PD6_OUT, PD5_OUT, PD4_OUT,
+        PD3_OUT, PD2_OUT, PD1_OUT, PD0_OUT,
+        PE7_OUT, PE6_OUT,
+        PF7_OUT, PF6_OUT, PF5_OUT, PF4_OUT,
+        PF3_OUT, PF2_OUT, PF1_OUT, PF0_OUT,
+        PG7_OUT, PG6_OUT, PG5_OUT,
+        PH7_OUT, PH6_OUT, PH5_OUT, PH4_OUT,
+        PH3_OUT, PH2_OUT, PH1_OUT, PH0_OUT,
+        PJ7_OUT, PJ6_OUT, PJ5_OUT, PJ4_OUT,
+        PJ3_OUT, PJ2_OUT, PJ1_OUT,
+        PINMUX_OUTPUT_END,
+
+        PINMUX_FUNCTION_BEGIN,
+        PA7_FN, PA6_FN, PA5_FN, PA4_FN,
+        PA3_FN, PA2_FN, PA1_FN, PA0_FN,
+        PB7_FN, PB6_FN, PB5_FN, PB4_FN,
+        PB3_FN, PB2_FN, PB1_FN, PB0_FN,
+        PC7_FN, PC6_FN, PC5_FN, PC4_FN,
+        PC3_FN, PC2_FN, PC1_FN, PC0_FN,
+        PD7_FN, PD6_FN, PD5_FN, PD4_FN,
+        PD3_FN, PD2_FN, PD1_FN, PD0_FN,
+        PE7_FN, PE6_FN,
+        PF7_FN, PF6_FN, PF5_FN, PF4_FN,
+        PF3_FN, PF2_FN, PF1_FN, PF0_FN,
+        PG7_FN, PG6_FN, PG5_FN,
+        PH7_FN, PH6_FN, PH5_FN, PH4_FN,
+        PH3_FN, PH2_FN, PH1_FN, PH0_FN,
+        PJ7_FN, PJ6_FN, PJ5_FN, PJ4_FN,
+        PJ3_FN, PJ2_FN, PJ1_FN,
+        P1MSEL14_0, P1MSEL14_1,
+        P1MSEL13_0, P1MSEL13_1,
+        P1MSEL12_0, P1MSEL12_1,
+        P1MSEL11_0, P1MSEL11_1,
+        P1MSEL10_0, P1MSEL10_1,
+        P1MSEL9_0, P1MSEL9_1,
+        P1MSEL8_0, P1MSEL8_1,
+        P1MSEL7_0, P1MSEL7_1,
+        P1MSEL6_0, P1MSEL6_1,
+        P1MSEL5_0, P1MSEL5_1,
+        P1MSEL4_0, P1MSEL4_1,
+        P1MSEL3_0, P1MSEL3_1,
+        P1MSEL2_0, P1MSEL2_1,
+        P1MSEL1_0, P1MSEL1_1,
+        P1MSEL0_0, P1MSEL0_1,
+
+        P2MSEL15_0, P2MSEL15_1,
+        P2MSEL14_0, P2MSEL14_1,
+        P2MSEL13_0, P2MSEL13_1,
+        P2MSEL12_0, P2MSEL12_1,
+        P2MSEL11_0, P2MSEL11_1,
+        P2MSEL10_0, P2MSEL10_1,
+        P2MSEL9_0, P2MSEL9_1,
+        P2MSEL8_0, P2MSEL8_1,
+        P2MSEL7_0, P2MSEL7_1,
+        P2MSEL6_0, P2MSEL6_1,
+        P2MSEL5_0, P2MSEL5_1,
+        P2MSEL4_0, P2MSEL4_1,
+        P2MSEL3_0, P2MSEL3_1,
+        P2MSEL2_0, P2MSEL2_1,
+        P2MSEL1_0, P2MSEL1_1,
+        P2MSEL0_0, P2MSEL0_1,
+        PINMUX_FUNCTION_END,
+
+        PINMUX_MARK_BEGIN,
+        CDE_MARK,
+        ETH_MAGIC_MARK,
+        DISP_MARK,
+        ETH_LINK_MARK,
+        DR5_MARK,
+        ETH_TX_ER_MARK,
+        DR4_MARK,
+        ETH_TX_EN_MARK,
+        DR3_MARK,
+        ETH_TXD3_MARK,
+        DR2_MARK,
+        ETH_TXD2_MARK,
+        DR1_MARK,
+        ETH_TXD1_MARK,
+        DR0_MARK,
+        ETH_TXD0_MARK,
+
+        VSYNC_MARK,
+        HSPI_CLK_MARK,
+        ODDF_MARK,
+        HSPI_CS_MARK,
+        DG5_MARK,
+        ETH_MDIO_MARK,
+        DG4_MARK,
+        ETH_RX_CLK_MARK,
+        DG3_MARK,
+        ETH_MDC_MARK,
+        DG2_MARK,
+        ETH_COL_MARK,
+        DG1_MARK,
+        ETH_TX_CLK_MARK,
+        DG0_MARK,
+        ETH_CRS_MARK,
+
+        DCLKIN_MARK,
+        HSPI_RX_MARK,
+        HSYNC_MARK,
+        HSPI_TX_MARK,
+        DB5_MARK,
+        ETH_RXD3_MARK,
+        DB4_MARK,
+        ETH_RXD2_MARK,
+        DB3_MARK,
+        ETH_RXD1_MARK,
+        DB2_MARK,
+        ETH_RXD0_MARK,
+        DB1_MARK,
+        ETH_RX_DV_MARK,
+        DB0_MARK,
+        ETH_RX_ER_MARK,
+
+        DCLKOUT_MARK,
+        SCIF1_SLK_MARK,
+        SCIF1_RXD_MARK,
+        SCIF1_TXD_MARK,
+        DACK1_MARK,
+        BACK_MARK,
+        FALE_MARK,
+        DACK0_MARK,
+        FCLE_MARK,
+        DREQ1_MARK,
+        BREQ_MARK,
+        USB_OVC1_MARK,
+        DREQ0_MARK,
+        USB_OVC0_MARK,
+
+        USB_PENC1_MARK,
+        USB_PENC0_MARK,
+
+        HAC1_SDOUT_MARK,
+        SSI1_SDATA_MARK,
+        SDIF1CMD_MARK,
+        HAC1_SDIN_MARK,
+        SSI1_SCK_MARK,
+        SDIF1CD_MARK,
+        HAC1_SYNC_MARK,
+        SSI1_WS_MARK,
+        SDIF1WP_MARK,
+        HAC1_BITCLK_MARK,
+        SSI1_CLK_MARK,
+        SDIF1CLK_MARK,
+        HAC0_SDOUT_MARK,
+        SSI0_SDATA_MARK,
+        SDIF1D3_MARK,
+        HAC0_SDIN_MARK,
+        SSI0_SCK_MARK,
+        SDIF1D2_MARK,
+        HAC0_SYNC_MARK,
+        SSI0_WS_MARK,
+        SDIF1D1_MARK,
+        HAC0_BITCLK_MARK,
+        SSI0_CLK_MARK,
+        SDIF1D0_MARK,
+
+        SCIF3_SCK_MARK,
+        SSI2_SDATA_MARK,
+        SCIF3_RXD_MARK,
+        TCLK_MARK,
+        SSI2_SCK_MARK,
+        SCIF3_TXD_MARK,
+        HAC_RES_MARK,
+        SSI2_WS_MARK,
+
+        DACK3_MARK,
+        SDIF0CMD_MARK,
+        DACK2_MARK,
+        SDIF0CD_MARK,
+        DREQ3_MARK,
+        SDIF0WP_MARK,
+        SCIF0_CTS_MARK,
+        DREQ2_MARK,
+        SDIF0CLK_MARK,
+        SCIF0_RTS_MARK,
+        IRL7_MARK,
+        SDIF0D3_MARK,
+        SCIF0_SCK_MARK,
+        IRL6_MARK,
+        SDIF0D2_MARK,
+        SCIF0_RXD_MARK,
+        IRL5_MARK,
+        SDIF0D1_MARK,
+        SCIF0_TXD_MARK,
+        IRL4_MARK,
+        SDIF0D0_MARK,
+
+        SCIF5_SCK_MARK,
+        FRB_MARK,
+        SCIF5_RXD_MARK,
+        IOIS16_MARK,
+        SCIF5_TXD_MARK,
+        CE2B_MARK,
+        DRAK3_MARK,
+        CE2A_MARK,
+        SCIF4_SCK_MARK,
+        DRAK2_MARK,
+        SSI3_WS_MARK,
+        SCIF4_RXD_MARK,
+        DRAK1_MARK,
+        SSI3_SDATA_MARK,
+        FSTATUS_MARK,
+        SCIF4_TXD_MARK,
+        DRAK0_MARK,
+        SSI3_SCK_MARK,
+        FSE_MARK,
+        PINMUX_MARK_END,
+};
+
+static pinmux_enum_t pinmux_data[] = {
+
+        /* PA GPIO */
+        PINMUX_DATA(PA7_DATA, PA7_IN, PA7_OUT, PA7_IN_PU),
+        PINMUX_DATA(PA6_DATA, PA6_IN, PA6_OUT, PA6_IN_PU),
+        PINMUX_DATA(PA5_DATA, PA5_IN, PA5_OUT, PA5_IN_PU),
+        PINMUX_DATA(PA4_DATA, PA4_IN, PA4_OUT, PA4_IN_PU),
+        PINMUX_DATA(PA3_DATA, PA3_IN, PA3_OUT, PA3_IN_PU),
+        PINMUX_DATA(PA2_DATA, PA2_IN, PA2_OUT, PA2_IN_PU),
+        PINMUX_DATA(PA1_DATA, PA1_IN, PA1_OUT, PA1_IN_PU),
+        PINMUX_DATA(PA0_DATA, PA0_IN, PA0_OUT, PA0_IN_PU),
+
+        /* PB GPIO */
+        PINMUX_DATA(PB7_DATA, PB7_IN, PB7_OUT, PB7_IN_PU),
+        PINMUX_DATA(PB6_DATA, PB6_IN, PB6_OUT, PB6_IN_PU),
+        PINMUX_DATA(PB5_DATA, PB5_IN, PB5_OUT, PB5_IN_PU),
+        PINMUX_DATA(PB4_DATA, PB4_IN, PB4_OUT, PB4_IN_PU),
+        PINMUX_DATA(PB3_DATA, PB3_IN, PB3_OUT, PB3_IN_PU),
+        PINMUX_DATA(PB2_DATA, PB2_IN, PB2_OUT, PB2_IN_PU),
+        PINMUX_DATA(PB1_DATA, PB1_IN, PB1_OUT, PB1_IN_PU),
+        PINMUX_DATA(PB0_DATA, PB0_IN, PB0_OUT, PB0_IN_PU),
+
+        /* PC GPIO */
+        PINMUX_DATA(PC7_DATA, PC7_IN, PC7_OUT, PC7_IN_PU),
+        PINMUX_DATA(PC6_DATA, PC6_IN, PC6_OUT, PC6_IN_PU),
+        PINMUX_DATA(PC5_DATA, PC5_IN, PC5_OUT, PC5_IN_PU),
+        PINMUX_DATA(PC4_DATA, PC4_IN, PC4_OUT, PC4_IN_PU),
+        PINMUX_DATA(PC3_DATA, PC3_IN, PC3_OUT, PC3_IN_PU),
+        PINMUX_DATA(PC2_DATA, PC2_IN, PC2_OUT, PC2_IN_PU),
+        PINMUX_DATA(PC1_DATA, PC1_IN, PC1_OUT, PC1_IN_PU),
+        PINMUX_DATA(PC0_DATA, PC0_IN, PC0_OUT, PC0_IN_PU),
+
+        /* PD GPIO */
+        PINMUX_DATA(PD7_DATA, PD7_IN, PD7_OUT, PD7_IN_PU),
+        PINMUX_DATA(PD6_DATA, PD6_IN, PD6_OUT, PD6_IN_PU),
+        PINMUX_DATA(PD5_DATA, PD5_IN, PD5_OUT, PD5_IN_PU),
+        PINMUX_DATA(PD4_DATA, PD4_IN, PD4_OUT, PD4_IN_PU),
+        PINMUX_DATA(PD3_DATA, PD3_IN, PD3_OUT, PD3_IN_PU),
+        PINMUX_DATA(PD2_DATA, PD2_IN, PD2_OUT, PD2_IN_PU),
+        PINMUX_DATA(PD1_DATA, PD1_IN, PD1_OUT, PD1_IN_PU),
+        PINMUX_DATA(PD0_DATA, PD0_IN, PD0_OUT, PD0_IN_PU),
+
+        /* PE GPIO */
+        PINMUX_DATA(PE7_DATA, PE7_IN, PE7_OUT, PE7_IN_PU),
+        PINMUX_DATA(PE6_DATA, PE6_IN, PE6_OUT, PE6_IN_PU),
+
+        /* PF GPIO */
+        PINMUX_DATA(PF7_DATA, PF7_IN, PF7_OUT, PF7_IN_PU),
+        PINMUX_DATA(PF6_DATA, PF6_IN, PF6_OUT, PF6_IN_PU),
+        PINMUX_DATA(PF5_DATA, PF5_IN, PF5_OUT, PF5_IN_PU),
+        PINMUX_DATA(PF4_DATA, PF4_IN, PF4_OUT, PF4_IN_PU),
+        PINMUX_DATA(PF3_DATA, PF3_IN, PF3_OUT, PF3_IN_PU),
+        PINMUX_DATA(PF2_DATA, PF2_IN, PF2_OUT, PF2_IN_PU),
+        PINMUX_DATA(PF1_DATA, PF1_IN, PF1_OUT, PF1_IN_PU),
+        PINMUX_DATA(PF0_DATA, PF0_IN, PF0_OUT, PF0_IN_PU),
+
+        /* PG GPIO */
+        PINMUX_DATA(PG7_DATA, PG7_IN, PG7_OUT, PG7_IN_PU),
+        PINMUX_DATA(PG6_DATA, PG6_IN, PG6_OUT, PG6_IN_PU),
+        PINMUX_DATA(PG5_DATA, PG5_IN, PG5_OUT, PG5_IN_PU),
+
+        /* PH GPIO */
+        PINMUX_DATA(PH7_DATA, PH7_IN, PH7_OUT, PH7_IN_PU),
+        PINMUX_DATA(PH6_DATA, PH6_IN, PH6_OUT, PH6_IN_PU),
+        PINMUX_DATA(PH5_DATA, PH5_IN, PH5_OUT, PH5_IN_PU),
+        PINMUX_DATA(PH4_DATA, PH4_IN, PH4_OUT, PH4_IN_PU),
+        PINMUX_DATA(PH3_DATA, PH3_IN, PH3_OUT, PH3_IN_PU),
+        PINMUX_DATA(PH2_DATA, PH2_IN, PH2_OUT, PH2_IN_PU),
+        PINMUX_DATA(PH1_DATA, PH1_IN, PH1_OUT, PH1_IN_PU),
+        PINMUX_DATA(PH0_DATA, PH0_IN, PH0_OUT, PH0_IN_PU),
+
+        /* PJ GPIO */
+        PINMUX_DATA(PJ7_DATA, PJ7_IN, PJ7_OUT, PJ7_IN_PU),
+        PINMUX_DATA(PJ6_DATA, PJ6_IN, PJ6_OUT, PJ6_IN_PU),
+        PINMUX_DATA(PJ5_DATA, PJ5_IN, PJ5_OUT, PJ5_IN_PU),
+        PINMUX_DATA(PJ4_DATA, PJ4_IN, PJ4_OUT, PJ4_IN_PU),
+        PINMUX_DATA(PJ3_DATA, PJ3_IN, PJ3_OUT, PJ3_IN_PU),
+        PINMUX_DATA(PJ2_DATA, PJ2_IN, PJ2_OUT, PJ2_IN_PU),
+        PINMUX_DATA(PJ1_DATA, PJ1_IN, PJ1_OUT, PJ1_IN_PU),
+
+        /* PA FN */
+        PINMUX_MARK_BEGIN,
+        PINMUX_DATA(CDE_MARK,           P1MSEL2_0, PA7_FN),
+        PINMUX_DATA(DISP_MARK,          P1MSEL2_0, PA6_FN),
+        PINMUX_DATA(DR5_MARK,           P1MSEL2_0, PA5_FN),
+        PINMUX_DATA(DR4_MARK,           P1MSEL2_0, PA4_FN),
+        PINMUX_DATA(DR3_MARK,           P1MSEL2_0, PA3_FN),
+        PINMUX_DATA(DR2_MARK,           P1MSEL2_0, PA2_FN),
+        PINMUX_DATA(DR1_MARK,           P1MSEL2_0, PA1_FN),
+        PINMUX_DATA(DR0_MARK,           P1MSEL2_0, PA0_FN),
+        PINMUX_DATA(ETH_MAGIC_MARK,     P1MSEL2_1, PA7_FN),
+        PINMUX_DATA(ETH_LINK_MARK,      P1MSEL2_1, PA6_FN),
+        PINMUX_DATA(ETH_TX_ER_MARK,     P1MSEL2_1, PA5_FN),
+        PINMUX_DATA(ETH_TX_EN_MARK,     P1MSEL2_1, PA4_FN),
+        PINMUX_DATA(ETH_TXD3_MARK,      P1MSEL2_1, PA3_FN),
+        PINMUX_DATA(ETH_TXD2_MARK,      P1MSEL2_1, PA2_FN),
+        PINMUX_DATA(ETH_TXD1_MARK,      P1MSEL2_1, PA1_FN),
+        PINMUX_DATA(ETH_TXD0_MARK,      P1MSEL2_1, PA0_FN),
+
+        /* PB FN */
+        PINMUX_DATA(VSYNC_MARK,         P1MSEL3_0, PB7_FN),
+        PINMUX_DATA(ODDF_MARK,          P1MSEL3_0, PB6_FN),
+        PINMUX_DATA(DG5_MARK,           P1MSEL2_0, PB5_FN),
+        PINMUX_DATA(DG4_MARK,           P1MSEL2_0, PB4_FN),
+        PINMUX_DATA(DG3_MARK,           P1MSEL2_0, PB3_FN),
+        PINMUX_DATA(DG2_MARK,           P1MSEL2_0, PB2_FN),
+        PINMUX_DATA(DG1_MARK,           P1MSEL2_0, PB1_FN),
+        PINMUX_DATA(DG0_MARK,           P1MSEL2_0, PB0_FN),
+        PINMUX_DATA(HSPI_CLK_MARK,      P1MSEL3_1, PB7_FN),
+        PINMUX_DATA(HSPI_CS_MARK,       P1MSEL3_1, PB6_FN),
+        PINMUX_DATA(ETH_MDIO_MARK,      P1MSEL2_1, PB5_FN),
+        PINMUX_DATA(ETH_RX_CLK_MARK,    P1MSEL2_1, PB4_FN),
+        PINMUX_DATA(ETH_MDC_MARK,       P1MSEL2_1, PB3_FN),
+        PINMUX_DATA(ETH_COL_MARK,       P1MSEL2_1, PB2_FN),
+        PINMUX_DATA(ETH_TX_CLK_MARK,    P1MSEL2_1, PB1_FN),
+        PINMUX_DATA(ETH_CRS_MARK,       P1MSEL2_1, PB0_FN),
+
+        /* PC FN */
+        PINMUX_DATA(DCLKIN_MARK,        P1MSEL3_0, PC7_FN),
+        PINMUX_DATA(HSYNC_MARK,         P1MSEL3_0, PC6_FN),
+        PINMUX_DATA(DB5_MARK,           P1MSEL2_0, PC5_FN),
+        PINMUX_DATA(DB4_MARK,           P1MSEL2_0, PC4_FN),
+        PINMUX_DATA(DB3_MARK,           P1MSEL2_0, PC3_FN),
+        PINMUX_DATA(DB2_MARK,           P1MSEL2_0, PC2_FN),
+        PINMUX_DATA(DB1_MARK,           P1MSEL2_0, PC1_FN),
+        PINMUX_DATA(DB0_MARK,           P1MSEL2_0, PC0_FN),
+
+        PINMUX_DATA(HSPI_RX_MARK,       P1MSEL3_1, PC7_FN),
+        PINMUX_DATA(HSPI_TX_MARK,       P1MSEL3_1, PC6_FN),
+        PINMUX_DATA(ETH_RXD3_MARK,      P1MSEL2_1, PC5_FN),
+        PINMUX_DATA(ETH_RXD2_MARK,      P1MSEL2_1, PC4_FN),
+        PINMUX_DATA(ETH_RXD1_MARK,      P1MSEL2_1, PC3_FN),
+        PINMUX_DATA(ETH_RXD0_MARK,      P1MSEL2_1, PC2_FN),
+        PINMUX_DATA(ETH_RX_DV_MARK,     P1MSEL2_1, PC1_FN),
+        PINMUX_DATA(ETH_RX_ER_MARK,     P1MSEL2_1, PC0_FN),
+
+        /* PD FN */
+        PINMUX_DATA(DCLKOUT_MARK,       PD7_FN),
+        PINMUX_DATA(SCIF1_SLK_MARK,     PD6_FN),
+        PINMUX_DATA(SCIF1_RXD_MARK,     PD5_FN),
+        PINMUX_DATA(SCIF1_TXD_MARK,     PD4_FN),
+        PINMUX_DATA(DACK1_MARK,         P1MSEL13_1, P1MSEL12_0, PD3_FN),
+        PINMUX_DATA(BACK_MARK,          P1MSEL13_0, P1MSEL12_1, PD3_FN),
+        PINMUX_DATA(FALE_MARK,          P1MSEL13_0, P1MSEL12_0, PD3_FN),
+        PINMUX_DATA(DACK0_MARK,         P1MSEL14_1, PD2_FN),
+        PINMUX_DATA(FCLE_MARK,          P1MSEL14_0, PD2_FN),
+        PINMUX_DATA(DREQ1_MARK,         P1MSEL10_0, P1MSEL9_1, PD1_FN),
+        PINMUX_DATA(BREQ_MARK,          P1MSEL10_1, P1MSEL9_0, PD1_FN),
+        PINMUX_DATA(USB_OVC1_MARK,      P1MSEL10_0, P1MSEL9_0, PD1_FN),
+        PINMUX_DATA(DREQ0_MARK,         P1MSEL11_1, PD0_FN),
+        PINMUX_DATA(USB_OVC0_MARK,      P1MSEL11_0, PD0_FN),
+
+        /* PE FN */
+        PINMUX_DATA(USB_PENC1_MARK,     PE7_FN),
+        PINMUX_DATA(USB_PENC0_MARK,     PE6_FN),
+
+        /* PF FN */
+        PINMUX_DATA(HAC1_SDOUT_MARK,    P2MSEL15_0, P2MSEL14_0, PF7_FN),
+        PINMUX_DATA(HAC1_SDIN_MARK,     P2MSEL15_0, P2MSEL14_0, PF6_FN),
+        PINMUX_DATA(HAC1_SYNC_MARK,     P2MSEL15_0, P2MSEL14_0, PF5_FN),
+        PINMUX_DATA(HAC1_BITCLK_MARK,   P2MSEL15_0, P2MSEL14_0, PF4_FN),
+        PINMUX_DATA(HAC0_SDOUT_MARK,    P2MSEL13_0, P2MSEL12_0, PF3_FN),
+        PINMUX_DATA(HAC0_SDIN_MARK,     P2MSEL13_0, P2MSEL12_0, PF2_FN),
+        PINMUX_DATA(HAC0_SYNC_MARK,     P2MSEL13_0, P2MSEL12_0, PF1_FN),
+        PINMUX_DATA(HAC0_BITCLK_MARK,   P2MSEL13_0, P2MSEL12_0, PF0_FN),
+        PINMUX_DATA(SSI1_SDATA_MARK,    P2MSEL15_0, P2MSEL14_1, PF7_FN),
+        PINMUX_DATA(SSI1_SCK_MARK,      P2MSEL15_0, P2MSEL14_1, PF6_FN),
+        PINMUX_DATA(SSI1_WS_MARK,       P2MSEL15_0, P2MSEL14_1, PF5_FN),
+        PINMUX_DATA(SSI1_CLK_MARK,      P2MSEL15_0, P2MSEL14_1, PF4_FN),
+        PINMUX_DATA(SSI0_SDATA_MARK,    P2MSEL13_0, P2MSEL12_1, PF3_FN),
+        PINMUX_DATA(SSI0_SCK_MARK,      P2MSEL13_0, P2MSEL12_1, PF2_FN),
+        PINMUX_DATA(SSI0_WS_MARK,       P2MSEL13_0, P2MSEL12_1, PF1_FN),
+        PINMUX_DATA(SSI0_CLK_MARK,      P2MSEL13_0, P2MSEL12_1, PF0_FN),
+        PINMUX_DATA(SDIF1CMD_MARK,      P2MSEL15_1, P2MSEL14_0, PF7_FN),
+        PINMUX_DATA(SDIF1CD_MARK,       P2MSEL15_1, P2MSEL14_0, PF6_FN),
+        PINMUX_DATA(SDIF1WP_MARK,       P2MSEL15_1, P2MSEL14_0, PF5_FN),
+        PINMUX_DATA(SDIF1CLK_MARK,      P2MSEL15_1, P2MSEL14_0, PF4_FN),
+        PINMUX_DATA(SDIF1D3_MARK,       P2MSEL13_1, P2MSEL12_0, PF3_FN),
+        PINMUX_DATA(SDIF1D2_MARK,       P2MSEL13_1, P2MSEL12_0, PF2_FN),
+        PINMUX_DATA(SDIF1D1_MARK,       P2MSEL13_1, P2MSEL12_0, PF1_FN),
+        PINMUX_DATA(SDIF1D0_MARK,       P2MSEL13_1, P2MSEL12_0, PF0_FN),
+
+        /* PG FN */
+        PINMUX_DATA(SCIF3_SCK_MARK,     P1MSEL8_0, PG7_FN),
+        PINMUX_DATA(SSI2_SDATA_MARK,    P1MSEL8_1, PG7_FN),
+        PINMUX_DATA(SCIF3_RXD_MARK,     P1MSEL7_0, P1MSEL6_0, PG6_FN),
+        PINMUX_DATA(SSI2_SCK_MARK,      P1MSEL7_1, P1MSEL6_0, PG6_FN),
+        PINMUX_DATA(TCLK_MARK,          P1MSEL7_0, P1MSEL6_1, PG6_FN),
+        PINMUX_DATA(SCIF3_TXD_MARK,     P1MSEL5_0, P1MSEL4_0, PG5_FN),
+        PINMUX_DATA(SSI2_WS_MARK,       P1MSEL5_1, P1MSEL4_0, PG5_FN),
+        PINMUX_DATA(HAC_RES_MARK,       P1MSEL5_0, P1MSEL4_1, PG5_FN),
+
+        /* PH FN */
+        PINMUX_DATA(DACK3_MARK,         P2MSEL4_0, PH7_FN),
+        PINMUX_DATA(SDIF0CMD_MARK,      P2MSEL4_1, PH7_FN),
+        PINMUX_DATA(DACK2_MARK,         P2MSEL4_0, PH6_FN),
+        PINMUX_DATA(SDIF0CD_MARK,       P2MSEL4_1, PH6_FN),
+        PINMUX_DATA(DREQ3_MARK,         P2MSEL4_0, PH5_FN),
+        PINMUX_DATA(SDIF0WP_MARK,       P2MSEL4_1, PH5_FN),
+        PINMUX_DATA(DREQ2_MARK,         P2MSEL3_0, P2MSEL2_1, PH4_FN),
+        PINMUX_DATA(SDIF0CLK_MARK,      P2MSEL3_1, P2MSEL2_0, PH4_FN),
+        PINMUX_DATA(SCIF0_CTS_MARK,     P2MSEL3_0, P2MSEL2_0, PH4_FN),
+        PINMUX_DATA(SDIF0D3_MARK,       P2MSEL1_1, P2MSEL0_0, PH3_FN),
+        PINMUX_DATA(SCIF0_RTS_MARK,     P2MSEL1_0, P2MSEL0_0, PH3_FN),
+        PINMUX_DATA(IRL7_MARK,          P2MSEL1_0, P2MSEL0_1, PH3_FN),
+        PINMUX_DATA(SDIF0D2_MARK,       P2MSEL1_1, P2MSEL0_0, PH2_FN),
+        PINMUX_DATA(SCIF0_SCK_MARK,     P2MSEL1_0, P2MSEL0_0, PH2_FN),
+        PINMUX_DATA(IRL6_MARK,          P2MSEL1_0, P2MSEL0_1, PH2_FN),
+        PINMUX_DATA(SDIF0D1_MARK,       P2MSEL1_1, P2MSEL0_0, PH1_FN),
+        PINMUX_DATA(SCIF0_RXD_MARK,     P2MSEL1_0, P2MSEL0_0, PH1_FN),
+        PINMUX_DATA(IRL5_MARK,          P2MSEL1_0, P2MSEL0_1, PH1_FN),
+        PINMUX_DATA(SDIF0D0_MARK,       P2MSEL1_1, P2MSEL0_0, PH0_FN),
+        PINMUX_DATA(SCIF0_TXD_MARK,     P2MSEL1_0, P2MSEL0_0, PH0_FN),
+        PINMUX_DATA(IRL4_MARK,          P2MSEL1_0, P2MSEL0_1, PH0_FN),
+
+        /* PJ FN */
+        PINMUX_DATA(SCIF5_SCK_MARK,     P2MSEL11_1, PJ7_FN),
+        PINMUX_DATA(FRB_MARK,           P2MSEL11_0, PJ7_FN),
+        PINMUX_DATA(SCIF5_RXD_MARK,     P2MSEL10_0, PJ6_FN),
+        PINMUX_DATA(IOIS16_MARK,        P2MSEL10_1, PJ6_FN),
+        PINMUX_DATA(SCIF5_TXD_MARK,     P2MSEL10_0, PJ5_FN),
+        PINMUX_DATA(CE2B_MARK,          P2MSEL10_1, PJ5_FN),
+        PINMUX_DATA(DRAK3_MARK,         P2MSEL7_0, PJ4_FN),
+        PINMUX_DATA(CE2A_MARK,          P2MSEL7_1, PJ4_FN),
+        PINMUX_DATA(SCIF4_SCK_MARK,     P2MSEL9_0, P2MSEL8_0, PJ3_FN),
+        PINMUX_DATA(DRAK2_MARK,         P2MSEL9_0, P2MSEL8_1, PJ3_FN),
+        PINMUX_DATA(SSI3_WS_MARK,       P2MSEL9_1, P2MSEL8_0, PJ3_FN),
+        PINMUX_DATA(SCIF4_RXD_MARK,     P2MSEL6_1, P2MSEL5_0, PJ2_FN),
+        PINMUX_DATA(DRAK1_MARK,         P2MSEL6_0, P2MSEL5_1, PJ2_FN),
+        PINMUX_DATA(FSTATUS_MARK,       P2MSEL6_0, P2MSEL5_0, PJ2_FN),
+        PINMUX_DATA(SSI3_SDATA_MARK,    P2MSEL6_1, P2MSEL5_1, PJ2_FN),
+        PINMUX_DATA(SCIF4_TXD_MARK,     P2MSEL6_1, P2MSEL5_0, PJ1_FN),
+        PINMUX_DATA(DRAK0_MARK,         P2MSEL6_0, P2MSEL5_1, PJ1_FN),
+        PINMUX_DATA(FSE_MARK,           P2MSEL6_0, P2MSEL5_0, PJ1_FN),
+        PINMUX_DATA(SSI3_SCK_MARK,      P2MSEL6_1, P2MSEL5_1, PJ1_FN),
+};
+
+static struct pinmux_gpio pinmux_gpios[] = {
+        /* PA */
+        PINMUX_GPIO(GPIO_PA7, PA7_DATA),
+        PINMUX_GPIO(GPIO_PA6, PA6_DATA),
+        PINMUX_GPIO(GPIO_PA5, PA5_DATA),
+        PINMUX_GPIO(GPIO_PA4, PA4_DATA),
+        PINMUX_GPIO(GPIO_PA3, PA3_DATA),
+        PINMUX_GPIO(GPIO_PA2, PA2_DATA),
+        PINMUX_GPIO(GPIO_PA1, PA1_DATA),
+        PINMUX_GPIO(GPIO_PA0, PA0_DATA),
+
+        /* PB */
+        PINMUX_GPIO(GPIO_PB7, PB7_DATA),
+        PINMUX_GPIO(GPIO_PB6, PB6_DATA),
+        PINMUX_GPIO(GPIO_PB5, PB5_DATA),
+        PINMUX_GPIO(GPIO_PB4, PB4_DATA),
+        PINMUX_GPIO(GPIO_PB3, PB3_DATA),
+        PINMUX_GPIO(GPIO_PB2, PB2_DATA),
+        PINMUX_GPIO(GPIO_PB1, PB1_DATA),
+        PINMUX_GPIO(GPIO_PB0, PB0_DATA),
+
+        /* PC */
+        PINMUX_GPIO(GPIO_PC7, PC7_DATA),
+        PINMUX_GPIO(GPIO_PC6, PC6_DATA),
+        PINMUX_GPIO(GPIO_PC5, PC5_DATA),
+        PINMUX_GPIO(GPIO_PC4, PC4_DATA),
+        PINMUX_GPIO(GPIO_PC3, PC3_DATA),
+        PINMUX_GPIO(GPIO_PC2, PC2_DATA),
+        PINMUX_GPIO(GPIO_PC1, PC1_DATA),
+        PINMUX_GPIO(GPIO_PC0, PC0_DATA),
+
+        /* PD */
+        PINMUX_GPIO(GPIO_PD7, PD7_DATA),
+        PINMUX_GPIO(GPIO_PD6, PD6_DATA),
+        PINMUX_GPIO(GPIO_PD5, PD5_DATA),
+        PINMUX_GPIO(GPIO_PD4, PD4_DATA),
+        PINMUX_GPIO(GPIO_PD3, PD3_DATA),
+        PINMUX_GPIO(GPIO_PD2, PD2_DATA),
+        PINMUX_GPIO(GPIO_PD1, PD1_DATA),
+        PINMUX_GPIO(GPIO_PD0, PD0_DATA),
+
+        /* PE */
+        PINMUX_GPIO(GPIO_PE5, PE7_DATA),
+        PINMUX_GPIO(GPIO_PE4, PE6_DATA),
+
+        /* PF */
+        PINMUX_GPIO(GPIO_PF7, PF7_DATA),
+        PINMUX_GPIO(GPIO_PF6, PF6_DATA),
+        PINMUX_GPIO(GPIO_PF5, PF5_DATA),
+        PINMUX_GPIO(GPIO_PF4, PF4_DATA),
+        PINMUX_GPIO(GPIO_PF3, PF3_DATA),
+        PINMUX_GPIO(GPIO_PF2, PF2_DATA),
+        PINMUX_GPIO(GPIO_PF1, PF1_DATA),
+        PINMUX_GPIO(GPIO_PF0, PF0_DATA),
+
+        /* PG */
+        PINMUX_GPIO(GPIO_PG7, PG7_DATA),
+        PINMUX_GPIO(GPIO_PG6, PG6_DATA),
+        PINMUX_GPIO(GPIO_PG5, PG5_DATA),
+
+        /* PH */
+        PINMUX_GPIO(GPIO_PH7, PH7_DATA),
+        PINMUX_GPIO(GPIO_PH6, PH6_DATA),
+        PINMUX_GPIO(GPIO_PH5, PH5_DATA),
+        PINMUX_GPIO(GPIO_PH4, PH4_DATA),
+        PINMUX_GPIO(GPIO_PH3, PH3_DATA),
+        PINMUX_GPIO(GPIO_PH2, PH2_DATA),
+        PINMUX_GPIO(GPIO_PH1, PH1_DATA),
+        PINMUX_GPIO(GPIO_PH0, PH0_DATA),
+
+        /* PJ */
+        PINMUX_GPIO(GPIO_PJ7, PJ7_DATA),
+        PINMUX_GPIO(GPIO_PJ6, PJ6_DATA),
+        PINMUX_GPIO(GPIO_PJ5, PJ5_DATA),
+        PINMUX_GPIO(GPIO_PJ4, PJ4_DATA),
+        PINMUX_GPIO(GPIO_PJ3, PJ3_DATA),
+        PINMUX_GPIO(GPIO_PJ2, PJ2_DATA),
+        PINMUX_GPIO(GPIO_PJ1, PJ1_DATA),
+
+        /* FN */
+        PINMUX_GPIO(GPIO_FN_CDE,                CDE_MARK),
+        PINMUX_GPIO(GPIO_FN_ETH_MAGIC,          ETH_MAGIC_MARK),
+        PINMUX_GPIO(GPIO_FN_DISP,               DISP_MARK),
+        PINMUX_GPIO(GPIO_FN_ETH_LINK,           ETH_LINK_MARK),
+        PINMUX_GPIO(GPIO_FN_DR5,                DR5_MARK),
+        PINMUX_GPIO(GPIO_FN_ETH_TX_ER,          ETH_TX_ER_MARK),
+        PINMUX_GPIO(GPIO_FN_DR4,                DR4_MARK),
+        PINMUX_GPIO(GPIO_FN_ETH_TX_EN,          ETH_TX_EN_MARK),
+        PINMUX_GPIO(GPIO_FN_DR3,                DR3_MARK),
+        PINMUX_GPIO(GPIO_FN_ETH_TXD3,           ETH_TXD3_MARK),
+        PINMUX_GPIO(GPIO_FN_DR2,                DR2_MARK),
+        PINMUX_GPIO(GPIO_FN_ETH_TXD2,           ETH_TXD2_MARK),
+        PINMUX_GPIO(GPIO_FN_DR1,                DR1_MARK),
+        PINMUX_GPIO(GPIO_FN_ETH_TXD1,           ETH_TXD1_MARK),
+        PINMUX_GPIO(GPIO_FN_DR0,                DR0_MARK),
+        PINMUX_GPIO(GPIO_FN_ETH_TXD0,           ETH_TXD0_MARK),
+        PINMUX_GPIO(GPIO_FN_VSYNC,              VSYNC_MARK),
+        PINMUX_GPIO(GPIO_FN_HSPI_CLK,           HSPI_CLK_MARK),
+        PINMUX_GPIO(GPIO_FN_ODDF,               ODDF_MARK),
+        PINMUX_GPIO(GPIO_FN_HSPI_CS,            HSPI_CS_MARK),
+        PINMUX_GPIO(GPIO_FN_DG5,                DG5_MARK),
+        PINMUX_GPIO(GPIO_FN_ETH_MDIO,           ETH_MDIO_MARK),
+        PINMUX_GPIO(GPIO_FN_DG4,                DG4_MARK),
+        PINMUX_GPIO(GPIO_FN_ETH_RX_CLK,         ETH_RX_CLK_MARK),
+        PINMUX_GPIO(GPIO_FN_DG3,                DG3_MARK),
+        PINMUX_GPIO(GPIO_FN_ETH_MDC,            ETH_MDC_MARK),
+        PINMUX_GPIO(GPIO_FN_DG2,                DG2_MARK),
+        PINMUX_GPIO(GPIO_FN_ETH_COL,            ETH_COL_MARK),
+        PINMUX_GPIO(GPIO_FN_DG1,                DG1_MARK),
+        PINMUX_GPIO(GPIO_FN_ETH_TX_CLK,         ETH_TX_CLK_MARK),
+        PINMUX_GPIO(GPIO_FN_DG0,                DG0_MARK),
+        PINMUX_GPIO(GPIO_FN_ETH_CRS,            ETH_CRS_MARK),
+        PINMUX_GPIO(GPIO_FN_DCLKIN,             DCLKIN_MARK),
+        PINMUX_GPIO(GPIO_FN_HSPI_RX,            HSPI_RX_MARK),
+        PINMUX_GPIO(GPIO_FN_HSYNC,              HSYNC_MARK),
+        PINMUX_GPIO(GPIO_FN_HSPI_TX,            HSPI_TX_MARK),
+        PINMUX_GPIO(GPIO_FN_DB5,                DB5_MARK),
+        PINMUX_GPIO(GPIO_FN_ETH_RXD3,           ETH_RXD3_MARK),
+        PINMUX_GPIO(GPIO_FN_DB4,                DB4_MARK),
+        PINMUX_GPIO(GPIO_FN_ETH_RXD2,           ETH_RXD2_MARK),
+        PINMUX_GPIO(GPIO_FN_DB3,                DB3_MARK),
+        PINMUX_GPIO(GPIO_FN_ETH_RXD1,           ETH_RXD1_MARK),
+        PINMUX_GPIO(GPIO_FN_DB2,                DB2_MARK),
+        PINMUX_GPIO(GPIO_FN_ETH_RXD0,           ETH_RXD0_MARK),
+        PINMUX_GPIO(GPIO_FN_DB1,                DB1_MARK),
+        PINMUX_GPIO(GPIO_FN_ETH_RX_DV,          ETH_RX_DV_MARK),
+        PINMUX_GPIO(GPIO_FN_DB0,                DB0_MARK),
+        PINMUX_GPIO(GPIO_FN_ETH_RX_ER,          ETH_RX_ER_MARK),
+        PINMUX_GPIO(GPIO_FN_DCLKOUT,            DCLKOUT_MARK),
+        PINMUX_GPIO(GPIO_FN_SCIF1_SLK,          SCIF1_SLK_MARK),
+        PINMUX_GPIO(GPIO_FN_SCIF1_RXD,          SCIF1_RXD_MARK),
+        PINMUX_GPIO(GPIO_FN_SCIF1_TXD,          SCIF1_TXD_MARK),
+        PINMUX_GPIO(GPIO_FN_DACK1,              DACK1_MARK),
+        PINMUX_GPIO(GPIO_FN_BACK,               BACK_MARK),
+        PINMUX_GPIO(GPIO_FN_FALE,               FALE_MARK),
+        PINMUX_GPIO(GPIO_FN_DACK0,              DACK0_MARK),
+        PINMUX_GPIO(GPIO_FN_FCLE,               FCLE_MARK),
+        PINMUX_GPIO(GPIO_FN_DREQ1,              DREQ1_MARK),
+        PINMUX_GPIO(GPIO_FN_BREQ,               BREQ_MARK),
+        PINMUX_GPIO(GPIO_FN_USB_OVC1,           USB_OVC1_MARK),
+        PINMUX_GPIO(GPIO_FN_DREQ0,              DREQ0_MARK),
+        PINMUX_GPIO(GPIO_FN_USB_OVC0,           USB_OVC0_MARK),
+        PINMUX_GPIO(GPIO_FN_USB_PENC1,          USB_PENC1_MARK),
+        PINMUX_GPIO(GPIO_FN_USB_PENC0,          USB_PENC0_MARK),
+        PINMUX_GPIO(GPIO_FN_HAC1_SDOUT,         HAC1_SDOUT_MARK),
+        PINMUX_GPIO(GPIO_FN_SSI1_SDATA,         SSI1_SDATA_MARK),
+        PINMUX_GPIO(GPIO_FN_SDIF1CMD,           SDIF1CMD_MARK),
+        PINMUX_GPIO(GPIO_FN_HAC1_SDIN,          HAC1_SDIN_MARK),
+        PINMUX_GPIO(GPIO_FN_SSI1_SCK,           SSI1_SCK_MARK),
+        PINMUX_GPIO(GPIO_FN_SDIF1CD,            SDIF1CD_MARK),
+        PINMUX_GPIO(GPIO_FN_HAC1_SYNC,          HAC1_SYNC_MARK),
+        PINMUX_GPIO(GPIO_FN_SSI1_WS,            SSI1_WS_MARK),
+        PINMUX_GPIO(GPIO_FN_SDIF1WP,            SDIF1WP_MARK),
+        PINMUX_GPIO(GPIO_FN_HAC1_BITCLK,        HAC1_BITCLK_MARK),
+        PINMUX_GPIO(GPIO_FN_SSI1_CLK,           SSI1_CLK_MARK),
+        PINMUX_GPIO(GPIO_FN_SDIF1CLK,           SDIF1CLK_MARK),
+        PINMUX_GPIO(GPIO_FN_HAC0_SDOUT,         HAC0_SDOUT_MARK),
+        PINMUX_GPIO(GPIO_FN_SSI0_SDATA,         SSI0_SDATA_MARK),
+        PINMUX_GPIO(GPIO_FN_SDIF1D3,            SDIF1D3_MARK),
+        PINMUX_GPIO(GPIO_FN_HAC0_SDIN,          HAC0_SDIN_MARK),
+        PINMUX_GPIO(GPIO_FN_SSI0_SCK,           SSI0_SCK_MARK),
+        PINMUX_GPIO(GPIO_FN_SDIF1D2,            SDIF1D2_MARK),
+        PINMUX_GPIO(GPIO_FN_HAC0_SYNC,          HAC0_SYNC_MARK),
+        PINMUX_GPIO(GPIO_FN_SSI0_WS,            SSI0_WS_MARK),
+        PINMUX_GPIO(GPIO_FN_SDIF1D1,            SDIF1D1_MARK),
+        PINMUX_GPIO(GPIO_FN_HAC0_BITCLK,        HAC0_BITCLK_MARK),
+        PINMUX_GPIO(GPIO_FN_SSI0_CLK,           SSI0_CLK_MARK),
+        PINMUX_GPIO(GPIO_FN_SDIF1D0,            SDIF1D0_MARK),
+        PINMUX_GPIO(GPIO_FN_SCIF3_SCK,          SCIF3_SCK_MARK),
+        PINMUX_GPIO(GPIO_FN_SSI2_SDATA,         SSI2_SDATA_MARK),
+        PINMUX_GPIO(GPIO_FN_SCIF3_RXD,          SCIF3_RXD_MARK),
+        PINMUX_GPIO(GPIO_FN_TCLK,               TCLK_MARK),
+        PINMUX_GPIO(GPIO_FN_SSI2_SCK,           SSI2_SCK_MARK),
+        PINMUX_GPIO(GPIO_FN_SCIF3_TXD,          SCIF3_TXD_MARK),
+        PINMUX_GPIO(GPIO_FN_HAC_RES,            HAC_RES_MARK),
+        PINMUX_GPIO(GPIO_FN_SSI2_WS,            SSI2_WS_MARK),
+        PINMUX_GPIO(GPIO_FN_DACK3,              DACK3_MARK),
+        PINMUX_GPIO(GPIO_FN_SDIF0CMD,           SDIF0CMD_MARK),
+        PINMUX_GPIO(GPIO_FN_DACK2,              DACK2_MARK),
+        PINMUX_GPIO(GPIO_FN_SDIF0CD,            SDIF0CD_MARK),
+        PINMUX_GPIO(GPIO_FN_DREQ3,              DREQ3_MARK),
+        PINMUX_GPIO(GPIO_FN_SDIF0WP,            SDIF0WP_MARK),
+        PINMUX_GPIO(GPIO_FN_SCIF0_CTS,          SCIF0_CTS_MARK),
+        PINMUX_GPIO(GPIO_FN_DREQ2,              DREQ2_MARK),
+        PINMUX_GPIO(GPIO_FN_SDIF0CLK,           SDIF0CLK_MARK),
+        PINMUX_GPIO(GPIO_FN_SCIF0_RTS,          SCIF0_RTS_MARK),
+        PINMUX_GPIO(GPIO_FN_IRL7,               IRL7_MARK),
+        PINMUX_GPIO(GPIO_FN_SDIF0D3,            SDIF0D3_MARK),
+        PINMUX_GPIO(GPIO_FN_SCIF0_SCK,          SCIF0_SCK_MARK),
+        PINMUX_GPIO(GPIO_FN_IRL6,               IRL6_MARK),
+        PINMUX_GPIO(GPIO_FN_SDIF0D2,            SDIF0D2_MARK),
+        PINMUX_GPIO(GPIO_FN_SCIF0_RXD,          SCIF0_RXD_MARK),
+        PINMUX_GPIO(GPIO_FN_IRL5,               IRL5_MARK),
+        PINMUX_GPIO(GPIO_FN_SDIF0D1,            SDIF0D1_MARK),
+        PINMUX_GPIO(GPIO_FN_SCIF0_TXD,          SCIF0_TXD_MARK),
+        PINMUX_GPIO(GPIO_FN_IRL4,               IRL4_MARK),
+        PINMUX_GPIO(GPIO_FN_SDIF0D0,            SDIF0D0_MARK),
+        PINMUX_GPIO(GPIO_FN_SCIF5_SCK,          SCIF5_SCK_MARK),
+        PINMUX_GPIO(GPIO_FN_FRB,                FRB_MARK),
+        PINMUX_GPIO(GPIO_FN_SCIF5_RXD,          SCIF5_RXD_MARK),
+        PINMUX_GPIO(GPIO_FN_IOIS16,             IOIS16_MARK),
+        PINMUX_GPIO(GPIO_FN_SCIF5_TXD,          SCIF5_TXD_MARK),
+        PINMUX_GPIO(GPIO_FN_CE2B,               CE2B_MARK),
+        PINMUX_GPIO(GPIO_FN_DRAK3,              DRAK3_MARK),
+        PINMUX_GPIO(GPIO_FN_CE2A,               CE2A_MARK),
+        PINMUX_GPIO(GPIO_FN_SCIF4_SCK,          SCIF4_SCK_MARK),
+        PINMUX_GPIO(GPIO_FN_DRAK2,              DRAK2_MARK),
+        PINMUX_GPIO(GPIO_FN_SSI3_WS,            SSI3_WS_MARK),
+        PINMUX_GPIO(GPIO_FN_SCIF4_RXD,          SCIF4_RXD_MARK),
+        PINMUX_GPIO(GPIO_FN_DRAK1,              DRAK1_MARK),
+        PINMUX_GPIO(GPIO_FN_SSI3_SDATA,         SSI3_SDATA_MARK),
+        PINMUX_GPIO(GPIO_FN_FSTATUS,            FSTATUS_MARK),
+        PINMUX_GPIO(GPIO_FN_SCIF4_TXD,          SCIF4_TXD_MARK),
+        PINMUX_GPIO(GPIO_FN_DRAK0,              DRAK0_MARK),
+        PINMUX_GPIO(GPIO_FN_SSI3_SCK,           SSI3_SCK_MARK),
+        PINMUX_GPIO(GPIO_FN_FSE,                FSE_MARK),
+};
+
+static struct pinmux_cfg_reg pinmux_config_regs[] = {
+        { PINMUX_CFG_REG("PACR", 0xffcc0000, 16, 2) {
+                PA7_FN, PA7_OUT, PA7_IN, PA7_IN_PU,
+                PA6_FN, PA6_OUT, PA6_IN, PA6_IN_PU,
+                PA5_FN, PA5_OUT, PA5_IN, PA5_IN_PU,
+                PA4_FN, PA4_OUT, PA4_IN, PA4_IN_PU,
+                PA3_FN, PA3_OUT, PA3_IN, PA3_IN_PU,
+                PA2_FN, PA2_OUT, PA2_IN, PA2_IN_PU,
+                PA1_FN, PA1_OUT, PA1_IN, PA1_IN_PU,
+                PA0_FN, PA0_OUT, PA0_IN, PA0_IN_PU }
+        },
+        { PINMUX_CFG_REG("PBCR", 0xffcc0002, 16, 2) {
+                PB7_FN, PB7_OUT, PB7_IN, PB7_IN_PU,
+                PB6_FN, PB6_OUT, PB6_IN, PB6_IN_PU,
+                PB5_FN, PB5_OUT, PB5_IN, PB5_IN_PU,
+                PB4_FN, PB4_OUT, PB4_IN, PB4_IN_PU,
+                PB3_FN, PB3_OUT, PB3_IN, PB3_IN_PU,
+                PB2_FN, PB2_OUT, PB2_IN, PB2_IN_PU,
+                PB1_FN, PB1_OUT, PB1_IN, PB1_IN_PU,
+                PB0_FN, PB0_OUT, PB0_IN, PB0_IN_PU }
+        },
+        { PINMUX_CFG_REG("PCCR", 0xffcc0004, 16, 2) {
+                PC7_FN, PC7_OUT, PC7_IN, PC7_IN_PU,
+                PC6_FN, PC6_OUT, PC6_IN, PC6_IN_PU,
+                PC5_FN, PC5_OUT, PC5_IN, PC5_IN_PU,
+                PC4_FN, PC4_OUT, PC4_IN, PC4_IN_PU,
+                PC3_FN, PC3_OUT, PC3_IN, PC3_IN_PU,
+                PC2_FN, PC2_OUT, PC2_IN, PC2_IN_PU,
+                PC1_FN, PC1_OUT, PC1_IN, PC1_IN_PU,
+                PC0_FN, PC0_OUT, PC0_IN, PC0_IN_PU }
+        },
+        { PINMUX_CFG_REG("PDCR", 0xffcc0006, 16, 2) {
+                PD7_FN, PD7_OUT, PD7_IN, PD7_IN_PU,
+                PD6_FN, PD6_OUT, PD6_IN, PD6_IN_PU,
+                PD5_FN, PD5_OUT, PD5_IN, PD5_IN_PU,
+                PD4_FN, PD4_OUT, PD4_IN, PD4_IN_PU,
+                PD3_FN, PD3_OUT, PD3_IN, PD3_IN_PU,
+                PD2_FN, PD2_OUT, PD2_IN, PD2_IN_PU,
+                PD1_FN, PD1_OUT, PD1_IN, PD1_IN_PU,
+                PD0_FN, PD0_OUT, PD0_IN, PD0_IN_PU }
+        },
+        { PINMUX_CFG_REG("PECR", 0xffcc0008, 16, 2) {
+                PE7_FN, PE7_OUT, PE7_IN, PE7_IN_PU,
+                PE6_FN, PE6_OUT, PE6_IN, PE6_IN_PU,
+                0, 0, 0, 0,
+                0, 0, 0, 0,
+                0, 0, 0, 0,
+                0, 0, 0, 0,
+                0, 0, 0, 0,
+                0, 0, 0, 0, }
+        },
+        { PINMUX_CFG_REG("PFCR", 0xffcc000a, 16, 2) {
+                PF7_FN, PF7_OUT, PF7_IN, PF7_IN_PU,
+                PF6_FN, PF6_OUT, PF6_IN, PF6_IN_PU,
+                PF5_FN, PF5_OUT, PF5_IN, PF5_IN_PU,
+                PF4_FN, PF4_OUT, PF4_IN, PF4_IN_PU,
+                PF3_FN, PF3_OUT, PF3_IN, PF3_IN_PU,
+                PF2_FN, PF2_OUT, PF2_IN, PF2_IN_PU,
+                PF1_FN, PF1_OUT, PF1_IN, PF1_IN_PU,
+                PF0_FN, PF0_OUT, PF0_IN, PF0_IN_PU }
+        },
+        { PINMUX_CFG_REG("PGCR", 0xffcc000c, 16, 2) {
+                PG7_FN, PG7_OUT, PG7_IN, PG7_IN_PU,
+                PG6_FN, PG6_OUT, PG6_IN, PG6_IN_PU,
+                PG5_FN, PG5_OUT, PG5_IN, PG5_IN_PU,
+                0, 0, 0, 0,
+                0, 0, 0, 0,
+                0, 0, 0, 0,
+                0, 0, 0, 0,
+                0, 0, 0, 0, }
+        },
+        { PINMUX_CFG_REG("PHCR", 0xffcc000e, 16, 2) {
+                PH7_FN, PH7_OUT, PH7_IN, PH7_IN_PU,
+                PH6_FN, PH6_OUT, PH6_IN, PH6_IN_PU,
+                PH5_FN, PH5_OUT, PH5_IN, PH5_IN_PU,
+                PH4_FN, PH4_OUT, PH4_IN, PH4_IN_PU,
+                PH3_FN, PH3_OUT, PH3_IN, PH3_IN_PU,
+                PH2_FN, PH2_OUT, PH2_IN, PH2_IN_PU,
+                PH1_FN, PH1_OUT, PH1_IN, PH1_IN_PU,
+                PH0_FN, PH0_OUT, PH0_IN, PH0_IN_PU }
+        },
+        { PINMUX_CFG_REG("PJCR", 0xffcc0010, 16, 2) {
+                PJ7_FN, PJ7_OUT, PJ7_IN, PJ7_IN_PU,
+                PJ6_FN, PJ6_OUT, PJ6_IN, PJ6_IN_PU,
+                PJ5_FN, PJ5_OUT, PJ5_IN, PJ5_IN_PU,
+                PJ4_FN, PJ4_OUT, PJ4_IN, PJ4_IN_PU,
+                PJ3_FN, PJ3_OUT, PJ3_IN, PJ3_IN_PU,
+                PJ2_FN, PJ2_OUT, PJ2_IN, PJ2_IN_PU,
+                PJ1_FN, PJ1_OUT, PJ1_IN, PJ1_IN_PU,
+                0, 0, 0, 0, }
+        },
+        { PINMUX_CFG_REG("P1MSELR", 0xffcc0080, 16, 1) {
+                0, 0,
+                P1MSEL14_0, P1MSEL14_1,
+                P1MSEL13_0, P1MSEL13_1,
+                P1MSEL12_0, P1MSEL12_1,
+                P1MSEL11_0, P1MSEL11_1,
+                P1MSEL10_0, P1MSEL10_1,
+                P1MSEL9_0,  P1MSEL9_1,
+                P1MSEL8_0,  P1MSEL8_1,
+                P1MSEL7_0,  P1MSEL7_1,
+                P1MSEL6_0,  P1MSEL6_1,
+                P1MSEL5_0,  P1MSEL5_1,
+                P1MSEL4_0,  P1MSEL4_1,
+                P1MSEL3_0,  P1MSEL3_1,
+                P1MSEL2_0,  P1MSEL2_1,
+                P1MSEL1_0,  P1MSEL1_1,
+                P1MSEL0_0,  P1MSEL0_1 }
+        },
+        { PINMUX_CFG_REG("P2MSELR", 0xffcc0082, 16, 1) {
+                P2MSEL15_0, P2MSEL15_1,
+                P2MSEL14_0, P2MSEL14_1,
+                P2MSEL13_0, P2MSEL13_1,
+                P2MSEL12_0, P2MSEL12_1,
+                P2MSEL11_0, P2MSEL11_1,
+                P2MSEL10_0, P2MSEL10_1,
+                P2MSEL9_0,  P2MSEL9_1,
+                P2MSEL8_0,  P2MSEL8_1,
+                P2MSEL7_0,  P2MSEL7_1,
+                P2MSEL6_0,  P2MSEL6_1,
+                P2MSEL5_0,  P2MSEL5_1,
+                P2MSEL4_0,  P2MSEL4_1,
+                P2MSEL3_0,  P2MSEL3_1,
+                P2MSEL2_0,  P2MSEL2_1,
+                P2MSEL1_0,  P2MSEL1_1,
+                P2MSEL0_0,  P2MSEL0_1 }
+        },
+        {}
+};
+
+static struct pinmux_data_reg pinmux_data_regs[] = {
+        { PINMUX_DATA_REG("PADR", 0xffcc0020, 8) {
+                PA7_DATA, PA6_DATA, PA5_DATA, PA4_DATA,
+                PA3_DATA, PA2_DATA, PA1_DATA, PA0_DATA }
+        },
+        { PINMUX_DATA_REG("PBDR", 0xffcc0022, 8) {
+                PB7_DATA, PB6_DATA, PB5_DATA, PB4_DATA,
+                PB3_DATA, PB2_DATA, PB1_DATA, PB0_DATA }
+        },
+        { PINMUX_DATA_REG("PCDR", 0xffcc0024, 8) {
+                PC7_DATA, PC6_DATA, PC5_DATA, PC4_DATA,
+                PC3_DATA, PC2_DATA, PC1_DATA, PC0_DATA }
+        },
+        { PINMUX_DATA_REG("PDDR", 0xffcc0026, 8) {
+                PD7_DATA, PD6_DATA, PD5_DATA, PD4_DATA,
+                PD3_DATA, PD2_DATA, PD1_DATA, PD0_DATA }
+        },
+        { PINMUX_DATA_REG("PEDR", 0xffcc0028, 8) {
+                PE7_DATA, PE6_DATA,
+                0, 0, 0, 0, 0, 0 }
+        },
+        { PINMUX_DATA_REG("PFDR", 0xffcc002a, 8) {
+                PF7_DATA, PF6_DATA, PF5_DATA, PF4_DATA,
+                PF3_DATA, PF2_DATA, PF1_DATA, PF0_DATA }
+        },
+        { PINMUX_DATA_REG("PGDR", 0xffcc002c, 8) {
+                PG7_DATA, PG6_DATA, PG5_DATA, 0,
+                0, 0, 0, 0 }
+        },
+        { PINMUX_DATA_REG("PHDR", 0xffcc002e, 8) {
+                PH7_DATA, PH6_DATA, PH5_DATA, PH4_DATA,
+                PH3_DATA, PH2_DATA, PH1_DATA, PH0_DATA }
+        },
+        { PINMUX_DATA_REG("PJDR", 0xffcc0030, 8) {
+                PJ7_DATA, PJ6_DATA, PJ5_DATA, PJ4_DATA,
+                PJ3_DATA, PJ2_DATA, PJ1_DATA, 0 }
+        },
+        { },
+};
+
+static struct pinmux_info sh7786_pinmux_info = {
+        .name = "sh7786_pfc",
+        .reserved_id = PINMUX_RESERVED,
+        .data = { PINMUX_DATA_BEGIN, PINMUX_DATA_END },
+        .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END },
+        .input_pu = { PINMUX_INPUT_PULLUP_BEGIN, PINMUX_INPUT_PULLUP_END },
+        .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END },
+        .mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END },
+        .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
+
+        .first_gpio = GPIO_PA7,
+        .last_gpio = GPIO_FN_FSE,
+
+        .gpios = pinmux_gpios,
+        .cfg_regs = pinmux_config_regs,
+        .data_regs = pinmux_data_regs,
+
+        .gpio_data = pinmux_data,
+        .gpio_data_size = ARRAY_SIZE(pinmux_data),
+};
+
+static int __init plat_pinmux_setup(void)
+{
+        return register_pinmux(&sh7786_pinmux_info);
+}
+
+arch_initcall(plat_pinmux_setup);
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7343.c b/arch/sh/kernel/cpu/sh4a/setup-sh7343.c
index 4ff4dc64520c..c1549382c87c 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7343.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7343.c
@@ -12,6 +12,7 @@
 #include <linux/serial.h>
 #include <linux/serial_sci.h>
 #include <linux/uio_driver.h>
+#include <linux/sh_cmt.h>
 #include <asm/clock.h>
 
 static struct resource iic0_resources[] = {
@@ -140,6 +141,38 @@ static struct platform_device jpu_device = {
         .num_resources  = ARRAY_SIZE(jpu_resources),
 };
 
+static struct sh_cmt_config cmt_platform_data = {
+        .name = "CMT",
+        .channel_offset = 0x60,
+        .timer_bit = 5,
+        .clk = "cmt0",
+        .clockevent_rating = 125,
+        .clocksource_rating = 200,
+};
+
+static struct resource cmt_resources[] = {
+        [0] = {
+                .name   = "CMT",
+                .start  = 0x044a0060,
+                .end    = 0x044a006b,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 104,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device cmt_device = {
+        .name           = "sh_cmt",
+        .id             = 0,
+        .dev = {
+                .platform_data  = &cmt_platform_data,
+        },
+        .resource       = cmt_resources,
+        .num_resources  = ARRAY_SIZE(cmt_resources),
+};
+
 static struct plat_sci_port sci_platform_data[] = {
         {
                 .mapbase        = 0xffe00000,
@@ -175,6 +208,7 @@ static struct platform_device sci_device = {
 };
 
 static struct platform_device *sh7343_devices[] __initdata = {
+        &cmt_device,
         &iic0_device,
         &iic1_device,
         &sci_device,
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7366.c b/arch/sh/kernel/cpu/sh4a/setup-sh7366.c
index 839ae97a7fd2..93ecf8ed5c6c 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7366.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7366.c
@@ -14,6 +14,7 @@
 #include <linux/serial.h>
 #include <linux/serial_sci.h>
 #include <linux/uio_driver.h>
+#include <linux/sh_cmt.h>
 #include <asm/clock.h>
 
 static struct resource iic_resources[] = {
@@ -147,6 +148,38 @@ static struct platform_device veu1_device = {
         .num_resources  = ARRAY_SIZE(veu1_resources),
 };
 
+static struct sh_cmt_config cmt_platform_data = {
+        .name = "CMT",
+        .channel_offset = 0x60,
+        .timer_bit = 5,
+        .clk = "cmt0",
+        .clockevent_rating = 125,
+        .clocksource_rating = 200,
+};
+
+static struct resource cmt_resources[] = {
+        [0] = {
+                .name   = "CMT",
+                .start  = 0x044a0060,
+                .end    = 0x044a006b,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 104,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device cmt_device = {
+        .name           = "sh_cmt",
+        .id             = 0,
+        .dev = {
+                .platform_data  = &cmt_platform_data,
+        },
+        .resource       = cmt_resources,
+        .num_resources  = ARRAY_SIZE(cmt_resources),
+};
+
 static struct plat_sci_port sci_platform_data[] = {
         {
                 .mapbase        = 0xffe00000,
@@ -167,6 +200,7 @@ static struct platform_device sci_device = {
 };
 
 static struct platform_device *sh7366_devices[] __initdata = {
+        &cmt_device,
         &iic_device,
         &sci_device,
         &usb_host_device,
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
index 5146afc156e0..0e5d204bc792 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
@@ -13,6 +13,7 @@
 #include <linux/serial_sci.h>
 #include <linux/mm.h>
 #include <linux/uio_driver.h>
+#include <linux/sh_cmt.h>
 #include <asm/clock.h>
 #include <asm/mmzone.h>
 
@@ -176,6 +177,38 @@ static struct platform_device jpu_device = {
         .num_resources  = ARRAY_SIZE(jpu_resources),
 };
 
+static struct sh_cmt_config cmt_platform_data = {
+        .name = "CMT",
+        .channel_offset = 0x60,
+        .timer_bit = 5,
+        .clk = "cmt0",
+        .clockevent_rating = 125,
+        .clocksource_rating = 200,
+};
+
+static struct resource cmt_resources[] = {
+        [0] = {
+                .name   = "CMT",
+                .start  = 0x044a0060,
+                .end    = 0x044a006b,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 104,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device cmt_device = {
+        .name           = "sh_cmt",
+        .id             = 0,
+        .dev = {
+                .platform_data  = &cmt_platform_data,
+        },
+        .resource       = cmt_resources,
+        .num_resources  = ARRAY_SIZE(cmt_resources),
+};
+
 static struct plat_sci_port sci_platform_data[] = {
         {
                 .mapbase        = 0xffe00000,
@@ -209,6 +242,7 @@ static struct platform_device sci_device = {
 };
 
 static struct platform_device *sh7722_devices[] __initdata = {
+        &cmt_device,
         &rtc_device,
         &usbf_device,
         &iic_device,
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7723.c b/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
index 849770d780ae..5338dacbcfba 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
@@ -13,6 +13,7 @@
 #include <linux/mm.h>
 #include <linux/serial_sci.h>
 #include <linux/uio_driver.h>
+#include <linux/sh_cmt.h>
 #include <asm/clock.h>
 #include <asm/mmzone.h>
 
@@ -100,6 +101,38 @@ static struct platform_device veu1_device = {
         .num_resources  = ARRAY_SIZE(veu1_resources),
 };
 
+static struct sh_cmt_config cmt_platform_data = {
+        .name = "CMT",
+        .channel_offset = 0x60,
+        .timer_bit = 5,
+        .clk = "cmt0",
+        .clockevent_rating = 125,
+        .clocksource_rating = 200,
+};
+
+static struct resource cmt_resources[] = {
+        [0] = {
+                .name   = "CMT",
+                .start  = 0x044a0060,
+                .end    = 0x044a006b,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 104,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device cmt_device = {
+        .name           = "sh_cmt",
+        .id             = 0,
+        .dev = {
+                .platform_data  = &cmt_platform_data,
+        },
+        .resource       = cmt_resources,
+        .num_resources  = ARRAY_SIZE(cmt_resources),
+};
+
 static struct plat_sci_port sci_platform_data[] = {
         {
                 .mapbase        = 0xffe00000,
@@ -221,6 +254,7 @@ static struct platform_device iic_device = {
 };
 
 static struct platform_device *sh7723_devices[] __initdata = {
+        &cmt_device,
         &sci_device,
         &rtc_device,
         &iic_device,
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7763.c b/arch/sh/kernel/cpu/sh4a/setup-sh7763.c
index 3c5b629887a8..bdf0f61ae1ed 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7763.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7763.c
@@ -3,7 +3,7 @@
  *
  *  Copyright (C) 2006  Paul Mundt
  *  Copyright (C) 2007  Yoshihiro Shimoda
- *  Copyright (C) 2008  Nobuhiro Iwamatsu
+ *  Copyright (C) 2008, 2009  Nobuhiro Iwamatsu
  *
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
@@ -22,18 +22,8 @@ static struct resource rtc_resources[] = {
                 .flags  = IORESOURCE_IO,
         },
         [1] = {
-                /* Period IRQ */
-                .start  = 21,
-                .flags  = IORESOURCE_IRQ,
-        },
-        [2] = {
-                /* Carry IRQ */
-                .start  = 22,
-                .flags  = IORESOURCE_IRQ,
-        },
-        [3] = {
-                /* Alarm IRQ */
-                .start  = 20,
+                /* Shared Period/Carry/Alarm IRQ */
+                .start  = 20,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -50,17 +40,17 @@ static struct plat_sci_port sci_platform_data[] = {
                 .mapbase        = 0xffe00000,
                 .flags          = UPF_BOOT_AUTOCONF,
                 .type           = PORT_SCIF,
-                .irqs           = { 40, 41, 43, 42 },
+                .irqs           = { 40, 40, 40, 40 },
         }, {
                 .mapbase        = 0xffe08000,
                 .flags          = UPF_BOOT_AUTOCONF,
                 .type           = PORT_SCIF,
-                .irqs           = { 76, 77, 79, 78 },
+                .irqs           = { 76, 76, 76, 76 },
         }, {
                 .mapbase        = 0xffe10000,
                 .flags          = UPF_BOOT_AUTOCONF,
                 .type           = PORT_SCIF,
-                .irqs           = { 104, 105, 107, 106 },
+                .irqs           = { 104, 104, 104, 104 },
         }, {
                 .flags = 0,
         }
@@ -148,93 +138,65 @@ enum {
         IRL_HHLL, IRL_HHLH, IRL_HHHL,
 
         IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7,
-        RTC_ATI, RTC_PRI, RTC_CUI,
-        WDT, TMU0, TMU1, TMU2, TMU2_TICPI,
-        HUDI, LCDC,
-        DMAC0_DMINT0, DMAC0_DMINT1, DMAC0_DMINT2, DMAC0_DMINT3, DMAC0_DMAE,
-        SCIF0_ERI, SCIF0_RXI, SCIF0_BRI, SCIF0_TXI,
-        DMAC0_DMINT4, DMAC0_DMINT5,
-        IIC0, IIC1,
-        CMT,
-        GEINT0, GEINT1, GEINT2,
-        HAC,
-        PCISERR, PCIINTA, PCIINTB, PCIINTC, PCIINTD,
-        PCIERR, PCIPWD3, PCIPWD2, PCIPWD1, PCIPWD0,
-        STIF0, STIF1,
-        SCIF1_ERI, SCIF1_RXI, SCIF1_BRI, SCIF1_TXI,
-        SIOF0, SIOF1, SIOF2,
-        USBH, USBFI0, USBFI1,
-        TPU, PCC,
-        MMCIF_FSTAT, MMCIF_TRAN, MMCIF_ERR, MMCIF_FRDY,
-        SIM_ERI, SIM_RXI, SIM_TXI, SIM_TEND,
+        RTC, WDT, TMU0, TMU1, TMU2, TMU2_TICPI,
+        HUDI, LCDC, DMAC, SCIF0, IIC0, IIC1, CMT, GETHER, HAC,
+        PCISERR, PCIINTA, PCIINTB, PCIINTC, PCIINTD, PCIC5,
+        STIF0, STIF1, SCIF1, SIOF0, SIOF1, SIOF2,
+        USBH, USBF, TPU, PCC, MMCIF, SIM,
         TMU3, TMU4, TMU5, ADC, SSI0, SSI1, SSI2, SSI3,
-        SCIF2_ERI, SCIF2_RXI, SCIF2_BRI, SCIF2_TXI,
-        GPIO_CH0, GPIO_CH1, GPIO_CH2, GPIO_CH3,
+        SCIF2, GPIO,
 
         /* interrupt groups */
 
-        TMU012, TMU345, RTC, DMAC, SCIF0, GETHER, PCIC5,
-        SCIF1, USBF, MMCIF, SIM, SCIF2, GPIO,
+        TMU012, TMU345,
 };
 
 static struct intc_vect vectors[] __initdata = {
-        INTC_VECT(RTC_ATI, 0x480), INTC_VECT(RTC_PRI, 0x4a0),
-        INTC_VECT(RTC_CUI, 0x4c0),
+        INTC_VECT(RTC, 0x480), INTC_VECT(RTC, 0x4a0),
+        INTC_VECT(RTC, 0x4c0),
         INTC_VECT(WDT, 0x560), INTC_VECT(TMU0, 0x580),
         INTC_VECT(TMU1, 0x5a0), INTC_VECT(TMU2, 0x5c0),
         INTC_VECT(TMU2_TICPI, 0x5e0), INTC_VECT(HUDI, 0x600),
         INTC_VECT(LCDC, 0x620),
-        INTC_VECT(DMAC0_DMINT0, 0x640), INTC_VECT(DMAC0_DMINT1, 0x660),
-        INTC_VECT(DMAC0_DMINT2, 0x680), INTC_VECT(DMAC0_DMINT3, 0x6a0),
-        INTC_VECT(DMAC0_DMAE, 0x6c0),
-        INTC_VECT(SCIF0_ERI, 0x700), INTC_VECT(SCIF0_RXI, 0x720),
-        INTC_VECT(SCIF0_BRI, 0x740), INTC_VECT(SCIF0_TXI, 0x760),
-        INTC_VECT(DMAC0_DMINT4, 0x780), INTC_VECT(DMAC0_DMINT5, 0x7a0),
+        INTC_VECT(DMAC, 0x640), INTC_VECT(DMAC, 0x660),
+        INTC_VECT(DMAC, 0x680), INTC_VECT(DMAC, 0x6a0),
+        INTC_VECT(DMAC, 0x6c0),
+        INTC_VECT(SCIF0, 0x700), INTC_VECT(SCIF0, 0x720),
+        INTC_VECT(SCIF0, 0x740), INTC_VECT(SCIF0, 0x760),
+        INTC_VECT(DMAC, 0x780), INTC_VECT(DMAC, 0x7a0),
         INTC_VECT(IIC0, 0x8A0), INTC_VECT(IIC1, 0x8C0),
-        INTC_VECT(CMT, 0x900), INTC_VECT(GEINT0, 0x920),
-        INTC_VECT(GEINT1, 0x940), INTC_VECT(GEINT2, 0x960),
+        INTC_VECT(CMT, 0x900), INTC_VECT(GETHER, 0x920),
+        INTC_VECT(GETHER, 0x940), INTC_VECT(GETHER, 0x960),
         INTC_VECT(HAC, 0x980),
         INTC_VECT(PCISERR, 0xa00), INTC_VECT(PCIINTA, 0xa20),
         INTC_VECT(PCIINTB, 0xa40), INTC_VECT(PCIINTC, 0xa60),
-        INTC_VECT(PCIINTD, 0xa80), INTC_VECT(PCIERR, 0xaa0),
-        INTC_VECT(PCIPWD3, 0xac0), INTC_VECT(PCIPWD2, 0xae0),
-        INTC_VECT(PCIPWD1, 0xb00), INTC_VECT(PCIPWD0, 0xb20),
+        INTC_VECT(PCIINTD, 0xa80), INTC_VECT(PCIC5, 0xaa0),
+        INTC_VECT(PCIC5, 0xac0), INTC_VECT(PCIC5, 0xae0),
+        INTC_VECT(PCIC5, 0xb00), INTC_VECT(PCIC5, 0xb20),
         INTC_VECT(STIF0, 0xb40), INTC_VECT(STIF1, 0xb60),
-        INTC_VECT(SCIF1_ERI, 0xb80), INTC_VECT(SCIF1_RXI, 0xba0),
-        INTC_VECT(SCIF1_BRI, 0xbc0), INTC_VECT(SCIF1_TXI, 0xbe0),
+        INTC_VECT(SCIF1, 0xb80), INTC_VECT(SCIF1, 0xba0),
+        INTC_VECT(SCIF1, 0xbc0), INTC_VECT(SCIF1, 0xbe0),
         INTC_VECT(SIOF0, 0xc00), INTC_VECT(SIOF1, 0xc20),
-        INTC_VECT(USBH, 0xc60), INTC_VECT(USBFI0, 0xc80),
-        INTC_VECT(USBFI1, 0xca0),
+        INTC_VECT(USBH, 0xc60), INTC_VECT(USBF, 0xc80),
+        INTC_VECT(USBF, 0xca0),
         INTC_VECT(TPU, 0xcc0), INTC_VECT(PCC, 0xce0),
-        INTC_VECT(MMCIF_FSTAT, 0xd00), INTC_VECT(MMCIF_TRAN, 0xd20),
-        INTC_VECT(MMCIF_ERR, 0xd40), INTC_VECT(MMCIF_FRDY, 0xd60),
-        INTC_VECT(SIM_ERI, 0xd80), INTC_VECT(SIM_RXI, 0xda0),
-        INTC_VECT(SIM_TXI, 0xdc0), INTC_VECT(SIM_TEND, 0xde0),
+        INTC_VECT(MMCIF, 0xd00), INTC_VECT(MMCIF, 0xd20),
+        INTC_VECT(MMCIF, 0xd40), INTC_VECT(MMCIF, 0xd60),
+        INTC_VECT(SIM, 0xd80), INTC_VECT(SIM, 0xda0),
+        INTC_VECT(SIM, 0xdc0), INTC_VECT(SIM, 0xde0),
         INTC_VECT(TMU3, 0xe00), INTC_VECT(TMU4, 0xe20),
         INTC_VECT(TMU5, 0xe40), INTC_VECT(ADC, 0xe60),
         INTC_VECT(SSI0, 0xe80), INTC_VECT(SSI1, 0xea0),
         INTC_VECT(SSI2, 0xec0), INTC_VECT(SSI3, 0xee0),
-        INTC_VECT(SCIF2_ERI, 0xf00), INTC_VECT(SCIF2_RXI, 0xf20),
-        INTC_VECT(SCIF2_BRI, 0xf40), INTC_VECT(SCIF2_TXI, 0xf60),
-        INTC_VECT(GPIO_CH0, 0xf80), INTC_VECT(GPIO_CH1, 0xfa0),
-        INTC_VECT(GPIO_CH2, 0xfc0), INTC_VECT(GPIO_CH3, 0xfe0),
+        INTC_VECT(SCIF2, 0xf00), INTC_VECT(SCIF2, 0xf20),
+        INTC_VECT(SCIF2, 0xf40), INTC_VECT(SCIF2, 0xf60),
+        INTC_VECT(GPIO, 0xf80), INTC_VECT(GPIO, 0xfa0),
+        INTC_VECT(GPIO, 0xfc0), INTC_VECT(GPIO, 0xfe0),
 };
 
 static struct intc_group groups[] __initdata = {
         INTC_GROUP(TMU012, TMU0, TMU1, TMU2, TMU2_TICPI),
         INTC_GROUP(TMU345, TMU3, TMU4, TMU5),
-        INTC_GROUP(RTC, RTC_ATI, RTC_PRI, RTC_CUI),
-        INTC_GROUP(DMAC, DMAC0_DMINT0, DMAC0_DMINT1, DMAC0_DMINT2,
-                   DMAC0_DMINT3, DMAC0_DMINT4, DMAC0_DMINT5, DMAC0_DMAE),
-        INTC_GROUP(SCIF0, SCIF0_ERI, SCIF0_RXI, SCIF0_BRI, SCIF0_TXI),
-        INTC_GROUP(GETHER, GEINT0, GEINT1, GEINT2),
-        INTC_GROUP(PCIC5, PCIERR, PCIPWD3, PCIPWD2, PCIPWD1, PCIPWD0),
-        INTC_GROUP(SCIF1, SCIF1_ERI, SCIF1_RXI, SCIF1_BRI, SCIF1_TXI),
-        INTC_GROUP(USBF, USBFI0, USBFI1),
-        INTC_GROUP(MMCIF, MMCIF_FSTAT, MMCIF_TRAN, MMCIF_ERR, MMCIF_FRDY),
-        INTC_GROUP(SIM, SIM_ERI, SIM_RXI, SIM_TXI, SIM_TEND),
-        INTC_GROUP(SCIF2, SCIF2_ERI, SCIF2_RXI, SCIF2_BRI, SCIF2_TXI),
-        INTC_GROUP(GPIO, GPIO_CH0, GPIO_CH1, GPIO_CH2, GPIO_CH3),
 };
 
 static struct intc_mask_reg mask_registers[] __initdata = {
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7780.c b/arch/sh/kernel/cpu/sh4a/setup-sh7780.c
index fb8200cc7440..6f7227cd65bf 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7780.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7780.c
@@ -20,17 +20,7 @@ static struct resource rtc_resources[] = {
                 .flags  = IORESOURCE_IO,
         },
         [1] = {
-                /* Period IRQ */
-                .start  = 21,
-                .flags  = IORESOURCE_IRQ,
-        },
-        [2] = {
-                /* Carry IRQ */
-                .start  = 22,
-                .flags  = IORESOURCE_IRQ,
-        },
-        [3] = {
-                /* Alarm IRQ */
+                /* Shared Period/Carry/Alarm IRQ */
                 .start  = 20,
                 .flags  = IORESOURCE_IRQ,
         },
@@ -48,12 +38,12 @@ static struct plat_sci_port sci_platform_data[] = {
                 .mapbase        = 0xffe00000,
                 .flags          = UPF_BOOT_AUTOCONF,
                 .type           = PORT_SCIF,
-                .irqs           = { 40, 41, 43, 42 },
+                .irqs           = { 40, 40, 40, 40 },
         }, {
                 .mapbase        = 0xffe10000,
                 .flags          = UPF_BOOT_AUTOCONF,
                 .type           = PORT_SCIF,
-                .irqs           = { 76, 77, 79, 78 },
+                .irqs           = { 76, 76, 76, 76 },
         }, {
                 .flags = 0,
         }
@@ -90,82 +80,55 @@ enum {
         IRL_HHLL, IRL_HHLH, IRL_HHHL,
 
         IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7,
-        RTC_ATI, RTC_PRI, RTC_CUI,
-        WDT,
-        TMU0, TMU1, TMU2, TMU2_TICPI,
-        HUDI,
-        DMAC0_DMINT0, DMAC0_DMINT1, DMAC0_DMINT2, DMAC0_DMINT3, DMAC0_DMAE,
-        SCIF0_ERI, SCIF0_RXI, SCIF0_BRI, SCIF0_TXI,
-        DMAC0_DMINT4, DMAC0_DMINT5, DMAC1_DMINT6, DMAC1_DMINT7,
-        CMT, HAC,
-        PCISERR, PCIINTA, PCIINTB, PCIINTC, PCIINTD,
-        PCIERR, PCIPWD3, PCIPWD2, PCIPWD1, PCIPWD0,
-        SCIF1_ERI, SCIF1_RXI, SCIF1_BRI, SCIF1_TXI,
-        SIOF, HSPI,
-        MMCIF_FSTAT, MMCIF_TRAN, MMCIF_ERR, MMCIF_FRDY,
-        DMAC1_DMINT8, DMAC1_DMINT9, DMAC1_DMINT10, DMAC1_DMINT11,
-        TMU3, TMU4, TMU5,
-        SSI,
-        FLCTL_FLSTE, FLCTL_FLEND, FLCTL_FLTRQ0, FLCTL_FLTRQ1,
-        GPIOI0, GPIOI1, GPIOI2, GPIOI3,
+        RTC, WDT, TMU0, TMU1, TMU2, TMU2_TICPI,
+        HUDI, DMAC0, SCIF0, DMAC1, CMT, HAC,
+        PCISERR, PCIINTA, PCIINTB, PCIINTC, PCIINTD, PCIC5,
+        SCIF1, SIOF, HSPI, MMCIF, TMU3, TMU4, TMU5, SSI, FLCTL, GPIO,
 
         /* interrupt groups */
 
-        RTC, TMU012, DMAC0, SCIF0, DMAC45, DMAC1,
-        PCIC5, SCIF1, MMCIF, TMU345, FLCTL, GPIO,
+        TMU012, TMU345,
 };
 
 static struct intc_vect vectors[] __initdata = {
-        INTC_VECT(RTC_ATI, 0x480), INTC_VECT(RTC_PRI, 0x4a0),
-        INTC_VECT(RTC_CUI, 0x4c0),
+        INTC_VECT(RTC, 0x480), INTC_VECT(RTC, 0x4a0),
+        INTC_VECT(RTC, 0x4c0),
         INTC_VECT(WDT, 0x560),
         INTC_VECT(TMU0, 0x580), INTC_VECT(TMU1, 0x5a0),
         INTC_VECT(TMU2, 0x5c0), INTC_VECT(TMU2_TICPI, 0x5e0),
         INTC_VECT(HUDI, 0x600),
-        INTC_VECT(DMAC0_DMINT0, 0x640), INTC_VECT(DMAC0_DMINT1, 0x660),
-        INTC_VECT(DMAC0_DMINT2, 0x680), INTC_VECT(DMAC0_DMINT3, 0x6a0),
-        INTC_VECT(DMAC0_DMAE, 0x6c0),
-        INTC_VECT(SCIF0_ERI, 0x700), INTC_VECT(SCIF0_RXI, 0x720),
-        INTC_VECT(SCIF0_BRI, 0x740), INTC_VECT(SCIF0_TXI, 0x760),
-        INTC_VECT(DMAC0_DMINT4, 0x780), INTC_VECT(DMAC0_DMINT5, 0x7a0),
-        INTC_VECT(DMAC1_DMINT6, 0x7c0), INTC_VECT(DMAC1_DMINT7, 0x7e0),
+        INTC_VECT(DMAC0, 0x640), INTC_VECT(DMAC0, 0x660),
+        INTC_VECT(DMAC0, 0x680), INTC_VECT(DMAC0, 0x6a0),
+        INTC_VECT(DMAC0, 0x6c0),
+        INTC_VECT(SCIF0, 0x700), INTC_VECT(SCIF0, 0x720),
+        INTC_VECT(SCIF0, 0x740), INTC_VECT(SCIF0, 0x760),
+        INTC_VECT(DMAC0, 0x780), INTC_VECT(DMAC0, 0x7a0),
+        INTC_VECT(DMAC1, 0x7c0), INTC_VECT(DMAC1, 0x7e0),
         INTC_VECT(CMT, 0x900), INTC_VECT(HAC, 0x980),
         INTC_VECT(PCISERR, 0xa00), INTC_VECT(PCIINTA, 0xa20),
         INTC_VECT(PCIINTB, 0xa40), INTC_VECT(PCIINTC, 0xa60),
-        INTC_VECT(PCIINTD, 0xa80), INTC_VECT(PCIERR, 0xaa0),
-        INTC_VECT(PCIPWD3, 0xac0), INTC_VECT(PCIPWD2, 0xae0),
-        INTC_VECT(PCIPWD1, 0xb00), INTC_VECT(PCIPWD0, 0xb20),
-        INTC_VECT(SCIF1_ERI, 0xb80), INTC_VECT(SCIF1_RXI, 0xba0),
-        INTC_VECT(SCIF1_BRI, 0xbc0), INTC_VECT(SCIF1_TXI, 0xbe0),
+        INTC_VECT(PCIINTD, 0xa80), INTC_VECT(PCIC5, 0xaa0),
+        INTC_VECT(PCIC5, 0xac0), INTC_VECT(PCIC5, 0xae0),
+        INTC_VECT(PCIC5, 0xb00), INTC_VECT(PCIC5, 0xb20),
+        INTC_VECT(SCIF1, 0xb80), INTC_VECT(SCIF1, 0xba0),
+        INTC_VECT(SCIF1, 0xbc0), INTC_VECT(SCIF1, 0xbe0),
         INTC_VECT(SIOF, 0xc00), INTC_VECT(HSPI, 0xc80),
-        INTC_VECT(MMCIF_FSTAT, 0xd00), INTC_VECT(MMCIF_TRAN, 0xd20),
-        INTC_VECT(MMCIF_ERR, 0xd40), INTC_VECT(MMCIF_FRDY, 0xd60),
-        INTC_VECT(DMAC1_DMINT8, 0xd80), INTC_VECT(DMAC1_DMINT9, 0xda0),
-        INTC_VECT(DMAC1_DMINT10, 0xdc0), INTC_VECT(DMAC1_DMINT11, 0xde0),
+        INTC_VECT(MMCIF, 0xd00), INTC_VECT(MMCIF, 0xd20),
+        INTC_VECT(MMCIF, 0xd40), INTC_VECT(MMCIF, 0xd60),
+        INTC_VECT(DMAC1, 0xd80), INTC_VECT(DMAC1, 0xda0),
+        INTC_VECT(DMAC1, 0xdc0), INTC_VECT(DMAC1, 0xde0),
         INTC_VECT(TMU3, 0xe00), INTC_VECT(TMU4, 0xe20),
         INTC_VECT(TMU5, 0xe40),
         INTC_VECT(SSI, 0xe80),
-        INTC_VECT(FLCTL_FLSTE, 0xf00), INTC_VECT(FLCTL_FLEND, 0xf20),
-        INTC_VECT(FLCTL_FLTRQ0, 0xf40), INTC_VECT(FLCTL_FLTRQ1, 0xf60),
-        INTC_VECT(GPIOI0, 0xf80), INTC_VECT(GPIOI1, 0xfa0),
-        INTC_VECT(GPIOI2, 0xfc0), INTC_VECT(GPIOI3, 0xfe0),
+        INTC_VECT(FLCTL, 0xf00), INTC_VECT(FLCTL, 0xf20),
+        INTC_VECT(FLCTL, 0xf40), INTC_VECT(FLCTL, 0xf60),
+        INTC_VECT(GPIO, 0xf80), INTC_VECT(GPIO, 0xfa0),
+        INTC_VECT(GPIO, 0xfc0), INTC_VECT(GPIO, 0xfe0),
 };
 
 static struct intc_group groups[] __initdata = {
-        INTC_GROUP(RTC, RTC_ATI, RTC_PRI, RTC_CUI),
         INTC_GROUP(TMU012, TMU0, TMU1, TMU2, TMU2_TICPI),
-        INTC_GROUP(DMAC0, DMAC0_DMINT0, DMAC0_DMINT1, DMAC0_DMINT2,
-                   DMAC0_DMINT3, DMAC0_DMINT4, DMAC0_DMINT5, DMAC0_DMAE),
-        INTC_GROUP(SCIF0, SCIF0_ERI, SCIF0_RXI, SCIF0_BRI, SCIF0_TXI),
-        INTC_GROUP(DMAC1, DMAC1_DMINT6, DMAC1_DMINT7, DMAC1_DMINT8,
-                   DMAC1_DMINT9, DMAC1_DMINT10, DMAC1_DMINT11),
-        INTC_GROUP(PCIC5, PCIERR, PCIPWD3, PCIPWD2, PCIPWD1, PCIPWD0),
-        INTC_GROUP(SCIF1, SCIF1_ERI, SCIF1_RXI, SCIF1_BRI, SCIF1_TXI),
-        INTC_GROUP(MMCIF, MMCIF_FSTAT, MMCIF_TRAN, MMCIF_ERR, MMCIF_FRDY),
         INTC_GROUP(TMU345, TMU3, TMU4, TMU5),
-        INTC_GROUP(FLCTL, FLCTL_FLSTE, FLCTL_FLEND,
-                   FLCTL_FLTRQ0, FLCTL_FLTRQ1),
-        INTC_GROUP(GPIO, GPIOI0, GPIOI1, GPIOI2, GPIOI3),
 };
 
 static struct intc_mask_reg mask_registers[] __initdata = {
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7785.c b/arch/sh/kernel/cpu/sh4a/setup-sh7785.c
index 30baa63b24c8..d80802a49dbd 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7785.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7785.c
@@ -20,18 +20,13 @@ static struct plat_sci_port sci_platform_data[] = {
                 .mapbase        = 0xffea0000,
                 .flags          = UPF_BOOT_AUTOCONF,
                 .type           = PORT_SCIF,
-                .irqs           = { 40, 41, 43, 42 },
+                .irqs           = { 40, 40, 40, 40 },
         }, {
                 .mapbase        = 0xffeb0000,
                 .flags          = UPF_BOOT_AUTOCONF,
                 .type           = PORT_SCIF,
-                .irqs           = { 44, 45, 47, 46 },
-        },
-
-        /*
-         * The rest of these all have multiplexed IRQs
-         */
-        {
+                .irqs           = { 44, 44, 44, 44 },
+        }, {
                 .mapbase        = 0xffec0000,
                 .flags          = UPF_BOOT_AUTOCONF,
                 .type           = PORT_SCIF,
@@ -91,33 +86,19 @@ enum {
         IRL4_HHLL, IRL4_HHLH, IRL4_HHHL,
 
         IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7,
-        WDT,
-        TMU0, TMU1, TMU2, TMU2_TICPI,
-        HUDI,
-        DMAC0_DMINT0, DMAC0_DMINT1, DMAC0_DMINT2, DMAC0_DMINT3,
-        DMAC0_DMINT4, DMAC0_DMINT5, DMAC0_DMAE,
-        SCIF0_ERI, SCIF0_RXI, SCIF0_BRI, SCIF0_TXI,
-        SCIF1_ERI, SCIF1_RXI, SCIF1_BRI, SCIF1_TXI,
-        DMAC1_DMINT6, DMAC1_DMINT7, DMAC1_DMINT8, DMAC1_DMINT9,
-        DMAC1_DMINT10, DMAC1_DMINT11, DMAC1_DMAE,
-        HSPI,
+        WDT, TMU0, TMU1, TMU2, TMU2_TICPI,
+        HUDI, DMAC0, SCIF0, SCIF1, DMAC1, HSPI,
         SCIF2, SCIF3, SCIF4, SCIF5,
-        PCISERR, PCIINTA, PCIINTB, PCIINTC, PCIINTD,
-        PCIERR, PCIPWD3, PCIPWD2, PCIPWD1, PCIPWD0,
-        SIOF,
-        MMCIF_FSTAT, MMCIF_TRAN, MMCIF_ERR, MMCIF_FRDY,
-        DU,
-        GDTA_GACLI, GDTA_GAMCI, GDTA_GAERI,
+        PCISERR, PCIINTA, PCIINTB, PCIINTC, PCIINTD, PCIC5,
+        SIOF, MMCIF, DU, GDTA,
         TMU3, TMU4, TMU5,
         SSI0, SSI1,
         HAC0, HAC1,
-        FLCTL_FLSTE, FLCTL_FLEND, FLCTL_FLTRQ0, FLCTL_FLTRQ1,
-        GPIOI0, GPIOI1, GPIOI2, GPIOI3,
+        FLCTL, GPIO,
 
         /* interrupt groups */
 
-        TMU012, DMAC0, SCIF0, SCIF1, DMAC1,
-        PCIC5, MMCIF, GDTA, TMU345, FLCTL, GPIO
+        TMU012, TMU345
 };
 
 static struct intc_vect vectors[] __initdata = {
@@ -125,57 +106,45 @@ static struct intc_vect vectors[] __initdata = {
         INTC_VECT(TMU0, 0x580), INTC_VECT(TMU1, 0x5a0),
         INTC_VECT(TMU2, 0x5c0), INTC_VECT(TMU2_TICPI, 0x5e0),
         INTC_VECT(HUDI, 0x600),
-        INTC_VECT(DMAC0_DMINT0, 0x620), INTC_VECT(DMAC0_DMINT1, 0x640),
-        INTC_VECT(DMAC0_DMINT2, 0x660), INTC_VECT(DMAC0_DMINT3, 0x680),
-        INTC_VECT(DMAC0_DMINT4, 0x6a0), INTC_VECT(DMAC0_DMINT5, 0x6c0),
-        INTC_VECT(DMAC0_DMAE, 0x6e0),
-        INTC_VECT(SCIF0_ERI, 0x700), INTC_VECT(SCIF0_RXI, 0x720),
-        INTC_VECT(SCIF0_BRI, 0x740), INTC_VECT(SCIF0_TXI, 0x760),
-        INTC_VECT(SCIF1_ERI, 0x780), INTC_VECT(SCIF1_RXI, 0x7a0),
-        INTC_VECT(SCIF1_BRI, 0x7c0), INTC_VECT(SCIF1_TXI, 0x7e0),
-        INTC_VECT(DMAC1_DMINT6, 0x880), INTC_VECT(DMAC1_DMINT7, 0x8a0),
-        INTC_VECT(DMAC1_DMINT8, 0x8c0), INTC_VECT(DMAC1_DMINT9, 0x8e0),
-        INTC_VECT(DMAC1_DMINT10, 0x900), INTC_VECT(DMAC1_DMINT11, 0x920),
-        INTC_VECT(DMAC1_DMAE, 0x940),
+        INTC_VECT(DMAC0, 0x620), INTC_VECT(DMAC0, 0x640),
+        INTC_VECT(DMAC0, 0x660), INTC_VECT(DMAC0, 0x680),
+        INTC_VECT(DMAC0, 0x6a0), INTC_VECT(DMAC0, 0x6c0),
+        INTC_VECT(DMAC0, 0x6e0),
+        INTC_VECT(SCIF0, 0x700), INTC_VECT(SCIF0, 0x720),
+        INTC_VECT(SCIF0, 0x740), INTC_VECT(SCIF0, 0x760),
+        INTC_VECT(SCIF1, 0x780), INTC_VECT(SCIF1, 0x7a0),
+        INTC_VECT(SCIF1, 0x7c0), INTC_VECT(SCIF1, 0x7e0),
+        INTC_VECT(DMAC1, 0x880), INTC_VECT(DMAC1, 0x8a0),
+        INTC_VECT(DMAC1, 0x8c0), INTC_VECT(DMAC1, 0x8e0),
+        INTC_VECT(DMAC1, 0x900), INTC_VECT(DMAC1, 0x920),
+        INTC_VECT(DMAC1, 0x940),
         INTC_VECT(HSPI, 0x960),
         INTC_VECT(SCIF2, 0x980), INTC_VECT(SCIF3, 0x9a0),
         INTC_VECT(SCIF4, 0x9c0), INTC_VECT(SCIF5, 0x9e0),
         INTC_VECT(PCISERR, 0xa00), INTC_VECT(PCIINTA, 0xa20),
         INTC_VECT(PCIINTB, 0xa40), INTC_VECT(PCIINTC, 0xa60),
-        INTC_VECT(PCIINTD, 0xa80), INTC_VECT(PCIERR, 0xaa0),
-        INTC_VECT(PCIPWD3, 0xac0), INTC_VECT(PCIPWD2, 0xae0),
-        INTC_VECT(PCIPWD1, 0xb00), INTC_VECT(PCIPWD0, 0xb20),
+        INTC_VECT(PCIINTD, 0xa80), INTC_VECT(PCIC5, 0xaa0),
+        INTC_VECT(PCIC5, 0xac0), INTC_VECT(PCIC5, 0xae0),
+        INTC_VECT(PCIC5, 0xb00), INTC_VECT(PCIC5, 0xb20),
         INTC_VECT(SIOF, 0xc00),
-        INTC_VECT(MMCIF_FSTAT, 0xd00), INTC_VECT(MMCIF_TRAN, 0xd20),
-        INTC_VECT(MMCIF_ERR, 0xd40), INTC_VECT(MMCIF_FRDY, 0xd60),
+        INTC_VECT(MMCIF, 0xd00), INTC_VECT(MMCIF, 0xd20),
+        INTC_VECT(MMCIF, 0xd40), INTC_VECT(MMCIF, 0xd60),
         INTC_VECT(DU, 0xd80),
-        INTC_VECT(GDTA_GACLI, 0xda0), INTC_VECT(GDTA_GAMCI, 0xdc0),
-        INTC_VECT(GDTA_GAERI, 0xde0),
+        INTC_VECT(GDTA, 0xda0), INTC_VECT(GDTA, 0xdc0),
+        INTC_VECT(GDTA, 0xde0),
         INTC_VECT(TMU3, 0xe00), INTC_VECT(TMU4, 0xe20),
         INTC_VECT(TMU5, 0xe40),
         INTC_VECT(SSI0, 0xe80), INTC_VECT(SSI1, 0xea0),
         INTC_VECT(HAC0, 0xec0), INTC_VECT(HAC1, 0xee0),
-        INTC_VECT(FLCTL_FLSTE, 0xf00), INTC_VECT(FLCTL_FLEND, 0xf20),
-        INTC_VECT(FLCTL_FLTRQ0, 0xf40), INTC_VECT(FLCTL_FLTRQ1, 0xf60),
-        INTC_VECT(GPIOI0, 0xf80), INTC_VECT(GPIOI1, 0xfa0),
-        INTC_VECT(GPIOI2, 0xfc0), INTC_VECT(GPIOI3, 0xfe0),
+        INTC_VECT(FLCTL, 0xf00), INTC_VECT(FLCTL, 0xf20),
+        INTC_VECT(FLCTL, 0xf40), INTC_VECT(FLCTL, 0xf60),
+        INTC_VECT(GPIO, 0xf80), INTC_VECT(GPIO, 0xfa0),
+        INTC_VECT(GPIO, 0xfc0), INTC_VECT(GPIO, 0xfe0),
 };
 
 static struct intc_group groups[] __initdata = {
         INTC_GROUP(TMU012, TMU0, TMU1, TMU2, TMU2_TICPI),
-        INTC_GROUP(DMAC0, DMAC0_DMINT0, DMAC0_DMINT1, DMAC0_DMINT2,
-                   DMAC0_DMINT3, DMAC0_DMINT4, DMAC0_DMINT5, DMAC0_DMAE),
-        INTC_GROUP(SCIF0, SCIF0_ERI, SCIF0_RXI, SCIF0_BRI, SCIF0_TXI),
-        INTC_GROUP(SCIF1, SCIF1_ERI, SCIF1_RXI, SCIF1_BRI, SCIF1_TXI),
-        INTC_GROUP(DMAC1, DMAC1_DMINT6, DMAC1_DMINT7, DMAC1_DMINT8,
-                   DMAC1_DMINT9, DMAC1_DMINT10, DMAC1_DMINT11, DMAC1_DMAE),
-        INTC_GROUP(PCIC5, PCIERR, PCIPWD3, PCIPWD2, PCIPWD1, PCIPWD0),
-        INTC_GROUP(MMCIF, MMCIF_FSTAT, MMCIF_TRAN, MMCIF_ERR, MMCIF_FRDY),
-        INTC_GROUP(GDTA, GDTA_GACLI, GDTA_GAMCI, GDTA_GAERI),
         INTC_GROUP(TMU345, TMU3, TMU4, TMU5),
-        INTC_GROUP(FLCTL, FLCTL_FLSTE, FLCTL_FLEND,
-                   FLCTL_FLTRQ0, FLCTL_FLTRQ1),
-        INTC_GROUP(GPIO, GPIOI0, GPIOI1, GPIOI2, GPIOI3),
 };
 
 static struct intc_mask_reg mask_registers[] __initdata = {
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7786.c b/arch/sh/kernel/cpu/sh4a/setup-sh7786.c
new file mode 100644
index 000000000000..5a47e1cf442e
--- /dev/null
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7786.c
@@ -0,0 +1,490 @@
+/*
+ * SH7786 Setup
+ *
+ * Copyright (C) 2009  Renesas Solutions Corp.
+ * Kuninori Morimoto <morimoto.kuninori@renesas.com>
+ *
+ * Based on SH7785 Setup
+ *
+ *  Copyright (C) 2007  Paul Mundt
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#include <linux/platform_device.h>
+#include <linux/init.h>
+#include <linux/serial.h>
+#include <linux/serial_sci.h>
+#include <linux/io.h>
+#include <linux/mm.h>
+#include <linux/dma-mapping.h>
+#include <asm/mmzone.h>
+
+static struct plat_sci_port sci_platform_data[] = {
+        {
+                .mapbase        = 0xffea0000,
+                .flags          = UPF_BOOT_AUTOCONF,
+                .type           = PORT_SCIF,
+                .irqs           = { 40, 41, 43, 42 },
+        },
+        /*
+         * The rest of these all have multiplexed IRQs
+         */
+        {
+                .mapbase        = 0xffeb0000,
+                .flags          = UPF_BOOT_AUTOCONF,
+                .type           = PORT_SCIF,
+                .irqs           = { 44, 44, 44, 44 },
+        }, {
+                .mapbase        = 0xffec0000,
+                .flags          = UPF_BOOT_AUTOCONF,
+                .type           = PORT_SCIF,
+                .irqs           = { 50, 50, 50, 50 },
+        }, {
+                .mapbase        = 0xffed0000,
+                .flags          = UPF_BOOT_AUTOCONF,
+                .type           = PORT_SCIF,
+                .irqs           = { 51, 51, 51, 51 },
+        }, {
+                .mapbase        = 0xffee0000,
+                .flags          = UPF_BOOT_AUTOCONF,
+                .type           = PORT_SCIF,
+                .irqs           = { 52, 52, 52, 52 },
+        }, {
+                .mapbase        = 0xffef0000,
+                .flags          = UPF_BOOT_AUTOCONF,
+                .type           = PORT_SCIF,
+                .irqs           = { 53, 53, 53, 53 },
+        }, {
+                .flags = 0,
+        }
+};
+
+static struct platform_device sci_device = {
+        .name           = "sh-sci",
+        .id             = -1,
+        .dev            = {
+                .platform_data  = sci_platform_data,
+        },
+};
+
+static struct resource usb_ohci_resources[] = {
+        [0] = {
+                .start  = 0xffe70400,
+                .end    = 0xffe704ff,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 77,
+                .end    = 77,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static u64 usb_ohci_dma_mask = DMA_BIT_MASK(32);
+static struct platform_device usb_ohci_device = {
+        .name           = "sh_ohci",
+        .id             = -1,
+        .dev = {
+                .dma_mask               = &usb_ohci_dma_mask,
+                .coherent_dma_mask      = DMA_BIT_MASK(32),
+        },
+        .num_resources  = ARRAY_SIZE(usb_ohci_resources),
+        .resource       = usb_ohci_resources,
+};
+
+static struct platform_device *sh7786_devices[] __initdata = {
+        &sci_device,
+        &usb_ohci_device,
+};
+
+
+/*
+ * Please call this function if your platform board
+ * use external clock for USB
+ * */
+#define USBCTL0         0xffe70858
+#define CLOCK_MODE_MASK 0xffffff7f
+#define EXT_CLOCK_MODE  0x00000080
+void __init sh7786_usb_use_exclock(void)
+{
+        u32 val = __raw_readl(USBCTL0) & CLOCK_MODE_MASK;
+        __raw_writel(val | EXT_CLOCK_MODE, USBCTL0);
+}
+
+#define USBINITREG1     0xffe70094
+#define USBINITREG2     0xffe7009c
+#define USBINITVAL1     0x00ff0040
+#define USBINITVAL2     0x00000001
+
+#define USBPCTL1        0xffe70804
+#define USBST           0xffe70808
+#define PHY_ENB         0x00000001
+#define PLL_ENB         0x00000002
+#define PHY_RST         0x00000004
+#define ACT_PLL_STATUS  0xc0000000
+static void __init sh7786_usb_setup(void)
+{
+        int i = 1000000;
+
+        /*
+         * USB initial settings
+         *
+         * The following settings are necessary
+         * for using the USB modules.
+         *
+         * see "USB Inital Settings" for detail
+         */
+        __raw_writel(USBINITVAL1, USBINITREG1);
+        __raw_writel(USBINITVAL2, USBINITREG2);
+
+        /*
+         * Set the PHY and PLL enable bit
+         */
+        __raw_writel(PHY_ENB | PLL_ENB, USBPCTL1);
+        while (i-- &&
+               ((__raw_readl(USBST) & ACT_PLL_STATUS) != ACT_PLL_STATUS))
+                cpu_relax();
+
+        if (i) {
+                /* Set the PHY RST bit */
+                __raw_writel(PHY_ENB | PLL_ENB | PHY_RST, USBPCTL1);
+                printk(KERN_INFO "sh7786 usb setup done\n");
+        }
+}
+
+static int __init sh7786_devices_setup(void)
+{
+        sh7786_usb_setup();
+        return platform_add_devices(sh7786_devices,
+                                    ARRAY_SIZE(sh7786_devices));
+}
+device_initcall(sh7786_devices_setup);
+
+enum {
+        UNUSED = 0,
+
+        /* interrupt sources */
+
+        IRL0_LLLL, IRL0_LLLH, IRL0_LLHL, IRL0_LLHH,
+        IRL0_LHLL, IRL0_LHLH, IRL0_LHHL, IRL0_LHHH,
+        IRL0_HLLL, IRL0_HLLH, IRL0_HLHL, IRL0_HLHH,
+        IRL0_HHLL, IRL0_HHLH, IRL0_HHHL,
+
+        IRL4_LLLL, IRL4_LLLH, IRL4_LLHL, IRL4_LLHH,
+        IRL4_LHLL, IRL4_LHLH, IRL4_LHHL, IRL4_LHHH,
+        IRL4_HLLL, IRL4_HLLH, IRL4_HLHL, IRL4_HLHH,
+        IRL4_HHLL, IRL4_HHLH, IRL4_HHHL,
+
+        IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7,
+        WDT,
+        TMU0_0, TMU0_1, TMU0_2, TMU0_3,
+        TMU1_0, TMU1_1, TMU1_2,
+        DMAC0_0, DMAC0_1, DMAC0_2, DMAC0_3, DMAC0_4, DMAC0_5, DMAC0_6,
+        HUDI1, HUDI0,
+        DMAC1_0, DMAC1_1, DMAC1_2, DMAC1_3,
+        HPB_0, HPB_1, HPB_2,
+        SCIF0_0, SCIF0_1, SCIF0_2, SCIF0_3,
+        SCIF1,
+        TMU2, TMU3,
+        SCIF2, SCIF3, SCIF4, SCIF5,
+        Eth_0, Eth_1,
+        PCIeC0_0, PCIeC0_1, PCIeC0_2,
+        PCIeC1_0, PCIeC1_1, PCIeC1_2,
+        USB,
+        I2C0, I2C1,
+        DU,
+        SSI0, SSI1, SSI2, SSI3,
+        PCIeC2_0, PCIeC2_1, PCIeC2_2,
+        HAC0, HAC1,
+        FLCTL,
+        HSPI,
+        GPIO0, GPIO1,
+        Thermal,
+        INTC0, INTC1, INTC2, INTC3, INTC4, INTC5, INTC6, INTC7,
+
+        /* interrupt groups */
+};
+
+static struct intc_vect vectors[] __initdata = {
+        INTC_VECT(WDT, 0x3e0),
+        INTC_VECT(TMU0_0, 0x400), INTC_VECT(TMU0_1, 0x420),
+        INTC_VECT(TMU0_2, 0x440), INTC_VECT(TMU0_3, 0x460),
+        INTC_VECT(TMU1_0, 0x480), INTC_VECT(TMU1_1, 0x4a0),
+        INTC_VECT(TMU1_2, 0x4c0),
+        INTC_VECT(DMAC0_0, 0x500), INTC_VECT(DMAC0_1, 0x520),
+        INTC_VECT(DMAC0_2, 0x540), INTC_VECT(DMAC0_3, 0x560),
+        INTC_VECT(DMAC0_4, 0x580), INTC_VECT(DMAC0_5, 0x5a0),
+        INTC_VECT(DMAC0_6, 0x5c0),
+        INTC_VECT(HUDI1, 0x5e0), INTC_VECT(HUDI0, 0x600),
+        INTC_VECT(DMAC1_0, 0x620), INTC_VECT(DMAC1_1, 0x640),
+        INTC_VECT(DMAC1_2, 0x660), INTC_VECT(DMAC1_3, 0x680),
+        INTC_VECT(HPB_0, 0x6a0), INTC_VECT(HPB_1, 0x6c0),
+        INTC_VECT(HPB_2, 0x6e0),
+        INTC_VECT(SCIF0_0, 0x700), INTC_VECT(SCIF0_1, 0x720),
+        INTC_VECT(SCIF0_2, 0x740), INTC_VECT(SCIF0_3, 0x760),
+        INTC_VECT(SCIF1, 0x780),
+        INTC_VECT(TMU2, 0x7a0), INTC_VECT(TMU3, 0x7c0),
+        INTC_VECT(SCIF2, 0x840), INTC_VECT(SCIF3, 0x860),
+        INTC_VECT(SCIF4, 0x880), INTC_VECT(SCIF5, 0x8a0),
+        INTC_VECT(Eth_0, 0x8c0), INTC_VECT(Eth_1, 0x8e0),
+        INTC_VECT(PCIeC0_0, 0xae0), INTC_VECT(PCIeC0_1, 0xb00),
+        INTC_VECT(PCIeC0_2, 0xb20),
+        INTC_VECT(PCIeC1_0, 0xb40), INTC_VECT(PCIeC1_1, 0xb60),
+        INTC_VECT(PCIeC1_2, 0xb80),
+        INTC_VECT(USB, 0xba0),
+        INTC_VECT(I2C0, 0xcc0), INTC_VECT(I2C1, 0xce0),
+        INTC_VECT(DU, 0xd00),
+        INTC_VECT(SSI0, 0xd20), INTC_VECT(SSI1, 0xd40),
+        INTC_VECT(SSI2, 0xd60), INTC_VECT(SSI3, 0xd80),
+        INTC_VECT(PCIeC2_0, 0xda0), INTC_VECT(PCIeC2_1, 0xdc0),
+        INTC_VECT(PCIeC2_2, 0xde0),
+        INTC_VECT(HAC0, 0xe00), INTC_VECT(HAC1, 0xe20),
+        INTC_VECT(FLCTL, 0xe40),
+        INTC_VECT(HSPI, 0xe80),
+        INTC_VECT(GPIO0, 0xea0), INTC_VECT(GPIO1, 0xec0),
+        INTC_VECT(Thermal, 0xee0),
+};
+
+/* FIXME: Main CPU support only now */
+#if 1 /* Main CPU */
+#define CnINTMSK0       0xfe410030
+#define CnINTMSK1       0xfe410040
+#define CnINTMSKCLR0    0xfe410050
+#define CnINTMSKCLR1    0xfe410060
+#define CnINT2MSKR0     0xfe410a20
+#define CnINT2MSKR1     0xfe410a24
+#define CnINT2MSKR2     0xfe410a28
+#define CnINT2MSKR3     0xfe410a2c
+#define CnINT2MSKCR0    0xfe410a30
+#define CnINT2MSKCR1    0xfe410a34
+#define CnINT2MSKCR2    0xfe410a38
+#define CnINT2MSKCR3    0xfe410a3c
+#else /* Sub CPU */
+#define CnINTMSK0       0xfe410034
+#define CnINTMSK1       0xfe410044
+#define CnINTMSKCLR0    0xfe410054
+#define CnINTMSKCLR1    0xfe410064
+#define CnINT2MSKR0     0xfe410b20
+#define CnINT2MSKR1     0xfe410b24
+#define CnINT2MSKR2     0xfe410b28
+#define CnINT2MSKR3     0xfe410b2c
+#define CnINT2MSKCR0    0xfe410b30
+#define CnINT2MSKCR1    0xfe410b34
+#define CnINT2MSKCR2    0xfe410b38
+#define CnINT2MSKCR3    0xfe410b3c
+#endif
+
+#define INTMSK2         0xfe410068
+#define INTMSKCLR2      0xfe41006c
+
+static struct intc_mask_reg mask_registers[] __initdata = {
+        { CnINTMSK0, CnINTMSKCLR0, 32,
+          { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
+        { INTMSK2, INTMSKCLR2, 32,
+          { IRL0_LLLL, IRL0_LLLH, IRL0_LLHL, IRL0_LLHH,
+            IRL0_LHLL, IRL0_LHLH, IRL0_LHHL, IRL0_LHHH,
+            IRL0_HLLL, IRL0_HLLH, IRL0_HLHL, IRL0_HLHH,
+            IRL0_HHLL, IRL0_HHLH, IRL0_HHHL, 0,
+            IRL4_LLLL, IRL4_LLLH, IRL4_LLHL, IRL4_LLHH,
+            IRL4_LHLL, IRL4_LHLH, IRL4_LHHL, IRL4_LHHH,
+            IRL4_HLLL, IRL4_HLLH, IRL4_HLHL, IRL4_HLHH,
+            IRL4_HHLL, IRL4_HHLH, IRL4_HHHL, 0, } },
+        { CnINT2MSKR0, CnINT2MSKCR0 , 32,
+          { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+            0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, WDT } },
+        { CnINT2MSKR1, CnINT2MSKCR1, 32,
+          { TMU0_0, TMU0_1, TMU0_2, TMU0_3, TMU1_0, TMU1_1, TMU1_2, 0,
+            DMAC0_0, DMAC0_1, DMAC0_2, DMAC0_3, DMAC0_4, DMAC0_5, DMAC0_6,
+            HUDI1, HUDI0,
+            DMAC1_0, DMAC1_1, DMAC1_2, DMAC1_3,
+            HPB_0, HPB_1, HPB_2,
+            SCIF0_0, SCIF0_1, SCIF0_2, SCIF0_3,
+            SCIF1,
+            TMU2, TMU3, 0, } },
+        { CnINT2MSKR2, CnINT2MSKCR2, 32,
+          { 0, 0, SCIF2, SCIF3, SCIF4, SCIF5,
+            Eth_0, Eth_1,
+            0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+            PCIeC0_0, PCIeC0_1, PCIeC0_2,
+            PCIeC1_0, PCIeC1_1, PCIeC1_2,
+            USB, 0, 0 } },
+        { CnINT2MSKR3, CnINT2MSKCR3, 32,
+          { 0, 0, 0, 0, 0, 0,
+            I2C0, I2C1,
+            DU, SSI0, SSI1, SSI2, SSI3,
+            PCIeC2_0, PCIeC2_1, PCIeC2_2,
+            HAC0, HAC1,
+            FLCTL, 0,
+            HSPI, GPIO0, GPIO1, Thermal,
+            0, 0, 0, 0, 0, 0, 0, 0 } },
+};
+
+static struct intc_prio_reg prio_registers[] __initdata = {
+        { 0xfe410010, 0, 32, 4, /* INTPRI */   { IRQ0, IRQ1, IRQ2, IRQ3,
+                                                 IRQ4, IRQ5, IRQ6, IRQ7 } },
+        { 0xfe410800, 0, 32, 8, /* INT2PRI0 */ { 0, 0, 0, WDT } },
+        { 0xfe410804, 0, 32, 8, /* INT2PRI1 */ { TMU0_0, TMU0_1,
+                                                 TMU0_2, TMU0_3 } },
+        { 0xfe410808, 0, 32, 8, /* INT2PRI2 */ { TMU1_0, TMU1_1,
+                                                 TMU1_2, 0 } },
+        { 0xfe41080c, 0, 32, 8, /* INT2PRI3 */ { DMAC0_0, DMAC0_1,
+                                                 DMAC0_2, DMAC0_3 } },
+        { 0xfe410810, 0, 32, 8, /* INT2PRI4 */ { DMAC0_4, DMAC0_5,
+                                                 DMAC0_6, HUDI1 } },
+        { 0xfe410814, 0, 32, 8, /* INT2PRI5 */ { HUDI0, DMAC1_0,
+                                                 DMAC1_1, DMAC1_2 } },
+        { 0xfe410818, 0, 32, 8, /* INT2PRI6 */ { DMAC1_3, HPB_0,
+                                                 HPB_1, HPB_2 } },
+        { 0xfe41081c, 0, 32, 8, /* INT2PRI7 */ { SCIF0_0, SCIF0_1,
+                                                 SCIF0_2, SCIF0_3 } },
+        { 0xfe410820, 0, 32, 8, /* INT2PRI8 */ { SCIF1, TMU2, TMU3, 0 } },
+        { 0xfe410824, 0, 32, 8, /* INT2PRI9 */ { 0, 0, SCIF2, SCIF3 } },
+        { 0xfe410828, 0, 32, 8, /* INT2PRI10 */ { SCIF4, SCIF5,
+                                                  Eth_0, Eth_1 } },
+        { 0xfe41082c, 0, 32, 8, /* INT2PRI11 */ { 0, 0, 0, 0 } },
+        { 0xfe410830, 0, 32, 8, /* INT2PRI12 */ { 0, 0, 0, 0 } },
+        { 0xfe410834, 0, 32, 8, /* INT2PRI13 */ { 0, 0, 0, 0 } },
+        { 0xfe410838, 0, 32, 8, /* INT2PRI14 */ { 0, 0, 0, PCIeC0_0 } },
+        { 0xfe41083c, 0, 32, 8, /* INT2PRI15 */ { PCIeC0_1, PCIeC0_2,
+                                                  PCIeC1_0, PCIeC1_1 } },
+        { 0xfe410840, 0, 32, 8, /* INT2PRI16 */ { PCIeC1_2, USB, 0, 0 } },
+        { 0xfe410844, 0, 32, 8, /* INT2PRI17 */ { 0, 0, 0, 0 } },
+        { 0xfe410848, 0, 32, 8, /* INT2PRI18 */ { 0, 0, I2C0, I2C1 } },
+        { 0xfe41084c, 0, 32, 8, /* INT2PRI19 */ { DU, SSI0, SSI1, SSI2 } },
+        { 0xfe410850, 0, 32, 8, /* INT2PRI20 */ { SSI3, PCIeC2_0,
+                                                  PCIeC2_1, PCIeC2_2 } },
+        { 0xfe410854, 0, 32, 8, /* INT2PRI21 */ { HAC0, HAC1, FLCTL, 0 } },
+        { 0xfe410858, 0, 32, 8, /* INT2PRI22 */ { HSPI, GPIO0,
+                                                  GPIO1, Thermal } },
+        { 0xfe41085c, 0, 32, 8, /* INT2PRI23 */ { 0, 0, 0, 0 } },
+        { 0xfe410860, 0, 32, 8, /* INT2PRI24 */ { 0, 0, 0, 0 } },
+};
+
+static DECLARE_INTC_DESC(intc_desc, "sh7786", vectors, NULL,
+                         mask_registers, prio_registers, NULL);
+
+/* Support for external interrupt pins in IRQ mode */
+
+static struct intc_vect vectors_irq0123[] __initdata = {
+        INTC_VECT(IRQ0, 0x200), INTC_VECT(IRQ1, 0x240),
+        INTC_VECT(IRQ2, 0x280), INTC_VECT(IRQ3, 0x2c0),
+};
+
+static struct intc_vect vectors_irq4567[] __initdata = {
+        INTC_VECT(IRQ4, 0x300), INTC_VECT(IRQ5, 0x340),
+        INTC_VECT(IRQ6, 0x380), INTC_VECT(IRQ7, 0x3c0),
+};
+
+static struct intc_sense_reg sense_registers[] __initdata = {
+        { 0xfe41001c, 32, 2, /* ICR1 */   { IRQ0, IRQ1, IRQ2, IRQ3,
+                                            IRQ4, IRQ5, IRQ6, IRQ7 } },
+};
+
+static struct intc_mask_reg ack_registers[] __initdata = {
+        { 0xfe410024, 0, 32, /* INTREQ */
+          { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
+};
+
+static DECLARE_INTC_DESC_ACK(intc_desc_irq0123, "sh7786-irq0123",
+                             vectors_irq0123, NULL, mask_registers,
+                             prio_registers, sense_registers, ack_registers);
+
+static DECLARE_INTC_DESC_ACK(intc_desc_irq4567, "sh7786-irq4567",
+                             vectors_irq4567, NULL, mask_registers,
+                             prio_registers, sense_registers, ack_registers);
+
+/* External interrupt pins in IRL mode */
+
+static struct intc_vect vectors_irl0123[] __initdata = {
+        INTC_VECT(IRL0_LLLL, 0x200), INTC_VECT(IRL0_LLLH, 0x220),
+        INTC_VECT(IRL0_LLHL, 0x240), INTC_VECT(IRL0_LLHH, 0x260),
+        INTC_VECT(IRL0_LHLL, 0x280), INTC_VECT(IRL0_LHLH, 0x2a0),
+        INTC_VECT(IRL0_LHHL, 0x2c0), INTC_VECT(IRL0_LHHH, 0x2e0),
+        INTC_VECT(IRL0_HLLL, 0x300), INTC_VECT(IRL0_HLLH, 0x320),
+        INTC_VECT(IRL0_HLHL, 0x340), INTC_VECT(IRL0_HLHH, 0x360),
+        INTC_VECT(IRL0_HHLL, 0x380), INTC_VECT(IRL0_HHLH, 0x3a0),
+        INTC_VECT(IRL0_HHHL, 0x3c0),
+};
+
+static struct intc_vect vectors_irl4567[] __initdata = {
+        INTC_VECT(IRL4_LLLL, 0x900), INTC_VECT(IRL4_LLLH, 0x920),
+        INTC_VECT(IRL4_LLHL, 0x940), INTC_VECT(IRL4_LLHH, 0x960),
+        INTC_VECT(IRL4_LHLL, 0x980), INTC_VECT(IRL4_LHLH, 0x9a0),
+        INTC_VECT(IRL4_LHHL, 0x9c0), INTC_VECT(IRL4_LHHH, 0x9e0),
+        INTC_VECT(IRL4_HLLL, 0xa00), INTC_VECT(IRL4_HLLH, 0xa20),
+        INTC_VECT(IRL4_HLHL, 0xa40), INTC_VECT(IRL4_HLHH, 0xa60),
+        INTC_VECT(IRL4_HHLL, 0xa80), INTC_VECT(IRL4_HHLH, 0xaa0),
+        INTC_VECT(IRL4_HHHL, 0xac0),
+};
+
+static DECLARE_INTC_DESC(intc_desc_irl0123, "sh7786-irl0123", vectors_irl0123,
+                         NULL, mask_registers, NULL, NULL);
+
+static DECLARE_INTC_DESC(intc_desc_irl4567, "sh7786-irl4567", vectors_irl4567,
+                         NULL, mask_registers, NULL, NULL);
+
+#define INTC_ICR0       0xfe410000
+#define INTC_INTMSK0    CnINTMSK0
+#define INTC_INTMSK1    CnINTMSK1
+#define INTC_INTMSK2    INTMSK2
+#define INTC_INTMSKCLR1 CnINTMSKCLR1
+#define INTC_INTMSKCLR2 INTMSKCLR2
+
+void __init plat_irq_setup(void)
+{
+        /* disable IRQ3-0 + IRQ7-4 */
+        ctrl_outl(0xff000000, INTC_INTMSK0);
+
+        /* disable IRL3-0 + IRL7-4 */
+        ctrl_outl(0xc0000000, INTC_INTMSK1);
+        ctrl_outl(0xfffefffe, INTC_INTMSK2);
+
+        /* select IRL mode for IRL3-0 + IRL7-4 */
+        ctrl_outl(ctrl_inl(INTC_ICR0) & ~0x00c00000, INTC_ICR0);
+
+        register_intc_controller(&intc_desc);
+}
+
+void __init plat_irq_setup_pins(int mode)
+{
+        switch (mode) {
+        case IRQ_MODE_IRQ7654:
+                /* select IRQ mode for IRL7-4 */
+                ctrl_outl(ctrl_inl(INTC_ICR0) | 0x00400000, INTC_ICR0);
+                register_intc_controller(&intc_desc_irq4567);
+                break;
+        case IRQ_MODE_IRQ3210:
+                /* select IRQ mode for IRL3-0 */
+                ctrl_outl(ctrl_inl(INTC_ICR0) | 0x00800000, INTC_ICR0);
+                register_intc_controller(&intc_desc_irq0123);
+                break;
+        case IRQ_MODE_IRL7654:
+                /* enable IRL7-4 but don't provide any masking */
+                ctrl_outl(0x40000000, INTC_INTMSKCLR1);
+                ctrl_outl(0x0000fffe, INTC_INTMSKCLR2);
+                break;
+        case IRQ_MODE_IRL3210:
+                /* enable IRL0-3 but don't provide any masking */
+                ctrl_outl(0x80000000, INTC_INTMSKCLR1);
+                ctrl_outl(0xfffe0000, INTC_INTMSKCLR2);
+                break;
+        case IRQ_MODE_IRL7654_MASK:
+                /* enable IRL7-4 and mask using cpu intc controller */
+                ctrl_outl(0x40000000, INTC_INTMSKCLR1);
+                register_intc_controller(&intc_desc_irl4567);
+                break;
+        case IRQ_MODE_IRL3210_MASK:
+                /* enable IRL0-3 and mask using cpu intc controller */
+                ctrl_outl(0x80000000, INTC_INTMSKCLR1);
+                register_intc_controller(&intc_desc_irl0123);
+                break;
+        default:
+                BUG();
+        }
+}
+
+void __init plat_mem_setup(void)
+{
+}
diff --git a/arch/sh/kernel/cpu/shmobile/Makefile b/arch/sh/kernel/cpu/shmobile/Makefile
new file mode 100644
index 000000000000..08bfa7c7db29
--- /dev/null
+++ b/arch/sh/kernel/cpu/shmobile/Makefile
@@ -0,0 +1,6 @@
+#
+# Makefile for the Linux/SuperH SH-Mobile backends.
+#
+
+# Power Management & Sleep mode
+obj-$(CONFIG_PM)        += pm.o sleep.o
diff --git a/arch/sh/kernel/cpu/shmobile/pm.c b/arch/sh/kernel/cpu/shmobile/pm.c
new file mode 100644
index 000000000000..8c067adf6830
--- /dev/null
+++ b/arch/sh/kernel/cpu/shmobile/pm.c
@@ -0,0 +1,92 @@
+/*
+ * arch/sh/kernel/cpu/sh4a/pm-sh_mobile.c
+ *
+ * Power management support code for SuperH Mobile
+ *
+ *  Copyright (C) 2009 Magnus Damm
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/io.h>
+#include <linux/suspend.h>
+#include <asm/suspend.h>
+#include <asm/uaccess.h>
+
+/*
+ * Sleep modes available on SuperH Mobile:
+ *
+ * Sleep mode is just plain "sleep" instruction
+ * Sleep Self-Refresh mode is above plus RAM put in Self-Refresh
+ * Standby Self-Refresh mode is above plus stopped clocks
+ */
+#define SUSP_MODE_SLEEP         (SUSP_SH_SLEEP)
+#define SUSP_MODE_SLEEP_SF      (SUSP_SH_SLEEP | SUSP_SH_SF)
+#define SUSP_MODE_STANDBY_SF    (SUSP_SH_STANDBY | SUSP_SH_SF)
+
+/*
+ * The following modes are not there yet:
+ *
+ * R-standby mode is unsupported, but will be added in the future
+ * U-standby mode is low priority since it needs bootloader hacks
+ *
+ * All modes should be tied in with cpuidle. But before that can
+ * happen we need to keep track of enabled hardware blocks so we
+ * can avoid entering sleep modes that stop clocks to hardware
+ * blocks that are in use even though the cpu core is idle.
+ */
+
+extern const unsigned char sh_mobile_standby[];
+extern const unsigned int sh_mobile_standby_size;
+
+static void sh_mobile_call_standby(unsigned long mode)
+{
+        extern void *vbr_base;
+        void *onchip_mem = (void *)0xe5200000; /* ILRAM */
+        void (*standby_onchip_mem)(unsigned long) = onchip_mem;
+
+        /* Note: Wake up from sleep may generate exceptions!
+         * Setup VBR to point to on-chip ram if self-refresh is
+         * going to be used.
+         */
+        if (mode & SUSP_SH_SF)
+                asm volatile("ldc %0, vbr" : : "r" (onchip_mem) : "memory");
+
+        /* Copy the assembly snippet to the otherwise ununsed ILRAM */
+        memcpy(onchip_mem, sh_mobile_standby, sh_mobile_standby_size);
+        wmb();
+        ctrl_barrier();
+
+        /* Let assembly snippet in on-chip memory handle the rest */
+        standby_onchip_mem(mode);
+
+        /* Put VBR back in System RAM again */
+        if (mode & SUSP_SH_SF)
+                asm volatile("ldc %0, vbr" : : "r" (&vbr_base) : "memory");
+}
+
+static int sh_pm_enter(suspend_state_t state)
+{
+        local_irq_disable();
+        set_bl_bit();
+        sh_mobile_call_standby(SUSP_MODE_STANDBY_SF);
+        local_irq_disable();
+        clear_bl_bit();
+        return 0;
+}
+
+static struct platform_suspend_ops sh_pm_ops = {
+        .enter          = sh_pm_enter,
+        .valid          = suspend_valid_only_mem,
+};
+
+static int __init sh_pm_init(void)
+{
+        suspend_set_ops(&sh_pm_ops);
+        return 0;
+}
+
+late_initcall(sh_pm_init);
diff --git a/arch/sh/kernel/cpu/shmobile/sleep.S b/arch/sh/kernel/cpu/shmobile/sleep.S
new file mode 100644
index 000000000000..5d888ef53d82
--- /dev/null
+++ b/arch/sh/kernel/cpu/shmobile/sleep.S
@@ -0,0 +1,125 @@
+/*
+ * arch/sh/kernel/cpu/sh4a/sleep-sh_mobile.S
+ *
+ * Sleep mode and Standby modes support for SuperH Mobile
+ *
+ *  Copyright (C) 2009 Magnus Damm
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+
+#include <linux/sys.h>
+#include <linux/errno.h>
+#include <linux/linkage.h>
+#include <asm/asm-offsets.h>
+#include <asm/suspend.h>
+
+/* manage self-refresh and enter standby mode.
+ * this code will be copied to on-chip memory and executed from there.
+ */
+
+        .balign         4096,0,4096
+ENTRY(sh_mobile_standby)
+        mov     r4, r0
+
+        tst     #SUSP_SH_SF, r0
+        bt      skip_set_sf
+
+        /* SDRAM: disable power down and put in self-refresh mode */
+        mov.l   1f, r4
+        mov.l   2f, r1
+        mov.l   @r4, r2
+        or      r1, r2
+        mov.l   3f, r3
+        and     r3, r2
+        mov.l   r2, @r4
+
+skip_set_sf:
+        tst     #SUSP_SH_SLEEP, r0
+        bt      test_standby
+
+        /* set mode to "sleep mode" */
+        bra     do_sleep
+         mov    #0x00, r1
+
+test_standby:
+        tst     #SUSP_SH_STANDBY, r0
+        bt      test_rstandby
+
+        /* set mode to "software standby mode" */
+        bra     do_sleep
+         mov    #0x80, r1
+
+test_rstandby:
+        tst     #SUSP_SH_RSTANDBY, r0
+        bt      test_ustandby
+
+        /* set mode to "r-standby mode" */
+        bra     do_sleep
+         mov    #0x20, r1
+
+test_ustandby:
+        tst     #SUSP_SH_USTANDBY, r0
+        bt      done_sleep
+
+        /* set mode to "u-standby mode" */
+        mov     #0x10, r1
+
+        /* fall-through */
+
+do_sleep:
+        /* setup and enter selected standby mode */
+        mov.l   5f, r4
+        mov.l   r1, @r4
+        sleep
+
+done_sleep:
+        /* reset standby mode to sleep mode */
+        mov.l   5f, r4
+        mov     #0x00, r1
+        mov.l   r1, @r4
+
+        tst     #SUSP_SH_SF, r0
+        bt      skip_restore_sf
+
+        /* SDRAM: set auto-refresh mode */
+        mov.l   1f, r4
+        mov.l   @r4, r2
+        mov.l   4f, r3
+        and     r3, r2
+        mov.l   r2, @r4
+        mov.l   6f, r4
+        mov.l   7f, r1
+        mov.l   8f, r2
+        mov.l   @r4, r3
+        mov     #-1, r4
+        add     r4, r3
+        or      r2, r3
+        mov.l   r3, @r1
+skip_restore_sf:
+        rts
+         nop
+
+        .balign 4
+1:      .long   0xfe400008 /* SDCR0 */
+2:      .long   0x00000400
+3:      .long   0xffff7fff
+4:      .long   0xfffffbff
+5:      .long   0xa4150020 /* STBCR */
+6:      .long   0xfe40001c /* RTCOR */
+7:      .long   0xfe400018 /* RTCNT */
+8:      .long   0xa55a0000
+
+/* interrupt vector @ 0x600 */
+        .balign         0x400,0,0x400
+        .long   0xdeadbeef
+        .balign         0x200,0,0x200
+        /* sh7722 will end up here in sleep mode */
+        rte
+         nop
+sh_mobile_standby_end:
+
+ENTRY(sh_mobile_standby_size)
+        .long sh_mobile_standby_end - sh_mobile_standby
diff --git a/arch/sh/kernel/gpio.c b/arch/sh/kernel/gpio.c
index d37165361034..d22e5af699f9 100644
--- a/arch/sh/kernel/gpio.c
+++ b/arch/sh/kernel/gpio.c
@@ -19,36 +19,75 @@
 #include <linux/bitops.h>
 #include <linux/gpio.h>
 
-static struct pinmux_info *registered_gpio;
+static int enum_in_range(pinmux_enum_t enum_id, struct pinmux_range *r)
+{
+        if (enum_id < r->begin)
+                return 0;
 
-static struct pinmux_info *gpio_controller(unsigned gpio)
+        if (enum_id > r->end)
+                return 0;
+
+        return 1;
+}
+
+static unsigned long gpio_read_raw_reg(unsigned long reg,
+                                       unsigned long reg_width)
 {
-        if (!registered_gpio)
-                return NULL;
+        switch (reg_width) {
+        case 8:
+                return ctrl_inb(reg);
+        case 16:
+                return ctrl_inw(reg);
+        case 32:
+                return ctrl_inl(reg);
+        }
 
-        if (gpio < registered_gpio->first_gpio)
-                return NULL;
+        BUG();
+        return 0;
+}
 
-        if (gpio > registered_gpio->last_gpio)
-                return NULL;
+static void gpio_write_raw_reg(unsigned long reg,
+                               unsigned long reg_width,
+                               unsigned long data)
+{
+        switch (reg_width) {
+        case 8:
+                ctrl_outb(data, reg);
+                return;
+        case 16:
+                ctrl_outw(data, reg);
+                return;
+        case 32:
+                ctrl_outl(data, reg);
+                return;
+        }
 
-        return registered_gpio;
+        BUG();
 }
 
-static int enum_in_range(pinmux_enum_t enum_id, struct pinmux_range *r)
+static void gpio_write_bit(struct pinmux_data_reg *dr,
+                           unsigned long in_pos, unsigned long value)
 {
-        if (enum_id < r->begin)
-                return 0;
+        unsigned long pos;
 
-        if (enum_id > r->end)
-                return 0;
+        pos = dr->reg_width - (in_pos + 1);
 
-        return 1;
+#ifdef DEBUG
+        pr_info("write_bit addr = %lx, value = %ld, pos = %ld, "
+                "r_width = %ld\n",
+                dr->reg, !!value, pos, dr->reg_width);
+#endif
+
+        if (value)
+                set_bit(pos, &dr->reg_shadow);
+        else
+                clear_bit(pos, &dr->reg_shadow);
+
+        gpio_write_raw_reg(dr->reg, dr->reg_width, dr->reg_shadow);
 }
 
-static int read_write_reg(unsigned long reg, unsigned long reg_width,
-                          unsigned long field_width, unsigned long in_pos,
-                          unsigned long value, int do_write)
+static int gpio_read_reg(unsigned long reg, unsigned long reg_width,
+                         unsigned long field_width, unsigned long in_pos)
 {
         unsigned long data, mask, pos;
 
@@ -57,52 +96,53 @@ static int read_write_reg(unsigned long reg, unsigned long reg_width,
         pos = reg_width - ((in_pos + 1) * field_width);
 
 #ifdef DEBUG
-        pr_info("%s, addr = %lx, value = %ld, pos = %ld, "
+        pr_info("read_reg: addr = %lx, pos = %ld, "
                 "r_width = %ld, f_width = %ld\n",
-                do_write ? "write" : "read", reg, value, pos,
-                reg_width, field_width);
+                reg, pos, reg_width, field_width);
 #endif
 
-        switch (reg_width) {
-        case 8:
-                data = ctrl_inb(reg);
-                break;
-        case 16:
-                data = ctrl_inw(reg);
-                break;
-        case 32:
-                data = ctrl_inl(reg);
-                break;
-        }
+        data = gpio_read_raw_reg(reg, reg_width);
+        return (data >> pos) & mask;
+}
 
-        if (!do_write)
-                return (data >> pos) & mask;
+static void gpio_write_reg(unsigned long reg, unsigned long reg_width,
+                           unsigned long field_width, unsigned long in_pos,
+                           unsigned long value)
+{
+        unsigned long mask, pos;
 
-        data &= ~(mask << pos);
-        data |= value << pos;
+        mask = (1 << field_width) - 1;
+        pos = reg_width - ((in_pos + 1) * field_width);
+
+#ifdef DEBUG
+        pr_info("write_reg addr = %lx, value = %ld, pos = %ld, "
+                "r_width = %ld, f_width = %ld\n",
+                reg, value, pos, reg_width, field_width);
+#endif
+
+        mask = ~(mask << pos);
+        value = value << pos;
 
         switch (reg_width) {
         case 8:
-                ctrl_outb(data, reg);
+                ctrl_outb((ctrl_inb(reg) & mask) | value, reg);
                 break;
         case 16:
-                ctrl_outw(data, reg);
+                ctrl_outw((ctrl_inw(reg) & mask) | value, reg);
                 break;
         case 32:
-                ctrl_outl(data, reg);
+                ctrl_outl((ctrl_inl(reg) & mask) | value, reg);
                 break;
         }
-        return 0;
 }
 
-static int get_data_reg(struct pinmux_info *gpioc, unsigned gpio,
-                        struct pinmux_data_reg **drp, int *bitp)
+static int setup_data_reg(struct pinmux_info *gpioc, unsigned gpio)
 {
-        pinmux_enum_t enum_id = gpioc->gpios[gpio].enum_id;
+        struct pinmux_gpio *gpiop = &gpioc->gpios[gpio];
         struct pinmux_data_reg *data_reg;
         int k, n;
 
-        if (!enum_in_range(enum_id, &gpioc->data))
+        if (!enum_in_range(gpiop->enum_id, &gpioc->data))
                 return -1;
 
         k = 0;
@@ -113,19 +153,58 @@ static int get_data_reg(struct pinmux_info *gpioc, unsigned gpio,
                         break;
 
                 for (n = 0; n < data_reg->reg_width; n++) {
-                        if (data_reg->enum_ids[n] == enum_id) {
-                                *drp = data_reg;
-                                *bitp = n;
+                        if (data_reg->enum_ids[n] == gpiop->enum_id) {
+                                gpiop->flags &= ~PINMUX_FLAG_DREG;
+                                gpiop->flags |= (k << PINMUX_FLAG_DREG_SHIFT);
+                                gpiop->flags &= ~PINMUX_FLAG_DBIT;
+                                gpiop->flags |= (n << PINMUX_FLAG_DBIT_SHIFT);
                                 return 0;
-
                         }
                 }
                 k++;
         }
 
+        BUG();
+
         return -1;
 }
 
+static void setup_data_regs(struct pinmux_info *gpioc)
+{
+        struct pinmux_data_reg *drp;
+        int k;
+
+        for (k = gpioc->first_gpio; k <= gpioc->last_gpio; k++)
+                setup_data_reg(gpioc, k);
+
+        k = 0;
+        while (1) {
+                drp = gpioc->data_regs + k;
+
+                if (!drp->reg_width)
+                        break;
+
+                drp->reg_shadow = gpio_read_raw_reg(drp->reg, drp->reg_width);
+                k++;
+        }
+}
+
+static int get_data_reg(struct pinmux_info *gpioc, unsigned gpio,
+                        struct pinmux_data_reg **drp, int *bitp)
+{
+        struct pinmux_gpio *gpiop = &gpioc->gpios[gpio];
+        int k, n;
+
+        if (!enum_in_range(gpiop->enum_id, &gpioc->data))
+                return -1;
+
+        k = (gpiop->flags & PINMUX_FLAG_DREG) >> PINMUX_FLAG_DREG_SHIFT;
+        n = (gpiop->flags & PINMUX_FLAG_DBIT) >> PINMUX_FLAG_DBIT_SHIFT;
+        *drp = gpioc->data_regs + k;
+        *bitp = n;
+        return 0;
+}
+
 static int get_config_reg(struct pinmux_info *gpioc, pinmux_enum_t enum_id,
                           struct pinmux_cfg_reg **crp, int *indexp,
                           unsigned long **cntp)
@@ -187,9 +266,9 @@ static int get_gpio_enum_id(struct pinmux_info *gpioc, unsigned gpio,
         return -1;
 }
 
-static int write_config_reg(struct pinmux_info *gpioc,
-                            struct pinmux_cfg_reg *crp,
-                            int index)
+static void write_config_reg(struct pinmux_info *gpioc,
+                             struct pinmux_cfg_reg *crp,
+                             int index)
 {
         unsigned long ncomb, pos, value;
 
@@ -197,8 +276,7 @@ static int write_config_reg(struct pinmux_info *gpioc,
         pos = index / ncomb;
         value = index % ncomb;
 
-        return read_write_reg(crp->reg, crp->reg_width,
-                              crp->field_width, pos, value, 1);
+        gpio_write_reg(crp->reg, crp->reg_width, crp->field_width, pos, value);
 }
 
 static int check_config_reg(struct pinmux_info *gpioc,
@@ -211,8 +289,8 @@ static int check_config_reg(struct pinmux_info *gpioc,
         pos = index / ncomb;
         value = index % ncomb;
 
-        if (read_write_reg(crp->reg, crp->reg_width,
-                           crp->field_width, pos, 0, 0) == value)
+        if (gpio_read_reg(crp->reg, crp->reg_width,
+                          crp->field_width, pos) == value)
                 return 0;
 
         return -1;
@@ -220,8 +298,8 @@ static int check_config_reg(struct pinmux_info *gpioc,
 
 enum { GPIO_CFG_DRYRUN, GPIO_CFG_REQ, GPIO_CFG_FREE };
 
-int pinmux_config_gpio(struct pinmux_info *gpioc, unsigned gpio,
-                       int pinmux_type, int cfg_mode)
+static int pinmux_config_gpio(struct pinmux_info *gpioc, unsigned gpio,
+                              int pinmux_type, int cfg_mode)
 {
         struct pinmux_cfg_reg *cr = NULL;
         pinmux_enum_t enum_id;
@@ -287,8 +365,7 @@ int pinmux_config_gpio(struct pinmux_info *gpioc, unsigned gpio,
                         break;
 
                 case GPIO_CFG_REQ:
-                        if (write_config_reg(gpioc, cr, index) != 0)
-                                goto out_err;
+                        write_config_reg(gpioc, cr, index);
                         *cntp = *cntp + 1;
                         break;
 
@@ -305,9 +382,14 @@ int pinmux_config_gpio(struct pinmux_info *gpioc, unsigned gpio,
 
 static DEFINE_SPINLOCK(gpio_lock);
 
-int __gpio_request(unsigned gpio)
+static struct pinmux_info *chip_to_pinmux(struct gpio_chip *chip)
 {
-        struct pinmux_info *gpioc = gpio_controller(gpio);
+        return container_of(chip, struct pinmux_info, chip);
+}
+
+static int sh_gpio_request(struct gpio_chip *chip, unsigned offset)
+{
+        struct pinmux_info *gpioc = chip_to_pinmux(chip);
         struct pinmux_data_reg *dummy;
         unsigned long flags;
         int i, ret, pinmux_type;
@@ -319,29 +401,30 @@ int __gpio_request(unsigned gpio)
 
         spin_lock_irqsave(&gpio_lock, flags);
 
-        if ((gpioc->gpios[gpio].flags & PINMUX_FLAG_TYPE) != PINMUX_TYPE_NONE)
+        if ((gpioc->gpios[offset].flags & PINMUX_FLAG_TYPE) != PINMUX_TYPE_NONE)
                 goto err_unlock;
 
         /* setup pin function here if no data is associated with pin */
 
-        if (get_data_reg(gpioc, gpio, &dummy, &i) != 0)
+        if (get_data_reg(gpioc, offset, &dummy, &i) != 0)
                 pinmux_type = PINMUX_TYPE_FUNCTION;
         else
                 pinmux_type = PINMUX_TYPE_GPIO;
 
         if (pinmux_type == PINMUX_TYPE_FUNCTION) {
-                if (pinmux_config_gpio(gpioc, gpio,
+                if (pinmux_config_gpio(gpioc, offset,
                                        pinmux_type,
                                        GPIO_CFG_DRYRUN) != 0)
                         goto err_unlock;
 
-                if (pinmux_config_gpio(gpioc, gpio,
+                if (pinmux_config_gpio(gpioc, offset,
                                        pinmux_type,
                                        GPIO_CFG_REQ) != 0)
                         BUG();
         }
 
-        gpioc->gpios[gpio].flags = pinmux_type;
+        gpioc->gpios[offset].flags &= ~PINMUX_FLAG_TYPE;
+        gpioc->gpios[offset].flags |= pinmux_type;
 
         ret = 0;
  err_unlock:
@@ -349,11 +432,10 @@ int __gpio_request(unsigned gpio)
  err_out:
         return ret;
 }
-EXPORT_SYMBOL(__gpio_request);
 
-void gpio_free(unsigned gpio)
+static void sh_gpio_free(struct gpio_chip *chip, unsigned offset)
 {
-        struct pinmux_info *gpioc = gpio_controller(gpio);
+        struct pinmux_info *gpioc = chip_to_pinmux(chip);
         unsigned long flags;
         int pinmux_type;
 
@@ -362,20 +444,23 @@ void gpio_free(unsigned gpio)
 
         spin_lock_irqsave(&gpio_lock, flags);
 
-        pinmux_type = gpioc->gpios[gpio].flags & PINMUX_FLAG_TYPE;
-        pinmux_config_gpio(gpioc, gpio, pinmux_type, GPIO_CFG_FREE);
-        gpioc->gpios[gpio].flags = PINMUX_TYPE_NONE;
+        pinmux_type = gpioc->gpios[offset].flags & PINMUX_FLAG_TYPE;
+        pinmux_config_gpio(gpioc, offset, pinmux_type, GPIO_CFG_FREE);
+        gpioc->gpios[offset].flags &= ~PINMUX_FLAG_TYPE;
+        gpioc->gpios[offset].flags |= PINMUX_TYPE_NONE;
 
         spin_unlock_irqrestore(&gpio_lock, flags);
 }
-EXPORT_SYMBOL(gpio_free);
 
 static int pinmux_direction(struct pinmux_info *gpioc,
                             unsigned gpio, int new_pinmux_type)
 {
-        int ret, pinmux_type;
+        int pinmux_type;
+        int ret = -EINVAL;
+
+        if (!gpioc)
+                goto err_out;
 
-        ret = -EINVAL;
         pinmux_type = gpioc->gpios[gpio].flags & PINMUX_FLAG_TYPE;
 
         switch (pinmux_type) {
@@ -401,102 +486,99 @@ static int pinmux_direction(struct pinmux_info *gpioc,
                                GPIO_CFG_REQ) != 0)
                 BUG();
 
-        gpioc->gpios[gpio].flags = new_pinmux_type;
+        gpioc->gpios[gpio].flags &= ~PINMUX_FLAG_TYPE;
+        gpioc->gpios[gpio].flags |= new_pinmux_type;
 
         ret = 0;
  err_out:
         return ret;
 }
 
-int gpio_direction_input(unsigned gpio)
+static int sh_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
 {
-        struct pinmux_info *gpioc = gpio_controller(gpio);
+        struct pinmux_info *gpioc = chip_to_pinmux(chip);
         unsigned long flags;
-        int ret = -EINVAL;
-
-        if (!gpioc)
-                goto err_out;
+        int ret;
 
         spin_lock_irqsave(&gpio_lock, flags);
-        ret = pinmux_direction(gpioc, gpio, PINMUX_TYPE_INPUT);
+        ret = pinmux_direction(gpioc, offset, PINMUX_TYPE_INPUT);
         spin_unlock_irqrestore(&gpio_lock, flags);
- err_out:
+
         return ret;
 }
-EXPORT_SYMBOL(gpio_direction_input);
 
-static int __gpio_get_set_value(struct pinmux_info *gpioc,
-                                unsigned gpio, int value,
-                                int do_write)
+static void sh_gpio_set_value(struct pinmux_info *gpioc,
+                             unsigned gpio, int value)
 {
         struct pinmux_data_reg *dr = NULL;
         int bit = 0;
 
-        if (get_data_reg(gpioc, gpio, &dr, &bit) != 0)
+        if (!gpioc || get_data_reg(gpioc, gpio, &dr, &bit) != 0)
                 BUG();
         else
-                value = read_write_reg(dr->reg, dr->reg_width,
-                                       1, bit, !!value, do_write);
-
-        return value;
+                gpio_write_bit(dr, bit, value);
 }
 
-int gpio_direction_output(unsigned gpio, int value)
+static int sh_gpio_direction_output(struct gpio_chip *chip, unsigned offset,
+                                    int value)
 {
-        struct pinmux_info *gpioc = gpio_controller(gpio);
+        struct pinmux_info *gpioc = chip_to_pinmux(chip);
         unsigned long flags;
-        int ret = -EINVAL;
-
-        if (!gpioc)
-                goto err_out;
+        int ret;
 
+        sh_gpio_set_value(gpioc, offset, value);
         spin_lock_irqsave(&gpio_lock, flags);
-        __gpio_get_set_value(gpioc, gpio, value, 1);
-        ret = pinmux_direction(gpioc, gpio, PINMUX_TYPE_OUTPUT);
+        ret = pinmux_direction(gpioc, offset, PINMUX_TYPE_OUTPUT);
         spin_unlock_irqrestore(&gpio_lock, flags);
- err_out:
+
         return ret;
 }
-EXPORT_SYMBOL(gpio_direction_output);
 
-int gpio_get_value(unsigned gpio)
+static int sh_gpio_get_value(struct pinmux_info *gpioc, unsigned gpio)
 {
-        struct pinmux_info *gpioc = gpio_controller(gpio);
-        unsigned long flags;
-        int value = 0;
+        struct pinmux_data_reg *dr = NULL;
+        int bit = 0;
 
-        if (!gpioc)
+        if (!gpioc || get_data_reg(gpioc, gpio, &dr, &bit) != 0) {
                 BUG();
-        else {
-                spin_lock_irqsave(&gpio_lock, flags);
-                value = __gpio_get_set_value(gpioc, gpio, 0, 0);
-                spin_unlock_irqrestore(&gpio_lock, flags);
+                return 0;
         }
 
-        return value;
+        return gpio_read_reg(dr->reg, dr->reg_width, 1, bit);
 }
-EXPORT_SYMBOL(gpio_get_value);
 
-void gpio_set_value(unsigned gpio, int value)
+static int sh_gpio_get(struct gpio_chip *chip, unsigned offset)
 {
-        struct pinmux_info *gpioc = gpio_controller(gpio);
-        unsigned long flags;
+        return sh_gpio_get_value(chip_to_pinmux(chip), offset);
+}
 
-        if (!gpioc)
-                BUG();
-        else {
-                spin_lock_irqsave(&gpio_lock, flags);
-                __gpio_get_set_value(gpioc, gpio, value, 1);
-                spin_unlock_irqrestore(&gpio_lock, flags);
-        }
+static void sh_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
+{
+        sh_gpio_set_value(chip_to_pinmux(chip), offset, value);
 }
-EXPORT_SYMBOL(gpio_set_value);
 
 int register_pinmux(struct pinmux_info *pip)
 {
-        registered_gpio = pip;
-        pr_info("pinmux: %s handling gpio %d -> %d\n",
+        struct gpio_chip *chip = &pip->chip;
+
+        pr_info("sh pinmux: %s handling gpio %d -> %d\n",
                 pip->name, pip->first_gpio, pip->last_gpio);
 
-        return 0;
+        setup_data_regs(pip);
+
+        chip->request = sh_gpio_request;
+        chip->free = sh_gpio_free;
+        chip->direction_input = sh_gpio_direction_input;
+        chip->get = sh_gpio_get;
+        chip->direction_output = sh_gpio_direction_output;
+        chip->set = sh_gpio_set;
+
+        WARN_ON(pip->first_gpio != 0); /* needs testing */
+
+        chip->label = pip->name;
+        chip->owner = THIS_MODULE;
+        chip->base = pip->first_gpio;
+        chip->ngpio = (pip->last_gpio - pip->first_gpio) + 1;
+
+        return gpiochip_add(chip);
 }
diff --git a/arch/sh/kernel/irq.c b/arch/sh/kernel/irq.c
index 64b7690c664c..3f1372eb0091 100644
--- a/arch/sh/kernel/irq.c
+++ b/arch/sh/kernel/irq.c
@@ -51,7 +51,7 @@ int show_interrupts(struct seq_file *p, void *v)
                         goto unlock;
                 seq_printf(p, "%3d: ",i);
                 for_each_online_cpu(j)
-                        seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
+                        seq_printf(p, "%10u ", kstat_irqs_cpu(i, j));
                 seq_printf(p, " %14s", irq_desc[i].chip->name);
                 seq_printf(p, "-%-8s", irq_desc[i].name);
                 seq_printf(p, "  %s", action->name);
@@ -106,7 +106,7 @@ asmlinkage int do_IRQ(unsigned int irq, struct pt_regs *regs)
         }
 #endif
 
-        irq = irq_demux(evt2irq(irq));
+        irq = irq_demux(intc_evt2irq(irq));
 
 #ifdef CONFIG_IRQSTACKS
         curctx = (union irq_ctx *)current_thread_info();
diff --git a/arch/sh/kernel/machine_kexec.c b/arch/sh/kernel/machine_kexec.c
index 94df56b0d1f6..7ea2704ea033 100644
--- a/arch/sh/kernel/machine_kexec.c
+++ b/arch/sh/kernel/machine_kexec.c
@@ -14,21 +14,22 @@
 #include <linux/delay.h>
 #include <linux/reboot.h>
 #include <linux/numa.h>
+#include <linux/ftrace.h>
+#include <linux/suspend.h>
 #include <asm/pgtable.h>
 #include <asm/pgalloc.h>
 #include <asm/mmu_context.h>
 #include <asm/io.h>
 #include <asm/cacheflush.h>
 
-typedef NORET_TYPE void (*relocate_new_kernel_t)(
-                                unsigned long indirection_page,
-                                unsigned long reboot_code_buffer,
-                                unsigned long start_address,
-                                unsigned long vbr_reg) ATTRIB_NORET;
+typedef void (*relocate_new_kernel_t)(unsigned long indirection_page,
+                                      unsigned long reboot_code_buffer,
+                                      unsigned long start_address);
 
 extern const unsigned char relocate_new_kernel[];
 extern const unsigned int relocate_new_kernel_size;
 extern void *gdb_vbr_vector;
+extern void *vbr_base;
 
 void machine_shutdown(void)
 {
@@ -45,6 +46,12 @@ void machine_crash_shutdown(struct pt_regs *regs)
  */
 int machine_kexec_prepare(struct kimage *image)
 {
+        /* older versions of kexec-tools are passing
+         * the zImage entry point as a virtual address.
+         */
+        if (image->start != PHYSADDR(image->start))
+                return -EINVAL; /* upgrade your kexec-tools */
+
         return 0;
 }
 
@@ -73,17 +80,33 @@ static void kexec_info(struct kimage *image)
  */
 void machine_kexec(struct kimage *image)
 {
-
         unsigned long page_list;
         unsigned long reboot_code_buffer;
-        unsigned long vbr_reg;
         relocate_new_kernel_t rnk;
+        unsigned long entry;
+        unsigned long *ptr;
+        int save_ftrace_enabled;
+
+        /*
+         * Nicked from the mips version of machine_kexec():
+         * The generic kexec code builds a page list with physical
+         * addresses. Use phys_to_virt() to convert them to virtual.
+         */
+        for (ptr = &image->head; (entry = *ptr) && !(entry & IND_DONE);
+             ptr = (entry & IND_INDIRECTION) ?
+               phys_to_virt(entry & PAGE_MASK) : ptr + 1) {
+                if (*ptr & IND_SOURCE || *ptr & IND_INDIRECTION ||
+                    *ptr & IND_DESTINATION)
+                        *ptr = (unsigned long) phys_to_virt(*ptr);
+        }
 
-#if defined(CONFIG_SH_STANDARD_BIOS)
-        vbr_reg = ((unsigned long )gdb_vbr_vector) - 0x100;
-#else
-        vbr_reg = 0x80000000;  // dummy
+#ifdef CONFIG_KEXEC_JUMP
+        if (image->preserve_context)
+                save_processor_state();
 #endif
+
+        save_ftrace_enabled = __ftrace_enabled_save();
+
         /* Interrupts aren't acceptable while we reboot */
         local_irq_disable();
 
@@ -97,12 +120,37 @@ void machine_kexec(struct kimage *image)
         memcpy((void *)reboot_code_buffer, relocate_new_kernel,
                                                 relocate_new_kernel_size);
 
-        kexec_info(image);
+        kexec_info(image);
         flush_cache_all();
 
+#if defined(CONFIG_SH_STANDARD_BIOS)
+        asm volatile("ldc %0, vbr" :
+                     : "r" (((unsigned long) gdb_vbr_vector) - 0x100)
+                     : "memory");
+#endif
+
         /* now call it */
         rnk = (relocate_new_kernel_t) reboot_code_buffer;
-        (*rnk)(page_list, reboot_code_buffer, P2SEGADDR(image->start), vbr_reg);
+        (*rnk)(page_list, reboot_code_buffer,
+               (unsigned long)phys_to_virt(image->start));
+
+#ifdef CONFIG_KEXEC_JUMP
+        asm volatile("ldc %0, vbr" : : "r" (&vbr_base) : "memory");
+
+        if (image->preserve_context)
+                restore_processor_state();
+
+        /* Convert page list back to physical addresses, what a mess. */
+        for (ptr = &image->head; (entry = *ptr) && !(entry & IND_DONE);
+             ptr = (*ptr & IND_INDIRECTION) ?
+               phys_to_virt(*ptr & PAGE_MASK) : ptr + 1) {
+                if (*ptr & IND_SOURCE || *ptr & IND_INDIRECTION ||
+                    *ptr & IND_DESTINATION)
+                        *ptr = virt_to_phys(*ptr);
+        }
+#endif
+
+        __ftrace_enabled_restore(save_ftrace_enabled);
 }
 
 void arch_crash_save_vmcoreinfo(void)
diff --git a/arch/sh/kernel/relocate_kernel.S b/arch/sh/kernel/relocate_kernel.S
index c66cb3209db5..fcc9934fb97b 100644
--- a/arch/sh/kernel/relocate_kernel.S
+++ b/arch/sh/kernel/relocate_kernel.S
@@ -4,6 +4,8 @@
  *
  * LANDISK/sh4 is supported. Maybe, SH archtecture works well.
  *
+ * 2009-03-18 Magnus Damm - Added Kexec Jump support
+ *
  * This source code is licensed under the GNU General Public License,
  * Version 2.  See the file COPYING for more details.
  */
@@ -16,23 +18,141 @@ relocate_new_kernel:
         /* r4 = indirection_page   */
         /* r5 = reboot_code_buffer */
         /* r6 = start_address      */
-        /* r7 = vbr_reg            */
 
-        mov.l   10f,r8    /* PAGE_SIZE */
-        mov.l   11f,r9    /* P2SEG */
+        mov.l   10f, r0         /* PAGE_SIZE */
+        add     r5, r0          /* setup new stack at end of control page */
+
+        /* save r15->r8 to new stack */
+        mov.l   r15, @-r0
+        mov     r0, r15
+        mov.l   r14, @-r15
+        mov.l   r13, @-r15
+        mov.l   r12, @-r15
+        mov.l   r11, @-r15
+        mov.l   r10, @-r15
+        mov.l   r9, @-r15
+        mov.l   r8, @-r15
+
+        /* save other random registers */
+        sts.l   macl, @-r15
+        sts.l   mach, @-r15
+        stc.l   gbr, @-r15
+        stc.l   ssr, @-r15
+        stc.l   sr, @-r15
+        sts.l   pr, @-r15
+        stc.l   spc, @-r15
+
+        /* switch to bank1 and save r7->r0 */
+        mov.l   12f, r9
+        stc     sr, r8
+        or      r9, r8
+        ldc     r8, sr
+        mov.l   r7, @-r15
+        mov.l   r6, @-r15
+        mov.l   r5, @-r15
+        mov.l   r4, @-r15
+        mov.l   r3, @-r15
+        mov.l   r2, @-r15
+        mov.l   r1, @-r15
+        mov.l   r0, @-r15
+
+        /* switch to bank0 and save r7->r0 */
+        mov.l   12f, r9
+        not     r9, r9
+        stc     sr, r8
+        and     r9, r8
+        ldc     r8, sr
+        mov.l   r7, @-r15
+        mov.l   r6, @-r15
+        mov.l   r5, @-r15
+        mov.l   r4, @-r15
+        mov.l   r3, @-r15
+        mov.l   r2, @-r15
+        mov.l   r1, @-r15
+        mov.l   r0, @-r15
+
+        mov.l   r4, @-r15       /* save indirection page again */
+
+        bsr     swap_pages      /* swap pages before jumping to new kernel */
+         nop
+
+        mova    11f, r0
+        mov.l   r15, @r0        /* save pointer to stack */
+
+        jsr     @r6             /* hand over control to new kernel */
+         nop
+
+        mov.l   11f, r15        /* get pointer to stack */
+        mov.l   @r15+, r4       /* restore r4 to get indirection page */
 
-        /*  stack setting */
-        add     r8,r5
-        mov     r5,r15
+        bsr     swap_pages      /* swap pages back to previous state */
+         nop
 
+        /* make sure bank0 is active and restore r0->r7 */
+        mov.l   12f, r9
+        not     r9, r9
+        stc     sr, r8
+        and     r9, r8
+        ldc     r8, sr
+        mov.l   @r15+, r0
+        mov.l   @r15+, r1
+        mov.l   @r15+, r2
+        mov.l   @r15+, r3
+        mov.l   @r15+, r4
+        mov.l   @r15+, r5
+        mov.l   @r15+, r6
+        mov.l   @r15+, r7
+
+        /* switch to bank1 and restore r0->r7 */
+        mov.l   12f, r9
+        stc     sr, r8
+        or      r9, r8
+        ldc     r8, sr
+        mov.l   @r15+, r0
+        mov.l   @r15+, r1
+        mov.l   @r15+, r2
+        mov.l   @r15+, r3
+        mov.l   @r15+, r4
+        mov.l   @r15+, r5
+        mov.l   @r15+, r6
+        mov.l   @r15+, r7
+
+        /* switch back to bank0 */
+        mov.l   12f, r9
+        not     r9, r9
+        stc     sr, r8
+        and     r9, r8
+        ldc     r8, sr
+
+        /* restore other random registers */
+        ldc.l   @r15+, spc
+        lds.l   @r15+, pr
+        ldc.l   @r15+, sr
+        ldc.l   @r15+, ssr
+        ldc.l   @r15+, gbr
+        lds.l   @r15+, mach
+        lds.l   @r15+, macl
+
+        /* restore r8->r15 */
+        mov.l   @r15+, r8
+        mov.l   @r15+, r9
+        mov.l   @r15+, r10
+        mov.l   @r15+, r11
+        mov.l   @r15+, r12
+        mov.l   @r15+, r13
+        mov.l   @r15+, r14
+        mov.l   @r15+, r15
+        rts
+         nop
+
+swap_pages:
         bra     1f
-        mov     r4,r0     /* cmd = indirection_page */
+         mov    r4,r0     /* cmd = indirection_page */
 0:
         mov.l   @r4+,r0   /* cmd = *ind++ */
 
-1:      /* addr = (cmd | P2SEG) & 0xfffffff0 */
+1:      /* addr = cmd & 0xfffffff0 */
         mov     r0,r2
-        or      r9,r2
         mov     #-16,r1
         and     r1,r2
 
@@ -40,57 +160,70 @@ relocate_new_kernel:
         tst     #1,r0
         bt      2f
         bra     0b
-        mov     r2,r5
+         mov    r2,r5
 
 2:      /* else if(cmd & IND_INDIRECTION) ind = addr  */
         tst     #2,r0
         bt      3f
         bra     0b
-        mov     r2,r4
+         mov    r2,r4
 
-3:      /* else if(cmd & IND_DONE) goto 6  */
+3:      /* else if(cmd & IND_DONE) return */
         tst     #4,r0
         bt      4f
-        bra     6f
-        nop
+        rts
+         nop
 
 4:      /* else if(cmd & IND_SOURCE) memcpy(dst,addr,PAGE_SIZE) */
         tst     #8,r0
         bt      0b
 
-        mov     r8,r3
+        mov.l   10f,r3    /* PAGE_SIZE */
         shlr2   r3
         shlr2   r3
 5:
         dt      r3
-        mov.l   @r2+,r1   /*  16n+0 */
-        mov.l   r1,@r5
-        add     #4,r5
-        mov.l   @r2+,r1   /*  16n+4 */
-        mov.l   r1,@r5
-        add     #4,r5
-        mov.l   @r2+,r1   /*  16n+8 */
-        mov.l   r1,@r5
-        add     #4,r5
-        mov.l   @r2+,r1   /*  16n+12 */
-        mov.l   r1,@r5
-        add     #4,r5
+
+        /* regular kexec just overwrites the destination page
+         * with the contents of the source page.
+         * for the kexec jump case we need to swap the contents
+         * of the pages.
+         * to keep it simple swap the contents for both cases.
+         */
+        mov.l   @(0, r2), r8
+        mov.l   @(0, r5), r1
+        mov.l   r8, @(0, r5)
+        mov.l   r1, @(0, r2)
+
+        mov.l   @(4, r2), r8
+        mov.l   @(4, r5), r1
+        mov.l   r8, @(4, r5)
+        mov.l   r1, @(4, r2)
+
+        mov.l   @(8, r2), r8
+        mov.l   @(8, r5), r1
+        mov.l   r8, @(8, r5)
+        mov.l   r1, @(8, r2)
+
+        mov.l   @(12, r2), r8
+        mov.l   @(12, r5), r1
+        mov.l   r8, @(12, r5)
+        mov.l   r1, @(12, r2)
+
+        add     #16,r5
+        add     #16,r2
         bf      5b
 
         bra     0b
-        nop
-6:
-#ifdef CONFIG_SH_STANDARD_BIOS
-        ldc   r7, vbr
-#endif
-        jmp @r6
-        nop
+         nop
 
         .align 2
 10:
         .long   PAGE_SIZE
 11:
-        .long   P2SEG
+        .long   0
+12:
+        .long   0x20000000 ! RB=1
 
 relocate_new_kernel_end:
 
diff --git a/arch/sh/kernel/setup.c b/arch/sh/kernel/setup.c
index 370d2cfa34eb..24c60251f680 100644
--- a/arch/sh/kernel/setup.c
+++ b/arch/sh/kernel/setup.c
@@ -432,6 +432,7 @@ static const char *cpu_name[] = {
         [CPU_SH7763]    = "SH7763",     [CPU_SH7770]    = "SH7770",
         [CPU_SH7780]    = "SH7780",     [CPU_SH7781]    = "SH7781",
         [CPU_SH7343]    = "SH7343",     [CPU_SH7785]    = "SH7785",
+        [CPU_SH7786]    = "SH7786",
         [CPU_SH7722]    = "SH7722",     [CPU_SHX3]      = "SH-X3",
         [CPU_SH5_101]   = "SH5-101",    [CPU_SH5_103]   = "SH5-103",
         [CPU_MXG]       = "MX-G",       [CPU_SH7723]    = "SH7723",
@@ -448,7 +449,7 @@ EXPORT_SYMBOL(get_cpu_subtype);
 /* Symbolic CPU flags, keep in sync with asm/cpu-features.h */
 static const char *cpu_flags[] = {
         "none", "fpu", "p2flush", "mmuassoc", "dsp", "perfctr",
-        "ptea", "llsc", "l2", "op32", NULL
+        "ptea", "llsc", "l2", "op32", "pteaex", NULL
 };
 
 static void show_cpuflags(struct seq_file *m, struct sh_cpuinfo *c)
diff --git a/arch/sh/kernel/swsusp.c b/arch/sh/kernel/swsusp.c
new file mode 100644
index 000000000000..12b64a0f2f01
--- /dev/null
+++ b/arch/sh/kernel/swsusp.c
@@ -0,0 +1,38 @@
+/*
+ * swsusp.c - SuperH hibernation support
+ *
+ * Copyright (C) 2009 Magnus Damm
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+
+#include <linux/mm.h>
+#include <linux/sched.h>
+#include <linux/suspend.h>
+#include <asm/suspend.h>
+#include <asm/sections.h>
+#include <asm/tlbflush.h>
+#include <asm/page.h>
+#include <asm/fpu.h>
+
+struct swsusp_arch_regs swsusp_arch_regs_cpu0;
+
+int pfn_is_nosave(unsigned long pfn)
+{
+        unsigned long begin_pfn = __pa(&__nosave_begin) >> PAGE_SHIFT;
+        unsigned long end_pfn = PAGE_ALIGN(__pa(&__nosave_end)) >> PAGE_SHIFT;
+
+        return (pfn >= begin_pfn) && (pfn < end_pfn);
+}
+
+void save_processor_state(void)
+{
+        init_fpu(current);
+}
+
+void restore_processor_state(void)
+{
+        local_flush_tlb_all();
+}
diff --git a/arch/sh/kernel/time_32.c b/arch/sh/kernel/time_32.c
index 8457f83242c5..c34e1e0f9b02 100644
--- a/arch/sh/kernel/time_32.c
+++ b/arch/sh/kernel/time_32.c
@@ -41,14 +41,6 @@ static int null_rtc_set_time(const time_t secs)
         return 0;
 }
 
-/*
- * Null high precision timer functions for systems lacking one.
- */
-static cycle_t null_hpt_read(void)
-{
-        return 0;
-}
-
 void (*rtc_sh_get_time)(struct timespec *) = null_rtc_get_time;
 int (*rtc_sh_set_time)(const time_t) = null_rtc_set_time;
 
@@ -112,7 +104,6 @@ int do_settimeofday(struct timespec *tv)
 EXPORT_SYMBOL(do_settimeofday);
 #endif /* !CONFIG_GENERIC_TIME */
 
-#ifndef CONFIG_GENERIC_CLOCKEVENTS
 /* last time the RTC clock got updated */
 static long last_rtc_update;
 
@@ -156,7 +147,6 @@ void handle_timer_tick(void)
         update_process_times(user_mode(get_irq_regs()));
 #endif
 }
-#endif /* !CONFIG_GENERIC_CLOCKEVENTS */
 
 #ifdef CONFIG_PM
 int timer_suspend(struct sys_device *dev, pm_message_t state)
@@ -189,7 +179,12 @@ static struct sysdev_class timer_sysclass = {
 
 static int __init timer_init_sysfs(void)
 {
-        int ret = sysdev_class_register(&timer_sysclass);
+        int ret;
+
+        if (!sys_timer)
+                return 0;
+
+        ret = sysdev_class_register(&timer_sysclass);
         if (ret != 0)
                 return ret;
 
@@ -200,42 +195,21 @@ device_initcall(timer_init_sysfs);
 
 void (*board_time_init)(void);
 
-/*
- * Shamelessly based on the MIPS and Sparc64 work.
- */
-static unsigned long timer_ticks_per_nsec_quotient __read_mostly;
-unsigned long sh_hpt_frequency = 0;
-
-#define NSEC_PER_CYC_SHIFT      10
-
-static struct clocksource clocksource_sh = {
+struct clocksource clocksource_sh = {
         .name           = "SuperH",
-        .rating         = 200,
-        .mask           = CLOCKSOURCE_MASK(32),
-        .read           = null_hpt_read,
-        .shift          = 16,
-        .flags          = CLOCK_SOURCE_IS_CONTINUOUS,
 };
 
-static void __init init_sh_clocksource(void)
-{
-        if (!sh_hpt_frequency || clocksource_sh.read == null_hpt_read)
-                return;
-
-        clocksource_sh.mult = clocksource_hz2mult(sh_hpt_frequency,
-                                                  clocksource_sh.shift);
-
-        timer_ticks_per_nsec_quotient =
-                clocksource_hz2mult(sh_hpt_frequency, NSEC_PER_CYC_SHIFT);
-
-        clocksource_register(&clocksource_sh);
-}
-
 #ifdef CONFIG_GENERIC_TIME
 unsigned long long sched_clock(void)
 {
-        unsigned long long ticks = clocksource_sh.read();
-        return (ticks * timer_ticks_per_nsec_quotient) >> NSEC_PER_CYC_SHIFT;
+        unsigned long long cycles;
+
+        /* jiffies based sched_clock if no clocksource is installed */
+        if (!clocksource_sh.rating)
+                return (unsigned long long)jiffies * (NSEC_PER_SEC / HZ);
+
+        cycles = clocksource_sh.read();
+        return cyc2ns(&clocksource_sh, cycles);
 }
 #endif
 
@@ -259,17 +233,8 @@ void __init time_init(void)
          * initialized for us.
          */
         sys_timer = get_sys_timer();
-        printk(KERN_INFO "Using %s for system timer\n", sys_timer->name);
-
-
-        if (sys_timer->ops->read)
-                clocksource_sh.read = sys_timer->ops->read;
-
-        init_sh_clocksource();
-
-        if (sh_hpt_frequency)
-                printk("Using %lu.%03lu MHz high precision timer.\n",
-                       ((sh_hpt_frequency + 500) / 1000) / 1000,
-                       ((sh_hpt_frequency + 500) / 1000) % 1000);
+        if (unlikely(!sys_timer))
+                panic("System timer missing.\n");
 
+        printk(KERN_INFO "Using %s for system timer\n", sys_timer->name);
 }
diff --git a/arch/sh/kernel/timers/timer-mtu2.c b/arch/sh/kernel/timers/timer-mtu2.c
index c3d237e1d566..9a77ae86b403 100644
--- a/arch/sh/kernel/timers/timer-mtu2.c
+++ b/arch/sh/kernel/timers/timer-mtu2.c
@@ -35,7 +35,8 @@
 #define MTU2_TSR_1      0xfffe4385
 #define MTU2_TCNT_1     0xfffe4386      /* 16-bit counter */
 
-#if defined(CONFIG_CPU_SUBTYPE_SH7201)
+#if defined(CONFIG_CPU_SUBTYPE_SH7201) || \
+    defined(CONFIG_CPU_SUBTYPE_SH7203)
 #define MTU2_TGRA_1     0xfffe4388
 #else
 #define MTU2_TGRA_1     0xfffe438a
diff --git a/arch/sh/kernel/timers/timer-tmu.c b/arch/sh/kernel/timers/timer-tmu.c
index 0db3f9510336..10b5a6f17cc0 100644
--- a/arch/sh/kernel/timers/timer-tmu.c
+++ b/arch/sh/kernel/timers/timer-tmu.c
@@ -146,7 +146,14 @@ static irqreturn_t tmu_timer_interrupt(int irq, void *dummy)
         _tmu_clear_status(TMU0);
         _tmu_set_irq(TMU0,tmu0_clockevent.mode != CLOCK_EVT_MODE_ONESHOT);
 
-        evt->event_handler(evt);
+        switch (tmu0_clockevent.mode) {
+        case CLOCK_EVT_MODE_ONESHOT:
+        case CLOCK_EVT_MODE_PERIODIC:
+                evt->event_handler(evt);
+                break;
+        default:
+                break;
+        }
 
         return IRQ_HANDLED;
 }
@@ -237,6 +244,7 @@ static int tmu_timer_init(void)
     !defined(CONFIG_CPU_SUBTYPE_SH7721) && \
     !defined(CONFIG_CPU_SUBTYPE_SH7760) && \
     !defined(CONFIG_CPU_SUBTYPE_SH7785) && \
+    !defined(CONFIG_CPU_SUBTYPE_SH7786) && \
     !defined(CONFIG_CPU_SUBTYPE_SHX3)
         ctrl_outb(TMU_TOCR_INIT, TMU_TOCR);
 #endif
@@ -254,7 +262,14 @@ static int tmu_timer_init(void)
 
         _tmu_start(TMU1);
 
-        sh_hpt_frequency = clk_get_rate(&tmu1_clk);
+        clocksource_sh.rating = 200;
+        clocksource_sh.mask = CLOCKSOURCE_MASK(32);
+        clocksource_sh.read = tmu_timer_read;
+        clocksource_sh.shift = 10;
+        clocksource_sh.mult = clocksource_hz2mult(clk_get_rate(&tmu1_clk),
+                                                  clocksource_sh.shift);
+        clocksource_sh.flags = CLOCK_SOURCE_IS_CONTINUOUS;
+        clocksource_register(&clocksource_sh);
 
         tmu0_clockevent.mult = div_sc(frequency, NSEC_PER_SEC,
                                       tmu0_clockevent.shift);
@@ -264,6 +279,7 @@ static int tmu_timer_init(void)
                         clockevent_delta2ns(1, &tmu0_clockevent);
 
         tmu0_clockevent.cpumask = cpumask_of(0);
+        tmu0_clockevent.rating = 100;
 
         clockevents_register_device(&tmu0_clockevent);
 
@@ -274,7 +290,6 @@ static struct sys_timer_ops tmu_timer_ops = {
         .init           = tmu_timer_init,
         .start          = tmu_timer_start,
         .stop           = tmu_timer_stop,
-        .read           = tmu_timer_read,
 };
 
 struct sys_timer tmu_timer = {
diff --git a/arch/sh/kernel/vmlinux_32.lds.S b/arch/sh/kernel/vmlinux_32.lds.S
index 7b4b82bd1156..d0b2a715cd14 100644
--- a/arch/sh/kernel/vmlinux_32.lds.S
+++ b/arch/sh/kernel/vmlinux_32.lds.S
@@ -15,7 +15,10 @@ OUTPUT_ARCH(sh)
 ENTRY(_start)
 SECTIONS
 {
-#ifdef CONFIG_32BIT
+#ifdef CONFIG_PMB_FIXED
+        . = CONFIG_PAGE_OFFSET + (CONFIG_MEMORY_START & 0x1fffffff) +
+            CONFIG_ZERO_PAGE_OFFSET;
+#elif defined(CONFIG_32BIT)
         . = CONFIG_PAGE_OFFSET + CONFIG_ZERO_PAGE_OFFSET;
 #else
         . = CONFIG_PAGE_OFFSET + CONFIG_MEMORY_START + CONFIG_ZERO_PAGE_OFFSET;
diff --git a/arch/sh/mm/Kconfig b/arch/sh/mm/Kconfig
index 555ec9714b9e..10c24356d2d5 100644
--- a/arch/sh/mm/Kconfig
+++ b/arch/sh/mm/Kconfig
@@ -57,7 +57,7 @@ config 32BIT
         bool
         default y if CPU_SH5
 
-config PMB
+config PMB_ENABLE
         bool "Support 32-bit physical addressing through PMB"
         depends on MMU && EXPERIMENTAL && (CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7785)
         select 32BIT
@@ -67,6 +67,33 @@ config PMB
           32-bits through the SH-4A PMB. If this is not set, legacy
           29-bit physical addressing will be used.
 
+choice
+        prompt "PMB handling type"
+        depends on PMB_ENABLE
+        default PMB_FIXED
+
+config PMB
+        bool "PMB"
+        depends on MMU && EXPERIMENTAL && (CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7785)
+        select 32BIT
+        help
+          If you say Y here, physical addressing will be extended to
+          32-bits through the SH-4A PMB. If this is not set, legacy
+          29-bit physical addressing will be used.
+
+config PMB_FIXED
+        bool "fixed PMB"
+        depends on MMU && EXPERIMENTAL && (CPU_SUBTYPE_SH7780 || \
+                                           CPU_SUBTYPE_SH7785)
+        select 32BIT
+        help
+          If this option is enabled, fixed PMB mappings are inherited
+          from the boot loader, and the kernel does not attempt dynamic
+          management. This is the closest to legacy 29-bit physical mode,
+          and allows systems to support up to 512MiB of system memory.
+
+endchoice
+
 config X2TLB
         bool "Enable extended TLB mode"
         depends on (CPU_SHX2 || CPU_SHX3) && MMU && EXPERIMENTAL
diff --git a/arch/sh/mm/Makefile_32 b/arch/sh/mm/Makefile_32
index cb2f3f299591..986a1e055834 100644
--- a/arch/sh/mm/Makefile_32
+++ b/arch/sh/mm/Makefile_32
@@ -25,8 +25,10 @@ obj-$(CONFIG_CPU_SH4)	+= cache-debugfs.o
 endif
 
 ifdef CONFIG_MMU
-obj-$(CONFIG_CPU_SH3)   += tlb-sh3.o
-obj-$(CONFIG_CPU_SH4)   += tlb-sh4.o
+tlb-$(CONFIG_CPU_SH3)           := tlb-sh3.o
+tlb-$(CONFIG_CPU_SH4)           := tlb-sh4.o
+tlb-$(CONFIG_CPU_HAS_PTEAEX)    := tlb-pteaex.o
+obj-y                           += $(tlb-y)
 ifndef CONFIG_CACHE_OFF
 obj-$(CONFIG_CPU_SH4)           += pg-sh4.o
 obj-$(CONFIG_SH7705_CACHE_32KB) += pg-sh7705.o
@@ -35,6 +37,7 @@ endif
 
 obj-$(CONFIG_HUGETLB_PAGE)      += hugetlbpage.o
 obj-$(CONFIG_PMB)               += pmb.o
+obj-$(CONFIG_PMB_FIXED)         += pmb-fixed.o
 obj-$(CONFIG_NUMA)              += numa.o
 
 EXTRA_CFLAGS += -Werror
diff --git a/arch/sh/mm/asids-debugfs.c b/arch/sh/mm/asids-debugfs.c
index 8e912a15e94f..cd8c3bf39b5a 100644
--- a/arch/sh/mm/asids-debugfs.c
+++ b/arch/sh/mm/asids-debugfs.c
@@ -37,10 +37,8 @@ static int asids_seq_show(struct seq_file *file, void *iter)
                         continue;
 
                 if (p->mm)
-                        seq_printf(file, "%5d : %02lx\n", pid,
+                        seq_printf(file, "%5d : %04lx\n", pid,
                                    cpu_asid(smp_processor_id(), p->mm));
-                else
-                        seq_printf(file, "%5d : (none)\n", pid);
         }
 
         read_unlock(&tasklist_lock);
diff --git a/arch/sh/mm/ioremap_32.c b/arch/sh/mm/ioremap_32.c
index 32946fba123e..60cc486d2c2c 100644
--- a/arch/sh/mm/ioremap_32.c
+++ b/arch/sh/mm/ioremap_32.c
@@ -59,11 +59,13 @@ void __iomem *__ioremap(unsigned long phys_addr, unsigned long size,
         if (is_pci_memaddr(phys_addr) && is_pci_memaddr(last_addr))
                 return (void __iomem *)phys_addr;
 
+#if !defined(CONFIG_PMB_FIXED)
         /*
          * Don't allow anybody to remap normal RAM that we're using..
          */
         if (phys_addr < virt_to_phys(high_memory))
                 return NULL;
+#endif
 
         /*
          * Mappings have to be page-aligned
@@ -81,7 +83,7 @@ void __iomem *__ioremap(unsigned long phys_addr, unsigned long size,
         area->phys_addr = phys_addr;
         orig_addr = addr = (unsigned long)area->addr;
 
-#ifdef CONFIG_32BIT
+#ifdef CONFIG_PMB
         /*
          * First try to remap through the PMB once a valid VMA has been
          * established. Smaller allocations (or the rest of the size
@@ -119,10 +121,10 @@ void __iounmap(void __iomem *addr)
         unsigned long seg = PXSEG(vaddr);
         struct vm_struct *p;
 
-        if (seg < P3SEG || seg >= P3_ADDR_MAX || is_pci_memaddr(vaddr))
+        if (seg < P3SEG || vaddr >= P3_ADDR_MAX || is_pci_memaddr(vaddr))
                 return;
 
-#ifdef CONFIG_32BIT
+#ifdef CONFIG_PMB
         /*
          * Purge any PMB entries that may have been established for this
          * mapping, then proceed with conventional VMA teardown.
diff --git a/arch/sh/mm/pmb-fixed.c b/arch/sh/mm/pmb-fixed.c
new file mode 100644
index 000000000000..43c8eac4d8a1
--- /dev/null
+++ b/arch/sh/mm/pmb-fixed.c
@@ -0,0 +1,45 @@
+/*
+ * arch/sh/mm/fixed_pmb.c
+ *
+ * Copyright (C) 2009  Renesas Solutions Corp.
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#include <linux/init.h>
+#include <linux/mm.h>
+#include <linux/io.h>
+#include <asm/mmu.h>
+#include <asm/mmu_context.h>
+
+static int __uses_jump_to_uncached fixed_pmb_init(void)
+{
+        int i;
+        unsigned long addr, data;
+
+        jump_to_uncached();
+
+        for (i = 0; i < PMB_ENTRY_MAX; i++) {
+                addr = PMB_DATA + (i << PMB_E_SHIFT);
+                data = ctrl_inl(addr);
+                if (!(data & PMB_V))
+                        continue;
+
+                if (data & PMB_C) {
+#if defined(CONFIG_CACHE_WRITETHROUGH)
+                        data |= PMB_WT;
+#elif defined(CONFIG_CACHE_WRITEBACK)
+                        data &= ~PMB_WT;
+#else
+                        data &= ~(PMB_C | PMB_WT);
+#endif
+                }
+                ctrl_outl(data, addr);
+        }
+
+        back_to_cached();
+
+        return 0;
+}
+arch_initcall(fixed_pmb_init);
diff --git a/arch/sh/mm/pmb.c b/arch/sh/mm/pmb.c
index 84241676265e..b1a714a92b14 100644
--- a/arch/sh/mm/pmb.c
+++ b/arch/sh/mm/pmb.c
@@ -15,6 +15,8 @@
  */
 #include <linux/init.h>
 #include <linux/kernel.h>
+#include <linux/sysdev.h>
+#include <linux/cpu.h>
 #include <linux/module.h>
 #include <linux/slab.h>
 #include <linux/bitops.h>
@@ -402,3 +404,39 @@ static int __init pmb_debugfs_init(void)
         return 0;
 }
 postcore_initcall(pmb_debugfs_init);
+
+#ifdef CONFIG_PM
+static int pmb_sysdev_suspend(struct sys_device *dev, pm_message_t state)
+{
+        static pm_message_t prev_state;
+
+        /* Restore the PMB after a resume from hibernation */
+        if (state.event == PM_EVENT_ON &&
+            prev_state.event == PM_EVENT_FREEZE) {
+                struct pmb_entry *pmbe;
+                spin_lock_irq(&pmb_list_lock);
+                for (pmbe = pmb_list; pmbe; pmbe = pmbe->next)
+                        set_pmb_entry(pmbe);
+                spin_unlock_irq(&pmb_list_lock);
+        }
+        prev_state = state;
+        return 0;
+}
+
+static int pmb_sysdev_resume(struct sys_device *dev)
+{
+        return pmb_sysdev_suspend(dev, PMSG_ON);
+}
+
+static struct sysdev_driver pmb_sysdev_driver = {
+        .suspend = pmb_sysdev_suspend,
+        .resume = pmb_sysdev_resume,
+};
+
+static int __init pmb_sysdev_init(void)
+{
+        return sysdev_driver_register(&cpu_sysdev_class, &pmb_sysdev_driver);
+}
+
+subsys_initcall(pmb_sysdev_init);
+#endif
diff --git a/arch/sh/mm/tlb-pteaex.c b/arch/sh/mm/tlb-pteaex.c
new file mode 100644
index 000000000000..2aab3ea934d7
--- /dev/null
+++ b/arch/sh/mm/tlb-pteaex.c
@@ -0,0 +1,96 @@
+/*
+ * arch/sh/mm/tlb-pteaex.c
+ *
+ * TLB operations for SH-X3 CPUs featuring PTE ASID Extensions.
+ *
+ * Copyright (C) 2009 Paul Mundt
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#include <linux/kernel.h>
+#include <linux/mm.h>
+#include <linux/io.h>
+#include <asm/system.h>
+#include <asm/mmu_context.h>
+#include <asm/cacheflush.h>
+
+void update_mmu_cache(struct vm_area_struct * vma,
+                      unsigned long address, pte_t pte)
+{
+        unsigned long flags;
+        unsigned long pteval;
+        unsigned long vpn;
+
+        /* Ptrace may call this routine. */
+        if (vma && current->active_mm != vma->vm_mm)
+                return;
+
+#ifndef CONFIG_CACHE_OFF
+        {
+                unsigned long pfn = pte_pfn(pte);
+
+                if (pfn_valid(pfn)) {
+                        struct page *page = pfn_to_page(pfn);
+
+                        if (!test_bit(PG_mapped, &page->flags)) {
+                                unsigned long phys = pte_val(pte) & PTE_PHYS_MASK;
+                                __flush_wback_region((void *)P1SEGADDR(phys),
+                                                     PAGE_SIZE);
+                                __set_bit(PG_mapped, &page->flags);
+                        }
+                }
+        }
+#endif
+
+        local_irq_save(flags);
+
+        /* Set PTEH register */
+        vpn = address & MMU_VPN_MASK;
+        __raw_writel(vpn, MMU_PTEH);
+
+        /* Set PTEAEX */
+        __raw_writel(get_asid(), MMU_PTEAEX);
+
+        pteval = pte.pte_low;
+
+        /* Set PTEA register */
+#ifdef CONFIG_X2TLB
+        /*
+         * For the extended mode TLB this is trivial, only the ESZ and
+         * EPR bits need to be written out to PTEA, with the remainder of
+         * the protection bits (with the exception of the compat-mode SZ
+         * and PR bits, which are cleared) being written out in PTEL.
+         */
+        __raw_writel(pte.pte_high, MMU_PTEA);
+#endif
+
+        /* Set PTEL register */
+        pteval &= _PAGE_FLAGS_HARDWARE_MASK; /* drop software flags */
+#ifdef CONFIG_CACHE_WRITETHROUGH
+        pteval |= _PAGE_WT;
+#endif
+        /* conveniently, we want all the software flags to be 0 anyway */
+        __raw_writel(pteval, MMU_PTEL);
+
+        /* Load the TLB */
+        asm volatile("ldtlb": /* no output */ : /* no input */ : "memory");
+        local_irq_restore(flags);
+}
+
+/*
+ * While SH-X2 extended TLB mode splits out the memory-mapped I/UTLB
+ * data arrays, SH-X3 cores with PTEAEX split out the memory-mapped
+ * address arrays. In compat mode the second array is inaccessible, while
+ * in extended mode, the legacy 8-bit ASID field in address array 1 has
+ * undefined behaviour.
+ */
+void __uses_jump_to_uncached local_flush_tlb_one(unsigned long asid,
+                                                 unsigned long page)
+{
+        jump_to_uncached();
+        __raw_writel(page, MMU_UTLB_ADDRESS_ARRAY | MMU_PAGE_ASSOC_BIT);
+        __raw_writel(asid, MMU_UTLB_ADDRESS_ARRAY2 | MMU_PAGE_ASSOC_BIT);
+        back_to_cached();
+}
diff --git a/arch/sh/oprofile/common.c b/arch/sh/oprofile/common.c
index 1d97d64cb95f..1b9d4304b3bf 100644
--- a/arch/sh/oprofile/common.c
+++ b/arch/sh/oprofile/common.c
@@ -107,6 +107,7 @@ int __init oprofile_arch_init(struct oprofile_operations *ops)
         case CPU_SH7780:
         case CPU_SH7781:
         case CPU_SH7785:
+        case CPU_SH7786:
         case CPU_SH7723:
         case CPU_SHX3:
                 lmodel = &op_model_sh4a_ops;
diff --git a/arch/sh/tools/mach-types b/arch/sh/tools/mach-types
index 284b7e867496..8477b5d884fd 100644
--- a/arch/sh/tools/mach-types
+++ b/arch/sh/tools/mach-types
@@ -52,3 +52,6 @@ RSK7203			SH_RSK7203
 AP325RXA                SH_AP325RXA
 SH7763RDP               SH_SH7763RDP
 SH7785LCR               SH_SH7785LCR
+URQUELL                 SH_URQUELL
+ESPT                    SH_ESPT
+POLARIS                 SH_POLARIS
diff --git a/arch/sparc/include/asm/pil.h b/arch/sparc/include/asm/pil.h
index 32a7efe76d00..266937030546 100644
--- a/arch/sparc/include/asm/pil.h
+++ b/arch/sparc/include/asm/pil.h
@@ -24,6 +24,7 @@
 #define PIL_DEVICE_IRQ          5
 #define PIL_SMP_CALL_FUNC_SNGL  6
 #define PIL_DEFERRED_PCR_WORK   7
+#define PIL_KGDB_CAPTURE        8
 #define PIL_NORMAL_MAX          14
 #define PIL_NMI                 15
 
diff --git a/arch/sparc/include/asm/socket.h b/arch/sparc/include/asm/socket.h
index bf50d0c2d583..982a12f959f4 100644
--- a/arch/sparc/include/asm/socket.h
+++ b/arch/sparc/include/asm/socket.h
@@ -50,6 +50,9 @@
 
 #define SO_MARK                 0x0022
 
+#define SO_TIMESTAMPING         0x0023
+#define SCM_TIMESTAMPING        SO_TIMESTAMPING
+
 /* Security levels - as per NRL IPv6 - don't actually do anything */
 #define SO_SECURITY_AUTHENTICATION              0x5001
 #define SO_SECURITY_ENCRYPTION_TRANSPORT        0x5002
diff --git a/arch/sparc/include/asm/tlb_64.h b/arch/sparc/include/asm/tlb_64.h
index ec81cdedef2c..ee38e731bfa6 100644
--- a/arch/sparc/include/asm/tlb_64.h
+++ b/arch/sparc/include/asm/tlb_64.h
@@ -57,6 +57,8 @@ static inline struct mmu_gather *tlb_gather_mmu(struct mm_struct *mm, unsigned i
 
 static inline void tlb_flush_mmu(struct mmu_gather *mp)
 {
+        if (!mp->fullmm)
+                flush_tlb_pending();
         if (mp->need_flush) {
                 free_pages_and_swap_cache(mp->pages, mp->pages_nr);
                 mp->pages_nr = 0;
@@ -78,8 +80,6 @@ static inline void tlb_finish_mmu(struct mmu_gather *mp, unsigned long start, un
 
         if (mp->fullmm)
                 mp->fullmm = 0;
-        else
-                flush_tlb_pending();
 
         /* keep the page table cache within bounds */
         check_pgt_cache();
diff --git a/arch/sparc/kernel/irq_64.c b/arch/sparc/kernel/irq_64.c
index 1c378d8e90c5..d0d6a515499a 100644
--- a/arch/sparc/kernel/irq_64.c
+++ b/arch/sparc/kernel/irq_64.c
@@ -185,7 +185,7 @@ int show_interrupts(struct seq_file *p, void *v)
                 seq_printf(p, "%10u ", kstat_irqs(i));
 #else
                 for_each_online_cpu(j)
-                        seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
+                        seq_printf(p, "%10u ", kstat_irqs_cpu(i, j));
 #endif
                 seq_printf(p, " %9s", irq_desc[i].chip->typename);
                 seq_printf(p, "  %s", action->name);
@@ -252,9 +252,10 @@ struct irq_handler_data {
 #ifdef CONFIG_SMP
 static int irq_choose_cpu(unsigned int virt_irq)
 {
-        cpumask_t mask = irq_desc[virt_irq].affinity;
+        cpumask_t mask;
         int cpuid;
 
+        cpumask_copy(&mask, irq_desc[virt_irq].affinity);
         if (cpus_equal(mask, CPU_MASK_ALL)) {
                 static int irq_rover;
                 static DEFINE_SPINLOCK(irq_rover_lock);
@@ -805,7 +806,7 @@ void fixup_irqs(void)
                     !(irq_desc[irq].status & IRQ_PER_CPU)) {
                         if (irq_desc[irq].chip->set_affinity)
                                 irq_desc[irq].chip->set_affinity(irq,
-                                        &irq_desc[irq].affinity);
+                                        irq_desc[irq].affinity);
                 }
                 spin_unlock_irqrestore(&irq_desc[irq].lock, flags);
         }
diff --git a/arch/sparc/kernel/kgdb_64.c b/arch/sparc/kernel/kgdb_64.c
index fefbe6dc51be..f5a0fd490b59 100644
--- a/arch/sparc/kernel/kgdb_64.c
+++ b/arch/sparc/kernel/kgdb_64.c
@@ -108,7 +108,7 @@ void gdb_regs_to_pt_regs(unsigned long *gdb_regs, struct pt_regs *regs)
 }
 
 #ifdef CONFIG_SMP
-void smp_kgdb_capture_client(struct pt_regs *regs)
+void smp_kgdb_capture_client(int irq, struct pt_regs *regs)
 {
         unsigned long flags;
 
diff --git a/arch/sparc/kernel/pci_common.c b/arch/sparc/kernel/pci_common.c
index 64e6edf17b9d..b775658a927d 100644
--- a/arch/sparc/kernel/pci_common.c
+++ b/arch/sparc/kernel/pci_common.c
@@ -368,7 +368,7 @@ static void pci_register_iommu_region(struct pci_pbm_info *pbm)
         const u32 *vdma = of_get_property(pbm->op->node, "virtual-dma", NULL);
 
         if (vdma) {
-                struct resource *rp = kmalloc(sizeof(*rp), GFP_KERNEL);
+                struct resource *rp = kzalloc(sizeof(*rp), GFP_KERNEL);
 
                 if (!rp) {
                         prom_printf("Cannot allocate IOMMU resource.\n");
diff --git a/arch/sparc/kernel/smp_64.c b/arch/sparc/kernel/smp_64.c
index 6cd1a5b65067..79457f682b5a 100644
--- a/arch/sparc/kernel/smp_64.c
+++ b/arch/sparc/kernel/smp_64.c
@@ -1031,7 +1031,7 @@ void smp_fetch_global_regs(void)
  *    If the address space is non-shared (ie. mm->count == 1) we avoid
  *    cross calls when we want to flush the currently running process's
  *    tlb state.  This is done by clearing all cpu bits except the current
- *    processor's in current->active_mm->cpu_vm_mask and performing the
+ *    processor's in current->mm->cpu_vm_mask and performing the
  *    flush locally only.  This will force any subsequent cpus which run
  *    this task to flush the context from the local tlb if the process
  *    migrates to another cpu (again).
@@ -1074,7 +1074,7 @@ void smp_flush_tlb_pending(struct mm_struct *mm, unsigned long nr, unsigned long
         u32 ctx = CTX_HWBITS(mm->context);
         int cpu = get_cpu();
 
-        if (mm == current->active_mm && atomic_read(&mm->mm_users) == 1)
+        if (mm == current->mm && atomic_read(&mm->mm_users) == 1)
                 mm->cpu_vm_mask = cpumask_of_cpu(cpu);
         else
                 smp_cross_call_masked(&xcall_flush_tlb_pending,
diff --git a/arch/sparc/kernel/systbls_64.S b/arch/sparc/kernel/systbls_64.S
index f93c42a2b522..a8000b1cda74 100644
--- a/arch/sparc/kernel/systbls_64.S
+++ b/arch/sparc/kernel/systbls_64.S
@@ -51,7 +51,7 @@ sys_call_table32:
 /*150*/ .word sys_nis_syscall, sys_inotify_init, sys_inotify_add_watch, sys_poll, sys_getdents64
         .word compat_sys_fcntl64, sys_inotify_rm_watch, compat_sys_statfs, compat_sys_fstatfs, sys_oldumount
 /*160*/ .word compat_sys_sched_setaffinity, compat_sys_sched_getaffinity, sys32_getdomainname, sys32_setdomainname, sys_nis_syscall
-        .word sys_quotactl, sys_set_tid_address, compat_sys_mount, sys_ustat, sys32_setxattr
+        .word sys_quotactl, sys_set_tid_address, compat_sys_mount, compat_sys_ustat, sys32_setxattr
 /*170*/ .word sys32_lsetxattr, sys32_fsetxattr, sys_getxattr, sys_lgetxattr, compat_sys_getdents
         .word sys_setsid, sys_fchdir, sys32_fgetxattr, sys_listxattr, sys_llistxattr
 /*180*/ .word sys32_flistxattr, sys_removexattr, sys_lremovexattr, compat_sys_sigpending, sys_ni_syscall
diff --git a/arch/sparc/kernel/time_64.c b/arch/sparc/kernel/time_64.c
index 2db3c2229b95..db310aa00183 100644
--- a/arch/sparc/kernel/time_64.c
+++ b/arch/sparc/kernel/time_64.c
@@ -729,7 +729,7 @@ void timer_interrupt(int irq, struct pt_regs *regs)
 
         irq_enter();
 
-        kstat_this_cpu.irqs[0]++;
+        kstat_incr_irqs_this_cpu(0, irq_to_desc(0));
 
         if (unlikely(!evt->event_handler)) {
                 printk(KERN_WARNING
diff --git a/arch/sparc/kernel/ttable.S b/arch/sparc/kernel/ttable.S
index d9bdfb9d5c18..76d837fc47d3 100644
--- a/arch/sparc/kernel/ttable.S
+++ b/arch/sparc/kernel/ttable.S
@@ -64,7 +64,12 @@ tl0_irq6:	TRAP_IRQ(smp_call_function_single_client, 6)
 tl0_irq6:       BTRAP(0x46)
 #endif
 tl0_irq7:       TRAP_IRQ(deferred_pcr_work_irq, 7)
-tl0_irq8:       BTRAP(0x48) BTRAP(0x49)
+#ifdef CONFIG_KGDB
+tl0_irq8:       TRAP_IRQ(smp_kgdb_capture_client, 8)
+#else
+tl0_irq8:       BTRAP(0x48)
+#endif
+tl0_irq9:       BTRAP(0x49)
 tl0_irq10:      BTRAP(0x4a) BTRAP(0x4b) BTRAP(0x4c) BTRAP(0x4d)
 tl0_irq14:      TRAP_IRQ(timer_interrupt, 14)
 tl0_irq15:      TRAP_NMI_IRQ(perfctr_irq, 15)
diff --git a/arch/sparc/mm/ultra.S b/arch/sparc/mm/ultra.S
index 80c788ec7c32..b57a5942ba64 100644
--- a/arch/sparc/mm/ultra.S
+++ b/arch/sparc/mm/ultra.S
@@ -679,28 +679,8 @@ xcall_new_mmu_context_version:
 #ifdef CONFIG_KGDB
         .globl          xcall_kgdb_capture
 xcall_kgdb_capture:
-661:    rdpr            %pstate, %g2
-        wrpr            %g2, PSTATE_IG | PSTATE_AG, %pstate
-        .section        .sun4v_2insn_patch, "ax"
-        .word           661b
-        nop
-        nop
-        .previous
-
-        rdpr            %pil, %g2
-        wrpr            %g0, PIL_NORMAL_MAX, %pil
-        sethi           %hi(109f), %g7
-        ba,pt           %xcc, etrap_irq
-109:     or             %g7, %lo(109b), %g7
-#ifdef CONFIG_TRACE_IRQFLAGS
-        call            trace_hardirqs_off
-         nop
-#endif
-        call            smp_kgdb_capture_client
-         add            %sp, PTREGS_OFF, %o0
-        /* Has to be a non-v9 branch due to the large distance. */
-        ba              rtrap_xcall
-         ldx            [%sp + PTREGS_OFF + PT_V9_TSTATE], %l1
+        wr              %g0, (1 << PIL_KGDB_CAPTURE), %set_softint
+        retry
 #endif
 
 #endif /* CONFIG_SMP */
diff --git a/arch/um/drivers/net_kern.c b/arch/um/drivers/net_kern.c
index fde510b664d3..434224e2229f 100644
--- a/arch/um/drivers/net_kern.c
+++ b/arch/um/drivers/net_kern.c
@@ -86,7 +86,7 @@ static int uml_net_rx(struct net_device *dev)
                 drop_skb->dev = dev;
                 /* Read a packet into drop_skb and don't do anything with it. */
                 (*lp->read)(lp->fd, drop_skb, lp);
-                lp->stats.rx_dropped++;
+                dev->stats.rx_dropped++;
                 return 0;
         }
 
@@ -99,8 +99,8 @@ static int uml_net_rx(struct net_device *dev)
                 skb_trim(skb, pkt_len);
                 skb->protocol = (*lp->protocol)(skb);
 
-                lp->stats.rx_bytes += skb->len;
-                lp->stats.rx_packets++;
+                dev->stats.rx_bytes += skb->len;
+                dev->stats.rx_packets++;
                 netif_rx(skb);
                 return pkt_len;
         }
@@ -224,8 +224,8 @@ static int uml_net_start_xmit(struct sk_buff *skb, struct net_device *dev)
         len = (*lp->write)(lp->fd, skb, lp);
 
         if (len == skb->len) {
-                lp->stats.tx_packets++;
-                lp->stats.tx_bytes += skb->len;
+                dev->stats.tx_packets++;
+                dev->stats.tx_bytes += skb->len;
                 dev->trans_start = jiffies;
                 netif_start_queue(dev);
 
@@ -234,7 +234,7 @@ static int uml_net_start_xmit(struct sk_buff *skb, struct net_device *dev)
         }
         else if (len == 0) {
                 netif_start_queue(dev);
-                lp->stats.tx_dropped++;
+                dev->stats.tx_dropped++;
         }
         else {
                 netif_start_queue(dev);
@@ -248,12 +248,6 @@ static int uml_net_start_xmit(struct sk_buff *skb, struct net_device *dev)
         return 0;
 }
 
-static struct net_device_stats *uml_net_get_stats(struct net_device *dev)
-{
-        struct uml_net_private *lp = netdev_priv(dev);
-        return &lp->stats;
-}
-
 static void uml_net_set_multicast_list(struct net_device *dev)
 {
         return;
@@ -377,6 +371,18 @@ static void net_device_release(struct device *dev)
         free_netdev(netdev);
 }
 
+static const struct net_device_ops uml_netdev_ops = {
+        .ndo_open               = uml_net_open,
+        .ndo_stop               = uml_net_close,
+        .ndo_start_xmit         = uml_net_start_xmit,
+        .ndo_set_multicast_list = uml_net_set_multicast_list,
+        .ndo_tx_timeout         = uml_net_tx_timeout,
+        .ndo_set_mac_address    = uml_net_set_mac,
+        .ndo_change_mtu         = uml_net_change_mtu,
+        .ndo_set_mac_address    = eth_mac_addr,
+        .ndo_validate_addr      = eth_validate_addr,
+};
+
 /*
  * Ensures that platform_driver_register is called only once by
  * eth_configure.  Will be set in an initcall.
@@ -473,14 +479,7 @@ static void eth_configure(int n, void *init, char *mac,
 
         set_ether_mac(dev, device->mac);
         dev->mtu = transport->user->mtu;
-        dev->open = uml_net_open;
-        dev->hard_start_xmit = uml_net_start_xmit;
-        dev->stop = uml_net_close;
-        dev->get_stats = uml_net_get_stats;
-        dev->set_multicast_list = uml_net_set_multicast_list;
-        dev->tx_timeout = uml_net_tx_timeout;
-        dev->set_mac_address = uml_net_set_mac;
-        dev->change_mtu = uml_net_change_mtu;
+        dev->netdev_ops = &uml_netdev_ops;
         dev->ethtool_ops = &uml_net_ethtool_ops;
         dev->watchdog_timeo = (HZ >> 1);
         dev->irq = UM_ETH_IRQ;
diff --git a/arch/um/include/shared/net_kern.h b/arch/um/include/shared/net_kern.h
index d843c7924a7c..5c367f22595b 100644
--- a/arch/um/include/shared/net_kern.h
+++ b/arch/um/include/shared/net_kern.h
@@ -26,7 +26,7 @@ struct uml_net_private {
         spinlock_t lock;
         struct net_device *dev;
         struct timer_list tl;
-        struct net_device_stats stats;
+
         struct work_struct work;
         int fd;
         unsigned char mac[ETH_ALEN];
diff --git a/arch/um/kernel/irq.c b/arch/um/kernel/irq.c
index 3d7aad09b171..336b61569072 100644
--- a/arch/um/kernel/irq.c
+++ b/arch/um/kernel/irq.c
@@ -42,7 +42,7 @@ int show_interrupts(struct seq_file *p, void *v)
                 seq_printf(p, "%10u ", kstat_irqs(i));
 #else
                 for_each_online_cpu(j)
-                        seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
+                        seq_printf(p, "%10u ", kstat_irqs_cpu(i, j));
 #endif
                 seq_printf(p, " %14s", irq_desc[i].chip->typename);
                 seq_printf(p, "  %s", action->name);
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index f2cb677b263f..c9012b95da6c 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -5,7 +5,7 @@ mainmenu "Linux Kernel Configuration for x86"
 config 64BIT
         bool "64-bit kernel" if ARCH = "x86"
         default ARCH = "x86_64"
-        help
+        ---help---
           Say yes to build a 64-bit kernel - formerly known as x86_64
           Say no to build a 32-bit kernel - formerly known as i386
 
@@ -34,13 +34,16 @@ config X86
         select HAVE_FUNCTION_TRACER
         select HAVE_FUNCTION_GRAPH_TRACER
         select HAVE_FUNCTION_TRACE_MCOUNT_TEST
-        select HAVE_KVM if ((X86_32 && !X86_VOYAGER && !X86_VISWS && !X86_NUMAQ) || X86_64)
-        select HAVE_ARCH_KGDB if !X86_VOYAGER
+        select HAVE_KVM
+        select HAVE_ARCH_KGDB
         select HAVE_ARCH_TRACEHOOK
         select HAVE_GENERIC_DMA_COHERENT if X86_32
         select HAVE_EFFICIENT_UNALIGNED_ACCESS
         select USER_STACKTRACE_SUPPORT
         select HAVE_DMA_API_DEBUG
+        select HAVE_KERNEL_GZIP
+        select HAVE_KERNEL_BZIP2
+        select HAVE_KERNEL_LZMA
 
 config ARCH_DEFCONFIG
         string
@@ -134,18 +137,19 @@ config ARCH_HAS_CACHE_LINE_SIZE
         def_bool y
 
 config HAVE_SETUP_PER_CPU_AREA
-        def_bool X86_64_SMP || (X86_SMP && !X86_VOYAGER)
+        def_bool y
+
+config HAVE_DYNAMIC_PER_CPU_AREA
+        def_bool y
 
 config HAVE_CPUMASK_OF_CPU_MAP
         def_bool X86_64_SMP
 
 config ARCH_HIBERNATION_POSSIBLE
         def_bool y
-        depends on !SMP || !X86_VOYAGER
 
 config ARCH_SUSPEND_POSSIBLE
         def_bool y
-        depends on !X86_VOYAGER
 
 config ZONE_DMA32
         bool
@@ -166,6 +170,9 @@ config GENERIC_HARDIRQS
         bool
         default y
 
+config GENERIC_HARDIRQS_NO__DO_IRQ
+       def_bool y
+
 config GENERIC_IRQ_PROBE
         bool
         default y
@@ -175,11 +182,6 @@ config GENERIC_PENDING_IRQ
         depends on GENERIC_HARDIRQS && SMP
         default y
 
-config X86_SMP
-        bool
-        depends on SMP && ((X86_32 && !X86_VOYAGER) || X86_64)
-        default y
-
 config USE_GENERIC_SMP_HELPERS
         def_bool y
         depends on SMP
@@ -195,19 +197,17 @@ config X86_64_SMP
 config X86_HT
         bool
         depends on SMP
-        depends on (X86_32 && !X86_VOYAGER) || X86_64
-        default y
-
-config X86_BIOS_REBOOT
-        bool
-        depends on !X86_VOYAGER
         default y
 
 config X86_TRAMPOLINE
         bool
-        depends on X86_SMP || (X86_VOYAGER && SMP) || (64BIT && ACPI_SLEEP)
+        depends on SMP || (64BIT && ACPI_SLEEP)
         default y
 
+config X86_32_LAZY_GS
+        def_bool y
+        depends on X86_32 && !CC_STACKPROTECTOR
+
 config KTIME_SCALAR
         def_bool X86_32
 source "init/Kconfig"
@@ -245,14 +245,24 @@ config SMP
 
           If you don't know what to do here, say N.
 
-config X86_HAS_BOOT_CPU_ID
-        def_bool y
-        depends on X86_VOYAGER
+config X86_X2APIC
+        bool "Support x2apic"
+        depends on X86_LOCAL_APIC && X86_64
+        ---help---
+          This enables x2apic support on CPUs that have this feature.
+
+          This allows 32-bit apic IDs (so it can support very large systems),
+          and accesses the local apic via MSRs not via mmio.
+
+          ( On certain CPU models you may need to enable INTR_REMAP too,
+            to get functional x2apic mode. )
+
+          If you don't know what to do here, say N.
 
 config SPARSE_IRQ
         bool "Support sparse irq numbering"
         depends on PCI_MSI || HT_IRQ
-        help
+        ---help---
           This enables support for sparse irqs. This is useful for distro
           kernels that want to define a high CONFIG_NR_CPUS value but still
           want to have low kernel memory footprint on smaller machines.
@@ -266,114 +276,140 @@ config NUMA_MIGRATE_IRQ_DESC
         bool "Move irq desc when changing irq smp_affinity"
         depends on SPARSE_IRQ && NUMA
         default n
-        help
+        ---help---
           This enables moving irq_desc to cpu/node that irq will use handled.
 
           If you don't know what to do here, say N.
 
-config X86_FIND_SMP_CONFIG
-        def_bool y
-        depends on X86_MPPARSE || X86_VOYAGER
-
 config X86_MPPARSE
         bool "Enable MPS table" if ACPI
         default y
         depends on X86_LOCAL_APIC
-        help
+        ---help---
           For old smp systems that do not have proper acpi support. Newer systems
           (esp with 64bit cpus) with acpi support, MADT and DSDT will override it
 
-choice
-        prompt "Subarchitecture Type"
-        default X86_PC
+config X86_BIGSMP
+        bool "Support for big SMP systems with more than 8 CPUs"
+        depends on X86_32 && SMP
+        ---help---
+          This option is needed for the systems that have more than 8 CPUs
 
-config X86_PC
-        bool "PC-compatible"
-        help
-          Choose this option if your computer is a standard PC or compatible.
+if X86_32
+config X86_EXTENDED_PLATFORM
+        bool "Support for extended (non-PC) x86 platforms"
+        default y
+        ---help---
+          If you disable this option then the kernel will only support
+          standard PC platforms. (which covers the vast majority of
+          systems out there.)
+
+          If you enable this option then you'll be able to select support
+          for the following (non-PC) 32 bit x86 platforms:
+                AMD Elan
+                NUMAQ (IBM/Sequent)
+                RDC R-321x SoC
+                SGI 320/540 (Visual Workstation)
+                Summit/EXA (IBM x440)
+                Unisys ES7000 IA32 series
+
+          If you have one of these systems, or if you want to build a
+          generic distribution kernel, say Y here - otherwise say N.
+endif
+
+if X86_64
+config X86_EXTENDED_PLATFORM
+        bool "Support for extended (non-PC) x86 platforms"
+        default y
+        ---help---
+          If you disable this option then the kernel will only support
+          standard PC platforms. (which covers the vast majority of
+          systems out there.)
+
+          If you enable this option then you'll be able to select support
+          for the following (non-PC) 64 bit x86 platforms:
+                ScaleMP vSMP
+                SGI Ultraviolet
+
+          If you have one of these systems, or if you want to build a
+          generic distribution kernel, say Y here - otherwise say N.
+endif
+# This is an alphabetically sorted list of 64 bit extended platforms
+# Please maintain the alphabetic order if and when there are additions
+
+config X86_VSMP
+        bool "ScaleMP vSMP"
+        select PARAVIRT
+        depends on X86_64 && PCI
+        depends on X86_EXTENDED_PLATFORM
+        ---help---
+          Support for ScaleMP vSMP systems.  Say 'Y' here if this kernel is
+          supposed to run on these EM64T-based machines.  Only choose this option
+          if you have one of these machines.
+
+config X86_UV
+        bool "SGI Ultraviolet"
+        depends on X86_64
+        depends on X86_EXTENDED_PLATFORM
+        select X86_X2APIC
+        ---help---
+          This option is needed in order to support SGI Ultraviolet systems.
+          If you don't have one of these, you should say N here.
+
+# Following is an alphabetically sorted list of 32 bit extended platforms
+# Please maintain the alphabetic order if and when there are additions
 
 config X86_ELAN
         bool "AMD Elan"
         depends on X86_32
-        help
+        depends on X86_EXTENDED_PLATFORM
+        ---help---
           Select this for an AMD Elan processor.
 
           Do not use this option for K6/Athlon/Opteron processors!
 
           If unsure, choose "PC-compatible" instead.
 
-config X86_VOYAGER
-        bool "Voyager (NCR)"
-        depends on X86_32 && (SMP || BROKEN) && !PCI
-        help
-          Voyager is an MCA-based 32-way capable SMP architecture proprietary
-          to NCR Corp.  Machine classes 345x/35xx/4100/51xx are Voyager-based.
-
-          *** WARNING ***
-
-          If you do not specifically know you have a Voyager based machine,
-          say N here, otherwise the kernel you build will not be bootable.
-
-config X86_GENERICARCH
-       bool "Generic architecture"
+config X86_RDC321X
+        bool "RDC R-321x SoC"
         depends on X86_32
-       help
-          This option compiles in the NUMAQ, Summit, bigsmp, ES7000, default
+        depends on X86_EXTENDED_PLATFORM
+        select M486
+        select X86_REBOOTFIXUPS
+        ---help---
+          This option is needed for RDC R-321x system-on-chip, also known
+          as R-8610-(G).
+          If you don't have one of these chips, you should say N here.
+
+config X86_32_NON_STANDARD
+        bool "Support non-standard 32-bit SMP architectures"
+        depends on X86_32 && SMP
+        depends on X86_EXTENDED_PLATFORM
+        ---help---
+          This option compiles in the NUMAQ, Summit, bigsmp, ES7000, default
           subarchitectures.  It is intended for a generic binary kernel.
           if you select them all, kernel will probe it one by one. and will
           fallback to default.
 
-if X86_GENERICARCH
+# Alphabetically sorted list of Non standard 32 bit platforms
 
 config X86_NUMAQ
         bool "NUMAQ (IBM/Sequent)"
-        depends on SMP && X86_32 && PCI && X86_MPPARSE
+        depends on X86_32_NON_STANDARD
         select NUMA
-        help
+        select X86_MPPARSE
+        ---help---
           This option is used for getting Linux to run on a NUMAQ (IBM/Sequent)
           NUMA multiquad box. This changes the way that processors are
           bootstrapped, and uses Clustered Logical APIC addressing mode instead
           of Flat Logical.  You will need a new lynxer.elf file to flash your
           firmware with - send email to <Martin.Bligh@us.ibm.com>.
 
-config X86_SUMMIT
-        bool "Summit/EXA (IBM x440)"
-        depends on X86_32 && SMP
-        help
-          This option is needed for IBM systems that use the Summit/EXA chipset.
-          In particular, it is needed for the x440.
-
-config X86_ES7000
-        bool "Support for Unisys ES7000 IA32 series"
-        depends on X86_32 && SMP
-        help
-          Support for Unisys ES7000 systems.  Say 'Y' here if this kernel is
-          supposed to run on an IA32-based Unisys ES7000 system.
-
-config X86_BIGSMP
-        bool "Support for big SMP systems with more than 8 CPUs"
-        depends on X86_32 && SMP
-        help
-          This option is needed for the systems that have more than 8 CPUs
-          and if the system is not of any sub-arch type above.
-
-endif
-
-config X86_VSMP
-        bool "Support for ScaleMP vSMP"
-        select PARAVIRT
-        depends on X86_64 && PCI
-        help
-          Support for ScaleMP vSMP systems.  Say 'Y' here if this kernel is
-          supposed to run on these EM64T-based machines.  Only choose this option
-          if you have one of these machines.
-
-endchoice
-
 config X86_VISWS
         bool "SGI 320/540 (Visual Workstation)"
-        depends on X86_32 && PCI && !X86_VOYAGER && X86_MPPARSE && PCI_GODIRECT
-        help
+        depends on X86_32 && PCI && X86_MPPARSE && PCI_GODIRECT
+        depends on X86_32_NON_STANDARD
+        ---help---
           The SGI Visual Workstation series is an IA32-based workstation
           based on SGI systems chips with some legacy PC hardware attached.
 
@@ -382,21 +418,25 @@ config X86_VISWS
           A kernel compiled for the Visual Workstation will run on general
           PCs as well. See <file:Documentation/sgi-visws.txt> for details.
 
-config X86_RDC321X
-        bool "RDC R-321x SoC"
-        depends on X86_32
-        select M486
-        select X86_REBOOTFIXUPS
-        help
-          This option is needed for RDC R-321x system-on-chip, also known
-          as R-8610-(G).
-          If you don't have one of these chips, you should say N here.
+config X86_SUMMIT
+        bool "Summit/EXA (IBM x440)"
+        depends on X86_32_NON_STANDARD
+        ---help---
+          This option is needed for IBM systems that use the Summit/EXA chipset.
+          In particular, it is needed for the x440.
+
+config X86_ES7000
+        bool "Unisys ES7000 IA32 series"
+        depends on X86_32_NON_STANDARD && X86_BIGSMP
+        ---help---
+          Support for Unisys ES7000 systems.  Say 'Y' here if this kernel is
+          supposed to run on an IA32-based Unisys ES7000 system.
 
 config SCHED_OMIT_FRAME_POINTER
         def_bool y
         prompt "Single-depth WCHAN output"
         depends on X86
-        help
+        ---help---
           Calculate simpler /proc/<PID>/wchan values. If this option
           is disabled then wchan values will recurse back to the
           caller function. This provides more accurate wchan values,
@@ -406,7 +446,7 @@ config SCHED_OMIT_FRAME_POINTER
 
 menuconfig PARAVIRT_GUEST
         bool "Paravirtualized guest support"
-        help
+        ---help---
           Say Y here to get to see options related to running Linux under
           various hypervisors.  This option alone does not add any kernel code.
 
@@ -420,8 +460,7 @@ config VMI
         bool "VMI Guest support"
         select PARAVIRT
         depends on X86_32
-        depends on !X86_VOYAGER
-        help
+        ---help---
           VMI provides a paravirtualized interface to the VMware ESX server
           (it could be used by other hypervisors in theory too, but is not
           at the moment), by linking the kernel to a GPL-ed ROM module
@@ -431,8 +470,7 @@ config KVM_CLOCK
         bool "KVM paravirtualized clock"
         select PARAVIRT
         select PARAVIRT_CLOCK
-        depends on !X86_VOYAGER
-        help
+        ---help---
           Turning on this option will allow you to run a paravirtualized clock
           when running over the KVM hypervisor. Instead of relying on a PIT
           (or probably other) emulation by the underlying device model, the host
@@ -442,17 +480,15 @@ config KVM_CLOCK
 config KVM_GUEST
         bool "KVM Guest support"
         select PARAVIRT
-        depends on !X86_VOYAGER
-        help
-         This option enables various optimizations for running under the KVM
-         hypervisor.
+        ---help---
+          This option enables various optimizations for running under the KVM
+          hypervisor.
 
 source "arch/x86/lguest/Kconfig"
 
 config PARAVIRT
         bool "Enable paravirtualization code"
-        depends on !X86_VOYAGER
-        help
+        ---help---
           This changes the kernel so it can modify itself when it is run
           under a hypervisor, potentially improving performance significantly
           over full virtualization.  However, when run without a hypervisor
@@ -465,51 +501,51 @@ config PARAVIRT_CLOCK
 endif
 
 config PARAVIRT_DEBUG
-       bool "paravirt-ops debugging"
-       depends on PARAVIRT && DEBUG_KERNEL
-       help
-         Enable to debug paravirt_ops internals.  Specifically, BUG if
-         a paravirt_op is missing when it is called.
+        bool "paravirt-ops debugging"
+        depends on PARAVIRT && DEBUG_KERNEL
+        ---help---
+          Enable to debug paravirt_ops internals.  Specifically, BUG if
+          a paravirt_op is missing when it is called.
 
 config MEMTEST
         bool "Memtest"
-        help
+        ---help---
           This option adds a kernel parameter 'memtest', which allows memtest
           to be set.
-                memtest=0, mean disabled; -- default
-                memtest=1, mean do 1 test pattern;
-                ...
-                memtest=4, mean do 4 test patterns.
+                memtest=0, mean disabled; -- default
+                memtest=1, mean do 1 test pattern;
+                ...
+                memtest=4, mean do 4 test patterns.
           If you are unsure how to answer this question, answer N.
 
 config X86_SUMMIT_NUMA
         def_bool y
-        depends on X86_32 && NUMA && X86_GENERICARCH
+        depends on X86_32 && NUMA && X86_32_NON_STANDARD
 
 config X86_CYCLONE_TIMER
         def_bool y
-        depends on X86_GENERICARCH
+        depends on X86_32_NON_STANDARD
 
 source "arch/x86/Kconfig.cpu"
 
 config HPET_TIMER
         def_bool X86_64
         prompt "HPET Timer Support" if X86_32
-        help
-         Use the IA-PC HPET (High Precision Event Timer) to manage
-         time in preference to the PIT and RTC, if a HPET is
-         present.
-         HPET is the next generation timer replacing legacy 8254s.
-         The HPET provides a stable time base on SMP
-         systems, unlike the TSC, but it is more expensive to access,
-         as it is off-chip.  You can find the HPET spec at
-         <http://www.intel.com/hardwaredesign/hpetspec_1.pdf>.
+        ---help---
+          Use the IA-PC HPET (High Precision Event Timer) to manage
+          time in preference to the PIT and RTC, if a HPET is
+          present.
+          HPET is the next generation timer replacing legacy 8254s.
+          The HPET provides a stable time base on SMP
+          systems, unlike the TSC, but it is more expensive to access,
+          as it is off-chip.  You can find the HPET spec at
+          <http://www.intel.com/hardwaredesign/hpetspec_1.pdf>.
 
-         You can safely choose Y here.  However, HPET will only be
-         activated if the platform and the BIOS support this feature.
-         Otherwise the 8254 will be used for timing services.
+          You can safely choose Y here.  However, HPET will only be
+          activated if the platform and the BIOS support this feature.
+          Otherwise the 8254 will be used for timing services.
 
-         Choose N to continue using the legacy 8254 timer.
+          Choose N to continue using the legacy 8254 timer.
 
 config HPET_EMULATE_RTC
         def_bool y
@@ -520,7 +556,7 @@ config HPET_EMULATE_RTC
 config DMI
         default y
         bool "Enable DMI scanning" if EMBEDDED
-        help
+        ---help---
           Enabled scanning of DMI to identify machine quirks. Say Y
           here unless you have verified that your setup is not
           affected by entries in the DMI blacklist. Required by PNP
@@ -532,7 +568,7 @@ config GART_IOMMU
         select SWIOTLB
         select AGP
         depends on X86_64 && PCI
-        help
+        ---help---
           Support for full DMA access of devices with 32bit memory access only
           on systems with more than 3GB. This is usually needed for USB,
           sound, many IDE/SATA chipsets and some other devices.
@@ -547,7 +583,7 @@ config CALGARY_IOMMU
         bool "IBM Calgary IOMMU support"
         select SWIOTLB
         depends on X86_64 && PCI && EXPERIMENTAL
-        help
+        ---help---
           Support for hardware IOMMUs in IBM's xSeries x366 and x460
           systems. Needed to run systems with more than 3GB of memory
           properly with 32-bit PCI devices that do not support DAC
@@ -565,7 +601,7 @@ config CALGARY_IOMMU_ENABLED_BY_DEFAULT
         def_bool y
         prompt "Should Calgary be enabled by default?"
         depends on CALGARY_IOMMU
-        help
+        ---help---
           Should Calgary be enabled by default? if you choose 'y', Calgary
           will be used (if it exists). If you choose 'n', Calgary will not be
           used even if it exists. If you choose 'n' and would like to use
@@ -577,7 +613,7 @@ config AMD_IOMMU
         select SWIOTLB
         select PCI_MSI
         depends on X86_64 && PCI && ACPI
-        help
+        ---help---
           With this option you can enable support for AMD IOMMU hardware in
           your system. An IOMMU is a hardware component which provides
           remapping of DMA memory accesses from devices. With an AMD IOMMU you
@@ -592,7 +628,7 @@ config AMD_IOMMU_STATS
         bool "Export AMD IOMMU statistics to debugfs"
         depends on AMD_IOMMU
         select DEBUG_FS
-        help
+        ---help---
           This option enables code in the AMD IOMMU driver to collect various
           statistics about whats happening in the driver and exports that
           information to userspace via debugfs.
@@ -601,7 +637,7 @@ config AMD_IOMMU_STATS
 # need this always selected by IOMMU for the VIA workaround
 config SWIOTLB
         def_bool y if X86_64
-        help
+        ---help---
           Support for software bounce buffers used on x86-64 systems
           which don't have a hardware IOMMU (e.g. the current generation
           of Intel's x86-64 CPUs). Using this PCI devices which can only
@@ -619,7 +655,7 @@ config MAXSMP
         depends on X86_64 && SMP && DEBUG_KERNEL && EXPERIMENTAL
         select CPUMASK_OFFSTACK
         default n
-        help
+        ---help---
           Configure maximum number of CPUS and NUMA Nodes for this architecture.
           If unsure, say N.
 
@@ -630,7 +666,7 @@ config NR_CPUS
         default "4096" if MAXSMP
         default "32" if SMP && (X86_NUMAQ || X86_SUMMIT || X86_BIGSMP || X86_ES7000)
         default "8" if SMP
-        help
+        ---help---
           This allows you to specify the maximum number of CPUs which this
           kernel will support.  The maximum supported value is 512 and the
           minimum value which makes sense is 2.
@@ -641,7 +677,7 @@ config NR_CPUS
 config SCHED_SMT
         bool "SMT (Hyperthreading) scheduler support"
         depends on X86_HT
-        help
+        ---help---
           SMT scheduler support improves the CPU scheduler's decision making
           when dealing with Intel Pentium 4 chips with HyperThreading at a
           cost of slightly increased overhead in some places. If unsure say
@@ -651,7 +687,7 @@ config SCHED_MC
         def_bool y
         prompt "Multi-core scheduler support"
         depends on X86_HT
-        help
+        ---help---
           Multi-core scheduler support improves the CPU scheduler's decision
           making when dealing with multi-core CPU chips at a cost of slightly
           increased overhead in some places. If unsure say N here.
@@ -660,8 +696,8 @@ source "kernel/Kconfig.preempt"
 
 config X86_UP_APIC
         bool "Local APIC support on uniprocessors"
-        depends on X86_32 && !SMP && !(X86_VOYAGER || X86_GENERICARCH)
-        help
+        depends on X86_32 && !SMP && !X86_32_NON_STANDARD
+        ---help---
           A local APIC (Advanced Programmable Interrupt Controller) is an
           integrated interrupt controller in the CPU. If you have a single-CPU
           system which has a processor with a local APIC, you can say Y here to
@@ -674,7 +710,7 @@ config X86_UP_APIC
 config X86_UP_IOAPIC
         bool "IO-APIC support on uniprocessors"
         depends on X86_UP_APIC
-        help
+        ---help---
           An IO-APIC (I/O Advanced Programmable Interrupt Controller) is an
           SMP-capable replacement for PC-style interrupt controllers. Most
           SMP systems and many recent uniprocessor systems have one.
@@ -685,11 +721,11 @@ config X86_UP_IOAPIC
 
 config X86_LOCAL_APIC
         def_bool y
-        depends on X86_64 || (X86_32 && (X86_UP_APIC || (SMP && !X86_VOYAGER) || X86_GENERICARCH))
+        depends on X86_64 || SMP || X86_32_NON_STANDARD || X86_UP_APIC
 
 config X86_IO_APIC
         def_bool y
-        depends on X86_64 || (X86_32 && (X86_UP_IOAPIC || (SMP && !X86_VOYAGER) || X86_GENERICARCH))
+        depends on X86_64 || SMP || X86_32_NON_STANDARD || X86_UP_APIC
 
 config X86_VISWS_APIC
         def_bool y
@@ -699,7 +735,7 @@ config X86_REROUTE_FOR_BROKEN_BOOT_IRQS
         bool "Reroute for broken boot IRQs"
         default n
         depends on X86_IO_APIC
-        help
+        ---help---
           This option enables a workaround that fixes a source of
           spurious interrupts. This is recommended when threaded
           interrupt handling is used on systems where the generation of
@@ -721,7 +757,6 @@ config X86_REROUTE_FOR_BROKEN_BOOT_IRQS
 
 config X86_MCE
         bool "Machine Check Exception"
-        depends on !X86_VOYAGER
         ---help---
           Machine Check Exception support allows the processor to notify the
           kernel if it detects a problem (e.g. overheating, component failure).
@@ -740,7 +775,7 @@ config X86_MCE_INTEL
         def_bool y
         prompt "Intel MCE features"
         depends on X86_64 && X86_MCE && X86_LOCAL_APIC
-        help
+        ---help---
            Additional support for intel specific MCE features such as
            the thermal monitor.
 
@@ -748,14 +783,14 @@ config X86_MCE_AMD
         def_bool y
         prompt "AMD MCE features"
         depends on X86_64 && X86_MCE && X86_LOCAL_APIC
-        help
+        ---help---
            Additional support for AMD specific MCE features such as
            the DRAM Error Threshold.
 
 config X86_MCE_NONFATAL
         tristate "Check for non-fatal errors on AMD Athlon/Duron / Intel Pentium 4"
         depends on X86_32 && X86_MCE
-        help
+        ---help---
           Enabling this feature starts a timer that triggers every 5 seconds which
           will look at the machine check registers to see if anything happened.
           Non-fatal problems automatically get corrected (but still logged).
@@ -768,7 +803,7 @@ config X86_MCE_NONFATAL
 config X86_MCE_P4THERMAL
         bool "check for P4 thermal throttling interrupt."
         depends on X86_32 && X86_MCE && (X86_UP_APIC || SMP)
-        help
+        ---help---
           Enabling this feature will cause a message to be printed when the P4
           enters thermal throttling.
 
@@ -776,11 +811,11 @@ config VM86
         bool "Enable VM86 support" if EMBEDDED
         default y
         depends on X86_32
-        help
-          This option is required by programs like DOSEMU to run 16-bit legacy
+        ---help---
+          This option is required by programs like DOSEMU to run 16-bit legacy
           code on X86 processors. It also may be needed by software like
-          XFree86 to initialize some video cards via BIOS. Disabling this
-          option saves about 6k.
+          XFree86 to initialize some video cards via BIOS. Disabling this
+          option saves about 6k.
 
 config TOSHIBA
         tristate "Toshiba Laptop support"
@@ -854,33 +889,33 @@ config MICROCODE
           module will be called microcode.
 
 config MICROCODE_INTEL
-       bool "Intel microcode patch loading support"
-       depends on MICROCODE
-       default MICROCODE
-       select FW_LOADER
-       --help---
-         This options enables microcode patch loading support for Intel
-         processors.
-
-         For latest news and information on obtaining all the required
-         Intel ingredients for this driver, check:
-         <http://www.urbanmyth.org/microcode/>.
+        bool "Intel microcode patch loading support"
+        depends on MICROCODE
+        default MICROCODE
+        select FW_LOADER
+        ---help---
+          This options enables microcode patch loading support for Intel
+          processors.
+
+          For latest news and information on obtaining all the required
+          Intel ingredients for this driver, check:
+          <http://www.urbanmyth.org/microcode/>.
 
 config MICROCODE_AMD
-       bool "AMD microcode patch loading support"
-       depends on MICROCODE
-       select FW_LOADER
-       --help---
-         If you select this option, microcode patch loading support for AMD
-         processors will be enabled.
+        bool "AMD microcode patch loading support"
+        depends on MICROCODE
+        select FW_LOADER
+        ---help---
+          If you select this option, microcode patch loading support for AMD
+          processors will be enabled.
 
-   config MICROCODE_OLD_INTERFACE
+config MICROCODE_OLD_INTERFACE
         def_bool y
         depends on MICROCODE
 
 config X86_MSR
         tristate "/dev/cpu/*/msr - Model-specific register support"
-        help
+        ---help---
           This device gives privileged processes access to the x86
           Model-Specific Registers (MSRs).  It is a character device with
           major 202 and minors 0 to 31 for /dev/cpu/0/msr to /dev/cpu/31/msr.
@@ -889,7 +924,7 @@ config X86_MSR
 
 config X86_CPUID
         tristate "/dev/cpu/*/cpuid - CPU information support"
-        help
+        ---help---
           This device gives processes access to the x86 CPUID instruction to
           be executed on a specific processor.  It is a character device
           with major 203 and minors 0 to 31 for /dev/cpu/0/cpuid to
@@ -941,7 +976,7 @@ config NOHIGHMEM
 config HIGHMEM4G
         bool "4GB"
         depends on !X86_NUMAQ
-        help
+        ---help---
           Select this if you have a 32-bit processor and between 1 and 4
           gigabytes of physical RAM.
 
@@ -949,7 +984,7 @@ config HIGHMEM64G
         bool "64GB"
         depends on !M386 && !M486
         select X86_PAE
-        help
+        ---help---
           Select this if you have a 32-bit processor and more than 4
           gigabytes of physical RAM.
 
@@ -960,7 +995,7 @@ choice
         prompt "Memory split" if EMBEDDED
         default VMSPLIT_3G
         depends on X86_32
-        help
+        ---help---
           Select the desired split between kernel and user memory.
 
           If the address range available to the kernel is less than the
@@ -1006,20 +1041,20 @@ config HIGHMEM
 config X86_PAE
         bool "PAE (Physical Address Extension) Support"
         depends on X86_32 && !HIGHMEM4G
-        help
+        ---help---
           PAE is required for NX support, and furthermore enables
           larger swapspace support for non-overcommit purposes. It
           has the cost of more pagetable lookup overhead, and also
           consumes more pagetable space per process.
 
 config ARCH_PHYS_ADDR_T_64BIT
-       def_bool X86_64 || X86_PAE
+        def_bool X86_64 || X86_PAE
 
 config DIRECT_GBPAGES
         bool "Enable 1GB pages for kernel pagetables" if EMBEDDED
         default y
         depends on X86_64
-        help
+        ---help---
           Allow the kernel linear mapping to use 1GB pages on CPUs that
           support it. This can improve the kernel's performance a tiny bit by
           reducing TLB pressure. If in doubt, say "Y".
@@ -1029,9 +1064,8 @@ config NUMA
         bool "Numa Memory Allocation and Scheduler Support"
         depends on SMP
         depends on X86_64 || (X86_32 && HIGHMEM64G && (X86_NUMAQ || X86_BIGSMP || X86_SUMMIT && ACPI) && EXPERIMENTAL)
-        default n if X86_PC
         default y if (X86_NUMAQ || X86_SUMMIT || X86_BIGSMP)
-        help
+        ---help---
           Enable NUMA (Non Uniform Memory Access) support.
 
           The kernel will try to allocate memory used by a CPU on the
@@ -1054,19 +1088,19 @@ config K8_NUMA
         def_bool y
         prompt "Old style AMD Opteron NUMA detection"
         depends on X86_64 && NUMA && PCI
-        help
-         Enable K8 NUMA node topology detection.  You should say Y here if
-         you have a multi processor AMD K8 system. This uses an old
-         method to read the NUMA configuration directly from the builtin
-         Northbridge of Opteron. It is recommended to use X86_64_ACPI_NUMA
-         instead, which also takes priority if both are compiled in.
+        ---help---
+          Enable K8 NUMA node topology detection.  You should say Y here if
+          you have a multi processor AMD K8 system. This uses an old
+          method to read the NUMA configuration directly from the builtin
+          Northbridge of Opteron. It is recommended to use X86_64_ACPI_NUMA
+          instead, which also takes priority if both are compiled in.
 
 config X86_64_ACPI_NUMA
         def_bool y
         prompt "ACPI NUMA detection"
         depends on X86_64 && NUMA && ACPI && PCI
         select ACPI_NUMA
-        help
+        ---help---
           Enable ACPI SRAT based node topology detection.
 
 # Some NUMA nodes have memory ranges that span
@@ -1081,7 +1115,7 @@ config NODES_SPAN_OTHER_NODES
 config NUMA_EMU
         bool "NUMA emulation"
         depends on X86_64 && NUMA
-        help
+        ---help---
           Enable NUMA emulation. A flat machine will be split
           into virtual nodes when booted with "numa=fake=N", where N is the
           number of nodes. This is only useful for debugging.
@@ -1094,11 +1128,11 @@ config NODES_SHIFT
         default "4" if X86_NUMAQ
         default "3"
         depends on NEED_MULTIPLE_NODES
-        help
+        ---help---
           Specify the maximum number of NUMA Nodes available on the target
           system.  Increases memory reserved to accomodate various tables.
 
-config HAVE_ARCH_BOOTMEM_NODE
+config HAVE_ARCH_BOOTMEM
         def_bool y
         depends on X86_32 && NUMA
 
@@ -1132,7 +1166,7 @@ config ARCH_SPARSEMEM_DEFAULT
 
 config ARCH_SPARSEMEM_ENABLE
         def_bool y
-        depends on X86_64 || NUMA || (EXPERIMENTAL && X86_PC) || X86_GENERICARCH
+        depends on X86_64 || NUMA || (EXPERIMENTAL && X86_32) || X86_32_NON_STANDARD
         select SPARSEMEM_STATIC if X86_32
         select SPARSEMEM_VMEMMAP_ENABLE if X86_64
 
@@ -1149,61 +1183,61 @@ source "mm/Kconfig"
 config HIGHPTE
         bool "Allocate 3rd-level pagetables from highmem"
         depends on X86_32 && (HIGHMEM4G || HIGHMEM64G)
-        help
+        ---help---
           The VM uses one page table entry for each page of physical memory.
           For systems with a lot of RAM, this can be wasteful of precious
           low memory.  Setting this option will put user-space page table
           entries in high memory.
 
 config X86_CHECK_BIOS_CORRUPTION
-        bool "Check for low memory corruption"
-        help
-         Periodically check for memory corruption in low memory, which
-         is suspected to be caused by BIOS.  Even when enabled in the
-         configuration, it is disabled at runtime.  Enable it by
-         setting "memory_corruption_check=1" on the kernel command
-         line.  By default it scans the low 64k of memory every 60
-         seconds; see the memory_corruption_check_size and
-         memory_corruption_check_period parameters in
-         Documentation/kernel-parameters.txt to adjust this.
-
-         When enabled with the default parameters, this option has
-         almost no overhead, as it reserves a relatively small amount
-         of memory and scans it infrequently.  It both detects corruption
-         and prevents it from affecting the running system.
-
-         It is, however, intended as a diagnostic tool; if repeatable
-         BIOS-originated corruption always affects the same memory,
-         you can use memmap= to prevent the kernel from using that
-         memory.
+        bool "Check for low memory corruption"
+        ---help---
+          Periodically check for memory corruption in low memory, which
+          is suspected to be caused by BIOS.  Even when enabled in the
+          configuration, it is disabled at runtime.  Enable it by
+          setting "memory_corruption_check=1" on the kernel command
+          line.  By default it scans the low 64k of memory every 60
+          seconds; see the memory_corruption_check_size and
+          memory_corruption_check_period parameters in
+          Documentation/kernel-parameters.txt to adjust this.
+
+          When enabled with the default parameters, this option has
+          almost no overhead, as it reserves a relatively small amount
+          of memory and scans it infrequently.  It both detects corruption
+          and prevents it from affecting the running system.
+
+          It is, however, intended as a diagnostic tool; if repeatable
+          BIOS-originated corruption always affects the same memory,
+          you can use memmap= to prevent the kernel from using that
+          memory.
 
 config X86_BOOTPARAM_MEMORY_CORRUPTION_CHECK
-        bool "Set the default setting of memory_corruption_check"
+        bool "Set the default setting of memory_corruption_check"
         depends on X86_CHECK_BIOS_CORRUPTION
         default y
-        help
-         Set whether the default state of memory_corruption_check is
-         on or off.
+        ---help---
+          Set whether the default state of memory_corruption_check is
+          on or off.
 
 config X86_RESERVE_LOW_64K
-        bool "Reserve low 64K of RAM on AMI/Phoenix BIOSen"
+        bool "Reserve low 64K of RAM on AMI/Phoenix BIOSen"
         default y
-        help
-         Reserve the first 64K of physical RAM on BIOSes that are known
-         to potentially corrupt that memory range. A numbers of BIOSes are
-         known to utilize this area during suspend/resume, so it must not
-         be used by the kernel.
+        ---help---
+          Reserve the first 64K of physical RAM on BIOSes that are known
+          to potentially corrupt that memory range. A numbers of BIOSes are
+          known to utilize this area during suspend/resume, so it must not
+          be used by the kernel.
 
-         Set this to N if you are absolutely sure that you trust the BIOS
-         to get all its memory reservations and usages right.
+          Set this to N if you are absolutely sure that you trust the BIOS
+          to get all its memory reservations and usages right.
 
-         If you have doubts about the BIOS (e.g. suspend/resume does not
-         work or there's kernel crashes after certain hardware hotplug
-         events) and it's not AMI or Phoenix, then you might want to enable
-         X86_CHECK_BIOS_CORRUPTION=y to allow the kernel to check typical
-         corruption patterns.
+          If you have doubts about the BIOS (e.g. suspend/resume does not
+          work or there's kernel crashes after certain hardware hotplug
+          events) and it's not AMI or Phoenix, then you might want to enable
+          X86_CHECK_BIOS_CORRUPTION=y to allow the kernel to check typical
+          corruption patterns.
 
-         Say Y if unsure.
+          Say Y if unsure.
 
 config MATH_EMULATION
         bool
@@ -1269,7 +1303,7 @@ config MTRR_SANITIZER
         def_bool y
         prompt "MTRR cleanup support"
         depends on MTRR
-        help
+        ---help---
           Convert MTRR layout from continuous to discrete, so X drivers can
           add writeback entries.
 
@@ -1284,7 +1318,7 @@ config MTRR_SANITIZER_ENABLE_DEFAULT
         range 0 1
         default "0"
         depends on MTRR_SANITIZER
-        help
+        ---help---
           Enable mtrr cleanup default value
 
 config MTRR_SANITIZER_SPARE_REG_NR_DEFAULT
@@ -1292,7 +1326,7 @@ config MTRR_SANITIZER_SPARE_REG_NR_DEFAULT
         range 0 7
         default "1"
         depends on MTRR_SANITIZER
-        help
+        ---help---
           mtrr cleanup spare entries default, it can be changed via
           mtrr_spare_reg_nr=N on the kernel command line.
 
@@ -1300,7 +1334,7 @@ config X86_PAT
         bool
         prompt "x86 PAT support"
         depends on MTRR
-        help
+        ---help---
           Use PAT attributes to setup page level cache control.
 
           PATs are the modern equivalents of MTRRs and are much more
@@ -1315,20 +1349,20 @@ config EFI
         bool "EFI runtime service support"
         depends on ACPI
         ---help---
-        This enables the kernel to use EFI runtime services that are
-        available (such as the EFI variable services).
+          This enables the kernel to use EFI runtime services that are
+          available (such as the EFI variable services).
 
-        This option is only useful on systems that have EFI firmware.
-        In addition, you should use the latest ELILO loader available
-        at <http://elilo.sourceforge.net> in order to take advantage
-        of EFI runtime services. However, even with this option, the
-        resultant kernel should continue to boot on existing non-EFI
-        platforms.
+          This option is only useful on systems that have EFI firmware.
+          In addition, you should use the latest ELILO loader available
+          at <http://elilo.sourceforge.net> in order to take advantage
+          of EFI runtime services. However, even with this option, the
+          resultant kernel should continue to boot on existing non-EFI
+          platforms.
 
 config SECCOMP
         def_bool y
         prompt "Enable seccomp to safely compute untrusted bytecode"
-        help
+        ---help---
           This kernel feature is useful for number crunching applications
           that may need to compute untrusted bytecode during their
           execution. By using pipes or other transports made available to
@@ -1341,13 +1375,16 @@ config SECCOMP
 
           If unsure, say Y. Only embedded should say N here.
 
+config CC_STACKPROTECTOR_ALL
+        bool
+
 config CC_STACKPROTECTOR
         bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)"
-        depends on X86_64 && EXPERIMENTAL && BROKEN
-        help
-         This option turns on the -fstack-protector GCC feature. This
-          feature puts, at the beginning of critical functions, a canary
-          value on the stack just before the return address, and validates
+        select CC_STACKPROTECTOR_ALL
+        ---help---
+          This option turns on the -fstack-protector GCC feature. This
+          feature puts, at the beginning of functions, a canary value on
+          the stack just before the return address, and validates
           the value just before actually returning.  Stack based buffer
           overflows (that need to overwrite this return address) now also
           overwrite the canary, which gets detected and the attack is then
@@ -1355,22 +1392,14 @@ config CC_STACKPROTECTOR
 
           This feature requires gcc version 4.2 or above, or a distribution
           gcc with the feature backported. Older versions are automatically
-          detected and for those versions, this configuration option is ignored.
-
-config CC_STACKPROTECTOR_ALL
-        bool "Use stack-protector for all functions"
-        depends on CC_STACKPROTECTOR
-        help
-          Normally, GCC only inserts the canary value protection for
-          functions that use large-ish on-stack buffers. By enabling
-          this option, GCC will be asked to do this for ALL functions.
+          detected and for those versions, this configuration option is
+          ignored. (and a warning is printed during bootup)
 
 source kernel/Kconfig.hz
 
 config KEXEC
         bool "kexec system call"
-        depends on X86_BIOS_REBOOT
-        help
+        ---help---
           kexec is a system call that implements the ability to shutdown your
           current kernel, and to start another kernel.  It is like a reboot
           but it is independent of the system firmware.   And like a reboot
@@ -1387,7 +1416,7 @@ config KEXEC
 config CRASH_DUMP
         bool "kernel crash dumps"
         depends on X86_64 || (X86_32 && HIGHMEM)
-        help
+        ---help---
           Generate crash dump after being started by kexec.
           This should be normally only set in special crash dump kernels
           which are loaded in the main kernel with kexec-tools into
@@ -1402,7 +1431,7 @@ config KEXEC_JUMP
         bool "kexec jump (EXPERIMENTAL)"
         depends on EXPERIMENTAL
         depends on KEXEC && HIBERNATION && X86_32
-        help
+        ---help---
           Jump between original kernel and kexeced kernel and invoke
           code in physical address mode via KEXEC
 
@@ -1411,7 +1440,7 @@ config PHYSICAL_START
         default "0x1000000" if X86_NUMAQ
         default "0x200000" if X86_64
         default "0x100000"
-        help
+        ---help---
           This gives the physical address where the kernel is loaded.
 
           If kernel is a not relocatable (CONFIG_RELOCATABLE=n) then
@@ -1452,7 +1481,7 @@ config PHYSICAL_START
 config RELOCATABLE
         bool "Build a relocatable kernel (EXPERIMENTAL)"
         depends on EXPERIMENTAL
-        help
+        ---help---
           This builds a kernel image that retains relocation information
           so it can be loaded someplace besides the default 1MB.
           The relocations tend to make the kernel binary about 10% larger,
@@ -1472,7 +1501,7 @@ config PHYSICAL_ALIGN
         default "0x100000" if X86_32
         default "0x200000" if X86_64
         range 0x2000 0x400000
-        help
+        ---help---
           This value puts the alignment restrictions on physical address
           where kernel is loaded and run from. Kernel is compiled for an
           address which meets above alignment restriction.
@@ -1493,7 +1522,7 @@ config PHYSICAL_ALIGN
 
 config HOTPLUG_CPU
         bool "Support for hot-pluggable CPUs"
-        depends on SMP && HOTPLUG && !X86_VOYAGER
+        depends on SMP && HOTPLUG
         ---help---
           Say Y here to allow turning CPUs off and on. CPUs can be
           controlled through /sys/devices/system/cpu.
@@ -1505,7 +1534,7 @@ config COMPAT_VDSO
         def_bool y
         prompt "Compat VDSO support"
         depends on X86_32 || IA32_EMULATION
-        help
+        ---help---
           Map the 32-bit VDSO to the predictable old-style address too.
         ---help---
           Say N here if you are running a sufficiently recent glibc
@@ -1517,7 +1546,7 @@ config COMPAT_VDSO
 config CMDLINE_BOOL
         bool "Built-in kernel command line"
         default n
-        help
+        ---help---
           Allow for specifying boot arguments to the kernel at
           build time.  On some systems (e.g. embedded ones), it is
           necessary or convenient to provide some or all of the
@@ -1535,7 +1564,7 @@ config CMDLINE
         string "Built-in kernel command string"
         depends on CMDLINE_BOOL
         default ""
-        help
+        ---help---
           Enter arguments here that should be compiled into the kernel
           image and used at boot time.  If the boot loader provides a
           command line at boot time, it is appended to this string to
@@ -1552,7 +1581,7 @@ config CMDLINE_OVERRIDE
         bool "Built-in command line overrides boot loader arguments"
         default n
         depends on CMDLINE_BOOL
-        help
+        ---help---
           Set this option to 'Y' to have the kernel ignore the boot loader
           command line, and use ONLY the built-in command line.
 
@@ -1574,7 +1603,6 @@ config HAVE_ARCH_EARLY_PFN_TO_NID
         depends on NUMA
 
 menu "Power management and ACPI options"
-        depends on !X86_VOYAGER
 
 config ARCH_HIBERNATION_HEADER
         def_bool y
@@ -1652,7 +1680,7 @@ if APM
 
 config APM_IGNORE_USER_SUSPEND
         bool "Ignore USER SUSPEND"
-        help
+        ---help---
           This option will ignore USER SUSPEND requests. On machines with a
           compliant APM BIOS, you want to say N. However, on the NEC Versa M
           series notebooks, it is necessary to say Y because of a BIOS bug.
@@ -1676,7 +1704,7 @@ config APM_DO_ENABLE
 
 config APM_CPU_IDLE
         bool "Make CPU Idle calls when idle"
-        help
+        ---help---
           Enable calls to APM CPU Idle/CPU Busy inside the kernel's idle loop.
           On some machines, this can activate improved power savings, such as
           a slowed CPU clock rate, when the machine is idle. These idle calls
@@ -1687,7 +1715,7 @@ config APM_CPU_IDLE
 
 config APM_DISPLAY_BLANK
         bool "Enable console blanking using APM"
-        help
+        ---help---
           Enable console blanking using the APM. Some laptops can use this to
           turn off the LCD backlight when the screen blanker of the Linux
           virtual console blanks the screen. Note that this is only used by
@@ -1700,7 +1728,7 @@ config APM_DISPLAY_BLANK
 
 config APM_ALLOW_INTS
         bool "Allow interrupts during APM BIOS calls"
-        help
+        ---help---
           Normally we disable external interrupts while we are making calls to
           the APM BIOS as a measure to lessen the effects of a badly behaving
           BIOS implementation.  The BIOS should reenable interrupts if it
@@ -1725,7 +1753,7 @@ config PCI
         bool "PCI support"
         default y
         select ARCH_SUPPORTS_MSI if (X86_LOCAL_APIC && X86_IO_APIC)
-        help
+        ---help---
           Find out whether you have a PCI motherboard. PCI is the name of a
           bus system, i.e. the way the CPU talks to the other stuff inside
           your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
@@ -1796,7 +1824,7 @@ config PCI_MMCONFIG
 config DMAR
         bool "Support for DMA Remapping Devices (EXPERIMENTAL)"
         depends on X86_64 && PCI_MSI && ACPI && EXPERIMENTAL
-        help
+        ---help---
           DMA remapping (DMAR) devices support enables independent address
           translations for Direct Memory Access (DMA) from devices.
           These DMA remapping devices are reported via ACPI tables
@@ -1818,29 +1846,30 @@ config DMAR_GFX_WA
         def_bool y
         prompt "Support for Graphics workaround"
         depends on DMAR
-        help
-         Current Graphics drivers tend to use physical address
-         for DMA and avoid using DMA APIs. Setting this config
-         option permits the IOMMU driver to set a unity map for
-         all the OS-visible memory. Hence the driver can continue
-         to use physical addresses for DMA.
+        ---help---
+          Current Graphics drivers tend to use physical address
+          for DMA and avoid using DMA APIs. Setting this config
+          option permits the IOMMU driver to set a unity map for
+          all the OS-visible memory. Hence the driver can continue
+          to use physical addresses for DMA.
 
 config DMAR_FLOPPY_WA
         def_bool y
         depends on DMAR
-        help
-         Floppy disk drivers are know to bypass DMA API calls
-         thereby failing to work when IOMMU is enabled. This
-         workaround will setup a 1:1 mapping for the first
-         16M to make floppy (an ISA device) work.
+        ---help---
+          Floppy disk drivers are know to bypass DMA API calls
+          thereby failing to work when IOMMU is enabled. This
+          workaround will setup a 1:1 mapping for the first
+          16M to make floppy (an ISA device) work.
 
 config INTR_REMAP
         bool "Support for Interrupt Remapping (EXPERIMENTAL)"
         depends on X86_64 && X86_IO_APIC && PCI_MSI && ACPI && EXPERIMENTAL
-        help
-         Supports Interrupt remapping for IO-APIC and MSI devices.
-         To use x2apic mode in the CPU's which support x2APIC enhancements or
-         to support platforms with CPU's having > 8 bit APIC ID, say Y.
+        select X86_X2APIC
+        ---help---
+          Supports Interrupt remapping for IO-APIC and MSI devices.
+          To use x2apic mode in the CPU's which support x2APIC enhancements or
+          to support platforms with CPU's having > 8 bit APIC ID, say Y.
 
 source "drivers/pci/pcie/Kconfig"
 
@@ -1854,8 +1883,7 @@ if X86_32
 
 config ISA
         bool "ISA support"
-        depends on !X86_VOYAGER
-        help
+        ---help---
           Find out whether you have ISA slots on your motherboard.  ISA is the
           name of a bus system, i.e. the way the CPU talks to the other stuff
           inside your box.  Other bus systems are PCI, EISA, MicroChannel
@@ -1881,9 +1909,8 @@ config EISA
 source "drivers/eisa/Kconfig"
 
 config MCA
-        bool "MCA support" if !X86_VOYAGER
-        default y if X86_VOYAGER
-        help
+        bool "MCA support"
+        ---help---
           MicroChannel Architecture is found in some IBM PS/2 machines and
           laptops.  It is a bus system similar to PCI or ISA. See
           <file:Documentation/mca.txt> (and especially the web page given
@@ -1893,8 +1920,7 @@ source "drivers/mca/Kconfig"
 
 config SCx200
         tristate "NatSemi SCx200 support"
-        depends on !X86_VOYAGER
-        help
+        ---help---
           This provides basic support for National Semiconductor's
           (now AMD's) Geode processors.  The driver probes for the
           PCI-IDs of several on-chip devices, so its a good dependency
@@ -1906,7 +1932,7 @@ config SCx200HR_TIMER
         tristate "NatSemi SCx200 27MHz High-Resolution Timer Support"
         depends on SCx200 && GENERIC_TIME
         default y
-        help
+        ---help---
           This driver provides a clocksource built upon the on-chip
           27MHz high-resolution timer.  Its also a workaround for
           NSC Geode SC-1100's buggy TSC, which loses time when the
@@ -1917,7 +1943,7 @@ config GEODE_MFGPT_TIMER
         def_bool y
         prompt "Geode Multi-Function General Purpose Timer (MFGPT) events"
         depends on MGEODE_LX && GENERIC_TIME && GENERIC_CLOCKEVENTS
-        help
+        ---help---
           This driver provides a clock event source based on the MFGPT
           timer(s) in the CS5535 and CS5536 companion chip for the geode.
           MFGPTs have a better resolution and max interval than the
@@ -1926,7 +1952,7 @@ config GEODE_MFGPT_TIMER
 config OLPC
         bool "One Laptop Per Child support"
         default n
-        help
+        ---help---
           Add support for detecting the unique features of the OLPC
           XO hardware.
 
@@ -1951,16 +1977,16 @@ config IA32_EMULATION
         bool "IA32 Emulation"
         depends on X86_64
         select COMPAT_BINFMT_ELF
-        help
+        ---help---
           Include code to run 32-bit programs under a 64-bit kernel. You should
           likely turn this on, unless you're 100% sure that you don't have any
           32-bit programs left.
 
 config IA32_AOUT
-       tristate "IA32 a.out support"
-       depends on IA32_EMULATION
-       help
-         Support old a.out binaries in the 32bit emulation.
+        tristate "IA32 a.out support"
+        depends on IA32_EMULATION
+        ---help---
+          Support old a.out binaries in the 32bit emulation.
 
 config COMPAT
         def_bool y
diff --git a/arch/x86/Kconfig.cpu b/arch/x86/Kconfig.cpu
index c98d52e82966..a95eaf0e582a 100644
--- a/arch/x86/Kconfig.cpu
+++ b/arch/x86/Kconfig.cpu
@@ -50,7 +50,7 @@ config M386
 config M486
         bool "486"
         depends on X86_32
-        help
+        ---help---
           Select this for a 486 series processor, either Intel or one of the
           compatible processors from AMD, Cyrix, IBM, or Intel.  Includes DX,
           DX2, and DX4 variants; also SL/SLC/SLC2/SLC3/SX/SX2 and UMC U5D or
@@ -59,7 +59,7 @@ config M486
 config M586
         bool "586/K5/5x86/6x86/6x86MX"
         depends on X86_32
-        help
+        ---help---
           Select this for an 586 or 686 series processor such as the AMD K5,
           the Cyrix 5x86, 6x86 and 6x86MX.  This choice does not
           assume the RDTSC (Read Time Stamp Counter) instruction.
@@ -67,21 +67,21 @@ config M586
 config M586TSC
         bool "Pentium-Classic"
         depends on X86_32
-        help
+        ---help---
           Select this for a Pentium Classic processor with the RDTSC (Read
           Time Stamp Counter) instruction for benchmarking.
 
 config M586MMX
         bool "Pentium-MMX"
         depends on X86_32
-        help
+        ---help---
           Select this for a Pentium with the MMX graphics/multimedia
           extended instructions.
 
 config M686
         bool "Pentium-Pro"
         depends on X86_32
-        help
+        ---help---
           Select this for Intel Pentium Pro chips.  This enables the use of
           Pentium Pro extended instructions, and disables the init-time guard
           against the f00f bug found in earlier Pentiums.
@@ -89,7 +89,7 @@ config M686
 config MPENTIUMII
         bool "Pentium-II/Celeron(pre-Coppermine)"
         depends on X86_32
-        help
+        ---help---
           Select this for Intel chips based on the Pentium-II and
           pre-Coppermine Celeron core.  This option enables an unaligned
           copy optimization, compiles the kernel with optimization flags
@@ -99,7 +99,7 @@ config MPENTIUMII
 config MPENTIUMIII
         bool "Pentium-III/Celeron(Coppermine)/Pentium-III Xeon"
         depends on X86_32
-        help
+        ---help---
           Select this for Intel chips based on the Pentium-III and
           Celeron-Coppermine core.  This option enables use of some
           extended prefetch instructions in addition to the Pentium II
@@ -108,14 +108,14 @@ config MPENTIUMIII
 config MPENTIUMM
         bool "Pentium M"
         depends on X86_32
-        help
+        ---help---
           Select this for Intel Pentium M (not Pentium-4 M)
           notebook chips.
 
 config MPENTIUM4
         bool "Pentium-4/Celeron(P4-based)/Pentium-4 M/older Xeon"
         depends on X86_32
-        help
+        ---help---
           Select this for Intel Pentium 4 chips.  This includes the
           Pentium 4, Pentium D, P4-based Celeron and Xeon, and
           Pentium-4 M (not Pentium M) chips.  This option enables compile
@@ -151,7 +151,7 @@ config MPENTIUM4
 config MK6
         bool "K6/K6-II/K6-III"
         depends on X86_32
-        help
+        ---help---
           Select this for an AMD K6-family processor.  Enables use of
           some extended instructions, and passes appropriate optimization
           flags to GCC.
@@ -159,14 +159,14 @@ config MK6
 config MK7
         bool "Athlon/Duron/K7"
         depends on X86_32
-        help
+        ---help---
           Select this for an AMD Athlon K7-family processor.  Enables use of
           some extended instructions, and passes appropriate optimization
           flags to GCC.
 
 config MK8
         bool "Opteron/Athlon64/Hammer/K8"
-        help
+        ---help---
           Select this for an AMD Opteron or Athlon64 Hammer-family processor.
           Enables use of some extended instructions, and passes appropriate
           optimization flags to GCC.
@@ -174,7 +174,7 @@ config MK8
 config MCRUSOE
         bool "Crusoe"
         depends on X86_32
-        help
+        ---help---
           Select this for a Transmeta Crusoe processor.  Treats the processor
           like a 586 with TSC, and sets some GCC optimization flags (like a
           Pentium Pro with no alignment requirements).
@@ -182,13 +182,13 @@ config MCRUSOE
 config MEFFICEON
         bool "Efficeon"
         depends on X86_32
-        help
+        ---help---
           Select this for a Transmeta Efficeon processor.
 
 config MWINCHIPC6
         bool "Winchip-C6"
         depends on X86_32
-        help
+        ---help---
           Select this for an IDT Winchip C6 chip.  Linux and GCC
           treat this chip as a 586TSC with some extended instructions
           and alignment requirements.
@@ -196,7 +196,7 @@ config MWINCHIPC6
 config MWINCHIP3D
         bool "Winchip-2/Winchip-2A/Winchip-3"
         depends on X86_32
-        help
+        ---help---
           Select this for an IDT Winchip-2, 2A or 3.  Linux and GCC
           treat this chip as a 586TSC with some extended instructions
           and alignment requirements.  Also enable out of order memory
@@ -206,19 +206,19 @@ config MWINCHIP3D
 config MGEODEGX1
         bool "GeodeGX1"
         depends on X86_32
-        help
+        ---help---
           Select this for a Geode GX1 (Cyrix MediaGX) chip.
 
 config MGEODE_LX
         bool "Geode GX/LX"
         depends on X86_32
-        help
+        ---help---
           Select this for AMD Geode GX and LX processors.
 
 config MCYRIXIII
         bool "CyrixIII/VIA-C3"
         depends on X86_32
-        help
+        ---help---
           Select this for a Cyrix III or C3 chip.  Presently Linux and GCC
           treat this chip as a generic 586. Whilst the CPU is 686 class,
           it lacks the cmov extension which gcc assumes is present when
@@ -230,7 +230,7 @@ config MCYRIXIII
 config MVIAC3_2
         bool "VIA C3-2 (Nehemiah)"
         depends on X86_32
-        help
+        ---help---
           Select this for a VIA C3 "Nehemiah". Selecting this enables usage
           of SSE and tells gcc to treat the CPU as a 686.
           Note, this kernel will not boot on older (pre model 9) C3s.
@@ -238,14 +238,14 @@ config MVIAC3_2
 config MVIAC7
         bool "VIA C7"
         depends on X86_32
-        help
+        ---help---
           Select this for a VIA C7.  Selecting this uses the correct cache
           shift and tells gcc to treat the CPU as a 686.
 
 config MPSC
         bool "Intel P4 / older Netburst based Xeon"
         depends on X86_64
-        help
+        ---help---
           Optimize for Intel Pentium 4, Pentium D and older Nocona/Dempsey
           Xeon CPUs with Intel 64bit which is compatible with x86-64.
           Note that the latest Xeons (Xeon 51xx and 53xx) are not based on the
@@ -255,7 +255,7 @@ config MPSC
 
 config MCORE2
         bool "Core 2/newer Xeon"
-        help
+        ---help---
 
           Select this for Intel Core 2 and newer Core 2 Xeons (Xeon 51xx and
           53xx) CPUs. You can distinguish newer from older Xeons by the CPU
@@ -265,7 +265,7 @@ config MCORE2
 config GENERIC_CPU
         bool "Generic-x86-64"
         depends on X86_64
-        help
+        ---help---
           Generic x86-64 CPU.
           Run equally well on all x86-64 CPUs.
 
@@ -274,7 +274,7 @@ endchoice
 config X86_GENERIC
         bool "Generic x86 support"
         depends on X86_32
-        help
+        ---help---
           Instead of just including optimizations for the selected
           x86 variant (e.g. PII, Crusoe or Athlon), include some more
           generic optimizations as well. This will make the kernel
@@ -294,25 +294,23 @@ config X86_CPU
 # Define implied options from the CPU selection here
 config X86_L1_CACHE_BYTES
         int
-        default "128" if GENERIC_CPU || MPSC
-        default "64" if MK8 || MCORE2
-        depends on X86_64
+        default "128" if MPSC
+        default "64" if GENERIC_CPU || MK8 || MCORE2 || X86_32
 
 config X86_INTERNODE_CACHE_BYTES
         int
         default "4096" if X86_VSMP
         default X86_L1_CACHE_BYTES if !X86_VSMP
-        depends on X86_64
 
 config X86_CMPXCHG
         def_bool X86_64 || (X86_32 && !M386)
 
 config X86_L1_CACHE_SHIFT
         int
-        default "7" if MPENTIUM4 || X86_GENERIC || GENERIC_CPU || MPSC
+        default "7" if MPENTIUM4 || MPSC
         default "4" if X86_ELAN || M486 || M386 || MGEODEGX1
         default "5" if MWINCHIP3D || MWINCHIPC6 || MCRUSOE || MEFFICEON || MCYRIXIII || MK6 || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || M586 || MVIAC3_2 || MGEODE_LX
-        default "6" if MK7 || MK8 || MPENTIUMM || MCORE2 || MVIAC7
+        default "6" if MK7 || MK8 || MPENTIUMM || MCORE2 || MVIAC7 || X86_GENERIC || GENERIC_CPU
 
 config X86_XADD
         def_bool y
@@ -321,7 +319,7 @@ config X86_XADD
 config X86_PPRO_FENCE
         bool "PentiumPro memory ordering errata workaround"
         depends on M686 || M586MMX || M586TSC || M586 || M486 || M386 || MGEODEGX1
-        help
+        ---help---
           Old PentiumPro multiprocessor systems had errata that could cause
           memory operations to violate the x86 ordering standard in rare cases.
           Enabling this option will attempt to work around some (but not all)
@@ -414,14 +412,14 @@ config X86_DEBUGCTLMSR
 
 menuconfig PROCESSOR_SELECT
         bool "Supported processor vendors" if EMBEDDED
-        help
+        ---help---
           This lets you choose what x86 vendor support code your kernel
           will include.
 
 config CPU_SUP_INTEL
         default y
         bool "Support Intel processors" if PROCESSOR_SELECT
-        help
+        ---help---
           This enables detection, tunings and quirks for Intel processors
 
           You need this enabled if you want your kernel to run on an
@@ -435,7 +433,7 @@ config CPU_SUP_CYRIX_32
         default y
         bool "Support Cyrix processors" if PROCESSOR_SELECT
         depends on !64BIT
-        help
+        ---help---
           This enables detection, tunings and quirks for Cyrix processors
 
           You need this enabled if you want your kernel to run on a
@@ -448,7 +446,7 @@ config CPU_SUP_CYRIX_32
 config CPU_SUP_AMD
         default y
         bool "Support AMD processors" if PROCESSOR_SELECT
-        help
+        ---help---
           This enables detection, tunings and quirks for AMD processors
 
           You need this enabled if you want your kernel to run on an
@@ -462,7 +460,7 @@ config CPU_SUP_CENTAUR_32
         default y
         bool "Support Centaur processors" if PROCESSOR_SELECT
         depends on !64BIT
-        help
+        ---help---
           This enables detection, tunings and quirks for Centaur processors
 
           You need this enabled if you want your kernel to run on a
@@ -476,7 +474,7 @@ config CPU_SUP_CENTAUR_64
         default y
         bool "Support Centaur processors" if PROCESSOR_SELECT
         depends on 64BIT
-        help
+        ---help---
           This enables detection, tunings and quirks for Centaur processors
 
           You need this enabled if you want your kernel to run on a
@@ -490,7 +488,7 @@ config CPU_SUP_TRANSMETA_32
         default y
         bool "Support Transmeta processors" if PROCESSOR_SELECT
         depends on !64BIT
-        help
+        ---help---
           This enables detection, tunings and quirks for Transmeta processors
 
           You need this enabled if you want your kernel to run on a
@@ -504,7 +502,7 @@ config CPU_SUP_UMC_32
         default y
         bool "Support UMC processors" if PROCESSOR_SELECT
         depends on !64BIT
-        help
+        ---help---
           This enables detection, tunings and quirks for UMC processors
 
           You need this enabled if you want your kernel to run on a
@@ -523,7 +521,7 @@ config X86_PTRACE_BTS
         bool "Branch Trace Store"
         default y
         depends on X86_DEBUGCTLMSR
-        help
+        ---help---
           This adds a ptrace interface to the hardware's branch trace store.
 
           Debuggers may use it to collect an execution trace of the debugged
diff --git a/arch/x86/Kconfig.debug b/arch/x86/Kconfig.debug
index e1983fa025d2..fdb45df608b6 100644
--- a/arch/x86/Kconfig.debug
+++ b/arch/x86/Kconfig.debug
@@ -7,7 +7,7 @@ source "lib/Kconfig.debug"
 
 config STRICT_DEVMEM
         bool "Filter access to /dev/mem"
-        help
+        ---help---
           If this option is disabled, you allow userspace (root) access to all
           of memory, including kernel and userspace memory. Accidental
           access to this is obviously disastrous, but specific access can
@@ -25,7 +25,7 @@ config STRICT_DEVMEM
 config X86_VERBOSE_BOOTUP
         bool "Enable verbose x86 bootup info messages"
         default y
-        help
+        ---help---
           Enables the informational output from the decompression stage
           (e.g. bzImage) of the boot. If you disable this you will still
           see errors. Disable this if you want silent bootup.
@@ -33,7 +33,7 @@ config X86_VERBOSE_BOOTUP
 config EARLY_PRINTK
         bool "Early printk" if EMBEDDED
         default y
-        help
+        ---help---
           Write kernel log output directly into the VGA buffer or to a serial
           port.
 
@@ -47,7 +47,7 @@ config EARLY_PRINTK_DBGP
         bool "Early printk via EHCI debug port"
         default n
         depends on EARLY_PRINTK && PCI
-        help
+        ---help---
           Write kernel log output directly into the EHCI debug port.
 
           This is useful for kernel debugging when your machine crashes very
@@ -59,14 +59,14 @@ config EARLY_PRINTK_DBGP
 config DEBUG_STACKOVERFLOW
         bool "Check for stack overflows"
         depends on DEBUG_KERNEL
-        help
+        ---help---
           This option will cause messages to be printed if free stack space
           drops below a certain limit.
 
 config DEBUG_STACK_USAGE
         bool "Stack utilization instrumentation"
         depends on DEBUG_KERNEL
-        help
+        ---help---
           Enables the display of the minimum amount of free stack which each
           task has ever had available in the sysrq-T and sysrq-P debug output.
 
@@ -75,7 +75,7 @@ config DEBUG_STACK_USAGE
 config DEBUG_PAGEALLOC
         bool "Debug page memory allocations"
         depends on DEBUG_KERNEL
-        help
+        ---help---
           Unmap pages from the kernel linear mapping after free_pages().
           This results in a large slowdown, but helps to find certain types
           of memory corruptions.
@@ -83,9 +83,9 @@ config DEBUG_PAGEALLOC
 config DEBUG_PER_CPU_MAPS
         bool "Debug access to per_cpu maps"
         depends on DEBUG_KERNEL
-        depends on X86_SMP
+        depends on SMP
         default n
-        help
+        ---help---
           Say Y to verify that the per_cpu map being accessed has
           been setup.  Adds a fair amount of code to kernel memory
           and decreases performance.
@@ -96,7 +96,7 @@ config X86_PTDUMP
         bool "Export kernel pagetable layout to userspace via debugfs"
         depends on DEBUG_KERNEL
         select DEBUG_FS
-        help
+        ---help---
           Say Y here if you want to show the kernel pagetable layout in a
           debugfs file. This information is only useful for kernel developers
           who are working in architecture specific areas of the kernel.
@@ -108,7 +108,7 @@ config DEBUG_RODATA
         bool "Write protect kernel read-only data structures"
         default y
         depends on DEBUG_KERNEL
-        help
+        ---help---
           Mark the kernel read-only data as write-protected in the pagetables,
           in order to catch accidental (and incorrect) writes to such const
           data. This is recommended so that we can catch kernel bugs sooner.
@@ -117,7 +117,8 @@ config DEBUG_RODATA
 config DEBUG_RODATA_TEST
         bool "Testcase for the DEBUG_RODATA feature"
         depends on DEBUG_RODATA
-        help
+        default y
+        ---help---
           This option enables a testcase for the DEBUG_RODATA
           feature as well as for the change_page_attr() infrastructure.
           If in doubt, say "N"
@@ -125,7 +126,7 @@ config DEBUG_RODATA_TEST
 config DEBUG_NX_TEST
         tristate "Testcase for the NX non-executable stack feature"
         depends on DEBUG_KERNEL && m
-        help
+        ---help---
           This option enables a testcase for the CPU NX capability
           and the software setup of this feature.
           If in doubt, say "N"
@@ -133,7 +134,7 @@ config DEBUG_NX_TEST
 config 4KSTACKS
         bool "Use 4Kb for kernel stacks instead of 8Kb"
         depends on X86_32
-        help
+        ---help---
           If you say Y here the kernel will use a 4Kb stacksize for the
           kernel stack attached to each process/thread. This facilitates
           running more threads on a system and also reduces the pressure
@@ -144,7 +145,7 @@ config DOUBLEFAULT
         default y
         bool "Enable doublefault exception handler" if EMBEDDED
         depends on X86_32
-        help
+        ---help---
           This option allows trapping of rare doublefault exceptions that
           would otherwise cause a system to silently reboot. Disabling this
           option saves about 4k and might cause you much additional grey
@@ -154,7 +155,7 @@ config IOMMU_DEBUG
         bool "Enable IOMMU debugging"
         depends on GART_IOMMU && DEBUG_KERNEL
         depends on X86_64
-        help
+        ---help---
           Force the IOMMU to on even when you have less than 4GB of
           memory and add debugging code. On overflow always panic. And
           allow to enable IOMMU leak tracing. Can be disabled at boot
@@ -170,7 +171,7 @@ config IOMMU_LEAK
         bool "IOMMU leak tracing"
         depends on DEBUG_KERNEL
         depends on IOMMU_DEBUG
-        help
+        ---help---
           Add a simple leak tracer to the IOMMU code. This is useful when you
           are debugging a buggy device driver that leaks IOMMU mappings.
 
@@ -203,25 +204,25 @@ choice
 
 config IO_DELAY_0X80
         bool "port 0x80 based port-IO delay [recommended]"
-        help
+        ---help---
           This is the traditional Linux IO delay used for in/out_p.
           It is the most tested hence safest selection here.
 
 config IO_DELAY_0XED
         bool "port 0xed based port-IO delay"
-        help
+        ---help---
           Use port 0xed as the IO delay. This frees up port 0x80 which is
           often used as a hardware-debug port.
 
 config IO_DELAY_UDELAY
         bool "udelay based port-IO delay"
-        help
+        ---help---
           Use udelay(2) as the IO delay method. This provides the delay
           while not having any side-effect on the IO port space.
 
 config IO_DELAY_NONE
         bool "no port-IO delay"
-        help
+        ---help---
           No port-IO delay. Will break on old boxes that require port-IO
           delay for certain operations. Should work on most new machines.
 
@@ -255,18 +256,18 @@ config DEBUG_BOOT_PARAMS
         bool "Debug boot parameters"
         depends on DEBUG_KERNEL
         depends on DEBUG_FS
-        help
+        ---help---
           This option will cause struct boot_params to be exported via debugfs.
 
 config CPA_DEBUG
         bool "CPA self-test code"
         depends on DEBUG_KERNEL
-        help
+        ---help---
           Do change_page_attr() self-tests every 30 seconds.
 
 config OPTIMIZE_INLINING
         bool "Allow gcc to uninline functions marked 'inline'"
-        help
+        ---help---
           This option determines if the kernel forces gcc to inline the functions
           developers have marked 'inline'. Doing so takes away freedom from gcc to
           do what it thinks is best, which is desirable for the gcc 3.x series of
@@ -279,4 +280,3 @@ config OPTIMIZE_INLINING
           If unsure, say N.
 
 endmenu
-
diff --git a/arch/x86/Makefile b/arch/x86/Makefile
index d1a47adb5aec..1836191839ee 100644
--- a/arch/x86/Makefile
+++ b/arch/x86/Makefile
@@ -70,14 +70,17 @@ else
         # this works around some issues with generating unwind tables in older gccs
         # newer gccs do it by default
         KBUILD_CFLAGS += -maccumulate-outgoing-args
+endif
 
-        stackp := $(CONFIG_SHELL) $(srctree)/scripts/gcc-x86_64-has-stack-protector.sh
-        stackp-$(CONFIG_CC_STACKPROTECTOR) := $(shell $(stackp) \
-                "$(CC)" -fstack-protector )
-        stackp-$(CONFIG_CC_STACKPROTECTOR_ALL) += $(shell $(stackp) \
-                "$(CC)" -fstack-protector-all )
-
-        KBUILD_CFLAGS += $(stackp-y)
+ifdef CONFIG_CC_STACKPROTECTOR
+        cc_has_sp := $(srctree)/scripts/gcc-x86_$(BITS)-has-stack-protector.sh
+        ifeq ($(shell $(CONFIG_SHELL) $(cc_has_sp) $(CC)),y)
+                stackp-y := -fstack-protector
+                stackp-$(CONFIG_CC_STACKPROTECTOR_ALL) += -fstack-protector-all
+                KBUILD_CFLAGS += $(stackp-y)
+        else
+                $(warning stack protector enabled but no compiler support)
+        endif
 endif
 
 # Stackpointer is addressed different for 32 bit and 64 bit x86
@@ -102,29 +105,6 @@ KBUILD_CFLAGS += -fno-asynchronous-unwind-tables
 # prevent gcc from generating any FP code by mistake
 KBUILD_CFLAGS += $(call cc-option,-mno-sse -mno-mmx -mno-sse2 -mno-3dnow,)
 
-###
-# Sub architecture support
-# fcore-y is linked before mcore-y files.
-
-# Default subarch .c files
-mcore-y  := arch/x86/mach-default/
-
-# Voyager subarch support
-mflags-$(CONFIG_X86_VOYAGER)    := -Iarch/x86/include/asm/mach-voyager
-mcore-$(CONFIG_X86_VOYAGER)     := arch/x86/mach-voyager/
-
-# generic subarchitecture
-mflags-$(CONFIG_X86_GENERICARCH):= -Iarch/x86/include/asm/mach-generic
-fcore-$(CONFIG_X86_GENERICARCH) += arch/x86/mach-generic/
-mcore-$(CONFIG_X86_GENERICARCH) := arch/x86/mach-default/
-
-# default subarch .h files
-mflags-y += -Iarch/x86/include/asm/mach-default
-
-# 64 bit does not support subarch support - clear sub arch variables
-fcore-$(CONFIG_X86_64)  :=
-mcore-$(CONFIG_X86_64)  :=
-
 KBUILD_CFLAGS += $(mflags-y)
 KBUILD_AFLAGS += $(mflags-y)
 
@@ -150,9 +130,6 @@ core-$(CONFIG_LGUEST_GUEST) += arch/x86/lguest/
 core-y += arch/x86/kernel/
 core-y += arch/x86/mm/
 
-# Remaining sub architecture files
-core-y += $(mcore-y)
-
 core-y += arch/x86/crypto/
 core-y += arch/x86/vdso/
 core-$(CONFIG_IA32_EMULATION) += arch/x86/ia32/
diff --git a/arch/x86/boot/Makefile b/arch/x86/boot/Makefile
index cd48c7210016..c70eff69a1fb 100644
--- a/arch/x86/boot/Makefile
+++ b/arch/x86/boot/Makefile
@@ -32,7 +32,6 @@ setup-y		+= a20.o cmdline.o copy.o cpu.o cpucheck.o edd.o
 setup-y         += header.o main.o mca.o memory.o pm.o pmjump.o
 setup-y         += printf.o string.o tty.o video.o video-mode.o version.o
 setup-$(CONFIG_X86_APM_BOOT) += apm.o
-setup-$(CONFIG_X86_VOYAGER) += voyager.o
 
 # The link order of the video-*.o modules can matter.  In particular,
 # video-vga.o *must* be listed first, followed by video-vesa.o.
diff --git a/arch/x86/boot/a20.c b/arch/x86/boot/a20.c
index 4063d630deff..7c19ce8c2442 100644
--- a/arch/x86/boot/a20.c
+++ b/arch/x86/boot/a20.c
@@ -2,6 +2,7 @@
  *
  *   Copyright (C) 1991, 1992 Linus Torvalds
  *   Copyright 2007-2008 rPath, Inc. - All Rights Reserved
+ *   Copyright 2009 Intel Corporation
  *
  *   This file is part of the Linux kernel, and is made available under
  *   the terms of the GNU General Public License version 2.
@@ -15,16 +16,23 @@
 #include "boot.h"
 
 #define MAX_8042_LOOPS  100000
+#define MAX_8042_FF     32
 
 static int empty_8042(void)
 {
         u8 status;
         int loops = MAX_8042_LOOPS;
+        int ffs   = MAX_8042_FF;
 
         while (loops--) {
                 io_delay();
 
                 status = inb(0x64);
+                if (status == 0xff) {
+                        /* FF is a plausible, but very unlikely status */
+                        if (!--ffs)
+                                return -1; /* Assume no KBC present */
+                }
                 if (status & 1) {
                         /* Read and discard input data */
                         io_delay();
@@ -118,44 +126,37 @@ static void enable_a20_fast(void)
 
 int enable_a20(void)
 {
-#if defined(CONFIG_X86_ELAN)
-        /* Elan croaks if we try to touch the KBC */
-        enable_a20_fast();
-        while (!a20_test_long())
-                ;
-        return 0;
-#elif defined(CONFIG_X86_VOYAGER)
-        /* On Voyager, a20_test() is unsafe? */
-        enable_a20_kbc();
-        return 0;
-#else
        int loops = A20_ENABLE_LOOPS;
-        while (loops--) {
-                /* First, check to see if A20 is already enabled
-                   (legacy free, etc.) */
-                if (a20_test_short())
-                        return 0;
-
-                /* Next, try the BIOS (INT 0x15, AX=0x2401) */
-                enable_a20_bios();
-                if (a20_test_short())
-                        return 0;
-
-                /* Try enabling A20 through the keyboard controller */
-                empty_8042();
-                if (a20_test_short())
-                        return 0; /* BIOS worked, but with delayed reaction */
-
-                enable_a20_kbc();
-                if (a20_test_long())
-                        return 0;
-
-                /* Finally, try enabling the "fast A20 gate" */
-                enable_a20_fast();
-                if (a20_test_long())
-                        return 0;
-        }
-
-        return -1;
-#endif
+       int kbc_err;
+
+       while (loops--) {
+               /* First, check to see if A20 is already enabled
+                  (legacy free, etc.) */
+               if (a20_test_short())
+                       return 0;
+               
+               /* Next, try the BIOS (INT 0x15, AX=0x2401) */
+               enable_a20_bios();
+               if (a20_test_short())
+                       return 0;
+               
+               /* Try enabling A20 through the keyboard controller */
+               kbc_err = empty_8042();
+
+               if (a20_test_short())
+                       return 0; /* BIOS worked, but with delayed reaction */
+        
+               if (!kbc_err) {
+                       enable_a20_kbc();
+                       if (a20_test_long())
+                               return 0;
+               }
+               
+               /* Finally, try enabling the "fast A20 gate" */
+               enable_a20_fast();
+               if (a20_test_long())
+                       return 0;
+       }
+       
+       return -1;
 }
diff --git a/arch/x86/boot/boot.h b/arch/x86/boot/boot.h
index cc0ef13fba7a..7b2692e897e5 100644
--- a/arch/x86/boot/boot.h
+++ b/arch/x86/boot/boot.h
@@ -302,9 +302,6 @@ void probe_cards(int unsafe);
 /* video-vesa.c */
 void vesa_store_edid(void);
 
-/* voyager.c */
-int query_voyager(void);
-
 #endif /* __ASSEMBLY__ */
 
 #endif /* BOOT_BOOT_H */
diff --git a/arch/x86/boot/compressed/Makefile b/arch/x86/boot/compressed/Makefile
index 1771c804e02f..3ca4c194b8e5 100644
--- a/arch/x86/boot/compressed/Makefile
+++ b/arch/x86/boot/compressed/Makefile
@@ -4,7 +4,7 @@
 # create a compressed vmlinux image from the original vmlinux
 #
 
-targets := vmlinux vmlinux.bin vmlinux.bin.gz head_$(BITS).o misc.o piggy.o
+targets := vmlinux vmlinux.bin vmlinux.bin.gz vmlinux.bin.bz2 vmlinux.bin.lzma head_$(BITS).o misc.o piggy.o
 
 KBUILD_CFLAGS := -m$(BITS) -D__KERNEL__ $(LINUX_INCLUDE) -O2
 KBUILD_CFLAGS += -fno-strict-aliasing -fPIC
@@ -47,18 +47,35 @@ ifeq ($(CONFIG_X86_32),y)
 ifdef CONFIG_RELOCATABLE
 $(obj)/vmlinux.bin.gz: $(obj)/vmlinux.bin.all FORCE
         $(call if_changed,gzip)
+$(obj)/vmlinux.bin.bz2: $(obj)/vmlinux.bin.all FORCE
+        $(call if_changed,bzip2)
+$(obj)/vmlinux.bin.lzma: $(obj)/vmlinux.bin.all FORCE
+        $(call if_changed,lzma)
 else
 $(obj)/vmlinux.bin.gz: $(obj)/vmlinux.bin FORCE
         $(call if_changed,gzip)
+$(obj)/vmlinux.bin.bz2: $(obj)/vmlinux.bin FORCE
+        $(call if_changed,bzip2)
+$(obj)/vmlinux.bin.lzma: $(obj)/vmlinux.bin FORCE
+        $(call if_changed,lzma)
 endif
 LDFLAGS_piggy.o := -r --format binary --oformat elf32-i386 -T
 
 else
+
 $(obj)/vmlinux.bin.gz: $(obj)/vmlinux.bin FORCE
         $(call if_changed,gzip)
+$(obj)/vmlinux.bin.bz2: $(obj)/vmlinux.bin FORCE
+        $(call if_changed,bzip2)
+$(obj)/vmlinux.bin.lzma: $(obj)/vmlinux.bin FORCE
+        $(call if_changed,lzma)
 
 LDFLAGS_piggy.o := -r --format binary --oformat elf64-x86-64 -T
 endif
 
-$(obj)/piggy.o: $(obj)/vmlinux.scr $(obj)/vmlinux.bin.gz FORCE
+suffix_$(CONFIG_KERNEL_GZIP)  = gz
+suffix_$(CONFIG_KERNEL_BZIP2) = bz2
+suffix_$(CONFIG_KERNEL_LZMA)  = lzma
+
+$(obj)/piggy.o: $(obj)/vmlinux.scr $(obj)/vmlinux.bin.$(suffix_y) FORCE
         $(call if_changed,ld)
diff --git a/arch/x86/boot/compressed/head_32.S b/arch/x86/boot/compressed/head_32.S
index 29c5fbf08392..3a8a866fb2e2 100644
--- a/arch/x86/boot/compressed/head_32.S
+++ b/arch/x86/boot/compressed/head_32.S
@@ -25,14 +25,12 @@
 
 #include <linux/linkage.h>
 #include <asm/segment.h>
-#include <asm/page.h>
+#include <asm/page_types.h>
 #include <asm/boot.h>
 #include <asm/asm-offsets.h>
 
 .section ".text.head","ax",@progbits
-        .globl startup_32
-
-startup_32:
+ENTRY(startup_32)
         cld
         /* test KEEP_SEGMENTS flag to see if the bootloader is asking
          * us to not reload segments */
@@ -113,6 +111,8 @@ startup_32:
  */
         leal relocated(%ebx), %eax
         jmp *%eax
+ENDPROC(startup_32)
+
 .section ".text"
 relocated:
 
diff --git a/arch/x86/boot/compressed/head_64.S b/arch/x86/boot/compressed/head_64.S
index 1d5dff4123e1..ed4a82948002 100644
--- a/arch/x86/boot/compressed/head_64.S
+++ b/arch/x86/boot/compressed/head_64.S
@@ -26,8 +26,8 @@
 
 #include <linux/linkage.h>
 #include <asm/segment.h>
-#include <asm/pgtable.h>
-#include <asm/page.h>
+#include <asm/pgtable_types.h>
+#include <asm/page_types.h>
 #include <asm/boot.h>
 #include <asm/msr.h>
 #include <asm/processor-flags.h>
@@ -35,9 +35,7 @@
 
 .section ".text.head"
         .code32
-        .globl startup_32
-
-startup_32:
+ENTRY(startup_32)
         cld
         /* test KEEP_SEGMENTS flag to see if the bootloader is asking
          * us to not reload segments */
@@ -176,6 +174,7 @@ startup_32:
 
         /* Jump from 32bit compatibility mode into 64bit mode. */
         lret
+ENDPROC(startup_32)
 
 no_longmode:
         /* This isn't an x86-64 CPU so hang */
@@ -295,7 +294,6 @@ relocated:
         call    decompress_kernel
         popq    %rsi
 
-
 /*
  * Jump to the decompressed kernel.
  */
diff --git a/arch/x86/boot/compressed/misc.c b/arch/x86/boot/compressed/misc.c
index da062216948a..e45be73684ff 100644
--- a/arch/x86/boot/compressed/misc.c
+++ b/arch/x86/boot/compressed/misc.c
@@ -116,71 +116,13 @@
 /*
  * gzip declarations
  */
-
-#define OF(args)        args
 #define STATIC          static
 
 #undef memset
 #undef memcpy
 #define memzero(s, n)   memset((s), 0, (n))
 
-typedef unsigned char   uch;
-typedef unsigned short  ush;
-typedef unsigned long   ulg;
-
-/*
- * Window size must be at least 32k, and a power of two.
- * We don't actually have a window just a huge output buffer,
- * so we report a 2G window size, as that should always be
- * larger than our output buffer:
- */
-#define WSIZE           0x80000000
-
-/* Input buffer: */
-static unsigned char    *inbuf;
-
-/* Sliding window buffer (and final output buffer): */
-static unsigned char    *window;
-
-/* Valid bytes in inbuf: */
-static unsigned         insize;
-
-/* Index of next byte to be processed in inbuf: */
-static unsigned         inptr;
-
-/* Bytes in output buffer: */
-static unsigned         outcnt;
-
-/* gzip flag byte */
-#define ASCII_FLAG      0x01 /* bit 0 set: file probably ASCII text */
-#define CONTINUATION    0x02 /* bit 1 set: continuation of multi-part gz file */
-#define EXTRA_FIELD     0x04 /* bit 2 set: extra field present */
-#define ORIG_NAM        0x08 /* bit 3 set: original file name present */
-#define COMMENT         0x10 /* bit 4 set: file comment present */
-#define ENCRYPTED       0x20 /* bit 5 set: file is encrypted */
-#define RESERVED        0xC0 /* bit 6, 7:  reserved */
-
-#define get_byte()      (inptr < insize ? inbuf[inptr++] : fill_inbuf())
-
-/* Diagnostic functions */
-#ifdef DEBUG
-#  define Assert(cond, msg) do { if (!(cond)) error(msg); } while (0)
-#  define Trace(x)      do { fprintf x; } while (0)
-#  define Tracev(x)     do { if (verbose) fprintf x ; } while (0)
-#  define Tracevv(x)    do { if (verbose > 1) fprintf x ; } while (0)
-#  define Tracec(c, x)  do { if (verbose && (c)) fprintf x ; } while (0)
-#  define Tracecv(c, x) do { if (verbose > 1 && (c)) fprintf x ; } while (0)
-#else
-#  define Assert(cond, msg)
-#  define Trace(x)
-#  define Tracev(x)
-#  define Tracevv(x)
-#  define Tracec(c, x)
-#  define Tracecv(c, x)
-#endif
 
-static int  fill_inbuf(void);
-static void flush_window(void);
 static void error(char *m);
 
 /*
@@ -189,13 +131,8 @@ static void error(char *m);
 static struct boot_params *real_mode;           /* Pointer to real-mode data */
 static int quiet;
 
-extern unsigned char input_data[];
-extern int input_len;
-
-static long bytes_out;
-
 static void *memset(void *s, int c, unsigned n);
-static void *memcpy(void *dest, const void *src, unsigned n);
+void *memcpy(void *dest, const void *src, unsigned n);
 
 static void __putstr(int, const char *);
 #define putstr(__x)  __putstr(0, __x)
@@ -213,7 +150,17 @@ static char *vidmem;
 static int vidport;
 static int lines, cols;
 
-#include "../../../../lib/inflate.c"
+#ifdef CONFIG_KERNEL_GZIP
+#include "../../../../lib/decompress_inflate.c"
+#endif
+
+#ifdef CONFIG_KERNEL_BZIP2
+#include "../../../../lib/decompress_bunzip2.c"
+#endif
+
+#ifdef CONFIG_KERNEL_LZMA
+#include "../../../../lib/decompress_unlzma.c"
+#endif
 
 static void scroll(void)
 {
@@ -282,7 +229,7 @@ static void *memset(void *s, int c, unsigned n)
         return s;
 }
 
-static void *memcpy(void *dest, const void *src, unsigned n)
+void *memcpy(void *dest, const void *src, unsigned n)
 {
         int i;
         const char *s = src;
@@ -293,38 +240,6 @@ static void *memcpy(void *dest, const void *src, unsigned n)
         return dest;
 }
 
-/* ===========================================================================
- * Fill the input buffer. This is called only when the buffer is empty
- * and at least one byte is really needed.
- */
-static int fill_inbuf(void)
-{
-        error("ran out of input data");
-        return 0;
-}
-
-/* ===========================================================================
- * Write the output window window[0..outcnt-1] and update crc and bytes_out.
- * (Used for the decompressed data only.)
- */
-static void flush_window(void)
-{
-        /* With my window equal to my output buffer
-         * I only need to compute the crc here.
-         */
-        unsigned long c = crc;         /* temporary variable */
-        unsigned n;
-        unsigned char *in, ch;
-
-        in = window;
-        for (n = 0; n < outcnt; n++) {
-                ch = *in++;
-                c = crc_32_tab[((int)c ^ ch) & 0xff] ^ (c >> 8);
-        }
-        crc = c;
-        bytes_out += (unsigned long)outcnt;
-        outcnt = 0;
-}
 
 static void error(char *x)
 {
@@ -407,12 +322,8 @@ asmlinkage void decompress_kernel(void *rmode, memptr heap,
         lines = real_mode->screen_info.orig_video_lines;
         cols = real_mode->screen_info.orig_video_cols;
 
-        window = output;                /* Output buffer (Normally at 1M) */
         free_mem_ptr     = heap;        /* Heap */
         free_mem_end_ptr = heap + BOOT_HEAP_SIZE;
-        inbuf  = input_data;            /* Input buffer */
-        insize = input_len;
-        inptr  = 0;
 
 #ifdef CONFIG_X86_64
         if ((unsigned long)output & (__KERNEL_ALIGN - 1))
@@ -430,10 +341,9 @@ asmlinkage void decompress_kernel(void *rmode, memptr heap,
 #endif
 #endif
 
-        makecrc();
         if (!quiet)
                 putstr("\nDecompressing Linux... ");
-        gunzip();
+        decompress(input_data, input_len, NULL, NULL, output, NULL, error);
         parse_elf(output);
         if (!quiet)
                 putstr("done.\nBooting the kernel.\n");
diff --git a/arch/x86/boot/copy.S b/arch/x86/boot/copy.S
index ef50c84e8b4b..11f272c6f5e9 100644
--- a/arch/x86/boot/copy.S
+++ b/arch/x86/boot/copy.S
@@ -8,6 +8,8 @@
  *
  * ----------------------------------------------------------------------- */
 
+#include <linux/linkage.h>
+
 /*
  * Memory copy routines
  */
@@ -15,9 +17,7 @@
         .code16gcc
         .text
 
-        .globl  memcpy
-        .type   memcpy, @function
-memcpy:
+GLOBAL(memcpy)
         pushw   %si
         pushw   %di
         movw    %ax, %di
@@ -31,11 +31,9 @@ memcpy:
         popw    %di
         popw    %si
         ret
-        .size   memcpy, .-memcpy
+ENDPROC(memcpy)
 
-        .globl  memset
-        .type   memset, @function
-memset:
+GLOBAL(memset)
         pushw   %di
         movw    %ax, %di
         movzbl  %dl, %eax
@@ -48,52 +46,42 @@ memset:
         rep; stosb
         popw    %di
         ret
-        .size   memset, .-memset
+ENDPROC(memset)
 
-        .globl  copy_from_fs
-        .type   copy_from_fs, @function
-copy_from_fs:
+GLOBAL(copy_from_fs)
         pushw   %ds
         pushw   %fs
         popw    %ds
         call    memcpy
         popw    %ds
         ret
-        .size   copy_from_fs, .-copy_from_fs
+ENDPROC(copy_from_fs)
 
-        .globl  copy_to_fs
-        .type   copy_to_fs, @function
-copy_to_fs:
+GLOBAL(copy_to_fs)
         pushw   %es
         pushw   %fs
         popw    %es
         call    memcpy
         popw    %es
         ret
-        .size   copy_to_fs, .-copy_to_fs
+ENDPROC(copy_to_fs)
 
 #if 0 /* Not currently used, but can be enabled as needed */
-
-        .globl  copy_from_gs
-        .type   copy_from_gs, @function
-copy_from_gs:
+GLOBAL(copy_from_gs)
         pushw   %ds
         pushw   %gs
         popw    %ds
         call    memcpy
         popw    %ds
         ret
-        .size   copy_from_gs, .-copy_from_gs
-        .globl  copy_to_gs
+ENDPROC(copy_from_gs)
 
-        .type   copy_to_gs, @function
-copy_to_gs:
+GLOBAL(copy_to_gs)
         pushw   %es
         pushw   %gs
         popw    %es
         call    memcpy
         popw    %es
         ret
-        .size   copy_to_gs, .-copy_to_gs
-
+ENDPROC(copy_to_gs)
 #endif
diff --git a/arch/x86/boot/header.S b/arch/x86/boot/header.S
index b993062e9a5f..7ccff4884a23 100644
--- a/arch/x86/boot/header.S
+++ b/arch/x86/boot/header.S
@@ -19,7 +19,7 @@
 #include <linux/utsrelease.h>
 #include <asm/boot.h>
 #include <asm/e820.h>
-#include <asm/page.h>
+#include <asm/page_types.h>
 #include <asm/setup.h>
 #include "boot.h"
 #include "offsets.h"
diff --git a/arch/x86/boot/main.c b/arch/x86/boot/main.c
index 197421db1af1..58f0415d3ae0 100644
--- a/arch/x86/boot/main.c
+++ b/arch/x86/boot/main.c
@@ -149,11 +149,6 @@ void main(void)
         /* Query MCA information */
         query_mca();
 
-        /* Voyager */
-#ifdef CONFIG_X86_VOYAGER
-        query_voyager();
-#endif
-
         /* Query Intel SpeedStep (IST) information */
         query_ist();
 
diff --git a/arch/x86/boot/pmjump.S b/arch/x86/boot/pmjump.S
index 141b6e20ed31..019c17a75851 100644
--- a/arch/x86/boot/pmjump.S
+++ b/arch/x86/boot/pmjump.S
@@ -15,18 +15,15 @@
 #include <asm/boot.h>
 #include <asm/processor-flags.h>
 #include <asm/segment.h>
+#include <linux/linkage.h>
 
         .text
-
-        .globl  protected_mode_jump
-        .type   protected_mode_jump, @function
-
         .code16
 
 /*
  * void protected_mode_jump(u32 entrypoint, u32 bootparams);
  */
-protected_mode_jump:
+GLOBAL(protected_mode_jump)
         movl    %edx, %esi              # Pointer to boot_params table
 
         xorl    %ebx, %ebx
@@ -47,12 +44,10 @@ protected_mode_jump:
         .byte   0x66, 0xea              # ljmpl opcode
 2:      .long   in_pm32                 # offset
         .word   __BOOT_CS               # segment
-
-        .size   protected_mode_jump, .-protected_mode_jump
+ENDPROC(protected_mode_jump)
 
         .code32
-        .type   in_pm32, @function
-in_pm32:
+GLOBAL(in_pm32)
         # Set up data segments for flat 32-bit mode
         movl    %ecx, %ds
         movl    %ecx, %es
@@ -78,5 +73,4 @@ in_pm32:
         lldt    %cx
 
         jmpl    *%eax                   # Jump to the 32-bit entrypoint
-
-        .size   in_pm32, .-in_pm32
+ENDPROC(in_pm32)
diff --git a/arch/x86/boot/voyager.c b/arch/x86/boot/voyager.c
deleted file mode 100644
index 433909d61e5c..000000000000
--- a/arch/x86/boot/voyager.c
+++ /dev/null
@@ -1,40 +0,0 @@
-/* -*- linux-c -*- ------------------------------------------------------- *
- *
- *   Copyright (C) 1991, 1992 Linus Torvalds
- *   Copyright 2007 rPath, Inc. - All Rights Reserved
- *
- *   This file is part of the Linux kernel, and is made available under
- *   the terms of the GNU General Public License version 2.
- *
- * ----------------------------------------------------------------------- */
-
-/*
- * Get the Voyager config information
- */
-
-#include "boot.h"
-
-int query_voyager(void)
-{
-        u8 err;
-        u16 es, di;
-        /* Abuse the apm_bios_info area for this */
-        u8 *data_ptr = (u8 *)&boot_params.apm_bios_info;
-
-        data_ptr[0] = 0xff;     /* Flag on config not found(?) */
-
-        asm("pushw %%es ; "
-            "int $0x15 ; "
-            "setc %0 ; "
-            "movw %%es, %1 ; "
-            "popw %%es"
-            : "=q" (err), "=r" (es), "=D" (di)
-            : "a" (0xffc0));
-
-        if (err)
-                return -1;      /* Not Voyager */
-
-        set_fs(es);
-        copy_from_fs(data_ptr, di, 7);  /* Table is 7 bytes apparently */
-        return 0;
-}
diff --git a/arch/x86/configs/i386_defconfig b/arch/x86/configs/i386_defconfig
index edba00d98ac3..235b81d0f6f2 100644
--- a/arch/x86/configs/i386_defconfig
+++ b/arch/x86/configs/i386_defconfig
@@ -1,14 +1,13 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.27-rc5
-# Wed Sep  3 17:23:09 2008
+# Linux kernel version: 2.6.29-rc4
+# Tue Feb 24 15:50:58 2009
 #
 # CONFIG_64BIT is not set
 CONFIG_X86_32=y
 # CONFIG_X86_64 is not set
 CONFIG_X86=y
 CONFIG_ARCH_DEFCONFIG="arch/x86/configs/i386_defconfig"
-# CONFIG_GENERIC_LOCKBREAK is not set
 CONFIG_GENERIC_TIME=y
 CONFIG_GENERIC_CMOS_UPDATE=y
 CONFIG_CLOCKSOURCE_WATCHDOG=y
@@ -24,16 +23,14 @@ CONFIG_GENERIC_ISA_DMA=y
 CONFIG_GENERIC_IOMAP=y
 CONFIG_GENERIC_BUG=y
 CONFIG_GENERIC_HWEIGHT=y
-# CONFIG_GENERIC_GPIO is not set
 CONFIG_ARCH_MAY_HAVE_PC_FDC=y
 # CONFIG_RWSEM_GENERIC_SPINLOCK is not set
 CONFIG_RWSEM_XCHGADD_ALGORITHM=y
-# CONFIG_ARCH_HAS_ILOG2_U32 is not set
-# CONFIG_ARCH_HAS_ILOG2_U64 is not set
 CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
 CONFIG_GENERIC_CALIBRATE_DELAY=y
 # CONFIG_GENERIC_TIME_VSYSCALL is not set
 CONFIG_ARCH_HAS_CPU_RELAX=y
+CONFIG_ARCH_HAS_DEFAULT_IDLE=y
 CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y
 CONFIG_HAVE_SETUP_PER_CPU_AREA=y
 # CONFIG_HAVE_CPUMASK_OF_CPU_MAP is not set
@@ -42,12 +39,12 @@ CONFIG_ARCH_SUSPEND_POSSIBLE=y
 # CONFIG_ZONE_DMA32 is not set
 CONFIG_ARCH_POPULATES_NODE_MAP=y
 # CONFIG_AUDIT_ARCH is not set
-CONFIG_ARCH_SUPPORTS_AOUT=y
 CONFIG_ARCH_SUPPORTS_OPTIMIZED_INLINING=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_GENERIC_IRQ_PROBE=y
 CONFIG_GENERIC_PENDING_IRQ=y
 CONFIG_X86_SMP=y
+CONFIG_USE_GENERIC_SMP_HELPERS=y
 CONFIG_X86_32_SMP=y
 CONFIG_X86_HT=y
 CONFIG_X86_BIOS_REBOOT=y
@@ -76,30 +73,44 @@ CONFIG_TASK_IO_ACCOUNTING=y
 CONFIG_AUDIT=y
 CONFIG_AUDITSYSCALL=y
 CONFIG_AUDIT_TREE=y
+
+#
+# RCU Subsystem
+#
+# CONFIG_CLASSIC_RCU is not set
+CONFIG_TREE_RCU=y
+# CONFIG_PREEMPT_RCU is not set
+# CONFIG_RCU_TRACE is not set
+CONFIG_RCU_FANOUT=32
+# CONFIG_RCU_FANOUT_EXACT is not set
+# CONFIG_TREE_RCU_TRACE is not set
+# CONFIG_PREEMPT_RCU_TRACE is not set
 # CONFIG_IKCONFIG is not set
 CONFIG_LOG_BUF_SHIFT=18
-CONFIG_CGROUPS=y
-# CONFIG_CGROUP_DEBUG is not set
-CONFIG_CGROUP_NS=y
-# CONFIG_CGROUP_DEVICE is not set
-CONFIG_CPUSETS=y
 CONFIG_HAVE_UNSTABLE_SCHED_CLOCK=y
 CONFIG_GROUP_SCHED=y
 CONFIG_FAIR_GROUP_SCHED=y
 # CONFIG_RT_GROUP_SCHED is not set
 # CONFIG_USER_SCHED is not set
 CONFIG_CGROUP_SCHED=y
+CONFIG_CGROUPS=y
+# CONFIG_CGROUP_DEBUG is not set
+CONFIG_CGROUP_NS=y
+CONFIG_CGROUP_FREEZER=y
+# CONFIG_CGROUP_DEVICE is not set
+CONFIG_CPUSETS=y
+CONFIG_PROC_PID_CPUSET=y
 CONFIG_CGROUP_CPUACCT=y
 CONFIG_RESOURCE_COUNTERS=y
 # CONFIG_CGROUP_MEM_RES_CTLR is not set
 # CONFIG_SYSFS_DEPRECATED_V2 is not set
-CONFIG_PROC_PID_CPUSET=y
 CONFIG_RELAY=y
 CONFIG_NAMESPACES=y
 CONFIG_UTS_NS=y
 CONFIG_IPC_NS=y
 CONFIG_USER_NS=y
 CONFIG_PID_NS=y
+CONFIG_NET_NS=y
 CONFIG_BLK_DEV_INITRD=y
 CONFIG_INITRAMFS_SOURCE=""
 CONFIG_CC_OPTIMIZE_FOR_SIZE=y
@@ -124,12 +135,15 @@ CONFIG_SIGNALFD=y
 CONFIG_TIMERFD=y
 CONFIG_EVENTFD=y
 CONFIG_SHMEM=y
+CONFIG_AIO=y
 CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_PCI_QUIRKS=y
 CONFIG_SLUB_DEBUG=y
 # CONFIG_SLAB is not set
 CONFIG_SLUB=y
 # CONFIG_SLOB is not set
 CONFIG_PROFILING=y
+CONFIG_TRACEPOINTS=y
 CONFIG_MARKERS=y
 # CONFIG_OPROFILE is not set
 CONFIG_HAVE_OPROFILE=y
@@ -139,15 +153,10 @@ CONFIG_KRETPROBES=y
 CONFIG_HAVE_IOREMAP_PROT=y
 CONFIG_HAVE_KPROBES=y
 CONFIG_HAVE_KRETPROBES=y
-# CONFIG_HAVE_ARCH_TRACEHOOK is not set
-# CONFIG_HAVE_DMA_ATTRS is not set
-CONFIG_USE_GENERIC_SMP_HELPERS=y
-# CONFIG_HAVE_CLK is not set
-CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_HAVE_ARCH_TRACEHOOK=y
 CONFIG_HAVE_GENERIC_DMA_COHERENT=y
 CONFIG_SLABINFO=y
 CONFIG_RT_MUTEXES=y
-# CONFIG_TINY_SHMEM is not set
 CONFIG_BASE_SMALL=0
 CONFIG_MODULES=y
 # CONFIG_MODULE_FORCE_LOAD is not set
@@ -155,12 +164,10 @@ CONFIG_MODULE_UNLOAD=y
 CONFIG_MODULE_FORCE_UNLOAD=y
 # CONFIG_MODVERSIONS is not set
 # CONFIG_MODULE_SRCVERSION_ALL is not set
-CONFIG_KMOD=y
 CONFIG_STOP_MACHINE=y
 CONFIG_BLOCK=y
 # CONFIG_LBD is not set
 CONFIG_BLK_DEV_IO_TRACE=y
-# CONFIG_LSF is not set
 CONFIG_BLK_DEV_BSG=y
 # CONFIG_BLK_DEV_INTEGRITY is not set
 
@@ -176,7 +183,7 @@ CONFIG_IOSCHED_CFQ=y
 CONFIG_DEFAULT_CFQ=y
 # CONFIG_DEFAULT_NOOP is not set
 CONFIG_DEFAULT_IOSCHED="cfq"
-CONFIG_CLASSIC_RCU=y
+CONFIG_FREEZER=y
 
 #
 # Processor type and features
@@ -186,15 +193,14 @@ CONFIG_NO_HZ=y
 CONFIG_HIGH_RES_TIMERS=y
 CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
 CONFIG_SMP=y
+CONFIG_SPARSE_IRQ=y
 CONFIG_X86_FIND_SMP_CONFIG=y
 CONFIG_X86_MPPARSE=y
-CONFIG_X86_PC=y
 # CONFIG_X86_ELAN is not set
-# CONFIG_X86_VOYAGER is not set
 # CONFIG_X86_GENERICARCH is not set
 # CONFIG_X86_VSMP is not set
 # CONFIG_X86_RDC321X is not set
-CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
+CONFIG_SCHED_OMIT_FRAME_POINTER=y
 # CONFIG_PARAVIRT_GUEST is not set
 # CONFIG_MEMTEST is not set
 # CONFIG_M386 is not set
@@ -238,10 +244,19 @@ CONFIG_X86_TSC=y
 CONFIG_X86_CMOV=y
 CONFIG_X86_MINIMUM_CPU_FAMILY=4
 CONFIG_X86_DEBUGCTLMSR=y
+CONFIG_CPU_SUP_INTEL=y
+CONFIG_CPU_SUP_CYRIX_32=y
+CONFIG_CPU_SUP_AMD=y
+CONFIG_CPU_SUP_CENTAUR_32=y
+CONFIG_CPU_SUP_TRANSMETA_32=y
+CONFIG_CPU_SUP_UMC_32=y
+CONFIG_X86_DS=y
+CONFIG_X86_PTRACE_BTS=y
 CONFIG_HPET_TIMER=y
 CONFIG_HPET_EMULATE_RTC=y
 CONFIG_DMI=y
 # CONFIG_IOMMU_HELPER is not set
+# CONFIG_IOMMU_API is not set
 CONFIG_NR_CPUS=64
 CONFIG_SCHED_SMT=y
 CONFIG_SCHED_MC=y
@@ -250,12 +265,17 @@ CONFIG_PREEMPT_VOLUNTARY=y
 # CONFIG_PREEMPT is not set
 CONFIG_X86_LOCAL_APIC=y
 CONFIG_X86_IO_APIC=y
-# CONFIG_X86_MCE is not set
+CONFIG_X86_REROUTE_FOR_BROKEN_BOOT_IRQS=y
+CONFIG_X86_MCE=y
+CONFIG_X86_MCE_NONFATAL=y
+CONFIG_X86_MCE_P4THERMAL=y
 CONFIG_VM86=y
 # CONFIG_TOSHIBA is not set
 # CONFIG_I8K is not set
 CONFIG_X86_REBOOTFIXUPS=y
 CONFIG_MICROCODE=y
+CONFIG_MICROCODE_INTEL=y
+CONFIG_MICROCODE_AMD=y
 CONFIG_MICROCODE_OLD_INTERFACE=y
 CONFIG_X86_MSR=y
 CONFIG_X86_CPUID=y
@@ -264,6 +284,7 @@ CONFIG_HIGHMEM4G=y
 # CONFIG_HIGHMEM64G is not set
 CONFIG_PAGE_OFFSET=0xC0000000
 CONFIG_HIGHMEM=y
+# CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set
 CONFIG_ARCH_FLATMEM_ENABLE=y
 CONFIG_ARCH_SPARSEMEM_ENABLE=y
 CONFIG_ARCH_SELECT_MEMORY_MODEL=y
@@ -274,14 +295,17 @@ CONFIG_FLATMEM_MANUAL=y
 CONFIG_FLATMEM=y
 CONFIG_FLAT_NODE_MEM_MAP=y
 CONFIG_SPARSEMEM_STATIC=y
-# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
 CONFIG_PAGEFLAGS_EXTENDED=y
 CONFIG_SPLIT_PTLOCK_CPUS=4
-CONFIG_RESOURCES_64BIT=y
+# CONFIG_PHYS_ADDR_T_64BIT is not set
 CONFIG_ZONE_DMA_FLAG=1
 CONFIG_BOUNCE=y
 CONFIG_VIRT_TO_BUS=y
+CONFIG_UNEVICTABLE_LRU=y
 CONFIG_HIGHPTE=y
+CONFIG_X86_CHECK_BIOS_CORRUPTION=y
+CONFIG_X86_BOOTPARAM_MEMORY_CORRUPTION_CHECK=y
+CONFIG_X86_RESERVE_LOW_64K=y
 # CONFIG_MATH_EMULATION is not set
 CONFIG_MTRR=y
 # CONFIG_MTRR_SANITIZER is not set
@@ -302,10 +326,11 @@ CONFIG_PHYSICAL_START=0x1000000
 CONFIG_PHYSICAL_ALIGN=0x200000
 CONFIG_HOTPLUG_CPU=y
 # CONFIG_COMPAT_VDSO is not set
+# CONFIG_CMDLINE_BOOL is not set
 CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
 
 #
-# Power management options
+# Power management and ACPI options
 #
 CONFIG_PM=y
 CONFIG_PM_DEBUG=y
@@ -331,19 +356,13 @@ CONFIG_ACPI_BATTERY=y
 CONFIG_ACPI_BUTTON=y
 CONFIG_ACPI_FAN=y
 CONFIG_ACPI_DOCK=y
-# CONFIG_ACPI_BAY is not set
 CONFIG_ACPI_PROCESSOR=y
 CONFIG_ACPI_HOTPLUG_CPU=y
 CONFIG_ACPI_THERMAL=y
-# CONFIG_ACPI_WMI is not set
-# CONFIG_ACPI_ASUS is not set
-# CONFIG_ACPI_TOSHIBA is not set
 # CONFIG_ACPI_CUSTOM_DSDT is not set
 CONFIG_ACPI_BLACKLIST_YEAR=0
 # CONFIG_ACPI_DEBUG is not set
-CONFIG_ACPI_EC=y
 # CONFIG_ACPI_PCI_SLOT is not set
-CONFIG_ACPI_POWER=y
 CONFIG_ACPI_SYSTEM=y
 CONFIG_X86_PM_TIMER=y
 CONFIG_ACPI_CONTAINER=y
@@ -388,7 +407,6 @@ CONFIG_X86_ACPI_CPUFREQ=y
 #
 # shared options
 #
-# CONFIG_X86_ACPI_CPUFREQ_PROC_INTF is not set
 # CONFIG_X86_SPEEDSTEP_LIB is not set
 CONFIG_CPU_IDLE=y
 CONFIG_CPU_IDLE_GOV_LADDER=y
@@ -415,6 +433,7 @@ CONFIG_ARCH_SUPPORTS_MSI=y
 CONFIG_PCI_MSI=y
 # CONFIG_PCI_LEGACY is not set
 # CONFIG_PCI_DEBUG is not set
+# CONFIG_PCI_STUB is not set
 CONFIG_HT_IRQ=y
 CONFIG_ISA_DMA_API=y
 # CONFIG_ISA is not set
@@ -452,13 +471,17 @@ CONFIG_HOTPLUG_PCI=y
 # Executable file formats / Emulations
 #
 CONFIG_BINFMT_ELF=y
+CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS=y
+CONFIG_HAVE_AOUT=y
 # CONFIG_BINFMT_AOUT is not set
 CONFIG_BINFMT_MISC=y
+CONFIG_HAVE_ATOMIC_IOMAP=y
 CONFIG_NET=y
 
 #
 # Networking options
 #
+CONFIG_COMPAT_NET_DEV_OPS=y
 CONFIG_PACKET=y
 CONFIG_PACKET_MMAP=y
 CONFIG_UNIX=y
@@ -519,7 +542,6 @@ CONFIG_DEFAULT_CUBIC=y
 # CONFIG_DEFAULT_RENO is not set
 CONFIG_DEFAULT_TCP_CONG="cubic"
 CONFIG_TCP_MD5SIG=y
-# CONFIG_IP_VS is not set
 CONFIG_IPV6=y
 # CONFIG_IPV6_PRIVACY is not set
 # CONFIG_IPV6_ROUTER_PREF is not set
@@ -557,19 +579,21 @@ CONFIG_NF_CONNTRACK_IRC=y
 CONFIG_NF_CONNTRACK_SIP=y
 CONFIG_NF_CT_NETLINK=y
 CONFIG_NETFILTER_XTABLES=y
+CONFIG_NETFILTER_XT_TARGET_CONNSECMARK=y
 CONFIG_NETFILTER_XT_TARGET_MARK=y
 CONFIG_NETFILTER_XT_TARGET_NFLOG=y
 CONFIG_NETFILTER_XT_TARGET_SECMARK=y
-CONFIG_NETFILTER_XT_TARGET_CONNSECMARK=y
 CONFIG_NETFILTER_XT_TARGET_TCPMSS=y
 CONFIG_NETFILTER_XT_MATCH_CONNTRACK=y
 CONFIG_NETFILTER_XT_MATCH_MARK=y
 CONFIG_NETFILTER_XT_MATCH_POLICY=y
 CONFIG_NETFILTER_XT_MATCH_STATE=y
+# CONFIG_IP_VS is not set
 
 #
 # IP: Netfilter Configuration
 #
+CONFIG_NF_DEFRAG_IPV4=y
 CONFIG_NF_CONNTRACK_IPV4=y
 CONFIG_NF_CONNTRACK_PROC_COMPAT=y
 CONFIG_IP_NF_IPTABLES=y
@@ -595,8 +619,8 @@ CONFIG_IP_NF_MANGLE=y
 CONFIG_NF_CONNTRACK_IPV6=y
 CONFIG_IP6_NF_IPTABLES=y
 CONFIG_IP6_NF_MATCH_IPV6HEADER=y
-CONFIG_IP6_NF_FILTER=y
 CONFIG_IP6_NF_TARGET_LOG=y
+CONFIG_IP6_NF_FILTER=y
 CONFIG_IP6_NF_TARGET_REJECT=y
 CONFIG_IP6_NF_MANGLE=y
 # CONFIG_IP_DCCP is not set
@@ -604,6 +628,7 @@ CONFIG_IP6_NF_MANGLE=y
 # CONFIG_TIPC is not set
 # CONFIG_ATM is not set
 # CONFIG_BRIDGE is not set
+# CONFIG_NET_DSA is not set
 # CONFIG_VLAN_8021Q is not set
 # CONFIG_DECNET is not set
 CONFIG_LLC=y
@@ -623,6 +648,7 @@ CONFIG_NET_SCHED=y
 # CONFIG_NET_SCH_HTB is not set
 # CONFIG_NET_SCH_HFSC is not set
 # CONFIG_NET_SCH_PRIO is not set
+# CONFIG_NET_SCH_MULTIQ is not set
 # CONFIG_NET_SCH_RED is not set
 # CONFIG_NET_SCH_SFQ is not set
 # CONFIG_NET_SCH_TEQL is not set
@@ -630,6 +656,7 @@ CONFIG_NET_SCHED=y
 # CONFIG_NET_SCH_GRED is not set
 # CONFIG_NET_SCH_DSMARK is not set
 # CONFIG_NET_SCH_NETEM is not set
+# CONFIG_NET_SCH_DRR is not set
 # CONFIG_NET_SCH_INGRESS is not set
 
 #
@@ -644,6 +671,7 @@ CONFIG_NET_CLS=y
 # CONFIG_NET_CLS_RSVP is not set
 # CONFIG_NET_CLS_RSVP6 is not set
 # CONFIG_NET_CLS_FLOW is not set
+# CONFIG_NET_CLS_CGROUP is not set
 CONFIG_NET_EMATCH=y
 CONFIG_NET_EMATCH_STACK=32
 # CONFIG_NET_EMATCH_CMP is not set
@@ -659,7 +687,9 @@ CONFIG_NET_CLS_ACT=y
 # CONFIG_NET_ACT_NAT is not set
 # CONFIG_NET_ACT_PEDIT is not set
 # CONFIG_NET_ACT_SIMP is not set
+# CONFIG_NET_ACT_SKBEDIT is not set
 CONFIG_NET_SCH_FIFO=y
+# CONFIG_DCB is not set
 
 #
 # Network testing
@@ -676,29 +706,33 @@ CONFIG_HAMRADIO=y
 # CONFIG_IRDA is not set
 # CONFIG_BT is not set
 # CONFIG_AF_RXRPC is not set
+# CONFIG_PHONET is not set
 CONFIG_FIB_RULES=y
-
-#
-# Wireless
-#
+CONFIG_WIRELESS=y
 CONFIG_CFG80211=y
+# CONFIG_CFG80211_REG_DEBUG is not set
 CONFIG_NL80211=y
+CONFIG_WIRELESS_OLD_REGULATORY=y
 CONFIG_WIRELESS_EXT=y
 CONFIG_WIRELESS_EXT_SYSFS=y
+# CONFIG_LIB80211 is not set
 CONFIG_MAC80211=y
 
 #
 # Rate control algorithm selection
 #
-CONFIG_MAC80211_RC_PID=y
-CONFIG_MAC80211_RC_DEFAULT_PID=y
-CONFIG_MAC80211_RC_DEFAULT="pid"
+CONFIG_MAC80211_RC_MINSTREL=y
+# CONFIG_MAC80211_RC_DEFAULT_PID is not set
+CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y
+CONFIG_MAC80211_RC_DEFAULT="minstrel"
 # CONFIG_MAC80211_MESH is not set
 CONFIG_MAC80211_LEDS=y
 # CONFIG_MAC80211_DEBUGFS is not set
 # CONFIG_MAC80211_DEBUG_MENU is not set
-# CONFIG_IEEE80211 is not set
-# CONFIG_RFKILL is not set
+# CONFIG_WIMAX is not set
+CONFIG_RFKILL=y
+# CONFIG_RFKILL_INPUT is not set
+CONFIG_RFKILL_LEDS=y
 # CONFIG_NET_9P is not set
 
 #
@@ -722,7 +756,7 @@ CONFIG_PROC_EVENTS=y
 # CONFIG_MTD is not set
 # CONFIG_PARPORT is not set
 CONFIG_PNP=y
-# CONFIG_PNP_DEBUG is not set
+CONFIG_PNP_DEBUG_MESSAGES=y
 
 #
 # Protocols
@@ -750,20 +784,19 @@ CONFIG_BLK_DEV_RAM_SIZE=16384
 CONFIG_MISC_DEVICES=y
 # CONFIG_IBM_ASM is not set
 # CONFIG_PHANTOM is not set
-# CONFIG_EEPROM_93CX6 is not set
 # CONFIG_SGI_IOC4 is not set
 # CONFIG_TIFM_CORE is not set
-# CONFIG_ACER_WMI is not set
-# CONFIG_ASUS_LAPTOP is not set
-# CONFIG_FUJITSU_LAPTOP is not set
-# CONFIG_TC1100_WMI is not set
-# CONFIG_MSI_LAPTOP is not set
-# CONFIG_COMPAL_LAPTOP is not set
-# CONFIG_SONY_LAPTOP is not set
-# CONFIG_THINKPAD_ACPI is not set
-# CONFIG_INTEL_MENLOW is not set
+# CONFIG_ICS932S401 is not set
 # CONFIG_ENCLOSURE_SERVICES is not set
 # CONFIG_HP_ILO is not set
+# CONFIG_C2PORT is not set
+
+#
+# EEPROM support
+#
+# CONFIG_EEPROM_AT24 is not set
+# CONFIG_EEPROM_LEGACY is not set
+# CONFIG_EEPROM_93CX6 is not set
 CONFIG_HAVE_IDE=y
 # CONFIG_IDE is not set
 
@@ -802,7 +835,7 @@ CONFIG_SCSI_WAIT_SCAN=m
 #
 CONFIG_SCSI_SPI_ATTRS=y
 # CONFIG_SCSI_FC_ATTRS is not set
-CONFIG_SCSI_ISCSI_ATTRS=y
+# CONFIG_SCSI_ISCSI_ATTRS is not set
 # CONFIG_SCSI_SAS_ATTRS is not set
 # CONFIG_SCSI_SAS_LIBSAS is not set
 # CONFIG_SCSI_SRP_ATTRS is not set
@@ -875,6 +908,7 @@ CONFIG_PATA_OLDPIIX=y
 CONFIG_PATA_SCH=y
 CONFIG_MD=y
 CONFIG_BLK_DEV_MD=y
+CONFIG_MD_AUTODETECT=y
 # CONFIG_MD_LINEAR is not set
 # CONFIG_MD_RAID0 is not set
 # CONFIG_MD_RAID1 is not set
@@ -930,6 +964,9 @@ CONFIG_PHYLIB=y
 # CONFIG_BROADCOM_PHY is not set
 # CONFIG_ICPLUS_PHY is not set
 # CONFIG_REALTEK_PHY is not set
+# CONFIG_NATIONAL_PHY is not set
+# CONFIG_STE10XP is not set
+# CONFIG_LSI_ET1011C_PHY is not set
 # CONFIG_FIXED_PHY is not set
 # CONFIG_MDIO_BITBANG is not set
 CONFIG_NET_ETHERNET=y
@@ -953,6 +990,9 @@ CONFIG_NET_TULIP=y
 # CONFIG_IBM_NEW_EMAC_RGMII is not set
 # CONFIG_IBM_NEW_EMAC_TAH is not set
 # CONFIG_IBM_NEW_EMAC_EMAC4 is not set
+# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
+# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
+# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
 CONFIG_NET_PCI=y
 # CONFIG_PCNET32 is not set
 # CONFIG_AMD8111_ETH is not set
@@ -960,7 +1000,6 @@ CONFIG_NET_PCI=y
 # CONFIG_B44 is not set
 CONFIG_FORCEDETH=y
 # CONFIG_FORCEDETH_NAPI is not set
-# CONFIG_EEPRO100 is not set
 CONFIG_E100=y
 # CONFIG_FEALNX is not set
 # CONFIG_NATSEMI is not set
@@ -974,15 +1013,16 @@ CONFIG_8139TOO=y
 # CONFIG_R6040 is not set
 # CONFIG_SIS900 is not set
 # CONFIG_EPIC100 is not set
+# CONFIG_SMSC9420 is not set
 # CONFIG_SUNDANCE is not set
 # CONFIG_TLAN is not set
 # CONFIG_VIA_RHINE is not set
 # CONFIG_SC92031 is not set
+# CONFIG_ATL2 is not set
 CONFIG_NETDEV_1000=y
 # CONFIG_ACENIC is not set
 # CONFIG_DL2K is not set
 CONFIG_E1000=y
-# CONFIG_E1000_DISABLE_PACKET_SPLIT is not set
 CONFIG_E1000E=y
 # CONFIG_IP1000 is not set
 # CONFIG_IGB is not set
@@ -1000,18 +1040,23 @@ CONFIG_BNX2=y
 # CONFIG_QLA3XXX is not set
 # CONFIG_ATL1 is not set
 # CONFIG_ATL1E is not set
+# CONFIG_JME is not set
 CONFIG_NETDEV_10000=y
 # CONFIG_CHELSIO_T1 is not set
+CONFIG_CHELSIO_T3_DEPENDS=y
 # CONFIG_CHELSIO_T3 is not set
+# CONFIG_ENIC is not set
 # CONFIG_IXGBE is not set
 # CONFIG_IXGB is not set
 # CONFIG_S2IO is not set
 # CONFIG_MYRI10GE is not set
 # CONFIG_NETXEN_NIC is not set
 # CONFIG_NIU is not set
+# CONFIG_MLX4_EN is not set
 # CONFIG_MLX4_CORE is not set
 # CONFIG_TEHUTI is not set
 # CONFIG_BNX2X is not set
+# CONFIG_QLGE is not set
 # CONFIG_SFC is not set
 CONFIG_TR=y
 # CONFIG_IBMOL is not set
@@ -1025,9 +1070,8 @@ CONFIG_TR=y
 # CONFIG_WLAN_PRE80211 is not set
 CONFIG_WLAN_80211=y
 # CONFIG_PCMCIA_RAYCS is not set
-# CONFIG_IPW2100 is not set
-# CONFIG_IPW2200 is not set
 # CONFIG_LIBERTAS is not set
+# CONFIG_LIBERTAS_THINFIRM is not set
 # CONFIG_AIRO is not set
 # CONFIG_HERMES is not set
 # CONFIG_ATMEL is not set
@@ -1044,6 +1088,8 @@ CONFIG_WLAN_80211=y
 CONFIG_ATH5K=y
 # CONFIG_ATH5K_DEBUG is not set
 # CONFIG_ATH9K is not set
+# CONFIG_IPW2100 is not set
+# CONFIG_IPW2200 is not set
 # CONFIG_IWLCORE is not set
 # CONFIG_IWLWIFI_LEDS is not set
 # CONFIG_IWLAGN is not set
@@ -1055,6 +1101,10 @@ CONFIG_ATH5K=y
 # CONFIG_RT2X00 is not set
 
 #
+# Enable WiMAX (Networking options) to see the WiMAX drivers
+#
+
+#
 # USB Network Adapters
 #
 # CONFIG_USB_CATC is not set
@@ -1062,6 +1112,7 @@ CONFIG_ATH5K=y
 # CONFIG_USB_PEGASUS is not set
 # CONFIG_USB_RTL8150 is not set
 # CONFIG_USB_USBNET is not set
+# CONFIG_USB_HSO is not set
 CONFIG_NET_PCMCIA=y
 # CONFIG_PCMCIA_3C589 is not set
 # CONFIG_PCMCIA_3C574 is not set
@@ -1123,6 +1174,7 @@ CONFIG_MOUSE_PS2_LOGIPS2PP=y
 CONFIG_MOUSE_PS2_SYNAPTICS=y
 CONFIG_MOUSE_PS2_LIFEBOOK=y
 CONFIG_MOUSE_PS2_TRACKPOINT=y
+# CONFIG_MOUSE_PS2_ELANTECH is not set
 # CONFIG_MOUSE_PS2_TOUCHKIT is not set
 # CONFIG_MOUSE_SERIAL is not set
 # CONFIG_MOUSE_APPLETOUCH is not set
@@ -1160,15 +1212,16 @@ CONFIG_INPUT_TOUCHSCREEN=y
 # CONFIG_TOUCHSCREEN_FUJITSU is not set
 # CONFIG_TOUCHSCREEN_GUNZE is not set
 # CONFIG_TOUCHSCREEN_ELO is not set
+# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set
 # CONFIG_TOUCHSCREEN_MTOUCH is not set
 # CONFIG_TOUCHSCREEN_INEXIO is not set
 # CONFIG_TOUCHSCREEN_MK712 is not set
 # CONFIG_TOUCHSCREEN_PENMOUNT is not set
 # CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
 # CONFIG_TOUCHSCREEN_TOUCHWIN is not set
-# CONFIG_TOUCHSCREEN_UCB1400 is not set
 # CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set
 # CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
+# CONFIG_TOUCHSCREEN_TSC2007 is not set
 CONFIG_INPUT_MISC=y
 # CONFIG_INPUT_PCSPKR is not set
 # CONFIG_INPUT_APANEL is not set
@@ -1179,6 +1232,7 @@ CONFIG_INPUT_MISC=y
 # CONFIG_INPUT_KEYSPAN_REMOTE is not set
 # CONFIG_INPUT_POWERMATE is not set
 # CONFIG_INPUT_YEALINK is not set
+# CONFIG_INPUT_CM109 is not set
 # CONFIG_INPUT_UINPUT is not set
 
 #
@@ -1245,6 +1299,7 @@ CONFIG_SERIAL_CORE=y
 CONFIG_SERIAL_CORE_CONSOLE=y
 # CONFIG_SERIAL_JSM is not set
 CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
 # CONFIG_LEGACY_PTYS is not set
 # CONFIG_IPMI_HANDLER is not set
 CONFIG_HW_RANDOM=y
@@ -1279,6 +1334,7 @@ CONFIG_I2C=y
 CONFIG_I2C_BOARDINFO=y
 # CONFIG_I2C_CHARDEV is not set
 CONFIG_I2C_HELPER_AUTO=y
+CONFIG_I2C_ALGOBIT=y
 
 #
 # I2C Hardware Bus support
@@ -1331,8 +1387,6 @@ CONFIG_I2C_I801=y
 # Miscellaneous I2C Chip support
 #
 # CONFIG_DS1682 is not set
-# CONFIG_EEPROM_AT24 is not set
-# CONFIG_EEPROM_LEGACY is not set
 # CONFIG_SENSORS_PCF8574 is not set
 # CONFIG_PCF8575 is not set
 # CONFIG_SENSORS_PCA9539 is not set
@@ -1351,8 +1405,78 @@ CONFIG_POWER_SUPPLY=y
 # CONFIG_POWER_SUPPLY_DEBUG is not set
 # CONFIG_PDA_POWER is not set
 # CONFIG_BATTERY_DS2760 is not set
-# CONFIG_HWMON is not set
+# CONFIG_BATTERY_BQ27x00 is not set
+CONFIG_HWMON=y
+# CONFIG_HWMON_VID is not set
+# CONFIG_SENSORS_ABITUGURU is not set
+# CONFIG_SENSORS_ABITUGURU3 is not set
+# CONFIG_SENSORS_AD7414 is not set
+# CONFIG_SENSORS_AD7418 is not set
+# CONFIG_SENSORS_ADM1021 is not set
+# CONFIG_SENSORS_ADM1025 is not set
+# CONFIG_SENSORS_ADM1026 is not set
+# CONFIG_SENSORS_ADM1029 is not set
+# CONFIG_SENSORS_ADM1031 is not set
+# CONFIG_SENSORS_ADM9240 is not set
+# CONFIG_SENSORS_ADT7462 is not set
+# CONFIG_SENSORS_ADT7470 is not set
+# CONFIG_SENSORS_ADT7473 is not set
+# CONFIG_SENSORS_ADT7475 is not set
+# CONFIG_SENSORS_K8TEMP is not set
+# CONFIG_SENSORS_ASB100 is not set
+# CONFIG_SENSORS_ATXP1 is not set
+# CONFIG_SENSORS_DS1621 is not set
+# CONFIG_SENSORS_I5K_AMB is not set
+# CONFIG_SENSORS_F71805F is not set
+# CONFIG_SENSORS_F71882FG is not set
+# CONFIG_SENSORS_F75375S is not set
+# CONFIG_SENSORS_FSCHER is not set
+# CONFIG_SENSORS_FSCPOS is not set
+# CONFIG_SENSORS_FSCHMD is not set
+# CONFIG_SENSORS_GL518SM is not set
+# CONFIG_SENSORS_GL520SM is not set
+# CONFIG_SENSORS_CORETEMP is not set
+# CONFIG_SENSORS_IT87 is not set
+# CONFIG_SENSORS_LM63 is not set
+# CONFIG_SENSORS_LM75 is not set
+# CONFIG_SENSORS_LM77 is not set
+# CONFIG_SENSORS_LM78 is not set
+# CONFIG_SENSORS_LM80 is not set
+# CONFIG_SENSORS_LM83 is not set
+# CONFIG_SENSORS_LM85 is not set
+# CONFIG_SENSORS_LM87 is not set
+# CONFIG_SENSORS_LM90 is not set
+# CONFIG_SENSORS_LM92 is not set
+# CONFIG_SENSORS_LM93 is not set
+# CONFIG_SENSORS_LTC4245 is not set
+# CONFIG_SENSORS_MAX1619 is not set
+# CONFIG_SENSORS_MAX6650 is not set
+# CONFIG_SENSORS_PC87360 is not set
+# CONFIG_SENSORS_PC87427 is not set
+# CONFIG_SENSORS_SIS5595 is not set
+# CONFIG_SENSORS_DME1737 is not set
+# CONFIG_SENSORS_SMSC47M1 is not set
+# CONFIG_SENSORS_SMSC47M192 is not set
+# CONFIG_SENSORS_SMSC47B397 is not set
+# CONFIG_SENSORS_ADS7828 is not set
+# CONFIG_SENSORS_THMC50 is not set
+# CONFIG_SENSORS_VIA686A is not set
+# CONFIG_SENSORS_VT1211 is not set
+# CONFIG_SENSORS_VT8231 is not set
+# CONFIG_SENSORS_W83781D is not set
+# CONFIG_SENSORS_W83791D is not set
+# CONFIG_SENSORS_W83792D is not set
+# CONFIG_SENSORS_W83793 is not set
+# CONFIG_SENSORS_W83L785TS is not set
+# CONFIG_SENSORS_W83L786NG is not set
+# CONFIG_SENSORS_W83627HF is not set
+# CONFIG_SENSORS_W83627EHF is not set
+# CONFIG_SENSORS_HDAPS is not set
+# CONFIG_SENSORS_LIS3LV02D is not set
+# CONFIG_SENSORS_APPLESMC is not set
+# CONFIG_HWMON_DEBUG_CHIP is not set
 CONFIG_THERMAL=y
+# CONFIG_THERMAL_HWMON is not set
 CONFIG_WATCHDOG=y
 # CONFIG_WATCHDOG_NOWAYOUT is not set
 
@@ -1372,6 +1496,7 @@ CONFIG_WATCHDOG=y
 # CONFIG_I6300ESB_WDT is not set
 # CONFIG_ITCO_WDT is not set
 # CONFIG_IT8712F_WDT is not set
+# CONFIG_IT87_WDT is not set
 # CONFIG_HP_WATCHDOG is not set
 # CONFIG_SC1200_WDT is not set
 # CONFIG_PC87413_WDT is not set
@@ -1379,9 +1504,11 @@ CONFIG_WATCHDOG=y
 # CONFIG_SBC8360_WDT is not set
 # CONFIG_SBC7240_WDT is not set
 # CONFIG_CPU5_WDT is not set
+# CONFIG_SMSC_SCH311X_WDT is not set
 # CONFIG_SMSC37B787_WDT is not set
 # CONFIG_W83627HF_WDT is not set
 # CONFIG_W83697HF_WDT is not set
+# CONFIG_W83697UG_WDT is not set
 # CONFIG_W83877F_WDT is not set
 # CONFIG_W83977F_WDT is not set
 # CONFIG_MACHZ_WDT is not set
@@ -1397,11 +1524,11 @@ CONFIG_WATCHDOG=y
 # USB-based Watchdog Cards
 #
 # CONFIG_USBPCWATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
 
 #
 # Sonics Silicon Backplane
 #
-CONFIG_SSB_POSSIBLE=y
 # CONFIG_SSB is not set
 
 #
@@ -1410,7 +1537,13 @@ CONFIG_SSB_POSSIBLE=y
 # CONFIG_MFD_CORE is not set
 # CONFIG_MFD_SM501 is not set
 # CONFIG_HTC_PASIC3 is not set
+# CONFIG_TWL4030_CORE is not set
 # CONFIG_MFD_TMIO is not set
+# CONFIG_PMIC_DA903X is not set
+# CONFIG_MFD_WM8400 is not set
+# CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_PCF50633 is not set
+# CONFIG_REGULATOR is not set
 
 #
 # Multimedia devices
@@ -1450,6 +1583,7 @@ CONFIG_DRM=y
 # CONFIG_DRM_I810 is not set
 # CONFIG_DRM_I830 is not set
 CONFIG_DRM_I915=y
+# CONFIG_DRM_I915_KMS is not set
 # CONFIG_DRM_MGA is not set
 # CONFIG_DRM_SIS is not set
 # CONFIG_DRM_VIA is not set
@@ -1459,6 +1593,7 @@ CONFIG_DRM_I915=y
 CONFIG_FB=y
 # CONFIG_FIRMWARE_EDID is not set
 # CONFIG_FB_DDC is not set
+# CONFIG_FB_BOOT_VESA_SUPPORT is not set
 CONFIG_FB_CFB_FILLRECT=y
 CONFIG_FB_CFB_COPYAREA=y
 CONFIG_FB_CFB_IMAGEBLIT=y
@@ -1487,7 +1622,6 @@ CONFIG_FB_TILEBLITTING=y
 # CONFIG_FB_UVESA is not set
 # CONFIG_FB_VESA is not set
 CONFIG_FB_EFI=y
-# CONFIG_FB_IMAC is not set
 # CONFIG_FB_N411 is not set
 # CONFIG_FB_HGA is not set
 # CONFIG_FB_S1D13XXX is not set
@@ -1503,6 +1637,7 @@ CONFIG_FB_EFI=y
 # CONFIG_FB_S3 is not set
 # CONFIG_FB_SAVAGE is not set
 # CONFIG_FB_SIS is not set
+# CONFIG_FB_VIA is not set
 # CONFIG_FB_NEOMAGIC is not set
 # CONFIG_FB_KYRO is not set
 # CONFIG_FB_3DFX is not set
@@ -1515,12 +1650,15 @@ CONFIG_FB_EFI=y
 # CONFIG_FB_CARMINE is not set
 # CONFIG_FB_GEODE is not set
 # CONFIG_FB_VIRTUAL is not set
+# CONFIG_FB_METRONOME is not set
+# CONFIG_FB_MB862XX is not set
 CONFIG_BACKLIGHT_LCD_SUPPORT=y
 # CONFIG_LCD_CLASS_DEVICE is not set
 CONFIG_BACKLIGHT_CLASS_DEVICE=y
-# CONFIG_BACKLIGHT_CORGI is not set
+CONFIG_BACKLIGHT_GENERIC=y
 # CONFIG_BACKLIGHT_PROGEAR is not set
 # CONFIG_BACKLIGHT_MBP_NVIDIA is not set
+# CONFIG_BACKLIGHT_SAHARA is not set
 
 #
 # Display device support
@@ -1540,10 +1678,12 @@ CONFIG_LOGO=y
 # CONFIG_LOGO_LINUX_VGA16 is not set
 CONFIG_LOGO_LINUX_CLUT224=y
 CONFIG_SOUND=y
+CONFIG_SOUND_OSS_CORE=y
 CONFIG_SND=y
 CONFIG_SND_TIMER=y
 CONFIG_SND_PCM=y
 CONFIG_SND_HWDEP=y
+CONFIG_SND_JACK=y
 CONFIG_SND_SEQUENCER=y
 CONFIG_SND_SEQ_DUMMY=y
 CONFIG_SND_OSSEMUL=y
@@ -1551,6 +1691,8 @@ CONFIG_SND_MIXER_OSS=y
 CONFIG_SND_PCM_OSS=y
 CONFIG_SND_PCM_OSS_PLUGINS=y
 CONFIG_SND_SEQUENCER_OSS=y
+CONFIG_SND_HRTIMER=y
+CONFIG_SND_SEQ_HRTIMER_DEFAULT=y
 CONFIG_SND_DYNAMIC_MINORS=y
 CONFIG_SND_SUPPORT_OLD_API=y
 CONFIG_SND_VERBOSE_PROCFS=y
@@ -1605,11 +1747,16 @@ CONFIG_SND_PCI=y
 # CONFIG_SND_FM801 is not set
 CONFIG_SND_HDA_INTEL=y
 CONFIG_SND_HDA_HWDEP=y
+# CONFIG_SND_HDA_RECONFIG is not set
+# CONFIG_SND_HDA_INPUT_BEEP is not set
 CONFIG_SND_HDA_CODEC_REALTEK=y
 CONFIG_SND_HDA_CODEC_ANALOG=y
 CONFIG_SND_HDA_CODEC_SIGMATEL=y
 CONFIG_SND_HDA_CODEC_VIA=y
 CONFIG_SND_HDA_CODEC_ATIHDMI=y
+CONFIG_SND_HDA_CODEC_NVHDMI=y
+CONFIG_SND_HDA_CODEC_INTELHDMI=y
+CONFIG_SND_HDA_ELD=y
 CONFIG_SND_HDA_CODEC_CONEXANT=y
 CONFIG_SND_HDA_CODEC_CMEDIA=y
 CONFIG_SND_HDA_CODEC_SI3054=y
@@ -1643,6 +1790,7 @@ CONFIG_SND_USB=y
 # CONFIG_SND_USB_AUDIO is not set
 # CONFIG_SND_USB_USX2Y is not set
 # CONFIG_SND_USB_CAIAQ is not set
+# CONFIG_SND_USB_US122L is not set
 CONFIG_SND_PCMCIA=y
 # CONFIG_SND_VXPOCKET is not set
 # CONFIG_SND_PDAUDIOCF is not set
@@ -1657,15 +1805,37 @@ CONFIG_HIDRAW=y
 # USB Input Devices
 #
 CONFIG_USB_HID=y
-CONFIG_USB_HIDINPUT_POWERBOOK=y
-CONFIG_HID_FF=y
 CONFIG_HID_PID=y
+CONFIG_USB_HIDDEV=y
+
+#
+# Special HID drivers
+#
+CONFIG_HID_COMPAT=y
+CONFIG_HID_A4TECH=y
+CONFIG_HID_APPLE=y
+CONFIG_HID_BELKIN=y
+CONFIG_HID_CHERRY=y
+CONFIG_HID_CHICONY=y
+CONFIG_HID_CYPRESS=y
+CONFIG_HID_EZKEY=y
+CONFIG_HID_GYRATION=y
+CONFIG_HID_LOGITECH=y
 CONFIG_LOGITECH_FF=y
 # CONFIG_LOGIRUMBLEPAD2_FF is not set
+CONFIG_HID_MICROSOFT=y
+CONFIG_HID_MONTEREY=y
+CONFIG_HID_NTRIG=y
+CONFIG_HID_PANTHERLORD=y
 CONFIG_PANTHERLORD_FF=y
+CONFIG_HID_PETALYNX=y
+CONFIG_HID_SAMSUNG=y
+CONFIG_HID_SONY=y
+CONFIG_HID_SUNPLUS=y
+# CONFIG_GREENASIA_FF is not set
+CONFIG_HID_TOPSEED=y
 CONFIG_THRUSTMASTER_FF=y
 CONFIG_ZEROPLUS_FF=y
-CONFIG_USB_HIDDEV=y
 CONFIG_USB_SUPPORT=y
 CONFIG_USB_ARCH_HAS_HCD=y
 CONFIG_USB_ARCH_HAS_OHCI=y
@@ -1683,6 +1853,8 @@ CONFIG_USB_DEVICEFS=y
 CONFIG_USB_SUSPEND=y
 # CONFIG_USB_OTG is not set
 CONFIG_USB_MON=y
+# CONFIG_USB_WUSB is not set
+# CONFIG_USB_WUSB_CBAF is not set
 
 #
 # USB Host Controller Drivers
@@ -1691,6 +1863,7 @@ CONFIG_USB_MON=y
 CONFIG_USB_EHCI_HCD=y
 # CONFIG_USB_EHCI_ROOT_HUB_TT is not set
 # CONFIG_USB_EHCI_TT_NEWSCHED is not set
+# CONFIG_USB_OXU210HP_HCD is not set
 # CONFIG_USB_ISP116X_HCD is not set
 # CONFIG_USB_ISP1760_HCD is not set
 CONFIG_USB_OHCI_HCD=y
@@ -1700,6 +1873,8 @@ CONFIG_USB_OHCI_LITTLE_ENDIAN=y
 CONFIG_USB_UHCI_HCD=y
 # CONFIG_USB_SL811_HCD is not set
 # CONFIG_USB_R8A66597_HCD is not set
+# CONFIG_USB_WHCI_HCD is not set
+# CONFIG_USB_HWA_HCD is not set
 
 #
 # USB Device Class drivers
@@ -1707,20 +1882,20 @@ CONFIG_USB_UHCI_HCD=y
 # CONFIG_USB_ACM is not set
 CONFIG_USB_PRINTER=y
 # CONFIG_USB_WDM is not set
+# CONFIG_USB_TMC is not set
 
 #
-# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
+# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed;
 #
 
 #
-# may also be needed; see USB_STORAGE Help for more information
+# see USB_STORAGE Help for more information
 #
 CONFIG_USB_STORAGE=y
 # CONFIG_USB_STORAGE_DEBUG is not set
 # CONFIG_USB_STORAGE_DATAFAB is not set
 # CONFIG_USB_STORAGE_FREECOM is not set
 # CONFIG_USB_STORAGE_ISD200 is not set
-# CONFIG_USB_STORAGE_DPCM is not set
 # CONFIG_USB_STORAGE_USBAT is not set
 # CONFIG_USB_STORAGE_SDDR09 is not set
 # CONFIG_USB_STORAGE_SDDR55 is not set
@@ -1728,7 +1903,6 @@ CONFIG_USB_STORAGE=y
 # CONFIG_USB_STORAGE_ALAUDA is not set
 # CONFIG_USB_STORAGE_ONETOUCH is not set
 # CONFIG_USB_STORAGE_KARMA is not set
-# CONFIG_USB_STORAGE_SIERRA is not set
 # CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
 CONFIG_USB_LIBUSUAL=y
 
@@ -1749,6 +1923,7 @@ CONFIG_USB_LIBUSUAL=y
 # CONFIG_USB_EMI62 is not set
 # CONFIG_USB_EMI26 is not set
 # CONFIG_USB_ADUTUX is not set
+# CONFIG_USB_SEVSEG is not set
 # CONFIG_USB_RIO500 is not set
 # CONFIG_USB_LEGOTOWER is not set
 # CONFIG_USB_LCD is not set
@@ -1766,7 +1941,13 @@ CONFIG_USB_LIBUSUAL=y
 # CONFIG_USB_IOWARRIOR is not set
 # CONFIG_USB_TEST is not set
 # CONFIG_USB_ISIGHTFW is not set
+# CONFIG_USB_VST is not set
 # CONFIG_USB_GADGET is not set
+
+#
+# OTG and related infrastructure
+#
+# CONFIG_UWB is not set
 # CONFIG_MMC is not set
 # CONFIG_MEMSTICK is not set
 CONFIG_NEW_LEDS=y
@@ -1775,6 +1956,7 @@ CONFIG_LEDS_CLASS=y
 #
 # LED drivers
 #
+# CONFIG_LEDS_ALIX2 is not set
 # CONFIG_LEDS_PCA9532 is not set
 # CONFIG_LEDS_CLEVO_MAIL is not set
 # CONFIG_LEDS_PCA955X is not set
@@ -1785,6 +1967,7 @@ CONFIG_LEDS_CLASS=y
 CONFIG_LEDS_TRIGGERS=y
 # CONFIG_LEDS_TRIGGER_TIMER is not set
 # CONFIG_LEDS_TRIGGER_HEARTBEAT is not set
+# CONFIG_LEDS_TRIGGER_BACKLIGHT is not set
 # CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set
 # CONFIG_ACCESSIBILITY is not set
 # CONFIG_INFINIBAND is not set
@@ -1824,6 +2007,7 @@ CONFIG_RTC_INTF_DEV=y
 # CONFIG_RTC_DRV_M41T80 is not set
 # CONFIG_RTC_DRV_S35390A is not set
 # CONFIG_RTC_DRV_FM3130 is not set
+# CONFIG_RTC_DRV_RX8581 is not set
 
 #
 # SPI RTC drivers
@@ -1833,12 +2017,15 @@ CONFIG_RTC_INTF_DEV=y
 # Platform RTC drivers
 #
 CONFIG_RTC_DRV_CMOS=y
+# CONFIG_RTC_DRV_DS1286 is not set
 # CONFIG_RTC_DRV_DS1511 is not set
 # CONFIG_RTC_DRV_DS1553 is not set
 # CONFIG_RTC_DRV_DS1742 is not set
 # CONFIG_RTC_DRV_STK17TA8 is not set
 # CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_M48T35 is not set
 # CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_BQ4802 is not set
 # CONFIG_RTC_DRV_V3020 is not set
 
 #
@@ -1851,6 +2038,22 @@ CONFIG_DMADEVICES=y
 #
 # CONFIG_INTEL_IOATDMA is not set
 # CONFIG_UIO is not set
+# CONFIG_STAGING is not set
+CONFIG_X86_PLATFORM_DEVICES=y
+# CONFIG_ACER_WMI is not set
+# CONFIG_ASUS_LAPTOP is not set
+# CONFIG_FUJITSU_LAPTOP is not set
+# CONFIG_TC1100_WMI is not set
+# CONFIG_MSI_LAPTOP is not set
+# CONFIG_PANASONIC_LAPTOP is not set
+# CONFIG_COMPAL_LAPTOP is not set
+# CONFIG_SONY_LAPTOP is not set
+# CONFIG_THINKPAD_ACPI is not set
+# CONFIG_INTEL_MENLOW is not set
+CONFIG_EEEPC_LAPTOP=y
+# CONFIG_ACPI_WMI is not set
+# CONFIG_ACPI_ASUS is not set
+# CONFIG_ACPI_TOSHIBA is not set
 
 #
 # Firmware Drivers
@@ -1861,8 +2064,7 @@ CONFIG_EFI_VARS=y
 # CONFIG_DELL_RBU is not set
 # CONFIG_DCDBAS is not set
 CONFIG_DMIID=y
-CONFIG_ISCSI_IBFT_FIND=y
-CONFIG_ISCSI_IBFT=y
+# CONFIG_ISCSI_IBFT_FIND is not set
 
 #
 # File systems
@@ -1872,21 +2074,24 @@ CONFIG_EXT3_FS=y
 CONFIG_EXT3_FS_XATTR=y
 CONFIG_EXT3_FS_POSIX_ACL=y
 CONFIG_EXT3_FS_SECURITY=y
-# CONFIG_EXT4DEV_FS is not set
+# CONFIG_EXT4_FS is not set
 CONFIG_JBD=y
 # CONFIG_JBD_DEBUG is not set
 CONFIG_FS_MBCACHE=y
 # CONFIG_REISERFS_FS is not set
 # CONFIG_JFS_FS is not set
 CONFIG_FS_POSIX_ACL=y
+CONFIG_FILE_LOCKING=y
 # CONFIG_XFS_FS is not set
 # CONFIG_OCFS2_FS is not set
+# CONFIG_BTRFS_FS is not set
 CONFIG_DNOTIFY=y
 CONFIG_INOTIFY=y
 CONFIG_INOTIFY_USER=y
 CONFIG_QUOTA=y
 CONFIG_QUOTA_NETLINK_INTERFACE=y
 # CONFIG_PRINT_QUOTA_WARNING is not set
+CONFIG_QUOTA_TREE=y
 # CONFIG_QFMT_V1 is not set
 CONFIG_QFMT_V2=y
 CONFIG_QUOTACTL=y
@@ -1920,16 +2125,14 @@ CONFIG_PROC_FS=y
 CONFIG_PROC_KCORE=y
 CONFIG_PROC_VMCORE=y
 CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_PAGE_MONITOR=y
 CONFIG_SYSFS=y
 CONFIG_TMPFS=y
 CONFIG_TMPFS_POSIX_ACL=y
 CONFIG_HUGETLBFS=y
 CONFIG_HUGETLB_PAGE=y
 # CONFIG_CONFIGFS_FS is not set
-
-#
-# Miscellaneous filesystems
-#
+CONFIG_MISC_FILESYSTEMS=y
 # CONFIG_ADFS_FS is not set
 # CONFIG_AFFS_FS is not set
 # CONFIG_ECRYPT_FS is not set
@@ -1939,6 +2142,7 @@ CONFIG_HUGETLB_PAGE=y
 # CONFIG_BFS_FS is not set
 # CONFIG_EFS_FS is not set
 # CONFIG_CRAMFS is not set
+# CONFIG_SQUASHFS is not set
 # CONFIG_VXFS_FS is not set
 # CONFIG_MINIX_FS is not set
 # CONFIG_OMFS_FS is not set
@@ -1960,6 +2164,7 @@ CONFIG_NFS_ACL_SUPPORT=y
 CONFIG_NFS_COMMON=y
 CONFIG_SUNRPC=y
 CONFIG_SUNRPC_GSS=y
+# CONFIG_SUNRPC_REGISTER_V4 is not set
 CONFIG_RPCSEC_GSS_KRB5=y
 # CONFIG_RPCSEC_GSS_SPKM3 is not set
 # CONFIG_SMB_FS is not set
@@ -2036,7 +2241,7 @@ CONFIG_NLS_UTF8=y
 #
 CONFIG_TRACE_IRQFLAGS_SUPPORT=y
 CONFIG_PRINTK_TIME=y
-CONFIG_ENABLE_WARN_DEPRECATED=y
+# CONFIG_ENABLE_WARN_DEPRECATED is not set
 CONFIG_ENABLE_MUST_CHECK=y
 CONFIG_FRAME_WARN=2048
 CONFIG_MAGIC_SYSRQ=y
@@ -2066,33 +2271,54 @@ CONFIG_TIMER_STATS=y
 CONFIG_DEBUG_BUGVERBOSE=y
 # CONFIG_DEBUG_INFO is not set
 # CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_VIRTUAL is not set
 # CONFIG_DEBUG_WRITECOUNT is not set
 CONFIG_DEBUG_MEMORY_INIT=y
 # CONFIG_DEBUG_LIST is not set
 # CONFIG_DEBUG_SG is not set
+# CONFIG_DEBUG_NOTIFIERS is not set
+CONFIG_ARCH_WANT_FRAME_POINTERS=y
 CONFIG_FRAME_POINTER=y
 # CONFIG_BOOT_PRINTK_DELAY is not set
 # CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
 # CONFIG_KPROBES_SANITY_TEST is not set
 # CONFIG_BACKTRACE_SELF_TEST is not set
+# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
 # CONFIG_LKDTM is not set
 # CONFIG_FAULT_INJECTION is not set
 # CONFIG_LATENCYTOP is not set
 CONFIG_SYSCTL_SYSCALL_CHECK=y
-CONFIG_HAVE_FTRACE=y
+CONFIG_USER_STACKTRACE_SUPPORT=y
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
 CONFIG_HAVE_DYNAMIC_FTRACE=y
-# CONFIG_FTRACE is not set
+CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_HAVE_HW_BRANCH_TRACER=y
+
+#
+# Tracers
+#
+# CONFIG_FUNCTION_TRACER is not set
 # CONFIG_IRQSOFF_TRACER is not set
 # CONFIG_SYSPROF_TRACER is not set
 # CONFIG_SCHED_TRACER is not set
 # CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_BOOT_TRACER is not set
+# CONFIG_TRACE_BRANCH_PROFILING is not set
+# CONFIG_POWER_TRACER is not set
+# CONFIG_STACK_TRACER is not set
+# CONFIG_HW_BRANCH_TRACER is not set
 CONFIG_PROVIDE_OHCI1394_DMA_INIT=y
+# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
 # CONFIG_SAMPLES is not set
 CONFIG_HAVE_ARCH_KGDB=y
 # CONFIG_KGDB is not set
 # CONFIG_STRICT_DEVMEM is not set
 CONFIG_X86_VERBOSE_BOOTUP=y
 CONFIG_EARLY_PRINTK=y
+CONFIG_EARLY_PRINTK_DBGP=y
 CONFIG_DEBUG_STACKOVERFLOW=y
 CONFIG_DEBUG_STACK_USAGE=y
 # CONFIG_DEBUG_PAGEALLOC is not set
@@ -2123,8 +2349,10 @@ CONFIG_OPTIMIZE_INLINING=y
 CONFIG_KEYS=y
 CONFIG_KEYS_DEBUG_PROC_KEYS=y
 CONFIG_SECURITY=y
+# CONFIG_SECURITYFS is not set
 CONFIG_SECURITY_NETWORK=y
 # CONFIG_SECURITY_NETWORK_XFRM is not set
+# CONFIG_SECURITY_PATH is not set
 CONFIG_SECURITY_FILE_CAPABILITIES=y
 # CONFIG_SECURITY_ROOTPLUG is not set
 CONFIG_SECURITY_DEFAULT_MMAP_MIN_ADDR=65536
@@ -2135,7 +2363,6 @@ CONFIG_SECURITY_SELINUX_DISABLE=y
 CONFIG_SECURITY_SELINUX_DEVELOP=y
 CONFIG_SECURITY_SELINUX_AVC_STATS=y
 CONFIG_SECURITY_SELINUX_CHECKREQPROT_VALUE=1
-# CONFIG_SECURITY_SELINUX_ENABLE_SECMARK_DEFAULT is not set
 # CONFIG_SECURITY_SELINUX_POLICYDB_VERSION_MAX is not set
 # CONFIG_SECURITY_SMACK is not set
 CONFIG_CRYPTO=y
@@ -2143,11 +2370,18 @@ CONFIG_CRYPTO=y
 #
 # Crypto core or helper
 #
+# CONFIG_CRYPTO_FIPS is not set
 CONFIG_CRYPTO_ALGAPI=y
+CONFIG_CRYPTO_ALGAPI2=y
 CONFIG_CRYPTO_AEAD=y
+CONFIG_CRYPTO_AEAD2=y
 CONFIG_CRYPTO_BLKCIPHER=y
+CONFIG_CRYPTO_BLKCIPHER2=y
 CONFIG_CRYPTO_HASH=y
+CONFIG_CRYPTO_HASH2=y
+CONFIG_CRYPTO_RNG2=y
 CONFIG_CRYPTO_MANAGER=y
+CONFIG_CRYPTO_MANAGER2=y
 # CONFIG_CRYPTO_GF128MUL is not set
 # CONFIG_CRYPTO_NULL is not set
 # CONFIG_CRYPTO_CRYPTD is not set
@@ -2182,6 +2416,7 @@ CONFIG_CRYPTO_HMAC=y
 # Digest
 #
 # CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_CRC32C_INTEL is not set
 # CONFIG_CRYPTO_MD4 is not set
 CONFIG_CRYPTO_MD5=y
 # CONFIG_CRYPTO_MICHAEL_MIC is not set
@@ -2222,6 +2457,11 @@ CONFIG_CRYPTO_DES=y
 #
 # CONFIG_CRYPTO_DEFLATE is not set
 # CONFIG_CRYPTO_LZO is not set
+
+#
+# Random Number Generation
+#
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
 CONFIG_CRYPTO_HW=y
 # CONFIG_CRYPTO_DEV_PADLOCK is not set
 # CONFIG_CRYPTO_DEV_GEODE is not set
@@ -2239,6 +2479,7 @@ CONFIG_VIRTUALIZATION=y
 CONFIG_BITREVERSE=y
 CONFIG_GENERIC_FIND_FIRST_BIT=y
 CONFIG_GENERIC_FIND_NEXT_BIT=y
+CONFIG_GENERIC_FIND_LAST_BIT=y
 # CONFIG_CRC_CCITT is not set
 # CONFIG_CRC16 is not set
 CONFIG_CRC_T10DIF=y
diff --git a/arch/x86/configs/x86_64_defconfig b/arch/x86/configs/x86_64_defconfig
index 322dd2748fc9..9fe5d212ab4c 100644
--- a/arch/x86/configs/x86_64_defconfig
+++ b/arch/x86/configs/x86_64_defconfig
@@ -1,14 +1,13 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.27-rc5
-# Wed Sep  3 17:13:39 2008
+# Linux kernel version: 2.6.29-rc4
+# Tue Feb 24 15:44:16 2009
 #
 CONFIG_64BIT=y
 # CONFIG_X86_32 is not set
 CONFIG_X86_64=y
 CONFIG_X86=y
 CONFIG_ARCH_DEFCONFIG="arch/x86/configs/x86_64_defconfig"
-# CONFIG_GENERIC_LOCKBREAK is not set
 CONFIG_GENERIC_TIME=y
 CONFIG_GENERIC_CMOS_UPDATE=y
 CONFIG_CLOCKSOURCE_WATCHDOG=y
@@ -23,17 +22,16 @@ CONFIG_ZONE_DMA=y
 CONFIG_GENERIC_ISA_DMA=y
 CONFIG_GENERIC_IOMAP=y
 CONFIG_GENERIC_BUG=y
+CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y
 CONFIG_GENERIC_HWEIGHT=y
-# CONFIG_GENERIC_GPIO is not set
 CONFIG_ARCH_MAY_HAVE_PC_FDC=y
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 # CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
-# CONFIG_ARCH_HAS_ILOG2_U32 is not set
-# CONFIG_ARCH_HAS_ILOG2_U64 is not set
 CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
 CONFIG_GENERIC_CALIBRATE_DELAY=y
 CONFIG_GENERIC_TIME_VSYSCALL=y
 CONFIG_ARCH_HAS_CPU_RELAX=y
+CONFIG_ARCH_HAS_DEFAULT_IDLE=y
 CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y
 CONFIG_HAVE_SETUP_PER_CPU_AREA=y
 CONFIG_HAVE_CPUMASK_OF_CPU_MAP=y
@@ -42,12 +40,12 @@ CONFIG_ARCH_SUSPEND_POSSIBLE=y
 CONFIG_ZONE_DMA32=y
 CONFIG_ARCH_POPULATES_NODE_MAP=y
 CONFIG_AUDIT_ARCH=y
-CONFIG_ARCH_SUPPORTS_AOUT=y
 CONFIG_ARCH_SUPPORTS_OPTIMIZED_INLINING=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_GENERIC_IRQ_PROBE=y
 CONFIG_GENERIC_PENDING_IRQ=y
 CONFIG_X86_SMP=y
+CONFIG_USE_GENERIC_SMP_HELPERS=y
 CONFIG_X86_64_SMP=y
 CONFIG_X86_HT=y
 CONFIG_X86_BIOS_REBOOT=y
@@ -76,30 +74,44 @@ CONFIG_TASK_IO_ACCOUNTING=y
 CONFIG_AUDIT=y
 CONFIG_AUDITSYSCALL=y
 CONFIG_AUDIT_TREE=y
+
+#
+# RCU Subsystem
+#
+# CONFIG_CLASSIC_RCU is not set
+CONFIG_TREE_RCU=y
+# CONFIG_PREEMPT_RCU is not set
+# CONFIG_RCU_TRACE is not set
+CONFIG_RCU_FANOUT=64
+# CONFIG_RCU_FANOUT_EXACT is not set
+# CONFIG_TREE_RCU_TRACE is not set
+# CONFIG_PREEMPT_RCU_TRACE is not set
 # CONFIG_IKCONFIG is not set
 CONFIG_LOG_BUF_SHIFT=18
-CONFIG_CGROUPS=y
-# CONFIG_CGROUP_DEBUG is not set
-CONFIG_CGROUP_NS=y
-# CONFIG_CGROUP_DEVICE is not set
-CONFIG_CPUSETS=y
 CONFIG_HAVE_UNSTABLE_SCHED_CLOCK=y
 CONFIG_GROUP_SCHED=y
 CONFIG_FAIR_GROUP_SCHED=y
 # CONFIG_RT_GROUP_SCHED is not set
 # CONFIG_USER_SCHED is not set
 CONFIG_CGROUP_SCHED=y
+CONFIG_CGROUPS=y
+# CONFIG_CGROUP_DEBUG is not set
+CONFIG_CGROUP_NS=y
+CONFIG_CGROUP_FREEZER=y
+# CONFIG_CGROUP_DEVICE is not set
+CONFIG_CPUSETS=y
+CONFIG_PROC_PID_CPUSET=y
 CONFIG_CGROUP_CPUACCT=y
 CONFIG_RESOURCE_COUNTERS=y
 # CONFIG_CGROUP_MEM_RES_CTLR is not set
 # CONFIG_SYSFS_DEPRECATED_V2 is not set
-CONFIG_PROC_PID_CPUSET=y
 CONFIG_RELAY=y
 CONFIG_NAMESPACES=y
 CONFIG_UTS_NS=y
 CONFIG_IPC_NS=y
 CONFIG_USER_NS=y
 CONFIG_PID_NS=y
+CONFIG_NET_NS=y
 CONFIG_BLK_DEV_INITRD=y
 CONFIG_INITRAMFS_SOURCE=""
 CONFIG_CC_OPTIMIZE_FOR_SIZE=y
@@ -124,12 +136,15 @@ CONFIG_SIGNALFD=y
 CONFIG_TIMERFD=y
 CONFIG_EVENTFD=y
 CONFIG_SHMEM=y
+CONFIG_AIO=y
 CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_PCI_QUIRKS=y
 CONFIG_SLUB_DEBUG=y
 # CONFIG_SLAB is not set
 CONFIG_SLUB=y
 # CONFIG_SLOB is not set
 CONFIG_PROFILING=y
+CONFIG_TRACEPOINTS=y
 CONFIG_MARKERS=y
 # CONFIG_OPROFILE is not set
 CONFIG_HAVE_OPROFILE=y
@@ -139,15 +154,10 @@ CONFIG_KRETPROBES=y
 CONFIG_HAVE_IOREMAP_PROT=y
 CONFIG_HAVE_KPROBES=y
 CONFIG_HAVE_KRETPROBES=y
-# CONFIG_HAVE_ARCH_TRACEHOOK is not set
-# CONFIG_HAVE_DMA_ATTRS is not set
-CONFIG_USE_GENERIC_SMP_HELPERS=y
-# CONFIG_HAVE_CLK is not set
-CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_HAVE_ARCH_TRACEHOOK=y
 # CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
 CONFIG_SLABINFO=y
 CONFIG_RT_MUTEXES=y
-# CONFIG_TINY_SHMEM is not set
 CONFIG_BASE_SMALL=0
 CONFIG_MODULES=y
 # CONFIG_MODULE_FORCE_LOAD is not set
@@ -155,7 +165,6 @@ CONFIG_MODULE_UNLOAD=y
 CONFIG_MODULE_FORCE_UNLOAD=y
 # CONFIG_MODVERSIONS is not set
 # CONFIG_MODULE_SRCVERSION_ALL is not set
-CONFIG_KMOD=y
 CONFIG_STOP_MACHINE=y
 CONFIG_BLOCK=y
 CONFIG_BLK_DEV_IO_TRACE=y
@@ -175,7 +184,7 @@ CONFIG_IOSCHED_CFQ=y
 CONFIG_DEFAULT_CFQ=y
 # CONFIG_DEFAULT_NOOP is not set
 CONFIG_DEFAULT_IOSCHED="cfq"
-CONFIG_CLASSIC_RCU=y
+CONFIG_FREEZER=y
 
 #
 # Processor type and features
@@ -185,13 +194,14 @@ CONFIG_NO_HZ=y
 CONFIG_HIGH_RES_TIMERS=y
 CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
 CONFIG_SMP=y
+CONFIG_SPARSE_IRQ=y
+# CONFIG_NUMA_MIGRATE_IRQ_DESC is not set
 CONFIG_X86_FIND_SMP_CONFIG=y
 CONFIG_X86_MPPARSE=y
-CONFIG_X86_PC=y
 # CONFIG_X86_ELAN is not set
-# CONFIG_X86_VOYAGER is not set
 # CONFIG_X86_GENERICARCH is not set
 # CONFIG_X86_VSMP is not set
+CONFIG_SCHED_OMIT_FRAME_POINTER=y
 # CONFIG_PARAVIRT_GUEST is not set
 # CONFIG_MEMTEST is not set
 # CONFIG_M386 is not set
@@ -230,6 +240,11 @@ CONFIG_X86_CMPXCHG64=y
 CONFIG_X86_CMOV=y
 CONFIG_X86_MINIMUM_CPU_FAMILY=64
 CONFIG_X86_DEBUGCTLMSR=y
+CONFIG_CPU_SUP_INTEL=y
+CONFIG_CPU_SUP_AMD=y
+CONFIG_CPU_SUP_CENTAUR_64=y
+CONFIG_X86_DS=y
+CONFIG_X86_PTRACE_BTS=y
 CONFIG_HPET_TIMER=y
 CONFIG_HPET_EMULATE_RTC=y
 CONFIG_DMI=y
@@ -237,8 +252,11 @@ CONFIG_GART_IOMMU=y
 CONFIG_CALGARY_IOMMU=y
 CONFIG_CALGARY_IOMMU_ENABLED_BY_DEFAULT=y
 CONFIG_AMD_IOMMU=y
+CONFIG_AMD_IOMMU_STATS=y
 CONFIG_SWIOTLB=y
 CONFIG_IOMMU_HELPER=y
+CONFIG_IOMMU_API=y
+# CONFIG_MAXSMP is not set
 CONFIG_NR_CPUS=64
 CONFIG_SCHED_SMT=y
 CONFIG_SCHED_MC=y
@@ -247,12 +265,19 @@ CONFIG_PREEMPT_VOLUNTARY=y
 # CONFIG_PREEMPT is not set
 CONFIG_X86_LOCAL_APIC=y
 CONFIG_X86_IO_APIC=y
-# CONFIG_X86_MCE is not set
+CONFIG_X86_REROUTE_FOR_BROKEN_BOOT_IRQS=y
+CONFIG_X86_MCE=y
+CONFIG_X86_MCE_INTEL=y
+CONFIG_X86_MCE_AMD=y
 # CONFIG_I8K is not set
 CONFIG_MICROCODE=y
+CONFIG_MICROCODE_INTEL=y
+CONFIG_MICROCODE_AMD=y
 CONFIG_MICROCODE_OLD_INTERFACE=y
 CONFIG_X86_MSR=y
 CONFIG_X86_CPUID=y
+CONFIG_ARCH_PHYS_ADDR_T_64BIT=y
+CONFIG_DIRECT_GBPAGES=y
 CONFIG_NUMA=y
 CONFIG_K8_NUMA=y
 CONFIG_X86_64_ACPI_NUMA=y
@@ -269,7 +294,6 @@ CONFIG_SPARSEMEM_MANUAL=y
 CONFIG_SPARSEMEM=y
 CONFIG_NEED_MULTIPLE_NODES=y
 CONFIG_HAVE_MEMORY_PRESENT=y
-# CONFIG_SPARSEMEM_STATIC is not set
 CONFIG_SPARSEMEM_EXTREME=y
 CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y
 CONFIG_SPARSEMEM_VMEMMAP=y
@@ -280,10 +304,14 @@ CONFIG_SPARSEMEM_VMEMMAP=y
 CONFIG_PAGEFLAGS_EXTENDED=y
 CONFIG_SPLIT_PTLOCK_CPUS=4
 CONFIG_MIGRATION=y
-CONFIG_RESOURCES_64BIT=y
+CONFIG_PHYS_ADDR_T_64BIT=y
 CONFIG_ZONE_DMA_FLAG=1
 CONFIG_BOUNCE=y
 CONFIG_VIRT_TO_BUS=y
+CONFIG_UNEVICTABLE_LRU=y
+CONFIG_X86_CHECK_BIOS_CORRUPTION=y
+CONFIG_X86_BOOTPARAM_MEMORY_CORRUPTION_CHECK=y
+CONFIG_X86_RESERVE_LOW_64K=y
 CONFIG_MTRR=y
 # CONFIG_MTRR_SANITIZER is not set
 CONFIG_X86_PAT=y
@@ -302,11 +330,12 @@ CONFIG_PHYSICAL_START=0x1000000
 CONFIG_PHYSICAL_ALIGN=0x200000
 CONFIG_HOTPLUG_CPU=y
 # CONFIG_COMPAT_VDSO is not set
+# CONFIG_CMDLINE_BOOL is not set
 CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
 CONFIG_HAVE_ARCH_EARLY_PFN_TO_NID=y
 
 #
-# Power management options
+# Power management and ACPI options
 #
 CONFIG_ARCH_HIBERNATION_HEADER=y
 CONFIG_PM=y
@@ -333,20 +362,14 @@ CONFIG_ACPI_BATTERY=y
 CONFIG_ACPI_BUTTON=y
 CONFIG_ACPI_FAN=y
 CONFIG_ACPI_DOCK=y
-# CONFIG_ACPI_BAY is not set
 CONFIG_ACPI_PROCESSOR=y
 CONFIG_ACPI_HOTPLUG_CPU=y
 CONFIG_ACPI_THERMAL=y
 CONFIG_ACPI_NUMA=y
-# CONFIG_ACPI_WMI is not set
-# CONFIG_ACPI_ASUS is not set
-# CONFIG_ACPI_TOSHIBA is not set
 # CONFIG_ACPI_CUSTOM_DSDT is not set
 CONFIG_ACPI_BLACKLIST_YEAR=0
 # CONFIG_ACPI_DEBUG is not set
-CONFIG_ACPI_EC=y
 # CONFIG_ACPI_PCI_SLOT is not set
-CONFIG_ACPI_POWER=y
 CONFIG_ACPI_SYSTEM=y
 CONFIG_X86_PM_TIMER=y
 CONFIG_ACPI_CONTAINER=y
@@ -381,13 +404,17 @@ CONFIG_X86_ACPI_CPUFREQ=y
 #
 # shared options
 #
-# CONFIG_X86_ACPI_CPUFREQ_PROC_INTF is not set
 # CONFIG_X86_SPEEDSTEP_LIB is not set
 CONFIG_CPU_IDLE=y
 CONFIG_CPU_IDLE_GOV_LADDER=y
 CONFIG_CPU_IDLE_GOV_MENU=y
 
 #
+# Memory power savings
+#
+# CONFIG_I7300_IDLE is not set
+
+#
 # Bus options (PCI etc.)
 #
 CONFIG_PCI=y
@@ -395,8 +422,10 @@ CONFIG_PCI_DIRECT=y
 CONFIG_PCI_MMCONFIG=y
 CONFIG_PCI_DOMAINS=y
 CONFIG_DMAR=y
+# CONFIG_DMAR_DEFAULT_ON is not set
 CONFIG_DMAR_GFX_WA=y
 CONFIG_DMAR_FLOPPY_WA=y
+# CONFIG_INTR_REMAP is not set
 CONFIG_PCIEPORTBUS=y
 # CONFIG_HOTPLUG_PCI_PCIE is not set
 CONFIG_PCIEAER=y
@@ -405,6 +434,7 @@ CONFIG_ARCH_SUPPORTS_MSI=y
 CONFIG_PCI_MSI=y
 # CONFIG_PCI_LEGACY is not set
 # CONFIG_PCI_DEBUG is not set
+# CONFIG_PCI_STUB is not set
 CONFIG_HT_IRQ=y
 CONFIG_ISA_DMA_API=y
 CONFIG_K8_NB=y
@@ -438,6 +468,8 @@ CONFIG_HOTPLUG_PCI=y
 #
 CONFIG_BINFMT_ELF=y
 CONFIG_COMPAT_BINFMT_ELF=y
+CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS=y
+# CONFIG_HAVE_AOUT is not set
 CONFIG_BINFMT_MISC=y
 CONFIG_IA32_EMULATION=y
 # CONFIG_IA32_AOUT is not set
@@ -449,6 +481,7 @@ CONFIG_NET=y
 #
 # Networking options
 #
+CONFIG_COMPAT_NET_DEV_OPS=y
 CONFIG_PACKET=y
 CONFIG_PACKET_MMAP=y
 CONFIG_UNIX=y
@@ -509,7 +542,6 @@ CONFIG_DEFAULT_CUBIC=y
 # CONFIG_DEFAULT_RENO is not set
 CONFIG_DEFAULT_TCP_CONG="cubic"
 CONFIG_TCP_MD5SIG=y
-# CONFIG_IP_VS is not set
 CONFIG_IPV6=y
 # CONFIG_IPV6_PRIVACY is not set
 # CONFIG_IPV6_ROUTER_PREF is not set
@@ -547,19 +579,21 @@ CONFIG_NF_CONNTRACK_IRC=y
 CONFIG_NF_CONNTRACK_SIP=y
 CONFIG_NF_CT_NETLINK=y
 CONFIG_NETFILTER_XTABLES=y
+CONFIG_NETFILTER_XT_TARGET_CONNSECMARK=y
 CONFIG_NETFILTER_XT_TARGET_MARK=y
 CONFIG_NETFILTER_XT_TARGET_NFLOG=y
 CONFIG_NETFILTER_XT_TARGET_SECMARK=y
-CONFIG_NETFILTER_XT_TARGET_CONNSECMARK=y
 CONFIG_NETFILTER_XT_TARGET_TCPMSS=y
 CONFIG_NETFILTER_XT_MATCH_CONNTRACK=y
 CONFIG_NETFILTER_XT_MATCH_MARK=y
 CONFIG_NETFILTER_XT_MATCH_POLICY=y
 CONFIG_NETFILTER_XT_MATCH_STATE=y
+# CONFIG_IP_VS is not set
 
 #
 # IP: Netfilter Configuration
 #
+CONFIG_NF_DEFRAG_IPV4=y
 CONFIG_NF_CONNTRACK_IPV4=y
 CONFIG_NF_CONNTRACK_PROC_COMPAT=y
 CONFIG_IP_NF_IPTABLES=y
@@ -585,8 +619,8 @@ CONFIG_IP_NF_MANGLE=y
 CONFIG_NF_CONNTRACK_IPV6=y
 CONFIG_IP6_NF_IPTABLES=y
 CONFIG_IP6_NF_MATCH_IPV6HEADER=y
-CONFIG_IP6_NF_FILTER=y
 CONFIG_IP6_NF_TARGET_LOG=y
+CONFIG_IP6_NF_FILTER=y
 CONFIG_IP6_NF_TARGET_REJECT=y
 CONFIG_IP6_NF_MANGLE=y
 # CONFIG_IP_DCCP is not set
@@ -594,6 +628,7 @@ CONFIG_IP6_NF_MANGLE=y
 # CONFIG_TIPC is not set
 # CONFIG_ATM is not set
 # CONFIG_BRIDGE is not set
+# CONFIG_NET_DSA is not set
 # CONFIG_VLAN_8021Q is not set
 # CONFIG_DECNET is not set
 CONFIG_LLC=y
@@ -613,6 +648,7 @@ CONFIG_NET_SCHED=y
 # CONFIG_NET_SCH_HTB is not set
 # CONFIG_NET_SCH_HFSC is not set
 # CONFIG_NET_SCH_PRIO is not set
+# CONFIG_NET_SCH_MULTIQ is not set
 # CONFIG_NET_SCH_RED is not set
 # CONFIG_NET_SCH_SFQ is not set
 # CONFIG_NET_SCH_TEQL is not set
@@ -620,6 +656,7 @@ CONFIG_NET_SCHED=y
 # CONFIG_NET_SCH_GRED is not set
 # CONFIG_NET_SCH_DSMARK is not set
 # CONFIG_NET_SCH_NETEM is not set
+# CONFIG_NET_SCH_DRR is not set
 # CONFIG_NET_SCH_INGRESS is not set
 
 #
@@ -634,6 +671,7 @@ CONFIG_NET_CLS=y
 # CONFIG_NET_CLS_RSVP is not set
 # CONFIG_NET_CLS_RSVP6 is not set
 # CONFIG_NET_CLS_FLOW is not set
+# CONFIG_NET_CLS_CGROUP is not set
 CONFIG_NET_EMATCH=y
 CONFIG_NET_EMATCH_STACK=32
 # CONFIG_NET_EMATCH_CMP is not set
@@ -649,7 +687,9 @@ CONFIG_NET_CLS_ACT=y
 # CONFIG_NET_ACT_NAT is not set
 # CONFIG_NET_ACT_PEDIT is not set
 # CONFIG_NET_ACT_SIMP is not set
+# CONFIG_NET_ACT_SKBEDIT is not set
 CONFIG_NET_SCH_FIFO=y
+# CONFIG_DCB is not set
 
 #
 # Network testing
@@ -666,29 +706,33 @@ CONFIG_HAMRADIO=y
 # CONFIG_IRDA is not set
 # CONFIG_BT is not set
 # CONFIG_AF_RXRPC is not set
+# CONFIG_PHONET is not set
 CONFIG_FIB_RULES=y
-
-#
-# Wireless
-#
+CONFIG_WIRELESS=y
 CONFIG_CFG80211=y
+# CONFIG_CFG80211_REG_DEBUG is not set
 CONFIG_NL80211=y
+CONFIG_WIRELESS_OLD_REGULATORY=y
 CONFIG_WIRELESS_EXT=y
 CONFIG_WIRELESS_EXT_SYSFS=y
+# CONFIG_LIB80211 is not set
 CONFIG_MAC80211=y
 
 #
 # Rate control algorithm selection
 #
-CONFIG_MAC80211_RC_PID=y
-CONFIG_MAC80211_RC_DEFAULT_PID=y
-CONFIG_MAC80211_RC_DEFAULT="pid"
+CONFIG_MAC80211_RC_MINSTREL=y
+# CONFIG_MAC80211_RC_DEFAULT_PID is not set
+CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y
+CONFIG_MAC80211_RC_DEFAULT="minstrel"
 # CONFIG_MAC80211_MESH is not set
 CONFIG_MAC80211_LEDS=y
 # CONFIG_MAC80211_DEBUGFS is not set
 # CONFIG_MAC80211_DEBUG_MENU is not set
-# CONFIG_IEEE80211 is not set
-# CONFIG_RFKILL is not set
+# CONFIG_WIMAX is not set
+CONFIG_RFKILL=y
+# CONFIG_RFKILL_INPUT is not set
+CONFIG_RFKILL_LEDS=y
 # CONFIG_NET_9P is not set
 
 #
@@ -712,7 +756,7 @@ CONFIG_PROC_EVENTS=y
 # CONFIG_MTD is not set
 # CONFIG_PARPORT is not set
 CONFIG_PNP=y
-# CONFIG_PNP_DEBUG is not set
+CONFIG_PNP_DEBUG_MESSAGES=y
 
 #
 # Protocols
@@ -740,21 +784,21 @@ CONFIG_BLK_DEV_RAM_SIZE=16384
 CONFIG_MISC_DEVICES=y
 # CONFIG_IBM_ASM is not set
 # CONFIG_PHANTOM is not set
-# CONFIG_EEPROM_93CX6 is not set
 # CONFIG_SGI_IOC4 is not set
 # CONFIG_TIFM_CORE is not set
-# CONFIG_ACER_WMI is not set
-# CONFIG_ASUS_LAPTOP is not set
-# CONFIG_FUJITSU_LAPTOP is not set
-# CONFIG_MSI_LAPTOP is not set
-# CONFIG_COMPAL_LAPTOP is not set
-# CONFIG_SONY_LAPTOP is not set
-# CONFIG_THINKPAD_ACPI is not set
-# CONFIG_INTEL_MENLOW is not set
+# CONFIG_ICS932S401 is not set
 # CONFIG_ENCLOSURE_SERVICES is not set
 # CONFIG_SGI_XP is not set
 # CONFIG_HP_ILO is not set
 # CONFIG_SGI_GRU is not set
+# CONFIG_C2PORT is not set
+
+#
+# EEPROM support
+#
+# CONFIG_EEPROM_AT24 is not set
+# CONFIG_EEPROM_LEGACY is not set
+# CONFIG_EEPROM_93CX6 is not set
 CONFIG_HAVE_IDE=y
 # CONFIG_IDE is not set
 
@@ -793,7 +837,7 @@ CONFIG_SCSI_WAIT_SCAN=m
 #
 CONFIG_SCSI_SPI_ATTRS=y
 # CONFIG_SCSI_FC_ATTRS is not set
-CONFIG_SCSI_ISCSI_ATTRS=y
+# CONFIG_SCSI_ISCSI_ATTRS is not set
 # CONFIG_SCSI_SAS_ATTRS is not set
 # CONFIG_SCSI_SAS_LIBSAS is not set
 # CONFIG_SCSI_SRP_ATTRS is not set
@@ -864,6 +908,7 @@ CONFIG_PATA_OLDPIIX=y
 CONFIG_PATA_SCH=y
 CONFIG_MD=y
 CONFIG_BLK_DEV_MD=y
+CONFIG_MD_AUTODETECT=y
 # CONFIG_MD_LINEAR is not set
 # CONFIG_MD_RAID0 is not set
 # CONFIG_MD_RAID1 is not set
@@ -919,6 +964,9 @@ CONFIG_PHYLIB=y
 # CONFIG_BROADCOM_PHY is not set
 # CONFIG_ICPLUS_PHY is not set
 # CONFIG_REALTEK_PHY is not set
+# CONFIG_NATIONAL_PHY is not set
+# CONFIG_STE10XP is not set
+# CONFIG_LSI_ET1011C_PHY is not set
 # CONFIG_FIXED_PHY is not set
 # CONFIG_MDIO_BITBANG is not set
 CONFIG_NET_ETHERNET=y
@@ -942,6 +990,9 @@ CONFIG_NET_TULIP=y
 # CONFIG_IBM_NEW_EMAC_RGMII is not set
 # CONFIG_IBM_NEW_EMAC_TAH is not set
 # CONFIG_IBM_NEW_EMAC_EMAC4 is not set
+# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
+# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
+# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
 CONFIG_NET_PCI=y
 # CONFIG_PCNET32 is not set
 # CONFIG_AMD8111_ETH is not set
@@ -949,7 +1000,6 @@ CONFIG_NET_PCI=y
 # CONFIG_B44 is not set
 CONFIG_FORCEDETH=y
 # CONFIG_FORCEDETH_NAPI is not set
-# CONFIG_EEPRO100 is not set
 CONFIG_E100=y
 # CONFIG_FEALNX is not set
 # CONFIG_NATSEMI is not set
@@ -963,15 +1013,16 @@ CONFIG_8139TOO_PIO=y
 # CONFIG_R6040 is not set
 # CONFIG_SIS900 is not set
 # CONFIG_EPIC100 is not set
+# CONFIG_SMSC9420 is not set
 # CONFIG_SUNDANCE is not set
 # CONFIG_TLAN is not set
 # CONFIG_VIA_RHINE is not set
 # CONFIG_SC92031 is not set
+# CONFIG_ATL2 is not set
 CONFIG_NETDEV_1000=y
 # CONFIG_ACENIC is not set
 # CONFIG_DL2K is not set
 CONFIG_E1000=y
-# CONFIG_E1000_DISABLE_PACKET_SPLIT is not set
 # CONFIG_E1000E is not set
 # CONFIG_IP1000 is not set
 # CONFIG_IGB is not set
@@ -989,18 +1040,23 @@ CONFIG_TIGON3=y
 # CONFIG_QLA3XXX is not set
 # CONFIG_ATL1 is not set
 # CONFIG_ATL1E is not set
+# CONFIG_JME is not set
 CONFIG_NETDEV_10000=y
 # CONFIG_CHELSIO_T1 is not set
+CONFIG_CHELSIO_T3_DEPENDS=y
 # CONFIG_CHELSIO_T3 is not set
+# CONFIG_ENIC is not set
 # CONFIG_IXGBE is not set
 # CONFIG_IXGB is not set
 # CONFIG_S2IO is not set
 # CONFIG_MYRI10GE is not set
 # CONFIG_NETXEN_NIC is not set
 # CONFIG_NIU is not set
+# CONFIG_MLX4_EN is not set
 # CONFIG_MLX4_CORE is not set
 # CONFIG_TEHUTI is not set
 # CONFIG_BNX2X is not set
+# CONFIG_QLGE is not set
 # CONFIG_SFC is not set
 CONFIG_TR=y
 # CONFIG_IBMOL is not set
@@ -1013,9 +1069,8 @@ CONFIG_TR=y
 # CONFIG_WLAN_PRE80211 is not set
 CONFIG_WLAN_80211=y
 # CONFIG_PCMCIA_RAYCS is not set
-# CONFIG_IPW2100 is not set
-# CONFIG_IPW2200 is not set
 # CONFIG_LIBERTAS is not set
+# CONFIG_LIBERTAS_THINFIRM is not set
 # CONFIG_AIRO is not set
 # CONFIG_HERMES is not set
 # CONFIG_ATMEL is not set
@@ -1032,6 +1087,8 @@ CONFIG_WLAN_80211=y
 CONFIG_ATH5K=y
 # CONFIG_ATH5K_DEBUG is not set
 # CONFIG_ATH9K is not set
+# CONFIG_IPW2100 is not set
+# CONFIG_IPW2200 is not set
 # CONFIG_IWLCORE is not set
 # CONFIG_IWLWIFI_LEDS is not set
 # CONFIG_IWLAGN is not set
@@ -1043,6 +1100,10 @@ CONFIG_ATH5K=y
 # CONFIG_RT2X00 is not set
 
 #
+# Enable WiMAX (Networking options) to see the WiMAX drivers
+#
+
+#
 # USB Network Adapters
 #
 # CONFIG_USB_CATC is not set
@@ -1050,6 +1111,7 @@ CONFIG_ATH5K=y
 # CONFIG_USB_PEGASUS is not set
 # CONFIG_USB_RTL8150 is not set
 # CONFIG_USB_USBNET is not set
+# CONFIG_USB_HSO is not set
 CONFIG_NET_PCMCIA=y
 # CONFIG_PCMCIA_3C589 is not set
 # CONFIG_PCMCIA_3C574 is not set
@@ -1059,6 +1121,7 @@ CONFIG_NET_PCMCIA=y
 # CONFIG_PCMCIA_SMC91C92 is not set
 # CONFIG_PCMCIA_XIRC2PS is not set
 # CONFIG_PCMCIA_AXNET is not set
+# CONFIG_PCMCIA_IBMTR is not set
 # CONFIG_WAN is not set
 CONFIG_FDDI=y
 # CONFIG_DEFXX is not set
@@ -1110,6 +1173,7 @@ CONFIG_MOUSE_PS2_LOGIPS2PP=y
 CONFIG_MOUSE_PS2_SYNAPTICS=y
 CONFIG_MOUSE_PS2_LIFEBOOK=y
 CONFIG_MOUSE_PS2_TRACKPOINT=y
+# CONFIG_MOUSE_PS2_ELANTECH is not set
 # CONFIG_MOUSE_PS2_TOUCHKIT is not set
 # CONFIG_MOUSE_SERIAL is not set
 # CONFIG_MOUSE_APPLETOUCH is not set
@@ -1147,15 +1211,16 @@ CONFIG_INPUT_TOUCHSCREEN=y
 # CONFIG_TOUCHSCREEN_FUJITSU is not set
 # CONFIG_TOUCHSCREEN_GUNZE is not set
 # CONFIG_TOUCHSCREEN_ELO is not set
+# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set
 # CONFIG_TOUCHSCREEN_MTOUCH is not set
 # CONFIG_TOUCHSCREEN_INEXIO is not set
 # CONFIG_TOUCHSCREEN_MK712 is not set
 # CONFIG_TOUCHSCREEN_PENMOUNT is not set
 # CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
 # CONFIG_TOUCHSCREEN_TOUCHWIN is not set
-# CONFIG_TOUCHSCREEN_UCB1400 is not set
 # CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set
 # CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
+# CONFIG_TOUCHSCREEN_TSC2007 is not set
 CONFIG_INPUT_MISC=y
 # CONFIG_INPUT_PCSPKR is not set
 # CONFIG_INPUT_APANEL is not set
@@ -1165,6 +1230,7 @@ CONFIG_INPUT_MISC=y
 # CONFIG_INPUT_KEYSPAN_REMOTE is not set
 # CONFIG_INPUT_POWERMATE is not set
 # CONFIG_INPUT_YEALINK is not set
+# CONFIG_INPUT_CM109 is not set
 # CONFIG_INPUT_UINPUT is not set
 
 #
@@ -1231,6 +1297,7 @@ CONFIG_SERIAL_CORE=y
 CONFIG_SERIAL_CORE_CONSOLE=y
 # CONFIG_SERIAL_JSM is not set
 CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
 # CONFIG_LEGACY_PTYS is not set
 # CONFIG_IPMI_HANDLER is not set
 CONFIG_HW_RANDOM=y
@@ -1260,6 +1327,7 @@ CONFIG_I2C=y
 CONFIG_I2C_BOARDINFO=y
 # CONFIG_I2C_CHARDEV is not set
 CONFIG_I2C_HELPER_AUTO=y
+CONFIG_I2C_ALGOBIT=y
 
 #
 # I2C Hardware Bus support
@@ -1311,8 +1379,6 @@ CONFIG_I2C_I801=y
 # Miscellaneous I2C Chip support
 #
 # CONFIG_DS1682 is not set
-# CONFIG_EEPROM_AT24 is not set
-# CONFIG_EEPROM_LEGACY is not set
 # CONFIG_SENSORS_PCF8574 is not set
 # CONFIG_PCF8575 is not set
 # CONFIG_SENSORS_PCA9539 is not set
@@ -1331,8 +1397,78 @@ CONFIG_POWER_SUPPLY=y
 # CONFIG_POWER_SUPPLY_DEBUG is not set
 # CONFIG_PDA_POWER is not set
 # CONFIG_BATTERY_DS2760 is not set
-# CONFIG_HWMON is not set
+# CONFIG_BATTERY_BQ27x00 is not set
+CONFIG_HWMON=y
+# CONFIG_HWMON_VID is not set
+# CONFIG_SENSORS_ABITUGURU is not set
+# CONFIG_SENSORS_ABITUGURU3 is not set
+# CONFIG_SENSORS_AD7414 is not set
+# CONFIG_SENSORS_AD7418 is not set
+# CONFIG_SENSORS_ADM1021 is not set
+# CONFIG_SENSORS_ADM1025 is not set
+# CONFIG_SENSORS_ADM1026 is not set
+# CONFIG_SENSORS_ADM1029 is not set
+# CONFIG_SENSORS_ADM1031 is not set
+# CONFIG_SENSORS_ADM9240 is not set
+# CONFIG_SENSORS_ADT7462 is not set
+# CONFIG_SENSORS_ADT7470 is not set
+# CONFIG_SENSORS_ADT7473 is not set
+# CONFIG_SENSORS_ADT7475 is not set
+# CONFIG_SENSORS_K8TEMP is not set
+# CONFIG_SENSORS_ASB100 is not set
+# CONFIG_SENSORS_ATXP1 is not set
+# CONFIG_SENSORS_DS1621 is not set
+# CONFIG_SENSORS_I5K_AMB is not set
+# CONFIG_SENSORS_F71805F is not set
+# CONFIG_SENSORS_F71882FG is not set
+# CONFIG_SENSORS_F75375S is not set
+# CONFIG_SENSORS_FSCHER is not set
+# CONFIG_SENSORS_FSCPOS is not set
+# CONFIG_SENSORS_FSCHMD is not set
+# CONFIG_SENSORS_GL518SM is not set
+# CONFIG_SENSORS_GL520SM is not set
+# CONFIG_SENSORS_CORETEMP is not set
+# CONFIG_SENSORS_IT87 is not set
+# CONFIG_SENSORS_LM63 is not set
+# CONFIG_SENSORS_LM75 is not set
+# CONFIG_SENSORS_LM77 is not set
+# CONFIG_SENSORS_LM78 is not set
+# CONFIG_SENSORS_LM80 is not set
+# CONFIG_SENSORS_LM83 is not set
+# CONFIG_SENSORS_LM85 is not set
+# CONFIG_SENSORS_LM87 is not set
+# CONFIG_SENSORS_LM90 is not set
+# CONFIG_SENSORS_LM92 is not set
+# CONFIG_SENSORS_LM93 is not set
+# CONFIG_SENSORS_LTC4245 is not set
+# CONFIG_SENSORS_MAX1619 is not set
+# CONFIG_SENSORS_MAX6650 is not set
+# CONFIG_SENSORS_PC87360 is not set
+# CONFIG_SENSORS_PC87427 is not set
+# CONFIG_SENSORS_SIS5595 is not set
+# CONFIG_SENSORS_DME1737 is not set
+# CONFIG_SENSORS_SMSC47M1 is not set
+# CONFIG_SENSORS_SMSC47M192 is not set
+# CONFIG_SENSORS_SMSC47B397 is not set
+# CONFIG_SENSORS_ADS7828 is not set
+# CONFIG_SENSORS_THMC50 is not set
+# CONFIG_SENSORS_VIA686A is not set
+# CONFIG_SENSORS_VT1211 is not set
+# CONFIG_SENSORS_VT8231 is not set
+# CONFIG_SENSORS_W83781D is not set
+# CONFIG_SENSORS_W83791D is not set
+# CONFIG_SENSORS_W83792D is not set
+# CONFIG_SENSORS_W83793 is not set
+# CONFIG_SENSORS_W83L785TS is not set
+# CONFIG_SENSORS_W83L786NG is not set
+# CONFIG_SENSORS_W83627HF is not set
+# CONFIG_SENSORS_W83627EHF is not set
+# CONFIG_SENSORS_HDAPS is not set
+# CONFIG_SENSORS_LIS3LV02D is not set
+# CONFIG_SENSORS_APPLESMC is not set
+# CONFIG_HWMON_DEBUG_CHIP is not set
 CONFIG_THERMAL=y
+# CONFIG_THERMAL_HWMON is not set
 CONFIG_WATCHDOG=y
 # CONFIG_WATCHDOG_NOWAYOUT is not set
 
@@ -1352,15 +1488,18 @@ CONFIG_WATCHDOG=y
 # CONFIG_I6300ESB_WDT is not set
 # CONFIG_ITCO_WDT is not set
 # CONFIG_IT8712F_WDT is not set
+# CONFIG_IT87_WDT is not set
 # CONFIG_HP_WATCHDOG is not set
 # CONFIG_SC1200_WDT is not set
 # CONFIG_PC87413_WDT is not set
 # CONFIG_60XX_WDT is not set
 # CONFIG_SBC8360_WDT is not set
 # CONFIG_CPU5_WDT is not set
+# CONFIG_SMSC_SCH311X_WDT is not set
 # CONFIG_SMSC37B787_WDT is not set
 # CONFIG_W83627HF_WDT is not set
 # CONFIG_W83697HF_WDT is not set
+# CONFIG_W83697UG_WDT is not set
 # CONFIG_W83877F_WDT is not set
 # CONFIG_W83977F_WDT is not set
 # CONFIG_MACHZ_WDT is not set
@@ -1376,11 +1515,11 @@ CONFIG_WATCHDOG=y
 # USB-based Watchdog Cards
 #
 # CONFIG_USBPCWATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
 
 #
 # Sonics Silicon Backplane
 #
-CONFIG_SSB_POSSIBLE=y
 # CONFIG_SSB is not set
 
 #
@@ -1389,7 +1528,13 @@ CONFIG_SSB_POSSIBLE=y
 # CONFIG_MFD_CORE is not set
 # CONFIG_MFD_SM501 is not set
 # CONFIG_HTC_PASIC3 is not set
+# CONFIG_TWL4030_CORE is not set
 # CONFIG_MFD_TMIO is not set
+# CONFIG_PMIC_DA903X is not set
+# CONFIG_MFD_WM8400 is not set
+# CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_PCF50633 is not set
+# CONFIG_REGULATOR is not set
 
 #
 # Multimedia devices
@@ -1423,6 +1568,7 @@ CONFIG_DRM=y
 # CONFIG_DRM_I810 is not set
 # CONFIG_DRM_I830 is not set
 CONFIG_DRM_I915=y
+CONFIG_DRM_I915_KMS=y
 # CONFIG_DRM_MGA is not set
 # CONFIG_DRM_SIS is not set
 # CONFIG_DRM_VIA is not set
@@ -1432,6 +1578,7 @@ CONFIG_DRM_I915=y
 CONFIG_FB=y
 # CONFIG_FIRMWARE_EDID is not set
 # CONFIG_FB_DDC is not set
+# CONFIG_FB_BOOT_VESA_SUPPORT is not set
 CONFIG_FB_CFB_FILLRECT=y
 CONFIG_FB_CFB_COPYAREA=y
 CONFIG_FB_CFB_IMAGEBLIT=y
@@ -1460,7 +1607,6 @@ CONFIG_FB_TILEBLITTING=y
 # CONFIG_FB_UVESA is not set
 # CONFIG_FB_VESA is not set
 CONFIG_FB_EFI=y
-# CONFIG_FB_IMAC is not set
 # CONFIG_FB_N411 is not set
 # CONFIG_FB_HGA is not set
 # CONFIG_FB_S1D13XXX is not set
@@ -1475,6 +1621,7 @@ CONFIG_FB_EFI=y
 # CONFIG_FB_S3 is not set
 # CONFIG_FB_SAVAGE is not set
 # CONFIG_FB_SIS is not set
+# CONFIG_FB_VIA is not set
 # CONFIG_FB_NEOMAGIC is not set
 # CONFIG_FB_KYRO is not set
 # CONFIG_FB_3DFX is not set
@@ -1486,12 +1633,15 @@ CONFIG_FB_EFI=y
 # CONFIG_FB_CARMINE is not set
 # CONFIG_FB_GEODE is not set
 # CONFIG_FB_VIRTUAL is not set
+# CONFIG_FB_METRONOME is not set
+# CONFIG_FB_MB862XX is not set
 CONFIG_BACKLIGHT_LCD_SUPPORT=y
 # CONFIG_LCD_CLASS_DEVICE is not set
 CONFIG_BACKLIGHT_CLASS_DEVICE=y
-# CONFIG_BACKLIGHT_CORGI is not set
+CONFIG_BACKLIGHT_GENERIC=y
 # CONFIG_BACKLIGHT_PROGEAR is not set
 # CONFIG_BACKLIGHT_MBP_NVIDIA is not set
+# CONFIG_BACKLIGHT_SAHARA is not set
 
 #
 # Display device support
@@ -1511,10 +1661,12 @@ CONFIG_LOGO=y
 # CONFIG_LOGO_LINUX_VGA16 is not set
 CONFIG_LOGO_LINUX_CLUT224=y
 CONFIG_SOUND=y
+CONFIG_SOUND_OSS_CORE=y
 CONFIG_SND=y
 CONFIG_SND_TIMER=y
 CONFIG_SND_PCM=y
 CONFIG_SND_HWDEP=y
+CONFIG_SND_JACK=y
 CONFIG_SND_SEQUENCER=y
 CONFIG_SND_SEQ_DUMMY=y
 CONFIG_SND_OSSEMUL=y
@@ -1522,6 +1674,8 @@ CONFIG_SND_MIXER_OSS=y
 CONFIG_SND_PCM_OSS=y
 CONFIG_SND_PCM_OSS_PLUGINS=y
 CONFIG_SND_SEQUENCER_OSS=y
+CONFIG_SND_HRTIMER=y
+CONFIG_SND_SEQ_HRTIMER_DEFAULT=y
 CONFIG_SND_DYNAMIC_MINORS=y
 CONFIG_SND_SUPPORT_OLD_API=y
 CONFIG_SND_VERBOSE_PROCFS=y
@@ -1575,11 +1729,16 @@ CONFIG_SND_PCI=y
 # CONFIG_SND_FM801 is not set
 CONFIG_SND_HDA_INTEL=y
 CONFIG_SND_HDA_HWDEP=y
+# CONFIG_SND_HDA_RECONFIG is not set
+# CONFIG_SND_HDA_INPUT_BEEP is not set
 CONFIG_SND_HDA_CODEC_REALTEK=y
 CONFIG_SND_HDA_CODEC_ANALOG=y
 CONFIG_SND_HDA_CODEC_SIGMATEL=y
 CONFIG_SND_HDA_CODEC_VIA=y
 CONFIG_SND_HDA_CODEC_ATIHDMI=y
+CONFIG_SND_HDA_CODEC_NVHDMI=y
+CONFIG_SND_HDA_CODEC_INTELHDMI=y
+CONFIG_SND_HDA_ELD=y
 CONFIG_SND_HDA_CODEC_CONEXANT=y
 CONFIG_SND_HDA_CODEC_CMEDIA=y
 CONFIG_SND_HDA_CODEC_SI3054=y
@@ -1612,6 +1771,7 @@ CONFIG_SND_USB=y
 # CONFIG_SND_USB_AUDIO is not set
 # CONFIG_SND_USB_USX2Y is not set
 # CONFIG_SND_USB_CAIAQ is not set
+# CONFIG_SND_USB_US122L is not set
 CONFIG_SND_PCMCIA=y
 # CONFIG_SND_VXPOCKET is not set
 # CONFIG_SND_PDAUDIOCF is not set
@@ -1626,15 +1786,37 @@ CONFIG_HIDRAW=y
 # USB Input Devices
 #
 CONFIG_USB_HID=y
-CONFIG_USB_HIDINPUT_POWERBOOK=y
-CONFIG_HID_FF=y
 CONFIG_HID_PID=y
+CONFIG_USB_HIDDEV=y
+
+#
+# Special HID drivers
+#
+CONFIG_HID_COMPAT=y
+CONFIG_HID_A4TECH=y
+CONFIG_HID_APPLE=y
+CONFIG_HID_BELKIN=y
+CONFIG_HID_CHERRY=y
+CONFIG_HID_CHICONY=y
+CONFIG_HID_CYPRESS=y
+CONFIG_HID_EZKEY=y
+CONFIG_HID_GYRATION=y
+CONFIG_HID_LOGITECH=y
 CONFIG_LOGITECH_FF=y
 # CONFIG_LOGIRUMBLEPAD2_FF is not set
+CONFIG_HID_MICROSOFT=y
+CONFIG_HID_MONTEREY=y
+CONFIG_HID_NTRIG=y
+CONFIG_HID_PANTHERLORD=y
 CONFIG_PANTHERLORD_FF=y
+CONFIG_HID_PETALYNX=y
+CONFIG_HID_SAMSUNG=y
+CONFIG_HID_SONY=y
+CONFIG_HID_SUNPLUS=y
+# CONFIG_GREENASIA_FF is not set
+CONFIG_HID_TOPSEED=y
 CONFIG_THRUSTMASTER_FF=y
 CONFIG_ZEROPLUS_FF=y
-CONFIG_USB_HIDDEV=y
 CONFIG_USB_SUPPORT=y
 CONFIG_USB_ARCH_HAS_HCD=y
 CONFIG_USB_ARCH_HAS_OHCI=y
@@ -1652,6 +1834,8 @@ CONFIG_USB_DEVICEFS=y
 CONFIG_USB_SUSPEND=y
 # CONFIG_USB_OTG is not set
 CONFIG_USB_MON=y
+# CONFIG_USB_WUSB is not set
+# CONFIG_USB_WUSB_CBAF is not set
 
 #
 # USB Host Controller Drivers
@@ -1660,6 +1844,7 @@ CONFIG_USB_MON=y
 CONFIG_USB_EHCI_HCD=y
 # CONFIG_USB_EHCI_ROOT_HUB_TT is not set
 # CONFIG_USB_EHCI_TT_NEWSCHED is not set
+# CONFIG_USB_OXU210HP_HCD is not set
 # CONFIG_USB_ISP116X_HCD is not set
 # CONFIG_USB_ISP1760_HCD is not set
 CONFIG_USB_OHCI_HCD=y
@@ -1669,6 +1854,8 @@ CONFIG_USB_OHCI_LITTLE_ENDIAN=y
 CONFIG_USB_UHCI_HCD=y
 # CONFIG_USB_SL811_HCD is not set
 # CONFIG_USB_R8A66597_HCD is not set
+# CONFIG_USB_WHCI_HCD is not set
+# CONFIG_USB_HWA_HCD is not set
 
 #
 # USB Device Class drivers
@@ -1676,20 +1863,20 @@ CONFIG_USB_UHCI_HCD=y
 # CONFIG_USB_ACM is not set
 CONFIG_USB_PRINTER=y
 # CONFIG_USB_WDM is not set
+# CONFIG_USB_TMC is not set
 
 #
-# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
+# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed;
 #
 
 #
-# may also be needed; see USB_STORAGE Help for more information
+# see USB_STORAGE Help for more information
 #
 CONFIG_USB_STORAGE=y
 # CONFIG_USB_STORAGE_DEBUG is not set
 # CONFIG_USB_STORAGE_DATAFAB is not set
 # CONFIG_USB_STORAGE_FREECOM is not set
 # CONFIG_USB_STORAGE_ISD200 is not set
-# CONFIG_USB_STORAGE_DPCM is not set
 # CONFIG_USB_STORAGE_USBAT is not set
 # CONFIG_USB_STORAGE_SDDR09 is not set
 # CONFIG_USB_STORAGE_SDDR55 is not set
@@ -1697,7 +1884,6 @@ CONFIG_USB_STORAGE=y
 # CONFIG_USB_STORAGE_ALAUDA is not set
 # CONFIG_USB_STORAGE_ONETOUCH is not set
 # CONFIG_USB_STORAGE_KARMA is not set
-# CONFIG_USB_STORAGE_SIERRA is not set
 # CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
 CONFIG_USB_LIBUSUAL=y
 
@@ -1718,6 +1904,7 @@ CONFIG_USB_LIBUSUAL=y
 # CONFIG_USB_EMI62 is not set
 # CONFIG_USB_EMI26 is not set
 # CONFIG_USB_ADUTUX is not set
+# CONFIG_USB_SEVSEG is not set
 # CONFIG_USB_RIO500 is not set
 # CONFIG_USB_LEGOTOWER is not set
 # CONFIG_USB_LCD is not set
@@ -1735,7 +1922,13 @@ CONFIG_USB_LIBUSUAL=y
 # CONFIG_USB_IOWARRIOR is not set
 # CONFIG_USB_TEST is not set
 # CONFIG_USB_ISIGHTFW is not set
+# CONFIG_USB_VST is not set
 # CONFIG_USB_GADGET is not set
+
+#
+# OTG and related infrastructure
+#
+# CONFIG_UWB is not set
 # CONFIG_MMC is not set
 # CONFIG_MEMSTICK is not set
 CONFIG_NEW_LEDS=y
@@ -1744,6 +1937,7 @@ CONFIG_LEDS_CLASS=y
 #
 # LED drivers
 #
+# CONFIG_LEDS_ALIX2 is not set
 # CONFIG_LEDS_PCA9532 is not set
 # CONFIG_LEDS_CLEVO_MAIL is not set
 # CONFIG_LEDS_PCA955X is not set
@@ -1754,6 +1948,7 @@ CONFIG_LEDS_CLASS=y
 CONFIG_LEDS_TRIGGERS=y
 # CONFIG_LEDS_TRIGGER_TIMER is not set
 # CONFIG_LEDS_TRIGGER_HEARTBEAT is not set
+# CONFIG_LEDS_TRIGGER_BACKLIGHT is not set
 # CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set
 # CONFIG_ACCESSIBILITY is not set
 # CONFIG_INFINIBAND is not set
@@ -1793,6 +1988,7 @@ CONFIG_RTC_INTF_DEV=y
 # CONFIG_RTC_DRV_M41T80 is not set
 # CONFIG_RTC_DRV_S35390A is not set
 # CONFIG_RTC_DRV_FM3130 is not set
+# CONFIG_RTC_DRV_RX8581 is not set
 
 #
 # SPI RTC drivers
@@ -1802,12 +1998,15 @@ CONFIG_RTC_INTF_DEV=y
 # Platform RTC drivers
 #
 CONFIG_RTC_DRV_CMOS=y
+# CONFIG_RTC_DRV_DS1286 is not set
 # CONFIG_RTC_DRV_DS1511 is not set
 # CONFIG_RTC_DRV_DS1553 is not set
 # CONFIG_RTC_DRV_DS1742 is not set
 # CONFIG_RTC_DRV_STK17TA8 is not set
 # CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_M48T35 is not set
 # CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_BQ4802 is not set
 # CONFIG_RTC_DRV_V3020 is not set
 
 #
@@ -1820,6 +2019,21 @@ CONFIG_DMADEVICES=y
 #
 # CONFIG_INTEL_IOATDMA is not set
 # CONFIG_UIO is not set
+# CONFIG_STAGING is not set
+CONFIG_X86_PLATFORM_DEVICES=y
+# CONFIG_ACER_WMI is not set
+# CONFIG_ASUS_LAPTOP is not set
+# CONFIG_FUJITSU_LAPTOP is not set
+# CONFIG_MSI_LAPTOP is not set
+# CONFIG_PANASONIC_LAPTOP is not set
+# CONFIG_COMPAL_LAPTOP is not set
+# CONFIG_SONY_LAPTOP is not set
+# CONFIG_THINKPAD_ACPI is not set
+# CONFIG_INTEL_MENLOW is not set
+CONFIG_EEEPC_LAPTOP=y
+# CONFIG_ACPI_WMI is not set
+# CONFIG_ACPI_ASUS is not set
+# CONFIG_ACPI_TOSHIBA is not set
 
 #
 # Firmware Drivers
@@ -1830,8 +2044,7 @@ CONFIG_EFI_VARS=y
 # CONFIG_DELL_RBU is not set
 # CONFIG_DCDBAS is not set
 CONFIG_DMIID=y
-CONFIG_ISCSI_IBFT_FIND=y
-CONFIG_ISCSI_IBFT=y
+# CONFIG_ISCSI_IBFT_FIND is not set
 
 #
 # File systems
@@ -1841,22 +2054,25 @@ CONFIG_EXT3_FS=y
 CONFIG_EXT3_FS_XATTR=y
 CONFIG_EXT3_FS_POSIX_ACL=y
 CONFIG_EXT3_FS_SECURITY=y
-# CONFIG_EXT4DEV_FS is not set
+# CONFIG_EXT4_FS is not set
 CONFIG_JBD=y
 # CONFIG_JBD_DEBUG is not set
 CONFIG_FS_MBCACHE=y
 # CONFIG_REISERFS_FS is not set
 # CONFIG_JFS_FS is not set
 CONFIG_FS_POSIX_ACL=y
+CONFIG_FILE_LOCKING=y
 # CONFIG_XFS_FS is not set
 # CONFIG_GFS2_FS is not set
 # CONFIG_OCFS2_FS is not set
+# CONFIG_BTRFS_FS is not set
 CONFIG_DNOTIFY=y
 CONFIG_INOTIFY=y
 CONFIG_INOTIFY_USER=y
 CONFIG_QUOTA=y
 CONFIG_QUOTA_NETLINK_INTERFACE=y
 # CONFIG_PRINT_QUOTA_WARNING is not set
+CONFIG_QUOTA_TREE=y
 # CONFIG_QFMT_V1 is not set
 CONFIG_QFMT_V2=y
 CONFIG_QUOTACTL=y
@@ -1890,16 +2106,14 @@ CONFIG_PROC_FS=y
 CONFIG_PROC_KCORE=y
 CONFIG_PROC_VMCORE=y
 CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_PAGE_MONITOR=y
 CONFIG_SYSFS=y
 CONFIG_TMPFS=y
 CONFIG_TMPFS_POSIX_ACL=y
 CONFIG_HUGETLBFS=y
 CONFIG_HUGETLB_PAGE=y
 # CONFIG_CONFIGFS_FS is not set
-
-#
-# Miscellaneous filesystems
-#
+CONFIG_MISC_FILESYSTEMS=y
 # CONFIG_ADFS_FS is not set
 # CONFIG_AFFS_FS is not set
 # CONFIG_ECRYPT_FS is not set
@@ -1909,6 +2123,7 @@ CONFIG_HUGETLB_PAGE=y
 # CONFIG_BFS_FS is not set
 # CONFIG_EFS_FS is not set
 # CONFIG_CRAMFS is not set
+# CONFIG_SQUASHFS is not set
 # CONFIG_VXFS_FS is not set
 # CONFIG_MINIX_FS is not set
 # CONFIG_OMFS_FS is not set
@@ -1930,6 +2145,7 @@ CONFIG_NFS_ACL_SUPPORT=y
 CONFIG_NFS_COMMON=y
 CONFIG_SUNRPC=y
 CONFIG_SUNRPC_GSS=y
+# CONFIG_SUNRPC_REGISTER_V4 is not set
 CONFIG_RPCSEC_GSS_KRB5=y
 # CONFIG_RPCSEC_GSS_SPKM3 is not set
 # CONFIG_SMB_FS is not set
@@ -2006,7 +2222,7 @@ CONFIG_NLS_UTF8=y
 #
 CONFIG_TRACE_IRQFLAGS_SUPPORT=y
 CONFIG_PRINTK_TIME=y
-CONFIG_ENABLE_WARN_DEPRECATED=y
+# CONFIG_ENABLE_WARN_DEPRECATED is not set
 CONFIG_ENABLE_MUST_CHECK=y
 CONFIG_FRAME_WARN=2048
 CONFIG_MAGIC_SYSRQ=y
@@ -2035,40 +2251,60 @@ CONFIG_TIMER_STATS=y
 CONFIG_DEBUG_BUGVERBOSE=y
 # CONFIG_DEBUG_INFO is not set
 # CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_VIRTUAL is not set
 # CONFIG_DEBUG_WRITECOUNT is not set
 CONFIG_DEBUG_MEMORY_INIT=y
 # CONFIG_DEBUG_LIST is not set
 # CONFIG_DEBUG_SG is not set
+# CONFIG_DEBUG_NOTIFIERS is not set
+CONFIG_ARCH_WANT_FRAME_POINTERS=y
 CONFIG_FRAME_POINTER=y
 # CONFIG_BOOT_PRINTK_DELAY is not set
 # CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
 # CONFIG_KPROBES_SANITY_TEST is not set
 # CONFIG_BACKTRACE_SELF_TEST is not set
+# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
 # CONFIG_LKDTM is not set
 # CONFIG_FAULT_INJECTION is not set
 # CONFIG_LATENCYTOP is not set
 CONFIG_SYSCTL_SYSCALL_CHECK=y
-CONFIG_HAVE_FTRACE=y
+CONFIG_USER_STACKTRACE_SUPPORT=y
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
 CONFIG_HAVE_DYNAMIC_FTRACE=y
-# CONFIG_FTRACE is not set
+CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_HAVE_HW_BRANCH_TRACER=y
+
+#
+# Tracers
+#
+# CONFIG_FUNCTION_TRACER is not set
 # CONFIG_IRQSOFF_TRACER is not set
 # CONFIG_SYSPROF_TRACER is not set
 # CONFIG_SCHED_TRACER is not set
 # CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_BOOT_TRACER is not set
+# CONFIG_TRACE_BRANCH_PROFILING is not set
+# CONFIG_POWER_TRACER is not set
+# CONFIG_STACK_TRACER is not set
+# CONFIG_HW_BRANCH_TRACER is not set
 CONFIG_PROVIDE_OHCI1394_DMA_INIT=y
+# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
 # CONFIG_SAMPLES is not set
 CONFIG_HAVE_ARCH_KGDB=y
 # CONFIG_KGDB is not set
 # CONFIG_STRICT_DEVMEM is not set
 CONFIG_X86_VERBOSE_BOOTUP=y
 CONFIG_EARLY_PRINTK=y
+CONFIG_EARLY_PRINTK_DBGP=y
 CONFIG_DEBUG_STACKOVERFLOW=y
 CONFIG_DEBUG_STACK_USAGE=y
 # CONFIG_DEBUG_PAGEALLOC is not set
 # CONFIG_DEBUG_PER_CPU_MAPS is not set
 # CONFIG_X86_PTDUMP is not set
 CONFIG_DEBUG_RODATA=y
-# CONFIG_DIRECT_GBPAGES is not set
 # CONFIG_DEBUG_RODATA_TEST is not set
 CONFIG_DEBUG_NX_TEST=m
 # CONFIG_IOMMU_DEBUG is not set
@@ -2092,8 +2328,10 @@ CONFIG_OPTIMIZE_INLINING=y
 CONFIG_KEYS=y
 CONFIG_KEYS_DEBUG_PROC_KEYS=y
 CONFIG_SECURITY=y
+# CONFIG_SECURITYFS is not set
 CONFIG_SECURITY_NETWORK=y
 # CONFIG_SECURITY_NETWORK_XFRM is not set
+# CONFIG_SECURITY_PATH is not set
 CONFIG_SECURITY_FILE_CAPABILITIES=y
 # CONFIG_SECURITY_ROOTPLUG is not set
 CONFIG_SECURITY_DEFAULT_MMAP_MIN_ADDR=65536
@@ -2104,7 +2342,6 @@ CONFIG_SECURITY_SELINUX_DISABLE=y
 CONFIG_SECURITY_SELINUX_DEVELOP=y
 CONFIG_SECURITY_SELINUX_AVC_STATS=y
 CONFIG_SECURITY_SELINUX_CHECKREQPROT_VALUE=1
-# CONFIG_SECURITY_SELINUX_ENABLE_SECMARK_DEFAULT is not set
 # CONFIG_SECURITY_SELINUX_POLICYDB_VERSION_MAX is not set
 # CONFIG_SECURITY_SMACK is not set
 CONFIG_CRYPTO=y
@@ -2112,11 +2349,18 @@ CONFIG_CRYPTO=y
 #
 # Crypto core or helper
 #
+# CONFIG_CRYPTO_FIPS is not set
 CONFIG_CRYPTO_ALGAPI=y
+CONFIG_CRYPTO_ALGAPI2=y
 CONFIG_CRYPTO_AEAD=y
+CONFIG_CRYPTO_AEAD2=y
 CONFIG_CRYPTO_BLKCIPHER=y
+CONFIG_CRYPTO_BLKCIPHER2=y
 CONFIG_CRYPTO_HASH=y
+CONFIG_CRYPTO_HASH2=y
+CONFIG_CRYPTO_RNG2=y
 CONFIG_CRYPTO_MANAGER=y
+CONFIG_CRYPTO_MANAGER2=y
 # CONFIG_CRYPTO_GF128MUL is not set
 # CONFIG_CRYPTO_NULL is not set
 # CONFIG_CRYPTO_CRYPTD is not set
@@ -2151,6 +2395,7 @@ CONFIG_CRYPTO_HMAC=y
 # Digest
 #
 # CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_CRC32C_INTEL is not set
 # CONFIG_CRYPTO_MD4 is not set
 CONFIG_CRYPTO_MD5=y
 # CONFIG_CRYPTO_MICHAEL_MIC is not set
@@ -2191,6 +2436,11 @@ CONFIG_CRYPTO_DES=y
 #
 # CONFIG_CRYPTO_DEFLATE is not set
 # CONFIG_CRYPTO_LZO is not set
+
+#
+# Random Number Generation
+#
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
 CONFIG_CRYPTO_HW=y
 # CONFIG_CRYPTO_DEV_HIFN_795X is not set
 CONFIG_HAVE_KVM=y
@@ -2205,6 +2455,7 @@ CONFIG_VIRTUALIZATION=y
 CONFIG_BITREVERSE=y
 CONFIG_GENERIC_FIND_FIRST_BIT=y
 CONFIG_GENERIC_FIND_NEXT_BIT=y
+CONFIG_GENERIC_FIND_LAST_BIT=y
 # CONFIG_CRC_CCITT is not set
 # CONFIG_CRC16 is not set
 CONFIG_CRC_T10DIF=y
diff --git a/arch/x86/crypto/Makefile b/arch/x86/crypto/Makefile
index 903de4aa5094..ebe7deedd5b4 100644
--- a/arch/x86/crypto/Makefile
+++ b/arch/x86/crypto/Makefile
@@ -9,6 +9,7 @@ obj-$(CONFIG_CRYPTO_SALSA20_586) += salsa20-i586.o
 obj-$(CONFIG_CRYPTO_AES_X86_64) += aes-x86_64.o
 obj-$(CONFIG_CRYPTO_TWOFISH_X86_64) += twofish-x86_64.o
 obj-$(CONFIG_CRYPTO_SALSA20_X86_64) += salsa20-x86_64.o
+obj-$(CONFIG_CRYPTO_AES_NI_INTEL) += aesni-intel.o
 
 obj-$(CONFIG_CRYPTO_CRC32C_INTEL) += crc32c-intel.o
 
@@ -19,3 +20,5 @@ salsa20-i586-y := salsa20-i586-asm_32.o salsa20_glue.o
 aes-x86_64-y := aes-x86_64-asm_64.o aes_glue.o
 twofish-x86_64-y := twofish-x86_64-asm_64.o twofish_glue.o
 salsa20-x86_64-y := salsa20-x86_64-asm_64.o salsa20_glue.o
+
+aesni-intel-y := aesni-intel_asm.o aesni-intel_glue.o
diff --git a/arch/x86/crypto/aes-i586-asm_32.S b/arch/x86/crypto/aes-i586-asm_32.S
index e41b147f4509..b949ec2f9af4 100644
--- a/arch/x86/crypto/aes-i586-asm_32.S
+++ b/arch/x86/crypto/aes-i586-asm_32.S
@@ -41,14 +41,14 @@
 #define tlen 1024   // length of each of 4 'xor' arrays (256 32-bit words)
 
 /* offsets to parameters with one register pushed onto stack */
-#define tfm 8
+#define ctx 8
 #define out_blk 12
 #define in_blk 16
 
-/* offsets in crypto_tfm structure */
-#define klen (crypto_tfm_ctx_offset + 0)
-#define ekey (crypto_tfm_ctx_offset + 4)
-#define dkey (crypto_tfm_ctx_offset + 244)
+/* offsets in crypto_aes_ctx structure */
+#define klen (480)
+#define ekey (0)
+#define dkey (240)
 
 // register mapping for encrypt and decrypt subroutines
 
@@ -217,7 +217,7 @@
         do_col (table, r5,r0,r1,r4, r2,r3);             /* idx=r5 */
 
 // AES (Rijndael) Encryption Subroutine
-/* void aes_enc_blk(struct crypto_tfm *tfm, u8 *out_blk, const u8 *in_blk) */
+/* void aes_enc_blk(struct crypto_aes_ctx *ctx, u8 *out_blk, const u8 *in_blk) */
 
 .global  aes_enc_blk
 
@@ -228,7 +228,7 @@
 
 aes_enc_blk:
         push    %ebp
-        mov     tfm(%esp),%ebp
+        mov     ctx(%esp),%ebp
 
 // CAUTION: the order and the values used in these assigns 
 // rely on the register mappings
@@ -292,7 +292,7 @@ aes_enc_blk:
         ret
 
 // AES (Rijndael) Decryption Subroutine
-/* void aes_dec_blk(struct crypto_tfm *tfm, u8 *out_blk, const u8 *in_blk) */
+/* void aes_dec_blk(struct crypto_aes_ctx *ctx, u8 *out_blk, const u8 *in_blk) */
 
 .global  aes_dec_blk
 
@@ -303,7 +303,7 @@ aes_enc_blk:
 
 aes_dec_blk:
         push    %ebp
-        mov     tfm(%esp),%ebp
+        mov     ctx(%esp),%ebp
 
 // CAUTION: the order and the values used in these assigns 
 // rely on the register mappings
diff --git a/arch/x86/crypto/aes-x86_64-asm_64.S b/arch/x86/crypto/aes-x86_64-asm_64.S
index a120f526c3df..5b577d5a059b 100644
--- a/arch/x86/crypto/aes-x86_64-asm_64.S
+++ b/arch/x86/crypto/aes-x86_64-asm_64.S
@@ -17,8 +17,6 @@
 
 #include <asm/asm-offsets.h>
 
-#define BASE crypto_tfm_ctx_offset
-
 #define R1      %rax
 #define R1E     %eax
 #define R1X     %ax
@@ -56,13 +54,13 @@
         .align  8;                      \
 FUNC:   movq    r1,r2;                  \
         movq    r3,r4;                  \
-        leaq    BASE+KEY+48+4(r8),r9;   \
+        leaq    KEY+48(r8),r9;          \
         movq    r10,r11;                \
         movl    (r7),r5 ## E;           \
         movl    4(r7),r1 ## E;          \
         movl    8(r7),r6 ## E;          \
         movl    12(r7),r7 ## E;         \
-        movl    BASE+0(r8),r10 ## E;    \
+        movl    480(r8),r10 ## E;       \
         xorl    -48(r9),r5 ## E;        \
         xorl    -44(r9),r1 ## E;        \
         xorl    -40(r9),r6 ## E;        \
diff --git a/arch/x86/crypto/aes_glue.c b/arch/x86/crypto/aes_glue.c
index 71f457827116..49ae9fe32b22 100644
--- a/arch/x86/crypto/aes_glue.c
+++ b/arch/x86/crypto/aes_glue.c
@@ -5,17 +5,29 @@
 
 #include <crypto/aes.h>
 
-asmlinkage void aes_enc_blk(struct crypto_tfm *tfm, u8 *out, const u8 *in);
-asmlinkage void aes_dec_blk(struct crypto_tfm *tfm, u8 *out, const u8 *in);
+asmlinkage void aes_enc_blk(struct crypto_aes_ctx *ctx, u8 *out, const u8 *in);
+asmlinkage void aes_dec_blk(struct crypto_aes_ctx *ctx, u8 *out, const u8 *in);
+
+void crypto_aes_encrypt_x86(struct crypto_aes_ctx *ctx, u8 *dst, const u8 *src)
+{
+        aes_enc_blk(ctx, dst, src);
+}
+EXPORT_SYMBOL_GPL(crypto_aes_encrypt_x86);
+
+void crypto_aes_decrypt_x86(struct crypto_aes_ctx *ctx, u8 *dst, const u8 *src)
+{
+        aes_dec_blk(ctx, dst, src);
+}
+EXPORT_SYMBOL_GPL(crypto_aes_decrypt_x86);
 
 static void aes_encrypt(struct crypto_tfm *tfm, u8 *dst, const u8 *src)
 {
-        aes_enc_blk(tfm, dst, src);
+        aes_enc_blk(crypto_tfm_ctx(tfm), dst, src);
 }
 
 static void aes_decrypt(struct crypto_tfm *tfm, u8 *dst, const u8 *src)
 {
-        aes_dec_blk(tfm, dst, src);
+        aes_dec_blk(crypto_tfm_ctx(tfm), dst, src);
 }
 
 static struct crypto_alg aes_alg = {
diff --git a/arch/x86/crypto/aesni-intel_asm.S b/arch/x86/crypto/aesni-intel_asm.S
new file mode 100644
index 000000000000..caba99601703
--- /dev/null
+++ b/arch/x86/crypto/aesni-intel_asm.S
@@ -0,0 +1,896 @@
+/*
+ * Implement AES algorithm in Intel AES-NI instructions.
+ *
+ * The white paper of AES-NI instructions can be downloaded from:
+ *   http://softwarecommunity.intel.com/isn/downloads/intelavx/AES-Instructions-Set_WP.pdf
+ *
+ * Copyright (C) 2008, Intel Corp.
+ *    Author: Huang Ying <ying.huang@intel.com>
+ *            Vinodh Gopal <vinodh.gopal@intel.com>
+ *            Kahraman Akdemir
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include <linux/linkage.h>
+
+.text
+
+#define STATE1  %xmm0
+#define STATE2  %xmm4
+#define STATE3  %xmm5
+#define STATE4  %xmm6
+#define STATE   STATE1
+#define IN1     %xmm1
+#define IN2     %xmm7
+#define IN3     %xmm8
+#define IN4     %xmm9
+#define IN      IN1
+#define KEY     %xmm2
+#define IV      %xmm3
+
+#define KEYP    %rdi
+#define OUTP    %rsi
+#define INP     %rdx
+#define LEN     %rcx
+#define IVP     %r8
+#define KLEN    %r9d
+#define T1      %r10
+#define TKEYP   T1
+#define T2      %r11
+
+_key_expansion_128:
+_key_expansion_256a:
+        pshufd $0b11111111, %xmm1, %xmm1
+        shufps $0b00010000, %xmm0, %xmm4
+        pxor %xmm4, %xmm0
+        shufps $0b10001100, %xmm0, %xmm4
+        pxor %xmm4, %xmm0
+        pxor %xmm1, %xmm0
+        movaps %xmm0, (%rcx)
+        add $0x10, %rcx
+        ret
+
+_key_expansion_192a:
+        pshufd $0b01010101, %xmm1, %xmm1
+        shufps $0b00010000, %xmm0, %xmm4
+        pxor %xmm4, %xmm0
+        shufps $0b10001100, %xmm0, %xmm4
+        pxor %xmm4, %xmm0
+        pxor %xmm1, %xmm0
+
+        movaps %xmm2, %xmm5
+        movaps %xmm2, %xmm6
+        pslldq $4, %xmm5
+        pshufd $0b11111111, %xmm0, %xmm3
+        pxor %xmm3, %xmm2
+        pxor %xmm5, %xmm2
+
+        movaps %xmm0, %xmm1
+        shufps $0b01000100, %xmm0, %xmm6
+        movaps %xmm6, (%rcx)
+        shufps $0b01001110, %xmm2, %xmm1
+        movaps %xmm1, 16(%rcx)
+        add $0x20, %rcx
+        ret
+
+_key_expansion_192b:
+        pshufd $0b01010101, %xmm1, %xmm1
+        shufps $0b00010000, %xmm0, %xmm4
+        pxor %xmm4, %xmm0
+        shufps $0b10001100, %xmm0, %xmm4
+        pxor %xmm4, %xmm0
+        pxor %xmm1, %xmm0
+
+        movaps %xmm2, %xmm5
+        pslldq $4, %xmm5
+        pshufd $0b11111111, %xmm0, %xmm3
+        pxor %xmm3, %xmm2
+        pxor %xmm5, %xmm2
+
+        movaps %xmm0, (%rcx)
+        add $0x10, %rcx
+        ret
+
+_key_expansion_256b:
+        pshufd $0b10101010, %xmm1, %xmm1
+        shufps $0b00010000, %xmm2, %xmm4
+        pxor %xmm4, %xmm2
+        shufps $0b10001100, %xmm2, %xmm4
+        pxor %xmm4, %xmm2
+        pxor %xmm1, %xmm2
+        movaps %xmm2, (%rcx)
+        add $0x10, %rcx
+        ret
+
+/*
+ * int aesni_set_key(struct crypto_aes_ctx *ctx, const u8 *in_key,
+ *                   unsigned int key_len)
+ */
+ENTRY(aesni_set_key)
+        movups (%rsi), %xmm0            # user key (first 16 bytes)
+        movaps %xmm0, (%rdi)
+        lea 0x10(%rdi), %rcx            # key addr
+        movl %edx, 480(%rdi)
+        pxor %xmm4, %xmm4               # xmm4 is assumed 0 in _key_expansion_x
+        cmp $24, %dl
+        jb .Lenc_key128
+        je .Lenc_key192
+        movups 0x10(%rsi), %xmm2        # other user key
+        movaps %xmm2, (%rcx)
+        add $0x10, %rcx
+        # aeskeygenassist $0x1, %xmm2, %xmm1    # round 1
+        .byte 0x66, 0x0f, 0x3a, 0xdf, 0xca, 0x01
+        call _key_expansion_256a
+        # aeskeygenassist $0x1, %xmm0, %xmm1
+        .byte 0x66, 0x0f, 0x3a, 0xdf, 0xc8, 0x01
+        call _key_expansion_256b
+        # aeskeygenassist $0x2, %xmm2, %xmm1    # round 2
+        .byte 0x66, 0x0f, 0x3a, 0xdf, 0xca, 0x02
+        call _key_expansion_256a
+        # aeskeygenassist $0x2, %xmm0, %xmm1
+        .byte 0x66, 0x0f, 0x3a, 0xdf, 0xc8, 0x02
+        call _key_expansion_256b
+        # aeskeygenassist $0x4, %xmm2, %xmm1    # round 3
+        .byte 0x66, 0x0f, 0x3a, 0xdf, 0xca, 0x04
+        call _key_expansion_256a
+        # aeskeygenassist $0x4, %xmm0, %xmm1
+        .byte 0x66, 0x0f, 0x3a, 0xdf, 0xc8, 0x04
+        call _key_expansion_256b
+        # aeskeygenassist $0x8, %xmm2, %xmm1    # round 4
+        .byte 0x66, 0x0f, 0x3a, 0xdf, 0xca, 0x08
+        call _key_expansion_256a
+        # aeskeygenassist $0x8, %xmm0, %xmm1
+        .byte 0x66, 0x0f, 0x3a, 0xdf, 0xc8, 0x08
+        call _key_expansion_256b
+        # aeskeygenassist $0x10, %xmm2, %xmm1   # round 5
+        .byte 0x66, 0x0f, 0x3a, 0xdf, 0xca, 0x10
+        call _key_expansion_256a
+        # aeskeygenassist $0x10, %xmm0, %xmm1
+        .byte 0x66, 0x0f, 0x3a, 0xdf, 0xc8, 0x10
+        call _key_expansion_256b
+        # aeskeygenassist $0x20, %xmm2, %xmm1   # round 6
+        .byte 0x66, 0x0f, 0x3a, 0xdf, 0xca, 0x20
+        call _key_expansion_256a
+        # aeskeygenassist $0x20, %xmm0, %xmm1
+        .byte 0x66, 0x0f, 0x3a, 0xdf, 0xc8, 0x20
+        call _key_expansion_256b
+        # aeskeygenassist $0x40, %xmm2, %xmm1   # round 7
+        .byte 0x66, 0x0f, 0x3a, 0xdf, 0xca, 0x40
+        call _key_expansion_256a
+        jmp .Ldec_key
+.Lenc_key192:
+        movq 0x10(%rsi), %xmm2          # other user key
+        # aeskeygenassist $0x1, %xmm2, %xmm1    # round 1
+        .byte 0x66, 0x0f, 0x3a, 0xdf, 0xca, 0x01
+        call _key_expansion_192a
+        # aeskeygenassist $0x2, %xmm2, %xmm1    # round 2
+        .byte 0x66, 0x0f, 0x3a, 0xdf, 0xca, 0x02
+        call _key_expansion_192b
+        # aeskeygenassist $0x4, %xmm2, %xmm1    # round 3
+        .byte 0x66, 0x0f, 0x3a, 0xdf, 0xca, 0x04
+        call _key_expansion_192a
+        # aeskeygenassist $0x8, %xmm2, %xmm1    # round 4
+        .byte 0x66, 0x0f, 0x3a, 0xdf, 0xca, 0x08
+        call _key_expansion_192b
+        # aeskeygenassist $0x10, %xmm2, %xmm1   # round 5
+        .byte 0x66, 0x0f, 0x3a, 0xdf, 0xca, 0x10
+        call _key_expansion_192a
+        # aeskeygenassist $0x20, %xmm2, %xmm1   # round 6
+        .byte 0x66, 0x0f, 0x3a, 0xdf, 0xca, 0x20
+        call _key_expansion_192b
+        # aeskeygenassist $0x40, %xmm2, %xmm1   # round 7
+        .byte 0x66, 0x0f, 0x3a, 0xdf, 0xca, 0x40
+        call _key_expansion_192a
+        # aeskeygenassist $0x80, %xmm2, %xmm1   # round 8
+        .byte 0x66, 0x0f, 0x3a, 0xdf, 0xca, 0x80
+        call _key_expansion_192b
+        jmp .Ldec_key
+.Lenc_key128:
+        # aeskeygenassist $0x1, %xmm0, %xmm1    # round 1
+        .byte 0x66, 0x0f, 0x3a, 0xdf, 0xc8, 0x01
+        call _key_expansion_128
+        # aeskeygenassist $0x2, %xmm0, %xmm1    # round 2
+        .byte 0x66, 0x0f, 0x3a, 0xdf, 0xc8, 0x02
+        call _key_expansion_128
+        # aeskeygenassist $0x4, %xmm0, %xmm1    # round 3
+        .byte 0x66, 0x0f, 0x3a, 0xdf, 0xc8, 0x04
+        call _key_expansion_128
+        # aeskeygenassist $0x8, %xmm0, %xmm1    # round 4
+        .byte 0x66, 0x0f, 0x3a, 0xdf, 0xc8, 0x08
+        call _key_expansion_128
+        # aeskeygenassist $0x10, %xmm0, %xmm1   # round 5
+        .byte 0x66, 0x0f, 0x3a, 0xdf, 0xc8, 0x10
+        call _key_expansion_128
+        # aeskeygenassist $0x20, %xmm0, %xmm1   # round 6
+        .byte 0x66, 0x0f, 0x3a, 0xdf, 0xc8, 0x20
+        call _key_expansion_128
+        # aeskeygenassist $0x40, %xmm0, %xmm1   # round 7
+        .byte 0x66, 0x0f, 0x3a, 0xdf, 0xc8, 0x40
+        call _key_expansion_128
+        # aeskeygenassist $0x80, %xmm0, %xmm1   # round 8
+        .byte 0x66, 0x0f, 0x3a, 0xdf, 0xc8, 0x80
+        call _key_expansion_128
+        # aeskeygenassist $0x1b, %xmm0, %xmm1   # round 9
+        .byte 0x66, 0x0f, 0x3a, 0xdf, 0xc8, 0x1b
+        call _key_expansion_128
+        # aeskeygenassist $0x36, %xmm0, %xmm1   # round 10
+        .byte 0x66, 0x0f, 0x3a, 0xdf, 0xc8, 0x36
+        call _key_expansion_128
+.Ldec_key:
+        sub $0x10, %rcx
+        movaps (%rdi), %xmm0
+        movaps (%rcx), %xmm1
+        movaps %xmm0, 240(%rcx)
+        movaps %xmm1, 240(%rdi)
+        add $0x10, %rdi
+        lea 240-16(%rcx), %rsi
+.align 4
+.Ldec_key_loop:
+        movaps (%rdi), %xmm0
+        # aesimc %xmm0, %xmm1
+        .byte 0x66, 0x0f, 0x38, 0xdb, 0xc8
+        movaps %xmm1, (%rsi)
+        add $0x10, %rdi
+        sub $0x10, %rsi
+        cmp %rcx, %rdi
+        jb .Ldec_key_loop
+        xor %rax, %rax
+        ret
+
+/*
+ * void aesni_enc(struct crypto_aes_ctx *ctx, u8 *dst, const u8 *src)
+ */
+ENTRY(aesni_enc)
+        movl 480(KEYP), KLEN            # key length
+        movups (INP), STATE             # input
+        call _aesni_enc1
+        movups STATE, (OUTP)            # output
+        ret
+
+/*
+ * _aesni_enc1:         internal ABI
+ * input:
+ *      KEYP:           key struct pointer
+ *      KLEN:           round count
+ *      STATE:          initial state (input)
+ * output:
+ *      STATE:          finial state (output)
+ * changed:
+ *      KEY
+ *      TKEYP (T1)
+ */
+_aesni_enc1:
+        movaps (KEYP), KEY              # key
+        mov KEYP, TKEYP
+        pxor KEY, STATE         # round 0
+        add $0x30, TKEYP
+        cmp $24, KLEN
+        jb .Lenc128
+        lea 0x20(TKEYP), TKEYP
+        je .Lenc192
+        add $0x20, TKEYP
+        movaps -0x60(TKEYP), KEY
+        # aesenc KEY, STATE
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xc2
+        movaps -0x50(TKEYP), KEY
+        # aesenc KEY, STATE
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xc2
+.align 4
+.Lenc192:
+        movaps -0x40(TKEYP), KEY
+        # aesenc KEY, STATE
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xc2
+        movaps -0x30(TKEYP), KEY
+        # aesenc KEY, STATE
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xc2
+.align 4
+.Lenc128:
+        movaps -0x20(TKEYP), KEY
+        # aesenc KEY, STATE
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xc2
+        movaps -0x10(TKEYP), KEY
+        # aesenc KEY, STATE
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xc2
+        movaps (TKEYP), KEY
+        # aesenc KEY, STATE
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xc2
+        movaps 0x10(TKEYP), KEY
+        # aesenc KEY, STATE
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xc2
+        movaps 0x20(TKEYP), KEY
+        # aesenc KEY, STATE
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xc2
+        movaps 0x30(TKEYP), KEY
+        # aesenc KEY, STATE
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xc2
+        movaps 0x40(TKEYP), KEY
+        # aesenc KEY, STATE
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xc2
+        movaps 0x50(TKEYP), KEY
+        # aesenc KEY, STATE
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xc2
+        movaps 0x60(TKEYP), KEY
+        # aesenc KEY, STATE
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xc2
+        movaps 0x70(TKEYP), KEY
+        # aesenclast KEY, STATE # last round
+        .byte 0x66, 0x0f, 0x38, 0xdd, 0xc2
+        ret
+
+/*
+ * _aesni_enc4: internal ABI
+ * input:
+ *      KEYP:           key struct pointer
+ *      KLEN:           round count
+ *      STATE1:         initial state (input)
+ *      STATE2
+ *      STATE3
+ *      STATE4
+ * output:
+ *      STATE1:         finial state (output)
+ *      STATE2
+ *      STATE3
+ *      STATE4
+ * changed:
+ *      KEY
+ *      TKEYP (T1)
+ */
+_aesni_enc4:
+        movaps (KEYP), KEY              # key
+        mov KEYP, TKEYP
+        pxor KEY, STATE1                # round 0
+        pxor KEY, STATE2
+        pxor KEY, STATE3
+        pxor KEY, STATE4
+        add $0x30, TKEYP
+        cmp $24, KLEN
+        jb .L4enc128
+        lea 0x20(TKEYP), TKEYP
+        je .L4enc192
+        add $0x20, TKEYP
+        movaps -0x60(TKEYP), KEY
+        # aesenc KEY, STATE1
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xc2
+        # aesenc KEY, STATE2
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xe2
+        # aesenc KEY, STATE3
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xea
+        # aesenc KEY, STATE4
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xf2
+        movaps -0x50(TKEYP), KEY
+        # aesenc KEY, STATE1
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xc2
+        # aesenc KEY, STATE2
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xe2
+        # aesenc KEY, STATE3
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xea
+        # aesenc KEY, STATE4
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xf2
+#.align 4
+.L4enc192:
+        movaps -0x40(TKEYP), KEY
+        # aesenc KEY, STATE1
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xc2
+        # aesenc KEY, STATE2
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xe2
+        # aesenc KEY, STATE3
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xea
+        # aesenc KEY, STATE4
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xf2
+        movaps -0x30(TKEYP), KEY
+        # aesenc KEY, STATE1
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xc2
+        # aesenc KEY, STATE2
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xe2
+        # aesenc KEY, STATE3
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xea
+        # aesenc KEY, STATE4
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xf2
+#.align 4
+.L4enc128:
+        movaps -0x20(TKEYP), KEY
+        # aesenc KEY, STATE1
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xc2
+        # aesenc KEY, STATE2
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xe2
+        # aesenc KEY, STATE3
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xea
+        # aesenc KEY, STATE4
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xf2
+        movaps -0x10(TKEYP), KEY
+        # aesenc KEY, STATE1
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xc2
+        # aesenc KEY, STATE2
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xe2
+        # aesenc KEY, STATE3
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xea
+        # aesenc KEY, STATE4
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xf2
+        movaps (TKEYP), KEY
+        # aesenc KEY, STATE1
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xc2
+        # aesenc KEY, STATE2
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xe2
+        # aesenc KEY, STATE3
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xea
+        # aesenc KEY, STATE4
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xf2
+        movaps 0x10(TKEYP), KEY
+        # aesenc KEY, STATE1
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xc2
+        # aesenc KEY, STATE2
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xe2
+        # aesenc KEY, STATE3
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xea
+        # aesenc KEY, STATE4
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xf2
+        movaps 0x20(TKEYP), KEY
+        # aesenc KEY, STATE1
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xc2
+        # aesenc KEY, STATE2
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xe2
+        # aesenc KEY, STATE3
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xea
+        # aesenc KEY, STATE4
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xf2
+        movaps 0x30(TKEYP), KEY
+        # aesenc KEY, STATE1
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xc2
+        # aesenc KEY, STATE2
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xe2
+        # aesenc KEY, STATE3
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xea
+        # aesenc KEY, STATE4
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xf2
+        movaps 0x40(TKEYP), KEY
+        # aesenc KEY, STATE1
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xc2
+        # aesenc KEY, STATE2
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xe2
+        # aesenc KEY, STATE3
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xea
+        # aesenc KEY, STATE4
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xf2
+        movaps 0x50(TKEYP), KEY
+        # aesenc KEY, STATE1
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xc2
+        # aesenc KEY, STATE2
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xe2
+        # aesenc KEY, STATE3
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xea
+        # aesenc KEY, STATE4
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xf2
+        movaps 0x60(TKEYP), KEY
+        # aesenc KEY, STATE1
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xc2
+        # aesenc KEY, STATE2
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xe2
+        # aesenc KEY, STATE3
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xea
+        # aesenc KEY, STATE4
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xf2
+        movaps 0x70(TKEYP), KEY
+        # aesenclast KEY, STATE1        # last round
+        .byte 0x66, 0x0f, 0x38, 0xdd, 0xc2
+        # aesenclast KEY, STATE2
+        .byte 0x66, 0x0f, 0x38, 0xdd, 0xe2
+        # aesenclast KEY, STATE3
+        .byte 0x66, 0x0f, 0x38, 0xdd, 0xea
+        # aesenclast KEY, STATE4
+        .byte 0x66, 0x0f, 0x38, 0xdd, 0xf2
+        ret
+
+/*
+ * void aesni_dec (struct crypto_aes_ctx *ctx, u8 *dst, const u8 *src)
+ */
+ENTRY(aesni_dec)
+        mov 480(KEYP), KLEN             # key length
+        add $240, KEYP
+        movups (INP), STATE             # input
+        call _aesni_dec1
+        movups STATE, (OUTP)            #output
+        ret
+
+/*
+ * _aesni_dec1:         internal ABI
+ * input:
+ *      KEYP:           key struct pointer
+ *      KLEN:           key length
+ *      STATE:          initial state (input)
+ * output:
+ *      STATE:          finial state (output)
+ * changed:
+ *      KEY
+ *      TKEYP (T1)
+ */
+_aesni_dec1:
+        movaps (KEYP), KEY              # key
+        mov KEYP, TKEYP
+        pxor KEY, STATE         # round 0
+        add $0x30, TKEYP
+        cmp $24, KLEN
+        jb .Ldec128
+        lea 0x20(TKEYP), TKEYP
+        je .Ldec192
+        add $0x20, TKEYP
+        movaps -0x60(TKEYP), KEY
+        # aesdec KEY, STATE
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
+        movaps -0x50(TKEYP), KEY
+        # aesdec KEY, STATE
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
+.align 4
+.Ldec192:
+        movaps -0x40(TKEYP), KEY
+        # aesdec KEY, STATE
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
+        movaps -0x30(TKEYP), KEY
+        # aesdec KEY, STATE
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
+.align 4
+.Ldec128:
+        movaps -0x20(TKEYP), KEY
+        # aesdec KEY, STATE
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
+        movaps -0x10(TKEYP), KEY
+        # aesdec KEY, STATE
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
+        movaps (TKEYP), KEY
+        # aesdec KEY, STATE
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
+        movaps 0x10(TKEYP), KEY
+        # aesdec KEY, STATE
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
+        movaps 0x20(TKEYP), KEY
+        # aesdec KEY, STATE
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
+        movaps 0x30(TKEYP), KEY
+        # aesdec KEY, STATE
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
+        movaps 0x40(TKEYP), KEY
+        # aesdec KEY, STATE
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
+        movaps 0x50(TKEYP), KEY
+        # aesdec KEY, STATE
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
+        movaps 0x60(TKEYP), KEY
+        # aesdec KEY, STATE
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
+        movaps 0x70(TKEYP), KEY
+        # aesdeclast KEY, STATE         # last round
+        .byte 0x66, 0x0f, 0x38, 0xdf, 0xc2
+        ret
+
+/*
+ * _aesni_dec4: internal ABI
+ * input:
+ *      KEYP:           key struct pointer
+ *      KLEN:           key length
+ *      STATE1:         initial state (input)
+ *      STATE2
+ *      STATE3
+ *      STATE4
+ * output:
+ *      STATE1:         finial state (output)
+ *      STATE2
+ *      STATE3
+ *      STATE4
+ * changed:
+ *      KEY
+ *      TKEYP (T1)
+ */
+_aesni_dec4:
+        movaps (KEYP), KEY              # key
+        mov KEYP, TKEYP
+        pxor KEY, STATE1                # round 0
+        pxor KEY, STATE2
+        pxor KEY, STATE3
+        pxor KEY, STATE4
+        add $0x30, TKEYP
+        cmp $24, KLEN
+        jb .L4dec128
+        lea 0x20(TKEYP), TKEYP
+        je .L4dec192
+        add $0x20, TKEYP
+        movaps -0x60(TKEYP), KEY
+        # aesdec KEY, STATE1
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
+        # aesdec KEY, STATE2
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xe2
+        # aesdec KEY, STATE3
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xea
+        # aesdec KEY, STATE4
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xf2
+        movaps -0x50(TKEYP), KEY
+        # aesdec KEY, STATE1
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
+        # aesdec KEY, STATE2
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xe2
+        # aesdec KEY, STATE3
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xea
+        # aesdec KEY, STATE4
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xf2
+.align 4
+.L4dec192:
+        movaps -0x40(TKEYP), KEY
+        # aesdec KEY, STATE1
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
+        # aesdec KEY, STATE2
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xe2
+        # aesdec KEY, STATE3
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xea
+        # aesdec KEY, STATE4
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xf2
+        movaps -0x30(TKEYP), KEY
+        # aesdec KEY, STATE1
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
+        # aesdec KEY, STATE2
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xe2
+        # aesdec KEY, STATE3
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xea
+        # aesdec KEY, STATE4
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xf2
+.align 4
+.L4dec128:
+        movaps -0x20(TKEYP), KEY
+        # aesdec KEY, STATE1
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
+        # aesdec KEY, STATE2
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xe2
+        # aesdec KEY, STATE3
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xea
+        # aesdec KEY, STATE4
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xf2
+        movaps -0x10(TKEYP), KEY
+        # aesdec KEY, STATE1
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
+        # aesdec KEY, STATE2
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xe2
+        # aesdec KEY, STATE3
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xea
+        # aesdec KEY, STATE4
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xf2
+        movaps (TKEYP), KEY
+        # aesdec KEY, STATE1
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
+        # aesdec KEY, STATE2
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xe2
+        # aesdec KEY, STATE3
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xea
+        # aesdec KEY, STATE4
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xf2
+        movaps 0x10(TKEYP), KEY
+        # aesdec KEY, STATE1
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
+        # aesdec KEY, STATE2
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xe2
+        # aesdec KEY, STATE3
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xea
+        # aesdec KEY, STATE4
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xf2
+        movaps 0x20(TKEYP), KEY
+        # aesdec KEY, STATE1
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
+        # aesdec KEY, STATE2
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xe2
+        # aesdec KEY, STATE3
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xea
+        # aesdec KEY, STATE4
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xf2
+        movaps 0x30(TKEYP), KEY
+        # aesdec KEY, STATE1
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
+        # aesdec KEY, STATE2
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xe2
+        # aesdec KEY, STATE3
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xea
+        # aesdec KEY, STATE4
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xf2
+        movaps 0x40(TKEYP), KEY
+        # aesdec KEY, STATE1
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
+        # aesdec KEY, STATE2
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xe2
+        # aesdec KEY, STATE3
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xea
+        # aesdec KEY, STATE4
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xf2
+        movaps 0x50(TKEYP), KEY
+        # aesdec KEY, STATE1
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
+        # aesdec KEY, STATE2
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xe2
+        # aesdec KEY, STATE3
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xea
+        # aesdec KEY, STATE4
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xf2
+        movaps 0x60(TKEYP), KEY
+        # aesdec KEY, STATE1
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
+        # aesdec KEY, STATE2
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xe2
+        # aesdec KEY, STATE3
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xea
+        # aesdec KEY, STATE4
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xf2
+        movaps 0x70(TKEYP), KEY
+        # aesdeclast KEY, STATE1        # last round
+        .byte 0x66, 0x0f, 0x38, 0xdf, 0xc2
+        # aesdeclast KEY, STATE2
+        .byte 0x66, 0x0f, 0x38, 0xdf, 0xe2
+        # aesdeclast KEY, STATE3
+        .byte 0x66, 0x0f, 0x38, 0xdf, 0xea
+        # aesdeclast KEY, STATE4
+        .byte 0x66, 0x0f, 0x38, 0xdf, 0xf2
+        ret
+
+/*
+ * void aesni_ecb_enc(struct crypto_aes_ctx *ctx, const u8 *dst, u8 *src,
+ *                    size_t len)
+ */
+ENTRY(aesni_ecb_enc)
+        test LEN, LEN           # check length
+        jz .Lecb_enc_ret
+        mov 480(KEYP), KLEN
+        cmp $16, LEN
+        jb .Lecb_enc_ret
+        cmp $64, LEN
+        jb .Lecb_enc_loop1
+.align 4
+.Lecb_enc_loop4:
+        movups (INP), STATE1
+        movups 0x10(INP), STATE2
+        movups 0x20(INP), STATE3
+        movups 0x30(INP), STATE4
+        call _aesni_enc4
+        movups STATE1, (OUTP)
+        movups STATE2, 0x10(OUTP)
+        movups STATE3, 0x20(OUTP)
+        movups STATE4, 0x30(OUTP)
+        sub $64, LEN
+        add $64, INP
+        add $64, OUTP
+        cmp $64, LEN
+        jge .Lecb_enc_loop4
+        cmp $16, LEN
+        jb .Lecb_enc_ret
+.align 4
+.Lecb_enc_loop1:
+        movups (INP), STATE1
+        call _aesni_enc1
+        movups STATE1, (OUTP)
+        sub $16, LEN
+        add $16, INP
+        add $16, OUTP
+        cmp $16, LEN
+        jge .Lecb_enc_loop1
+.Lecb_enc_ret:
+        ret
+
+/*
+ * void aesni_ecb_dec(struct crypto_aes_ctx *ctx, const u8 *dst, u8 *src,
+ *                    size_t len);
+ */
+ENTRY(aesni_ecb_dec)
+        test LEN, LEN
+        jz .Lecb_dec_ret
+        mov 480(KEYP), KLEN
+        add $240, KEYP
+        cmp $16, LEN
+        jb .Lecb_dec_ret
+        cmp $64, LEN
+        jb .Lecb_dec_loop1
+.align 4
+.Lecb_dec_loop4:
+        movups (INP), STATE1
+        movups 0x10(INP), STATE2
+        movups 0x20(INP), STATE3
+        movups 0x30(INP), STATE4
+        call _aesni_dec4
+        movups STATE1, (OUTP)
+        movups STATE2, 0x10(OUTP)
+        movups STATE3, 0x20(OUTP)
+        movups STATE4, 0x30(OUTP)
+        sub $64, LEN
+        add $64, INP
+        add $64, OUTP
+        cmp $64, LEN
+        jge .Lecb_dec_loop4
+        cmp $16, LEN
+        jb .Lecb_dec_ret
+.align 4
+.Lecb_dec_loop1:
+        movups (INP), STATE1
+        call _aesni_dec1
+        movups STATE1, (OUTP)
+        sub $16, LEN
+        add $16, INP
+        add $16, OUTP
+        cmp $16, LEN
+        jge .Lecb_dec_loop1
+.Lecb_dec_ret:
+        ret
+
+/*
+ * void aesni_cbc_enc(struct crypto_aes_ctx *ctx, const u8 *dst, u8 *src,
+ *                    size_t len, u8 *iv)
+ */
+ENTRY(aesni_cbc_enc)
+        cmp $16, LEN
+        jb .Lcbc_enc_ret
+        mov 480(KEYP), KLEN
+        movups (IVP), STATE     # load iv as initial state
+.align 4
+.Lcbc_enc_loop:
+        movups (INP), IN        # load input
+        pxor IN, STATE
+        call _aesni_enc1
+        movups STATE, (OUTP)    # store output
+        sub $16, LEN
+        add $16, INP
+        add $16, OUTP
+        cmp $16, LEN
+        jge .Lcbc_enc_loop
+        movups STATE, (IVP)
+.Lcbc_enc_ret:
+        ret
+
+/*
+ * void aesni_cbc_dec(struct crypto_aes_ctx *ctx, const u8 *dst, u8 *src,
+ *                    size_t len, u8 *iv)
+ */
+ENTRY(aesni_cbc_dec)
+        cmp $16, LEN
+        jb .Lcbc_dec_ret
+        mov 480(KEYP), KLEN
+        add $240, KEYP
+        movups (IVP), IV
+        cmp $64, LEN
+        jb .Lcbc_dec_loop1
+.align 4
+.Lcbc_dec_loop4:
+        movups (INP), IN1
+        movaps IN1, STATE1
+        movups 0x10(INP), IN2
+        movaps IN2, STATE2
+        movups 0x20(INP), IN3
+        movaps IN3, STATE3
+        movups 0x30(INP), IN4
+        movaps IN4, STATE4
+        call _aesni_dec4
+        pxor IV, STATE1
+        pxor IN1, STATE2
+        pxor IN2, STATE3
+        pxor IN3, STATE4
+        movaps IN4, IV
+        movups STATE1, (OUTP)
+        movups STATE2, 0x10(OUTP)
+        movups STATE3, 0x20(OUTP)
+        movups STATE4, 0x30(OUTP)
+        sub $64, LEN
+        add $64, INP
+        add $64, OUTP
+        cmp $64, LEN
+        jge .Lcbc_dec_loop4
+        cmp $16, LEN
+        jb .Lcbc_dec_ret
+.align 4
+.Lcbc_dec_loop1:
+        movups (INP), IN
+        movaps IN, STATE
+        call _aesni_dec1
+        pxor IV, STATE
+        movups STATE, (OUTP)
+        movaps IN, IV
+        sub $16, LEN
+        add $16, INP
+        add $16, OUTP
+        cmp $16, LEN
+        jge .Lcbc_dec_loop1
+        movups IV, (IVP)
+.Lcbc_dec_ret:
+        ret
diff --git a/arch/x86/crypto/aesni-intel_glue.c b/arch/x86/crypto/aesni-intel_glue.c
new file mode 100644
index 000000000000..02af0af65497
--- /dev/null
+++ b/arch/x86/crypto/aesni-intel_glue.c
@@ -0,0 +1,461 @@
+/*
+ * Support for Intel AES-NI instructions. This file contains glue
+ * code, the real AES implementation is in intel-aes_asm.S.
+ *
+ * Copyright (C) 2008, Intel Corp.
+ *    Author: Huang Ying <ying.huang@intel.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include <linux/hardirq.h>
+#include <linux/types.h>
+#include <linux/crypto.h>
+#include <linux/err.h>
+#include <crypto/algapi.h>
+#include <crypto/aes.h>
+#include <crypto/cryptd.h>
+#include <asm/i387.h>
+#include <asm/aes.h>
+
+struct async_aes_ctx {
+        struct cryptd_ablkcipher *cryptd_tfm;
+};
+
+#define AESNI_ALIGN     16
+#define AES_BLOCK_MASK  (~(AES_BLOCK_SIZE-1))
+
+asmlinkage int aesni_set_key(struct crypto_aes_ctx *ctx, const u8 *in_key,
+                             unsigned int key_len);
+asmlinkage void aesni_enc(struct crypto_aes_ctx *ctx, u8 *out,
+                          const u8 *in);
+asmlinkage void aesni_dec(struct crypto_aes_ctx *ctx, u8 *out,
+                          const u8 *in);
+asmlinkage void aesni_ecb_enc(struct crypto_aes_ctx *ctx, u8 *out,
+                              const u8 *in, unsigned int len);
+asmlinkage void aesni_ecb_dec(struct crypto_aes_ctx *ctx, u8 *out,
+                              const u8 *in, unsigned int len);
+asmlinkage void aesni_cbc_enc(struct crypto_aes_ctx *ctx, u8 *out,
+                              const u8 *in, unsigned int len, u8 *iv);
+asmlinkage void aesni_cbc_dec(struct crypto_aes_ctx *ctx, u8 *out,
+                              const u8 *in, unsigned int len, u8 *iv);
+
+static inline int kernel_fpu_using(void)
+{
+        if (in_interrupt() && !(read_cr0() & X86_CR0_TS))
+                return 1;
+        return 0;
+}
+
+static inline struct crypto_aes_ctx *aes_ctx(void *raw_ctx)
+{
+        unsigned long addr = (unsigned long)raw_ctx;
+        unsigned long align = AESNI_ALIGN;
+
+        if (align <= crypto_tfm_ctx_alignment())
+                align = 1;
+        return (struct crypto_aes_ctx *)ALIGN(addr, align);
+}
+
+static int aes_set_key_common(struct crypto_tfm *tfm, void *raw_ctx,
+                              const u8 *in_key, unsigned int key_len)
+{
+        struct crypto_aes_ctx *ctx = aes_ctx(raw_ctx);
+        u32 *flags = &tfm->crt_flags;
+        int err;
+
+        if (key_len != AES_KEYSIZE_128 && key_len != AES_KEYSIZE_192 &&
+            key_len != AES_KEYSIZE_256) {
+                *flags |= CRYPTO_TFM_RES_BAD_KEY_LEN;
+                return -EINVAL;
+        }
+
+        if (kernel_fpu_using())
+                err = crypto_aes_expand_key(ctx, in_key, key_len);
+        else {
+                kernel_fpu_begin();
+                err = aesni_set_key(ctx, in_key, key_len);
+                kernel_fpu_end();
+        }
+
+        return err;
+}
+
+static int aes_set_key(struct crypto_tfm *tfm, const u8 *in_key,
+                       unsigned int key_len)
+{
+        return aes_set_key_common(tfm, crypto_tfm_ctx(tfm), in_key, key_len);
+}
+
+static void aes_encrypt(struct crypto_tfm *tfm, u8 *dst, const u8 *src)
+{
+        struct crypto_aes_ctx *ctx = aes_ctx(crypto_tfm_ctx(tfm));
+
+        if (kernel_fpu_using())
+                crypto_aes_encrypt_x86(ctx, dst, src);
+        else {
+                kernel_fpu_begin();
+                aesni_enc(ctx, dst, src);
+                kernel_fpu_end();
+        }
+}
+
+static void aes_decrypt(struct crypto_tfm *tfm, u8 *dst, const u8 *src)
+{
+        struct crypto_aes_ctx *ctx = aes_ctx(crypto_tfm_ctx(tfm));
+
+        if (kernel_fpu_using())
+                crypto_aes_decrypt_x86(ctx, dst, src);
+        else {
+                kernel_fpu_begin();
+                aesni_dec(ctx, dst, src);
+                kernel_fpu_end();
+        }
+}
+
+static struct crypto_alg aesni_alg = {
+        .cra_name               = "aes",
+        .cra_driver_name        = "aes-aesni",
+        .cra_priority           = 300,
+        .cra_flags              = CRYPTO_ALG_TYPE_CIPHER,
+        .cra_blocksize          = AES_BLOCK_SIZE,
+        .cra_ctxsize            = sizeof(struct crypto_aes_ctx)+AESNI_ALIGN-1,
+        .cra_alignmask          = 0,
+        .cra_module             = THIS_MODULE,
+        .cra_list               = LIST_HEAD_INIT(aesni_alg.cra_list),
+        .cra_u  = {
+                .cipher = {
+                        .cia_min_keysize        = AES_MIN_KEY_SIZE,
+                        .cia_max_keysize        = AES_MAX_KEY_SIZE,
+                        .cia_setkey             = aes_set_key,
+                        .cia_encrypt            = aes_encrypt,
+                        .cia_decrypt            = aes_decrypt
+                }
+        }
+};
+
+static int ecb_encrypt(struct blkcipher_desc *desc,
+                       struct scatterlist *dst, struct scatterlist *src,
+                       unsigned int nbytes)
+{
+        struct crypto_aes_ctx *ctx = aes_ctx(crypto_blkcipher_ctx(desc->tfm));
+        struct blkcipher_walk walk;
+        int err;
+
+        blkcipher_walk_init(&walk, dst, src, nbytes);
+        err = blkcipher_walk_virt(desc, &walk);
+
+        kernel_fpu_begin();
+        while ((nbytes = walk.nbytes)) {
+                aesni_ecb_enc(ctx, walk.dst.virt.addr, walk.src.virt.addr,
+                              nbytes & AES_BLOCK_MASK);
+                nbytes &= AES_BLOCK_SIZE - 1;
+                err = blkcipher_walk_done(desc, &walk, nbytes);
+        }
+        kernel_fpu_end();
+
+        return err;
+}
+
+static int ecb_decrypt(struct blkcipher_desc *desc,
+                       struct scatterlist *dst, struct scatterlist *src,
+                       unsigned int nbytes)
+{
+        struct crypto_aes_ctx *ctx = aes_ctx(crypto_blkcipher_ctx(desc->tfm));
+        struct blkcipher_walk walk;
+        int err;
+
+        blkcipher_walk_init(&walk, dst, src, nbytes);
+        err = blkcipher_walk_virt(desc, &walk);
+
+        kernel_fpu_begin();
+        while ((nbytes = walk.nbytes)) {
+                aesni_ecb_dec(ctx, walk.dst.virt.addr, walk.src.virt.addr,
+                              nbytes & AES_BLOCK_MASK);
+                nbytes &= AES_BLOCK_SIZE - 1;
+                err = blkcipher_walk_done(desc, &walk, nbytes);
+        }
+        kernel_fpu_end();
+
+        return err;
+}
+
+static struct crypto_alg blk_ecb_alg = {
+        .cra_name               = "__ecb-aes-aesni",
+        .cra_driver_name        = "__driver-ecb-aes-aesni",
+        .cra_priority           = 0,
+        .cra_flags              = CRYPTO_ALG_TYPE_BLKCIPHER,
+        .cra_blocksize          = AES_BLOCK_SIZE,
+        .cra_ctxsize            = sizeof(struct crypto_aes_ctx)+AESNI_ALIGN-1,
+        .cra_alignmask          = 0,
+        .cra_type               = &crypto_blkcipher_type,
+        .cra_module             = THIS_MODULE,
+        .cra_list               = LIST_HEAD_INIT(blk_ecb_alg.cra_list),
+        .cra_u = {
+                .blkcipher = {
+                        .min_keysize    = AES_MIN_KEY_SIZE,
+                        .max_keysize    = AES_MAX_KEY_SIZE,
+                        .setkey         = aes_set_key,
+                        .encrypt        = ecb_encrypt,
+                        .decrypt        = ecb_decrypt,
+                },
+        },
+};
+
+static int cbc_encrypt(struct blkcipher_desc *desc,
+                       struct scatterlist *dst, struct scatterlist *src,
+                       unsigned int nbytes)
+{
+        struct crypto_aes_ctx *ctx = aes_ctx(crypto_blkcipher_ctx(desc->tfm));
+        struct blkcipher_walk walk;
+        int err;
+
+        blkcipher_walk_init(&walk, dst, src, nbytes);
+        err = blkcipher_walk_virt(desc, &walk);
+
+        kernel_fpu_begin();
+        while ((nbytes = walk.nbytes)) {
+                aesni_cbc_enc(ctx, walk.dst.virt.addr, walk.src.virt.addr,
+                              nbytes & AES_BLOCK_MASK, walk.iv);
+                nbytes &= AES_BLOCK_SIZE - 1;
+                err = blkcipher_walk_done(desc, &walk, nbytes);
+        }
+        kernel_fpu_end();
+
+        return err;
+}
+
+static int cbc_decrypt(struct blkcipher_desc *desc,
+                       struct scatterlist *dst, struct scatterlist *src,
+                       unsigned int nbytes)
+{
+        struct crypto_aes_ctx *ctx = aes_ctx(crypto_blkcipher_ctx(desc->tfm));
+        struct blkcipher_walk walk;
+        int err;
+
+        blkcipher_walk_init(&walk, dst, src, nbytes);
+        err = blkcipher_walk_virt(desc, &walk);
+
+        kernel_fpu_begin();
+        while ((nbytes = walk.nbytes)) {
+                aesni_cbc_dec(ctx, walk.dst.virt.addr, walk.src.virt.addr,
+                              nbytes & AES_BLOCK_MASK, walk.iv);
+                nbytes &= AES_BLOCK_SIZE - 1;
+                err = blkcipher_walk_done(desc, &walk, nbytes);
+        }
+        kernel_fpu_end();
+
+        return err;
+}
+
+static struct crypto_alg blk_cbc_alg = {
+        .cra_name               = "__cbc-aes-aesni",
+        .cra_driver_name        = "__driver-cbc-aes-aesni",
+        .cra_priority           = 0,
+        .cra_flags              = CRYPTO_ALG_TYPE_BLKCIPHER,
+        .cra_blocksize          = AES_BLOCK_SIZE,
+        .cra_ctxsize            = sizeof(struct crypto_aes_ctx)+AESNI_ALIGN-1,
+        .cra_alignmask          = 0,
+        .cra_type               = &crypto_blkcipher_type,
+        .cra_module             = THIS_MODULE,
+        .cra_list               = LIST_HEAD_INIT(blk_cbc_alg.cra_list),
+        .cra_u = {
+                .blkcipher = {
+                        .min_keysize    = AES_MIN_KEY_SIZE,
+                        .max_keysize    = AES_MAX_KEY_SIZE,
+                        .setkey         = aes_set_key,
+                        .encrypt        = cbc_encrypt,
+                        .decrypt        = cbc_decrypt,
+                },
+        },
+};
+
+static int ablk_set_key(struct crypto_ablkcipher *tfm, const u8 *key,
+                        unsigned int key_len)
+{
+        struct async_aes_ctx *ctx = crypto_ablkcipher_ctx(tfm);
+
+        return crypto_ablkcipher_setkey(&ctx->cryptd_tfm->base, key, key_len);
+}
+
+static int ablk_encrypt(struct ablkcipher_request *req)
+{
+        struct crypto_ablkcipher *tfm = crypto_ablkcipher_reqtfm(req);
+        struct async_aes_ctx *ctx = crypto_ablkcipher_ctx(tfm);
+
+        if (kernel_fpu_using()) {
+                struct ablkcipher_request *cryptd_req =
+                        ablkcipher_request_ctx(req);
+                memcpy(cryptd_req, req, sizeof(*req));
+                ablkcipher_request_set_tfm(cryptd_req, &ctx->cryptd_tfm->base);
+                return crypto_ablkcipher_encrypt(cryptd_req);
+        } else {
+                struct blkcipher_desc desc;
+                desc.tfm = cryptd_ablkcipher_child(ctx->cryptd_tfm);
+                desc.info = req->info;
+                desc.flags = 0;
+                return crypto_blkcipher_crt(desc.tfm)->encrypt(
+                        &desc, req->dst, req->src, req->nbytes);
+        }
+}
+
+static int ablk_decrypt(struct ablkcipher_request *req)
+{
+        struct crypto_ablkcipher *tfm = crypto_ablkcipher_reqtfm(req);
+        struct async_aes_ctx *ctx = crypto_ablkcipher_ctx(tfm);
+
+        if (kernel_fpu_using()) {
+                struct ablkcipher_request *cryptd_req =
+                        ablkcipher_request_ctx(req);
+                memcpy(cryptd_req, req, sizeof(*req));
+                ablkcipher_request_set_tfm(cryptd_req, &ctx->cryptd_tfm->base);
+                return crypto_ablkcipher_decrypt(cryptd_req);
+        } else {
+                struct blkcipher_desc desc;
+                desc.tfm = cryptd_ablkcipher_child(ctx->cryptd_tfm);
+                desc.info = req->info;
+                desc.flags = 0;
+                return crypto_blkcipher_crt(desc.tfm)->decrypt(
+                        &desc, req->dst, req->src, req->nbytes);
+        }
+}
+
+static void ablk_exit(struct crypto_tfm *tfm)
+{
+        struct async_aes_ctx *ctx = crypto_tfm_ctx(tfm);
+
+        cryptd_free_ablkcipher(ctx->cryptd_tfm);
+}
+
+static void ablk_init_common(struct crypto_tfm *tfm,
+                             struct cryptd_ablkcipher *cryptd_tfm)
+{
+        struct async_aes_ctx *ctx = crypto_tfm_ctx(tfm);
+
+        ctx->cryptd_tfm = cryptd_tfm;
+        tfm->crt_ablkcipher.reqsize = sizeof(struct ablkcipher_request) +
+                crypto_ablkcipher_reqsize(&cryptd_tfm->base);
+}
+
+static int ablk_ecb_init(struct crypto_tfm *tfm)
+{
+        struct cryptd_ablkcipher *cryptd_tfm;
+
+        cryptd_tfm = cryptd_alloc_ablkcipher("__driver-ecb-aes-aesni", 0, 0);
+        if (IS_ERR(cryptd_tfm))
+                return PTR_ERR(cryptd_tfm);
+        ablk_init_common(tfm, cryptd_tfm);
+        return 0;
+}
+
+static struct crypto_alg ablk_ecb_alg = {
+        .cra_name               = "ecb(aes)",
+        .cra_driver_name        = "ecb-aes-aesni",
+        .cra_priority           = 400,
+        .cra_flags              = CRYPTO_ALG_TYPE_ABLKCIPHER|CRYPTO_ALG_ASYNC,
+        .cra_blocksize          = AES_BLOCK_SIZE,
+        .cra_ctxsize            = sizeof(struct async_aes_ctx),
+        .cra_alignmask          = 0,
+        .cra_type               = &crypto_ablkcipher_type,
+        .cra_module             = THIS_MODULE,
+        .cra_list               = LIST_HEAD_INIT(ablk_ecb_alg.cra_list),
+        .cra_init               = ablk_ecb_init,
+        .cra_exit               = ablk_exit,
+        .cra_u = {
+                .ablkcipher = {
+                        .min_keysize    = AES_MIN_KEY_SIZE,
+                        .max_keysize    = AES_MAX_KEY_SIZE,
+                        .setkey         = ablk_set_key,
+                        .encrypt        = ablk_encrypt,
+                        .decrypt        = ablk_decrypt,
+                },
+        },
+};
+
+static int ablk_cbc_init(struct crypto_tfm *tfm)
+{
+        struct cryptd_ablkcipher *cryptd_tfm;
+
+        cryptd_tfm = cryptd_alloc_ablkcipher("__driver-cbc-aes-aesni", 0, 0);
+        if (IS_ERR(cryptd_tfm))
+                return PTR_ERR(cryptd_tfm);
+        ablk_init_common(tfm, cryptd_tfm);
+        return 0;
+}
+
+static struct crypto_alg ablk_cbc_alg = {
+        .cra_name               = "cbc(aes)",
+        .cra_driver_name        = "cbc-aes-aesni",
+        .cra_priority           = 400,
+        .cra_flags              = CRYPTO_ALG_TYPE_ABLKCIPHER|CRYPTO_ALG_ASYNC,
+        .cra_blocksize          = AES_BLOCK_SIZE,
+        .cra_ctxsize            = sizeof(struct async_aes_ctx),
+        .cra_alignmask          = 0,
+        .cra_type               = &crypto_ablkcipher_type,
+        .cra_module             = THIS_MODULE,
+        .cra_list               = LIST_HEAD_INIT(ablk_cbc_alg.cra_list),
+        .cra_init               = ablk_cbc_init,
+        .cra_exit               = ablk_exit,
+        .cra_u = {
+                .ablkcipher = {
+                        .min_keysize    = AES_MIN_KEY_SIZE,
+                        .max_keysize    = AES_MAX_KEY_SIZE,
+                        .ivsize         = AES_BLOCK_SIZE,
+                        .setkey         = ablk_set_key,
+                        .encrypt        = ablk_encrypt,
+                        .decrypt        = ablk_decrypt,
+                },
+        },
+};
+
+static int __init aesni_init(void)
+{
+        int err;
+
+        if (!cpu_has_aes) {
+                printk(KERN_ERR "Intel AES-NI instructions are not detected.\n");
+                return -ENODEV;
+        }
+        if ((err = crypto_register_alg(&aesni_alg)))
+                goto aes_err;
+        if ((err = crypto_register_alg(&blk_ecb_alg)))
+                goto blk_ecb_err;
+        if ((err = crypto_register_alg(&blk_cbc_alg)))
+                goto blk_cbc_err;
+        if ((err = crypto_register_alg(&ablk_ecb_alg)))
+                goto ablk_ecb_err;
+        if ((err = crypto_register_alg(&ablk_cbc_alg)))
+                goto ablk_cbc_err;
+
+        return err;
+
+ablk_cbc_err:
+        crypto_unregister_alg(&ablk_ecb_alg);
+ablk_ecb_err:
+        crypto_unregister_alg(&blk_cbc_alg);
+blk_cbc_err:
+        crypto_unregister_alg(&blk_ecb_alg);
+blk_ecb_err:
+        crypto_unregister_alg(&aesni_alg);
+aes_err:
+        return err;
+}
+
+static void __exit aesni_exit(void)
+{
+        crypto_unregister_alg(&ablk_cbc_alg);
+        crypto_unregister_alg(&ablk_ecb_alg);
+        crypto_unregister_alg(&blk_cbc_alg);
+        crypto_unregister_alg(&blk_ecb_alg);
+        crypto_unregister_alg(&aesni_alg);
+}
+
+module_init(aesni_init);
+module_exit(aesni_exit);
+
+MODULE_DESCRIPTION("Rijndael (AES) Cipher Algorithm, Intel AES-NI instructions optimized");
+MODULE_LICENSE("GPL");
+MODULE_ALIAS("aes");
diff --git a/arch/x86/ia32/ia32_signal.c b/arch/x86/ia32/ia32_signal.c
index 9dabd00e9805..588a7aa937e1 100644
--- a/arch/x86/ia32/ia32_signal.c
+++ b/arch/x86/ia32/ia32_signal.c
@@ -33,8 +33,6 @@
 #include <asm/sigframe.h>
 #include <asm/sys_ia32.h>
 
-#define DEBUG_SIG 0
-
 #define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))
 
 #define FIX_EFLAGS      (X86_EFLAGS_AC | X86_EFLAGS_OF | \
@@ -46,78 +44,83 @@ void signal_fault(struct pt_regs *regs, void __user *frame, char *where);
 
 int copy_siginfo_to_user32(compat_siginfo_t __user *to, siginfo_t *from)
 {
-        int err;
+        int err = 0;
 
         if (!access_ok(VERIFY_WRITE, to, sizeof(compat_siginfo_t)))
                 return -EFAULT;
 
-        /* If you change siginfo_t structure, please make sure that
-           this code is fixed accordingly.
-           It should never copy any pad contained in the structure
-           to avoid security leaks, but must copy the generic
-           3 ints plus the relevant union member.  */
-        err = __put_user(from->si_signo, &to->si_signo);
-        err |= __put_user(from->si_errno, &to->si_errno);
-        err |= __put_user((short)from->si_code, &to->si_code);
-
-        if (from->si_code < 0) {
-                err |= __put_user(from->si_pid, &to->si_pid);
-                err |= __put_user(from->si_uid, &to->si_uid);
-                err |= __put_user(ptr_to_compat(from->si_ptr), &to->si_ptr);
-        } else {
-                /*
-                 * First 32bits of unions are always present:
-                 * si_pid === si_band === si_tid === si_addr(LS half)
-                 */
-                err |= __put_user(from->_sifields._pad[0],
-                                  &to->_sifields._pad[0]);
-                switch (from->si_code >> 16) {
-                case __SI_FAULT >> 16:
-                        break;
-                case __SI_CHLD >> 16:
-                        err |= __put_user(from->si_utime, &to->si_utime);
-                        err |= __put_user(from->si_stime, &to->si_stime);
-                        err |= __put_user(from->si_status, &to->si_status);
-                        /* FALL THROUGH */
-                default:
-                case __SI_KILL >> 16:
-                        err |= __put_user(from->si_uid, &to->si_uid);
-                        break;
-                case __SI_POLL >> 16:
-                        err |= __put_user(from->si_fd, &to->si_fd);
-                        break;
-                case __SI_TIMER >> 16:
-                        err |= __put_user(from->si_overrun, &to->si_overrun);
-                        err |= __put_user(ptr_to_compat(from->si_ptr),
-                                          &to->si_ptr);
-                        break;
-                         /* This is not generated by the kernel as of now.  */
-                case __SI_RT >> 16:
-                case __SI_MESGQ >> 16:
-                        err |= __put_user(from->si_uid, &to->si_uid);
-                        err |= __put_user(from->si_int, &to->si_int);
-                        break;
+        put_user_try {
+                /* If you change siginfo_t structure, please make sure that
+                   this code is fixed accordingly.
+                   It should never copy any pad contained in the structure
+                   to avoid security leaks, but must copy the generic
+                   3 ints plus the relevant union member.  */
+                put_user_ex(from->si_signo, &to->si_signo);
+                put_user_ex(from->si_errno, &to->si_errno);
+                put_user_ex((short)from->si_code, &to->si_code);
+
+                if (from->si_code < 0) {
+                        put_user_ex(from->si_pid, &to->si_pid);
+                        put_user_ex(from->si_uid, &to->si_uid);
+                        put_user_ex(ptr_to_compat(from->si_ptr), &to->si_ptr);
+                } else {
+                        /*
+                         * First 32bits of unions are always present:
+                         * si_pid === si_band === si_tid === si_addr(LS half)
+                         */
+                        put_user_ex(from->_sifields._pad[0],
+                                          &to->_sifields._pad[0]);
+                        switch (from->si_code >> 16) {
+                        case __SI_FAULT >> 16:
+                                break;
+                        case __SI_CHLD >> 16:
+                                put_user_ex(from->si_utime, &to->si_utime);
+                                put_user_ex(from->si_stime, &to->si_stime);
+                                put_user_ex(from->si_status, &to->si_status);
+                                /* FALL THROUGH */
+                        default:
+                        case __SI_KILL >> 16:
+                                put_user_ex(from->si_uid, &to->si_uid);
+                                break;
+                        case __SI_POLL >> 16:
+                                put_user_ex(from->si_fd, &to->si_fd);
+                                break;
+                        case __SI_TIMER >> 16:
+                                put_user_ex(from->si_overrun, &to->si_overrun);
+                                put_user_ex(ptr_to_compat(from->si_ptr),
+                                            &to->si_ptr);
+                                break;
+                                 /* This is not generated by the kernel as of now.  */
+                        case __SI_RT >> 16:
+                        case __SI_MESGQ >> 16:
+                                put_user_ex(from->si_uid, &to->si_uid);
+                                put_user_ex(from->si_int, &to->si_int);
+                                break;
+                        }
                 }
-        }
+        } put_user_catch(err);
+
         return err;
 }
 
 int copy_siginfo_from_user32(siginfo_t *to, compat_siginfo_t __user *from)
 {
-        int err;
+        int err = 0;
         u32 ptr32;
 
         if (!access_ok(VERIFY_READ, from, sizeof(compat_siginfo_t)))
                 return -EFAULT;
 
-        err = __get_user(to->si_signo, &from->si_signo);
-        err |= __get_user(to->si_errno, &from->si_errno);
-        err |= __get_user(to->si_code, &from->si_code);
+        get_user_try {
+                get_user_ex(to->si_signo, &from->si_signo);
+                get_user_ex(to->si_errno, &from->si_errno);
+                get_user_ex(to->si_code, &from->si_code);
 
-        err |= __get_user(to->si_pid, &from->si_pid);
-        err |= __get_user(to->si_uid, &from->si_uid);
-        err |= __get_user(ptr32, &from->si_ptr);
-        to->si_ptr = compat_ptr(ptr32);
+                get_user_ex(to->si_pid, &from->si_pid);
+                get_user_ex(to->si_uid, &from->si_uid);
+                get_user_ex(ptr32, &from->si_ptr);
+                to->si_ptr = compat_ptr(ptr32);
+        } get_user_catch(err);
 
         return err;
 }
@@ -142,17 +145,23 @@ asmlinkage long sys32_sigaltstack(const stack_ia32_t __user *uss_ptr,
                                   struct pt_regs *regs)
 {
         stack_t uss, uoss;
-        int ret;
+        int ret, err = 0;
         mm_segment_t seg;
 
         if (uss_ptr) {
                 u32 ptr;
 
                 memset(&uss, 0, sizeof(stack_t));
-                if (!access_ok(VERIFY_READ, uss_ptr, sizeof(stack_ia32_t)) ||
-                            __get_user(ptr, &uss_ptr->ss_sp) ||
-                            __get_user(uss.ss_flags, &uss_ptr->ss_flags) ||
-                            __get_user(uss.ss_size, &uss_ptr->ss_size))
+                if (!access_ok(VERIFY_READ, uss_ptr, sizeof(stack_ia32_t)))
+                        return -EFAULT;
+
+                get_user_try {
+                        get_user_ex(ptr, &uss_ptr->ss_sp);
+                        get_user_ex(uss.ss_flags, &uss_ptr->ss_flags);
+                        get_user_ex(uss.ss_size, &uss_ptr->ss_size);
+                } get_user_catch(err);
+
+                if (err)
                         return -EFAULT;
                 uss.ss_sp = compat_ptr(ptr);
         }
@@ -161,10 +170,16 @@ asmlinkage long sys32_sigaltstack(const stack_ia32_t __user *uss_ptr,
         ret = do_sigaltstack(uss_ptr ? &uss : NULL, &uoss, regs->sp);
         set_fs(seg);
         if (ret >= 0 && uoss_ptr)  {
-                if (!access_ok(VERIFY_WRITE, uoss_ptr, sizeof(stack_ia32_t)) ||
-                    __put_user(ptr_to_compat(uoss.ss_sp), &uoss_ptr->ss_sp) ||
-                    __put_user(uoss.ss_flags, &uoss_ptr->ss_flags) ||
-                    __put_user(uoss.ss_size, &uoss_ptr->ss_size))
+                if (!access_ok(VERIFY_WRITE, uoss_ptr, sizeof(stack_ia32_t)))
+                        return -EFAULT;
+
+                put_user_try {
+                        put_user_ex(ptr_to_compat(uoss.ss_sp), &uoss_ptr->ss_sp);
+                        put_user_ex(uoss.ss_flags, &uoss_ptr->ss_flags);
+                        put_user_ex(uoss.ss_size, &uoss_ptr->ss_size);
+                } put_user_catch(err);
+
+                if (err)
                         ret = -EFAULT;
         }
         return ret;
@@ -173,75 +188,78 @@ asmlinkage long sys32_sigaltstack(const stack_ia32_t __user *uss_ptr,
 /*
  * Do a signal return; undo the signal stack.
  */
+#define loadsegment_gs(v)       load_gs_index(v)
+#define loadsegment_fs(v)       loadsegment(fs, v)
+#define loadsegment_ds(v)       loadsegment(ds, v)
+#define loadsegment_es(v)       loadsegment(es, v)
+
+#define get_user_seg(seg)       ({ unsigned int v; savesegment(seg, v); v; })
+#define set_user_seg(seg, v)    loadsegment_##seg(v)
+
 #define COPY(x)                 {               \
-        err |= __get_user(regs->x, &sc->x);     \
+        get_user_ex(regs->x, &sc->x);           \
 }
 
-#define COPY_SEG_CPL3(seg)      {                       \
-                unsigned short tmp;                     \
-                err |= __get_user(tmp, &sc->seg);       \
-                regs->seg = tmp | 3;                    \
-}
+#define GET_SEG(seg)            ({                      \
+        unsigned short tmp;                             \
+        get_user_ex(tmp, &sc->seg);                     \
+        tmp;                                            \
+})
+
+#define COPY_SEG_CPL3(seg)      do {                    \
+        regs->seg = GET_SEG(seg) | 3;                   \
+} while (0)
 
 #define RELOAD_SEG(seg)         {               \
-        unsigned int cur, pre;                  \
-        err |= __get_user(pre, &sc->seg);       \
-        savesegment(seg, cur);                  \
+        unsigned int pre = GET_SEG(seg);        \
+        unsigned int cur = get_user_seg(seg);   \
         pre |= 3;                               \
         if (pre != cur)                         \
-                loadsegment(seg, pre);          \
+                set_user_seg(seg, pre);         \
 }
 
 static int ia32_restore_sigcontext(struct pt_regs *regs,
                                    struct sigcontext_ia32 __user *sc,
                                    unsigned int *pax)
 {
-        unsigned int tmpflags, gs, oldgs, err = 0;
+        unsigned int tmpflags, err = 0;
         void __user *buf;
         u32 tmp;
 
         /* Always make any pending restarted system calls return -EINTR */
         current_thread_info()->restart_block.fn = do_no_restart_syscall;
 
-#if DEBUG_SIG
-        printk(KERN_DEBUG "SIG restore_sigcontext: "
-               "sc=%p err(%x) eip(%x) cs(%x) flg(%x)\n",
-               sc, sc->err, sc->ip, sc->cs, sc->flags);
-#endif
-
-        /*
-         * Reload fs and gs if they have changed in the signal
-         * handler.  This does not handle long fs/gs base changes in
-         * the handler, but does not clobber them at least in the
-         * normal case.
-         */
-        err |= __get_user(gs, &sc->gs);
-        gs |= 3;
-        savesegment(gs, oldgs);
-        if (gs != oldgs)
-                load_gs_index(gs);
-
-        RELOAD_SEG(fs);
-        RELOAD_SEG(ds);
-        RELOAD_SEG(es);
-
-        COPY(di); COPY(si); COPY(bp); COPY(sp); COPY(bx);
-        COPY(dx); COPY(cx); COPY(ip);
-        /* Don't touch extended registers */
-
-        COPY_SEG_CPL3(cs);
-        COPY_SEG_CPL3(ss);
-
-        err |= __get_user(tmpflags, &sc->flags);
-        regs->flags = (regs->flags & ~FIX_EFLAGS) | (tmpflags & FIX_EFLAGS);
-        /* disable syscall checks */
-        regs->orig_ax = -1;
-
-        err |= __get_user(tmp, &sc->fpstate);
-        buf = compat_ptr(tmp);
-        err |= restore_i387_xstate_ia32(buf);
-
-        err |= __get_user(*pax, &sc->ax);
+        get_user_try {
+                /*
+                 * Reload fs and gs if they have changed in the signal
+                 * handler.  This does not handle long fs/gs base changes in
+                 * the handler, but does not clobber them at least in the
+                 * normal case.
+                 */
+                RELOAD_SEG(gs);
+                RELOAD_SEG(fs);
+                RELOAD_SEG(ds);
+                RELOAD_SEG(es);
+
+                COPY(di); COPY(si); COPY(bp); COPY(sp); COPY(bx);
+                COPY(dx); COPY(cx); COPY(ip);
+                /* Don't touch extended registers */
+
+                COPY_SEG_CPL3(cs);
+                COPY_SEG_CPL3(ss);
+
+                get_user_ex(tmpflags, &sc->flags);
+                regs->flags = (regs->flags & ~FIX_EFLAGS) | (tmpflags & FIX_EFLAGS);
+                /* disable syscall checks */
+                regs->orig_ax = -1;
+
+                get_user_ex(tmp, &sc->fpstate);
+                buf = compat_ptr(tmp);
+                err |= restore_i387_xstate_ia32(buf);
+
+                get_user_ex(*pax, &sc->ax);
+        } get_user_catch(err);
+
         return err;
 }
 
@@ -317,38 +335,36 @@ static int ia32_setup_sigcontext(struct sigcontext_ia32 __user *sc,
                                  void __user *fpstate,
                                  struct pt_regs *regs, unsigned int mask)
 {
-        int tmp, err = 0;
-
-        savesegment(gs, tmp);
-        err |= __put_user(tmp, (unsigned int __user *)&sc->gs);
-        savesegment(fs, tmp);
-        err |= __put_user(tmp, (unsigned int __user *)&sc->fs);
-        savesegment(ds, tmp);
-        err |= __put_user(tmp, (unsigned int __user *)&sc->ds);
-        savesegment(es, tmp);
-        err |= __put_user(tmp, (unsigned int __user *)&sc->es);
-
-        err |= __put_user(regs->di, &sc->di);
-        err |= __put_user(regs->si, &sc->si);
-        err |= __put_user(regs->bp, &sc->bp);
-        err |= __put_user(regs->sp, &sc->sp);
-        err |= __put_user(regs->bx, &sc->bx);
-        err |= __put_user(regs->dx, &sc->dx);
-        err |= __put_user(regs->cx, &sc->cx);
-        err |= __put_user(regs->ax, &sc->ax);
-        err |= __put_user(current->thread.trap_no, &sc->trapno);
-        err |= __put_user(current->thread.error_code, &sc->err);
-        err |= __put_user(regs->ip, &sc->ip);
-        err |= __put_user(regs->cs, (unsigned int __user *)&sc->cs);
-        err |= __put_user(regs->flags, &sc->flags);
-        err |= __put_user(regs->sp, &sc->sp_at_signal);
-        err |= __put_user(regs->ss, (unsigned int __user *)&sc->ss);
-
-        err |= __put_user(ptr_to_compat(fpstate), &sc->fpstate);
-
-        /* non-iBCS2 extensions.. */
-        err |= __put_user(mask, &sc->oldmask);
-        err |= __put_user(current->thread.cr2, &sc->cr2);
+        int err = 0;
+
+        put_user_try {
+                put_user_ex(get_user_seg(gs), (unsigned int __user *)&sc->gs);
+                put_user_ex(get_user_seg(fs), (unsigned int __user *)&sc->fs);
+                put_user_ex(get_user_seg(ds), (unsigned int __user *)&sc->ds);
+                put_user_ex(get_user_seg(es), (unsigned int __user *)&sc->es);
+
+                put_user_ex(regs->di, &sc->di);
+                put_user_ex(regs->si, &sc->si);
+                put_user_ex(regs->bp, &sc->bp);
+                put_user_ex(regs->sp, &sc->sp);
+                put_user_ex(regs->bx, &sc->bx);
+                put_user_ex(regs->dx, &sc->dx);
+                put_user_ex(regs->cx, &sc->cx);
+                put_user_ex(regs->ax, &sc->ax);
+                put_user_ex(current->thread.trap_no, &sc->trapno);
+                put_user_ex(current->thread.error_code, &sc->err);
+                put_user_ex(regs->ip, &sc->ip);
+                put_user_ex(regs->cs, (unsigned int __user *)&sc->cs);
+                put_user_ex(regs->flags, &sc->flags);
+                put_user_ex(regs->sp, &sc->sp_at_signal);
+                put_user_ex(regs->ss, (unsigned int __user *)&sc->ss);
+
+                put_user_ex(ptr_to_compat(fpstate), &sc->fpstate);
+
+                /* non-iBCS2 extensions.. */
+                put_user_ex(mask, &sc->oldmask);
+                put_user_ex(current->thread.cr2, &sc->cr2);
+        } put_user_catch(err);
 
         return err;
 }
@@ -437,13 +453,17 @@ int ia32_setup_frame(int sig, struct k_sigaction *ka,
                 else
                         restorer = &frame->retcode;
         }
-        err |= __put_user(ptr_to_compat(restorer), &frame->pretcode);
 
-        /*
-         * These are actually not used anymore, but left because some
-         * gdb versions depend on them as a marker.
-         */
-        err |= __put_user(*((u64 *)&code), (u64 *)frame->retcode);
+        put_user_try {
+                put_user_ex(ptr_to_compat(restorer), &frame->pretcode);
+
+                /*
+                 * These are actually not used anymore, but left because some
+                 * gdb versions depend on them as a marker.
+                 */
+                put_user_ex(*((u64 *)&code), (u64 *)frame->retcode);
+        } put_user_catch(err);
+
         if (err)
                 return -EFAULT;
 
@@ -462,11 +482,6 @@ int ia32_setup_frame(int sig, struct k_sigaction *ka,
         regs->cs = __USER32_CS;
         regs->ss = __USER32_DS;
 
-#if DEBUG_SIG
-        printk(KERN_DEBUG "SIG deliver (%s:%d): sp=%p pc=%lx ra=%u\n",
-               current->comm, current->pid, frame, regs->ip, frame->pretcode);
-#endif
-
         return 0;
 }
 
@@ -496,41 +511,40 @@ int ia32_setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
         if (!access_ok(VERIFY_WRITE, frame, sizeof(*frame)))
                 return -EFAULT;
 
-        err |= __put_user(sig, &frame->sig);
-        err |= __put_user(ptr_to_compat(&frame->info), &frame->pinfo);
-        err |= __put_user(ptr_to_compat(&frame->uc), &frame->puc);
-        err |= copy_siginfo_to_user32(&frame->info, info);
-        if (err)
-                return -EFAULT;
+        put_user_try {
+                put_user_ex(sig, &frame->sig);
+                put_user_ex(ptr_to_compat(&frame->info), &frame->pinfo);
+                put_user_ex(ptr_to_compat(&frame->uc), &frame->puc);
+                err |= copy_siginfo_to_user32(&frame->info, info);
 
-        /* Create the ucontext.  */
-        if (cpu_has_xsave)
-                err |= __put_user(UC_FP_XSTATE, &frame->uc.uc_flags);
-        else
-                err |= __put_user(0, &frame->uc.uc_flags);
-        err |= __put_user(0, &frame->uc.uc_link);
-        err |= __put_user(current->sas_ss_sp, &frame->uc.uc_stack.ss_sp);
-        err |= __put_user(sas_ss_flags(regs->sp),
-                          &frame->uc.uc_stack.ss_flags);
-        err |= __put_user(current->sas_ss_size, &frame->uc.uc_stack.ss_size);
-        err |= ia32_setup_sigcontext(&frame->uc.uc_mcontext, fpstate,
-                                     regs, set->sig[0]);
-        err |= __copy_to_user(&frame->uc.uc_sigmask, set, sizeof(*set));
-        if (err)
-                return -EFAULT;
+                /* Create the ucontext.  */
+                if (cpu_has_xsave)
+                        put_user_ex(UC_FP_XSTATE, &frame->uc.uc_flags);
+                else
+                        put_user_ex(0, &frame->uc.uc_flags);
+                put_user_ex(0, &frame->uc.uc_link);
+                put_user_ex(current->sas_ss_sp, &frame->uc.uc_stack.ss_sp);
+                put_user_ex(sas_ss_flags(regs->sp),
+                            &frame->uc.uc_stack.ss_flags);
+                put_user_ex(current->sas_ss_size, &frame->uc.uc_stack.ss_size);
+                err |= ia32_setup_sigcontext(&frame->uc.uc_mcontext, fpstate,
+                                             regs, set->sig[0]);
+                err |= __copy_to_user(&frame->uc.uc_sigmask, set, sizeof(*set));
+
+                if (ka->sa.sa_flags & SA_RESTORER)
+                        restorer = ka->sa.sa_restorer;
+                else
+                        restorer = VDSO32_SYMBOL(current->mm->context.vdso,
+                                                 rt_sigreturn);
+                put_user_ex(ptr_to_compat(restorer), &frame->pretcode);
+
+                /*
+                 * Not actually used anymore, but left because some gdb
+                 * versions need it.
+                 */
+                put_user_ex(*((u64 *)&code), (u64 *)frame->retcode);
+        } put_user_catch(err);
 
-        if (ka->sa.sa_flags & SA_RESTORER)
-                restorer = ka->sa.sa_restorer;
-        else
-                restorer = VDSO32_SYMBOL(current->mm->context.vdso,
-                                         rt_sigreturn);
-        err |= __put_user(ptr_to_compat(restorer), &frame->pretcode);
-
-        /*
-         * Not actually used anymore, but left because some gdb
-         * versions need it.
-         */
-        err |= __put_user(*((u64 *)&code), (u64 *)frame->retcode);
         if (err)
                 return -EFAULT;
 
@@ -549,10 +563,5 @@ int ia32_setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
         regs->cs = __USER32_CS;
         regs->ss = __USER32_DS;
 
-#if DEBUG_SIG
-        printk(KERN_DEBUG "SIG deliver (%s:%d): sp=%p pc=%lx ra=%u\n",
-               current->comm, current->pid, frame, regs->ip, frame->pretcode);
-#endif
-
         return 0;
 }
diff --git a/arch/x86/ia32/ia32entry.S b/arch/x86/ia32/ia32entry.S
index 5a0d76dc56a4..db0c803170ab 100644
--- a/arch/x86/ia32/ia32entry.S
+++ b/arch/x86/ia32/ia32entry.S
@@ -112,8 +112,8 @@ ENTRY(ia32_sysenter_target)
         CFI_DEF_CFA     rsp,0
         CFI_REGISTER    rsp,rbp
         SWAPGS_UNSAFE_STACK
-        movq    %gs:pda_kernelstack, %rsp
-        addq    $(PDA_STACKOFFSET),%rsp 
+        movq    PER_CPU_VAR(kernel_stack), %rsp
+        addq    $(KERNEL_STACK_OFFSET),%rsp
         /*
          * No need to follow this irqs on/off section: the syscall
          * disabled irqs, here we enable it straight after entry:
@@ -273,13 +273,13 @@ ENDPROC(ia32_sysenter_target)
 ENTRY(ia32_cstar_target)
         CFI_STARTPROC32 simple
         CFI_SIGNAL_FRAME
-        CFI_DEF_CFA     rsp,PDA_STACKOFFSET
+        CFI_DEF_CFA     rsp,KERNEL_STACK_OFFSET
         CFI_REGISTER    rip,rcx
         /*CFI_REGISTER  rflags,r11*/
         SWAPGS_UNSAFE_STACK
         movl    %esp,%r8d
         CFI_REGISTER    rsp,r8
-        movq    %gs:pda_kernelstack,%rsp
+        movq    PER_CPU_VAR(kernel_stack),%rsp
         /*
          * No need to follow this irqs on/off section: the syscall
          * disabled irqs and here we enable it straight after entry:
@@ -557,7 +557,7 @@ ia32_sys_call_table:
         .quad sys32_olduname
         .quad sys_umask         /* 60 */
         .quad sys_chroot
-        .quad sys32_ustat
+        .quad compat_sys_ustat
         .quad sys_dup2
         .quad sys_getppid
         .quad sys_getpgrp               /* 65 */
diff --git a/arch/x86/ia32/sys_ia32.c b/arch/x86/ia32/sys_ia32.c
index 6c0d7f6231af..efac92fd1efb 100644
--- a/arch/x86/ia32/sys_ia32.c
+++ b/arch/x86/ia32/sys_ia32.c
@@ -638,28 +638,6 @@ long sys32_uname(struct old_utsname __user *name)
         return err ? -EFAULT : 0;
 }
 
-long sys32_ustat(unsigned dev, struct ustat32 __user *u32p)
-{
-        struct ustat u;
-        mm_segment_t seg;
-        int ret;
-
-        seg = get_fs();
-        set_fs(KERNEL_DS);
-        ret = sys_ustat(dev, (struct ustat __user *)&u);
-        set_fs(seg);
-        if (ret < 0)
-                return ret;
-
-        if (!access_ok(VERIFY_WRITE, u32p, sizeof(struct ustat32)) ||
-            __put_user((__u32) u.f_tfree, &u32p->f_tfree) ||
-            __put_user((__u32) u.f_tinode, &u32p->f_tfree) ||
-            __copy_to_user(&u32p->f_fname, u.f_fname, sizeof(u.f_fname)) ||
-            __copy_to_user(&u32p->f_fpack, u.f_fpack, sizeof(u.f_fpack)))
-                ret = -EFAULT;
-        return ret;
-}
-
 asmlinkage long sys32_execve(char __user *name, compat_uptr_t __user *argv,
                              compat_uptr_t __user *envp, struct pt_regs *regs)
 {
diff --git a/arch/x86/include/asm/a.out-core.h b/arch/x86/include/asm/a.out-core.h
index 3c601f8224be..bb70e397aa84 100644
--- a/arch/x86/include/asm/a.out-core.h
+++ b/arch/x86/include/asm/a.out-core.h
@@ -55,7 +55,7 @@ static inline void aout_dump_thread(struct pt_regs *regs, struct user *dump)
         dump->regs.ds = (u16)regs->ds;
         dump->regs.es = (u16)regs->es;
         dump->regs.fs = (u16)regs->fs;
-        savesegment(gs, dump->regs.gs);
+        dump->regs.gs = get_user_gs(regs);
         dump->regs.orig_ax = regs->orig_ax;
         dump->regs.ip = regs->ip;
         dump->regs.cs = (u16)regs->cs;
diff --git a/arch/x86/include/asm/acpi.h b/arch/x86/include/asm/acpi.h
index 9830681446ad..4518dc500903 100644
--- a/arch/x86/include/asm/acpi.h
+++ b/arch/x86/include/asm/acpi.h
@@ -102,9 +102,6 @@ static inline void disable_acpi(void)
         acpi_noirq = 1;
 }
 
-/* Fixmap pages to reserve for ACPI boot-time tables (see fixmap.h) */
-#define FIX_ACPI_PAGES 4
-
 extern int acpi_gsi_to_irq(u32 gsi, unsigned int *irq);
 
 static inline void acpi_noirq_set(void) { acpi_noirq = 1; }
diff --git a/arch/x86/include/asm/aes.h b/arch/x86/include/asm/aes.h
new file mode 100644
index 000000000000..80545a1cbe39
--- /dev/null
+++ b/arch/x86/include/asm/aes.h
@@ -0,0 +1,11 @@
+#ifndef ASM_X86_AES_H
+#define ASM_X86_AES_H
+
+#include <linux/crypto.h>
+#include <crypto/aes.h>
+
+void crypto_aes_encrypt_x86(struct crypto_aes_ctx *ctx, u8 *dst,
+                            const u8 *src);
+void crypto_aes_decrypt_x86(struct crypto_aes_ctx *ctx, u8 *dst,
+                            const u8 *src);
+#endif
diff --git a/arch/x86/include/asm/apic.h b/arch/x86/include/asm/apic.h
index ab1d51a8855e..4ef949c1972e 100644
--- a/arch/x86/include/asm/apic.h
+++ b/arch/x86/include/asm/apic.h
@@ -1,15 +1,18 @@
 #ifndef _ASM_X86_APIC_H
 #define _ASM_X86_APIC_H
 
-#include <linux/pm.h>
+#include <linux/cpumask.h>
 #include <linux/delay.h>
+#include <linux/pm.h>
 
 #include <asm/alternative.h>
-#include <asm/fixmap.h>
-#include <asm/apicdef.h>
+#include <asm/cpufeature.h>
 #include <asm/processor.h>
+#include <asm/apicdef.h>
+#include <asm/atomic.h>
+#include <asm/fixmap.h>
+#include <asm/mpspec.h>
 #include <asm/system.h>
-#include <asm/cpufeature.h>
 #include <asm/msr.h>
 
 #define ARCH_APICTIMER_STOPS_ON_C3      1
@@ -33,7 +36,13 @@
         } while (0)
 
 
+#if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_32)
 extern void generic_apic_probe(void);
+#else
+static inline void generic_apic_probe(void)
+{
+}
+#endif
 
 #ifdef CONFIG_X86_LOCAL_APIC
 
@@ -41,6 +50,21 @@ extern unsigned int apic_verbosity;
 extern int local_apic_timer_c2_ok;
 
 extern int disable_apic;
+
+#ifdef CONFIG_SMP
+extern void __inquire_remote_apic(int apicid);
+#else /* CONFIG_SMP */
+static inline void __inquire_remote_apic(int apicid)
+{
+}
+#endif /* CONFIG_SMP */
+
+static inline void default_inquire_remote_apic(int apicid)
+{
+        if (apic_verbosity >= APIC_DEBUG)
+                __inquire_remote_apic(apicid);
+}
+
 /*
  * Basic functions accessing APICs.
  */
@@ -51,7 +75,14 @@ extern int disable_apic;
 #define setup_secondary_clock setup_secondary_APIC_clock
 #endif
 
+#ifdef CONFIG_X86_VSMP
 extern int is_vsmp_box(void);
+#else
+static inline int is_vsmp_box(void)
+{
+        return 0;
+}
+#endif
 extern void xapic_wait_icr_idle(void);
 extern u32 safe_xapic_wait_icr_idle(void);
 extern void xapic_icr_write(u32, u32);
@@ -71,6 +102,12 @@ static inline u32 native_apic_mem_read(u32 reg)
         return *((volatile u32 *)(APIC_BASE + reg));
 }
 
+extern void native_apic_wait_icr_idle(void);
+extern u32 native_safe_apic_wait_icr_idle(void);
+extern void native_apic_icr_write(u32 low, u32 id);
+extern u64 native_apic_icr_read(void);
+
+#ifdef CONFIG_X86_X2APIC
 static inline void native_apic_msr_write(u32 reg, u32 v)
 {
         if (reg == APIC_DFR || reg == APIC_ID || reg == APIC_LDR ||
@@ -91,8 +128,32 @@ static inline u32 native_apic_msr_read(u32 reg)
         return low;
 }
 
-#ifndef CONFIG_X86_32
-extern int x2apic;
+static inline void native_x2apic_wait_icr_idle(void)
+{
+        /* no need to wait for icr idle in x2apic */
+        return;
+}
+
+static inline u32 native_safe_x2apic_wait_icr_idle(void)
+{
+        /* no need to wait for icr idle in x2apic */
+        return 0;
+}
+
+static inline void native_x2apic_icr_write(u32 low, u32 id)
+{
+        wrmsrl(APIC_BASE_MSR + (APIC_ICR >> 4), ((__u64) id) << 32 | low);
+}
+
+static inline u64 native_x2apic_icr_read(void)
+{
+        unsigned long val;
+
+        rdmsrl(APIC_BASE_MSR + (APIC_ICR >> 4), val);
+        return val;
+}
+
+extern int x2apic, x2apic_phys;
 extern void check_x2apic(void);
 extern void enable_x2apic(void);
 extern void enable_IR_x2apic(void);
@@ -110,30 +171,24 @@ static inline int x2apic_enabled(void)
         return 0;
 }
 #else
-#define x2apic_enabled()        0
+static inline void check_x2apic(void)
+{
+}
+static inline void enable_x2apic(void)
+{
+}
+static inline void enable_IR_x2apic(void)
+{
+}
+static inline int x2apic_enabled(void)
+{
+        return 0;
+}
 #endif
 
-struct apic_ops {
-        u32 (*read)(u32 reg);
-        void (*write)(u32 reg, u32 v);
-        u64 (*icr_read)(void);
-        void (*icr_write)(u32 low, u32 high);
-        void (*wait_icr_idle)(void);
-        u32 (*safe_wait_icr_idle)(void);
-};
-
-extern struct apic_ops *apic_ops;
-
-#define apic_read (apic_ops->read)
-#define apic_write (apic_ops->write)
-#define apic_icr_read (apic_ops->icr_read)
-#define apic_icr_write (apic_ops->icr_write)
-#define apic_wait_icr_idle (apic_ops->wait_icr_idle)
-#define safe_apic_wait_icr_idle (apic_ops->safe_wait_icr_idle)
-
 extern int get_physical_broadcast(void);
 
-#ifdef CONFIG_X86_64
+#ifdef CONFIG_X86_X2APIC
 static inline void ack_x2APIC_irq(void)
 {
         /* Docs say use 0 for future compatibility */
@@ -141,18 +196,6 @@ static inline void ack_x2APIC_irq(void)
 }
 #endif
 
-
-static inline void ack_APIC_irq(void)
-{
-        /*
-         * ack_APIC_irq() actually gets compiled as a single instruction
-         * ... yummie.
-         */
-
-        /* Docs say use 0 for future compatibility */
-        apic_write(APIC_EOI, 0);
-}
-
 extern int lapic_get_maxlvt(void);
 extern void clear_local_APIC(void);
 extern void connect_bsp_APIC(void);
@@ -196,4 +239,327 @@ static inline void disable_local_APIC(void) { }
 
 #endif /* !CONFIG_X86_LOCAL_APIC */
 
+#ifdef CONFIG_X86_64
+#define SET_APIC_ID(x)          (apic->set_apic_id(x))
+#else
+
+#endif
+
+/*
+ * Copyright 2004 James Cleverdon, IBM.
+ * Subject to the GNU Public License, v.2
+ *
+ * Generic APIC sub-arch data struct.
+ *
+ * Hacked for x86-64 by James Cleverdon from i386 architecture code by
+ * Martin Bligh, Andi Kleen, James Bottomley, John Stultz, and
+ * James Cleverdon.
+ */
+struct apic {
+        char *name;
+
+        int (*probe)(void);
+        int (*acpi_madt_oem_check)(char *oem_id, char *oem_table_id);
+        int (*apic_id_registered)(void);
+
+        u32 irq_delivery_mode;
+        u32 irq_dest_mode;
+
+        const struct cpumask *(*target_cpus)(void);
+
+        int disable_esr;
+
+        int dest_logical;
+        unsigned long (*check_apicid_used)(physid_mask_t bitmap, int apicid);
+        unsigned long (*check_apicid_present)(int apicid);
+
+        void (*vector_allocation_domain)(int cpu, struct cpumask *retmask);
+        void (*init_apic_ldr)(void);
+
+        physid_mask_t (*ioapic_phys_id_map)(physid_mask_t map);
+
+        void (*setup_apic_routing)(void);
+        int (*multi_timer_check)(int apic, int irq);
+        int (*apicid_to_node)(int logical_apicid);
+        int (*cpu_to_logical_apicid)(int cpu);
+        int (*cpu_present_to_apicid)(int mps_cpu);
+        physid_mask_t (*apicid_to_cpu_present)(int phys_apicid);
+        void (*setup_portio_remap)(void);
+        int (*check_phys_apicid_present)(int boot_cpu_physical_apicid);
+        void (*enable_apic_mode)(void);
+        int (*phys_pkg_id)(int cpuid_apic, int index_msb);
+
+        /*
+         * When one of the next two hooks returns 1 the apic
+         * is switched to this. Essentially they are additional
+         * probe functions:
+         */
+        int (*mps_oem_check)(struct mpc_table *mpc, char *oem, char *productid);
+
+        unsigned int (*get_apic_id)(unsigned long x);
+        unsigned long (*set_apic_id)(unsigned int id);
+        unsigned long apic_id_mask;
+
+        unsigned int (*cpu_mask_to_apicid)(const struct cpumask *cpumask);
+        unsigned int (*cpu_mask_to_apicid_and)(const struct cpumask *cpumask,
+                                               const struct cpumask *andmask);
+
+        /* ipi */
+        void (*send_IPI_mask)(const struct cpumask *mask, int vector);
+        void (*send_IPI_mask_allbutself)(const struct cpumask *mask,
+                                         int vector);
+        void (*send_IPI_allbutself)(int vector);
+        void (*send_IPI_all)(int vector);
+        void (*send_IPI_self)(int vector);
+
+        /* wakeup_secondary_cpu */
+        int (*wakeup_secondary_cpu)(int apicid, unsigned long start_eip);
+
+        int trampoline_phys_low;
+        int trampoline_phys_high;
+
+        void (*wait_for_init_deassert)(atomic_t *deassert);
+        void (*smp_callin_clear_local_apic)(void);
+        void (*inquire_remote_apic)(int apicid);
+
+        /* apic ops */
+        u32 (*read)(u32 reg);
+        void (*write)(u32 reg, u32 v);
+        u64 (*icr_read)(void);
+        void (*icr_write)(u32 low, u32 high);
+        void (*wait_icr_idle)(void);
+        u32 (*safe_wait_icr_idle)(void);
+};
+
+/*
+ * Pointer to the local APIC driver in use on this system (there's
+ * always just one such driver in use - the kernel decides via an
+ * early probing process which one it picks - and then sticks to it):
+ */
+extern struct apic *apic;
+
+/*
+ * APIC functionality to boot other CPUs - only used on SMP:
+ */
+#ifdef CONFIG_SMP
+extern atomic_t init_deasserted;
+extern int wakeup_secondary_cpu_via_nmi(int apicid, unsigned long start_eip);
+#endif
+
+static inline u32 apic_read(u32 reg)
+{
+        return apic->read(reg);
+}
+
+static inline void apic_write(u32 reg, u32 val)
+{
+        apic->write(reg, val);
+}
+
+static inline u64 apic_icr_read(void)
+{
+        return apic->icr_read();
+}
+
+static inline void apic_icr_write(u32 low, u32 high)
+{
+        apic->icr_write(low, high);
+}
+
+static inline void apic_wait_icr_idle(void)
+{
+        apic->wait_icr_idle();
+}
+
+static inline u32 safe_apic_wait_icr_idle(void)
+{
+        return apic->safe_wait_icr_idle();
+}
+
+
+static inline void ack_APIC_irq(void)
+{
+        /*
+         * ack_APIC_irq() actually gets compiled as a single instruction
+         * ... yummie.
+         */
+
+        /* Docs say use 0 for future compatibility */
+        apic_write(APIC_EOI, 0);
+}
+
+static inline unsigned default_get_apic_id(unsigned long x)
+{
+        unsigned int ver = GET_APIC_VERSION(apic_read(APIC_LVR));
+
+        if (APIC_XAPIC(ver))
+                return (x >> 24) & 0xFF;
+        else
+                return (x >> 24) & 0x0F;
+}
+
+/*
+ * Warm reset vector default position:
+ */
+#define DEFAULT_TRAMPOLINE_PHYS_LOW             0x467
+#define DEFAULT_TRAMPOLINE_PHYS_HIGH            0x469
+
+#ifdef CONFIG_X86_64
+extern struct apic apic_flat;
+extern struct apic apic_physflat;
+extern struct apic apic_x2apic_cluster;
+extern struct apic apic_x2apic_phys;
+extern int default_acpi_madt_oem_check(char *, char *);
+
+extern void apic_send_IPI_self(int vector);
+
+extern struct apic apic_x2apic_uv_x;
+DECLARE_PER_CPU(int, x2apic_extra_bits);
+
+extern int default_cpu_present_to_apicid(int mps_cpu);
+extern int default_check_phys_apicid_present(int boot_cpu_physical_apicid);
+#endif
+
+static inline void default_wait_for_init_deassert(atomic_t *deassert)
+{
+        while (!atomic_read(deassert))
+                cpu_relax();
+        return;
+}
+
+extern void generic_bigsmp_probe(void);
+
+
+#ifdef CONFIG_X86_LOCAL_APIC
+
+#include <asm/smp.h>
+
+#define APIC_DFR_VALUE  (APIC_DFR_FLAT)
+
+static inline const struct cpumask *default_target_cpus(void)
+{
+#ifdef CONFIG_SMP
+        return cpu_online_mask;
+#else
+        return cpumask_of(0);
+#endif
+}
+
+DECLARE_EARLY_PER_CPU(u16, x86_bios_cpu_apicid);
+
+
+static inline unsigned int read_apic_id(void)
+{
+        unsigned int reg;
+
+        reg = apic_read(APIC_ID);
+
+        return apic->get_apic_id(reg);
+}
+
+extern void default_setup_apic_routing(void);
+
+#ifdef CONFIG_X86_32
+/*
+ * Set up the logical destination ID.
+ *
+ * Intel recommends to set DFR, LDR and TPR before enabling
+ * an APIC.  See e.g. "AP-388 82489DX User's Manual" (Intel
+ * document number 292116).  So here it goes...
+ */
+extern void default_init_apic_ldr(void);
+
+static inline int default_apic_id_registered(void)
+{
+        return physid_isset(read_apic_id(), phys_cpu_present_map);
+}
+
+static inline unsigned int
+default_cpu_mask_to_apicid(const struct cpumask *cpumask)
+{
+        return cpumask_bits(cpumask)[0];
+}
+
+static inline unsigned int
+default_cpu_mask_to_apicid_and(const struct cpumask *cpumask,
+                               const struct cpumask *andmask)
+{
+        unsigned long mask1 = cpumask_bits(cpumask)[0];
+        unsigned long mask2 = cpumask_bits(andmask)[0];
+        unsigned long mask3 = cpumask_bits(cpu_online_mask)[0];
+
+        return (unsigned int)(mask1 & mask2 & mask3);
+}
+
+static inline int default_phys_pkg_id(int cpuid_apic, int index_msb)
+{
+        return cpuid_apic >> index_msb;
+}
+
+extern int default_apicid_to_node(int logical_apicid);
+
+#endif
+
+static inline unsigned long default_check_apicid_used(physid_mask_t bitmap, int apicid)
+{
+        return physid_isset(apicid, bitmap);
+}
+
+static inline unsigned long default_check_apicid_present(int bit)
+{
+        return physid_isset(bit, phys_cpu_present_map);
+}
+
+static inline physid_mask_t default_ioapic_phys_id_map(physid_mask_t phys_map)
+{
+        return phys_map;
+}
+
+/* Mapping from cpu number to logical apicid */
+static inline int default_cpu_to_logical_apicid(int cpu)
+{
+        return 1 << cpu;
+}
+
+static inline int __default_cpu_present_to_apicid(int mps_cpu)
+{
+        if (mps_cpu < nr_cpu_ids && cpu_present(mps_cpu))
+                return (int)per_cpu(x86_bios_cpu_apicid, mps_cpu);
+        else
+                return BAD_APICID;
+}
+
+static inline int
+__default_check_phys_apicid_present(int boot_cpu_physical_apicid)
+{
+        return physid_isset(boot_cpu_physical_apicid, phys_cpu_present_map);
+}
+
+#ifdef CONFIG_X86_32
+static inline int default_cpu_present_to_apicid(int mps_cpu)
+{
+        return __default_cpu_present_to_apicid(mps_cpu);
+}
+
+static inline int
+default_check_phys_apicid_present(int boot_cpu_physical_apicid)
+{
+        return __default_check_phys_apicid_present(boot_cpu_physical_apicid);
+}
+#else
+extern int default_cpu_present_to_apicid(int mps_cpu);
+extern int default_check_phys_apicid_present(int boot_cpu_physical_apicid);
+#endif
+
+static inline physid_mask_t default_apicid_to_cpu_present(int phys_apicid)
+{
+        return physid_mask_of_physid(phys_apicid);
+}
+
+#endif /* CONFIG_X86_LOCAL_APIC */
+
+#ifdef CONFIG_X86_32
+extern u8 cpu_2_logical_apicid[NR_CPUS];
+#endif
+
 #endif /* _ASM_X86_APIC_H */
diff --git a/arch/x86/include/asm/apicnum.h b/arch/x86/include/asm/apicnum.h
new file mode 100644
index 000000000000..82f613c607ce
--- /dev/null
+++ b/arch/x86/include/asm/apicnum.h
@@ -0,0 +1,12 @@
+#ifndef _ASM_X86_APICNUM_H
+#define _ASM_X86_APICNUM_H
+
+/* define MAX_IO_APICS */
+#ifdef CONFIG_X86_32
+# define MAX_IO_APICS 64
+#else
+# define MAX_IO_APICS 128
+# define MAX_LOCAL_APIC 32768
+#endif
+
+#endif /* _ASM_X86_APICNUM_H */
diff --git a/arch/x86/include/asm/mach-default/apm.h b/arch/x86/include/asm/apm.h
index 20370c6db74b..20370c6db74b 100644
--- a/arch/x86/include/asm/mach-default/apm.h
+++ b/arch/x86/include/asm/apm.h
diff --git a/arch/x86/include/asm/arch_hooks.h b/arch/x86/include/asm/arch_hooks.h
deleted file mode 100644
index cbd4957838a6..000000000000
--- a/arch/x86/include/asm/arch_hooks.h
+++ /dev/null
@@ -1,26 +0,0 @@
-#ifndef _ASM_X86_ARCH_HOOKS_H
-#define _ASM_X86_ARCH_HOOKS_H
-
-#include <linux/interrupt.h>
-
-/*
- *      linux/include/asm/arch_hooks.h
- *
- *      define the architecture specific hooks
- */
-
-/* these aren't arch hooks, they are generic routines
- * that can be used by the hooks */
-extern void init_ISA_irqs(void);
-extern irqreturn_t timer_interrupt(int irq, void *dev_id);
-
-/* these are the defined hooks */
-extern void intr_init_hook(void);
-extern void pre_intr_init_hook(void);
-extern void pre_setup_arch_hook(void);
-extern void trap_init_hook(void);
-extern void pre_time_init_hook(void);
-extern void time_init_hook(void);
-extern void mca_nmi_hook(void);
-
-#endif /* _ASM_X86_ARCH_HOOKS_H */
diff --git a/arch/x86/include/asm/bigsmp/apic.h b/arch/x86/include/asm/bigsmp/apic.h
deleted file mode 100644
index d8dd9f537911..000000000000
--- a/arch/x86/include/asm/bigsmp/apic.h
+++ /dev/null
@@ -1,155 +0,0 @@
-#ifndef __ASM_MACH_APIC_H
-#define __ASM_MACH_APIC_H
-
-#define xapic_phys_to_log_apicid(cpu) (per_cpu(x86_bios_cpu_apicid, cpu))
-#define esr_disable (1)
-
-static inline int apic_id_registered(void)
-{
-        return (1);
-}
-
-static inline const cpumask_t *target_cpus(void)
-{
-#ifdef CONFIG_SMP
-        return &cpu_online_map;
-#else
-        return &cpumask_of_cpu(0);
-#endif
-}
-
-#undef APIC_DEST_LOGICAL
-#define APIC_DEST_LOGICAL       0
-#define APIC_DFR_VALUE          (APIC_DFR_FLAT)
-#define INT_DELIVERY_MODE       (dest_Fixed)
-#define INT_DEST_MODE           (0)    /* phys delivery to target proc */
-#define NO_BALANCE_IRQ          (0)
-
-static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid)
-{
-        return (0);
-}
-
-static inline unsigned long check_apicid_present(int bit)
-{
-        return (1);
-}
-
-static inline unsigned long calculate_ldr(int cpu)
-{
-        unsigned long val, id;
-        val = apic_read(APIC_LDR) & ~APIC_LDR_MASK;
-        id = xapic_phys_to_log_apicid(cpu);
-        val |= SET_APIC_LOGICAL_ID(id);
-        return val;
-}
-
-/*
- * Set up the logical destination ID.
- *
- * Intel recommends to set DFR, LDR and TPR before enabling
- * an APIC.  See e.g. "AP-388 82489DX User's Manual" (Intel
- * document number 292116).  So here it goes...
- */
-static inline void init_apic_ldr(void)
-{
-        unsigned long val;
-        int cpu = smp_processor_id();
-
-        apic_write(APIC_DFR, APIC_DFR_VALUE);
-        val = calculate_ldr(cpu);
-        apic_write(APIC_LDR, val);
-}
-
-static inline void setup_apic_routing(void)
-{
-        printk("Enabling APIC mode:  %s.  Using %d I/O APICs\n",
-                "Physflat", nr_ioapics);
-}
-
-static inline int multi_timer_check(int apic, int irq)
-{
-        return (0);
-}
-
-static inline int apicid_to_node(int logical_apicid)
-{
-        return apicid_2_node[hard_smp_processor_id()];
-}
-
-static inline int cpu_present_to_apicid(int mps_cpu)
-{
-        if (mps_cpu < nr_cpu_ids)
-                return (int) per_cpu(x86_bios_cpu_apicid, mps_cpu);
-
-        return BAD_APICID;
-}
-
-static inline physid_mask_t apicid_to_cpu_present(int phys_apicid)
-{
-        return physid_mask_of_physid(phys_apicid);
-}
-
-extern u8 cpu_2_logical_apicid[];
-/* Mapping from cpu number to logical apicid */
-static inline int cpu_to_logical_apicid(int cpu)
-{
-        if (cpu >= nr_cpu_ids)
-                return BAD_APICID;
-        return cpu_physical_id(cpu);
-}
-
-static inline physid_mask_t ioapic_phys_id_map(physid_mask_t phys_map)
-{
-        /* For clustered we don't have a good way to do this yet - hack */
-        return physids_promote(0xFFL);
-}
-
-static inline void setup_portio_remap(void)
-{
-}
-
-static inline void enable_apic_mode(void)
-{
-}
-
-static inline int check_phys_apicid_present(int boot_cpu_physical_apicid)
-{
-        return (1);
-}
-
-/* As we are using single CPU as destination, pick only one CPU here */
-static inline unsigned int cpu_mask_to_apicid(const cpumask_t *cpumask)
-{
-        int cpu;
-        int apicid;     
-
-        cpu = first_cpu(*cpumask);
-        apicid = cpu_to_logical_apicid(cpu);
-        return apicid;
-}
-
-static inline unsigned int cpu_mask_to_apicid_and(const struct cpumask *cpumask,
-                                                  const struct cpumask *andmask)
-{
-        int cpu;
-
-        /*
-         * We're using fixed IRQ delivery, can only return one phys APIC ID.
-         * May as well be the first.
-         */
-        for_each_cpu_and(cpu, cpumask, andmask)
-                if (cpumask_test_cpu(cpu, cpu_online_mask))
-                        break;
-        if (cpu < nr_cpu_ids)
-                return cpu_to_logical_apicid(cpu);
-
-        return BAD_APICID;
-}
-
-static inline u32 phys_pkg_id(u32 cpuid_apic, int index_msb)
-{
-        return cpuid_apic >> index_msb;
-}
-
-#endif /* __ASM_MACH_APIC_H */
diff --git a/arch/x86/include/asm/bigsmp/apicdef.h b/arch/x86/include/asm/bigsmp/apicdef.h
deleted file mode 100644
index 392c3f5ef2fe..000000000000
--- a/arch/x86/include/asm/bigsmp/apicdef.h
+++ /dev/null
@@ -1,13 +0,0 @@
-#ifndef __ASM_MACH_APICDEF_H
-#define __ASM_MACH_APICDEF_H
-
-#define         APIC_ID_MASK            (0xFF<<24)
-
-static inline unsigned get_apic_id(unsigned long x)
-{
-        return (((x)>>24)&0xFF);
-}
-
-#define         GET_APIC_ID(x)  get_apic_id(x)
-
-#endif
diff --git a/arch/x86/include/asm/bigsmp/ipi.h b/arch/x86/include/asm/bigsmp/ipi.h
deleted file mode 100644
index 27fcd01b3ae6..000000000000
--- a/arch/x86/include/asm/bigsmp/ipi.h
+++ /dev/null
@@ -1,22 +0,0 @@
-#ifndef __ASM_MACH_IPI_H
-#define __ASM_MACH_IPI_H
-
-void send_IPI_mask_sequence(const struct cpumask *mask, int vector);
-void send_IPI_mask_allbutself(const struct cpumask *mask, int vector);
-
-static inline void send_IPI_mask(const struct cpumask *mask, int vector)
-{
-        send_IPI_mask_sequence(mask, vector);
-}
-
-static inline void send_IPI_allbutself(int vector)
-{
-        send_IPI_mask_allbutself(cpu_online_mask, vector);
-}
-
-static inline void send_IPI_all(int vector)
-{
-        send_IPI_mask(cpu_online_mask, vector);
-}
-
-#endif /* __ASM_MACH_IPI_H */
diff --git a/arch/x86/include/asm/boot.h b/arch/x86/include/asm/boot.h
index dd61616cb73d..6526cf08b0e4 100644
--- a/arch/x86/include/asm/boot.h
+++ b/arch/x86/include/asm/boot.h
@@ -10,17 +10,31 @@
 #define EXTENDED_VGA    0xfffe          /* 80x50 mode */
 #define ASK_VGA         0xfffd          /* ask for it at bootup */
 
+#ifdef __KERNEL__
+
 /* Physical address where kernel should be loaded. */
 #define LOAD_PHYSICAL_ADDR ((CONFIG_PHYSICAL_START \
                                 + (CONFIG_PHYSICAL_ALIGN - 1)) \
                                 & ~(CONFIG_PHYSICAL_ALIGN - 1))
 
+#ifdef CONFIG_KERNEL_BZIP2
+#define BOOT_HEAP_SIZE             0x400000
+#else /* !CONFIG_KERNEL_BZIP2 */
+
 #ifdef CONFIG_X86_64
 #define BOOT_HEAP_SIZE  0x7000
-#define BOOT_STACK_SIZE 0x4000
 #else
 #define BOOT_HEAP_SIZE  0x4000
+#endif
+
+#endif /* !CONFIG_KERNEL_BZIP2 */
+
+#ifdef CONFIG_X86_64
+#define BOOT_STACK_SIZE 0x4000
+#else
 #define BOOT_STACK_SIZE 0x1000
 #endif
 
+#endif /* __KERNEL__ */
+
 #endif /* _ASM_X86_BOOT_H */
diff --git a/arch/x86/include/asm/cacheflush.h b/arch/x86/include/asm/cacheflush.h
index 2f8466540fb5..5b301b7ff5f4 100644
--- a/arch/x86/include/asm/cacheflush.h
+++ b/arch/x86/include/asm/cacheflush.h
@@ -5,24 +5,43 @@
 #include <linux/mm.h>
 
 /* Caches aren't brain-dead on the intel. */
-#define flush_cache_all()                       do { } while (0)
-#define flush_cache_mm(mm)                      do { } while (0)
-#define flush_cache_dup_mm(mm)                  do { } while (0)
-#define flush_cache_range(vma, start, end)      do { } while (0)
-#define flush_cache_page(vma, vmaddr, pfn)      do { } while (0)
-#define flush_dcache_page(page)                 do { } while (0)
-#define flush_dcache_mmap_lock(mapping)         do { } while (0)
-#define flush_dcache_mmap_unlock(mapping)       do { } while (0)
-#define flush_icache_range(start, end)          do { } while (0)
-#define flush_icache_page(vma, pg)              do { } while (0)
-#define flush_icache_user_range(vma, pg, adr, len)      do { } while (0)
-#define flush_cache_vmap(start, end)            do { } while (0)
-#define flush_cache_vunmap(start, end)          do { } while (0)
+static inline void flush_cache_all(void) { }
+static inline void flush_cache_mm(struct mm_struct *mm) { }
+static inline void flush_cache_dup_mm(struct mm_struct *mm) { }
+static inline void flush_cache_range(struct vm_area_struct *vma,
+                                     unsigned long start, unsigned long end) { }
+static inline void flush_cache_page(struct vm_area_struct *vma,
+                                    unsigned long vmaddr, unsigned long pfn) { }
+static inline void flush_dcache_page(struct page *page) { }
+static inline void flush_dcache_mmap_lock(struct address_space *mapping) { }
+static inline void flush_dcache_mmap_unlock(struct address_space *mapping) { }
+static inline void flush_icache_range(unsigned long start,
+                                      unsigned long end) { }
+static inline void flush_icache_page(struct vm_area_struct *vma,
+                                     struct page *page) { }
+static inline void flush_icache_user_range(struct vm_area_struct *vma,
+                                           struct page *page,
+                                           unsigned long addr,
+                                           unsigned long len) { }
+static inline void flush_cache_vmap(unsigned long start, unsigned long end) { }
+static inline void flush_cache_vunmap(unsigned long start,
+                                      unsigned long end) { }
 
-#define copy_to_user_page(vma, page, vaddr, dst, src, len)      \
-        memcpy((dst), (src), (len))
-#define copy_from_user_page(vma, page, vaddr, dst, src, len)    \
-        memcpy((dst), (src), (len))
+static inline void copy_to_user_page(struct vm_area_struct *vma,
+                                     struct page *page, unsigned long vaddr,
+                                     void *dst, const void *src,
+                                     unsigned long len)
+{
+        memcpy(dst, src, len);
+}
+
+static inline void copy_from_user_page(struct vm_area_struct *vma,
+                                       struct page *page, unsigned long vaddr,
+                                       void *dst, const void *src,
+                                       unsigned long len)
+{
+        memcpy(dst, src, len);
+}
 
 #define PG_non_WB                               PG_arch_1
 PAGEFLAG(NonWB, non_WB)
diff --git a/arch/x86/include/asm/calling.h b/arch/x86/include/asm/calling.h
index 2bc162e0ec6e..0e63c9a2a8d0 100644
--- a/arch/x86/include/asm/calling.h
+++ b/arch/x86/include/asm/calling.h
@@ -1,5 +1,55 @@
 /*
- * Some macros to handle stack frames in assembly.
+
+ x86 function call convention, 64-bit:
+ -------------------------------------
+  arguments           |  callee-saved      | extra caller-saved | return
+ [callee-clobbered]   |                    | [callee-clobbered] |
+ ---------------------------------------------------------------------------
+ rdi rsi rdx rcx r8-9 | rbx rbp [*] r12-15 | r10-11             | rax, rdx [**]
+
+ ( rsp is obviously invariant across normal function calls. (gcc can 'merge'
+   functions when it sees tail-call optimization possibilities) rflags is
+   clobbered. Leftover arguments are passed over the stack frame.)
+
+ [*]  In the frame-pointers case rbp is fixed to the stack frame.
+
+ [**] for struct return values wider than 64 bits the return convention is a
+      bit more complex: up to 128 bits width we return small structures
+      straight in rax, rdx. For structures larger than that (3 words or
+      larger) the caller puts a pointer to an on-stack return struct
+      [allocated in the caller's stack frame] into the first argument - i.e.
+      into rdi. All other arguments shift up by one in this case.
+      Fortunately this case is rare in the kernel.
+
+For 32-bit we have the following conventions - kernel is built with
+-mregparm=3 and -freg-struct-return:
+
+ x86 function calling convention, 32-bit:
+ ----------------------------------------
+  arguments         | callee-saved        | extra caller-saved | return
+ [callee-clobbered] |                     | [callee-clobbered] |
+ -------------------------------------------------------------------------
+ eax edx ecx        | ebx edi esi ebp [*] | <none>             | eax, edx [**]
+
+ ( here too esp is obviously invariant across normal function calls. eflags
+   is clobbered. Leftover arguments are passed over the stack frame. )
+
+ [*]  In the frame-pointers case ebp is fixed to the stack frame.
+
+ [**] We build with -freg-struct-return, which on 32-bit means similar
+      semantics as on 64-bit: edx can be used for a second return value
+      (i.e. covering integer and structure sizes up to 64 bits) - after that
+      it gets more complex and more expensive: 3-word or larger struct returns
+      get done in the caller's frame and the pointer to the return struct goes
+      into regparm0, i.e. eax - the other arguments shift up and the
+      function's register parameters degenerate to regparm=2 in essence.
+
+*/
+
+
+/*
+ * 64-bit system call stack frame layout defines and helpers,
+ * for assembly code:
  */
 
 #define R15               0
@@ -9,7 +59,7 @@
 #define RBP              32
 #define RBX              40
 
-/* arguments: interrupts/non tracing syscalls only save upto here*/
+/* arguments: interrupts/non tracing syscalls only save up to here: */
 #define R11              48
 #define R10              56
 #define R9               64
@@ -22,7 +72,7 @@
 #define ORIG_RAX        120       /* + error_code */
 /* end of arguments */
 
-/* cpu exception frame or undefined in case of fast syscall. */
+/* cpu exception frame or undefined in case of fast syscall: */
 #define RIP             128
 #define CS              136
 #define EFLAGS          144
diff --git a/arch/x86/include/asm/cpu.h b/arch/x86/include/asm/cpu.h
index bae482df6039..b185091bf19c 100644
--- a/arch/x86/include/asm/cpu.h
+++ b/arch/x86/include/asm/cpu.h
@@ -7,6 +7,20 @@
 #include <linux/nodemask.h>
 #include <linux/percpu.h>
 
+#ifdef CONFIG_SMP
+
+extern void prefill_possible_map(void);
+
+#else /* CONFIG_SMP */
+
+static inline void prefill_possible_map(void) {}
+
+#define cpu_physical_id(cpu)                    boot_cpu_physical_apicid
+#define safe_smp_processor_id()                 0
+#define stack_smp_processor_id()                0
+
+#endif /* CONFIG_SMP */
+
 struct x86_cpu {
         struct cpu cpu;
 };
@@ -17,4 +31,7 @@ extern void arch_unregister_cpu(int);
 #endif
 
 DECLARE_PER_CPU(int, cpu_state);
+
+extern unsigned int boot_cpu_id;
+
 #endif /* _ASM_X86_CPU_H */
diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufeature.h
index 7301e60dc4a8..0beba0d1468d 100644
--- a/arch/x86/include/asm/cpufeature.h
+++ b/arch/x86/include/asm/cpufeature.h
@@ -213,6 +213,7 @@ extern const char * const x86_power_flags[32];
 #define cpu_has_xmm             boot_cpu_has(X86_FEATURE_XMM)
 #define cpu_has_xmm2            boot_cpu_has(X86_FEATURE_XMM2)
 #define cpu_has_xmm3            boot_cpu_has(X86_FEATURE_XMM3)
+#define cpu_has_aes             boot_cpu_has(X86_FEATURE_AES)
 #define cpu_has_ht              boot_cpu_has(X86_FEATURE_HT)
 #define cpu_has_mp              boot_cpu_has(X86_FEATURE_MP)
 #define cpu_has_nx              boot_cpu_has(X86_FEATURE_NX)
diff --git a/arch/x86/include/asm/cpumask.h b/arch/x86/include/asm/cpumask.h
new file mode 100644
index 000000000000..a7f3c75f8ad7
--- /dev/null
+++ b/arch/x86/include/asm/cpumask.h
@@ -0,0 +1,32 @@
+#ifndef _ASM_X86_CPUMASK_H
+#define _ASM_X86_CPUMASK_H
+#ifndef __ASSEMBLY__
+#include <linux/cpumask.h>
+
+#ifdef CONFIG_X86_64
+
+extern cpumask_var_t cpu_callin_mask;
+extern cpumask_var_t cpu_callout_mask;
+extern cpumask_var_t cpu_initialized_mask;
+extern cpumask_var_t cpu_sibling_setup_mask;
+
+extern void setup_cpu_local_masks(void);
+
+#else /* CONFIG_X86_32 */
+
+extern cpumask_t cpu_callin_map;
+extern cpumask_t cpu_callout_map;
+extern cpumask_t cpu_initialized;
+extern cpumask_t cpu_sibling_setup_map;
+
+#define cpu_callin_mask         ((struct cpumask *)&cpu_callin_map)
+#define cpu_callout_mask        ((struct cpumask *)&cpu_callout_map)
+#define cpu_initialized_mask    ((struct cpumask *)&cpu_initialized)
+#define cpu_sibling_setup_mask  ((struct cpumask *)&cpu_sibling_setup_map)
+
+static inline void setup_cpu_local_masks(void) { }
+
+#endif /* CONFIG_X86_32 */
+
+#endif /* __ASSEMBLY__ */
+#endif /* _ASM_X86_CPUMASK_H */
diff --git a/arch/x86/include/asm/current.h b/arch/x86/include/asm/current.h
index 0930b4f8d672..c68c361697e1 100644
--- a/arch/x86/include/asm/current.h
+++ b/arch/x86/include/asm/current.h
@@ -1,39 +1,21 @@
 #ifndef _ASM_X86_CURRENT_H
 #define _ASM_X86_CURRENT_H
 
-#ifdef CONFIG_X86_32
 #include <linux/compiler.h>
 #include <asm/percpu.h>
 
+#ifndef __ASSEMBLY__
 struct task_struct;
 
 DECLARE_PER_CPU(struct task_struct *, current_task);
-static __always_inline struct task_struct *get_current(void)
-{
-        return x86_read_percpu(current_task);
-}
-
-#else /* X86_32 */
-
-#ifndef __ASSEMBLY__
-#include <asm/pda.h>
-
-struct task_struct;
 
 static __always_inline struct task_struct *get_current(void)
 {
-        return read_pda(pcurrent);
+        return percpu_read(current_task);
 }
 
-#else /* __ASSEMBLY__ */
-
-#include <asm/asm-offsets.h>
-#define GET_CURRENT(reg) movq %gs:(pda_pcurrent),reg
+#define current get_current()
 
 #endif /* __ASSEMBLY__ */
 
-#endif /* X86_32 */
-
-#define current get_current()
-
 #endif /* _ASM_X86_CURRENT_H */
diff --git a/arch/x86/include/asm/mach-default/do_timer.h b/arch/x86/include/asm/do_timer.h
index 23ecda0b28a0..23ecda0b28a0 100644
--- a/arch/x86/include/asm/mach-default/do_timer.h
+++ b/arch/x86/include/asm/do_timer.h
diff --git a/arch/x86/include/asm/elf.h b/arch/x86/include/asm/elf.h
index f51a3ddde01a..83c1bc8d2e8a 100644
--- a/arch/x86/include/asm/elf.h
+++ b/arch/x86/include/asm/elf.h
@@ -112,7 +112,7 @@ extern unsigned int vdso_enabled;
  * now struct_user_regs, they are different)
  */
 
-#define ELF_CORE_COPY_REGS(pr_reg, regs)        \
+#define ELF_CORE_COPY_REGS_COMMON(pr_reg, regs) \
 do {                                            \
         pr_reg[0] = regs->bx;                   \
         pr_reg[1] = regs->cx;                   \
@@ -124,7 +124,6 @@ do {						\
         pr_reg[7] = regs->ds & 0xffff;          \
         pr_reg[8] = regs->es & 0xffff;          \
         pr_reg[9] = regs->fs & 0xffff;          \
-        savesegment(gs, pr_reg[10]);            \
         pr_reg[11] = regs->orig_ax;             \
         pr_reg[12] = regs->ip;                  \
         pr_reg[13] = regs->cs & 0xffff;         \
@@ -133,6 +132,18 @@ do {						\
         pr_reg[16] = regs->ss & 0xffff;         \
 } while (0);
 
+#define ELF_CORE_COPY_REGS(pr_reg, regs)        \
+do {                                            \
+        ELF_CORE_COPY_REGS_COMMON(pr_reg, regs);\
+        pr_reg[10] = get_user_gs(regs);         \
+} while (0);
+
+#define ELF_CORE_COPY_KERNEL_REGS(pr_reg, regs) \
+do {                                            \
+        ELF_CORE_COPY_REGS_COMMON(pr_reg, regs);\
+        savesegment(gs, pr_reg[10]);            \
+} while (0);
+
 #define ELF_PLATFORM    (utsname()->machine)
 #define set_personality_64bit() do { } while (0)
 
diff --git a/arch/x86/include/asm/mach-default/entry_arch.h b/arch/x86/include/asm/entry_arch.h
index 6b1add8e31dd..854d538ae857 100644
--- a/arch/x86/include/asm/mach-default/entry_arch.h
+++ b/arch/x86/include/asm/entry_arch.h
@@ -9,12 +9,28 @@
  * is no hardware IRQ pin equivalent for them, they are triggered
  * through the ICC by us (IPIs)
  */
-#ifdef CONFIG_X86_SMP
+#ifdef CONFIG_SMP
 BUILD_INTERRUPT(reschedule_interrupt,RESCHEDULE_VECTOR)
-BUILD_INTERRUPT(invalidate_interrupt,INVALIDATE_TLB_VECTOR)
 BUILD_INTERRUPT(call_function_interrupt,CALL_FUNCTION_VECTOR)
 BUILD_INTERRUPT(call_function_single_interrupt,CALL_FUNCTION_SINGLE_VECTOR)
 BUILD_INTERRUPT(irq_move_cleanup_interrupt,IRQ_MOVE_CLEANUP_VECTOR)
+
+BUILD_INTERRUPT3(invalidate_interrupt0,INVALIDATE_TLB_VECTOR_START+0,
+                 smp_invalidate_interrupt)
+BUILD_INTERRUPT3(invalidate_interrupt1,INVALIDATE_TLB_VECTOR_START+1,
+                 smp_invalidate_interrupt)
+BUILD_INTERRUPT3(invalidate_interrupt2,INVALIDATE_TLB_VECTOR_START+2,
+                 smp_invalidate_interrupt)
+BUILD_INTERRUPT3(invalidate_interrupt3,INVALIDATE_TLB_VECTOR_START+3,
+                 smp_invalidate_interrupt)
+BUILD_INTERRUPT3(invalidate_interrupt4,INVALIDATE_TLB_VECTOR_START+4,
+                 smp_invalidate_interrupt)
+BUILD_INTERRUPT3(invalidate_interrupt5,INVALIDATE_TLB_VECTOR_START+5,
+                 smp_invalidate_interrupt)
+BUILD_INTERRUPT3(invalidate_interrupt6,INVALIDATE_TLB_VECTOR_START+6,
+                 smp_invalidate_interrupt)
+BUILD_INTERRUPT3(invalidate_interrupt7,INVALIDATE_TLB_VECTOR_START+7,
+                 smp_invalidate_interrupt)
 #endif
 
 /*
@@ -25,10 +41,15 @@ BUILD_INTERRUPT(irq_move_cleanup_interrupt,IRQ_MOVE_CLEANUP_VECTOR)
  * a much simpler SMP time architecture:
  */
 #ifdef CONFIG_X86_LOCAL_APIC
+
 BUILD_INTERRUPT(apic_timer_interrupt,LOCAL_TIMER_VECTOR)
 BUILD_INTERRUPT(error_interrupt,ERROR_APIC_VECTOR)
 BUILD_INTERRUPT(spurious_interrupt,SPURIOUS_APIC_VECTOR)
 
+#ifdef CONFIG_PERF_COUNTERS
+BUILD_INTERRUPT(perf_counter_interrupt, LOCAL_PERF_VECTOR)
+#endif
+
 #ifdef CONFIG_X86_MCE_P4THERMAL
 BUILD_INTERRUPT(thermal_interrupt,THERMAL_APIC_VECTOR)
 #endif
diff --git a/arch/x86/include/asm/es7000/apic.h b/arch/x86/include/asm/es7000/apic.h
deleted file mode 100644
index c58b9cc74465..000000000000
--- a/arch/x86/include/asm/es7000/apic.h
+++ /dev/null
@@ -1,242 +0,0 @@
-#ifndef __ASM_ES7000_APIC_H
-#define __ASM_ES7000_APIC_H
-
-#include <linux/gfp.h>
-
-#define xapic_phys_to_log_apicid(cpu) per_cpu(x86_bios_cpu_apicid, cpu)
-#define esr_disable (1)
-
-static inline int apic_id_registered(void)
-{
-                return (1);
-}
-
-static inline const cpumask_t *target_cpus_cluster(void)
-{
-        return &CPU_MASK_ALL;
-}
-
-static inline const cpumask_t *target_cpus(void)
-{
-        return &cpumask_of_cpu(smp_processor_id());
-}
-
-#define APIC_DFR_VALUE_CLUSTER          (APIC_DFR_CLUSTER)
-#define INT_DELIVERY_MODE_CLUSTER       (dest_LowestPrio)
-#define INT_DEST_MODE_CLUSTER           (1) /* logical delivery broadcast to all procs */
-#define NO_BALANCE_IRQ_CLUSTER          (1)
-
-#define APIC_DFR_VALUE          (APIC_DFR_FLAT)
-#define INT_DELIVERY_MODE       (dest_Fixed)
-#define INT_DEST_MODE           (0)    /* phys delivery to target procs */
-#define NO_BALANCE_IRQ          (0)
-#undef  APIC_DEST_LOGICAL
-#define APIC_DEST_LOGICAL       0x0
-
-static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid)
-{
-        return 0;
-}
-static inline unsigned long check_apicid_present(int bit)
-{
-        return physid_isset(bit, phys_cpu_present_map);
-}
-
-#define apicid_cluster(apicid) (apicid & 0xF0)
-
-static inline unsigned long calculate_ldr(int cpu)
-{
-        unsigned long id;
-        id = xapic_phys_to_log_apicid(cpu);
-        return (SET_APIC_LOGICAL_ID(id));
-}
-
-/*
- * Set up the logical destination ID.
- *
- * Intel recommends to set DFR, LdR and TPR before enabling
- * an APIC.  See e.g. "AP-388 82489DX User's Manual" (Intel
- * document number 292116).  So here it goes...
- */
-static inline void init_apic_ldr_cluster(void)
-{
-        unsigned long val;
-        int cpu = smp_processor_id();
-
-        apic_write(APIC_DFR, APIC_DFR_VALUE_CLUSTER);
-        val = calculate_ldr(cpu);
-        apic_write(APIC_LDR, val);
-}
-
-static inline void init_apic_ldr(void)
-{
-        unsigned long val;
-        int cpu = smp_processor_id();
-
-        apic_write(APIC_DFR, APIC_DFR_VALUE);
-        val = calculate_ldr(cpu);
-        apic_write(APIC_LDR, val);
-}
-
-extern int apic_version [MAX_APICS];
-static inline void setup_apic_routing(void)
-{
-        int apic = per_cpu(x86_bios_cpu_apicid, smp_processor_id());
-        printk("Enabling APIC mode:  %s. Using %d I/O APICs, target cpus %lx\n",
-                (apic_version[apic] == 0x14) ?
-                        "Physical Cluster" : "Logical Cluster",
-                        nr_ioapics, cpus_addr(*target_cpus())[0]);
-}
-
-static inline int multi_timer_check(int apic, int irq)
-{
-        return 0;
-}
-
-static inline int apicid_to_node(int logical_apicid)
-{
-        return 0;
-}
-
-
-static inline int cpu_present_to_apicid(int mps_cpu)
-{
-        if (!mps_cpu)
-                return boot_cpu_physical_apicid;
-        else if (mps_cpu < nr_cpu_ids)
-                return (int) per_cpu(x86_bios_cpu_apicid, mps_cpu);
-        else
-                return BAD_APICID;
-}
-
-static inline physid_mask_t apicid_to_cpu_present(int phys_apicid)
-{
-        static int id = 0;
-        physid_mask_t mask;
-        mask = physid_mask_of_physid(id);
-        ++id;
-        return mask;
-}
-
-extern u8 cpu_2_logical_apicid[];
-/* Mapping from cpu number to logical apicid */
-static inline int cpu_to_logical_apicid(int cpu)
-{
-#ifdef CONFIG_SMP
-        if (cpu >= nr_cpu_ids)
-                return BAD_APICID;
-        return (int)cpu_2_logical_apicid[cpu];
-#else
-        return logical_smp_processor_id();
-#endif
-}
-
-static inline physid_mask_t ioapic_phys_id_map(physid_mask_t phys_map)
-{
-        /* For clustered we don't have a good way to do this yet - hack */
-        return physids_promote(0xff);
-}
-
-
-static inline void setup_portio_remap(void)
-{
-}
-
-extern unsigned int boot_cpu_physical_apicid;
-static inline int check_phys_apicid_present(int cpu_physical_apicid)
-{
-        boot_cpu_physical_apicid = read_apic_id();
-        return (1);
-}
-
-static inline unsigned int
-cpu_mask_to_apicid_cluster(const struct cpumask *cpumask)
-{
-        int num_bits_set;
-        int cpus_found = 0;
-        int cpu;
-        int apicid;
-
-        num_bits_set = cpumask_weight(cpumask);
-        /* Return id to all */
-        if (num_bits_set == nr_cpu_ids)
-                return 0xFF;
-        /*
-         * The cpus in the mask must all be on the apic cluster.  If are not
-         * on the same apicid cluster return default value of TARGET_CPUS.
-         */
-        cpu = cpumask_first(cpumask);
-        apicid = cpu_to_logical_apicid(cpu);
-        while (cpus_found < num_bits_set) {
-                if (cpumask_test_cpu(cpu, cpumask)) {
-                        int new_apicid = cpu_to_logical_apicid(cpu);
-                        if (apicid_cluster(apicid) !=
-                                        apicid_cluster(new_apicid)){
-                                printk ("%s: Not a valid mask!\n", __func__);
-                                return 0xFF;
-                        }
-                        apicid = new_apicid;
-                        cpus_found++;
-                }
-                cpu++;
-        }
-        return apicid;
-}
-
-static inline unsigned int cpu_mask_to_apicid(const cpumask_t *cpumask)
-{
-        int num_bits_set;
-        int cpus_found = 0;
-        int cpu;
-        int apicid;
-
-        num_bits_set = cpus_weight(*cpumask);
-        /* Return id to all */
-        if (num_bits_set == nr_cpu_ids)
-                return cpu_to_logical_apicid(0);
-        /*
-         * The cpus in the mask must all be on the apic cluster.  If are not
-         * on the same apicid cluster return default value of TARGET_CPUS.
-         */
-        cpu = first_cpu(*cpumask);
-        apicid = cpu_to_logical_apicid(cpu);
-        while (cpus_found < num_bits_set) {
-                if (cpu_isset(cpu, *cpumask)) {
-                        int new_apicid = cpu_to_logical_apicid(cpu);
-                        if (apicid_cluster(apicid) !=
-                                        apicid_cluster(new_apicid)){
-                                printk ("%s: Not a valid mask!\n", __func__);
-                                return cpu_to_logical_apicid(0);
-                        }
-                        apicid = new_apicid;
-                        cpus_found++;
-                }
-                cpu++;
-        }
-        return apicid;
-}
-
-
-static inline unsigned int cpu_mask_to_apicid_and(const struct cpumask *inmask,
-                                                  const struct cpumask *andmask)
-{
-        int apicid = cpu_to_logical_apicid(0);
-        cpumask_var_t cpumask;
-
-        if (!alloc_cpumask_var(&cpumask, GFP_ATOMIC))
-                return apicid;
-
-        cpumask_and(cpumask, inmask, andmask);
-        cpumask_and(cpumask, cpumask, cpu_online_mask);
-        apicid = cpu_mask_to_apicid(cpumask);
-
-        free_cpumask_var(cpumask);
-        return apicid;
-}
-
-static inline u32 phys_pkg_id(u32 cpuid_apic, int index_msb)
-{
-        return cpuid_apic >> index_msb;
-}
-
-#endif /* __ASM_ES7000_APIC_H */
diff --git a/arch/x86/include/asm/es7000/apicdef.h b/arch/x86/include/asm/es7000/apicdef.h
deleted file mode 100644
index 8b234a3cb851..000000000000
--- a/arch/x86/include/asm/es7000/apicdef.h
+++ /dev/null
@@ -1,13 +0,0 @@
-#ifndef __ASM_ES7000_APICDEF_H
-#define __ASM_ES7000_APICDEF_H
-
-#define         APIC_ID_MASK            (0xFF<<24)
-
-static inline unsigned get_apic_id(unsigned long x)
-{
-        return (((x)>>24)&0xFF);
-}
-
-#define         GET_APIC_ID(x)  get_apic_id(x)
-
-#endif
diff --git a/arch/x86/include/asm/es7000/ipi.h b/arch/x86/include/asm/es7000/ipi.h
deleted file mode 100644
index 7e8ed24d4b8a..000000000000
--- a/arch/x86/include/asm/es7000/ipi.h
+++ /dev/null
@@ -1,22 +0,0 @@
-#ifndef __ASM_ES7000_IPI_H
-#define __ASM_ES7000_IPI_H
-
-void send_IPI_mask_sequence(const struct cpumask *mask, int vector);
-void send_IPI_mask_allbutself(const struct cpumask *mask, int vector);
-
-static inline void send_IPI_mask(const struct cpumask *mask, int vector)
-{
-        send_IPI_mask_sequence(mask, vector);
-}
-
-static inline void send_IPI_allbutself(int vector)
-{
-        send_IPI_mask_allbutself(cpu_online_mask, vector);
-}
-
-static inline void send_IPI_all(int vector)
-{
-        send_IPI_mask(cpu_online_mask, vector);
-}
-
-#endif /* __ASM_ES7000_IPI_H */
diff --git a/arch/x86/include/asm/es7000/mpparse.h b/arch/x86/include/asm/es7000/mpparse.h
deleted file mode 100644
index c1629b090ec2..000000000000
--- a/arch/x86/include/asm/es7000/mpparse.h
+++ /dev/null
@@ -1,29 +0,0 @@
-#ifndef __ASM_ES7000_MPPARSE_H
-#define __ASM_ES7000_MPPARSE_H
-
-#include <linux/acpi.h>
-
-extern int parse_unisys_oem (char *oemptr);
-extern int find_unisys_acpi_oem_table(unsigned long *oem_addr);
-extern void unmap_unisys_acpi_oem_table(unsigned long oem_addr);
-extern void setup_unisys(void);
-
-#ifndef CONFIG_X86_GENERICARCH
-extern int acpi_madt_oem_check(char *oem_id, char *oem_table_id);
-extern int mps_oem_check(struct mpc_table *mpc, char *oem, char *productid);
-#endif
-
-#ifdef CONFIG_ACPI
-
-static inline int es7000_check_dsdt(void)
-{
-        struct acpi_table_header header;
-
-        if (ACPI_SUCCESS(acpi_get_table_header(ACPI_SIG_DSDT, 0, &header)) &&
-            !strncmp(header.oem_id, "UNISYS", 6))
-                return 1;
-        return 0;
-}
-#endif
-
-#endif /* __ASM_MACH_MPPARSE_H */
diff --git a/arch/x86/include/asm/es7000/wakecpu.h b/arch/x86/include/asm/es7000/wakecpu.h
deleted file mode 100644
index 78f0daaee436..000000000000
--- a/arch/x86/include/asm/es7000/wakecpu.h
+++ /dev/null
@@ -1,37 +0,0 @@
-#ifndef __ASM_ES7000_WAKECPU_H
-#define __ASM_ES7000_WAKECPU_H
-
-#define TRAMPOLINE_PHYS_LOW     0x467
-#define TRAMPOLINE_PHYS_HIGH    0x469
-
-static inline void wait_for_init_deassert(atomic_t *deassert)
-{
-#ifndef CONFIG_ES7000_CLUSTERED_APIC
-        while (!atomic_read(deassert))
-                cpu_relax();
-#endif
-        return;
-}
-
-/* Nothing to do for most platforms, since cleared by the INIT cycle */
-static inline void smp_callin_clear_local_apic(void)
-{
-}
-
-static inline void store_NMI_vector(unsigned short *high, unsigned short *low)
-{
-}
-
-static inline void restore_NMI_vector(unsigned short *high, unsigned short *low)
-{
-}
-
-extern void __inquire_remote_apic(int apicid);
-
-static inline void inquire_remote_apic(int apicid)
-{
-        if (apic_verbosity >= APIC_DEBUG)
-                __inquire_remote_apic(apicid);
-}
-
-#endif /* __ASM_MACH_WAKECPU_H */
diff --git a/arch/x86/include/asm/fixmap.h b/arch/x86/include/asm/fixmap.h
index 23696d44a0af..63a79c77d220 100644
--- a/arch/x86/include/asm/fixmap.h
+++ b/arch/x86/include/asm/fixmap.h
@@ -1,11 +1,145 @@
+/*
+ * fixmap.h: compile-time virtual memory allocation
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1998 Ingo Molnar
+ *
+ * Support of BIGMEM added by Gerhard Wichert, Siemens AG, July 1999
+ * x86_32 and x86_64 integration by Gustavo F. Padovan, February 2009
+ */
+
 #ifndef _ASM_X86_FIXMAP_H
 #define _ASM_X86_FIXMAP_H
 
+#ifndef __ASSEMBLY__
+#include <linux/kernel.h>
+#include <asm/acpi.h>
+#include <asm/apicdef.h>
+#include <asm/page.h>
+#ifdef CONFIG_X86_32
+#include <linux/threads.h>
+#include <asm/kmap_types.h>
+#else
+#include <asm/vsyscall.h>
+#endif
+
+/*
+ * We can't declare FIXADDR_TOP as variable for x86_64 because vsyscall
+ * uses fixmaps that relies on FIXADDR_TOP for proper address calculation.
+ * Because of this, FIXADDR_TOP x86 integration was left as later work.
+ */
+#ifdef CONFIG_X86_32
+/* used by vmalloc.c, vsyscall.lds.S.
+ *
+ * Leave one empty page between vmalloc'ed areas and
+ * the start of the fixmap.
+ */
+extern unsigned long __FIXADDR_TOP;
+#define FIXADDR_TOP     ((unsigned long)__FIXADDR_TOP)
+
+#define FIXADDR_USER_START     __fix_to_virt(FIX_VDSO)
+#define FIXADDR_USER_END       __fix_to_virt(FIX_VDSO - 1)
+#else
+#define FIXADDR_TOP     (VSYSCALL_END-PAGE_SIZE)
+
+/* Only covers 32bit vsyscalls currently. Need another set for 64bit. */
+#define FIXADDR_USER_START      ((unsigned long)VSYSCALL32_VSYSCALL)
+#define FIXADDR_USER_END        (FIXADDR_USER_START + PAGE_SIZE)
+#endif
+
+
+/*
+ * Here we define all the compile-time 'special' virtual
+ * addresses. The point is to have a constant address at
+ * compile time, but to set the physical address only
+ * in the boot process.
+ * for x86_32: We allocate these special addresses
+ * from the end of virtual memory (0xfffff000) backwards.
+ * Also this lets us do fail-safe vmalloc(), we
+ * can guarantee that these special addresses and
+ * vmalloc()-ed addresses never overlap.
+ *
+ * These 'compile-time allocated' memory buffers are
+ * fixed-size 4k pages (or larger if used with an increment
+ * higher than 1). Use set_fixmap(idx,phys) to associate
+ * physical memory with fixmap indices.
+ *
+ * TLB entries of such buffers will not be flushed across
+ * task switches.
+ */
+enum fixed_addresses {
 #ifdef CONFIG_X86_32
-# include "fixmap_32.h"
+        FIX_HOLE,
+        FIX_VDSO,
 #else
-# include "fixmap_64.h"
+        VSYSCALL_LAST_PAGE,
+        VSYSCALL_FIRST_PAGE = VSYSCALL_LAST_PAGE
+                            + ((VSYSCALL_END-VSYSCALL_START) >> PAGE_SHIFT) - 1,
+        VSYSCALL_HPET,
 #endif
+        FIX_DBGP_BASE,
+        FIX_EARLYCON_MEM_BASE,
+#ifdef CONFIG_X86_LOCAL_APIC
+        FIX_APIC_BASE,  /* local (CPU) APIC) -- required for SMP or not */
+#endif
+#ifdef CONFIG_X86_IO_APIC
+        FIX_IO_APIC_BASE_0,
+        FIX_IO_APIC_BASE_END = FIX_IO_APIC_BASE_0 + MAX_IO_APICS - 1,
+#endif
+#ifdef CONFIG_X86_VISWS_APIC
+        FIX_CO_CPU,     /* Cobalt timer */
+        FIX_CO_APIC,    /* Cobalt APIC Redirection Table */
+        FIX_LI_PCIA,    /* Lithium PCI Bridge A */
+        FIX_LI_PCIB,    /* Lithium PCI Bridge B */
+#endif
+#ifdef CONFIG_X86_F00F_BUG
+        FIX_F00F_IDT,   /* Virtual mapping for IDT */
+#endif
+#ifdef CONFIG_X86_CYCLONE_TIMER
+        FIX_CYCLONE_TIMER, /*cyclone timer register*/
+#endif
+#ifdef CONFIG_X86_32
+        FIX_KMAP_BEGIN, /* reserved pte's for temporary kernel mappings */
+        FIX_KMAP_END = FIX_KMAP_BEGIN+(KM_TYPE_NR*NR_CPUS)-1,
+#ifdef CONFIG_PCI_MMCONFIG
+        FIX_PCIE_MCFG,
+#endif
+#endif
+#ifdef CONFIG_PARAVIRT
+        FIX_PARAVIRT_BOOTMAP,
+#endif
+        __end_of_permanent_fixed_addresses,
+#ifdef CONFIG_PROVIDE_OHCI1394_DMA_INIT
+        FIX_OHCI1394_BASE,
+#endif
+        /*
+         * 256 temporary boot-time mappings, used by early_ioremap(),
+         * before ioremap() is functional.
+         *
+         * We round it up to the next 256 pages boundary so that we
+         * can have a single pgd entry and a single pte table:
+         */
+#define NR_FIX_BTMAPS           64
+#define FIX_BTMAPS_SLOTS        4
+        FIX_BTMAP_END = __end_of_permanent_fixed_addresses + 256 -
+                        (__end_of_permanent_fixed_addresses & 255),
+        FIX_BTMAP_BEGIN = FIX_BTMAP_END + NR_FIX_BTMAPS*FIX_BTMAPS_SLOTS - 1,
+#ifdef CONFIG_X86_32
+        FIX_WP_TEST,
+#endif
+        __end_of_fixed_addresses
+};
+
+
+extern void reserve_top_address(unsigned long reserve);
+
+#define FIXADDR_SIZE    (__end_of_permanent_fixed_addresses << PAGE_SHIFT)
+#define FIXADDR_BOOT_SIZE       (__end_of_fixed_addresses << PAGE_SHIFT)
+#define FIXADDR_START           (FIXADDR_TOP - FIXADDR_SIZE)
+#define FIXADDR_BOOT_START      (FIXADDR_TOP - FIXADDR_BOOT_SIZE)
 
 extern int fixmaps_set;
 
@@ -69,4 +203,5 @@ static inline unsigned long virt_to_fix(const unsigned long vaddr)
         BUG_ON(vaddr >= FIXADDR_TOP || vaddr < FIXADDR_START);
         return __virt_to_fix(vaddr);
 }
+#endif /* !__ASSEMBLY__ */
 #endif /* _ASM_X86_FIXMAP_H */
diff --git a/arch/x86/include/asm/fixmap_32.h b/arch/x86/include/asm/fixmap_32.h
deleted file mode 100644
index c7115c1d7217..000000000000
--- a/arch/x86/include/asm/fixmap_32.h
+++ /dev/null
@@ -1,119 +0,0 @@
-/*
- * fixmap.h: compile-time virtual memory allocation
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1998 Ingo Molnar
- *
- * Support of BIGMEM added by Gerhard Wichert, Siemens AG, July 1999
- */
-
-#ifndef _ASM_X86_FIXMAP_32_H
-#define _ASM_X86_FIXMAP_32_H
-
-
-/* used by vmalloc.c, vsyscall.lds.S.
- *
- * Leave one empty page between vmalloc'ed areas and
- * the start of the fixmap.
- */
-extern unsigned long __FIXADDR_TOP;
-#define FIXADDR_USER_START     __fix_to_virt(FIX_VDSO)
-#define FIXADDR_USER_END       __fix_to_virt(FIX_VDSO - 1)
-
-#ifndef __ASSEMBLY__
-#include <linux/kernel.h>
-#include <asm/acpi.h>
-#include <asm/apicdef.h>
-#include <asm/page.h>
-#include <linux/threads.h>
-#include <asm/kmap_types.h>
-
-/*
- * Here we define all the compile-time 'special' virtual
- * addresses. The point is to have a constant address at
- * compile time, but to set the physical address only
- * in the boot process. We allocate these special addresses
- * from the end of virtual memory (0xfffff000) backwards.
- * Also this lets us do fail-safe vmalloc(), we
- * can guarantee that these special addresses and
- * vmalloc()-ed addresses never overlap.
- *
- * these 'compile-time allocated' memory buffers are
- * fixed-size 4k pages. (or larger if used with an increment
- * highger than 1) use fixmap_set(idx,phys) to associate
- * physical memory with fixmap indices.
- *
- * TLB entries of such buffers will not be flushed across
- * task switches.
- */
-enum fixed_addresses {
-        FIX_HOLE,
-        FIX_VDSO,
-        FIX_DBGP_BASE,
-        FIX_EARLYCON_MEM_BASE,
-#ifdef CONFIG_X86_LOCAL_APIC
-        FIX_APIC_BASE,  /* local (CPU) APIC) -- required for SMP or not */
-#endif
-#ifdef CONFIG_X86_IO_APIC
-        FIX_IO_APIC_BASE_0,
-        FIX_IO_APIC_BASE_END = FIX_IO_APIC_BASE_0 + MAX_IO_APICS-1,
-#endif
-#ifdef CONFIG_X86_VISWS_APIC
-        FIX_CO_CPU,     /* Cobalt timer */
-        FIX_CO_APIC,    /* Cobalt APIC Redirection Table */
-        FIX_LI_PCIA,    /* Lithium PCI Bridge A */
-        FIX_LI_PCIB,    /* Lithium PCI Bridge B */
-#endif
-#ifdef CONFIG_X86_F00F_BUG
-        FIX_F00F_IDT,   /* Virtual mapping for IDT */
-#endif
-#ifdef CONFIG_X86_CYCLONE_TIMER
-        FIX_CYCLONE_TIMER, /*cyclone timer register*/
-#endif
-        FIX_KMAP_BEGIN, /* reserved pte's for temporary kernel mappings */
-        FIX_KMAP_END = FIX_KMAP_BEGIN+(KM_TYPE_NR*NR_CPUS)-1,
-#ifdef CONFIG_PCI_MMCONFIG
-        FIX_PCIE_MCFG,
-#endif
-#ifdef CONFIG_PARAVIRT
-        FIX_PARAVIRT_BOOTMAP,
-#endif
-        __end_of_permanent_fixed_addresses,
-        /*
-         * 256 temporary boot-time mappings, used by early_ioremap(),
-         * before ioremap() is functional.
-         *
-         * We round it up to the next 256 pages boundary so that we
-         * can have a single pgd entry and a single pte table:
-         */
-#define NR_FIX_BTMAPS           64
-#define FIX_BTMAPS_SLOTS        4
-        FIX_BTMAP_END = __end_of_permanent_fixed_addresses + 256 -
-                        (__end_of_permanent_fixed_addresses & 255),
-        FIX_BTMAP_BEGIN = FIX_BTMAP_END + NR_FIX_BTMAPS*FIX_BTMAPS_SLOTS - 1,
-        FIX_WP_TEST,
-#ifdef CONFIG_ACPI
-        FIX_ACPI_BEGIN,
-        FIX_ACPI_END = FIX_ACPI_BEGIN + FIX_ACPI_PAGES - 1,
-#endif
-#ifdef CONFIG_PROVIDE_OHCI1394_DMA_INIT
-        FIX_OHCI1394_BASE,
-#endif
-        __end_of_fixed_addresses
-};
-
-extern void reserve_top_address(unsigned long reserve);
-
-
-#define FIXADDR_TOP     ((unsigned long)__FIXADDR_TOP)
-
-#define __FIXADDR_SIZE  (__end_of_permanent_fixed_addresses << PAGE_SHIFT)
-#define __FIXADDR_BOOT_SIZE     (__end_of_fixed_addresses << PAGE_SHIFT)
-#define FIXADDR_START           (FIXADDR_TOP - __FIXADDR_SIZE)
-#define FIXADDR_BOOT_START      (FIXADDR_TOP - __FIXADDR_BOOT_SIZE)
-
-#endif /* !__ASSEMBLY__ */
-#endif /* _ASM_X86_FIXMAP_32_H */
diff --git a/arch/x86/include/asm/fixmap_64.h b/arch/x86/include/asm/fixmap_64.h
deleted file mode 100644
index 8be740977db8..000000000000
--- a/arch/x86/include/asm/fixmap_64.h
+++ /dev/null
@@ -1,79 +0,0 @@
-/*
- * fixmap.h: compile-time virtual memory allocation
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1998 Ingo Molnar
- */
-
-#ifndef _ASM_X86_FIXMAP_64_H
-#define _ASM_X86_FIXMAP_64_H
-
-#include <linux/kernel.h>
-#include <asm/acpi.h>
-#include <asm/apicdef.h>
-#include <asm/page.h>
-#include <asm/vsyscall.h>
-
-/*
- * Here we define all the compile-time 'special' virtual
- * addresses. The point is to have a constant address at
- * compile time, but to set the physical address only
- * in the boot process.
- *
- * These 'compile-time allocated' memory buffers are
- * fixed-size 4k pages (or larger if used with an increment
- * higher than 1). Use set_fixmap(idx,phys) to associate
- * physical memory with fixmap indices.
- *
- * TLB entries of such buffers will not be flushed across
- * task switches.
- */
-
-enum fixed_addresses {
-        VSYSCALL_LAST_PAGE,
-        VSYSCALL_FIRST_PAGE = VSYSCALL_LAST_PAGE
-                            + ((VSYSCALL_END-VSYSCALL_START) >> PAGE_SHIFT) - 1,
-        VSYSCALL_HPET,
-        FIX_DBGP_BASE,
-        FIX_EARLYCON_MEM_BASE,
-        FIX_APIC_BASE,  /* local (CPU) APIC) -- required for SMP or not */
-        FIX_IO_APIC_BASE_0,
-        FIX_IO_APIC_BASE_END = FIX_IO_APIC_BASE_0 + MAX_IO_APICS - 1,
-#ifdef CONFIG_PARAVIRT
-        FIX_PARAVIRT_BOOTMAP,
-#endif
-        __end_of_permanent_fixed_addresses,
-#ifdef CONFIG_ACPI
-        FIX_ACPI_BEGIN,
-        FIX_ACPI_END = FIX_ACPI_BEGIN + FIX_ACPI_PAGES - 1,
-#endif
-#ifdef CONFIG_PROVIDE_OHCI1394_DMA_INIT
-        FIX_OHCI1394_BASE,
-#endif
-        /*
-         * 256 temporary boot-time mappings, used by early_ioremap(),
-         * before ioremap() is functional.
-         *
-         * We round it up to the next 256 pages boundary so that we
-         * can have a single pgd entry and a single pte table:
-         */
-#define NR_FIX_BTMAPS           64
-#define FIX_BTMAPS_SLOTS        4
-        FIX_BTMAP_END = __end_of_permanent_fixed_addresses + 256 -
-                        (__end_of_permanent_fixed_addresses & 255),
-        FIX_BTMAP_BEGIN = FIX_BTMAP_END + NR_FIX_BTMAPS*FIX_BTMAPS_SLOTS - 1,
-        __end_of_fixed_addresses
-};
-
-#define FIXADDR_TOP     (VSYSCALL_END-PAGE_SIZE)
-#define FIXADDR_SIZE    (__end_of_fixed_addresses << PAGE_SHIFT)
-#define FIXADDR_START   (FIXADDR_TOP - FIXADDR_SIZE)
-
-/* Only covers 32bit vsyscalls currently. Need another set for 64bit. */
-#define FIXADDR_USER_START      ((unsigned long)VSYSCALL32_VSYSCALL)
-#define FIXADDR_USER_END        (FIXADDR_USER_START + PAGE_SIZE)
-
-#endif /* _ASM_X86_FIXMAP_64_H */
diff --git a/arch/x86/include/asm/genapic.h b/arch/x86/include/asm/genapic.h
index d48bee663a6f..4b8b98fa7f25 100644
--- a/arch/x86/include/asm/genapic.h
+++ b/arch/x86/include/asm/genapic.h
@@ -1,5 +1 @@
-#ifdef CONFIG_X86_32
-# include "genapic_32.h"
-#else
-# include "genapic_64.h"
-#endif
+#include <asm/apic.h>
diff --git a/arch/x86/include/asm/genapic_32.h b/arch/x86/include/asm/genapic_32.h
deleted file mode 100644
index 2c05b737ee22..000000000000
--- a/arch/x86/include/asm/genapic_32.h
+++ /dev/null
@@ -1,148 +0,0 @@
-#ifndef _ASM_X86_GENAPIC_32_H
-#define _ASM_X86_GENAPIC_32_H
-
-#include <asm/mpspec.h>
-#include <asm/atomic.h>
-
-/*
- * Generic APIC driver interface.
- *
- * An straight forward mapping of the APIC related parts of the
- * x86 subarchitecture interface to a dynamic object.
- *
- * This is used by the "generic" x86 subarchitecture.
- *
- * Copyright 2003 Andi Kleen, SuSE Labs.
- */
-
-struct mpc_bus;
-struct mpc_table;
-struct mpc_cpu;
-
-struct genapic {
-        char *name;
-        int (*probe)(void);
-
-        int (*apic_id_registered)(void);
-        const struct cpumask *(*target_cpus)(void);
-        int int_delivery_mode;
-        int int_dest_mode;
-        int ESR_DISABLE;
-        int apic_destination_logical;
-        unsigned long (*check_apicid_used)(physid_mask_t bitmap, int apicid);
-        unsigned long (*check_apicid_present)(int apicid);
-        int no_balance_irq;
-        int no_ioapic_check;
-        void (*init_apic_ldr)(void);
-        physid_mask_t (*ioapic_phys_id_map)(physid_mask_t map);
-
-        void (*setup_apic_routing)(void);
-        int (*multi_timer_check)(int apic, int irq);
-        int (*apicid_to_node)(int logical_apicid);
-        int (*cpu_to_logical_apicid)(int cpu);
-        int (*cpu_present_to_apicid)(int mps_cpu);
-        physid_mask_t (*apicid_to_cpu_present)(int phys_apicid);
-        void (*setup_portio_remap)(void);
-        int (*check_phys_apicid_present)(int boot_cpu_physical_apicid);
-        void (*enable_apic_mode)(void);
-        u32 (*phys_pkg_id)(u32 cpuid_apic, int index_msb);
-
-        /* mpparse */
-        /* When one of the next two hooks returns 1 the genapic
-           is switched to this. Essentially they are additional probe
-           functions. */
-        int (*mps_oem_check)(struct mpc_table *mpc, char *oem,
-                             char *productid);
-        int (*acpi_madt_oem_check)(char *oem_id, char *oem_table_id);
-
-        unsigned (*get_apic_id)(unsigned long x);
-        unsigned long apic_id_mask;
-        unsigned int (*cpu_mask_to_apicid)(const struct cpumask *cpumask);
-        unsigned int (*cpu_mask_to_apicid_and)(const struct cpumask *cpumask,
-                                               const struct cpumask *andmask);
-        void (*vector_allocation_domain)(int cpu, struct cpumask *retmask);
-
-#ifdef CONFIG_SMP
-        /* ipi */
-        void (*send_IPI_mask)(const struct cpumask *mask, int vector);
-        void (*send_IPI_mask_allbutself)(const struct cpumask *mask,
-                                         int vector);
-        void (*send_IPI_allbutself)(int vector);
-        void (*send_IPI_all)(int vector);
-#endif
-        int (*wakeup_cpu)(int apicid, unsigned long start_eip);
-        int trampoline_phys_low;
-        int trampoline_phys_high;
-        void (*wait_for_init_deassert)(atomic_t *deassert);
-        void (*smp_callin_clear_local_apic)(void);
-        void (*store_NMI_vector)(unsigned short *high, unsigned short *low);
-        void (*restore_NMI_vector)(unsigned short *high, unsigned short *low);
-        void (*inquire_remote_apic)(int apicid);
-};
-
-#define APICFUNC(x) .x = x,
-
-/* More functions could be probably marked IPIFUNC and save some space
-   in UP GENERICARCH kernels, but I don't have the nerve right now
-   to untangle this mess. -AK  */
-#ifdef CONFIG_SMP
-#define IPIFUNC(x) APICFUNC(x)
-#else
-#define IPIFUNC(x)
-#endif
-
-#define APIC_INIT(aname, aprobe)                        \
-{                                                       \
-        .name = aname,                                  \
-        .probe = aprobe,                                \
-        .int_delivery_mode = INT_DELIVERY_MODE,         \
-        .int_dest_mode = INT_DEST_MODE,                 \
-        .no_balance_irq = NO_BALANCE_IRQ,               \
-        .ESR_DISABLE = esr_disable,                     \
-        .apic_destination_logical = APIC_DEST_LOGICAL,  \
-        APICFUNC(apic_id_registered)                    \
-        APICFUNC(target_cpus)                           \
-        APICFUNC(check_apicid_used)                     \
-        APICFUNC(check_apicid_present)                  \
-        APICFUNC(init_apic_ldr)                         \
-        APICFUNC(ioapic_phys_id_map)                    \
-        APICFUNC(setup_apic_routing)                    \
-        APICFUNC(multi_timer_check)                     \
-        APICFUNC(apicid_to_node)                        \
-        APICFUNC(cpu_to_logical_apicid)                 \
-        APICFUNC(cpu_present_to_apicid)                 \
-        APICFUNC(apicid_to_cpu_present)                 \
-        APICFUNC(setup_portio_remap)                    \
-        APICFUNC(check_phys_apicid_present)             \
-        APICFUNC(mps_oem_check)                         \
-        APICFUNC(get_apic_id)                           \
-        .apic_id_mask = APIC_ID_MASK,                   \
-        APICFUNC(cpu_mask_to_apicid)                    \
-        APICFUNC(cpu_mask_to_apicid_and)                \
-        APICFUNC(vector_allocation_domain)              \
-        APICFUNC(acpi_madt_oem_check)                   \
-        IPIFUNC(send_IPI_mask)                          \
-        IPIFUNC(send_IPI_allbutself)                    \
-        IPIFUNC(send_IPI_all)                           \
-        APICFUNC(enable_apic_mode)                      \
-        APICFUNC(phys_pkg_id)                           \
-        .trampoline_phys_low = TRAMPOLINE_PHYS_LOW,             \
-        .trampoline_phys_high = TRAMPOLINE_PHYS_HIGH,           \
-        APICFUNC(wait_for_init_deassert)                \
-        APICFUNC(smp_callin_clear_local_apic)           \
-        APICFUNC(store_NMI_vector)                      \
-        APICFUNC(restore_NMI_vector)                    \
-        APICFUNC(inquire_remote_apic)                   \
-}
-
-extern struct genapic *genapic;
-extern void es7000_update_genapic_to_cluster(void);
-
-enum uv_system_type {UV_NONE, UV_LEGACY_APIC, UV_X2APIC, UV_NON_UNIQUE_APIC};
-#define get_uv_system_type()            UV_NONE
-#define is_uv_system()                  0
-#define uv_wakeup_secondary(a, b)       1
-#define uv_system_init()                do {} while (0)
-
-
-#endif /* _ASM_X86_GENAPIC_32_H */
diff --git a/arch/x86/include/asm/genapic_64.h b/arch/x86/include/asm/genapic_64.h
deleted file mode 100644
index adf32fb56aa6..000000000000
--- a/arch/x86/include/asm/genapic_64.h
+++ /dev/null
@@ -1,66 +0,0 @@
-#ifndef _ASM_X86_GENAPIC_64_H
-#define _ASM_X86_GENAPIC_64_H
-
-#include <linux/cpumask.h>
-
-/*
- * Copyright 2004 James Cleverdon, IBM.
- * Subject to the GNU Public License, v.2
- *
- * Generic APIC sub-arch data struct.
- *
- * Hacked for x86-64 by James Cleverdon from i386 architecture code by
- * Martin Bligh, Andi Kleen, James Bottomley, John Stultz, and
- * James Cleverdon.
- */
-
-struct genapic {
-        char *name;
-        int (*acpi_madt_oem_check)(char *oem_id, char *oem_table_id);
-        u32 int_delivery_mode;
-        u32 int_dest_mode;
-        int (*apic_id_registered)(void);
-        const struct cpumask *(*target_cpus)(void);
-        void (*vector_allocation_domain)(int cpu, struct cpumask *retmask);
-        void (*init_apic_ldr)(void);
-        /* ipi */
-        void (*send_IPI_mask)(const struct cpumask *mask, int vector);
-        void (*send_IPI_mask_allbutself)(const struct cpumask *mask,
-                                         int vector);
-        void (*send_IPI_allbutself)(int vector);
-        void (*send_IPI_all)(int vector);
-        void (*send_IPI_self)(int vector);
-        /* */
-        unsigned int (*cpu_mask_to_apicid)(const struct cpumask *cpumask);
-        unsigned int (*cpu_mask_to_apicid_and)(const struct cpumask *cpumask,
-                                               const struct cpumask *andmask);
-        unsigned int (*phys_pkg_id)(int index_msb);
-        unsigned int (*get_apic_id)(unsigned long x);
-        unsigned long (*set_apic_id)(unsigned int id);
-        unsigned long apic_id_mask;
-        /* wakeup_secondary_cpu */
-        int (*wakeup_cpu)(int apicid, unsigned long start_eip);
-};
-
-extern struct genapic *genapic;
-
-extern struct genapic apic_flat;
-extern struct genapic apic_physflat;
-extern struct genapic apic_x2apic_cluster;
-extern struct genapic apic_x2apic_phys;
-extern int acpi_madt_oem_check(char *, char *);
-
-extern void apic_send_IPI_self(int vector);
-enum uv_system_type {UV_NONE, UV_LEGACY_APIC, UV_X2APIC, UV_NON_UNIQUE_APIC};
-extern enum uv_system_type get_uv_system_type(void);
-extern int is_uv_system(void);
-
-extern struct genapic apic_x2apic_uv_x;
-DECLARE_PER_CPU(int, x2apic_extra_bits);
-extern void uv_cpu_init(void);
-extern void uv_system_init(void);
-extern int uv_wakeup_secondary(int phys_apicid, unsigned int start_rip);
-
-extern void setup_apic_routing(void);
-
-#endif /* _ASM_X86_GENAPIC_64_H */
diff --git a/arch/x86/include/asm/hardirq.h b/arch/x86/include/asm/hardirq.h
index 000787df66e6..176f058e7159 100644
--- a/arch/x86/include/asm/hardirq.h
+++ b/arch/x86/include/asm/hardirq.h
@@ -1,11 +1,52 @@
-#ifdef CONFIG_X86_32
-# include "hardirq_32.h"
-#else
-# include "hardirq_64.h"
+#ifndef _ASM_X86_HARDIRQ_H
+#define _ASM_X86_HARDIRQ_H
+
+#include <linux/threads.h>
+#include <linux/irq.h>
+
+typedef struct {
+        unsigned int __softirq_pending;
+        unsigned int __nmi_count;       /* arch dependent */
+        unsigned int irq0_irqs;
+#ifdef CONFIG_X86_LOCAL_APIC
+        unsigned int apic_timer_irqs;   /* arch dependent */
+        unsigned int irq_spurious_count;
+#endif
+#ifdef CONFIG_SMP
+        unsigned int irq_resched_count;
+        unsigned int irq_call_count;
+        unsigned int irq_tlb_count;
+#endif
+#ifdef CONFIG_X86_MCE
+        unsigned int irq_thermal_count;
+# ifdef CONFIG_X86_64
+        unsigned int irq_threshold_count;
+# endif
 #endif
+} ____cacheline_aligned irq_cpustat_t;
+
+DECLARE_PER_CPU(irq_cpustat_t, irq_stat);
+
+/* We can have at most NR_VECTORS irqs routed to a cpu at a time */
+#define MAX_HARDIRQS_PER_CPU NR_VECTORS
+
+#define __ARCH_IRQ_STAT
+
+#define inc_irq_stat(member)    percpu_add(irq_stat.member, 1)
+
+#define local_softirq_pending() percpu_read(irq_stat.__softirq_pending)
+
+#define __ARCH_SET_SOFTIRQ_PENDING
+
+#define set_softirq_pending(x)  percpu_write(irq_stat.__softirq_pending, (x))
+#define or_softirq_pending(x)   percpu_or(irq_stat.__softirq_pending, (x))
+
+extern void ack_bad_irq(unsigned int irq);
 
 extern u64 arch_irq_stat_cpu(unsigned int cpu);
 #define arch_irq_stat_cpu       arch_irq_stat_cpu
 
 extern u64 arch_irq_stat(void);
 #define arch_irq_stat           arch_irq_stat
+
+#endif /* _ASM_X86_HARDIRQ_H */
diff --git a/arch/x86/include/asm/hardirq_32.h b/arch/x86/include/asm/hardirq_32.h
deleted file mode 100644
index cf7954d1405f..000000000000
--- a/arch/x86/include/asm/hardirq_32.h
+++ /dev/null
@@ -1,30 +0,0 @@
-#ifndef _ASM_X86_HARDIRQ_32_H
-#define _ASM_X86_HARDIRQ_32_H
-
-#include <linux/threads.h>
-#include <linux/irq.h>
-
-typedef struct {
-        unsigned int __softirq_pending;
-        unsigned long idle_timestamp;
-        unsigned int __nmi_count;       /* arch dependent */
-        unsigned int apic_timer_irqs;   /* arch dependent */
-        unsigned int irq0_irqs;
-        unsigned int irq_resched_count;
-        unsigned int irq_call_count;
-        unsigned int irq_tlb_count;
-        unsigned int irq_thermal_count;
-        unsigned int irq_spurious_count;
-} ____cacheline_aligned irq_cpustat_t;
-
-DECLARE_PER_CPU(irq_cpustat_t, irq_stat);
-
-#define __ARCH_IRQ_STAT
-#define __IRQ_STAT(cpu, member) (per_cpu(irq_stat, cpu).member)
-
-#define inc_irq_stat(member)    (__get_cpu_var(irq_stat).member++)
-
-void ack_bad_irq(unsigned int irq);
-#include <linux/irq_cpustat.h>
-
-#endif /* _ASM_X86_HARDIRQ_32_H */
diff --git a/arch/x86/include/asm/hardirq_64.h b/arch/x86/include/asm/hardirq_64.h
deleted file mode 100644
index b5a6b5d56704..000000000000
--- a/arch/x86/include/asm/hardirq_64.h
+++ /dev/null
@@ -1,25 +0,0 @@
-#ifndef _ASM_X86_HARDIRQ_64_H
-#define _ASM_X86_HARDIRQ_64_H
-
-#include <linux/threads.h>
-#include <linux/irq.h>
-#include <asm/pda.h>
-#include <asm/apic.h>
-
-/* We can have at most NR_VECTORS irqs routed to a cpu at a time */
-#define MAX_HARDIRQS_PER_CPU NR_VECTORS
-
-#define __ARCH_IRQ_STAT 1
-
-#define inc_irq_stat(member)    add_pda(member, 1)
-
-#define local_softirq_pending() read_pda(__softirq_pending)
-
-#define __ARCH_SET_SOFTIRQ_PENDING 1
-
-#define set_softirq_pending(x) write_pda(__softirq_pending, (x))
-#define or_softirq_pending(x)  or_pda(__softirq_pending, (x))
-
-extern void ack_bad_irq(unsigned int irq);
-
-#endif /* _ASM_X86_HARDIRQ_64_H */
diff --git a/arch/x86/include/asm/hw_irq.h b/arch/x86/include/asm/hw_irq.h
index 8de644b6b959..370e1c83bb49 100644
--- a/arch/x86/include/asm/hw_irq.h
+++ b/arch/x86/include/asm/hw_irq.h
@@ -25,8 +25,6 @@
 #include <asm/irq.h>
 #include <asm/sections.h>
 
-#define platform_legacy_irq(irq)        ((irq) < 16)
-
 /* Interrupt handlers registered during init_IRQ */
 extern void apic_timer_interrupt(void);
 extern void error_interrupt(void);
@@ -58,7 +56,7 @@ extern void make_8259A_irq(unsigned int irq);
 extern void init_8259A(int aeoi);
 
 /* IOAPIC */
-#define IO_APIC_IRQ(x) (((x) >= 16) || ((1<<(x)) & io_apic_irqs))
+#define IO_APIC_IRQ(x) (((x) >= NR_IRQS_LEGACY) || ((1<<(x)) & io_apic_irqs))
 extern unsigned long io_apic_irqs;
 
 extern void init_VISWS_APIC_irqs(void);
@@ -67,15 +65,7 @@ extern void disable_IO_APIC(void);
 extern int IO_APIC_get_PCI_irq_vector(int bus, int slot, int fn);
 extern void setup_ioapic_dest(void);
 
-#ifdef CONFIG_X86_64
 extern void enable_IO_APIC(void);
-#endif
-
-/* IPI functions */
-#ifdef CONFIG_X86_32
-extern void send_IPI_self(int vector);
-#endif
-extern void send_IPI(int dest, int vector);
 
 /* Statistics */
 extern atomic_t irq_err_count;
@@ -84,21 +74,11 @@ extern atomic_t irq_mis_count;
 /* EISA */
 extern void eisa_set_level_irq(unsigned int irq);
 
-/* Voyager functions */
-extern asmlinkage void vic_cpi_interrupt(void);
-extern asmlinkage void vic_sys_interrupt(void);
-extern asmlinkage void vic_cmn_interrupt(void);
-extern asmlinkage void qic_timer_interrupt(void);
-extern asmlinkage void qic_invalidate_interrupt(void);
-extern asmlinkage void qic_reschedule_interrupt(void);
-extern asmlinkage void qic_enable_irq_interrupt(void);
-extern asmlinkage void qic_call_function_interrupt(void);
-
 /* SMP */
 extern void smp_apic_timer_interrupt(struct pt_regs *);
 extern void smp_spurious_interrupt(struct pt_regs *);
 extern void smp_error_interrupt(struct pt_regs *);
-#ifdef CONFIG_X86_SMP
+#ifdef CONFIG_SMP
 extern void smp_reschedule_interrupt(struct pt_regs *);
 extern void smp_call_function_interrupt(struct pt_regs *);
 extern void smp_call_function_single_interrupt(struct pt_regs *);
diff --git a/arch/x86/include/asm/i8259.h b/arch/x86/include/asm/i8259.h
index 58d7091eeb1f..1a99e6c092af 100644
--- a/arch/x86/include/asm/i8259.h
+++ b/arch/x86/include/asm/i8259.h
@@ -60,4 +60,8 @@ extern struct irq_chip i8259A_chip;
 extern void mask_8259A(void);
 extern void unmask_8259A(void);
 
+#ifdef CONFIG_X86_32
+extern void init_ISA_irqs(void);
+#endif
+
 #endif /* _ASM_X86_I8259_H */
diff --git a/arch/x86/include/asm/ia32.h b/arch/x86/include/asm/ia32.h
index 50ca486fd88c..1f7e62517284 100644
--- a/arch/x86/include/asm/ia32.h
+++ b/arch/x86/include/asm/ia32.h
@@ -129,13 +129,6 @@ typedef struct compat_siginfo {
         } _sifields;
 } compat_siginfo_t;
 
-struct ustat32 {
-        __u32                   f_tfree;
-        compat_ino_t            f_tinode;
-        char                    f_fname[6];
-        char                    f_fpack[6];
-};
-
 #define IA32_STACK_TOP IA32_PAGE_OFFSET
 
 #ifdef __KERNEL__
diff --git a/arch/x86/include/asm/io.h b/arch/x86/include/asm/io.h
index 1dbbdf4be9b4..e5383e3d2f8c 100644
--- a/arch/x86/include/asm/io.h
+++ b/arch/x86/include/asm/io.h
@@ -5,6 +5,7 @@
 
 #include <linux/compiler.h>
 #include <asm-generic/int-ll64.h>
+#include <asm/page.h>
 
 #define build_mmio_read(name, size, type, reg, barrier) \
 static inline type name(const volatile void __iomem *addr) \
@@ -80,6 +81,98 @@ static inline void writeq(__u64 val, volatile void __iomem *addr)
 #define readq                   readq
 #define writeq                  writeq
 
+/**
+ *      virt_to_phys    -       map virtual addresses to physical
+ *      @address: address to remap
+ *
+ *      The returned physical address is the physical (CPU) mapping for
+ *      the memory address given. It is only valid to use this function on
+ *      addresses directly mapped or allocated via kmalloc.
+ *
+ *      This function does not give bus mappings for DMA transfers. In
+ *      almost all conceivable cases a device driver should not be using
+ *      this function
+ */
+
+static inline phys_addr_t virt_to_phys(volatile void *address)
+{
+        return __pa(address);
+}
+
+/**
+ *      phys_to_virt    -       map physical address to virtual
+ *      @address: address to remap
+ *
+ *      The returned virtual address is a current CPU mapping for
+ *      the memory address given. It is only valid to use this function on
+ *      addresses that have a kernel mapping
+ *
+ *      This function does not handle bus mappings for DMA transfers. In
+ *      almost all conceivable cases a device driver should not be using
+ *      this function
+ */
+
+static inline void *phys_to_virt(phys_addr_t address)
+{
+        return __va(address);
+}
+
+/*
+ * Change "struct page" to physical address.
+ */
+#define page_to_phys(page)    ((dma_addr_t)page_to_pfn(page) << PAGE_SHIFT)
+
+/*
+ * ISA I/O bus memory addresses are 1:1 with the physical address.
+ * However, we truncate the address to unsigned int to avoid undesirable
+ * promitions in legacy drivers.
+ */
+static inline unsigned int isa_virt_to_bus(volatile void *address)
+{
+        return (unsigned int)virt_to_phys(address);
+}
+#define isa_page_to_bus(page)   ((unsigned int)page_to_phys(page))
+#define isa_bus_to_virt         phys_to_virt
+
+/*
+ * However PCI ones are not necessarily 1:1 and therefore these interfaces
+ * are forbidden in portable PCI drivers.
+ *
+ * Allow them on x86 for legacy drivers, though.
+ */
+#define virt_to_bus virt_to_phys
+#define bus_to_virt phys_to_virt
+
+/**
+ * ioremap     -   map bus memory into CPU space
+ * @offset:    bus address of the memory
+ * @size:      size of the resource to map
+ *
+ * ioremap performs a platform specific sequence of operations to
+ * make bus memory CPU accessible via the readb/readw/readl/writeb/
+ * writew/writel functions and the other mmio helpers. The returned
+ * address is not guaranteed to be usable directly as a virtual
+ * address.
+ *
+ * If the area you are trying to map is a PCI BAR you should have a
+ * look at pci_iomap().
+ */
+extern void __iomem *ioremap_nocache(resource_size_t offset, unsigned long size);
+extern void __iomem *ioremap_cache(resource_size_t offset, unsigned long size);
+extern void __iomem *ioremap_prot(resource_size_t offset, unsigned long size,
+                                unsigned long prot_val);
+
+/*
+ * The default ioremap() behavior is non-cached:
+ */
+static inline void __iomem *ioremap(resource_size_t offset, unsigned long size)
+{
+        return ioremap_nocache(offset, size);
+}
+
+extern void iounmap(volatile void __iomem *addr);
+
+
 #ifdef CONFIG_X86_32
 # include "io_32.h"
 #else
@@ -91,7 +184,7 @@ extern void unxlate_dev_mem_ptr(unsigned long phys, void *addr);
 
 extern int ioremap_change_attr(unsigned long vaddr, unsigned long size,
                                 unsigned long prot_val);
-extern void __iomem *ioremap_wc(unsigned long offset, unsigned long size);
+extern void __iomem *ioremap_wc(resource_size_t offset, unsigned long size);
 
 /*
  * early_ioremap() and early_iounmap() are for temporary early boot-time
@@ -103,7 +196,7 @@ extern void early_ioremap_reset(void);
 extern void __iomem *early_ioremap(unsigned long offset, unsigned long size);
 extern void __iomem *early_memremap(unsigned long offset, unsigned long size);
 extern void early_iounmap(void __iomem *addr, unsigned long size);
-extern void __iomem *fix_ioremap(unsigned idx, unsigned long phys);
 
+#define IO_SPACE_LIMIT 0xffff
 
 #endif /* _ASM_X86_IO_H */
diff --git a/arch/x86/include/asm/io_32.h b/arch/x86/include/asm/io_32.h
index d8e242e1b396..a299900f5920 100644
--- a/arch/x86/include/asm/io_32.h
+++ b/arch/x86/include/asm/io_32.h
@@ -37,8 +37,6 @@
   *  - Arnaldo Carvalho de Melo <acme@conectiva.com.br>
   */
 
-#define IO_SPACE_LIMIT 0xffff
-
 #define XQUAD_PORTIO_BASE 0xfe400000
 #define XQUAD_PORTIO_QUAD 0x40000  /* 256k per quad. */
 
@@ -53,92 +51,6 @@
  */
 #define xlate_dev_kmem_ptr(p)   p
 
-/**
- *      virt_to_phys    -       map virtual addresses to physical
- *      @address: address to remap
- *
- *      The returned physical address is the physical (CPU) mapping for
- *      the memory address given. It is only valid to use this function on
- *      addresses directly mapped or allocated via kmalloc.
- *
- *      This function does not give bus mappings for DMA transfers. In
- *      almost all conceivable cases a device driver should not be using
- *      this function
- */
-
-static inline unsigned long virt_to_phys(volatile void *address)
-{
-        return __pa(address);
-}
-
-/**
- *      phys_to_virt    -       map physical address to virtual
- *      @address: address to remap
- *
- *      The returned virtual address is a current CPU mapping for
- *      the memory address given. It is only valid to use this function on
- *      addresses that have a kernel mapping
- *
- *      This function does not handle bus mappings for DMA transfers. In
- *      almost all conceivable cases a device driver should not be using
- *      this function
- */
-
-static inline void *phys_to_virt(unsigned long address)
-{
-        return __va(address);
-}
-
-/*
- * Change "struct page" to physical address.
- */
-#define page_to_phys(page)    ((dma_addr_t)page_to_pfn(page) << PAGE_SHIFT)
-
-/**
- * ioremap     -   map bus memory into CPU space
- * @offset:    bus address of the memory
- * @size:      size of the resource to map
- *
- * ioremap performs a platform specific sequence of operations to
- * make bus memory CPU accessible via the readb/readw/readl/writeb/
- * writew/writel functions and the other mmio helpers. The returned
- * address is not guaranteed to be usable directly as a virtual
- * address.
- *
- * If the area you are trying to map is a PCI BAR you should have a
- * look at pci_iomap().
- */
-extern void __iomem *ioremap_nocache(resource_size_t offset, unsigned long size);
-extern void __iomem *ioremap_cache(resource_size_t offset, unsigned long size);
-extern void __iomem *ioremap_prot(resource_size_t offset, unsigned long size,
-                                unsigned long prot_val);
-
-/*
- * The default ioremap() behavior is non-cached:
- */
-static inline void __iomem *ioremap(resource_size_t offset, unsigned long size)
-{
-        return ioremap_nocache(offset, size);
-}
-
-extern void iounmap(volatile void __iomem *addr);
-
-/*
- * ISA I/O bus memory addresses are 1:1 with the physical address.
- */
-#define isa_virt_to_bus virt_to_phys
-#define isa_page_to_bus page_to_phys
-#define isa_bus_to_virt phys_to_virt
-
-/*
- * However PCI ones are not necessarily 1:1 and therefore these interfaces
- * are forbidden in portable PCI drivers.
- *
- * Allow them on x86 for legacy drivers, though.
- */
-#define virt_to_bus virt_to_phys
-#define bus_to_virt phys_to_virt
-
 static inline void
 memset_io(volatile void __iomem *addr, unsigned char val, int count)
 {
diff --git a/arch/x86/include/asm/io_64.h b/arch/x86/include/asm/io_64.h
index 563c16270ba6..244067893af4 100644
--- a/arch/x86/include/asm/io_64.h
+++ b/arch/x86/include/asm/io_64.h
@@ -136,73 +136,12 @@ __OUTS(b)
 __OUTS(w)
 __OUTS(l)
 
-#define IO_SPACE_LIMIT 0xffff
-
 #if defined(__KERNEL__) && defined(__x86_64__)
 
 #include <linux/vmalloc.h>
 
-#ifndef __i386__
-/*
- * Change virtual addresses to physical addresses and vv.
- * These are pretty trivial
- */
-static inline unsigned long virt_to_phys(volatile void *address)
-{
-        return __pa(address);
-}
-
-static inline void *phys_to_virt(unsigned long address)
-{
-        return __va(address);
-}
-#endif
-
-/*
- * Change "struct page" to physical address.
- */
-#define page_to_phys(page)    ((dma_addr_t)page_to_pfn(page) << PAGE_SHIFT)
-
 #include <asm-generic/iomap.h>
 
-/*
- * This one maps high address device memory and turns off caching for that area.
- * it's useful if some control registers are in such an area and write combining
- * or read caching is not desirable:
- */
-extern void __iomem *ioremap_nocache(resource_size_t offset, unsigned long size);
-extern void __iomem *ioremap_cache(resource_size_t offset, unsigned long size);
-extern void __iomem *ioremap_prot(resource_size_t offset, unsigned long size,
-                                unsigned long prot_val);
-
-/*
- * The default ioremap() behavior is non-cached:
- */
-static inline void __iomem *ioremap(resource_size_t offset, unsigned long size)
-{
-        return ioremap_nocache(offset, size);
-}
-
-extern void iounmap(volatile void __iomem *addr);
-
-extern void __iomem *fix_ioremap(unsigned idx, unsigned long phys);
-
-/*
- * ISA I/O bus memory addresses are 1:1 with the physical address.
- */
-#define isa_virt_to_bus virt_to_phys
-#define isa_page_to_bus page_to_phys
-#define isa_bus_to_virt phys_to_virt
-
-/*
- * However PCI ones are not necessarily 1:1 and therefore these interfaces
- * are forbidden in portable PCI drivers.
- *
- * Allow them on x86 for legacy drivers, though.
- */
-#define virt_to_bus virt_to_phys
-#define bus_to_virt phys_to_virt
-
 void __memcpy_fromio(void *, unsigned long, unsigned);
 void __memcpy_toio(unsigned long, const void *, unsigned);
 
diff --git a/arch/x86/include/asm/io_apic.h b/arch/x86/include/asm/io_apic.h
index 7a1f44ac1f17..59cb4a1317b7 100644
--- a/arch/x86/include/asm/io_apic.h
+++ b/arch/x86/include/asm/io_apic.h
@@ -114,38 +114,16 @@ struct IR_IO_APIC_route_entry {
 extern int nr_ioapics;
 extern int nr_ioapic_registers[MAX_IO_APICS];
 
-/*
- * MP-BIOS irq configuration table structures:
- */
-
 #define MP_MAX_IOAPIC_PIN 127
 
-struct mp_config_ioapic {
-        unsigned long mp_apicaddr;
-        unsigned int mp_apicid;
-        unsigned char mp_type;
-        unsigned char mp_apicver;
-        unsigned char mp_flags;
-};
-
-struct mp_config_intsrc {
-        unsigned int mp_dstapic;
-        unsigned char mp_type;
-        unsigned char mp_irqtype;
-        unsigned short mp_irqflag;
-        unsigned char mp_srcbus;
-        unsigned char mp_srcbusirq;
-        unsigned char mp_dstirq;
-};
-
 /* I/O APIC entries */
-extern struct mp_config_ioapic mp_ioapics[MAX_IO_APICS];
+extern struct mpc_ioapic mp_ioapics[MAX_IO_APICS];
 
 /* # of MP IRQ source entries */
 extern int mp_irq_entries;
 
 /* MP IRQ source entries */
-extern struct mp_config_intsrc mp_irqs[MAX_IRQ_SOURCES];
+extern struct mpc_intsrc mp_irqs[MAX_IRQ_SOURCES];
 
 /* non-0 if default (table-less) MP configuration */
 extern int mpc_default_type;
@@ -165,15 +143,6 @@ extern int noioapicreroute;
 /* 1 if the timer IRQ uses the '8259A Virtual Wire' mode */
 extern int timer_through_8259;
 
-static inline void disable_ioapic_setup(void)
-{
-#ifdef CONFIG_PCI
-        noioapicquirk = 1;
-        noioapicreroute = -1;
-#endif
-        skip_ioapic_setup = 1;
-}
-
 /*
  * If we use the IO-APIC for IRQ routing, disable automatic
  * assignment of PCI IRQ's.
@@ -200,6 +169,12 @@ extern void reinit_intr_remapped_IO_APIC(int);
 
 extern void probe_nr_irqs_gsi(void);
 
+extern int setup_ioapic_entry(int apic, int irq,
+                              struct IO_APIC_route_entry *entry,
+                              unsigned int destination, int trigger,
+                              int polarity, int vector);
+extern void ioapic_write_entry(int apic, int pin,
+                               struct IO_APIC_route_entry e);
 #else  /* !CONFIG_X86_IO_APIC */
 #define io_apic_assign_pci_irqs 0
 static const int timer_through_8259 = 0;
diff --git a/arch/x86/include/asm/ipi.h b/arch/x86/include/asm/ipi.h
index c745a306f7d3..0b7228268a63 100644
--- a/arch/x86/include/asm/ipi.h
+++ b/arch/x86/include/asm/ipi.h
@@ -1,6 +1,8 @@
 #ifndef _ASM_X86_IPI_H
 #define _ASM_X86_IPI_H
 
+#ifdef CONFIG_X86_LOCAL_APIC
+
 /*
  * Copyright 2004 James Cleverdon, IBM.
  * Subject to the GNU Public License, v.2
@@ -55,8 +57,8 @@ static inline void __xapic_wait_icr_idle(void)
                 cpu_relax();
 }
 
-static inline void __send_IPI_shortcut(unsigned int shortcut, int vector,
-                                       unsigned int dest)
+static inline void
+__default_send_IPI_shortcut(unsigned int shortcut, int vector, unsigned int dest)
 {
         /*
          * Subtle. In the case of the 'never do double writes' workaround
@@ -87,8 +89,8 @@ static inline void __send_IPI_shortcut(unsigned int shortcut, int vector,
  * This is used to send an IPI with no shorthand notation (the destination is
  * specified in bits 56 to 63 of the ICR).
  */
-static inline void __send_IPI_dest_field(unsigned int mask, int vector,
-                                         unsigned int dest)
+static inline void
+ __default_send_IPI_dest_field(unsigned int mask, int vector, unsigned int dest)
 {
         unsigned long cfg;
 
@@ -117,41 +119,44 @@ static inline void __send_IPI_dest_field(unsigned int mask, int vector,
         native_apic_mem_write(APIC_ICR, cfg);
 }
 
-static inline void send_IPI_mask_sequence(const struct cpumask *mask,
-                                          int vector)
-{
-        unsigned long flags;
-        unsigned long query_cpu;
+extern void default_send_IPI_mask_sequence_phys(const struct cpumask *mask,
+                                                 int vector);
+extern void default_send_IPI_mask_allbutself_phys(const struct cpumask *mask,
+                                                         int vector);
+extern void default_send_IPI_mask_sequence_logical(const struct cpumask *mask,
+                                                         int vector);
+extern void default_send_IPI_mask_allbutself_logical(const struct cpumask *mask,
+                                                         int vector);
 
-        /*
-         * Hack. The clustered APIC addressing mode doesn't allow us to send
-         * to an arbitrary mask, so I do a unicast to each CPU instead.
-         * - mbligh
-         */
-        local_irq_save(flags);
-        for_each_cpu(query_cpu, mask) {
-                __send_IPI_dest_field(per_cpu(x86_cpu_to_apicid, query_cpu),
-                                      vector, APIC_DEST_PHYSICAL);
-        }
-        local_irq_restore(flags);
+/* Avoid include hell */
+#define NMI_VECTOR 0x02
+
+extern int no_broadcast;
+
+static inline void __default_local_send_IPI_allbutself(int vector)
+{
+        if (no_broadcast || vector == NMI_VECTOR)
+                apic->send_IPI_mask_allbutself(cpu_online_mask, vector);
+        else
+                __default_send_IPI_shortcut(APIC_DEST_ALLBUT, vector, apic->dest_logical);
 }
 
-static inline void send_IPI_mask_allbutself(const struct cpumask *mask,
-                                            int vector)
+static inline void __default_local_send_IPI_all(int vector)
 {
-        unsigned long flags;
-        unsigned int query_cpu;
-        unsigned int this_cpu = smp_processor_id();
-
-        /* See Hack comment above */
-
-        local_irq_save(flags);
-        for_each_cpu(query_cpu, mask)
-                if (query_cpu != this_cpu)
-                        __send_IPI_dest_field(
-                                per_cpu(x86_cpu_to_apicid, query_cpu),
-                                vector, APIC_DEST_PHYSICAL);
-        local_irq_restore(flags);
+        if (no_broadcast || vector == NMI_VECTOR)
+                apic->send_IPI_mask(cpu_online_mask, vector);
+        else
+                __default_send_IPI_shortcut(APIC_DEST_ALLINC, vector, apic->dest_logical);
 }
 
+#ifdef CONFIG_X86_32
+extern void default_send_IPI_mask_logical(const struct cpumask *mask,
+                                                 int vector);
+extern void default_send_IPI_allbutself(int vector);
+extern void default_send_IPI_all(int vector);
+extern void default_send_IPI_self(int vector);
+#endif
+
+#endif
+
 #endif /* _ASM_X86_IPI_H */
diff --git a/arch/x86/include/asm/irq.h b/arch/x86/include/asm/irq.h
index 592688ed04d3..107eb2196691 100644
--- a/arch/x86/include/asm/irq.h
+++ b/arch/x86/include/asm/irq.h
@@ -36,9 +36,11 @@ static inline int irq_canonicalize(int irq)
 extern void fixup_irqs(void);
 #endif
 
-extern unsigned int do_IRQ(struct pt_regs *regs);
 extern void init_IRQ(void);
 extern void native_init_IRQ(void);
+extern bool handle_irq(unsigned irq, struct pt_regs *regs);
+
+extern unsigned int do_IRQ(struct pt_regs *regs);
 
 /* Interrupt vector management */
 extern DECLARE_BITMAP(used_vectors, NR_VECTORS);
diff --git a/arch/x86/include/asm/irq_regs.h b/arch/x86/include/asm/irq_regs.h
index 89c898ab298b..77843225b7ea 100644
--- a/arch/x86/include/asm/irq_regs.h
+++ b/arch/x86/include/asm/irq_regs.h
@@ -1,5 +1,31 @@
-#ifdef CONFIG_X86_32
-# include "irq_regs_32.h"
-#else
-# include "irq_regs_64.h"
-#endif
+/*
+ * Per-cpu current frame pointer - the location of the last exception frame on
+ * the stack, stored in the per-cpu area.
+ *
+ * Jeremy Fitzhardinge <jeremy@goop.org>
+ */
+#ifndef _ASM_X86_IRQ_REGS_H
+#define _ASM_X86_IRQ_REGS_H
+
+#include <asm/percpu.h>
+
+#define ARCH_HAS_OWN_IRQ_REGS
+
+DECLARE_PER_CPU(struct pt_regs *, irq_regs);
+
+static inline struct pt_regs *get_irq_regs(void)
+{
+        return percpu_read(irq_regs);
+}
+
+static inline struct pt_regs *set_irq_regs(struct pt_regs *new_regs)
+{
+        struct pt_regs *old_regs;
+
+        old_regs = get_irq_regs();
+        percpu_write(irq_regs, new_regs);
+
+        return old_regs;
+}
+
+#endif /* _ASM_X86_IRQ_REGS_32_H */
diff --git a/arch/x86/include/asm/irq_regs_32.h b/arch/x86/include/asm/irq_regs_32.h
deleted file mode 100644
index 86afd7473457..000000000000
--- a/arch/x86/include/asm/irq_regs_32.h
+++ /dev/null
@@ -1,31 +0,0 @@
-/*
- * Per-cpu current frame pointer - the location of the last exception frame on
- * the stack, stored in the per-cpu area.
- *
- * Jeremy Fitzhardinge <jeremy@goop.org>
- */
-#ifndef _ASM_X86_IRQ_REGS_32_H
-#define _ASM_X86_IRQ_REGS_32_H
-
-#include <asm/percpu.h>
-
-#define ARCH_HAS_OWN_IRQ_REGS
-
-DECLARE_PER_CPU(struct pt_regs *, irq_regs);
-
-static inline struct pt_regs *get_irq_regs(void)
-{
-        return x86_read_percpu(irq_regs);
-}
-
-static inline struct pt_regs *set_irq_regs(struct pt_regs *new_regs)
-{
-        struct pt_regs *old_regs;
-
-        old_regs = get_irq_regs();
-        x86_write_percpu(irq_regs, new_regs);
-
-        return old_regs;
-}
-
-#endif /* _ASM_X86_IRQ_REGS_32_H */
diff --git a/arch/x86/include/asm/irq_regs_64.h b/arch/x86/include/asm/irq_regs_64.h
deleted file mode 100644
index 3dd9c0b70270..000000000000
--- a/arch/x86/include/asm/irq_regs_64.h
+++ /dev/null
@@ -1 +0,0 @@
-#include <asm-generic/irq_regs.h>
diff --git a/arch/x86/include/asm/irq_vectors.h b/arch/x86/include/asm/irq_vectors.h
index f7ff65032b9d..8a285f356f8a 100644
--- a/arch/x86/include/asm/irq_vectors.h
+++ b/arch/x86/include/asm/irq_vectors.h
@@ -1,47 +1,69 @@
 #ifndef _ASM_X86_IRQ_VECTORS_H
 #define _ASM_X86_IRQ_VECTORS_H
 
-#include <linux/threads.h>
+/*
+ * Linux IRQ vector layout.
+ *
+ * There are 256 IDT entries (per CPU - each entry is 8 bytes) which can
+ * be defined by Linux. They are used as a jump table by the CPU when a
+ * given vector is triggered - by a CPU-external, CPU-internal or
+ * software-triggered event.
+ *
+ * Linux sets the kernel code address each entry jumps to early during
+ * bootup, and never changes them. This is the general layout of the
+ * IDT entries:
+ *
+ *  Vectors   0 ...  31 : system traps and exceptions - hardcoded events
+ *  Vectors  32 ... 127 : device interrupts
+ *  Vector  128         : legacy int80 syscall interface
+ *  Vectors 129 ... 237 : device interrupts
+ *  Vectors 238 ... 255 : special interrupts
+ *
+ * 64-bit x86 has per CPU IDT tables, 32-bit has one shared IDT table.
+ *
+ * This file enumerates the exact layout of them:
+ */
 
-#define NMI_VECTOR              0x02
+#define NMI_VECTOR                      0x02
 
 /*
  * IDT vectors usable for external interrupt sources start
  * at 0x20:
  */
-#define FIRST_EXTERNAL_VECTOR   0x20
+#define FIRST_EXTERNAL_VECTOR           0x20
 
 #ifdef CONFIG_X86_32
-# define SYSCALL_VECTOR         0x80
+# define SYSCALL_VECTOR                 0x80
 #else
-# define IA32_SYSCALL_VECTOR    0x80
+# define IA32_SYSCALL_VECTOR            0x80
 #endif
 
 /*
  * Reserve the lowest usable priority level 0x20 - 0x2f for triggering
  * cleanup after irq migration.
  */
-#define IRQ_MOVE_CLEANUP_VECTOR FIRST_EXTERNAL_VECTOR
+#define IRQ_MOVE_CLEANUP_VECTOR         FIRST_EXTERNAL_VECTOR
 
 /*
  * Vectors 0x30-0x3f are used for ISA interrupts.
  */
-#define IRQ0_VECTOR             (FIRST_EXTERNAL_VECTOR + 0x10)
-#define IRQ1_VECTOR             (IRQ0_VECTOR + 1)
-#define IRQ2_VECTOR             (IRQ0_VECTOR + 2)
-#define IRQ3_VECTOR             (IRQ0_VECTOR + 3)
-#define IRQ4_VECTOR             (IRQ0_VECTOR + 4)
-#define IRQ5_VECTOR             (IRQ0_VECTOR + 5)
-#define IRQ6_VECTOR             (IRQ0_VECTOR + 6)
-#define IRQ7_VECTOR             (IRQ0_VECTOR + 7)
-#define IRQ8_VECTOR             (IRQ0_VECTOR + 8)
-#define IRQ9_VECTOR             (IRQ0_VECTOR + 9)
-#define IRQ10_VECTOR            (IRQ0_VECTOR + 10)
-#define IRQ11_VECTOR            (IRQ0_VECTOR + 11)
-#define IRQ12_VECTOR            (IRQ0_VECTOR + 12)
-#define IRQ13_VECTOR            (IRQ0_VECTOR + 13)
-#define IRQ14_VECTOR            (IRQ0_VECTOR + 14)
-#define IRQ15_VECTOR            (IRQ0_VECTOR + 15)
+#define IRQ0_VECTOR                     (FIRST_EXTERNAL_VECTOR + 0x10)
+
+#define IRQ1_VECTOR                     (IRQ0_VECTOR +  1)
+#define IRQ2_VECTOR                     (IRQ0_VECTOR +  2)
+#define IRQ3_VECTOR                     (IRQ0_VECTOR +  3)
+#define IRQ4_VECTOR                     (IRQ0_VECTOR +  4)
+#define IRQ5_VECTOR                     (IRQ0_VECTOR +  5)
+#define IRQ6_VECTOR                     (IRQ0_VECTOR +  6)
+#define IRQ7_VECTOR                     (IRQ0_VECTOR +  7)
+#define IRQ8_VECTOR                     (IRQ0_VECTOR +  8)
+#define IRQ9_VECTOR                     (IRQ0_VECTOR +  9)
+#define IRQ10_VECTOR                    (IRQ0_VECTOR + 10)
+#define IRQ11_VECTOR                    (IRQ0_VECTOR + 11)
+#define IRQ12_VECTOR                    (IRQ0_VECTOR + 12)
+#define IRQ13_VECTOR                    (IRQ0_VECTOR + 13)
+#define IRQ14_VECTOR                    (IRQ0_VECTOR + 14)
+#define IRQ15_VECTOR                    (IRQ0_VECTOR + 15)
 
 /*
  * Special IRQ vectors used by the SMP architecture, 0xf0-0xff
@@ -49,119 +71,98 @@
  *  some of the following vectors are 'rare', they are merged
  *  into a single vector (CALL_FUNCTION_VECTOR) to save vector space.
  *  TLB, reschedule and local APIC vectors are performance-critical.
- *
- *  Vectors 0xf0-0xfa are free (reserved for future Linux use).
  */
-#ifdef CONFIG_X86_32
-
-# define SPURIOUS_APIC_VECTOR           0xff
-# define ERROR_APIC_VECTOR              0xfe
-# define INVALIDATE_TLB_VECTOR          0xfd
-# define RESCHEDULE_VECTOR              0xfc
-# define CALL_FUNCTION_VECTOR           0xfb
-# define CALL_FUNCTION_SINGLE_VECTOR    0xfa
-# define THERMAL_APIC_VECTOR            0xf0
-
-#else
 
 #define SPURIOUS_APIC_VECTOR            0xff
+/*
+ * Sanity check
+ */
+#if ((SPURIOUS_APIC_VECTOR & 0x0F) != 0x0F)
+# error SPURIOUS_APIC_VECTOR definition error
+#endif
+
 #define ERROR_APIC_VECTOR               0xfe
 #define RESCHEDULE_VECTOR               0xfd
 #define CALL_FUNCTION_VECTOR            0xfc
 #define CALL_FUNCTION_SINGLE_VECTOR     0xfb
 #define THERMAL_APIC_VECTOR             0xfa
-#define THRESHOLD_APIC_VECTOR           0xf9
-#define UV_BAU_MESSAGE                  0xf8
-#define INVALIDATE_TLB_VECTOR_END       0xf7
-#define INVALIDATE_TLB_VECTOR_START     0xf0    /* f0-f7 used for TLB flush */
-
-#define NUM_INVALIDATE_TLB_VECTORS      8
 
+#ifdef CONFIG_X86_32
+/* 0xf8 - 0xf9 : free */
+#else
+# define THRESHOLD_APIC_VECTOR          0xf9
+# define UV_BAU_MESSAGE                 0xf8
 #endif
 
+/* f0-f7 used for spreading out TLB flushes: */
+#define INVALIDATE_TLB_VECTOR_END       0xf7
+#define INVALIDATE_TLB_VECTOR_START     0xf0
+#define NUM_INVALIDATE_TLB_VECTORS         8
+
 /*
  * Local APIC timer IRQ vector is on a different priority level,
  * to work around the 'lost local interrupt if more than 2 IRQ
  * sources per level' errata.
  */
-#define LOCAL_TIMER_VECTOR      0xef
+#define LOCAL_TIMER_VECTOR              0xef
+
+/*
+ * Performance monitoring interrupt vector:
+ */
+#define LOCAL_PERF_VECTOR               0xee
 
 /*
  * First APIC vector available to drivers: (vectors 0x30-0xee) we
  * start at 0x31(0x41) to spread out vectors evenly between priority
  * levels. (0x80 is the syscall vector)
  */
-#define FIRST_DEVICE_VECTOR     (IRQ15_VECTOR + 2)
-
-#define NR_VECTORS              256
+#define FIRST_DEVICE_VECTOR             (IRQ15_VECTOR + 2)
 
-#define FPU_IRQ                 13
+#define NR_VECTORS                       256
 
-#define FIRST_VM86_IRQ          3
-#define LAST_VM86_IRQ           15
-#define invalid_vm86_irq(irq)   ((irq) < 3 || (irq) > 15)
+#define FPU_IRQ                           13
 
-#define NR_IRQS_LEGACY          16
+#define FIRST_VM86_IRQ                     3
+#define LAST_VM86_IRQ                     15
 
-#if defined(CONFIG_X86_IO_APIC) && !defined(CONFIG_X86_VOYAGER)
-
-#ifndef CONFIG_SPARSE_IRQ
-# if NR_CPUS < MAX_IO_APICS
-#  define NR_IRQS (NR_VECTORS + (32 * NR_CPUS))
-# else
-#  define NR_IRQS (NR_VECTORS + (32 * MAX_IO_APICS))
-# endif
-#else
-# if (8 * NR_CPUS) > (32 * MAX_IO_APICS)
-#  define NR_IRQS (NR_VECTORS + (8 * NR_CPUS))
-# else
-#  define NR_IRQS (NR_VECTORS + (32 * MAX_IO_APICS))
-# endif
+#ifndef __ASSEMBLY__
+static inline int invalid_vm86_irq(int irq)
+{
+        return irq < FIRST_VM86_IRQ || irq > LAST_VM86_IRQ;
+}
 #endif
 
-#elif defined(CONFIG_X86_VOYAGER)
-
-# define NR_IRQS                224
+/*
+ * Size the maximum number of interrupts.
+ *
+ * If the irq_desc[] array has a sparse layout, we can size things
+ * generously - it scales up linearly with the maximum number of CPUs,
+ * and the maximum number of IO-APICs, whichever is higher.
+ *
+ * In other cases we size more conservatively, to not create too large
+ * static arrays.
+ */
 
-#else /* IO_APIC || VOYAGER */
+#define NR_IRQS_LEGACY                    16
 
-# define NR_IRQS                16
+#define CPU_VECTOR_LIMIT                (  8 * NR_CPUS      )
+#define IO_APIC_VECTOR_LIMIT            ( 32 * MAX_IO_APICS )
 
+#ifdef CONFIG_X86_IO_APIC
+# ifdef CONFIG_SPARSE_IRQ
+#  define NR_IRQS                                       \
+        (CPU_VECTOR_LIMIT > IO_APIC_VECTOR_LIMIT ?      \
+                (NR_VECTORS + CPU_VECTOR_LIMIT)  :      \
+                (NR_VECTORS + IO_APIC_VECTOR_LIMIT))
+# else
+#  if NR_CPUS < MAX_IO_APICS
+#   define NR_IRQS                      (NR_VECTORS + 4*CPU_VECTOR_LIMIT)
+#  else
+#   define NR_IRQS                      (NR_VECTORS + IO_APIC_VECTOR_LIMIT)
+#  endif
+# endif
+#else /* !CONFIG_X86_IO_APIC: */
+# define NR_IRQS                        NR_IRQS_LEGACY
 #endif
 
-/* Voyager specific defines */
-/* These define the CPIs we use in linux */
-#define VIC_CPI_LEVEL0                  0
-#define VIC_CPI_LEVEL1                  1
-/* now the fake CPIs */
-#define VIC_TIMER_CPI                   2
-#define VIC_INVALIDATE_CPI              3
-#define VIC_RESCHEDULE_CPI              4
-#define VIC_ENABLE_IRQ_CPI              5
-#define VIC_CALL_FUNCTION_CPI           6
-#define VIC_CALL_FUNCTION_SINGLE_CPI    7
-
-/* Now the QIC CPIs:  Since we don't need the two initial levels,
- * these are 2 less than the VIC CPIs */
-#define QIC_CPI_OFFSET                  1
-#define QIC_TIMER_CPI                   (VIC_TIMER_CPI - QIC_CPI_OFFSET)
-#define QIC_INVALIDATE_CPI              (VIC_INVALIDATE_CPI - QIC_CPI_OFFSET)
-#define QIC_RESCHEDULE_CPI              (VIC_RESCHEDULE_CPI - QIC_CPI_OFFSET)
-#define QIC_ENABLE_IRQ_CPI              (VIC_ENABLE_IRQ_CPI - QIC_CPI_OFFSET)
-#define QIC_CALL_FUNCTION_CPI           (VIC_CALL_FUNCTION_CPI - QIC_CPI_OFFSET)
-#define QIC_CALL_FUNCTION_SINGLE_CPI    (VIC_CALL_FUNCTION_SINGLE_CPI - QIC_CPI_OFFSET)
-
-#define VIC_START_FAKE_CPI              VIC_TIMER_CPI
-#define VIC_END_FAKE_CPI                VIC_CALL_FUNCTION_SINGLE_CPI
-
-/* this is the SYS_INT CPI. */
-#define VIC_SYS_INT                     8
-#define VIC_CMN_INT                     15
-
-/* This is the boot CPI for alternate processors.  It gets overwritten
- * by the above once the system has activated all available processors */
-#define VIC_CPU_BOOT_CPI                VIC_CPI_LEVEL0
-#define VIC_CPU_BOOT_ERRATA_CPI         (VIC_CPI_LEVEL0 + 8)
-
-
 #endif /* _ASM_X86_IRQ_VECTORS_H */
diff --git a/arch/x86/include/asm/kexec.h b/arch/x86/include/asm/kexec.h
index c61d8b2ab8b9..0ceb6d19ed30 100644
--- a/arch/x86/include/asm/kexec.h
+++ b/arch/x86/include/asm/kexec.h
@@ -9,23 +9,8 @@
 # define PAGES_NR               4
 #else
 # define PA_CONTROL_PAGE        0
-# define VA_CONTROL_PAGE        1
-# define PA_PGD                 2
-# define VA_PGD                 3
-# define PA_PUD_0               4
-# define VA_PUD_0               5
-# define PA_PMD_0               6
-# define VA_PMD_0               7
-# define PA_PTE_0               8
-# define VA_PTE_0               9
-# define PA_PUD_1               10
-# define VA_PUD_1               11
-# define PA_PMD_1               12
-# define VA_PMD_1               13
-# define PA_PTE_1               14
-# define VA_PTE_1               15
-# define PA_TABLE_PAGE          16
-# define PAGES_NR               17
+# define PA_TABLE_PAGE          1
+# define PAGES_NR               2
 #endif
 
 #ifdef CONFIG_X86_32
@@ -157,9 +142,9 @@ relocate_kernel(unsigned long indirection_page,
                 unsigned long start_address) ATTRIB_NORET;
 #endif
 
-#ifdef CONFIG_X86_32
 #define ARCH_HAS_KIMAGE_ARCH
 
+#ifdef CONFIG_X86_32
 struct kimage_arch {
         pgd_t *pgd;
 #ifdef CONFIG_X86_PAE
@@ -169,6 +154,12 @@ struct kimage_arch {
         pte_t *pte0;
         pte_t *pte1;
 };
+#else
+struct kimage_arch {
+        pud_t *pud;
+        pmd_t *pmd;
+        pte_t *pte;
+};
 #endif
 
 #endif /* __ASSEMBLY__ */
diff --git a/arch/x86/include/asm/kvm.h b/arch/x86/include/asm/kvm.h
index 886c9402ec45..dc3f6cf11704 100644
--- a/arch/x86/include/asm/kvm.h
+++ b/arch/x86/include/asm/kvm.h
@@ -15,6 +15,7 @@
 #define __KVM_HAVE_DEVICE_ASSIGNMENT
 #define __KVM_HAVE_MSI
 #define __KVM_HAVE_USER_NMI
+#define __KVM_HAVE_GUEST_DEBUG
 
 /* Architectural interrupt line count. */
 #define KVM_NR_INTERRUPTS 256
@@ -212,7 +213,30 @@ struct kvm_pit_channel_state {
         __s64 count_load_time;
 };
 
+struct kvm_debug_exit_arch {
+        __u32 exception;
+        __u32 pad;
+        __u64 pc;
+        __u64 dr6;
+        __u64 dr7;
+};
+
+#define KVM_GUESTDBG_USE_SW_BP          0x00010000
+#define KVM_GUESTDBG_USE_HW_BP          0x00020000
+#define KVM_GUESTDBG_INJECT_DB          0x00040000
+#define KVM_GUESTDBG_INJECT_BP          0x00080000
+
+/* for KVM_SET_GUEST_DEBUG */
+struct kvm_guest_debug_arch {
+        __u64 debugreg[8];
+};
+
 struct kvm_pit_state {
         struct kvm_pit_channel_state channels[3];
 };
+
+struct kvm_reinject_control {
+        __u8 pit_reinject;
+        __u8 reserved[31];
+};
 #endif /* _ASM_X86_KVM_H */
diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h
index 730843d1d2fb..f0faf58044ff 100644
--- a/arch/x86/include/asm/kvm_host.h
+++ b/arch/x86/include/asm/kvm_host.h
@@ -22,6 +22,7 @@
 #include <asm/pvclock-abi.h>
 #include <asm/desc.h>
 #include <asm/mtrr.h>
+#include <asm/msr-index.h>
 
 #define KVM_MAX_VCPUS 16
 #define KVM_MEMORY_SLOTS 32
@@ -134,11 +135,18 @@ enum {
 
 #define KVM_NR_MEM_OBJS 40
 
-struct kvm_guest_debug {
-        int enabled;
-        unsigned long bp[4];
-        int singlestep;
-};
+#define KVM_NR_DB_REGS  4
+
+#define DR6_BD          (1 << 13)
+#define DR6_BS          (1 << 14)
+#define DR6_FIXED_1     0xffff0ff0
+#define DR6_VOLATILE    0x0000e00f
+
+#define DR7_BP_EN_MASK  0x000000ff
+#define DR7_GE          (1 << 9)
+#define DR7_GD          (1 << 13)
+#define DR7_FIXED_1     0x00000400
+#define DR7_VOLATILE    0xffff23ff
 
 /*
  * We don't want allocation failures within the mmu code, so we preallocate
@@ -162,7 +170,8 @@ struct kvm_pte_chain {
  *   bits 0:3 - total guest paging levels (2-4, or zero for real mode)
  *   bits 4:7 - page table level for this shadow (1-4)
  *   bits 8:9 - page table quadrant for 2-level guests
- *   bit   16 - "metaphysical" - gfn is not a real page (huge page/real mode)
+ *   bit   16 - direct mapping of virtual to physical mapping at gfn
+ *              used for real mode and two-dimensional paging
  *   bits 17:19 - common access permissions for all ptes in this shadow page
  */
 union kvm_mmu_page_role {
@@ -172,9 +181,10 @@ union kvm_mmu_page_role {
                 unsigned level:4;
                 unsigned quadrant:2;
                 unsigned pad_for_nice_hex_output:6;
-                unsigned metaphysical:1;
+                unsigned direct:1;
                 unsigned access:3;
                 unsigned invalid:1;
+                unsigned cr4_pge:1;
         };
 };
 
@@ -218,6 +228,18 @@ struct kvm_pv_mmu_op_buffer {
         char buf[512] __aligned(sizeof(long));
 };
 
+struct kvm_pio_request {
+        unsigned long count;
+        int cur_count;
+        gva_t guest_gva;
+        int in;
+        int port;
+        int size;
+        int string;
+        int down;
+        int rep;
+};
+
 /*
  * x86 supports 3 paging modes (4-level 64-bit, 3-level 64-bit, and 2-level
  * 32-bit).  The kvm_mmu structure abstracts the details of the current mmu
@@ -236,6 +258,7 @@ struct kvm_mmu {
         hpa_t root_hpa;
         int root_level;
         int shadow_root_level;
+        union kvm_mmu_page_role base_role;
 
         u64 *pae_root;
 };
@@ -258,6 +281,7 @@ struct kvm_vcpu_arch {
         unsigned long cr3;
         unsigned long cr4;
         unsigned long cr8;
+        u32 hflags;
         u64 pdptrs[4]; /* pae */
         u64 shadow_efer;
         u64 apic_base;
@@ -338,6 +362,15 @@ struct kvm_vcpu_arch {
 
         struct mtrr_state_type mtrr_state;
         u32 pat;
+
+        int switch_db_regs;
+        unsigned long host_db[KVM_NR_DB_REGS];
+        unsigned long host_dr6;
+        unsigned long host_dr7;
+        unsigned long db[KVM_NR_DB_REGS];
+        unsigned long dr6;
+        unsigned long dr7;
+        unsigned long eff_db[KVM_NR_DB_REGS];
 };
 
 struct kvm_mem_alias {
@@ -378,6 +411,7 @@ struct kvm_arch{
 
         unsigned long irq_sources_bitmap;
         unsigned long irq_states[KVM_IOAPIC_NUM_PINS];
+        u64 vm_init_tsc;
 };
 
 struct kvm_vm_stat {
@@ -446,8 +480,7 @@ struct kvm_x86_ops {
         void (*vcpu_put)(struct kvm_vcpu *vcpu);
 
         int (*set_guest_debug)(struct kvm_vcpu *vcpu,
-                               struct kvm_debug_guest *dbg);
-        void (*guest_debug_pre)(struct kvm_vcpu *vcpu);
+                               struct kvm_guest_debug *dbg);
         int (*get_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata);
         int (*set_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 data);
         u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg);
@@ -583,16 +616,12 @@ void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code);
 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long cr2,
                            u32 error_code);
 
-void kvm_pic_set_irq(void *opaque, int irq, int level);
+int kvm_pic_set_irq(void *opaque, int irq, int level);
 
 void kvm_inject_nmi(struct kvm_vcpu *vcpu);
 
 void fx_init(struct kvm_vcpu *vcpu);
 
-int emulator_read_std(unsigned long addr,
-                      void *val,
-                      unsigned int bytes,
-                      struct kvm_vcpu *vcpu);
 int emulator_write_emulated(unsigned long addr,
                             const void *val,
                             unsigned int bytes,
@@ -737,6 +766,10 @@ enum {
         TASK_SWITCH_GATE = 3,
 };
 
+#define HF_GIF_MASK             (1 << 0)
+#define HF_HIF_MASK             (1 << 1)
+#define HF_VINTR_MASK           (1 << 2)
+
 /*
  * Hardware virtualization extension instructions may fault if a
  * reboot turns off virtualization while processes are running.
diff --git a/arch/x86/include/asm/linkage.h b/arch/x86/include/asm/linkage.h
index 5d98d0b68ffc..9320e2a8a26a 100644
--- a/arch/x86/include/asm/linkage.h
+++ b/arch/x86/include/asm/linkage.h
@@ -52,70 +52,14 @@
 
 #endif
 
+#define GLOBAL(name)    \
+        .globl name;    \
+        name:
+
 #ifdef CONFIG_X86_ALIGNMENT_16
 #define __ALIGN .align 16,0x90
 #define __ALIGN_STR ".align 16,0x90"
 #endif
 
-/*
- * to check ENTRY_X86/END_X86 and
- * KPROBE_ENTRY_X86/KPROBE_END_X86
- * unbalanced-missed-mixed appearance
- */
-#define __set_entry_x86         .set ENTRY_X86_IN, 0
-#define __unset_entry_x86       .set ENTRY_X86_IN, 1
-#define __set_kprobe_x86        .set KPROBE_X86_IN, 0
-#define __unset_kprobe_x86      .set KPROBE_X86_IN, 1
-
-#define __macro_err_x86 .error "ENTRY_X86/KPROBE_X86 unbalanced,missed,mixed"
-
-#define __check_entry_x86       \
-        .ifdef ENTRY_X86_IN;    \
-        .ifeq ENTRY_X86_IN;     \
-        __macro_err_x86;        \
-        .abort;                 \
-        .endif;                 \
-        .endif
-
-#define __check_kprobe_x86      \
-        .ifdef KPROBE_X86_IN;   \
-        .ifeq KPROBE_X86_IN;    \
-        __macro_err_x86;        \
-        .abort;                 \
-        .endif;                 \
-        .endif
-
-#define __check_entry_kprobe_x86        \
-        __check_entry_x86;              \
-        __check_kprobe_x86
-
-#define ENTRY_KPROBE_FINAL_X86 __check_entry_kprobe_x86
-
-#define ENTRY_X86(name)                 \
-        __check_entry_kprobe_x86;       \
-        __set_entry_x86;                \
-        .globl name;                    \
-        __ALIGN;                        \
-        name:
-
-#define END_X86(name)                   \
-        __unset_entry_x86;              \
-        __check_entry_kprobe_x86;       \
-        .size name, .-name
-
-#define KPROBE_ENTRY_X86(name)          \
-        __check_entry_kprobe_x86;       \
-        __set_kprobe_x86;               \
-        .pushsection .kprobes.text, "ax"; \
-        .globl name;                    \
-        __ALIGN;                        \
-        name:
-
-#define KPROBE_END_X86(name)            \
-        __unset_kprobe_x86;             \
-        __check_entry_kprobe_x86;       \
-        .size name, .-name;             \
-        .popsection
-
 #endif /* _ASM_X86_LINKAGE_H */
 
diff --git a/arch/x86/include/asm/mach-default/mach_apic.h b/arch/x86/include/asm/mach-default/mach_apic.h
deleted file mode 100644
index cc09cbbee27e..000000000000
--- a/arch/x86/include/asm/mach-default/mach_apic.h
+++ /dev/null
@@ -1,168 +0,0 @@
-#ifndef _ASM_X86_MACH_DEFAULT_MACH_APIC_H
-#define _ASM_X86_MACH_DEFAULT_MACH_APIC_H
-
-#ifdef CONFIG_X86_LOCAL_APIC
-
-#include <mach_apicdef.h>
-#include <asm/smp.h>
-
-#define APIC_DFR_VALUE  (APIC_DFR_FLAT)
-
-static inline const struct cpumask *target_cpus(void)
-{ 
-#ifdef CONFIG_SMP
-        return cpu_online_mask;
-#else
-        return cpumask_of(0);
-#endif
-} 
-
-#define NO_BALANCE_IRQ (0)
-#define esr_disable (0)
-
-#ifdef CONFIG_X86_64
-#include <asm/genapic.h>
-#define INT_DELIVERY_MODE (genapic->int_delivery_mode)
-#define INT_DEST_MODE (genapic->int_dest_mode)
-#define TARGET_CPUS       (genapic->target_cpus())
-#define apic_id_registered (genapic->apic_id_registered)
-#define init_apic_ldr (genapic->init_apic_ldr)
-#define cpu_mask_to_apicid (genapic->cpu_mask_to_apicid)
-#define cpu_mask_to_apicid_and (genapic->cpu_mask_to_apicid_and)
-#define phys_pkg_id     (genapic->phys_pkg_id)
-#define vector_allocation_domain    (genapic->vector_allocation_domain)
-#define read_apic_id()  (GET_APIC_ID(apic_read(APIC_ID)))
-#define send_IPI_self (genapic->send_IPI_self)
-#define wakeup_secondary_cpu (genapic->wakeup_cpu)
-extern void setup_apic_routing(void);
-#else
-#define INT_DELIVERY_MODE dest_LowestPrio
-#define INT_DEST_MODE 1     /* logical delivery broadcast to all procs */
-#define TARGET_CPUS (target_cpus())
-#define wakeup_secondary_cpu wakeup_secondary_cpu_via_init
-/*
- * Set up the logical destination ID.
- *
- * Intel recommends to set DFR, LDR and TPR before enabling
- * an APIC.  See e.g. "AP-388 82489DX User's Manual" (Intel
- * document number 292116).  So here it goes...
- */
-static inline void init_apic_ldr(void)
-{
-        unsigned long val;
-
-        apic_write(APIC_DFR, APIC_DFR_VALUE);
-        val = apic_read(APIC_LDR) & ~APIC_LDR_MASK;
-        val |= SET_APIC_LOGICAL_ID(1UL << smp_processor_id());
-        apic_write(APIC_LDR, val);
-}
-
-static inline int apic_id_registered(void)
-{
-        return physid_isset(read_apic_id(), phys_cpu_present_map);
-}
-
-static inline unsigned int cpu_mask_to_apicid(const struct cpumask *cpumask)
-{
-        return cpumask_bits(cpumask)[0];
-}
-
-static inline unsigned int cpu_mask_to_apicid_and(const struct cpumask *cpumask,
-                                                  const struct cpumask *andmask)
-{
-        unsigned long mask1 = cpumask_bits(cpumask)[0];
-        unsigned long mask2 = cpumask_bits(andmask)[0];
-        unsigned long mask3 = cpumask_bits(cpu_online_mask)[0];
-
-        return (unsigned int)(mask1 & mask2 & mask3);
-}
-
-static inline u32 phys_pkg_id(u32 cpuid_apic, int index_msb)
-{
-        return cpuid_apic >> index_msb;
-}
-
-static inline void setup_apic_routing(void)
-{
-#ifdef CONFIG_X86_IO_APIC
-        printk("Enabling APIC mode:  %s.  Using %d I/O APICs\n",
-                                        "Flat", nr_ioapics);
-#endif
-}
-
-static inline int apicid_to_node(int logical_apicid)
-{
-#ifdef CONFIG_SMP
-        return apicid_2_node[hard_smp_processor_id()];
-#else
-        return 0;
-#endif
-}
-
-static inline void vector_allocation_domain(int cpu, struct cpumask *retmask)
-{
-        /* Careful. Some cpus do not strictly honor the set of cpus
-         * specified in the interrupt destination when using lowest
-         * priority interrupt delivery mode.
-         *
-         * In particular there was a hyperthreading cpu observed to
-         * deliver interrupts to the wrong hyperthread when only one
-         * hyperthread was specified in the interrupt desitination.
-         */
-        *retmask = (cpumask_t) { { [0] = APIC_ALL_CPUS } };
-}
-#endif
-
-static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid)
-{
-        return physid_isset(apicid, bitmap);
-}
-
-static inline unsigned long check_apicid_present(int bit)
-{
-        return physid_isset(bit, phys_cpu_present_map);
-}
-
-static inline physid_mask_t ioapic_phys_id_map(physid_mask_t phys_map)
-{
-        return phys_map;
-}
-
-static inline int multi_timer_check(int apic, int irq)
-{
-        return 0;
-}
-
-/* Mapping from cpu number to logical apicid */
-static inline int cpu_to_logical_apicid(int cpu)
-{
-        return 1 << cpu;
-}
-
-static inline int cpu_present_to_apicid(int mps_cpu)
-{
-        if (mps_cpu < nr_cpu_ids && cpu_present(mps_cpu))
-                return (int)per_cpu(x86_bios_cpu_apicid, mps_cpu);
-        else
-                return BAD_APICID;
-}
-
-static inline physid_mask_t apicid_to_cpu_present(int phys_apicid)
-{
-        return physid_mask_of_physid(phys_apicid);
-}
-
-static inline void setup_portio_remap(void)
-{
-}
-
-static inline int check_phys_apicid_present(int boot_cpu_physical_apicid)
-{
-        return physid_isset(boot_cpu_physical_apicid, phys_cpu_present_map);
-}
-
-static inline void enable_apic_mode(void)
-{
-}
-#endif /* CONFIG_X86_LOCAL_APIC */
-#endif /* _ASM_X86_MACH_DEFAULT_MACH_APIC_H */
diff --git a/arch/x86/include/asm/mach-default/mach_apicdef.h b/arch/x86/include/asm/mach-default/mach_apicdef.h
deleted file mode 100644
index 53179936d6c6..000000000000
--- a/arch/x86/include/asm/mach-default/mach_apicdef.h
+++ /dev/null
@@ -1,24 +0,0 @@
-#ifndef _ASM_X86_MACH_DEFAULT_MACH_APICDEF_H
-#define _ASM_X86_MACH_DEFAULT_MACH_APICDEF_H
-
-#include <asm/apic.h>
-
-#ifdef CONFIG_X86_64
-#define APIC_ID_MASK            (genapic->apic_id_mask)
-#define GET_APIC_ID(x)          (genapic->get_apic_id(x))
-#define SET_APIC_ID(x)          (genapic->set_apic_id(x))
-#else
-#define         APIC_ID_MASK            (0xF<<24)
-static inline unsigned get_apic_id(unsigned long x) 
-{
-        unsigned int ver = GET_APIC_VERSION(apic_read(APIC_LVR));
-        if (APIC_XAPIC(ver))
-                return (((x)>>24)&0xFF);
-        else
-                return (((x)>>24)&0xF);
-} 
-
-#define         GET_APIC_ID(x)  get_apic_id(x)
-#endif
-
-#endif /* _ASM_X86_MACH_DEFAULT_MACH_APICDEF_H */
diff --git a/arch/x86/include/asm/mach-default/mach_ipi.h b/arch/x86/include/asm/mach-default/mach_ipi.h
deleted file mode 100644
index 191312d155da..000000000000
--- a/arch/x86/include/asm/mach-default/mach_ipi.h
+++ /dev/null
@@ -1,64 +0,0 @@
-#ifndef _ASM_X86_MACH_DEFAULT_MACH_IPI_H
-#define _ASM_X86_MACH_DEFAULT_MACH_IPI_H
-
-/* Avoid include hell */
-#define NMI_VECTOR 0x02
-
-void send_IPI_mask_bitmask(const struct cpumask *mask, int vector);
-void send_IPI_mask_allbutself(const struct cpumask *mask, int vector);
-void __send_IPI_shortcut(unsigned int shortcut, int vector);
-
-extern int no_broadcast;
-
-#ifdef CONFIG_X86_64
-#include <asm/genapic.h>
-#define send_IPI_mask (genapic->send_IPI_mask)
-#define send_IPI_mask_allbutself (genapic->send_IPI_mask_allbutself)
-#else
-static inline void send_IPI_mask(const struct cpumask *mask, int vector)
-{
-        send_IPI_mask_bitmask(mask, vector);
-}
-void send_IPI_mask_allbutself(const struct cpumask *mask, int vector);
-#endif
-
-static inline void __local_send_IPI_allbutself(int vector)
-{
-        if (no_broadcast || vector == NMI_VECTOR)
-                send_IPI_mask_allbutself(cpu_online_mask, vector);
-        else
-                __send_IPI_shortcut(APIC_DEST_ALLBUT, vector);
-}
-
-static inline void __local_send_IPI_all(int vector)
-{
-        if (no_broadcast || vector == NMI_VECTOR)
-                send_IPI_mask(cpu_online_mask, vector);
-        else
-                __send_IPI_shortcut(APIC_DEST_ALLINC, vector);
-}
-
-#ifdef CONFIG_X86_64
-#define send_IPI_allbutself (genapic->send_IPI_allbutself)
-#define send_IPI_all (genapic->send_IPI_all)
-#else
-static inline void send_IPI_allbutself(int vector)
-{
-        /*
-         * if there are no other CPUs in the system then we get an APIC send 
-         * error if we try to broadcast, thus avoid sending IPIs in this case.
-         */
-        if (!(num_online_cpus() > 1))
-                return;
-
-        __local_send_IPI_allbutself(vector);
-        return;
-}
-
-static inline void send_IPI_all(int vector)
-{
-        __local_send_IPI_all(vector);
-}
-#endif
-
-#endif /* _ASM_X86_MACH_DEFAULT_MACH_IPI_H */
diff --git a/arch/x86/include/asm/mach-default/mach_mpparse.h b/arch/x86/include/asm/mach-default/mach_mpparse.h
deleted file mode 100644
index c70a263d68cd..000000000000
--- a/arch/x86/include/asm/mach-default/mach_mpparse.h
+++ /dev/null
@@ -1,17 +0,0 @@
-#ifndef _ASM_X86_MACH_DEFAULT_MACH_MPPARSE_H
-#define _ASM_X86_MACH_DEFAULT_MACH_MPPARSE_H
-
-static inline int
-mps_oem_check(struct mpc_table *mpc, char *oem, char *productid)
-{
-        return 0;
-}
-
-/* Hook from generic ACPI tables.c */
-static inline int acpi_madt_oem_check(char *oem_id, char *oem_table_id)
-{
-        return 0;
-}
-
-
-#endif /* _ASM_X86_MACH_DEFAULT_MACH_MPPARSE_H */
diff --git a/arch/x86/include/asm/mach-default/mach_mpspec.h b/arch/x86/include/asm/mach-default/mach_mpspec.h
deleted file mode 100644
index e85ede686be8..000000000000
--- a/arch/x86/include/asm/mach-default/mach_mpspec.h
+++ /dev/null
@@ -1,12 +0,0 @@
-#ifndef _ASM_X86_MACH_DEFAULT_MACH_MPSPEC_H
-#define _ASM_X86_MACH_DEFAULT_MACH_MPSPEC_H
-
-#define MAX_IRQ_SOURCES 256
-
-#if CONFIG_BASE_SMALL == 0
-#define MAX_MP_BUSSES 256
-#else
-#define MAX_MP_BUSSES 32
-#endif
-
-#endif /* _ASM_X86_MACH_DEFAULT_MACH_MPSPEC_H */
diff --git a/arch/x86/include/asm/mach-default/mach_wakecpu.h b/arch/x86/include/asm/mach-default/mach_wakecpu.h
deleted file mode 100644
index 89897a6a65b9..000000000000
--- a/arch/x86/include/asm/mach-default/mach_wakecpu.h
+++ /dev/null
@@ -1,41 +0,0 @@
-#ifndef _ASM_X86_MACH_DEFAULT_MACH_WAKECPU_H
-#define _ASM_X86_MACH_DEFAULT_MACH_WAKECPU_H
-
-#define TRAMPOLINE_PHYS_LOW (0x467)
-#define TRAMPOLINE_PHYS_HIGH (0x469)
-
-static inline void wait_for_init_deassert(atomic_t *deassert)
-{
-        while (!atomic_read(deassert))
-                cpu_relax();
-        return;
-}
-
-/* Nothing to do for most platforms, since cleared by the INIT cycle */
-static inline void smp_callin_clear_local_apic(void)
-{
-}
-
-static inline void store_NMI_vector(unsigned short *high, unsigned short *low)
-{
-}
-
-static inline void restore_NMI_vector(unsigned short *high, unsigned short *low)
-{
-}
-
-#ifdef CONFIG_SMP
-extern void __inquire_remote_apic(int apicid);
-#else /* CONFIG_SMP */
-static inline void __inquire_remote_apic(int apicid)
-{
-}
-#endif /* CONFIG_SMP */
-
-static inline void inquire_remote_apic(int apicid)
-{
-        if (apic_verbosity >= APIC_DEBUG)
-                __inquire_remote_apic(apicid);
-}
-
-#endif /* _ASM_X86_MACH_DEFAULT_MACH_WAKECPU_H */
diff --git a/arch/x86/include/asm/mach-generic/gpio.h b/arch/x86/include/asm/mach-generic/gpio.h
deleted file mode 100644
index 995c45efdb33..000000000000
--- a/arch/x86/include/asm/mach-generic/gpio.h
+++ /dev/null
@@ -1,15 +0,0 @@
-#ifndef _ASM_X86_MACH_GENERIC_GPIO_H
-#define _ASM_X86_MACH_GENERIC_GPIO_H
-
-int gpio_request(unsigned gpio, const char *label);
-void gpio_free(unsigned gpio);
-int gpio_direction_input(unsigned gpio);
-int gpio_direction_output(unsigned gpio, int value);
-int gpio_get_value(unsigned gpio);
-void gpio_set_value(unsigned gpio, int value);
-int gpio_to_irq(unsigned gpio);
-int irq_to_gpio(unsigned irq);
-
-#include <asm-generic/gpio.h>           /* cansleep wrappers */
-
-#endif /* _ASM_X86_MACH_GENERIC_GPIO_H */
diff --git a/arch/x86/include/asm/mach-generic/mach_apic.h b/arch/x86/include/asm/mach-generic/mach_apic.h
deleted file mode 100644
index 48553e958ad5..000000000000
--- a/arch/x86/include/asm/mach-generic/mach_apic.h
+++ /dev/null
@@ -1,35 +0,0 @@
-#ifndef _ASM_X86_MACH_GENERIC_MACH_APIC_H
-#define _ASM_X86_MACH_GENERIC_MACH_APIC_H
-
-#include <asm/genapic.h>
-
-#define esr_disable (genapic->ESR_DISABLE)
-#define NO_BALANCE_IRQ (genapic->no_balance_irq)
-#define INT_DELIVERY_MODE (genapic->int_delivery_mode)
-#define INT_DEST_MODE (genapic->int_dest_mode)
-#undef APIC_DEST_LOGICAL
-#define APIC_DEST_LOGICAL (genapic->apic_destination_logical)
-#define TARGET_CPUS       (genapic->target_cpus())
-#define apic_id_registered (genapic->apic_id_registered)
-#define init_apic_ldr (genapic->init_apic_ldr)
-#define ioapic_phys_id_map (genapic->ioapic_phys_id_map)
-#define setup_apic_routing (genapic->setup_apic_routing)
-#define multi_timer_check (genapic->multi_timer_check)
-#define apicid_to_node (genapic->apicid_to_node)
-#define cpu_to_logical_apicid (genapic->cpu_to_logical_apicid) 
-#define cpu_present_to_apicid (genapic->cpu_present_to_apicid)
-#define apicid_to_cpu_present (genapic->apicid_to_cpu_present)
-#define setup_portio_remap (genapic->setup_portio_remap)
-#define check_apicid_present (genapic->check_apicid_present)
-#define check_phys_apicid_present (genapic->check_phys_apicid_present)
-#define check_apicid_used (genapic->check_apicid_used)
-#define cpu_mask_to_apicid (genapic->cpu_mask_to_apicid)
-#define cpu_mask_to_apicid_and (genapic->cpu_mask_to_apicid_and)
-#define vector_allocation_domain (genapic->vector_allocation_domain)
-#define enable_apic_mode (genapic->enable_apic_mode)
-#define phys_pkg_id (genapic->phys_pkg_id)
-#define wakeup_secondary_cpu (genapic->wakeup_cpu)
-
-extern void generic_bigsmp_probe(void);
-
-#endif /* _ASM_X86_MACH_GENERIC_MACH_APIC_H */
diff --git a/arch/x86/include/asm/mach-generic/mach_apicdef.h b/arch/x86/include/asm/mach-generic/mach_apicdef.h
deleted file mode 100644
index 68041f3802f4..000000000000
--- a/arch/x86/include/asm/mach-generic/mach_apicdef.h
+++ /dev/null
@@ -1,11 +0,0 @@
-#ifndef _ASM_X86_MACH_GENERIC_MACH_APICDEF_H
-#define _ASM_X86_MACH_GENERIC_MACH_APICDEF_H
-
-#ifndef APIC_DEFINITION
-#include <asm/genapic.h>
-
-#define GET_APIC_ID (genapic->get_apic_id)
-#define APIC_ID_MASK (genapic->apic_id_mask)
-#endif
-
-#endif /* _ASM_X86_MACH_GENERIC_MACH_APICDEF_H */
diff --git a/arch/x86/include/asm/mach-generic/mach_ipi.h b/arch/x86/include/asm/mach-generic/mach_ipi.h
deleted file mode 100644
index ffd637e3c3d9..000000000000
--- a/arch/x86/include/asm/mach-generic/mach_ipi.h
+++ /dev/null
@@ -1,10 +0,0 @@
-#ifndef _ASM_X86_MACH_GENERIC_MACH_IPI_H
-#define _ASM_X86_MACH_GENERIC_MACH_IPI_H
-
-#include <asm/genapic.h>
-
-#define send_IPI_mask (genapic->send_IPI_mask)
-#define send_IPI_allbutself (genapic->send_IPI_allbutself)
-#define send_IPI_all (genapic->send_IPI_all)
-
-#endif /* _ASM_X86_MACH_GENERIC_MACH_IPI_H */
diff --git a/arch/x86/include/asm/mach-generic/mach_mpparse.h b/arch/x86/include/asm/mach-generic/mach_mpparse.h
deleted file mode 100644
index 9444ab8dca94..000000000000
--- a/arch/x86/include/asm/mach-generic/mach_mpparse.h
+++ /dev/null
@@ -1,9 +0,0 @@
-#ifndef _ASM_X86_MACH_GENERIC_MACH_MPPARSE_H
-#define _ASM_X86_MACH_GENERIC_MACH_MPPARSE_H
-
-
-extern int mps_oem_check(struct mpc_table *, char *, char *);
-
-extern int acpi_madt_oem_check(char *, char *);
-
-#endif /* _ASM_X86_MACH_GENERIC_MACH_MPPARSE_H */
diff --git a/arch/x86/include/asm/mach-generic/mach_mpspec.h b/arch/x86/include/asm/mach-generic/mach_mpspec.h
deleted file mode 100644
index 3bc407226578..000000000000
--- a/arch/x86/include/asm/mach-generic/mach_mpspec.h
+++ /dev/null
@@ -1,12 +0,0 @@
-#ifndef _ASM_X86_MACH_GENERIC_MACH_MPSPEC_H
-#define _ASM_X86_MACH_GENERIC_MACH_MPSPEC_H
-
-#define MAX_IRQ_SOURCES 256
-
-/* Summit or generic (i.e. installer) kernels need lots of bus entries. */
-/* Maximum 256 PCI busses, plus 1 ISA bus in each of 4 cabinets. */
-#define MAX_MP_BUSSES 260
-
-extern void numaq_mps_oem_check(struct mpc_table *, char *, char *);
-
-#endif /* _ASM_X86_MACH_GENERIC_MACH_MPSPEC_H */
diff --git a/arch/x86/include/asm/mach-generic/mach_wakecpu.h b/arch/x86/include/asm/mach-generic/mach_wakecpu.h
deleted file mode 100644
index 1ab16b168c8a..000000000000
--- a/arch/x86/include/asm/mach-generic/mach_wakecpu.h
+++ /dev/null
@@ -1,12 +0,0 @@
-#ifndef _ASM_X86_MACH_GENERIC_MACH_WAKECPU_H
-#define _ASM_X86_MACH_GENERIC_MACH_WAKECPU_H
-
-#define TRAMPOLINE_PHYS_LOW (genapic->trampoline_phys_low)
-#define TRAMPOLINE_PHYS_HIGH (genapic->trampoline_phys_high)
-#define wait_for_init_deassert (genapic->wait_for_init_deassert)
-#define smp_callin_clear_local_apic (genapic->smp_callin_clear_local_apic)
-#define store_NMI_vector (genapic->store_NMI_vector)
-#define restore_NMI_vector (genapic->restore_NMI_vector)
-#define inquire_remote_apic (genapic->inquire_remote_apic)
-
-#endif /* _ASM_X86_MACH_GENERIC_MACH_APIC_H */
diff --git a/arch/x86/include/asm/mach-rdc321x/gpio.h b/arch/x86/include/asm/mach-rdc321x/gpio.h
deleted file mode 100644
index c210ab5788b0..000000000000
--- a/arch/x86/include/asm/mach-rdc321x/gpio.h
+++ /dev/null
@@ -1,60 +0,0 @@
-#ifndef _ASM_X86_MACH_RDC321X_GPIO_H
-#define _ASM_X86_MACH_RDC321X_GPIO_H
-
-#include <linux/kernel.h>
-
-extern int rdc_gpio_get_value(unsigned gpio);
-extern void rdc_gpio_set_value(unsigned gpio, int value);
-extern int rdc_gpio_direction_input(unsigned gpio);
-extern int rdc_gpio_direction_output(unsigned gpio, int value);
-extern int rdc_gpio_request(unsigned gpio, const char *label);
-extern void rdc_gpio_free(unsigned gpio);
-extern void __init rdc321x_gpio_setup(void);
-
-/* Wrappers for the arch-neutral GPIO API */
-
-static inline int gpio_request(unsigned gpio, const char *label)
-{
-        return rdc_gpio_request(gpio, label);
-}
-
-static inline void gpio_free(unsigned gpio)
-{
-        might_sleep();
-        rdc_gpio_free(gpio);
-}
-
-static inline int gpio_direction_input(unsigned gpio)
-{
-        return rdc_gpio_direction_input(gpio);
-}
-
-static inline int gpio_direction_output(unsigned gpio, int value)
-{
-        return rdc_gpio_direction_output(gpio, value);
-}
-
-static inline int gpio_get_value(unsigned gpio)
-{
-        return rdc_gpio_get_value(gpio);
-}
-
-static inline void gpio_set_value(unsigned gpio, int value)
-{
-        rdc_gpio_set_value(gpio, value);
-}
-
-static inline int gpio_to_irq(unsigned gpio)
-{
-        return gpio;
-}
-
-static inline int irq_to_gpio(unsigned irq)
-{
-        return irq;
-}
-
-/* For cansleep */
-#include <asm-generic/gpio.h>
-
-#endif /* _ASM_X86_MACH_RDC321X_GPIO_H */
diff --git a/arch/x86/include/asm/mach-voyager/do_timer.h b/arch/x86/include/asm/mach-voyager/do_timer.h
deleted file mode 100644
index 9e5a459fd15b..000000000000
--- a/arch/x86/include/asm/mach-voyager/do_timer.h
+++ /dev/null
@@ -1,17 +0,0 @@
-/* defines for inline arch setup functions */
-#include <linux/clockchips.h>
-
-#include <asm/voyager.h>
-#include <asm/i8253.h>
-
-/**
- * do_timer_interrupt_hook - hook into timer tick
- *
- * Call the pit clock event handler. see asm/i8253.h
- **/
-static inline void do_timer_interrupt_hook(void)
-{
-        global_clock_event->event_handler(global_clock_event);
-        voyager_timer_interrupt();
-}
-
diff --git a/arch/x86/include/asm/mach-voyager/entry_arch.h b/arch/x86/include/asm/mach-voyager/entry_arch.h
deleted file mode 100644
index ae52624b5937..000000000000
--- a/arch/x86/include/asm/mach-voyager/entry_arch.h
+++ /dev/null
@@ -1,26 +0,0 @@
-/* -*- mode: c; c-basic-offset: 8 -*- */
-
-/* Copyright (C) 2002
- *
- * Author: James.Bottomley@HansenPartnership.com
- *
- * linux/arch/i386/voyager/entry_arch.h
- *
- * This file builds the VIC and QIC CPI gates
- */
-
-/* initialise the voyager interrupt gates 
- *
- * This uses the macros in irq.h to set up assembly jump gates.  The
- * calls are then redirected to the same routine with smp_ prefixed */
-BUILD_INTERRUPT(vic_sys_interrupt, VIC_SYS_INT)
-BUILD_INTERRUPT(vic_cmn_interrupt, VIC_CMN_INT)
-BUILD_INTERRUPT(vic_cpi_interrupt, VIC_CPI_LEVEL0);
-
-/* do all the QIC interrupts */
-BUILD_INTERRUPT(qic_timer_interrupt, QIC_TIMER_CPI);
-BUILD_INTERRUPT(qic_invalidate_interrupt, QIC_INVALIDATE_CPI);
-BUILD_INTERRUPT(qic_reschedule_interrupt, QIC_RESCHEDULE_CPI);
-BUILD_INTERRUPT(qic_enable_irq_interrupt, QIC_ENABLE_IRQ_CPI);
-BUILD_INTERRUPT(qic_call_function_interrupt, QIC_CALL_FUNCTION_CPI);
-BUILD_INTERRUPT(qic_call_function_single_interrupt, QIC_CALL_FUNCTION_SINGLE_CPI);
diff --git a/arch/x86/include/asm/mach-voyager/setup_arch.h b/arch/x86/include/asm/mach-voyager/setup_arch.h
deleted file mode 100644
index 71729ca05cd7..000000000000
--- a/arch/x86/include/asm/mach-voyager/setup_arch.h
+++ /dev/null
@@ -1,12 +0,0 @@
-#include <asm/voyager.h>
-#include <asm/setup.h>
-#define VOYAGER_BIOS_INFO ((struct voyager_bios_info *) \
-                        (&boot_params.apm_bios_info))
-
-/* Hook to call BIOS initialisation function */
-
-/* for voyager, pass the voyager BIOS/SUS info area to the detection
- * routines */
-
-#define ARCH_SETUP      voyager_detect(VOYAGER_BIOS_INFO);
-
diff --git a/arch/x86/include/asm/mach-default/mach_timer.h b/arch/x86/include/asm/mach_timer.h
index 853728519ae9..853728519ae9 100644
--- a/arch/x86/include/asm/mach-default/mach_timer.h
+++ b/arch/x86/include/asm/mach_timer.h
diff --git a/arch/x86/include/asm/mach-default/mach_traps.h b/arch/x86/include/asm/mach_traps.h
index f7920601e472..f7920601e472 100644
--- a/arch/x86/include/asm/mach-default/mach_traps.h
+++ b/arch/x86/include/asm/mach_traps.h
diff --git a/arch/x86/include/asm/mmu_context.h b/arch/x86/include/asm/mmu_context.h
index 8aeeb3fd73db..f923203dc39a 100644
--- a/arch/x86/include/asm/mmu_context.h
+++ b/arch/x86/include/asm/mmu_context.h
@@ -21,11 +21,54 @@ static inline void paravirt_activate_mm(struct mm_struct *prev,
 int init_new_context(struct task_struct *tsk, struct mm_struct *mm);
 void destroy_context(struct mm_struct *mm);
 
-#ifdef CONFIG_X86_32
-# include "mmu_context_32.h"
-#else
-# include "mmu_context_64.h"
+
+static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
+{
+#ifdef CONFIG_SMP
+        if (percpu_read(cpu_tlbstate.state) == TLBSTATE_OK)
+                percpu_write(cpu_tlbstate.state, TLBSTATE_LAZY);
+#endif
+}
+
+static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
+                             struct task_struct *tsk)
+{
+        unsigned cpu = smp_processor_id();
+
+        if (likely(prev != next)) {
+                /* stop flush ipis for the previous mm */
+                cpu_clear(cpu, prev->cpu_vm_mask);
+#ifdef CONFIG_SMP
+                percpu_write(cpu_tlbstate.state, TLBSTATE_OK);
+                percpu_write(cpu_tlbstate.active_mm, next);
 #endif
+                cpu_set(cpu, next->cpu_vm_mask);
+
+                /* Re-load page tables */
+                load_cr3(next->pgd);
+
+                /*
+                 * load the LDT, if the LDT is different:
+                 */
+                if (unlikely(prev->context.ldt != next->context.ldt))
+                        load_LDT_nolock(&next->context);
+        }
+#ifdef CONFIG_SMP
+        else {
+                percpu_write(cpu_tlbstate.state, TLBSTATE_OK);
+                BUG_ON(percpu_read(cpu_tlbstate.active_mm) != next);
+
+                if (!cpu_test_and_set(cpu, next->cpu_vm_mask)) {
+                        /* We were in lazy tlb mode and leave_mm disabled
+                         * tlb flush IPI delivery. We must reload CR3
+                         * to make sure to use no freed page tables.
+                         */
+                        load_cr3(next->pgd);
+                        load_LDT_nolock(&next->context);
+                }
+        }
+#endif
+}
 
 #define activate_mm(prev, next)                 \
 do {                                            \
@@ -33,5 +76,17 @@ do {						\
         switch_mm((prev), (next), NULL);        \
 } while (0);
 
+#ifdef CONFIG_X86_32
+#define deactivate_mm(tsk, mm)                  \
+do {                                            \
+        lazy_load_gs(0);                        \
+} while (0)
+#else
+#define deactivate_mm(tsk, mm)                  \
+do {                                            \
+        load_gs_index(0);                       \
+        loadsegment(fs, 0);                     \
+} while (0)
+#endif
 
 #endif /* _ASM_X86_MMU_CONTEXT_H */
diff --git a/arch/x86/include/asm/mmu_context_32.h b/arch/x86/include/asm/mmu_context_32.h
deleted file mode 100644
index 7e98ce1d2c0e..000000000000
--- a/arch/x86/include/asm/mmu_context_32.h
+++ /dev/null
@@ -1,55 +0,0 @@
-#ifndef _ASM_X86_MMU_CONTEXT_32_H
-#define _ASM_X86_MMU_CONTEXT_32_H
-
-static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
-{
-#ifdef CONFIG_SMP
-        if (x86_read_percpu(cpu_tlbstate.state) == TLBSTATE_OK)
-                x86_write_percpu(cpu_tlbstate.state, TLBSTATE_LAZY);
-#endif
-}
-
-static inline void switch_mm(struct mm_struct *prev,
-                             struct mm_struct *next,
-                             struct task_struct *tsk)
-{
-        int cpu = smp_processor_id();
-
-        if (likely(prev != next)) {
-                /* stop flush ipis for the previous mm */
-                cpu_clear(cpu, prev->cpu_vm_mask);
-#ifdef CONFIG_SMP
-                x86_write_percpu(cpu_tlbstate.state, TLBSTATE_OK);
-                x86_write_percpu(cpu_tlbstate.active_mm, next);
-#endif
-                cpu_set(cpu, next->cpu_vm_mask);
-
-                /* Re-load page tables */
-                load_cr3(next->pgd);
-
-                /*
-                 * load the LDT, if the LDT is different:
-                 */
-                if (unlikely(prev->context.ldt != next->context.ldt))
-                        load_LDT_nolock(&next->context);
-        }
-#ifdef CONFIG_SMP
-        else {
-                x86_write_percpu(cpu_tlbstate.state, TLBSTATE_OK);
-                BUG_ON(x86_read_percpu(cpu_tlbstate.active_mm) != next);
-
-                if (!cpu_test_and_set(cpu, next->cpu_vm_mask)) {
-                        /* We were in lazy tlb mode and leave_mm disabled
-                         * tlb flush IPI delivery. We must reload %cr3.
-                         */
-                        load_cr3(next->pgd);
-                        load_LDT_nolock(&next->context);
-                }
-        }
-#endif
-}
-
-#define deactivate_mm(tsk, mm)                  \
-        asm("movl %0,%%gs": :"r" (0));
-
-#endif /* _ASM_X86_MMU_CONTEXT_32_H */
diff --git a/arch/x86/include/asm/mmu_context_64.h b/arch/x86/include/asm/mmu_context_64.h
deleted file mode 100644
index 677d36e9540a..000000000000
--- a/arch/x86/include/asm/mmu_context_64.h
+++ /dev/null
@@ -1,54 +0,0 @@
-#ifndef _ASM_X86_MMU_CONTEXT_64_H
-#define _ASM_X86_MMU_CONTEXT_64_H
-
-#include <asm/pda.h>
-
-static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
-{
-#ifdef CONFIG_SMP
-        if (read_pda(mmu_state) == TLBSTATE_OK)
-                write_pda(mmu_state, TLBSTATE_LAZY);
-#endif
-}
-
-static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
-                             struct task_struct *tsk)
-{
-        unsigned cpu = smp_processor_id();
-        if (likely(prev != next)) {
-                /* stop flush ipis for the previous mm */
-                cpu_clear(cpu, prev->cpu_vm_mask);
-#ifdef CONFIG_SMP
-                write_pda(mmu_state, TLBSTATE_OK);
-                write_pda(active_mm, next);
-#endif
-                cpu_set(cpu, next->cpu_vm_mask);
-                load_cr3(next->pgd);
-
-                if (unlikely(next->context.ldt != prev->context.ldt))
-                        load_LDT_nolock(&next->context);
-        }
-#ifdef CONFIG_SMP
-        else {
-                write_pda(mmu_state, TLBSTATE_OK);
-                if (read_pda(active_mm) != next)
-                        BUG();
-                if (!cpu_test_and_set(cpu, next->cpu_vm_mask)) {
-                        /* We were in lazy tlb mode and leave_mm disabled
-                         * tlb flush IPI delivery. We must reload CR3
-                         * to make sure to use no freed page tables.
-                         */
-                        load_cr3(next->pgd);
-                        load_LDT_nolock(&next->context);
-                }
-        }
-#endif
-}
-
-#define deactivate_mm(tsk, mm)                  \
-do {                                            \
-        load_gs_index(0);                       \
-        asm volatile("movl %0,%%fs"::"r"(0));   \
-} while (0)
-
-#endif /* _ASM_X86_MMU_CONTEXT_64_H */
diff --git a/arch/x86/include/asm/mmzone_32.h b/arch/x86/include/asm/mmzone_32.h
index 105fb90a0635..ede6998bd92c 100644
--- a/arch/x86/include/asm/mmzone_32.h
+++ b/arch/x86/include/asm/mmzone_32.h
@@ -91,46 +91,9 @@ static inline int pfn_valid(int pfn)
 #endif /* CONFIG_DISCONTIGMEM */
 
 #ifdef CONFIG_NEED_MULTIPLE_NODES
-
-/*
- * Following are macros that are specific to this numa platform.
- */
-#define reserve_bootmem(addr, size, flags) \
-        reserve_bootmem_node(NODE_DATA(0), (addr), (size), (flags))
-#define alloc_bootmem(x) \
-        __alloc_bootmem_node(NODE_DATA(0), (x), SMP_CACHE_BYTES, __pa(MAX_DMA_ADDRESS))
-#define alloc_bootmem_nopanic(x) \
-        __alloc_bootmem_node_nopanic(NODE_DATA(0), (x), SMP_CACHE_BYTES, \
-                                __pa(MAX_DMA_ADDRESS))
-#define alloc_bootmem_low(x) \
-        __alloc_bootmem_node(NODE_DATA(0), (x), SMP_CACHE_BYTES, 0)
-#define alloc_bootmem_pages(x) \
-        __alloc_bootmem_node(NODE_DATA(0), (x), PAGE_SIZE, __pa(MAX_DMA_ADDRESS))
-#define alloc_bootmem_pages_nopanic(x) \
-        __alloc_bootmem_node_nopanic(NODE_DATA(0), (x), PAGE_SIZE, \
-                                __pa(MAX_DMA_ADDRESS))
-#define alloc_bootmem_low_pages(x) \
-        __alloc_bootmem_node(NODE_DATA(0), (x), PAGE_SIZE, 0)
-#define alloc_bootmem_node(pgdat, x)                                    \
-({                                                                      \
-        struct pglist_data  __maybe_unused                      \
-                                *__alloc_bootmem_node__pgdat = (pgdat); \
-        __alloc_bootmem_node(NODE_DATA(0), (x), SMP_CACHE_BYTES,        \
-                                                __pa(MAX_DMA_ADDRESS)); \
-})
-#define alloc_bootmem_pages_node(pgdat, x)                              \
-({                                                                      \
-        struct pglist_data  __maybe_unused                      \
-                                *__alloc_bootmem_node__pgdat = (pgdat); \
-        __alloc_bootmem_node(NODE_DATA(0), (x), PAGE_SIZE,              \
-                                                __pa(MAX_DMA_ADDRESS)); \
-})
-#define alloc_bootmem_low_pages_node(pgdat, x)                          \
-({                                                                      \
-        struct pglist_data  __maybe_unused                      \
-                                *__alloc_bootmem_node__pgdat = (pgdat); \
-        __alloc_bootmem_node(NODE_DATA(0), (x), PAGE_SIZE, 0);          \
-})
+/* always use node 0 for bootmem on this numa platform */
+#define bootmem_arch_preferred_node(__bdata, size, align, goal, limit)  \
+        (NODE_DATA(0)->bdata)
 #endif /* CONFIG_NEED_MULTIPLE_NODES */
 
 #endif /* _ASM_X86_MMZONE_32_H */
diff --git a/arch/x86/include/asm/mpspec.h b/arch/x86/include/asm/mpspec.h
index bd22f2a3713f..642fc7fc8cdc 100644
--- a/arch/x86/include/asm/mpspec.h
+++ b/arch/x86/include/asm/mpspec.h
@@ -9,7 +9,18 @@ extern int apic_version[MAX_APICS];
 extern int pic_mode;
 
 #ifdef CONFIG_X86_32
-#include <mach_mpspec.h>
+
+/*
+ * Summit or generic (i.e. installer) kernels need lots of bus entries.
+ * Maximum 256 PCI busses, plus 1 ISA bus in each of 4 cabinets.
+ */
+#if CONFIG_BASE_SMALL == 0
+# define MAX_MP_BUSSES          260
+#else
+# define MAX_MP_BUSSES          32
+#endif
+
+#define MAX_IRQ_SOURCES         256
 
 extern unsigned int def_to_bigsmp;
 extern u8 apicid_2_node[];
@@ -20,15 +31,15 @@ extern int mp_bus_id_to_local[MAX_MP_BUSSES];
 extern int quad_local_to_mp_bus_id [NR_CPUS/4][4];
 #endif
 
-#define MAX_APICID 256
+#define MAX_APICID              256
 
-#else
+#else /* CONFIG_X86_64: */
 
-#define MAX_MP_BUSSES 256
+#define MAX_MP_BUSSES           256
 /* Each PCI slot may be a combo card with its own bus.  4 IRQ pins per slot. */
-#define MAX_IRQ_SOURCES (MAX_MP_BUSSES * 4)
+#define MAX_IRQ_SOURCES         (MAX_MP_BUSSES * 4)
 
-#endif
+#endif /* CONFIG_X86_64 */
 
 extern void early_find_smp_config(void);
 extern void early_get_smp_config(void);
@@ -45,11 +56,13 @@ extern int smp_found_config;
 extern int mpc_default_type;
 extern unsigned long mp_lapic_addr;
 
-extern void find_smp_config(void);
 extern void get_smp_config(void);
+
 #ifdef CONFIG_X86_MPPARSE
+extern void find_smp_config(void);
 extern void early_reserve_e820_mpc_new(void);
 #else
+static inline void find_smp_config(void) { }
 static inline void early_reserve_e820_mpc_new(void) { }
 #endif
 
@@ -64,6 +77,8 @@ extern int acpi_probe_gsi(void);
 #ifdef CONFIG_X86_IO_APIC
 extern int mp_config_acpi_gsi(unsigned char number, unsigned int devfn, u8 pin,
                                 u32 gsi, int triggering, int polarity);
+extern int mp_find_ioapic(int gsi);
+extern int mp_find_ioapic_pin(int ioapic, int gsi);
 #else
 static inline int
 mp_config_acpi_gsi(unsigned char number, unsigned int devfn, u8 pin,
@@ -148,4 +163,8 @@ static inline void physid_set_mask_of_physid(int physid, physid_mask_t *map)
 
 extern physid_mask_t phys_cpu_present_map;
 
+extern int generic_mps_oem_check(struct mpc_table *, char *, char *);
+
+extern int default_acpi_madt_oem_check(char *, char *);
+
 #endif /* _ASM_X86_MPSPEC_H */
diff --git a/arch/x86/include/asm/mpspec_def.h b/arch/x86/include/asm/mpspec_def.h
index 59568bc4767f..4a7f96d7c188 100644
--- a/arch/x86/include/asm/mpspec_def.h
+++ b/arch/x86/include/asm/mpspec_def.h
@@ -24,17 +24,18 @@
 # endif
 #endif
 
-struct intel_mp_floating {
-        char mpf_signature[4];          /* "_MP_"                       */
-        unsigned int mpf_physptr;       /* Configuration table address  */
-        unsigned char mpf_length;       /* Our length (paragraphs)      */
-        unsigned char mpf_specification;/* Specification version        */
-        unsigned char mpf_checksum;     /* Checksum (makes sum 0)       */
-        unsigned char mpf_feature1;     /* Standard or configuration ?  */
-        unsigned char mpf_feature2;     /* Bit7 set for IMCR|PIC        */
-        unsigned char mpf_feature3;     /* Unused (0)                   */
-        unsigned char mpf_feature4;     /* Unused (0)                   */
-        unsigned char mpf_feature5;     /* Unused (0)                   */
+/* Intel MP Floating Pointer Structure */
+struct mpf_intel {
+        char signature[4];              /* "_MP_"                       */
+        unsigned int physptr;           /* Configuration table address  */
+        unsigned char length;           /* Our length (paragraphs)      */
+        unsigned char specification;    /* Specification version        */
+        unsigned char checksum;         /* Checksum (makes sum 0)       */
+        unsigned char feature1;         /* Standard or configuration ?  */
+        unsigned char feature2;         /* Bit7 set for IMCR|PIC        */
+        unsigned char feature3;         /* Unused (0)                   */
+        unsigned char feature4;         /* Unused (0)                   */
+        unsigned char feature5;         /* Unused (0)                   */
 };
 
 #define MPC_SIGNATURE "PCMP"
diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
index 358acc59ae04..f4e505f286bc 100644
--- a/arch/x86/include/asm/msr-index.h
+++ b/arch/x86/include/asm/msr-index.h
@@ -18,11 +18,15 @@
 #define _EFER_LME               8  /* Long mode enable */
 #define _EFER_LMA               10 /* Long mode active (read-only) */
 #define _EFER_NX                11 /* No execute enable */
+#define _EFER_SVME              12 /* Enable virtualization */
+#define _EFER_FFXSR             14 /* Enable Fast FXSAVE/FXRSTOR */
 
 #define EFER_SCE                (1<<_EFER_SCE)
 #define EFER_LME                (1<<_EFER_LME)
 #define EFER_LMA                (1<<_EFER_LMA)
 #define EFER_NX                 (1<<_EFER_NX)
+#define EFER_SVME               (1<<_EFER_SVME)
+#define EFER_FFXSR              (1<<_EFER_FFXSR)
 
 /* Intel MSRs. Some also available on other CPUs */
 #define MSR_IA32_PERFCTR0               0x000000c1
@@ -360,4 +364,9 @@
 #define MSR_IA32_VMX_PROCBASED_CTLS2    0x0000048b
 #define MSR_IA32_VMX_EPT_VPID_CAP       0x0000048c
 
+/* AMD-V MSRs */
+
+#define MSR_VM_CR                       0xc0010114
+#define MSR_VM_HSAVE_PA                 0xc0010117
+
 #endif /* _ASM_X86_MSR_INDEX_H */
diff --git a/arch/x86/include/asm/numa_32.h b/arch/x86/include/asm/numa_32.h
index e9f5db796244..a37229011b56 100644
--- a/arch/x86/include/asm/numa_32.h
+++ b/arch/x86/include/asm/numa_32.h
@@ -4,8 +4,12 @@
 extern int pxm_to_nid(int pxm);
 extern void numa_remove_cpu(int cpu);
 
-#ifdef CONFIG_NUMA
+#ifdef CONFIG_HIGHMEM
 extern void set_highmem_pages_init(void);
+#else
+static inline void set_highmem_pages_init(void)
+{
+}
 #endif
 
 #endif /* _ASM_X86_NUMA_32_H */
diff --git a/arch/x86/include/asm/numaq.h b/arch/x86/include/asm/numaq.h
index 1e8bd30b4c16..9f0a5f5d29ec 100644
--- a/arch/x86/include/asm/numaq.h
+++ b/arch/x86/include/asm/numaq.h
@@ -31,6 +31,8 @@
 extern int found_numaq;
 extern int get_memcfg_numaq(void);
 
+extern void *xquad_portio;
+
 /*
  * SYS_CFG_DATA_PRIV_ADDR, struct eachquadmem, and struct sys_cfg_data are the
  */
diff --git a/arch/x86/include/asm/numaq/apic.h b/arch/x86/include/asm/numaq/apic.h
deleted file mode 100644
index bf37bc49bd8e..000000000000
--- a/arch/x86/include/asm/numaq/apic.h
+++ /dev/null
@@ -1,142 +0,0 @@
-#ifndef __ASM_NUMAQ_APIC_H
-#define __ASM_NUMAQ_APIC_H
-
-#include <asm/io.h>
-#include <linux/mmzone.h>
-#include <linux/nodemask.h>
-
-#define APIC_DFR_VALUE  (APIC_DFR_CLUSTER)
-
-static inline const cpumask_t *target_cpus(void)
-{
-        return &CPU_MASK_ALL;
-}
-
-#define NO_BALANCE_IRQ (1)
-#define esr_disable (1)
-
-#define INT_DELIVERY_MODE dest_LowestPrio
-#define INT_DEST_MODE 0     /* physical delivery on LOCAL quad */
- 
-static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid)
-{
-        return physid_isset(apicid, bitmap);
-}
-static inline unsigned long check_apicid_present(int bit)
-{
-        return physid_isset(bit, phys_cpu_present_map);
-}
-#define apicid_cluster(apicid) (apicid & 0xF0)
-
-static inline int apic_id_registered(void)
-{
-        return 1;
-}
-
-static inline void init_apic_ldr(void)
-{
-        /* Already done in NUMA-Q firmware */
-}
-
-static inline void setup_apic_routing(void)
-{
-        printk("Enabling APIC mode:  %s.  Using %d I/O APICs\n",
-                "NUMA-Q", nr_ioapics);
-}
-
-/*
- * Skip adding the timer int on secondary nodes, which causes
- * a small but painful rift in the time-space continuum.
- */
-static inline int multi_timer_check(int apic, int irq)
-{
-        return apic != 0 && irq == 0;
-}
-
-static inline physid_mask_t ioapic_phys_id_map(physid_mask_t phys_map)
-{
-        /* We don't have a good way to do this yet - hack */
-        return physids_promote(0xFUL);
-}
-
-/* Mapping from cpu number to logical apicid */
-extern u8 cpu_2_logical_apicid[];
-static inline int cpu_to_logical_apicid(int cpu)
-{
-        if (cpu >= nr_cpu_ids)
-                return BAD_APICID;
-        return (int)cpu_2_logical_apicid[cpu];
-}
-
-/*
- * Supporting over 60 cpus on NUMA-Q requires a locality-dependent
- * cpu to APIC ID relation to properly interact with the intelligent
- * mode of the cluster controller.
- */
-static inline int cpu_present_to_apicid(int mps_cpu)
-{
-        if (mps_cpu < 60)
-                return ((mps_cpu >> 2) << 4) | (1 << (mps_cpu & 0x3));
-        else
-                return BAD_APICID;
-}
-
-static inline int apicid_to_node(int logical_apicid) 
-{
-        return logical_apicid >> 4;
-}
-
-static inline physid_mask_t apicid_to_cpu_present(int logical_apicid)
-{
-        int node = apicid_to_node(logical_apicid);
-        int cpu = __ffs(logical_apicid & 0xf);
-
-        return physid_mask_of_physid(cpu + 4*node);
-}
-
-extern void *xquad_portio;
-
-static inline void setup_portio_remap(void)
-{
-        int num_quads = num_online_nodes();
-
-        if (num_quads <= 1)
-                return;
-
-        printk("Remapping cross-quad port I/O for %d quads\n", num_quads);
-        xquad_portio = ioremap(XQUAD_PORTIO_BASE, num_quads*XQUAD_PORTIO_QUAD);
-        printk("xquad_portio vaddr 0x%08lx, len %08lx\n",
-                (u_long) xquad_portio, (u_long) num_quads*XQUAD_PORTIO_QUAD);
-}
-
-static inline int check_phys_apicid_present(int boot_cpu_physical_apicid)
-{
-        return (1);
-}
-
-static inline void enable_apic_mode(void)
-{
-}
-
-/*
- * We use physical apicids here, not logical, so just return the default
- * physical broadcast to stop people from breaking us
- */
-static inline unsigned int cpu_mask_to_apicid(const cpumask_t *cpumask)
-{
-        return (int) 0xF;
-}
-
-static inline unsigned int cpu_mask_to_apicid_and(const struct cpumask *cpumask,
-                                                  const struct cpumask *andmask)
-{
-        return (int) 0xF;
-}
-
-/* No NUMA-Q box has a HT CPU, but it can't hurt to use the default code. */
-static inline u32 phys_pkg_id(u32 cpuid_apic, int index_msb)
-{
-        return cpuid_apic >> index_msb;
-}
-
-#endif /* __ASM_NUMAQ_APIC_H */
diff --git a/arch/x86/include/asm/numaq/apicdef.h b/arch/x86/include/asm/numaq/apicdef.h
deleted file mode 100644
index e012a46cc22a..000000000000
--- a/arch/x86/include/asm/numaq/apicdef.h
+++ /dev/null
@@ -1,14 +0,0 @@
-#ifndef __ASM_NUMAQ_APICDEF_H
-#define __ASM_NUMAQ_APICDEF_H
-
-
-#define APIC_ID_MASK (0xF<<24)
-
-static inline unsigned get_apic_id(unsigned long x)
-{
-                return (((x)>>24)&0x0F);
-}
-
-#define         GET_APIC_ID(x)  get_apic_id(x)
-
-#endif
diff --git a/arch/x86/include/asm/numaq/ipi.h b/arch/x86/include/asm/numaq/ipi.h
deleted file mode 100644
index a8374c652778..000000000000
--- a/arch/x86/include/asm/numaq/ipi.h
+++ /dev/null
@@ -1,22 +0,0 @@
-#ifndef __ASM_NUMAQ_IPI_H
-#define __ASM_NUMAQ_IPI_H
-
-void send_IPI_mask_sequence(const struct cpumask *mask, int vector);
-void send_IPI_mask_allbutself(const struct cpumask *mask, int vector);
-
-static inline void send_IPI_mask(const struct cpumask *mask, int vector)
-{
-        send_IPI_mask_sequence(mask, vector);
-}
-
-static inline void send_IPI_allbutself(int vector)
-{
-        send_IPI_mask_allbutself(cpu_online_mask, vector);
-}
-
-static inline void send_IPI_all(int vector)
-{
-        send_IPI_mask(cpu_online_mask, vector);
-}
-
-#endif /* __ASM_NUMAQ_IPI_H */
diff --git a/arch/x86/include/asm/numaq/mpparse.h b/arch/x86/include/asm/numaq/mpparse.h
deleted file mode 100644
index a2eeefcd1cc7..000000000000
--- a/arch/x86/include/asm/numaq/mpparse.h
+++ /dev/null
@@ -1,6 +0,0 @@
-#ifndef __ASM_NUMAQ_MPPARSE_H
-#define __ASM_NUMAQ_MPPARSE_H
-
-extern void numaq_mps_oem_check(struct mpc_table *, char *, char *);
-
-#endif /* __ASM_NUMAQ_MPPARSE_H */
diff --git a/arch/x86/include/asm/numaq/wakecpu.h b/arch/x86/include/asm/numaq/wakecpu.h
deleted file mode 100644
index 6f499df8eddb..000000000000
--- a/arch/x86/include/asm/numaq/wakecpu.h
+++ /dev/null
@@ -1,45 +0,0 @@
-#ifndef __ASM_NUMAQ_WAKECPU_H
-#define __ASM_NUMAQ_WAKECPU_H
-
-/* This file copes with machines that wakeup secondary CPUs by NMIs */
-
-#define TRAMPOLINE_PHYS_LOW (0x8)
-#define TRAMPOLINE_PHYS_HIGH (0xa)
-
-/* We don't do anything here because we use NMI's to boot instead */
-static inline void wait_for_init_deassert(atomic_t *deassert)
-{
-}
-
-/*
- * Because we use NMIs rather than the INIT-STARTUP sequence to
- * bootstrap the CPUs, the APIC may be in a weird state. Kick it.
- */
-static inline void smp_callin_clear_local_apic(void)
-{
-        clear_local_APIC();
-}
-
-static inline void store_NMI_vector(unsigned short *high, unsigned short *low)
-{
-        printk("Storing NMI vector\n");
-        *high =
-          *((volatile unsigned short *)phys_to_virt(TRAMPOLINE_PHYS_HIGH));
-        *low =
-          *((volatile unsigned short *)phys_to_virt(TRAMPOLINE_PHYS_LOW));
-}
-
-static inline void restore_NMI_vector(unsigned short *high, unsigned short *low)
-{
-        printk("Restoring NMI vector\n");
-        *((volatile unsigned short *)phys_to_virt(TRAMPOLINE_PHYS_HIGH)) =
-                                                                 *high;
-        *((volatile unsigned short *)phys_to_virt(TRAMPOLINE_PHYS_LOW)) =
-                                                                 *low;
-}
-
-static inline void inquire_remote_apic(int apicid)
-{
-}
-
-#endif /* __ASM_NUMAQ_WAKECPU_H */
diff --git a/arch/x86/include/asm/page.h b/arch/x86/include/asm/page.h
index 776579119a00..89ed9d70b0aa 100644
--- a/arch/x86/include/asm/page.h
+++ b/arch/x86/include/asm/page.h
@@ -1,42 +1,11 @@
 #ifndef _ASM_X86_PAGE_H
 #define _ASM_X86_PAGE_H
 
-#include <linux/const.h>
-
-/* PAGE_SHIFT determines the page size */
-#define PAGE_SHIFT      12
-#define PAGE_SIZE       (_AC(1,UL) << PAGE_SHIFT)
-#define PAGE_MASK       (~(PAGE_SIZE-1))
+#include <linux/types.h>
 
 #ifdef __KERNEL__
 
-#define __PHYSICAL_MASK         ((phys_addr_t)(1ULL << __PHYSICAL_MASK_SHIFT) - 1)
-#define __VIRTUAL_MASK          ((1UL << __VIRTUAL_MASK_SHIFT) - 1)
-
-/* Cast PAGE_MASK to a signed type so that it is sign-extended if
-   virtual addresses are 32-bits but physical addresses are larger
-   (ie, 32-bit PAE). */
-#define PHYSICAL_PAGE_MASK      (((signed long)PAGE_MASK) & __PHYSICAL_MASK)
-
-/* PTE_PFN_MASK extracts the PFN from a (pte|pmd|pud|pgd)val_t */
-#define PTE_PFN_MASK            ((pteval_t)PHYSICAL_PAGE_MASK)
-
-/* PTE_FLAGS_MASK extracts the flags from a (pte|pmd|pud|pgd)val_t */
-#define PTE_FLAGS_MASK          (~PTE_PFN_MASK)
-
-#define PMD_PAGE_SIZE           (_AC(1, UL) << PMD_SHIFT)
-#define PMD_PAGE_MASK           (~(PMD_PAGE_SIZE-1))
-
-#define HPAGE_SHIFT             PMD_SHIFT
-#define HPAGE_SIZE              (_AC(1,UL) << HPAGE_SHIFT)
-#define HPAGE_MASK              (~(HPAGE_SIZE - 1))
-#define HUGETLB_PAGE_ORDER      (HPAGE_SHIFT - PAGE_SHIFT)
-
-#define HUGE_MAX_HSTATE 2
-
-#ifndef __ASSEMBLY__
-#include <linux/types.h>
-#endif
+#include <asm/page_types.h>
 
 #ifdef CONFIG_X86_64
 #include <asm/page_64.h>
@@ -44,38 +13,18 @@
 #include <asm/page_32.h>
 #endif  /* CONFIG_X86_64 */
 
-#define PAGE_OFFSET             ((unsigned long)__PAGE_OFFSET)
-
-#define VM_DATA_DEFAULT_FLAGS \
-        (((current->personality & READ_IMPLIES_EXEC) ? VM_EXEC : 0 ) | \
-         VM_READ | VM_WRITE | VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
-
-
 #ifndef __ASSEMBLY__
 
-typedef struct { pgdval_t pgd; } pgd_t;
-typedef struct { pgprotval_t pgprot; } pgprot_t;
-
-extern int page_is_ram(unsigned long pagenr);
-extern int devmem_is_allowed(unsigned long pagenr);
-extern void map_devmem(unsigned long pfn, unsigned long size,
-                       pgprot_t vma_prot);
-extern void unmap_devmem(unsigned long pfn, unsigned long size,
-                         pgprot_t vma_prot);
-
-extern unsigned long max_low_pfn_mapped;
-extern unsigned long max_pfn_mapped;
-
 struct page;
 
 static inline void clear_user_page(void *page, unsigned long vaddr,
-                                struct page *pg)
+                                   struct page *pg)
 {
         clear_page(page);
 }
 
 static inline void copy_user_page(void *to, void *from, unsigned long vaddr,
-                                struct page *topage)
+                                  struct page *topage)
 {
         copy_page(to, from);
 }
@@ -84,99 +33,6 @@ static inline void copy_user_page(void *to, void *from, unsigned long vaddr,
         alloc_page_vma(GFP_HIGHUSER | __GFP_ZERO | movableflags, vma, vaddr)
 #define __HAVE_ARCH_ALLOC_ZEROED_USER_HIGHPAGE
 
-static inline pgd_t native_make_pgd(pgdval_t val)
-{
-        return (pgd_t) { val };
-}
-
-static inline pgdval_t native_pgd_val(pgd_t pgd)
-{
-        return pgd.pgd;
-}
-
-#if PAGETABLE_LEVELS >= 3
-#if PAGETABLE_LEVELS == 4
-typedef struct { pudval_t pud; } pud_t;
-
-static inline pud_t native_make_pud(pmdval_t val)
-{
-        return (pud_t) { val };
-}
-
-static inline pudval_t native_pud_val(pud_t pud)
-{
-        return pud.pud;
-}
-#else   /* PAGETABLE_LEVELS == 3 */
-#include <asm-generic/pgtable-nopud.h>
-
-static inline pudval_t native_pud_val(pud_t pud)
-{
-        return native_pgd_val(pud.pgd);
-}
-#endif  /* PAGETABLE_LEVELS == 4 */
-
-typedef struct { pmdval_t pmd; } pmd_t;
-
-static inline pmd_t native_make_pmd(pmdval_t val)
-{
-        return (pmd_t) { val };
-}
-
-static inline pmdval_t native_pmd_val(pmd_t pmd)
-{
-        return pmd.pmd;
-}
-#else  /* PAGETABLE_LEVELS == 2 */
-#include <asm-generic/pgtable-nopmd.h>
-
-static inline pmdval_t native_pmd_val(pmd_t pmd)
-{
-        return native_pgd_val(pmd.pud.pgd);
-}
-#endif  /* PAGETABLE_LEVELS >= 3 */
-
-static inline pte_t native_make_pte(pteval_t val)
-{
-        return (pte_t) { .pte = val };
-}
-
-static inline pteval_t native_pte_val(pte_t pte)
-{
-        return pte.pte;
-}
-
-static inline pteval_t native_pte_flags(pte_t pte)
-{
-        return native_pte_val(pte) & PTE_FLAGS_MASK;
-}
-
-#define pgprot_val(x)   ((x).pgprot)
-#define __pgprot(x)     ((pgprot_t) { (x) } )
-
-#ifdef CONFIG_PARAVIRT
-#include <asm/paravirt.h>
-#else  /* !CONFIG_PARAVIRT */
-
-#define pgd_val(x)      native_pgd_val(x)
-#define __pgd(x)        native_make_pgd(x)
-
-#ifndef __PAGETABLE_PUD_FOLDED
-#define pud_val(x)      native_pud_val(x)
-#define __pud(x)        native_make_pud(x)
-#endif
-
-#ifndef __PAGETABLE_PMD_FOLDED
-#define pmd_val(x)      native_pmd_val(x)
-#define __pmd(x)        native_make_pmd(x)
-#endif
-
-#define pte_val(x)      native_pte_val(x)
-#define pte_flags(x)    native_pte_flags(x)
-#define __pte(x)        native_make_pte(x)
-
-#endif  /* CONFIG_PARAVIRT */
-
 #define __pa(x)         __phys_addr((unsigned long)(x))
 #define __pa_nodebug(x) __phys_addr_nodebug((unsigned long)(x))
 /* __pa_symbol should be used for C visible symbols.
diff --git a/arch/x86/include/asm/page_32.h b/arch/x86/include/asm/page_32.h
index bcde0d7b4325..da4e762406f7 100644
--- a/arch/x86/include/asm/page_32.h
+++ b/arch/x86/include/asm/page_32.h
@@ -1,82 +1,14 @@
 #ifndef _ASM_X86_PAGE_32_H
 #define _ASM_X86_PAGE_32_H
 
-/*
- * This handles the memory map.
- *
- * A __PAGE_OFFSET of 0xC0000000 means that the kernel has
- * a virtual address space of one gigabyte, which limits the
- * amount of physical memory you can use to about 950MB.
- *
- * If you want more physical memory than this then see the CONFIG_HIGHMEM4G
- * and CONFIG_HIGHMEM64G options in the kernel configuration.
- */
-#define __PAGE_OFFSET           _AC(CONFIG_PAGE_OFFSET, UL)
-
-#ifdef CONFIG_4KSTACKS
-#define THREAD_ORDER    0
-#else
-#define THREAD_ORDER    1
-#endif
-#define THREAD_SIZE     (PAGE_SIZE << THREAD_ORDER)
-
-#define STACKFAULT_STACK 0
-#define DOUBLEFAULT_STACK 1
-#define NMI_STACK 0
-#define DEBUG_STACK 0
-#define MCE_STACK 0
-#define N_EXCEPTION_STACKS 1
-
-#ifdef CONFIG_X86_PAE
-/* 44=32+12, the limit we can fit into an unsigned long pfn */
-#define __PHYSICAL_MASK_SHIFT   44
-#define __VIRTUAL_MASK_SHIFT    32
-#define PAGETABLE_LEVELS        3
-
-#ifndef __ASSEMBLY__
-typedef u64     pteval_t;
-typedef u64     pmdval_t;
-typedef u64     pudval_t;
-typedef u64     pgdval_t;
-typedef u64     pgprotval_t;
-
-typedef union {
-        struct {
-                unsigned long pte_low, pte_high;
-        };
-        pteval_t pte;
-} pte_t;
-#endif  /* __ASSEMBLY__
- */
-#else  /* !CONFIG_X86_PAE */
-#define __PHYSICAL_MASK_SHIFT   32
-#define __VIRTUAL_MASK_SHIFT    32
-#define PAGETABLE_LEVELS        2
-
-#ifndef __ASSEMBLY__
-typedef unsigned long   pteval_t;
-typedef unsigned long   pmdval_t;
-typedef unsigned long   pudval_t;
-typedef unsigned long   pgdval_t;
-typedef unsigned long   pgprotval_t;
-
-typedef union {
-        pteval_t pte;
-        pteval_t pte_low;
-} pte_t;
-
-#endif  /* __ASSEMBLY__ */
-#endif  /* CONFIG_X86_PAE */
+#include <asm/page_32_types.h>
 
 #ifndef __ASSEMBLY__
-typedef struct page *pgtable_t;
-#endif
 
 #ifdef CONFIG_HUGETLB_PAGE
 #define HAVE_ARCH_HUGETLB_UNMAPPED_AREA
 #endif
 
-#ifndef __ASSEMBLY__
 #define __phys_addr_nodebug(x)  ((x) - PAGE_OFFSET)
 #ifdef CONFIG_DEBUG_VIRTUAL
 extern unsigned long __phys_addr(unsigned long);
@@ -89,23 +21,6 @@ extern unsigned long __phys_addr(unsigned long);
 #define pfn_valid(pfn)          ((pfn) < max_mapnr)
 #endif /* CONFIG_FLATMEM */
 
-extern int nx_enabled;
-
-/*
- * This much address space is reserved for vmalloc() and iomap()
- * as well as fixmap mappings.
- */
-extern unsigned int __VMALLOC_RESERVE;
-extern int sysctl_legacy_va_layout;
-
-extern void find_low_pfn_range(void);
-extern unsigned long init_memory_mapping(unsigned long start,
-                                         unsigned long end);
-extern void initmem_init(unsigned long, unsigned long);
-extern void free_initmem(void);
-extern void setup_bootmem_allocator(void);
-
-
 #ifdef CONFIG_X86_USE_3DNOW
 #include <asm/mmx.h>
 
diff --git a/arch/x86/include/asm/page_32_types.h b/arch/x86/include/asm/page_32_types.h
new file mode 100644
index 000000000000..f1e4a79a6e41
--- /dev/null
+++ b/arch/x86/include/asm/page_32_types.h
@@ -0,0 +1,60 @@
+#ifndef _ASM_X86_PAGE_32_DEFS_H
+#define _ASM_X86_PAGE_32_DEFS_H
+
+#include <linux/const.h>
+
+/*
+ * This handles the memory map.
+ *
+ * A __PAGE_OFFSET of 0xC0000000 means that the kernel has
+ * a virtual address space of one gigabyte, which limits the
+ * amount of physical memory you can use to about 950MB.
+ *
+ * If you want more physical memory than this then see the CONFIG_HIGHMEM4G
+ * and CONFIG_HIGHMEM64G options in the kernel configuration.
+ */
+#define __PAGE_OFFSET           _AC(CONFIG_PAGE_OFFSET, UL)
+
+#ifdef CONFIG_4KSTACKS
+#define THREAD_ORDER    0
+#else
+#define THREAD_ORDER    1
+#endif
+#define THREAD_SIZE     (PAGE_SIZE << THREAD_ORDER)
+
+#define STACKFAULT_STACK 0
+#define DOUBLEFAULT_STACK 1
+#define NMI_STACK 0
+#define DEBUG_STACK 0
+#define MCE_STACK 0
+#define N_EXCEPTION_STACKS 1
+
+#ifdef CONFIG_X86_PAE
+/* 44=32+12, the limit we can fit into an unsigned long pfn */
+#define __PHYSICAL_MASK_SHIFT   44
+#define __VIRTUAL_MASK_SHIFT    32
+
+#else  /* !CONFIG_X86_PAE */
+#define __PHYSICAL_MASK_SHIFT   32
+#define __VIRTUAL_MASK_SHIFT    32
+#endif  /* CONFIG_X86_PAE */
+
+#ifndef __ASSEMBLY__
+
+/*
+ * This much address space is reserved for vmalloc() and iomap()
+ * as well as fixmap mappings.
+ */
+extern unsigned int __VMALLOC_RESERVE;
+extern int sysctl_legacy_va_layout;
+
+extern void find_low_pfn_range(void);
+extern unsigned long init_memory_mapping(unsigned long start,
+                                         unsigned long end);
+extern void initmem_init(unsigned long, unsigned long);
+extern void free_initmem(void);
+extern void setup_bootmem_allocator(void);
+
+#endif  /* !__ASSEMBLY__ */
+
+#endif /* _ASM_X86_PAGE_32_DEFS_H */
diff --git a/arch/x86/include/asm/page_64.h b/arch/x86/include/asm/page_64.h
index 5ebca29f44f0..072694ed81a5 100644
--- a/arch/x86/include/asm/page_64.h
+++ b/arch/x86/include/asm/page_64.h
@@ -1,105 +1,6 @@
 #ifndef _ASM_X86_PAGE_64_H
 #define _ASM_X86_PAGE_64_H
 
-#define PAGETABLE_LEVELS        4
-
-#define THREAD_ORDER    1
-#define THREAD_SIZE  (PAGE_SIZE << THREAD_ORDER)
-#define CURRENT_MASK (~(THREAD_SIZE - 1))
-
-#define EXCEPTION_STACK_ORDER 0
-#define EXCEPTION_STKSZ (PAGE_SIZE << EXCEPTION_STACK_ORDER)
-
-#define DEBUG_STACK_ORDER (EXCEPTION_STACK_ORDER + 1)
-#define DEBUG_STKSZ (PAGE_SIZE << DEBUG_STACK_ORDER)
-
-#define IRQSTACK_ORDER 2
-#define IRQSTACKSIZE (PAGE_SIZE << IRQSTACK_ORDER)
-
-#define STACKFAULT_STACK 1
-#define DOUBLEFAULT_STACK 2
-#define NMI_STACK 3
-#define DEBUG_STACK 4
-#define MCE_STACK 5
-#define N_EXCEPTION_STACKS 5  /* hw limit: 7 */
-
-#define PUD_PAGE_SIZE           (_AC(1, UL) << PUD_SHIFT)
-#define PUD_PAGE_MASK           (~(PUD_PAGE_SIZE-1))
-
-/*
- * Set __PAGE_OFFSET to the most negative possible address +
- * PGDIR_SIZE*16 (pgd slot 272).  The gap is to allow a space for a
- * hypervisor to fit.  Choosing 16 slots here is arbitrary, but it's
- * what Xen requires.
- */
-#define __PAGE_OFFSET           _AC(0xffff880000000000, UL)
-
-#define __PHYSICAL_START        CONFIG_PHYSICAL_START
-#define __KERNEL_ALIGN          0x200000
-
-/*
- * Make sure kernel is aligned to 2MB address. Catching it at compile
- * time is better. Change your config file and compile the kernel
- * for a 2MB aligned address (CONFIG_PHYSICAL_START)
- */
-#if (CONFIG_PHYSICAL_START % __KERNEL_ALIGN) != 0
-#error "CONFIG_PHYSICAL_START must be a multiple of 2MB"
-#endif
-
-#define __START_KERNEL          (__START_KERNEL_map + __PHYSICAL_START)
-#define __START_KERNEL_map      _AC(0xffffffff80000000, UL)
-
-/* See Documentation/x86_64/mm.txt for a description of the memory map. */
-#define __PHYSICAL_MASK_SHIFT   46
-#define __VIRTUAL_MASK_SHIFT    48
-
-/*
- * Kernel image size is limited to 512 MB (see level2_kernel_pgt in
- * arch/x86/kernel/head_64.S), and it is mapped here:
- */
-#define KERNEL_IMAGE_SIZE       (512 * 1024 * 1024)
-#define KERNEL_IMAGE_START      _AC(0xffffffff80000000, UL)
-
-#ifndef __ASSEMBLY__
-void clear_page(void *page);
-void copy_page(void *to, void *from);
-
-/* duplicated to the one in bootmem.h */
-extern unsigned long max_pfn;
-extern unsigned long phys_base;
-
-extern unsigned long __phys_addr(unsigned long);
-#define __phys_reloc_hide(x)    (x)
-
-/*
- * These are used to make use of C type-checking..
- */
-typedef unsigned long   pteval_t;
-typedef unsigned long   pmdval_t;
-typedef unsigned long   pudval_t;
-typedef unsigned long   pgdval_t;
-typedef unsigned long   pgprotval_t;
-
-typedef struct page *pgtable_t;
-
-typedef struct { pteval_t pte; } pte_t;
-
-#define vmemmap ((struct page *)VMEMMAP_START)
-
-extern unsigned long init_memory_mapping(unsigned long start,
-                                         unsigned long end);
-
-extern void initmem_init(unsigned long start_pfn, unsigned long end_pfn);
-extern void free_initmem(void);
-
-extern void init_extra_mapping_uc(unsigned long phys, unsigned long size);
-extern void init_extra_mapping_wb(unsigned long phys, unsigned long size);
-
-#endif  /* !__ASSEMBLY__ */
-
-#ifdef CONFIG_FLATMEM
-#define pfn_valid(pfn)          ((pfn) < max_pfn)
-#endif
-
+#include <asm/page_64_types.h>
 
 #endif /* _ASM_X86_PAGE_64_H */
diff --git a/arch/x86/include/asm/page_64_types.h b/arch/x86/include/asm/page_64_types.h
new file mode 100644
index 000000000000..d38c91b70248
--- /dev/null
+++ b/arch/x86/include/asm/page_64_types.h
@@ -0,0 +1,89 @@
+#ifndef _ASM_X86_PAGE_64_DEFS_H
+#define _ASM_X86_PAGE_64_DEFS_H
+
+#define THREAD_ORDER    1
+#define THREAD_SIZE  (PAGE_SIZE << THREAD_ORDER)
+#define CURRENT_MASK (~(THREAD_SIZE - 1))
+
+#define EXCEPTION_STACK_ORDER 0
+#define EXCEPTION_STKSZ (PAGE_SIZE << EXCEPTION_STACK_ORDER)
+
+#define DEBUG_STACK_ORDER (EXCEPTION_STACK_ORDER + 1)
+#define DEBUG_STKSZ (PAGE_SIZE << DEBUG_STACK_ORDER)
+
+#define IRQ_STACK_ORDER 2
+#define IRQ_STACK_SIZE (PAGE_SIZE << IRQ_STACK_ORDER)
+
+#define STACKFAULT_STACK 1
+#define DOUBLEFAULT_STACK 2
+#define NMI_STACK 3
+#define DEBUG_STACK 4
+#define MCE_STACK 5
+#define N_EXCEPTION_STACKS 5  /* hw limit: 7 */
+
+#define PUD_PAGE_SIZE           (_AC(1, UL) << PUD_SHIFT)
+#define PUD_PAGE_MASK           (~(PUD_PAGE_SIZE-1))
+
+/*
+ * Set __PAGE_OFFSET to the most negative possible address +
+ * PGDIR_SIZE*16 (pgd slot 272).  The gap is to allow a space for a
+ * hypervisor to fit.  Choosing 16 slots here is arbitrary, but it's
+ * what Xen requires.
+ */
+#define __PAGE_OFFSET           _AC(0xffff880000000000, UL)
+
+#define __PHYSICAL_START        CONFIG_PHYSICAL_START
+#define __KERNEL_ALIGN          0x200000
+
+/*
+ * Make sure kernel is aligned to 2MB address. Catching it at compile
+ * time is better. Change your config file and compile the kernel
+ * for a 2MB aligned address (CONFIG_PHYSICAL_START)
+ */
+#if (CONFIG_PHYSICAL_START % __KERNEL_ALIGN) != 0
+#error "CONFIG_PHYSICAL_START must be a multiple of 2MB"
+#endif
+
+#define __START_KERNEL          (__START_KERNEL_map + __PHYSICAL_START)
+#define __START_KERNEL_map      _AC(0xffffffff80000000, UL)
+
+/* See Documentation/x86_64/mm.txt for a description of the memory map. */
+#define __PHYSICAL_MASK_SHIFT   46
+#define __VIRTUAL_MASK_SHIFT    48
+
+/*
+ * Kernel image size is limited to 512 MB (see level2_kernel_pgt in
+ * arch/x86/kernel/head_64.S), and it is mapped here:
+ */
+#define KERNEL_IMAGE_SIZE       (512 * 1024 * 1024)
+#define KERNEL_IMAGE_START      _AC(0xffffffff80000000, UL)
+
+#ifndef __ASSEMBLY__
+void clear_page(void *page);
+void copy_page(void *to, void *from);
+
+/* duplicated to the one in bootmem.h */
+extern unsigned long max_pfn;
+extern unsigned long phys_base;
+
+extern unsigned long __phys_addr(unsigned long);
+#define __phys_reloc_hide(x)    (x)
+
+#define vmemmap ((struct page *)VMEMMAP_START)
+
+extern unsigned long init_memory_mapping(unsigned long start,
+                                         unsigned long end);
+
+extern void initmem_init(unsigned long start_pfn, unsigned long end_pfn);
+extern void free_initmem(void);
+
+extern void init_extra_mapping_uc(unsigned long phys, unsigned long size);
+extern void init_extra_mapping_wb(unsigned long phys, unsigned long size);
+
+#endif  /* !__ASSEMBLY__ */
+
+#ifdef CONFIG_FLATMEM
+#define pfn_valid(pfn)          ((pfn) < max_pfn)
+#endif
+
+#endif /* _ASM_X86_PAGE_64_DEFS_H */
diff --git a/arch/x86/include/asm/page_types.h b/arch/x86/include/asm/page_types.h
new file mode 100644
index 000000000000..2d625da6603c
--- /dev/null
+++ b/arch/x86/include/asm/page_types.h
@@ -0,0 +1,57 @@
+#ifndef _ASM_X86_PAGE_DEFS_H
+#define _ASM_X86_PAGE_DEFS_H
+
+#include <linux/const.h>
+
+/* PAGE_SHIFT determines the page size */
+#define PAGE_SHIFT      12
+#define PAGE_SIZE       (_AC(1,UL) << PAGE_SHIFT)
+#define PAGE_MASK       (~(PAGE_SIZE-1))
+
+#define __PHYSICAL_MASK         ((phys_addr_t)(1ULL << __PHYSICAL_MASK_SHIFT) - 1)
+#define __VIRTUAL_MASK          ((1UL << __VIRTUAL_MASK_SHIFT) - 1)
+
+/* Cast PAGE_MASK to a signed type so that it is sign-extended if
+   virtual addresses are 32-bits but physical addresses are larger
+   (ie, 32-bit PAE). */
+#define PHYSICAL_PAGE_MASK      (((signed long)PAGE_MASK) & __PHYSICAL_MASK)
+
+#define PMD_PAGE_SIZE           (_AC(1, UL) << PMD_SHIFT)
+#define PMD_PAGE_MASK           (~(PMD_PAGE_SIZE-1))
+
+#define HPAGE_SHIFT             PMD_SHIFT
+#define HPAGE_SIZE              (_AC(1,UL) << HPAGE_SHIFT)
+#define HPAGE_MASK              (~(HPAGE_SIZE - 1))
+#define HUGETLB_PAGE_ORDER      (HPAGE_SHIFT - PAGE_SHIFT)
+
+#define HUGE_MAX_HSTATE 2
+
+#define PAGE_OFFSET             ((unsigned long)__PAGE_OFFSET)
+
+#define VM_DATA_DEFAULT_FLAGS \
+        (((current->personality & READ_IMPLIES_EXEC) ? VM_EXEC : 0 ) | \
+         VM_READ | VM_WRITE | VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
+
+#ifdef CONFIG_X86_64
+#include <asm/page_64_types.h>
+#else
+#include <asm/page_32_types.h>
+#endif  /* CONFIG_X86_64 */
+
+#ifndef __ASSEMBLY__
+
+struct pgprot;
+
+extern int page_is_ram(unsigned long pagenr);
+extern int devmem_is_allowed(unsigned long pagenr);
+extern void map_devmem(unsigned long pfn, unsigned long size,
+                       struct pgprot vma_prot);
+extern void unmap_devmem(unsigned long pfn, unsigned long size,
+                         struct pgprot vma_prot);
+
+extern unsigned long max_low_pfn_mapped;
+extern unsigned long max_pfn_mapped;
+
+#endif  /* !__ASSEMBLY__ */
+
+#endif  /* _ASM_X86_PAGE_DEFS_H */
diff --git a/arch/x86/include/asm/paravirt.h b/arch/x86/include/asm/paravirt.h
index e299287e8e33..0617d5cc9712 100644
--- a/arch/x86/include/asm/paravirt.h
+++ b/arch/x86/include/asm/paravirt.h
@@ -4,7 +4,7 @@
  * para-virtualization: those hooks are defined here. */
 
 #ifdef CONFIG_PARAVIRT
-#include <asm/page.h>
+#include <asm/pgtable_types.h>
 #include <asm/asm.h>
 
 /* Bitmask of what can be clobbered: usually at least eax. */
@@ -12,21 +12,38 @@
 #define CLBR_EAX  (1 << 0)
 #define CLBR_ECX  (1 << 1)
 #define CLBR_EDX  (1 << 2)
+#define CLBR_EDI  (1 << 3)
 
-#ifdef CONFIG_X86_64
-#define CLBR_RSI  (1 << 3)
-#define CLBR_RDI  (1 << 4)
+#ifdef CONFIG_X86_32
+/* CLBR_ANY should match all regs platform has. For i386, that's just it */
+#define CLBR_ANY  ((1 << 4) - 1)
+
+#define CLBR_ARG_REGS   (CLBR_EAX | CLBR_EDX | CLBR_ECX)
+#define CLBR_RET_REG    (CLBR_EAX | CLBR_EDX)
+#define CLBR_SCRATCH    (0)
+#else
+#define CLBR_RAX  CLBR_EAX
+#define CLBR_RCX  CLBR_ECX
+#define CLBR_RDX  CLBR_EDX
+#define CLBR_RDI  CLBR_EDI
+#define CLBR_RSI  (1 << 4)
 #define CLBR_R8   (1 << 5)
 #define CLBR_R9   (1 << 6)
 #define CLBR_R10  (1 << 7)
 #define CLBR_R11  (1 << 8)
+
 #define CLBR_ANY  ((1 << 9) - 1)
+
+#define CLBR_ARG_REGS   (CLBR_RDI | CLBR_RSI | CLBR_RDX | \
+                         CLBR_RCX | CLBR_R8 | CLBR_R9)
+#define CLBR_RET_REG    (CLBR_RAX)
+#define CLBR_SCRATCH    (CLBR_R10 | CLBR_R11)
+
 #include <asm/desc_defs.h>
-#else
-/* CLBR_ANY should match all regs platform has. For i386, that's just it */
-#define CLBR_ANY  ((1 << 3) - 1)
 #endif /* X86_64 */
 
+#define CLBR_CALLEE_SAVE ((CLBR_ARG_REGS | CLBR_SCRATCH) & ~CLBR_RET_REG)
+
 #ifndef __ASSEMBLY__
 #include <linux/types.h>
 #include <linux/cpumask.h>
@@ -40,6 +57,14 @@ struct tss_struct;
 struct mm_struct;
 struct desc_struct;
 
+/*
+ * Wrapper type for pointers to code which uses the non-standard
+ * calling convention.  See PV_CALL_SAVE_REGS_THUNK below.
+ */
+struct paravirt_callee_save {
+        void *func;
+};
+
 /* general info */
 struct pv_info {
         unsigned int kernel_rpl;
@@ -189,11 +214,15 @@ struct pv_irq_ops {
          * expected to use X86_EFLAGS_IF; all other bits
          * returned from save_fl are undefined, and may be ignored by
          * restore_fl.
+         *
+         * NOTE: These functions callers expect the callee to preserve
+         * more registers than the standard C calling convention.
          */
-        unsigned long (*save_fl)(void);
-        void (*restore_fl)(unsigned long);
-        void (*irq_disable)(void);
-        void (*irq_enable)(void);
+        struct paravirt_callee_save save_fl;
+        struct paravirt_callee_save restore_fl;
+        struct paravirt_callee_save irq_disable;
+        struct paravirt_callee_save irq_enable;
+
         void (*safe_halt)(void);
         void (*halt)(void);
 
@@ -244,7 +273,8 @@ struct pv_mmu_ops {
         void (*flush_tlb_user)(void);
         void (*flush_tlb_kernel)(void);
         void (*flush_tlb_single)(unsigned long addr);
-        void (*flush_tlb_others)(const cpumask_t *cpus, struct mm_struct *mm,
+        void (*flush_tlb_others)(const struct cpumask *cpus,
+                                 struct mm_struct *mm,
                                  unsigned long va);
 
         /* Hooks for allocating and freeing a pagetable top-level */
@@ -278,12 +308,11 @@ struct pv_mmu_ops {
         void (*ptep_modify_prot_commit)(struct mm_struct *mm, unsigned long addr,
                                         pte_t *ptep, pte_t pte);
 
-        pteval_t (*pte_val)(pte_t);
-        pteval_t (*pte_flags)(pte_t);
-        pte_t (*make_pte)(pteval_t pte);
+        struct paravirt_callee_save pte_val;
+        struct paravirt_callee_save make_pte;
 
-        pgdval_t (*pgd_val)(pgd_t);
-        pgd_t (*make_pgd)(pgdval_t pgd);
+        struct paravirt_callee_save pgd_val;
+        struct paravirt_callee_save make_pgd;
 
 #if PAGETABLE_LEVELS >= 3
 #ifdef CONFIG_X86_PAE
@@ -298,12 +327,12 @@ struct pv_mmu_ops {
 
         void (*set_pud)(pud_t *pudp, pud_t pudval);
 
-        pmdval_t (*pmd_val)(pmd_t);
-        pmd_t (*make_pmd)(pmdval_t pmd);
+        struct paravirt_callee_save pmd_val;
+        struct paravirt_callee_save make_pmd;
 
 #if PAGETABLE_LEVELS == 4
-        pudval_t (*pud_val)(pud_t);
-        pud_t (*make_pud)(pudval_t pud);
+        struct paravirt_callee_save pud_val;
+        struct paravirt_callee_save make_pud;
 
         void (*set_pgd)(pgd_t *pudp, pgd_t pgdval);
 #endif  /* PAGETABLE_LEVELS == 4 */
@@ -388,6 +417,8 @@ extern struct pv_lock_ops pv_lock_ops;
         asm("start_" #ops "_" #name ": " code "; end_" #ops "_" #name ":")
 
 unsigned paravirt_patch_nop(void);
+unsigned paravirt_patch_ident_32(void *insnbuf, unsigned len);
+unsigned paravirt_patch_ident_64(void *insnbuf, unsigned len);
 unsigned paravirt_patch_ignore(unsigned len);
 unsigned paravirt_patch_call(void *insnbuf,
                              const void *target, u16 tgt_clobbers,
@@ -479,25 +510,45 @@ int paravirt_disable_iospace(void);
  * makes sure the incoming and outgoing types are always correct.
  */
 #ifdef CONFIG_X86_32
-#define PVOP_VCALL_ARGS                 unsigned long __eax, __edx, __ecx
+#define PVOP_VCALL_ARGS                         \
+        unsigned long __eax = __eax, __edx = __edx, __ecx = __ecx
 #define PVOP_CALL_ARGS                  PVOP_VCALL_ARGS
+
+#define PVOP_CALL_ARG1(x)               "a" ((unsigned long)(x))
+#define PVOP_CALL_ARG2(x)               "d" ((unsigned long)(x))
+#define PVOP_CALL_ARG3(x)               "c" ((unsigned long)(x))
+
 #define PVOP_VCALL_CLOBBERS             "=a" (__eax), "=d" (__edx),     \
                                         "=c" (__ecx)
 #define PVOP_CALL_CLOBBERS              PVOP_VCALL_CLOBBERS
+
+#define PVOP_VCALLEE_CLOBBERS           "=a" (__eax), "=d" (__edx)
+#define PVOP_CALLEE_CLOBBERS            PVOP_VCALLEE_CLOBBERS
+
 #define EXTRA_CLOBBERS
 #define VEXTRA_CLOBBERS
-#else
-#define PVOP_VCALL_ARGS         unsigned long __edi, __esi, __edx, __ecx
+#else  /* CONFIG_X86_64 */
+#define PVOP_VCALL_ARGS                                 \
+        unsigned long __edi = __edi, __esi = __esi,     \
+                __edx = __edx, __ecx = __ecx
 #define PVOP_CALL_ARGS          PVOP_VCALL_ARGS, __eax
+
+#define PVOP_CALL_ARG1(x)               "D" ((unsigned long)(x))
+#define PVOP_CALL_ARG2(x)               "S" ((unsigned long)(x))
+#define PVOP_CALL_ARG3(x)               "d" ((unsigned long)(x))
+#define PVOP_CALL_ARG4(x)               "c" ((unsigned long)(x))
+
 #define PVOP_VCALL_CLOBBERS     "=D" (__edi),                           \
                                 "=S" (__esi), "=d" (__edx),             \
                                 "=c" (__ecx)
-
 #define PVOP_CALL_CLOBBERS      PVOP_VCALL_CLOBBERS, "=a" (__eax)
 
+#define PVOP_VCALLEE_CLOBBERS   "=a" (__eax)
+#define PVOP_CALLEE_CLOBBERS    PVOP_VCALLEE_CLOBBERS
+
 #define EXTRA_CLOBBERS   , "r8", "r9", "r10", "r11"
 #define VEXTRA_CLOBBERS  , "rax", "r8", "r9", "r10", "r11"
-#endif
+#endif  /* CONFIG_X86_32 */
 
 #ifdef CONFIG_PARAVIRT_DEBUG
 #define PVOP_TEST_NULL(op)      BUG_ON(op == NULL)
@@ -505,10 +556,11 @@ int paravirt_disable_iospace(void);
 #define PVOP_TEST_NULL(op)      ((void)op)
 #endif
 
-#define __PVOP_CALL(rettype, op, pre, post, ...)                        \
+#define ____PVOP_CALL(rettype, op, clbr, call_clbr, extra_clbr,         \
+                      pre, post, ...)                                   \
         ({                                                              \
                 rettype __ret;                                          \
-                PVOP_CALL_ARGS;                                 \
+                PVOP_CALL_ARGS;                                         \
                 PVOP_TEST_NULL(op);                                     \
                 /* This is 32-bit specific, but is okay in 64-bit */    \
                 /* since this condition will never hold */              \
@@ -516,70 +568,113 @@ int paravirt_disable_iospace(void);
                         asm volatile(pre                                \
                                      paravirt_alt(PARAVIRT_CALL)        \
                                      post                               \
-                                     : PVOP_CALL_CLOBBERS               \
+                                     : call_clbr                        \
                                      : paravirt_type(op),               \
-                                       paravirt_clobber(CLBR_ANY),      \
+                                       paravirt_clobber(clbr),          \
                                        ##__VA_ARGS__                    \
-                                     : "memory", "cc" EXTRA_CLOBBERS);  \
+                                     : "memory", "cc" extra_clbr);      \
                         __ret = (rettype)((((u64)__edx) << 32) | __eax); \
                 } else {                                                \
                         asm volatile(pre                                \
                                      paravirt_alt(PARAVIRT_CALL)        \
                                      post                               \
-                                     : PVOP_CALL_CLOBBERS               \
+                                     : call_clbr                        \
                                      : paravirt_type(op),               \
-                                       paravirt_clobber(CLBR_ANY),      \
+                                       paravirt_clobber(clbr),          \
                                        ##__VA_ARGS__                    \
-                                     : "memory", "cc" EXTRA_CLOBBERS);  \
+                                     : "memory", "cc" extra_clbr);      \
                         __ret = (rettype)__eax;                         \
                 }                                                       \
                 __ret;                                                  \
         })
-#define __PVOP_VCALL(op, pre, post, ...)                                \
+
+#define __PVOP_CALL(rettype, op, pre, post, ...)                        \
+        ____PVOP_CALL(rettype, op, CLBR_ANY, PVOP_CALL_CLOBBERS,        \
+                      EXTRA_CLOBBERS, pre, post, ##__VA_ARGS__)
+
+#define __PVOP_CALLEESAVE(rettype, op, pre, post, ...)                  \
+        ____PVOP_CALL(rettype, op.func, CLBR_RET_REG,                   \
+                      PVOP_CALLEE_CLOBBERS, ,                           \
+                      pre, post, ##__VA_ARGS__)
+
+
+#define ____PVOP_VCALL(op, clbr, call_clbr, extra_clbr, pre, post, ...) \
         ({                                                              \
                 PVOP_VCALL_ARGS;                                        \
                 PVOP_TEST_NULL(op);                                     \
                 asm volatile(pre                                        \
                              paravirt_alt(PARAVIRT_CALL)                \
                              post                                       \
-                             : PVOP_VCALL_CLOBBERS                      \
+                             : call_clbr                                \
                              : paravirt_type(op),                       \
-                               paravirt_clobber(CLBR_ANY),              \
+                               paravirt_clobber(clbr),                  \
                                ##__VA_ARGS__                            \
-                             : "memory", "cc" VEXTRA_CLOBBERS);         \
+                             : "memory", "cc" extra_clbr);              \
         })
 
+#define __PVOP_VCALL(op, pre, post, ...)                                \
+        ____PVOP_VCALL(op, CLBR_ANY, PVOP_VCALL_CLOBBERS,               \
+                       VEXTRA_CLOBBERS,                                 \
+                       pre, post, ##__VA_ARGS__)
+
+#define __PVOP_VCALLEESAVE(rettype, op, pre, post, ...)                 \
+        ____PVOP_CALL(rettype, op.func, CLBR_RET_REG,                   \
+                      PVOP_VCALLEE_CLOBBERS, ,                          \
+                      pre, post, ##__VA_ARGS__)
+
+
+
 #define PVOP_CALL0(rettype, op)                                         \
         __PVOP_CALL(rettype, op, "", "")
 #define PVOP_VCALL0(op)                                                 \
         __PVOP_VCALL(op, "", "")
 
+#define PVOP_CALLEE0(rettype, op)                                       \
+        __PVOP_CALLEESAVE(rettype, op, "", "")
+#define PVOP_VCALLEE0(op)                                               \
+        __PVOP_VCALLEESAVE(op, "", "")
+
+
 #define PVOP_CALL1(rettype, op, arg1)                                   \
-        __PVOP_CALL(rettype, op, "", "", "0" ((unsigned long)(arg1)))
+        __PVOP_CALL(rettype, op, "", "", PVOP_CALL_ARG1(arg1))
 #define PVOP_VCALL1(op, arg1)                                           \
-        __PVOP_VCALL(op, "", "", "0" ((unsigned long)(arg1)))
+        __PVOP_VCALL(op, "", "", PVOP_CALL_ARG1(arg1))
+
+#define PVOP_CALLEE1(rettype, op, arg1)                                 \
+        __PVOP_CALLEESAVE(rettype, op, "", "", PVOP_CALL_ARG1(arg1))
+#define PVOP_VCALLEE1(op, arg1)                                         \
+        __PVOP_VCALLEESAVE(op, "", "", PVOP_CALL_ARG1(arg1))
+
 
 #define PVOP_CALL2(rettype, op, arg1, arg2)                             \
-        __PVOP_CALL(rettype, op, "", "", "0" ((unsigned long)(arg1)),   \
-        "1" ((unsigned long)(arg2)))
+        __PVOP_CALL(rettype, op, "", "", PVOP_CALL_ARG1(arg1),          \
+                    PVOP_CALL_ARG2(arg2))
 #define PVOP_VCALL2(op, arg1, arg2)                                     \
-        __PVOP_VCALL(op, "", "", "0" ((unsigned long)(arg1)),           \
-        "1" ((unsigned long)(arg2)))
+        __PVOP_VCALL(op, "", "", PVOP_CALL_ARG1(arg1),                  \
+                     PVOP_CALL_ARG2(arg2))
+
+#define PVOP_CALLEE2(rettype, op, arg1, arg2)                           \
+        __PVOP_CALLEESAVE(rettype, op, "", "", PVOP_CALL_ARG1(arg1),    \
+                          PVOP_CALL_ARG2(arg2))
+#define PVOP_VCALLEE2(op, arg1, arg2)                                   \
+        __PVOP_VCALLEESAVE(op, "", "", PVOP_CALL_ARG1(arg1),            \
+                           PVOP_CALL_ARG2(arg2))
+
 
 #define PVOP_CALL3(rettype, op, arg1, arg2, arg3)                       \
-        __PVOP_CALL(rettype, op, "", "", "0" ((unsigned long)(arg1)),   \
-        "1"((unsigned long)(arg2)), "2"((unsigned long)(arg3)))
+        __PVOP_CALL(rettype, op, "", "", PVOP_CALL_ARG1(arg1),          \
+                    PVOP_CALL_ARG2(arg2), PVOP_CALL_ARG3(arg3))
 #define PVOP_VCALL3(op, arg1, arg2, arg3)                               \
-        __PVOP_VCALL(op, "", "", "0" ((unsigned long)(arg1)),           \
-        "1"((unsigned long)(arg2)), "2"((unsigned long)(arg3)))
+        __PVOP_VCALL(op, "", "", PVOP_CALL_ARG1(arg1),                  \
+                     PVOP_CALL_ARG2(arg2), PVOP_CALL_ARG3(arg3))
 
 /* This is the only difference in x86_64. We can make it much simpler */
 #ifdef CONFIG_X86_32
 #define PVOP_CALL4(rettype, op, arg1, arg2, arg3, arg4)                 \
         __PVOP_CALL(rettype, op,                                        \
                     "push %[_arg4];", "lea 4(%%esp),%%esp;",            \
-                    "0" ((u32)(arg1)), "1" ((u32)(arg2)),               \
-                    "2" ((u32)(arg3)), [_arg4] "mr" ((u32)(arg4)))
+                    PVOP_CALL_ARG1(arg1), PVOP_CALL_ARG2(arg2),         \
+                    PVOP_CALL_ARG3(arg3), [_arg4] "mr" ((u32)(arg4)))
 #define PVOP_VCALL4(op, arg1, arg2, arg3, arg4)                         \
         __PVOP_VCALL(op,                                                \
                     "push %[_arg4];", "lea 4(%%esp),%%esp;",            \
@@ -587,13 +682,13 @@ int paravirt_disable_iospace(void);
                     "2" ((u32)(arg3)), [_arg4] "mr" ((u32)(arg4)))
 #else
 #define PVOP_CALL4(rettype, op, arg1, arg2, arg3, arg4)                 \
-        __PVOP_CALL(rettype, op, "", "", "0" ((unsigned long)(arg1)),   \
-        "1"((unsigned long)(arg2)), "2"((unsigned long)(arg3)),         \
-        "3"((unsigned long)(arg4)))
+        __PVOP_CALL(rettype, op, "", "",                                \
+                    PVOP_CALL_ARG1(arg1), PVOP_CALL_ARG2(arg2),         \
+                    PVOP_CALL_ARG3(arg3), PVOP_CALL_ARG4(arg4))
 #define PVOP_VCALL4(op, arg1, arg2, arg3, arg4)                         \
-        __PVOP_VCALL(op, "", "", "0" ((unsigned long)(arg1)),           \
-        "1"((unsigned long)(arg2)), "2"((unsigned long)(arg3)),         \
-        "3"((unsigned long)(arg4)))
+        __PVOP_VCALL(op, "", "",                                        \
+                     PVOP_CALL_ARG1(arg1), PVOP_CALL_ARG2(arg2),        \
+                     PVOP_CALL_ARG3(arg3), PVOP_CALL_ARG4(arg4))
 #endif
 
 static inline int paravirt_enabled(void)
@@ -984,10 +1079,11 @@ static inline void __flush_tlb_single(unsigned long addr)
         PVOP_VCALL1(pv_mmu_ops.flush_tlb_single, addr);
 }
 
-static inline void flush_tlb_others(cpumask_t cpumask, struct mm_struct *mm,
+static inline void flush_tlb_others(const struct cpumask *cpumask,
+                                    struct mm_struct *mm,
                                     unsigned long va)
 {
-        PVOP_VCALL3(pv_mmu_ops.flush_tlb_others, &cpumask, mm, va);
+        PVOP_VCALL3(pv_mmu_ops.flush_tlb_others, cpumask, mm, va);
 }
 
 static inline int paravirt_pgd_alloc(struct mm_struct *mm)
@@ -1059,13 +1155,13 @@ static inline pte_t __pte(pteval_t val)
         pteval_t ret;
 
         if (sizeof(pteval_t) > sizeof(long))
-                ret = PVOP_CALL2(pteval_t,
-                                 pv_mmu_ops.make_pte,
-                                 val, (u64)val >> 32);
+                ret = PVOP_CALLEE2(pteval_t,
+                                   pv_mmu_ops.make_pte,
+                                   val, (u64)val >> 32);
         else
-                ret = PVOP_CALL1(pteval_t,
-                                 pv_mmu_ops.make_pte,
-                                 val);
+                ret = PVOP_CALLEE1(pteval_t,
+                                   pv_mmu_ops.make_pte,
+                                   val);
 
         return (pte_t) { .pte = ret };
 }
@@ -1075,29 +1171,12 @@ static inline pteval_t pte_val(pte_t pte)
         pteval_t ret;
 
         if (sizeof(pteval_t) > sizeof(long))
-                ret = PVOP_CALL2(pteval_t, pv_mmu_ops.pte_val,
-                                 pte.pte, (u64)pte.pte >> 32);
-        else
-                ret = PVOP_CALL1(pteval_t, pv_mmu_ops.pte_val,
-                                 pte.pte);
-
-        return ret;
-}
-
-static inline pteval_t pte_flags(pte_t pte)
-{
-        pteval_t ret;
-
-        if (sizeof(pteval_t) > sizeof(long))
-                ret = PVOP_CALL2(pteval_t, pv_mmu_ops.pte_flags,
-                                 pte.pte, (u64)pte.pte >> 32);
+                ret = PVOP_CALLEE2(pteval_t, pv_mmu_ops.pte_val,
+                                   pte.pte, (u64)pte.pte >> 32);
         else
-                ret = PVOP_CALL1(pteval_t, pv_mmu_ops.pte_flags,
-                                 pte.pte);
+                ret = PVOP_CALLEE1(pteval_t, pv_mmu_ops.pte_val,
+                                   pte.pte);
 
-#ifdef CONFIG_PARAVIRT_DEBUG
-        BUG_ON(ret & PTE_PFN_MASK);
-#endif
         return ret;
 }
 
@@ -1106,11 +1185,11 @@ static inline pgd_t __pgd(pgdval_t val)
         pgdval_t ret;
 
         if (sizeof(pgdval_t) > sizeof(long))
-                ret = PVOP_CALL2(pgdval_t, pv_mmu_ops.make_pgd,
-                                 val, (u64)val >> 32);
+                ret = PVOP_CALLEE2(pgdval_t, pv_mmu_ops.make_pgd,
+                                   val, (u64)val >> 32);
         else
-                ret = PVOP_CALL1(pgdval_t, pv_mmu_ops.make_pgd,
-                                 val);
+                ret = PVOP_CALLEE1(pgdval_t, pv_mmu_ops.make_pgd,
+                                   val);
 
         return (pgd_t) { ret };
 }
@@ -1120,11 +1199,11 @@ static inline pgdval_t pgd_val(pgd_t pgd)
         pgdval_t ret;
 
         if (sizeof(pgdval_t) > sizeof(long))
-                ret =  PVOP_CALL2(pgdval_t, pv_mmu_ops.pgd_val,
-                                  pgd.pgd, (u64)pgd.pgd >> 32);
+                ret =  PVOP_CALLEE2(pgdval_t, pv_mmu_ops.pgd_val,
+                                    pgd.pgd, (u64)pgd.pgd >> 32);
         else
-                ret =  PVOP_CALL1(pgdval_t, pv_mmu_ops.pgd_val,
-                                  pgd.pgd);
+                ret =  PVOP_CALLEE1(pgdval_t, pv_mmu_ops.pgd_val,
+                                    pgd.pgd);
 
         return ret;
 }
@@ -1188,11 +1267,11 @@ static inline pmd_t __pmd(pmdval_t val)
         pmdval_t ret;
 
         if (sizeof(pmdval_t) > sizeof(long))
-                ret = PVOP_CALL2(pmdval_t, pv_mmu_ops.make_pmd,
-                                 val, (u64)val >> 32);
+                ret = PVOP_CALLEE2(pmdval_t, pv_mmu_ops.make_pmd,
+                                   val, (u64)val >> 32);
         else
-                ret = PVOP_CALL1(pmdval_t, pv_mmu_ops.make_pmd,
-                                 val);
+                ret = PVOP_CALLEE1(pmdval_t, pv_mmu_ops.make_pmd,
+                                   val);
 
         return (pmd_t) { ret };
 }
@@ -1202,11 +1281,11 @@ static inline pmdval_t pmd_val(pmd_t pmd)
         pmdval_t ret;
 
         if (sizeof(pmdval_t) > sizeof(long))
-                ret =  PVOP_CALL2(pmdval_t, pv_mmu_ops.pmd_val,
-                                  pmd.pmd, (u64)pmd.pmd >> 32);
+                ret =  PVOP_CALLEE2(pmdval_t, pv_mmu_ops.pmd_val,
+                                    pmd.pmd, (u64)pmd.pmd >> 32);
         else
-                ret =  PVOP_CALL1(pmdval_t, pv_mmu_ops.pmd_val,
-                                  pmd.pmd);
+                ret =  PVOP_CALLEE1(pmdval_t, pv_mmu_ops.pmd_val,
+                                    pmd.pmd);
 
         return ret;
 }
@@ -1228,11 +1307,11 @@ static inline pud_t __pud(pudval_t val)
         pudval_t ret;
 
         if (sizeof(pudval_t) > sizeof(long))
-                ret = PVOP_CALL2(pudval_t, pv_mmu_ops.make_pud,
-                                 val, (u64)val >> 32);
+                ret = PVOP_CALLEE2(pudval_t, pv_mmu_ops.make_pud,
+                                   val, (u64)val >> 32);
         else
-                ret = PVOP_CALL1(pudval_t, pv_mmu_ops.make_pud,
-                                 val);
+                ret = PVOP_CALLEE1(pudval_t, pv_mmu_ops.make_pud,
+                                   val);
 
         return (pud_t) { ret };
 }
@@ -1242,11 +1321,11 @@ static inline pudval_t pud_val(pud_t pud)
         pudval_t ret;
 
         if (sizeof(pudval_t) > sizeof(long))
-                ret =  PVOP_CALL2(pudval_t, pv_mmu_ops.pud_val,
-                                  pud.pud, (u64)pud.pud >> 32);
+                ret =  PVOP_CALLEE2(pudval_t, pv_mmu_ops.pud_val,
+                                    pud.pud, (u64)pud.pud >> 32);
         else
-                ret =  PVOP_CALL1(pudval_t, pv_mmu_ops.pud_val,
-                                  pud.pud);
+                ret =  PVOP_CALLEE1(pudval_t, pv_mmu_ops.pud_val,
+                                    pud.pud);
 
         return ret;
 }
@@ -1374,9 +1453,10 @@ static inline void __set_fixmap(unsigned /* enum fixed_addresses */ idx,
 }
 
 void _paravirt_nop(void);
-#define paravirt_nop    ((void *)_paravirt_nop)
+u32 _paravirt_ident_32(u32);
+u64 _paravirt_ident_64(u64);
 
-void paravirt_use_bytelocks(void);
+#define paravirt_nop    ((void *)_paravirt_nop)
 
 #ifdef CONFIG_SMP
 
@@ -1426,12 +1506,37 @@ extern struct paravirt_patch_site __parainstructions[],
         __parainstructions_end[];
 
 #ifdef CONFIG_X86_32
-#define PV_SAVE_REGS "pushl %%ecx; pushl %%edx;"
-#define PV_RESTORE_REGS "popl %%edx; popl %%ecx"
+#define PV_SAVE_REGS "pushl %ecx; pushl %edx;"
+#define PV_RESTORE_REGS "popl %edx; popl %ecx;"
+
+/* save and restore all caller-save registers, except return value */
+#define PV_SAVE_ALL_CALLER_REGS         "pushl %ecx;"
+#define PV_RESTORE_ALL_CALLER_REGS      "popl  %ecx;"
+
 #define PV_FLAGS_ARG "0"
 #define PV_EXTRA_CLOBBERS
 #define PV_VEXTRA_CLOBBERS
 #else
+/* save and restore all caller-save registers, except return value */
+#define PV_SAVE_ALL_CALLER_REGS                                         \
+        "push %rcx;"                                                    \
+        "push %rdx;"                                                    \
+        "push %rsi;"                                                    \
+        "push %rdi;"                                                    \
+        "push %r8;"                                                     \
+        "push %r9;"                                                     \
+        "push %r10;"                                                    \
+        "push %r11;"
+#define PV_RESTORE_ALL_CALLER_REGS                                      \
+        "pop %r11;"                                                     \
+        "pop %r10;"                                                     \
+        "pop %r9;"                                                      \
+        "pop %r8;"                                                      \
+        "pop %rdi;"                                                     \
+        "pop %rsi;"                                                     \
+        "pop %rdx;"                                                     \
+        "pop %rcx;"
+
 /* We save some registers, but all of them, that's too much. We clobber all
  * caller saved registers but the argument parameter */
 #define PV_SAVE_REGS "pushq %%rdi;"
@@ -1441,52 +1546,76 @@ extern struct paravirt_patch_site __parainstructions[],
 #define PV_FLAGS_ARG "D"
 #endif
 
+/*
+ * Generate a thunk around a function which saves all caller-save
+ * registers except for the return value.  This allows C functions to
+ * be called from assembler code where fewer than normal registers are
+ * available.  It may also help code generation around calls from C
+ * code if the common case doesn't use many registers.
+ *
+ * When a callee is wrapped in a thunk, the caller can assume that all
+ * arg regs and all scratch registers are preserved across the
+ * call. The return value in rax/eax will not be saved, even for void
+ * functions.
+ */
+#define PV_CALLEE_SAVE_REGS_THUNK(func)                                 \
+        extern typeof(func) __raw_callee_save_##func;                   \
+        static void *__##func##__ __used = func;                        \
+                                                                        \
+        asm(".pushsection .text;"                                       \
+            "__raw_callee_save_" #func ": "                             \
+            PV_SAVE_ALL_CALLER_REGS                                     \
+            "call " #func ";"                                           \
+            PV_RESTORE_ALL_CALLER_REGS                                  \
+            "ret;"                                                      \
+            ".popsection")
+
+/* Get a reference to a callee-save function */
+#define PV_CALLEE_SAVE(func)                                            \
+        ((struct paravirt_callee_save) { __raw_callee_save_##func })
+
+/* Promise that "func" already uses the right calling convention */
+#define __PV_IS_CALLEE_SAVE(func)                       \
+        ((struct paravirt_callee_save) { func })
+
 static inline unsigned long __raw_local_save_flags(void)
 {
         unsigned long f;
 
-        asm volatile(paravirt_alt(PV_SAVE_REGS
-                                  PARAVIRT_CALL
-                                  PV_RESTORE_REGS)
+        asm volatile(paravirt_alt(PARAVIRT_CALL)
                      : "=a"(f)
                      : paravirt_type(pv_irq_ops.save_fl),
                        paravirt_clobber(CLBR_EAX)
-                     : "memory", "cc" PV_VEXTRA_CLOBBERS);
+                     : "memory", "cc");
         return f;
 }
 
 static inline void raw_local_irq_restore(unsigned long f)
 {
-        asm volatile(paravirt_alt(PV_SAVE_REGS
-                                  PARAVIRT_CALL
-                                  PV_RESTORE_REGS)
+        asm volatile(paravirt_alt(PARAVIRT_CALL)
                      : "=a"(f)
                      : PV_FLAGS_ARG(f),
                        paravirt_type(pv_irq_ops.restore_fl),
                        paravirt_clobber(CLBR_EAX)
-                     : "memory", "cc" PV_EXTRA_CLOBBERS);
+                     : "memory", "cc");
 }
 
 static inline void raw_local_irq_disable(void)
 {
-        asm volatile(paravirt_alt(PV_SAVE_REGS
-                                  PARAVIRT_CALL
-                                  PV_RESTORE_REGS)
+        asm volatile(paravirt_alt(PARAVIRT_CALL)
                      :
                      : paravirt_type(pv_irq_ops.irq_disable),
                        paravirt_clobber(CLBR_EAX)
-                     : "memory", "eax", "cc" PV_EXTRA_CLOBBERS);
+                     : "memory", "eax", "cc");
 }
 
 static inline void raw_local_irq_enable(void)
 {
-        asm volatile(paravirt_alt(PV_SAVE_REGS
-                                  PARAVIRT_CALL
-                                  PV_RESTORE_REGS)
+        asm volatile(paravirt_alt(PARAVIRT_CALL)
                      :
                      : paravirt_type(pv_irq_ops.irq_enable),
                        paravirt_clobber(CLBR_EAX)
-                     : "memory", "eax", "cc" PV_EXTRA_CLOBBERS);
+                     : "memory", "eax", "cc");
 }
 
 static inline unsigned long __raw_local_irq_save(void)
@@ -1529,33 +1658,49 @@ static inline unsigned long __raw_local_irq_save(void)
         .popsection
 
 
+#define COND_PUSH(set, mask, reg)                       \
+        .if ((~(set)) & mask); push %reg; .endif
+#define COND_POP(set, mask, reg)                        \
+        .if ((~(set)) & mask); pop %reg; .endif
+
 #ifdef CONFIG_X86_64
-#define PV_SAVE_REGS                            \
-        push %rax;                              \
-        push %rcx;                              \
-        push %rdx;                              \
-        push %rsi;                              \
-        push %rdi;                              \
-        push %r8;                               \
-        push %r9;                               \
-        push %r10;                              \
-        push %r11
-#define PV_RESTORE_REGS                         \
-        pop %r11;                               \
-        pop %r10;                               \
-        pop %r9;                                \
-        pop %r8;                                \
-        pop %rdi;                               \
-        pop %rsi;                               \
-        pop %rdx;                               \
-        pop %rcx;                               \
-        pop %rax
+
+#define PV_SAVE_REGS(set)                       \
+        COND_PUSH(set, CLBR_RAX, rax);          \
+        COND_PUSH(set, CLBR_RCX, rcx);          \
+        COND_PUSH(set, CLBR_RDX, rdx);          \
+        COND_PUSH(set, CLBR_RSI, rsi);          \
+        COND_PUSH(set, CLBR_RDI, rdi);          \
+        COND_PUSH(set, CLBR_R8, r8);            \
+        COND_PUSH(set, CLBR_R9, r9);            \
+        COND_PUSH(set, CLBR_R10, r10);          \
+        COND_PUSH(set, CLBR_R11, r11)
+#define PV_RESTORE_REGS(set)                    \
+        COND_POP(set, CLBR_R11, r11);           \
+        COND_POP(set, CLBR_R10, r10);           \
+        COND_POP(set, CLBR_R9, r9);             \
+        COND_POP(set, CLBR_R8, r8);             \
+        COND_POP(set, CLBR_RDI, rdi);           \
+        COND_POP(set, CLBR_RSI, rsi);           \
+        COND_POP(set, CLBR_RDX, rdx);           \
+        COND_POP(set, CLBR_RCX, rcx);           \
+        COND_POP(set, CLBR_RAX, rax)
+
 #define PARA_PATCH(struct, off)        ((PARAVIRT_PATCH_##struct + (off)) / 8)
 #define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .quad, 8)
 #define PARA_INDIRECT(addr)     *addr(%rip)
 #else
-#define PV_SAVE_REGS   pushl %eax; pushl %edi; pushl %ecx; pushl %edx
-#define PV_RESTORE_REGS popl %edx; popl %ecx; popl %edi; popl %eax
+#define PV_SAVE_REGS(set)                       \
+        COND_PUSH(set, CLBR_EAX, eax);          \
+        COND_PUSH(set, CLBR_EDI, edi);          \
+        COND_PUSH(set, CLBR_ECX, ecx);          \
+        COND_PUSH(set, CLBR_EDX, edx)
+#define PV_RESTORE_REGS(set)                    \
+        COND_POP(set, CLBR_EDX, edx);           \
+        COND_POP(set, CLBR_ECX, ecx);           \
+        COND_POP(set, CLBR_EDI, edi);           \
+        COND_POP(set, CLBR_EAX, eax)
+
 #define PARA_PATCH(struct, off)        ((PARAVIRT_PATCH_##struct + (off)) / 4)
 #define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .long, 4)
 #define PARA_INDIRECT(addr)     *%cs:addr
@@ -1567,15 +1712,15 @@ static inline unsigned long __raw_local_irq_save(void)
 
 #define DISABLE_INTERRUPTS(clobbers)                                    \
         PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_disable), clobbers, \
-                  PV_SAVE_REGS;                                         \
+                  PV_SAVE_REGS(clobbers | CLBR_CALLEE_SAVE);            \
                   call PARA_INDIRECT(pv_irq_ops+PV_IRQ_irq_disable);    \
-                  PV_RESTORE_REGS;)                     \
+                  PV_RESTORE_REGS(clobbers | CLBR_CALLEE_SAVE);)
 
 #define ENABLE_INTERRUPTS(clobbers)                                     \
         PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_enable), clobbers,  \
-                  PV_SAVE_REGS;                                         \
+                  PV_SAVE_REGS(clobbers | CLBR_CALLEE_SAVE);            \
                   call PARA_INDIRECT(pv_irq_ops+PV_IRQ_irq_enable);     \
-                  PV_RESTORE_REGS;)
+                  PV_RESTORE_REGS(clobbers | CLBR_CALLEE_SAVE);)
 
 #define USERGS_SYSRET32                                                 \
         PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_usergs_sysret32),       \
@@ -1605,11 +1750,15 @@ static inline unsigned long __raw_local_irq_save(void)
         PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_swapgs), CLBR_NONE,     \
                   swapgs)
 
+/*
+ * Note: swapgs is very special, and in practise is either going to be
+ * implemented with a single "swapgs" instruction or something very
+ * special.  Either way, we don't need to save any registers for
+ * it.
+ */
 #define SWAPGS                                                          \
         PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_swapgs), CLBR_NONE,     \
-                  PV_SAVE_REGS;                                         \
-                  call PARA_INDIRECT(pv_cpu_ops+PV_CPU_swapgs);         \
-                  PV_RESTORE_REGS                                       \
+                  call PARA_INDIRECT(pv_cpu_ops+PV_CPU_swapgs)          \
                  )
 
 #define GET_CR2_INTO_RCX                                \
diff --git a/arch/x86/include/asm/pat.h b/arch/x86/include/asm/pat.h
index b8493b3b9890..b0e70056838e 100644
--- a/arch/x86/include/asm/pat.h
+++ b/arch/x86/include/asm/pat.h
@@ -5,10 +5,8 @@
 
 #ifdef CONFIG_X86_PAT
 extern int pat_enabled;
-extern void validate_pat_support(struct cpuinfo_x86 *c);
 #else
 static const int pat_enabled;
-static inline void validate_pat_support(struct cpuinfo_x86 *c) { }
 #endif
 
 extern void pat_init(void);
@@ -17,6 +15,7 @@ extern int reserve_memtype(u64 start, u64 end,
                 unsigned long req_type, unsigned long *ret_type);
 extern int free_memtype(u64 start, u64 end);
 
-extern void pat_disable(char *reason);
+extern int kernel_map_sync_memtype(u64 base, unsigned long size,
+                unsigned long flag);
 
 #endif /* _ASM_X86_PAT_H */
diff --git a/arch/x86/include/asm/mach-default/pci-functions.h b/arch/x86/include/asm/pci-functions.h
index ed0bab427354..ed0bab427354 100644
--- a/arch/x86/include/asm/mach-default/pci-functions.h
+++ b/arch/x86/include/asm/pci-functions.h
diff --git a/arch/x86/include/asm/pda.h b/arch/x86/include/asm/pda.h
deleted file mode 100644
index 2fbfff88df37..000000000000
--- a/arch/x86/include/asm/pda.h
+++ /dev/null
@@ -1,137 +0,0 @@
-#ifndef _ASM_X86_PDA_H
-#define _ASM_X86_PDA_H
-
-#ifndef __ASSEMBLY__
-#include <linux/stddef.h>
-#include <linux/types.h>
-#include <linux/cache.h>
-#include <asm/page.h>
-
-/* Per processor datastructure. %gs points to it while the kernel runs */
-struct x8664_pda {
-        struct task_struct *pcurrent;   /* 0  Current process */
-        unsigned long data_offset;      /* 8 Per cpu data offset from linker
-                                           address */
-        unsigned long kernelstack;      /* 16 top of kernel stack for current */
-        unsigned long oldrsp;           /* 24 user rsp for system call */
-        int irqcount;                   /* 32 Irq nesting counter. Starts -1 */
-        unsigned int cpunumber;         /* 36 Logical CPU number */
-#ifdef CONFIG_CC_STACKPROTECTOR
-        unsigned long stack_canary;     /* 40 stack canary value */
-                                        /* gcc-ABI: this canary MUST be at
-                                           offset 40!!! */
-#endif
-        char *irqstackptr;
-        short nodenumber;               /* number of current node (32k max) */
-        short in_bootmem;               /* pda lives in bootmem */
-        unsigned int __softirq_pending;
-        unsigned int __nmi_count;       /* number of NMI on this CPUs */
-        short mmu_state;
-        short isidle;
-        struct mm_struct *active_mm;
-        unsigned apic_timer_irqs;
-        unsigned irq0_irqs;
-        unsigned irq_resched_count;
-        unsigned irq_call_count;
-        unsigned irq_tlb_count;
-        unsigned irq_thermal_count;
-        unsigned irq_threshold_count;
-        unsigned irq_spurious_count;
-} ____cacheline_aligned_in_smp;
-
-extern struct x8664_pda **_cpu_pda;
-extern void pda_init(int);
-
-#define cpu_pda(i) (_cpu_pda[i])
-
-/*
- * There is no fast way to get the base address of the PDA, all the accesses
- * have to mention %fs/%gs.  So it needs to be done this Torvaldian way.
- */
-extern void __bad_pda_field(void) __attribute__((noreturn));
-
-/*
- * proxy_pda doesn't actually exist, but tell gcc it is accessed for
- * all PDA accesses so it gets read/write dependencies right.
- */
-extern struct x8664_pda _proxy_pda;
-
-#define pda_offset(field) offsetof(struct x8664_pda, field)
-
-#define pda_to_op(op, field, val)                                       \
-do {                                                                    \
-        typedef typeof(_proxy_pda.field) T__;                           \
-        if (0) { T__ tmp__; tmp__ = (val); }    /* type checking */     \
-        switch (sizeof(_proxy_pda.field)) {                             \
-        case 2:                                                         \
-                asm(op "w %1,%%gs:%c2" :                                \
-                    "+m" (_proxy_pda.field) :                           \
-                    "ri" ((T__)val),                                    \
-                    "i"(pda_offset(field)));                            \
-                break;                                                  \
-        case 4:                                                         \
-                asm(op "l %1,%%gs:%c2" :                                \
-                    "+m" (_proxy_pda.field) :                           \
-                    "ri" ((T__)val),                                    \
-                    "i" (pda_offset(field)));                           \
-                break;                                                  \
-        case 8:                                                         \
-                asm(op "q %1,%%gs:%c2":                                 \
-                    "+m" (_proxy_pda.field) :                           \
-                    "ri" ((T__)val),                                    \
-                    "i"(pda_offset(field)));                            \
-                break;                                                  \
-        default:                                                        \
-                __bad_pda_field();                                      \
-        }                                                               \
-} while (0)
-
-#define pda_from_op(op, field)                  \
-({                                              \
-        typeof(_proxy_pda.field) ret__;         \
-        switch (sizeof(_proxy_pda.field)) {     \
-        case 2:                                 \
-                asm(op "w %%gs:%c1,%0" :        \
-                    "=r" (ret__) :              \
-                    "i" (pda_offset(field)),    \
-                    "m" (_proxy_pda.field));    \
-                break;                          \
-        case 4:                                 \
-                asm(op "l %%gs:%c1,%0":         \
-                    "=r" (ret__):               \
-                    "i" (pda_offset(field)),    \
-                    "m" (_proxy_pda.field));    \
-                break;                          \
-        case 8:                                 \
-                asm(op "q %%gs:%c1,%0":         \
-                    "=r" (ret__) :              \
-                    "i" (pda_offset(field)),    \
-                    "m" (_proxy_pda.field));    \
-                break;                          \
-        default:                                \
-                __bad_pda_field();              \
-        }                                       \
-        ret__;                                  \
-})
-
-#define read_pda(field)         pda_from_op("mov", field)
-#define write_pda(field, val)   pda_to_op("mov", field, val)
-#define add_pda(field, val)     pda_to_op("add", field, val)
-#define sub_pda(field, val)     pda_to_op("sub", field, val)
-#define or_pda(field, val)      pda_to_op("or", field, val)
-
-/* This is not atomic against other CPUs -- CPU preemption needs to be off */
-#define test_and_clear_bit_pda(bit, field)                              \
-({                                                                      \
-        int old__;                                                      \
-        asm volatile("btr %2,%%gs:%c3\n\tsbbl %0,%0"                    \
-                     : "=r" (old__), "+m" (_proxy_pda.field)            \
-                     : "dIr" (bit), "i" (pda_offset(field)) : "memory");\
-        old__;                                                          \
-})
-
-#endif
-
-#define PDA_STACKOFFSET (5*8)
-
-#endif /* _ASM_X86_PDA_H */
diff --git a/arch/x86/include/asm/percpu.h b/arch/x86/include/asm/percpu.h
index ece72053ba63..aee103b26d01 100644
--- a/arch/x86/include/asm/percpu.h
+++ b/arch/x86/include/asm/percpu.h
@@ -2,53 +2,12 @@
 #define _ASM_X86_PERCPU_H
 
 #ifdef CONFIG_X86_64
-#include <linux/compiler.h>
-
-/* Same as asm-generic/percpu.h, except that we store the per cpu offset
-   in the PDA. Longer term the PDA and every per cpu variable
-   should be just put into a single section and referenced directly
-   from %gs */
-
-#ifdef CONFIG_SMP
-#include <asm/pda.h>
-
-#define __per_cpu_offset(cpu) (cpu_pda(cpu)->data_offset)
-#define __my_cpu_offset read_pda(data_offset)
-
-#define per_cpu_offset(x) (__per_cpu_offset(x))
-
+#define __percpu_seg            gs
+#define __percpu_mov_op         movq
+#else
+#define __percpu_seg            fs
+#define __percpu_mov_op         movl
 #endif
-#include <asm-generic/percpu.h>
-
-DECLARE_PER_CPU(struct x8664_pda, pda);
-
-/*
- * These are supposed to be implemented as a single instruction which
- * operates on the per-cpu data base segment.  x86-64 doesn't have
- * that yet, so this is a fairly inefficient workaround for the
- * meantime.  The single instruction is atomic with respect to
- * preemption and interrupts, so we need to explicitly disable
- * interrupts here to achieve the same effect.  However, because it
- * can be used from within interrupt-disable/enable, we can't actually
- * disable interrupts; disabling preemption is enough.
- */
-#define x86_read_percpu(var)                                            \
-        ({                                                              \
-                typeof(per_cpu_var(var)) __tmp;                         \
-                preempt_disable();                                      \
-                __tmp = __get_cpu_var(var);                             \
-                preempt_enable();                                       \
-                __tmp;                                                  \
-        })
-
-#define x86_write_percpu(var, val)                                      \
-        do {                                                            \
-                preempt_disable();                                      \
-                __get_cpu_var(var) = (val);                             \
-                preempt_enable();                                       \
-        } while(0)
-
-#else /* CONFIG_X86_64 */
 
 #ifdef __ASSEMBLY__
 
@@ -65,47 +24,48 @@ DECLARE_PER_CPU(struct x8664_pda, pda);
  *    PER_CPU(cpu_gdt_descr, %ebx)
  */
 #ifdef CONFIG_SMP
-#define PER_CPU(var, reg)                               \
-        movl %fs:per_cpu__##this_cpu_off, reg;          \
+#define PER_CPU(var, reg)                                               \
+        __percpu_mov_op %__percpu_seg:per_cpu__this_cpu_off, reg;       \
         lea per_cpu__##var(reg), reg
-#define PER_CPU_VAR(var)        %fs:per_cpu__##var
+#define PER_CPU_VAR(var)        %__percpu_seg:per_cpu__##var
 #else /* ! SMP */
-#define PER_CPU(var, reg)                       \
-        movl $per_cpu__##var, reg
+#define PER_CPU(var, reg)                                               \
+        __percpu_mov_op $per_cpu__##var, reg
 #define PER_CPU_VAR(var)        per_cpu__##var
 #endif  /* SMP */
 
+#ifdef CONFIG_X86_64_SMP
+#define INIT_PER_CPU_VAR(var)  init_per_cpu__##var
+#else
+#define INIT_PER_CPU_VAR(var)  per_cpu__##var
+#endif
+
 #else /* ...!ASSEMBLY */
 
+#include <linux/stringify.h>
+
+#ifdef CONFIG_SMP
+#define __percpu_arg(x)         "%%"__stringify(__percpu_seg)":%P" #x
+#define __my_cpu_offset         percpu_read(this_cpu_off)
+#else
+#define __percpu_arg(x)         "%" #x
+#endif
+
 /*
- * PER_CPU finds an address of a per-cpu variable.
+ * Initialized pointers to per-cpu variables needed for the boot
+ * processor need to use these macros to get the proper address
+ * offset from __per_cpu_load on SMP.
  *
- * Args:
- *    var - variable name
- *    cpu - 32bit register containing the current CPU number
- *
- * The resulting address is stored in the "cpu" argument.
- *
- * Example:
- *    PER_CPU(cpu_gdt_descr, %ebx)
+ * There also must be an entry in vmlinux_64.lds.S
  */
-#ifdef CONFIG_SMP
-
-#define __my_cpu_offset x86_read_percpu(this_cpu_off)
-
-/* fs segment starts at (positive) offset == __per_cpu_offset[cpu] */
-#define __percpu_seg "%%fs:"
-
-#else  /* !SMP */
-
-#define __percpu_seg ""
-
-#endif  /* SMP */
-
-#include <asm-generic/percpu.h>
+#define DECLARE_INIT_PER_CPU(var) \
+       extern typeof(per_cpu_var(var)) init_per_cpu_var(var)
 
-/* We can use this directly for local CPU (faster). */
-DECLARE_PER_CPU(unsigned long, this_cpu_off);
+#ifdef CONFIG_X86_64_SMP
+#define init_per_cpu_var(var)  init_per_cpu__##var
+#else
+#define init_per_cpu_var(var)  per_cpu_var(var)
+#endif
 
 /* For arch-specific code, we can use direct single-insn ops (they
  * don't give an lvalue though). */
@@ -120,20 +80,25 @@ do {							\
         }                                               \
         switch (sizeof(var)) {                          \
         case 1:                                         \
-                asm(op "b %1,"__percpu_seg"%0"          \
+                asm(op "b %1,"__percpu_arg(0)           \
                     : "+m" (var)                        \
                     : "ri" ((T__)val));                 \
                 break;                                  \
         case 2:                                         \
-                asm(op "w %1,"__percpu_seg"%0"          \
+                asm(op "w %1,"__percpu_arg(0)           \
                     : "+m" (var)                        \
                     : "ri" ((T__)val));                 \
                 break;                                  \
         case 4:                                         \
-                asm(op "l %1,"__percpu_seg"%0"          \
+                asm(op "l %1,"__percpu_arg(0)           \
                     : "+m" (var)                        \
                     : "ri" ((T__)val));                 \
                 break;                                  \
+        case 8:                                         \
+                asm(op "q %1,"__percpu_arg(0)           \
+                    : "+m" (var)                        \
+                    : "re" ((T__)val));                 \
+                break;                                  \
         default: __bad_percpu_size();                   \
         }                                               \
 } while (0)
@@ -143,17 +108,22 @@ do {							\
         typeof(var) ret__;                              \
         switch (sizeof(var)) {                          \
         case 1:                                         \
-                asm(op "b "__percpu_seg"%1,%0"          \
+                asm(op "b "__percpu_arg(1)",%0"         \
                     : "=r" (ret__)                      \
                     : "m" (var));                       \
                 break;                                  \
         case 2:                                         \
-                asm(op "w "__percpu_seg"%1,%0"          \
+                asm(op "w "__percpu_arg(1)",%0"         \
                     : "=r" (ret__)                      \
                     : "m" (var));                       \
                 break;                                  \
         case 4:                                         \
-                asm(op "l "__percpu_seg"%1,%0"          \
+                asm(op "l "__percpu_arg(1)",%0"         \
+                    : "=r" (ret__)                      \
+                    : "m" (var));                       \
+                break;                                  \
+        case 8:                                         \
+                asm(op "q "__percpu_arg(1)",%0"         \
                     : "=r" (ret__)                      \
                     : "m" (var));                       \
                 break;                                  \
@@ -162,13 +132,30 @@ do {							\
         ret__;                                          \
 })
 
-#define x86_read_percpu(var) percpu_from_op("mov", per_cpu__##var)
-#define x86_write_percpu(var, val) percpu_to_op("mov", per_cpu__##var, val)
-#define x86_add_percpu(var, val) percpu_to_op("add", per_cpu__##var, val)
-#define x86_sub_percpu(var, val) percpu_to_op("sub", per_cpu__##var, val)
-#define x86_or_percpu(var, val) percpu_to_op("or", per_cpu__##var, val)
+#define percpu_read(var)        percpu_from_op("mov", per_cpu__##var)
+#define percpu_write(var, val)  percpu_to_op("mov", per_cpu__##var, val)
+#define percpu_add(var, val)    percpu_to_op("add", per_cpu__##var, val)
+#define percpu_sub(var, val)    percpu_to_op("sub", per_cpu__##var, val)
+#define percpu_and(var, val)    percpu_to_op("and", per_cpu__##var, val)
+#define percpu_or(var, val)     percpu_to_op("or", per_cpu__##var, val)
+#define percpu_xor(var, val)    percpu_to_op("xor", per_cpu__##var, val)
+
+/* This is not atomic against other CPUs -- CPU preemption needs to be off */
+#define x86_test_and_clear_bit_percpu(bit, var)                         \
+({                                                                      \
+        int old__;                                                      \
+        asm volatile("btr %2,"__percpu_arg(1)"\n\tsbbl %0,%0"           \
+                     : "=r" (old__), "+m" (per_cpu__##var)              \
+                     : "dIr" (bit));                                    \
+        old__;                                                          \
+})
+
+#include <asm-generic/percpu.h>
+
+/* We can use this directly for local CPU (faster). */
+DECLARE_PER_CPU(unsigned long, this_cpu_off);
+
 #endif /* !__ASSEMBLY__ */
-#endif /* !CONFIG_X86_64 */
 
 #ifdef CONFIG_SMP
 
@@ -195,9 +182,9 @@ do {							\
 #define early_per_cpu_ptr(_name) (_name##_early_ptr)
 #define early_per_cpu_map(_name, _idx) (_name##_early_map[_idx])
 #define early_per_cpu(_name, _cpu)                              \
-        (early_per_cpu_ptr(_name) ?                             \
-                early_per_cpu_ptr(_name)[_cpu] :                \
-                per_cpu(_name, _cpu))
+        *(early_per_cpu_ptr(_name) ?                            \
+                &early_per_cpu_ptr(_name)[_cpu] :               \
+                &per_cpu(_name, _cpu))
 
 #else   /* !CONFIG_SMP */
 #define DEFINE_EARLY_PER_CPU(_type, _name, _initvalue)          \
diff --git a/arch/x86/include/asm/pgtable-2level.h b/arch/x86/include/asm/pgtable-2level.h
index e0d199fe1d83..c1774ac9da7a 100644
--- a/arch/x86/include/asm/pgtable-2level.h
+++ b/arch/x86/include/asm/pgtable-2level.h
@@ -53,8 +53,6 @@ static inline pte_t native_ptep_get_and_clear(pte_t *xp)
 #define native_ptep_get_and_clear(xp) native_local_ptep_get_and_clear(xp)
 #endif
 
-#define pte_none(x)             (!(x).pte_low)
-
 /*
  * Bits _PAGE_BIT_PRESENT, _PAGE_BIT_FILE and _PAGE_BIT_PROTNONE are taken,
  * split up the 29 bits of offset into this range:
diff --git a/arch/x86/include/asm/pgtable-2level-defs.h b/arch/x86/include/asm/pgtable-2level_types.h
index d77db8990eaa..daacc23e3fb9 100644
--- a/arch/x86/include/asm/pgtable-2level-defs.h
+++ b/arch/x86/include/asm/pgtable-2level_types.h
@@ -1,7 +1,23 @@
 #ifndef _ASM_X86_PGTABLE_2LEVEL_DEFS_H
 #define _ASM_X86_PGTABLE_2LEVEL_DEFS_H
 
+#ifndef __ASSEMBLY__
+#include <linux/types.h>
+
+typedef unsigned long   pteval_t;
+typedef unsigned long   pmdval_t;
+typedef unsigned long   pudval_t;
+typedef unsigned long   pgdval_t;
+typedef unsigned long   pgprotval_t;
+
+typedef union {
+        pteval_t pte;
+        pteval_t pte_low;
+} pte_t;
+#endif  /* !__ASSEMBLY__ */
+
 #define SHARED_KERNEL_PMD       0
+#define PAGETABLE_LEVELS        2
 
 /*
  * traditional i386 two-level paging structure:
@@ -10,6 +26,7 @@
 #define PGDIR_SHIFT     22
 #define PTRS_PER_PGD    1024
 
+
 /*
  * the i386 is two-level, so we don't really have any
  * PMD directory physically.
diff --git a/arch/x86/include/asm/pgtable-3level.h b/arch/x86/include/asm/pgtable-3level.h
index 447da43cddb3..3f13cdf61156 100644
--- a/arch/x86/include/asm/pgtable-3level.h
+++ b/arch/x86/include/asm/pgtable-3level.h
@@ -18,21 +18,6 @@
         printk("%s:%d: bad pgd %p(%016Lx).\n",                          \
                __FILE__, __LINE__, &(e), pgd_val(e))
 
-static inline int pud_none(pud_t pud)
-{
-        return pud_val(pud) == 0;
-}
-
-static inline int pud_bad(pud_t pud)
-{
-        return (pud_val(pud) & ~(PTE_PFN_MASK | _KERNPG_TABLE | _PAGE_USER)) != 0;
-}
-
-static inline int pud_present(pud_t pud)
-{
-        return pud_val(pud) & _PAGE_PRESENT;
-}
-
 /* Rules for using set_pte: the pte being assigned *must* be
  * either not present or in a state where the hardware will
  * not attempt to update the pte.  In places where this is
@@ -120,15 +105,6 @@ static inline void pud_clear(pud_t *pudp)
                 write_cr3(pgd);
 }
 
-#define pud_page(pud) pfn_to_page(pud_val(pud) >> PAGE_SHIFT)
-
-#define pud_page_vaddr(pud) ((unsigned long) __va(pud_val(pud) & PTE_PFN_MASK))
-
-
-/* Find an entry in the second-level page table.. */
-#define pmd_offset(pud, address) ((pmd_t *)pud_page_vaddr(*(pud)) +     \
-                                  pmd_index(address))
-
 #ifdef CONFIG_SMP
 static inline pte_t native_ptep_get_and_clear(pte_t *ptep)
 {
@@ -145,17 +121,6 @@ static inline pte_t native_ptep_get_and_clear(pte_t *ptep)
 #define native_ptep_get_and_clear(xp) native_local_ptep_get_and_clear(xp)
 #endif
 
-#define __HAVE_ARCH_PTE_SAME
-static inline int pte_same(pte_t a, pte_t b)
-{
-        return a.pte_low == b.pte_low && a.pte_high == b.pte_high;
-}
-
-static inline int pte_none(pte_t pte)
-{
-        return !pte.pte_low && !pte.pte_high;
-}
-
 /*
  * Bits 0, 6 and 7 are taken in the low part of the pte,
  * put the 32 bits of offset into the high part.
diff --git a/arch/x86/include/asm/pgtable-3level-defs.h b/arch/x86/include/asm/pgtable-3level_types.h
index 62561367653c..1bd5876c8649 100644
--- a/arch/x86/include/asm/pgtable-3level-defs.h
+++ b/arch/x86/include/asm/pgtable-3level_types.h
@@ -1,12 +1,31 @@
 #ifndef _ASM_X86_PGTABLE_3LEVEL_DEFS_H
 #define _ASM_X86_PGTABLE_3LEVEL_DEFS_H
 
+#ifndef __ASSEMBLY__
+#include <linux/types.h>
+
+typedef u64     pteval_t;
+typedef u64     pmdval_t;
+typedef u64     pudval_t;
+typedef u64     pgdval_t;
+typedef u64     pgprotval_t;
+
+typedef union {
+        struct {
+                unsigned long pte_low, pte_high;
+        };
+        pteval_t pte;
+} pte_t;
+#endif  /* !__ASSEMBLY__ */
+
 #ifdef CONFIG_PARAVIRT
 #define SHARED_KERNEL_PMD       (pv_info.shared_kernel_pmd)
 #else
 #define SHARED_KERNEL_PMD       1
 #endif
 
+#define PAGETABLE_LEVELS        3
+
 /*
  * PGDIR_SHIFT determines what a top-level page table entry can map
  */
@@ -25,4 +44,5 @@
  */
 #define PTRS_PER_PTE    512
 
+
 #endif /* _ASM_X86_PGTABLE_3LEVEL_DEFS_H */
diff --git a/arch/x86/include/asm/pgtable.h b/arch/x86/include/asm/pgtable.h
index 4f5af8447d54..d0812e155f1d 100644
--- a/arch/x86/include/asm/pgtable.h
+++ b/arch/x86/include/asm/pgtable.h
@@ -1,164 +1,9 @@
 #ifndef _ASM_X86_PGTABLE_H
 #define _ASM_X86_PGTABLE_H
 
-#define FIRST_USER_ADDRESS      0
-
-#define _PAGE_BIT_PRESENT       0       /* is present */
-#define _PAGE_BIT_RW            1       /* writeable */
-#define _PAGE_BIT_USER          2       /* userspace addressable */
-#define _PAGE_BIT_PWT           3       /* page write through */
-#define _PAGE_BIT_PCD           4       /* page cache disabled */
-#define _PAGE_BIT_ACCESSED      5       /* was accessed (raised by CPU) */
-#define _PAGE_BIT_DIRTY         6       /* was written to (raised by CPU) */
-#define _PAGE_BIT_PSE           7       /* 4 MB (or 2MB) page */
-#define _PAGE_BIT_PAT           7       /* on 4KB pages */
-#define _PAGE_BIT_GLOBAL        8       /* Global TLB entry PPro+ */
-#define _PAGE_BIT_UNUSED1       9       /* available for programmer */
-#define _PAGE_BIT_IOMAP         10      /* flag used to indicate IO mapping */
-#define _PAGE_BIT_UNUSED3       11
-#define _PAGE_BIT_PAT_LARGE     12      /* On 2MB or 1GB pages */
-#define _PAGE_BIT_SPECIAL       _PAGE_BIT_UNUSED1
-#define _PAGE_BIT_CPA_TEST      _PAGE_BIT_UNUSED1
-#define _PAGE_BIT_NX           63       /* No execute: only valid after cpuid check */
-
-/* If _PAGE_BIT_PRESENT is clear, we use these: */
-/* - if the user mapped it with PROT_NONE; pte_present gives true */
-#define _PAGE_BIT_PROTNONE      _PAGE_BIT_GLOBAL
-/* - set: nonlinear file mapping, saved PTE; unset:swap */
-#define _PAGE_BIT_FILE          _PAGE_BIT_DIRTY
-
-#define _PAGE_PRESENT   (_AT(pteval_t, 1) << _PAGE_BIT_PRESENT)
-#define _PAGE_RW        (_AT(pteval_t, 1) << _PAGE_BIT_RW)
-#define _PAGE_USER      (_AT(pteval_t, 1) << _PAGE_BIT_USER)
-#define _PAGE_PWT       (_AT(pteval_t, 1) << _PAGE_BIT_PWT)
-#define _PAGE_PCD       (_AT(pteval_t, 1) << _PAGE_BIT_PCD)
-#define _PAGE_ACCESSED  (_AT(pteval_t, 1) << _PAGE_BIT_ACCESSED)
-#define _PAGE_DIRTY     (_AT(pteval_t, 1) << _PAGE_BIT_DIRTY)
-#define _PAGE_PSE       (_AT(pteval_t, 1) << _PAGE_BIT_PSE)
-#define _PAGE_GLOBAL    (_AT(pteval_t, 1) << _PAGE_BIT_GLOBAL)
-#define _PAGE_UNUSED1   (_AT(pteval_t, 1) << _PAGE_BIT_UNUSED1)
-#define _PAGE_IOMAP     (_AT(pteval_t, 1) << _PAGE_BIT_IOMAP)
-#define _PAGE_UNUSED3   (_AT(pteval_t, 1) << _PAGE_BIT_UNUSED3)
-#define _PAGE_PAT       (_AT(pteval_t, 1) << _PAGE_BIT_PAT)
-#define _PAGE_PAT_LARGE (_AT(pteval_t, 1) << _PAGE_BIT_PAT_LARGE)
-#define _PAGE_SPECIAL   (_AT(pteval_t, 1) << _PAGE_BIT_SPECIAL)
-#define _PAGE_CPA_TEST  (_AT(pteval_t, 1) << _PAGE_BIT_CPA_TEST)
-#define __HAVE_ARCH_PTE_SPECIAL
-
-#if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE)
-#define _PAGE_NX        (_AT(pteval_t, 1) << _PAGE_BIT_NX)
-#else
-#define _PAGE_NX        (_AT(pteval_t, 0))
-#endif
+#include <asm/page.h>
 
-#define _PAGE_FILE      (_AT(pteval_t, 1) << _PAGE_BIT_FILE)
-#define _PAGE_PROTNONE  (_AT(pteval_t, 1) << _PAGE_BIT_PROTNONE)
-
-#define _PAGE_TABLE     (_PAGE_PRESENT | _PAGE_RW | _PAGE_USER |        \
-                         _PAGE_ACCESSED | _PAGE_DIRTY)
-#define _KERNPG_TABLE   (_PAGE_PRESENT | _PAGE_RW | _PAGE_ACCESSED |    \
-                         _PAGE_DIRTY)
-
-/* Set of bits not changed in pte_modify */
-#define _PAGE_CHG_MASK  (PTE_PFN_MASK | _PAGE_PCD | _PAGE_PWT |         \
-                         _PAGE_SPECIAL | _PAGE_ACCESSED | _PAGE_DIRTY)
-
-#define _PAGE_CACHE_MASK        (_PAGE_PCD | _PAGE_PWT)
-#define _PAGE_CACHE_WB          (0)
-#define _PAGE_CACHE_WC          (_PAGE_PWT)
-#define _PAGE_CACHE_UC_MINUS    (_PAGE_PCD)
-#define _PAGE_CACHE_UC          (_PAGE_PCD | _PAGE_PWT)
-
-#define PAGE_NONE       __pgprot(_PAGE_PROTNONE | _PAGE_ACCESSED)
-#define PAGE_SHARED     __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | \
-                                 _PAGE_ACCESSED | _PAGE_NX)
-
-#define PAGE_SHARED_EXEC        __pgprot(_PAGE_PRESENT | _PAGE_RW |     \
-                                         _PAGE_USER | _PAGE_ACCESSED)
-#define PAGE_COPY_NOEXEC        __pgprot(_PAGE_PRESENT | _PAGE_USER |   \
-                                         _PAGE_ACCESSED | _PAGE_NX)
-#define PAGE_COPY_EXEC          __pgprot(_PAGE_PRESENT | _PAGE_USER |   \
-                                         _PAGE_ACCESSED)
-#define PAGE_COPY               PAGE_COPY_NOEXEC
-#define PAGE_READONLY           __pgprot(_PAGE_PRESENT | _PAGE_USER |   \
-                                         _PAGE_ACCESSED | _PAGE_NX)
-#define PAGE_READONLY_EXEC      __pgprot(_PAGE_PRESENT | _PAGE_USER |   \
-                                         _PAGE_ACCESSED)
-
-#define __PAGE_KERNEL_EXEC                                              \
-        (_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_GLOBAL)
-#define __PAGE_KERNEL           (__PAGE_KERNEL_EXEC | _PAGE_NX)
-
-#define __PAGE_KERNEL_RO                (__PAGE_KERNEL & ~_PAGE_RW)
-#define __PAGE_KERNEL_RX                (__PAGE_KERNEL_EXEC & ~_PAGE_RW)
-#define __PAGE_KERNEL_EXEC_NOCACHE      (__PAGE_KERNEL_EXEC | _PAGE_PCD | _PAGE_PWT)
-#define __PAGE_KERNEL_WC                (__PAGE_KERNEL | _PAGE_CACHE_WC)
-#define __PAGE_KERNEL_NOCACHE           (__PAGE_KERNEL | _PAGE_PCD | _PAGE_PWT)
-#define __PAGE_KERNEL_UC_MINUS          (__PAGE_KERNEL | _PAGE_PCD)
-#define __PAGE_KERNEL_VSYSCALL          (__PAGE_KERNEL_RX | _PAGE_USER)
-#define __PAGE_KERNEL_VSYSCALL_NOCACHE  (__PAGE_KERNEL_VSYSCALL | _PAGE_PCD | _PAGE_PWT)
-#define __PAGE_KERNEL_LARGE             (__PAGE_KERNEL | _PAGE_PSE)
-#define __PAGE_KERNEL_LARGE_NOCACHE     (__PAGE_KERNEL | _PAGE_CACHE_UC | _PAGE_PSE)
-#define __PAGE_KERNEL_LARGE_EXEC        (__PAGE_KERNEL_EXEC | _PAGE_PSE)
-
-#define __PAGE_KERNEL_IO                (__PAGE_KERNEL | _PAGE_IOMAP)
-#define __PAGE_KERNEL_IO_NOCACHE        (__PAGE_KERNEL_NOCACHE | _PAGE_IOMAP)
-#define __PAGE_KERNEL_IO_UC_MINUS       (__PAGE_KERNEL_UC_MINUS | _PAGE_IOMAP)
-#define __PAGE_KERNEL_IO_WC             (__PAGE_KERNEL_WC | _PAGE_IOMAP)
-
-#define PAGE_KERNEL                     __pgprot(__PAGE_KERNEL)
-#define PAGE_KERNEL_RO                  __pgprot(__PAGE_KERNEL_RO)
-#define PAGE_KERNEL_EXEC                __pgprot(__PAGE_KERNEL_EXEC)
-#define PAGE_KERNEL_RX                  __pgprot(__PAGE_KERNEL_RX)
-#define PAGE_KERNEL_WC                  __pgprot(__PAGE_KERNEL_WC)
-#define PAGE_KERNEL_NOCACHE             __pgprot(__PAGE_KERNEL_NOCACHE)
-#define PAGE_KERNEL_UC_MINUS            __pgprot(__PAGE_KERNEL_UC_MINUS)
-#define PAGE_KERNEL_EXEC_NOCACHE        __pgprot(__PAGE_KERNEL_EXEC_NOCACHE)
-#define PAGE_KERNEL_LARGE               __pgprot(__PAGE_KERNEL_LARGE)
-#define PAGE_KERNEL_LARGE_NOCACHE       __pgprot(__PAGE_KERNEL_LARGE_NOCACHE)
-#define PAGE_KERNEL_LARGE_EXEC          __pgprot(__PAGE_KERNEL_LARGE_EXEC)
-#define PAGE_KERNEL_VSYSCALL            __pgprot(__PAGE_KERNEL_VSYSCALL)
-#define PAGE_KERNEL_VSYSCALL_NOCACHE    __pgprot(__PAGE_KERNEL_VSYSCALL_NOCACHE)
-
-#define PAGE_KERNEL_IO                  __pgprot(__PAGE_KERNEL_IO)
-#define PAGE_KERNEL_IO_NOCACHE          __pgprot(__PAGE_KERNEL_IO_NOCACHE)
-#define PAGE_KERNEL_IO_UC_MINUS         __pgprot(__PAGE_KERNEL_IO_UC_MINUS)
-#define PAGE_KERNEL_IO_WC               __pgprot(__PAGE_KERNEL_IO_WC)
-
-/*         xwr */
-#define __P000  PAGE_NONE
-#define __P001  PAGE_READONLY
-#define __P010  PAGE_COPY
-#define __P011  PAGE_COPY
-#define __P100  PAGE_READONLY_EXEC
-#define __P101  PAGE_READONLY_EXEC
-#define __P110  PAGE_COPY_EXEC
-#define __P111  PAGE_COPY_EXEC
-
-#define __S000  PAGE_NONE
-#define __S001  PAGE_READONLY
-#define __S010  PAGE_SHARED
-#define __S011  PAGE_SHARED
-#define __S100  PAGE_READONLY_EXEC
-#define __S101  PAGE_READONLY_EXEC
-#define __S110  PAGE_SHARED_EXEC
-#define __S111  PAGE_SHARED_EXEC
-
-/*
- * early identity mapping  pte attrib macros.
- */
-#ifdef CONFIG_X86_64
-#define __PAGE_KERNEL_IDENT_LARGE_EXEC  __PAGE_KERNEL_LARGE_EXEC
-#else
-/*
- * For PDE_IDENT_ATTR include USER bit. As the PDE and PTE protection
- * bits are combined, this will alow user to access the high address mapped
- * VDSO in the presence of CONFIG_COMPAT_VDSO
- */
-#define PTE_IDENT_ATTR   0x003          /* PRESENT+RW */
-#define PDE_IDENT_ATTR   0x067          /* PRESENT+RW+USER+DIRTY+ACCESSED */
-#define PGD_IDENT_ATTR   0x001          /* PRESENT (no other attributes) */
-#endif
+#include <asm/pgtable_types.h>
 
 /*
  * Macro to mark a page protection value as UC-
@@ -170,9 +15,6 @@
 
 #ifndef __ASSEMBLY__
 
-#define pgprot_writecombine     pgprot_writecombine
-extern pgprot_t pgprot_writecombine(pgprot_t prot);
-
 /*
  * ZERO_PAGE is a global shared page that is always zero: used
  * for zero-mapped memory areas etc..
@@ -183,6 +25,66 @@ extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)];
 extern spinlock_t pgd_lock;
 extern struct list_head pgd_list;
 
+#ifdef CONFIG_PARAVIRT
+#include <asm/paravirt.h>
+#else  /* !CONFIG_PARAVIRT */
+#define set_pte(ptep, pte)              native_set_pte(ptep, pte)
+#define set_pte_at(mm, addr, ptep, pte) native_set_pte_at(mm, addr, ptep, pte)
+
+#define set_pte_present(mm, addr, ptep, pte)                            \
+        native_set_pte_present(mm, addr, ptep, pte)
+#define set_pte_atomic(ptep, pte)                                       \
+        native_set_pte_atomic(ptep, pte)
+
+#define set_pmd(pmdp, pmd)              native_set_pmd(pmdp, pmd)
+
+#ifndef __PAGETABLE_PUD_FOLDED
+#define set_pgd(pgdp, pgd)              native_set_pgd(pgdp, pgd)
+#define pgd_clear(pgd)                  native_pgd_clear(pgd)
+#endif
+
+#ifndef set_pud
+# define set_pud(pudp, pud)             native_set_pud(pudp, pud)
+#endif
+
+#ifndef __PAGETABLE_PMD_FOLDED
+#define pud_clear(pud)                  native_pud_clear(pud)
+#endif
+
+#define pte_clear(mm, addr, ptep)       native_pte_clear(mm, addr, ptep)
+#define pmd_clear(pmd)                  native_pmd_clear(pmd)
+
+#define pte_update(mm, addr, ptep)              do { } while (0)
+#define pte_update_defer(mm, addr, ptep)        do { } while (0)
+
+static inline void __init paravirt_pagetable_setup_start(pgd_t *base)
+{
+        native_pagetable_setup_start(base);
+}
+
+static inline void __init paravirt_pagetable_setup_done(pgd_t *base)
+{
+        native_pagetable_setup_done(base);
+}
+
+#define pgd_val(x)      native_pgd_val(x)
+#define __pgd(x)        native_make_pgd(x)
+
+#ifndef __PAGETABLE_PUD_FOLDED
+#define pud_val(x)      native_pud_val(x)
+#define __pud(x)        native_make_pud(x)
+#endif
+
+#ifndef __PAGETABLE_PMD_FOLDED
+#define pmd_val(x)      native_pmd_val(x)
+#define __pmd(x)        native_make_pmd(x)
+#endif
+
+#define pte_val(x)      native_pte_val(x)
+#define __pte(x)        native_make_pte(x)
+
+#endif  /* CONFIG_PARAVIRT */
+
 /*
  * The following only work if pte_present() is true.
  * Undefined behaviour if not..
@@ -236,72 +138,84 @@ static inline unsigned long pte_pfn(pte_t pte)
 
 static inline int pmd_large(pmd_t pte)
 {
-        return (pmd_val(pte) & (_PAGE_PSE | _PAGE_PRESENT)) ==
+        return (pmd_flags(pte) & (_PAGE_PSE | _PAGE_PRESENT)) ==
                 (_PAGE_PSE | _PAGE_PRESENT);
 }
 
+static inline pte_t pte_set_flags(pte_t pte, pteval_t set)
+{
+        pteval_t v = native_pte_val(pte);
+
+        return native_make_pte(v | set);
+}
+
+static inline pte_t pte_clear_flags(pte_t pte, pteval_t clear)
+{
+        pteval_t v = native_pte_val(pte);
+
+        return native_make_pte(v & ~clear);
+}
+
 static inline pte_t pte_mkclean(pte_t pte)
 {
-        return __pte(pte_val(pte) & ~_PAGE_DIRTY);
+        return pte_clear_flags(pte, _PAGE_DIRTY);
 }
 
 static inline pte_t pte_mkold(pte_t pte)
 {
-        return __pte(pte_val(pte) & ~_PAGE_ACCESSED);
+        return pte_clear_flags(pte, _PAGE_ACCESSED);
 }
 
 static inline pte_t pte_wrprotect(pte_t pte)
 {
-        return __pte(pte_val(pte) & ~_PAGE_RW);
+        return pte_clear_flags(pte, _PAGE_RW);
 }
 
 static inline pte_t pte_mkexec(pte_t pte)
 {
-        return __pte(pte_val(pte) & ~_PAGE_NX);
+        return pte_clear_flags(pte, _PAGE_NX);
 }
 
 static inline pte_t pte_mkdirty(pte_t pte)
 {
-        return __pte(pte_val(pte) | _PAGE_DIRTY);
+        return pte_set_flags(pte, _PAGE_DIRTY);
 }
 
 static inline pte_t pte_mkyoung(pte_t pte)
 {
-        return __pte(pte_val(pte) | _PAGE_ACCESSED);
+        return pte_set_flags(pte, _PAGE_ACCESSED);
 }
 
 static inline pte_t pte_mkwrite(pte_t pte)
 {
-        return __pte(pte_val(pte) | _PAGE_RW);
+        return pte_set_flags(pte, _PAGE_RW);
 }
 
 static inline pte_t pte_mkhuge(pte_t pte)
 {
-        return __pte(pte_val(pte) | _PAGE_PSE);
+        return pte_set_flags(pte, _PAGE_PSE);
 }
 
 static inline pte_t pte_clrhuge(pte_t pte)
 {
-        return __pte(pte_val(pte) & ~_PAGE_PSE);
+        return pte_clear_flags(pte, _PAGE_PSE);
 }
 
 static inline pte_t pte_mkglobal(pte_t pte)
 {
-        return __pte(pte_val(pte) | _PAGE_GLOBAL);
+        return pte_set_flags(pte, _PAGE_GLOBAL);
 }
 
 static inline pte_t pte_clrglobal(pte_t pte)
 {
-        return __pte(pte_val(pte) & ~_PAGE_GLOBAL);
+        return pte_clear_flags(pte, _PAGE_GLOBAL);
 }
 
 static inline pte_t pte_mkspecial(pte_t pte)
 {
-        return __pte(pte_val(pte) | _PAGE_SPECIAL);
+        return pte_set_flags(pte, _PAGE_SPECIAL);
 }
 
-extern pteval_t __supported_pte_mask;
-
 /*
  * Mask out unsupported bits in a present pgprot.  Non-present pgprots
  * can use those bits for other purposes, so leave them be.
@@ -374,82 +288,197 @@ static inline int is_new_memtype_allowed(unsigned long flags,
         return 1;
 }
 
-#ifndef __ASSEMBLY__
-/* Indicate that x86 has its own track and untrack pfn vma functions */
-#define __HAVE_PFNMAP_TRACKING
-
-#define __HAVE_PHYS_MEM_ACCESS_PROT
-struct file;
-pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
-                              unsigned long size, pgprot_t vma_prot);
-int phys_mem_access_prot_allowed(struct file *file, unsigned long pfn,
-                              unsigned long size, pgprot_t *vma_prot);
-#endif
-
-/* Install a pte for a particular vaddr in kernel space. */
-void set_pte_vaddr(unsigned long vaddr, pte_t pte);
+pmd_t *populate_extra_pmd(unsigned long vaddr);
+pte_t *populate_extra_pte(unsigned long vaddr);
+#endif  /* __ASSEMBLY__ */
 
 #ifdef CONFIG_X86_32
-extern void native_pagetable_setup_start(pgd_t *base);
-extern void native_pagetable_setup_done(pgd_t *base);
+# include "pgtable_32.h"
 #else
-static inline void native_pagetable_setup_start(pgd_t *base) {}
-static inline void native_pagetable_setup_done(pgd_t *base) {}
+# include "pgtable_64.h"
 #endif
 
-struct seq_file;
-extern void arch_report_meminfo(struct seq_file *m);
+#ifndef __ASSEMBLY__
+#include <linux/mm_types.h>
 
-#ifdef CONFIG_PARAVIRT
-#include <asm/paravirt.h>
-#else  /* !CONFIG_PARAVIRT */
-#define set_pte(ptep, pte)              native_set_pte(ptep, pte)
-#define set_pte_at(mm, addr, ptep, pte) native_set_pte_at(mm, addr, ptep, pte)
+static inline int pte_none(pte_t pte)
+{
+        return !pte.pte;
+}
 
-#define set_pte_present(mm, addr, ptep, pte)                            \
-        native_set_pte_present(mm, addr, ptep, pte)
-#define set_pte_atomic(ptep, pte)                                       \
-        native_set_pte_atomic(ptep, pte)
+#define __HAVE_ARCH_PTE_SAME
+static inline int pte_same(pte_t a, pte_t b)
+{
+        return a.pte == b.pte;
+}
 
-#define set_pmd(pmdp, pmd)              native_set_pmd(pmdp, pmd)
+static inline int pte_present(pte_t a)
+{
+        return pte_flags(a) & (_PAGE_PRESENT | _PAGE_PROTNONE);
+}
 
-#ifndef __PAGETABLE_PUD_FOLDED
-#define set_pgd(pgdp, pgd)              native_set_pgd(pgdp, pgd)
-#define pgd_clear(pgd)                  native_pgd_clear(pgd)
-#endif
+static inline int pmd_present(pmd_t pmd)
+{
+        return pmd_flags(pmd) & _PAGE_PRESENT;
+}
 
-#ifndef set_pud
-# define set_pud(pudp, pud)             native_set_pud(pudp, pud)
-#endif
+static inline int pmd_none(pmd_t pmd)
+{
+        /* Only check low word on 32-bit platforms, since it might be
+           out of sync with upper half. */
+        return (unsigned long)native_pmd_val(pmd) == 0;
+}
 
-#ifndef __PAGETABLE_PMD_FOLDED
-#define pud_clear(pud)                  native_pud_clear(pud)
-#endif
+static inline unsigned long pmd_page_vaddr(pmd_t pmd)
+{
+        return (unsigned long)__va(pmd_val(pmd) & PTE_PFN_MASK);
+}
 
-#define pte_clear(mm, addr, ptep)       native_pte_clear(mm, addr, ptep)
-#define pmd_clear(pmd)                  native_pmd_clear(pmd)
+/*
+ * Currently stuck as a macro due to indirect forward reference to
+ * linux/mmzone.h's __section_mem_map_addr() definition:
+ */
+#define pmd_page(pmd)   pfn_to_page(pmd_val(pmd) >> PAGE_SHIFT)
 
-#define pte_update(mm, addr, ptep)              do { } while (0)
-#define pte_update_defer(mm, addr, ptep)        do { } while (0)
+/*
+ * the pmd page can be thought of an array like this: pmd_t[PTRS_PER_PMD]
+ *
+ * this macro returns the index of the entry in the pmd page which would
+ * control the given virtual address
+ */
+static inline unsigned pmd_index(unsigned long address)
+{
+        return (address >> PMD_SHIFT) & (PTRS_PER_PMD - 1);
+}
 
-static inline void __init paravirt_pagetable_setup_start(pgd_t *base)
+/*
+ * Conversion functions: convert a page and protection to a page entry,
+ * and a page entry and page directory to the page they refer to.
+ *
+ * (Currently stuck as a macro because of indirect forward reference
+ * to linux/mm.h:page_to_nid())
+ */
+#define mk_pte(page, pgprot)   pfn_pte(page_to_pfn(page), (pgprot))
+
+/*
+ * the pte page can be thought of an array like this: pte_t[PTRS_PER_PTE]
+ *
+ * this function returns the index of the entry in the pte page which would
+ * control the given virtual address
+ */
+static inline unsigned pte_index(unsigned long address)
 {
-        native_pagetable_setup_start(base);
+        return (address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1);
 }
 
-static inline void __init paravirt_pagetable_setup_done(pgd_t *base)
+static inline pte_t *pte_offset_kernel(pmd_t *pmd, unsigned long address)
 {
-        native_pagetable_setup_done(base);
+        return (pte_t *)pmd_page_vaddr(*pmd) + pte_index(address);
 }
-#endif  /* CONFIG_PARAVIRT */
 
-#endif  /* __ASSEMBLY__ */
+static inline int pmd_bad(pmd_t pmd)
+{
+        return (pmd_flags(pmd) & ~_PAGE_USER) != _KERNPG_TABLE;
+}
 
-#ifdef CONFIG_X86_32
-# include "pgtable_32.h"
+static inline unsigned long pages_to_mb(unsigned long npg)
+{
+        return npg >> (20 - PAGE_SHIFT);
+}
+
+#define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
+        remap_pfn_range(vma, vaddr, pfn, size, prot)
+
+#if PAGETABLE_LEVELS > 2
+static inline int pud_none(pud_t pud)
+{
+        return native_pud_val(pud) == 0;
+}
+
+static inline int pud_present(pud_t pud)
+{
+        return pud_flags(pud) & _PAGE_PRESENT;
+}
+
+static inline unsigned long pud_page_vaddr(pud_t pud)
+{
+        return (unsigned long)__va((unsigned long)pud_val(pud) & PTE_PFN_MASK);
+}
+
+/*
+ * Currently stuck as a macro due to indirect forward reference to
+ * linux/mmzone.h's __section_mem_map_addr() definition:
+ */
+#define pud_page(pud)           pfn_to_page(pud_val(pud) >> PAGE_SHIFT)
+
+/* Find an entry in the second-level page table.. */
+static inline pmd_t *pmd_offset(pud_t *pud, unsigned long address)
+{
+        return (pmd_t *)pud_page_vaddr(*pud) + pmd_index(address);
+}
+
+static inline unsigned long pmd_pfn(pmd_t pmd)
+{
+        return (pmd_val(pmd) & PTE_PFN_MASK) >> PAGE_SHIFT;
+}
+
+static inline int pud_large(pud_t pud)
+{
+        return (pud_val(pud) & (_PAGE_PSE | _PAGE_PRESENT)) ==
+                (_PAGE_PSE | _PAGE_PRESENT);
+}
+
+static inline int pud_bad(pud_t pud)
+{
+        return (pud_flags(pud) & ~(_KERNPG_TABLE | _PAGE_USER)) != 0;
+}
 #else
-# include "pgtable_64.h"
-#endif
+static inline int pud_large(pud_t pud)
+{
+        return 0;
+}
+#endif  /* PAGETABLE_LEVELS > 2 */
+
+#if PAGETABLE_LEVELS > 3
+static inline int pgd_present(pgd_t pgd)
+{
+        return pgd_flags(pgd) & _PAGE_PRESENT;
+}
+
+static inline unsigned long pgd_page_vaddr(pgd_t pgd)
+{
+        return (unsigned long)__va((unsigned long)pgd_val(pgd) & PTE_PFN_MASK);
+}
+
+/*
+ * Currently stuck as a macro due to indirect forward reference to
+ * linux/mmzone.h's __section_mem_map_addr() definition:
+ */
+#define pgd_page(pgd)           pfn_to_page(pgd_val(pgd) >> PAGE_SHIFT)
+
+/* to find an entry in a page-table-directory. */
+static inline unsigned pud_index(unsigned long address)
+{
+        return (address >> PUD_SHIFT) & (PTRS_PER_PUD - 1);
+}
+
+static inline pud_t *pud_offset(pgd_t *pgd, unsigned long address)
+{
+        return (pud_t *)pgd_page_vaddr(*pgd) + pud_index(address);
+}
+
+static inline int pgd_bad(pgd_t pgd)
+{
+        return (pgd_flags(pgd) & ~_PAGE_USER) != _KERNPG_TABLE;
+}
+
+static inline int pgd_none(pgd_t pgd)
+{
+        return !native_pgd_val(pgd);
+}
+#endif  /* PAGETABLE_LEVELS > 3 */
+
+#endif  /* __ASSEMBLY__ */
 
 /*
  * the pgd page can be thought of an array like this: pgd_t[PTRS_PER_PGD]
@@ -476,28 +505,6 @@ static inline void __init paravirt_pagetable_setup_done(pgd_t *base)
 
 #ifndef __ASSEMBLY__
 
-enum {
-        PG_LEVEL_NONE,
-        PG_LEVEL_4K,
-        PG_LEVEL_2M,
-        PG_LEVEL_1G,
-        PG_LEVEL_NUM
-};
-
-#ifdef CONFIG_PROC_FS
-extern void update_page_count(int level, unsigned long pages);
-#else
-static inline void update_page_count(int level, unsigned long pages) { }
-#endif
-
-/*
- * Helper function that returns the kernel pagetable entry controlling
- * the virtual address 'address'. NULL means no pagetable entry present.
- * NOTE: the return type is pte_t but if the pmd is PSE then we return it
- * as a pte too.
- */
-extern pte_t *lookup_address(unsigned long address, unsigned int *level);
-
 /* local pte updates need not use xchg for locking */
 static inline pte_t native_local_ptep_get_and_clear(pte_t *ptep)
 {
diff --git a/arch/x86/include/asm/pgtable_32.h b/arch/x86/include/asm/pgtable_32.h
index 72b020deb46b..97612fc7632f 100644
--- a/arch/x86/include/asm/pgtable_32.h
+++ b/arch/x86/include/asm/pgtable_32.h
@@ -1,6 +1,7 @@
 #ifndef _ASM_X86_PGTABLE_32_H
 #define _ASM_X86_PGTABLE_32_H
 
+#include <asm/pgtable_32_types.h>
 
 /*
  * The Linux memory management assumes a three-level page table setup. On
@@ -33,47 +34,6 @@ void paging_init(void);
 
 extern void set_pmd_pfn(unsigned long, unsigned long, pgprot_t);
 
-/*
- * The Linux x86 paging architecture is 'compile-time dual-mode', it
- * implements both the traditional 2-level x86 page tables and the
- * newer 3-level PAE-mode page tables.
- */
-#ifdef CONFIG_X86_PAE
-# include <asm/pgtable-3level-defs.h>
-# define PMD_SIZE       (1UL << PMD_SHIFT)
-# define PMD_MASK       (~(PMD_SIZE - 1))
-#else
-# include <asm/pgtable-2level-defs.h>
-#endif
-
-#define PGDIR_SIZE      (1UL << PGDIR_SHIFT)
-#define PGDIR_MASK      (~(PGDIR_SIZE - 1))
-
-/* Just any arbitrary offset to the start of the vmalloc VM area: the
- * current 8MB value just means that there will be a 8MB "hole" after the
- * physical memory until the kernel virtual memory starts.  That means that
- * any out-of-bounds memory accesses will hopefully be caught.
- * The vmalloc() routines leaves a hole of 4kB between each vmalloced
- * area for the same reason. ;)
- */
-#define VMALLOC_OFFSET  (8 * 1024 * 1024)
-#define VMALLOC_START   ((unsigned long)high_memory + VMALLOC_OFFSET)
-#ifdef CONFIG_X86_PAE
-#define LAST_PKMAP 512
-#else
-#define LAST_PKMAP 1024
-#endif
-
-#define PKMAP_BASE ((FIXADDR_BOOT_START - PAGE_SIZE * (LAST_PKMAP + 1)) \
-                    & PMD_MASK)
-
-#ifdef CONFIG_HIGHMEM
-# define VMALLOC_END    (PKMAP_BASE - 2 * PAGE_SIZE)
-#else
-# define VMALLOC_END    (FIXADDR_START - 2 * PAGE_SIZE)
-#endif
-
-#define MAXMEM  (VMALLOC_END - PAGE_OFFSET - __VMALLOC_RESERVE)
 
 /*
  * Define this if things work differently on an i386 and an i486:
@@ -85,55 +45,12 @@ extern void set_pmd_pfn(unsigned long, unsigned long, pgprot_t);
 /* The boot page tables (all created as a single array) */
 extern unsigned long pg0[];
 
-#define pte_present(x)  ((x).pte_low & (_PAGE_PRESENT | _PAGE_PROTNONE))
-
-/* To avoid harmful races, pmd_none(x) should check only the lower when PAE */
-#define pmd_none(x)     (!(unsigned long)pmd_val((x)))
-#define pmd_present(x)  (pmd_val((x)) & _PAGE_PRESENT)
-#define pmd_bad(x) ((pmd_val(x) & (PTE_FLAGS_MASK & ~_PAGE_USER)) != _KERNPG_TABLE)
-
-#define pages_to_mb(x) ((x) >> (20-PAGE_SHIFT))
-
 #ifdef CONFIG_X86_PAE
 # include <asm/pgtable-3level.h>
 #else
 # include <asm/pgtable-2level.h>
 #endif
 
-/*
- * Conversion functions: convert a page and protection to a page entry,
- * and a page entry and page directory to the page they refer to.
- */
-#define mk_pte(page, pgprot)    pfn_pte(page_to_pfn(page), (pgprot))
-
-
-static inline int pud_large(pud_t pud) { return 0; }
-
-/*
- * the pmd page can be thought of an array like this: pmd_t[PTRS_PER_PMD]
- *
- * this macro returns the index of the entry in the pmd page which would
- * control the given virtual address
- */
-#define pmd_index(address)                              \
-        (((address) >> PMD_SHIFT) & (PTRS_PER_PMD - 1))
-
-/*
- * the pte page can be thought of an array like this: pte_t[PTRS_PER_PTE]
- *
- * this macro returns the index of the entry in the pte page which would
- * control the given virtual address
- */
-#define pte_index(address)                                      \
-        (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
-#define pte_offset_kernel(dir, address)                         \
-        ((pte_t *)pmd_page_vaddr(*(dir)) +  pte_index((address)))
-
-#define pmd_page(pmd) (pfn_to_page(pmd_val((pmd)) >> PAGE_SHIFT))
-
-#define pmd_page_vaddr(pmd)                                     \
-        ((unsigned long)__va(pmd_val((pmd)) & PTE_PFN_MASK))
-
 #if defined(CONFIG_HIGHPTE)
 #define pte_offset_map(dir, address)                                    \
         ((pte_t *)kmap_atomic_pte(pmd_page(*(dir)), KM_PTE0) +          \
@@ -176,7 +93,4 @@ do {						\
 #define kern_addr_valid(kaddr)  (0)
 #endif
 
-#define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
-        remap_pfn_range(vma, vaddr, pfn, size, prot)
-
 #endif /* _ASM_X86_PGTABLE_32_H */
diff --git a/arch/x86/include/asm/pgtable_32_types.h b/arch/x86/include/asm/pgtable_32_types.h
new file mode 100644
index 000000000000..bd8df3b2fe04
--- /dev/null
+++ b/arch/x86/include/asm/pgtable_32_types.h
@@ -0,0 +1,46 @@
+#ifndef _ASM_X86_PGTABLE_32_DEFS_H
+#define _ASM_X86_PGTABLE_32_DEFS_H
+
+/*
+ * The Linux x86 paging architecture is 'compile-time dual-mode', it
+ * implements both the traditional 2-level x86 page tables and the
+ * newer 3-level PAE-mode page tables.
+ */
+#ifdef CONFIG_X86_PAE
+# include <asm/pgtable-3level_types.h>
+# define PMD_SIZE       (1UL << PMD_SHIFT)
+# define PMD_MASK       (~(PMD_SIZE - 1))
+#else
+# include <asm/pgtable-2level_types.h>
+#endif
+
+#define PGDIR_SIZE      (1UL << PGDIR_SHIFT)
+#define PGDIR_MASK      (~(PGDIR_SIZE - 1))
+
+/* Just any arbitrary offset to the start of the vmalloc VM area: the
+ * current 8MB value just means that there will be a 8MB "hole" after the
+ * physical memory until the kernel virtual memory starts.  That means that
+ * any out-of-bounds memory accesses will hopefully be caught.
+ * The vmalloc() routines leaves a hole of 4kB between each vmalloced
+ * area for the same reason. ;)
+ */
+#define VMALLOC_OFFSET  (8 * 1024 * 1024)
+#define VMALLOC_START   ((unsigned long)high_memory + VMALLOC_OFFSET)
+#ifdef CONFIG_X86_PAE
+#define LAST_PKMAP 512
+#else
+#define LAST_PKMAP 1024
+#endif
+
+#define PKMAP_BASE ((FIXADDR_BOOT_START - PAGE_SIZE * (LAST_PKMAP + 1)) \
+                    & PMD_MASK)
+
+#ifdef CONFIG_HIGHMEM
+# define VMALLOC_END    (PKMAP_BASE - 2 * PAGE_SIZE)
+#else
+# define VMALLOC_END    (FIXADDR_START - 2 * PAGE_SIZE)
+#endif
+
+#define MAXMEM  (VMALLOC_END - PAGE_OFFSET - __VMALLOC_RESERVE)
+
+#endif /* _ASM_X86_PGTABLE_32_DEFS_H */
diff --git a/arch/x86/include/asm/pgtable_64.h b/arch/x86/include/asm/pgtable_64.h
index ba09289accaa..6b87bc6d5018 100644
--- a/arch/x86/include/asm/pgtable_64.h
+++ b/arch/x86/include/asm/pgtable_64.h
@@ -2,6 +2,8 @@
 #define _ASM_X86_PGTABLE_64_H
 
 #include <linux/const.h>
+#include <asm/pgtable_64_types.h>
+
 #ifndef __ASSEMBLY__
 
 /*
@@ -11,7 +13,6 @@
 #include <asm/processor.h>
 #include <linux/bitops.h>
 #include <linux/threads.h>
-#include <asm/pda.h>
 
 extern pud_t level3_kernel_pgt[512];
 extern pud_t level3_ident_pgt[512];
@@ -26,32 +27,6 @@ extern void paging_init(void);
 
 #endif /* !__ASSEMBLY__ */
 
-#define SHARED_KERNEL_PMD       0
-
-/*
- * PGDIR_SHIFT determines what a top-level page table entry can map
- */
-#define PGDIR_SHIFT     39
-#define PTRS_PER_PGD    512
-
-/*
- * 3rd level page
- */
-#define PUD_SHIFT       30
-#define PTRS_PER_PUD    512
-
-/*
- * PMD_SHIFT determines the size of the area a middle-level
- * page table can map
- */
-#define PMD_SHIFT       21
-#define PTRS_PER_PMD    512
-
-/*
- * entries per page directory level
- */
-#define PTRS_PER_PTE    512
-
 #ifndef __ASSEMBLY__
 
 #define pte_ERROR(e)                                    \
@@ -67,9 +42,6 @@ extern void paging_init(void);
         printk("%s:%d: bad pgd %p(%016lx).\n",          \
                __FILE__, __LINE__, &(e), pgd_val(e))
 
-#define pgd_none(x)     (!pgd_val(x))
-#define pud_none(x)     (!pud_val(x))
-
 struct mm_struct;
 
 void set_pte_vaddr_pud(pud_t *pud_page, unsigned long vaddr, pte_t new_pte);
@@ -134,48 +106,6 @@ static inline void native_pgd_clear(pgd_t *pgd)
         native_set_pgd(pgd, native_make_pgd(0));
 }
 
-#define pte_same(a, b)          ((a).pte == (b).pte)
-
-#endif /* !__ASSEMBLY__ */
-
-#define PMD_SIZE        (_AC(1, UL) << PMD_SHIFT)
-#define PMD_MASK        (~(PMD_SIZE - 1))
-#define PUD_SIZE        (_AC(1, UL) << PUD_SHIFT)
-#define PUD_MASK        (~(PUD_SIZE - 1))
-#define PGDIR_SIZE      (_AC(1, UL) << PGDIR_SHIFT)
-#define PGDIR_MASK      (~(PGDIR_SIZE - 1))
-
-
-#define MAXMEM           _AC(__AC(1, UL) << MAX_PHYSMEM_BITS, UL)
-#define VMALLOC_START    _AC(0xffffc20000000000, UL)
-#define VMALLOC_END      _AC(0xffffe1ffffffffff, UL)
-#define VMEMMAP_START    _AC(0xffffe20000000000, UL)
-#define MODULES_VADDR    _AC(0xffffffffa0000000, UL)
-#define MODULES_END      _AC(0xffffffffff000000, UL)
-#define MODULES_LEN   (MODULES_END - MODULES_VADDR)
-
-#ifndef __ASSEMBLY__
-
-static inline int pgd_bad(pgd_t pgd)
-{
-        return (pgd_val(pgd) & ~(PTE_PFN_MASK | _PAGE_USER)) != _KERNPG_TABLE;
-}
-
-static inline int pud_bad(pud_t pud)
-{
-        return (pud_val(pud) & ~(PTE_PFN_MASK | _PAGE_USER)) != _KERNPG_TABLE;
-}
-
-static inline int pmd_bad(pmd_t pmd)
-{
-        return (pmd_val(pmd) & ~(PTE_PFN_MASK | _PAGE_USER)) != _KERNPG_TABLE;
-}
-
-#define pte_none(x)     (!pte_val((x)))
-#define pte_present(x)  (pte_val((x)) & (_PAGE_PRESENT | _PAGE_PROTNONE))
-
-#define pages_to_mb(x)  ((x) >> (20 - PAGE_SHIFT))   /* FIXME: is this right? */
-
 /*
  * Conversion functions: convert a page and protection to a page entry,
  * and a page entry and page directory to the page they refer to.
@@ -184,41 +114,12 @@ static inline int pmd_bad(pmd_t pmd)
 /*
  * Level 4 access.
  */
-#define pgd_page_vaddr(pgd)                                             \
-        ((unsigned long)__va((unsigned long)pgd_val((pgd)) & PTE_PFN_MASK))
-#define pgd_page(pgd)           (pfn_to_page(pgd_val((pgd)) >> PAGE_SHIFT))
-#define pgd_present(pgd) (pgd_val(pgd) & _PAGE_PRESENT)
 static inline int pgd_large(pgd_t pgd) { return 0; }
 #define mk_kernel_pgd(address) __pgd((address) | _KERNPG_TABLE)
 
 /* PUD - Level3 access */
-/* to find an entry in a page-table-directory. */
-#define pud_page_vaddr(pud)                                             \
-        ((unsigned long)__va(pud_val((pud)) & PHYSICAL_PAGE_MASK))
-#define pud_page(pud)   (pfn_to_page(pud_val((pud)) >> PAGE_SHIFT))
-#define pud_index(address) (((address) >> PUD_SHIFT) & (PTRS_PER_PUD - 1))
-#define pud_offset(pgd, address)                                        \
-        ((pud_t *)pgd_page_vaddr(*(pgd)) + pud_index((address)))
-#define pud_present(pud) (pud_val((pud)) & _PAGE_PRESENT)
-
-static inline int pud_large(pud_t pte)
-{
-        return (pud_val(pte) & (_PAGE_PSE | _PAGE_PRESENT)) ==
-                (_PAGE_PSE | _PAGE_PRESENT);
-}
 
 /* PMD  - Level 2 access */
-#define pmd_page_vaddr(pmd) ((unsigned long) __va(pmd_val((pmd)) & PTE_PFN_MASK))
-#define pmd_page(pmd)           (pfn_to_page(pmd_val((pmd)) >> PAGE_SHIFT))
-
-#define pmd_index(address) (((address) >> PMD_SHIFT) & (PTRS_PER_PMD - 1))
-#define pmd_offset(dir, address) ((pmd_t *)pud_page_vaddr(*(dir)) + \
-                                  pmd_index(address))
-#define pmd_none(x)     (!pmd_val((x)))
-#define pmd_present(x)  (pmd_val((x)) & _PAGE_PRESENT)
-#define pfn_pmd(nr, prot) (__pmd(((nr) << PAGE_SHIFT) | pgprot_val((prot))))
-#define pmd_pfn(x)  ((pmd_val((x)) & __PHYSICAL_MASK) >> PAGE_SHIFT)
-
 #define pte_to_pgoff(pte) ((pte_val((pte)) & PHYSICAL_PAGE_MASK) >> PAGE_SHIFT)
 #define pgoff_to_pte(off) ((pte_t) { .pte = ((off) << PAGE_SHIFT) |     \
                                             _PAGE_FILE })
@@ -226,13 +127,6 @@ static inline int pud_large(pud_t pte)
 
 /* PTE - Level 1 access. */
 
-/* page, protection -> pte */
-#define mk_pte(page, pgprot)    pfn_pte(page_to_pfn((page)), (pgprot))
-
-#define pte_index(address) (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
-#define pte_offset_kernel(dir, address) ((pte_t *) pmd_page_vaddr(*(dir)) + \
-                                         pte_index((address)))
-
 /* x86-64 always has all page tables mapped. */
 #define pte_offset_map(dir, address) pte_offset_kernel((dir), (address))
 #define pte_offset_map_nested(dir, address) pte_offset_kernel((dir), (address))
@@ -266,9 +160,6 @@ extern int direct_gbpages;
 extern int kern_addr_valid(unsigned long addr);
 extern void cleanup_highmap(void);
 
-#define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
-        remap_pfn_range(vma, vaddr, pfn, size, prot)
-
 #define HAVE_ARCH_UNMAPPED_AREA
 #define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN
 
diff --git a/arch/x86/include/asm/pgtable_64_types.h b/arch/x86/include/asm/pgtable_64_types.h
new file mode 100644
index 000000000000..fbf42b8e0383
--- /dev/null
+++ b/arch/x86/include/asm/pgtable_64_types.h
@@ -0,0 +1,63 @@
+#ifndef _ASM_X86_PGTABLE_64_DEFS_H
+#define _ASM_X86_PGTABLE_64_DEFS_H
+
+#ifndef __ASSEMBLY__
+#include <linux/types.h>
+
+/*
+ * These are used to make use of C type-checking..
+ */
+typedef unsigned long   pteval_t;
+typedef unsigned long   pmdval_t;
+typedef unsigned long   pudval_t;
+typedef unsigned long   pgdval_t;
+typedef unsigned long   pgprotval_t;
+
+typedef struct { pteval_t pte; } pte_t;
+
+#endif  /* !__ASSEMBLY__ */
+
+#define SHARED_KERNEL_PMD       0
+#define PAGETABLE_LEVELS        4
+
+/*
+ * PGDIR_SHIFT determines what a top-level page table entry can map
+ */
+#define PGDIR_SHIFT     39
+#define PTRS_PER_PGD    512
+
+/*
+ * 3rd level page
+ */
+#define PUD_SHIFT       30
+#define PTRS_PER_PUD    512
+
+/*
+ * PMD_SHIFT determines the size of the area a middle-level
+ * page table can map
+ */
+#define PMD_SHIFT       21
+#define PTRS_PER_PMD    512
+
+/*
+ * entries per page directory level
+ */
+#define PTRS_PER_PTE    512
+
+#define PMD_SIZE        (_AC(1, UL) << PMD_SHIFT)
+#define PMD_MASK        (~(PMD_SIZE - 1))
+#define PUD_SIZE        (_AC(1, UL) << PUD_SHIFT)
+#define PUD_MASK        (~(PUD_SIZE - 1))
+#define PGDIR_SIZE      (_AC(1, UL) << PGDIR_SHIFT)
+#define PGDIR_MASK      (~(PGDIR_SIZE - 1))
+
+
+#define MAXMEM           _AC(__AC(1, UL) << MAX_PHYSMEM_BITS, UL)
+#define VMALLOC_START    _AC(0xffffc20000000000, UL)
+#define VMALLOC_END      _AC(0xffffe1ffffffffff, UL)
+#define VMEMMAP_START    _AC(0xffffe20000000000, UL)
+#define MODULES_VADDR    _AC(0xffffffffa0000000, UL)
+#define MODULES_END      _AC(0xffffffffff000000, UL)
+#define MODULES_LEN   (MODULES_END - MODULES_VADDR)
+
+#endif /* _ASM_X86_PGTABLE_64_DEFS_H */
diff --git a/arch/x86/include/asm/pgtable_types.h b/arch/x86/include/asm/pgtable_types.h
new file mode 100644
index 000000000000..4d258ad76a0f
--- /dev/null
+++ b/arch/x86/include/asm/pgtable_types.h
@@ -0,0 +1,328 @@
+#ifndef _ASM_X86_PGTABLE_DEFS_H
+#define _ASM_X86_PGTABLE_DEFS_H
+
+#include <linux/const.h>
+#include <asm/page_types.h>
+
+#define FIRST_USER_ADDRESS      0
+
+#define _PAGE_BIT_PRESENT       0       /* is present */
+#define _PAGE_BIT_RW            1       /* writeable */
+#define _PAGE_BIT_USER          2       /* userspace addressable */
+#define _PAGE_BIT_PWT           3       /* page write through */
+#define _PAGE_BIT_PCD           4       /* page cache disabled */
+#define _PAGE_BIT_ACCESSED      5       /* was accessed (raised by CPU) */
+#define _PAGE_BIT_DIRTY         6       /* was written to (raised by CPU) */
+#define _PAGE_BIT_PSE           7       /* 4 MB (or 2MB) page */
+#define _PAGE_BIT_PAT           7       /* on 4KB pages */
+#define _PAGE_BIT_GLOBAL        8       /* Global TLB entry PPro+ */
+#define _PAGE_BIT_UNUSED1       9       /* available for programmer */
+#define _PAGE_BIT_IOMAP         10      /* flag used to indicate IO mapping */
+#define _PAGE_BIT_UNUSED3       11
+#define _PAGE_BIT_PAT_LARGE     12      /* On 2MB or 1GB pages */
+#define _PAGE_BIT_SPECIAL       _PAGE_BIT_UNUSED1
+#define _PAGE_BIT_CPA_TEST      _PAGE_BIT_UNUSED1
+#define _PAGE_BIT_NX           63       /* No execute: only valid after cpuid check */
+
+/* If _PAGE_BIT_PRESENT is clear, we use these: */
+/* - if the user mapped it with PROT_NONE; pte_present gives true */
+#define _PAGE_BIT_PROTNONE      _PAGE_BIT_GLOBAL
+/* - set: nonlinear file mapping, saved PTE; unset:swap */
+#define _PAGE_BIT_FILE          _PAGE_BIT_DIRTY
+
+#define _PAGE_PRESENT   (_AT(pteval_t, 1) << _PAGE_BIT_PRESENT)
+#define _PAGE_RW        (_AT(pteval_t, 1) << _PAGE_BIT_RW)
+#define _PAGE_USER      (_AT(pteval_t, 1) << _PAGE_BIT_USER)
+#define _PAGE_PWT       (_AT(pteval_t, 1) << _PAGE_BIT_PWT)
+#define _PAGE_PCD       (_AT(pteval_t, 1) << _PAGE_BIT_PCD)
+#define _PAGE_ACCESSED  (_AT(pteval_t, 1) << _PAGE_BIT_ACCESSED)
+#define _PAGE_DIRTY     (_AT(pteval_t, 1) << _PAGE_BIT_DIRTY)
+#define _PAGE_PSE       (_AT(pteval_t, 1) << _PAGE_BIT_PSE)
+#define _PAGE_GLOBAL    (_AT(pteval_t, 1) << _PAGE_BIT_GLOBAL)
+#define _PAGE_UNUSED1   (_AT(pteval_t, 1) << _PAGE_BIT_UNUSED1)
+#define _PAGE_IOMAP     (_AT(pteval_t, 1) << _PAGE_BIT_IOMAP)
+#define _PAGE_UNUSED3   (_AT(pteval_t, 1) << _PAGE_BIT_UNUSED3)
+#define _PAGE_PAT       (_AT(pteval_t, 1) << _PAGE_BIT_PAT)
+#define _PAGE_PAT_LARGE (_AT(pteval_t, 1) << _PAGE_BIT_PAT_LARGE)
+#define _PAGE_SPECIAL   (_AT(pteval_t, 1) << _PAGE_BIT_SPECIAL)
+#define _PAGE_CPA_TEST  (_AT(pteval_t, 1) << _PAGE_BIT_CPA_TEST)
+#define __HAVE_ARCH_PTE_SPECIAL
+
+#if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE)
+#define _PAGE_NX        (_AT(pteval_t, 1) << _PAGE_BIT_NX)
+#else
+#define _PAGE_NX        (_AT(pteval_t, 0))
+#endif
+
+#define _PAGE_FILE      (_AT(pteval_t, 1) << _PAGE_BIT_FILE)
+#define _PAGE_PROTNONE  (_AT(pteval_t, 1) << _PAGE_BIT_PROTNONE)
+
+#define _PAGE_TABLE     (_PAGE_PRESENT | _PAGE_RW | _PAGE_USER |        \
+                         _PAGE_ACCESSED | _PAGE_DIRTY)
+#define _KERNPG_TABLE   (_PAGE_PRESENT | _PAGE_RW | _PAGE_ACCESSED |    \
+                         _PAGE_DIRTY)
+
+/* Set of bits not changed in pte_modify */
+#define _PAGE_CHG_MASK  (PTE_PFN_MASK | _PAGE_PCD | _PAGE_PWT |         \
+                         _PAGE_SPECIAL | _PAGE_ACCESSED | _PAGE_DIRTY)
+
+#define _PAGE_CACHE_MASK        (_PAGE_PCD | _PAGE_PWT)
+#define _PAGE_CACHE_WB          (0)
+#define _PAGE_CACHE_WC          (_PAGE_PWT)
+#define _PAGE_CACHE_UC_MINUS    (_PAGE_PCD)
+#define _PAGE_CACHE_UC          (_PAGE_PCD | _PAGE_PWT)
+
+#define PAGE_NONE       __pgprot(_PAGE_PROTNONE | _PAGE_ACCESSED)
+#define PAGE_SHARED     __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | \
+                                 _PAGE_ACCESSED | _PAGE_NX)
+
+#define PAGE_SHARED_EXEC        __pgprot(_PAGE_PRESENT | _PAGE_RW |     \
+                                         _PAGE_USER | _PAGE_ACCESSED)
+#define PAGE_COPY_NOEXEC        __pgprot(_PAGE_PRESENT | _PAGE_USER |   \
+                                         _PAGE_ACCESSED | _PAGE_NX)
+#define PAGE_COPY_EXEC          __pgprot(_PAGE_PRESENT | _PAGE_USER |   \
+                                         _PAGE_ACCESSED)
+#define PAGE_COPY               PAGE_COPY_NOEXEC
+#define PAGE_READONLY           __pgprot(_PAGE_PRESENT | _PAGE_USER |   \
+                                         _PAGE_ACCESSED | _PAGE_NX)
+#define PAGE_READONLY_EXEC      __pgprot(_PAGE_PRESENT | _PAGE_USER |   \
+                                         _PAGE_ACCESSED)
+
+#define __PAGE_KERNEL_EXEC                                              \
+        (_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_GLOBAL)
+#define __PAGE_KERNEL           (__PAGE_KERNEL_EXEC | _PAGE_NX)
+
+#define __PAGE_KERNEL_RO                (__PAGE_KERNEL & ~_PAGE_RW)
+#define __PAGE_KERNEL_RX                (__PAGE_KERNEL_EXEC & ~_PAGE_RW)
+#define __PAGE_KERNEL_EXEC_NOCACHE      (__PAGE_KERNEL_EXEC | _PAGE_PCD | _PAGE_PWT)
+#define __PAGE_KERNEL_WC                (__PAGE_KERNEL | _PAGE_CACHE_WC)
+#define __PAGE_KERNEL_NOCACHE           (__PAGE_KERNEL | _PAGE_PCD | _PAGE_PWT)
+#define __PAGE_KERNEL_UC_MINUS          (__PAGE_KERNEL | _PAGE_PCD)
+#define __PAGE_KERNEL_VSYSCALL          (__PAGE_KERNEL_RX | _PAGE_USER)
+#define __PAGE_KERNEL_VSYSCALL_NOCACHE  (__PAGE_KERNEL_VSYSCALL | _PAGE_PCD | _PAGE_PWT)
+#define __PAGE_KERNEL_LARGE             (__PAGE_KERNEL | _PAGE_PSE)
+#define __PAGE_KERNEL_LARGE_NOCACHE     (__PAGE_KERNEL | _PAGE_CACHE_UC | _PAGE_PSE)
+#define __PAGE_KERNEL_LARGE_EXEC        (__PAGE_KERNEL_EXEC | _PAGE_PSE)
+
+#define __PAGE_KERNEL_IO                (__PAGE_KERNEL | _PAGE_IOMAP)
+#define __PAGE_KERNEL_IO_NOCACHE        (__PAGE_KERNEL_NOCACHE | _PAGE_IOMAP)
+#define __PAGE_KERNEL_IO_UC_MINUS       (__PAGE_KERNEL_UC_MINUS | _PAGE_IOMAP)
+#define __PAGE_KERNEL_IO_WC             (__PAGE_KERNEL_WC | _PAGE_IOMAP)
+
+#define PAGE_KERNEL                     __pgprot(__PAGE_KERNEL)
+#define PAGE_KERNEL_RO                  __pgprot(__PAGE_KERNEL_RO)
+#define PAGE_KERNEL_EXEC                __pgprot(__PAGE_KERNEL_EXEC)
+#define PAGE_KERNEL_RX                  __pgprot(__PAGE_KERNEL_RX)
+#define PAGE_KERNEL_WC                  __pgprot(__PAGE_KERNEL_WC)
+#define PAGE_KERNEL_NOCACHE             __pgprot(__PAGE_KERNEL_NOCACHE)
+#define PAGE_KERNEL_UC_MINUS            __pgprot(__PAGE_KERNEL_UC_MINUS)
+#define PAGE_KERNEL_EXEC_NOCACHE        __pgprot(__PAGE_KERNEL_EXEC_NOCACHE)
+#define PAGE_KERNEL_LARGE               __pgprot(__PAGE_KERNEL_LARGE)
+#define PAGE_KERNEL_LARGE_NOCACHE       __pgprot(__PAGE_KERNEL_LARGE_NOCACHE)
+#define PAGE_KERNEL_LARGE_EXEC          __pgprot(__PAGE_KERNEL_LARGE_EXEC)
+#define PAGE_KERNEL_VSYSCALL            __pgprot(__PAGE_KERNEL_VSYSCALL)
+#define PAGE_KERNEL_VSYSCALL_NOCACHE    __pgprot(__PAGE_KERNEL_VSYSCALL_NOCACHE)
+
+#define PAGE_KERNEL_IO                  __pgprot(__PAGE_KERNEL_IO)
+#define PAGE_KERNEL_IO_NOCACHE          __pgprot(__PAGE_KERNEL_IO_NOCACHE)
+#define PAGE_KERNEL_IO_UC_MINUS         __pgprot(__PAGE_KERNEL_IO_UC_MINUS)
+#define PAGE_KERNEL_IO_WC               __pgprot(__PAGE_KERNEL_IO_WC)
+
+/*         xwr */
+#define __P000  PAGE_NONE
+#define __P001  PAGE_READONLY
+#define __P010  PAGE_COPY
+#define __P011  PAGE_COPY
+#define __P100  PAGE_READONLY_EXEC
+#define __P101  PAGE_READONLY_EXEC
+#define __P110  PAGE_COPY_EXEC
+#define __P111  PAGE_COPY_EXEC
+
+#define __S000  PAGE_NONE
+#define __S001  PAGE_READONLY
+#define __S010  PAGE_SHARED
+#define __S011  PAGE_SHARED
+#define __S100  PAGE_READONLY_EXEC
+#define __S101  PAGE_READONLY_EXEC
+#define __S110  PAGE_SHARED_EXEC
+#define __S111  PAGE_SHARED_EXEC
+
+/*
+ * early identity mapping  pte attrib macros.
+ */
+#ifdef CONFIG_X86_64
+#define __PAGE_KERNEL_IDENT_LARGE_EXEC  __PAGE_KERNEL_LARGE_EXEC
+#else
+/*
+ * For PDE_IDENT_ATTR include USER bit. As the PDE and PTE protection
+ * bits are combined, this will alow user to access the high address mapped
+ * VDSO in the presence of CONFIG_COMPAT_VDSO
+ */
+#define PTE_IDENT_ATTR   0x003          /* PRESENT+RW */
+#define PDE_IDENT_ATTR   0x067          /* PRESENT+RW+USER+DIRTY+ACCESSED */
+#define PGD_IDENT_ATTR   0x001          /* PRESENT (no other attributes) */
+#endif
+
+#ifdef CONFIG_X86_32
+# include "pgtable_32_types.h"
+#else
+# include "pgtable_64_types.h"
+#endif
+
+#ifndef __ASSEMBLY__
+
+#include <linux/types.h>
+
+/* PTE_PFN_MASK extracts the PFN from a (pte|pmd|pud|pgd)val_t */
+#define PTE_PFN_MASK            ((pteval_t)PHYSICAL_PAGE_MASK)
+
+/* PTE_FLAGS_MASK extracts the flags from a (pte|pmd|pud|pgd)val_t */
+#define PTE_FLAGS_MASK          (~PTE_PFN_MASK)
+
+typedef struct pgprot { pgprotval_t pgprot; } pgprot_t;
+
+typedef struct { pgdval_t pgd; } pgd_t;
+
+static inline pgd_t native_make_pgd(pgdval_t val)
+{
+        return (pgd_t) { val };
+}
+
+static inline pgdval_t native_pgd_val(pgd_t pgd)
+{
+        return pgd.pgd;
+}
+
+static inline pgdval_t pgd_flags(pgd_t pgd)
+{
+        return native_pgd_val(pgd) & PTE_FLAGS_MASK;
+}
+
+#if PAGETABLE_LEVELS > 3
+typedef struct { pudval_t pud; } pud_t;
+
+static inline pud_t native_make_pud(pmdval_t val)
+{
+        return (pud_t) { val };
+}
+
+static inline pudval_t native_pud_val(pud_t pud)
+{
+        return pud.pud;
+}
+#else
+#include <asm-generic/pgtable-nopud.h>
+
+static inline pudval_t native_pud_val(pud_t pud)
+{
+        return native_pgd_val(pud.pgd);
+}
+#endif
+
+#if PAGETABLE_LEVELS > 2
+typedef struct { pmdval_t pmd; } pmd_t;
+
+static inline pmd_t native_make_pmd(pmdval_t val)
+{
+        return (pmd_t) { val };
+}
+
+static inline pmdval_t native_pmd_val(pmd_t pmd)
+{
+        return pmd.pmd;
+}
+#else
+#include <asm-generic/pgtable-nopmd.h>
+
+static inline pmdval_t native_pmd_val(pmd_t pmd)
+{
+        return native_pgd_val(pmd.pud.pgd);
+}
+#endif
+
+static inline pudval_t pud_flags(pud_t pud)
+{
+        return native_pud_val(pud) & PTE_FLAGS_MASK;
+}
+
+static inline pmdval_t pmd_flags(pmd_t pmd)
+{
+        return native_pmd_val(pmd) & PTE_FLAGS_MASK;
+}
+
+static inline pte_t native_make_pte(pteval_t val)
+{
+        return (pte_t) { .pte = val };
+}
+
+static inline pteval_t native_pte_val(pte_t pte)
+{
+        return pte.pte;
+}
+
+static inline pteval_t pte_flags(pte_t pte)
+{
+        return native_pte_val(pte) & PTE_FLAGS_MASK;
+}
+
+#define pgprot_val(x)   ((x).pgprot)
+#define __pgprot(x)     ((pgprot_t) { (x) } )
+
+
+typedef struct page *pgtable_t;
+
+extern pteval_t __supported_pte_mask;
+extern int nx_enabled;
+
+#define pgprot_writecombine     pgprot_writecombine
+extern pgprot_t pgprot_writecombine(pgprot_t prot);
+
+/* Indicate that x86 has its own track and untrack pfn vma functions */
+#define __HAVE_PFNMAP_TRACKING
+
+#define __HAVE_PHYS_MEM_ACCESS_PROT
+struct file;
+pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
+                              unsigned long size, pgprot_t vma_prot);
+int phys_mem_access_prot_allowed(struct file *file, unsigned long pfn,
+                              unsigned long size, pgprot_t *vma_prot);
+
+/* Install a pte for a particular vaddr in kernel space. */
+void set_pte_vaddr(unsigned long vaddr, pte_t pte);
+
+#ifdef CONFIG_X86_32
+extern void native_pagetable_setup_start(pgd_t *base);
+extern void native_pagetable_setup_done(pgd_t *base);
+#else
+static inline void native_pagetable_setup_start(pgd_t *base) {}
+static inline void native_pagetable_setup_done(pgd_t *base) {}
+#endif
+
+struct seq_file;
+extern void arch_report_meminfo(struct seq_file *m);
+
+enum {
+        PG_LEVEL_NONE,
+        PG_LEVEL_4K,
+        PG_LEVEL_2M,
+        PG_LEVEL_1G,
+        PG_LEVEL_NUM
+};
+
+#ifdef CONFIG_PROC_FS
+extern void update_page_count(int level, unsigned long pages);
+#else
+static inline void update_page_count(int level, unsigned long pages) { }
+#endif
+
+/*
+ * Helper function that returns the kernel pagetable entry controlling
+ * the virtual address 'address'. NULL means no pagetable entry present.
+ * NOTE: the return type is pte_t but if the pmd is PSE then we return it
+ * as a pte too.
+ */
+extern pte_t *lookup_address(unsigned long address, unsigned int *level);
+
+#endif  /* !__ASSEMBLY__ */
+
+#endif /* _ASM_X86_PGTABLE_DEFS_H */
diff --git a/arch/x86/include/asm/prctl.h b/arch/x86/include/asm/prctl.h
index a8894647dd9a..3ac5032fae09 100644
--- a/arch/x86/include/asm/prctl.h
+++ b/arch/x86/include/asm/prctl.h
@@ -6,8 +6,4 @@
 #define ARCH_GET_FS 0x1003
 #define ARCH_GET_GS 0x1004
 
-#ifdef CONFIG_X86_64
-extern long sys_arch_prctl(int, unsigned long);
-#endif /* CONFIG_X86_64 */
-
 #endif /* _ASM_X86_PRCTL_H */
diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h
index 3bfd5235a9eb..76139506c3e4 100644
--- a/arch/x86/include/asm/processor.h
+++ b/arch/x86/include/asm/processor.h
@@ -16,6 +16,7 @@ struct mm_struct;
 #include <asm/cpufeature.h>
 #include <asm/system.h>
 #include <asm/page.h>
+#include <asm/pgtable_types.h>
 #include <asm/percpu.h>
 #include <asm/msr.h>
 #include <asm/desc_defs.h>
@@ -73,7 +74,7 @@ struct cpuinfo_x86 {
         char                    pad0;
 #else
         /* Number of 4K pages in DTLB/ITLB combined(in pages): */
-        int                      x86_tlbsize;
+        int                     x86_tlbsize;
         __u8                    x86_virt_bits;
         __u8                    x86_phys_bits;
 #endif
@@ -247,7 +248,6 @@ struct x86_hw_tss {
 #define IO_BITMAP_LONGS                 (IO_BITMAP_BYTES/sizeof(long))
 #define IO_BITMAP_OFFSET                offsetof(struct tss_struct, io_bitmap)
 #define INVALID_IO_BITMAP_OFFSET        0x8000
-#define INVALID_IO_BITMAP_OFFSET_LAZY   0x9000
 
 struct tss_struct {
         /*
@@ -262,11 +262,6 @@ struct tss_struct {
          * be within the limit.
          */
         unsigned long           io_bitmap[IO_BITMAP_LONGS + 1];
-        /*
-         * Cache the current maximum and the last task that used the bitmap:
-         */
-        unsigned long           io_bitmap_max;
-        struct thread_struct    *io_bitmap_owner;
 
         /*
          * .. and then another 0x100 bytes for the emergency kernel stack:
@@ -378,9 +373,30 @@ union thread_xstate {
 
 #ifdef CONFIG_X86_64
 DECLARE_PER_CPU(struct orig_ist, orig_ist);
+
+union irq_stack_union {
+        char irq_stack[IRQ_STACK_SIZE];
+        /*
+         * GCC hardcodes the stack canary as %gs:40.  Since the
+         * irq_stack is the object at %gs:0, we reserve the bottom
+         * 48 bytes of the irq stack for the canary.
+         */
+        struct {
+                char gs_base[40];
+                unsigned long stack_canary;
+        };
+};
+
+DECLARE_PER_CPU(union irq_stack_union, irq_stack_union);
+DECLARE_INIT_PER_CPU(irq_stack_union);
+
+DECLARE_PER_CPU(char *, irq_stack_ptr);
+#else   /* X86_64 */
+#ifdef CONFIG_CC_STACKPROTECTOR
+DECLARE_PER_CPU(unsigned long, stack_canary);
 #endif
+#endif  /* X86_64 */
 
-extern void print_cpu_info(struct cpuinfo_x86 *);
 extern unsigned int xstate_size;
 extern void free_thread_xstate(struct task_struct *);
 extern struct kmem_cache *task_xstate_cachep;
@@ -752,9 +768,9 @@ extern int sysenter_setup(void);
 extern struct desc_ptr          early_gdt_descr;
 
 extern void cpu_set_gdt(int);
-extern void switch_to_new_gdt(void);
+extern void switch_to_new_gdt(int);
+extern void load_percpu_segment(int);
 extern void cpu_init(void);
-extern void init_gdt(int cpu);
 
 static inline unsigned long get_debugctlmsr(void)
 {
@@ -839,6 +855,7 @@ static inline void spin_lock_prefetch(const void *x)
  * User space process size: 3GB (default).
  */
 #define TASK_SIZE               PAGE_OFFSET
+#define TASK_SIZE_MAX           TASK_SIZE
 #define STACK_TOP               TASK_SIZE
 #define STACK_TOP_MAX           STACK_TOP
 
@@ -898,7 +915,7 @@ extern unsigned long thread_saved_pc(struct task_struct *tsk);
 /*
  * User space process size. 47bits minus one guard page.
  */
-#define TASK_SIZE64     ((1UL << 47) - PAGE_SIZE)
+#define TASK_SIZE_MAX   ((1UL << 47) - PAGE_SIZE)
 
 /* This decides where the kernel will search for a free chunk of vm
  * space during mmap's.
@@ -907,12 +924,12 @@ extern unsigned long thread_saved_pc(struct task_struct *tsk);
                                         0xc0000000 : 0xFFFFe000)
 
 #define TASK_SIZE               (test_thread_flag(TIF_IA32) ? \
-                                        IA32_PAGE_OFFSET : TASK_SIZE64)
+                                        IA32_PAGE_OFFSET : TASK_SIZE_MAX)
 #define TASK_SIZE_OF(child)     ((test_tsk_thread_flag(child, TIF_IA32)) ? \
-                                        IA32_PAGE_OFFSET : TASK_SIZE64)
+                                        IA32_PAGE_OFFSET : TASK_SIZE_MAX)
 
 #define STACK_TOP               TASK_SIZE
-#define STACK_TOP_MAX           TASK_SIZE64
+#define STACK_TOP_MAX           TASK_SIZE_MAX
 
 #define INIT_THREAD  { \
         .sp0 = (unsigned long)&init_stack + sizeof(init_stack) \
diff --git a/arch/x86/include/asm/proto.h b/arch/x86/include/asm/proto.h
index d6a22f92ba77..49fb3ecf3bb3 100644
--- a/arch/x86/include/asm/proto.h
+++ b/arch/x86/include/asm/proto.h
@@ -18,11 +18,7 @@ extern void syscall32_cpu_init(void);
 
 extern void check_efer(void);
 
-#ifdef CONFIG_X86_BIOS_REBOOT
 extern int reboot_force;
-#else
-static const int reboot_force = 0;
-#endif
 
 long do_arch_prctl(struct task_struct *task, int code, unsigned long addr);
 
diff --git a/arch/x86/include/asm/ptrace.h b/arch/x86/include/asm/ptrace.h
index 6d34d954c228..e304b66abeea 100644
--- a/arch/x86/include/asm/ptrace.h
+++ b/arch/x86/include/asm/ptrace.h
@@ -28,7 +28,7 @@ struct pt_regs {
         int  xds;
         int  xes;
         int  xfs;
-        /* int  gs; */
+        int  xgs;
         long orig_eax;
         long eip;
         int  xcs;
@@ -50,7 +50,7 @@ struct pt_regs {
         unsigned long ds;
         unsigned long es;
         unsigned long fs;
-        /* int  gs; */
+        unsigned long gs;
         unsigned long orig_ax;
         unsigned long ip;
         unsigned long cs;
diff --git a/arch/x86/include/asm/mach-rdc321x/rdc321x_defs.h b/arch/x86/include/asm/rdc321x_defs.h
index c8e9c8bed3d0..c8e9c8bed3d0 100644
--- a/arch/x86/include/asm/mach-rdc321x/rdc321x_defs.h
+++ b/arch/x86/include/asm/rdc321x_defs.h
diff --git a/arch/x86/include/asm/segment.h b/arch/x86/include/asm/segment.h
index 1dc1b51ac623..14e0ed86a6f9 100644
--- a/arch/x86/include/asm/segment.h
+++ b/arch/x86/include/asm/segment.h
@@ -61,7 +61,7 @@
  *
  *  26 - ESPFIX small SS
  *  27 - per-cpu                        [ offset to per-cpu data area ]
- *  28 - unused
+ *  28 - stack_canary-20                [ for stack protector ]
  *  29 - unused
  *  30 - unused
  *  31 - TSS for double fault handler
@@ -95,6 +95,13 @@
 #define __KERNEL_PERCPU 0
 #endif
 
+#define GDT_ENTRY_STACK_CANARY          (GDT_ENTRY_KERNEL_BASE + 16)
+#ifdef CONFIG_CC_STACKPROTECTOR
+#define __KERNEL_STACK_CANARY           (GDT_ENTRY_STACK_CANARY * 8)
+#else
+#define __KERNEL_STACK_CANARY           0
+#endif
+
 #define GDT_ENTRY_DOUBLEFAULT_TSS       31
 
 /*
diff --git a/arch/x86/include/asm/setup.h b/arch/x86/include/asm/setup.h
index ebe858cdc8a3..05c6f6b11fd5 100644
--- a/arch/x86/include/asm/setup.h
+++ b/arch/x86/include/asm/setup.h
@@ -1,33 +1,19 @@
 #ifndef _ASM_X86_SETUP_H
 #define _ASM_X86_SETUP_H
 
+#ifdef __KERNEL__
+
 #define COMMAND_LINE_SIZE 2048
 
 #ifndef __ASSEMBLY__
 
-/* Interrupt control for vSMPowered x86_64 systems */
-void vsmp_init(void);
-
-
-void setup_bios_corruption_check(void);
-
-
-#ifdef CONFIG_X86_VISWS
-extern void visws_early_detect(void);
-extern int is_visws_box(void);
-#else
-static inline void visws_early_detect(void) { }
-static inline int is_visws_box(void) { return 0; }
-#endif
-
-extern int wakeup_secondary_cpu_via_nmi(int apicid, unsigned long start_eip);
-extern int wakeup_secondary_cpu_via_init(int apicid, unsigned long start_eip);
 /*
  * Any setup quirks to be performed?
  */
 struct mpc_cpu;
 struct mpc_bus;
 struct mpc_oemtable;
+
 struct x86_quirks {
         int (*arch_pre_time_init)(void);
         int (*arch_time_init)(void);
@@ -43,20 +29,19 @@ struct x86_quirks {
         void (*mpc_oem_bus_info)(struct mpc_bus *m, char *name);
         void (*mpc_oem_pci_bus)(struct mpc_bus *m);
         void (*smp_read_mpc_oem)(struct mpc_oemtable *oemtable,
-                                    unsigned short oemsize);
+                                unsigned short oemsize);
         int (*setup_ioapic_ids)(void);
-        int (*update_genapic)(void);
 };
 
-extern struct x86_quirks *x86_quirks;
-extern unsigned long saved_video_mode;
+extern void x86_quirk_pre_intr_init(void);
+extern void x86_quirk_intr_init(void);
 
-#ifndef CONFIG_PARAVIRT
-#define paravirt_post_allocator_init()  do {} while (0)
-#endif
-#endif /* __ASSEMBLY__ */
+extern void x86_quirk_trap_init(void);
 
-#ifdef __KERNEL__
+extern void x86_quirk_pre_time_init(void);
+extern void x86_quirk_time_init(void);
+
+#endif /* __ASSEMBLY__ */
 
 #ifdef __i386__
 
@@ -78,6 +63,30 @@ extern unsigned long saved_video_mode;
 #ifndef __ASSEMBLY__
 #include <asm/bootparam.h>
 
+/* Interrupt control for vSMPowered x86_64 systems */
+#ifdef CONFIG_X86_VSMP
+void vsmp_init(void);
+#else
+static inline void vsmp_init(void) { }
+#endif
+
+void setup_bios_corruption_check(void);
+
+#ifdef CONFIG_X86_VISWS
+extern void visws_early_detect(void);
+extern int is_visws_box(void);
+#else
+static inline void visws_early_detect(void) { }
+static inline int is_visws_box(void) { return 0; }
+#endif
+
+extern struct x86_quirks *x86_quirks;
+extern unsigned long saved_video_mode;
+
+#ifndef CONFIG_PARAVIRT
+#define paravirt_post_allocator_init()  do {} while (0)
+#endif
+
 #ifndef _SETUP
 
 /*
@@ -100,7 +109,6 @@ extern unsigned long init_pg_tables_start;
 extern unsigned long init_pg_tables_end;
 
 #else
-void __init x86_64_init_pda(void);
 void __init x86_64_start_kernel(char *real_mode);
 void __init x86_64_start_reservations(char *real_mode_data);
 
diff --git a/arch/x86/include/asm/mach-default/setup_arch.h b/arch/x86/include/asm/setup_arch.h
index 38846208b548..38846208b548 100644
--- a/arch/x86/include/asm/mach-default/setup_arch.h
+++ b/arch/x86/include/asm/setup_arch.h
diff --git a/arch/x86/include/asm/smp.h b/arch/x86/include/asm/smp.h
index 19953df61c52..47d0e21f2b9e 100644
--- a/arch/x86/include/asm/smp.h
+++ b/arch/x86/include/asm/smp.h
@@ -15,34 +15,8 @@
 #  include <asm/io_apic.h>
 # endif
 #endif
-#include <asm/pda.h>
 #include <asm/thread_info.h>
-
-#ifdef CONFIG_X86_64
-
-extern cpumask_var_t cpu_callin_mask;
-extern cpumask_var_t cpu_callout_mask;
-extern cpumask_var_t cpu_initialized_mask;
-extern cpumask_var_t cpu_sibling_setup_mask;
-
-#else /* CONFIG_X86_32 */
-
-extern cpumask_t cpu_callin_map;
-extern cpumask_t cpu_callout_map;
-extern cpumask_t cpu_initialized;
-extern cpumask_t cpu_sibling_setup_map;
-
-#define cpu_callin_mask         ((struct cpumask *)&cpu_callin_map)
-#define cpu_callout_mask        ((struct cpumask *)&cpu_callout_map)
-#define cpu_initialized_mask    ((struct cpumask *)&cpu_initialized)
-#define cpu_sibling_setup_mask  ((struct cpumask *)&cpu_sibling_setup_map)
-
-#endif /* CONFIG_X86_32 */
-
-extern void (*mtrr_hook)(void);
-extern void zap_low_mappings(void);
-
-extern int __cpuinit get_local_pda(int cpu);
+#include <asm/cpumask.h>
 
 extern int smp_num_siblings;
 extern unsigned int num_processors;
@@ -50,9 +24,7 @@ extern unsigned int num_processors;
 DECLARE_PER_CPU(cpumask_t, cpu_sibling_map);
 DECLARE_PER_CPU(cpumask_t, cpu_core_map);
 DECLARE_PER_CPU(u16, cpu_llc_id);
-#ifdef CONFIG_X86_32
 DECLARE_PER_CPU(int, cpu_number);
-#endif
 
 static inline struct cpumask *cpu_sibling_mask(int cpu)
 {
@@ -167,8 +139,6 @@ void play_dead_common(void);
 void native_send_call_func_ipi(const struct cpumask *mask);
 void native_send_call_func_single_ipi(int cpu);
 
-extern void prefill_possible_map(void);
-
 void smp_store_cpu_info(int id);
 #define cpu_physical_id(cpu)    per_cpu(x86_cpu_to_apicid, cpu)
 
@@ -177,10 +147,6 @@ static inline int num_booting_cpus(void)
 {
         return cpumask_weight(cpu_callout_mask);
 }
-#else
-static inline void prefill_possible_map(void)
-{
-}
 #endif /* CONFIG_SMP */
 
 extern unsigned disabled_cpus __cpuinitdata;
@@ -191,11 +157,11 @@ extern unsigned disabled_cpus __cpuinitdata;
  * from the initial startup. We map APIC_BASE very early in page_setup(),
  * so this is correct in the x86 case.
  */
-#define raw_smp_processor_id() (x86_read_percpu(cpu_number))
+#define raw_smp_processor_id() (percpu_read(cpu_number))
 extern int safe_smp_processor_id(void);
 
 #elif defined(CONFIG_X86_64_SMP)
-#define raw_smp_processor_id()  read_pda(cpunumber)
+#define raw_smp_processor_id() (percpu_read(cpu_number))
 
 #define stack_smp_processor_id()                                        \
 ({                                                              \
@@ -205,10 +171,6 @@ extern int safe_smp_processor_id(void);
 })
 #define safe_smp_processor_id()         smp_processor_id()
 
-#else /* !CONFIG_X86_32_SMP && !CONFIG_X86_64_SMP */
-#define cpu_physical_id(cpu)            boot_cpu_physical_apicid
-#define safe_smp_processor_id()         0
-#define stack_smp_processor_id()        0
 #endif
 
 #ifdef CONFIG_X86_LOCAL_APIC
@@ -220,28 +182,9 @@ static inline int logical_smp_processor_id(void)
         return GET_APIC_LOGICAL_ID(*(u32 *)(APIC_BASE + APIC_LDR));
 }
 
-#include <mach_apicdef.h>
-static inline unsigned int read_apic_id(void)
-{
-        unsigned int reg;
-
-        reg = *(u32 *)(APIC_BASE + APIC_ID);
-
-        return GET_APIC_ID(reg);
-}
 #endif
 
-
-# if defined(APIC_DEFINITION) || defined(CONFIG_X86_64)
 extern int hard_smp_processor_id(void);
-# else
-#include <mach_apicdef.h>
-static inline int hard_smp_processor_id(void)
-{
-        /* we don't want to mark this access volatile - bad code generation */
-        return read_apic_id();
-}
-# endif /* APIC_DEFINITION */
 
 #else /* CONFIG_X86_LOCAL_APIC */
 
@@ -251,11 +194,5 @@ static inline int hard_smp_processor_id(void)
 
 #endif /* CONFIG_X86_LOCAL_APIC */
 
-#ifdef CONFIG_X86_HAS_BOOT_CPU_ID
-extern unsigned char boot_cpu_id;
-#else
-#define boot_cpu_id     0
-#endif
-
 #endif /* __ASSEMBLY__ */
 #endif /* _ASM_X86_SMP_H */
diff --git a/arch/x86/include/asm/mach-default/smpboot_hooks.h b/arch/x86/include/asm/smpboot_hooks.h
index 23bf52103b89..1def60114906 100644
--- a/arch/x86/include/asm/mach-default/smpboot_hooks.h
+++ b/arch/x86/include/asm/smpboot_hooks.h
@@ -13,10 +13,10 @@ static inline void smpboot_setup_warm_reset_vector(unsigned long start_eip)
         CMOS_WRITE(0xa, 0xf);
         local_flush_tlb();
         pr_debug("1.\n");
-        *((volatile unsigned short *)phys_to_virt(TRAMPOLINE_PHYS_HIGH)) =
+        *((volatile unsigned short *)phys_to_virt(apic->trampoline_phys_high)) =
                                                                  start_eip >> 4;
         pr_debug("2.\n");
-        *((volatile unsigned short *)phys_to_virt(TRAMPOLINE_PHYS_LOW)) =
+        *((volatile unsigned short *)phys_to_virt(apic->trampoline_phys_low)) =
                                                          start_eip & 0xf;
         pr_debug("3.\n");
 }
@@ -34,7 +34,7 @@ static inline void smpboot_restore_warm_reset_vector(void)
          */
         CMOS_WRITE(0, 0xf);
 
-        *((volatile long *)phys_to_virt(TRAMPOLINE_PHYS_LOW)) = 0;
+        *((volatile long *)phys_to_virt(apic->trampoline_phys_low)) = 0;
 }
 
 static inline void __init smpboot_setup_io_apic(void)
diff --git a/arch/x86/include/asm/socket.h b/arch/x86/include/asm/socket.h
index 8ab9cc8b2ecc..ca8bf2cd0ba9 100644
--- a/arch/x86/include/asm/socket.h
+++ b/arch/x86/include/asm/socket.h
@@ -54,4 +54,7 @@
 
 #define SO_MARK                 36
 
+#define SO_TIMESTAMPING         37
+#define SCM_TIMESTAMPING        SO_TIMESTAMPING
+
 #endif /* _ASM_X86_SOCKET_H */
diff --git a/arch/x86/include/asm/spinlock.h b/arch/x86/include/asm/spinlock.h
index 8247e94ac6b1..3a5696656680 100644
--- a/arch/x86/include/asm/spinlock.h
+++ b/arch/x86/include/asm/spinlock.h
@@ -172,70 +172,8 @@ static inline int __ticket_spin_is_contended(raw_spinlock_t *lock)
         return (((tmp >> TICKET_SHIFT) - tmp) & ((1 << TICKET_SHIFT) - 1)) > 1;
 }
 
-#ifdef CONFIG_PARAVIRT
-/*
- * Define virtualization-friendly old-style lock byte lock, for use in
- * pv_lock_ops if desired.
- *
- * This differs from the pre-2.6.24 spinlock by always using xchgb
- * rather than decb to take the lock; this allows it to use a
- * zero-initialized lock structure.  It also maintains a 1-byte
- * contention counter, so that we can implement
- * __byte_spin_is_contended.
- */
-struct __byte_spinlock {
-        s8 lock;
-        s8 spinners;
-};
-
-static inline int __byte_spin_is_locked(raw_spinlock_t *lock)
-{
-        struct __byte_spinlock *bl = (struct __byte_spinlock *)lock;
-        return bl->lock != 0;
-}
-
-static inline int __byte_spin_is_contended(raw_spinlock_t *lock)
-{
-        struct __byte_spinlock *bl = (struct __byte_spinlock *)lock;
-        return bl->spinners != 0;
-}
-
-static inline void __byte_spin_lock(raw_spinlock_t *lock)
-{
-        struct __byte_spinlock *bl = (struct __byte_spinlock *)lock;
-        s8 val = 1;
-
-        asm("1: xchgb %1, %0\n"
-            "   test %1,%1\n"
-            "   jz 3f\n"
-            "   " LOCK_PREFIX "incb %2\n"
-            "2: rep;nop\n"
-            "   cmpb $1, %0\n"
-            "   je 2b\n"
-            "   " LOCK_PREFIX "decb %2\n"
-            "   jmp 1b\n"
-            "3:"
-            : "+m" (bl->lock), "+q" (val), "+m" (bl->spinners): : "memory");
-}
-
-static inline int __byte_spin_trylock(raw_spinlock_t *lock)
-{
-        struct __byte_spinlock *bl = (struct __byte_spinlock *)lock;
-        u8 old = 1;
-
-        asm("xchgb %1,%0"
-            : "+m" (bl->lock), "+q" (old) : : "memory");
+#ifndef CONFIG_PARAVIRT
 
-        return old == 0;
-}
-
-static inline void __byte_spin_unlock(raw_spinlock_t *lock)
-{
-        struct __byte_spinlock *bl = (struct __byte_spinlock *)lock;
-        smp_wmb();
-        bl->lock = 0;
-}
-#else  /* !CONFIG_PARAVIRT */
 static inline int __raw_spin_is_locked(raw_spinlock_t *lock)
 {
         return __ticket_spin_is_locked(lock);
@@ -268,7 +206,7 @@ static __always_inline void __raw_spin_lock_flags(raw_spinlock_t *lock,
         __raw_spin_lock(lock);
 }
 
-#endif  /* CONFIG_PARAVIRT */
+#endif
 
 static inline void __raw_spin_unlock_wait(raw_spinlock_t *lock)
 {
@@ -330,8 +268,7 @@ static inline int __raw_read_trylock(raw_rwlock_t *lock)
 {
         atomic_t *count = (atomic_t *)lock;
 
-        atomic_dec(count);
-        if (atomic_read(count) >= 0)
+        if (atomic_dec_return(count) >= 0)
                 return 1;
         atomic_inc(count);
         return 0;
diff --git a/arch/x86/include/asm/stackprotector.h b/arch/x86/include/asm/stackprotector.h
new file mode 100644
index 000000000000..c2d742c6e15f
--- /dev/null
+++ b/arch/x86/include/asm/stackprotector.h
@@ -0,0 +1,124 @@
+/*
+ * GCC stack protector support.
+ *
+ * Stack protector works by putting predefined pattern at the start of
+ * the stack frame and verifying that it hasn't been overwritten when
+ * returning from the function.  The pattern is called stack canary
+ * and unfortunately gcc requires it to be at a fixed offset from %gs.
+ * On x86_64, the offset is 40 bytes and on x86_32 20 bytes.  x86_64
+ * and x86_32 use segment registers differently and thus handles this
+ * requirement differently.
+ *
+ * On x86_64, %gs is shared by percpu area and stack canary.  All
+ * percpu symbols are zero based and %gs points to the base of percpu
+ * area.  The first occupant of the percpu area is always
+ * irq_stack_union which contains stack_canary at offset 40.  Userland
+ * %gs is always saved and restored on kernel entry and exit using
+ * swapgs, so stack protector doesn't add any complexity there.
+ *
+ * On x86_32, it's slightly more complicated.  As in x86_64, %gs is
+ * used for userland TLS.  Unfortunately, some processors are much
+ * slower at loading segment registers with different value when
+ * entering and leaving the kernel, so the kernel uses %fs for percpu
+ * area and manages %gs lazily so that %gs is switched only when
+ * necessary, usually during task switch.
+ *
+ * As gcc requires the stack canary at %gs:20, %gs can't be managed
+ * lazily if stack protector is enabled, so the kernel saves and
+ * restores userland %gs on kernel entry and exit.  This behavior is
+ * controlled by CONFIG_X86_32_LAZY_GS and accessors are defined in
+ * system.h to hide the details.
+ */
+
+#ifndef _ASM_STACKPROTECTOR_H
+#define _ASM_STACKPROTECTOR_H 1
+
+#ifdef CONFIG_CC_STACKPROTECTOR
+
+#include <asm/tsc.h>
+#include <asm/processor.h>
+#include <asm/percpu.h>
+#include <asm/system.h>
+#include <asm/desc.h>
+#include <linux/random.h>
+
+/*
+ * 24 byte read-only segment initializer for stack canary.  Linker
+ * can't handle the address bit shifting.  Address will be set in
+ * head_32 for boot CPU and setup_per_cpu_areas() for others.
+ */
+#define GDT_STACK_CANARY_INIT                                           \
+        [GDT_ENTRY_STACK_CANARY] = { { { 0x00000018, 0x00409000 } } },
+
+/*
+ * Initialize the stackprotector canary value.
+ *
+ * NOTE: this must only be called from functions that never return,
+ * and it must always be inlined.
+ */
+static __always_inline void boot_init_stack_canary(void)
+{
+        u64 canary;
+        u64 tsc;
+
+#ifdef CONFIG_X86_64
+        BUILD_BUG_ON(offsetof(union irq_stack_union, stack_canary) != 40);
+#endif
+        /*
+         * We both use the random pool and the current TSC as a source
+         * of randomness. The TSC only matters for very early init,
+         * there it already has some randomness on most systems. Later
+         * on during the bootup the random pool has true entropy too.
+         */
+        get_random_bytes(&canary, sizeof(canary));
+        tsc = __native_read_tsc();
+        canary += tsc + (tsc << 32UL);
+
+        current->stack_canary = canary;
+#ifdef CONFIG_X86_64
+        percpu_write(irq_stack_union.stack_canary, canary);
+#else
+        percpu_write(stack_canary, canary);
+#endif
+}
+
+static inline void setup_stack_canary_segment(int cpu)
+{
+#ifdef CONFIG_X86_32
+        unsigned long canary = (unsigned long)&per_cpu(stack_canary, cpu) - 20;
+        struct desc_struct *gdt_table = get_cpu_gdt_table(cpu);
+        struct desc_struct desc;
+
+        desc = gdt_table[GDT_ENTRY_STACK_CANARY];
+        desc.base0 = canary & 0xffff;
+        desc.base1 = (canary >> 16) & 0xff;
+        desc.base2 = (canary >> 24) & 0xff;
+        write_gdt_entry(gdt_table, GDT_ENTRY_STACK_CANARY, &desc, DESCTYPE_S);
+#endif
+}
+
+static inline void load_stack_canary_segment(void)
+{
+#ifdef CONFIG_X86_32
+        asm("mov %0, %%gs" : : "r" (__KERNEL_STACK_CANARY) : "memory");
+#endif
+}
+
+#else   /* CC_STACKPROTECTOR */
+
+#define GDT_STACK_CANARY_INIT
+
+/* dummy boot_init_stack_canary() is defined in linux/stackprotector.h */
+
+static inline void setup_stack_canary_segment(int cpu)
+{ }
+
+static inline void load_stack_canary_segment(void)
+{
+#ifdef CONFIG_X86_32
+        asm volatile ("mov %0, %%gs" : : "r" (0));
+#endif
+}
+
+#endif  /* CC_STACKPROTECTOR */
+#endif  /* _ASM_STACKPROTECTOR_H */
diff --git a/arch/x86/include/asm/summit/apic.h b/arch/x86/include/asm/summit/apic.h
deleted file mode 100644
index 93d2c8667cfe..000000000000
--- a/arch/x86/include/asm/summit/apic.h
+++ /dev/null
@@ -1,202 +0,0 @@
-#ifndef __ASM_SUMMIT_APIC_H
-#define __ASM_SUMMIT_APIC_H
-
-#include <asm/smp.h>
-#include <linux/gfp.h>
-
-#define esr_disable (1)
-#define NO_BALANCE_IRQ (0)
-
-/* In clustered mode, the high nibble of APIC ID is a cluster number.
- * The low nibble is a 4-bit bitmap. */
-#define XAPIC_DEST_CPUS_SHIFT   4
-#define XAPIC_DEST_CPUS_MASK    ((1u << XAPIC_DEST_CPUS_SHIFT) - 1)
-#define XAPIC_DEST_CLUSTER_MASK (XAPIC_DEST_CPUS_MASK << XAPIC_DEST_CPUS_SHIFT)
-
-#define APIC_DFR_VALUE  (APIC_DFR_CLUSTER)
-
-static inline const cpumask_t *target_cpus(void)
-{
-        /* CPU_MASK_ALL (0xff) has undefined behaviour with
-         * dest_LowestPrio mode logical clustered apic interrupt routing
-         * Just start on cpu 0.  IRQ balancing will spread load
-         */
-        return &cpumask_of_cpu(0);
-}
-
-#define INT_DELIVERY_MODE (dest_LowestPrio)
-#define INT_DEST_MODE 1     /* logical delivery broadcast to all procs */
-
-static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid)
-{
-        return 0;
-}
-
-/* we don't use the phys_cpu_present_map to indicate apicid presence */
-static inline unsigned long check_apicid_present(int bit)
-{
-        return 1;
-}
-
-#define apicid_cluster(apicid) ((apicid) & XAPIC_DEST_CLUSTER_MASK)
-
-extern u8 cpu_2_logical_apicid[];
-
-static inline void init_apic_ldr(void)
-{
-        unsigned long val, id;
-        int count = 0;
-        u8 my_id = (u8)hard_smp_processor_id();
-        u8 my_cluster = (u8)apicid_cluster(my_id);
-#ifdef CONFIG_SMP
-        u8 lid;
-        int i;
-
-        /* Create logical APIC IDs by counting CPUs already in cluster. */
-        for (count = 0, i = nr_cpu_ids; --i >= 0; ) {
-                lid = cpu_2_logical_apicid[i];
-                if (lid != BAD_APICID && apicid_cluster(lid) == my_cluster)
-                        ++count;
-        }
-#endif
-        /* We only have a 4 wide bitmap in cluster mode.  If a deranged
-         * BIOS puts 5 CPUs in one APIC cluster, we're hosed. */
-        BUG_ON(count >= XAPIC_DEST_CPUS_SHIFT);
-        id = my_cluster | (1UL << count);
-        apic_write(APIC_DFR, APIC_DFR_VALUE);
-        val = apic_read(APIC_LDR) & ~APIC_LDR_MASK;
-        val |= SET_APIC_LOGICAL_ID(id);
-        apic_write(APIC_LDR, val);
-}
-
-static inline int multi_timer_check(int apic, int irq)
-{
-        return 0;
-}
-
-static inline int apic_id_registered(void)
-{
-        return 1;
-}
-
-static inline void setup_apic_routing(void)
-{
-        printk("Enabling APIC mode:  Summit.  Using %d I/O APICs\n",
-                                                nr_ioapics);
-}
-
-static inline int apicid_to_node(int logical_apicid)
-{
-#ifdef CONFIG_SMP
-        return apicid_2_node[hard_smp_processor_id()];
-#else
-        return 0;
-#endif
-}
-
-/* Mapping from cpu number to logical apicid */
-static inline int cpu_to_logical_apicid(int cpu)
-{
-#ifdef CONFIG_SMP
-        if (cpu >= nr_cpu_ids)
-                return BAD_APICID;
-        return (int)cpu_2_logical_apicid[cpu];
-#else
-        return logical_smp_processor_id();
-#endif
-}
-
-static inline int cpu_present_to_apicid(int mps_cpu)
-{
-        if (mps_cpu < nr_cpu_ids)
-                return (int)per_cpu(x86_bios_cpu_apicid, mps_cpu);
-        else
-                return BAD_APICID;
-}
-
-static inline physid_mask_t ioapic_phys_id_map(physid_mask_t phys_id_map)
-{
-        /* For clustered we don't have a good way to do this yet - hack */
-        return physids_promote(0x0F);
-}
-
-static inline physid_mask_t apicid_to_cpu_present(int apicid)
-{
-        return physid_mask_of_physid(0);
-}
-
-static inline void setup_portio_remap(void)
-{
-}
-
-static inline int check_phys_apicid_present(int boot_cpu_physical_apicid)
-{
-        return 1;
-}
-
-static inline void enable_apic_mode(void)
-{
-}
-
-static inline unsigned int cpu_mask_to_apicid(const cpumask_t *cpumask)
-{
-        int num_bits_set;
-        int cpus_found = 0;
-        int cpu;
-        int apicid;
-
-        num_bits_set = cpus_weight(*cpumask);
-        /* Return id to all */
-        if (num_bits_set >= nr_cpu_ids)
-                return (int) 0xFF;
-        /*
-         * The cpus in the mask must all be on the apic cluster.  If are not
-         * on the same apicid cluster return default value of TARGET_CPUS.
-         */
-        cpu = first_cpu(*cpumask);
-        apicid = cpu_to_logical_apicid(cpu);
-        while (cpus_found < num_bits_set) {
-                if (cpu_isset(cpu, *cpumask)) {
-                        int new_apicid = cpu_to_logical_apicid(cpu);
-                        if (apicid_cluster(apicid) !=
-                                        apicid_cluster(new_apicid)){
-                                printk ("%s: Not a valid mask!\n", __func__);
-                                return 0xFF;
-                        }
-                        apicid = apicid | new_apicid;
-                        cpus_found++;
-                }
-                cpu++;
-        }
-        return apicid;
-}
-
-static inline unsigned int cpu_mask_to_apicid_and(const struct cpumask *inmask,
-                                                  const struct cpumask *andmask)
-{
-        int apicid = cpu_to_logical_apicid(0);
-        cpumask_var_t cpumask;
-
-        if (!alloc_cpumask_var(&cpumask, GFP_ATOMIC))
-                return apicid;
-
-        cpumask_and(cpumask, inmask, andmask);
-        cpumask_and(cpumask, cpumask, cpu_online_mask);
-        apicid = cpu_mask_to_apicid(cpumask);
-
-        free_cpumask_var(cpumask);
-        return apicid;
-}
-
-/* cpuid returns the value latched in the HW at reset, not the APIC ID
- * register's value.  For any box whose BIOS changes APIC IDs, like
- * clustered APIC systems, we must use hard_smp_processor_id.
- *
- * See Intel's IA-32 SW Dev's Manual Vol2 under CPUID.
- */
-static inline u32 phys_pkg_id(u32 cpuid_apic, int index_msb)
-{
-        return hard_smp_processor_id() >> index_msb;
-}
-
-#endif /* __ASM_SUMMIT_APIC_H */
diff --git a/arch/x86/include/asm/summit/apicdef.h b/arch/x86/include/asm/summit/apicdef.h
deleted file mode 100644
index f3fbca1f61c1..000000000000
--- a/arch/x86/include/asm/summit/apicdef.h
+++ /dev/null
@@ -1,13 +0,0 @@
-#ifndef __ASM_SUMMIT_APICDEF_H
-#define __ASM_SUMMIT_APICDEF_H
-
-#define         APIC_ID_MASK            (0xFF<<24)
-
-static inline unsigned get_apic_id(unsigned long x)
-{
-        return (x>>24)&0xFF;
-}
-
-#define         GET_APIC_ID(x)  get_apic_id(x)
-
-#endif
diff --git a/arch/x86/include/asm/summit/ipi.h b/arch/x86/include/asm/summit/ipi.h
deleted file mode 100644
index a8a2c24f50cc..000000000000
--- a/arch/x86/include/asm/summit/ipi.h
+++ /dev/null
@@ -1,26 +0,0 @@
-#ifndef __ASM_SUMMIT_IPI_H
-#define __ASM_SUMMIT_IPI_H
-
-void send_IPI_mask_sequence(const cpumask_t *mask, int vector);
-void send_IPI_mask_allbutself(const cpumask_t *mask, int vector);
-
-static inline void send_IPI_mask(const cpumask_t *mask, int vector)
-{
-        send_IPI_mask_sequence(mask, vector);
-}
-
-static inline void send_IPI_allbutself(int vector)
-{
-        cpumask_t mask = cpu_online_map;
-        cpu_clear(smp_processor_id(), mask);
-
-        if (!cpus_empty(mask))
-                send_IPI_mask(&mask, vector);
-}
-
-static inline void send_IPI_all(int vector)
-{
-        send_IPI_mask(&cpu_online_map, vector);
-}
-
-#endif /* __ASM_SUMMIT_IPI_H */
diff --git a/arch/x86/include/asm/summit/mpparse.h b/arch/x86/include/asm/summit/mpparse.h
deleted file mode 100644
index 380e86c02363..000000000000
--- a/arch/x86/include/asm/summit/mpparse.h
+++ /dev/null
@@ -1,109 +0,0 @@
-#ifndef __ASM_SUMMIT_MPPARSE_H
-#define __ASM_SUMMIT_MPPARSE_H
-
-#include <asm/tsc.h>
-
-extern int use_cyclone;
-
-#ifdef CONFIG_X86_SUMMIT_NUMA
-extern void setup_summit(void);
-#else
-#define setup_summit()  {}
-#endif
-
-static inline int mps_oem_check(struct mpc_table *mpc, char *oem,
-                char *productid)
-{
-        if (!strncmp(oem, "IBM ENSW", 8) &&
-                        (!strncmp(productid, "VIGIL SMP", 9)
-                         || !strncmp(productid, "EXA", 3)
-                         || !strncmp(productid, "RUTHLESS SMP", 12))){
-                mark_tsc_unstable("Summit based system");
-                use_cyclone = 1; /*enable cyclone-timer*/
-                setup_summit();
-                return 1;
-        }
-        return 0;
-}
-
-/* Hook from generic ACPI tables.c */
-static inline int acpi_madt_oem_check(char *oem_id, char *oem_table_id)
-{
-        if (!strncmp(oem_id, "IBM", 3) &&
-            (!strncmp(oem_table_id, "SERVIGIL", 8)
-             || !strncmp(oem_table_id, "EXA", 3))){
-                mark_tsc_unstable("Summit based system");
-                use_cyclone = 1; /*enable cyclone-timer*/
-                setup_summit();
-                return 1;
-        }
-        return 0;
-}
-
-struct rio_table_hdr {
-        unsigned char version;      /* Version number of this data structure           */
-                                    /* Version 3 adds chassis_num & WP_index           */
-        unsigned char num_scal_dev; /* # of Scalability devices (Twisters for Vigil)   */
-        unsigned char num_rio_dev;  /* # of RIO I/O devices (Cyclones and Winnipegs)   */
-} __attribute__((packed));
-
-struct scal_detail {
-        unsigned char node_id;      /* Scalability Node ID                             */
-        unsigned long CBAR;         /* Address of 1MB register space                   */
-        unsigned char port0node;    /* Node ID port connected to: 0xFF=None            */
-        unsigned char port0port;    /* Port num port connected to: 0,1,2, or 0xFF=None */
-        unsigned char port1node;    /* Node ID port connected to: 0xFF = None          */
-        unsigned char port1port;    /* Port num port connected to: 0,1,2, or 0xFF=None */
-        unsigned char port2node;    /* Node ID port connected to: 0xFF = None          */
-        unsigned char port2port;    /* Port num port connected to: 0,1,2, or 0xFF=None */
-        unsigned char chassis_num;  /* 1 based Chassis number (1 = boot node)          */
-} __attribute__((packed));
-
-struct rio_detail {
-        unsigned char node_id;      /* RIO Node ID                                     */
-        unsigned long BBAR;         /* Address of 1MB register space                   */
-        unsigned char type;         /* Type of device                                  */
-        unsigned char owner_id;     /* For WPEG: Node ID of Cyclone that owns this WPEG*/
-                                    /* For CYC:  Node ID of Twister that owns this CYC */
-        unsigned char port0node;    /* Node ID port connected to: 0xFF=None            */
-        unsigned char port0port;    /* Port num port connected to: 0,1,2, or 0xFF=None */
-        unsigned char port1node;    /* Node ID port connected to: 0xFF=None            */
-        unsigned char port1port;    /* Port num port connected to: 0,1,2, or 0xFF=None */
-        unsigned char first_slot;   /* For WPEG: Lowest slot number below this WPEG    */
-                                    /* For CYC:  0                                     */
-        unsigned char status;       /* For WPEG: Bit 0 = 1 : the XAPIC is used         */
-                                    /*                 = 0 : the XAPIC is not used, ie:*/
-                                    /*                     ints fwded to another XAPIC */
-                                    /*           Bits1:7 Reserved                      */
-                                    /* For CYC:  Bits0:7 Reserved                      */
-        unsigned char WP_index;     /* For WPEG: WPEG instance index - lower ones have */
-                                    /*           lower slot numbers/PCI bus numbers    */
-                                    /* For CYC:  No meaning                            */
-        unsigned char chassis_num;  /* 1 based Chassis number                          */
-                                    /* For LookOut WPEGs this field indicates the      */
-                                    /* Expansion Chassis #, enumerated from Boot       */
-                                    /* Node WPEG external port, then Boot Node CYC     */
-                                    /* external port, then Next Vigil chassis WPEG     */
-                                    /* external port, etc.                             */
-                                    /* Shared Lookouts have only 1 chassis number (the */
-                                    /* first one assigned)                             */
-} __attribute__((packed));
-
-
-typedef enum {
-        CompatTwister = 0,  /* Compatibility Twister               */
-        AltTwister    = 1,  /* Alternate Twister of internal 8-way */
-        CompatCyclone = 2,  /* Compatibility Cyclone               */
-        AltCyclone    = 3,  /* Alternate Cyclone of internal 8-way */
-        CompatWPEG    = 4,  /* Compatibility WPEG                  */
-        AltWPEG       = 5,  /* Second Planar WPEG                  */
-        LookOutAWPEG  = 6,  /* LookOut WPEG                        */
-        LookOutBWPEG  = 7,  /* LookOut WPEG                        */
-} node_type;
-
-static inline int is_WPEG(struct rio_detail *rio){
-        return (rio->type == CompatWPEG || rio->type == AltWPEG ||
-                rio->type == LookOutAWPEG || rio->type == LookOutBWPEG);
-}
-
-#endif /* __ASM_SUMMIT_MPPARSE_H */
diff --git a/arch/x86/include/asm/svm.h b/arch/x86/include/asm/svm.h
index 1b8afa78e869..82ada75f3ebf 100644
--- a/arch/x86/include/asm/svm.h
+++ b/arch/x86/include/asm/svm.h
@@ -174,10 +174,6 @@ struct __attribute__ ((__packed__)) vmcb {
 #define SVM_CPUID_FEATURE_SHIFT 2
 #define SVM_CPUID_FUNC 0x8000000a
 
-#define MSR_EFER_SVME_MASK (1ULL << 12)
-#define MSR_VM_CR       0xc0010114
-#define MSR_VM_HSAVE_PA 0xc0010117ULL
-
 #define SVM_VM_CR_SVM_DISABLE 4
 
 #define SVM_SELECTOR_S_SHIFT 4
diff --git a/arch/x86/include/asm/sys_ia32.h b/arch/x86/include/asm/sys_ia32.h
index ffb08be2a530..72a6dcd1299b 100644
--- a/arch/x86/include/asm/sys_ia32.h
+++ b/arch/x86/include/asm/sys_ia32.h
@@ -70,8 +70,6 @@ struct old_utsname;
 asmlinkage long sys32_olduname(struct oldold_utsname __user *);
 long sys32_uname(struct old_utsname __user *);
 
-long sys32_ustat(unsigned, struct ustat32 __user *);
-
 asmlinkage long sys32_execve(char __user *, compat_uptr_t __user *,
                              compat_uptr_t __user *, struct pt_regs *);
 asmlinkage long sys32_clone(unsigned int, unsigned int, struct pt_regs *);
diff --git a/arch/x86/include/asm/syscalls.h b/arch/x86/include/asm/syscalls.h
index c0b0bda754ee..7043408f6904 100644
--- a/arch/x86/include/asm/syscalls.h
+++ b/arch/x86/include/asm/syscalls.h
@@ -29,21 +29,21 @@ asmlinkage int sys_get_thread_area(struct user_desc __user *);
 /* X86_32 only */
 #ifdef CONFIG_X86_32
 /* kernel/process_32.c */
-asmlinkage int sys_fork(struct pt_regs);
-asmlinkage int sys_clone(struct pt_regs);
-asmlinkage int sys_vfork(struct pt_regs);
-asmlinkage int sys_execve(struct pt_regs);
+int sys_fork(struct pt_regs *);
+int sys_clone(struct pt_regs *);
+int sys_vfork(struct pt_regs *);
+int sys_execve(struct pt_regs *);
 
 /* kernel/signal_32.c */
 asmlinkage int sys_sigsuspend(int, int, old_sigset_t);
 asmlinkage int sys_sigaction(int, const struct old_sigaction __user *,
                              struct old_sigaction __user *);
-asmlinkage int sys_sigaltstack(unsigned long);
-asmlinkage unsigned long sys_sigreturn(unsigned long);
-asmlinkage int sys_rt_sigreturn(unsigned long);
+int sys_sigaltstack(struct pt_regs *);
+unsigned long sys_sigreturn(struct pt_regs *);
+long sys_rt_sigreturn(struct pt_regs *);
 
 /* kernel/ioport.c */
-asmlinkage long sys_iopl(unsigned long);
+long sys_iopl(struct pt_regs *);
 
 /* kernel/sys_i386_32.c */
 asmlinkage long sys_mmap2(unsigned long, unsigned long, unsigned long,
@@ -59,8 +59,8 @@ struct oldold_utsname;
 asmlinkage int sys_olduname(struct oldold_utsname __user *);
 
 /* kernel/vm86_32.c */
-asmlinkage int sys_vm86old(struct pt_regs);
-asmlinkage int sys_vm86(struct pt_regs);
+int sys_vm86old(struct pt_regs *);
+int sys_vm86(struct pt_regs *);
 
 #else /* CONFIG_X86_32 */
 
@@ -74,6 +74,7 @@ asmlinkage long sys_vfork(struct pt_regs *);
 asmlinkage long sys_execve(char __user *, char __user * __user *,
                            char __user * __user *,
                            struct pt_regs *);
+long sys_arch_prctl(int, unsigned long);
 
 /* kernel/ioport.c */
 asmlinkage long sys_iopl(unsigned int, struct pt_regs *);
@@ -81,7 +82,7 @@ asmlinkage long sys_iopl(unsigned int, struct pt_regs *);
 /* kernel/signal_64.c */
 asmlinkage long sys_sigaltstack(const stack_t __user *, stack_t __user *,
                                 struct pt_regs *);
-asmlinkage long sys_rt_sigreturn(struct pt_regs *);
+long sys_rt_sigreturn(struct pt_regs *);
 
 /* kernel/sys_x86_64.c */
 asmlinkage long sys_mmap(unsigned long, unsigned long, unsigned long,
diff --git a/arch/x86/include/asm/system.h b/arch/x86/include/asm/system.h
index 8e626ea33a1a..643c59b4bc6e 100644
--- a/arch/x86/include/asm/system.h
+++ b/arch/x86/include/asm/system.h
@@ -20,9 +20,26 @@
 struct task_struct; /* one of the stranger aspects of C forward declarations */
 struct task_struct *__switch_to(struct task_struct *prev,
                                 struct task_struct *next);
+struct tss_struct;
+void __switch_to_xtra(struct task_struct *prev_p, struct task_struct *next_p,
+                      struct tss_struct *tss);
 
 #ifdef CONFIG_X86_32
 
+#ifdef CONFIG_CC_STACKPROTECTOR
+#define __switch_canary                                                 \
+        "movl %P[task_canary](%[next]), %%ebx\n\t"                      \
+        "movl %%ebx, "__percpu_arg([stack_canary])"\n\t"
+#define __switch_canary_oparam                                          \
+        , [stack_canary] "=m" (per_cpu_var(stack_canary))
+#define __switch_canary_iparam                                          \
+        , [task_canary] "i" (offsetof(struct task_struct, stack_canary))
+#else   /* CC_STACKPROTECTOR */
+#define __switch_canary
+#define __switch_canary_oparam
+#define __switch_canary_iparam
+#endif  /* CC_STACKPROTECTOR */
+
 /*
  * Saving eflags is important. It switches not only IOPL between tasks,
  * it also protects other tasks from NT leaking through sysenter etc.
@@ -44,6 +61,7 @@ do {									\
                      "movl %[next_sp],%%esp\n\t"        /* restore ESP   */ \
                      "movl $1f,%[prev_ip]\n\t"  /* save    EIP   */     \
                      "pushl %[next_ip]\n\t"     /* restore EIP   */     \
+                     __switch_canary                                    \
                      "jmp __switch_to\n"        /* regparm call  */     \
                      "1:\t"                                             \
                      "popl %%ebp\n\t"           /* restore EBP   */     \
@@ -58,6 +76,8 @@ do {									\
                        "=b" (ebx), "=c" (ecx), "=d" (edx),              \
                        "=S" (esi), "=D" (edi)                           \
                                                                         \
+                       __switch_canary_oparam                           \
+                                                                        \
                        /* input parameters: */                          \
                      : [next_sp]  "m" (next->thread.sp),                \
                        [next_ip]  "m" (next->thread.ip),                \
@@ -66,6 +86,8 @@ do {									\
                        [prev]     "a" (prev),                           \
                        [next]     "d" (next)                            \
                                                                         \
+                       __switch_canary_iparam                           \
+                                                                        \
                      : /* reloaded segment registers */                 \
                         "memory");                                      \
 } while (0)
@@ -86,27 +108,44 @@ do {									\
         , "rcx", "rbx", "rdx", "r8", "r9", "r10", "r11", \
           "r12", "r13", "r14", "r15"
 
+#ifdef CONFIG_CC_STACKPROTECTOR
+#define __switch_canary                                                   \
+        "movq %P[task_canary](%%rsi),%%r8\n\t"                            \
+        "movq %%r8,"__percpu_arg([gs_canary])"\n\t"
+#define __switch_canary_oparam                                            \
+        , [gs_canary] "=m" (per_cpu_var(irq_stack_union.stack_canary))
+#define __switch_canary_iparam                                            \
+        , [task_canary] "i" (offsetof(struct task_struct, stack_canary))
+#else   /* CC_STACKPROTECTOR */
+#define __switch_canary
+#define __switch_canary_oparam
+#define __switch_canary_iparam
+#endif  /* CC_STACKPROTECTOR */
+
 /* Save restore flags to clear handle leaking NT */
 #define switch_to(prev, next, last) \
-        asm volatile(SAVE_CONTEXT                                                   \
+        asm volatile(SAVE_CONTEXT                                         \
              "movq %%rsp,%P[threadrsp](%[prev])\n\t" /* save RSP */       \
              "movq %P[threadrsp](%[next]),%%rsp\n\t" /* restore RSP */    \
              "call __switch_to\n\t"                                       \
              ".globl thread_return\n"                                     \
              "thread_return:\n\t"                                         \
-             "movq %%gs:%P[pda_pcurrent],%%rsi\n\t"                       \
+             "movq "__percpu_arg([current_task])",%%rsi\n\t"              \
+             __switch_canary                                              \
              "movq %P[thread_info](%%rsi),%%r8\n\t"                       \
-             LOCK_PREFIX "btr  %[tif_fork],%P[ti_flags](%%r8)\n\t"        \
              "movq %%rax,%%rdi\n\t"                                       \
-             "jc   ret_from_fork\n\t"                                     \
+             "testl  %[_tif_fork],%P[ti_flags](%%r8)\n\t"         \
+             "jnz   ret_from_fork\n\t"                                    \
              RESTORE_CONTEXT                                              \
              : "=a" (last)                                                \
+               __switch_canary_oparam                                     \
              : [next] "S" (next), [prev] "D" (prev),                      \
                [threadrsp] "i" (offsetof(struct task_struct, thread.sp)), \
                [ti_flags] "i" (offsetof(struct thread_info, flags)),      \
-               [tif_fork] "i" (TIF_FORK),                                 \
+               [_tif_fork] "i" (_TIF_FORK),                               \
                [thread_info] "i" (offsetof(struct task_struct, stack)),   \
-               [pda_pcurrent] "i" (offsetof(struct x8664_pda, pcurrent))  \
+               [current_task] "m" (per_cpu_var(current_task))             \
+               __switch_canary_iparam                                     \
              : "memory", "cc" __EXTRA_CLOBBER)
 #endif
 
@@ -165,6 +204,25 @@ extern void native_load_gs_index(unsigned);
 #define savesegment(seg, value)                         \
         asm("mov %%" #seg ",%0":"=r" (value) : : "memory")
 
+/*
+ * x86_32 user gs accessors.
+ */
+#ifdef CONFIG_X86_32
+#ifdef CONFIG_X86_32_LAZY_GS
+#define get_user_gs(regs)       (u16)({unsigned long v; savesegment(gs, v); v;})
+#define set_user_gs(regs, v)    loadsegment(gs, (unsigned long)(v))
+#define task_user_gs(tsk)       ((tsk)->thread.gs)
+#define lazy_save_gs(v)         savesegment(gs, (v))
+#define lazy_load_gs(v)         loadsegment(gs, (v))
+#else   /* X86_32_LAZY_GS */
+#define get_user_gs(regs)       (u16)((regs)->gs)
+#define set_user_gs(regs, v)    do { (regs)->gs = (v); } while (0)
+#define task_user_gs(tsk)       (task_pt_regs(tsk)->gs)
+#define lazy_save_gs(v)         do { } while (0)
+#define lazy_load_gs(v)         do { } while (0)
+#endif  /* X86_32_LAZY_GS */
+#endif  /* X86_32 */
+
 static inline unsigned long get_limit(unsigned long segment)
 {
         unsigned long __limit;
diff --git a/arch/x86/include/asm/thread_info.h b/arch/x86/include/asm/thread_info.h
index 98789647baa9..df9d5f78385e 100644
--- a/arch/x86/include/asm/thread_info.h
+++ b/arch/x86/include/asm/thread_info.h
@@ -40,6 +40,7 @@ struct thread_info {
                                                 */
         __u8                    supervisor_stack[0];
 #endif
+        int                     uaccess_err;
 };
 
 #define INIT_THREAD_INFO(tsk)                   \
@@ -194,25 +195,21 @@ static inline struct thread_info *current_thread_info(void)
 
 #else /* X86_32 */
 
-#include <asm/pda.h>
+#include <asm/percpu.h>
+#define KERNEL_STACK_OFFSET (5*8)
 
 /*
  * macros/functions for gaining access to the thread information structure
  * preempt_count needs to be 1 initially, until the scheduler is functional.
  */
 #ifndef __ASSEMBLY__
-static inline struct thread_info *current_thread_info(void)
-{
-        struct thread_info *ti;
-        ti = (void *)(read_pda(kernelstack) + PDA_STACKOFFSET - THREAD_SIZE);
-        return ti;
-}
+DECLARE_PER_CPU(unsigned long, kernel_stack);
 
-/* do not use in interrupt context */
-static inline struct thread_info *stack_thread_info(void)
+static inline struct thread_info *current_thread_info(void)
 {
         struct thread_info *ti;
-        asm("andq %%rsp,%0; " : "=r" (ti) : "0" (~(THREAD_SIZE - 1)));
+        ti = (void *)(percpu_read(kernel_stack) +
+                      KERNEL_STACK_OFFSET - THREAD_SIZE);
         return ti;
 }
 
@@ -220,8 +217,8 @@ static inline struct thread_info *stack_thread_info(void)
 
 /* how to get the thread information struct from ASM */
 #define GET_THREAD_INFO(reg) \
-        movq %gs:pda_kernelstack,reg ; \
-        subq $(THREAD_SIZE-PDA_STACKOFFSET),reg
+        movq PER_CPU_VAR(kernel_stack),reg ; \
+        subq $(THREAD_SIZE-KERNEL_STACK_OFFSET),reg
 
 #endif
 
diff --git a/arch/x86/include/asm/timer.h b/arch/x86/include/asm/timer.h
index 2bb6a835c453..a81195eaa2b3 100644
--- a/arch/x86/include/asm/timer.h
+++ b/arch/x86/include/asm/timer.h
@@ -3,6 +3,7 @@
 #include <linux/init.h>
 #include <linux/pm.h>
 #include <linux/percpu.h>
+#include <linux/interrupt.h>
 
 #define TICK_SIZE (tick_nsec / 1000)
 
@@ -12,6 +13,7 @@ unsigned long native_calibrate_tsc(void);
 #ifdef CONFIG_X86_32
 extern int timer_ack;
 extern int recalibrate_cpu_khz(void);
+extern irqreturn_t timer_interrupt(int irq, void *dev_id);
 #endif /* CONFIG_X86_32 */
 
 extern int no_timer_check;
diff --git a/arch/x86/include/asm/tlbflush.h b/arch/x86/include/asm/tlbflush.h
index 0e7bbb549116..d3539f998f88 100644
--- a/arch/x86/include/asm/tlbflush.h
+++ b/arch/x86/include/asm/tlbflush.h
@@ -113,7 +113,7 @@ static inline void flush_tlb_range(struct vm_area_struct *vma,
                 __flush_tlb();
 }
 
-static inline void native_flush_tlb_others(const cpumask_t *cpumask,
+static inline void native_flush_tlb_others(const struct cpumask *cpumask,
                                            struct mm_struct *mm,
                                            unsigned long va)
 {
@@ -142,31 +142,28 @@ static inline void flush_tlb_range(struct vm_area_struct *vma,
         flush_tlb_mm(vma->vm_mm);
 }
 
-void native_flush_tlb_others(const cpumask_t *cpumask, struct mm_struct *mm,
-                             unsigned long va);
+void native_flush_tlb_others(const struct cpumask *cpumask,
+                             struct mm_struct *mm, unsigned long va);
 
 #define TLBSTATE_OK     1
 #define TLBSTATE_LAZY   2
 
-#ifdef CONFIG_X86_32
 struct tlb_state {
         struct mm_struct *active_mm;
         int state;
-        char __cacheline_padding[L1_CACHE_BYTES-8];
 };
 DECLARE_PER_CPU(struct tlb_state, cpu_tlbstate);
 
-void reset_lazy_tlbstate(void);
-#else
 static inline void reset_lazy_tlbstate(void)
 {
+        percpu_write(cpu_tlbstate.state, 0);
+        percpu_write(cpu_tlbstate.active_mm, &init_mm);
 }
-#endif
 
 #endif  /* SMP */
 
 #ifndef CONFIG_PARAVIRT
-#define flush_tlb_others(mask, mm, va)  native_flush_tlb_others(&mask, mm, va)
+#define flush_tlb_others(mask, mm, va)  native_flush_tlb_others(mask, mm, va)
 #endif
 
 static inline void flush_tlb_kernel_range(unsigned long start,
@@ -175,4 +172,6 @@ static inline void flush_tlb_kernel_range(unsigned long start,
         flush_tlb_all();
 }
 
+extern void zap_low_mappings(void);
+
 #endif /* _ASM_X86_TLBFLUSH_H */
diff --git a/arch/x86/include/asm/topology.h b/arch/x86/include/asm/topology.h
index 4e2f2e0aab27..77cfb2cfb386 100644
--- a/arch/x86/include/asm/topology.h
+++ b/arch/x86/include/asm/topology.h
@@ -74,6 +74,8 @@ static inline const struct cpumask *cpumask_of_node(int node)
         return &node_to_cpumask_map[node];
 }
 
+static inline void setup_node_to_cpumask_map(void) { }
+
 #else /* CONFIG_X86_64 */
 
 /* Mappings between node number and cpus on that node. */
@@ -83,7 +85,8 @@ extern cpumask_t *node_to_cpumask_map;
 DECLARE_EARLY_PER_CPU(int, x86_cpu_to_node_map);
 
 /* Returns the number of the current Node. */
-#define numa_node_id()          read_pda(nodenumber)
+DECLARE_PER_CPU(int, node_number);
+#define numa_node_id()          percpu_read(node_number)
 
 #ifdef CONFIG_DEBUG_PER_CPU_MAPS
 extern int cpu_to_node(int cpu);
@@ -102,10 +105,7 @@ static inline int cpu_to_node(int cpu)
 /* Same function but used if called before per_cpu areas are setup */
 static inline int early_cpu_to_node(int cpu)
 {
-        if (early_per_cpu_ptr(x86_cpu_to_node_map))
-                return early_per_cpu_ptr(x86_cpu_to_node_map)[cpu];
-
-        return per_cpu(x86_cpu_to_node_map, cpu);
+        return early_per_cpu(x86_cpu_to_node_map, cpu);
 }
 
 /* Returns a pointer to the cpumask of CPUs on Node 'node'. */
@@ -122,6 +122,8 @@ static inline cpumask_t node_to_cpumask(int node)
 
 #endif /* !CONFIG_DEBUG_PER_CPU_MAPS */
 
+extern void setup_node_to_cpumask_map(void);
+
 /*
  * Replace default node_to_cpumask_ptr with optimized version
  * Deprecated: use "const struct cpumask *mask = cpumask_of_node(node)"
@@ -192,9 +194,20 @@ extern int __node_distance(int, int);
 
 #else /* !CONFIG_NUMA */
 
-#define numa_node_id()          0
-#define cpu_to_node(cpu)        0
-#define early_cpu_to_node(cpu)  0
+static inline int numa_node_id(void)
+{
+        return 0;
+}
+
+static inline int cpu_to_node(int cpu)
+{
+        return 0;
+}
+
+static inline int early_cpu_to_node(int cpu)
+{
+        return 0;
+}
 
 static inline const cpumask_t *cpumask_of_node(int node)
 {
@@ -209,6 +222,8 @@ static inline int node_to_first_cpu(int node)
         return first_cpu(cpu_online_map);
 }
 
+static inline void setup_node_to_cpumask_map(void) { }
+
 /*
  * Replace default node_to_cpumask_ptr with optimized version
  * Deprecated: use "const struct cpumask *mask = cpumask_of_node(node)"
diff --git a/arch/x86/include/asm/trampoline.h b/arch/x86/include/asm/trampoline.h
index 780ba0ab94f9..90f06c25221d 100644
--- a/arch/x86/include/asm/trampoline.h
+++ b/arch/x86/include/asm/trampoline.h
@@ -13,6 +13,7 @@ extern unsigned char *trampoline_base;
 
 extern unsigned long init_rsp;
 extern unsigned long initial_code;
+extern unsigned long initial_gs;
 
 #define TRAMPOLINE_SIZE roundup(trampoline_end - trampoline_data, PAGE_SIZE)
 #define TRAMPOLINE_BASE 0x6000
diff --git a/arch/x86/include/asm/traps.h b/arch/x86/include/asm/traps.h
index cf3bb053da0b..0d5342515b86 100644
--- a/arch/x86/include/asm/traps.h
+++ b/arch/x86/include/asm/traps.h
@@ -41,7 +41,7 @@ dotraplinkage void do_int3(struct pt_regs *, long);
 dotraplinkage void do_overflow(struct pt_regs *, long);
 dotraplinkage void do_bounds(struct pt_regs *, long);
 dotraplinkage void do_invalid_op(struct pt_regs *, long);
-dotraplinkage void do_device_not_available(struct pt_regs);
+dotraplinkage void do_device_not_available(struct pt_regs *, long);
 dotraplinkage void do_coprocessor_segment_overrun(struct pt_regs *, long);
 dotraplinkage void do_invalid_TSS(struct pt_regs *, long);
 dotraplinkage void do_segment_not_present(struct pt_regs *, long);
diff --git a/arch/x86/include/asm/uaccess.h b/arch/x86/include/asm/uaccess.h
index 4340055b7559..b685ece89d5c 100644
--- a/arch/x86/include/asm/uaccess.h
+++ b/arch/x86/include/asm/uaccess.h
@@ -121,7 +121,7 @@ extern int __get_user_bad(void);
 
 #define __get_user_x(size, ret, x, ptr)               \
         asm volatile("call __get_user_" #size         \
-                     : "=a" (ret),"=d" (x)            \
+                     : "=a" (ret), "=d" (x)           \
                      : "0" (ptr))                     \
 
 /* Careful: we have to cast the result to the type of the pointer
@@ -181,12 +181,12 @@ extern int __get_user_bad(void);
 
 #define __put_user_x(size, x, ptr, __ret_pu)                    \
         asm volatile("call __put_user_" #size : "=a" (__ret_pu) \
-                     :"0" ((typeof(*(ptr)))(x)), "c" (ptr) : "ebx")
+                     : "0" ((typeof(*(ptr)))(x)), "c" (ptr) : "ebx")
 
 
 
 #ifdef CONFIG_X86_32
-#define __put_user_u64(x, addr, err)                                    \
+#define __put_user_asm_u64(x, addr, err, errret)                        \
         asm volatile("1:        movl %%eax,0(%2)\n"                     \
                      "2:        movl %%edx,4(%2)\n"                     \
                      "3:\n"                                             \
@@ -197,14 +197,24 @@ extern int __get_user_bad(void);
                      _ASM_EXTABLE(1b, 4b)                               \
                      _ASM_EXTABLE(2b, 4b)                               \
                      : "=r" (err)                                       \
-                     : "A" (x), "r" (addr), "i" (-EFAULT), "0" (err))
+                     : "A" (x), "r" (addr), "i" (errret), "0" (err))
+
+#define __put_user_asm_ex_u64(x, addr)                                  \
+        asm volatile("1:        movl %%eax,0(%1)\n"                     \
+                     "2:        movl %%edx,4(%1)\n"                     \
+                     "3:\n"                                             \
+                     _ASM_EXTABLE(1b, 2b - 1b)                          \
+                     _ASM_EXTABLE(2b, 3b - 2b)                          \
+                     : : "A" (x), "r" (addr))
 
 #define __put_user_x8(x, ptr, __ret_pu)                         \
         asm volatile("call __put_user_8" : "=a" (__ret_pu)      \
                      : "A" ((typeof(*(ptr)))(x)), "c" (ptr) : "ebx")
 #else
-#define __put_user_u64(x, ptr, retval) \
-        __put_user_asm(x, ptr, retval, "q", "", "Zr", -EFAULT)
+#define __put_user_asm_u64(x, ptr, retval, errret) \
+        __put_user_asm(x, ptr, retval, "q", "", "Zr", errret)
+#define __put_user_asm_ex_u64(x, addr)  \
+        __put_user_asm_ex(x, addr, "q", "", "Zr")
 #define __put_user_x8(x, ptr, __ret_pu) __put_user_x(8, x, ptr, __ret_pu)
 #endif
 
@@ -276,10 +286,32 @@ do {									\
                 __put_user_asm(x, ptr, retval, "w", "w", "ir", errret); \
                 break;                                                  \
         case 4:                                                         \
-                __put_user_asm(x, ptr, retval, "l", "k",  "ir", errret);\
+                __put_user_asm(x, ptr, retval, "l", "k", "ir", errret); \
                 break;                                                  \
         case 8:                                                         \
-                __put_user_u64((__typeof__(*ptr))(x), ptr, retval);     \
+                __put_user_asm_u64((__typeof__(*ptr))(x), ptr, retval,  \
+                                   errret);                             \
+                break;                                                  \
+        default:                                                        \
+                __put_user_bad();                                       \
+        }                                                               \
+} while (0)
+
+#define __put_user_size_ex(x, ptr, size)                                \
+do {                                                                    \
+        __chk_user_ptr(ptr);                                            \
+        switch (size) {                                                 \
+        case 1:                                                         \
+                __put_user_asm_ex(x, ptr, "b", "b", "iq");              \
+                break;                                                  \
+        case 2:                                                         \
+                __put_user_asm_ex(x, ptr, "w", "w", "ir");              \
+                break;                                                  \
+        case 4:                                                         \
+                __put_user_asm_ex(x, ptr, "l", "k", "ir");              \
+                break;                                                  \
+        case 8:                                                         \
+                __put_user_asm_ex_u64((__typeof__(*ptr))(x), ptr);      \
                 break;                                                  \
         default:                                                        \
                 __put_user_bad();                                       \
@@ -311,9 +343,12 @@ do {									\
 
 #ifdef CONFIG_X86_32
 #define __get_user_asm_u64(x, ptr, retval, errret)      (x) = __get_user_bad()
+#define __get_user_asm_ex_u64(x, ptr)                   (x) = __get_user_bad()
 #else
 #define __get_user_asm_u64(x, ptr, retval, errret) \
          __get_user_asm(x, ptr, retval, "q", "", "=r", errret)
+#define __get_user_asm_ex_u64(x, ptr) \
+         __get_user_asm_ex(x, ptr, "q", "", "=r")
 #endif
 
 #define __get_user_size(x, ptr, size, retval, errret)                   \
@@ -350,6 +385,33 @@ do {									\
                      : "=r" (err), ltype(x)                             \
                      : "m" (__m(addr)), "i" (errret), "0" (err))
 
+#define __get_user_size_ex(x, ptr, size)                                \
+do {                                                                    \
+        __chk_user_ptr(ptr);                                            \
+        switch (size) {                                                 \
+        case 1:                                                         \
+                __get_user_asm_ex(x, ptr, "b", "b", "=q");              \
+                break;                                                  \
+        case 2:                                                         \
+                __get_user_asm_ex(x, ptr, "w", "w", "=r");              \
+                break;                                                  \
+        case 4:                                                         \
+                __get_user_asm_ex(x, ptr, "l", "k", "=r");              \
+                break;                                                  \
+        case 8:                                                         \
+                __get_user_asm_ex_u64(x, ptr);                          \
+                break;                                                  \
+        default:                                                        \
+                (x) = __get_user_bad();                                 \
+        }                                                               \
+} while (0)
+
+#define __get_user_asm_ex(x, addr, itype, rtype, ltype)                 \
+        asm volatile("1:        mov"itype" %1,%"rtype"0\n"              \
+                     "2:\n"                                             \
+                     _ASM_EXTABLE(1b, 2b - 1b)                          \
+                     : ltype(x) : "m" (__m(addr)))
+
 #define __put_user_nocheck(x, ptr, size)                        \
 ({                                                              \
         int __pu_err;                                           \
@@ -385,6 +447,26 @@ struct __large_struct { unsigned long buf[100]; };
                      _ASM_EXTABLE(1b, 3b)                               \
                      : "=r"(err)                                        \
                      : ltype(x), "m" (__m(addr)), "i" (errret), "0" (err))
+
+#define __put_user_asm_ex(x, addr, itype, rtype, ltype)                 \
+        asm volatile("1:        mov"itype" %"rtype"0,%1\n"              \
+                     "2:\n"                                             \
+                     _ASM_EXTABLE(1b, 2b - 1b)                          \
+                     : : ltype(x), "m" (__m(addr)))
+
+/*
+ * uaccess_try and catch
+ */
+#define uaccess_try     do {                                            \
+        int prev_err = current_thread_info()->uaccess_err;              \
+        current_thread_info()->uaccess_err = 0;                         \
+        barrier();
+
+#define uaccess_catch(err)                                              \
+        (err) |= current_thread_info()->uaccess_err;                    \
+        current_thread_info()->uaccess_err = prev_err;                  \
+} while (0)
+
 /**
  * __get_user: - Get a simple variable from user space, with less checking.
  * @x:   Variable to store result.
@@ -408,6 +490,7 @@ struct __large_struct { unsigned long buf[100]; };
 
 #define __get_user(x, ptr)                                              \
         __get_user_nocheck((x), (ptr), sizeof(*(ptr)))
+
 /**
  * __put_user: - Write a simple value into user space, with less checking.
  * @x:   Value to copy to user space.
@@ -435,6 +518,45 @@ struct __large_struct { unsigned long buf[100]; };
 #define __put_user_unaligned __put_user
 
 /*
+ * {get|put}_user_try and catch
+ *
+ * get_user_try {
+ *      get_user_ex(...);
+ * } get_user_catch(err)
+ */
+#define get_user_try            uaccess_try
+#define get_user_catch(err)     uaccess_catch(err)
+
+#define get_user_ex(x, ptr)     do {                                    \
+        unsigned long __gue_val;                                        \
+        __get_user_size_ex((__gue_val), (ptr), (sizeof(*(ptr))));       \
+        (x) = (__force __typeof__(*(ptr)))__gue_val;                    \
+} while (0)
+
+#ifdef CONFIG_X86_WP_WORKS_OK
+
+#define put_user_try            uaccess_try
+#define put_user_catch(err)     uaccess_catch(err)
+
+#define put_user_ex(x, ptr)                                             \
+        __put_user_size_ex((__typeof__(*(ptr)))(x), (ptr), sizeof(*(ptr)))
+
+#else /* !CONFIG_X86_WP_WORKS_OK */
+
+#define put_user_try            do {            \
+        int __uaccess_err = 0;
+
+#define put_user_catch(err)                     \
+        (err) |= __uaccess_err;                 \
+} while (0)
+
+#define put_user_ex(x, ptr)     do {            \
+        __uaccess_err |= __put_user(x, ptr);    \
+} while (0)
+
+#endif /* CONFIG_X86_WP_WORKS_OK */
+
+/*
  * movsl can be slow when source and dest are not both 8-byte aligned
  */
 #ifdef CONFIG_X86_INTEL_USERCOPY
diff --git a/arch/x86/include/asm/uaccess_64.h b/arch/x86/include/asm/uaccess_64.h
index 84210c479fca..8cc687326eb8 100644
--- a/arch/x86/include/asm/uaccess_64.h
+++ b/arch/x86/include/asm/uaccess_64.h
@@ -188,16 +188,16 @@ __copy_to_user_inatomic(void __user *dst, const void *src, unsigned size)
 extern long __copy_user_nocache(void *dst, const void __user *src,
                                 unsigned size, int zerorest);
 
-static inline int __copy_from_user_nocache(void *dst, const void __user *src,
-                                           unsigned size)
+static inline int
+__copy_from_user_nocache(void *dst, const void __user *src, unsigned size)
 {
         might_sleep();
         return __copy_user_nocache(dst, src, size, 1);
 }
 
-static inline int __copy_from_user_inatomic_nocache(void *dst,
-                                                    const void __user *src,
-                                                    unsigned size)
+static inline int
+__copy_from_user_inatomic_nocache(void *dst, const void __user *src,
+                                  unsigned size)
 {
         return __copy_user_nocache(dst, src, size, 0);
 }
diff --git a/arch/x86/include/asm/uv/uv.h b/arch/x86/include/asm/uv/uv.h
new file mode 100644
index 000000000000..c0a01b5d985b
--- /dev/null
+++ b/arch/x86/include/asm/uv/uv.h
@@ -0,0 +1,33 @@
+#ifndef _ASM_X86_UV_UV_H
+#define _ASM_X86_UV_UV_H
+
+enum uv_system_type {UV_NONE, UV_LEGACY_APIC, UV_X2APIC, UV_NON_UNIQUE_APIC};
+
+struct cpumask;
+struct mm_struct;
+
+#ifdef CONFIG_X86_UV
+
+extern enum uv_system_type get_uv_system_type(void);
+extern int is_uv_system(void);
+extern void uv_cpu_init(void);
+extern void uv_system_init(void);
+extern const struct cpumask *uv_flush_tlb_others(const struct cpumask *cpumask,
+                                                 struct mm_struct *mm,
+                                                 unsigned long va,
+                                                 unsigned int cpu);
+
+#else   /* X86_UV */
+
+static inline enum uv_system_type get_uv_system_type(void) { return UV_NONE; }
+static inline int is_uv_system(void)    { return 0; }
+static inline void uv_cpu_init(void)    { }
+static inline void uv_system_init(void) { }
+static inline const struct cpumask *
+uv_flush_tlb_others(const struct cpumask *cpumask, struct mm_struct *mm,
+                    unsigned long va, unsigned int cpu)
+{ return cpumask; }
+
+#endif  /* X86_UV */
+
+#endif  /* _ASM_X86_UV_UV_H */
diff --git a/arch/x86/include/asm/uv/uv_bau.h b/arch/x86/include/asm/uv/uv_bau.h
index 50423c7b56b2..9b0e61bf7a88 100644
--- a/arch/x86/include/asm/uv/uv_bau.h
+++ b/arch/x86/include/asm/uv/uv_bau.h
@@ -325,7 +325,6 @@ static inline void bau_cpubits_clear(struct bau_local_cpumask *dstp, int nbits)
 #define cpubit_isset(cpu, bau_local_cpumask) \
         test_bit((cpu), (bau_local_cpumask).bits)
 
-extern int uv_flush_tlb_others(cpumask_t *, struct mm_struct *, unsigned long);
 extern void uv_bau_message_intr1(void);
 extern void uv_bau_timeout_intr1(void);
 
diff --git a/arch/x86/include/asm/vic.h b/arch/x86/include/asm/vic.h
deleted file mode 100644
index 53100f353612..000000000000
--- a/arch/x86/include/asm/vic.h
+++ /dev/null
@@ -1,61 +0,0 @@
-/* Copyright (C) 1999,2001
- *
- * Author: J.E.J.Bottomley@HansenPartnership.com
- *
- * Standard include definitions for the NCR Voyager Interrupt Controller */
-
-/* The eight CPI vectors.  To activate a CPI, you write a bit mask
- * corresponding to the processor set to be interrupted into the
- * relevant register.  That set of CPUs will then be interrupted with
- * the CPI */
-static const int VIC_CPI_Registers[] =
-        {0xFC00, 0xFC01, 0xFC08, 0xFC09,
-         0xFC10, 0xFC11, 0xFC18, 0xFC19 };
-
-#define VIC_PROC_WHO_AM_I               0xfc29
-#       define  QUAD_IDENTIFIER         0xC0
-#       define  EIGHT_SLOT_IDENTIFIER   0xE0
-#define QIC_EXTENDED_PROCESSOR_SELECT   0xFC72
-#define VIC_CPI_BASE_REGISTER           0xFC41
-#define VIC_PROCESSOR_ID                0xFC21
-#       define VIC_CPU_MASQUERADE_ENABLE 0x8
-
-#define VIC_CLAIM_REGISTER_0            0xFC38
-#define VIC_CLAIM_REGISTER_1            0xFC39
-#define VIC_REDIRECT_REGISTER_0         0xFC60
-#define VIC_REDIRECT_REGISTER_1         0xFC61
-#define VIC_PRIORITY_REGISTER           0xFC20
-
-#define VIC_PRIMARY_MC_BASE             0xFC48
-#define VIC_SECONDARY_MC_BASE           0xFC49
-
-#define QIC_PROCESSOR_ID                0xFC71
-#       define  QIC_CPUID_ENABLE        0x08
-
-#define QIC_VIC_CPI_BASE_REGISTER       0xFC79
-#define QIC_CPI_BASE_REGISTER           0xFC7A
-
-#define QIC_MASK_REGISTER0              0xFC80
-/* NOTE: these are masked high, enabled low */
-#       define QIC_PERF_TIMER           0x01
-#       define QIC_LPE                  0x02
-#       define QIC_SYS_INT              0x04
-#       define QIC_CMN_INT              0x08
-/* at the moment, just enable CMN_INT, disable SYS_INT */
-#       define QIC_DEFAULT_MASK0        (~(QIC_CMN_INT /* | VIC_SYS_INT */))
-#define QIC_MASK_REGISTER1              0xFC81
-#       define QIC_BOOT_CPI_MASK        0xFE
-/* Enable CPI's 1-6 inclusive */
-#       define QIC_CPI_ENABLE           0x81
-
-#define QIC_INTERRUPT_CLEAR0            0xFC8A
-#define QIC_INTERRUPT_CLEAR1            0xFC8B
-
-/* this is where we place the CPI vectors */
-#define VIC_DEFAULT_CPI_BASE            0xC0
-/* this is where we place the QIC CPI vectors */
-#define QIC_DEFAULT_CPI_BASE            0xD0
-
-#define VIC_BOOT_INTERRUPT_MASK         0xfe
-
-extern void smp_vic_timer_interrupt(void);
diff --git a/arch/x86/include/asm/virtext.h b/arch/x86/include/asm/virtext.h
index 593636275238..e0f9aa16358b 100644
--- a/arch/x86/include/asm/virtext.h
+++ b/arch/x86/include/asm/virtext.h
@@ -118,7 +118,7 @@ static inline void cpu_svm_disable(void)
 
         wrmsrl(MSR_VM_HSAVE_PA, 0);
         rdmsrl(MSR_EFER, efer);
-        wrmsrl(MSR_EFER, efer & ~MSR_EFER_SVME_MASK);
+        wrmsrl(MSR_EFER, efer & ~EFER_SVME);
 }
 
 /** Makes sure SVM is disabled, if it is supported on the CPU
diff --git a/arch/x86/include/asm/vmx.h b/arch/x86/include/asm/vmx.h
index d0238e6151d8..498f944010b9 100644
--- a/arch/x86/include/asm/vmx.h
+++ b/arch/x86/include/asm/vmx.h
@@ -270,8 +270,9 @@ enum vmcs_field {
 
 #define INTR_TYPE_EXT_INTR              (0 << 8) /* external interrupt */
 #define INTR_TYPE_NMI_INTR              (2 << 8) /* NMI */
-#define INTR_TYPE_EXCEPTION             (3 << 8) /* processor exception */
+#define INTR_TYPE_HARD_EXCEPTION        (3 << 8) /* processor exception */
 #define INTR_TYPE_SOFT_INTR             (4 << 8) /* software interrupt */
+#define INTR_TYPE_SOFT_EXCEPTION        (6 << 8) /* software exception */
 
 /* GUEST_INTERRUPTIBILITY_INFO flags. */
 #define GUEST_INTR_STATE_STI            0x00000001
@@ -311,7 +312,7 @@ enum vmcs_field {
 #define DEBUG_REG_ACCESS_TYPE           0x10    /* 4, direction of access */
 #define TYPE_MOV_TO_DR                  (0 << 4)
 #define TYPE_MOV_FROM_DR                (1 << 4)
-#define DEBUG_REG_ACCESS_REG            0xf00   /* 11:8, general purpose reg. */
+#define DEBUG_REG_ACCESS_REG(eq)        (((eq) >> 8) & 0xf) /* 11:8, general purpose reg. */
 
 
 /* segment AR */
diff --git a/arch/x86/include/asm/voyager.h b/arch/x86/include/asm/voyager.h
deleted file mode 100644
index b3e647307625..000000000000
--- a/arch/x86/include/asm/voyager.h
+++ /dev/null
@@ -1,529 +0,0 @@
-/* Copyright (C) 1999,2001
- *
- * Author: J.E.J.Bottomley@HansenPartnership.com
- *
- * Standard include definitions for the NCR Voyager system */
-
-#undef  VOYAGER_DEBUG
-#undef  VOYAGER_CAT_DEBUG
-
-#ifdef VOYAGER_DEBUG
-#define VDEBUG(x)       printk x
-#else
-#define VDEBUG(x)
-#endif
-
-/* There are three levels of voyager machine: 3,4 and 5. The rule is
- * if it's less than 3435 it's a Level 3 except for a 3360 which is
- * a level 4.  A 3435 or above is a Level 5 */
-#define VOYAGER_LEVEL5_AND_ABOVE        0x3435
-#define VOYAGER_LEVEL4                  0x3360
-
-/* The L4 DINO ASIC */
-#define VOYAGER_DINO                    0x43
-
-/* voyager ports in standard I/O space */
-#define VOYAGER_MC_SETUP        0x96
-
-
-#define VOYAGER_CAT_CONFIG_PORT                 0x97
-#       define VOYAGER_CAT_DESELECT             0xff
-#define VOYAGER_SSPB_RELOCATION_PORT            0x98
-
-/* Valid CAT controller commands */
-/* start instruction register cycle */
-#define VOYAGER_CAT_IRCYC                       0x01
-/* start data register cycle */
-#define VOYAGER_CAT_DRCYC                       0x02
-/* move to execute state */
-#define VOYAGER_CAT_RUN                         0x0F
-/* end operation */
-#define VOYAGER_CAT_END                         0x80
-/* hold in idle state */
-#define VOYAGER_CAT_HOLD                        0x90
-/* single step an "intest" vector */
-#define VOYAGER_CAT_STEP                        0xE0
-/* return cat controller to CLEMSON mode */
-#define VOYAGER_CAT_CLEMSON                     0xFF
-
-/* the default cat command header */
-#define VOYAGER_CAT_HEADER                      0x7F
-
-/* the range of possible CAT module ids in the system */
-#define VOYAGER_MIN_MODULE                      0x10
-#define VOYAGER_MAX_MODULE                      0x1f
-
-/* The voyager registers per asic */
-#define VOYAGER_ASIC_ID_REG                     0x00
-#define VOYAGER_ASIC_TYPE_REG                   0x01
-/* the sub address registers can be made auto incrementing on reads */
-#define VOYAGER_AUTO_INC_REG                    0x02
-#       define VOYAGER_AUTO_INC                 0x04
-#       define VOYAGER_NO_AUTO_INC              0xfb
-#define VOYAGER_SUBADDRDATA                     0x03
-#define VOYAGER_SCANPATH                        0x05
-#       define VOYAGER_CONNECT_ASIC             0x01
-#       define VOYAGER_DISCONNECT_ASIC          0xfe
-#define VOYAGER_SUBADDRLO                       0x06
-#define VOYAGER_SUBADDRHI                       0x07
-#define VOYAGER_SUBMODSELECT                    0x08
-#define VOYAGER_SUBMODPRESENT                   0x09
-
-#define VOYAGER_SUBADDR_LO                      0xff
-#define VOYAGER_SUBADDR_HI                      0xffff
-
-/* the maximum size of a scan path -- used to form instructions */
-#define VOYAGER_MAX_SCAN_PATH                   0x100
-/* the biggest possible register size (in bytes) */
-#define VOYAGER_MAX_REG_SIZE                    4
-
-/* Total number of possible modules (including submodules) */
-#define VOYAGER_MAX_MODULES                     16
-/* Largest number of asics per module */
-#define VOYAGER_MAX_ASICS_PER_MODULE            7
-
-/* the CAT asic of each module is always the first one */
-#define VOYAGER_CAT_ID                          0
-#define VOYAGER_PSI                             0x1a
-
-/* voyager instruction operations and registers */
-#define VOYAGER_READ_CONFIG                     0x1
-#define VOYAGER_WRITE_CONFIG                    0x2
-#define VOYAGER_BYPASS                          0xff
-
-typedef struct voyager_asic {
-        __u8    asic_addr;      /* ASIC address; Level 4 */
-        __u8    asic_type;      /* ASIC type */
-        __u8    asic_id;        /* ASIC id */
-        __u8    jtag_id[4];     /* JTAG id */
-        __u8    asic_location;  /* Location within scan path; start w/ 0 */
-        __u8    bit_location;   /* Location within bit stream; start w/ 0 */
-        __u8    ireg_length;    /* Instruction register length */
-        __u16   subaddr;        /* Amount of sub address space */
-        struct voyager_asic *next;      /* Next asic in linked list */
-} voyager_asic_t;
-
-typedef struct voyager_module {
-        __u8    module_addr;            /* Module address */
-        __u8    scan_path_connected;    /* Scan path connected */
-        __u16   ee_size;                /* Size of the EEPROM */
-        __u16   num_asics;              /* Number of Asics */
-        __u16   inst_bits;              /* Instruction bits in the scan path */
-        __u16   largest_reg;            /* Largest register in the scan path */
-        __u16   smallest_reg;           /* Smallest register in the scan path */
-        voyager_asic_t   *asic;         /* First ASIC in scan path (CAT_I) */
-        struct   voyager_module *submodule;     /* Submodule pointer */
-        struct   voyager_module *next;          /* Next module in linked list */
-} voyager_module_t;
-
-typedef struct voyager_eeprom_hdr {
-         __u8  module_id[4];
-         __u8  version_id;
-         __u8  config_id;
-         __u16 boundry_id;      /* boundary scan id */
-         __u16 ee_size;         /* size of EEPROM */
-         __u8  assembly[11];    /* assembly # */
-         __u8  assembly_rev;    /* assembly rev */
-         __u8  tracer[4];       /* tracer number */
-         __u16 assembly_cksum;  /* asm checksum */
-         __u16 power_consump;   /* pwr requirements */
-         __u16 num_asics;       /* number of asics */
-         __u16 bist_time;       /* min. bist time */
-         __u16 err_log_offset;  /* error log offset */
-         __u16 scan_path_offset;/* scan path offset */
-         __u16 cct_offset;
-         __u16 log_length;      /* length of err log */
-         __u16 xsum_end;        /* offset to end of
-                                   checksum */
-         __u8  reserved[4];
-         __u8  sflag;           /* starting sentinal */
-         __u8  part_number[13]; /* prom part number */
-         __u8  version[10];     /* version number */
-         __u8  signature[8];
-         __u16 eeprom_chksum;
-         __u32  data_stamp_offset;
-         __u8  eflag ;           /* ending sentinal */
-} __attribute__((packed)) voyager_eprom_hdr_t;
-
-
-
-#define VOYAGER_EPROM_SIZE_OFFSET                               \
-        ((__u16)(&(((voyager_eprom_hdr_t *)0)->ee_size)))
-#define VOYAGER_XSUM_END_OFFSET         0x2a
-
-/* the following three definitions are for internal table layouts
- * in the module EPROMs.  We really only care about the IDs and
- * offsets */
-typedef struct voyager_sp_table {
-        __u8 asic_id;
-        __u8 bypass_flag;
-        __u16 asic_data_offset;
-        __u16 config_data_offset;
-} __attribute__((packed)) voyager_sp_table_t;
-
-typedef struct voyager_jtag_table {
-        __u8 icode[4];
-        __u8 runbist[4];
-        __u8 intest[4];
-        __u8 samp_preld[4];
-        __u8 ireg_len;
-} __attribute__((packed)) voyager_jtt_t;
-
-typedef struct voyager_asic_data_table {
-        __u8 jtag_id[4];
-        __u16 length_bsr;
-        __u16 length_bist_reg;
-        __u32 bist_clk;
-        __u16 subaddr_bits;
-        __u16 seed_bits;
-        __u16 sig_bits;
-        __u16 jtag_offset;
-} __attribute__((packed)) voyager_at_t;
-
-/* Voyager Interrupt Controller (VIC) registers */
-
-/* Base to add to Cross Processor Interrupts (CPIs) when triggering
- * the CPU IRQ line */
-/* register defines for the WCBICs (one per processor) */
-#define VOYAGER_WCBIC0  0x41            /* bus A node P1 processor 0 */
-#define VOYAGER_WCBIC1  0x49            /* bus A node P1 processor 1 */
-#define VOYAGER_WCBIC2  0x51            /* bus A node P2 processor 0 */
-#define VOYAGER_WCBIC3  0x59            /* bus A node P2 processor 1 */
-#define VOYAGER_WCBIC4  0x61            /* bus B node P1 processor 0 */
-#define VOYAGER_WCBIC5  0x69            /* bus B node P1 processor 1 */
-#define VOYAGER_WCBIC6  0x71            /* bus B node P2 processor 0 */
-#define VOYAGER_WCBIC7  0x79            /* bus B node P2 processor 1 */
-
-
-/* top of memory registers */
-#define VOYAGER_WCBIC_TOM_L     0x4
-#define VOYAGER_WCBIC_TOM_H     0x5
-
-/* register defines for Voyager Memory Contol (VMC)
- * these are present on L4 machines only */
-#define VOYAGER_VMC1            0x81
-#define VOYAGER_VMC2            0x91
-#define VOYAGER_VMC3            0xa1
-#define VOYAGER_VMC4            0xb1
-
-/* VMC Ports */
-#define VOYAGER_VMC_MEMORY_SETUP        0x9
-#       define VMC_Interleaving         0x01
-#       define VMC_4Way                 0x02
-#       define VMC_EvenCacheLines       0x04
-#       define VMC_HighLine             0x08
-#       define VMC_Start0_Enable        0x20
-#       define VMC_Start1_Enable        0x40
-#       define VMC_Vremap               0x80
-#define VOYAGER_VMC_BANK_DENSITY        0xa
-#       define  VMC_BANK_EMPTY          0
-#       define  VMC_BANK_4MB            1
-#       define  VMC_BANK_16MB           2
-#       define  VMC_BANK_64MB           3
-#       define  VMC_BANK0_MASK          0x03
-#       define  VMC_BANK1_MASK          0x0C
-#       define  VMC_BANK2_MASK          0x30
-#       define  VMC_BANK3_MASK          0xC0
-
-/* Magellan Memory Controller (MMC) defines - present on L5 */
-#define VOYAGER_MMC_ASIC_ID             1
-/* the two memory modules corresponding to memory cards in the system */
-#define VOYAGER_MMC_MEMORY0_MODULE      0x14
-#define VOYAGER_MMC_MEMORY1_MODULE      0x15
-/* the Magellan Memory Address (MMA) defines */
-#define VOYAGER_MMA_ASIC_ID             2
-
-/* Submodule number for the Quad Baseboard */
-#define VOYAGER_QUAD_BASEBOARD          1
-
-/* ASIC defines for the Quad Baseboard */
-#define VOYAGER_QUAD_QDATA0             1
-#define VOYAGER_QUAD_QDATA1             2
-#define VOYAGER_QUAD_QABC               3
-
-/* Useful areas in extended CMOS */
-#define VOYAGER_PROCESSOR_PRESENT_MASK  0x88a
-#define VOYAGER_MEMORY_CLICKMAP         0xa23
-#define VOYAGER_DUMP_LOCATION           0xb1a
-
-/* SUS In Control bit - used to tell SUS that we don't need to be
- * babysat anymore */
-#define VOYAGER_SUS_IN_CONTROL_PORT     0x3ff
-#       define VOYAGER_IN_CONTROL_FLAG  0x80
-
-/* Voyager PSI defines */
-#define VOYAGER_PSI_STATUS_REG          0x08
-#       define PSI_DC_FAIL              0x01
-#       define PSI_MON                  0x02
-#       define PSI_FAULT                0x04
-#       define PSI_ALARM                0x08
-#       define PSI_CURRENT              0x10
-#       define PSI_DVM                  0x20
-#       define PSI_PSCFAULT             0x40
-#       define PSI_STAT_CHG             0x80
-
-#define VOYAGER_PSI_SUPPLY_REG          0x8000
-        /* read */
-#       define PSI_FAIL_DC              0x01
-#       define PSI_FAIL_AC              0x02
-#       define PSI_MON_INT              0x04
-#       define PSI_SWITCH_OFF           0x08
-#       define PSI_HX_OFF               0x10
-#       define PSI_SECURITY             0x20
-#       define PSI_CMOS_BATT_LOW        0x40
-#       define PSI_CMOS_BATT_FAIL       0x80
-        /* write */
-#       define PSI_CLR_SWITCH_OFF       0x13
-#       define PSI_CLR_HX_OFF           0x14
-#       define PSI_CLR_CMOS_BATT_FAIL   0x17
-
-#define VOYAGER_PSI_MASK                0x8001
-#       define PSI_MASK_MASK            0x10
-
-#define VOYAGER_PSI_AC_FAIL_REG         0x8004
-#define AC_FAIL_STAT_CHANGE             0x80
-
-#define VOYAGER_PSI_GENERAL_REG         0x8007
-        /* read */
-#       define PSI_SWITCH_ON            0x01
-#       define PSI_SWITCH_ENABLED       0x02
-#       define PSI_ALARM_ENABLED        0x08
-#       define PSI_SECURE_ENABLED       0x10
-#       define PSI_COLD_RESET           0x20
-#       define PSI_COLD_START           0x80
-        /* write */
-#       define PSI_POWER_DOWN           0x10
-#       define PSI_SWITCH_DISABLE       0x01
-#       define PSI_SWITCH_ENABLE        0x11
-#       define PSI_CLEAR                0x12
-#       define PSI_ALARM_DISABLE        0x03
-#       define PSI_ALARM_ENABLE         0x13
-#       define PSI_CLEAR_COLD_RESET     0x05
-#       define PSI_SET_COLD_RESET       0x15
-#       define PSI_CLEAR_COLD_START     0x07
-#       define PSI_SET_COLD_START       0x17
-
-
-
-struct voyager_bios_info {
-        __u8    len;
-        __u8    major;
-        __u8    minor;
-        __u8    debug;
-        __u8    num_classes;
-        __u8    class_1;
-        __u8    class_2;
-};
-
-/* The following structures and definitions are for the Kernel/SUS
- * interface these are needed to find out how SUS initialised any Quad
- * boards in the system */
-
-#define NUMBER_OF_MC_BUSSES     2
-#define SLOTS_PER_MC_BUS        8
-#define MAX_CPUS                16      /* 16 way CPU system */
-#define MAX_PROCESSOR_BOARDS    4       /* 4 processor slot system */
-#define MAX_CACHE_LEVELS        4       /* # of cache levels supported */
-#define MAX_SHARED_CPUS         4       /* # of CPUs that can share a LARC */
-#define NUMBER_OF_POS_REGS      8
-
-typedef struct {
-        __u8    MC_Slot;
-        __u8    POS_Values[NUMBER_OF_POS_REGS];
-} __attribute__((packed)) MC_SlotInformation_t;
-
-struct QuadDescription {
-        __u8  Type;     /* for type 0 (DYADIC or MONADIC) all fields
-                         * will be zero except for slot */
-        __u8 StructureVersion;
-        __u32 CPI_BaseAddress;
-        __u32  LARC_BankSize;
-        __u32 LocalMemoryStateBits;
-        __u8  Slot; /* Processor slots 1 - 4 */
-} __attribute__((packed));
-
-struct ProcBoardInfo {
-        __u8 Type;
-        __u8 StructureVersion;
-        __u8 NumberOfBoards;
-        struct QuadDescription QuadData[MAX_PROCESSOR_BOARDS];
-} __attribute__((packed));
-
-struct CacheDescription {
-        __u8 Level;
-        __u32 TotalSize;
-        __u16 LineSize;
-        __u8  Associativity;
-        __u8  CacheType;
-        __u8  WriteType;
-        __u8  Number_CPUs_SharedBy;
-        __u8  Shared_CPUs_Hardware_IDs[MAX_SHARED_CPUS];
-
-} __attribute__((packed));
-
-struct CPU_Description {
-        __u8 CPU_HardwareId;
-        char *FRU_String;
-        __u8 NumberOfCacheLevels;
-        struct CacheDescription CacheLevelData[MAX_CACHE_LEVELS];
-} __attribute__((packed));
-
-struct CPU_Info {
-        __u8 Type;
-        __u8 StructureVersion;
-        __u8 NumberOf_CPUs;
-        struct CPU_Description CPU_Data[MAX_CPUS];
-} __attribute__((packed));
-
-
-/*
- * This structure will be used by SUS and the OS.
- * The assumption about this structure is that no blank space is
- * packed in it by our friend the compiler.
- */
-typedef struct {
-        __u8    Mailbox_SUS;            /* Written to by SUS to give
-                                           commands/response to the OS */
-        __u8    Mailbox_OS;             /* Written to by the OS to give
-                                           commands/response to SUS */
-        __u8    SUS_MailboxVersion;     /* Tells the OS which iteration of the
-                                           interface SUS supports */
-        __u8    OS_MailboxVersion;      /* Tells SUS which iteration of the
-                                           interface the OS supports */
-        __u32   OS_Flags;               /* Flags set by the OS as info for
-                                           SUS */
-        __u32   SUS_Flags;              /* Flags set by SUS as info
-                                           for the OS */
-        __u32   WatchDogPeriod;         /* Watchdog period (in seconds) which
-                                           the DP uses to see if the OS
-                                           is dead */
-        __u32   WatchDogCount;          /* Updated by the OS on every tic. */
-        __u32   MemoryFor_SUS_ErrorLog; /* Flat 32 bit address which tells SUS
-                                           where to stuff the SUS error log
-                                           on a dump */
-        MC_SlotInformation_t MC_SlotInfo[NUMBER_OF_MC_BUSSES*SLOTS_PER_MC_BUS];
-                                        /* Storage for MCA POS data */
-        /* All new SECOND_PASS_INTERFACE fields added from this point */
-        struct ProcBoardInfo    *BoardData;
-        struct CPU_Info         *CPU_Data;
-        /* All new fields must be added from this point */
-} Voyager_KernelSUS_Mbox_t;
-
-/* structure for finding the right memory address to send a QIC CPI to */
-struct voyager_qic_cpi {
-        /* Each cache line (32 bytes) can trigger a cpi.  The cpi
-         * read/write may occur anywhere in the cache line---pick the
-         * middle to be safe */
-        struct  {
-                __u32 pad1[3];
-                __u32 cpi;
-                __u32 pad2[4];
-        } qic_cpi[8];
-};
-
-struct voyager_status {
-        __u32   power_fail:1;
-        __u32   switch_off:1;
-        __u32   request_from_kernel:1;
-};
-
-struct voyager_psi_regs {
-        __u8 cat_id;
-        __u8 cat_dev;
-        __u8 cat_control;
-        __u8 subaddr;
-        __u8 dummy4;
-        __u8 checkbit;
-        __u8 subaddr_low;
-        __u8 subaddr_high;
-        __u8 intstatus;
-        __u8 stat1;
-        __u8 stat3;
-        __u8 fault;
-        __u8 tms;
-        __u8 gen;
-        __u8 sysconf;
-        __u8 dummy15;
-};
-
-struct voyager_psi_subregs {
-        __u8 supply;
-        __u8 mask;
-        __u8 present;
-        __u8 DCfail;
-        __u8 ACfail;
-        __u8 fail;
-        __u8 UPSfail;
-        __u8 genstatus;
-};
-
-struct voyager_psi {
-        struct voyager_psi_regs regs;
-        struct voyager_psi_subregs subregs;
-};
-
-struct voyager_SUS {
-#define VOYAGER_DUMP_BUTTON_NMI         0x1
-#define VOYAGER_SUS_VALID               0x2
-#define VOYAGER_SYSINT_COMPLETE         0x3
-        __u8    SUS_mbox;
-#define VOYAGER_NO_COMMAND              0x0
-#define VOYAGER_IGNORE_DUMP             0x1
-#define VOYAGER_DO_DUMP                 0x2
-#define VOYAGER_SYSINT_HANDSHAKE        0x3
-#define VOYAGER_DO_MEM_DUMP             0x4
-#define VOYAGER_SYSINT_WAS_RECOVERED    0x5
-        __u8    kernel_mbox;
-#define VOYAGER_MAILBOX_VERSION         0x10
-        __u8    SUS_version;
-        __u8    kernel_version;
-#define VOYAGER_OS_HAS_SYSINT           0x1
-#define VOYAGER_OS_IN_PROGRESS          0x2
-#define VOYAGER_UPDATING_WDPERIOD       0x4
-        __u32   kernel_flags;
-#define VOYAGER_SUS_BOOTING             0x1
-#define VOYAGER_SUS_IN_PROGRESS         0x2
-        __u32   SUS_flags;
-        __u32   watchdog_period;
-        __u32   watchdog_count;
-        __u32   SUS_errorlog;
-        /* lots of system configuration stuff under here */
-};
-
-/* Variables exported by voyager_smp */
-extern __u32 voyager_extended_vic_processors;
-extern __u32 voyager_allowed_boot_processors;
-extern __u32 voyager_quad_processors;
-extern struct voyager_qic_cpi *voyager_quad_cpi_addr[NR_CPUS];
-extern struct voyager_SUS *voyager_SUS;
-
-/* variables exported always */
-extern struct task_struct *voyager_thread;
-extern int voyager_level;
-extern struct voyager_status voyager_status;
-
-/* functions exported by the voyager and voyager_smp modules */
-extern int voyager_cat_readb(__u8 module, __u8 asic, int reg);
-extern void voyager_cat_init(void);
-extern void voyager_detect(struct voyager_bios_info *);
-extern void voyager_trap_init(void);
-extern void voyager_setup_irqs(void);
-extern int voyager_memory_detect(int region, __u32 *addr, __u32 *length);
-extern void voyager_smp_intr_init(void);
-extern __u8 voyager_extended_cmos_read(__u16 cmos_address);
-extern void voyager_smp_dump(void);
-extern void voyager_timer_interrupt(void);
-extern void smp_local_timer_interrupt(void);
-extern void voyager_power_off(void);
-extern void smp_voyager_power_off(void *dummy);
-extern void voyager_restart(void);
-extern void voyager_cat_power_off(void);
-extern void voyager_cat_do_common_interrupt(void);
-extern void voyager_handle_nmi(void);
-extern void voyager_smp_intr_init(void);
-/* Commands for the following are */
-#define VOYAGER_PSI_READ        0
-#define VOYAGER_PSI_WRITE       1
-#define VOYAGER_PSI_SUBREAD     2
-#define VOYAGER_PSI_SUBWRITE    3
-extern void voyager_cat_psi(__u8, __u16, __u8 *);
diff --git a/arch/x86/include/asm/xen/events.h b/arch/x86/include/asm/xen/events.h
index 19144184983a..1df35417c412 100644
--- a/arch/x86/include/asm/xen/events.h
+++ b/arch/x86/include/asm/xen/events.h
@@ -15,10 +15,4 @@ static inline int xen_irqs_disabled(struct pt_regs *regs)
         return raw_irqs_disabled_flags(regs->flags);
 }
 
-static inline void xen_do_IRQ(int irq, struct pt_regs *regs)
-{
-        regs->orig_ax = ~irq;
-        do_IRQ(regs);
-}
-
 #endif /* _ASM_X86_XEN_EVENTS_H */
diff --git a/arch/x86/include/asm/xen/hypervisor.h b/arch/x86/include/asm/xen/hypervisor.h
index 81fbd735aec4..d5b7e90c0edf 100644
--- a/arch/x86/include/asm/xen/hypervisor.h
+++ b/arch/x86/include/asm/xen/hypervisor.h
@@ -38,22 +38,30 @@ extern struct shared_info *HYPERVISOR_shared_info;
 extern struct start_info *xen_start_info;
 
 enum xen_domain_type {
-        XEN_NATIVE,
-        XEN_PV_DOMAIN,
-        XEN_HVM_DOMAIN,
+        XEN_NATIVE,             /* running on bare hardware    */
+        XEN_PV_DOMAIN,          /* running in a PV domain      */
+        XEN_HVM_DOMAIN,         /* running in a Xen hvm domain */
 };
 
-extern enum xen_domain_type xen_domain_type;
-
 #ifdef CONFIG_XEN
-#define xen_domain()            (xen_domain_type != XEN_NATIVE)
+extern enum xen_domain_type xen_domain_type;
 #else
-#define xen_domain()            (0)
+#define xen_domain_type         XEN_NATIVE
 #endif
 
-#define xen_pv_domain()         (xen_domain() && xen_domain_type == XEN_PV_DOMAIN)
-#define xen_hvm_domain()        (xen_domain() && xen_domain_type == XEN_HVM_DOMAIN)
+#define xen_domain()            (xen_domain_type != XEN_NATIVE)
+#define xen_pv_domain()         (xen_domain() &&                        \
+                                 xen_domain_type == XEN_PV_DOMAIN)
+#define xen_hvm_domain()        (xen_domain() &&                        \
+                                 xen_domain_type == XEN_HVM_DOMAIN)
+
+#ifdef CONFIG_XEN_DOM0
+#include <xen/interface/xen.h>
 
-#define xen_initial_domain()    (xen_pv_domain() && xen_start_info->flags & SIF_INITDOMAIN)
+#define xen_initial_domain()    (xen_pv_domain() && \
+                                 xen_start_info->flags & SIF_INITDOMAIN)
+#else  /* !CONFIG_XEN_DOM0 */
+#define xen_initial_domain()    (0)
+#endif  /* CONFIG_XEN_DOM0 */
 
 #endif /* _ASM_X86_XEN_HYPERVISOR_H */
diff --git a/arch/x86/include/asm/xen/page.h b/arch/x86/include/asm/xen/page.h
index 4bd990ee43df..1a918dde46b5 100644
--- a/arch/x86/include/asm/xen/page.h
+++ b/arch/x86/include/asm/xen/page.h
@@ -164,6 +164,7 @@ static inline pte_t __pte_ma(pteval_t x)
 
 
 xmaddr_t arbitrary_virt_to_machine(void *address);
+unsigned long arbitrary_virt_to_mfn(void *vaddr);
 void make_lowmem_page_readonly(void *vaddr);
 void make_lowmem_page_readwrite(void *vaddr);
 
diff --git a/arch/x86/kernel/Makefile b/arch/x86/kernel/Makefile
index bb1eef62d8f0..1fc811b3b855 100644
--- a/arch/x86/kernel/Makefile
+++ b/arch/x86/kernel/Makefile
@@ -23,11 +23,12 @@ nostackp := $(call cc-option, -fno-stack-protector)
 CFLAGS_vsyscall_64.o    := $(PROFILING) -g0 $(nostackp)
 CFLAGS_hpet.o           := $(nostackp)
 CFLAGS_tsc.o            := $(nostackp)
+CFLAGS_paravirt.o       := $(nostackp)
 
 obj-y                   := process_$(BITS).o signal.o entry_$(BITS).o
 obj-y                   += traps.o irq.o irq_$(BITS).o dumpstack_$(BITS).o
 obj-y                   += time_$(BITS).o ioport.o ldt.o dumpstack.o
-obj-y                   += setup.o i8259.o irqinit_$(BITS).o setup_percpu.o
+obj-y                   += setup.o i8259.o irqinit_$(BITS).o
 obj-$(CONFIG_X86_VISWS) += visws_quirks.o
 obj-$(CONFIG_X86_32)    += probe_roms_32.o
 obj-$(CONFIG_X86_32)    += sys_i386_32.o i386_ksyms_32.o
@@ -49,31 +50,27 @@ obj-y				+= step.o
 obj-$(CONFIG_STACKTRACE)        += stacktrace.o
 obj-y                           += cpu/
 obj-y                           += acpi/
-obj-$(CONFIG_X86_BIOS_REBOOT)   += reboot.o
+obj-y                           += reboot.o
 obj-$(CONFIG_MCA)               += mca_32.o
 obj-$(CONFIG_X86_MSR)           += msr.o
 obj-$(CONFIG_X86_CPUID)         += cpuid.o
 obj-$(CONFIG_PCI)               += early-quirks.o
 apm-y                           := apm_32.o
 obj-$(CONFIG_APM)               += apm.o
-obj-$(CONFIG_X86_SMP)           += smp.o
-obj-$(CONFIG_X86_SMP)           += smpboot.o tsc_sync.o ipi.o tlb_$(BITS).o
-obj-$(CONFIG_X86_32_SMP)        += smpcommon.o
-obj-$(CONFIG_X86_64_SMP)        += tsc_sync.o smpcommon.o
+obj-$(CONFIG_SMP)               += smp.o
+obj-$(CONFIG_SMP)               += smpboot.o tsc_sync.o
+obj-$(CONFIG_SMP)               += setup_percpu.o
+obj-$(CONFIG_X86_64_SMP)        += tsc_sync.o
 obj-$(CONFIG_X86_TRAMPOLINE)    += trampoline_$(BITS).o
 obj-$(CONFIG_X86_MPPARSE)       += mpparse.o
-obj-$(CONFIG_X86_LOCAL_APIC)    += apic.o nmi.o
-obj-$(CONFIG_X86_IO_APIC)       += io_apic.o
+obj-y                           += apic/
 obj-$(CONFIG_X86_REBOOTFIXUPS)  += reboot_fixups_32.o
 obj-$(CONFIG_DYNAMIC_FTRACE)    += ftrace.o
 obj-$(CONFIG_FUNCTION_GRAPH_TRACER)     += ftrace.o
 obj-$(CONFIG_KEXEC)             += machine_kexec_$(BITS).o
 obj-$(CONFIG_KEXEC)             += relocate_kernel_$(BITS).o crash.o
 obj-$(CONFIG_CRASH_DUMP)        += crash_dump_$(BITS).o
-obj-$(CONFIG_X86_NUMAQ)         += numaq_32.o
-obj-$(CONFIG_X86_ES7000)        += es7000_32.o
-obj-$(CONFIG_X86_SUMMIT_NUMA)   += summit_32.o
-obj-y                           += vsmp_64.o
+obj-$(CONFIG_X86_VSMP)          += vsmp_64.o
 obj-$(CONFIG_KPROBES)           += kprobes.o
 obj-$(CONFIG_MODULES)           += module_$(BITS).o
 obj-$(CONFIG_EFI)               += efi.o efi_$(BITS).o efi_stub_$(BITS).o
@@ -114,16 +111,13 @@ obj-$(CONFIG_SWIOTLB)			+= pci-swiotlb.o
 ###
 # 64 bit specific files
 ifeq ($(CONFIG_X86_64),y)
-        obj-y                           += genapic_64.o genapic_flat_64.o genx2apic_uv_x.o tlb_uv.o
-        obj-y                           += bios_uv.o uv_irq.o uv_sysfs.o
-        obj-y                           += genx2apic_cluster.o
-        obj-y                           += genx2apic_phys.o
-        obj-$(CONFIG_X86_PM_TIMER)      += pmtimer_64.o
-        obj-$(CONFIG_AUDIT)             += audit_64.o
-
-        obj-$(CONFIG_GART_IOMMU)        += pci-gart_64.o aperture_64.o
-        obj-$(CONFIG_CALGARY_IOMMU)     += pci-calgary_64.o tce_64.o
-        obj-$(CONFIG_AMD_IOMMU)         += amd_iommu_init.o amd_iommu.o
-
-        obj-$(CONFIG_PCI_MMCONFIG)      += mmconf-fam10h_64.o
+        obj-$(CONFIG_X86_UV)            += tlb_uv.o bios_uv.o uv_irq.o uv_sysfs.o
+        obj-$(CONFIG_X86_PM_TIMER)      += pmtimer_64.o
+        obj-$(CONFIG_AUDIT)             += audit_64.o
+
+        obj-$(CONFIG_GART_IOMMU)        += pci-gart_64.o aperture_64.o
+        obj-$(CONFIG_CALGARY_IOMMU)     += pci-calgary_64.o tce_64.o
+        obj-$(CONFIG_AMD_IOMMU)         += amd_iommu_init.o amd_iommu.o
+
+        obj-$(CONFIG_PCI_MMCONFIG)      += mmconf-fam10h_64.o
 endif
diff --git a/arch/x86/kernel/acpi/boot.c b/arch/x86/kernel/acpi/boot.c
index 7678f10c4568..a18eb7ce2236 100644
--- a/arch/x86/kernel/acpi/boot.c
+++ b/arch/x86/kernel/acpi/boot.c
@@ -37,15 +37,10 @@
 #include <asm/pgtable.h>
 #include <asm/io_apic.h>
 #include <asm/apic.h>
-#include <asm/genapic.h>
 #include <asm/io.h>
 #include <asm/mpspec.h>
 #include <asm/smp.h>
 
-#ifdef CONFIG_X86_LOCAL_APIC
-# include <mach_apic.h>
-#endif
-
 static int __initdata acpi_force = 0;
 u32 acpi_rsdt_forced;
 #ifdef  CONFIG_ACPI
@@ -56,16 +51,7 @@ int acpi_disabled = 1;
 EXPORT_SYMBOL(acpi_disabled);
 
 #ifdef  CONFIG_X86_64
-
-#include <asm/proto.h>
-
-#else                           /* X86 */
-
-#ifdef  CONFIG_X86_LOCAL_APIC
-#include <mach_apic.h>
-#include <mach_mpparse.h>
-#endif                          /* CONFIG_X86_LOCAL_APIC */
-
+# include <asm/proto.h>
 #endif                          /* X86 */
 
 #define BAD_MADT_ENTRY(entry, end) (                                        \
@@ -121,35 +107,18 @@ enum acpi_irq_model_id acpi_irq_model = ACPI_IRQ_MODEL_PIC;
  */
 char *__init __acpi_map_table(unsigned long phys, unsigned long size)
 {
-        unsigned long base, offset, mapped_size;
-        int idx;
 
         if (!phys || !size)
                 return NULL;
 
-        if (phys+size <= (max_low_pfn_mapped << PAGE_SHIFT))
-                return __va(phys);
-
-        offset = phys & (PAGE_SIZE - 1);
-        mapped_size = PAGE_SIZE - offset;
-        clear_fixmap(FIX_ACPI_END);
-        set_fixmap(FIX_ACPI_END, phys);
-        base = fix_to_virt(FIX_ACPI_END);
-
-        /*
-         * Most cases can be covered by the below.
-         */
-        idx = FIX_ACPI_END;
-        while (mapped_size < size) {
-                if (--idx < FIX_ACPI_BEGIN)
-                        return NULL;    /* cannot handle this */
-                phys += PAGE_SIZE;
-                clear_fixmap(idx);
-                set_fixmap(idx, phys);
-                mapped_size += PAGE_SIZE;
-        }
+        return early_ioremap(phys, size);
+}
+void __init __acpi_unmap_table(char *map, unsigned long size)
+{
+        if (!map || !size)
+                return;
 
-        return ((unsigned char *)base + offset);
+        early_iounmap(map, size);
 }
 
 #ifdef CONFIG_PCI_MMCONFIG
@@ -239,7 +208,8 @@ static int __init acpi_parse_madt(struct acpi_table_header *table)
                        madt->address);
         }
 
-        acpi_madt_oem_check(madt->header.oem_id, madt->header.oem_table_id);
+        default_acpi_madt_oem_check(madt->header.oem_id,
+                                    madt->header.oem_table_id);
 
         return 0;
 }
@@ -884,7 +854,7 @@ static struct {
         DECLARE_BITMAP(pin_programmed, MP_MAX_IOAPIC_PIN + 1);
 } mp_ioapic_routing[MAX_IO_APICS];
 
-static int mp_find_ioapic(int gsi)
+int mp_find_ioapic(int gsi)
 {
         int i = 0;
 
@@ -899,6 +869,16 @@ static int mp_find_ioapic(int gsi)
         return -1;
 }
 
+int mp_find_ioapic_pin(int ioapic, int gsi)
+{
+        if (WARN_ON(ioapic == -1))
+                return -1;
+        if (WARN_ON(gsi > mp_ioapic_routing[ioapic].gsi_end))
+                return -1;
+
+        return gsi - mp_ioapic_routing[ioapic].gsi_base;
+}
+
 static u8 __init uniq_ioapic_id(u8 id)
 {
 #ifdef CONFIG_X86_32
@@ -912,8 +892,8 @@ static u8 __init uniq_ioapic_id(u8 id)
         DECLARE_BITMAP(used, 256);
         bitmap_zero(used, 256);
         for (i = 0; i < nr_ioapics; i++) {
-                struct mp_config_ioapic *ia = &mp_ioapics[i];
-                __set_bit(ia->mp_apicid, used);
+                struct mpc_ioapic *ia = &mp_ioapics[i];
+                __set_bit(ia->apicid, used);
         }
         if (!test_bit(id, used))
                 return id;
@@ -945,29 +925,29 @@ void __init mp_register_ioapic(int id, u32 address, u32 gsi_base)
 
         idx = nr_ioapics;
 
-        mp_ioapics[idx].mp_type = MP_IOAPIC;
-        mp_ioapics[idx].mp_flags = MPC_APIC_USABLE;
-        mp_ioapics[idx].mp_apicaddr = address;
+        mp_ioapics[idx].type = MP_IOAPIC;
+        mp_ioapics[idx].flags = MPC_APIC_USABLE;
+        mp_ioapics[idx].apicaddr = address;
 
         set_fixmap_nocache(FIX_IO_APIC_BASE_0 + idx, address);
-        mp_ioapics[idx].mp_apicid = uniq_ioapic_id(id);
+        mp_ioapics[idx].apicid = uniq_ioapic_id(id);
 #ifdef CONFIG_X86_32
-        mp_ioapics[idx].mp_apicver = io_apic_get_version(idx);
+        mp_ioapics[idx].apicver = io_apic_get_version(idx);
 #else
-        mp_ioapics[idx].mp_apicver = 0;
+        mp_ioapics[idx].apicver = 0;
 #endif
         /*
          * Build basic GSI lookup table to facilitate gsi->io_apic lookups
          * and to prevent reprogramming of IOAPIC pins (PCI GSIs).
          */
-        mp_ioapic_routing[idx].apic_id = mp_ioapics[idx].mp_apicid;
+        mp_ioapic_routing[idx].apic_id = mp_ioapics[idx].apicid;
         mp_ioapic_routing[idx].gsi_base = gsi_base;
         mp_ioapic_routing[idx].gsi_end = gsi_base +
             io_apic_get_redir_entries(idx);
 
-        printk(KERN_INFO "IOAPIC[%d]: apic_id %d, version %d, address 0x%lx, "
-               "GSI %d-%d\n", idx, mp_ioapics[idx].mp_apicid,
-               mp_ioapics[idx].mp_apicver, mp_ioapics[idx].mp_apicaddr,
+        printk(KERN_INFO "IOAPIC[%d]: apic_id %d, version %d, address 0x%x, "
+               "GSI %d-%d\n", idx, mp_ioapics[idx].apicid,
+               mp_ioapics[idx].apicver, mp_ioapics[idx].apicaddr,
                mp_ioapic_routing[idx].gsi_base, mp_ioapic_routing[idx].gsi_end);
 
         nr_ioapics++;
@@ -996,19 +976,19 @@ int __init acpi_probe_gsi(void)
         return max_gsi + 1;
 }
 
-static void assign_to_mp_irq(struct mp_config_intsrc *m,
-                                    struct mp_config_intsrc *mp_irq)
+static void assign_to_mp_irq(struct mpc_intsrc *m,
+                                    struct mpc_intsrc *mp_irq)
 {
-        memcpy(mp_irq, m, sizeof(struct mp_config_intsrc));
+        memcpy(mp_irq, m, sizeof(struct mpc_intsrc));
 }
 
-static int mp_irq_cmp(struct mp_config_intsrc *mp_irq,
-                                struct mp_config_intsrc *m)
+static int mp_irq_cmp(struct mpc_intsrc *mp_irq,
+                                struct mpc_intsrc *m)
 {
-        return memcmp(mp_irq, m, sizeof(struct mp_config_intsrc));
+        return memcmp(mp_irq, m, sizeof(struct mpc_intsrc));
 }
 
-static void save_mp_irq(struct mp_config_intsrc *m)
+static void save_mp_irq(struct mpc_intsrc *m)
 {
         int i;
 
@@ -1026,7 +1006,7 @@ void __init mp_override_legacy_irq(u8 bus_irq, u8 polarity, u8 trigger, u32 gsi)
 {
         int ioapic;
         int pin;
-        struct mp_config_intsrc mp_irq;
+        struct mpc_intsrc mp_irq;
 
         /*
          * Convert 'gsi' to 'ioapic.pin'.
@@ -1034,7 +1014,7 @@ void __init mp_override_legacy_irq(u8 bus_irq, u8 polarity, u8 trigger, u32 gsi)
         ioapic = mp_find_ioapic(gsi);
         if (ioapic < 0)
                 return;
-        pin = gsi - mp_ioapic_routing[ioapic].gsi_base;
+        pin = mp_find_ioapic_pin(ioapic, gsi);
 
         /*
          * TBD: This check is for faulty timer entries, where the override
@@ -1044,13 +1024,13 @@ void __init mp_override_legacy_irq(u8 bus_irq, u8 polarity, u8 trigger, u32 gsi)
         if ((bus_irq == 0) && (trigger == 3))
                 trigger = 1;
 
-        mp_irq.mp_type = MP_INTSRC;
-        mp_irq.mp_irqtype = mp_INT;
-        mp_irq.mp_irqflag = (trigger << 2) | polarity;
-        mp_irq.mp_srcbus = MP_ISA_BUS;
-        mp_irq.mp_srcbusirq = bus_irq;  /* IRQ */
-        mp_irq.mp_dstapic = mp_ioapics[ioapic].mp_apicid; /* APIC ID */
-        mp_irq.mp_dstirq = pin; /* INTIN# */
+        mp_irq.type = MP_INTSRC;
+        mp_irq.irqtype = mp_INT;
+        mp_irq.irqflag = (trigger << 2) | polarity;
+        mp_irq.srcbus = MP_ISA_BUS;
+        mp_irq.srcbusirq = bus_irq;     /* IRQ */
+        mp_irq.dstapic = mp_ioapics[ioapic].apicid; /* APIC ID */
+        mp_irq.dstirq = pin;    /* INTIN# */
 
         save_mp_irq(&mp_irq);
 }
@@ -1060,7 +1040,7 @@ void __init mp_config_acpi_legacy_irqs(void)
         int i;
         int ioapic;
         unsigned int dstapic;
-        struct mp_config_intsrc mp_irq;
+        struct mpc_intsrc mp_irq;
 
 #if defined (CONFIG_MCA) || defined (CONFIG_EISA)
         /*
@@ -1085,7 +1065,7 @@ void __init mp_config_acpi_legacy_irqs(void)
         ioapic = mp_find_ioapic(0);
         if (ioapic < 0)
                 return;
-        dstapic = mp_ioapics[ioapic].mp_apicid;
+        dstapic = mp_ioapics[ioapic].apicid;
 
         /*
          * Use the default configuration for the IRQs 0-15.  Unless
@@ -1095,16 +1075,14 @@ void __init mp_config_acpi_legacy_irqs(void)
                 int idx;
 
                 for (idx = 0; idx < mp_irq_entries; idx++) {
-                        struct mp_config_intsrc *irq = mp_irqs + idx;
+                        struct mpc_intsrc *irq = mp_irqs + idx;
 
                         /* Do we already have a mapping for this ISA IRQ? */
-                        if (irq->mp_srcbus == MP_ISA_BUS
-                            && irq->mp_srcbusirq == i)
+                        if (irq->srcbus == MP_ISA_BUS && irq->srcbusirq == i)
                                 break;
 
                         /* Do we already have a mapping for this IOAPIC pin */
-                        if (irq->mp_dstapic == dstapic &&
-                            irq->mp_dstirq == i)
+                        if (irq->dstapic == dstapic && irq->dstirq == i)
                                 break;
                 }
 
@@ -1113,13 +1091,13 @@ void __init mp_config_acpi_legacy_irqs(void)
                         continue;       /* IRQ already used */
                 }
 
-                mp_irq.mp_type = MP_INTSRC;
-                mp_irq.mp_irqflag = 0;  /* Conforming */
-                mp_irq.mp_srcbus = MP_ISA_BUS;
-                mp_irq.mp_dstapic = dstapic;
-                mp_irq.mp_irqtype = mp_INT;
-                mp_irq.mp_srcbusirq = i; /* Identity mapped */
-                mp_irq.mp_dstirq = i;
+                mp_irq.type = MP_INTSRC;
+                mp_irq.irqflag = 0;     /* Conforming */
+                mp_irq.srcbus = MP_ISA_BUS;
+                mp_irq.dstapic = dstapic;
+                mp_irq.irqtype = mp_INT;
+                mp_irq.srcbusirq = i; /* Identity mapped */
+                mp_irq.dstirq = i;
 
                 save_mp_irq(&mp_irq);
         }
@@ -1156,7 +1134,7 @@ int mp_register_gsi(u32 gsi, int triggering, int polarity)
                 return gsi;
         }
 
-        ioapic_pin = gsi - mp_ioapic_routing[ioapic].gsi_base;
+        ioapic_pin = mp_find_ioapic_pin(ioapic, gsi);
 
 #ifdef CONFIG_X86_32
         if (ioapic_renumber_irq)
@@ -1230,22 +1208,22 @@ int mp_config_acpi_gsi(unsigned char number, unsigned int devfn, u8 pin,
                         u32 gsi, int triggering, int polarity)
 {
 #ifdef CONFIG_X86_MPPARSE
-        struct mp_config_intsrc mp_irq;
+        struct mpc_intsrc mp_irq;
         int ioapic;
 
         if (!acpi_ioapic)
                 return 0;
 
         /* print the entry should happen on mptable identically */
-        mp_irq.mp_type = MP_INTSRC;
-        mp_irq.mp_irqtype = mp_INT;
-        mp_irq.mp_irqflag = (triggering == ACPI_EDGE_SENSITIVE ? 4 : 0x0c) |
+        mp_irq.type = MP_INTSRC;
+        mp_irq.irqtype = mp_INT;
+        mp_irq.irqflag = (triggering == ACPI_EDGE_SENSITIVE ? 4 : 0x0c) |
                                 (polarity == ACPI_ACTIVE_HIGH ? 1 : 3);
-        mp_irq.mp_srcbus = number;
-        mp_irq.mp_srcbusirq = (((devfn >> 3) & 0x1f) << 2) | ((pin - 1) & 3);
+        mp_irq.srcbus = number;
+        mp_irq.srcbusirq = (((devfn >> 3) & 0x1f) << 2) | ((pin - 1) & 3);
         ioapic = mp_find_ioapic(gsi);
-        mp_irq.mp_dstapic = mp_ioapic_routing[ioapic].apic_id;
-        mp_irq.mp_dstirq = gsi - mp_ioapic_routing[ioapic].gsi_base;
+        mp_irq.dstapic = mp_ioapic_routing[ioapic].apic_id;
+        mp_irq.dstirq = mp_find_ioapic_pin(ioapic, gsi);
 
         save_mp_irq(&mp_irq);
 #endif
@@ -1372,7 +1350,7 @@ static void __init acpi_process_madt(void)
                 if (!error) {
                         acpi_lapic = 1;
 
-#ifdef CONFIG_X86_GENERICARCH
+#ifdef CONFIG_X86_BIGSMP
                         generic_bigsmp_probe();
 #endif
                         /*
@@ -1384,9 +1362,8 @@ static void __init acpi_process_madt(void)
                                 acpi_ioapic = 1;
 
                                 smp_found_config = 1;
-#ifdef CONFIG_X86_32
-                                setup_apic_routing();
-#endif
+                                if (apic->setup_apic_routing)
+                                        apic->setup_apic_routing();
                         }
                 }
                 if (error == -EINVAL) {
diff --git a/arch/x86/kernel/acpi/realmode/wakeup.S b/arch/x86/kernel/acpi/realmode/wakeup.S
index 3355973b12ac..580b4e296010 100644
--- a/arch/x86/kernel/acpi/realmode/wakeup.S
+++ b/arch/x86/kernel/acpi/realmode/wakeup.S
@@ -3,8 +3,8 @@
  */
 #include <asm/segment.h>
 #include <asm/msr-index.h>
-#include <asm/page.h>
-#include <asm/pgtable.h>
+#include <asm/page_types.h>
+#include <asm/pgtable_types.h>
 #include <asm/processor-flags.h>
 
         .code16
diff --git a/arch/x86/kernel/acpi/sleep.c b/arch/x86/kernel/acpi/sleep.c
index a60c1f3bcb87..7c243a2c5115 100644
--- a/arch/x86/kernel/acpi/sleep.c
+++ b/arch/x86/kernel/acpi/sleep.c
@@ -101,6 +101,7 @@ int acpi_save_state_mem(void)
         stack_start.sp = temp_stack + sizeof(temp_stack);
         early_gdt_descr.address =
                         (unsigned long)get_cpu_gdt_table(smp_processor_id());
+        initial_gs = per_cpu_offset(smp_processor_id());
 #endif
         initial_code = (unsigned long)wakeup_long64;
         saved_magic = 0x123456789abcdef0;
diff --git a/arch/x86/kernel/acpi/wakeup_32.S b/arch/x86/kernel/acpi/wakeup_32.S
index a12e6a9fb659..8ded418b0593 100644
--- a/arch/x86/kernel/acpi/wakeup_32.S
+++ b/arch/x86/kernel/acpi/wakeup_32.S
@@ -1,7 +1,7 @@
         .section .text.page_aligned
 #include <linux/linkage.h>
 #include <asm/segment.h>
-#include <asm/page.h>
+#include <asm/page_types.h>
 
 # Copyright 2003, 2008 Pavel Machek <pavel@suse.cz>, distribute under GPLv2
 
diff --git a/arch/x86/kernel/acpi/wakeup_64.S b/arch/x86/kernel/acpi/wakeup_64.S
index 96258d9dc974..8ea5164cbd04 100644
--- a/arch/x86/kernel/acpi/wakeup_64.S
+++ b/arch/x86/kernel/acpi/wakeup_64.S
@@ -1,8 +1,8 @@
 .text
 #include <linux/linkage.h>
 #include <asm/segment.h>
-#include <asm/pgtable.h>
-#include <asm/page.h>
+#include <asm/pgtable_types.h>
+#include <asm/page_types.h>
 #include <asm/msr.h>
 #include <asm/asm-offsets.h>
 
diff --git a/arch/x86/kernel/alternative.c b/arch/x86/kernel/alternative.c
index a84ac7b570e6..6907b8e85d52 100644
--- a/arch/x86/kernel/alternative.c
+++ b/arch/x86/kernel/alternative.c
@@ -498,12 +498,12 @@ void *text_poke_early(void *addr, const void *opcode, size_t len)
  */
 void *__kprobes text_poke(void *addr, const void *opcode, size_t len)
 {
-        unsigned long flags;
         char *vaddr;
         int nr_pages = 2;
         struct page *pages[2];
         int i;
 
+        might_sleep();
         if (!core_kernel_text((unsigned long)addr)) {
                 pages[0] = vmalloc_to_page(addr);
                 pages[1] = vmalloc_to_page(addr + PAGE_SIZE);
@@ -517,9 +517,9 @@ void *__kprobes text_poke(void *addr, const void *opcode, size_t len)
                 nr_pages = 1;
         vaddr = vmap(pages, nr_pages, VM_MAP, PAGE_KERNEL);
         BUG_ON(!vaddr);
-        local_irq_save(flags);
+        local_irq_disable();
         memcpy(&vaddr[(unsigned long)addr & ~PAGE_MASK], opcode, len);
-        local_irq_restore(flags);
+        local_irq_enable();
         vunmap(vaddr);
         sync_core();
         /* Could also do a CLFLUSH here to speed up CPU recovery; but
diff --git a/arch/x86/kernel/apic/Makefile b/arch/x86/kernel/apic/Makefile
new file mode 100644
index 000000000000..da7b7b9f8bd8
--- /dev/null
+++ b/arch/x86/kernel/apic/Makefile
@@ -0,0 +1,19 @@
+#
+# Makefile for local APIC drivers and for the IO-APIC code
+#
+
+obj-$(CONFIG_X86_LOCAL_APIC)    += apic.o probe_$(BITS).o ipi.o nmi.o
+obj-$(CONFIG_X86_IO_APIC)       += io_apic.o
+obj-$(CONFIG_SMP)               += ipi.o
+
+ifeq ($(CONFIG_X86_64),y)
+obj-y                           += apic_flat_64.o
+obj-$(CONFIG_X86_X2APIC)        += x2apic_cluster.o
+obj-$(CONFIG_X86_X2APIC)        += x2apic_phys.o
+obj-$(CONFIG_X86_UV)            += x2apic_uv_x.o
+endif
+
+obj-$(CONFIG_X86_BIGSMP)        += bigsmp_32.o
+obj-$(CONFIG_X86_NUMAQ)         += numaq_32.o
+obj-$(CONFIG_X86_ES7000)        += es7000_32.o
+obj-$(CONFIG_X86_SUMMIT)        += summit_32.o
diff --git a/arch/x86/kernel/apic.c b/arch/x86/kernel/apic/apic.c
index 570f36e44e59..f9cecdfd05c5 100644
--- a/arch/x86/kernel/apic.c
+++ b/arch/x86/kernel/apic/apic.c
@@ -1,7 +1,7 @@
 /*
  *      Local APIC handling, local APIC timers
  *
- *      (c) 1999, 2000 Ingo Molnar <mingo@redhat.com>
+ *      (c) 1999, 2000, 2009 Ingo Molnar <mingo@redhat.com>
  *
  *      Fixes
  *      Maciej W. Rozycki       :       Bits for genuine 82489DX APICs;
@@ -14,51 +14,69 @@
  *      Mikael Pettersson       :       PM converted to driver model.
  */
 
-#include <linux/init.h>
-
-#include <linux/mm.h>
-#include <linux/delay.h>
-#include <linux/bootmem.h>
-#include <linux/interrupt.h>
-#include <linux/mc146818rtc.h>
 #include <linux/kernel_stat.h>
-#include <linux/sysdev.h>
-#include <linux/ioport.h>
-#include <linux/cpu.h>
-#include <linux/clockchips.h>
+#include <linux/mc146818rtc.h>
 #include <linux/acpi_pmtmr.h>
+#include <linux/clockchips.h>
+#include <linux/interrupt.h>
+#include <linux/bootmem.h>
+#include <linux/ftrace.h>
+#include <linux/ioport.h>
 #include <linux/module.h>
-#include <linux/dmi.h>
+#include <linux/sysdev.h>
+#include <linux/delay.h>
+#include <linux/timex.h>
 #include <linux/dmar.h>
-#include <linux/ftrace.h>
-#include <linux/smp.h>
+#include <linux/init.h>
+#include <linux/cpu.h>
+#include <linux/dmi.h>
 #include <linux/nmi.h>
-#include <linux/timex.h>
+#include <linux/smp.h>
+#include <linux/mm.h>
 
+#include <asm/pgalloc.h>
 #include <asm/atomic.h>
-#include <asm/mtrr.h>
 #include <asm/mpspec.h>
-#include <asm/desc.h>
-#include <asm/arch_hooks.h>
-#include <asm/hpet.h>
-#include <asm/pgalloc.h>
 #include <asm/i8253.h>
-#include <asm/idle.h>
+#include <asm/i8259.h>
 #include <asm/proto.h>
 #include <asm/apic.h>
-#include <asm/i8259.h>
+#include <asm/desc.h>
+#include <asm/hpet.h>
+#include <asm/idle.h>
+#include <asm/mtrr.h>
 #include <asm/smp.h>
 
-#include <mach_apic.h>
-#include <mach_apicdef.h>
-#include <mach_ipi.h>
+unsigned int num_processors;
+
+unsigned disabled_cpus __cpuinitdata;
+
+/* Processor that is doing the boot up */
+unsigned int boot_cpu_physical_apicid = -1U;
 
 /*
- * Sanity check
+ * The highest APIC ID seen during enumeration.
+ *
+ * This determines the messaging protocol we can use: if all APIC IDs
+ * are in the 0 ... 7 range, then we can use logical addressing which
+ * has some performance advantages (better broadcasting).
+ *
+ * If there's an APIC ID above 8, we use physical addressing.
  */
-#if ((SPURIOUS_APIC_VECTOR & 0x0F) != 0x0F)
-# error SPURIOUS_APIC_VECTOR definition error
-#endif
+unsigned int max_physical_apicid;
+
+/*
+ * Bitmask of physically existing CPUs:
+ */
+physid_mask_t phys_cpu_present_map;
+
+/*
+ * Map cpu index to physical APIC ID
+ */
+DEFINE_EARLY_PER_CPU(u16, x86_cpu_to_apicid, BAD_APICID);
+DEFINE_EARLY_PER_CPU(u16, x86_bios_cpu_apicid, BAD_APICID);
+EXPORT_EARLY_PER_CPU_SYMBOL(x86_cpu_to_apicid);
+EXPORT_EARLY_PER_CPU_SYMBOL(x86_bios_cpu_apicid);
 
 #ifdef CONFIG_X86_32
 /*
@@ -92,11 +110,7 @@ static __init int setup_apicpmtimer(char *s)
 __setup("apicpmtimer", setup_apicpmtimer);
 #endif
 
-#ifdef CONFIG_X86_64
-#define HAVE_X2APIC
-#endif
-
-#ifdef HAVE_X2APIC
+#ifdef CONFIG_X86_X2APIC
 int x2apic;
 /* x2apic enabled before OS handover */
 static int x2apic_preenabled;
@@ -194,18 +208,13 @@ static int modern_apic(void)
         return lapic_get_version() >= 0x14;
 }
 
-/*
- * Paravirt kernels also might be using these below ops. So we still
- * use generic apic_read()/apic_write(), which might be pointing to different
- * ops in PARAVIRT case.
- */
-void xapic_wait_icr_idle(void)
+void native_apic_wait_icr_idle(void)
 {
         while (apic_read(APIC_ICR) & APIC_ICR_BUSY)
                 cpu_relax();
 }
 
-u32 safe_xapic_wait_icr_idle(void)
+u32 native_safe_apic_wait_icr_idle(void)
 {
         u32 send_status;
         int timeout;
@@ -221,13 +230,13 @@ u32 safe_xapic_wait_icr_idle(void)
         return send_status;
 }
 
-void xapic_icr_write(u32 low, u32 id)
+void native_apic_icr_write(u32 low, u32 id)
 {
         apic_write(APIC_ICR2, SET_APIC_DEST_FIELD(id));
         apic_write(APIC_ICR, low);
 }
 
-static u64 xapic_icr_read(void)
+u64 native_apic_icr_read(void)
 {
         u32 icr1, icr2;
 
@@ -237,54 +246,6 @@ static u64 xapic_icr_read(void)
         return icr1 | ((u64)icr2 << 32);
 }
 
-static struct apic_ops xapic_ops = {
-        .read = native_apic_mem_read,
-        .write = native_apic_mem_write,
-        .icr_read = xapic_icr_read,
-        .icr_write = xapic_icr_write,
-        .wait_icr_idle = xapic_wait_icr_idle,
-        .safe_wait_icr_idle = safe_xapic_wait_icr_idle,
-};
-
-struct apic_ops __read_mostly *apic_ops = &xapic_ops;
-EXPORT_SYMBOL_GPL(apic_ops);
-
-#ifdef HAVE_X2APIC
-static void x2apic_wait_icr_idle(void)
-{
-        /* no need to wait for icr idle in x2apic */
-        return;
-}
-
-static u32 safe_x2apic_wait_icr_idle(void)
-{
-        /* no need to wait for icr idle in x2apic */
-        return 0;
-}
-
-void x2apic_icr_write(u32 low, u32 id)
-{
-        wrmsrl(APIC_BASE_MSR + (APIC_ICR >> 4), ((__u64) id) << 32 | low);
-}
-
-static u64 x2apic_icr_read(void)
-{
-        unsigned long val;
-
-        rdmsrl(APIC_BASE_MSR + (APIC_ICR >> 4), val);
-        return val;
-}
-
-static struct apic_ops x2apic_ops = {
-        .read = native_apic_msr_read,
-        .write = native_apic_msr_write,
-        .icr_read = x2apic_icr_read,
-        .icr_write = x2apic_icr_write,
-        .wait_icr_idle = x2apic_wait_icr_idle,
-        .safe_wait_icr_idle = safe_x2apic_wait_icr_idle,
-};
-#endif
-
 /**
  * enable_NMI_through_LVT0 - enable NMI through local vector table 0
  */
@@ -457,7 +418,7 @@ static void lapic_timer_setup(enum clock_event_mode mode,
 static void lapic_timer_broadcast(const struct cpumask *mask)
 {
 #ifdef CONFIG_SMP
-        send_IPI_mask(mask, LOCAL_TIMER_VECTOR);
+        apic->send_IPI_mask(mask, LOCAL_TIMER_VECTOR);
 #endif
 }
 
@@ -535,7 +496,8 @@ static void __init lapic_cal_handler(struct clock_event_device *dev)
         }
 }
 
-static int __init calibrate_by_pmtimer(long deltapm, long *delta)
+static int __init
+calibrate_by_pmtimer(long deltapm, long *delta, long *deltatsc)
 {
         const long pm_100ms = PMTMR_TICKS_PER_SEC / 10;
         const long pm_thresh = pm_100ms / 100;
@@ -546,7 +508,7 @@ static int __init calibrate_by_pmtimer(long deltapm, long *delta)
         return -1;
 #endif
 
-        apic_printk(APIC_VERBOSE, "... PM timer delta = %ld\n", deltapm);
+        apic_printk(APIC_VERBOSE, "... PM-Timer delta = %ld\n", deltapm);
 
         /* Check, if the PM timer is available */
         if (!deltapm)
@@ -556,19 +518,30 @@ static int __init calibrate_by_pmtimer(long deltapm, long *delta)
 
         if (deltapm > (pm_100ms - pm_thresh) &&
             deltapm < (pm_100ms + pm_thresh)) {
-                apic_printk(APIC_VERBOSE, "... PM timer result ok\n");
-        } else {
-                res = (((u64)deltapm) *  mult) >> 22;
-                do_div(res, 1000000);
-                pr_warning("APIC calibration not consistent "
-                        "with PM Timer: %ldms instead of 100ms\n",
-                        (long)res);
-                /* Correct the lapic counter value */
-                res = (((u64)(*delta)) * pm_100ms);
+                apic_printk(APIC_VERBOSE, "... PM-Timer result ok\n");
+                return 0;
+        }
+
+        res = (((u64)deltapm) *  mult) >> 22;
+        do_div(res, 1000000);
+        pr_warning("APIC calibration not consistent "
+                   "with PM-Timer: %ldms instead of 100ms\n",(long)res);
+
+        /* Correct the lapic counter value */
+        res = (((u64)(*delta)) * pm_100ms);
+        do_div(res, deltapm);
+        pr_info("APIC delta adjusted to PM-Timer: "
+                "%lu (%ld)\n", (unsigned long)res, *delta);
+        *delta = (long)res;
+
+        /* Correct the tsc counter value */
+        if (cpu_has_tsc) {
+                res = (((u64)(*deltatsc)) * pm_100ms);
                 do_div(res, deltapm);
-                pr_info("APIC delta adjusted to PM-Timer: "
-                        "%lu (%ld)\n", (unsigned long)res, *delta);
-                *delta = (long)res;
+                apic_printk(APIC_VERBOSE, "TSC delta adjusted to "
+                                          "PM-Timer: %lu (%ld) \n",
+                                        (unsigned long)res, *deltatsc);
+                *deltatsc = (long)res;
         }
 
         return 0;
@@ -579,7 +552,7 @@ static int __init calibrate_APIC_clock(void)
         struct clock_event_device *levt = &__get_cpu_var(lapic_events);
         void (*real_handler)(struct clock_event_device *dev);
         unsigned long deltaj;
-        long delta;
+        long delta, deltatsc;
         int pm_referenced = 0;
 
         local_irq_disable();
@@ -609,9 +582,11 @@ static int __init calibrate_APIC_clock(void)
         delta = lapic_cal_t1 - lapic_cal_t2;
         apic_printk(APIC_VERBOSE, "... lapic delta = %ld\n", delta);
 
+        deltatsc = (long)(lapic_cal_tsc2 - lapic_cal_tsc1);
+
         /* we trust the PM based calibration if possible */
         pm_referenced = !calibrate_by_pmtimer(lapic_cal_pm2 - lapic_cal_pm1,
-                                        &delta);
+                                        &delta, &deltatsc);
 
         /* Calculate the scaled math multiplication factor */
         lapic_clockevent.mult = div_sc(delta, TICK_NSEC * LAPIC_CAL_LOOPS,
@@ -629,11 +604,10 @@ static int __init calibrate_APIC_clock(void)
                     calibration_result);
 
         if (cpu_has_tsc) {
-                delta = (long)(lapic_cal_tsc2 - lapic_cal_tsc1);
                 apic_printk(APIC_VERBOSE, "..... CPU clock speed is "
                             "%ld.%04ld MHz.\n",
-                            (delta / LAPIC_CAL_LOOPS) / (1000000 / HZ),
-                            (delta / LAPIC_CAL_LOOPS) % (1000000 / HZ));
+                            (deltatsc / LAPIC_CAL_LOOPS) / (1000000 / HZ),
+                            (deltatsc / LAPIC_CAL_LOOPS) % (1000000 / HZ));
         }
 
         apic_printk(APIC_VERBOSE, "..... host bus clock speed is "
@@ -991,11 +965,11 @@ int __init verify_local_APIC(void)
          */
         reg0 = apic_read(APIC_ID);
         apic_printk(APIC_DEBUG, "Getting ID: %x\n", reg0);
-        apic_write(APIC_ID, reg0 ^ APIC_ID_MASK);
+        apic_write(APIC_ID, reg0 ^ apic->apic_id_mask);
         reg1 = apic_read(APIC_ID);
         apic_printk(APIC_DEBUG, "Getting ID: %x\n", reg1);
         apic_write(APIC_ID, reg0);
-        if (reg1 != (reg0 ^ APIC_ID_MASK))
+        if (reg1 != (reg0 ^ apic->apic_id_mask))
                 return 0;
 
         /*
@@ -1089,7 +1063,7 @@ static void __cpuinit lapic_setup_esr(void)
                 return;
         }
 
-        if (esr_disable) {
+        if (apic->disable_esr) {
                 /*
                  * Something untraceable is creating bad interrupts on
                  * secondary quads ... for the moment, just leave the
@@ -1130,9 +1104,14 @@ void __cpuinit setup_local_APIC(void)
         unsigned int value;
         int i, j;
 
+        if (disable_apic) {
+                arch_disable_smp_support();
+                return;
+        }
+
 #ifdef CONFIG_X86_32
         /* Pound the ESR really hard over the head with a big hammer - mbligh */
-        if (lapic_is_integrated() && esr_disable) {
+        if (lapic_is_integrated() && apic->disable_esr) {
                 apic_write(APIC_ESR, 0);
                 apic_write(APIC_ESR, 0);
                 apic_write(APIC_ESR, 0);
@@ -1146,7 +1125,7 @@ void __cpuinit setup_local_APIC(void)
          * Double-check whether this APIC is really registered.
          * This is meaningless in clustered apic mode, so we skip it.
          */
-        if (!apic_id_registered())
+        if (!apic->apic_id_registered())
                 BUG();
 
         /*
@@ -1154,7 +1133,7 @@ void __cpuinit setup_local_APIC(void)
          * an APIC.  See e.g. "AP-388 82489DX User's Manual" (Intel
          * document number 292116).  So here it goes...
          */
-        init_apic_ldr();
+        apic->init_apic_ldr();
 
         /*
          * Set Task Priority to 'accept all'. We never change this
@@ -1282,17 +1261,12 @@ void __cpuinit end_local_APIC_setup(void)
         apic_pm_activate();
 }
 
-#ifdef HAVE_X2APIC
+#ifdef CONFIG_X86_X2APIC
 void check_x2apic(void)
 {
-        int msr, msr2;
-
-        rdmsr(MSR_IA32_APICBASE, msr, msr2);
-
-        if (msr & X2APIC_ENABLE) {
+        if (x2apic_enabled()) {
                 pr_info("x2apic enabled by BIOS, switching to x2apic ops\n");
                 x2apic_preenabled = x2apic = 1;
-                apic_ops = &x2apic_ops;
         }
 }
 
@@ -1300,6 +1274,9 @@ void enable_x2apic(void)
 {
         int msr, msr2;
 
+        if (!x2apic)
+                return;
+
         rdmsr(MSR_IA32_APICBASE, msr, msr2);
         if (!(msr & X2APIC_ENABLE)) {
                 pr_info("Enabling x2apic\n");
@@ -1363,7 +1340,6 @@ void __init enable_IR_x2apic(void)
 
         if (!x2apic) {
                 x2apic = 1;
-                apic_ops = &x2apic_ops;
                 enable_x2apic();
         }
 
@@ -1401,7 +1377,7 @@ end:
 
         return;
 }
-#endif /* HAVE_X2APIC */
+#endif /* CONFIG_X86_X2APIC */
 
 #ifdef CONFIG_X86_64
 /*
@@ -1532,7 +1508,7 @@ void __init early_init_lapic_mapping(void)
  */
 void __init init_apic_mappings(void)
 {
-#ifdef HAVE_X2APIC
+#ifdef CONFIG_X86_X2APIC
         if (x2apic) {
                 boot_cpu_physical_apicid = read_apic_id();
                 return;
@@ -1570,11 +1546,11 @@ int apic_version[MAX_APICS];
 
 int __init APIC_init_uniprocessor(void)
 {
-#ifdef CONFIG_X86_64
         if (disable_apic) {
                 pr_info("Apic disabled\n");
                 return -1;
         }
+#ifdef CONFIG_X86_64
         if (!cpu_has_apic) {
                 disable_apic = 1;
                 pr_info("Apic disabled by BIOS\n");
@@ -1596,11 +1572,9 @@ int __init APIC_init_uniprocessor(void)
         }
 #endif
 
-#ifdef HAVE_X2APIC
         enable_IR_x2apic();
-#endif
 #ifdef CONFIG_X86_64
-        setup_apic_routing();
+        default_setup_apic_routing();
 #endif
 
         verify_local_APIC();
@@ -1621,35 +1595,31 @@ int __init APIC_init_uniprocessor(void)
         physid_set_mask_of_physid(boot_cpu_physical_apicid, &phys_cpu_present_map);
         setup_local_APIC();
 
-#ifdef CONFIG_X86_64
+#ifdef CONFIG_X86_IO_APIC
         /*
          * Now enable IO-APICs, actually call clear_IO_APIC
-         * We need clear_IO_APIC before enabling vector on BP
+         * We need clear_IO_APIC before enabling error vector
          */
         if (!skip_ioapic_setup && nr_ioapics)
                 enable_IO_APIC();
 #endif
 
-#ifdef CONFIG_X86_IO_APIC
-        if (!smp_found_config || skip_ioapic_setup || !nr_ioapics)
-#endif
-                localise_nmi_watchdog();
         end_local_APIC_setup();
 
 #ifdef CONFIG_X86_IO_APIC
         if (smp_found_config && !skip_ioapic_setup && nr_ioapics)
                 setup_IO_APIC();
-# ifdef CONFIG_X86_64
-        else
+        else {
                 nr_ioapics = 0;
-# endif
+                localise_nmi_watchdog();
+        }
+#else
+        localise_nmi_watchdog();
 #endif
 
+        setup_boot_clock();
 #ifdef CONFIG_X86_64
-        setup_boot_APIC_clock();
         check_nmi_watchdog();
-#else
-        setup_boot_clock();
 #endif
 
         return 0;
@@ -1738,7 +1708,8 @@ void __init connect_bsp_APIC(void)
                 outb(0x01, 0x23);
         }
 #endif
-        enable_apic_mode();
+        if (apic->enable_apic_mode)
+                apic->enable_apic_mode();
 }
 
 /**
@@ -1876,29 +1847,39 @@ void __cpuinit generic_processor_info(int apicid, int version)
         }
 #endif
 
-#if defined(CONFIG_X86_SMP) || defined(CONFIG_X86_64)
-        /* are we being called early in kernel startup? */
-        if (early_per_cpu_ptr(x86_cpu_to_apicid)) {
-                u16 *cpu_to_apicid = early_per_cpu_ptr(x86_cpu_to_apicid);
-                u16 *bios_cpu_apicid = early_per_cpu_ptr(x86_bios_cpu_apicid);
-
-                cpu_to_apicid[cpu] = apicid;
-                bios_cpu_apicid[cpu] = apicid;
-        } else {
-                per_cpu(x86_cpu_to_apicid, cpu) = apicid;
-                per_cpu(x86_bios_cpu_apicid, cpu) = apicid;
-        }
+#if defined(CONFIG_SMP) || defined(CONFIG_X86_64)
+        early_per_cpu(x86_cpu_to_apicid, cpu) = apicid;
+        early_per_cpu(x86_bios_cpu_apicid, cpu) = apicid;
 #endif
 
         set_cpu_possible(cpu, true);
         set_cpu_present(cpu, true);
 }
 
-#ifdef CONFIG_X86_64
 int hard_smp_processor_id(void)
 {
         return read_apic_id();
 }
+
+void default_init_apic_ldr(void)
+{
+        unsigned long val;
+
+        apic_write(APIC_DFR, APIC_DFR_VALUE);
+        val = apic_read(APIC_LDR) & ~APIC_LDR_MASK;
+        val |= SET_APIC_LOGICAL_ID(1UL << smp_processor_id());
+        apic_write(APIC_LDR, val);
+}
+
+#ifdef CONFIG_X86_32
+int default_apicid_to_node(int logical_apicid)
+{
+#ifdef CONFIG_SMP
+        return apicid_2_node[hard_smp_processor_id()];
+#else
+        return 0;
+#endif
+}
 #endif
 
 /*
@@ -1976,7 +1957,7 @@ static int lapic_resume(struct sys_device *dev)
 
         local_irq_save(flags);
 
-#ifdef HAVE_X2APIC
+#ifdef CONFIG_X86_X2APIC
         if (x2apic)
                 enable_x2apic();
         else
diff --git a/arch/x86/kernel/genapic_flat_64.c b/arch/x86/kernel/apic/apic_flat_64.c
index 34185488e4fb..f933822dba18 100644
--- a/arch/x86/kernel/genapic_flat_64.c
+++ b/arch/x86/kernel/apic/apic_flat_64.c
@@ -17,9 +17,8 @@
 #include <linux/init.h>
 #include <linux/hardirq.h>
 #include <asm/smp.h>
+#include <asm/apic.h>
 #include <asm/ipi.h>
-#include <asm/genapic.h>
-#include <mach_apicdef.h>
 
 #ifdef CONFIG_ACPI
 #include <acpi/acpi_bus.h>
@@ -74,7 +73,7 @@ static inline void _flat_send_IPI_mask(unsigned long mask, int vector)
         unsigned long flags;
 
         local_irq_save(flags);
-        __send_IPI_dest_field(mask, vector, APIC_DEST_LOGICAL);
+        __default_send_IPI_dest_field(mask, vector, apic->dest_logical);
         local_irq_restore(flags);
 }
 
@@ -85,14 +84,15 @@ static void flat_send_IPI_mask(const struct cpumask *cpumask, int vector)
         _flat_send_IPI_mask(mask, vector);
 }
 
-static void flat_send_IPI_mask_allbutself(const struct cpumask *cpumask,
-                                          int vector)
+static void
+ flat_send_IPI_mask_allbutself(const struct cpumask *cpumask, int vector)
 {
         unsigned long mask = cpumask_bits(cpumask)[0];
         int cpu = smp_processor_id();
 
         if (cpu < BITS_PER_LONG)
                 clear_bit(cpu, &mask);
+
         _flat_send_IPI_mask(mask, vector);
 }
 
@@ -114,23 +114,27 @@ static void flat_send_IPI_allbutself(int vector)
                         _flat_send_IPI_mask(mask, vector);
                 }
         } else if (num_online_cpus() > 1) {
-                __send_IPI_shortcut(APIC_DEST_ALLBUT, vector,APIC_DEST_LOGICAL);
+                __default_send_IPI_shortcut(APIC_DEST_ALLBUT,
+                                            vector, apic->dest_logical);
         }
 }
 
 static void flat_send_IPI_all(int vector)
 {
-        if (vector == NMI_VECTOR)
+        if (vector == NMI_VECTOR) {
                 flat_send_IPI_mask(cpu_online_mask, vector);
-        else
-                __send_IPI_shortcut(APIC_DEST_ALLINC, vector, APIC_DEST_LOGICAL);
+        } else {
+                __default_send_IPI_shortcut(APIC_DEST_ALLINC,
+                                            vector, apic->dest_logical);
+        }
 }
 
-static unsigned int get_apic_id(unsigned long x)
+static unsigned int flat_get_apic_id(unsigned long x)
 {
         unsigned int id;
 
         id = (((x)>>24) & 0xFFu);
+
         return id;
 }
 
@@ -146,7 +150,7 @@ static unsigned int read_xapic_id(void)
 {
         unsigned int id;
 
-        id = get_apic_id(apic_read(APIC_ID));
+        id = flat_get_apic_id(apic_read(APIC_ID));
         return id;
 }
 
@@ -169,31 +173,67 @@ static unsigned int flat_cpu_mask_to_apicid_and(const struct cpumask *cpumask,
         return mask1 & mask2;
 }
 
-static unsigned int phys_pkg_id(int index_msb)
+static int flat_phys_pkg_id(int initial_apic_id, int index_msb)
 {
         return hard_smp_processor_id() >> index_msb;
 }
 
-struct genapic apic_flat =  {
-        .name = "flat",
-        .acpi_madt_oem_check = flat_acpi_madt_oem_check,
-        .int_delivery_mode = dest_LowestPrio,
-        .int_dest_mode = (APIC_DEST_LOGICAL != 0),
-        .target_cpus = flat_target_cpus,
-        .vector_allocation_domain = flat_vector_allocation_domain,
-        .apic_id_registered = flat_apic_id_registered,
-        .init_apic_ldr = flat_init_apic_ldr,
-        .send_IPI_all = flat_send_IPI_all,
-        .send_IPI_allbutself = flat_send_IPI_allbutself,
-        .send_IPI_mask = flat_send_IPI_mask,
-        .send_IPI_mask_allbutself = flat_send_IPI_mask_allbutself,
-        .send_IPI_self = apic_send_IPI_self,
-        .cpu_mask_to_apicid = flat_cpu_mask_to_apicid,
-        .cpu_mask_to_apicid_and = flat_cpu_mask_to_apicid_and,
-        .phys_pkg_id = phys_pkg_id,
-        .get_apic_id = get_apic_id,
-        .set_apic_id = set_apic_id,
-        .apic_id_mask = (0xFFu<<24),
+struct apic apic_flat =  {
+        .name                           = "flat",
+        .probe                          = NULL,
+        .acpi_madt_oem_check            = flat_acpi_madt_oem_check,
+        .apic_id_registered             = flat_apic_id_registered,
+
+        .irq_delivery_mode              = dest_LowestPrio,
+        .irq_dest_mode                  = 1, /* logical */
+
+        .target_cpus                    = flat_target_cpus,
+        .disable_esr                    = 0,
+        .dest_logical                   = APIC_DEST_LOGICAL,
+        .check_apicid_used              = NULL,
+        .check_apicid_present           = NULL,
+
+        .vector_allocation_domain       = flat_vector_allocation_domain,
+        .init_apic_ldr                  = flat_init_apic_ldr,
+
+        .ioapic_phys_id_map             = NULL,
+        .setup_apic_routing             = NULL,
+        .multi_timer_check              = NULL,
+        .apicid_to_node                 = NULL,
+        .cpu_to_logical_apicid          = NULL,
+        .cpu_present_to_apicid          = default_cpu_present_to_apicid,
+        .apicid_to_cpu_present          = NULL,
+        .setup_portio_remap             = NULL,
+        .check_phys_apicid_present      = default_check_phys_apicid_present,
+        .enable_apic_mode               = NULL,
+        .phys_pkg_id                    = flat_phys_pkg_id,
+        .mps_oem_check                  = NULL,
+
+        .get_apic_id                    = flat_get_apic_id,
+        .set_apic_id                    = set_apic_id,
+        .apic_id_mask                   = 0xFFu << 24,
+
+        .cpu_mask_to_apicid             = flat_cpu_mask_to_apicid,
+        .cpu_mask_to_apicid_and         = flat_cpu_mask_to_apicid_and,
+
+        .send_IPI_mask                  = flat_send_IPI_mask,
+        .send_IPI_mask_allbutself       = flat_send_IPI_mask_allbutself,
+        .send_IPI_allbutself            = flat_send_IPI_allbutself,
+        .send_IPI_all                   = flat_send_IPI_all,
+        .send_IPI_self                  = apic_send_IPI_self,
+
+        .trampoline_phys_low            = DEFAULT_TRAMPOLINE_PHYS_LOW,
+        .trampoline_phys_high           = DEFAULT_TRAMPOLINE_PHYS_HIGH,
+        .wait_for_init_deassert         = NULL,
+        .smp_callin_clear_local_apic    = NULL,
+        .inquire_remote_apic            = NULL,
+
+        .read                           = native_apic_mem_read,
+        .write                          = native_apic_mem_write,
+        .icr_read                       = native_apic_icr_read,
+        .icr_write                      = native_apic_icr_write,
+        .wait_icr_idle                  = native_apic_wait_icr_idle,
+        .safe_wait_icr_idle             = native_safe_apic_wait_icr_idle,
 };
 
 /*
@@ -232,18 +272,18 @@ static void physflat_vector_allocation_domain(int cpu, struct cpumask *retmask)
 
 static void physflat_send_IPI_mask(const struct cpumask *cpumask, int vector)
 {
-        send_IPI_mask_sequence(cpumask, vector);
+        default_send_IPI_mask_sequence_phys(cpumask, vector);
 }
 
 static void physflat_send_IPI_mask_allbutself(const struct cpumask *cpumask,
                                               int vector)
 {
-        send_IPI_mask_allbutself(cpumask, vector);
+        default_send_IPI_mask_allbutself_phys(cpumask, vector);
 }
 
 static void physflat_send_IPI_allbutself(int vector)
 {
-        send_IPI_mask_allbutself(cpu_online_mask, vector);
+        default_send_IPI_mask_allbutself_phys(cpu_online_mask, vector);
 }
 
 static void physflat_send_IPI_all(int vector)
@@ -276,32 +316,72 @@ physflat_cpu_mask_to_apicid_and(const struct cpumask *cpumask,
          * We're using fixed IRQ delivery, can only return one phys APIC ID.
          * May as well be the first.
          */
-        for_each_cpu_and(cpu, cpumask, andmask)
+        for_each_cpu_and(cpu, cpumask, andmask) {
                 if (cpumask_test_cpu(cpu, cpu_online_mask))
                         break;
+        }
         if (cpu < nr_cpu_ids)
                 return per_cpu(x86_cpu_to_apicid, cpu);
+
         return BAD_APICID;
 }
 
-struct genapic apic_physflat =  {
-        .name = "physical flat",
-        .acpi_madt_oem_check = physflat_acpi_madt_oem_check,
-        .int_delivery_mode = dest_Fixed,
-        .int_dest_mode = (APIC_DEST_PHYSICAL != 0),
-        .target_cpus = physflat_target_cpus,
-        .vector_allocation_domain = physflat_vector_allocation_domain,
-        .apic_id_registered = flat_apic_id_registered,
-        .init_apic_ldr = flat_init_apic_ldr,/*not needed, but shouldn't hurt*/
-        .send_IPI_all = physflat_send_IPI_all,
-        .send_IPI_allbutself = physflat_send_IPI_allbutself,
-        .send_IPI_mask = physflat_send_IPI_mask,
-        .send_IPI_mask_allbutself = physflat_send_IPI_mask_allbutself,
-        .send_IPI_self = apic_send_IPI_self,
-        .cpu_mask_to_apicid = physflat_cpu_mask_to_apicid,
-        .cpu_mask_to_apicid_and = physflat_cpu_mask_to_apicid_and,
-        .phys_pkg_id = phys_pkg_id,
-        .get_apic_id = get_apic_id,
-        .set_apic_id = set_apic_id,
-        .apic_id_mask = (0xFFu<<24),
+struct apic apic_physflat =  {
+
+        .name                           = "physical flat",
+        .probe                          = NULL,
+        .acpi_madt_oem_check            = physflat_acpi_madt_oem_check,
+        .apic_id_registered             = flat_apic_id_registered,
+
+        .irq_delivery_mode              = dest_Fixed,
+        .irq_dest_mode                  = 0, /* physical */
+
+        .target_cpus                    = physflat_target_cpus,
+        .disable_esr                    = 0,
+        .dest_logical                   = 0,
+        .check_apicid_used              = NULL,
+        .check_apicid_present           = NULL,
+
+        .vector_allocation_domain       = physflat_vector_allocation_domain,
+        /* not needed, but shouldn't hurt: */
+        .init_apic_ldr                  = flat_init_apic_ldr,
+
+        .ioapic_phys_id_map             = NULL,
+        .setup_apic_routing             = NULL,
+        .multi_timer_check              = NULL,
+        .apicid_to_node                 = NULL,
+        .cpu_to_logical_apicid          = NULL,
+        .cpu_present_to_apicid          = default_cpu_present_to_apicid,
+        .apicid_to_cpu_present          = NULL,
+        .setup_portio_remap             = NULL,
+        .check_phys_apicid_present      = default_check_phys_apicid_present,
+        .enable_apic_mode               = NULL,
+        .phys_pkg_id                    = flat_phys_pkg_id,
+        .mps_oem_check                  = NULL,
+
+        .get_apic_id                    = flat_get_apic_id,
+        .set_apic_id                    = set_apic_id,
+        .apic_id_mask                   = 0xFFu << 24,
+
+        .cpu_mask_to_apicid             = physflat_cpu_mask_to_apicid,
+        .cpu_mask_to_apicid_and         = physflat_cpu_mask_to_apicid_and,
+
+        .send_IPI_mask                  = physflat_send_IPI_mask,
+        .send_IPI_mask_allbutself       = physflat_send_IPI_mask_allbutself,
+        .send_IPI_allbutself            = physflat_send_IPI_allbutself,
+        .send_IPI_all                   = physflat_send_IPI_all,
+        .send_IPI_self                  = apic_send_IPI_self,
+
+        .trampoline_phys_low            = DEFAULT_TRAMPOLINE_PHYS_LOW,
+        .trampoline_phys_high           = DEFAULT_TRAMPOLINE_PHYS_HIGH,
+        .wait_for_init_deassert         = NULL,
+        .smp_callin_clear_local_apic    = NULL,
+        .inquire_remote_apic            = NULL,
+
+        .read                           = native_apic_mem_read,
+        .write                          = native_apic_mem_write,
+        .icr_read                       = native_apic_icr_read,
+        .icr_write                      = native_apic_icr_write,
+        .wait_icr_idle                  = native_apic_wait_icr_idle,
+        .safe_wait_icr_idle             = native_safe_apic_wait_icr_idle,
 };
diff --git a/arch/x86/kernel/apic/bigsmp_32.c b/arch/x86/kernel/apic/bigsmp_32.c
new file mode 100644
index 000000000000..d806ecaa948f
--- /dev/null
+++ b/arch/x86/kernel/apic/bigsmp_32.c
@@ -0,0 +1,267 @@
+/*
+ * APIC driver for "bigsmp" xAPIC machines with more than 8 virtual CPUs.
+ *
+ * Drives the local APIC in "clustered mode".
+ */
+#include <linux/threads.h>
+#include <linux/cpumask.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/dmi.h>
+#include <linux/smp.h>
+
+#include <asm/apicdef.h>
+#include <asm/fixmap.h>
+#include <asm/mpspec.h>
+#include <asm/apic.h>
+#include <asm/ipi.h>
+
+static unsigned bigsmp_get_apic_id(unsigned long x)
+{
+        return (x >> 24) & 0xFF;
+}
+
+static int bigsmp_apic_id_registered(void)
+{
+        return 1;
+}
+
+static const cpumask_t *bigsmp_target_cpus(void)
+{
+#ifdef CONFIG_SMP
+        return &cpu_online_map;
+#else
+        return &cpumask_of_cpu(0);
+#endif
+}
+
+static unsigned long bigsmp_check_apicid_used(physid_mask_t bitmap, int apicid)
+{
+        return 0;
+}
+
+static unsigned long bigsmp_check_apicid_present(int bit)
+{
+        return 1;
+}
+
+static inline unsigned long calculate_ldr(int cpu)
+{
+        unsigned long val, id;
+
+        val = apic_read(APIC_LDR) & ~APIC_LDR_MASK;
+        id = per_cpu(x86_bios_cpu_apicid, cpu);
+        val |= SET_APIC_LOGICAL_ID(id);
+
+        return val;
+}
+
+/*
+ * Set up the logical destination ID.
+ *
+ * Intel recommends to set DFR, LDR and TPR before enabling
+ * an APIC.  See e.g. "AP-388 82489DX User's Manual" (Intel
+ * document number 292116).  So here it goes...
+ */
+static void bigsmp_init_apic_ldr(void)
+{
+        unsigned long val;
+        int cpu = smp_processor_id();
+
+        apic_write(APIC_DFR, APIC_DFR_FLAT);
+        val = calculate_ldr(cpu);
+        apic_write(APIC_LDR, val);
+}
+
+static void bigsmp_setup_apic_routing(void)
+{
+        printk(KERN_INFO
+                "Enabling APIC mode:  Physflat.  Using %d I/O APICs\n",
+                nr_ioapics);
+}
+
+static int bigsmp_apicid_to_node(int logical_apicid)
+{
+        return apicid_2_node[hard_smp_processor_id()];
+}
+
+static int bigsmp_cpu_present_to_apicid(int mps_cpu)
+{
+        if (mps_cpu < nr_cpu_ids)
+                return (int) per_cpu(x86_bios_cpu_apicid, mps_cpu);
+
+        return BAD_APICID;
+}
+
+static physid_mask_t bigsmp_apicid_to_cpu_present(int phys_apicid)
+{
+        return physid_mask_of_physid(phys_apicid);
+}
+
+/* Mapping from cpu number to logical apicid */
+static inline int bigsmp_cpu_to_logical_apicid(int cpu)
+{
+        if (cpu >= nr_cpu_ids)
+                return BAD_APICID;
+        return cpu_physical_id(cpu);
+}
+
+static physid_mask_t bigsmp_ioapic_phys_id_map(physid_mask_t phys_map)
+{
+        /* For clustered we don't have a good way to do this yet - hack */
+        return physids_promote(0xFFL);
+}
+
+static int bigsmp_check_phys_apicid_present(int boot_cpu_physical_apicid)
+{
+        return 1;
+}
+
+/* As we are using single CPU as destination, pick only one CPU here */
+static unsigned int bigsmp_cpu_mask_to_apicid(const cpumask_t *cpumask)
+{
+        return bigsmp_cpu_to_logical_apicid(first_cpu(*cpumask));
+}
+
+static unsigned int bigsmp_cpu_mask_to_apicid_and(const struct cpumask *cpumask,
+                              const struct cpumask *andmask)
+{
+        int cpu;
+
+        /*
+         * We're using fixed IRQ delivery, can only return one phys APIC ID.
+         * May as well be the first.
+         */
+        for_each_cpu_and(cpu, cpumask, andmask) {
+                if (cpumask_test_cpu(cpu, cpu_online_mask))
+                        break;
+        }
+        if (cpu < nr_cpu_ids)
+                return bigsmp_cpu_to_logical_apicid(cpu);
+
+        return BAD_APICID;
+}
+
+static int bigsmp_phys_pkg_id(int cpuid_apic, int index_msb)
+{
+        return cpuid_apic >> index_msb;
+}
+
+static inline void bigsmp_send_IPI_mask(const struct cpumask *mask, int vector)
+{
+        default_send_IPI_mask_sequence_phys(mask, vector);
+}
+
+static void bigsmp_send_IPI_allbutself(int vector)
+{
+        default_send_IPI_mask_allbutself_phys(cpu_online_mask, vector);
+}
+
+static void bigsmp_send_IPI_all(int vector)
+{
+        bigsmp_send_IPI_mask(cpu_online_mask, vector);
+}
+
+static int dmi_bigsmp; /* can be set by dmi scanners */
+
+static int hp_ht_bigsmp(const struct dmi_system_id *d)
+{
+        printk(KERN_NOTICE "%s detected: force use of apic=bigsmp\n", d->ident);
+        dmi_bigsmp = 1;
+
+        return 0;
+}
+
+
+static const struct dmi_system_id bigsmp_dmi_table[] = {
+        { hp_ht_bigsmp, "HP ProLiant DL760 G2",
+                {       DMI_MATCH(DMI_BIOS_VENDOR, "HP"),
+                        DMI_MATCH(DMI_BIOS_VERSION, "P44-"),
+                }
+        },
+
+        { hp_ht_bigsmp, "HP ProLiant DL740",
+                {       DMI_MATCH(DMI_BIOS_VENDOR, "HP"),
+                        DMI_MATCH(DMI_BIOS_VERSION, "P47-"),
+                }
+        },
+        { } /* NULL entry stops DMI scanning */
+};
+
+static void bigsmp_vector_allocation_domain(int cpu, cpumask_t *retmask)
+{
+        cpus_clear(*retmask);
+        cpu_set(cpu, *retmask);
+}
+
+static int probe_bigsmp(void)
+{
+        if (def_to_bigsmp)
+                dmi_bigsmp = 1;
+        else
+                dmi_check_system(bigsmp_dmi_table);
+
+        return dmi_bigsmp;
+}
+
+struct apic apic_bigsmp = {
+
+        .name                           = "bigsmp",
+        .probe                          = probe_bigsmp,
+        .acpi_madt_oem_check            = NULL,
+        .apic_id_registered             = bigsmp_apic_id_registered,
+
+        .irq_delivery_mode              = dest_Fixed,
+        /* phys delivery to target CPU: */
+        .irq_dest_mode                  = 0,
+
+        .target_cpus                    = bigsmp_target_cpus,
+        .disable_esr                    = 1,
+        .dest_logical                   = 0,
+        .check_apicid_used              = bigsmp_check_apicid_used,
+        .check_apicid_present           = bigsmp_check_apicid_present,
+
+        .vector_allocation_domain       = bigsmp_vector_allocation_domain,
+        .init_apic_ldr                  = bigsmp_init_apic_ldr,
+
+        .ioapic_phys_id_map             = bigsmp_ioapic_phys_id_map,
+        .setup_apic_routing             = bigsmp_setup_apic_routing,
+        .multi_timer_check              = NULL,
+        .apicid_to_node                 = bigsmp_apicid_to_node,
+        .cpu_to_logical_apicid          = bigsmp_cpu_to_logical_apicid,
+        .cpu_present_to_apicid          = bigsmp_cpu_present_to_apicid,
+        .apicid_to_cpu_present          = bigsmp_apicid_to_cpu_present,
+        .setup_portio_remap             = NULL,
+        .check_phys_apicid_present      = bigsmp_check_phys_apicid_present,
+        .enable_apic_mode               = NULL,
+        .phys_pkg_id                    = bigsmp_phys_pkg_id,
+        .mps_oem_check                  = NULL,
+
+        .get_apic_id                    = bigsmp_get_apic_id,
+        .set_apic_id                    = NULL,
+        .apic_id_mask                   = 0xFF << 24,
+
+        .cpu_mask_to_apicid             = bigsmp_cpu_mask_to_apicid,
+        .cpu_mask_to_apicid_and         = bigsmp_cpu_mask_to_apicid_and,
+
+        .send_IPI_mask                  = bigsmp_send_IPI_mask,
+        .send_IPI_mask_allbutself       = NULL,
+        .send_IPI_allbutself            = bigsmp_send_IPI_allbutself,
+        .send_IPI_all                   = bigsmp_send_IPI_all,
+        .send_IPI_self                  = default_send_IPI_self,
+
+        .trampoline_phys_low            = DEFAULT_TRAMPOLINE_PHYS_LOW,
+        .trampoline_phys_high           = DEFAULT_TRAMPOLINE_PHYS_HIGH,
+
+        .wait_for_init_deassert         = default_wait_for_init_deassert,
+
+        .smp_callin_clear_local_apic    = NULL,
+        .inquire_remote_apic            = default_inquire_remote_apic,
+
+        .read                           = native_apic_mem_read,
+        .write                          = native_apic_mem_write,
+        .icr_read                       = native_apic_icr_read,
+        .icr_write                      = native_apic_icr_write,
+        .wait_icr_idle                  = native_apic_wait_icr_idle,
+        .safe_wait_icr_idle             = native_safe_apic_wait_icr_idle,
+};
diff --git a/arch/x86/kernel/apic/es7000_32.c b/arch/x86/kernel/apic/es7000_32.c
new file mode 100644
index 000000000000..19588f2770ee
--- /dev/null
+++ b/arch/x86/kernel/apic/es7000_32.c
@@ -0,0 +1,780 @@
+/*
+ * Written by: Garry Forsgren, Unisys Corporation
+ *             Natalie Protasevich, Unisys Corporation
+ *
+ * This file contains the code to configure and interface
+ * with Unisys ES7000 series hardware system manager.
+ *
+ * Copyright (c) 2003 Unisys Corporation.
+ * Copyright (C) 2009, Red Hat, Inc., Ingo Molnar
+ *
+ *   All Rights Reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it would be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write the Free Software Foundation, Inc., 59
+ * Temple Place - Suite 330, Boston MA 02111-1307, USA.
+ *
+ * Contact information: Unisys Corporation, Township Line & Union Meeting
+ * Roads-A, Unisys Way, Blue Bell, Pennsylvania, 19424, or:
+ *
+ * http://www.unisys.com
+ */
+#include <linux/notifier.h>
+#include <linux/spinlock.h>
+#include <linux/cpumask.h>
+#include <linux/threads.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/reboot.h>
+#include <linux/string.h>
+#include <linux/types.h>
+#include <linux/errno.h>
+#include <linux/acpi.h>
+#include <linux/init.h>
+#include <linux/nmi.h>
+#include <linux/smp.h>
+#include <linux/io.h>
+
+#include <asm/apicdef.h>
+#include <asm/atomic.h>
+#include <asm/fixmap.h>
+#include <asm/mpspec.h>
+#include <asm/setup.h>
+#include <asm/apic.h>
+#include <asm/ipi.h>
+
+/*
+ * ES7000 chipsets
+ */
+
+#define NON_UNISYS                      0
+#define ES7000_CLASSIC                  1
+#define ES7000_ZORRO                    2
+
+#define MIP_REG                         1
+#define MIP_PSAI_REG                    4
+
+#define MIP_BUSY                        1
+#define MIP_SPIN                        0xf0000
+#define MIP_VALID                       0x0100000000000000ULL
+#define MIP_SW_APIC                     0x1020b
+
+#define MIP_PORT(val)                   ((val >> 32) & 0xffff)
+
+#define MIP_RD_LO(val)                  (val & 0xffffffff)
+
+struct mip_reg {
+        unsigned long long              off_0x00;
+        unsigned long long              off_0x08;
+        unsigned long long              off_0x10;
+        unsigned long long              off_0x18;
+        unsigned long long              off_0x20;
+        unsigned long long              off_0x28;
+        unsigned long long              off_0x30;
+        unsigned long long              off_0x38;
+};
+
+struct mip_reg_info {
+        unsigned long long              mip_info;
+        unsigned long long              delivery_info;
+        unsigned long long              host_reg;
+        unsigned long long              mip_reg;
+};
+
+struct psai {
+        unsigned long long              entry_type;
+        unsigned long long              addr;
+        unsigned long long              bep_addr;
+};
+
+#ifdef CONFIG_ACPI
+
+struct es7000_oem_table {
+        struct acpi_table_header        Header;
+        u32                             OEMTableAddr;
+        u32                             OEMTableSize;
+};
+
+static unsigned long                    oem_addrX;
+static unsigned long                    oem_size;
+
+#endif
+
+/*
+ * ES7000 Globals
+ */
+
+static volatile unsigned long           *psai;
+static struct mip_reg                   *mip_reg;
+static struct mip_reg                   *host_reg;
+static int                              mip_port;
+static unsigned long                    mip_addr;
+static unsigned long                    host_addr;
+
+int                                     es7000_plat;
+
+/*
+ * GSI override for ES7000 platforms.
+ */
+
+static unsigned int                     base;
+
+static int
+es7000_rename_gsi(int ioapic, int gsi)
+{
+        if (es7000_plat == ES7000_ZORRO)
+                return gsi;
+
+        if (!base) {
+                int i;
+                for (i = 0; i < nr_ioapics; i++)
+                        base += nr_ioapic_registers[i];
+        }
+
+        if (!ioapic && (gsi < 16))
+                gsi += base;
+
+        return gsi;
+}
+
+static int wakeup_secondary_cpu_via_mip(int cpu, unsigned long eip)
+{
+        unsigned long vect = 0, psaival = 0;
+
+        if (psai == NULL)
+                return -1;
+
+        vect = ((unsigned long)__pa(eip)/0x1000) << 16;
+        psaival = (0x1000000 | vect | cpu);
+
+        while (*psai & 0x1000000)
+                ;
+
+        *psai = psaival;
+
+        return 0;
+}
+
+static int es7000_apic_is_cluster(void)
+{
+        /* MPENTIUMIII */
+        if (boot_cpu_data.x86 == 6 &&
+            (boot_cpu_data.x86_model >= 7 || boot_cpu_data.x86_model <= 11))
+                return 1;
+
+        return 0;
+}
+
+static void setup_unisys(void)
+{
+        /*
+         * Determine the generation of the ES7000 currently running.
+         *
+         * es7000_plat = 1 if the machine is a 5xx ES7000 box
+         * es7000_plat = 2 if the machine is a x86_64 ES7000 box
+         *
+         */
+        if (!(boot_cpu_data.x86 <= 15 && boot_cpu_data.x86_model <= 2))
+                es7000_plat = ES7000_ZORRO;
+        else
+                es7000_plat = ES7000_CLASSIC;
+        ioapic_renumber_irq = es7000_rename_gsi;
+}
+
+/*
+ * Parse the OEM Table:
+ */
+static int parse_unisys_oem(char *oemptr)
+{
+        int                     i;
+        int                     success = 0;
+        unsigned char           type, size;
+        unsigned long           val;
+        char                    *tp = NULL;
+        struct psai             *psaip = NULL;
+        struct mip_reg_info     *mi;
+        struct mip_reg          *host, *mip;
+
+        tp = oemptr;
+
+        tp += 8;
+
+        for (i = 0; i <= 6; i++) {
+                type = *tp++;
+                size = *tp++;
+                tp -= 2;
+                switch (type) {
+                case MIP_REG:
+                        mi = (struct mip_reg_info *)tp;
+                        val = MIP_RD_LO(mi->host_reg);
+                        host_addr = val;
+                        host = (struct mip_reg *)val;
+                        host_reg = __va(host);
+                        val = MIP_RD_LO(mi->mip_reg);
+                        mip_port = MIP_PORT(mi->mip_info);
+                        mip_addr = val;
+                        mip = (struct mip_reg *)val;
+                        mip_reg = __va(mip);
+                        pr_debug("es7000_mipcfg: host_reg = 0x%lx \n",
+                                 (unsigned long)host_reg);
+                        pr_debug("es7000_mipcfg: mip_reg = 0x%lx \n",
+                                 (unsigned long)mip_reg);
+                        success++;
+                        break;
+                case MIP_PSAI_REG:
+                        psaip = (struct psai *)tp;
+                        if (tp != NULL) {
+                                if (psaip->addr)
+                                        psai = __va(psaip->addr);
+                                else
+                                        psai = NULL;
+                                success++;
+                        }
+                        break;
+                default:
+                        break;
+                }
+                tp += size;
+        }
+
+        if (success < 2)
+                es7000_plat = NON_UNISYS;
+        else
+                setup_unisys();
+
+        return es7000_plat;
+}
+
+#ifdef CONFIG_ACPI
+static int find_unisys_acpi_oem_table(unsigned long *oem_addr)
+{
+        struct acpi_table_header *header = NULL;
+        struct es7000_oem_table *table;
+        acpi_size tbl_size;
+        acpi_status ret;
+        int i = 0;
+
+        for (;;) {
+                ret = acpi_get_table_with_size("OEM1", i++, &header, &tbl_size);
+                if (!ACPI_SUCCESS(ret))
+                        return -1;
+
+                if (!memcmp((char *) &header->oem_id, "UNISYS", 6))
+                        break;
+
+                early_acpi_os_unmap_memory(header, tbl_size);
+        }
+
+        table = (void *)header;
+
+        oem_addrX       = table->OEMTableAddr;
+        oem_size        = table->OEMTableSize;
+
+        early_acpi_os_unmap_memory(header, tbl_size);
+
+        *oem_addr       = (unsigned long)__acpi_map_table(oem_addrX, oem_size);
+
+        return 0;
+}
+
+static void unmap_unisys_acpi_oem_table(unsigned long oem_addr)
+{
+        if (!oem_addr)
+                return;
+
+        __acpi_unmap_table((char *)oem_addr, oem_size);
+}
+
+static int es7000_check_dsdt(void)
+{
+        struct acpi_table_header header;
+
+        if (ACPI_SUCCESS(acpi_get_table_header(ACPI_SIG_DSDT, 0, &header)) &&
+            !strncmp(header.oem_id, "UNISYS", 6))
+                return 1;
+        return 0;
+}
+
+static int es7000_acpi_ret;
+
+/* Hook from generic ACPI tables.c */
+static int es7000_acpi_madt_oem_check(char *oem_id, char *oem_table_id)
+{
+        unsigned long oem_addr = 0;
+        int check_dsdt;
+        int ret = 0;
+
+        /* check dsdt at first to avoid clear fix_map for oem_addr */
+        check_dsdt = es7000_check_dsdt();
+
+        if (!find_unisys_acpi_oem_table(&oem_addr)) {
+                if (check_dsdt) {
+                        ret = parse_unisys_oem((char *)oem_addr);
+                } else {
+                        setup_unisys();
+                        ret = 1;
+                }
+                /*
+                 * we need to unmap it
+                 */
+                unmap_unisys_acpi_oem_table(oem_addr);
+        }
+
+        es7000_acpi_ret = ret;
+
+        return ret && !es7000_apic_is_cluster();
+}
+
+static int es7000_acpi_madt_oem_check_cluster(char *oem_id, char *oem_table_id)
+{
+        int ret = es7000_acpi_ret;
+
+        return ret && es7000_apic_is_cluster();
+}
+
+#else /* !CONFIG_ACPI: */
+static int es7000_acpi_madt_oem_check(char *oem_id, char *oem_table_id)
+{
+        return 0;
+}
+
+static int es7000_acpi_madt_oem_check_cluster(char *oem_id, char *oem_table_id)
+{
+        return 0;
+}
+#endif /* !CONFIG_ACPI */
+
+static void es7000_spin(int n)
+{
+        int i = 0;
+
+        while (i++ < n)
+                rep_nop();
+}
+
+static int es7000_mip_write(struct mip_reg *mip_reg)
+{
+        int status = 0;
+        int spin;
+
+        spin = MIP_SPIN;
+        while ((host_reg->off_0x38 & MIP_VALID) != 0) {
+                if (--spin <= 0) {
+                        WARN(1, "Timeout waiting for Host Valid Flag\n");
+                        return -1;
+                }
+                es7000_spin(MIP_SPIN);
+        }
+
+        memcpy(host_reg, mip_reg, sizeof(struct mip_reg));
+        outb(1, mip_port);
+
+        spin = MIP_SPIN;
+
+        while ((mip_reg->off_0x38 & MIP_VALID) == 0) {
+                if (--spin <= 0) {
+                        WARN(1, "Timeout waiting for MIP Valid Flag\n");
+                        return -1;
+                }
+                es7000_spin(MIP_SPIN);
+        }
+
+        status = (mip_reg->off_0x00 & 0xffff0000000000ULL) >> 48;
+        mip_reg->off_0x38 &= ~MIP_VALID;
+
+        return status;
+}
+
+static void es7000_enable_apic_mode(void)
+{
+        struct mip_reg es7000_mip_reg;
+        int mip_status;
+
+        if (!es7000_plat)
+                return;
+
+        printk(KERN_INFO "ES7000: Enabling APIC mode.\n");
+        memset(&es7000_mip_reg, 0, sizeof(struct mip_reg));
+        es7000_mip_reg.off_0x00 = MIP_SW_APIC;
+        es7000_mip_reg.off_0x38 = MIP_VALID;
+
+        while ((mip_status = es7000_mip_write(&es7000_mip_reg)) != 0)
+                WARN(1, "Command failed, status = %x\n", mip_status);
+}
+
+static void es7000_vector_allocation_domain(int cpu, cpumask_t *retmask)
+{
+        /* Careful. Some cpus do not strictly honor the set of cpus
+         * specified in the interrupt destination when using lowest
+         * priority interrupt delivery mode.
+         *
+         * In particular there was a hyperthreading cpu observed to
+         * deliver interrupts to the wrong hyperthread when only one
+         * hyperthread was specified in the interrupt desitination.
+         */
+        *retmask = (cpumask_t){ { [0] = APIC_ALL_CPUS, } };
+}
+
+
+static void es7000_wait_for_init_deassert(atomic_t *deassert)
+{
+        while (!atomic_read(deassert))
+                cpu_relax();
+}
+
+static unsigned int es7000_get_apic_id(unsigned long x)
+{
+        return (x >> 24) & 0xFF;
+}
+
+static void es7000_send_IPI_mask(const struct cpumask *mask, int vector)
+{
+        default_send_IPI_mask_sequence_phys(mask, vector);
+}
+
+static void es7000_send_IPI_allbutself(int vector)
+{
+        default_send_IPI_mask_allbutself_phys(cpu_online_mask, vector);
+}
+
+static void es7000_send_IPI_all(int vector)
+{
+        es7000_send_IPI_mask(cpu_online_mask, vector);
+}
+
+static int es7000_apic_id_registered(void)
+{
+        return 1;
+}
+
+static const cpumask_t *target_cpus_cluster(void)
+{
+        return &CPU_MASK_ALL;
+}
+
+static const cpumask_t *es7000_target_cpus(void)
+{
+        return &cpumask_of_cpu(smp_processor_id());
+}
+
+static unsigned long
+es7000_check_apicid_used(physid_mask_t bitmap, int apicid)
+{
+        return 0;
+}
+static unsigned long es7000_check_apicid_present(int bit)
+{
+        return physid_isset(bit, phys_cpu_present_map);
+}
+
+static unsigned long calculate_ldr(int cpu)
+{
+        unsigned long id = per_cpu(x86_bios_cpu_apicid, cpu);
+
+        return SET_APIC_LOGICAL_ID(id);
+}
+
+/*
+ * Set up the logical destination ID.
+ *
+ * Intel recommends to set DFR, LdR and TPR before enabling
+ * an APIC.  See e.g. "AP-388 82489DX User's Manual" (Intel
+ * document number 292116).  So here it goes...
+ */
+static void es7000_init_apic_ldr_cluster(void)
+{
+        unsigned long val;
+        int cpu = smp_processor_id();
+
+        apic_write(APIC_DFR, APIC_DFR_CLUSTER);
+        val = calculate_ldr(cpu);
+        apic_write(APIC_LDR, val);
+}
+
+static void es7000_init_apic_ldr(void)
+{
+        unsigned long val;
+        int cpu = smp_processor_id();
+
+        apic_write(APIC_DFR, APIC_DFR_FLAT);
+        val = calculate_ldr(cpu);
+        apic_write(APIC_LDR, val);
+}
+
+static void es7000_setup_apic_routing(void)
+{
+        int apic = per_cpu(x86_bios_cpu_apicid, smp_processor_id());
+
+        printk(KERN_INFO
+          "Enabling APIC mode:  %s. Using %d I/O APICs, target cpus %lx\n",
+                (apic_version[apic] == 0x14) ?
+                        "Physical Cluster" : "Logical Cluster",
+                nr_ioapics, cpus_addr(*es7000_target_cpus())[0]);
+}
+
+static int es7000_apicid_to_node(int logical_apicid)
+{
+        return 0;
+}
+
+
+static int es7000_cpu_present_to_apicid(int mps_cpu)
+{
+        if (!mps_cpu)
+                return boot_cpu_physical_apicid;
+        else if (mps_cpu < nr_cpu_ids)
+                return per_cpu(x86_bios_cpu_apicid, mps_cpu);
+        else
+                return BAD_APICID;
+}
+
+static int cpu_id;
+
+static physid_mask_t es7000_apicid_to_cpu_present(int phys_apicid)
+{
+        physid_mask_t mask;
+
+        mask = physid_mask_of_physid(cpu_id);
+        ++cpu_id;
+
+        return mask;
+}
+
+/* Mapping from cpu number to logical apicid */
+static int es7000_cpu_to_logical_apicid(int cpu)
+{
+#ifdef CONFIG_SMP
+        if (cpu >= nr_cpu_ids)
+                return BAD_APICID;
+        return cpu_2_logical_apicid[cpu];
+#else
+        return logical_smp_processor_id();
+#endif
+}
+
+static physid_mask_t es7000_ioapic_phys_id_map(physid_mask_t phys_map)
+{
+        /* For clustered we don't have a good way to do this yet - hack */
+        return physids_promote(0xff);
+}
+
+static int es7000_check_phys_apicid_present(int cpu_physical_apicid)
+{
+        boot_cpu_physical_apicid = read_apic_id();
+        return 1;
+}
+
+static unsigned int es7000_cpu_mask_to_apicid(const cpumask_t *cpumask)
+{
+        unsigned int round = 0;
+        int cpu, uninitialized_var(apicid);
+
+        /*
+         * The cpus in the mask must all be on the apic cluster.
+         */
+        for_each_cpu(cpu, cpumask) {
+                int new_apicid = es7000_cpu_to_logical_apicid(cpu);
+
+                if (round && APIC_CLUSTER(apicid) != APIC_CLUSTER(new_apicid)) {
+                        WARN(1, "Not a valid mask!");
+
+                        return BAD_APICID;
+                }
+                apicid = new_apicid;
+                round++;
+        }
+        return apicid;
+}
+
+static unsigned int
+es7000_cpu_mask_to_apicid_and(const struct cpumask *inmask,
+                              const struct cpumask *andmask)
+{
+        int apicid = es7000_cpu_to_logical_apicid(0);
+        cpumask_var_t cpumask;
+
+        if (!alloc_cpumask_var(&cpumask, GFP_ATOMIC))
+                return apicid;
+
+        cpumask_and(cpumask, inmask, andmask);
+        cpumask_and(cpumask, cpumask, cpu_online_mask);
+        apicid = es7000_cpu_mask_to_apicid(cpumask);
+
+        free_cpumask_var(cpumask);
+
+        return apicid;
+}
+
+static int es7000_phys_pkg_id(int cpuid_apic, int index_msb)
+{
+        return cpuid_apic >> index_msb;
+}
+
+static int probe_es7000(void)
+{
+        /* probed later in mptable/ACPI hooks */
+        return 0;
+}
+
+static int es7000_mps_ret;
+static int es7000_mps_oem_check(struct mpc_table *mpc, char *oem,
+                char *productid)
+{
+        int ret = 0;
+
+        if (mpc->oemptr) {
+                struct mpc_oemtable *oem_table =
+                        (struct mpc_oemtable *)mpc->oemptr;
+
+                if (!strncmp(oem, "UNISYS", 6))
+                        ret = parse_unisys_oem((char *)oem_table);
+        }
+
+        es7000_mps_ret = ret;
+
+        return ret && !es7000_apic_is_cluster();
+}
+
+static int es7000_mps_oem_check_cluster(struct mpc_table *mpc, char *oem,
+                char *productid)
+{
+        int ret = es7000_mps_ret;
+
+        return ret && es7000_apic_is_cluster();
+}
+
+struct apic apic_es7000_cluster = {
+
+        .name                           = "es7000",
+        .probe                          = probe_es7000,
+        .acpi_madt_oem_check            = es7000_acpi_madt_oem_check_cluster,
+        .apic_id_registered             = es7000_apic_id_registered,
+
+        .irq_delivery_mode              = dest_LowestPrio,
+        /* logical delivery broadcast to all procs: */
+        .irq_dest_mode                  = 1,
+
+        .target_cpus                    = target_cpus_cluster,
+        .disable_esr                    = 1,
+        .dest_logical                   = 0,
+        .check_apicid_used              = es7000_check_apicid_used,
+        .check_apicid_present           = es7000_check_apicid_present,
+
+        .vector_allocation_domain       = es7000_vector_allocation_domain,
+        .init_apic_ldr                  = es7000_init_apic_ldr_cluster,
+
+        .ioapic_phys_id_map             = es7000_ioapic_phys_id_map,
+        .setup_apic_routing             = es7000_setup_apic_routing,
+        .multi_timer_check              = NULL,
+        .apicid_to_node                 = es7000_apicid_to_node,
+        .cpu_to_logical_apicid          = es7000_cpu_to_logical_apicid,
+        .cpu_present_to_apicid          = es7000_cpu_present_to_apicid,
+        .apicid_to_cpu_present          = es7000_apicid_to_cpu_present,
+        .setup_portio_remap             = NULL,
+        .check_phys_apicid_present      = es7000_check_phys_apicid_present,
+        .enable_apic_mode               = es7000_enable_apic_mode,
+        .phys_pkg_id                    = es7000_phys_pkg_id,
+        .mps_oem_check                  = es7000_mps_oem_check_cluster,
+
+        .get_apic_id                    = es7000_get_apic_id,
+        .set_apic_id                    = NULL,
+        .apic_id_mask                   = 0xFF << 24,
+
+        .cpu_mask_to_apicid             = es7000_cpu_mask_to_apicid,
+        .cpu_mask_to_apicid_and         = es7000_cpu_mask_to_apicid_and,
+
+        .send_IPI_mask                  = es7000_send_IPI_mask,
+        .send_IPI_mask_allbutself       = NULL,
+        .send_IPI_allbutself            = es7000_send_IPI_allbutself,
+        .send_IPI_all                   = es7000_send_IPI_all,
+        .send_IPI_self                  = default_send_IPI_self,
+
+        .wakeup_secondary_cpu           = wakeup_secondary_cpu_via_mip,
+
+        .trampoline_phys_low            = 0x467,
+        .trampoline_phys_high           = 0x469,
+
+        .wait_for_init_deassert         = NULL,
+
+        /* Nothing to do for most platforms, since cleared by the INIT cycle: */
+        .smp_callin_clear_local_apic    = NULL,
+        .inquire_remote_apic            = default_inquire_remote_apic,
+
+        .read                           = native_apic_mem_read,
+        .write                          = native_apic_mem_write,
+        .icr_read                       = native_apic_icr_read,
+        .icr_write                      = native_apic_icr_write,
+        .wait_icr_idle                  = native_apic_wait_icr_idle,
+        .safe_wait_icr_idle             = native_safe_apic_wait_icr_idle,
+};
+
+struct apic apic_es7000 = {
+
+        .name                           = "es7000",
+        .probe                          = probe_es7000,
+        .acpi_madt_oem_check            = es7000_acpi_madt_oem_check,
+        .apic_id_registered             = es7000_apic_id_registered,
+
+        .irq_delivery_mode              = dest_Fixed,
+        /* phys delivery to target CPUs: */
+        .irq_dest_mode                  = 0,
+
+        .target_cpus                    = es7000_target_cpus,
+        .disable_esr                    = 1,
+        .dest_logical                   = 0,
+        .check_apicid_used              = es7000_check_apicid_used,
+        .check_apicid_present           = es7000_check_apicid_present,
+
+        .vector_allocation_domain       = es7000_vector_allocation_domain,
+        .init_apic_ldr                  = es7000_init_apic_ldr,
+
+        .ioapic_phys_id_map             = es7000_ioapic_phys_id_map,
+        .setup_apic_routing             = es7000_setup_apic_routing,
+        .multi_timer_check              = NULL,
+        .apicid_to_node                 = es7000_apicid_to_node,
+        .cpu_to_logical_apicid          = es7000_cpu_to_logical_apicid,
+        .cpu_present_to_apicid          = es7000_cpu_present_to_apicid,
+        .apicid_to_cpu_present          = es7000_apicid_to_cpu_present,
+        .setup_portio_remap             = NULL,
+        .check_phys_apicid_present      = es7000_check_phys_apicid_present,
+        .enable_apic_mode               = es7000_enable_apic_mode,
+        .phys_pkg_id                    = es7000_phys_pkg_id,
+        .mps_oem_check                  = es7000_mps_oem_check,
+
+        .get_apic_id                    = es7000_get_apic_id,
+        .set_apic_id                    = NULL,
+        .apic_id_mask                   = 0xFF << 24,
+
+        .cpu_mask_to_apicid             = es7000_cpu_mask_to_apicid,
+        .cpu_mask_to_apicid_and         = es7000_cpu_mask_to_apicid_and,
+
+        .send_IPI_mask                  = es7000_send_IPI_mask,
+        .send_IPI_mask_allbutself       = NULL,
+        .send_IPI_allbutself            = es7000_send_IPI_allbutself,
+        .send_IPI_all                   = es7000_send_IPI_all,
+        .send_IPI_self                  = default_send_IPI_self,
+
+        .trampoline_phys_low            = 0x467,
+        .trampoline_phys_high           = 0x469,
+
+        .wait_for_init_deassert         = es7000_wait_for_init_deassert,
+
+        /* Nothing to do for most platforms, since cleared by the INIT cycle: */
+        .smp_callin_clear_local_apic    = NULL,
+        .inquire_remote_apic            = default_inquire_remote_apic,
+
+        .read                           = native_apic_mem_read,
+        .write                          = native_apic_mem_write,
+        .icr_read                       = native_apic_icr_read,
+        .icr_write                      = native_apic_icr_write,
+        .wait_icr_idle                  = native_apic_wait_icr_idle,
+        .safe_wait_icr_idle             = native_safe_apic_wait_icr_idle,
+};
diff --git a/arch/x86/kernel/io_apic.c b/arch/x86/kernel/apic/io_apic.c
index bc7ac4da90d7..00e6071cefc4 100644
--- a/arch/x86/kernel/io_apic.c
+++ b/arch/x86/kernel/apic/io_apic.c
@@ -1,7 +1,7 @@
 /*
  *      Intel IO-APIC support for multi-Pentium hosts.
  *
- *      Copyright (C) 1997, 1998, 1999, 2000 Ingo Molnar, Hajnalka Szabo
+ *      Copyright (C) 1997, 1998, 1999, 2000, 2009 Ingo Molnar, Hajnalka Szabo
  *
  *      Many thanks to Stig Venaas for trying out countless experimental
  *      patches and reporting/debugging problems patiently!
@@ -46,6 +46,7 @@
 #include <asm/idle.h>
 #include <asm/io.h>
 #include <asm/smp.h>
+#include <asm/cpu.h>
 #include <asm/desc.h>
 #include <asm/proto.h>
 #include <asm/acpi.h>
@@ -61,9 +62,7 @@
 #include <asm/uv/uv_hub.h>
 #include <asm/uv/uv_irq.h>
 
-#include <mach_ipi.h>
-#include <mach_apic.h>
-#include <mach_apicdef.h>
+#include <asm/apic.h>
 
 #define __apicdebuginit(type) static type __init
 
@@ -82,11 +81,11 @@ static DEFINE_SPINLOCK(vector_lock);
 int nr_ioapic_registers[MAX_IO_APICS];
 
 /* I/O APIC entries */
-struct mp_config_ioapic mp_ioapics[MAX_IO_APICS];
+struct mpc_ioapic mp_ioapics[MAX_IO_APICS];
 int nr_ioapics;
 
 /* MP IRQ source entries */
-struct mp_config_intsrc mp_irqs[MAX_IRQ_SOURCES];
+struct mpc_intsrc mp_irqs[MAX_IRQ_SOURCES];
 
 /* # of MP IRQ source entries */
 int mp_irq_entries;
@@ -99,10 +98,19 @@ DECLARE_BITMAP(mp_bus_not_pci, MAX_MP_BUSSES);
 
 int skip_ioapic_setup;
 
+void arch_disable_smp_support(void)
+{
+#ifdef CONFIG_PCI
+        noioapicquirk = 1;
+        noioapicreroute = -1;
+#endif
+        skip_ioapic_setup = 1;
+}
+
 static int __init parse_noapic(char *str)
 {
         /* disable IO-APIC */
-        disable_ioapic_setup();
+        arch_disable_smp_support();
         return 0;
 }
 early_param("noapic", parse_noapic);
@@ -356,7 +364,7 @@ set_extra_move_desc(struct irq_desc *desc, const struct cpumask *mask)
 
         if (!cfg->move_in_progress) {
                 /* it means that domain is not changed */
-                if (!cpumask_intersects(&desc->affinity, mask))
+                if (!cpumask_intersects(desc->affinity, mask))
                         cfg->move_desc_pending = 1;
         }
 }
@@ -386,7 +394,7 @@ struct io_apic {
 static __attribute_const__ struct io_apic __iomem *io_apic_base(int idx)
 {
         return (void __iomem *) __fix_to_virt(FIX_IO_APIC_BASE_0 + idx)
-                + (mp_ioapics[idx].mp_apicaddr & ~PAGE_MASK);
+                + (mp_ioapics[idx].apicaddr & ~PAGE_MASK);
 }
 
 static inline unsigned int io_apic_read(unsigned int apic, unsigned int reg)
@@ -478,7 +486,7 @@ __ioapic_write_entry(int apic, int pin, struct IO_APIC_route_entry e)
         io_apic_write(apic, 0x10 + 2*pin, eu.w1);
 }
 
-static void ioapic_write_entry(int apic, int pin, struct IO_APIC_route_entry e)
+void ioapic_write_entry(int apic, int pin, struct IO_APIC_route_entry e)
 {
         unsigned long flags;
         spin_lock_irqsave(&ioapic_lock, flags);
@@ -513,11 +521,11 @@ static void send_cleanup_vector(struct irq_cfg *cfg)
                 for_each_cpu_and(i, cfg->old_domain, cpu_online_mask)
                         cfg->move_cleanup_count++;
                 for_each_cpu_and(i, cfg->old_domain, cpu_online_mask)
-                        send_IPI_mask(cpumask_of(i), IRQ_MOVE_CLEANUP_VECTOR);
+                        apic->send_IPI_mask(cpumask_of(i), IRQ_MOVE_CLEANUP_VECTOR);
         } else {
                 cpumask_and(cleanup_mask, cfg->old_domain, cpu_online_mask);
                 cfg->move_cleanup_count = cpumask_weight(cleanup_mask);
-                send_IPI_mask(cleanup_mask, IRQ_MOVE_CLEANUP_VECTOR);
+                apic->send_IPI_mask(cleanup_mask, IRQ_MOVE_CLEANUP_VECTOR);
                 free_cpumask_var(cleanup_mask);
         }
         cfg->move_in_progress = 0;
@@ -562,8 +570,9 @@ static int
 assign_irq_vector(int irq, struct irq_cfg *cfg, const struct cpumask *mask);
 
 /*
- * Either sets desc->affinity to a valid value, and returns cpu_mask_to_apicid
- * of that, or returns BAD_APICID and leaves desc->affinity untouched.
+ * Either sets desc->affinity to a valid value, and returns
+ * ->cpu_mask_to_apicid of that, or returns BAD_APICID and
+ * leaves desc->affinity untouched.
  */
 static unsigned int
 set_desc_affinity(struct irq_desc *desc, const struct cpumask *mask)
@@ -579,9 +588,10 @@ set_desc_affinity(struct irq_desc *desc, const struct cpumask *mask)
         if (assign_irq_vector(irq, cfg, mask))
                 return BAD_APICID;
 
-        cpumask_and(&desc->affinity, cfg->domain, mask);
+        cpumask_and(desc->affinity, cfg->domain, mask);
         set_extra_move_desc(desc, mask);
-        return cpu_mask_to_apicid_and(&desc->affinity, cpu_online_mask);
+
+        return apic->cpu_mask_to_apicid_and(desc->affinity, cpu_online_mask);
 }
 
 static void
@@ -796,23 +806,6 @@ static void clear_IO_APIC (void)
                         clear_IO_APIC_pin(apic, pin);
 }
 
-#if !defined(CONFIG_SMP) && defined(CONFIG_X86_32)
-void send_IPI_self(int vector)
-{
-        unsigned int cfg;
-
-        /*
-         * Wait for idle.
-         */
-        apic_wait_icr_idle();
-        cfg = APIC_DM_FIXED | APIC_DEST_SELF | vector | APIC_DEST_LOGICAL;
-        /*
-         * Send the IPI. The write to APIC_ICR fires this off.
-         */
-        apic_write(APIC_ICR, cfg);
-}
-#endif /* !CONFIG_SMP && CONFIG_X86_32*/
-
 #ifdef CONFIG_X86_32
 /*
  * support for broken MP BIOSs, enables hand-redirection of PIRQ0-7 to
@@ -820,8 +813,9 @@ void send_IPI_self(int vector)
  */
 
 #define MAX_PIRQS 8
-static int pirq_entries [MAX_PIRQS];
-static int pirqs_enabled;
+static int pirq_entries[MAX_PIRQS] = {
+        [0 ... MAX_PIRQS - 1] = -1
+};
 
 static int __init ioapic_pirq_setup(char *str)
 {
@@ -830,10 +824,6 @@ static int __init ioapic_pirq_setup(char *str)
 
         get_options(str, ARRAY_SIZE(ints), ints);
 
-        for (i = 0; i < MAX_PIRQS; i++)
-                pirq_entries[i] = -1;
-
-        pirqs_enabled = 1;
         apic_printk(APIC_VERBOSE, KERN_INFO
                         "PIRQ redirection, working around broken MP-BIOS.\n");
         max = MAX_PIRQS;
@@ -944,10 +934,10 @@ static int find_irq_entry(int apic, int pin, int type)
         int i;
 
         for (i = 0; i < mp_irq_entries; i++)
-                if (mp_irqs[i].mp_irqtype == type &&
-                    (mp_irqs[i].mp_dstapic == mp_ioapics[apic].mp_apicid ||
-                     mp_irqs[i].mp_dstapic == MP_APIC_ALL) &&
-                    mp_irqs[i].mp_dstirq == pin)
+                if (mp_irqs[i].irqtype == type &&
+                    (mp_irqs[i].dstapic == mp_ioapics[apic].apicid ||
+                     mp_irqs[i].dstapic == MP_APIC_ALL) &&
+                    mp_irqs[i].dstirq == pin)
                         return i;
 
         return -1;
@@ -961,13 +951,13 @@ static int __init find_isa_irq_pin(int irq, int type)
         int i;
 
         for (i = 0; i < mp_irq_entries; i++) {
-                int lbus = mp_irqs[i].mp_srcbus;
+                int lbus = mp_irqs[i].srcbus;
 
                 if (test_bit(lbus, mp_bus_not_pci) &&
-                    (mp_irqs[i].mp_irqtype == type) &&
-                    (mp_irqs[i].mp_srcbusirq == irq))
+                    (mp_irqs[i].irqtype == type) &&
+                    (mp_irqs[i].srcbusirq == irq))
 
-                        return mp_irqs[i].mp_dstirq;
+                        return mp_irqs[i].dstirq;
         }
         return -1;
 }
@@ -977,17 +967,17 @@ static int __init find_isa_irq_apic(int irq, int type)
         int i;
 
         for (i = 0; i < mp_irq_entries; i++) {
-                int lbus = mp_irqs[i].mp_srcbus;
+                int lbus = mp_irqs[i].srcbus;
 
                 if (test_bit(lbus, mp_bus_not_pci) &&
-                    (mp_irqs[i].mp_irqtype == type) &&
-                    (mp_irqs[i].mp_srcbusirq == irq))
+                    (mp_irqs[i].irqtype == type) &&
+                    (mp_irqs[i].srcbusirq == irq))
                         break;
         }
         if (i < mp_irq_entries) {
                 int apic;
                 for(apic = 0; apic < nr_ioapics; apic++) {
-                        if (mp_ioapics[apic].mp_apicid == mp_irqs[i].mp_dstapic)
+                        if (mp_ioapics[apic].apicid == mp_irqs[i].dstapic)
                                 return apic;
                 }
         }
@@ -1012,23 +1002,23 @@ int IO_APIC_get_PCI_irq_vector(int bus, int slot, int pin)
                 return -1;
         }
         for (i = 0; i < mp_irq_entries; i++) {
-                int lbus = mp_irqs[i].mp_srcbus;
+                int lbus = mp_irqs[i].srcbus;
 
                 for (apic = 0; apic < nr_ioapics; apic++)
-                        if (mp_ioapics[apic].mp_apicid == mp_irqs[i].mp_dstapic ||
-                            mp_irqs[i].mp_dstapic == MP_APIC_ALL)
+                        if (mp_ioapics[apic].apicid == mp_irqs[i].dstapic ||
+                            mp_irqs[i].dstapic == MP_APIC_ALL)
                                 break;
 
                 if (!test_bit(lbus, mp_bus_not_pci) &&
-                    !mp_irqs[i].mp_irqtype &&
+                    !mp_irqs[i].irqtype &&
                     (bus == lbus) &&
-                    (slot == ((mp_irqs[i].mp_srcbusirq >> 2) & 0x1f))) {
-                        int irq = pin_2_irq(i,apic,mp_irqs[i].mp_dstirq);
+                    (slot == ((mp_irqs[i].srcbusirq >> 2) & 0x1f))) {
+                        int irq = pin_2_irq(i, apic, mp_irqs[i].dstirq);
 
                         if (!(apic || IO_APIC_IRQ(irq)))
                                 continue;
 
-                        if (pin == (mp_irqs[i].mp_srcbusirq & 3))
+                        if (pin == (mp_irqs[i].srcbusirq & 3))
                                 return irq;
                         /*
                          * Use the first all-but-pin matching entry as a
@@ -1071,7 +1061,7 @@ static int EISA_ELCR(unsigned int irq)
  * EISA conforming in the MP table, that means its trigger type must
  * be read in from the ELCR */
 
-#define default_EISA_trigger(idx)       (EISA_ELCR(mp_irqs[idx].mp_srcbusirq))
+#define default_EISA_trigger(idx)       (EISA_ELCR(mp_irqs[idx].srcbusirq))
 #define default_EISA_polarity(idx)      default_ISA_polarity(idx)
 
 /* PCI interrupts are always polarity one level triggered,
@@ -1088,13 +1078,13 @@ static int EISA_ELCR(unsigned int irq)
 
 static int MPBIOS_polarity(int idx)
 {
-        int bus = mp_irqs[idx].mp_srcbus;
+        int bus = mp_irqs[idx].srcbus;
         int polarity;
 
         /*
          * Determine IRQ line polarity (high active or low active):
          */
-        switch (mp_irqs[idx].mp_irqflag & 3)
+        switch (mp_irqs[idx].irqflag & 3)
         {
                 case 0: /* conforms, ie. bus-type dependent polarity */
                         if (test_bit(bus, mp_bus_not_pci))
@@ -1130,13 +1120,13 @@ static int MPBIOS_polarity(int idx)
 
 static int MPBIOS_trigger(int idx)
 {
-        int bus = mp_irqs[idx].mp_srcbus;
+        int bus = mp_irqs[idx].srcbus;
         int trigger;
 
         /*
          * Determine IRQ trigger mode (edge or level sensitive):
          */
-        switch ((mp_irqs[idx].mp_irqflag>>2) & 3)
+        switch ((mp_irqs[idx].irqflag>>2) & 3)
         {
                 case 0: /* conforms, ie. bus-type dependent */
                         if (test_bit(bus, mp_bus_not_pci))
@@ -1214,16 +1204,16 @@ int (*ioapic_renumber_irq)(int ioapic, int irq);
 static int pin_2_irq(int idx, int apic, int pin)
 {
         int irq, i;
-        int bus = mp_irqs[idx].mp_srcbus;
+        int bus = mp_irqs[idx].srcbus;
 
         /*
          * Debugging check, we are in big trouble if this message pops up!
          */
-        if (mp_irqs[idx].mp_dstirq != pin)
+        if (mp_irqs[idx].dstirq != pin)
                 printk(KERN_ERR "broken BIOS or MPTABLE parser, ayiee!!\n");
 
         if (test_bit(bus, mp_bus_not_pci)) {
-                irq = mp_irqs[idx].mp_srcbusirq;
+                irq = mp_irqs[idx].srcbusirq;
         } else {
                 /*
                  * PCI IRQs are mapped in order
@@ -1315,7 +1305,7 @@ __assign_irq_vector(int irq, struct irq_cfg *cfg, const struct cpumask *mask)
                 int new_cpu;
                 int vector, offset;
 
-                vector_allocation_domain(cpu, tmp_mask);
+                apic->vector_allocation_domain(cpu, tmp_mask);
 
                 vector = current_vector;
                 offset = current_offset;
@@ -1485,10 +1475,10 @@ static void ioapic_register_intr(int irq, struct irq_desc *desc, unsigned long t
                                               handle_edge_irq, "edge");
 }
 
-static int setup_ioapic_entry(int apic, int irq,
-                              struct IO_APIC_route_entry *entry,
-                              unsigned int destination, int trigger,
-                              int polarity, int vector)
+int setup_ioapic_entry(int apic_id, int irq,
+                       struct IO_APIC_route_entry *entry,
+                       unsigned int destination, int trigger,
+                       int polarity, int vector)
 {
         /*
          * add it to the IO-APIC irq-routing table:
@@ -1497,25 +1487,25 @@ static int setup_ioapic_entry(int apic, int irq,
 
 #ifdef CONFIG_INTR_REMAP
         if (intr_remapping_enabled) {
-                struct intel_iommu *iommu = map_ioapic_to_ir(apic);
+                struct intel_iommu *iommu = map_ioapic_to_ir(apic_id);
                 struct irte irte;
                 struct IR_IO_APIC_route_entry *ir_entry =
                         (struct IR_IO_APIC_route_entry *) entry;
                 int index;
 
                 if (!iommu)
-                        panic("No mapping iommu for ioapic %d\n", apic);
+                        panic("No mapping iommu for ioapic %d\n", apic_id);
 
                 index = alloc_irte(iommu, irq, 1);
                 if (index < 0)
-                        panic("Failed to allocate IRTE for ioapic %d\n", apic);
+                        panic("Failed to allocate IRTE for ioapic %d\n", apic_id);
 
                 memset(&irte, 0, sizeof(irte));
 
                 irte.present = 1;
-                irte.dst_mode = INT_DEST_MODE;
+                irte.dst_mode = apic->irq_dest_mode;
                 irte.trigger_mode = trigger;
-                irte.dlvry_mode = INT_DELIVERY_MODE;
+                irte.dlvry_mode = apic->irq_delivery_mode;
                 irte.vector = vector;
                 irte.dest_id = IRTE_DEST(destination);
 
@@ -1528,8 +1518,8 @@ static int setup_ioapic_entry(int apic, int irq,
         } else
 #endif
         {
-                entry->delivery_mode = INT_DELIVERY_MODE;
-                entry->dest_mode = INT_DEST_MODE;
+                entry->delivery_mode = apic->irq_delivery_mode;
+                entry->dest_mode = apic->irq_dest_mode;
                 entry->dest = destination;
         }
 
@@ -1546,7 +1536,7 @@ static int setup_ioapic_entry(int apic, int irq,
         return 0;
 }
 
-static void setup_IO_APIC_irq(int apic, int pin, unsigned int irq, struct irq_desc *desc,
+static void setup_IO_APIC_irq(int apic_id, int pin, unsigned int irq, struct irq_desc *desc,
                               int trigger, int polarity)
 {
         struct irq_cfg *cfg;
@@ -1558,22 +1548,22 @@ static void setup_IO_APIC_irq(int apic, int pin, unsigned int irq, struct irq_de
 
         cfg = desc->chip_data;
 
-        if (assign_irq_vector(irq, cfg, TARGET_CPUS))
+        if (assign_irq_vector(irq, cfg, apic->target_cpus()))
                 return;
 
-        dest = cpu_mask_to_apicid_and(cfg->domain, TARGET_CPUS);
+        dest = apic->cpu_mask_to_apicid_and(cfg->domain, apic->target_cpus());
 
         apic_printk(APIC_VERBOSE,KERN_DEBUG
                     "IOAPIC[%d]: Set routing entry (%d-%d -> 0x%x -> "
                     "IRQ %d Mode:%i Active:%i)\n",
-                    apic, mp_ioapics[apic].mp_apicid, pin, cfg->vector,
+                    apic_id, mp_ioapics[apic_id].apicid, pin, cfg->vector,
                     irq, trigger, polarity);
 
 
-        if (setup_ioapic_entry(mp_ioapics[apic].mp_apicid, irq, &entry,
+        if (setup_ioapic_entry(mp_ioapics[apic_id].apicid, irq, &entry,
                                dest, trigger, polarity, cfg->vector)) {
                 printk("Failed to setup ioapic entry for ioapic  %d, pin %d\n",
-                       mp_ioapics[apic].mp_apicid, pin);
+                       mp_ioapics[apic_id].apicid, pin);
                 __clear_irq_vector(irq, cfg);
                 return;
         }
@@ -1582,12 +1572,12 @@ static void setup_IO_APIC_irq(int apic, int pin, unsigned int irq, struct irq_de
         if (irq < NR_IRQS_LEGACY)
                 disable_8259A_irq(irq);
 
-        ioapic_write_entry(apic, pin, entry);
+        ioapic_write_entry(apic_id, pin, entry);
 }
 
 static void __init setup_IO_APIC_irqs(void)
 {
-        int apic, pin, idx, irq;
+        int apic_id, pin, idx, irq;
         int notcon = 0;
         struct irq_desc *desc;
         struct irq_cfg *cfg;
@@ -1595,21 +1585,19 @@ static void __init setup_IO_APIC_irqs(void)
 
         apic_printk(APIC_VERBOSE, KERN_DEBUG "init IO_APIC IRQs\n");
 
-        for (apic = 0; apic < nr_ioapics; apic++) {
-                for (pin = 0; pin < nr_ioapic_registers[apic]; pin++) {
+        for (apic_id = 0; apic_id < nr_ioapics; apic_id++) {
+                for (pin = 0; pin < nr_ioapic_registers[apic_id]; pin++) {
 
-                        idx = find_irq_entry(apic, pin, mp_INT);
+                        idx = find_irq_entry(apic_id, pin, mp_INT);
                         if (idx == -1) {
                                 if (!notcon) {
                                         notcon = 1;
                                         apic_printk(APIC_VERBOSE,
                                                 KERN_DEBUG " %d-%d",
-                                                mp_ioapics[apic].mp_apicid,
-                                                pin);
+                                                mp_ioapics[apic_id].apicid, pin);
                                 } else
                                         apic_printk(APIC_VERBOSE, " %d-%d",
-                                                mp_ioapics[apic].mp_apicid,
-                                                pin);
+                                                mp_ioapics[apic_id].apicid, pin);
                                 continue;
                         }
                         if (notcon) {
@@ -1618,20 +1606,25 @@ static void __init setup_IO_APIC_irqs(void)
                                 notcon = 0;
                         }
 
-                        irq = pin_2_irq(idx, apic, pin);
-#ifdef CONFIG_X86_32
-                        if (multi_timer_check(apic, irq))
+                        irq = pin_2_irq(idx, apic_id, pin);
+
+                        /*
+                         * Skip the timer IRQ if there's a quirk handler
+                         * installed and if it returns 1:
+                         */
+                        if (apic->multi_timer_check &&
+                                        apic->multi_timer_check(apic_id, irq))
                                 continue;
-#endif
+
                         desc = irq_to_desc_alloc_cpu(irq, cpu);
                         if (!desc) {
                                 printk(KERN_INFO "can not get irq_desc for %d\n", irq);
                                 continue;
                         }
                         cfg = desc->chip_data;
-                        add_pin_to_irq_cpu(cfg, cpu, apic, pin);
+                        add_pin_to_irq_cpu(cfg, cpu, apic_id, pin);
 
-                        setup_IO_APIC_irq(apic, pin, irq, desc,
+                        setup_IO_APIC_irq(apic_id, pin, irq, desc,
                                         irq_trigger(idx), irq_polarity(idx));
                 }
         }
@@ -1644,7 +1637,7 @@ static void __init setup_IO_APIC_irqs(void)
 /*
  * Set up the timer pin, possibly with the 8259A-master behind.
  */
-static void __init setup_timer_IRQ0_pin(unsigned int apic, unsigned int pin,
+static void __init setup_timer_IRQ0_pin(unsigned int apic_id, unsigned int pin,
                                         int vector)
 {
         struct IO_APIC_route_entry entry;
@@ -1660,10 +1653,10 @@ static void __init setup_timer_IRQ0_pin(unsigned int apic, unsigned int pin,
          * We use logical delivery to get the timer IRQ
          * to the first CPU.
          */
-        entry.dest_mode = INT_DEST_MODE;
-        entry.mask = 1;                                 /* mask IRQ now */
-        entry.dest = cpu_mask_to_apicid(TARGET_CPUS);
-        entry.delivery_mode = INT_DELIVERY_MODE;
+        entry.dest_mode = apic->irq_dest_mode;
+        entry.mask = 0;                 /* don't mask IRQ for edge */
+        entry.dest = apic->cpu_mask_to_apicid(apic->target_cpus());
+        entry.delivery_mode = apic->irq_delivery_mode;
         entry.polarity = 0;
         entry.trigger = 0;
         entry.vector = vector;
@@ -1677,7 +1670,7 @@ static void __init setup_timer_IRQ0_pin(unsigned int apic, unsigned int pin,
         /*
          * Add it to the IO-APIC irq-routing table:
          */
-        ioapic_write_entry(apic, pin, entry);
+        ioapic_write_entry(apic_id, pin, entry);
 }
 
 
@@ -1699,7 +1692,7 @@ __apicdebuginit(void) print_IO_APIC(void)
         printk(KERN_DEBUG "number of MP IRQ sources: %d.\n", mp_irq_entries);
         for (i = 0; i < nr_ioapics; i++)
                 printk(KERN_DEBUG "number of IO-APIC #%d registers: %d.\n",
-                       mp_ioapics[i].mp_apicid, nr_ioapic_registers[i]);
+                       mp_ioapics[i].apicid, nr_ioapic_registers[i]);
 
         /*
          * We are a bit conservative about what we expect.  We have to
@@ -1719,7 +1712,7 @@ __apicdebuginit(void) print_IO_APIC(void)
         spin_unlock_irqrestore(&ioapic_lock, flags);
 
         printk("\n");
-        printk(KERN_DEBUG "IO APIC #%d......\n", mp_ioapics[apic].mp_apicid);
+        printk(KERN_DEBUG "IO APIC #%d......\n", mp_ioapics[apic].apicid);
         printk(KERN_DEBUG ".... register #00: %08X\n", reg_00.raw);
         printk(KERN_DEBUG ".......    : physical APIC id: %02X\n", reg_00.bits.ID);
         printk(KERN_DEBUG ".......    : Delivery Type: %X\n", reg_00.bits.delivery_type);
@@ -1980,13 +1973,6 @@ void __init enable_IO_APIC(void)
         int apic;
         unsigned long flags;
 
-#ifdef CONFIG_X86_32
-        int i;
-        if (!pirqs_enabled)
-                for (i = 0; i < MAX_PIRQS; i++)
-                        pirq_entries[i] = -1;
-#endif
-
         /*
          * The number of IO-APIC IRQ registers (== #pins):
          */
@@ -2090,7 +2076,7 @@ static void __init setup_ioapic_ids_from_mpc(void)
 {
         union IO_APIC_reg_00 reg_00;
         physid_mask_t phys_id_present_map;
-        int apic;
+        int apic_id;
         int i;
         unsigned char old_id;
         unsigned long flags;
@@ -2109,26 +2095,26 @@ static void __init setup_ioapic_ids_from_mpc(void)
          * This is broken; anything with a real cpu count has to
          * circumvent this idiocy regardless.
          */
-        phys_id_present_map = ioapic_phys_id_map(phys_cpu_present_map);
+        phys_id_present_map = apic->ioapic_phys_id_map(phys_cpu_present_map);
 
         /*
          * Set the IOAPIC ID to the value stored in the MPC table.
          */
-        for (apic = 0; apic < nr_ioapics; apic++) {
+        for (apic_id = 0; apic_id < nr_ioapics; apic_id++) {
 
                 /* Read the register 0 value */
                 spin_lock_irqsave(&ioapic_lock, flags);
-                reg_00.raw = io_apic_read(apic, 0);
+                reg_00.raw = io_apic_read(apic_id, 0);
                 spin_unlock_irqrestore(&ioapic_lock, flags);
 
-                old_id = mp_ioapics[apic].mp_apicid;
+                old_id = mp_ioapics[apic_id].apicid;
 
-                if (mp_ioapics[apic].mp_apicid >= get_physical_broadcast()) {
+                if (mp_ioapics[apic_id].apicid >= get_physical_broadcast()) {
                         printk(KERN_ERR "BIOS bug, IO-APIC#%d ID is %d in the MPC table!...\n",
-                                apic, mp_ioapics[apic].mp_apicid);
+                                apic_id, mp_ioapics[apic_id].apicid);
                         printk(KERN_ERR "... fixing up to %d. (tell your hw vendor)\n",
                                 reg_00.bits.ID);
-                        mp_ioapics[apic].mp_apicid = reg_00.bits.ID;
+                        mp_ioapics[apic_id].apicid = reg_00.bits.ID;
                 }
 
                 /*
@@ -2136,10 +2122,10 @@ static void __init setup_ioapic_ids_from_mpc(void)
                  * system must have a unique ID or we get lots of nice
                  * 'stuck on smp_invalidate_needed IPI wait' messages.
                  */
-                if (check_apicid_used(phys_id_present_map,
-                                        mp_ioapics[apic].mp_apicid)) {
+                if (apic->check_apicid_used(phys_id_present_map,
+                                        mp_ioapics[apic_id].apicid)) {
                         printk(KERN_ERR "BIOS bug, IO-APIC#%d ID %d is already used!...\n",
-                                apic, mp_ioapics[apic].mp_apicid);
+                                apic_id, mp_ioapics[apic_id].apicid);
                         for (i = 0; i < get_physical_broadcast(); i++)
                                 if (!physid_isset(i, phys_id_present_map))
                                         break;
@@ -2148,13 +2134,13 @@ static void __init setup_ioapic_ids_from_mpc(void)
                         printk(KERN_ERR "... fixing up to %d. (tell your hw vendor)\n",
                                 i);
                         physid_set(i, phys_id_present_map);
-                        mp_ioapics[apic].mp_apicid = i;
+                        mp_ioapics[apic_id].apicid = i;
                 } else {
                         physid_mask_t tmp;
-                        tmp = apicid_to_cpu_present(mp_ioapics[apic].mp_apicid);
+                        tmp = apic->apicid_to_cpu_present(mp_ioapics[apic_id].apicid);
                         apic_printk(APIC_VERBOSE, "Setting %d in the "
                                         "phys_id_present_map\n",
-                                        mp_ioapics[apic].mp_apicid);
+                                        mp_ioapics[apic_id].apicid);
                         physids_or(phys_id_present_map, phys_id_present_map, tmp);
                 }
 
@@ -2163,11 +2149,11 @@ static void __init setup_ioapic_ids_from_mpc(void)
                  * We need to adjust the IRQ routing table
                  * if the ID changed.
                  */
-                if (old_id != mp_ioapics[apic].mp_apicid)
+                if (old_id != mp_ioapics[apic_id].apicid)
                         for (i = 0; i < mp_irq_entries; i++)
-                                if (mp_irqs[i].mp_dstapic == old_id)
-                                        mp_irqs[i].mp_dstapic
-                                                = mp_ioapics[apic].mp_apicid;
+                                if (mp_irqs[i].dstapic == old_id)
+                                        mp_irqs[i].dstapic
+                                                = mp_ioapics[apic_id].apicid;
 
                 /*
                  * Read the right value from the MPC table and
@@ -2175,20 +2161,20 @@ static void __init setup_ioapic_ids_from_mpc(void)
                  */
                 apic_printk(APIC_VERBOSE, KERN_INFO
                         "...changing IO-APIC physical APIC ID to %d ...",
-                        mp_ioapics[apic].mp_apicid);
+                        mp_ioapics[apic_id].apicid);
 
-                reg_00.bits.ID = mp_ioapics[apic].mp_apicid;
+                reg_00.bits.ID = mp_ioapics[apic_id].apicid;
                 spin_lock_irqsave(&ioapic_lock, flags);
-                io_apic_write(apic, 0, reg_00.raw);
+                io_apic_write(apic_id, 0, reg_00.raw);
                 spin_unlock_irqrestore(&ioapic_lock, flags);
 
                 /*
                  * Sanity check
                  */
                 spin_lock_irqsave(&ioapic_lock, flags);
-                reg_00.raw = io_apic_read(apic, 0);
+                reg_00.raw = io_apic_read(apic_id, 0);
                 spin_unlock_irqrestore(&ioapic_lock, flags);
-                if (reg_00.bits.ID != mp_ioapics[apic].mp_apicid)
+                if (reg_00.bits.ID != mp_ioapics[apic_id].apicid)
                         printk("could not set ID!\n");
                 else
                         apic_printk(APIC_VERBOSE, " ok.\n");
@@ -2291,7 +2277,7 @@ static int ioapic_retrigger_irq(unsigned int irq)
         unsigned long flags;
 
         spin_lock_irqsave(&vector_lock, flags);
-        send_IPI_mask(cpumask_of(cpumask_first(cfg->domain)), cfg->vector);
+        apic->send_IPI_mask(cpumask_of(cpumask_first(cfg->domain)), cfg->vector);
         spin_unlock_irqrestore(&vector_lock, flags);
 
         return 1;
@@ -2299,7 +2285,7 @@ static int ioapic_retrigger_irq(unsigned int irq)
 #else
 static int ioapic_retrigger_irq(unsigned int irq)
 {
-        send_IPI_self(irq_cfg(irq)->vector);
+        apic->send_IPI_self(irq_cfg(irq)->vector);
 
         return 1;
 }
@@ -2363,7 +2349,7 @@ migrate_ioapic_irq_desc(struct irq_desc *desc, const struct cpumask *mask)
 
         set_extra_move_desc(desc, mask);
 
-        dest = cpu_mask_to_apicid_and(cfg->domain, mask);
+        dest = apic->cpu_mask_to_apicid_and(cfg->domain, mask);
 
         modify_ioapic_rte = desc->status & IRQ_LEVEL;
         if (modify_ioapic_rte) {
@@ -2383,7 +2369,7 @@ migrate_ioapic_irq_desc(struct irq_desc *desc, const struct cpumask *mask)
         if (cfg->move_in_progress)
                 send_cleanup_vector(cfg);
 
-        cpumask_copy(&desc->affinity, mask);
+        cpumask_copy(desc->affinity, mask);
 }
 
 static int migrate_irq_remapped_level_desc(struct irq_desc *desc)
@@ -2405,11 +2391,11 @@ static int migrate_irq_remapped_level_desc(struct irq_desc *desc)
         }
 
         /* everthing is clear. we have right of way */
-        migrate_ioapic_irq_desc(desc, &desc->pending_mask);
+        migrate_ioapic_irq_desc(desc, desc->pending_mask);
 
         ret = 0;
         desc->status &= ~IRQ_MOVE_PENDING;
-        cpumask_clear(&desc->pending_mask);
+        cpumask_clear(desc->pending_mask);
 
 unmask:
         unmask_IO_APIC_irq_desc(desc);
@@ -2434,7 +2420,7 @@ static void ir_irq_migration(struct work_struct *work)
                                 continue;
                         }
 
-                        desc->chip->set_affinity(irq, &desc->pending_mask);
+                        desc->chip->set_affinity(irq, desc->pending_mask);
                         spin_unlock_irqrestore(&desc->lock, flags);
                 }
         }
@@ -2448,7 +2434,7 @@ static void set_ir_ioapic_affinity_irq_desc(struct irq_desc *desc,
 {
         if (desc->status & IRQ_LEVEL) {
                 desc->status |= IRQ_MOVE_PENDING;
-                cpumask_copy(&desc->pending_mask, mask);
+                cpumask_copy(desc->pending_mask, mask);
                 migrate_irq_remapped_level_desc(desc);
                 return;
         }
@@ -2516,7 +2502,7 @@ static void irq_complete_move(struct irq_desc **descp)
 
                 /* domain has not changed, but affinity did */
                 me = smp_processor_id();
-                if (cpu_isset(me, desc->affinity)) {
+                if (cpumask_test_cpu(me, desc->affinity)) {
                         *descp = desc = move_irq_desc(desc, me);
                         /* get the new one */
                         cfg = desc->chip_data;
@@ -2867,19 +2853,15 @@ static inline void __init check_timer(void)
         int cpu = boot_cpu_id;
         int apic1, pin1, apic2, pin2;
         unsigned long flags;
-        unsigned int ver;
         int no_pin1 = 0;
 
         local_irq_save(flags);
 
-        ver = apic_read(APIC_LVR);
-        ver = GET_APIC_VERSION(ver);
-
         /*
          * get/set the timer IRQ vector:
          */
         disable_8259A_irq(0);
-        assign_irq_vector(0, cfg, TARGET_CPUS);
+        assign_irq_vector(0, cfg, apic->target_cpus());
 
         /*
          * As IRQ0 is to be enabled in the 8259A, the virtual
@@ -2893,7 +2875,13 @@ static inline void __init check_timer(void)
         apic_write(APIC_LVT0, APIC_LVT_MASKED | APIC_DM_EXTINT);
         init_8259A(1);
 #ifdef CONFIG_X86_32
-        timer_ack = (nmi_watchdog == NMI_IO_APIC && !APIC_INTEGRATED(ver));
+        {
+                unsigned int ver;
+
+                ver = apic_read(APIC_LVR);
+                ver = GET_APIC_VERSION(ver);
+                timer_ack = (nmi_watchdog == NMI_IO_APIC && !APIC_INTEGRATED(ver));
+        }
 #endif
 
         pin1  = find_isa_irq_pin(0, mp_INT);
@@ -2932,8 +2920,17 @@ static inline void __init check_timer(void)
                 if (no_pin1) {
                         add_pin_to_irq_cpu(cfg, cpu, apic1, pin1);
                         setup_timer_IRQ0_pin(apic1, pin1, cfg->vector);
+                } else {
+                        /* for edge trigger, setup_IO_APIC_irq already
+                         * leave it unmasked.
+                         * so only need to unmask if it is level-trigger
+                         * do we really have level trigger timer?
+                         */
+                        int idx;
+                        idx = find_irq_entry(apic1, pin1, mp_INT);
+                        if (idx != -1 && irq_trigger(idx))
+                                unmask_IO_APIC_irq_desc(desc);
                 }
-                unmask_IO_APIC_irq_desc(desc);
                 if (timer_irq_works()) {
                         if (nmi_watchdog == NMI_IO_APIC) {
                                 setup_nmi();
@@ -2947,6 +2944,7 @@ static inline void __init check_timer(void)
                 if (intr_remapping_enabled)
                         panic("timer doesn't work through Interrupt-remapped IO-APIC");
 #endif
+                local_irq_disable();
                 clear_IO_APIC_pin(apic1, pin1);
                 if (!no_pin1)
                         apic_printk(APIC_QUIET, KERN_ERR "..MP-BIOS bug: "
@@ -2961,7 +2959,6 @@ static inline void __init check_timer(void)
                  */
                 replace_pin_at_irq_cpu(cfg, cpu, apic1, pin1, apic2, pin2);
                 setup_timer_IRQ0_pin(apic2, pin2, cfg->vector);
-                unmask_IO_APIC_irq_desc(desc);
                 enable_8259A_irq(0);
                 if (timer_irq_works()) {
                         apic_printk(APIC_QUIET, KERN_INFO "....... works.\n");
@@ -2976,6 +2973,7 @@ static inline void __init check_timer(void)
                 /*
                  * Cleanup, just in case ...
                  */
+                local_irq_disable();
                 disable_8259A_irq(0);
                 clear_IO_APIC_pin(apic2, pin2);
                 apic_printk(APIC_QUIET, KERN_INFO "....... failed.\n");
@@ -3001,6 +2999,7 @@ static inline void __init check_timer(void)
                 apic_printk(APIC_QUIET, KERN_INFO "..... works.\n");
                 goto out;
         }
+        local_irq_disable();
         disable_8259A_irq(0);
         apic_write(APIC_LVT0, APIC_LVT_MASKED | APIC_DM_FIXED | cfg->vector);
         apic_printk(APIC_QUIET, KERN_INFO "..... failed.\n");
@@ -3018,6 +3017,7 @@ static inline void __init check_timer(void)
                 apic_printk(APIC_QUIET, KERN_INFO "..... works.\n");
                 goto out;
         }
+        local_irq_disable();
         apic_printk(APIC_QUIET, KERN_INFO "..... failed :(.\n");
         panic("IO-APIC + timer doesn't work!  Boot with apic=debug and send a "
                 "report.  Then try booting with the 'noapic' option.\n");
@@ -3047,13 +3047,9 @@ out:
 void __init setup_IO_APIC(void)
 {
 
-#ifdef CONFIG_X86_32
-        enable_IO_APIC();
-#else
         /*
          * calling enable_IO_APIC() is moved to setup_local_APIC for BP
          */
-#endif
 
         io_apic_irqs = ~PIC_IRQS;
 
@@ -3118,8 +3114,8 @@ static int ioapic_resume(struct sys_device *dev)
 
         spin_lock_irqsave(&ioapic_lock, flags);
         reg_00.raw = io_apic_read(dev->id, 0);
-        if (reg_00.bits.ID != mp_ioapics[dev->id].mp_apicid) {
-                reg_00.bits.ID = mp_ioapics[dev->id].mp_apicid;
+        if (reg_00.bits.ID != mp_ioapics[dev->id].apicid) {
+                reg_00.bits.ID = mp_ioapics[dev->id].apicid;
                 io_apic_write(dev->id, 0, reg_00.raw);
         }
         spin_unlock_irqrestore(&ioapic_lock, flags);
@@ -3169,6 +3165,7 @@ static int __init ioapic_init_sysfs(void)
 
 device_initcall(ioapic_init_sysfs);
 
+static int nr_irqs_gsi = NR_IRQS_LEGACY;
 /*
  * Dynamic irq allocate and deallocation
  */
@@ -3183,11 +3180,11 @@ unsigned int create_irq_nr(unsigned int irq_want)
         struct irq_desc *desc_new = NULL;
 
         irq = 0;
-        spin_lock_irqsave(&vector_lock, flags);
-        for (new = irq_want; new < NR_IRQS; new++) {
-                if (platform_legacy_irq(new))
-                        continue;
+        if (irq_want < nr_irqs_gsi)
+                irq_want = nr_irqs_gsi;
 
+        spin_lock_irqsave(&vector_lock, flags);
+        for (new = irq_want; new < nr_irqs; new++) {
                 desc_new = irq_to_desc_alloc_cpu(new, cpu);
                 if (!desc_new) {
                         printk(KERN_INFO "can not get irq_desc for %d\n", new);
@@ -3197,7 +3194,7 @@ unsigned int create_irq_nr(unsigned int irq_want)
 
                 if (cfg_new->vector != 0)
                         continue;
-                if (__assign_irq_vector(new, cfg_new, TARGET_CPUS) == 0)
+                if (__assign_irq_vector(new, cfg_new, apic->target_cpus()) == 0)
                         irq = new;
                 break;
         }
@@ -3212,7 +3209,6 @@ unsigned int create_irq_nr(unsigned int irq_want)
         return irq;
 }
 
-static int nr_irqs_gsi = NR_IRQS_LEGACY;
 int create_irq(void)
 {
         unsigned int irq_want;
@@ -3259,12 +3255,15 @@ static int msi_compose_msg(struct pci_dev *pdev, unsigned int irq, struct msi_ms
         int err;
         unsigned dest;
 
+        if (disable_apic)
+                return -ENXIO;
+
         cfg = irq_cfg(irq);
-        err = assign_irq_vector(irq, cfg, TARGET_CPUS);
+        err = assign_irq_vector(irq, cfg, apic->target_cpus());
         if (err)
                 return err;
 
-        dest = cpu_mask_to_apicid_and(cfg->domain, TARGET_CPUS);
+        dest = apic->cpu_mask_to_apicid_and(cfg->domain, apic->target_cpus());
 
 #ifdef CONFIG_INTR_REMAP
         if (irq_remapped(irq)) {
@@ -3278,9 +3277,9 @@ static int msi_compose_msg(struct pci_dev *pdev, unsigned int irq, struct msi_ms
                 memset (&irte, 0, sizeof(irte));
 
                 irte.present = 1;
-                irte.dst_mode = INT_DEST_MODE;
+                irte.dst_mode = apic->irq_dest_mode;
                 irte.trigger_mode = 0; /* edge */
-                irte.dlvry_mode = INT_DELIVERY_MODE;
+                irte.dlvry_mode = apic->irq_delivery_mode;
                 irte.vector = cfg->vector;
                 irte.dest_id = IRTE_DEST(dest);
 
@@ -3298,10 +3297,10 @@ static int msi_compose_msg(struct pci_dev *pdev, unsigned int irq, struct msi_ms
                 msg->address_hi = MSI_ADDR_BASE_HI;
                 msg->address_lo =
                         MSI_ADDR_BASE_LO |
-                        ((INT_DEST_MODE == 0) ?
+                        ((apic->irq_dest_mode == 0) ?
                                 MSI_ADDR_DEST_MODE_PHYSICAL:
                                 MSI_ADDR_DEST_MODE_LOGICAL) |
-                        ((INT_DELIVERY_MODE != dest_LowestPrio) ?
+                        ((apic->irq_delivery_mode != dest_LowestPrio) ?
                                 MSI_ADDR_REDIRECTION_CPU:
                                 MSI_ADDR_REDIRECTION_LOWPRI) |
                         MSI_ADDR_DEST_ID(dest);
@@ -3309,7 +3308,7 @@ static int msi_compose_msg(struct pci_dev *pdev, unsigned int irq, struct msi_ms
                 msg->data =
                         MSI_DATA_TRIGGER_EDGE |
                         MSI_DATA_LEVEL_ASSERT |
-                        ((INT_DELIVERY_MODE != dest_LowestPrio) ?
+                        ((apic->irq_delivery_mode != dest_LowestPrio) ?
                                 MSI_DATA_DELIVERY_FIXED:
                                 MSI_DATA_DELIVERY_LOWPRI) |
                         MSI_DATA_VECTOR(cfg->vector);
@@ -3464,40 +3463,6 @@ static int setup_msi_irq(struct pci_dev *dev, struct msi_desc *msidesc, int irq)
         return 0;
 }
 
-int arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *msidesc)
-{
-        unsigned int irq;
-        int ret;
-        unsigned int irq_want;
-
-        irq_want = nr_irqs_gsi;
-        irq = create_irq_nr(irq_want);
-        if (irq == 0)
-                return -1;
-
-#ifdef CONFIG_INTR_REMAP
-        if (!intr_remapping_enabled)
-                goto no_ir;
-
-        ret = msi_alloc_irte(dev, irq, 1);
-        if (ret < 0)
-                goto error;
-no_ir:
-#endif
-        ret = setup_msi_irq(dev, msidesc, irq);
-        if (ret < 0) {
-                destroy_irq(irq);
-                return ret;
-        }
-        return 0;
-
-#ifdef CONFIG_INTR_REMAP
-error:
-        destroy_irq(irq);
-        return ret;
-#endif
-}
-
 int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
 {
         unsigned int irq;
@@ -3514,9 +3479,9 @@ int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
         sub_handle = 0;
         list_for_each_entry(msidesc, &dev->msi_list, list) {
                 irq = create_irq_nr(irq_want);
-                irq_want++;
                 if (irq == 0)
                         return -1;
+                irq_want = irq + 1;
 #ifdef CONFIG_INTR_REMAP
                 if (!intr_remapping_enabled)
                         goto no_ir;
@@ -3727,13 +3692,17 @@ int arch_setup_ht_irq(unsigned int irq, struct pci_dev *dev)
         struct irq_cfg *cfg;
         int err;
 
+        if (disable_apic)
+                return -ENXIO;
+
         cfg = irq_cfg(irq);
-        err = assign_irq_vector(irq, cfg, TARGET_CPUS);
+        err = assign_irq_vector(irq, cfg, apic->target_cpus());
         if (!err) {
                 struct ht_irq_msg msg;
                 unsigned dest;
 
-                dest = cpu_mask_to_apicid_and(cfg->domain, TARGET_CPUS);
+                dest = apic->cpu_mask_to_apicid_and(cfg->domain,
+                                                    apic->target_cpus());
 
                 msg.address_hi = HT_IRQ_HIGH_DEST_ID(dest);
 
@@ -3741,11 +3710,11 @@ int arch_setup_ht_irq(unsigned int irq, struct pci_dev *dev)
                         HT_IRQ_LOW_BASE |
                         HT_IRQ_LOW_DEST_ID(dest) |
                         HT_IRQ_LOW_VECTOR(cfg->vector) |
-                        ((INT_DEST_MODE == 0) ?
+                        ((apic->irq_dest_mode == 0) ?
                                 HT_IRQ_LOW_DM_PHYSICAL :
                                 HT_IRQ_LOW_DM_LOGICAL) |
                         HT_IRQ_LOW_RQEOI_EDGE |
-                        ((INT_DELIVERY_MODE != dest_LowestPrio) ?
+                        ((apic->irq_delivery_mode != dest_LowestPrio) ?
                                 HT_IRQ_LOW_MT_FIXED :
                                 HT_IRQ_LOW_MT_ARBITRATED) |
                         HT_IRQ_LOW_IRQ_MASKED;
@@ -3761,7 +3730,7 @@ int arch_setup_ht_irq(unsigned int irq, struct pci_dev *dev)
 }
 #endif /* CONFIG_HT_IRQ */
 
-#ifdef CONFIG_X86_64
+#ifdef CONFIG_X86_UV
 /*
  * Re-target the irq to the specified CPU and enable the specified MMR located
  * on the specified blade to allow the sending of MSIs to the specified CPU.
@@ -3793,12 +3762,12 @@ int arch_enable_uv_irq(char *irq_name, unsigned int irq, int cpu, int mmr_blade,
         BUG_ON(sizeof(struct uv_IO_APIC_route_entry) != sizeof(unsigned long));
 
         entry->vector = cfg->vector;
-        entry->delivery_mode = INT_DELIVERY_MODE;
-        entry->dest_mode = INT_DEST_MODE;
+        entry->delivery_mode = apic->irq_delivery_mode;
+        entry->dest_mode = apic->irq_dest_mode;
         entry->polarity = 0;
         entry->trigger = 0;
         entry->mask = 0;
-        entry->dest = cpu_mask_to_apicid(eligible_cpu);
+        entry->dest = apic->cpu_mask_to_apicid(eligible_cpu);
 
         mmr_pnode = uv_blade_to_pnode(mmr_blade);
         uv_write_global_mmr64(mmr_pnode, mmr_offset, mmr_value);
@@ -3861,6 +3830,28 @@ void __init probe_nr_irqs_gsi(void)
         printk(KERN_DEBUG "nr_irqs_gsi: %d\n", nr_irqs_gsi);
 }
 
+#ifdef CONFIG_SPARSE_IRQ
+int __init arch_probe_nr_irqs(void)
+{
+        int nr;
+
+        if (nr_irqs > (NR_VECTORS * nr_cpu_ids))
+                nr_irqs = NR_VECTORS * nr_cpu_ids;
+
+        nr = nr_irqs_gsi + 8 * nr_cpu_ids;
+#if defined(CONFIG_PCI_MSI) || defined(CONFIG_HT_IRQ)
+        /*
+         * for MSI and HT dyn irq
+         */
+        nr += nr_irqs_gsi * 16;
+#endif
+        if (nr < nr_irqs)
+                nr_irqs = nr;
+
+        return 0;
+}
+#endif
+
 /* --------------------------------------------------------------------------
                           ACPI-based IOAPIC Configuration
    -------------------------------------------------------------------------- */
@@ -3886,7 +3877,7 @@ int __init io_apic_get_unique_id(int ioapic, int apic_id)
          */
 
         if (physids_empty(apic_id_map))
-                apic_id_map = ioapic_phys_id_map(phys_cpu_present_map);
+                apic_id_map = apic->ioapic_phys_id_map(phys_cpu_present_map);
 
         spin_lock_irqsave(&ioapic_lock, flags);
         reg_00.raw = io_apic_read(ioapic, 0);
@@ -3902,10 +3893,10 @@ int __init io_apic_get_unique_id(int ioapic, int apic_id)
          * Every APIC in a system must have a unique ID or we get lots of nice
          * 'stuck on smp_invalidate_needed IPI wait' messages.
          */
-        if (check_apicid_used(apic_id_map, apic_id)) {
+        if (apic->check_apicid_used(apic_id_map, apic_id)) {
 
                 for (i = 0; i < get_physical_broadcast(); i++) {
-                        if (!check_apicid_used(apic_id_map, i))
+                        if (!apic->check_apicid_used(apic_id_map, i))
                                 break;
                 }
 
@@ -3918,7 +3909,7 @@ int __init io_apic_get_unique_id(int ioapic, int apic_id)
                 apic_id = i;
         }
 
-        tmp = apicid_to_cpu_present(apic_id);
+        tmp = apic->apicid_to_cpu_present(apic_id);
         physids_or(apic_id_map, apic_id_map, tmp);
 
         if (reg_00.bits.ID != apic_id) {
@@ -3995,8 +3986,8 @@ int acpi_get_override_irq(int bus_irq, int *trigger, int *polarity)
                 return -1;
 
         for (i = 0; i < mp_irq_entries; i++)
-                if (mp_irqs[i].mp_irqtype == mp_INT &&
-                    mp_irqs[i].mp_srcbusirq == bus_irq)
+                if (mp_irqs[i].irqtype == mp_INT &&
+                    mp_irqs[i].srcbusirq == bus_irq)
                         break;
         if (i >= mp_irq_entries)
                 return -1;
@@ -4011,7 +4002,7 @@ int acpi_get_override_irq(int bus_irq, int *trigger, int *polarity)
 /*
  * This function currently is only a helper for the i386 smp boot process where
  * we need to reprogram the ioredtbls to cater for the cpus which have come online
- * so mask in all cases should simply be TARGET_CPUS
+ * so mask in all cases should simply be apic->target_cpus()
  */
 #ifdef CONFIG_SMP
 void __init setup_ioapic_dest(void)
@@ -4050,9 +4041,9 @@ void __init setup_ioapic_dest(void)
                          */
                         if (desc->status &
                             (IRQ_NO_BALANCING | IRQ_AFFINITY_SET))
-                                mask = &desc->affinity;
+                                mask = desc->affinity;
                         else
-                                mask = TARGET_CPUS;
+                                mask = apic->target_cpus();
 
 #ifdef CONFIG_INTR_REMAP
                         if (intr_remapping_enabled)
@@ -4111,7 +4102,7 @@ void __init ioapic_init_mappings(void)
         ioapic_res = ioapic_setup_resources();
         for (i = 0; i < nr_ioapics; i++) {
                 if (smp_found_config) {
-                        ioapic_phys = mp_ioapics[i].mp_apicaddr;
+                        ioapic_phys = mp_ioapics[i].apicaddr;
 #ifdef CONFIG_X86_32
                         if (!ioapic_phys) {
                                 printk(KERN_ERR
diff --git a/arch/x86/kernel/apic/ipi.c b/arch/x86/kernel/apic/ipi.c
new file mode 100644
index 000000000000..dbf5445727a9
--- /dev/null
+++ b/arch/x86/kernel/apic/ipi.c
@@ -0,0 +1,164 @@
+#include <linux/cpumask.h>
+#include <linux/interrupt.h>
+#include <linux/init.h>
+
+#include <linux/mm.h>
+#include <linux/delay.h>
+#include <linux/spinlock.h>
+#include <linux/kernel_stat.h>
+#include <linux/mc146818rtc.h>
+#include <linux/cache.h>
+#include <linux/cpu.h>
+#include <linux/module.h>
+
+#include <asm/smp.h>
+#include <asm/mtrr.h>
+#include <asm/tlbflush.h>
+#include <asm/mmu_context.h>
+#include <asm/apic.h>
+#include <asm/proto.h>
+#include <asm/ipi.h>
+
+void default_send_IPI_mask_sequence_phys(const struct cpumask *mask, int vector)
+{
+        unsigned long query_cpu;
+        unsigned long flags;
+
+        /*
+         * Hack. The clustered APIC addressing mode doesn't allow us to send
+         * to an arbitrary mask, so I do a unicast to each CPU instead.
+         * - mbligh
+         */
+        local_irq_save(flags);
+        for_each_cpu(query_cpu, mask) {
+                __default_send_IPI_dest_field(per_cpu(x86_cpu_to_apicid,
+                                query_cpu), vector, APIC_DEST_PHYSICAL);
+        }
+        local_irq_restore(flags);
+}
+
+void default_send_IPI_mask_allbutself_phys(const struct cpumask *mask,
+                                                 int vector)
+{
+        unsigned int this_cpu = smp_processor_id();
+        unsigned int query_cpu;
+        unsigned long flags;
+
+        /* See Hack comment above */
+
+        local_irq_save(flags);
+        for_each_cpu(query_cpu, mask) {
+                if (query_cpu == this_cpu)
+                        continue;
+                __default_send_IPI_dest_field(per_cpu(x86_cpu_to_apicid,
+                                 query_cpu), vector, APIC_DEST_PHYSICAL);
+        }
+        local_irq_restore(flags);
+}
+
+void default_send_IPI_mask_sequence_logical(const struct cpumask *mask,
+                                                 int vector)
+{
+        unsigned long flags;
+        unsigned int query_cpu;
+
+        /*
+         * Hack. The clustered APIC addressing mode doesn't allow us to send
+         * to an arbitrary mask, so I do a unicasts to each CPU instead. This
+         * should be modified to do 1 message per cluster ID - mbligh
+         */
+
+        local_irq_save(flags);
+        for_each_cpu(query_cpu, mask)
+                __default_send_IPI_dest_field(
+                        apic->cpu_to_logical_apicid(query_cpu), vector,
+                        apic->dest_logical);
+        local_irq_restore(flags);
+}
+
+void default_send_IPI_mask_allbutself_logical(const struct cpumask *mask,
+                                                 int vector)
+{
+        unsigned long flags;
+        unsigned int query_cpu;
+        unsigned int this_cpu = smp_processor_id();
+
+        /* See Hack comment above */
+
+        local_irq_save(flags);
+        for_each_cpu(query_cpu, mask) {
+                if (query_cpu == this_cpu)
+                        continue;
+                __default_send_IPI_dest_field(
+                        apic->cpu_to_logical_apicid(query_cpu), vector,
+                        apic->dest_logical);
+                }
+        local_irq_restore(flags);
+}
+
+#ifdef CONFIG_X86_32
+
+/*
+ * This is only used on smaller machines.
+ */
+void default_send_IPI_mask_logical(const struct cpumask *cpumask, int vector)
+{
+        unsigned long mask = cpumask_bits(cpumask)[0];
+        unsigned long flags;
+
+        local_irq_save(flags);
+        WARN_ON(mask & ~cpumask_bits(cpu_online_mask)[0]);
+        __default_send_IPI_dest_field(mask, vector, apic->dest_logical);
+        local_irq_restore(flags);
+}
+
+void default_send_IPI_allbutself(int vector)
+{
+        /*
+         * if there are no other CPUs in the system then we get an APIC send
+         * error if we try to broadcast, thus avoid sending IPIs in this case.
+         */
+        if (!(num_online_cpus() > 1))
+                return;
+
+        __default_local_send_IPI_allbutself(vector);
+}
+
+void default_send_IPI_all(int vector)
+{
+        __default_local_send_IPI_all(vector);
+}
+
+void default_send_IPI_self(int vector)
+{
+        __default_send_IPI_shortcut(APIC_DEST_SELF, vector, apic->dest_logical);
+}
+
+/* must come after the send_IPI functions above for inlining */
+static int convert_apicid_to_cpu(int apic_id)
+{
+        int i;
+
+        for_each_possible_cpu(i) {
+                if (per_cpu(x86_cpu_to_apicid, i) == apic_id)
+                        return i;
+        }
+        return -1;
+}
+
+int safe_smp_processor_id(void)
+{
+        int apicid, cpuid;
+
+        if (!boot_cpu_has(X86_FEATURE_APIC))
+                return 0;
+
+        apicid = hard_smp_processor_id();
+        if (apicid == BAD_APICID)
+                return 0;
+
+        cpuid = convert_apicid_to_cpu(apicid);
+
+        return cpuid >= 0 ? cpuid : 0;
+}
+#endif
diff --git a/arch/x86/kernel/nmi.c b/arch/x86/kernel/apic/nmi.c
index 7228979f1e7f..bdfad80c3cf1 100644
--- a/arch/x86/kernel/nmi.c
+++ b/arch/x86/kernel/apic/nmi.c
@@ -34,7 +34,7 @@
 
 #include <asm/mce.h>
 
-#include <mach_traps.h>
+#include <asm/mach_traps.h>
 
 int unknown_nmi_panic;
 int nmi_watchdog_enabled;
@@ -61,11 +61,7 @@ static int endflag __initdata;
 
 static inline unsigned int get_nmi_count(int cpu)
 {
-#ifdef CONFIG_X86_64
-        return cpu_pda(cpu)->__nmi_count;
-#else
-        return nmi_count(cpu);
-#endif
+        return per_cpu(irq_stat, cpu).__nmi_count;
 }
 
 static inline int mce_in_progress(void)
@@ -82,12 +78,8 @@ static inline int mce_in_progress(void)
  */
 static inline unsigned int get_timer_irqs(int cpu)
 {
-#ifdef CONFIG_X86_64
-        return read_pda(apic_timer_irqs) + read_pda(irq0_irqs);
-#else
         return per_cpu(irq_stat, cpu).apic_timer_irqs +
                 per_cpu(irq_stat, cpu).irq0_irqs;
-#endif
 }
 
 #ifdef CONFIG_SMP
diff --git a/arch/x86/kernel/apic/numaq_32.c b/arch/x86/kernel/apic/numaq_32.c
new file mode 100644
index 000000000000..ba2fc6465534
--- /dev/null
+++ b/arch/x86/kernel/apic/numaq_32.c
@@ -0,0 +1,557 @@
+/*
+ * Written by: Patricia Gaughen, IBM Corporation
+ *
+ * Copyright (C) 2002, IBM Corp.
+ * Copyright (C) 2009, Red Hat, Inc., Ingo Molnar
+ *
+ * All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
+ * NON INFRINGEMENT.  See the GNU General Public License for more
+ * details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ *
+ * Send feedback to <gone@us.ibm.com>
+ */
+#include <linux/nodemask.h>
+#include <linux/topology.h>
+#include <linux/bootmem.h>
+#include <linux/threads.h>
+#include <linux/cpumask.h>
+#include <linux/kernel.h>
+#include <linux/mmzone.h>
+#include <linux/module.h>
+#include <linux/string.h>
+#include <linux/init.h>
+#include <linux/numa.h>
+#include <linux/smp.h>
+#include <linux/io.h>
+#include <linux/mm.h>
+
+#include <asm/processor.h>
+#include <asm/fixmap.h>
+#include <asm/mpspec.h>
+#include <asm/numaq.h>
+#include <asm/setup.h>
+#include <asm/apic.h>
+#include <asm/e820.h>
+#include <asm/ipi.h>
+
+#define MB_TO_PAGES(addr)               ((addr) << (20 - PAGE_SHIFT))
+
+int found_numaq;
+
+/*
+ * Have to match translation table entries to main table entries by counter
+ * hence the mpc_record variable .... can't see a less disgusting way of
+ * doing this ....
+ */
+struct mpc_trans {
+        unsigned char                   mpc_type;
+        unsigned char                   trans_len;
+        unsigned char                   trans_type;
+        unsigned char                   trans_quad;
+        unsigned char                   trans_global;
+        unsigned char                   trans_local;
+        unsigned short                  trans_reserved;
+};
+
+/* x86_quirks member */
+static int                              mpc_record;
+
+static struct mpc_trans                 *translation_table[MAX_MPC_ENTRY];
+
+int                                     mp_bus_id_to_node[MAX_MP_BUSSES];
+int                                     mp_bus_id_to_local[MAX_MP_BUSSES];
+int                                     quad_local_to_mp_bus_id[NR_CPUS/4][4];
+
+
+static inline void numaq_register_node(int node, struct sys_cfg_data *scd)
+{
+        struct eachquadmem *eq = scd->eq + node;
+
+        node_set_online(node);
+
+        /* Convert to pages */
+        node_start_pfn[node] =
+                 MB_TO_PAGES(eq->hi_shrd_mem_start - eq->priv_mem_size);
+
+        node_end_pfn[node] =
+                 MB_TO_PAGES(eq->hi_shrd_mem_start + eq->hi_shrd_mem_size);
+
+        e820_register_active_regions(node, node_start_pfn[node],
+                                                node_end_pfn[node]);
+
+        memory_present(node, node_start_pfn[node], node_end_pfn[node]);
+
+        node_remap_size[node] = node_memmap_size_bytes(node,
+                                        node_start_pfn[node],
+                                        node_end_pfn[node]);
+}
+
+/*
+ * Function: smp_dump_qct()
+ *
+ * Description: gets memory layout from the quad config table.  This
+ * function also updates node_online_map with the nodes (quads) present.
+ */
+static void __init smp_dump_qct(void)
+{
+        struct sys_cfg_data *scd;
+        int node;
+
+        scd = (void *)__va(SYS_CFG_DATA_PRIV_ADDR);
+
+        nodes_clear(node_online_map);
+        for_each_node(node) {
+                if (scd->quads_present31_0 & (1 << node))
+                        numaq_register_node(node, scd);
+        }
+}
+
+void __cpuinit numaq_tsc_disable(void)
+{
+        if (!found_numaq)
+                return;
+
+        if (num_online_nodes() > 1) {
+                printk(KERN_DEBUG "NUMAQ: disabling TSC\n");
+                setup_clear_cpu_cap(X86_FEATURE_TSC);
+        }
+}
+
+static int __init numaq_pre_time_init(void)
+{
+        numaq_tsc_disable();
+        return 0;
+}
+
+static inline int generate_logical_apicid(int quad, int phys_apicid)
+{
+        return (quad << 4) + (phys_apicid ? phys_apicid << 1 : 1);
+}
+
+/* x86_quirks member */
+static int mpc_apic_id(struct mpc_cpu *m)
+{
+        int quad = translation_table[mpc_record]->trans_quad;
+        int logical_apicid = generate_logical_apicid(quad, m->apicid);
+
+        printk(KERN_DEBUG
+                "Processor #%d %u:%u APIC version %d (quad %d, apic %d)\n",
+                 m->apicid, (m->cpufeature & CPU_FAMILY_MASK) >> 8,
+                (m->cpufeature & CPU_MODEL_MASK) >> 4,
+                 m->apicver, quad, logical_apicid);
+
+        return logical_apicid;
+}
+
+/* x86_quirks member */
+static void mpc_oem_bus_info(struct mpc_bus *m, char *name)
+{
+        int quad = translation_table[mpc_record]->trans_quad;
+        int local = translation_table[mpc_record]->trans_local;
+
+        mp_bus_id_to_node[m->busid] = quad;
+        mp_bus_id_to_local[m->busid] = local;
+
+        printk(KERN_INFO "Bus #%d is %s (node %d)\n", m->busid, name, quad);
+}
+
+/* x86_quirks member */
+static void mpc_oem_pci_bus(struct mpc_bus *m)
+{
+        int quad = translation_table[mpc_record]->trans_quad;
+        int local = translation_table[mpc_record]->trans_local;
+
+        quad_local_to_mp_bus_id[quad][local] = m->busid;
+}
+
+static void __init MP_translation_info(struct mpc_trans *m)
+{
+        printk(KERN_INFO
+            "Translation: record %d, type %d, quad %d, global %d, local %d\n",
+               mpc_record, m->trans_type, m->trans_quad, m->trans_global,
+               m->trans_local);
+
+        if (mpc_record >= MAX_MPC_ENTRY)
+                printk(KERN_ERR "MAX_MPC_ENTRY exceeded!\n");
+        else
+                translation_table[mpc_record] = m; /* stash this for later */
+
+        if (m->trans_quad < MAX_NUMNODES && !node_online(m->trans_quad))
+                node_set_online(m->trans_quad);
+}
+
+static int __init mpf_checksum(unsigned char *mp, int len)
+{
+        int sum = 0;
+
+        while (len--)
+                sum += *mp++;
+
+        return sum & 0xFF;
+}
+
+/*
+ * Read/parse the MPC oem tables
+ */
+static void __init
+ smp_read_mpc_oem(struct mpc_oemtable *oemtable, unsigned short oemsize)
+{
+        int count = sizeof(*oemtable);  /* the header size */
+        unsigned char *oemptr = ((unsigned char *)oemtable) + count;
+
+        mpc_record = 0;
+        printk(KERN_INFO
+                "Found an OEM MPC table at %8p - parsing it ... \n", oemtable);
+
+        if (memcmp(oemtable->signature, MPC_OEM_SIGNATURE, 4)) {
+                printk(KERN_WARNING
+                       "SMP mpc oemtable: bad signature [%c%c%c%c]!\n",
+                       oemtable->signature[0], oemtable->signature[1],
+                       oemtable->signature[2], oemtable->signature[3]);
+                return;
+        }
+
+        if (mpf_checksum((unsigned char *)oemtable, oemtable->length)) {
+                printk(KERN_WARNING "SMP oem mptable: checksum error!\n");
+                return;
+        }
+
+        while (count < oemtable->length) {
+                switch (*oemptr) {
+                case MP_TRANSLATION:
+                        {
+                                struct mpc_trans *m = (void *)oemptr;
+
+                                MP_translation_info(m);
+                                oemptr += sizeof(*m);
+                                count += sizeof(*m);
+                                ++mpc_record;
+                                break;
+                        }
+                default:
+                        printk(KERN_WARNING
+                               "Unrecognised OEM table entry type! - %d\n",
+                               (int)*oemptr);
+                        return;
+                }
+        }
+}
+
+static int __init numaq_setup_ioapic_ids(void)
+{
+        /* so can skip it */
+        return 1;
+}
+
+static struct x86_quirks numaq_x86_quirks __initdata = {
+        .arch_pre_time_init             = numaq_pre_time_init,
+        .arch_time_init                 = NULL,
+        .arch_pre_intr_init             = NULL,
+        .arch_memory_setup              = NULL,
+        .arch_intr_init                 = NULL,
+        .arch_trap_init                 = NULL,
+        .mach_get_smp_config            = NULL,
+        .mach_find_smp_config           = NULL,
+        .mpc_record                     = &mpc_record,
+        .mpc_apic_id                    = mpc_apic_id,
+        .mpc_oem_bus_info               = mpc_oem_bus_info,
+        .mpc_oem_pci_bus                = mpc_oem_pci_bus,
+        .smp_read_mpc_oem               = smp_read_mpc_oem,
+        .setup_ioapic_ids               = numaq_setup_ioapic_ids,
+};
+
+static __init void early_check_numaq(void)
+{
+        /*
+         * Find possible boot-time SMP configuration:
+         */
+        early_find_smp_config();
+
+        /*
+         * get boot-time SMP configuration:
+         */
+        if (smp_found_config)
+                early_get_smp_config();
+
+        if (found_numaq)
+                x86_quirks = &numaq_x86_quirks;
+}
+
+int __init get_memcfg_numaq(void)
+{
+        early_check_numaq();
+        if (!found_numaq)
+                return 0;
+        smp_dump_qct();
+
+        return 1;
+}
+
+#define NUMAQ_APIC_DFR_VALUE    (APIC_DFR_CLUSTER)
+
+static inline unsigned int numaq_get_apic_id(unsigned long x)
+{
+        return (x >> 24) & 0x0F;
+}
+
+static inline void numaq_send_IPI_mask(const struct cpumask *mask, int vector)
+{
+        default_send_IPI_mask_sequence_logical(mask, vector);
+}
+
+static inline void numaq_send_IPI_allbutself(int vector)
+{
+        default_send_IPI_mask_allbutself_logical(cpu_online_mask, vector);
+}
+
+static inline void numaq_send_IPI_all(int vector)
+{
+        numaq_send_IPI_mask(cpu_online_mask, vector);
+}
+
+#define NUMAQ_TRAMPOLINE_PHYS_LOW       (0x8)
+#define NUMAQ_TRAMPOLINE_PHYS_HIGH      (0xa)
+
+/*
+ * Because we use NMIs rather than the INIT-STARTUP sequence to
+ * bootstrap the CPUs, the APIC may be in a weird state. Kick it:
+ */
+static inline void numaq_smp_callin_clear_local_apic(void)
+{
+        clear_local_APIC();
+}
+
+static inline const cpumask_t *numaq_target_cpus(void)
+{
+        return &CPU_MASK_ALL;
+}
+
+static inline unsigned long
+numaq_check_apicid_used(physid_mask_t bitmap, int apicid)
+{
+        return physid_isset(apicid, bitmap);
+}
+
+static inline unsigned long numaq_check_apicid_present(int bit)
+{
+        return physid_isset(bit, phys_cpu_present_map);
+}
+
+static inline int numaq_apic_id_registered(void)
+{
+        return 1;
+}
+
+static inline void numaq_init_apic_ldr(void)
+{
+        /* Already done in NUMA-Q firmware */
+}
+
+static inline void numaq_setup_apic_routing(void)
+{
+        printk(KERN_INFO
+                "Enabling APIC mode:  NUMA-Q.  Using %d I/O APICs\n",
+                nr_ioapics);
+}
+
+/*
+ * Skip adding the timer int on secondary nodes, which causes
+ * a small but painful rift in the time-space continuum.
+ */
+static inline int numaq_multi_timer_check(int apic, int irq)
+{
+        return apic != 0 && irq == 0;
+}
+
+static inline physid_mask_t numaq_ioapic_phys_id_map(physid_mask_t phys_map)
+{
+        /* We don't have a good way to do this yet - hack */
+        return physids_promote(0xFUL);
+}
+
+static inline int numaq_cpu_to_logical_apicid(int cpu)
+{
+        if (cpu >= nr_cpu_ids)
+                return BAD_APICID;
+        return cpu_2_logical_apicid[cpu];
+}
+
+/*
+ * Supporting over 60 cpus on NUMA-Q requires a locality-dependent
+ * cpu to APIC ID relation to properly interact with the intelligent
+ * mode of the cluster controller.
+ */
+static inline int numaq_cpu_present_to_apicid(int mps_cpu)
+{
+        if (mps_cpu < 60)
+                return ((mps_cpu >> 2) << 4) | (1 << (mps_cpu & 0x3));
+        else
+                return BAD_APICID;
+}
+
+static inline int numaq_apicid_to_node(int logical_apicid)
+{
+        return logical_apicid >> 4;
+}
+
+static inline physid_mask_t numaq_apicid_to_cpu_present(int logical_apicid)
+{
+        int node = numaq_apicid_to_node(logical_apicid);
+        int cpu = __ffs(logical_apicid & 0xf);
+
+        return physid_mask_of_physid(cpu + 4*node);
+}
+
+/* Where the IO area was mapped on multiquad, always 0 otherwise */
+void *xquad_portio;
+
+static inline int numaq_check_phys_apicid_present(int boot_cpu_physical_apicid)
+{
+        return 1;
+}
+
+/*
+ * We use physical apicids here, not logical, so just return the default
+ * physical broadcast to stop people from breaking us
+ */
+static inline unsigned int numaq_cpu_mask_to_apicid(const cpumask_t *cpumask)
+{
+        return 0x0F;
+}
+
+static inline unsigned int
+numaq_cpu_mask_to_apicid_and(const struct cpumask *cpumask,
+                             const struct cpumask *andmask)
+{
+        return 0x0F;
+}
+
+/* No NUMA-Q box has a HT CPU, but it can't hurt to use the default code. */
+static inline int numaq_phys_pkg_id(int cpuid_apic, int index_msb)
+{
+        return cpuid_apic >> index_msb;
+}
+
+static int
+numaq_mps_oem_check(struct mpc_table *mpc, char *oem, char *productid)
+{
+        if (strncmp(oem, "IBM NUMA", 8))
+                printk(KERN_ERR "Warning! Not a NUMA-Q system!\n");
+        else
+                found_numaq = 1;
+
+        return found_numaq;
+}
+
+static int probe_numaq(void)
+{
+        /* already know from get_memcfg_numaq() */
+        return found_numaq;
+}
+
+static void numaq_vector_allocation_domain(int cpu, cpumask_t *retmask)
+{
+        /* Careful. Some cpus do not strictly honor the set of cpus
+         * specified in the interrupt destination when using lowest
+         * priority interrupt delivery mode.
+         *
+         * In particular there was a hyperthreading cpu observed to
+         * deliver interrupts to the wrong hyperthread when only one
+         * hyperthread was specified in the interrupt desitination.
+         */
+        *retmask = (cpumask_t){ { [0] = APIC_ALL_CPUS, } };
+}
+
+static void numaq_setup_portio_remap(void)
+{
+        int num_quads = num_online_nodes();
+
+        if (num_quads <= 1)
+                return;
+
+        printk(KERN_INFO
+                "Remapping cross-quad port I/O for %d quads\n", num_quads);
+
+        xquad_portio = ioremap(XQUAD_PORTIO_BASE, num_quads*XQUAD_PORTIO_QUAD);
+
+        printk(KERN_INFO
+                "xquad_portio vaddr 0x%08lx, len %08lx\n",
+                (u_long) xquad_portio, (u_long) num_quads*XQUAD_PORTIO_QUAD);
+}
+
+struct apic apic_numaq = {
+
+        .name                           = "NUMAQ",
+        .probe                          = probe_numaq,
+        .acpi_madt_oem_check            = NULL,
+        .apic_id_registered             = numaq_apic_id_registered,
+
+        .irq_delivery_mode              = dest_LowestPrio,
+        /* physical delivery on LOCAL quad: */
+        .irq_dest_mode                  = 0,
+
+        .target_cpus                    = numaq_target_cpus,
+        .disable_esr                    = 1,
+        .dest_logical                   = APIC_DEST_LOGICAL,
+        .check_apicid_used              = numaq_check_apicid_used,
+        .check_apicid_present           = numaq_check_apicid_present,
+
+        .vector_allocation_domain       = numaq_vector_allocation_domain,
+        .init_apic_ldr                  = numaq_init_apic_ldr,
+
+        .ioapic_phys_id_map             = numaq_ioapic_phys_id_map,
+        .setup_apic_routing             = numaq_setup_apic_routing,
+        .multi_timer_check              = numaq_multi_timer_check,
+        .apicid_to_node                 = numaq_apicid_to_node,
+        .cpu_to_logical_apicid          = numaq_cpu_to_logical_apicid,
+        .cpu_present_to_apicid          = numaq_cpu_present_to_apicid,
+        .apicid_to_cpu_present          = numaq_apicid_to_cpu_present,
+        .setup_portio_remap             = numaq_setup_portio_remap,
+        .check_phys_apicid_present      = numaq_check_phys_apicid_present,
+        .enable_apic_mode               = NULL,
+        .phys_pkg_id                    = numaq_phys_pkg_id,
+        .mps_oem_check                  = numaq_mps_oem_check,
+
+        .get_apic_id                    = numaq_get_apic_id,
+        .set_apic_id                    = NULL,
+        .apic_id_mask                   = 0x0F << 24,
+
+        .cpu_mask_to_apicid             = numaq_cpu_mask_to_apicid,
+        .cpu_mask_to_apicid_and         = numaq_cpu_mask_to_apicid_and,
+
+        .send_IPI_mask                  = numaq_send_IPI_mask,
+        .send_IPI_mask_allbutself       = NULL,
+        .send_IPI_allbutself            = numaq_send_IPI_allbutself,
+        .send_IPI_all                   = numaq_send_IPI_all,
+        .send_IPI_self                  = default_send_IPI_self,
+
+        .wakeup_secondary_cpu           = wakeup_secondary_cpu_via_nmi,
+        .trampoline_phys_low            = NUMAQ_TRAMPOLINE_PHYS_LOW,
+        .trampoline_phys_high           = NUMAQ_TRAMPOLINE_PHYS_HIGH,
+
+        /* We don't do anything here because we use NMI's to boot instead */
+        .wait_for_init_deassert         = NULL,
+
+        .smp_callin_clear_local_apic    = numaq_smp_callin_clear_local_apic,
+        .inquire_remote_apic            = NULL,
+
+        .read                           = native_apic_mem_read,
+        .write                          = native_apic_mem_write,
+        .icr_read                       = native_apic_icr_read,
+        .icr_write                      = native_apic_icr_write,
+        .wait_icr_idle                  = native_apic_wait_icr_idle,
+        .safe_wait_icr_idle             = native_safe_apic_wait_icr_idle,
+};
diff --git a/arch/x86/kernel/apic/probe_32.c b/arch/x86/kernel/apic/probe_32.c
new file mode 100644
index 000000000000..141c99a1c264
--- /dev/null
+++ b/arch/x86/kernel/apic/probe_32.c
@@ -0,0 +1,284 @@
+/*
+ * Default generic APIC driver. This handles up to 8 CPUs.
+ *
+ * Copyright 2003 Andi Kleen, SuSE Labs.
+ * Subject to the GNU Public License, v.2
+ *
+ * Generic x86 APIC driver probe layer.
+ */
+#include <linux/threads.h>
+#include <linux/cpumask.h>
+#include <linux/module.h>
+#include <linux/string.h>
+#include <linux/kernel.h>
+#include <linux/ctype.h>
+#include <linux/init.h>
+#include <linux/errno.h>
+#include <asm/fixmap.h>
+#include <asm/mpspec.h>
+#include <asm/apicdef.h>
+#include <asm/apic.h>
+#include <asm/setup.h>
+
+#include <linux/threads.h>
+#include <linux/cpumask.h>
+#include <asm/mpspec.h>
+#include <asm/fixmap.h>
+#include <asm/apicdef.h>
+#include <linux/kernel.h>
+#include <linux/string.h>
+#include <linux/smp.h>
+#include <linux/init.h>
+#include <asm/ipi.h>
+
+#include <linux/smp.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <asm/acpi.h>
+#include <asm/e820.h>
+#include <asm/setup.h>
+
+#ifdef CONFIG_HOTPLUG_CPU
+#define DEFAULT_SEND_IPI        (1)
+#else
+#define DEFAULT_SEND_IPI        (0)
+#endif
+
+int no_broadcast = DEFAULT_SEND_IPI;
+
+static __init int no_ipi_broadcast(char *str)
+{
+        get_option(&str, &no_broadcast);
+        pr_info("Using %s mode\n",
+                no_broadcast ? "No IPI Broadcast" : "IPI Broadcast");
+        return 1;
+}
+__setup("no_ipi_broadcast=", no_ipi_broadcast);
+
+static int __init print_ipi_mode(void)
+{
+        pr_info("Using IPI %s mode\n",
+                no_broadcast ? "No-Shortcut" : "Shortcut");
+        return 0;
+}
+late_initcall(print_ipi_mode);
+
+void default_setup_apic_routing(void)
+{
+#ifdef CONFIG_X86_IO_APIC
+        printk(KERN_INFO
+                "Enabling APIC mode:  Flat.  Using %d I/O APICs\n",
+                nr_ioapics);
+#endif
+}
+
+static void default_vector_allocation_domain(int cpu, struct cpumask *retmask)
+{
+        /*
+         * Careful. Some cpus do not strictly honor the set of cpus
+         * specified in the interrupt destination when using lowest
+         * priority interrupt delivery mode.
+         *
+         * In particular there was a hyperthreading cpu observed to
+         * deliver interrupts to the wrong hyperthread when only one
+         * hyperthread was specified in the interrupt desitination.
+         */
+        *retmask = (cpumask_t) { { [0] = APIC_ALL_CPUS } };
+}
+
+/* should be called last. */
+static int probe_default(void)
+{
+        return 1;
+}
+
+struct apic apic_default = {
+
+        .name                           = "default",
+        .probe                          = probe_default,
+        .acpi_madt_oem_check            = NULL,
+        .apic_id_registered             = default_apic_id_registered,
+
+        .irq_delivery_mode              = dest_LowestPrio,
+        /* logical delivery broadcast to all CPUs: */
+        .irq_dest_mode                  = 1,
+
+        .target_cpus                    = default_target_cpus,
+        .disable_esr                    = 0,
+        .dest_logical                   = APIC_DEST_LOGICAL,
+        .check_apicid_used              = default_check_apicid_used,
+        .check_apicid_present           = default_check_apicid_present,
+
+        .vector_allocation_domain       = default_vector_allocation_domain,
+        .init_apic_ldr                  = default_init_apic_ldr,
+
+        .ioapic_phys_id_map             = default_ioapic_phys_id_map,
+        .setup_apic_routing             = default_setup_apic_routing,
+        .multi_timer_check              = NULL,
+        .apicid_to_node                 = default_apicid_to_node,
+        .cpu_to_logical_apicid          = default_cpu_to_logical_apicid,
+        .cpu_present_to_apicid          = default_cpu_present_to_apicid,
+        .apicid_to_cpu_present          = default_apicid_to_cpu_present,
+        .setup_portio_remap             = NULL,
+        .check_phys_apicid_present      = default_check_phys_apicid_present,
+        .enable_apic_mode               = NULL,
+        .phys_pkg_id                    = default_phys_pkg_id,
+        .mps_oem_check                  = NULL,
+
+        .get_apic_id                    = default_get_apic_id,
+        .set_apic_id                    = NULL,
+        .apic_id_mask                   = 0x0F << 24,
+
+        .cpu_mask_to_apicid             = default_cpu_mask_to_apicid,
+        .cpu_mask_to_apicid_and         = default_cpu_mask_to_apicid_and,
+
+        .send_IPI_mask                  = default_send_IPI_mask_logical,
+        .send_IPI_mask_allbutself       = default_send_IPI_mask_allbutself_logical,
+        .send_IPI_allbutself            = default_send_IPI_allbutself,
+        .send_IPI_all                   = default_send_IPI_all,
+        .send_IPI_self                  = default_send_IPI_self,
+
+        .trampoline_phys_low            = DEFAULT_TRAMPOLINE_PHYS_LOW,
+        .trampoline_phys_high           = DEFAULT_TRAMPOLINE_PHYS_HIGH,
+
+        .wait_for_init_deassert         = default_wait_for_init_deassert,
+
+        .smp_callin_clear_local_apic    = NULL,
+        .inquire_remote_apic            = default_inquire_remote_apic,
+
+        .read                           = native_apic_mem_read,
+        .write                          = native_apic_mem_write,
+        .icr_read                       = native_apic_icr_read,
+        .icr_write                      = native_apic_icr_write,
+        .wait_icr_idle                  = native_apic_wait_icr_idle,
+        .safe_wait_icr_idle             = native_safe_apic_wait_icr_idle,
+};
+
+extern struct apic apic_numaq;
+extern struct apic apic_summit;
+extern struct apic apic_bigsmp;
+extern struct apic apic_es7000;
+extern struct apic apic_es7000_cluster;
+extern struct apic apic_default;
+
+struct apic *apic = &apic_default;
+EXPORT_SYMBOL_GPL(apic);
+
+static struct apic *apic_probe[] __initdata = {
+#ifdef CONFIG_X86_NUMAQ
+        &apic_numaq,
+#endif
+#ifdef CONFIG_X86_SUMMIT
+        &apic_summit,
+#endif
+#ifdef CONFIG_X86_BIGSMP
+        &apic_bigsmp,
+#endif
+#ifdef CONFIG_X86_ES7000
+        &apic_es7000,
+        &apic_es7000_cluster,
+#endif
+        &apic_default,  /* must be last */
+        NULL,
+};
+
+static int cmdline_apic __initdata;
+static int __init parse_apic(char *arg)
+{
+        int i;
+
+        if (!arg)
+                return -EINVAL;
+
+        for (i = 0; apic_probe[i]; i++) {
+                if (!strcmp(apic_probe[i]->name, arg)) {
+                        apic = apic_probe[i];
+                        cmdline_apic = 1;
+                        return 0;
+                }
+        }
+
+        /* Parsed again by __setup for debug/verbose */
+        return 0;
+}
+early_param("apic", parse_apic);
+
+void __init generic_bigsmp_probe(void)
+{
+#ifdef CONFIG_X86_BIGSMP
+        /*
+         * This routine is used to switch to bigsmp mode when
+         * - There is no apic= option specified by the user
+         * - generic_apic_probe() has chosen apic_default as the sub_arch
+         * - we find more than 8 CPUs in acpi LAPIC listing with xAPIC support
+         */
+
+        if (!cmdline_apic && apic == &apic_default) {
+                if (apic_bigsmp.probe()) {
+                        apic = &apic_bigsmp;
+                        printk(KERN_INFO "Overriding APIC driver with %s\n",
+                               apic->name);
+                }
+        }
+#endif
+}
+
+void __init generic_apic_probe(void)
+{
+        if (!cmdline_apic) {
+                int i;
+                for (i = 0; apic_probe[i]; i++) {
+                        if (apic_probe[i]->probe()) {
+                                apic = apic_probe[i];
+                                break;
+                        }
+                }
+                /* Not visible without early console */
+                if (!apic_probe[i])
+                        panic("Didn't find an APIC driver");
+        }
+        printk(KERN_INFO "Using APIC driver %s\n", apic->name);
+}
+
+/* These functions can switch the APIC even after the initial ->probe() */
+
+int __init
+generic_mps_oem_check(struct mpc_table *mpc, char *oem, char *productid)
+{
+        int i;
+
+        for (i = 0; apic_probe[i]; ++i) {
+                if (!apic_probe[i]->mps_oem_check)
+                        continue;
+                if (!apic_probe[i]->mps_oem_check(mpc, oem, productid))
+                        continue;
+
+                if (!cmdline_apic) {
+                        apic = apic_probe[i];
+                        printk(KERN_INFO "Switched to APIC driver `%s'.\n",
+                               apic->name);
+                }
+                return 1;
+        }
+        return 0;
+}
+
+int __init default_acpi_madt_oem_check(char *oem_id, char *oem_table_id)
+{
+        int i;
+
+        for (i = 0; apic_probe[i]; ++i) {
+                if (!apic_probe[i]->acpi_madt_oem_check)
+                        continue;
+                if (!apic_probe[i]->acpi_madt_oem_check(oem_id, oem_table_id))
+                        continue;
+
+                if (!cmdline_apic) {
+                        apic = apic_probe[i];
+                        printk(KERN_INFO "Switched to APIC driver `%s'.\n",
+                               apic->name);
+                }
+                return 1;
+        }
+        return 0;
+}
diff --git a/arch/x86/kernel/genapic_64.c b/arch/x86/kernel/apic/probe_64.c
index 2bced78b0b8e..8d7748efe6a8 100644
--- a/arch/x86/kernel/genapic_64.c
+++ b/arch/x86/kernel/apic/probe_64.c
@@ -19,22 +19,27 @@
 #include <linux/dmar.h>
 
 #include <asm/smp.h>
+#include <asm/apic.h>
 #include <asm/ipi.h>
-#include <asm/genapic.h>
 #include <asm/setup.h>
 
-extern struct genapic apic_flat;
-extern struct genapic apic_physflat;
-extern struct genapic apic_x2xpic_uv_x;
-extern struct genapic apic_x2apic_phys;
-extern struct genapic apic_x2apic_cluster;
+extern struct apic apic_flat;
+extern struct apic apic_physflat;
+extern struct apic apic_x2xpic_uv_x;
+extern struct apic apic_x2apic_phys;
+extern struct apic apic_x2apic_cluster;
 
-struct genapic __read_mostly *genapic = &apic_flat;
+struct apic __read_mostly *apic = &apic_flat;
+EXPORT_SYMBOL_GPL(apic);
 
-static struct genapic *apic_probe[] __initdata = {
+static struct apic *apic_probe[] __initdata = {
+#ifdef CONFIG_X86_UV
         &apic_x2apic_uv_x,
+#endif
+#ifdef CONFIG_X86_X2APIC
         &apic_x2apic_phys,
         &apic_x2apic_cluster,
+#endif
         &apic_physflat,
         NULL,
 };
@@ -42,39 +47,45 @@ static struct genapic *apic_probe[] __initdata = {
 /*
  * Check the APIC IDs in bios_cpu_apicid and choose the APIC mode.
  */
-void __init setup_apic_routing(void)
+void __init default_setup_apic_routing(void)
 {
-        if (genapic == &apic_x2apic_phys || genapic == &apic_x2apic_cluster) {
-                if (!intr_remapping_enabled)
-                        genapic = &apic_flat;
+#ifdef CONFIG_X86_X2APIC
+        if (x2apic && (apic != &apic_x2apic_phys &&
+#ifdef CONFIG_X86_UV
+                       apic != &apic_x2apic_uv_x &&
+#endif
+                       apic != &apic_x2apic_cluster)) {
+                if (x2apic_phys)
+                        apic = &apic_x2apic_phys;
+                else
+                        apic = &apic_x2apic_cluster;
+                printk(KERN_INFO "Setting APIC routing to %s\n", apic->name);
         }
+#endif
 
-        if (genapic == &apic_flat) {
+        if (apic == &apic_flat) {
                 if (max_physical_apicid >= 8)
-                        genapic = &apic_physflat;
-                printk(KERN_INFO "Setting APIC routing to %s\n", genapic->name);
+                        apic = &apic_physflat;
+                printk(KERN_INFO "Setting APIC routing to %s\n", apic->name);
         }
-
-        if (x86_quirks->update_genapic)
-                x86_quirks->update_genapic();
 }
 
 /* Same for both flat and physical. */
 
 void apic_send_IPI_self(int vector)
 {
-        __send_IPI_shortcut(APIC_DEST_SELF, vector, APIC_DEST_PHYSICAL);
+        __default_send_IPI_shortcut(APIC_DEST_SELF, vector, APIC_DEST_PHYSICAL);
 }
 
-int __init acpi_madt_oem_check(char *oem_id, char *oem_table_id)
+int __init default_acpi_madt_oem_check(char *oem_id, char *oem_table_id)
 {
         int i;
 
         for (i = 0; apic_probe[i]; ++i) {
                 if (apic_probe[i]->acpi_madt_oem_check(oem_id, oem_table_id)) {
-                        genapic = apic_probe[i];
+                        apic = apic_probe[i];
                         printk(KERN_INFO "Setting APIC routing to %s.\n",
-                                genapic->name);
+                                apic->name);
                         return 1;
                 }
         }
diff --git a/arch/x86/kernel/apic/summit_32.c b/arch/x86/kernel/apic/summit_32.c
new file mode 100644
index 000000000000..aac52fa873ff
--- /dev/null
+++ b/arch/x86/kernel/apic/summit_32.c
@@ -0,0 +1,579 @@
+/*
+ * IBM Summit-Specific Code
+ *
+ * Written By: Matthew Dobson, IBM Corporation
+ *
+ * Copyright (c) 2003 IBM Corp.
+ *
+ * All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or (at
+ * your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
+ * NON INFRINGEMENT.  See the GNU General Public License for more
+ * details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ *
+ * Send feedback to <colpatch@us.ibm.com>
+ *
+ */
+
+#include <linux/mm.h>
+#include <linux/init.h>
+#include <asm/io.h>
+#include <asm/bios_ebda.h>
+
+/*
+ * APIC driver for the IBM "Summit" chipset.
+ */
+#include <linux/threads.h>
+#include <linux/cpumask.h>
+#include <asm/mpspec.h>
+#include <asm/apic.h>
+#include <asm/smp.h>
+#include <asm/fixmap.h>
+#include <asm/apicdef.h>
+#include <asm/ipi.h>
+#include <linux/kernel.h>
+#include <linux/string.h>
+#include <linux/init.h>
+#include <linux/gfp.h>
+#include <linux/smp.h>
+
+static unsigned summit_get_apic_id(unsigned long x)
+{
+        return (x >> 24) & 0xFF;
+}
+
+static inline void summit_send_IPI_mask(const cpumask_t *mask, int vector)
+{
+        default_send_IPI_mask_sequence_logical(mask, vector);
+}
+
+static void summit_send_IPI_allbutself(int vector)
+{
+        cpumask_t mask = cpu_online_map;
+        cpu_clear(smp_processor_id(), mask);
+
+        if (!cpus_empty(mask))
+                summit_send_IPI_mask(&mask, vector);
+}
+
+static void summit_send_IPI_all(int vector)
+{
+        summit_send_IPI_mask(&cpu_online_map, vector);
+}
+
+#include <asm/tsc.h>
+
+extern int use_cyclone;
+
+#ifdef CONFIG_X86_SUMMIT_NUMA
+static void setup_summit(void);
+#else
+static inline void setup_summit(void) {}
+#endif
+
+static int summit_mps_oem_check(struct mpc_table *mpc, char *oem,
+                char *productid)
+{
+        if (!strncmp(oem, "IBM ENSW", 8) &&
+                        (!strncmp(productid, "VIGIL SMP", 9)
+                         || !strncmp(productid, "EXA", 3)
+                         || !strncmp(productid, "RUTHLESS SMP", 12))){
+                mark_tsc_unstable("Summit based system");
+                use_cyclone = 1; /*enable cyclone-timer*/
+                setup_summit();
+                return 1;
+        }
+        return 0;
+}
+
+/* Hook from generic ACPI tables.c */
+static int summit_acpi_madt_oem_check(char *oem_id, char *oem_table_id)
+{
+        if (!strncmp(oem_id, "IBM", 3) &&
+            (!strncmp(oem_table_id, "SERVIGIL", 8)
+             || !strncmp(oem_table_id, "EXA", 3))){
+                mark_tsc_unstable("Summit based system");
+                use_cyclone = 1; /*enable cyclone-timer*/
+                setup_summit();
+                return 1;
+        }
+        return 0;
+}
+
+struct rio_table_hdr {
+        unsigned char version;      /* Version number of this data structure           */
+                                    /* Version 3 adds chassis_num & WP_index           */
+        unsigned char num_scal_dev; /* # of Scalability devices (Twisters for Vigil)   */
+        unsigned char num_rio_dev;  /* # of RIO I/O devices (Cyclones and Winnipegs)   */
+} __attribute__((packed));
+
+struct scal_detail {
+        unsigned char node_id;      /* Scalability Node ID                             */
+        unsigned long CBAR;         /* Address of 1MB register space                   */
+        unsigned char port0node;    /* Node ID port connected to: 0xFF=None            */
+        unsigned char port0port;    /* Port num port connected to: 0,1,2, or 0xFF=None */
+        unsigned char port1node;    /* Node ID port connected to: 0xFF = None          */
+        unsigned char port1port;    /* Port num port connected to: 0,1,2, or 0xFF=None */
+        unsigned char port2node;    /* Node ID port connected to: 0xFF = None          */
+        unsigned char port2port;    /* Port num port connected to: 0,1,2, or 0xFF=None */
+        unsigned char chassis_num;  /* 1 based Chassis number (1 = boot node)          */
+} __attribute__((packed));
+
+struct rio_detail {
+        unsigned char node_id;      /* RIO Node ID                                     */
+        unsigned long BBAR;         /* Address of 1MB register space                   */
+        unsigned char type;         /* Type of device                                  */
+        unsigned char owner_id;     /* For WPEG: Node ID of Cyclone that owns this WPEG*/
+                                    /* For CYC:  Node ID of Twister that owns this CYC */
+        unsigned char port0node;    /* Node ID port connected to: 0xFF=None            */
+        unsigned char port0port;    /* Port num port connected to: 0,1,2, or 0xFF=None */
+        unsigned char port1node;    /* Node ID port connected to: 0xFF=None            */
+        unsigned char port1port;    /* Port num port connected to: 0,1,2, or 0xFF=None */
+        unsigned char first_slot;   /* For WPEG: Lowest slot number below this WPEG    */
+                                    /* For CYC:  0                                     */
+        unsigned char status;       /* For WPEG: Bit 0 = 1 : the XAPIC is used         */
+                                    /*                 = 0 : the XAPIC is not used, ie:*/
+                                    /*                     ints fwded to another XAPIC */
+                                    /*           Bits1:7 Reserved                      */
+                                    /* For CYC:  Bits0:7 Reserved                      */
+        unsigned char WP_index;     /* For WPEG: WPEG instance index - lower ones have */
+                                    /*           lower slot numbers/PCI bus numbers    */
+                                    /* For CYC:  No meaning                            */
+        unsigned char chassis_num;  /* 1 based Chassis number                          */
+                                    /* For LookOut WPEGs this field indicates the      */
+                                    /* Expansion Chassis #, enumerated from Boot       */
+                                    /* Node WPEG external port, then Boot Node CYC     */
+                                    /* external port, then Next Vigil chassis WPEG     */
+                                    /* external port, etc.                             */
+                                    /* Shared Lookouts have only 1 chassis number (the */
+                                    /* first one assigned)                             */
+} __attribute__((packed));
+
+
+typedef enum {
+        CompatTwister = 0,  /* Compatibility Twister               */
+        AltTwister    = 1,  /* Alternate Twister of internal 8-way */
+        CompatCyclone = 2,  /* Compatibility Cyclone               */
+        AltCyclone    = 3,  /* Alternate Cyclone of internal 8-way */
+        CompatWPEG    = 4,  /* Compatibility WPEG                  */
+        AltWPEG       = 5,  /* Second Planar WPEG                  */
+        LookOutAWPEG  = 6,  /* LookOut WPEG                        */
+        LookOutBWPEG  = 7,  /* LookOut WPEG                        */
+} node_type;
+
+static inline int is_WPEG(struct rio_detail *rio){
+        return (rio->type == CompatWPEG || rio->type == AltWPEG ||
+                rio->type == LookOutAWPEG || rio->type == LookOutBWPEG);
+}
+
+
+/* In clustered mode, the high nibble of APIC ID is a cluster number.
+ * The low nibble is a 4-bit bitmap. */
+#define XAPIC_DEST_CPUS_SHIFT   4
+#define XAPIC_DEST_CPUS_MASK    ((1u << XAPIC_DEST_CPUS_SHIFT) - 1)
+#define XAPIC_DEST_CLUSTER_MASK (XAPIC_DEST_CPUS_MASK << XAPIC_DEST_CPUS_SHIFT)
+
+#define SUMMIT_APIC_DFR_VALUE   (APIC_DFR_CLUSTER)
+
+static const cpumask_t *summit_target_cpus(void)
+{
+        /* CPU_MASK_ALL (0xff) has undefined behaviour with
+         * dest_LowestPrio mode logical clustered apic interrupt routing
+         * Just start on cpu 0.  IRQ balancing will spread load
+         */
+        return &cpumask_of_cpu(0);
+}
+
+static unsigned long summit_check_apicid_used(physid_mask_t bitmap, int apicid)
+{
+        return 0;
+}
+
+/* we don't use the phys_cpu_present_map to indicate apicid presence */
+static unsigned long summit_check_apicid_present(int bit)
+{
+        return 1;
+}
+
+static void summit_init_apic_ldr(void)
+{
+        unsigned long val, id;
+        int count = 0;
+        u8 my_id = (u8)hard_smp_processor_id();
+        u8 my_cluster = APIC_CLUSTER(my_id);
+#ifdef CONFIG_SMP
+        u8 lid;
+        int i;
+
+        /* Create logical APIC IDs by counting CPUs already in cluster. */
+        for (count = 0, i = nr_cpu_ids; --i >= 0; ) {
+                lid = cpu_2_logical_apicid[i];
+                if (lid != BAD_APICID && APIC_CLUSTER(lid) == my_cluster)
+                        ++count;
+        }
+#endif
+        /* We only have a 4 wide bitmap in cluster mode.  If a deranged
+         * BIOS puts 5 CPUs in one APIC cluster, we're hosed. */
+        BUG_ON(count >= XAPIC_DEST_CPUS_SHIFT);
+        id = my_cluster | (1UL << count);
+        apic_write(APIC_DFR, SUMMIT_APIC_DFR_VALUE);
+        val = apic_read(APIC_LDR) & ~APIC_LDR_MASK;
+        val |= SET_APIC_LOGICAL_ID(id);
+        apic_write(APIC_LDR, val);
+}
+
+static int summit_apic_id_registered(void)
+{
+        return 1;
+}
+
+static void summit_setup_apic_routing(void)
+{
+        printk("Enabling APIC mode:  Summit.  Using %d I/O APICs\n",
+                                                nr_ioapics);
+}
+
+static int summit_apicid_to_node(int logical_apicid)
+{
+#ifdef CONFIG_SMP
+        return apicid_2_node[hard_smp_processor_id()];
+#else
+        return 0;
+#endif
+}
+
+/* Mapping from cpu number to logical apicid */
+static inline int summit_cpu_to_logical_apicid(int cpu)
+{
+#ifdef CONFIG_SMP
+        if (cpu >= nr_cpu_ids)
+                return BAD_APICID;
+        return cpu_2_logical_apicid[cpu];
+#else
+        return logical_smp_processor_id();
+#endif
+}
+
+static int summit_cpu_present_to_apicid(int mps_cpu)
+{
+        if (mps_cpu < nr_cpu_ids)
+                return (int)per_cpu(x86_bios_cpu_apicid, mps_cpu);
+        else
+                return BAD_APICID;
+}
+
+static physid_mask_t summit_ioapic_phys_id_map(physid_mask_t phys_id_map)
+{
+        /* For clustered we don't have a good way to do this yet - hack */
+        return physids_promote(0x0F);
+}
+
+static physid_mask_t summit_apicid_to_cpu_present(int apicid)
+{
+        return physid_mask_of_physid(0);
+}
+
+static int summit_check_phys_apicid_present(int boot_cpu_physical_apicid)
+{
+        return 1;
+}
+
+static unsigned int summit_cpu_mask_to_apicid(const cpumask_t *cpumask)
+{
+        unsigned int round = 0;
+        int cpu, apicid = 0;
+
+        /*
+         * The cpus in the mask must all be on the apic cluster.
+         */
+        for_each_cpu(cpu, cpumask) {
+                int new_apicid = summit_cpu_to_logical_apicid(cpu);
+
+                if (round && APIC_CLUSTER(apicid) != APIC_CLUSTER(new_apicid)) {
+                        printk("%s: Not a valid mask!\n", __func__);
+                        return BAD_APICID;
+                }
+                apicid |= new_apicid;
+                round++;
+        }
+        return apicid;
+}
+
+static unsigned int summit_cpu_mask_to_apicid_and(const struct cpumask *inmask,
+                              const struct cpumask *andmask)
+{
+        int apicid = summit_cpu_to_logical_apicid(0);
+        cpumask_var_t cpumask;
+
+        if (!alloc_cpumask_var(&cpumask, GFP_ATOMIC))
+                return apicid;
+
+        cpumask_and(cpumask, inmask, andmask);
+        cpumask_and(cpumask, cpumask, cpu_online_mask);
+        apicid = summit_cpu_mask_to_apicid(cpumask);
+
+        free_cpumask_var(cpumask);
+
+        return apicid;
+}
+
+/*
+ * cpuid returns the value latched in the HW at reset, not the APIC ID
+ * register's value.  For any box whose BIOS changes APIC IDs, like
+ * clustered APIC systems, we must use hard_smp_processor_id.
+ *
+ * See Intel's IA-32 SW Dev's Manual Vol2 under CPUID.
+ */
+static int summit_phys_pkg_id(int cpuid_apic, int index_msb)
+{
+        return hard_smp_processor_id() >> index_msb;
+}
+
+static int probe_summit(void)
+{
+        /* probed later in mptable/ACPI hooks */
+        return 0;
+}
+
+static void summit_vector_allocation_domain(int cpu, cpumask_t *retmask)
+{
+        /* Careful. Some cpus do not strictly honor the set of cpus
+         * specified in the interrupt destination when using lowest
+         * priority interrupt delivery mode.
+         *
+         * In particular there was a hyperthreading cpu observed to
+         * deliver interrupts to the wrong hyperthread when only one
+         * hyperthread was specified in the interrupt desitination.
+         */
+        *retmask = (cpumask_t){ { [0] = APIC_ALL_CPUS, } };
+}
+
+#ifdef CONFIG_X86_SUMMIT_NUMA
+static struct rio_table_hdr *rio_table_hdr;
+static struct scal_detail   *scal_devs[MAX_NUMNODES];
+static struct rio_detail    *rio_devs[MAX_NUMNODES*4];
+
+#ifndef CONFIG_X86_NUMAQ
+static int mp_bus_id_to_node[MAX_MP_BUSSES];
+#endif
+
+static int setup_pci_node_map_for_wpeg(int wpeg_num, int last_bus)
+{
+        int twister = 0, node = 0;
+        int i, bus, num_buses;
+
+        for (i = 0; i < rio_table_hdr->num_rio_dev; i++) {
+                if (rio_devs[i]->node_id == rio_devs[wpeg_num]->owner_id) {
+                        twister = rio_devs[i]->owner_id;
+                        break;
+                }
+        }
+        if (i == rio_table_hdr->num_rio_dev) {
+                printk(KERN_ERR "%s: Couldn't find owner Cyclone for Winnipeg!\n", __func__);
+                return last_bus;
+        }
+
+        for (i = 0; i < rio_table_hdr->num_scal_dev; i++) {
+                if (scal_devs[i]->node_id == twister) {
+                        node = scal_devs[i]->node_id;
+                        break;
+                }
+        }
+        if (i == rio_table_hdr->num_scal_dev) {
+                printk(KERN_ERR "%s: Couldn't find owner Twister for Cyclone!\n", __func__);
+                return last_bus;
+        }
+
+        switch (rio_devs[wpeg_num]->type) {
+        case CompatWPEG:
+                /*
+                 * The Compatibility Winnipeg controls the 2 legacy buses,
+                 * the 66MHz PCI bus [2 slots] and the 2 "extra" buses in case
+                 * a PCI-PCI bridge card is used in either slot: total 5 buses.
+                 */
+                num_buses = 5;
+                break;
+        case AltWPEG:
+                /*
+                 * The Alternate Winnipeg controls the 2 133MHz buses [1 slot
+                 * each], their 2 "extra" buses, the 100MHz bus [2 slots] and
+                 * the "extra" buses for each of those slots: total 7 buses.
+                 */
+                num_buses = 7;
+                break;
+        case LookOutAWPEG:
+        case LookOutBWPEG:
+                /*
+                 * A Lookout Winnipeg controls 3 100MHz buses [2 slots each]
+                 * & the "extra" buses for each of those slots: total 9 buses.
+                 */
+                num_buses = 9;
+                break;
+        default:
+                printk(KERN_INFO "%s: Unsupported Winnipeg type!\n", __func__);
+                return last_bus;
+        }
+
+        for (bus = last_bus; bus < last_bus + num_buses; bus++)
+                mp_bus_id_to_node[bus] = node;
+        return bus;
+}
+
+static int build_detail_arrays(void)
+{
+        unsigned long ptr;
+        int i, scal_detail_size, rio_detail_size;
+
+        if (rio_table_hdr->num_scal_dev > MAX_NUMNODES) {
+                printk(KERN_WARNING "%s: MAX_NUMNODES too low!  Defined as %d, but system has %d nodes.\n", __func__, MAX_NUMNODES, rio_table_hdr->num_scal_dev);
+                return 0;
+        }
+
+        switch (rio_table_hdr->version) {
+        default:
+                printk(KERN_WARNING "%s: Invalid Rio Grande Table Version: %d\n", __func__, rio_table_hdr->version);
+                return 0;
+        case 2:
+                scal_detail_size = 11;
+                rio_detail_size = 13;
+                break;
+        case 3:
+                scal_detail_size = 12;
+                rio_detail_size = 15;
+                break;
+        }
+
+        ptr = (unsigned long)rio_table_hdr + 3;
+        for (i = 0; i < rio_table_hdr->num_scal_dev; i++, ptr += scal_detail_size)
+                scal_devs[i] = (struct scal_detail *)ptr;
+
+        for (i = 0; i < rio_table_hdr->num_rio_dev; i++, ptr += rio_detail_size)
+                rio_devs[i] = (struct rio_detail *)ptr;
+
+        return 1;
+}
+
+void setup_summit(void)
+{
+        unsigned long           ptr;
+        unsigned short          offset;
+        int                     i, next_wpeg, next_bus = 0;
+
+        /* The pointer to the EBDA is stored in the word @ phys 0x40E(40:0E) */
+        ptr = get_bios_ebda();
+        ptr = (unsigned long)phys_to_virt(ptr);
+
+        rio_table_hdr = NULL;
+        offset = 0x180;
+        while (offset) {
+                /* The block id is stored in the 2nd word */
+                if (*((unsigned short *)(ptr + offset + 2)) == 0x4752) {
+                        /* set the pointer past the offset & block id */
+                        rio_table_hdr = (struct rio_table_hdr *)(ptr + offset + 4);
+                        break;
+                }
+                /* The next offset is stored in the 1st word.  0 means no more */
+                offset = *((unsigned short *)(ptr + offset));
+        }
+        if (!rio_table_hdr) {
+                printk(KERN_ERR "%s: Unable to locate Rio Grande Table in EBDA - bailing!\n", __func__);
+                return;
+        }
+
+        if (!build_detail_arrays())
+                return;
+
+        /* The first Winnipeg we're looking for has an index of 0 */
+        next_wpeg = 0;
+        do {
+                for (i = 0; i < rio_table_hdr->num_rio_dev; i++) {
+                        if (is_WPEG(rio_devs[i]) && rio_devs[i]->WP_index == next_wpeg) {
+                                /* It's the Winnipeg we're looking for! */
+                                next_bus = setup_pci_node_map_for_wpeg(i, next_bus);
+                                next_wpeg++;
+                                break;
+                        }
+                }
+                /*
+                 * If we go through all Rio devices and don't find one with
+                 * the next index, it means we've found all the Winnipegs,
+                 * and thus all the PCI buses.
+                 */
+                if (i == rio_table_hdr->num_rio_dev)
+                        next_wpeg = 0;
+        } while (next_wpeg != 0);
+}
+#endif
+
+struct apic apic_summit = {
+
+        .name                           = "summit",
+        .probe                          = probe_summit,
+        .acpi_madt_oem_check            = summit_acpi_madt_oem_check,
+        .apic_id_registered             = summit_apic_id_registered,
+
+        .irq_delivery_mode              = dest_LowestPrio,
+        /* logical delivery broadcast to all CPUs: */
+        .irq_dest_mode                  = 1,
+
+        .target_cpus                    = summit_target_cpus,
+        .disable_esr                    = 1,
+        .dest_logical                   = APIC_DEST_LOGICAL,
+        .check_apicid_used              = summit_check_apicid_used,
+        .check_apicid_present           = summit_check_apicid_present,
+
+        .vector_allocation_domain       = summit_vector_allocation_domain,
+        .init_apic_ldr                  = summit_init_apic_ldr,
+
+        .ioapic_phys_id_map             = summit_ioapic_phys_id_map,
+        .setup_apic_routing             = summit_setup_apic_routing,
+        .multi_timer_check              = NULL,
+        .apicid_to_node                 = summit_apicid_to_node,
+        .cpu_to_logical_apicid          = summit_cpu_to_logical_apicid,
+        .cpu_present_to_apicid          = summit_cpu_present_to_apicid,
+        .apicid_to_cpu_present          = summit_apicid_to_cpu_present,
+        .setup_portio_remap             = NULL,
+        .check_phys_apicid_present      = summit_check_phys_apicid_present,
+        .enable_apic_mode               = NULL,
+        .phys_pkg_id                    = summit_phys_pkg_id,
+        .mps_oem_check                  = summit_mps_oem_check,
+
+        .get_apic_id                    = summit_get_apic_id,
+        .set_apic_id                    = NULL,
+        .apic_id_mask                   = 0xFF << 24,
+
+        .cpu_mask_to_apicid             = summit_cpu_mask_to_apicid,
+        .cpu_mask_to_apicid_and         = summit_cpu_mask_to_apicid_and,
+
+        .send_IPI_mask                  = summit_send_IPI_mask,
+        .send_IPI_mask_allbutself       = NULL,
+        .send_IPI_allbutself            = summit_send_IPI_allbutself,
+        .send_IPI_all                   = summit_send_IPI_all,
+        .send_IPI_self                  = default_send_IPI_self,
+
+        .trampoline_phys_low            = DEFAULT_TRAMPOLINE_PHYS_LOW,
+        .trampoline_phys_high           = DEFAULT_TRAMPOLINE_PHYS_HIGH,
+
+        .wait_for_init_deassert         = default_wait_for_init_deassert,
+
+        .smp_callin_clear_local_apic    = NULL,
+        .inquire_remote_apic            = default_inquire_remote_apic,
+
+        .read                           = native_apic_mem_read,
+        .write                          = native_apic_mem_write,
+        .icr_read                       = native_apic_icr_read,
+        .icr_write                      = native_apic_icr_write,
+        .wait_icr_idle                  = native_apic_wait_icr_idle,
+        .safe_wait_icr_idle             = native_safe_apic_wait_icr_idle,
+};
diff --git a/arch/x86/kernel/genx2apic_cluster.c b/arch/x86/kernel/apic/x2apic_cluster.c
index 6ce497cc372d..8fb87b6dd633 100644
--- a/arch/x86/kernel/genx2apic_cluster.c
+++ b/arch/x86/kernel/apic/x2apic_cluster.c
@@ -7,17 +7,14 @@
 #include <linux/dmar.h>
 
 #include <asm/smp.h>
+#include <asm/apic.h>
 #include <asm/ipi.h>
-#include <asm/genapic.h>
 
 DEFINE_PER_CPU(u32, x86_cpu_to_logical_apicid);
 
 static int x2apic_acpi_madt_oem_check(char *oem_id, char *oem_table_id)
 {
-        if (cpu_has_x2apic)
-                return 1;
-
-        return 0;
+        return x2apic_enabled();
 }
 
 /* Start with all IRQs pointing to boot CPU.  IRQ balancing will shift them. */
@@ -36,8 +33,8 @@ static void x2apic_vector_allocation_domain(int cpu, struct cpumask *retmask)
         cpumask_set_cpu(cpu, retmask);
 }
 
-static void __x2apic_send_IPI_dest(unsigned int apicid, int vector,
-                                   unsigned int dest)
+static void
+ __x2apic_send_IPI_dest(unsigned int apicid, int vector, unsigned int dest)
 {
         unsigned long cfg;
 
@@ -46,7 +43,7 @@ static void __x2apic_send_IPI_dest(unsigned int apicid, int vector,
         /*
          * send the IPI.
          */
-        x2apic_icr_write(cfg, apicid);
+        native_x2apic_icr_write(cfg, apicid);
 }
 
 /*
@@ -57,45 +54,50 @@ static void __x2apic_send_IPI_dest(unsigned int apicid, int vector,
  */
 static void x2apic_send_IPI_mask(const struct cpumask *mask, int vector)
 {
-        unsigned long flags;
         unsigned long query_cpu;
+        unsigned long flags;
 
         local_irq_save(flags);
-        for_each_cpu(query_cpu, mask)
+        for_each_cpu(query_cpu, mask) {
                 __x2apic_send_IPI_dest(
                         per_cpu(x86_cpu_to_logical_apicid, query_cpu),
-                        vector, APIC_DEST_LOGICAL);
+                        vector, apic->dest_logical);
+        }
         local_irq_restore(flags);
 }
 
-static void x2apic_send_IPI_mask_allbutself(const struct cpumask *mask,
-                                            int vector)
+static void
+ x2apic_send_IPI_mask_allbutself(const struct cpumask *mask, int vector)
 {
-        unsigned long flags;
-        unsigned long query_cpu;
         unsigned long this_cpu = smp_processor_id();
+        unsigned long query_cpu;
+        unsigned long flags;
 
         local_irq_save(flags);
-        for_each_cpu(query_cpu, mask)
-                if (query_cpu != this_cpu)
-                        __x2apic_send_IPI_dest(
+        for_each_cpu(query_cpu, mask) {
+                if (query_cpu == this_cpu)
+                        continue;
+                __x2apic_send_IPI_dest(
                                 per_cpu(x86_cpu_to_logical_apicid, query_cpu),
-                                vector, APIC_DEST_LOGICAL);
+                                vector, apic->dest_logical);
+        }
         local_irq_restore(flags);
 }
 
 static void x2apic_send_IPI_allbutself(int vector)
 {
-        unsigned long flags;
-        unsigned long query_cpu;
         unsigned long this_cpu = smp_processor_id();
+        unsigned long query_cpu;
+        unsigned long flags;
 
         local_irq_save(flags);
-        for_each_online_cpu(query_cpu)
-                if (query_cpu != this_cpu)
-                        __x2apic_send_IPI_dest(
+        for_each_online_cpu(query_cpu) {
+                if (query_cpu == this_cpu)
+                        continue;
+                __x2apic_send_IPI_dest(
                                 per_cpu(x86_cpu_to_logical_apicid, query_cpu),
-                                vector, APIC_DEST_LOGICAL);
+                                vector, apic->dest_logical);
+        }
         local_irq_restore(flags);
 }
 
@@ -111,21 +113,21 @@ static int x2apic_apic_id_registered(void)
 
 static unsigned int x2apic_cpu_mask_to_apicid(const struct cpumask *cpumask)
 {
-        int cpu;
-
         /*
          * We're using fixed IRQ delivery, can only return one logical APIC ID.
          * May as well be the first.
          */
-        cpu = cpumask_first(cpumask);
+        int cpu = cpumask_first(cpumask);
+
         if ((unsigned)cpu < nr_cpu_ids)
                 return per_cpu(x86_cpu_to_logical_apicid, cpu);
         else
                 return BAD_APICID;
 }
 
-static unsigned int x2apic_cpu_mask_to_apicid_and(const struct cpumask *cpumask,
-                                                  const struct cpumask *andmask)
+static unsigned int
+x2apic_cpu_mask_to_apicid_and(const struct cpumask *cpumask,
+                              const struct cpumask *andmask)
 {
         int cpu;
 
@@ -133,15 +135,18 @@ static unsigned int x2apic_cpu_mask_to_apicid_and(const struct cpumask *cpumask,
          * We're using fixed IRQ delivery, can only return one logical APIC ID.
          * May as well be the first.
          */
-        for_each_cpu_and(cpu, cpumask, andmask)
+        for_each_cpu_and(cpu, cpumask, andmask) {
                 if (cpumask_test_cpu(cpu, cpu_online_mask))
                         break;
+        }
+
         if (cpu < nr_cpu_ids)
                 return per_cpu(x86_cpu_to_logical_apicid, cpu);
+
         return BAD_APICID;
 }
 
-static unsigned int get_apic_id(unsigned long x)
+static unsigned int x2apic_cluster_phys_get_apic_id(unsigned long x)
 {
         unsigned int id;
 
@@ -157,7 +162,7 @@ static unsigned long set_apic_id(unsigned int id)
         return x;
 }
 
-static unsigned int phys_pkg_id(int index_msb)
+static int x2apic_cluster_phys_pkg_id(int initial_apicid, int index_msb)
 {
         return current_cpu_data.initial_apicid >> index_msb;
 }
@@ -172,27 +177,63 @@ static void init_x2apic_ldr(void)
         int cpu = smp_processor_id();
 
         per_cpu(x86_cpu_to_logical_apicid, cpu) = apic_read(APIC_LDR);
-        return;
-}
-
-struct genapic apic_x2apic_cluster = {
-        .name = "cluster x2apic",
-        .acpi_madt_oem_check = x2apic_acpi_madt_oem_check,
-        .int_delivery_mode = dest_LowestPrio,
-        .int_dest_mode = (APIC_DEST_LOGICAL != 0),
-        .target_cpus = x2apic_target_cpus,
-        .vector_allocation_domain = x2apic_vector_allocation_domain,
-        .apic_id_registered = x2apic_apic_id_registered,
-        .init_apic_ldr = init_x2apic_ldr,
-        .send_IPI_all = x2apic_send_IPI_all,
-        .send_IPI_allbutself = x2apic_send_IPI_allbutself,
-        .send_IPI_mask = x2apic_send_IPI_mask,
-        .send_IPI_mask_allbutself = x2apic_send_IPI_mask_allbutself,
-        .send_IPI_self = x2apic_send_IPI_self,
-        .cpu_mask_to_apicid = x2apic_cpu_mask_to_apicid,
-        .cpu_mask_to_apicid_and = x2apic_cpu_mask_to_apicid_and,
-        .phys_pkg_id = phys_pkg_id,
-        .get_apic_id = get_apic_id,
-        .set_apic_id = set_apic_id,
-        .apic_id_mask = (0xFFFFFFFFu),
+}
+
+struct apic apic_x2apic_cluster = {
+
+        .name                           = "cluster x2apic",
+        .probe                          = NULL,
+        .acpi_madt_oem_check            = x2apic_acpi_madt_oem_check,
+        .apic_id_registered             = x2apic_apic_id_registered,
+
+        .irq_delivery_mode              = dest_LowestPrio,
+        .irq_dest_mode                  = 1, /* logical */
+
+        .target_cpus                    = x2apic_target_cpus,
+        .disable_esr                    = 0,
+        .dest_logical                   = APIC_DEST_LOGICAL,
+        .check_apicid_used              = NULL,
+        .check_apicid_present           = NULL,
+
+        .vector_allocation_domain       = x2apic_vector_allocation_domain,
+        .init_apic_ldr                  = init_x2apic_ldr,
+
+        .ioapic_phys_id_map             = NULL,
+        .setup_apic_routing             = NULL,
+        .multi_timer_check              = NULL,
+        .apicid_to_node                 = NULL,
+        .cpu_to_logical_apicid          = NULL,
+        .cpu_present_to_apicid          = default_cpu_present_to_apicid,
+        .apicid_to_cpu_present          = NULL,
+        .setup_portio_remap             = NULL,
+        .check_phys_apicid_present      = default_check_phys_apicid_present,
+        .enable_apic_mode               = NULL,
+        .phys_pkg_id                    = x2apic_cluster_phys_pkg_id,
+        .mps_oem_check                  = NULL,
+
+        .get_apic_id                    = x2apic_cluster_phys_get_apic_id,
+        .set_apic_id                    = set_apic_id,
+        .apic_id_mask                   = 0xFFFFFFFFu,
+
+        .cpu_mask_to_apicid             = x2apic_cpu_mask_to_apicid,
+        .cpu_mask_to_apicid_and         = x2apic_cpu_mask_to_apicid_and,
+
+        .send_IPI_mask                  = x2apic_send_IPI_mask,
+        .send_IPI_mask_allbutself       = x2apic_send_IPI_mask_allbutself,
+        .send_IPI_allbutself            = x2apic_send_IPI_allbutself,
+        .send_IPI_all                   = x2apic_send_IPI_all,
+        .send_IPI_self                  = x2apic_send_IPI_self,
+
+        .trampoline_phys_low            = DEFAULT_TRAMPOLINE_PHYS_LOW,
+        .trampoline_phys_high           = DEFAULT_TRAMPOLINE_PHYS_HIGH,
+        .wait_for_init_deassert         = NULL,
+        .smp_callin_clear_local_apic    = NULL,
+        .inquire_remote_apic            = NULL,
+
+        .read                           = native_apic_msr_read,
+        .write                          = native_apic_msr_write,
+        .icr_read                       = native_x2apic_icr_read,
+        .icr_write                      = native_x2apic_icr_write,
+        .wait_icr_idle                  = native_x2apic_wait_icr_idle,
+        .safe_wait_icr_idle             = native_safe_x2apic_wait_icr_idle,
 };
diff --git a/arch/x86/kernel/genx2apic_phys.c b/arch/x86/kernel/apic/x2apic_phys.c
index 21bcc0e098ba..23625b9f98b2 100644
--- a/arch/x86/kernel/genx2apic_phys.c
+++ b/arch/x86/kernel/apic/x2apic_phys.c
@@ -7,10 +7,10 @@
 #include <linux/dmar.h>
 
 #include <asm/smp.h>
+#include <asm/apic.h>
 #include <asm/ipi.h>
-#include <asm/genapic.h>
 
-static int x2apic_phys;
+int x2apic_phys;
 
 static int set_x2apic_phys_mode(char *arg)
 {
@@ -21,10 +21,10 @@ early_param("x2apic_phys", set_x2apic_phys_mode);
 
 static int x2apic_acpi_madt_oem_check(char *oem_id, char *oem_table_id)
 {
-        if (cpu_has_x2apic && x2apic_phys)
-                return 1;
-
-        return 0;
+        if (x2apic_phys)
+                return x2apic_enabled();
+        else
+                return 0;
 }
 
 /* Start with all IRQs pointing to boot CPU.  IRQ balancing will shift them. */
@@ -50,13 +50,13 @@ static void __x2apic_send_IPI_dest(unsigned int apicid, int vector,
         /*
          * send the IPI.
          */
-        x2apic_icr_write(cfg, apicid);
+        native_x2apic_icr_write(cfg, apicid);
 }
 
 static void x2apic_send_IPI_mask(const struct cpumask *mask, int vector)
 {
-        unsigned long flags;
         unsigned long query_cpu;
+        unsigned long flags;
 
         local_irq_save(flags);
         for_each_cpu(query_cpu, mask) {
@@ -66,12 +66,12 @@ static void x2apic_send_IPI_mask(const struct cpumask *mask, int vector)
         local_irq_restore(flags);
 }
 
-static void x2apic_send_IPI_mask_allbutself(const struct cpumask *mask,
-                                            int vector)
+static void
+ x2apic_send_IPI_mask_allbutself(const struct cpumask *mask, int vector)
 {
-        unsigned long flags;
-        unsigned long query_cpu;
         unsigned long this_cpu = smp_processor_id();
+        unsigned long query_cpu;
+        unsigned long flags;
 
         local_irq_save(flags);
         for_each_cpu(query_cpu, mask) {
@@ -85,16 +85,17 @@ static void x2apic_send_IPI_mask_allbutself(const struct cpumask *mask,
 
 static void x2apic_send_IPI_allbutself(int vector)
 {
-        unsigned long flags;
-        unsigned long query_cpu;
         unsigned long this_cpu = smp_processor_id();
+        unsigned long query_cpu;
+        unsigned long flags;
 
         local_irq_save(flags);
-        for_each_online_cpu(query_cpu)
-                if (query_cpu != this_cpu)
-                        __x2apic_send_IPI_dest(
-                                per_cpu(x86_cpu_to_apicid, query_cpu),
-                                vector, APIC_DEST_PHYSICAL);
+        for_each_online_cpu(query_cpu) {
+                if (query_cpu == this_cpu)
+                        continue;
+                __x2apic_send_IPI_dest(per_cpu(x86_cpu_to_apicid, query_cpu),
+                                       vector, APIC_DEST_PHYSICAL);
+        }
         local_irq_restore(flags);
 }
 
@@ -110,21 +111,21 @@ static int x2apic_apic_id_registered(void)
 
 static unsigned int x2apic_cpu_mask_to_apicid(const struct cpumask *cpumask)
 {
-        int cpu;
-
         /*
          * We're using fixed IRQ delivery, can only return one phys APIC ID.
          * May as well be the first.
          */
-        cpu = cpumask_first(cpumask);
+        int cpu = cpumask_first(cpumask);
+
         if ((unsigned)cpu < nr_cpu_ids)
                 return per_cpu(x86_cpu_to_apicid, cpu);
         else
                 return BAD_APICID;
 }
 
-static unsigned int x2apic_cpu_mask_to_apicid_and(const struct cpumask *cpumask,
-                                                  const struct cpumask *andmask)
+static unsigned int
+x2apic_cpu_mask_to_apicid_and(const struct cpumask *cpumask,
+                              const struct cpumask *andmask)
 {
         int cpu;
 
@@ -132,31 +133,28 @@ static unsigned int x2apic_cpu_mask_to_apicid_and(const struct cpumask *cpumask,
          * We're using fixed IRQ delivery, can only return one phys APIC ID.
          * May as well be the first.
          */
-        for_each_cpu_and(cpu, cpumask, andmask)
+        for_each_cpu_and(cpu, cpumask, andmask) {
                 if (cpumask_test_cpu(cpu, cpu_online_mask))
                         break;
+        }
+
         if (cpu < nr_cpu_ids)
                 return per_cpu(x86_cpu_to_apicid, cpu);
+
         return BAD_APICID;
 }
 
-static unsigned int get_apic_id(unsigned long x)
+static unsigned int x2apic_phys_get_apic_id(unsigned long x)
 {
-        unsigned int id;
-
-        id = x;
-        return id;
+        return x;
 }
 
 static unsigned long set_apic_id(unsigned int id)
 {
-        unsigned long x;
-
-        x = id;
-        return x;
+        return id;
 }
 
-static unsigned int phys_pkg_id(int index_msb)
+static int x2apic_phys_pkg_id(int initial_apicid, int index_msb)
 {
         return current_cpu_data.initial_apicid >> index_msb;
 }
@@ -168,27 +166,63 @@ static void x2apic_send_IPI_self(int vector)
 
 static void init_x2apic_ldr(void)
 {
-        return;
-}
-
-struct genapic apic_x2apic_phys = {
-        .name = "physical x2apic",
-        .acpi_madt_oem_check = x2apic_acpi_madt_oem_check,
-        .int_delivery_mode = dest_Fixed,
-        .int_dest_mode = (APIC_DEST_PHYSICAL != 0),
-        .target_cpus = x2apic_target_cpus,
-        .vector_allocation_domain = x2apic_vector_allocation_domain,
-        .apic_id_registered = x2apic_apic_id_registered,
-        .init_apic_ldr = init_x2apic_ldr,
-        .send_IPI_all = x2apic_send_IPI_all,
-        .send_IPI_allbutself = x2apic_send_IPI_allbutself,
-        .send_IPI_mask = x2apic_send_IPI_mask,
-        .send_IPI_mask_allbutself = x2apic_send_IPI_mask_allbutself,
-        .send_IPI_self = x2apic_send_IPI_self,
-        .cpu_mask_to_apicid = x2apic_cpu_mask_to_apicid,
-        .cpu_mask_to_apicid_and = x2apic_cpu_mask_to_apicid_and,
-        .phys_pkg_id = phys_pkg_id,
-        .get_apic_id = get_apic_id,
-        .set_apic_id = set_apic_id,
-        .apic_id_mask = (0xFFFFFFFFu),
+}
+
+struct apic apic_x2apic_phys = {
+
+        .name                           = "physical x2apic",
+        .probe                          = NULL,
+        .acpi_madt_oem_check            = x2apic_acpi_madt_oem_check,
+        .apic_id_registered             = x2apic_apic_id_registered,
+
+        .irq_delivery_mode              = dest_Fixed,
+        .irq_dest_mode                  = 0, /* physical */
+
+        .target_cpus                    = x2apic_target_cpus,
+        .disable_esr                    = 0,
+        .dest_logical                   = 0,
+        .check_apicid_used              = NULL,
+        .check_apicid_present           = NULL,
+
+        .vector_allocation_domain       = x2apic_vector_allocation_domain,
+        .init_apic_ldr                  = init_x2apic_ldr,
+
+        .ioapic_phys_id_map             = NULL,
+        .setup_apic_routing             = NULL,
+        .multi_timer_check              = NULL,
+        .apicid_to_node                 = NULL,
+        .cpu_to_logical_apicid          = NULL,
+        .cpu_present_to_apicid          = default_cpu_present_to_apicid,
+        .apicid_to_cpu_present          = NULL,
+        .setup_portio_remap             = NULL,
+        .check_phys_apicid_present      = default_check_phys_apicid_present,
+        .enable_apic_mode               = NULL,
+        .phys_pkg_id                    = x2apic_phys_pkg_id,
+        .mps_oem_check                  = NULL,
+
+        .get_apic_id                    = x2apic_phys_get_apic_id,
+        .set_apic_id                    = set_apic_id,
+        .apic_id_mask                   = 0xFFFFFFFFu,
+
+        .cpu_mask_to_apicid             = x2apic_cpu_mask_to_apicid,
+        .cpu_mask_to_apicid_and         = x2apic_cpu_mask_to_apicid_and,
+
+        .send_IPI_mask                  = x2apic_send_IPI_mask,
+        .send_IPI_mask_allbutself       = x2apic_send_IPI_mask_allbutself,
+        .send_IPI_allbutself            = x2apic_send_IPI_allbutself,
+        .send_IPI_all                   = x2apic_send_IPI_all,
+        .send_IPI_self                  = x2apic_send_IPI_self,
+
+        .trampoline_phys_low            = DEFAULT_TRAMPOLINE_PHYS_LOW,
+        .trampoline_phys_high           = DEFAULT_TRAMPOLINE_PHYS_HIGH,
+        .wait_for_init_deassert         = NULL,
+        .smp_callin_clear_local_apic    = NULL,
+        .inquire_remote_apic            = NULL,
+
+        .read                           = native_apic_msr_read,
+        .write                          = native_apic_msr_write,
+        .icr_read                       = native_x2apic_icr_read,
+        .icr_write                      = native_x2apic_icr_write,
+        .wait_icr_idle                  = native_x2apic_wait_icr_idle,
+        .safe_wait_icr_idle             = native_safe_x2apic_wait_icr_idle,
 };
diff --git a/arch/x86/kernel/genx2apic_uv_x.c b/arch/x86/kernel/apic/x2apic_uv_x.c
index b193e082f6ce..1bd6da1f8fad 100644
--- a/arch/x86/kernel/genx2apic_uv_x.c
+++ b/arch/x86/kernel/apic/x2apic_uv_x.c
@@ -7,27 +7,28 @@
  *
  * Copyright (C) 2007-2008 Silicon Graphics, Inc. All rights reserved.
  */
-
-#include <linux/kernel.h>
-#include <linux/threads.h>
-#include <linux/cpu.h>
 #include <linux/cpumask.h>
+#include <linux/hardirq.h>
+#include <linux/proc_fs.h>
+#include <linux/threads.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
 #include <linux/string.h>
 #include <linux/ctype.h>
-#include <linux/init.h>
 #include <linux/sched.h>
-#include <linux/module.h>
-#include <linux/hardirq.h>
 #include <linux/timer.h>
-#include <linux/proc_fs.h>
-#include <asm/current.h>
-#include <asm/smp.h>
-#include <asm/ipi.h>
-#include <asm/genapic.h>
-#include <asm/pgtable.h>
+#include <linux/cpu.h>
+#include <linux/init.h>
+
 #include <asm/uv/uv_mmrs.h>
 #include <asm/uv/uv_hub.h>
+#include <asm/current.h>
+#include <asm/pgtable.h>
 #include <asm/uv/bios.h>
+#include <asm/uv/uv.h>
+#include <asm/apic.h>
+#include <asm/ipi.h>
+#include <asm/smp.h>
 
 DEFINE_PER_CPU(int, x2apic_extra_bits);
 
@@ -90,39 +91,43 @@ static void uv_vector_allocation_domain(int cpu, struct cpumask *retmask)
         cpumask_set_cpu(cpu, retmask);
 }
 
-int uv_wakeup_secondary(int phys_apicid, unsigned int start_rip)
+static int uv_wakeup_secondary(int phys_apicid, unsigned long start_rip)
 {
+#ifdef CONFIG_SMP
         unsigned long val;
         int pnode;
 
         pnode = uv_apicid_to_pnode(phys_apicid);
         val = (1UL << UVH_IPI_INT_SEND_SHFT) |
             (phys_apicid << UVH_IPI_INT_APIC_ID_SHFT) |
-            (((long)start_rip << UVH_IPI_INT_VECTOR_SHFT) >> 12) |
+            ((start_rip << UVH_IPI_INT_VECTOR_SHFT) >> 12) |
             APIC_DM_INIT;
         uv_write_global_mmr64(pnode, UVH_IPI_INT, val);
         mdelay(10);
 
         val = (1UL << UVH_IPI_INT_SEND_SHFT) |
             (phys_apicid << UVH_IPI_INT_APIC_ID_SHFT) |
-            (((long)start_rip << UVH_IPI_INT_VECTOR_SHFT) >> 12) |
+            ((start_rip << UVH_IPI_INT_VECTOR_SHFT) >> 12) |
             APIC_DM_STARTUP;
         uv_write_global_mmr64(pnode, UVH_IPI_INT, val);
+
+        atomic_set(&init_deasserted, 1);
+#endif
         return 0;
 }
 
 static void uv_send_IPI_one(int cpu, int vector)
 {
-        unsigned long val, apicid, lapicid;
+        unsigned long val, apicid;
         int pnode;
 
         apicid = per_cpu(x86_cpu_to_apicid, cpu);
-        lapicid = apicid & 0x3f;                /* ZZZ macro needed */
         pnode = uv_apicid_to_pnode(apicid);
-        val =
-            (1UL << UVH_IPI_INT_SEND_SHFT) | (lapicid <<
-                                              UVH_IPI_INT_APIC_ID_SHFT) |
-            (vector << UVH_IPI_INT_VECTOR_SHFT);
+
+        val = (1UL << UVH_IPI_INT_SEND_SHFT) |
+              (apicid << UVH_IPI_INT_APIC_ID_SHFT) |
+              (vector << UVH_IPI_INT_VECTOR_SHFT);
+
         uv_write_global_mmr64(pnode, UVH_IPI_INT, val);
 }
 
@@ -136,22 +141,24 @@ static void uv_send_IPI_mask(const struct cpumask *mask, int vector)
 
 static void uv_send_IPI_mask_allbutself(const struct cpumask *mask, int vector)
 {
-        unsigned int cpu;
         unsigned int this_cpu = smp_processor_id();
+        unsigned int cpu;
 
-        for_each_cpu(cpu, mask)
+        for_each_cpu(cpu, mask) {
                 if (cpu != this_cpu)
                         uv_send_IPI_one(cpu, vector);
+        }
 }
 
 static void uv_send_IPI_allbutself(int vector)
 {
-        unsigned int cpu;
         unsigned int this_cpu = smp_processor_id();
+        unsigned int cpu;
 
-        for_each_online_cpu(cpu)
+        for_each_online_cpu(cpu) {
                 if (cpu != this_cpu)
                         uv_send_IPI_one(cpu, vector);
+        }
 }
 
 static void uv_send_IPI_all(int vector)
@@ -170,21 +177,21 @@ static void uv_init_apic_ldr(void)
 
 static unsigned int uv_cpu_mask_to_apicid(const struct cpumask *cpumask)
 {
-        int cpu;
-
         /*
          * We're using fixed IRQ delivery, can only return one phys APIC ID.
          * May as well be the first.
          */
-        cpu = cpumask_first(cpumask);
+        int cpu = cpumask_first(cpumask);
+
         if ((unsigned)cpu < nr_cpu_ids)
                 return per_cpu(x86_cpu_to_apicid, cpu);
         else
                 return BAD_APICID;
 }
 
-static unsigned int uv_cpu_mask_to_apicid_and(const struct cpumask *cpumask,
-                                              const struct cpumask *andmask)
+static unsigned int
+uv_cpu_mask_to_apicid_and(const struct cpumask *cpumask,
+                          const struct cpumask *andmask)
 {
         int cpu;
 
@@ -192,15 +199,17 @@ static unsigned int uv_cpu_mask_to_apicid_and(const struct cpumask *cpumask,
          * We're using fixed IRQ delivery, can only return one phys APIC ID.
          * May as well be the first.
          */
-        for_each_cpu_and(cpu, cpumask, andmask)
+        for_each_cpu_and(cpu, cpumask, andmask) {
                 if (cpumask_test_cpu(cpu, cpu_online_mask))
                         break;
+        }
         if (cpu < nr_cpu_ids)
                 return per_cpu(x86_cpu_to_apicid, cpu);
+
         return BAD_APICID;
 }
 
-static unsigned int get_apic_id(unsigned long x)
+static unsigned int x2apic_get_apic_id(unsigned long x)
 {
         unsigned int id;
 
@@ -222,10 +231,10 @@ static unsigned long set_apic_id(unsigned int id)
 static unsigned int uv_read_apic_id(void)
 {
 
-        return get_apic_id(apic_read(APIC_ID));
+        return x2apic_get_apic_id(apic_read(APIC_ID));
 }
 
-static unsigned int phys_pkg_id(int index_msb)
+static int uv_phys_pkg_id(int initial_apicid, int index_msb)
 {
         return uv_read_apic_id() >> index_msb;
 }
@@ -235,26 +244,64 @@ static void uv_send_IPI_self(int vector)
         apic_write(APIC_SELF_IPI, vector);
 }
 
-struct genapic apic_x2apic_uv_x = {
-        .name = "UV large system",
-        .acpi_madt_oem_check = uv_acpi_madt_oem_check,
-        .int_delivery_mode = dest_Fixed,
-        .int_dest_mode = (APIC_DEST_PHYSICAL != 0),
-        .target_cpus = uv_target_cpus,
-        .vector_allocation_domain = uv_vector_allocation_domain,
-        .apic_id_registered = uv_apic_id_registered,
-        .init_apic_ldr = uv_init_apic_ldr,
-        .send_IPI_all = uv_send_IPI_all,
-        .send_IPI_allbutself = uv_send_IPI_allbutself,
-        .send_IPI_mask = uv_send_IPI_mask,
-        .send_IPI_mask_allbutself = uv_send_IPI_mask_allbutself,
-        .send_IPI_self = uv_send_IPI_self,
-        .cpu_mask_to_apicid = uv_cpu_mask_to_apicid,
-        .cpu_mask_to_apicid_and = uv_cpu_mask_to_apicid_and,
-        .phys_pkg_id = phys_pkg_id,
-        .get_apic_id = get_apic_id,
-        .set_apic_id = set_apic_id,
-        .apic_id_mask = (0xFFFFFFFFu),
+struct apic apic_x2apic_uv_x = {
+
+        .name                           = "UV large system",
+        .probe                          = NULL,
+        .acpi_madt_oem_check            = uv_acpi_madt_oem_check,
+        .apic_id_registered             = uv_apic_id_registered,
+
+        .irq_delivery_mode              = dest_Fixed,
+        .irq_dest_mode                  = 1, /* logical */
+
+        .target_cpus                    = uv_target_cpus,
+        .disable_esr                    = 0,
+        .dest_logical                   = APIC_DEST_LOGICAL,
+        .check_apicid_used              = NULL,
+        .check_apicid_present           = NULL,
+
+        .vector_allocation_domain       = uv_vector_allocation_domain,
+        .init_apic_ldr                  = uv_init_apic_ldr,
+
+        .ioapic_phys_id_map             = NULL,
+        .setup_apic_routing             = NULL,
+        .multi_timer_check              = NULL,
+        .apicid_to_node                 = NULL,
+        .cpu_to_logical_apicid          = NULL,
+        .cpu_present_to_apicid          = default_cpu_present_to_apicid,
+        .apicid_to_cpu_present          = NULL,
+        .setup_portio_remap             = NULL,
+        .check_phys_apicid_present      = default_check_phys_apicid_present,
+        .enable_apic_mode               = NULL,
+        .phys_pkg_id                    = uv_phys_pkg_id,
+        .mps_oem_check                  = NULL,
+
+        .get_apic_id                    = x2apic_get_apic_id,
+        .set_apic_id                    = set_apic_id,
+        .apic_id_mask                   = 0xFFFFFFFFu,
+
+        .cpu_mask_to_apicid             = uv_cpu_mask_to_apicid,
+        .cpu_mask_to_apicid_and         = uv_cpu_mask_to_apicid_and,
+
+        .send_IPI_mask                  = uv_send_IPI_mask,
+        .send_IPI_mask_allbutself       = uv_send_IPI_mask_allbutself,
+        .send_IPI_allbutself            = uv_send_IPI_allbutself,
+        .send_IPI_all                   = uv_send_IPI_all,
+        .send_IPI_self                  = uv_send_IPI_self,
+
+        .wakeup_secondary_cpu           = uv_wakeup_secondary,
+        .trampoline_phys_low            = DEFAULT_TRAMPOLINE_PHYS_LOW,
+        .trampoline_phys_high           = DEFAULT_TRAMPOLINE_PHYS_HIGH,
+        .wait_for_init_deassert         = NULL,
+        .smp_callin_clear_local_apic    = NULL,
+        .inquire_remote_apic            = NULL,
+
+        .read                           = native_apic_msr_read,
+        .write                          = native_apic_msr_write,
+        .icr_read                       = native_x2apic_icr_read,
+        .icr_write                      = native_x2apic_icr_write,
+        .wait_icr_idle                  = native_x2apic_wait_icr_idle,
+        .safe_wait_icr_idle             = native_safe_x2apic_wait_icr_idle,
 };
 
 static __cpuinit void set_x2apic_extra_bits(int pnode)
@@ -322,7 +369,7 @@ static __init void map_high(char *id, unsigned long base, int shift,
         paddr = base << shift;
         bytes = (1UL << shift) * (max_pnode + 1);
         printk(KERN_INFO "UV: Map %s_HI 0x%lx - 0x%lx\n", id, paddr,
-                                                paddr + bytes);
+                                                paddr + bytes);
         if (map_type == map_uc)
                 init_extra_mapping_uc(paddr, bytes);
         else
@@ -485,7 +532,7 @@ late_initcall(uv_init_heartbeat);
 
 /*
  * Called on each cpu to initialize the per_cpu UV data area.
- *      ZZZ hotplug not supported yet
+ * FIXME: hotplug not supported yet
  */
 void __cpuinit uv_cpu_init(void)
 {
diff --git a/arch/x86/kernel/apm_32.c b/arch/x86/kernel/apm_32.c
index 266ec6c18b6c..10033fe718e0 100644
--- a/arch/x86/kernel/apm_32.c
+++ b/arch/x86/kernel/apm_32.c
@@ -301,7 +301,7 @@ extern int (*console_blank_hook)(int);
  */
 #define APM_ZERO_SEGS
 
-#include "apm.h"
+#include <asm/apm.h>
 
 /*
  * Define to re-initialize the interrupt 0 timer to 100 Hz after a suspend.
diff --git a/arch/x86/kernel/asm-offsets_32.c b/arch/x86/kernel/asm-offsets_32.c
index ee4df08feee6..fbf2f33e3080 100644
--- a/arch/x86/kernel/asm-offsets_32.c
+++ b/arch/x86/kernel/asm-offsets_32.c
@@ -75,6 +75,7 @@ void foo(void)
         OFFSET(PT_DS,  pt_regs, ds);
         OFFSET(PT_ES,  pt_regs, es);
         OFFSET(PT_FS,  pt_regs, fs);
+        OFFSET(PT_GS,  pt_regs, gs);
         OFFSET(PT_ORIG_EAX, pt_regs, orig_ax);
         OFFSET(PT_EIP, pt_regs, ip);
         OFFSET(PT_CS,  pt_regs, cs);
diff --git a/arch/x86/kernel/asm-offsets_64.c b/arch/x86/kernel/asm-offsets_64.c
index 1d41d3f1edbc..8793ab33e2c1 100644
--- a/arch/x86/kernel/asm-offsets_64.c
+++ b/arch/x86/kernel/asm-offsets_64.c
@@ -11,7 +11,6 @@
 #include <linux/hardirq.h>
 #include <linux/suspend.h>
 #include <linux/kbuild.h>
-#include <asm/pda.h>
 #include <asm/processor.h>
 #include <asm/segment.h>
 #include <asm/thread_info.h>
@@ -48,16 +47,6 @@ int main(void)
 #endif
         BLANK();
 #undef ENTRY
-#define ENTRY(entry) DEFINE(pda_ ## entry, offsetof(struct x8664_pda, entry))
-        ENTRY(kernelstack); 
-        ENTRY(oldrsp); 
-        ENTRY(pcurrent); 
-        ENTRY(irqcount);
-        ENTRY(cpunumber);
-        ENTRY(irqstackptr);
-        ENTRY(data_offset);
-        BLANK();
-#undef ENTRY
 #ifdef CONFIG_PARAVIRT
         BLANK();
         OFFSET(PARAVIRT_enabled, pv_info, paravirt_enabled);
diff --git a/arch/x86/kernel/cpu/addon_cpuid_features.c b/arch/x86/kernel/cpu/addon_cpuid_features.c
index 2cf23634b6d9..6882a735d9c0 100644
--- a/arch/x86/kernel/cpu/addon_cpuid_features.c
+++ b/arch/x86/kernel/cpu/addon_cpuid_features.c
@@ -7,7 +7,7 @@
 #include <asm/pat.h>
 #include <asm/processor.h>
 
-#include <mach_apic.h>
+#include <asm/apic.h>
 
 struct cpuid_bit {
         u16 feature;
@@ -69,7 +69,7 @@ void __cpuinit init_scattered_cpuid_features(struct cpuinfo_x86 *c)
  */
 void __cpuinit detect_extended_topology(struct cpuinfo_x86 *c)
 {
-#ifdef CONFIG_X86_SMP
+#ifdef CONFIG_SMP
         unsigned int eax, ebx, ecx, edx, sub_index;
         unsigned int ht_mask_width, core_plus_mask_width;
         unsigned int core_select_mask, core_level_siblings;
@@ -116,22 +116,14 @@ void __cpuinit detect_extended_topology(struct cpuinfo_x86 *c)
 
         core_select_mask = (~(-1 << core_plus_mask_width)) >> ht_mask_width;
 
-#ifdef CONFIG_X86_32
-        c->cpu_core_id = phys_pkg_id(c->initial_apicid, ht_mask_width)
+        c->cpu_core_id = apic->phys_pkg_id(c->initial_apicid, ht_mask_width)
                                                  & core_select_mask;
-        c->phys_proc_id = phys_pkg_id(c->initial_apicid, core_plus_mask_width);
+        c->phys_proc_id = apic->phys_pkg_id(c->initial_apicid, core_plus_mask_width);
         /*
          * Reinit the apicid, now that we have extended initial_apicid.
          */
-        c->apicid = phys_pkg_id(c->initial_apicid, 0);
-#else
-        c->cpu_core_id = phys_pkg_id(ht_mask_width) & core_select_mask;
-        c->phys_proc_id = phys_pkg_id(core_plus_mask_width);
-        /*
-         * Reinit the apicid, now that we have extended initial_apicid.
-         */
-        c->apicid = phys_pkg_id(0);
-#endif
+        c->apicid = apic->phys_pkg_id(c->initial_apicid, 0);
+
         c->x86_max_cores = (core_level_siblings / smp_num_siblings);
 
 
@@ -143,37 +135,3 @@ void __cpuinit detect_extended_topology(struct cpuinfo_x86 *c)
         return;
 #endif
 }
-
-#ifdef CONFIG_X86_PAT
-void __cpuinit validate_pat_support(struct cpuinfo_x86 *c)
-{
-        if (!cpu_has_pat)
-                pat_disable("PAT not supported by CPU.");
-
-        switch (c->x86_vendor) {
-        case X86_VENDOR_INTEL:
-                /*
-                 * There is a known erratum on Pentium III and Core Solo
-                 * and Core Duo CPUs.
-                 * " Page with PAT set to WC while associated MTRR is UC
-                 *   may consolidate to UC "
-                 * Because of this erratum, it is better to stick with
-                 * setting WC in MTRR rather than using PAT on these CPUs.
-                 *
-                 * Enable PAT WC only on P4, Core 2 or later CPUs.
-                 */
-                if (c->x86 > 0x6 || (c->x86 == 6 && c->x86_model >= 15))
-                        return;
-
-                pat_disable("PAT WC disabled due to known CPU erratum.");
-                return;
-
-        case X86_VENDOR_AMD:
-        case X86_VENDOR_CENTAUR:
-        case X86_VENDOR_TRANSMETA:
-                return;
-        }
-
-        pat_disable("PAT disabled. Not yet verified on this CPU type.");
-}
-#endif
diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
index 7c878f6aa919..25423a5b80ed 100644
--- a/arch/x86/kernel/cpu/amd.c
+++ b/arch/x86/kernel/cpu/amd.c
@@ -12,8 +12,6 @@
 # include <asm/cacheflush.h>
 #endif
 
-#include <mach_apic.h>
-
 #include "cpu.h"
 
 #ifdef CONFIG_X86_32
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index 83492b1f93b1..826d5c876278 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -21,14 +21,14 @@
 #include <asm/asm.h>
 #include <asm/numa.h>
 #include <asm/smp.h>
-#ifdef CONFIG_X86_LOCAL_APIC
-#include <asm/mpspec.h>
+#include <asm/cpu.h>
+#include <asm/cpumask.h>
 #include <asm/apic.h>
-#include <mach_apic.h>
-#include <asm/genapic.h>
+
+#ifdef CONFIG_X86_LOCAL_APIC
+#include <asm/uv/uv.h>
 #endif
 
-#include <asm/pda.h>
 #include <asm/pgtable.h>
 #include <asm/processor.h>
 #include <asm/desc.h>
@@ -37,6 +37,7 @@
 #include <asm/sections.h>
 #include <asm/setup.h>
 #include <asm/hypervisor.h>
+#include <asm/stackprotector.h>
 
 #include "cpu.h"
 
@@ -50,6 +51,15 @@ cpumask_var_t cpu_initialized_mask;
 /* representing cpus for which sibling maps can be computed */
 cpumask_var_t cpu_sibling_setup_mask;
 
+/* correctly size the local cpu masks */
+void __init setup_cpu_local_masks(void)
+{
+        alloc_bootmem_cpumask_var(&cpu_initialized_mask);
+        alloc_bootmem_cpumask_var(&cpu_callin_mask);
+        alloc_bootmem_cpumask_var(&cpu_callout_mask);
+        alloc_bootmem_cpumask_var(&cpu_sibling_setup_mask);
+}
+
 #else /* CONFIG_X86_32 */
 
 cpumask_t cpu_callin_map;
@@ -62,23 +72,23 @@ cpumask_t cpu_sibling_setup_map;
 
 static struct cpu_dev *this_cpu __cpuinitdata;
 
+DEFINE_PER_CPU_PAGE_ALIGNED(struct gdt_page, gdt_page) = { .gdt = {
 #ifdef CONFIG_X86_64
-/* We need valid kernel segments for data and code in long mode too
- * IRET will check the segment types  kkeil 2000/10/28
- * Also sysret mandates a special GDT layout
- */
-/* The TLS descriptors are currently at a different place compared to i386.
-   Hopefully nobody expects them at a fixed place (Wine?) */
-DEFINE_PER_CPU(struct gdt_page, gdt_page) = { .gdt = {
+        /*
+         * We need valid kernel segments for data and code in long mode too
+         * IRET will check the segment types  kkeil 2000/10/28
+         * Also sysret mandates a special GDT layout
+         *
+         * The TLS descriptors are currently at a different place compared to i386.
+         * Hopefully nobody expects them at a fixed place (Wine?)
+         */
         [GDT_ENTRY_KERNEL32_CS] = { { { 0x0000ffff, 0x00cf9b00 } } },
         [GDT_ENTRY_KERNEL_CS] = { { { 0x0000ffff, 0x00af9b00 } } },
         [GDT_ENTRY_KERNEL_DS] = { { { 0x0000ffff, 0x00cf9300 } } },
         [GDT_ENTRY_DEFAULT_USER32_CS] = { { { 0x0000ffff, 0x00cffb00 } } },
         [GDT_ENTRY_DEFAULT_USER_DS] = { { { 0x0000ffff, 0x00cff300 } } },
         [GDT_ENTRY_DEFAULT_USER_CS] = { { { 0x0000ffff, 0x00affb00 } } },
-} };
 #else
-DEFINE_PER_CPU_PAGE_ALIGNED(struct gdt_page, gdt_page) = { .gdt = {
         [GDT_ENTRY_KERNEL_CS] = { { { 0x0000ffff, 0x00cf9a00 } } },
         [GDT_ENTRY_KERNEL_DS] = { { { 0x0000ffff, 0x00cf9200 } } },
         [GDT_ENTRY_DEFAULT_USER_CS] = { { { 0x0000ffff, 0x00cffa00 } } },
@@ -110,9 +120,10 @@ DEFINE_PER_CPU_PAGE_ALIGNED(struct gdt_page, gdt_page) = { .gdt = {
         [GDT_ENTRY_APMBIOS_BASE+2] = { { { 0x0000ffff, 0x00409200 } } },
 
         [GDT_ENTRY_ESPFIX_SS] = { { { 0x00000000, 0x00c09200 } } },
-        [GDT_ENTRY_PERCPU] = { { { 0x00000000, 0x00000000 } } },
-} };
+        [GDT_ENTRY_PERCPU] = { { { 0x0000ffff, 0x00cf9200 } } },
+        GDT_STACK_CANARY_INIT
 #endif
+} };
 EXPORT_PER_CPU_SYMBOL_GPL(gdt_page);
 
 #ifdef CONFIG_X86_32
@@ -213,6 +224,49 @@ static inline void squash_the_stupid_serial_number(struct cpuinfo_x86 *c)
 #endif
 
 /*
+ * Some CPU features depend on higher CPUID levels, which may not always
+ * be available due to CPUID level capping or broken virtualization
+ * software.  Add those features to this table to auto-disable them.
+ */
+struct cpuid_dependent_feature {
+        u32 feature;
+        u32 level;
+};
+static const struct cpuid_dependent_feature __cpuinitconst
+cpuid_dependent_features[] = {
+        { X86_FEATURE_MWAIT,            0x00000005 },
+        { X86_FEATURE_DCA,              0x00000009 },
+        { X86_FEATURE_XSAVE,            0x0000000d },
+        { 0, 0 }
+};
+
+static void __cpuinit filter_cpuid_features(struct cpuinfo_x86 *c, bool warn)
+{
+        const struct cpuid_dependent_feature *df;
+        for (df = cpuid_dependent_features; df->feature; df++) {
+                /*
+                 * Note: cpuid_level is set to -1 if unavailable, but
+                 * extended_extended_level is set to 0 if unavailable
+                 * and the legitimate extended levels are all negative
+                 * when signed; hence the weird messing around with
+                 * signs here...
+                 */
+                if (cpu_has(c, df->feature) &&
+                    ((s32)df->level < 0 ?
+                     (u32)df->level > (u32)c->extended_cpuid_level :
+                     (s32)df->level > (s32)c->cpuid_level)) {
+                        clear_cpu_cap(c, df->feature);
+                        if (warn)
+                                printk(KERN_WARNING
+                                       "CPU: CPU feature %s disabled "
+                                       "due to lack of CPUID level 0x%x\n",
+                                       x86_cap_flags[df->feature],
+                                       df->level);
+                }
+        }
+}
+
+/*
  * Naming convention should be: <Name> [(<Codename>)]
  * This table only is used unless init_<vendor>() below doesn't set it;
  * in particular, if CPUID levels 0x80000002..4 are supported, this isn't used
@@ -242,18 +296,29 @@ static char __cpuinit *table_lookup_model(struct cpuinfo_x86 *c)
 
 __u32 cleared_cpu_caps[NCAPINTS] __cpuinitdata;
 
+void load_percpu_segment(int cpu)
+{
+#ifdef CONFIG_X86_32
+        loadsegment(fs, __KERNEL_PERCPU);
+#else
+        loadsegment(gs, 0);
+        wrmsrl(MSR_GS_BASE, (unsigned long)per_cpu(irq_stack_union.gs_base, cpu));
+#endif
+        load_stack_canary_segment();
+}
+
 /* Current gdt points %fs at the "master" per-cpu area: after this,
  * it's on the real one. */
-void switch_to_new_gdt(void)
+void switch_to_new_gdt(int cpu)
 {
         struct desc_ptr gdt_descr;
 
-        gdt_descr.address = (long)get_cpu_gdt_table(smp_processor_id());
+        gdt_descr.address = (long)get_cpu_gdt_table(cpu);
         gdt_descr.size = GDT_SIZE - 1;
         load_gdt(&gdt_descr);
-#ifdef CONFIG_X86_32
-        asm("mov %0, %%fs" : : "r" (__KERNEL_PERCPU) : "memory");
-#endif
+        /* Reload the per-cpu base */
+
+        load_percpu_segment(cpu);
 }
 
 static struct cpu_dev *cpu_devs[X86_VENDOR_NUM] = {};
@@ -383,11 +448,7 @@ void __cpuinit detect_ht(struct cpuinfo_x86 *c)
                 }
 
                 index_msb = get_count_order(smp_num_siblings);
-#ifdef CONFIG_X86_64
-                c->phys_proc_id = phys_pkg_id(index_msb);
-#else
-                c->phys_proc_id = phys_pkg_id(c->initial_apicid, index_msb);
-#endif
+                c->phys_proc_id = apic->phys_pkg_id(c->initial_apicid, index_msb);
 
                 smp_num_siblings = smp_num_siblings / c->x86_max_cores;
 
@@ -395,13 +456,8 @@ void __cpuinit detect_ht(struct cpuinfo_x86 *c)
 
                 core_bits = get_count_order(c->x86_max_cores);
 
-#ifdef CONFIG_X86_64
-                c->cpu_core_id = phys_pkg_id(index_msb) &
+                c->cpu_core_id = apic->phys_pkg_id(c->initial_apicid, index_msb) &
                                                ((1 << core_bits) - 1);
-#else
-                c->cpu_core_id = phys_pkg_id(c->initial_apicid, index_msb) &
-                                               ((1 << core_bits) - 1);
-#endif
         }
 
 out:
@@ -570,11 +626,10 @@ static void __init early_identify_cpu(struct cpuinfo_x86 *c)
         if (this_cpu->c_early_init)
                 this_cpu->c_early_init(c);
 
-        validate_pat_support(c);
-
 #ifdef CONFIG_SMP
         c->cpu_index = boot_cpu_id;
 #endif
+        filter_cpuid_features(c, false);
 }
 
 void __init early_cpu_init(void)
@@ -637,7 +692,7 @@ static void __cpuinit generic_identify(struct cpuinfo_x86 *c)
                 c->initial_apicid = (cpuid_ebx(1) >> 24) & 0xFF;
 #ifdef CONFIG_X86_32
 # ifdef CONFIG_X86_HT
-                c->apicid = phys_pkg_id(c->initial_apicid, 0);
+                c->apicid = apic->phys_pkg_id(c->initial_apicid, 0);
 # else
                 c->apicid = c->initial_apicid;
 # endif
@@ -684,7 +739,7 @@ static void __cpuinit identify_cpu(struct cpuinfo_x86 *c)
                 this_cpu->c_identify(c);
 
 #ifdef CONFIG_X86_64
-        c->apicid = phys_pkg_id(0);
+        c->apicid = apic->phys_pkg_id(c->initial_apicid, 0);
 #endif
 
         /*
@@ -708,6 +763,9 @@ static void __cpuinit identify_cpu(struct cpuinfo_x86 *c)
          * we do "generic changes."
          */
 
+        /* Filter out anything that depends on CPUID levels we don't have */
+        filter_cpuid_features(c, true);
+
         /* If the model name is still unset, do table lookup. */
         if (!c->x86_model_id[0]) {
                 char *p;
@@ -877,54 +935,22 @@ static __init int setup_disablecpuid(char *arg)
 __setup("clearcpuid=", setup_disablecpuid);
 
 #ifdef CONFIG_X86_64
-struct x8664_pda **_cpu_pda __read_mostly;
-EXPORT_SYMBOL(_cpu_pda);
-
 struct desc_ptr idt_descr = { 256 * 16 - 1, (unsigned long) idt_table };
 
-static char boot_cpu_stack[IRQSTACKSIZE] __page_aligned_bss;
+DEFINE_PER_CPU_FIRST(union irq_stack_union,
+                     irq_stack_union) __aligned(PAGE_SIZE);
+DEFINE_PER_CPU(char *, irq_stack_ptr) =
+        init_per_cpu_var(irq_stack_union.irq_stack) + IRQ_STACK_SIZE - 64;
 
-void __cpuinit pda_init(int cpu)
-{
-        struct x8664_pda *pda = cpu_pda(cpu);
+DEFINE_PER_CPU(unsigned long, kernel_stack) =
+        (unsigned long)&init_thread_union - KERNEL_STACK_OFFSET + THREAD_SIZE;
+EXPORT_PER_CPU_SYMBOL(kernel_stack);
 
-        /* Setup up data that may be needed in __get_free_pages early */
-        loadsegment(fs, 0);
-        loadsegment(gs, 0);
-        /* Memory clobbers used to order PDA accessed */
-        mb();
-        wrmsrl(MSR_GS_BASE, pda);
-        mb();
-
-        pda->cpunumber = cpu;
-        pda->irqcount = -1;
-        pda->kernelstack = (unsigned long)stack_thread_info() -
-                                 PDA_STACKOFFSET + THREAD_SIZE;
-        pda->active_mm = &init_mm;
-        pda->mmu_state = 0;
-
-        if (cpu == 0) {
-                /* others are initialized in smpboot.c */
-                pda->pcurrent = &init_task;
-                pda->irqstackptr = boot_cpu_stack;
-                pda->irqstackptr += IRQSTACKSIZE - 64;
-        } else {
-                if (!pda->irqstackptr) {
-                        pda->irqstackptr = (char *)
-                                __get_free_pages(GFP_ATOMIC, IRQSTACK_ORDER);
-                        if (!pda->irqstackptr)
-                                panic("cannot allocate irqstack for cpu %d",
-                                      cpu);
-                        pda->irqstackptr += IRQSTACKSIZE - 64;
-                }
+DEFINE_PER_CPU(unsigned int, irq_count) = -1;
 
-                if (pda->nodenumber == 0 && cpu_to_node(cpu) != NUMA_NO_NODE)
-                        pda->nodenumber = cpu_to_node(cpu);
-        }
-}
-
-static char boot_exception_stacks[(N_EXCEPTION_STACKS - 1) * EXCEPTION_STKSZ +
-                                  DEBUG_STKSZ] __page_aligned_bss;
+static DEFINE_PER_CPU_PAGE_ALIGNED(char, exception_stacks
+        [(N_EXCEPTION_STACKS - 1) * EXCEPTION_STKSZ + DEBUG_STKSZ])
+        __aligned(PAGE_SIZE);
 
 extern asmlinkage void ignore_sysret(void);
 
@@ -957,16 +983,21 @@ unsigned long kernel_eflags;
  */
 DEFINE_PER_CPU(struct orig_ist, orig_ist);
 
-#else
+#else   /* x86_64 */
 
-/* Make sure %fs is initialized properly in idle threads */
+#ifdef CONFIG_CC_STACKPROTECTOR
+DEFINE_PER_CPU(unsigned long, stack_canary);
+#endif
+
+/* Make sure %fs and %gs are initialized properly in idle threads */
 struct pt_regs * __cpuinit idle_regs(struct pt_regs *regs)
 {
         memset(regs, 0, sizeof(struct pt_regs));
         regs->fs = __KERNEL_PERCPU;
+        regs->gs = __KERNEL_STACK_CANARY;
         return regs;
 }
-#endif
+#endif  /* x86_64 */
 
 /*
  * cpu_init() initializes state that is per-CPU. Some data is already
@@ -982,15 +1013,14 @@ void __cpuinit cpu_init(void)
         struct tss_struct *t = &per_cpu(init_tss, cpu);
         struct orig_ist *orig_ist = &per_cpu(orig_ist, cpu);
         unsigned long v;
-        char *estacks = NULL;
         struct task_struct *me;
         int i;
 
-        /* CPU 0 is initialised in head64.c */
-        if (cpu != 0)
-                pda_init(cpu);
-        else
-                estacks = boot_exception_stacks;
+#ifdef CONFIG_NUMA
+        if (cpu != 0 && percpu_read(node_number) == 0 &&
+            cpu_to_node(cpu) != NUMA_NO_NODE)
+                percpu_write(node_number, cpu_to_node(cpu));
+#endif
 
         me = current;
 
@@ -1006,7 +1036,9 @@ void __cpuinit cpu_init(void)
          * and set up the GDT descriptor:
          */
 
-        switch_to_new_gdt();
+        switch_to_new_gdt(cpu);
+        loadsegment(fs, 0);
+
         load_idt((const struct desc_ptr *)&idt_descr);
 
         memset(me->thread.tls_array, 0, GDT_ENTRY_TLS_ENTRIES * 8);
@@ -1017,25 +1049,20 @@ void __cpuinit cpu_init(void)
         barrier();
 
         check_efer();
-        if (cpu != 0 && x2apic)
+        if (cpu != 0)
                 enable_x2apic();
 
         /*
          * set up and load the per-CPU TSS
          */
         if (!orig_ist->ist[0]) {
-                static const unsigned int order[N_EXCEPTION_STACKS] = {
-                  [0 ... N_EXCEPTION_STACKS - 1] = EXCEPTION_STACK_ORDER,
-                  [DEBUG_STACK - 1] = DEBUG_STACK_ORDER
+                static const unsigned int sizes[N_EXCEPTION_STACKS] = {
+                  [0 ... N_EXCEPTION_STACKS - 1] = EXCEPTION_STKSZ,
+                  [DEBUG_STACK - 1] = DEBUG_STKSZ
                 };
+                char *estacks = per_cpu(exception_stacks, cpu);
                 for (v = 0; v < N_EXCEPTION_STACKS; v++) {
-                        if (cpu) {
-                                estacks = (char *)__get_free_pages(GFP_ATOMIC, order[v]);
-                                if (!estacks)
-                                        panic("Cannot allocate exception "
-                                              "stack %ld %d\n", v, cpu);
-                        }
-                        estacks += PAGE_SIZE << order[v];
+                        estacks += sizes[v];
                         orig_ist->ist[v] = t->x86_tss.ist[v] =
                                         (unsigned long)estacks;
                 }
@@ -1069,22 +1096,19 @@ void __cpuinit cpu_init(void)
          */
         if (kgdb_connected && arch_kgdb_ops.correct_hw_break)
                 arch_kgdb_ops.correct_hw_break();
-        else {
+        else
 #endif
-        /*
-         * Clear all 6 debug registers:
-         */
-
-        set_debugreg(0UL, 0);
-        set_debugreg(0UL, 1);
-        set_debugreg(0UL, 2);
-        set_debugreg(0UL, 3);
-        set_debugreg(0UL, 6);
-        set_debugreg(0UL, 7);
-#ifdef CONFIG_KGDB
-        /* If the kgdb is connected no debug regs should be altered. */
+        {
+                /*
+                 * Clear all 6 debug registers:
+                 */
+                set_debugreg(0UL, 0);
+                set_debugreg(0UL, 1);
+                set_debugreg(0UL, 2);
+                set_debugreg(0UL, 3);
+                set_debugreg(0UL, 6);
+                set_debugreg(0UL, 7);
         }
-#endif
 
         fpu_init();
 
@@ -1114,7 +1138,7 @@ void __cpuinit cpu_init(void)
                 clear_in_cr4(X86_CR4_VME|X86_CR4_PVI|X86_CR4_TSD|X86_CR4_DE);
 
         load_idt(&idt_descr);
-        switch_to_new_gdt();
+        switch_to_new_gdt(cpu);
 
         /*
          * Set up and load the per-CPU TSS and LDT
@@ -1135,9 +1159,6 @@ void __cpuinit cpu_init(void)
         __set_tss_desc(cpu, GDT_ENTRY_DOUBLEFAULT_TSS, &doublefault_tss);
 #endif
 
-        /* Clear %gs. */
-        asm volatile ("mov %0, %%gs" : : "r" (0));
-
         /* Clear all 6 debug registers: */
         set_debugreg(0, 0);
         set_debugreg(0, 1);
diff --git a/arch/x86/kernel/cpu/cpufreq/Kconfig b/arch/x86/kernel/cpu/cpufreq/Kconfig
index 65792c2cc462..52c839875478 100644
--- a/arch/x86/kernel/cpu/cpufreq/Kconfig
+++ b/arch/x86/kernel/cpu/cpufreq/Kconfig
@@ -87,30 +87,15 @@ config X86_POWERNOW_K7_ACPI
 config X86_POWERNOW_K8
         tristate "AMD Opteron/Athlon64 PowerNow!"
         select CPU_FREQ_TABLE
+        depends on ACPI && ACPI_PROCESSOR
         help
-          This adds the CPUFreq driver for mobile AMD Opteron/Athlon64 processors.
+          This adds the CPUFreq driver for K8/K10 Opteron/Athlon64 processors.
 
           To compile this driver as a module, choose M here: the
           module will be called powernow-k8.
 
           For details, take a look at <file:Documentation/cpu-freq/>.
 
-          If in doubt, say N.
-
-config X86_POWERNOW_K8_ACPI
-        bool
-        prompt "ACPI Support" if X86_32
-        depends on ACPI && X86_POWERNOW_K8 && ACPI_PROCESSOR
-        depends on !(X86_POWERNOW_K8 = y && ACPI_PROCESSOR = m)
-        default y
-        help
-          This provides access to the K8s Processor Performance States via ACPI.
-          This driver is probably required for CPUFreq to work with multi-socket and
-          SMP systems.  It is not required on at least some single-socket yet
-          multi-core systems, even if SMP is enabled.
-
-          It is safe to say Y here.
-
 config X86_GX_SUSPMOD
         tristate "Cyrix MediaGX/NatSemi Geode Suspend Modulation"
         depends on X86_32 && PCI
diff --git a/arch/x86/kernel/cpu/cpufreq/Makefile b/arch/x86/kernel/cpu/cpufreq/Makefile
index 560f7760dae5..509296df294d 100644
--- a/arch/x86/kernel/cpu/cpufreq/Makefile
+++ b/arch/x86/kernel/cpu/cpufreq/Makefile
@@ -1,6 +1,11 @@
+# Link order matters. K8 is preferred to ACPI because of firmware bugs in early
+# K8 systems. ACPI is preferred to all other hardware-specific drivers.
+# speedstep-* is preferred over p4-clockmod.
+
+obj-$(CONFIG_X86_POWERNOW_K8)           += powernow-k8.o
+obj-$(CONFIG_X86_ACPI_CPUFREQ)          += acpi-cpufreq.o
 obj-$(CONFIG_X86_POWERNOW_K6)           += powernow-k6.o
 obj-$(CONFIG_X86_POWERNOW_K7)           += powernow-k7.o
-obj-$(CONFIG_X86_POWERNOW_K8)           += powernow-k8.o
 obj-$(CONFIG_X86_LONGHAUL)              += longhaul.o
 obj-$(CONFIG_X86_E_POWERSAVER)          += e_powersaver.o
 obj-$(CONFIG_ELAN_CPUFREQ)              += elanfreq.o
@@ -10,7 +15,6 @@ obj-$(CONFIG_X86_GX_SUSPMOD)		+= gx-suspmod.o
 obj-$(CONFIG_X86_SPEEDSTEP_ICH)         += speedstep-ich.o
 obj-$(CONFIG_X86_SPEEDSTEP_LIB)         += speedstep-lib.o
 obj-$(CONFIG_X86_SPEEDSTEP_SMI)         += speedstep-smi.o
-obj-$(CONFIG_X86_ACPI_CPUFREQ)          += acpi-cpufreq.o
 obj-$(CONFIG_X86_SPEEDSTEP_CENTRINO)    += speedstep-centrino.o
 obj-$(CONFIG_X86_P4_CLOCKMOD)           += p4-clockmod.o
 obj-$(CONFIG_X86_CPUFREQ_NFORCE2)       += cpufreq-nforce2.o
diff --git a/arch/x86/kernel/cpu/cpufreq/acpi-cpufreq.c b/arch/x86/kernel/cpu/cpufreq/acpi-cpufreq.c
index 4b1c319d30c3..23da96e57b17 100644
--- a/arch/x86/kernel/cpu/cpufreq/acpi-cpufreq.c
+++ b/arch/x86/kernel/cpu/cpufreq/acpi-cpufreq.c
@@ -1,5 +1,5 @@
 /*
- * acpi-cpufreq.c - ACPI Processor P-States Driver ($Revision: 1.4 $)
+ * acpi-cpufreq.c - ACPI Processor P-States Driver
  *
  *  Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
  *  Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
@@ -36,16 +36,18 @@
 #include <linux/ftrace.h>
 
 #include <linux/acpi.h>
+#include <linux/io.h>
+#include <linux/delay.h>
+#include <linux/uaccess.h>
+
 #include <acpi/processor.h>
 
-#include <asm/io.h>
 #include <asm/msr.h>
 #include <asm/processor.h>
 #include <asm/cpufeature.h>
-#include <asm/delay.h>
-#include <asm/uaccess.h>
 
-#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, "acpi-cpufreq", msg)
+#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, \
+                "acpi-cpufreq", msg)
 
 MODULE_AUTHOR("Paul Diefenbaugh, Dominik Brodowski");
 MODULE_DESCRIPTION("ACPI Processor P-States Driver");
@@ -95,7 +97,7 @@ static unsigned extract_io(u32 value, struct acpi_cpufreq_data *data)
 
         perf = data->acpi_data;
 
-        for (i=0; i<perf->state_count; i++) {
+        for (i = 0; i < perf->state_count; i++) {
                 if (value == perf->states[i].status)
                         return data->freq_table[i].frequency;
         }
@@ -110,7 +112,7 @@ static unsigned extract_msr(u32 msr, struct acpi_cpufreq_data *data)
         msr &= INTEL_MSR_RANGE;
         perf = data->acpi_data;
 
-        for (i=0; data->freq_table[i].frequency != CPUFREQ_TABLE_END; i++) {
+        for (i = 0; data->freq_table[i].frequency != CPUFREQ_TABLE_END; i++) {
                 if (msr == perf->states[data->freq_table[i].index].status)
                         return data->freq_table[i].frequency;
         }
@@ -138,15 +140,13 @@ struct io_addr {
         u8 bit_width;
 };
 
-typedef union {
-        struct msr_addr msr;
-        struct io_addr io;
-} drv_addr_union;
-
 struct drv_cmd {
         unsigned int type;
         const struct cpumask *mask;
-        drv_addr_union addr;
+        union {
+                struct msr_addr msr;
+                struct io_addr io;
+        } addr;
         u32 val;
 };
 
@@ -369,7 +369,7 @@ static unsigned int check_freqs(const struct cpumask *mask, unsigned int freq,
         unsigned int cur_freq;
         unsigned int i;
 
-        for (i=0; i<100; i++) {
+        for (i = 0; i < 100; i++) {
                 cur_freq = extract_freq(get_cur_val(mask), data);
                 if (cur_freq == freq)
                         return 1;
@@ -494,7 +494,7 @@ acpi_cpufreq_guess_freq(struct acpi_cpufreq_data *data, unsigned int cpu)
                 unsigned long freq;
                 unsigned long freqn = perf->states[0].core_frequency * 1000;
 
-                for (i=0; i<(perf->state_count-1); i++) {
+                for (i = 0; i < (perf->state_count-1); i++) {
                         freq = freqn;
                         freqn = perf->states[i+1].core_frequency * 1000;
                         if ((2 * cpu_khz) > (freqn + freq)) {
@@ -601,7 +601,7 @@ static int acpi_cpufreq_cpu_init(struct cpufreq_policy *policy)
         if (!data)
                 return -ENOMEM;
 
-        data->acpi_data = percpu_ptr(acpi_perf_data, cpu);
+        data->acpi_data = per_cpu_ptr(acpi_perf_data, cpu);
         per_cpu(drv_data, cpu) = data;
 
         if (cpu_has(c, X86_FEATURE_CONSTANT_TSC))
@@ -673,7 +673,7 @@ static int acpi_cpufreq_cpu_init(struct cpufreq_policy *policy)
 
         /* detect transition latency */
         policy->cpuinfo.transition_latency = 0;
-        for (i=0; i<perf->state_count; i++) {
+        for (i = 0; i < perf->state_count; i++) {
                 if ((perf->states[i].transition_latency * 1000) >
                     policy->cpuinfo.transition_latency)
                         policy->cpuinfo.transition_latency =
@@ -682,8 +682,8 @@ static int acpi_cpufreq_cpu_init(struct cpufreq_policy *policy)
 
         data->max_freq = perf->states[0].core_frequency * 1000;
         /* table init */
-        for (i=0; i<perf->state_count; i++) {
-                if (i>0 && perf->states[i].core_frequency >=
+        for (i = 0; i < perf->state_count; i++) {
+                if (i > 0 && perf->states[i].core_frequency >=
                     data->freq_table[valid_states-1].frequency / 1000)
                         continue;
 
diff --git a/arch/x86/kernel/cpu/cpufreq/cpufreq-nforce2.c b/arch/x86/kernel/cpu/cpufreq/cpufreq-nforce2.c
index 965ea52767ac..733093d60436 100644
--- a/arch/x86/kernel/cpu/cpufreq/cpufreq-nforce2.c
+++ b/arch/x86/kernel/cpu/cpufreq/cpufreq-nforce2.c
@@ -32,7 +32,7 @@
  * nforce2_chipset:
  * FSB is changed using the chipset
  */
-static struct pci_dev *nforce2_chipset_dev;
+static struct pci_dev *nforce2_dev;
 
 /* fid:
  * multiplier * 10
@@ -56,7 +56,9 @@ MODULE_PARM_DESC(fid, "CPU multiplier to use (11.5 = 115)");
 MODULE_PARM_DESC(min_fsb,
                 "Minimum FSB to use, if not defined: current FSB - 50");
 
-#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, "cpufreq-nforce2", msg)
+#define PFX "cpufreq-nforce2: "
+#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, \
+                "cpufreq-nforce2", msg)
 
 /**
  * nforce2_calc_fsb - calculate FSB
@@ -118,11 +120,11 @@ static void nforce2_write_pll(int pll)
         int temp;
 
         /* Set the pll addr. to 0x00 */
-        pci_write_config_dword(nforce2_chipset_dev, NFORCE2_PLLADR, 0);
+        pci_write_config_dword(nforce2_dev, NFORCE2_PLLADR, 0);
 
         /* Now write the value in all 64 registers */
         for (temp = 0; temp <= 0x3f; temp++)
-                pci_write_config_dword(nforce2_chipset_dev, NFORCE2_PLLREG, pll);
+                pci_write_config_dword(nforce2_dev, NFORCE2_PLLREG, pll);
 
         return;
 }
@@ -139,8 +141,8 @@ static unsigned int nforce2_fsb_read(int bootfsb)
         u32 fsb, temp = 0;
 
         /* Get chipset boot FSB from subdevice 5 (FSB at boot-time) */
-        nforce2_sub5 = pci_get_subsys(PCI_VENDOR_ID_NVIDIA,
-                                                0x01EF, PCI_ANY_ID, PCI_ANY_ID, NULL);
+        nforce2_sub5 = pci_get_subsys(PCI_VENDOR_ID_NVIDIA, 0x01EF,
+                                PCI_ANY_ID, PCI_ANY_ID, NULL);
         if (!nforce2_sub5)
                 return 0;
 
@@ -148,13 +150,13 @@ static unsigned int nforce2_fsb_read(int bootfsb)
         fsb /= 1000000;
 
         /* Check if PLL register is already set */
-        pci_read_config_byte(nforce2_chipset_dev, NFORCE2_PLLENABLE, (u8 *)&temp);
+        pci_read_config_byte(nforce2_dev, NFORCE2_PLLENABLE, (u8 *)&temp);
 
         if (bootfsb || !temp)
                 return fsb;
 
         /* Use PLL register FSB value */
-        pci_read_config_dword(nforce2_chipset_dev, NFORCE2_PLLREG, &temp);
+        pci_read_config_dword(nforce2_dev, NFORCE2_PLLREG, &temp);
         fsb = nforce2_calc_fsb(temp);
 
         return fsb;
@@ -174,18 +176,18 @@ static int nforce2_set_fsb(unsigned int fsb)
         int pll = 0;
 
         if ((fsb > max_fsb) || (fsb < NFORCE2_MIN_FSB)) {
-                printk(KERN_ERR "cpufreq: FSB %d is out of range!\n", fsb);
+                printk(KERN_ERR PFX "FSB %d is out of range!\n", fsb);
                 return -EINVAL;
         }
 
         tfsb = nforce2_fsb_read(0);
         if (!tfsb) {
-                printk(KERN_ERR "cpufreq: Error while reading the FSB\n");
+                printk(KERN_ERR PFX "Error while reading the FSB\n");
                 return -EINVAL;
         }
 
         /* First write? Then set actual value */
-        pci_read_config_byte(nforce2_chipset_dev, NFORCE2_PLLENABLE, (u8 *)&temp);
+        pci_read_config_byte(nforce2_dev, NFORCE2_PLLENABLE, (u8 *)&temp);
         if (!temp) {
                 pll = nforce2_calc_pll(tfsb);
 
@@ -197,7 +199,7 @@ static int nforce2_set_fsb(unsigned int fsb)
 
         /* Enable write access */
         temp = 0x01;
-        pci_write_config_byte(nforce2_chipset_dev, NFORCE2_PLLENABLE, (u8)temp);
+        pci_write_config_byte(nforce2_dev, NFORCE2_PLLENABLE, (u8)temp);
 
         diff = tfsb - fsb;
 
@@ -222,7 +224,7 @@ static int nforce2_set_fsb(unsigned int fsb)
         }
 
         temp = 0x40;
-        pci_write_config_byte(nforce2_chipset_dev, NFORCE2_PLLADR, (u8)temp);
+        pci_write_config_byte(nforce2_dev, NFORCE2_PLLADR, (u8)temp);
 
         return 0;
 }
@@ -244,7 +246,8 @@ static unsigned int nforce2_get(unsigned int cpu)
  * nforce2_target - set a new CPUFreq policy
  * @policy: new policy
  * @target_freq: the target frequency
- * @relation: how that frequency relates to achieved frequency (CPUFREQ_RELATION_L or CPUFREQ_RELATION_H)
+ * @relation: how that frequency relates to achieved frequency
+ *  (CPUFREQ_RELATION_L or CPUFREQ_RELATION_H)
  *
  * Sets a new CPUFreq policy.
  */
@@ -276,7 +279,7 @@ static int nforce2_target(struct cpufreq_policy *policy,
         /* local_irq_save(flags); */
 
         if (nforce2_set_fsb(target_fsb) < 0)
-                printk(KERN_ERR "cpufreq: Changing FSB to %d failed\n",
+                printk(KERN_ERR PFX "Changing FSB to %d failed\n",
                         target_fsb);
         else
                 dprintk("Changed FSB successfully to %d\n",
@@ -327,8 +330,8 @@ static int nforce2_cpu_init(struct cpufreq_policy *policy)
         /* FIX: Get FID from CPU */
         if (!fid) {
                 if (!cpu_khz) {
-                        printk(KERN_WARNING
-                               "cpufreq: cpu_khz not set, can't calculate multiplier!\n");
+                        printk(KERN_WARNING PFX
+                        "cpu_khz not set, can't calculate multiplier!\n");
                         return -ENODEV;
                 }
 
@@ -343,7 +346,7 @@ static int nforce2_cpu_init(struct cpufreq_policy *policy)
                 }
         }
 
-        printk(KERN_INFO "cpufreq: FSB currently at %i MHz, FID %d.%d\n", fsb,
+        printk(KERN_INFO PFX "FSB currently at %i MHz, FID %d.%d\n", fsb,
                fid / 10, fid % 10);
 
         /* Set maximum FSB to FSB at boot time */
@@ -392,17 +395,18 @@ static struct cpufreq_driver nforce2_driver = {
  */
 static unsigned int nforce2_detect_chipset(void)
 {
-        nforce2_chipset_dev = pci_get_subsys(PCI_VENDOR_ID_NVIDIA,
+        nforce2_dev = pci_get_subsys(PCI_VENDOR_ID_NVIDIA,
                                         PCI_DEVICE_ID_NVIDIA_NFORCE2,
                                         PCI_ANY_ID, PCI_ANY_ID, NULL);
 
-        if (nforce2_chipset_dev == NULL)
+        if (nforce2_dev == NULL)
                 return -ENODEV;
 
-        printk(KERN_INFO "cpufreq: Detected nForce2 chipset revision %X\n",
-               nforce2_chipset_dev->revision);
-        printk(KERN_INFO
-               "cpufreq: FSB changing is maybe unstable and can lead to crashes and data loss.\n");
+        printk(KERN_INFO PFX "Detected nForce2 chipset revision %X\n",
+               nforce2_dev->revision);
+        printk(KERN_INFO PFX
+               "FSB changing is maybe unstable and can lead to "
+               "crashes and data loss.\n");
 
         return 0;
 }
@@ -420,7 +424,7 @@ static int __init nforce2_init(void)
 
         /* detect chipset */
         if (nforce2_detect_chipset()) {
-                printk(KERN_ERR "cpufreq: No nForce2 chipset.\n");
+                printk(KERN_INFO PFX "No nForce2 chipset.\n");
                 return -ENODEV;
         }
 
diff --git a/arch/x86/kernel/cpu/cpufreq/e_powersaver.c b/arch/x86/kernel/cpu/cpufreq/e_powersaver.c
index c2f930d86640..35a257dd4bb7 100644
--- a/arch/x86/kernel/cpu/cpufreq/e_powersaver.c
+++ b/arch/x86/kernel/cpu/cpufreq/e_powersaver.c
@@ -12,12 +12,12 @@
 #include <linux/cpufreq.h>
 #include <linux/ioport.h>
 #include <linux/slab.h>
+#include <linux/timex.h>
+#include <linux/io.h>
+#include <linux/delay.h>
 
 #include <asm/msr.h>
 #include <asm/tsc.h>
-#include <asm/timex.h>
-#include <asm/io.h>
-#include <asm/delay.h>
 
 #define EPS_BRAND_C7M   0
 #define EPS_BRAND_C7    1
@@ -184,7 +184,7 @@ static int eps_cpu_init(struct cpufreq_policy *policy)
                 break;
         }
 
-        switch(brand) {
+        switch (brand) {
         case EPS_BRAND_C7M:
                 printk(KERN_CONT "C7-M\n");
                 break;
@@ -204,12 +204,12 @@ static int eps_cpu_init(struct cpufreq_policy *policy)
         }
         /* Enable Enhanced PowerSaver */
         rdmsrl(MSR_IA32_MISC_ENABLE, val);
-        if (!(val & 1 << 16)) {
-                val |= 1 << 16;
+        if (!(val & MSR_IA32_MISC_ENABLE_ENHANCED_SPEEDSTEP)) {
+                val |= MSR_IA32_MISC_ENABLE_ENHANCED_SPEEDSTEP;
                 wrmsrl(MSR_IA32_MISC_ENABLE, val);
                 /* Can be locked at 0 */
                 rdmsrl(MSR_IA32_MISC_ENABLE, val);
-                if (!(val & 1 << 16)) {
+                if (!(val & MSR_IA32_MISC_ENABLE_ENHANCED_SPEEDSTEP)) {
                         printk(KERN_INFO "eps: Can't enable Enhanced PowerSaver\n");
                         return -ENODEV;
                 }
@@ -218,17 +218,20 @@ static int eps_cpu_init(struct cpufreq_policy *policy)
         /* Print voltage and multiplier */
         rdmsr(MSR_IA32_PERF_STATUS, lo, hi);
         current_voltage = lo & 0xff;
-        printk(KERN_INFO "eps: Current voltage = %dmV\n", current_voltage * 16 + 700);
+        printk(KERN_INFO "eps: Current voltage = %dmV\n",
+                        current_voltage * 16 + 700);
         current_multiplier = (lo >> 8) & 0xff;
         printk(KERN_INFO "eps: Current multiplier = %d\n", current_multiplier);
 
         /* Print limits */
         max_voltage = hi & 0xff;
-        printk(KERN_INFO "eps: Highest voltage = %dmV\n", max_voltage * 16 + 700);
+        printk(KERN_INFO "eps: Highest voltage = %dmV\n",
+                        max_voltage * 16 + 700);
         max_multiplier = (hi >> 8) & 0xff;
         printk(KERN_INFO "eps: Highest multiplier = %d\n", max_multiplier);
         min_voltage = (hi >> 16) & 0xff;
-        printk(KERN_INFO "eps: Lowest voltage = %dmV\n", min_voltage * 16 + 700);
+        printk(KERN_INFO "eps: Lowest voltage = %dmV\n",
+                        min_voltage * 16 + 700);
         min_multiplier = (hi >> 24) & 0xff;
         printk(KERN_INFO "eps: Lowest multiplier = %d\n", min_multiplier);
 
@@ -318,7 +321,7 @@ static int eps_cpu_exit(struct cpufreq_policy *policy)
         return 0;
 }
 
-static struct freq_attr* eps_attr[] = {
+static struct freq_attr *eps_attr[] = {
         &cpufreq_freq_attr_scaling_available_freqs,
         NULL,
 };
@@ -356,7 +359,7 @@ static void __exit eps_exit(void)
         cpufreq_unregister_driver(&eps_driver);
 }
 
-MODULE_AUTHOR("Rafa³ Bilski <rafalbilski@interia.pl>");
+MODULE_AUTHOR("Rafal Bilski <rafalbilski@interia.pl>");
 MODULE_DESCRIPTION("Enhanced PowerSaver driver for VIA C7 CPU's.");
 MODULE_LICENSE("GPL");
 
diff --git a/arch/x86/kernel/cpu/cpufreq/elanfreq.c b/arch/x86/kernel/cpu/cpufreq/elanfreq.c
index fe613c93b366..006b278b0d5d 100644
--- a/arch/x86/kernel/cpu/cpufreq/elanfreq.c
+++ b/arch/x86/kernel/cpu/cpufreq/elanfreq.c
@@ -184,7 +184,8 @@ static int elanfreq_target(struct cpufreq_policy *policy,
 {
         unsigned int newstate = 0;
 
-        if (cpufreq_frequency_table_target(policy, &elanfreq_table[0], target_freq, relation, &newstate))
+        if (cpufreq_frequency_table_target(policy, &elanfreq_table[0],
+                                target_freq, relation, &newstate))
                 return -EINVAL;
 
         elanfreq_set_cpu_state(newstate);
@@ -301,7 +302,8 @@ static void __exit elanfreq_exit(void)
 module_param(max_freq, int, 0444);
 
 MODULE_LICENSE("GPL");
-MODULE_AUTHOR("Robert Schwebel <r.schwebel@pengutronix.de>, Sven Geggus <sven@geggus.net>");
+MODULE_AUTHOR("Robert Schwebel <r.schwebel@pengutronix.de>, "
+                "Sven Geggus <sven@geggus.net>");
 MODULE_DESCRIPTION("cpufreq driver for AMD's Elan CPUs");
 
 module_init(elanfreq_init);
diff --git a/arch/x86/kernel/cpu/cpufreq/gx-suspmod.c b/arch/x86/kernel/cpu/cpufreq/gx-suspmod.c
index 9d9eae82e60f..ac27ec2264d5 100644
--- a/arch/x86/kernel/cpu/cpufreq/gx-suspmod.c
+++ b/arch/x86/kernel/cpu/cpufreq/gx-suspmod.c
@@ -79,8 +79,9 @@
 #include <linux/smp.h>
 #include <linux/cpufreq.h>
 #include <linux/pci.h>
+#include <linux/errno.h>
+
 #include <asm/processor-cyrix.h>
-#include <asm/errno.h>
 
 /* PCI config registers, all at F0 */
 #define PCI_PMER1       0x80    /* power management enable register 1 */
@@ -122,8 +123,8 @@ static struct gxfreq_params *gx_params;
 static int stock_freq;
 
 /* PCI bus clock - defaults to 30.000 if cpu_khz is not available */
-static int pci_busclk = 0;
-module_param (pci_busclk, int, 0444);
+static int pci_busclk;
+module_param(pci_busclk, int, 0444);
 
 /* maximum duration for which the cpu may be suspended
  * (32us * MAX_DURATION). If no parameter is given, this defaults
@@ -132,7 +133,7 @@ module_param (pci_busclk, int, 0444);
  * is suspended -- processing power is just 0.39% of what it used to be,
  * though. 781.25 kHz(!) for a 200 MHz processor -- wow. */
 static int max_duration = 255;
-module_param (max_duration, int, 0444);
+module_param(max_duration, int, 0444);
 
 /* For the default policy, we want at least some processing power
  * - let's say 5%. (min = maxfreq / POLICY_MIN_DIV)
@@ -140,7 +141,8 @@ module_param (max_duration, int, 0444);
 #define POLICY_MIN_DIV 20
 
 
-#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, "gx-suspmod", msg)
+#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, \
+                "gx-suspmod", msg)
 
 /**
  * we can detect a core multipiler from dir0_lsb
@@ -166,12 +168,20 @@ static int gx_freq_mult[16] = {
  *      Low Level chipset interface                             *
  ****************************************************************/
 static struct pci_device_id gx_chipset_tbl[] __initdata = {
-        { PCI_VENDOR_ID_CYRIX, PCI_DEVICE_ID_CYRIX_5530_LEGACY, PCI_ANY_ID, PCI_ANY_ID },
-        { PCI_VENDOR_ID_CYRIX, PCI_DEVICE_ID_CYRIX_5520, PCI_ANY_ID, PCI_ANY_ID },
-        { PCI_VENDOR_ID_CYRIX, PCI_DEVICE_ID_CYRIX_5510, PCI_ANY_ID, PCI_ANY_ID },
+        { PCI_VENDOR_ID_CYRIX, PCI_DEVICE_ID_CYRIX_5530_LEGACY,
+                PCI_ANY_ID, PCI_ANY_ID },
+        { PCI_VENDOR_ID_CYRIX, PCI_DEVICE_ID_CYRIX_5520,
+                PCI_ANY_ID, PCI_ANY_ID },
+        { PCI_VENDOR_ID_CYRIX, PCI_DEVICE_ID_CYRIX_5510,
+                PCI_ANY_ID, PCI_ANY_ID },
         { 0, },
 };
 
+static void gx_write_byte(int reg, int value)
+{
+        pci_write_config_byte(gx_params->cs55x0, reg, value);
+}
+
 /**
  * gx_detect_chipset:
  *
@@ -200,7 +210,8 @@ static __init struct pci_dev *gx_detect_chipset(void)
 /**
  * gx_get_cpuspeed:
  *
- * Finds out at which efficient frequency the Cyrix MediaGX/NatSemi Geode CPU runs.
+ * Finds out at which efficient frequency the Cyrix MediaGX/NatSemi
+ * Geode CPU runs.
  */
 static unsigned int gx_get_cpuspeed(unsigned int cpu)
 {
@@ -217,17 +228,18 @@ static unsigned int gx_get_cpuspeed(unsigned int cpu)
  *
  **/
 
-static unsigned int gx_validate_speed(unsigned int khz, u8 *on_duration, u8 *off_duration)
+static unsigned int gx_validate_speed(unsigned int khz, u8 *on_duration,
+                u8 *off_duration)
 {
         unsigned int i;
         u8 tmp_on, tmp_off;
         int old_tmp_freq = stock_freq;
         int tmp_freq;
 
-        *off_duration=1;
-        *on_duration=0;
+        *off_duration = 1;
+        *on_duration = 0;
 
-        for (i=max_duration; i>0; i--) {
+        for (i = max_duration; i > 0; i--) {
                 tmp_off = ((khz * i) / stock_freq) & 0xff;
                 tmp_on = i - tmp_off;
                 tmp_freq = (stock_freq * tmp_off) / i;
@@ -259,26 +271,34 @@ static void gx_set_cpuspeed(unsigned int khz)
         freqs.cpu = 0;
         freqs.old = gx_get_cpuspeed(0);
 
-        new_khz = gx_validate_speed(khz, &gx_params->on_duration, &gx_params->off_duration);
+        new_khz = gx_validate_speed(khz, &gx_params->on_duration,
+                        &gx_params->off_duration);
 
         freqs.new = new_khz;
 
         cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
         local_irq_save(flags);
 
-        if (new_khz != stock_freq) {  /* if new khz == 100% of CPU speed, it is special case */
+
+
+        if (new_khz != stock_freq) {
+                /* if new khz == 100% of CPU speed, it is special case */
                 switch (gx_params->cs55x0->device) {
                 case PCI_DEVICE_ID_CYRIX_5530_LEGACY:
                         pmer1 = gx_params->pci_pmer1 | IRQ_SPDUP | VID_SPDUP;
                         /* FIXME: need to test other values -- Zwane,Miura */
-                        pci_write_config_byte(gx_params->cs55x0, PCI_IRQTC, 4); /* typical 2 to 4ms */
-                        pci_write_config_byte(gx_params->cs55x0, PCI_VIDTC, 100);/* typical 50 to 100ms */
-                        pci_write_config_byte(gx_params->cs55x0, PCI_PMER1, pmer1);
-
-                        if (gx_params->cs55x0->revision < 0x10) {   /* CS5530(rev 1.2, 1.3) */
-                                suscfg = gx_params->pci_suscfg | SUSMOD;
-                        } else {                           /* CS5530A,B.. */
-                                suscfg = gx_params->pci_suscfg | SUSMOD | PWRSVE;
+                        /* typical 2 to 4ms */
+                        gx_write_byte(PCI_IRQTC, 4);
+                        /* typical 50 to 100ms */
+                        gx_write_byte(PCI_VIDTC, 100);
+                        gx_write_byte(PCI_PMER1, pmer1);
+
+                        if (gx_params->cs55x0->revision < 0x10) {
+                                /* CS5530(rev 1.2, 1.3) */
+                                suscfg = gx_params->pci_suscfg|SUSMOD;
+                        } else {
+                                /* CS5530A,B.. */
+                                suscfg = gx_params->pci_suscfg|SUSMOD|PWRSVE;
                         }
                         break;
                 case PCI_DEVICE_ID_CYRIX_5520:
@@ -294,13 +314,13 @@ static void gx_set_cpuspeed(unsigned int khz)
                 suscfg = gx_params->pci_suscfg & ~(SUSMOD);
                 gx_params->off_duration = 0;
                 gx_params->on_duration = 0;
-                dprintk("suspend modulation disabled: cpu runs 100 percent speed.\n");
+                dprintk("suspend modulation disabled: cpu runs 100%% speed.\n");
         }
 
-        pci_write_config_byte(gx_params->cs55x0, PCI_MODOFF, gx_params->off_duration);
-        pci_write_config_byte(gx_params->cs55x0, PCI_MODON, gx_params->on_duration);
+        gx_write_byte(PCI_MODOFF, gx_params->off_duration);
+        gx_write_byte(PCI_MODON, gx_params->on_duration);
 
-        pci_write_config_byte(gx_params->cs55x0, PCI_SUSCFG, suscfg);
+        gx_write_byte(PCI_SUSCFG, suscfg);
         pci_read_config_byte(gx_params->cs55x0, PCI_SUSCFG, &suscfg);
 
         local_irq_restore(flags);
@@ -334,7 +354,8 @@ static int cpufreq_gx_verify(struct cpufreq_policy *policy)
                 return -EINVAL;
 
         policy->cpu = 0;
-        cpufreq_verify_within_limits(policy, (stock_freq / max_duration), stock_freq);
+        cpufreq_verify_within_limits(policy, (stock_freq / max_duration),
+                        stock_freq);
 
         /* it needs to be assured that at least one supported frequency is
          * within policy->min and policy->max. If it is not, policy->max
@@ -354,7 +375,8 @@ static int cpufreq_gx_verify(struct cpufreq_policy *policy)
         policy->max = tmp_freq;
         if (policy->max < policy->min)
                 policy->max = policy->min;
-        cpufreq_verify_within_limits(policy, (stock_freq / max_duration), stock_freq);
+        cpufreq_verify_within_limits(policy, (stock_freq / max_duration),
+                        stock_freq);
 
         return 0;
 }
@@ -398,18 +420,18 @@ static int cpufreq_gx_cpu_init(struct cpufreq_policy *policy)
                 return -ENODEV;
 
         /* determine maximum frequency */
-        if (pci_busclk) {
+        if (pci_busclk)
                 maxfreq = pci_busclk * gx_freq_mult[getCx86(CX86_DIR1) & 0x0f];
-        } else if (cpu_khz) {
+        else if (cpu_khz)
                 maxfreq = cpu_khz;
-        } else {
+        else
                 maxfreq = 30000 * gx_freq_mult[getCx86(CX86_DIR1) & 0x0f];
-        }
+
         stock_freq = maxfreq;
         curfreq = gx_get_cpuspeed(0);
 
         dprintk("cpu max frequency is %d.\n", maxfreq);
-        dprintk("cpu current frequency is %dkHz.\n",curfreq);
+        dprintk("cpu current frequency is %dkHz.\n", curfreq);
 
         /* setup basic struct for cpufreq API */
         policy->cpu = 0;
@@ -447,7 +469,8 @@ static int __init cpufreq_gx_init(void)
         struct pci_dev *gx_pci;
 
         /* Test if we have the right hardware */
-        if ((gx_pci = gx_detect_chipset()) == NULL)
+        gx_pci = gx_detect_chipset();
+        if (gx_pci == NULL)
                 return -ENODEV;
 
         /* check whether module parameters are sane */
@@ -468,9 +491,11 @@ static int __init cpufreq_gx_init(void)
         pci_read_config_byte(params->cs55x0, PCI_PMER1, &(params->pci_pmer1));
         pci_read_config_byte(params->cs55x0, PCI_PMER2, &(params->pci_pmer2));
         pci_read_config_byte(params->cs55x0, PCI_MODON, &(params->on_duration));
-        pci_read_config_byte(params->cs55x0, PCI_MODOFF, &(params->off_duration));
+        pci_read_config_byte(params->cs55x0, PCI_MODOFF,
+                        &(params->off_duration));
 
-        if ((ret = cpufreq_register_driver(&gx_suspmod_driver))) {
+        ret = cpufreq_register_driver(&gx_suspmod_driver);
+        if (ret) {
                 kfree(params);
                 return ret;                   /* register error! */
         }
@@ -485,9 +510,9 @@ static void __exit cpufreq_gx_exit(void)
         kfree(gx_params);
 }
 
-MODULE_AUTHOR ("Hiroshi Miura <miura@da-cha.org>");
-MODULE_DESCRIPTION ("Cpufreq driver for Cyrix MediaGX and NatSemi Geode");
-MODULE_LICENSE ("GPL");
+MODULE_AUTHOR("Hiroshi Miura <miura@da-cha.org>");
+MODULE_DESCRIPTION("Cpufreq driver for Cyrix MediaGX and NatSemi Geode");
+MODULE_LICENSE("GPL");
 
 module_init(cpufreq_gx_init);
 module_exit(cpufreq_gx_exit);
diff --git a/arch/x86/kernel/cpu/cpufreq/longhaul.c b/arch/x86/kernel/cpu/cpufreq/longhaul.c
index a4cff5d6e380..f1c51aea064d 100644
--- a/arch/x86/kernel/cpu/cpufreq/longhaul.c
+++ b/arch/x86/kernel/cpu/cpufreq/longhaul.c
@@ -30,12 +30,12 @@
 #include <linux/slab.h>
 #include <linux/string.h>
 #include <linux/delay.h>
+#include <linux/timex.h>
+#include <linux/io.h>
+#include <linux/acpi.h>
+#include <linux/kernel.h>
 
 #include <asm/msr.h>
-#include <asm/timex.h>
-#include <asm/io.h>
-#include <asm/acpi.h>
-#include <linux/acpi.h>
 #include <acpi/processor.h>
 
 #include "longhaul.h"
@@ -58,7 +58,7 @@
 #define USE_NORTHBRIDGE         (1 << 2)
 
 static int cpu_model;
-static unsigned int numscales=16;
+static unsigned int numscales = 16;
 static unsigned int fsb;
 
 static const struct mV_pos *vrm_mV_table;
@@ -67,8 +67,8 @@ static const unsigned char *mV_vrm_table;
 static unsigned int highest_speed, lowest_speed; /* kHz */
 static unsigned int minmult, maxmult;
 static int can_scale_voltage;
-static struct acpi_processor *pr = NULL;
-static struct acpi_processor_cx *cx = NULL;
+static struct acpi_processor *pr;
+static struct acpi_processor_cx *cx;
 static u32 acpi_regs_addr;
 static u8 longhaul_flags;
 static unsigned int longhaul_index;
@@ -78,12 +78,13 @@ static int scale_voltage;
 static int disable_acpi_c3;
 static int revid_errata;
 
-#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, "longhaul", msg)
+#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, \
+                "longhaul", msg)
 
 
 /* Clock ratios multiplied by 10 */
-static int clock_ratio[32];
-static int eblcr_table[32];
+static int mults[32];
+static int eblcr[32];
 static int longhaul_version;
 static struct cpufreq_frequency_table *longhaul_table;
 
@@ -93,7 +94,7 @@ static char speedbuffer[8];
 static char *print_speed(int speed)
 {
         if (speed < 1000) {
-                snprintf(speedbuffer, sizeof(speedbuffer),"%dMHz", speed);
+                snprintf(speedbuffer, sizeof(speedbuffer), "%dMHz", speed);
                 return speedbuffer;
         }
 
@@ -122,27 +123,28 @@ static unsigned int calc_speed(int mult)
 
 static int longhaul_get_cpu_mult(void)
 {
-        unsigned long invalue=0,lo, hi;
+        unsigned long invalue = 0, lo, hi;
 
-        rdmsr (MSR_IA32_EBL_CR_POWERON, lo, hi);
-        invalue = (lo & (1<<22|1<<23|1<<24|1<<25)) >>22;
-        if (longhaul_version==TYPE_LONGHAUL_V2 || longhaul_version==TYPE_POWERSAVER) {
+        rdmsr(MSR_IA32_EBL_CR_POWERON, lo, hi);
+        invalue = (lo & (1<<22|1<<23|1<<24|1<<25))>>22;
+        if (longhaul_version == TYPE_LONGHAUL_V2 ||
+            longhaul_version == TYPE_POWERSAVER) {
                 if (lo & (1<<27))
-                        invalue+=16;
+                        invalue += 16;
         }
-        return eblcr_table[invalue];
+        return eblcr[invalue];
 }
 
 /* For processor with BCR2 MSR */
 
-static void do_longhaul1(unsigned int clock_ratio_index)
+static void do_longhaul1(unsigned int mults_index)
 {
         union msr_bcr2 bcr2;
 
         rdmsrl(MSR_VIA_BCR2, bcr2.val);
         /* Enable software clock multiplier */
         bcr2.bits.ESOFTBF = 1;
-        bcr2.bits.CLOCKMUL = clock_ratio_index & 0xff;
+        bcr2.bits.CLOCKMUL = mults_index & 0xff;
 
         /* Sync to timer tick */
         safe_halt();
@@ -161,7 +163,7 @@ static void do_longhaul1(unsigned int clock_ratio_index)
 
 /* For processor with Longhaul MSR */
 
-static void do_powersaver(int cx_address, unsigned int clock_ratio_index,
+static void do_powersaver(int cx_address, unsigned int mults_index,
                           unsigned int dir)
 {
         union msr_longhaul longhaul;
@@ -173,11 +175,11 @@ static void do_powersaver(int cx_address, unsigned int clock_ratio_index,
                 longhaul.bits.RevisionKey = longhaul.bits.RevisionID;
         else
                 longhaul.bits.RevisionKey = 0;
-        longhaul.bits.SoftBusRatio = clock_ratio_index & 0xf;
-        longhaul.bits.SoftBusRatio4 = (clock_ratio_index & 0x10) >> 4;
+        longhaul.bits.SoftBusRatio = mults_index & 0xf;
+        longhaul.bits.SoftBusRatio4 = (mults_index & 0x10) >> 4;
         /* Setup new voltage */
         if (can_scale_voltage)
-                longhaul.bits.SoftVID = (clock_ratio_index >> 8) & 0x1f;
+                longhaul.bits.SoftVID = (mults_index >> 8) & 0x1f;
         /* Sync to timer tick */
         safe_halt();
         /* Raise voltage if necessary */
@@ -240,14 +242,14 @@ static void do_powersaver(int cx_address, unsigned int clock_ratio_index,
 
 /**
  * longhaul_set_cpu_frequency()
- * @clock_ratio_index : bitpattern of the new multiplier.
+ * @mults_index : bitpattern of the new multiplier.
  *
  * Sets a new clock ratio.
  */
 
 static void longhaul_setstate(unsigned int table_index)
 {
-        unsigned int clock_ratio_index;
+        unsigned int mults_index;
         int speed, mult;
         struct cpufreq_freqs freqs;
         unsigned long flags;
@@ -256,9 +258,9 @@ static void longhaul_setstate(unsigned int table_index)
         u32 bm_timeout = 1000;
         unsigned int dir = 0;
 
-        clock_ratio_index = longhaul_table[table_index].index;
+        mults_index = longhaul_table[table_index].index;
         /* Safety precautions */
-        mult = clock_ratio[clock_ratio_index & 0x1f];
+        mult = mults[mults_index & 0x1f];
         if (mult == -1)
                 return;
         speed = calc_speed(mult);
@@ -274,7 +276,7 @@ static void longhaul_setstate(unsigned int table_index)
 
         cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
 
-        dprintk ("Setting to FSB:%dMHz Mult:%d.%dx (%s)\n",
+        dprintk("Setting to FSB:%dMHz Mult:%d.%dx (%s)\n",
                         fsb, mult/10, mult%10, print_speed(speed/1000));
 retry_loop:
         preempt_disable();
@@ -282,8 +284,8 @@ retry_loop:
 
         pic2_mask = inb(0xA1);
         pic1_mask = inb(0x21);  /* works on C3. save mask. */
-        outb(0xFF,0xA1);        /* Overkill */
-        outb(0xFE,0x21);        /* TMR0 only */
+        outb(0xFF, 0xA1);       /* Overkill */
+        outb(0xFE, 0x21);       /* TMR0 only */
 
         /* Wait while PCI bus is busy. */
         if (acpi_regs_addr && (longhaul_flags & USE_NORTHBRIDGE
@@ -312,7 +314,7 @@ retry_loop:
          * Software controlled multipliers only.
          */
         case TYPE_LONGHAUL_V1:
-                do_longhaul1(clock_ratio_index);
+                do_longhaul1(mults_index);
                 break;
 
         /*
@@ -327,9 +329,9 @@ retry_loop:
                 if (longhaul_flags & USE_ACPI_C3) {
                         /* Don't allow wakeup */
                         acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD, 0);
-                        do_powersaver(cx->address, clock_ratio_index, dir);
+                        do_powersaver(cx->address, mults_index, dir);
                 } else {
-                        do_powersaver(0, clock_ratio_index, dir);
+                        do_powersaver(0, mults_index, dir);
                 }
                 break;
         }
@@ -341,8 +343,8 @@ retry_loop:
                 /* Enable bus master arbitration */
                 acpi_set_register(ACPI_BITREG_ARB_DISABLE, 0);
         }
-        outb(pic2_mask,0xA1);   /* restore mask */
-        outb(pic1_mask,0x21);
+        outb(pic2_mask, 0xA1);  /* restore mask */
+        outb(pic1_mask, 0x21);
 
         local_irq_restore(flags);
         preempt_enable();
@@ -392,7 +394,8 @@ retry_loop:
         cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
 
         if (!bm_timeout)
-                printk(KERN_INFO PFX "Warning: Timeout while waiting for idle PCI bus.\n");
+                printk(KERN_INFO PFX "Warning: Timeout while waiting for "
+                                "idle PCI bus.\n");
 }
 
 /*
@@ -458,31 +461,32 @@ static int __init longhaul_get_ranges(void)
                 break;
         }
 
-        dprintk ("MinMult:%d.%dx MaxMult:%d.%dx\n",
+        dprintk("MinMult:%d.%dx MaxMult:%d.%dx\n",
                  minmult/10, minmult%10, maxmult/10, maxmult%10);
 
         highest_speed = calc_speed(maxmult);
         lowest_speed = calc_speed(minmult);
-        dprintk ("FSB:%dMHz  Lowest speed: %s   Highest speed:%s\n", fsb,
+        dprintk("FSB:%dMHz  Lowest speed: %s   Highest speed:%s\n", fsb,
                  print_speed(lowest_speed/1000),
                  print_speed(highest_speed/1000));
 
         if (lowest_speed == highest_speed) {
-                printk (KERN_INFO PFX "highestspeed == lowest, aborting.\n");
+                printk(KERN_INFO PFX "highestspeed == lowest, aborting.\n");
                 return -EINVAL;
         }
         if (lowest_speed > highest_speed) {
-                printk (KERN_INFO PFX "nonsense! lowest (%d > %d) !\n",
+                printk(KERN_INFO PFX "nonsense! lowest (%d > %d) !\n",
                         lowest_speed, highest_speed);
                 return -EINVAL;
         }
 
-        longhaul_table = kmalloc((numscales + 1) * sizeof(struct cpufreq_frequency_table), GFP_KERNEL);
-        if(!longhaul_table)
+        longhaul_table = kmalloc((numscales + 1) * sizeof(*longhaul_table),
+                        GFP_KERNEL);
+        if (!longhaul_table)
                 return -ENOMEM;
 
         for (j = 0; j < numscales; j++) {
-                ratio = clock_ratio[j];
+                ratio = mults[j];
                 if (ratio == -1)
                         continue;
                 if (ratio > maxmult || ratio < minmult)
@@ -507,13 +511,10 @@ static int __init longhaul_get_ranges(void)
                         }
                 }
                 if (min_i != j) {
-                        unsigned int temp;
-                        temp = longhaul_table[j].frequency;
-                        longhaul_table[j].frequency = longhaul_table[min_i].frequency;
-                        longhaul_table[min_i].frequency = temp;
-                        temp = longhaul_table[j].index;
-                        longhaul_table[j].index = longhaul_table[min_i].index;
-                        longhaul_table[min_i].index = temp;
+                        swap(longhaul_table[j].frequency,
+                             longhaul_table[min_i].frequency);
+                        swap(longhaul_table[j].index,
+                             longhaul_table[min_i].index);
                 }
         }
 
@@ -521,7 +522,7 @@ static int __init longhaul_get_ranges(void)
 
         /* Find index we are running on */
         for (j = 0; j < k; j++) {
-                if (clock_ratio[longhaul_table[j].index & 0x1f] == mult) {
+                if (mults[longhaul_table[j].index & 0x1f] == mult) {
                         longhaul_index = j;
                         break;
                 }
@@ -559,20 +560,22 @@ static void __init longhaul_setup_voltagescaling(void)
         maxvid = vrm_mV_table[longhaul.bits.MaximumVID];
 
         if (minvid.mV == 0 || maxvid.mV == 0 || minvid.mV > maxvid.mV) {
-                printk (KERN_INFO PFX "Bogus values Min:%d.%03d Max:%d.%03d. "
+                printk(KERN_INFO PFX "Bogus values Min:%d.%03d Max:%d.%03d. "
                                         "Voltage scaling disabled.\n",
-                                        minvid.mV/1000, minvid.mV%1000, maxvid.mV/1000, maxvid.mV%1000);
+                                        minvid.mV/1000, minvid.mV%1000,
+                                        maxvid.mV/1000, maxvid.mV%1000);
                 return;
         }
 
         if (minvid.mV == maxvid.mV) {
-                printk (KERN_INFO PFX "Claims to support voltage scaling but min & max are "
-                                "both %d.%03d. Voltage scaling disabled\n",
+                printk(KERN_INFO PFX "Claims to support voltage scaling but "
+                                "min & max are both %d.%03d. "
+                                "Voltage scaling disabled\n",
                                 maxvid.mV/1000, maxvid.mV%1000);
                 return;
         }
 
-        /* How many voltage steps */
+        /* How many voltage steps*/
         numvscales = maxvid.pos - minvid.pos + 1;
         printk(KERN_INFO PFX
                 "Max VID=%d.%03d  "
@@ -586,7 +589,7 @@ static void __init longhaul_setup_voltagescaling(void)
         j = longhaul.bits.MinMHzBR;
         if (longhaul.bits.MinMHzBR4)
                 j += 16;
-        min_vid_speed = eblcr_table[j];
+        min_vid_speed = eblcr[j];
         if (min_vid_speed == -1)
                 return;
         switch (longhaul.bits.MinMHzFSB) {
@@ -617,7 +620,8 @@ static void __init longhaul_setup_voltagescaling(void)
                         pos = minvid.pos;
                 longhaul_table[j].index |= mV_vrm_table[pos] << 8;
                 vid = vrm_mV_table[mV_vrm_table[pos]];
-                printk(KERN_INFO PFX "f: %d kHz, index: %d, vid: %d mV\n", speed, j, vid.mV);
+                printk(KERN_INFO PFX "f: %d kHz, index: %d, vid: %d mV\n",
+                                speed, j, vid.mV);
                 j++;
         }
 
@@ -640,7 +644,8 @@ static int longhaul_target(struct cpufreq_policy *policy,
         unsigned int dir = 0;
         u8 vid, current_vid;
 
-        if (cpufreq_frequency_table_target(policy, longhaul_table, target_freq, relation, &table_index))
+        if (cpufreq_frequency_table_target(policy, longhaul_table, target_freq,
+                                relation, &table_index))
                 return -EINVAL;
 
         /* Don't set same frequency again */
@@ -656,7 +661,8 @@ static int longhaul_target(struct cpufreq_policy *policy,
                  * this in hardware, C3 is old and we need to do this
                  * in software. */
                 i = longhaul_index;
-                current_vid = (longhaul_table[longhaul_index].index >> 8) & 0x1f;
+                current_vid = (longhaul_table[longhaul_index].index >> 8);
+                current_vid &= 0x1f;
                 if (table_index > longhaul_index)
                         dir = 1;
                 while (i != table_index) {
@@ -691,9 +697,9 @@ static acpi_status longhaul_walk_callback(acpi_handle obj_handle,
 {
         struct acpi_device *d;
 
-        if ( acpi_bus_get_device(obj_handle, &d) ) {
+        if (acpi_bus_get_device(obj_handle, &d))
                 return 0;
-        }
+
         *return_value = acpi_driver_data(d);
         return 1;
 }
@@ -750,7 +756,7 @@ static int longhaul_setup_southbridge(void)
         /* Find VT8235 southbridge */
         dev = pci_get_device(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8235, NULL);
         if (dev == NULL)
-        /* Find VT8237 southbridge */
+                /* Find VT8237 southbridge */
                 dev = pci_get_device(PCI_VENDOR_ID_VIA,
                                      PCI_DEVICE_ID_VIA_8237, NULL);
         if (dev != NULL) {
@@ -769,7 +775,8 @@ static int longhaul_setup_southbridge(void)
                 if (pci_cmd & 1 << 7) {
                         pci_read_config_dword(dev, 0x88, &acpi_regs_addr);
                         acpi_regs_addr &= 0xff00;
-                        printk(KERN_INFO PFX "ACPI I/O at 0x%x\n", acpi_regs_addr);
+                        printk(KERN_INFO PFX "ACPI I/O at 0x%x\n",
+                                        acpi_regs_addr);
                 }
 
                 pci_dev_put(dev);
@@ -781,7 +788,7 @@ static int longhaul_setup_southbridge(void)
 static int __init longhaul_cpu_init(struct cpufreq_policy *policy)
 {
         struct cpuinfo_x86 *c = &cpu_data(0);
-        char *cpuname=NULL;
+        char *cpuname = NULL;
         int ret;
         u32 lo, hi;
 
@@ -791,8 +798,8 @@ static int __init longhaul_cpu_init(struct cpufreq_policy *policy)
                 cpu_model = CPU_SAMUEL;
                 cpuname = "C3 'Samuel' [C5A]";
                 longhaul_version = TYPE_LONGHAUL_V1;
-                memcpy (clock_ratio, samuel1_clock_ratio, sizeof(samuel1_clock_ratio));
-                memcpy (eblcr_table, samuel1_eblcr, sizeof(samuel1_eblcr));
+                memcpy(mults, samuel1_mults, sizeof(samuel1_mults));
+                memcpy(eblcr, samuel1_eblcr, sizeof(samuel1_eblcr));
                 break;
 
         case 7:
@@ -803,10 +810,8 @@ static int __init longhaul_cpu_init(struct cpufreq_policy *policy)
                         cpuname = "C3 'Samuel 2' [C5B]";
                         /* Note, this is not a typo, early Samuel2's had
                          * Samuel1 ratios. */
-                        memcpy(clock_ratio, samuel1_clock_ratio,
-                                sizeof(samuel1_clock_ratio));
-                        memcpy(eblcr_table, samuel2_eblcr,
-                                sizeof(samuel2_eblcr));
+                        memcpy(mults, samuel1_mults, sizeof(samuel1_mults));
+                        memcpy(eblcr, samuel2_eblcr, sizeof(samuel2_eblcr));
                         break;
                 case 1 ... 15:
                         longhaul_version = TYPE_LONGHAUL_V1;
@@ -817,10 +822,8 @@ static int __init longhaul_cpu_init(struct cpufreq_policy *policy)
                                 cpu_model = CPU_EZRA;
                                 cpuname = "C3 'Ezra' [C5C]";
                         }
-                        memcpy(clock_ratio, ezra_clock_ratio,
-                                sizeof(ezra_clock_ratio));
-                        memcpy(eblcr_table, ezra_eblcr,
-                                sizeof(ezra_eblcr));
+                        memcpy(mults, ezra_mults, sizeof(ezra_mults));
+                        memcpy(eblcr, ezra_eblcr, sizeof(ezra_eblcr));
                         break;
                 }
                 break;
@@ -829,18 +832,16 @@ static int __init longhaul_cpu_init(struct cpufreq_policy *policy)
                 cpu_model = CPU_EZRA_T;
                 cpuname = "C3 'Ezra-T' [C5M]";
                 longhaul_version = TYPE_POWERSAVER;
-                numscales=32;
-                memcpy (clock_ratio, ezrat_clock_ratio, sizeof(ezrat_clock_ratio));
-                memcpy (eblcr_table, ezrat_eblcr, sizeof(ezrat_eblcr));
+                numscales = 32;
+                memcpy(mults, ezrat_mults, sizeof(ezrat_mults));
+                memcpy(eblcr, ezrat_eblcr, sizeof(ezrat_eblcr));
                 break;
 
         case 9:
                 longhaul_version = TYPE_POWERSAVER;
                 numscales = 32;
-                memcpy(clock_ratio,
-                       nehemiah_clock_ratio,
-                       sizeof(nehemiah_clock_ratio));
-                memcpy(eblcr_table, nehemiah_eblcr, sizeof(nehemiah_eblcr));
+                memcpy(mults, nehemiah_mults, sizeof(nehemiah_mults));
+                memcpy(eblcr, nehemiah_eblcr, sizeof(nehemiah_eblcr));
                 switch (c->x86_mask) {
                 case 0 ... 1:
                         cpu_model = CPU_NEHEMIAH;
@@ -869,14 +870,14 @@ static int __init longhaul_cpu_init(struct cpufreq_policy *policy)
                         longhaul_version = TYPE_LONGHAUL_V1;
         }
 
-        printk (KERN_INFO PFX "VIA %s CPU detected.  ", cpuname);
+        printk(KERN_INFO PFX "VIA %s CPU detected.  ", cpuname);
         switch (longhaul_version) {
         case TYPE_LONGHAUL_V1:
         case TYPE_LONGHAUL_V2:
-                printk ("Longhaul v%d supported.\n", longhaul_version);
+                printk(KERN_CONT "Longhaul v%d supported.\n", longhaul_version);
                 break;
         case TYPE_POWERSAVER:
-                printk ("Powersaver supported.\n");
+                printk(KERN_CONT "Powersaver supported.\n");
                 break;
         };
 
@@ -940,7 +941,7 @@ static int __devexit longhaul_cpu_exit(struct cpufreq_policy *policy)
         return 0;
 }
 
-static struct freq_attr* longhaul_attr[] = {
+static struct freq_attr *longhaul_attr[] = {
         &cpufreq_freq_attr_scaling_available_freqs,
         NULL,
 };
@@ -966,13 +967,15 @@ static int __init longhaul_init(void)
 
 #ifdef CONFIG_SMP
         if (num_online_cpus() > 1) {
-                printk(KERN_ERR PFX "More than 1 CPU detected, longhaul disabled.\n");
+                printk(KERN_ERR PFX "More than 1 CPU detected, "
+                                "longhaul disabled.\n");
                 return -ENODEV;
         }
 #endif
 #ifdef CONFIG_X86_IO_APIC
         if (cpu_has_apic) {
-                printk(KERN_ERR PFX "APIC detected. Longhaul is currently broken in this configuration.\n");
+                printk(KERN_ERR PFX "APIC detected. Longhaul is currently "
+                                "broken in this configuration.\n");
                 return -ENODEV;
         }
 #endif
@@ -993,8 +996,8 @@ static void __exit longhaul_exit(void)
 {
         int i;
 
-        for (i=0; i < numscales; i++) {
-                if (clock_ratio[i] == maxmult) {
+        for (i = 0; i < numscales; i++) {
+                if (mults[i] == maxmult) {
                         longhaul_setstate(i);
                         break;
                 }
@@ -1007,11 +1010,11 @@ static void __exit longhaul_exit(void)
 /* Even if BIOS is exporting ACPI C3 state, and it is used
  * with success when CPU is idle, this state doesn't
  * trigger frequency transition in some cases. */
-module_param (disable_acpi_c3, int, 0644);
+module_param(disable_acpi_c3, int, 0644);
 MODULE_PARM_DESC(disable_acpi_c3, "Don't use ACPI C3 support");
 /* Change CPU voltage with frequency. Very usefull to save
  * power, but most VIA C3 processors aren't supporting it. */
-module_param (scale_voltage, int, 0644);
+module_param(scale_voltage, int, 0644);
 MODULE_PARM_DESC(scale_voltage, "Scale voltage of processor");
 /* Force revision key to 0 for processors which doesn't
  * support voltage scaling, but are introducing itself as
@@ -1019,9 +1022,9 @@ MODULE_PARM_DESC(scale_voltage, "Scale voltage of processor");
 module_param(revid_errata, int, 0644);
 MODULE_PARM_DESC(revid_errata, "Ignore CPU Revision ID");
 
-MODULE_AUTHOR ("Dave Jones <davej@redhat.com>");
-MODULE_DESCRIPTION ("Longhaul driver for VIA Cyrix processors.");
-MODULE_LICENSE ("GPL");
+MODULE_AUTHOR("Dave Jones <davej@redhat.com>");
+MODULE_DESCRIPTION("Longhaul driver for VIA Cyrix processors.");
+MODULE_LICENSE("GPL");
 
 late_initcall(longhaul_init);
 module_exit(longhaul_exit);
diff --git a/arch/x86/kernel/cpu/cpufreq/longhaul.h b/arch/x86/kernel/cpu/cpufreq/longhaul.h
index 4fcc320997df..e2360a469f79 100644
--- a/arch/x86/kernel/cpu/cpufreq/longhaul.h
+++ b/arch/x86/kernel/cpu/cpufreq/longhaul.h
@@ -49,14 +49,14 @@ union msr_longhaul {
 
 /*
  * Clock ratio tables. Div/Mod by 10 to get ratio.
- * The eblcr ones specify the ratio read from the CPU.
- * The clock_ratio ones specify what to write to the CPU.
+ * The eblcr values specify the ratio read from the CPU.
+ * The mults values specify what to write to the CPU.
  */
 
 /*
  * VIA C3 Samuel 1  & Samuel 2 (stepping 0)
  */
-static const int __initdata samuel1_clock_ratio[16] = {
+static const int __initdata samuel1_mults[16] = {
         -1, /* 0000 -> RESERVED */
         30, /* 0001 ->  3.0x */
         40, /* 0010 ->  4.0x */
@@ -119,7 +119,7 @@ static const int __initdata samuel2_eblcr[16] = {
 /*
  * VIA C3 Ezra
  */
-static const int __initdata ezra_clock_ratio[16] = {
+static const int __initdata ezra_mults[16] = {
         100, /* 0000 -> 10.0x */
         30,  /* 0001 ->  3.0x */
         40,  /* 0010 ->  4.0x */
@@ -160,7 +160,7 @@ static const int __initdata ezra_eblcr[16] = {
 /*
  * VIA C3 (Ezra-T) [C5M].
  */
-static const int __initdata ezrat_clock_ratio[32] = {
+static const int __initdata ezrat_mults[32] = {
         100, /* 0000 -> 10.0x */
         30,  /* 0001 ->  3.0x */
         40,  /* 0010 ->  4.0x */
@@ -235,7 +235,7 @@ static const int __initdata ezrat_eblcr[32] = {
 /*
  * VIA C3 Nehemiah */
 
-static const int __initdata  nehemiah_clock_ratio[32] = {
+static const int __initdata  nehemiah_mults[32] = {
         100, /* 0000 -> 10.0x */
         -1, /* 0001 -> 16.0x */
         40,  /* 0010 ->  4.0x */
diff --git a/arch/x86/kernel/cpu/cpufreq/longrun.c b/arch/x86/kernel/cpu/cpufreq/longrun.c
index 777a7ff075de..da5f70fcb766 100644
--- a/arch/x86/kernel/cpu/cpufreq/longrun.c
+++ b/arch/x86/kernel/cpu/cpufreq/longrun.c
@@ -11,12 +11,13 @@
 #include <linux/init.h>
 #include <linux/slab.h>
 #include <linux/cpufreq.h>
+#include <linux/timex.h>
 
 #include <asm/msr.h>
 #include <asm/processor.h>
-#include <asm/timex.h>
 
-#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, "longrun", msg)
+#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, \
+                "longrun", msg)
 
 static struct cpufreq_driver    longrun_driver;
 
@@ -51,7 +52,7 @@ static void __init longrun_get_policy(struct cpufreq_policy *policy)
         msr_lo &= 0x0000007F;
         msr_hi &= 0x0000007F;
 
-        if ( longrun_high_freq <= longrun_low_freq ) {
+        if (longrun_high_freq <= longrun_low_freq) {
                 /* Assume degenerate Longrun table */
                 policy->min = policy->max = longrun_high_freq;
         } else {
@@ -79,7 +80,7 @@ static int longrun_set_policy(struct cpufreq_policy *policy)
         if (!policy)
                 return -EINVAL;
 
-        if ( longrun_high_freq <= longrun_low_freq ) {
+        if (longrun_high_freq <= longrun_low_freq) {
                 /* Assume degenerate Longrun table */
                 pctg_lo = pctg_hi = 100;
         } else {
@@ -152,7 +153,7 @@ static unsigned int longrun_get(unsigned int cpu)
         cpuid(0x80860007, &eax, &ebx, &ecx, &edx);
         dprintk("cpuid eax is %u\n", eax);
 
-        return (eax * 1000);
+        return eax * 1000;
 }
 
 /**
@@ -196,7 +197,8 @@ static unsigned int __init longrun_determine_freqs(unsigned int *low_freq,
                 rdmsr(MSR_TMTA_LRTI_VOLT_MHZ, msr_lo, msr_hi);
                 *high_freq = msr_lo * 1000; /* to kHz */
 
-                dprintk("longrun table interface told %u - %u kHz\n", *low_freq, *high_freq);
+                dprintk("longrun table interface told %u - %u kHz\n",
+                                *low_freq, *high_freq);
 
                 if (*low_freq > *high_freq)
                         *low_freq = *high_freq;
@@ -219,7 +221,7 @@ static unsigned int __init longrun_determine_freqs(unsigned int *low_freq,
         cpuid(0x80860007, &eax, &ebx, &ecx, &edx);
         /* try decreasing in 10% steps, some processors react only
          * on some barrier values */
-        for (try_hi = 80; try_hi > 0 && ecx > 90; try_hi -=10) {
+        for (try_hi = 80; try_hi > 0 && ecx > 90; try_hi -= 10) {
                 /* set to 0 to try_hi perf_pctg */
                 msr_lo &= 0xFFFFFF80;
                 msr_hi &= 0xFFFFFF80;
@@ -236,7 +238,7 @@ static unsigned int __init longrun_determine_freqs(unsigned int *low_freq,
 
         /* performance_pctg = (current_freq - low_freq)/(high_freq - low_freq)
          * eqals
-         * low_freq * ( 1 - perf_pctg) = (cur_freq - high_freq * perf_pctg)
+         * low_freq * (1 - perf_pctg) = (cur_freq - high_freq * perf_pctg)
          *
          * high_freq * perf_pctg is stored tempoarily into "ebx".
          */
@@ -317,9 +319,10 @@ static void __exit longrun_exit(void)
 }
 
 
-MODULE_AUTHOR ("Dominik Brodowski <linux@brodo.de>");
-MODULE_DESCRIPTION ("LongRun driver for Transmeta Crusoe and Efficeon processors.");
-MODULE_LICENSE ("GPL");
+MODULE_AUTHOR("Dominik Brodowski <linux@brodo.de>");
+MODULE_DESCRIPTION("LongRun driver for Transmeta Crusoe and "
+                "Efficeon processors.");
+MODULE_LICENSE("GPL");
 
 module_init(longrun_init);
 module_exit(longrun_exit);
diff --git a/arch/x86/kernel/cpu/cpufreq/p4-clockmod.c b/arch/x86/kernel/cpu/cpufreq/p4-clockmod.c
index 3178c3acd97e..41ed94915f97 100644
--- a/arch/x86/kernel/cpu/cpufreq/p4-clockmod.c
+++ b/arch/x86/kernel/cpu/cpufreq/p4-clockmod.c
@@ -27,15 +27,17 @@
 #include <linux/cpufreq.h>
 #include <linux/slab.h>
 #include <linux/cpumask.h>
+#include <linux/timex.h>
 
 #include <asm/processor.h>
 #include <asm/msr.h>
-#include <asm/timex.h>
+#include <asm/timer.h>
 
 #include "speedstep-lib.h"
 
 #define PFX     "p4-clockmod: "
-#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, "p4-clockmod", msg)
+#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, \
+                "p4-clockmod", msg)
 
 /*
  * Duty Cycle (3bits), note DC_DISABLE is not specified in
@@ -58,7 +60,8 @@ static int cpufreq_p4_setdc(unsigned int cpu, unsigned int newstate)
 {
         u32 l, h;
 
-        if (!cpu_online(cpu) || (newstate > DC_DISABLE) || (newstate == DC_RESV))
+        if (!cpu_online(cpu) ||
+            (newstate > DC_DISABLE) || (newstate == DC_RESV))
                 return -EINVAL;
 
         rdmsr_on_cpu(cpu, MSR_IA32_THERM_STATUS, &l, &h);
@@ -66,7 +69,8 @@ static int cpufreq_p4_setdc(unsigned int cpu, unsigned int newstate)
         if (l & 0x01)
                 dprintk("CPU#%d currently thermal throttled\n", cpu);
 
-        if (has_N44_O17_errata[cpu] && (newstate == DC_25PT || newstate == DC_DFLT))
+        if (has_N44_O17_errata[cpu] &&
+            (newstate == DC_25PT || newstate == DC_DFLT))
                 newstate = DC_38PT;
 
         rdmsr_on_cpu(cpu, MSR_IA32_THERM_CONTROL, &l, &h);
@@ -112,7 +116,8 @@ static int cpufreq_p4_target(struct cpufreq_policy *policy,
         struct cpufreq_freqs freqs;
         int i;
 
-        if (cpufreq_frequency_table_target(policy, &p4clockmod_table[0], target_freq, relation, &newstate))
+        if (cpufreq_frequency_table_target(policy, &p4clockmod_table[0],
+                                target_freq, relation, &newstate))
                 return -EINVAL;
 
         freqs.old = cpufreq_p4_get(policy->cpu);
@@ -127,7 +132,8 @@ static int cpufreq_p4_target(struct cpufreq_policy *policy,
                 cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
         }
 
-        /* run on each logical CPU, see section 13.15.3 of IA32 Intel Architecture Software
+        /* run on each logical CPU,
+         * see section 13.15.3 of IA32 Intel Architecture Software
          * Developer's Manual, Volume 3
          */
         for_each_cpu(i, policy->cpus)
@@ -153,28 +159,30 @@ static unsigned int cpufreq_p4_get_frequency(struct cpuinfo_x86 *c)
 {
         if (c->x86 == 0x06) {
                 if (cpu_has(c, X86_FEATURE_EST))
-                        printk(KERN_WARNING PFX "Warning: EST-capable CPU detected. "
-                               "The acpi-cpufreq module offers voltage scaling"
-                               " in addition of frequency scaling. You should use "
-                               "that instead of p4-clockmod, if possible.\n");
+                        printk(KERN_WARNING PFX "Warning: EST-capable CPU "
+                               "detected. The acpi-cpufreq module offers "
+                               "voltage scaling in addition of frequency "
+                               "scaling. You should use that instead of "
+                               "p4-clockmod, if possible.\n");
                 switch (c->x86_model) {
                 case 0x0E: /* Core */
                 case 0x0F: /* Core Duo */
                 case 0x16: /* Celeron Core */
                         p4clockmod_driver.flags |= CPUFREQ_CONST_LOOPS;
-                        return speedstep_get_processor_frequency(SPEEDSTEP_PROCESSOR_PCORE);
+                        return speedstep_get_frequency(SPEEDSTEP_CPU_PCORE);
                 case 0x0D: /* Pentium M (Dothan) */
                         p4clockmod_driver.flags |= CPUFREQ_CONST_LOOPS;
                         /* fall through */
                 case 0x09: /* Pentium M (Banias) */
-                        return speedstep_get_processor_frequency(SPEEDSTEP_PROCESSOR_PM);
+                        return speedstep_get_frequency(SPEEDSTEP_CPU_PM);
                 }
         }
 
         if (c->x86 != 0xF) {
                 if (!cpu_has(c, X86_FEATURE_EST))
-                        printk(KERN_WARNING PFX "Unknown p4-clockmod-capable CPU. "
-                                "Please send an e-mail to <cpufreq@vger.kernel.org>\n");
+                        printk(KERN_WARNING PFX "Unknown CPU. "
+                                "Please send an e-mail to "
+                                "<cpufreq@vger.kernel.org>\n");
                 return 0;
         }
 
@@ -182,16 +190,16 @@ static unsigned int cpufreq_p4_get_frequency(struct cpuinfo_x86 *c)
          * throttling is active or not. */
         p4clockmod_driver.flags |= CPUFREQ_CONST_LOOPS;
 
-        if (speedstep_detect_processor() == SPEEDSTEP_PROCESSOR_P4M) {
+        if (speedstep_detect_processor() == SPEEDSTEP_CPU_P4M) {
                 printk(KERN_WARNING PFX "Warning: Pentium 4-M detected. "
                        "The speedstep-ich or acpi cpufreq modules offer "
                        "voltage scaling in addition of frequency scaling. "
                        "You should use either one instead of p4-clockmod, "
                        "if possible.\n");
-                return speedstep_get_processor_frequency(SPEEDSTEP_PROCESSOR_P4M);
+                return speedstep_get_frequency(SPEEDSTEP_CPU_P4M);
         }
 
-        return speedstep_get_processor_frequency(SPEEDSTEP_PROCESSOR_P4D);
+        return speedstep_get_frequency(SPEEDSTEP_CPU_P4D);
 }
 
 
@@ -217,14 +225,20 @@ static int cpufreq_p4_cpu_init(struct cpufreq_policy *policy)
                 dprintk("has errata -- disabling low frequencies\n");
         }
 
+        if (speedstep_detect_processor() == SPEEDSTEP_CPU_P4D &&
+            c->x86_model < 2) {
+                /* switch to maximum frequency and measure result */
+                cpufreq_p4_setdc(policy->cpu, DC_DISABLE);
+                recalibrate_cpu_khz();
+        }
         /* get max frequency */
         stock_freq = cpufreq_p4_get_frequency(c);
         if (!stock_freq)
                 return -EINVAL;
 
         /* table init */
-        for (i=1; (p4clockmod_table[i].frequency != CPUFREQ_TABLE_END); i++) {
-                if ((i<2) && (has_N44_O17_errata[policy->cpu]))
+        for (i = 1; (p4clockmod_table[i].frequency != CPUFREQ_TABLE_END); i++) {
+                if ((i < 2) && (has_N44_O17_errata[policy->cpu]))
                         p4clockmod_table[i].frequency = CPUFREQ_ENTRY_INVALID;
                 else
                         p4clockmod_table[i].frequency = (stock_freq * i)/8;
@@ -232,7 +246,10 @@ static int cpufreq_p4_cpu_init(struct cpufreq_policy *policy)
         cpufreq_frequency_table_get_attr(p4clockmod_table, policy->cpu);
 
         /* cpuinfo and default policy values */
-        policy->cpuinfo.transition_latency = 1000000; /* assumed */
+
+        /* the transition latency is set to be 1 higher than the maximum
+         * transition latency of the ondemand governor */
+        policy->cpuinfo.transition_latency = 10000001;
         policy->cur = stock_freq;
 
         return cpufreq_frequency_table_cpuinfo(policy, &p4clockmod_table[0]);
@@ -258,12 +275,12 @@ static unsigned int cpufreq_p4_get(unsigned int cpu)
                 l = DC_DISABLE;
 
         if (l != DC_DISABLE)
-                return (stock_freq * l / 8);
+                return stock_freq * l / 8;
 
         return stock_freq;
 }
 
-static struct freq_attr* p4clockmod_attr[] = {
+static struct freq_attr *p4clockmod_attr[] = {
         &cpufreq_freq_attr_scaling_available_freqs,
         NULL,
 };
@@ -298,9 +315,10 @@ static int __init cpufreq_p4_init(void)
 
         ret = cpufreq_register_driver(&p4clockmod_driver);
         if (!ret)
-                printk(KERN_INFO PFX "P4/Xeon(TM) CPU On-Demand Clock Modulation available\n");
+                printk(KERN_INFO PFX "P4/Xeon(TM) CPU On-Demand Clock "
+                                "Modulation available\n");
 
-        return (ret);
+        return ret;
 }
 
 
@@ -310,9 +328,9 @@ static void __exit cpufreq_p4_exit(void)
 }
 
 
-MODULE_AUTHOR ("Zwane Mwaikambo <zwane@commfireservices.com>");
-MODULE_DESCRIPTION ("cpufreq driver for Pentium(TM) 4/Xeon(TM)");
-MODULE_LICENSE ("GPL");
+MODULE_AUTHOR("Zwane Mwaikambo <zwane@commfireservices.com>");
+MODULE_DESCRIPTION("cpufreq driver for Pentium(TM) 4/Xeon(TM)");
+MODULE_LICENSE("GPL");
 
 late_initcall(cpufreq_p4_init);
 module_exit(cpufreq_p4_exit);
diff --git a/arch/x86/kernel/cpu/cpufreq/powernow-k6.c b/arch/x86/kernel/cpu/cpufreq/powernow-k6.c
index c1ac5790c63e..f10dea409f40 100644
--- a/arch/x86/kernel/cpu/cpufreq/powernow-k6.c
+++ b/arch/x86/kernel/cpu/cpufreq/powernow-k6.c
@@ -1,6 +1,7 @@
 /*
  *  This file was based upon code in Powertweak Linux (http://powertweak.sf.net)
- *  (C) 2000-2003  Dave Jones, Arjan van de Ven, Janne Pänkälä, Dominik Brodowski.
+ *  (C) 2000-2003  Dave Jones, Arjan van de Ven, Janne Pänkälä,
+ *                 Dominik Brodowski.
  *
  *  Licensed under the terms of the GNU GPL License version 2.
  *
@@ -13,14 +14,15 @@
 #include <linux/cpufreq.h>
 #include <linux/ioport.h>
 #include <linux/slab.h>
-
-#include <asm/msr.h>
 #include <linux/timex.h>
 #include <linux/io.h>
 
+#include <asm/msr.h>
+
 #define POWERNOW_IOPORT 0xfff0          /* it doesn't matter where, as long
                                            as it is unused */
 
+#define PFX "powernow-k6: "
 static unsigned int                     busfreq;   /* FSB, in 10 kHz */
 static unsigned int                     max_multiplier;
 
@@ -47,8 +49,8 @@ static struct cpufreq_frequency_table clock_ratio[] = {
  */
 static int powernow_k6_get_cpu_multiplier(void)
 {
-        u64             invalue = 0;
-        u32             msrval;
+        u64 invalue = 0;
+        u32 msrval;
 
         msrval = POWERNOW_IOPORT + 0x1;
         wrmsr(MSR_K6_EPMR, msrval, 0); /* enable the PowerNow port */
@@ -68,12 +70,12 @@ static int powernow_k6_get_cpu_multiplier(void)
  */
 static void powernow_k6_set_state(unsigned int best_i)
 {
-        unsigned long           outvalue = 0, invalue = 0;
-        unsigned long           msrval;
-        struct cpufreq_freqs    freqs;
+        unsigned long outvalue = 0, invalue = 0;
+        unsigned long msrval;
+        struct cpufreq_freqs freqs;
 
         if (clock_ratio[best_i].index > max_multiplier) {
-                printk(KERN_ERR "cpufreq: invalid target frequency\n");
+                printk(KERN_ERR PFX "invalid target frequency\n");
                 return;
         }
 
@@ -119,7 +121,8 @@ static int powernow_k6_verify(struct cpufreq_policy *policy)
  * powernow_k6_setpolicy - sets a new CPUFreq policy
  * @policy: new policy
  * @target_freq: the target frequency
- * @relation: how that frequency relates to achieved frequency (CPUFREQ_RELATION_L or CPUFREQ_RELATION_H)
+ * @relation: how that frequency relates to achieved frequency
+ *  (CPUFREQ_RELATION_L or CPUFREQ_RELATION_H)
  *
  * sets a new CPUFreq policy
  */
@@ -127,9 +130,10 @@ static int powernow_k6_target(struct cpufreq_policy *policy,
                                unsigned int target_freq,
                                unsigned int relation)
 {
-        unsigned int    newstate = 0;
+        unsigned int newstate = 0;
 
-        if (cpufreq_frequency_table_target(policy, &clock_ratio[0], target_freq, relation, &newstate))
+        if (cpufreq_frequency_table_target(policy, &clock_ratio[0],
+                                target_freq, relation, &newstate))
                 return -EINVAL;
 
         powernow_k6_set_state(newstate);
@@ -140,7 +144,7 @@ static int powernow_k6_target(struct cpufreq_policy *policy,
 
 static int powernow_k6_cpu_init(struct cpufreq_policy *policy)
 {
-        unsigned int i;
+        unsigned int i, f;
         int result;
 
         if (policy->cpu != 0)
@@ -152,10 +156,11 @@ static int powernow_k6_cpu_init(struct cpufreq_policy *policy)
 
         /* table init */
         for (i = 0; (clock_ratio[i].frequency != CPUFREQ_TABLE_END); i++) {
-                if (clock_ratio[i].index > max_multiplier)
+                f = clock_ratio[i].index;
+                if (f > max_multiplier)
                         clock_ratio[i].frequency = CPUFREQ_ENTRY_INVALID;
                 else
-                        clock_ratio[i].frequency = busfreq * clock_ratio[i].index;
+                        clock_ratio[i].frequency = busfreq * f;
         }
 
         /* cpuinfo and default policy values */
@@ -185,7 +190,9 @@ static int powernow_k6_cpu_exit(struct cpufreq_policy *policy)
 
 static unsigned int powernow_k6_get(unsigned int cpu)
 {
-        return busfreq * powernow_k6_get_cpu_multiplier();
+        unsigned int ret;
+        ret = (busfreq * powernow_k6_get_cpu_multiplier());
+        return ret;
 }
 
 static struct freq_attr *powernow_k6_attr[] = {
@@ -221,7 +228,7 @@ static int __init powernow_k6_init(void)
                 return -ENODEV;
 
         if (!request_region(POWERNOW_IOPORT, 16, "PowerNow!")) {
-                printk("cpufreq: PowerNow IOPORT region already used.\n");
+                printk(KERN_INFO PFX "PowerNow IOPORT region already used.\n");
                 return -EIO;
         }
 
@@ -246,7 +253,8 @@ static void __exit powernow_k6_exit(void)
 }
 
 
-MODULE_AUTHOR("Arjan van de Ven, Dave Jones <davej@redhat.com>, Dominik Brodowski <linux@brodo.de>");
+MODULE_AUTHOR("Arjan van de Ven, Dave Jones <davej@redhat.com>, "
+                "Dominik Brodowski <linux@brodo.de>");
 MODULE_DESCRIPTION("PowerNow! driver for AMD K6-2+ / K6-3+ processors.");
 MODULE_LICENSE("GPL");
 
diff --git a/arch/x86/kernel/cpu/cpufreq/powernow-k7.c b/arch/x86/kernel/cpu/cpufreq/powernow-k7.c
index 1b446d79a8fd..3c28ccd49742 100644
--- a/arch/x86/kernel/cpu/cpufreq/powernow-k7.c
+++ b/arch/x86/kernel/cpu/cpufreq/powernow-k7.c
@@ -6,10 +6,12 @@
  *  Licensed under the terms of the GNU GPL License version 2.
  *  Based upon datasheets & sample CPUs kindly provided by AMD.
  *
- * Errata 5: Processor may fail to execute a FID/VID change in presence of interrupt.
- * - We cli/sti on stepping A0 CPUs around the FID/VID transition.
- * Errata 15: Processors with half frequency multipliers may hang upon wakeup from disconnect.
- * - We disable half multipliers if ACPI is used on A0 stepping CPUs.
+ * Errata 5:
+ *  CPU may fail to execute a FID/VID change in presence of interrupt.
+ *  - We cli/sti on stepping A0 CPUs around the FID/VID transition.
+ * Errata 15:
+ *  CPU with half frequency multipliers may hang upon wakeup from disconnect.
+ *  - We disable half multipliers if ACPI is used on A0 stepping CPUs.
  */
 
 #include <linux/kernel.h>
@@ -20,11 +22,11 @@
 #include <linux/slab.h>
 #include <linux/string.h>
 #include <linux/dmi.h>
+#include <linux/timex.h>
+#include <linux/io.h>
 
+#include <asm/timer.h>          /* Needed for recalibrate_cpu_khz() */
 #include <asm/msr.h>
-#include <asm/timer.h>
-#include <asm/timex.h>
-#include <asm/io.h>
 #include <asm/system.h>
 
 #ifdef CONFIG_X86_POWERNOW_K7_ACPI
@@ -58,9 +60,9 @@ struct pst_s {
 union powernow_acpi_control_t {
         struct {
                 unsigned long fid:5,
-                vid:5,
-                sgtc:20,
-                res1:2;
+                        vid:5,
+                        sgtc:20,
+                        res1:2;
         } bits;
         unsigned long val;
 };
@@ -94,14 +96,15 @@ static struct cpufreq_frequency_table *powernow_table;
 
 static unsigned int can_scale_bus;
 static unsigned int can_scale_vid;
-static unsigned int minimum_speed=-1;
+static unsigned int minimum_speed = -1;
 static unsigned int maximum_speed;
 static unsigned int number_scales;
 static unsigned int fsb;
 static unsigned int latency;
 static char have_a0;
 
-#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, "powernow-k7", msg)
+#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, \
+                "powernow-k7", msg)
 
 static int check_fsb(unsigned int fsbspeed)
 {
@@ -109,7 +112,7 @@ static int check_fsb(unsigned int fsbspeed)
         unsigned int f = fsb / 1000;
 
         delta = (fsbspeed > f) ? fsbspeed - f : f - fsbspeed;
-        return (delta < 5);
+        return delta < 5;
 }
 
 static int check_powernow(void)
@@ -117,24 +120,26 @@ static int check_powernow(void)
         struct cpuinfo_x86 *c = &cpu_data(0);
         unsigned int maxei, eax, ebx, ecx, edx;
 
-        if ((c->x86_vendor != X86_VENDOR_AMD) || (c->x86 !=6)) {
+        if ((c->x86_vendor != X86_VENDOR_AMD) || (c->x86 != 6)) {
 #ifdef MODULE
-                printk (KERN_INFO PFX "This module only works with AMD K7 CPUs\n");
+                printk(KERN_INFO PFX "This module only works with "
+                                "AMD K7 CPUs\n");
 #endif
                 return 0;
         }
 
         /* Get maximum capabilities */
-        maxei = cpuid_eax (0x80000000);
+        maxei = cpuid_eax(0x80000000);
         if (maxei < 0x80000007) {       /* Any powernow info ? */
 #ifdef MODULE
-                printk (KERN_INFO PFX "No powernow capabilities detected\n");
+                printk(KERN_INFO PFX "No powernow capabilities detected\n");
 #endif
                 return 0;
         }
 
         if ((c->x86_model == 6) && (c->x86_mask == 0)) {
-                printk (KERN_INFO PFX "K7 660[A0] core detected, enabling errata workarounds\n");
+                printk(KERN_INFO PFX "K7 660[A0] core detected, "
+                                "enabling errata workarounds\n");
                 have_a0 = 1;
         }
 
@@ -144,37 +149,42 @@ static int check_powernow(void)
         if (!(edx & (1 << 1 | 1 << 2)))
                 return 0;
 
-        printk (KERN_INFO PFX "PowerNOW! Technology present. Can scale: ");
+        printk(KERN_INFO PFX "PowerNOW! Technology present. Can scale: ");
 
         if (edx & 1 << 1) {
-                printk ("frequency");
-                can_scale_bus=1;
+                printk("frequency");
+                can_scale_bus = 1;
         }
 
         if ((edx & (1 << 1 | 1 << 2)) == 0x6)
-                printk (" and ");
+                printk(" and ");
 
         if (edx & 1 << 2) {
-                printk ("voltage");
-                can_scale_vid=1;
+                printk("voltage");
+                can_scale_vid = 1;
         }
 
-        printk (".\n");
+        printk(".\n");
         return 1;
 }
 
+static void invalidate_entry(unsigned int entry)
+{
+        powernow_table[entry].frequency = CPUFREQ_ENTRY_INVALID;
+}
 
-static int get_ranges (unsigned char *pst)
+static int get_ranges(unsigned char *pst)
 {
         unsigned int j;
         unsigned int speed;
         u8 fid, vid;
 
-        powernow_table = kzalloc((sizeof(struct cpufreq_frequency_table) * (number_scales + 1)), GFP_KERNEL);
+        powernow_table = kzalloc((sizeof(struct cpufreq_frequency_table) *
+                                (number_scales + 1)), GFP_KERNEL);
         if (!powernow_table)
                 return -ENOMEM;
 
-        for (j=0 ; j < number_scales; j++) {
+        for (j = 0 ; j < number_scales; j++) {
                 fid = *pst++;
 
                 powernow_table[j].frequency = (fsb * fid_codes[fid]) / 10;
@@ -182,10 +192,10 @@ static int get_ranges (unsigned char *pst)
 
                 speed = powernow_table[j].frequency;
 
-                if ((fid_codes[fid] % 10)==5) {
+                if ((fid_codes[fid] % 10) == 5) {
 #ifdef CONFIG_X86_POWERNOW_K7_ACPI
                         if (have_a0 == 1)
-                                powernow_table[j].frequency = CPUFREQ_ENTRY_INVALID;
+                                invalidate_entry(j);
 #endif
                 }
 
@@ -197,7 +207,7 @@ static int get_ranges (unsigned char *pst)
                 vid = *pst++;
                 powernow_table[j].index |= (vid << 8); /* upper 8 bits */
 
-                dprintk ("   FID: 0x%x (%d.%dx [%dMHz])  "
+                dprintk("   FID: 0x%x (%d.%dx [%dMHz])  "
                          "VID: 0x%x (%d.%03dV)\n", fid, fid_codes[fid] / 10,
                          fid_codes[fid] % 10, speed/1000, vid,
                          mobile_vid_table[vid]/1000,
@@ -214,13 +224,13 @@ static void change_FID(int fid)
 {
         union msr_fidvidctl fidvidctl;
 
-        rdmsrl (MSR_K7_FID_VID_CTL, fidvidctl.val);
+        rdmsrl(MSR_K7_FID_VID_CTL, fidvidctl.val);
         if (fidvidctl.bits.FID != fid) {
                 fidvidctl.bits.SGTC = latency;
                 fidvidctl.bits.FID = fid;
                 fidvidctl.bits.VIDC = 0;
                 fidvidctl.bits.FIDC = 1;
-                wrmsrl (MSR_K7_FID_VID_CTL, fidvidctl.val);
+                wrmsrl(MSR_K7_FID_VID_CTL, fidvidctl.val);
         }
 }
 
@@ -229,18 +239,18 @@ static void change_VID(int vid)
 {
         union msr_fidvidctl fidvidctl;
 
-        rdmsrl (MSR_K7_FID_VID_CTL, fidvidctl.val);
+        rdmsrl(MSR_K7_FID_VID_CTL, fidvidctl.val);
         if (fidvidctl.bits.VID != vid) {
                 fidvidctl.bits.SGTC = latency;
                 fidvidctl.bits.VID = vid;
                 fidvidctl.bits.FIDC = 0;
                 fidvidctl.bits.VIDC = 1;
-                wrmsrl (MSR_K7_FID_VID_CTL, fidvidctl.val);
+                wrmsrl(MSR_K7_FID_VID_CTL, fidvidctl.val);
         }
 }
 
 
-static void change_speed (unsigned int index)
+static void change_speed(unsigned int index)
 {
         u8 fid, vid;
         struct cpufreq_freqs freqs;
@@ -257,7 +267,7 @@ static void change_speed (unsigned int index)
 
         freqs.cpu = 0;
 
-        rdmsrl (MSR_K7_FID_VID_STATUS, fidvidstatus.val);
+        rdmsrl(MSR_K7_FID_VID_STATUS, fidvidstatus.val);
         cfid = fidvidstatus.bits.CFID;
         freqs.old = fsb * fid_codes[cfid] / 10;
 
@@ -321,12 +331,14 @@ static int powernow_acpi_init(void)
                 goto err1;
         }
 
-        if (acpi_processor_perf->control_register.space_id != ACPI_ADR_SPACE_FIXED_HARDWARE) {
+        if (acpi_processor_perf->control_register.space_id !=
+                        ACPI_ADR_SPACE_FIXED_HARDWARE) {
                 retval = -ENODEV;
                 goto err2;
         }
 
-        if (acpi_processor_perf->status_register.space_id != ACPI_ADR_SPACE_FIXED_HARDWARE) {
+        if (acpi_processor_perf->status_register.space_id !=
+                        ACPI_ADR_SPACE_FIXED_HARDWARE) {
                 retval = -ENODEV;
                 goto err2;
         }
@@ -338,7 +350,8 @@ static int powernow_acpi_init(void)
                 goto err2;
         }
 
-        powernow_table = kzalloc((number_scales + 1) * (sizeof(struct cpufreq_frequency_table)), GFP_KERNEL);
+        powernow_table = kzalloc((sizeof(struct cpufreq_frequency_table) *
+                                (number_scales + 1)), GFP_KERNEL);
         if (!powernow_table) {
                 retval = -ENOMEM;
                 goto err2;
@@ -352,7 +365,7 @@ static int powernow_acpi_init(void)
                 unsigned int speed, speed_mhz;
 
                 pc.val = (unsigned long) state->control;
-                dprintk ("acpi:  P%d: %d MHz %d mW %d uS control %08x SGTC %d\n",
+                dprintk("acpi:  P%d: %d MHz %d mW %d uS control %08x SGTC %d\n",
                          i,
                          (u32) state->core_frequency,
                          (u32) state->power,
@@ -381,12 +394,12 @@ static int powernow_acpi_init(void)
                 if (speed % 1000 > 0)
                         speed_mhz++;
 
-                if ((fid_codes[fid] % 10)==5) {
+                if ((fid_codes[fid] % 10) == 5) {
                         if (have_a0 == 1)
-                                powernow_table[i].frequency = CPUFREQ_ENTRY_INVALID;
+                                invalidate_entry(i);
                 }
 
-                dprintk ("   FID: 0x%x (%d.%dx [%dMHz])  "
+                dprintk("   FID: 0x%x (%d.%dx [%dMHz])  "
                          "VID: 0x%x (%d.%03dV)\n", fid, fid_codes[fid] / 10,
                          fid_codes[fid] % 10, speed_mhz, vid,
                          mobile_vid_table[vid]/1000,
@@ -422,7 +435,8 @@ err1:
 err05:
         kfree(acpi_processor_perf);
 err0:
-        printk(KERN_WARNING PFX "ACPI perflib can not be used in this platform\n");
+        printk(KERN_WARNING PFX "ACPI perflib can not be used on "
+                        "this platform\n");
         acpi_processor_perf = NULL;
         return retval;
 }
@@ -435,7 +449,14 @@ static int powernow_acpi_init(void)
 }
 #endif
 
-static int powernow_decode_bios (int maxfid, int startvid)
+static void print_pst_entry(struct pst_s *pst, unsigned int j)
+{
+        dprintk("PST:%d (@%p)\n", j, pst);
+        dprintk(" cpuid: 0x%x  fsb: %d  maxFID: 0x%x  startvid: 0x%x\n",
+                pst->cpuid, pst->fsbspeed, pst->maxfid, pst->startvid);
+}
+
+static int powernow_decode_bios(int maxfid, int startvid)
 {
         struct psb_s *psb;
         struct pst_s *pst;
@@ -446,61 +467,67 @@ static int powernow_decode_bios (int maxfid, int startvid)
 
         etuple = cpuid_eax(0x80000001);
 
-        for (i=0xC0000; i < 0xffff0 ; i+=16) {
+        for (i = 0xC0000; i < 0xffff0 ; i += 16) {
 
                 p = phys_to_virt(i);
 
-                if (memcmp(p, "AMDK7PNOW!",  10) == 0){
-                        dprintk ("Found PSB header at %p\n", p);
+                if (memcmp(p, "AMDK7PNOW!",  10) == 0) {
+                        dprintk("Found PSB header at %p\n", p);
                         psb = (struct psb_s *) p;
-                        dprintk ("Table version: 0x%x\n", psb->tableversion);
+                        dprintk("Table version: 0x%x\n", psb->tableversion);
                         if (psb->tableversion != 0x12) {
-                                printk (KERN_INFO PFX "Sorry, only v1.2 tables supported right now\n");
+                                printk(KERN_INFO PFX "Sorry, only v1.2 tables"
+                                                " supported right now\n");
                                 return -ENODEV;
                         }
 
-                        dprintk ("Flags: 0x%x\n", psb->flags);
-                        if ((psb->flags & 1)==0) {
-                                dprintk ("Mobile voltage regulator\n");
-                        } else {
-                                dprintk ("Desktop voltage regulator\n");
-                        }
+                        dprintk("Flags: 0x%x\n", psb->flags);
+                        if ((psb->flags & 1) == 0)
+                                dprintk("Mobile voltage regulator\n");
+                        else
+                                dprintk("Desktop voltage regulator\n");
 
                         latency = psb->settlingtime;
                         if (latency < 100) {
-                                printk(KERN_INFO PFX "BIOS set settling time to %d microseconds. "
-                                                "Should be at least 100. Correcting.\n", latency);
+                                printk(KERN_INFO PFX "BIOS set settling time "
+                                                "to %d microseconds. "
+                                                "Should be at least 100. "
+                                                "Correcting.\n", latency);
                                 latency = 100;
                         }
-                        dprintk ("Settling Time: %d microseconds.\n", psb->settlingtime);
-                        dprintk ("Has %d PST tables. (Only dumping ones relevant to this CPU).\n", psb->numpst);
+                        dprintk("Settling Time: %d microseconds.\n",
+                                        psb->settlingtime);
+                        dprintk("Has %d PST tables. (Only dumping ones "
+                                        "relevant to this CPU).\n",
+                                        psb->numpst);
 
-                        p += sizeof (struct psb_s);
+                        p += sizeof(struct psb_s);
 
                         pst = (struct pst_s *) p;
 
-                        for (j=0; j<psb->numpst; j++) {
+                        for (j = 0; j < psb->numpst; j++) {
                                 pst = (struct pst_s *) p;
                                 number_scales = pst->numpstates;
 
-                                if ((etuple == pst->cpuid) && check_fsb(pst->fsbspeed) &&
-                                    (maxfid==pst->maxfid) && (startvid==pst->startvid))
-                                {
-                                        dprintk ("PST:%d (@%p)\n", j, pst);
-                                        dprintk (" cpuid: 0x%x  fsb: %d  maxFID: 0x%x  startvid: 0x%x\n",
-                                                 pst->cpuid, pst->fsbspeed, pst->maxfid, pst->startvid);
-
-                                        ret = get_ranges ((char *) pst + sizeof (struct pst_s));
+                                if ((etuple == pst->cpuid) &&
+                                    check_fsb(pst->fsbspeed) &&
+                                    (maxfid == pst->maxfid) &&
+                                    (startvid == pst->startvid)) {
+                                        print_pst_entry(pst, j);
+                                        p = (char *)pst + sizeof(struct pst_s);
+                                        ret = get_ranges(p);
                                         return ret;
                                 } else {
                                         unsigned int k;
-                                        p = (char *) pst + sizeof (struct pst_s);
-                                        for (k=0; k<number_scales; k++)
-                                                p+=2;
+                                        p = (char *)pst + sizeof(struct pst_s);
+                                        for (k = 0; k < number_scales; k++)
+                                                p += 2;
                                 }
                         }
-                        printk (KERN_INFO PFX "No PST tables match this cpuid (0x%x)\n", etuple);
-                        printk (KERN_INFO PFX "This is indicative of a broken BIOS.\n");
+                        printk(KERN_INFO PFX "No PST tables match this cpuid "
+                                        "(0x%x)\n", etuple);
+                        printk(KERN_INFO PFX "This is indicative of a broken "
+                                        "BIOS.\n");
 
                         return -EINVAL;
                 }
@@ -511,13 +538,14 @@ static int powernow_decode_bios (int maxfid, int startvid)
 }
 
 
-static int powernow_target (struct cpufreq_policy *policy,
+static int powernow_target(struct cpufreq_policy *policy,
                             unsigned int target_freq,
                             unsigned int relation)
 {
         unsigned int newstate;
 
-        if (cpufreq_frequency_table_target(policy, powernow_table, target_freq, relation, &newstate))
+        if (cpufreq_frequency_table_target(policy, powernow_table, target_freq,
+                                relation, &newstate))
                 return -EINVAL;
 
         change_speed(newstate);
@@ -526,7 +554,7 @@ static int powernow_target (struct cpufreq_policy *policy,
 }
 
 
-static int powernow_verify (struct cpufreq_policy *policy)
+static int powernow_verify(struct cpufreq_policy *policy)
 {
         return cpufreq_frequency_table_verify(policy, powernow_table);
 }
@@ -566,18 +594,23 @@ static unsigned int powernow_get(unsigned int cpu)
 
         if (cpu)
                 return 0;
-        rdmsrl (MSR_K7_FID_VID_STATUS, fidvidstatus.val);
+        rdmsrl(MSR_K7_FID_VID_STATUS, fidvidstatus.val);
         cfid = fidvidstatus.bits.CFID;
 
-        return (fsb * fid_codes[cfid] / 10);
+        return fsb * fid_codes[cfid] / 10;
 }
 
 
 static int __init acer_cpufreq_pst(const struct dmi_system_id *d)
 {
-        printk(KERN_WARNING "%s laptop with broken PST tables in BIOS detected.\n", d->ident);
-        printk(KERN_WARNING "You need to downgrade to 3A21 (09/09/2002), or try a newer BIOS than 3A71 (01/20/2003)\n");
-        printk(KERN_WARNING "cpufreq scaling has been disabled as a result of this.\n");
+        printk(KERN_WARNING PFX
+                "%s laptop with broken PST tables in BIOS detected.\n",
+                d->ident);
+        printk(KERN_WARNING PFX
+                "You need to downgrade to 3A21 (09/09/2002), or try a newer "
+                "BIOS than 3A71 (01/20/2003)\n");
+        printk(KERN_WARNING PFX
+                "cpufreq scaling has been disabled as a result of this.\n");
         return 0;
 }
 
@@ -598,7 +631,7 @@ static struct dmi_system_id __initdata powernow_dmi_table[] = {
         { }
 };
 
-static int __init powernow_cpu_init (struct cpufreq_policy *policy)
+static int __init powernow_cpu_init(struct cpufreq_policy *policy)
 {
         union msr_fidvidstatus fidvidstatus;
         int result;
@@ -606,7 +639,7 @@ static int __init powernow_cpu_init (struct cpufreq_policy *policy)
         if (policy->cpu != 0)
                 return -ENODEV;
 
-        rdmsrl (MSR_K7_FID_VID_STATUS, fidvidstatus.val);
+        rdmsrl(MSR_K7_FID_VID_STATUS, fidvidstatus.val);
 
         recalibrate_cpu_khz();
 
@@ -618,19 +651,21 @@ static int __init powernow_cpu_init (struct cpufreq_policy *policy)
         dprintk("FSB: %3dMHz\n", fsb/1000);
 
         if (dmi_check_system(powernow_dmi_table) || acpi_force) {
-                printk (KERN_INFO PFX "PSB/PST known to be broken.  Trying ACPI instead\n");
+                printk(KERN_INFO PFX "PSB/PST known to be broken.  "
+                                "Trying ACPI instead\n");
                 result = powernow_acpi_init();
         } else {
-                result = powernow_decode_bios(fidvidstatus.bits.MFID, fidvidstatus.bits.SVID);
+                result = powernow_decode_bios(fidvidstatus.bits.MFID,
+                                fidvidstatus.bits.SVID);
                 if (result) {
-                        printk (KERN_INFO PFX "Trying ACPI perflib\n");
+                        printk(KERN_INFO PFX "Trying ACPI perflib\n");
                         maximum_speed = 0;
                         minimum_speed = -1;
                         latency = 0;
                         result = powernow_acpi_init();
                         if (result) {
-                                printk (KERN_INFO PFX "ACPI and legacy methods failed\n");
-                                printk (KERN_INFO PFX "See http://www.codemonkey.org.uk/projects/cpufreq/powernow-k7.html\n");
+                                printk(KERN_INFO PFX
+                                        "ACPI and legacy methods failed\n");
                         }
                 } else {
                         /* SGTC use the bus clock as timer */
@@ -642,10 +677,11 @@ static int __init powernow_cpu_init (struct cpufreq_policy *policy)
         if (result)
                 return result;
 
-        printk (KERN_INFO PFX "Minimum speed %d MHz. Maximum speed %d MHz.\n",
+        printk(KERN_INFO PFX "Minimum speed %d MHz. Maximum speed %d MHz.\n",
                                 minimum_speed/1000, maximum_speed/1000);
 
-        policy->cpuinfo.transition_latency = cpufreq_scale(2000000UL, fsb, latency);
+        policy->cpuinfo.transition_latency =
+                cpufreq_scale(2000000UL, fsb, latency);
 
         policy->cur = powernow_get(0);
 
@@ -654,7 +690,8 @@ static int __init powernow_cpu_init (struct cpufreq_policy *policy)
         return cpufreq_frequency_table_cpuinfo(policy, powernow_table);
 }
 
-static int powernow_cpu_exit (struct cpufreq_policy *policy) {
+static int powernow_cpu_exit(struct cpufreq_policy *policy)
+{
         cpufreq_frequency_table_put_attr(policy->cpu);
 
 #ifdef CONFIG_X86_POWERNOW_K7_ACPI
@@ -669,7 +706,7 @@ static int powernow_cpu_exit (struct cpufreq_policy *policy) {
         return 0;
 }
 
-static struct freq_attr* powernow_table_attr[] = {
+static struct freq_attr *powernow_table_attr[] = {
         &cpufreq_freq_attr_scaling_available_freqs,
         NULL,
 };
@@ -685,15 +722,15 @@ static struct cpufreq_driver powernow_driver = {
         .attr   = powernow_table_attr,
 };
 
-static int __init powernow_init (void)
+static int __init powernow_init(void)
 {
-        if (check_powernow()==0)
+        if (check_powernow() == 0)
                 return -ENODEV;
         return cpufreq_register_driver(&powernow_driver);
 }
 
 
-static void __exit powernow_exit (void)
+static void __exit powernow_exit(void)
 {
         cpufreq_unregister_driver(&powernow_driver);
 }
@@ -701,9 +738,9 @@ static void __exit powernow_exit (void)
 module_param(acpi_force,  int, 0444);
 MODULE_PARM_DESC(acpi_force, "Force ACPI to be used.");
 
-MODULE_AUTHOR ("Dave Jones <davej@redhat.com>");
-MODULE_DESCRIPTION ("Powernow driver for AMD K7 processors.");
-MODULE_LICENSE ("GPL");
+MODULE_AUTHOR("Dave Jones <davej@redhat.com>");
+MODULE_DESCRIPTION("Powernow driver for AMD K7 processors.");
+MODULE_LICENSE("GPL");
 
 late_initcall(powernow_init);
 module_exit(powernow_exit);
diff --git a/arch/x86/kernel/cpu/cpufreq/powernow-k8.c b/arch/x86/kernel/cpu/cpufreq/powernow-k8.c
index 6428aa17b40e..a15ac94e0b9b 100644
--- a/arch/x86/kernel/cpu/cpufreq/powernow-k8.c
+++ b/arch/x86/kernel/cpu/cpufreq/powernow-k8.c
@@ -33,16 +33,14 @@
 #include <linux/string.h>
 #include <linux/cpumask.h>
 #include <linux/sched.h>        /* for current / set_cpus_allowed() */
+#include <linux/io.h>
+#include <linux/delay.h>
 
 #include <asm/msr.h>
-#include <asm/io.h>
-#include <asm/delay.h>
 
-#ifdef CONFIG_X86_POWERNOW_K8_ACPI
 #include <linux/acpi.h>
 #include <linux/mutex.h>
 #include <acpi/processor.h>
-#endif
 
 #define PFX "powernow-k8: "
 #define VERSION "version 2.20.00"
@@ -71,7 +69,8 @@ static u32 find_khz_freq_from_fid(u32 fid)
         return 1000 * find_freq_from_fid(fid);
 }
 
-static u32 find_khz_freq_from_pstate(struct cpufreq_frequency_table *data, u32 pstate)
+static u32 find_khz_freq_from_pstate(struct cpufreq_frequency_table *data,
+                u32 pstate)
 {
         return data[pstate].frequency;
 }
@@ -186,7 +185,9 @@ static int write_new_fid(struct powernow_k8_data *data, u32 fid)
                 return 1;
         }
 
-        lo = fid | (data->currvid << MSR_C_LO_VID_SHIFT) | MSR_C_LO_INIT_FID_VID;
+        lo = fid;
+        lo |= (data->currvid << MSR_C_LO_VID_SHIFT);
+        lo |= MSR_C_LO_INIT_FID_VID;
 
         dprintk("writing fid 0x%x, lo 0x%x, hi 0x%x\n",
                 fid, lo, data->plllock * PLL_LOCK_CONVERSION);
@@ -194,7 +195,9 @@ static int write_new_fid(struct powernow_k8_data *data, u32 fid)
         do {
                 wrmsr(MSR_FIDVID_CTL, lo, data->plllock * PLL_LOCK_CONVERSION);
                 if (i++ > 100) {
-                        printk(KERN_ERR PFX "Hardware error - pending bit very stuck - no further pstate changes possible\n");
+                        printk(KERN_ERR PFX
+                                "Hardware error - pending bit very stuck - "
+                                "no further pstate changes possible\n");
                         return 1;
                 }
         } while (query_current_values_with_pending_wait(data));
@@ -202,14 +205,16 @@ static int write_new_fid(struct powernow_k8_data *data, u32 fid)
         count_off_irt(data);
 
         if (savevid != data->currvid) {
-                printk(KERN_ERR PFX "vid change on fid trans, old 0x%x, new 0x%x\n",
-                       savevid, data->currvid);
+                printk(KERN_ERR PFX
+                        "vid change on fid trans, old 0x%x, new 0x%x\n",
+                        savevid, data->currvid);
                 return 1;
         }
 
         if (fid != data->currfid) {
-                printk(KERN_ERR PFX "fid trans failed, fid 0x%x, curr 0x%x\n", fid,
-                        data->currfid);
+                printk(KERN_ERR PFX
+                        "fid trans failed, fid 0x%x, curr 0x%x\n", fid,
+                        data->currfid);
                 return 1;
         }
 
@@ -228,7 +233,9 @@ static int write_new_vid(struct powernow_k8_data *data, u32 vid)
                 return 1;
         }
 
-        lo = data->currfid | (vid << MSR_C_LO_VID_SHIFT) | MSR_C_LO_INIT_FID_VID;
+        lo = data->currfid;
+        lo |= (vid << MSR_C_LO_VID_SHIFT);
+        lo |= MSR_C_LO_INIT_FID_VID;
 
         dprintk("writing vid 0x%x, lo 0x%x, hi 0x%x\n",
                 vid, lo, STOP_GRANT_5NS);
@@ -236,20 +243,24 @@ static int write_new_vid(struct powernow_k8_data *data, u32 vid)
         do {
                 wrmsr(MSR_FIDVID_CTL, lo, STOP_GRANT_5NS);
                 if (i++ > 100) {
-                        printk(KERN_ERR PFX "internal error - pending bit very stuck - no further pstate changes possible\n");
+                        printk(KERN_ERR PFX "internal error - pending bit "
+                                        "very stuck - no further pstate "
+                                        "changes possible\n");
                         return 1;
                 }
         } while (query_current_values_with_pending_wait(data));
 
         if (savefid != data->currfid) {
-                printk(KERN_ERR PFX "fid changed on vid trans, old 0x%x new 0x%x\n",
+                printk(KERN_ERR PFX "fid changed on vid trans, old "
+                        "0x%x new 0x%x\n",
                        savefid, data->currfid);
                 return 1;
         }
 
         if (vid != data->currvid) {
-                printk(KERN_ERR PFX "vid trans failed, vid 0x%x, curr 0x%x\n", vid,
-                                data->currvid);
+                printk(KERN_ERR PFX "vid trans failed, vid 0x%x, "
+                                "curr 0x%x\n",
+                                vid, data->currvid);
                 return 1;
         }
 
@@ -261,7 +272,8 @@ static int write_new_vid(struct powernow_k8_data *data, u32 vid)
  * Decreasing vid codes represent increasing voltages:
  * vid of 0 is 1.550V, vid of 0x1e is 0.800V, vid of VID_OFF is off.
  */
-static int decrease_vid_code_by_step(struct powernow_k8_data *data, u32 reqvid, u32 step)
+static int decrease_vid_code_by_step(struct powernow_k8_data *data,
+                u32 reqvid, u32 step)
 {
         if ((data->currvid - reqvid) > step)
                 reqvid = data->currvid - step;
@@ -283,7 +295,8 @@ static int transition_pstate(struct powernow_k8_data *data, u32 pstate)
 }
 
 /* Change Opteron/Athlon64 fid and vid, by the 3 phases. */
-static int transition_fid_vid(struct powernow_k8_data *data, u32 reqfid, u32 reqvid)
+static int transition_fid_vid(struct powernow_k8_data *data,
+                u32 reqfid, u32 reqvid)
 {
         if (core_voltage_pre_transition(data, reqvid))
                 return 1;
@@ -298,7 +311,8 @@ static int transition_fid_vid(struct powernow_k8_data *data, u32 reqfid, u32 req
                 return 1;
 
         if ((reqfid != data->currfid) || (reqvid != data->currvid)) {
-                printk(KERN_ERR PFX "failed (cpu%d): req 0x%x 0x%x, curr 0x%x 0x%x\n",
+                printk(KERN_ERR PFX "failed (cpu%d): req 0x%x 0x%x, "
+                                "curr 0x%x 0x%x\n",
                                 smp_processor_id(),
                                 reqfid, reqvid, data->currfid, data->currvid);
                 return 1;
@@ -311,13 +325,15 @@ static int transition_fid_vid(struct powernow_k8_data *data, u32 reqfid, u32 req
 }
 
 /* Phase 1 - core voltage transition ... setup voltage */
-static int core_voltage_pre_transition(struct powernow_k8_data *data, u32 reqvid)
+static int core_voltage_pre_transition(struct powernow_k8_data *data,
+                u32 reqvid)
 {
         u32 rvosteps = data->rvo;
         u32 savefid = data->currfid;
         u32 maxvid, lo;
 
-        dprintk("ph1 (cpu%d): start, currfid 0x%x, currvid 0x%x, reqvid 0x%x, rvo 0x%x\n",
+        dprintk("ph1 (cpu%d): start, currfid 0x%x, currvid 0x%x, "
+                "reqvid 0x%x, rvo 0x%x\n",
                 smp_processor_id(),
                 data->currfid, data->currvid, reqvid, data->rvo);
 
@@ -340,7 +356,7 @@ static int core_voltage_pre_transition(struct powernow_k8_data *data, u32 reqvid
                 } else {
                         dprintk("ph1: changing vid for rvo, req 0x%x\n",
                                 data->currvid - 1);
-                        if (decrease_vid_code_by_step(data, data->currvid - 1, 1))
+                        if (decrease_vid_code_by_step(data, data->currvid-1, 1))
                                 return 1;
                         rvosteps--;
                 }
@@ -350,7 +366,8 @@ static int core_voltage_pre_transition(struct powernow_k8_data *data, u32 reqvid
                 return 1;
 
         if (savefid != data->currfid) {
-                printk(KERN_ERR PFX "ph1 err, currfid changed 0x%x\n", data->currfid);
+                printk(KERN_ERR PFX "ph1 err, currfid changed 0x%x\n",
+                                data->currfid);
                 return 1;
         }
 
@@ -363,20 +380,24 @@ static int core_voltage_pre_transition(struct powernow_k8_data *data, u32 reqvid
 /* Phase 2 - core frequency transition */
 static int core_frequency_transition(struct powernow_k8_data *data, u32 reqfid)
 {
-        u32 vcoreqfid, vcocurrfid, vcofiddiff, fid_interval, savevid = data->currvid;
+        u32 vcoreqfid, vcocurrfid, vcofiddiff;
+        u32 fid_interval, savevid = data->currvid;
 
-        if ((reqfid < HI_FID_TABLE_BOTTOM) && (data->currfid < HI_FID_TABLE_BOTTOM)) {
-                printk(KERN_ERR PFX "ph2: illegal lo-lo transition 0x%x 0x%x\n",
-                        reqfid, data->currfid);
+        if ((reqfid < HI_FID_TABLE_BOTTOM) &&
+            (data->currfid < HI_FID_TABLE_BOTTOM)) {
+                printk(KERN_ERR PFX "ph2: illegal lo-lo transition "
+                                "0x%x 0x%x\n", reqfid, data->currfid);
                 return 1;
         }
 
         if (data->currfid == reqfid) {
-                printk(KERN_ERR PFX "ph2 null fid transition 0x%x\n", data->currfid);
+                printk(KERN_ERR PFX "ph2 null fid transition 0x%x\n",
+                                data->currfid);
                 return 0;
         }
 
-        dprintk("ph2 (cpu%d): starting, currfid 0x%x, currvid 0x%x, reqfid 0x%x\n",
+        dprintk("ph2 (cpu%d): starting, currfid 0x%x, currvid 0x%x, "
+                "reqfid 0x%x\n",
                 smp_processor_id(),
                 data->currfid, data->currvid, reqfid);
 
@@ -390,14 +411,14 @@ static int core_frequency_transition(struct powernow_k8_data *data, u32 reqfid)
 
                 if (reqfid > data->currfid) {
                         if (data->currfid > LO_FID_TABLE_TOP) {
-                                if (write_new_fid(data, data->currfid + fid_interval)) {
+                                if (write_new_fid(data,
+                                                data->currfid + fid_interval))
                                         return 1;
-                                }
                         } else {
                                 if (write_new_fid
-                                    (data, 2 + convert_fid_to_vco_fid(data->currfid))) {
+                                    (data,
+                                     2 + convert_fid_to_vco_fid(data->currfid)))
                                         return 1;
-                                }
                         }
                 } else {
                         if (write_new_fid(data, data->currfid - fid_interval))
@@ -417,7 +438,8 @@ static int core_frequency_transition(struct powernow_k8_data *data, u32 reqfid)
 
         if (data->currfid != reqfid) {
                 printk(KERN_ERR PFX
-                        "ph2: mismatch, failed fid transition, curr 0x%x, req 0x%x\n",
+                        "ph2: mismatch, failed fid transition, "
+                        "curr 0x%x, req 0x%x\n",
                         data->currfid, reqfid);
                 return 1;
         }
@@ -435,7 +457,8 @@ static int core_frequency_transition(struct powernow_k8_data *data, u32 reqfid)
 }
 
 /* Phase 3 - core voltage transition flow ... jump to the final vid. */
-static int core_voltage_post_transition(struct powernow_k8_data *data, u32 reqvid)
+static int core_voltage_post_transition(struct powernow_k8_data *data,
+                u32 reqvid)
 {
         u32 savefid = data->currfid;
         u32 savereqvid = reqvid;
@@ -457,7 +480,8 @@ static int core_voltage_post_transition(struct powernow_k8_data *data, u32 reqvi
 
                 if (data->currvid != reqvid) {
                         printk(KERN_ERR PFX
-                               "ph3: failed vid transition\n, req 0x%x, curr 0x%x",
+                               "ph3: failed vid transition\n, "
+                               "req 0x%x, curr 0x%x",
                                reqvid, data->currvid);
                         return 1;
                 }
@@ -508,7 +532,8 @@ static int check_supported_cpu(unsigned int cpu)
         if ((eax & CPUID_XFAM) == CPUID_XFAM_K8) {
                 if (((eax & CPUID_USE_XFAM_XMOD) != CPUID_USE_XFAM_XMOD) ||
                     ((eax & CPUID_XMOD) > CPUID_XMOD_REV_MASK)) {
-                        printk(KERN_INFO PFX "Processor cpuid %x not supported\n", eax);
+                        printk(KERN_INFO PFX
+                                "Processor cpuid %x not supported\n", eax);
                         goto out;
                 }
 
@@ -520,8 +545,10 @@ static int check_supported_cpu(unsigned int cpu)
                 }
 
                 cpuid(CPUID_FREQ_VOLT_CAPABILITIES, &eax, &ebx, &ecx, &edx);
-                if ((edx & P_STATE_TRANSITION_CAPABLE) != P_STATE_TRANSITION_CAPABLE) {
-                        printk(KERN_INFO PFX "Power state transitions not supported\n");
+                if ((edx & P_STATE_TRANSITION_CAPABLE)
+                        != P_STATE_TRANSITION_CAPABLE) {
+                        printk(KERN_INFO PFX
+                                "Power state transitions not supported\n");
                         goto out;
                 }
         } else { /* must be a HW Pstate capable processor */
@@ -539,7 +566,8 @@ out:
         return rc;
 }
 
-static int check_pst_table(struct powernow_k8_data *data, struct pst_s *pst, u8 maxvid)
+static int check_pst_table(struct powernow_k8_data *data, struct pst_s *pst,
+                u8 maxvid)
 {
         unsigned int j;
         u8 lastfid = 0xff;
@@ -550,12 +578,14 @@ static int check_pst_table(struct powernow_k8_data *data, struct pst_s *pst, u8
                                j, pst[j].vid);
                         return -EINVAL;
                 }
-                if (pst[j].vid < data->rvo) {   /* vid + rvo >= 0 */
+                if (pst[j].vid < data->rvo) {
+                        /* vid + rvo >= 0 */
                         printk(KERN_ERR FW_BUG PFX "0 vid exceeded with pstate"
                                " %d\n", j);
                         return -ENODEV;
                 }
-                if (pst[j].vid < maxvid + data->rvo) {  /* vid + rvo >= maxvid */
+                if (pst[j].vid < maxvid + data->rvo) {
+                        /* vid + rvo >= maxvid */
                         printk(KERN_ERR FW_BUG PFX "maxvid exceeded with pstate"
                                " %d\n", j);
                         return -ENODEV;
@@ -579,23 +609,31 @@ static int check_pst_table(struct powernow_k8_data *data, struct pst_s *pst, u8
                 return -EINVAL;
         }
         if (lastfid > LO_FID_TABLE_TOP)
-                printk(KERN_INFO FW_BUG PFX  "first fid not from lo freq table\n");
+                printk(KERN_INFO FW_BUG PFX
+                        "first fid not from lo freq table\n");
 
         return 0;
 }
 
+static void invalidate_entry(struct powernow_k8_data *data, unsigned int entry)
+{
+        data->powernow_table[entry].frequency = CPUFREQ_ENTRY_INVALID;
+}
+
 static void print_basics(struct powernow_k8_data *data)
 {
         int j;
         for (j = 0; j < data->numps; j++) {
-                if (data->powernow_table[j].frequency != CPUFREQ_ENTRY_INVALID) {
+                if (data->powernow_table[j].frequency !=
+                                CPUFREQ_ENTRY_INVALID) {
                         if (cpu_family == CPU_HW_PSTATE) {
-                                printk(KERN_INFO PFX "   %d : pstate %d (%d MHz)\n",
-                                        j,
+                                printk(KERN_INFO PFX
+                                        "   %d : pstate %d (%d MHz)\n", j,
                                         data->powernow_table[j].index,
                                         data->powernow_table[j].frequency/1000);
                         } else {
-                                printk(KERN_INFO PFX "   %d : fid 0x%x (%d MHz), vid 0x%x\n",
+                                printk(KERN_INFO PFX
+                                        "   %d : fid 0x%x (%d MHz), vid 0x%x\n",
                                         j,
                                         data->powernow_table[j].index & 0xff,
                                         data->powernow_table[j].frequency/1000,
@@ -604,20 +642,25 @@ static void print_basics(struct powernow_k8_data *data)
                 }
         }
         if (data->batps)
-                printk(KERN_INFO PFX "Only %d pstates on battery\n", data->batps);
+                printk(KERN_INFO PFX "Only %d pstates on battery\n",
+                                data->batps);
 }
 
-static int fill_powernow_table(struct powernow_k8_data *data, struct pst_s *pst, u8 maxvid)
+static int fill_powernow_table(struct powernow_k8_data *data,
+                struct pst_s *pst, u8 maxvid)
 {
         struct cpufreq_frequency_table *powernow_table;
         unsigned int j;
 
-        if (data->batps) {    /* use ACPI support to get full speed on mains power */
-                printk(KERN_WARNING PFX "Only %d pstates usable (use ACPI driver for full range\n", data->batps);
+        if (data->batps) {
+                /* use ACPI support to get full speed on mains power */
+                printk(KERN_WARNING PFX
+                        "Only %d pstates usable (use ACPI driver for full "
+                        "range\n", data->batps);
                 data->numps = data->batps;
         }
 
-        for ( j=1; j<data->numps; j++ ) {
+        for (j = 1; j < data->numps; j++) {
                 if (pst[j-1].fid >= pst[j].fid) {
                         printk(KERN_ERR PFX "PST out of sequence\n");
                         return -EINVAL;
@@ -640,9 +683,11 @@ static int fill_powernow_table(struct powernow_k8_data *data, struct pst_s *pst,
         }
 
         for (j = 0; j < data->numps; j++) {
+                int freq;
                 powernow_table[j].index = pst[j].fid; /* lower 8 bits */
                 powernow_table[j].index |= (pst[j].vid << 8); /* upper 8 bits */
-                powernow_table[j].frequency = find_khz_freq_from_fid(pst[j].fid);
+                freq = find_khz_freq_from_fid(pst[j].fid);
+                powernow_table[j].frequency = freq;
         }
         powernow_table[data->numps].frequency = CPUFREQ_TABLE_END;
         powernow_table[data->numps].index = 0;
@@ -658,7 +703,8 @@ static int fill_powernow_table(struct powernow_k8_data *data, struct pst_s *pst,
                 print_basics(data);
 
         for (j = 0; j < data->numps; j++)
-                if ((pst[j].fid==data->currfid) && (pst[j].vid==data->currvid))
+                if ((pst[j].fid == data->currfid) &&
+                    (pst[j].vid == data->currvid))
                         return 0;
 
         dprintk("currfid/vid do not match PST, ignoring\n");
@@ -698,7 +744,8 @@ static int find_psb_table(struct powernow_k8_data *data)
                 }
 
                 data->vstable = psb->vstable;
-                dprintk("voltage stabilization time: %d(*20us)\n", data->vstable);
+                dprintk("voltage stabilization time: %d(*20us)\n",
+                                data->vstable);
 
                 dprintk("flags2: 0x%x\n", psb->flags2);
                 data->rvo = psb->flags2 & 3;
@@ -713,11 +760,12 @@ static int find_psb_table(struct powernow_k8_data *data)
 
                 dprintk("numpst: 0x%x\n", psb->num_tables);
                 cpst = psb->num_tables;
-                if ((psb->cpuid == 0x00000fc0) || (psb->cpuid == 0x00000fe0) ){
+                if ((psb->cpuid == 0x00000fc0) ||
+                    (psb->cpuid == 0x00000fe0)) {
                         thiscpuid = cpuid_eax(CPUID_PROCESSOR_SIGNATURE);
-                        if ((thiscpuid == 0x00000fc0) || (thiscpuid == 0x00000fe0) ) {
+                        if ((thiscpuid == 0x00000fc0) ||
+                            (thiscpuid == 0x00000fe0))
                                 cpst = 1;
-                        }
                 }
                 if (cpst != 1) {
                         printk(KERN_ERR FW_BUG PFX "numpst must be 1\n");
@@ -732,7 +780,8 @@ static int find_psb_table(struct powernow_k8_data *data)
 
                 data->numps = psb->numps;
                 dprintk("numpstates: 0x%x\n", data->numps);
-                return fill_powernow_table(data, (struct pst_s *)(psb+1), maxvid);
+                return fill_powernow_table(data,
+                                (struct pst_s *)(psb+1), maxvid);
         }
         /*
          * If you see this message, complain to BIOS manufacturer. If
@@ -745,28 +794,31 @@ static int find_psb_table(struct powernow_k8_data *data)
          * BIOS and Kernel Developer's Guide, which is available on
          * www.amd.com
          */
-        printk(KERN_ERR PFX "BIOS error - no PSB or ACPI _PSS objects\n");
+        printk(KERN_ERR FW_BUG PFX "No PSB or ACPI _PSS objects\n");
         return -ENODEV;
 }
 
-#ifdef CONFIG_X86_POWERNOW_K8_ACPI
-static void powernow_k8_acpi_pst_values(struct powernow_k8_data *data, unsigned int index)
+static void powernow_k8_acpi_pst_values(struct powernow_k8_data *data,
+                unsigned int index)
 {
+        acpi_integer control;
+
         if (!data->acpi_data.state_count || (cpu_family == CPU_HW_PSTATE))
                 return;
 
-        data->irt = (data->acpi_data.states[index].control >> IRT_SHIFT) & IRT_MASK;
-        data->rvo = (data->acpi_data.states[index].control >> RVO_SHIFT) & RVO_MASK;
-        data->exttype = (data->acpi_data.states[index].control >> EXT_TYPE_SHIFT) & EXT_TYPE_MASK;
-        data->plllock = (data->acpi_data.states[index].control >> PLL_L_SHIFT) & PLL_L_MASK;
-        data->vidmvs = 1 << ((data->acpi_data.states[index].control >> MVS_SHIFT) & MVS_MASK);
-        data->vstable = (data->acpi_data.states[index].control >> VST_SHIFT) & VST_MASK;
-}
+        control = data->acpi_data.states[index].control; data->irt = (control
+                        >> IRT_SHIFT) & IRT_MASK; data->rvo = (control >>
+                                RVO_SHIFT) & RVO_MASK; data->exttype = (control
+                                        >> EXT_TYPE_SHIFT) & EXT_TYPE_MASK;
+        data->plllock = (control >> PLL_L_SHIFT) & PLL_L_MASK; data->vidmvs = 1
+                << ((control >> MVS_SHIFT) & MVS_MASK); data->vstable =
+                (control >> VST_SHIFT) & VST_MASK; }
 
 static int powernow_k8_cpu_init_acpi(struct powernow_k8_data *data)
 {
         struct cpufreq_frequency_table *powernow_table;
         int ret_val = -ENODEV;
+        acpi_integer space_id;
 
         if (acpi_processor_register_performance(&data->acpi_data, data->cpu)) {
                 dprintk("register performance failed: bad ACPI data\n");
@@ -779,11 +831,12 @@ static int powernow_k8_cpu_init_acpi(struct powernow_k8_data *data)
                 goto err_out;
         }
 
-        if ((data->acpi_data.control_register.space_id != ACPI_ADR_SPACE_FIXED_HARDWARE) ||
-                (data->acpi_data.status_register.space_id != ACPI_ADR_SPACE_FIXED_HARDWARE)) {
+        space_id = data->acpi_data.control_register.space_id;
+        if ((space_id != ACPI_ADR_SPACE_FIXED_HARDWARE) ||
+                (space_id != ACPI_ADR_SPACE_FIXED_HARDWARE)) {
                 dprintk("Invalid control/status registers (%x - %x)\n",
                         data->acpi_data.control_register.space_id,
-                        data->acpi_data.status_register.space_id);
+                        space_id);
                 goto err_out;
         }
 
@@ -802,7 +855,8 @@ static int powernow_k8_cpu_init_acpi(struct powernow_k8_data *data)
         if (ret_val)
                 goto err_out_mem;
 
-        powernow_table[data->acpi_data.state_count].frequency = CPUFREQ_TABLE_END;
+        powernow_table[data->acpi_data.state_count].frequency =
+                CPUFREQ_TABLE_END;
         powernow_table[data->acpi_data.state_count].index = 0;
         data->powernow_table = powernow_table;
 
@@ -830,13 +884,15 @@ err_out_mem:
 err_out:
         acpi_processor_unregister_performance(&data->acpi_data, data->cpu);
 
-        /* data->acpi_data.state_count informs us at ->exit() whether ACPI was used */
+        /* data->acpi_data.state_count informs us at ->exit()
+         * whether ACPI was used */
         data->acpi_data.state_count = 0;
 
         return ret_val;
 }
 
-static int fill_powernow_table_pstate(struct powernow_k8_data *data, struct cpufreq_frequency_table *powernow_table)
+static int fill_powernow_table_pstate(struct powernow_k8_data *data,
+                struct cpufreq_frequency_table *powernow_table)
 {
         int i;
         u32 hi = 0, lo = 0;
@@ -848,84 +904,101 @@ static int fill_powernow_table_pstate(struct powernow_k8_data *data, struct cpuf
 
                 index = data->acpi_data.states[i].control & HW_PSTATE_MASK;
                 if (index > data->max_hw_pstate) {
-                        printk(KERN_ERR PFX "invalid pstate %d - bad value %d.\n", i, index);
-                        printk(KERN_ERR PFX "Please report to BIOS manufacturer\n");
-                        powernow_table[i].frequency = CPUFREQ_ENTRY_INVALID;
+                        printk(KERN_ERR PFX "invalid pstate %d - "
+                                        "bad value %d.\n", i, index);
+                        printk(KERN_ERR PFX "Please report to BIOS "
+                                        "manufacturer\n");
+                        invalidate_entry(data, i);
                         continue;
                 }
                 rdmsr(MSR_PSTATE_DEF_BASE + index, lo, hi);
                 if (!(hi & HW_PSTATE_VALID_MASK)) {
                         dprintk("invalid pstate %d, ignoring\n", index);
-                        powernow_table[i].frequency = CPUFREQ_ENTRY_INVALID;
+                        invalidate_entry(data, i);
                         continue;
                 }
 
                 powernow_table[i].index = index;
 
-                powernow_table[i].frequency = data->acpi_data.states[i].core_frequency * 1000;
+                powernow_table[i].frequency =
+                        data->acpi_data.states[i].core_frequency * 1000;
         }
         return 0;
 }
 
-static int fill_powernow_table_fidvid(struct powernow_k8_data *data, struct cpufreq_frequency_table *powernow_table)
+static int fill_powernow_table_fidvid(struct powernow_k8_data *data,
+                struct cpufreq_frequency_table *powernow_table)
 {
         int i;
         int cntlofreq = 0;
+
         for (i = 0; i < data->acpi_data.state_count; i++) {
                 u32 fid;
                 u32 vid;
+                u32 freq, index;
+                acpi_integer status, control;
 
                 if (data->exttype) {
-                        fid = data->acpi_data.states[i].status & EXT_FID_MASK;
-                        vid = (data->acpi_data.states[i].status >> VID_SHIFT) & EXT_VID_MASK;
+                        status =  data->acpi_data.states[i].status;
+                        fid = status & EXT_FID_MASK;
+                        vid = (status >> VID_SHIFT) & EXT_VID_MASK;
                 } else {
-                        fid = data->acpi_data.states[i].control & FID_MASK;
-                        vid = (data->acpi_data.states[i].control >> VID_SHIFT) & VID_MASK;
+                        control =  data->acpi_data.states[i].control;
+                        fid = control & FID_MASK;
+                        vid = (control >> VID_SHIFT) & VID_MASK;
                 }
 
                 dprintk("   %d : fid 0x%x, vid 0x%x\n", i, fid, vid);
 
-                powernow_table[i].index = fid; /* lower 8 bits */
-                powernow_table[i].index |= (vid << 8); /* upper 8 bits */
-                powernow_table[i].frequency = find_khz_freq_from_fid(fid);
+                index = fid | (vid<<8);
+                powernow_table[i].index = index;
+
+                freq = find_khz_freq_from_fid(fid);
+                powernow_table[i].frequency = freq;
 
                 /* verify frequency is OK */
-                if ((powernow_table[i].frequency > (MAX_FREQ * 1000)) ||
-                        (powernow_table[i].frequency < (MIN_FREQ * 1000))) {
-                        dprintk("invalid freq %u kHz, ignoring\n", powernow_table[i].frequency);
-                        powernow_table[i].frequency = CPUFREQ_ENTRY_INVALID;
+                if ((freq > (MAX_FREQ * 1000)) || (freq < (MIN_FREQ * 1000))) {
+                        dprintk("invalid freq %u kHz, ignoring\n", freq);
+                        invalidate_entry(data, i);
                         continue;
                 }
 
-                /* verify voltage is OK - BIOSs are using "off" to indicate invalid */
+                /* verify voltage is OK -
+                 * BIOSs are using "off" to indicate invalid */
                 if (vid == VID_OFF) {
                         dprintk("invalid vid %u, ignoring\n", vid);
-                        powernow_table[i].frequency = CPUFREQ_ENTRY_INVALID;
+                        invalidate_entry(data, i);
                         continue;
                 }
 
                 /* verify only 1 entry from the lo frequency table */
                 if (fid < HI_FID_TABLE_BOTTOM) {
                         if (cntlofreq) {
-                                /* if both entries are the same, ignore this one ... */
-                                if ((powernow_table[i].frequency != powernow_table[cntlofreq].frequency) ||
-                                    (powernow_table[i].index != powernow_table[cntlofreq].index)) {
-                                        printk(KERN_ERR PFX "Too many lo freq table entries\n");
+                                /* if both entries are the same,
+                                 * ignore this one ... */
+                                if ((freq != powernow_table[cntlofreq].frequency) ||
+                                    (index != powernow_table[cntlofreq].index)) {
+                                        printk(KERN_ERR PFX
+                                                "Too many lo freq table "
+                                                "entries\n");
                                         return 1;
                                 }
 
-                                dprintk("double low frequency table entry, ignoring it.\n");
-                                powernow_table[i].frequency = CPUFREQ_ENTRY_INVALID;
+                                dprintk("double low frequency table entry, "
+                                                "ignoring it.\n");
+                                invalidate_entry(data, i);
                                 continue;
                         } else
                                 cntlofreq = i;
                 }
 
-                if (powernow_table[i].frequency != (data->acpi_data.states[i].core_frequency * 1000)) {
-                        printk(KERN_INFO PFX "invalid freq entries %u kHz vs. %u kHz\n",
-                                powernow_table[i].frequency,
-                                (unsigned int) (data->acpi_data.states[i].core_frequency * 1000));
-                        powernow_table[i].frequency = CPUFREQ_ENTRY_INVALID;
+                if (freq != (data->acpi_data.states[i].core_frequency * 1000)) {
+                        printk(KERN_INFO PFX "invalid freq entries "
+                                "%u kHz vs. %u kHz\n", freq,
+                                (unsigned int)
+                                (data->acpi_data.states[i].core_frequency
+                                 * 1000));
+                        invalidate_entry(data, i);
                         continue;
                 }
         }
@@ -935,7 +1008,8 @@ static int fill_powernow_table_fidvid(struct powernow_k8_data *data, struct cpuf
 static void powernow_k8_cpu_exit_acpi(struct powernow_k8_data *data)
 {
         if (data->acpi_data.state_count)
-                acpi_processor_unregister_performance(&data->acpi_data, data->cpu);
+                acpi_processor_unregister_performance(&data->acpi_data,
+                                data->cpu);
         free_cpumask_var(data->acpi_data.shared_cpu_map);
 }
 
@@ -953,15 +1027,9 @@ static int get_transition_latency(struct powernow_k8_data *data)
         return 1000 * max_latency;
 }
 
-#else
-static int powernow_k8_cpu_init_acpi(struct powernow_k8_data *data) { return -ENODEV; }
-static void powernow_k8_cpu_exit_acpi(struct powernow_k8_data *data) { return; }
-static void powernow_k8_acpi_pst_values(struct powernow_k8_data *data, unsigned int index) { return; }
-static int get_transition_latency(struct powernow_k8_data *data) { return 0; }
-#endif /* CONFIG_X86_POWERNOW_K8_ACPI */
-
 /* Take a frequency, and issue the fid/vid transition command */
-static int transition_frequency_fidvid(struct powernow_k8_data *data, unsigned int index)
+static int transition_frequency_fidvid(struct powernow_k8_data *data,
+                unsigned int index)
 {
         u32 fid = 0;
         u32 vid = 0;
@@ -989,7 +1057,8 @@ static int transition_frequency_fidvid(struct powernow_k8_data *data, unsigned i
                 return 0;
         }
 
-        if ((fid < HI_FID_TABLE_BOTTOM) && (data->currfid < HI_FID_TABLE_BOTTOM)) {
+        if ((fid < HI_FID_TABLE_BOTTOM) &&
+            (data->currfid < HI_FID_TABLE_BOTTOM)) {
                 printk(KERN_ERR PFX
                        "ignoring illegal change in lo freq table-%x to 0x%x\n",
                        data->currfid, fid);
@@ -1017,7 +1086,8 @@ static int transition_frequency_fidvid(struct powernow_k8_data *data, unsigned i
 }
 
 /* Take a frequency, and issue the hardware pstate transition command */
-static int transition_frequency_pstate(struct powernow_k8_data *data, unsigned int index)
+static int transition_frequency_pstate(struct powernow_k8_data *data,
+                unsigned int index)
 {
         u32 pstate = 0;
         int res, i;
@@ -1029,7 +1099,8 @@ static int transition_frequency_pstate(struct powernow_k8_data *data, unsigned i
         pstate = index & HW_PSTATE_MASK;
         if (pstate > data->max_hw_pstate)
                 return 0;
-        freqs.old = find_khz_freq_from_pstate(data->powernow_table, data->currpstate);
+        freqs.old = find_khz_freq_from_pstate(data->powernow_table,
+                        data->currpstate);
         freqs.new = find_khz_freq_from_pstate(data->powernow_table, pstate);
 
         for_each_cpu_mask_nr(i, *(data->available_cores)) {
@@ -1048,7 +1119,8 @@ static int transition_frequency_pstate(struct powernow_k8_data *data, unsigned i
 }
 
 /* Driver entry point to switch to the target frequency */
-static int powernowk8_target(struct cpufreq_policy *pol, unsigned targfreq, unsigned relation)
+static int powernowk8_target(struct cpufreq_policy *pol,
+                unsigned targfreq, unsigned relation)
 {
         cpumask_t oldmask;
         struct powernow_k8_data *data = per_cpu(powernow_data, pol->cpu);
@@ -1087,14 +1159,18 @@ static int powernowk8_target(struct cpufreq_policy *pol, unsigned targfreq, unsi
                 dprintk("targ: curr fid 0x%x, vid 0x%x\n",
                 data->currfid, data->currvid);
 
-                if ((checkvid != data->currvid) || (checkfid != data->currfid)) {
+                if ((checkvid != data->currvid) ||
+                    (checkfid != data->currfid)) {
                         printk(KERN_INFO PFX
-                                "error - out of sync, fix 0x%x 0x%x, vid 0x%x 0x%x\n",
-                                checkfid, data->currfid, checkvid, data->currvid);
+                                "error - out of sync, fix 0x%x 0x%x, "
+                                "vid 0x%x 0x%x\n",
+                                checkfid, data->currfid,
+                                checkvid, data->currvid);
                 }
         }
 
-        if (cpufreq_frequency_table_target(pol, data->powernow_table, targfreq, relation, &newstate))
+        if (cpufreq_frequency_table_target(pol, data->powernow_table,
+                                targfreq, relation, &newstate))
                 goto err_out;
 
         mutex_lock(&fidvid_mutex);
@@ -1114,7 +1190,8 @@ static int powernowk8_target(struct cpufreq_policy *pol, unsigned targfreq, unsi
         mutex_unlock(&fidvid_mutex);
 
         if (cpu_family == CPU_HW_PSTATE)
-                pol->cur = find_khz_freq_from_pstate(data->powernow_table, newstate);
+                pol->cur = find_khz_freq_from_pstate(data->powernow_table,
+                                newstate);
         else
                 pol->cur = find_khz_freq_from_fid(data->currfid);
         ret = 0;
@@ -1141,6 +1218,7 @@ static int __cpuinit powernowk8_cpu_init(struct cpufreq_policy *pol)
         struct powernow_k8_data *data;
         cpumask_t oldmask;
         int rc;
+        static int print_once;
 
         if (!cpu_online(pol->cpu))
                 return -ENODEV;
@@ -1163,33 +1241,31 @@ static int __cpuinit powernowk8_cpu_init(struct cpufreq_policy *pol)
                  * an UP version, and is deprecated by AMD.
                  */
                 if (num_online_cpus() != 1) {
-#ifndef CONFIG_ACPI_PROCESSOR
-                        printk(KERN_ERR PFX "ACPI Processor support is required "
-                               "for SMP systems but is absent. Please load the "
-                               "ACPI Processor module before starting this "
-                               "driver.\n");
-#else
-                        printk(KERN_ERR FW_BUG PFX "Your BIOS does not provide"
-                               " ACPI _PSS objects in a way that Linux "
-                               "understands. Please report this to the Linux "
-                               "ACPI maintainers and complain to your BIOS "
-                               "vendor.\n");
-#endif
-                        kfree(data);
-                        return -ENODEV;
+                        /*
+                         * Replace this one with print_once as soon as such a
+                         * thing gets introduced
+                         */
+                        if (!print_once) {
+                                WARN_ONCE(1, KERN_ERR FW_BUG PFX "Your BIOS "
+                                        "does not provide ACPI _PSS objects "
+                                        "in a way that Linux understands. "
+                                        "Please report this to the Linux ACPI"
+                                        " maintainers and complain to your "
+                                        "BIOS vendor.\n");
+                                print_once++;
+                        }
+                        goto err_out;
                 }
                 if (pol->cpu != 0) {
                         printk(KERN_ERR FW_BUG PFX "No ACPI _PSS objects for "
                                "CPU other than CPU0. Complain to your BIOS "
                                "vendor.\n");
-                        kfree(data);
-                        return -ENODEV;
+                        goto err_out;
                 }
                 rc = find_psb_table(data);
-                if (rc) {
-                        kfree(data);
-                        return -ENODEV;
-                }
+                if (rc)
+                        goto err_out;
+
                 /* Take a crude guess here.
                  * That guess was in microseconds, so multiply with 1000 */
                 pol->cpuinfo.transition_latency = (
@@ -1204,16 +1280,16 @@ static int __cpuinit powernowk8_cpu_init(struct cpufreq_policy *pol)
 
         if (smp_processor_id() != pol->cpu) {
                 printk(KERN_ERR PFX "limiting to cpu %u failed\n", pol->cpu);
-                goto err_out;
+                goto err_out_unmask;
         }
 
         if (pending_bit_stuck()) {
                 printk(KERN_ERR PFX "failing init, change pending bit set\n");
-                goto err_out;
+                goto err_out_unmask;
         }
 
         if (query_current_values_with_pending_wait(data))
-                goto err_out;
+                goto err_out_unmask;
 
         if (cpu_family == CPU_OPTERON)
                 fidvid_msr_init();
@@ -1228,7 +1304,8 @@ static int __cpuinit powernowk8_cpu_init(struct cpufreq_policy *pol)
         data->available_cores = pol->cpus;
 
         if (cpu_family == CPU_HW_PSTATE)
-                pol->cur = find_khz_freq_from_pstate(data->powernow_table, data->currpstate);
+                pol->cur = find_khz_freq_from_pstate(data->powernow_table,
+                                data->currpstate);
         else
                 pol->cur = find_khz_freq_from_fid(data->currfid);
         dprintk("policy current frequency %d kHz\n", pol->cur);
@@ -1245,7 +1322,8 @@ static int __cpuinit powernowk8_cpu_init(struct cpufreq_policy *pol)
         cpufreq_frequency_table_get_attr(data->powernow_table, pol->cpu);
 
         if (cpu_family == CPU_HW_PSTATE)
-                dprintk("cpu_init done, current pstate 0x%x\n", data->currpstate);
+                dprintk("cpu_init done, current pstate 0x%x\n",
+                                data->currpstate);
         else
                 dprintk("cpu_init done, current fid 0x%x, vid 0x%x\n",
                         data->currfid, data->currvid);
@@ -1254,15 +1332,16 @@ static int __cpuinit powernowk8_cpu_init(struct cpufreq_policy *pol)
 
         return 0;
 
-err_out:
+err_out_unmask:
         set_cpus_allowed_ptr(current, &oldmask);
         powernow_k8_cpu_exit_acpi(data);
 
+err_out:
         kfree(data);
         return -ENODEV;
 }
 
-static int __devexit powernowk8_cpu_exit (struct cpufreq_policy *pol)
+static int __devexit powernowk8_cpu_exit(struct cpufreq_policy *pol)
 {
         struct powernow_k8_data *data = per_cpu(powernow_data, pol->cpu);
 
@@ -1279,7 +1358,7 @@ static int __devexit powernowk8_cpu_exit (struct cpufreq_policy *pol)
         return 0;
 }
 
-static unsigned int powernowk8_get (unsigned int cpu)
+static unsigned int powernowk8_get(unsigned int cpu)
 {
         struct powernow_k8_data *data;
         cpumask_t oldmask = current->cpus_allowed;
@@ -1315,7 +1394,7 @@ out:
         return khz;
 }
 
-static struct freq_attr* powernow_k8_attr[] = {
+static struct freq_attr *powernow_k8_attr[] = {
         &cpufreq_freq_attr_scaling_available_freqs,
         NULL,
 };
@@ -1360,7 +1439,8 @@ static void __exit powernowk8_exit(void)
         cpufreq_unregister_driver(&cpufreq_amd64_driver);
 }
 
-MODULE_AUTHOR("Paul Devriendt <paul.devriendt@amd.com> and Mark Langsdorf <mark.langsdorf@amd.com>");
+MODULE_AUTHOR("Paul Devriendt <paul.devriendt@amd.com> and "
+                "Mark Langsdorf <mark.langsdorf@amd.com>");
 MODULE_DESCRIPTION("AMD Athlon 64 and Opteron processor frequency driver.");
 MODULE_LICENSE("GPL");
 
diff --git a/arch/x86/kernel/cpu/cpufreq/powernow-k8.h b/arch/x86/kernel/cpu/cpufreq/powernow-k8.h
index 8ecc75b6c7c3..6c6698feade1 100644
--- a/arch/x86/kernel/cpu/cpufreq/powernow-k8.h
+++ b/arch/x86/kernel/cpu/cpufreq/powernow-k8.h
@@ -45,11 +45,10 @@ struct powernow_k8_data {
          * frequency is in kHz */
         struct cpufreq_frequency_table  *powernow_table;
 
-#ifdef CONFIG_X86_POWERNOW_K8_ACPI
         /* the acpi table needs to be kept. it's only available if ACPI was
          * used to determine valid frequency/vid/fid states */
         struct acpi_processor_performance acpi_data;
-#endif
+
         /* we need to keep track of associated cores, but let cpufreq
          * handle hotplug events - so just point at cpufreq pol->cpus
          * structure */
@@ -222,10 +221,8 @@ static int core_frequency_transition(struct powernow_k8_data *data, u32 reqfid);
 
 static void powernow_k8_acpi_pst_values(struct powernow_k8_data *data, unsigned int index);
 
-#ifdef CONFIG_X86_POWERNOW_K8_ACPI
 static int fill_powernow_table_pstate(struct powernow_k8_data *data, struct cpufreq_frequency_table *powernow_table);
 static int fill_powernow_table_fidvid(struct powernow_k8_data *data, struct cpufreq_frequency_table *powernow_table);
-#endif
 
 #ifdef CONFIG_SMP
 static inline void define_siblings(int cpu, cpumask_t cpu_sharedcore_mask[])
diff --git a/arch/x86/kernel/cpu/cpufreq/sc520_freq.c b/arch/x86/kernel/cpu/cpufreq/sc520_freq.c
index 42da9bd677d6..435a996a613a 100644
--- a/arch/x86/kernel/cpu/cpufreq/sc520_freq.c
+++ b/arch/x86/kernel/cpu/cpufreq/sc520_freq.c
@@ -19,17 +19,19 @@
 
 #include <linux/delay.h>
 #include <linux/cpufreq.h>
+#include <linux/timex.h>
+#include <linux/io.h>
 
 #include <asm/msr.h>
-#include <asm/timex.h>
-#include <asm/io.h>
 
 #define MMCR_BASE       0xfffef000      /* The default base address */
 #define OFFS_CPUCTL     0x2   /* CPU Control Register */
 
 static __u8 __iomem *cpuctl;
 
-#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, "sc520_freq", msg)
+#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, \
+                "sc520_freq", msg)
+#define PFX "sc520_freq: "
 
 static struct cpufreq_frequency_table sc520_freq_table[] = {
         {0x01,  100000},
@@ -43,7 +45,8 @@ static unsigned int sc520_freq_get_cpu_frequency(unsigned int cpu)
 
         switch (clockspeed_reg & 0x03) {
         default:
-                printk(KERN_ERR "sc520_freq: error: cpuctl register has unexpected value %02x\n", clockspeed_reg);
+                printk(KERN_ERR PFX "error: cpuctl register has unexpected "
+                                "value %02x\n", clockspeed_reg);
         case 0x01:
                 return 100000;
         case 0x02:
@@ -51,7 +54,7 @@ static unsigned int sc520_freq_get_cpu_frequency(unsigned int cpu)
         }
 }
 
-static void sc520_freq_set_cpu_state (unsigned int state)
+static void sc520_freq_set_cpu_state(unsigned int state)
 {
 
         struct cpufreq_freqs    freqs;
@@ -76,18 +79,19 @@ static void sc520_freq_set_cpu_state (unsigned int state)
         cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
 };
 
-static int sc520_freq_verify (struct cpufreq_policy *policy)
+static int sc520_freq_verify(struct cpufreq_policy *policy)
 {
         return cpufreq_frequency_table_verify(policy, &sc520_freq_table[0]);
 }
 
-static int sc520_freq_target (struct cpufreq_policy *policy,
+static int sc520_freq_target(struct cpufreq_policy *policy,
                             unsigned int target_freq,
                             unsigned int relation)
 {
         unsigned int newstate = 0;
 
-        if (cpufreq_frequency_table_target(policy, sc520_freq_table, target_freq, relation, &newstate))
+        if (cpufreq_frequency_table_target(policy, sc520_freq_table,
+                                target_freq, relation, &newstate))
                 return -EINVAL;
 
         sc520_freq_set_cpu_state(newstate);
@@ -116,7 +120,7 @@ static int sc520_freq_cpu_init(struct cpufreq_policy *policy)
 
         result = cpufreq_frequency_table_cpuinfo(policy, sc520_freq_table);
         if (result)
-                return (result);
+                return result;
 
         cpufreq_frequency_table_get_attr(sc520_freq_table, policy->cpu);
 
@@ -131,7 +135,7 @@ static int sc520_freq_cpu_exit(struct cpufreq_policy *policy)
 }
 
 
-static struct freq_attr* sc520_freq_attr[] = {
+static struct freq_attr *sc520_freq_attr[] = {
         &cpufreq_freq_attr_scaling_available_freqs,
         NULL,
 };
@@ -155,13 +159,13 @@ static int __init sc520_freq_init(void)
         int err;
 
         /* Test if we have the right hardware */
-        if(c->x86_vendor != X86_VENDOR_AMD ||
-                                c->x86 != 4 || c->x86_model != 9) {
+        if (c->x86_vendor != X86_VENDOR_AMD ||
+            c->x86 != 4 || c->x86_model != 9) {
                 dprintk("no Elan SC520 processor found!\n");
                 return -ENODEV;
         }
         cpuctl = ioremap((unsigned long)(MMCR_BASE + OFFS_CPUCTL), 1);
-        if(!cpuctl) {
+        if (!cpuctl) {
                 printk(KERN_ERR "sc520_freq: error: failed to remap memory\n");
                 return -ENOMEM;
         }
diff --git a/arch/x86/kernel/cpu/cpufreq/speedstep-centrino.c b/arch/x86/kernel/cpu/cpufreq/speedstep-centrino.c
index f08998278a3a..c9f1fdc02830 100644
--- a/arch/x86/kernel/cpu/cpufreq/speedstep-centrino.c
+++ b/arch/x86/kernel/cpu/cpufreq/speedstep-centrino.c
@@ -390,14 +390,14 @@ static int centrino_cpu_init(struct cpufreq_policy *policy)
            enable it if not. */
         rdmsr(MSR_IA32_MISC_ENABLE, l, h);
 
-        if (!(l & (1<<16))) {
-                l |= (1<<16);
+        if (!(l & MSR_IA32_MISC_ENABLE_ENHANCED_SPEEDSTEP)) {
+                l |= MSR_IA32_MISC_ENABLE_ENHANCED_SPEEDSTEP;
                 dprintk("trying to enable Enhanced SpeedStep (%x)\n", l);
                 wrmsr(MSR_IA32_MISC_ENABLE, l, h);
 
                 /* check to see if it stuck */
                 rdmsr(MSR_IA32_MISC_ENABLE, l, h);
-                if (!(l & (1<<16))) {
+                if (!(l & MSR_IA32_MISC_ENABLE_ENHANCED_SPEEDSTEP)) {
                         printk(KERN_INFO PFX
                                 "couldn't enable Enhanced SpeedStep\n");
                         return -ENODEV;
diff --git a/arch/x86/kernel/cpu/cpufreq/speedstep-ich.c b/arch/x86/kernel/cpu/cpufreq/speedstep-ich.c
index dedc1e98f168..8bbb11adb315 100644
--- a/arch/x86/kernel/cpu/cpufreq/speedstep-ich.c
+++ b/arch/x86/kernel/cpu/cpufreq/speedstep-ich.c
@@ -39,7 +39,7 @@ static struct pci_dev *speedstep_chipset_dev;
 
 /* speedstep_processor
  */
-static unsigned int speedstep_processor = 0;
+static unsigned int speedstep_processor;
 
 static u32 pmbase;
 
@@ -54,7 +54,8 @@ static struct cpufreq_frequency_table speedstep_freqs[] = {
 };
 
 
-#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, "speedstep-ich", msg)
+#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, \
+                "speedstep-ich", msg)
 
 
 /**
@@ -62,7 +63,7 @@ static struct cpufreq_frequency_table speedstep_freqs[] = {
  *
  * Returns: -ENODEV if no register could be found
  */
-static int speedstep_find_register (void)
+static int speedstep_find_register(void)
 {
         if (!speedstep_chipset_dev)
                 return -ENODEV;
@@ -90,7 +91,7 @@ static int speedstep_find_register (void)
  *
  *   Tries to change the SpeedStep state.
  */
-static void speedstep_set_state (unsigned int state)
+static void speedstep_set_state(unsigned int state)
 {
         u8 pm2_blk;
         u8 value;
@@ -133,11 +134,11 @@ static void speedstep_set_state (unsigned int state)
 
         dprintk("read at pmbase 0x%x + 0x50 returned 0x%x\n", pmbase, value);
 
-        if (state == (value & 0x1)) {
-                dprintk("change to %u MHz succeeded\n", (speedstep_get_processor_frequency(speedstep_processor) / 1000));
-        } else {
-                printk (KERN_ERR "cpufreq: change failed - I/O error\n");
-        }
+        if (state == (value & 0x1))
+                dprintk("change to %u MHz succeeded\n",
+                        speedstep_get_frequency(speedstep_processor) / 1000);
+        else
+                printk(KERN_ERR "cpufreq: change failed - I/O error\n");
 
         return;
 }
@@ -149,7 +150,7 @@ static void speedstep_set_state (unsigned int state)
  *   Tries to activate the SpeedStep status and control registers.
  * Returns -EINVAL on an unsupported chipset, and zero on success.
  */
-static int speedstep_activate (void)
+static int speedstep_activate(void)
 {
         u16 value = 0;
 
@@ -175,20 +176,18 @@ static int speedstep_activate (void)
  * functions. Returns the SPEEDSTEP_CHIPSET_-number for the detected
  * chipset, or zero on failure.
  */
-static unsigned int speedstep_detect_chipset (void)
+static unsigned int speedstep_detect_chipset(void)
 {
         speedstep_chipset_dev = pci_get_subsys(PCI_VENDOR_ID_INTEL,
                               PCI_DEVICE_ID_INTEL_82801DB_12,
-                              PCI_ANY_ID,
-                              PCI_ANY_ID,
+                              PCI_ANY_ID, PCI_ANY_ID,
                               NULL);
         if (speedstep_chipset_dev)
                 return 4; /* 4-M */
 
         speedstep_chipset_dev = pci_get_subsys(PCI_VENDOR_ID_INTEL,
                               PCI_DEVICE_ID_INTEL_82801CA_12,
-                              PCI_ANY_ID,
-                              PCI_ANY_ID,
+                              PCI_ANY_ID, PCI_ANY_ID,
                               NULL);
         if (speedstep_chipset_dev)
                 return 3; /* 3-M */
@@ -196,8 +195,7 @@ static unsigned int speedstep_detect_chipset (void)
 
         speedstep_chipset_dev = pci_get_subsys(PCI_VENDOR_ID_INTEL,
                               PCI_DEVICE_ID_INTEL_82801BA_10,
-                              PCI_ANY_ID,
-                              PCI_ANY_ID,
+                              PCI_ANY_ID, PCI_ANY_ID,
                               NULL);
         if (speedstep_chipset_dev) {
                 /* speedstep.c causes lockups on Dell Inspirons 8000 and
@@ -208,8 +206,7 @@ static unsigned int speedstep_detect_chipset (void)
 
                 hostbridge  = pci_get_subsys(PCI_VENDOR_ID_INTEL,
                               PCI_DEVICE_ID_INTEL_82815_MC,
-                              PCI_ANY_ID,
-                              PCI_ANY_ID,
+                              PCI_ANY_ID, PCI_ANY_ID,
                               NULL);
 
                 if (!hostbridge)
@@ -236,7 +233,7 @@ static unsigned int _speedstep_get(const struct cpumask *cpus)
 
         cpus_allowed = current->cpus_allowed;
         set_cpus_allowed_ptr(current, cpus);
-        speed = speedstep_get_processor_frequency(speedstep_processor);
+        speed = speedstep_get_frequency(speedstep_processor);
         set_cpus_allowed_ptr(current, &cpus_allowed);
         dprintk("detected %u kHz as current frequency\n", speed);
         return speed;
@@ -251,11 +248,12 @@ static unsigned int speedstep_get(unsigned int cpu)
  * speedstep_target - set a new CPUFreq policy
  * @policy: new policy
  * @target_freq: the target frequency
- * @relation: how that frequency relates to achieved frequency (CPUFREQ_RELATION_L or CPUFREQ_RELATION_H)
+ * @relation: how that frequency relates to achieved frequency
+ *      (CPUFREQ_RELATION_L or CPUFREQ_RELATION_H)
  *
  * Sets a new CPUFreq policy.
  */
-static int speedstep_target (struct cpufreq_policy *policy,
+static int speedstep_target(struct cpufreq_policy *policy,
                              unsigned int target_freq,
                              unsigned int relation)
 {
@@ -264,7 +262,8 @@ static int speedstep_target (struct cpufreq_policy *policy,
         cpumask_t cpus_allowed;
         int i;
 
-        if (cpufreq_frequency_table_target(policy, &speedstep_freqs[0], target_freq, relation, &newstate))
+        if (cpufreq_frequency_table_target(policy, &speedstep_freqs[0],
+                                target_freq, relation, &newstate))
                 return -EINVAL;
 
         freqs.old = _speedstep_get(policy->cpus);
@@ -308,7 +307,7 @@ static int speedstep_target (struct cpufreq_policy *policy,
  * Limit must be within speedstep_low_freq and speedstep_high_freq, with
  * at least one border included.
  */
-static int speedstep_verify (struct cpufreq_policy *policy)
+static int speedstep_verify(struct cpufreq_policy *policy)
 {
         return cpufreq_frequency_table_verify(policy, &speedstep_freqs[0]);
 }
@@ -344,7 +343,8 @@ static int speedstep_cpu_init(struct cpufreq_policy *policy)
                 return -EIO;
 
         dprintk("currently at %s speed setting - %i MHz\n",
-                (speed == speedstep_freqs[SPEEDSTEP_LOW].frequency) ? "low" : "high",
+                (speed == speedstep_freqs[SPEEDSTEP_LOW].frequency)
+                ? "low" : "high",
                 (speed / 1000));
 
         /* cpuinfo and default policy values */
@@ -352,9 +352,9 @@ static int speedstep_cpu_init(struct cpufreq_policy *policy)
 
         result = cpufreq_frequency_table_cpuinfo(policy, speedstep_freqs);
         if (result)
-                return (result);
+                return result;
 
-        cpufreq_frequency_table_get_attr(speedstep_freqs, policy->cpu);
+        cpufreq_frequency_table_get_attr(speedstep_freqs, policy->cpu);
 
         return 0;
 }
@@ -366,7 +366,7 @@ static int speedstep_cpu_exit(struct cpufreq_policy *policy)
         return 0;
 }
 
-static struct freq_attr* speedstep_attr[] = {
+static struct freq_attr *speedstep_attr[] = {
         &cpufreq_freq_attr_scaling_available_freqs,
         NULL,
 };
@@ -396,13 +396,15 @@ static int __init speedstep_init(void)
         /* detect processor */
         speedstep_processor = speedstep_detect_processor();
         if (!speedstep_processor) {
-                dprintk("Intel(R) SpeedStep(TM) capable processor not found\n");
+                dprintk("Intel(R) SpeedStep(TM) capable processor "
+                                "not found\n");
                 return -ENODEV;
         }
 
         /* detect chipset */
         if (!speedstep_detect_chipset()) {
-                dprintk("Intel(R) SpeedStep(TM) for this chipset not (yet) available.\n");
+                dprintk("Intel(R) SpeedStep(TM) for this chipset not "
+                                "(yet) available.\n");
                 return -ENODEV;
         }
 
@@ -431,9 +433,11 @@ static void __exit speedstep_exit(void)
 }
 
 
-MODULE_AUTHOR ("Dave Jones <davej@redhat.com>, Dominik Brodowski <linux@brodo.de>");
-MODULE_DESCRIPTION ("Speedstep driver for Intel mobile processors on chipsets with ICH-M southbridges.");
-MODULE_LICENSE ("GPL");
+MODULE_AUTHOR("Dave Jones <davej@redhat.com>, "
+                "Dominik Brodowski <linux@brodo.de>");
+MODULE_DESCRIPTION("Speedstep driver for Intel mobile processors on chipsets "
+                "with ICH-M southbridges.");
+MODULE_LICENSE("GPL");
 
 module_init(speedstep_init);
 module_exit(speedstep_exit);
diff --git a/arch/x86/kernel/cpu/cpufreq/speedstep-lib.c b/arch/x86/kernel/cpu/cpufreq/speedstep-lib.c
index cdac7d62369b..2e3c6862657b 100644
--- a/arch/x86/kernel/cpu/cpufreq/speedstep-lib.c
+++ b/arch/x86/kernel/cpu/cpufreq/speedstep-lib.c
@@ -16,12 +16,16 @@
 #include <linux/slab.h>
 
 #include <asm/msr.h>
+#include <asm/tsc.h>
 #include "speedstep-lib.h"
 
-#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, "speedstep-lib", msg)
+#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, \
+                "speedstep-lib", msg)
+
+#define PFX "speedstep-lib: "
 
 #ifdef CONFIG_X86_SPEEDSTEP_RELAXED_CAP_CHECK
-static int relaxed_check = 0;
+static int relaxed_check;
 #else
 #define relaxed_check 0
 #endif
@@ -30,14 +34,14 @@ static int relaxed_check = 0;
  *                   GET PROCESSOR CORE SPEED IN KHZ                 *
  *********************************************************************/
 
-static unsigned int pentium3_get_frequency (unsigned int processor)
+static unsigned int pentium3_get_frequency(unsigned int processor)
 {
-        /* See table 14 of p3_ds.pdf and table 22 of 29834003.pdf */
+        /* See table 14 of p3_ds.pdf and table 22 of 29834003.pdf */
         struct {
                 unsigned int ratio;     /* Frequency Multiplier (x10) */
                 u8 bitmap;              /* power on configuration bits
                                         [27, 25:22] (in MSR 0x2a) */
-        } msr_decode_mult [] = {
+        } msr_decode_mult[] = {
                 { 30, 0x01 },
                 { 35, 0x05 },
                 { 40, 0x02 },
@@ -52,7 +56,7 @@ static unsigned int pentium3_get_frequency (unsigned int processor)
                 { 85, 0x26 },
                 { 90, 0x20 },
                 { 100, 0x2b },
-                { 0, 0xff }     /* error or unknown value */
+                { 0, 0xff }     /* error or unknown value */
         };
 
         /* PIII(-M) FSB settings: see table b1-b of 24547206.pdf */
@@ -60,7 +64,7 @@ static unsigned int pentium3_get_frequency (unsigned int processor)
                 unsigned int value;     /* Front Side Bus speed in MHz */
                 u8 bitmap;              /* power on configuration bits [18: 19]
                                         (in MSR 0x2a) */
-        } msr_decode_fsb [] = {
+        } msr_decode_fsb[] = {
                 {  66, 0x0 },
                 { 100, 0x2 },
                 { 133, 0x1 },
@@ -85,7 +89,7 @@ static unsigned int pentium3_get_frequency (unsigned int processor)
         }
 
         /* decode the multiplier */
-        if (processor == SPEEDSTEP_PROCESSOR_PIII_C_EARLY) {
+        if (processor == SPEEDSTEP_CPU_PIII_C_EARLY) {
                 dprintk("workaround for early PIIIs\n");
                 msr_lo &= 0x03c00000;
         } else
@@ -97,9 +101,10 @@ static unsigned int pentium3_get_frequency (unsigned int processor)
                 j++;
         }
 
-        dprintk("speed is %u\n", (msr_decode_mult[j].ratio * msr_decode_fsb[i].value * 100));
+        dprintk("speed is %u\n",
+                (msr_decode_mult[j].ratio * msr_decode_fsb[i].value * 100));
 
-        return (msr_decode_mult[j].ratio * msr_decode_fsb[i].value * 100);
+        return msr_decode_mult[j].ratio * msr_decode_fsb[i].value * 100;
 }
 
 
@@ -112,20 +117,23 @@ static unsigned int pentiumM_get_frequency(void)
 
         /* see table B-2 of 24547212.pdf */
         if (msr_lo & 0x00040000) {
-                printk(KERN_DEBUG "speedstep-lib: PM - invalid FSB: 0x%x 0x%x\n", msr_lo, msr_tmp);
+                printk(KERN_DEBUG PFX "PM - invalid FSB: 0x%x 0x%x\n",
+                                msr_lo, msr_tmp);
                 return 0;
         }
 
         msr_tmp = (msr_lo >> 22) & 0x1f;
-        dprintk("bits 22-26 are 0x%x, speed is %u\n", msr_tmp, (msr_tmp * 100 * 1000));
+        dprintk("bits 22-26 are 0x%x, speed is %u\n",
+                        msr_tmp, (msr_tmp * 100 * 1000));
 
-        return (msr_tmp * 100 * 1000);
+        return msr_tmp * 100 * 1000;
 }
 
 static unsigned int pentium_core_get_frequency(void)
 {
         u32 fsb = 0;
         u32 msr_lo, msr_tmp;
+        int ret;
 
         rdmsr(MSR_FSB_FREQ, msr_lo, msr_tmp);
         /* see table B-2 of 25366920.pdf */
@@ -153,12 +161,15 @@ static unsigned int pentium_core_get_frequency(void)
         }
 
         rdmsr(MSR_IA32_EBL_CR_POWERON, msr_lo, msr_tmp);
-        dprintk("PCORE - MSR_IA32_EBL_CR_POWERON: 0x%x 0x%x\n", msr_lo, msr_tmp);
+        dprintk("PCORE - MSR_IA32_EBL_CR_POWERON: 0x%x 0x%x\n",
+                        msr_lo, msr_tmp);
 
         msr_tmp = (msr_lo >> 22) & 0x1f;
-        dprintk("bits 22-26 are 0x%x, speed is %u\n", msr_tmp, (msr_tmp * fsb));
+        dprintk("bits 22-26 are 0x%x, speed is %u\n",
+                        msr_tmp, (msr_tmp * fsb));
 
-        return (msr_tmp * fsb);
+        ret = (msr_tmp * fsb);
+        return ret;
 }
 
 
@@ -167,6 +178,16 @@ static unsigned int pentium4_get_frequency(void)
         struct cpuinfo_x86 *c = &boot_cpu_data;
         u32 msr_lo, msr_hi, mult;
         unsigned int fsb = 0;
+        unsigned int ret;
+        u8 fsb_code;
+
+        /* Pentium 4 Model 0 and 1 do not have the Core Clock Frequency
+         * to System Bus Frequency Ratio Field in the Processor Frequency
+         * Configuration Register of the MSR. Therefore the current
+         * frequency cannot be calculated and has to be measured.
+         */
+        if (c->x86_model < 2)
+                return cpu_khz;
 
         rdmsr(0x2c, msr_lo, msr_hi);
 
@@ -177,62 +198,61 @@ static unsigned int pentium4_get_frequency(void)
          * revision #12 in Table B-1: MSRs in the Pentium 4 and
          * Intel Xeon Processors, on page B-4 and B-5.
          */
-        if (c->x86_model < 2)
+        fsb_code = (msr_lo >> 16) & 0x7;
+        switch (fsb_code) {
+        case 0:
                 fsb = 100 * 1000;
-        else {
-                u8 fsb_code = (msr_lo >> 16) & 0x7;
-                switch (fsb_code) {
-                case 0:
-                        fsb = 100 * 1000;
-                        break;
-                case 1:
-                        fsb = 13333 * 10;
-                        break;
-                case 2:
-                        fsb = 200 * 1000;
-                        break;
-                }
+                break;
+        case 1:
+                fsb = 13333 * 10;
+                break;
+        case 2:
+                fsb = 200 * 1000;
+                break;
         }
 
         if (!fsb)
-                printk(KERN_DEBUG "speedstep-lib: couldn't detect FSB speed. Please send an e-mail to <linux@brodo.de>\n");
+                printk(KERN_DEBUG PFX "couldn't detect FSB speed. "
+                                "Please send an e-mail to <linux@brodo.de>\n");
 
         /* Multiplier. */
         mult = msr_lo >> 24;
 
-        dprintk("P4 - FSB %u kHz; Multiplier %u; Speed %u kHz\n", fsb, mult, (fsb * mult));
+        dprintk("P4 - FSB %u kHz; Multiplier %u; Speed %u kHz\n",
+                        fsb, mult, (fsb * mult));
 
-        return (fsb * mult);
+        ret = (fsb * mult);
+        return ret;
 }
 
 
-unsigned int speedstep_get_processor_frequency(unsigned int processor)
+unsigned int speedstep_get_frequency(unsigned int processor)
 {
         switch (processor) {
-        case SPEEDSTEP_PROCESSOR_PCORE:
+        case SPEEDSTEP_CPU_PCORE:
                 return pentium_core_get_frequency();
-        case SPEEDSTEP_PROCESSOR_PM:
+        case SPEEDSTEP_CPU_PM:
                 return pentiumM_get_frequency();
-        case SPEEDSTEP_PROCESSOR_P4D:
-        case SPEEDSTEP_PROCESSOR_P4M:
+        case SPEEDSTEP_CPU_P4D:
+        case SPEEDSTEP_CPU_P4M:
                 return pentium4_get_frequency();
-        case SPEEDSTEP_PROCESSOR_PIII_T:
-        case SPEEDSTEP_PROCESSOR_PIII_C:
-        case SPEEDSTEP_PROCESSOR_PIII_C_EARLY:
+        case SPEEDSTEP_CPU_PIII_T:
+        case SPEEDSTEP_CPU_PIII_C:
+        case SPEEDSTEP_CPU_PIII_C_EARLY:
                 return pentium3_get_frequency(processor);
         default:
                 return 0;
         };
         return 0;
 }
-EXPORT_SYMBOL_GPL(speedstep_get_processor_frequency);
+EXPORT_SYMBOL_GPL(speedstep_get_frequency);
 
 
 /*********************************************************************
  *                 DETECT SPEEDSTEP-CAPABLE PROCESSOR                *
  *********************************************************************/
 
-unsigned int speedstep_detect_processor (void)
+unsigned int speedstep_detect_processor(void)
 {
         struct cpuinfo_x86 *c = &cpu_data(0);
         u32 ebx, msr_lo, msr_hi;
@@ -261,7 +281,7 @@ unsigned int speedstep_detect_processor (void)
                          * sample has ebx = 0x0f, production has 0x0e.
                          */
                         if ((ebx == 0x0e) || (ebx == 0x0f))
-                                return SPEEDSTEP_PROCESSOR_P4M;
+                                return SPEEDSTEP_CPU_P4M;
                         break;
                 case 7:
                         /*
@@ -272,7 +292,7 @@ unsigned int speedstep_detect_processor (void)
                          * samples are only of B-stepping...
                          */
                         if (ebx == 0x0e)
-                                return SPEEDSTEP_PROCESSOR_P4M;
+                                return SPEEDSTEP_CPU_P4M;
                         break;
                 case 9:
                         /*
@@ -288,10 +308,13 @@ unsigned int speedstep_detect_processor (void)
                          * M-P4-Ms may have either ebx=0xe or 0xf [see above]
                          * M-P4/533 have either ebx=0xe or 0xf. [25317607.pdf]
                          * also, M-P4M HTs have ebx=0x8, too
-                         * For now, they are distinguished by the model_id string
+                         * For now, they are distinguished by the model_id
+                         * string
                          */
-                        if ((ebx == 0x0e) || (strstr(c->x86_model_id,"Mobile Intel(R) Pentium(R) 4") != NULL))
-                                return SPEEDSTEP_PROCESSOR_P4M;
+                        if ((ebx == 0x0e) ||
+                                (strstr(c->x86_model_id,
+                                    "Mobile Intel(R) Pentium(R) 4") != NULL))
+                                return SPEEDSTEP_CPU_P4M;
                         break;
                 default:
                         break;
@@ -301,7 +324,8 @@ unsigned int speedstep_detect_processor (void)
 
         switch (c->x86_model) {
         case 0x0B: /* Intel PIII [Tualatin] */
-                /* cpuid_ebx(1) is 0x04 for desktop PIII, 0x06 for mobile PIII-M */
+                /* cpuid_ebx(1) is 0x04 for desktop PIII,
+                 * 0x06 for mobile PIII-M */
                 ebx = cpuid_ebx(0x00000001);
                 dprintk("ebx is %x\n", ebx);
 
@@ -313,14 +337,15 @@ unsigned int speedstep_detect_processor (void)
                 /* So far all PIII-M processors support SpeedStep. See
                  * Intel's 24540640.pdf of June 2003
                  */
-                return SPEEDSTEP_PROCESSOR_PIII_T;
+                return SPEEDSTEP_CPU_PIII_T;
 
         case 0x08: /* Intel PIII [Coppermine] */
 
                 /* all mobile PIII Coppermines have FSB 100 MHz
                  * ==> sort out a few desktop PIIIs. */
                 rdmsr(MSR_IA32_EBL_CR_POWERON, msr_lo, msr_hi);
-                dprintk("Coppermine: MSR_IA32_EBL_CR_POWERON is 0x%x, 0x%x\n", msr_lo, msr_hi);
+                dprintk("Coppermine: MSR_IA32_EBL_CR_POWERON is 0x%x, 0x%x\n",
+                                msr_lo, msr_hi);
                 msr_lo &= 0x00c0000;
                 if (msr_lo != 0x0080000)
                         return 0;
@@ -332,13 +357,15 @@ unsigned int speedstep_detect_processor (void)
                  * bit 56 or 57 is set
                  */
                 rdmsr(MSR_IA32_PLATFORM_ID, msr_lo, msr_hi);
-                dprintk("Coppermine: MSR_IA32_PLATFORM ID is 0x%x, 0x%x\n", msr_lo, msr_hi);
-                if ((msr_hi & (1<<18)) && (relaxed_check ? 1 : (msr_hi & (3<<24)))) {
+                dprintk("Coppermine: MSR_IA32_PLATFORM ID is 0x%x, 0x%x\n",
+                                msr_lo, msr_hi);
+                if ((msr_hi & (1<<18)) &&
+                    (relaxed_check ? 1 : (msr_hi & (3<<24)))) {
                         if (c->x86_mask == 0x01) {
                                 dprintk("early PIII version\n");
-                                return SPEEDSTEP_PROCESSOR_PIII_C_EARLY;
+                                return SPEEDSTEP_CPU_PIII_C_EARLY;
                         } else
-                                return SPEEDSTEP_PROCESSOR_PIII_C;
+                                return SPEEDSTEP_CPU_PIII_C;
                 }
 
         default:
@@ -369,7 +396,7 @@ unsigned int speedstep_get_freqs(unsigned int processor,
         dprintk("trying to determine both speeds\n");
 
         /* get current speed */
-        prev_speed = speedstep_get_processor_frequency(processor);
+        prev_speed = speedstep_get_frequency(processor);
         if (!prev_speed)
                 return -EIO;
 
@@ -379,7 +406,7 @@ unsigned int speedstep_get_freqs(unsigned int processor,
 
         /* switch to low state */
         set_state(SPEEDSTEP_LOW);
-        *low_speed = speedstep_get_processor_frequency(processor);
+        *low_speed = speedstep_get_frequency(processor);
         if (!*low_speed) {
                 ret = -EIO;
                 goto out;
@@ -398,7 +425,7 @@ unsigned int speedstep_get_freqs(unsigned int processor,
         if (transition_latency)
                 do_gettimeofday(&tv2);
 
-        *high_speed = speedstep_get_processor_frequency(processor);
+        *high_speed = speedstep_get_frequency(processor);
         if (!*high_speed) {
                 ret = -EIO;
                 goto out;
@@ -426,9 +453,12 @@ unsigned int speedstep_get_freqs(unsigned int processor,
                 /* check if the latency measurement is too high or too low
                  * and set it to a safe value (500uSec) in that case
                  */
-                if (*transition_latency > 10000000 || *transition_latency < 50000) {
-                        printk (KERN_WARNING "speedstep: frequency transition measured seems out of "
-                                        "range (%u nSec), falling back to a safe one of %u nSec.\n",
+                if (*transition_latency > 10000000 ||
+                    *transition_latency < 50000) {
+                        printk(KERN_WARNING PFX "frequency transition "
+                                        "measured seems out of range (%u "
+                                        "nSec), falling back to a safe one of"
+                                        "%u nSec.\n",
                                         *transition_latency, 500000);
                         *transition_latency = 500000;
                 }
@@ -436,15 +466,16 @@ unsigned int speedstep_get_freqs(unsigned int processor,
 
 out:
         local_irq_restore(flags);
-        return (ret);
+        return ret;
 }
 EXPORT_SYMBOL_GPL(speedstep_get_freqs);
 
 #ifdef CONFIG_X86_SPEEDSTEP_RELAXED_CAP_CHECK
 module_param(relaxed_check, int, 0444);
-MODULE_PARM_DESC(relaxed_check, "Don't do all checks for speedstep capability.");
+MODULE_PARM_DESC(relaxed_check,
+                "Don't do all checks for speedstep capability.");
 #endif
 
-MODULE_AUTHOR ("Dominik Brodowski <linux@brodo.de>");
-MODULE_DESCRIPTION ("Library for Intel SpeedStep 1 or 2 cpufreq drivers.");
-MODULE_LICENSE ("GPL");
+MODULE_AUTHOR("Dominik Brodowski <linux@brodo.de>");
+MODULE_DESCRIPTION("Library for Intel SpeedStep 1 or 2 cpufreq drivers.");
+MODULE_LICENSE("GPL");
diff --git a/arch/x86/kernel/cpu/cpufreq/speedstep-lib.h b/arch/x86/kernel/cpu/cpufreq/speedstep-lib.h
index b11bcc608cac..2b6c04e5a304 100644
--- a/arch/x86/kernel/cpu/cpufreq/speedstep-lib.h
+++ b/arch/x86/kernel/cpu/cpufreq/speedstep-lib.h
@@ -12,17 +12,17 @@
 
 /* processors */
 
-#define SPEEDSTEP_PROCESSOR_PIII_C_EARLY        0x00000001  /* Coppermine core */
-#define SPEEDSTEP_PROCESSOR_PIII_C              0x00000002  /* Coppermine core */
-#define SPEEDSTEP_PROCESSOR_PIII_T              0x00000003  /* Tualatin core */
-#define SPEEDSTEP_PROCESSOR_P4M                 0x00000004  /* P4-M  */
+#define SPEEDSTEP_CPU_PIII_C_EARLY      0x00000001  /* Coppermine core */
+#define SPEEDSTEP_CPU_PIII_C            0x00000002  /* Coppermine core */
+#define SPEEDSTEP_CPU_PIII_T            0x00000003  /* Tualatin core */
+#define SPEEDSTEP_CPU_P4M               0x00000004  /* P4-M  */
 
 /* the following processors are not speedstep-capable and are not auto-detected
  * in speedstep_detect_processor(). However, their speed can be detected using
- * the speedstep_get_processor_frequency() call. */
-#define SPEEDSTEP_PROCESSOR_PM                  0xFFFFFF03  /* Pentium M  */
-#define SPEEDSTEP_PROCESSOR_P4D                 0xFFFFFF04  /* desktop P4  */
-#define SPEEDSTEP_PROCESSOR_PCORE               0xFFFFFF05  /* Core */
+ * the speedstep_get_frequency() call. */
+#define SPEEDSTEP_CPU_PM                0xFFFFFF03  /* Pentium M  */
+#define SPEEDSTEP_CPU_P4D               0xFFFFFF04  /* desktop P4  */
+#define SPEEDSTEP_CPU_PCORE             0xFFFFFF05  /* Core */
 
 /* speedstep states -- only two of them */
 
@@ -34,7 +34,7 @@
 extern unsigned int speedstep_detect_processor (void);
 
 /* detect the current speed (in khz) of the processor */
-extern unsigned int speedstep_get_processor_frequency(unsigned int processor);
+extern unsigned int speedstep_get_frequency(unsigned int processor);
 
 
 /* detect the low and high speeds of the processor. The callback
diff --git a/arch/x86/kernel/cpu/cpufreq/speedstep-smi.c b/arch/x86/kernel/cpu/cpufreq/speedstep-smi.c
index 8a85c93bd62a..befea088e4f5 100644
--- a/arch/x86/kernel/cpu/cpufreq/speedstep-smi.c
+++ b/arch/x86/kernel/cpu/cpufreq/speedstep-smi.c
@@ -19,8 +19,8 @@
 #include <linux/cpufreq.h>
 #include <linux/slab.h>
 #include <linux/delay.h>
+#include <linux/io.h>
 #include <asm/ist.h>
-#include <asm/io.h>
 
 #include "speedstep-lib.h"
 
@@ -30,12 +30,12 @@
  * If user gives it, these are used.
  *
  */
-static int smi_port = 0;
-static int smi_cmd = 0;
-static unsigned int smi_sig = 0;
+static int smi_port;
+static int smi_cmd;
+static unsigned int smi_sig;
 
 /* info about the processor */
-static unsigned int speedstep_processor = 0;
+static unsigned int speedstep_processor;
 
 /*
  * There are only two frequency states for each processor. Values
@@ -56,12 +56,13 @@ static struct cpufreq_frequency_table speedstep_freqs[] = {
  * of DMA activity going on? */
 #define SMI_TRIES 5
 
-#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, "speedstep-smi", msg)
+#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, \
+                "speedstep-smi", msg)
 
 /**
  * speedstep_smi_ownership
  */
-static int speedstep_smi_ownership (void)
+static int speedstep_smi_ownership(void)
 {
         u32 command, result, magic, dummy;
         u32 function = GET_SPEEDSTEP_OWNER;
@@ -70,16 +71,18 @@ static int speedstep_smi_ownership (void)
         command = (smi_sig & 0xffffff00) | (smi_cmd & 0xff);
         magic = virt_to_phys(magic_data);
 
-        dprintk("trying to obtain ownership with command %x at port %x\n", command, smi_port);
+        dprintk("trying to obtain ownership with command %x at port %x\n",
+                        command, smi_port);
 
         __asm__ __volatile__(
                 "push %%ebp\n"
                 "out %%al, (%%dx)\n"
                 "pop %%ebp\n"
-                : "=D" (result), "=a" (dummy), "=b" (dummy), "=c" (dummy), "=d" (dummy),
-                        "=S" (dummy)
+                : "=D" (result),
+                  "=a" (dummy), "=b" (dummy), "=c" (dummy), "=d" (dummy),
+                  "=S" (dummy)
                 : "a" (command), "b" (function), "c" (0), "d" (smi_port),
-                        "D" (0), "S" (magic)
+                  "D" (0), "S" (magic)
                 : "memory"
         );
 
@@ -97,10 +100,10 @@ static int speedstep_smi_ownership (void)
  * even hangs [cf. bugme.osdl.org # 1422] on earlier systems. Empirical testing
  * shows that the latter occurs if !(ist_info.event & 0xFFFF).
  */
-static int speedstep_smi_get_freqs (unsigned int *low, unsigned int *high)
+static int speedstep_smi_get_freqs(unsigned int *low, unsigned int *high)
 {
         u32 command, result = 0, edi, high_mhz, low_mhz, dummy;
-        u32 state=0;
+        u32 state = 0;
         u32 function = GET_SPEEDSTEP_FREQS;
 
         if (!(ist_info.event & 0xFFFF)) {
@@ -110,17 +113,25 @@ static int speedstep_smi_get_freqs (unsigned int *low, unsigned int *high)
 
         command = (smi_sig & 0xffffff00) | (smi_cmd & 0xff);
 
-        dprintk("trying to determine frequencies with command %x at port %x\n", command, smi_port);
+        dprintk("trying to determine frequencies with command %x at port %x\n",
+                        command, smi_port);
 
         __asm__ __volatile__(
                 "push %%ebp\n"
                 "out %%al, (%%dx)\n"
                 "pop %%ebp"
-                : "=a" (result), "=b" (high_mhz), "=c" (low_mhz), "=d" (state), "=D" (edi), "=S" (dummy)
-                : "a" (command), "b" (function), "c" (state), "d" (smi_port), "S" (0), "D" (0)
+                : "=a" (result),
+                  "=b" (high_mhz),
+                  "=c" (low_mhz),
+                  "=d" (state), "=D" (edi), "=S" (dummy)
+                : "a" (command),
+                  "b" (function),
+                  "c" (state),
+                  "d" (smi_port), "S" (0), "D" (0)
         );
 
-        dprintk("result %x, low_freq %u, high_freq %u\n", result, low_mhz, high_mhz);
+        dprintk("result %x, low_freq %u, high_freq %u\n",
+                        result, low_mhz, high_mhz);
 
         /* abort if results are obviously incorrect... */
         if ((high_mhz + low_mhz) < 600)
@@ -137,26 +148,30 @@ static int speedstep_smi_get_freqs (unsigned int *low, unsigned int *high)
  * @state: processor frequency state (SPEEDSTEP_LOW or SPEEDSTEP_HIGH)
  *
  */
-static int speedstep_get_state (void)
+static int speedstep_get_state(void)
 {
-        u32 function=GET_SPEEDSTEP_STATE;
+        u32 function = GET_SPEEDSTEP_STATE;
         u32 result, state, edi, command, dummy;
 
         command = (smi_sig & 0xffffff00) | (smi_cmd & 0xff);
 
-        dprintk("trying to determine current setting with command %x at port %x\n", command, smi_port);
+        dprintk("trying to determine current setting with command %x "
+                "at port %x\n", command, smi_port);
 
         __asm__ __volatile__(
                 "push %%ebp\n"
                 "out %%al, (%%dx)\n"
                 "pop %%ebp\n"
-                : "=a" (result), "=b" (state), "=D" (edi), "=c" (dummy), "=d" (dummy), "=S" (dummy)
-                : "a" (command), "b" (function), "c" (0), "d" (smi_port), "S" (0), "D" (0)
+                : "=a" (result),
+                  "=b" (state), "=D" (edi),
+                  "=c" (dummy), "=d" (dummy), "=S" (dummy)
+                : "a" (command), "b" (function), "c" (0),
+                  "d" (smi_port), "S" (0), "D" (0)
         );
 
         dprintk("state is %x, result is %x\n", state, result);
 
-        return (state & 1);
+        return state & 1;
 }
 
 
@@ -165,11 +180,11 @@ static int speedstep_get_state (void)
  * @state: new processor frequency state (SPEEDSTEP_LOW or SPEEDSTEP_HIGH)
  *
  */
-static void speedstep_set_state (unsigned int state)
+static void speedstep_set_state(unsigned int state)
 {
         unsigned int result = 0, command, new_state, dummy;
         unsigned long flags;
-        unsigned int function=SET_SPEEDSTEP_STATE;
+        unsigned int function = SET_SPEEDSTEP_STATE;
         unsigned int retry = 0;
 
         if (state > 0x1)
@@ -180,11 +195,14 @@ static void speedstep_set_state (unsigned int state)
 
         command = (smi_sig & 0xffffff00) | (smi_cmd & 0xff);
 
-        dprintk("trying to set frequency to state %u with command %x at port %x\n", state, command, smi_port);
+        dprintk("trying to set frequency to state %u "
+                "with command %x at port %x\n",
+                state, command, smi_port);
 
         do {
                 if (retry) {
-                        dprintk("retry %u, previous result %u, waiting...\n", retry, result);
+                        dprintk("retry %u, previous result %u, waiting...\n",
+                                        retry, result);
                         mdelay(retry * 50);
                 }
                 retry++;
@@ -192,20 +210,26 @@ static void speedstep_set_state (unsigned int state)
                         "push %%ebp\n"
                         "out %%al, (%%dx)\n"
                         "pop %%ebp"
-                        : "=b" (new_state), "=D" (result), "=c" (dummy), "=a" (dummy),
-                                "=d" (dummy), "=S" (dummy)
-                        : "a" (command), "b" (function), "c" (state), "d" (smi_port), "S" (0), "D" (0)
+                        : "=b" (new_state), "=D" (result),
+                          "=c" (dummy), "=a" (dummy),
+                          "=d" (dummy), "=S" (dummy)
+                        : "a" (command), "b" (function), "c" (state),
+                          "d" (smi_port), "S" (0), "D" (0)
                         );
         } while ((new_state != state) && (retry <= SMI_TRIES));
 
         /* enable IRQs */
         local_irq_restore(flags);
 
-        if (new_state == state) {
-                dprintk("change to %u MHz succeeded after %u tries with result %u\n", (speedstep_freqs[new_state].frequency / 1000), retry, result);
-        } else {
-                printk(KERN_ERR "cpufreq: change to state %u failed with new_state %u and result %u\n", state, new_state, result);
-        }
+        if (new_state == state)
+                dprintk("change to %u MHz succeeded after %u tries "
+                        "with result %u\n",
+                        (speedstep_freqs[new_state].frequency / 1000),
+                        retry, result);
+        else
+                printk(KERN_ERR "cpufreq: change to state %u "
+                        "failed with new_state %u and result %u\n",
+                        state, new_state, result);
 
         return;
 }
@@ -219,13 +243,14 @@ static void speedstep_set_state (unsigned int state)
  *
  * Sets a new CPUFreq policy/freq.
  */
-static int speedstep_target (struct cpufreq_policy *policy,
+static int speedstep_target(struct cpufreq_policy *policy,
                         unsigned int target_freq, unsigned int relation)
 {
         unsigned int newstate = 0;
         struct cpufreq_freqs freqs;
 
-        if (cpufreq_frequency_table_target(policy, &speedstep_freqs[0], target_freq, relation, &newstate))
+        if (cpufreq_frequency_table_target(policy, &speedstep_freqs[0],
+                                target_freq, relation, &newstate))
                 return -EINVAL;
 
         freqs.old = speedstep_freqs[speedstep_get_state()].frequency;
@@ -250,7 +275,7 @@ static int speedstep_target (struct cpufreq_policy *policy,
  * Limit must be within speedstep_low_freq and speedstep_high_freq, with
  * at least one border included.
  */
-static int speedstep_verify (struct cpufreq_policy *policy)
+static int speedstep_verify(struct cpufreq_policy *policy)
 {
         return cpufreq_frequency_table_verify(policy, &speedstep_freqs[0]);
 }
@@ -259,7 +284,8 @@ static int speedstep_verify (struct cpufreq_policy *policy)
 static int speedstep_cpu_init(struct cpufreq_policy *policy)
 {
         int result;
-        unsigned int speed,state;
+        unsigned int speed, state;
+        unsigned int *low, *high;
 
         /* capability check */
         if (policy->cpu != 0)
@@ -272,19 +298,23 @@ static int speedstep_cpu_init(struct cpufreq_policy *policy)
         }
 
         /* detect low and high frequency */
-        result = speedstep_smi_get_freqs(&speedstep_freqs[SPEEDSTEP_LOW].frequency,
-                                &speedstep_freqs[SPEEDSTEP_HIGH].frequency);
+        low = &speedstep_freqs[SPEEDSTEP_LOW].frequency;
+        high = &speedstep_freqs[SPEEDSTEP_HIGH].frequency;
+
+        result = speedstep_smi_get_freqs(low, high);
         if (result) {
-                /* fall back to speedstep_lib.c dection mechanism: try both states out */
-                dprintk("could not detect low and high frequencies by SMI call.\n");
+                /* fall back to speedstep_lib.c dection mechanism:
+                 * try both states out */
+                dprintk("could not detect low and high frequencies "
+                                "by SMI call.\n");
                 result = speedstep_get_freqs(speedstep_processor,
-                                &speedstep_freqs[SPEEDSTEP_LOW].frequency,
-                                &speedstep_freqs[SPEEDSTEP_HIGH].frequency,
+                                low, high,
                                 NULL,
                                 &speedstep_set_state);
 
                 if (result) {
-                        dprintk("could not detect two different speeds -- aborting.\n");
+                        dprintk("could not detect two different speeds"
+                                        " -- aborting.\n");
                         return result;
                 } else
                         dprintk("workaround worked.\n");
@@ -295,7 +325,8 @@ static int speedstep_cpu_init(struct cpufreq_policy *policy)
         speed = speedstep_freqs[state].frequency;
 
         dprintk("currently at %s speed setting - %i MHz\n",
-                (speed == speedstep_freqs[SPEEDSTEP_LOW].frequency) ? "low" : "high",
+                (speed == speedstep_freqs[SPEEDSTEP_LOW].frequency)
+                ? "low" : "high",
                 (speed / 1000));
 
         /* cpuinfo and default policy values */
@@ -304,7 +335,7 @@ static int speedstep_cpu_init(struct cpufreq_policy *policy)
 
         result = cpufreq_frequency_table_cpuinfo(policy, speedstep_freqs);
         if (result)
-                return (result);
+                return result;
 
         cpufreq_frequency_table_get_attr(speedstep_freqs, policy->cpu);
 
@@ -321,7 +352,7 @@ static unsigned int speedstep_get(unsigned int cpu)
 {
         if (cpu)
                 return -ENODEV;
-        return speedstep_get_processor_frequency(speedstep_processor);
+        return speedstep_get_frequency(speedstep_processor);
 }
 
 
@@ -335,7 +366,7 @@ static int speedstep_resume(struct cpufreq_policy *policy)
         return result;
 }
 
-static struct freq_attr* speedstep_attr[] = {
+static struct freq_attr *speedstep_attr[] = {
         &cpufreq_freq_attr_scaling_available_freqs,
         NULL,
 };
@@ -364,21 +395,23 @@ static int __init speedstep_init(void)
         speedstep_processor = speedstep_detect_processor();
 
         switch (speedstep_processor) {
-        case SPEEDSTEP_PROCESSOR_PIII_T:
-        case SPEEDSTEP_PROCESSOR_PIII_C:
-        case SPEEDSTEP_PROCESSOR_PIII_C_EARLY:
+        case SPEEDSTEP_CPU_PIII_T:
+        case SPEEDSTEP_CPU_PIII_C:
+        case SPEEDSTEP_CPU_PIII_C_EARLY:
                 break;
         default:
                 speedstep_processor = 0;
         }
 
         if (!speedstep_processor) {
-                dprintk ("No supported Intel CPU detected.\n");
+                dprintk("No supported Intel CPU detected.\n");
                 return -ENODEV;
         }
 
-        dprintk("signature:0x%.8lx, command:0x%.8lx, event:0x%.8lx, perf_level:0x%.8lx.\n",
-                ist_info.signature, ist_info.command, ist_info.event, ist_info.perf_level);
+        dprintk("signature:0x%.8lx, command:0x%.8lx, "
+                "event:0x%.8lx, perf_level:0x%.8lx.\n",
+                ist_info.signature, ist_info.command,
+                ist_info.event, ist_info.perf_level);
 
         /* Error if no IST-SMI BIOS or no PARM
                  sig= 'ISGE' aka 'Intel Speedstep Gate E' */
@@ -416,17 +449,20 @@ static void __exit speedstep_exit(void)
         cpufreq_unregister_driver(&speedstep_driver);
 }
 
-module_param(smi_port,  int, 0444);
-module_param(smi_cmd,   int, 0444);
-module_param(smi_sig,  uint, 0444);
+module_param(smi_port, int, 0444);
+module_param(smi_cmd,  int, 0444);
+module_param(smi_sig, uint, 0444);
 
-MODULE_PARM_DESC(smi_port, "Override the BIOS-given IST port with this value -- Intel's default setting is 0xb2");
-MODULE_PARM_DESC(smi_cmd, "Override the BIOS-given IST command with this value -- Intel's default setting is 0x82");
-MODULE_PARM_DESC(smi_sig, "Set to 1 to fake the IST signature when using the SMI interface.");
+MODULE_PARM_DESC(smi_port, "Override the BIOS-given IST port with this value "
+                "-- Intel's default setting is 0xb2");
+MODULE_PARM_DESC(smi_cmd, "Override the BIOS-given IST command with this value "
+                "-- Intel's default setting is 0x82");
+MODULE_PARM_DESC(smi_sig, "Set to 1 to fake the IST signature when using the "
+                "SMI interface.");
 
-MODULE_AUTHOR ("Hiroshi Miura");
-MODULE_DESCRIPTION ("Speedstep driver for IST applet SMI interface.");
-MODULE_LICENSE ("GPL");
+MODULE_AUTHOR("Hiroshi Miura");
+MODULE_DESCRIPTION("Speedstep driver for IST applet SMI interface.");
+MODULE_LICENSE("GPL");
 
 module_init(speedstep_init);
 module_exit(speedstep_exit);
diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c
index 24ff26a38ade..1a89a2b68d15 100644
--- a/arch/x86/kernel/cpu/intel.c
+++ b/arch/x86/kernel/cpu/intel.c
@@ -4,6 +4,7 @@
 #include <linux/string.h>
 #include <linux/bitops.h>
 #include <linux/smp.h>
+#include <linux/sched.h>
 #include <linux/thread_info.h>
 #include <linux/module.h>
 
@@ -24,7 +25,6 @@
 #ifdef CONFIG_X86_LOCAL_APIC
 #include <asm/mpspec.h>
 #include <asm/apic.h>
-#include <mach_apic.h>
 #endif
 
 static void __cpuinit early_init_intel(struct cpuinfo_x86 *c)
@@ -56,13 +56,30 @@ static void __cpuinit early_init_intel(struct cpuinfo_x86 *c)
 
         /*
          * c->x86_power is 8000_0007 edx. Bit 8 is TSC runs at constant rate
-         * with P/T states and does not stop in deep C-states
+         * with P/T states and does not stop in deep C-states.
+         *
+         * It is also reliable across cores and sockets. (but not across
+         * cabinets - we turn it off in that case explicitly.)
          */
         if (c->x86_power & (1 << 8)) {
                 set_cpu_cap(c, X86_FEATURE_CONSTANT_TSC);
                 set_cpu_cap(c, X86_FEATURE_NONSTOP_TSC);
+                set_cpu_cap(c, X86_FEATURE_TSC_RELIABLE);
+                sched_clock_stable = 1;
         }
 
+        /*
+         * There is a known erratum on Pentium III and Core Solo
+         * and Core Duo CPUs.
+         * " Page with PAT set to WC while associated MTRR is UC
+         *   may consolidate to UC "
+         * Because of this erratum, it is better to stick with
+         * setting WC in MTRR rather than using PAT on these CPUs.
+         *
+         * Enable PAT WC only on P4, Core 2 or later CPUs.
+         */
+        if (c->x86 == 6 && c->x86_model < 15)
+                clear_cpu_cap(c, X86_FEATURE_PAT);
 }
 
 #ifdef CONFIG_X86_32
@@ -135,10 +152,10 @@ static void __cpuinit intel_workarounds(struct cpuinfo_x86 *c)
          */
         if ((c->x86 == 15) && (c->x86_model == 1) && (c->x86_mask == 1)) {
                 rdmsr(MSR_IA32_MISC_ENABLE, lo, hi);
-                if ((lo & (1<<9)) == 0) {
+                if ((lo & MSR_IA32_MISC_ENABLE_PREFETCH_DISABLE) == 0) {
                         printk (KERN_INFO "CPU: C0 stepping P4 Xeon detected.\n");
                         printk (KERN_INFO "CPU: Disabling hardware prefetching (Errata 037)\n");
-                        lo |= (1<<9);   /* Disable hw prefetching */
+                        lo |= MSR_IA32_MISC_ENABLE_PREFETCH_DISABLE;
                         wrmsr (MSR_IA32_MISC_ENABLE, lo, hi);
                 }
         }
diff --git a/arch/x86/kernel/cpu/intel_cacheinfo.c b/arch/x86/kernel/cpu/intel_cacheinfo.c
index da299eb85fc0..7293508d8f5c 100644
--- a/arch/x86/kernel/cpu/intel_cacheinfo.c
+++ b/arch/x86/kernel/cpu/intel_cacheinfo.c
@@ -147,7 +147,16 @@ struct _cpuid4_info {
         union _cpuid4_leaf_ecx ecx;
         unsigned long size;
         unsigned long can_disable;
-        cpumask_t shared_cpu_map;       /* future?: only cpus/node is needed */
+        DECLARE_BITMAP(shared_cpu_map, NR_CPUS);
+};
+
+/* subset of above _cpuid4_info w/o shared_cpu_map */
+struct _cpuid4_info_regs {
+        union _cpuid4_leaf_eax eax;
+        union _cpuid4_leaf_ebx ebx;
+        union _cpuid4_leaf_ecx ecx;
+        unsigned long size;
+        unsigned long can_disable;
 };
 
 #ifdef CONFIG_PCI
@@ -278,7 +287,7 @@ amd_cpuid4(int leaf, union _cpuid4_leaf_eax *eax,
 }
 
 static void __cpuinit
-amd_check_l3_disable(int index, struct _cpuid4_info *this_leaf)
+amd_check_l3_disable(int index, struct _cpuid4_info_regs *this_leaf)
 {
         if (index < 3)
                 return;
@@ -286,7 +295,8 @@ amd_check_l3_disable(int index, struct _cpuid4_info *this_leaf)
 }
 
 static int
-__cpuinit cpuid4_cache_lookup(int index, struct _cpuid4_info *this_leaf)
+__cpuinit cpuid4_cache_lookup_regs(int index,
+                                   struct _cpuid4_info_regs *this_leaf)
 {
         union _cpuid4_leaf_eax  eax;
         union _cpuid4_leaf_ebx  ebx;
@@ -314,6 +324,15 @@ __cpuinit cpuid4_cache_lookup(int index, struct _cpuid4_info *this_leaf)
         return 0;
 }
 
+static int
+__cpuinit cpuid4_cache_lookup(int index, struct _cpuid4_info *this_leaf)
+{
+        struct _cpuid4_info_regs *leaf_regs =
+                (struct _cpuid4_info_regs *)this_leaf;
+
+        return cpuid4_cache_lookup_regs(index, leaf_regs);
+}
+
 static int __cpuinit find_num_cache_leaves(void)
 {
         unsigned int            eax, ebx, ecx, edx;
@@ -353,11 +372,10 @@ unsigned int __cpuinit init_intel_cacheinfo(struct cpuinfo_x86 *c)
                  * parameters cpuid leaf to find the cache details
                  */
                 for (i = 0; i < num_cache_leaves; i++) {
-                        struct _cpuid4_info this_leaf;
-
+                        struct _cpuid4_info_regs this_leaf;
                         int retval;
 
-                        retval = cpuid4_cache_lookup(i, &this_leaf);
+                        retval = cpuid4_cache_lookup_regs(i, &this_leaf);
                         if (retval >= 0) {
                                 switch(this_leaf.eax.split.level) {
                                     case 1:
@@ -506,17 +524,20 @@ static void __cpuinit cache_shared_cpu_map_setup(unsigned int cpu, int index)
         num_threads_sharing = 1 + this_leaf->eax.split.num_threads_sharing;
 
         if (num_threads_sharing == 1)
-                cpu_set(cpu, this_leaf->shared_cpu_map);
+                cpumask_set_cpu(cpu, to_cpumask(this_leaf->shared_cpu_map));
         else {
                 index_msb = get_count_order(num_threads_sharing);
 
                 for_each_online_cpu(i) {
                         if (cpu_data(i).apicid >> index_msb ==
                             c->apicid >> index_msb) {
-                                cpu_set(i, this_leaf->shared_cpu_map);
+                                cpumask_set_cpu(i,
+                                        to_cpumask(this_leaf->shared_cpu_map));
                                 if (i != cpu && per_cpu(cpuid4_info, i))  {
-                                        sibling_leaf = CPUID4_INFO_IDX(i, index);
-                                        cpu_set(cpu, sibling_leaf->shared_cpu_map);
+                                        sibling_leaf =
+                                                CPUID4_INFO_IDX(i, index);
+                                        cpumask_set_cpu(cpu, to_cpumask(
+                                                sibling_leaf->shared_cpu_map));
                                 }
                         }
                 }
@@ -528,9 +549,10 @@ static void __cpuinit cache_remove_shared_cpu_map(unsigned int cpu, int index)
         int sibling;
 
         this_leaf = CPUID4_INFO_IDX(cpu, index);
-        for_each_cpu_mask_nr(sibling, this_leaf->shared_cpu_map) {
+        for_each_cpu(sibling, to_cpumask(this_leaf->shared_cpu_map)) {
                 sibling_leaf = CPUID4_INFO_IDX(sibling, index);
-                cpu_clear(cpu, sibling_leaf->shared_cpu_map);
+                cpumask_clear_cpu(cpu,
+                                  to_cpumask(sibling_leaf->shared_cpu_map));
         }
 }
 #else
@@ -635,8 +657,9 @@ static ssize_t show_shared_cpu_map_func(struct _cpuid4_info *this_leaf,
         int n = 0;
 
         if (len > 1) {
-                cpumask_t *mask = &this_leaf->shared_cpu_map;
+                const struct cpumask *mask;
 
+                mask = to_cpumask(this_leaf->shared_cpu_map);
                 n = type?
                         cpulist_scnprintf(buf, len-2, mask) :
                         cpumask_scnprintf(buf, len-2, mask);
@@ -699,7 +722,8 @@ static struct pci_dev *get_k8_northbridge(int node)
 
 static ssize_t show_cache_disable(struct _cpuid4_info *this_leaf, char *buf)
 {
-        int node = cpu_to_node(first_cpu(this_leaf->shared_cpu_map));
+        const struct cpumask *mask = to_cpumask(this_leaf->shared_cpu_map);
+        int node = cpu_to_node(cpumask_first(mask));
         struct pci_dev *dev = NULL;
         ssize_t ret = 0;
         int i;
@@ -733,7 +757,8 @@ static ssize_t
 store_cache_disable(struct _cpuid4_info *this_leaf, const char *buf,
                     size_t count)
 {
-        int node = cpu_to_node(first_cpu(this_leaf->shared_cpu_map));
+        const struct cpumask *mask = to_cpumask(this_leaf->shared_cpu_map);
+        int node = cpu_to_node(cpumask_first(mask));
         struct pci_dev *dev = NULL;
         unsigned int ret, index, val;
 
@@ -878,7 +903,7 @@ err_out:
         return -ENOMEM;
 }
 
-static cpumask_t cache_dev_map = CPU_MASK_NONE;
+static DECLARE_BITMAP(cache_dev_map, NR_CPUS);
 
 /* Add/Remove cache interface for CPU device */
 static int __cpuinit cache_add_dev(struct sys_device * sys_dev)
@@ -918,7 +943,7 @@ static int __cpuinit cache_add_dev(struct sys_device * sys_dev)
                 }
                 kobject_uevent(&(this_object->kobj), KOBJ_ADD);
         }
-        cpu_set(cpu, cache_dev_map);
+        cpumask_set_cpu(cpu, to_cpumask(cache_dev_map));
 
         kobject_uevent(per_cpu(cache_kobject, cpu), KOBJ_ADD);
         return 0;
@@ -931,9 +956,9 @@ static void __cpuinit cache_remove_dev(struct sys_device * sys_dev)
 
         if (per_cpu(cpuid4_info, cpu) == NULL)
                 return;
-        if (!cpu_isset(cpu, cache_dev_map))
+        if (!cpumask_test_cpu(cpu, to_cpumask(cache_dev_map)))
                 return;
-        cpu_clear(cpu, cache_dev_map);
+        cpumask_clear_cpu(cpu, to_cpumask(cache_dev_map));
 
         for (i = 0; i < num_cache_leaves; i++)
                 kobject_put(&(INDEX_KOBJECT_PTR(cpu,i)->kobj));
diff --git a/arch/x86/kernel/cpu/mcheck/mce_amd_64.c b/arch/x86/kernel/cpu/mcheck/mce_amd_64.c
index f2ee0ae29bd6..9817506dd469 100644
--- a/arch/x86/kernel/cpu/mcheck/mce_amd_64.c
+++ b/arch/x86/kernel/cpu/mcheck/mce_amd_64.c
@@ -67,7 +67,7 @@ static struct threshold_block threshold_defaults = {
 struct threshold_bank {
         struct kobject *kobj;
         struct threshold_block *blocks;
-        cpumask_t cpus;
+        cpumask_var_t cpus;
 };
 static DEFINE_PER_CPU(struct threshold_bank *, threshold_banks[NR_BANKS]);
 
@@ -481,7 +481,7 @@ static __cpuinit int threshold_create_bank(unsigned int cpu, unsigned int bank)
 
 #ifdef CONFIG_SMP
         if (cpu_data(cpu).cpu_core_id && shared_bank[bank]) {   /* symlink */
-                i = first_cpu(per_cpu(cpu_core_map, cpu));
+                i = cpumask_first(&per_cpu(cpu_core_map, cpu));
 
                 /* first core not up yet */
                 if (cpu_data(i).cpu_core_id)
@@ -501,7 +501,7 @@ static __cpuinit int threshold_create_bank(unsigned int cpu, unsigned int bank)
                 if (err)
                         goto out;
 
-                b->cpus = per_cpu(cpu_core_map, cpu);
+                cpumask_copy(b->cpus, &per_cpu(cpu_core_map, cpu));
                 per_cpu(threshold_banks, cpu)[bank] = b;
                 goto out;
         }
@@ -512,15 +512,20 @@ static __cpuinit int threshold_create_bank(unsigned int cpu, unsigned int bank)
                 err = -ENOMEM;
                 goto out;
         }
+        if (!alloc_cpumask_var(&b->cpus, GFP_KERNEL)) {
+                kfree(b);
+                err = -ENOMEM;
+                goto out;
+        }
 
         b->kobj = kobject_create_and_add(name, &per_cpu(device_mce, cpu).kobj);
         if (!b->kobj)
                 goto out_free;
 
 #ifndef CONFIG_SMP
-        b->cpus = CPU_MASK_ALL;
+        cpumask_setall(b->cpus);
 #else
-        b->cpus = per_cpu(cpu_core_map, cpu);
+        cpumask_copy(b->cpus, &per_cpu(cpu_core_map, cpu));
 #endif
 
         per_cpu(threshold_banks, cpu)[bank] = b;
@@ -529,7 +534,7 @@ static __cpuinit int threshold_create_bank(unsigned int cpu, unsigned int bank)
         if (err)
                 goto out_free;
 
-        for_each_cpu_mask_nr(i, b->cpus) {
+        for_each_cpu(i, b->cpus) {
                 if (i == cpu)
                         continue;
 
@@ -545,6 +550,7 @@ static __cpuinit int threshold_create_bank(unsigned int cpu, unsigned int bank)
 
 out_free:
         per_cpu(threshold_banks, cpu)[bank] = NULL;
+        free_cpumask_var(b->cpus);
         kfree(b);
 out:
         return err;
@@ -619,7 +625,7 @@ static void threshold_remove_bank(unsigned int cpu, int bank)
 #endif
 
         /* remove all sibling symlinks before unregistering */
-        for_each_cpu_mask_nr(i, b->cpus) {
+        for_each_cpu(i, b->cpus) {
                 if (i == cpu)
                         continue;
 
@@ -632,6 +638,7 @@ static void threshold_remove_bank(unsigned int cpu, int bank)
 free_out:
         kobject_del(b->kobj);
         kobject_put(b->kobj);
+        free_cpumask_var(b->cpus);
         kfree(b);
         per_cpu(threshold_banks, cpu)[bank] = NULL;
 }
diff --git a/arch/x86/kernel/cpu/mcheck/mce_intel_64.c b/arch/x86/kernel/cpu/mcheck/mce_intel_64.c
index f44c36624360..aa5e287c98e0 100644
--- a/arch/x86/kernel/cpu/mcheck/mce_intel_64.c
+++ b/arch/x86/kernel/cpu/mcheck/mce_intel_64.c
@@ -7,6 +7,7 @@
 #include <linux/interrupt.h>
 #include <linux/percpu.h>
 #include <asm/processor.h>
+#include <asm/apic.h>
 #include <asm/msr.h>
 #include <asm/mce.h>
 #include <asm/hw_irq.h>
@@ -48,13 +49,13 @@ static void intel_init_thermal(struct cpuinfo_x86 *c)
          */
         rdmsr(MSR_IA32_MISC_ENABLE, l, h);
         h = apic_read(APIC_LVTTHMR);
-        if ((l & (1 << 3)) && (h & APIC_DM_SMI)) {
+        if ((l & MSR_IA32_MISC_ENABLE_TM1) && (h & APIC_DM_SMI)) {
                 printk(KERN_DEBUG
                        "CPU%d: Thermal monitoring handled by SMI\n", cpu);
                 return;
         }
 
-        if (cpu_has(c, X86_FEATURE_TM2) && (l & (1 << 13)))
+        if (cpu_has(c, X86_FEATURE_TM2) && (l & MSR_IA32_MISC_ENABLE_TM2))
                 tm2 = 1;
 
         if (h & APIC_VECTOR_MASK) {
@@ -72,7 +73,7 @@ static void intel_init_thermal(struct cpuinfo_x86 *c)
         wrmsr(MSR_IA32_THERM_INTERRUPT, l | 0x03, h);
 
         rdmsr(MSR_IA32_MISC_ENABLE, l, h);
-        wrmsr(MSR_IA32_MISC_ENABLE, l | (1 << 3), h);
+        wrmsr(MSR_IA32_MISC_ENABLE, l | MSR_IA32_MISC_ENABLE_TM1, h);
 
         l = apic_read(APIC_LVTTHMR);
         apic_write(APIC_LVTTHMR, l & ~APIC_LVT_MASKED);
diff --git a/arch/x86/kernel/cpu/mcheck/p4.c b/arch/x86/kernel/cpu/mcheck/p4.c
index 9b60fce09f75..f53bdcbaf382 100644
--- a/arch/x86/kernel/cpu/mcheck/p4.c
+++ b/arch/x86/kernel/cpu/mcheck/p4.c
@@ -85,7 +85,7 @@ static void intel_init_thermal(struct cpuinfo_x86 *c)
          */
         rdmsr(MSR_IA32_MISC_ENABLE, l, h);
         h = apic_read(APIC_LVTTHMR);
-        if ((l & (1<<3)) && (h & APIC_DM_SMI)) {
+        if ((l & MSR_IA32_MISC_ENABLE_TM1) && (h & APIC_DM_SMI)) {
                 printk(KERN_DEBUG "CPU%d: Thermal monitoring handled by SMI\n",
                                 cpu);
                 return; /* -EBUSY */
@@ -111,7 +111,7 @@ static void intel_init_thermal(struct cpuinfo_x86 *c)
         vendor_thermal_interrupt = intel_thermal_interrupt;
 
         rdmsr(MSR_IA32_MISC_ENABLE, l, h);
-        wrmsr(MSR_IA32_MISC_ENABLE, l | (1<<3), h);
+        wrmsr(MSR_IA32_MISC_ENABLE, l | MSR_IA32_MISC_ENABLE_TM1, h);
 
         l = apic_read(APIC_LVTTHMR);
         apic_write(APIC_LVTTHMR, l & ~APIC_LVT_MASKED);
diff --git a/arch/x86/kernel/cpu/perfctr-watchdog.c b/arch/x86/kernel/cpu/perfctr-watchdog.c
index 9abd48b22674..f6c70a164e32 100644
--- a/arch/x86/kernel/cpu/perfctr-watchdog.c
+++ b/arch/x86/kernel/cpu/perfctr-watchdog.c
@@ -19,7 +19,7 @@
 #include <linux/nmi.h>
 #include <linux/kprobes.h>
 
-#include <asm/apic.h>
+#include <asm/genapic.h>
 #include <asm/intel_arch_perfmon.h>
 
 struct nmi_watchdog_ctlblk {
diff --git a/arch/x86/kernel/cpu/proc.c b/arch/x86/kernel/cpu/proc.c
index 01b1244ef1c0..d67e0e48bc2d 100644
--- a/arch/x86/kernel/cpu/proc.c
+++ b/arch/x86/kernel/cpu/proc.c
@@ -7,11 +7,10 @@
 /*
  *      Get CPU information for use by the procfs.
  */
-#ifdef CONFIG_X86_32
 static void show_cpuinfo_core(struct seq_file *m, struct cpuinfo_x86 *c,
                               unsigned int cpu)
 {
-#ifdef CONFIG_X86_HT
+#ifdef CONFIG_SMP
         if (c->x86_max_cores * smp_num_siblings > 1) {
                 seq_printf(m, "physical id\t: %d\n", c->phys_proc_id);
                 seq_printf(m, "siblings\t: %d\n",
@@ -24,6 +23,7 @@ static void show_cpuinfo_core(struct seq_file *m, struct cpuinfo_x86 *c,
 #endif
 }
 
+#ifdef CONFIG_X86_32
 static void show_cpuinfo_misc(struct seq_file *m, struct cpuinfo_x86 *c)
 {
         /*
@@ -50,22 +50,6 @@ static void show_cpuinfo_misc(struct seq_file *m, struct cpuinfo_x86 *c)
                    c->wp_works_ok ? "yes" : "no");
 }
 #else
-static void show_cpuinfo_core(struct seq_file *m, struct cpuinfo_x86 *c,
-                              unsigned int cpu)
-{
-#ifdef CONFIG_SMP
-        if (c->x86_max_cores * smp_num_siblings > 1) {
-                seq_printf(m, "physical id\t: %d\n", c->phys_proc_id);
-                seq_printf(m, "siblings\t: %d\n",
-                           cpus_weight(per_cpu(cpu_core_map, cpu)));
-                seq_printf(m, "core id\t\t: %d\n", c->cpu_core_id);
-                seq_printf(m, "cpu cores\t: %d\n", c->booted_cores);
-                seq_printf(m, "apicid\t\t: %d\n", c->apicid);
-                seq_printf(m, "initial apicid\t: %d\n", c->initial_apicid);
-        }
-#endif
-}
-
 static void show_cpuinfo_misc(struct seq_file *m, struct cpuinfo_x86 *c)
 {
         seq_printf(m,
diff --git a/arch/x86/kernel/crash.c b/arch/x86/kernel/crash.c
index c689d19e35ab..ff958248e61d 100644
--- a/arch/x86/kernel/crash.c
+++ b/arch/x86/kernel/crash.c
@@ -24,12 +24,10 @@
 #include <asm/apic.h>
 #include <asm/hpet.h>
 #include <linux/kdebug.h>
-#include <asm/smp.h>
+#include <asm/cpu.h>
 #include <asm/reboot.h>
 #include <asm/virtext.h>
 
-#include <mach_ipi.h>
-
 
 #if defined(CONFIG_SMP) && defined(CONFIG_X86_LOCAL_APIC)
 
diff --git a/arch/x86/kernel/dumpstack.c b/arch/x86/kernel/dumpstack.c
index 6b1f6f6f8661..87d103ded1c3 100644
--- a/arch/x86/kernel/dumpstack.c
+++ b/arch/x86/kernel/dumpstack.c
@@ -99,7 +99,7 @@ print_context_stack(struct thread_info *tinfo,
                                 frame = frame->next_frame;
                                 bp = (unsigned long) frame;
                         } else {
-                                ops->address(data, addr, bp == 0);
+                                ops->address(data, addr, 0);
                         }
                         print_ftrace_graph_addr(addr, data, ops, tinfo, graph);
                 }
diff --git a/arch/x86/kernel/dumpstack_64.c b/arch/x86/kernel/dumpstack_64.c
index c302d0707048..d35db5993fd6 100644
--- a/arch/x86/kernel/dumpstack_64.c
+++ b/arch/x86/kernel/dumpstack_64.c
@@ -106,7 +106,8 @@ void dump_trace(struct task_struct *task, struct pt_regs *regs,
                 const struct stacktrace_ops *ops, void *data)
 {
         const unsigned cpu = get_cpu();
-        unsigned long *irqstack_end = (unsigned long *)cpu_pda(cpu)->irqstackptr;
+        unsigned long *irq_stack_end =
+                (unsigned long *)per_cpu(irq_stack_ptr, cpu);
         unsigned used = 0;
         struct thread_info *tinfo;
         int graph = 0;
@@ -160,23 +161,23 @@ void dump_trace(struct task_struct *task, struct pt_regs *regs,
                         stack = (unsigned long *) estack_end[-2];
                         continue;
                 }
-                if (irqstack_end) {
-                        unsigned long *irqstack;
-                        irqstack = irqstack_end -
-                                (IRQSTACKSIZE - 64) / sizeof(*irqstack);
+                if (irq_stack_end) {
+                        unsigned long *irq_stack;
+                        irq_stack = irq_stack_end -
+                                (IRQ_STACK_SIZE - 64) / sizeof(*irq_stack);
 
-                        if (stack >= irqstack && stack < irqstack_end) {
+                        if (stack >= irq_stack && stack < irq_stack_end) {
                                 if (ops->stack(data, "IRQ") < 0)
                                         break;
                                 bp = print_context_stack(tinfo, stack, bp,
-                                        ops, data, irqstack_end, &graph);
+                                        ops, data, irq_stack_end, &graph);
                                 /*
                                  * We link to the next stack (which would be
                                  * the process stack normally) the last
                                  * pointer (index -1 to end) in the IRQ stack:
                                  */
-                                stack = (unsigned long *) (irqstack_end[-1]);
-                                irqstack_end = NULL;
+                                stack = (unsigned long *) (irq_stack_end[-1]);
+                                irq_stack_end = NULL;
                                 ops->stack(data, "EOI");
                                 continue;
                         }
@@ -199,10 +200,10 @@ show_stack_log_lvl(struct task_struct *task, struct pt_regs *regs,
         unsigned long *stack;
         int i;
         const int cpu = smp_processor_id();
-        unsigned long *irqstack_end =
-                (unsigned long *) (cpu_pda(cpu)->irqstackptr);
-        unsigned long *irqstack =
-                (unsigned long *) (cpu_pda(cpu)->irqstackptr - IRQSTACKSIZE);
+        unsigned long *irq_stack_end =
+                (unsigned long *)(per_cpu(irq_stack_ptr, cpu));
+        unsigned long *irq_stack =
+                (unsigned long *)(per_cpu(irq_stack_ptr, cpu) - IRQ_STACK_SIZE);
 
         /*
          * debugging aid: "show_stack(NULL, NULL);" prints the
@@ -218,9 +219,9 @@ show_stack_log_lvl(struct task_struct *task, struct pt_regs *regs,
 
         stack = sp;
         for (i = 0; i < kstack_depth_to_print; i++) {
-                if (stack >= irqstack && stack <= irqstack_end) {
-                        if (stack == irqstack_end) {
-                                stack = (unsigned long *) (irqstack_end[-1]);
+                if (stack >= irq_stack && stack <= irq_stack_end) {
+                        if (stack == irq_stack_end) {
+                                stack = (unsigned long *) (irq_stack_end[-1]);
                                 printk(" <EOI> ");
                         }
                 } else {
@@ -241,7 +242,7 @@ void show_registers(struct pt_regs *regs)
         int i;
         unsigned long sp;
         const int cpu = smp_processor_id();
-        struct task_struct *cur = cpu_pda(cpu)->pcurrent;
+        struct task_struct *cur = current;
 
         sp = regs->sp;
         printk("CPU %d ", cpu);
diff --git a/arch/x86/kernel/e820.c b/arch/x86/kernel/e820.c
index e85826829cf2..508bec1cee27 100644
--- a/arch/x86/kernel/e820.c
+++ b/arch/x86/kernel/e820.c
@@ -858,6 +858,9 @@ void __init reserve_early_overlap_ok(u64 start, u64 end, char *name)
  */
 void __init reserve_early(u64 start, u64 end, char *name)
 {
+        if (start >= end)
+                return;
+
         drop_overlaps_that_are_ok(start, end);
         __reserve_early(start, end, name, 0);
 }
diff --git a/arch/x86/kernel/early_printk.c b/arch/x86/kernel/early_printk.c
index 504ad198e4ad..639ad98238a2 100644
--- a/arch/x86/kernel/early_printk.c
+++ b/arch/x86/kernel/early_printk.c
@@ -13,8 +13,8 @@
 #include <asm/setup.h>
 #include <xen/hvc-console.h>
 #include <asm/pci-direct.h>
-#include <asm/pgtable.h>
 #include <asm/fixmap.h>
+#include <asm/pgtable.h>
 #include <linux/usb/ehci_def.h>
 
 /* Simple VGA output */
diff --git a/arch/x86/kernel/efi.c b/arch/x86/kernel/efi.c
index eb1ef3b67dd5..1736acc4d7aa 100644
--- a/arch/x86/kernel/efi.c
+++ b/arch/x86/kernel/efi.c
@@ -366,10 +366,12 @@ void __init efi_init(void)
                                         SMBIOS_TABLE_GUID)) {
                         efi.smbios = config_tables[i].table;
                         printk(" SMBIOS=0x%lx ", config_tables[i].table);
+#ifdef CONFIG_X86_UV
                 } else if (!efi_guidcmp(config_tables[i].guid,
                                         UV_SYSTEM_TABLE_GUID)) {
                         efi.uv_systab = config_tables[i].table;
                         printk(" UVsystab=0x%lx ", config_tables[i].table);
+#endif
                 } else if (!efi_guidcmp(config_tables[i].guid,
                                         HCDP_TABLE_GUID)) {
                         efi.hcdp = config_tables[i].table;
diff --git a/arch/x86/kernel/efi_64.c b/arch/x86/kernel/efi_64.c
index cb783b92c50c..22c3b7828c50 100644
--- a/arch/x86/kernel/efi_64.c
+++ b/arch/x86/kernel/efi_64.c
@@ -36,6 +36,7 @@
 #include <asm/proto.h>
 #include <asm/efi.h>
 #include <asm/cacheflush.h>
+#include <asm/fixmap.h>
 
 static pgd_t save_pgd __initdata;
 static unsigned long efi_flags __initdata;
diff --git a/arch/x86/kernel/efi_stub_32.S b/arch/x86/kernel/efi_stub_32.S
index ef00bb77d7e4..fbe66e626c09 100644
--- a/arch/x86/kernel/efi_stub_32.S
+++ b/arch/x86/kernel/efi_stub_32.S
@@ -6,7 +6,7 @@
  */
 
 #include <linux/linkage.h>
-#include <asm/page.h>
+#include <asm/page_types.h>
 
 /*
  * efi_call_phys(void *, ...) is a function with variable parameters.
@@ -113,6 +113,7 @@ ENTRY(efi_call_phys)
         movl    (%edx), %ecx
         pushl   %ecx
         ret
+ENDPROC(efi_call_phys)
 .previous
 
 .data
diff --git a/arch/x86/kernel/efi_stub_64.S b/arch/x86/kernel/efi_stub_64.S
index 99b47d48c9f4..4c07ccab8146 100644
--- a/arch/x86/kernel/efi_stub_64.S
+++ b/arch/x86/kernel/efi_stub_64.S
@@ -41,6 +41,7 @@ ENTRY(efi_call0)
         addq $32, %rsp
         RESTORE_XMM
         ret
+ENDPROC(efi_call0)
 
 ENTRY(efi_call1)
         SAVE_XMM
@@ -50,6 +51,7 @@ ENTRY(efi_call1)
         addq $32, %rsp
         RESTORE_XMM
         ret
+ENDPROC(efi_call1)
 
 ENTRY(efi_call2)
         SAVE_XMM
@@ -59,6 +61,7 @@ ENTRY(efi_call2)
         addq $32, %rsp
         RESTORE_XMM
         ret
+ENDPROC(efi_call2)
 
 ENTRY(efi_call3)
         SAVE_XMM
@@ -69,6 +72,7 @@ ENTRY(efi_call3)
         addq $32, %rsp
         RESTORE_XMM
         ret
+ENDPROC(efi_call3)
 
 ENTRY(efi_call4)
         SAVE_XMM
@@ -80,6 +84,7 @@ ENTRY(efi_call4)
         addq $32, %rsp
         RESTORE_XMM
         ret
+ENDPROC(efi_call4)
 
 ENTRY(efi_call5)
         SAVE_XMM
@@ -92,6 +97,7 @@ ENTRY(efi_call5)
         addq $48, %rsp
         RESTORE_XMM
         ret
+ENDPROC(efi_call5)
 
 ENTRY(efi_call6)
         SAVE_XMM
@@ -107,3 +113,4 @@ ENTRY(efi_call6)
         addq $48, %rsp
         RESTORE_XMM
         ret
+ENDPROC(efi_call6)
diff --git a/arch/x86/kernel/entry_32.S b/arch/x86/kernel/entry_32.S
index 46469029e9d3..899e8938e79f 100644
--- a/arch/x86/kernel/entry_32.S
+++ b/arch/x86/kernel/entry_32.S
@@ -30,12 +30,13 @@
  *      1C(%esp) - %ds
  *      20(%esp) - %es
  *      24(%esp) - %fs
- *      28(%esp) - orig_eax
- *      2C(%esp) - %eip
- *      30(%esp) - %cs
- *      34(%esp) - %eflags
- *      38(%esp) - %oldesp
- *      3C(%esp) - %oldss
+ *      28(%esp) - %gs          saved iff !CONFIG_X86_32_LAZY_GS
+ *      2C(%esp) - orig_eax
+ *      30(%esp) - %eip
+ *      34(%esp) - %cs
+ *      38(%esp) - %eflags
+ *      3C(%esp) - %oldesp
+ *      40(%esp) - %oldss
  *
  * "current" is in register %ebx during any slow entries.
  */
@@ -46,7 +47,7 @@
 #include <asm/errno.h>
 #include <asm/segment.h>
 #include <asm/smp.h>
-#include <asm/page.h>
+#include <asm/page_types.h>
 #include <asm/desc.h>
 #include <asm/percpu.h>
 #include <asm/dwarf2.h>
@@ -101,121 +102,221 @@
 #define resume_userspace_sig    resume_userspace
 #endif
 
-#define SAVE_ALL \
-        cld; \
-        pushl %fs; \
-        CFI_ADJUST_CFA_OFFSET 4;\
-        /*CFI_REL_OFFSET fs, 0;*/\
-        pushl %es; \
-        CFI_ADJUST_CFA_OFFSET 4;\
-        /*CFI_REL_OFFSET es, 0;*/\
-        pushl %ds; \
-        CFI_ADJUST_CFA_OFFSET 4;\
-        /*CFI_REL_OFFSET ds, 0;*/\
-        pushl %eax; \
-        CFI_ADJUST_CFA_OFFSET 4;\
-        CFI_REL_OFFSET eax, 0;\
-        pushl %ebp; \
-        CFI_ADJUST_CFA_OFFSET 4;\
-        CFI_REL_OFFSET ebp, 0;\
-        pushl %edi; \
-        CFI_ADJUST_CFA_OFFSET 4;\
-        CFI_REL_OFFSET edi, 0;\
-        pushl %esi; \
-        CFI_ADJUST_CFA_OFFSET 4;\
-        CFI_REL_OFFSET esi, 0;\
-        pushl %edx; \
-        CFI_ADJUST_CFA_OFFSET 4;\
-        CFI_REL_OFFSET edx, 0;\
-        pushl %ecx; \
-        CFI_ADJUST_CFA_OFFSET 4;\
-        CFI_REL_OFFSET ecx, 0;\
-        pushl %ebx; \
-        CFI_ADJUST_CFA_OFFSET 4;\
-        CFI_REL_OFFSET ebx, 0;\
-        movl $(__USER_DS), %edx; \
-        movl %edx, %ds; \
-        movl %edx, %es; \
-        movl $(__KERNEL_PERCPU), %edx; \
+/*
+ * User gs save/restore
+ *
+ * %gs is used for userland TLS and kernel only uses it for stack
+ * canary which is required to be at %gs:20 by gcc.  Read the comment
+ * at the top of stackprotector.h for more info.
+ *
+ * Local labels 98 and 99 are used.
+ */
+#ifdef CONFIG_X86_32_LAZY_GS
+
+ /* unfortunately push/pop can't be no-op */
+.macro PUSH_GS
+        pushl $0
+        CFI_ADJUST_CFA_OFFSET 4
+.endm
+.macro POP_GS pop=0
+        addl $(4 + \pop), %esp
+        CFI_ADJUST_CFA_OFFSET -(4 + \pop)
+.endm
+.macro POP_GS_EX
+.endm
+
+ /* all the rest are no-op */
+.macro PTGS_TO_GS
+.endm
+.macro PTGS_TO_GS_EX
+.endm
+.macro GS_TO_REG reg
+.endm
+.macro REG_TO_PTGS reg
+.endm
+.macro SET_KERNEL_GS reg
+.endm
+
+#else   /* CONFIG_X86_32_LAZY_GS */
+
+.macro PUSH_GS
+        pushl %gs
+        CFI_ADJUST_CFA_OFFSET 4
+        /*CFI_REL_OFFSET gs, 0*/
+.endm
+
+.macro POP_GS pop=0
+98:     popl %gs
+        CFI_ADJUST_CFA_OFFSET -4
+        /*CFI_RESTORE gs*/
+  .if \pop <> 0
+        add $\pop, %esp
+        CFI_ADJUST_CFA_OFFSET -\pop
+  .endif
+.endm
+.macro POP_GS_EX
+.pushsection .fixup, "ax"
+99:     movl $0, (%esp)
+        jmp 98b
+.section __ex_table, "a"
+        .align 4
+        .long 98b, 99b
+.popsection
+.endm
+
+.macro PTGS_TO_GS
+98:     mov PT_GS(%esp), %gs
+.endm
+.macro PTGS_TO_GS_EX
+.pushsection .fixup, "ax"
+99:     movl $0, PT_GS(%esp)
+        jmp 98b
+.section __ex_table, "a"
+        .align 4
+        .long 98b, 99b
+.popsection
+.endm
+
+.macro GS_TO_REG reg
+        movl %gs, \reg
+        /*CFI_REGISTER gs, \reg*/
+.endm
+.macro REG_TO_PTGS reg
+        movl \reg, PT_GS(%esp)
+        /*CFI_REL_OFFSET gs, PT_GS*/
+.endm
+.macro SET_KERNEL_GS reg
+        movl $(__KERNEL_STACK_CANARY), \reg
+        movl \reg, %gs
+.endm
+
+#endif  /* CONFIG_X86_32_LAZY_GS */
+
+.macro SAVE_ALL
+        cld
+        PUSH_GS
+        pushl %fs
+        CFI_ADJUST_CFA_OFFSET 4
+        /*CFI_REL_OFFSET fs, 0;*/
+        pushl %es
+        CFI_ADJUST_CFA_OFFSET 4
+        /*CFI_REL_OFFSET es, 0;*/
+        pushl %ds
+        CFI_ADJUST_CFA_OFFSET 4
+        /*CFI_REL_OFFSET ds, 0;*/
+        pushl %eax
+        CFI_ADJUST_CFA_OFFSET 4
+        CFI_REL_OFFSET eax, 0
+        pushl %ebp
+        CFI_ADJUST_CFA_OFFSET 4
+        CFI_REL_OFFSET ebp, 0
+        pushl %edi
+        CFI_ADJUST_CFA_OFFSET 4
+        CFI_REL_OFFSET edi, 0
+        pushl %esi
+        CFI_ADJUST_CFA_OFFSET 4
+        CFI_REL_OFFSET esi, 0
+        pushl %edx
+        CFI_ADJUST_CFA_OFFSET 4
+        CFI_REL_OFFSET edx, 0
+        pushl %ecx
+        CFI_ADJUST_CFA_OFFSET 4
+        CFI_REL_OFFSET ecx, 0
+        pushl %ebx
+        CFI_ADJUST_CFA_OFFSET 4
+        CFI_REL_OFFSET ebx, 0
+        movl $(__USER_DS), %edx
+        movl %edx, %ds
+        movl %edx, %es
+        movl $(__KERNEL_PERCPU), %edx
         movl %edx, %fs
+        SET_KERNEL_GS %edx
+.endm
 
-#define RESTORE_INT_REGS \
-        popl %ebx;      \
-        CFI_ADJUST_CFA_OFFSET -4;\
-        CFI_RESTORE ebx;\
-        popl %ecx;      \
-        CFI_ADJUST_CFA_OFFSET -4;\
-        CFI_RESTORE ecx;\
-        popl %edx;      \
-        CFI_ADJUST_CFA_OFFSET -4;\
-        CFI_RESTORE edx;\
-        popl %esi;      \
-        CFI_ADJUST_CFA_OFFSET -4;\
-        CFI_RESTORE esi;\
-        popl %edi;      \
-        CFI_ADJUST_CFA_OFFSET -4;\
-        CFI_RESTORE edi;\
-        popl %ebp;      \
-        CFI_ADJUST_CFA_OFFSET -4;\
-        CFI_RESTORE ebp;\
-        popl %eax;      \
-        CFI_ADJUST_CFA_OFFSET -4;\
+.macro RESTORE_INT_REGS
+        popl %ebx
+        CFI_ADJUST_CFA_OFFSET -4
+        CFI_RESTORE ebx
+        popl %ecx
+        CFI_ADJUST_CFA_OFFSET -4
+        CFI_RESTORE ecx
+        popl %edx
+        CFI_ADJUST_CFA_OFFSET -4
+        CFI_RESTORE edx
+        popl %esi
+        CFI_ADJUST_CFA_OFFSET -4
+        CFI_RESTORE esi
+        popl %edi
+        CFI_ADJUST_CFA_OFFSET -4
+        CFI_RESTORE edi
+        popl %ebp
+        CFI_ADJUST_CFA_OFFSET -4
+        CFI_RESTORE ebp
+        popl %eax
+        CFI_ADJUST_CFA_OFFSET -4
         CFI_RESTORE eax
+.endm
 
-#define RESTORE_REGS    \
-        RESTORE_INT_REGS; \
-1:      popl %ds;       \
-        CFI_ADJUST_CFA_OFFSET -4;\
-        /*CFI_RESTORE ds;*/\
-2:      popl %es;       \
-        CFI_ADJUST_CFA_OFFSET -4;\
-        /*CFI_RESTORE es;*/\
-3:      popl %fs;       \
-        CFI_ADJUST_CFA_OFFSET -4;\
-        /*CFI_RESTORE fs;*/\
-.pushsection .fixup,"ax";       \
-4:      movl $0,(%esp); \
-        jmp 1b;         \
-5:      movl $0,(%esp); \
-        jmp 2b;         \
-6:      movl $0,(%esp); \
-        jmp 3b;         \
-.section __ex_table,"a";\
-        .align 4;       \
-        .long 1b,4b;    \
-        .long 2b,5b;    \
-        .long 3b,6b;    \
+.macro RESTORE_REGS pop=0
+        RESTORE_INT_REGS
+1:      popl %ds
+        CFI_ADJUST_CFA_OFFSET -4
+        /*CFI_RESTORE ds;*/
+2:      popl %es
+        CFI_ADJUST_CFA_OFFSET -4
+        /*CFI_RESTORE es;*/
+3:      popl %fs
+        CFI_ADJUST_CFA_OFFSET -4
+        /*CFI_RESTORE fs;*/
+        POP_GS \pop
+.pushsection .fixup, "ax"
+4:      movl $0, (%esp)
+        jmp 1b
+5:      movl $0, (%esp)
+        jmp 2b
+6:      movl $0, (%esp)
+        jmp 3b
+.section __ex_table, "a"
+        .align 4
+        .long 1b, 4b
+        .long 2b, 5b
+        .long 3b, 6b
 .popsection
+        POP_GS_EX
+.endm
 
-#define RING0_INT_FRAME \
-        CFI_STARTPROC simple;\
-        CFI_SIGNAL_FRAME;\
-        CFI_DEF_CFA esp, 3*4;\
-        /*CFI_OFFSET cs, -2*4;*/\
+.macro RING0_INT_FRAME
+        CFI_STARTPROC simple
+        CFI_SIGNAL_FRAME
+        CFI_DEF_CFA esp, 3*4
+        /*CFI_OFFSET cs, -2*4;*/
         CFI_OFFSET eip, -3*4
+.endm
 
-#define RING0_EC_FRAME \
-        CFI_STARTPROC simple;\
-        CFI_SIGNAL_FRAME;\
-        CFI_DEF_CFA esp, 4*4;\
-        /*CFI_OFFSET cs, -2*4;*/\
+.macro RING0_EC_FRAME
+        CFI_STARTPROC simple
+        CFI_SIGNAL_FRAME
+        CFI_DEF_CFA esp, 4*4
+        /*CFI_OFFSET cs, -2*4;*/
         CFI_OFFSET eip, -3*4
+.endm
 
-#define RING0_PTREGS_FRAME \
-        CFI_STARTPROC simple;\
-        CFI_SIGNAL_FRAME;\
-        CFI_DEF_CFA esp, PT_OLDESP-PT_EBX;\
-        /*CFI_OFFSET cs, PT_CS-PT_OLDESP;*/\
-        CFI_OFFSET eip, PT_EIP-PT_OLDESP;\
-        /*CFI_OFFSET es, PT_ES-PT_OLDESP;*/\
-        /*CFI_OFFSET ds, PT_DS-PT_OLDESP;*/\
-        CFI_OFFSET eax, PT_EAX-PT_OLDESP;\
-        CFI_OFFSET ebp, PT_EBP-PT_OLDESP;\
-        CFI_OFFSET edi, PT_EDI-PT_OLDESP;\
-        CFI_OFFSET esi, PT_ESI-PT_OLDESP;\
-        CFI_OFFSET edx, PT_EDX-PT_OLDESP;\
-        CFI_OFFSET ecx, PT_ECX-PT_OLDESP;\
+.macro RING0_PTREGS_FRAME
+        CFI_STARTPROC simple
+        CFI_SIGNAL_FRAME
+        CFI_DEF_CFA esp, PT_OLDESP-PT_EBX
+        /*CFI_OFFSET cs, PT_CS-PT_OLDESP;*/
+        CFI_OFFSET eip, PT_EIP-PT_OLDESP
+        /*CFI_OFFSET es, PT_ES-PT_OLDESP;*/
+        /*CFI_OFFSET ds, PT_DS-PT_OLDESP;*/
+        CFI_OFFSET eax, PT_EAX-PT_OLDESP
+        CFI_OFFSET ebp, PT_EBP-PT_OLDESP
+        CFI_OFFSET edi, PT_EDI-PT_OLDESP
+        CFI_OFFSET esi, PT_ESI-PT_OLDESP
+        CFI_OFFSET edx, PT_EDX-PT_OLDESP
+        CFI_OFFSET ecx, PT_ECX-PT_OLDESP
         CFI_OFFSET ebx, PT_EBX-PT_OLDESP
+.endm
 
 ENTRY(ret_from_fork)
         CFI_STARTPROC
@@ -362,6 +463,7 @@ sysenter_exit:
         xorl %ebp,%ebp
         TRACE_IRQS_ON
 1:      mov  PT_FS(%esp), %fs
+        PTGS_TO_GS
         ENABLE_INTERRUPTS_SYSEXIT
 
 #ifdef CONFIG_AUDITSYSCALL
@@ -410,6 +512,7 @@ sysexit_audit:
         .align 4
         .long 1b,2b
 .popsection
+        PTGS_TO_GS_EX
 ENDPROC(ia32_sysenter_target)
 
         # system call handler stub
@@ -452,8 +555,7 @@ restore_all:
 restore_nocheck:
         TRACE_IRQS_IRET
 restore_nocheck_notrace:
-        RESTORE_REGS
-        addl $4, %esp                   # skip orig_eax/error_code
+        RESTORE_REGS 4                  # skip orig_eax/error_code
         CFI_ADJUST_CFA_OFFSET -4
 irq_return:
         INTERRUPT_RETURN
@@ -595,28 +697,50 @@ syscall_badsys:
 END(syscall_badsys)
         CFI_ENDPROC
 
-#define FIXUP_ESPFIX_STACK \
-        /* since we are on a wrong stack, we cant make it a C code :( */ \
-        PER_CPU(gdt_page, %ebx); \
-        GET_DESC_BASE(GDT_ENTRY_ESPFIX_SS, %ebx, %eax, %ax, %al, %ah); \
-        addl %esp, %eax; \
-        pushl $__KERNEL_DS; \
-        CFI_ADJUST_CFA_OFFSET 4; \
-        pushl %eax; \
-        CFI_ADJUST_CFA_OFFSET 4; \
-        lss (%esp), %esp; \
-        CFI_ADJUST_CFA_OFFSET -8;
-#define UNWIND_ESPFIX_STACK \
-        movl %ss, %eax; \
-        /* see if on espfix stack */ \
-        cmpw $__ESPFIX_SS, %ax; \
-        jne 27f; \
-        movl $__KERNEL_DS, %eax; \
-        movl %eax, %ds; \
-        movl %eax, %es; \
-        /* switch to normal stack */ \
-        FIXUP_ESPFIX_STACK; \
-27:;
+/*
+ * System calls that need a pt_regs pointer.
+ */
+#define PTREGSCALL(name) \
+        ALIGN; \
+ptregs_##name: \
+        leal 4(%esp),%eax; \
+        jmp sys_##name;
+
+PTREGSCALL(iopl)
+PTREGSCALL(fork)
+PTREGSCALL(clone)
+PTREGSCALL(vfork)
+PTREGSCALL(execve)
+PTREGSCALL(sigaltstack)
+PTREGSCALL(sigreturn)
+PTREGSCALL(rt_sigreturn)
+PTREGSCALL(vm86)
+PTREGSCALL(vm86old)
+
+.macro FIXUP_ESPFIX_STACK
+        /* since we are on a wrong stack, we cant make it a C code :( */
+        PER_CPU(gdt_page, %ebx)
+        GET_DESC_BASE(GDT_ENTRY_ESPFIX_SS, %ebx, %eax, %ax, %al, %ah)
+        addl %esp, %eax
+        pushl $__KERNEL_DS
+        CFI_ADJUST_CFA_OFFSET 4
+        pushl %eax
+        CFI_ADJUST_CFA_OFFSET 4
+        lss (%esp), %esp
+        CFI_ADJUST_CFA_OFFSET -8
+.endm
+.macro UNWIND_ESPFIX_STACK
+        movl %ss, %eax
+        /* see if on espfix stack */
+        cmpw $__ESPFIX_SS, %ax
+        jne 27f
+        movl $__KERNEL_DS, %eax
+        movl %eax, %ds
+        movl %eax, %es
+        /* switch to normal stack */
+        FIXUP_ESPFIX_STACK
+27:
+.endm
 
 /*
  * Build the entry stubs and pointer table with some assembler magic.
@@ -672,7 +796,7 @@ common_interrupt:
 ENDPROC(common_interrupt)
         CFI_ENDPROC
 
-#define BUILD_INTERRUPT(name, nr)       \
+#define BUILD_INTERRUPT3(name, nr, fn)  \
 ENTRY(name)                             \
         RING0_INT_FRAME;                \
         pushl $~(nr);                   \
@@ -680,13 +804,15 @@ ENTRY(name)				\
         SAVE_ALL;                       \
         TRACE_IRQS_OFF                  \
         movl %esp,%eax;                 \
-        call smp_##name;                \
+        call fn;                        \
         jmp ret_from_intr;              \
         CFI_ENDPROC;                    \
 ENDPROC(name)
 
+#define BUILD_INTERRUPT(name, nr)       BUILD_INTERRUPT3(name, nr, smp_##name)
+
 /* The include is where all of the SMP etc. interrupts come from */
-#include "entry_arch.h"
+#include <asm/entry_arch.h>
 
 ENTRY(coprocessor_error)
         RING0_INT_FRAME
@@ -1068,7 +1194,10 @@ ENTRY(page_fault)
         CFI_ADJUST_CFA_OFFSET 4
         ALIGN
 error_code:
-        /* the function address is in %fs's slot on the stack */
+        /* the function address is in %gs's slot on the stack */
+        pushl %fs
+        CFI_ADJUST_CFA_OFFSET 4
+        /*CFI_REL_OFFSET fs, 0*/
         pushl %es
         CFI_ADJUST_CFA_OFFSET 4
         /*CFI_REL_OFFSET es, 0*/
@@ -1097,20 +1226,15 @@ error_code:
         CFI_ADJUST_CFA_OFFSET 4
         CFI_REL_OFFSET ebx, 0
         cld
-        pushl %fs
-        CFI_ADJUST_CFA_OFFSET 4
-        /*CFI_REL_OFFSET fs, 0*/
         movl $(__KERNEL_PERCPU), %ecx
         movl %ecx, %fs
         UNWIND_ESPFIX_STACK
-        popl %ecx
-        CFI_ADJUST_CFA_OFFSET -4
-        /*CFI_REGISTER es, ecx*/
-        movl PT_FS(%esp), %edi          # get the function address
+        GS_TO_REG %ecx
+        movl PT_GS(%esp), %edi          # get the function address
         movl PT_ORIG_EAX(%esp), %edx    # get the error code
         movl $-1, PT_ORIG_EAX(%esp)     # no syscall to restart
-        mov  %ecx, PT_FS(%esp)
-        /*CFI_REL_OFFSET fs, ES*/
+        REG_TO_PTGS %ecx
+        SET_KERNEL_GS %ecx
         movl $(__USER_DS), %ecx
         movl %ecx, %ds
         movl %ecx, %es
@@ -1134,26 +1258,27 @@ END(page_fault)
  * by hand onto the new stack - while updating the return eip past
  * the instruction that would have done it for sysenter.
  */
-#define FIX_STACK(offset, ok, label)            \
-        cmpw $__KERNEL_CS,4(%esp);              \
-        jne ok;                                 \
-label:                                          \
-        movl TSS_sysenter_sp0+offset(%esp),%esp;        \
-        CFI_DEF_CFA esp, 0;                     \
-        CFI_UNDEFINED eip;                      \
-        pushfl;                                 \
-        CFI_ADJUST_CFA_OFFSET 4;                \
-        pushl $__KERNEL_CS;                     \
-        CFI_ADJUST_CFA_OFFSET 4;                \
-        pushl $sysenter_past_esp;               \
-        CFI_ADJUST_CFA_OFFSET 4;                \
+.macro FIX_STACK offset ok label
+        cmpw $__KERNEL_CS, 4(%esp)
+        jne \ok
+\label:
+        movl TSS_sysenter_sp0 + \offset(%esp), %esp
+        CFI_DEF_CFA esp, 0
+        CFI_UNDEFINED eip
+        pushfl
+        CFI_ADJUST_CFA_OFFSET 4
+        pushl $__KERNEL_CS
+        CFI_ADJUST_CFA_OFFSET 4
+        pushl $sysenter_past_esp
+        CFI_ADJUST_CFA_OFFSET 4
         CFI_REL_OFFSET eip, 0
+.endm
 
 ENTRY(debug)
         RING0_INT_FRAME
         cmpl $ia32_sysenter_target,(%esp)
         jne debug_stack_correct
-        FIX_STACK(12, debug_stack_correct, debug_esp_fix_insn)
+        FIX_STACK 12, debug_stack_correct, debug_esp_fix_insn
 debug_stack_correct:
         pushl $-1                       # mark this as an int
         CFI_ADJUST_CFA_OFFSET 4
@@ -1211,7 +1336,7 @@ nmi_stack_correct:
 
 nmi_stack_fixup:
         RING0_INT_FRAME
-        FIX_STACK(12,nmi_stack_correct, 1)
+        FIX_STACK 12, nmi_stack_correct, 1
         jmp nmi_stack_correct
 
 nmi_debug_stack_check:
@@ -1222,7 +1347,7 @@ nmi_debug_stack_check:
         jb nmi_stack_correct
         cmpl $debug_esp_fix_insn,(%esp)
         ja nmi_stack_correct
-        FIX_STACK(24,nmi_stack_correct, 1)
+        FIX_STACK 24, nmi_stack_correct, 1
         jmp nmi_stack_correct
 
 nmi_espfix_stack:
@@ -1234,7 +1359,7 @@ nmi_espfix_stack:
         CFI_ADJUST_CFA_OFFSET 4
         pushl %esp
         CFI_ADJUST_CFA_OFFSET 4
-        addw $4, (%esp)
+        addl $4, (%esp)
         /* copy the iret frame of 12 bytes */
         .rept 3
         pushl 16(%esp)
diff --git a/arch/x86/kernel/entry_64.S b/arch/x86/kernel/entry_64.S
index a1346217e43c..83d1836b9467 100644
--- a/arch/x86/kernel/entry_64.S
+++ b/arch/x86/kernel/entry_64.S
@@ -48,10 +48,11 @@
 #include <asm/unistd.h>
 #include <asm/thread_info.h>
 #include <asm/hw_irq.h>
-#include <asm/page.h>
+#include <asm/page_types.h>
 #include <asm/irqflags.h>
 #include <asm/paravirt.h>
 #include <asm/ftrace.h>
+#include <asm/percpu.h>
 
 /* Avoid __ASSEMBLER__'ifying <linux/audit.h> just for this.  */
 #include <linux/elf-em.h>
@@ -76,20 +77,17 @@ ENTRY(ftrace_caller)
         movq 8(%rbp), %rsi
         subq $MCOUNT_INSN_SIZE, %rdi
 
-.globl ftrace_call
-ftrace_call:
+GLOBAL(ftrace_call)
         call ftrace_stub
 
         MCOUNT_RESTORE_FRAME
 
 #ifdef CONFIG_FUNCTION_GRAPH_TRACER
-.globl ftrace_graph_call
-ftrace_graph_call:
+GLOBAL(ftrace_graph_call)
         jmp ftrace_stub
 #endif
 
-.globl ftrace_stub
-ftrace_stub:
+GLOBAL(ftrace_stub)
         retq
 END(ftrace_caller)
 
@@ -109,8 +107,7 @@ ENTRY(mcount)
         jnz ftrace_graph_caller
 #endif
 
-.globl ftrace_stub
-ftrace_stub:
+GLOBAL(ftrace_stub)
         retq
 
 trace:
@@ -147,9 +144,7 @@ ENTRY(ftrace_graph_caller)
         retq
 END(ftrace_graph_caller)
 
-
-.globl return_to_handler
-return_to_handler:
+GLOBAL(return_to_handler)
         subq  $80, %rsp
 
         movq %rax, (%rsp)
@@ -187,6 +182,7 @@ return_to_handler:
 ENTRY(native_usergs_sysret64)
         swapgs
         sysretq
+ENDPROC(native_usergs_sysret64)
 #endif /* CONFIG_PARAVIRT */
 
 
@@ -209,7 +205,7 @@ ENTRY(native_usergs_sysret64)
 
         /* %rsp:at FRAMEEND */
         .macro FIXUP_TOP_OF_STACK tmp offset=0
-        movq %gs:pda_oldrsp,\tmp
+        movq PER_CPU_VAR(old_rsp),\tmp
         movq \tmp,RSP+\offset(%rsp)
         movq $__USER_DS,SS+\offset(%rsp)
         movq $__USER_CS,CS+\offset(%rsp)
@@ -220,7 +216,7 @@ ENTRY(native_usergs_sysret64)
 
         .macro RESTORE_TOP_OF_STACK tmp offset=0
         movq RSP+\offset(%rsp),\tmp
-        movq \tmp,%gs:pda_oldrsp
+        movq \tmp,PER_CPU_VAR(old_rsp)
         movq EFLAGS+\offset(%rsp),\tmp
         movq \tmp,R11+\offset(%rsp)
         .endm
@@ -336,15 +332,15 @@ ENTRY(save_args)
         je 1f
         SWAPGS
         /*
-         * irqcount is used to check if a CPU is already on an interrupt stack
+         * irq_count is used to check if a CPU is already on an interrupt stack
          * or not. While this is essentially redundant with preempt_count it is
          * a little cheaper to use a separate counter in the PDA (short of
          * moving irq_enter into assembly, which would be too much work)
          */
-1:      incl %gs:pda_irqcount
+1:      incl PER_CPU_VAR(irq_count)
         jne 2f
         popq_cfi %rax                   /* move return address... */
-        mov %gs:pda_irqstackptr,%rsp
+        mov PER_CPU_VAR(irq_stack_ptr),%rsp
         EMPTY_FRAME 0
         pushq_cfi %rbp                  /* backlink for unwinder */
         pushq_cfi %rax                  /* ... to the new stack */
@@ -409,6 +405,8 @@ END(save_paranoid)
 ENTRY(ret_from_fork)
         DEFAULT_FRAME
 
+        LOCK ; btr $TIF_FORK,TI_flags(%r8)
+
         push kernel_eflags(%rip)
         CFI_ADJUST_CFA_OFFSET 8
         popf                                    # reset kernel eflags
@@ -468,7 +466,7 @@ END(ret_from_fork)
 ENTRY(system_call)
         CFI_STARTPROC   simple
         CFI_SIGNAL_FRAME
-        CFI_DEF_CFA     rsp,PDA_STACKOFFSET
+        CFI_DEF_CFA     rsp,KERNEL_STACK_OFFSET
         CFI_REGISTER    rip,rcx
         /*CFI_REGISTER  rflags,r11*/
         SWAPGS_UNSAFE_STACK
@@ -479,8 +477,8 @@ ENTRY(system_call)
          */
 ENTRY(system_call_after_swapgs)
 
-        movq    %rsp,%gs:pda_oldrsp
-        movq    %gs:pda_kernelstack,%rsp
+        movq    %rsp,PER_CPU_VAR(old_rsp)
+        movq    PER_CPU_VAR(kernel_stack),%rsp
         /*
          * No need to follow this irqs off/on section - it's straight
          * and short:
@@ -523,7 +521,7 @@ sysret_check:
         CFI_REGISTER    rip,rcx
         RESTORE_ARGS 0,-ARG_SKIP,1
         /*CFI_REGISTER  rflags,r11*/
-        movq    %gs:pda_oldrsp, %rsp
+        movq    PER_CPU_VAR(old_rsp), %rsp
         USERGS_SYSRET64
 
         CFI_RESTORE_STATE
@@ -630,16 +628,14 @@ tracesys:
  * Syscall return path ending with IRET.
  * Has correct top of stack, but partial stack frame.
  */
-        .globl int_ret_from_sys_call
-        .globl int_with_check
-int_ret_from_sys_call:
+GLOBAL(int_ret_from_sys_call)
         DISABLE_INTERRUPTS(CLBR_NONE)
         TRACE_IRQS_OFF
         testl $3,CS-ARGOFFSET(%rsp)
         je retint_restore_args
         movl $_TIF_ALLWORK_MASK,%edi
         /* edi: mask to check */
-int_with_check:
+GLOBAL(int_with_check)
         LOCKDEP_SYS_EXIT_IRQ
         GET_THREAD_INFO(%rcx)
         movl TI_flags(%rcx),%edx
@@ -833,11 +829,11 @@ common_interrupt:
         XCPT_FRAME
         addq $-0x80,(%rsp)              /* Adjust vector to [-256,-1] range */
         interrupt do_IRQ
-        /* 0(%rsp): oldrsp-ARGOFFSET */
+        /* 0(%rsp): old_rsp-ARGOFFSET */
 ret_from_intr:
         DISABLE_INTERRUPTS(CLBR_NONE)
         TRACE_IRQS_OFF
-        decl %gs:pda_irqcount
+        decl PER_CPU_VAR(irq_count)
         leaveq
         CFI_DEF_CFA_REGISTER    rsp
         CFI_ADJUST_CFA_OFFSET   -8
@@ -982,8 +978,10 @@ apicinterrupt IRQ_MOVE_CLEANUP_VECTOR \
         irq_move_cleanup_interrupt smp_irq_move_cleanup_interrupt
 #endif
 
+#ifdef CONFIG_X86_UV
 apicinterrupt UV_BAU_MESSAGE \
         uv_bau_message_intr1 uv_bau_message_interrupt
+#endif
 apicinterrupt LOCAL_TIMER_VECTOR \
         apic_timer_interrupt smp_apic_timer_interrupt
 
@@ -1073,10 +1071,10 @@ ENTRY(\sym)
         TRACE_IRQS_OFF
         movq %rsp,%rdi          /* pt_regs pointer */
         xorl %esi,%esi          /* no error code */
-        movq %gs:pda_data_offset, %rbp
-        subq $EXCEPTION_STKSZ, per_cpu__init_tss + TSS_ist + (\ist - 1) * 8(%rbp)
+        PER_CPU(init_tss, %rbp)
+        subq $EXCEPTION_STKSZ, TSS_ist + (\ist - 1) * 8(%rbp)
         call \do_sym
-        addq $EXCEPTION_STKSZ, per_cpu__init_tss + TSS_ist + (\ist - 1) * 8(%rbp)
+        addq $EXCEPTION_STKSZ, TSS_ist + (\ist - 1) * 8(%rbp)
         jmp paranoid_exit       /* %ebx: no swapgs flag */
         CFI_ENDPROC
 END(\sym)
@@ -1138,7 +1136,7 @@ ENTRY(native_load_gs_index)
         CFI_STARTPROC
         pushf
         CFI_ADJUST_CFA_OFFSET 8
-        DISABLE_INTERRUPTS(CLBR_ANY | ~(CLBR_RDI))
+        DISABLE_INTERRUPTS(CLBR_ANY & ~CLBR_RDI)
         SWAPGS
 gs_change:
         movl %edi,%gs
@@ -1260,14 +1258,14 @@ ENTRY(call_softirq)
         CFI_REL_OFFSET rbp,0
         mov  %rsp,%rbp
         CFI_DEF_CFA_REGISTER rbp
-        incl %gs:pda_irqcount
-        cmove %gs:pda_irqstackptr,%rsp
+        incl PER_CPU_VAR(irq_count)
+        cmove PER_CPU_VAR(irq_stack_ptr),%rsp
         push  %rbp                      # backlink for old unwinder
         call __do_softirq
         leaveq
         CFI_DEF_CFA_REGISTER    rsp
         CFI_ADJUST_CFA_OFFSET   -8
-        decl %gs:pda_irqcount
+        decl PER_CPU_VAR(irq_count)
         ret
         CFI_ENDPROC
 END(call_softirq)
@@ -1297,15 +1295,15 @@ ENTRY(xen_do_hypervisor_callback)   # do_hypervisor_callback(struct *pt_regs)
         movq %rdi, %rsp            # we don't return, adjust the stack frame
         CFI_ENDPROC
         DEFAULT_FRAME
-11:     incl %gs:pda_irqcount
+11:     incl PER_CPU_VAR(irq_count)
         movq %rsp,%rbp
         CFI_DEF_CFA_REGISTER rbp
-        cmovzq %gs:pda_irqstackptr,%rsp
+        cmovzq PER_CPU_VAR(irq_stack_ptr),%rsp
         pushq %rbp                      # backlink for old unwinder
         call xen_evtchn_do_upcall
         popq %rsp
         CFI_DEF_CFA_REGISTER rsp
-        decl %gs:pda_irqcount
+        decl PER_CPU_VAR(irq_count)
         jmp  error_exit
         CFI_ENDPROC
 END(do_hypervisor_callback)
diff --git a/arch/x86/kernel/es7000_32.c b/arch/x86/kernel/es7000_32.c
deleted file mode 100644
index 53699c931ad4..000000000000
--- a/arch/x86/kernel/es7000_32.c
+++ /dev/null
@@ -1,378 +0,0 @@
-/*
- * Written by: Garry Forsgren, Unisys Corporation
- *             Natalie Protasevich, Unisys Corporation
- * This file contains the code to configure and interface
- * with Unisys ES7000 series hardware system manager.
- *
- * Copyright (c) 2003 Unisys Corporation.  All Rights Reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of version 2 of the GNU General Public License as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it would be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write the Free Software Foundation, Inc., 59
- * Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- * Contact information: Unisys Corporation, Township Line & Union Meeting
- * Roads-A, Unisys Way, Blue Bell, Pennsylvania, 19424, or:
- *
- * http://www.unisys.com
- */
-
-#include <linux/module.h>
-#include <linux/types.h>
-#include <linux/kernel.h>
-#include <linux/smp.h>
-#include <linux/string.h>
-#include <linux/spinlock.h>
-#include <linux/errno.h>
-#include <linux/notifier.h>
-#include <linux/reboot.h>
-#include <linux/init.h>
-#include <linux/acpi.h>
-#include <asm/io.h>
-#include <asm/nmi.h>
-#include <asm/smp.h>
-#include <asm/atomic.h>
-#include <asm/apicdef.h>
-#include <mach_mpparse.h>
-#include <asm/genapic.h>
-#include <asm/setup.h>
-
-/*
- * ES7000 chipsets
- */
-
-#define NON_UNISYS              0
-#define ES7000_CLASSIC          1
-#define ES7000_ZORRO            2
-
-
-#define MIP_REG                 1
-#define MIP_PSAI_REG            4
-
-#define MIP_BUSY                1
-#define MIP_SPIN                0xf0000
-#define MIP_VALID               0x0100000000000000ULL
-#define MIP_PORT(VALUE) ((VALUE >> 32) & 0xffff)
-
-#define MIP_RD_LO(VALUE)        (VALUE & 0xffffffff)
-
-struct mip_reg_info {
-        unsigned long long mip_info;
-        unsigned long long delivery_info;
-        unsigned long long host_reg;
-        unsigned long long mip_reg;
-};
-
-struct part_info {
-        unsigned char type;
-        unsigned char length;
-        unsigned char part_id;
-        unsigned char apic_mode;
-        unsigned long snum;
-        char ptype[16];
-        char sname[64];
-        char pname[64];
-};
-
-struct psai {
-        unsigned long long entry_type;
-        unsigned long long addr;
-        unsigned long long bep_addr;
-};
-
-struct es7000_mem_info {
-        unsigned char type;
-        unsigned char length;
-        unsigned char resv[6];
-        unsigned long long  start;
-        unsigned long long  size;
-};
-
-struct es7000_oem_table {
-        unsigned long long hdr;
-        struct mip_reg_info mip;
-        struct part_info pif;
-        struct es7000_mem_info shm;
-        struct psai psai;
-};
-
-#ifdef CONFIG_ACPI
-
-struct oem_table {
-        struct acpi_table_header Header;
-        u32 OEMTableAddr;
-        u32 OEMTableSize;
-};
-
-extern int find_unisys_acpi_oem_table(unsigned long *oem_addr);
-extern void unmap_unisys_acpi_oem_table(unsigned long oem_addr);
-#endif
-
-struct mip_reg {
-        unsigned long long off_0;
-        unsigned long long off_8;
-        unsigned long long off_10;
-        unsigned long long off_18;
-        unsigned long long off_20;
-        unsigned long long off_28;
-        unsigned long long off_30;
-        unsigned long long off_38;
-};
-
-#define MIP_SW_APIC             0x1020b
-#define MIP_FUNC(VALUE)         (VALUE & 0xff)
-
-/*
- * ES7000 Globals
- */
-
-static volatile unsigned long   *psai = NULL;
-static struct mip_reg           *mip_reg;
-static struct mip_reg           *host_reg;
-static int                      mip_port;
-static unsigned long            mip_addr, host_addr;
-
-int es7000_plat;
-
-/*
- * GSI override for ES7000 platforms.
- */
-
-static unsigned int base;
-
-static int
-es7000_rename_gsi(int ioapic, int gsi)
-{
-        if (es7000_plat == ES7000_ZORRO)
-                return gsi;
-
-        if (!base) {
-                int i;
-                for (i = 0; i < nr_ioapics; i++)
-                        base += nr_ioapic_registers[i];
-        }
-
-        if (!ioapic && (gsi < 16))
-                gsi += base;
-        return gsi;
-}
-
-static int wakeup_secondary_cpu_via_mip(int cpu, unsigned long eip)
-{
-        unsigned long vect = 0, psaival = 0;
-
-        if (psai == NULL)
-                return -1;
-
-        vect = ((unsigned long)__pa(eip)/0x1000) << 16;
-        psaival = (0x1000000 | vect | cpu);
-
-        while (*psai & 0x1000000)
-                ;
-
-        *psai = psaival;
-
-        return 0;
-}
-
-static void noop_wait_for_deassert(atomic_t *deassert_not_used)
-{
-}
-
-static int __init es7000_update_genapic(void)
-{
-        genapic->wakeup_cpu = wakeup_secondary_cpu_via_mip;
-
-        /* MPENTIUMIII */
-        if (boot_cpu_data.x86 == 6 &&
-            (boot_cpu_data.x86_model >= 7 || boot_cpu_data.x86_model <= 11)) {
-                es7000_update_genapic_to_cluster();
-                genapic->wait_for_init_deassert = noop_wait_for_deassert;
-                genapic->wakeup_cpu = wakeup_secondary_cpu_via_mip;
-        }
-
-        return 0;
-}
-
-void __init
-setup_unisys(void)
-{
-        /*
-         * Determine the generation of the ES7000 currently running.
-         *
-         * es7000_plat = 1 if the machine is a 5xx ES7000 box
-         * es7000_plat = 2 if the machine is a x86_64 ES7000 box
-         *
-         */
-        if (!(boot_cpu_data.x86 <= 15 && boot_cpu_data.x86_model <= 2))
-                es7000_plat = ES7000_ZORRO;
-        else
-                es7000_plat = ES7000_CLASSIC;
-        ioapic_renumber_irq = es7000_rename_gsi;
-
-        x86_quirks->update_genapic = es7000_update_genapic;
-}
-
-/*
- * Parse the OEM Table
- */
-
-int __init
-parse_unisys_oem (char *oemptr)
-{
-        int                     i;
-        int                     success = 0;
-        unsigned char           type, size;
-        unsigned long           val;
-        char                    *tp = NULL;
-        struct psai             *psaip = NULL;
-        struct mip_reg_info     *mi;
-        struct mip_reg          *host, *mip;
-
-        tp = oemptr;
-
-        tp += 8;
-
-        for (i=0; i <= 6; i++) {
-                type = *tp++;
-                size = *tp++;
-                tp -= 2;
-                switch (type) {
-                case MIP_REG:
-                        mi = (struct mip_reg_info *)tp;
-                        val = MIP_RD_LO(mi->host_reg);
-                        host_addr = val;
-                        host = (struct mip_reg *)val;
-                        host_reg = __va(host);
-                        val = MIP_RD_LO(mi->mip_reg);
-                        mip_port = MIP_PORT(mi->mip_info);
-                        mip_addr = val;
-                        mip = (struct mip_reg *)val;
-                        mip_reg = __va(mip);
-                        pr_debug("es7000_mipcfg: host_reg = 0x%lx \n",
-                                 (unsigned long)host_reg);
-                        pr_debug("es7000_mipcfg: mip_reg = 0x%lx \n",
-                                 (unsigned long)mip_reg);
-                        success++;
-                        break;
-                case MIP_PSAI_REG:
-                        psaip = (struct psai *)tp;
-                        if (tp != NULL) {
-                                if (psaip->addr)
-                                        psai = __va(psaip->addr);
-                                else
-                                        psai = NULL;
-                                success++;
-                        }
-                        break;
-                default:
-                        break;
-                }
-                tp += size;
-        }
-
-        if (success < 2) {
-                es7000_plat = NON_UNISYS;
-        } else
-                setup_unisys();
-        return es7000_plat;
-}
-
-#ifdef CONFIG_ACPI
-static unsigned long oem_addrX;
-static unsigned long oem_size;
-int __init find_unisys_acpi_oem_table(unsigned long *oem_addr)
-{
-        struct acpi_table_header *header = NULL;
-        int i = 0;
-
-        while (ACPI_SUCCESS(acpi_get_table("OEM1", i++, &header))) {
-                if (!memcmp((char *) &header->oem_id, "UNISYS", 6)) {
-                        struct oem_table *t = (struct oem_table *)header;
-
-                        oem_addrX = t->OEMTableAddr;
-                        oem_size = t->OEMTableSize;
-
-                        *oem_addr = (unsigned long)__acpi_map_table(oem_addrX,
-                                                                    oem_size);
-                        return 0;
-                }
-        }
-        return -1;
-}
-
-void __init unmap_unisys_acpi_oem_table(unsigned long oem_addr)
-{
-}
-#endif
-
-static void
-es7000_spin(int n)
-{
-        int i = 0;
-
-        while (i++ < n)
-                rep_nop();
-}
-
-static int __init
-es7000_mip_write(struct mip_reg *mip_reg)
-{
-        int                     status = 0;
-        int                     spin;
-
-        spin = MIP_SPIN;
-        while (((unsigned long long)host_reg->off_38 &
-                (unsigned long long)MIP_VALID) != 0) {
-                        if (--spin <= 0) {
-                                printk("es7000_mip_write: Timeout waiting for Host Valid Flag");
-                                return -1;
-                        }
-                es7000_spin(MIP_SPIN);
-        }
-
-        memcpy(host_reg, mip_reg, sizeof(struct mip_reg));
-        outb(1, mip_port);
-
-        spin = MIP_SPIN;
-
-        while (((unsigned long long)mip_reg->off_38 &
-                (unsigned long long)MIP_VALID) == 0) {
-                if (--spin <= 0) {
-                        printk("es7000_mip_write: Timeout waiting for MIP Valid Flag");
-                        return -1;
-                }
-                es7000_spin(MIP_SPIN);
-        }
-
-        status = ((unsigned long long)mip_reg->off_0 &
-                (unsigned long long)0xffff0000000000ULL) >> 48;
-        mip_reg->off_38 = ((unsigned long long)mip_reg->off_38 &
-                (unsigned long long)~MIP_VALID);
-        return status;
-}
-
-void __init
-es7000_sw_apic(void)
-{
-        if (es7000_plat) {
-                int mip_status;
-                struct mip_reg es7000_mip_reg;
-
-                printk("ES7000: Enabling APIC mode.\n");
-                memset(&es7000_mip_reg, 0, sizeof(struct mip_reg));
-                es7000_mip_reg.off_0 = MIP_SW_APIC;
-                es7000_mip_reg.off_38 = (MIP_VALID);
-                while ((mip_status = es7000_mip_write(&es7000_mip_reg)) != 0)
-                        printk("es7000_sw_apic: command failed, status = %x\n",
-                                mip_status);
-                return;
-        }
-}
diff --git a/arch/x86/kernel/head64.c b/arch/x86/kernel/head64.c
index b9a4d8c4b935..f5b272247690 100644
--- a/arch/x86/kernel/head64.c
+++ b/arch/x86/kernel/head64.c
@@ -26,27 +26,6 @@
 #include <asm/bios_ebda.h>
 #include <asm/trampoline.h>
 
-/* boot cpu pda */
-static struct x8664_pda _boot_cpu_pda;
-
-#ifdef CONFIG_SMP
-/*
- * We install an empty cpu_pda pointer table to indicate to early users
- * (numa_set_node) that the cpu_pda pointer table for cpus other than
- * the boot cpu is not yet setup.
- */
-static struct x8664_pda *__cpu_pda[NR_CPUS] __initdata;
-#else
-static struct x8664_pda *__cpu_pda[NR_CPUS] __read_mostly;
-#endif
-
-void __init x86_64_init_pda(void)
-{
-        _cpu_pda = __cpu_pda;
-        cpu_pda(0) = &_boot_cpu_pda;
-        pda_init(0);
-}
-
 static void __init zap_identity_mappings(void)
 {
         pgd_t *pgd = pgd_offset_k(0UL);
@@ -112,8 +91,6 @@ void __init x86_64_start_kernel(char * real_mode_data)
         if (console_loglevel == 10)
                 early_printk("Kernel alive\n");
 
-        x86_64_init_pda();
-
         x86_64_start_reservations(real_mode_data);
 }
 
diff --git a/arch/x86/kernel/head_32.S b/arch/x86/kernel/head_32.S
index e835b4eea70b..c32ca19d591a 100644
--- a/arch/x86/kernel/head_32.S
+++ b/arch/x86/kernel/head_32.S
@@ -11,14 +11,15 @@
 #include <linux/init.h>
 #include <linux/linkage.h>
 #include <asm/segment.h>
-#include <asm/page.h>
-#include <asm/pgtable.h>
+#include <asm/page_types.h>
+#include <asm/pgtable_types.h>
 #include <asm/desc.h>
 #include <asm/cache.h>
 #include <asm/thread_info.h>
 #include <asm/asm-offsets.h>
 #include <asm/setup.h>
 #include <asm/processor-flags.h>
+#include <asm/percpu.h>
 
 /* Physical address */
 #define pa(X) ((X) - __PAGE_OFFSET)
@@ -429,14 +430,34 @@ is386:	movl $2,%ecx		# set MP
         ljmp $(__KERNEL_CS),$1f
 1:      movl $(__KERNEL_DS),%eax        # reload all the segment registers
         movl %eax,%ss                   # after changing gdt.
-        movl %eax,%fs                   # gets reset once there's real percpu
 
         movl $(__USER_DS),%eax          # DS/ES contains default USER segment
         movl %eax,%ds
         movl %eax,%es
 
-        xorl %eax,%eax                  # Clear GS and LDT
+        movl $(__KERNEL_PERCPU), %eax
+        movl %eax,%fs                   # set this cpu's percpu
+
+#ifdef CONFIG_CC_STACKPROTECTOR
+        /*
+         * The linker can't handle this by relocation.  Manually set
+         * base address in stack canary segment descriptor.
+         */
+        cmpb $0,ready
+        jne 1f
+        movl $per_cpu__gdt_page,%eax
+        movl $per_cpu__stack_canary,%ecx
+        subl $20, %ecx
+        movw %cx, 8 * GDT_ENTRY_STACK_CANARY + 2(%eax)
+        shrl $16, %ecx
+        movb %cl, 8 * GDT_ENTRY_STACK_CANARY + 4(%eax)
+        movb %ch, 8 * GDT_ENTRY_STACK_CANARY + 7(%eax)
+1:
+#endif
+        movl $(__KERNEL_STACK_CANARY),%eax
         movl %eax,%gs
+
+        xorl %eax,%eax                  # Clear LDT
         lldt %ax
 
         cld                     # gcc2 wants the direction flag cleared at all times
@@ -446,8 +467,6 @@ is386:	movl $2,%ecx		# set MP
         movb $1, ready
         cmpb $0,%cl             # the first CPU calls start_kernel
         je   1f
-        movl $(__KERNEL_PERCPU), %eax
-        movl %eax,%fs           # set this cpu's percpu
         movl (stack_start), %esp
 1:
 #endif /* CONFIG_SMP */
@@ -548,12 +567,8 @@ early_fault:
         pushl %eax
         pushl %edx              /* trapno */
         pushl $fault_msg
-#ifdef CONFIG_EARLY_PRINTK
-        call early_printk
-#else
         call printk
 #endif
-#endif
         call dump_stack
 hlt_loop:
         hlt
@@ -580,11 +595,10 @@ ignore_int:
         pushl 32(%esp)
         pushl 40(%esp)
         pushl $int_msg
-#ifdef CONFIG_EARLY_PRINTK
-        call early_printk
-#else
         call printk
-#endif
+
+        call dump_stack
+
         addl $(5*4),%esp
         popl %ds
         popl %es
@@ -660,7 +674,7 @@ early_recursion_flag:
         .long 0
 
 int_msg:
-        .asciz "Unknown interrupt or fault at EIP %p %p %p\n"
+        .asciz "Unknown interrupt or fault at: %p %p %p\n"
 
 fault_msg:
 /* fault info: */
diff --git a/arch/x86/kernel/head_64.S b/arch/x86/kernel/head_64.S
index 0e275d495563..54b29bb24e71 100644
--- a/arch/x86/kernel/head_64.S
+++ b/arch/x86/kernel/head_64.S
@@ -19,6 +19,7 @@
 #include <asm/msr.h>
 #include <asm/cache.h>
 #include <asm/processor-flags.h>
+#include <asm/percpu.h>
 
 #ifdef CONFIG_PARAVIRT
 #include <asm/asm-offsets.h>
@@ -226,12 +227,15 @@ ENTRY(secondary_startup_64)
         movl %eax,%fs
         movl %eax,%gs
 
-        /* 
-         * Setup up a dummy PDA. this is just for some early bootup code
-         * that does in_interrupt() 
-         */ 
+        /* Set up %gs.
+         *
+         * The base of %gs always points to the bottom of the irqstack
+         * union.  If the stack protector canary is enabled, it is
+         * located at %gs:40.  Note that, on SMP, the boot cpu uses
+         * init data section till per cpu areas are set up.
+         */
         movl    $MSR_GS_BASE,%ecx
-        movq    $empty_zero_page,%rax
+        movq    initial_gs(%rip),%rax
         movq    %rax,%rdx
         shrq    $32,%rdx
         wrmsr   
@@ -257,6 +261,8 @@ ENTRY(secondary_startup_64)
         .align  8
         ENTRY(initial_code)
         .quad   x86_64_start_kernel
+        ENTRY(initial_gs)
+        .quad   INIT_PER_CPU_VAR(irq_stack_union)
         __FINITDATA
 
         ENTRY(stack_start)
@@ -323,8 +329,6 @@ early_idt_ripmsg:
 #endif /* CONFIG_EARLY_PRINTK */
         .previous
 
-.balign PAGE_SIZE
-
 #define NEXT_PAGE(name) \
         .balign PAGE_SIZE; \
 ENTRY(name)
@@ -401,7 +405,8 @@ NEXT_PAGE(level2_spare_pgt)
         .globl early_gdt_descr
 early_gdt_descr:
         .word   GDT_ENTRIES*8-1
-        .quad   per_cpu__gdt_page
+early_gdt_descr_base:
+        .quad   INIT_PER_CPU_VAR(gdt_page)
 
 ENTRY(phys_base)
         /* This must match the first entry in level2_kernel_pgt */
@@ -412,7 +417,7 @@ ENTRY(phys_base)
         .section .bss, "aw", @nobits
         .align L1_CACHE_BYTES
 ENTRY(idt_table)
-        .skip 256 * 16
+        .skip IDT_ENTRIES * 16
 
         .section .bss.page_aligned, "aw", @nobits
         .align PAGE_SIZE
diff --git a/arch/x86/kernel/hpet.c b/arch/x86/kernel/hpet.c
index a00545fe5cdd..648b3a2a3a44 100644
--- a/arch/x86/kernel/hpet.c
+++ b/arch/x86/kernel/hpet.c
@@ -80,6 +80,7 @@ static inline void hpet_clear_mapping(void)
  */
 static int boot_hpet_disable;
 int hpet_force_user;
+static int hpet_verbose;
 
 static int __init hpet_setup(char *str)
 {
@@ -88,6 +89,8 @@ static int __init hpet_setup(char *str)
                         boot_hpet_disable = 1;
                 if (!strncmp("force", str, 5))
                         hpet_force_user = 1;
+                if (!strncmp("verbose", str, 7))
+                        hpet_verbose = 1;
         }
         return 1;
 }
@@ -119,6 +122,43 @@ int is_hpet_enabled(void)
 }
 EXPORT_SYMBOL_GPL(is_hpet_enabled);
 
+static void _hpet_print_config(const char *function, int line)
+{
+        u32 i, timers, l, h;
+        printk(KERN_INFO "hpet: %s(%d):\n", function, line);
+        l = hpet_readl(HPET_ID);
+        h = hpet_readl(HPET_PERIOD);
+        timers = ((l & HPET_ID_NUMBER) >> HPET_ID_NUMBER_SHIFT) + 1;
+        printk(KERN_INFO "hpet: ID: 0x%x, PERIOD: 0x%x\n", l, h);
+        l = hpet_readl(HPET_CFG);
+        h = hpet_readl(HPET_STATUS);
+        printk(KERN_INFO "hpet: CFG: 0x%x, STATUS: 0x%x\n", l, h);
+        l = hpet_readl(HPET_COUNTER);
+        h = hpet_readl(HPET_COUNTER+4);
+        printk(KERN_INFO "hpet: COUNTER_l: 0x%x, COUNTER_h: 0x%x\n", l, h);
+
+        for (i = 0; i < timers; i++) {
+                l = hpet_readl(HPET_Tn_CFG(i));
+                h = hpet_readl(HPET_Tn_CFG(i)+4);
+                printk(KERN_INFO "hpet: T%d: CFG_l: 0x%x, CFG_h: 0x%x\n",
+                       i, l, h);
+                l = hpet_readl(HPET_Tn_CMP(i));
+                h = hpet_readl(HPET_Tn_CMP(i)+4);
+                printk(KERN_INFO "hpet: T%d: CMP_l: 0x%x, CMP_h: 0x%x\n",
+                       i, l, h);
+                l = hpet_readl(HPET_Tn_ROUTE(i));
+                h = hpet_readl(HPET_Tn_ROUTE(i)+4);
+                printk(KERN_INFO "hpet: T%d ROUTE_l: 0x%x, ROUTE_h: 0x%x\n",
+                       i, l, h);
+        }
+}
+
+#define hpet_print_config()                                     \
+do {                                                            \
+        if (hpet_verbose)                                       \
+                _hpet_print_config(__FUNCTION__, __LINE__);     \
+} while (0)
+
 /*
  * When the hpet driver (/dev/hpet) is enabled, we need to reserve
  * timer 0 and timer 1 in case of RTC emulation.
@@ -191,27 +231,37 @@ static struct clock_event_device hpet_clockevent = {
         .rating         = 50,
 };
 
-static void hpet_start_counter(void)
+static void hpet_stop_counter(void)
 {
         unsigned long cfg = hpet_readl(HPET_CFG);
-
         cfg &= ~HPET_CFG_ENABLE;
         hpet_writel(cfg, HPET_CFG);
         hpet_writel(0, HPET_COUNTER);
         hpet_writel(0, HPET_COUNTER + 4);
+}
+
+static void hpet_start_counter(void)
+{
+        unsigned long cfg = hpet_readl(HPET_CFG);
         cfg |= HPET_CFG_ENABLE;
         hpet_writel(cfg, HPET_CFG);
 }
 
+static void hpet_restart_counter(void)
+{
+        hpet_stop_counter();
+        hpet_start_counter();
+}
+
 static void hpet_resume_device(void)
 {
         force_hpet_resume();
 }
 
-static void hpet_restart_counter(void)
+static void hpet_resume_counter(void)
 {
         hpet_resume_device();
-        hpet_start_counter();
+        hpet_restart_counter();
 }
 
 static void hpet_enable_legacy_int(void)
@@ -259,29 +309,23 @@ static int hpet_setup_msi_irq(unsigned int irq);
 static void hpet_set_mode(enum clock_event_mode mode,
                           struct clock_event_device *evt, int timer)
 {
-        unsigned long cfg, cmp, now;
+        unsigned long cfg;
         uint64_t delta;
 
         switch (mode) {
         case CLOCK_EVT_MODE_PERIODIC:
+                hpet_stop_counter();
                 delta = ((uint64_t)(NSEC_PER_SEC/HZ)) * evt->mult;
                 delta >>= evt->shift;
-                now = hpet_readl(HPET_COUNTER);
-                cmp = now + (unsigned long) delta;
                 cfg = hpet_readl(HPET_Tn_CFG(timer));
                 /* Make sure we use edge triggered interrupts */
                 cfg &= ~HPET_TN_LEVEL;
                 cfg |= HPET_TN_ENABLE | HPET_TN_PERIODIC |
                        HPET_TN_SETVAL | HPET_TN_32BIT;
                 hpet_writel(cfg, HPET_Tn_CFG(timer));
-                /*
-                 * The first write after writing TN_SETVAL to the
-                 * config register sets the counter value, the second
-                 * write sets the period.
-                 */
-                hpet_writel(cmp, HPET_Tn_CMP(timer));
-                udelay(1);
                 hpet_writel((unsigned long) delta, HPET_Tn_CMP(timer));
+                hpet_start_counter();
+                hpet_print_config();
                 break;
 
         case CLOCK_EVT_MODE_ONESHOT:
@@ -308,6 +352,7 @@ static void hpet_set_mode(enum clock_event_mode mode,
                         irq_set_affinity(hdev->irq, cpumask_of(hdev->cpu));
                         enable_irq(hdev->irq);
                 }
+                hpet_print_config();
                 break;
         }
 }
@@ -526,6 +571,7 @@ static void hpet_msi_capability_lookup(unsigned int start_timer)
 
         num_timers = ((id & HPET_ID_NUMBER) >> HPET_ID_NUMBER_SHIFT);
         num_timers++; /* Value read out starts from 0 */
+        hpet_print_config();
 
         hpet_devs = kzalloc(sizeof(struct hpet_dev) * num_timers, GFP_KERNEL);
         if (!hpet_devs)
@@ -695,7 +741,7 @@ static struct clocksource clocksource_hpet = {
         .mask           = HPET_MASK,
         .shift          = HPET_SHIFT,
         .flags          = CLOCK_SOURCE_IS_CONTINUOUS,
-        .resume         = hpet_restart_counter,
+        .resume         = hpet_resume_counter,
 #ifdef CONFIG_X86_64
         .vread          = vread_hpet,
 #endif
@@ -707,7 +753,7 @@ static int hpet_clocksource_register(void)
         cycle_t t1;
 
         /* Start the counter */
-        hpet_start_counter();
+        hpet_restart_counter();
 
         /* Verify whether hpet counter works */
         t1 = read_hpet();
@@ -793,6 +839,7 @@ int __init hpet_enable(void)
          * information and the number of channels
          */
         id = hpet_readl(HPET_ID);
+        hpet_print_config();
 
 #ifdef CONFIG_HPET_EMULATE_RTC
         /*
@@ -845,6 +892,7 @@ static __init int hpet_late_init(void)
                 return -ENODEV;
 
         hpet_reserve_platform_timers(hpet_readl(HPET_ID));
+        hpet_print_config();
 
         for_each_online_cpu(cpu) {
                 hpet_cpuhp_notify(NULL, CPU_ONLINE, (void *)(long)cpu);
diff --git a/arch/x86/kernel/i8259.c b/arch/x86/kernel/i8259.c
index 11d5093eb281..df89102bef80 100644
--- a/arch/x86/kernel/i8259.c
+++ b/arch/x86/kernel/i8259.c
@@ -22,7 +22,6 @@
 #include <asm/pgtable.h>
 #include <asm/desc.h>
 #include <asm/apic.h>
-#include <asm/arch_hooks.h>
 #include <asm/i8259.h>
 
 /*
diff --git a/arch/x86/kernel/ioport.c b/arch/x86/kernel/ioport.c
index b12208f4dfee..99c4d308f16b 100644
--- a/arch/x86/kernel/ioport.c
+++ b/arch/x86/kernel/ioport.c
@@ -85,19 +85,8 @@ asmlinkage long sys_ioperm(unsigned long from, unsigned long num, int turn_on)
 
         t->io_bitmap_max = bytes;
 
-#ifdef CONFIG_X86_32
-        /*
-         * Sets the lazy trigger so that the next I/O operation will
-         * reload the correct bitmap.
-         * Reset the owner so that a process switch will not set
-         * tss->io_bitmap_base to IO_BITMAP_OFFSET.
-         */
-        tss->x86_tss.io_bitmap_base = INVALID_IO_BITMAP_OFFSET_LAZY;
-        tss->io_bitmap_owner = NULL;
-#else
         /* Update the TSS: */
         memcpy(tss->io_bitmap, t->io_bitmap_ptr, bytes_updated);
-#endif
 
         put_cpu();
 
@@ -131,9 +120,8 @@ static int do_iopl(unsigned int level, struct pt_regs *regs)
 }
 
 #ifdef CONFIG_X86_32
-asmlinkage long sys_iopl(unsigned long regsp)
+long sys_iopl(struct pt_regs *regs)
 {
-        struct pt_regs *regs = (struct pt_regs *)&regsp;
         unsigned int level = regs->bx;
         struct thread_struct *t = &current->thread;
         int rc;
diff --git a/arch/x86/kernel/ipi.c b/arch/x86/kernel/ipi.c
deleted file mode 100644
index 285bbf8831fa..000000000000
--- a/arch/x86/kernel/ipi.c
+++ /dev/null
@@ -1,190 +0,0 @@
-#include <linux/cpumask.h>
-#include <linux/interrupt.h>
-#include <linux/init.h>
-
-#include <linux/mm.h>
-#include <linux/delay.h>
-#include <linux/spinlock.h>
-#include <linux/kernel_stat.h>
-#include <linux/mc146818rtc.h>
-#include <linux/cache.h>
-#include <linux/cpu.h>
-#include <linux/module.h>
-
-#include <asm/smp.h>
-#include <asm/mtrr.h>
-#include <asm/tlbflush.h>
-#include <asm/mmu_context.h>
-#include <asm/apic.h>
-#include <asm/proto.h>
-
-#ifdef CONFIG_X86_32
-#include <mach_apic.h>
-#include <mach_ipi.h>
-
-/*
- * the following functions deal with sending IPIs between CPUs.
- *
- * We use 'broadcast', CPU->CPU IPIs and self-IPIs too.
- */
-
-static inline int __prepare_ICR(unsigned int shortcut, int vector)
-{
-        unsigned int icr = shortcut | APIC_DEST_LOGICAL;
-
-        switch (vector) {
-        default:
-                icr |= APIC_DM_FIXED | vector;
-                break;
-        case NMI_VECTOR:
-                icr |= APIC_DM_NMI;
-                break;
-        }
-        return icr;
-}
-
-static inline int __prepare_ICR2(unsigned int mask)
-{
-        return SET_APIC_DEST_FIELD(mask);
-}
-
-void __send_IPI_shortcut(unsigned int shortcut, int vector)
-{
-        /*
-         * Subtle. In the case of the 'never do double writes' workaround
-         * we have to lock out interrupts to be safe.  As we don't care
-         * of the value read we use an atomic rmw access to avoid costly
-         * cli/sti.  Otherwise we use an even cheaper single atomic write
-         * to the APIC.
-         */
-        unsigned int cfg;
-
-        /*
-         * Wait for idle.
-         */
-        apic_wait_icr_idle();
-
-        /*
-         * No need to touch the target chip field
-         */
-        cfg = __prepare_ICR(shortcut, vector);
-
-        /*
-         * Send the IPI. The write to APIC_ICR fires this off.
-         */
-        apic_write(APIC_ICR, cfg);
-}
-
-void send_IPI_self(int vector)
-{
-        __send_IPI_shortcut(APIC_DEST_SELF, vector);
-}
-
-/*
- * This is used to send an IPI with no shorthand notation (the destination is
- * specified in bits 56 to 63 of the ICR).
- */
-static inline void __send_IPI_dest_field(unsigned long mask, int vector)
-{
-        unsigned long cfg;
-
-        /*
-         * Wait for idle.
-         */
-        if (unlikely(vector == NMI_VECTOR))
-                safe_apic_wait_icr_idle();
-        else
-                apic_wait_icr_idle();
-
-        /*
-         * prepare target chip field
-         */
-        cfg = __prepare_ICR2(mask);
-        apic_write(APIC_ICR2, cfg);
-
-        /*
-         * program the ICR
-         */
-        cfg = __prepare_ICR(0, vector);
-
-        /*
-         * Send the IPI. The write to APIC_ICR fires this off.
-         */
-        apic_write(APIC_ICR, cfg);
-}
-
-/*
- * This is only used on smaller machines.
- */
-void send_IPI_mask_bitmask(const struct cpumask *cpumask, int vector)
-{
-        unsigned long mask = cpumask_bits(cpumask)[0];
-        unsigned long flags;
-
-        local_irq_save(flags);
-        WARN_ON(mask & ~cpumask_bits(cpu_online_mask)[0]);
-        __send_IPI_dest_field(mask, vector);
-        local_irq_restore(flags);
-}
-
-void send_IPI_mask_sequence(const struct cpumask *mask, int vector)
-{
-        unsigned long flags;
-        unsigned int query_cpu;
-
-        /*
-         * Hack. The clustered APIC addressing mode doesn't allow us to send
-         * to an arbitrary mask, so I do a unicasts to each CPU instead. This
-         * should be modified to do 1 message per cluster ID - mbligh
-         */
-
-        local_irq_save(flags);
-        for_each_cpu(query_cpu, mask)
-                __send_IPI_dest_field(cpu_to_logical_apicid(query_cpu), vector);
-        local_irq_restore(flags);
-}
-
-void send_IPI_mask_allbutself(const struct cpumask *mask, int vector)
-{
-        unsigned long flags;
-        unsigned int query_cpu;
-        unsigned int this_cpu = smp_processor_id();
-
-        /* See Hack comment above */
-
-        local_irq_save(flags);
-        for_each_cpu(query_cpu, mask)
-                if (query_cpu != this_cpu)
-                        __send_IPI_dest_field(cpu_to_logical_apicid(query_cpu),
-                                              vector);
-        local_irq_restore(flags);
-}
-
-/* must come after the send_IPI functions above for inlining */
-static int convert_apicid_to_cpu(int apic_id)
-{
-        int i;
-
-        for_each_possible_cpu(i) {
-                if (per_cpu(x86_cpu_to_apicid, i) == apic_id)
-                        return i;
-        }
-        return -1;
-}
-
-int safe_smp_processor_id(void)
-{
-        int apicid, cpuid;
-
-        if (!boot_cpu_has(X86_FEATURE_APIC))
-                return 0;
-
-        apicid = hard_smp_processor_id();
-        if (apicid == BAD_APICID)
-                return 0;
-
-        cpuid = convert_apicid_to_cpu(apicid);
-
-        return cpuid >= 0 ? cpuid : 0;
-}
-#endif
diff --git a/arch/x86/kernel/irq.c b/arch/x86/kernel/irq.c
index 3973e2df7f87..f13ca1650aaf 100644
--- a/arch/x86/kernel/irq.c
+++ b/arch/x86/kernel/irq.c
@@ -6,10 +6,12 @@
 #include <linux/kernel_stat.h>
 #include <linux/seq_file.h>
 #include <linux/smp.h>
+#include <linux/ftrace.h>
 
 #include <asm/apic.h>
 #include <asm/io_apic.h>
 #include <asm/irq.h>
+#include <asm/idle.h>
 
 atomic_t irq_err_count;
 
@@ -36,11 +38,7 @@ void ack_bad_irq(unsigned int irq)
 #endif
 }
 
-#ifdef CONFIG_X86_32
-# define irq_stats(x)           (&per_cpu(irq_stat, x))
-#else
-# define irq_stats(x)           cpu_pda(x)
-#endif
+#define irq_stats(x)            (&per_cpu(irq_stat, x))
 /*
  * /proc/interrupts printing:
  */
@@ -192,4 +190,40 @@ u64 arch_irq_stat(void)
         return sum;
 }
 
+
+/*
+ * do_IRQ handles all normal device IRQ's (the special
+ * SMP cross-CPU interrupts have their own specific
+ * handlers).
+ */
+unsigned int __irq_entry do_IRQ(struct pt_regs *regs)
+{
+        struct pt_regs *old_regs = set_irq_regs(regs);
+
+        /* high bit used in ret_from_ code  */
+        unsigned vector = ~regs->orig_ax;
+        unsigned irq;
+
+        exit_idle();
+        irq_enter();
+
+        irq = __get_cpu_var(vector_irq)[vector];
+
+        if (!handle_irq(irq, regs)) {
+#ifdef CONFIG_X86_64
+                if (!disable_apic)
+                        ack_APIC_irq();
+#endif
+
+                if (printk_ratelimit())
+                        printk(KERN_EMERG "%s: %d.%d No irq handler for vector (irq %d)\n",
+                               __func__, smp_processor_id(), vector, irq);
+        }
+
+        irq_exit();
+
+        set_irq_regs(old_regs);
+        return 1;
+}
+
 EXPORT_SYMBOL_GPL(vector_used_by_percpu_irq);
diff --git a/arch/x86/kernel/irq_32.c b/arch/x86/kernel/irq_32.c
index 74b9ff7341e9..3b09634a5153 100644
--- a/arch/x86/kernel/irq_32.c
+++ b/arch/x86/kernel/irq_32.c
@@ -16,6 +16,7 @@
 #include <linux/cpu.h>
 #include <linux/delay.h>
 #include <linux/uaccess.h>
+#include <linux/percpu.h>
 
 #include <asm/apic.h>
 
@@ -55,13 +56,13 @@ static inline void print_stack_overflow(void) { }
 union irq_ctx {
         struct thread_info      tinfo;
         u32                     stack[THREAD_SIZE/sizeof(u32)];
-};
+} __attribute__((aligned(PAGE_SIZE)));
 
-static union irq_ctx *hardirq_ctx[NR_CPUS] __read_mostly;
-static union irq_ctx *softirq_ctx[NR_CPUS] __read_mostly;
+static DEFINE_PER_CPU(union irq_ctx *, hardirq_ctx);
+static DEFINE_PER_CPU(union irq_ctx *, softirq_ctx);
 
-static char softirq_stack[NR_CPUS * THREAD_SIZE] __page_aligned_bss;
-static char hardirq_stack[NR_CPUS * THREAD_SIZE] __page_aligned_bss;
+static DEFINE_PER_CPU_PAGE_ALIGNED(union irq_ctx, hardirq_stack);
+static DEFINE_PER_CPU_PAGE_ALIGNED(union irq_ctx, softirq_stack);
 
 static void call_on_stack(void *func, void *stack)
 {
@@ -81,7 +82,7 @@ execute_on_irq_stack(int overflow, struct irq_desc *desc, int irq)
         u32 *isp, arg1, arg2;
 
         curctx = (union irq_ctx *) current_thread_info();
-        irqctx = hardirq_ctx[smp_processor_id()];
+        irqctx = __get_cpu_var(hardirq_ctx);
 
         /*
          * this is where we switch to the IRQ stack. However, if we are
@@ -125,34 +126,34 @@ void __cpuinit irq_ctx_init(int cpu)
 {
         union irq_ctx *irqctx;
 
-        if (hardirq_ctx[cpu])
+        if (per_cpu(hardirq_ctx, cpu))
                 return;
 
-        irqctx = (union irq_ctx*) &hardirq_stack[cpu*THREAD_SIZE];
+        irqctx = &per_cpu(hardirq_stack, cpu);
         irqctx->tinfo.task              = NULL;
         irqctx->tinfo.exec_domain       = NULL;
         irqctx->tinfo.cpu               = cpu;
         irqctx->tinfo.preempt_count     = HARDIRQ_OFFSET;
         irqctx->tinfo.addr_limit        = MAKE_MM_SEG(0);
 
-        hardirq_ctx[cpu] = irqctx;
+        per_cpu(hardirq_ctx, cpu) = irqctx;
 
-        irqctx = (union irq_ctx *) &softirq_stack[cpu*THREAD_SIZE];
+        irqctx = &per_cpu(softirq_stack, cpu);
         irqctx->tinfo.task              = NULL;
         irqctx->tinfo.exec_domain       = NULL;
         irqctx->tinfo.cpu               = cpu;
         irqctx->tinfo.preempt_count     = 0;
         irqctx->tinfo.addr_limit        = MAKE_MM_SEG(0);
 
-        softirq_ctx[cpu] = irqctx;
+        per_cpu(softirq_ctx, cpu) = irqctx;
 
         printk(KERN_DEBUG "CPU %u irqstacks, hard=%p soft=%p\n",
-               cpu, hardirq_ctx[cpu], softirq_ctx[cpu]);
+               cpu, per_cpu(hardirq_ctx, cpu),  per_cpu(softirq_ctx, cpu));
 }
 
 void irq_ctx_exit(int cpu)
 {
-        hardirq_ctx[cpu] = NULL;
+        per_cpu(hardirq_ctx, cpu) = NULL;
 }
 
 asmlinkage void do_softirq(void)
@@ -169,7 +170,7 @@ asmlinkage void do_softirq(void)
 
         if (local_softirq_pending()) {
                 curctx = current_thread_info();
-                irqctx = softirq_ctx[smp_processor_id()];
+                irqctx = __get_cpu_var(softirq_ctx);
                 irqctx->tinfo.task = curctx->task;
                 irqctx->tinfo.previous_esp = current_stack_pointer;
 
@@ -191,33 +192,16 @@ static inline int
 execute_on_irq_stack(int overflow, struct irq_desc *desc, int irq) { return 0; }
 #endif
 
-/*
- * do_IRQ handles all normal device IRQ's (the special
- * SMP cross-CPU interrupts have their own specific
- * handlers).
- */
-unsigned int do_IRQ(struct pt_regs *regs)
+bool handle_irq(unsigned irq, struct pt_regs *regs)
 {
-        struct pt_regs *old_regs;
-        /* high bit used in ret_from_ code */
-        int overflow;
-        unsigned vector = ~regs->orig_ax;
         struct irq_desc *desc;
-        unsigned irq;
-
-
-        old_regs = set_irq_regs(regs);
-        irq_enter();
-        irq = __get_cpu_var(vector_irq)[vector];
+        int overflow;
 
         overflow = check_stack_overflow();
 
         desc = irq_to_desc(irq);
-        if (unlikely(!desc)) {
-                printk(KERN_EMERG "%s: cannot handle IRQ %d vector %#x cpu %d\n",
-                                        __func__, irq, vector, smp_processor_id());
-                BUG();
-        }
+        if (unlikely(!desc))
+                return false;
 
         if (!execute_on_irq_stack(overflow, desc, irq)) {
                 if (unlikely(overflow))
@@ -225,13 +209,10 @@ unsigned int do_IRQ(struct pt_regs *regs)
                 desc->handle_irq(irq, desc);
         }
 
-        irq_exit();
-        set_irq_regs(old_regs);
-        return 1;
+        return true;
 }
 
 #ifdef CONFIG_HOTPLUG_CPU
-#include <mach_apic.h>
 
 /* A cpu has been removed from cpu_online_mask.  Reset irq affinities. */
 void fixup_irqs(void)
@@ -248,7 +229,7 @@ void fixup_irqs(void)
                 if (irq == 2)
                         continue;
 
-                affinity = &desc->affinity;
+                affinity = desc->affinity;
                 if (cpumask_any_and(affinity, cpu_online_mask) >= nr_cpu_ids) {
                         printk("Breaking affinity for irq %i\n", irq);
                         affinity = cpu_all_mask;
diff --git a/arch/x86/kernel/irq_64.c b/arch/x86/kernel/irq_64.c
index 63c88e6ec025..977d8b43a0dd 100644
--- a/arch/x86/kernel/irq_64.c
+++ b/arch/x86/kernel/irq_64.c
@@ -18,6 +18,13 @@
 #include <linux/smp.h>
 #include <asm/io_apic.h>
 #include <asm/idle.h>
+#include <asm/apic.h>
+
+DEFINE_PER_CPU_SHARED_ALIGNED(irq_cpustat_t, irq_stat);
+EXPORT_PER_CPU_SYMBOL(irq_stat);
+
+DEFINE_PER_CPU(struct pt_regs *, irq_regs);
+EXPORT_PER_CPU_SYMBOL(irq_regs);
 
 /*
  * Probabilistic stack overflow check:
@@ -41,42 +48,18 @@ static inline void stack_overflow_check(struct pt_regs *regs)
 #endif
 }
 
-/*
- * do_IRQ handles all normal device IRQ's (the special
- * SMP cross-CPU interrupts have their own specific
- * handlers).
- */
-asmlinkage unsigned int __irq_entry do_IRQ(struct pt_regs *regs)
+bool handle_irq(unsigned irq, struct pt_regs *regs)
 {
-        struct pt_regs *old_regs = set_irq_regs(regs);
         struct irq_desc *desc;
 
-        /* high bit used in ret_from_ code  */
-        unsigned vector = ~regs->orig_ax;
-        unsigned irq;
-
-        exit_idle();
-        irq_enter();
-        irq = __get_cpu_var(vector_irq)[vector];
-
         stack_overflow_check(regs);
 
         desc = irq_to_desc(irq);
-        if (likely(desc))
-                generic_handle_irq_desc(irq, desc);
-        else {
-                if (!disable_apic)
-                        ack_APIC_irq();
-
-                if (printk_ratelimit())
-                        printk(KERN_EMERG "%s: %d.%d No irq handler for vector\n",
-                                __func__, smp_processor_id(), vector);
-        }
-
-        irq_exit();
+        if (unlikely(!desc))
+                return false;
 
-        set_irq_regs(old_regs);
-        return 1;
+        generic_handle_irq_desc(irq, desc);
+        return true;
 }
 
 #ifdef CONFIG_HOTPLUG_CPU
@@ -100,7 +83,7 @@ void fixup_irqs(void)
                 /* interrupt's are disabled at this point */
                 spin_lock(&desc->lock);
 
-                affinity = &desc->affinity;
+                affinity = desc->affinity;
                 if (!irq_has_action(irq) ||
                     cpumask_equal(affinity, cpu_online_mask)) {
                         spin_unlock(&desc->lock);
diff --git a/arch/x86/kernel/irqinit_32.c b/arch/x86/kernel/irqinit_32.c
index 10a09c2f1828..50b8c3a3006c 100644
--- a/arch/x86/kernel/irqinit_32.c
+++ b/arch/x86/kernel/irqinit_32.c
@@ -18,7 +18,7 @@
 #include <asm/pgtable.h>
 #include <asm/desc.h>
 #include <asm/apic.h>
-#include <asm/arch_hooks.h>
+#include <asm/setup.h>
 #include <asm/i8259.h>
 #include <asm/traps.h>
 
@@ -78,6 +78,15 @@ void __init init_ISA_irqs(void)
         }
 }
 
+/*
+ * IRQ2 is cascade interrupt to second interrupt controller
+ */
+static struct irqaction irq2 = {
+        .handler = no_action,
+        .mask = CPU_MASK_NONE,
+        .name = "cascade",
+};
+
 DEFINE_PER_CPU(vector_irq_t, vector_irq) = {
         [0 ... IRQ0_VECTOR - 1] = -1,
         [IRQ0_VECTOR] = 0,
@@ -118,8 +127,8 @@ void __init native_init_IRQ(void)
 {
         int i;
 
-        /* all the set up before the call gates are initialised */
-        pre_intr_init_hook();
+        /* Execute any quirks before the call gates are initialised: */
+        x86_quirk_pre_intr_init();
 
         /*
          * Cover the whole vector space, no vector can escape
@@ -140,8 +149,15 @@ void __init native_init_IRQ(void)
          */
         alloc_intr_gate(RESCHEDULE_VECTOR, reschedule_interrupt);
 
-        /* IPI for invalidation */
-        alloc_intr_gate(INVALIDATE_TLB_VECTOR, invalidate_interrupt);
+        /* IPIs for invalidation */
+        alloc_intr_gate(INVALIDATE_TLB_VECTOR_START+0, invalidate_interrupt0);
+        alloc_intr_gate(INVALIDATE_TLB_VECTOR_START+1, invalidate_interrupt1);
+        alloc_intr_gate(INVALIDATE_TLB_VECTOR_START+2, invalidate_interrupt2);
+        alloc_intr_gate(INVALIDATE_TLB_VECTOR_START+3, invalidate_interrupt3);
+        alloc_intr_gate(INVALIDATE_TLB_VECTOR_START+4, invalidate_interrupt4);
+        alloc_intr_gate(INVALIDATE_TLB_VECTOR_START+5, invalidate_interrupt5);
+        alloc_intr_gate(INVALIDATE_TLB_VECTOR_START+6, invalidate_interrupt6);
+        alloc_intr_gate(INVALIDATE_TLB_VECTOR_START+7, invalidate_interrupt7);
 
         /* IPI for generic function call */
         alloc_intr_gate(CALL_FUNCTION_VECTOR, call_function_interrupt);
@@ -169,10 +185,14 @@ void __init native_init_IRQ(void)
         alloc_intr_gate(THERMAL_APIC_VECTOR, thermal_interrupt);
 #endif
 
-        /* setup after call gates are initialised (usually add in
-         * the architecture specific gates)
+        if (!acpi_ioapic)
+                setup_irq(2, &irq2);
+
+        /*
+         * Call quirks after call gates are initialised (usually add in
+         * the architecture specific gates):
          */
-        intr_init_hook();
+        x86_quirk_intr_init();
 
         /*
          * External FPU? Set up irq13 if so, for
diff --git a/arch/x86/kernel/kgdb.c b/arch/x86/kernel/kgdb.c
index 10435a120d22..eedfaebe1063 100644
--- a/arch/x86/kernel/kgdb.c
+++ b/arch/x86/kernel/kgdb.c
@@ -46,7 +46,7 @@
 #include <asm/apicdef.h>
 #include <asm/system.h>
 
-#include <mach_ipi.h>
+#include <asm/apic.h>
 
 /*
  * Put the error code here just in case the user cares:
@@ -347,7 +347,7 @@ void kgdb_post_primary_code(struct pt_regs *regs, int e_vector, int err_code)
  */
 void kgdb_roundup_cpus(unsigned long flags)
 {
-        send_IPI_allbutself(APIC_DM_NMI);
+        apic->send_IPI_allbutself(APIC_DM_NMI);
 }
 #endif
 
diff --git a/arch/x86/kernel/kvmclock.c b/arch/x86/kernel/kvmclock.c
index 652fce6d2cce..137f2e8132df 100644
--- a/arch/x86/kernel/kvmclock.c
+++ b/arch/x86/kernel/kvmclock.c
@@ -19,7 +19,6 @@
 #include <linux/clocksource.h>
 #include <linux/kvm_para.h>
 #include <asm/pvclock.h>
-#include <asm/arch_hooks.h>
 #include <asm/msr.h>
 #include <asm/apic.h>
 #include <linux/percpu.h>
diff --git a/arch/x86/kernel/machine_kexec_32.c b/arch/x86/kernel/machine_kexec_32.c
index 37f420018a41..f5fc8c781a62 100644
--- a/arch/x86/kernel/machine_kexec_32.c
+++ b/arch/x86/kernel/machine_kexec_32.c
@@ -121,7 +121,7 @@ static void machine_kexec_page_table_set_one(
 static void machine_kexec_prepare_page_tables(struct kimage *image)
 {
         void *control_page;
-        pmd_t *pmd = 0;
+        pmd_t *pmd = NULL;
 
         control_page = page_address(image->control_code_page);
 #ifdef CONFIG_X86_PAE
diff --git a/arch/x86/kernel/machine_kexec_64.c b/arch/x86/kernel/machine_kexec_64.c
index c43caa3a91f3..6993d51b7fd8 100644
--- a/arch/x86/kernel/machine_kexec_64.c
+++ b/arch/x86/kernel/machine_kexec_64.c
@@ -18,15 +18,6 @@
 #include <asm/mmu_context.h>
 #include <asm/io.h>
 
-#define PAGE_ALIGNED __attribute__ ((__aligned__(PAGE_SIZE)))
-static u64 kexec_pgd[512] PAGE_ALIGNED;
-static u64 kexec_pud0[512] PAGE_ALIGNED;
-static u64 kexec_pmd0[512] PAGE_ALIGNED;
-static u64 kexec_pte0[512] PAGE_ALIGNED;
-static u64 kexec_pud1[512] PAGE_ALIGNED;
-static u64 kexec_pmd1[512] PAGE_ALIGNED;
-static u64 kexec_pte1[512] PAGE_ALIGNED;
-
 static void init_level2_page(pmd_t *level2p, unsigned long addr)
 {
         unsigned long end_addr;
@@ -107,12 +98,65 @@ out:
         return result;
 }
 
+static void free_transition_pgtable(struct kimage *image)
+{
+        free_page((unsigned long)image->arch.pud);
+        free_page((unsigned long)image->arch.pmd);
+        free_page((unsigned long)image->arch.pte);
+}
+
+static int init_transition_pgtable(struct kimage *image, pgd_t *pgd)
+{
+        pud_t *pud;
+        pmd_t *pmd;
+        pte_t *pte;
+        unsigned long vaddr, paddr;
+        int result = -ENOMEM;
+
+        vaddr = (unsigned long)relocate_kernel;
+        paddr = __pa(page_address(image->control_code_page)+PAGE_SIZE);
+        pgd += pgd_index(vaddr);
+        if (!pgd_present(*pgd)) {
+                pud = (pud_t *)get_zeroed_page(GFP_KERNEL);
+                if (!pud)
+                        goto err;
+                image->arch.pud = pud;
+                set_pgd(pgd, __pgd(__pa(pud) | _KERNPG_TABLE));
+        }
+        pud = pud_offset(pgd, vaddr);
+        if (!pud_present(*pud)) {
+                pmd = (pmd_t *)get_zeroed_page(GFP_KERNEL);
+                if (!pmd)
+                        goto err;
+                image->arch.pmd = pmd;
+                set_pud(pud, __pud(__pa(pmd) | _KERNPG_TABLE));
+        }
+        pmd = pmd_offset(pud, vaddr);
+        if (!pmd_present(*pmd)) {
+                pte = (pte_t *)get_zeroed_page(GFP_KERNEL);
+                if (!pte)
+                        goto err;
+                image->arch.pte = pte;
+                set_pmd(pmd, __pmd(__pa(pte) | _KERNPG_TABLE));
+        }
+        pte = pte_offset_kernel(pmd, vaddr);
+        set_pte(pte, pfn_pte(paddr >> PAGE_SHIFT, PAGE_KERNEL_EXEC));
+        return 0;
+err:
+        free_transition_pgtable(image);
+        return result;
+}
+
 
 static int init_pgtable(struct kimage *image, unsigned long start_pgtable)
 {
         pgd_t *level4p;
+        int result;
         level4p = (pgd_t *)__va(start_pgtable);
-        return init_level4_page(image, level4p, 0, max_pfn << PAGE_SHIFT);
+        result = init_level4_page(image, level4p, 0, max_pfn << PAGE_SHIFT);
+        if (result)
+                return result;
+        return init_transition_pgtable(image, level4p);
 }
 
 static void set_idt(void *newidt, u16 limit)
@@ -174,7 +218,7 @@ int machine_kexec_prepare(struct kimage *image)
 
 void machine_kexec_cleanup(struct kimage *image)
 {
-        return;
+        free_transition_pgtable(image);
 }
 
 /*
@@ -195,22 +239,6 @@ void machine_kexec(struct kimage *image)
         memcpy(control_page, relocate_kernel, PAGE_SIZE);
 
         page_list[PA_CONTROL_PAGE] = virt_to_phys(control_page);
-        page_list[VA_CONTROL_PAGE] = (unsigned long)relocate_kernel;
-        page_list[PA_PGD] = virt_to_phys(&kexec_pgd);
-        page_list[VA_PGD] = (unsigned long)kexec_pgd;
-        page_list[PA_PUD_0] = virt_to_phys(&kexec_pud0);
-        page_list[VA_PUD_0] = (unsigned long)kexec_pud0;
-        page_list[PA_PMD_0] = virt_to_phys(&kexec_pmd0);
-        page_list[VA_PMD_0] = (unsigned long)kexec_pmd0;
-        page_list[PA_PTE_0] = virt_to_phys(&kexec_pte0);
-        page_list[VA_PTE_0] = (unsigned long)kexec_pte0;
-        page_list[PA_PUD_1] = virt_to_phys(&kexec_pud1);
-        page_list[VA_PUD_1] = (unsigned long)kexec_pud1;
-        page_list[PA_PMD_1] = virt_to_phys(&kexec_pmd1);
-        page_list[VA_PMD_1] = (unsigned long)kexec_pmd1;
-        page_list[PA_PTE_1] = virt_to_phys(&kexec_pte1);
-        page_list[VA_PTE_1] = (unsigned long)kexec_pte1;
-
         page_list[PA_TABLE_PAGE] =
           (unsigned long)__pa(page_address(image->control_code_page));
 
diff --git a/arch/x86/kernel/mca_32.c b/arch/x86/kernel/mca_32.c
index 2dc183758be3..845d80ce1ef1 100644
--- a/arch/x86/kernel/mca_32.c
+++ b/arch/x86/kernel/mca_32.c
@@ -51,7 +51,6 @@
 #include <linux/ioport.h>
 #include <asm/uaccess.h>
 #include <linux/init.h>
-#include <asm/arch_hooks.h>
 
 static unsigned char which_scsi;
 
@@ -474,6 +473,4 @@ void __kprobes mca_handle_nmi(void)
          * adapter was responsible for the error.
          */
         bus_for_each_dev(&mca_bus_type, NULL, NULL, mca_handle_nmi_callback);
-
-        mca_nmi_hook();
-} /* mca_handle_nmi */
+}
diff --git a/arch/x86/kernel/microcode_intel.c b/arch/x86/kernel/microcode_intel.c
index b7f4c929e615..5e9f4fc51385 100644
--- a/arch/x86/kernel/microcode_intel.c
+++ b/arch/x86/kernel/microcode_intel.c
@@ -87,9 +87,9 @@
 #include <linux/cpu.h>
 #include <linux/firmware.h>
 #include <linux/platform_device.h>
+#include <linux/uaccess.h>
 
 #include <asm/msr.h>
-#include <asm/uaccess.h>
 #include <asm/processor.h>
 #include <asm/microcode.h>
 
@@ -196,7 +196,7 @@ static inline int update_match_cpu(struct cpu_signature *csig, int sig, int pf)
         return (!sigmatch(sig, csig->sig, pf, csig->pf)) ? 0 : 1;
 }
 
-static inline int 
+static inline int
 update_match_revision(struct microcode_header_intel *mc_header, int rev)
 {
         return (mc_header->rev <= rev) ? 0 : 1;
@@ -442,8 +442,8 @@ static int request_microcode_fw(int cpu, struct device *device)
                 return ret;
         }
 
-        ret = generic_load_microcode(cpu, (void*)firmware->data, firmware->size,
-                        &get_ucode_fw);
+        ret = generic_load_microcode(cpu, (void *)firmware->data,
+                                     firmware->size, &get_ucode_fw);
 
         release_firmware(firmware);
 
@@ -460,7 +460,7 @@ static int request_microcode_user(int cpu, const void __user *buf, size_t size)
         /* We should bind the task to the CPU */
         BUG_ON(cpu != raw_smp_processor_id());
 
-        return generic_load_microcode(cpu, (void*)buf, size, &get_ucode_user);
+        return generic_load_microcode(cpu, (void *)buf, size, &get_ucode_user);
 }
 
 static void microcode_fini_cpu(int cpu)
diff --git a/arch/x86/kernel/module_32.c b/arch/x86/kernel/module_32.c
index 3db0a5442eb1..0edd819050e7 100644
--- a/arch/x86/kernel/module_32.c
+++ b/arch/x86/kernel/module_32.c
@@ -42,7 +42,7 @@ void module_free(struct module *mod, void *module_region)
 {
         vfree(module_region);
         /* FIXME: If module_region == mod->init_region, trim exception
-           table entries. */
+           table entries. */
 }
 
 /* We don't need anything special. */
@@ -113,13 +113,13 @@ int module_finalize(const Elf_Ehdr *hdr,
                 *para = NULL;
         char *secstrings = (void *)hdr + sechdrs[hdr->e_shstrndx].sh_offset;
 
-        for (s = sechdrs; s < sechdrs + hdr->e_shnum; s++) { 
+        for (s = sechdrs; s < sechdrs + hdr->e_shnum; s++) {
                 if (!strcmp(".text", secstrings + s->sh_name))
                         text = s;
                 if (!strcmp(".altinstructions", secstrings + s->sh_name))
                         alt = s;
                 if (!strcmp(".smp_locks", secstrings + s->sh_name))
-                        locks= s;
+                        locks = s;
                 if (!strcmp(".parainstructions", secstrings + s->sh_name))
                         para = s;
         }
diff --git a/arch/x86/kernel/module_64.c b/arch/x86/kernel/module_64.c
index 6ba87830d4b1..c23880b90b5c 100644
--- a/arch/x86/kernel/module_64.c
+++ b/arch/x86/kernel/module_64.c
@@ -30,14 +30,14 @@
 #include <asm/page.h>
 #include <asm/pgtable.h>
 
-#define DEBUGP(fmt...) 
+#define DEBUGP(fmt...)
 
 #ifndef CONFIG_UML
 void module_free(struct module *mod, void *module_region)
 {
         vfree(module_region);
         /* FIXME: If module_region == mod->init_region, trim exception
-           table entries. */
+           table entries. */
 }
 
 void *module_alloc(unsigned long size)
@@ -77,7 +77,7 @@ int apply_relocate_add(Elf64_Shdr *sechdrs,
         Elf64_Rela *rel = (void *)sechdrs[relsec].sh_addr;
         Elf64_Sym *sym;
         void *loc;
-        u64 val; 
+        u64 val;
 
         DEBUGP("Applying relocate section %u to %u\n", relsec,
                sechdrs[relsec].sh_info);
@@ -91,11 +91,11 @@ int apply_relocate_add(Elf64_Shdr *sechdrs,
                 sym = (Elf64_Sym *)sechdrs[symindex].sh_addr
                         + ELF64_R_SYM(rel[i].r_info);
 
-                DEBUGP("type %d st_value %Lx r_addend %Lx loc %Lx\n",
-                       (int)ELF64_R_TYPE(rel[i].r_info), 
-                       sym->st_value, rel[i].r_addend, (u64)loc);
+                DEBUGP("type %d st_value %Lx r_addend %Lx loc %Lx\n",
+                        (int)ELF64_R_TYPE(rel[i].r_info),
+                        sym->st_value, rel[i].r_addend, (u64)loc);
 
-                val = sym->st_value + rel[i].r_addend; 
+                val = sym->st_value + rel[i].r_addend;
 
                 switch (ELF64_R_TYPE(rel[i].r_info)) {
                 case R_X86_64_NONE:
@@ -113,16 +113,16 @@ int apply_relocate_add(Elf64_Shdr *sechdrs,
                         if ((s64)val != *(s32 *)loc)
                                 goto overflow;
                         break;
-                case R_X86_64_PC32: 
+                case R_X86_64_PC32:
                         val -= (u64)loc;
                         *(u32 *)loc = val;
 #if 0
                         if ((s64)val != *(s32 *)loc)
-                                goto overflow; 
+                                goto overflow;
 #endif
                         break;
                 default:
-                        printk(KERN_ERR "module %s: Unknown rela relocation: %Lu\n",
+                        printk(KERN_ERR "module %s: Unknown rela relocation: %llu\n",
                                me->name, ELF64_R_TYPE(rel[i].r_info));
                         return -ENOEXEC;
                 }
@@ -130,7 +130,7 @@ int apply_relocate_add(Elf64_Shdr *sechdrs,
         return 0;
 
 overflow:
-        printk(KERN_ERR "overflow in relocation type %d val %Lx\n", 
+        printk(KERN_ERR "overflow in relocation type %d val %Lx\n",
                (int)ELF64_R_TYPE(rel[i].r_info), val);
         printk(KERN_ERR "`%s' likely not compiled with -mcmodel=kernel\n",
                me->name);
@@ -143,13 +143,13 @@ int apply_relocate(Elf_Shdr *sechdrs,
                    unsigned int relsec,
                    struct module *me)
 {
-        printk("non add relocation not supported\n");
+        printk(KERN_ERR "non add relocation not supported\n");
         return -ENOSYS;
-} 
+}
 
 int module_finalize(const Elf_Ehdr *hdr,
-                    const Elf_Shdr *sechdrs,
-                    struct module *me)
+                    const Elf_Shdr *sechdrs,
+                    struct module *me)
 {
         const Elf_Shdr *s, *text = NULL, *alt = NULL, *locks = NULL,
                 *para = NULL;
@@ -161,7 +161,7 @@ int module_finalize(const Elf_Ehdr *hdr,
                 if (!strcmp(".altinstructions", secstrings + s->sh_name))
                         alt = s;
                 if (!strcmp(".smp_locks", secstrings + s->sh_name))
-                        locks= s;
+                        locks = s;
                 if (!strcmp(".parainstructions", secstrings + s->sh_name))
                         para = s;
         }
diff --git a/arch/x86/kernel/mpparse.c b/arch/x86/kernel/mpparse.c
index a649a4ccad43..37cb1bda1baf 100644
--- a/arch/x86/kernel/mpparse.c
+++ b/arch/x86/kernel/mpparse.c
@@ -3,7 +3,7 @@
  *      compliant MP-table parsing routines.
  *
  *      (c) 1995 Alan Cox, Building #3 <alan@lxorguk.ukuu.org.uk>
- *      (c) 1998, 1999, 2000 Ingo Molnar <mingo@redhat.com>
+ *      (c) 1998, 1999, 2000, 2009 Ingo Molnar <mingo@redhat.com>
  *      (c) 2008 Alexey Starikovskiy <astarikovskiy@suse.de>
  */
 
@@ -29,12 +29,7 @@
 #include <asm/setup.h>
 #include <asm/smp.h>
 
-#include <mach_apic.h>
-#ifdef CONFIG_X86_32
-#include <mach_apicdef.h>
-#include <mach_mpparse.h>
-#endif
-
+#include <asm/apic.h>
 /*
  * Checksum an MP configuration block.
  */
@@ -144,11 +139,11 @@ static void __init MP_ioapic_info(struct mpc_ioapic *m)
         if (bad_ioapic(m->apicaddr))
                 return;
 
-        mp_ioapics[nr_ioapics].mp_apicaddr = m->apicaddr;
-        mp_ioapics[nr_ioapics].mp_apicid = m->apicid;
-        mp_ioapics[nr_ioapics].mp_type = m->type;
-        mp_ioapics[nr_ioapics].mp_apicver = m->apicver;
-        mp_ioapics[nr_ioapics].mp_flags = m->flags;
+        mp_ioapics[nr_ioapics].apicaddr = m->apicaddr;
+        mp_ioapics[nr_ioapics].apicid = m->apicid;
+        mp_ioapics[nr_ioapics].type = m->type;
+        mp_ioapics[nr_ioapics].apicver = m->apicver;
+        mp_ioapics[nr_ioapics].flags = m->flags;
         nr_ioapics++;
 }
 
@@ -160,55 +155,55 @@ static void print_MP_intsrc_info(struct mpc_intsrc *m)
                 m->srcbusirq, m->dstapic, m->dstirq);
 }
 
-static void __init print_mp_irq_info(struct mp_config_intsrc *mp_irq)
+static void __init print_mp_irq_info(struct mpc_intsrc *mp_irq)
 {
         apic_printk(APIC_VERBOSE, "Int: type %d, pol %d, trig %d, bus %02x,"
                 " IRQ %02x, APIC ID %x, APIC INT %02x\n",
-                mp_irq->mp_irqtype, mp_irq->mp_irqflag & 3,
-                (mp_irq->mp_irqflag >> 2) & 3, mp_irq->mp_srcbus,
-                mp_irq->mp_srcbusirq, mp_irq->mp_dstapic, mp_irq->mp_dstirq);
+                mp_irq->irqtype, mp_irq->irqflag & 3,
+                (mp_irq->irqflag >> 2) & 3, mp_irq->srcbus,
+                mp_irq->srcbusirq, mp_irq->dstapic, mp_irq->dstirq);
 }
 
 static void __init assign_to_mp_irq(struct mpc_intsrc *m,
-                                    struct mp_config_intsrc *mp_irq)
+                                    struct mpc_intsrc *mp_irq)
 {
-        mp_irq->mp_dstapic = m->dstapic;
-        mp_irq->mp_type = m->type;
-        mp_irq->mp_irqtype = m->irqtype;
-        mp_irq->mp_irqflag = m->irqflag;
-        mp_irq->mp_srcbus = m->srcbus;
-        mp_irq->mp_srcbusirq = m->srcbusirq;
-        mp_irq->mp_dstirq = m->dstirq;
+        mp_irq->dstapic = m->dstapic;
+        mp_irq->type = m->type;
+        mp_irq->irqtype = m->irqtype;
+        mp_irq->irqflag = m->irqflag;
+        mp_irq->srcbus = m->srcbus;
+        mp_irq->srcbusirq = m->srcbusirq;
+        mp_irq->dstirq = m->dstirq;
 }
 
-static void __init assign_to_mpc_intsrc(struct mp_config_intsrc *mp_irq,
+static void __init assign_to_mpc_intsrc(struct mpc_intsrc *mp_irq,
                                         struct mpc_intsrc *m)
 {
-        m->dstapic = mp_irq->mp_dstapic;
-        m->type = mp_irq->mp_type;
-        m->irqtype = mp_irq->mp_irqtype;
-        m->irqflag = mp_irq->mp_irqflag;
-        m->srcbus = mp_irq->mp_srcbus;
-        m->srcbusirq = mp_irq->mp_srcbusirq;
-        m->dstirq = mp_irq->mp_dstirq;
+        m->dstapic = mp_irq->dstapic;
+        m->type = mp_irq->type;
+        m->irqtype = mp_irq->irqtype;
+        m->irqflag = mp_irq->irqflag;
+        m->srcbus = mp_irq->srcbus;
+        m->srcbusirq = mp_irq->srcbusirq;
+        m->dstirq = mp_irq->dstirq;
 }
 
-static int __init mp_irq_mpc_intsrc_cmp(struct mp_config_intsrc *mp_irq,
+static int __init mp_irq_mpc_intsrc_cmp(struct mpc_intsrc *mp_irq,
                                         struct mpc_intsrc *m)
 {
-        if (mp_irq->mp_dstapic != m->dstapic)
+        if (mp_irq->dstapic != m->dstapic)
                 return 1;
-        if (mp_irq->mp_type != m->type)
+        if (mp_irq->type != m->type)
                 return 2;
-        if (mp_irq->mp_irqtype != m->irqtype)
+        if (mp_irq->irqtype != m->irqtype)
                 return 3;
-        if (mp_irq->mp_irqflag != m->irqflag)
+        if (mp_irq->irqflag != m->irqflag)
                 return 4;
-        if (mp_irq->mp_srcbus != m->srcbus)
+        if (mp_irq->srcbus != m->srcbus)
                 return 5;
-        if (mp_irq->mp_srcbusirq != m->srcbusirq)
+        if (mp_irq->srcbusirq != m->srcbusirq)
                 return 6;
-        if (mp_irq->mp_dstirq != m->dstirq)
+        if (mp_irq->dstirq != m->dstirq)
                 return 7;
 
         return 0;
@@ -292,16 +287,7 @@ static int __init smp_read_mpc(struct mpc_table *mpc, unsigned early)
                 return 0;
 
 #ifdef CONFIG_X86_32
-        /*
-         * need to make sure summit and es7000's mps_oem_check is safe to be
-         * called early via genericarch 's mps_oem_check
-         */
-        if (early) {
-#ifdef CONFIG_X86_NUMAQ
-                numaq_mps_oem_check(mpc, oem, str);
-#endif
-        } else
-                mps_oem_check(mpc, oem, str);
+        generic_mps_oem_check(mpc, oem, str);
 #endif
         /* save the local APIC address, it might be non-default */
         if (!acpi_lapic)
@@ -386,13 +372,13 @@ static int __init smp_read_mpc(struct mpc_table *mpc, unsigned early)
                         (*x86_quirks->mpc_record)++;
         }
 
-#ifdef CONFIG_X86_GENERICARCH
-       generic_bigsmp_probe();
+#ifdef CONFIG_X86_BIGSMP
+        generic_bigsmp_probe();
 #endif
 
-#ifdef CONFIG_X86_32
-        setup_apic_routing();
-#endif
+        if (apic->setup_apic_routing)
+                apic->setup_apic_routing();
+
         if (!num_processors)
                 printk(KERN_ERR "MPTABLE: no processors registered!\n");
         return num_processors;
@@ -417,7 +403,7 @@ static void __init construct_default_ioirq_mptable(int mpc_default_type)
         intsrc.type = MP_INTSRC;
         intsrc.irqflag = 0;     /* conforming */
         intsrc.srcbus = 0;
-        intsrc.dstapic = mp_ioapics[0].mp_apicid;
+        intsrc.dstapic = mp_ioapics[0].apicid;
 
         intsrc.irqtype = mp_INT;
 
@@ -570,14 +556,14 @@ static inline void __init construct_default_ISA_mptable(int mpc_default_type)
         }
 }
 
-static struct intel_mp_floating *mpf_found;
+static struct mpf_intel *mpf_found;
 
 /*
  * Scan the memory blocks for an SMP configuration block.
  */
 static void __init __get_smp_config(unsigned int early)
 {
-        struct intel_mp_floating *mpf = mpf_found;
+        struct mpf_intel *mpf = mpf_found;
 
         if (!mpf)
                 return;
@@ -598,9 +584,9 @@ static void __init __get_smp_config(unsigned int early)
         }
 
         printk(KERN_INFO "Intel MultiProcessor Specification v1.%d\n",
-               mpf->mpf_specification);
+               mpf->specification);
 #if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_32)
-        if (mpf->mpf_feature2 & (1 << 7)) {
+        if (mpf->feature2 & (1 << 7)) {
                 printk(KERN_INFO "    IMCR and PIC compatibility mode.\n");
                 pic_mode = 1;
         } else {
@@ -611,7 +597,7 @@ static void __init __get_smp_config(unsigned int early)
         /*
          * Now see if we need to read further.
          */
-        if (mpf->mpf_feature1 != 0) {
+        if (mpf->feature1 != 0) {
                 if (early) {
                         /*
                          * local APIC has default address
@@ -621,16 +607,16 @@ static void __init __get_smp_config(unsigned int early)
                 }
 
                 printk(KERN_INFO "Default MP configuration #%d\n",
-                       mpf->mpf_feature1);
-                construct_default_ISA_mptable(mpf->mpf_feature1);
+                       mpf->feature1);
+                construct_default_ISA_mptable(mpf->feature1);
 
-        } else if (mpf->mpf_physptr) {
+        } else if (mpf->physptr) {
 
                 /*
                  * Read the physical hardware table.  Anything here will
                  * override the defaults.
                  */
-                if (!smp_read_mpc(phys_to_virt(mpf->mpf_physptr), early)) {
+                if (!smp_read_mpc(phys_to_virt(mpf->physptr), early)) {
 #ifdef CONFIG_X86_LOCAL_APIC
                         smp_found_config = 0;
 #endif
@@ -688,32 +674,32 @@ static int __init smp_scan_config(unsigned long base, unsigned long length,
                                   unsigned reserve)
 {
         unsigned int *bp = phys_to_virt(base);
-        struct intel_mp_floating *mpf;
+        struct mpf_intel *mpf;
 
         apic_printk(APIC_VERBOSE, "Scan SMP from %p for %ld bytes.\n",
                         bp, length);
         BUILD_BUG_ON(sizeof(*mpf) != 16);
 
         while (length > 0) {
-                mpf = (struct intel_mp_floating *)bp;
+                mpf = (struct mpf_intel *)bp;
                 if ((*bp == SMP_MAGIC_IDENT) &&
-                    (mpf->mpf_length == 1) &&
+                    (mpf->length == 1) &&
                     !mpf_checksum((unsigned char *)bp, 16) &&
-                    ((mpf->mpf_specification == 1)
-                     || (mpf->mpf_specification == 4))) {
+                    ((mpf->specification == 1)
+                     || (mpf->specification == 4))) {
 #ifdef CONFIG_X86_LOCAL_APIC
                         smp_found_config = 1;
 #endif
                         mpf_found = mpf;
 
-                        printk(KERN_INFO "found SMP MP-table at [%p] %08lx\n",
-                               mpf, virt_to_phys(mpf));
+                        printk(KERN_INFO "found SMP MP-table at [%p] %llx\n",
+                               mpf, (u64)virt_to_phys(mpf));
 
                         if (!reserve)
                                 return 1;
                         reserve_bootmem_generic(virt_to_phys(mpf), PAGE_SIZE,
                                         BOOTMEM_DEFAULT);
-                        if (mpf->mpf_physptr) {
+                        if (mpf->physptr) {
                                 unsigned long size = PAGE_SIZE;
 #ifdef CONFIG_X86_32
                                 /*
@@ -722,15 +708,24 @@ static int __init smp_scan_config(unsigned long base, unsigned long length,
                                  * the bottom is mapped now.
                                  * PC-9800's MPC table places on the very last
                                  * of physical memory; so that simply reserving
-                                 * PAGE_SIZE from mpg->mpf_physptr yields BUG()
+                                 * PAGE_SIZE from mpf->physptr yields BUG()
                                  * in reserve_bootmem.
+                                 * also need to make sure physptr is below than
+                                 * max_low_pfn
+                                 * we don't need reserve the area above max_low_pfn
                                  */
                                 unsigned long end = max_low_pfn * PAGE_SIZE;
-                                if (mpf->mpf_physptr + size > end)
-                                        size = end - mpf->mpf_physptr;
-#endif
-                                reserve_bootmem_generic(mpf->mpf_physptr, size,
+
+                                if (mpf->physptr < end) {
+                                        if (mpf->physptr + size > end)
+                                                size = end - mpf->physptr;
+                                        reserve_bootmem_generic(mpf->physptr, size,
+                                                        BOOTMEM_DEFAULT);
+                                }
+#else
+                                reserve_bootmem_generic(mpf->physptr, size,
                                                 BOOTMEM_DEFAULT);
+#endif
                         }
 
                         return 1;
@@ -809,15 +804,15 @@ static int  __init get_MP_intsrc_index(struct mpc_intsrc *m)
         /* not legacy */
 
         for (i = 0; i < mp_irq_entries; i++) {
-                if (mp_irqs[i].mp_irqtype != mp_INT)
+                if (mp_irqs[i].irqtype != mp_INT)
                         continue;
 
-                if (mp_irqs[i].mp_irqflag != 0x0f)
+                if (mp_irqs[i].irqflag != 0x0f)
                         continue;
 
-                if (mp_irqs[i].mp_srcbus != m->srcbus)
+                if (mp_irqs[i].srcbus != m->srcbus)
                         continue;
-                if (mp_irqs[i].mp_srcbusirq != m->srcbusirq)
+                if (mp_irqs[i].srcbusirq != m->srcbusirq)
                         continue;
                 if (irq_used[i]) {
                         /* already claimed */
@@ -922,10 +917,10 @@ static int  __init replace_intsrc_all(struct mpc_table *mpc,
                 if (irq_used[i])
                         continue;
 
-                if (mp_irqs[i].mp_irqtype != mp_INT)
+                if (mp_irqs[i].irqtype != mp_INT)
                         continue;
 
-                if (mp_irqs[i].mp_irqflag != 0x0f)
+                if (mp_irqs[i].irqflag != 0x0f)
                         continue;
 
                 if (nr_m_spare > 0) {
@@ -1001,7 +996,7 @@ static int __init update_mp_table(void)
 {
         char str[16];
         char oem[10];
-        struct intel_mp_floating *mpf;
+        struct mpf_intel *mpf;
         struct mpc_table *mpc, *mpc_new;
 
         if (!enable_update_mptable)
@@ -1014,19 +1009,19 @@ static int __init update_mp_table(void)
         /*
          * Now see if we need to go further.
          */
-        if (mpf->mpf_feature1 != 0)
+        if (mpf->feature1 != 0)
                 return 0;
 
-        if (!mpf->mpf_physptr)
+        if (!mpf->physptr)
                 return 0;
 
-        mpc = phys_to_virt(mpf->mpf_physptr);
+        mpc = phys_to_virt(mpf->physptr);
 
         if (!smp_check_mpc(mpc, oem, str))
                 return 0;
 
-        printk(KERN_INFO "mpf: %lx\n", virt_to_phys(mpf));
-        printk(KERN_INFO "mpf_physptr: %x\n", mpf->mpf_physptr);
+        printk(KERN_INFO "mpf: %llx\n", (u64)virt_to_phys(mpf));
+        printk(KERN_INFO "physptr: %x\n", mpf->physptr);
 
         if (mpc_new_phys && mpc->length > mpc_new_length) {
                 mpc_new_phys = 0;
@@ -1047,23 +1042,23 @@ static int __init update_mp_table(void)
                 }
                 printk(KERN_INFO "use in-positon replacing\n");
         } else {
-                mpf->mpf_physptr = mpc_new_phys;
+                mpf->physptr = mpc_new_phys;
                 mpc_new = phys_to_virt(mpc_new_phys);
                 memcpy(mpc_new, mpc, mpc->length);
                 mpc = mpc_new;
                 /* check if we can modify that */
-                if (mpc_new_phys - mpf->mpf_physptr) {
-                        struct intel_mp_floating *mpf_new;
+                if (mpc_new_phys - mpf->physptr) {
+                        struct mpf_intel *mpf_new;
                         /* steal 16 bytes from [0, 1k) */
                         printk(KERN_INFO "mpf new: %x\n", 0x400 - 16);
                         mpf_new = phys_to_virt(0x400 - 16);
                         memcpy(mpf_new, mpf, 16);
                         mpf = mpf_new;
-                        mpf->mpf_physptr = mpc_new_phys;
+                        mpf->physptr = mpc_new_phys;
                 }
-                mpf->mpf_checksum = 0;
-                mpf->mpf_checksum -= mpf_checksum((unsigned char *)mpf, 16);
-                printk(KERN_INFO "mpf_physptr new: %x\n", mpf->mpf_physptr);
+                mpf->checksum = 0;
+                mpf->checksum -= mpf_checksum((unsigned char *)mpf, 16);
+                printk(KERN_INFO "physptr new: %x\n", mpf->physptr);
         }
 
         /*
diff --git a/arch/x86/kernel/msr.c b/arch/x86/kernel/msr.c
index 726266695b2c..3cf3413ec626 100644
--- a/arch/x86/kernel/msr.c
+++ b/arch/x86/kernel/msr.c
@@ -35,10 +35,10 @@
 #include <linux/device.h>
 #include <linux/cpu.h>
 #include <linux/notifier.h>
+#include <linux/uaccess.h>
 
 #include <asm/processor.h>
 #include <asm/msr.h>
-#include <asm/uaccess.h>
 #include <asm/system.h>
 
 static struct class *msr_class;
diff --git a/arch/x86/kernel/numaq_32.c b/arch/x86/kernel/numaq_32.c
deleted file mode 100644
index f2191d4f2717..000000000000
--- a/arch/x86/kernel/numaq_32.c
+++ /dev/null
@@ -1,293 +0,0 @@
-/*
- * Written by: Patricia Gaughen, IBM Corporation
- *
- * Copyright (C) 2002, IBM Corp.
- *
- * All rights reserved.          
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
- * NON INFRINGEMENT.  See the GNU General Public License for more
- * details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- *
- * Send feedback to <gone@us.ibm.com>
- */
-
-#include <linux/mm.h>
-#include <linux/bootmem.h>
-#include <linux/mmzone.h>
-#include <linux/module.h>
-#include <linux/nodemask.h>
-#include <asm/numaq.h>
-#include <asm/topology.h>
-#include <asm/processor.h>
-#include <asm/genapic.h>
-#include <asm/e820.h>
-#include <asm/setup.h>
-
-#define MB_TO_PAGES(addr) ((addr) << (20 - PAGE_SHIFT))
-
-/*
- * Function: smp_dump_qct()
- *
- * Description: gets memory layout from the quad config table.  This
- * function also updates node_online_map with the nodes (quads) present.
- */
-static void __init smp_dump_qct(void)
-{
-        int node;
-        struct eachquadmem *eq;
-        struct sys_cfg_data *scd =
-                (struct sys_cfg_data *)__va(SYS_CFG_DATA_PRIV_ADDR);
-
-        nodes_clear(node_online_map);
-        for_each_node(node) {
-                if (scd->quads_present31_0 & (1 << node)) {
-                        node_set_online(node);
-                        eq = &scd->eq[node];
-                        /* Convert to pages */
-                        node_start_pfn[node] = MB_TO_PAGES(
-                                eq->hi_shrd_mem_start - eq->priv_mem_size);
-                        node_end_pfn[node] = MB_TO_PAGES(
-                                eq->hi_shrd_mem_start + eq->hi_shrd_mem_size);
-
-                        e820_register_active_regions(node, node_start_pfn[node],
-                                                        node_end_pfn[node]);
-                        memory_present(node,
-                                node_start_pfn[node], node_end_pfn[node]);
-                        node_remap_size[node] = node_memmap_size_bytes(node,
-                                                        node_start_pfn[node],
-                                                        node_end_pfn[node]);
-                }
-        }
-}
-
-
-void __cpuinit numaq_tsc_disable(void)
-{
-        if (!found_numaq)
-                return;
-
-        if (num_online_nodes() > 1) {
-                printk(KERN_DEBUG "NUMAQ: disabling TSC\n");
-                setup_clear_cpu_cap(X86_FEATURE_TSC);
-        }
-}
-
-static int __init numaq_pre_time_init(void)
-{
-        numaq_tsc_disable();
-        return 0;
-}
-
-int found_numaq;
-/*
- * Have to match translation table entries to main table entries by counter
- * hence the mpc_record variable .... can't see a less disgusting way of
- * doing this ....
- */
-struct mpc_config_translation {
-        unsigned char mpc_type;
-        unsigned char trans_len;
-        unsigned char trans_type;
-        unsigned char trans_quad;
-        unsigned char trans_global;
-        unsigned char trans_local;
-        unsigned short trans_reserved;
-};
-
-/* x86_quirks member */
-static int mpc_record;
-static struct mpc_config_translation *translation_table[MAX_MPC_ENTRY]
-    __cpuinitdata;
-
-static inline int generate_logical_apicid(int quad, int phys_apicid)
-{
-        return (quad << 4) + (phys_apicid ? phys_apicid << 1 : 1);
-}
-
-/* x86_quirks member */
-static int mpc_apic_id(struct mpc_cpu *m)
-{
-        int quad = translation_table[mpc_record]->trans_quad;
-        int logical_apicid = generate_logical_apicid(quad, m->apicid);
-
-        printk(KERN_DEBUG "Processor #%d %u:%u APIC version %d (quad %d, apic %d)\n",
-               m->apicid, (m->cpufeature & CPU_FAMILY_MASK) >> 8,
-               (m->cpufeature & CPU_MODEL_MASK) >> 4,
-               m->apicver, quad, logical_apicid);
-        return logical_apicid;
-}
-
-int mp_bus_id_to_node[MAX_MP_BUSSES];
-
-int mp_bus_id_to_local[MAX_MP_BUSSES];
-
-/* x86_quirks member */
-static void mpc_oem_bus_info(struct mpc_bus *m, char *name)
-{
-        int quad = translation_table[mpc_record]->trans_quad;
-        int local = translation_table[mpc_record]->trans_local;
-
-        mp_bus_id_to_node[m->busid] = quad;
-        mp_bus_id_to_local[m->busid] = local;
-        printk(KERN_INFO "Bus #%d is %s (node %d)\n",
-               m->busid, name, quad);
-}
-
-int quad_local_to_mp_bus_id [NR_CPUS/4][4];
-
-/* x86_quirks member */
-static void mpc_oem_pci_bus(struct mpc_bus *m)
-{
-        int quad = translation_table[mpc_record]->trans_quad;
-        int local = translation_table[mpc_record]->trans_local;
-
-        quad_local_to_mp_bus_id[quad][local] = m->busid;
-}
-
-static void __init MP_translation_info(struct mpc_config_translation *m)
-{
-        printk(KERN_INFO
-               "Translation: record %d, type %d, quad %d, global %d, local %d\n",
-               mpc_record, m->trans_type, m->trans_quad, m->trans_global,
-               m->trans_local);
-
-        if (mpc_record >= MAX_MPC_ENTRY)
-                printk(KERN_ERR "MAX_MPC_ENTRY exceeded!\n");
-        else
-                translation_table[mpc_record] = m;      /* stash this for later */
-        if (m->trans_quad < MAX_NUMNODES && !node_online(m->trans_quad))
-                node_set_online(m->trans_quad);
-}
-
-static int __init mpf_checksum(unsigned char *mp, int len)
-{
-        int sum = 0;
-
-        while (len--)
-                sum += *mp++;
-
-        return sum & 0xFF;
-}
-
-/*
- * Read/parse the MPC oem tables
- */
-
-static void __init smp_read_mpc_oem(struct mpc_oemtable *oemtable,
-                                    unsigned short oemsize)
-{
-        int count = sizeof(*oemtable);  /* the header size */
-        unsigned char *oemptr = ((unsigned char *)oemtable) + count;
-
-        mpc_record = 0;
-        printk(KERN_INFO "Found an OEM MPC table at %8p - parsing it ... \n",
-               oemtable);
-        if (memcmp(oemtable->signature, MPC_OEM_SIGNATURE, 4)) {
-                printk(KERN_WARNING
-                       "SMP mpc oemtable: bad signature [%c%c%c%c]!\n",
-                       oemtable->signature[0], oemtable->signature[1],
-                       oemtable->signature[2], oemtable->signature[3]);
-                return;
-        }
-        if (mpf_checksum((unsigned char *)oemtable, oemtable->length)) {
-                printk(KERN_WARNING "SMP oem mptable: checksum error!\n");
-                return;
-        }
-        while (count < oemtable->length) {
-                switch (*oemptr) {
-                case MP_TRANSLATION:
-                        {
-                                struct mpc_config_translation *m =
-                                    (struct mpc_config_translation *)oemptr;
-                                MP_translation_info(m);
-                                oemptr += sizeof(*m);
-                                count += sizeof(*m);
-                                ++mpc_record;
-                                break;
-                        }
-                default:
-                        {
-                                printk(KERN_WARNING
-                                       "Unrecognised OEM table entry type! - %d\n",
-                                       (int)*oemptr);
-                                return;
-                        }
-                }
-        }
-}
-
-static int __init numaq_setup_ioapic_ids(void)
-{
-        /* so can skip it */
-        return 1;
-}
-
-static int __init numaq_update_genapic(void)
-{
-        genapic->wakeup_cpu = wakeup_secondary_cpu_via_nmi;
-
-        return 0;
-}
-
-static struct x86_quirks numaq_x86_quirks __initdata = {
-        .arch_pre_time_init     = numaq_pre_time_init,
-        .arch_time_init         = NULL,
-        .arch_pre_intr_init     = NULL,
-        .arch_memory_setup      = NULL,
-        .arch_intr_init         = NULL,
-        .arch_trap_init         = NULL,
-        .mach_get_smp_config    = NULL,
-        .mach_find_smp_config   = NULL,
-        .mpc_record             = &mpc_record,
-        .mpc_apic_id            = mpc_apic_id,
-        .mpc_oem_bus_info       = mpc_oem_bus_info,
-        .mpc_oem_pci_bus        = mpc_oem_pci_bus,
-        .smp_read_mpc_oem       = smp_read_mpc_oem,
-        .setup_ioapic_ids       = numaq_setup_ioapic_ids,
-        .update_genapic         = numaq_update_genapic,
-};
-
-void numaq_mps_oem_check(struct mpc_table *mpc, char *oem, char *productid)
-{
-        if (strncmp(oem, "IBM NUMA", 8))
-                printk("Warning!  Not a NUMA-Q system!\n");
-        else
-                found_numaq = 1;
-}
-
-static __init void early_check_numaq(void)
-{
-        /*
-         * Find possible boot-time SMP configuration:
-         */
-        early_find_smp_config();
-        /*
-         * get boot-time SMP configuration:
-         */
-        if (smp_found_config)
-                early_get_smp_config();
-
-        if (found_numaq)
-                x86_quirks = &numaq_x86_quirks;
-}
-
-int __init get_memcfg_numaq(void)
-{
-        early_check_numaq();
-        if (!found_numaq)
-                return 0;
-        smp_dump_qct();
-        return 1;
-}
diff --git a/arch/x86/kernel/paravirt-spinlocks.c b/arch/x86/kernel/paravirt-spinlocks.c
index 95777b0faa73..3a7c5a44082e 100644
--- a/arch/x86/kernel/paravirt-spinlocks.c
+++ b/arch/x86/kernel/paravirt-spinlocks.c
@@ -26,13 +26,3 @@ struct pv_lock_ops pv_lock_ops = {
 };
 EXPORT_SYMBOL(pv_lock_ops);
 
-void __init paravirt_use_bytelocks(void)
-{
-#ifdef CONFIG_SMP
-        pv_lock_ops.spin_is_locked = __byte_spin_is_locked;
-        pv_lock_ops.spin_is_contended = __byte_spin_is_contended;
-        pv_lock_ops.spin_lock = __byte_spin_lock;
-        pv_lock_ops.spin_trylock = __byte_spin_trylock;
-        pv_lock_ops.spin_unlock = __byte_spin_unlock;
-#endif
-}
diff --git a/arch/x86/kernel/paravirt.c b/arch/x86/kernel/paravirt.c
index c6520a4e85d4..63dd358d8ee1 100644
--- a/arch/x86/kernel/paravirt.c
+++ b/arch/x86/kernel/paravirt.c
@@ -28,7 +28,6 @@
 #include <asm/paravirt.h>
 #include <asm/desc.h>
 #include <asm/setup.h>
-#include <asm/arch_hooks.h>
 #include <asm/pgtable.h>
 #include <asm/time.h>
 #include <asm/pgalloc.h>
@@ -44,6 +43,17 @@ void _paravirt_nop(void)
 {
 }
 
+/* identity function, which can be inlined */
+u32 _paravirt_ident_32(u32 x)
+{
+        return x;
+}
+
+u64 _paravirt_ident_64(u64 x)
+{
+        return x;
+}
+
 static void __init default_banner(void)
 {
         printk(KERN_INFO "Booting paravirtualized kernel on %s\n",
@@ -138,9 +148,16 @@ unsigned paravirt_patch_default(u8 type, u16 clobbers, void *insnbuf,
         if (opfunc == NULL)
                 /* If there's no function, patch it with a ud2a (BUG) */
                 ret = paravirt_patch_insns(insnbuf, len, ud2a, ud2a+sizeof(ud2a));
-        else if (opfunc == paravirt_nop)
+        else if (opfunc == _paravirt_nop)
                 /* If the operation is a nop, then nop the callsite */
                 ret = paravirt_patch_nop();
+
+        /* identity functions just return their single argument */
+        else if (opfunc == _paravirt_ident_32)
+                ret = paravirt_patch_ident_32(insnbuf, len);
+        else if (opfunc == _paravirt_ident_64)
+                ret = paravirt_patch_ident_64(insnbuf, len);
+
         else if (type == PARAVIRT_PATCH(pv_cpu_ops.iret) ||
                  type == PARAVIRT_PATCH(pv_cpu_ops.irq_enable_sysexit) ||
                  type == PARAVIRT_PATCH(pv_cpu_ops.usergs_sysret32) ||
@@ -318,10 +335,10 @@ struct pv_time_ops pv_time_ops = {
 
 struct pv_irq_ops pv_irq_ops = {
         .init_IRQ = native_init_IRQ,
-        .save_fl = native_save_fl,
-        .restore_fl = native_restore_fl,
-        .irq_disable = native_irq_disable,
-        .irq_enable = native_irq_enable,
+        .save_fl = __PV_IS_CALLEE_SAVE(native_save_fl),
+        .restore_fl = __PV_IS_CALLEE_SAVE(native_restore_fl),
+        .irq_disable = __PV_IS_CALLEE_SAVE(native_irq_disable),
+        .irq_enable = __PV_IS_CALLEE_SAVE(native_irq_enable),
         .safe_halt = native_safe_halt,
         .halt = native_halt,
 #ifdef CONFIG_X86_64
@@ -399,6 +416,14 @@ struct pv_apic_ops pv_apic_ops = {
 #endif
 };
 
+#if defined(CONFIG_X86_32) && !defined(CONFIG_X86_PAE)
+/* 32-bit pagetable entries */
+#define PTE_IDENT       __PV_IS_CALLEE_SAVE(_paravirt_ident_32)
+#else
+/* 64-bit pagetable entries */
+#define PTE_IDENT       __PV_IS_CALLEE_SAVE(_paravirt_ident_64)
+#endif
+
 struct pv_mmu_ops pv_mmu_ops = {
 #ifndef CONFIG_X86_64
         .pagetable_setup_start = native_pagetable_setup_start,
@@ -450,22 +475,23 @@ struct pv_mmu_ops pv_mmu_ops = {
         .pmd_clear = native_pmd_clear,
 #endif
         .set_pud = native_set_pud,
-        .pmd_val = native_pmd_val,
-        .make_pmd = native_make_pmd,
+
+        .pmd_val = PTE_IDENT,
+        .make_pmd = PTE_IDENT,
 
 #if PAGETABLE_LEVELS == 4
-        .pud_val = native_pud_val,
-        .make_pud = native_make_pud,
+        .pud_val = PTE_IDENT,
+        .make_pud = PTE_IDENT,
+
         .set_pgd = native_set_pgd,
 #endif
 #endif /* PAGETABLE_LEVELS >= 3 */
 
-        .pte_val = native_pte_val,
-        .pte_flags = native_pte_flags,
-        .pgd_val = native_pgd_val,
+        .pte_val = PTE_IDENT,
+        .pgd_val = PTE_IDENT,
 
-        .make_pte = native_make_pte,
-        .make_pgd = native_make_pgd,
+        .make_pte = PTE_IDENT,
+        .make_pgd = PTE_IDENT,
 
         .dup_mmap = paravirt_nop,
         .exit_mmap = paravirt_nop,
diff --git a/arch/x86/kernel/paravirt_patch_32.c b/arch/x86/kernel/paravirt_patch_32.c
index 9fe644f4861d..d9f32e6d6ab6 100644
--- a/arch/x86/kernel/paravirt_patch_32.c
+++ b/arch/x86/kernel/paravirt_patch_32.c
@@ -12,6 +12,18 @@ DEF_NATIVE(pv_mmu_ops, read_cr3, "mov %cr3, %eax");
 DEF_NATIVE(pv_cpu_ops, clts, "clts");
 DEF_NATIVE(pv_cpu_ops, read_tsc, "rdtsc");
 
+unsigned paravirt_patch_ident_32(void *insnbuf, unsigned len)
+{
+        /* arg in %eax, return in %eax */
+        return 0;
+}
+
+unsigned paravirt_patch_ident_64(void *insnbuf, unsigned len)
+{
+        /* arg in %edx:%eax, return in %edx:%eax */
+        return 0;
+}
+
 unsigned native_patch(u8 type, u16 clobbers, void *ibuf,
                       unsigned long addr, unsigned len)
 {
diff --git a/arch/x86/kernel/paravirt_patch_64.c b/arch/x86/kernel/paravirt_patch_64.c
index 061d01df9ae6..3f08f34f93eb 100644
--- a/arch/x86/kernel/paravirt_patch_64.c
+++ b/arch/x86/kernel/paravirt_patch_64.c
@@ -19,6 +19,21 @@ DEF_NATIVE(pv_cpu_ops, usergs_sysret64, "swapgs; sysretq");
 DEF_NATIVE(pv_cpu_ops, usergs_sysret32, "swapgs; sysretl");
 DEF_NATIVE(pv_cpu_ops, swapgs, "swapgs");
 
+DEF_NATIVE(, mov32, "mov %edi, %eax");
+DEF_NATIVE(, mov64, "mov %rdi, %rax");
+
+unsigned paravirt_patch_ident_32(void *insnbuf, unsigned len)
+{
+        return paravirt_patch_insns(insnbuf, len,
+                                    start__mov32, end__mov32);
+}
+
+unsigned paravirt_patch_ident_64(void *insnbuf, unsigned len)
+{
+        return paravirt_patch_insns(insnbuf, len,
+                                    start__mov64, end__mov64);
+}
+
 unsigned native_patch(u8 type, u16 clobbers, void *ibuf,
                       unsigned long addr, unsigned len)
 {
diff --git a/arch/x86/kernel/probe_roms_32.c b/arch/x86/kernel/probe_roms_32.c
index 675a48c404a5..071e7fea42e5 100644
--- a/arch/x86/kernel/probe_roms_32.c
+++ b/arch/x86/kernel/probe_roms_32.c
@@ -18,7 +18,7 @@
 #include <asm/setup.h>
 #include <asm/sections.h>
 #include <asm/io.h>
-#include <setup_arch.h>
+#include <asm/setup_arch.h>
 
 static struct resource system_rom_resource = {
         .name   = "System ROM",
diff --git a/arch/x86/kernel/process.c b/arch/x86/kernel/process.c
index 6d12f7e37f8c..6afa5232dbb7 100644
--- a/arch/x86/kernel/process.c
+++ b/arch/x86/kernel/process.c
@@ -1,8 +1,8 @@
 #include <linux/errno.h>
 #include <linux/kernel.h>
 #include <linux/mm.h>
-#include <asm/idle.h>
 #include <linux/smp.h>
+#include <linux/prctl.h>
 #include <linux/slab.h>
 #include <linux/sched.h>
 #include <linux/module.h>
@@ -11,6 +11,9 @@
 #include <linux/ftrace.h>
 #include <asm/system.h>
 #include <asm/apic.h>
+#include <asm/idle.h>
+#include <asm/uaccess.h>
+#include <asm/i387.h>
 
 unsigned long idle_halt;
 EXPORT_SYMBOL(idle_halt);
@@ -56,6 +59,192 @@ void arch_task_cache_init(void)
 }
 
 /*
+ * Free current thread data structures etc..
+ */
+void exit_thread(void)
+{
+        struct task_struct *me = current;
+        struct thread_struct *t = &me->thread;
+
+        if (me->thread.io_bitmap_ptr) {
+                struct tss_struct *tss = &per_cpu(init_tss, get_cpu());
+
+                kfree(t->io_bitmap_ptr);
+                t->io_bitmap_ptr = NULL;
+                clear_thread_flag(TIF_IO_BITMAP);
+                /*
+                 * Careful, clear this in the TSS too:
+                 */
+                memset(tss->io_bitmap, 0xff, t->io_bitmap_max);
+                t->io_bitmap_max = 0;
+                put_cpu();
+        }
+
+        ds_exit_thread(current);
+}
+
+void flush_thread(void)
+{
+        struct task_struct *tsk = current;
+
+#ifdef CONFIG_X86_64
+        if (test_tsk_thread_flag(tsk, TIF_ABI_PENDING)) {
+                clear_tsk_thread_flag(tsk, TIF_ABI_PENDING);
+                if (test_tsk_thread_flag(tsk, TIF_IA32)) {
+                        clear_tsk_thread_flag(tsk, TIF_IA32);
+                } else {
+                        set_tsk_thread_flag(tsk, TIF_IA32);
+                        current_thread_info()->status |= TS_COMPAT;
+                }
+        }
+#endif
+
+        clear_tsk_thread_flag(tsk, TIF_DEBUG);
+
+        tsk->thread.debugreg0 = 0;
+        tsk->thread.debugreg1 = 0;
+        tsk->thread.debugreg2 = 0;
+        tsk->thread.debugreg3 = 0;
+        tsk->thread.debugreg6 = 0;
+        tsk->thread.debugreg7 = 0;
+        memset(tsk->thread.tls_array, 0, sizeof(tsk->thread.tls_array));
+        /*
+         * Forget coprocessor state..
+         */
+        tsk->fpu_counter = 0;
+        clear_fpu(tsk);
+        clear_used_math();
+}
+
+static void hard_disable_TSC(void)
+{
+        write_cr4(read_cr4() | X86_CR4_TSD);
+}
+
+void disable_TSC(void)
+{
+        preempt_disable();
+        if (!test_and_set_thread_flag(TIF_NOTSC))
+                /*
+                 * Must flip the CPU state synchronously with
+                 * TIF_NOTSC in the current running context.
+                 */
+                hard_disable_TSC();
+        preempt_enable();
+}
+
+static void hard_enable_TSC(void)
+{
+        write_cr4(read_cr4() & ~X86_CR4_TSD);
+}
+
+static void enable_TSC(void)
+{
+        preempt_disable();
+        if (test_and_clear_thread_flag(TIF_NOTSC))
+                /*
+                 * Must flip the CPU state synchronously with
+                 * TIF_NOTSC in the current running context.
+                 */
+                hard_enable_TSC();
+        preempt_enable();
+}
+
+int get_tsc_mode(unsigned long adr)
+{
+        unsigned int val;
+
+        if (test_thread_flag(TIF_NOTSC))
+                val = PR_TSC_SIGSEGV;
+        else
+                val = PR_TSC_ENABLE;
+
+        return put_user(val, (unsigned int __user *)adr);
+}
+
+int set_tsc_mode(unsigned int val)
+{
+        if (val == PR_TSC_SIGSEGV)
+                disable_TSC();
+        else if (val == PR_TSC_ENABLE)
+                enable_TSC();
+        else
+                return -EINVAL;
+
+        return 0;
+}
+
+void __switch_to_xtra(struct task_struct *prev_p, struct task_struct *next_p,
+                      struct tss_struct *tss)
+{
+        struct thread_struct *prev, *next;
+
+        prev = &prev_p->thread;
+        next = &next_p->thread;
+
+        if (test_tsk_thread_flag(next_p, TIF_DS_AREA_MSR) ||
+            test_tsk_thread_flag(prev_p, TIF_DS_AREA_MSR))
+                ds_switch_to(prev_p, next_p);
+        else if (next->debugctlmsr != prev->debugctlmsr)
+                update_debugctlmsr(next->debugctlmsr);
+
+        if (test_tsk_thread_flag(next_p, TIF_DEBUG)) {
+                set_debugreg(next->debugreg0, 0);
+                set_debugreg(next->debugreg1, 1);
+                set_debugreg(next->debugreg2, 2);
+                set_debugreg(next->debugreg3, 3);
+                /* no 4 and 5 */
+                set_debugreg(next->debugreg6, 6);
+                set_debugreg(next->debugreg7, 7);
+        }
+
+        if (test_tsk_thread_flag(prev_p, TIF_NOTSC) ^
+            test_tsk_thread_flag(next_p, TIF_NOTSC)) {
+                /* prev and next are different */
+                if (test_tsk_thread_flag(next_p, TIF_NOTSC))
+                        hard_disable_TSC();
+                else
+                        hard_enable_TSC();
+        }
+
+        if (test_tsk_thread_flag(next_p, TIF_IO_BITMAP)) {
+                /*
+                 * Copy the relevant range of the IO bitmap.
+                 * Normally this is 128 bytes or less:
+                 */
+                memcpy(tss->io_bitmap, next->io_bitmap_ptr,
+                       max(prev->io_bitmap_max, next->io_bitmap_max));
+        } else if (test_tsk_thread_flag(prev_p, TIF_IO_BITMAP)) {
+                /*
+                 * Clear any possible leftover bits:
+                 */
+                memset(tss->io_bitmap, 0xff, prev->io_bitmap_max);
+        }
+}
+
+int sys_fork(struct pt_regs *regs)
+{
+        return do_fork(SIGCHLD, regs->sp, regs, 0, NULL, NULL);
+}
+
+/*
+ * This is trivial, and on the face of it looks like it
+ * could equally well be done in user mode.
+ *
+ * Not so, for quite unobvious reasons - register pressure.
+ * In user mode vfork() cannot have a stack frame, and if
+ * done by calling the "clone()" system call directly, you
+ * do not have enough call-clobbered registers to hold all
+ * the information you need.
+ */
+int sys_vfork(struct pt_regs *regs)
+{
+        return do_fork(CLONE_VFORK | CLONE_VM | SIGCHLD, regs->sp, regs, 0,
+                       NULL, NULL);
+}
+
+
+/*
  * Idle related variables and functions
  */
 unsigned long boot_option_idle_override = 0;
@@ -350,7 +539,7 @@ static void c1e_idle(void)
 
 void __cpuinit select_idle_routine(const struct cpuinfo_x86 *c)
 {
-#ifdef CONFIG_X86_SMP
+#ifdef CONFIG_SMP
         if (pm_idle == poll_idle && smp_num_siblings > 1) {
                 printk(KERN_WARNING "WARNING: polling idle and HT enabled,"
                         " performance may degrade.\n");
diff --git a/arch/x86/kernel/process_32.c b/arch/x86/kernel/process_32.c
index bd4da2af08ae..14014d766cad 100644
--- a/arch/x86/kernel/process_32.c
+++ b/arch/x86/kernel/process_32.c
@@ -11,6 +11,7 @@
 
 #include <stdarg.h>
 
+#include <linux/stackprotector.h>
 #include <linux/cpu.h>
 #include <linux/errno.h>
 #include <linux/sched.h>
@@ -66,9 +67,6 @@ asmlinkage void ret_from_fork(void) __asm__("ret_from_fork");
 DEFINE_PER_CPU(struct task_struct *, current_task) = &init_task;
 EXPORT_PER_CPU_SYMBOL(current_task);
 
-DEFINE_PER_CPU(int, cpu_number);
-EXPORT_PER_CPU_SYMBOL(cpu_number);
-
 /*
  * Return saved PC of a blocked thread.
  */
@@ -94,6 +92,15 @@ void cpu_idle(void)
 {
         int cpu = smp_processor_id();
 
+        /*
+         * If we're the non-boot CPU, nothing set the stack canary up
+         * for us.  CPU0 already has it initialized but no harm in
+         * doing it again.  This is a good place for updating it, as
+         * we wont ever return from this function (so the invalid
+         * canaries already on the stack wont ever trigger).
+         */
+        boot_init_stack_canary();
+
         current_thread_info()->status |= TS_POLLING;
 
         /* endless idle loop with no priority at all */
@@ -108,7 +115,6 @@ void cpu_idle(void)
                                 play_dead();
 
                         local_irq_disable();
-                        __get_cpu_var(irq_stat).idle_timestamp = jiffies;
                         /* Don't trace irqs off for idle */
                         stop_critical_timings();
                         pm_idle();
@@ -132,7 +138,7 @@ void __show_regs(struct pt_regs *regs, int all)
         if (user_mode_vm(regs)) {
                 sp = regs->sp;
                 ss = regs->ss & 0xffff;
-                savesegment(gs, gs);
+                gs = get_user_gs(regs);
         } else {
                 sp = (unsigned long) (&regs->sp);
                 savesegment(ss, ss);
@@ -213,6 +219,7 @@ int kernel_thread(int (*fn)(void *), void *arg, unsigned long flags)
         regs.ds = __USER_DS;
         regs.es = __USER_DS;
         regs.fs = __KERNEL_PERCPU;
+        regs.gs = __KERNEL_STACK_CANARY;
         regs.orig_ax = -1;
         regs.ip = (unsigned long) kernel_thread_helper;
         regs.cs = __KERNEL_CS | get_kernel_rpl();
@@ -223,55 +230,6 @@ int kernel_thread(int (*fn)(void *), void *arg, unsigned long flags)
 }
 EXPORT_SYMBOL(kernel_thread);
 
-/*
- * Free current thread data structures etc..
- */
-void exit_thread(void)
-{
-        /* The process may have allocated an io port bitmap... nuke it. */
-        if (unlikely(test_thread_flag(TIF_IO_BITMAP))) {
-                struct task_struct *tsk = current;
-                struct thread_struct *t = &tsk->thread;
-                int cpu = get_cpu();
-                struct tss_struct *tss = &per_cpu(init_tss, cpu);
-
-                kfree(t->io_bitmap_ptr);
-                t->io_bitmap_ptr = NULL;
-                clear_thread_flag(TIF_IO_BITMAP);
-                /*
-                 * Careful, clear this in the TSS too:
-                 */
-                memset(tss->io_bitmap, 0xff, tss->io_bitmap_max);
-                t->io_bitmap_max = 0;
-                tss->io_bitmap_owner = NULL;
-                tss->io_bitmap_max = 0;
-                tss->x86_tss.io_bitmap_base = INVALID_IO_BITMAP_OFFSET;
-                put_cpu();
-        }
-
-        ds_exit_thread(current);
-}
-
-void flush_thread(void)
-{
-        struct task_struct *tsk = current;
-
-        tsk->thread.debugreg0 = 0;
-        tsk->thread.debugreg1 = 0;
-        tsk->thread.debugreg2 = 0;
-        tsk->thread.debugreg3 = 0;
-        tsk->thread.debugreg6 = 0;
-        tsk->thread.debugreg7 = 0;
-        memset(tsk->thread.tls_array, 0, sizeof(tsk->thread.tls_array));
-        clear_tsk_thread_flag(tsk, TIF_DEBUG);
-        /*
-         * Forget coprocessor state..
-         */
-        tsk->fpu_counter = 0;
-        clear_fpu(tsk);
-        clear_used_math();
-}
-
 void release_thread(struct task_struct *dead_task)
 {
         BUG_ON(dead_task->mm);
@@ -305,7 +263,7 @@ int copy_thread(int nr, unsigned long clone_flags, unsigned long sp,
 
         p->thread.ip = (unsigned long) ret_from_fork;
 
-        savesegment(gs, p->thread.gs);
+        task_user_gs(p) = get_user_gs(regs);
 
         tsk = current;
         if (unlikely(test_tsk_thread_flag(tsk, TIF_IO_BITMAP))) {
@@ -343,7 +301,7 @@ int copy_thread(int nr, unsigned long clone_flags, unsigned long sp,
 void
 start_thread(struct pt_regs *regs, unsigned long new_ip, unsigned long new_sp)
 {
-        __asm__("movl %0, %%gs" : : "r"(0));
+        set_user_gs(regs, 0);
         regs->fs                = 0;
         set_fs(USER_DS);
         regs->ds                = __USER_DS;
@@ -359,127 +317,6 @@ start_thread(struct pt_regs *regs, unsigned long new_ip, unsigned long new_sp)
 }
 EXPORT_SYMBOL_GPL(start_thread);
 
-static void hard_disable_TSC(void)
-{
-        write_cr4(read_cr4() | X86_CR4_TSD);
-}
-
-void disable_TSC(void)
-{
-        preempt_disable();
-        if (!test_and_set_thread_flag(TIF_NOTSC))
-                /*
-                 * Must flip the CPU state synchronously with
-                 * TIF_NOTSC in the current running context.
-                 */
-                hard_disable_TSC();
-        preempt_enable();
-}
-
-static void hard_enable_TSC(void)
-{
-        write_cr4(read_cr4() & ~X86_CR4_TSD);
-}
-
-static void enable_TSC(void)
-{
-        preempt_disable();
-        if (test_and_clear_thread_flag(TIF_NOTSC))
-                /*
-                 * Must flip the CPU state synchronously with
-                 * TIF_NOTSC in the current running context.
-                 */
-                hard_enable_TSC();
-        preempt_enable();
-}
-
-int get_tsc_mode(unsigned long adr)
-{
-        unsigned int val;
-
-        if (test_thread_flag(TIF_NOTSC))
-                val = PR_TSC_SIGSEGV;
-        else
-                val = PR_TSC_ENABLE;
-
-        return put_user(val, (unsigned int __user *)adr);
-}
-
-int set_tsc_mode(unsigned int val)
-{
-        if (val == PR_TSC_SIGSEGV)
-                disable_TSC();
-        else if (val == PR_TSC_ENABLE)
-                enable_TSC();
-        else
-                return -EINVAL;
-
-        return 0;
-}
-
-static noinline void
-__switch_to_xtra(struct task_struct *prev_p, struct task_struct *next_p,
-                 struct tss_struct *tss)
-{
-        struct thread_struct *prev, *next;
-
-        prev = &prev_p->thread;
-        next = &next_p->thread;
-
-        if (test_tsk_thread_flag(next_p, TIF_DS_AREA_MSR) ||
-            test_tsk_thread_flag(prev_p, TIF_DS_AREA_MSR))
-                ds_switch_to(prev_p, next_p);
-        else if (next->debugctlmsr != prev->debugctlmsr)
-                update_debugctlmsr(next->debugctlmsr);
-
-        if (test_tsk_thread_flag(next_p, TIF_DEBUG)) {
-                set_debugreg(next->debugreg0, 0);
-                set_debugreg(next->debugreg1, 1);
-                set_debugreg(next->debugreg2, 2);
-                set_debugreg(next->debugreg3, 3);
-                /* no 4 and 5 */
-                set_debugreg(next->debugreg6, 6);
-                set_debugreg(next->debugreg7, 7);
-        }
-
-        if (test_tsk_thread_flag(prev_p, TIF_NOTSC) ^
-            test_tsk_thread_flag(next_p, TIF_NOTSC)) {
-                /* prev and next are different */
-                if (test_tsk_thread_flag(next_p, TIF_NOTSC))
-                        hard_disable_TSC();
-                else
-                        hard_enable_TSC();
-        }
-
-        if (!test_tsk_thread_flag(next_p, TIF_IO_BITMAP)) {
-                /*
-                 * Disable the bitmap via an invalid offset. We still cache
-                 * the previous bitmap owner and the IO bitmap contents:
-                 */
-                tss->x86_tss.io_bitmap_base = INVALID_IO_BITMAP_OFFSET;
-                return;
-        }
-
-        if (likely(next == tss->io_bitmap_owner)) {
-                /*
-                 * Previous owner of the bitmap (hence the bitmap content)
-                 * matches the next task, we dont have to do anything but
-                 * to set a valid offset in the TSS:
-                 */
-                tss->x86_tss.io_bitmap_base = IO_BITMAP_OFFSET;
-                return;
-        }
-        /*
-         * Lazy TSS's I/O bitmap copy. We set an invalid offset here
-         * and we let the task to get a GPF in case an I/O instruction
-         * is performed.  The handler of the GPF will verify that the
-         * faulting task has a valid I/O bitmap and, it true, does the
-         * real copy and restart the instruction.  This will save us
-         * redundant copies when the currently switched task does not
-         * perform any I/O during its timeslice.
-         */
-        tss->x86_tss.io_bitmap_base = INVALID_IO_BITMAP_OFFSET_LAZY;
-}
 
 /*
  *      switch_to(x,yn) should switch tasks from x to y.
@@ -540,7 +377,7 @@ __switch_to(struct task_struct *prev_p, struct task_struct *next_p)
          * used %fs or %gs (it does not today), or if the kernel is
          * running inside of a hypervisor layer.
          */
-        savesegment(gs, prev->gs);
+        lazy_save_gs(prev->gs);
 
         /*
          * Load the per-thread Thread-Local Storage descriptor.
@@ -586,64 +423,44 @@ __switch_to(struct task_struct *prev_p, struct task_struct *next_p)
          * Restore %gs if needed (which is common)
          */
         if (prev->gs | next->gs)
-                loadsegment(gs, next->gs);
+                lazy_load_gs(next->gs);
 
-        x86_write_percpu(current_task, next_p);
+        percpu_write(current_task, next_p);
 
         return prev_p;
 }
 
-asmlinkage int sys_fork(struct pt_regs regs)
-{
-        return do_fork(SIGCHLD, regs.sp, &regs, 0, NULL, NULL);
-}
-
-asmlinkage int sys_clone(struct pt_regs regs)
+int sys_clone(struct pt_regs *regs)
 {
         unsigned long clone_flags;
         unsigned long newsp;
         int __user *parent_tidptr, *child_tidptr;
 
-        clone_flags = regs.bx;
-        newsp = regs.cx;
-        parent_tidptr = (int __user *)regs.dx;
-        child_tidptr = (int __user *)regs.di;
+        clone_flags = regs->bx;
+        newsp = regs->cx;
+        parent_tidptr = (int __user *)regs->dx;
+        child_tidptr = (int __user *)regs->di;
         if (!newsp)
-                newsp = regs.sp;
-        return do_fork(clone_flags, newsp, &regs, 0, parent_tidptr, child_tidptr);
-}
-
-/*
- * This is trivial, and on the face of it looks like it
- * could equally well be done in user mode.
- *
- * Not so, for quite unobvious reasons - register pressure.
- * In user mode vfork() cannot have a stack frame, and if
- * done by calling the "clone()" system call directly, you
- * do not have enough call-clobbered registers to hold all
- * the information you need.
- */
-asmlinkage int sys_vfork(struct pt_regs regs)
-{
-        return do_fork(CLONE_VFORK | CLONE_VM | SIGCHLD, regs.sp, &regs, 0, NULL, NULL);
+                newsp = regs->sp;
+        return do_fork(clone_flags, newsp, regs, 0, parent_tidptr, child_tidptr);
 }
 
 /*
  * sys_execve() executes a new program.
  */
-asmlinkage int sys_execve(struct pt_regs regs)
+int sys_execve(struct pt_regs *regs)
 {
         int error;
         char *filename;
 
-        filename = getname((char __user *) regs.bx);
+        filename = getname((char __user *) regs->bx);
         error = PTR_ERR(filename);
         if (IS_ERR(filename))
                 goto out;
         error = do_execve(filename,
-                        (char __user * __user *) regs.cx,
-                        (char __user * __user *) regs.dx,
-                        &regs);
+                        (char __user * __user *) regs->cx,
+                        (char __user * __user *) regs->dx,
+                        regs);
         if (error == 0) {
                 /* Make sure we don't return using sysenter.. */
                 set_thread_flag(TIF_IRET);
diff --git a/arch/x86/kernel/process_64.c b/arch/x86/kernel/process_64.c
index 85b4cb5c1980..abb7e6a7f0c6 100644
--- a/arch/x86/kernel/process_64.c
+++ b/arch/x86/kernel/process_64.c
@@ -16,6 +16,7 @@
 
 #include <stdarg.h>
 
+#include <linux/stackprotector.h>
 #include <linux/cpu.h>
 #include <linux/errno.h>
 #include <linux/sched.h>
@@ -47,7 +48,6 @@
 #include <asm/processor.h>
 #include <asm/i387.h>
 #include <asm/mmu_context.h>
-#include <asm/pda.h>
 #include <asm/prctl.h>
 #include <asm/desc.h>
 #include <asm/proto.h>
@@ -58,6 +58,12 @@
 
 asmlinkage extern void ret_from_fork(void);
 
+DEFINE_PER_CPU(struct task_struct *, current_task) = &init_task;
+EXPORT_PER_CPU_SYMBOL(current_task);
+
+DEFINE_PER_CPU(unsigned long, old_rsp);
+static DEFINE_PER_CPU(unsigned char, is_idle);
+
 unsigned long kernel_thread_flags = CLONE_VM | CLONE_UNTRACED;
 
 static ATOMIC_NOTIFIER_HEAD(idle_notifier);
@@ -76,13 +82,13 @@ EXPORT_SYMBOL_GPL(idle_notifier_unregister);
 
 void enter_idle(void)
 {
-        write_pda(isidle, 1);
+        percpu_write(is_idle, 1);
         atomic_notifier_call_chain(&idle_notifier, IDLE_START, NULL);
 }
 
 static void __exit_idle(void)
 {
-        if (test_and_clear_bit_pda(0, isidle) == 0)
+        if (x86_test_and_clear_bit_percpu(0, is_idle) == 0)
                 return;
         atomic_notifier_call_chain(&idle_notifier, IDLE_END, NULL);
 }
@@ -112,6 +118,16 @@ static inline void play_dead(void)
 void cpu_idle(void)
 {
         current_thread_info()->status |= TS_POLLING;
+
+        /*
+         * If we're the non-boot CPU, nothing set the stack canary up
+         * for us.  CPU0 already has it initialized but no harm in
+         * doing it again.  This is a good place for updating it, as
+         * we wont ever return from this function (so the invalid
+         * canaries already on the stack wont ever trigger).
+         */
+        boot_init_stack_canary();
+
         /* endless idle loop with no priority at all */
         while (1) {
                 tick_nohz_stop_sched_tick(1);
@@ -221,61 +237,6 @@ void show_regs(struct pt_regs *regs)
         show_trace(NULL, regs, (void *)(regs + 1), regs->bp);
 }
 
-/*
- * Free current thread data structures etc..
- */
-void exit_thread(void)
-{
-        struct task_struct *me = current;
-        struct thread_struct *t = &me->thread;
-
-        if (me->thread.io_bitmap_ptr) {
-                struct tss_struct *tss = &per_cpu(init_tss, get_cpu());
-
-                kfree(t->io_bitmap_ptr);
-                t->io_bitmap_ptr = NULL;
-                clear_thread_flag(TIF_IO_BITMAP);
-                /*
-                 * Careful, clear this in the TSS too:
-                 */
-                memset(tss->io_bitmap, 0xff, t->io_bitmap_max);
-                t->io_bitmap_max = 0;
-                put_cpu();
-        }
-
-        ds_exit_thread(current);
-}
-
-void flush_thread(void)
-{
-        struct task_struct *tsk = current;
-
-        if (test_tsk_thread_flag(tsk, TIF_ABI_PENDING)) {
-                clear_tsk_thread_flag(tsk, TIF_ABI_PENDING);
-                if (test_tsk_thread_flag(tsk, TIF_IA32)) {
-                        clear_tsk_thread_flag(tsk, TIF_IA32);
-                } else {
-                        set_tsk_thread_flag(tsk, TIF_IA32);
-                        current_thread_info()->status |= TS_COMPAT;
-                }
-        }
-        clear_tsk_thread_flag(tsk, TIF_DEBUG);
-
-        tsk->thread.debugreg0 = 0;
-        tsk->thread.debugreg1 = 0;
-        tsk->thread.debugreg2 = 0;
-        tsk->thread.debugreg3 = 0;
-        tsk->thread.debugreg6 = 0;
-        tsk->thread.debugreg7 = 0;
-        memset(tsk->thread.tls_array, 0, sizeof(tsk->thread.tls_array));
-        /*
-         * Forget coprocessor state..
-         */
-        tsk->fpu_counter = 0;
-        clear_fpu(tsk);
-        clear_used_math();
-}
-
 void release_thread(struct task_struct *dead_task)
 {
         if (dead_task->mm) {
@@ -397,7 +358,7 @@ start_thread(struct pt_regs *regs, unsigned long new_ip, unsigned long new_sp)
         load_gs_index(0);
         regs->ip                = new_ip;
         regs->sp                = new_sp;
-        write_pda(oldrsp, new_sp);
+        percpu_write(old_rsp, new_sp);
         regs->cs                = __USER_CS;
         regs->ss                = __USER_DS;
         regs->flags             = 0x200;
@@ -409,118 +370,6 @@ start_thread(struct pt_regs *regs, unsigned long new_ip, unsigned long new_sp)
 }
 EXPORT_SYMBOL_GPL(start_thread);
 
-static void hard_disable_TSC(void)
-{
-        write_cr4(read_cr4() | X86_CR4_TSD);
-}
-
-void disable_TSC(void)
-{
-        preempt_disable();
-        if (!test_and_set_thread_flag(TIF_NOTSC))
-                /*
-                 * Must flip the CPU state synchronously with
-                 * TIF_NOTSC in the current running context.
-                 */
-                hard_disable_TSC();
-        preempt_enable();
-}
-
-static void hard_enable_TSC(void)
-{
-        write_cr4(read_cr4() & ~X86_CR4_TSD);
-}
-
-static void enable_TSC(void)
-{
-        preempt_disable();
-        if (test_and_clear_thread_flag(TIF_NOTSC))
-                /*
-                 * Must flip the CPU state synchronously with
-                 * TIF_NOTSC in the current running context.
-                 */
-                hard_enable_TSC();
-        preempt_enable();
-}
-
-int get_tsc_mode(unsigned long adr)
-{
-        unsigned int val;
-
-        if (test_thread_flag(TIF_NOTSC))
-                val = PR_TSC_SIGSEGV;
-        else
-                val = PR_TSC_ENABLE;
-
-        return put_user(val, (unsigned int __user *)adr);
-}
-
-int set_tsc_mode(unsigned int val)
-{
-        if (val == PR_TSC_SIGSEGV)
-                disable_TSC();
-        else if (val == PR_TSC_ENABLE)
-                enable_TSC();
-        else
-                return -EINVAL;
-
-        return 0;
-}
-
-/*
- * This special macro can be used to load a debugging register
- */
-#define loaddebug(thread, r) set_debugreg(thread->debugreg ## r, r)
-
-static inline void __switch_to_xtra(struct task_struct *prev_p,
-                                    struct task_struct *next_p,
-                                    struct tss_struct *tss)
-{
-        struct thread_struct *prev, *next;
-
-        prev = &prev_p->thread,
-        next = &next_p->thread;
-
-        if (test_tsk_thread_flag(next_p, TIF_DS_AREA_MSR) ||
-            test_tsk_thread_flag(prev_p, TIF_DS_AREA_MSR))
-                ds_switch_to(prev_p, next_p);
-        else if (next->debugctlmsr != prev->debugctlmsr)
-                update_debugctlmsr(next->debugctlmsr);
-
-        if (test_tsk_thread_flag(next_p, TIF_DEBUG)) {
-                loaddebug(next, 0);
-                loaddebug(next, 1);
-                loaddebug(next, 2);
-                loaddebug(next, 3);
-                /* no 4 and 5 */
-                loaddebug(next, 6);
-                loaddebug(next, 7);
-        }
-
-        if (test_tsk_thread_flag(prev_p, TIF_NOTSC) ^
-            test_tsk_thread_flag(next_p, TIF_NOTSC)) {
-                /* prev and next are different */
-                if (test_tsk_thread_flag(next_p, TIF_NOTSC))
-                        hard_disable_TSC();
-                else
-                        hard_enable_TSC();
-        }
-
-        if (test_tsk_thread_flag(next_p, TIF_IO_BITMAP)) {
-                /*
-                 * Copy the relevant range of the IO bitmap.
-                 * Normally this is 128 bytes or less:
-                 */
-                memcpy(tss->io_bitmap, next->io_bitmap_ptr,
-                       max(prev->io_bitmap_max, next->io_bitmap_max));
-        } else if (test_tsk_thread_flag(prev_p, TIF_IO_BITMAP)) {
-                /*
-                 * Clear any possible leftover bits:
-                 */
-                memset(tss->io_bitmap, 0xff, prev->io_bitmap_max);
-        }
-}
-
 /*
  *      switch_to(x,y) should switch tasks from x to y.
  *
@@ -618,21 +467,13 @@ __switch_to(struct task_struct *prev_p, struct task_struct *next_p)
         /*
          * Switch the PDA and FPU contexts.
          */
-        prev->usersp = read_pda(oldrsp);
-        write_pda(oldrsp, next->usersp);
-        write_pda(pcurrent, next_p);
+        prev->usersp = percpu_read(old_rsp);
+        percpu_write(old_rsp, next->usersp);
+        percpu_write(current_task, next_p);
 
-        write_pda(kernelstack,
+        percpu_write(kernel_stack,
                   (unsigned long)task_stack_page(next_p) +
-                  THREAD_SIZE - PDA_STACKOFFSET);
-#ifdef CONFIG_CC_STACKPROTECTOR
-        write_pda(stack_canary, next_p->stack_canary);
-        /*
-         * Build time only check to make sure the stack_canary is at
-         * offset 40 in the pda; this is a gcc ABI requirement
-         */
-        BUILD_BUG_ON(offsetof(struct x8664_pda, stack_canary) != 40);
-#endif
+                  THREAD_SIZE - KERNEL_STACK_OFFSET);
 
         /*
          * Now maybe reload the debug registers and handle I/O bitmaps
@@ -686,11 +527,6 @@ void set_personality_64bit(void)
         current->personality &= ~READ_IMPLIES_EXEC;
 }
 
-asmlinkage long sys_fork(struct pt_regs *regs)
-{
-        return do_fork(SIGCHLD, regs->sp, regs, 0, NULL, NULL);
-}
-
 asmlinkage long
 sys_clone(unsigned long clone_flags, unsigned long newsp,
           void __user *parent_tid, void __user *child_tid, struct pt_regs *regs)
@@ -700,22 +536,6 @@ sys_clone(unsigned long clone_flags, unsigned long newsp,
         return do_fork(clone_flags, newsp, regs, 0, parent_tid, child_tid);
 }
 
-/*
- * This is trivial, and on the face of it looks like it
- * could equally well be done in user mode.
- *
- * Not so, for quite unobvious reasons - register pressure.
- * In user mode vfork() cannot have a stack frame, and if
- * done by calling the "clone()" system call directly, you
- * do not have enough call-clobbered registers to hold all
- * the information you need.
- */
-asmlinkage long sys_vfork(struct pt_regs *regs)
-{
-        return do_fork(CLONE_VFORK | CLONE_VM | SIGCHLD, regs->sp, regs, 0,
-                    NULL, NULL);
-}
-
 unsigned long get_wchan(struct task_struct *p)
 {
         unsigned long stack;
diff --git a/arch/x86/kernel/ptrace.c b/arch/x86/kernel/ptrace.c
index 06ca07f6ad86..3d9672e59c16 100644
--- a/arch/x86/kernel/ptrace.c
+++ b/arch/x86/kernel/ptrace.c
@@ -75,10 +75,7 @@ static inline bool invalid_selector(u16 value)
 static unsigned long *pt_regs_access(struct pt_regs *regs, unsigned long regno)
 {
         BUILD_BUG_ON(offsetof(struct pt_regs, bx) != 0);
-        regno >>= 2;
-        if (regno > FS)
-                --regno;
-        return &regs->bx + regno;
+        return &regs->bx + (regno >> 2);
 }
 
 static u16 get_segment_reg(struct task_struct *task, unsigned long offset)
@@ -90,9 +87,10 @@ static u16 get_segment_reg(struct task_struct *task, unsigned long offset)
         if (offset != offsetof(struct user_regs_struct, gs))
                 retval = *pt_regs_access(task_pt_regs(task), offset);
         else {
-                retval = task->thread.gs;
                 if (task == current)
-                        savesegment(gs, retval);
+                        retval = get_user_gs(task_pt_regs(task));
+                else
+                        retval = task_user_gs(task);
         }
         return retval;
 }
@@ -126,13 +124,10 @@ static int set_segment_reg(struct task_struct *task,
                 break;
 
         case offsetof(struct user_regs_struct, gs):
-                task->thread.gs = value;
                 if (task == current)
-                        /*
-                         * The user-mode %gs is not affected by
-                         * kernel entry, so we must update the CPU.
-                         */
-                        loadsegment(gs, value);
+                        set_user_gs(task_pt_regs(task), value);
+                else
+                        task_user_gs(task) = value;
         }
 
         return 0;
@@ -273,7 +268,7 @@ static unsigned long debugreg_addr_limit(struct task_struct *task)
         if (test_tsk_thread_flag(task, TIF_IA32))
                 return IA32_PAGE_OFFSET - 3;
 #endif
-        return TASK_SIZE64 - 7;
+        return TASK_SIZE_MAX - 7;
 }
 
 #endif  /* CONFIG_X86_32 */
diff --git a/arch/x86/kernel/quirks.c b/arch/x86/kernel/quirks.c
index 309949e9e1c1..697d1b78cfbf 100644
--- a/arch/x86/kernel/quirks.c
+++ b/arch/x86/kernel/quirks.c
@@ -172,7 +172,8 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH8_4,
                          ich_force_enable_hpet);
 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH9_7,
                          ich_force_enable_hpet);
-
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x3a16,   /* ICH10 */
+                         ich_force_enable_hpet);
 
 static struct pci_dev *cached_dev;
 
diff --git a/arch/x86/kernel/reboot.c b/arch/x86/kernel/reboot.c
index 4526b3a75ed2..2aef36d8aca2 100644
--- a/arch/x86/kernel/reboot.c
+++ b/arch/x86/kernel/reboot.c
@@ -14,6 +14,7 @@
 #include <asm/reboot.h>
 #include <asm/pci_x86.h>
 #include <asm/virtext.h>
+#include <asm/cpu.h>
 
 #ifdef CONFIG_X86_32
 # include <linux/dmi.h>
@@ -23,8 +24,6 @@
 # include <asm/iommu.h>
 #endif
 
-#include <mach_ipi.h>
-
 /*
  * Power off function, if any
  */
@@ -658,7 +657,7 @@ static int crash_nmi_callback(struct notifier_block *self,
 
 static void smp_send_nmi_allbutself(void)
 {
-        send_IPI_allbutself(NMI_VECTOR);
+        apic->send_IPI_allbutself(NMI_VECTOR);
 }
 
 static struct notifier_block crash_nmi_nb = {
diff --git a/arch/x86/kernel/relocate_kernel_32.S b/arch/x86/kernel/relocate_kernel_32.S
index a160f3119725..2064d0aa8d28 100644
--- a/arch/x86/kernel/relocate_kernel_32.S
+++ b/arch/x86/kernel/relocate_kernel_32.S
@@ -7,7 +7,7 @@
  */
 
 #include <linux/linkage.h>
-#include <asm/page.h>
+#include <asm/page_types.h>
 #include <asm/kexec.h>
 #include <asm/processor-flags.h>
 
diff --git a/arch/x86/kernel/relocate_kernel_64.S b/arch/x86/kernel/relocate_kernel_64.S
index f5afe665a82b..d32cfb27a479 100644
--- a/arch/x86/kernel/relocate_kernel_64.S
+++ b/arch/x86/kernel/relocate_kernel_64.S
@@ -7,10 +7,10 @@
  */
 
 #include <linux/linkage.h>
-#include <asm/page.h>
+#include <asm/page_types.h>
 #include <asm/kexec.h>
 #include <asm/processor-flags.h>
-#include <asm/pgtable.h>
+#include <asm/pgtable_types.h>
 
 /*
  * Must be relocatable PIC code callable as a C function
@@ -29,122 +29,6 @@ relocate_kernel:
          * %rdx start address
          */
 
-        /* map the control page at its virtual address */
-
-        movq    $0x0000ff8000000000, %r10        /* mask */
-        mov     $(39 - 3), %cl                   /* bits to shift */
-        movq    PTR(VA_CONTROL_PAGE)(%rsi), %r11 /* address to map */
-
-        movq    %r11, %r9
-        andq    %r10, %r9
-        shrq    %cl, %r9
-
-        movq    PTR(VA_PGD)(%rsi), %r8
-        addq    %r8, %r9
-        movq    PTR(PA_PUD_0)(%rsi), %r8
-        orq     $PAGE_ATTR, %r8
-        movq    %r8, (%r9)
-
-        shrq    $9, %r10
-        sub     $9, %cl
-
-        movq    %r11, %r9
-        andq    %r10, %r9
-        shrq    %cl, %r9
-
-        movq    PTR(VA_PUD_0)(%rsi), %r8
-        addq    %r8, %r9
-        movq    PTR(PA_PMD_0)(%rsi), %r8
-        orq     $PAGE_ATTR, %r8
-        movq    %r8, (%r9)
-
-        shrq    $9, %r10
-        sub     $9, %cl
-
-        movq    %r11, %r9
-        andq    %r10, %r9
-        shrq    %cl, %r9
-
-        movq    PTR(VA_PMD_0)(%rsi), %r8
-        addq    %r8, %r9
-        movq    PTR(PA_PTE_0)(%rsi), %r8
-        orq     $PAGE_ATTR, %r8
-        movq    %r8, (%r9)
-
-        shrq    $9, %r10
-        sub     $9, %cl
-
-        movq    %r11, %r9
-        andq    %r10, %r9
-        shrq    %cl, %r9
-
-        movq    PTR(VA_PTE_0)(%rsi), %r8
-        addq    %r8, %r9
-        movq    PTR(PA_CONTROL_PAGE)(%rsi), %r8
-        orq     $PAGE_ATTR, %r8
-        movq    %r8, (%r9)
-
-        /* identity map the control page at its physical address */
-
-        movq    $0x0000ff8000000000, %r10        /* mask */
-        mov     $(39 - 3), %cl                   /* bits to shift */
-        movq    PTR(PA_CONTROL_PAGE)(%rsi), %r11 /* address to map */
-
-        movq    %r11, %r9
-        andq    %r10, %r9
-        shrq    %cl, %r9
-
-        movq    PTR(VA_PGD)(%rsi), %r8
-        addq    %r8, %r9
-        movq    PTR(PA_PUD_1)(%rsi), %r8
-        orq     $PAGE_ATTR, %r8
-        movq    %r8, (%r9)
-
-        shrq    $9, %r10
-        sub     $9, %cl
-
-        movq    %r11, %r9
-        andq    %r10, %r9
-        shrq    %cl, %r9
-
-        movq    PTR(VA_PUD_1)(%rsi), %r8
-        addq    %r8, %r9
-        movq    PTR(PA_PMD_1)(%rsi), %r8
-        orq     $PAGE_ATTR, %r8
-        movq    %r8, (%r9)
-
-        shrq    $9, %r10
-        sub     $9, %cl
-
-        movq    %r11, %r9
-        andq    %r10, %r9
-        shrq    %cl, %r9
-
-        movq    PTR(VA_PMD_1)(%rsi), %r8
-        addq    %r8, %r9
-        movq    PTR(PA_PTE_1)(%rsi), %r8
-        orq     $PAGE_ATTR, %r8
-        movq    %r8, (%r9)
-
-        shrq    $9, %r10
-        sub     $9, %cl
-
-        movq    %r11, %r9
-        andq    %r10, %r9
-        shrq    %cl, %r9
-
-        movq    PTR(VA_PTE_1)(%rsi), %r8
-        addq    %r8, %r9
-        movq    PTR(PA_CONTROL_PAGE)(%rsi), %r8
-        orq     $PAGE_ATTR, %r8
-        movq    %r8, (%r9)
-
-relocate_new_kernel:
-        /* %rdi indirection_page
-         * %rsi page_list
-         * %rdx start address
-         */
-
         /* zero out flags, and disable interrupts */
         pushq $0
         popfq
@@ -156,9 +40,8 @@ relocate_new_kernel:
         /* get physical address of page table now too */
         movq    PTR(PA_TABLE_PAGE)(%rsi), %rcx
 
-        /* switch to new set of page tables */
-        movq    PTR(PA_PGD)(%rsi), %r9
-        movq    %r9, %cr3
+        /* Switch to the identity mapped page tables */
+        movq    %rcx, %cr3
 
         /* setup a new stack at the end of the physical control page */
         lea     PAGE_SIZE(%r8), %rsp
@@ -194,9 +77,7 @@ identity_mapped:
         jmp 1f
 1:
 
-        /* Switch to the identity mapped page tables,
-         * and flush the TLB.
-        */
+        /* Flush the TLB (needed?) */
         movq    %rcx, %cr3
 
         /* Do the copies */
diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c
index 6a8811a69324..b746deb9ebc6 100644
--- a/arch/x86/kernel/setup.c
+++ b/arch/x86/kernel/setup.c
@@ -74,14 +74,15 @@
 #include <asm/e820.h>
 #include <asm/mpspec.h>
 #include <asm/setup.h>
-#include <asm/arch_hooks.h>
 #include <asm/efi.h>
+#include <asm/timer.h>
+#include <asm/i8259.h>
 #include <asm/sections.h>
 #include <asm/dmi.h>
 #include <asm/io_apic.h>
 #include <asm/ist.h>
 #include <asm/vmi.h>
-#include <setup_arch.h>
+#include <asm/setup_arch.h>
 #include <asm/bios_ebda.h>
 #include <asm/cacheflush.h>
 #include <asm/processor.h>
@@ -89,7 +90,7 @@
 
 #include <asm/system.h>
 #include <asm/vsyscall.h>
-#include <asm/smp.h>
+#include <asm/cpu.h>
 #include <asm/desc.h>
 #include <asm/dma.h>
 #include <asm/iommu.h>
@@ -97,7 +98,6 @@
 #include <asm/mmu_context.h>
 #include <asm/proto.h>
 
-#include <mach_apic.h>
 #include <asm/paravirt.h>
 #include <asm/hypervisor.h>
 
@@ -112,6 +112,20 @@
 #define ARCH_SETUP
 #endif
 
+unsigned int boot_cpu_id __read_mostly;
+
+#ifdef CONFIG_X86_64
+int default_cpu_present_to_apicid(int mps_cpu)
+{
+        return __default_cpu_present_to_apicid(mps_cpu);
+}
+
+int default_check_phys_apicid_present(int boot_cpu_physical_apicid)
+{
+        return __default_check_phys_apicid_present(boot_cpu_physical_apicid);
+}
+#endif
+
 #ifndef CONFIG_DEBUG_BOOT_PARAMS
 struct boot_params __initdata boot_params;
 #else
@@ -586,20 +600,7 @@ static int __init setup_elfcorehdr(char *arg)
 early_param("elfcorehdr", setup_elfcorehdr);
 #endif
 
-static int __init default_update_genapic(void)
-{
-#ifdef CONFIG_X86_SMP
-# if defined(CONFIG_X86_GENERICARCH) || defined(CONFIG_X86_64)
-        genapic->wakeup_cpu = wakeup_secondary_cpu_via_init;
-# endif
-#endif
-
-        return 0;
-}
-
-static struct x86_quirks default_x86_quirks __initdata = {
-        .update_genapic         = default_update_genapic,
-};
+static struct x86_quirks default_x86_quirks __initdata;
 
 struct x86_quirks *x86_quirks __initdata = &default_x86_quirks;
 
@@ -656,7 +657,6 @@ void __init setup_arch(char **cmdline_p)
 #ifdef CONFIG_X86_32
         memcpy(&boot_cpu_data, &new_cpu_data, sizeof(new_cpu_data));
         visws_early_detect();
-        pre_setup_arch_hook();
 #else
         printk(KERN_INFO "Command line: %s\n", boot_command_line);
 #endif
@@ -824,8 +824,7 @@ void __init setup_arch(char **cmdline_p)
 #else
         num_physpages = max_pfn;
 
-        if (cpu_has_x2apic)
-                check_x2apic();
+        check_x2apic();
 
         /* How many end-of-memory variables you have, grandma! */
         /* need this before calling reserve_initrd */
@@ -865,9 +864,7 @@ void __init setup_arch(char **cmdline_p)
 
         reserve_initrd();
 
-#ifdef CONFIG_X86_64
         vsmp_init();
-#endif
 
         io_delay_init();
 
@@ -893,12 +890,11 @@ void __init setup_arch(char **cmdline_p)
          */
         acpi_reserve_bootmem();
 #endif
-#ifdef CONFIG_X86_FIND_SMP_CONFIG
         /*
          * Find and reserve possible boot-time SMP configuration:
          */
         find_smp_config();
-#endif
+
         reserve_crashkernel();
 
 #ifdef CONFIG_X86_64
@@ -925,9 +921,7 @@ void __init setup_arch(char **cmdline_p)
         map_vsyscall();
 #endif
 
-#ifdef CONFIG_X86_GENERICARCH
         generic_apic_probe();
-#endif
 
         early_quirks();
 
@@ -978,4 +972,95 @@ void __init setup_arch(char **cmdline_p)
 #endif
 }
 
+#ifdef CONFIG_X86_32
 
+/**
+ * x86_quirk_pre_intr_init - initialisation prior to setting up interrupt vectors
+ *
+ * Description:
+ *      Perform any necessary interrupt initialisation prior to setting up
+ *      the "ordinary" interrupt call gates.  For legacy reasons, the ISA
+ *      interrupts should be initialised here if the machine emulates a PC
+ *      in any way.
+ **/
+void __init x86_quirk_pre_intr_init(void)
+{
+        if (x86_quirks->arch_pre_intr_init) {
+                if (x86_quirks->arch_pre_intr_init())
+                        return;
+        }
+        init_ISA_irqs();
+}
+
+/**
+ * x86_quirk_intr_init - post gate setup interrupt initialisation
+ *
+ * Description:
+ *      Fill in any interrupts that may have been left out by the general
+ *      init_IRQ() routine.  interrupts having to do with the machine rather
+ *      than the devices on the I/O bus (like APIC interrupts in intel MP
+ *      systems) are started here.
+ **/
+void __init x86_quirk_intr_init(void)
+{
+        if (x86_quirks->arch_intr_init) {
+                if (x86_quirks->arch_intr_init())
+                        return;
+        }
+}
+
+/**
+ * x86_quirk_trap_init - initialise system specific traps
+ *
+ * Description:
+ *      Called as the final act of trap_init().  Used in VISWS to initialise
+ *      the various board specific APIC traps.
+ **/
+void __init x86_quirk_trap_init(void)
+{
+        if (x86_quirks->arch_trap_init) {
+                if (x86_quirks->arch_trap_init())
+                        return;
+        }
+}
+
+static struct irqaction irq0  = {
+        .handler = timer_interrupt,
+        .flags = IRQF_DISABLED | IRQF_NOBALANCING | IRQF_IRQPOLL | IRQF_TIMER,
+        .mask = CPU_MASK_NONE,
+        .name = "timer"
+};
+
+/**
+ * x86_quirk_pre_time_init - do any specific initialisations before.
+ *
+ **/
+void __init x86_quirk_pre_time_init(void)
+{
+        if (x86_quirks->arch_pre_time_init)
+                x86_quirks->arch_pre_time_init();
+}
+
+/**
+ * x86_quirk_time_init - do any specific initialisations for the system timer.
+ *
+ * Description:
+ *      Must plug the system timer interrupt source at HZ into the IRQ listed
+ *      in irq_vectors.h:TIMER_IRQ
+ **/
+void __init x86_quirk_time_init(void)
+{
+        if (x86_quirks->arch_time_init) {
+                /*
+                 * A nonzero return code does not mean failure, it means
+                 * that the architecture quirk does not want any
+                 * generic (timer) setup to be performed after this:
+                 */
+                if (x86_quirks->arch_time_init())
+                        return;
+        }
+
+        irq0.mask = cpumask_of_cpu(0);
+        setup_irq(0, &irq0);
+}
+#endif /* CONFIG_X86_32 */
diff --git a/arch/x86/kernel/setup_percpu.c b/arch/x86/kernel/setup_percpu.c
index 01161077a49c..400331b50a53 100644
--- a/arch/x86/kernel/setup_percpu.c
+++ b/arch/x86/kernel/setup_percpu.c
@@ -7,402 +7,439 @@
 #include <linux/crash_dump.h>
 #include <linux/smp.h>
 #include <linux/topology.h>
+#include <linux/pfn.h>
 #include <asm/sections.h>
 #include <asm/processor.h>
 #include <asm/setup.h>
 #include <asm/mpspec.h>
 #include <asm/apicdef.h>
 #include <asm/highmem.h>
+#include <asm/proto.h>
+#include <asm/cpumask.h>
+#include <asm/cpu.h>
+#include <asm/stackprotector.h>
 
-#ifdef CONFIG_X86_LOCAL_APIC
-unsigned int num_processors;
-unsigned disabled_cpus __cpuinitdata;
-/* Processor that is doing the boot up */
-unsigned int boot_cpu_physical_apicid = -1U;
-EXPORT_SYMBOL(boot_cpu_physical_apicid);
-unsigned int max_physical_apicid;
-
-/* Bitmask of physically existing CPUs */
-physid_mask_t phys_cpu_present_map;
+#ifdef CONFIG_DEBUG_PER_CPU_MAPS
+# define DBG(x...) printk(KERN_DEBUG x)
+#else
+# define DBG(x...)
 #endif
 
-/* map cpu index to physical APIC ID */
-DEFINE_EARLY_PER_CPU(u16, x86_cpu_to_apicid, BAD_APICID);
-DEFINE_EARLY_PER_CPU(u16, x86_bios_cpu_apicid, BAD_APICID);
-EXPORT_EARLY_PER_CPU_SYMBOL(x86_cpu_to_apicid);
-EXPORT_EARLY_PER_CPU_SYMBOL(x86_bios_cpu_apicid);
-
-#if defined(CONFIG_NUMA) && defined(CONFIG_X86_64)
-#define X86_64_NUMA     1
+DEFINE_PER_CPU(int, cpu_number);
+EXPORT_PER_CPU_SYMBOL(cpu_number);
 
-/* map cpu index to node index */
-DEFINE_EARLY_PER_CPU(int, x86_cpu_to_node_map, NUMA_NO_NODE);
-EXPORT_EARLY_PER_CPU_SYMBOL(x86_cpu_to_node_map);
+#ifdef CONFIG_X86_64
+#define BOOT_PERCPU_OFFSET ((unsigned long)__per_cpu_load)
+#else
+#define BOOT_PERCPU_OFFSET 0
+#endif
 
-/* which logical CPUs are on which nodes */
-cpumask_t *node_to_cpumask_map;
-EXPORT_SYMBOL(node_to_cpumask_map);
+DEFINE_PER_CPU(unsigned long, this_cpu_off) = BOOT_PERCPU_OFFSET;
+EXPORT_PER_CPU_SYMBOL(this_cpu_off);
 
-/* setup node_to_cpumask_map */
-static void __init setup_node_to_cpumask_map(void);
+unsigned long __per_cpu_offset[NR_CPUS] __read_mostly = {
+        [0 ... NR_CPUS-1] = BOOT_PERCPU_OFFSET,
+};
+EXPORT_SYMBOL(__per_cpu_offset);
 
+/*
+ * On x86_64 symbols referenced from code should be reachable using
+ * 32bit relocations.  Reserve space for static percpu variables in
+ * modules so that they are always served from the first chunk which
+ * is located at the percpu segment base.  On x86_32, anything can
+ * address anywhere.  No need to reserve space in the first chunk.
+ */
+#ifdef CONFIG_X86_64
+#define PERCPU_FIRST_CHUNK_RESERVE      PERCPU_MODULE_RESERVE
 #else
-static inline void setup_node_to_cpumask_map(void) { }
+#define PERCPU_FIRST_CHUNK_RESERVE      0
 #endif
 
-#if defined(CONFIG_HAVE_SETUP_PER_CPU_AREA) && defined(CONFIG_X86_SMP)
-/*
- * Copy data used in early init routines from the initial arrays to the
- * per cpu data areas.  These arrays then become expendable and the
- * *_early_ptr's are zeroed indicating that the static arrays are gone.
+/**
+ * pcpu_need_numa - determine percpu allocation needs to consider NUMA
+ *
+ * If NUMA is not configured or there is only one NUMA node available,
+ * there is no reason to consider NUMA.  This function determines
+ * whether percpu allocation should consider NUMA or not.
+ *
+ * RETURNS:
+ * true if NUMA should be considered; otherwise, false.
  */
-static void __init setup_per_cpu_maps(void)
+static bool __init pcpu_need_numa(void)
 {
-        int cpu;
+#ifdef CONFIG_NEED_MULTIPLE_NODES
+        pg_data_t *last = NULL;
+        unsigned int cpu;
 
         for_each_possible_cpu(cpu) {
-                per_cpu(x86_cpu_to_apicid, cpu) =
-                                early_per_cpu_map(x86_cpu_to_apicid, cpu);
-                per_cpu(x86_bios_cpu_apicid, cpu) =
-                                early_per_cpu_map(x86_bios_cpu_apicid, cpu);
-#ifdef X86_64_NUMA
-                per_cpu(x86_cpu_to_node_map, cpu) =
-                                early_per_cpu_map(x86_cpu_to_node_map, cpu);
-#endif
-        }
+                int node = early_cpu_to_node(cpu);
 
-        /* indicate the early static arrays will soon be gone */
-        early_per_cpu_ptr(x86_cpu_to_apicid) = NULL;
-        early_per_cpu_ptr(x86_bios_cpu_apicid) = NULL;
-#ifdef X86_64_NUMA
-        early_per_cpu_ptr(x86_cpu_to_node_map) = NULL;
+                if (node_online(node) && NODE_DATA(node) &&
+                    last && last != NODE_DATA(node))
+                        return true;
+
+                last = NODE_DATA(node);
+        }
 #endif
+        return false;
 }
 
-#ifdef CONFIG_X86_32
-/*
- * Great future not-so-futuristic plan: make i386 and x86_64 do it
- * the same way
- */
-unsigned long __per_cpu_offset[NR_CPUS] __read_mostly;
-EXPORT_SYMBOL(__per_cpu_offset);
-static inline void setup_cpu_pda_map(void) { }
-
-#elif !defined(CONFIG_SMP)
-static inline void setup_cpu_pda_map(void) { }
-
-#else /* CONFIG_SMP && CONFIG_X86_64 */
-
-/*
- * Allocate cpu_pda pointer table and array via alloc_bootmem.
+/**
+ * pcpu_alloc_bootmem - NUMA friendly alloc_bootmem wrapper for percpu
+ * @cpu: cpu to allocate for
+ * @size: size allocation in bytes
+ * @align: alignment
+ *
+ * Allocate @size bytes aligned at @align for cpu @cpu.  This wrapper
+ * does the right thing for NUMA regardless of the current
+ * configuration.
+ *
+ * RETURNS:
+ * Pointer to the allocated area on success, NULL on failure.
  */
-static void __init setup_cpu_pda_map(void)
+static void * __init pcpu_alloc_bootmem(unsigned int cpu, unsigned long size,
+                                        unsigned long align)
 {
-        char *pda;
-        struct x8664_pda **new_cpu_pda;
-        unsigned long size;
-        int cpu;
-
-        size = roundup(sizeof(struct x8664_pda), cache_line_size());
-
-        /* allocate cpu_pda array and pointer table */
-        {
-                unsigned long tsize = nr_cpu_ids * sizeof(void *);
-                unsigned long asize = size * (nr_cpu_ids - 1);
-
-                tsize = roundup(tsize, cache_line_size());
-                new_cpu_pda = alloc_bootmem(tsize + asize);
-                pda = (char *)new_cpu_pda + tsize;
-        }
-
-        /* initialize pointer table to static pda's */
-        for_each_possible_cpu(cpu) {
-                if (cpu == 0) {
-                        /* leave boot cpu pda in place */
-                        new_cpu_pda[0] = cpu_pda(0);
-                        continue;
-                }
-                new_cpu_pda[cpu] = (struct x8664_pda *)pda;
-                new_cpu_pda[cpu]->in_bootmem = 1;
-                pda += size;
+        const unsigned long goal = __pa(MAX_DMA_ADDRESS);
+#ifdef CONFIG_NEED_MULTIPLE_NODES
+        int node = early_cpu_to_node(cpu);
+        void *ptr;
+
+        if (!node_online(node) || !NODE_DATA(node)) {
+                ptr = __alloc_bootmem_nopanic(size, align, goal);
+                pr_info("cpu %d has no node %d or node-local memory\n",
+                        cpu, node);
+                pr_debug("per cpu data for cpu%d %lu bytes at %016lx\n",
+                         cpu, size, __pa(ptr));
+        } else {
+                ptr = __alloc_bootmem_node_nopanic(NODE_DATA(node),
+                                                   size, align, goal);
+                pr_debug("per cpu data for cpu%d %lu bytes on node%d at "
+                         "%016lx\n", cpu, size, node, __pa(ptr));
         }
-
-        /* point to new pointer table */
-        _cpu_pda = new_cpu_pda;
+        return ptr;
+#else
+        return __alloc_bootmem_nopanic(size, align, goal);
+#endif
 }
 
-#endif /* CONFIG_SMP && CONFIG_X86_64 */
-
-#ifdef CONFIG_X86_64
+/*
+ * Remap allocator
+ *
+ * This allocator uses PMD page as unit.  A PMD page is allocated for
+ * each cpu and each is remapped into vmalloc area using PMD mapping.
+ * As PMD page is quite large, only part of it is used for the first
+ * chunk.  Unused part is returned to the bootmem allocator.
+ *
+ * So, the PMD pages are mapped twice - once to the physical mapping
+ * and to the vmalloc area for the first percpu chunk.  The double
+ * mapping does add one more PMD TLB entry pressure but still is much
+ * better than only using 4k mappings while still being NUMA friendly.
+ */
+#ifdef CONFIG_NEED_MULTIPLE_NODES
+static size_t pcpur_size __initdata;
+static void **pcpur_ptrs __initdata;
 
-/* correctly size the local cpu masks */
-static void __init setup_cpu_local_masks(void)
+static struct page * __init pcpur_get_page(unsigned int cpu, int pageno)
 {
-        alloc_bootmem_cpumask_var(&cpu_initialized_mask);
-        alloc_bootmem_cpumask_var(&cpu_callin_mask);
-        alloc_bootmem_cpumask_var(&cpu_callout_mask);
-        alloc_bootmem_cpumask_var(&cpu_sibling_setup_mask);
-}
+        size_t off = (size_t)pageno << PAGE_SHIFT;
 
-#else /* CONFIG_X86_32 */
+        if (off >= pcpur_size)
+                return NULL;
 
-static inline void setup_cpu_local_masks(void)
-{
+        return virt_to_page(pcpur_ptrs[cpu] + off);
 }
 
-#endif /* CONFIG_X86_32 */
-
-/*
- * Great future plan:
- * Declare PDA itself and support (irqstack,tss,pgd) as per cpu data.
- * Always point %gs to its beginning
- */
-void __init setup_per_cpu_areas(void)
+static ssize_t __init setup_pcpu_remap(size_t static_size)
 {
-        ssize_t size, old_size;
-        char *ptr;
-        int cpu;
-        unsigned long align = 1;
-
-        /* Setup cpu_pda map */
-        setup_cpu_pda_map();
+        static struct vm_struct vm;
+        pg_data_t *last;
+        size_t ptrs_size, dyn_size;
+        unsigned int cpu;
+        ssize_t ret;
+
+        /*
+         * If large page isn't supported, there's no benefit in doing
+         * this.  Also, on non-NUMA, embedding is better.
+         */
+        if (!cpu_has_pse || pcpu_need_numa())
+                return -EINVAL;
+
+        last = NULL;
+        for_each_possible_cpu(cpu) {
+                int node = early_cpu_to_node(cpu);
 
-        /* Copy section for each CPU (we discard the original) */
-        old_size = PERCPU_ENOUGH_ROOM;
-        align = max_t(unsigned long, PAGE_SIZE, align);
-        size = roundup(old_size, align);
+                if (node_online(node) && NODE_DATA(node) &&
+                    last && last != NODE_DATA(node))
+                        goto proceed;
 
-        pr_info("NR_CPUS:%d nr_cpumask_bits:%d nr_cpu_ids:%d nr_node_ids:%d\n",
-                NR_CPUS, nr_cpumask_bits, nr_cpu_ids, nr_node_ids);
+                last = NODE_DATA(node);
+        }
+        return -EINVAL;
+
+proceed:
+        /*
+         * Currently supports only single page.  Supporting multiple
+         * pages won't be too difficult if it ever becomes necessary.
+         */
+        pcpur_size = PFN_ALIGN(static_size + PERCPU_MODULE_RESERVE +
+                               PERCPU_DYNAMIC_RESERVE);
+        if (pcpur_size > PMD_SIZE) {
+                pr_warning("PERCPU: static data is larger than large page, "
+                           "can't use large page\n");
+                return -EINVAL;
+        }
+        dyn_size = pcpur_size - static_size - PERCPU_FIRST_CHUNK_RESERVE;
 
-        pr_info("PERCPU: Allocating %zd bytes of per cpu data\n", size);
+        /* allocate pointer array and alloc large pages */
+        ptrs_size = PFN_ALIGN(num_possible_cpus() * sizeof(pcpur_ptrs[0]));
+        pcpur_ptrs = alloc_bootmem(ptrs_size);
 
         for_each_possible_cpu(cpu) {
-#ifndef CONFIG_NEED_MULTIPLE_NODES
-                ptr = __alloc_bootmem(size, align,
-                                 __pa(MAX_DMA_ADDRESS));
-#else
-                int node = early_cpu_to_node(cpu);
-                if (!node_online(node) || !NODE_DATA(node)) {
-                        ptr = __alloc_bootmem(size, align,
-                                         __pa(MAX_DMA_ADDRESS));
-                        pr_info("cpu %d has no node %d or node-local memory\n",
-                                cpu, node);
-                        pr_debug("per cpu data for cpu%d at %016lx\n",
-                                 cpu, __pa(ptr));
-                } else {
-                        ptr = __alloc_bootmem_node(NODE_DATA(node), size, align,
-                                                        __pa(MAX_DMA_ADDRESS));
-                        pr_debug("per cpu data for cpu%d on node%d at %016lx\n",
-                                cpu, node, __pa(ptr));
-                }
-#endif
-                per_cpu_offset(cpu) = ptr - __per_cpu_start;
-                memcpy(ptr, __per_cpu_start, __per_cpu_end - __per_cpu_start);
+                pcpur_ptrs[cpu] = pcpu_alloc_bootmem(cpu, PMD_SIZE, PMD_SIZE);
+                if (!pcpur_ptrs[cpu])
+                        goto enomem;
+
+                /*
+                 * Only use pcpur_size bytes and give back the rest.
+                 *
+                 * Ingo: The 2MB up-rounding bootmem is needed to make
+                 * sure the partial 2MB page is still fully RAM - it's
+                 * not well-specified to have a PAT-incompatible area
+                 * (unmapped RAM, device memory, etc.) in that hole.
+                 */
+                free_bootmem(__pa(pcpur_ptrs[cpu] + pcpur_size),
+                             PMD_SIZE - pcpur_size);
+
+                memcpy(pcpur_ptrs[cpu], __per_cpu_load, static_size);
         }
 
-        /* Setup percpu data maps */
-        setup_per_cpu_maps();
-
-        /* Setup node to cpumask map */
-        setup_node_to_cpumask_map();
-
-        /* Setup cpu initialized, callin, callout masks */
-        setup_cpu_local_masks();
-}
-
-#endif
+        /* allocate address and map */
+        vm.flags = VM_ALLOC;
+        vm.size = num_possible_cpus() * PMD_SIZE;
+        vm_area_register_early(&vm, PMD_SIZE);
 
-#ifdef X86_64_NUMA
+        for_each_possible_cpu(cpu) {
+                pmd_t *pmd;
 
-/*
- * Allocate node_to_cpumask_map based on number of available nodes
- * Requires node_possible_map to be valid.
- *
- * Note: node_to_cpumask() is not valid until after this is done.
- */
-static void __init setup_node_to_cpumask_map(void)
-{
-        unsigned int node, num = 0;
-        cpumask_t *map;
-
-        /* setup nr_node_ids if not done yet */
-        if (nr_node_ids == MAX_NUMNODES) {
-                for_each_node_mask(node, node_possible_map)
-                        num = node;
-                nr_node_ids = num + 1;
+                pmd = populate_extra_pmd((unsigned long)vm.addr
+                                         + cpu * PMD_SIZE);
+                set_pmd(pmd, pfn_pmd(page_to_pfn(virt_to_page(pcpur_ptrs[cpu])),
+                                     PAGE_KERNEL_LARGE));
         }
 
-        /* allocate the map */
-        map = alloc_bootmem_low(nr_node_ids * sizeof(cpumask_t));
-
-        pr_debug("Node to cpumask map at %p for %d nodes\n",
-                 map, nr_node_ids);
-
-        /* node_to_cpumask() will now work */
-        node_to_cpumask_map = map;
+        /* we're ready, commit */
+        pr_info("PERCPU: Remapped at %p with large pages, static data "
+                "%zu bytes\n", vm.addr, static_size);
+
+        ret = pcpu_setup_first_chunk(pcpur_get_page, static_size,
+                                     PERCPU_FIRST_CHUNK_RESERVE, dyn_size,
+                                     PMD_SIZE, vm.addr, NULL);
+        goto out_free_ar;
+
+enomem:
+        for_each_possible_cpu(cpu)
+                if (pcpur_ptrs[cpu])
+                        free_bootmem(__pa(pcpur_ptrs[cpu]), PMD_SIZE);
+        ret = -ENOMEM;
+out_free_ar:
+        free_bootmem(__pa(pcpur_ptrs), ptrs_size);
+        return ret;
 }
-
-void __cpuinit numa_set_node(int cpu, int node)
+#else
+static ssize_t __init setup_pcpu_remap(size_t static_size)
 {
-        int *cpu_to_node_map = early_per_cpu_ptr(x86_cpu_to_node_map);
-
-        if (cpu_pda(cpu) && node != NUMA_NO_NODE)
-                cpu_pda(cpu)->nodenumber = node;
-
-        if (cpu_to_node_map)
-                cpu_to_node_map[cpu] = node;
-
-        else if (per_cpu_offset(cpu))
-                per_cpu(x86_cpu_to_node_map, cpu) = node;
-
-        else
-                pr_debug("Setting node for non-present cpu %d\n", cpu);
+        return -EINVAL;
 }
+#endif
 
-void __cpuinit numa_clear_node(int cpu)
+/*
+ * Embedding allocator
+ *
+ * The first chunk is sized to just contain the static area plus
+ * module and dynamic reserves and embedded into linear physical
+ * mapping so that it can use PMD mapping without additional TLB
+ * pressure.
+ */
+static ssize_t __init setup_pcpu_embed(size_t static_size)
 {
-        numa_set_node(cpu, NUMA_NO_NODE);
+        size_t reserve = PERCPU_MODULE_RESERVE + PERCPU_DYNAMIC_RESERVE;
+
+        /*
+         * If large page isn't supported, there's no benefit in doing
+         * this.  Also, embedding allocation doesn't play well with
+         * NUMA.
+         */
+        if (!cpu_has_pse || pcpu_need_numa())
+                return -EINVAL;
+
+        return pcpu_embed_first_chunk(static_size, PERCPU_FIRST_CHUNK_RESERVE,
+                                      reserve - PERCPU_FIRST_CHUNK_RESERVE, -1);
 }
 
-#ifndef CONFIG_DEBUG_PER_CPU_MAPS
+/*
+ * 4k page allocator
+ *
+ * This is the basic allocator.  Static percpu area is allocated
+ * page-by-page and most of initialization is done by the generic
+ * setup function.
+ */
+static struct page **pcpu4k_pages __initdata;
+static int pcpu4k_nr_static_pages __initdata;
 
-void __cpuinit numa_add_cpu(int cpu)
+static struct page * __init pcpu4k_get_page(unsigned int cpu, int pageno)
 {
-        cpu_set(cpu, node_to_cpumask_map[early_cpu_to_node(cpu)]);
+        if (pageno < pcpu4k_nr_static_pages)
+                return pcpu4k_pages[cpu * pcpu4k_nr_static_pages + pageno];
+        return NULL;
 }
 
-void __cpuinit numa_remove_cpu(int cpu)
+static void __init pcpu4k_populate_pte(unsigned long addr)
 {
-        cpu_clear(cpu, node_to_cpumask_map[cpu_to_node(cpu)]);
+        populate_extra_pte(addr);
 }
 
-#else /* CONFIG_DEBUG_PER_CPU_MAPS */
-
-/*
- * --------- debug versions of the numa functions ---------
- */
-static void __cpuinit numa_set_cpumask(int cpu, int enable)
+static ssize_t __init setup_pcpu_4k(size_t static_size)
 {
-        int node = cpu_to_node(cpu);
-        cpumask_t *mask;
-        char buf[64];
-
-        if (node_to_cpumask_map == NULL) {
-                printk(KERN_ERR "node_to_cpumask_map NULL\n");
-                dump_stack();
-                return;
-        }
-
-        mask = &node_to_cpumask_map[node];
-        if (enable)
-                cpu_set(cpu, *mask);
-        else
-                cpu_clear(cpu, *mask);
+        size_t pages_size;
+        unsigned int cpu;
+        int i, j;
+        ssize_t ret;
+
+        pcpu4k_nr_static_pages = PFN_UP(static_size);
+
+        /* unaligned allocations can't be freed, round up to page size */
+        pages_size = PFN_ALIGN(pcpu4k_nr_static_pages * num_possible_cpus()
+                               * sizeof(pcpu4k_pages[0]));
+        pcpu4k_pages = alloc_bootmem(pages_size);
+
+        /* allocate and copy */
+        j = 0;
+        for_each_possible_cpu(cpu)
+                for (i = 0; i < pcpu4k_nr_static_pages; i++) {
+                        void *ptr;
+
+                        ptr = pcpu_alloc_bootmem(cpu, PAGE_SIZE, PAGE_SIZE);
+                        if (!ptr)
+                                goto enomem;
+
+                        memcpy(ptr, __per_cpu_load + i * PAGE_SIZE, PAGE_SIZE);
+                        pcpu4k_pages[j++] = virt_to_page(ptr);
+                }
 
-        cpulist_scnprintf(buf, sizeof(buf), mask);
-        printk(KERN_DEBUG "%s cpu %d node %d: mask now %s\n",
-                enable ? "numa_add_cpu" : "numa_remove_cpu", cpu, node, buf);
+        /* we're ready, commit */
+        pr_info("PERCPU: Allocated %d 4k pages, static data %zu bytes\n",
+                pcpu4k_nr_static_pages, static_size);
+
+        ret = pcpu_setup_first_chunk(pcpu4k_get_page, static_size,
+                                     PERCPU_FIRST_CHUNK_RESERVE, -1,
+                                     -1, NULL, pcpu4k_populate_pte);
+        goto out_free_ar;
+
+enomem:
+        while (--j >= 0)
+                free_bootmem(__pa(page_address(pcpu4k_pages[j])), PAGE_SIZE);
+        ret = -ENOMEM;
+out_free_ar:
+        free_bootmem(__pa(pcpu4k_pages), pages_size);
+        return ret;
 }
 
-void __cpuinit numa_add_cpu(int cpu)
+static inline void setup_percpu_segment(int cpu)
 {
-        numa_set_cpumask(cpu, 1);
-}
-
-void __cpuinit numa_remove_cpu(int cpu)
-{
-        numa_set_cpumask(cpu, 0);
-}
+#ifdef CONFIG_X86_32
+        struct desc_struct gdt;
 
-int cpu_to_node(int cpu)
-{
-        if (early_per_cpu_ptr(x86_cpu_to_node_map)) {
-                printk(KERN_WARNING
-                        "cpu_to_node(%d): usage too early!\n", cpu);
-                dump_stack();
-                return early_per_cpu_ptr(x86_cpu_to_node_map)[cpu];
-        }
-        return per_cpu(x86_cpu_to_node_map, cpu);
+        pack_descriptor(&gdt, per_cpu_offset(cpu), 0xFFFFF,
+                        0x2 | DESCTYPE_S, 0x8);
+        gdt.s = 1;
+        write_gdt_entry(get_cpu_gdt_table(cpu),
+                        GDT_ENTRY_PERCPU, &gdt, DESCTYPE_S);
+#endif
 }
-EXPORT_SYMBOL(cpu_to_node);
 
 /*
- * Same function as cpu_to_node() but used if called before the
- * per_cpu areas are setup.
+ * Great future plan:
+ * Declare PDA itself and support (irqstack,tss,pgd) as per cpu data.
+ * Always point %gs to its beginning
  */
-int early_cpu_to_node(int cpu)
+void __init setup_per_cpu_areas(void)
 {
-        if (early_per_cpu_ptr(x86_cpu_to_node_map))
-                return early_per_cpu_ptr(x86_cpu_to_node_map)[cpu];
-
-        if (!per_cpu_offset(cpu)) {
-                printk(KERN_WARNING
-                        "early_cpu_to_node(%d): no per_cpu area!\n", cpu);
-                dump_stack();
-                return NUMA_NO_NODE;
-        }
-        return per_cpu(x86_cpu_to_node_map, cpu);
-}
+        size_t static_size = __per_cpu_end - __per_cpu_start;
+        unsigned int cpu;
+        unsigned long delta;
+        size_t pcpu_unit_size;
+        ssize_t ret;
 
+        pr_info("NR_CPUS:%d nr_cpumask_bits:%d nr_cpu_ids:%d nr_node_ids:%d\n",
+                NR_CPUS, nr_cpumask_bits, nr_cpu_ids, nr_node_ids);
 
-/* empty cpumask */
-static const cpumask_t cpu_mask_none;
-
-/*
- * Returns a pointer to the bitmask of CPUs on Node 'node'.
- */
-const cpumask_t *cpumask_of_node(int node)
-{
-        if (node_to_cpumask_map == NULL) {
-                printk(KERN_WARNING
-                        "cpumask_of_node(%d): no node_to_cpumask_map!\n",
-                        node);
-                dump_stack();
-                return (const cpumask_t *)&cpu_online_map;
-        }
-        if (node >= nr_node_ids) {
-                printk(KERN_WARNING
-                        "cpumask_of_node(%d): node > nr_node_ids(%d)\n",
-                        node, nr_node_ids);
-                dump_stack();
-                return &cpu_mask_none;
-        }
-        return &node_to_cpumask_map[node];
-}
-EXPORT_SYMBOL(cpumask_of_node);
-
-/*
- * Returns a bitmask of CPUs on Node 'node'.
- *
- * Side note: this function creates the returned cpumask on the stack
- * so with a high NR_CPUS count, excessive stack space is used.  The
- * node_to_cpumask_ptr function should be used whenever possible.
- */
-cpumask_t node_to_cpumask(int node)
-{
-        if (node_to_cpumask_map == NULL) {
-                printk(KERN_WARNING
-                        "node_to_cpumask(%d): no node_to_cpumask_map!\n", node);
-                dump_stack();
-                return cpu_online_map;
-        }
-        if (node >= nr_node_ids) {
-                printk(KERN_WARNING
-                        "node_to_cpumask(%d): node > nr_node_ids(%d)\n",
-                        node, nr_node_ids);
-                dump_stack();
-                return cpu_mask_none;
+        /*
+         * Allocate percpu area.  If PSE is supported, try to make use
+         * of large page mappings.  Please read comments on top of
+         * each allocator for details.
+         */
+        ret = setup_pcpu_remap(static_size);
+        if (ret < 0)
+                ret = setup_pcpu_embed(static_size);
+        if (ret < 0)
+                ret = setup_pcpu_4k(static_size);
+        if (ret < 0)
+                panic("cannot allocate static percpu area (%zu bytes, err=%zd)",
+                      static_size, ret);
+
+        pcpu_unit_size = ret;
+
+        /* alrighty, percpu areas up and running */
+        delta = (unsigned long)pcpu_base_addr - (unsigned long)__per_cpu_start;
+        for_each_possible_cpu(cpu) {
+                per_cpu_offset(cpu) = delta + cpu * pcpu_unit_size;
+                per_cpu(this_cpu_off, cpu) = per_cpu_offset(cpu);
+                per_cpu(cpu_number, cpu) = cpu;
+                setup_percpu_segment(cpu);
+                setup_stack_canary_segment(cpu);
+                /*
+                 * Copy data used in early init routines from the
+                 * initial arrays to the per cpu data areas.  These
+                 * arrays then become expendable and the *_early_ptr's
+                 * are zeroed indicating that the static arrays are
+                 * gone.
+                 */
+#ifdef CONFIG_X86_LOCAL_APIC
+                per_cpu(x86_cpu_to_apicid, cpu) =
+                        early_per_cpu_map(x86_cpu_to_apicid, cpu);
+                per_cpu(x86_bios_cpu_apicid, cpu) =
+                        early_per_cpu_map(x86_bios_cpu_apicid, cpu);
+#endif
+#ifdef CONFIG_X86_64
+                per_cpu(irq_stack_ptr, cpu) =
+                        per_cpu(irq_stack_union.irq_stack, cpu) +
+                        IRQ_STACK_SIZE - 64;
+#ifdef CONFIG_NUMA
+                per_cpu(x86_cpu_to_node_map, cpu) =
+                        early_per_cpu_map(x86_cpu_to_node_map, cpu);
+#endif
+#endif
+                /*
+                 * Up to this point, the boot CPU has been using .data.init
+                 * area.  Reload any changed state for the boot CPU.
+                 */
+                if (cpu == boot_cpu_id)
+                        switch_to_new_gdt(cpu);
         }
-        return node_to_cpumask_map[node];
-}
-EXPORT_SYMBOL(node_to_cpumask);
 
-/*
- * --------- end of debug versions of the numa functions ---------
- */
-
-#endif /* CONFIG_DEBUG_PER_CPU_MAPS */
+        /* indicate the early static arrays will soon be gone */
+#ifdef CONFIG_X86_LOCAL_APIC
+        early_per_cpu_ptr(x86_cpu_to_apicid) = NULL;
+        early_per_cpu_ptr(x86_bios_cpu_apicid) = NULL;
+#endif
+#if defined(CONFIG_X86_64) && defined(CONFIG_NUMA)
+        early_per_cpu_ptr(x86_cpu_to_node_map) = NULL;
+#endif
 
-#endif /* X86_64_NUMA */
+        /* Setup node to cpumask map */
+        setup_node_to_cpumask_map();
 
+        /* Setup cpu initialized, callin, callout masks */
+        setup_cpu_local_masks();
+}
diff --git a/arch/x86/kernel/signal.c b/arch/x86/kernel/signal.c
index df0587f24c54..d2cc6428c587 100644
--- a/arch/x86/kernel/signal.c
+++ b/arch/x86/kernel/signal.c
@@ -50,27 +50,23 @@
 # define FIX_EFLAGS     __FIX_EFLAGS
 #endif
 
-#define COPY(x)                 {               \
-        err |= __get_user(regs->x, &sc->x);     \
-}
+#define COPY(x)                 do {                    \
+        get_user_ex(regs->x, &sc->x);                   \
+} while (0)
 
-#define COPY_SEG(seg)           {                       \
-                unsigned short tmp;                     \
-                err |= __get_user(tmp, &sc->seg);       \
-                regs->seg = tmp;                        \
-}
+#define GET_SEG(seg)            ({                      \
+        unsigned short tmp;                             \
+        get_user_ex(tmp, &sc->seg);                     \
+        tmp;                                            \
+})
 
-#define COPY_SEG_CPL3(seg)      {                       \
-                unsigned short tmp;                     \
-                err |= __get_user(tmp, &sc->seg);       \
-                regs->seg = tmp | 3;                    \
-}
+#define COPY_SEG(seg)           do {                    \
+        regs->seg = GET_SEG(seg);                       \
+} while (0)
 
-#define GET_SEG(seg)            {                       \
-                unsigned short tmp;                     \
-                err |= __get_user(tmp, &sc->seg);       \
-                loadsegment(seg, tmp);                  \
-}
+#define COPY_SEG_CPL3(seg)      do {                    \
+        regs->seg = GET_SEG(seg) | 3;                   \
+} while (0)
 
 static int
 restore_sigcontext(struct pt_regs *regs, struct sigcontext __user *sc,
@@ -83,45 +79,49 @@ restore_sigcontext(struct pt_regs *regs, struct sigcontext __user *sc,
         /* Always make any pending restarted system calls return -EINTR */
         current_thread_info()->restart_block.fn = do_no_restart_syscall;
 
+        get_user_try {
+
 #ifdef CONFIG_X86_32
-        GET_SEG(gs);
-        COPY_SEG(fs);
-        COPY_SEG(es);
-        COPY_SEG(ds);
+                set_user_gs(regs, GET_SEG(gs));
+                COPY_SEG(fs);
+                COPY_SEG(es);
+                COPY_SEG(ds);
 #endif /* CONFIG_X86_32 */
 
-        COPY(di); COPY(si); COPY(bp); COPY(sp); COPY(bx);
-        COPY(dx); COPY(cx); COPY(ip);
+                COPY(di); COPY(si); COPY(bp); COPY(sp); COPY(bx);
+                COPY(dx); COPY(cx); COPY(ip);
 
 #ifdef CONFIG_X86_64
-        COPY(r8);
-        COPY(r9);
-        COPY(r10);
-        COPY(r11);
-        COPY(r12);
-        COPY(r13);
-        COPY(r14);
-        COPY(r15);
+                COPY(r8);
+                COPY(r9);
+                COPY(r10);
+                COPY(r11);
+                COPY(r12);
+                COPY(r13);
+                COPY(r14);
+                COPY(r15);
 #endif /* CONFIG_X86_64 */
 
 #ifdef CONFIG_X86_32
-        COPY_SEG_CPL3(cs);
-        COPY_SEG_CPL3(ss);
+                COPY_SEG_CPL3(cs);
+                COPY_SEG_CPL3(ss);
 #else /* !CONFIG_X86_32 */
-        /* Kernel saves and restores only the CS segment register on signals,
-         * which is the bare minimum needed to allow mixed 32/64-bit code.
-         * App's signal handler can save/restore other segments if needed. */
-        COPY_SEG_CPL3(cs);
+                /* Kernel saves and restores only the CS segment register on signals,
+                 * which is the bare minimum needed to allow mixed 32/64-bit code.
+                 * App's signal handler can save/restore other segments if needed. */
+                COPY_SEG_CPL3(cs);
 #endif /* CONFIG_X86_32 */
 
-        err |= __get_user(tmpflags, &sc->flags);
-        regs->flags = (regs->flags & ~FIX_EFLAGS) | (tmpflags & FIX_EFLAGS);
-        regs->orig_ax = -1;             /* disable syscall checks */
+                get_user_ex(tmpflags, &sc->flags);
+                regs->flags = (regs->flags & ~FIX_EFLAGS) | (tmpflags & FIX_EFLAGS);
+                regs->orig_ax = -1;             /* disable syscall checks */
 
-        err |= __get_user(buf, &sc->fpstate);
-        err |= restore_i387_xstate(buf);
+                get_user_ex(buf, &sc->fpstate);
+                err |= restore_i387_xstate(buf);
+
+                get_user_ex(*pax, &sc->ax);
+        } get_user_catch(err);
 
-        err |= __get_user(*pax, &sc->ax);
         return err;
 }
 
@@ -131,57 +131,55 @@ setup_sigcontext(struct sigcontext __user *sc, void __user *fpstate,
 {
         int err = 0;
 
-#ifdef CONFIG_X86_32
-        {
-                unsigned int tmp;
+        put_user_try {
 
-                savesegment(gs, tmp);
-                err |= __put_user(tmp, (unsigned int __user *)&sc->gs);
-        }
-        err |= __put_user(regs->fs, (unsigned int __user *)&sc->fs);
-        err |= __put_user(regs->es, (unsigned int __user *)&sc->es);
-        err |= __put_user(regs->ds, (unsigned int __user *)&sc->ds);
+#ifdef CONFIG_X86_32
+                put_user_ex(get_user_gs(regs), (unsigned int __user *)&sc->gs);
+                put_user_ex(regs->fs, (unsigned int __user *)&sc->fs);
+                put_user_ex(regs->es, (unsigned int __user *)&sc->es);
+                put_user_ex(regs->ds, (unsigned int __user *)&sc->ds);
 #endif /* CONFIG_X86_32 */
 
-        err |= __put_user(regs->di, &sc->di);
-        err |= __put_user(regs->si, &sc->si);
-        err |= __put_user(regs->bp, &sc->bp);
-        err |= __put_user(regs->sp, &sc->sp);
-        err |= __put_user(regs->bx, &sc->bx);
-        err |= __put_user(regs->dx, &sc->dx);
-        err |= __put_user(regs->cx, &sc->cx);
-        err |= __put_user(regs->ax, &sc->ax);
+                put_user_ex(regs->di, &sc->di);
+                put_user_ex(regs->si, &sc->si);
+                put_user_ex(regs->bp, &sc->bp);
+                put_user_ex(regs->sp, &sc->sp);
+                put_user_ex(regs->bx, &sc->bx);
+                put_user_ex(regs->dx, &sc->dx);
+                put_user_ex(regs->cx, &sc->cx);
+                put_user_ex(regs->ax, &sc->ax);
 #ifdef CONFIG_X86_64
-        err |= __put_user(regs->r8, &sc->r8);
-        err |= __put_user(regs->r9, &sc->r9);
-        err |= __put_user(regs->r10, &sc->r10);
-        err |= __put_user(regs->r11, &sc->r11);
-        err |= __put_user(regs->r12, &sc->r12);
-        err |= __put_user(regs->r13, &sc->r13);
-        err |= __put_user(regs->r14, &sc->r14);
-        err |= __put_user(regs->r15, &sc->r15);
+                put_user_ex(regs->r8, &sc->r8);
+                put_user_ex(regs->r9, &sc->r9);
+                put_user_ex(regs->r10, &sc->r10);
+                put_user_ex(regs->r11, &sc->r11);
+                put_user_ex(regs->r12, &sc->r12);
+                put_user_ex(regs->r13, &sc->r13);
+                put_user_ex(regs->r14, &sc->r14);
+                put_user_ex(regs->r15, &sc->r15);
 #endif /* CONFIG_X86_64 */
 
-        err |= __put_user(current->thread.trap_no, &sc->trapno);
-        err |= __put_user(current->thread.error_code, &sc->err);
-        err |= __put_user(regs->ip, &sc->ip);
+                put_user_ex(current->thread.trap_no, &sc->trapno);
+                put_user_ex(current->thread.error_code, &sc->err);
+                put_user_ex(regs->ip, &sc->ip);
 #ifdef CONFIG_X86_32
-        err |= __put_user(regs->cs, (unsigned int __user *)&sc->cs);
-        err |= __put_user(regs->flags, &sc->flags);
-        err |= __put_user(regs->sp, &sc->sp_at_signal);
-        err |= __put_user(regs->ss, (unsigned int __user *)&sc->ss);
+                put_user_ex(regs->cs, (unsigned int __user *)&sc->cs);
+                put_user_ex(regs->flags, &sc->flags);
+                put_user_ex(regs->sp, &sc->sp_at_signal);
+                put_user_ex(regs->ss, (unsigned int __user *)&sc->ss);
 #else /* !CONFIG_X86_32 */
-        err |= __put_user(regs->flags, &sc->flags);
-        err |= __put_user(regs->cs, &sc->cs);
-        err |= __put_user(0, &sc->gs);
-        err |= __put_user(0, &sc->fs);
+                put_user_ex(regs->flags, &sc->flags);
+                put_user_ex(regs->cs, &sc->cs);
+                put_user_ex(0, &sc->gs);
+                put_user_ex(0, &sc->fs);
 #endif /* CONFIG_X86_32 */
 
-        err |= __put_user(fpstate, &sc->fpstate);
+                put_user_ex(fpstate, &sc->fpstate);
 
-        /* non-iBCS2 extensions.. */
-        err |= __put_user(mask, &sc->oldmask);
-        err |= __put_user(current->thread.cr2, &sc->cr2);
+                /* non-iBCS2 extensions.. */
+                put_user_ex(mask, &sc->oldmask);
+                put_user_ex(current->thread.cr2, &sc->cr2);
+        } put_user_catch(err);
 
         return err;
 }
@@ -189,40 +187,35 @@ setup_sigcontext(struct sigcontext __user *sc, void __user *fpstate,
 /*
  * Set up a signal frame.
  */
-#ifdef CONFIG_X86_32
-static const struct {
-        u16 poplmovl;
-        u32 val;
-        u16 int80;
-} __attribute__((packed)) retcode = {
-        0xb858,         /* popl %eax; movl $..., %eax */
-        __NR_sigreturn,
-        0x80cd,         /* int $0x80 */
-};
-
-static const struct {
-        u8  movl;
-        u32 val;
-        u16 int80;
-        u8  pad;
-} __attribute__((packed)) rt_retcode = {
-        0xb8,           /* movl $..., %eax */
-        __NR_rt_sigreturn,
-        0x80cd,         /* int $0x80 */
-        0
-};
 
 /*
  * Determine which stack to use..
  */
+static unsigned long align_sigframe(unsigned long sp)
+{
+#ifdef CONFIG_X86_32
+        /*
+         * Align the stack pointer according to the i386 ABI,
+         * i.e. so that on function entry ((sp + 4) & 15) == 0.
+         */
+        sp = ((sp + 4) & -16ul) - 4;
+#else /* !CONFIG_X86_32 */
+        sp = round_down(sp, 16) - 8;
+#endif
+        return sp;
+}
+
 static inline void __user *
 get_sigframe(struct k_sigaction *ka, struct pt_regs *regs, size_t frame_size,
-             void **fpstate)
+             void __user **fpstate)
 {
-        unsigned long sp;
-
         /* Default to using normal stack */
-        sp = regs->sp;
+        unsigned long sp = regs->sp;
+
+#ifdef CONFIG_X86_64
+        /* redzone */
+        sp -= 128;
+#endif /* CONFIG_X86_64 */
 
         /*
          * If we are on the alternate signal stack and would overflow it, don't.
@@ -236,30 +229,52 @@ get_sigframe(struct k_sigaction *ka, struct pt_regs *regs, size_t frame_size,
                 if (sas_ss_flags(sp) == 0)
                         sp = current->sas_ss_sp + current->sas_ss_size;
         } else {
+#ifdef CONFIG_X86_32
                 /* This is the legacy signal stack switching. */
                 if ((regs->ss & 0xffff) != __USER_DS &&
                         !(ka->sa.sa_flags & SA_RESTORER) &&
                                 ka->sa.sa_restorer)
                         sp = (unsigned long) ka->sa.sa_restorer;
+#endif /* CONFIG_X86_32 */
         }
 
         if (used_math()) {
-                sp = sp - sig_xstate_size;
-                *fpstate = (struct _fpstate *) sp;
+                sp -= sig_xstate_size;
+#ifdef CONFIG_X86_64
+                sp = round_down(sp, 64);
+#endif /* CONFIG_X86_64 */
+                *fpstate = (void __user *)sp;
+
                 if (save_i387_xstate(*fpstate) < 0)
                         return (void __user *)-1L;
         }
 
-        sp -= frame_size;
-        /*
-         * Align the stack pointer according to the i386 ABI,
-         * i.e. so that on function entry ((sp + 4) & 15) == 0.
-         */
-        sp = ((sp + 4) & -16ul) - 4;
-
-        return (void __user *) sp;
+        return (void __user *)align_sigframe(sp - frame_size);
 }
 
+#ifdef CONFIG_X86_32
+static const struct {
+        u16 poplmovl;
+        u32 val;
+        u16 int80;
+} __attribute__((packed)) retcode = {
+        0xb858,         /* popl %eax; movl $..., %eax */
+        __NR_sigreturn,
+        0x80cd,         /* int $0x80 */
+};
+
+static const struct {
+        u8  movl;
+        u32 val;
+        u16 int80;
+        u8  pad;
+} __attribute__((packed)) rt_retcode = {
+        0xb8,           /* movl $..., %eax */
+        __NR_rt_sigreturn,
+        0x80cd,         /* int $0x80 */
+        0
+};
+
 static int
 __setup_frame(int sig, struct k_sigaction *ka, sigset_t *set,
               struct pt_regs *regs)
@@ -336,43 +351,41 @@ static int __setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
         if (!access_ok(VERIFY_WRITE, frame, sizeof(*frame)))
                 return -EFAULT;
 
-        err |= __put_user(sig, &frame->sig);
-        err |= __put_user(&frame->info, &frame->pinfo);
-        err |= __put_user(&frame->uc, &frame->puc);
-        err |= copy_siginfo_to_user(&frame->info, info);
-        if (err)
-                return -EFAULT;
+        put_user_try {
+                put_user_ex(sig, &frame->sig);
+                put_user_ex(&frame->info, &frame->pinfo);
+                put_user_ex(&frame->uc, &frame->puc);
+                err |= copy_siginfo_to_user(&frame->info, info);
 
-        /* Create the ucontext.  */
-        if (cpu_has_xsave)
-                err |= __put_user(UC_FP_XSTATE, &frame->uc.uc_flags);
-        else
-                err |= __put_user(0, &frame->uc.uc_flags);
-        err |= __put_user(0, &frame->uc.uc_link);
-        err |= __put_user(current->sas_ss_sp, &frame->uc.uc_stack.ss_sp);
-        err |= __put_user(sas_ss_flags(regs->sp),
-                          &frame->uc.uc_stack.ss_flags);
-        err |= __put_user(current->sas_ss_size, &frame->uc.uc_stack.ss_size);
-        err |= setup_sigcontext(&frame->uc.uc_mcontext, fpstate,
-                                regs, set->sig[0]);
-        err |= __copy_to_user(&frame->uc.uc_sigmask, set, sizeof(*set));
-        if (err)
-                return -EFAULT;
-
-        /* Set up to return from userspace.  */
-        restorer = VDSO32_SYMBOL(current->mm->context.vdso, rt_sigreturn);
-        if (ka->sa.sa_flags & SA_RESTORER)
-                restorer = ka->sa.sa_restorer;
-        err |= __put_user(restorer, &frame->pretcode);
+                /* Create the ucontext.  */
+                if (cpu_has_xsave)
+                        put_user_ex(UC_FP_XSTATE, &frame->uc.uc_flags);
+                else
+                        put_user_ex(0, &frame->uc.uc_flags);
+                put_user_ex(0, &frame->uc.uc_link);
+                put_user_ex(current->sas_ss_sp, &frame->uc.uc_stack.ss_sp);
+                put_user_ex(sas_ss_flags(regs->sp),
+                            &frame->uc.uc_stack.ss_flags);
+                put_user_ex(current->sas_ss_size, &frame->uc.uc_stack.ss_size);
+                err |= setup_sigcontext(&frame->uc.uc_mcontext, fpstate,
+                                        regs, set->sig[0]);
+                err |= __copy_to_user(&frame->uc.uc_sigmask, set, sizeof(*set));
+
+                /* Set up to return from userspace.  */
+                restorer = VDSO32_SYMBOL(current->mm->context.vdso, rt_sigreturn);
+                if (ka->sa.sa_flags & SA_RESTORER)
+                        restorer = ka->sa.sa_restorer;
+                put_user_ex(restorer, &frame->pretcode);
 
-        /*
-         * This is movl $__NR_rt_sigreturn, %ax ; int $0x80
-         *
-         * WE DO NOT USE IT ANY MORE! It's only left here for historical
-         * reasons and because gdb uses it as a signature to notice
-         * signal handler stack frames.
-         */
-        err |= __put_user(*((u64 *)&rt_retcode), (u64 *)frame->retcode);
+                /*
+                 * This is movl $__NR_rt_sigreturn, %ax ; int $0x80
+                 *
+                 * WE DO NOT USE IT ANY MORE! It's only left here for historical
+                 * reasons and because gdb uses it as a signature to notice
+                 * signal handler stack frames.
+                 */
+                put_user_ex(*((u64 *)&rt_retcode), (u64 *)frame->retcode);
+        } put_user_catch(err);
 
         if (err)
                 return -EFAULT;
@@ -392,24 +405,6 @@ static int __setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
         return 0;
 }
 #else /* !CONFIG_X86_32 */
-/*
- * Determine which stack to use..
- */
-static void __user *
-get_stack(struct k_sigaction *ka, unsigned long sp, unsigned long size)
-{
-        /* Default to using normal stack - redzone*/
-        sp -= 128;
-
-        /* This is the X/Open sanctioned signal stack switching.  */
-        if (ka->sa.sa_flags & SA_ONSTACK) {
-                if (sas_ss_flags(sp) == 0)
-                        sp = current->sas_ss_sp + current->sas_ss_size;
-        }
-
-        return (void __user *)round_down(sp - size, 64);
-}
-
 static int __setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
                             sigset_t *set, struct pt_regs *regs)
 {
@@ -418,15 +413,7 @@ static int __setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
         int err = 0;
         struct task_struct *me = current;
 
-        if (used_math()) {
-                fp = get_stack(ka, regs->sp, sig_xstate_size);
-                frame = (void __user *)round_down(
-                        (unsigned long)fp - sizeof(struct rt_sigframe), 16) - 8;
-
-                if (save_i387_xstate(fp) < 0)
-                        return -EFAULT;
-        } else
-                frame = get_stack(ka, regs->sp, sizeof(struct rt_sigframe)) - 8;
+        frame = get_sigframe(ka, regs, sizeof(struct rt_sigframe), &fp);
 
         if (!access_ok(VERIFY_WRITE, frame, sizeof(*frame)))
                 return -EFAULT;
@@ -436,28 +423,30 @@ static int __setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
                         return -EFAULT;
         }
 
-        /* Create the ucontext.  */
-        if (cpu_has_xsave)
-                err |= __put_user(UC_FP_XSTATE, &frame->uc.uc_flags);
-        else
-                err |= __put_user(0, &frame->uc.uc_flags);
-        err |= __put_user(0, &frame->uc.uc_link);
-        err |= __put_user(me->sas_ss_sp, &frame->uc.uc_stack.ss_sp);
-        err |= __put_user(sas_ss_flags(regs->sp),
-                          &frame->uc.uc_stack.ss_flags);
-        err |= __put_user(me->sas_ss_size, &frame->uc.uc_stack.ss_size);
-        err |= setup_sigcontext(&frame->uc.uc_mcontext, fp, regs, set->sig[0]);
-        err |= __copy_to_user(&frame->uc.uc_sigmask, set, sizeof(*set));
-
-        /* Set up to return from userspace.  If provided, use a stub
-           already in userspace.  */
-        /* x86-64 should always use SA_RESTORER. */
-        if (ka->sa.sa_flags & SA_RESTORER) {
-                err |= __put_user(ka->sa.sa_restorer, &frame->pretcode);
-        } else {
-                /* could use a vstub here */
-                return -EFAULT;
-        }
+        put_user_try {
+                /* Create the ucontext.  */
+                if (cpu_has_xsave)
+                        put_user_ex(UC_FP_XSTATE, &frame->uc.uc_flags);
+                else
+                        put_user_ex(0, &frame->uc.uc_flags);
+                put_user_ex(0, &frame->uc.uc_link);
+                put_user_ex(me->sas_ss_sp, &frame->uc.uc_stack.ss_sp);
+                put_user_ex(sas_ss_flags(regs->sp),
+                            &frame->uc.uc_stack.ss_flags);
+                put_user_ex(me->sas_ss_size, &frame->uc.uc_stack.ss_size);
+                err |= setup_sigcontext(&frame->uc.uc_mcontext, fp, regs, set->sig[0]);
+                err |= __copy_to_user(&frame->uc.uc_sigmask, set, sizeof(*set));
+
+                /* Set up to return from userspace.  If provided, use a stub
+                   already in userspace.  */
+                /* x86-64 should always use SA_RESTORER. */
+                if (ka->sa.sa_flags & SA_RESTORER) {
+                        put_user_ex(ka->sa.sa_restorer, &frame->pretcode);
+                } else {
+                        /* could use a vstub here */
+                        err |= -EFAULT;
+                }
+        } put_user_catch(err);
 
         if (err)
                 return -EFAULT;
@@ -509,31 +498,41 @@ sys_sigaction(int sig, const struct old_sigaction __user *act,
               struct old_sigaction __user *oact)
 {
         struct k_sigaction new_ka, old_ka;
-        int ret;
+        int ret = 0;
 
         if (act) {
                 old_sigset_t mask;
 
-                if (!access_ok(VERIFY_READ, act, sizeof(*act)) ||
-                    __get_user(new_ka.sa.sa_handler, &act->sa_handler) ||
-                    __get_user(new_ka.sa.sa_restorer, &act->sa_restorer))
+                if (!access_ok(VERIFY_READ, act, sizeof(*act)))
                         return -EFAULT;
 
-                __get_user(new_ka.sa.sa_flags, &act->sa_flags);
-                __get_user(mask, &act->sa_mask);
+                get_user_try {
+                        get_user_ex(new_ka.sa.sa_handler, &act->sa_handler);
+                        get_user_ex(new_ka.sa.sa_flags, &act->sa_flags);
+                        get_user_ex(mask, &act->sa_mask);
+                        get_user_ex(new_ka.sa.sa_restorer, &act->sa_restorer);
+                } get_user_catch(ret);
+
+                if (ret)
+                        return -EFAULT;
                 siginitset(&new_ka.sa.sa_mask, mask);
         }
 
         ret = do_sigaction(sig, act ? &new_ka : NULL, oact ? &old_ka : NULL);
 
         if (!ret && oact) {
-                if (!access_ok(VERIFY_WRITE, oact, sizeof(*oact)) ||
-                    __put_user(old_ka.sa.sa_handler, &oact->sa_handler) ||
-                    __put_user(old_ka.sa.sa_restorer, &oact->sa_restorer))
+                if (!access_ok(VERIFY_WRITE, oact, sizeof(*oact)))
                         return -EFAULT;
 
-                __put_user(old_ka.sa.sa_flags, &oact->sa_flags);
-                __put_user(old_ka.sa.sa_mask.sig[0], &oact->sa_mask);
+                put_user_try {
+                        put_user_ex(old_ka.sa.sa_handler, &oact->sa_handler);
+                        put_user_ex(old_ka.sa.sa_flags, &oact->sa_flags);
+                        put_user_ex(old_ka.sa.sa_mask.sig[0], &oact->sa_mask);
+                        put_user_ex(old_ka.sa.sa_restorer, &oact->sa_restorer);
+                } put_user_catch(ret);
+
+                if (ret)
+                        return -EFAULT;
         }
 
         return ret;
@@ -541,14 +540,9 @@ sys_sigaction(int sig, const struct old_sigaction __user *act,
 #endif /* CONFIG_X86_32 */
 
 #ifdef CONFIG_X86_32
-asmlinkage int sys_sigaltstack(unsigned long bx)
+int sys_sigaltstack(struct pt_regs *regs)
 {
-        /*
-         * This is needed to make gcc realize it doesn't own the
-         * "struct pt_regs"
-         */
-        struct pt_regs *regs = (struct pt_regs *)&bx;
-        const stack_t __user *uss = (const stack_t __user *)bx;
+        const stack_t __user *uss = (const stack_t __user *)regs->bx;
         stack_t __user *uoss = (stack_t __user *)regs->cx;
 
         return do_sigaltstack(uss, uoss, regs->sp);
@@ -566,14 +560,12 @@ sys_sigaltstack(const stack_t __user *uss, stack_t __user *uoss,
  * Do a signal return; undo the signal stack.
  */
 #ifdef CONFIG_X86_32
-asmlinkage unsigned long sys_sigreturn(unsigned long __unused)
+unsigned long sys_sigreturn(struct pt_regs *regs)
 {
         struct sigframe __user *frame;
-        struct pt_regs *regs;
         unsigned long ax;
         sigset_t set;
 
-        regs = (struct pt_regs *) &__unused;
         frame = (struct sigframe __user *)(regs->sp - 8);
 
         if (!access_ok(VERIFY_READ, frame, sizeof(*frame)))
@@ -600,7 +592,7 @@ badframe:
 }
 #endif /* CONFIG_X86_32 */
 
-static long do_rt_sigreturn(struct pt_regs *regs)
+long sys_rt_sigreturn(struct pt_regs *regs)
 {
         struct rt_sigframe __user *frame;
         unsigned long ax;
@@ -631,25 +623,6 @@ badframe:
         return 0;
 }
 
-#ifdef CONFIG_X86_32
-/*
- * Note: do not pass in pt_regs directly as with tail-call optimization
- * GCC will incorrectly stomp on the caller's frame and corrupt user-space
- * register state:
- */
-asmlinkage int sys_rt_sigreturn(unsigned long __unused)
-{
-        struct pt_regs *regs = (struct pt_regs *)&__unused;
-
-        return do_rt_sigreturn(regs);
-}
-#else /* !CONFIG_X86_32 */
-asmlinkage long sys_rt_sigreturn(struct pt_regs *regs)
-{
-        return do_rt_sigreturn(regs);
-}
-#endif /* CONFIG_X86_32 */
-
 /*
  * OK, we're invoking a handler:
  */
diff --git a/arch/x86/kernel/smp.c b/arch/x86/kernel/smp.c
index e6faa3316bd2..13f33ea8ccaa 100644
--- a/arch/x86/kernel/smp.c
+++ b/arch/x86/kernel/smp.c
@@ -2,7 +2,7 @@
  *      Intel SMP support routines.
  *
  *      (c) 1995 Alan Cox, Building #3 <alan@lxorguk.ukuu.org.uk>
- *      (c) 1998-99, 2000 Ingo Molnar <mingo@redhat.com>
+ *      (c) 1998-99, 2000, 2009 Ingo Molnar <mingo@redhat.com>
  *      (c) 2002,2003 Andi Kleen, SuSE Labs.
  *
  *      i386 and x86_64 integration by Glauber Costa <gcosta@redhat.com>
@@ -26,8 +26,7 @@
 #include <asm/tlbflush.h>
 #include <asm/mmu_context.h>
 #include <asm/proto.h>
-#include <mach_ipi.h>
-#include <mach_apic.h>
+#include <asm/apic.h>
 /*
  *      Some notes on x86 processor bugs affecting SMP operation:
  *
@@ -118,12 +117,12 @@ static void native_smp_send_reschedule(int cpu)
                 WARN_ON(1);
                 return;
         }
-        send_IPI_mask(cpumask_of(cpu), RESCHEDULE_VECTOR);
+        apic->send_IPI_mask(cpumask_of(cpu), RESCHEDULE_VECTOR);
 }
 
 void native_send_call_func_single_ipi(int cpu)
 {
-        send_IPI_mask(cpumask_of(cpu), CALL_FUNCTION_SINGLE_VECTOR);
+        apic->send_IPI_mask(cpumask_of(cpu), CALL_FUNCTION_SINGLE_VECTOR);
 }
 
 void native_send_call_func_ipi(const struct cpumask *mask)
@@ -131,7 +130,7 @@ void native_send_call_func_ipi(const struct cpumask *mask)
         cpumask_var_t allbutself;
 
         if (!alloc_cpumask_var(&allbutself, GFP_ATOMIC)) {
-                send_IPI_mask(mask, CALL_FUNCTION_VECTOR);
+                apic->send_IPI_mask(mask, CALL_FUNCTION_VECTOR);
                 return;
         }
 
@@ -140,9 +139,9 @@ void native_send_call_func_ipi(const struct cpumask *mask)
 
         if (cpumask_equal(mask, allbutself) &&
             cpumask_equal(cpu_online_mask, cpu_callout_mask))
-                send_IPI_allbutself(CALL_FUNCTION_VECTOR);
+                apic->send_IPI_allbutself(CALL_FUNCTION_VECTOR);
         else
-                send_IPI_mask(mask, CALL_FUNCTION_VECTOR);
+                apic->send_IPI_mask(mask, CALL_FUNCTION_VECTOR);
 
         free_cpumask_var(allbutself);
 }
diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c
index bb1a3b1fc87f..249334f5080a 100644
--- a/arch/x86/kernel/smpboot.c
+++ b/arch/x86/kernel/smpboot.c
@@ -2,7 +2,7 @@
  *      x86 SMP booting functions
  *
  *      (c) 1995 Alan Cox, Building #3 <alan@lxorguk.ukuu.org.uk>
- *      (c) 1998, 1999, 2000 Ingo Molnar <mingo@redhat.com>
+ *      (c) 1998, 1999, 2000, 2009 Ingo Molnar <mingo@redhat.com>
  *      Copyright 2001 Andi Kleen, SuSE Labs.
  *
  *      Much of the core SMP work is based on previous work by Thomas Radke, to
@@ -53,7 +53,6 @@
 #include <asm/nmi.h>
 #include <asm/irq.h>
 #include <asm/idle.h>
-#include <asm/smp.h>
 #include <asm/trampoline.h>
 #include <asm/cpu.h>
 #include <asm/numa.h>
@@ -61,13 +60,12 @@
 #include <asm/tlbflush.h>
 #include <asm/mtrr.h>
 #include <asm/vmi.h>
-#include <asm/genapic.h>
+#include <asm/apic.h>
 #include <asm/setup.h>
+#include <asm/uv/uv.h>
 #include <linux/mc146818rtc.h>
 
-#include <mach_apic.h>
-#include <mach_wakecpu.h>
-#include <smpboot_hooks.h>
+#include <asm/smpboot_hooks.h>
 
 #ifdef CONFIG_X86_32
 u8 apicid_2_node[MAX_APICID];
@@ -114,7 +112,7 @@ EXPORT_PER_CPU_SYMBOL(cpu_core_map);
 DEFINE_PER_CPU_SHARED_ALIGNED(struct cpuinfo_x86, cpu_info);
 EXPORT_PER_CPU_SYMBOL(cpu_info);
 
-static atomic_t init_deasserted;
+atomic_t init_deasserted;
 
 
 /* Set if we find a B stepping CPU */
@@ -163,7 +161,7 @@ static void map_cpu_to_logical_apicid(void)
 {
         int cpu = smp_processor_id();
         int apicid = logical_smp_processor_id();
-        int node = apicid_to_node(apicid);
+        int node = apic->apicid_to_node(apicid);
 
         if (!node_online(node))
                 node = first_online_node;
@@ -196,7 +194,8 @@ static void __cpuinit smp_callin(void)
          * our local APIC.  We have to wait for the IPI or we'll
          * lock up on an APIC access.
          */
-        wait_for_init_deassert(&init_deasserted);
+        if (apic->wait_for_init_deassert)
+                apic->wait_for_init_deassert(&init_deasserted);
 
         /*
          * (This works even if the APIC is not enabled.)
@@ -243,7 +242,8 @@ static void __cpuinit smp_callin(void)
          */
 
         pr_debug("CALLIN, before setup_local_APIC().\n");
-        smp_callin_clear_local_apic();
+        if (apic->smp_callin_clear_local_apic)
+                apic->smp_callin_clear_local_apic();
         setup_local_APIC();
         end_local_APIC_setup();
         map_cpu_to_logical_apicid();
@@ -583,7 +583,7 @@ wakeup_secondary_cpu_via_nmi(int logical_apicid, unsigned long start_eip)
         /* Target chip */
         /* Boot on the stack */
         /* Kick the second */
-        apic_icr_write(APIC_DM_NMI | APIC_DEST_LOGICAL, logical_apicid);
+        apic_icr_write(APIC_DM_NMI | apic->dest_logical, logical_apicid);
 
         pr_debug("Waiting for send to finish...\n");
         send_status = safe_apic_wait_icr_idle();
@@ -614,12 +614,6 @@ wakeup_secondary_cpu_via_init(int phys_apicid, unsigned long start_eip)
         unsigned long send_status, accept_status = 0;
         int maxlvt, num_starts, j;
 
-        if (get_uv_system_type() == UV_NON_UNIQUE_APIC) {
-                send_status = uv_wakeup_secondary(phys_apicid, start_eip);
-                atomic_set(&init_deasserted, 1);
-                return send_status;
-        }
-
         maxlvt = lapic_get_maxlvt();
 
         /*
@@ -745,78 +739,23 @@ static void __cpuinit do_fork_idle(struct work_struct *work)
         complete(&c_idle->done);
 }
 
-#ifdef CONFIG_X86_64
-
-/* __ref because it's safe to call free_bootmem when after_bootmem == 0. */
-static void __ref free_bootmem_pda(struct x8664_pda *oldpda)
-{
-        if (!after_bootmem)
-                free_bootmem((unsigned long)oldpda, sizeof(*oldpda));
-}
-
-/*
- * Allocate node local memory for the AP pda.
- *
- * Must be called after the _cpu_pda pointer table is initialized.
- */
-int __cpuinit get_local_pda(int cpu)
-{
-        struct x8664_pda *oldpda, *newpda;
-        unsigned long size = sizeof(struct x8664_pda);
-        int node = cpu_to_node(cpu);
-
-        if (cpu_pda(cpu) && !cpu_pda(cpu)->in_bootmem)
-                return 0;
-
-        oldpda = cpu_pda(cpu);
-        newpda = kmalloc_node(size, GFP_ATOMIC, node);
-        if (!newpda) {
-                printk(KERN_ERR "Could not allocate node local PDA "
-                        "for CPU %d on node %d\n", cpu, node);
-
-                if (oldpda)
-                        return 0;       /* have a usable pda */
-                else
-                        return -1;
-        }
-
-        if (oldpda) {
-                memcpy(newpda, oldpda, size);
-                free_bootmem_pda(oldpda);
-        }
-
-        newpda->in_bootmem = 0;
-        cpu_pda(cpu) = newpda;
-        return 0;
-}
-#endif /* CONFIG_X86_64 */
-
-static int __cpuinit do_boot_cpu(int apicid, int cpu)
 /*
  * NOTE - on most systems this is a PHYSICAL apic ID, but on multiquad
  * (ie clustered apic addressing mode), this is a LOGICAL apic ID.
- * Returns zero if CPU booted OK, else error code from wakeup_secondary_cpu.
+ * Returns zero if CPU booted OK, else error code from
+ * ->wakeup_secondary_cpu.
  */
+static int __cpuinit do_boot_cpu(int apicid, int cpu)
 {
         unsigned long boot_error = 0;
-        int timeout;
         unsigned long start_ip;
-        unsigned short nmi_high = 0, nmi_low = 0;
+        int timeout;
         struct create_idle c_idle = {
-                .cpu = cpu,
-                .done = COMPLETION_INITIALIZER_ONSTACK(c_idle.done),
+                .cpu    = cpu,
+                .done   = COMPLETION_INITIALIZER_ONSTACK(c_idle.done),
         };
-        INIT_WORK(&c_idle.work, do_fork_idle);
 
-#ifdef CONFIG_X86_64
-        /* Allocate node local memory for AP pdas */
-        if (cpu > 0) {
-                boot_error = get_local_pda(cpu);
-                if (boot_error)
-                        goto restore_state;
-                        /* if can't get pda memory, can't start cpu */
-        }
-#endif
+        INIT_WORK(&c_idle.work, do_fork_idle);
 
         alternatives_smp_switch(1);
 
@@ -847,14 +786,16 @@ static int __cpuinit do_boot_cpu(int apicid, int cpu)
 
         set_idle_for_cpu(cpu, c_idle.idle);
 do_rest:
-#ifdef CONFIG_X86_32
         per_cpu(current_task, cpu) = c_idle.idle;
-        init_gdt(cpu);
+#ifdef CONFIG_X86_32
         /* Stack for startup_32 can be just as for start_secondary onwards */
         irq_ctx_init(cpu);
 #else
-        cpu_pda(cpu)->pcurrent = c_idle.idle;
         clear_tsk_thread_flag(c_idle.idle, TIF_FORK);
+        initial_gs = per_cpu_offset(cpu);
+        per_cpu(kernel_stack, cpu) =
+                (unsigned long)task_stack_page(c_idle.idle) -
+                KERNEL_STACK_OFFSET + THREAD_SIZE;
 #endif
         early_gdt_descr.address = (unsigned long)get_cpu_gdt_table(cpu);
         initial_code = (unsigned long)start_secondary;
@@ -878,8 +819,6 @@ do_rest:
 
                 pr_debug("Setting warm reset code and vector.\n");
 
-                store_NMI_vector(&nmi_high, &nmi_low);
-
                 smpboot_setup_warm_reset_vector(start_ip);
                 /*
                  * Be paranoid about clearing APIC errors.
@@ -891,9 +830,13 @@ do_rest:
         }
 
         /*
-         * Starting actual IPI sequence...
+         * Kick the secondary CPU. Use the method in the APIC driver
+         * if it's defined - or use an INIT boot APIC message otherwise:
          */
-        boot_error = wakeup_secondary_cpu(apicid, start_ip);
+        if (apic->wakeup_secondary_cpu)
+                boot_error = apic->wakeup_secondary_cpu(apicid, start_ip);
+        else
+                boot_error = wakeup_secondary_cpu_via_init(apicid, start_ip);
 
         if (!boot_error) {
                 /*
@@ -927,13 +870,11 @@ do_rest:
                         else
                                 /* trampoline code not run */
                                 printk(KERN_ERR "Not responding.\n");
-                        if (get_uv_system_type() != UV_NON_UNIQUE_APIC)
-                                inquire_remote_apic(apicid);
+                        if (apic->inquire_remote_apic)
+                                apic->inquire_remote_apic(apicid);
                 }
         }
-#ifdef CONFIG_X86_64
-restore_state:
-#endif
+
         if (boot_error) {
                 /* Try to put things back the way they were before ... */
                 numa_remove_cpu(cpu); /* was set by numa_add_cpu */
@@ -961,7 +902,7 @@ restore_state:
 
 int __cpuinit native_cpu_up(unsigned int cpu)
 {
-        int apicid = cpu_present_to_apicid(cpu);
+        int apicid = apic->cpu_present_to_apicid(cpu);
         unsigned long flags;
         int err;
 
@@ -1054,14 +995,14 @@ static int __init smp_sanity_check(unsigned max_cpus)
 {
         preempt_disable();
 
-#if defined(CONFIG_X86_PC) && defined(CONFIG_X86_32)
+#if !defined(CONFIG_X86_BIGSMP) && defined(CONFIG_X86_32)
         if (def_to_bigsmp && nr_cpu_ids > 8) {
                 unsigned int cpu;
                 unsigned nr;
 
                 printk(KERN_WARNING
                        "More than 8 CPUs detected - skipping them.\n"
-                       "Use CONFIG_X86_GENERICARCH and CONFIG_X86_BIGSMP.\n");
+                       "Use CONFIG_X86_BIGSMP.\n");
 
                 nr = 0;
                 for_each_present_cpu(cpu) {
@@ -1107,7 +1048,7 @@ static int __init smp_sanity_check(unsigned max_cpus)
          * Should not be necessary because the MP table should list the boot
          * CPU too, but we do it for the sake of robustness anyway.
          */
-        if (!check_phys_apicid_present(boot_cpu_physical_apicid)) {
+        if (!apic->check_phys_apicid_present(boot_cpu_physical_apicid)) {
                 printk(KERN_NOTICE
                         "weird, boot CPU (#%d) not listed by the BIOS.\n",
                         boot_cpu_physical_apicid);
@@ -1125,6 +1066,7 @@ static int __init smp_sanity_check(unsigned max_cpus)
                 printk(KERN_ERR "... forcing use of dummy APIC emulation."
                                 "(tell your hw vendor)\n");
                 smpboot_clear_io_apic();
+                arch_disable_smp_support();
                 return -1;
         }
 
@@ -1181,9 +1123,9 @@ void __init native_smp_prepare_cpus(unsigned int max_cpus)
         current_thread_info()->cpu = 0;  /* needed? */
         set_cpu_sibling_map(0);
 
-#ifdef CONFIG_X86_64
         enable_IR_x2apic();
-        setup_apic_routing();
+#ifdef CONFIG_X86_64
+        default_setup_apic_routing();
 #endif
 
         if (smp_sanity_check(max_cpus) < 0) {
@@ -1207,18 +1149,18 @@ void __init native_smp_prepare_cpus(unsigned int max_cpus)
          */
         setup_local_APIC();
 
-#ifdef CONFIG_X86_64
         /*
          * Enable IO APIC before setting up error vector
          */
         if (!skip_ioapic_setup && nr_ioapics)
                 enable_IO_APIC();
-#endif
+
         end_local_APIC_setup();
 
         map_cpu_to_logical_apicid();
 
-        setup_portio_remap();
+        if (apic->setup_portio_remap)
+                apic->setup_portio_remap();
 
         smpboot_setup_io_apic();
         /*
@@ -1240,10 +1182,7 @@ out:
 void __init native_smp_prepare_boot_cpu(void)
 {
         int me = smp_processor_id();
-#ifdef CONFIG_X86_32
-        init_gdt(me);
-#endif
-        switch_to_new_gdt();
+        switch_to_new_gdt(me);
         /* already set me in cpu_online_mask in boot_cpu_init() */
         cpumask_set_cpu(me, cpu_callout_mask);
         per_cpu(cpu_state, me) = CPU_ONLINE;
diff --git a/arch/x86/kernel/smpcommon.c b/arch/x86/kernel/smpcommon.c
deleted file mode 100644
index 397e309839dd..000000000000
--- a/arch/x86/kernel/smpcommon.c
+++ /dev/null
@@ -1,30 +0,0 @@
-/*
- * SMP stuff which is common to all sub-architectures.
- */
-#include <linux/module.h>
-#include <asm/smp.h>
-
-#ifdef CONFIG_X86_32
-DEFINE_PER_CPU(unsigned long, this_cpu_off);
-EXPORT_PER_CPU_SYMBOL(this_cpu_off);
-
-/*
- * Initialize the CPU's GDT.  This is either the boot CPU doing itself
- * (still using the master per-cpu area), or a CPU doing it for a
- * secondary which will soon come up.
- */
-__cpuinit void init_gdt(int cpu)
-{
-        struct desc_struct gdt;
-
-        pack_descriptor(&gdt, __per_cpu_offset[cpu], 0xFFFFF,
-                        0x2 | DESCTYPE_S, 0x8);
-        gdt.s = 1;
-
-        write_gdt_entry(get_cpu_gdt_table(cpu),
-                        GDT_ENTRY_PERCPU, &gdt, DESCTYPE_S);
-
-        per_cpu(this_cpu_off, cpu) = __per_cpu_offset[cpu];
-        per_cpu(cpu_number, cpu) = cpu;
-}
-#endif
diff --git a/arch/x86/kernel/stacktrace.c b/arch/x86/kernel/stacktrace.c
index 10786af95545..f7bddc2e37d1 100644
--- a/arch/x86/kernel/stacktrace.c
+++ b/arch/x86/kernel/stacktrace.c
@@ -1,7 +1,7 @@
 /*
  * Stack trace management functions
  *
- *  Copyright (C) 2006 Red Hat, Inc., Ingo Molnar <mingo@redhat.com>
+ *  Copyright (C) 2006-2009 Red Hat, Inc., Ingo Molnar <mingo@redhat.com>
  */
 #include <linux/sched.h>
 #include <linux/stacktrace.h>
diff --git a/arch/x86/kernel/summit_32.c b/arch/x86/kernel/summit_32.c
deleted file mode 100644
index 7b987852e876..000000000000
--- a/arch/x86/kernel/summit_32.c
+++ /dev/null
@@ -1,188 +0,0 @@
-/*
- * IBM Summit-Specific Code
- *
- * Written By: Matthew Dobson, IBM Corporation
- *
- * Copyright (c) 2003 IBM Corp.
- *
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or (at
- * your option) any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
- * NON INFRINGEMENT.  See the GNU General Public License for more
- * details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- *
- * Send feedback to <colpatch@us.ibm.com>
- *
- */
-
-#include <linux/mm.h>
-#include <linux/init.h>
-#include <asm/io.h>
-#include <asm/bios_ebda.h>
-#include <asm/summit/mpparse.h>
-
-static struct rio_table_hdr *rio_table_hdr __initdata;
-static struct scal_detail   *scal_devs[MAX_NUMNODES] __initdata;
-static struct rio_detail    *rio_devs[MAX_NUMNODES*4] __initdata;
-
-#ifndef CONFIG_X86_NUMAQ
-static int mp_bus_id_to_node[MAX_MP_BUSSES] __initdata;
-#endif
-
-static int __init setup_pci_node_map_for_wpeg(int wpeg_num, int last_bus)
-{
-        int twister = 0, node = 0;
-        int i, bus, num_buses;
-
-        for (i = 0; i < rio_table_hdr->num_rio_dev; i++) {
-                if (rio_devs[i]->node_id == rio_devs[wpeg_num]->owner_id) {
-                        twister = rio_devs[i]->owner_id;
-                        break;
-                }
-        }
-        if (i == rio_table_hdr->num_rio_dev) {
-                printk(KERN_ERR "%s: Couldn't find owner Cyclone for Winnipeg!\n", __func__);
-                return last_bus;
-        }
-
-        for (i = 0; i < rio_table_hdr->num_scal_dev; i++) {
-                if (scal_devs[i]->node_id == twister) {
-                        node = scal_devs[i]->node_id;
-                        break;
-                }
-        }
-        if (i == rio_table_hdr->num_scal_dev) {
-                printk(KERN_ERR "%s: Couldn't find owner Twister for Cyclone!\n", __func__);
-                return last_bus;
-        }
-
-        switch (rio_devs[wpeg_num]->type) {
-        case CompatWPEG:
-                /*
-                 * The Compatibility Winnipeg controls the 2 legacy buses,
-                 * the 66MHz PCI bus [2 slots] and the 2 "extra" buses in case
-                 * a PCI-PCI bridge card is used in either slot: total 5 buses.
-                 */
-                num_buses = 5;
-                break;
-        case AltWPEG:
-                /*
-                 * The Alternate Winnipeg controls the 2 133MHz buses [1 slot
-                 * each], their 2 "extra" buses, the 100MHz bus [2 slots] and
-                 * the "extra" buses for each of those slots: total 7 buses.
-                 */
-                num_buses = 7;
-                break;
-        case LookOutAWPEG:
-        case LookOutBWPEG:
-                /*
-                 * A Lookout Winnipeg controls 3 100MHz buses [2 slots each]
-                 * & the "extra" buses for each of those slots: total 9 buses.
-                 */
-                num_buses = 9;
-                break;
-        default:
-                printk(KERN_INFO "%s: Unsupported Winnipeg type!\n", __func__);
-                return last_bus;
-        }
-
-        for (bus = last_bus; bus < last_bus + num_buses; bus++)
-                mp_bus_id_to_node[bus] = node;
-        return bus;
-}
-
-static int __init build_detail_arrays(void)
-{
-        unsigned long ptr;
-        int i, scal_detail_size, rio_detail_size;
-
-        if (rio_table_hdr->num_scal_dev > MAX_NUMNODES) {
-                printk(KERN_WARNING "%s: MAX_NUMNODES too low!  Defined as %d, but system has %d nodes.\n", __func__, MAX_NUMNODES, rio_table_hdr->num_scal_dev);
-                return 0;
-        }
-
-        switch (rio_table_hdr->version) {
-        default:
-                printk(KERN_WARNING "%s: Invalid Rio Grande Table Version: %d\n", __func__, rio_table_hdr->version);
-                return 0;
-        case 2:
-                scal_detail_size = 11;
-                rio_detail_size = 13;
-                break;
-        case 3:
-                scal_detail_size = 12;
-                rio_detail_size = 15;
-                break;
-        }
-
-        ptr = (unsigned long)rio_table_hdr + 3;
-        for (i = 0; i < rio_table_hdr->num_scal_dev; i++, ptr += scal_detail_size)
-                scal_devs[i] = (struct scal_detail *)ptr;
-
-        for (i = 0; i < rio_table_hdr->num_rio_dev; i++, ptr += rio_detail_size)
-                rio_devs[i] = (struct rio_detail *)ptr;
-
-        return 1;
-}
-
-void __init setup_summit(void)
-{
-        unsigned long           ptr;
-        unsigned short          offset;
-        int                     i, next_wpeg, next_bus = 0;
-
-        /* The pointer to the EBDA is stored in the word @ phys 0x40E(40:0E) */
-        ptr = get_bios_ebda();
-        ptr = (unsigned long)phys_to_virt(ptr);
-
-        rio_table_hdr = NULL;
-        offset = 0x180;
-        while (offset) {
-                /* The block id is stored in the 2nd word */
-                if (*((unsigned short *)(ptr + offset + 2)) == 0x4752) {
-                        /* set the pointer past the offset & block id */
-                        rio_table_hdr = (struct rio_table_hdr *)(ptr + offset + 4);
-                        break;
-                }
-                /* The next offset is stored in the 1st word.  0 means no more */
-                offset = *((unsigned short *)(ptr + offset));
-        }
-        if (!rio_table_hdr) {
-                printk(KERN_ERR "%s: Unable to locate Rio Grande Table in EBDA - bailing!\n", __func__);
-                return;
-        }
-
-        if (!build_detail_arrays())
-                return;
-
-        /* The first Winnipeg we're looking for has an index of 0 */
-        next_wpeg = 0;
-        do {
-                for (i = 0; i < rio_table_hdr->num_rio_dev; i++) {
-                        if (is_WPEG(rio_devs[i]) && rio_devs[i]->WP_index == next_wpeg) {
-                                /* It's the Winnipeg we're looking for! */
-                                next_bus = setup_pci_node_map_for_wpeg(i, next_bus);
-                                next_wpeg++;
-                                break;
-                        }
-                }
-                /*
-                 * If we go through all Rio devices and don't find one with
-                 * the next index, it means we've found all the Winnipegs,
-                 * and thus all the PCI buses.
-                 */
-                if (i == rio_table_hdr->num_rio_dev)
-                        next_wpeg = 0;
-        } while (next_wpeg != 0);
-}
diff --git a/arch/x86/kernel/syscall_table_32.S b/arch/x86/kernel/syscall_table_32.S
index e2e86a08f31d..3bdb64829b82 100644
--- a/arch/x86/kernel/syscall_table_32.S
+++ b/arch/x86/kernel/syscall_table_32.S
@@ -1,7 +1,7 @@
 ENTRY(sys_call_table)
         .long sys_restart_syscall       /* 0 - old "setup()" system call, used for restarting */
         .long sys_exit
-        .long sys_fork
+        .long ptregs_fork
         .long sys_read
         .long sys_write
         .long sys_open          /* 5 */
@@ -10,7 +10,7 @@ ENTRY(sys_call_table)
         .long sys_creat
         .long sys_link
         .long sys_unlink        /* 10 */
-        .long sys_execve
+        .long ptregs_execve
         .long sys_chdir
         .long sys_time
         .long sys_mknod
@@ -109,17 +109,17 @@ ENTRY(sys_call_table)
         .long sys_newlstat
         .long sys_newfstat
         .long sys_uname
-        .long sys_iopl          /* 110 */
+        .long ptregs_iopl       /* 110 */
         .long sys_vhangup
         .long sys_ni_syscall    /* old "idle" system call */
-        .long sys_vm86old
+        .long ptregs_vm86old
         .long sys_wait4
         .long sys_swapoff       /* 115 */
         .long sys_sysinfo
         .long sys_ipc
         .long sys_fsync
-        .long sys_sigreturn
-        .long sys_clone         /* 120 */
+        .long ptregs_sigreturn
+        .long ptregs_clone      /* 120 */
         .long sys_setdomainname
         .long sys_newuname
         .long sys_modify_ldt
@@ -165,14 +165,14 @@ ENTRY(sys_call_table)
         .long sys_mremap
         .long sys_setresuid16
         .long sys_getresuid16   /* 165 */
-        .long sys_vm86
+        .long ptregs_vm86
         .long sys_ni_syscall    /* Old sys_query_module */
         .long sys_poll
         .long sys_nfsservctl
         .long sys_setresgid16   /* 170 */
         .long sys_getresgid16
         .long sys_prctl
-        .long sys_rt_sigreturn
+        .long ptregs_rt_sigreturn
         .long sys_rt_sigaction
         .long sys_rt_sigprocmask        /* 175 */
         .long sys_rt_sigpending
@@ -185,11 +185,11 @@ ENTRY(sys_call_table)
         .long sys_getcwd
         .long sys_capget
         .long sys_capset        /* 185 */
-        .long sys_sigaltstack
+        .long ptregs_sigaltstack
         .long sys_sendfile
         .long sys_ni_syscall    /* reserved for streams1 */
         .long sys_ni_syscall    /* reserved for streams2 */
-        .long sys_vfork         /* 190 */
+        .long ptregs_vfork      /* 190 */
         .long sys_getrlimit
         .long sys_mmap2
         .long sys_truncate64
diff --git a/arch/x86/kernel/time_32.c b/arch/x86/kernel/time_32.c
index 3985cac0ed47..5c5d87f0b2e1 100644
--- a/arch/x86/kernel/time_32.c
+++ b/arch/x86/kernel/time_32.c
@@ -33,12 +33,12 @@
 #include <linux/time.h>
 #include <linux/mca.h>
 
-#include <asm/arch_hooks.h>
+#include <asm/setup.h>
 #include <asm/hpet.h>
 #include <asm/time.h>
 #include <asm/timer.h>
 
-#include "do_timer.h"
+#include <asm/do_timer.h>
 
 int timer_ack;
 
@@ -118,7 +118,7 @@ void __init hpet_time_init(void)
 {
         if (!hpet_enable())
                 setup_pit_timer();
-        time_init_hook();
+        x86_quirk_time_init();
 }
 
 /*
@@ -131,7 +131,7 @@ void __init hpet_time_init(void)
  */
 void __init time_init(void)
 {
-        pre_time_init_hook();
+        x86_quirk_pre_time_init();
         tsc_init();
         late_time_init = choose_time_init();
 }
diff --git a/arch/x86/kernel/tlb_32.c b/arch/x86/kernel/tlb_32.c
deleted file mode 100644
index ce5054642247..000000000000
--- a/arch/x86/kernel/tlb_32.c
+++ /dev/null
@@ -1,256 +0,0 @@
-#include <linux/spinlock.h>
-#include <linux/cpu.h>
-#include <linux/interrupt.h>
-
-#include <asm/tlbflush.h>
-
-DEFINE_PER_CPU(struct tlb_state, cpu_tlbstate)
-                        ____cacheline_aligned = { &init_mm, 0, };
-
-/* must come after the send_IPI functions above for inlining */
-#include <mach_ipi.h>
-
-/*
- *      Smarter SMP flushing macros.
- *              c/o Linus Torvalds.
- *
- *      These mean you can really definitely utterly forget about
- *      writing to user space from interrupts. (Its not allowed anyway).
- *
- *      Optimizations Manfred Spraul <manfred@colorfullife.com>
- */
-
-static cpumask_t flush_cpumask;
-static struct mm_struct *flush_mm;
-static unsigned long flush_va;
-static DEFINE_SPINLOCK(tlbstate_lock);
-
-/*
- * We cannot call mmdrop() because we are in interrupt context,
- * instead update mm->cpu_vm_mask.
- *
- * We need to reload %cr3 since the page tables may be going
- * away from under us..
- */
-void leave_mm(int cpu)
-{
-        BUG_ON(x86_read_percpu(cpu_tlbstate.state) == TLBSTATE_OK);
-        cpu_clear(cpu, x86_read_percpu(cpu_tlbstate.active_mm)->cpu_vm_mask);
-        load_cr3(swapper_pg_dir);
-}
-EXPORT_SYMBOL_GPL(leave_mm);
-
-/*
- *
- * The flush IPI assumes that a thread switch happens in this order:
- * [cpu0: the cpu that switches]
- * 1) switch_mm() either 1a) or 1b)
- * 1a) thread switch to a different mm
- * 1a1) cpu_clear(cpu, old_mm->cpu_vm_mask);
- *      Stop ipi delivery for the old mm. This is not synchronized with
- *      the other cpus, but smp_invalidate_interrupt ignore flush ipis
- *      for the wrong mm, and in the worst case we perform a superfluous
- *      tlb flush.
- * 1a2) set cpu_tlbstate to TLBSTATE_OK
- *      Now the smp_invalidate_interrupt won't call leave_mm if cpu0
- *      was in lazy tlb mode.
- * 1a3) update cpu_tlbstate[].active_mm
- *      Now cpu0 accepts tlb flushes for the new mm.
- * 1a4) cpu_set(cpu, new_mm->cpu_vm_mask);
- *      Now the other cpus will send tlb flush ipis.
- * 1a4) change cr3.
- * 1b) thread switch without mm change
- *      cpu_tlbstate[].active_mm is correct, cpu0 already handles
- *      flush ipis.
- * 1b1) set cpu_tlbstate to TLBSTATE_OK
- * 1b2) test_and_set the cpu bit in cpu_vm_mask.
- *      Atomically set the bit [other cpus will start sending flush ipis],
- *      and test the bit.
- * 1b3) if the bit was 0: leave_mm was called, flush the tlb.
- * 2) switch %%esp, ie current
- *
- * The interrupt must handle 2 special cases:
- * - cr3 is changed before %%esp, ie. it cannot use current->{active_,}mm.
- * - the cpu performs speculative tlb reads, i.e. even if the cpu only
- *   runs in kernel space, the cpu could load tlb entries for user space
- *   pages.
- *
- * The good news is that cpu_tlbstate is local to each cpu, no
- * write/read ordering problems.
- */
-
-/*
- * TLB flush IPI:
- *
- * 1) Flush the tlb entries if the cpu uses the mm that's being flushed.
- * 2) Leave the mm if we are in the lazy tlb mode.
- */
-
-void smp_invalidate_interrupt(struct pt_regs *regs)
-{
-        unsigned long cpu;
-
-        cpu = get_cpu();
-
-        if (!cpu_isset(cpu, flush_cpumask))
-                goto out;
-                /*
-                 * This was a BUG() but until someone can quote me the
-                 * line from the intel manual that guarantees an IPI to
-                 * multiple CPUs is retried _only_ on the erroring CPUs
-                 * its staying as a return
-                 *
-                 * BUG();
-                 */
-
-        if (flush_mm == x86_read_percpu(cpu_tlbstate.active_mm)) {
-                if (x86_read_percpu(cpu_tlbstate.state) == TLBSTATE_OK) {
-                        if (flush_va == TLB_FLUSH_ALL)
-                                local_flush_tlb();
-                        else
-                                __flush_tlb_one(flush_va);
-                } else
-                        leave_mm(cpu);
-        }
-        ack_APIC_irq();
-        smp_mb__before_clear_bit();
-        cpu_clear(cpu, flush_cpumask);
-        smp_mb__after_clear_bit();
-out:
-        put_cpu_no_resched();
-        inc_irq_stat(irq_tlb_count);
-}
-
-void native_flush_tlb_others(const cpumask_t *cpumaskp, struct mm_struct *mm,
-                             unsigned long va)
-{
-        cpumask_t cpumask = *cpumaskp;
-
-        /*
-         * A couple of (to be removed) sanity checks:
-         *
-         * - current CPU must not be in mask
-         * - mask must exist :)
-         */
-        BUG_ON(cpus_empty(cpumask));
-        BUG_ON(cpu_isset(smp_processor_id(), cpumask));
-        BUG_ON(!mm);
-
-#ifdef CONFIG_HOTPLUG_CPU
-        /* If a CPU which we ran on has gone down, OK. */
-        cpus_and(cpumask, cpumask, cpu_online_map);
-        if (unlikely(cpus_empty(cpumask)))
-                return;
-#endif
-
-        /*
-         * i'm not happy about this global shared spinlock in the
-         * MM hot path, but we'll see how contended it is.
-         * AK: x86-64 has a faster method that could be ported.
-         */
-        spin_lock(&tlbstate_lock);
-
-        flush_mm = mm;
-        flush_va = va;
-        cpus_or(flush_cpumask, cpumask, flush_cpumask);
-
-        /*
-         * Make the above memory operations globally visible before
-         * sending the IPI.
-         */
-        smp_mb();
-        /*
-         * We have to send the IPI only to
-         * CPUs affected.
-         */
-        send_IPI_mask(&cpumask, INVALIDATE_TLB_VECTOR);
-
-        while (!cpus_empty(flush_cpumask))
-                /* nothing. lockup detection does not belong here */
-                cpu_relax();
-
-        flush_mm = NULL;
-        flush_va = 0;
-        spin_unlock(&tlbstate_lock);
-}
-
-void flush_tlb_current_task(void)
-{
-        struct mm_struct *mm = current->mm;
-        cpumask_t cpu_mask;
-
-        preempt_disable();
-        cpu_mask = mm->cpu_vm_mask;
-        cpu_clear(smp_processor_id(), cpu_mask);
-
-        local_flush_tlb();
-        if (!cpus_empty(cpu_mask))
-                flush_tlb_others(cpu_mask, mm, TLB_FLUSH_ALL);
-        preempt_enable();
-}
-
-void flush_tlb_mm(struct mm_struct *mm)
-{
-        cpumask_t cpu_mask;
-
-        preempt_disable();
-        cpu_mask = mm->cpu_vm_mask;
-        cpu_clear(smp_processor_id(), cpu_mask);
-
-        if (current->active_mm == mm) {
-                if (current->mm)
-                        local_flush_tlb();
-                else
-                        leave_mm(smp_processor_id());
-        }
-        if (!cpus_empty(cpu_mask))
-                flush_tlb_others(cpu_mask, mm, TLB_FLUSH_ALL);
-
-        preempt_enable();
-}
-
-void flush_tlb_page(struct vm_area_struct *vma, unsigned long va)
-{
-        struct mm_struct *mm = vma->vm_mm;
-        cpumask_t cpu_mask;
-
-        preempt_disable();
-        cpu_mask = mm->cpu_vm_mask;
-        cpu_clear(smp_processor_id(), cpu_mask);
-
-        if (current->active_mm == mm) {
-                if (current->mm)
-                        __flush_tlb_one(va);
-                 else
-                        leave_mm(smp_processor_id());
-        }
-
-        if (!cpus_empty(cpu_mask))
-                flush_tlb_others(cpu_mask, mm, va);
-
-        preempt_enable();
-}
-EXPORT_SYMBOL(flush_tlb_page);
-
-static void do_flush_tlb_all(void *info)
-{
-        unsigned long cpu = smp_processor_id();
-
-        __flush_tlb_all();
-        if (x86_read_percpu(cpu_tlbstate.state) == TLBSTATE_LAZY)
-                leave_mm(cpu);
-}
-
-void flush_tlb_all(void)
-{
-        on_each_cpu(do_flush_tlb_all, NULL, 1);
-}
-
-void reset_lazy_tlbstate(void)
-{
-        int cpu = raw_smp_processor_id();
-
-        per_cpu(cpu_tlbstate, cpu).state = 0;
-        per_cpu(cpu_tlbstate, cpu).active_mm = &init_mm;
-}
-
diff --git a/arch/x86/kernel/tlb_uv.c b/arch/x86/kernel/tlb_uv.c
index 6812b829ed83..d038b9c45cf8 100644
--- a/arch/x86/kernel/tlb_uv.c
+++ b/arch/x86/kernel/tlb_uv.c
@@ -11,16 +11,15 @@
 #include <linux/kernel.h>
 
 #include <asm/mmu_context.h>
+#include <asm/uv/uv.h>
 #include <asm/uv/uv_mmrs.h>
 #include <asm/uv/uv_hub.h>
 #include <asm/uv/uv_bau.h>
-#include <asm/genapic.h>
+#include <asm/apic.h>
 #include <asm/idle.h>
 #include <asm/tsc.h>
 #include <asm/irq_vectors.h>
 
-#include <mach_apic.h>
-
 static struct bau_control       **uv_bau_table_bases __read_mostly;
 static int                      uv_bau_retry_limit __read_mostly;
 
@@ -210,14 +209,15 @@ static int uv_wait_completion(struct bau_desc *bau_desc,
  *
  * Send a broadcast and wait for a broadcast message to complete.
  *
- * The cpumaskp mask contains the cpus the broadcast was sent to.
+ * The flush_mask contains the cpus the broadcast was sent to.
  *
- * Returns 1 if all remote flushing was done. The mask is zeroed.
- * Returns 0 if some remote flushing remains to be done. The mask is left
- * unchanged.
+ * Returns NULL if all remote flushing was done. The mask is zeroed.
+ * Returns @flush_mask if some remote flushing remains to be done. The
+ * mask will have some bits still set.
  */
-int uv_flush_send_and_wait(int cpu, int this_blade, struct bau_desc *bau_desc,
-                           cpumask_t *cpumaskp)
+const struct cpumask *uv_flush_send_and_wait(int cpu, int this_blade,
+                                             struct bau_desc *bau_desc,
+                                             struct cpumask *flush_mask)
 {
         int completion_status = 0;
         int right_shift;
@@ -257,66 +257,74 @@ int uv_flush_send_and_wait(int cpu, int this_blade, struct bau_desc *bau_desc,
                  * the cpu's, all of which are still in the mask.
                  */
                 __get_cpu_var(ptcstats).ptc_i++;
-                return 0;
+                return flush_mask;
         }
 
         /*
          * Success, so clear the remote cpu's from the mask so we don't
          * use the IPI method of shootdown on them.
          */
-        for_each_cpu_mask(bit, *cpumaskp) {
+        for_each_cpu(bit, flush_mask) {
                 blade = uv_cpu_to_blade_id(bit);
                 if (blade == this_blade)
                         continue;
-                cpu_clear(bit, *cpumaskp);
+                cpumask_clear_cpu(bit, flush_mask);
         }
-        if (!cpus_empty(*cpumaskp))
-                return 0;
-        return 1;
+        if (!cpumask_empty(flush_mask))
+                return flush_mask;
+        return NULL;
 }
 
 /**
  * uv_flush_tlb_others - globally purge translation cache of a virtual
  * address or all TLB's
- * @cpumaskp: mask of all cpu's in which the address is to be removed
+ * @cpumask: mask of all cpu's in which the address is to be removed
  * @mm: mm_struct containing virtual address range
  * @va: virtual address to be removed (or TLB_FLUSH_ALL for all TLB's on cpu)
+ * @cpu: the current cpu
  *
  * This is the entry point for initiating any UV global TLB shootdown.
  *
  * Purges the translation caches of all specified processors of the given
  * virtual address, or purges all TLB's on specified processors.
  *
- * The caller has derived the cpumaskp from the mm_struct and has subtracted
- * the local cpu from the mask.  This function is called only if there
- * are bits set in the mask. (e.g. flush_tlb_page())
+ * The caller has derived the cpumask from the mm_struct.  This function
+ * is called only if there are bits set in the mask. (e.g. flush_tlb_page())
  *
- * The cpumaskp is converted into a nodemask of the nodes containing
+ * The cpumask is converted into a nodemask of the nodes containing
  * the cpus.
  *
- * Returns 1 if all remote flushing was done.
- * Returns 0 if some remote flushing remains to be done.
+ * Note that this function should be called with preemption disabled.
+ *
+ * Returns NULL if all remote flushing was done.
+ * Returns pointer to cpumask if some remote flushing remains to be
+ * done.  The returned pointer is valid till preemption is re-enabled.
  */
-int uv_flush_tlb_others(cpumask_t *cpumaskp, struct mm_struct *mm,
-                        unsigned long va)
+const struct cpumask *uv_flush_tlb_others(const struct cpumask *cpumask,
+                                          struct mm_struct *mm,
+                                          unsigned long va, unsigned int cpu)
 {
+        static DEFINE_PER_CPU(cpumask_t, flush_tlb_mask);
+        struct cpumask *flush_mask = &__get_cpu_var(flush_tlb_mask);
         int i;
         int bit;
         int blade;
-        int cpu;
+        int uv_cpu;
         int this_blade;
         int locals = 0;
         struct bau_desc *bau_desc;
 
-        cpu = uv_blade_processor_id();
+        cpumask_andnot(flush_mask, cpumask, cpumask_of(cpu));
+
+        uv_cpu = uv_blade_processor_id();
         this_blade = uv_numa_blade_id();
         bau_desc = __get_cpu_var(bau_control).descriptor_base;
-        bau_desc += UV_ITEMS_PER_DESCRIPTOR * cpu;
+        bau_desc += UV_ITEMS_PER_DESCRIPTOR * uv_cpu;
 
         bau_nodes_clear(&bau_desc->distribution, UV_DISTRIBUTION_SIZE);
 
         i = 0;
-        for_each_cpu_mask(bit, *cpumaskp) {
+        for_each_cpu(bit, flush_mask) {
                 blade = uv_cpu_to_blade_id(bit);
                 BUG_ON(blade > (UV_DISTRIBUTION_SIZE - 1));
                 if (blade == this_blade) {
@@ -331,17 +339,17 @@ int uv_flush_tlb_others(cpumask_t *cpumaskp, struct mm_struct *mm,
                  * no off_node flushing; return status for local node
                  */
                 if (locals)
-                        return 0;
+                        return flush_mask;
                 else
-                        return 1;
+                        return NULL;
         }
         __get_cpu_var(ptcstats).requestor++;
         __get_cpu_var(ptcstats).ntargeted += i;
 
         bau_desc->payload.address = va;
-        bau_desc->payload.sending_cpu = smp_processor_id();
+        bau_desc->payload.sending_cpu = cpu;
 
-        return uv_flush_send_and_wait(cpu, this_blade, bau_desc, cpumaskp);
+        return uv_flush_send_and_wait(uv_cpu, this_blade, bau_desc, flush_mask);
 }
 
 /*
diff --git a/arch/x86/kernel/trampoline_32.S b/arch/x86/kernel/trampoline_32.S
index d8ccc3c6552f..66d874e5404c 100644
--- a/arch/x86/kernel/trampoline_32.S
+++ b/arch/x86/kernel/trampoline_32.S
@@ -29,7 +29,7 @@
 
 #include <linux/linkage.h>
 #include <asm/segment.h>
-#include <asm/page.h>
+#include <asm/page_types.h>
 
 /* We can free up trampoline after bootup if cpu hotplug is not supported. */
 #ifndef CONFIG_HOTPLUG_CPU
diff --git a/arch/x86/kernel/trampoline_64.S b/arch/x86/kernel/trampoline_64.S
index 894293c598db..cddfb8d386b9 100644
--- a/arch/x86/kernel/trampoline_64.S
+++ b/arch/x86/kernel/trampoline_64.S
@@ -25,10 +25,11 @@
  */
 
 #include <linux/linkage.h>
-#include <asm/pgtable.h>
-#include <asm/page.h>
+#include <asm/pgtable_types.h>
+#include <asm/page_types.h>
 #include <asm/msr.h>
 #include <asm/segment.h>
+#include <asm/processor-flags.h>
 
 .section .rodata, "a", @progbits
 
@@ -37,7 +38,7 @@
 ENTRY(trampoline_data)
 r_base = .
         cli                     # We should be safe anyway
-        wbinvd  
+        wbinvd
         mov     %cs, %ax        # Code and data in the same place
         mov     %ax, %ds
         mov     %ax, %es
@@ -73,9 +74,8 @@ r_base = .
         lidtl   tidt - r_base   # load idt with 0, 0
         lgdtl   tgdt - r_base   # load gdt with whatever is appropriate
 
-        xor     %ax, %ax
-        inc     %ax             # protected mode (PE) bit
-        lmsw    %ax             # into protected mode
+        mov     $X86_CR0_PE, %ax        # protected mode (PE) bit
+        lmsw    %ax                     # into protected mode
 
         # flush prefetch and jump to startup_32
         ljmpl   *(startup_32_vector - r_base)
@@ -86,9 +86,8 @@ startup_32:
         movl    $__KERNEL_DS, %eax      # Initialize the %ds segment register
         movl    %eax, %ds
 
-        xorl    %eax, %eax
-        btsl    $5, %eax                # Enable PAE mode
-        movl    %eax, %cr4
+        movl    $X86_CR4_PAE, %eax
+        movl    %eax, %cr4              # Enable PAE mode
 
                                         # Setup trampoline 4 level pagetables
         leal    (trampoline_level4_pgt - r_base)(%esi), %eax
@@ -99,9 +98,9 @@ startup_32:
         xorl    %edx, %edx
         wrmsr
 
-        xorl    %eax, %eax
-        btsl    $31, %eax               # Enable paging and in turn activate Long Mode
-        btsl    $0, %eax                # Enable protected mode
+        # Enable paging and in turn activate Long Mode
+        # Enable protected mode
+        movl    $(X86_CR0_PG | X86_CR0_PE), %eax
         movl    %eax, %cr0
 
         /*
diff --git a/arch/x86/kernel/traps.c b/arch/x86/kernel/traps.c
index a9e7548e1790..a1d288327ff0 100644
--- a/arch/x86/kernel/traps.c
+++ b/arch/x86/kernel/traps.c
@@ -54,15 +54,14 @@
 #include <asm/desc.h>
 #include <asm/i387.h>
 
-#include <mach_traps.h>
+#include <asm/mach_traps.h>
 
 #ifdef CONFIG_X86_64
 #include <asm/pgalloc.h>
 #include <asm/proto.h>
-#include <asm/pda.h>
 #else
 #include <asm/processor-flags.h>
-#include <asm/arch_hooks.h>
+#include <asm/setup.h>
 #include <asm/traps.h>
 
 #include "cpu/mcheck/mce.h"
@@ -119,47 +118,6 @@ die_if_kernel(const char *str, struct pt_regs *regs, long err)
         if (!user_mode_vm(regs))
                 die(str, regs, err);
 }
-
-/*
- * Perform the lazy TSS's I/O bitmap copy. If the TSS has an
- * invalid offset set (the LAZY one) and the faulting thread has
- * a valid I/O bitmap pointer, we copy the I/O bitmap in the TSS,
- * we set the offset field correctly and return 1.
- */
-static int lazy_iobitmap_copy(void)
-{
-        struct thread_struct *thread;
-        struct tss_struct *tss;
-        int cpu;
-
-        cpu = get_cpu();
-        tss = &per_cpu(init_tss, cpu);
-        thread = &current->thread;
-
-        if (tss->x86_tss.io_bitmap_base == INVALID_IO_BITMAP_OFFSET_LAZY &&
-            thread->io_bitmap_ptr) {
-                memcpy(tss->io_bitmap, thread->io_bitmap_ptr,
-                       thread->io_bitmap_max);
-                /*
-                 * If the previously set map was extending to higher ports
-                 * than the current one, pad extra space with 0xff (no access).
-                 */
-                if (thread->io_bitmap_max < tss->io_bitmap_max) {
-                        memset((char *) tss->io_bitmap +
-                                thread->io_bitmap_max, 0xff,
-                                tss->io_bitmap_max - thread->io_bitmap_max);
-                }
-                tss->io_bitmap_max = thread->io_bitmap_max;
-                tss->x86_tss.io_bitmap_base = IO_BITMAP_OFFSET;
-                tss->io_bitmap_owner = thread;
-                put_cpu();
-
-                return 1;
-        }
-        put_cpu();
-
-        return 0;
-}
 #endif
 
 static void __kprobes
@@ -310,11 +268,6 @@ do_general_protection(struct pt_regs *regs, long error_code)
         conditional_sti(regs);
 
 #ifdef CONFIG_X86_32
-        if (lazy_iobitmap_copy()) {
-                /* restart the faulting instruction */
-                return;
-        }
-
         if (regs->flags & X86_VM_MASK)
                 goto gp_in_vm86;
 #endif
@@ -914,19 +867,20 @@ void math_emulate(struct math_emu_info *info)
 }
 #endif /* CONFIG_MATH_EMULATION */
 
-dotraplinkage void __kprobes do_device_not_available(struct pt_regs regs)
+dotraplinkage void __kprobes
+do_device_not_available(struct pt_regs *regs, long error_code)
 {
 #ifdef CONFIG_X86_32
         if (read_cr0() & X86_CR0_EM) {
                 struct math_emu_info info = { };
 
-                conditional_sti(&regs);
+                conditional_sti(regs);
 
-                info.regs = &regs;
+                info.regs = regs;
                 math_emulate(&info);
         } else {
                 math_state_restore(); /* interrupts still off */
-                conditional_sti(&regs);
+                conditional_sti(regs);
         }
 #else
         math_state_restore();
@@ -942,7 +896,7 @@ dotraplinkage void do_iret_error(struct pt_regs *regs, long error_code)
         info.si_signo = SIGILL;
         info.si_errno = 0;
         info.si_code = ILL_BADSTK;
-        info.si_addr = 0;
+        info.si_addr = NULL;
         if (notify_die(DIE_TRAP, "iret exception",
                         regs, error_code, 32, SIGILL) == NOTIFY_STOP)
                 return;
@@ -1026,6 +980,6 @@ void __init trap_init(void)
         cpu_init();
 
 #ifdef CONFIG_X86_32
-        trap_init_hook();
+        x86_quirk_trap_init();
 #endif
 }
diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c
index d5cebb52d45b..7a567ebe6361 100644
--- a/arch/x86/kernel/tsc.c
+++ b/arch/x86/kernel/tsc.c
@@ -17,20 +17,21 @@
 #include <asm/delay.h>
 #include <asm/hypervisor.h>
 
-unsigned int cpu_khz;           /* TSC clocks / usec, not used here */
+unsigned int __read_mostly cpu_khz;     /* TSC clocks / usec, not used here */
 EXPORT_SYMBOL(cpu_khz);
-unsigned int tsc_khz;
+
+unsigned int __read_mostly tsc_khz;
 EXPORT_SYMBOL(tsc_khz);
 
 /*
  * TSC can be unstable due to cpufreq or due to unsynced TSCs
  */
-static int tsc_unstable;
+static int __read_mostly tsc_unstable;
 
 /* native_sched_clock() is called before tsc_init(), so
    we must start with the TSC soft disabled to prevent
    erroneous rdtsc usage on !cpu_has_tsc processors */
-static int tsc_disabled = -1;
+static int __read_mostly tsc_disabled = -1;
 
 static int tsc_clocksource_reliable;
 /*
@@ -543,8 +544,6 @@ unsigned long native_calibrate_tsc(void)
         return tsc_pit_min;
 }
 
-#ifdef CONFIG_X86_32
-/* Only called from the Powernow K7 cpu freq driver */
 int recalibrate_cpu_khz(void)
 {
 #ifndef CONFIG_SMP
@@ -566,7 +565,6 @@ int recalibrate_cpu_khz(void)
 
 EXPORT_SYMBOL(recalibrate_cpu_khz);
 
-#endif /* CONFIG_X86_32 */
 
 /* Accelerators for sched_clock()
  * convert from cycles(64bits) => nanoseconds (64bits)
@@ -793,7 +791,7 @@ __cpuinit int unsynchronized_tsc(void)
         if (!cpu_has_tsc || tsc_unstable)
                 return 1;
 
-#ifdef CONFIG_X86_SMP
+#ifdef CONFIG_SMP
         if (apic_is_clustered_box())
                 return 1;
 #endif
diff --git a/arch/x86/kernel/visws_quirks.c b/arch/x86/kernel/visws_quirks.c
index d801d06af068..191a876e9e87 100644
--- a/arch/x86/kernel/visws_quirks.c
+++ b/arch/x86/kernel/visws_quirks.c
@@ -24,18 +24,14 @@
 
 #include <asm/visws/cobalt.h>
 #include <asm/visws/piix4.h>
-#include <asm/arch_hooks.h>
 #include <asm/io_apic.h>
 #include <asm/fixmap.h>
 #include <asm/reboot.h>
 #include <asm/setup.h>
+#include <asm/apic.h>
 #include <asm/e820.h>
 #include <asm/io.h>
 
-#include <mach_ipi.h>
-
-#include "mach_apic.h"
-
 #include <linux/kernel_stat.h>
 
 #include <asm/i8259.h>
@@ -49,8 +45,6 @@
 
 extern int no_broadcast;
 
-#include <asm/apic.h>
-
 char visws_board_type   = -1;
 char visws_board_rev    = -1;
 
@@ -200,7 +194,7 @@ static void __init MP_processor_info(struct mpc_cpu *m)
                 return;
         }
 
-        apic_cpus = apicid_to_cpu_present(m->apicid);
+        apic_cpus = apic->apicid_to_cpu_present(m->apicid);
         physids_or(phys_cpu_present_map, phys_cpu_present_map, apic_cpus);
         /*
          * Validate version
diff --git a/arch/x86/kernel/vm86_32.c b/arch/x86/kernel/vm86_32.c
index 4eeb5cf9720d..d7ac84e7fc1c 100644
--- a/arch/x86/kernel/vm86_32.c
+++ b/arch/x86/kernel/vm86_32.c
@@ -158,7 +158,7 @@ struct pt_regs *save_v86_state(struct kernel_vm86_regs *regs)
         ret = KVM86->regs32;
 
         ret->fs = current->thread.saved_fs;
-        loadsegment(gs, current->thread.saved_gs);
+        set_user_gs(ret, current->thread.saved_gs);
 
         return ret;
 }
@@ -197,9 +197,9 @@ out:
 static int do_vm86_irq_handling(int subfunction, int irqnumber);
 static void do_sys_vm86(struct kernel_vm86_struct *info, struct task_struct *tsk);
 
-asmlinkage int sys_vm86old(struct pt_regs regs)
+int sys_vm86old(struct pt_regs *regs)
 {
-        struct vm86_struct __user *v86 = (struct vm86_struct __user *)regs.bx;
+        struct vm86_struct __user *v86 = (struct vm86_struct __user *)regs->bx;
         struct kernel_vm86_struct info; /* declare this _on top_,
                                          * this avoids wasting of stack space.
                                          * This remains on the stack until we
@@ -218,7 +218,7 @@ asmlinkage int sys_vm86old(struct pt_regs regs)
         if (tmp)
                 goto out;
         memset(&info.vm86plus, 0, (int)&info.regs32 - (int)&info.vm86plus);
-        info.regs32 = &regs;
+        info.regs32 = regs;
         tsk->thread.vm86_info = v86;
         do_sys_vm86(&info, tsk);
         ret = 0;        /* we never return here */
@@ -227,7 +227,7 @@ out:
 }
 
 
-asmlinkage int sys_vm86(struct pt_regs regs)
+int sys_vm86(struct pt_regs *regs)
 {
         struct kernel_vm86_struct info; /* declare this _on top_,
                                          * this avoids wasting of stack space.
@@ -239,12 +239,12 @@ asmlinkage int sys_vm86(struct pt_regs regs)
         struct vm86plus_struct __user *v86;
 
         tsk = current;
-        switch (regs.bx) {
+        switch (regs->bx) {
         case VM86_REQUEST_IRQ:
         case VM86_FREE_IRQ:
         case VM86_GET_IRQ_BITS:
         case VM86_GET_AND_RESET_IRQ:
-                ret = do_vm86_irq_handling(regs.bx, (int)regs.cx);
+                ret = do_vm86_irq_handling(regs->bx, (int)regs->cx);
                 goto out;
         case VM86_PLUS_INSTALL_CHECK:
                 /*
@@ -261,14 +261,14 @@ asmlinkage int sys_vm86(struct pt_regs regs)
         ret = -EPERM;
         if (tsk->thread.saved_sp0)
                 goto out;
-        v86 = (struct vm86plus_struct __user *)regs.cx;
+        v86 = (struct vm86plus_struct __user *)regs->cx;
         tmp = copy_vm86_regs_from_user(&info.regs, &v86->regs,
                                        offsetof(struct kernel_vm86_struct, regs32) -
                                        sizeof(info.regs));
         ret = -EFAULT;
         if (tmp)
                 goto out;
-        info.regs32 = &regs;
+        info.regs32 = regs;
         info.vm86plus.is_vm86pus = 1;
         tsk->thread.vm86_info = (struct vm86_struct __user *)v86;
         do_sys_vm86(&info, tsk);
@@ -323,7 +323,7 @@ static void do_sys_vm86(struct kernel_vm86_struct *info, struct task_struct *tsk
         info->regs32->ax = 0;
         tsk->thread.saved_sp0 = tsk->thread.sp0;
         tsk->thread.saved_fs = info->regs32->fs;
-        savesegment(gs, tsk->thread.saved_gs);
+        tsk->thread.saved_gs = get_user_gs(info->regs32);
 
         tss = &per_cpu(init_tss, get_cpu());
         tsk->thread.sp0 = (unsigned long) &info->VM86_TSS_ESP0;
diff --git a/arch/x86/kernel/vmi_32.c b/arch/x86/kernel/vmi_32.c
index bef58b4982db..2cc4a90e2cb3 100644
--- a/arch/x86/kernel/vmi_32.c
+++ b/arch/x86/kernel/vmi_32.c
@@ -680,10 +680,11 @@ static inline int __init activate_vmi(void)
         para_fill(pv_mmu_ops.write_cr2, SetCR2);
         para_fill(pv_mmu_ops.write_cr3, SetCR3);
         para_fill(pv_cpu_ops.write_cr4, SetCR4);
-        para_fill(pv_irq_ops.save_fl, GetInterruptMask);
-        para_fill(pv_irq_ops.restore_fl, SetInterruptMask);
-        para_fill(pv_irq_ops.irq_disable, DisableInterrupts);
-        para_fill(pv_irq_ops.irq_enable, EnableInterrupts);
+
+        para_fill(pv_irq_ops.save_fl.func, GetInterruptMask);
+        para_fill(pv_irq_ops.restore_fl.func, SetInterruptMask);
+        para_fill(pv_irq_ops.irq_disable.func, DisableInterrupts);
+        para_fill(pv_irq_ops.irq_enable.func, EnableInterrupts);
 
         para_fill(pv_cpu_ops.wbinvd, WBINVD);
         para_fill(pv_cpu_ops.read_tsc, RDTSC);
@@ -797,8 +798,8 @@ static inline int __init activate_vmi(void)
 #endif
 
 #ifdef CONFIG_X86_LOCAL_APIC
-       para_fill(apic_ops->read, APICRead);
-       para_fill(apic_ops->write, APICWrite);
+       para_fill(apic->read, APICRead);
+       para_fill(apic->write, APICWrite);
 #endif
 
         /*
diff --git a/arch/x86/kernel/vmiclock_32.c b/arch/x86/kernel/vmiclock_32.c
index e5b088fffa40..33a788d5879c 100644
--- a/arch/x86/kernel/vmiclock_32.c
+++ b/arch/x86/kernel/vmiclock_32.c
@@ -28,7 +28,6 @@
 
 #include <asm/vmi.h>
 #include <asm/vmi_time.h>
-#include <asm/arch_hooks.h>
 #include <asm/apicdef.h>
 #include <asm/apic.h>
 #include <asm/timer.h>
@@ -256,7 +255,7 @@ void __devinit vmi_time_bsp_init(void)
          */
         clockevents_notify(CLOCK_EVT_NOTIFY_SUSPEND, NULL);
         local_irq_disable();
-#ifdef CONFIG_X86_SMP
+#ifdef CONFIG_SMP
         /*
          * XXX handle_percpu_irq only defined for SMP; we need to switch over
          * to using it, since this is a local interrupt, which each CPU must
@@ -288,8 +287,7 @@ static struct clocksource clocksource_vmi;
 static cycle_t read_real_cycles(void)
 {
         cycle_t ret = (cycle_t)vmi_timer_ops.get_cycle_counter(VMI_CYCLES_REAL);
-        return ret >= clocksource_vmi.cycle_last ?
-                ret : clocksource_vmi.cycle_last;
+        return max(ret, clocksource_vmi.cycle_last);
 }
 
 static struct clocksource clocksource_vmi = {
diff --git a/arch/x86/kernel/vmlinux_32.lds.S b/arch/x86/kernel/vmlinux_32.lds.S
index 82c67559dde7..0d860963f268 100644
--- a/arch/x86/kernel/vmlinux_32.lds.S
+++ b/arch/x86/kernel/vmlinux_32.lds.S
@@ -12,7 +12,7 @@
 
 #include <asm-generic/vmlinux.lds.h>
 #include <asm/thread_info.h>
-#include <asm/page.h>
+#include <asm/page_types.h>
 #include <asm/cache.h>
 #include <asm/boot.h>
 
@@ -178,14 +178,7 @@ SECTIONS
         __initramfs_end = .;
   }
 #endif
-  . = ALIGN(PAGE_SIZE);
-  .data.percpu  : AT(ADDR(.data.percpu) - LOAD_OFFSET) {
-        __per_cpu_start = .;
-        *(.data.percpu.page_aligned)
-        *(.data.percpu)
-        *(.data.percpu.shared_aligned)
-        __per_cpu_end = .;
-  }
+  PERCPU(PAGE_SIZE)
   . = ALIGN(PAGE_SIZE);
   /* freed after init ends here */
 
diff --git a/arch/x86/kernel/vmlinux_64.lds.S b/arch/x86/kernel/vmlinux_64.lds.S
index 1a614c0e6bef..fbfced6f6800 100644
--- a/arch/x86/kernel/vmlinux_64.lds.S
+++ b/arch/x86/kernel/vmlinux_64.lds.S
@@ -5,7 +5,8 @@
 #define LOAD_OFFSET __START_KERNEL_map
 
 #include <asm-generic/vmlinux.lds.h>
-#include <asm/page.h>
+#include <asm/asm-offsets.h>
+#include <asm/page_types.h>
 
 #undef i386     /* in case the preprocessor is a 32bit one */
 
@@ -13,12 +14,15 @@ OUTPUT_FORMAT("elf64-x86-64", "elf64-x86-64", "elf64-x86-64")
 OUTPUT_ARCH(i386:x86-64)
 ENTRY(phys_startup_64)
 jiffies_64 = jiffies;
-_proxy_pda = 1;
 PHDRS {
         text PT_LOAD FLAGS(5);  /* R_E */
         data PT_LOAD FLAGS(7);  /* RWE */
         user PT_LOAD FLAGS(7);  /* RWE */
         data.init PT_LOAD FLAGS(7);     /* RWE */
+#ifdef CONFIG_SMP
+        percpu PT_LOAD FLAGS(7);        /* RWE */
+#endif
+        data.init2 PT_LOAD FLAGS(7);    /* RWE */
         note PT_NOTE FLAGS(0);  /* ___ */
 }
 SECTIONS
@@ -208,14 +212,28 @@ SECTIONS
   __initramfs_end = .;
 #endif
 
+#ifdef CONFIG_SMP
+  /*
+   * percpu offsets are zero-based on SMP.  PERCPU_VADDR() changes the
+   * output PHDR, so the next output section - __data_nosave - should
+   * start another section data.init2.  Also, pda should be at the head of
+   * percpu area.  Preallocate it and define the percpu offset symbol
+   * so that it can be accessed as a percpu variable.
+   */
+  . = ALIGN(PAGE_SIZE);
+  PERCPU_VADDR(0, :percpu)
+#else
   PERCPU(PAGE_SIZE)
+#endif
 
   . = ALIGN(PAGE_SIZE);
   __init_end = .;
 
   . = ALIGN(PAGE_SIZE);
   __nosave_begin = .;
-  .data_nosave : AT(ADDR(.data_nosave) - LOAD_OFFSET) { *(.data.nosave) }
+  .data_nosave : AT(ADDR(.data_nosave) - LOAD_OFFSET) {
+      *(.data.nosave)
+  } :data.init2 /* use another section data.init2, see PERCPU_VADDR() above */
   . = ALIGN(PAGE_SIZE);
   __nosave_end = .;
 
@@ -239,8 +257,21 @@ SECTIONS
   DWARF_DEBUG
 }
 
+ /*
+  * Per-cpu symbols which need to be offset from __per_cpu_load
+  * for the boot processor.
+  */
+#define INIT_PER_CPU(x) init_per_cpu__##x = per_cpu__##x + __per_cpu_load
+INIT_PER_CPU(gdt_page);
+INIT_PER_CPU(irq_stack_union);
+
 /*
  * Build-time check on the image size:
  */
 ASSERT((_end - _text <= KERNEL_IMAGE_SIZE),
         "kernel image bigger than KERNEL_IMAGE_SIZE")
+
+#ifdef CONFIG_SMP
+ASSERT((per_cpu__irq_stack_union == 0),
+        "irq_stack_union is not at start of per-cpu area");
+#endif
diff --git a/arch/x86/kernel/vsmp_64.c b/arch/x86/kernel/vsmp_64.c
index a688f3bfaec2..74de562812cc 100644
--- a/arch/x86/kernel/vsmp_64.c
+++ b/arch/x86/kernel/vsmp_64.c
@@ -22,7 +22,7 @@
 #include <asm/paravirt.h>
 #include <asm/setup.h>
 
-#if defined CONFIG_PCI && defined CONFIG_PARAVIRT
+#ifdef CONFIG_PARAVIRT
 /*
  * Interrupt control on vSMPowered systems:
  * ~AC is a shadow of IF.  If IF is 'on' AC should be 'off'
@@ -37,6 +37,7 @@ static unsigned long vsmp_save_fl(void)
                 flags &= ~X86_EFLAGS_IF;
         return flags;
 }
+PV_CALLEE_SAVE_REGS_THUNK(vsmp_save_fl);
 
 static void vsmp_restore_fl(unsigned long flags)
 {
@@ -46,6 +47,7 @@ static void vsmp_restore_fl(unsigned long flags)
                 flags |= X86_EFLAGS_AC;
         native_restore_fl(flags);
 }
+PV_CALLEE_SAVE_REGS_THUNK(vsmp_restore_fl);
 
 static void vsmp_irq_disable(void)
 {
@@ -53,6 +55,7 @@ static void vsmp_irq_disable(void)
 
         native_restore_fl((flags & ~X86_EFLAGS_IF) | X86_EFLAGS_AC);
 }
+PV_CALLEE_SAVE_REGS_THUNK(vsmp_irq_disable);
 
 static void vsmp_irq_enable(void)
 {
@@ -60,6 +63,7 @@ static void vsmp_irq_enable(void)
 
         native_restore_fl((flags | X86_EFLAGS_IF) & (~X86_EFLAGS_AC));
 }
+PV_CALLEE_SAVE_REGS_THUNK(vsmp_irq_enable);
 
 static unsigned __init_or_module vsmp_patch(u8 type, u16 clobbers, void *ibuf,
                                   unsigned long addr, unsigned len)
@@ -90,10 +94,10 @@ static void __init set_vsmp_pv_ops(void)
                cap, ctl);
         if (cap & ctl & (1 << 4)) {
                 /* Setup irq ops and turn on vSMP  IRQ fastpath handling */
-                pv_irq_ops.irq_disable = vsmp_irq_disable;
-                pv_irq_ops.irq_enable  = vsmp_irq_enable;
-                pv_irq_ops.save_fl  = vsmp_save_fl;
-                pv_irq_ops.restore_fl  = vsmp_restore_fl;
+                pv_irq_ops.irq_disable = PV_CALLEE_SAVE(vsmp_irq_disable);
+                pv_irq_ops.irq_enable  = PV_CALLEE_SAVE(vsmp_irq_enable);
+                pv_irq_ops.save_fl  = PV_CALLEE_SAVE(vsmp_save_fl);
+                pv_irq_ops.restore_fl  = PV_CALLEE_SAVE(vsmp_restore_fl);
                 pv_init_ops.patch = vsmp_patch;
 
                 ctl &= ~(1 << 4);
@@ -110,7 +114,6 @@ static void __init set_vsmp_pv_ops(void)
 }
 #endif
 
-#ifdef CONFIG_PCI
 static int is_vsmp = -1;
 
 static void __init detect_vsmp_box(void)
@@ -135,15 +138,6 @@ int is_vsmp_box(void)
                 return 0;
         }
 }
-#else
-static void __init detect_vsmp_box(void)
-{
-}
-int is_vsmp_box(void)
-{
-        return 0;
-}
-#endif
 
 void __init vsmp_init(void)
 {
diff --git a/arch/x86/kernel/x8664_ksyms_64.c b/arch/x86/kernel/x8664_ksyms_64.c
index 695e426aa354..3909e3ba5ce3 100644
--- a/arch/x86/kernel/x8664_ksyms_64.c
+++ b/arch/x86/kernel/x8664_ksyms_64.c
@@ -58,5 +58,3 @@ EXPORT_SYMBOL(__memcpy);
 EXPORT_SYMBOL(empty_zero_page);
 EXPORT_SYMBOL(init_level4_pgt);
 EXPORT_SYMBOL(load_gs_index);
-
-EXPORT_SYMBOL(_proxy_pda);
diff --git a/arch/x86/kvm/Kconfig b/arch/x86/kvm/Kconfig
index b81125f0bdee..0a303c3ed11f 100644
--- a/arch/x86/kvm/Kconfig
+++ b/arch/x86/kvm/Kconfig
@@ -4,6 +4,10 @@
 config HAVE_KVM
        bool
 
+config HAVE_KVM_IRQCHIP
+       bool
+       default y
+
 menuconfig VIRTUALIZATION
         bool "Virtualization"
         depends on HAVE_KVM || X86
diff --git a/arch/x86/kvm/i8254.c b/arch/x86/kvm/i8254.c
index 72bd275a9b5c..c13bb92d3157 100644
--- a/arch/x86/kvm/i8254.c
+++ b/arch/x86/kvm/i8254.c
@@ -201,6 +201,9 @@ static int __pit_timer_fn(struct kvm_kpit_state *ps)
         if (!atomic_inc_and_test(&pt->pending))
                 set_bit(KVM_REQ_PENDING_TIMER, &vcpu0->requests);
 
+        if (!pt->reinject)
+                atomic_set(&pt->pending, 1);
+
         if (vcpu0 && waitqueue_active(&vcpu0->wq))
                 wake_up_interruptible(&vcpu0->wq);
 
@@ -536,6 +539,16 @@ void kvm_pit_reset(struct kvm_pit *pit)
         pit->pit_state.irq_ack = 1;
 }
 
+static void pit_mask_notifer(struct kvm_irq_mask_notifier *kimn, bool mask)
+{
+        struct kvm_pit *pit = container_of(kimn, struct kvm_pit, mask_notifier);
+
+        if (!mask) {
+                atomic_set(&pit->pit_state.pit_timer.pending, 0);
+                pit->pit_state.irq_ack = 1;
+        }
+}
+
 struct kvm_pit *kvm_create_pit(struct kvm *kvm)
 {
         struct kvm_pit *pit;
@@ -545,9 +558,7 @@ struct kvm_pit *kvm_create_pit(struct kvm *kvm)
         if (!pit)
                 return NULL;
 
-        mutex_lock(&kvm->lock);
         pit->irq_source_id = kvm_request_irq_source_id(kvm);
-        mutex_unlock(&kvm->lock);
         if (pit->irq_source_id < 0) {
                 kfree(pit);
                 return NULL;
@@ -580,10 +591,14 @@ struct kvm_pit *kvm_create_pit(struct kvm *kvm)
         pit_state->irq_ack_notifier.gsi = 0;
         pit_state->irq_ack_notifier.irq_acked = kvm_pit_ack_irq;
         kvm_register_irq_ack_notifier(kvm, &pit_state->irq_ack_notifier);
+        pit_state->pit_timer.reinject = true;
         mutex_unlock(&pit->pit_state.lock);
 
         kvm_pit_reset(pit);
 
+        pit->mask_notifier.func = pit_mask_notifer;
+        kvm_register_irq_mask_notifier(kvm, 0, &pit->mask_notifier);
+
         return pit;
 }
 
@@ -592,6 +607,8 @@ void kvm_free_pit(struct kvm *kvm)
         struct hrtimer *timer;
 
         if (kvm->arch.vpit) {
+                kvm_unregister_irq_mask_notifier(kvm, 0,
+                                               &kvm->arch.vpit->mask_notifier);
                 mutex_lock(&kvm->arch.vpit->pit_state.lock);
                 timer = &kvm->arch.vpit->pit_state.pit_timer.timer;
                 hrtimer_cancel(timer);
diff --git a/arch/x86/kvm/i8254.h b/arch/x86/kvm/i8254.h
index 4178022b97aa..6acbe4b505d5 100644
--- a/arch/x86/kvm/i8254.h
+++ b/arch/x86/kvm/i8254.h
@@ -9,6 +9,7 @@ struct kvm_kpit_timer {
         s64 period; /* unit: ns */
         s64 scheduled;
         atomic_t pending;
+        bool reinject;
 };
 
 struct kvm_kpit_channel_state {
@@ -45,6 +46,7 @@ struct kvm_pit {
         struct kvm *kvm;
         struct kvm_kpit_state pit_state;
         int irq_source_id;
+        struct kvm_irq_mask_notifier mask_notifier;
 };
 
 #define KVM_PIT_BASE_ADDRESS        0x40
diff --git a/arch/x86/kvm/i8259.c b/arch/x86/kvm/i8259.c
index 179dcb0103fd..1ccb50c74f18 100644
--- a/arch/x86/kvm/i8259.c
+++ b/arch/x86/kvm/i8259.c
@@ -32,11 +32,13 @@
 #include <linux/kvm_host.h>
 
 static void pic_lock(struct kvm_pic *s)
+        __acquires(&s->lock)
 {
         spin_lock(&s->lock);
 }
 
 static void pic_unlock(struct kvm_pic *s)
+        __releases(&s->lock)
 {
         struct kvm *kvm = s->kvm;
         unsigned acks = s->pending_acks;
@@ -49,7 +51,8 @@ static void pic_unlock(struct kvm_pic *s)
         spin_unlock(&s->lock);
 
         while (acks) {
-                kvm_notify_acked_irq(kvm, __ffs(acks));
+                kvm_notify_acked_irq(kvm, SELECT_PIC(__ffs(acks)),
+                                     __ffs(acks));
                 acks &= acks - 1;
         }
 
@@ -76,12 +79,13 @@ void kvm_pic_clear_isr_ack(struct kvm *kvm)
 /*
  * set irq level. If an edge is detected, then the IRR is set to 1
  */
-static inline void pic_set_irq1(struct kvm_kpic_state *s, int irq, int level)
+static inline int pic_set_irq1(struct kvm_kpic_state *s, int irq, int level)
 {
-        int mask;
+        int mask, ret = 1;
         mask = 1 << irq;
         if (s->elcr & mask)     /* level triggered */
                 if (level) {
+                        ret = !(s->irr & mask);
                         s->irr |= mask;
                         s->last_irr |= mask;
                 } else {
@@ -90,11 +94,15 @@ static inline void pic_set_irq1(struct kvm_kpic_state *s, int irq, int level)
                 }
         else    /* edge triggered */
                 if (level) {
-                        if ((s->last_irr & mask) == 0)
+                        if ((s->last_irr & mask) == 0) {
+                                ret = !(s->irr & mask);
                                 s->irr |= mask;
+                        }
                         s->last_irr |= mask;
                 } else
                         s->last_irr &= ~mask;
+
+        return (s->imr & mask) ? -1 : ret;
 }
 
 /*
@@ -171,16 +179,19 @@ void kvm_pic_update_irq(struct kvm_pic *s)
         pic_unlock(s);
 }
 
-void kvm_pic_set_irq(void *opaque, int irq, int level)
+int kvm_pic_set_irq(void *opaque, int irq, int level)
 {
         struct kvm_pic *s = opaque;
+        int ret = -1;
 
         pic_lock(s);
         if (irq >= 0 && irq < PIC_NUM_PINS) {
-                pic_set_irq1(&s->pics[irq >> 3], irq & 7, level);
+                ret = pic_set_irq1(&s->pics[irq >> 3], irq & 7, level);
                 pic_update_irq(s);
         }
         pic_unlock(s);
+
+        return ret;
 }
 
 /*
@@ -232,7 +243,7 @@ int kvm_pic_read_irq(struct kvm *kvm)
         }
         pic_update_irq(s);
         pic_unlock(s);
-        kvm_notify_acked_irq(kvm, irq);
+        kvm_notify_acked_irq(kvm, SELECT_PIC(irq), irq);
 
         return intno;
 }
diff --git a/arch/x86/kvm/irq.h b/arch/x86/kvm/irq.h
index 82579ee538d0..9f593188129e 100644
--- a/arch/x86/kvm/irq.h
+++ b/arch/x86/kvm/irq.h
@@ -32,6 +32,8 @@
 #include "lapic.h"
 
 #define PIC_NUM_PINS 16
+#define SELECT_PIC(irq) \
+        ((irq) < 8 ? KVM_IRQCHIP_PIC_MASTER : KVM_IRQCHIP_PIC_SLAVE)
 
 struct kvm;
 struct kvm_vcpu;
diff --git a/arch/x86/kvm/kvm_svm.h b/arch/x86/kvm/kvm_svm.h
index 8e5ee99551f6..ed66e4c078dc 100644
--- a/arch/x86/kvm/kvm_svm.h
+++ b/arch/x86/kvm/kvm_svm.h
@@ -18,7 +18,6 @@ static const u32 host_save_user_msrs[] = {
 };
 
 #define NR_HOST_SAVE_USER_MSRS ARRAY_SIZE(host_save_user_msrs)
-#define NUM_DB_REGS 4
 
 struct kvm_vcpu;
 
@@ -29,18 +28,23 @@ struct vcpu_svm {
         struct svm_cpu_data *svm_data;
         uint64_t asid_generation;
 
-        unsigned long db_regs[NUM_DB_REGS];
-
         u64 next_rip;
 
         u64 host_user_msrs[NR_HOST_SAVE_USER_MSRS];
         u64 host_gs_base;
         unsigned long host_cr2;
-        unsigned long host_db_regs[NUM_DB_REGS];
-        unsigned long host_dr6;
-        unsigned long host_dr7;
 
         u32 *msrpm;
+        struct vmcb *hsave;
+        u64 hsave_msr;
+
+        u64 nested_vmcb;
+
+        /* These are the merged vectors */
+        u32 *nested_msrpm;
+
+        /* gpa pointers to the real vectors */
+        u64 nested_vmcb_msrpm;
 };
 
 #endif
diff --git a/arch/x86/kvm/mmu.c b/arch/x86/kvm/mmu.c
index 2d4477c71473..2a36f7f7c4c7 100644
--- a/arch/x86/kvm/mmu.c
+++ b/arch/x86/kvm/mmu.c
@@ -145,11 +145,20 @@ struct kvm_rmap_desc {
         struct kvm_rmap_desc *more;
 };
 
-struct kvm_shadow_walk {
-        int (*entry)(struct kvm_shadow_walk *walk, struct kvm_vcpu *vcpu,
-                     u64 addr, u64 *spte, int level);
+struct kvm_shadow_walk_iterator {
+        u64 addr;
+        hpa_t shadow_addr;
+        int level;
+        u64 *sptep;
+        unsigned index;
 };
 
+#define for_each_shadow_entry(_vcpu, _addr, _walker)    \
+        for (shadow_walk_init(&(_walker), _vcpu, _addr);        \
+             shadow_walk_okay(&(_walker));                      \
+             shadow_walk_next(&(_walker)))
+
+
 struct kvm_unsync_walk {
         int (*entry) (struct kvm_mmu_page *sp, struct kvm_unsync_walk *walk);
 };
@@ -343,7 +352,6 @@ static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
 
         BUG_ON(!mc->nobjs);
         p = mc->objects[--mc->nobjs];
-        memset(p, 0, size);
         return p;
 }
 
@@ -794,10 +802,8 @@ static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
         set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
         list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
         INIT_LIST_HEAD(&sp->oos_link);
-        ASSERT(is_empty_shadow_page(sp->spt));
         bitmap_zero(sp->slot_bitmap, KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS);
         sp->multimapped = 0;
-        sp->global = 1;
         sp->parent_pte = parent_pte;
         --vcpu->kvm->arch.n_free_mmu_pages;
         return sp;
@@ -983,8 +989,8 @@ struct kvm_mmu_pages {
              idx < 512;                                 \
              idx = find_next_bit(bitmap, 512, idx+1))
 
-int mmu_pages_add(struct kvm_mmu_pages *pvec, struct kvm_mmu_page *sp,
-                   int idx)
+static int mmu_pages_add(struct kvm_mmu_pages *pvec, struct kvm_mmu_page *sp,
+                         int idx)
 {
         int i;
 
@@ -1059,7 +1065,7 @@ static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm, gfn_t gfn)
         index = kvm_page_table_hashfn(gfn);
         bucket = &kvm->arch.mmu_page_hash[index];
         hlist_for_each_entry(sp, node, bucket, hash_link)
-                if (sp->gfn == gfn && !sp->role.metaphysical
+                if (sp->gfn == gfn && !sp->role.direct
                     && !sp->role.invalid) {
                         pgprintk("%s: found role %x\n",
                                  __func__, sp->role.word);
@@ -1115,8 +1121,9 @@ struct mmu_page_path {
                         i < pvec.nr && ({ sp = pvec.page[i].sp; 1;});   \
                         i = mmu_pages_next(&pvec, &parents, i))
 
-int mmu_pages_next(struct kvm_mmu_pages *pvec, struct mmu_page_path *parents,
-                   int i)
+static int mmu_pages_next(struct kvm_mmu_pages *pvec,
+                          struct mmu_page_path *parents,
+                          int i)
 {
         int n;
 
@@ -1135,7 +1142,7 @@ int mmu_pages_next(struct kvm_mmu_pages *pvec, struct mmu_page_path *parents,
         return n;
 }
 
-void mmu_pages_clear_parents(struct mmu_page_path *parents)
+static void mmu_pages_clear_parents(struct mmu_page_path *parents)
 {
         struct kvm_mmu_page *sp;
         unsigned int level = 0;
@@ -1193,7 +1200,7 @@ static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
                                              gfn_t gfn,
                                              gva_t gaddr,
                                              unsigned level,
-                                             int metaphysical,
+                                             int direct,
                                              unsigned access,
                                              u64 *parent_pte)
 {
@@ -1204,10 +1211,9 @@ static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
         struct kvm_mmu_page *sp;
         struct hlist_node *node, *tmp;
 
-        role.word = 0;
-        role.glevels = vcpu->arch.mmu.root_level;
+        role = vcpu->arch.mmu.base_role;
         role.level = level;
-        role.metaphysical = metaphysical;
+        role.direct = direct;
         role.access = access;
         if (vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
                 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
@@ -1242,8 +1248,9 @@ static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
         pgprintk("%s: adding gfn %lx role %x\n", __func__, gfn, role.word);
         sp->gfn = gfn;
         sp->role = role;
+        sp->global = role.cr4_pge;
         hlist_add_head(&sp->hash_link, bucket);
-        if (!metaphysical) {
+        if (!direct) {
                 if (rmap_write_protect(vcpu->kvm, gfn))
                         kvm_flush_remote_tlbs(vcpu->kvm);
                 account_shadowed(vcpu->kvm, gfn);
@@ -1255,35 +1262,35 @@ static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
         return sp;
 }
 
-static int walk_shadow(struct kvm_shadow_walk *walker,
-                       struct kvm_vcpu *vcpu, u64 addr)
+static void shadow_walk_init(struct kvm_shadow_walk_iterator *iterator,
+                             struct kvm_vcpu *vcpu, u64 addr)
 {
-        hpa_t shadow_addr;
-        int level;
-        int r;
-        u64 *sptep;
-        unsigned index;
-
-        shadow_addr = vcpu->arch.mmu.root_hpa;
-        level = vcpu->arch.mmu.shadow_root_level;
-        if (level == PT32E_ROOT_LEVEL) {
-                shadow_addr = vcpu->arch.mmu.pae_root[(addr >> 30) & 3];
-                shadow_addr &= PT64_BASE_ADDR_MASK;
-                if (!shadow_addr)
-                        return 1;
-                --level;
+        iterator->addr = addr;
+        iterator->shadow_addr = vcpu->arch.mmu.root_hpa;
+        iterator->level = vcpu->arch.mmu.shadow_root_level;
+        if (iterator->level == PT32E_ROOT_LEVEL) {
+                iterator->shadow_addr
+                        = vcpu->arch.mmu.pae_root[(addr >> 30) & 3];
+                iterator->shadow_addr &= PT64_BASE_ADDR_MASK;
+                --iterator->level;
+                if (!iterator->shadow_addr)
+                        iterator->level = 0;
         }
+}
 
-        while (level >= PT_PAGE_TABLE_LEVEL) {
-                index = SHADOW_PT_INDEX(addr, level);
-                sptep = ((u64 *)__va(shadow_addr)) + index;
-                r = walker->entry(walker, vcpu, addr, sptep, level);
-                if (r)
-                        return r;
-                shadow_addr = *sptep & PT64_BASE_ADDR_MASK;
-                --level;
-        }
-        return 0;
+static bool shadow_walk_okay(struct kvm_shadow_walk_iterator *iterator)
+{
+        if (iterator->level < PT_PAGE_TABLE_LEVEL)
+                return false;
+        iterator->index = SHADOW_PT_INDEX(iterator->addr, iterator->level);
+        iterator->sptep = ((u64 *)__va(iterator->shadow_addr)) + iterator->index;
+        return true;
+}
+
+static void shadow_walk_next(struct kvm_shadow_walk_iterator *iterator)
+{
+        iterator->shadow_addr = *iterator->sptep & PT64_BASE_ADDR_MASK;
+        --iterator->level;
 }
 
 static void kvm_mmu_page_unlink_children(struct kvm *kvm,
@@ -1388,7 +1395,7 @@ static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp)
         kvm_mmu_page_unlink_children(kvm, sp);
         kvm_mmu_unlink_parents(kvm, sp);
         kvm_flush_remote_tlbs(kvm);
-        if (!sp->role.invalid && !sp->role.metaphysical)
+        if (!sp->role.invalid && !sp->role.direct)
                 unaccount_shadowed(kvm, sp->gfn);
         if (sp->unsync)
                 kvm_unlink_unsync_page(kvm, sp);
@@ -1451,7 +1458,7 @@ static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
         index = kvm_page_table_hashfn(gfn);
         bucket = &kvm->arch.mmu_page_hash[index];
         hlist_for_each_entry_safe(sp, node, n, bucket, hash_link)
-                if (sp->gfn == gfn && !sp->role.metaphysical) {
+                if (sp->gfn == gfn && !sp->role.direct) {
                         pgprintk("%s: gfn %lx role %x\n", __func__, gfn,
                                  sp->role.word);
                         r = 1;
@@ -1463,11 +1470,20 @@ static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
 
 static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
 {
+        unsigned index;
+        struct hlist_head *bucket;
         struct kvm_mmu_page *sp;
+        struct hlist_node *node, *nn;
 
-        while ((sp = kvm_mmu_lookup_page(kvm, gfn)) != NULL) {
-                pgprintk("%s: zap %lx %x\n", __func__, gfn, sp->role.word);
-                kvm_mmu_zap_page(kvm, sp);
+        index = kvm_page_table_hashfn(gfn);
+        bucket = &kvm->arch.mmu_page_hash[index];
+        hlist_for_each_entry_safe(sp, node, nn, bucket, hash_link) {
+                if (sp->gfn == gfn && !sp->role.direct
+                    && !sp->role.invalid) {
+                        pgprintk("%s: zap %lx %x\n",
+                                 __func__, gfn, sp->role.word);
+                        kvm_mmu_zap_page(kvm, sp);
+                }
         }
 }
 
@@ -1622,7 +1638,7 @@ static int kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
         bucket = &vcpu->kvm->arch.mmu_page_hash[index];
         /* don't unsync if pagetable is shadowed with multiple roles */
         hlist_for_each_entry_safe(s, node, n, bucket, hash_link) {
-                if (s->gfn != sp->gfn || s->role.metaphysical)
+                if (s->gfn != sp->gfn || s->role.direct)
                         continue;
                 if (s->role.word != sp->role.word)
                         return 1;
@@ -1669,8 +1685,6 @@ static int set_spte(struct kvm_vcpu *vcpu, u64 *shadow_pte,
         u64 mt_mask = shadow_mt_mask;
         struct kvm_mmu_page *sp = page_header(__pa(shadow_pte));
 
-        if (!(vcpu->arch.cr4 & X86_CR4_PGE))
-                global = 0;
         if (!global && sp->global) {
                 sp->global = 0;
                 if (sp->unsync) {
@@ -1777,12 +1791,8 @@ static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *shadow_pte,
                         pgprintk("hfn old %lx new %lx\n",
                                  spte_to_pfn(*shadow_pte), pfn);
                         rmap_remove(vcpu->kvm, shadow_pte);
-                } else {
-                        if (largepage)
-                                was_rmapped = is_large_pte(*shadow_pte);
-                        else
-                                was_rmapped = 1;
-                }
+                } else
+                        was_rmapped = 1;
         }
         if (set_spte(vcpu, shadow_pte, pte_access, user_fault, write_fault,
                       dirty, largepage, global, gfn, pfn, speculative, true)) {
@@ -1820,67 +1830,42 @@ static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
 {
 }
 
-struct direct_shadow_walk {
-        struct kvm_shadow_walk walker;
-        pfn_t pfn;
-        int write;
-        int largepage;
-        int pt_write;
-};
-
-static int direct_map_entry(struct kvm_shadow_walk *_walk,
-                            struct kvm_vcpu *vcpu,
-                            u64 addr, u64 *sptep, int level)
+static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
+                        int largepage, gfn_t gfn, pfn_t pfn)
 {
-        struct direct_shadow_walk *walk =
-                container_of(_walk, struct direct_shadow_walk, walker);
+        struct kvm_shadow_walk_iterator iterator;
         struct kvm_mmu_page *sp;
+        int pt_write = 0;
         gfn_t pseudo_gfn;
-        gfn_t gfn = addr >> PAGE_SHIFT;
-
-        if (level == PT_PAGE_TABLE_LEVEL
-            || (walk->largepage && level == PT_DIRECTORY_LEVEL)) {
-                mmu_set_spte(vcpu, sptep, ACC_ALL, ACC_ALL,
-                             0, walk->write, 1, &walk->pt_write,
-                             walk->largepage, 0, gfn, walk->pfn, false);
-                ++vcpu->stat.pf_fixed;
-                return 1;
-        }
 
-        if (*sptep == shadow_trap_nonpresent_pte) {
-                pseudo_gfn = (addr & PT64_DIR_BASE_ADDR_MASK) >> PAGE_SHIFT;
-                sp = kvm_mmu_get_page(vcpu, pseudo_gfn, (gva_t)addr, level - 1,
-                                      1, ACC_ALL, sptep);
-                if (!sp) {
-                        pgprintk("nonpaging_map: ENOMEM\n");
-                        kvm_release_pfn_clean(walk->pfn);
-                        return -ENOMEM;
+        for_each_shadow_entry(vcpu, (u64)gfn << PAGE_SHIFT, iterator) {
+                if (iterator.level == PT_PAGE_TABLE_LEVEL
+                    || (largepage && iterator.level == PT_DIRECTORY_LEVEL)) {
+                        mmu_set_spte(vcpu, iterator.sptep, ACC_ALL, ACC_ALL,
+                                     0, write, 1, &pt_write,
+                                     largepage, 0, gfn, pfn, false);
+                        ++vcpu->stat.pf_fixed;
+                        break;
                 }
 
-                set_shadow_pte(sptep,
-                               __pa(sp->spt)
-                               | PT_PRESENT_MASK | PT_WRITABLE_MASK
-                               | shadow_user_mask | shadow_x_mask);
-        }
-        return 0;
-}
+                if (*iterator.sptep == shadow_trap_nonpresent_pte) {
+                        pseudo_gfn = (iterator.addr & PT64_DIR_BASE_ADDR_MASK) >> PAGE_SHIFT;
+                        sp = kvm_mmu_get_page(vcpu, pseudo_gfn, iterator.addr,
+                                              iterator.level - 1,
+                                              1, ACC_ALL, iterator.sptep);
+                        if (!sp) {
+                                pgprintk("nonpaging_map: ENOMEM\n");
+                                kvm_release_pfn_clean(pfn);
+                                return -ENOMEM;
+                        }
 
-static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
-                        int largepage, gfn_t gfn, pfn_t pfn)
-{
-        int r;
-        struct direct_shadow_walk walker = {
-                .walker = { .entry = direct_map_entry, },
-                .pfn = pfn,
-                .largepage = largepage,
-                .write = write,
-                .pt_write = 0,
-        };
-
-        r = walk_shadow(&walker.walker, vcpu, gfn << PAGE_SHIFT);
-        if (r < 0)
-                return r;
-        return walker.pt_write;
+                        set_shadow_pte(iterator.sptep,
+                                       __pa(sp->spt)
+                                       | PT_PRESENT_MASK | PT_WRITABLE_MASK
+                                       | shadow_user_mask | shadow_x_mask);
+                }
+        }
+        return pt_write;
 }
 
 static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn)
@@ -1962,7 +1947,7 @@ static void mmu_alloc_roots(struct kvm_vcpu *vcpu)
         int i;
         gfn_t root_gfn;
         struct kvm_mmu_page *sp;
-        int metaphysical = 0;
+        int direct = 0;
 
         root_gfn = vcpu->arch.cr3 >> PAGE_SHIFT;
 
@@ -1971,18 +1956,18 @@ static void mmu_alloc_roots(struct kvm_vcpu *vcpu)
 
                 ASSERT(!VALID_PAGE(root));
                 if (tdp_enabled)
-                        metaphysical = 1;
+                        direct = 1;
                 sp = kvm_mmu_get_page(vcpu, root_gfn, 0,
-                                      PT64_ROOT_LEVEL, metaphysical,
+                                      PT64_ROOT_LEVEL, direct,
                                       ACC_ALL, NULL);
                 root = __pa(sp->spt);
                 ++sp->root_count;
                 vcpu->arch.mmu.root_hpa = root;
                 return;
         }
-        metaphysical = !is_paging(vcpu);
+        direct = !is_paging(vcpu);
         if (tdp_enabled)
-                metaphysical = 1;
+                direct = 1;
         for (i = 0; i < 4; ++i) {
                 hpa_t root = vcpu->arch.mmu.pae_root[i];
 
@@ -1996,7 +1981,7 @@ static void mmu_alloc_roots(struct kvm_vcpu *vcpu)
                 } else if (vcpu->arch.mmu.root_level == 0)
                         root_gfn = 0;
                 sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
-                                      PT32_ROOT_LEVEL, metaphysical,
+                                      PT32_ROOT_LEVEL, direct,
                                       ACC_ALL, NULL);
                 root = __pa(sp->spt);
                 ++sp->root_count;
@@ -2251,17 +2236,23 @@ static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
 
 static int init_kvm_softmmu(struct kvm_vcpu *vcpu)
 {
+        int r;
+
         ASSERT(vcpu);
         ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
 
         if (!is_paging(vcpu))
-                return nonpaging_init_context(vcpu);
+                r = nonpaging_init_context(vcpu);
         else if (is_long_mode(vcpu))
-                return paging64_init_context(vcpu);
+                r = paging64_init_context(vcpu);
         else if (is_pae(vcpu))
-                return paging32E_init_context(vcpu);
+                r = paging32E_init_context(vcpu);
         else
-                return paging32_init_context(vcpu);
+                r = paging32_init_context(vcpu);
+
+        vcpu->arch.mmu.base_role.glevels = vcpu->arch.mmu.root_level;
+
+        return r;
 }
 
 static int init_kvm_mmu(struct kvm_vcpu *vcpu)
@@ -2492,7 +2483,7 @@ void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
         index = kvm_page_table_hashfn(gfn);
         bucket = &vcpu->kvm->arch.mmu_page_hash[index];
         hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) {
-                if (sp->gfn != gfn || sp->role.metaphysical || sp->role.invalid)
+                if (sp->gfn != gfn || sp->role.direct || sp->role.invalid)
                         continue;
                 pte_size = sp->role.glevels == PT32_ROOT_LEVEL ? 4 : 8;
                 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
@@ -3130,7 +3121,7 @@ static void audit_write_protection(struct kvm_vcpu *vcpu)
         gfn_t gfn;
 
         list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
-                if (sp->role.metaphysical)
+                if (sp->role.direct)
                         continue;
 
                 gfn = unalias_gfn(vcpu->kvm, sp->gfn);
diff --git a/arch/x86/kvm/mmu.h b/arch/x86/kvm/mmu.h
index 258e5d56298e..eaab2145f62b 100644
--- a/arch/x86/kvm/mmu.h
+++ b/arch/x86/kvm/mmu.h
@@ -54,7 +54,7 @@ static inline int kvm_mmu_reload(struct kvm_vcpu *vcpu)
 static inline int is_long_mode(struct kvm_vcpu *vcpu)
 {
 #ifdef CONFIG_X86_64
-        return vcpu->arch.shadow_efer & EFER_LME;
+        return vcpu->arch.shadow_efer & EFER_LMA;
 #else
         return 0;
 #endif
diff --git a/arch/x86/kvm/paging_tmpl.h b/arch/x86/kvm/paging_tmpl.h
index 9fd78b6e17ad..6bd70206c561 100644
--- a/arch/x86/kvm/paging_tmpl.h
+++ b/arch/x86/kvm/paging_tmpl.h
@@ -25,7 +25,6 @@
 #if PTTYPE == 64
         #define pt_element_t u64
         #define guest_walker guest_walker64
-        #define shadow_walker shadow_walker64
         #define FNAME(name) paging##64_##name
         #define PT_BASE_ADDR_MASK PT64_BASE_ADDR_MASK
         #define PT_DIR_BASE_ADDR_MASK PT64_DIR_BASE_ADDR_MASK
@@ -42,7 +41,6 @@
 #elif PTTYPE == 32
         #define pt_element_t u32
         #define guest_walker guest_walker32
-        #define shadow_walker shadow_walker32
         #define FNAME(name) paging##32_##name
         #define PT_BASE_ADDR_MASK PT32_BASE_ADDR_MASK
         #define PT_DIR_BASE_ADDR_MASK PT32_DIR_BASE_ADDR_MASK
@@ -73,18 +71,6 @@ struct guest_walker {
         u32 error_code;
 };
 
-struct shadow_walker {
-        struct kvm_shadow_walk walker;
-        struct guest_walker *guest_walker;
-        int user_fault;
-        int write_fault;
-        int largepage;
-        int *ptwrite;
-        pfn_t pfn;
-        u64 *sptep;
-        gpa_t pte_gpa;
-};
-
 static gfn_t gpte_to_gfn(pt_element_t gpte)
 {
         return (gpte & PT_BASE_ADDR_MASK) >> PAGE_SHIFT;
@@ -283,91 +269,79 @@ static void FNAME(update_pte)(struct kvm_vcpu *vcpu, struct kvm_mmu_page *page,
 /*
  * Fetch a shadow pte for a specific level in the paging hierarchy.
  */
-static int FNAME(shadow_walk_entry)(struct kvm_shadow_walk *_sw,
-                                    struct kvm_vcpu *vcpu, u64 addr,
-                                    u64 *sptep, int level)
+static u64 *FNAME(fetch)(struct kvm_vcpu *vcpu, gva_t addr,
+                         struct guest_walker *gw,
+                         int user_fault, int write_fault, int largepage,
+                         int *ptwrite, pfn_t pfn)
 {
-        struct shadow_walker *sw =
-                container_of(_sw, struct shadow_walker, walker);
-        struct guest_walker *gw = sw->guest_walker;
         unsigned access = gw->pt_access;
         struct kvm_mmu_page *shadow_page;
-        u64 spte;
-        int metaphysical;
+        u64 spte, *sptep;
+        int direct;
         gfn_t table_gfn;
         int r;
+        int level;
         pt_element_t curr_pte;
+        struct kvm_shadow_walk_iterator iterator;
 
-        if (level == PT_PAGE_TABLE_LEVEL
-            || (sw->largepage && level == PT_DIRECTORY_LEVEL)) {
-                mmu_set_spte(vcpu, sptep, access, gw->pte_access & access,
-                             sw->user_fault, sw->write_fault,
-                             gw->ptes[gw->level-1] & PT_DIRTY_MASK,
-                             sw->ptwrite, sw->largepage,
-                             gw->ptes[gw->level-1] & PT_GLOBAL_MASK,
-                             gw->gfn, sw->pfn, false);
-                sw->sptep = sptep;
-                return 1;
-        }
+        if (!is_present_pte(gw->ptes[gw->level - 1]))
+                return NULL;
 
-        if (is_shadow_present_pte(*sptep) && !is_large_pte(*sptep))
-                return 0;
+        for_each_shadow_entry(vcpu, addr, iterator) {
+                level = iterator.level;
+                sptep = iterator.sptep;
+                if (level == PT_PAGE_TABLE_LEVEL
+                    || (largepage && level == PT_DIRECTORY_LEVEL)) {
+                        mmu_set_spte(vcpu, sptep, access,
+                                     gw->pte_access & access,
+                                     user_fault, write_fault,
+                                     gw->ptes[gw->level-1] & PT_DIRTY_MASK,
+                                     ptwrite, largepage,
+                                     gw->ptes[gw->level-1] & PT_GLOBAL_MASK,
+                                     gw->gfn, pfn, false);
+                        break;
+                }
 
-        if (is_large_pte(*sptep)) {
-                set_shadow_pte(sptep, shadow_trap_nonpresent_pte);
-                kvm_flush_remote_tlbs(vcpu->kvm);
-                rmap_remove(vcpu->kvm, sptep);
-        }
+                if (is_shadow_present_pte(*sptep) && !is_large_pte(*sptep))
+                        continue;
 
-        if (level == PT_DIRECTORY_LEVEL && gw->level == PT_DIRECTORY_LEVEL) {
-                metaphysical = 1;
-                if (!is_dirty_pte(gw->ptes[level - 1]))
-                        access &= ~ACC_WRITE_MASK;
-                table_gfn = gpte_to_gfn(gw->ptes[level - 1]);
-        } else {
-                metaphysical = 0;
-                table_gfn = gw->table_gfn[level - 2];
-        }
-        shadow_page = kvm_mmu_get_page(vcpu, table_gfn, (gva_t)addr, level-1,
-                                       metaphysical, access, sptep);
-        if (!metaphysical) {
-                r = kvm_read_guest_atomic(vcpu->kvm, gw->pte_gpa[level - 2],
-                                          &curr_pte, sizeof(curr_pte));
-                if (r || curr_pte != gw->ptes[level - 2]) {
-                        kvm_mmu_put_page(shadow_page, sptep);
-                        kvm_release_pfn_clean(sw->pfn);
-                        sw->sptep = NULL;
-                        return 1;
+                if (is_large_pte(*sptep)) {
+                        rmap_remove(vcpu->kvm, sptep);
+                        set_shadow_pte(sptep, shadow_trap_nonpresent_pte);
+                        kvm_flush_remote_tlbs(vcpu->kvm);
                 }
-        }
 
-        spte = __pa(shadow_page->spt) | PT_PRESENT_MASK | PT_ACCESSED_MASK
-                | PT_WRITABLE_MASK | PT_USER_MASK;
-        *sptep = spte;
-        return 0;
-}
-
-static u64 *FNAME(fetch)(struct kvm_vcpu *vcpu, gva_t addr,
-                         struct guest_walker *guest_walker,
-                         int user_fault, int write_fault, int largepage,
-                         int *ptwrite, pfn_t pfn)
-{
-        struct shadow_walker walker = {
-                .walker = { .entry = FNAME(shadow_walk_entry), },
-                .guest_walker = guest_walker,
-                .user_fault = user_fault,
-                .write_fault = write_fault,
-                .largepage = largepage,
-                .ptwrite = ptwrite,
-                .pfn = pfn,
-        };
-
-        if (!is_present_pte(guest_walker->ptes[guest_walker->level - 1]))
-                return NULL;
+                if (level == PT_DIRECTORY_LEVEL
+                    && gw->level == PT_DIRECTORY_LEVEL) {
+                        direct = 1;
+                        if (!is_dirty_pte(gw->ptes[level - 1]))
+                                access &= ~ACC_WRITE_MASK;
+                        table_gfn = gpte_to_gfn(gw->ptes[level - 1]);
+                } else {
+                        direct = 0;
+                        table_gfn = gw->table_gfn[level - 2];
+                }
+                shadow_page = kvm_mmu_get_page(vcpu, table_gfn, addr, level-1,
+                                               direct, access, sptep);
+                if (!direct) {
+                        r = kvm_read_guest_atomic(vcpu->kvm,
+                                                  gw->pte_gpa[level - 2],
+                                                  &curr_pte, sizeof(curr_pte));
+                        if (r || curr_pte != gw->ptes[level - 2]) {
+                                kvm_mmu_put_page(shadow_page, sptep);
+                                kvm_release_pfn_clean(pfn);
+                                sptep = NULL;
+                                break;
+                        }
+                }
 
-        walk_shadow(&walker.walker, vcpu, addr);
+                spte = __pa(shadow_page->spt)
+                        | PT_PRESENT_MASK | PT_ACCESSED_MASK
+                        | PT_WRITABLE_MASK | PT_USER_MASK;
+                *sptep = spte;
+        }
 
-        return walker.sptep;
+        return sptep;
 }
 
 /*
@@ -465,54 +439,56 @@ out_unlock:
         return 0;
 }
 
-static int FNAME(shadow_invlpg_entry)(struct kvm_shadow_walk *_sw,
-                                      struct kvm_vcpu *vcpu, u64 addr,
-                                      u64 *sptep, int level)
+static void FNAME(invlpg)(struct kvm_vcpu *vcpu, gva_t gva)
 {
-        struct shadow_walker *sw =
-                container_of(_sw, struct shadow_walker, walker);
-
-        /* FIXME: properly handle invlpg on large guest pages */
-        if (level == PT_PAGE_TABLE_LEVEL ||
-            ((level == PT_DIRECTORY_LEVEL) && is_large_pte(*sptep))) {
-                struct kvm_mmu_page *sp = page_header(__pa(sptep));
+        struct kvm_shadow_walk_iterator iterator;
+        pt_element_t gpte;
+        gpa_t pte_gpa = -1;
+        int level;
+        u64 *sptep;
+        int need_flush = 0;
 
-                sw->pte_gpa = (sp->gfn << PAGE_SHIFT);
-                sw->pte_gpa += (sptep - sp->spt) * sizeof(pt_element_t);
+        spin_lock(&vcpu->kvm->mmu_lock);
 
-                if (is_shadow_present_pte(*sptep)) {
-                        rmap_remove(vcpu->kvm, sptep);
-                        if (is_large_pte(*sptep))
-                                --vcpu->kvm->stat.lpages;
+        for_each_shadow_entry(vcpu, gva, iterator) {
+                level = iterator.level;
+                sptep = iterator.sptep;
+
+                /* FIXME: properly handle invlpg on large guest pages */
+                if (level == PT_PAGE_TABLE_LEVEL ||
+                    ((level == PT_DIRECTORY_LEVEL) && is_large_pte(*sptep))) {
+                        struct kvm_mmu_page *sp = page_header(__pa(sptep));
+
+                        pte_gpa = (sp->gfn << PAGE_SHIFT);
+                        pte_gpa += (sptep - sp->spt) * sizeof(pt_element_t);
+
+                        if (is_shadow_present_pte(*sptep)) {
+                                rmap_remove(vcpu->kvm, sptep);
+                                if (is_large_pte(*sptep))
+                                        --vcpu->kvm->stat.lpages;
+                                need_flush = 1;
+                        }
+                        set_shadow_pte(sptep, shadow_trap_nonpresent_pte);
+                        break;
                 }
-                set_shadow_pte(sptep, shadow_trap_nonpresent_pte);
-                return 1;
-        }
-        if (!is_shadow_present_pte(*sptep))
-                return 1;
-        return 0;
-}
 
-static void FNAME(invlpg)(struct kvm_vcpu *vcpu, gva_t gva)
-{
-        pt_element_t gpte;
-        struct shadow_walker walker = {
-                .walker = { .entry = FNAME(shadow_invlpg_entry), },
-                .pte_gpa = -1,
-        };
+                if (!is_shadow_present_pte(*sptep))
+                        break;
+        }
 
-        spin_lock(&vcpu->kvm->mmu_lock);
-        walk_shadow(&walker.walker, vcpu, gva);
+        if (need_flush)
+                kvm_flush_remote_tlbs(vcpu->kvm);
         spin_unlock(&vcpu->kvm->mmu_lock);
-        if (walker.pte_gpa == -1)
+
+        if (pte_gpa == -1)
                 return;
-        if (kvm_read_guest_atomic(vcpu->kvm, walker.pte_gpa, &gpte,
+        if (kvm_read_guest_atomic(vcpu->kvm, pte_gpa, &gpte,
                                   sizeof(pt_element_t)))
                 return;
         if (is_present_pte(gpte) && (gpte & PT_ACCESSED_MASK)) {
                 if (mmu_topup_memory_caches(vcpu))
                         return;
-                kvm_mmu_pte_write(vcpu, walker.pte_gpa, (const u8 *)&gpte,
+                kvm_mmu_pte_write(vcpu, pte_gpa, (const u8 *)&gpte,
                                   sizeof(pt_element_t), 0);
         }
 }
@@ -540,7 +516,7 @@ static void FNAME(prefetch_page)(struct kvm_vcpu *vcpu,
         pt_element_t pt[256 / sizeof(pt_element_t)];
         gpa_t pte_gpa;
 
-        if (sp->role.metaphysical
+        if (sp->role.direct
             || (PTTYPE == 32 && sp->role.level > PT_PAGE_TABLE_LEVEL)) {
                 nonpaging_prefetch_page(vcpu, sp);
                 return;
@@ -619,7 +595,6 @@ static int FNAME(sync_page)(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
 
 #undef pt_element_t
 #undef guest_walker
-#undef shadow_walker
 #undef FNAME
 #undef PT_BASE_ADDR_MASK
 #undef PT_INDEX
diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c
index a9e769e4e251..1821c2078199 100644
--- a/arch/x86/kvm/svm.c
+++ b/arch/x86/kvm/svm.c
@@ -38,9 +38,6 @@ MODULE_LICENSE("GPL");
 #define IOPM_ALLOC_ORDER 2
 #define MSRPM_ALLOC_ORDER 1
 
-#define DR7_GD_MASK (1 << 13)
-#define DR6_BD_MASK (1 << 13)
-
 #define SEG_TYPE_LDT 2
 #define SEG_TYPE_BUSY_TSS16 3
 
@@ -50,6 +47,15 @@ MODULE_LICENSE("GPL");
 
 #define DEBUGCTL_RESERVED_BITS (~(0x3fULL))
 
+/* Turn on to get debugging output*/
+/* #define NESTED_DEBUG */
+
+#ifdef NESTED_DEBUG
+#define nsvm_printk(fmt, args...) printk(KERN_INFO fmt, ## args)
+#else
+#define nsvm_printk(fmt, args...) do {} while(0)
+#endif
+
 /* enable NPT for AMD64 and X86 with PAE */
 #if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE)
 static bool npt_enabled = true;
@@ -60,14 +66,29 @@ static int npt = 1;
 
 module_param(npt, int, S_IRUGO);
 
+static int nested = 0;
+module_param(nested, int, S_IRUGO);
+
 static void kvm_reput_irq(struct vcpu_svm *svm);
 static void svm_flush_tlb(struct kvm_vcpu *vcpu);
 
+static int nested_svm_exit_handled(struct vcpu_svm *svm, bool kvm_override);
+static int nested_svm_vmexit(struct vcpu_svm *svm);
+static int nested_svm_vmsave(struct vcpu_svm *svm, void *nested_vmcb,
+                             void *arg2, void *opaque);
+static int nested_svm_check_exception(struct vcpu_svm *svm, unsigned nr,
+                                      bool has_error_code, u32 error_code);
+
 static inline struct vcpu_svm *to_svm(struct kvm_vcpu *vcpu)
 {
         return container_of(vcpu, struct vcpu_svm, vcpu);
 }
 
+static inline bool is_nested(struct vcpu_svm *svm)
+{
+        return svm->nested_vmcb;
+}
+
 static unsigned long iopm_base;
 
 struct kvm_ldttss_desc {
@@ -157,32 +178,6 @@ static inline void kvm_write_cr2(unsigned long val)
         asm volatile ("mov %0, %%cr2" :: "r" (val));
 }
 
-static inline unsigned long read_dr6(void)
-{
-        unsigned long dr6;
-
-        asm volatile ("mov %%dr6, %0" : "=r" (dr6));
-        return dr6;
-}
-
-static inline void write_dr6(unsigned long val)
-{
-        asm volatile ("mov %0, %%dr6" :: "r" (val));
-}
-
-static inline unsigned long read_dr7(void)
-{
-        unsigned long dr7;
-
-        asm volatile ("mov %%dr7, %0" : "=r" (dr7));
-        return dr7;
-}
-
-static inline void write_dr7(unsigned long val)
-{
-        asm volatile ("mov %0, %%dr7" :: "r" (val));
-}
-
 static inline void force_new_asid(struct kvm_vcpu *vcpu)
 {
         to_svm(vcpu)->asid_generation--;
@@ -198,7 +193,7 @@ static void svm_set_efer(struct kvm_vcpu *vcpu, u64 efer)
         if (!npt_enabled && !(efer & EFER_LMA))
                 efer &= ~EFER_LME;
 
-        to_svm(vcpu)->vmcb->save.efer = efer | MSR_EFER_SVME_MASK;
+        to_svm(vcpu)->vmcb->save.efer = efer | EFER_SVME;
         vcpu->arch.shadow_efer = efer;
 }
 
@@ -207,6 +202,11 @@ static void svm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr,
 {
         struct vcpu_svm *svm = to_svm(vcpu);
 
+        /* If we are within a nested VM we'd better #VMEXIT and let the
+           guest handle the exception */
+        if (nested_svm_check_exception(svm, nr, has_error_code, error_code))
+                return;
+
         svm->vmcb->control.event_inj = nr
                 | SVM_EVTINJ_VALID
                 | (has_error_code ? SVM_EVTINJ_VALID_ERR : 0)
@@ -242,7 +242,7 @@ static void skip_emulated_instruction(struct kvm_vcpu *vcpu)
         kvm_rip_write(vcpu, svm->next_rip);
         svm->vmcb->control.int_state &= ~SVM_INTERRUPT_SHADOW_MASK;
 
-        vcpu->arch.interrupt_window_open = 1;
+        vcpu->arch.interrupt_window_open = (svm->vcpu.arch.hflags & HF_GIF_MASK);
 }
 
 static int has_svm(void)
@@ -250,7 +250,7 @@ static int has_svm(void)
         const char *msg;
 
         if (!cpu_has_svm(&msg)) {
-                printk(KERN_INFO "has_svn: %s\n", msg);
+                printk(KERN_INFO "has_svm: %s\n", msg);
                 return 0;
         }
 
@@ -292,7 +292,7 @@ static void svm_hardware_enable(void *garbage)
         svm_data->tss_desc = (struct kvm_ldttss_desc *)(gdt + GDT_ENTRY_TSS);
 
         rdmsrl(MSR_EFER, efer);
-        wrmsrl(MSR_EFER, efer | MSR_EFER_SVME_MASK);
+        wrmsrl(MSR_EFER, efer | EFER_SVME);
 
         wrmsrl(MSR_VM_HSAVE_PA,
                page_to_pfn(svm_data->save_area) << PAGE_SHIFT);
@@ -417,6 +417,14 @@ static __init int svm_hardware_setup(void)
         if (boot_cpu_has(X86_FEATURE_NX))
                 kvm_enable_efer_bits(EFER_NX);
 
+        if (boot_cpu_has(X86_FEATURE_FXSR_OPT))
+                kvm_enable_efer_bits(EFER_FFXSR);
+
+        if (nested) {
+                printk(KERN_INFO "kvm: Nested Virtualization enabled\n");
+                kvm_enable_efer_bits(EFER_SVME);
+        }
+
         for_each_online_cpu(cpu) {
                 r = svm_cpu_init(cpu);
                 if (r)
@@ -559,7 +567,7 @@ static void init_vmcb(struct vcpu_svm *svm)
         init_sys_seg(&save->ldtr, SEG_TYPE_LDT);
         init_sys_seg(&save->tr, SEG_TYPE_BUSY_TSS16);
 
-        save->efer = MSR_EFER_SVME_MASK;
+        save->efer = EFER_SVME;
         save->dr6 = 0xffff0ff0;
         save->dr7 = 0x400;
         save->rflags = 2;
@@ -591,6 +599,9 @@ static void init_vmcb(struct vcpu_svm *svm)
                 save->cr4 = 0;
         }
         force_new_asid(&svm->vcpu);
+
+        svm->nested_vmcb = 0;
+        svm->vcpu.arch.hflags = HF_GIF_MASK;
 }
 
 static int svm_vcpu_reset(struct kvm_vcpu *vcpu)
@@ -615,6 +626,8 @@ static struct kvm_vcpu *svm_create_vcpu(struct kvm *kvm, unsigned int id)
         struct vcpu_svm *svm;
         struct page *page;
         struct page *msrpm_pages;
+        struct page *hsave_page;
+        struct page *nested_msrpm_pages;
         int err;
 
         svm = kmem_cache_zalloc(kvm_vcpu_cache, GFP_KERNEL);
@@ -637,14 +650,25 @@ static struct kvm_vcpu *svm_create_vcpu(struct kvm *kvm, unsigned int id)
         msrpm_pages = alloc_pages(GFP_KERNEL, MSRPM_ALLOC_ORDER);
         if (!msrpm_pages)
                 goto uninit;
+
+        nested_msrpm_pages = alloc_pages(GFP_KERNEL, MSRPM_ALLOC_ORDER);
+        if (!nested_msrpm_pages)
+                goto uninit;
+
         svm->msrpm = page_address(msrpm_pages);
         svm_vcpu_init_msrpm(svm->msrpm);
 
+        hsave_page = alloc_page(GFP_KERNEL);
+        if (!hsave_page)
+                goto uninit;
+        svm->hsave = page_address(hsave_page);
+
+        svm->nested_msrpm = page_address(nested_msrpm_pages);
+
         svm->vmcb = page_address(page);
         clear_page(svm->vmcb);
         svm->vmcb_pa = page_to_pfn(page) << PAGE_SHIFT;
         svm->asid_generation = 0;
-        memset(svm->db_regs, 0, sizeof(svm->db_regs));
         init_vmcb(svm);
 
         fx_init(&svm->vcpu);
@@ -669,6 +693,8 @@ static void svm_free_vcpu(struct kvm_vcpu *vcpu)
 
         __free_page(pfn_to_page(svm->vmcb_pa >> PAGE_SHIFT));
         __free_pages(virt_to_page(svm->msrpm), MSRPM_ALLOC_ORDER);
+        __free_page(virt_to_page(svm->hsave));
+        __free_pages(virt_to_page(svm->nested_msrpm), MSRPM_ALLOC_ORDER);
         kvm_vcpu_uninit(vcpu);
         kmem_cache_free(kvm_vcpu_cache, svm);
 }
@@ -718,6 +744,16 @@ static void svm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
         to_svm(vcpu)->vmcb->save.rflags = rflags;
 }
 
+static void svm_set_vintr(struct vcpu_svm *svm)
+{
+        svm->vmcb->control.intercept |= 1ULL << INTERCEPT_VINTR;
+}
+
+static void svm_clear_vintr(struct vcpu_svm *svm)
+{
+        svm->vmcb->control.intercept &= ~(1ULL << INTERCEPT_VINTR);
+}
+
 static struct vmcb_seg *svm_seg(struct kvm_vcpu *vcpu, int seg)
 {
         struct vmcb_save_area *save = &to_svm(vcpu)->vmcb->save;
@@ -760,20 +796,37 @@ static void svm_get_segment(struct kvm_vcpu *vcpu,
         var->db = (s->attrib >> SVM_SELECTOR_DB_SHIFT) & 1;
         var->g = (s->attrib >> SVM_SELECTOR_G_SHIFT) & 1;
 
-        /*
-         * SVM always stores 0 for the 'G' bit in the CS selector in
-         * the VMCB on a VMEXIT. This hurts cross-vendor migration:
-         * Intel's VMENTRY has a check on the 'G' bit.
-         */
-        if (seg == VCPU_SREG_CS)
+        switch (seg) {
+        case VCPU_SREG_CS:
+                /*
+                 * SVM always stores 0 for the 'G' bit in the CS selector in
+                 * the VMCB on a VMEXIT. This hurts cross-vendor migration:
+                 * Intel's VMENTRY has a check on the 'G' bit.
+                 */
                 var->g = s->limit > 0xfffff;
-
-        /*
-         * Work around a bug where the busy flag in the tr selector
-         * isn't exposed
-         */
-        if (seg == VCPU_SREG_TR)
+                break;
+        case VCPU_SREG_TR:
+                /*
+                 * Work around a bug where the busy flag in the tr selector
+                 * isn't exposed
+                 */
                 var->type |= 0x2;
+                break;
+        case VCPU_SREG_DS:
+        case VCPU_SREG_ES:
+        case VCPU_SREG_FS:
+        case VCPU_SREG_GS:
+                /*
+                 * The accessed bit must always be set in the segment
+                 * descriptor cache, although it can be cleared in the
+                 * descriptor, the cached bit always remains at 1. Since
+                 * Intel has a check on this, set it here to support
+                 * cross-vendor migration.
+                 */
+                if (!var->unusable)
+                        var->type |= 0x1;
+                break;
+        }
 
         var->unusable = !var->present;
 }
@@ -905,9 +958,37 @@ static void svm_set_segment(struct kvm_vcpu *vcpu,
 
 }
 
-static int svm_guest_debug(struct kvm_vcpu *vcpu, struct kvm_debug_guest *dbg)
+static int svm_guest_debug(struct kvm_vcpu *vcpu, struct kvm_guest_debug *dbg)
 {
-        return -EOPNOTSUPP;
+        int old_debug = vcpu->guest_debug;
+        struct vcpu_svm *svm = to_svm(vcpu);
+
+        vcpu->guest_debug = dbg->control;
+
+        svm->vmcb->control.intercept_exceptions &=
+                ~((1 << DB_VECTOR) | (1 << BP_VECTOR));
+        if (vcpu->guest_debug & KVM_GUESTDBG_ENABLE) {
+                if (vcpu->guest_debug &
+                    (KVM_GUESTDBG_SINGLESTEP | KVM_GUESTDBG_USE_HW_BP))
+                        svm->vmcb->control.intercept_exceptions |=
+                                1 << DB_VECTOR;
+                if (vcpu->guest_debug & KVM_GUESTDBG_USE_SW_BP)
+                        svm->vmcb->control.intercept_exceptions |=
+                                1 << BP_VECTOR;
+        } else
+                vcpu->guest_debug = 0;
+
+        if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
+                svm->vmcb->save.dr7 = dbg->arch.debugreg[7];
+        else
+                svm->vmcb->save.dr7 = vcpu->arch.dr7;
+
+        if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
+                svm->vmcb->save.rflags |= X86_EFLAGS_TF | X86_EFLAGS_RF;
+        else if (old_debug & KVM_GUESTDBG_SINGLESTEP)
+                svm->vmcb->save.rflags &= ~(X86_EFLAGS_TF | X86_EFLAGS_RF);
+
+        return 0;
 }
 
 static int svm_get_irq(struct kvm_vcpu *vcpu)
@@ -949,7 +1030,29 @@ static void new_asid(struct vcpu_svm *svm, struct svm_cpu_data *svm_data)
 
 static unsigned long svm_get_dr(struct kvm_vcpu *vcpu, int dr)
 {
-        unsigned long val = to_svm(vcpu)->db_regs[dr];
+        struct vcpu_svm *svm = to_svm(vcpu);
+        unsigned long val;
+
+        switch (dr) {
+        case 0 ... 3:
+                val = vcpu->arch.db[dr];
+                break;
+        case 6:
+                if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
+                        val = vcpu->arch.dr6;
+                else
+                        val = svm->vmcb->save.dr6;
+                break;
+        case 7:
+                if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
+                        val = vcpu->arch.dr7;
+                else
+                        val = svm->vmcb->save.dr7;
+                break;
+        default:
+                val = 0;
+        }
+
         KVMTRACE_2D(DR_READ, vcpu, (u32)dr, (u32)val, handler);
         return val;
 }
@@ -959,33 +1062,40 @@ static void svm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long value,
 {
         struct vcpu_svm *svm = to_svm(vcpu);
 
-        *exception = 0;
+        KVMTRACE_2D(DR_WRITE, vcpu, (u32)dr, (u32)value, handler);
 
-        if (svm->vmcb->save.dr7 & DR7_GD_MASK) {
-                svm->vmcb->save.dr7 &= ~DR7_GD_MASK;
-                svm->vmcb->save.dr6 |= DR6_BD_MASK;
-                *exception = DB_VECTOR;
-                return;
-        }
+        *exception = 0;
 
         switch (dr) {
         case 0 ... 3:
-                svm->db_regs[dr] = value;
+                vcpu->arch.db[dr] = value;
+                if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
+                        vcpu->arch.eff_db[dr] = value;
                 return;
         case 4 ... 5:
-                if (vcpu->arch.cr4 & X86_CR4_DE) {
+                if (vcpu->arch.cr4 & X86_CR4_DE)
                         *exception = UD_VECTOR;
+                return;
+        case 6:
+                if (value & 0xffffffff00000000ULL) {
+                        *exception = GP_VECTOR;
                         return;
                 }
-        case 7: {
-                if (value & ~((1ULL << 32) - 1)) {
+                vcpu->arch.dr6 = (value & DR6_VOLATILE) | DR6_FIXED_1;
+                return;
+        case 7:
+                if (value & 0xffffffff00000000ULL) {
                         *exception = GP_VECTOR;
                         return;
                 }
-                svm->vmcb->save.dr7 = value;
+                vcpu->arch.dr7 = (value & DR7_VOLATILE) | DR7_FIXED_1;
+                if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
+                        svm->vmcb->save.dr7 = vcpu->arch.dr7;
+                        vcpu->arch.switch_db_regs = (value & DR7_BP_EN_MASK);
+                }
                 return;
-        }
         default:
+                /* FIXME: Possible case? */
                 printk(KERN_DEBUG "%s: unexpected dr %u\n",
                        __func__, dr);
                 *exception = UD_VECTOR;
@@ -1031,6 +1141,27 @@ static int pf_interception(struct vcpu_svm *svm, struct kvm_run *kvm_run)
         return kvm_mmu_page_fault(&svm->vcpu, fault_address, error_code);
 }
 
+static int db_interception(struct vcpu_svm *svm, struct kvm_run *kvm_run)
+{
+        if (!(svm->vcpu.guest_debug &
+              (KVM_GUESTDBG_SINGLESTEP | KVM_GUESTDBG_USE_HW_BP))) {
+                kvm_queue_exception(&svm->vcpu, DB_VECTOR);
+                return 1;
+        }
+        kvm_run->exit_reason = KVM_EXIT_DEBUG;
+        kvm_run->debug.arch.pc = svm->vmcb->save.cs.base + svm->vmcb->save.rip;
+        kvm_run->debug.arch.exception = DB_VECTOR;
+        return 0;
+}
+
+static int bp_interception(struct vcpu_svm *svm, struct kvm_run *kvm_run)
+{
+        kvm_run->exit_reason = KVM_EXIT_DEBUG;
+        kvm_run->debug.arch.pc = svm->vmcb->save.cs.base + svm->vmcb->save.rip;
+        kvm_run->debug.arch.exception = BP_VECTOR;
+        return 0;
+}
+
 static int ud_interception(struct vcpu_svm *svm, struct kvm_run *kvm_run)
 {
         int er;
@@ -1080,7 +1211,7 @@ static int shutdown_interception(struct vcpu_svm *svm, struct kvm_run *kvm_run)
 static int io_interception(struct vcpu_svm *svm, struct kvm_run *kvm_run)
 {
         u32 io_info = svm->vmcb->control.exit_info_1; /* address size bug? */
-        int size, down, in, string, rep;
+        int size, in, string;
         unsigned port;
 
         ++svm->vcpu.stat.io_exits;
@@ -1099,8 +1230,6 @@ static int io_interception(struct vcpu_svm *svm, struct kvm_run *kvm_run)
         in = (io_info & SVM_IOIO_TYPE_MASK) != 0;
         port = io_info >> 16;
         size = (io_info & SVM_IOIO_SIZE_MASK) >> SVM_IOIO_SIZE_SHIFT;
-        rep = (io_info & SVM_IOIO_REP_MASK) != 0;
-        down = (svm->vmcb->save.rflags & X86_EFLAGS_DF) != 0;
 
         skip_emulated_instruction(&svm->vcpu);
         return kvm_emulate_pio(&svm->vcpu, kvm_run, in, size, port);
@@ -1139,6 +1268,567 @@ static int vmmcall_interception(struct vcpu_svm *svm, struct kvm_run *kvm_run)
         return 1;
 }
 
+static int nested_svm_check_permissions(struct vcpu_svm *svm)
+{
+        if (!(svm->vcpu.arch.shadow_efer & EFER_SVME)
+            || !is_paging(&svm->vcpu)) {
+                kvm_queue_exception(&svm->vcpu, UD_VECTOR);
+                return 1;
+        }
+
+        if (svm->vmcb->save.cpl) {
+                kvm_inject_gp(&svm->vcpu, 0);
+                return 1;
+        }
+
+       return 0;
+}
+
+static int nested_svm_check_exception(struct vcpu_svm *svm, unsigned nr,
+                                      bool has_error_code, u32 error_code)
+{
+        if (is_nested(svm)) {
+                svm->vmcb->control.exit_code = SVM_EXIT_EXCP_BASE + nr;
+                svm->vmcb->control.exit_code_hi = 0;
+                svm->vmcb->control.exit_info_1 = error_code;
+                svm->vmcb->control.exit_info_2 = svm->vcpu.arch.cr2;
+                if (nested_svm_exit_handled(svm, false)) {
+                        nsvm_printk("VMexit -> EXCP 0x%x\n", nr);
+
+                        nested_svm_vmexit(svm);
+                        return 1;
+                }
+        }
+
+        return 0;
+}
+
+static inline int nested_svm_intr(struct vcpu_svm *svm)
+{
+        if (is_nested(svm)) {
+                if (!(svm->vcpu.arch.hflags & HF_VINTR_MASK))
+                        return 0;
+
+                if (!(svm->vcpu.arch.hflags & HF_HIF_MASK))
+                        return 0;
+
+                svm->vmcb->control.exit_code = SVM_EXIT_INTR;
+
+                if (nested_svm_exit_handled(svm, false)) {
+                        nsvm_printk("VMexit -> INTR\n");
+                        nested_svm_vmexit(svm);
+                        return 1;
+                }
+        }
+
+        return 0;
+}
+
+static struct page *nested_svm_get_page(struct vcpu_svm *svm, u64 gpa)
+{
+        struct page *page;
+
+        down_read(&current->mm->mmap_sem);
+        page = gfn_to_page(svm->vcpu.kvm, gpa >> PAGE_SHIFT);
+        up_read(&current->mm->mmap_sem);
+
+        if (is_error_page(page)) {
+                printk(KERN_INFO "%s: could not find page at 0x%llx\n",
+                       __func__, gpa);
+                kvm_release_page_clean(page);
+                kvm_inject_gp(&svm->vcpu, 0);
+                return NULL;
+        }
+        return page;
+}
+
+static int nested_svm_do(struct vcpu_svm *svm,
+                         u64 arg1_gpa, u64 arg2_gpa, void *opaque,
+                         int (*handler)(struct vcpu_svm *svm,
+                                        void *arg1,
+                                        void *arg2,
+                                        void *opaque))
+{
+        struct page *arg1_page;
+        struct page *arg2_page = NULL;
+        void *arg1;
+        void *arg2 = NULL;
+        int retval;
+
+        arg1_page = nested_svm_get_page(svm, arg1_gpa);
+        if(arg1_page == NULL)
+                return 1;
+
+        if (arg2_gpa) {
+                arg2_page = nested_svm_get_page(svm, arg2_gpa);
+                if(arg2_page == NULL) {
+                        kvm_release_page_clean(arg1_page);
+                        return 1;
+                }
+        }
+
+        arg1 = kmap_atomic(arg1_page, KM_USER0);
+        if (arg2_gpa)
+                arg2 = kmap_atomic(arg2_page, KM_USER1);
+
+        retval = handler(svm, arg1, arg2, opaque);
+
+        kunmap_atomic(arg1, KM_USER0);
+        if (arg2_gpa)
+                kunmap_atomic(arg2, KM_USER1);
+
+        kvm_release_page_dirty(arg1_page);
+        if (arg2_gpa)
+                kvm_release_page_dirty(arg2_page);
+
+        return retval;
+}
+
+static int nested_svm_exit_handled_real(struct vcpu_svm *svm,
+                                        void *arg1,
+                                        void *arg2,
+                                        void *opaque)
+{
+        struct vmcb *nested_vmcb = (struct vmcb *)arg1;
+        bool kvm_overrides = *(bool *)opaque;
+        u32 exit_code = svm->vmcb->control.exit_code;
+
+        if (kvm_overrides) {
+                switch (exit_code) {
+                case SVM_EXIT_INTR:
+                case SVM_EXIT_NMI:
+                        return 0;
+                /* For now we are always handling NPFs when using them */
+                case SVM_EXIT_NPF:
+                        if (npt_enabled)
+                                return 0;
+                        break;
+                /* When we're shadowing, trap PFs */
+                case SVM_EXIT_EXCP_BASE + PF_VECTOR:
+                        if (!npt_enabled)
+                                return 0;
+                        break;
+                default:
+                        break;
+                }
+        }
+
+        switch (exit_code) {
+        case SVM_EXIT_READ_CR0 ... SVM_EXIT_READ_CR8: {
+                u32 cr_bits = 1 << (exit_code - SVM_EXIT_READ_CR0);
+                if (nested_vmcb->control.intercept_cr_read & cr_bits)
+                        return 1;
+                break;
+        }
+        case SVM_EXIT_WRITE_CR0 ... SVM_EXIT_WRITE_CR8: {
+                u32 cr_bits = 1 << (exit_code - SVM_EXIT_WRITE_CR0);
+                if (nested_vmcb->control.intercept_cr_write & cr_bits)
+                        return 1;
+                break;
+        }
+        case SVM_EXIT_READ_DR0 ... SVM_EXIT_READ_DR7: {
+                u32 dr_bits = 1 << (exit_code - SVM_EXIT_READ_DR0);
+                if (nested_vmcb->control.intercept_dr_read & dr_bits)
+                        return 1;
+                break;
+        }
+        case SVM_EXIT_WRITE_DR0 ... SVM_EXIT_WRITE_DR7: {
+                u32 dr_bits = 1 << (exit_code - SVM_EXIT_WRITE_DR0);
+                if (nested_vmcb->control.intercept_dr_write & dr_bits)
+                        return 1;
+                break;
+        }
+        case SVM_EXIT_EXCP_BASE ... SVM_EXIT_EXCP_BASE + 0x1f: {
+                u32 excp_bits = 1 << (exit_code - SVM_EXIT_EXCP_BASE);
+                if (nested_vmcb->control.intercept_exceptions & excp_bits)
+                        return 1;
+                break;
+        }
+        default: {
+                u64 exit_bits = 1ULL << (exit_code - SVM_EXIT_INTR);
+                nsvm_printk("exit code: 0x%x\n", exit_code);
+                if (nested_vmcb->control.intercept & exit_bits)
+                        return 1;
+        }
+        }
+
+        return 0;
+}
+
+static int nested_svm_exit_handled_msr(struct vcpu_svm *svm,
+                                       void *arg1, void *arg2,
+                                       void *opaque)
+{
+        struct vmcb *nested_vmcb = (struct vmcb *)arg1;
+        u8 *msrpm = (u8 *)arg2;
+        u32 t0, t1;
+        u32 msr = svm->vcpu.arch.regs[VCPU_REGS_RCX];
+        u32 param = svm->vmcb->control.exit_info_1 & 1;
+
+        if (!(nested_vmcb->control.intercept & (1ULL << INTERCEPT_MSR_PROT)))
+                return 0;
+
+        switch(msr) {
+        case 0 ... 0x1fff:
+                t0 = (msr * 2) % 8;
+                t1 = msr / 8;
+                break;
+        case 0xc0000000 ... 0xc0001fff:
+                t0 = (8192 + msr - 0xc0000000) * 2;
+                t1 = (t0 / 8);
+                t0 %= 8;
+                break;
+        case 0xc0010000 ... 0xc0011fff:
+                t0 = (16384 + msr - 0xc0010000) * 2;
+                t1 = (t0 / 8);
+                t0 %= 8;
+                break;
+        default:
+                return 1;
+                break;
+        }
+        if (msrpm[t1] & ((1 << param) << t0))
+                return 1;
+
+        return 0;
+}
+
+static int nested_svm_exit_handled(struct vcpu_svm *svm, bool kvm_override)
+{
+        bool k = kvm_override;
+
+        switch (svm->vmcb->control.exit_code) {
+        case SVM_EXIT_MSR:
+                return nested_svm_do(svm, svm->nested_vmcb,
+                                     svm->nested_vmcb_msrpm, NULL,
+                                     nested_svm_exit_handled_msr);
+        default: break;
+        }
+
+        return nested_svm_do(svm, svm->nested_vmcb, 0, &k,
+                             nested_svm_exit_handled_real);
+}
+
+static int nested_svm_vmexit_real(struct vcpu_svm *svm, void *arg1,
+                                  void *arg2, void *opaque)
+{
+        struct vmcb *nested_vmcb = (struct vmcb *)arg1;
+        struct vmcb *hsave = svm->hsave;
+        u64 nested_save[] = { nested_vmcb->save.cr0,
+                              nested_vmcb->save.cr3,
+                              nested_vmcb->save.cr4,
+                              nested_vmcb->save.efer,
+                              nested_vmcb->control.intercept_cr_read,
+                              nested_vmcb->control.intercept_cr_write,
+                              nested_vmcb->control.intercept_dr_read,
+                              nested_vmcb->control.intercept_dr_write,
+                              nested_vmcb->control.intercept_exceptions,
+                              nested_vmcb->control.intercept,
+                              nested_vmcb->control.msrpm_base_pa,
+                              nested_vmcb->control.iopm_base_pa,
+                              nested_vmcb->control.tsc_offset };
+
+        /* Give the current vmcb to the guest */
+        memcpy(nested_vmcb, svm->vmcb, sizeof(struct vmcb));
+        nested_vmcb->save.cr0 = nested_save[0];
+        if (!npt_enabled)
+                nested_vmcb->save.cr3 = nested_save[1];
+        nested_vmcb->save.cr4 = nested_save[2];
+        nested_vmcb->save.efer = nested_save[3];
+        nested_vmcb->control.intercept_cr_read = nested_save[4];
+        nested_vmcb->control.intercept_cr_write = nested_save[5];
+        nested_vmcb->control.intercept_dr_read = nested_save[6];
+        nested_vmcb->control.intercept_dr_write = nested_save[7];
+        nested_vmcb->control.intercept_exceptions = nested_save[8];
+        nested_vmcb->control.intercept = nested_save[9];
+        nested_vmcb->control.msrpm_base_pa = nested_save[10];
+        nested_vmcb->control.iopm_base_pa = nested_save[11];
+        nested_vmcb->control.tsc_offset = nested_save[12];
+
+        /* We always set V_INTR_MASKING and remember the old value in hflags */
+        if (!(svm->vcpu.arch.hflags & HF_VINTR_MASK))
+                nested_vmcb->control.int_ctl &= ~V_INTR_MASKING_MASK;
+
+        if ((nested_vmcb->control.int_ctl & V_IRQ_MASK) &&
+            (nested_vmcb->control.int_vector)) {
+                nsvm_printk("WARNING: IRQ 0x%x still enabled on #VMEXIT\n",
+                                nested_vmcb->control.int_vector);
+        }
+
+        /* Restore the original control entries */
+        svm->vmcb->control = hsave->control;
+
+        /* Kill any pending exceptions */
+        if (svm->vcpu.arch.exception.pending == true)
+                nsvm_printk("WARNING: Pending Exception\n");
+        svm->vcpu.arch.exception.pending = false;
+
+        /* Restore selected save entries */
+        svm->vmcb->save.es = hsave->save.es;
+        svm->vmcb->save.cs = hsave->save.cs;
+        svm->vmcb->save.ss = hsave->save.ss;
+        svm->vmcb->save.ds = hsave->save.ds;
+        svm->vmcb->save.gdtr = hsave->save.gdtr;
+        svm->vmcb->save.idtr = hsave->save.idtr;
+        svm->vmcb->save.rflags = hsave->save.rflags;
+        svm_set_efer(&svm->vcpu, hsave->save.efer);
+        svm_set_cr0(&svm->vcpu, hsave->save.cr0 | X86_CR0_PE);
+        svm_set_cr4(&svm->vcpu, hsave->save.cr4);
+        if (npt_enabled) {
+                svm->vmcb->save.cr3 = hsave->save.cr3;
+                svm->vcpu.arch.cr3 = hsave->save.cr3;
+        } else {
+                kvm_set_cr3(&svm->vcpu, hsave->save.cr3);
+        }
+        kvm_register_write(&svm->vcpu, VCPU_REGS_RAX, hsave->save.rax);
+        kvm_register_write(&svm->vcpu, VCPU_REGS_RSP, hsave->save.rsp);
+        kvm_register_write(&svm->vcpu, VCPU_REGS_RIP, hsave->save.rip);
+        svm->vmcb->save.dr7 = 0;
+        svm->vmcb->save.cpl = 0;
+        svm->vmcb->control.exit_int_info = 0;
+
+        svm->vcpu.arch.hflags &= ~HF_GIF_MASK;
+        /* Exit nested SVM mode */
+        svm->nested_vmcb = 0;
+
+        return 0;
+}
+
+static int nested_svm_vmexit(struct vcpu_svm *svm)
+{
+        nsvm_printk("VMexit\n");
+        if (nested_svm_do(svm, svm->nested_vmcb, 0,
+                          NULL, nested_svm_vmexit_real))
+                return 1;
+
+        kvm_mmu_reset_context(&svm->vcpu);
+        kvm_mmu_load(&svm->vcpu);
+
+        return 0;
+}
+
+static int nested_svm_vmrun_msrpm(struct vcpu_svm *svm, void *arg1,
+                                  void *arg2, void *opaque)
+{
+        int i;
+        u32 *nested_msrpm = (u32*)arg1;
+        for (i=0; i< PAGE_SIZE * (1 << MSRPM_ALLOC_ORDER) / 4; i++)
+                svm->nested_msrpm[i] = svm->msrpm[i] | nested_msrpm[i];
+        svm->vmcb->control.msrpm_base_pa = __pa(svm->nested_msrpm);
+
+        return 0;
+}
+
+static int nested_svm_vmrun(struct vcpu_svm *svm, void *arg1,
+                            void *arg2, void *opaque)
+{
+        struct vmcb *nested_vmcb = (struct vmcb *)arg1;
+        struct vmcb *hsave = svm->hsave;
+
+        /* nested_vmcb is our indicator if nested SVM is activated */
+        svm->nested_vmcb = svm->vmcb->save.rax;
+
+        /* Clear internal status */
+        svm->vcpu.arch.exception.pending = false;
+
+        /* Save the old vmcb, so we don't need to pick what we save, but
+           can restore everything when a VMEXIT occurs */
+        memcpy(hsave, svm->vmcb, sizeof(struct vmcb));
+        /* We need to remember the original CR3 in the SPT case */
+        if (!npt_enabled)
+                hsave->save.cr3 = svm->vcpu.arch.cr3;
+        hsave->save.cr4 = svm->vcpu.arch.cr4;
+        hsave->save.rip = svm->next_rip;
+
+        if (svm->vmcb->save.rflags & X86_EFLAGS_IF)
+                svm->vcpu.arch.hflags |= HF_HIF_MASK;
+        else
+                svm->vcpu.arch.hflags &= ~HF_HIF_MASK;
+
+        /* Load the nested guest state */
+        svm->vmcb->save.es = nested_vmcb->save.es;
+        svm->vmcb->save.cs = nested_vmcb->save.cs;
+        svm->vmcb->save.ss = nested_vmcb->save.ss;
+        svm->vmcb->save.ds = nested_vmcb->save.ds;
+        svm->vmcb->save.gdtr = nested_vmcb->save.gdtr;
+        svm->vmcb->save.idtr = nested_vmcb->save.idtr;
+        svm->vmcb->save.rflags = nested_vmcb->save.rflags;
+        svm_set_efer(&svm->vcpu, nested_vmcb->save.efer);
+        svm_set_cr0(&svm->vcpu, nested_vmcb->save.cr0);
+        svm_set_cr4(&svm->vcpu, nested_vmcb->save.cr4);
+        if (npt_enabled) {
+                svm->vmcb->save.cr3 = nested_vmcb->save.cr3;
+                svm->vcpu.arch.cr3 = nested_vmcb->save.cr3;
+        } else {
+                kvm_set_cr3(&svm->vcpu, nested_vmcb->save.cr3);
+                kvm_mmu_reset_context(&svm->vcpu);
+        }
+        svm->vmcb->save.cr2 = nested_vmcb->save.cr2;
+        kvm_register_write(&svm->vcpu, VCPU_REGS_RAX, nested_vmcb->save.rax);
+        kvm_register_write(&svm->vcpu, VCPU_REGS_RSP, nested_vmcb->save.rsp);
+        kvm_register_write(&svm->vcpu, VCPU_REGS_RIP, nested_vmcb->save.rip);
+        /* In case we don't even reach vcpu_run, the fields are not updated */
+        svm->vmcb->save.rax = nested_vmcb->save.rax;
+        svm->vmcb->save.rsp = nested_vmcb->save.rsp;
+        svm->vmcb->save.rip = nested_vmcb->save.rip;
+        svm->vmcb->save.dr7 = nested_vmcb->save.dr7;
+        svm->vmcb->save.dr6 = nested_vmcb->save.dr6;
+        svm->vmcb->save.cpl = nested_vmcb->save.cpl;
+
+        /* We don't want a nested guest to be more powerful than the guest,
+           so all intercepts are ORed */
+        svm->vmcb->control.intercept_cr_read |=
+                nested_vmcb->control.intercept_cr_read;
+        svm->vmcb->control.intercept_cr_write |=
+                nested_vmcb->control.intercept_cr_write;
+        svm->vmcb->control.intercept_dr_read |=
+                nested_vmcb->control.intercept_dr_read;
+        svm->vmcb->control.intercept_dr_write |=
+                nested_vmcb->control.intercept_dr_write;
+        svm->vmcb->control.intercept_exceptions |=
+                nested_vmcb->control.intercept_exceptions;
+
+        svm->vmcb->control.intercept |= nested_vmcb->control.intercept;
+
+        svm->nested_vmcb_msrpm = nested_vmcb->control.msrpm_base_pa;
+
+        force_new_asid(&svm->vcpu);
+        svm->vmcb->control.exit_int_info = nested_vmcb->control.exit_int_info;
+        svm->vmcb->control.exit_int_info_err = nested_vmcb->control.exit_int_info_err;
+        svm->vmcb->control.int_ctl = nested_vmcb->control.int_ctl | V_INTR_MASKING_MASK;
+        if (nested_vmcb->control.int_ctl & V_IRQ_MASK) {
+                nsvm_printk("nSVM Injecting Interrupt: 0x%x\n",
+                                nested_vmcb->control.int_ctl);
+        }
+        if (nested_vmcb->control.int_ctl & V_INTR_MASKING_MASK)
+                svm->vcpu.arch.hflags |= HF_VINTR_MASK;
+        else
+                svm->vcpu.arch.hflags &= ~HF_VINTR_MASK;
+
+        nsvm_printk("nSVM exit_int_info: 0x%x | int_state: 0x%x\n",
+                        nested_vmcb->control.exit_int_info,
+                        nested_vmcb->control.int_state);
+
+        svm->vmcb->control.int_vector = nested_vmcb->control.int_vector;
+        svm->vmcb->control.int_state = nested_vmcb->control.int_state;
+        svm->vmcb->control.tsc_offset += nested_vmcb->control.tsc_offset;
+        if (nested_vmcb->control.event_inj & SVM_EVTINJ_VALID)
+                nsvm_printk("Injecting Event: 0x%x\n",
+                                nested_vmcb->control.event_inj);
+        svm->vmcb->control.event_inj = nested_vmcb->control.event_inj;
+        svm->vmcb->control.event_inj_err = nested_vmcb->control.event_inj_err;
+
+        svm->vcpu.arch.hflags |= HF_GIF_MASK;
+
+        return 0;
+}
+
+static int nested_svm_vmloadsave(struct vmcb *from_vmcb, struct vmcb *to_vmcb)
+{
+        to_vmcb->save.fs = from_vmcb->save.fs;
+        to_vmcb->save.gs = from_vmcb->save.gs;
+        to_vmcb->save.tr = from_vmcb->save.tr;
+        to_vmcb->save.ldtr = from_vmcb->save.ldtr;
+        to_vmcb->save.kernel_gs_base = from_vmcb->save.kernel_gs_base;
+        to_vmcb->save.star = from_vmcb->save.star;
+        to_vmcb->save.lstar = from_vmcb->save.lstar;
+        to_vmcb->save.cstar = from_vmcb->save.cstar;
+        to_vmcb->save.sfmask = from_vmcb->save.sfmask;
+        to_vmcb->save.sysenter_cs = from_vmcb->save.sysenter_cs;
+        to_vmcb->save.sysenter_esp = from_vmcb->save.sysenter_esp;
+        to_vmcb->save.sysenter_eip = from_vmcb->save.sysenter_eip;
+
+        return 1;
+}
+
+static int nested_svm_vmload(struct vcpu_svm *svm, void *nested_vmcb,
+                             void *arg2, void *opaque)
+{
+        return nested_svm_vmloadsave((struct vmcb *)nested_vmcb, svm->vmcb);
+}
+
+static int nested_svm_vmsave(struct vcpu_svm *svm, void *nested_vmcb,
+                             void *arg2, void *opaque)
+{
+        return nested_svm_vmloadsave(svm->vmcb, (struct vmcb *)nested_vmcb);
+}
+
+static int vmload_interception(struct vcpu_svm *svm, struct kvm_run *kvm_run)
+{
+        if (nested_svm_check_permissions(svm))
+                return 1;
+
+        svm->next_rip = kvm_rip_read(&svm->vcpu) + 3;
+        skip_emulated_instruction(&svm->vcpu);
+
+        nested_svm_do(svm, svm->vmcb->save.rax, 0, NULL, nested_svm_vmload);
+
+        return 1;
+}
+
+static int vmsave_interception(struct vcpu_svm *svm, struct kvm_run *kvm_run)
+{
+        if (nested_svm_check_permissions(svm))
+                return 1;
+
+        svm->next_rip = kvm_rip_read(&svm->vcpu) + 3;
+        skip_emulated_instruction(&svm->vcpu);
+
+        nested_svm_do(svm, svm->vmcb->save.rax, 0, NULL, nested_svm_vmsave);
+
+        return 1;
+}
+
+static int vmrun_interception(struct vcpu_svm *svm, struct kvm_run *kvm_run)
+{
+        nsvm_printk("VMrun\n");
+        if (nested_svm_check_permissions(svm))
+                return 1;
+
+        svm->next_rip = kvm_rip_read(&svm->vcpu) + 3;
+        skip_emulated_instruction(&svm->vcpu);
+
+        if (nested_svm_do(svm, svm->vmcb->save.rax, 0,
+                          NULL, nested_svm_vmrun))
+                return 1;
+
+        if (nested_svm_do(svm, svm->nested_vmcb_msrpm, 0,
+                      NULL, nested_svm_vmrun_msrpm))
+                return 1;
+
+        return 1;
+}
+
+static int stgi_interception(struct vcpu_svm *svm, struct kvm_run *kvm_run)
+{
+        if (nested_svm_check_permissions(svm))
+                return 1;
+
+        svm->next_rip = kvm_rip_read(&svm->vcpu) + 3;
+        skip_emulated_instruction(&svm->vcpu);
+
+        svm->vcpu.arch.hflags |= HF_GIF_MASK;
+
+        return 1;
+}
+
+static int clgi_interception(struct vcpu_svm *svm, struct kvm_run *kvm_run)
+{
+        if (nested_svm_check_permissions(svm))
+                return 1;
+
+        svm->next_rip = kvm_rip_read(&svm->vcpu) + 3;
+        skip_emulated_instruction(&svm->vcpu);
+
+        svm->vcpu.arch.hflags &= ~HF_GIF_MASK;
+
+        /* After a CLGI no interrupts should come */
+        svm_clear_vintr(svm);
+        svm->vmcb->control.int_ctl &= ~V_IRQ_MASK;
+
+        return 1;
+}
+
 static int invalid_op_interception(struct vcpu_svm *svm,
                                    struct kvm_run *kvm_run)
 {
@@ -1250,6 +1940,15 @@ static int svm_get_msr(struct kvm_vcpu *vcpu, unsigned ecx, u64 *data)
         case MSR_IA32_LASTINTTOIP:
                 *data = svm->vmcb->save.last_excp_to;
                 break;
+        case MSR_VM_HSAVE_PA:
+                *data = svm->hsave_msr;
+                break;
+        case MSR_VM_CR:
+                *data = 0;
+                break;
+        case MSR_IA32_UCODE_REV:
+                *data = 0x01000065;
+                break;
         default:
                 return kvm_get_msr_common(vcpu, ecx, data);
         }
@@ -1344,6 +2043,9 @@ static int svm_set_msr(struct kvm_vcpu *vcpu, unsigned ecx, u64 data)
                 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: 0x%x data 0x%llx\n", ecx, data);
 
                 break;
+        case MSR_VM_HSAVE_PA:
+                svm->hsave_msr = data;
+                break;
         default:
                 return kvm_set_msr_common(vcpu, ecx, data);
         }
@@ -1380,7 +2082,7 @@ static int interrupt_window_interception(struct vcpu_svm *svm,
 {
         KVMTRACE_0D(PEND_INTR, &svm->vcpu, handler);
 
-        svm->vmcb->control.intercept &= ~(1ULL << INTERCEPT_VINTR);
+        svm_clear_vintr(svm);
         svm->vmcb->control.int_ctl &= ~V_IRQ_MASK;
         /*
          * If the user space waits to inject interrupts, exit as soon as
@@ -1417,6 +2119,8 @@ static int (*svm_exit_handlers[])(struct vcpu_svm *svm,
         [SVM_EXIT_WRITE_DR3]                    = emulate_on_interception,
         [SVM_EXIT_WRITE_DR5]                    = emulate_on_interception,
         [SVM_EXIT_WRITE_DR7]                    = emulate_on_interception,
+        [SVM_EXIT_EXCP_BASE + DB_VECTOR]        = db_interception,
+        [SVM_EXIT_EXCP_BASE + BP_VECTOR]        = bp_interception,
         [SVM_EXIT_EXCP_BASE + UD_VECTOR]        = ud_interception,
         [SVM_EXIT_EXCP_BASE + PF_VECTOR]        = pf_interception,
         [SVM_EXIT_EXCP_BASE + NM_VECTOR]        = nm_interception,
@@ -1436,12 +2140,12 @@ static int (*svm_exit_handlers[])(struct vcpu_svm *svm,
         [SVM_EXIT_MSR]                          = msr_interception,
         [SVM_EXIT_TASK_SWITCH]                  = task_switch_interception,
         [SVM_EXIT_SHUTDOWN]                     = shutdown_interception,
-        [SVM_EXIT_VMRUN]                        = invalid_op_interception,
+        [SVM_EXIT_VMRUN]                        = vmrun_interception,
         [SVM_EXIT_VMMCALL]                      = vmmcall_interception,
-        [SVM_EXIT_VMLOAD]                       = invalid_op_interception,
-        [SVM_EXIT_VMSAVE]                       = invalid_op_interception,
-        [SVM_EXIT_STGI]                         = invalid_op_interception,
-        [SVM_EXIT_CLGI]                         = invalid_op_interception,
+        [SVM_EXIT_VMLOAD]                       = vmload_interception,
+        [SVM_EXIT_VMSAVE]                       = vmsave_interception,
+        [SVM_EXIT_STGI]                         = stgi_interception,
+        [SVM_EXIT_CLGI]                         = clgi_interception,
         [SVM_EXIT_SKINIT]                       = invalid_op_interception,
         [SVM_EXIT_WBINVD]                       = emulate_on_interception,
         [SVM_EXIT_MONITOR]                      = invalid_op_interception,
@@ -1457,6 +2161,17 @@ static int handle_exit(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
         KVMTRACE_3D(VMEXIT, vcpu, exit_code, (u32)svm->vmcb->save.rip,
                     (u32)((u64)svm->vmcb->save.rip >> 32), entryexit);
 
+        if (is_nested(svm)) {
+                nsvm_printk("nested handle_exit: 0x%x | 0x%lx | 0x%lx | 0x%lx\n",
+                            exit_code, svm->vmcb->control.exit_info_1,
+                            svm->vmcb->control.exit_info_2, svm->vmcb->save.rip);
+                if (nested_svm_exit_handled(svm, true)) {
+                        nested_svm_vmexit(svm);
+                        nsvm_printk("-> #VMEXIT\n");
+                        return 1;
+                }
+        }
+
         if (npt_enabled) {
                 int mmu_reload = 0;
                 if ((vcpu->arch.cr0 ^ svm->vmcb->save.cr0) & X86_CR0_PG) {
@@ -1544,6 +2259,8 @@ static void svm_set_irq(struct kvm_vcpu *vcpu, int irq)
 {
         struct vcpu_svm *svm = to_svm(vcpu);
 
+        nested_svm_intr(svm);
+
         svm_inject_irq(svm, irq);
 }
 
@@ -1589,11 +2306,17 @@ static void svm_intr_assist(struct kvm_vcpu *vcpu)
         if (!kvm_cpu_has_interrupt(vcpu))
                 goto out;
 
+        if (nested_svm_intr(svm))
+                goto out;
+
+        if (!(svm->vcpu.arch.hflags & HF_GIF_MASK))
+                goto out;
+
         if (!(vmcb->save.rflags & X86_EFLAGS_IF) ||
             (vmcb->control.int_state & SVM_INTERRUPT_SHADOW_MASK) ||
             (vmcb->control.event_inj & SVM_EVTINJ_VALID)) {
                 /* unable to deliver irq, set pending irq */
-                vmcb->control.intercept |= (1ULL << INTERCEPT_VINTR);
+                svm_set_vintr(svm);
                 svm_inject_irq(svm, 0x0);
                 goto out;
         }
@@ -1615,7 +2338,8 @@ static void kvm_reput_irq(struct vcpu_svm *svm)
         }
 
         svm->vcpu.arch.interrupt_window_open =
-                !(control->int_state & SVM_INTERRUPT_SHADOW_MASK);
+                !(control->int_state & SVM_INTERRUPT_SHADOW_MASK) &&
+                 (svm->vcpu.arch.hflags & HF_GIF_MASK);
 }
 
 static void svm_do_inject_vector(struct vcpu_svm *svm)
@@ -1637,9 +2361,13 @@ static void do_interrupt_requests(struct kvm_vcpu *vcpu,
         struct vcpu_svm *svm = to_svm(vcpu);
         struct vmcb_control_area *control = &svm->vmcb->control;
 
+        if (nested_svm_intr(svm))
+                return;
+
         svm->vcpu.arch.interrupt_window_open =
                 (!(control->int_state & SVM_INTERRUPT_SHADOW_MASK) &&
-                 (svm->vmcb->save.rflags & X86_EFLAGS_IF));
+                 (svm->vmcb->save.rflags & X86_EFLAGS_IF) &&
+                 (svm->vcpu.arch.hflags & HF_GIF_MASK));
 
         if (svm->vcpu.arch.interrupt_window_open && svm->vcpu.arch.irq_summary)
                 /*
@@ -1652,9 +2380,9 @@ static void do_interrupt_requests(struct kvm_vcpu *vcpu,
          */
         if (!svm->vcpu.arch.interrupt_window_open &&
             (svm->vcpu.arch.irq_summary || kvm_run->request_interrupt_window))
-                control->intercept |= 1ULL << INTERCEPT_VINTR;
-         else
-                control->intercept &= ~(1ULL << INTERCEPT_VINTR);
+                svm_set_vintr(svm);
+        else
+                svm_clear_vintr(svm);
 }
 
 static int svm_set_tss_addr(struct kvm *kvm, unsigned int addr)
@@ -1662,22 +2390,6 @@ static int svm_set_tss_addr(struct kvm *kvm, unsigned int addr)
         return 0;
 }
 
-static void save_db_regs(unsigned long *db_regs)
-{
-        asm volatile ("mov %%dr0, %0" : "=r"(db_regs[0]));
-        asm volatile ("mov %%dr1, %0" : "=r"(db_regs[1]));
-        asm volatile ("mov %%dr2, %0" : "=r"(db_regs[2]));
-        asm volatile ("mov %%dr3, %0" : "=r"(db_regs[3]));
-}
-
-static void load_db_regs(unsigned long *db_regs)
-{
-        asm volatile ("mov %0, %%dr0" : : "r"(db_regs[0]));
-        asm volatile ("mov %0, %%dr1" : : "r"(db_regs[1]));
-        asm volatile ("mov %0, %%dr2" : : "r"(db_regs[2]));
-        asm volatile ("mov %0, %%dr3" : : "r"(db_regs[3]));
-}
-
 static void svm_flush_tlb(struct kvm_vcpu *vcpu)
 {
         force_new_asid(vcpu);
@@ -1736,19 +2448,12 @@ static void svm_vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
         gs_selector = kvm_read_gs();
         ldt_selector = kvm_read_ldt();
         svm->host_cr2 = kvm_read_cr2();
-        svm->host_dr6 = read_dr6();
-        svm->host_dr7 = read_dr7();
-        svm->vmcb->save.cr2 = vcpu->arch.cr2;
+        if (!is_nested(svm))
+                svm->vmcb->save.cr2 = vcpu->arch.cr2;
         /* required for live migration with NPT */
         if (npt_enabled)
                 svm->vmcb->save.cr3 = vcpu->arch.cr3;
 
-        if (svm->vmcb->save.dr7 & 0xff) {
-                write_dr7(0);
-                save_db_regs(svm->host_db_regs);
-                load_db_regs(svm->db_regs);
-        }
-
         clgi();
 
         local_irq_enable();
@@ -1824,16 +2529,11 @@ static void svm_vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
 #endif
                 );
 
-        if ((svm->vmcb->save.dr7 & 0xff))
-                load_db_regs(svm->host_db_regs);
-
         vcpu->arch.cr2 = svm->vmcb->save.cr2;
         vcpu->arch.regs[VCPU_REGS_RAX] = svm->vmcb->save.rax;
         vcpu->arch.regs[VCPU_REGS_RSP] = svm->vmcb->save.rsp;
         vcpu->arch.regs[VCPU_REGS_RIP] = svm->vmcb->save.rip;
 
-        write_dr6(svm->host_dr6);
-        write_dr7(svm->host_dr7);
         kvm_write_cr2(svm->host_cr2);
 
         kvm_load_fs(fs_selector);
diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
index 7611af576829..bb481330716f 100644
--- a/arch/x86/kvm/vmx.c
+++ b/arch/x86/kvm/vmx.c
@@ -91,6 +91,7 @@ struct vcpu_vmx {
         } rmode;
         int vpid;
         bool emulation_required;
+        enum emulation_result invalid_state_emulation_result;
 
         /* Support for vnmi-less CPUs */
         int soft_vnmi_blocked;
@@ -189,21 +190,21 @@ static inline int is_page_fault(u32 intr_info)
 {
         return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK |
                              INTR_INFO_VALID_MASK)) ==
-                (INTR_TYPE_EXCEPTION | PF_VECTOR | INTR_INFO_VALID_MASK);
+                (INTR_TYPE_HARD_EXCEPTION | PF_VECTOR | INTR_INFO_VALID_MASK);
 }
 
 static inline int is_no_device(u32 intr_info)
 {
         return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK |
                              INTR_INFO_VALID_MASK)) ==
-                (INTR_TYPE_EXCEPTION | NM_VECTOR | INTR_INFO_VALID_MASK);
+                (INTR_TYPE_HARD_EXCEPTION | NM_VECTOR | INTR_INFO_VALID_MASK);
 }
 
 static inline int is_invalid_opcode(u32 intr_info)
 {
         return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK |
                              INTR_INFO_VALID_MASK)) ==
-                (INTR_TYPE_EXCEPTION | UD_VECTOR | INTR_INFO_VALID_MASK);
+                (INTR_TYPE_HARD_EXCEPTION | UD_VECTOR | INTR_INFO_VALID_MASK);
 }
 
 static inline int is_external_interrupt(u32 intr_info)
@@ -480,8 +481,13 @@ static void update_exception_bitmap(struct kvm_vcpu *vcpu)
         eb = (1u << PF_VECTOR) | (1u << UD_VECTOR);
         if (!vcpu->fpu_active)
                 eb |= 1u << NM_VECTOR;
-        if (vcpu->guest_debug.enabled)
-                eb |= 1u << DB_VECTOR;
+        if (vcpu->guest_debug & KVM_GUESTDBG_ENABLE) {
+                if (vcpu->guest_debug &
+                    (KVM_GUESTDBG_SINGLESTEP | KVM_GUESTDBG_USE_HW_BP))
+                        eb |= 1u << DB_VECTOR;
+                if (vcpu->guest_debug & KVM_GUESTDBG_USE_SW_BP)
+                        eb |= 1u << BP_VECTOR;
+        }
         if (vcpu->arch.rmode.active)
                 eb = ~0;
         if (vm_need_ept())
@@ -747,29 +753,33 @@ static void vmx_queue_exception(struct kvm_vcpu *vcpu, unsigned nr,
                                 bool has_error_code, u32 error_code)
 {
         struct vcpu_vmx *vmx = to_vmx(vcpu);
+        u32 intr_info = nr | INTR_INFO_VALID_MASK;
 
-        if (has_error_code)
+        if (has_error_code) {
                 vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE, error_code);
+                intr_info |= INTR_INFO_DELIVER_CODE_MASK;
+        }
 
         if (vcpu->arch.rmode.active) {
                 vmx->rmode.irq.pending = true;
                 vmx->rmode.irq.vector = nr;
                 vmx->rmode.irq.rip = kvm_rip_read(vcpu);
-                if (nr == BP_VECTOR)
+                if (nr == BP_VECTOR || nr == OF_VECTOR)
                         vmx->rmode.irq.rip++;
-                vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
-                             nr | INTR_TYPE_SOFT_INTR
-                             | (has_error_code ? INTR_INFO_DELIVER_CODE_MASK : 0)
-                             | INTR_INFO_VALID_MASK);
+                intr_info |= INTR_TYPE_SOFT_INTR;
+                vmcs_write32(VM_ENTRY_INTR_INFO_FIELD, intr_info);
                 vmcs_write32(VM_ENTRY_INSTRUCTION_LEN, 1);
                 kvm_rip_write(vcpu, vmx->rmode.irq.rip - 1);
                 return;
         }
 
-        vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
-                     nr | INTR_TYPE_EXCEPTION
-                     | (has_error_code ? INTR_INFO_DELIVER_CODE_MASK : 0)
-                     | INTR_INFO_VALID_MASK);
+        if (nr == BP_VECTOR || nr == OF_VECTOR) {
+                vmcs_write32(VM_ENTRY_INSTRUCTION_LEN, 1);
+                intr_info |= INTR_TYPE_SOFT_EXCEPTION;
+        } else
+                intr_info |= INTR_TYPE_HARD_EXCEPTION;
+
+        vmcs_write32(VM_ENTRY_INTR_INFO_FIELD, intr_info);
 }
 
 static bool vmx_exception_injected(struct kvm_vcpu *vcpu)
@@ -856,11 +866,8 @@ static u64 guest_read_tsc(void)
  * writes 'guest_tsc' into guest's timestamp counter "register"
  * guest_tsc = host_tsc + tsc_offset ==> tsc_offset = guest_tsc - host_tsc
  */
-static void guest_write_tsc(u64 guest_tsc)
+static void guest_write_tsc(u64 guest_tsc, u64 host_tsc)
 {
-        u64 host_tsc;
-
-        rdtscll(host_tsc);
         vmcs_write64(TSC_OFFSET, guest_tsc - host_tsc);
 }
 
@@ -925,14 +932,15 @@ static int vmx_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
 {
         struct vcpu_vmx *vmx = to_vmx(vcpu);
         struct kvm_msr_entry *msr;
+        u64 host_tsc;
         int ret = 0;
 
         switch (msr_index) {
-#ifdef CONFIG_X86_64
         case MSR_EFER:
                 vmx_load_host_state(vmx);
                 ret = kvm_set_msr_common(vcpu, msr_index, data);
                 break;
+#ifdef CONFIG_X86_64
         case MSR_FS_BASE:
                 vmcs_writel(GUEST_FS_BASE, data);
                 break;
@@ -950,7 +958,8 @@ static int vmx_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
                 vmcs_writel(GUEST_SYSENTER_ESP, data);
                 break;
         case MSR_IA32_TIME_STAMP_COUNTER:
-                guest_write_tsc(data);
+                rdtscll(host_tsc);
+                guest_write_tsc(data, host_tsc);
                 break;
         case MSR_P6_PERFCTR0:
         case MSR_P6_PERFCTR1:
@@ -999,40 +1008,28 @@ static void vmx_cache_reg(struct kvm_vcpu *vcpu, enum kvm_reg reg)
         }
 }
 
-static int set_guest_debug(struct kvm_vcpu *vcpu, struct kvm_debug_guest *dbg)
+static int set_guest_debug(struct kvm_vcpu *vcpu, struct kvm_guest_debug *dbg)
 {
-        unsigned long dr7 = 0x400;
-        int old_singlestep;
-
-        old_singlestep = vcpu->guest_debug.singlestep;
-
-        vcpu->guest_debug.enabled = dbg->enabled;
-        if (vcpu->guest_debug.enabled) {
-                int i;
+        int old_debug = vcpu->guest_debug;
+        unsigned long flags;
 
-                dr7 |= 0x200;  /* exact */
-                for (i = 0; i < 4; ++i) {
-                        if (!dbg->breakpoints[i].enabled)
-                                continue;
-                        vcpu->guest_debug.bp[i] = dbg->breakpoints[i].address;
-                        dr7 |= 2 << (i*2);    /* global enable */
-                        dr7 |= 0 << (i*4+16); /* execution breakpoint */
-                }
+        vcpu->guest_debug = dbg->control;
+        if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
+                vcpu->guest_debug = 0;
 
-                vcpu->guest_debug.singlestep = dbg->singlestep;
-        } else
-                vcpu->guest_debug.singlestep = 0;
-
-        if (old_singlestep && !vcpu->guest_debug.singlestep) {
-                unsigned long flags;
+        if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
+                vmcs_writel(GUEST_DR7, dbg->arch.debugreg[7]);
+        else
+                vmcs_writel(GUEST_DR7, vcpu->arch.dr7);
 
-                flags = vmcs_readl(GUEST_RFLAGS);
+        flags = vmcs_readl(GUEST_RFLAGS);
+        if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
+                flags |= X86_EFLAGS_TF | X86_EFLAGS_RF;
+        else if (old_debug & KVM_GUESTDBG_SINGLESTEP)
                 flags &= ~(X86_EFLAGS_TF | X86_EFLAGS_RF);
-                vmcs_writel(GUEST_RFLAGS, flags);
-        }
+        vmcs_writel(GUEST_RFLAGS, flags);
 
         update_exception_bitmap(vcpu);
-        vmcs_writel(GUEST_DR7, dr7);
 
         return 0;
 }
@@ -1433,6 +1430,29 @@ continue_rmode:
         init_rmode(vcpu->kvm);
 }
 
+static void vmx_set_efer(struct kvm_vcpu *vcpu, u64 efer)
+{
+        struct vcpu_vmx *vmx = to_vmx(vcpu);
+        struct kvm_msr_entry *msr = find_msr_entry(vmx, MSR_EFER);
+
+        vcpu->arch.shadow_efer = efer;
+        if (!msr)
+                return;
+        if (efer & EFER_LMA) {
+                vmcs_write32(VM_ENTRY_CONTROLS,
+                             vmcs_read32(VM_ENTRY_CONTROLS) |
+                             VM_ENTRY_IA32E_MODE);
+                msr->data = efer;
+        } else {
+                vmcs_write32(VM_ENTRY_CONTROLS,
+                             vmcs_read32(VM_ENTRY_CONTROLS) &
+                             ~VM_ENTRY_IA32E_MODE);
+
+                msr->data = efer & ~EFER_LME;
+        }
+        setup_msrs(vmx);
+}
+
 #ifdef CONFIG_X86_64
 
 static void enter_lmode(struct kvm_vcpu *vcpu)
@@ -1447,13 +1467,8 @@ static void enter_lmode(struct kvm_vcpu *vcpu)
                              (guest_tr_ar & ~AR_TYPE_MASK)
                              | AR_TYPE_BUSY_64_TSS);
         }
-
         vcpu->arch.shadow_efer |= EFER_LMA;
-
-        find_msr_entry(to_vmx(vcpu), MSR_EFER)->data |= EFER_LMA | EFER_LME;
-        vmcs_write32(VM_ENTRY_CONTROLS,
-                     vmcs_read32(VM_ENTRY_CONTROLS)
-                     | VM_ENTRY_IA32E_MODE);
+        vmx_set_efer(vcpu, vcpu->arch.shadow_efer);
 }
 
 static void exit_lmode(struct kvm_vcpu *vcpu)
@@ -1612,30 +1627,6 @@ static void vmx_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
         vmcs_writel(GUEST_CR4, hw_cr4);
 }
 
-static void vmx_set_efer(struct kvm_vcpu *vcpu, u64 efer)
-{
-        struct vcpu_vmx *vmx = to_vmx(vcpu);
-        struct kvm_msr_entry *msr = find_msr_entry(vmx, MSR_EFER);
-
-        vcpu->arch.shadow_efer = efer;
-        if (!msr)
-                return;
-        if (efer & EFER_LMA) {
-                vmcs_write32(VM_ENTRY_CONTROLS,
-                                     vmcs_read32(VM_ENTRY_CONTROLS) |
-                                     VM_ENTRY_IA32E_MODE);
-                msr->data = efer;
-
-        } else {
-                vmcs_write32(VM_ENTRY_CONTROLS,
-                                     vmcs_read32(VM_ENTRY_CONTROLS) &
-                                     ~VM_ENTRY_IA32E_MODE);
-
-                msr->data = efer & ~EFER_LME;
-        }
-        setup_msrs(vmx);
-}
-
 static u64 vmx_get_segment_base(struct kvm_vcpu *vcpu, int seg)
 {
         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
@@ -1653,7 +1644,7 @@ static void vmx_get_segment(struct kvm_vcpu *vcpu,
         var->limit = vmcs_read32(sf->limit);
         var->selector = vmcs_read16(sf->selector);
         ar = vmcs_read32(sf->ar_bytes);
-        if (ar & AR_UNUSABLE_MASK)
+        if ((ar & AR_UNUSABLE_MASK) && !emulate_invalid_guest_state)
                 ar = 0;
         var->type = ar & 15;
         var->s = (ar >> 4) & 1;
@@ -1788,14 +1779,16 @@ static bool code_segment_valid(struct kvm_vcpu *vcpu)
         vmx_get_segment(vcpu, &cs, VCPU_SREG_CS);
         cs_rpl = cs.selector & SELECTOR_RPL_MASK;
 
+        if (cs.unusable)
+                return false;
         if (~cs.type & (AR_TYPE_CODE_MASK|AR_TYPE_ACCESSES_MASK))
                 return false;
         if (!cs.s)
                 return false;
-        if (!(~cs.type & (AR_TYPE_CODE_MASK|AR_TYPE_WRITEABLE_MASK))) {
+        if (cs.type & AR_TYPE_WRITEABLE_MASK) {
                 if (cs.dpl > cs_rpl)
                         return false;
-        } else if (cs.type & AR_TYPE_CODE_MASK) {
+        } else {
                 if (cs.dpl != cs_rpl)
                         return false;
         }
@@ -1814,7 +1807,9 @@ static bool stack_segment_valid(struct kvm_vcpu *vcpu)
         vmx_get_segment(vcpu, &ss, VCPU_SREG_SS);
         ss_rpl = ss.selector & SELECTOR_RPL_MASK;
 
-        if ((ss.type != 3) || (ss.type != 7))
+        if (ss.unusable)
+                return true;
+        if (ss.type != 3 && ss.type != 7)
                 return false;
         if (!ss.s)
                 return false;
@@ -1834,6 +1829,8 @@ static bool data_segment_valid(struct kvm_vcpu *vcpu, int seg)
         vmx_get_segment(vcpu, &var, seg);
         rpl = var.selector & SELECTOR_RPL_MASK;
 
+        if (var.unusable)
+                return true;
         if (!var.s)
                 return false;
         if (!var.present)
@@ -1855,9 +1852,11 @@ static bool tr_valid(struct kvm_vcpu *vcpu)
 
         vmx_get_segment(vcpu, &tr, VCPU_SREG_TR);
 
+        if (tr.unusable)
+                return false;
         if (tr.selector & SELECTOR_TI_MASK)     /* TI = 1 */
                 return false;
-        if ((tr.type != 3) || (tr.type != 11)) /* TODO: Check if guest is in IA32e mode */
+        if (tr.type != 3 && tr.type != 11) /* TODO: Check if guest is in IA32e mode */
                 return false;
         if (!tr.present)
                 return false;
@@ -1871,6 +1870,8 @@ static bool ldtr_valid(struct kvm_vcpu *vcpu)
 
         vmx_get_segment(vcpu, &ldtr, VCPU_SREG_LDTR);
 
+        if (ldtr.unusable)
+                return true;
         if (ldtr.selector & SELECTOR_TI_MASK)   /* TI = 1 */
                 return false;
         if (ldtr.type != 2)
@@ -2112,7 +2113,7 @@ static int vmx_vcpu_setup(struct vcpu_vmx *vmx)
 {
         u32 host_sysenter_cs, msr_low, msr_high;
         u32 junk;
-        u64 host_pat;
+        u64 host_pat, tsc_this, tsc_base;
         unsigned long a;
         struct descriptor_table dt;
         int i;
@@ -2240,6 +2241,12 @@ static int vmx_vcpu_setup(struct vcpu_vmx *vmx)
         vmcs_writel(CR0_GUEST_HOST_MASK, ~0UL);
         vmcs_writel(CR4_GUEST_HOST_MASK, KVM_GUEST_CR4_MASK);
 
+        tsc_base = vmx->vcpu.kvm->arch.vm_init_tsc;
+        rdtscll(tsc_this);
+        if (tsc_this < vmx->vcpu.kvm->arch.vm_init_tsc)
+                tsc_base = tsc_this;
+
+        guest_write_tsc(0, tsc_base);
 
         return 0;
 }
@@ -2319,7 +2326,6 @@ static int vmx_vcpu_reset(struct kvm_vcpu *vcpu)
                 kvm_rip_write(vcpu, 0);
         kvm_register_write(vcpu, VCPU_REGS_RSP, 0);
 
-        /* todo: dr0 = dr1 = dr2 = dr3 = 0; dr6 = 0xffff0ff0 */
         vmcs_writel(GUEST_DR7, 0x400);
 
         vmcs_writel(GUEST_GDTR_BASE, 0);
@@ -2332,8 +2338,6 @@ static int vmx_vcpu_reset(struct kvm_vcpu *vcpu)
         vmcs_write32(GUEST_INTERRUPTIBILITY_INFO, 0);
         vmcs_write32(GUEST_PENDING_DBG_EXCEPTIONS, 0);
 
-        guest_write_tsc(0);
-
         /* Special registers */
         vmcs_write64(GUEST_IA32_DEBUGCTL, 0);
 
@@ -2486,6 +2490,11 @@ static void do_interrupt_requests(struct kvm_vcpu *vcpu,
 {
         vmx_update_window_states(vcpu);
 
+        if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
+                vmcs_clear_bits(GUEST_INTERRUPTIBILITY_INFO,
+                                GUEST_INTR_STATE_STI |
+                                GUEST_INTR_STATE_MOV_SS);
+
         if (vcpu->arch.nmi_pending && !vcpu->arch.nmi_injected) {
                 if (vcpu->arch.interrupt.pending) {
                         enable_nmi_window(vcpu);
@@ -2536,24 +2545,6 @@ static int vmx_set_tss_addr(struct kvm *kvm, unsigned int addr)
         return 0;
 }
 
-static void kvm_guest_debug_pre(struct kvm_vcpu *vcpu)
-{
-        struct kvm_guest_debug *dbg = &vcpu->guest_debug;
-
-        set_debugreg(dbg->bp[0], 0);
-        set_debugreg(dbg->bp[1], 1);
-        set_debugreg(dbg->bp[2], 2);
-        set_debugreg(dbg->bp[3], 3);
-
-        if (dbg->singlestep) {
-                unsigned long flags;
-
-                flags = vmcs_readl(GUEST_RFLAGS);
-                flags |= X86_EFLAGS_TF | X86_EFLAGS_RF;
-                vmcs_writel(GUEST_RFLAGS, flags);
-        }
-}
-
 static int handle_rmode_exception(struct kvm_vcpu *vcpu,
                                   int vec, u32 err_code)
 {
@@ -2570,9 +2561,17 @@ static int handle_rmode_exception(struct kvm_vcpu *vcpu,
          *        the required debugging infrastructure rework.
          */
         switch (vec) {
-        case DE_VECTOR:
         case DB_VECTOR:
+                if (vcpu->guest_debug &
+                    (KVM_GUESTDBG_SINGLESTEP | KVM_GUESTDBG_USE_HW_BP))
+                        return 0;
+                kvm_queue_exception(vcpu, vec);
+                return 1;
         case BP_VECTOR:
+                if (vcpu->guest_debug & KVM_GUESTDBG_USE_SW_BP)
+                        return 0;
+                /* fall through */
+        case DE_VECTOR:
         case OF_VECTOR:
         case BR_VECTOR:
         case UD_VECTOR:
@@ -2589,8 +2588,8 @@ static int handle_rmode_exception(struct kvm_vcpu *vcpu,
 static int handle_exception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
 {
         struct vcpu_vmx *vmx = to_vmx(vcpu);
-        u32 intr_info, error_code;
-        unsigned long cr2, rip;
+        u32 intr_info, ex_no, error_code;
+        unsigned long cr2, rip, dr6;
         u32 vect_info;
         enum emulation_result er;
 
@@ -2649,14 +2648,30 @@ static int handle_exception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
                 return 1;
         }
 
-        if ((intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK)) ==
-            (INTR_TYPE_EXCEPTION | 1)) {
+        ex_no = intr_info & INTR_INFO_VECTOR_MASK;
+        switch (ex_no) {
+        case DB_VECTOR:
+                dr6 = vmcs_readl(EXIT_QUALIFICATION);
+                if (!(vcpu->guest_debug &
+                      (KVM_GUESTDBG_SINGLESTEP | KVM_GUESTDBG_USE_HW_BP))) {
+                        vcpu->arch.dr6 = dr6 | DR6_FIXED_1;
+                        kvm_queue_exception(vcpu, DB_VECTOR);
+                        return 1;
+                }
+                kvm_run->debug.arch.dr6 = dr6 | DR6_FIXED_1;
+                kvm_run->debug.arch.dr7 = vmcs_readl(GUEST_DR7);
+                /* fall through */
+        case BP_VECTOR:
                 kvm_run->exit_reason = KVM_EXIT_DEBUG;
-                return 0;
+                kvm_run->debug.arch.pc = vmcs_readl(GUEST_CS_BASE) + rip;
+                kvm_run->debug.arch.exception = ex_no;
+                break;
+        default:
+                kvm_run->exit_reason = KVM_EXIT_EXCEPTION;
+                kvm_run->ex.exception = ex_no;
+                kvm_run->ex.error_code = error_code;
+                break;
         }
-        kvm_run->exit_reason = KVM_EXIT_EXCEPTION;
-        kvm_run->ex.exception = intr_info & INTR_INFO_VECTOR_MASK;
-        kvm_run->ex.error_code = error_code;
         return 0;
 }
 
@@ -2677,7 +2692,7 @@ static int handle_triple_fault(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
 static int handle_io(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
 {
         unsigned long exit_qualification;
-        int size, down, in, string, rep;
+        int size, in, string;
         unsigned port;
 
         ++vcpu->stat.io_exits;
@@ -2693,8 +2708,6 @@ static int handle_io(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
 
         size = (exit_qualification & 7) + 1;
         in = (exit_qualification & 8) != 0;
-        down = (vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_DF) != 0;
-        rep = (exit_qualification & 32) != 0;
         port = exit_qualification >> 16;
 
         skip_emulated_instruction(vcpu);
@@ -2795,21 +2808,44 @@ static int handle_dr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
         unsigned long val;
         int dr, reg;
 
-        /*
-         * FIXME: this code assumes the host is debugging the guest.
-         *        need to deal with guest debugging itself too.
-         */
+        dr = vmcs_readl(GUEST_DR7);
+        if (dr & DR7_GD) {
+                /*
+                 * As the vm-exit takes precedence over the debug trap, we
+                 * need to emulate the latter, either for the host or the
+                 * guest debugging itself.
+                 */
+                if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
+                        kvm_run->debug.arch.dr6 = vcpu->arch.dr6;
+                        kvm_run->debug.arch.dr7 = dr;
+                        kvm_run->debug.arch.pc =
+                                vmcs_readl(GUEST_CS_BASE) +
+                                vmcs_readl(GUEST_RIP);
+                        kvm_run->debug.arch.exception = DB_VECTOR;
+                        kvm_run->exit_reason = KVM_EXIT_DEBUG;
+                        return 0;
+                } else {
+                        vcpu->arch.dr7 &= ~DR7_GD;
+                        vcpu->arch.dr6 |= DR6_BD;
+                        vmcs_writel(GUEST_DR7, vcpu->arch.dr7);
+                        kvm_queue_exception(vcpu, DB_VECTOR);
+                        return 1;
+                }
+        }
+
         exit_qualification = vmcs_readl(EXIT_QUALIFICATION);
-        dr = exit_qualification & 7;
-        reg = (exit_qualification >> 8) & 15;
-        if (exit_qualification & 16) {
-                /* mov from dr */
+        dr = exit_qualification & DEBUG_REG_ACCESS_NUM;
+        reg = DEBUG_REG_ACCESS_REG(exit_qualification);
+        if (exit_qualification & TYPE_MOV_FROM_DR) {
                 switch (dr) {
+                case 0 ... 3:
+                        val = vcpu->arch.db[dr];
+                        break;
                 case 6:
-                        val = 0xffff0ff0;
+                        val = vcpu->arch.dr6;
                         break;
                 case 7:
-                        val = 0x400;
+                        val = vcpu->arch.dr7;
                         break;
                 default:
                         val = 0;
@@ -2817,7 +2853,38 @@ static int handle_dr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
                 kvm_register_write(vcpu, reg, val);
                 KVMTRACE_2D(DR_READ, vcpu, (u32)dr, (u32)val, handler);
         } else {
-                /* mov to dr */
+                val = vcpu->arch.regs[reg];
+                switch (dr) {
+                case 0 ... 3:
+                        vcpu->arch.db[dr] = val;
+                        if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
+                                vcpu->arch.eff_db[dr] = val;
+                        break;
+                case 4 ... 5:
+                        if (vcpu->arch.cr4 & X86_CR4_DE)
+                                kvm_queue_exception(vcpu, UD_VECTOR);
+                        break;
+                case 6:
+                        if (val & 0xffffffff00000000ULL) {
+                                kvm_queue_exception(vcpu, GP_VECTOR);
+                                break;
+                        }
+                        vcpu->arch.dr6 = (val & DR6_VOLATILE) | DR6_FIXED_1;
+                        break;
+                case 7:
+                        if (val & 0xffffffff00000000ULL) {
+                                kvm_queue_exception(vcpu, GP_VECTOR);
+                                break;
+                        }
+                        vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
+                        if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
+                                vmcs_writel(GUEST_DR7, vcpu->arch.dr7);
+                                vcpu->arch.switch_db_regs =
+                                        (val & DR7_BP_EN_MASK);
+                        }
+                        break;
+                }
+                KVMTRACE_2D(DR_WRITE, vcpu, (u32)dr, (u32)val, handler);
         }
         skip_emulated_instruction(vcpu);
         return 1;
@@ -2968,17 +3035,25 @@ static int handle_task_switch(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
         }
         tss_selector = exit_qualification;
 
-        return kvm_task_switch(vcpu, tss_selector, reason);
+        if (!kvm_task_switch(vcpu, tss_selector, reason))
+                return 0;
+
+        /* clear all local breakpoint enable flags */
+        vmcs_writel(GUEST_DR7, vmcs_readl(GUEST_DR7) & ~55);
+
+        /*
+         * TODO: What about debug traps on tss switch?
+         *       Are we supposed to inject them and update dr6?
+         */
+
+        return 1;
 }
 
 static int handle_ept_violation(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
 {
         u64 exit_qualification;
-        enum emulation_result er;
         gpa_t gpa;
-        unsigned long hva;
         int gla_validity;
-        int r;
 
         exit_qualification = vmcs_read64(EXIT_QUALIFICATION);
 
@@ -3001,32 +3076,7 @@ static int handle_ept_violation(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
         }
 
         gpa = vmcs_read64(GUEST_PHYSICAL_ADDRESS);
-        hva = gfn_to_hva(vcpu->kvm, gpa >> PAGE_SHIFT);
-        if (!kvm_is_error_hva(hva)) {
-                r = kvm_mmu_page_fault(vcpu, gpa & PAGE_MASK, 0);
-                if (r < 0) {
-                        printk(KERN_ERR "EPT: Not enough memory!\n");
-                        return -ENOMEM;
-                }
-                return 1;
-        } else {
-                /* must be MMIO */
-                er = emulate_instruction(vcpu, kvm_run, 0, 0, 0);
-
-                if (er == EMULATE_FAIL) {
-                        printk(KERN_ERR
-                         "EPT: Fail to handle EPT violation vmexit!er is %d\n",
-                         er);
-                        printk(KERN_ERR "EPT: GPA: 0x%lx, GVA: 0x%lx\n",
-                         (long unsigned int)vmcs_read64(GUEST_PHYSICAL_ADDRESS),
-                         (long unsigned int)vmcs_read64(GUEST_LINEAR_ADDRESS));
-                        printk(KERN_ERR "EPT: Exit qualification is 0x%lx\n",
-                                (long unsigned int)exit_qualification);
-                        return -ENOTSUPP;
-                } else if (er == EMULATE_DO_MMIO)
-                        return 0;
-        }
-        return 1;
+        return kvm_mmu_page_fault(vcpu, gpa & PAGE_MASK, 0);
 }
 
 static int handle_nmi_window(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
@@ -3046,7 +3096,7 @@ static void handle_invalid_guest_state(struct kvm_vcpu *vcpu,
                                 struct kvm_run *kvm_run)
 {
         struct vcpu_vmx *vmx = to_vmx(vcpu);
-        int err;
+        enum emulation_result err = EMULATE_DONE;
 
         preempt_enable();
         local_irq_enable();
@@ -3071,10 +3121,7 @@ static void handle_invalid_guest_state(struct kvm_vcpu *vcpu,
         local_irq_disable();
         preempt_disable();
 
-        /* Guest state should be valid now except if we need to
-         * emulate an MMIO */
-        if (guest_state_valid(vcpu))
-                vmx->emulation_required = 0;
+        vmx->invalid_state_emulation_result = err;
 }
 
 /*
@@ -3123,8 +3170,11 @@ static int kvm_handle_exit(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
 
         /* If we need to emulate an MMIO from handle_invalid_guest_state
          * we just return 0 */
-        if (vmx->emulation_required && emulate_invalid_guest_state)
-                return 0;
+        if (vmx->emulation_required && emulate_invalid_guest_state) {
+                if (guest_state_valid(vcpu))
+                        vmx->emulation_required = 0;
+                return vmx->invalid_state_emulation_result != EMULATE_DO_MMIO;
+        }
 
         /* Access CR3 don't cause VMExit in paging mode, so we need
          * to sync with guest real CR3. */
@@ -3238,7 +3288,8 @@ static void vmx_complete_interrupts(struct vcpu_vmx *vmx)
                         vmx->vcpu.arch.nmi_injected = false;
         }
         kvm_clear_exception_queue(&vmx->vcpu);
-        if (idtv_info_valid && type == INTR_TYPE_EXCEPTION) {
+        if (idtv_info_valid && (type == INTR_TYPE_HARD_EXCEPTION ||
+                                type == INTR_TYPE_SOFT_EXCEPTION)) {
                 if (idt_vectoring_info & VECTORING_INFO_DELIVER_CODE_MASK) {
                         error = vmcs_read32(IDT_VECTORING_ERROR_CODE);
                         kvm_queue_exception_e(&vmx->vcpu, vector, error);
@@ -3259,6 +3310,11 @@ static void vmx_intr_assist(struct kvm_vcpu *vcpu)
 
         vmx_update_window_states(vcpu);
 
+        if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
+                vmcs_clear_bits(GUEST_INTERRUPTIBILITY_INFO,
+                                GUEST_INTR_STATE_STI |
+                                GUEST_INTR_STATE_MOV_SS);
+
         if (vcpu->arch.nmi_pending && !vcpu->arch.nmi_injected) {
                 if (vcpu->arch.interrupt.pending) {
                         enable_nmi_window(vcpu);
@@ -3347,6 +3403,8 @@ static void vmx_vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
          */
         vmcs_writel(HOST_CR0, read_cr0());
 
+        set_debugreg(vcpu->arch.dr6, 6);
+
         asm(
                 /* Store host registers */
                 "push %%"R"dx; push %%"R"bp;"
@@ -3441,6 +3499,8 @@ static void vmx_vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
         vcpu->arch.regs_avail = ~((1 << VCPU_REGS_RIP) | (1 << VCPU_REGS_RSP));
         vcpu->arch.regs_dirty = 0;
 
+        get_debugreg(vcpu->arch.dr6, 6);
+
         vmx->idt_vectoring_info = vmcs_read32(IDT_VECTORING_INFO_FIELD);
         if (vmx->rmode.irq.pending)
                 fixup_rmode_irq(vmx);
@@ -3595,7 +3655,6 @@ static struct kvm_x86_ops vmx_x86_ops = {
         .vcpu_put = vmx_vcpu_put,
 
         .set_guest_debug = set_guest_debug,
-        .guest_debug_pre = kvm_guest_debug_pre,
         .get_msr = vmx_get_msr,
         .set_msr = vmx_set_msr,
         .get_segment_base = vmx_get_segment_base,
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index 758b7a155ae9..8ca100a9ecac 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -36,6 +36,7 @@
 #include <linux/highmem.h>
 #include <linux/iommu.h>
 #include <linux/intel-iommu.h>
+#include <linux/cpufreq.h>
 
 #include <asm/uaccess.h>
 #include <asm/msr.h>
@@ -69,6 +70,8 @@ static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffffeULL;
 
 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
                                     struct kvm_cpuid_entry2 __user *entries);
+struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
+                                              u32 function, u32 index);
 
 struct kvm_x86_ops *kvm_x86_ops;
 EXPORT_SYMBOL_GPL(kvm_x86_ops);
@@ -173,6 +176,7 @@ void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long addr,
                            u32 error_code)
 {
         ++vcpu->stat.pf_guest;
+
         if (vcpu->arch.exception.pending) {
                 if (vcpu->arch.exception.nr == PF_VECTOR) {
                         printk(KERN_DEBUG "kvm: inject_page_fault:"
@@ -361,6 +365,7 @@ void kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
         }
         kvm_x86_ops->set_cr4(vcpu, cr4);
         vcpu->arch.cr4 = cr4;
+        vcpu->arch.mmu.base_role.cr4_pge = (cr4 & X86_CR4_PGE) && !tdp_enabled;
         kvm_mmu_sync_global(vcpu);
         kvm_mmu_reset_context(vcpu);
 }
@@ -442,6 +447,11 @@ unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 }
 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 
+static inline u32 bit(int bitno)
+{
+        return 1 << (bitno & 31);
+}
+
 /*
  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
@@ -456,7 +466,7 @@ static u32 msrs_to_save[] = {
         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 #endif
         MSR_IA32_TIME_STAMP_COUNTER, MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
-        MSR_IA32_PERF_STATUS, MSR_IA32_CR_PAT
+        MSR_IA32_PERF_STATUS, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
 };
 
 static unsigned num_msrs_to_save;
@@ -481,6 +491,28 @@ static void set_efer(struct kvm_vcpu *vcpu, u64 efer)
                 return;
         }
 
+        if (efer & EFER_FFXSR) {
+                struct kvm_cpuid_entry2 *feat;
+
+                feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
+                if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT))) {
+                        printk(KERN_DEBUG "set_efer: #GP, enable FFXSR w/o CPUID capability\n");
+                        kvm_inject_gp(vcpu, 0);
+                        return;
+                }
+        }
+
+        if (efer & EFER_SVME) {
+                struct kvm_cpuid_entry2 *feat;
+
+                feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
+                if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM))) {
+                        printk(KERN_DEBUG "set_efer: #GP, enable SVM w/o SVM\n");
+                        kvm_inject_gp(vcpu, 0);
+                        return;
+                }
+        }
+
         kvm_x86_ops->set_efer(vcpu, efer);
 
         efer &= ~EFER_LMA;
@@ -586,6 +618,8 @@ static void kvm_set_time_scale(uint32_t tsc_khz, struct pvclock_vcpu_time_info *
                  hv_clock->tsc_to_system_mul);
 }
 
+static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
+
 static void kvm_write_guest_time(struct kvm_vcpu *v)
 {
         struct timespec ts;
@@ -596,9 +630,9 @@ static void kvm_write_guest_time(struct kvm_vcpu *v)
         if ((!vcpu->time_page))
                 return;
 
-        if (unlikely(vcpu->hv_clock_tsc_khz != tsc_khz)) {
-                kvm_set_time_scale(tsc_khz, &vcpu->hv_clock);
-                vcpu->hv_clock_tsc_khz = tsc_khz;
+        if (unlikely(vcpu->hv_clock_tsc_khz != __get_cpu_var(cpu_tsc_khz))) {
+                kvm_set_time_scale(__get_cpu_var(cpu_tsc_khz), &vcpu->hv_clock);
+                vcpu->hv_clock_tsc_khz = __get_cpu_var(cpu_tsc_khz);
         }
 
         /* Keep irq disabled to prevent changes to the clock */
@@ -629,6 +663,16 @@ static void kvm_write_guest_time(struct kvm_vcpu *v)
         mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
 }
 
+static int kvm_request_guest_time_update(struct kvm_vcpu *v)
+{
+        struct kvm_vcpu_arch *vcpu = &v->arch;
+
+        if (!vcpu->time_page)
+                return 0;
+        set_bit(KVM_REQ_KVMCLOCK_UPDATE, &v->requests);
+        return 1;
+}
+
 static bool msr_mtrr_valid(unsigned msr)
 {
         switch (msr) {
@@ -722,6 +766,7 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
                 break;
         case MSR_IA32_UCODE_REV:
         case MSR_IA32_UCODE_WRITE:
+        case MSR_VM_HSAVE_PA:
                 break;
         case 0x200 ... 0x2ff:
                 return set_msr_mtrr(vcpu, msr, data);
@@ -758,7 +803,7 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
                         vcpu->arch.time_page = NULL;
                 }
 
-                kvm_write_guest_time(vcpu);
+                kvm_request_guest_time_update(vcpu);
                 break;
         }
         default:
@@ -843,6 +888,7 @@ int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
         case MSR_IA32_LASTBRANCHTOIP:
         case MSR_IA32_LASTINTFROMIP:
         case MSR_IA32_LASTINTTOIP:
+        case MSR_VM_HSAVE_PA:
                 data = 0;
                 break;
         case MSR_MTRRcap:
@@ -967,10 +1013,13 @@ int kvm_dev_ioctl_check_extension(long ext)
         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
         case KVM_CAP_SET_TSS_ADDR:
         case KVM_CAP_EXT_CPUID:
+        case KVM_CAP_CLOCKSOURCE:
         case KVM_CAP_PIT:
         case KVM_CAP_NOP_IO_DELAY:
         case KVM_CAP_MP_STATE:
         case KVM_CAP_SYNC_MMU:
+        case KVM_CAP_REINJECT_CONTROL:
+        case KVM_CAP_IRQ_INJECT_STATUS:
                 r = 1;
                 break;
         case KVM_CAP_COALESCED_MMIO:
@@ -991,9 +1040,6 @@ int kvm_dev_ioctl_check_extension(long ext)
         case KVM_CAP_IOMMU:
                 r = iommu_found();
                 break;
-        case KVM_CAP_CLOCKSOURCE:
-                r = boot_cpu_has(X86_FEATURE_CONSTANT_TSC);
-                break;
         default:
                 r = 0;
                 break;
@@ -1044,7 +1090,7 @@ long kvm_arch_dev_ioctl(struct file *filp,
                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
                         goto out;
                 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
-                        cpuid_arg->entries);
+                                                      cpuid_arg->entries);
                 if (r)
                         goto out;
 
@@ -1064,7 +1110,7 @@ out:
 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
 {
         kvm_x86_ops->vcpu_load(vcpu, cpu);
-        kvm_write_guest_time(vcpu);
+        kvm_request_guest_time_update(vcpu);
 }
 
 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
@@ -1142,8 +1188,8 @@ out:
 }
 
 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
-                                    struct kvm_cpuid2 *cpuid,
-                                    struct kvm_cpuid_entry2 __user *entries)
+                                     struct kvm_cpuid2 *cpuid,
+                                     struct kvm_cpuid_entry2 __user *entries)
 {
         int r;
 
@@ -1162,8 +1208,8 @@ out:
 }
 
 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
-                                    struct kvm_cpuid2 *cpuid,
-                                    struct kvm_cpuid_entry2 __user *entries)
+                                     struct kvm_cpuid2 *cpuid,
+                                     struct kvm_cpuid_entry2 __user *entries)
 {
         int r;
 
@@ -1172,7 +1218,7 @@ static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
                 goto out;
         r = -EFAULT;
         if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
-                           vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
+                         vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
                 goto out;
         return 0;
 
@@ -1181,18 +1227,13 @@ out:
         return r;
 }
 
-static inline u32 bit(int bitno)
-{
-        return 1 << (bitno & 31);
-}
-
 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
-                          u32 index)
+                           u32 index)
 {
         entry->function = function;
         entry->index = index;
         cpuid_count(entry->function, entry->index,
-                &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
+                    &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
         entry->flags = 0;
 }
 
@@ -1222,15 +1263,17 @@ static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
 #ifdef CONFIG_X86_64
                 bit(X86_FEATURE_LM) |
 #endif
+                bit(X86_FEATURE_FXSR_OPT) |
                 bit(X86_FEATURE_MMXEXT) |
                 bit(X86_FEATURE_3DNOWEXT) |
                 bit(X86_FEATURE_3DNOW);
         const u32 kvm_supported_word3_x86_features =
                 bit(X86_FEATURE_XMM3) | bit(X86_FEATURE_CX16);
         const u32 kvm_supported_word6_x86_features =
-                bit(X86_FEATURE_LAHF_LM) | bit(X86_FEATURE_CMP_LEGACY);
+                bit(X86_FEATURE_LAHF_LM) | bit(X86_FEATURE_CMP_LEGACY) |
+                bit(X86_FEATURE_SVM);
 
-        /* all func 2 cpuid_count() should be called on the same cpu */
+        /* all calls to cpuid_count() should be made on the same cpu */
         get_cpu();
         do_cpuid_1_ent(entry, function, index);
         ++*nent;
@@ -1304,7 +1347,7 @@ static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
 }
 
 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
-                                    struct kvm_cpuid_entry2 __user *entries)
+                                     struct kvm_cpuid_entry2 __user *entries)
 {
         struct kvm_cpuid_entry2 *cpuid_entries;
         int limit, nent = 0, r = -E2BIG;
@@ -1321,7 +1364,7 @@ static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
         limit = cpuid_entries[0].eax;
         for (func = 1; func <= limit && nent < cpuid->nent; ++func)
                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
-                                &nent, cpuid->nent);
+                             &nent, cpuid->nent);
         r = -E2BIG;
         if (nent >= cpuid->nent)
                 goto out_free;
@@ -1330,10 +1373,10 @@ static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
         limit = cpuid_entries[nent - 1].eax;
         for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
-                               &nent, cpuid->nent);
+                             &nent, cpuid->nent);
         r = -EFAULT;
         if (copy_to_user(entries, cpuid_entries,
-                        nent * sizeof(struct kvm_cpuid_entry2)))
+                         nent * sizeof(struct kvm_cpuid_entry2)))
                 goto out_free;
         cpuid->nent = nent;
         r = 0;
@@ -1477,7 +1520,7 @@ long kvm_arch_vcpu_ioctl(struct file *filp,
                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
                         goto out;
                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
-                                cpuid_arg->entries);
+                                              cpuid_arg->entries);
                 if (r)
                         goto out;
                 break;
@@ -1490,7 +1533,7 @@ long kvm_arch_vcpu_ioctl(struct file *filp,
                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
                         goto out;
                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
-                                cpuid_arg->entries);
+                                              cpuid_arg->entries);
                 if (r)
                         goto out;
                 r = -EFAULT;
@@ -1710,6 +1753,15 @@ static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
         return r;
 }
 
+static int kvm_vm_ioctl_reinject(struct kvm *kvm,
+                                 struct kvm_reinject_control *control)
+{
+        if (!kvm->arch.vpit)
+                return -ENXIO;
+        kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
+        return 0;
+}
+
 /*
  * Get (and clear) the dirty memory log for a memory slot.
  */
@@ -1807,13 +1859,26 @@ long kvm_arch_vm_ioctl(struct file *filp,
                         }
                 } else
                         goto out;
+                r = kvm_setup_default_irq_routing(kvm);
+                if (r) {
+                        kfree(kvm->arch.vpic);
+                        kfree(kvm->arch.vioapic);
+                        goto out;
+                }
                 break;
         case KVM_CREATE_PIT:
+                mutex_lock(&kvm->lock);
+                r = -EEXIST;
+                if (kvm->arch.vpit)
+                        goto create_pit_unlock;
                 r = -ENOMEM;
                 kvm->arch.vpit = kvm_create_pit(kvm);
                 if (kvm->arch.vpit)
                         r = 0;
+        create_pit_unlock:
+                mutex_unlock(&kvm->lock);
                 break;
+        case KVM_IRQ_LINE_STATUS:
         case KVM_IRQ_LINE: {
                 struct kvm_irq_level irq_event;
 
@@ -1821,10 +1886,17 @@ long kvm_arch_vm_ioctl(struct file *filp,
                 if (copy_from_user(&irq_event, argp, sizeof irq_event))
                         goto out;
                 if (irqchip_in_kernel(kvm)) {
+                        __s32 status;
                         mutex_lock(&kvm->lock);
-                        kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
-                                    irq_event.irq, irq_event.level);
+                        status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
+                                        irq_event.irq, irq_event.level);
                         mutex_unlock(&kvm->lock);
+                        if (ioctl == KVM_IRQ_LINE_STATUS) {
+                                irq_event.status = status;
+                                if (copy_to_user(argp, &irq_event,
+                                                        sizeof irq_event))
+                                        goto out;
+                        }
                         r = 0;
                 }
                 break;
@@ -1907,6 +1979,17 @@ long kvm_arch_vm_ioctl(struct file *filp,
                 r = 0;
                 break;
         }
+        case KVM_REINJECT_CONTROL: {
+                struct kvm_reinject_control control;
+                r =  -EFAULT;
+                if (copy_from_user(&control, argp, sizeof(control)))
+                        goto out;
+                r = kvm_vm_ioctl_reinject(kvm, &control);
+                if (r)
+                        goto out;
+                r = 0;
+                break;
+        }
         default:
                 ;
         }
@@ -1960,10 +2043,38 @@ static struct kvm_io_device *vcpu_find_mmio_dev(struct kvm_vcpu *vcpu,
         return dev;
 }
 
-int emulator_read_std(unsigned long addr,
-                             void *val,
-                             unsigned int bytes,
-                             struct kvm_vcpu *vcpu)
+static int kvm_read_guest_virt(gva_t addr, void *val, unsigned int bytes,
+                               struct kvm_vcpu *vcpu)
+{
+        void *data = val;
+        int r = X86EMUL_CONTINUE;
+
+        while (bytes) {
+                gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
+                unsigned offset = addr & (PAGE_SIZE-1);
+                unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
+                int ret;
+
+                if (gpa == UNMAPPED_GVA) {
+                        r = X86EMUL_PROPAGATE_FAULT;
+                        goto out;
+                }
+                ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
+                if (ret < 0) {
+                        r = X86EMUL_UNHANDLEABLE;
+                        goto out;
+                }
+
+                bytes -= toread;
+                data += toread;
+                addr += toread;
+        }
+out:
+        return r;
+}
+
+static int kvm_write_guest_virt(gva_t addr, void *val, unsigned int bytes,
+                                struct kvm_vcpu *vcpu)
 {
         void *data = val;
         int r = X86EMUL_CONTINUE;
@@ -1971,27 +2082,27 @@ int emulator_read_std(unsigned long addr,
         while (bytes) {
                 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
                 unsigned offset = addr & (PAGE_SIZE-1);
-                unsigned tocopy = min(bytes, (unsigned)PAGE_SIZE - offset);
+                unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
                 int ret;
 
                 if (gpa == UNMAPPED_GVA) {
                         r = X86EMUL_PROPAGATE_FAULT;
                         goto out;
                 }
-                ret = kvm_read_guest(vcpu->kvm, gpa, data, tocopy);
+                ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
                 if (ret < 0) {
                         r = X86EMUL_UNHANDLEABLE;
                         goto out;
                 }
 
-                bytes -= tocopy;
-                data += tocopy;
-                addr += tocopy;
+                bytes -= towrite;
+                data += towrite;
+                addr += towrite;
         }
 out:
         return r;
 }
-EXPORT_SYMBOL_GPL(emulator_read_std);
+
 
 static int emulator_read_emulated(unsigned long addr,
                                   void *val,
@@ -2013,8 +2124,8 @@ static int emulator_read_emulated(unsigned long addr,
         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
                 goto mmio;
 
-        if (emulator_read_std(addr, val, bytes, vcpu)
-                        == X86EMUL_CONTINUE)
+        if (kvm_read_guest_virt(addr, val, bytes, vcpu)
+                                == X86EMUL_CONTINUE)
                 return X86EMUL_CONTINUE;
         if (gpa == UNMAPPED_GVA)
                 return X86EMUL_PROPAGATE_FAULT;
@@ -2217,7 +2328,7 @@ void kvm_report_emulation_failure(struct kvm_vcpu *vcpu, const char *context)
 
         rip_linear = rip + get_segment_base(vcpu, VCPU_SREG_CS);
 
-        emulator_read_std(rip_linear, (void *)opcodes, 4, vcpu);
+        kvm_read_guest_virt(rip_linear, (void *)opcodes, 4, vcpu);
 
         printk(KERN_ERR "emulation failed (%s) rip %lx %02x %02x %02x %02x\n",
                context, rip, opcodes[0], opcodes[1], opcodes[2], opcodes[3]);
@@ -2225,7 +2336,7 @@ void kvm_report_emulation_failure(struct kvm_vcpu *vcpu, const char *context)
 EXPORT_SYMBOL_GPL(kvm_report_emulation_failure);
 
 static struct x86_emulate_ops emulate_ops = {
-        .read_std            = emulator_read_std,
+        .read_std            = kvm_read_guest_virt,
         .read_emulated       = emulator_read_emulated,
         .write_emulated      = emulator_write_emulated,
         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
@@ -2327,40 +2438,19 @@ int emulate_instruction(struct kvm_vcpu *vcpu,
 }
 EXPORT_SYMBOL_GPL(emulate_instruction);
 
-static void free_pio_guest_pages(struct kvm_vcpu *vcpu)
-{
-        int i;
-
-        for (i = 0; i < ARRAY_SIZE(vcpu->arch.pio.guest_pages); ++i)
-                if (vcpu->arch.pio.guest_pages[i]) {
-                        kvm_release_page_dirty(vcpu->arch.pio.guest_pages[i]);
-                        vcpu->arch.pio.guest_pages[i] = NULL;
-                }
-}
-
 static int pio_copy_data(struct kvm_vcpu *vcpu)
 {
         void *p = vcpu->arch.pio_data;
-        void *q;
+        gva_t q = vcpu->arch.pio.guest_gva;
         unsigned bytes;
-        int nr_pages = vcpu->arch.pio.guest_pages[1] ? 2 : 1;
+        int ret;
 
-        q = vmap(vcpu->arch.pio.guest_pages, nr_pages, VM_READ|VM_WRITE,
-                 PAGE_KERNEL);
-        if (!q) {
-                free_pio_guest_pages(vcpu);
-                return -ENOMEM;
-        }
-        q += vcpu->arch.pio.guest_page_offset;
         bytes = vcpu->arch.pio.size * vcpu->arch.pio.cur_count;
         if (vcpu->arch.pio.in)
-                memcpy(q, p, bytes);
+                ret = kvm_write_guest_virt(q, p, bytes, vcpu);
         else
-                memcpy(p, q, bytes);
-        q -= vcpu->arch.pio.guest_page_offset;
-        vunmap(q);
-        free_pio_guest_pages(vcpu);
-        return 0;
+                ret = kvm_read_guest_virt(q, p, bytes, vcpu);
+        return ret;
 }
 
 int complete_pio(struct kvm_vcpu *vcpu)
@@ -2471,7 +2561,6 @@ int kvm_emulate_pio(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
         vcpu->arch.pio.in = in;
         vcpu->arch.pio.string = 0;
         vcpu->arch.pio.down = 0;
-        vcpu->arch.pio.guest_page_offset = 0;
         vcpu->arch.pio.rep = 0;
 
         if (vcpu->run->io.direction == KVM_EXIT_IO_IN)
@@ -2499,9 +2588,7 @@ int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
                   gva_t address, int rep, unsigned port)
 {
         unsigned now, in_page;
-        int i, ret = 0;
-        int nr_pages = 1;
-        struct page *page;
+        int ret = 0;
         struct kvm_io_device *pio_dev;
 
         vcpu->run->exit_reason = KVM_EXIT_IO;
@@ -2513,7 +2600,6 @@ int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
         vcpu->arch.pio.in = in;
         vcpu->arch.pio.string = 1;
         vcpu->arch.pio.down = down;
-        vcpu->arch.pio.guest_page_offset = offset_in_page(address);
         vcpu->arch.pio.rep = rep;
 
         if (vcpu->run->io.direction == KVM_EXIT_IO_IN)
@@ -2533,15 +2619,8 @@ int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
         else
                 in_page = offset_in_page(address) + size;
         now = min(count, (unsigned long)in_page / size);
-        if (!now) {
-                /*
-                 * String I/O straddles page boundary.  Pin two guest pages
-                 * so that we satisfy atomicity constraints.  Do just one
-                 * transaction to avoid complexity.
-                 */
-                nr_pages = 2;
+        if (!now)
                 now = 1;
-        }
         if (down) {
                 /*
                  * String I/O in reverse.  Yuck.  Kill the guest, fix later.
@@ -2556,15 +2635,7 @@ int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
         if (vcpu->arch.pio.cur_count == vcpu->arch.pio.count)
                 kvm_x86_ops->skip_emulated_instruction(vcpu);
 
-        for (i = 0; i < nr_pages; ++i) {
-                page = gva_to_page(vcpu, address + i * PAGE_SIZE);
-                vcpu->arch.pio.guest_pages[i] = page;
-                if (!page) {
-                        kvm_inject_gp(vcpu, 0);
-                        free_pio_guest_pages(vcpu);
-                        return 1;
-                }
-        }
+        vcpu->arch.pio.guest_gva = address;
 
         pio_dev = vcpu_find_pio_dev(vcpu, port,
                                     vcpu->arch.pio.cur_count,
@@ -2572,7 +2643,11 @@ int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
         if (!vcpu->arch.pio.in) {
                 /* string PIO write */
                 ret = pio_copy_data(vcpu);
-                if (ret >= 0 && pio_dev) {
+                if (ret == X86EMUL_PROPAGATE_FAULT) {
+                        kvm_inject_gp(vcpu, 0);
+                        return 1;
+                }
+                if (ret == 0 && pio_dev) {
                         pio_string_write(pio_dev, vcpu);
                         complete_pio(vcpu);
                         if (vcpu->arch.pio.count == 0)
@@ -2587,9 +2662,72 @@ int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
 }
 EXPORT_SYMBOL_GPL(kvm_emulate_pio_string);
 
+static void bounce_off(void *info)
+{
+        /* nothing */
+}
+
+static unsigned int  ref_freq;
+static unsigned long tsc_khz_ref;
+
+static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
+                                     void *data)
+{
+        struct cpufreq_freqs *freq = data;
+        struct kvm *kvm;
+        struct kvm_vcpu *vcpu;
+        int i, send_ipi = 0;
+
+        if (!ref_freq)
+                ref_freq = freq->old;
+
+        if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
+                return 0;
+        if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
+                return 0;
+        per_cpu(cpu_tsc_khz, freq->cpu) = cpufreq_scale(tsc_khz_ref, ref_freq, freq->new);
+
+        spin_lock(&kvm_lock);
+        list_for_each_entry(kvm, &vm_list, vm_list) {
+                for (i = 0; i < KVM_MAX_VCPUS; ++i) {
+                        vcpu = kvm->vcpus[i];
+                        if (!vcpu)
+                                continue;
+                        if (vcpu->cpu != freq->cpu)
+                                continue;
+                        if (!kvm_request_guest_time_update(vcpu))
+                                continue;
+                        if (vcpu->cpu != smp_processor_id())
+                                send_ipi++;
+                }
+        }
+        spin_unlock(&kvm_lock);
+
+        if (freq->old < freq->new && send_ipi) {
+                /*
+                 * We upscale the frequency.  Must make the guest
+                 * doesn't see old kvmclock values while running with
+                 * the new frequency, otherwise we risk the guest sees
+                 * time go backwards.
+                 *
+                 * In case we update the frequency for another cpu
+                 * (which might be in guest context) send an interrupt
+                 * to kick the cpu out of guest context.  Next time
+                 * guest context is entered kvmclock will be updated,
+                 * so the guest will not see stale values.
+                 */
+                smp_call_function_single(freq->cpu, bounce_off, NULL, 1);
+        }
+        return 0;
+}
+
+static struct notifier_block kvmclock_cpufreq_notifier_block = {
+        .notifier_call  = kvmclock_cpufreq_notifier
+};
+
 int kvm_arch_init(void *opaque)
 {
-        int r;
+        int r, cpu;
         struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
 
         if (kvm_x86_ops) {
@@ -2620,6 +2758,15 @@ int kvm_arch_init(void *opaque)
         kvm_mmu_set_base_ptes(PT_PRESENT_MASK);
         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
                         PT_DIRTY_MASK, PT64_NX_MASK, 0, 0);
+
+        for_each_possible_cpu(cpu)
+                per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
+        if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
+                tsc_khz_ref = tsc_khz;
+                cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
+                                          CPUFREQ_TRANSITION_NOTIFIER);
+        }
+
         return 0;
 
 out:
@@ -2827,25 +2974,20 @@ static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
         if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
                 return 0;
         if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
-                !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
+            !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
                 return 0;
         return 1;
 }
 
-void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
+struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
+                                              u32 function, u32 index)
 {
         int i;
-        u32 function, index;
-        struct kvm_cpuid_entry2 *e, *best;
+        struct kvm_cpuid_entry2 *best = NULL;
 
-        function = kvm_register_read(vcpu, VCPU_REGS_RAX);
-        index = kvm_register_read(vcpu, VCPU_REGS_RCX);
-        kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
-        kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
-        kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
-        kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
-        best = NULL;
         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
+                struct kvm_cpuid_entry2 *e;
+
                 e = &vcpu->arch.cpuid_entries[i];
                 if (is_matching_cpuid_entry(e, function, index)) {
                         if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
@@ -2860,6 +3002,21 @@ void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
                         if (!best || e->function > best->function)
                                 best = e;
         }
+        return best;
+}
+
+void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
+{
+        u32 function, index;
+        struct kvm_cpuid_entry2 *best;
+
+        function = kvm_register_read(vcpu, VCPU_REGS_RAX);
+        index = kvm_register_read(vcpu, VCPU_REGS_RCX);
+        kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
+        kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
+        kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
+        kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
+        best = kvm_find_cpuid_entry(vcpu, function, index);
         if (best) {
                 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
                 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
@@ -2945,6 +3102,8 @@ static int vcpu_enter_guest(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
         if (vcpu->requests) {
                 if (test_and_clear_bit(KVM_REQ_MIGRATE_TIMER, &vcpu->requests))
                         __kvm_migrate_timers(vcpu);
+                if (test_and_clear_bit(KVM_REQ_KVMCLOCK_UPDATE, &vcpu->requests))
+                        kvm_write_guest_time(vcpu);
                 if (test_and_clear_bit(KVM_REQ_MMU_SYNC, &vcpu->requests))
                         kvm_mmu_sync_roots(vcpu);
                 if (test_and_clear_bit(KVM_REQ_TLB_FLUSH, &vcpu->requests))
@@ -2979,9 +3138,6 @@ static int vcpu_enter_guest(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
                 goto out;
         }
 
-        if (vcpu->guest_debug.enabled)
-                kvm_x86_ops->guest_debug_pre(vcpu);
-
         vcpu->guest_mode = 1;
         /*
          * Make sure that guest_mode assignment won't happen after
@@ -3002,10 +3158,34 @@ static int vcpu_enter_guest(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
 
         kvm_guest_enter();
 
+        get_debugreg(vcpu->arch.host_dr6, 6);
+        get_debugreg(vcpu->arch.host_dr7, 7);
+        if (unlikely(vcpu->arch.switch_db_regs)) {
+                get_debugreg(vcpu->arch.host_db[0], 0);
+                get_debugreg(vcpu->arch.host_db[1], 1);
+                get_debugreg(vcpu->arch.host_db[2], 2);
+                get_debugreg(vcpu->arch.host_db[3], 3);
+
+                set_debugreg(0, 7);
+                set_debugreg(vcpu->arch.eff_db[0], 0);
+                set_debugreg(vcpu->arch.eff_db[1], 1);
+                set_debugreg(vcpu->arch.eff_db[2], 2);
+                set_debugreg(vcpu->arch.eff_db[3], 3);
+        }
 
         KVMTRACE_0D(VMENTRY, vcpu, entryexit);
         kvm_x86_ops->run(vcpu, kvm_run);
 
+        if (unlikely(vcpu->arch.switch_db_regs)) {
+                set_debugreg(0, 7);
+                set_debugreg(vcpu->arch.host_db[0], 0);
+                set_debugreg(vcpu->arch.host_db[1], 1);
+                set_debugreg(vcpu->arch.host_db[2], 2);
+                set_debugreg(vcpu->arch.host_db[3], 3);
+        }
+        set_debugreg(vcpu->arch.host_dr6, 6);
+        set_debugreg(vcpu->arch.host_dr7, 7);
+
         vcpu->guest_mode = 0;
         local_irq_enable();
 
@@ -3192,7 +3372,7 @@ int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
         /*
          * Don't leak debug flags in case they were set for guest debugging
          */
-        if (vcpu->guest_debug.enabled && vcpu->guest_debug.singlestep)
+        if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
                 regs->rflags &= ~(X86_EFLAGS_TF | X86_EFLAGS_RF);
 
         vcpu_put(vcpu);
@@ -3811,15 +3991,32 @@ int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
         return 0;
 }
 
-int kvm_arch_vcpu_ioctl_debug_guest(struct kvm_vcpu *vcpu,
-                                    struct kvm_debug_guest *dbg)
+int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
+                                        struct kvm_guest_debug *dbg)
 {
-        int r;
+        int i, r;
 
         vcpu_load(vcpu);
 
+        if ((dbg->control & (KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_HW_BP)) ==
+            (KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_HW_BP)) {
+                for (i = 0; i < KVM_NR_DB_REGS; ++i)
+                        vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
+                vcpu->arch.switch_db_regs =
+                        (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
+        } else {
+                for (i = 0; i < KVM_NR_DB_REGS; i++)
+                        vcpu->arch.eff_db[i] = vcpu->arch.db[i];
+                vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
+        }
+
         r = kvm_x86_ops->set_guest_debug(vcpu, dbg);
 
+        if (dbg->control & KVM_GUESTDBG_INJECT_DB)
+                kvm_queue_exception(vcpu, DB_VECTOR);
+        else if (dbg->control & KVM_GUESTDBG_INJECT_BP)
+                kvm_queue_exception(vcpu, BP_VECTOR);
+
         vcpu_put(vcpu);
 
         return r;
@@ -4007,6 +4204,11 @@ int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
         vcpu->arch.nmi_pending = false;
         vcpu->arch.nmi_injected = false;
 
+        vcpu->arch.switch_db_regs = 0;
+        memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
+        vcpu->arch.dr6 = DR6_FIXED_1;
+        vcpu->arch.dr7 = DR7_FIXED_1;
+
         return kvm_x86_ops->vcpu_reset(vcpu);
 }
 
@@ -4100,6 +4302,8 @@ struct  kvm *kvm_arch_create_vm(void)
         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
 
+        rdtscll(kvm->arch.vm_init_tsc);
+
         return kvm;
 }
 
diff --git a/arch/x86/kvm/x86_emulate.c b/arch/x86/kvm/x86_emulate.c
index d174db7a3370..ca91749d2083 100644
--- a/arch/x86/kvm/x86_emulate.c
+++ b/arch/x86/kvm/x86_emulate.c
@@ -178,7 +178,7 @@ static u32 opcode_table[256] = {
         0, ImplicitOps | Stack, 0, 0,
         ByteOp | DstMem | SrcImm | ModRM | Mov, DstMem | SrcImm | ModRM | Mov,
         /* 0xC8 - 0xCF */
-        0, 0, 0, 0, 0, 0, 0, 0,
+        0, 0, 0, ImplicitOps | Stack, 0, 0, 0, 0,
         /* 0xD0 - 0xD7 */
         ByteOp | DstMem | SrcImplicit | ModRM, DstMem | SrcImplicit | ModRM,
         ByteOp | DstMem | SrcImplicit | ModRM, DstMem | SrcImplicit | ModRM,
@@ -1136,18 +1136,19 @@ static inline void emulate_push(struct x86_emulate_ctxt *ctxt)
 }
 
 static int emulate_pop(struct x86_emulate_ctxt *ctxt,
-                       struct x86_emulate_ops *ops)
+                       struct x86_emulate_ops *ops,
+                       void *dest, int len)
 {
         struct decode_cache *c = &ctxt->decode;
         int rc;
 
         rc = ops->read_emulated(register_address(c, ss_base(ctxt),
                                                  c->regs[VCPU_REGS_RSP]),
-                                &c->src.val, c->src.bytes, ctxt->vcpu);
+                                dest, len, ctxt->vcpu);
         if (rc != 0)
                 return rc;
 
-        register_address_increment(c, &c->regs[VCPU_REGS_RSP], c->src.bytes);
+        register_address_increment(c, &c->regs[VCPU_REGS_RSP], len);
         return rc;
 }
 
@@ -1157,11 +1158,9 @@ static inline int emulate_grp1a(struct x86_emulate_ctxt *ctxt,
         struct decode_cache *c = &ctxt->decode;
         int rc;
 
-        c->src.bytes = c->dst.bytes;
-        rc = emulate_pop(ctxt, ops);
+        rc = emulate_pop(ctxt, ops, &c->dst.val, c->dst.bytes);
         if (rc != 0)
                 return rc;
-        c->dst.val = c->src.val;
         return 0;
 }
 
@@ -1279,6 +1278,25 @@ static inline int emulate_grp9(struct x86_emulate_ctxt *ctxt,
         return 0;
 }
 
+static int emulate_ret_far(struct x86_emulate_ctxt *ctxt,
+                           struct x86_emulate_ops *ops)
+{
+        struct decode_cache *c = &ctxt->decode;
+        int rc;
+        unsigned long cs;
+
+        rc = emulate_pop(ctxt, ops, &c->eip, c->op_bytes);
+        if (rc)
+                return rc;
+        if (c->op_bytes == 4)
+                c->eip = (u32)c->eip;
+        rc = emulate_pop(ctxt, ops, &cs, c->op_bytes);
+        if (rc)
+                return rc;
+        rc = kvm_load_segment_descriptor(ctxt->vcpu, (u16)cs, 1, VCPU_SREG_CS);
+        return rc;
+}
+
 static inline int writeback(struct x86_emulate_ctxt *ctxt,
                             struct x86_emulate_ops *ops)
 {
@@ -1467,11 +1485,9 @@ special_insn:
                 break;
         case 0x58 ... 0x5f: /* pop reg */
         pop_instruction:
-                c->src.bytes = c->op_bytes;
-                rc = emulate_pop(ctxt, ops);
+                rc = emulate_pop(ctxt, ops, &c->dst.val, c->op_bytes);
                 if (rc != 0)
                         goto done;
-                c->dst.val = c->src.val;
                 break;
         case 0x63:              /* movsxd */
                 if (ctxt->mode != X86EMUL_MODE_PROT64)
@@ -1738,6 +1754,11 @@ special_insn:
         mov:
                 c->dst.val = c->src.val;
                 break;
+        case 0xcb:              /* ret far */
+                rc = emulate_ret_far(ctxt, ops);
+                if (rc)
+                        goto done;
+                break;
         case 0xd0 ... 0xd1:     /* Grp2 */
                 c->src.val = 1;
                 emulate_grp2(ctxt);
@@ -1908,11 +1929,16 @@ twobyte_insn:
                         c->dst.type = OP_NONE;
                         break;
                 case 3: /* lidt/vmmcall */
-                        if (c->modrm_mod == 3 && c->modrm_rm == 1) {
-                                rc = kvm_fix_hypercall(ctxt->vcpu);
-                                if (rc)
-                                        goto done;
-                                kvm_emulate_hypercall(ctxt->vcpu);
+                        if (c->modrm_mod == 3) {
+                                switch (c->modrm_rm) {
+                                case 1:
+                                        rc = kvm_fix_hypercall(ctxt->vcpu);
+                                        if (rc)
+                                                goto done;
+                                        break;
+                                default:
+                                        goto cannot_emulate;
+                                }
                         } else {
                                 rc = read_descriptor(ctxt, ops, c->src.ptr,
                                                      &size, &address,
diff --git a/arch/x86/lguest/Kconfig b/arch/x86/lguest/Kconfig
index c70e12b1a637..8dab8f7844d3 100644
--- a/arch/x86/lguest/Kconfig
+++ b/arch/x86/lguest/Kconfig
@@ -3,7 +3,6 @@ config LGUEST_GUEST
         select PARAVIRT
         depends on X86_32
         depends on !X86_PAE
-        depends on !X86_VOYAGER
         select VIRTIO
         select VIRTIO_RING
         select VIRTIO_CONSOLE
diff --git a/arch/x86/lguest/boot.c b/arch/x86/lguest/boot.c
index 960a8d9c049c..9fe4ddaa8f6f 100644
--- a/arch/x86/lguest/boot.c
+++ b/arch/x86/lguest/boot.c
@@ -173,24 +173,29 @@ static unsigned long save_fl(void)
 {
         return lguest_data.irq_enabled;
 }
+PV_CALLEE_SAVE_REGS_THUNK(save_fl);
 
 /* restore_flags() just sets the flags back to the value given. */
 static void restore_fl(unsigned long flags)
 {
         lguest_data.irq_enabled = flags;
 }
+PV_CALLEE_SAVE_REGS_THUNK(restore_fl);
 
 /* Interrupts go off... */
 static void irq_disable(void)
 {
         lguest_data.irq_enabled = 0;
 }
+PV_CALLEE_SAVE_REGS_THUNK(irq_disable);
 
 /* Interrupts go on... */
 static void irq_enable(void)
 {
         lguest_data.irq_enabled = X86_EFLAGS_IF;
 }
+PV_CALLEE_SAVE_REGS_THUNK(irq_enable);
+
 /*:*/
 /*M:003 Note that we don't check for outstanding interrupts when we re-enable
  * them (or when we unmask an interrupt).  This seems to work for the moment,
@@ -278,7 +283,7 @@ static void lguest_load_tls(struct thread_struct *t, unsigned int cpu)
         /* There's one problem which normal hardware doesn't have: the Host
          * can't handle us removing entries we're currently using.  So we clear
          * the GS register here: if it's needed it'll be reloaded anyway. */
-        loadsegment(gs, 0);
+        lazy_load_gs(0);
         lazy_hcall(LHCALL_LOAD_TLS, __pa(&t->tls_array), cpu, 0);
 }
 
@@ -830,13 +835,14 @@ static u32 lguest_apic_safe_wait_icr_idle(void)
         return 0;
 }
 
-static struct apic_ops lguest_basic_apic_ops = {
-        .read = lguest_apic_read,
-        .write = lguest_apic_write,
-        .icr_read = lguest_apic_icr_read,
-        .icr_write = lguest_apic_icr_write,
-        .wait_icr_idle = lguest_apic_wait_icr_idle,
-        .safe_wait_icr_idle = lguest_apic_safe_wait_icr_idle,
+static void set_lguest_basic_apic_ops(void)
+{
+        apic->read = lguest_apic_read;
+        apic->write = lguest_apic_write;
+        apic->icr_read = lguest_apic_icr_read;
+        apic->icr_write = lguest_apic_icr_write;
+        apic->wait_icr_idle = lguest_apic_wait_icr_idle;
+        apic->safe_wait_icr_idle = lguest_apic_safe_wait_icr_idle;
 };
 #endif
 
@@ -991,10 +997,10 @@ __init void lguest_init(void)
 
         /* interrupt-related operations */
         pv_irq_ops.init_IRQ = lguest_init_IRQ;
-        pv_irq_ops.save_fl = save_fl;
-        pv_irq_ops.restore_fl = restore_fl;
-        pv_irq_ops.irq_disable = irq_disable;
-        pv_irq_ops.irq_enable = irq_enable;
+        pv_irq_ops.save_fl = PV_CALLEE_SAVE(save_fl);
+        pv_irq_ops.restore_fl = PV_CALLEE_SAVE(restore_fl);
+        pv_irq_ops.irq_disable = PV_CALLEE_SAVE(irq_disable);
+        pv_irq_ops.irq_enable = PV_CALLEE_SAVE(irq_enable);
         pv_irq_ops.safe_halt = lguest_safe_halt;
 
         /* init-time operations */
@@ -1037,7 +1043,7 @@ __init void lguest_init(void)
 
 #ifdef CONFIG_X86_LOCAL_APIC
         /* apic read/write intercepts */
-        apic_ops = &lguest_basic_apic_ops;
+        set_lguest_basic_apic_ops();
 #endif
 
         /* time operations */
diff --git a/arch/x86/lib/getuser.S b/arch/x86/lib/getuser.S
index ad374003742f..51f1504cddd9 100644
--- a/arch/x86/lib/getuser.S
+++ b/arch/x86/lib/getuser.S
@@ -28,7 +28,7 @@
 
 #include <linux/linkage.h>
 #include <asm/dwarf2.h>
-#include <asm/page.h>
+#include <asm/page_types.h>
 #include <asm/errno.h>
 #include <asm/asm-offsets.h>
 #include <asm/thread_info.h>
diff --git a/arch/x86/mach-default/Makefile b/arch/x86/mach-default/Makefile
deleted file mode 100644
index 012fe34459e6..000000000000
--- a/arch/x86/mach-default/Makefile
+++ /dev/null
@@ -1,5 +0,0 @@
-#
-# Makefile for the linux kernel.
-#
-
-obj-y                           := setup.o
diff --git a/arch/x86/mach-default/setup.c b/arch/x86/mach-default/setup.c
deleted file mode 100644
index 50b591871128..000000000000
--- a/arch/x86/mach-default/setup.c
+++ /dev/null
@@ -1,174 +0,0 @@
-/*
- *      Machine specific setup for generic
- */
-
-#include <linux/smp.h>
-#include <linux/init.h>
-#include <linux/interrupt.h>
-#include <asm/acpi.h>
-#include <asm/arch_hooks.h>
-#include <asm/e820.h>
-#include <asm/setup.h>
-
-#include <mach_ipi.h>
-
-#ifdef CONFIG_HOTPLUG_CPU
-#define DEFAULT_SEND_IPI        (1)
-#else
-#define DEFAULT_SEND_IPI        (0)
-#endif
-
-int no_broadcast = DEFAULT_SEND_IPI;
-
-/**
- * pre_intr_init_hook - initialisation prior to setting up interrupt vectors
- *
- * Description:
- *      Perform any necessary interrupt initialisation prior to setting up
- *      the "ordinary" interrupt call gates.  For legacy reasons, the ISA
- *      interrupts should be initialised here if the machine emulates a PC
- *      in any way.
- **/
-void __init pre_intr_init_hook(void)
-{
-        if (x86_quirks->arch_pre_intr_init) {
-                if (x86_quirks->arch_pre_intr_init())
-                        return;
-        }
-        init_ISA_irqs();
-}
-
-/*
- * IRQ2 is cascade interrupt to second interrupt controller
- */
-static struct irqaction irq2 = {
-        .handler = no_action,
-        .mask = CPU_MASK_NONE,
-        .name = "cascade",
-};
-
-/**
- * intr_init_hook - post gate setup interrupt initialisation
- *
- * Description:
- *      Fill in any interrupts that may have been left out by the general
- *      init_IRQ() routine.  interrupts having to do with the machine rather
- *      than the devices on the I/O bus (like APIC interrupts in intel MP
- *      systems) are started here.
- **/
-void __init intr_init_hook(void)
-{
-        if (x86_quirks->arch_intr_init) {
-                if (x86_quirks->arch_intr_init())
-                        return;
-        }
-        if (!acpi_ioapic)
-                setup_irq(2, &irq2);
-
-}
-
-/**
- * pre_setup_arch_hook - hook called prior to any setup_arch() execution
- *
- * Description:
- *      generally used to activate any machine specific identification
- *      routines that may be needed before setup_arch() runs.  On Voyager
- *      this is used to get the board revision and type.
- **/
-void __init pre_setup_arch_hook(void)
-{
-}
-
-/**
- * trap_init_hook - initialise system specific traps
- *
- * Description:
- *      Called as the final act of trap_init().  Used in VISWS to initialise
- *      the various board specific APIC traps.
- **/
-void __init trap_init_hook(void)
-{
-        if (x86_quirks->arch_trap_init) {
-                if (x86_quirks->arch_trap_init())
-                        return;
-        }
-}
-
-static struct irqaction irq0  = {
-        .handler = timer_interrupt,
-        .flags = IRQF_DISABLED | IRQF_NOBALANCING | IRQF_IRQPOLL | IRQF_TIMER,
-        .mask = CPU_MASK_NONE,
-        .name = "timer"
-};
-
-/**
- * pre_time_init_hook - do any specific initialisations before.
- *
- **/
-void __init pre_time_init_hook(void)
-{
-        if (x86_quirks->arch_pre_time_init)
-                x86_quirks->arch_pre_time_init();
-}
-
-/**
- * time_init_hook - do any specific initialisations for the system timer.
- *
- * Description:
- *      Must plug the system timer interrupt source at HZ into the IRQ listed
- *      in irq_vectors.h:TIMER_IRQ
- **/
-void __init time_init_hook(void)
-{
-        if (x86_quirks->arch_time_init) {
-                /*
-                 * A nonzero return code does not mean failure, it means
-                 * that the architecture quirk does not want any
-                 * generic (timer) setup to be performed after this:
-                 */
-                if (x86_quirks->arch_time_init())
-                        return;
-        }
-
-        irq0.mask = cpumask_of_cpu(0);
-        setup_irq(0, &irq0);
-}
-
-#ifdef CONFIG_MCA
-/**
- * mca_nmi_hook - hook into MCA specific NMI chain
- *
- * Description:
- *      The MCA (Microchannel Architecture) has an NMI chain for NMI sources
- *      along the MCA bus.  Use this to hook into that chain if you will need
- *      it.
- **/
-void mca_nmi_hook(void)
-{
-        /*
-         * If I recall correctly, there's a whole bunch of other things that
-         * we can do to check for NMI problems, but that's all I know about
-         * at the moment.
-         */
-        pr_warning("NMI generated from unknown source!\n");
-}
-#endif
-
-static __init int no_ipi_broadcast(char *str)
-{
-        get_option(&str, &no_broadcast);
-        pr_info("Using %s mode\n",
-                no_broadcast ? "No IPI Broadcast" : "IPI Broadcast");
-        return 1;
-}
-__setup("no_ipi_broadcast=", no_ipi_broadcast);
-
-static int __init print_ipi_mode(void)
-{
-        pr_info("Using IPI %s mode\n",
-                no_broadcast ? "No-Shortcut" : "Shortcut");
-        return 0;
-}
-
-late_initcall(print_ipi_mode);
-
diff --git a/arch/x86/mach-generic/Makefile b/arch/x86/mach-generic/Makefile
deleted file mode 100644
index 6730f4e7c744..000000000000
--- a/arch/x86/mach-generic/Makefile
+++ /dev/null
@@ -1,11 +0,0 @@
-#
-# Makefile for the generic architecture
-#
-
-EXTRA_CFLAGS                    := -Iarch/x86/kernel
-
-obj-y                           := probe.o default.o
-obj-$(CONFIG_X86_NUMAQ)         += numaq.o
-obj-$(CONFIG_X86_SUMMIT)        += summit.o
-obj-$(CONFIG_X86_BIGSMP)        += bigsmp.o
-obj-$(CONFIG_X86_ES7000)        += es7000.o
diff --git a/arch/x86/mach-generic/bigsmp.c b/arch/x86/mach-generic/bigsmp.c
deleted file mode 100644
index bc4c7840b2a8..000000000000
--- a/arch/x86/mach-generic/bigsmp.c
+++ /dev/null
@@ -1,60 +0,0 @@
-/*
- * APIC driver for "bigsmp" XAPIC machines with more than 8 virtual CPUs.
- * Drives the local APIC in "clustered mode".
- */
-#define APIC_DEFINITION 1
-#include <linux/threads.h>
-#include <linux/cpumask.h>
-#include <asm/mpspec.h>
-#include <asm/genapic.h>
-#include <asm/fixmap.h>
-#include <asm/apicdef.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/dmi.h>
-#include <asm/bigsmp/apicdef.h>
-#include <linux/smp.h>
-#include <asm/bigsmp/apic.h>
-#include <asm/bigsmp/ipi.h>
-#include <asm/mach-default/mach_mpparse.h>
-#include <asm/mach-default/mach_wakecpu.h>
-
-static int dmi_bigsmp; /* can be set by dmi scanners */
-
-static int hp_ht_bigsmp(const struct dmi_system_id *d)
-{
-        printk(KERN_NOTICE "%s detected: force use of apic=bigsmp\n", d->ident);
-        dmi_bigsmp = 1;
-        return 0;
-}
-
-
-static const struct dmi_system_id bigsmp_dmi_table[] = {
-        { hp_ht_bigsmp, "HP ProLiant DL760 G2",
-        { DMI_MATCH(DMI_BIOS_VENDOR, "HP"),
-        DMI_MATCH(DMI_BIOS_VERSION, "P44-"),}
-        },
-
-        { hp_ht_bigsmp, "HP ProLiant DL740",
-        { DMI_MATCH(DMI_BIOS_VENDOR, "HP"),
-        DMI_MATCH(DMI_BIOS_VERSION, "P47-"),}
-        },
-         { }
-};
-
-static void vector_allocation_domain(int cpu, cpumask_t *retmask)
-{
-        cpus_clear(*retmask);
-        cpu_set(cpu, *retmask);
-}
-
-static int probe_bigsmp(void)
-{
-        if (def_to_bigsmp)
-                dmi_bigsmp = 1;
-        else
-                dmi_check_system(bigsmp_dmi_table);
-        return dmi_bigsmp;
-}
-
-struct genapic apic_bigsmp = APIC_INIT("bigsmp", probe_bigsmp);
diff --git a/arch/x86/mach-generic/default.c b/arch/x86/mach-generic/default.c
deleted file mode 100644
index e63a4a76d8cd..000000000000
--- a/arch/x86/mach-generic/default.c
+++ /dev/null
@@ -1,27 +0,0 @@
-/*
- * Default generic APIC driver. This handles up to 8 CPUs.
- */
-#define APIC_DEFINITION 1
-#include <linux/threads.h>
-#include <linux/cpumask.h>
-#include <asm/mpspec.h>
-#include <asm/mach-default/mach_apicdef.h>
-#include <asm/genapic.h>
-#include <asm/fixmap.h>
-#include <asm/apicdef.h>
-#include <linux/kernel.h>
-#include <linux/string.h>
-#include <linux/smp.h>
-#include <linux/init.h>
-#include <asm/mach-default/mach_apic.h>
-#include <asm/mach-default/mach_ipi.h>
-#include <asm/mach-default/mach_mpparse.h>
-#include <asm/mach-default/mach_wakecpu.h>
-
-/* should be called last. */
-static int probe_default(void)
-{
-        return 1;
-}
-
-struct genapic apic_default = APIC_INIT("default", probe_default);
diff --git a/arch/x86/mach-generic/es7000.c b/arch/x86/mach-generic/es7000.c
deleted file mode 100644
index c2ded1448024..000000000000
--- a/arch/x86/mach-generic/es7000.c
+++ /dev/null
@@ -1,103 +0,0 @@
-/*
- * APIC driver for the Unisys ES7000 chipset.
- */
-#define APIC_DEFINITION 1
-#include <linux/threads.h>
-#include <linux/cpumask.h>
-#include <asm/mpspec.h>
-#include <asm/genapic.h>
-#include <asm/fixmap.h>
-#include <asm/apicdef.h>
-#include <linux/kernel.h>
-#include <linux/string.h>
-#include <linux/init.h>
-#include <asm/es7000/apicdef.h>
-#include <linux/smp.h>
-#include <asm/es7000/apic.h>
-#include <asm/es7000/ipi.h>
-#include <asm/es7000/mpparse.h>
-#include <asm/mach-default/mach_wakecpu.h>
-
-void __init es7000_update_genapic_to_cluster(void)
-{
-        genapic->target_cpus = target_cpus_cluster;
-        genapic->int_delivery_mode = INT_DELIVERY_MODE_CLUSTER;
-        genapic->int_dest_mode = INT_DEST_MODE_CLUSTER;
-        genapic->no_balance_irq = NO_BALANCE_IRQ_CLUSTER;
-
-        genapic->init_apic_ldr = init_apic_ldr_cluster;
-
-        genapic->cpu_mask_to_apicid = cpu_mask_to_apicid_cluster;
-}
-
-static int probe_es7000(void)
-{
-        /* probed later in mptable/ACPI hooks */
-        return 0;
-}
-
-extern void es7000_sw_apic(void);
-static void __init enable_apic_mode(void)
-{
-        es7000_sw_apic();
-        return;
-}
-
-static __init int
-mps_oem_check(struct mpc_table *mpc, char *oem, char *productid)
-{
-        if (mpc->oemptr) {
-                struct mpc_oemtable *oem_table =
-                        (struct mpc_oemtable *)mpc->oemptr;
-                if (!strncmp(oem, "UNISYS", 6))
-                        return parse_unisys_oem((char *)oem_table);
-        }
-        return 0;
-}
-
-#ifdef CONFIG_ACPI
-/* Hook from generic ACPI tables.c */
-static int __init acpi_madt_oem_check(char *oem_id, char *oem_table_id)
-{
-        unsigned long oem_addr = 0;
-        int check_dsdt;
-        int ret = 0;
-
-        /* check dsdt at first to avoid clear fix_map for oem_addr */
-        check_dsdt = es7000_check_dsdt();
-
-        if (!find_unisys_acpi_oem_table(&oem_addr)) {
-                if (check_dsdt)
-                        ret = parse_unisys_oem((char *)oem_addr);
-                else {
-                        setup_unisys();
-                        ret = 1;
-                }
-                /*
-                 * we need to unmap it
-                 */
-                unmap_unisys_acpi_oem_table(oem_addr);
-        }
-        return ret;
-}
-#else
-static int __init acpi_madt_oem_check(char *oem_id, char *oem_table_id)
-{
-        return 0;
-}
-#endif
-
-static void vector_allocation_domain(int cpu, cpumask_t *retmask)
-{
-        /* Careful. Some cpus do not strictly honor the set of cpus
-         * specified in the interrupt destination when using lowest
-         * priority interrupt delivery mode.
-         *
-         * In particular there was a hyperthreading cpu observed to
-         * deliver interrupts to the wrong hyperthread when only one
-         * hyperthread was specified in the interrupt desitination.
-         */
-        *retmask = (cpumask_t){ { [0] = APIC_ALL_CPUS, } };
-}
-
-struct genapic __initdata_refok apic_es7000 = APIC_INIT("es7000", probe_es7000);
diff --git a/arch/x86/mach-generic/numaq.c b/arch/x86/mach-generic/numaq.c
deleted file mode 100644
index 3679e2255645..000000000000
--- a/arch/x86/mach-generic/numaq.c
+++ /dev/null
@@ -1,53 +0,0 @@
-/*
- * APIC driver for the IBM NUMAQ chipset.
- */
-#define APIC_DEFINITION 1
-#include <linux/threads.h>
-#include <linux/cpumask.h>
-#include <asm/mpspec.h>
-#include <asm/genapic.h>
-#include <asm/fixmap.h>
-#include <asm/apicdef.h>
-#include <linux/kernel.h>
-#include <linux/string.h>
-#include <linux/init.h>
-#include <asm/numaq/apicdef.h>
-#include <linux/smp.h>
-#include <asm/numaq/apic.h>
-#include <asm/numaq/ipi.h>
-#include <asm/numaq/mpparse.h>
-#include <asm/numaq/wakecpu.h>
-#include <asm/numaq.h>
-
-static int mps_oem_check(struct mpc_table *mpc, char *oem, char *productid)
-{
-        numaq_mps_oem_check(mpc, oem, productid);
-        return found_numaq;
-}
-
-static int probe_numaq(void)
-{
-        /* already know from get_memcfg_numaq() */
-        return found_numaq;
-}
-
-/* Hook from generic ACPI tables.c */
-static int acpi_madt_oem_check(char *oem_id, char *oem_table_id)
-{
-        return 0;
-}
-
-static void vector_allocation_domain(int cpu, cpumask_t *retmask)
-{
-        /* Careful. Some cpus do not strictly honor the set of cpus
-         * specified in the interrupt destination when using lowest
-         * priority interrupt delivery mode.
-         *
-         * In particular there was a hyperthreading cpu observed to
-         * deliver interrupts to the wrong hyperthread when only one
-         * hyperthread was specified in the interrupt desitination.
-         */
-        *retmask = (cpumask_t){ { [0] = APIC_ALL_CPUS, } };
-}
-
-struct genapic apic_numaq = APIC_INIT("NUMAQ", probe_numaq);
diff --git a/arch/x86/mach-generic/probe.c b/arch/x86/mach-generic/probe.c
deleted file mode 100644
index 15a38daef1a8..000000000000
--- a/arch/x86/mach-generic/probe.c
+++ /dev/null
@@ -1,152 +0,0 @@
-/*
- * Copyright 2003 Andi Kleen, SuSE Labs.
- * Subject to the GNU Public License, v.2
- *
- * Generic x86 APIC driver probe layer.
- */
-#include <linux/threads.h>
-#include <linux/cpumask.h>
-#include <linux/string.h>
-#include <linux/kernel.h>
-#include <linux/ctype.h>
-#include <linux/init.h>
-#include <linux/errno.h>
-#include <asm/fixmap.h>
-#include <asm/mpspec.h>
-#include <asm/apicdef.h>
-#include <asm/genapic.h>
-#include <asm/setup.h>
-
-extern struct genapic apic_numaq;
-extern struct genapic apic_summit;
-extern struct genapic apic_bigsmp;
-extern struct genapic apic_es7000;
-extern struct genapic apic_default;
-
-struct genapic *genapic = &apic_default;
-
-static struct genapic *apic_probe[] __initdata = {
-#ifdef CONFIG_X86_NUMAQ
-        &apic_numaq,
-#endif
-#ifdef CONFIG_X86_SUMMIT
-        &apic_summit,
-#endif
-#ifdef CONFIG_X86_BIGSMP
-        &apic_bigsmp,
-#endif
-#ifdef CONFIG_X86_ES7000
-        &apic_es7000,
-#endif
-        &apic_default,  /* must be last */
-        NULL,
-};
-
-static int cmdline_apic __initdata;
-static int __init parse_apic(char *arg)
-{
-        int i;
-
-        if (!arg)
-                return -EINVAL;
-
-        for (i = 0; apic_probe[i]; i++) {
-                if (!strcmp(apic_probe[i]->name, arg)) {
-                        genapic = apic_probe[i];
-                        cmdline_apic = 1;
-                        return 0;
-                }
-        }
-
-        if (x86_quirks->update_genapic)
-                x86_quirks->update_genapic();
-
-        /* Parsed again by __setup for debug/verbose */
-        return 0;
-}
-early_param("apic", parse_apic);
-
-void __init generic_bigsmp_probe(void)
-{
-#ifdef CONFIG_X86_BIGSMP
-        /*
-         * This routine is used to switch to bigsmp mode when
-         * - There is no apic= option specified by the user
-         * - generic_apic_probe() has chosen apic_default as the sub_arch
-         * - we find more than 8 CPUs in acpi LAPIC listing with xAPIC support
-         */
-
-        if (!cmdline_apic && genapic == &apic_default) {
-                if (apic_bigsmp.probe()) {
-                        genapic = &apic_bigsmp;
-                        if (x86_quirks->update_genapic)
-                                x86_quirks->update_genapic();
-                        printk(KERN_INFO "Overriding APIC driver with %s\n",
-                               genapic->name);
-                }
-        }
-#endif
-}
-
-void __init generic_apic_probe(void)
-{
-        if (!cmdline_apic) {
-                int i;
-                for (i = 0; apic_probe[i]; i++) {
-                        if (apic_probe[i]->probe()) {
-                                genapic = apic_probe[i];
-                                break;
-                        }
-                }
-                /* Not visible without early console */
-                if (!apic_probe[i])
-                        panic("Didn't find an APIC driver");
-
-                if (x86_quirks->update_genapic)
-                        x86_quirks->update_genapic();
-        }
-        printk(KERN_INFO "Using APIC driver %s\n", genapic->name);
-}
-
-/* These functions can switch the APIC even after the initial ->probe() */
-
-int __init mps_oem_check(struct mpc_table *mpc, char *oem, char *productid)
-{
-        int i;
-        for (i = 0; apic_probe[i]; ++i) {
-                if (apic_probe[i]->mps_oem_check(mpc, oem, productid)) {
-                        if (!cmdline_apic) {
-                                genapic = apic_probe[i];
-                                if (x86_quirks->update_genapic)
-                                        x86_quirks->update_genapic();
-                                printk(KERN_INFO "Switched to APIC driver `%s'.\n",
-                                       genapic->name);
-                        }
-                        return 1;
-                }
-        }
-        return 0;
-}
-
-int __init acpi_madt_oem_check(char *oem_id, char *oem_table_id)
-{
-        int i;
-        for (i = 0; apic_probe[i]; ++i) {
-                if (apic_probe[i]->acpi_madt_oem_check(oem_id, oem_table_id)) {
-                        if (!cmdline_apic) {
-                                genapic = apic_probe[i];
-                                if (x86_quirks->update_genapic)
-                                        x86_quirks->update_genapic();
-                                printk(KERN_INFO "Switched to APIC driver `%s'.\n",
-                                       genapic->name);
-                        }
-                        return 1;
-                }
-        }
-        return 0;
-}
-
-int hard_smp_processor_id(void)
-{
-        return genapic->get_apic_id(*(unsigned long *)(APIC_BASE+APIC_ID));
-}
diff --git a/arch/x86/mach-generic/summit.c b/arch/x86/mach-generic/summit.c
deleted file mode 100644
index 2821ffc188b5..000000000000
--- a/arch/x86/mach-generic/summit.c
+++ /dev/null
@@ -1,40 +0,0 @@
-/*
- * APIC driver for the IBM "Summit" chipset.
- */
-#define APIC_DEFINITION 1
-#include <linux/threads.h>
-#include <linux/cpumask.h>
-#include <asm/mpspec.h>
-#include <asm/genapic.h>
-#include <asm/fixmap.h>
-#include <asm/apicdef.h>
-#include <linux/kernel.h>
-#include <linux/string.h>
-#include <linux/init.h>
-#include <asm/summit/apicdef.h>
-#include <linux/smp.h>
-#include <asm/summit/apic.h>
-#include <asm/summit/ipi.h>
-#include <asm/summit/mpparse.h>
-#include <asm/mach-default/mach_wakecpu.h>
-
-static int probe_summit(void)
-{
-        /* probed later in mptable/ACPI hooks */
-        return 0;
-}
-
-static void vector_allocation_domain(int cpu, cpumask_t *retmask)
-{
-        /* Careful. Some cpus do not strictly honor the set of cpus
-         * specified in the interrupt destination when using lowest
-         * priority interrupt delivery mode.
-         *
-         * In particular there was a hyperthreading cpu observed to
-         * deliver interrupts to the wrong hyperthread when only one
-         * hyperthread was specified in the interrupt desitination.
-         */
-        *retmask = (cpumask_t){ { [0] = APIC_ALL_CPUS, } };
-}
-
-struct genapic apic_summit = APIC_INIT("summit", probe_summit);
diff --git a/arch/x86/mach-rdc321x/Makefile b/arch/x86/mach-rdc321x/Makefile
deleted file mode 100644
index 8325b4ca431c..000000000000
--- a/arch/x86/mach-rdc321x/Makefile
+++ /dev/null
@@ -1,5 +0,0 @@
-#
-# Makefile for the RDC321x specific parts of the kernel
-#
-obj-$(CONFIG_X86_RDC321X)        := gpio.o platform.o
-
diff --git a/arch/x86/mach-rdc321x/gpio.c b/arch/x86/mach-rdc321x/gpio.c
deleted file mode 100644
index 247f33d3a407..000000000000
--- a/arch/x86/mach-rdc321x/gpio.c
+++ /dev/null
@@ -1,194 +0,0 @@
-/*
- *  GPIO support for RDC SoC R3210/R8610
- *
- *  Copyright (C) 2007, Florian Fainelli <florian@openwrt.org>
- *  Copyright (C) 2008, Volker Weiss <dev@tintuc.de>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- *
- */
-
-
-#include <linux/spinlock.h>
-#include <linux/io.h>
-#include <linux/types.h>
-#include <linux/module.h>
-
-#include <asm/gpio.h>
-#include <asm/mach-rdc321x/rdc321x_defs.h>
-
-
-/* spin lock to protect our private copy of GPIO data register plus
-   the access to PCI conf registers. */
-static DEFINE_SPINLOCK(gpio_lock);
-
-/* copy of GPIO data registers */
-static u32 gpio_data_reg1;
-static u32 gpio_data_reg2;
-
-static u32 gpio_request_data[2];
-
-
-static inline void rdc321x_conf_write(unsigned addr, u32 value)
-{
-        outl((1 << 31) | (7 << 11) | addr, RDC3210_CFGREG_ADDR);
-        outl(value, RDC3210_CFGREG_DATA);
-}
-
-static inline void rdc321x_conf_or(unsigned addr, u32 value)
-{
-        outl((1 << 31) | (7 << 11) | addr, RDC3210_CFGREG_ADDR);
-        value |= inl(RDC3210_CFGREG_DATA);
-        outl(value, RDC3210_CFGREG_DATA);
-}
-
-static inline u32 rdc321x_conf_read(unsigned addr)
-{
-        outl((1 << 31) | (7 << 11) | addr, RDC3210_CFGREG_ADDR);
-
-        return inl(RDC3210_CFGREG_DATA);
-}
-
-/* configure pin as GPIO */
-static void rdc321x_configure_gpio(unsigned gpio)
-{
-        unsigned long flags;
-
-        spin_lock_irqsave(&gpio_lock, flags);
-        rdc321x_conf_or(gpio < 32
-                ? RDC321X_GPIO_CTRL_REG1 : RDC321X_GPIO_CTRL_REG2,
-                1 << (gpio & 0x1f));
-        spin_unlock_irqrestore(&gpio_lock, flags);
-}
-
-/* initially setup the 2 copies of the gpio data registers.
-   This function must be called by the platform setup code. */
-void __init rdc321x_gpio_setup()
-{
-        /* this might not be, what others (BIOS, bootloader, etc.)
-           wrote to these registers before, but it's a good guess. Still
-           better than just using 0xffffffff. */
-
-        gpio_data_reg1 = rdc321x_conf_read(RDC321X_GPIO_DATA_REG1);
-        gpio_data_reg2 = rdc321x_conf_read(RDC321X_GPIO_DATA_REG2);
-}
-
-/* determine, if gpio number is valid */
-static inline int rdc321x_is_gpio(unsigned gpio)
-{
-        return gpio <= RDC321X_MAX_GPIO;
-}
-
-/* request GPIO */
-int rdc_gpio_request(unsigned gpio, const char *label)
-{
-        unsigned long flags;
-
-        if (!rdc321x_is_gpio(gpio))
-                return -EINVAL;
-
-        spin_lock_irqsave(&gpio_lock, flags);
-        if (gpio_request_data[(gpio & 0x20) ? 1 : 0] & (1 << (gpio & 0x1f)))
-                goto inuse;
-        gpio_request_data[(gpio & 0x20) ? 1 : 0] |= (1 << (gpio & 0x1f));
-        spin_unlock_irqrestore(&gpio_lock, flags);
-
-        return 0;
-inuse:
-        spin_unlock_irqrestore(&gpio_lock, flags);
-        return -EINVAL;
-}
-EXPORT_SYMBOL(rdc_gpio_request);
-
-/* release previously-claimed GPIO */
-void rdc_gpio_free(unsigned gpio)
-{
-        unsigned long flags;
-
-        if (!rdc321x_is_gpio(gpio))
-                return;
-
-        spin_lock_irqsave(&gpio_lock, flags);
-        gpio_request_data[(gpio & 0x20) ? 1 : 0] &= ~(1 << (gpio & 0x1f));
-        spin_unlock_irqrestore(&gpio_lock, flags);
-}
-EXPORT_SYMBOL(rdc_gpio_free);
-
-/* read GPIO pin */
-int rdc_gpio_get_value(unsigned gpio)
-{
-        u32 reg;
-        unsigned long flags;
-
-        spin_lock_irqsave(&gpio_lock, flags);
-        reg = rdc321x_conf_read(gpio < 32
-                ? RDC321X_GPIO_DATA_REG1 : RDC321X_GPIO_DATA_REG2);
-        spin_unlock_irqrestore(&gpio_lock, flags);
-
-        return (1 << (gpio & 0x1f)) & reg ? 1 : 0;
-}
-EXPORT_SYMBOL(rdc_gpio_get_value);
-
-/* set GPIO pin to value */
-void rdc_gpio_set_value(unsigned gpio, int value)
-{
-        unsigned long flags;
-        u32 reg;
-
-        reg = 1 << (gpio & 0x1f);
-        if (gpio < 32) {
-                spin_lock_irqsave(&gpio_lock, flags);
-                if (value)
-                        gpio_data_reg1 |= reg;
-                else
-                        gpio_data_reg1 &= ~reg;
-                rdc321x_conf_write(RDC321X_GPIO_DATA_REG1, gpio_data_reg1);
-                spin_unlock_irqrestore(&gpio_lock, flags);
-        } else {
-                spin_lock_irqsave(&gpio_lock, flags);
-                if (value)
-                        gpio_data_reg2 |= reg;
-                else
-                        gpio_data_reg2 &= ~reg;
-                rdc321x_conf_write(RDC321X_GPIO_DATA_REG2, gpio_data_reg2);
-                spin_unlock_irqrestore(&gpio_lock, flags);
-        }
-}
-EXPORT_SYMBOL(rdc_gpio_set_value);
-
-/* configure GPIO pin as input */
-int rdc_gpio_direction_input(unsigned gpio)
-{
-        if (!rdc321x_is_gpio(gpio))
-                return -EINVAL;
-
-        rdc321x_configure_gpio(gpio);
-
-        return 0;
-}
-EXPORT_SYMBOL(rdc_gpio_direction_input);
-
-/* configure GPIO pin as output and set value */
-int rdc_gpio_direction_output(unsigned gpio, int value)
-{
-        if (!rdc321x_is_gpio(gpio))
-                return -EINVAL;
-
-        gpio_set_value(gpio, value);
-        rdc321x_configure_gpio(gpio);
-
-        return 0;
-}
-EXPORT_SYMBOL(rdc_gpio_direction_output);
diff --git a/arch/x86/mach-rdc321x/platform.c b/arch/x86/mach-rdc321x/platform.c
deleted file mode 100644
index 4f4e50c3ad3b..000000000000
--- a/arch/x86/mach-rdc321x/platform.c
+++ /dev/null
@@ -1,69 +0,0 @@
-/*
- *  Generic RDC321x platform devices
- *
- *  Copyright (C) 2007 Florian Fainelli <florian@openwrt.org>
- *
- *  This program is free software; you can redistribute it and/or
- *  modify it under the terms of the GNU General Public License
- *  as published by the Free Software Foundation; either version 2
- *  of the License, or (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License
- *  along with this program; if not, write to the
- *  Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
- *  Boston, MA  02110-1301, USA.
- *
- */
-
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/list.h>
-#include <linux/device.h>
-#include <linux/platform_device.h>
-#include <linux/leds.h>
-
-#include <asm/gpio.h>
-
-/* LEDS */
-static struct gpio_led default_leds[] = {
-        { .name = "rdc:dmz", .gpio = 1, },
-};
-
-static struct gpio_led_platform_data rdc321x_led_data = {
-        .num_leds = ARRAY_SIZE(default_leds),
-        .leds = default_leds,
-};
-
-static struct platform_device rdc321x_leds = {
-        .name = "leds-gpio",
-        .id = -1,
-        .dev = {
-                .platform_data = &rdc321x_led_data,
-        }
-};
-
-/* Watchdog */
-static struct platform_device rdc321x_wdt = {
-        .name = "rdc321x-wdt",
-        .id = -1,
-        .num_resources = 0,
-};
-
-static struct platform_device *rdc321x_devs[] = {
-        &rdc321x_leds,
-        &rdc321x_wdt
-};
-
-static int __init rdc_board_setup(void)
-{
-        rdc321x_gpio_setup();
-
-        return platform_add_devices(rdc321x_devs, ARRAY_SIZE(rdc321x_devs));
-}
-
-arch_initcall(rdc_board_setup);
diff --git a/arch/x86/mach-voyager/Makefile b/arch/x86/mach-voyager/Makefile
deleted file mode 100644
index 15c250b371d3..000000000000
--- a/arch/x86/mach-voyager/Makefile
+++ /dev/null
@@ -1,8 +0,0 @@
-#
-# Makefile for the linux kernel.
-#
-
-EXTRA_CFLAGS    := -Iarch/x86/kernel
-obj-y                   := setup.o voyager_basic.o voyager_thread.o
-
-obj-$(CONFIG_SMP)       += voyager_smp.o voyager_cat.o
diff --git a/arch/x86/mach-voyager/setup.c b/arch/x86/mach-voyager/setup.c
deleted file mode 100644
index 8e5118371f0f..000000000000
--- a/arch/x86/mach-voyager/setup.c
+++ /dev/null
@@ -1,118 +0,0 @@
-/*
- *      Machine specific setup for generic
- */
-
-#include <linux/init.h>
-#include <linux/interrupt.h>
-#include <asm/arch_hooks.h>
-#include <asm/voyager.h>
-#include <asm/e820.h>
-#include <asm/io.h>
-#include <asm/setup.h>
-
-void __init pre_intr_init_hook(void)
-{
-        init_ISA_irqs();
-}
-
-/*
- * IRQ2 is cascade interrupt to second interrupt controller
- */
-static struct irqaction irq2 = {
-        .handler = no_action,
-        .mask = CPU_MASK_NONE,
-        .name = "cascade",
-};
-
-void __init intr_init_hook(void)
-{
-#ifdef CONFIG_SMP
-        voyager_smp_intr_init();
-#endif
-
-        setup_irq(2, &irq2);
-}
-
-static void voyager_disable_tsc(void)
-{
-        /* Voyagers run their CPUs from independent clocks, so disable
-         * the TSC code because we can't sync them */
-        setup_clear_cpu_cap(X86_FEATURE_TSC);
-}
-
-void __init pre_setup_arch_hook(void)
-{
-        voyager_disable_tsc();
-}
-
-void __init pre_time_init_hook(void)
-{
-        voyager_disable_tsc();
-}
-
-void __init trap_init_hook(void)
-{
-}
-
-static struct irqaction irq0 = {
-        .handler = timer_interrupt,
-        .flags = IRQF_DISABLED | IRQF_NOBALANCING | IRQF_IRQPOLL | IRQF_TIMER,
-        .mask = CPU_MASK_NONE,
-        .name = "timer"
-};
-
-void __init time_init_hook(void)
-{
-        irq0.mask = cpumask_of_cpu(safe_smp_processor_id());
-        setup_irq(0, &irq0);
-}
-
-/* Hook for machine specific memory setup. */
-
-char *__init machine_specific_memory_setup(void)
-{
-        char *who;
-        int new_nr;
-
-        who = "NOT VOYAGER";
-
-        if (voyager_level == 5) {
-                __u32 addr, length;
-                int i;
-
-                who = "Voyager-SUS";
-
-                e820.nr_map = 0;
-                for (i = 0; voyager_memory_detect(i, &addr, &length); i++) {
-                        e820_add_region(addr, length, E820_RAM);
-                }
-                return who;
-        } else if (voyager_level == 4) {
-                __u32 tom;
-                __u16 catbase = inb(VOYAGER_SSPB_RELOCATION_PORT) << 8;
-                /* select the DINO config space */
-                outb(VOYAGER_DINO, VOYAGER_CAT_CONFIG_PORT);
-                /* Read DINO top of memory register */
-                tom = ((inb(catbase + 0x4) & 0xf0) << 16)
-                    + ((inb(catbase + 0x5) & 0x7f) << 24);
-
-                if (inb(catbase) != VOYAGER_DINO) {
-                        printk(KERN_ERR
-                               "Voyager: Failed to get DINO for L4, setting tom to EXT_MEM_K\n");
-                        tom = (boot_params.screen_info.ext_mem_k) << 10;
-                }
-                who = "Voyager-TOM";
-                e820_add_region(0, 0x9f000, E820_RAM);
-                /* map from 1M to top of memory */
-                e820_add_region(1 * 1024 * 1024, tom - 1 * 1024 * 1024,
-                                  E820_RAM);
-                /* FIXME: Should check the ASICs to see if I need to
-                 * take out the 8M window.  Just do it at the moment
-                 * */
-                e820_add_region(8 * 1024 * 1024, 8 * 1024 * 1024,
-                                  E820_RESERVED);
-                return who;
-        }
-
-        return default_machine_specific_memory_setup();
-}
diff --git a/arch/x86/mach-voyager/voyager_basic.c b/arch/x86/mach-voyager/voyager_basic.c
deleted file mode 100644
index 46d6f8067690..000000000000
--- a/arch/x86/mach-voyager/voyager_basic.c
+++ /dev/null
@@ -1,317 +0,0 @@
-/* Copyright (C) 1999,2001 
- *
- * Author: J.E.J.Bottomley@HansenPartnership.com
- *
- * This file contains all the voyager specific routines for getting
- * initialisation of the architecture to function.  For additional
- * features see:
- *
- *      voyager_cat.c - Voyager CAT bus interface
- *      voyager_smp.c - Voyager SMP hal (emulates linux smp.c)
- */
-
-#include <linux/module.h>
-#include <linux/types.h>
-#include <linux/sched.h>
-#include <linux/ptrace.h>
-#include <linux/ioport.h>
-#include <linux/interrupt.h>
-#include <linux/init.h>
-#include <linux/delay.h>
-#include <linux/reboot.h>
-#include <linux/sysrq.h>
-#include <linux/smp.h>
-#include <linux/nodemask.h>
-#include <asm/io.h>
-#include <asm/voyager.h>
-#include <asm/vic.h>
-#include <linux/pm.h>
-#include <asm/tlbflush.h>
-#include <asm/arch_hooks.h>
-#include <asm/i8253.h>
-
-/*
- * Power off function, if any
- */
-void (*pm_power_off) (void);
-EXPORT_SYMBOL(pm_power_off);
-
-int voyager_level = 0;
-
-struct voyager_SUS *voyager_SUS = NULL;
-
-#ifdef CONFIG_SMP
-static void voyager_dump(int dummy1, struct tty_struct *dummy3)
-{
-        /* get here via a sysrq */
-        voyager_smp_dump();
-}
-
-static struct sysrq_key_op sysrq_voyager_dump_op = {
-        .handler = voyager_dump,
-        .help_msg = "Voyager",
-        .action_msg = "Dump Voyager Status",
-};
-#endif
-
-void voyager_detect(struct voyager_bios_info *bios)
-{
-        if (bios->len != 0xff) {
-                int class = (bios->class_1 << 8)
-                    | (bios->class_2 & 0xff);
-
-                printk("Voyager System detected.\n"
-                       "        Class %x, Revision %d.%d\n",
-                       class, bios->major, bios->minor);
-                if (class == VOYAGER_LEVEL4)
-                        voyager_level = 4;
-                else if (class < VOYAGER_LEVEL5_AND_ABOVE)
-                        voyager_level = 3;
-                else
-                        voyager_level = 5;
-                printk("        Architecture Level %d\n", voyager_level);
-                if (voyager_level < 4)
-                        printk
-                            ("\n**WARNING**: Voyager HAL only supports Levels 4 and 5 Architectures at the moment\n\n");
-                /* install the power off handler */
-                pm_power_off = voyager_power_off;
-#ifdef CONFIG_SMP
-                register_sysrq_key('v', &sysrq_voyager_dump_op);
-#endif
-        } else {
-                printk("\n\n**WARNING**: No Voyager Subsystem Found\n");
-        }
-}
-
-void voyager_system_interrupt(int cpl, void *dev_id)
-{
-        printk("Voyager: detected system interrupt\n");
-}
-
-/* Routine to read information from the extended CMOS area */
-__u8 voyager_extended_cmos_read(__u16 addr)
-{
-        outb(addr & 0xff, 0x74);
-        outb((addr >> 8) & 0xff, 0x75);
-        return inb(0x76);
-}
-
-/* internal definitions for the SUS Click Map of memory */
-
-#define CLICK_ENTRIES   16
-#define CLICK_SIZE      4096    /* click to byte conversion for Length */
-
-typedef struct ClickMap {
-        struct Entry {
-                __u32 Address;
-                __u32 Length;
-        } Entry[CLICK_ENTRIES];
-} ClickMap_t;
-
-/* This routine is pretty much an awful hack to read the bios clickmap by
- * mapping it into page 0.  There are usually three regions in the map:
- *      Base Memory
- *      Extended Memory
- *      zero length marker for end of map
- *
- * Returns are 0 for failure and 1 for success on extracting region.
- */
-int __init voyager_memory_detect(int region, __u32 * start, __u32 * length)
-{
-        int i;
-        int retval = 0;
-        __u8 cmos[4];
-        ClickMap_t *map;
-        unsigned long map_addr;
-        unsigned long old;
-
-        if (region >= CLICK_ENTRIES) {
-                printk("Voyager: Illegal ClickMap region %d\n", region);
-                return 0;
-        }
-
-        for (i = 0; i < sizeof(cmos); i++)
-                cmos[i] =
-                    voyager_extended_cmos_read(VOYAGER_MEMORY_CLICKMAP + i);
-
-        map_addr = *(unsigned long *)cmos;
-
-        /* steal page 0 for this */
-        old = pg0[0];
-        pg0[0] = ((map_addr & PAGE_MASK) | _PAGE_RW | _PAGE_PRESENT);
-        local_flush_tlb();
-        /* now clear everything out but page 0 */
-        map = (ClickMap_t *) (map_addr & (~PAGE_MASK));
-
-        /* zero length is the end of the clickmap */
-        if (map->Entry[region].Length != 0) {
-                *length = map->Entry[region].Length * CLICK_SIZE;
-                *start = map->Entry[region].Address;
-                retval = 1;
-        }
-
-        /* replace the mapping */
-        pg0[0] = old;
-        local_flush_tlb();
-        return retval;
-}
-
-/* voyager specific handling code for timer interrupts.  Used to hand
- * off the timer tick to the SMP code, since the VIC doesn't have an
- * internal timer (The QIC does, but that's another story). */
-void voyager_timer_interrupt(void)
-{
-        if ((jiffies & 0x3ff) == 0) {
-
-                /* There seems to be something flaky in either
-                 * hardware or software that is resetting the timer 0
-                 * count to something much higher than it should be
-                 * This seems to occur in the boot sequence, just
-                 * before root is mounted.  Therefore, every 10
-                 * seconds or so, we sanity check the timer zero count
-                 * and kick it back to where it should be.
-                 *
-                 * FIXME: This is the most awful hack yet seen.  I
-                 * should work out exactly what is interfering with
-                 * the timer count settings early in the boot sequence
-                 * and swiftly introduce it to something sharp and
-                 * pointy.  */
-                __u16 val;
-
-                spin_lock(&i8253_lock);
-
-                outb_p(0x00, 0x43);
-                val = inb_p(0x40);
-                val |= inb(0x40) << 8;
-                spin_unlock(&i8253_lock);
-
-                if (val > LATCH) {
-                        printk
-                            ("\nVOYAGER: countdown timer value too high (%d), resetting\n\n",
-                             val);
-                        spin_lock(&i8253_lock);
-                        outb(0x34, 0x43);
-                        outb_p(LATCH & 0xff, 0x40);     /* LSB */
-                        outb(LATCH >> 8, 0x40); /* MSB */
-                        spin_unlock(&i8253_lock);
-                }
-        }
-#ifdef CONFIG_SMP
-        smp_vic_timer_interrupt();
-#endif
-}
-
-void voyager_power_off(void)
-{
-        printk("VOYAGER Power Off\n");
-
-        if (voyager_level == 5) {
-                voyager_cat_power_off();
-        } else if (voyager_level == 4) {
-                /* This doesn't apparently work on most L4 machines,
-                 * but the specs say to do this to get automatic power
-                 * off.  Unfortunately, if it doesn't power off the
-                 * machine, it ends up doing a cold restart, which
-                 * isn't really intended, so comment out the code */
-#if 0
-                int port;
-
-                /* enable the voyager Configuration Space */
-                outb((inb(VOYAGER_MC_SETUP) & 0xf0) | 0x8, VOYAGER_MC_SETUP);
-                /* the port for the power off flag is an offset from the
-                   floating base */
-                port = (inb(VOYAGER_SSPB_RELOCATION_PORT) << 8) + 0x21;
-                /* set the power off flag */
-                outb(inb(port) | 0x1, port);
-#endif
-        }
-        /* and wait for it to happen */
-        local_irq_disable();
-        for (;;)
-                halt();
-}
-
-/* copied from process.c */
-static inline void kb_wait(void)
-{
-        int i;
-
-        for (i = 0; i < 0x10000; i++)
-                if ((inb_p(0x64) & 0x02) == 0)
-                        break;
-}
-
-void machine_shutdown(void)
-{
-        /* Architecture specific shutdown needed before a kexec */
-}
-
-void machine_restart(char *cmd)
-{
-        printk("Voyager Warm Restart\n");
-        kb_wait();
-
-        if (voyager_level == 5) {
-                /* write magic values to the RTC to inform system that
-                 * shutdown is beginning */
-                outb(0x8f, 0x70);
-                outb(0x5, 0x71);
-
-                udelay(50);
-                outb(0xfe, 0x64);       /* pull reset low */
-        } else if (voyager_level == 4) {
-                __u16 catbase = inb(VOYAGER_SSPB_RELOCATION_PORT) << 8;
-                __u8 basebd = inb(VOYAGER_MC_SETUP);
-
-                outb(basebd | 0x08, VOYAGER_MC_SETUP);
-                outb(0x02, catbase + 0x21);
-        }
-        local_irq_disable();
-        for (;;)
-                halt();
-}
-
-void machine_emergency_restart(void)
-{
-        /*for now, just hook this to a warm restart */
-        machine_restart(NULL);
-}
-
-void mca_nmi_hook(void)
-{
-        __u8 dumpval __maybe_unused = inb(0xf823);
-        __u8 swnmi __maybe_unused = inb(0xf813);
-
-        /* FIXME: assume dump switch pressed */
-        /* check to see if the dump switch was pressed */
-        VDEBUG(("VOYAGER: dumpval = 0x%x, swnmi = 0x%x\n", dumpval, swnmi));
-        /* clear swnmi */
-        outb(0xff, 0xf813);
-        /* tell SUS to ignore dump */
-        if (voyager_level == 5 && voyager_SUS != NULL) {
-                if (voyager_SUS->SUS_mbox == VOYAGER_DUMP_BUTTON_NMI) {
-                        voyager_SUS->kernel_mbox = VOYAGER_NO_COMMAND;
-                        voyager_SUS->kernel_flags |= VOYAGER_OS_IN_PROGRESS;
-                        udelay(1000);
-                        voyager_SUS->kernel_mbox = VOYAGER_IGNORE_DUMP;
-                        voyager_SUS->kernel_flags &= ~VOYAGER_OS_IN_PROGRESS;
-                }
-        }
-        printk(KERN_ERR
-               "VOYAGER: Dump switch pressed, printing CPU%d tracebacks\n",
-               smp_processor_id());
-        show_stack(NULL, NULL);
-        show_state();
-}
-
-void machine_halt(void)
-{
-        /* treat a halt like a power off */
-        machine_power_off();
-}
-
-void machine_power_off(void)
-{
-        if (pm_power_off)
-                pm_power_off();
-}
diff --git a/arch/x86/mach-voyager/voyager_cat.c b/arch/x86/mach-voyager/voyager_cat.c
deleted file mode 100644
index 2ad598c104af..000000000000
--- a/arch/x86/mach-voyager/voyager_cat.c
+++ /dev/null
@@ -1,1197 +0,0 @@
-/* -*- mode: c; c-basic-offset: 8 -*- */
-
-/* Copyright (C) 1999,2001
- *
- * Author: J.E.J.Bottomley@HansenPartnership.com
- *
- * This file contains all the logic for manipulating the CAT bus
- * in a level 5 machine.
- *
- * The CAT bus is a serial configuration and test bus.  Its primary
- * uses are to probe the initial configuration of the system and to
- * diagnose error conditions when a system interrupt occurs.  The low
- * level interface is fairly primitive, so most of this file consists
- * of bit shift manipulations to send and receive packets on the
- * serial bus */
-
-#include <linux/types.h>
-#include <linux/completion.h>
-#include <linux/sched.h>
-#include <asm/voyager.h>
-#include <asm/vic.h>
-#include <linux/ioport.h>
-#include <linux/init.h>
-#include <linux/slab.h>
-#include <linux/delay.h>
-#include <asm/io.h>
-
-#ifdef VOYAGER_CAT_DEBUG
-#define CDEBUG(x)       printk x
-#else
-#define CDEBUG(x)
-#endif
-
-/* the CAT command port */
-#define CAT_CMD         (sspb + 0xe)
-/* the CAT data port */
-#define CAT_DATA        (sspb + 0xd)
-
-/* the internal cat functions */
-static void cat_pack(__u8 * msg, __u16 start_bit, __u8 * data, __u16 num_bits);
-static void cat_unpack(__u8 * msg, __u16 start_bit, __u8 * data,
-                       __u16 num_bits);
-static void cat_build_header(__u8 * header, const __u16 len,
-                             const __u16 smallest_reg_bits,
-                             const __u16 longest_reg_bits);
-static int cat_sendinst(voyager_module_t * modp, voyager_asic_t * asicp,
-                        __u8 reg, __u8 op);
-static int cat_getdata(voyager_module_t * modp, voyager_asic_t * asicp,
-                       __u8 reg, __u8 * value);
-static int cat_shiftout(__u8 * data, __u16 data_bytes, __u16 header_bytes,
-                        __u8 pad_bits);
-static int cat_write(voyager_module_t * modp, voyager_asic_t * asicp, __u8 reg,
-                     __u8 value);
-static int cat_read(voyager_module_t * modp, voyager_asic_t * asicp, __u8 reg,
-                    __u8 * value);
-static int cat_subread(voyager_module_t * modp, voyager_asic_t * asicp,
-                       __u16 offset, __u16 len, void *buf);
-static int cat_senddata(voyager_module_t * modp, voyager_asic_t * asicp,
-                        __u8 reg, __u8 value);
-static int cat_disconnect(voyager_module_t * modp, voyager_asic_t * asicp);
-static int cat_connect(voyager_module_t * modp, voyager_asic_t * asicp);
-
-static inline const char *cat_module_name(int module_id)
-{
-        switch (module_id) {
-        case 0x10:
-                return "Processor Slot 0";
-        case 0x11:
-                return "Processor Slot 1";
-        case 0x12:
-                return "Processor Slot 2";
-        case 0x13:
-                return "Processor Slot 4";
-        case 0x14:
-                return "Memory Slot 0";
-        case 0x15:
-                return "Memory Slot 1";
-        case 0x18:
-                return "Primary Microchannel";
-        case 0x19:
-                return "Secondary Microchannel";
-        case 0x1a:
-                return "Power Supply Interface";
-        case 0x1c:
-                return "Processor Slot 5";
-        case 0x1d:
-                return "Processor Slot 6";
-        case 0x1e:
-                return "Processor Slot 7";
-        case 0x1f:
-                return "Processor Slot 8";
-        default:
-                return "Unknown Module";
-        }
-}
-
-static int sspb = 0;            /* stores the super port location */
-int voyager_8slot = 0;          /* set to true if a 51xx monster */
-
-voyager_module_t *voyager_cat_list;
-
-/* the I/O port assignments for the VIC and QIC */
-static struct resource vic_res = {
-        .name = "Voyager Interrupt Controller",
-        .start = 0xFC00,
-        .end = 0xFC6F
-};
-static struct resource qic_res = {
-        .name = "Quad Interrupt Controller",
-        .start = 0xFC70,
-        .end = 0xFCFF
-};
-
-/* This function is used to pack a data bit stream inside a message.
- * It writes num_bits of the data buffer in msg starting at start_bit.
- * Note: This function assumes that any unused bit in the data stream
- * is set to zero so that the ors will work correctly */
-static void
-cat_pack(__u8 * msg, const __u16 start_bit, __u8 * data, const __u16 num_bits)
-{
-        /* compute initial shift needed */
-        const __u16 offset = start_bit % BITS_PER_BYTE;
-        __u16 len = num_bits / BITS_PER_BYTE;
-        __u16 byte = start_bit / BITS_PER_BYTE;
-        __u16 residue = (num_bits % BITS_PER_BYTE) + offset;
-        int i;
-
-        /* adjust if we have more than a byte of residue */
-        if (residue >= BITS_PER_BYTE) {
-                residue -= BITS_PER_BYTE;
-                len++;
-        }
-
-        /* clear out the bits.  We assume here that if len==0 then
-         * residue >= offset.  This is always true for the catbus
-         * operations */
-        msg[byte] &= 0xff << (BITS_PER_BYTE - offset);
-        msg[byte++] |= data[0] >> offset;
-        if (len == 0)
-                return;
-        for (i = 1; i < len; i++)
-                msg[byte++] = (data[i - 1] << (BITS_PER_BYTE - offset))
-                    | (data[i] >> offset);
-        if (residue != 0) {
-                __u8 mask = 0xff >> residue;
-                __u8 last_byte = data[i - 1] << (BITS_PER_BYTE - offset)
-                    | (data[i] >> offset);
-
-                last_byte &= ~mask;
-                msg[byte] &= mask;
-                msg[byte] |= last_byte;
-        }
-        return;
-}
-
-/* unpack the data again (same arguments as cat_pack()). data buffer
- * must be zero populated.
- *
- * Function: given a message string move to start_bit and copy num_bits into
- * data (starting at bit 0 in data).
- */
-static void
-cat_unpack(__u8 * msg, const __u16 start_bit, __u8 * data, const __u16 num_bits)
-{
-        /* compute initial shift needed */
-        const __u16 offset = start_bit % BITS_PER_BYTE;
-        __u16 len = num_bits / BITS_PER_BYTE;
-        const __u8 last_bits = num_bits % BITS_PER_BYTE;
-        __u16 byte = start_bit / BITS_PER_BYTE;
-        int i;
-
-        if (last_bits != 0)
-                len++;
-
-        /* special case: want < 8 bits from msg and we can get it from
-         * a single byte of the msg */
-        if (len == 0 && BITS_PER_BYTE - offset >= num_bits) {
-                data[0] = msg[byte] << offset;
-                data[0] &= 0xff >> (BITS_PER_BYTE - num_bits);
-                return;
-        }
-        for (i = 0; i < len; i++) {
-                /* this annoying if has to be done just in case a read of
-                 * msg one beyond the array causes a panic */
-                if (offset != 0) {
-                        data[i] = msg[byte++] << offset;
-                        data[i] |= msg[byte] >> (BITS_PER_BYTE - offset);
-                } else {
-                        data[i] = msg[byte++];
-                }
-        }
-        /* do we need to truncate the final byte */
-        if (last_bits != 0) {
-                data[i - 1] &= 0xff << (BITS_PER_BYTE - last_bits);
-        }
-        return;
-}
-
-static void
-cat_build_header(__u8 * header, const __u16 len, const __u16 smallest_reg_bits,
-                 const __u16 longest_reg_bits)
-{
-        int i;
-        __u16 start_bit = (smallest_reg_bits - 1) % BITS_PER_BYTE;
-        __u8 *last_byte = &header[len - 1];
-
-        if (start_bit == 0)
-                start_bit = 1;  /* must have at least one bit in the hdr */
-
-        for (i = 0; i < len; i++)
-                header[i] = 0;
-
-        for (i = start_bit; i > 0; i--)
-                *last_byte = ((*last_byte) << 1) + 1;
-
-}
-
-static int
-cat_sendinst(voyager_module_t * modp, voyager_asic_t * asicp, __u8 reg, __u8 op)
-{
-        __u8 parity, inst, inst_buf[4] = { 0 };
-        __u8 iseq[VOYAGER_MAX_SCAN_PATH], hseq[VOYAGER_MAX_REG_SIZE];
-        __u16 ibytes, hbytes, padbits;
-        int i;
-
-        /* 
-         * Parity is the parity of the register number + 1 (READ_REGISTER
-         * and WRITE_REGISTER always add '1' to the number of bits == 1)
-         */
-        parity = (__u8) (1 + (reg & 0x01) +
-                         ((__u8) (reg & 0x02) >> 1) +
-                         ((__u8) (reg & 0x04) >> 2) +
-                         ((__u8) (reg & 0x08) >> 3)) % 2;
-
-        inst = ((parity << 7) | (reg << 2) | op);
-
-        outb(VOYAGER_CAT_IRCYC, CAT_CMD);
-        if (!modp->scan_path_connected) {
-                if (asicp->asic_id != VOYAGER_CAT_ID) {
-                        printk
-                            ("**WARNING***: cat_sendinst has disconnected scan path not to CAT asic\n");
-                        return 1;
-                }
-                outb(VOYAGER_CAT_HEADER, CAT_DATA);
-                outb(inst, CAT_DATA);
-                if (inb(CAT_DATA) != VOYAGER_CAT_HEADER) {
-                        CDEBUG(("VOYAGER CAT: cat_sendinst failed to get CAT_HEADER\n"));
-                        return 1;
-                }
-                return 0;
-        }
-        ibytes = modp->inst_bits / BITS_PER_BYTE;
-        if ((padbits = modp->inst_bits % BITS_PER_BYTE) != 0) {
-                padbits = BITS_PER_BYTE - padbits;
-                ibytes++;
-        }
-        hbytes = modp->largest_reg / BITS_PER_BYTE;
-        if (modp->largest_reg % BITS_PER_BYTE)
-                hbytes++;
-        CDEBUG(("cat_sendinst: ibytes=%d, hbytes=%d\n", ibytes, hbytes));
-        /* initialise the instruction sequence to 0xff */
-        for (i = 0; i < ibytes + hbytes; i++)
-                iseq[i] = 0xff;
-        cat_build_header(hseq, hbytes, modp->smallest_reg, modp->largest_reg);
-        cat_pack(iseq, modp->inst_bits, hseq, hbytes * BITS_PER_BYTE);
-        inst_buf[0] = inst;
-        inst_buf[1] = 0xFF >> (modp->largest_reg % BITS_PER_BYTE);
-        cat_pack(iseq, asicp->bit_location, inst_buf, asicp->ireg_length);
-#ifdef VOYAGER_CAT_DEBUG
-        printk("ins = 0x%x, iseq: ", inst);
-        for (i = 0; i < ibytes + hbytes; i++)
-                printk("0x%x ", iseq[i]);
-        printk("\n");
-#endif
-        if (cat_shiftout(iseq, ibytes, hbytes, padbits)) {
-                CDEBUG(("VOYAGER CAT: cat_sendinst: cat_shiftout failed\n"));
-                return 1;
-        }
-        CDEBUG(("CAT SHIFTOUT DONE\n"));
-        return 0;
-}
-
-static int
-cat_getdata(voyager_module_t * modp, voyager_asic_t * asicp, __u8 reg,
-            __u8 * value)
-{
-        if (!modp->scan_path_connected) {
-                if (asicp->asic_id != VOYAGER_CAT_ID) {
-                        CDEBUG(("VOYAGER CAT: ERROR: cat_getdata to CAT asic with scan path connected\n"));
-                        return 1;
-                }
-                if (reg > VOYAGER_SUBADDRHI)
-                        outb(VOYAGER_CAT_RUN, CAT_CMD);
-                outb(VOYAGER_CAT_DRCYC, CAT_CMD);
-                outb(VOYAGER_CAT_HEADER, CAT_DATA);
-                *value = inb(CAT_DATA);
-                outb(0xAA, CAT_DATA);
-                if (inb(CAT_DATA) != VOYAGER_CAT_HEADER) {
-                        CDEBUG(("cat_getdata: failed to get VOYAGER_CAT_HEADER\n"));
-                        return 1;
-                }
-                return 0;
-        } else {
-                __u16 sbits = modp->num_asics - 1 + asicp->ireg_length;
-                __u16 sbytes = sbits / BITS_PER_BYTE;
-                __u16 tbytes;
-                __u8 string[VOYAGER_MAX_SCAN_PATH],
-                    trailer[VOYAGER_MAX_REG_SIZE];
-                __u8 padbits;
-                int i;
-
-                outb(VOYAGER_CAT_DRCYC, CAT_CMD);
-
-                if ((padbits = sbits % BITS_PER_BYTE) != 0) {
-                        padbits = BITS_PER_BYTE - padbits;
-                        sbytes++;
-                }
-                tbytes = asicp->ireg_length / BITS_PER_BYTE;
-                if (asicp->ireg_length % BITS_PER_BYTE)
-                        tbytes++;
-                CDEBUG(("cat_getdata: tbytes = %d, sbytes = %d, padbits = %d\n",
-                        tbytes, sbytes, padbits));
-                cat_build_header(trailer, tbytes, 1, asicp->ireg_length);
-
-                for (i = tbytes - 1; i >= 0; i--) {
-                        outb(trailer[i], CAT_DATA);
-                        string[sbytes + i] = inb(CAT_DATA);
-                }
-
-                for (i = sbytes - 1; i >= 0; i--) {
-                        outb(0xaa, CAT_DATA);
-                        string[i] = inb(CAT_DATA);
-                }
-                *value = 0;
-                cat_unpack(string,
-                           padbits + (tbytes * BITS_PER_BYTE) +
-                           asicp->asic_location, value, asicp->ireg_length);
-#ifdef VOYAGER_CAT_DEBUG
-                printk("value=0x%x, string: ", *value);
-                for (i = 0; i < tbytes + sbytes; i++)
-                        printk("0x%x ", string[i]);
-                printk("\n");
-#endif
-
-                /* sanity check the rest of the return */
-                for (i = 0; i < tbytes; i++) {
-                        __u8 input = 0;
-
-                        cat_unpack(string, padbits + (i * BITS_PER_BYTE),
-                                   &input, BITS_PER_BYTE);
-                        if (trailer[i] != input) {
-                                CDEBUG(("cat_getdata: failed to sanity check rest of ret(%d) 0x%x != 0x%x\n", i, input, trailer[i]));
-                                return 1;
-                        }
-                }
-                CDEBUG(("cat_getdata DONE\n"));
-                return 0;
-        }
-}
-
-static int
-cat_shiftout(__u8 * data, __u16 data_bytes, __u16 header_bytes, __u8 pad_bits)
-{
-        int i;
-
-        for (i = data_bytes + header_bytes - 1; i >= header_bytes; i--)
-                outb(data[i], CAT_DATA);
-
-        for (i = header_bytes - 1; i >= 0; i--) {
-                __u8 header = 0;
-                __u8 input;
-
-                outb(data[i], CAT_DATA);
-                input = inb(CAT_DATA);
-                CDEBUG(("cat_shiftout: returned 0x%x\n", input));
-                cat_unpack(data, ((data_bytes + i) * BITS_PER_BYTE) - pad_bits,
-                           &header, BITS_PER_BYTE);
-                if (input != header) {
-                        CDEBUG(("VOYAGER CAT: cat_shiftout failed to return header 0x%x != 0x%x\n", input, header));
-                        return 1;
-                }
-        }
-        return 0;
-}
-
-static int
-cat_senddata(voyager_module_t * modp, voyager_asic_t * asicp,
-             __u8 reg, __u8 value)
-{
-        outb(VOYAGER_CAT_DRCYC, CAT_CMD);
-        if (!modp->scan_path_connected) {
-                if (asicp->asic_id != VOYAGER_CAT_ID) {
-                        CDEBUG(("VOYAGER CAT: ERROR: scan path disconnected when asic != CAT\n"));
-                        return 1;
-                }
-                outb(VOYAGER_CAT_HEADER, CAT_DATA);
-                outb(value, CAT_DATA);
-                if (inb(CAT_DATA) != VOYAGER_CAT_HEADER) {
-                        CDEBUG(("cat_senddata: failed to get correct header response to sent data\n"));
-                        return 1;
-                }
-                if (reg > VOYAGER_SUBADDRHI) {
-                        outb(VOYAGER_CAT_RUN, CAT_CMD);
-                        outb(VOYAGER_CAT_END, CAT_CMD);
-                        outb(VOYAGER_CAT_RUN, CAT_CMD);
-                }
-
-                return 0;
-        } else {
-                __u16 hbytes = asicp->ireg_length / BITS_PER_BYTE;
-                __u16 dbytes =
-                    (modp->num_asics - 1 + asicp->ireg_length) / BITS_PER_BYTE;
-                __u8 padbits, dseq[VOYAGER_MAX_SCAN_PATH],
-                    hseq[VOYAGER_MAX_REG_SIZE];
-                int i;
-
-                if ((padbits = (modp->num_asics - 1
-                                + asicp->ireg_length) % BITS_PER_BYTE) != 0) {
-                        padbits = BITS_PER_BYTE - padbits;
-                        dbytes++;
-                }
-                if (asicp->ireg_length % BITS_PER_BYTE)
-                        hbytes++;
-
-                cat_build_header(hseq, hbytes, 1, asicp->ireg_length);
-
-                for (i = 0; i < dbytes + hbytes; i++)
-                        dseq[i] = 0xff;
-                CDEBUG(("cat_senddata: dbytes=%d, hbytes=%d, padbits=%d\n",
-                        dbytes, hbytes, padbits));
-                cat_pack(dseq, modp->num_asics - 1 + asicp->ireg_length,
-                         hseq, hbytes * BITS_PER_BYTE);
-                cat_pack(dseq, asicp->asic_location, &value,
-                         asicp->ireg_length);
-#ifdef VOYAGER_CAT_DEBUG
-                printk("dseq ");
-                for (i = 0; i < hbytes + dbytes; i++) {
-                        printk("0x%x ", dseq[i]);
-                }
-                printk("\n");
-#endif
-                return cat_shiftout(dseq, dbytes, hbytes, padbits);
-        }
-}
-
-static int
-cat_write(voyager_module_t * modp, voyager_asic_t * asicp, __u8 reg, __u8 value)
-{
-        if (cat_sendinst(modp, asicp, reg, VOYAGER_WRITE_CONFIG))
-                return 1;
-        return cat_senddata(modp, asicp, reg, value);
-}
-
-static int
-cat_read(voyager_module_t * modp, voyager_asic_t * asicp, __u8 reg,
-         __u8 * value)
-{
-        if (cat_sendinst(modp, asicp, reg, VOYAGER_READ_CONFIG))
-                return 1;
-        return cat_getdata(modp, asicp, reg, value);
-}
-
-static int
-cat_subaddrsetup(voyager_module_t * modp, voyager_asic_t * asicp, __u16 offset,
-                 __u16 len)
-{
-        __u8 val;
-
-        if (len > 1) {
-                /* set auto increment */
-                __u8 newval;
-
-                if (cat_read(modp, asicp, VOYAGER_AUTO_INC_REG, &val)) {
-                        CDEBUG(("cat_subaddrsetup: read of VOYAGER_AUTO_INC_REG failed\n"));
-                        return 1;
-                }
-                CDEBUG(("cat_subaddrsetup: VOYAGER_AUTO_INC_REG = 0x%x\n",
-                        val));
-                newval = val | VOYAGER_AUTO_INC;
-                if (newval != val) {
-                        if (cat_write(modp, asicp, VOYAGER_AUTO_INC_REG, val)) {
-                                CDEBUG(("cat_subaddrsetup: write to VOYAGER_AUTO_INC_REG failed\n"));
-                                return 1;
-                        }
-                }
-        }
-        if (cat_write(modp, asicp, VOYAGER_SUBADDRLO, (__u8) (offset & 0xff))) {
-                CDEBUG(("cat_subaddrsetup: write to SUBADDRLO failed\n"));
-                return 1;
-        }
-        if (asicp->subaddr > VOYAGER_SUBADDR_LO) {
-                if (cat_write
-                    (modp, asicp, VOYAGER_SUBADDRHI, (__u8) (offset >> 8))) {
-                        CDEBUG(("cat_subaddrsetup: write to SUBADDRHI failed\n"));
-                        return 1;
-                }
-                cat_read(modp, asicp, VOYAGER_SUBADDRHI, &val);
-                CDEBUG(("cat_subaddrsetup: offset = %d, hi = %d\n", offset,
-                        val));
-        }
-        cat_read(modp, asicp, VOYAGER_SUBADDRLO, &val);
-        CDEBUG(("cat_subaddrsetup: offset = %d, lo = %d\n", offset, val));
-        return 0;
-}
-
-static int
-cat_subwrite(voyager_module_t * modp, voyager_asic_t * asicp, __u16 offset,
-             __u16 len, void *buf)
-{
-        int i, retval;
-
-        /* FIXME: need special actions for VOYAGER_CAT_ID here */
-        if (asicp->asic_id == VOYAGER_CAT_ID) {
-                CDEBUG(("cat_subwrite: ATTEMPT TO WRITE TO CAT ASIC\n"));
-                /* FIXME -- This is supposed to be handled better
-                 * There is a problem writing to the cat asic in the
-                 * PSI.  The 30us delay seems to work, though */
-                udelay(30);
-        }
-
-        if ((retval = cat_subaddrsetup(modp, asicp, offset, len)) != 0) {
-                printk("cat_subwrite: cat_subaddrsetup FAILED\n");
-                return retval;
-        }
-
-        if (cat_sendinst
-            (modp, asicp, VOYAGER_SUBADDRDATA, VOYAGER_WRITE_CONFIG)) {
-                printk("cat_subwrite: cat_sendinst FAILED\n");
-                return 1;
-        }
-        for (i = 0; i < len; i++) {
-                if (cat_senddata(modp, asicp, 0xFF, ((__u8 *) buf)[i])) {
-                        printk
-                            ("cat_subwrite: cat_sendata element at %d FAILED\n",
-                             i);
-                        return 1;
-                }
-        }
-        return 0;
-}
-static int
-cat_subread(voyager_module_t * modp, voyager_asic_t * asicp, __u16 offset,
-            __u16 len, void *buf)
-{
-        int i, retval;
-
-        if ((retval = cat_subaddrsetup(modp, asicp, offset, len)) != 0) {
-                CDEBUG(("cat_subread: cat_subaddrsetup FAILED\n"));
-                return retval;
-        }
-
-        if (cat_sendinst(modp, asicp, VOYAGER_SUBADDRDATA, VOYAGER_READ_CONFIG)) {
-                CDEBUG(("cat_subread: cat_sendinst failed\n"));
-                return 1;
-        }
-        for (i = 0; i < len; i++) {
-                if (cat_getdata(modp, asicp, 0xFF, &((__u8 *) buf)[i])) {
-                        CDEBUG(("cat_subread: cat_getdata element %d failed\n",
-                                i));
-                        return 1;
-                }
-        }
-        return 0;
-}
-
-/* buffer for storing EPROM data read in during initialisation */
-static __initdata __u8 eprom_buf[0xFFFF];
-static voyager_module_t *voyager_initial_module;
-
-/* Initialise the cat bus components.  We assume this is called by the
- * boot cpu *after* all memory initialisation has been done (so we can
- * use kmalloc) but before smp initialisation, so we can probe the SMP
- * configuration and pick up necessary information.  */
-void __init voyager_cat_init(void)
-{
-        voyager_module_t **modpp = &voyager_initial_module;
-        voyager_asic_t **asicpp;
-        voyager_asic_t *qabc_asic = NULL;
-        int i, j;
-        unsigned long qic_addr = 0;
-        __u8 qabc_data[0x20];
-        __u8 num_submodules, val;
-        voyager_eprom_hdr_t *eprom_hdr = (voyager_eprom_hdr_t *) & eprom_buf[0];
-
-        __u8 cmos[4];
-        unsigned long addr;
-
-        /* initiallise the SUS mailbox */
-        for (i = 0; i < sizeof(cmos); i++)
-                cmos[i] = voyager_extended_cmos_read(VOYAGER_DUMP_LOCATION + i);
-        addr = *(unsigned long *)cmos;
-        if ((addr & 0xff000000) != 0xff000000) {
-                printk(KERN_ERR
-                       "Voyager failed to get SUS mailbox (addr = 0x%lx\n",
-                       addr);
-        } else {
-                static struct resource res;
-
-                res.name = "voyager SUS";
-                res.start = addr;
-                res.end = addr + 0x3ff;
-
-                request_resource(&iomem_resource, &res);
-                voyager_SUS = (struct voyager_SUS *)
-                    ioremap(addr, 0x400);
-                printk(KERN_NOTICE "Voyager SUS mailbox version 0x%x\n",
-                       voyager_SUS->SUS_version);
-                voyager_SUS->kernel_version = VOYAGER_MAILBOX_VERSION;
-                voyager_SUS->kernel_flags = VOYAGER_OS_HAS_SYSINT;
-        }
-
-        /* clear the processor counts */
-        voyager_extended_vic_processors = 0;
-        voyager_quad_processors = 0;
-
-        printk("VOYAGER: beginning CAT bus probe\n");
-        /* set up the SuperSet Port Block which tells us where the
-         * CAT communication port is */
-        sspb = inb(VOYAGER_SSPB_RELOCATION_PORT) * 0x100;
-        VDEBUG(("VOYAGER DEBUG: sspb = 0x%x\n", sspb));
-
-        /* now find out if were 8 slot or normal */
-        if ((inb(VIC_PROC_WHO_AM_I) & EIGHT_SLOT_IDENTIFIER)
-            == EIGHT_SLOT_IDENTIFIER) {
-                voyager_8slot = 1;
-                printk(KERN_NOTICE
-                       "Voyager: Eight slot 51xx configuration detected\n");
-        }
-
-        for (i = VOYAGER_MIN_MODULE; i <= VOYAGER_MAX_MODULE; i++) {
-                __u8 input;
-                int asic;
-                __u16 eprom_size;
-                __u16 sp_offset;
-
-                outb(VOYAGER_CAT_DESELECT, VOYAGER_CAT_CONFIG_PORT);
-                outb(i, VOYAGER_CAT_CONFIG_PORT);
-
-                /* check the presence of the module */
-                outb(VOYAGER_CAT_RUN, CAT_CMD);
-                outb(VOYAGER_CAT_IRCYC, CAT_CMD);
-                outb(VOYAGER_CAT_HEADER, CAT_DATA);
-                /* stream series of alternating 1's and 0's to stimulate
-                 * response */
-                outb(0xAA, CAT_DATA);
-                input = inb(CAT_DATA);
-                outb(VOYAGER_CAT_END, CAT_CMD);
-                if (input != VOYAGER_CAT_HEADER) {
-                        continue;
-                }
-                CDEBUG(("VOYAGER DEBUG: found module id 0x%x, %s\n", i,
-                        cat_module_name(i)));
-                *modpp = kmalloc(sizeof(voyager_module_t), GFP_KERNEL); /*&voyager_module_storage[cat_count++]; */
-                if (*modpp == NULL) {
-                        printk("**WARNING** kmalloc failure in cat_init\n");
-                        continue;
-                }
-                memset(*modpp, 0, sizeof(voyager_module_t));
-                /* need temporary asic for cat_subread.  It will be
-                 * filled in correctly later */
-                (*modpp)->asic = kmalloc(sizeof(voyager_asic_t), GFP_KERNEL);   /*&voyager_asic_storage[asic_count]; */
-                if ((*modpp)->asic == NULL) {
-                        printk("**WARNING** kmalloc failure in cat_init\n");
-                        continue;
-                }
-                memset((*modpp)->asic, 0, sizeof(voyager_asic_t));
-                (*modpp)->asic->asic_id = VOYAGER_CAT_ID;
-                (*modpp)->asic->subaddr = VOYAGER_SUBADDR_HI;
-                (*modpp)->module_addr = i;
-                (*modpp)->scan_path_connected = 0;
-                if (i == VOYAGER_PSI) {
-                        /* Exception leg for modules with no EEPROM */
-                        printk("Module \"%s\"\n", cat_module_name(i));
-                        continue;
-                }
-
-                CDEBUG(("cat_init: Reading eeprom for module 0x%x at offset %d\n", i, VOYAGER_XSUM_END_OFFSET));
-                outb(VOYAGER_CAT_RUN, CAT_CMD);
-                cat_disconnect(*modpp, (*modpp)->asic);
-                if (cat_subread(*modpp, (*modpp)->asic,
-                                VOYAGER_XSUM_END_OFFSET, sizeof(eprom_size),
-                                &eprom_size)) {
-                        printk
-                            ("**WARNING**: Voyager couldn't read EPROM size for module 0x%x\n",
-                             i);
-                        outb(VOYAGER_CAT_END, CAT_CMD);
-                        continue;
-                }
-                if (eprom_size > sizeof(eprom_buf)) {
-                        printk
-                            ("**WARNING**: Voyager insufficient size to read EPROM data, module 0x%x.  Need %d\n",
-                             i, eprom_size);
-                        outb(VOYAGER_CAT_END, CAT_CMD);
-                        continue;
-                }
-                outb(VOYAGER_CAT_END, CAT_CMD);
-                outb(VOYAGER_CAT_RUN, CAT_CMD);
-                CDEBUG(("cat_init: module 0x%x, eeprom_size %d\n", i,
-                        eprom_size));
-                if (cat_subread
-                    (*modpp, (*modpp)->asic, 0, eprom_size, eprom_buf)) {
-                        outb(VOYAGER_CAT_END, CAT_CMD);
-                        continue;
-                }
-                outb(VOYAGER_CAT_END, CAT_CMD);
-                printk("Module \"%s\", version 0x%x, tracer 0x%x, asics %d\n",
-                       cat_module_name(i), eprom_hdr->version_id,
-                       *((__u32 *) eprom_hdr->tracer), eprom_hdr->num_asics);
-                (*modpp)->ee_size = eprom_hdr->ee_size;
-                (*modpp)->num_asics = eprom_hdr->num_asics;
-                asicpp = &((*modpp)->asic);
-                sp_offset = eprom_hdr->scan_path_offset;
-                /* All we really care about are the Quad cards.  We
-                 * identify them because they are in a processor slot
-                 * and have only four asics */
-                if ((i < 0x10 || (i >= 0x14 && i < 0x1c) || i > 0x1f)) {
-                        modpp = &((*modpp)->next);
-                        continue;
-                }
-                /* Now we know it's in a processor slot, does it have
-                 * a quad baseboard submodule */
-                outb(VOYAGER_CAT_RUN, CAT_CMD);
-                cat_read(*modpp, (*modpp)->asic, VOYAGER_SUBMODPRESENT,
-                         &num_submodules);
-                /* lowest two bits, active low */
-                num_submodules = ~(0xfc | num_submodules);
-                CDEBUG(("VOYAGER CAT: %d submodules present\n",
-                        num_submodules));
-                if (num_submodules == 0) {
-                        /* fill in the dyadic extended processors */
-                        __u8 cpu = i & 0x07;
-
-                        printk("Module \"%s\": Dyadic Processor Card\n",
-                               cat_module_name(i));
-                        voyager_extended_vic_processors |= (1 << cpu);
-                        cpu += 4;
-                        voyager_extended_vic_processors |= (1 << cpu);
-                        outb(VOYAGER_CAT_END, CAT_CMD);
-                        continue;
-                }
-
-                /* now we want to read the asics on the first submodule,
-                 * which should be the quad base board */
-
-                cat_read(*modpp, (*modpp)->asic, VOYAGER_SUBMODSELECT, &val);
-                CDEBUG(("cat_init: SUBMODSELECT value = 0x%x\n", val));
-                val = (val & 0x7c) | VOYAGER_QUAD_BASEBOARD;
-                cat_write(*modpp, (*modpp)->asic, VOYAGER_SUBMODSELECT, val);
-
-                outb(VOYAGER_CAT_END, CAT_CMD);
-
-                CDEBUG(("cat_init: Reading eeprom for module 0x%x at offset %d\n", i, VOYAGER_XSUM_END_OFFSET));
-                outb(VOYAGER_CAT_RUN, CAT_CMD);
-                cat_disconnect(*modpp, (*modpp)->asic);
-                if (cat_subread(*modpp, (*modpp)->asic,
-                                VOYAGER_XSUM_END_OFFSET, sizeof(eprom_size),
-                                &eprom_size)) {
-                        printk
-                            ("**WARNING**: Voyager couldn't read EPROM size for module 0x%x\n",
-                             i);
-                        outb(VOYAGER_CAT_END, CAT_CMD);
-                        continue;
-                }
-                if (eprom_size > sizeof(eprom_buf)) {
-                        printk
-                            ("**WARNING**: Voyager insufficient size to read EPROM data, module 0x%x.  Need %d\n",
-                             i, eprom_size);
-                        outb(VOYAGER_CAT_END, CAT_CMD);
-                        continue;
-                }
-                outb(VOYAGER_CAT_END, CAT_CMD);
-                outb(VOYAGER_CAT_RUN, CAT_CMD);
-                CDEBUG(("cat_init: module 0x%x, eeprom_size %d\n", i,
-                        eprom_size));
-                if (cat_subread
-                    (*modpp, (*modpp)->asic, 0, eprom_size, eprom_buf)) {
-                        outb(VOYAGER_CAT_END, CAT_CMD);
-                        continue;
-                }
-                outb(VOYAGER_CAT_END, CAT_CMD);
-                /* Now do everything for the QBB submodule 1 */
-                (*modpp)->ee_size = eprom_hdr->ee_size;
-                (*modpp)->num_asics = eprom_hdr->num_asics;
-                asicpp = &((*modpp)->asic);
-                sp_offset = eprom_hdr->scan_path_offset;
-                /* get rid of the dummy CAT asic and read the real one */
-                kfree((*modpp)->asic);
-                for (asic = 0; asic < (*modpp)->num_asics; asic++) {
-                        int j;
-                        voyager_asic_t *asicp = *asicpp = kzalloc(sizeof(voyager_asic_t), GFP_KERNEL);  /*&voyager_asic_storage[asic_count++]; */
-                        voyager_sp_table_t *sp_table;
-                        voyager_at_t *asic_table;
-                        voyager_jtt_t *jtag_table;
-
-                        if (asicp == NULL) {
-                                printk
-                                    ("**WARNING** kmalloc failure in cat_init\n");
-                                continue;
-                        }
-                        asicpp = &(asicp->next);
-                        asicp->asic_location = asic;
-                        sp_table =
-                            (voyager_sp_table_t *) (eprom_buf + sp_offset);
-                        asicp->asic_id = sp_table->asic_id;
-                        asic_table =
-                            (voyager_at_t *) (eprom_buf +
-                                              sp_table->asic_data_offset);
-                        for (j = 0; j < 4; j++)
-                                asicp->jtag_id[j] = asic_table->jtag_id[j];
-                        jtag_table =
-                            (voyager_jtt_t *) (eprom_buf +
-                                               asic_table->jtag_offset);
-                        asicp->ireg_length = jtag_table->ireg_len;
-                        asicp->bit_location = (*modpp)->inst_bits;
-                        (*modpp)->inst_bits += asicp->ireg_length;
-                        if (asicp->ireg_length > (*modpp)->largest_reg)
-                                (*modpp)->largest_reg = asicp->ireg_length;
-                        if (asicp->ireg_length < (*modpp)->smallest_reg ||
-                            (*modpp)->smallest_reg == 0)
-                                (*modpp)->smallest_reg = asicp->ireg_length;
-                        CDEBUG(("asic 0x%x, ireg_length=%d, bit_location=%d\n",
-                                asicp->asic_id, asicp->ireg_length,
-                                asicp->bit_location));
-                        if (asicp->asic_id == VOYAGER_QUAD_QABC) {
-                                CDEBUG(("VOYAGER CAT: QABC ASIC found\n"));
-                                qabc_asic = asicp;
-                        }
-                        sp_offset += sizeof(voyager_sp_table_t);
-                }
-                CDEBUG(("Module inst_bits = %d, largest_reg = %d, smallest_reg=%d\n", (*modpp)->inst_bits, (*modpp)->largest_reg, (*modpp)->smallest_reg));
-                /* OK, now we have the QUAD ASICs set up, use them.
-                 * we need to:
-                 *
-                 * 1. Find the Memory area for the Quad CPIs.
-                 * 2. Find the Extended VIC processor
-                 * 3. Configure a second extended VIC processor (This
-                 *    cannot be done for the 51xx.
-                 * */
-                outb(VOYAGER_CAT_RUN, CAT_CMD);
-                cat_connect(*modpp, (*modpp)->asic);
-                CDEBUG(("CAT CONNECTED!!\n"));
-                cat_subread(*modpp, qabc_asic, 0, sizeof(qabc_data), qabc_data);
-                qic_addr = qabc_data[5] << 8;
-                qic_addr = (qic_addr | qabc_data[6]) << 8;
-                qic_addr = (qic_addr | qabc_data[7]) << 8;
-                printk
-                    ("Module \"%s\": Quad Processor Card; CPI 0x%lx, SET=0x%x\n",
-                     cat_module_name(i), qic_addr, qabc_data[8]);
-#if 0                           /* plumbing fails---FIXME */
-                if ((qabc_data[8] & 0xf0) == 0) {
-                        /* FIXME: 32 way 8 CPU slot monster cannot be
-                         * plumbed this way---need to check for it */
-
-                        printk("Plumbing second Extended Quad Processor\n");
-                        /* second VIC line hardwired to Quad CPU 1 */
-                        qabc_data[8] |= 0x20;
-                        cat_subwrite(*modpp, qabc_asic, 8, 1, &qabc_data[8]);
-#ifdef VOYAGER_CAT_DEBUG
-                        /* verify plumbing */
-                        cat_subread(*modpp, qabc_asic, 8, 1, &qabc_data[8]);
-                        if ((qabc_data[8] & 0xf0) == 0) {
-                                CDEBUG(("PLUMBING FAILED: 0x%x\n",
-                                        qabc_data[8]));
-                        }
-#endif
-                }
-#endif
-
-                {
-                        struct resource *res =
-                            kzalloc(sizeof(struct resource), GFP_KERNEL);
-                        res->name = kmalloc(128, GFP_KERNEL);
-                        sprintf((char *)res->name, "Voyager %s Quad CPI",
-                                cat_module_name(i));
-                        res->start = qic_addr;
-                        res->end = qic_addr + 0x3ff;
-                        request_resource(&iomem_resource, res);
-                }
-
-                qic_addr = (unsigned long)ioremap_cache(qic_addr, 0x400);
-
-                for (j = 0; j < 4; j++) {
-                        __u8 cpu;
-
-                        if (voyager_8slot) {
-                                /* 8 slot has a different mapping,
-                                 * each slot has only one vic line, so
-                                 * 1 cpu in each slot must be < 8 */
-                                cpu = (i & 0x07) + j * 8;
-                        } else {
-                                cpu = (i & 0x03) + j * 4;
-                        }
-                        if ((qabc_data[8] & (1 << j))) {
-                                voyager_extended_vic_processors |= (1 << cpu);
-                        }
-                        if (qabc_data[8] & (1 << (j + 4))) {
-                                /* Second SET register plumbed: Quad
-                                 * card has two VIC connected CPUs.
-                                 * Secondary cannot be booted as a VIC
-                                 * CPU */
-                                voyager_extended_vic_processors |= (1 << cpu);
-                                voyager_allowed_boot_processors &=
-                                    (~(1 << cpu));
-                        }
-
-                        voyager_quad_processors |= (1 << cpu);
-                        voyager_quad_cpi_addr[cpu] = (struct voyager_qic_cpi *)
-                            (qic_addr + (j << 8));
-                        CDEBUG(("CPU%d: CPI address 0x%lx\n", cpu,
-                                (unsigned long)voyager_quad_cpi_addr[cpu]));
-                }
-                outb(VOYAGER_CAT_END, CAT_CMD);
-
-                *asicpp = NULL;
-                modpp = &((*modpp)->next);
-        }
-        *modpp = NULL;
-        printk
-            ("CAT Bus Initialisation finished: extended procs 0x%x, quad procs 0x%x, allowed vic boot = 0x%x\n",
-             voyager_extended_vic_processors, voyager_quad_processors,
-             voyager_allowed_boot_processors);
-        request_resource(&ioport_resource, &vic_res);
-        if (voyager_quad_processors)
-                request_resource(&ioport_resource, &qic_res);
-        /* set up the front power switch */
-}
-
-int voyager_cat_readb(__u8 module, __u8 asic, int reg)
-{
-        return 0;
-}
-
-static int cat_disconnect(voyager_module_t * modp, voyager_asic_t * asicp)
-{
-        __u8 val;
-        int err = 0;
-
-        if (!modp->scan_path_connected)
-                return 0;
-        if (asicp->asic_id != VOYAGER_CAT_ID) {
-                CDEBUG(("cat_disconnect: ASIC is not CAT\n"));
-                return 1;
-        }
-        err = cat_read(modp, asicp, VOYAGER_SCANPATH, &val);
-        if (err) {
-                CDEBUG(("cat_disconnect: failed to read SCANPATH\n"));
-                return err;
-        }
-        val &= VOYAGER_DISCONNECT_ASIC;
-        err = cat_write(modp, asicp, VOYAGER_SCANPATH, val);
-        if (err) {
-                CDEBUG(("cat_disconnect: failed to write SCANPATH\n"));
-                return err;
-        }
-        outb(VOYAGER_CAT_END, CAT_CMD);
-        outb(VOYAGER_CAT_RUN, CAT_CMD);
-        modp->scan_path_connected = 0;
-
-        return 0;
-}
-
-static int cat_connect(voyager_module_t * modp, voyager_asic_t * asicp)
-{
-        __u8 val;
-        int err = 0;
-
-        if (modp->scan_path_connected)
-                return 0;
-        if (asicp->asic_id != VOYAGER_CAT_ID) {
-                CDEBUG(("cat_connect: ASIC is not CAT\n"));
-                return 1;
-        }
-
-        err = cat_read(modp, asicp, VOYAGER_SCANPATH, &val);
-        if (err) {
-                CDEBUG(("cat_connect: failed to read SCANPATH\n"));
-                return err;
-        }
-        val |= VOYAGER_CONNECT_ASIC;
-        err = cat_write(modp, asicp, VOYAGER_SCANPATH, val);
-        if (err) {
-                CDEBUG(("cat_connect: failed to write SCANPATH\n"));
-                return err;
-        }
-        outb(VOYAGER_CAT_END, CAT_CMD);
-        outb(VOYAGER_CAT_RUN, CAT_CMD);
-        modp->scan_path_connected = 1;
-
-        return 0;
-}
-
-void voyager_cat_power_off(void)
-{
-        /* Power the machine off by writing to the PSI over the CAT
-         * bus */
-        __u8 data;
-        voyager_module_t psi = { 0 };
-        voyager_asic_t psi_asic = { 0 };
-
-        psi.asic = &psi_asic;
-        psi.asic->asic_id = VOYAGER_CAT_ID;
-        psi.asic->subaddr = VOYAGER_SUBADDR_HI;
-        psi.module_addr = VOYAGER_PSI;
-        psi.scan_path_connected = 0;
-
-        outb(VOYAGER_CAT_END, CAT_CMD);
-        /* Connect the PSI to the CAT Bus */
-        outb(VOYAGER_CAT_DESELECT, VOYAGER_CAT_CONFIG_PORT);
-        outb(VOYAGER_PSI, VOYAGER_CAT_CONFIG_PORT);
-        outb(VOYAGER_CAT_RUN, CAT_CMD);
-        cat_disconnect(&psi, &psi_asic);
-        /* Read the status */
-        cat_subread(&psi, &psi_asic, VOYAGER_PSI_GENERAL_REG, 1, &data);
-        outb(VOYAGER_CAT_END, CAT_CMD);
-        CDEBUG(("PSI STATUS 0x%x\n", data));
-        /* These two writes are power off prep and perform */
-        data = PSI_CLEAR;
-        outb(VOYAGER_CAT_RUN, CAT_CMD);
-        cat_subwrite(&psi, &psi_asic, VOYAGER_PSI_GENERAL_REG, 1, &data);
-        outb(VOYAGER_CAT_END, CAT_CMD);
-        data = PSI_POWER_DOWN;
-        outb(VOYAGER_CAT_RUN, CAT_CMD);
-        cat_subwrite(&psi, &psi_asic, VOYAGER_PSI_GENERAL_REG, 1, &data);
-        outb(VOYAGER_CAT_END, CAT_CMD);
-}
-
-struct voyager_status voyager_status = { 0 };
-
-void voyager_cat_psi(__u8 cmd, __u16 reg, __u8 * data)
-{
-        voyager_module_t psi = { 0 };
-        voyager_asic_t psi_asic = { 0 };
-
-        psi.asic = &psi_asic;
-        psi.asic->asic_id = VOYAGER_CAT_ID;
-        psi.asic->subaddr = VOYAGER_SUBADDR_HI;
-        psi.module_addr = VOYAGER_PSI;
-        psi.scan_path_connected = 0;
-
-        outb(VOYAGER_CAT_END, CAT_CMD);
-        /* Connect the PSI to the CAT Bus */
-        outb(VOYAGER_CAT_DESELECT, VOYAGER_CAT_CONFIG_PORT);
-        outb(VOYAGER_PSI, VOYAGER_CAT_CONFIG_PORT);
-        outb(VOYAGER_CAT_RUN, CAT_CMD);
-        cat_disconnect(&psi, &psi_asic);
-        switch (cmd) {
-        case VOYAGER_PSI_READ:
-                cat_read(&psi, &psi_asic, reg, data);
-                break;
-        case VOYAGER_PSI_WRITE:
-                cat_write(&psi, &psi_asic, reg, *data);
-                break;
-        case VOYAGER_PSI_SUBREAD:
-                cat_subread(&psi, &psi_asic, reg, 1, data);
-                break;
-        case VOYAGER_PSI_SUBWRITE:
-                cat_subwrite(&psi, &psi_asic, reg, 1, data);
-                break;
-        default:
-                printk(KERN_ERR "Voyager PSI, unrecognised command %d\n", cmd);
-                break;
-        }
-        outb(VOYAGER_CAT_END, CAT_CMD);
-}
-
-void voyager_cat_do_common_interrupt(void)
-{
-        /* This is caused either by a memory parity error or something
-         * in the PSI */
-        __u8 data;
-        voyager_module_t psi = { 0 };
-        voyager_asic_t psi_asic = { 0 };
-        struct voyager_psi psi_reg;
-        int i;
-      re_read:
-        psi.asic = &psi_asic;
-        psi.asic->asic_id = VOYAGER_CAT_ID;
-        psi.asic->subaddr = VOYAGER_SUBADDR_HI;
-        psi.module_addr = VOYAGER_PSI;
-        psi.scan_path_connected = 0;
-
-        outb(VOYAGER_CAT_END, CAT_CMD);
-        /* Connect the PSI to the CAT Bus */
-        outb(VOYAGER_CAT_DESELECT, VOYAGER_CAT_CONFIG_PORT);
-        outb(VOYAGER_PSI, VOYAGER_CAT_CONFIG_PORT);
-        outb(VOYAGER_CAT_RUN, CAT_CMD);
-        cat_disconnect(&psi, &psi_asic);
-        /* Read the status.  NOTE: Need to read *all* the PSI regs here
-         * otherwise the cmn int will be reasserted */
-        for (i = 0; i < sizeof(psi_reg.regs); i++) {
-                cat_read(&psi, &psi_asic, i, &((__u8 *) & psi_reg.regs)[i]);
-        }
-        outb(VOYAGER_CAT_END, CAT_CMD);
-        if ((psi_reg.regs.checkbit & 0x02) == 0) {
-                psi_reg.regs.checkbit |= 0x02;
-                cat_write(&psi, &psi_asic, 5, psi_reg.regs.checkbit);
-                printk("VOYAGER RE-READ PSI\n");
-                goto re_read;
-        }
-        outb(VOYAGER_CAT_RUN, CAT_CMD);
-        for (i = 0; i < sizeof(psi_reg.subregs); i++) {
-                /* This looks strange, but the PSI doesn't do auto increment
-                 * correctly */
-                cat_subread(&psi, &psi_asic, VOYAGER_PSI_SUPPLY_REG + i,
-                            1, &((__u8 *) & psi_reg.subregs)[i]);
-        }
-        outb(VOYAGER_CAT_END, CAT_CMD);
-#ifdef VOYAGER_CAT_DEBUG
-        printk("VOYAGER PSI: ");
-        for (i = 0; i < sizeof(psi_reg.regs); i++)
-                printk("%02x ", ((__u8 *) & psi_reg.regs)[i]);
-        printk("\n           ");
-        for (i = 0; i < sizeof(psi_reg.subregs); i++)
-                printk("%02x ", ((__u8 *) & psi_reg.subregs)[i]);
-        printk("\n");
-#endif
-        if (psi_reg.regs.intstatus & PSI_MON) {
-                /* switch off or power fail */
-
-                if (psi_reg.subregs.supply & PSI_SWITCH_OFF) {
-                        if (voyager_status.switch_off) {
-                                printk(KERN_ERR
-                                       "Voyager front panel switch turned off again---Immediate power off!\n");
-                                voyager_cat_power_off();
-                                /* not reached */
-                        } else {
-                                printk(KERN_ERR
-                                       "Voyager front panel switch turned off\n");
-                                voyager_status.switch_off = 1;
-                                voyager_status.request_from_kernel = 1;
-                                wake_up_process(voyager_thread);
-                        }
-                        /* Tell the hardware we're taking care of the
-                         * shutdown, otherwise it will power the box off
-                         * within 3 seconds of the switch being pressed and,
-                         * which is much more important to us, continue to 
-                         * assert the common interrupt */
-                        data = PSI_CLR_SWITCH_OFF;
-                        outb(VOYAGER_CAT_RUN, CAT_CMD);
-                        cat_subwrite(&psi, &psi_asic, VOYAGER_PSI_SUPPLY_REG,
-                                     1, &data);
-                        outb(VOYAGER_CAT_END, CAT_CMD);
-                } else {
-
-                        VDEBUG(("Voyager ac fail reg 0x%x\n",
-                                psi_reg.subregs.ACfail));
-                        if ((psi_reg.subregs.ACfail & AC_FAIL_STAT_CHANGE) == 0) {
-                                /* No further update */
-                                return;
-                        }
-#if 0
-                        /* Don't bother trying to find out who failed.
-                         * FIXME: This probably makes the code incorrect on
-                         * anything other than a 345x */
-                        for (i = 0; i < 5; i++) {
-                                if (psi_reg.subregs.ACfail & (1 << i)) {
-                                        break;
-                                }
-                        }
-                        printk(KERN_NOTICE "AC FAIL IN SUPPLY %d\n", i);
-#endif
-                        /* DON'T do this: it shuts down the AC PSI 
-                           outb(VOYAGER_CAT_RUN, CAT_CMD);
-                           data = PSI_MASK_MASK | i;
-                           cat_subwrite(&psi, &psi_asic, VOYAGER_PSI_MASK,
-                           1, &data);
-                           outb(VOYAGER_CAT_END, CAT_CMD);
-                         */
-                        printk(KERN_ERR "Voyager AC power failure\n");
-                        outb(VOYAGER_CAT_RUN, CAT_CMD);
-                        data = PSI_COLD_START;
-                        cat_subwrite(&psi, &psi_asic, VOYAGER_PSI_GENERAL_REG,
-                                     1, &data);
-                        outb(VOYAGER_CAT_END, CAT_CMD);
-                        voyager_status.power_fail = 1;
-                        voyager_status.request_from_kernel = 1;
-                        wake_up_process(voyager_thread);
-                }
-
-        } else if (psi_reg.regs.intstatus & PSI_FAULT) {
-                /* Major fault! */
-                printk(KERN_ERR
-                       "Voyager PSI Detected major fault, immediate power off!\n");
-                voyager_cat_power_off();
-                /* not reached */
-        } else if (psi_reg.regs.intstatus & (PSI_DC_FAIL | PSI_ALARM
-                                             | PSI_CURRENT | PSI_DVM
-                                             | PSI_PSCFAULT | PSI_STAT_CHG)) {
-                /* other psi fault */
-
-                printk(KERN_WARNING "Voyager PSI status 0x%x\n", data);
-                /* clear the PSI fault */
-                outb(VOYAGER_CAT_RUN, CAT_CMD);
-                cat_write(&psi, &psi_asic, VOYAGER_PSI_STATUS_REG, 0);
-                outb(VOYAGER_CAT_END, CAT_CMD);
-        }
-}
diff --git a/arch/x86/mach-voyager/voyager_smp.c b/arch/x86/mach-voyager/voyager_smp.c
deleted file mode 100644
index b9cc84a2a4fc..000000000000
--- a/arch/x86/mach-voyager/voyager_smp.c
+++ /dev/null
@@ -1,1807 +0,0 @@
-/* -*- mode: c; c-basic-offset: 8 -*- */
-
-/* Copyright (C) 1999,2001
- *
- * Author: J.E.J.Bottomley@HansenPartnership.com
- *
- * This file provides all the same external entries as smp.c but uses
- * the voyager hal to provide the functionality
- */
-#include <linux/cpu.h>
-#include <linux/module.h>
-#include <linux/mm.h>
-#include <linux/kernel_stat.h>
-#include <linux/delay.h>
-#include <linux/mc146818rtc.h>
-#include <linux/cache.h>
-#include <linux/interrupt.h>
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/bootmem.h>
-#include <linux/completion.h>
-#include <asm/desc.h>
-#include <asm/voyager.h>
-#include <asm/vic.h>
-#include <asm/mtrr.h>
-#include <asm/pgalloc.h>
-#include <asm/tlbflush.h>
-#include <asm/arch_hooks.h>
-#include <asm/trampoline.h>
-
-/* TLB state -- visible externally, indexed physically */
-DEFINE_PER_CPU_SHARED_ALIGNED(struct tlb_state, cpu_tlbstate) = { &init_mm, 0 };
-
-/* CPU IRQ affinity -- set to all ones initially */
-static unsigned long cpu_irq_affinity[NR_CPUS] __cacheline_aligned =
-        {[0 ... NR_CPUS-1]  = ~0UL };
-
-/* per CPU data structure (for /proc/cpuinfo et al), visible externally
- * indexed physically */
-DEFINE_PER_CPU_SHARED_ALIGNED(struct cpuinfo_x86, cpu_info);
-EXPORT_PER_CPU_SYMBOL(cpu_info);
-
-/* physical ID of the CPU used to boot the system */
-unsigned char boot_cpu_id;
-
-/* The memory line addresses for the Quad CPIs */
-struct voyager_qic_cpi *voyager_quad_cpi_addr[NR_CPUS] __cacheline_aligned;
-
-/* The masks for the Extended VIC processors, filled in by cat_init */
-__u32 voyager_extended_vic_processors = 0;
-
-/* Masks for the extended Quad processors which cannot be VIC booted */
-__u32 voyager_allowed_boot_processors = 0;
-
-/* The mask for the Quad Processors (both extended and non-extended) */
-__u32 voyager_quad_processors = 0;
-
-/* Total count of live CPUs, used in process.c to display
- * the CPU information and in irq.c for the per CPU irq
- * activity count.  Finally exported by i386_ksyms.c */
-static int voyager_extended_cpus = 1;
-
-/* Used for the invalidate map that's also checked in the spinlock */
-static volatile unsigned long smp_invalidate_needed;
-
-/* Bitmask of CPUs present in the system - exported by i386_syms.c, used
- * by scheduler but indexed physically */
-static cpumask_t voyager_phys_cpu_present_map = CPU_MASK_NONE;
-
-/* The internal functions */
-static void send_CPI(__u32 cpuset, __u8 cpi);
-static void ack_CPI(__u8 cpi);
-static int ack_QIC_CPI(__u8 cpi);
-static void ack_special_QIC_CPI(__u8 cpi);
-static void ack_VIC_CPI(__u8 cpi);
-static void send_CPI_allbutself(__u8 cpi);
-static void mask_vic_irq(unsigned int irq);
-static void unmask_vic_irq(unsigned int irq);
-static unsigned int startup_vic_irq(unsigned int irq);
-static void enable_local_vic_irq(unsigned int irq);
-static void disable_local_vic_irq(unsigned int irq);
-static void before_handle_vic_irq(unsigned int irq);
-static void after_handle_vic_irq(unsigned int irq);
-static void set_vic_irq_affinity(unsigned int irq, const struct cpumask *mask);
-static void ack_vic_irq(unsigned int irq);
-static void vic_enable_cpi(void);
-static void do_boot_cpu(__u8 cpuid);
-static void do_quad_bootstrap(void);
-static void initialize_secondary(void);
-
-int hard_smp_processor_id(void);
-int safe_smp_processor_id(void);
-
-/* Inline functions */
-static inline void send_one_QIC_CPI(__u8 cpu, __u8 cpi)
-{
-        voyager_quad_cpi_addr[cpu]->qic_cpi[cpi].cpi =
-            (smp_processor_id() << 16) + cpi;
-}
-
-static inline void send_QIC_CPI(__u32 cpuset, __u8 cpi)
-{
-        int cpu;
-
-        for_each_online_cpu(cpu) {
-                if (cpuset & (1 << cpu)) {
-#ifdef VOYAGER_DEBUG
-                        if (!cpu_online(cpu))
-                                VDEBUG(("CPU%d sending cpi %d to CPU%d not in "
-                                        "cpu_online_map\n",
-                                        hard_smp_processor_id(), cpi, cpu));
-#endif
-                        send_one_QIC_CPI(cpu, cpi - QIC_CPI_OFFSET);
-                }
-        }
-}
-
-static inline void wrapper_smp_local_timer_interrupt(void)
-{
-        irq_enter();
-        smp_local_timer_interrupt();
-        irq_exit();
-}
-
-static inline void send_one_CPI(__u8 cpu, __u8 cpi)
-{
-        if (voyager_quad_processors & (1 << cpu))
-                send_one_QIC_CPI(cpu, cpi - QIC_CPI_OFFSET);
-        else
-                send_CPI(1 << cpu, cpi);
-}
-
-static inline void send_CPI_allbutself(__u8 cpi)
-{
-        __u8 cpu = smp_processor_id();
-        __u32 mask = cpus_addr(cpu_online_map)[0] & ~(1 << cpu);
-        send_CPI(mask, cpi);
-}
-
-static inline int is_cpu_quad(void)
-{
-        __u8 cpumask = inb(VIC_PROC_WHO_AM_I);
-        return ((cpumask & QUAD_IDENTIFIER) == QUAD_IDENTIFIER);
-}
-
-static inline int is_cpu_extended(void)
-{
-        __u8 cpu = hard_smp_processor_id();
-
-        return (voyager_extended_vic_processors & (1 << cpu));
-}
-
-static inline int is_cpu_vic_boot(void)
-{
-        __u8 cpu = hard_smp_processor_id();
-
-        return (voyager_extended_vic_processors
-                & voyager_allowed_boot_processors & (1 << cpu));
-}
-
-static inline void ack_CPI(__u8 cpi)
-{
-        switch (cpi) {
-        case VIC_CPU_BOOT_CPI:
-                if (is_cpu_quad() && !is_cpu_vic_boot())
-                        ack_QIC_CPI(cpi);
-                else
-                        ack_VIC_CPI(cpi);
-                break;
-        case VIC_SYS_INT:
-        case VIC_CMN_INT:
-                /* These are slightly strange.  Even on the Quad card,
-                 * They are vectored as VIC CPIs */
-                if (is_cpu_quad())
-                        ack_special_QIC_CPI(cpi);
-                else
-                        ack_VIC_CPI(cpi);
-                break;
-        default:
-                printk("VOYAGER ERROR: CPI%d is in common CPI code\n", cpi);
-                break;
-        }
-}
-
-/* local variables */
-
-/* The VIC IRQ descriptors -- these look almost identical to the
- * 8259 IRQs except that masks and things must be kept per processor
- */
-static struct irq_chip vic_chip = {
-        .name = "VIC",
-        .startup = startup_vic_irq,
-        .mask = mask_vic_irq,
-        .unmask = unmask_vic_irq,
-        .set_affinity = set_vic_irq_affinity,
-};
-
-/* used to count up as CPUs are brought on line (starts at 0) */
-static int cpucount = 0;
-
-/* The per cpu profile stuff - used in smp_local_timer_interrupt */
-static DEFINE_PER_CPU(int, prof_multiplier) = 1;
-static DEFINE_PER_CPU(int, prof_old_multiplier) = 1;
-static DEFINE_PER_CPU(int, prof_counter) = 1;
-
-/* the map used to check if a CPU has booted */
-static __u32 cpu_booted_map;
-
-/* the synchronize flag used to hold all secondary CPUs spinning in
- * a tight loop until the boot sequence is ready for them */
-static cpumask_t smp_commenced_mask = CPU_MASK_NONE;
-
-/* This is for the new dynamic CPU boot code */
-
-/* The per processor IRQ masks (these are usually kept in sync) */
-static __u16 vic_irq_mask[NR_CPUS] __cacheline_aligned;
-
-/* the list of IRQs to be enabled by the VIC_ENABLE_IRQ_CPI */
-static __u16 vic_irq_enable_mask[NR_CPUS] __cacheline_aligned = { 0 };
-
-/* Lock for enable/disable of VIC interrupts */
-static __cacheline_aligned DEFINE_SPINLOCK(vic_irq_lock);
-
-/* The boot processor is correctly set up in PC mode when it
- * comes up, but the secondaries need their master/slave 8259
- * pairs initializing correctly */
-
-/* Interrupt counters (per cpu) and total - used to try to
- * even up the interrupt handling routines */
-static long vic_intr_total = 0;
-static long vic_intr_count[NR_CPUS] __cacheline_aligned = { 0 };
-static unsigned long vic_tick[NR_CPUS] __cacheline_aligned = { 0 };
-
-/* Since we can only use CPI0, we fake all the other CPIs */
-static unsigned long vic_cpi_mailbox[NR_CPUS] __cacheline_aligned;
-
-/* debugging routine to read the isr of the cpu's pic */
-static inline __u16 vic_read_isr(void)
-{
-        __u16 isr;
-
-        outb(0x0b, 0xa0);
-        isr = inb(0xa0) << 8;
-        outb(0x0b, 0x20);
-        isr |= inb(0x20);
-
-        return isr;
-}
-
-static __init void qic_setup(void)
-{
-        if (!is_cpu_quad()) {
-                /* not a quad, no setup */
-                return;
-        }
-        outb(QIC_DEFAULT_MASK0, QIC_MASK_REGISTER0);
-        outb(QIC_CPI_ENABLE, QIC_MASK_REGISTER1);
-
-        if (is_cpu_extended()) {
-                /* the QIC duplicate of the VIC base register */
-                outb(VIC_DEFAULT_CPI_BASE, QIC_VIC_CPI_BASE_REGISTER);
-                outb(QIC_DEFAULT_CPI_BASE, QIC_CPI_BASE_REGISTER);
-
-                /* FIXME: should set up the QIC timer and memory parity
-                 * error vectors here */
-        }
-}
-
-static __init void vic_setup_pic(void)
-{
-        outb(1, VIC_REDIRECT_REGISTER_1);
-        /* clear the claim registers for dynamic routing */
-        outb(0, VIC_CLAIM_REGISTER_0);
-        outb(0, VIC_CLAIM_REGISTER_1);
-
-        outb(0, VIC_PRIORITY_REGISTER);
-        /* Set the Primary and Secondary Microchannel vector
-         * bases to be the same as the ordinary interrupts
-         *
-         * FIXME: This would be more efficient using separate
-         * vectors. */
-        outb(FIRST_EXTERNAL_VECTOR, VIC_PRIMARY_MC_BASE);
-        outb(FIRST_EXTERNAL_VECTOR, VIC_SECONDARY_MC_BASE);
-        /* Now initiallise the master PIC belonging to this CPU by
-         * sending the four ICWs */
-
-        /* ICW1: level triggered, ICW4 needed */
-        outb(0x19, 0x20);
-
-        /* ICW2: vector base */
-        outb(FIRST_EXTERNAL_VECTOR, 0x21);
-
-        /* ICW3: slave at line 2 */
-        outb(0x04, 0x21);
-
-        /* ICW4: 8086 mode */
-        outb(0x01, 0x21);
-
-        /* now the same for the slave PIC */
-
-        /* ICW1: level trigger, ICW4 needed */
-        outb(0x19, 0xA0);
-
-        /* ICW2: slave vector base */
-        outb(FIRST_EXTERNAL_VECTOR + 8, 0xA1);
-
-        /* ICW3: slave ID */
-        outb(0x02, 0xA1);
-
-        /* ICW4: 8086 mode */
-        outb(0x01, 0xA1);
-}
-
-static void do_quad_bootstrap(void)
-{
-        if (is_cpu_quad() && is_cpu_vic_boot()) {
-                int i;
-                unsigned long flags;
-                __u8 cpuid = hard_smp_processor_id();
-
-                local_irq_save(flags);
-
-                for (i = 0; i < 4; i++) {
-                        /* FIXME: this would be >>3 &0x7 on the 32 way */
-                        if (((cpuid >> 2) & 0x03) == i)
-                                /* don't lower our own mask! */
-                                continue;
-
-                        /* masquerade as local Quad CPU */
-                        outb(QIC_CPUID_ENABLE | i, QIC_PROCESSOR_ID);
-                        /* enable the startup CPI */
-                        outb(QIC_BOOT_CPI_MASK, QIC_MASK_REGISTER1);
-                        /* restore cpu id */
-                        outb(0, QIC_PROCESSOR_ID);
-                }
-                local_irq_restore(flags);
-        }
-}
-
-void prefill_possible_map(void)
-{
-        /* This is empty on voyager because we need a much
-         * earlier detection which is done in find_smp_config */
-}
-
-/* Set up all the basic stuff: read the SMP config and make all the
- * SMP information reflect only the boot cpu.  All others will be
- * brought on-line later. */
-void __init find_smp_config(void)
-{
-        int i;
-
-        boot_cpu_id = hard_smp_processor_id();
-
-        printk("VOYAGER SMP: Boot cpu is %d\n", boot_cpu_id);
-
-        /* initialize the CPU structures (moved from smp_boot_cpus) */
-        for (i = 0; i < nr_cpu_ids; i++)
-                cpu_irq_affinity[i] = ~0;
-        cpu_online_map = cpumask_of_cpu(boot_cpu_id);
-
-        /* The boot CPU must be extended */
-        voyager_extended_vic_processors = 1 << boot_cpu_id;
-        /* initially, all of the first 8 CPUs can boot */
-        voyager_allowed_boot_processors = 0xff;
-        /* set up everything for just this CPU, we can alter
-         * this as we start the other CPUs later */
-        /* now get the CPU disposition from the extended CMOS */
-        cpus_addr(voyager_phys_cpu_present_map)[0] =
-            voyager_extended_cmos_read(VOYAGER_PROCESSOR_PRESENT_MASK);
-        cpus_addr(voyager_phys_cpu_present_map)[0] |=
-            voyager_extended_cmos_read(VOYAGER_PROCESSOR_PRESENT_MASK + 1) << 8;
-        cpus_addr(voyager_phys_cpu_present_map)[0] |=
-            voyager_extended_cmos_read(VOYAGER_PROCESSOR_PRESENT_MASK +
-                                       2) << 16;
-        cpus_addr(voyager_phys_cpu_present_map)[0] |=
-            voyager_extended_cmos_read(VOYAGER_PROCESSOR_PRESENT_MASK +
-                                       3) << 24;
-        init_cpu_possible(&voyager_phys_cpu_present_map);
-        printk("VOYAGER SMP: voyager_phys_cpu_present_map = 0x%lx\n",
-               cpus_addr(voyager_phys_cpu_present_map)[0]);
-        /* Here we set up the VIC to enable SMP */
-        /* enable the CPIs by writing the base vector to their register */
-        outb(VIC_DEFAULT_CPI_BASE, VIC_CPI_BASE_REGISTER);
-        outb(1, VIC_REDIRECT_REGISTER_1);
-        /* set the claim registers for static routing --- Boot CPU gets
-         * all interrupts untill all other CPUs started */
-        outb(0xff, VIC_CLAIM_REGISTER_0);
-        outb(0xff, VIC_CLAIM_REGISTER_1);
-        /* Set the Primary and Secondary Microchannel vector
-         * bases to be the same as the ordinary interrupts
-         *
-         * FIXME: This would be more efficient using separate
-         * vectors. */
-        outb(FIRST_EXTERNAL_VECTOR, VIC_PRIMARY_MC_BASE);
-        outb(FIRST_EXTERNAL_VECTOR, VIC_SECONDARY_MC_BASE);
-
-        /* Finally tell the firmware that we're driving */
-        outb(inb(VOYAGER_SUS_IN_CONTROL_PORT) | VOYAGER_IN_CONTROL_FLAG,
-             VOYAGER_SUS_IN_CONTROL_PORT);
-
-        current_thread_info()->cpu = boot_cpu_id;
-        x86_write_percpu(cpu_number, boot_cpu_id);
-}
-
-/*
- *      The bootstrap kernel entry code has set these up. Save them
- *      for a given CPU, id is physical */
-void __init smp_store_cpu_info(int id)
-{
-        struct cpuinfo_x86 *c = &cpu_data(id);
-
-        *c = boot_cpu_data;
-        c->cpu_index = id;
-
-        identify_secondary_cpu(c);
-}
-
-/* Routine initially called when a non-boot CPU is brought online */
-static void __init start_secondary(void *unused)
-{
-        __u8 cpuid = hard_smp_processor_id();
-
-        cpu_init();
-
-        /* OK, we're in the routine */
-        ack_CPI(VIC_CPU_BOOT_CPI);
-
-        /* setup the 8259 master slave pair belonging to this CPU ---
-         * we won't actually receive any until the boot CPU
-         * relinquishes it's static routing mask */
-        vic_setup_pic();
-
-        qic_setup();
-
-        if (is_cpu_quad() && !is_cpu_vic_boot()) {
-                /* clear the boot CPI */
-                __u8 dummy;
-
-                dummy =
-                    voyager_quad_cpi_addr[cpuid]->qic_cpi[VIC_CPU_BOOT_CPI].cpi;
-                printk("read dummy %d\n", dummy);
-        }
-
-        /* lower the mask to receive CPIs */
-        vic_enable_cpi();
-
-        VDEBUG(("VOYAGER SMP: CPU%d, stack at about %p\n", cpuid, &cpuid));
-
-        notify_cpu_starting(cpuid);
-
-        /* enable interrupts */
-        local_irq_enable();
-
-        /* get our bogomips */
-        calibrate_delay();
-
-        /* save our processor parameters */
-        smp_store_cpu_info(cpuid);
-
-        /* if we're a quad, we may need to bootstrap other CPUs */
-        do_quad_bootstrap();
-
-        /* FIXME: this is rather a poor hack to prevent the CPU
-         * activating softirqs while it's supposed to be waiting for
-         * permission to proceed.  Without this, the new per CPU stuff
-         * in the softirqs will fail */
-        local_irq_disable();
-        cpu_set(cpuid, cpu_callin_map);
-
-        /* signal that we're done */
-        cpu_booted_map = 1;
-
-        while (!cpu_isset(cpuid, smp_commenced_mask))
-                rep_nop();
-        local_irq_enable();
-
-        local_flush_tlb();
-
-        cpu_set(cpuid, cpu_online_map);
-        wmb();
-        cpu_idle();
-}
-
-/* Routine to kick start the given CPU and wait for it to report ready
- * (or timeout in startup).  When this routine returns, the requested
- * CPU is either fully running and configured or known to be dead.
- *
- * We call this routine sequentially 1 CPU at a time, so no need for
- * locking */
-
-static void __init do_boot_cpu(__u8 cpu)
-{
-        struct task_struct *idle;
-        int timeout;
-        unsigned long flags;
-        int quad_boot = (1 << cpu) & voyager_quad_processors
-            & ~(voyager_extended_vic_processors
-                & voyager_allowed_boot_processors);
-
-        /* This is the format of the CPI IDT gate (in real mode) which
-         * we're hijacking to boot the CPU */
-        union IDTFormat {
-                struct seg {
-                        __u16 Offset;
-                        __u16 Segment;
-                } idt;
-                __u32 val;
-        } hijack_source;
-
-        __u32 *hijack_vector;
-        __u32 start_phys_address = setup_trampoline();
-
-        /* There's a clever trick to this: The linux trampoline is
-         * compiled to begin at absolute location zero, so make the
-         * address zero but have the data segment selector compensate
-         * for the actual address */
-        hijack_source.idt.Offset = start_phys_address & 0x000F;
-        hijack_source.idt.Segment = (start_phys_address >> 4) & 0xFFFF;
-
-        cpucount++;
-        alternatives_smp_switch(1);
-
-        idle = fork_idle(cpu);
-        if (IS_ERR(idle))
-                panic("failed fork for CPU%d", cpu);
-        idle->thread.ip = (unsigned long)start_secondary;
-        /* init_tasks (in sched.c) is indexed logically */
-        stack_start.sp = (void *)idle->thread.sp;
-
-        init_gdt(cpu);
-        per_cpu(current_task, cpu) = idle;
-        early_gdt_descr.address = (unsigned long)get_cpu_gdt_table(cpu);
-        irq_ctx_init(cpu);
-
-        /* Note: Don't modify initial ss override */
-        VDEBUG(("VOYAGER SMP: Booting CPU%d at 0x%lx[%x:%x], stack %p\n", cpu,
-                (unsigned long)hijack_source.val, hijack_source.idt.Segment,
-                hijack_source.idt.Offset, stack_start.sp));
-
-        /* init lowmem identity mapping */
-        clone_pgd_range(swapper_pg_dir, swapper_pg_dir + KERNEL_PGD_BOUNDARY,
-                        min_t(unsigned long, KERNEL_PGD_PTRS, KERNEL_PGD_BOUNDARY));
-        flush_tlb_all();
-
-        if (quad_boot) {
-                printk("CPU %d: non extended Quad boot\n", cpu);
-                hijack_vector =
-                    (__u32 *)
-                    phys_to_virt((VIC_CPU_BOOT_CPI + QIC_DEFAULT_CPI_BASE) * 4);
-                *hijack_vector = hijack_source.val;
-        } else {
-                printk("CPU%d: extended VIC boot\n", cpu);
-                hijack_vector =
-                    (__u32 *)
-                    phys_to_virt((VIC_CPU_BOOT_CPI + VIC_DEFAULT_CPI_BASE) * 4);
-                *hijack_vector = hijack_source.val;
-                /* VIC errata, may also receive interrupt at this address */
-                hijack_vector =
-                    (__u32 *)
-                    phys_to_virt((VIC_CPU_BOOT_ERRATA_CPI +
-                                  VIC_DEFAULT_CPI_BASE) * 4);
-                *hijack_vector = hijack_source.val;
-        }
-        /* All non-boot CPUs start with interrupts fully masked.  Need
-         * to lower the mask of the CPI we're about to send.  We do
-         * this in the VIC by masquerading as the processor we're
-         * about to boot and lowering its interrupt mask */
-        local_irq_save(flags);
-        if (quad_boot) {
-                send_one_QIC_CPI(cpu, VIC_CPU_BOOT_CPI);
-        } else {
-                outb(VIC_CPU_MASQUERADE_ENABLE | cpu, VIC_PROCESSOR_ID);
-                /* here we're altering registers belonging to `cpu' */
-
-                outb(VIC_BOOT_INTERRUPT_MASK, 0x21);
-                /* now go back to our original identity */
-                outb(boot_cpu_id, VIC_PROCESSOR_ID);
-
-                /* and boot the CPU */
-
-                send_CPI((1 << cpu), VIC_CPU_BOOT_CPI);
-        }
-        cpu_booted_map = 0;
-        local_irq_restore(flags);
-
-        /* now wait for it to become ready (or timeout) */
-        for (timeout = 0; timeout < 50000; timeout++) {
-                if (cpu_booted_map)
-                        break;
-                udelay(100);
-        }
-        /* reset the page table */
-        zap_low_mappings();
-
-        if (cpu_booted_map) {
-                VDEBUG(("CPU%d: Booted successfully, back in CPU %d\n",
-                        cpu, smp_processor_id()));
-
-                printk("CPU%d: ", cpu);
-                print_cpu_info(&cpu_data(cpu));
-                wmb();
-                cpu_set(cpu, cpu_callout_map);
-                cpu_set(cpu, cpu_present_map);
-        } else {
-                printk("CPU%d FAILED TO BOOT: ", cpu);
-                if (*
-                    ((volatile unsigned char *)phys_to_virt(start_phys_address))
-                    == 0xA5)
-                        printk("Stuck.\n");
-                else
-                        printk("Not responding.\n");
-
-                cpucount--;
-        }
-}
-
-void __init smp_boot_cpus(void)
-{
-        int i;
-
-        /* CAT BUS initialisation must be done after the memory */
-        /* FIXME: The L4 has a catbus too, it just needs to be
-         * accessed in a totally different way */
-        if (voyager_level == 5) {
-                voyager_cat_init();
-
-                /* now that the cat has probed the Voyager System Bus, sanity
-                 * check the cpu map */
-                if (((voyager_quad_processors | voyager_extended_vic_processors)
-                     & cpus_addr(voyager_phys_cpu_present_map)[0]) !=
-                    cpus_addr(voyager_phys_cpu_present_map)[0]) {
-                        /* should panic */
-                        printk("\n\n***WARNING*** "
-                               "Sanity check of CPU present map FAILED\n");
-                }
-        } else if (voyager_level == 4)
-                voyager_extended_vic_processors =
-                    cpus_addr(voyager_phys_cpu_present_map)[0];
-
-        /* this sets up the idle task to run on the current cpu */
-        voyager_extended_cpus = 1;
-        /* Remove the global_irq_holder setting, it triggers a BUG() on
-         * schedule at the moment */
-        //global_irq_holder = boot_cpu_id;
-
-        /* FIXME: Need to do something about this but currently only works
-         * on CPUs with a tsc which none of mine have.
-         smp_tune_scheduling();
-         */
-        smp_store_cpu_info(boot_cpu_id);
-        /* setup the jump vector */
-        initial_code = (unsigned long)initialize_secondary;
-        printk("CPU%d: ", boot_cpu_id);
-        print_cpu_info(&cpu_data(boot_cpu_id));
-
-        if (is_cpu_quad()) {
-                /* booting on a Quad CPU */
-                printk("VOYAGER SMP: Boot CPU is Quad\n");
-                qic_setup();
-                do_quad_bootstrap();
-        }
-
-        /* enable our own CPIs */
-        vic_enable_cpi();
-
-        cpu_set(boot_cpu_id, cpu_online_map);
-        cpu_set(boot_cpu_id, cpu_callout_map);
-
-        /* loop over all the extended VIC CPUs and boot them.  The
-         * Quad CPUs must be bootstrapped by their extended VIC cpu */
-        for (i = 0; i < nr_cpu_ids; i++) {
-                if (i == boot_cpu_id || !cpu_isset(i, voyager_phys_cpu_present_map))
-                        continue;
-                do_boot_cpu(i);
-                /* This udelay seems to be needed for the Quad boots
-                 * don't remove unless you know what you're doing */
-                udelay(1000);
-        }
-        /* we could compute the total bogomips here, but why bother?,
-         * Code added from smpboot.c */
-        {
-                unsigned long bogosum = 0;
-
-                for_each_online_cpu(i)
-                        bogosum += cpu_data(i).loops_per_jiffy;
-                printk(KERN_INFO "Total of %d processors activated "
-                       "(%lu.%02lu BogoMIPS).\n",
-                       cpucount + 1, bogosum / (500000 / HZ),
-                       (bogosum / (5000 / HZ)) % 100);
-        }
-        voyager_extended_cpus = hweight32(voyager_extended_vic_processors);
-        printk("VOYAGER: Extended (interrupt handling CPUs): "
-               "%d, non-extended: %d\n", voyager_extended_cpus,
-               num_booting_cpus() - voyager_extended_cpus);
-        /* that's it, switch to symmetric mode */
-        outb(0, VIC_PRIORITY_REGISTER);
-        outb(0, VIC_CLAIM_REGISTER_0);
-        outb(0, VIC_CLAIM_REGISTER_1);
-
-        VDEBUG(("VOYAGER SMP: Booted with %d CPUs\n", num_booting_cpus()));
-}
-
-/* Reload the secondary CPUs task structure (this function does not
- * return ) */
-static void __init initialize_secondary(void)
-{
-#if 0
-        // AC kernels only
-        set_current(hard_get_current());
-#endif
-
-        /*
-         * We don't actually need to load the full TSS,
-         * basically just the stack pointer and the eip.
-         */
-
-        asm volatile ("movl %0,%%esp\n\t"
-                      "jmp *%1"::"r" (current->thread.sp),
-                      "r"(current->thread.ip));
-}
-
-/* handle a Voyager SYS_INT -- If we don't, the base board will
- * panic the system.
- *
- * System interrupts occur because some problem was detected on the
- * various busses.  To find out what you have to probe all the
- * hardware via the CAT bus.  FIXME: At the moment we do nothing. */
-void smp_vic_sys_interrupt(struct pt_regs *regs)
-{
-        ack_CPI(VIC_SYS_INT);
-        printk("Voyager SYSTEM INTERRUPT\n");
-}
-
-/* Handle a voyager CMN_INT; These interrupts occur either because of
- * a system status change or because a single bit memory error
- * occurred.  FIXME: At the moment, ignore all this. */
-void smp_vic_cmn_interrupt(struct pt_regs *regs)
-{
-        static __u8 in_cmn_int = 0;
-        static DEFINE_SPINLOCK(cmn_int_lock);
-
-        /* common ints are broadcast, so make sure we only do this once */
-        _raw_spin_lock(&cmn_int_lock);
-        if (in_cmn_int)
-                goto unlock_end;
-
-        in_cmn_int++;
-        _raw_spin_unlock(&cmn_int_lock);
-
-        VDEBUG(("Voyager COMMON INTERRUPT\n"));
-
-        if (voyager_level == 5)
-                voyager_cat_do_common_interrupt();
-
-        _raw_spin_lock(&cmn_int_lock);
-        in_cmn_int = 0;
-      unlock_end:
-        _raw_spin_unlock(&cmn_int_lock);
-        ack_CPI(VIC_CMN_INT);
-}
-
-/*
- * Reschedule call back. Nothing to do, all the work is done
- * automatically when we return from the interrupt.  */
-static void smp_reschedule_interrupt(void)
-{
-        /* do nothing */
-}
-
-static struct mm_struct *flush_mm;
-static unsigned long flush_va;
-static DEFINE_SPINLOCK(tlbstate_lock);
-
-/*
- * We cannot call mmdrop() because we are in interrupt context,
- * instead update mm->cpu_vm_mask.
- *
- * We need to reload %cr3 since the page tables may be going
- * away from under us..
- */
-static inline void voyager_leave_mm(unsigned long cpu)
-{
-        if (per_cpu(cpu_tlbstate, cpu).state == TLBSTATE_OK)
-                BUG();
-        cpu_clear(cpu, per_cpu(cpu_tlbstate, cpu).active_mm->cpu_vm_mask);
-        load_cr3(swapper_pg_dir);
-}
-
-/*
- * Invalidate call-back
- */
-static void smp_invalidate_interrupt(void)
-{
-        __u8 cpu = smp_processor_id();
-
-        if (!test_bit(cpu, &smp_invalidate_needed))
-                return;
-        /* This will flood messages.  Don't uncomment unless you see
-         * Problems with cross cpu invalidation
-         VDEBUG(("VOYAGER SMP: CPU%d received INVALIDATE_CPI\n",
-         smp_processor_id()));
-         */
-
-        if (flush_mm == per_cpu(cpu_tlbstate, cpu).active_mm) {
-                if (per_cpu(cpu_tlbstate, cpu).state == TLBSTATE_OK) {
-                        if (flush_va == TLB_FLUSH_ALL)
-                                local_flush_tlb();
-                        else
-                                __flush_tlb_one(flush_va);
-                } else
-                        voyager_leave_mm(cpu);
-        }
-        smp_mb__before_clear_bit();
-        clear_bit(cpu, &smp_invalidate_needed);
-        smp_mb__after_clear_bit();
-}
-
-/* All the new flush operations for 2.4 */
-
-/* This routine is called with a physical cpu mask */
-static void
-voyager_flush_tlb_others(unsigned long cpumask, struct mm_struct *mm,
-                         unsigned long va)
-{
-        int stuck = 50000;
-
-        if (!cpumask)
-                BUG();
-        if ((cpumask & cpus_addr(cpu_online_map)[0]) != cpumask)
-                BUG();
-        if (cpumask & (1 << smp_processor_id()))
-                BUG();
-        if (!mm)
-                BUG();
-
-        spin_lock(&tlbstate_lock);
-
-        flush_mm = mm;
-        flush_va = va;
-        atomic_set_mask(cpumask, &smp_invalidate_needed);
-        /*
-         * We have to send the CPI only to
-         * CPUs affected.
-         */
-        send_CPI(cpumask, VIC_INVALIDATE_CPI);
-
-        while (smp_invalidate_needed) {
-                mb();
-                if (--stuck == 0) {
-                        printk("***WARNING*** Stuck doing invalidate CPI "
-                               "(CPU%d)\n", smp_processor_id());
-                        break;
-                }
-        }
-
-        /* Uncomment only to debug invalidation problems
-           VDEBUG(("VOYAGER SMP: Completed invalidate CPI (CPU%d)\n", cpu));
-         */
-
-        flush_mm = NULL;
-        flush_va = 0;
-        spin_unlock(&tlbstate_lock);
-}
-
-void flush_tlb_current_task(void)
-{
-        struct mm_struct *mm = current->mm;
-        unsigned long cpu_mask;
-
-        preempt_disable();
-
-        cpu_mask = cpus_addr(mm->cpu_vm_mask)[0] & ~(1 << smp_processor_id());
-        local_flush_tlb();
-        if (cpu_mask)
-                voyager_flush_tlb_others(cpu_mask, mm, TLB_FLUSH_ALL);
-
-        preempt_enable();
-}
-
-void flush_tlb_mm(struct mm_struct *mm)
-{
-        unsigned long cpu_mask;
-
-        preempt_disable();
-
-        cpu_mask = cpus_addr(mm->cpu_vm_mask)[0] & ~(1 << smp_processor_id());
-
-        if (current->active_mm == mm) {
-                if (current->mm)
-                        local_flush_tlb();
-                else
-                        voyager_leave_mm(smp_processor_id());
-        }
-        if (cpu_mask)
-                voyager_flush_tlb_others(cpu_mask, mm, TLB_FLUSH_ALL);
-
-        preempt_enable();
-}
-
-void flush_tlb_page(struct vm_area_struct *vma, unsigned long va)
-{
-        struct mm_struct *mm = vma->vm_mm;
-        unsigned long cpu_mask;
-
-        preempt_disable();
-
-        cpu_mask = cpus_addr(mm->cpu_vm_mask)[0] & ~(1 << smp_processor_id());
-        if (current->active_mm == mm) {
-                if (current->mm)
-                        __flush_tlb_one(va);
-                else
-                        voyager_leave_mm(smp_processor_id());
-        }
-
-        if (cpu_mask)
-                voyager_flush_tlb_others(cpu_mask, mm, va);
-
-        preempt_enable();
-}
-
-EXPORT_SYMBOL(flush_tlb_page);
-
-/* enable the requested IRQs */
-static void smp_enable_irq_interrupt(void)
-{
-        __u8 irq;
-        __u8 cpu = get_cpu();
-
-        VDEBUG(("VOYAGER SMP: CPU%d enabling irq mask 0x%x\n", cpu,
-                vic_irq_enable_mask[cpu]));
-
-        spin_lock(&vic_irq_lock);
-        for (irq = 0; irq < 16; irq++) {
-                if (vic_irq_enable_mask[cpu] & (1 << irq))
-                        enable_local_vic_irq(irq);
-        }
-        vic_irq_enable_mask[cpu] = 0;
-        spin_unlock(&vic_irq_lock);
-
-        put_cpu_no_resched();
-}
-
-/*
- *      CPU halt call-back
- */
-static void smp_stop_cpu_function(void *dummy)
-{
-        VDEBUG(("VOYAGER SMP: CPU%d is STOPPING\n", smp_processor_id()));
-        cpu_clear(smp_processor_id(), cpu_online_map);
-        local_irq_disable();
-        for (;;)
-                halt();
-}
-
-/* execute a thread on a new CPU.  The function to be called must be
- * previously set up.  This is used to schedule a function for
- * execution on all CPUs - set up the function then broadcast a
- * function_interrupt CPI to come here on each CPU */
-static void smp_call_function_interrupt(void)
-{
-        irq_enter();
-        generic_smp_call_function_interrupt();
-        __get_cpu_var(irq_stat).irq_call_count++;
-        irq_exit();
-}
-
-static void smp_call_function_single_interrupt(void)
-{
-        irq_enter();
-        generic_smp_call_function_single_interrupt();
-        __get_cpu_var(irq_stat).irq_call_count++;
-        irq_exit();
-}
-
-/* Sorry about the name.  In an APIC based system, the APICs
- * themselves are programmed to send a timer interrupt.  This is used
- * by linux to reschedule the processor.  Voyager doesn't have this,
- * so we use the system clock to interrupt one processor, which in
- * turn, broadcasts a timer CPI to all the others --- we receive that
- * CPI here.  We don't use this actually for counting so losing
- * ticks doesn't matter
- *
- * FIXME: For those CPUs which actually have a local APIC, we could
- * try to use it to trigger this interrupt instead of having to
- * broadcast the timer tick.  Unfortunately, all my pentium DYADs have
- * no local APIC, so I can't do this
- *
- * This function is currently a placeholder and is unused in the code */
-void smp_apic_timer_interrupt(struct pt_regs *regs)
-{
-        struct pt_regs *old_regs = set_irq_regs(regs);
-        wrapper_smp_local_timer_interrupt();
-        set_irq_regs(old_regs);
-}
-
-/* All of the QUAD interrupt GATES */
-void smp_qic_timer_interrupt(struct pt_regs *regs)
-{
-        struct pt_regs *old_regs = set_irq_regs(regs);
-        ack_QIC_CPI(QIC_TIMER_CPI);
-        wrapper_smp_local_timer_interrupt();
-        set_irq_regs(old_regs);
-}
-
-void smp_qic_invalidate_interrupt(struct pt_regs *regs)
-{
-        ack_QIC_CPI(QIC_INVALIDATE_CPI);
-        smp_invalidate_interrupt();
-}
-
-void smp_qic_reschedule_interrupt(struct pt_regs *regs)
-{
-        ack_QIC_CPI(QIC_RESCHEDULE_CPI);
-        smp_reschedule_interrupt();
-}
-
-void smp_qic_enable_irq_interrupt(struct pt_regs *regs)
-{
-        ack_QIC_CPI(QIC_ENABLE_IRQ_CPI);
-        smp_enable_irq_interrupt();
-}
-
-void smp_qic_call_function_interrupt(struct pt_regs *regs)
-{
-        ack_QIC_CPI(QIC_CALL_FUNCTION_CPI);
-        smp_call_function_interrupt();
-}
-
-void smp_qic_call_function_single_interrupt(struct pt_regs *regs)
-{
-        ack_QIC_CPI(QIC_CALL_FUNCTION_SINGLE_CPI);
-        smp_call_function_single_interrupt();
-}
-
-void smp_vic_cpi_interrupt(struct pt_regs *regs)
-{
-        struct pt_regs *old_regs = set_irq_regs(regs);
-        __u8 cpu = smp_processor_id();
-
-        if (is_cpu_quad())
-                ack_QIC_CPI(VIC_CPI_LEVEL0);
-        else
-                ack_VIC_CPI(VIC_CPI_LEVEL0);
-
-        if (test_and_clear_bit(VIC_TIMER_CPI, &vic_cpi_mailbox[cpu]))
-                wrapper_smp_local_timer_interrupt();
-        if (test_and_clear_bit(VIC_INVALIDATE_CPI, &vic_cpi_mailbox[cpu]))
-                smp_invalidate_interrupt();
-        if (test_and_clear_bit(VIC_RESCHEDULE_CPI, &vic_cpi_mailbox[cpu]))
-                smp_reschedule_interrupt();
-        if (test_and_clear_bit(VIC_ENABLE_IRQ_CPI, &vic_cpi_mailbox[cpu]))
-                smp_enable_irq_interrupt();
-        if (test_and_clear_bit(VIC_CALL_FUNCTION_CPI, &vic_cpi_mailbox[cpu]))
-                smp_call_function_interrupt();
-        if (test_and_clear_bit(VIC_CALL_FUNCTION_SINGLE_CPI, &vic_cpi_mailbox[cpu]))
-                smp_call_function_single_interrupt();
-        set_irq_regs(old_regs);
-}
-
-static void do_flush_tlb_all(void *info)
-{
-        unsigned long cpu = smp_processor_id();
-
-        __flush_tlb_all();
-        if (per_cpu(cpu_tlbstate, cpu).state == TLBSTATE_LAZY)
-                voyager_leave_mm(cpu);
-}
-
-/* flush the TLB of every active CPU in the system */
-void flush_tlb_all(void)
-{
-        on_each_cpu(do_flush_tlb_all, 0, 1);
-}
-
-/* send a reschedule CPI to one CPU by physical CPU number*/
-static void voyager_smp_send_reschedule(int cpu)
-{
-        send_one_CPI(cpu, VIC_RESCHEDULE_CPI);
-}
-
-int hard_smp_processor_id(void)
-{
-        __u8 i;
-        __u8 cpumask = inb(VIC_PROC_WHO_AM_I);
-        if ((cpumask & QUAD_IDENTIFIER) == QUAD_IDENTIFIER)
-                return cpumask & 0x1F;
-
-        for (i = 0; i < 8; i++) {
-                if (cpumask & (1 << i))
-                        return i;
-        }
-        printk("** WARNING ** Illegal cpuid returned by VIC: %d", cpumask);
-        return 0;
-}
-
-int safe_smp_processor_id(void)
-{
-        return hard_smp_processor_id();
-}
-
-/* broadcast a halt to all other CPUs */
-static void voyager_smp_send_stop(void)
-{
-        smp_call_function(smp_stop_cpu_function, NULL, 1);
-}
-
-/* this function is triggered in time.c when a clock tick fires
- * we need to re-broadcast the tick to all CPUs */
-void smp_vic_timer_interrupt(void)
-{
-        send_CPI_allbutself(VIC_TIMER_CPI);
-        smp_local_timer_interrupt();
-}
-
-/* local (per CPU) timer interrupt.  It does both profiling and
- * process statistics/rescheduling.
- *
- * We do profiling in every local tick, statistics/rescheduling
- * happen only every 'profiling multiplier' ticks. The default
- * multiplier is 1 and it can be changed by writing the new multiplier
- * value into /proc/profile.
- */
-void smp_local_timer_interrupt(void)
-{
-        int cpu = smp_processor_id();
-        long weight;
-
-        profile_tick(CPU_PROFILING);
-        if (--per_cpu(prof_counter, cpu) <= 0) {
-                /*
-                 * The multiplier may have changed since the last time we got
-                 * to this point as a result of the user writing to
-                 * /proc/profile. In this case we need to adjust the APIC
-                 * timer accordingly.
-                 *
-                 * Interrupts are already masked off at this point.
-                 */
-                per_cpu(prof_counter, cpu) = per_cpu(prof_multiplier, cpu);
-                if (per_cpu(prof_counter, cpu) !=
-                    per_cpu(prof_old_multiplier, cpu)) {
-                        /* FIXME: need to update the vic timer tick here */
-                        per_cpu(prof_old_multiplier, cpu) =
-                            per_cpu(prof_counter, cpu);
-                }
-
-                update_process_times(user_mode_vm(get_irq_regs()));
-        }
-
-        if (((1 << cpu) & voyager_extended_vic_processors) == 0)
-                /* only extended VIC processors participate in
-                 * interrupt distribution */
-                return;
-
-        /*
-         * We take the 'long' return path, and there every subsystem
-         * grabs the appropriate locks (kernel lock/ irq lock).
-         *
-         * we might want to decouple profiling from the 'long path',
-         * and do the profiling totally in assembly.
-         *
-         * Currently this isn't too much of an issue (performance wise),
-         * we can take more than 100K local irqs per second on a 100 MHz P5.
-         */
-
-        if ((++vic_tick[cpu] & 0x7) != 0)
-                return;
-        /* get here every 16 ticks (about every 1/6 of a second) */
-
-        /* Change our priority to give someone else a chance at getting
-         * the IRQ. The algorithm goes like this:
-         *
-         * In the VIC, the dynamically routed interrupt is always
-         * handled by the lowest priority eligible (i.e. receiving
-         * interrupts) CPU.  If >1 eligible CPUs are equal lowest, the
-         * lowest processor number gets it.
-         *
-         * The priority of a CPU is controlled by a special per-CPU
-         * VIC priority register which is 3 bits wide 0 being lowest
-         * and 7 highest priority..
-         *
-         * Therefore we subtract the average number of interrupts from
-         * the number we've fielded.  If this number is negative, we
-         * lower the activity count and if it is positive, we raise
-         * it.
-         *
-         * I'm afraid this still leads to odd looking interrupt counts:
-         * the totals are all roughly equal, but the individual ones
-         * look rather skewed.
-         *
-         * FIXME: This algorithm is total crap when mixed with SMP
-         * affinity code since we now try to even up the interrupt
-         * counts when an affinity binding is keeping them on a
-         * particular CPU*/
-        weight = (vic_intr_count[cpu] * voyager_extended_cpus
-                  - vic_intr_total) >> 4;
-        weight += 4;
-        if (weight > 7)
-                weight = 7;
-        if (weight < 0)
-                weight = 0;
-
-        outb((__u8) weight, VIC_PRIORITY_REGISTER);
-
-#ifdef VOYAGER_DEBUG
-        if ((vic_tick[cpu] & 0xFFF) == 0) {
-                /* print this message roughly every 25 secs */
-                printk("VOYAGER SMP: vic_tick[%d] = %lu, weight = %ld\n",
-                       cpu, vic_tick[cpu], weight);
-        }
-#endif
-}
-
-/* setup the profiling timer */
-int setup_profiling_timer(unsigned int multiplier)
-{
-        int i;
-
-        if ((!multiplier))
-                return -EINVAL;
-
-        /*
-         * Set the new multiplier for each CPU. CPUs don't start using the
-         * new values until the next timer interrupt in which they do process
-         * accounting.
-         */
-        for (i = 0; i < nr_cpu_ids; ++i)
-                per_cpu(prof_multiplier, i) = multiplier;
-
-        return 0;
-}
-
-/* This is a bit of a mess, but forced on us by the genirq changes
- * there's no genirq handler that really does what voyager wants
- * so hack it up with the simple IRQ handler */
-static void handle_vic_irq(unsigned int irq, struct irq_desc *desc)
-{
-        before_handle_vic_irq(irq);
-        handle_simple_irq(irq, desc);
-        after_handle_vic_irq(irq);
-}
-
-/*  The CPIs are handled in the per cpu 8259s, so they must be
- *  enabled to be received: FIX: enabling the CPIs in the early
- *  boot sequence interferes with bug checking; enable them later
- *  on in smp_init */
-#define VIC_SET_GATE(cpi, vector) \
-        set_intr_gate((cpi) + VIC_DEFAULT_CPI_BASE, (vector))
-#define QIC_SET_GATE(cpi, vector) \
-        set_intr_gate((cpi) + QIC_DEFAULT_CPI_BASE, (vector))
-
-void __init voyager_smp_intr_init(void)
-{
-        int i;
-
-        /* initialize the per cpu irq mask to all disabled */
-        for (i = 0; i < nr_cpu_ids; i++)
-                vic_irq_mask[i] = 0xFFFF;
-
-        VIC_SET_GATE(VIC_CPI_LEVEL0, vic_cpi_interrupt);
-
-        VIC_SET_GATE(VIC_SYS_INT, vic_sys_interrupt);
-        VIC_SET_GATE(VIC_CMN_INT, vic_cmn_interrupt);
-
-        QIC_SET_GATE(QIC_TIMER_CPI, qic_timer_interrupt);
-        QIC_SET_GATE(QIC_INVALIDATE_CPI, qic_invalidate_interrupt);
-        QIC_SET_GATE(QIC_RESCHEDULE_CPI, qic_reschedule_interrupt);
-        QIC_SET_GATE(QIC_ENABLE_IRQ_CPI, qic_enable_irq_interrupt);
-        QIC_SET_GATE(QIC_CALL_FUNCTION_CPI, qic_call_function_interrupt);
-
-        /* now put the VIC descriptor into the first 48 IRQs
-         *
-         * This is for later: first 16 correspond to PC IRQs; next 16
-         * are Primary MC IRQs and final 16 are Secondary MC IRQs */
-        for (i = 0; i < 48; i++)
-                set_irq_chip_and_handler(i, &vic_chip, handle_vic_irq);
-}
-
-/* send a CPI at level cpi to a set of cpus in cpuset (set 1 bit per
- * processor to receive CPI */
-static void send_CPI(__u32 cpuset, __u8 cpi)
-{
-        int cpu;
-        __u32 quad_cpuset = (cpuset & voyager_quad_processors);
-
-        if (cpi < VIC_START_FAKE_CPI) {
-                /* fake CPI are only used for booting, so send to the
-                 * extended quads as well---Quads must be VIC booted */
-                outb((__u8) (cpuset), VIC_CPI_Registers[cpi]);
-                return;
-        }
-        if (quad_cpuset)
-                send_QIC_CPI(quad_cpuset, cpi);
-        cpuset &= ~quad_cpuset;
-        cpuset &= 0xff;         /* only first 8 CPUs vaild for VIC CPI */
-        if (cpuset == 0)
-                return;
-        for_each_online_cpu(cpu) {
-                if (cpuset & (1 << cpu))
-                        set_bit(cpi, &vic_cpi_mailbox[cpu]);
-        }
-        if (cpuset)
-                outb((__u8) cpuset, VIC_CPI_Registers[VIC_CPI_LEVEL0]);
-}
-
-/* Acknowledge receipt of CPI in the QIC, clear in QIC hardware and
- * set the cache line to shared by reading it.
- *
- * DON'T make this inline otherwise the cache line read will be
- * optimised away
- * */
-static int ack_QIC_CPI(__u8 cpi)
-{
-        __u8 cpu = hard_smp_processor_id();
-
-        cpi &= 7;
-
-        outb(1 << cpi, QIC_INTERRUPT_CLEAR1);
-        return voyager_quad_cpi_addr[cpu]->qic_cpi[cpi].cpi;
-}
-
-static void ack_special_QIC_CPI(__u8 cpi)
-{
-        switch (cpi) {
-        case VIC_CMN_INT:
-                outb(QIC_CMN_INT, QIC_INTERRUPT_CLEAR0);
-                break;
-        case VIC_SYS_INT:
-                outb(QIC_SYS_INT, QIC_INTERRUPT_CLEAR0);
-                break;
-        }
-        /* also clear at the VIC, just in case (nop for non-extended proc) */
-        ack_VIC_CPI(cpi);
-}
-
-/* Acknowledge receipt of CPI in the VIC (essentially an EOI) */
-static void ack_VIC_CPI(__u8 cpi)
-{
-#ifdef VOYAGER_DEBUG
-        unsigned long flags;
-        __u16 isr;
-        __u8 cpu = smp_processor_id();
-
-        local_irq_save(flags);
-        isr = vic_read_isr();
-        if ((isr & (1 << (cpi & 7))) == 0) {
-                printk("VOYAGER SMP: CPU%d lost CPI%d\n", cpu, cpi);
-        }
-#endif
-        /* send specific EOI; the two system interrupts have
-         * bit 4 set for a separate vector but behave as the
-         * corresponding 3 bit intr */
-        outb_p(0x60 | (cpi & 7), 0x20);
-
-#ifdef VOYAGER_DEBUG
-        if ((vic_read_isr() & (1 << (cpi & 7))) != 0) {
-                printk("VOYAGER SMP: CPU%d still asserting CPI%d\n", cpu, cpi);
-        }
-        local_irq_restore(flags);
-#endif
-}
-
-/* cribbed with thanks from irq.c */
-#define __byte(x,y)     (((unsigned char *)&(y))[x])
-#define cached_21(cpu)  (__byte(0,vic_irq_mask[cpu]))
-#define cached_A1(cpu)  (__byte(1,vic_irq_mask[cpu]))
-
-static unsigned int startup_vic_irq(unsigned int irq)
-{
-        unmask_vic_irq(irq);
-
-        return 0;
-}
-
-/* The enable and disable routines.  This is where we run into
- * conflicting architectural philosophy.  Fundamentally, the voyager
- * architecture does not expect to have to disable interrupts globally
- * (the IRQ controllers belong to each CPU).  The processor masquerade
- * which is used to start the system shouldn't be used in a running OS
- * since it will cause great confusion if two separate CPUs drive to
- * the same IRQ controller (I know, I've tried it).
- *
- * The solution is a variant on the NCR lazy SPL design:
- *
- * 1) To disable an interrupt, do nothing (other than set the
- *    IRQ_DISABLED flag).  This dares the interrupt actually to arrive.
- *
- * 2) If the interrupt dares to come in, raise the local mask against
- *    it (this will result in all the CPU masks being raised
- *    eventually).
- *
- * 3) To enable the interrupt, lower the mask on the local CPU and
- *    broadcast an Interrupt enable CPI which causes all other CPUs to
- *    adjust their masks accordingly.  */
-
-static void unmask_vic_irq(unsigned int irq)
-{
-        /* linux doesn't to processor-irq affinity, so enable on
-         * all CPUs we know about */
-        int cpu = smp_processor_id(), real_cpu;
-        __u16 mask = (1 << irq);
-        __u32 processorList = 0;
-        unsigned long flags;
-
-        VDEBUG(("VOYAGER: unmask_vic_irq(%d) CPU%d affinity 0x%lx\n",
-                irq, cpu, cpu_irq_affinity[cpu]));
-        spin_lock_irqsave(&vic_irq_lock, flags);
-        for_each_online_cpu(real_cpu) {
-                if (!(voyager_extended_vic_processors & (1 << real_cpu)))
-                        continue;
-                if (!(cpu_irq_affinity[real_cpu] & mask)) {
-                        /* irq has no affinity for this CPU, ignore */
-                        continue;
-                }
-                if (real_cpu == cpu) {
-                        enable_local_vic_irq(irq);
-                } else if (vic_irq_mask[real_cpu] & mask) {
-                        vic_irq_enable_mask[real_cpu] |= mask;
-                        processorList |= (1 << real_cpu);
-                }
-        }
-        spin_unlock_irqrestore(&vic_irq_lock, flags);
-        if (processorList)
-                send_CPI(processorList, VIC_ENABLE_IRQ_CPI);
-}
-
-static void mask_vic_irq(unsigned int irq)
-{
-        /* lazy disable, do nothing */
-}
-
-static void enable_local_vic_irq(unsigned int irq)
-{
-        __u8 cpu = smp_processor_id();
-        __u16 mask = ~(1 << irq);
-        __u16 old_mask = vic_irq_mask[cpu];
-
-        vic_irq_mask[cpu] &= mask;
-        if (vic_irq_mask[cpu] == old_mask)
-                return;
-
-        VDEBUG(("VOYAGER DEBUG: Enabling irq %d in hardware on CPU %d\n",
-                irq, cpu));
-
-        if (irq & 8) {
-                outb_p(cached_A1(cpu), 0xA1);
-                (void)inb_p(0xA1);
-        } else {
-                outb_p(cached_21(cpu), 0x21);
-                (void)inb_p(0x21);
-        }
-}
-
-static void disable_local_vic_irq(unsigned int irq)
-{
-        __u8 cpu = smp_processor_id();
-        __u16 mask = (1 << irq);
-        __u16 old_mask = vic_irq_mask[cpu];
-
-        if (irq == 7)
-                return;
-
-        vic_irq_mask[cpu] |= mask;
-        if (old_mask == vic_irq_mask[cpu])
-                return;
-
-        VDEBUG(("VOYAGER DEBUG: Disabling irq %d in hardware on CPU %d\n",
-                irq, cpu));
-
-        if (irq & 8) {
-                outb_p(cached_A1(cpu), 0xA1);
-                (void)inb_p(0xA1);
-        } else {
-                outb_p(cached_21(cpu), 0x21);
-                (void)inb_p(0x21);
-        }
-}
-
-/* The VIC is level triggered, so the ack can only be issued after the
- * interrupt completes.  However, we do Voyager lazy interrupt
- * handling here: It is an extremely expensive operation to mask an
- * interrupt in the vic, so we merely set a flag (IRQ_DISABLED).  If
- * this interrupt actually comes in, then we mask and ack here to push
- * the interrupt off to another CPU */
-static void before_handle_vic_irq(unsigned int irq)
-{
-        irq_desc_t *desc = irq_to_desc(irq);
-        __u8 cpu = smp_processor_id();
-
-        _raw_spin_lock(&vic_irq_lock);
-        vic_intr_total++;
-        vic_intr_count[cpu]++;
-
-        if (!(cpu_irq_affinity[cpu] & (1 << irq))) {
-                /* The irq is not in our affinity mask, push it off
-                 * onto another CPU */
-                VDEBUG(("VOYAGER DEBUG: affinity triggered disable of irq %d "
-                        "on cpu %d\n", irq, cpu));
-                disable_local_vic_irq(irq);
-                /* set IRQ_INPROGRESS to prevent the handler in irq.c from
-                 * actually calling the interrupt routine */
-                desc->status |= IRQ_REPLAY | IRQ_INPROGRESS;
-        } else if (desc->status & IRQ_DISABLED) {
-                /* Damn, the interrupt actually arrived, do the lazy
-                 * disable thing. The interrupt routine in irq.c will
-                 * not handle a IRQ_DISABLED interrupt, so nothing more
-                 * need be done here */
-                VDEBUG(("VOYAGER DEBUG: lazy disable of irq %d on CPU %d\n",
-                        irq, cpu));
-                disable_local_vic_irq(irq);
-                desc->status |= IRQ_REPLAY;
-        } else {
-                desc->status &= ~IRQ_REPLAY;
-        }
-
-        _raw_spin_unlock(&vic_irq_lock);
-}
-
-/* Finish the VIC interrupt: basically mask */
-static void after_handle_vic_irq(unsigned int irq)
-{
-        irq_desc_t *desc = irq_to_desc(irq);
-
-        _raw_spin_lock(&vic_irq_lock);
-        {
-                unsigned int status = desc->status & ~IRQ_INPROGRESS;
-#ifdef VOYAGER_DEBUG
-                __u16 isr;
-#endif
-
-                desc->status = status;
-                if ((status & IRQ_DISABLED))
-                        disable_local_vic_irq(irq);
-#ifdef VOYAGER_DEBUG
-                /* DEBUG: before we ack, check what's in progress */
-                isr = vic_read_isr();
-                if ((isr & (1 << irq) && !(status & IRQ_REPLAY)) == 0) {
-                        int i;
-                        __u8 cpu = smp_processor_id();
-                        __u8 real_cpu;
-                        int mask;       /* Um... initialize me??? --RR */
-
-                        printk("VOYAGER SMP: CPU%d lost interrupt %d\n",
-                               cpu, irq);
-                        for_each_possible_cpu(real_cpu, mask) {
-
-                                outb(VIC_CPU_MASQUERADE_ENABLE | real_cpu,
-                                     VIC_PROCESSOR_ID);
-                                isr = vic_read_isr();
-                                if (isr & (1 << irq)) {
-                                        printk
-                                            ("VOYAGER SMP: CPU%d ack irq %d\n",
-                                             real_cpu, irq);
-                                        ack_vic_irq(irq);
-                                }
-                                outb(cpu, VIC_PROCESSOR_ID);
-                        }
-                }
-#endif /* VOYAGER_DEBUG */
-                /* as soon as we ack, the interrupt is eligible for
-                 * receipt by another CPU so everything must be in
-                 * order here  */
-                ack_vic_irq(irq);
-                if (status & IRQ_REPLAY) {
-                        /* replay is set if we disable the interrupt
-                         * in the before_handle_vic_irq() routine, so
-                         * clear the in progress bit here to allow the
-                         * next CPU to handle this correctly */
-                        desc->status &= ~(IRQ_REPLAY | IRQ_INPROGRESS);
-                }
-#ifdef VOYAGER_DEBUG
-                isr = vic_read_isr();
-                if ((isr & (1 << irq)) != 0)
-                        printk("VOYAGER SMP: after_handle_vic_irq() after "
-                               "ack irq=%d, isr=0x%x\n", irq, isr);
-#endif /* VOYAGER_DEBUG */
-        }
-        _raw_spin_unlock(&vic_irq_lock);
-
-        /* All code after this point is out of the main path - the IRQ
-         * may be intercepted by another CPU if reasserted */
-}
-
-/* Linux processor - interrupt affinity manipulations.
- *
- * For each processor, we maintain a 32 bit irq affinity mask.
- * Initially it is set to all 1's so every processor accepts every
- * interrupt.  In this call, we change the processor's affinity mask:
- *
- * Change from enable to disable:
- *
- * If the interrupt ever comes in to the processor, we will disable it
- * and ack it to push it off to another CPU, so just accept the mask here.
- *
- * Change from disable to enable:
- *
- * change the mask and then do an interrupt enable CPI to re-enable on
- * the selected processors */
-
-void set_vic_irq_affinity(unsigned int irq, const struct cpumask *mask)
-{
-        /* Only extended processors handle interrupts */
-        unsigned long real_mask;
-        unsigned long irq_mask = 1 << irq;
-        int cpu;
-
-        real_mask = cpus_addr(*mask)[0] & voyager_extended_vic_processors;
-
-        if (cpus_addr(*mask)[0] == 0)
-                /* can't have no CPUs to accept the interrupt -- extremely
-                 * bad things will happen */
-                return;
-
-        if (irq == 0)
-                /* can't change the affinity of the timer IRQ.  This
-                 * is due to the constraint in the voyager
-                 * architecture that the CPI also comes in on and IRQ
-                 * line and we have chosen IRQ0 for this.  If you
-                 * raise the mask on this interrupt, the processor
-                 * will no-longer be able to accept VIC CPIs */
-                return;
-
-        if (irq >= 32)
-                /* You can only have 32 interrupts in a voyager system
-                 * (and 32 only if you have a secondary microchannel
-                 * bus) */
-                return;
-
-        for_each_online_cpu(cpu) {
-                unsigned long cpu_mask = 1 << cpu;
-
-                if (cpu_mask & real_mask) {
-                        /* enable the interrupt for this cpu */
-                        cpu_irq_affinity[cpu] |= irq_mask;
-                } else {
-                        /* disable the interrupt for this cpu */
-                        cpu_irq_affinity[cpu] &= ~irq_mask;
-                }
-        }
-        /* this is magic, we now have the correct affinity maps, so
-         * enable the interrupt.  This will send an enable CPI to
-         * those CPUs who need to enable it in their local masks,
-         * causing them to correct for the new affinity . If the
-         * interrupt is currently globally disabled, it will simply be
-         * disabled again as it comes in (voyager lazy disable).  If
-         * the affinity map is tightened to disable the interrupt on a
-         * cpu, it will be pushed off when it comes in */
-        unmask_vic_irq(irq);
-}
-
-static void ack_vic_irq(unsigned int irq)
-{
-        if (irq & 8) {
-                outb(0x62, 0x20);       /* Specific EOI to cascade */
-                outb(0x60 | (irq & 7), 0xA0);
-        } else {
-                outb(0x60 | (irq & 7), 0x20);
-        }
-}
-
-/* enable the CPIs.  In the VIC, the CPIs are delivered by the 8259
- * but are not vectored by it.  This means that the 8259 mask must be
- * lowered to receive them */
-static __init void vic_enable_cpi(void)
-{
-        __u8 cpu = smp_processor_id();
-
-        /* just take a copy of the current mask (nop for boot cpu) */
-        vic_irq_mask[cpu] = vic_irq_mask[boot_cpu_id];
-
-        enable_local_vic_irq(VIC_CPI_LEVEL0);
-        enable_local_vic_irq(VIC_CPI_LEVEL1);
-        /* for sys int and cmn int */
-        enable_local_vic_irq(7);
-
-        if (is_cpu_quad()) {
-                outb(QIC_DEFAULT_MASK0, QIC_MASK_REGISTER0);
-                outb(QIC_CPI_ENABLE, QIC_MASK_REGISTER1);
-                VDEBUG(("VOYAGER SMP: QIC ENABLE CPI: CPU%d: MASK 0x%x\n",
-                        cpu, QIC_CPI_ENABLE));
-        }
-
-        VDEBUG(("VOYAGER SMP: ENABLE CPI: CPU%d: MASK 0x%x\n",
-                cpu, vic_irq_mask[cpu]));
-}
-
-void voyager_smp_dump()
-{
-        int old_cpu = smp_processor_id(), cpu;
-
-        /* dump the interrupt masks of each processor */
-        for_each_online_cpu(cpu) {
-                __u16 imr, isr, irr;
-                unsigned long flags;
-
-                local_irq_save(flags);
-                outb(VIC_CPU_MASQUERADE_ENABLE | cpu, VIC_PROCESSOR_ID);
-                imr = (inb(0xa1) << 8) | inb(0x21);
-                outb(0x0a, 0xa0);
-                irr = inb(0xa0) << 8;
-                outb(0x0a, 0x20);
-                irr |= inb(0x20);
-                outb(0x0b, 0xa0);
-                isr = inb(0xa0) << 8;
-                outb(0x0b, 0x20);
-                isr |= inb(0x20);
-                outb(old_cpu, VIC_PROCESSOR_ID);
-                local_irq_restore(flags);
-                printk("\tCPU%d: mask=0x%x, IMR=0x%x, IRR=0x%x, ISR=0x%x\n",
-                       cpu, vic_irq_mask[cpu], imr, irr, isr);
-#if 0
-                /* These lines are put in to try to unstick an un ack'd irq */
-                if (isr != 0) {
-                        int irq;
-                        for (irq = 0; irq < 16; irq++) {
-                                if (isr & (1 << irq)) {
-                                        printk("\tCPU%d: ack irq %d\n",
-                                               cpu, irq);
-                                        local_irq_save(flags);
-                                        outb(VIC_CPU_MASQUERADE_ENABLE | cpu,
-                                             VIC_PROCESSOR_ID);
-                                        ack_vic_irq(irq);
-                                        outb(old_cpu, VIC_PROCESSOR_ID);
-                                        local_irq_restore(flags);
-                                }
-                        }
-                }
-#endif
-        }
-}
-
-void smp_voyager_power_off(void *dummy)
-{
-        if (smp_processor_id() == boot_cpu_id)
-                voyager_power_off();
-        else
-                smp_stop_cpu_function(NULL);
-}
-
-static void __init voyager_smp_prepare_cpus(unsigned int max_cpus)
-{
-        /* FIXME: ignore max_cpus for now */
-        smp_boot_cpus();
-}
-
-static void __cpuinit voyager_smp_prepare_boot_cpu(void)
-{
-        init_gdt(smp_processor_id());
-        switch_to_new_gdt();
-
-        cpu_online_map = cpumask_of_cpu(smp_processor_id());
-        cpu_callout_map = cpumask_of_cpu(smp_processor_id());
-        cpu_callin_map = CPU_MASK_NONE;
-        cpu_present_map = cpumask_of_cpu(smp_processor_id());
-
-}
-
-static int __cpuinit voyager_cpu_up(unsigned int cpu)
-{
-        /* This only works at boot for x86.  See "rewrite" above. */
-        if (cpu_isset(cpu, smp_commenced_mask))
-                return -ENOSYS;
-
-        /* In case one didn't come up */
-        if (!cpu_isset(cpu, cpu_callin_map))
-                return -EIO;
-        /* Unleash the CPU! */
-        cpu_set(cpu, smp_commenced_mask);
-        while (!cpu_online(cpu))
-                mb();
-        return 0;
-}
-
-static void __init voyager_smp_cpus_done(unsigned int max_cpus)
-{
-        zap_low_mappings();
-}
-
-void __init smp_setup_processor_id(void)
-{
-        current_thread_info()->cpu = hard_smp_processor_id();
-        x86_write_percpu(cpu_number, hard_smp_processor_id());
-}
-
-static void voyager_send_call_func(const struct cpumask *callmask)
-{
-        __u32 mask = cpus_addr(*callmask)[0] & ~(1 << smp_processor_id());
-        send_CPI(mask, VIC_CALL_FUNCTION_CPI);
-}
-
-static void voyager_send_call_func_single(int cpu)
-{
-        send_CPI(1 << cpu, VIC_CALL_FUNCTION_SINGLE_CPI);
-}
-
-struct smp_ops smp_ops = {
-        .smp_prepare_boot_cpu = voyager_smp_prepare_boot_cpu,
-        .smp_prepare_cpus = voyager_smp_prepare_cpus,
-        .cpu_up = voyager_cpu_up,
-        .smp_cpus_done = voyager_smp_cpus_done,
-
-        .smp_send_stop = voyager_smp_send_stop,
-        .smp_send_reschedule = voyager_smp_send_reschedule,
-
-        .send_call_func_ipi = voyager_send_call_func,
-        .send_call_func_single_ipi = voyager_send_call_func_single,
-};
diff --git a/arch/x86/mach-voyager/voyager_thread.c b/arch/x86/mach-voyager/voyager_thread.c
deleted file mode 100644
index 15464a20fb38..000000000000
--- a/arch/x86/mach-voyager/voyager_thread.c
+++ /dev/null
@@ -1,128 +0,0 @@
-/* -*- mode: c; c-basic-offset: 8 -*- */
-
-/* Copyright (C) 2001
- *
- * Author: J.E.J.Bottomley@HansenPartnership.com
- *
- * This module provides the machine status monitor thread for the
- * voyager architecture.  This allows us to monitor the machine
- * environment (temp, voltage, fan function) and the front panel and
- * internal UPS.  If a fault is detected, this thread takes corrective
- * action (usually just informing init)
- * */
-
-#include <linux/module.h>
-#include <linux/mm.h>
-#include <linux/kernel_stat.h>
-#include <linux/delay.h>
-#include <linux/mc146818rtc.h>
-#include <linux/init.h>
-#include <linux/bootmem.h>
-#include <linux/kmod.h>
-#include <linux/completion.h>
-#include <linux/sched.h>
-#include <linux/kthread.h>
-#include <asm/desc.h>
-#include <asm/voyager.h>
-#include <asm/vic.h>
-#include <asm/mtrr.h>
-#include <asm/msr.h>
-
-struct task_struct *voyager_thread;
-static __u8 set_timeout;
-
-static int execute(const char *string)
-{
-        int ret;
-
-        char *envp[] = {
-                "HOME=/",
-                "TERM=linux",
-                "PATH=/sbin:/usr/sbin:/bin:/usr/bin",
-                NULL,
-        };
-        char *argv[] = {
-                "/bin/bash",
-                "-c",
-                (char *)string,
-                NULL,
-        };
-
-        if ((ret =
-             call_usermodehelper(argv[0], argv, envp, UMH_WAIT_PROC)) != 0) {
-                printk(KERN_ERR "Voyager failed to run \"%s\": %i\n", string,
-                       ret);
-        }
-        return ret;
-}
-
-static void check_from_kernel(void)
-{
-        if (voyager_status.switch_off) {
-
-                /* FIXME: This should be configurable via proc */
-                execute("umask 600; echo 0 > /etc/initrunlvl; kill -HUP 1");
-        } else if (voyager_status.power_fail) {
-                VDEBUG(("Voyager daemon detected AC power failure\n"));
-
-                /* FIXME: This should be configureable via proc */
-                execute("umask 600; echo F > /etc/powerstatus; kill -PWR 1");
-                set_timeout = 1;
-        }
-}
-
-static void check_continuing_condition(void)
-{
-        if (voyager_status.power_fail) {
-                __u8 data;
-                voyager_cat_psi(VOYAGER_PSI_SUBREAD,
-                                VOYAGER_PSI_AC_FAIL_REG, &data);
-                if ((data & 0x1f) == 0) {
-                        /* all power restored */
-                        printk(KERN_NOTICE
-                               "VOYAGER AC power restored, cancelling shutdown\n");
-                        /* FIXME: should be user configureable */
-                        execute
-                            ("umask 600; echo O > /etc/powerstatus; kill -PWR 1");
-                        set_timeout = 0;
-                }
-        }
-}
-
-static int thread(void *unused)
-{
-        printk(KERN_NOTICE "Voyager starting monitor thread\n");
-
-        for (;;) {
-                set_current_state(TASK_INTERRUPTIBLE);
-                schedule_timeout(set_timeout ? HZ : MAX_SCHEDULE_TIMEOUT);
-
-                VDEBUG(("Voyager Daemon awoken\n"));
-                if (voyager_status.request_from_kernel == 0) {
-                        /* probably awoken from timeout */
-                        check_continuing_condition();
-                } else {
-                        check_from_kernel();
-                        voyager_status.request_from_kernel = 0;
-                }
-        }
-}
-
-static int __init voyager_thread_start(void)
-{
-        voyager_thread = kthread_run(thread, NULL, "kvoyagerd");
-        if (IS_ERR(voyager_thread)) {
-                printk(KERN_ERR
-                       "Voyager: Failed to create system monitor thread.\n");
-                return PTR_ERR(voyager_thread);
-        }
-        return 0;
-}
-
-static void __exit voyager_thread_stop(void)
-{
-        kthread_stop(voyager_thread);
-}
-
-module_init(voyager_thread_start);
-module_exit(voyager_thread_stop);
diff --git a/arch/x86/math-emu/get_address.c b/arch/x86/math-emu/get_address.c
index 420b3b6e3915..6ef5e99380f9 100644
--- a/arch/x86/math-emu/get_address.c
+++ b/arch/x86/math-emu/get_address.c
@@ -150,11 +150,9 @@ static long pm_address(u_char FPU_modrm, u_char segment,
 #endif /* PARANOID */
 
         switch (segment) {
-                /* gs isn't used by the kernel, so it still has its
-                   user-space value. */
         case PREFIX_GS_ - 1:
-                /* N.B. - movl %seg, mem is a 2 byte write regardless of prefix */
-                savesegment(gs, addr->selector);
+                /* user gs handling can be lazy, use special accessors */
+                addr->selector = get_user_gs(FPU_info->regs);
                 break;
         default:
                 addr->selector = PM_REG_(segment);
diff --git a/arch/x86/mm/Makefile b/arch/x86/mm/Makefile
index d8cc96a2738f..08537747cb58 100644
--- a/arch/x86/mm/Makefile
+++ b/arch/x86/mm/Makefile
@@ -1,6 +1,8 @@
-obj-y   :=  init_$(BITS).o fault.o ioremap.o extable.o pageattr.o mmap.o \
+obj-y   :=  init.o init_$(BITS).o fault.o ioremap.o extable.o pageattr.o mmap.o \
             pat.o pgtable.o gup.o
 
+obj-$(CONFIG_SMP)               += tlb.o
+
 obj-$(CONFIG_X86_32)            += pgtable_32.o iomap_32.o
 
 obj-$(CONFIG_HUGETLB_PAGE)      += hugetlbpage.o
diff --git a/arch/x86/mm/extable.c b/arch/x86/mm/extable.c
index 7e8db53528a7..61b41ca3b5a2 100644
--- a/arch/x86/mm/extable.c
+++ b/arch/x86/mm/extable.c
@@ -23,6 +23,12 @@ int fixup_exception(struct pt_regs *regs)
 
         fixup = search_exception_tables(regs->ip);
         if (fixup) {
+                /* If fixup is less than 16, it means uaccess error */
+                if (fixup->fixup < 16) {
+                        current_thread_info()->uaccess_err = -EFAULT;
+                        regs->ip += fixup->fixup;
+                        return 1;
+                }
                 regs->ip = fixup->fixup;
                 return 1;
         }
diff --git a/arch/x86/mm/fault.c b/arch/x86/mm/fault.c
index c76ef1d701c9..a03b7279efa0 100644
--- a/arch/x86/mm/fault.c
+++ b/arch/x86/mm/fault.c
@@ -1,73 +1,79 @@
 /*
  *  Copyright (C) 1995  Linus Torvalds
- *  Copyright (C) 2001,2002 Andi Kleen, SuSE Labs.
+ *  Copyright (C) 2001, 2002 Andi Kleen, SuSE Labs.
+ *  Copyright (C) 2008-2009, Red Hat Inc., Ingo Molnar
  */
-
-#include <linux/signal.h>
-#include <linux/sched.h>
-#include <linux/kernel.h>
-#include <linux/errno.h>
-#include <linux/string.h>
-#include <linux/types.h>
-#include <linux/ptrace.h>
-#include <linux/mmiotrace.h>
-#include <linux/mman.h>
-#include <linux/mm.h>
-#include <linux/smp.h>
 #include <linux/interrupt.h>
-#include <linux/init.h>
-#include <linux/tty.h>
-#include <linux/vt_kern.h>              /* For unblank_screen() */
+#include <linux/mmiotrace.h>
+#include <linux/bootmem.h>
 #include <linux/compiler.h>
 #include <linux/highmem.h>
-#include <linux/bootmem.h>              /* for max_low_pfn */
-#include <linux/vmalloc.h>
-#include <linux/module.h>
 #include <linux/kprobes.h>
 #include <linux/uaccess.h>
+#include <linux/vmalloc.h>
+#include <linux/vt_kern.h>
+#include <linux/signal.h>
+#include <linux/kernel.h>
+#include <linux/ptrace.h>
+#include <linux/string.h>
+#include <linux/module.h>
 #include <linux/kdebug.h>
+#include <linux/errno.h>
+#include <linux/magic.h>
+#include <linux/sched.h>
+#include <linux/types.h>
+#include <linux/init.h>
+#include <linux/mman.h>
+#include <linux/tty.h>
+#include <linux/smp.h>
+#include <linux/mm.h>
+
+#include <asm-generic/sections.h>
 
-#include <asm/system.h>
-#include <asm/desc.h>
-#include <asm/segment.h>
-#include <asm/pgalloc.h>
-#include <asm/smp.h>
 #include <asm/tlbflush.h>
+#include <asm/pgalloc.h>
+#include <asm/segment.h>
+#include <asm/system.h>
 #include <asm/proto.h>
-#include <asm-generic/sections.h>
 #include <asm/traps.h>
+#include <asm/desc.h>
 
 /*
- * Page fault error code bits
- *      bit 0 == 0 means no page found, 1 means protection fault
- *      bit 1 == 0 means read, 1 means write
- *      bit 2 == 0 means kernel, 1 means user-mode
- *      bit 3 == 1 means use of reserved bit detected
- *      bit 4 == 1 means fault was an instruction fetch
+ * Page fault error code bits:
+ *
+ *   bit 0 ==    0: no page found       1: protection fault
+ *   bit 1 ==    0: read access         1: write access
+ *   bit 2 ==    0: kernel-mode access  1: user-mode access
+ *   bit 3 ==                           1: use of reserved bit detected
+ *   bit 4 ==                           1: fault was an instruction fetch
  */
-#define PF_PROT         (1<<0)
-#define PF_WRITE        (1<<1)
-#define PF_USER         (1<<2)
-#define PF_RSVD         (1<<3)
-#define PF_INSTR        (1<<4)
+enum x86_pf_error_code {
+
+        PF_PROT         =               1 << 0,
+        PF_WRITE        =               1 << 1,
+        PF_USER         =               1 << 2,
+        PF_RSVD         =               1 << 3,
+        PF_INSTR        =               1 << 4,
+};
 
+/*
+ * Returns 0 if mmiotrace is disabled, or if the fault is not
+ * handled by mmiotrace:
+ */
 static inline int kmmio_fault(struct pt_regs *regs, unsigned long addr)
 {
-#ifdef CONFIG_MMIOTRACE
         if (unlikely(is_kmmio_active()))
                 if (kmmio_handler(regs, addr) == 1)
                         return -1;
-#endif
         return 0;
 }
 
 static inline int notify_page_fault(struct pt_regs *regs)
 {
-#ifdef CONFIG_KPROBES
         int ret = 0;
 
         /* kprobe_running() needs smp_processor_id() */
-        if (!user_mode_vm(regs)) {
+        if (kprobes_built_in() && !user_mode_vm(regs)) {
                 preempt_disable();
                 if (kprobe_running() && kprobe_fault_handler(regs, 14))
                         ret = 1;
@@ -75,29 +81,76 @@ static inline int notify_page_fault(struct pt_regs *regs)
         }
 
         return ret;
-#else
-        return 0;
-#endif
 }
 
 /*
- * X86_32
- * Sometimes AMD Athlon/Opteron CPUs report invalid exceptions on prefetch.
- * Check that here and ignore it.
+ * Prefetch quirks:
+ *
+ * 32-bit mode:
+ *
+ *   Sometimes AMD Athlon/Opteron CPUs report invalid exceptions on prefetch.
+ *   Check that here and ignore it.
+ *
+ * 64-bit mode:
  *
- * X86_64
- * Sometimes the CPU reports invalid exceptions on prefetch.
- * Check that here and ignore it.
+ *   Sometimes the CPU reports invalid exceptions on prefetch.
+ *   Check that here and ignore it.
  *
- * Opcode checker based on code by Richard Brunner
+ * Opcode checker based on code by Richard Brunner.
  */
-static int is_prefetch(struct pt_regs *regs, unsigned long addr,
-                       unsigned long error_code)
+static inline int
+check_prefetch_opcode(struct pt_regs *regs, unsigned char *instr,
+                      unsigned char opcode, int *prefetch)
 {
+        unsigned char instr_hi = opcode & 0xf0;
+        unsigned char instr_lo = opcode & 0x0f;
+
+        switch (instr_hi) {
+        case 0x20:
+        case 0x30:
+                /*
+                 * Values 0x26,0x2E,0x36,0x3E are valid x86 prefixes.
+                 * In X86_64 long mode, the CPU will signal invalid
+                 * opcode if some of these prefixes are present so
+                 * X86_64 will never get here anyway
+                 */
+                return ((instr_lo & 7) == 0x6);
+#ifdef CONFIG_X86_64
+        case 0x40:
+                /*
+                 * In AMD64 long mode 0x40..0x4F are valid REX prefixes
+                 * Need to figure out under what instruction mode the
+                 * instruction was issued. Could check the LDT for lm,
+                 * but for now it's good enough to assume that long
+                 * mode only uses well known segments or kernel.
+                 */
+                return (!user_mode(regs)) || (regs->cs == __USER_CS);
+#endif
+        case 0x60:
+                /* 0x64 thru 0x67 are valid prefixes in all modes. */
+                return (instr_lo & 0xC) == 0x4;
+        case 0xF0:
+                /* 0xF0, 0xF2, 0xF3 are valid prefixes in all modes. */
+                return !instr_lo || (instr_lo>>1) == 1;
+        case 0x00:
+                /* Prefetch instruction is 0x0F0D or 0x0F18 */
+                if (probe_kernel_address(instr, opcode))
+                        return 0;
+
+                *prefetch = (instr_lo == 0xF) &&
+                        (opcode == 0x0D || opcode == 0x18);
+                return 0;
+        default:
+                return 0;
+        }
+}
+
+static int
+is_prefetch(struct pt_regs *regs, unsigned long error_code, unsigned long addr)
+{
+        unsigned char *max_instr;
         unsigned char *instr;
-        int scan_more = 1;
         int prefetch = 0;
-        unsigned char *max_instr;
 
         /*
          * If it was a exec (instruction fetch) fault on NX page, then
@@ -106,106 +159,170 @@ static int is_prefetch(struct pt_regs *regs, unsigned long addr,
         if (error_code & PF_INSTR)
                 return 0;
 
-        instr = (unsigned char *)convert_ip_to_linear(current, regs);
+        instr = (void *)convert_ip_to_linear(current, regs);
         max_instr = instr + 15;
 
         if (user_mode(regs) && instr >= (unsigned char *)TASK_SIZE)
                 return 0;
 
-        while (scan_more && instr < max_instr) {
+        while (instr < max_instr) {
                 unsigned char opcode;
-                unsigned char instr_hi;
-                unsigned char instr_lo;
 
                 if (probe_kernel_address(instr, opcode))
                         break;
 
-                instr_hi = opcode & 0xf0;
-                instr_lo = opcode & 0x0f;
                 instr++;
 
-                switch (instr_hi) {
-                case 0x20:
-                case 0x30:
-                        /*
-                         * Values 0x26,0x2E,0x36,0x3E are valid x86 prefixes.
-                         * In X86_64 long mode, the CPU will signal invalid
-                         * opcode if some of these prefixes are present so
-                         * X86_64 will never get here anyway
-                         */
-                        scan_more = ((instr_lo & 7) == 0x6);
+                if (!check_prefetch_opcode(regs, instr, opcode, &prefetch))
                         break;
-#ifdef CONFIG_X86_64
-                case 0x40:
-                        /*
-                         * In AMD64 long mode 0x40..0x4F are valid REX prefixes
-                         * Need to figure out under what instruction mode the
-                         * instruction was issued. Could check the LDT for lm,
-                         * but for now it's good enough to assume that long
-                         * mode only uses well known segments or kernel.
-                         */
-                        scan_more = (!user_mode(regs)) || (regs->cs == __USER_CS);
-                        break;
-#endif
-                case 0x60:
-                        /* 0x64 thru 0x67 are valid prefixes in all modes. */
-                        scan_more = (instr_lo & 0xC) == 0x4;
-                        break;
-                case 0xF0:
-                        /* 0xF0, 0xF2, 0xF3 are valid prefixes in all modes. */
-                        scan_more = !instr_lo || (instr_lo>>1) == 1;
-                        break;
-                case 0x00:
-                        /* Prefetch instruction is 0x0F0D or 0x0F18 */
-                        scan_more = 0;
-
-                        if (probe_kernel_address(instr, opcode))
-                                break;
-                        prefetch = (instr_lo == 0xF) &&
-                                (opcode == 0x0D || opcode == 0x18);
-                        break;
-                default:
-                        scan_more = 0;
-                        break;
-                }
         }
         return prefetch;
 }
 
-static void force_sig_info_fault(int si_signo, int si_code,
-        unsigned long address, struct task_struct *tsk)
+static void
+force_sig_info_fault(int si_signo, int si_code, unsigned long address,
+                     struct task_struct *tsk)
 {
         siginfo_t info;
 
-        info.si_signo = si_signo;
-        info.si_errno = 0;
-        info.si_code = si_code;
-        info.si_addr = (void __user *)address;
+        info.si_signo   = si_signo;
+        info.si_errno   = 0;
+        info.si_code    = si_code;
+        info.si_addr    = (void __user *)address;
+
         force_sig_info(si_signo, &info, tsk);
 }
 
-#ifdef CONFIG_X86_64
-static int bad_address(void *p)
+DEFINE_SPINLOCK(pgd_lock);
+LIST_HEAD(pgd_list);
+
+#ifdef CONFIG_X86_32
+static inline pmd_t *vmalloc_sync_one(pgd_t *pgd, unsigned long address)
 {
-        unsigned long dummy;
-        return probe_kernel_address((unsigned long *)p, dummy);
+        unsigned index = pgd_index(address);
+        pgd_t *pgd_k;
+        pud_t *pud, *pud_k;
+        pmd_t *pmd, *pmd_k;
+
+        pgd += index;
+        pgd_k = init_mm.pgd + index;
+
+        if (!pgd_present(*pgd_k))
+                return NULL;
+
+        /*
+         * set_pgd(pgd, *pgd_k); here would be useless on PAE
+         * and redundant with the set_pmd() on non-PAE. As would
+         * set_pud.
+         */
+        pud = pud_offset(pgd, address);
+        pud_k = pud_offset(pgd_k, address);
+        if (!pud_present(*pud_k))
+                return NULL;
+
+        pmd = pmd_offset(pud, address);
+        pmd_k = pmd_offset(pud_k, address);
+        if (!pmd_present(*pmd_k))
+                return NULL;
+
+        if (!pmd_present(*pmd)) {
+                set_pmd(pmd, *pmd_k);
+                arch_flush_lazy_mmu_mode();
+        } else {
+                BUG_ON(pmd_page(*pmd) != pmd_page(*pmd_k));
+        }
+
+        return pmd_k;
+}
+
+void vmalloc_sync_all(void)
+{
+        unsigned long address;
+
+        if (SHARED_KERNEL_PMD)
+                return;
+
+        for (address = VMALLOC_START & PMD_MASK;
+             address >= TASK_SIZE && address < FIXADDR_TOP;
+             address += PMD_SIZE) {
+
+                unsigned long flags;
+                struct page *page;
+
+                spin_lock_irqsave(&pgd_lock, flags);
+                list_for_each_entry(page, &pgd_list, lru) {
+                        if (!vmalloc_sync_one(page_address(page), address))
+                                break;
+                }
+                spin_unlock_irqrestore(&pgd_lock, flags);
+        }
+}
+
+/*
+ * 32-bit:
+ *
+ *   Handle a fault on the vmalloc or module mapping area
+ */
+static noinline int vmalloc_fault(unsigned long address)
+{
+        unsigned long pgd_paddr;
+        pmd_t *pmd_k;
+        pte_t *pte_k;
+
+        /* Make sure we are in vmalloc area: */
+        if (!(address >= VMALLOC_START && address < VMALLOC_END))
+                return -1;
+
+        /*
+         * Synchronize this task's top level page-table
+         * with the 'reference' page table.
+         *
+         * Do _not_ use "current" here. We might be inside
+         * an interrupt in the middle of a task switch..
+         */
+        pgd_paddr = read_cr3();
+        pmd_k = vmalloc_sync_one(__va(pgd_paddr), address);
+        if (!pmd_k)
+                return -1;
+
+        pte_k = pte_offset_kernel(pmd_k, address);
+        if (!pte_present(*pte_k))
+                return -1;
+
+        return 0;
+}
+
+/*
+ * Did it hit the DOS screen memory VA from vm86 mode?
+ */
+static inline void
+check_v8086_mode(struct pt_regs *regs, unsigned long address,
+                 struct task_struct *tsk)
+{
+        unsigned long bit;
+
+        if (!v8086_mode(regs))
+                return;
+
+        bit = (address - 0xA0000) >> PAGE_SHIFT;
+        if (bit < 32)
+                tsk->thread.screen_bitmap |= 1 << bit;
 }
-#endif
 
 static void dump_pagetable(unsigned long address)
 {
-#ifdef CONFIG_X86_32
         __typeof__(pte_val(__pte(0))) page;
 
         page = read_cr3();
         page = ((__typeof__(page) *) __va(page))[address >> PGDIR_SHIFT];
+
 #ifdef CONFIG_X86_PAE
         printk("*pdpt = %016Lx ", page);
         if ((page >> PAGE_SHIFT) < max_low_pfn
             && page & _PAGE_PRESENT) {
                 page &= PAGE_MASK;
                 page = ((__typeof__(page) *) __va(page))[(address >> PMD_SHIFT)
-                                                         & (PTRS_PER_PMD - 1)];
+                                                        & (PTRS_PER_PMD - 1)];
                 printk(KERN_CONT "*pde = %016Lx ", page);
                 page &= ~_PAGE_NX;
         }
@@ -217,19 +334,145 @@ static void dump_pagetable(unsigned long address)
          * We must not directly access the pte in the highpte
          * case if the page table is located in highmem.
          * And let's rather not kmap-atomic the pte, just in case
-         * it's allocated already.
+         * it's allocated already:
          */
         if ((page >> PAGE_SHIFT) < max_low_pfn
             && (page & _PAGE_PRESENT)
             && !(page & _PAGE_PSE)) {
+
                 page &= PAGE_MASK;
                 page = ((__typeof__(page) *) __va(page))[(address >> PAGE_SHIFT)
-                                                         & (PTRS_PER_PTE - 1)];
+                                                        & (PTRS_PER_PTE - 1)];
                 printk("*pte = %0*Lx ", sizeof(page)*2, (u64)page);
         }
 
         printk("\n");
-#else /* CONFIG_X86_64 */
+}
+
+#else /* CONFIG_X86_64: */
+
+void vmalloc_sync_all(void)
+{
+        unsigned long address;
+
+        for (address = VMALLOC_START & PGDIR_MASK; address <= VMALLOC_END;
+             address += PGDIR_SIZE) {
+
+                const pgd_t *pgd_ref = pgd_offset_k(address);
+                unsigned long flags;
+                struct page *page;
+
+                if (pgd_none(*pgd_ref))
+                        continue;
+
+                spin_lock_irqsave(&pgd_lock, flags);
+                list_for_each_entry(page, &pgd_list, lru) {
+                        pgd_t *pgd;
+                        pgd = (pgd_t *)page_address(page) + pgd_index(address);
+                        if (pgd_none(*pgd))
+                                set_pgd(pgd, *pgd_ref);
+                        else
+                                BUG_ON(pgd_page_vaddr(*pgd) != pgd_page_vaddr(*pgd_ref));
+                }
+                spin_unlock_irqrestore(&pgd_lock, flags);
+        }
+}
+
+/*
+ * 64-bit:
+ *
+ *   Handle a fault on the vmalloc area
+ *
+ * This assumes no large pages in there.
+ */
+static noinline int vmalloc_fault(unsigned long address)
+{
+        pgd_t *pgd, *pgd_ref;
+        pud_t *pud, *pud_ref;
+        pmd_t *pmd, *pmd_ref;
+        pte_t *pte, *pte_ref;
+
+        /* Make sure we are in vmalloc area: */
+        if (!(address >= VMALLOC_START && address < VMALLOC_END))
+                return -1;
+
+        /*
+         * Copy kernel mappings over when needed. This can also
+         * happen within a race in page table update. In the later
+         * case just flush:
+         */
+        pgd = pgd_offset(current->active_mm, address);
+        pgd_ref = pgd_offset_k(address);
+        if (pgd_none(*pgd_ref))
+                return -1;
+
+        if (pgd_none(*pgd))
+                set_pgd(pgd, *pgd_ref);
+        else
+                BUG_ON(pgd_page_vaddr(*pgd) != pgd_page_vaddr(*pgd_ref));
+
+        /*
+         * Below here mismatches are bugs because these lower tables
+         * are shared:
+         */
+
+        pud = pud_offset(pgd, address);
+        pud_ref = pud_offset(pgd_ref, address);
+        if (pud_none(*pud_ref))
+                return -1;
+
+        if (pud_none(*pud) || pud_page_vaddr(*pud) != pud_page_vaddr(*pud_ref))
+                BUG();
+
+        pmd = pmd_offset(pud, address);
+        pmd_ref = pmd_offset(pud_ref, address);
+        if (pmd_none(*pmd_ref))
+                return -1;
+
+        if (pmd_none(*pmd) || pmd_page(*pmd) != pmd_page(*pmd_ref))
+                BUG();
+
+        pte_ref = pte_offset_kernel(pmd_ref, address);
+        if (!pte_present(*pte_ref))
+                return -1;
+
+        pte = pte_offset_kernel(pmd, address);
+
+        /*
+         * Don't use pte_page here, because the mappings can point
+         * outside mem_map, and the NUMA hash lookup cannot handle
+         * that:
+         */
+        if (!pte_present(*pte) || pte_pfn(*pte) != pte_pfn(*pte_ref))
+                BUG();
+
+        return 0;
+}
+
+static const char errata93_warning[] =
+KERN_ERR "******* Your BIOS seems to not contain a fix for K8 errata #93\n"
+KERN_ERR "******* Working around it, but it may cause SEGVs or burn power.\n"
+KERN_ERR "******* Please consider a BIOS update.\n"
+KERN_ERR "******* Disabling USB legacy in the BIOS may also help.\n";
+
+/*
+ * No vm86 mode in 64-bit mode:
+ */
+static inline void
+check_v8086_mode(struct pt_regs *regs, unsigned long address,
+                 struct task_struct *tsk)
+{
+}
+
+static int bad_address(void *p)
+{
+        unsigned long dummy;
+
+        return probe_kernel_address((unsigned long *)p, dummy);
+}
+
+static void dump_pagetable(unsigned long address)
+{
         pgd_t *pgd;
         pud_t *pud;
         pmd_t *pmd;
@@ -238,102 +481,77 @@ static void dump_pagetable(unsigned long address)
         pgd = (pgd_t *)read_cr3();
 
         pgd = __va((unsigned long)pgd & PHYSICAL_PAGE_MASK);
+
         pgd += pgd_index(address);
-        if (bad_address(pgd)) goto bad;
+        if (bad_address(pgd))
+                goto bad;
+
         printk("PGD %lx ", pgd_val(*pgd));
-        if (!pgd_present(*pgd)) goto ret;
+
+        if (!pgd_present(*pgd))
+                goto out;
 
         pud = pud_offset(pgd, address);
-        if (bad_address(pud)) goto bad;
+        if (bad_address(pud))
+                goto bad;
+
         printk("PUD %lx ", pud_val(*pud));
         if (!pud_present(*pud) || pud_large(*pud))
-                goto ret;
+                goto out;
 
         pmd = pmd_offset(pud, address);
-        if (bad_address(pmd)) goto bad;
+        if (bad_address(pmd))
+                goto bad;
+
         printk("PMD %lx ", pmd_val(*pmd));
-        if (!pmd_present(*pmd) || pmd_large(*pmd)) goto ret;
+        if (!pmd_present(*pmd) || pmd_large(*pmd))
+                goto out;
 
         pte = pte_offset_kernel(pmd, address);
-        if (bad_address(pte)) goto bad;
+        if (bad_address(pte))
+                goto bad;
+
         printk("PTE %lx", pte_val(*pte));
-ret:
+out:
         printk("\n");
         return;
 bad:
         printk("BAD\n");
-#endif
-}
-
-#ifdef CONFIG_X86_32
-static inline pmd_t *vmalloc_sync_one(pgd_t *pgd, unsigned long address)
-{
-        unsigned index = pgd_index(address);
-        pgd_t *pgd_k;
-        pud_t *pud, *pud_k;
-        pmd_t *pmd, *pmd_k;
-
-        pgd += index;
-        pgd_k = init_mm.pgd + index;
-
-        if (!pgd_present(*pgd_k))
-                return NULL;
-
-        /*
-         * set_pgd(pgd, *pgd_k); here would be useless on PAE
-         * and redundant with the set_pmd() on non-PAE. As would
-         * set_pud.
-         */
-
-        pud = pud_offset(pgd, address);
-        pud_k = pud_offset(pgd_k, address);
-        if (!pud_present(*pud_k))
-                return NULL;
-
-        pmd = pmd_offset(pud, address);
-        pmd_k = pmd_offset(pud_k, address);
-        if (!pmd_present(*pmd_k))
-                return NULL;
-        if (!pmd_present(*pmd)) {
-                set_pmd(pmd, *pmd_k);
-                arch_flush_lazy_mmu_mode();
-        } else
-                BUG_ON(pmd_page(*pmd) != pmd_page(*pmd_k));
-        return pmd_k;
 }
-#endif
 
-#ifdef CONFIG_X86_64
-static const char errata93_warning[] =
-KERN_ERR "******* Your BIOS seems to not contain a fix for K8 errata #93\n"
-KERN_ERR "******* Working around it, but it may cause SEGVs or burn power.\n"
-KERN_ERR "******* Please consider a BIOS update.\n"
-KERN_ERR "******* Disabling USB legacy in the BIOS may also help.\n";
-#endif
+#endif /* CONFIG_X86_64 */
 
-/* Workaround for K8 erratum #93 & buggy BIOS.
-   BIOS SMM functions are required to use a specific workaround
-   to avoid corruption of the 64bit RIP register on C stepping K8.
-   A lot of BIOS that didn't get tested properly miss this.
-   The OS sees this as a page fault with the upper 32bits of RIP cleared.
-   Try to work around it here.
-   Note we only handle faults in kernel here.
-   Does nothing for X86_32
+/*
+ * Workaround for K8 erratum #93 & buggy BIOS.
+ *
+ * BIOS SMM functions are required to use a specific workaround
+ * to avoid corruption of the 64bit RIP register on C stepping K8.
+ *
+ * A lot of BIOS that didn't get tested properly miss this.
+ *
+ * The OS sees this as a page fault with the upper 32bits of RIP cleared.
+ * Try to work around it here.
+ *
+ * Note we only handle faults in kernel here.
+ * Does nothing on 32-bit.
  */
 static int is_errata93(struct pt_regs *regs, unsigned long address)
 {
 #ifdef CONFIG_X86_64
-        static int warned;
+        static int once;
+
         if (address != regs->ip)
                 return 0;
+
         if ((address >> 32) != 0)
                 return 0;
+
         address |= 0xffffffffUL << 32;
         if ((address >= (u64)_stext && address <= (u64)_etext) ||
             (address >= MODULES_VADDR && address <= MODULES_END)) {
-                if (!warned) {
+                if (!once) {
                         printk(errata93_warning);
-                        warned = 1;
+                        once = 1;
                 }
                 regs->ip = address;
                 return 1;
@@ -343,16 +561,17 @@ static int is_errata93(struct pt_regs *regs, unsigned long address)
 }
 
 /*
- * Work around K8 erratum #100 K8 in compat mode occasionally jumps to illegal
- * addresses >4GB.  We catch this in the page fault handler because these
- * addresses are not reachable. Just detect this case and return.  Any code
+ * Work around K8 erratum #100 K8 in compat mode occasionally jumps
+ * to illegal addresses >4GB.
+ *
+ * We catch this in the page fault handler because these addresses
+ * are not reachable. Just detect this case and return.  Any code
  * segment in LDT is compatibility mode.
  */
 static int is_errata100(struct pt_regs *regs, unsigned long address)
 {
 #ifdef CONFIG_X86_64
-        if ((regs->cs == __USER32_CS || (regs->cs & (1<<2))) &&
-            (address >> 32))
+        if ((regs->cs == __USER32_CS || (regs->cs & (1<<2))) && (address >> 32))
                 return 1;
 #endif
         return 0;
@@ -362,8 +581,9 @@ static int is_f00f_bug(struct pt_regs *regs, unsigned long address)
 {
 #ifdef CONFIG_X86_F00F_BUG
         unsigned long nr;
+
         /*
-         * Pentium F0 0F C7 C8 bug workaround.
+         * Pentium F0 0F C7 C8 bug workaround:
          */
         if (boot_cpu_data.f00f_bug) {
                 nr = (address - idt_descr.address) >> 3;
@@ -377,62 +597,277 @@ static int is_f00f_bug(struct pt_regs *regs, unsigned long address)
         return 0;
 }
 
-static void show_fault_oops(struct pt_regs *regs, unsigned long error_code,
-                            unsigned long address)
+static const char nx_warning[] = KERN_CRIT
+"kernel tried to execute NX-protected page - exploit attempt? (uid: %d)\n";
+
+static void
+show_fault_oops(struct pt_regs *regs, unsigned long error_code,
+                unsigned long address)
 {
-#ifdef CONFIG_X86_32
         if (!oops_may_print())
                 return;
-#endif
 
-#ifdef CONFIG_X86_PAE
         if (error_code & PF_INSTR) {
                 unsigned int level;
+
                 pte_t *pte = lookup_address(address, &level);
 
                 if (pte && pte_present(*pte) && !pte_exec(*pte))
-                        printk(KERN_CRIT "kernel tried to execute "
-                                "NX-protected page - exploit attempt? "
-                                "(uid: %d)\n", current_uid());
+                        printk(nx_warning, current_uid());
         }
-#endif
 
         printk(KERN_ALERT "BUG: unable to handle kernel ");
         if (address < PAGE_SIZE)
                 printk(KERN_CONT "NULL pointer dereference");
         else
                 printk(KERN_CONT "paging request");
+
         printk(KERN_CONT " at %p\n", (void *) address);
         printk(KERN_ALERT "IP:");
         printk_address(regs->ip, 1);
+
         dump_pagetable(address);
 }
 
-#ifdef CONFIG_X86_64
-static noinline void pgtable_bad(unsigned long address, struct pt_regs *regs,
-                                 unsigned long error_code)
+static noinline void
+pgtable_bad(struct pt_regs *regs, unsigned long error_code,
+            unsigned long address)
 {
-        unsigned long flags = oops_begin();
-        int sig = SIGKILL;
         struct task_struct *tsk;
+        unsigned long flags;
+        int sig;
+
+        flags = oops_begin();
+        tsk = current;
+        sig = SIGKILL;
 
         printk(KERN_ALERT "%s: Corrupted page table at address %lx\n",
-               current->comm, address);
+               tsk->comm, address);
         dump_pagetable(address);
-        tsk = current;
-        tsk->thread.cr2 = address;
-        tsk->thread.trap_no = 14;
-        tsk->thread.error_code = error_code;
+
+        tsk->thread.cr2         = address;
+        tsk->thread.trap_no     = 14;
+        tsk->thread.error_code  = error_code;
+
         if (__die("Bad pagetable", regs, error_code))
                 sig = 0;
+
         oops_end(flags, regs, sig);
 }
-#endif
+
+static noinline void
+no_context(struct pt_regs *regs, unsigned long error_code,
+           unsigned long address)
+{
+        struct task_struct *tsk = current;
+        unsigned long *stackend;
+        unsigned long flags;
+        int sig;
+
+        /* Are we prepared to handle this kernel fault? */
+        if (fixup_exception(regs))
+                return;
+
+        /*
+         * 32-bit:
+         *
+         *   Valid to do another page fault here, because if this fault
+         *   had been triggered by is_prefetch fixup_exception would have
+         *   handled it.
+         *
+         * 64-bit:
+         *
+         *   Hall of shame of CPU/BIOS bugs.
+         */
+        if (is_prefetch(regs, error_code, address))
+                return;
+
+        if (is_errata93(regs, address))
+                return;
+
+        /*
+         * Oops. The kernel tried to access some bad page. We'll have to
+         * terminate things with extreme prejudice:
+         */
+        flags = oops_begin();
+
+        show_fault_oops(regs, error_code, address);
+
+        stackend = end_of_stack(tsk);
+        if (*stackend != STACK_END_MAGIC)
+                printk(KERN_ALERT "Thread overran stack, or stack corrupted\n");
+
+        tsk->thread.cr2         = address;
+        tsk->thread.trap_no     = 14;
+        tsk->thread.error_code  = error_code;
+
+        sig = SIGKILL;
+        if (__die("Oops", regs, error_code))
+                sig = 0;
+
+        /* Executive summary in case the body of the oops scrolled away */
+        printk(KERN_EMERG "CR2: %016lx\n", address);
+
+        oops_end(flags, regs, sig);
+}
+
+/*
+ * Print out info about fatal segfaults, if the show_unhandled_signals
+ * sysctl is set:
+ */
+static inline void
+show_signal_msg(struct pt_regs *regs, unsigned long error_code,
+                unsigned long address, struct task_struct *tsk)
+{
+        if (!unhandled_signal(tsk, SIGSEGV))
+                return;
+
+        if (!printk_ratelimit())
+                return;
+
+        printk(KERN_CONT "%s%s[%d]: segfault at %lx ip %p sp %p error %lx",
+                task_pid_nr(tsk) > 1 ? KERN_INFO : KERN_EMERG,
+                tsk->comm, task_pid_nr(tsk), address,
+                (void *)regs->ip, (void *)regs->sp, error_code);
+
+        print_vma_addr(KERN_CONT " in ", regs->ip);
+
+        printk(KERN_CONT "\n");
+}
+
+static void
+__bad_area_nosemaphore(struct pt_regs *regs, unsigned long error_code,
+                       unsigned long address, int si_code)
+{
+        struct task_struct *tsk = current;
+
+        /* User mode accesses just cause a SIGSEGV */
+        if (error_code & PF_USER) {
+                /*
+                 * It's possible to have interrupts off here:
+                 */
+                local_irq_enable();
+
+                /*
+                 * Valid to do another page fault here because this one came
+                 * from user space:
+                 */
+                if (is_prefetch(regs, error_code, address))
+                        return;
+
+                if (is_errata100(regs, address))
+                        return;
+
+                if (unlikely(show_unhandled_signals))
+                        show_signal_msg(regs, error_code, address, tsk);
+
+                /* Kernel addresses are always protection faults: */
+                tsk->thread.cr2         = address;
+                tsk->thread.error_code  = error_code | (address >= TASK_SIZE);
+                tsk->thread.trap_no     = 14;
+
+                force_sig_info_fault(SIGSEGV, si_code, address, tsk);
+
+                return;
+        }
+
+        if (is_f00f_bug(regs, address))
+                return;
+
+        no_context(regs, error_code, address);
+}
+
+static noinline void
+bad_area_nosemaphore(struct pt_regs *regs, unsigned long error_code,
+                     unsigned long address)
+{
+        __bad_area_nosemaphore(regs, error_code, address, SEGV_MAPERR);
+}
+
+static void
+__bad_area(struct pt_regs *regs, unsigned long error_code,
+           unsigned long address, int si_code)
+{
+        struct mm_struct *mm = current->mm;
+
+        /*
+         * Something tried to access memory that isn't in our memory map..
+         * Fix it, but check if it's kernel or user first..
+         */
+        up_read(&mm->mmap_sem);
+
+        __bad_area_nosemaphore(regs, error_code, address, si_code);
+}
+
+static noinline void
+bad_area(struct pt_regs *regs, unsigned long error_code, unsigned long address)
+{
+        __bad_area(regs, error_code, address, SEGV_MAPERR);
+}
+
+static noinline void
+bad_area_access_error(struct pt_regs *regs, unsigned long error_code,
+                      unsigned long address)
+{
+        __bad_area(regs, error_code, address, SEGV_ACCERR);
+}
+
+/* TODO: fixup for "mm-invoke-oom-killer-from-page-fault.patch" */
+static void
+out_of_memory(struct pt_regs *regs, unsigned long error_code,
+              unsigned long address)
+{
+        /*
+         * We ran out of memory, call the OOM killer, and return the userspace
+         * (which will retry the fault, or kill us if we got oom-killed):
+         */
+        up_read(&current->mm->mmap_sem);
+
+        pagefault_out_of_memory();
+}
+
+static void
+do_sigbus(struct pt_regs *regs, unsigned long error_code, unsigned long address)
+{
+        struct task_struct *tsk = current;
+        struct mm_struct *mm = tsk->mm;
+
+        up_read(&mm->mmap_sem);
+
+        /* Kernel mode? Handle exceptions or die: */
+        if (!(error_code & PF_USER))
+                no_context(regs, error_code, address);
+
+        /* User-space => ok to do another page fault: */
+        if (is_prefetch(regs, error_code, address))
+                return;
+
+        tsk->thread.cr2         = address;
+        tsk->thread.error_code  = error_code;
+        tsk->thread.trap_no     = 14;
+
+        force_sig_info_fault(SIGBUS, BUS_ADRERR, address, tsk);
+}
+
+static noinline void
+mm_fault_error(struct pt_regs *regs, unsigned long error_code,
+               unsigned long address, unsigned int fault)
+{
+        if (fault & VM_FAULT_OOM) {
+                out_of_memory(regs, error_code, address);
+        } else {
+                if (fault & VM_FAULT_SIGBUS)
+                        do_sigbus(regs, error_code, address);
+                else
+                        BUG();
+        }
+}
 
 static int spurious_fault_check(unsigned long error_code, pte_t *pte)
 {
         if ((error_code & PF_WRITE) && !pte_write(*pte))
                 return 0;
+
         if ((error_code & PF_INSTR) && !pte_exec(*pte))
                 return 0;
 
@@ -440,21 +875,25 @@ static int spurious_fault_check(unsigned long error_code, pte_t *pte)
 }
 
 /*
- * Handle a spurious fault caused by a stale TLB entry.  This allows
- * us to lazily refresh the TLB when increasing the permissions of a
- * kernel page (RO -> RW or NX -> X).  Doing it eagerly is very
- * expensive since that implies doing a full cross-processor TLB
- * flush, even if no stale TLB entries exist on other processors.
+ * Handle a spurious fault caused by a stale TLB entry.
+ *
+ * This allows us to lazily refresh the TLB when increasing the
+ * permissions of a kernel page (RO -> RW or NX -> X).  Doing it
+ * eagerly is very expensive since that implies doing a full
+ * cross-processor TLB flush, even if no stale TLB entries exist
+ * on other processors.
+ *
  * There are no security implications to leaving a stale TLB when
  * increasing the permissions on a page.
  */
-static int spurious_fault(unsigned long address,
-                          unsigned long error_code)
+static noinline int
+spurious_fault(unsigned long error_code, unsigned long address)
 {
         pgd_t *pgd;
         pud_t *pud;
         pmd_t *pmd;
         pte_t *pte;
+        int ret;
 
         /* Reserved-bit violation or user access to kernel space? */
         if (error_code & (PF_USER | PF_RSVD))
@@ -482,127 +921,71 @@ static int spurious_fault(unsigned long address,
         if (!pte_present(*pte))
                 return 0;
 
-        return spurious_fault_check(error_code, pte);
-}
-
-/*
- * X86_32
- * Handle a fault on the vmalloc or module mapping area
- *
- * X86_64
- * Handle a fault on the vmalloc area
- *
- * This assumes no large pages in there.
- */
-static int vmalloc_fault(unsigned long address)
-{
-#ifdef CONFIG_X86_32
-        unsigned long pgd_paddr;
-        pmd_t *pmd_k;
-        pte_t *pte_k;
-
-        /* Make sure we are in vmalloc area */
-        if (!(address >= VMALLOC_START && address < VMALLOC_END))
-                return -1;
+        ret = spurious_fault_check(error_code, pte);
+        if (!ret)
+                return 0;
 
         /*
-         * Synchronize this task's top level page-table
-         * with the 'reference' page table.
-         *
-         * Do _not_ use "current" here. We might be inside
-         * an interrupt in the middle of a task switch..
+         * Make sure we have permissions in PMD.
+         * If not, then there's a bug in the page tables:
          */
-        pgd_paddr = read_cr3();
-        pmd_k = vmalloc_sync_one(__va(pgd_paddr), address);
-        if (!pmd_k)
-                return -1;
-        pte_k = pte_offset_kernel(pmd_k, address);
-        if (!pte_present(*pte_k))
-                return -1;
-        return 0;
-#else
-        pgd_t *pgd, *pgd_ref;
-        pud_t *pud, *pud_ref;
-        pmd_t *pmd, *pmd_ref;
-        pte_t *pte, *pte_ref;
+        ret = spurious_fault_check(error_code, (pte_t *) pmd);
+        WARN_ONCE(!ret, "PMD has incorrect permission bits\n");
 
-        /* Make sure we are in vmalloc area */
-        if (!(address >= VMALLOC_START && address < VMALLOC_END))
-                return -1;
+        return ret;
+}
 
-        /* Copy kernel mappings over when needed. This can also
-           happen within a race in page table update. In the later
-           case just flush. */
+int show_unhandled_signals = 1;
 
-        pgd = pgd_offset(current->active_mm, address);
-        pgd_ref = pgd_offset_k(address);
-        if (pgd_none(*pgd_ref))
-                return -1;
-        if (pgd_none(*pgd))
-                set_pgd(pgd, *pgd_ref);
-        else
-                BUG_ON(pgd_page_vaddr(*pgd) != pgd_page_vaddr(*pgd_ref));
+static inline int
+access_error(unsigned long error_code, int write, struct vm_area_struct *vma)
+{
+        if (write) {
+                /* write, present and write, not present: */
+                if (unlikely(!(vma->vm_flags & VM_WRITE)))
+                        return 1;
+                return 0;
+        }
 
-        /* Below here mismatches are bugs because these lower tables
-           are shared */
+        /* read, present: */
+        if (unlikely(error_code & PF_PROT))
+                return 1;
+
+        /* read, not present: */
+        if (unlikely(!(vma->vm_flags & (VM_READ | VM_EXEC | VM_WRITE))))
+                return 1;
 
-        pud = pud_offset(pgd, address);
-        pud_ref = pud_offset(pgd_ref, address);
-        if (pud_none(*pud_ref))
-                return -1;
-        if (pud_none(*pud) || pud_page_vaddr(*pud) != pud_page_vaddr(*pud_ref))
-                BUG();
-        pmd = pmd_offset(pud, address);
-        pmd_ref = pmd_offset(pud_ref, address);
-        if (pmd_none(*pmd_ref))
-                return -1;
-        if (pmd_none(*pmd) || pmd_page(*pmd) != pmd_page(*pmd_ref))
-                BUG();
-        pte_ref = pte_offset_kernel(pmd_ref, address);
-        if (!pte_present(*pte_ref))
-                return -1;
-        pte = pte_offset_kernel(pmd, address);
-        /* Don't use pte_page here, because the mappings can point
-           outside mem_map, and the NUMA hash lookup cannot handle
-           that. */
-        if (!pte_present(*pte) || pte_pfn(*pte) != pte_pfn(*pte_ref))
-                BUG();
         return 0;
-#endif
 }
 
-int show_unhandled_signals = 1;
+static int fault_in_kernel_space(unsigned long address)
+{
+        return address >= TASK_SIZE_MAX;
+}
 
 /*
  * This routine handles page faults.  It determines the address,
  * and the problem, and then passes it off to one of the appropriate
  * routines.
  */
-#ifdef CONFIG_X86_64
-asmlinkage
-#endif
-void __kprobes do_page_fault(struct pt_regs *regs, unsigned long error_code)
+dotraplinkage void __kprobes
+do_page_fault(struct pt_regs *regs, unsigned long error_code)
 {
-        struct task_struct *tsk;
-        struct mm_struct *mm;
         struct vm_area_struct *vma;
+        struct task_struct *tsk;
         unsigned long address;
-        int write, si_code;
+        struct mm_struct *mm;
+        int write;
         int fault;
-#ifdef CONFIG_X86_64
-        unsigned long flags;
-        int sig;
-#endif
 
         tsk = current;
         mm = tsk->mm;
+
         prefetchw(&mm->mmap_sem);
 
-        /* get the address */
+        /* Get the faulting address: */
         address = read_cr2();
 
-        si_code = SEGV_MAPERR;
-
         if (unlikely(kmmio_fault(regs, address)))
                 return;
 
@@ -619,319 +1002,147 @@ void __kprobes do_page_fault(struct pt_regs *regs, unsigned long error_code)
          * (error_code & 4) == 0, and that the fault was not a
          * protection error (error_code & 9) == 0.
          */
-#ifdef CONFIG_X86_32
-        if (unlikely(address >= TASK_SIZE)) {
-#else
-        if (unlikely(address >= TASK_SIZE64)) {
-#endif
+        if (unlikely(fault_in_kernel_space(address))) {
                 if (!(error_code & (PF_RSVD|PF_USER|PF_PROT)) &&
                     vmalloc_fault(address) >= 0)
                         return;
 
-                /* Can handle a stale RO->RW TLB */
-                if (spurious_fault(address, error_code))
+                /* Can handle a stale RO->RW TLB: */
+                if (spurious_fault(error_code, address))
                         return;
 
-                /* kprobes don't want to hook the spurious faults. */
+                /* kprobes don't want to hook the spurious faults: */
                 if (notify_page_fault(regs))
                         return;
                 /*
                  * Don't take the mm semaphore here. If we fixup a prefetch
-                 * fault we could otherwise deadlock.
+                 * fault we could otherwise deadlock:
                  */
-                goto bad_area_nosemaphore;
-        }
+                bad_area_nosemaphore(regs, error_code, address);
 
-        /* kprobes don't want to hook the spurious faults. */
-        if (notify_page_fault(regs))
                 return;
+        }
 
+        /* kprobes don't want to hook the spurious faults: */
+        if (unlikely(notify_page_fault(regs)))
+                return;
         /*
          * It's safe to allow irq's after cr2 has been saved and the
          * vmalloc fault has been handled.
          *
          * User-mode registers count as a user access even for any
-         * potential system fault or CPU buglet.
+         * potential system fault or CPU buglet:
          */
         if (user_mode_vm(regs)) {
                 local_irq_enable();
                 error_code |= PF_USER;
-        } else if (regs->flags & X86_EFLAGS_IF)
-                local_irq_enable();
+        } else {
+                if (regs->flags & X86_EFLAGS_IF)
+                        local_irq_enable();
+        }
 
-#ifdef CONFIG_X86_64
         if (unlikely(error_code & PF_RSVD))
-                pgtable_bad(address, regs, error_code);
-#endif
+                pgtable_bad(regs, error_code, address);
 
         /*
-         * If we're in an interrupt, have no user context or are running in an
-         * atomic region then we must not take the fault.
+         * If we're in an interrupt, have no user context or are running
+         * in an atomic region then we must not take the fault:
          */
-        if (unlikely(in_atomic() || !mm))
-                goto bad_area_nosemaphore;
+        if (unlikely(in_atomic() || !mm)) {
+                bad_area_nosemaphore(regs, error_code, address);
+                return;
+        }
 
         /*
          * When running in the kernel we expect faults to occur only to
-         * addresses in user space.  All other faults represent errors in the
-         * kernel and should generate an OOPS.  Unfortunately, in the case of an
-         * erroneous fault occurring in a code path which already holds mmap_sem
-         * we will deadlock attempting to validate the fault against the
-         * address space.  Luckily the kernel only validly references user
-         * space from well defined areas of code, which are listed in the
-         * exceptions table.
+         * addresses in user space.  All other faults represent errors in
+         * the kernel and should generate an OOPS.  Unfortunately, in the
+         * case of an erroneous fault occurring in a code path which already
+         * holds mmap_sem we will deadlock attempting to validate the fault
+         * against the address space.  Luckily the kernel only validly
+         * references user space from well defined areas of code, which are
+         * listed in the exceptions table.
          *
          * As the vast majority of faults will be valid we will only perform
-         * the source reference check when there is a possibility of a deadlock.
-         * Attempt to lock the address space, if we cannot we then validate the
-         * source.  If this is invalid we can skip the address space check,
-         * thus avoiding the deadlock.
+         * the source reference check when there is a possibility of a
+         * deadlock. Attempt to lock the address space, if we cannot we then
+         * validate the source. If this is invalid we can skip the address
+         * space check, thus avoiding the deadlock:
          */
-        if (!down_read_trylock(&mm->mmap_sem)) {
+        if (unlikely(!down_read_trylock(&mm->mmap_sem))) {
                 if ((error_code & PF_USER) == 0 &&
-                    !search_exception_tables(regs->ip))
-                        goto bad_area_nosemaphore;
+                    !search_exception_tables(regs->ip)) {
+                        bad_area_nosemaphore(regs, error_code, address);
+                        return;
+                }
                 down_read(&mm->mmap_sem);
+        } else {
+                /*
+                 * The above down_read_trylock() might have succeeded in
+                 * which case we'll have missed the might_sleep() from
+                 * down_read():
+                 */
+                might_sleep();
         }
 
         vma = find_vma(mm, address);
-        if (!vma)
-                goto bad_area;
-        if (vma->vm_start <= address)
+        if (unlikely(!vma)) {
+                bad_area(regs, error_code, address);
+                return;
+        }
+        if (likely(vma->vm_start <= address))
                 goto good_area;
-        if (!(vma->vm_flags & VM_GROWSDOWN))
-                goto bad_area;
+        if (unlikely(!(vma->vm_flags & VM_GROWSDOWN))) {
+                bad_area(regs, error_code, address);
+                return;
+        }
         if (error_code & PF_USER) {
                 /*
                  * Accessing the stack below %sp is always a bug.
                  * The large cushion allows instructions like enter
-                 * and pusha to work.  ("enter $65535,$31" pushes
+                 * and pusha to work. ("enter $65535, $31" pushes
                  * 32 pointers and then decrements %sp by 65535.)
                  */
-                if (address + 65536 + 32 * sizeof(unsigned long) < regs->sp)
-                        goto bad_area;
+                if (unlikely(address + 65536 + 32 * sizeof(unsigned long) < regs->sp)) {
+                        bad_area(regs, error_code, address);
+                        return;
+                }
         }
-        if (expand_stack(vma, address))
-                goto bad_area;
-/*
- * Ok, we have a good vm_area for this memory access, so
- * we can handle it..
- */
+        if (unlikely(expand_stack(vma, address))) {
+                bad_area(regs, error_code, address);
+                return;
+        }
+
+        /*
+         * Ok, we have a good vm_area for this memory access, so
+         * we can handle it..
+         */
 good_area:
-        si_code = SEGV_ACCERR;
-        write = 0;
-        switch (error_code & (PF_PROT|PF_WRITE)) {
-        default:        /* 3: write, present */
-                /* fall through */
-        case PF_WRITE:          /* write, not present */
-                if (!(vma->vm_flags & VM_WRITE))
-                        goto bad_area;
-                write++;
-                break;
-        case PF_PROT:           /* read, present */
-                goto bad_area;
-        case 0:                 /* read, not present */
-                if (!(vma->vm_flags & (VM_READ | VM_EXEC | VM_WRITE)))
-                        goto bad_area;
+        write = error_code & PF_WRITE;
+
+        if (unlikely(access_error(error_code, write, vma))) {
+                bad_area_access_error(regs, error_code, address);
+                return;
         }
 
         /*
          * If for any reason at all we couldn't handle the fault,
          * make sure we exit gracefully rather than endlessly redo
-         * the fault.
+         * the fault:
          */
         fault = handle_mm_fault(mm, vma, address, write);
+
         if (unlikely(fault & VM_FAULT_ERROR)) {
-                if (fault & VM_FAULT_OOM)
-                        goto out_of_memory;
-                else if (fault & VM_FAULT_SIGBUS)
-                        goto do_sigbus;
-                BUG();
+                mm_fault_error(regs, error_code, address, fault);
+                return;
         }
+
         if (fault & VM_FAULT_MAJOR)
                 tsk->maj_flt++;
         else
                 tsk->min_flt++;
 
-#ifdef CONFIG_X86_32
-        /*
-         * Did it hit the DOS screen memory VA from vm86 mode?
-         */
-        if (v8086_mode(regs)) {
-                unsigned long bit = (address - 0xA0000) >> PAGE_SHIFT;
-                if (bit < 32)
-                        tsk->thread.screen_bitmap |= 1 << bit;
-        }
-#endif
-        up_read(&mm->mmap_sem);
-        return;
+        check_v8086_mode(regs, address, tsk);
 
-/*
- * Something tried to access memory that isn't in our memory map..
- * Fix it, but check if it's kernel or user first..
- */
-bad_area:
         up_read(&mm->mmap_sem);
-
-bad_area_nosemaphore:
-        /* User mode accesses just cause a SIGSEGV */
-        if (error_code & PF_USER) {
-                /*
-                 * It's possible to have interrupts off here.
-                 */
-                local_irq_enable();
-
-                /*
-                 * Valid to do another page fault here because this one came
-                 * from user space.
-                 */
-                if (is_prefetch(regs, address, error_code))
-                        return;
-
-                if (is_errata100(regs, address))
-                        return;
-
-                if (show_unhandled_signals && unhandled_signal(tsk, SIGSEGV) &&
-                    printk_ratelimit()) {
-                        printk(
-                        "%s%s[%d]: segfault at %lx ip %p sp %p error %lx",
-                        task_pid_nr(tsk) > 1 ? KERN_INFO : KERN_EMERG,
-                        tsk->comm, task_pid_nr(tsk), address,
-                        (void *) regs->ip, (void *) regs->sp, error_code);
-                        print_vma_addr(" in ", regs->ip);
-                        printk("\n");
-                }
-
-                tsk->thread.cr2 = address;
-                /* Kernel addresses are always protection faults */
-                tsk->thread.error_code = error_code | (address >= TASK_SIZE);
-                tsk->thread.trap_no = 14;
-                force_sig_info_fault(SIGSEGV, si_code, address, tsk);
-                return;
-        }
-
-        if (is_f00f_bug(regs, address))
-                return;
-
-no_context:
-        /* Are we prepared to handle this kernel fault?  */
-        if (fixup_exception(regs))
-                return;
-
-        /*
-         * X86_32
-         * Valid to do another page fault here, because if this fault
-         * had been triggered by is_prefetch fixup_exception would have
-         * handled it.
-         *
-         * X86_64
-         * Hall of shame of CPU/BIOS bugs.
-         */
-        if (is_prefetch(regs, address, error_code))
-                return;
-
-        if (is_errata93(regs, address))
-                return;
-
-/*
- * Oops. The kernel tried to access some bad page. We'll have to
- * terminate things with extreme prejudice.
- */
-#ifdef CONFIG_X86_32
-        bust_spinlocks(1);
-#else
-        flags = oops_begin();
-#endif
-
-        show_fault_oops(regs, error_code, address);
-
-        tsk->thread.cr2 = address;
-        tsk->thread.trap_no = 14;
-        tsk->thread.error_code = error_code;
-
-#ifdef CONFIG_X86_32
-        die("Oops", regs, error_code);
-        bust_spinlocks(0);
-        do_exit(SIGKILL);
-#else
-        sig = SIGKILL;
-        if (__die("Oops", regs, error_code))
-                sig = 0;
-        /* Executive summary in case the body of the oops scrolled away */
-        printk(KERN_EMERG "CR2: %016lx\n", address);
-        oops_end(flags, regs, sig);
-#endif
-
-out_of_memory:
-        /*
-         * We ran out of memory, call the OOM killer, and return the userspace
-         * (which will retry the fault, or kill us if we got oom-killed).
-         */
-        up_read(&mm->mmap_sem);
-        pagefault_out_of_memory();
-        return;
-
-do_sigbus:
-        up_read(&mm->mmap_sem);
-
-        /* Kernel mode? Handle exceptions or die */
-        if (!(error_code & PF_USER))
-                goto no_context;
-#ifdef CONFIG_X86_32
-        /* User space => ok to do another page fault */
-        if (is_prefetch(regs, address, error_code))
-                return;
-#endif
-        tsk->thread.cr2 = address;
-        tsk->thread.error_code = error_code;
-        tsk->thread.trap_no = 14;
-        force_sig_info_fault(SIGBUS, BUS_ADRERR, address, tsk);
-}
-
-DEFINE_SPINLOCK(pgd_lock);
-LIST_HEAD(pgd_list);
-
-void vmalloc_sync_all(void)
-{
-        unsigned long address;
-
-#ifdef CONFIG_X86_32
-        if (SHARED_KERNEL_PMD)
-                return;
-
-        for (address = VMALLOC_START & PMD_MASK;
-             address >= TASK_SIZE && address < FIXADDR_TOP;
-             address += PMD_SIZE) {
-                unsigned long flags;
-                struct page *page;
-
-                spin_lock_irqsave(&pgd_lock, flags);
-                list_for_each_entry(page, &pgd_list, lru) {
-                        if (!vmalloc_sync_one(page_address(page),
-                                              address))
-                                break;
-                }
-                spin_unlock_irqrestore(&pgd_lock, flags);
-        }
-#else /* CONFIG_X86_64 */
-        for (address = VMALLOC_START & PGDIR_MASK; address <= VMALLOC_END;
-             address += PGDIR_SIZE) {
-                const pgd_t *pgd_ref = pgd_offset_k(address);
-                unsigned long flags;
-                struct page *page;
-
-                if (pgd_none(*pgd_ref))
-                        continue;
-                spin_lock_irqsave(&pgd_lock, flags);
-                list_for_each_entry(page, &pgd_list, lru) {
-                        pgd_t *pgd;
-                        pgd = (pgd_t *)page_address(page) + pgd_index(address);
-                        if (pgd_none(*pgd))
-                                set_pgd(pgd, *pgd_ref);
-                        else
-                                BUG_ON(pgd_page_vaddr(*pgd) != pgd_page_vaddr(*pgd_ref));
-                }
-                spin_unlock_irqrestore(&pgd_lock, flags);
-        }
-#endif
 }
diff --git a/arch/x86/mm/highmem_32.c b/arch/x86/mm/highmem_32.c
index bcc079c282dd..00f127c80b0e 100644
--- a/arch/x86/mm/highmem_32.c
+++ b/arch/x86/mm/highmem_32.c
@@ -1,5 +1,6 @@
 #include <linux/highmem.h>
 #include <linux/module.h>
+#include <linux/swap.h> /* for totalram_pages */
 
 void *kmap(struct page *page)
 {
@@ -156,3 +157,36 @@ EXPORT_SYMBOL(kmap);
 EXPORT_SYMBOL(kunmap);
 EXPORT_SYMBOL(kmap_atomic);
 EXPORT_SYMBOL(kunmap_atomic);
+
+#ifdef CONFIG_NUMA
+void __init set_highmem_pages_init(void)
+{
+        struct zone *zone;
+        int nid;
+
+        for_each_zone(zone) {
+                unsigned long zone_start_pfn, zone_end_pfn;
+
+                if (!is_highmem(zone))
+                        continue;
+
+                zone_start_pfn = zone->zone_start_pfn;
+                zone_end_pfn = zone_start_pfn + zone->spanned_pages;
+
+                nid = zone_to_nid(zone);
+                printk(KERN_INFO "Initializing %s for node %d (%08lx:%08lx)\n",
+                                zone->name, nid, zone_start_pfn, zone_end_pfn);
+
+                add_highpages_with_active_regions(nid, zone_start_pfn,
+                                 zone_end_pfn);
+        }
+        totalram_pages += totalhigh_pages;
+}
+#else
+void __init set_highmem_pages_init(void)
+{
+        add_highpages_with_active_regions(0, highstart_pfn, highend_pfn);
+
+        totalram_pages += totalhigh_pages;
+}
+#endif /* CONFIG_NUMA */
diff --git a/arch/x86/mm/init.c b/arch/x86/mm/init.c
new file mode 100644
index 000000000000..ce6a722587d8
--- /dev/null
+++ b/arch/x86/mm/init.c
@@ -0,0 +1,49 @@
+#include <linux/swap.h>
+#include <asm/cacheflush.h>
+#include <asm/page.h>
+#include <asm/sections.h>
+#include <asm/system.h>
+
+void free_init_pages(char *what, unsigned long begin, unsigned long end)
+{
+        unsigned long addr = begin;
+
+        if (addr >= end)
+                return;
+
+        /*
+         * If debugging page accesses then do not free this memory but
+         * mark them not present - any buggy init-section access will
+         * create a kernel page fault:
+         */
+#ifdef CONFIG_DEBUG_PAGEALLOC
+        printk(KERN_INFO "debug: unmapping init memory %08lx..%08lx\n",
+                begin, PAGE_ALIGN(end));
+        set_memory_np(begin, (end - begin) >> PAGE_SHIFT);
+#else
+        /*
+         * We just marked the kernel text read only above, now that
+         * we are going to free part of that, we need to make that
+         * writeable first.
+         */
+        set_memory_rw(begin, (end - begin) >> PAGE_SHIFT);
+
+        printk(KERN_INFO "Freeing %s: %luk freed\n", what, (end - begin) >> 10);
+
+        for (; addr < end; addr += PAGE_SIZE) {
+                ClearPageReserved(virt_to_page(addr));
+                init_page_count(virt_to_page(addr));
+                memset((void *)(addr & ~(PAGE_SIZE-1)),
+                        POISON_FREE_INITMEM, PAGE_SIZE);
+                free_page(addr);
+                totalram_pages++;
+        }
+#endif
+}
+
+void free_initmem(void)
+{
+        free_init_pages("unused kernel memory",
+                        (unsigned long)(&__init_begin),
+                        (unsigned long)(&__init_end));
+}
diff --git a/arch/x86/mm/init_32.c b/arch/x86/mm/init_32.c
index 2cef05074413..47df0e1bbeb9 100644
--- a/arch/x86/mm/init_32.c
+++ b/arch/x86/mm/init_32.c
@@ -49,9 +49,6 @@
 #include <asm/paravirt.h>
 #include <asm/setup.h>
 #include <asm/cacheflush.h>
-#include <asm/smp.h>
-
-unsigned int __VMALLOC_RESERVE = 128 << 20;
 
 unsigned long max_low_pfn_mapped;
 unsigned long max_pfn_mapped;
@@ -138,6 +135,23 @@ static pte_t * __init one_page_table_init(pmd_t *pmd)
         return pte_offset_kernel(pmd, 0);
 }
 
+pmd_t * __init populate_extra_pmd(unsigned long vaddr)
+{
+        int pgd_idx = pgd_index(vaddr);
+        int pmd_idx = pmd_index(vaddr);
+
+        return one_md_table_init(swapper_pg_dir + pgd_idx) + pmd_idx;
+}
+
+pte_t * __init populate_extra_pte(unsigned long vaddr)
+{
+        int pte_idx = pte_index(vaddr);
+        pmd_t *pmd;
+
+        pmd = populate_extra_pmd(vaddr);
+        return one_page_table_init(pmd) + pte_idx;
+}
+
 static pte_t *__init page_table_kmap_check(pte_t *pte, pmd_t *pmd,
                                            unsigned long vaddr, pte_t *lastpte)
 {
@@ -470,22 +484,10 @@ void __init add_highpages_with_active_regions(int nid, unsigned long start_pfn,
         work_with_active_regions(nid, add_highpages_work_fn, &data);
 }
 
-#ifndef CONFIG_NUMA
-static void __init set_highmem_pages_init(void)
-{
-        add_highpages_with_active_regions(0, highstart_pfn, highend_pfn);
-
-        totalram_pages += totalhigh_pages;
-}
-#endif /* !CONFIG_NUMA */
-
 #else
 static inline void permanent_kmaps_init(pgd_t *pgd_base)
 {
 }
-static inline void set_highmem_pages_init(void)
-{
-}
 #endif /* CONFIG_HIGHMEM */
 
 void __init native_pagetable_setup_start(pgd_t *base)
@@ -675,75 +677,97 @@ static int __init parse_highmem(char *arg)
 }
 early_param("highmem", parse_highmem);
 
+#define MSG_HIGHMEM_TOO_BIG \
+        "highmem size (%luMB) is bigger than pages available (%luMB)!\n"
+
+#define MSG_LOWMEM_TOO_SMALL \
+        "highmem size (%luMB) results in <64MB lowmem, ignoring it!\n"
 /*
- * Determine low and high memory ranges:
+ * All of RAM fits into lowmem - but if user wants highmem
+ * artificially via the highmem=x boot parameter then create
+ * it:
  */
-void __init find_low_pfn_range(void)
+void __init lowmem_pfn_init(void)
 {
-        /* it could update max_pfn */
-
         /* max_low_pfn is 0, we already have early_res support */
-
         max_low_pfn = max_pfn;
-        if (max_low_pfn > MAXMEM_PFN) {
-                if (highmem_pages == -1)
-                        highmem_pages = max_pfn - MAXMEM_PFN;
-                if (highmem_pages + MAXMEM_PFN < max_pfn)
-                        max_pfn = MAXMEM_PFN + highmem_pages;
-                if (highmem_pages + MAXMEM_PFN > max_pfn) {
-                        printk(KERN_WARNING "only %luMB highmem pages "
-                                "available, ignoring highmem size of %uMB.\n",
-                                pages_to_mb(max_pfn - MAXMEM_PFN),
+
+        if (highmem_pages == -1)
+                highmem_pages = 0;
+#ifdef CONFIG_HIGHMEM
+        if (highmem_pages >= max_pfn) {
+                printk(KERN_ERR MSG_HIGHMEM_TOO_BIG,
+                        pages_to_mb(highmem_pages), pages_to_mb(max_pfn));
+                highmem_pages = 0;
+        }
+        if (highmem_pages) {
+                if (max_low_pfn - highmem_pages < 64*1024*1024/PAGE_SIZE) {
+                        printk(KERN_ERR MSG_LOWMEM_TOO_SMALL,
                                 pages_to_mb(highmem_pages));
                         highmem_pages = 0;
                 }
-                max_low_pfn = MAXMEM_PFN;
+                max_low_pfn -= highmem_pages;
+        }
+#else
+        if (highmem_pages)
+                printk(KERN_ERR "ignoring highmem size on non-highmem kernel!\n");
+#endif
+}
+
+#define MSG_HIGHMEM_TOO_SMALL \
+        "only %luMB highmem pages available, ignoring highmem size of %luMB!\n"
+
+#define MSG_HIGHMEM_TRIMMED \
+        "Warning: only 4GB will be used. Use a HIGHMEM64G enabled kernel!\n"
+/*
+ * We have more RAM than fits into lowmem - we try to put it into
+ * highmem, also taking the highmem=x boot parameter into account:
+ */
+void __init highmem_pfn_init(void)
+{
+        max_low_pfn = MAXMEM_PFN;
+
+        if (highmem_pages == -1)
+                highmem_pages = max_pfn - MAXMEM_PFN;
+
+        if (highmem_pages + MAXMEM_PFN < max_pfn)
+                max_pfn = MAXMEM_PFN + highmem_pages;
+
+        if (highmem_pages + MAXMEM_PFN > max_pfn) {
+                printk(KERN_WARNING MSG_HIGHMEM_TOO_SMALL,
+                        pages_to_mb(max_pfn - MAXMEM_PFN),
+                        pages_to_mb(highmem_pages));
+                highmem_pages = 0;
+        }
 #ifndef CONFIG_HIGHMEM
-                /* Maximum memory usable is what is directly addressable */
-                printk(KERN_WARNING "Warning only %ldMB will be used.\n",
-                                        MAXMEM>>20);
-                if (max_pfn > MAX_NONPAE_PFN)
-                        printk(KERN_WARNING
-                                 "Use a HIGHMEM64G enabled kernel.\n");
-                else
-                        printk(KERN_WARNING "Use a HIGHMEM enabled kernel.\n");
-                max_pfn = MAXMEM_PFN;
+        /* Maximum memory usable is what is directly addressable */
+        printk(KERN_WARNING "Warning only %ldMB will be used.\n", MAXMEM>>20);
+        if (max_pfn > MAX_NONPAE_PFN)
+                printk(KERN_WARNING "Use a HIGHMEM64G enabled kernel.\n");
+        else
+                printk(KERN_WARNING "Use a HIGHMEM enabled kernel.\n");
+        max_pfn = MAXMEM_PFN;
 #else /* !CONFIG_HIGHMEM */
 #ifndef CONFIG_HIGHMEM64G
-                if (max_pfn > MAX_NONPAE_PFN) {
-                        max_pfn = MAX_NONPAE_PFN;
-                        printk(KERN_WARNING "Warning only 4GB will be used."
-                                "Use a HIGHMEM64G enabled kernel.\n");
-                }
+        if (max_pfn > MAX_NONPAE_PFN) {
+                max_pfn = MAX_NONPAE_PFN;
+                printk(KERN_WARNING MSG_HIGHMEM_TRIMMED);
+        }
 #endif /* !CONFIG_HIGHMEM64G */
 #endif /* !CONFIG_HIGHMEM */
-        } else {
-                if (highmem_pages == -1)
-                        highmem_pages = 0;
-#ifdef CONFIG_HIGHMEM
-                if (highmem_pages >= max_pfn) {
-                        printk(KERN_ERR "highmem size specified (%uMB) is "
-                                "bigger than pages available (%luMB)!.\n",
-                                pages_to_mb(highmem_pages),
-                                pages_to_mb(max_pfn));
-                        highmem_pages = 0;
-                }
-                if (highmem_pages) {
-                        if (max_low_pfn - highmem_pages <
-                            64*1024*1024/PAGE_SIZE){
-                                printk(KERN_ERR "highmem size %uMB results in "
-                                "smaller than 64MB lowmem, ignoring it.\n"
-                                        , pages_to_mb(highmem_pages));
-                                highmem_pages = 0;
-                        }
-                        max_low_pfn -= highmem_pages;
-                }
-#else
-                if (highmem_pages)
-                        printk(KERN_ERR "ignoring highmem size on non-highmem"
-                                        " kernel!\n");
-#endif
-        }
+}
+
+/*
+ * Determine low and high memory ranges:
+ */
+void __init find_low_pfn_range(void)
+{
+        /* it could update max_pfn */
+
+        if (max_pfn <= MAXMEM_PFN)
+                lowmem_pfn_init();
+        else
+                highmem_pfn_init();
 }
 
 #ifndef CONFIG_NEED_MULTIPLE_NODES
@@ -826,10 +850,10 @@ static void __init find_early_table_space(unsigned long end, int use_pse)
         unsigned long puds, pmds, ptes, tables, start;
 
         puds = (end + PUD_SIZE - 1) >> PUD_SHIFT;
-        tables = PAGE_ALIGN(puds * sizeof(pud_t));
+        tables = roundup(puds * sizeof(pud_t), PAGE_SIZE);
 
         pmds = (end + PMD_SIZE - 1) >> PMD_SHIFT;
-        tables += PAGE_ALIGN(pmds * sizeof(pmd_t));
+        tables += roundup(pmds * sizeof(pmd_t), PAGE_SIZE);
 
         if (use_pse) {
                 unsigned long extra;
@@ -840,10 +864,10 @@ static void __init find_early_table_space(unsigned long end, int use_pse)
         } else
                 ptes = (end + PAGE_SIZE - 1) >> PAGE_SHIFT;
 
-        tables += PAGE_ALIGN(ptes * sizeof(pte_t));
+        tables += roundup(ptes * sizeof(pte_t), PAGE_SIZE);
 
         /* for fixmap */
-        tables += PAGE_ALIGN(__end_of_fixed_addresses * sizeof(pte_t));
+        tables += roundup(__end_of_fixed_addresses * sizeof(pte_t), PAGE_SIZE);
 
         /*
          * RED-PEN putting page tables only on node 0 could
@@ -1193,45 +1217,6 @@ void mark_rodata_ro(void)
 }
 #endif
 
-void free_init_pages(char *what, unsigned long begin, unsigned long end)
-{
-#ifdef CONFIG_DEBUG_PAGEALLOC
-        /*
-         * If debugging page accesses then do not free this memory but
-         * mark them not present - any buggy init-section access will
-         * create a kernel page fault:
-         */
-        printk(KERN_INFO "debug: unmapping init memory %08lx..%08lx\n",
-                begin, PAGE_ALIGN(end));
-        set_memory_np(begin, (end - begin) >> PAGE_SHIFT);
-#else
-        unsigned long addr;
-
-        /*
-         * We just marked the kernel text read only above, now that
-         * we are going to free part of that, we need to make that
-         * writeable first.
-         */
-        set_memory_rw(begin, (end - begin) >> PAGE_SHIFT);
-
-        for (addr = begin; addr < end; addr += PAGE_SIZE) {
-                ClearPageReserved(virt_to_page(addr));
-                init_page_count(virt_to_page(addr));
-                memset((void *)addr, POISON_FREE_INITMEM, PAGE_SIZE);
-                free_page(addr);
-                totalram_pages++;
-        }
-        printk(KERN_INFO "Freeing %s: %luk freed\n", what, (end - begin) >> 10);
-#endif
-}
-
-void free_initmem(void)
-{
-        free_init_pages("unused kernel memory",
-                        (unsigned long)(&__init_begin),
-                        (unsigned long)(&__init_end));
-}
-
 #ifdef CONFIG_BLK_DEV_INITRD
 void free_initrd_mem(unsigned long start, unsigned long end)
 {
diff --git a/arch/x86/mm/init_64.c b/arch/x86/mm/init_64.c
index b1352250096e..07f44d491df1 100644
--- a/arch/x86/mm/init_64.c
+++ b/arch/x86/mm/init_64.c
@@ -168,34 +168,51 @@ static __ref void *spp_getpage(void)
         return ptr;
 }
 
-void
-set_pte_vaddr_pud(pud_t *pud_page, unsigned long vaddr, pte_t new_pte)
+static pud_t *fill_pud(pgd_t *pgd, unsigned long vaddr)
 {
-        pud_t *pud;
-        pmd_t *pmd;
-        pte_t *pte;
+        if (pgd_none(*pgd)) {
+                pud_t *pud = (pud_t *)spp_getpage();
+                pgd_populate(&init_mm, pgd, pud);
+                if (pud != pud_offset(pgd, 0))
+                        printk(KERN_ERR "PAGETABLE BUG #00! %p <-> %p\n",
+                               pud, pud_offset(pgd, 0));
+        }
+        return pud_offset(pgd, vaddr);
+}
 
-        pud = pud_page + pud_index(vaddr);
+static pmd_t *fill_pmd(pud_t *pud, unsigned long vaddr)
+{
         if (pud_none(*pud)) {
-                pmd = (pmd_t *) spp_getpage();
+                pmd_t *pmd = (pmd_t *) spp_getpage();
                 pud_populate(&init_mm, pud, pmd);
-                if (pmd != pmd_offset(pud, 0)) {
+                if (pmd != pmd_offset(pud, 0))
                         printk(KERN_ERR "PAGETABLE BUG #01! %p <-> %p\n",
-                                pmd, pmd_offset(pud, 0));
-                        return;
-                }
+                               pmd, pmd_offset(pud, 0));
         }
-        pmd = pmd_offset(pud, vaddr);
+        return pmd_offset(pud, vaddr);
+}
+
+static pte_t *fill_pte(pmd_t *pmd, unsigned long vaddr)
+{
         if (pmd_none(*pmd)) {
-                pte = (pte_t *) spp_getpage();
+                pte_t *pte = (pte_t *) spp_getpage();
                 pmd_populate_kernel(&init_mm, pmd, pte);
-                if (pte != pte_offset_kernel(pmd, 0)) {
+                if (pte != pte_offset_kernel(pmd, 0))
                         printk(KERN_ERR "PAGETABLE BUG #02!\n");
-                        return;
-                }
         }
+        return pte_offset_kernel(pmd, vaddr);
+}
+
+void set_pte_vaddr_pud(pud_t *pud_page, unsigned long vaddr, pte_t new_pte)
+{
+        pud_t *pud;
+        pmd_t *pmd;
+        pte_t *pte;
+
+        pud = pud_page + pud_index(vaddr);
+        pmd = fill_pmd(pud, vaddr);
+        pte = fill_pte(pmd, vaddr);
 
-        pte = pte_offset_kernel(pmd, vaddr);
         set_pte(pte, new_pte);
 
         /*
@@ -205,8 +222,7 @@ set_pte_vaddr_pud(pud_t *pud_page, unsigned long vaddr, pte_t new_pte)
         __flush_tlb_one(vaddr);
 }
 
-void
-set_pte_vaddr(unsigned long vaddr, pte_t pteval)
+void set_pte_vaddr(unsigned long vaddr, pte_t pteval)
 {
         pgd_t *pgd;
         pud_t *pud_page;
@@ -223,6 +239,24 @@ set_pte_vaddr(unsigned long vaddr, pte_t pteval)
         set_pte_vaddr_pud(pud_page, vaddr, pteval);
 }
 
+pmd_t * __init populate_extra_pmd(unsigned long vaddr)
+{
+        pgd_t *pgd;
+        pud_t *pud;
+
+        pgd = pgd_offset_k(vaddr);
+        pud = fill_pud(pgd, vaddr);
+        return fill_pmd(pud, vaddr);
+}
+
+pte_t * __init populate_extra_pte(unsigned long vaddr)
+{
+        pmd_t *pmd;
+
+        pmd = populate_extra_pmd(vaddr);
+        return fill_pte(pmd, vaddr);
+}
+
 /*
  * Create large page table mappings for a range of physical addresses.
  */
@@ -947,43 +981,6 @@ void __init mem_init(void)
                 initsize >> 10);
 }
 
-void free_init_pages(char *what, unsigned long begin, unsigned long end)
-{
-        unsigned long addr = begin;
-
-        if (addr >= end)
-                return;
-
-        /*
-         * If debugging page accesses then do not free this memory but
-         * mark them not present - any buggy init-section access will
-         * create a kernel page fault:
-         */
-#ifdef CONFIG_DEBUG_PAGEALLOC
-        printk(KERN_INFO "debug: unmapping init memory %08lx..%08lx\n",
-                begin, PAGE_ALIGN(end));
-        set_memory_np(begin, (end - begin) >> PAGE_SHIFT);
-#else
-        printk(KERN_INFO "Freeing %s: %luk freed\n", what, (end - begin) >> 10);
-
-        for (; addr < end; addr += PAGE_SIZE) {
-                ClearPageReserved(virt_to_page(addr));
-                init_page_count(virt_to_page(addr));
-                memset((void *)(addr & ~(PAGE_SIZE-1)),
-                        POISON_FREE_INITMEM, PAGE_SIZE);
-                free_page(addr);
-                totalram_pages++;
-        }
-#endif
-}
-
-void free_initmem(void)
-{
-        free_init_pages("unused kernel memory",
-                        (unsigned long)(&__init_begin),
-                        (unsigned long)(&__init_end));
-}
-
 #ifdef CONFIG_DEBUG_RODATA
 const int rodata_test_data = 0xC3;
 EXPORT_SYMBOL_GPL(rodata_test_data);
diff --git a/arch/x86/mm/ioremap.c b/arch/x86/mm/ioremap.c
index f45d5e29a72e..433f7bd4648a 100644
--- a/arch/x86/mm/ioremap.c
+++ b/arch/x86/mm/ioremap.c
@@ -348,7 +348,7 @@ EXPORT_SYMBOL(ioremap_nocache);
  *
  * Must be freed with iounmap.
  */
-void __iomem *ioremap_wc(unsigned long phys_addr, unsigned long size)
+void __iomem *ioremap_wc(resource_size_t phys_addr, unsigned long size)
 {
         if (pat_enabled)
                 return __ioremap_caller(phys_addr, size, _PAGE_CACHE_WC,
diff --git a/arch/x86/mm/memtest.c b/arch/x86/mm/memtest.c
index 9cab18b0b857..0bcd7883d036 100644
--- a/arch/x86/mm/memtest.c
+++ b/arch/x86/mm/memtest.c
@@ -9,44 +9,44 @@
 
 #include <asm/e820.h>
 
-static void __init memtest(unsigned long start_phys, unsigned long size,
-                                 unsigned pattern)
+static u64 patterns[] __initdata = {
+        0,
+        0xffffffffffffffffULL,
+        0x5555555555555555ULL,
+        0xaaaaaaaaaaaaaaaaULL,
+        0x1111111111111111ULL,
+        0x2222222222222222ULL,
+        0x4444444444444444ULL,
+        0x8888888888888888ULL,
+        0x3333333333333333ULL,
+        0x6666666666666666ULL,
+        0x9999999999999999ULL,
+        0xccccccccccccccccULL,
+        0x7777777777777777ULL,
+        0xbbbbbbbbbbbbbbbbULL,
+        0xddddddddddddddddULL,
+        0xeeeeeeeeeeeeeeeeULL,
+        0x7a6c7258554e494cULL, /* yeah ;-) */
+};
+
+static void __init reserve_bad_mem(u64 pattern, u64 start_bad, u64 end_bad)
 {
-        unsigned long i;
-        unsigned long *start;
-        unsigned long start_bad;
-        unsigned long last_bad;
-        unsigned long val;
-        unsigned long start_phys_aligned;
-        unsigned long count;
-        unsigned long incr;
-
-        switch (pattern) {
-        case 0:
-                val = 0UL;
-                break;
-        case 1:
-                val = -1UL;
-                break;
-        case 2:
-#ifdef CONFIG_X86_64
-                val = 0x5555555555555555UL;
-#else
-                val = 0x55555555UL;
-#endif
-                break;
-        case 3:
-#ifdef CONFIG_X86_64
-                val = 0xaaaaaaaaaaaaaaaaUL;
-#else
-                val = 0xaaaaaaaaUL;
-#endif
-                break;
-        default:
-                return;
-        }
+        printk(KERN_INFO "  %016llx bad mem addr %010llx - %010llx reserved\n",
+               (unsigned long long) pattern,
+               (unsigned long long) start_bad,
+               (unsigned long long) end_bad);
+        reserve_early(start_bad, end_bad, "BAD RAM");
+}
 
-        incr = sizeof(unsigned long);
+static void __init memtest(u64 pattern, u64 start_phys, u64 size)
+{
+        u64 i, count;
+        u64 *start;
+        u64 start_bad, last_bad;
+        u64 start_phys_aligned;
+        size_t incr;
+
+        incr = sizeof(pattern);
         start_phys_aligned = ALIGN(start_phys, incr);
         count = (size - (start_phys_aligned - start_phys))/incr;
         start = __va(start_phys_aligned);
@@ -54,25 +54,42 @@ static void __init memtest(unsigned long start_phys, unsigned long size,
         last_bad = 0;
 
         for (i = 0; i < count; i++)
-                start[i] = val;
+                start[i] = pattern;
         for (i = 0; i < count; i++, start++, start_phys_aligned += incr) {
-                if (*start != val) {
-                        if (start_phys_aligned == last_bad + incr) {
-                                last_bad += incr;
-                        } else {
-                                if (start_bad) {
-                                        printk(KERN_CONT "\n  %016lx bad mem addr %010lx - %010lx reserved",
-                                                val, start_bad, last_bad + incr);
-                                        reserve_early(start_bad, last_bad + incr, "BAD RAM");
-                                }
-                                start_bad = last_bad = start_phys_aligned;
-                        }
+                if (*start == pattern)
+                        continue;
+                if (start_phys_aligned == last_bad + incr) {
+                        last_bad += incr;
+                        continue;
                 }
+                if (start_bad)
+                        reserve_bad_mem(pattern, start_bad, last_bad + incr);
+                start_bad = last_bad = start_phys_aligned;
         }
-        if (start_bad) {
-                printk(KERN_CONT "\n  %016lx bad mem addr %010lx - %010lx reserved",
-                        val, start_bad, last_bad + incr);
-                reserve_early(start_bad, last_bad + incr, "BAD RAM");
+        if (start_bad)
+                reserve_bad_mem(pattern, start_bad, last_bad + incr);
+}
+
+static void __init do_one_pass(u64 pattern, u64 start, u64 end)
+{
+        u64 size = 0;
+
+        while (start < end) {
+                start = find_e820_area_size(start, &size, 1);
+
+                /* done ? */
+                if (start >= end)
+                        break;
+                if (start + size > end)
+                        size = end - start;
+
+                printk(KERN_INFO "  %010llx - %010llx pattern %016llx\n",
+                       (unsigned long long) start,
+                       (unsigned long long) start + size,
+                       (unsigned long long) cpu_to_be64(pattern));
+                memtest(pattern, start, size);
+
+                start += size;
         }
 }
 
@@ -90,33 +107,22 @@ early_param("memtest", parse_memtest);
 
 void __init early_memtest(unsigned long start, unsigned long end)
 {
-        u64 t_start, t_size;
-        unsigned pattern;
+        unsigned int i;
+        unsigned int idx = 0;
 
         if (!memtest_pattern)
                 return;
 
-        printk(KERN_INFO "early_memtest: pattern num %d", memtest_pattern);
-        for (pattern = 0; pattern < memtest_pattern; pattern++) {
-                t_start = start;
-                t_size = 0;
-                while (t_start < end) {
-                        t_start = find_e820_area_size(t_start, &t_size, 1);
-
-                        /* done ? */
-                        if (t_start >= end)
-                                break;
-                        if (t_start + t_size > end)
-                                t_size = end - t_start;
-
-                        printk(KERN_CONT "\n  %010llx - %010llx pattern %d",
-                                (unsigned long long)t_start,
-                                (unsigned long long)t_start + t_size, pattern);
-
-                        memtest(t_start, t_size, pattern);
+        printk(KERN_INFO "early_memtest: # of tests: %d\n", memtest_pattern);
+        for (i = 0; i < memtest_pattern; i++) {
+                idx = i % ARRAY_SIZE(patterns);
+                do_one_pass(patterns[idx], start, end);
+        }
 
-                        t_start += t_size;
-                }
+        if (idx > 0) {
+                printk(KERN_INFO "early_memtest: wipe out "
+                       "test pattern from memory\n");
+                /* additional test with pattern 0 will do this */
+                do_one_pass(0, start, end);
         }
-        printk(KERN_CONT "\n");
 }
diff --git a/arch/x86/mm/mmap.c b/arch/x86/mm/mmap.c
index 56fe7124fbec..165829600566 100644
--- a/arch/x86/mm/mmap.c
+++ b/arch/x86/mm/mmap.c
@@ -4,7 +4,7 @@
  * Based on code by Ingo Molnar and Andi Kleen, copyrighted
  * as follows:
  *
- * Copyright 2003-2004 Red Hat Inc., Durham, North Carolina.
+ * Copyright 2003-2009 Red Hat Inc.
  * All Rights Reserved.
  * Copyright 2005 Andi Kleen, SUSE Labs.
  * Copyright 2007 Jiri Kosina, SUSE Labs.
diff --git a/arch/x86/mm/numa_32.c b/arch/x86/mm/numa_32.c
index d1f7439d173c..451fe95a0352 100644
--- a/arch/x86/mm/numa_32.c
+++ b/arch/x86/mm/numa_32.c
@@ -194,7 +194,7 @@ void *alloc_remap(int nid, unsigned long size)
         size = ALIGN(size, L1_CACHE_BYTES);
 
         if (!allocation || (allocation + size) >= node_remap_end_vaddr[nid])
-                return 0;
+                return NULL;
 
         node_remap_alloc_vaddr[nid] += size;
         memset(allocation, 0, size);
@@ -423,32 +423,6 @@ void __init initmem_init(unsigned long start_pfn,
         setup_bootmem_allocator();
 }
 
-void __init set_highmem_pages_init(void)
-{
-#ifdef CONFIG_HIGHMEM
-        struct zone *zone;
-        int nid;
-
-        for_each_zone(zone) {
-                unsigned long zone_start_pfn, zone_end_pfn;
-
-                if (!is_highmem(zone))
-                        continue;
-
-                zone_start_pfn = zone->zone_start_pfn;
-                zone_end_pfn = zone_start_pfn + zone->spanned_pages;
-
-                nid = zone_to_nid(zone);
-                printk(KERN_INFO "Initializing %s for node %d (%08lx:%08lx)\n",
-                                zone->name, nid, zone_start_pfn, zone_end_pfn);
-
-                add_highpages_with_active_regions(nid, zone_start_pfn,
-                                 zone_end_pfn);
-        }
-        totalram_pages += totalhigh_pages;
-#endif
-}
-
 #ifdef CONFIG_MEMORY_HOTPLUG
 static int paddr_to_nid(u64 addr)
 {
diff --git a/arch/x86/mm/numa_64.c b/arch/x86/mm/numa_64.c
index f3516da035d1..64c9cf043cdd 100644
--- a/arch/x86/mm/numa_64.c
+++ b/arch/x86/mm/numa_64.c
@@ -20,6 +20,12 @@
 #include <asm/acpi.h>
 #include <asm/k8.h>
 
+#ifdef CONFIG_DEBUG_PER_CPU_MAPS
+# define DBG(x...) printk(KERN_DEBUG x)
+#else
+# define DBG(x...)
+#endif
+
 struct pglist_data *node_data[MAX_NUMNODES] __read_mostly;
 EXPORT_SYMBOL(node_data);
 
@@ -33,6 +39,21 @@ int numa_off __initdata;
 static unsigned long __initdata nodemap_addr;
 static unsigned long __initdata nodemap_size;
 
+DEFINE_PER_CPU(int, node_number) = 0;
+EXPORT_PER_CPU_SYMBOL(node_number);
+
+/*
+ * Map cpu index to node index
+ */
+DEFINE_EARLY_PER_CPU(int, x86_cpu_to_node_map, NUMA_NO_NODE);
+EXPORT_EARLY_PER_CPU_SYMBOL(x86_cpu_to_node_map);
+
+/*
+ * Which logical CPUs are on which nodes
+ */
+cpumask_t *node_to_cpumask_map;
+EXPORT_SYMBOL(node_to_cpumask_map);
+
 /*
  * Given a shift value, try to populate memnodemap[]
  * Returns :
@@ -640,3 +661,199 @@ void __init init_cpu_to_node(void)
 #endif
 
 
+/*
+ * Allocate node_to_cpumask_map based on number of available nodes
+ * Requires node_possible_map to be valid.
+ *
+ * Note: node_to_cpumask() is not valid until after this is done.
+ * (Use CONFIG_DEBUG_PER_CPU_MAPS to check this.)
+ */
+void __init setup_node_to_cpumask_map(void)
+{
+        unsigned int node, num = 0;
+        cpumask_t *map;
+
+        /* setup nr_node_ids if not done yet */
+        if (nr_node_ids == MAX_NUMNODES) {
+                for_each_node_mask(node, node_possible_map)
+                        num = node;
+                nr_node_ids = num + 1;
+        }
+
+        /* allocate the map */
+        map = alloc_bootmem_low(nr_node_ids * sizeof(cpumask_t));
+        DBG("node_to_cpumask_map at %p for %d nodes\n", map, nr_node_ids);
+
+        pr_debug("Node to cpumask map at %p for %d nodes\n",
+                 map, nr_node_ids);
+
+        /* node_to_cpumask() will now work */
+        node_to_cpumask_map = map;
+}
+
+void __cpuinit numa_set_node(int cpu, int node)
+{
+        int *cpu_to_node_map = early_per_cpu_ptr(x86_cpu_to_node_map);
+
+        /* early setting, no percpu area yet */
+        if (cpu_to_node_map) {
+                cpu_to_node_map[cpu] = node;
+                return;
+        }
+
+#ifdef CONFIG_DEBUG_PER_CPU_MAPS
+        if (cpu >= nr_cpu_ids || !cpu_possible(cpu)) {
+                printk(KERN_ERR "numa_set_node: invalid cpu# (%d)\n", cpu);
+                dump_stack();
+                return;
+        }
+#endif
+        per_cpu(x86_cpu_to_node_map, cpu) = node;
+
+        if (node != NUMA_NO_NODE)
+                per_cpu(node_number, cpu) = node;
+}
+
+void __cpuinit numa_clear_node(int cpu)
+{
+        numa_set_node(cpu, NUMA_NO_NODE);
+}
+
+#ifndef CONFIG_DEBUG_PER_CPU_MAPS
+
+void __cpuinit numa_add_cpu(int cpu)
+{
+        cpu_set(cpu, node_to_cpumask_map[early_cpu_to_node(cpu)]);
+}
+
+void __cpuinit numa_remove_cpu(int cpu)
+{
+        cpu_clear(cpu, node_to_cpumask_map[early_cpu_to_node(cpu)]);
+}
+
+#else /* CONFIG_DEBUG_PER_CPU_MAPS */
+
+/*
+ * --------- debug versions of the numa functions ---------
+ */
+static void __cpuinit numa_set_cpumask(int cpu, int enable)
+{
+        int node = early_cpu_to_node(cpu);
+        cpumask_t *mask;
+        char buf[64];
+
+        if (node_to_cpumask_map == NULL) {
+                printk(KERN_ERR "node_to_cpumask_map NULL\n");
+                dump_stack();
+                return;
+        }
+
+        mask = &node_to_cpumask_map[node];
+        if (enable)
+                cpu_set(cpu, *mask);
+        else
+                cpu_clear(cpu, *mask);
+
+        cpulist_scnprintf(buf, sizeof(buf), mask);
+        printk(KERN_DEBUG "%s cpu %d node %d: mask now %s\n",
+                enable ? "numa_add_cpu" : "numa_remove_cpu", cpu, node, buf);
+}
+
+void __cpuinit numa_add_cpu(int cpu)
+{
+        numa_set_cpumask(cpu, 1);
+}
+
+void __cpuinit numa_remove_cpu(int cpu)
+{
+        numa_set_cpumask(cpu, 0);
+}
+
+int cpu_to_node(int cpu)
+{
+        if (early_per_cpu_ptr(x86_cpu_to_node_map)) {
+                printk(KERN_WARNING
+                        "cpu_to_node(%d): usage too early!\n", cpu);
+                dump_stack();
+                return early_per_cpu_ptr(x86_cpu_to_node_map)[cpu];
+        }
+        return per_cpu(x86_cpu_to_node_map, cpu);
+}
+EXPORT_SYMBOL(cpu_to_node);
+
+/*
+ * Same function as cpu_to_node() but used if called before the
+ * per_cpu areas are setup.
+ */
+int early_cpu_to_node(int cpu)
+{
+        if (early_per_cpu_ptr(x86_cpu_to_node_map))
+                return early_per_cpu_ptr(x86_cpu_to_node_map)[cpu];
+
+        if (!cpu_possible(cpu)) {
+                printk(KERN_WARNING
+                        "early_cpu_to_node(%d): no per_cpu area!\n", cpu);
+                dump_stack();
+                return NUMA_NO_NODE;
+        }
+        return per_cpu(x86_cpu_to_node_map, cpu);
+}
+
+
+/* empty cpumask */
+static const cpumask_t cpu_mask_none;
+
+/*
+ * Returns a pointer to the bitmask of CPUs on Node 'node'.
+ */
+const cpumask_t *cpumask_of_node(int node)
+{
+        if (node_to_cpumask_map == NULL) {
+                printk(KERN_WARNING
+                        "cpumask_of_node(%d): no node_to_cpumask_map!\n",
+                        node);
+                dump_stack();
+                return (const cpumask_t *)&cpu_online_map;
+        }
+        if (node >= nr_node_ids) {
+                printk(KERN_WARNING
+                        "cpumask_of_node(%d): node > nr_node_ids(%d)\n",
+                        node, nr_node_ids);
+                dump_stack();
+                return &cpu_mask_none;
+        }
+        return &node_to_cpumask_map[node];
+}
+EXPORT_SYMBOL(cpumask_of_node);
+
+/*
+ * Returns a bitmask of CPUs on Node 'node'.
+ *
+ * Side note: this function creates the returned cpumask on the stack
+ * so with a high NR_CPUS count, excessive stack space is used.  The
+ * node_to_cpumask_ptr function should be used whenever possible.
+ */
+cpumask_t node_to_cpumask(int node)
+{
+        if (node_to_cpumask_map == NULL) {
+                printk(KERN_WARNING
+                        "node_to_cpumask(%d): no node_to_cpumask_map!\n", node);
+                dump_stack();
+                return cpu_online_map;
+        }
+        if (node >= nr_node_ids) {
+                printk(KERN_WARNING
+                        "node_to_cpumask(%d): node > nr_node_ids(%d)\n",
+                        node, nr_node_ids);
+                dump_stack();
+                return cpu_mask_none;
+        }
+        return node_to_cpumask_map[node];
+}
+EXPORT_SYMBOL(node_to_cpumask);
+
+/*
+ * --------- end of debug versions of the numa functions ---------
+ */
+
+#endif /* CONFIG_DEBUG_PER_CPU_MAPS */
diff --git a/arch/x86/mm/pageattr.c b/arch/x86/mm/pageattr.c
index 7233bd7e357b..9c4294986af7 100644
--- a/arch/x86/mm/pageattr.c
+++ b/arch/x86/mm/pageattr.c
@@ -482,6 +482,13 @@ static int split_large_page(pte_t *kpte, unsigned long address)
         pbase = (pte_t *)page_address(base);
         paravirt_alloc_pte(&init_mm, page_to_pfn(base));
         ref_prot = pte_pgprot(pte_clrhuge(*kpte));
+        /*
+         * If we ever want to utilize the PAT bit, we need to
+         * update this function to make sure it's converted from
+         * bit 12 to bit 7 when we cross from the 2MB level to
+         * the 4K level:
+         */
+        WARN_ON_ONCE(pgprot_val(ref_prot) & _PAGE_PAT_LARGE);
 
 #ifdef CONFIG_X86_64
         if (level == PG_LEVEL_1G) {
diff --git a/arch/x86/mm/pat.c b/arch/x86/mm/pat.c
index e0ab173b6974..2ed37158012d 100644
--- a/arch/x86/mm/pat.c
+++ b/arch/x86/mm/pat.c
@@ -31,7 +31,7 @@
 #ifdef CONFIG_X86_PAT
 int __read_mostly pat_enabled = 1;
 
-void __cpuinit pat_disable(char *reason)
+void __cpuinit pat_disable(const char *reason)
 {
         pat_enabled = 0;
         printk(KERN_INFO "%s\n", reason);
@@ -43,6 +43,11 @@ static int __init nopat(char *str)
         return 0;
 }
 early_param("nopat", nopat);
+#else
+static inline void pat_disable(const char *reason)
+{
+        (void)reason;
+}
 #endif
 
 
@@ -79,16 +84,20 @@ void pat_init(void)
         if (!pat_enabled)
                 return;
 
-        /* Paranoia check. */
-        if (!cpu_has_pat && boot_pat_state) {
-                /*
-                 * If this happens we are on a secondary CPU, but
-                 * switched to PAT on the boot CPU. We have no way to
-                 * undo PAT.
-                 */
-                printk(KERN_ERR "PAT enabled, "
-                       "but not supported by secondary CPU\n");
-                BUG();
+        if (!cpu_has_pat) {
+                if (!boot_pat_state) {
+                        pat_disable("PAT not supported by CPU.");
+                        return;
+                } else {
+                        /*
+                         * If this happens we are on a secondary CPU, but
+                         * switched to PAT on the boot CPU. We have no way to
+                         * undo PAT.
+                         */
+                        printk(KERN_ERR "PAT enabled, "
+                               "but not supported by secondary CPU\n");
+                        BUG();
+                }
         }
 
         /* Set PWT to Write-Combining. All other bits stay the same */
@@ -626,6 +635,33 @@ void unmap_devmem(unsigned long pfn, unsigned long size, pgprot_t vma_prot)
 }
 
 /*
+ * Change the memory type for the physial address range in kernel identity
+ * mapping space if that range is a part of identity map.
+ */
+int kernel_map_sync_memtype(u64 base, unsigned long size, unsigned long flags)
+{
+        unsigned long id_sz;
+
+        if (!pat_enabled || base >= __pa(high_memory))
+                return 0;
+
+        id_sz = (__pa(high_memory) < base + size) ?
+                                __pa(high_memory) - base :
+                                size;
+
+        if (ioremap_change_attr((unsigned long)__va(base), id_sz, flags) < 0) {
+                printk(KERN_INFO
+                        "%s:%d ioremap_change_attr failed %s "
+                        "for %Lx-%Lx\n",
+                        current->comm, current->pid,
+                        cattr_name(flags),
+                        base, (unsigned long long)(base + size));
+                return -EINVAL;
+        }
+        return 0;
+}
+
+/*
  * Internal interface to reserve a range of physical memory with prot.
  * Reserved non RAM regions only and after successful reserve_memtype,
  * this func also keeps identity mapping (if any) in sync with this new prot.
@@ -634,7 +670,7 @@ static int reserve_pfn_range(u64 paddr, unsigned long size, pgprot_t *vma_prot,
                                 int strict_prot)
 {
         int is_ram = 0;
-        int id_sz, ret;
+        int ret;
         unsigned long flags;
         unsigned long want_flags = (pgprot_val(*vma_prot) & _PAGE_CACHE_MASK);
 
@@ -671,23 +707,8 @@ static int reserve_pfn_range(u64 paddr, unsigned long size, pgprot_t *vma_prot,
                                      flags);
         }
 
-        /* Need to keep identity mapping in sync */
-        if (paddr >= __pa(high_memory))
-                return 0;
-
-        id_sz = (__pa(high_memory) < paddr + size) ?
-                                __pa(high_memory) - paddr :
-                                size;
-
-        if (ioremap_change_attr((unsigned long)__va(paddr), id_sz, flags) < 0) {
+        if (kernel_map_sync_memtype(paddr, size, flags) < 0) {
                 free_memtype(paddr, paddr + size);
-                printk(KERN_ERR
-                        "%s:%d reserve_pfn_range ioremap_change_attr failed %s "
-                        "for %Lx-%Lx\n",
-                        current->comm, current->pid,
-                        cattr_name(flags),
-                        (unsigned long long)paddr,
-                        (unsigned long long)(paddr + size));
                 return -EINVAL;
         }
         return 0;
diff --git a/arch/x86/mm/pgtable.c b/arch/x86/mm/pgtable.c
index 86f2ffc43c3d..5b7c7c8464fe 100644
--- a/arch/x86/mm/pgtable.c
+++ b/arch/x86/mm/pgtable.c
@@ -313,6 +313,24 @@ int ptep_clear_flush_young(struct vm_area_struct *vma,
         return young;
 }
 
+/**
+ * reserve_top_address - reserves a hole in the top of kernel address space
+ * @reserve - size of hole to reserve
+ *
+ * Can be used to relocate the fixmap area and poke a hole in the top
+ * of kernel address space to make room for a hypervisor.
+ */
+void __init reserve_top_address(unsigned long reserve)
+{
+#ifdef CONFIG_X86_32
+        BUG_ON(fixmaps_set > 0);
+        printk(KERN_INFO "Reserving virtual address space above 0x%08x\n",
+               (int)-reserve);
+        __FIXADDR_TOP = -reserve - PAGE_SIZE;
+        __VMALLOC_RESERVE += reserve;
+#endif
+}
+
 int fixmaps_set;
 
 void __native_set_fixmap(enum fixed_addresses idx, pte_t pte)
diff --git a/arch/x86/mm/pgtable_32.c b/arch/x86/mm/pgtable_32.c
index 0951db9ee519..f2e477c91c1b 100644
--- a/arch/x86/mm/pgtable_32.c
+++ b/arch/x86/mm/pgtable_32.c
@@ -20,6 +20,8 @@
 #include <asm/tlb.h>
 #include <asm/tlbflush.h>
 
+unsigned int __VMALLOC_RESERVE = 128 << 20;
+
 /*
  * Associate a virtual page frame with a given physical page frame 
  * and protection flags for that frame.
@@ -97,22 +99,6 @@ void set_pmd_pfn(unsigned long vaddr, unsigned long pfn, pgprot_t flags)
 unsigned long __FIXADDR_TOP = 0xfffff000;
 EXPORT_SYMBOL(__FIXADDR_TOP);
 
-/**
- * reserve_top_address - reserves a hole in the top of kernel address space
- * @reserve - size of hole to reserve
- *
- * Can be used to relocate the fixmap area and poke a hole in the top
- * of kernel address space to make room for a hypervisor.
- */
-void __init reserve_top_address(unsigned long reserve)
-{
-        BUG_ON(fixmaps_set > 0);
-        printk(KERN_INFO "Reserving virtual address space above 0x%08x\n",
-               (int)-reserve);
-        __FIXADDR_TOP = -reserve - PAGE_SIZE;
-        __VMALLOC_RESERVE += reserve;
-}
-
 /*
  * vmalloc=size forces the vmalloc area to be exactly 'size'
  * bytes. This can be used to increase (or decrease) the
diff --git a/arch/x86/mm/srat_64.c b/arch/x86/mm/srat_64.c
index 09737c8af074..574c8bc95ef0 100644
--- a/arch/x86/mm/srat_64.c
+++ b/arch/x86/mm/srat_64.c
@@ -20,7 +20,8 @@
 #include <asm/proto.h>
 #include <asm/numa.h>
 #include <asm/e820.h>
-#include <asm/genapic.h>
+#include <asm/apic.h>
+#include <asm/uv/uv.h>
 
 int acpi_numa __initdata;
 
diff --git a/arch/x86/kernel/tlb_64.c b/arch/x86/mm/tlb.c
index f8be6f1d2e48..a654d59e4483 100644
--- a/arch/x86/kernel/tlb_64.c
+++ b/arch/x86/mm/tlb.c
@@ -1,24 +1,19 @@
 #include <linux/init.h>
 
 #include <linux/mm.h>
-#include <linux/delay.h>
 #include <linux/spinlock.h>
 #include <linux/smp.h>
-#include <linux/kernel_stat.h>
-#include <linux/mc146818rtc.h>
 #include <linux/interrupt.h>
+#include <linux/module.h>
 
-#include <asm/mtrr.h>
-#include <asm/pgalloc.h>
 #include <asm/tlbflush.h>
 #include <asm/mmu_context.h>
-#include <asm/proto.h>
-#include <asm/apicdef.h>
-#include <asm/idle.h>
-#include <asm/uv/uv_hub.h>
-#include <asm/uv/uv_bau.h>
+#include <asm/apic.h>
+#include <asm/uv/uv.h>
+
+DEFINE_PER_CPU_SHARED_ALIGNED(struct tlb_state, cpu_tlbstate)
+                        = { &init_mm, 0, };
 
-#include <mach_ipi.h>
 /*
  *      Smarter SMP flushing macros.
  *              c/o Linus Torvalds.
@@ -33,7 +28,7 @@
  *      To avoid global state use 8 different call vectors.
  *      Each CPU uses a specific vector to trigger flushes on other
  *      CPUs. Depending on the received vector the target CPUs look into
- *      the right per cpu variable for the flush data.
+ *      the right array slot for the flush data.
  *
  *      With more than 8 CPUs they are hashed to the 8 available
  *      vectors. The limited global vector space forces us to this right now.
@@ -43,18 +38,18 @@
 
 union smp_flush_state {
         struct {
-                cpumask_t flush_cpumask;
                 struct mm_struct *flush_mm;
                 unsigned long flush_va;
                 spinlock_t tlbstate_lock;
+                DECLARE_BITMAP(flush_cpumask, NR_CPUS);
         };
-        char pad[SMP_CACHE_BYTES];
-} ____cacheline_aligned;
+        char pad[CONFIG_X86_INTERNODE_CACHE_BYTES];
+} ____cacheline_internodealigned_in_smp;
 
 /* State is put into the per CPU data section, but padded
    to a full cache line because other CPUs can access it and we don't
    want false sharing in the per cpu data segment. */
-static DEFINE_PER_CPU(union smp_flush_state, flush_state);
+static union smp_flush_state flush_state[NUM_INVALIDATE_TLB_VECTORS];
 
 /*
  * We cannot call mmdrop() because we are in interrupt context,
@@ -62,9 +57,9 @@ static DEFINE_PER_CPU(union smp_flush_state, flush_state);
  */
 void leave_mm(int cpu)
 {
-        if (read_pda(mmu_state) == TLBSTATE_OK)
+        if (percpu_read(cpu_tlbstate.state) == TLBSTATE_OK)
                 BUG();
-        cpu_clear(cpu, read_pda(active_mm)->cpu_vm_mask);
+        cpu_clear(cpu, percpu_read(cpu_tlbstate.active_mm)->cpu_vm_mask);
         load_cr3(swapper_pg_dir);
 }
 EXPORT_SYMBOL_GPL(leave_mm);
@@ -117,10 +112,20 @@ EXPORT_SYMBOL_GPL(leave_mm);
  * Interrupts are disabled.
  */
 
-asmlinkage void smp_invalidate_interrupt(struct pt_regs *regs)
+/*
+ * FIXME: use of asmlinkage is not consistent.  On x86_64 it's noop
+ * but still used for documentation purpose but the usage is slightly
+ * inconsistent.  On x86_32, asmlinkage is regparm(0) but interrupt
+ * entry calls in with the first parameter in %eax.  Maybe define
+ * intrlinkage?
+ */
+#ifdef CONFIG_X86_64
+asmlinkage
+#endif
+void smp_invalidate_interrupt(struct pt_regs *regs)
 {
-        int cpu;
-        int sender;
+        unsigned int cpu;
+        unsigned int sender;
         union smp_flush_state *f;
 
         cpu = smp_processor_id();
@@ -129,9 +134,9 @@ asmlinkage void smp_invalidate_interrupt(struct pt_regs *regs)
          * Use that to determine where the sender put the data.
          */
         sender = ~regs->orig_ax - INVALIDATE_TLB_VECTOR_START;
-        f = &per_cpu(flush_state, sender);
+        f = &flush_state[sender];
 
-        if (!cpu_isset(cpu, f->flush_cpumask))
+        if (!cpumask_test_cpu(cpu, to_cpumask(f->flush_cpumask)))
                 goto out;
                 /*
                  * This was a BUG() but until someone can quote me the
@@ -142,8 +147,8 @@ asmlinkage void smp_invalidate_interrupt(struct pt_regs *regs)
                  * BUG();
                  */
 
-        if (f->flush_mm == read_pda(active_mm)) {
-                if (read_pda(mmu_state) == TLBSTATE_OK) {
+        if (f->flush_mm == percpu_read(cpu_tlbstate.active_mm)) {
+                if (percpu_read(cpu_tlbstate.state) == TLBSTATE_OK) {
                         if (f->flush_va == TLB_FLUSH_ALL)
                                 local_flush_tlb();
                         else
@@ -153,23 +158,21 @@ asmlinkage void smp_invalidate_interrupt(struct pt_regs *regs)
         }
 out:
         ack_APIC_irq();
-        cpu_clear(cpu, f->flush_cpumask);
+        smp_mb__before_clear_bit();
+        cpumask_clear_cpu(cpu, to_cpumask(f->flush_cpumask));
+        smp_mb__after_clear_bit();
         inc_irq_stat(irq_tlb_count);
 }
 
-void native_flush_tlb_others(const cpumask_t *cpumaskp, struct mm_struct *mm,
-                             unsigned long va)
+static void flush_tlb_others_ipi(const struct cpumask *cpumask,
+                                 struct mm_struct *mm, unsigned long va)
 {
-        int sender;
+        unsigned int sender;
         union smp_flush_state *f;
-        cpumask_t cpumask = *cpumaskp;
-
-        if (is_uv_system() && uv_flush_tlb_others(&cpumask, mm, va))
-                return;
 
         /* Caller has disabled preemption */
         sender = smp_processor_id() % NUM_INVALIDATE_TLB_VECTORS;
-        f = &per_cpu(flush_state, sender);
+        f = &flush_state[sender];
 
         /*
          * Could avoid this lock when
@@ -180,7 +183,8 @@ void native_flush_tlb_others(const cpumask_t *cpumaskp, struct mm_struct *mm,
 
         f->flush_mm = mm;
         f->flush_va = va;
-        cpus_or(f->flush_cpumask, cpumask, f->flush_cpumask);
+        cpumask_andnot(to_cpumask(f->flush_cpumask),
+                       cpumask, cpumask_of(smp_processor_id()));
 
         /*
          * Make the above memory operations globally visible before
@@ -191,9 +195,10 @@ void native_flush_tlb_others(const cpumask_t *cpumaskp, struct mm_struct *mm,
          * We have to send the IPI only to
          * CPUs affected.
          */
-        send_IPI_mask(&cpumask, INVALIDATE_TLB_VECTOR_START + sender);
+        apic->send_IPI_mask(to_cpumask(f->flush_cpumask),
+                      INVALIDATE_TLB_VECTOR_START + sender);
 
-        while (!cpus_empty(f->flush_cpumask))
+        while (!cpumask_empty(to_cpumask(f->flush_cpumask)))
                 cpu_relax();
 
         f->flush_mm = NULL;
@@ -201,12 +206,28 @@ void native_flush_tlb_others(const cpumask_t *cpumaskp, struct mm_struct *mm,
         spin_unlock(&f->tlbstate_lock);
 }
 
+void native_flush_tlb_others(const struct cpumask *cpumask,
+                             struct mm_struct *mm, unsigned long va)
+{
+        if (is_uv_system()) {
+                unsigned int cpu;
+
+                cpu = get_cpu();
+                cpumask = uv_flush_tlb_others(cpumask, mm, va, cpu);
+                if (cpumask)
+                        flush_tlb_others_ipi(cpumask, mm, va);
+                put_cpu();
+                return;
+        }
+        flush_tlb_others_ipi(cpumask, mm, va);
+}
+
 static int __cpuinit init_smp_flush(void)
 {
         int i;
 
-        for_each_possible_cpu(i)
-                spin_lock_init(&per_cpu(flush_state, i).tlbstate_lock);
+        for (i = 0; i < ARRAY_SIZE(flush_state); i++)
+                spin_lock_init(&flush_state[i].tlbstate_lock);
 
         return 0;
 }
@@ -215,25 +236,18 @@ core_initcall(init_smp_flush);
 void flush_tlb_current_task(void)
 {
         struct mm_struct *mm = current->mm;
-        cpumask_t cpu_mask;
 
         preempt_disable();
-        cpu_mask = mm->cpu_vm_mask;
-        cpu_clear(smp_processor_id(), cpu_mask);
 
         local_flush_tlb();
-        if (!cpus_empty(cpu_mask))
-                flush_tlb_others(cpu_mask, mm, TLB_FLUSH_ALL);
+        if (cpumask_any_but(&mm->cpu_vm_mask, smp_processor_id()) < nr_cpu_ids)
+                flush_tlb_others(&mm->cpu_vm_mask, mm, TLB_FLUSH_ALL);
         preempt_enable();
 }
 
 void flush_tlb_mm(struct mm_struct *mm)
 {
-        cpumask_t cpu_mask;
-
         preempt_disable();
-        cpu_mask = mm->cpu_vm_mask;
-        cpu_clear(smp_processor_id(), cpu_mask);
 
         if (current->active_mm == mm) {
                 if (current->mm)
@@ -241,8 +255,8 @@ void flush_tlb_mm(struct mm_struct *mm)
                 else
                         leave_mm(smp_processor_id());
         }
-        if (!cpus_empty(cpu_mask))
-                flush_tlb_others(cpu_mask, mm, TLB_FLUSH_ALL);
+        if (cpumask_any_but(&mm->cpu_vm_mask, smp_processor_id()) < nr_cpu_ids)
+                flush_tlb_others(&mm->cpu_vm_mask, mm, TLB_FLUSH_ALL);
 
         preempt_enable();
 }
@@ -250,11 +264,8 @@ void flush_tlb_mm(struct mm_struct *mm)
 void flush_tlb_page(struct vm_area_struct *vma, unsigned long va)
 {
         struct mm_struct *mm = vma->vm_mm;
-        cpumask_t cpu_mask;
 
         preempt_disable();
-        cpu_mask = mm->cpu_vm_mask;
-        cpu_clear(smp_processor_id(), cpu_mask);
 
         if (current->active_mm == mm) {
                 if (current->mm)
@@ -263,8 +274,8 @@ void flush_tlb_page(struct vm_area_struct *vma, unsigned long va)
                         leave_mm(smp_processor_id());
         }
 
-        if (!cpus_empty(cpu_mask))
-                flush_tlb_others(cpu_mask, mm, va);
+        if (cpumask_any_but(&mm->cpu_vm_mask, smp_processor_id()) < nr_cpu_ids)
+                flush_tlb_others(&mm->cpu_vm_mask, mm, va);
 
         preempt_enable();
 }
@@ -274,7 +285,7 @@ static void do_flush_tlb_all(void *info)
         unsigned long cpu = smp_processor_id();
 
         __flush_tlb_all();
-        if (read_pda(mmu_state) == TLBSTATE_LAZY)
+        if (percpu_read(cpu_tlbstate.state) == TLBSTATE_LAZY)
                 leave_mm(cpu);
 }
 
diff --git a/arch/x86/pci/numaq_32.c b/arch/x86/pci/numaq_32.c
index 2089354968a2..8eb295e116f6 100644
--- a/arch/x86/pci/numaq_32.c
+++ b/arch/x86/pci/numaq_32.c
@@ -5,7 +5,7 @@
 #include <linux/pci.h>
 #include <linux/init.h>
 #include <linux/nodemask.h>
-#include <mach_apic.h>
+#include <asm/apic.h>
 #include <asm/mpspec.h>
 #include <asm/pci_x86.h>
 
@@ -18,10 +18,6 @@
 
 #define QUADLOCAL2BUS(quad,local) (quad_local_to_mp_bus_id[quad][local])
 
-/* Where the IO area was mapped on multiquad, always 0 otherwise */
-void *xquad_portio;
-EXPORT_SYMBOL(xquad_portio);
-
 #define XQUAD_PORT_ADDR(port, quad) (xquad_portio + (XQUAD_PORTIO_QUAD*quad) + port)
 
 #define PCI_CONF1_MQ_ADDRESS(bus, devfn, reg) \
diff --git a/arch/x86/pci/pcbios.c b/arch/x86/pci/pcbios.c
index b82cae970dfd..1c975cc9839e 100644
--- a/arch/x86/pci/pcbios.c
+++ b/arch/x86/pci/pcbios.c
@@ -7,7 +7,7 @@
 #include <linux/module.h>
 #include <linux/uaccess.h>
 #include <asm/pci_x86.h>
-#include <asm/mach-default/pci-functions.h>
+#include <asm/pci-functions.h>
 
 /* BIOS32 signature: "_32_" */
 #define BIOS32_SIGNATURE        (('_' << 0) + ('3' << 8) + ('2' << 16) + ('_' << 24))
diff --git a/arch/x86/power/hibernate_asm_32.S b/arch/x86/power/hibernate_asm_32.S
index d1e9b53f9d33..b641388d8286 100644
--- a/arch/x86/power/hibernate_asm_32.S
+++ b/arch/x86/power/hibernate_asm_32.S
@@ -8,7 +8,7 @@
 
 #include <linux/linkage.h>
 #include <asm/segment.h>
-#include <asm/page.h>
+#include <asm/page_types.h>
 #include <asm/asm-offsets.h>
 #include <asm/processor-flags.h>
 
diff --git a/arch/x86/power/hibernate_asm_64.S b/arch/x86/power/hibernate_asm_64.S
index 000415947d93..9356547d8c01 100644
--- a/arch/x86/power/hibernate_asm_64.S
+++ b/arch/x86/power/hibernate_asm_64.S
@@ -18,7 +18,7 @@
         .text
 #include <linux/linkage.h>
 #include <asm/segment.h>
-#include <asm/page.h>
+#include <asm/page_types.h>
 #include <asm/asm-offsets.h>
 #include <asm/processor-flags.h>
 
diff --git a/arch/x86/vdso/Makefile b/arch/x86/vdso/Makefile
index 4d6ef0a336d6..16a9020c8f11 100644
--- a/arch/x86/vdso/Makefile
+++ b/arch/x86/vdso/Makefile
@@ -38,7 +38,7 @@ $(obj)/%.so: $(obj)/%.so.dbg FORCE
         $(call if_changed,objcopy)
 
 CFL := $(PROFILING) -mcmodel=small -fPIC -O2 -fasynchronous-unwind-tables -m64 \
-       $(filter -g%,$(KBUILD_CFLAGS))
+       $(filter -g%,$(KBUILD_CFLAGS)) $(call cc-option, -fno-stack-protector)
 
 $(vobjs): KBUILD_CFLAGS += $(CFL)
 
diff --git a/arch/x86/vdso/vma.c b/arch/x86/vdso/vma.c
index 9c98cc6ba978..7133cdf9098b 100644
--- a/arch/x86/vdso/vma.c
+++ b/arch/x86/vdso/vma.c
@@ -85,8 +85,8 @@ static unsigned long vdso_addr(unsigned long start, unsigned len)
         unsigned long addr, end;
         unsigned offset;
         end = (start + PMD_SIZE - 1) & PMD_MASK;
-        if (end >= TASK_SIZE64)
-                end = TASK_SIZE64;
+        if (end >= TASK_SIZE_MAX)
+                end = TASK_SIZE_MAX;
         end -= len;
         /* This loses some more bits than a modulo, but is cheaper */
         offset = get_random_int() & (PTRS_PER_PTE - 1);
diff --git a/arch/x86/xen/Kconfig b/arch/x86/xen/Kconfig
index 87b9ab166423..b83e119fbeb0 100644
--- a/arch/x86/xen/Kconfig
+++ b/arch/x86/xen/Kconfig
@@ -6,7 +6,7 @@ config XEN
         bool "Xen guest support"
         select PARAVIRT
         select PARAVIRT_CLOCK
-        depends on X86_64 || (X86_32 && X86_PAE && !(X86_VISWS || X86_VOYAGER))
+        depends on X86_64 || (X86_32 && X86_PAE && !X86_VISWS)
         depends on X86_CMPXCHG && X86_TSC
         help
           This is the Linux Xen port.  Enabling this will allow the
diff --git a/arch/x86/xen/Makefile b/arch/x86/xen/Makefile
index 6dcefba7836f..3b767d03fd6a 100644
--- a/arch/x86/xen/Makefile
+++ b/arch/x86/xen/Makefile
@@ -6,7 +6,8 @@ CFLAGS_REMOVE_irq.o = -pg
 endif
 
 obj-y           := enlighten.o setup.o multicalls.o mmu.o irq.o \
-                        time.o xen-asm_$(BITS).o grant-table.o suspend.o
+                        time.o xen-asm.o xen-asm_$(BITS).o \
+                        grant-table.o suspend.o
 
 obj-$(CONFIG_SMP)               += smp.o spinlock.o
 obj-$(CONFIG_XEN_DEBUG_FS)      += debugfs.o
\ No newline at end of file
diff --git a/arch/x86/xen/enlighten.c b/arch/x86/xen/enlighten.c
index b58e96338149..82cd39a6cbd3 100644
--- a/arch/x86/xen/enlighten.c
+++ b/arch/x86/xen/enlighten.c
@@ -61,40 +61,13 @@ DEFINE_PER_CPU(struct vcpu_info, xen_vcpu_info);
 enum xen_domain_type xen_domain_type = XEN_NATIVE;
 EXPORT_SYMBOL_GPL(xen_domain_type);
 
-/*
- * Identity map, in addition to plain kernel map.  This needs to be
- * large enough to allocate page table pages to allocate the rest.
- * Each page can map 2MB.
- */
-static pte_t level1_ident_pgt[PTRS_PER_PTE * 4] __page_aligned_bss;
-
-#ifdef CONFIG_X86_64
-/* l3 pud for userspace vsyscall mapping */
-static pud_t level3_user_vsyscall[PTRS_PER_PUD] __page_aligned_bss;
-#endif /* CONFIG_X86_64 */
-
-/*
- * Note about cr3 (pagetable base) values:
- *
- * xen_cr3 contains the current logical cr3 value; it contains the
- * last set cr3.  This may not be the current effective cr3, because
- * its update may be being lazily deferred.  However, a vcpu looking
- * at its own cr3 can use this value knowing that it everything will
- * be self-consistent.
- *
- * xen_current_cr3 contains the actual vcpu cr3; it is set once the
- * hypercall to set the vcpu cr3 is complete (so it may be a little
- * out of date, but it will never be set early).  If one vcpu is
- * looking at another vcpu's cr3 value, it should use this variable.
- */
-DEFINE_PER_CPU(unsigned long, xen_cr3);  /* cr3 stored as physaddr */
-DEFINE_PER_CPU(unsigned long, xen_current_cr3);  /* actual vcpu cr3 */
-
 struct start_info *xen_start_info;
 EXPORT_SYMBOL_GPL(xen_start_info);
 
 struct shared_info xen_dummy_shared_info;
 
+void *xen_initial_gdt;
+
 /*
  * Point at some empty memory to start with. We map the real shared_info
  * page as soon as fixmap is up and running.
@@ -114,14 +87,7 @@ struct shared_info *HYPERVISOR_shared_info = (void *)&xen_dummy_shared_info;
  *
  * 0: not available, 1: available
  */
-static int have_vcpu_info_placement =
-#ifdef CONFIG_X86_32
-        1
-#else
-        0
-#endif
-        ;
-
+static int have_vcpu_info_placement = 1;
 
 static void xen_vcpu_setup(int cpu)
 {
@@ -137,7 +103,7 @@ static void xen_vcpu_setup(int cpu)
 
         vcpup = &per_cpu(xen_vcpu_info, cpu);
 
-        info.mfn = virt_to_mfn(vcpup);
+        info.mfn = arbitrary_virt_to_mfn(vcpup);
         info.offset = offset_in_page(vcpup);
 
         printk(KERN_DEBUG "trying to map vcpu_info %d at %p, mfn %llx, offset %d\n",
@@ -237,7 +203,7 @@ static unsigned long xen_get_debugreg(int reg)
         return HYPERVISOR_get_debugreg(reg);
 }
 
-static void xen_leave_lazy(void)
+void xen_leave_lazy(void)
 {
         paravirt_leave_lazy(paravirt_get_lazy_mode());
         xen_mc_flush();
@@ -335,8 +301,10 @@ static void xen_load_gdt(const struct desc_ptr *dtr)
         frames = mcs.args;
 
         for (f = 0; va < dtr->address + size; va += PAGE_SIZE, f++) {
-                frames[f] = virt_to_mfn(va);
+                frames[f] = arbitrary_virt_to_mfn((void *)va);
+
                 make_lowmem_page_readonly((void *)va);
+                make_lowmem_page_readonly(mfn_to_virt(frames[f]));
         }
 
         MULTI_set_gdt(mcs.mc, frames, size / sizeof(struct desc_struct));
@@ -348,7 +316,7 @@ static void load_TLS_descriptor(struct thread_struct *t,
                                 unsigned int cpu, unsigned int i)
 {
         struct desc_struct *gdt = get_cpu_gdt_table(cpu);
-        xmaddr_t maddr = virt_to_machine(&gdt[GDT_ENTRY_TLS_MIN+i]);
+        xmaddr_t maddr = arbitrary_virt_to_machine(&gdt[GDT_ENTRY_TLS_MIN+i]);
         struct multicall_space mc = __xen_mc_entry(0);
 
         MULTI_update_descriptor(mc.mc, maddr.maddr, t->tls_array[i]);
@@ -357,13 +325,14 @@ static void load_TLS_descriptor(struct thread_struct *t,
 static void xen_load_tls(struct thread_struct *t, unsigned int cpu)
 {
         /*
-         * XXX sleazy hack: If we're being called in a lazy-cpu zone,
-         * it means we're in a context switch, and %gs has just been
-         * saved.  This means we can zero it out to prevent faults on
-         * exit from the hypervisor if the next process has no %gs.
-         * Either way, it has been saved, and the new value will get
-         * loaded properly.  This will go away as soon as Xen has been
-         * modified to not save/restore %gs for normal hypercalls.
+         * XXX sleazy hack: If we're being called in a lazy-cpu zone
+         * and lazy gs handling is enabled, it means we're in a
+         * context switch, and %gs has just been saved.  This means we
+         * can zero it out to prevent faults on exit from the
+         * hypervisor if the next process has no %gs.  Either way, it
+         * has been saved, and the new value will get loaded properly.
+         * This will go away as soon as Xen has been modified to not
+         * save/restore %gs for normal hypercalls.
          *
          * On x86_64, this hack is not used for %gs, because gs points
          * to KERNEL_GS_BASE (and uses it for PDA references), so we
@@ -375,7 +344,7 @@ static void xen_load_tls(struct thread_struct *t, unsigned int cpu)
          */
         if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_CPU) {
 #ifdef CONFIG_X86_32
-                loadsegment(gs, 0);
+                lazy_load_gs(0);
 #else
                 loadsegment(fs, 0);
 #endif
@@ -521,7 +490,7 @@ static void xen_write_gdt_entry(struct desc_struct *dt, int entry,
                 break;
 
         default: {
-                xmaddr_t maddr = virt_to_machine(&dt[entry]);
+                xmaddr_t maddr = arbitrary_virt_to_machine(&dt[entry]);
 
                 xen_mc_flush();
                 if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc))
@@ -587,94 +556,18 @@ static u32 xen_safe_apic_wait_icr_idle(void)
         return 0;
 }
 
-static struct apic_ops xen_basic_apic_ops = {
-        .read = xen_apic_read,
-        .write = xen_apic_write,
-        .icr_read = xen_apic_icr_read,
-        .icr_write = xen_apic_icr_write,
-        .wait_icr_idle = xen_apic_wait_icr_idle,
-        .safe_wait_icr_idle = xen_safe_apic_wait_icr_idle,
-};
-
-#endif
-
-static void xen_flush_tlb(void)
-{
-        struct mmuext_op *op;
-        struct multicall_space mcs;
-
-        preempt_disable();
-
-        mcs = xen_mc_entry(sizeof(*op));
-
-        op = mcs.args;
-        op->cmd = MMUEXT_TLB_FLUSH_LOCAL;
-        MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
-
-        xen_mc_issue(PARAVIRT_LAZY_MMU);
-
-        preempt_enable();
-}
-
-static void xen_flush_tlb_single(unsigned long addr)
+static void set_xen_basic_apic_ops(void)
 {
-        struct mmuext_op *op;
-        struct multicall_space mcs;
-
-        preempt_disable();
-
-        mcs = xen_mc_entry(sizeof(*op));
-        op = mcs.args;
-        op->cmd = MMUEXT_INVLPG_LOCAL;
-        op->arg1.linear_addr = addr & PAGE_MASK;
-        MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
-
-        xen_mc_issue(PARAVIRT_LAZY_MMU);
-
-        preempt_enable();
+        apic->read = xen_apic_read;
+        apic->write = xen_apic_write;
+        apic->icr_read = xen_apic_icr_read;
+        apic->icr_write = xen_apic_icr_write;
+        apic->wait_icr_idle = xen_apic_wait_icr_idle;
+        apic->safe_wait_icr_idle = xen_safe_apic_wait_icr_idle;
 }
 
-static void xen_flush_tlb_others(const cpumask_t *cpus, struct mm_struct *mm,
-                                 unsigned long va)
-{
-        struct {
-                struct mmuext_op op;
-                cpumask_t mask;
-        } *args;
-        cpumask_t cpumask = *cpus;
-        struct multicall_space mcs;
-
-        /*
-         * A couple of (to be removed) sanity checks:
-         *
-         * - current CPU must not be in mask
-         * - mask must exist :)
-         */
-        BUG_ON(cpus_empty(cpumask));
-        BUG_ON(cpu_isset(smp_processor_id(), cpumask));
-        BUG_ON(!mm);
-
-        /* If a CPU which we ran on has gone down, OK. */
-        cpus_and(cpumask, cpumask, cpu_online_map);
-        if (cpus_empty(cpumask))
-                return;
-
-        mcs = xen_mc_entry(sizeof(*args));
-        args = mcs.args;
-        args->mask = cpumask;
-        args->op.arg2.vcpumask = &args->mask;
-
-        if (va == TLB_FLUSH_ALL) {
-                args->op.cmd = MMUEXT_TLB_FLUSH_MULTI;
-        } else {
-                args->op.cmd = MMUEXT_INVLPG_MULTI;
-                args->op.arg1.linear_addr = va;
-        }
-
-        MULTI_mmuext_op(mcs.mc, &args->op, 1, NULL, DOMID_SELF);
+#endif
 
-        xen_mc_issue(PARAVIRT_LAZY_MMU);
-}
 
 static void xen_clts(void)
 {
@@ -700,21 +593,6 @@ static void xen_write_cr0(unsigned long cr0)
         xen_mc_issue(PARAVIRT_LAZY_CPU);
 }
 
-static void xen_write_cr2(unsigned long cr2)
-{
-        x86_read_percpu(xen_vcpu)->arch.cr2 = cr2;
-}
-
-static unsigned long xen_read_cr2(void)
-{
-        return x86_read_percpu(xen_vcpu)->arch.cr2;
-}
-
-static unsigned long xen_read_cr2_direct(void)
-{
-        return x86_read_percpu(xen_vcpu_info.arch.cr2);
-}
-
 static void xen_write_cr4(unsigned long cr4)
 {
         cr4 &= ~X86_CR4_PGE;
@@ -723,71 +601,6 @@ static void xen_write_cr4(unsigned long cr4)
         native_write_cr4(cr4);
 }
 
-static unsigned long xen_read_cr3(void)
-{
-        return x86_read_percpu(xen_cr3);
-}
-
-static void set_current_cr3(void *v)
-{
-        x86_write_percpu(xen_current_cr3, (unsigned long)v);
-}
-
-static void __xen_write_cr3(bool kernel, unsigned long cr3)
-{
-        struct mmuext_op *op;
-        struct multicall_space mcs;
-        unsigned long mfn;
-
-        if (cr3)
-                mfn = pfn_to_mfn(PFN_DOWN(cr3));
-        else
-                mfn = 0;
-
-        WARN_ON(mfn == 0 && kernel);
-
-        mcs = __xen_mc_entry(sizeof(*op));
-
-        op = mcs.args;
-        op->cmd = kernel ? MMUEXT_NEW_BASEPTR : MMUEXT_NEW_USER_BASEPTR;
-        op->arg1.mfn = mfn;
-
-        MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
-
-        if (kernel) {
-                x86_write_percpu(xen_cr3, cr3);
-
-                /* Update xen_current_cr3 once the batch has actually
-                   been submitted. */
-                xen_mc_callback(set_current_cr3, (void *)cr3);
-        }
-}
-
-static void xen_write_cr3(unsigned long cr3)
-{
-        BUG_ON(preemptible());
-
-        xen_mc_batch();  /* disables interrupts */
-
-        /* Update while interrupts are disabled, so its atomic with
-           respect to ipis */
-        x86_write_percpu(xen_cr3, cr3);
-
-        __xen_write_cr3(true, cr3);
-
-#ifdef CONFIG_X86_64
-        {
-                pgd_t *user_pgd = xen_get_user_pgd(__va(cr3));
-                if (user_pgd)
-                        __xen_write_cr3(false, __pa(user_pgd));
-                else
-                        __xen_write_cr3(false, 0);
-        }
-#endif
-
-        xen_mc_issue(PARAVIRT_LAZY_CPU);  /* interrupts restored */
-}
-
 static int xen_write_msr_safe(unsigned int msr, unsigned low, unsigned high)
 {
         int ret;
@@ -829,185 +642,6 @@ static int xen_write_msr_safe(unsigned int msr, unsigned low, unsigned high)
         return ret;
 }
 
-/* Early in boot, while setting up the initial pagetable, assume
-   everything is pinned. */
-static __init void xen_alloc_pte_init(struct mm_struct *mm, unsigned long pfn)
-{
-#ifdef CONFIG_FLATMEM
-        BUG_ON(mem_map);        /* should only be used early */
-#endif
-        make_lowmem_page_readonly(__va(PFN_PHYS(pfn)));
-}
-
-/* Early release_pte assumes that all pts are pinned, since there's
-   only init_mm and anything attached to that is pinned. */
-static void xen_release_pte_init(unsigned long pfn)
-{
-        make_lowmem_page_readwrite(__va(PFN_PHYS(pfn)));
-}
-
-static void pin_pagetable_pfn(unsigned cmd, unsigned long pfn)
-{
-        struct mmuext_op op;
-        op.cmd = cmd;
-        op.arg1.mfn = pfn_to_mfn(pfn);
-        if (HYPERVISOR_mmuext_op(&op, 1, NULL, DOMID_SELF))
-                BUG();
-}
-
-/* This needs to make sure the new pte page is pinned iff its being
-   attached to a pinned pagetable. */
-static void xen_alloc_ptpage(struct mm_struct *mm, unsigned long pfn, unsigned level)
-{
-        struct page *page = pfn_to_page(pfn);
-
-        if (PagePinned(virt_to_page(mm->pgd))) {
-                SetPagePinned(page);
-
-                vm_unmap_aliases();
-                if (!PageHighMem(page)) {
-                        make_lowmem_page_readonly(__va(PFN_PHYS((unsigned long)pfn)));
-                        if (level == PT_PTE && USE_SPLIT_PTLOCKS)
-                                pin_pagetable_pfn(MMUEXT_PIN_L1_TABLE, pfn);
-                } else {
-                        /* make sure there are no stray mappings of
-                           this page */
-                        kmap_flush_unused();
-                }
-        }
-}
-
-static void xen_alloc_pte(struct mm_struct *mm, unsigned long pfn)
-{
-        xen_alloc_ptpage(mm, pfn, PT_PTE);
-}
-
-static void xen_alloc_pmd(struct mm_struct *mm, unsigned long pfn)
-{
-        xen_alloc_ptpage(mm, pfn, PT_PMD);
-}
-
-static int xen_pgd_alloc(struct mm_struct *mm)
-{
-        pgd_t *pgd = mm->pgd;
-        int ret = 0;
-
-        BUG_ON(PagePinned(virt_to_page(pgd)));
-
-#ifdef CONFIG_X86_64
-        {
-                struct page *page = virt_to_page(pgd);
-                pgd_t *user_pgd;
-
-                BUG_ON(page->private != 0);
-
-                ret = -ENOMEM;
-
-                user_pgd = (pgd_t *)__get_free_page(GFP_KERNEL | __GFP_ZERO);
-                page->private = (unsigned long)user_pgd;
-
-                if (user_pgd != NULL) {
-                        user_pgd[pgd_index(VSYSCALL_START)] =
-                                __pgd(__pa(level3_user_vsyscall) | _PAGE_TABLE);
-                        ret = 0;
-                }
-
-                BUG_ON(PagePinned(virt_to_page(xen_get_user_pgd(pgd))));
-        }
-#endif
-
-        return ret;
-}
-
-static void xen_pgd_free(struct mm_struct *mm, pgd_t *pgd)
-{
-#ifdef CONFIG_X86_64
-        pgd_t *user_pgd = xen_get_user_pgd(pgd);
-
-        if (user_pgd)
-                free_page((unsigned long)user_pgd);
-#endif
-}
-
-/* This should never happen until we're OK to use struct page */
-static void xen_release_ptpage(unsigned long pfn, unsigned level)
-{
-        struct page *page = pfn_to_page(pfn);
-
-        if (PagePinned(page)) {
-                if (!PageHighMem(page)) {
-                        if (level == PT_PTE && USE_SPLIT_PTLOCKS)
-                                pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, pfn);
-                        make_lowmem_page_readwrite(__va(PFN_PHYS(pfn)));
-                }
-                ClearPagePinned(page);
-        }
-}
-
-static void xen_release_pte(unsigned long pfn)
-{
-        xen_release_ptpage(pfn, PT_PTE);
-}
-
-static void xen_release_pmd(unsigned long pfn)
-{
-        xen_release_ptpage(pfn, PT_PMD);
-}
-
-#if PAGETABLE_LEVELS == 4
-static void xen_alloc_pud(struct mm_struct *mm, unsigned long pfn)
-{
-        xen_alloc_ptpage(mm, pfn, PT_PUD);
-}
-
-static void xen_release_pud(unsigned long pfn)
-{
-        xen_release_ptpage(pfn, PT_PUD);
-}
-#endif
-
-#ifdef CONFIG_HIGHPTE
-static void *xen_kmap_atomic_pte(struct page *page, enum km_type type)
-{
-        pgprot_t prot = PAGE_KERNEL;
-
-        if (PagePinned(page))
-                prot = PAGE_KERNEL_RO;
-
-        if (0 && PageHighMem(page))
-                printk("mapping highpte %lx type %d prot %s\n",
-                       page_to_pfn(page), type,
-                       (unsigned long)pgprot_val(prot) & _PAGE_RW ? "WRITE" : "READ");
-
-        return kmap_atomic_prot(page, type, prot);
-}
-#endif
-
-#ifdef CONFIG_X86_32
-static __init pte_t mask_rw_pte(pte_t *ptep, pte_t pte)
-{
-        /* If there's an existing pte, then don't allow _PAGE_RW to be set */
-        if (pte_val_ma(*ptep) & _PAGE_PRESENT)
-                pte = __pte_ma(((pte_val_ma(*ptep) & _PAGE_RW) | ~_PAGE_RW) &
-                               pte_val_ma(pte));
-
-        return pte;
-}
-
-/* Init-time set_pte while constructing initial pagetables, which
-   doesn't allow RO pagetable pages to be remapped RW */
-static __init void xen_set_pte_init(pte_t *ptep, pte_t pte)
-{
-        pte = mask_rw_pte(ptep, pte);
-
-        xen_set_pte(ptep, pte);
-}
-#endif
-
-static __init void xen_pagetable_setup_start(pgd_t *base)
-{
-}
-
 void xen_setup_shared_info(void)
 {
         if (!xen_feature(XENFEAT_auto_translated_physmap)) {
@@ -1028,37 +662,6 @@ void xen_setup_shared_info(void)
         xen_setup_mfn_list_list();
 }
 
-static __init void xen_pagetable_setup_done(pgd_t *base)
-{
-        xen_setup_shared_info();
-}
-
-static __init void xen_post_allocator_init(void)
-{
-        pv_mmu_ops.set_pte = xen_set_pte;
-        pv_mmu_ops.set_pmd = xen_set_pmd;
-        pv_mmu_ops.set_pud = xen_set_pud;
-#if PAGETABLE_LEVELS == 4
-        pv_mmu_ops.set_pgd = xen_set_pgd;
-#endif
-
-        /* This will work as long as patching hasn't happened yet
-           (which it hasn't) */
-        pv_mmu_ops.alloc_pte = xen_alloc_pte;
-        pv_mmu_ops.alloc_pmd = xen_alloc_pmd;
-        pv_mmu_ops.release_pte = xen_release_pte;
-        pv_mmu_ops.release_pmd = xen_release_pmd;
-#if PAGETABLE_LEVELS == 4
-        pv_mmu_ops.alloc_pud = xen_alloc_pud;
-        pv_mmu_ops.release_pud = xen_release_pud;
-#endif
-
-#ifdef CONFIG_X86_64
-        SetPagePinned(virt_to_page(level3_user_vsyscall));
-#endif
-        xen_mark_init_mm_pinned();
-}
-
 /* This is called once we have the cpu_possible_map */
 void xen_setup_vcpu_info_placement(void)
 {
@@ -1072,10 +675,10 @@ void xen_setup_vcpu_info_placement(void)
         if (have_vcpu_info_placement) {
                 printk(KERN_INFO "Xen: using vcpu_info placement\n");
 
-                pv_irq_ops.save_fl = xen_save_fl_direct;
-                pv_irq_ops.restore_fl = xen_restore_fl_direct;
-                pv_irq_ops.irq_disable = xen_irq_disable_direct;
-                pv_irq_ops.irq_enable = xen_irq_enable_direct;
+                pv_irq_ops.save_fl = __PV_IS_CALLEE_SAVE(xen_save_fl_direct);
+                pv_irq_ops.restore_fl = __PV_IS_CALLEE_SAVE(xen_restore_fl_direct);
+                pv_irq_ops.irq_disable = __PV_IS_CALLEE_SAVE(xen_irq_disable_direct);
+                pv_irq_ops.irq_enable = __PV_IS_CALLEE_SAVE(xen_irq_enable_direct);
                 pv_mmu_ops.read_cr2 = xen_read_cr2_direct;
         }
 }
@@ -1133,49 +736,6 @@ static unsigned xen_patch(u8 type, u16 clobbers, void *insnbuf,
         return ret;
 }
 
-static void xen_set_fixmap(unsigned idx, unsigned long phys, pgprot_t prot)
-{
-        pte_t pte;
-
-        phys >>= PAGE_SHIFT;
-
-        switch (idx) {
-        case FIX_BTMAP_END ... FIX_BTMAP_BEGIN:
-#ifdef CONFIG_X86_F00F_BUG
-        case FIX_F00F_IDT:
-#endif
-#ifdef CONFIG_X86_32
-        case FIX_WP_TEST:
-        case FIX_VDSO:
-# ifdef CONFIG_HIGHMEM
-        case FIX_KMAP_BEGIN ... FIX_KMAP_END:
-# endif
-#else
-        case VSYSCALL_LAST_PAGE ... VSYSCALL_FIRST_PAGE:
-#endif
-#ifdef CONFIG_X86_LOCAL_APIC
-        case FIX_APIC_BASE:     /* maps dummy local APIC */
-#endif
-                pte = pfn_pte(phys, prot);
-                break;
-
-        default:
-                pte = mfn_pte(phys, prot);
-                break;
-        }
-
-        __native_set_fixmap(idx, pte);
-
-#ifdef CONFIG_X86_64
-        /* Replicate changes to map the vsyscall page into the user
-           pagetable vsyscall mapping. */
-        if (idx >= VSYSCALL_LAST_PAGE && idx <= VSYSCALL_FIRST_PAGE) {
-                unsigned long vaddr = __fix_to_virt(idx);
-                set_pte_vaddr_pud(level3_user_vsyscall, vaddr, pte);
-        }
-#endif
-}
-
 static const struct pv_info xen_info __initdata = {
         .paravirt_enabled = 1,
         .shared_kernel_pmd = 0,
@@ -1271,87 +831,6 @@ static const struct pv_apic_ops xen_apic_ops __initdata = {
 #endif
 };
 
-static const struct pv_mmu_ops xen_mmu_ops __initdata = {
-        .pagetable_setup_start = xen_pagetable_setup_start,
-        .pagetable_setup_done = xen_pagetable_setup_done,
-
-        .read_cr2 = xen_read_cr2,
-        .write_cr2 = xen_write_cr2,
-
-        .read_cr3 = xen_read_cr3,
-        .write_cr3 = xen_write_cr3,
-
-        .flush_tlb_user = xen_flush_tlb,
-        .flush_tlb_kernel = xen_flush_tlb,
-        .flush_tlb_single = xen_flush_tlb_single,
-        .flush_tlb_others = xen_flush_tlb_others,
-
-        .pte_update = paravirt_nop,
-        .pte_update_defer = paravirt_nop,
-
-        .pgd_alloc = xen_pgd_alloc,
-        .pgd_free = xen_pgd_free,
-
-        .alloc_pte = xen_alloc_pte_init,
-        .release_pte = xen_release_pte_init,
-        .alloc_pmd = xen_alloc_pte_init,
-        .alloc_pmd_clone = paravirt_nop,
-        .release_pmd = xen_release_pte_init,
-
-#ifdef CONFIG_HIGHPTE
-        .kmap_atomic_pte = xen_kmap_atomic_pte,
-#endif
-
-#ifdef CONFIG_X86_64
-        .set_pte = xen_set_pte,
-#else
-        .set_pte = xen_set_pte_init,
-#endif
-        .set_pte_at = xen_set_pte_at,
-        .set_pmd = xen_set_pmd_hyper,
-
-        .ptep_modify_prot_start = __ptep_modify_prot_start,
-        .ptep_modify_prot_commit = __ptep_modify_prot_commit,
-
-        .pte_val = xen_pte_val,
-        .pte_flags = native_pte_flags,
-        .pgd_val = xen_pgd_val,
-
-        .make_pte = xen_make_pte,
-        .make_pgd = xen_make_pgd,
-
-#ifdef CONFIG_X86_PAE
-        .set_pte_atomic = xen_set_pte_atomic,
-        .set_pte_present = xen_set_pte_at,
-        .pte_clear = xen_pte_clear,
-        .pmd_clear = xen_pmd_clear,
-#endif  /* CONFIG_X86_PAE */
-        .set_pud = xen_set_pud_hyper,
-
-        .make_pmd = xen_make_pmd,
-        .pmd_val = xen_pmd_val,
-
-#if PAGETABLE_LEVELS == 4
-        .pud_val = xen_pud_val,
-        .make_pud = xen_make_pud,
-        .set_pgd = xen_set_pgd_hyper,
-
-        .alloc_pud = xen_alloc_pte_init,
-        .release_pud = xen_release_pte_init,
-#endif  /* PAGETABLE_LEVELS == 4 */
-
-        .activate_mm = xen_activate_mm,
-        .dup_mmap = xen_dup_mmap,
-        .exit_mmap = xen_exit_mmap,
-
-        .lazy_mode = {
-                .enter = paravirt_enter_lazy_mmu,
-                .leave = xen_leave_lazy,
-        },
-
-        .set_fixmap = xen_set_fixmap,
-};
-
 static void xen_reboot(int reason)
 {
         struct sched_shutdown r = { .reason = reason };
@@ -1394,223 +873,6 @@ static const struct machine_ops __initdata xen_machine_ops = {
 };
 
 
-static void __init xen_reserve_top(void)
-{
-#ifdef CONFIG_X86_32
-        unsigned long top = HYPERVISOR_VIRT_START;
-        struct xen_platform_parameters pp;
-
-        if (HYPERVISOR_xen_version(XENVER_platform_parameters, &pp) == 0)
-                top = pp.virt_start;
-
-        reserve_top_address(-top);
-#endif  /* CONFIG_X86_32 */
-}
-
-/*
- * Like __va(), but returns address in the kernel mapping (which is
- * all we have until the physical memory mapping has been set up.
- */
-static void *__ka(phys_addr_t paddr)
-{
-#ifdef CONFIG_X86_64
-        return (void *)(paddr + __START_KERNEL_map);
-#else
-        return __va(paddr);
-#endif
-}
-
-/* Convert a machine address to physical address */
-static unsigned long m2p(phys_addr_t maddr)
-{
-        phys_addr_t paddr;
-
-        maddr &= PTE_PFN_MASK;
-        paddr = mfn_to_pfn(maddr >> PAGE_SHIFT) << PAGE_SHIFT;
-
-        return paddr;
-}
-
-/* Convert a machine address to kernel virtual */
-static void *m2v(phys_addr_t maddr)
-{
-        return __ka(m2p(maddr));
-}
-
-static void set_page_prot(void *addr, pgprot_t prot)
-{
-        unsigned long pfn = __pa(addr) >> PAGE_SHIFT;
-        pte_t pte = pfn_pte(pfn, prot);
-
-        if (HYPERVISOR_update_va_mapping((unsigned long)addr, pte, 0))
-                BUG();
-}
-
-static __init void xen_map_identity_early(pmd_t *pmd, unsigned long max_pfn)
-{
-        unsigned pmdidx, pteidx;
-        unsigned ident_pte;
-        unsigned long pfn;
-
-        ident_pte = 0;
-        pfn = 0;
-        for (pmdidx = 0; pmdidx < PTRS_PER_PMD && pfn < max_pfn; pmdidx++) {
-                pte_t *pte_page;
-
-                /* Reuse or allocate a page of ptes */
-                if (pmd_present(pmd[pmdidx]))
-                        pte_page = m2v(pmd[pmdidx].pmd);
-                else {
-                        /* Check for free pte pages */
-                        if (ident_pte == ARRAY_SIZE(level1_ident_pgt))
-                                break;
-
-                        pte_page = &level1_ident_pgt[ident_pte];
-                        ident_pte += PTRS_PER_PTE;
-
-                        pmd[pmdidx] = __pmd(__pa(pte_page) | _PAGE_TABLE);
-                }
-
-                /* Install mappings */
-                for (pteidx = 0; pteidx < PTRS_PER_PTE; pteidx++, pfn++) {
-                        pte_t pte;
-
-                        if (pfn > max_pfn_mapped)
-                                max_pfn_mapped = pfn;
-
-                        if (!pte_none(pte_page[pteidx]))
-                                continue;
-
-                        pte = pfn_pte(pfn, PAGE_KERNEL_EXEC);
-                        pte_page[pteidx] = pte;
-                }
-        }
-
-        for (pteidx = 0; pteidx < ident_pte; pteidx += PTRS_PER_PTE)
-                set_page_prot(&level1_ident_pgt[pteidx], PAGE_KERNEL_RO);
-
-        set_page_prot(pmd, PAGE_KERNEL_RO);
-}
-
-#ifdef CONFIG_X86_64
-static void convert_pfn_mfn(void *v)
-{
-        pte_t *pte = v;
-        int i;
-
-        /* All levels are converted the same way, so just treat them
-           as ptes. */
-        for (i = 0; i < PTRS_PER_PTE; i++)
-                pte[i] = xen_make_pte(pte[i].pte);
-}
-
-/*
- * Set up the inital kernel pagetable.
- *
- * We can construct this by grafting the Xen provided pagetable into
- * head_64.S's preconstructed pagetables.  We copy the Xen L2's into
- * level2_ident_pgt, level2_kernel_pgt and level2_fixmap_pgt.  This
- * means that only the kernel has a physical mapping to start with -
- * but that's enough to get __va working.  We need to fill in the rest
- * of the physical mapping once some sort of allocator has been set
- * up.
- */
-static __init pgd_t *xen_setup_kernel_pagetable(pgd_t *pgd,
-                                                unsigned long max_pfn)
-{
-        pud_t *l3;
-        pmd_t *l2;
-
-        /* Zap identity mapping */
-        init_level4_pgt[0] = __pgd(0);
-
-        /* Pre-constructed entries are in pfn, so convert to mfn */
-        convert_pfn_mfn(init_level4_pgt);
-        convert_pfn_mfn(level3_ident_pgt);
-        convert_pfn_mfn(level3_kernel_pgt);
-
-        l3 = m2v(pgd[pgd_index(__START_KERNEL_map)].pgd);
-        l2 = m2v(l3[pud_index(__START_KERNEL_map)].pud);
-
-        memcpy(level2_ident_pgt, l2, sizeof(pmd_t) * PTRS_PER_PMD);
-        memcpy(level2_kernel_pgt, l2, sizeof(pmd_t) * PTRS_PER_PMD);
-
-        l3 = m2v(pgd[pgd_index(__START_KERNEL_map + PMD_SIZE)].pgd);
-        l2 = m2v(l3[pud_index(__START_KERNEL_map + PMD_SIZE)].pud);
-        memcpy(level2_fixmap_pgt, l2, sizeof(pmd_t) * PTRS_PER_PMD);
-
-        /* Set up identity map */
-        xen_map_identity_early(level2_ident_pgt, max_pfn);
-
-        /* Make pagetable pieces RO */
-        set_page_prot(init_level4_pgt, PAGE_KERNEL_RO);
-        set_page_prot(level3_ident_pgt, PAGE_KERNEL_RO);
-        set_page_prot(level3_kernel_pgt, PAGE_KERNEL_RO);
-        set_page_prot(level3_user_vsyscall, PAGE_KERNEL_RO);
-        set_page_prot(level2_kernel_pgt, PAGE_KERNEL_RO);
-        set_page_prot(level2_fixmap_pgt, PAGE_KERNEL_RO);
-
-        /* Pin down new L4 */
-        pin_pagetable_pfn(MMUEXT_PIN_L4_TABLE,
-                          PFN_DOWN(__pa_symbol(init_level4_pgt)));
-
-        /* Unpin Xen-provided one */
-        pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
-
-        /* Switch over */
-        pgd = init_level4_pgt;
-
-        /*
-         * At this stage there can be no user pgd, and no page
-         * structure to attach it to, so make sure we just set kernel
-         * pgd.
-         */
-        xen_mc_batch();
-        __xen_write_cr3(true, __pa(pgd));
-        xen_mc_issue(PARAVIRT_LAZY_CPU);
-
-        reserve_early(__pa(xen_start_info->pt_base),
-                      __pa(xen_start_info->pt_base +
-                           xen_start_info->nr_pt_frames * PAGE_SIZE),
-                      "XEN PAGETABLES");
-
-        return pgd;
-}
-#else   /* !CONFIG_X86_64 */
-static pmd_t level2_kernel_pgt[PTRS_PER_PMD] __page_aligned_bss;
-
-static __init pgd_t *xen_setup_kernel_pagetable(pgd_t *pgd,
-                                                unsigned long max_pfn)
-{
-        pmd_t *kernel_pmd;
-
-        init_pg_tables_start = __pa(pgd);
-        init_pg_tables_end = __pa(pgd) + xen_start_info->nr_pt_frames*PAGE_SIZE;
-        max_pfn_mapped = PFN_DOWN(init_pg_tables_end + 512*1024);
-
-        kernel_pmd = m2v(pgd[KERNEL_PGD_BOUNDARY].pgd);
-        memcpy(level2_kernel_pgt, kernel_pmd, sizeof(pmd_t) * PTRS_PER_PMD);
-
-        xen_map_identity_early(level2_kernel_pgt, max_pfn);
-
-        memcpy(swapper_pg_dir, pgd, sizeof(pgd_t) * PTRS_PER_PGD);
-        set_pgd(&swapper_pg_dir[KERNEL_PGD_BOUNDARY],
-                        __pgd(__pa(level2_kernel_pgt) | _PAGE_PRESENT));
-
-        set_page_prot(level2_kernel_pgt, PAGE_KERNEL_RO);
-        set_page_prot(swapper_pg_dir, PAGE_KERNEL_RO);
-        set_page_prot(empty_zero_page, PAGE_KERNEL_RO);
-
-        pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
-
-        xen_write_cr3(__pa(swapper_pg_dir));
-
-        pin_pagetable_pfn(MMUEXT_PIN_L3_TABLE, PFN_DOWN(__pa(swapper_pg_dir)));
-
-        return swapper_pg_dir;
-}
-#endif  /* CONFIG_X86_64 */
-
 /* First C function to be called on Xen boot */
 asmlinkage void __init xen_start_kernel(void)
 {
@@ -1639,7 +901,7 @@ asmlinkage void __init xen_start_kernel(void)
         /*
          * set up the basic apic ops.
          */
-        apic_ops = &xen_basic_apic_ops;
+        set_xen_basic_apic_ops();
 #endif
 
         if (xen_feature(XENFEAT_mmu_pt_update_preserve_ad)) {
@@ -1650,10 +912,18 @@ asmlinkage void __init xen_start_kernel(void)
         machine_ops = xen_machine_ops;
 
 #ifdef CONFIG_X86_64
-        /* Disable until direct per-cpu data access. */
-        have_vcpu_info_placement = 0;
-        x86_64_init_pda();
+        /*
+         * Setup percpu state.  We only need to do this for 64-bit
+         * because 32-bit already has %fs set properly.
+         */
+        load_percpu_segment(0);
 #endif
+        /*
+         * The only reliable way to retain the initial address of the
+         * percpu gdt_page is to remember it here, so we can go and
+         * mark it RW later, when the initial percpu area is freed.
+         */
+        xen_initial_gdt = &per_cpu(gdt_page, 0);
 
         xen_smp_init();
 
diff --git a/arch/x86/xen/irq.c b/arch/x86/xen/irq.c
index bb042608c602..cfd17799bd6d 100644
--- a/arch/x86/xen/irq.c
+++ b/arch/x86/xen/irq.c
@@ -19,27 +19,12 @@ void xen_force_evtchn_callback(void)
         (void)HYPERVISOR_xen_version(0, NULL);
 }
 
-static void __init __xen_init_IRQ(void)
-{
-        int i;
-
-        /* Create identity vector->irq map */
-        for(i = 0; i < NR_VECTORS; i++) {
-                int cpu;
-
-                for_each_possible_cpu(cpu)
-                        per_cpu(vector_irq, cpu)[i] = i;
-        }
-
-        xen_init_IRQ();
-}
-
 static unsigned long xen_save_fl(void)
 {
         struct vcpu_info *vcpu;
         unsigned long flags;
 
-        vcpu = x86_read_percpu(xen_vcpu);
+        vcpu = percpu_read(xen_vcpu);
 
         /* flag has opposite sense of mask */
         flags = !vcpu->evtchn_upcall_mask;
@@ -50,6 +35,7 @@ static unsigned long xen_save_fl(void)
         */
         return (-flags) & X86_EFLAGS_IF;
 }
+PV_CALLEE_SAVE_REGS_THUNK(xen_save_fl);
 
 static void xen_restore_fl(unsigned long flags)
 {
@@ -62,7 +48,7 @@ static void xen_restore_fl(unsigned long flags)
            make sure we're don't switch CPUs between getting the vcpu
            pointer and updating the mask. */
         preempt_disable();
-        vcpu = x86_read_percpu(xen_vcpu);
+        vcpu = percpu_read(xen_vcpu);
         vcpu->evtchn_upcall_mask = flags;
         preempt_enable_no_resched();
 
@@ -76,6 +62,7 @@ static void xen_restore_fl(unsigned long flags)
                         xen_force_evtchn_callback();
         }
 }
+PV_CALLEE_SAVE_REGS_THUNK(xen_restore_fl);
 
 static void xen_irq_disable(void)
 {
@@ -83,9 +70,10 @@ static void xen_irq_disable(void)
            make sure we're don't switch CPUs between getting the vcpu
            pointer and updating the mask. */
         preempt_disable();
-        x86_read_percpu(xen_vcpu)->evtchn_upcall_mask = 1;
+        percpu_read(xen_vcpu)->evtchn_upcall_mask = 1;
         preempt_enable_no_resched();
 }
+PV_CALLEE_SAVE_REGS_THUNK(xen_irq_disable);
 
 static void xen_irq_enable(void)
 {
@@ -96,7 +84,7 @@ static void xen_irq_enable(void)
            the caller is confused and is trying to re-enable interrupts
            on an indeterminate processor. */
 
-        vcpu = x86_read_percpu(xen_vcpu);
+        vcpu = percpu_read(xen_vcpu);
         vcpu->evtchn_upcall_mask = 0;
 
         /* Doesn't matter if we get preempted here, because any
@@ -106,6 +94,7 @@ static void xen_irq_enable(void)
         if (unlikely(vcpu->evtchn_upcall_pending))
                 xen_force_evtchn_callback();
 }
+PV_CALLEE_SAVE_REGS_THUNK(xen_irq_enable);
 
 static void xen_safe_halt(void)
 {
@@ -123,11 +112,13 @@ static void xen_halt(void)
 }
 
 static const struct pv_irq_ops xen_irq_ops __initdata = {
-        .init_IRQ = __xen_init_IRQ,
-        .save_fl = xen_save_fl,
-        .restore_fl = xen_restore_fl,
-        .irq_disable = xen_irq_disable,
-        .irq_enable = xen_irq_enable,
+        .init_IRQ = xen_init_IRQ,
+
+        .save_fl = PV_CALLEE_SAVE(xen_save_fl),
+        .restore_fl = PV_CALLEE_SAVE(xen_restore_fl),
+        .irq_disable = PV_CALLEE_SAVE(xen_irq_disable),
+        .irq_enable = PV_CALLEE_SAVE(xen_irq_enable),
+
         .safe_halt = xen_safe_halt,
         .halt = xen_halt,
 #ifdef CONFIG_X86_64
diff --git a/arch/x86/xen/mmu.c b/arch/x86/xen/mmu.c
index 503c240e26c7..cb6afa4ec95c 100644
--- a/arch/x86/xen/mmu.c
+++ b/arch/x86/xen/mmu.c
@@ -47,6 +47,7 @@
 #include <asm/tlbflush.h>
 #include <asm/fixmap.h>
 #include <asm/mmu_context.h>
+#include <asm/setup.h>
 #include <asm/paravirt.h>
 #include <asm/linkage.h>
 
@@ -55,6 +56,8 @@
 
 #include <xen/page.h>
 #include <xen/interface/xen.h>
+#include <xen/interface/version.h>
+#include <xen/hvc-console.h>
 
 #include "multicalls.h"
 #include "mmu.h"
@@ -114,6 +117,37 @@ static inline void check_zero(void)
 
 #endif /* CONFIG_XEN_DEBUG_FS */
 
+
+/*
+ * Identity map, in addition to plain kernel map.  This needs to be
+ * large enough to allocate page table pages to allocate the rest.
+ * Each page can map 2MB.
+ */
+static pte_t level1_ident_pgt[PTRS_PER_PTE * 4] __page_aligned_bss;
+
+#ifdef CONFIG_X86_64
+/* l3 pud for userspace vsyscall mapping */
+static pud_t level3_user_vsyscall[PTRS_PER_PUD] __page_aligned_bss;
+#endif /* CONFIG_X86_64 */
+
+/*
+ * Note about cr3 (pagetable base) values:
+ *
+ * xen_cr3 contains the current logical cr3 value; it contains the
+ * last set cr3.  This may not be the current effective cr3, because
+ * its update may be being lazily deferred.  However, a vcpu looking
+ * at its own cr3 can use this value knowing that it everything will
+ * be self-consistent.
+ *
+ * xen_current_cr3 contains the actual vcpu cr3; it is set once the
+ * hypercall to set the vcpu cr3 is complete (so it may be a little
+ * out of date, but it will never be set early).  If one vcpu is
+ * looking at another vcpu's cr3 value, it should use this variable.
+ */
+DEFINE_PER_CPU(unsigned long, xen_cr3);  /* cr3 stored as physaddr */
+DEFINE_PER_CPU(unsigned long, xen_current_cr3);  /* actual vcpu cr3 */
+
+
 /*
  * Just beyond the highest usermode address.  STACK_TOP_MAX has a
  * redzone above it, so round it up to a PGD boundary.
@@ -242,6 +276,13 @@ void set_phys_to_machine(unsigned long pfn, unsigned long mfn)
         p2m_top[topidx][idx] = mfn;
 }
 
+unsigned long arbitrary_virt_to_mfn(void *vaddr)
+{
+        xmaddr_t maddr = arbitrary_virt_to_machine(vaddr);
+
+        return PFN_DOWN(maddr.maddr);
+}
+
 xmaddr_t arbitrary_virt_to_machine(void *vaddr)
 {
         unsigned long address = (unsigned long)vaddr;
@@ -458,28 +499,33 @@ pteval_t xen_pte_val(pte_t pte)
 {
         return pte_mfn_to_pfn(pte.pte);
 }
+PV_CALLEE_SAVE_REGS_THUNK(xen_pte_val);
 
 pgdval_t xen_pgd_val(pgd_t pgd)
 {
         return pte_mfn_to_pfn(pgd.pgd);
 }
+PV_CALLEE_SAVE_REGS_THUNK(xen_pgd_val);
 
 pte_t xen_make_pte(pteval_t pte)
 {
         pte = pte_pfn_to_mfn(pte);
         return native_make_pte(pte);
 }
+PV_CALLEE_SAVE_REGS_THUNK(xen_make_pte);
 
 pgd_t xen_make_pgd(pgdval_t pgd)
 {
         pgd = pte_pfn_to_mfn(pgd);
         return native_make_pgd(pgd);
 }
+PV_CALLEE_SAVE_REGS_THUNK(xen_make_pgd);
 
 pmdval_t xen_pmd_val(pmd_t pmd)
 {
         return pte_mfn_to_pfn(pmd.pmd);
 }
+PV_CALLEE_SAVE_REGS_THUNK(xen_pmd_val);
 
 void xen_set_pud_hyper(pud_t *ptr, pud_t val)
 {
@@ -556,12 +602,14 @@ pmd_t xen_make_pmd(pmdval_t pmd)
         pmd = pte_pfn_to_mfn(pmd);
         return native_make_pmd(pmd);
 }
+PV_CALLEE_SAVE_REGS_THUNK(xen_make_pmd);
 
 #if PAGETABLE_LEVELS == 4
 pudval_t xen_pud_val(pud_t pud)
 {
         return pte_mfn_to_pfn(pud.pud);
 }
+PV_CALLEE_SAVE_REGS_THUNK(xen_pud_val);
 
 pud_t xen_make_pud(pudval_t pud)
 {
@@ -569,6 +617,7 @@ pud_t xen_make_pud(pudval_t pud)
 
         return native_make_pud(pud);
 }
+PV_CALLEE_SAVE_REGS_THUNK(xen_make_pud);
 
 pgd_t *xen_get_user_pgd(pgd_t *pgd)
 {
@@ -1063,18 +1112,14 @@ static void drop_other_mm_ref(void *info)
         struct mm_struct *mm = info;
         struct mm_struct *active_mm;
 
-#ifdef CONFIG_X86_64
-        active_mm = read_pda(active_mm);
-#else
-        active_mm = __get_cpu_var(cpu_tlbstate).active_mm;
-#endif
+        active_mm = percpu_read(cpu_tlbstate.active_mm);
 
         if (active_mm == mm)
                 leave_mm(smp_processor_id());
 
         /* If this cpu still has a stale cr3 reference, then make sure
            it has been flushed. */
-        if (x86_read_percpu(xen_current_cr3) == __pa(mm->pgd)) {
+        if (percpu_read(xen_current_cr3) == __pa(mm->pgd)) {
                 load_cr3(swapper_pg_dir);
                 arch_flush_lazy_cpu_mode();
         }
@@ -1156,6 +1201,706 @@ void xen_exit_mmap(struct mm_struct *mm)
         spin_unlock(&mm->page_table_lock);
 }
 
+static __init void xen_pagetable_setup_start(pgd_t *base)
+{
+}
+
+static __init void xen_pagetable_setup_done(pgd_t *base)
+{
+        xen_setup_shared_info();
+}
+
+static void xen_write_cr2(unsigned long cr2)
+{
+        percpu_read(xen_vcpu)->arch.cr2 = cr2;
+}
+
+static unsigned long xen_read_cr2(void)
+{
+        return percpu_read(xen_vcpu)->arch.cr2;
+}
+
+unsigned long xen_read_cr2_direct(void)
+{
+        return percpu_read(xen_vcpu_info.arch.cr2);
+}
+
+static void xen_flush_tlb(void)
+{
+        struct mmuext_op *op;
+        struct multicall_space mcs;
+
+        preempt_disable();
+
+        mcs = xen_mc_entry(sizeof(*op));
+
+        op = mcs.args;
+        op->cmd = MMUEXT_TLB_FLUSH_LOCAL;
+        MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
+
+        xen_mc_issue(PARAVIRT_LAZY_MMU);
+
+        preempt_enable();
+}
+
+static void xen_flush_tlb_single(unsigned long addr)
+{
+        struct mmuext_op *op;
+        struct multicall_space mcs;
+
+        preempt_disable();
+
+        mcs = xen_mc_entry(sizeof(*op));
+        op = mcs.args;
+        op->cmd = MMUEXT_INVLPG_LOCAL;
+        op->arg1.linear_addr = addr & PAGE_MASK;
+        MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
+
+        xen_mc_issue(PARAVIRT_LAZY_MMU);
+
+        preempt_enable();
+}
+
+static void xen_flush_tlb_others(const struct cpumask *cpus,
+                                 struct mm_struct *mm, unsigned long va)
+{
+        struct {
+                struct mmuext_op op;
+                DECLARE_BITMAP(mask, NR_CPUS);
+        } *args;
+        struct multicall_space mcs;
+
+        BUG_ON(cpumask_empty(cpus));
+        BUG_ON(!mm);
+
+        mcs = xen_mc_entry(sizeof(*args));
+        args = mcs.args;
+        args->op.arg2.vcpumask = to_cpumask(args->mask);
+
+        /* Remove us, and any offline CPUS. */
+        cpumask_and(to_cpumask(args->mask), cpus, cpu_online_mask);
+        cpumask_clear_cpu(smp_processor_id(), to_cpumask(args->mask));
+
+        if (va == TLB_FLUSH_ALL) {
+                args->op.cmd = MMUEXT_TLB_FLUSH_MULTI;
+        } else {
+                args->op.cmd = MMUEXT_INVLPG_MULTI;
+                args->op.arg1.linear_addr = va;
+        }
+
+        MULTI_mmuext_op(mcs.mc, &args->op, 1, NULL, DOMID_SELF);
+
+        xen_mc_issue(PARAVIRT_LAZY_MMU);
+}
+
+static unsigned long xen_read_cr3(void)
+{
+        return percpu_read(xen_cr3);
+}
+
+static void set_current_cr3(void *v)
+{
+        percpu_write(xen_current_cr3, (unsigned long)v);
+}
+
+static void __xen_write_cr3(bool kernel, unsigned long cr3)
+{
+        struct mmuext_op *op;
+        struct multicall_space mcs;
+        unsigned long mfn;
+
+        if (cr3)
+                mfn = pfn_to_mfn(PFN_DOWN(cr3));
+        else
+                mfn = 0;
+
+        WARN_ON(mfn == 0 && kernel);
+
+        mcs = __xen_mc_entry(sizeof(*op));
+
+        op = mcs.args;
+        op->cmd = kernel ? MMUEXT_NEW_BASEPTR : MMUEXT_NEW_USER_BASEPTR;
+        op->arg1.mfn = mfn;
+
+        MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
+
+        if (kernel) {
+                percpu_write(xen_cr3, cr3);
+
+                /* Update xen_current_cr3 once the batch has actually
+                   been submitted. */
+                xen_mc_callback(set_current_cr3, (void *)cr3);
+        }
+}
+
+static void xen_write_cr3(unsigned long cr3)
+{
+        BUG_ON(preemptible());
+
+        xen_mc_batch();  /* disables interrupts */
+
+        /* Update while interrupts are disabled, so its atomic with
+           respect to ipis */
+        percpu_write(xen_cr3, cr3);
+
+        __xen_write_cr3(true, cr3);
+
+#ifdef CONFIG_X86_64
+        {
+                pgd_t *user_pgd = xen_get_user_pgd(__va(cr3));
+                if (user_pgd)
+                        __xen_write_cr3(false, __pa(user_pgd));
+                else
+                        __xen_write_cr3(false, 0);
+        }
+#endif
+
+        xen_mc_issue(PARAVIRT_LAZY_CPU);  /* interrupts restored */
+}
+
+static int xen_pgd_alloc(struct mm_struct *mm)
+{
+        pgd_t *pgd = mm->pgd;
+        int ret = 0;
+
+        BUG_ON(PagePinned(virt_to_page(pgd)));
+
+#ifdef CONFIG_X86_64
+        {
+                struct page *page = virt_to_page(pgd);
+                pgd_t *user_pgd;
+
+                BUG_ON(page->private != 0);
+
+                ret = -ENOMEM;
+
+                user_pgd = (pgd_t *)__get_free_page(GFP_KERNEL | __GFP_ZERO);
+                page->private = (unsigned long)user_pgd;
+
+                if (user_pgd != NULL) {
+                        user_pgd[pgd_index(VSYSCALL_START)] =
+                                __pgd(__pa(level3_user_vsyscall) | _PAGE_TABLE);
+                        ret = 0;
+                }
+
+                BUG_ON(PagePinned(virt_to_page(xen_get_user_pgd(pgd))));
+        }
+#endif
+
+        return ret;
+}
+
+static void xen_pgd_free(struct mm_struct *mm, pgd_t *pgd)
+{
+#ifdef CONFIG_X86_64
+        pgd_t *user_pgd = xen_get_user_pgd(pgd);
+
+        if (user_pgd)
+                free_page((unsigned long)user_pgd);
+#endif
+}
+
+#ifdef CONFIG_HIGHPTE
+static void *xen_kmap_atomic_pte(struct page *page, enum km_type type)
+{
+        pgprot_t prot = PAGE_KERNEL;
+
+        if (PagePinned(page))
+                prot = PAGE_KERNEL_RO;
+
+        if (0 && PageHighMem(page))
+                printk("mapping highpte %lx type %d prot %s\n",
+                       page_to_pfn(page), type,
+                       (unsigned long)pgprot_val(prot) & _PAGE_RW ? "WRITE" : "READ");
+
+        return kmap_atomic_prot(page, type, prot);
+}
+#endif
+
+#ifdef CONFIG_X86_32
+static __init pte_t mask_rw_pte(pte_t *ptep, pte_t pte)
+{
+        /* If there's an existing pte, then don't allow _PAGE_RW to be set */
+        if (pte_val_ma(*ptep) & _PAGE_PRESENT)
+                pte = __pte_ma(((pte_val_ma(*ptep) & _PAGE_RW) | ~_PAGE_RW) &
+                               pte_val_ma(pte));
+
+        return pte;
+}
+
+/* Init-time set_pte while constructing initial pagetables, which
+   doesn't allow RO pagetable pages to be remapped RW */
+static __init void xen_set_pte_init(pte_t *ptep, pte_t pte)
+{
+        pte = mask_rw_pte(ptep, pte);
+
+        xen_set_pte(ptep, pte);
+}
+#endif
+
+/* Early in boot, while setting up the initial pagetable, assume
+   everything is pinned. */
+static __init void xen_alloc_pte_init(struct mm_struct *mm, unsigned long pfn)
+{
+#ifdef CONFIG_FLATMEM
+        BUG_ON(mem_map);        /* should only be used early */
+#endif
+        make_lowmem_page_readonly(__va(PFN_PHYS(pfn)));
+}
+
+/* Early release_pte assumes that all pts are pinned, since there's
+   only init_mm and anything attached to that is pinned. */
+static void xen_release_pte_init(unsigned long pfn)
+{
+        make_lowmem_page_readwrite(__va(PFN_PHYS(pfn)));
+}
+
+static void pin_pagetable_pfn(unsigned cmd, unsigned long pfn)
+{
+        struct mmuext_op op;
+        op.cmd = cmd;
+        op.arg1.mfn = pfn_to_mfn(pfn);
+        if (HYPERVISOR_mmuext_op(&op, 1, NULL, DOMID_SELF))
+                BUG();
+}
+
+/* This needs to make sure the new pte page is pinned iff its being
+   attached to a pinned pagetable. */
+static void xen_alloc_ptpage(struct mm_struct *mm, unsigned long pfn, unsigned level)
+{
+        struct page *page = pfn_to_page(pfn);
+
+        if (PagePinned(virt_to_page(mm->pgd))) {
+                SetPagePinned(page);
+
+                vm_unmap_aliases();
+                if (!PageHighMem(page)) {
+                        make_lowmem_page_readonly(__va(PFN_PHYS((unsigned long)pfn)));
+                        if (level == PT_PTE && USE_SPLIT_PTLOCKS)
+                                pin_pagetable_pfn(MMUEXT_PIN_L1_TABLE, pfn);
+                } else {
+                        /* make sure there are no stray mappings of
+                           this page */
+                        kmap_flush_unused();
+                }
+        }
+}
+
+static void xen_alloc_pte(struct mm_struct *mm, unsigned long pfn)
+{
+        xen_alloc_ptpage(mm, pfn, PT_PTE);
+}
+
+static void xen_alloc_pmd(struct mm_struct *mm, unsigned long pfn)
+{
+        xen_alloc_ptpage(mm, pfn, PT_PMD);
+}
+
+/* This should never happen until we're OK to use struct page */
+static void xen_release_ptpage(unsigned long pfn, unsigned level)
+{
+        struct page *page = pfn_to_page(pfn);
+
+        if (PagePinned(page)) {
+                if (!PageHighMem(page)) {
+                        if (level == PT_PTE && USE_SPLIT_PTLOCKS)
+                                pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, pfn);
+                        make_lowmem_page_readwrite(__va(PFN_PHYS(pfn)));
+                }
+                ClearPagePinned(page);
+        }
+}
+
+static void xen_release_pte(unsigned long pfn)
+{
+        xen_release_ptpage(pfn, PT_PTE);
+}
+
+static void xen_release_pmd(unsigned long pfn)
+{
+        xen_release_ptpage(pfn, PT_PMD);
+}
+
+#if PAGETABLE_LEVELS == 4
+static void xen_alloc_pud(struct mm_struct *mm, unsigned long pfn)
+{
+        xen_alloc_ptpage(mm, pfn, PT_PUD);
+}
+
+static void xen_release_pud(unsigned long pfn)
+{
+        xen_release_ptpage(pfn, PT_PUD);
+}
+#endif
+
+void __init xen_reserve_top(void)
+{
+#ifdef CONFIG_X86_32
+        unsigned long top = HYPERVISOR_VIRT_START;
+        struct xen_platform_parameters pp;
+
+        if (HYPERVISOR_xen_version(XENVER_platform_parameters, &pp) == 0)
+                top = pp.virt_start;
+
+        reserve_top_address(-top);
+#endif  /* CONFIG_X86_32 */
+}
+
+/*
+ * Like __va(), but returns address in the kernel mapping (which is
+ * all we have until the physical memory mapping has been set up.
+ */
+static void *__ka(phys_addr_t paddr)
+{
+#ifdef CONFIG_X86_64
+        return (void *)(paddr + __START_KERNEL_map);
+#else
+        return __va(paddr);
+#endif
+}
+
+/* Convert a machine address to physical address */
+static unsigned long m2p(phys_addr_t maddr)
+{
+        phys_addr_t paddr;
+
+        maddr &= PTE_PFN_MASK;
+        paddr = mfn_to_pfn(maddr >> PAGE_SHIFT) << PAGE_SHIFT;
+
+        return paddr;
+}
+
+/* Convert a machine address to kernel virtual */
+static void *m2v(phys_addr_t maddr)
+{
+        return __ka(m2p(maddr));
+}
+
+static void set_page_prot(void *addr, pgprot_t prot)
+{
+        unsigned long pfn = __pa(addr) >> PAGE_SHIFT;
+        pte_t pte = pfn_pte(pfn, prot);
+
+        if (HYPERVISOR_update_va_mapping((unsigned long)addr, pte, 0))
+                BUG();
+}
+
+static __init void xen_map_identity_early(pmd_t *pmd, unsigned long max_pfn)
+{
+        unsigned pmdidx, pteidx;
+        unsigned ident_pte;
+        unsigned long pfn;
+
+        ident_pte = 0;
+        pfn = 0;
+        for (pmdidx = 0; pmdidx < PTRS_PER_PMD && pfn < max_pfn; pmdidx++) {
+                pte_t *pte_page;
+
+                /* Reuse or allocate a page of ptes */
+                if (pmd_present(pmd[pmdidx]))
+                        pte_page = m2v(pmd[pmdidx].pmd);
+                else {
+                        /* Check for free pte pages */
+                        if (ident_pte == ARRAY_SIZE(level1_ident_pgt))
+                                break;
+
+                        pte_page = &level1_ident_pgt[ident_pte];
+                        ident_pte += PTRS_PER_PTE;
+
+                        pmd[pmdidx] = __pmd(__pa(pte_page) | _PAGE_TABLE);
+                }
+
+                /* Install mappings */
+                for (pteidx = 0; pteidx < PTRS_PER_PTE; pteidx++, pfn++) {
+                        pte_t pte;
+
+                        if (pfn > max_pfn_mapped)
+                                max_pfn_mapped = pfn;
+
+                        if (!pte_none(pte_page[pteidx]))
+                                continue;
+
+                        pte = pfn_pte(pfn, PAGE_KERNEL_EXEC);
+                        pte_page[pteidx] = pte;
+                }
+        }
+
+        for (pteidx = 0; pteidx < ident_pte; pteidx += PTRS_PER_PTE)
+                set_page_prot(&level1_ident_pgt[pteidx], PAGE_KERNEL_RO);
+
+        set_page_prot(pmd, PAGE_KERNEL_RO);
+}
+
+#ifdef CONFIG_X86_64
+static void convert_pfn_mfn(void *v)
+{
+        pte_t *pte = v;
+        int i;
+
+        /* All levels are converted the same way, so just treat them
+           as ptes. */
+        for (i = 0; i < PTRS_PER_PTE; i++)
+                pte[i] = xen_make_pte(pte[i].pte);
+}
+
+/*
+ * Set up the inital kernel pagetable.
+ *
+ * We can construct this by grafting the Xen provided pagetable into
+ * head_64.S's preconstructed pagetables.  We copy the Xen L2's into
+ * level2_ident_pgt, level2_kernel_pgt and level2_fixmap_pgt.  This
+ * means that only the kernel has a physical mapping to start with -
+ * but that's enough to get __va working.  We need to fill in the rest
+ * of the physical mapping once some sort of allocator has been set
+ * up.
+ */
+__init pgd_t *xen_setup_kernel_pagetable(pgd_t *pgd,
+                                         unsigned long max_pfn)
+{
+        pud_t *l3;
+        pmd_t *l2;
+
+        /* Zap identity mapping */
+        init_level4_pgt[0] = __pgd(0);
+
+        /* Pre-constructed entries are in pfn, so convert to mfn */
+        convert_pfn_mfn(init_level4_pgt);
+        convert_pfn_mfn(level3_ident_pgt);
+        convert_pfn_mfn(level3_kernel_pgt);
+
+        l3 = m2v(pgd[pgd_index(__START_KERNEL_map)].pgd);
+        l2 = m2v(l3[pud_index(__START_KERNEL_map)].pud);
+
+        memcpy(level2_ident_pgt, l2, sizeof(pmd_t) * PTRS_PER_PMD);
+        memcpy(level2_kernel_pgt, l2, sizeof(pmd_t) * PTRS_PER_PMD);
+
+        l3 = m2v(pgd[pgd_index(__START_KERNEL_map + PMD_SIZE)].pgd);
+        l2 = m2v(l3[pud_index(__START_KERNEL_map + PMD_SIZE)].pud);
+        memcpy(level2_fixmap_pgt, l2, sizeof(pmd_t) * PTRS_PER_PMD);
+
+        /* Set up identity map */
+        xen_map_identity_early(level2_ident_pgt, max_pfn);
+
+        /* Make pagetable pieces RO */
+        set_page_prot(init_level4_pgt, PAGE_KERNEL_RO);
+        set_page_prot(level3_ident_pgt, PAGE_KERNEL_RO);
+        set_page_prot(level3_kernel_pgt, PAGE_KERNEL_RO);
+        set_page_prot(level3_user_vsyscall, PAGE_KERNEL_RO);
+        set_page_prot(level2_kernel_pgt, PAGE_KERNEL_RO);
+        set_page_prot(level2_fixmap_pgt, PAGE_KERNEL_RO);
+
+        /* Pin down new L4 */
+        pin_pagetable_pfn(MMUEXT_PIN_L4_TABLE,
+                          PFN_DOWN(__pa_symbol(init_level4_pgt)));
+
+        /* Unpin Xen-provided one */
+        pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
+
+        /* Switch over */
+        pgd = init_level4_pgt;
+
+        /*
+         * At this stage there can be no user pgd, and no page
+         * structure to attach it to, so make sure we just set kernel
+         * pgd.
+         */
+        xen_mc_batch();
+        __xen_write_cr3(true, __pa(pgd));
+        xen_mc_issue(PARAVIRT_LAZY_CPU);
+
+        reserve_early(__pa(xen_start_info->pt_base),
+                      __pa(xen_start_info->pt_base +
+                           xen_start_info->nr_pt_frames * PAGE_SIZE),
+                      "XEN PAGETABLES");
+
+        return pgd;
+}
+#else   /* !CONFIG_X86_64 */
+static pmd_t level2_kernel_pgt[PTRS_PER_PMD] __page_aligned_bss;
+
+__init pgd_t *xen_setup_kernel_pagetable(pgd_t *pgd,
+                                         unsigned long max_pfn)
+{
+        pmd_t *kernel_pmd;
+
+        init_pg_tables_start = __pa(pgd);
+        init_pg_tables_end = __pa(pgd) + xen_start_info->nr_pt_frames*PAGE_SIZE;
+        max_pfn_mapped = PFN_DOWN(init_pg_tables_end + 512*1024);
+
+        kernel_pmd = m2v(pgd[KERNEL_PGD_BOUNDARY].pgd);
+        memcpy(level2_kernel_pgt, kernel_pmd, sizeof(pmd_t) * PTRS_PER_PMD);
+
+        xen_map_identity_early(level2_kernel_pgt, max_pfn);
+
+        memcpy(swapper_pg_dir, pgd, sizeof(pgd_t) * PTRS_PER_PGD);
+        set_pgd(&swapper_pg_dir[KERNEL_PGD_BOUNDARY],
+                        __pgd(__pa(level2_kernel_pgt) | _PAGE_PRESENT));
+
+        set_page_prot(level2_kernel_pgt, PAGE_KERNEL_RO);
+        set_page_prot(swapper_pg_dir, PAGE_KERNEL_RO);
+        set_page_prot(empty_zero_page, PAGE_KERNEL_RO);
+
+        pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
+
+        xen_write_cr3(__pa(swapper_pg_dir));
+
+        pin_pagetable_pfn(MMUEXT_PIN_L3_TABLE, PFN_DOWN(__pa(swapper_pg_dir)));
+
+        return swapper_pg_dir;
+}
+#endif  /* CONFIG_X86_64 */
+
+static void xen_set_fixmap(unsigned idx, unsigned long phys, pgprot_t prot)
+{
+        pte_t pte;
+
+        phys >>= PAGE_SHIFT;
+
+        switch (idx) {
+        case FIX_BTMAP_END ... FIX_BTMAP_BEGIN:
+#ifdef CONFIG_X86_F00F_BUG
+        case FIX_F00F_IDT:
+#endif
+#ifdef CONFIG_X86_32
+        case FIX_WP_TEST:
+        case FIX_VDSO:
+# ifdef CONFIG_HIGHMEM
+        case FIX_KMAP_BEGIN ... FIX_KMAP_END:
+# endif
+#else
+        case VSYSCALL_LAST_PAGE ... VSYSCALL_FIRST_PAGE:
+#endif
+#ifdef CONFIG_X86_LOCAL_APIC
+        case FIX_APIC_BASE:     /* maps dummy local APIC */
+#endif
+                pte = pfn_pte(phys, prot);
+                break;
+
+        default:
+                pte = mfn_pte(phys, prot);
+                break;
+        }
+
+        __native_set_fixmap(idx, pte);
+
+#ifdef CONFIG_X86_64
+        /* Replicate changes to map the vsyscall page into the user
+           pagetable vsyscall mapping. */
+        if (idx >= VSYSCALL_LAST_PAGE && idx <= VSYSCALL_FIRST_PAGE) {
+                unsigned long vaddr = __fix_to_virt(idx);
+                set_pte_vaddr_pud(level3_user_vsyscall, vaddr, pte);
+        }
+#endif
+}
+
+__init void xen_post_allocator_init(void)
+{
+        pv_mmu_ops.set_pte = xen_set_pte;
+        pv_mmu_ops.set_pmd = xen_set_pmd;
+        pv_mmu_ops.set_pud = xen_set_pud;
+#if PAGETABLE_LEVELS == 4
+        pv_mmu_ops.set_pgd = xen_set_pgd;
+#endif
+
+        /* This will work as long as patching hasn't happened yet
+           (which it hasn't) */
+        pv_mmu_ops.alloc_pte = xen_alloc_pte;
+        pv_mmu_ops.alloc_pmd = xen_alloc_pmd;
+        pv_mmu_ops.release_pte = xen_release_pte;
+        pv_mmu_ops.release_pmd = xen_release_pmd;
+#if PAGETABLE_LEVELS == 4
+        pv_mmu_ops.alloc_pud = xen_alloc_pud;
+        pv_mmu_ops.release_pud = xen_release_pud;
+#endif
+
+#ifdef CONFIG_X86_64
+        SetPagePinned(virt_to_page(level3_user_vsyscall));
+#endif
+        xen_mark_init_mm_pinned();
+}
+
+
+const struct pv_mmu_ops xen_mmu_ops __initdata = {
+        .pagetable_setup_start = xen_pagetable_setup_start,
+        .pagetable_setup_done = xen_pagetable_setup_done,
+
+        .read_cr2 = xen_read_cr2,
+        .write_cr2 = xen_write_cr2,
+
+        .read_cr3 = xen_read_cr3,
+        .write_cr3 = xen_write_cr3,
+
+        .flush_tlb_user = xen_flush_tlb,
+        .flush_tlb_kernel = xen_flush_tlb,
+        .flush_tlb_single = xen_flush_tlb_single,
+        .flush_tlb_others = xen_flush_tlb_others,
+
+        .pte_update = paravirt_nop,
+        .pte_update_defer = paravirt_nop,
+
+        .pgd_alloc = xen_pgd_alloc,
+        .pgd_free = xen_pgd_free,
+
+        .alloc_pte = xen_alloc_pte_init,
+        .release_pte = xen_release_pte_init,
+        .alloc_pmd = xen_alloc_pte_init,
+        .alloc_pmd_clone = paravirt_nop,
+        .release_pmd = xen_release_pte_init,
+
+#ifdef CONFIG_HIGHPTE
+        .kmap_atomic_pte = xen_kmap_atomic_pte,
+#endif
+
+#ifdef CONFIG_X86_64
+        .set_pte = xen_set_pte,
+#else
+        .set_pte = xen_set_pte_init,
+#endif
+        .set_pte_at = xen_set_pte_at,
+        .set_pmd = xen_set_pmd_hyper,
+
+        .ptep_modify_prot_start = __ptep_modify_prot_start,
+        .ptep_modify_prot_commit = __ptep_modify_prot_commit,
+
+        .pte_val = PV_CALLEE_SAVE(xen_pte_val),
+        .pgd_val = PV_CALLEE_SAVE(xen_pgd_val),
+
+        .make_pte = PV_CALLEE_SAVE(xen_make_pte),
+        .make_pgd = PV_CALLEE_SAVE(xen_make_pgd),
+
+#ifdef CONFIG_X86_PAE
+        .set_pte_atomic = xen_set_pte_atomic,
+        .set_pte_present = xen_set_pte_at,
+        .pte_clear = xen_pte_clear,
+        .pmd_clear = xen_pmd_clear,
+#endif  /* CONFIG_X86_PAE */
+        .set_pud = xen_set_pud_hyper,
+
+        .make_pmd = PV_CALLEE_SAVE(xen_make_pmd),
+        .pmd_val = PV_CALLEE_SAVE(xen_pmd_val),
+
+#if PAGETABLE_LEVELS == 4
+        .pud_val = PV_CALLEE_SAVE(xen_pud_val),
+        .make_pud = PV_CALLEE_SAVE(xen_make_pud),
+        .set_pgd = xen_set_pgd_hyper,
+
+        .alloc_pud = xen_alloc_pte_init,
+        .release_pud = xen_release_pte_init,
+#endif  /* PAGETABLE_LEVELS == 4 */
+
+        .activate_mm = xen_activate_mm,
+        .dup_mmap = xen_dup_mmap,
+        .exit_mmap = xen_exit_mmap,
+
+        .lazy_mode = {
+                .enter = paravirt_enter_lazy_mmu,
+                .leave = xen_leave_lazy,
+        },
+
+        .set_fixmap = xen_set_fixmap,
+};
+
+
 #ifdef CONFIG_XEN_DEBUG_FS
 
 static struct dentry *d_mmu_debug;
diff --git a/arch/x86/xen/mmu.h b/arch/x86/xen/mmu.h
index 98d71659da5a..24d1b44a337d 100644
--- a/arch/x86/xen/mmu.h
+++ b/arch/x86/xen/mmu.h
@@ -54,4 +54,7 @@ pte_t xen_ptep_modify_prot_start(struct mm_struct *mm, unsigned long addr, pte_t
 void  xen_ptep_modify_prot_commit(struct mm_struct *mm, unsigned long addr,
                                   pte_t *ptep, pte_t pte);
 
+unsigned long xen_read_cr2_direct(void);
+
+extern const struct pv_mmu_ops xen_mmu_ops;
 #endif  /* _XEN_MMU_H */
diff --git a/arch/x86/xen/multicalls.c b/arch/x86/xen/multicalls.c
index c738644b5435..8bff7e7c290b 100644
--- a/arch/x86/xen/multicalls.c
+++ b/arch/x86/xen/multicalls.c
@@ -39,6 +39,7 @@ struct mc_buffer {
         struct multicall_entry entries[MC_BATCH];
 #if MC_DEBUG
         struct multicall_entry debug[MC_BATCH];
+        void *caller[MC_BATCH];
 #endif
         unsigned char args[MC_ARGS];
         struct callback {
@@ -154,11 +155,12 @@ void xen_mc_flush(void)
                                ret, smp_processor_id());
                         dump_stack();
                         for (i = 0; i < b->mcidx; i++) {
-                                printk(KERN_DEBUG "  call %2d/%d: op=%lu arg=[%lx] result=%ld\n",
+                                printk(KERN_DEBUG "  call %2d/%d: op=%lu arg=[%lx] result=%ld\t%pF\n",
                                        i+1, b->mcidx,
                                        b->debug[i].op,
                                        b->debug[i].args[0],
-                                       b->entries[i].result);
+                                       b->entries[i].result,
+                                       b->caller[i]);
                         }
                 }
 #endif
@@ -168,8 +170,6 @@ void xen_mc_flush(void)
         } else
                 BUG_ON(b->argidx != 0);
 
-        local_irq_restore(flags);
-
         for (i = 0; i < b->cbidx; i++) {
                 struct callback *cb = &b->callbacks[i];
 
@@ -177,7 +177,9 @@ void xen_mc_flush(void)
         }
         b->cbidx = 0;
 
-        BUG_ON(ret);
+        local_irq_restore(flags);
+
+        WARN_ON(ret);
 }
 
 struct multicall_space __xen_mc_entry(size_t args)
@@ -197,6 +199,9 @@ struct multicall_space __xen_mc_entry(size_t args)
         }
 
         ret.mc = &b->entries[b->mcidx];
+#ifdef MC_DEBUG
+        b->caller[b->mcidx] = __builtin_return_address(0);
+#endif
         b->mcidx++;
         ret.args = &b->args[argidx];
         b->argidx = argidx + args;
diff --git a/arch/x86/xen/multicalls.h b/arch/x86/xen/multicalls.h
index fa3e10725d98..9e565da5d1f7 100644
--- a/arch/x86/xen/multicalls.h
+++ b/arch/x86/xen/multicalls.h
@@ -41,7 +41,7 @@ static inline void xen_mc_issue(unsigned mode)
                 xen_mc_flush();
 
         /* restore flags saved in xen_mc_batch */
-        local_irq_restore(x86_read_percpu(xen_mc_irq_flags));
+        local_irq_restore(percpu_read(xen_mc_irq_flags));
 }
 
 /* Set up a callback to be called when the current batch is flushed */
diff --git a/arch/x86/xen/smp.c b/arch/x86/xen/smp.c
index c44e2069c7c7..8d470562ffc9 100644
--- a/arch/x86/xen/smp.c
+++ b/arch/x86/xen/smp.c
@@ -50,11 +50,7 @@ static irqreturn_t xen_call_function_single_interrupt(int irq, void *dev_id);
  */
 static irqreturn_t xen_reschedule_interrupt(int irq, void *dev_id)
 {
-#ifdef CONFIG_X86_32
-        __get_cpu_var(irq_stat).irq_resched_count++;
-#else
-        add_pda(irq_resched_count, 1);
-#endif
+        inc_irq_stat(irq_resched_count);
 
         return IRQ_HANDLED;
 }
@@ -78,7 +74,7 @@ static __cpuinit void cpu_bringup(void)
         xen_setup_cpu_clockevents();
 
         cpu_set(cpu, cpu_online_map);
-        x86_write_percpu(cpu_state, CPU_ONLINE);
+        percpu_write(cpu_state, CPU_ONLINE);
         wmb();
 
         /* We can take interrupts now: we're officially "up". */
@@ -174,7 +170,7 @@ static void __init xen_smp_prepare_boot_cpu(void)
 
         /* We've switched to the "real" per-cpu gdt, so make sure the
            old memory can be recycled */
-        make_lowmem_page_readwrite(&per_cpu_var(gdt_page));
+        make_lowmem_page_readwrite(xen_initial_gdt);
 
         xen_setup_vcpu_info_placement();
 }
@@ -223,6 +219,7 @@ cpu_initialize_context(unsigned int cpu, struct task_struct *idle)
 {
         struct vcpu_guest_context *ctxt;
         struct desc_struct *gdt;
+        unsigned long gdt_mfn;
 
         if (cpumask_test_and_set_cpu(cpu, xen_cpu_initialized_map))
                 return 0;
@@ -239,6 +236,8 @@ cpu_initialize_context(unsigned int cpu, struct task_struct *idle)
         ctxt->user_regs.ss = __KERNEL_DS;
 #ifdef CONFIG_X86_32
         ctxt->user_regs.fs = __KERNEL_PERCPU;
+#else
+        ctxt->gs_base_kernel = per_cpu_offset(cpu);
 #endif
         ctxt->user_regs.eip = (unsigned long)cpu_bringup_and_idle;
         ctxt->user_regs.eflags = 0x1000; /* IOPL_RING1 */
@@ -250,9 +249,12 @@ cpu_initialize_context(unsigned int cpu, struct task_struct *idle)
         ctxt->ldt_ents = 0;
 
         BUG_ON((unsigned long)gdt & ~PAGE_MASK);
+
+        gdt_mfn = arbitrary_virt_to_mfn(gdt);
         make_lowmem_page_readonly(gdt);
+        make_lowmem_page_readonly(mfn_to_virt(gdt_mfn));
 
-        ctxt->gdt_frames[0] = virt_to_mfn(gdt);
+        ctxt->gdt_frames[0] = gdt_mfn;
         ctxt->gdt_ents      = GDT_ENTRIES;
 
         ctxt->user_regs.cs = __KERNEL_CS;
@@ -283,23 +285,14 @@ static int __cpuinit xen_cpu_up(unsigned int cpu)
         struct task_struct *idle = idle_task(cpu);
         int rc;
 
-#ifdef CONFIG_X86_64
-        /* Allocate node local memory for AP pdas */
-        WARN_ON(cpu == 0);
-        if (cpu > 0) {
-                rc = get_local_pda(cpu);
-                if (rc)
-                        return rc;
-        }
-#endif
-
-#ifdef CONFIG_X86_32
-        init_gdt(cpu);
         per_cpu(current_task, cpu) = idle;
+#ifdef CONFIG_X86_32
         irq_ctx_init(cpu);
 #else
-        cpu_pda(cpu)->pcurrent = idle;
         clear_tsk_thread_flag(idle, TIF_FORK);
+        per_cpu(kernel_stack, cpu) =
+                (unsigned long)task_stack_page(idle) -
+                KERNEL_STACK_OFFSET + THREAD_SIZE;
 #endif
         xen_setup_timer(cpu);
         xen_init_lock_cpu(cpu);
@@ -445,11 +438,7 @@ static irqreturn_t xen_call_function_interrupt(int irq, void *dev_id)
 {
         irq_enter();
         generic_smp_call_function_interrupt();
-#ifdef CONFIG_X86_32
-        __get_cpu_var(irq_stat).irq_call_count++;
-#else
-        add_pda(irq_call_count, 1);
-#endif
+        inc_irq_stat(irq_call_count);
         irq_exit();
 
         return IRQ_HANDLED;
@@ -459,11 +448,7 @@ static irqreturn_t xen_call_function_single_interrupt(int irq, void *dev_id)
 {
         irq_enter();
         generic_smp_call_function_single_interrupt();
-#ifdef CONFIG_X86_32
-        __get_cpu_var(irq_stat).irq_call_count++;
-#else
-        add_pda(irq_call_count, 1);
-#endif
+        inc_irq_stat(irq_call_count);
         irq_exit();
 
         return IRQ_HANDLED;
diff --git a/arch/x86/xen/suspend.c b/arch/x86/xen/suspend.c
index 212ffe012b76..95be7b434724 100644
--- a/arch/x86/xen/suspend.c
+++ b/arch/x86/xen/suspend.c
@@ -6,6 +6,7 @@
 
 #include <asm/xen/hypercall.h>
 #include <asm/xen/page.h>
+#include <asm/fixmap.h>
 
 #include "xen-ops.h"
 #include "mmu.h"
diff --git a/arch/x86/xen/xen-asm.S b/arch/x86/xen/xen-asm.S
new file mode 100644
index 000000000000..79d7362ad6d1
--- /dev/null
+++ b/arch/x86/xen/xen-asm.S
@@ -0,0 +1,142 @@
+/*
+ * Asm versions of Xen pv-ops, suitable for either direct use or
+ * inlining.  The inline versions are the same as the direct-use
+ * versions, with the pre- and post-amble chopped off.
+ *
+ * This code is encoded for size rather than absolute efficiency, with
+ * a view to being able to inline as much as possible.
+ *
+ * We only bother with direct forms (ie, vcpu in percpu data) of the
+ * operations here; the indirect forms are better handled in C, since
+ * they're generally too large to inline anyway.
+ */
+
+#include <asm/asm-offsets.h>
+#include <asm/percpu.h>
+#include <asm/processor-flags.h>
+
+#include "xen-asm.h"
+
+/*
+ * Enable events.  This clears the event mask and tests the pending
+ * event status with one and operation.  If there are pending events,
+ * then enter the hypervisor to get them handled.
+ */
+ENTRY(xen_irq_enable_direct)
+        /* Unmask events */
+        movb $0, PER_CPU_VAR(xen_vcpu_info) + XEN_vcpu_info_mask
+
+        /*
+         * Preempt here doesn't matter because that will deal with any
+         * pending interrupts.  The pending check may end up being run
+         * on the wrong CPU, but that doesn't hurt.
+         */
+
+        /* Test for pending */
+        testb $0xff, PER_CPU_VAR(xen_vcpu_info) + XEN_vcpu_info_pending
+        jz 1f
+
+2:      call check_events
+1:
+ENDPATCH(xen_irq_enable_direct)
+        ret
+        ENDPROC(xen_irq_enable_direct)
+        RELOC(xen_irq_enable_direct, 2b+1)
+
+
+/*
+ * Disabling events is simply a matter of making the event mask
+ * non-zero.
+ */
+ENTRY(xen_irq_disable_direct)
+        movb $1, PER_CPU_VAR(xen_vcpu_info) + XEN_vcpu_info_mask
+ENDPATCH(xen_irq_disable_direct)
+        ret
+        ENDPROC(xen_irq_disable_direct)
+        RELOC(xen_irq_disable_direct, 0)
+
+/*
+ * (xen_)save_fl is used to get the current interrupt enable status.
+ * Callers expect the status to be in X86_EFLAGS_IF, and other bits
+ * may be set in the return value.  We take advantage of this by
+ * making sure that X86_EFLAGS_IF has the right value (and other bits
+ * in that byte are 0), but other bits in the return value are
+ * undefined.  We need to toggle the state of the bit, because Xen and
+ * x86 use opposite senses (mask vs enable).
+ */
+ENTRY(xen_save_fl_direct)
+        testb $0xff, PER_CPU_VAR(xen_vcpu_info) + XEN_vcpu_info_mask
+        setz %ah
+        addb %ah, %ah
+ENDPATCH(xen_save_fl_direct)
+        ret
+        ENDPROC(xen_save_fl_direct)
+        RELOC(xen_save_fl_direct, 0)
+
+
+/*
+ * In principle the caller should be passing us a value return from
+ * xen_save_fl_direct, but for robustness sake we test only the
+ * X86_EFLAGS_IF flag rather than the whole byte. After setting the
+ * interrupt mask state, it checks for unmasked pending events and
+ * enters the hypervisor to get them delivered if so.
+ */
+ENTRY(xen_restore_fl_direct)
+#ifdef CONFIG_X86_64
+        testw $X86_EFLAGS_IF, %di
+#else
+        testb $X86_EFLAGS_IF>>8, %ah
+#endif
+        setz PER_CPU_VAR(xen_vcpu_info) + XEN_vcpu_info_mask
+        /*
+         * Preempt here doesn't matter because that will deal with any
+         * pending interrupts.  The pending check may end up being run
+         * on the wrong CPU, but that doesn't hurt.
+         */
+
+        /* check for unmasked and pending */
+        cmpw $0x0001, PER_CPU_VAR(xen_vcpu_info) + XEN_vcpu_info_pending
+        jz 1f
+2:      call check_events
+1:
+ENDPATCH(xen_restore_fl_direct)
+        ret
+        ENDPROC(xen_restore_fl_direct)
+        RELOC(xen_restore_fl_direct, 2b+1)
+
+
+/*
+ * Force an event check by making a hypercall, but preserve regs
+ * before making the call.
+ */
+check_events:
+#ifdef CONFIG_X86_32
+        push %eax
+        push %ecx
+        push %edx
+        call xen_force_evtchn_callback
+        pop %edx
+        pop %ecx
+        pop %eax
+#else
+        push %rax
+        push %rcx
+        push %rdx
+        push %rsi
+        push %rdi
+        push %r8
+        push %r9
+        push %r10
+        push %r11
+        call xen_force_evtchn_callback
+        pop %r11
+        pop %r10
+        pop %r9
+        pop %r8
+        pop %rdi
+        pop %rsi
+        pop %rdx
+        pop %rcx
+        pop %rax
+#endif
+        ret
diff --git a/arch/x86/xen/xen-asm.h b/arch/x86/xen/xen-asm.h
new file mode 100644
index 000000000000..465276467a47
--- /dev/null
+++ b/arch/x86/xen/xen-asm.h
@@ -0,0 +1,12 @@
+#ifndef _XEN_XEN_ASM_H
+#define _XEN_XEN_ASM_H
+
+#include <linux/linkage.h>
+
+#define RELOC(x, v)     .globl x##_reloc; x##_reloc=v
+#define ENDPATCH(x)     .globl x##_end; x##_end=.
+
+/* Pseudo-flag used for virtual NMI, which we don't implement yet */
+#define XEN_EFLAGS_NMI  0x80000000
+
+#endif
diff --git a/arch/x86/xen/xen-asm_32.S b/arch/x86/xen/xen-asm_32.S
index 42786f59d9c0..88e15deb8b82 100644
--- a/arch/x86/xen/xen-asm_32.S
+++ b/arch/x86/xen/xen-asm_32.S
@@ -1,117 +1,43 @@
 /*
-        Asm versions of Xen pv-ops, suitable for either direct use or inlining.
-        The inline versions are the same as the direct-use versions, with the
-        pre- and post-amble chopped off.
-
-        This code is encoded for size rather than absolute efficiency,
-        with a view to being able to inline as much as possible.
-
-        We only bother with direct forms (ie, vcpu in pda) of the operations
-        here; the indirect forms are better handled in C, since they're
-        generally too large to inline anyway.
+ * Asm versions of Xen pv-ops, suitable for either direct use or
+ * inlining.  The inline versions are the same as the direct-use
+ * versions, with the pre- and post-amble chopped off.
+ *
+ * This code is encoded for size rather than absolute efficiency, with
+ * a view to being able to inline as much as possible.
+ *
+ * We only bother with direct forms (ie, vcpu in pda) of the
+ * operations here; the indirect forms are better handled in C, since
+ * they're generally too large to inline anyway.
  */
 
-#include <linux/linkage.h>
-
-#include <asm/asm-offsets.h>
 #include <asm/thread_info.h>
-#include <asm/percpu.h>
 #include <asm/processor-flags.h>
 #include <asm/segment.h>
 
 #include <xen/interface/xen.h>
 
-#define RELOC(x, v)     .globl x##_reloc; x##_reloc=v
-#define ENDPATCH(x)     .globl x##_end; x##_end=.
-
-/* Pseudo-flag used for virtual NMI, which we don't implement yet */
-#define XEN_EFLAGS_NMI  0x80000000
-
-/*
-        Enable events.  This clears the event mask and tests the pending
-        event status with one and operation.  If there are pending
-        events, then enter the hypervisor to get them handled.
- */
-ENTRY(xen_irq_enable_direct)
-        /* Unmask events */
-        movb $0, PER_CPU_VAR(xen_vcpu_info)+XEN_vcpu_info_mask
-
-        /* Preempt here doesn't matter because that will deal with
-           any pending interrupts.  The pending check may end up being
-           run on the wrong CPU, but that doesn't hurt. */
-
-        /* Test for pending */
-        testb $0xff, PER_CPU_VAR(xen_vcpu_info)+XEN_vcpu_info_pending
-        jz 1f
-
-2:      call check_events
-1:
-ENDPATCH(xen_irq_enable_direct)
-        ret
-        ENDPROC(xen_irq_enable_direct)
-        RELOC(xen_irq_enable_direct, 2b+1)
-
-
-/*
-        Disabling events is simply a matter of making the event mask
-        non-zero.
- */
-ENTRY(xen_irq_disable_direct)
-        movb $1, PER_CPU_VAR(xen_vcpu_info)+XEN_vcpu_info_mask
-ENDPATCH(xen_irq_disable_direct)
-        ret
-        ENDPROC(xen_irq_disable_direct)
-        RELOC(xen_irq_disable_direct, 0)
+#include "xen-asm.h"
 
 /*
-        (xen_)save_fl is used to get the current interrupt enable status.
-        Callers expect the status to be in X86_EFLAGS_IF, and other bits
-        may be set in the return value.  We take advantage of this by
-        making sure that X86_EFLAGS_IF has the right value (and other bits
-        in that byte are 0), but other bits in the return value are
-        undefined.  We need to toggle the state of the bit, because
-        Xen and x86 use opposite senses (mask vs enable).
+ * Force an event check by making a hypercall, but preserve regs
+ * before making the call.
  */
-ENTRY(xen_save_fl_direct)
-        testb $0xff, PER_CPU_VAR(xen_vcpu_info)+XEN_vcpu_info_mask
-        setz %ah
-        addb %ah,%ah
-ENDPATCH(xen_save_fl_direct)
-        ret
-        ENDPROC(xen_save_fl_direct)
-        RELOC(xen_save_fl_direct, 0)
-
-
-/*
-        In principle the caller should be passing us a value return
-        from xen_save_fl_direct, but for robustness sake we test only
-        the X86_EFLAGS_IF flag rather than the whole byte. After
-        setting the interrupt mask state, it checks for unmasked
-        pending events and enters the hypervisor to get them delivered
-        if so.
- */
-ENTRY(xen_restore_fl_direct)
-        testb $X86_EFLAGS_IF>>8, %ah
-        setz PER_CPU_VAR(xen_vcpu_info)+XEN_vcpu_info_mask
-        /* Preempt here doesn't matter because that will deal with
-           any pending interrupts.  The pending check may end up being
-           run on the wrong CPU, but that doesn't hurt. */
-
-        /* check for unmasked and pending */
-        cmpw $0x0001, PER_CPU_VAR(xen_vcpu_info)+XEN_vcpu_info_pending
-        jz 1f
-2:      call check_events
-1:
-ENDPATCH(xen_restore_fl_direct)
+check_events:
+        push %eax
+        push %ecx
+        push %edx
+        call xen_force_evtchn_callback
+        pop %edx
+        pop %ecx
+        pop %eax
         ret
-        ENDPROC(xen_restore_fl_direct)
-        RELOC(xen_restore_fl_direct, 2b+1)
 
 /*
-        We can't use sysexit directly, because we're not running in ring0.
-        But we can easily fake it up using iret.  Assuming xen_sysexit
-        is jumped to with a standard stack frame, we can just strip it
-        back to a standard iret frame and use iret.
+ * We can't use sysexit directly, because we're not running in ring0.
+ * But we can easily fake it up using iret.  Assuming xen_sysexit is
+ * jumped to with a standard stack frame, we can just strip it back to
+ * a standard iret frame and use iret.
  */
 ENTRY(xen_sysexit)
         movl PT_EAX(%esp), %eax                 /* Shouldn't be necessary? */
@@ -122,33 +48,31 @@ ENTRY(xen_sysexit)
 ENDPROC(xen_sysexit)
 
 /*
-        This is run where a normal iret would be run, with the same stack setup:
-              8: eflags
-              4: cs
-        esp-> 0: eip
-
-        This attempts to make sure that any pending events are dealt
-        with on return to usermode, but there is a small window in
-        which an event can happen just before entering usermode.  If
-        the nested interrupt ends up setting one of the TIF_WORK_MASK
-        pending work flags, they will not be tested again before
-        returning to usermode. This means that a process can end up
-        with pending work, which will be unprocessed until the process
-        enters and leaves the kernel again, which could be an
-        unbounded amount of time.  This means that a pending signal or
-        reschedule event could be indefinitely delayed.
-
-        The fix is to notice a nested interrupt in the critical
-        window, and if one occurs, then fold the nested interrupt into
-        the current interrupt stack frame, and re-process it
-        iteratively rather than recursively.  This means that it will
-        exit via the normal path, and all pending work will be dealt
-        with appropriately.
-
-        Because the nested interrupt handler needs to deal with the
-        current stack state in whatever form its in, we keep things
-        simple by only using a single register which is pushed/popped
-        on the stack.
+ * This is run where a normal iret would be run, with the same stack setup:
+ *      8: eflags
+ *      4: cs
+ *      esp-> 0: eip
+ *
+ * This attempts to make sure that any pending events are dealt with
+ * on return to usermode, but there is a small window in which an
+ * event can happen just before entering usermode.  If the nested
+ * interrupt ends up setting one of the TIF_WORK_MASK pending work
+ * flags, they will not be tested again before returning to
+ * usermode. This means that a process can end up with pending work,
+ * which will be unprocessed until the process enters and leaves the
+ * kernel again, which could be an unbounded amount of time.  This
+ * means that a pending signal or reschedule event could be
+ * indefinitely delayed.
+ *
+ * The fix is to notice a nested interrupt in the critical window, and
+ * if one occurs, then fold the nested interrupt into the current
+ * interrupt stack frame, and re-process it iteratively rather than
+ * recursively.  This means that it will exit via the normal path, and
+ * all pending work will be dealt with appropriately.
+ *
+ * Because the nested interrupt handler needs to deal with the current
+ * stack state in whatever form its in, we keep things simple by only
+ * using a single register which is pushed/popped on the stack.
  */
 ENTRY(xen_iret)
         /* test eflags for special cases */
@@ -158,13 +82,15 @@ ENTRY(xen_iret)
         push %eax
         ESP_OFFSET=4    # bytes pushed onto stack
 
-        /* Store vcpu_info pointer for easy access.  Do it this
-           way to avoid having to reload %fs */
+        /*
+         * Store vcpu_info pointer for easy access.  Do it this way to
+         * avoid having to reload %fs
+         */
 #ifdef CONFIG_SMP
         GET_THREAD_INFO(%eax)
-        movl TI_cpu(%eax),%eax
-        movl __per_cpu_offset(,%eax,4),%eax
-        mov per_cpu__xen_vcpu(%eax),%eax
+        movl TI_cpu(%eax), %eax
+        movl __per_cpu_offset(,%eax,4), %eax
+        mov per_cpu__xen_vcpu(%eax), %eax
 #else
         movl per_cpu__xen_vcpu, %eax
 #endif
@@ -172,37 +98,46 @@ ENTRY(xen_iret)
         /* check IF state we're restoring */
         testb $X86_EFLAGS_IF>>8, 8+1+ESP_OFFSET(%esp)
 
-        /* Maybe enable events.  Once this happens we could get a
-           recursive event, so the critical region starts immediately
-           afterwards.  However, if that happens we don't end up
-           resuming the code, so we don't have to be worried about
-           being preempted to another CPU. */
+        /*
+         * Maybe enable events.  Once this happens we could get a
+         * recursive event, so the critical region starts immediately
+         * afterwards.  However, if that happens we don't end up
+         * resuming the code, so we don't have to be worried about
+         * being preempted to another CPU.
+         */
         setz XEN_vcpu_info_mask(%eax)
 xen_iret_start_crit:
 
         /* check for unmasked and pending */
         cmpw $0x0001, XEN_vcpu_info_pending(%eax)
 
-        /* If there's something pending, mask events again so we
-           can jump back into xen_hypervisor_callback */
+        /*
+         * If there's something pending, mask events again so we can
+         * jump back into xen_hypervisor_callback
+         */
         sete XEN_vcpu_info_mask(%eax)
 
         popl %eax
 
-        /* From this point on the registers are restored and the stack
-           updated, so we don't need to worry about it if we're preempted */
+        /*
+         * From this point on the registers are restored and the stack
+         * updated, so we don't need to worry about it if we're
+         * preempted
+         */
 iret_restore_end:
 
-        /* Jump to hypervisor_callback after fixing up the stack.
-           Events are masked, so jumping out of the critical
-           region is OK. */
+        /*
+         * Jump to hypervisor_callback after fixing up the stack.
+         * Events are masked, so jumping out of the critical region is
+         * OK.
+         */
         je xen_hypervisor_callback
 
 1:      iret
 xen_iret_end_crit:
-.section __ex_table,"a"
+.section __ex_table, "a"
         .align 4
-        .long 1b,iret_exc
+        .long 1b, iret_exc
 .previous
 
 hyper_iret:
@@ -212,55 +147,55 @@ hyper_iret:
         .globl xen_iret_start_crit, xen_iret_end_crit
 
 /*
-   This is called by xen_hypervisor_callback in entry.S when it sees
-   that the EIP at the time of interrupt was between xen_iret_start_crit
-   and xen_iret_end_crit.  We're passed the EIP in %eax so we can do
-   a more refined determination of what to do.
-
-   The stack format at this point is:
-        ----------------
-         ss             : (ss/esp may be present if we came from usermode)
-         esp            :
-         eflags         }  outer exception info
-         cs             }
-         eip            }
-        ---------------- <- edi (copy dest)
-         eax            :  outer eax if it hasn't been restored
-        ----------------
-         eflags         }  nested exception info
-         cs             }   (no ss/esp because we're nested
-         eip            }    from the same ring)
-         orig_eax       }<- esi (copy src)
-         - - - - - - - -
-         fs             }
-         es             }
-         ds             }  SAVE_ALL state
-         eax            }
-          :             :
-         ebx            }<- esp
-        ----------------
-
-   In order to deliver the nested exception properly, we need to shift
-   everything from the return addr up to the error code so it
-   sits just under the outer exception info.  This means that when we
-   handle the exception, we do it in the context of the outer exception
-   rather than starting a new one.
-
-   The only caveat is that if the outer eax hasn't been
-   restored yet (ie, it's still on stack), we need to insert
-   its value into the SAVE_ALL state before going on, since
-   it's usermode state which we eventually need to restore.
+ * This is called by xen_hypervisor_callback in entry.S when it sees
+ * that the EIP at the time of interrupt was between
+ * xen_iret_start_crit and xen_iret_end_crit.  We're passed the EIP in
+ * %eax so we can do a more refined determination of what to do.
+ *
+ * The stack format at this point is:
+ *      ----------------
+ *       ss             : (ss/esp may be present if we came from usermode)
+ *       esp            :
+ *       eflags         }  outer exception info
+ *       cs             }
+ *       eip            }
+ *      ---------------- <- edi (copy dest)
+ *       eax            :  outer eax if it hasn't been restored
+ *      ----------------
+ *       eflags         }  nested exception info
+ *       cs             }   (no ss/esp because we're nested
+ *       eip            }    from the same ring)
+ *       orig_eax       }<- esi (copy src)
+ *       - - - - - - - -
+ *       fs             }
+ *       es             }
+ *       ds             }  SAVE_ALL state
+ *       eax            }
+ *        :             :
+ *       ebx            }<- esp
+ *      ----------------
+ *
+ * In order to deliver the nested exception properly, we need to shift
+ * everything from the return addr up to the error code so it sits
+ * just under the outer exception info.  This means that when we
+ * handle the exception, we do it in the context of the outer
+ * exception rather than starting a new one.
+ *
+ * The only caveat is that if the outer eax hasn't been restored yet
+ * (ie, it's still on stack), we need to insert its value into the
+ * SAVE_ALL state before going on, since it's usermode state which we
+ * eventually need to restore.
  */
 ENTRY(xen_iret_crit_fixup)
         /*
-           Paranoia: Make sure we're really coming from kernel space.
-           One could imagine a case where userspace jumps into the
-           critical range address, but just before the CPU delivers a GP,
-           it decides to deliver an interrupt instead.  Unlikely?
-           Definitely.  Easy to avoid?  Yes.  The Intel documents
-           explicitly say that the reported EIP for a bad jump is the
-           jump instruction itself, not the destination, but some virtual
-           environments get this wrong.
+         * Paranoia: Make sure we're really coming from kernel space.
+         * One could imagine a case where userspace jumps into the
+         * critical range address, but just before the CPU delivers a
+         * GP, it decides to deliver an interrupt instead.  Unlikely?
+         * Definitely.  Easy to avoid?  Yes.  The Intel documents
+         * explicitly say that the reported EIP for a bad jump is the
+         * jump instruction itself, not the destination, but some
+         * virtual environments get this wrong.
          */
         movl PT_CS(%esp), %ecx
         andl $SEGMENT_RPL_MASK, %ecx
@@ -270,15 +205,17 @@ ENTRY(xen_iret_crit_fixup)
         lea PT_ORIG_EAX(%esp), %esi
         lea PT_EFLAGS(%esp), %edi
 
-        /* If eip is before iret_restore_end then stack
-           hasn't been restored yet. */
+        /*
+         * If eip is before iret_restore_end then stack
+         * hasn't been restored yet.
+         */
         cmp $iret_restore_end, %eax
         jae 1f
 
-        movl 0+4(%edi),%eax             /* copy EAX (just above top of frame) */
+        movl 0+4(%edi), %eax            /* copy EAX (just above top of frame) */
         movl %eax, PT_EAX(%esp)
 
-        lea ESP_OFFSET(%edi),%edi       /* move dest up over saved regs */
+        lea ESP_OFFSET(%edi), %edi      /* move dest up over saved regs */
 
         /* set up the copy */
 1:      std
@@ -286,20 +223,6 @@ ENTRY(xen_iret_crit_fixup)
         rep movsl
         cld
 
-        lea 4(%edi),%esp                /* point esp to new frame */
+        lea 4(%edi), %esp               /* point esp to new frame */
 2:      jmp xen_do_upcall
 
-
-/*
-        Force an event check by making a hypercall,
-        but preserve regs before making the call.
- */
-check_events:
-        push %eax
-        push %ecx
-        push %edx
-        call xen_force_evtchn_callback
-        pop %edx
-        pop %ecx
-        pop %eax
-        ret
diff --git a/arch/x86/xen/xen-asm_64.S b/arch/x86/xen/xen-asm_64.S
index 05794c566e87..02f496a8dbaa 100644
--- a/arch/x86/xen/xen-asm_64.S
+++ b/arch/x86/xen/xen-asm_64.S
@@ -1,174 +1,45 @@
 /*
-        Asm versions of Xen pv-ops, suitable for either direct use or inlining.
-        The inline versions are the same as the direct-use versions, with the
-        pre- and post-amble chopped off.
-
-        This code is encoded for size rather than absolute efficiency,
-        with a view to being able to inline as much as possible.
-
-        We only bother with direct forms (ie, vcpu in pda) of the operations
-        here; the indirect forms are better handled in C, since they're
-        generally too large to inline anyway.
+ * Asm versions of Xen pv-ops, suitable for either direct use or
+ * inlining.  The inline versions are the same as the direct-use
+ * versions, with the pre- and post-amble chopped off.
+ *
+ * This code is encoded for size rather than absolute efficiency, with
+ * a view to being able to inline as much as possible.
+ *
+ * We only bother with direct forms (ie, vcpu in pda) of the
+ * operations here; the indirect forms are better handled in C, since
+ * they're generally too large to inline anyway.
  */
 
-#include <linux/linkage.h>
-
-#include <asm/asm-offsets.h>
-#include <asm/processor-flags.h>
 #include <asm/errno.h>
+#include <asm/percpu.h>
+#include <asm/processor-flags.h>
 #include <asm/segment.h>
 
 #include <xen/interface/xen.h>
 
-#define RELOC(x, v)     .globl x##_reloc; x##_reloc=v
-#define ENDPATCH(x)     .globl x##_end; x##_end=.
-
-/* Pseudo-flag used for virtual NMI, which we don't implement yet */
-#define XEN_EFLAGS_NMI  0x80000000
-
-#if 1
-/*
-        x86-64 does not yet support direct access to percpu variables
-        via a segment override, so we just need to make sure this code
-        never gets used
- */
-#define BUG                     ud2a
-#define PER_CPU_VAR(var, off)   0xdeadbeef
-#endif
-
-/*
-        Enable events.  This clears the event mask and tests the pending
-        event status with one and operation.  If there are pending
-        events, then enter the hypervisor to get them handled.
- */
-ENTRY(xen_irq_enable_direct)
-        BUG
-
-        /* Unmask events */
-        movb $0, PER_CPU_VAR(xen_vcpu_info, XEN_vcpu_info_mask)
-
-        /* Preempt here doesn't matter because that will deal with
-           any pending interrupts.  The pending check may end up being
-           run on the wrong CPU, but that doesn't hurt. */
-
-        /* Test for pending */
-        testb $0xff, PER_CPU_VAR(xen_vcpu_info, XEN_vcpu_info_pending)
-        jz 1f
-
-2:      call check_events
-1:
-ENDPATCH(xen_irq_enable_direct)
-        ret
-        ENDPROC(xen_irq_enable_direct)
-        RELOC(xen_irq_enable_direct, 2b+1)
-
-/*
-        Disabling events is simply a matter of making the event mask
-        non-zero.
- */
-ENTRY(xen_irq_disable_direct)
-        BUG
-
-        movb $1, PER_CPU_VAR(xen_vcpu_info, XEN_vcpu_info_mask)
-ENDPATCH(xen_irq_disable_direct)
-        ret
-        ENDPROC(xen_irq_disable_direct)
-        RELOC(xen_irq_disable_direct, 0)
-
-/*
-        (xen_)save_fl is used to get the current interrupt enable status.
-        Callers expect the status to be in X86_EFLAGS_IF, and other bits
-        may be set in the return value.  We take advantage of this by
-        making sure that X86_EFLAGS_IF has the right value (and other bits
-        in that byte are 0), but other bits in the return value are
-        undefined.  We need to toggle the state of the bit, because
-        Xen and x86 use opposite senses (mask vs enable).
- */
-ENTRY(xen_save_fl_direct)
-        BUG
-
-        testb $0xff, PER_CPU_VAR(xen_vcpu_info, XEN_vcpu_info_mask)
-        setz %ah
-        addb %ah,%ah
-ENDPATCH(xen_save_fl_direct)
-        ret
-        ENDPROC(xen_save_fl_direct)
-        RELOC(xen_save_fl_direct, 0)
-
-/*
-        In principle the caller should be passing us a value return
-        from xen_save_fl_direct, but for robustness sake we test only
-        the X86_EFLAGS_IF flag rather than the whole byte. After
-        setting the interrupt mask state, it checks for unmasked
-        pending events and enters the hypervisor to get them delivered
-        if so.
- */
-ENTRY(xen_restore_fl_direct)
-        BUG
-
-        testb $X86_EFLAGS_IF>>8, %ah
-        setz PER_CPU_VAR(xen_vcpu_info, XEN_vcpu_info_mask)
-        /* Preempt here doesn't matter because that will deal with
-           any pending interrupts.  The pending check may end up being
-           run on the wrong CPU, but that doesn't hurt. */
-
-        /* check for unmasked and pending */
-        cmpw $0x0001, PER_CPU_VAR(xen_vcpu_info, XEN_vcpu_info_pending)
-        jz 1f
-2:      call check_events
-1:
-ENDPATCH(xen_restore_fl_direct)
-        ret
-        ENDPROC(xen_restore_fl_direct)
-        RELOC(xen_restore_fl_direct, 2b+1)
-
-
-/*
-        Force an event check by making a hypercall,
-        but preserve regs before making the call.
- */
-check_events:
-        push %rax
-        push %rcx
-        push %rdx
-        push %rsi
-        push %rdi
-        push %r8
-        push %r9
-        push %r10
-        push %r11
-        call xen_force_evtchn_callback
-        pop %r11
-        pop %r10
-        pop %r9
-        pop %r8
-        pop %rdi
-        pop %rsi
-        pop %rdx
-        pop %rcx
-        pop %rax
-        ret
+#include "xen-asm.h"
 
 ENTRY(xen_adjust_exception_frame)
-        mov 8+0(%rsp),%rcx
-        mov 8+8(%rsp),%r11
+        mov 8+0(%rsp), %rcx
+        mov 8+8(%rsp), %r11
         ret $16
 
 hypercall_iret = hypercall_page + __HYPERVISOR_iret * 32
 /*
-        Xen64 iret frame:
-
-        ss
-        rsp
-        rflags
-        cs
-        rip             <-- standard iret frame
-
-        flags
-
-        rcx             }
-        r11             }<-- pushed by hypercall page
-rsp ->  rax             }
+ * Xen64 iret frame:
+ *
+ *      ss
+ *      rsp
+ *      rflags
+ *      cs
+ *      rip             <-- standard iret frame
+ *
+ *      flags
+ *
+ *      rcx             }
+ *      r11             }<-- pushed by hypercall page
+ * rsp->rax             }
  */
 ENTRY(xen_iret)
         pushq $0
@@ -177,8 +48,8 @@ ENDPATCH(xen_iret)
 RELOC(xen_iret, 1b+1)
 
 /*
-        sysexit is not used for 64-bit processes, so it's
-        only ever used to return to 32-bit compat userspace.
+ * sysexit is not used for 64-bit processes, so it's only ever used to
+ * return to 32-bit compat userspace.
  */
 ENTRY(xen_sysexit)
         pushq $__USER32_DS
@@ -193,13 +64,15 @@ ENDPATCH(xen_sysexit)
 RELOC(xen_sysexit, 1b+1)
 
 ENTRY(xen_sysret64)
-        /* We're already on the usermode stack at this point, but still
-           with the kernel gs, so we can easily switch back */
-        movq %rsp, %gs:pda_oldrsp
-        movq %gs:pda_kernelstack,%rsp
+        /*
+         * We're already on the usermode stack at this point, but
+         * still with the kernel gs, so we can easily switch back
+         */
+        movq %rsp, PER_CPU_VAR(old_rsp)
+        movq PER_CPU_VAR(kernel_stack), %rsp
 
         pushq $__USER_DS
-        pushq %gs:pda_oldrsp
+        pushq PER_CPU_VAR(old_rsp)
         pushq %r11
         pushq $__USER_CS
         pushq %rcx
@@ -210,13 +83,15 @@ ENDPATCH(xen_sysret64)
 RELOC(xen_sysret64, 1b+1)
 
 ENTRY(xen_sysret32)
-        /* We're already on the usermode stack at this point, but still
-           with the kernel gs, so we can easily switch back */
-        movq %rsp, %gs:pda_oldrsp
-        movq %gs:pda_kernelstack, %rsp
+        /*
+         * We're already on the usermode stack at this point, but
+         * still with the kernel gs, so we can easily switch back
+         */
+        movq %rsp, PER_CPU_VAR(old_rsp)
+        movq PER_CPU_VAR(kernel_stack), %rsp
 
         pushq $__USER32_DS
-        pushq %gs:pda_oldrsp
+        pushq PER_CPU_VAR(old_rsp)
         pushq %r11
         pushq $__USER32_CS
         pushq %rcx
@@ -227,28 +102,27 @@ ENDPATCH(xen_sysret32)
 RELOC(xen_sysret32, 1b+1)
 
 /*
-        Xen handles syscall callbacks much like ordinary exceptions,
-        which means we have:
-         - kernel gs
-         - kernel rsp
-         - an iret-like stack frame on the stack (including rcx and r11):
-                ss
-                rsp
-                rflags
-                cs
-                rip
-                r11
-        rsp->   rcx
-
-        In all the entrypoints, we undo all that to make it look
-        like a CPU-generated syscall/sysenter and jump to the normal
-        entrypoint.
+ * Xen handles syscall callbacks much like ordinary exceptions, which
+ * means we have:
+ * - kernel gs
+ * - kernel rsp
+ * - an iret-like stack frame on the stack (including rcx and r11):
+ *      ss
+ *      rsp
+ *      rflags
+ *      cs
+ *      rip
+ *      r11
+ * rsp->rcx
+ *
+ * In all the entrypoints, we undo all that to make it look like a
+ * CPU-generated syscall/sysenter and jump to the normal entrypoint.
  */
 
 .macro undo_xen_syscall
-        mov 0*8(%rsp),%rcx
-        mov 1*8(%rsp),%r11
-        mov 5*8(%rsp),%rsp
+        mov 0*8(%rsp), %rcx
+        mov 1*8(%rsp), %r11
+        mov 5*8(%rsp), %rsp
 .endm
 
 /* Normal 64-bit system call target */
@@ -275,7 +149,7 @@ ENDPROC(xen_sysenter_target)
 
 ENTRY(xen_syscall32_target)
 ENTRY(xen_sysenter_target)
-        lea 16(%rsp), %rsp      /* strip %rcx,%r11 */
+        lea 16(%rsp), %rsp      /* strip %rcx, %r11 */
         mov $-ENOSYS, %rax
         pushq $VGCF_in_syscall
         jmp hypercall_iret
diff --git a/arch/x86/xen/xen-head.S b/arch/x86/xen/xen-head.S
index 63d49a523ed3..1a5ff24e29c0 100644
--- a/arch/x86/xen/xen-head.S
+++ b/arch/x86/xen/xen-head.S
@@ -8,7 +8,7 @@
 
 #include <asm/boot.h>
 #include <asm/asm.h>
-#include <asm/page.h>
+#include <asm/page_types.h>
 
 #include <xen/interface/elfnote.h>
 #include <asm/xen/interface.h>
diff --git a/arch/x86/xen/xen-ops.h b/arch/x86/xen/xen-ops.h
index c1f8faf0a2c5..2f5ef2632ea2 100644
--- a/arch/x86/xen/xen-ops.h
+++ b/arch/x86/xen/xen-ops.h
@@ -10,9 +10,12 @@
 extern const char xen_hypervisor_callback[];
 extern const char xen_failsafe_callback[];
 
+extern void *xen_initial_gdt;
+
 struct trap_info;
 void xen_copy_trap_info(struct trap_info *traps);
 
+DECLARE_PER_CPU(struct vcpu_info, xen_vcpu_info);
 DECLARE_PER_CPU(unsigned long, xen_cr3);
 DECLARE_PER_CPU(unsigned long, xen_current_cr3);
 
@@ -22,6 +25,13 @@ extern struct shared_info *HYPERVISOR_shared_info;
 
 void xen_setup_mfn_list_list(void);
 void xen_setup_shared_info(void);
+void xen_setup_machphys_mapping(void);
+pgd_t *xen_setup_kernel_pagetable(pgd_t *pgd, unsigned long max_pfn);
+void xen_ident_map_ISA(void);
+void xen_reserve_top(void);
+
+void xen_leave_lazy(void);
+void xen_post_allocator_init(void);
 
 char * __init xen_memory_setup(void);
 void __init xen_arch_setup(void);
diff --git a/arch/xtensa/include/asm/socket.h b/arch/xtensa/include/asm/socket.h
index 6100682b1da2..dd1a7a4a1cea 100644
--- a/arch/xtensa/include/asm/socket.h
+++ b/arch/xtensa/include/asm/socket.h
@@ -65,4 +65,7 @@
 
 #define SO_MARK                 36
 
+#define SO_TIMESTAMPING         37
+#define SCM_TIMESTAMPING        SO_TIMESTAMPING
+
 #endif  /* _XTENSA_SOCKET_H */
diff --git a/arch/xtensa/include/asm/swab.h b/arch/xtensa/include/asm/swab.h
index f50b697eb601..226a39162310 100644
--- a/arch/xtensa/include/asm/swab.h
+++ b/arch/xtensa/include/asm/swab.h
@@ -11,7 +11,7 @@
 #ifndef _XTENSA_SWAB_H
 #define _XTENSA_SWAB_H
 
-#include <asm/types.h>
+#include <linux/types.h>
 #include <linux/compiler.h>
 
 #define __SWAB_64_THRU_32__
diff --git a/arch/xtensa/kernel/irq.c b/arch/xtensa/kernel/irq.c
index 5fbcde59a92d..f3b66fba5b8f 100644
--- a/arch/xtensa/kernel/irq.c
+++ b/arch/xtensa/kernel/irq.c
@@ -99,7 +99,7 @@ int show_interrupts(struct seq_file *p, void *v)
                 seq_printf(p, "%10u ", kstat_irqs(i));
 #else
                 for_each_online_cpu(j)
-                        seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
+                        seq_printf(p, "%10u ", kstat_irqs_cpu(i, j));
 #endif
                 seq_printf(p, " %14s", irq_desc[i].chip->typename);
                 seq_printf(p, "  %s", action->name);