[PATCH] swsusp: clean assembly parts

This patch fixes register saving so that each register is only saved once,
and adds missing saving of %cr8 on x86-64.  Some reordering so that
save/restore is more logical/safer (segment registers should be restored
after gdt).

Signed-off-by: Pavel Machek <pavel@suse.cz>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

2 files changed, 16 insertions, 19 deletions

diff --git a/arch/i386/power/cpu.c b/arch/i386/power/cpu.c
index d099d01461f4..0e6b45b61251 100644
--- a/arch/i386/power/cpu.c
+++ b/arch/i386/power/cpu.c
@@ -44,7 +44,6 @@ void __save_processor_state(struct saved_context *ctxt)
          */
         asm volatile ("sgdt %0" : "=m" (ctxt->gdt_limit));
         asm volatile ("sidt %0" : "=m" (ctxt->idt_limit));
-        asm volatile ("sldt %0" : "=m" (ctxt->ldt));
         asm volatile ("str %0"  : "=m" (ctxt->tr));
 
         /*
@@ -107,7 +106,6 @@ static void fix_processor_context(void)
 
 void __restore_processor_state(struct saved_context *ctxt)
 {
-
         /*
          * control registers
          */
@@ -117,6 +115,13 @@ void __restore_processor_state(struct saved_context *ctxt)
         asm volatile ("movl %0, %%cr0" :: "r" (ctxt->cr0));
 
         /*
+         * now restore the descriptor tables to their proper values
+         * ltr is done i fix_processor_context().
+         */
+        asm volatile ("lgdt %0" :: "m" (ctxt->gdt_limit));
+        asm volatile ("lidt %0" :: "m" (ctxt->idt_limit));
+
+        /*
          * segment registers
          */
         asm volatile ("movw %0, %%es" :: "r" (ctxt->es));
@@ -125,14 +130,6 @@ void __restore_processor_state(struct saved_context *ctxt)
         asm volatile ("movw %0, %%ss" :: "r" (ctxt->ss));
 
         /*
-         * now restore the descriptor tables to their proper values
-         * ltr is done i fix_processor_context().
-         */
-        asm volatile ("lgdt %0" :: "m" (ctxt->gdt_limit));
-        asm volatile ("lidt %0" :: "m" (ctxt->idt_limit));
-        asm volatile ("lldt %0" :: "m" (ctxt->ldt));
-
-        /*
          * sysenter MSRs
          */
         if (boot_cpu_has(X86_FEATURE_SEP))
diff --git a/arch/x86_64/kernel/suspend.c b/arch/x86_64/kernel/suspend.c
index ebaa1e37d657..6c0f402e3a88 100644
--- a/arch/x86_64/kernel/suspend.c
+++ b/arch/x86_64/kernel/suspend.c
@@ -44,7 +44,6 @@ void __save_processor_state(struct saved_context *ctxt)
          */
         asm volatile ("sgdt %0" : "=m" (ctxt->gdt_limit));
         asm volatile ("sidt %0" : "=m" (ctxt->idt_limit));
-        asm volatile ("sldt %0" : "=m" (ctxt->ldt));
         asm volatile ("str %0"  : "=m" (ctxt->tr));
 
         /* XMM0..XMM15 should be handled by kernel_fpu_begin(). */
@@ -69,6 +68,7 @@ void __save_processor_state(struct saved_context *ctxt)
         asm volatile ("movq %%cr2, %0" : "=r" (ctxt->cr2));
         asm volatile ("movq %%cr3, %0" : "=r" (ctxt->cr3));
         asm volatile ("movq %%cr4, %0" : "=r" (ctxt->cr4));
+        asm volatile ("movq %%cr8, %0" : "=r" (ctxt->cr8));
 }
 
 void save_processor_state(void)
@@ -90,12 +90,20 @@ void __restore_processor_state(struct saved_context *ctxt)
         /*
          * control registers
          */
+        asm volatile ("movq %0, %%cr8" :: "r" (ctxt->cr8));
         asm volatile ("movq %0, %%cr4" :: "r" (ctxt->cr4));
         asm volatile ("movq %0, %%cr3" :: "r" (ctxt->cr3));
         asm volatile ("movq %0, %%cr2" :: "r" (ctxt->cr2));
         asm volatile ("movq %0, %%cr0" :: "r" (ctxt->cr0));
 
         /*
+         * now restore the descriptor tables to their proper values
+         * ltr is done i fix_processor_context().
+         */
+        asm volatile ("lgdt %0" :: "m" (ctxt->gdt_limit));
+        asm volatile ("lidt %0" :: "m" (ctxt->idt_limit));
+
+        /*
          * segment registers
          */
         asm volatile ("movw %0, %%ds" :: "r" (ctxt->ds));
@@ -108,14 +116,6 @@ void __restore_processor_state(struct saved_context *ctxt)
         wrmsrl(MSR_GS_BASE, ctxt->gs_base);
         wrmsrl(MSR_KERNEL_GS_BASE, ctxt->gs_kernel_base);
 
-        /*
-         * now restore the descriptor tables to their proper values
-         * ltr is done i fix_processor_context().
-         */
-        asm volatile ("lgdt %0" :: "m" (ctxt->gdt_limit));
-        asm volatile ("lidt %0" :: "m" (ctxt->idt_limit));
-        asm volatile ("lldt %0" :: "m" (ctxt->ldt));
-
         fix_processor_context();
 
         do_fpu_end();