MIPS: RB532: Check irq number when handling GPIO interrupts

This patch makes sure that we are not going to clear
or change the interrupt status of a GPIO interrupt
superior to 13 as this is the maximum number of GPIO
interrupt source (p.232 of the RC32434 reference manual).

Signed-off-by: Florian Fainelli <florian@openwrt.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

1 files changed, 3 insertions, 2 deletions

diff --git a/arch/mips/rb532/irq.c b/arch/mips/rb532/irq.c
index 53eeb5e7bc5b..f07882029a90 100644
--- a/arch/mips/rb532/irq.c
+++ b/arch/mips/rb532/irq.c
@@ -151,7 +151,8 @@ static void rb532_disable_irq(unsigned int irq_nr)
                 mask |= intr_bit;
                 WRITE_MASK(addr, mask);
 
-                if (group == GPIO_MAPPED_IRQ_GROUP)
+                /* There is a maximum of 14 GPIO interrupts */
+                if (group == GPIO_MAPPED_IRQ_GROUP && irq_nr <= (GROUP4_IRQ_BASE + 13))
                         rb532_gpio_set_istat(0, irq_nr - GPIO_MAPPED_IRQ_BASE);
 
                 /*
@@ -174,7 +175,7 @@ static int rb532_set_type(unsigned int irq_nr, unsigned type)
         int gpio = irq_nr - GPIO_MAPPED_IRQ_BASE;
         int group = irq_to_group(irq_nr);
 
-        if (group != GPIO_MAPPED_IRQ_GROUP)
+        if (group != GPIO_MAPPED_IRQ_GROUP || irq_nr > (GROUP4_IRQ_BASE + 13))
                 return (type == IRQ_TYPE_LEVEL_HIGH) ? 0 : -EINVAL;
 
         switch (type) {