diff options
author | Eiichiro Oiwa <eiichiro.oiwa.nm@hitachi.com> | 2006-10-23 02:14:07 -0400 |
---|---|---|
committer | Greg Kroah-Hartman <gregkh@suse.de> | 2006-10-27 14:20:33 -0400 |
commit | 6b5c76b8e2ff204fa8d7201acce461188873bf2b (patch) | |
tree | 6e3864c98fdcca8aa5609ad799349513d9372a10 /arch | |
parent | 35ae61a0f43ebbabc3cb4345136ca529fc4d6700 (diff) |
PCI: fix pci_fixup_video as it blows up on sparc64
This reverts much of the original pci_fixup_video change and makes it
work for all arches that need it.
fixed, and tested on x86, x86_64 and IA64 dig.
Signed-off-by: Eiichiro Oiwa <eiichiro.oiwa.nm@hitachi.com>
Acked-by: David Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/i386/pci/fixup.c | 55 | ||||
-rw-r--r-- | arch/ia64/pci/Makefile | 2 | ||||
-rw-r--r-- | arch/ia64/pci/fixup.c | 69 |
3 files changed, 125 insertions, 1 deletions
diff --git a/arch/i386/pci/fixup.c b/arch/i386/pci/fixup.c index 908b410f4c93..c1949ff38d61 100644 --- a/arch/i386/pci/fixup.c +++ b/arch/i386/pci/fixup.c | |||
@@ -343,6 +343,61 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_MCH_PC, pcie_ro | |||
343 | DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_MCH_PC1, pcie_rootport_aspm_quirk ); | 343 | DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_MCH_PC1, pcie_rootport_aspm_quirk ); |
344 | 344 | ||
345 | /* | 345 | /* |
346 | * Fixup to mark boot BIOS video selected by BIOS before it changes | ||
347 | * | ||
348 | * From information provided by "Jon Smirl" <jonsmirl@gmail.com> | ||
349 | * | ||
350 | * The standard boot ROM sequence for an x86 machine uses the BIOS | ||
351 | * to select an initial video card for boot display. This boot video | ||
352 | * card will have it's BIOS copied to C0000 in system RAM. | ||
353 | * IORESOURCE_ROM_SHADOW is used to associate the boot video | ||
354 | * card with this copy. On laptops this copy has to be used since | ||
355 | * the main ROM may be compressed or combined with another image. | ||
356 | * See pci_map_rom() for use of this flag. IORESOURCE_ROM_SHADOW | ||
357 | * is marked here since the boot video device will be the only enabled | ||
358 | * video device at this point. | ||
359 | */ | ||
360 | |||
361 | static void __devinit pci_fixup_video(struct pci_dev *pdev) | ||
362 | { | ||
363 | struct pci_dev *bridge; | ||
364 | struct pci_bus *bus; | ||
365 | u16 config; | ||
366 | |||
367 | if ((pdev->class >> 8) != PCI_CLASS_DISPLAY_VGA) | ||
368 | return; | ||
369 | |||
370 | /* Is VGA routed to us? */ | ||
371 | bus = pdev->bus; | ||
372 | while (bus) { | ||
373 | bridge = bus->self; | ||
374 | |||
375 | /* | ||
376 | * From information provided by | ||
377 | * "David Miller" <davem@davemloft.net> | ||
378 | * The bridge control register is valid for PCI header | ||
379 | * type BRIDGE, or CARDBUS. Host to PCI controllers use | ||
380 | * PCI header type NORMAL. | ||
381 | */ | ||
382 | if (bridge | ||
383 | &&((bridge->hdr_type == PCI_HEADER_TYPE_BRIDGE) | ||
384 | ||(bridge->hdr_type == PCI_HEADER_TYPE_CARDBUS))) { | ||
385 | pci_read_config_word(bridge, PCI_BRIDGE_CONTROL, | ||
386 | &config); | ||
387 | if (!(config & PCI_BRIDGE_CTL_VGA)) | ||
388 | return; | ||
389 | } | ||
390 | bus = bus->parent; | ||
391 | } | ||
392 | pci_read_config_word(pdev, PCI_COMMAND, &config); | ||
393 | if (config & (PCI_COMMAND_IO | PCI_COMMAND_MEMORY)) { | ||
394 | pdev->resource[PCI_ROM_RESOURCE].flags |= IORESOURCE_ROM_SHADOW; | ||
395 | printk(KERN_DEBUG "Boot video device is %s\n", pci_name(pdev)); | ||
396 | } | ||
397 | } | ||
398 | DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, pci_fixup_video); | ||
399 | |||
400 | /* | ||
346 | * Some Toshiba laptops need extra code to enable their TI TSB43AB22/A. | 401 | * Some Toshiba laptops need extra code to enable their TI TSB43AB22/A. |
347 | * | 402 | * |
348 | * We pretend to bring them out of full D3 state, and restore the proper | 403 | * We pretend to bring them out of full D3 state, and restore the proper |
diff --git a/arch/ia64/pci/Makefile b/arch/ia64/pci/Makefile index e66889e6922a..fb14dc520d2d 100644 --- a/arch/ia64/pci/Makefile +++ b/arch/ia64/pci/Makefile | |||
@@ -1,4 +1,4 @@ | |||
1 | # | 1 | # |
2 | # Makefile for the ia64-specific parts of the pci bus | 2 | # Makefile for the ia64-specific parts of the pci bus |
3 | # | 3 | # |
4 | obj-y := pci.o | 4 | obj-y := pci.o fixup.o |
diff --git a/arch/ia64/pci/fixup.c b/arch/ia64/pci/fixup.c new file mode 100644 index 000000000000..245dc1fedc24 --- /dev/null +++ b/arch/ia64/pci/fixup.c | |||
@@ -0,0 +1,69 @@ | |||
1 | /* | ||
2 | * Exceptions for specific devices. Usually work-arounds for fatal design flaws. | ||
3 | * Derived from fixup.c of i386 tree. | ||
4 | */ | ||
5 | |||
6 | #include <linux/pci.h> | ||
7 | #include <linux/init.h> | ||
8 | |||
9 | #include <asm/machvec.h> | ||
10 | |||
11 | /* | ||
12 | * Fixup to mark boot BIOS video selected by BIOS before it changes | ||
13 | * | ||
14 | * From information provided by "Jon Smirl" <jonsmirl@gmail.com> | ||
15 | * | ||
16 | * The standard boot ROM sequence for an x86 machine uses the BIOS | ||
17 | * to select an initial video card for boot display. This boot video | ||
18 | * card will have it's BIOS copied to C0000 in system RAM. | ||
19 | * IORESOURCE_ROM_SHADOW is used to associate the boot video | ||
20 | * card with this copy. On laptops this copy has to be used since | ||
21 | * the main ROM may be compressed or combined with another image. | ||
22 | * See pci_map_rom() for use of this flag. IORESOURCE_ROM_SHADOW | ||
23 | * is marked here since the boot video device will be the only enabled | ||
24 | * video device at this point. | ||
25 | */ | ||
26 | |||
27 | static void __devinit pci_fixup_video(struct pci_dev *pdev) | ||
28 | { | ||
29 | struct pci_dev *bridge; | ||
30 | struct pci_bus *bus; | ||
31 | u16 config; | ||
32 | |||
33 | if ((strcmp(platform_name, "dig") != 0) | ||
34 | && (strcmp(platform_name, "hpzx1") != 0)) | ||
35 | return; | ||
36 | /* Maybe, this machine supports legacy memory map. */ | ||
37 | |||
38 | if ((pdev->class >> 8) != PCI_CLASS_DISPLAY_VGA) | ||
39 | return; | ||
40 | |||
41 | /* Is VGA routed to us? */ | ||
42 | bus = pdev->bus; | ||
43 | while (bus) { | ||
44 | bridge = bus->self; | ||
45 | |||
46 | /* | ||
47 | * From information provided by | ||
48 | * "David Miller" <davem@davemloft.net> | ||
49 | * The bridge control register is valid for PCI header | ||
50 | * type BRIDGE, or CARDBUS. Host to PCI controllers use | ||
51 | * PCI header type NORMAL. | ||
52 | */ | ||
53 | if (bridge | ||
54 | &&((bridge->hdr_type == PCI_HEADER_TYPE_BRIDGE) | ||
55 | ||(bridge->hdr_type == PCI_HEADER_TYPE_CARDBUS))) { | ||
56 | pci_read_config_word(bridge, PCI_BRIDGE_CONTROL, | ||
57 | &config); | ||
58 | if (!(config & PCI_BRIDGE_CTL_VGA)) | ||
59 | return; | ||
60 | } | ||
61 | bus = bus->parent; | ||
62 | } | ||
63 | pci_read_config_word(pdev, PCI_COMMAND, &config); | ||
64 | if (config & (PCI_COMMAND_IO | PCI_COMMAND_MEMORY)) { | ||
65 | pdev->resource[PCI_ROM_RESOURCE].flags |= IORESOURCE_ROM_SHADOW; | ||
66 | printk(KERN_DEBUG "Boot video device is %s\n", pci_name(pdev)); | ||
67 | } | ||
68 | } | ||
69 | DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, pci_fixup_video); | ||