diff options
| author | Russell King <rmk@dyn-67.arm.linux.org.uk> | 2008-10-09 16:33:02 -0400 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2008-10-09 16:33:02 -0400 |
| commit | 3f30a09a612bac2b531a206c2a58a292dd7ff182 (patch) | |
| tree | 62741c2f78aeb3009c66dbcf014ebff2e034e597 /arch | |
| parent | 9e165acf1b9e37af7c0fa39399b43d0bd8600039 (diff) | |
| parent | fda50a1c49ad7483eaa29a268d560422c413933f (diff) | |
Merge branch 'pxa-all' into devel
Conflicts:
arch/arm/mach-pxa/Kconfig
arch/arm/mach-pxa/corgi.c
arch/arm/mach-pxa/include/mach/hardware.h
arch/arm/mach-pxa/spitz.c
Diffstat (limited to 'arch')
132 files changed, 11620 insertions, 3886 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 744d07e69602..960d5a54aec3 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig | |||
| @@ -876,7 +876,7 @@ config LEDS | |||
| 876 | ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \ | 876 | ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \ |
| 877 | ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \ | 877 | ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \ |
| 878 | ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \ | 878 | ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \ |
| 879 | ARCH_AT91 || MACH_TRIZEPS4 || ARCH_DAVINCI || \ | 879 | ARCH_AT91 || ARCH_DAVINCI || \ |
| 880 | ARCH_KS8695 || MACH_RD88F5182 | 880 | ARCH_KS8695 || MACH_RD88F5182 |
| 881 | help | 881 | help |
| 882 | If you say Y here, the LEDs on your machine will be used | 882 | If you say Y here, the LEDs on your machine will be used |
diff --git a/arch/arm/common/it8152.c b/arch/arm/common/it8152.c index 5fe9588db077..2793447621c3 100644 --- a/arch/arm/common/it8152.c +++ b/arch/arm/common/it8152.c | |||
| @@ -66,14 +66,6 @@ static void it8152_unmask_irq(unsigned int irq) | |||
| 66 | } | 66 | } |
| 67 | } | 67 | } |
| 68 | 68 | ||
| 69 | static inline void it8152_irq(int irq) | ||
| 70 | { | ||
| 71 | struct irq_desc *desc; | ||
| 72 | |||
| 73 | desc = irq_desc + irq; | ||
| 74 | desc_handle_irq(irq, desc); | ||
| 75 | } | ||
| 76 | |||
| 77 | static struct irq_chip it8152_irq_chip = { | 69 | static struct irq_chip it8152_irq_chip = { |
| 78 | .name = "it8152", | 70 | .name = "it8152", |
| 79 | .ack = it8152_mask_irq, | 71 | .ack = it8152_mask_irq, |
| @@ -128,21 +120,21 @@ void it8152_irq_demux(unsigned int irq, struct irq_desc *desc) | |||
| 128 | bits_pd &= ((1 << IT8152_PD_IRQ_COUNT) - 1); | 120 | bits_pd &= ((1 << IT8152_PD_IRQ_COUNT) - 1); |
| 129 | while (bits_pd) { | 121 | while (bits_pd) { |
| 130 | i = __ffs(bits_pd); | 122 | i = __ffs(bits_pd); |
| 131 | it8152_irq(IT8152_PD_IRQ(i)); | 123 | generic_handle_irq(IT8152_PD_IRQ(i)); |
| 132 | bits_pd &= ~(1 << i); | 124 | bits_pd &= ~(1 << i); |
| 133 | } | 125 | } |
| 134 | 126 | ||
| 135 | bits_lp &= ((1 << IT8152_LP_IRQ_COUNT) - 1); | 127 | bits_lp &= ((1 << IT8152_LP_IRQ_COUNT) - 1); |
| 136 | while (bits_lp) { | 128 | while (bits_lp) { |
| 137 | i = __ffs(bits_lp); | 129 | i = __ffs(bits_lp); |
| 138 | it8152_irq(IT8152_LP_IRQ(i)); | 130 | generic_handle_irq(IT8152_LP_IRQ(i)); |
| 139 | bits_lp &= ~(1 << i); | 131 | bits_lp &= ~(1 << i); |
| 140 | } | 132 | } |
| 141 | 133 | ||
| 142 | bits_ld &= ((1 << IT8152_LD_IRQ_COUNT) - 1); | 134 | bits_ld &= ((1 << IT8152_LD_IRQ_COUNT) - 1); |
| 143 | while (bits_ld) { | 135 | while (bits_ld) { |
| 144 | i = __ffs(bits_ld); | 136 | i = __ffs(bits_ld); |
| 145 | it8152_irq(IT8152_LD_IRQ(i)); | 137 | generic_handle_irq(IT8152_LD_IRQ(i)); |
| 146 | bits_ld &= ~(1 << i); | 138 | bits_ld &= ~(1 << i); |
| 147 | } | 139 | } |
| 148 | } | 140 | } |
diff --git a/arch/arm/common/locomo.c b/arch/arm/common/locomo.c index 534b23d95864..7c6b4b99a2df 100644 --- a/arch/arm/common/locomo.c +++ b/arch/arm/common/locomo.c | |||
| @@ -169,7 +169,6 @@ static struct locomo_dev_info locomo_devices[] = { | |||
| 169 | static void locomo_handler(unsigned int irq, struct irq_desc *desc) | 169 | static void locomo_handler(unsigned int irq, struct irq_desc *desc) |
| 170 | { | 170 | { |
| 171 | int req, i; | 171 | int req, i; |
| 172 | struct irq_desc *d; | ||
| 173 | void __iomem *mapbase = get_irq_chip_data(irq); | 172 | void __iomem *mapbase = get_irq_chip_data(irq); |
| 174 | 173 | ||
| 175 | /* Acknowledge the parent IRQ */ | 174 | /* Acknowledge the parent IRQ */ |
| @@ -181,10 +180,9 @@ static void locomo_handler(unsigned int irq, struct irq_desc *desc) | |||
| 181 | if (req) { | 180 | if (req) { |
| 182 | /* generate the next interrupt(s) */ | 181 | /* generate the next interrupt(s) */ |
| 183 | irq = LOCOMO_IRQ_START; | 182 | irq = LOCOMO_IRQ_START; |
| 184 | d = irq_desc + irq; | 183 | for (i = 0; i <= 3; i++, irq++) { |
| 185 | for (i = 0; i <= 3; i++, d++, irq++) { | ||
| 186 | if (req & (0x0100 << i)) { | 184 | if (req & (0x0100 << i)) { |
| 187 | desc_handle_irq(irq, d); | 185 | generic_handle_irq(irq); |
| 188 | } | 186 | } |
| 189 | 187 | ||
| 190 | } | 188 | } |
| @@ -222,12 +220,10 @@ static struct irq_chip locomo_chip = { | |||
| 222 | 220 | ||
| 223 | static void locomo_key_handler(unsigned int irq, struct irq_desc *desc) | 221 | static void locomo_key_handler(unsigned int irq, struct irq_desc *desc) |
| 224 | { | 222 | { |
| 225 | struct irq_desc *d; | ||
| 226 | void __iomem *mapbase = get_irq_chip_data(irq); | 223 | void __iomem *mapbase = get_irq_chip_data(irq); |
| 227 | 224 | ||
| 228 | if (locomo_readl(mapbase + LOCOMO_KEYBOARD + LOCOMO_KIC) & 0x0001) { | 225 | if (locomo_readl(mapbase + LOCOMO_KEYBOARD + LOCOMO_KIC) & 0x0001) { |
| 229 | d = irq_desc + LOCOMO_IRQ_KEY_START; | 226 | generic_handle_irq(LOCOMO_IRQ_KEY_START); |
| 230 | desc_handle_irq(LOCOMO_IRQ_KEY_START, d); | ||
| 231 | } | 227 | } |
| 232 | } | 228 | } |
| 233 | 229 | ||
| @@ -268,7 +264,6 @@ static struct irq_chip locomo_key_chip = { | |||
| 268 | static void locomo_gpio_handler(unsigned int irq, struct irq_desc *desc) | 264 | static void locomo_gpio_handler(unsigned int irq, struct irq_desc *desc) |
| 269 | { | 265 | { |
| 270 | int req, i; | 266 | int req, i; |
| 271 | struct irq_desc *d; | ||
| 272 | void __iomem *mapbase = get_irq_chip_data(irq); | 267 | void __iomem *mapbase = get_irq_chip_data(irq); |
| 273 | 268 | ||
| 274 | req = locomo_readl(mapbase + LOCOMO_GIR) & | 269 | req = locomo_readl(mapbase + LOCOMO_GIR) & |
| @@ -277,10 +272,9 @@ static void locomo_gpio_handler(unsigned int irq, struct irq_desc *desc) | |||
| 277 | 272 | ||
| 278 | if (req) { | 273 | if (req) { |
| 279 | irq = LOCOMO_IRQ_GPIO_START; | 274 | irq = LOCOMO_IRQ_GPIO_START; |
| 280 | d = irq_desc + LOCOMO_IRQ_GPIO_START; | 275 | for (i = 0; i <= 15; i++, irq++) { |
| 281 | for (i = 0; i <= 15; i++, irq++, d++) { | ||
| 282 | if (req & (0x0001 << i)) { | 276 | if (req & (0x0001 << i)) { |
| 283 | desc_handle_irq(irq, d); | 277 | generic_handle_irq(irq); |
| 284 | } | 278 | } |
| 285 | } | 279 | } |
| 286 | } | 280 | } |
| @@ -361,12 +355,10 @@ static struct irq_chip locomo_gpio_chip = { | |||
| 361 | 355 | ||
| 362 | static void locomo_lt_handler(unsigned int irq, struct irq_desc *desc) | 356 | static void locomo_lt_handler(unsigned int irq, struct irq_desc *desc) |
| 363 | { | 357 | { |
| 364 | struct irq_desc *d; | ||
| 365 | void __iomem *mapbase = get_irq_chip_data(irq); | 358 | void __iomem *mapbase = get_irq_chip_data(irq); |
| 366 | 359 | ||
| 367 | if (locomo_readl(mapbase + LOCOMO_LTINT) & 0x0001) { | 360 | if (locomo_readl(mapbase + LOCOMO_LTINT) & 0x0001) { |
| 368 | d = irq_desc + LOCOMO_IRQ_LT_START; | 361 | generic_handle_irq(LOCOMO_IRQ_LT_START); |
| 369 | desc_handle_irq(LOCOMO_IRQ_LT_START, d); | ||
| 370 | } | 362 | } |
| 371 | } | 363 | } |
| 372 | 364 | ||
| @@ -407,17 +399,15 @@ static struct irq_chip locomo_lt_chip = { | |||
| 407 | static void locomo_spi_handler(unsigned int irq, struct irq_desc *desc) | 399 | static void locomo_spi_handler(unsigned int irq, struct irq_desc *desc) |
| 408 | { | 400 | { |
| 409 | int req, i; | 401 | int req, i; |
| 410 | struct irq_desc *d; | ||
| 411 | void __iomem *mapbase = get_irq_chip_data(irq); | 402 | void __iomem *mapbase = get_irq_chip_data(irq); |
| 412 | 403 | ||
| 413 | req = locomo_readl(mapbase + LOCOMO_SPI + LOCOMO_SPIIR) & 0x000F; | 404 | req = locomo_readl(mapbase + LOCOMO_SPI + LOCOMO_SPIIR) & 0x000F; |
| 414 | if (req) { | 405 | if (req) { |
| 415 | irq = LOCOMO_IRQ_SPI_START; | 406 | irq = LOCOMO_IRQ_SPI_START; |
| 416 | d = irq_desc + irq; | ||
| 417 | 407 | ||
| 418 | for (i = 0; i <= 3; i++, irq++, d++) { | 408 | for (i = 0; i <= 3; i++, irq++) { |
| 419 | if (req & (0x0001 << i)) { | 409 | if (req & (0x0001 << i)) { |
| 420 | desc_handle_irq(irq, d); | 410 | generic_handle_irq(irq); |
| 421 | } | 411 | } |
| 422 | } | 412 | } |
| 423 | } | 413 | } |
diff --git a/arch/arm/common/sharpsl_param.c b/arch/arm/common/sharpsl_param.c index aad4d94ba8f5..d56c932580eb 100644 --- a/arch/arm/common/sharpsl_param.c +++ b/arch/arm/common/sharpsl_param.c | |||
| @@ -12,6 +12,7 @@ | |||
| 12 | */ | 12 | */ |
| 13 | 13 | ||
| 14 | #include <linux/kernel.h> | 14 | #include <linux/kernel.h> |
| 15 | #include <linux/module.h> | ||
| 15 | #include <linux/string.h> | 16 | #include <linux/string.h> |
| 16 | #include <asm/mach/sharpsl_param.h> | 17 | #include <asm/mach/sharpsl_param.h> |
| 17 | 18 | ||
| @@ -36,6 +37,7 @@ | |||
| 36 | #define PHAD_MAGIC MAGIC_CHG('P','H','A','D') | 37 | #define PHAD_MAGIC MAGIC_CHG('P','H','A','D') |
| 37 | 38 | ||
| 38 | struct sharpsl_param_info sharpsl_param; | 39 | struct sharpsl_param_info sharpsl_param; |
| 40 | EXPORT_SYMBOL(sharpsl_param); | ||
| 39 | 41 | ||
| 40 | void sharpsl_save_param(void) | 42 | void sharpsl_save_param(void) |
| 41 | { | 43 | { |
diff --git a/arch/arm/configs/cm_x300_defconfig b/arch/arm/configs/cm_x300_defconfig new file mode 100644 index 000000000000..46f1c9dc350c --- /dev/null +++ b/arch/arm/configs/cm_x300_defconfig | |||
| @@ -0,0 +1,1466 @@ | |||
| 1 | # | ||
| 2 | # Automatically generated make config: don't edit | ||
| 3 | # Linux kernel version: 2.6.27-rc3 | ||
| 4 | # Tue Aug 19 11:26:54 2008 | ||
| 5 | # | ||
| 6 | CONFIG_ARM=y | ||
| 7 | CONFIG_SYS_SUPPORTS_APM_EMULATION=y | ||
| 8 | CONFIG_GENERIC_GPIO=y | ||
| 9 | CONFIG_GENERIC_TIME=y | ||
| 10 | CONFIG_GENERIC_CLOCKEVENTS=y | ||
| 11 | CONFIG_MMU=y | ||
| 12 | # CONFIG_NO_IOPORT is not set | ||
| 13 | CONFIG_GENERIC_HARDIRQS=y | ||
| 14 | CONFIG_STACKTRACE_SUPPORT=y | ||
| 15 | CONFIG_HAVE_LATENCYTOP_SUPPORT=y | ||
| 16 | CONFIG_LOCKDEP_SUPPORT=y | ||
| 17 | CONFIG_TRACE_IRQFLAGS_SUPPORT=y | ||
| 18 | CONFIG_HARDIRQS_SW_RESEND=y | ||
| 19 | CONFIG_GENERIC_IRQ_PROBE=y | ||
| 20 | CONFIG_RWSEM_GENERIC_SPINLOCK=y | ||
| 21 | # CONFIG_ARCH_HAS_ILOG2_U32 is not set | ||
| 22 | # CONFIG_ARCH_HAS_ILOG2_U64 is not set | ||
| 23 | CONFIG_GENERIC_HWEIGHT=y | ||
| 24 | CONFIG_GENERIC_CALIBRATE_DELAY=y | ||
| 25 | CONFIG_ARCH_SUPPORTS_AOUT=y | ||
| 26 | CONFIG_ZONE_DMA=y | ||
| 27 | CONFIG_ARCH_MTD_XIP=y | ||
| 28 | CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y | ||
| 29 | CONFIG_VECTORS_BASE=0xffff0000 | ||
| 30 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | ||
| 31 | |||
| 32 | # | ||
| 33 | # General setup | ||
| 34 | # | ||
| 35 | CONFIG_EXPERIMENTAL=y | ||
| 36 | CONFIG_BROKEN_ON_SMP=y | ||
| 37 | CONFIG_INIT_ENV_ARG_LIMIT=32 | ||
| 38 | CONFIG_LOCALVERSION="-cm-x300" | ||
| 39 | # CONFIG_LOCALVERSION_AUTO is not set | ||
| 40 | CONFIG_SWAP=y | ||
| 41 | CONFIG_SYSVIPC=y | ||
| 42 | CONFIG_SYSVIPC_SYSCTL=y | ||
| 43 | # CONFIG_POSIX_MQUEUE is not set | ||
| 44 | # CONFIG_BSD_PROCESS_ACCT is not set | ||
| 45 | # CONFIG_TASKSTATS is not set | ||
| 46 | # CONFIG_AUDIT is not set | ||
| 47 | CONFIG_IKCONFIG=y | ||
| 48 | CONFIG_IKCONFIG_PROC=y | ||
| 49 | CONFIG_LOG_BUF_SHIFT=18 | ||
| 50 | # CONFIG_CGROUPS is not set | ||
| 51 | CONFIG_GROUP_SCHED=y | ||
| 52 | CONFIG_FAIR_GROUP_SCHED=y | ||
| 53 | # CONFIG_RT_GROUP_SCHED is not set | ||
| 54 | CONFIG_USER_SCHED=y | ||
| 55 | # CONFIG_CGROUP_SCHED is not set | ||
| 56 | CONFIG_SYSFS_DEPRECATED=y | ||
| 57 | CONFIG_SYSFS_DEPRECATED_V2=y | ||
| 58 | # CONFIG_RELAY is not set | ||
| 59 | CONFIG_NAMESPACES=y | ||
| 60 | # CONFIG_UTS_NS is not set | ||
| 61 | # CONFIG_IPC_NS is not set | ||
| 62 | # CONFIG_USER_NS is not set | ||
| 63 | # CONFIG_PID_NS is not set | ||
| 64 | CONFIG_BLK_DEV_INITRD=y | ||
| 65 | CONFIG_INITRAMFS_SOURCE="" | ||
| 66 | # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set | ||
| 67 | CONFIG_SYSCTL=y | ||
| 68 | # CONFIG_EMBEDDED is not set | ||
| 69 | CONFIG_UID16=y | ||
| 70 | CONFIG_SYSCTL_SYSCALL=y | ||
| 71 | CONFIG_KALLSYMS=y | ||
| 72 | # CONFIG_KALLSYMS_ALL is not set | ||
| 73 | # CONFIG_KALLSYMS_EXTRA_PASS is not set | ||
| 74 | CONFIG_HOTPLUG=y | ||
| 75 | CONFIG_PRINTK=y | ||
| 76 | CONFIG_BUG=y | ||
| 77 | CONFIG_ELF_CORE=y | ||
| 78 | CONFIG_COMPAT_BRK=y | ||
| 79 | CONFIG_BASE_FULL=y | ||
| 80 | CONFIG_FUTEX=y | ||
| 81 | CONFIG_ANON_INODES=y | ||
| 82 | CONFIG_EPOLL=y | ||
| 83 | CONFIG_SIGNALFD=y | ||
| 84 | CONFIG_TIMERFD=y | ||
| 85 | CONFIG_EVENTFD=y | ||
| 86 | CONFIG_SHMEM=y | ||
| 87 | CONFIG_VM_EVENT_COUNTERS=y | ||
| 88 | CONFIG_SLUB_DEBUG=y | ||
| 89 | # CONFIG_SLAB is not set | ||
| 90 | CONFIG_SLUB=y | ||
| 91 | # CONFIG_SLOB is not set | ||
| 92 | # CONFIG_PROFILING is not set | ||
| 93 | # CONFIG_MARKERS is not set | ||
| 94 | CONFIG_HAVE_OPROFILE=y | ||
| 95 | # CONFIG_KPROBES is not set | ||
| 96 | # CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS is not set | ||
| 97 | # CONFIG_HAVE_IOREMAP_PROT is not set | ||
| 98 | CONFIG_HAVE_KPROBES=y | ||
| 99 | CONFIG_HAVE_KRETPROBES=y | ||
| 100 | # CONFIG_HAVE_ARCH_TRACEHOOK is not set | ||
| 101 | # CONFIG_HAVE_DMA_ATTRS is not set | ||
| 102 | # CONFIG_USE_GENERIC_SMP_HELPERS is not set | ||
| 103 | CONFIG_HAVE_CLK=y | ||
| 104 | CONFIG_PROC_PAGE_MONITOR=y | ||
| 105 | CONFIG_HAVE_GENERIC_DMA_COHERENT=y | ||
| 106 | CONFIG_SLABINFO=y | ||
| 107 | CONFIG_RT_MUTEXES=y | ||
| 108 | # CONFIG_TINY_SHMEM is not set | ||
| 109 | CONFIG_BASE_SMALL=0 | ||
| 110 | CONFIG_MODULES=y | ||
| 111 | # CONFIG_MODULE_FORCE_LOAD is not set | ||
| 112 | CONFIG_MODULE_UNLOAD=y | ||
| 113 | # CONFIG_MODULE_FORCE_UNLOAD is not set | ||
| 114 | # CONFIG_MODVERSIONS is not set | ||
| 115 | # CONFIG_MODULE_SRCVERSION_ALL is not set | ||
| 116 | CONFIG_KMOD=y | ||
| 117 | CONFIG_BLOCK=y | ||
| 118 | # CONFIG_LBD is not set | ||
| 119 | # CONFIG_BLK_DEV_IO_TRACE is not set | ||
| 120 | # CONFIG_LSF is not set | ||
| 121 | # CONFIG_BLK_DEV_BSG is not set | ||
| 122 | # CONFIG_BLK_DEV_INTEGRITY is not set | ||
| 123 | |||
| 124 | # | ||
| 125 | # IO Schedulers | ||
| 126 | # | ||
| 127 | CONFIG_IOSCHED_NOOP=y | ||
| 128 | CONFIG_IOSCHED_AS=y | ||
| 129 | CONFIG_IOSCHED_DEADLINE=y | ||
| 130 | CONFIG_IOSCHED_CFQ=y | ||
| 131 | # CONFIG_DEFAULT_AS is not set | ||
| 132 | # CONFIG_DEFAULT_DEADLINE is not set | ||
| 133 | CONFIG_DEFAULT_CFQ=y | ||
| 134 | # CONFIG_DEFAULT_NOOP is not set | ||
| 135 | CONFIG_DEFAULT_IOSCHED="cfq" | ||
| 136 | CONFIG_CLASSIC_RCU=y | ||
| 137 | |||
| 138 | # | ||
| 139 | # System Type | ||
| 140 | # | ||
| 141 | # CONFIG_ARCH_AAEC2000 is not set | ||
| 142 | # CONFIG_ARCH_INTEGRATOR is not set | ||
| 143 | # CONFIG_ARCH_REALVIEW is not set | ||
| 144 | # CONFIG_ARCH_VERSATILE is not set | ||
| 145 | # CONFIG_ARCH_AT91 is not set | ||
| 146 | # CONFIG_ARCH_CLPS7500 is not set | ||
| 147 | # CONFIG_ARCH_CLPS711X is not set | ||
| 148 | # CONFIG_ARCH_EBSA110 is not set | ||
| 149 | # CONFIG_ARCH_EP93XX is not set | ||
| 150 | # CONFIG_ARCH_FOOTBRIDGE is not set | ||
| 151 | # CONFIG_ARCH_NETX is not set | ||
| 152 | # CONFIG_ARCH_H720X is not set | ||
| 153 | # CONFIG_ARCH_IMX is not set | ||
| 154 | # CONFIG_ARCH_IOP13XX is not set | ||
| 155 | # CONFIG_ARCH_IOP32X is not set | ||
| 156 | # CONFIG_ARCH_IOP33X is not set | ||
| 157 | # CONFIG_ARCH_IXP23XX is not set | ||
| 158 | # CONFIG_ARCH_IXP2000 is not set | ||
| 159 | # CONFIG_ARCH_IXP4XX is not set | ||
| 160 | # CONFIG_ARCH_L7200 is not set | ||
| 161 | # CONFIG_ARCH_KIRKWOOD is not set | ||
| 162 | # CONFIG_ARCH_KS8695 is not set | ||
| 163 | # CONFIG_ARCH_NS9XXX is not set | ||
| 164 | # CONFIG_ARCH_LOKI is not set | ||
| 165 | # CONFIG_ARCH_MV78XX0 is not set | ||
| 166 | # CONFIG_ARCH_MXC is not set | ||
| 167 | # CONFIG_ARCH_ORION5X is not set | ||
| 168 | # CONFIG_ARCH_PNX4008 is not set | ||
| 169 | CONFIG_ARCH_PXA=y | ||
| 170 | # CONFIG_ARCH_RPC is not set | ||
| 171 | # CONFIG_ARCH_SA1100 is not set | ||
| 172 | # CONFIG_ARCH_S3C2410 is not set | ||
| 173 | # CONFIG_ARCH_SHARK is not set | ||
| 174 | # CONFIG_ARCH_LH7A40X is not set | ||
| 175 | # CONFIG_ARCH_DAVINCI is not set | ||
| 176 | # CONFIG_ARCH_OMAP is not set | ||
| 177 | # CONFIG_ARCH_MSM7X00A is not set | ||
| 178 | |||
| 179 | # | ||
| 180 | # Intel PXA2xx/PXA3xx Implementations | ||
| 181 | # | ||
| 182 | |||
| 183 | # | ||
| 184 | # Supported PXA3xx Processor Variants | ||
| 185 | # | ||
| 186 | CONFIG_CPU_PXA300=y | ||
| 187 | # CONFIG_CPU_PXA310 is not set | ||
| 188 | # CONFIG_CPU_PXA320 is not set | ||
| 189 | # CONFIG_CPU_PXA930 is not set | ||
| 190 | # CONFIG_ARCH_GUMSTIX is not set | ||
| 191 | # CONFIG_ARCH_LUBBOCK is not set | ||
| 192 | # CONFIG_MACH_LOGICPD_PXA270 is not set | ||
| 193 | # CONFIG_MACH_MAINSTONE is not set | ||
| 194 | # CONFIG_ARCH_PXA_IDP is not set | ||
| 195 | # CONFIG_PXA_SHARPSL is not set | ||
| 196 | # CONFIG_ARCH_PXA_ESERIES is not set | ||
| 197 | # CONFIG_MACH_TRIZEPS4 is not set | ||
| 198 | # CONFIG_MACH_EM_X270 is not set | ||
| 199 | # CONFIG_MACH_COLIBRI is not set | ||
| 200 | # CONFIG_MACH_ZYLONITE is not set | ||
| 201 | # CONFIG_MACH_LITTLETON is not set | ||
| 202 | # CONFIG_MACH_TAVOREVB is not set | ||
| 203 | # CONFIG_MACH_SAAR is not set | ||
| 204 | # CONFIG_MACH_ARMCORE is not set | ||
| 205 | CONFIG_MACH_CM_X300=y | ||
| 206 | # CONFIG_MACH_MAGICIAN is not set | ||
| 207 | # CONFIG_MACH_PCM027 is not set | ||
| 208 | # CONFIG_ARCH_PXA_PALM is not set | ||
| 209 | # CONFIG_PXA_EZX is not set | ||
| 210 | CONFIG_PXA3xx=y | ||
| 211 | # CONFIG_PXA_PWM is not set | ||
| 212 | |||
| 213 | # | ||
| 214 | # Boot options | ||
| 215 | # | ||
| 216 | |||
| 217 | # | ||
| 218 | # Power management | ||
| 219 | # | ||
| 220 | |||
| 221 | # | ||
| 222 | # Processor Type | ||
| 223 | # | ||
| 224 | CONFIG_CPU_32=y | ||
| 225 | CONFIG_CPU_XSC3=y | ||
| 226 | CONFIG_CPU_32v5=y | ||
| 227 | CONFIG_CPU_ABRT_EV5T=y | ||
| 228 | CONFIG_CPU_PABRT_NOIFAR=y | ||
| 229 | CONFIG_CPU_CACHE_VIVT=y | ||
| 230 | CONFIG_CPU_TLB_V4WBI=y | ||
| 231 | CONFIG_CPU_CP15=y | ||
| 232 | CONFIG_CPU_CP15_MMU=y | ||
| 233 | CONFIG_IO_36=y | ||
| 234 | |||
| 235 | # | ||
| 236 | # Processor Features | ||
| 237 | # | ||
| 238 | # CONFIG_ARM_THUMB is not set | ||
| 239 | # CONFIG_CPU_DCACHE_DISABLE is not set | ||
| 240 | # CONFIG_CPU_BPREDICT_DISABLE is not set | ||
| 241 | CONFIG_OUTER_CACHE=y | ||
| 242 | CONFIG_CACHE_XSC3L2=y | ||
| 243 | CONFIG_IWMMXT=y | ||
| 244 | |||
| 245 | # | ||
| 246 | # Bus support | ||
| 247 | # | ||
| 248 | # CONFIG_PCI_SYSCALL is not set | ||
| 249 | # CONFIG_ARCH_SUPPORTS_MSI is not set | ||
| 250 | # CONFIG_PCCARD is not set | ||
| 251 | |||
| 252 | # | ||
| 253 | # Kernel Features | ||
| 254 | # | ||
| 255 | CONFIG_TICK_ONESHOT=y | ||
| 256 | CONFIG_NO_HZ=y | ||
| 257 | # CONFIG_HIGH_RES_TIMERS is not set | ||
| 258 | CONFIG_GENERIC_CLOCKEVENTS_BUILD=y | ||
| 259 | # CONFIG_PREEMPT is not set | ||
| 260 | CONFIG_HZ=100 | ||
| 261 | CONFIG_AEABI=y | ||
| 262 | CONFIG_OABI_COMPAT=y | ||
| 263 | # CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set | ||
| 264 | CONFIG_SELECT_MEMORY_MODEL=y | ||
| 265 | CONFIG_FLATMEM_MANUAL=y | ||
| 266 | # CONFIG_DISCONTIGMEM_MANUAL is not set | ||
| 267 | # CONFIG_SPARSEMEM_MANUAL is not set | ||
| 268 | CONFIG_FLATMEM=y | ||
| 269 | CONFIG_FLAT_NODE_MEM_MAP=y | ||
| 270 | # CONFIG_SPARSEMEM_STATIC is not set | ||
| 271 | # CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set | ||
| 272 | CONFIG_PAGEFLAGS_EXTENDED=y | ||
| 273 | CONFIG_SPLIT_PTLOCK_CPUS=4096 | ||
| 274 | # CONFIG_RESOURCES_64BIT is not set | ||
| 275 | CONFIG_ZONE_DMA_FLAG=1 | ||
| 276 | CONFIG_BOUNCE=y | ||
| 277 | CONFIG_VIRT_TO_BUS=y | ||
| 278 | CONFIG_ALIGNMENT_TRAP=y | ||
| 279 | |||
| 280 | # | ||
| 281 | # Boot options | ||
| 282 | # | ||
| 283 | CONFIG_ZBOOT_ROM_TEXT=0x0 | ||
| 284 | CONFIG_ZBOOT_ROM_BSS=0x0 | ||
| 285 | CONFIG_CMDLINE="root=/dev/mtdblock5 rootfstype=jffs2 console=ttyS2,38400" | ||
| 286 | # CONFIG_XIP_KERNEL is not set | ||
| 287 | # CONFIG_KEXEC is not set | ||
| 288 | |||
| 289 | # | ||
| 290 | # CPU Frequency scaling | ||
| 291 | # | ||
| 292 | CONFIG_CPU_FREQ=y | ||
| 293 | CONFIG_CPU_FREQ_TABLE=y | ||
| 294 | # CONFIG_CPU_FREQ_DEBUG is not set | ||
| 295 | CONFIG_CPU_FREQ_STAT=y | ||
| 296 | # CONFIG_CPU_FREQ_STAT_DETAILS is not set | ||
| 297 | CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y | ||
| 298 | # CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set | ||
| 299 | # CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set | ||
| 300 | # CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set | ||
| 301 | # CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set | ||
| 302 | CONFIG_CPU_FREQ_GOV_PERFORMANCE=y | ||
| 303 | # CONFIG_CPU_FREQ_GOV_POWERSAVE is not set | ||
| 304 | CONFIG_CPU_FREQ_GOV_USERSPACE=y | ||
| 305 | # CONFIG_CPU_FREQ_GOV_ONDEMAND is not set | ||
| 306 | # CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set | ||
| 307 | |||
| 308 | # | ||
| 309 | # Floating point emulation | ||
| 310 | # | ||
| 311 | |||
| 312 | # | ||
| 313 | # At least one emulation must be selected | ||
| 314 | # | ||
| 315 | CONFIG_FPE_NWFPE=y | ||
| 316 | # CONFIG_FPE_NWFPE_XP is not set | ||
| 317 | # CONFIG_FPE_FASTFPE is not set | ||
| 318 | |||
| 319 | # | ||
| 320 | # Userspace binary formats | ||
| 321 | # | ||
| 322 | CONFIG_BINFMT_ELF=y | ||
| 323 | # CONFIG_BINFMT_AOUT is not set | ||
| 324 | # CONFIG_BINFMT_MISC is not set | ||
| 325 | |||
| 326 | # | ||
| 327 | # Power management options | ||
| 328 | # | ||
| 329 | CONFIG_PM=y | ||
| 330 | # CONFIG_PM_DEBUG is not set | ||
| 331 | CONFIG_PM_SLEEP=y | ||
| 332 | CONFIG_SUSPEND=y | ||
| 333 | CONFIG_SUSPEND_FREEZER=y | ||
| 334 | CONFIG_APM_EMULATION=y | ||
| 335 | CONFIG_ARCH_SUSPEND_POSSIBLE=y | ||
| 336 | CONFIG_NET=y | ||
| 337 | |||
| 338 | # | ||
| 339 | # Networking options | ||
| 340 | # | ||
| 341 | CONFIG_PACKET=y | ||
| 342 | # CONFIG_PACKET_MMAP is not set | ||
| 343 | CONFIG_UNIX=y | ||
| 344 | # CONFIG_NET_KEY is not set | ||
| 345 | CONFIG_INET=y | ||
| 346 | # CONFIG_IP_MULTICAST is not set | ||
| 347 | # CONFIG_IP_ADVANCED_ROUTER is not set | ||
| 348 | CONFIG_IP_FIB_HASH=y | ||
| 349 | CONFIG_IP_PNP=y | ||
| 350 | CONFIG_IP_PNP_DHCP=y | ||
| 351 | CONFIG_IP_PNP_BOOTP=y | ||
| 352 | CONFIG_IP_PNP_RARP=y | ||
| 353 | # CONFIG_NET_IPIP is not set | ||
| 354 | # CONFIG_NET_IPGRE is not set | ||
| 355 | # CONFIG_ARPD is not set | ||
| 356 | # CONFIG_SYN_COOKIES is not set | ||
| 357 | # CONFIG_INET_AH is not set | ||
| 358 | # CONFIG_INET_ESP is not set | ||
| 359 | # CONFIG_INET_IPCOMP is not set | ||
| 360 | # CONFIG_INET_XFRM_TUNNEL is not set | ||
| 361 | # CONFIG_INET_TUNNEL is not set | ||
| 362 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set | ||
| 363 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set | ||
| 364 | # CONFIG_INET_XFRM_MODE_BEET is not set | ||
| 365 | # CONFIG_INET_LRO is not set | ||
| 366 | # CONFIG_INET_DIAG is not set | ||
| 367 | # CONFIG_TCP_CONG_ADVANCED is not set | ||
| 368 | CONFIG_TCP_CONG_CUBIC=y | ||
| 369 | CONFIG_DEFAULT_TCP_CONG="cubic" | ||
| 370 | # CONFIG_TCP_MD5SIG is not set | ||
| 371 | # CONFIG_IPV6 is not set | ||
| 372 | # CONFIG_NETWORK_SECMARK is not set | ||
| 373 | # CONFIG_NETFILTER is not set | ||
| 374 | # CONFIG_IP_DCCP is not set | ||
| 375 | # CONFIG_IP_SCTP is not set | ||
| 376 | # CONFIG_TIPC is not set | ||
| 377 | # CONFIG_ATM is not set | ||
| 378 | # CONFIG_BRIDGE is not set | ||
| 379 | # CONFIG_VLAN_8021Q is not set | ||
| 380 | # CONFIG_DECNET is not set | ||
| 381 | # CONFIG_LLC2 is not set | ||
| 382 | # CONFIG_IPX is not set | ||
| 383 | # CONFIG_ATALK is not set | ||
| 384 | # CONFIG_X25 is not set | ||
| 385 | # CONFIG_LAPB is not set | ||
| 386 | # CONFIG_ECONET is not set | ||
| 387 | # CONFIG_WAN_ROUTER is not set | ||
| 388 | # CONFIG_NET_SCHED is not set | ||
| 389 | |||
| 390 | # | ||
| 391 | # Network testing | ||
| 392 | # | ||
| 393 | # CONFIG_NET_PKTGEN is not set | ||
| 394 | # CONFIG_HAMRADIO is not set | ||
| 395 | # CONFIG_CAN is not set | ||
| 396 | # CONFIG_IRDA is not set | ||
| 397 | CONFIG_BT=m | ||
| 398 | CONFIG_BT_L2CAP=m | ||
| 399 | CONFIG_BT_SCO=m | ||
| 400 | CONFIG_BT_RFCOMM=m | ||
| 401 | CONFIG_BT_RFCOMM_TTY=y | ||
| 402 | CONFIG_BT_BNEP=m | ||
| 403 | CONFIG_BT_BNEP_MC_FILTER=y | ||
| 404 | CONFIG_BT_BNEP_PROTO_FILTER=y | ||
| 405 | CONFIG_BT_HIDP=m | ||
| 406 | |||
| 407 | # | ||
| 408 | # Bluetooth device drivers | ||
| 409 | # | ||
| 410 | CONFIG_BT_HCIUSB=m | ||
| 411 | CONFIG_BT_HCIUSB_SCO=y | ||
| 412 | # CONFIG_BT_HCIBTSDIO is not set | ||
| 413 | # CONFIG_BT_HCIUART is not set | ||
| 414 | # CONFIG_BT_HCIBCM203X is not set | ||
| 415 | # CONFIG_BT_HCIBPA10X is not set | ||
| 416 | # CONFIG_BT_HCIBFUSB is not set | ||
| 417 | # CONFIG_BT_HCIVHCI is not set | ||
| 418 | # CONFIG_AF_RXRPC is not set | ||
| 419 | |||
| 420 | # | ||
| 421 | # Wireless | ||
| 422 | # | ||
| 423 | # CONFIG_CFG80211 is not set | ||
| 424 | CONFIG_WIRELESS_EXT=y | ||
| 425 | CONFIG_WIRELESS_EXT_SYSFS=y | ||
| 426 | # CONFIG_MAC80211 is not set | ||
| 427 | CONFIG_IEEE80211=m | ||
| 428 | # CONFIG_IEEE80211_DEBUG is not set | ||
| 429 | CONFIG_IEEE80211_CRYPT_WEP=m | ||
| 430 | CONFIG_IEEE80211_CRYPT_CCMP=m | ||
| 431 | CONFIG_IEEE80211_CRYPT_TKIP=m | ||
| 432 | # CONFIG_RFKILL is not set | ||
| 433 | # CONFIG_NET_9P is not set | ||
| 434 | |||
| 435 | # | ||
| 436 | # Device Drivers | ||
| 437 | # | ||
| 438 | |||
| 439 | # | ||
| 440 | # Generic Driver Options | ||
| 441 | # | ||
| 442 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | ||
| 443 | CONFIG_STANDALONE=y | ||
| 444 | CONFIG_PREVENT_FIRMWARE_BUILD=y | ||
| 445 | CONFIG_FW_LOADER=y | ||
| 446 | CONFIG_FIRMWARE_IN_KERNEL=y | ||
| 447 | CONFIG_EXTRA_FIRMWARE="" | ||
| 448 | # CONFIG_DEBUG_DRIVER is not set | ||
| 449 | # CONFIG_DEBUG_DEVRES is not set | ||
| 450 | # CONFIG_SYS_HYPERVISOR is not set | ||
| 451 | # CONFIG_CONNECTOR is not set | ||
| 452 | CONFIG_MTD=y | ||
| 453 | # CONFIG_MTD_DEBUG is not set | ||
| 454 | # CONFIG_MTD_CONCAT is not set | ||
| 455 | CONFIG_MTD_PARTITIONS=y | ||
| 456 | # CONFIG_MTD_REDBOOT_PARTS is not set | ||
| 457 | # CONFIG_MTD_CMDLINE_PARTS is not set | ||
| 458 | # CONFIG_MTD_AFS_PARTS is not set | ||
| 459 | # CONFIG_MTD_AR7_PARTS is not set | ||
| 460 | |||
| 461 | # | ||
| 462 | # User Modules And Translation Layers | ||
| 463 | # | ||
| 464 | CONFIG_MTD_CHAR=y | ||
| 465 | CONFIG_MTD_BLKDEVS=y | ||
| 466 | CONFIG_MTD_BLOCK=y | ||
| 467 | # CONFIG_FTL is not set | ||
| 468 | # CONFIG_NFTL is not set | ||
| 469 | # CONFIG_INFTL is not set | ||
| 470 | # CONFIG_RFD_FTL is not set | ||
| 471 | # CONFIG_SSFDC is not set | ||
| 472 | # CONFIG_MTD_OOPS is not set | ||
| 473 | |||
| 474 | # | ||
| 475 | # RAM/ROM/Flash chip drivers | ||
| 476 | # | ||
| 477 | # CONFIG_MTD_CFI is not set | ||
| 478 | # CONFIG_MTD_JEDECPROBE is not set | ||
| 479 | CONFIG_MTD_MAP_BANK_WIDTH_1=y | ||
| 480 | CONFIG_MTD_MAP_BANK_WIDTH_2=y | ||
| 481 | CONFIG_MTD_MAP_BANK_WIDTH_4=y | ||
| 482 | # CONFIG_MTD_MAP_BANK_WIDTH_8 is not set | ||
| 483 | # CONFIG_MTD_MAP_BANK_WIDTH_16 is not set | ||
| 484 | # CONFIG_MTD_MAP_BANK_WIDTH_32 is not set | ||
| 485 | CONFIG_MTD_CFI_I1=y | ||
| 486 | CONFIG_MTD_CFI_I2=y | ||
| 487 | # CONFIG_MTD_CFI_I4 is not set | ||
| 488 | # CONFIG_MTD_CFI_I8 is not set | ||
| 489 | # CONFIG_MTD_RAM is not set | ||
| 490 | # CONFIG_MTD_ROM is not set | ||
| 491 | # CONFIG_MTD_ABSENT is not set | ||
| 492 | |||
| 493 | # | ||
| 494 | # Mapping drivers for chip access | ||
| 495 | # | ||
| 496 | # CONFIG_MTD_COMPLEX_MAPPINGS is not set | ||
| 497 | # CONFIG_MTD_SHARP_SL is not set | ||
| 498 | # CONFIG_MTD_PLATRAM is not set | ||
| 499 | |||
| 500 | # | ||
| 501 | # Self-contained MTD device drivers | ||
| 502 | # | ||
| 503 | # CONFIG_MTD_SLRAM is not set | ||
| 504 | # CONFIG_MTD_PHRAM is not set | ||
| 505 | # CONFIG_MTD_MTDRAM is not set | ||
| 506 | # CONFIG_MTD_BLOCK2MTD is not set | ||
| 507 | |||
| 508 | # | ||
| 509 | # Disk-On-Chip Device Drivers | ||
| 510 | # | ||
| 511 | # CONFIG_MTD_DOC2000 is not set | ||
| 512 | # CONFIG_MTD_DOC2001 is not set | ||
| 513 | # CONFIG_MTD_DOC2001PLUS is not set | ||
| 514 | CONFIG_MTD_NAND=y | ||
| 515 | # CONFIG_MTD_NAND_VERIFY_WRITE is not set | ||
| 516 | # CONFIG_MTD_NAND_ECC_SMC is not set | ||
| 517 | # CONFIG_MTD_NAND_MUSEUM_IDS is not set | ||
| 518 | # CONFIG_MTD_NAND_H1900 is not set | ||
| 519 | CONFIG_MTD_NAND_IDS=y | ||
| 520 | # CONFIG_MTD_NAND_DISKONCHIP is not set | ||
| 521 | # CONFIG_MTD_NAND_SHARPSL is not set | ||
| 522 | CONFIG_MTD_NAND_PXA3xx=y | ||
| 523 | # CONFIG_MTD_NAND_NANDSIM is not set | ||
| 524 | # CONFIG_MTD_NAND_PLATFORM is not set | ||
| 525 | # CONFIG_MTD_ALAUDA is not set | ||
| 526 | # CONFIG_MTD_ONENAND is not set | ||
| 527 | |||
| 528 | # | ||
| 529 | # UBI - Unsorted block images | ||
| 530 | # | ||
| 531 | # CONFIG_MTD_UBI is not set | ||
| 532 | # CONFIG_PARPORT is not set | ||
| 533 | CONFIG_BLK_DEV=y | ||
| 534 | # CONFIG_BLK_DEV_COW_COMMON is not set | ||
| 535 | CONFIG_BLK_DEV_LOOP=y | ||
| 536 | # CONFIG_BLK_DEV_CRYPTOLOOP is not set | ||
| 537 | # CONFIG_BLK_DEV_NBD is not set | ||
| 538 | # CONFIG_BLK_DEV_UB is not set | ||
| 539 | CONFIG_BLK_DEV_RAM=y | ||
| 540 | CONFIG_BLK_DEV_RAM_COUNT=16 | ||
| 541 | CONFIG_BLK_DEV_RAM_SIZE=4096 | ||
| 542 | # CONFIG_BLK_DEV_XIP is not set | ||
| 543 | # CONFIG_CDROM_PKTCDVD is not set | ||
| 544 | # CONFIG_ATA_OVER_ETH is not set | ||
| 545 | # CONFIG_MISC_DEVICES is not set | ||
| 546 | CONFIG_HAVE_IDE=y | ||
| 547 | # CONFIG_IDE is not set | ||
| 548 | |||
| 549 | # | ||
| 550 | # SCSI device support | ||
| 551 | # | ||
| 552 | # CONFIG_RAID_ATTRS is not set | ||
| 553 | CONFIG_SCSI=y | ||
| 554 | CONFIG_SCSI_DMA=y | ||
| 555 | # CONFIG_SCSI_TGT is not set | ||
| 556 | # CONFIG_SCSI_NETLINK is not set | ||
| 557 | CONFIG_SCSI_PROC_FS=y | ||
| 558 | |||
| 559 | # | ||
| 560 | # SCSI support type (disk, tape, CD-ROM) | ||
| 561 | # | ||
| 562 | CONFIG_BLK_DEV_SD=y | ||
| 563 | # CONFIG_CHR_DEV_ST is not set | ||
| 564 | # CONFIG_CHR_DEV_OSST is not set | ||
| 565 | # CONFIG_BLK_DEV_SR is not set | ||
| 566 | # CONFIG_CHR_DEV_SG is not set | ||
| 567 | # CONFIG_CHR_DEV_SCH is not set | ||
| 568 | |||
| 569 | # | ||
| 570 | # Some SCSI devices (e.g. CD jukebox) support multiple LUNs | ||
| 571 | # | ||
| 572 | # CONFIG_SCSI_MULTI_LUN is not set | ||
| 573 | # CONFIG_SCSI_CONSTANTS is not set | ||
| 574 | # CONFIG_SCSI_LOGGING is not set | ||
| 575 | # CONFIG_SCSI_SCAN_ASYNC is not set | ||
| 576 | CONFIG_SCSI_WAIT_SCAN=m | ||
| 577 | |||
| 578 | # | ||
| 579 | # SCSI Transports | ||
| 580 | # | ||
| 581 | # CONFIG_SCSI_SPI_ATTRS is not set | ||
| 582 | # CONFIG_SCSI_FC_ATTRS is not set | ||
| 583 | # CONFIG_SCSI_ISCSI_ATTRS is not set | ||
| 584 | # CONFIG_SCSI_SAS_LIBSAS is not set | ||
| 585 | # CONFIG_SCSI_SRP_ATTRS is not set | ||
| 586 | CONFIG_SCSI_LOWLEVEL=y | ||
| 587 | # CONFIG_ISCSI_TCP is not set | ||
| 588 | # CONFIG_SCSI_DEBUG is not set | ||
| 589 | # CONFIG_SCSI_DH is not set | ||
| 590 | # CONFIG_ATA is not set | ||
| 591 | # CONFIG_MD is not set | ||
| 592 | CONFIG_NETDEVICES=y | ||
| 593 | # CONFIG_DUMMY is not set | ||
| 594 | # CONFIG_BONDING is not set | ||
| 595 | # CONFIG_MACVLAN is not set | ||
| 596 | # CONFIG_EQUALIZER is not set | ||
| 597 | # CONFIG_TUN is not set | ||
| 598 | # CONFIG_VETH is not set | ||
| 599 | # CONFIG_PHYLIB is not set | ||
| 600 | CONFIG_NET_ETHERNET=y | ||
| 601 | CONFIG_MII=y | ||
| 602 | # CONFIG_AX88796 is not set | ||
| 603 | # CONFIG_SMC91X is not set | ||
| 604 | CONFIG_DM9000=y | ||
| 605 | CONFIG_DM9000_DEBUGLEVEL=0 | ||
| 606 | CONFIG_DM9000_FORCE_SIMPLE_PHY_POLL=y | ||
| 607 | # CONFIG_SMC911X is not set | ||
| 608 | # CONFIG_IBM_NEW_EMAC_ZMII is not set | ||
| 609 | # CONFIG_IBM_NEW_EMAC_RGMII is not set | ||
| 610 | # CONFIG_IBM_NEW_EMAC_TAH is not set | ||
| 611 | # CONFIG_IBM_NEW_EMAC_EMAC4 is not set | ||
| 612 | # CONFIG_B44 is not set | ||
| 613 | # CONFIG_NETDEV_1000 is not set | ||
| 614 | # CONFIG_NETDEV_10000 is not set | ||
| 615 | |||
| 616 | # | ||
| 617 | # Wireless LAN | ||
| 618 | # | ||
| 619 | # CONFIG_WLAN_PRE80211 is not set | ||
| 620 | CONFIG_WLAN_80211=y | ||
| 621 | CONFIG_LIBERTAS=m | ||
| 622 | # CONFIG_LIBERTAS_USB is not set | ||
| 623 | CONFIG_LIBERTAS_SDIO=m | ||
| 624 | # CONFIG_LIBERTAS_DEBUG is not set | ||
| 625 | # CONFIG_USB_ZD1201 is not set | ||
| 626 | # CONFIG_USB_NET_RNDIS_WLAN is not set | ||
| 627 | # CONFIG_IWLWIFI_LEDS is not set | ||
| 628 | # CONFIG_HOSTAP is not set | ||
| 629 | |||
| 630 | # | ||
| 631 | # USB Network Adapters | ||
| 632 | # | ||
| 633 | # CONFIG_USB_CATC is not set | ||
| 634 | # CONFIG_USB_KAWETH is not set | ||
| 635 | # CONFIG_USB_PEGASUS is not set | ||
| 636 | # CONFIG_USB_RTL8150 is not set | ||
| 637 | # CONFIG_USB_USBNET is not set | ||
| 638 | # CONFIG_WAN is not set | ||
| 639 | # CONFIG_PPP is not set | ||
| 640 | # CONFIG_SLIP is not set | ||
| 641 | # CONFIG_NETCONSOLE is not set | ||
| 642 | # CONFIG_NETPOLL is not set | ||
| 643 | # CONFIG_NET_POLL_CONTROLLER is not set | ||
| 644 | # CONFIG_ISDN is not set | ||
| 645 | |||
| 646 | # | ||
| 647 | # Input device support | ||
| 648 | # | ||
| 649 | CONFIG_INPUT=y | ||
| 650 | # CONFIG_INPUT_FF_MEMLESS is not set | ||
| 651 | # CONFIG_INPUT_POLLDEV is not set | ||
| 652 | |||
| 653 | # | ||
| 654 | # Userland interfaces | ||
| 655 | # | ||
| 656 | CONFIG_INPUT_MOUSEDEV=y | ||
| 657 | # CONFIG_INPUT_MOUSEDEV_PSAUX is not set | ||
| 658 | CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 | ||
| 659 | CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 | ||
| 660 | # CONFIG_INPUT_JOYDEV is not set | ||
| 661 | CONFIG_INPUT_EVDEV=y | ||
| 662 | # CONFIG_INPUT_EVBUG is not set | ||
| 663 | |||
| 664 | # | ||
| 665 | # Input Device Drivers | ||
| 666 | # | ||
| 667 | CONFIG_INPUT_KEYBOARD=y | ||
| 668 | # CONFIG_KEYBOARD_ATKBD is not set | ||
| 669 | # CONFIG_KEYBOARD_SUNKBD is not set | ||
| 670 | # CONFIG_KEYBOARD_LKKBD is not set | ||
| 671 | # CONFIG_KEYBOARD_XTKBD is not set | ||
| 672 | # CONFIG_KEYBOARD_NEWTON is not set | ||
| 673 | # CONFIG_KEYBOARD_STOWAWAY is not set | ||
| 674 | CONFIG_KEYBOARD_PXA27x=m | ||
| 675 | # CONFIG_KEYBOARD_GPIO is not set | ||
| 676 | # CONFIG_INPUT_MOUSE is not set | ||
| 677 | # CONFIG_INPUT_JOYSTICK is not set | ||
| 678 | # CONFIG_INPUT_TABLET is not set | ||
| 679 | CONFIG_INPUT_TOUCHSCREEN=y | ||
| 680 | # CONFIG_TOUCHSCREEN_FUJITSU is not set | ||
| 681 | # CONFIG_TOUCHSCREEN_GUNZE is not set | ||
| 682 | # CONFIG_TOUCHSCREEN_ELO is not set | ||
| 683 | # CONFIG_TOUCHSCREEN_MTOUCH is not set | ||
| 684 | # CONFIG_TOUCHSCREEN_INEXIO is not set | ||
| 685 | # CONFIG_TOUCHSCREEN_MK712 is not set | ||
| 686 | # CONFIG_TOUCHSCREEN_PENMOUNT is not set | ||
| 687 | # CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set | ||
| 688 | # CONFIG_TOUCHSCREEN_TOUCHWIN is not set | ||
| 689 | # CONFIG_TOUCHSCREEN_UCB1400 is not set | ||
| 690 | # CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set | ||
| 691 | # CONFIG_TOUCHSCREEN_TOUCHIT213 is not set | ||
| 692 | # CONFIG_INPUT_MISC is not set | ||
| 693 | |||
| 694 | # | ||
| 695 | # Hardware I/O ports | ||
| 696 | # | ||
| 697 | # CONFIG_SERIO is not set | ||
| 698 | # CONFIG_GAMEPORT is not set | ||
| 699 | |||
| 700 | # | ||
| 701 | # Character devices | ||
| 702 | # | ||
| 703 | CONFIG_VT=y | ||
| 704 | CONFIG_CONSOLE_TRANSLATIONS=y | ||
| 705 | CONFIG_VT_CONSOLE=y | ||
| 706 | CONFIG_HW_CONSOLE=y | ||
| 707 | # CONFIG_VT_HW_CONSOLE_BINDING is not set | ||
| 708 | CONFIG_DEVKMEM=y | ||
| 709 | # CONFIG_SERIAL_NONSTANDARD is not set | ||
| 710 | |||
| 711 | # | ||
| 712 | # Serial drivers | ||
| 713 | # | ||
| 714 | # CONFIG_SERIAL_8250 is not set | ||
| 715 | |||
| 716 | # | ||
| 717 | # Non-8250 serial port support | ||
| 718 | # | ||
| 719 | CONFIG_SERIAL_PXA=y | ||
| 720 | CONFIG_SERIAL_PXA_CONSOLE=y | ||
| 721 | CONFIG_SERIAL_CORE=y | ||
| 722 | CONFIG_SERIAL_CORE_CONSOLE=y | ||
| 723 | CONFIG_UNIX98_PTYS=y | ||
| 724 | # CONFIG_LEGACY_PTYS is not set | ||
| 725 | # CONFIG_IPMI_HANDLER is not set | ||
| 726 | # CONFIG_HW_RANDOM is not set | ||
| 727 | # CONFIG_NVRAM is not set | ||
| 728 | # CONFIG_R3964 is not set | ||
| 729 | # CONFIG_RAW_DRIVER is not set | ||
| 730 | # CONFIG_TCG_TPM is not set | ||
| 731 | CONFIG_I2C=y | ||
| 732 | CONFIG_I2C_BOARDINFO=y | ||
| 733 | # CONFIG_I2C_CHARDEV is not set | ||
| 734 | CONFIG_I2C_HELPER_AUTO=y | ||
| 735 | |||
| 736 | # | ||
| 737 | # I2C Hardware Bus support | ||
| 738 | # | ||
| 739 | |||
| 740 | # | ||
| 741 | # I2C system bus drivers (mostly embedded / system-on-chip) | ||
| 742 | # | ||
| 743 | # CONFIG_I2C_GPIO is not set | ||
| 744 | # CONFIG_I2C_OCORES is not set | ||
| 745 | CONFIG_I2C_PXA=y | ||
| 746 | # CONFIG_I2C_PXA_SLAVE is not set | ||
| 747 | # CONFIG_I2C_SIMTEC is not set | ||
| 748 | |||
| 749 | # | ||
| 750 | # External I2C/SMBus adapter drivers | ||
| 751 | # | ||
| 752 | # CONFIG_I2C_PARPORT_LIGHT is not set | ||
| 753 | # CONFIG_I2C_TAOS_EVM is not set | ||
| 754 | # CONFIG_I2C_TINY_USB is not set | ||
| 755 | |||
| 756 | # | ||
| 757 | # Other I2C/SMBus bus drivers | ||
| 758 | # | ||
| 759 | # CONFIG_I2C_PCA_PLATFORM is not set | ||
| 760 | # CONFIG_I2C_STUB is not set | ||
| 761 | |||
| 762 | # | ||
| 763 | # Miscellaneous I2C Chip support | ||
| 764 | # | ||
| 765 | # CONFIG_DS1682 is not set | ||
| 766 | # CONFIG_AT24 is not set | ||
| 767 | # CONFIG_SENSORS_EEPROM is not set | ||
| 768 | # CONFIG_SENSORS_PCF8574 is not set | ||
| 769 | # CONFIG_PCF8575 is not set | ||
| 770 | # CONFIG_SENSORS_PCF8591 is not set | ||
| 771 | # CONFIG_TPS65010 is not set | ||
| 772 | # CONFIG_SENSORS_MAX6875 is not set | ||
| 773 | # CONFIG_SENSORS_TSL2550 is not set | ||
| 774 | # CONFIG_I2C_DEBUG_CORE is not set | ||
| 775 | # CONFIG_I2C_DEBUG_ALGO is not set | ||
| 776 | # CONFIG_I2C_DEBUG_BUS is not set | ||
| 777 | # CONFIG_I2C_DEBUG_CHIP is not set | ||
| 778 | # CONFIG_SPI is not set | ||
| 779 | CONFIG_ARCH_REQUIRE_GPIOLIB=y | ||
| 780 | CONFIG_GPIOLIB=y | ||
| 781 | # CONFIG_DEBUG_GPIO is not set | ||
| 782 | # CONFIG_GPIO_SYSFS is not set | ||
| 783 | |||
| 784 | # | ||
| 785 | # I2C GPIO expanders: | ||
| 786 | # | ||
| 787 | # CONFIG_GPIO_MAX732X is not set | ||
| 788 | CONFIG_GPIO_PCA953X=y | ||
| 789 | # CONFIG_GPIO_PCF857X is not set | ||
| 790 | |||
| 791 | # | ||
| 792 | # PCI GPIO expanders: | ||
| 793 | # | ||
| 794 | |||
| 795 | # | ||
| 796 | # SPI GPIO expanders: | ||
| 797 | # | ||
| 798 | # CONFIG_W1 is not set | ||
| 799 | # CONFIG_POWER_SUPPLY is not set | ||
| 800 | # CONFIG_HWMON is not set | ||
| 801 | # CONFIG_WATCHDOG is not set | ||
| 802 | |||
| 803 | # | ||
| 804 | # Sonics Silicon Backplane | ||
| 805 | # | ||
| 806 | CONFIG_SSB_POSSIBLE=y | ||
| 807 | # CONFIG_SSB is not set | ||
| 808 | |||
| 809 | # | ||
| 810 | # Multifunction device drivers | ||
| 811 | # | ||
| 812 | # CONFIG_MFD_CORE is not set | ||
| 813 | # CONFIG_MFD_SM501 is not set | ||
| 814 | # CONFIG_HTC_EGPIO is not set | ||
| 815 | # CONFIG_HTC_PASIC3 is not set | ||
| 816 | # CONFIG_MFD_TMIO is not set | ||
| 817 | # CONFIG_MFD_T7L66XB is not set | ||
| 818 | # CONFIG_MFD_TC6387XB is not set | ||
| 819 | # CONFIG_MFD_TC6393XB is not set | ||
| 820 | |||
| 821 | # | ||
| 822 | # Multimedia devices | ||
| 823 | # | ||
| 824 | |||
| 825 | # | ||
| 826 | # Multimedia core support | ||
| 827 | # | ||
| 828 | # CONFIG_VIDEO_DEV is not set | ||
| 829 | # CONFIG_DVB_CORE is not set | ||
| 830 | # CONFIG_VIDEO_MEDIA is not set | ||
| 831 | |||
| 832 | # | ||
| 833 | # Multimedia drivers | ||
| 834 | # | ||
| 835 | # CONFIG_DAB is not set | ||
| 836 | |||
| 837 | # | ||
| 838 | # Graphics support | ||
| 839 | # | ||
| 840 | # CONFIG_VGASTATE is not set | ||
| 841 | # CONFIG_VIDEO_OUTPUT_CONTROL is not set | ||
| 842 | CONFIG_FB=y | ||
| 843 | # CONFIG_FIRMWARE_EDID is not set | ||
| 844 | # CONFIG_FB_DDC is not set | ||
| 845 | CONFIG_FB_CFB_FILLRECT=y | ||
| 846 | CONFIG_FB_CFB_COPYAREA=y | ||
| 847 | CONFIG_FB_CFB_IMAGEBLIT=y | ||
| 848 | # CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set | ||
| 849 | # CONFIG_FB_SYS_FILLRECT is not set | ||
| 850 | # CONFIG_FB_SYS_COPYAREA is not set | ||
| 851 | # CONFIG_FB_SYS_IMAGEBLIT is not set | ||
| 852 | # CONFIG_FB_FOREIGN_ENDIAN is not set | ||
| 853 | # CONFIG_FB_SYS_FOPS is not set | ||
| 854 | # CONFIG_FB_SVGALIB is not set | ||
| 855 | # CONFIG_FB_MACMODES is not set | ||
| 856 | # CONFIG_FB_BACKLIGHT is not set | ||
| 857 | # CONFIG_FB_MODE_HELPERS is not set | ||
| 858 | # CONFIG_FB_TILEBLITTING is not set | ||
| 859 | |||
| 860 | # | ||
| 861 | # Frame buffer hardware drivers | ||
| 862 | # | ||
| 863 | # CONFIG_FB_S1D13XXX is not set | ||
| 864 | CONFIG_FB_PXA=y | ||
| 865 | # CONFIG_FB_PXA_SMARTPANEL is not set | ||
| 866 | # CONFIG_FB_PXA_PARAMETERS is not set | ||
| 867 | # CONFIG_FB_MBX is not set | ||
| 868 | # CONFIG_FB_W100 is not set | ||
| 869 | # CONFIG_FB_AM200EPD is not set | ||
| 870 | # CONFIG_FB_VIRTUAL is not set | ||
| 871 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set | ||
| 872 | |||
| 873 | # | ||
| 874 | # Display device support | ||
| 875 | # | ||
| 876 | # CONFIG_DISPLAY_SUPPORT is not set | ||
| 877 | |||
| 878 | # | ||
| 879 | # Console display driver support | ||
| 880 | # | ||
| 881 | # CONFIG_VGA_CONSOLE is not set | ||
| 882 | CONFIG_DUMMY_CONSOLE=y | ||
| 883 | CONFIG_FRAMEBUFFER_CONSOLE=y | ||
| 884 | CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y | ||
| 885 | # CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set | ||
| 886 | CONFIG_FONTS=y | ||
| 887 | # CONFIG_FONT_8x8 is not set | ||
| 888 | # CONFIG_FONT_8x16 is not set | ||
| 889 | CONFIG_FONT_6x11=y | ||
| 890 | # CONFIG_FONT_7x14 is not set | ||
| 891 | # CONFIG_FONT_PEARL_8x8 is not set | ||
| 892 | # CONFIG_FONT_ACORN_8x8 is not set | ||
| 893 | # CONFIG_FONT_MINI_4x6 is not set | ||
| 894 | # CONFIG_FONT_SUN8x16 is not set | ||
| 895 | # CONFIG_FONT_SUN12x22 is not set | ||
| 896 | # CONFIG_FONT_10x18 is not set | ||
| 897 | CONFIG_LOGO=y | ||
| 898 | CONFIG_LOGO_LINUX_MONO=y | ||
| 899 | CONFIG_LOGO_LINUX_VGA16=y | ||
| 900 | CONFIG_LOGO_LINUX_CLUT224=y | ||
| 901 | CONFIG_SOUND=m | ||
| 902 | CONFIG_SND=m | ||
| 903 | CONFIG_SND_TIMER=m | ||
| 904 | CONFIG_SND_PCM=m | ||
| 905 | # CONFIG_SND_SEQUENCER is not set | ||
| 906 | # CONFIG_SND_MIXER_OSS is not set | ||
| 907 | # CONFIG_SND_PCM_OSS is not set | ||
| 908 | # CONFIG_SND_DYNAMIC_MINORS is not set | ||
| 909 | CONFIG_SND_SUPPORT_OLD_API=y | ||
| 910 | CONFIG_SND_VERBOSE_PROCFS=y | ||
| 911 | # CONFIG_SND_VERBOSE_PRINTK is not set | ||
| 912 | # CONFIG_SND_DEBUG is not set | ||
| 913 | CONFIG_SND_DRIVERS=y | ||
| 914 | # CONFIG_SND_DUMMY is not set | ||
| 915 | # CONFIG_SND_MTPAV is not set | ||
| 916 | # CONFIG_SND_SERIAL_U16550 is not set | ||
| 917 | # CONFIG_SND_MPU401 is not set | ||
| 918 | CONFIG_SND_ARM=y | ||
| 919 | # CONFIG_SND_PXA2XX_AC97 is not set | ||
| 920 | CONFIG_SND_USB=y | ||
| 921 | # CONFIG_SND_USB_AUDIO is not set | ||
| 922 | # CONFIG_SND_USB_CAIAQ is not set | ||
| 923 | CONFIG_SND_SOC=m | ||
| 924 | CONFIG_SND_PXA2XX_SOC=m | ||
| 925 | # CONFIG_SOUND_PRIME is not set | ||
| 926 | CONFIG_HID_SUPPORT=y | ||
| 927 | CONFIG_HID=y | ||
| 928 | CONFIG_HID_DEBUG=y | ||
| 929 | # CONFIG_HIDRAW is not set | ||
| 930 | |||
| 931 | # | ||
| 932 | # USB Input Devices | ||
| 933 | # | ||
| 934 | CONFIG_USB_HID=y | ||
| 935 | # CONFIG_USB_HIDINPUT_POWERBOOK is not set | ||
| 936 | # CONFIG_HID_FF is not set | ||
| 937 | # CONFIG_USB_HIDDEV is not set | ||
| 938 | CONFIG_USB_SUPPORT=y | ||
| 939 | CONFIG_USB_ARCH_HAS_HCD=y | ||
| 940 | CONFIG_USB_ARCH_HAS_OHCI=y | ||
| 941 | # CONFIG_USB_ARCH_HAS_EHCI is not set | ||
| 942 | CONFIG_USB=y | ||
| 943 | # CONFIG_USB_DEBUG is not set | ||
| 944 | # CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set | ||
| 945 | |||
| 946 | # | ||
| 947 | # Miscellaneous USB options | ||
| 948 | # | ||
| 949 | CONFIG_USB_DEVICEFS=y | ||
| 950 | # CONFIG_USB_DEVICE_CLASS is not set | ||
| 951 | # CONFIG_USB_DYNAMIC_MINORS is not set | ||
| 952 | # CONFIG_USB_SUSPEND is not set | ||
| 953 | # CONFIG_USB_OTG is not set | ||
| 954 | CONFIG_USB_MON=y | ||
| 955 | |||
| 956 | # | ||
| 957 | # USB Host Controller Drivers | ||
| 958 | # | ||
| 959 | # CONFIG_USB_C67X00_HCD is not set | ||
| 960 | # CONFIG_USB_ISP116X_HCD is not set | ||
| 961 | # CONFIG_USB_ISP1760_HCD is not set | ||
| 962 | CONFIG_USB_OHCI_HCD=y | ||
| 963 | # CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set | ||
| 964 | # CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set | ||
| 965 | CONFIG_USB_OHCI_LITTLE_ENDIAN=y | ||
| 966 | # CONFIG_USB_SL811_HCD is not set | ||
| 967 | # CONFIG_USB_R8A66597_HCD is not set | ||
| 968 | # CONFIG_USB_MUSB_HDRC is not set | ||
| 969 | |||
| 970 | # | ||
| 971 | # USB Device Class drivers | ||
| 972 | # | ||
| 973 | # CONFIG_USB_ACM is not set | ||
| 974 | # CONFIG_USB_PRINTER is not set | ||
| 975 | # CONFIG_USB_WDM is not set | ||
| 976 | |||
| 977 | # | ||
| 978 | # NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' | ||
| 979 | # | ||
| 980 | |||
| 981 | # | ||
| 982 | # may also be needed; see USB_STORAGE Help for more information | ||
| 983 | # | ||
| 984 | CONFIG_USB_STORAGE=y | ||
| 985 | # CONFIG_USB_STORAGE_DEBUG is not set | ||
| 986 | # CONFIG_USB_STORAGE_DATAFAB is not set | ||
| 987 | # CONFIG_USB_STORAGE_FREECOM is not set | ||
| 988 | # CONFIG_USB_STORAGE_ISD200 is not set | ||
| 989 | # CONFIG_USB_STORAGE_DPCM is not set | ||
| 990 | # CONFIG_USB_STORAGE_USBAT is not set | ||
| 991 | # CONFIG_USB_STORAGE_SDDR09 is not set | ||
| 992 | # CONFIG_USB_STORAGE_SDDR55 is not set | ||
| 993 | # CONFIG_USB_STORAGE_JUMPSHOT is not set | ||
| 994 | # CONFIG_USB_STORAGE_ALAUDA is not set | ||
| 995 | # CONFIG_USB_STORAGE_ONETOUCH is not set | ||
| 996 | # CONFIG_USB_STORAGE_KARMA is not set | ||
| 997 | # CONFIG_USB_STORAGE_SIERRA is not set | ||
| 998 | # CONFIG_USB_STORAGE_CYPRESS_ATACB is not set | ||
| 999 | # CONFIG_USB_LIBUSUAL is not set | ||
| 1000 | |||
| 1001 | # | ||
| 1002 | # USB Imaging devices | ||
| 1003 | # | ||
| 1004 | # CONFIG_USB_MDC800 is not set | ||
| 1005 | # CONFIG_USB_MICROTEK is not set | ||
| 1006 | |||
| 1007 | # | ||
| 1008 | # USB port drivers | ||
| 1009 | # | ||
| 1010 | # CONFIG_USB_SERIAL is not set | ||
| 1011 | |||
| 1012 | # | ||
| 1013 | # USB Miscellaneous drivers | ||
| 1014 | # | ||
| 1015 | # CONFIG_USB_EMI62 is not set | ||
| 1016 | # CONFIG_USB_EMI26 is not set | ||
| 1017 | # CONFIG_USB_ADUTUX is not set | ||
| 1018 | # CONFIG_USB_RIO500 is not set | ||
| 1019 | # CONFIG_USB_LEGOTOWER is not set | ||
| 1020 | # CONFIG_USB_LCD is not set | ||
| 1021 | # CONFIG_USB_BERRY_CHARGE is not set | ||
| 1022 | # CONFIG_USB_LED is not set | ||
| 1023 | # CONFIG_USB_CYPRESS_CY7C63 is not set | ||
| 1024 | # CONFIG_USB_CYTHERM is not set | ||
| 1025 | # CONFIG_USB_PHIDGET is not set | ||
| 1026 | # CONFIG_USB_IDMOUSE is not set | ||
| 1027 | # CONFIG_USB_FTDI_ELAN is not set | ||
| 1028 | # CONFIG_USB_APPLEDISPLAY is not set | ||
| 1029 | # CONFIG_USB_LD is not set | ||
| 1030 | # CONFIG_USB_TRANCEVIBRATOR is not set | ||
| 1031 | # CONFIG_USB_IOWARRIOR is not set | ||
| 1032 | # CONFIG_USB_TEST is not set | ||
| 1033 | # CONFIG_USB_ISIGHTFW is not set | ||
| 1034 | # CONFIG_USB_GADGET is not set | ||
| 1035 | CONFIG_MMC=m | ||
| 1036 | # CONFIG_MMC_DEBUG is not set | ||
| 1037 | # CONFIG_MMC_UNSAFE_RESUME is not set | ||
| 1038 | |||
| 1039 | # | ||
| 1040 | # MMC/SD Card Drivers | ||
| 1041 | # | ||
| 1042 | CONFIG_MMC_BLOCK=m | ||
| 1043 | CONFIG_MMC_BLOCK_BOUNCE=y | ||
| 1044 | # CONFIG_SDIO_UART is not set | ||
| 1045 | # CONFIG_MMC_TEST is not set | ||
| 1046 | |||
| 1047 | # | ||
| 1048 | # MMC/SD Host Controller Drivers | ||
| 1049 | # | ||
| 1050 | CONFIG_MMC_PXA=m | ||
| 1051 | # CONFIG_MMC_SDHCI is not set | ||
| 1052 | CONFIG_NEW_LEDS=y | ||
| 1053 | CONFIG_LEDS_CLASS=y | ||
| 1054 | |||
| 1055 | # | ||
| 1056 | # LED drivers | ||
| 1057 | # | ||
| 1058 | # CONFIG_LEDS_PCA9532 is not set | ||
| 1059 | CONFIG_LEDS_GPIO=y | ||
| 1060 | # CONFIG_LEDS_PCA955X is not set | ||
| 1061 | |||
| 1062 | # | ||
| 1063 | # LED Triggers | ||
| 1064 | # | ||
| 1065 | CONFIG_LEDS_TRIGGERS=y | ||
| 1066 | # CONFIG_LEDS_TRIGGER_TIMER is not set | ||
| 1067 | CONFIG_LEDS_TRIGGER_HEARTBEAT=y | ||
| 1068 | # CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set | ||
| 1069 | CONFIG_RTC_LIB=y | ||
| 1070 | CONFIG_RTC_CLASS=y | ||
| 1071 | CONFIG_RTC_HCTOSYS=y | ||
| 1072 | CONFIG_RTC_HCTOSYS_DEVICE="rtc0" | ||
| 1073 | # CONFIG_RTC_DEBUG is not set | ||
| 1074 | |||
| 1075 | # | ||
| 1076 | # RTC interfaces | ||
| 1077 | # | ||
| 1078 | CONFIG_RTC_INTF_SYSFS=y | ||
| 1079 | CONFIG_RTC_INTF_PROC=y | ||
| 1080 | CONFIG_RTC_INTF_DEV=y | ||
| 1081 | # CONFIG_RTC_INTF_DEV_UIE_EMUL is not set | ||
| 1082 | # CONFIG_RTC_DRV_TEST is not set | ||
| 1083 | |||
| 1084 | # | ||
| 1085 | # I2C RTC drivers | ||
| 1086 | # | ||
| 1087 | # CONFIG_RTC_DRV_DS1307 is not set | ||
| 1088 | # CONFIG_RTC_DRV_DS1374 is not set | ||
| 1089 | # CONFIG_RTC_DRV_DS1672 is not set | ||
| 1090 | # CONFIG_RTC_DRV_MAX6900 is not set | ||
| 1091 | # CONFIG_RTC_DRV_RS5C372 is not set | ||
| 1092 | # CONFIG_RTC_DRV_ISL1208 is not set | ||
| 1093 | # CONFIG_RTC_DRV_X1205 is not set | ||
| 1094 | # CONFIG_RTC_DRV_PCF8563 is not set | ||
| 1095 | # CONFIG_RTC_DRV_PCF8583 is not set | ||
| 1096 | # CONFIG_RTC_DRV_M41T80 is not set | ||
| 1097 | # CONFIG_RTC_DRV_S35390A is not set | ||
| 1098 | # CONFIG_RTC_DRV_FM3130 is not set | ||
| 1099 | |||
| 1100 | # | ||
| 1101 | # SPI RTC drivers | ||
| 1102 | # | ||
| 1103 | |||
| 1104 | # | ||
| 1105 | # Platform RTC drivers | ||
| 1106 | # | ||
| 1107 | # CONFIG_RTC_DRV_CMOS is not set | ||
| 1108 | # CONFIG_RTC_DRV_DS1511 is not set | ||
| 1109 | # CONFIG_RTC_DRV_DS1553 is not set | ||
| 1110 | # CONFIG_RTC_DRV_DS1742 is not set | ||
| 1111 | # CONFIG_RTC_DRV_STK17TA8 is not set | ||
| 1112 | # CONFIG_RTC_DRV_M48T86 is not set | ||
| 1113 | # CONFIG_RTC_DRV_M48T59 is not set | ||
| 1114 | # CONFIG_RTC_DRV_V3020 is not set | ||
| 1115 | |||
| 1116 | # | ||
| 1117 | # on-CPU RTC drivers | ||
| 1118 | # | ||
| 1119 | CONFIG_RTC_DRV_SA1100=y | ||
| 1120 | # CONFIG_DMADEVICES is not set | ||
| 1121 | |||
| 1122 | # | ||
| 1123 | # Voltage and Current regulators | ||
| 1124 | # | ||
| 1125 | # CONFIG_REGULATOR is not set | ||
| 1126 | # CONFIG_REGULATOR_FIXED_VOLTAGE is not set | ||
| 1127 | # CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set | ||
| 1128 | # CONFIG_REGULATOR_BQ24022 is not set | ||
| 1129 | # CONFIG_UIO is not set | ||
| 1130 | |||
| 1131 | # | ||
| 1132 | # File systems | ||
| 1133 | # | ||
| 1134 | CONFIG_EXT2_FS=y | ||
| 1135 | # CONFIG_EXT2_FS_XATTR is not set | ||
| 1136 | # CONFIG_EXT2_FS_XIP is not set | ||
| 1137 | CONFIG_EXT3_FS=y | ||
| 1138 | # CONFIG_EXT3_FS_XATTR is not set | ||
| 1139 | # CONFIG_EXT4DEV_FS is not set | ||
| 1140 | CONFIG_JBD=y | ||
| 1141 | # CONFIG_JBD_DEBUG is not set | ||
| 1142 | # CONFIG_REISERFS_FS is not set | ||
| 1143 | # CONFIG_JFS_FS is not set | ||
| 1144 | CONFIG_FS_POSIX_ACL=y | ||
| 1145 | # CONFIG_XFS_FS is not set | ||
| 1146 | # CONFIG_OCFS2_FS is not set | ||
| 1147 | CONFIG_DNOTIFY=y | ||
| 1148 | CONFIG_INOTIFY=y | ||
| 1149 | CONFIG_INOTIFY_USER=y | ||
| 1150 | # CONFIG_QUOTA is not set | ||
| 1151 | # CONFIG_AUTOFS_FS is not set | ||
| 1152 | # CONFIG_AUTOFS4_FS is not set | ||
| 1153 | # CONFIG_FUSE_FS is not set | ||
| 1154 | |||
| 1155 | # | ||
| 1156 | # CD-ROM/DVD Filesystems | ||
| 1157 | # | ||
| 1158 | # CONFIG_ISO9660_FS is not set | ||
| 1159 | # CONFIG_UDF_FS is not set | ||
| 1160 | |||
| 1161 | # | ||
| 1162 | # DOS/FAT/NT Filesystems | ||
| 1163 | # | ||
| 1164 | CONFIG_FAT_FS=m | ||
| 1165 | CONFIG_MSDOS_FS=m | ||
| 1166 | CONFIG_VFAT_FS=m | ||
| 1167 | CONFIG_FAT_DEFAULT_CODEPAGE=437 | ||
| 1168 | CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" | ||
| 1169 | # CONFIG_NTFS_FS is not set | ||
| 1170 | |||
| 1171 | # | ||
| 1172 | # Pseudo filesystems | ||
| 1173 | # | ||
| 1174 | CONFIG_PROC_FS=y | ||
| 1175 | CONFIG_PROC_SYSCTL=y | ||
| 1176 | CONFIG_SYSFS=y | ||
| 1177 | CONFIG_TMPFS=y | ||
| 1178 | # CONFIG_TMPFS_POSIX_ACL is not set | ||
| 1179 | # CONFIG_HUGETLB_PAGE is not set | ||
| 1180 | # CONFIG_CONFIGFS_FS is not set | ||
| 1181 | |||
| 1182 | # | ||
| 1183 | # Miscellaneous filesystems | ||
| 1184 | # | ||
| 1185 | # CONFIG_ADFS_FS is not set | ||
| 1186 | # CONFIG_AFFS_FS is not set | ||
| 1187 | # CONFIG_HFS_FS is not set | ||
| 1188 | # CONFIG_HFSPLUS_FS is not set | ||
| 1189 | # CONFIG_BEFS_FS is not set | ||
| 1190 | # CONFIG_BFS_FS is not set | ||
| 1191 | # CONFIG_EFS_FS is not set | ||
| 1192 | CONFIG_JFFS2_FS=y | ||
| 1193 | CONFIG_JFFS2_FS_DEBUG=0 | ||
| 1194 | CONFIG_JFFS2_FS_WRITEBUFFER=y | ||
| 1195 | # CONFIG_JFFS2_FS_WBUF_VERIFY is not set | ||
| 1196 | CONFIG_JFFS2_SUMMARY=y | ||
| 1197 | # CONFIG_JFFS2_FS_XATTR is not set | ||
| 1198 | # CONFIG_JFFS2_COMPRESSION_OPTIONS is not set | ||
| 1199 | CONFIG_JFFS2_ZLIB=y | ||
| 1200 | # CONFIG_JFFS2_LZO is not set | ||
| 1201 | CONFIG_JFFS2_RTIME=y | ||
| 1202 | # CONFIG_JFFS2_RUBIN is not set | ||
| 1203 | # CONFIG_CRAMFS is not set | ||
| 1204 | # CONFIG_VXFS_FS is not set | ||
| 1205 | # CONFIG_MINIX_FS is not set | ||
| 1206 | # CONFIG_OMFS_FS is not set | ||
| 1207 | # CONFIG_HPFS_FS is not set | ||
| 1208 | # CONFIG_QNX4FS_FS is not set | ||
| 1209 | # CONFIG_ROMFS_FS is not set | ||
| 1210 | # CONFIG_SYSV_FS is not set | ||
| 1211 | # CONFIG_UFS_FS is not set | ||
| 1212 | CONFIG_NETWORK_FILESYSTEMS=y | ||
| 1213 | CONFIG_NFS_FS=y | ||
| 1214 | CONFIG_NFS_V3=y | ||
| 1215 | CONFIG_NFS_V3_ACL=y | ||
| 1216 | CONFIG_NFS_V4=y | ||
| 1217 | CONFIG_ROOT_NFS=y | ||
| 1218 | # CONFIG_NFSD is not set | ||
| 1219 | CONFIG_LOCKD=y | ||
| 1220 | CONFIG_LOCKD_V4=y | ||
| 1221 | CONFIG_NFS_ACL_SUPPORT=y | ||
| 1222 | CONFIG_NFS_COMMON=y | ||
| 1223 | CONFIG_SUNRPC=y | ||
| 1224 | CONFIG_SUNRPC_GSS=y | ||
| 1225 | CONFIG_RPCSEC_GSS_KRB5=y | ||
| 1226 | # CONFIG_RPCSEC_GSS_SPKM3 is not set | ||
| 1227 | CONFIG_SMB_FS=m | ||
| 1228 | # CONFIG_SMB_NLS_DEFAULT is not set | ||
| 1229 | CONFIG_CIFS=m | ||
| 1230 | # CONFIG_CIFS_STATS is not set | ||
| 1231 | CONFIG_CIFS_WEAK_PW_HASH=y | ||
| 1232 | # CONFIG_CIFS_XATTR is not set | ||
| 1233 | # CONFIG_CIFS_DEBUG2 is not set | ||
| 1234 | # CONFIG_CIFS_EXPERIMENTAL is not set | ||
| 1235 | # CONFIG_NCP_FS is not set | ||
| 1236 | # CONFIG_CODA_FS is not set | ||
| 1237 | # CONFIG_AFS_FS is not set | ||
| 1238 | |||
| 1239 | # | ||
| 1240 | # Partition Types | ||
| 1241 | # | ||
| 1242 | CONFIG_PARTITION_ADVANCED=y | ||
| 1243 | # CONFIG_ACORN_PARTITION is not set | ||
| 1244 | # CONFIG_OSF_PARTITION is not set | ||
| 1245 | # CONFIG_AMIGA_PARTITION is not set | ||
| 1246 | # CONFIG_ATARI_PARTITION is not set | ||
| 1247 | # CONFIG_MAC_PARTITION is not set | ||
| 1248 | CONFIG_MSDOS_PARTITION=y | ||
| 1249 | # CONFIG_BSD_DISKLABEL is not set | ||
| 1250 | # CONFIG_MINIX_SUBPARTITION is not set | ||
| 1251 | # CONFIG_SOLARIS_X86_PARTITION is not set | ||
| 1252 | # CONFIG_UNIXWARE_DISKLABEL is not set | ||
| 1253 | # CONFIG_LDM_PARTITION is not set | ||
| 1254 | # CONFIG_SGI_PARTITION is not set | ||
| 1255 | # CONFIG_ULTRIX_PARTITION is not set | ||
| 1256 | # CONFIG_SUN_PARTITION is not set | ||
| 1257 | # CONFIG_KARMA_PARTITION is not set | ||
| 1258 | # CONFIG_EFI_PARTITION is not set | ||
| 1259 | # CONFIG_SYSV68_PARTITION is not set | ||
| 1260 | CONFIG_NLS=m | ||
| 1261 | CONFIG_NLS_DEFAULT="iso8859-1" | ||
| 1262 | CONFIG_NLS_CODEPAGE_437=m | ||
| 1263 | # CONFIG_NLS_CODEPAGE_737 is not set | ||
| 1264 | # CONFIG_NLS_CODEPAGE_775 is not set | ||
| 1265 | # CONFIG_NLS_CODEPAGE_850 is not set | ||
| 1266 | # CONFIG_NLS_CODEPAGE_852 is not set | ||
| 1267 | # CONFIG_NLS_CODEPAGE_855 is not set | ||
| 1268 | # CONFIG_NLS_CODEPAGE_857 is not set | ||
| 1269 | # CONFIG_NLS_CODEPAGE_860 is not set | ||
| 1270 | # CONFIG_NLS_CODEPAGE_861 is not set | ||
| 1271 | # CONFIG_NLS_CODEPAGE_862 is not set | ||
| 1272 | # CONFIG_NLS_CODEPAGE_863 is not set | ||
| 1273 | # CONFIG_NLS_CODEPAGE_864 is not set | ||
| 1274 | # CONFIG_NLS_CODEPAGE_865 is not set | ||
| 1275 | # CONFIG_NLS_CODEPAGE_866 is not set | ||
| 1276 | # CONFIG_NLS_CODEPAGE_869 is not set | ||
| 1277 | # CONFIG_NLS_CODEPAGE_936 is not set | ||
| 1278 | # CONFIG_NLS_CODEPAGE_950 is not set | ||
| 1279 | # CONFIG_NLS_CODEPAGE_932 is not set | ||
| 1280 | # CONFIG_NLS_CODEPAGE_949 is not set | ||
| 1281 | # CONFIG_NLS_CODEPAGE_874 is not set | ||
| 1282 | # CONFIG_NLS_ISO8859_8 is not set | ||
| 1283 | # CONFIG_NLS_CODEPAGE_1250 is not set | ||
| 1284 | # CONFIG_NLS_CODEPAGE_1251 is not set | ||
| 1285 | # CONFIG_NLS_ASCII is not set | ||
| 1286 | CONFIG_NLS_ISO8859_1=m | ||
| 1287 | # CONFIG_NLS_ISO8859_2 is not set | ||
| 1288 | # CONFIG_NLS_ISO8859_3 is not set | ||
| 1289 | # CONFIG_NLS_ISO8859_4 is not set | ||
| 1290 | # CONFIG_NLS_ISO8859_5 is not set | ||
| 1291 | # CONFIG_NLS_ISO8859_6 is not set | ||
| 1292 | # CONFIG_NLS_ISO8859_7 is not set | ||
| 1293 | # CONFIG_NLS_ISO8859_9 is not set | ||
| 1294 | # CONFIG_NLS_ISO8859_13 is not set | ||
| 1295 | # CONFIG_NLS_ISO8859_14 is not set | ||
| 1296 | # CONFIG_NLS_ISO8859_15 is not set | ||
| 1297 | # CONFIG_NLS_KOI8_R is not set | ||
| 1298 | # CONFIG_NLS_KOI8_U is not set | ||
| 1299 | # CONFIG_NLS_UTF8 is not set | ||
| 1300 | # CONFIG_DLM is not set | ||
| 1301 | |||
| 1302 | # | ||
| 1303 | # Kernel hacking | ||
| 1304 | # | ||
| 1305 | # CONFIG_PRINTK_TIME is not set | ||
| 1306 | CONFIG_ENABLE_WARN_DEPRECATED=y | ||
| 1307 | CONFIG_ENABLE_MUST_CHECK=y | ||
| 1308 | CONFIG_FRAME_WARN=1024 | ||
| 1309 | # CONFIG_MAGIC_SYSRQ is not set | ||
| 1310 | # CONFIG_UNUSED_SYMBOLS is not set | ||
| 1311 | CONFIG_DEBUG_FS=y | ||
| 1312 | # CONFIG_HEADERS_CHECK is not set | ||
| 1313 | CONFIG_DEBUG_KERNEL=y | ||
| 1314 | # CONFIG_DEBUG_SHIRQ is not set | ||
| 1315 | # CONFIG_DETECT_SOFTLOCKUP is not set | ||
| 1316 | # CONFIG_SCHED_DEBUG is not set | ||
| 1317 | # CONFIG_SCHEDSTATS is not set | ||
| 1318 | # CONFIG_TIMER_STATS is not set | ||
| 1319 | # CONFIG_DEBUG_OBJECTS is not set | ||
| 1320 | # CONFIG_SLUB_DEBUG_ON is not set | ||
| 1321 | # CONFIG_SLUB_STATS is not set | ||
| 1322 | # CONFIG_DEBUG_RT_MUTEXES is not set | ||
| 1323 | # CONFIG_RT_MUTEX_TESTER is not set | ||
| 1324 | # CONFIG_DEBUG_SPINLOCK is not set | ||
| 1325 | # CONFIG_DEBUG_MUTEXES is not set | ||
| 1326 | # CONFIG_DEBUG_LOCK_ALLOC is not set | ||
| 1327 | # CONFIG_PROVE_LOCKING is not set | ||
| 1328 | # CONFIG_LOCK_STAT is not set | ||
| 1329 | # CONFIG_DEBUG_SPINLOCK_SLEEP is not set | ||
| 1330 | # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set | ||
| 1331 | # CONFIG_DEBUG_KOBJECT is not set | ||
| 1332 | CONFIG_DEBUG_BUGVERBOSE=y | ||
| 1333 | # CONFIG_DEBUG_INFO is not set | ||
| 1334 | # CONFIG_DEBUG_VM is not set | ||
| 1335 | # CONFIG_DEBUG_WRITECOUNT is not set | ||
| 1336 | CONFIG_DEBUG_MEMORY_INIT=y | ||
| 1337 | # CONFIG_DEBUG_LIST is not set | ||
| 1338 | # CONFIG_DEBUG_SG is not set | ||
| 1339 | CONFIG_FRAME_POINTER=y | ||
| 1340 | # CONFIG_BOOT_PRINTK_DELAY is not set | ||
| 1341 | # CONFIG_RCU_TORTURE_TEST is not set | ||
| 1342 | # CONFIG_BACKTRACE_SELF_TEST is not set | ||
| 1343 | # CONFIG_FAULT_INJECTION is not set | ||
| 1344 | # CONFIG_LATENCYTOP is not set | ||
| 1345 | CONFIG_SYSCTL_SYSCALL_CHECK=y | ||
| 1346 | CONFIG_HAVE_FTRACE=y | ||
| 1347 | CONFIG_HAVE_DYNAMIC_FTRACE=y | ||
| 1348 | # CONFIG_FTRACE is not set | ||
| 1349 | # CONFIG_IRQSOFF_TRACER is not set | ||
| 1350 | # CONFIG_SCHED_TRACER is not set | ||
| 1351 | # CONFIG_CONTEXT_SWITCH_TRACER is not set | ||
| 1352 | # CONFIG_SAMPLES is not set | ||
| 1353 | CONFIG_HAVE_ARCH_KGDB=y | ||
| 1354 | # CONFIG_KGDB is not set | ||
| 1355 | CONFIG_DEBUG_USER=y | ||
| 1356 | # CONFIG_DEBUG_ERRORS is not set | ||
| 1357 | # CONFIG_DEBUG_STACK_USAGE is not set | ||
| 1358 | CONFIG_DEBUG_LL=y | ||
| 1359 | # CONFIG_DEBUG_ICEDCC is not set | ||
| 1360 | |||
| 1361 | # | ||
| 1362 | # Security options | ||
| 1363 | # | ||
| 1364 | # CONFIG_KEYS is not set | ||
| 1365 | # CONFIG_SECURITY is not set | ||
| 1366 | # CONFIG_SECURITY_FILE_CAPABILITIES is not set | ||
| 1367 | CONFIG_CRYPTO=y | ||
| 1368 | |||
| 1369 | # | ||
| 1370 | # Crypto core or helper | ||
| 1371 | # | ||
| 1372 | CONFIG_CRYPTO_ALGAPI=y | ||
| 1373 | CONFIG_CRYPTO_BLKCIPHER=y | ||
| 1374 | CONFIG_CRYPTO_MANAGER=y | ||
| 1375 | # CONFIG_CRYPTO_GF128MUL is not set | ||
| 1376 | # CONFIG_CRYPTO_NULL is not set | ||
| 1377 | # CONFIG_CRYPTO_CRYPTD is not set | ||
| 1378 | # CONFIG_CRYPTO_AUTHENC is not set | ||
| 1379 | # CONFIG_CRYPTO_TEST is not set | ||
| 1380 | |||
| 1381 | # | ||
| 1382 | # Authenticated Encryption with Associated Data | ||
| 1383 | # | ||
| 1384 | # CONFIG_CRYPTO_CCM is not set | ||
| 1385 | # CONFIG_CRYPTO_GCM is not set | ||
| 1386 | # CONFIG_CRYPTO_SEQIV is not set | ||
| 1387 | |||
| 1388 | # | ||
| 1389 | # Block modes | ||
| 1390 | # | ||
| 1391 | CONFIG_CRYPTO_CBC=y | ||
| 1392 | # CONFIG_CRYPTO_CTR is not set | ||
| 1393 | # CONFIG_CRYPTO_CTS is not set | ||
| 1394 | CONFIG_CRYPTO_ECB=m | ||
| 1395 | # CONFIG_CRYPTO_LRW is not set | ||
| 1396 | # CONFIG_CRYPTO_PCBC is not set | ||
| 1397 | # CONFIG_CRYPTO_XTS is not set | ||
| 1398 | |||
| 1399 | # | ||
| 1400 | # Hash modes | ||
| 1401 | # | ||
| 1402 | # CONFIG_CRYPTO_HMAC is not set | ||
| 1403 | # CONFIG_CRYPTO_XCBC is not set | ||
| 1404 | |||
| 1405 | # | ||
| 1406 | # Digest | ||
| 1407 | # | ||
| 1408 | # CONFIG_CRYPTO_CRC32C is not set | ||
| 1409 | # CONFIG_CRYPTO_MD4 is not set | ||
| 1410 | CONFIG_CRYPTO_MD5=y | ||
| 1411 | CONFIG_CRYPTO_MICHAEL_MIC=m | ||
| 1412 | # CONFIG_CRYPTO_RMD128 is not set | ||
| 1413 | # CONFIG_CRYPTO_RMD160 is not set | ||
| 1414 | # CONFIG_CRYPTO_RMD256 is not set | ||
| 1415 | # CONFIG_CRYPTO_RMD320 is not set | ||
| 1416 | # CONFIG_CRYPTO_SHA1 is not set | ||
| 1417 | # CONFIG_CRYPTO_SHA256 is not set | ||
| 1418 | # CONFIG_CRYPTO_SHA512 is not set | ||
| 1419 | # CONFIG_CRYPTO_TGR192 is not set | ||
| 1420 | # CONFIG_CRYPTO_WP512 is not set | ||
| 1421 | |||
| 1422 | # | ||
| 1423 | # Ciphers | ||
| 1424 | # | ||
| 1425 | CONFIG_CRYPTO_AES=m | ||
| 1426 | # CONFIG_CRYPTO_ANUBIS is not set | ||
| 1427 | CONFIG_CRYPTO_ARC4=m | ||
| 1428 | # CONFIG_CRYPTO_BLOWFISH is not set | ||
| 1429 | # CONFIG_CRYPTO_CAMELLIA is not set | ||
| 1430 | # CONFIG_CRYPTO_CAST5 is not set | ||
| 1431 | # CONFIG_CRYPTO_CAST6 is not set | ||
| 1432 | CONFIG_CRYPTO_DES=y | ||
| 1433 | # CONFIG_CRYPTO_FCRYPT is not set | ||
| 1434 | # CONFIG_CRYPTO_KHAZAD is not set | ||
| 1435 | # CONFIG_CRYPTO_SALSA20 is not set | ||
| 1436 | # CONFIG_CRYPTO_SEED is not set | ||
| 1437 | # CONFIG_CRYPTO_SERPENT is not set | ||
| 1438 | # CONFIG_CRYPTO_TEA is not set | ||
| 1439 | # CONFIG_CRYPTO_TWOFISH is not set | ||
| 1440 | |||
| 1441 | # | ||
| 1442 | # Compression | ||
| 1443 | # | ||
| 1444 | # CONFIG_CRYPTO_DEFLATE is not set | ||
| 1445 | # CONFIG_CRYPTO_LZO is not set | ||
| 1446 | # CONFIG_CRYPTO_HW is not set | ||
| 1447 | |||
| 1448 | # | ||
| 1449 | # Library routines | ||
| 1450 | # | ||
| 1451 | CONFIG_BITREVERSE=y | ||
| 1452 | # CONFIG_GENERIC_FIND_FIRST_BIT is not set | ||
| 1453 | # CONFIG_GENERIC_FIND_NEXT_BIT is not set | ||
| 1454 | # CONFIG_CRC_CCITT is not set | ||
| 1455 | # CONFIG_CRC16 is not set | ||
| 1456 | CONFIG_CRC_T10DIF=y | ||
| 1457 | # CONFIG_CRC_ITU_T is not set | ||
| 1458 | CONFIG_CRC32=y | ||
| 1459 | # CONFIG_CRC7 is not set | ||
| 1460 | # CONFIG_LIBCRC32C is not set | ||
| 1461 | CONFIG_ZLIB_INFLATE=y | ||
| 1462 | CONFIG_ZLIB_DEFLATE=y | ||
| 1463 | CONFIG_PLIST=y | ||
| 1464 | CONFIG_HAS_IOMEM=y | ||
| 1465 | CONFIG_HAS_IOPORT=y | ||
| 1466 | CONFIG_HAS_DMA=y | ||
diff --git a/arch/arm/configs/palmz72_defconfig b/arch/arm/configs/palmz72_defconfig new file mode 100644 index 000000000000..3245f8f33e0a --- /dev/null +++ b/arch/arm/configs/palmz72_defconfig | |||
| @@ -0,0 +1,951 @@ | |||
| 1 | # | ||
| 2 | # Automatically generated make config: don't edit | ||
| 3 | # Linux kernel version: 2.6.27-rc4 | ||
| 4 | # Sun Aug 24 02:29:27 2008 | ||
| 5 | # | ||
| 6 | CONFIG_ARM=y | ||
| 7 | CONFIG_HAVE_PWM=y | ||
| 8 | CONFIG_SYS_SUPPORTS_APM_EMULATION=y | ||
| 9 | CONFIG_GENERIC_GPIO=y | ||
| 10 | CONFIG_GENERIC_TIME=y | ||
| 11 | CONFIG_GENERIC_CLOCKEVENTS=y | ||
| 12 | CONFIG_MMU=y | ||
| 13 | # CONFIG_NO_IOPORT is not set | ||
| 14 | CONFIG_GENERIC_HARDIRQS=y | ||
| 15 | CONFIG_STACKTRACE_SUPPORT=y | ||
| 16 | CONFIG_HAVE_LATENCYTOP_SUPPORT=y | ||
| 17 | CONFIG_LOCKDEP_SUPPORT=y | ||
| 18 | CONFIG_TRACE_IRQFLAGS_SUPPORT=y | ||
| 19 | CONFIG_HARDIRQS_SW_RESEND=y | ||
| 20 | CONFIG_GENERIC_IRQ_PROBE=y | ||
| 21 | CONFIG_RWSEM_GENERIC_SPINLOCK=y | ||
| 22 | # CONFIG_ARCH_HAS_ILOG2_U32 is not set | ||
| 23 | # CONFIG_ARCH_HAS_ILOG2_U64 is not set | ||
| 24 | CONFIG_GENERIC_HWEIGHT=y | ||
| 25 | CONFIG_GENERIC_CALIBRATE_DELAY=y | ||
| 26 | CONFIG_ARCH_SUPPORTS_AOUT=y | ||
| 27 | CONFIG_ZONE_DMA=y | ||
| 28 | CONFIG_ARCH_MTD_XIP=y | ||
| 29 | CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y | ||
| 30 | CONFIG_VECTORS_BASE=0xffff0000 | ||
| 31 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | ||
| 32 | |||
| 33 | # | ||
| 34 | # General setup | ||
| 35 | # | ||
| 36 | CONFIG_EXPERIMENTAL=y | ||
| 37 | CONFIG_BROKEN_ON_SMP=y | ||
| 38 | CONFIG_LOCK_KERNEL=y | ||
| 39 | CONFIG_INIT_ENV_ARG_LIMIT=32 | ||
| 40 | CONFIG_LOCALVERSION="" | ||
| 41 | # CONFIG_LOCALVERSION_AUTO is not set | ||
| 42 | CONFIG_SWAP=y | ||
| 43 | CONFIG_SYSVIPC=y | ||
| 44 | CONFIG_SYSVIPC_SYSCTL=y | ||
| 45 | # CONFIG_POSIX_MQUEUE is not set | ||
| 46 | # CONFIG_BSD_PROCESS_ACCT is not set | ||
| 47 | # CONFIG_TASKSTATS is not set | ||
| 48 | # CONFIG_AUDIT is not set | ||
| 49 | # CONFIG_IKCONFIG is not set | ||
| 50 | CONFIG_LOG_BUF_SHIFT=14 | ||
| 51 | # CONFIG_CGROUPS is not set | ||
| 52 | # CONFIG_GROUP_SCHED is not set | ||
| 53 | CONFIG_SYSFS_DEPRECATED=y | ||
| 54 | CONFIG_SYSFS_DEPRECATED_V2=y | ||
| 55 | # CONFIG_RELAY is not set | ||
| 56 | CONFIG_NAMESPACES=y | ||
| 57 | # CONFIG_UTS_NS is not set | ||
| 58 | # CONFIG_IPC_NS is not set | ||
| 59 | # CONFIG_USER_NS is not set | ||
| 60 | # CONFIG_PID_NS is not set | ||
| 61 | CONFIG_BLK_DEV_INITRD=y | ||
| 62 | CONFIG_INITRAMFS_SOURCE="" | ||
| 63 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y | ||
| 64 | CONFIG_SYSCTL=y | ||
| 65 | # CONFIG_EMBEDDED is not set | ||
| 66 | CONFIG_UID16=y | ||
| 67 | CONFIG_SYSCTL_SYSCALL=y | ||
| 68 | CONFIG_KALLSYMS=y | ||
| 69 | # CONFIG_KALLSYMS_EXTRA_PASS is not set | ||
| 70 | CONFIG_HOTPLUG=y | ||
| 71 | CONFIG_PRINTK=y | ||
| 72 | CONFIG_BUG=y | ||
| 73 | CONFIG_ELF_CORE=y | ||
| 74 | CONFIG_COMPAT_BRK=y | ||
| 75 | CONFIG_BASE_FULL=y | ||
| 76 | CONFIG_FUTEX=y | ||
| 77 | CONFIG_ANON_INODES=y | ||
| 78 | CONFIG_EPOLL=y | ||
| 79 | CONFIG_SIGNALFD=y | ||
| 80 | CONFIG_TIMERFD=y | ||
| 81 | CONFIG_EVENTFD=y | ||
| 82 | CONFIG_SHMEM=y | ||
| 83 | CONFIG_VM_EVENT_COUNTERS=y | ||
| 84 | CONFIG_SLAB=y | ||
| 85 | # CONFIG_SLUB is not set | ||
| 86 | # CONFIG_SLOB is not set | ||
| 87 | # CONFIG_PROFILING is not set | ||
| 88 | # CONFIG_MARKERS is not set | ||
| 89 | CONFIG_HAVE_OPROFILE=y | ||
| 90 | # CONFIG_KPROBES is not set | ||
| 91 | # CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS is not set | ||
| 92 | # CONFIG_HAVE_IOREMAP_PROT is not set | ||
| 93 | CONFIG_HAVE_KPROBES=y | ||
| 94 | CONFIG_HAVE_KRETPROBES=y | ||
| 95 | # CONFIG_HAVE_ARCH_TRACEHOOK is not set | ||
| 96 | # CONFIG_HAVE_DMA_ATTRS is not set | ||
| 97 | # CONFIG_USE_GENERIC_SMP_HELPERS is not set | ||
| 98 | CONFIG_HAVE_CLK=y | ||
| 99 | CONFIG_PROC_PAGE_MONITOR=y | ||
| 100 | CONFIG_HAVE_GENERIC_DMA_COHERENT=y | ||
| 101 | CONFIG_SLABINFO=y | ||
| 102 | CONFIG_RT_MUTEXES=y | ||
| 103 | # CONFIG_TINY_SHMEM is not set | ||
| 104 | CONFIG_BASE_SMALL=0 | ||
| 105 | CONFIG_MODULES=y | ||
| 106 | # CONFIG_MODULE_FORCE_LOAD is not set | ||
| 107 | CONFIG_MODULE_UNLOAD=y | ||
| 108 | # CONFIG_MODULE_FORCE_UNLOAD is not set | ||
| 109 | # CONFIG_MODVERSIONS is not set | ||
| 110 | # CONFIG_MODULE_SRCVERSION_ALL is not set | ||
| 111 | CONFIG_KMOD=y | ||
| 112 | CONFIG_BLOCK=y | ||
| 113 | # CONFIG_LBD is not set | ||
| 114 | # CONFIG_BLK_DEV_IO_TRACE is not set | ||
| 115 | # CONFIG_LSF is not set | ||
| 116 | # CONFIG_BLK_DEV_BSG is not set | ||
| 117 | # CONFIG_BLK_DEV_INTEGRITY is not set | ||
| 118 | |||
| 119 | # | ||
| 120 | # IO Schedulers | ||
| 121 | # | ||
| 122 | CONFIG_IOSCHED_NOOP=y | ||
| 123 | CONFIG_IOSCHED_AS=y | ||
| 124 | # CONFIG_IOSCHED_DEADLINE is not set | ||
| 125 | # CONFIG_IOSCHED_CFQ is not set | ||
| 126 | CONFIG_DEFAULT_AS=y | ||
| 127 | # CONFIG_DEFAULT_DEADLINE is not set | ||
| 128 | # CONFIG_DEFAULT_CFQ is not set | ||
| 129 | # CONFIG_DEFAULT_NOOP is not set | ||
| 130 | CONFIG_DEFAULT_IOSCHED="anticipatory" | ||
| 131 | CONFIG_CLASSIC_RCU=y | ||
| 132 | |||
| 133 | # | ||
| 134 | # System Type | ||
| 135 | # | ||
| 136 | # CONFIG_ARCH_AAEC2000 is not set | ||
| 137 | # CONFIG_ARCH_INTEGRATOR is not set | ||
| 138 | # CONFIG_ARCH_REALVIEW is not set | ||
| 139 | # CONFIG_ARCH_VERSATILE is not set | ||
| 140 | # CONFIG_ARCH_AT91 is not set | ||
| 141 | # CONFIG_ARCH_CLPS7500 is not set | ||
| 142 | # CONFIG_ARCH_CLPS711X is not set | ||
| 143 | # CONFIG_ARCH_EBSA110 is not set | ||
| 144 | # CONFIG_ARCH_EP93XX is not set | ||
| 145 | # CONFIG_ARCH_FOOTBRIDGE is not set | ||
| 146 | # CONFIG_ARCH_NETX is not set | ||
| 147 | # CONFIG_ARCH_H720X is not set | ||
| 148 | # CONFIG_ARCH_IMX is not set | ||
| 149 | # CONFIG_ARCH_IOP13XX is not set | ||
| 150 | # CONFIG_ARCH_IOP32X is not set | ||
| 151 | # CONFIG_ARCH_IOP33X is not set | ||
| 152 | # CONFIG_ARCH_IXP23XX is not set | ||
| 153 | # CONFIG_ARCH_IXP2000 is not set | ||
| 154 | # CONFIG_ARCH_IXP4XX is not set | ||
| 155 | # CONFIG_ARCH_L7200 is not set | ||
| 156 | # CONFIG_ARCH_KIRKWOOD is not set | ||
| 157 | # CONFIG_ARCH_KS8695 is not set | ||
| 158 | # CONFIG_ARCH_NS9XXX is not set | ||
| 159 | # CONFIG_ARCH_LOKI is not set | ||
| 160 | # CONFIG_ARCH_MV78XX0 is not set | ||
| 161 | # CONFIG_ARCH_MXC is not set | ||
| 162 | # CONFIG_ARCH_ORION5X is not set | ||
| 163 | # CONFIG_ARCH_PNX4008 is not set | ||
| 164 | CONFIG_ARCH_PXA=y | ||
| 165 | # CONFIG_ARCH_RPC is not set | ||
| 166 | # CONFIG_ARCH_SA1100 is not set | ||
| 167 | # CONFIG_ARCH_S3C2410 is not set | ||
| 168 | # CONFIG_ARCH_SHARK is not set | ||
| 169 | # CONFIG_ARCH_LH7A40X is not set | ||
| 170 | # CONFIG_ARCH_DAVINCI is not set | ||
| 171 | # CONFIG_ARCH_OMAP is not set | ||
| 172 | # CONFIG_ARCH_MSM7X00A is not set | ||
| 173 | |||
| 174 | # | ||
| 175 | # Intel PXA2xx/PXA3xx Implementations | ||
| 176 | # | ||
| 177 | # CONFIG_ARCH_GUMSTIX is not set | ||
| 178 | # CONFIG_ARCH_LUBBOCK is not set | ||
| 179 | # CONFIG_MACH_LOGICPD_PXA270 is not set | ||
| 180 | # CONFIG_MACH_MAINSTONE is not set | ||
| 181 | # CONFIG_ARCH_PXA_IDP is not set | ||
| 182 | # CONFIG_PXA_SHARPSL is not set | ||
| 183 | # CONFIG_ARCH_PXA_ESERIES is not set | ||
| 184 | # CONFIG_MACH_TRIZEPS4 is not set | ||
| 185 | # CONFIG_MACH_EM_X270 is not set | ||
| 186 | # CONFIG_MACH_COLIBRI is not set | ||
| 187 | # CONFIG_MACH_ZYLONITE is not set | ||
| 188 | # CONFIG_MACH_LITTLETON is not set | ||
| 189 | # CONFIG_MACH_TAVOREVB is not set | ||
| 190 | # CONFIG_MACH_SAAR is not set | ||
| 191 | # CONFIG_MACH_ARMCORE is not set | ||
| 192 | # CONFIG_MACH_MAGICIAN is not set | ||
| 193 | # CONFIG_MACH_PCM027 is not set | ||
| 194 | CONFIG_ARCH_PXA_PALM=y | ||
| 195 | # CONFIG_MACH_PALMTX is not set | ||
| 196 | CONFIG_MACH_PALMZ72=y | ||
| 197 | # CONFIG_PXA_EZX is not set | ||
| 198 | CONFIG_PXA27x=y | ||
| 199 | CONFIG_PXA_PWM=y | ||
| 200 | |||
| 201 | # | ||
| 202 | # Boot options | ||
| 203 | # | ||
| 204 | |||
| 205 | # | ||
| 206 | # Power management | ||
| 207 | # | ||
| 208 | |||
| 209 | # | ||
| 210 | # Processor Type | ||
| 211 | # | ||
| 212 | CONFIG_CPU_32=y | ||
| 213 | CONFIG_CPU_XSCALE=y | ||
| 214 | CONFIG_CPU_32v5=y | ||
| 215 | CONFIG_CPU_ABRT_EV5T=y | ||
| 216 | CONFIG_CPU_PABRT_NOIFAR=y | ||
| 217 | CONFIG_CPU_CACHE_VIVT=y | ||
| 218 | CONFIG_CPU_TLB_V4WBI=y | ||
| 219 | CONFIG_CPU_CP15=y | ||
| 220 | CONFIG_CPU_CP15_MMU=y | ||
| 221 | |||
| 222 | # | ||
| 223 | # Processor Features | ||
| 224 | # | ||
| 225 | CONFIG_ARM_THUMB=y | ||
| 226 | # CONFIG_CPU_DCACHE_DISABLE is not set | ||
| 227 | # CONFIG_OUTER_CACHE is not set | ||
| 228 | CONFIG_IWMMXT=y | ||
| 229 | CONFIG_XSCALE_PMU=y | ||
| 230 | |||
| 231 | # | ||
| 232 | # Bus support | ||
| 233 | # | ||
| 234 | # CONFIG_PCI_SYSCALL is not set | ||
| 235 | # CONFIG_ARCH_SUPPORTS_MSI is not set | ||
| 236 | # CONFIG_PCCARD is not set | ||
| 237 | |||
| 238 | # | ||
| 239 | # Kernel Features | ||
| 240 | # | ||
| 241 | CONFIG_TICK_ONESHOT=y | ||
| 242 | # CONFIG_NO_HZ is not set | ||
| 243 | # CONFIG_HIGH_RES_TIMERS is not set | ||
| 244 | CONFIG_GENERIC_CLOCKEVENTS_BUILD=y | ||
| 245 | CONFIG_PREEMPT=y | ||
| 246 | CONFIG_HZ=100 | ||
| 247 | CONFIG_AEABI=y | ||
| 248 | CONFIG_OABI_COMPAT=y | ||
| 249 | # CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set | ||
| 250 | CONFIG_SELECT_MEMORY_MODEL=y | ||
| 251 | CONFIG_FLATMEM_MANUAL=y | ||
| 252 | # CONFIG_DISCONTIGMEM_MANUAL is not set | ||
| 253 | # CONFIG_SPARSEMEM_MANUAL is not set | ||
| 254 | CONFIG_FLATMEM=y | ||
| 255 | CONFIG_FLAT_NODE_MEM_MAP=y | ||
| 256 | # CONFIG_SPARSEMEM_STATIC is not set | ||
| 257 | # CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set | ||
| 258 | CONFIG_PAGEFLAGS_EXTENDED=y | ||
| 259 | CONFIG_SPLIT_PTLOCK_CPUS=4096 | ||
| 260 | # CONFIG_RESOURCES_64BIT is not set | ||
| 261 | CONFIG_ZONE_DMA_FLAG=1 | ||
| 262 | CONFIG_BOUNCE=y | ||
| 263 | CONFIG_VIRT_TO_BUS=y | ||
| 264 | CONFIG_ALIGNMENT_TRAP=y | ||
| 265 | |||
| 266 | # | ||
| 267 | # Boot options | ||
| 268 | # | ||
| 269 | CONFIG_ZBOOT_ROM_TEXT=0x0 | ||
| 270 | CONFIG_ZBOOT_ROM_BSS=0x0 | ||
| 271 | CONFIG_CMDLINE="mem=32M console=tty root=/dev/mmcblk0" | ||
| 272 | # CONFIG_XIP_KERNEL is not set | ||
| 273 | # CONFIG_KEXEC is not set | ||
| 274 | |||
| 275 | # | ||
| 276 | # CPU Frequency scaling | ||
| 277 | # | ||
| 278 | # CONFIG_CPU_FREQ is not set | ||
| 279 | |||
| 280 | # | ||
| 281 | # Floating point emulation | ||
| 282 | # | ||
| 283 | |||
| 284 | # | ||
| 285 | # At least one emulation must be selected | ||
| 286 | # | ||
| 287 | CONFIG_FPE_NWFPE=y | ||
| 288 | # CONFIG_FPE_NWFPE_XP is not set | ||
| 289 | # CONFIG_FPE_FASTFPE is not set | ||
| 290 | |||
| 291 | # | ||
| 292 | # Userspace binary formats | ||
| 293 | # | ||
| 294 | CONFIG_BINFMT_ELF=y | ||
| 295 | # CONFIG_BINFMT_AOUT is not set | ||
| 296 | # CONFIG_BINFMT_MISC is not set | ||
| 297 | |||
| 298 | # | ||
| 299 | # Power management options | ||
| 300 | # | ||
| 301 | CONFIG_PM=y | ||
| 302 | # CONFIG_PM_DEBUG is not set | ||
| 303 | CONFIG_PM_SLEEP=y | ||
| 304 | CONFIG_SUSPEND=y | ||
| 305 | CONFIG_SUSPEND_FREEZER=y | ||
| 306 | CONFIG_APM_EMULATION=y | ||
| 307 | CONFIG_ARCH_SUSPEND_POSSIBLE=y | ||
| 308 | CONFIG_NET=y | ||
| 309 | |||
| 310 | # | ||
| 311 | # Networking options | ||
| 312 | # | ||
| 313 | CONFIG_PACKET=y | ||
| 314 | # CONFIG_PACKET_MMAP is not set | ||
| 315 | CONFIG_UNIX=y | ||
| 316 | # CONFIG_NET_KEY is not set | ||
| 317 | CONFIG_INET=y | ||
| 318 | # CONFIG_IP_MULTICAST is not set | ||
| 319 | # CONFIG_IP_ADVANCED_ROUTER is not set | ||
| 320 | CONFIG_IP_FIB_HASH=y | ||
| 321 | CONFIG_IP_PNP=y | ||
| 322 | # CONFIG_IP_PNP_DHCP is not set | ||
| 323 | CONFIG_IP_PNP_BOOTP=y | ||
| 324 | # CONFIG_IP_PNP_RARP is not set | ||
| 325 | # CONFIG_NET_IPIP is not set | ||
| 326 | # CONFIG_NET_IPGRE is not set | ||
| 327 | # CONFIG_ARPD is not set | ||
| 328 | # CONFIG_SYN_COOKIES is not set | ||
| 329 | # CONFIG_INET_AH is not set | ||
| 330 | # CONFIG_INET_ESP is not set | ||
| 331 | # CONFIG_INET_IPCOMP is not set | ||
| 332 | # CONFIG_INET_XFRM_TUNNEL is not set | ||
| 333 | # CONFIG_INET_TUNNEL is not set | ||
| 334 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set | ||
| 335 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set | ||
| 336 | # CONFIG_INET_XFRM_MODE_BEET is not set | ||
| 337 | # CONFIG_INET_LRO is not set | ||
| 338 | CONFIG_INET_DIAG=y | ||
| 339 | CONFIG_INET_TCP_DIAG=y | ||
| 340 | # CONFIG_TCP_CONG_ADVANCED is not set | ||
| 341 | CONFIG_TCP_CONG_CUBIC=y | ||
| 342 | CONFIG_DEFAULT_TCP_CONG="cubic" | ||
| 343 | # CONFIG_TCP_MD5SIG is not set | ||
| 344 | # CONFIG_IPV6 is not set | ||
| 345 | # CONFIG_NETWORK_SECMARK is not set | ||
| 346 | # CONFIG_NETFILTER is not set | ||
| 347 | # CONFIG_IP_DCCP is not set | ||
| 348 | # CONFIG_IP_SCTP is not set | ||
| 349 | # CONFIG_TIPC is not set | ||
| 350 | # CONFIG_ATM is not set | ||
| 351 | # CONFIG_BRIDGE is not set | ||
| 352 | # CONFIG_VLAN_8021Q is not set | ||
| 353 | # CONFIG_DECNET is not set | ||
| 354 | # CONFIG_LLC2 is not set | ||
| 355 | # CONFIG_IPX is not set | ||
| 356 | # CONFIG_ATALK is not set | ||
| 357 | # CONFIG_X25 is not set | ||
| 358 | # CONFIG_LAPB is not set | ||
| 359 | # CONFIG_ECONET is not set | ||
| 360 | # CONFIG_WAN_ROUTER is not set | ||
| 361 | # CONFIG_NET_SCHED is not set | ||
| 362 | |||
| 363 | # | ||
| 364 | # Network testing | ||
| 365 | # | ||
| 366 | # CONFIG_NET_PKTGEN is not set | ||
| 367 | # CONFIG_HAMRADIO is not set | ||
| 368 | # CONFIG_CAN is not set | ||
| 369 | # CONFIG_IRDA is not set | ||
| 370 | # CONFIG_BT is not set | ||
| 371 | # CONFIG_AF_RXRPC is not set | ||
| 372 | |||
| 373 | # | ||
| 374 | # Wireless | ||
| 375 | # | ||
| 376 | # CONFIG_CFG80211 is not set | ||
| 377 | # CONFIG_WIRELESS_EXT is not set | ||
| 378 | # CONFIG_MAC80211 is not set | ||
| 379 | # CONFIG_IEEE80211 is not set | ||
| 380 | # CONFIG_RFKILL is not set | ||
| 381 | # CONFIG_NET_9P is not set | ||
| 382 | |||
| 383 | # | ||
| 384 | # Device Drivers | ||
| 385 | # | ||
| 386 | |||
| 387 | # | ||
| 388 | # Generic Driver Options | ||
| 389 | # | ||
| 390 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | ||
| 391 | CONFIG_STANDALONE=y | ||
| 392 | CONFIG_PREVENT_FIRMWARE_BUILD=y | ||
| 393 | CONFIG_FW_LOADER=y | ||
| 394 | CONFIG_FIRMWARE_IN_KERNEL=y | ||
| 395 | CONFIG_EXTRA_FIRMWARE="" | ||
| 396 | # CONFIG_SYS_HYPERVISOR is not set | ||
| 397 | # CONFIG_CONNECTOR is not set | ||
| 398 | # CONFIG_MTD is not set | ||
| 399 | # CONFIG_PARPORT is not set | ||
| 400 | CONFIG_BLK_DEV=y | ||
| 401 | # CONFIG_BLK_DEV_COW_COMMON is not set | ||
| 402 | CONFIG_BLK_DEV_LOOP=y | ||
| 403 | # CONFIG_BLK_DEV_CRYPTOLOOP is not set | ||
| 404 | # CONFIG_BLK_DEV_NBD is not set | ||
| 405 | # CONFIG_BLK_DEV_RAM is not set | ||
| 406 | # CONFIG_CDROM_PKTCDVD is not set | ||
| 407 | # CONFIG_ATA_OVER_ETH is not set | ||
| 408 | # CONFIG_MISC_DEVICES is not set | ||
| 409 | CONFIG_HAVE_IDE=y | ||
| 410 | # CONFIG_IDE is not set | ||
| 411 | |||
| 412 | # | ||
| 413 | # SCSI device support | ||
| 414 | # | ||
| 415 | # CONFIG_RAID_ATTRS is not set | ||
| 416 | # CONFIG_SCSI is not set | ||
| 417 | # CONFIG_SCSI_DMA is not set | ||
| 418 | # CONFIG_SCSI_NETLINK is not set | ||
| 419 | # CONFIG_ATA is not set | ||
| 420 | # CONFIG_MD is not set | ||
| 421 | # CONFIG_NETDEVICES is not set | ||
| 422 | # CONFIG_ISDN is not set | ||
| 423 | |||
| 424 | # | ||
| 425 | # Input device support | ||
| 426 | # | ||
| 427 | CONFIG_INPUT=y | ||
| 428 | # CONFIG_INPUT_FF_MEMLESS is not set | ||
| 429 | # CONFIG_INPUT_POLLDEV is not set | ||
| 430 | |||
| 431 | # | ||
| 432 | # Userland interfaces | ||
| 433 | # | ||
| 434 | CONFIG_INPUT_MOUSEDEV=y | ||
| 435 | # CONFIG_INPUT_MOUSEDEV_PSAUX is not set | ||
| 436 | CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 | ||
| 437 | CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 | ||
| 438 | # CONFIG_INPUT_JOYDEV is not set | ||
| 439 | CONFIG_INPUT_EVDEV=y | ||
| 440 | # CONFIG_INPUT_EVBUG is not set | ||
| 441 | |||
| 442 | # | ||
| 443 | # Input Device Drivers | ||
| 444 | # | ||
| 445 | CONFIG_INPUT_KEYBOARD=y | ||
| 446 | # CONFIG_KEYBOARD_ATKBD is not set | ||
| 447 | # CONFIG_KEYBOARD_SUNKBD is not set | ||
| 448 | # CONFIG_KEYBOARD_LKKBD is not set | ||
| 449 | # CONFIG_KEYBOARD_XTKBD is not set | ||
| 450 | # CONFIG_KEYBOARD_NEWTON is not set | ||
| 451 | # CONFIG_KEYBOARD_STOWAWAY is not set | ||
| 452 | CONFIG_KEYBOARD_PXA27x=y | ||
| 453 | # CONFIG_KEYBOARD_GPIO is not set | ||
| 454 | # CONFIG_KEYBOARD_MATRIX is not set | ||
| 455 | # CONFIG_INPUT_MOUSE is not set | ||
| 456 | # CONFIG_INPUT_JOYSTICK is not set | ||
| 457 | # CONFIG_INPUT_TABLET is not set | ||
| 458 | # CONFIG_INPUT_TOUCHSCREEN is not set | ||
| 459 | # CONFIG_INPUT_MISC is not set | ||
| 460 | |||
| 461 | # | ||
| 462 | # Hardware I/O ports | ||
| 463 | # | ||
| 464 | # CONFIG_SERIO is not set | ||
| 465 | # CONFIG_GAMEPORT is not set | ||
| 466 | |||
| 467 | # | ||
| 468 | # Character devices | ||
| 469 | # | ||
| 470 | CONFIG_VT=y | ||
| 471 | CONFIG_CONSOLE_TRANSLATIONS=y | ||
| 472 | CONFIG_VT_CONSOLE=y | ||
| 473 | CONFIG_HW_CONSOLE=y | ||
| 474 | # CONFIG_VT_HW_CONSOLE_BINDING is not set | ||
| 475 | CONFIG_DEVKMEM=y | ||
| 476 | # CONFIG_SERIAL_NONSTANDARD is not set | ||
| 477 | |||
| 478 | # | ||
| 479 | # Serial drivers | ||
| 480 | # | ||
| 481 | # CONFIG_SERIAL_8250 is not set | ||
| 482 | |||
| 483 | # | ||
| 484 | # Non-8250 serial port support | ||
| 485 | # | ||
| 486 | # CONFIG_SERIAL_PXA is not set | ||
| 487 | CONFIG_UNIX98_PTYS=y | ||
| 488 | CONFIG_LEGACY_PTYS=y | ||
| 489 | CONFIG_LEGACY_PTY_COUNT=256 | ||
| 490 | # CONFIG_IPMI_HANDLER is not set | ||
| 491 | # CONFIG_HW_RANDOM is not set | ||
| 492 | # CONFIG_NVRAM is not set | ||
| 493 | # CONFIG_R3964 is not set | ||
| 494 | # CONFIG_RAW_DRIVER is not set | ||
| 495 | # CONFIG_TCG_TPM is not set | ||
| 496 | CONFIG_I2C=y | ||
| 497 | CONFIG_I2C_BOARDINFO=y | ||
| 498 | # CONFIG_I2C_CHARDEV is not set | ||
| 499 | CONFIG_I2C_HELPER_AUTO=y | ||
| 500 | |||
| 501 | # | ||
| 502 | # I2C Hardware Bus support | ||
| 503 | # | ||
| 504 | |||
| 505 | # | ||
| 506 | # I2C system bus drivers (mostly embedded / system-on-chip) | ||
| 507 | # | ||
| 508 | # CONFIG_I2C_GPIO is not set | ||
| 509 | # CONFIG_I2C_OCORES is not set | ||
| 510 | CONFIG_I2C_PXA=y | ||
| 511 | # CONFIG_I2C_PXA_SLAVE is not set | ||
| 512 | # CONFIG_I2C_SIMTEC is not set | ||
| 513 | |||
| 514 | # | ||
| 515 | # External I2C/SMBus adapter drivers | ||
| 516 | # | ||
| 517 | # CONFIG_I2C_PARPORT_LIGHT is not set | ||
| 518 | # CONFIG_I2C_TAOS_EVM is not set | ||
| 519 | |||
| 520 | # | ||
| 521 | # Other I2C/SMBus bus drivers | ||
| 522 | # | ||
| 523 | # CONFIG_I2C_PCA_PLATFORM is not set | ||
| 524 | # CONFIG_I2C_STUB is not set | ||
| 525 | |||
| 526 | # | ||
| 527 | # Miscellaneous I2C Chip support | ||
| 528 | # | ||
| 529 | # CONFIG_DS1682 is not set | ||
| 530 | # CONFIG_AT24 is not set | ||
| 531 | # CONFIG_SENSORS_EEPROM is not set | ||
| 532 | # CONFIG_SENSORS_PCF8574 is not set | ||
| 533 | # CONFIG_PCF8575 is not set | ||
| 534 | # CONFIG_SENSORS_PCA9539 is not set | ||
| 535 | # CONFIG_SENSORS_PCF8591 is not set | ||
| 536 | # CONFIG_TPS65010 is not set | ||
| 537 | # CONFIG_SENSORS_MAX6875 is not set | ||
| 538 | # CONFIG_SENSORS_TSL2550 is not set | ||
| 539 | # CONFIG_I2C_DEBUG_CORE is not set | ||
| 540 | # CONFIG_I2C_DEBUG_ALGO is not set | ||
| 541 | # CONFIG_I2C_DEBUG_BUS is not set | ||
| 542 | # CONFIG_I2C_DEBUG_CHIP is not set | ||
| 543 | CONFIG_SPI=y | ||
| 544 | CONFIG_SPI_MASTER=y | ||
| 545 | |||
| 546 | # | ||
| 547 | # SPI Master Controller Drivers | ||
| 548 | # | ||
| 549 | # CONFIG_SPI_BITBANG is not set | ||
| 550 | # CONFIG_SPI_PXA2XX is not set | ||
| 551 | |||
| 552 | # | ||
| 553 | # SPI Protocol Masters | ||
| 554 | # | ||
| 555 | # CONFIG_SPI_AT25 is not set | ||
| 556 | CONFIG_SPI_SPIDEV=y | ||
| 557 | # CONFIG_SPI_TLE62X0 is not set | ||
| 558 | CONFIG_ARCH_REQUIRE_GPIOLIB=y | ||
| 559 | CONFIG_GPIOLIB=y | ||
| 560 | CONFIG_GPIO_SYSFS=y | ||
| 561 | |||
| 562 | # | ||
| 563 | # I2C GPIO expanders: | ||
| 564 | # | ||
| 565 | # CONFIG_GPIO_MAX732X is not set | ||
| 566 | # CONFIG_GPIO_PCA953X is not set | ||
| 567 | # CONFIG_GPIO_PCF857X is not set | ||
| 568 | |||
| 569 | # | ||
| 570 | # PCI GPIO expanders: | ||
| 571 | # | ||
| 572 | |||
| 573 | # | ||
| 574 | # SPI GPIO expanders: | ||
| 575 | # | ||
| 576 | # CONFIG_GPIO_MAX7301 is not set | ||
| 577 | # CONFIG_GPIO_MCP23S08 is not set | ||
| 578 | # CONFIG_W1 is not set | ||
| 579 | CONFIG_POWER_SUPPLY=y | ||
| 580 | # CONFIG_POWER_SUPPLY_DEBUG is not set | ||
| 581 | CONFIG_PDA_POWER=y | ||
| 582 | # CONFIG_APM_POWER is not set | ||
| 583 | # CONFIG_BATTERY_DS2760 is not set | ||
| 584 | # CONFIG_HWMON is not set | ||
| 585 | # CONFIG_WATCHDOG is not set | ||
| 586 | |||
| 587 | # | ||
| 588 | # Sonics Silicon Backplane | ||
| 589 | # | ||
| 590 | CONFIG_SSB_POSSIBLE=y | ||
| 591 | # CONFIG_SSB is not set | ||
| 592 | |||
| 593 | # | ||
| 594 | # Multifunction device drivers | ||
| 595 | # | ||
| 596 | # CONFIG_MFD_CORE is not set | ||
| 597 | # CONFIG_MFD_SM501 is not set | ||
| 598 | # CONFIG_HTC_EGPIO is not set | ||
| 599 | # CONFIG_HTC_PASIC3 is not set | ||
| 600 | # CONFIG_MFD_TMIO is not set | ||
| 601 | # CONFIG_MFD_T7L66XB is not set | ||
| 602 | # CONFIG_MFD_TC6387XB is not set | ||
| 603 | # CONFIG_MFD_TC6393XB is not set | ||
| 604 | |||
| 605 | # | ||
| 606 | # Multimedia devices | ||
| 607 | # | ||
| 608 | |||
| 609 | # | ||
| 610 | # Multimedia core support | ||
| 611 | # | ||
| 612 | # CONFIG_VIDEO_DEV is not set | ||
| 613 | # CONFIG_DVB_CORE is not set | ||
| 614 | # CONFIG_VIDEO_MEDIA is not set | ||
| 615 | |||
| 616 | # | ||
| 617 | # Multimedia drivers | ||
| 618 | # | ||
| 619 | # CONFIG_DAB is not set | ||
| 620 | |||
| 621 | # | ||
| 622 | # Graphics support | ||
| 623 | # | ||
| 624 | # CONFIG_VGASTATE is not set | ||
| 625 | # CONFIG_VIDEO_OUTPUT_CONTROL is not set | ||
| 626 | CONFIG_FB=y | ||
| 627 | # CONFIG_FIRMWARE_EDID is not set | ||
| 628 | # CONFIG_FB_DDC is not set | ||
| 629 | CONFIG_FB_CFB_FILLRECT=y | ||
| 630 | CONFIG_FB_CFB_COPYAREA=y | ||
| 631 | CONFIG_FB_CFB_IMAGEBLIT=y | ||
| 632 | # CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set | ||
| 633 | # CONFIG_FB_SYS_FILLRECT is not set | ||
| 634 | # CONFIG_FB_SYS_COPYAREA is not set | ||
| 635 | # CONFIG_FB_SYS_IMAGEBLIT is not set | ||
| 636 | # CONFIG_FB_FOREIGN_ENDIAN is not set | ||
| 637 | # CONFIG_FB_SYS_FOPS is not set | ||
| 638 | # CONFIG_FB_SVGALIB is not set | ||
| 639 | # CONFIG_FB_MACMODES is not set | ||
| 640 | # CONFIG_FB_BACKLIGHT is not set | ||
| 641 | # CONFIG_FB_MODE_HELPERS is not set | ||
| 642 | # CONFIG_FB_TILEBLITTING is not set | ||
| 643 | |||
| 644 | # | ||
| 645 | # Frame buffer hardware drivers | ||
| 646 | # | ||
| 647 | # CONFIG_FB_S1D13XXX is not set | ||
| 648 | CONFIG_FB_PXA=y | ||
| 649 | # CONFIG_FB_PXA_SMARTPANEL is not set | ||
| 650 | # CONFIG_FB_PXA_PARAMETERS is not set | ||
| 651 | # CONFIG_FB_MBX is not set | ||
| 652 | # CONFIG_FB_W100 is not set | ||
| 653 | # CONFIG_FB_AM200EPD is not set | ||
| 654 | # CONFIG_FB_VIRTUAL is not set | ||
| 655 | CONFIG_BACKLIGHT_LCD_SUPPORT=y | ||
| 656 | # CONFIG_LCD_CLASS_DEVICE is not set | ||
| 657 | CONFIG_BACKLIGHT_CLASS_DEVICE=y | ||
| 658 | # CONFIG_BACKLIGHT_CORGI is not set | ||
| 659 | CONFIG_BACKLIGHT_PWM=y | ||
| 660 | |||
| 661 | # | ||
| 662 | # Display device support | ||
| 663 | # | ||
| 664 | CONFIG_DISPLAY_SUPPORT=y | ||
| 665 | |||
| 666 | # | ||
| 667 | # Display hardware drivers | ||
| 668 | # | ||
| 669 | |||
| 670 | # | ||
| 671 | # Console display driver support | ||
| 672 | # | ||
| 673 | # CONFIG_VGA_CONSOLE is not set | ||
| 674 | CONFIG_DUMMY_CONSOLE=y | ||
| 675 | CONFIG_FRAMEBUFFER_CONSOLE=y | ||
| 676 | # CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set | ||
| 677 | # CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set | ||
| 678 | CONFIG_FONTS=y | ||
| 679 | CONFIG_FONT_8x8=y | ||
| 680 | # CONFIG_FONT_8x16 is not set | ||
| 681 | # CONFIG_FONT_6x11 is not set | ||
| 682 | # CONFIG_FONT_7x14 is not set | ||
| 683 | # CONFIG_FONT_PEARL_8x8 is not set | ||
| 684 | # CONFIG_FONT_ACORN_8x8 is not set | ||
| 685 | # CONFIG_FONT_MINI_4x6 is not set | ||
| 686 | # CONFIG_FONT_SUN8x16 is not set | ||
| 687 | # CONFIG_FONT_SUN12x22 is not set | ||
| 688 | # CONFIG_FONT_10x18 is not set | ||
| 689 | # CONFIG_LOGO is not set | ||
| 690 | # CONFIG_SOUND is not set | ||
| 691 | # CONFIG_HID_SUPPORT is not set | ||
| 692 | # CONFIG_USB_SUPPORT is not set | ||
| 693 | CONFIG_MMC=y | ||
| 694 | CONFIG_MMC_DEBUG=y | ||
| 695 | # CONFIG_MMC_UNSAFE_RESUME is not set | ||
| 696 | |||
| 697 | # | ||
| 698 | # MMC/SD Card Drivers | ||
| 699 | # | ||
| 700 | CONFIG_MMC_BLOCK=y | ||
| 701 | CONFIG_MMC_BLOCK_BOUNCE=y | ||
| 702 | # CONFIG_SDIO_UART is not set | ||
| 703 | # CONFIG_MMC_TEST is not set | ||
| 704 | |||
| 705 | # | ||
| 706 | # MMC/SD Host Controller Drivers | ||
| 707 | # | ||
| 708 | CONFIG_MMC_PXA=y | ||
| 709 | # CONFIG_MMC_SDHCI is not set | ||
| 710 | # CONFIG_MMC_SPI is not set | ||
| 711 | # CONFIG_NEW_LEDS is not set | ||
| 712 | CONFIG_RTC_LIB=y | ||
| 713 | CONFIG_RTC_CLASS=y | ||
| 714 | CONFIG_RTC_HCTOSYS=y | ||
| 715 | CONFIG_RTC_HCTOSYS_DEVICE="rtc0" | ||
| 716 | # CONFIG_RTC_DEBUG is not set | ||
| 717 | |||
| 718 | # | ||
| 719 | # RTC interfaces | ||
| 720 | # | ||
| 721 | CONFIG_RTC_INTF_SYSFS=y | ||
| 722 | CONFIG_RTC_INTF_PROC=y | ||
| 723 | CONFIG_RTC_INTF_DEV=y | ||
| 724 | # CONFIG_RTC_INTF_DEV_UIE_EMUL is not set | ||
| 725 | # CONFIG_RTC_DRV_TEST is not set | ||
| 726 | |||
| 727 | # | ||
| 728 | # I2C RTC drivers | ||
| 729 | # | ||
| 730 | # CONFIG_RTC_DRV_DS1307 is not set | ||
| 731 | # CONFIG_RTC_DRV_DS1374 is not set | ||
| 732 | # CONFIG_RTC_DRV_DS1672 is not set | ||
| 733 | # CONFIG_RTC_DRV_MAX6900 is not set | ||
| 734 | # CONFIG_RTC_DRV_RS5C372 is not set | ||
| 735 | # CONFIG_RTC_DRV_ISL1208 is not set | ||
| 736 | # CONFIG_RTC_DRV_X1205 is not set | ||
| 737 | # CONFIG_RTC_DRV_PCF8563 is not set | ||
| 738 | # CONFIG_RTC_DRV_PCF8583 is not set | ||
| 739 | # CONFIG_RTC_DRV_M41T80 is not set | ||
| 740 | # CONFIG_RTC_DRV_S35390A is not set | ||
| 741 | # CONFIG_RTC_DRV_FM3130 is not set | ||
| 742 | |||
| 743 | # | ||
| 744 | # SPI RTC drivers | ||
| 745 | # | ||
| 746 | # CONFIG_RTC_DRV_M41T94 is not set | ||
| 747 | # CONFIG_RTC_DRV_DS1305 is not set | ||
| 748 | # CONFIG_RTC_DRV_MAX6902 is not set | ||
| 749 | # CONFIG_RTC_DRV_R9701 is not set | ||
| 750 | # CONFIG_RTC_DRV_RS5C348 is not set | ||
| 751 | |||
| 752 | # | ||
| 753 | # Platform RTC drivers | ||
| 754 | # | ||
| 755 | # CONFIG_RTC_DRV_CMOS is not set | ||
| 756 | # CONFIG_RTC_DRV_DS1511 is not set | ||
| 757 | # CONFIG_RTC_DRV_DS1553 is not set | ||
| 758 | # CONFIG_RTC_DRV_DS1742 is not set | ||
| 759 | # CONFIG_RTC_DRV_STK17TA8 is not set | ||
| 760 | # CONFIG_RTC_DRV_M48T86 is not set | ||
| 761 | # CONFIG_RTC_DRV_M48T59 is not set | ||
| 762 | # CONFIG_RTC_DRV_V3020 is not set | ||
| 763 | |||
| 764 | # | ||
| 765 | # on-CPU RTC drivers | ||
| 766 | # | ||
| 767 | CONFIG_RTC_DRV_SA1100=y | ||
| 768 | # CONFIG_DMADEVICES is not set | ||
| 769 | |||
| 770 | # | ||
| 771 | # Voltage and Current regulators | ||
| 772 | # | ||
| 773 | # CONFIG_REGULATOR is not set | ||
| 774 | # CONFIG_REGULATOR_FIXED_VOLTAGE is not set | ||
| 775 | # CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set | ||
| 776 | # CONFIG_REGULATOR_BQ24022 is not set | ||
| 777 | # CONFIG_UIO is not set | ||
| 778 | |||
| 779 | # | ||
| 780 | # File systems | ||
| 781 | # | ||
| 782 | CONFIG_EXT2_FS=y | ||
| 783 | # CONFIG_EXT2_FS_XATTR is not set | ||
| 784 | # CONFIG_EXT2_FS_XIP is not set | ||
| 785 | CONFIG_EXT3_FS=y | ||
| 786 | CONFIG_EXT3_FS_XATTR=y | ||
| 787 | # CONFIG_EXT3_FS_POSIX_ACL is not set | ||
| 788 | # CONFIG_EXT3_FS_SECURITY is not set | ||
| 789 | # CONFIG_EXT4DEV_FS is not set | ||
| 790 | CONFIG_JBD=y | ||
| 791 | CONFIG_FS_MBCACHE=y | ||
| 792 | # CONFIG_REISERFS_FS is not set | ||
| 793 | # CONFIG_JFS_FS is not set | ||
| 794 | # CONFIG_FS_POSIX_ACL is not set | ||
| 795 | # CONFIG_XFS_FS is not set | ||
| 796 | # CONFIG_OCFS2_FS is not set | ||
| 797 | # CONFIG_DNOTIFY is not set | ||
| 798 | # CONFIG_INOTIFY is not set | ||
| 799 | # CONFIG_QUOTA is not set | ||
| 800 | # CONFIG_AUTOFS_FS is not set | ||
| 801 | # CONFIG_AUTOFS4_FS is not set | ||
| 802 | # CONFIG_FUSE_FS is not set | ||
| 803 | |||
| 804 | # | ||
| 805 | # CD-ROM/DVD Filesystems | ||
| 806 | # | ||
| 807 | # CONFIG_ISO9660_FS is not set | ||
| 808 | # CONFIG_UDF_FS is not set | ||
| 809 | |||
| 810 | # | ||
| 811 | # DOS/FAT/NT Filesystems | ||
| 812 | # | ||
| 813 | CONFIG_FAT_FS=y | ||
| 814 | CONFIG_MSDOS_FS=y | ||
| 815 | CONFIG_VFAT_FS=y | ||
| 816 | CONFIG_FAT_DEFAULT_CODEPAGE=866 | ||
| 817 | CONFIG_FAT_DEFAULT_IOCHARSET="utf8" | ||
| 818 | # CONFIG_NTFS_FS is not set | ||
| 819 | |||
| 820 | # | ||
| 821 | # Pseudo filesystems | ||
| 822 | # | ||
| 823 | CONFIG_PROC_FS=y | ||
| 824 | CONFIG_PROC_SYSCTL=y | ||
| 825 | CONFIG_SYSFS=y | ||
| 826 | CONFIG_TMPFS=y | ||
| 827 | # CONFIG_TMPFS_POSIX_ACL is not set | ||
| 828 | # CONFIG_HUGETLB_PAGE is not set | ||
| 829 | # CONFIG_CONFIGFS_FS is not set | ||
| 830 | |||
| 831 | # | ||
| 832 | # Miscellaneous filesystems | ||
| 833 | # | ||
| 834 | # CONFIG_ADFS_FS is not set | ||
| 835 | # CONFIG_AFFS_FS is not set | ||
| 836 | # CONFIG_HFS_FS is not set | ||
| 837 | # CONFIG_HFSPLUS_FS is not set | ||
| 838 | # CONFIG_BEFS_FS is not set | ||
| 839 | # CONFIG_BFS_FS is not set | ||
| 840 | # CONFIG_EFS_FS is not set | ||
| 841 | # CONFIG_CRAMFS is not set | ||
| 842 | # CONFIG_VXFS_FS is not set | ||
| 843 | # CONFIG_MINIX_FS is not set | ||
| 844 | # CONFIG_OMFS_FS is not set | ||
| 845 | # CONFIG_HPFS_FS is not set | ||
| 846 | # CONFIG_QNX4FS_FS is not set | ||
| 847 | # CONFIG_ROMFS_FS is not set | ||
| 848 | # CONFIG_SYSV_FS is not set | ||
| 849 | # CONFIG_UFS_FS is not set | ||
| 850 | # CONFIG_NETWORK_FILESYSTEMS is not set | ||
| 851 | |||
| 852 | # | ||
| 853 | # Partition Types | ||
| 854 | # | ||
| 855 | # CONFIG_PARTITION_ADVANCED is not set | ||
| 856 | CONFIG_MSDOS_PARTITION=y | ||
| 857 | CONFIG_NLS=y | ||
| 858 | CONFIG_NLS_DEFAULT="utf8" | ||
| 859 | # CONFIG_NLS_CODEPAGE_437 is not set | ||
| 860 | # CONFIG_NLS_CODEPAGE_737 is not set | ||
| 861 | # CONFIG_NLS_CODEPAGE_775 is not set | ||
| 862 | # CONFIG_NLS_CODEPAGE_850 is not set | ||
| 863 | # CONFIG_NLS_CODEPAGE_852 is not set | ||
| 864 | # CONFIG_NLS_CODEPAGE_855 is not set | ||
| 865 | # CONFIG_NLS_CODEPAGE_857 is not set | ||
| 866 | # CONFIG_NLS_CODEPAGE_860 is not set | ||
| 867 | # CONFIG_NLS_CODEPAGE_861 is not set | ||
| 868 | # CONFIG_NLS_CODEPAGE_862 is not set | ||
| 869 | # CONFIG_NLS_CODEPAGE_863 is not set | ||
| 870 | # CONFIG_NLS_CODEPAGE_864 is not set | ||
| 871 | # CONFIG_NLS_CODEPAGE_865 is not set | ||
| 872 | CONFIG_NLS_CODEPAGE_866=y | ||
| 873 | # CONFIG_NLS_CODEPAGE_869 is not set | ||
| 874 | # CONFIG_NLS_CODEPAGE_936 is not set | ||
| 875 | # CONFIG_NLS_CODEPAGE_950 is not set | ||
| 876 | # CONFIG_NLS_CODEPAGE_932 is not set | ||
| 877 | # CONFIG_NLS_CODEPAGE_949 is not set | ||
| 878 | # CONFIG_NLS_CODEPAGE_874 is not set | ||
| 879 | # CONFIG_NLS_ISO8859_8 is not set | ||
| 880 | # CONFIG_NLS_CODEPAGE_1250 is not set | ||
| 881 | # CONFIG_NLS_CODEPAGE_1251 is not set | ||
| 882 | # CONFIG_NLS_ASCII is not set | ||
| 883 | # CONFIG_NLS_ISO8859_1 is not set | ||
| 884 | # CONFIG_NLS_ISO8859_2 is not set | ||
| 885 | # CONFIG_NLS_ISO8859_3 is not set | ||
| 886 | # CONFIG_NLS_ISO8859_4 is not set | ||
| 887 | # CONFIG_NLS_ISO8859_5 is not set | ||
| 888 | # CONFIG_NLS_ISO8859_6 is not set | ||
| 889 | # CONFIG_NLS_ISO8859_7 is not set | ||
| 890 | # CONFIG_NLS_ISO8859_9 is not set | ||
| 891 | # CONFIG_NLS_ISO8859_13 is not set | ||
| 892 | # CONFIG_NLS_ISO8859_14 is not set | ||
| 893 | # CONFIG_NLS_ISO8859_15 is not set | ||
| 894 | # CONFIG_NLS_KOI8_R is not set | ||
| 895 | # CONFIG_NLS_KOI8_U is not set | ||
| 896 | CONFIG_NLS_UTF8=y | ||
| 897 | # CONFIG_DLM is not set | ||
| 898 | |||
| 899 | # | ||
| 900 | # Kernel hacking | ||
| 901 | # | ||
| 902 | # CONFIG_PRINTK_TIME is not set | ||
| 903 | CONFIG_ENABLE_WARN_DEPRECATED=y | ||
| 904 | CONFIG_ENABLE_MUST_CHECK=y | ||
| 905 | CONFIG_FRAME_WARN=1024 | ||
| 906 | # CONFIG_MAGIC_SYSRQ is not set | ||
| 907 | # CONFIG_UNUSED_SYMBOLS is not set | ||
| 908 | # CONFIG_DEBUG_FS is not set | ||
| 909 | # CONFIG_HEADERS_CHECK is not set | ||
| 910 | # CONFIG_DEBUG_KERNEL is not set | ||
| 911 | CONFIG_DEBUG_BUGVERBOSE=y | ||
| 912 | CONFIG_DEBUG_MEMORY_INIT=y | ||
| 913 | CONFIG_FRAME_POINTER=y | ||
| 914 | # CONFIG_LATENCYTOP is not set | ||
| 915 | CONFIG_SYSCTL_SYSCALL_CHECK=y | ||
| 916 | CONFIG_HAVE_FTRACE=y | ||
| 917 | CONFIG_HAVE_DYNAMIC_FTRACE=y | ||
| 918 | # CONFIG_FTRACE is not set | ||
| 919 | # CONFIG_IRQSOFF_TRACER is not set | ||
| 920 | # CONFIG_PREEMPT_TRACER is not set | ||
| 921 | # CONFIG_SCHED_TRACER is not set | ||
| 922 | # CONFIG_CONTEXT_SWITCH_TRACER is not set | ||
| 923 | # CONFIG_SAMPLES is not set | ||
| 924 | CONFIG_HAVE_ARCH_KGDB=y | ||
| 925 | CONFIG_DEBUG_USER=y | ||
| 926 | |||
| 927 | # | ||
| 928 | # Security options | ||
| 929 | # | ||
| 930 | # CONFIG_KEYS is not set | ||
| 931 | # CONFIG_SECURITY is not set | ||
| 932 | # CONFIG_SECURITY_FILE_CAPABILITIES is not set | ||
| 933 | # CONFIG_CRYPTO is not set | ||
| 934 | |||
| 935 | # | ||
| 936 | # Library routines | ||
| 937 | # | ||
| 938 | CONFIG_BITREVERSE=y | ||
| 939 | # CONFIG_GENERIC_FIND_FIRST_BIT is not set | ||
| 940 | # CONFIG_GENERIC_FIND_NEXT_BIT is not set | ||
| 941 | # CONFIG_CRC_CCITT is not set | ||
| 942 | # CONFIG_CRC16 is not set | ||
| 943 | CONFIG_CRC_T10DIF=y | ||
| 944 | # CONFIG_CRC_ITU_T is not set | ||
| 945 | CONFIG_CRC32=y | ||
| 946 | # CONFIG_CRC7 is not set | ||
| 947 | # CONFIG_LIBCRC32C is not set | ||
| 948 | CONFIG_PLIST=y | ||
| 949 | CONFIG_HAS_IOMEM=y | ||
| 950 | CONFIG_HAS_IOPORT=y | ||
| 951 | CONFIG_HAS_DMA=y | ||
diff --git a/arch/arm/configs/viper_defconfig b/arch/arm/configs/viper_defconfig new file mode 100644 index 000000000000..d01fecb8673e --- /dev/null +++ b/arch/arm/configs/viper_defconfig | |||
| @@ -0,0 +1,1678 @@ | |||
| 1 | # | ||
| 2 | # Automatically generated make config: don't edit | ||
| 3 | # Linux kernel version: 2.6.27-rc4 | ||
| 4 | # Thu Aug 21 17:12:07 2008 | ||
| 5 | # | ||
| 6 | CONFIG_ARM=y | ||
| 7 | CONFIG_HAVE_PWM=y | ||
| 8 | CONFIG_SYS_SUPPORTS_APM_EMULATION=y | ||
| 9 | CONFIG_GENERIC_GPIO=y | ||
| 10 | CONFIG_GENERIC_TIME=y | ||
| 11 | CONFIG_GENERIC_CLOCKEVENTS=y | ||
| 12 | CONFIG_MMU=y | ||
| 13 | # CONFIG_NO_IOPORT is not set | ||
| 14 | CONFIG_GENERIC_HARDIRQS=y | ||
| 15 | CONFIG_STACKTRACE_SUPPORT=y | ||
| 16 | CONFIG_HAVE_LATENCYTOP_SUPPORT=y | ||
| 17 | CONFIG_LOCKDEP_SUPPORT=y | ||
| 18 | CONFIG_TRACE_IRQFLAGS_SUPPORT=y | ||
| 19 | CONFIG_HARDIRQS_SW_RESEND=y | ||
| 20 | CONFIG_GENERIC_IRQ_PROBE=y | ||
| 21 | CONFIG_RWSEM_GENERIC_SPINLOCK=y | ||
| 22 | # CONFIG_ARCH_HAS_ILOG2_U32 is not set | ||
| 23 | # CONFIG_ARCH_HAS_ILOG2_U64 is not set | ||
| 24 | CONFIG_GENERIC_HWEIGHT=y | ||
| 25 | CONFIG_GENERIC_CALIBRATE_DELAY=y | ||
| 26 | CONFIG_ARCH_SUPPORTS_AOUT=y | ||
| 27 | CONFIG_ZONE_DMA=y | ||
| 28 | CONFIG_ARCH_MTD_XIP=y | ||
| 29 | CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y | ||
| 30 | CONFIG_VECTORS_BASE=0xffff0000 | ||
| 31 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | ||
| 32 | |||
| 33 | # | ||
| 34 | # General setup | ||
| 35 | # | ||
| 36 | CONFIG_EXPERIMENTAL=y | ||
| 37 | CONFIG_BROKEN_ON_SMP=y | ||
| 38 | CONFIG_INIT_ENV_ARG_LIMIT=32 | ||
| 39 | CONFIG_LOCALVERSION="" | ||
| 40 | CONFIG_LOCALVERSION_AUTO=y | ||
| 41 | # CONFIG_SWAP is not set | ||
| 42 | CONFIG_SYSVIPC=y | ||
| 43 | CONFIG_SYSVIPC_SYSCTL=y | ||
| 44 | # CONFIG_POSIX_MQUEUE is not set | ||
| 45 | # CONFIG_BSD_PROCESS_ACCT is not set | ||
| 46 | # CONFIG_TASKSTATS is not set | ||
| 47 | # CONFIG_AUDIT is not set | ||
| 48 | # CONFIG_IKCONFIG is not set | ||
| 49 | CONFIG_LOG_BUF_SHIFT=13 | ||
| 50 | # CONFIG_CGROUPS is not set | ||
| 51 | # CONFIG_GROUP_SCHED is not set | ||
| 52 | CONFIG_SYSFS_DEPRECATED=y | ||
| 53 | CONFIG_SYSFS_DEPRECATED_V2=y | ||
| 54 | # CONFIG_RELAY is not set | ||
| 55 | # CONFIG_NAMESPACES is not set | ||
| 56 | # CONFIG_BLK_DEV_INITRD is not set | ||
| 57 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y | ||
| 58 | CONFIG_SYSCTL=y | ||
| 59 | CONFIG_EMBEDDED=y | ||
| 60 | CONFIG_UID16=y | ||
| 61 | CONFIG_SYSCTL_SYSCALL=y | ||
| 62 | CONFIG_KALLSYMS=y | ||
| 63 | # CONFIG_KALLSYMS_ALL is not set | ||
| 64 | # CONFIG_KALLSYMS_EXTRA_PASS is not set | ||
| 65 | CONFIG_HOTPLUG=y | ||
| 66 | CONFIG_PRINTK=y | ||
| 67 | CONFIG_BUG=y | ||
| 68 | # CONFIG_ELF_CORE is not set | ||
| 69 | CONFIG_COMPAT_BRK=y | ||
| 70 | CONFIG_BASE_FULL=y | ||
| 71 | CONFIG_FUTEX=y | ||
| 72 | CONFIG_ANON_INODES=y | ||
| 73 | CONFIG_EPOLL=y | ||
| 74 | CONFIG_SIGNALFD=y | ||
| 75 | CONFIG_TIMERFD=y | ||
| 76 | CONFIG_EVENTFD=y | ||
| 77 | # CONFIG_SHMEM is not set | ||
| 78 | CONFIG_VM_EVENT_COUNTERS=y | ||
| 79 | CONFIG_SLAB=y | ||
| 80 | # CONFIG_SLUB is not set | ||
| 81 | # CONFIG_SLOB is not set | ||
| 82 | # CONFIG_PROFILING is not set | ||
| 83 | # CONFIG_MARKERS is not set | ||
| 84 | CONFIG_HAVE_OPROFILE=y | ||
| 85 | # CONFIG_KPROBES is not set | ||
| 86 | # CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS is not set | ||
| 87 | # CONFIG_HAVE_IOREMAP_PROT is not set | ||
| 88 | CONFIG_HAVE_KPROBES=y | ||
| 89 | CONFIG_HAVE_KRETPROBES=y | ||
| 90 | # CONFIG_HAVE_ARCH_TRACEHOOK is not set | ||
| 91 | # CONFIG_HAVE_DMA_ATTRS is not set | ||
| 92 | # CONFIG_USE_GENERIC_SMP_HELPERS is not set | ||
| 93 | CONFIG_HAVE_CLK=y | ||
| 94 | CONFIG_PROC_PAGE_MONITOR=y | ||
| 95 | CONFIG_HAVE_GENERIC_DMA_COHERENT=y | ||
| 96 | CONFIG_SLABINFO=y | ||
| 97 | CONFIG_RT_MUTEXES=y | ||
| 98 | CONFIG_TINY_SHMEM=y | ||
| 99 | CONFIG_BASE_SMALL=0 | ||
| 100 | CONFIG_MODULES=y | ||
| 101 | # CONFIG_MODULE_FORCE_LOAD is not set | ||
| 102 | CONFIG_MODULE_UNLOAD=y | ||
| 103 | # CONFIG_MODULE_FORCE_UNLOAD is not set | ||
| 104 | # CONFIG_MODVERSIONS is not set | ||
| 105 | # CONFIG_MODULE_SRCVERSION_ALL is not set | ||
| 106 | CONFIG_KMOD=y | ||
| 107 | CONFIG_BLOCK=y | ||
| 108 | # CONFIG_LBD is not set | ||
| 109 | # CONFIG_BLK_DEV_IO_TRACE is not set | ||
| 110 | # CONFIG_LSF is not set | ||
| 111 | # CONFIG_BLK_DEV_BSG is not set | ||
| 112 | # CONFIG_BLK_DEV_INTEGRITY is not set | ||
| 113 | |||
| 114 | # | ||
| 115 | # IO Schedulers | ||
| 116 | # | ||
| 117 | CONFIG_IOSCHED_NOOP=y | ||
| 118 | # CONFIG_IOSCHED_AS is not set | ||
| 119 | CONFIG_IOSCHED_DEADLINE=y | ||
| 120 | # CONFIG_IOSCHED_CFQ is not set | ||
| 121 | # CONFIG_DEFAULT_AS is not set | ||
| 122 | CONFIG_DEFAULT_DEADLINE=y | ||
| 123 | # CONFIG_DEFAULT_CFQ is not set | ||
| 124 | # CONFIG_DEFAULT_NOOP is not set | ||
| 125 | CONFIG_DEFAULT_IOSCHED="deadline" | ||
| 126 | CONFIG_CLASSIC_RCU=y | ||
| 127 | |||
| 128 | # | ||
| 129 | # System Type | ||
| 130 | # | ||
| 131 | # CONFIG_ARCH_AAEC2000 is not set | ||
| 132 | # CONFIG_ARCH_INTEGRATOR is not set | ||
| 133 | # CONFIG_ARCH_REALVIEW is not set | ||
| 134 | # CONFIG_ARCH_VERSATILE is not set | ||
| 135 | # CONFIG_ARCH_AT91 is not set | ||
| 136 | # CONFIG_ARCH_CLPS7500 is not set | ||
| 137 | # CONFIG_ARCH_CLPS711X is not set | ||
| 138 | # CONFIG_ARCH_EBSA110 is not set | ||
| 139 | # CONFIG_ARCH_EP93XX is not set | ||
| 140 | # CONFIG_ARCH_FOOTBRIDGE is not set | ||
| 141 | # CONFIG_ARCH_NETX is not set | ||
| 142 | # CONFIG_ARCH_H720X is not set | ||
| 143 | # CONFIG_ARCH_IMX is not set | ||
| 144 | # CONFIG_ARCH_IOP13XX is not set | ||
| 145 | # CONFIG_ARCH_IOP32X is not set | ||
| 146 | # CONFIG_ARCH_IOP33X is not set | ||
| 147 | # CONFIG_ARCH_IXP23XX is not set | ||
| 148 | # CONFIG_ARCH_IXP2000 is not set | ||
| 149 | # CONFIG_ARCH_IXP4XX is not set | ||
| 150 | # CONFIG_ARCH_L7200 is not set | ||
| 151 | # CONFIG_ARCH_KIRKWOOD is not set | ||
| 152 | # CONFIG_ARCH_KS8695 is not set | ||
| 153 | # CONFIG_ARCH_NS9XXX is not set | ||
| 154 | # CONFIG_ARCH_LOKI is not set | ||
| 155 | # CONFIG_ARCH_MV78XX0 is not set | ||
| 156 | # CONFIG_ARCH_MXC is not set | ||
| 157 | # CONFIG_ARCH_ORION5X is not set | ||
| 158 | # CONFIG_ARCH_PNX4008 is not set | ||
| 159 | CONFIG_ARCH_PXA=y | ||
| 160 | # CONFIG_ARCH_RPC is not set | ||
| 161 | # CONFIG_ARCH_SA1100 is not set | ||
| 162 | # CONFIG_ARCH_S3C2410 is not set | ||
| 163 | # CONFIG_ARCH_SHARK is not set | ||
| 164 | # CONFIG_ARCH_LH7A40X is not set | ||
| 165 | # CONFIG_ARCH_DAVINCI is not set | ||
| 166 | # CONFIG_ARCH_OMAP is not set | ||
| 167 | # CONFIG_ARCH_MSM7X00A is not set | ||
| 168 | |||
| 169 | # | ||
| 170 | # Intel PXA2xx/PXA3xx Implementations | ||
| 171 | # | ||
| 172 | # CONFIG_ARCH_GUMSTIX is not set | ||
| 173 | # CONFIG_ARCH_LUBBOCK is not set | ||
| 174 | # CONFIG_MACH_LOGICPD_PXA270 is not set | ||
| 175 | # CONFIG_MACH_MAINSTONE is not set | ||
| 176 | # CONFIG_ARCH_PXA_IDP is not set | ||
| 177 | # CONFIG_PXA_SHARPSL is not set | ||
| 178 | CONFIG_ARCH_VIPER=y | ||
| 179 | # CONFIG_ARCH_PXA_ESERIES is not set | ||
| 180 | # CONFIG_MACH_TRIZEPS4 is not set | ||
| 181 | # CONFIG_MACH_EM_X270 is not set | ||
| 182 | # CONFIG_MACH_COLIBRI is not set | ||
| 183 | # CONFIG_MACH_ZYLONITE is not set | ||
| 184 | # CONFIG_MACH_LITTLETON is not set | ||
| 185 | # CONFIG_MACH_TAVOREVB is not set | ||
| 186 | # CONFIG_MACH_SAAR is not set | ||
| 187 | # CONFIG_MACH_ARMCORE is not set | ||
| 188 | # CONFIG_MACH_MAGICIAN is not set | ||
| 189 | # CONFIG_MACH_PCM027 is not set | ||
| 190 | # CONFIG_ARCH_PXA_PALM is not set | ||
| 191 | # CONFIG_PXA_EZX is not set | ||
| 192 | CONFIG_PXA25x=y | ||
| 193 | CONFIG_PXA_PWM=m | ||
| 194 | CONFIG_PXA_HAVE_ISA_IRQS=y | ||
| 195 | |||
| 196 | # | ||
| 197 | # Boot options | ||
| 198 | # | ||
| 199 | |||
| 200 | # | ||
| 201 | # Power management | ||
| 202 | # | ||
| 203 | |||
| 204 | # | ||
| 205 | # Processor Type | ||
| 206 | # | ||
| 207 | CONFIG_CPU_32=y | ||
| 208 | CONFIG_CPU_XSCALE=y | ||
| 209 | CONFIG_CPU_32v5=y | ||
| 210 | CONFIG_CPU_ABRT_EV5T=y | ||
| 211 | CONFIG_CPU_PABRT_NOIFAR=y | ||
| 212 | CONFIG_CPU_CACHE_VIVT=y | ||
| 213 | CONFIG_CPU_TLB_V4WBI=y | ||
| 214 | CONFIG_CPU_CP15=y | ||
| 215 | CONFIG_CPU_CP15_MMU=y | ||
| 216 | |||
| 217 | # | ||
| 218 | # Processor Features | ||
| 219 | # | ||
| 220 | CONFIG_ARM_THUMB=y | ||
| 221 | # CONFIG_CPU_DCACHE_DISABLE is not set | ||
| 222 | # CONFIG_OUTER_CACHE is not set | ||
| 223 | CONFIG_IWMMXT=y | ||
| 224 | CONFIG_XSCALE_PMU=y | ||
| 225 | |||
| 226 | # | ||
| 227 | # Bus support | ||
| 228 | # | ||
| 229 | CONFIG_ISA=y | ||
| 230 | # CONFIG_PCI_SYSCALL is not set | ||
| 231 | # CONFIG_ARCH_SUPPORTS_MSI is not set | ||
| 232 | CONFIG_PCCARD=m | ||
| 233 | # CONFIG_PCMCIA_DEBUG is not set | ||
| 234 | CONFIG_PCMCIA=m | ||
| 235 | CONFIG_PCMCIA_LOAD_CIS=y | ||
| 236 | CONFIG_PCMCIA_IOCTL=y | ||
| 237 | |||
| 238 | # | ||
| 239 | # PC-card bridges | ||
| 240 | # | ||
| 241 | # CONFIG_I82365 is not set | ||
| 242 | # CONFIG_TCIC is not set | ||
| 243 | CONFIG_PCMCIA_PXA2XX=m | ||
| 244 | CONFIG_PCMCIA_PROBE=y | ||
| 245 | |||
| 246 | # | ||
| 247 | # Kernel Features | ||
| 248 | # | ||
| 249 | CONFIG_TICK_ONESHOT=y | ||
| 250 | # CONFIG_NO_HZ is not set | ||
| 251 | # CONFIG_HIGH_RES_TIMERS is not set | ||
| 252 | CONFIG_GENERIC_CLOCKEVENTS_BUILD=y | ||
| 253 | # CONFIG_PREEMPT is not set | ||
| 254 | CONFIG_HZ=100 | ||
| 255 | CONFIG_AEABI=y | ||
| 256 | CONFIG_OABI_COMPAT=y | ||
| 257 | # CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set | ||
| 258 | CONFIG_SELECT_MEMORY_MODEL=y | ||
| 259 | CONFIG_FLATMEM_MANUAL=y | ||
| 260 | # CONFIG_DISCONTIGMEM_MANUAL is not set | ||
| 261 | # CONFIG_SPARSEMEM_MANUAL is not set | ||
| 262 | CONFIG_FLATMEM=y | ||
| 263 | CONFIG_FLAT_NODE_MEM_MAP=y | ||
| 264 | # CONFIG_SPARSEMEM_STATIC is not set | ||
| 265 | # CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set | ||
| 266 | CONFIG_PAGEFLAGS_EXTENDED=y | ||
| 267 | CONFIG_SPLIT_PTLOCK_CPUS=4096 | ||
| 268 | # CONFIG_RESOURCES_64BIT is not set | ||
| 269 | CONFIG_ZONE_DMA_FLAG=1 | ||
| 270 | CONFIG_BOUNCE=y | ||
| 271 | CONFIG_VIRT_TO_BUS=y | ||
| 272 | CONFIG_ALIGNMENT_TRAP=y | ||
| 273 | |||
| 274 | # | ||
| 275 | # Boot options | ||
| 276 | # | ||
| 277 | CONFIG_ZBOOT_ROM_TEXT=0x0 | ||
| 278 | CONFIG_ZBOOT_ROM_BSS=0x0 | ||
| 279 | CONFIG_CMDLINE="root=31:02 rootfstype=jffs2 ro console=ttyS0,115200" | ||
| 280 | # CONFIG_XIP_KERNEL is not set | ||
| 281 | # CONFIG_KEXEC is not set | ||
| 282 | |||
| 283 | # | ||
| 284 | # CPU Frequency scaling | ||
| 285 | # | ||
| 286 | CONFIG_CPU_FREQ=y | ||
| 287 | CONFIG_CPU_FREQ_TABLE=y | ||
| 288 | # CONFIG_CPU_FREQ_DEBUG is not set | ||
| 289 | CONFIG_CPU_FREQ_STAT=y | ||
| 290 | # CONFIG_CPU_FREQ_STAT_DETAILS is not set | ||
| 291 | CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y | ||
| 292 | # CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set | ||
| 293 | # CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set | ||
| 294 | # CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set | ||
| 295 | # CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set | ||
| 296 | CONFIG_CPU_FREQ_GOV_PERFORMANCE=y | ||
| 297 | CONFIG_CPU_FREQ_GOV_POWERSAVE=m | ||
| 298 | CONFIG_CPU_FREQ_GOV_USERSPACE=m | ||
| 299 | CONFIG_CPU_FREQ_GOV_ONDEMAND=m | ||
| 300 | CONFIG_CPU_FREQ_GOV_CONSERVATIVE=m | ||
| 301 | CONFIG_CPU_FREQ_PXA=y | ||
| 302 | |||
| 303 | # | ||
| 304 | # Floating point emulation | ||
| 305 | # | ||
| 306 | |||
| 307 | # | ||
| 308 | # At least one emulation must be selected | ||
| 309 | # | ||
| 310 | # CONFIG_FPE_NWFPE is not set | ||
| 311 | CONFIG_FPE_FASTFPE=y | ||
| 312 | |||
| 313 | # | ||
| 314 | # Userspace binary formats | ||
| 315 | # | ||
| 316 | CONFIG_BINFMT_ELF=y | ||
| 317 | # CONFIG_BINFMT_AOUT is not set | ||
| 318 | # CONFIG_BINFMT_MISC is not set | ||
| 319 | |||
| 320 | # | ||
| 321 | # Power management options | ||
| 322 | # | ||
| 323 | CONFIG_PM=y | ||
| 324 | # CONFIG_PM_DEBUG is not set | ||
| 325 | CONFIG_PM_SLEEP=y | ||
| 326 | CONFIG_SUSPEND=y | ||
| 327 | CONFIG_SUSPEND_FREEZER=y | ||
| 328 | # CONFIG_APM_EMULATION is not set | ||
| 329 | CONFIG_ARCH_SUSPEND_POSSIBLE=y | ||
| 330 | CONFIG_NET=y | ||
| 331 | |||
| 332 | # | ||
| 333 | # Networking options | ||
| 334 | # | ||
| 335 | CONFIG_PACKET=y | ||
| 336 | # CONFIG_PACKET_MMAP is not set | ||
| 337 | CONFIG_UNIX=y | ||
| 338 | CONFIG_XFRM=y | ||
| 339 | # CONFIG_XFRM_USER is not set | ||
| 340 | # CONFIG_XFRM_SUB_POLICY is not set | ||
| 341 | # CONFIG_XFRM_MIGRATE is not set | ||
| 342 | # CONFIG_XFRM_STATISTICS is not set | ||
| 343 | # CONFIG_NET_KEY is not set | ||
| 344 | CONFIG_INET=y | ||
| 345 | # CONFIG_IP_MULTICAST is not set | ||
| 346 | # CONFIG_IP_ADVANCED_ROUTER is not set | ||
| 347 | CONFIG_IP_FIB_HASH=y | ||
| 348 | CONFIG_IP_PNP=y | ||
| 349 | CONFIG_IP_PNP_DHCP=y | ||
| 350 | # CONFIG_IP_PNP_BOOTP is not set | ||
| 351 | # CONFIG_IP_PNP_RARP is not set | ||
| 352 | # CONFIG_NET_IPIP is not set | ||
| 353 | # CONFIG_NET_IPGRE is not set | ||
| 354 | # CONFIG_ARPD is not set | ||
| 355 | CONFIG_SYN_COOKIES=y | ||
| 356 | # CONFIG_INET_AH is not set | ||
| 357 | # CONFIG_INET_ESP is not set | ||
| 358 | # CONFIG_INET_IPCOMP is not set | ||
| 359 | # CONFIG_INET_XFRM_TUNNEL is not set | ||
| 360 | # CONFIG_INET_TUNNEL is not set | ||
| 361 | CONFIG_INET_XFRM_MODE_TRANSPORT=y | ||
| 362 | CONFIG_INET_XFRM_MODE_TUNNEL=y | ||
| 363 | CONFIG_INET_XFRM_MODE_BEET=y | ||
| 364 | # CONFIG_INET_LRO is not set | ||
| 365 | CONFIG_INET_DIAG=y | ||
| 366 | CONFIG_INET_TCP_DIAG=y | ||
| 367 | # CONFIG_TCP_CONG_ADVANCED is not set | ||
| 368 | CONFIG_TCP_CONG_CUBIC=y | ||
| 369 | CONFIG_DEFAULT_TCP_CONG="cubic" | ||
| 370 | # CONFIG_TCP_MD5SIG is not set | ||
| 371 | # CONFIG_IPV6 is not set | ||
| 372 | # CONFIG_NETWORK_SECMARK is not set | ||
| 373 | # CONFIG_NETFILTER is not set | ||
| 374 | # CONFIG_IP_DCCP is not set | ||
| 375 | # CONFIG_IP_SCTP is not set | ||
| 376 | # CONFIG_TIPC is not set | ||
| 377 | # CONFIG_ATM is not set | ||
| 378 | # CONFIG_BRIDGE is not set | ||
| 379 | # CONFIG_VLAN_8021Q is not set | ||
| 380 | # CONFIG_DECNET is not set | ||
| 381 | # CONFIG_LLC2 is not set | ||
| 382 | # CONFIG_IPX is not set | ||
| 383 | # CONFIG_ATALK is not set | ||
| 384 | # CONFIG_X25 is not set | ||
| 385 | # CONFIG_LAPB is not set | ||
| 386 | # CONFIG_ECONET is not set | ||
| 387 | # CONFIG_WAN_ROUTER is not set | ||
| 388 | # CONFIG_NET_SCHED is not set | ||
| 389 | |||
| 390 | # | ||
| 391 | # Network testing | ||
| 392 | # | ||
| 393 | # CONFIG_NET_PKTGEN is not set | ||
| 394 | # CONFIG_HAMRADIO is not set | ||
| 395 | # CONFIG_CAN is not set | ||
| 396 | # CONFIG_IRDA is not set | ||
| 397 | CONFIG_BT=m | ||
| 398 | CONFIG_BT_L2CAP=m | ||
| 399 | # CONFIG_BT_SCO is not set | ||
| 400 | CONFIG_BT_RFCOMM=m | ||
| 401 | CONFIG_BT_RFCOMM_TTY=y | ||
| 402 | CONFIG_BT_BNEP=m | ||
| 403 | # CONFIG_BT_BNEP_MC_FILTER is not set | ||
| 404 | # CONFIG_BT_BNEP_PROTO_FILTER is not set | ||
| 405 | # CONFIG_BT_HIDP is not set | ||
| 406 | |||
| 407 | # | ||
| 408 | # Bluetooth device drivers | ||
| 409 | # | ||
| 410 | CONFIG_BT_HCIUSB=m | ||
| 411 | # CONFIG_BT_HCIUSB_SCO is not set | ||
| 412 | # CONFIG_BT_HCIBTUSB is not set | ||
| 413 | CONFIG_BT_HCIUART=m | ||
| 414 | CONFIG_BT_HCIUART_H4=y | ||
| 415 | CONFIG_BT_HCIUART_BCSP=y | ||
| 416 | # CONFIG_BT_HCIUART_LL is not set | ||
| 417 | # CONFIG_BT_HCIBCM203X is not set | ||
| 418 | # CONFIG_BT_HCIBPA10X is not set | ||
| 419 | # CONFIG_BT_HCIBFUSB is not set | ||
| 420 | # CONFIG_BT_HCIDTL1 is not set | ||
| 421 | # CONFIG_BT_HCIBT3C is not set | ||
| 422 | # CONFIG_BT_HCIBLUECARD is not set | ||
| 423 | # CONFIG_BT_HCIBTUART is not set | ||
| 424 | # CONFIG_BT_HCIVHCI is not set | ||
| 425 | # CONFIG_AF_RXRPC is not set | ||
| 426 | |||
| 427 | # | ||
| 428 | # Wireless | ||
| 429 | # | ||
| 430 | # CONFIG_CFG80211 is not set | ||
| 431 | # CONFIG_WIRELESS_EXT is not set | ||
| 432 | # CONFIG_MAC80211 is not set | ||
| 433 | CONFIG_IEEE80211=m | ||
| 434 | # CONFIG_IEEE80211_DEBUG is not set | ||
| 435 | CONFIG_IEEE80211_CRYPT_WEP=m | ||
| 436 | # CONFIG_IEEE80211_CRYPT_CCMP is not set | ||
| 437 | # CONFIG_IEEE80211_CRYPT_TKIP is not set | ||
| 438 | # CONFIG_RFKILL is not set | ||
| 439 | # CONFIG_NET_9P is not set | ||
| 440 | |||
| 441 | # | ||
| 442 | # Device Drivers | ||
| 443 | # | ||
| 444 | |||
| 445 | # | ||
| 446 | # Generic Driver Options | ||
| 447 | # | ||
| 448 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | ||
| 449 | CONFIG_STANDALONE=y | ||
| 450 | CONFIG_PREVENT_FIRMWARE_BUILD=y | ||
| 451 | CONFIG_FW_LOADER=m | ||
| 452 | CONFIG_FIRMWARE_IN_KERNEL=y | ||
| 453 | CONFIG_EXTRA_FIRMWARE="" | ||
| 454 | # CONFIG_DEBUG_DRIVER is not set | ||
| 455 | # CONFIG_DEBUG_DEVRES is not set | ||
| 456 | # CONFIG_SYS_HYPERVISOR is not set | ||
| 457 | # CONFIG_CONNECTOR is not set | ||
| 458 | CONFIG_MTD=y | ||
| 459 | # CONFIG_MTD_DEBUG is not set | ||
| 460 | # CONFIG_MTD_CONCAT is not set | ||
| 461 | CONFIG_MTD_PARTITIONS=y | ||
| 462 | CONFIG_MTD_REDBOOT_PARTS=y | ||
| 463 | CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=0 | ||
| 464 | # CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED is not set | ||
| 465 | # CONFIG_MTD_REDBOOT_PARTS_READONLY is not set | ||
| 466 | # CONFIG_MTD_CMDLINE_PARTS is not set | ||
| 467 | # CONFIG_MTD_AFS_PARTS is not set | ||
| 468 | # CONFIG_MTD_AR7_PARTS is not set | ||
| 469 | |||
| 470 | # | ||
| 471 | # User Modules And Translation Layers | ||
| 472 | # | ||
| 473 | CONFIG_MTD_CHAR=m | ||
| 474 | CONFIG_MTD_BLKDEVS=y | ||
| 475 | CONFIG_MTD_BLOCK=y | ||
| 476 | # CONFIG_FTL is not set | ||
| 477 | # CONFIG_NFTL is not set | ||
| 478 | # CONFIG_INFTL is not set | ||
| 479 | # CONFIG_RFD_FTL is not set | ||
| 480 | # CONFIG_SSFDC is not set | ||
| 481 | # CONFIG_MTD_OOPS is not set | ||
| 482 | |||
| 483 | # | ||
| 484 | # RAM/ROM/Flash chip drivers | ||
| 485 | # | ||
| 486 | CONFIG_MTD_CFI=y | ||
| 487 | CONFIG_MTD_JEDECPROBE=y | ||
| 488 | CONFIG_MTD_GEN_PROBE=y | ||
| 489 | CONFIG_MTD_CFI_ADV_OPTIONS=y | ||
| 490 | CONFIG_MTD_CFI_NOSWAP=y | ||
| 491 | # CONFIG_MTD_CFI_BE_BYTE_SWAP is not set | ||
| 492 | # CONFIG_MTD_CFI_LE_BYTE_SWAP is not set | ||
| 493 | CONFIG_MTD_CFI_GEOMETRY=y | ||
| 494 | CONFIG_MTD_MAP_BANK_WIDTH_1=y | ||
| 495 | CONFIG_MTD_MAP_BANK_WIDTH_2=y | ||
| 496 | # CONFIG_MTD_MAP_BANK_WIDTH_4 is not set | ||
| 497 | # CONFIG_MTD_MAP_BANK_WIDTH_8 is not set | ||
| 498 | # CONFIG_MTD_MAP_BANK_WIDTH_16 is not set | ||
| 499 | # CONFIG_MTD_MAP_BANK_WIDTH_32 is not set | ||
| 500 | CONFIG_MTD_CFI_I1=y | ||
| 501 | # CONFIG_MTD_CFI_I2 is not set | ||
| 502 | # CONFIG_MTD_CFI_I4 is not set | ||
| 503 | # CONFIG_MTD_CFI_I8 is not set | ||
| 504 | # CONFIG_MTD_OTP is not set | ||
| 505 | CONFIG_MTD_CFI_INTELEXT=y | ||
| 506 | CONFIG_MTD_CFI_AMDSTD=y | ||
| 507 | # CONFIG_MTD_CFI_STAA is not set | ||
| 508 | CONFIG_MTD_CFI_UTIL=y | ||
| 509 | CONFIG_MTD_RAM=y | ||
| 510 | # CONFIG_MTD_ROM is not set | ||
| 511 | # CONFIG_MTD_ABSENT is not set | ||
| 512 | # CONFIG_MTD_XIP is not set | ||
| 513 | |||
| 514 | # | ||
| 515 | # Mapping drivers for chip access | ||
| 516 | # | ||
| 517 | CONFIG_MTD_COMPLEX_MAPPINGS=y | ||
| 518 | CONFIG_MTD_PHYSMAP=y | ||
| 519 | CONFIG_MTD_PHYSMAP_START=0x8000000 | ||
| 520 | CONFIG_MTD_PHYSMAP_LEN=0 | ||
| 521 | CONFIG_MTD_PHYSMAP_BANKWIDTH=2 | ||
| 522 | CONFIG_MTD_PXA2XX=y | ||
| 523 | # CONFIG_MTD_ARM_INTEGRATOR is not set | ||
| 524 | # CONFIG_MTD_IMPA7 is not set | ||
| 525 | # CONFIG_MTD_SHARP_SL is not set | ||
| 526 | # CONFIG_MTD_PLATRAM is not set | ||
| 527 | CONFIG_MTD_SPARSE_RAM=y | ||
| 528 | |||
| 529 | # | ||
| 530 | # Self-contained MTD device drivers | ||
| 531 | # | ||
| 532 | # CONFIG_MTD_SLRAM is not set | ||
| 533 | # CONFIG_MTD_PHRAM is not set | ||
| 534 | # CONFIG_MTD_MTDRAM is not set | ||
| 535 | # CONFIG_MTD_BLOCK2MTD is not set | ||
| 536 | |||
| 537 | # | ||
| 538 | # Disk-On-Chip Device Drivers | ||
| 539 | # | ||
| 540 | # CONFIG_MTD_DOC2000 is not set | ||
| 541 | # CONFIG_MTD_DOC2001 is not set | ||
| 542 | # CONFIG_MTD_DOC2001PLUS is not set | ||
| 543 | # CONFIG_MTD_NAND is not set | ||
| 544 | # CONFIG_MTD_ONENAND is not set | ||
| 545 | |||
| 546 | # | ||
| 547 | # UBI - Unsorted block images | ||
| 548 | # | ||
| 549 | # CONFIG_MTD_UBI is not set | ||
| 550 | # CONFIG_PARPORT is not set | ||
| 551 | # CONFIG_PNP is not set | ||
| 552 | CONFIG_BLK_DEV=y | ||
| 553 | # CONFIG_BLK_DEV_COW_COMMON is not set | ||
| 554 | CONFIG_BLK_DEV_LOOP=m | ||
| 555 | # CONFIG_BLK_DEV_CRYPTOLOOP is not set | ||
| 556 | # CONFIG_BLK_DEV_NBD is not set | ||
| 557 | # CONFIG_BLK_DEV_UB is not set | ||
| 558 | # CONFIG_BLK_DEV_RAM is not set | ||
| 559 | # CONFIG_CDROM_PKTCDVD is not set | ||
| 560 | # CONFIG_ATA_OVER_ETH is not set | ||
| 561 | CONFIG_MISC_DEVICES=y | ||
| 562 | # CONFIG_EEPROM_93CX6 is not set | ||
| 563 | # CONFIG_ENCLOSURE_SERVICES is not set | ||
| 564 | CONFIG_HAVE_IDE=y | ||
| 565 | # CONFIG_IDE is not set | ||
| 566 | |||
| 567 | # | ||
| 568 | # SCSI device support | ||
| 569 | # | ||
| 570 | # CONFIG_RAID_ATTRS is not set | ||
| 571 | CONFIG_SCSI=m | ||
| 572 | CONFIG_SCSI_DMA=y | ||
| 573 | # CONFIG_SCSI_TGT is not set | ||
| 574 | # CONFIG_SCSI_NETLINK is not set | ||
| 575 | # CONFIG_SCSI_PROC_FS is not set | ||
| 576 | |||
| 577 | # | ||
| 578 | # SCSI support type (disk, tape, CD-ROM) | ||
| 579 | # | ||
| 580 | CONFIG_BLK_DEV_SD=m | ||
| 581 | # CONFIG_CHR_DEV_ST is not set | ||
| 582 | # CONFIG_CHR_DEV_OSST is not set | ||
| 583 | # CONFIG_BLK_DEV_SR is not set | ||
| 584 | # CONFIG_CHR_DEV_SG is not set | ||
| 585 | # CONFIG_CHR_DEV_SCH is not set | ||
| 586 | |||
| 587 | # | ||
| 588 | # Some SCSI devices (e.g. CD jukebox) support multiple LUNs | ||
| 589 | # | ||
| 590 | # CONFIG_SCSI_MULTI_LUN is not set | ||
| 591 | # CONFIG_SCSI_CONSTANTS is not set | ||
| 592 | # CONFIG_SCSI_LOGGING is not set | ||
| 593 | # CONFIG_SCSI_SCAN_ASYNC is not set | ||
| 594 | CONFIG_SCSI_WAIT_SCAN=m | ||
| 595 | |||
| 596 | # | ||
| 597 | # SCSI Transports | ||
| 598 | # | ||
| 599 | # CONFIG_SCSI_SPI_ATTRS is not set | ||
| 600 | # CONFIG_SCSI_FC_ATTRS is not set | ||
| 601 | # CONFIG_SCSI_ISCSI_ATTRS is not set | ||
| 602 | # CONFIG_SCSI_SAS_LIBSAS is not set | ||
| 603 | # CONFIG_SCSI_SRP_ATTRS is not set | ||
| 604 | CONFIG_SCSI_LOWLEVEL=y | ||
| 605 | # CONFIG_ISCSI_TCP is not set | ||
| 606 | # CONFIG_SCSI_AHA152X is not set | ||
| 607 | # CONFIG_SCSI_AIC7XXX_OLD is not set | ||
| 608 | # CONFIG_SCSI_ADVANSYS is not set | ||
| 609 | # CONFIG_SCSI_IN2000 is not set | ||
| 610 | # CONFIG_SCSI_DTC3280 is not set | ||
| 611 | # CONFIG_SCSI_FUTURE_DOMAIN is not set | ||
| 612 | # CONFIG_SCSI_GENERIC_NCR5380 is not set | ||
| 613 | # CONFIG_SCSI_GENERIC_NCR5380_MMIO is not set | ||
| 614 | # CONFIG_SCSI_NCR53C406A is not set | ||
| 615 | # CONFIG_SCSI_PAS16 is not set | ||
| 616 | # CONFIG_SCSI_QLOGIC_FAS is not set | ||
| 617 | # CONFIG_SCSI_SYM53C416 is not set | ||
| 618 | # CONFIG_SCSI_T128 is not set | ||
| 619 | # CONFIG_SCSI_DEBUG is not set | ||
| 620 | # CONFIG_SCSI_LOWLEVEL_PCMCIA is not set | ||
| 621 | # CONFIG_SCSI_DH is not set | ||
| 622 | CONFIG_ATA=m | ||
| 623 | # CONFIG_ATA_NONSTANDARD is not set | ||
| 624 | # CONFIG_SATA_PMP is not set | ||
| 625 | CONFIG_ATA_SFF=y | ||
| 626 | # CONFIG_SATA_MV is not set | ||
| 627 | # CONFIG_PATA_LEGACY is not set | ||
| 628 | CONFIG_PATA_PCMCIA=m | ||
| 629 | # CONFIG_PATA_QDI is not set | ||
| 630 | # CONFIG_PATA_WINBOND_VLB is not set | ||
| 631 | # CONFIG_PATA_PLATFORM is not set | ||
| 632 | # CONFIG_MD is not set | ||
| 633 | CONFIG_NETDEVICES=y | ||
| 634 | # CONFIG_DUMMY is not set | ||
| 635 | # CONFIG_BONDING is not set | ||
| 636 | # CONFIG_MACVLAN is not set | ||
| 637 | # CONFIG_EQUALIZER is not set | ||
| 638 | # CONFIG_TUN is not set | ||
| 639 | # CONFIG_VETH is not set | ||
| 640 | # CONFIG_ARCNET is not set | ||
| 641 | # CONFIG_PHYLIB is not set | ||
| 642 | CONFIG_NET_ETHERNET=y | ||
| 643 | CONFIG_MII=y | ||
| 644 | # CONFIG_AX88796 is not set | ||
| 645 | # CONFIG_NET_VENDOR_3COM is not set | ||
| 646 | # CONFIG_NET_VENDOR_SMC is not set | ||
| 647 | CONFIG_SMC91X=y | ||
| 648 | # CONFIG_DM9000 is not set | ||
| 649 | # CONFIG_SMC911X is not set | ||
| 650 | # CONFIG_NET_VENDOR_RACAL is not set | ||
| 651 | # CONFIG_AT1700 is not set | ||
| 652 | # CONFIG_DEPCA is not set | ||
| 653 | # CONFIG_HP100 is not set | ||
| 654 | # CONFIG_NET_ISA is not set | ||
| 655 | # CONFIG_IBM_NEW_EMAC_ZMII is not set | ||
| 656 | # CONFIG_IBM_NEW_EMAC_RGMII is not set | ||
| 657 | # CONFIG_IBM_NEW_EMAC_TAH is not set | ||
| 658 | # CONFIG_IBM_NEW_EMAC_EMAC4 is not set | ||
| 659 | # CONFIG_NET_PCI is not set | ||
| 660 | # CONFIG_B44 is not set | ||
| 661 | # CONFIG_NETDEV_1000 is not set | ||
| 662 | # CONFIG_NETDEV_10000 is not set | ||
| 663 | # CONFIG_TR is not set | ||
| 664 | |||
| 665 | # | ||
| 666 | # Wireless LAN | ||
| 667 | # | ||
| 668 | # CONFIG_WLAN_PRE80211 is not set | ||
| 669 | # CONFIG_WLAN_80211 is not set | ||
| 670 | # CONFIG_IWLWIFI_LEDS is not set | ||
| 671 | |||
| 672 | # | ||
| 673 | # USB Network Adapters | ||
| 674 | # | ||
| 675 | # CONFIG_USB_CATC is not set | ||
| 676 | # CONFIG_USB_KAWETH is not set | ||
| 677 | CONFIG_USB_PEGASUS=m | ||
| 678 | # CONFIG_USB_RTL8150 is not set | ||
| 679 | CONFIG_USB_USBNET=m | ||
| 680 | CONFIG_USB_NET_AX8817X=m | ||
| 681 | CONFIG_USB_NET_CDCETHER=m | ||
| 682 | # CONFIG_USB_NET_DM9601 is not set | ||
| 683 | # CONFIG_USB_NET_GL620A is not set | ||
| 684 | CONFIG_USB_NET_NET1080=m | ||
| 685 | # CONFIG_USB_NET_PLUSB is not set | ||
| 686 | # CONFIG_USB_NET_MCS7830 is not set | ||
| 687 | # CONFIG_USB_NET_RNDIS_HOST is not set | ||
| 688 | # CONFIG_USB_NET_CDC_SUBSET is not set | ||
| 689 | CONFIG_USB_NET_ZAURUS=m | ||
| 690 | CONFIG_NET_PCMCIA=y | ||
| 691 | # CONFIG_PCMCIA_3C589 is not set | ||
| 692 | # CONFIG_PCMCIA_3C574 is not set | ||
| 693 | # CONFIG_PCMCIA_FMVJ18X is not set | ||
| 694 | # CONFIG_PCMCIA_PCNET is not set | ||
| 695 | # CONFIG_PCMCIA_NMCLAN is not set | ||
| 696 | # CONFIG_PCMCIA_SMC91C92 is not set | ||
| 697 | # CONFIG_PCMCIA_XIRC2PS is not set | ||
| 698 | # CONFIG_PCMCIA_AXNET is not set | ||
| 699 | # CONFIG_WAN is not set | ||
| 700 | CONFIG_PPP=m | ||
| 701 | # CONFIG_PPP_MULTILINK is not set | ||
| 702 | # CONFIG_PPP_FILTER is not set | ||
| 703 | CONFIG_PPP_ASYNC=m | ||
| 704 | # CONFIG_PPP_SYNC_TTY is not set | ||
| 705 | CONFIG_PPP_DEFLATE=m | ||
| 706 | CONFIG_PPP_BSDCOMP=m | ||
| 707 | # CONFIG_PPP_MPPE is not set | ||
| 708 | # CONFIG_PPPOE is not set | ||
| 709 | # CONFIG_PPPOL2TP is not set | ||
| 710 | # CONFIG_SLIP is not set | ||
| 711 | CONFIG_SLHC=m | ||
| 712 | # CONFIG_NETCONSOLE is not set | ||
| 713 | # CONFIG_NETPOLL is not set | ||
| 714 | # CONFIG_NET_POLL_CONTROLLER is not set | ||
| 715 | # CONFIG_ISDN is not set | ||
| 716 | |||
| 717 | # | ||
| 718 | # Input device support | ||
| 719 | # | ||
| 720 | CONFIG_INPUT=y | ||
| 721 | # CONFIG_INPUT_FF_MEMLESS is not set | ||
| 722 | # CONFIG_INPUT_POLLDEV is not set | ||
| 723 | |||
| 724 | # | ||
| 725 | # Userland interfaces | ||
| 726 | # | ||
| 727 | CONFIG_INPUT_MOUSEDEV=m | ||
| 728 | # CONFIG_INPUT_MOUSEDEV_PSAUX is not set | ||
| 729 | CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 | ||
| 730 | CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 | ||
| 731 | # CONFIG_INPUT_JOYDEV is not set | ||
| 732 | CONFIG_INPUT_EVDEV=m | ||
| 733 | # CONFIG_INPUT_EVBUG is not set | ||
| 734 | |||
| 735 | # | ||
| 736 | # Input Device Drivers | ||
| 737 | # | ||
| 738 | # CONFIG_INPUT_KEYBOARD is not set | ||
| 739 | # CONFIG_INPUT_MOUSE is not set | ||
| 740 | # CONFIG_INPUT_JOYSTICK is not set | ||
| 741 | # CONFIG_INPUT_TABLET is not set | ||
| 742 | CONFIG_INPUT_TOUCHSCREEN=y | ||
| 743 | CONFIG_TOUCHSCREEN_FUJITSU=m | ||
| 744 | # CONFIG_TOUCHSCREEN_GUNZE is not set | ||
| 745 | CONFIG_TOUCHSCREEN_ELO=m | ||
| 746 | CONFIG_TOUCHSCREEN_MTOUCH=m | ||
| 747 | CONFIG_TOUCHSCREEN_INEXIO=m | ||
| 748 | # CONFIG_TOUCHSCREEN_MK712 is not set | ||
| 749 | CONFIG_TOUCHSCREEN_HTCPEN=m | ||
| 750 | CONFIG_TOUCHSCREEN_PENMOUNT=m | ||
| 751 | CONFIG_TOUCHSCREEN_TOUCHRIGHT=m | ||
| 752 | CONFIG_TOUCHSCREEN_TOUCHWIN=m | ||
| 753 | # CONFIG_TOUCHSCREEN_UCB1400 is not set | ||
| 754 | # CONFIG_TOUCHSCREEN_WM97XX is not set | ||
| 755 | # CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set | ||
| 756 | CONFIG_TOUCHSCREEN_TOUCHIT213=m | ||
| 757 | CONFIG_INPUT_MISC=y | ||
| 758 | # CONFIG_INPUT_ATI_REMOTE is not set | ||
| 759 | # CONFIG_INPUT_ATI_REMOTE2 is not set | ||
| 760 | # CONFIG_INPUT_KEYSPAN_REMOTE is not set | ||
| 761 | # CONFIG_INPUT_POWERMATE is not set | ||
| 762 | # CONFIG_INPUT_YEALINK is not set | ||
| 763 | CONFIG_INPUT_UINPUT=m | ||
| 764 | |||
| 765 | # | ||
| 766 | # Hardware I/O ports | ||
| 767 | # | ||
| 768 | CONFIG_SERIO=y | ||
| 769 | CONFIG_SERIO_SERPORT=y | ||
| 770 | # CONFIG_SERIO_LIBPS2 is not set | ||
| 771 | # CONFIG_SERIO_RAW is not set | ||
| 772 | # CONFIG_GAMEPORT is not set | ||
| 773 | |||
| 774 | # | ||
| 775 | # Character devices | ||
| 776 | # | ||
| 777 | CONFIG_VT=y | ||
| 778 | # CONFIG_CONSOLE_TRANSLATIONS is not set | ||
| 779 | # CONFIG_VT_CONSOLE is not set | ||
| 780 | CONFIG_HW_CONSOLE=y | ||
| 781 | # CONFIG_VT_HW_CONSOLE_BINDING is not set | ||
| 782 | CONFIG_DEVKMEM=y | ||
| 783 | # CONFIG_SERIAL_NONSTANDARD is not set | ||
| 784 | |||
| 785 | # | ||
| 786 | # Serial drivers | ||
| 787 | # | ||
| 788 | CONFIG_SERIAL_8250=m | ||
| 789 | # CONFIG_SERIAL_8250_CS is not set | ||
| 790 | CONFIG_SERIAL_8250_NR_UARTS=5 | ||
| 791 | CONFIG_SERIAL_8250_RUNTIME_UARTS=5 | ||
| 792 | # CONFIG_SERIAL_8250_EXTENDED is not set | ||
| 793 | |||
| 794 | # | ||
| 795 | # Non-8250 serial port support | ||
| 796 | # | ||
| 797 | CONFIG_SERIAL_PXA=y | ||
| 798 | CONFIG_SERIAL_PXA_CONSOLE=y | ||
| 799 | CONFIG_SERIAL_CORE=y | ||
| 800 | CONFIG_SERIAL_CORE_CONSOLE=y | ||
| 801 | CONFIG_UNIX98_PTYS=y | ||
| 802 | # CONFIG_LEGACY_PTYS is not set | ||
| 803 | # CONFIG_IPMI_HANDLER is not set | ||
| 804 | CONFIG_HW_RANDOM=m | ||
| 805 | # CONFIG_NVRAM is not set | ||
| 806 | # CONFIG_DTLK is not set | ||
| 807 | # CONFIG_R3964 is not set | ||
| 808 | |||
| 809 | # | ||
| 810 | # PCMCIA character devices | ||
| 811 | # | ||
| 812 | # CONFIG_SYNCLINK_CS is not set | ||
| 813 | # CONFIG_CARDMAN_4000 is not set | ||
| 814 | # CONFIG_CARDMAN_4040 is not set | ||
| 815 | # CONFIG_IPWIRELESS is not set | ||
| 816 | # CONFIG_RAW_DRIVER is not set | ||
| 817 | # CONFIG_TCG_TPM is not set | ||
| 818 | CONFIG_DEVPORT=y | ||
| 819 | CONFIG_I2C=y | ||
| 820 | CONFIG_I2C_BOARDINFO=y | ||
| 821 | CONFIG_I2C_CHARDEV=y | ||
| 822 | # CONFIG_I2C_HELPER_AUTO is not set | ||
| 823 | |||
| 824 | # | ||
| 825 | # I2C Algorithms | ||
| 826 | # | ||
| 827 | CONFIG_I2C_ALGOBIT=y | ||
| 828 | # CONFIG_I2C_ALGOPCF is not set | ||
| 829 | # CONFIG_I2C_ALGOPCA is not set | ||
| 830 | |||
| 831 | # | ||
| 832 | # I2C Hardware Bus support | ||
| 833 | # | ||
| 834 | |||
| 835 | # | ||
| 836 | # I2C system bus drivers (mostly embedded / system-on-chip) | ||
| 837 | # | ||
| 838 | CONFIG_I2C_GPIO=y | ||
| 839 | # CONFIG_I2C_OCORES is not set | ||
| 840 | CONFIG_I2C_PXA=y | ||
| 841 | # CONFIG_I2C_PXA_SLAVE is not set | ||
| 842 | # CONFIG_I2C_SIMTEC is not set | ||
| 843 | |||
| 844 | # | ||
| 845 | # External I2C/SMBus adapter drivers | ||
| 846 | # | ||
| 847 | # CONFIG_I2C_PARPORT_LIGHT is not set | ||
| 848 | # CONFIG_I2C_TAOS_EVM is not set | ||
| 849 | # CONFIG_I2C_TINY_USB is not set | ||
| 850 | |||
| 851 | # | ||
| 852 | # Other I2C/SMBus bus drivers | ||
| 853 | # | ||
| 854 | # CONFIG_I2C_ELEKTOR is not set | ||
| 855 | # CONFIG_I2C_PCA_ISA is not set | ||
| 856 | # CONFIG_I2C_PCA_PLATFORM is not set | ||
| 857 | # CONFIG_I2C_STUB is not set | ||
| 858 | |||
| 859 | # | ||
| 860 | # Miscellaneous I2C Chip support | ||
| 861 | # | ||
| 862 | # CONFIG_DS1682 is not set | ||
| 863 | # CONFIG_AT24 is not set | ||
| 864 | # CONFIG_SENSORS_EEPROM is not set | ||
| 865 | # CONFIG_SENSORS_PCF8574 is not set | ||
| 866 | # CONFIG_PCF8575 is not set | ||
| 867 | # CONFIG_SENSORS_PCA9539 is not set | ||
| 868 | # CONFIG_SENSORS_PCF8591 is not set | ||
| 869 | # CONFIG_TPS65010 is not set | ||
| 870 | # CONFIG_SENSORS_MAX6875 is not set | ||
| 871 | # CONFIG_SENSORS_TSL2550 is not set | ||
| 872 | # CONFIG_I2C_DEBUG_CORE is not set | ||
| 873 | # CONFIG_I2C_DEBUG_ALGO is not set | ||
| 874 | # CONFIG_I2C_DEBUG_BUS is not set | ||
| 875 | # CONFIG_I2C_DEBUG_CHIP is not set | ||
| 876 | # CONFIG_SPI is not set | ||
| 877 | CONFIG_ARCH_REQUIRE_GPIOLIB=y | ||
| 878 | CONFIG_GPIOLIB=y | ||
| 879 | # CONFIG_DEBUG_GPIO is not set | ||
| 880 | CONFIG_GPIO_SYSFS=y | ||
| 881 | |||
| 882 | # | ||
| 883 | # I2C GPIO expanders: | ||
| 884 | # | ||
| 885 | # CONFIG_GPIO_MAX732X is not set | ||
| 886 | # CONFIG_GPIO_PCA953X is not set | ||
| 887 | # CONFIG_GPIO_PCF857X is not set | ||
| 888 | |||
| 889 | # | ||
| 890 | # PCI GPIO expanders: | ||
| 891 | # | ||
| 892 | |||
| 893 | # | ||
| 894 | # SPI GPIO expanders: | ||
| 895 | # | ||
| 896 | # CONFIG_W1 is not set | ||
| 897 | # CONFIG_POWER_SUPPLY is not set | ||
| 898 | CONFIG_HWMON=y | ||
| 899 | # CONFIG_HWMON_VID is not set | ||
| 900 | # CONFIG_SENSORS_AD7414 is not set | ||
| 901 | # CONFIG_SENSORS_AD7418 is not set | ||
| 902 | # CONFIG_SENSORS_ADM1021 is not set | ||
| 903 | # CONFIG_SENSORS_ADM1025 is not set | ||
| 904 | # CONFIG_SENSORS_ADM1026 is not set | ||
| 905 | # CONFIG_SENSORS_ADM1029 is not set | ||
| 906 | # CONFIG_SENSORS_ADM1031 is not set | ||
| 907 | # CONFIG_SENSORS_ADM9240 is not set | ||
| 908 | # CONFIG_SENSORS_ADT7470 is not set | ||
| 909 | # CONFIG_SENSORS_ADT7473 is not set | ||
| 910 | # CONFIG_SENSORS_ATXP1 is not set | ||
| 911 | # CONFIG_SENSORS_DS1621 is not set | ||
| 912 | # CONFIG_SENSORS_F71805F is not set | ||
| 913 | # CONFIG_SENSORS_F71882FG is not set | ||
| 914 | # CONFIG_SENSORS_F75375S is not set | ||
| 915 | # CONFIG_SENSORS_GL518SM is not set | ||
| 916 | # CONFIG_SENSORS_GL520SM is not set | ||
| 917 | # CONFIG_SENSORS_IT87 is not set | ||
| 918 | # CONFIG_SENSORS_LM63 is not set | ||
| 919 | # CONFIG_SENSORS_LM75 is not set | ||
| 920 | # CONFIG_SENSORS_LM77 is not set | ||
| 921 | # CONFIG_SENSORS_LM78 is not set | ||
| 922 | # CONFIG_SENSORS_LM80 is not set | ||
| 923 | # CONFIG_SENSORS_LM83 is not set | ||
| 924 | # CONFIG_SENSORS_LM85 is not set | ||
| 925 | # CONFIG_SENSORS_LM87 is not set | ||
| 926 | # CONFIG_SENSORS_LM90 is not set | ||
| 927 | # CONFIG_SENSORS_LM92 is not set | ||
| 928 | # CONFIG_SENSORS_LM93 is not set | ||
| 929 | # CONFIG_SENSORS_MAX1619 is not set | ||
| 930 | # CONFIG_SENSORS_MAX6650 is not set | ||
| 931 | # CONFIG_SENSORS_PC87360 is not set | ||
| 932 | # CONFIG_SENSORS_PC87427 is not set | ||
| 933 | # CONFIG_SENSORS_DME1737 is not set | ||
| 934 | # CONFIG_SENSORS_SMSC47M1 is not set | ||
| 935 | # CONFIG_SENSORS_SMSC47M192 is not set | ||
| 936 | # CONFIG_SENSORS_SMSC47B397 is not set | ||
| 937 | # CONFIG_SENSORS_ADS7828 is not set | ||
| 938 | # CONFIG_SENSORS_THMC50 is not set | ||
| 939 | # CONFIG_SENSORS_VT1211 is not set | ||
| 940 | # CONFIG_SENSORS_W83781D is not set | ||
| 941 | # CONFIG_SENSORS_W83791D is not set | ||
| 942 | # CONFIG_SENSORS_W83792D is not set | ||
| 943 | # CONFIG_SENSORS_W83793 is not set | ||
| 944 | # CONFIG_SENSORS_W83L785TS is not set | ||
| 945 | # CONFIG_SENSORS_W83L786NG is not set | ||
| 946 | # CONFIG_SENSORS_W83627HF is not set | ||
| 947 | # CONFIG_SENSORS_W83627EHF is not set | ||
| 948 | # CONFIG_HWMON_DEBUG_CHIP is not set | ||
| 949 | CONFIG_WATCHDOG=y | ||
| 950 | # CONFIG_WATCHDOG_NOWAYOUT is not set | ||
| 951 | |||
| 952 | # | ||
| 953 | # Watchdog Device Drivers | ||
| 954 | # | ||
| 955 | # CONFIG_SOFT_WATCHDOG is not set | ||
| 956 | # CONFIG_SA1100_WATCHDOG is not set | ||
| 957 | |||
| 958 | # | ||
| 959 | # ISA-based Watchdog Cards | ||
| 960 | # | ||
| 961 | # CONFIG_PCWATCHDOG is not set | ||
| 962 | # CONFIG_MIXCOMWD is not set | ||
| 963 | # CONFIG_WDT is not set | ||
| 964 | |||
| 965 | # | ||
| 966 | # USB-based Watchdog Cards | ||
| 967 | # | ||
| 968 | # CONFIG_USBPCWATCHDOG is not set | ||
| 969 | |||
| 970 | # | ||
| 971 | # Sonics Silicon Backplane | ||
| 972 | # | ||
| 973 | CONFIG_SSB_POSSIBLE=y | ||
| 974 | # CONFIG_SSB is not set | ||
| 975 | |||
| 976 | # | ||
| 977 | # Multifunction device drivers | ||
| 978 | # | ||
| 979 | # CONFIG_MFD_CORE is not set | ||
| 980 | # CONFIG_MFD_SM501 is not set | ||
| 981 | # CONFIG_HTC_EGPIO is not set | ||
| 982 | # CONFIG_HTC_PASIC3 is not set | ||
| 983 | # CONFIG_MFD_TMIO is not set | ||
| 984 | # CONFIG_MFD_T7L66XB is not set | ||
| 985 | # CONFIG_MFD_TC6387XB is not set | ||
| 986 | # CONFIG_MFD_TC6393XB is not set | ||
| 987 | |||
| 988 | # | ||
| 989 | # Multimedia devices | ||
| 990 | # | ||
| 991 | |||
| 992 | # | ||
| 993 | # Multimedia core support | ||
| 994 | # | ||
| 995 | # CONFIG_VIDEO_DEV is not set | ||
| 996 | # CONFIG_DVB_CORE is not set | ||
| 997 | # CONFIG_VIDEO_MEDIA is not set | ||
| 998 | |||
| 999 | # | ||
| 1000 | # Multimedia drivers | ||
| 1001 | # | ||
| 1002 | # CONFIG_DAB is not set | ||
| 1003 | |||
| 1004 | # | ||
| 1005 | # Graphics support | ||
| 1006 | # | ||
| 1007 | # CONFIG_VGASTATE is not set | ||
| 1008 | # CONFIG_VIDEO_OUTPUT_CONTROL is not set | ||
| 1009 | CONFIG_FB=y | ||
| 1010 | # CONFIG_FIRMWARE_EDID is not set | ||
| 1011 | # CONFIG_FB_DDC is not set | ||
| 1012 | CONFIG_FB_CFB_FILLRECT=m | ||
| 1013 | CONFIG_FB_CFB_COPYAREA=m | ||
| 1014 | CONFIG_FB_CFB_IMAGEBLIT=m | ||
| 1015 | # CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set | ||
| 1016 | # CONFIG_FB_SYS_FILLRECT is not set | ||
| 1017 | # CONFIG_FB_SYS_COPYAREA is not set | ||
| 1018 | # CONFIG_FB_SYS_IMAGEBLIT is not set | ||
| 1019 | # CONFIG_FB_FOREIGN_ENDIAN is not set | ||
| 1020 | # CONFIG_FB_SYS_FOPS is not set | ||
| 1021 | # CONFIG_FB_SVGALIB is not set | ||
| 1022 | # CONFIG_FB_MACMODES is not set | ||
| 1023 | # CONFIG_FB_BACKLIGHT is not set | ||
| 1024 | # CONFIG_FB_MODE_HELPERS is not set | ||
| 1025 | # CONFIG_FB_TILEBLITTING is not set | ||
| 1026 | |||
| 1027 | # | ||
| 1028 | # Frame buffer hardware drivers | ||
| 1029 | # | ||
| 1030 | # CONFIG_FB_S1D13XXX is not set | ||
| 1031 | CONFIG_FB_PXA=m | ||
| 1032 | # CONFIG_FB_PXA_SMARTPANEL is not set | ||
| 1033 | CONFIG_FB_PXA_PARAMETERS=y | ||
| 1034 | # CONFIG_FB_MBX is not set | ||
| 1035 | # CONFIG_FB_W100 is not set | ||
| 1036 | # CONFIG_FB_AM200EPD is not set | ||
| 1037 | # CONFIG_FB_VIRTUAL is not set | ||
| 1038 | CONFIG_BACKLIGHT_LCD_SUPPORT=y | ||
| 1039 | CONFIG_LCD_CLASS_DEVICE=m | ||
| 1040 | # CONFIG_LCD_ILI9320 is not set | ||
| 1041 | # CONFIG_LCD_PLATFORM is not set | ||
| 1042 | CONFIG_BACKLIGHT_CLASS_DEVICE=m | ||
| 1043 | # CONFIG_BACKLIGHT_CORGI is not set | ||
| 1044 | CONFIG_BACKLIGHT_PWM=m | ||
| 1045 | |||
| 1046 | # | ||
| 1047 | # Display device support | ||
| 1048 | # | ||
| 1049 | # CONFIG_DISPLAY_SUPPORT is not set | ||
| 1050 | |||
| 1051 | # | ||
| 1052 | # Console display driver support | ||
| 1053 | # | ||
| 1054 | # CONFIG_VGA_CONSOLE is not set | ||
| 1055 | # CONFIG_MDA_CONSOLE is not set | ||
| 1056 | CONFIG_DUMMY_CONSOLE=y | ||
| 1057 | CONFIG_FRAMEBUFFER_CONSOLE=m | ||
| 1058 | # CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set | ||
| 1059 | # CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set | ||
| 1060 | # CONFIG_FONTS is not set | ||
| 1061 | CONFIG_FONT_8x8=y | ||
| 1062 | CONFIG_FONT_8x16=y | ||
| 1063 | CONFIG_LOGO=y | ||
| 1064 | CONFIG_LOGO_LINUX_MONO=y | ||
| 1065 | CONFIG_LOGO_LINUX_VGA16=y | ||
| 1066 | CONFIG_LOGO_LINUX_CLUT224=y | ||
| 1067 | CONFIG_SOUND=m | ||
| 1068 | CONFIG_SND=m | ||
| 1069 | CONFIG_SND_TIMER=m | ||
| 1070 | CONFIG_SND_PCM=m | ||
| 1071 | # CONFIG_SND_SEQUENCER is not set | ||
| 1072 | CONFIG_SND_OSSEMUL=y | ||
| 1073 | CONFIG_SND_MIXER_OSS=m | ||
| 1074 | CONFIG_SND_PCM_OSS=m | ||
| 1075 | CONFIG_SND_PCM_OSS_PLUGINS=y | ||
| 1076 | # CONFIG_SND_DYNAMIC_MINORS is not set | ||
| 1077 | CONFIG_SND_SUPPORT_OLD_API=y | ||
| 1078 | CONFIG_SND_VERBOSE_PROCFS=y | ||
| 1079 | # CONFIG_SND_VERBOSE_PRINTK is not set | ||
| 1080 | # CONFIG_SND_DEBUG is not set | ||
| 1081 | CONFIG_SND_VMASTER=y | ||
| 1082 | CONFIG_SND_AC97_CODEC=m | ||
| 1083 | CONFIG_SND_DRIVERS=y | ||
| 1084 | # CONFIG_SND_DUMMY is not set | ||
| 1085 | # CONFIG_SND_MTPAV is not set | ||
| 1086 | # CONFIG_SND_SERIAL_U16550 is not set | ||
| 1087 | # CONFIG_SND_MPU401 is not set | ||
| 1088 | # CONFIG_SND_AC97_POWER_SAVE is not set | ||
| 1089 | CONFIG_SND_ARM=y | ||
| 1090 | CONFIG_SND_PXA2XX_PCM=m | ||
| 1091 | CONFIG_SND_PXA2XX_AC97=m | ||
| 1092 | CONFIG_SND_USB=y | ||
| 1093 | # CONFIG_SND_USB_AUDIO is not set | ||
| 1094 | # CONFIG_SND_USB_CAIAQ is not set | ||
| 1095 | CONFIG_SND_PCMCIA=y | ||
| 1096 | # CONFIG_SND_VXPOCKET is not set | ||
| 1097 | # CONFIG_SND_PDAUDIOCF is not set | ||
| 1098 | # CONFIG_SND_SOC is not set | ||
| 1099 | # CONFIG_SOUND_PRIME is not set | ||
| 1100 | CONFIG_AC97_BUS=m | ||
| 1101 | CONFIG_HID_SUPPORT=y | ||
| 1102 | CONFIG_HID=y | ||
| 1103 | # CONFIG_HID_DEBUG is not set | ||
| 1104 | # CONFIG_HIDRAW is not set | ||
| 1105 | |||
| 1106 | # | ||
| 1107 | # USB Input Devices | ||
| 1108 | # | ||
| 1109 | CONFIG_USB_HID=m | ||
| 1110 | # CONFIG_USB_HIDINPUT_POWERBOOK is not set | ||
| 1111 | # CONFIG_HID_FF is not set | ||
| 1112 | # CONFIG_USB_HIDDEV is not set | ||
| 1113 | |||
| 1114 | # | ||
| 1115 | # USB HID Boot Protocol drivers | ||
| 1116 | # | ||
| 1117 | # CONFIG_USB_KBD is not set | ||
| 1118 | # CONFIG_USB_MOUSE is not set | ||
| 1119 | CONFIG_USB_SUPPORT=y | ||
| 1120 | CONFIG_USB_ARCH_HAS_HCD=y | ||
| 1121 | # CONFIG_USB_ARCH_HAS_OHCI is not set | ||
| 1122 | # CONFIG_USB_ARCH_HAS_EHCI is not set | ||
| 1123 | CONFIG_USB=m | ||
| 1124 | # CONFIG_USB_DEBUG is not set | ||
| 1125 | # CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set | ||
| 1126 | |||
| 1127 | # | ||
| 1128 | # Miscellaneous USB options | ||
| 1129 | # | ||
| 1130 | CONFIG_USB_DEVICEFS=y | ||
| 1131 | CONFIG_USB_DEVICE_CLASS=y | ||
| 1132 | # CONFIG_USB_DYNAMIC_MINORS is not set | ||
| 1133 | CONFIG_USB_SUSPEND=y | ||
| 1134 | # CONFIG_USB_OTG is not set | ||
| 1135 | # CONFIG_USB_OTG_WHITELIST is not set | ||
| 1136 | # CONFIG_USB_OTG_BLACKLIST_HUB is not set | ||
| 1137 | # CONFIG_USB_MON is not set | ||
| 1138 | |||
| 1139 | # | ||
| 1140 | # USB Host Controller Drivers | ||
| 1141 | # | ||
| 1142 | # CONFIG_USB_C67X00_HCD is not set | ||
| 1143 | CONFIG_USB_ISP116X_HCD=m | ||
| 1144 | # CONFIG_USB_ISP1760_HCD is not set | ||
| 1145 | CONFIG_USB_SL811_HCD=m | ||
| 1146 | # CONFIG_USB_SL811_CS is not set | ||
| 1147 | CONFIG_USB_R8A66597_HCD=m | ||
| 1148 | # CONFIG_USB_MUSB_HDRC is not set | ||
| 1149 | # CONFIG_USB_GADGET_MUSB_HDRC is not set | ||
| 1150 | |||
| 1151 | # | ||
| 1152 | # USB Device Class drivers | ||
| 1153 | # | ||
| 1154 | CONFIG_USB_ACM=m | ||
| 1155 | # CONFIG_USB_PRINTER is not set | ||
| 1156 | # CONFIG_USB_WDM is not set | ||
| 1157 | |||
| 1158 | # | ||
| 1159 | # NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' | ||
| 1160 | # | ||
| 1161 | |||
| 1162 | # | ||
| 1163 | # may also be needed; see USB_STORAGE Help for more information | ||
| 1164 | # | ||
| 1165 | CONFIG_USB_STORAGE=m | ||
| 1166 | # CONFIG_USB_STORAGE_DEBUG is not set | ||
| 1167 | # CONFIG_USB_STORAGE_DATAFAB is not set | ||
| 1168 | # CONFIG_USB_STORAGE_FREECOM is not set | ||
| 1169 | # CONFIG_USB_STORAGE_ISD200 is not set | ||
| 1170 | # CONFIG_USB_STORAGE_DPCM is not set | ||
| 1171 | # CONFIG_USB_STORAGE_USBAT is not set | ||
| 1172 | # CONFIG_USB_STORAGE_SDDR09 is not set | ||
| 1173 | # CONFIG_USB_STORAGE_SDDR55 is not set | ||
| 1174 | # CONFIG_USB_STORAGE_JUMPSHOT is not set | ||
| 1175 | # CONFIG_USB_STORAGE_ALAUDA is not set | ||
| 1176 | # CONFIG_USB_STORAGE_ONETOUCH is not set | ||
| 1177 | # CONFIG_USB_STORAGE_KARMA is not set | ||
| 1178 | # CONFIG_USB_STORAGE_SIERRA is not set | ||
| 1179 | # CONFIG_USB_STORAGE_CYPRESS_ATACB is not set | ||
| 1180 | # CONFIG_USB_LIBUSUAL is not set | ||
| 1181 | |||
| 1182 | # | ||
| 1183 | # USB Imaging devices | ||
| 1184 | # | ||
| 1185 | # CONFIG_USB_MDC800 is not set | ||
| 1186 | # CONFIG_USB_MICROTEK is not set | ||
| 1187 | |||
| 1188 | # | ||
| 1189 | # USB port drivers | ||
| 1190 | # | ||
| 1191 | CONFIG_USB_SERIAL=m | ||
| 1192 | # CONFIG_USB_EZUSB is not set | ||
| 1193 | CONFIG_USB_SERIAL_GENERIC=y | ||
| 1194 | # CONFIG_USB_SERIAL_AIRCABLE is not set | ||
| 1195 | # CONFIG_USB_SERIAL_ARK3116 is not set | ||
| 1196 | # CONFIG_USB_SERIAL_BELKIN is not set | ||
| 1197 | # CONFIG_USB_SERIAL_CH341 is not set | ||
| 1198 | # CONFIG_USB_SERIAL_WHITEHEAT is not set | ||
| 1199 | # CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set | ||
| 1200 | # CONFIG_USB_SERIAL_CP2101 is not set | ||
| 1201 | # CONFIG_USB_SERIAL_CYPRESS_M8 is not set | ||
| 1202 | # CONFIG_USB_SERIAL_EMPEG is not set | ||
| 1203 | # CONFIG_USB_SERIAL_FTDI_SIO is not set | ||
| 1204 | # CONFIG_USB_SERIAL_FUNSOFT is not set | ||
| 1205 | # CONFIG_USB_SERIAL_VISOR is not set | ||
| 1206 | # CONFIG_USB_SERIAL_IPAQ is not set | ||
| 1207 | # CONFIG_USB_SERIAL_IR is not set | ||
| 1208 | # CONFIG_USB_SERIAL_EDGEPORT is not set | ||
| 1209 | # CONFIG_USB_SERIAL_EDGEPORT_TI is not set | ||
| 1210 | # CONFIG_USB_SERIAL_GARMIN is not set | ||
| 1211 | # CONFIG_USB_SERIAL_IPW is not set | ||
| 1212 | # CONFIG_USB_SERIAL_IUU is not set | ||
| 1213 | # CONFIG_USB_SERIAL_KEYSPAN_PDA is not set | ||
| 1214 | # CONFIG_USB_SERIAL_KEYSPAN is not set | ||
| 1215 | # CONFIG_USB_SERIAL_KLSI is not set | ||
| 1216 | # CONFIG_USB_SERIAL_KOBIL_SCT is not set | ||
| 1217 | CONFIG_USB_SERIAL_MCT_U232=m | ||
| 1218 | # CONFIG_USB_SERIAL_MOS7720 is not set | ||
| 1219 | # CONFIG_USB_SERIAL_MOS7840 is not set | ||
| 1220 | # CONFIG_USB_SERIAL_MOTOROLA is not set | ||
| 1221 | # CONFIG_USB_SERIAL_NAVMAN is not set | ||
| 1222 | # CONFIG_USB_SERIAL_PL2303 is not set | ||
| 1223 | # CONFIG_USB_SERIAL_OTI6858 is not set | ||
| 1224 | # CONFIG_USB_SERIAL_SPCP8X5 is not set | ||
| 1225 | # CONFIG_USB_SERIAL_HP4X is not set | ||
| 1226 | # CONFIG_USB_SERIAL_SAFE is not set | ||
| 1227 | # CONFIG_USB_SERIAL_SIERRAWIRELESS is not set | ||
| 1228 | # CONFIG_USB_SERIAL_TI is not set | ||
| 1229 | # CONFIG_USB_SERIAL_CYBERJACK is not set | ||
| 1230 | # CONFIG_USB_SERIAL_XIRCOM is not set | ||
| 1231 | # CONFIG_USB_SERIAL_OPTION is not set | ||
| 1232 | # CONFIG_USB_SERIAL_OMNINET is not set | ||
| 1233 | # CONFIG_USB_SERIAL_DEBUG is not set | ||
| 1234 | |||
| 1235 | # | ||
| 1236 | # USB Miscellaneous drivers | ||
| 1237 | # | ||
| 1238 | # CONFIG_USB_EMI62 is not set | ||
| 1239 | # CONFIG_USB_EMI26 is not set | ||
| 1240 | # CONFIG_USB_ADUTUX is not set | ||
| 1241 | # CONFIG_USB_RIO500 is not set | ||
| 1242 | # CONFIG_USB_LEGOTOWER is not set | ||
| 1243 | # CONFIG_USB_LCD is not set | ||
| 1244 | # CONFIG_USB_BERRY_CHARGE is not set | ||
| 1245 | # CONFIG_USB_LED is not set | ||
| 1246 | # CONFIG_USB_CYPRESS_CY7C63 is not set | ||
| 1247 | # CONFIG_USB_CYTHERM is not set | ||
| 1248 | # CONFIG_USB_PHIDGET is not set | ||
| 1249 | # CONFIG_USB_IDMOUSE is not set | ||
| 1250 | # CONFIG_USB_FTDI_ELAN is not set | ||
| 1251 | # CONFIG_USB_APPLEDISPLAY is not set | ||
| 1252 | # CONFIG_USB_LD is not set | ||
| 1253 | # CONFIG_USB_TRANCEVIBRATOR is not set | ||
| 1254 | # CONFIG_USB_IOWARRIOR is not set | ||
| 1255 | # CONFIG_USB_TEST is not set | ||
| 1256 | # CONFIG_USB_ISIGHTFW is not set | ||
| 1257 | CONFIG_USB_GADGET=m | ||
| 1258 | # CONFIG_USB_GADGET_DEBUG is not set | ||
| 1259 | # CONFIG_USB_GADGET_DEBUG_FILES is not set | ||
| 1260 | CONFIG_USB_GADGET_SELECTED=y | ||
| 1261 | # CONFIG_USB_GADGET_AMD5536UDC is not set | ||
| 1262 | # CONFIG_USB_GADGET_ATMEL_USBA is not set | ||
| 1263 | # CONFIG_USB_GADGET_FSL_USB2 is not set | ||
| 1264 | # CONFIG_USB_GADGET_NET2280 is not set | ||
| 1265 | CONFIG_USB_GADGET_PXA25X=y | ||
| 1266 | CONFIG_USB_PXA25X=m | ||
| 1267 | # CONFIG_USB_PXA25X_SMALL is not set | ||
| 1268 | # CONFIG_USB_GADGET_M66592 is not set | ||
| 1269 | # CONFIG_USB_GADGET_PXA27X is not set | ||
| 1270 | # CONFIG_USB_GADGET_GOKU is not set | ||
| 1271 | # CONFIG_USB_GADGET_LH7A40X is not set | ||
| 1272 | # CONFIG_USB_GADGET_OMAP is not set | ||
| 1273 | # CONFIG_USB_GADGET_S3C2410 is not set | ||
| 1274 | # CONFIG_USB_GADGET_AT91 is not set | ||
| 1275 | # CONFIG_USB_GADGET_DUMMY_HCD is not set | ||
| 1276 | # CONFIG_USB_GADGET_DUALSPEED is not set | ||
| 1277 | # CONFIG_USB_ZERO is not set | ||
| 1278 | CONFIG_USB_ETH=m | ||
| 1279 | CONFIG_USB_ETH_RNDIS=y | ||
| 1280 | CONFIG_USB_GADGETFS=m | ||
| 1281 | CONFIG_USB_FILE_STORAGE=m | ||
| 1282 | # CONFIG_USB_FILE_STORAGE_TEST is not set | ||
| 1283 | CONFIG_USB_G_SERIAL=m | ||
| 1284 | # CONFIG_USB_MIDI_GADGET is not set | ||
| 1285 | CONFIG_USB_G_PRINTER=m | ||
| 1286 | # CONFIG_USB_CDC_COMPOSITE is not set | ||
| 1287 | # CONFIG_MMC is not set | ||
| 1288 | # CONFIG_NEW_LEDS is not set | ||
| 1289 | CONFIG_RTC_LIB=y | ||
| 1290 | CONFIG_RTC_CLASS=m | ||
| 1291 | |||
| 1292 | # | ||
| 1293 | # RTC interfaces | ||
| 1294 | # | ||
| 1295 | CONFIG_RTC_INTF_SYSFS=y | ||
| 1296 | CONFIG_RTC_INTF_PROC=y | ||
| 1297 | CONFIG_RTC_INTF_DEV=y | ||
| 1298 | # CONFIG_RTC_INTF_DEV_UIE_EMUL is not set | ||
| 1299 | # CONFIG_RTC_DRV_TEST is not set | ||
| 1300 | |||
| 1301 | # | ||
| 1302 | # I2C RTC drivers | ||
| 1303 | # | ||
| 1304 | CONFIG_RTC_DRV_DS1307=m | ||
| 1305 | # CONFIG_RTC_DRV_DS1374 is not set | ||
| 1306 | # CONFIG_RTC_DRV_DS1672 is not set | ||
| 1307 | # CONFIG_RTC_DRV_MAX6900 is not set | ||
| 1308 | # CONFIG_RTC_DRV_RS5C372 is not set | ||
| 1309 | # CONFIG_RTC_DRV_ISL1208 is not set | ||
| 1310 | # CONFIG_RTC_DRV_X1205 is not set | ||
| 1311 | # CONFIG_RTC_DRV_PCF8563 is not set | ||
| 1312 | # CONFIG_RTC_DRV_PCF8583 is not set | ||
| 1313 | # CONFIG_RTC_DRV_M41T80 is not set | ||
| 1314 | # CONFIG_RTC_DRV_S35390A is not set | ||
| 1315 | # CONFIG_RTC_DRV_FM3130 is not set | ||
| 1316 | |||
| 1317 | # | ||
| 1318 | # SPI RTC drivers | ||
| 1319 | # | ||
| 1320 | |||
| 1321 | # | ||
| 1322 | # Platform RTC drivers | ||
| 1323 | # | ||
| 1324 | # CONFIG_RTC_DRV_CMOS is not set | ||
| 1325 | # CONFIG_RTC_DRV_DS1511 is not set | ||
| 1326 | # CONFIG_RTC_DRV_DS1553 is not set | ||
| 1327 | # CONFIG_RTC_DRV_DS1742 is not set | ||
| 1328 | # CONFIG_RTC_DRV_STK17TA8 is not set | ||
| 1329 | # CONFIG_RTC_DRV_M48T86 is not set | ||
| 1330 | # CONFIG_RTC_DRV_M48T59 is not set | ||
| 1331 | # CONFIG_RTC_DRV_V3020 is not set | ||
| 1332 | |||
| 1333 | # | ||
| 1334 | # on-CPU RTC drivers | ||
| 1335 | # | ||
| 1336 | CONFIG_RTC_DRV_SA1100=m | ||
| 1337 | # CONFIG_DMADEVICES is not set | ||
| 1338 | |||
| 1339 | # | ||
| 1340 | # Voltage and Current regulators | ||
| 1341 | # | ||
| 1342 | # CONFIG_REGULATOR is not set | ||
| 1343 | # CONFIG_REGULATOR_FIXED_VOLTAGE is not set | ||
| 1344 | # CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set | ||
| 1345 | # CONFIG_REGULATOR_BQ24022 is not set | ||
| 1346 | # CONFIG_UIO is not set | ||
| 1347 | |||
| 1348 | # | ||
| 1349 | # File systems | ||
| 1350 | # | ||
| 1351 | CONFIG_EXT2_FS=m | ||
| 1352 | # CONFIG_EXT2_FS_XATTR is not set | ||
| 1353 | # CONFIG_EXT2_FS_XIP is not set | ||
| 1354 | CONFIG_EXT3_FS=m | ||
| 1355 | # CONFIG_EXT3_FS_XATTR is not set | ||
| 1356 | # CONFIG_EXT4DEV_FS is not set | ||
| 1357 | CONFIG_JBD=m | ||
| 1358 | # CONFIG_REISERFS_FS is not set | ||
| 1359 | # CONFIG_JFS_FS is not set | ||
| 1360 | # CONFIG_FS_POSIX_ACL is not set | ||
| 1361 | # CONFIG_XFS_FS is not set | ||
| 1362 | # CONFIG_OCFS2_FS is not set | ||
| 1363 | # CONFIG_DNOTIFY is not set | ||
| 1364 | CONFIG_INOTIFY=y | ||
| 1365 | CONFIG_INOTIFY_USER=y | ||
| 1366 | # CONFIG_QUOTA is not set | ||
| 1367 | # CONFIG_AUTOFS_FS is not set | ||
| 1368 | # CONFIG_AUTOFS4_FS is not set | ||
| 1369 | # CONFIG_FUSE_FS is not set | ||
| 1370 | |||
| 1371 | # | ||
| 1372 | # CD-ROM/DVD Filesystems | ||
| 1373 | # | ||
| 1374 | # CONFIG_ISO9660_FS is not set | ||
| 1375 | # CONFIG_UDF_FS is not set | ||
| 1376 | |||
| 1377 | # | ||
| 1378 | # DOS/FAT/NT Filesystems | ||
| 1379 | # | ||
| 1380 | CONFIG_FAT_FS=m | ||
| 1381 | # CONFIG_MSDOS_FS is not set | ||
| 1382 | CONFIG_VFAT_FS=m | ||
| 1383 | CONFIG_FAT_DEFAULT_CODEPAGE=437 | ||
| 1384 | CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" | ||
| 1385 | # CONFIG_NTFS_FS is not set | ||
| 1386 | |||
| 1387 | # | ||
| 1388 | # Pseudo filesystems | ||
| 1389 | # | ||
| 1390 | CONFIG_PROC_FS=y | ||
| 1391 | CONFIG_PROC_SYSCTL=y | ||
| 1392 | CONFIG_SYSFS=y | ||
| 1393 | CONFIG_TMPFS=y | ||
| 1394 | # CONFIG_TMPFS_POSIX_ACL is not set | ||
| 1395 | # CONFIG_HUGETLB_PAGE is not set | ||
| 1396 | # CONFIG_CONFIGFS_FS is not set | ||
| 1397 | |||
| 1398 | # | ||
| 1399 | # Miscellaneous filesystems | ||
| 1400 | # | ||
| 1401 | # CONFIG_ADFS_FS is not set | ||
| 1402 | # CONFIG_AFFS_FS is not set | ||
| 1403 | # CONFIG_HFS_FS is not set | ||
| 1404 | # CONFIG_HFSPLUS_FS is not set | ||
| 1405 | # CONFIG_BEFS_FS is not set | ||
| 1406 | # CONFIG_BFS_FS is not set | ||
| 1407 | # CONFIG_EFS_FS is not set | ||
| 1408 | CONFIG_JFFS2_FS=y | ||
| 1409 | CONFIG_JFFS2_FS_DEBUG=0 | ||
| 1410 | CONFIG_JFFS2_FS_WRITEBUFFER=y | ||
| 1411 | # CONFIG_JFFS2_FS_WBUF_VERIFY is not set | ||
| 1412 | # CONFIG_JFFS2_SUMMARY is not set | ||
| 1413 | # CONFIG_JFFS2_FS_XATTR is not set | ||
| 1414 | # CONFIG_JFFS2_COMPRESSION_OPTIONS is not set | ||
| 1415 | CONFIG_JFFS2_ZLIB=y | ||
| 1416 | # CONFIG_JFFS2_LZO is not set | ||
| 1417 | CONFIG_JFFS2_RTIME=y | ||
| 1418 | # CONFIG_JFFS2_RUBIN is not set | ||
| 1419 | # CONFIG_CRAMFS is not set | ||
| 1420 | # CONFIG_VXFS_FS is not set | ||
| 1421 | # CONFIG_MINIX_FS is not set | ||
| 1422 | # CONFIG_OMFS_FS is not set | ||
| 1423 | # CONFIG_HPFS_FS is not set | ||
| 1424 | # CONFIG_QNX4FS_FS is not set | ||
| 1425 | # CONFIG_ROMFS_FS is not set | ||
| 1426 | # CONFIG_SYSV_FS is not set | ||
| 1427 | # CONFIG_UFS_FS is not set | ||
| 1428 | CONFIG_NETWORK_FILESYSTEMS=y | ||
| 1429 | CONFIG_NFS_FS=y | ||
| 1430 | CONFIG_NFS_V3=y | ||
| 1431 | # CONFIG_NFS_V3_ACL is not set | ||
| 1432 | # CONFIG_NFS_V4 is not set | ||
| 1433 | CONFIG_ROOT_NFS=y | ||
| 1434 | CONFIG_NFSD=m | ||
| 1435 | CONFIG_NFSD_V3=y | ||
| 1436 | # CONFIG_NFSD_V3_ACL is not set | ||
| 1437 | # CONFIG_NFSD_V4 is not set | ||
| 1438 | CONFIG_LOCKD=y | ||
| 1439 | CONFIG_LOCKD_V4=y | ||
| 1440 | CONFIG_EXPORTFS=m | ||
| 1441 | CONFIG_NFS_COMMON=y | ||
| 1442 | CONFIG_SUNRPC=y | ||
| 1443 | # CONFIG_RPCSEC_GSS_KRB5 is not set | ||
| 1444 | # CONFIG_RPCSEC_GSS_SPKM3 is not set | ||
| 1445 | # CONFIG_SMB_FS is not set | ||
| 1446 | # CONFIG_CIFS is not set | ||
| 1447 | # CONFIG_NCP_FS is not set | ||
| 1448 | # CONFIG_CODA_FS is not set | ||
| 1449 | # CONFIG_AFS_FS is not set | ||
| 1450 | |||
| 1451 | # | ||
| 1452 | # Partition Types | ||
| 1453 | # | ||
| 1454 | CONFIG_PARTITION_ADVANCED=y | ||
| 1455 | # CONFIG_ACORN_PARTITION is not set | ||
| 1456 | # CONFIG_OSF_PARTITION is not set | ||
| 1457 | # CONFIG_AMIGA_PARTITION is not set | ||
| 1458 | # CONFIG_ATARI_PARTITION is not set | ||
| 1459 | # CONFIG_MAC_PARTITION is not set | ||
| 1460 | CONFIG_MSDOS_PARTITION=y | ||
| 1461 | # CONFIG_BSD_DISKLABEL is not set | ||
| 1462 | # CONFIG_MINIX_SUBPARTITION is not set | ||
| 1463 | # CONFIG_SOLARIS_X86_PARTITION is not set | ||
| 1464 | # CONFIG_UNIXWARE_DISKLABEL is not set | ||
| 1465 | # CONFIG_LDM_PARTITION is not set | ||
| 1466 | # CONFIG_SGI_PARTITION is not set | ||
| 1467 | # CONFIG_ULTRIX_PARTITION is not set | ||
| 1468 | # CONFIG_SUN_PARTITION is not set | ||
| 1469 | # CONFIG_KARMA_PARTITION is not set | ||
| 1470 | # CONFIG_EFI_PARTITION is not set | ||
| 1471 | # CONFIG_SYSV68_PARTITION is not set | ||
| 1472 | CONFIG_NLS=m | ||
| 1473 | CONFIG_NLS_DEFAULT="iso8859-1" | ||
| 1474 | CONFIG_NLS_CODEPAGE_437=m | ||
| 1475 | # CONFIG_NLS_CODEPAGE_737 is not set | ||
| 1476 | # CONFIG_NLS_CODEPAGE_775 is not set | ||
| 1477 | CONFIG_NLS_CODEPAGE_850=m | ||
| 1478 | # CONFIG_NLS_CODEPAGE_852 is not set | ||
| 1479 | # CONFIG_NLS_CODEPAGE_855 is not set | ||
| 1480 | # CONFIG_NLS_CODEPAGE_857 is not set | ||
| 1481 | # CONFIG_NLS_CODEPAGE_860 is not set | ||
| 1482 | # CONFIG_NLS_CODEPAGE_861 is not set | ||
| 1483 | # CONFIG_NLS_CODEPAGE_862 is not set | ||
| 1484 | # CONFIG_NLS_CODEPAGE_863 is not set | ||
| 1485 | # CONFIG_NLS_CODEPAGE_864 is not set | ||
| 1486 | # CONFIG_NLS_CODEPAGE_865 is not set | ||
| 1487 | # CONFIG_NLS_CODEPAGE_866 is not set | ||
| 1488 | # CONFIG_NLS_CODEPAGE_869 is not set | ||
| 1489 | # CONFIG_NLS_CODEPAGE_936 is not set | ||
| 1490 | # CONFIG_NLS_CODEPAGE_950 is not set | ||
| 1491 | # CONFIG_NLS_CODEPAGE_932 is not set | ||
| 1492 | # CONFIG_NLS_CODEPAGE_949 is not set | ||
| 1493 | # CONFIG_NLS_CODEPAGE_874 is not set | ||
| 1494 | # CONFIG_NLS_ISO8859_8 is not set | ||
| 1495 | # CONFIG_NLS_CODEPAGE_1250 is not set | ||
| 1496 | # CONFIG_NLS_CODEPAGE_1251 is not set | ||
| 1497 | # CONFIG_NLS_ASCII is not set | ||
| 1498 | CONFIG_NLS_ISO8859_1=m | ||
| 1499 | # CONFIG_NLS_ISO8859_2 is not set | ||
| 1500 | # CONFIG_NLS_ISO8859_3 is not set | ||
| 1501 | # CONFIG_NLS_ISO8859_4 is not set | ||
| 1502 | # CONFIG_NLS_ISO8859_5 is not set | ||
| 1503 | # CONFIG_NLS_ISO8859_6 is not set | ||
| 1504 | # CONFIG_NLS_ISO8859_7 is not set | ||
| 1505 | # CONFIG_NLS_ISO8859_9 is not set | ||
| 1506 | # CONFIG_NLS_ISO8859_13 is not set | ||
| 1507 | # CONFIG_NLS_ISO8859_14 is not set | ||
| 1508 | CONFIG_NLS_ISO8859_15=m | ||
| 1509 | # CONFIG_NLS_KOI8_R is not set | ||
| 1510 | # CONFIG_NLS_KOI8_U is not set | ||
| 1511 | CONFIG_NLS_UTF8=m | ||
| 1512 | # CONFIG_DLM is not set | ||
| 1513 | |||
| 1514 | # | ||
| 1515 | # Kernel hacking | ||
| 1516 | # | ||
| 1517 | # CONFIG_PRINTK_TIME is not set | ||
| 1518 | CONFIG_ENABLE_WARN_DEPRECATED=y | ||
| 1519 | CONFIG_ENABLE_MUST_CHECK=y | ||
| 1520 | CONFIG_FRAME_WARN=1024 | ||
| 1521 | CONFIG_MAGIC_SYSRQ=y | ||
| 1522 | # CONFIG_UNUSED_SYMBOLS is not set | ||
| 1523 | # CONFIG_DEBUG_FS is not set | ||
| 1524 | # CONFIG_HEADERS_CHECK is not set | ||
| 1525 | CONFIG_DEBUG_KERNEL=y | ||
| 1526 | # CONFIG_DEBUG_SHIRQ is not set | ||
| 1527 | CONFIG_DETECT_SOFTLOCKUP=y | ||
| 1528 | # CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set | ||
| 1529 | CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 | ||
| 1530 | CONFIG_SCHED_DEBUG=y | ||
| 1531 | # CONFIG_SCHEDSTATS is not set | ||
| 1532 | # CONFIG_TIMER_STATS is not set | ||
| 1533 | # CONFIG_DEBUG_OBJECTS is not set | ||
| 1534 | # CONFIG_DEBUG_SLAB is not set | ||
| 1535 | # CONFIG_DEBUG_RT_MUTEXES is not set | ||
| 1536 | # CONFIG_RT_MUTEX_TESTER is not set | ||
| 1537 | # CONFIG_DEBUG_SPINLOCK is not set | ||
| 1538 | CONFIG_DEBUG_MUTEXES=y | ||
| 1539 | # CONFIG_DEBUG_LOCK_ALLOC is not set | ||
| 1540 | # CONFIG_PROVE_LOCKING is not set | ||
| 1541 | # CONFIG_LOCK_STAT is not set | ||
| 1542 | # CONFIG_DEBUG_SPINLOCK_SLEEP is not set | ||
| 1543 | # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set | ||
| 1544 | # CONFIG_DEBUG_KOBJECT is not set | ||
| 1545 | CONFIG_DEBUG_BUGVERBOSE=y | ||
| 1546 | # CONFIG_DEBUG_INFO is not set | ||
| 1547 | # CONFIG_DEBUG_VM is not set | ||
| 1548 | # CONFIG_DEBUG_WRITECOUNT is not set | ||
| 1549 | # CONFIG_DEBUG_MEMORY_INIT is not set | ||
| 1550 | # CONFIG_DEBUG_LIST is not set | ||
| 1551 | # CONFIG_DEBUG_SG is not set | ||
| 1552 | CONFIG_FRAME_POINTER=y | ||
| 1553 | # CONFIG_BOOT_PRINTK_DELAY is not set | ||
| 1554 | # CONFIG_RCU_TORTURE_TEST is not set | ||
| 1555 | # CONFIG_BACKTRACE_SELF_TEST is not set | ||
| 1556 | # CONFIG_FAULT_INJECTION is not set | ||
| 1557 | # CONFIG_LATENCYTOP is not set | ||
| 1558 | CONFIG_SYSCTL_SYSCALL_CHECK=y | ||
| 1559 | CONFIG_HAVE_FTRACE=y | ||
| 1560 | CONFIG_HAVE_DYNAMIC_FTRACE=y | ||
| 1561 | # CONFIG_FTRACE is not set | ||
| 1562 | # CONFIG_IRQSOFF_TRACER is not set | ||
| 1563 | # CONFIG_SCHED_TRACER is not set | ||
| 1564 | # CONFIG_CONTEXT_SWITCH_TRACER is not set | ||
| 1565 | # CONFIG_SAMPLES is not set | ||
| 1566 | CONFIG_HAVE_ARCH_KGDB=y | ||
| 1567 | # CONFIG_KGDB is not set | ||
| 1568 | # CONFIG_DEBUG_USER is not set | ||
| 1569 | CONFIG_DEBUG_ERRORS=y | ||
| 1570 | # CONFIG_DEBUG_STACK_USAGE is not set | ||
| 1571 | # CONFIG_DEBUG_LL is not set | ||
| 1572 | |||
| 1573 | # | ||
| 1574 | # Security options | ||
| 1575 | # | ||
| 1576 | # CONFIG_KEYS is not set | ||
| 1577 | # CONFIG_SECURITY is not set | ||
| 1578 | # CONFIG_SECURITY_FILE_CAPABILITIES is not set | ||
| 1579 | CONFIG_CRYPTO=y | ||
| 1580 | |||
| 1581 | # | ||
| 1582 | # Crypto core or helper | ||
| 1583 | # | ||
| 1584 | CONFIG_CRYPTO_ALGAPI=m | ||
| 1585 | CONFIG_CRYPTO_BLKCIPHER=m | ||
| 1586 | CONFIG_CRYPTO_MANAGER=m | ||
| 1587 | # CONFIG_CRYPTO_GF128MUL is not set | ||
| 1588 | # CONFIG_CRYPTO_NULL is not set | ||
| 1589 | # CONFIG_CRYPTO_CRYPTD is not set | ||
| 1590 | # CONFIG_CRYPTO_AUTHENC is not set | ||
| 1591 | # CONFIG_CRYPTO_TEST is not set | ||
| 1592 | |||
| 1593 | # | ||
| 1594 | # Authenticated Encryption with Associated Data | ||
| 1595 | # | ||
| 1596 | # CONFIG_CRYPTO_CCM is not set | ||
| 1597 | # CONFIG_CRYPTO_GCM is not set | ||
| 1598 | # CONFIG_CRYPTO_SEQIV is not set | ||
| 1599 | |||
| 1600 | # | ||
| 1601 | # Block modes | ||
| 1602 | # | ||
| 1603 | # CONFIG_CRYPTO_CBC is not set | ||
| 1604 | # CONFIG_CRYPTO_CTR is not set | ||
| 1605 | # CONFIG_CRYPTO_CTS is not set | ||
| 1606 | CONFIG_CRYPTO_ECB=m | ||
| 1607 | # CONFIG_CRYPTO_LRW is not set | ||
| 1608 | # CONFIG_CRYPTO_PCBC is not set | ||
| 1609 | # CONFIG_CRYPTO_XTS is not set | ||
| 1610 | |||
| 1611 | # | ||
| 1612 | # Hash modes | ||
| 1613 | # | ||
| 1614 | # CONFIG_CRYPTO_HMAC is not set | ||
| 1615 | # CONFIG_CRYPTO_XCBC is not set | ||
| 1616 | |||
| 1617 | # | ||
| 1618 | # Digest | ||
| 1619 | # | ||
| 1620 | # CONFIG_CRYPTO_CRC32C is not set | ||
| 1621 | # CONFIG_CRYPTO_MD4 is not set | ||
| 1622 | # CONFIG_CRYPTO_MD5 is not set | ||
| 1623 | # CONFIG_CRYPTO_MICHAEL_MIC is not set | ||
| 1624 | # CONFIG_CRYPTO_RMD128 is not set | ||
| 1625 | # CONFIG_CRYPTO_RMD160 is not set | ||
| 1626 | # CONFIG_CRYPTO_RMD256 is not set | ||
| 1627 | # CONFIG_CRYPTO_RMD320 is not set | ||
| 1628 | # CONFIG_CRYPTO_SHA1 is not set | ||
| 1629 | # CONFIG_CRYPTO_SHA256 is not set | ||
| 1630 | # CONFIG_CRYPTO_SHA512 is not set | ||
| 1631 | # CONFIG_CRYPTO_TGR192 is not set | ||
| 1632 | # CONFIG_CRYPTO_WP512 is not set | ||
| 1633 | |||
| 1634 | # | ||
| 1635 | # Ciphers | ||
| 1636 | # | ||
| 1637 | # CONFIG_CRYPTO_AES is not set | ||
| 1638 | # CONFIG_CRYPTO_ANUBIS is not set | ||
| 1639 | CONFIG_CRYPTO_ARC4=m | ||
| 1640 | # CONFIG_CRYPTO_BLOWFISH is not set | ||
| 1641 | # CONFIG_CRYPTO_CAMELLIA is not set | ||
| 1642 | # CONFIG_CRYPTO_CAST5 is not set | ||
| 1643 | # CONFIG_CRYPTO_CAST6 is not set | ||
| 1644 | # CONFIG_CRYPTO_DES is not set | ||
| 1645 | # CONFIG_CRYPTO_FCRYPT is not set | ||
| 1646 | # CONFIG_CRYPTO_KHAZAD is not set | ||
| 1647 | # CONFIG_CRYPTO_SALSA20 is not set | ||
| 1648 | # CONFIG_CRYPTO_SEED is not set | ||
| 1649 | # CONFIG_CRYPTO_SERPENT is not set | ||
| 1650 | # CONFIG_CRYPTO_TEA is not set | ||
| 1651 | # CONFIG_CRYPTO_TWOFISH is not set | ||
| 1652 | |||
| 1653 | # | ||
| 1654 | # Compression | ||
| 1655 | # | ||
| 1656 | # CONFIG_CRYPTO_DEFLATE is not set | ||
| 1657 | # CONFIG_CRYPTO_LZO is not set | ||
| 1658 | CONFIG_CRYPTO_HW=y | ||
| 1659 | |||
| 1660 | # | ||
| 1661 | # Library routines | ||
| 1662 | # | ||
| 1663 | CONFIG_BITREVERSE=y | ||
| 1664 | # CONFIG_GENERIC_FIND_FIRST_BIT is not set | ||
| 1665 | # CONFIG_GENERIC_FIND_NEXT_BIT is not set | ||
| 1666 | CONFIG_CRC_CCITT=m | ||
| 1667 | # CONFIG_CRC16 is not set | ||
| 1668 | CONFIG_CRC_T10DIF=m | ||
| 1669 | # CONFIG_CRC_ITU_T is not set | ||
| 1670 | CONFIG_CRC32=y | ||
| 1671 | # CONFIG_CRC7 is not set | ||
| 1672 | # CONFIG_LIBCRC32C is not set | ||
| 1673 | CONFIG_ZLIB_INFLATE=y | ||
| 1674 | CONFIG_ZLIB_DEFLATE=y | ||
| 1675 | CONFIG_PLIST=y | ||
| 1676 | CONFIG_HAS_IOMEM=y | ||
| 1677 | CONFIG_HAS_IOPORT=y | ||
| 1678 | CONFIG_HAS_DMA=y | ||
diff --git a/arch/arm/configs/xm_x270_defconfig b/arch/arm/configs/xm_x2xx_defconfig index aa40d91ce599..f891364deceb 100644 --- a/arch/arm/configs/xm_x270_defconfig +++ b/arch/arm/configs/xm_x2xx_defconfig | |||
| @@ -1,7 +1,7 @@ | |||
| 1 | # | 1 | # |
| 2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
| 3 | # Linux kernel version: 2.6.25 | 3 | # Linux kernel version: 2.6.27-rc8 |
| 4 | # Sun May 11 15:12:52 2008 | 4 | # Sun Oct 5 11:05:36 2008 |
| 5 | # | 5 | # |
| 6 | CONFIG_ARM=y | 6 | CONFIG_ARM=y |
| 7 | CONFIG_SYS_SUPPORTS_APM_EMULATION=y | 7 | CONFIG_SYS_SUPPORTS_APM_EMULATION=y |
| @@ -12,6 +12,7 @@ CONFIG_MMU=y | |||
| 12 | # CONFIG_NO_IOPORT is not set | 12 | # CONFIG_NO_IOPORT is not set |
| 13 | CONFIG_GENERIC_HARDIRQS=y | 13 | CONFIG_GENERIC_HARDIRQS=y |
| 14 | CONFIG_STACKTRACE_SUPPORT=y | 14 | CONFIG_STACKTRACE_SUPPORT=y |
| 15 | CONFIG_HAVE_LATENCYTOP_SUPPORT=y | ||
| 15 | CONFIG_LOCKDEP_SUPPORT=y | 16 | CONFIG_LOCKDEP_SUPPORT=y |
| 16 | CONFIG_TRACE_IRQFLAGS_SUPPORT=y | 17 | CONFIG_TRACE_IRQFLAGS_SUPPORT=y |
| 17 | CONFIG_HARDIRQS_SW_RESEND=y | 18 | CONFIG_HARDIRQS_SW_RESEND=y |
| @@ -24,6 +25,7 @@ CONFIG_GENERIC_CALIBRATE_DELAY=y | |||
| 24 | CONFIG_ARCH_SUPPORTS_AOUT=y | 25 | CONFIG_ARCH_SUPPORTS_AOUT=y |
| 25 | CONFIG_ZONE_DMA=y | 26 | CONFIG_ZONE_DMA=y |
| 26 | CONFIG_ARCH_MTD_XIP=y | 27 | CONFIG_ARCH_MTD_XIP=y |
| 28 | CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y | ||
| 27 | CONFIG_VECTORS_BASE=0xffff0000 | 29 | CONFIG_VECTORS_BASE=0xffff0000 |
| 28 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | 30 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" |
| 29 | 31 | ||
| @@ -62,7 +64,6 @@ CONFIG_SYSCTL=y | |||
| 62 | CONFIG_EMBEDDED=y | 64 | CONFIG_EMBEDDED=y |
| 63 | CONFIG_UID16=y | 65 | CONFIG_UID16=y |
| 64 | CONFIG_SYSCTL_SYSCALL=y | 66 | CONFIG_SYSCTL_SYSCALL=y |
| 65 | CONFIG_SYSCTL_SYSCALL_CHECK=y | ||
| 66 | CONFIG_KALLSYMS=y | 67 | CONFIG_KALLSYMS=y |
| 67 | # CONFIG_KALLSYMS_ALL is not set | 68 | # CONFIG_KALLSYMS_ALL is not set |
| 68 | # CONFIG_KALLSYMS_EXTRA_PASS is not set | 69 | # CONFIG_KALLSYMS_EXTRA_PASS is not set |
| @@ -88,14 +89,21 @@ CONFIG_SLUB=y | |||
| 88 | # CONFIG_MARKERS is not set | 89 | # CONFIG_MARKERS is not set |
| 89 | CONFIG_HAVE_OPROFILE=y | 90 | CONFIG_HAVE_OPROFILE=y |
| 90 | # CONFIG_KPROBES is not set | 91 | # CONFIG_KPROBES is not set |
| 92 | # CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS is not set | ||
| 93 | # CONFIG_HAVE_IOREMAP_PROT is not set | ||
| 91 | CONFIG_HAVE_KPROBES=y | 94 | CONFIG_HAVE_KPROBES=y |
| 92 | CONFIG_HAVE_KRETPROBES=y | 95 | CONFIG_HAVE_KRETPROBES=y |
| 96 | # CONFIG_HAVE_ARCH_TRACEHOOK is not set | ||
| 93 | # CONFIG_HAVE_DMA_ATTRS is not set | 97 | # CONFIG_HAVE_DMA_ATTRS is not set |
| 98 | # CONFIG_USE_GENERIC_SMP_HELPERS is not set | ||
| 99 | CONFIG_HAVE_CLK=y | ||
| 94 | # CONFIG_PROC_PAGE_MONITOR is not set | 100 | # CONFIG_PROC_PAGE_MONITOR is not set |
| 101 | CONFIG_HAVE_GENERIC_DMA_COHERENT=y | ||
| 95 | CONFIG_RT_MUTEXES=y | 102 | CONFIG_RT_MUTEXES=y |
| 96 | # CONFIG_TINY_SHMEM is not set | 103 | # CONFIG_TINY_SHMEM is not set |
| 97 | CONFIG_BASE_SMALL=0 | 104 | CONFIG_BASE_SMALL=0 |
| 98 | CONFIG_MODULES=y | 105 | CONFIG_MODULES=y |
| 106 | # CONFIG_MODULE_FORCE_LOAD is not set | ||
| 99 | CONFIG_MODULE_UNLOAD=y | 107 | CONFIG_MODULE_UNLOAD=y |
| 100 | # CONFIG_MODULE_FORCE_UNLOAD is not set | 108 | # CONFIG_MODULE_FORCE_UNLOAD is not set |
| 101 | # CONFIG_MODVERSIONS is not set | 109 | # CONFIG_MODVERSIONS is not set |
| @@ -106,6 +114,7 @@ CONFIG_BLOCK=y | |||
| 106 | # CONFIG_BLK_DEV_IO_TRACE is not set | 114 | # CONFIG_BLK_DEV_IO_TRACE is not set |
| 107 | # CONFIG_LSF is not set | 115 | # CONFIG_LSF is not set |
| 108 | # CONFIG_BLK_DEV_BSG is not set | 116 | # CONFIG_BLK_DEV_BSG is not set |
| 117 | # CONFIG_BLK_DEV_INTEGRITY is not set | ||
| 109 | 118 | ||
| 110 | # | 119 | # |
| 111 | # IO Schedulers | 120 | # IO Schedulers |
| @@ -131,7 +140,6 @@ CONFIG_CLASSIC_RCU=y | |||
| 131 | # CONFIG_ARCH_AT91 is not set | 140 | # CONFIG_ARCH_AT91 is not set |
| 132 | # CONFIG_ARCH_CLPS7500 is not set | 141 | # CONFIG_ARCH_CLPS7500 is not set |
| 133 | # CONFIG_ARCH_CLPS711X is not set | 142 | # CONFIG_ARCH_CLPS711X is not set |
| 134 | # CONFIG_ARCH_CO285 is not set | ||
| 135 | # CONFIG_ARCH_EBSA110 is not set | 143 | # CONFIG_ARCH_EBSA110 is not set |
| 136 | # CONFIG_ARCH_EP93XX is not set | 144 | # CONFIG_ARCH_EP93XX is not set |
| 137 | # CONFIG_ARCH_FOOTBRIDGE is not set | 145 | # CONFIG_ARCH_FOOTBRIDGE is not set |
| @@ -145,8 +153,11 @@ CONFIG_CLASSIC_RCU=y | |||
| 145 | # CONFIG_ARCH_IXP2000 is not set | 153 | # CONFIG_ARCH_IXP2000 is not set |
| 146 | # CONFIG_ARCH_IXP4XX is not set | 154 | # CONFIG_ARCH_IXP4XX is not set |
| 147 | # CONFIG_ARCH_L7200 is not set | 155 | # CONFIG_ARCH_L7200 is not set |
| 156 | # CONFIG_ARCH_KIRKWOOD is not set | ||
| 148 | # CONFIG_ARCH_KS8695 is not set | 157 | # CONFIG_ARCH_KS8695 is not set |
| 149 | # CONFIG_ARCH_NS9XXX is not set | 158 | # CONFIG_ARCH_NS9XXX is not set |
| 159 | # CONFIG_ARCH_LOKI is not set | ||
| 160 | # CONFIG_ARCH_MV78XX0 is not set | ||
| 150 | # CONFIG_ARCH_MXC is not set | 161 | # CONFIG_ARCH_MXC is not set |
| 151 | # CONFIG_ARCH_ORION5X is not set | 162 | # CONFIG_ARCH_ORION5X is not set |
| 152 | # CONFIG_ARCH_PNX4008 is not set | 163 | # CONFIG_ARCH_PNX4008 is not set |
| @@ -164,26 +175,32 @@ CONFIG_DMABOUNCE=y | |||
| 164 | # | 175 | # |
| 165 | # Intel PXA2xx/PXA3xx Implementations | 176 | # Intel PXA2xx/PXA3xx Implementations |
| 166 | # | 177 | # |
| 167 | |||
| 168 | # | ||
| 169 | # Select target boards | ||
| 170 | # | ||
| 171 | # CONFIG_ARCH_GUMSTIX is not set | 178 | # CONFIG_ARCH_GUMSTIX is not set |
| 172 | # CONFIG_ARCH_LUBBOCK is not set | 179 | # CONFIG_ARCH_LUBBOCK is not set |
| 173 | # CONFIG_MACH_LOGICPD_PXA270 is not set | 180 | # CONFIG_MACH_LOGICPD_PXA270 is not set |
| 174 | # CONFIG_MACH_MAINSTONE is not set | 181 | # CONFIG_MACH_MAINSTONE is not set |
| 182 | # CONFIG_MACH_MP900C is not set | ||
| 175 | # CONFIG_ARCH_PXA_IDP is not set | 183 | # CONFIG_ARCH_PXA_IDP is not set |
| 176 | # CONFIG_PXA_SHARPSL is not set | 184 | # CONFIG_PXA_SHARPSL is not set |
| 185 | # CONFIG_ARCH_VIPER is not set | ||
| 177 | # CONFIG_ARCH_PXA_ESERIES is not set | 186 | # CONFIG_ARCH_PXA_ESERIES is not set |
| 178 | # CONFIG_MACH_TRIZEPS4 is not set | 187 | # CONFIG_TRIZEPS_PXA is not set |
| 179 | CONFIG_MACH_EM_X270=y | 188 | CONFIG_MACH_EM_X270=y |
| 180 | # CONFIG_MACH_COLIBRI is not set | 189 | # CONFIG_MACH_COLIBRI is not set |
| 181 | # CONFIG_MACH_ZYLONITE is not set | 190 | # CONFIG_MACH_ZYLONITE is not set |
| 182 | # CONFIG_MACH_LITTLETON is not set | 191 | # CONFIG_MACH_LITTLETON is not set |
| 192 | # CONFIG_MACH_TAVOREVB is not set | ||
| 193 | # CONFIG_MACH_SAAR is not set | ||
| 183 | CONFIG_MACH_ARMCORE=y | 194 | CONFIG_MACH_ARMCORE=y |
| 195 | # CONFIG_MACH_CM_X300 is not set | ||
| 184 | # CONFIG_MACH_MAGICIAN is not set | 196 | # CONFIG_MACH_MAGICIAN is not set |
| 197 | # CONFIG_MACH_MIOA701 is not set | ||
| 185 | # CONFIG_MACH_PCM027 is not set | 198 | # CONFIG_MACH_PCM027 is not set |
| 199 | # CONFIG_ARCH_PXA_PALM is not set | ||
| 200 | # CONFIG_PXA_EZX is not set | ||
| 201 | CONFIG_PXA25x=y | ||
| 186 | CONFIG_PXA27x=y | 202 | CONFIG_PXA27x=y |
| 203 | CONFIG_PXA_SSP=y | ||
| 187 | # CONFIG_PXA_PWM is not set | 204 | # CONFIG_PXA_PWM is not set |
| 188 | 205 | ||
| 189 | # | 206 | # |
| @@ -253,11 +270,17 @@ CONFIG_TICK_ONESHOT=y | |||
| 253 | CONFIG_NO_HZ=y | 270 | CONFIG_NO_HZ=y |
| 254 | # CONFIG_HIGH_RES_TIMERS is not set | 271 | # CONFIG_HIGH_RES_TIMERS is not set |
| 255 | CONFIG_GENERIC_CLOCKEVENTS_BUILD=y | 272 | CONFIG_GENERIC_CLOCKEVENTS_BUILD=y |
| 273 | CONFIG_VMSPLIT_3G=y | ||
| 274 | # CONFIG_VMSPLIT_2G is not set | ||
| 275 | # CONFIG_VMSPLIT_1G is not set | ||
| 276 | CONFIG_PAGE_OFFSET=0xC0000000 | ||
| 256 | # CONFIG_PREEMPT is not set | 277 | # CONFIG_PREEMPT is not set |
| 257 | CONFIG_HZ=100 | 278 | CONFIG_HZ=100 |
| 258 | CONFIG_AEABI=y | 279 | CONFIG_AEABI=y |
| 259 | CONFIG_OABI_COMPAT=y | 280 | CONFIG_OABI_COMPAT=y |
| 260 | # CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set | 281 | CONFIG_ARCH_FLATMEM_HAS_HOLES=y |
| 282 | # CONFIG_ARCH_SPARSEMEM_DEFAULT is not set | ||
| 283 | # CONFIG_ARCH_SELECT_MEMORY_MODEL is not set | ||
| 261 | CONFIG_SELECT_MEMORY_MODEL=y | 284 | CONFIG_SELECT_MEMORY_MODEL=y |
| 262 | CONFIG_FLATMEM_MANUAL=y | 285 | CONFIG_FLATMEM_MANUAL=y |
| 263 | # CONFIG_DISCONTIGMEM_MANUAL is not set | 286 | # CONFIG_DISCONTIGMEM_MANUAL is not set |
| @@ -284,9 +307,10 @@ CONFIG_CMDLINE="root=1f03 mem=32M" | |||
| 284 | # CONFIG_KEXEC is not set | 307 | # CONFIG_KEXEC is not set |
| 285 | 308 | ||
| 286 | # | 309 | # |
| 287 | # CPU Frequency scaling | 310 | # CPU Power Management |
| 288 | # | 311 | # |
| 289 | # CONFIG_CPU_FREQ is not set | 312 | # CONFIG_CPU_FREQ is not set |
| 313 | # CONFIG_CPU_IDLE is not set | ||
| 290 | 314 | ||
| 291 | # | 315 | # |
| 292 | # Floating point emulation | 316 | # Floating point emulation |
| @@ -316,10 +340,6 @@ CONFIG_SUSPEND=y | |||
| 316 | CONFIG_SUSPEND_FREEZER=y | 340 | CONFIG_SUSPEND_FREEZER=y |
| 317 | CONFIG_APM_EMULATION=m | 341 | CONFIG_APM_EMULATION=m |
| 318 | CONFIG_ARCH_SUSPEND_POSSIBLE=y | 342 | CONFIG_ARCH_SUSPEND_POSSIBLE=y |
| 319 | |||
| 320 | # | ||
| 321 | # Networking | ||
| 322 | # | ||
| 323 | CONFIG_NET=y | 343 | CONFIG_NET=y |
| 324 | 344 | ||
| 325 | # | 345 | # |
| @@ -402,6 +422,7 @@ CONFIG_BT_HIDP=m | |||
| 402 | # | 422 | # |
| 403 | CONFIG_BT_HCIUSB=m | 423 | CONFIG_BT_HCIUSB=m |
| 404 | CONFIG_BT_HCIUSB_SCO=y | 424 | CONFIG_BT_HCIUSB_SCO=y |
| 425 | # CONFIG_BT_HCIBTUSB is not set | ||
| 405 | # CONFIG_BT_HCIBTSDIO is not set | 426 | # CONFIG_BT_HCIBTSDIO is not set |
| 406 | # CONFIG_BT_HCIUART is not set | 427 | # CONFIG_BT_HCIUART is not set |
| 407 | # CONFIG_BT_HCIBCM203X is not set | 428 | # CONFIG_BT_HCIBCM203X is not set |
| @@ -419,6 +440,7 @@ CONFIG_BT_HCIUSB_SCO=y | |||
| 419 | # | 440 | # |
| 420 | # CONFIG_CFG80211 is not set | 441 | # CONFIG_CFG80211 is not set |
| 421 | CONFIG_WIRELESS_EXT=y | 442 | CONFIG_WIRELESS_EXT=y |
| 443 | CONFIG_WIRELESS_EXT_SYSFS=y | ||
| 422 | # CONFIG_MAC80211 is not set | 444 | # CONFIG_MAC80211 is not set |
| 423 | # CONFIG_IEEE80211 is not set | 445 | # CONFIG_IEEE80211 is not set |
| 424 | # CONFIG_RFKILL is not set | 446 | # CONFIG_RFKILL is not set |
| @@ -435,6 +457,8 @@ CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | |||
| 435 | CONFIG_STANDALONE=y | 457 | CONFIG_STANDALONE=y |
| 436 | CONFIG_PREVENT_FIRMWARE_BUILD=y | 458 | CONFIG_PREVENT_FIRMWARE_BUILD=y |
| 437 | CONFIG_FW_LOADER=m | 459 | CONFIG_FW_LOADER=m |
| 460 | CONFIG_FIRMWARE_IN_KERNEL=y | ||
| 461 | CONFIG_EXTRA_FIRMWARE="" | ||
| 438 | # CONFIG_DEBUG_DRIVER is not set | 462 | # CONFIG_DEBUG_DRIVER is not set |
| 439 | # CONFIG_DEBUG_DEVRES is not set | 463 | # CONFIG_DEBUG_DEVRES is not set |
| 440 | # CONFIG_SYS_HYPERVISOR is not set | 464 | # CONFIG_SYS_HYPERVISOR is not set |
| @@ -527,6 +551,7 @@ CONFIG_MTD_NAND=y | |||
| 527 | # CONFIG_MTD_NAND_ECC_SMC is not set | 551 | # CONFIG_MTD_NAND_ECC_SMC is not set |
| 528 | # CONFIG_MTD_NAND_MUSEUM_IDS is not set | 552 | # CONFIG_MTD_NAND_MUSEUM_IDS is not set |
| 529 | # CONFIG_MTD_NAND_H1900 is not set | 553 | # CONFIG_MTD_NAND_H1900 is not set |
| 554 | CONFIG_MTD_NAND_GPIO=m | ||
| 530 | CONFIG_MTD_NAND_IDS=y | 555 | CONFIG_MTD_NAND_IDS=y |
| 531 | # CONFIG_MTD_NAND_DISKONCHIP is not set | 556 | # CONFIG_MTD_NAND_DISKONCHIP is not set |
| 532 | # CONFIG_MTD_NAND_SHARPSL is not set | 557 | # CONFIG_MTD_NAND_SHARPSL is not set |
| @@ -636,6 +661,7 @@ CONFIG_SCSI_LOWLEVEL=y | |||
| 636 | # CONFIG_SCSI_DEBUG is not set | 661 | # CONFIG_SCSI_DEBUG is not set |
| 637 | # CONFIG_SCSI_SRP is not set | 662 | # CONFIG_SCSI_SRP is not set |
| 638 | # CONFIG_SCSI_LOWLEVEL_PCMCIA is not set | 663 | # CONFIG_SCSI_LOWLEVEL_PCMCIA is not set |
| 664 | # CONFIG_SCSI_DH is not set | ||
| 639 | CONFIG_ATA=m | 665 | CONFIG_ATA=m |
| 640 | # CONFIG_ATA_NONSTANDARD is not set | 666 | # CONFIG_ATA_NONSTANDARD is not set |
| 641 | # CONFIG_SATA_PMP is not set | 667 | # CONFIG_SATA_PMP is not set |
| @@ -696,17 +722,21 @@ CONFIG_PATA_PCMCIA=m | |||
| 696 | # CONFIG_PATA_VIA is not set | 722 | # CONFIG_PATA_VIA is not set |
| 697 | # CONFIG_PATA_WINBOND is not set | 723 | # CONFIG_PATA_WINBOND is not set |
| 698 | # CONFIG_PATA_PLATFORM is not set | 724 | # CONFIG_PATA_PLATFORM is not set |
| 725 | # CONFIG_PATA_SCH is not set | ||
| 699 | # CONFIG_MD is not set | 726 | # CONFIG_MD is not set |
| 700 | # CONFIG_FUSION is not set | 727 | # CONFIG_FUSION is not set |
| 701 | 728 | ||
| 702 | # | 729 | # |
| 703 | # IEEE 1394 (FireWire) support | 730 | # IEEE 1394 (FireWire) support |
| 704 | # | 731 | # |
| 732 | |||
| 733 | # | ||
| 734 | # Enable only one of the two stacks, unless you know what you are doing | ||
| 735 | # | ||
| 705 | # CONFIG_FIREWIRE is not set | 736 | # CONFIG_FIREWIRE is not set |
| 706 | # CONFIG_IEEE1394 is not set | 737 | # CONFIG_IEEE1394 is not set |
| 707 | # CONFIG_I2O is not set | 738 | # CONFIG_I2O is not set |
| 708 | CONFIG_NETDEVICES=y | 739 | CONFIG_NETDEVICES=y |
| 709 | # CONFIG_NETDEVICES_MULTIQUEUE is not set | ||
| 710 | # CONFIG_DUMMY is not set | 740 | # CONFIG_DUMMY is not set |
| 711 | # CONFIG_BONDING is not set | 741 | # CONFIG_BONDING is not set |
| 712 | # CONFIG_MACVLAN is not set | 742 | # CONFIG_MACVLAN is not set |
| @@ -725,6 +755,7 @@ CONFIG_MII=y | |||
| 725 | # CONFIG_SMC91X is not set | 755 | # CONFIG_SMC91X is not set |
| 726 | CONFIG_DM9000=y | 756 | CONFIG_DM9000=y |
| 727 | CONFIG_DM9000_DEBUGLEVEL=1 | 757 | CONFIG_DM9000_DEBUGLEVEL=1 |
| 758 | # CONFIG_DM9000_FORCE_SIMPLE_PHY_POLL is not set | ||
| 728 | # CONFIG_SMC911X is not set | 759 | # CONFIG_SMC911X is not set |
| 729 | # CONFIG_NET_TULIP is not set | 760 | # CONFIG_NET_TULIP is not set |
| 730 | # CONFIG_HP100 is not set | 761 | # CONFIG_HP100 is not set |
| @@ -780,7 +811,6 @@ CONFIG_LIBERTAS_SDIO=m | |||
| 780 | # CONFIG_PRISM54 is not set | 811 | # CONFIG_PRISM54 is not set |
| 781 | # CONFIG_USB_ZD1201 is not set | 812 | # CONFIG_USB_ZD1201 is not set |
| 782 | # CONFIG_USB_NET_RNDIS_WLAN is not set | 813 | # CONFIG_USB_NET_RNDIS_WLAN is not set |
| 783 | # CONFIG_IWLWIFI is not set | ||
| 784 | # CONFIG_IWLWIFI_LEDS is not set | 814 | # CONFIG_IWLWIFI_LEDS is not set |
| 785 | # CONFIG_HOSTAP is not set | 815 | # CONFIG_HOSTAP is not set |
| 786 | 816 | ||
| @@ -853,17 +883,18 @@ CONFIG_INPUT_TOUCHSCREEN=y | |||
| 853 | # CONFIG_TOUCHSCREEN_GUNZE is not set | 883 | # CONFIG_TOUCHSCREEN_GUNZE is not set |
| 854 | # CONFIG_TOUCHSCREEN_ELO is not set | 884 | # CONFIG_TOUCHSCREEN_ELO is not set |
| 855 | # CONFIG_TOUCHSCREEN_MTOUCH is not set | 885 | # CONFIG_TOUCHSCREEN_MTOUCH is not set |
| 886 | # CONFIG_TOUCHSCREEN_INEXIO is not set | ||
| 856 | # CONFIG_TOUCHSCREEN_MK712 is not set | 887 | # CONFIG_TOUCHSCREEN_MK712 is not set |
| 857 | # CONFIG_TOUCHSCREEN_PENMOUNT is not set | 888 | # CONFIG_TOUCHSCREEN_PENMOUNT is not set |
| 858 | # CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set | 889 | # CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set |
| 859 | # CONFIG_TOUCHSCREEN_TOUCHWIN is not set | 890 | # CONFIG_TOUCHSCREEN_TOUCHWIN is not set |
| 860 | CONFIG_TOUCHSCREEN_UCB1400=m | ||
| 861 | CONFIG_TOUCHSCREEN_WM97XX=m | 891 | CONFIG_TOUCHSCREEN_WM97XX=m |
| 862 | # CONFIG_TOUCHSCREEN_WM9705 is not set | 892 | # CONFIG_TOUCHSCREEN_WM9705 is not set |
| 863 | CONFIG_TOUCHSCREEN_WM9712=y | 893 | CONFIG_TOUCHSCREEN_WM9712=y |
| 864 | # CONFIG_TOUCHSCREEN_WM9713 is not set | 894 | # CONFIG_TOUCHSCREEN_WM9713 is not set |
| 865 | # CONFIG_TOUCHSCREEN_WM97XX_MAINSTONE is not set | 895 | # CONFIG_TOUCHSCREEN_WM97XX_MAINSTONE is not set |
| 866 | # CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set | 896 | # CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set |
| 897 | # CONFIG_TOUCHSCREEN_TOUCHIT213 is not set | ||
| 867 | # CONFIG_INPUT_MISC is not set | 898 | # CONFIG_INPUT_MISC is not set |
| 868 | 899 | ||
| 869 | # | 900 | # |
| @@ -880,6 +911,7 @@ CONFIG_SERIO_LIBPS2=y | |||
| 880 | # Character devices | 911 | # Character devices |
| 881 | # | 912 | # |
| 882 | CONFIG_VT=y | 913 | CONFIG_VT=y |
| 914 | CONFIG_CONSOLE_TRANSLATIONS=y | ||
| 883 | CONFIG_VT_CONSOLE=y | 915 | CONFIG_VT_CONSOLE=y |
| 884 | CONFIG_HW_CONSOLE=y | 916 | CONFIG_HW_CONSOLE=y |
| 885 | # CONFIG_VT_HW_CONSOLE_BINDING is not set | 917 | # CONFIG_VT_HW_CONSOLE_BINDING is not set |
| @@ -922,45 +954,66 @@ CONFIG_DEVPORT=y | |||
| 922 | CONFIG_I2C=y | 954 | CONFIG_I2C=y |
| 923 | CONFIG_I2C_BOARDINFO=y | 955 | CONFIG_I2C_BOARDINFO=y |
| 924 | CONFIG_I2C_CHARDEV=m | 956 | CONFIG_I2C_CHARDEV=m |
| 957 | CONFIG_I2C_HELPER_AUTO=y | ||
| 925 | 958 | ||
| 926 | # | 959 | # |
| 927 | # I2C Hardware Bus support | 960 | # I2C Hardware Bus support |
| 928 | # | 961 | # |
| 962 | |||
| 963 | # | ||
| 964 | # PC SMBus host controller drivers | ||
| 965 | # | ||
| 929 | # CONFIG_I2C_ALI1535 is not set | 966 | # CONFIG_I2C_ALI1535 is not set |
| 930 | # CONFIG_I2C_ALI1563 is not set | 967 | # CONFIG_I2C_ALI1563 is not set |
| 931 | # CONFIG_I2C_ALI15X3 is not set | 968 | # CONFIG_I2C_ALI15X3 is not set |
| 932 | # CONFIG_I2C_AMD756 is not set | 969 | # CONFIG_I2C_AMD756 is not set |
| 933 | # CONFIG_I2C_AMD8111 is not set | 970 | # CONFIG_I2C_AMD8111 is not set |
| 934 | # CONFIG_I2C_GPIO is not set | ||
| 935 | # CONFIG_I2C_I801 is not set | 971 | # CONFIG_I2C_I801 is not set |
| 936 | # CONFIG_I2C_I810 is not set | 972 | # CONFIG_I2C_ISCH is not set |
| 937 | CONFIG_I2C_PXA=y | ||
| 938 | # CONFIG_I2C_PXA_SLAVE is not set | ||
| 939 | # CONFIG_I2C_PIIX4 is not set | 973 | # CONFIG_I2C_PIIX4 is not set |
| 940 | # CONFIG_I2C_NFORCE2 is not set | 974 | # CONFIG_I2C_NFORCE2 is not set |
| 941 | # CONFIG_I2C_OCORES is not set | ||
| 942 | # CONFIG_I2C_PARPORT_LIGHT is not set | ||
| 943 | # CONFIG_I2C_PROSAVAGE is not set | ||
| 944 | # CONFIG_I2C_SAVAGE4 is not set | ||
| 945 | # CONFIG_I2C_SIMTEC is not set | ||
| 946 | # CONFIG_I2C_SIS5595 is not set | 975 | # CONFIG_I2C_SIS5595 is not set |
| 947 | # CONFIG_I2C_SIS630 is not set | 976 | # CONFIG_I2C_SIS630 is not set |
| 948 | # CONFIG_I2C_SIS96X is not set | 977 | # CONFIG_I2C_SIS96X is not set |
| 949 | # CONFIG_I2C_TAOS_EVM is not set | ||
| 950 | # CONFIG_I2C_STUB is not set | ||
| 951 | # CONFIG_I2C_TINY_USB is not set | ||
| 952 | # CONFIG_I2C_VIA is not set | 978 | # CONFIG_I2C_VIA is not set |
| 953 | # CONFIG_I2C_VIAPRO is not set | 979 | # CONFIG_I2C_VIAPRO is not set |
| 980 | |||
| 981 | # | ||
| 982 | # I2C system bus drivers (mostly embedded / system-on-chip) | ||
| 983 | # | ||
| 984 | # CONFIG_I2C_GPIO is not set | ||
| 985 | # CONFIG_I2C_OCORES is not set | ||
| 986 | CONFIG_I2C_PXA=y | ||
| 987 | # CONFIG_I2C_PXA_SLAVE is not set | ||
| 988 | # CONFIG_I2C_SIMTEC is not set | ||
| 989 | |||
| 990 | # | ||
| 991 | # External I2C/SMBus adapter drivers | ||
| 992 | # | ||
| 993 | # CONFIG_I2C_PARPORT_LIGHT is not set | ||
| 994 | # CONFIG_I2C_TAOS_EVM is not set | ||
| 995 | # CONFIG_I2C_TINY_USB is not set | ||
| 996 | |||
| 997 | # | ||
| 998 | # Graphics adapter I2C/DDC channel drivers | ||
| 999 | # | ||
| 954 | # CONFIG_I2C_VOODOO3 is not set | 1000 | # CONFIG_I2C_VOODOO3 is not set |
| 1001 | |||
| 1002 | # | ||
| 1003 | # Other I2C/SMBus bus drivers | ||
| 1004 | # | ||
| 955 | # CONFIG_I2C_PCA_PLATFORM is not set | 1005 | # CONFIG_I2C_PCA_PLATFORM is not set |
| 1006 | # CONFIG_I2C_STUB is not set | ||
| 956 | 1007 | ||
| 957 | # | 1008 | # |
| 958 | # Miscellaneous I2C Chip support | 1009 | # Miscellaneous I2C Chip support |
| 959 | # | 1010 | # |
| 960 | # CONFIG_DS1682 is not set | 1011 | # CONFIG_DS1682 is not set |
| 1012 | # CONFIG_AT24 is not set | ||
| 961 | # CONFIG_SENSORS_EEPROM is not set | 1013 | # CONFIG_SENSORS_EEPROM is not set |
| 962 | # CONFIG_SENSORS_PCF8574 is not set | 1014 | # CONFIG_SENSORS_PCF8574 is not set |
| 963 | # CONFIG_PCF8575 is not set | 1015 | # CONFIG_PCF8575 is not set |
| 1016 | # CONFIG_SENSORS_PCA9539 is not set | ||
| 964 | # CONFIG_SENSORS_PCF8591 is not set | 1017 | # CONFIG_SENSORS_PCF8591 is not set |
| 965 | # CONFIG_TPS65010 is not set | 1018 | # CONFIG_TPS65010 is not set |
| 966 | # CONFIG_SENSORS_MAX6875 is not set | 1019 | # CONFIG_SENSORS_MAX6875 is not set |
| @@ -970,25 +1023,31 @@ CONFIG_I2C_PXA=y | |||
| 970 | # CONFIG_I2C_DEBUG_BUS is not set | 1023 | # CONFIG_I2C_DEBUG_BUS is not set |
| 971 | # CONFIG_I2C_DEBUG_CHIP is not set | 1024 | # CONFIG_I2C_DEBUG_CHIP is not set |
| 972 | # CONFIG_SPI is not set | 1025 | # CONFIG_SPI is not set |
| 973 | CONFIG_HAVE_GPIO_LIB=y | 1026 | CONFIG_ARCH_REQUIRE_GPIOLIB=y |
| 974 | 1027 | CONFIG_GPIOLIB=y | |
| 975 | # | ||
| 976 | # GPIO Support | ||
| 977 | # | ||
| 978 | # CONFIG_DEBUG_GPIO is not set | 1028 | # CONFIG_DEBUG_GPIO is not set |
| 1029 | # CONFIG_GPIO_SYSFS is not set | ||
| 979 | 1030 | ||
| 980 | # | 1031 | # |
| 981 | # I2C GPIO expanders: | 1032 | # I2C GPIO expanders: |
| 982 | # | 1033 | # |
| 1034 | # CONFIG_GPIO_MAX732X is not set | ||
| 983 | # CONFIG_GPIO_PCA953X is not set | 1035 | # CONFIG_GPIO_PCA953X is not set |
| 984 | # CONFIG_GPIO_PCF857X is not set | 1036 | # CONFIG_GPIO_PCF857X is not set |
| 985 | 1037 | ||
| 986 | # | 1038 | # |
| 1039 | # PCI GPIO expanders: | ||
| 1040 | # | ||
| 1041 | # CONFIG_GPIO_BT8XX is not set | ||
| 1042 | |||
| 1043 | # | ||
| 987 | # SPI GPIO expanders: | 1044 | # SPI GPIO expanders: |
| 988 | # | 1045 | # |
| 989 | # CONFIG_W1 is not set | 1046 | # CONFIG_W1 is not set |
| 990 | # CONFIG_POWER_SUPPLY is not set | 1047 | # CONFIG_POWER_SUPPLY is not set |
| 991 | # CONFIG_HWMON is not set | 1048 | # CONFIG_HWMON is not set |
| 1049 | # CONFIG_THERMAL is not set | ||
| 1050 | # CONFIG_THERMAL_HWMON is not set | ||
| 992 | # CONFIG_WATCHDOG is not set | 1051 | # CONFIG_WATCHDOG is not set |
| 993 | 1052 | ||
| 994 | # | 1053 | # |
| @@ -1000,10 +1059,16 @@ CONFIG_SSB_POSSIBLE=y | |||
| 1000 | # | 1059 | # |
| 1001 | # Multifunction device drivers | 1060 | # Multifunction device drivers |
| 1002 | # | 1061 | # |
| 1062 | # CONFIG_MFD_CORE is not set | ||
| 1003 | # CONFIG_MFD_SM501 is not set | 1063 | # CONFIG_MFD_SM501 is not set |
| 1004 | # CONFIG_MFD_ASIC3 is not set | 1064 | # CONFIG_MFD_ASIC3 is not set |
| 1005 | # CONFIG_HTC_EGPIO is not set | 1065 | # CONFIG_HTC_EGPIO is not set |
| 1006 | # CONFIG_HTC_PASIC3 is not set | 1066 | # CONFIG_HTC_PASIC3 is not set |
| 1067 | # CONFIG_UCB1400_CORE is not set | ||
| 1068 | # CONFIG_MFD_TMIO is not set | ||
| 1069 | # CONFIG_MFD_T7L66XB is not set | ||
| 1070 | # CONFIG_MFD_TC6387XB is not set | ||
| 1071 | # CONFIG_MFD_TC6393XB is not set | ||
| 1007 | 1072 | ||
| 1008 | # | 1073 | # |
| 1009 | # Multimedia devices | 1074 | # Multimedia devices |
| @@ -1014,6 +1079,7 @@ CONFIG_SSB_POSSIBLE=y | |||
| 1014 | # | 1079 | # |
| 1015 | # CONFIG_VIDEO_DEV is not set | 1080 | # CONFIG_VIDEO_DEV is not set |
| 1016 | # CONFIG_DVB_CORE is not set | 1081 | # CONFIG_DVB_CORE is not set |
| 1082 | # CONFIG_VIDEO_MEDIA is not set | ||
| 1017 | 1083 | ||
| 1018 | # | 1084 | # |
| 1019 | # Multimedia drivers | 1085 | # Multimedia drivers |
| @@ -1038,7 +1104,6 @@ CONFIG_FB_CFB_IMAGEBLIT=y | |||
| 1038 | # CONFIG_FB_SYS_IMAGEBLIT is not set | 1104 | # CONFIG_FB_SYS_IMAGEBLIT is not set |
| 1039 | # CONFIG_FB_FOREIGN_ENDIAN is not set | 1105 | # CONFIG_FB_FOREIGN_ENDIAN is not set |
| 1040 | # CONFIG_FB_SYS_FOPS is not set | 1106 | # CONFIG_FB_SYS_FOPS is not set |
| 1041 | CONFIG_FB_DEFERRED_IO=y | ||
| 1042 | # CONFIG_FB_SVGALIB is not set | 1107 | # CONFIG_FB_SVGALIB is not set |
| 1043 | # CONFIG_FB_MACMODES is not set | 1108 | # CONFIG_FB_MACMODES is not set |
| 1044 | # CONFIG_FB_BACKLIGHT is not set | 1109 | # CONFIG_FB_BACKLIGHT is not set |
| @@ -1071,12 +1136,14 @@ CONFIG_FB_DEFERRED_IO=y | |||
| 1071 | # CONFIG_FB_TRIDENT is not set | 1136 | # CONFIG_FB_TRIDENT is not set |
| 1072 | # CONFIG_FB_ARK is not set | 1137 | # CONFIG_FB_ARK is not set |
| 1073 | # CONFIG_FB_PM3 is not set | 1138 | # CONFIG_FB_PM3 is not set |
| 1139 | # CONFIG_FB_CARMINE is not set | ||
| 1074 | CONFIG_FB_PXA=y | 1140 | CONFIG_FB_PXA=y |
| 1075 | # CONFIG_FB_PXA_SMARTPANEL is not set | 1141 | # CONFIG_FB_PXA_SMARTPANEL is not set |
| 1076 | CONFIG_FB_PXA_PARAMETERS=y | 1142 | CONFIG_FB_PXA_PARAMETERS=y |
| 1077 | CONFIG_FB_MBX=m | 1143 | CONFIG_FB_MBX=m |
| 1078 | # CONFIG_FB_AM200EPD is not set | 1144 | # CONFIG_FB_W100 is not set |
| 1079 | # CONFIG_FB_VIRTUAL is not set | 1145 | # CONFIG_FB_VIRTUAL is not set |
| 1146 | # CONFIG_FB_METRONOME is not set | ||
| 1080 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set | 1147 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set |
| 1081 | 1148 | ||
| 1082 | # | 1149 | # |
| @@ -1099,15 +1166,7 @@ CONFIG_LOGO=y | |||
| 1099 | CONFIG_LOGO_LINUX_MONO=y | 1166 | CONFIG_LOGO_LINUX_MONO=y |
| 1100 | CONFIG_LOGO_LINUX_VGA16=y | 1167 | CONFIG_LOGO_LINUX_VGA16=y |
| 1101 | CONFIG_LOGO_LINUX_CLUT224=y | 1168 | CONFIG_LOGO_LINUX_CLUT224=y |
| 1102 | |||
| 1103 | # | ||
| 1104 | # Sound | ||
| 1105 | # | ||
| 1106 | CONFIG_SOUND=m | 1169 | CONFIG_SOUND=m |
| 1107 | |||
| 1108 | # | ||
| 1109 | # Advanced Linux Sound Architecture | ||
| 1110 | # | ||
| 1111 | CONFIG_SND=m | 1170 | CONFIG_SND=m |
| 1112 | CONFIG_SND_TIMER=m | 1171 | CONFIG_SND_TIMER=m |
| 1113 | CONFIG_SND_PCM=m | 1172 | CONFIG_SND_PCM=m |
| @@ -1121,19 +1180,15 @@ CONFIG_SND_SUPPORT_OLD_API=y | |||
| 1121 | CONFIG_SND_VERBOSE_PROCFS=y | 1180 | CONFIG_SND_VERBOSE_PROCFS=y |
| 1122 | # CONFIG_SND_VERBOSE_PRINTK is not set | 1181 | # CONFIG_SND_VERBOSE_PRINTK is not set |
| 1123 | # CONFIG_SND_DEBUG is not set | 1182 | # CONFIG_SND_DEBUG is not set |
| 1124 | 1183 | CONFIG_SND_VMASTER=y | |
| 1125 | # | ||
| 1126 | # Generic devices | ||
| 1127 | # | ||
| 1128 | CONFIG_SND_AC97_CODEC=m | 1184 | CONFIG_SND_AC97_CODEC=m |
| 1185 | CONFIG_SND_DRIVERS=y | ||
| 1129 | # CONFIG_SND_DUMMY is not set | 1186 | # CONFIG_SND_DUMMY is not set |
| 1130 | # CONFIG_SND_MTPAV is not set | 1187 | # CONFIG_SND_MTPAV is not set |
| 1131 | # CONFIG_SND_SERIAL_U16550 is not set | 1188 | # CONFIG_SND_SERIAL_U16550 is not set |
| 1132 | # CONFIG_SND_MPU401 is not set | 1189 | # CONFIG_SND_MPU401 is not set |
| 1133 | 1190 | # CONFIG_SND_AC97_POWER_SAVE is not set | |
| 1134 | # | 1191 | CONFIG_SND_PCI=y |
| 1135 | # PCI devices | ||
| 1136 | # | ||
| 1137 | # CONFIG_SND_AD1889 is not set | 1192 | # CONFIG_SND_AD1889 is not set |
| 1138 | # CONFIG_SND_ALS300 is not set | 1193 | # CONFIG_SND_ALS300 is not set |
| 1139 | # CONFIG_SND_ALI5451 is not set | 1194 | # CONFIG_SND_ALI5451 is not set |
| @@ -1193,42 +1248,16 @@ CONFIG_SND_AC97_CODEC=m | |||
| 1193 | # CONFIG_SND_VIRTUOSO is not set | 1248 | # CONFIG_SND_VIRTUOSO is not set |
| 1194 | # CONFIG_SND_VX222 is not set | 1249 | # CONFIG_SND_VX222 is not set |
| 1195 | # CONFIG_SND_YMFPCI is not set | 1250 | # CONFIG_SND_YMFPCI is not set |
| 1196 | # CONFIG_SND_AC97_POWER_SAVE is not set | 1251 | CONFIG_SND_ARM=y |
| 1197 | |||
| 1198 | # | ||
| 1199 | # ALSA ARM devices | ||
| 1200 | # | ||
| 1201 | CONFIG_SND_PXA2XX_PCM=m | 1252 | CONFIG_SND_PXA2XX_PCM=m |
| 1202 | CONFIG_SND_PXA2XX_AC97=m | 1253 | CONFIG_SND_PXA2XX_AC97=m |
| 1203 | 1254 | CONFIG_SND_USB=y | |
| 1204 | # | ||
| 1205 | # USB devices | ||
| 1206 | # | ||
| 1207 | # CONFIG_SND_USB_AUDIO is not set | 1255 | # CONFIG_SND_USB_AUDIO is not set |
| 1208 | # CONFIG_SND_USB_CAIAQ is not set | 1256 | # CONFIG_SND_USB_CAIAQ is not set |
| 1209 | 1257 | CONFIG_SND_PCMCIA=y | |
| 1210 | # | ||
| 1211 | # PCMCIA devices | ||
| 1212 | # | ||
| 1213 | # CONFIG_SND_VXPOCKET is not set | 1258 | # CONFIG_SND_VXPOCKET is not set |
| 1214 | # CONFIG_SND_PDAUDIOCF is not set | 1259 | # CONFIG_SND_PDAUDIOCF is not set |
| 1215 | |||
| 1216 | # | ||
| 1217 | # System on Chip audio support | ||
| 1218 | # | ||
| 1219 | # CONFIG_SND_SOC is not set | 1260 | # CONFIG_SND_SOC is not set |
| 1220 | |||
| 1221 | # | ||
| 1222 | # ALSA SoC audio for Freescale SOCs | ||
| 1223 | # | ||
| 1224 | |||
| 1225 | # | ||
| 1226 | # SoC Audio for the Texas Instruments OMAP | ||
| 1227 | # | ||
| 1228 | |||
| 1229 | # | ||
| 1230 | # Open Sound System | ||
| 1231 | # | ||
| 1232 | # CONFIG_SOUND_PRIME is not set | 1261 | # CONFIG_SOUND_PRIME is not set |
| 1233 | CONFIG_AC97_BUS=m | 1262 | CONFIG_AC97_BUS=m |
| 1234 | CONFIG_HID_SUPPORT=y | 1263 | CONFIG_HID_SUPPORT=y |
| @@ -1261,12 +1290,15 @@ CONFIG_USB_DEVICEFS=y | |||
| 1261 | # CONFIG_USB_OTG is not set | 1290 | # CONFIG_USB_OTG is not set |
| 1262 | # CONFIG_USB_OTG_WHITELIST is not set | 1291 | # CONFIG_USB_OTG_WHITELIST is not set |
| 1263 | # CONFIG_USB_OTG_BLACKLIST_HUB is not set | 1292 | # CONFIG_USB_OTG_BLACKLIST_HUB is not set |
| 1293 | CONFIG_USB_MON=y | ||
| 1264 | 1294 | ||
| 1265 | # | 1295 | # |
| 1266 | # USB Host Controller Drivers | 1296 | # USB Host Controller Drivers |
| 1267 | # | 1297 | # |
| 1298 | # CONFIG_USB_C67X00_HCD is not set | ||
| 1268 | # CONFIG_USB_EHCI_HCD is not set | 1299 | # CONFIG_USB_EHCI_HCD is not set |
| 1269 | # CONFIG_USB_ISP116X_HCD is not set | 1300 | # CONFIG_USB_ISP116X_HCD is not set |
| 1301 | # CONFIG_USB_ISP1760_HCD is not set | ||
| 1270 | CONFIG_USB_OHCI_HCD=y | 1302 | CONFIG_USB_OHCI_HCD=y |
| 1271 | # CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set | 1303 | # CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set |
| 1272 | # CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set | 1304 | # CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set |
| @@ -1274,12 +1306,14 @@ CONFIG_USB_OHCI_LITTLE_ENDIAN=y | |||
| 1274 | # CONFIG_USB_UHCI_HCD is not set | 1306 | # CONFIG_USB_UHCI_HCD is not set |
| 1275 | # CONFIG_USB_SL811_HCD is not set | 1307 | # CONFIG_USB_SL811_HCD is not set |
| 1276 | # CONFIG_USB_R8A66597_HCD is not set | 1308 | # CONFIG_USB_R8A66597_HCD is not set |
| 1309 | # CONFIG_USB_MUSB_HDRC is not set | ||
| 1277 | 1310 | ||
| 1278 | # | 1311 | # |
| 1279 | # USB Device Class drivers | 1312 | # USB Device Class drivers |
| 1280 | # | 1313 | # |
| 1281 | # CONFIG_USB_ACM is not set | 1314 | # CONFIG_USB_ACM is not set |
| 1282 | # CONFIG_USB_PRINTER is not set | 1315 | # CONFIG_USB_PRINTER is not set |
| 1316 | # CONFIG_USB_WDM is not set | ||
| 1283 | 1317 | ||
| 1284 | # | 1318 | # |
| 1285 | # NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' | 1319 | # NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' |
| @@ -1309,7 +1343,6 @@ CONFIG_USB_STORAGE=y | |||
| 1309 | # | 1343 | # |
| 1310 | # CONFIG_USB_MDC800 is not set | 1344 | # CONFIG_USB_MDC800 is not set |
| 1311 | # CONFIG_USB_MICROTEK is not set | 1345 | # CONFIG_USB_MICROTEK is not set |
| 1312 | CONFIG_USB_MON=y | ||
| 1313 | 1346 | ||
| 1314 | # | 1347 | # |
| 1315 | # USB port drivers | 1348 | # USB port drivers |
| @@ -1322,7 +1355,6 @@ CONFIG_USB_MON=y | |||
| 1322 | # CONFIG_USB_EMI62 is not set | 1355 | # CONFIG_USB_EMI62 is not set |
| 1323 | # CONFIG_USB_EMI26 is not set | 1356 | # CONFIG_USB_EMI26 is not set |
| 1324 | # CONFIG_USB_ADUTUX is not set | 1357 | # CONFIG_USB_ADUTUX is not set |
| 1325 | # CONFIG_USB_AUERSWALD is not set | ||
| 1326 | # CONFIG_USB_RIO500 is not set | 1358 | # CONFIG_USB_RIO500 is not set |
| 1327 | # CONFIG_USB_LEGOTOWER is not set | 1359 | # CONFIG_USB_LEGOTOWER is not set |
| 1328 | # CONFIG_USB_LCD is not set | 1360 | # CONFIG_USB_LCD is not set |
| @@ -1338,6 +1370,7 @@ CONFIG_USB_MON=y | |||
| 1338 | # CONFIG_USB_TRANCEVIBRATOR is not set | 1370 | # CONFIG_USB_TRANCEVIBRATOR is not set |
| 1339 | # CONFIG_USB_IOWARRIOR is not set | 1371 | # CONFIG_USB_IOWARRIOR is not set |
| 1340 | # CONFIG_USB_TEST is not set | 1372 | # CONFIG_USB_TEST is not set |
| 1373 | # CONFIG_USB_ISIGHTFW is not set | ||
| 1341 | # CONFIG_USB_GADGET is not set | 1374 | # CONFIG_USB_GADGET is not set |
| 1342 | CONFIG_MMC=m | 1375 | CONFIG_MMC=m |
| 1343 | # CONFIG_MMC_DEBUG is not set | 1376 | # CONFIG_MMC_DEBUG is not set |
| @@ -1349,6 +1382,7 @@ CONFIG_MMC=m | |||
| 1349 | CONFIG_MMC_BLOCK=m | 1382 | CONFIG_MMC_BLOCK=m |
| 1350 | CONFIG_MMC_BLOCK_BOUNCE=y | 1383 | CONFIG_MMC_BLOCK_BOUNCE=y |
| 1351 | # CONFIG_SDIO_UART is not set | 1384 | # CONFIG_SDIO_UART is not set |
| 1385 | # CONFIG_MMC_TEST is not set | ||
| 1352 | 1386 | ||
| 1353 | # | 1387 | # |
| 1354 | # MMC/SD Host Controller Drivers | 1388 | # MMC/SD Host Controller Drivers |
| @@ -1356,14 +1390,19 @@ CONFIG_MMC_BLOCK_BOUNCE=y | |||
| 1356 | CONFIG_MMC_PXA=m | 1390 | CONFIG_MMC_PXA=m |
| 1357 | # CONFIG_MMC_SDHCI is not set | 1391 | # CONFIG_MMC_SDHCI is not set |
| 1358 | # CONFIG_MMC_TIFM_SD is not set | 1392 | # CONFIG_MMC_TIFM_SD is not set |
| 1393 | # CONFIG_MMC_SDRICOH_CS is not set | ||
| 1394 | # CONFIG_MEMSTICK is not set | ||
| 1395 | # CONFIG_ACCESSIBILITY is not set | ||
| 1359 | CONFIG_NEW_LEDS=y | 1396 | CONFIG_NEW_LEDS=y |
| 1360 | CONFIG_LEDS_CLASS=y | 1397 | CONFIG_LEDS_CLASS=y |
| 1361 | 1398 | ||
| 1362 | # | 1399 | # |
| 1363 | # LED drivers | 1400 | # LED drivers |
| 1364 | # | 1401 | # |
| 1402 | # CONFIG_LEDS_PCA9532 is not set | ||
| 1365 | # CONFIG_LEDS_GPIO is not set | 1403 | # CONFIG_LEDS_GPIO is not set |
| 1366 | CONFIG_LEDS_CM_X270=y | 1404 | CONFIG_LEDS_CM_X270=y |
| 1405 | # CONFIG_LEDS_PCA955X is not set | ||
| 1367 | 1406 | ||
| 1368 | # | 1407 | # |
| 1369 | # LED Triggers | 1408 | # LED Triggers |
| @@ -1401,6 +1440,7 @@ CONFIG_RTC_INTF_DEV=y | |||
| 1401 | # CONFIG_RTC_DRV_PCF8583 is not set | 1440 | # CONFIG_RTC_DRV_PCF8583 is not set |
| 1402 | # CONFIG_RTC_DRV_M41T80 is not set | 1441 | # CONFIG_RTC_DRV_M41T80 is not set |
| 1403 | # CONFIG_RTC_DRV_S35390A is not set | 1442 | # CONFIG_RTC_DRV_S35390A is not set |
| 1443 | # CONFIG_RTC_DRV_FM3130 is not set | ||
| 1404 | 1444 | ||
| 1405 | # | 1445 | # |
| 1406 | # SPI RTC drivers | 1446 | # SPI RTC drivers |
| @@ -1422,6 +1462,15 @@ CONFIG_RTC_DRV_V3020=y | |||
| 1422 | # on-CPU RTC drivers | 1462 | # on-CPU RTC drivers |
| 1423 | # | 1463 | # |
| 1424 | CONFIG_RTC_DRV_SA1100=y | 1464 | CONFIG_RTC_DRV_SA1100=y |
| 1465 | # CONFIG_DMADEVICES is not set | ||
| 1466 | |||
| 1467 | # | ||
| 1468 | # Voltage and Current regulators | ||
| 1469 | # | ||
| 1470 | # CONFIG_REGULATOR is not set | ||
| 1471 | # CONFIG_REGULATOR_FIXED_VOLTAGE is not set | ||
| 1472 | # CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set | ||
| 1473 | # CONFIG_REGULATOR_BQ24022 is not set | ||
| 1425 | # CONFIG_UIO is not set | 1474 | # CONFIG_UIO is not set |
| 1426 | 1475 | ||
| 1427 | # | 1476 | # |
| @@ -1501,6 +1550,7 @@ CONFIG_JFFS2_RTIME=y | |||
| 1501 | # CONFIG_CRAMFS is not set | 1550 | # CONFIG_CRAMFS is not set |
| 1502 | # CONFIG_VXFS_FS is not set | 1551 | # CONFIG_VXFS_FS is not set |
| 1503 | # CONFIG_MINIX_FS is not set | 1552 | # CONFIG_MINIX_FS is not set |
| 1553 | # CONFIG_OMFS_FS is not set | ||
| 1504 | # CONFIG_HPFS_FS is not set | 1554 | # CONFIG_HPFS_FS is not set |
| 1505 | # CONFIG_QNX4FS_FS is not set | 1555 | # CONFIG_QNX4FS_FS is not set |
| 1506 | # CONFIG_ROMFS_FS is not set | 1556 | # CONFIG_ROMFS_FS is not set |
| @@ -1511,13 +1561,12 @@ CONFIG_NFS_FS=y | |||
| 1511 | CONFIG_NFS_V3=y | 1561 | CONFIG_NFS_V3=y |
| 1512 | # CONFIG_NFS_V3_ACL is not set | 1562 | # CONFIG_NFS_V3_ACL is not set |
| 1513 | # CONFIG_NFS_V4 is not set | 1563 | # CONFIG_NFS_V4 is not set |
| 1514 | # CONFIG_NFSD is not set | ||
| 1515 | CONFIG_ROOT_NFS=y | 1564 | CONFIG_ROOT_NFS=y |
| 1565 | # CONFIG_NFSD is not set | ||
| 1516 | CONFIG_LOCKD=y | 1566 | CONFIG_LOCKD=y |
| 1517 | CONFIG_LOCKD_V4=y | 1567 | CONFIG_LOCKD_V4=y |
| 1518 | CONFIG_NFS_COMMON=y | 1568 | CONFIG_NFS_COMMON=y |
| 1519 | CONFIG_SUNRPC=y | 1569 | CONFIG_SUNRPC=y |
| 1520 | # CONFIG_SUNRPC_BIND34 is not set | ||
| 1521 | # CONFIG_RPCSEC_GSS_KRB5 is not set | 1570 | # CONFIG_RPCSEC_GSS_KRB5 is not set |
| 1522 | # CONFIG_RPCSEC_GSS_SPKM3 is not set | 1571 | # CONFIG_RPCSEC_GSS_SPKM3 is not set |
| 1523 | # CONFIG_SMB_FS is not set | 1572 | # CONFIG_SMB_FS is not set |
| @@ -1626,6 +1675,7 @@ CONFIG_DEBUG_KERNEL=y | |||
| 1626 | # CONFIG_DEBUG_INFO is not set | 1675 | # CONFIG_DEBUG_INFO is not set |
| 1627 | # CONFIG_DEBUG_VM is not set | 1676 | # CONFIG_DEBUG_VM is not set |
| 1628 | # CONFIG_DEBUG_WRITECOUNT is not set | 1677 | # CONFIG_DEBUG_WRITECOUNT is not set |
| 1678 | # CONFIG_DEBUG_MEMORY_INIT is not set | ||
| 1629 | # CONFIG_DEBUG_LIST is not set | 1679 | # CONFIG_DEBUG_LIST is not set |
| 1630 | # CONFIG_DEBUG_SG is not set | 1680 | # CONFIG_DEBUG_SG is not set |
| 1631 | CONFIG_FRAME_POINTER=y | 1681 | CONFIG_FRAME_POINTER=y |
| @@ -1633,7 +1683,17 @@ CONFIG_FRAME_POINTER=y | |||
| 1633 | # CONFIG_RCU_TORTURE_TEST is not set | 1683 | # CONFIG_RCU_TORTURE_TEST is not set |
| 1634 | # CONFIG_BACKTRACE_SELF_TEST is not set | 1684 | # CONFIG_BACKTRACE_SELF_TEST is not set |
| 1635 | # CONFIG_FAULT_INJECTION is not set | 1685 | # CONFIG_FAULT_INJECTION is not set |
| 1686 | # CONFIG_LATENCYTOP is not set | ||
| 1687 | CONFIG_SYSCTL_SYSCALL_CHECK=y | ||
| 1688 | CONFIG_HAVE_FTRACE=y | ||
| 1689 | CONFIG_HAVE_DYNAMIC_FTRACE=y | ||
| 1690 | # CONFIG_FTRACE is not set | ||
| 1691 | # CONFIG_IRQSOFF_TRACER is not set | ||
| 1692 | # CONFIG_SCHED_TRACER is not set | ||
| 1693 | # CONFIG_CONTEXT_SWITCH_TRACER is not set | ||
| 1636 | # CONFIG_SAMPLES is not set | 1694 | # CONFIG_SAMPLES is not set |
| 1695 | CONFIG_HAVE_ARCH_KGDB=y | ||
| 1696 | # CONFIG_KGDB is not set | ||
| 1637 | CONFIG_DEBUG_USER=y | 1697 | CONFIG_DEBUG_USER=y |
| 1638 | CONFIG_DEBUG_ERRORS=y | 1698 | CONFIG_DEBUG_ERRORS=y |
| 1639 | # CONFIG_DEBUG_STACK_USAGE is not set | 1699 | # CONFIG_DEBUG_STACK_USAGE is not set |
| @@ -1689,6 +1749,10 @@ CONFIG_CRYPTO=y | |||
| 1689 | # CONFIG_CRYPTO_MD4 is not set | 1749 | # CONFIG_CRYPTO_MD4 is not set |
| 1690 | # CONFIG_CRYPTO_MD5 is not set | 1750 | # CONFIG_CRYPTO_MD5 is not set |
| 1691 | # CONFIG_CRYPTO_MICHAEL_MIC is not set | 1751 | # CONFIG_CRYPTO_MICHAEL_MIC is not set |
| 1752 | # CONFIG_CRYPTO_RMD128 is not set | ||
| 1753 | # CONFIG_CRYPTO_RMD160 is not set | ||
| 1754 | # CONFIG_CRYPTO_RMD256 is not set | ||
| 1755 | # CONFIG_CRYPTO_RMD320 is not set | ||
| 1692 | # CONFIG_CRYPTO_SHA1 is not set | 1756 | # CONFIG_CRYPTO_SHA1 is not set |
| 1693 | # CONFIG_CRYPTO_SHA256 is not set | 1757 | # CONFIG_CRYPTO_SHA256 is not set |
| 1694 | # CONFIG_CRYPTO_SHA512 is not set | 1758 | # CONFIG_CRYPTO_SHA512 is not set |
| @@ -1729,6 +1793,7 @@ CONFIG_BITREVERSE=y | |||
| 1729 | # CONFIG_GENERIC_FIND_NEXT_BIT is not set | 1793 | # CONFIG_GENERIC_FIND_NEXT_BIT is not set |
| 1730 | CONFIG_CRC_CCITT=m | 1794 | CONFIG_CRC_CCITT=m |
| 1731 | # CONFIG_CRC16 is not set | 1795 | # CONFIG_CRC16 is not set |
| 1796 | # CONFIG_CRC_T10DIF is not set | ||
| 1732 | # CONFIG_CRC_ITU_T is not set | 1797 | # CONFIG_CRC_ITU_T is not set |
| 1733 | CONFIG_CRC32=y | 1798 | CONFIG_CRC32=y |
| 1734 | # CONFIG_CRC7 is not set | 1799 | # CONFIG_CRC7 is not set |
diff --git a/arch/arm/include/asm/mach/udc_pxa2xx.h b/arch/arm/include/asm/mach/udc_pxa2xx.h index 270902c353fd..f3eabf1ecec3 100644 --- a/arch/arm/include/asm/mach/udc_pxa2xx.h +++ b/arch/arm/include/asm/mach/udc_pxa2xx.h | |||
| @@ -18,8 +18,7 @@ struct pxa2xx_udc_mach_info { | |||
| 18 | /* Boards following the design guidelines in the developer's manual, | 18 | /* Boards following the design guidelines in the developer's manual, |
| 19 | * with on-chip GPIOs not Lubbock's weird hardware, can have a sane | 19 | * with on-chip GPIOs not Lubbock's weird hardware, can have a sane |
| 20 | * VBUS IRQ and omit the methods above. Store the GPIO number | 20 | * VBUS IRQ and omit the methods above. Store the GPIO number |
| 21 | * here; for GPIO 0, also mask in one of the pxa_gpio_mode() bits. | 21 | * here. Note that sometimes the signals go through inverters... |
| 22 | * Note that sometimes the signals go through inverters... | ||
| 23 | */ | 22 | */ |
| 24 | bool gpio_vbus_inverted; | 23 | bool gpio_vbus_inverted; |
| 25 | u16 gpio_vbus; /* high == vbus present */ | 24 | u16 gpio_vbus; /* high == vbus present */ |
diff --git a/arch/arm/kernel/ecard.c b/arch/arm/kernel/ecard.c index 7a50575a8d4d..60c079d85355 100644 --- a/arch/arm/kernel/ecard.c +++ b/arch/arm/kernel/ecard.c | |||
| @@ -587,8 +587,7 @@ ecard_irq_handler(unsigned int irq, struct irq_desc *desc) | |||
| 587 | pending = ecard_default_ops.irqpending(ec); | 587 | pending = ecard_default_ops.irqpending(ec); |
| 588 | 588 | ||
| 589 | if (pending) { | 589 | if (pending) { |
| 590 | struct irq_desc *d = irq_desc + ec->irq; | 590 | generic_handle_irq(ec->irq); |
| 591 | desc_handle_irq(ec->irq, d); | ||
| 592 | called ++; | 591 | called ++; |
| 593 | } | 592 | } |
| 594 | } | 593 | } |
| @@ -622,7 +621,6 @@ ecard_irqexp_handler(unsigned int irq, struct irq_desc *desc) | |||
| 622 | ecard_t *ec = slot_to_ecard(slot); | 621 | ecard_t *ec = slot_to_ecard(slot); |
| 623 | 622 | ||
| 624 | if (ec->claimed) { | 623 | if (ec->claimed) { |
| 625 | struct irq_desc *d = irq_desc + ec->irq; | ||
| 626 | /* | 624 | /* |
| 627 | * this ugly code is so that we can operate a | 625 | * this ugly code is so that we can operate a |
| 628 | * prioritorising system: | 626 | * prioritorising system: |
| @@ -635,7 +633,7 @@ ecard_irqexp_handler(unsigned int irq, struct irq_desc *desc) | |||
| 635 | * Serial cards should go in 0/1, ethernet/scsi in 2/3 | 633 | * Serial cards should go in 0/1, ethernet/scsi in 2/3 |
| 636 | * otherwise you will lose serial data at high speeds! | 634 | * otherwise you will lose serial data at high speeds! |
| 637 | */ | 635 | */ |
| 638 | desc_handle_irq(ec->irq, d); | 636 | generic_handle_irq(ec->irq); |
| 639 | } else { | 637 | } else { |
| 640 | printk(KERN_WARNING "card%d: interrupt from unclaimed " | 638 | printk(KERN_WARNING "card%d: interrupt from unclaimed " |
| 641 | "card???\n", slot); | 639 | "card???\n", slot); |
diff --git a/arch/arm/kernel/irq.c b/arch/arm/kernel/irq.c index f88efb135b70..2f3eb795fa6e 100644 --- a/arch/arm/kernel/irq.c +++ b/arch/arm/kernel/irq.c | |||
| @@ -112,18 +112,17 @@ static struct irq_desc bad_irq_desc = { | |||
| 112 | asmlinkage void __exception asm_do_IRQ(unsigned int irq, struct pt_regs *regs) | 112 | asmlinkage void __exception asm_do_IRQ(unsigned int irq, struct pt_regs *regs) |
| 113 | { | 113 | { |
| 114 | struct pt_regs *old_regs = set_irq_regs(regs); | 114 | struct pt_regs *old_regs = set_irq_regs(regs); |
| 115 | struct irq_desc *desc = irq_desc + irq; | 115 | |
| 116 | irq_enter(); | ||
| 116 | 117 | ||
| 117 | /* | 118 | /* |
| 118 | * Some hardware gives randomly wrong interrupts. Rather | 119 | * Some hardware gives randomly wrong interrupts. Rather |
| 119 | * than crashing, do something sensible. | 120 | * than crashing, do something sensible. |
| 120 | */ | 121 | */ |
| 121 | if (irq >= NR_IRQS) | 122 | if (irq >= NR_IRQS) |
| 122 | desc = &bad_irq_desc; | 123 | handle_bad_irq(irq, &bad_irq_desc); |
| 123 | 124 | else | |
| 124 | irq_enter(); | 125 | generic_handle_irq(irq); |
| 125 | |||
| 126 | desc_handle_irq(irq, desc); | ||
| 127 | 126 | ||
| 128 | /* AT91 specific workaround */ | 127 | /* AT91 specific workaround */ |
| 129 | irq_finish(irq); | 128 | irq_finish(irq); |
diff --git a/arch/arm/mach-at91/gpio.c b/arch/arm/mach-at91/gpio.c index 93e0614f2afb..7e5ebb5bdd17 100644 --- a/arch/arm/mach-at91/gpio.c +++ b/arch/arm/mach-at91/gpio.c | |||
| @@ -404,7 +404,6 @@ static void gpio_irq_handler(unsigned irq, struct irq_desc *desc) | |||
| 404 | } | 404 | } |
| 405 | 405 | ||
| 406 | pin = bank->chipbase; | 406 | pin = bank->chipbase; |
| 407 | gpio = &irq_desc[pin]; | ||
| 408 | 407 | ||
| 409 | while (isr) { | 408 | while (isr) { |
| 410 | if (isr & 1) { | 409 | if (isr & 1) { |
| @@ -417,7 +416,7 @@ static void gpio_irq_handler(unsigned irq, struct irq_desc *desc) | |||
| 417 | gpio_irq_mask(pin); | 416 | gpio_irq_mask(pin); |
| 418 | } | 417 | } |
| 419 | else | 418 | else |
| 420 | desc_handle_irq(pin, gpio); | 419 | generic_handle_irq(pin); |
| 421 | } | 420 | } |
| 422 | pin++; | 421 | pin++; |
| 423 | gpio++; | 422 | gpio++; |
diff --git a/arch/arm/mach-davinci/gpio.c b/arch/arm/mach-davinci/gpio.c index c9cb4f09b18f..574cb810a500 100644 --- a/arch/arm/mach-davinci/gpio.c +++ b/arch/arm/mach-davinci/gpio.c | |||
| @@ -201,7 +201,6 @@ gpio_irq_handler(unsigned irq, struct irq_desc *desc) | |||
| 201 | desc->chip->ack(irq); | 201 | desc->chip->ack(irq); |
| 202 | while (1) { | 202 | while (1) { |
| 203 | u32 status; | 203 | u32 status; |
| 204 | struct irq_desc *gpio; | ||
| 205 | int n; | 204 | int n; |
| 206 | int res; | 205 | int res; |
| 207 | 206 | ||
| @@ -215,12 +214,10 @@ gpio_irq_handler(unsigned irq, struct irq_desc *desc) | |||
| 215 | 214 | ||
| 216 | /* now demux them to the right lowlevel handler */ | 215 | /* now demux them to the right lowlevel handler */ |
| 217 | n = (int)get_irq_data(irq); | 216 | n = (int)get_irq_data(irq); |
| 218 | gpio = &irq_desc[n]; | ||
| 219 | while (status) { | 217 | while (status) { |
| 220 | res = ffs(status); | 218 | res = ffs(status); |
| 221 | n += res; | 219 | n += res; |
| 222 | gpio += res; | 220 | generic_handle_irq(n - 1); |
| 223 | desc_handle_irq(n - 1, gpio - 1); | ||
| 224 | status >>= res; | 221 | status >>= res; |
| 225 | } | 222 | } |
| 226 | } | 223 | } |
diff --git a/arch/arm/mach-ep93xx/core.c b/arch/arm/mach-ep93xx/core.c index 7e65d23e14b5..de53f0be71b9 100644 --- a/arch/arm/mach-ep93xx/core.c +++ b/arch/arm/mach-ep93xx/core.c | |||
| @@ -192,8 +192,7 @@ static void ep93xx_gpio_ab_irq_handler(unsigned int irq, struct irq_desc *desc) | |||
| 192 | for (i = 0; i < 8; i++) { | 192 | for (i = 0; i < 8; i++) { |
| 193 | if (status & (1 << i)) { | 193 | if (status & (1 << i)) { |
| 194 | int gpio_irq = gpio_to_irq(EP93XX_GPIO_LINE_A(0)) + i; | 194 | int gpio_irq = gpio_to_irq(EP93XX_GPIO_LINE_A(0)) + i; |
| 195 | desc = irq_desc + gpio_irq; | 195 | generic_handle_irq(gpio_irq); |
| 196 | desc_handle_irq(gpio_irq, desc); | ||
| 197 | } | 196 | } |
| 198 | } | 197 | } |
| 199 | 198 | ||
| @@ -202,7 +201,7 @@ static void ep93xx_gpio_ab_irq_handler(unsigned int irq, struct irq_desc *desc) | |||
| 202 | if (status & (1 << i)) { | 201 | if (status & (1 << i)) { |
| 203 | int gpio_irq = gpio_to_irq(EP93XX_GPIO_LINE_B(0)) + i; | 202 | int gpio_irq = gpio_to_irq(EP93XX_GPIO_LINE_B(0)) + i; |
| 204 | desc = irq_desc + gpio_irq; | 203 | desc = irq_desc + gpio_irq; |
| 205 | desc_handle_irq(gpio_irq, desc); | 204 | generic_handle_irq(gpio_irq); |
| 206 | } | 205 | } |
| 207 | } | 206 | } |
| 208 | } | 207 | } |
| @@ -217,7 +216,7 @@ static void ep93xx_gpio_f_irq_handler(unsigned int irq, struct irq_desc *desc) | |||
| 217 | int port_f_idx = ((irq + 1) & 7) ^ 4; /* {19..22,47..50} -> {0..7} */ | 216 | int port_f_idx = ((irq + 1) & 7) ^ 4; /* {19..22,47..50} -> {0..7} */ |
| 218 | int gpio_irq = gpio_to_irq(EP93XX_GPIO_LINE_F(0)) + port_f_idx; | 217 | int gpio_irq = gpio_to_irq(EP93XX_GPIO_LINE_F(0)) + port_f_idx; |
| 219 | 218 | ||
| 220 | desc_handle_irq(gpio_irq, irq_desc + gpio_irq); | 219 | generic_handle_irq(gpio_irq); |
| 221 | } | 220 | } |
| 222 | 221 | ||
| 223 | static void ep93xx_gpio_irq_ack(unsigned int irq) | 222 | static void ep93xx_gpio_irq_ack(unsigned int irq) |
diff --git a/arch/arm/mach-footbridge/isa-irq.c b/arch/arm/mach-footbridge/isa-irq.c index 62bb38f1369d..54fec9ae28b9 100644 --- a/arch/arm/mach-footbridge/isa-irq.c +++ b/arch/arm/mach-footbridge/isa-irq.c | |||
| @@ -94,8 +94,7 @@ isa_irq_handler(unsigned int irq, struct irq_desc *desc) | |||
| 94 | return; | 94 | return; |
| 95 | } | 95 | } |
| 96 | 96 | ||
| 97 | desc = irq_desc + isa_irq; | 97 | generic_handle_irq(isa_irq); |
| 98 | desc_handle_irq(isa_irq, desc); | ||
| 99 | } | 98 | } |
| 100 | 99 | ||
| 101 | static struct irqaction irq_cascade = { | 100 | static struct irqaction irq_cascade = { |
diff --git a/arch/arm/mach-h720x/common.c b/arch/arm/mach-h720x/common.c index 3a410e3f1e5f..7a2614828217 100644 --- a/arch/arm/mach-h720x/common.c +++ b/arch/arm/mach-h720x/common.c | |||
| @@ -104,14 +104,12 @@ h720x_gpio_handler(unsigned int mask, unsigned int irq, | |||
| 104 | struct irq_desc *desc) | 104 | struct irq_desc *desc) |
| 105 | { | 105 | { |
| 106 | IRQDBG("%s irq: %d\n", __func__, irq); | 106 | IRQDBG("%s irq: %d\n", __func__, irq); |
| 107 | desc = irq_desc + irq; | ||
| 108 | while (mask) { | 107 | while (mask) { |
| 109 | if (mask & 1) { | 108 | if (mask & 1) { |
| 110 | IRQDBG("handling irq %d\n", irq); | 109 | IRQDBG("handling irq %d\n", irq); |
| 111 | desc_handle_irq(irq, desc); | 110 | generic_handle_irq(irq); |
| 112 | } | 111 | } |
| 113 | irq++; | 112 | irq++; |
| 114 | desc++; | ||
| 115 | mask >>= 1; | 113 | mask >>= 1; |
| 116 | } | 114 | } |
| 117 | } | 115 | } |
diff --git a/arch/arm/mach-h720x/cpu-h7202.c b/arch/arm/mach-h720x/cpu-h7202.c index 53e1f62f2e79..fd33a19c813a 100644 --- a/arch/arm/mach-h720x/cpu-h7202.c +++ b/arch/arm/mach-h720x/cpu-h7202.c | |||
| @@ -120,12 +120,10 @@ h7202_timerx_demux_handler(unsigned int irq_unused, struct irq_desc *desc) | |||
| 120 | 120 | ||
| 121 | mask >>= 1; | 121 | mask >>= 1; |
| 122 | irq = IRQ_TIMER1; | 122 | irq = IRQ_TIMER1; |
| 123 | desc = irq_desc + irq; | ||
| 124 | while (mask) { | 123 | while (mask) { |
| 125 | if (mask & 1) | 124 | if (mask & 1) |
| 126 | desc_handle_irq(irq, desc); | 125 | generic_handle_irq(irq); |
| 127 | irq++; | 126 | irq++; |
| 128 | desc++; | ||
| 129 | mask >>= 1; | 127 | mask >>= 1; |
| 130 | } | 128 | } |
| 131 | } | 129 | } |
diff --git a/arch/arm/mach-imx/irq.c b/arch/arm/mach-imx/irq.c index 2ce75625b417..232e3b9f880d 100644 --- a/arch/arm/mach-imx/irq.c +++ b/arch/arm/mach-imx/irq.c | |||
| @@ -182,14 +182,12 @@ static void | |||
| 182 | imx_gpio_handler(unsigned int mask, unsigned int irq, | 182 | imx_gpio_handler(unsigned int mask, unsigned int irq, |
| 183 | struct irq_desc *desc) | 183 | struct irq_desc *desc) |
| 184 | { | 184 | { |
| 185 | desc = irq_desc + irq; | ||
| 186 | while (mask) { | 185 | while (mask) { |
| 187 | if (mask & 1) { | 186 | if (mask & 1) { |
| 188 | DEBUG_IRQ("handling irq %d\n", irq); | 187 | DEBUG_IRQ("handling irq %d\n", irq); |
| 189 | desc_handle_irq(irq, desc); | 188 | generic_handle_irq(irq); |
| 190 | } | 189 | } |
| 191 | irq++; | 190 | irq++; |
| 192 | desc++; | ||
| 193 | mask >>= 1; | 191 | mask >>= 1; |
| 194 | } | 192 | } |
| 195 | } | 193 | } |
diff --git a/arch/arm/mach-integrator/integrator_cp.c b/arch/arm/mach-integrator/integrator_cp.c index c0eaf0a6f453..88026ccd5ac9 100644 --- a/arch/arm/mach-integrator/integrator_cp.c +++ b/arch/arm/mach-integrator/integrator_cp.c | |||
| @@ -217,8 +217,7 @@ sic_handle_irq(unsigned int irq, struct irq_desc *desc) | |||
| 217 | 217 | ||
| 218 | irq += IRQ_SIC_START; | 218 | irq += IRQ_SIC_START; |
| 219 | 219 | ||
| 220 | desc = irq_desc + irq; | 220 | generic_handle_irq(irq); |
| 221 | desc_handle_irq(irq, desc); | ||
| 222 | } while (status); | 221 | } while (status); |
| 223 | } | 222 | } |
| 224 | 223 | ||
diff --git a/arch/arm/mach-iop13xx/msi.c b/arch/arm/mach-iop13xx/msi.c index 63ef1124ca5c..f34b0ed80630 100644 --- a/arch/arm/mach-iop13xx/msi.c +++ b/arch/arm/mach-iop13xx/msi.c | |||
| @@ -110,8 +110,7 @@ static void iop13xx_msi_handler(unsigned int irq, struct irq_desc *desc) | |||
| 110 | do { | 110 | do { |
| 111 | j = find_first_bit(&status, 32); | 111 | j = find_first_bit(&status, 32); |
| 112 | (write_imipr[i])(1 << j); /* write back to clear bit */ | 112 | (write_imipr[i])(1 << j); /* write back to clear bit */ |
| 113 | desc = irq_desc + IRQ_IOP13XX_MSI_0 + j + (32*i); | 113 | generic_handle_irq(IRQ_IOP13XX_MSI_0 + j + (32*i)); |
| 114 | desc_handle_irq(IRQ_IOP13XX_MSI_0 + j + (32*i), desc); | ||
| 115 | status = (read_imipr[i])(); | 114 | status = (read_imipr[i])(); |
| 116 | } while (status); | 115 | } while (status); |
| 117 | } | 116 | } |
diff --git a/arch/arm/mach-ixp2000/core.c b/arch/arm/mach-ixp2000/core.c index 628063ca31e6..babb22597163 100644 --- a/arch/arm/mach-ixp2000/core.c +++ b/arch/arm/mach-ixp2000/core.c | |||
| @@ -304,8 +304,7 @@ static void ixp2000_GPIO_irq_handler(unsigned int irq, struct irq_desc *desc) | |||
| 304 | 304 | ||
| 305 | for (i = 0; i <= 7; i++) { | 305 | for (i = 0; i <= 7; i++) { |
| 306 | if (status & (1<<i)) { | 306 | if (status & (1<<i)) { |
| 307 | desc = irq_desc + i + IRQ_IXP2000_GPIO0; | 307 | generic_handle_irq(i + IRQ_IXP2000_GPIO0); |
| 308 | desc_handle_irq(i + IRQ_IXP2000_GPIO0, desc); | ||
| 309 | } | 308 | } |
| 310 | } | 309 | } |
| 311 | } | 310 | } |
| @@ -397,8 +396,7 @@ static void ixp2000_err_irq_handler(unsigned int irq, struct irq_desc *desc) | |||
| 397 | 396 | ||
| 398 | for(i = 31; i >= 0; i--) { | 397 | for(i = 31; i >= 0; i--) { |
| 399 | if(status & (1 << i)) { | 398 | if(status & (1 << i)) { |
| 400 | desc = irq_desc + IRQ_IXP2000_DRAM0_MIN_ERR + i; | 399 | generic_handle_irq(IRQ_IXP2000_DRAM0_MIN_ERR + i); |
| 401 | desc_handle_irq(IRQ_IXP2000_DRAM0_MIN_ERR + i, desc); | ||
| 402 | } | 400 | } |
| 403 | } | 401 | } |
| 404 | } | 402 | } |
diff --git a/arch/arm/mach-ixp2000/ixdp2x00.c b/arch/arm/mach-ixp2000/ixdp2x00.c index 4debb9ff056c..b0653a87159a 100644 --- a/arch/arm/mach-ixp2000/ixdp2x00.c +++ b/arch/arm/mach-ixp2000/ixdp2x00.c | |||
| @@ -129,10 +129,8 @@ static void ixdp2x00_irq_handler(unsigned int irq, struct irq_desc *desc) | |||
| 129 | 129 | ||
| 130 | for(i = 0; i < board_irq_count; i++) { | 130 | for(i = 0; i < board_irq_count; i++) { |
| 131 | if(ex_interrupt & (1 << i)) { | 131 | if(ex_interrupt & (1 << i)) { |
| 132 | struct irq_desc *cpld_desc; | ||
| 133 | int cpld_irq = IXP2000_BOARD_IRQ(0) + i; | 132 | int cpld_irq = IXP2000_BOARD_IRQ(0) + i; |
| 134 | cpld_desc = irq_desc + cpld_irq; | 133 | generic_handle_irq(cpld_irq); |
| 135 | desc_handle_irq(cpld_irq, cpld_desc); | ||
| 136 | } | 134 | } |
| 137 | } | 135 | } |
| 138 | 136 | ||
diff --git a/arch/arm/mach-ixp2000/ixdp2x01.c b/arch/arm/mach-ixp2000/ixdp2x01.c index c7042725dc80..4a12327a09a3 100644 --- a/arch/arm/mach-ixp2000/ixdp2x01.c +++ b/arch/arm/mach-ixp2000/ixdp2x01.c | |||
| @@ -79,10 +79,8 @@ static void ixdp2x01_irq_handler(unsigned int irq, struct irq_desc *desc) | |||
| 79 | 79 | ||
| 80 | for (i = 0; i < IXP2000_BOARD_IRQS; i++) { | 80 | for (i = 0; i < IXP2000_BOARD_IRQS; i++) { |
| 81 | if (ex_interrupt & (1 << i)) { | 81 | if (ex_interrupt & (1 << i)) { |
| 82 | struct irq_desc *cpld_desc; | ||
| 83 | int cpld_irq = IXP2000_BOARD_IRQ(0) + i; | 82 | int cpld_irq = IXP2000_BOARD_IRQ(0) + i; |
| 84 | cpld_desc = irq_desc + cpld_irq; | 83 | generic_handle_irq(cpld_irq); |
| 85 | desc_handle_irq(cpld_irq, cpld_desc); | ||
| 86 | } | 84 | } |
| 87 | } | 85 | } |
| 88 | 86 | ||
diff --git a/arch/arm/mach-ixp23xx/core.c b/arch/arm/mach-ixp23xx/core.c index 68b4ac5b2481..aa4c4420ff3d 100644 --- a/arch/arm/mach-ixp23xx/core.c +++ b/arch/arm/mach-ixp23xx/core.c | |||
| @@ -253,7 +253,6 @@ static void pci_handler(unsigned int irq, struct irq_desc *desc) | |||
| 253 | { | 253 | { |
| 254 | u32 pci_interrupt; | 254 | u32 pci_interrupt; |
| 255 | unsigned int irqno; | 255 | unsigned int irqno; |
| 256 | struct irq_desc *int_desc; | ||
| 257 | 256 | ||
| 258 | pci_interrupt = *IXP23XX_PCI_XSCALE_INT_STATUS; | 257 | pci_interrupt = *IXP23XX_PCI_XSCALE_INT_STATUS; |
| 259 | 258 | ||
| @@ -268,8 +267,7 @@ static void pci_handler(unsigned int irq, struct irq_desc *desc) | |||
| 268 | BUG(); | 267 | BUG(); |
| 269 | } | 268 | } |
| 270 | 269 | ||
| 271 | int_desc = irq_desc + irqno; | 270 | generic_handle_irq(irqno); |
| 272 | desc_handle_irq(irqno, int_desc); | ||
| 273 | 271 | ||
| 274 | desc->chip->unmask(irq); | 272 | desc->chip->unmask(irq); |
| 275 | } | 273 | } |
diff --git a/arch/arm/mach-ixp23xx/ixdp2351.c b/arch/arm/mach-ixp23xx/ixdp2351.c index b6e0bfa44df9..f1b124a709ab 100644 --- a/arch/arm/mach-ixp23xx/ixdp2351.c +++ b/arch/arm/mach-ixp23xx/ixdp2351.c | |||
| @@ -68,11 +68,9 @@ static void ixdp2351_inta_handler(unsigned int irq, struct irq_desc *desc) | |||
| 68 | 68 | ||
| 69 | for (i = 0; i < IXDP2351_INTA_IRQ_NUM; i++) { | 69 | for (i = 0; i < IXDP2351_INTA_IRQ_NUM; i++) { |
| 70 | if (ex_interrupt & (1 << i)) { | 70 | if (ex_interrupt & (1 << i)) { |
| 71 | struct irq_desc *cpld_desc; | ||
| 72 | int cpld_irq = | 71 | int cpld_irq = |
| 73 | IXP23XX_MACH_IRQ(IXDP2351_INTA_IRQ_BASE + i); | 72 | IXP23XX_MACH_IRQ(IXDP2351_INTA_IRQ_BASE + i); |
| 74 | cpld_desc = irq_desc + cpld_irq; | 73 | generic_handle_irq(cpld_irq); |
| 75 | desc_handle_irq(cpld_irq, cpld_desc); | ||
| 76 | } | 74 | } |
| 77 | } | 75 | } |
| 78 | 76 | ||
| @@ -105,11 +103,9 @@ static void ixdp2351_intb_handler(unsigned int irq, struct irq_desc *desc) | |||
| 105 | 103 | ||
| 106 | for (i = 0; i < IXDP2351_INTB_IRQ_NUM; i++) { | 104 | for (i = 0; i < IXDP2351_INTB_IRQ_NUM; i++) { |
| 107 | if (ex_interrupt & (1 << i)) { | 105 | if (ex_interrupt & (1 << i)) { |
| 108 | struct irq_desc *cpld_desc; | ||
| 109 | int cpld_irq = | 106 | int cpld_irq = |
| 110 | IXP23XX_MACH_IRQ(IXDP2351_INTB_IRQ_BASE + i); | 107 | IXP23XX_MACH_IRQ(IXDP2351_INTB_IRQ_BASE + i); |
| 111 | cpld_desc = irq_desc + cpld_irq; | 108 | generic_handle_irq(cpld_irq); |
| 112 | desc_handle_irq(cpld_irq, cpld_desc); | ||
| 113 | } | 109 | } |
| 114 | } | 110 | } |
| 115 | 111 | ||
diff --git a/arch/arm/mach-lh7a40x/arch-kev7a400.c b/arch/arm/mach-lh7a40x/arch-kev7a400.c index 551b97261826..3d7bd50b9095 100644 --- a/arch/arm/mach-lh7a40x/arch-kev7a400.c +++ b/arch/arm/mach-lh7a40x/arch-kev7a400.c | |||
| @@ -77,7 +77,7 @@ static void kev7a400_cpld_handler (unsigned int irq, struct irq_desc *desc) | |||
| 77 | irq = IRQ_KEV7A400_CPLD; | 77 | irq = IRQ_KEV7A400_CPLD; |
| 78 | for (; mask; mask >>= 1, ++irq) | 78 | for (; mask; mask >>= 1, ++irq) |
| 79 | if (mask & 1) | 79 | if (mask & 1) |
| 80 | desc_handle_irq(irq, desc); | 80 | generic_handle_irq(irq); |
| 81 | } | 81 | } |
| 82 | 82 | ||
| 83 | void __init lh7a40x_init_board_irq (void) | 83 | void __init lh7a40x_init_board_irq (void) |
diff --git a/arch/arm/mach-lh7a40x/arch-lpd7a40x.c b/arch/arm/mach-lh7a40x/arch-lpd7a40x.c index e373fb8e2699..cb15e5d32120 100644 --- a/arch/arm/mach-lh7a40x/arch-lpd7a40x.c +++ b/arch/arm/mach-lh7a40x/arch-lpd7a40x.c | |||
| @@ -214,11 +214,11 @@ static void lpd7a40x_cpld_handler (unsigned int irq, struct irq_desc *desc) | |||
| 214 | desc->chip->ack (irq); | 214 | desc->chip->ack (irq); |
| 215 | 215 | ||
| 216 | if ((mask & (1<<0)) == 0) /* WLAN */ | 216 | if ((mask & (1<<0)) == 0) /* WLAN */ |
| 217 | IRQ_DISPATCH (IRQ_LPD7A40X_ETH_INT); | 217 | generic_handle_irq(IRQ_LPD7A40X_ETH_INT); |
| 218 | 218 | ||
| 219 | #if defined (IRQ_TOUCH) | 219 | #if defined (IRQ_TOUCH) |
| 220 | if ((mask & (1<<1)) == 0) /* Touch */ | 220 | if ((mask & (1<<1)) == 0) /* Touch */ |
| 221 | IRQ_DISPATCH (IRQ_TOUCH); | 221 | generic_handle_irq(IRQ_TOUCH); |
| 222 | #endif | 222 | #endif |
| 223 | 223 | ||
| 224 | desc->chip->unmask (irq); /* Level-triggered need this */ | 224 | desc->chip->unmask (irq); /* Level-triggered need this */ |
diff --git a/arch/arm/mach-lh7a40x/common.h b/arch/arm/mach-lh7a40x/common.h index 0ca20c6c83b7..6ed3f6b6db76 100644 --- a/arch/arm/mach-lh7a40x/common.h +++ b/arch/arm/mach-lh7a40x/common.h | |||
| @@ -15,4 +15,3 @@ extern void lh7a404_init_irq (void); | |||
| 15 | extern void lh7a40x_clcd_init (void); | 15 | extern void lh7a40x_clcd_init (void); |
| 16 | extern void lh7a40x_init_board_irq (void); | 16 | extern void lh7a40x_init_board_irq (void); |
| 17 | 17 | ||
| 18 | #define IRQ_DISPATCH(irq) desc_handle_irq((irq),(irq_desc + irq)) | ||
diff --git a/arch/arm/mach-lh7a40x/irq-lpd7a40x.c b/arch/arm/mach-lh7a40x/irq-lpd7a40x.c index 0d5063ebda10..fd033bb4342f 100644 --- a/arch/arm/mach-lh7a40x/irq-lpd7a40x.c +++ b/arch/arm/mach-lh7a40x/irq-lpd7a40x.c | |||
| @@ -63,10 +63,10 @@ static void lh7a40x_cpld_handler (unsigned int irq, struct irq_desc *desc) | |||
| 63 | desc->chip->ack (irq); | 63 | desc->chip->ack (irq); |
| 64 | 64 | ||
| 65 | if ((mask & 0x1) == 0) /* WLAN */ | 65 | if ((mask & 0x1) == 0) /* WLAN */ |
| 66 | IRQ_DISPATCH (IRQ_LPD7A40X_ETH_INT); | 66 | generic_handle_irq(IRQ_LPD7A40X_ETH_INT); |
| 67 | 67 | ||
| 68 | if ((mask & 0x2) == 0) /* Touch */ | 68 | if ((mask & 0x2) == 0) /* Touch */ |
| 69 | IRQ_DISPATCH (IRQ_LPD7A400_TS); | 69 | generic_handle_irq(IRQ_LPD7A400_TS); |
| 70 | 70 | ||
| 71 | desc->chip->unmask (irq); /* Level-triggered need this */ | 71 | desc->chip->unmask (irq); /* Level-triggered need this */ |
| 72 | } | 72 | } |
diff --git a/arch/arm/mach-netx/generic.c b/arch/arm/mach-netx/generic.c index e60c4061dc40..79df60c20e70 100644 --- a/arch/arm/mach-netx/generic.c +++ b/arch/arm/mach-netx/generic.c | |||
| @@ -77,15 +77,12 @@ netx_hif_demux_handler(unsigned int irq_unused, struct irq_desc *desc) | |||
| 77 | stat = ((readl(NETX_DPMAS_INT_EN) & | 77 | stat = ((readl(NETX_DPMAS_INT_EN) & |
| 78 | readl(NETX_DPMAS_INT_STAT)) >> 24) & 0x1f; | 78 | readl(NETX_DPMAS_INT_STAT)) >> 24) & 0x1f; |
| 79 | 79 | ||
| 80 | desc = irq_desc + NETX_IRQ_HIF_CHAINED(0); | ||
| 81 | |||
| 82 | while (stat) { | 80 | while (stat) { |
| 83 | if (stat & 1) { | 81 | if (stat & 1) { |
| 84 | DEBUG_IRQ("handling irq %d\n", irq); | 82 | DEBUG_IRQ("handling irq %d\n", irq); |
| 85 | desc_handle_irq(irq, desc); | 83 | generic_handle_irq(irq); |
| 86 | } | 84 | } |
| 87 | irq++; | 85 | irq++; |
| 88 | desc++; | ||
| 89 | stat >>= 1; | 86 | stat >>= 1; |
| 90 | } | 87 | } |
| 91 | } | 88 | } |
diff --git a/arch/arm/mach-ns9xxx/board-a9m9750dev.c b/arch/arm/mach-ns9xxx/board-a9m9750dev.c index a22a608a7aba..b45bb3b802f1 100644 --- a/arch/arm/mach-ns9xxx/board-a9m9750dev.c +++ b/arch/arm/mach-ns9xxx/board-a9m9750dev.c | |||
| @@ -86,13 +86,10 @@ static void a9m9750dev_fpga_demux_handler(unsigned int irq, | |||
| 86 | 86 | ||
| 87 | while (stat != 0) { | 87 | while (stat != 0) { |
| 88 | int irqno = fls(stat) - 1; | 88 | int irqno = fls(stat) - 1; |
| 89 | struct irq_desc *fpgadesc; | ||
| 90 | 89 | ||
| 91 | stat &= ~(1 << irqno); | 90 | stat &= ~(1 << irqno); |
| 92 | 91 | ||
| 93 | fpgadesc = irq_desc + FPGA_IRQ(irqno); | 92 | generic_handle_irq(FPGA_IRQ(irqno)); |
| 94 | |||
| 95 | desc_handle_irq(FPGA_IRQ(irqno), fpgadesc); | ||
| 96 | } | 93 | } |
| 97 | 94 | ||
| 98 | desc->chip->unmask(irq); | 95 | desc->chip->unmask(irq); |
diff --git a/arch/arm/mach-omap1/board-voiceblue.c b/arch/arm/mach-omap1/board-voiceblue.c index 213b48787102..45a01311669a 100644 --- a/arch/arm/mach-omap1/board-voiceblue.c +++ b/arch/arm/mach-omap1/board-voiceblue.c | |||
| @@ -21,6 +21,7 @@ | |||
| 21 | #include <linux/reboot.h> | 21 | #include <linux/reboot.h> |
| 22 | #include <linux/serial_8250.h> | 22 | #include <linux/serial_8250.h> |
| 23 | #include <linux/serial_reg.h> | 23 | #include <linux/serial_reg.h> |
| 24 | #include <linux/irq.h> | ||
| 24 | 25 | ||
| 25 | #include <mach/hardware.h> | 26 | #include <mach/hardware.h> |
| 26 | #include <asm/mach-types.h> | 27 | #include <asm/mach-types.h> |
diff --git a/arch/arm/mach-omap1/fpga.c b/arch/arm/mach-omap1/fpga.c index 0d9f48f780ad..04995381aa5c 100644 --- a/arch/arm/mach-omap1/fpga.c +++ b/arch/arm/mach-omap1/fpga.c | |||
| @@ -86,7 +86,6 @@ static void fpga_mask_ack_irq(unsigned int irq) | |||
| 86 | 86 | ||
| 87 | void innovator_fpga_IRQ_demux(unsigned int irq, struct irq_desc *desc) | 87 | void innovator_fpga_IRQ_demux(unsigned int irq, struct irq_desc *desc) |
| 88 | { | 88 | { |
| 89 | struct irq_desc *d; | ||
| 90 | u32 stat; | 89 | u32 stat; |
| 91 | int fpga_irq; | 90 | int fpga_irq; |
| 92 | 91 | ||
| @@ -99,8 +98,7 @@ void innovator_fpga_IRQ_demux(unsigned int irq, struct irq_desc *desc) | |||
| 99 | (fpga_irq < OMAP_FPGA_IRQ_END) && stat; | 98 | (fpga_irq < OMAP_FPGA_IRQ_END) && stat; |
| 100 | fpga_irq++, stat >>= 1) { | 99 | fpga_irq++, stat >>= 1) { |
| 101 | if (stat & 1) { | 100 | if (stat & 1) { |
| 102 | d = irq_desc + fpga_irq; | 101 | generic_handle_irq(fpga_irq); |
| 103 | desc_handle_irq(fpga_irq, d); | ||
| 104 | } | 102 | } |
| 105 | } | 103 | } |
| 106 | } | 104 | } |
diff --git a/arch/arm/mach-orion5x/irq.c b/arch/arm/mach-orion5x/irq.c index 02ceeb3c6737..632a36f5cf14 100644 --- a/arch/arm/mach-orion5x/irq.c +++ b/arch/arm/mach-orion5x/irq.c | |||
| @@ -162,7 +162,7 @@ static void orion5x_gpio_irq_handler(unsigned int irq, struct irq_desc *desc) | |||
| 162 | polarity ^= 1 << pin; | 162 | polarity ^= 1 << pin; |
| 163 | writel(polarity, GPIO_IN_POL); | 163 | writel(polarity, GPIO_IN_POL); |
| 164 | } | 164 | } |
| 165 | desc_handle_irq(irq, desc); | 165 | generic_handle_irq(irq); |
| 166 | } | 166 | } |
| 167 | } | 167 | } |
| 168 | } | 168 | } |
diff --git a/arch/arm/mach-pxa/Kconfig b/arch/arm/mach-pxa/Kconfig index e484f609feda..f27f6b3d6e6f 100644 --- a/arch/arm/mach-pxa/Kconfig +++ b/arch/arm/mach-pxa/Kconfig | |||
| @@ -38,16 +38,23 @@ config ARCH_LUBBOCK | |||
| 38 | bool "Intel DBPXA250 Development Platform" | 38 | bool "Intel DBPXA250 Development Platform" |
| 39 | select PXA25x | 39 | select PXA25x |
| 40 | select SA1111 | 40 | select SA1111 |
| 41 | select PXA_HAVE_BOARD_IRQS | ||
| 41 | 42 | ||
| 42 | config MACH_LOGICPD_PXA270 | 43 | config MACH_LOGICPD_PXA270 |
| 43 | bool "LogicPD PXA270 Card Engine Development Platform" | 44 | bool "LogicPD PXA270 Card Engine Development Platform" |
| 44 | select PXA27x | 45 | select PXA27x |
| 45 | select HAVE_PWM | 46 | select HAVE_PWM |
| 47 | select PXA_HAVE_BOARD_IRQS | ||
| 46 | 48 | ||
| 47 | config MACH_MAINSTONE | 49 | config MACH_MAINSTONE |
| 48 | bool "Intel HCDDBBVA0 Development Platform" | 50 | bool "Intel HCDDBBVA0 Development Platform" |
| 49 | select PXA27x | 51 | select PXA27x |
| 50 | select HAVE_PWM | 52 | select HAVE_PWM |
| 53 | select PXA_HAVE_BOARD_IRQS | ||
| 54 | |||
| 55 | config MACH_MP900C | ||
| 56 | bool "Nec Mobilepro 900/c" | ||
| 57 | select PXA25x | ||
| 51 | 58 | ||
| 52 | config ARCH_PXA_IDP | 59 | config ARCH_PXA_IDP |
| 53 | bool "Accelent Xscale IDP" | 60 | bool "Accelent Xscale IDP" |
| @@ -114,10 +121,21 @@ config MACH_TOSA | |||
| 114 | bool "Enable Sharp SL-6000x (Tosa) Support" | 121 | bool "Enable Sharp SL-6000x (Tosa) Support" |
| 115 | depends on PXA_SHARPSL | 122 | depends on PXA_SHARPSL |
| 116 | select PXA25x | 123 | select PXA25x |
| 124 | select PXA_HAVE_BOARD_IRQS | ||
| 125 | |||
| 126 | config ARCH_VIPER | ||
| 127 | bool "Arcom/Eurotech VIPER SBC" | ||
| 128 | select PXA25x | ||
| 129 | select ISA | ||
| 130 | select I2C_GPIO | ||
| 131 | select HAVE_PWM | ||
| 132 | select PXA_HAVE_BOARD_IRQS | ||
| 133 | select PXA_HAVE_ISA_IRQS | ||
| 117 | 134 | ||
| 118 | config ARCH_PXA_ESERIES | 135 | config ARCH_PXA_ESERIES |
| 119 | bool "PXA based Toshiba e-series PDAs" | 136 | bool "PXA based Toshiba e-series PDAs" |
| 120 | select PXA25x | 137 | select PXA25x |
| 138 | select PXA_HAVE_BOARD_IRQS | ||
| 121 | 139 | ||
| 122 | config MACH_E330 | 140 | config MACH_E330 |
| 123 | bool "Toshiba e330" | 141 | bool "Toshiba e330" |
| @@ -170,13 +188,41 @@ config MACH_E800 | |||
| 170 | Say Y here if you intend to run this kernel on a Toshiba | 188 | Say Y here if you intend to run this kernel on a Toshiba |
| 171 | e800 family PDA. | 189 | e800 family PDA. |
| 172 | 190 | ||
| 191 | config TRIZEPS_PXA | ||
| 192 | bool "PXA based Keith und Koep Trizeps DIMM-Modules" | ||
| 193 | |||
| 173 | config MACH_TRIZEPS4 | 194 | config MACH_TRIZEPS4 |
| 174 | bool "Keith und Koep Trizeps4 DIMM-Module" | 195 | bool "Keith und Koep Trizeps4 DIMM-Module" |
| 196 | depends on TRIZEPS_PXA | ||
| 197 | select TRIZEPS_PCMCIA | ||
| 175 | select PXA27x | 198 | select PXA27x |
| 176 | 199 | ||
| 177 | config MACH_TRIZEPS4_CONXS | 200 | config MACH_TRIZEPS4WL |
| 201 | bool "Keith und Koep Trizeps4-WL DIMM-Module" | ||
| 202 | depends on TRIZEPS_PXA | ||
| 203 | select TRIZEPS_PCMCIA | ||
| 204 | select PXA27x | ||
| 205 | select PXA_SSP | ||
| 206 | |||
| 207 | choice | ||
| 208 | prompt "Select base board for Trizeps module" | ||
| 209 | depends on TRIZEPS_PXA | ||
| 210 | |||
| 211 | config MACH_TRIZEPS_CONXS | ||
| 178 | bool "ConXS Eval Board" | 212 | bool "ConXS Eval Board" |
| 179 | depends on MACH_TRIZEPS4 | 213 | |
| 214 | config MACH_TRIZEPS_UCONXS | ||
| 215 | bool "uConXS Eval Board" | ||
| 216 | |||
| 217 | config MACH_TRIZEPS_ANY | ||
| 218 | bool "another Board" | ||
| 219 | |||
| 220 | endchoice | ||
| 221 | |||
| 222 | config TRIZEPS_PCMCIA | ||
| 223 | bool | ||
| 224 | help | ||
| 225 | Enable PCMCIA support for Trizeps modules | ||
| 180 | 226 | ||
| 181 | config MACH_EM_X270 | 227 | config MACH_EM_X270 |
| 182 | bool "CompuLab EM-x270 platform" | 228 | bool "CompuLab EM-x270 platform" |
| @@ -189,6 +235,7 @@ config MACH_COLIBRI | |||
| 189 | config MACH_ZYLONITE | 235 | config MACH_ZYLONITE |
| 190 | bool "PXA3xx Development Platform (aka Zylonite)" | 236 | bool "PXA3xx Development Platform (aka Zylonite)" |
| 191 | select PXA3xx | 237 | select PXA3xx |
| 238 | select PXA_SSP | ||
| 192 | select HAVE_PWM | 239 | select HAVE_PWM |
| 193 | 240 | ||
| 194 | config MACH_LITTLETON | 241 | config MACH_LITTLETON |
| @@ -207,21 +254,42 @@ config MACH_SAAR | |||
| 207 | select PXA930 | 254 | select PXA930 |
| 208 | 255 | ||
| 209 | config MACH_ARMCORE | 256 | config MACH_ARMCORE |
| 210 | bool "CompuLab CM-X270 modules" | 257 | bool "CompuLab CM-X255/CM-X270 modules" |
| 211 | select PXA27x | 258 | select PXA27x |
| 212 | select IWMMXT | 259 | select IWMMXT |
| 213 | select ZONE_DMA if PCI | 260 | select ZONE_DMA if PCI |
| 261 | select PXA25x | ||
| 262 | select PXA_SSP | ||
| 263 | |||
| 264 | config MACH_CM_X300 | ||
| 265 | bool "CompuLab CM-X300 modules" | ||
| 266 | select PXA3xx | ||
| 267 | select CPU_PXA300 | ||
| 214 | 268 | ||
| 215 | config MACH_MAGICIAN | 269 | config MACH_MAGICIAN |
| 216 | bool "Enable HTC Magician Support" | 270 | bool "Enable HTC Magician Support" |
| 217 | select PXA27x | 271 | select PXA27x |
| 218 | select IWMMXT | 272 | select IWMMXT |
| 273 | select PXA_HAVE_BOARD_IRQS | ||
| 274 | |||
| 275 | config MACH_MIOA701 | ||
| 276 | bool "Mitac Mio A701 Support" | ||
| 277 | select PXA27x | ||
| 278 | select IWMMXT | ||
| 279 | select LEDS_GPIO | ||
| 280 | select HAVE_PWM | ||
| 281 | select GPIO_SYSFS | ||
| 282 | help | ||
| 283 | Say Y here if you intend to run this kernel on a | ||
| 284 | MIO A701. Currently there is only basic support | ||
| 285 | for this PDA. | ||
| 219 | 286 | ||
| 220 | config MACH_PCM027 | 287 | config MACH_PCM027 |
| 221 | bool "Phytec phyCORE-PXA270 CPU module (PCM-027)" | 288 | bool "Phytec phyCORE-PXA270 CPU module (PCM-027)" |
| 222 | select PXA27x | 289 | select PXA27x |
| 223 | select IWMMXT | 290 | select IWMMXT |
| 224 | select PXA_SSP | 291 | select PXA_SSP |
| 292 | select PXA_HAVE_BOARD_IRQS | ||
| 225 | 293 | ||
| 226 | config ARCH_PXA_PALM | 294 | config ARCH_PXA_PALM |
| 227 | bool "PXA based Palm PDAs" | 295 | bool "PXA based Palm PDAs" |
| @@ -237,6 +305,16 @@ config MACH_PALMTX | |||
| 237 | Say Y here if you intend to run this kernel on a Palm T|X | 305 | Say Y here if you intend to run this kernel on a Palm T|X |
| 238 | handheld computer. | 306 | handheld computer. |
| 239 | 307 | ||
| 308 | config MACH_PALMZ72 | ||
| 309 | bool "Palm Zire 72" | ||
| 310 | default y | ||
| 311 | depends on ARCH_PXA_PALM | ||
| 312 | select PXA27x | ||
| 313 | select IWMMXT | ||
| 314 | help | ||
| 315 | Say Y here if you intend to run this kernel on Palm Zire 72 | ||
| 316 | handheld computer. | ||
| 317 | |||
| 240 | config MACH_PCM990_BASEBOARD | 318 | config MACH_PCM990_BASEBOARD |
| 241 | bool "PHYTEC PCM-990 development board" | 319 | bool "PHYTEC PCM-990 development board" |
| 242 | select HAVE_PWM | 320 | select HAVE_PWM |
| @@ -257,6 +335,9 @@ config PCM990_DISPLAY_NONE | |||
| 257 | 335 | ||
| 258 | endchoice | 336 | endchoice |
| 259 | 337 | ||
| 338 | config MACH_AM200EPD | ||
| 339 | depends on MACH_GUMSTIX_F | ||
| 340 | bool "Enable AM200EPD board support" | ||
| 260 | 341 | ||
| 261 | config PXA_EZX | 342 | config PXA_EZX |
| 262 | bool "Motorola EZX Platform" | 343 | bool "Motorola EZX Platform" |
| @@ -344,4 +425,10 @@ config TOSA_BT | |||
| 344 | This is a simple driver that is able to control | 425 | This is a simple driver that is able to control |
| 345 | the state of built in bluetooth chip on tosa. | 426 | the state of built in bluetooth chip on tosa. |
| 346 | 427 | ||
| 428 | config PXA_HAVE_BOARD_IRQS | ||
| 429 | bool | ||
| 430 | |||
| 431 | config PXA_HAVE_ISA_IRQS | ||
| 432 | bool | ||
| 433 | |||
| 347 | endif | 434 | endif |
diff --git a/arch/arm/mach-pxa/Makefile b/arch/arm/mach-pxa/Makefile index 99ecbe7f8506..d31c9979cfa3 100644 --- a/arch/arm/mach-pxa/Makefile +++ b/arch/arm/mach-pxa/Makefile | |||
| @@ -6,7 +6,12 @@ | |||
| 6 | obj-y += clock.o devices.o generic.o irq.o dma.o \ | 6 | obj-y += clock.o devices.o generic.o irq.o dma.o \ |
| 7 | time.o gpio.o reset.o | 7 | time.o gpio.o reset.o |
| 8 | obj-$(CONFIG_PM) += pm.o sleep.o standby.o | 8 | obj-$(CONFIG_PM) += pm.o sleep.o standby.o |
| 9 | obj-$(CONFIG_CPU_FREQ) += cpu-pxa.o | 9 | |
| 10 | ifeq ($(CONFIG_CPU_FREQ),y) | ||
| 11 | obj-$(CONFIG_PXA25x) += cpufreq-pxa2xx.o | ||
| 12 | obj-$(CONFIG_PXA27x) += cpufreq-pxa2xx.o | ||
| 13 | obj-$(CONFIG_PXA3xx) += cpufreq-pxa3xx.o | ||
| 14 | endif | ||
| 10 | 15 | ||
| 11 | # Generic drivers that other drivers may depend upon | 16 | # Generic drivers that other drivers may depend upon |
| 12 | obj-$(CONFIG_PXA_SSP) += ssp.o | 17 | obj-$(CONFIG_PXA_SSP) += ssp.o |
| @@ -22,27 +27,33 @@ obj-$(CONFIG_CPU_PXA930) += pxa930.o | |||
| 22 | 27 | ||
| 23 | # Specific board support | 28 | # Specific board support |
| 24 | obj-$(CONFIG_ARCH_GUMSTIX) += gumstix.o | 29 | obj-$(CONFIG_ARCH_GUMSTIX) += gumstix.o |
| 30 | obj-$(CONFIG_MACH_AM200EPD) += am200epd.o | ||
| 25 | obj-$(CONFIG_ARCH_LUBBOCK) += lubbock.o | 31 | obj-$(CONFIG_ARCH_LUBBOCK) += lubbock.o |
| 26 | obj-$(CONFIG_MACH_LOGICPD_PXA270) += lpd270.o | 32 | obj-$(CONFIG_MACH_LOGICPD_PXA270) += lpd270.o |
| 27 | obj-$(CONFIG_MACH_MAINSTONE) += mainstone.o | 33 | obj-$(CONFIG_MACH_MAINSTONE) += mainstone.o |
| 34 | obj-$(CONFIG_MACH_MP900C) += mp900.o | ||
| 28 | obj-$(CONFIG_ARCH_PXA_IDP) += idp.o | 35 | obj-$(CONFIG_ARCH_PXA_IDP) += idp.o |
| 29 | obj-$(CONFIG_MACH_TRIZEPS4) += trizeps4.o | 36 | obj-$(CONFIG_MACH_TRIZEPS4) += trizeps4.o |
| 30 | obj-$(CONFIG_MACH_COLIBRI) += colibri.o | 37 | obj-$(CONFIG_MACH_COLIBRI) += colibri.o |
| 31 | obj-$(CONFIG_PXA_SHARP_C7xx) += corgi.o corgi_ssp.o corgi_lcd.o sharpsl_pm.o corgi_pm.o | 38 | obj-$(CONFIG_PXA_SHARP_C7xx) += corgi.o sharpsl_pm.o corgi_pm.o |
| 32 | obj-$(CONFIG_PXA_SHARP_Cxx00) += spitz.o corgi_ssp.o corgi_lcd.o sharpsl_pm.o spitz_pm.o | 39 | obj-$(CONFIG_PXA_SHARP_Cxx00) += spitz.o sharpsl_pm.o spitz_pm.o |
| 33 | obj-$(CONFIG_MACH_AKITA) += akita-ioexp.o | 40 | obj-$(CONFIG_MACH_POODLE) += poodle.o |
| 34 | obj-$(CONFIG_MACH_POODLE) += poodle.o corgi_ssp.o | ||
| 35 | obj-$(CONFIG_MACH_PCM027) += pcm027.o | 41 | obj-$(CONFIG_MACH_PCM027) += pcm027.o |
| 36 | obj-$(CONFIG_MACH_PCM990_BASEBOARD) += pcm990-baseboard.o | 42 | obj-$(CONFIG_MACH_PCM990_BASEBOARD) += pcm990-baseboard.o |
| 37 | obj-$(CONFIG_MACH_TOSA) += tosa.o | 43 | obj-$(CONFIG_MACH_TOSA) += tosa.o |
| 38 | obj-$(CONFIG_MACH_EM_X270) += em-x270.o | 44 | obj-$(CONFIG_MACH_EM_X270) += em-x270.o |
| 39 | obj-$(CONFIG_MACH_MAGICIAN) += magician.o | 45 | obj-$(CONFIG_MACH_MAGICIAN) += magician.o |
| 40 | obj-$(CONFIG_ARCH_PXA_ESERIES) += eseries.o eseries_udc.o | 46 | obj-$(CONFIG_MACH_MIOA701) += mioa701.o mioa701_bootresume.o |
| 41 | obj-$(CONFIG_MACH_E740) += e740_lcd.o | 47 | obj-$(CONFIG_ARCH_PXA_ESERIES) += eseries.o |
| 42 | obj-$(CONFIG_MACH_E750) += e750_lcd.o | 48 | obj-$(CONFIG_MACH_E330) += e330.o |
| 43 | obj-$(CONFIG_MACH_E400) += e400_lcd.o | 49 | obj-$(CONFIG_MACH_E350) += e350.o |
| 44 | obj-$(CONFIG_MACH_E800) += e800_lcd.o | 50 | obj-$(CONFIG_MACH_E740) += e740.o |
| 51 | obj-$(CONFIG_MACH_E750) += e750.o | ||
| 52 | obj-$(CONFIG_MACH_E400) += e400.o | ||
| 53 | obj-$(CONFIG_MACH_E800) += e800.o | ||
| 45 | obj-$(CONFIG_MACH_PALMTX) += palmtx.o | 54 | obj-$(CONFIG_MACH_PALMTX) += palmtx.o |
| 55 | obj-$(CONFIG_MACH_PALMZ72) += palmz72.o | ||
| 56 | obj-$(CONFIG_ARCH_VIPER) += viper.o | ||
| 46 | 57 | ||
| 47 | ifeq ($(CONFIG_MACH_ZYLONITE),y) | 58 | ifeq ($(CONFIG_MACH_ZYLONITE),y) |
| 48 | obj-y += zylonite.o | 59 | obj-y += zylonite.o |
| @@ -53,7 +64,8 @@ obj-$(CONFIG_MACH_LITTLETON) += littleton.o | |||
| 53 | obj-$(CONFIG_MACH_TAVOREVB) += tavorevb.o | 64 | obj-$(CONFIG_MACH_TAVOREVB) += tavorevb.o |
| 54 | obj-$(CONFIG_MACH_SAAR) += saar.o | 65 | obj-$(CONFIG_MACH_SAAR) += saar.o |
| 55 | 66 | ||
| 56 | obj-$(CONFIG_MACH_ARMCORE) += cm-x270.o | 67 | obj-$(CONFIG_MACH_ARMCORE) += cm-x2xx.o cm-x255.o cm-x270.o |
| 68 | obj-$(CONFIG_MACH_CM_X300) += cm-x300.o | ||
| 57 | obj-$(CONFIG_PXA_EZX) += ezx.o | 69 | obj-$(CONFIG_PXA_EZX) += ezx.o |
| 58 | 70 | ||
| 59 | # Support for blinky lights | 71 | # Support for blinky lights |
| @@ -61,12 +73,11 @@ led-y := leds.o | |||
| 61 | led-$(CONFIG_ARCH_LUBBOCK) += leds-lubbock.o | 73 | led-$(CONFIG_ARCH_LUBBOCK) += leds-lubbock.o |
| 62 | led-$(CONFIG_MACH_MAINSTONE) += leds-mainstone.o | 74 | led-$(CONFIG_MACH_MAINSTONE) += leds-mainstone.o |
| 63 | led-$(CONFIG_ARCH_PXA_IDP) += leds-idp.o | 75 | led-$(CONFIG_ARCH_PXA_IDP) += leds-idp.o |
| 64 | led-$(CONFIG_MACH_TRIZEPS4) += leds-trizeps4.o | ||
| 65 | 76 | ||
| 66 | obj-$(CONFIG_LEDS) += $(led-y) | 77 | obj-$(CONFIG_LEDS) += $(led-y) |
| 67 | 78 | ||
| 68 | ifeq ($(CONFIG_PCI),y) | 79 | ifeq ($(CONFIG_PCI),y) |
| 69 | obj-$(CONFIG_MACH_ARMCORE) += cm-x270-pci.o | 80 | obj-$(CONFIG_MACH_ARMCORE) += cm-x2xx-pci.o |
| 70 | endif | 81 | endif |
| 71 | 82 | ||
| 72 | obj-$(CONFIG_TOSA_BT) += tosa-bt.o | 83 | obj-$(CONFIG_TOSA_BT) += tosa-bt.o |
diff --git a/arch/arm/mach-pxa/akita-ioexp.c b/arch/arm/mach-pxa/akita-ioexp.c deleted file mode 100644 index 5c67b188a3ba..000000000000 --- a/arch/arm/mach-pxa/akita-ioexp.c +++ /dev/null | |||
| @@ -1,222 +0,0 @@ | |||
| 1 | /* | ||
| 2 | * Support for the Extra GPIOs on the Sharp SL-C1000 (Akita) | ||
| 3 | * (uses a Maxim MAX7310 8 Port IO Expander) | ||
| 4 | * | ||
| 5 | * Copyright 2005 Openedhand Ltd. | ||
| 6 | * | ||
| 7 | * Author: Richard Purdie <richard@openedhand.com> | ||
| 8 | * | ||
| 9 | * This program is free software; you can redistribute it and/or modify | ||
| 10 | * it under the terms of the GNU General Public License version 2 as | ||
| 11 | * published by the Free Software Foundation. | ||
| 12 | * | ||
| 13 | */ | ||
| 14 | |||
| 15 | #include <linux/kernel.h> | ||
| 16 | #include <linux/init.h> | ||
| 17 | #include <linux/platform_device.h> | ||
| 18 | #include <linux/module.h> | ||
| 19 | #include <linux/i2c.h> | ||
| 20 | #include <linux/slab.h> | ||
| 21 | #include <linux/workqueue.h> | ||
| 22 | #include <mach/akita.h> | ||
| 23 | |||
| 24 | /* MAX7310 Regiser Map */ | ||
| 25 | #define MAX7310_INPUT 0x00 | ||
| 26 | #define MAX7310_OUTPUT 0x01 | ||
| 27 | #define MAX7310_POLINV 0x02 | ||
| 28 | #define MAX7310_IODIR 0x03 /* 1 = Input, 0 = Output */ | ||
| 29 | #define MAX7310_TIMEOUT 0x04 | ||
| 30 | |||
| 31 | /* Addresses to scan */ | ||
| 32 | static const unsigned short normal_i2c[] = { 0x18, I2C_CLIENT_END }; | ||
| 33 | |||
| 34 | /* I2C Magic */ | ||
| 35 | I2C_CLIENT_INSMOD; | ||
| 36 | |||
| 37 | static int max7310_write(struct i2c_client *client, int address, int data); | ||
| 38 | static struct i2c_client max7310_template; | ||
| 39 | static void akita_ioexp_work(struct work_struct *private_); | ||
| 40 | |||
| 41 | static struct device *akita_ioexp_device; | ||
| 42 | static unsigned char ioexp_output_value = AKITA_IOEXP_IO_OUT; | ||
| 43 | DECLARE_WORK(akita_ioexp, akita_ioexp_work); | ||
| 44 | |||
| 45 | |||
| 46 | /* | ||
| 47 | * MAX7310 Access | ||
| 48 | */ | ||
| 49 | static int max7310_config(struct device *dev, int iomode, int polarity) | ||
| 50 | { | ||
| 51 | int ret; | ||
| 52 | struct i2c_client *client = to_i2c_client(dev); | ||
| 53 | |||
| 54 | ret = max7310_write(client, MAX7310_POLINV, polarity); | ||
| 55 | if (ret < 0) | ||
| 56 | return ret; | ||
| 57 | ret = max7310_write(client, MAX7310_IODIR, iomode); | ||
| 58 | return ret; | ||
| 59 | } | ||
| 60 | |||
| 61 | static int max7310_set_ouputs(struct device *dev, int outputs) | ||
| 62 | { | ||
| 63 | struct i2c_client *client = to_i2c_client(dev); | ||
| 64 | |||
| 65 | return max7310_write(client, MAX7310_OUTPUT, outputs); | ||
| 66 | } | ||
| 67 | |||
| 68 | /* | ||
| 69 | * I2C Functions | ||
| 70 | */ | ||
| 71 | static int max7310_write(struct i2c_client *client, int address, int value) | ||
| 72 | { | ||
| 73 | u8 data[2]; | ||
| 74 | |||
| 75 | data[0] = address & 0xff; | ||
| 76 | data[1] = value & 0xff; | ||
| 77 | |||
| 78 | if (i2c_master_send(client, data, 2) == 2) | ||
| 79 | return 0; | ||
| 80 | return -1; | ||
| 81 | } | ||
| 82 | |||
| 83 | static int max7310_detect(struct i2c_adapter *adapter, int address, int kind) | ||
| 84 | { | ||
| 85 | struct i2c_client *new_client; | ||
| 86 | int err; | ||
| 87 | |||
| 88 | if (!(new_client = kmalloc(sizeof(struct i2c_client), GFP_KERNEL))) | ||
| 89 | return -ENOMEM; | ||
| 90 | |||
| 91 | max7310_template.adapter = adapter; | ||
| 92 | max7310_template.addr = address; | ||
| 93 | |||
| 94 | memcpy(new_client, &max7310_template, sizeof(struct i2c_client)); | ||
| 95 | |||
| 96 | if ((err = i2c_attach_client(new_client))) { | ||
| 97 | kfree(new_client); | ||
| 98 | return err; | ||
| 99 | } | ||
| 100 | |||
| 101 | max7310_config(&new_client->dev, AKITA_IOEXP_IO_DIR, 0); | ||
| 102 | akita_ioexp_device = &new_client->dev; | ||
| 103 | schedule_work(&akita_ioexp); | ||
| 104 | |||
| 105 | return 0; | ||
| 106 | } | ||
| 107 | |||
| 108 | static int max7310_attach_adapter(struct i2c_adapter *adapter) | ||
| 109 | { | ||
| 110 | return i2c_probe(adapter, &addr_data, max7310_detect); | ||
| 111 | } | ||
| 112 | |||
| 113 | static int max7310_detach_client(struct i2c_client *client) | ||
| 114 | { | ||
| 115 | int err; | ||
| 116 | |||
| 117 | akita_ioexp_device = NULL; | ||
| 118 | |||
| 119 | if ((err = i2c_detach_client(client))) | ||
| 120 | return err; | ||
| 121 | |||
| 122 | kfree(client); | ||
| 123 | return 0; | ||
| 124 | } | ||
| 125 | |||
| 126 | static struct i2c_driver max7310_i2c_driver = { | ||
| 127 | .driver = { | ||
| 128 | .name = "akita-max7310", | ||
| 129 | }, | ||
| 130 | .id = I2C_DRIVERID_AKITAIOEXP, | ||
| 131 | .attach_adapter = max7310_attach_adapter, | ||
| 132 | .detach_client = max7310_detach_client, | ||
| 133 | }; | ||
| 134 | |||
| 135 | static struct i2c_client max7310_template = { | ||
| 136 | name: "akita-max7310", | ||
| 137 | driver: &max7310_i2c_driver, | ||
| 138 | }; | ||
| 139 | |||
| 140 | void akita_set_ioexp(struct device *dev, unsigned char bit) | ||
| 141 | { | ||
| 142 | ioexp_output_value |= bit; | ||
| 143 | |||
| 144 | if (akita_ioexp_device) | ||
| 145 | schedule_work(&akita_ioexp); | ||
| 146 | return; | ||
| 147 | } | ||
| 148 | |||
| 149 | void akita_reset_ioexp(struct device *dev, unsigned char bit) | ||
| 150 | { | ||
| 151 | ioexp_output_value &= ~bit; | ||
| 152 | |||
| 153 | if (akita_ioexp_device) | ||
| 154 | schedule_work(&akita_ioexp); | ||
| 155 | return; | ||
| 156 | } | ||
| 157 | |||
| 158 | EXPORT_SYMBOL(akita_set_ioexp); | ||
| 159 | EXPORT_SYMBOL(akita_reset_ioexp); | ||
| 160 | |||
| 161 | static void akita_ioexp_work(struct work_struct *private_) | ||
| 162 | { | ||
| 163 | if (akita_ioexp_device) | ||
| 164 | max7310_set_ouputs(akita_ioexp_device, ioexp_output_value); | ||
| 165 | } | ||
| 166 | |||
| 167 | |||
| 168 | #ifdef CONFIG_PM | ||
| 169 | static int akita_ioexp_suspend(struct platform_device *pdev, pm_message_t state) | ||
| 170 | { | ||
| 171 | flush_scheduled_work(); | ||
| 172 | return 0; | ||
| 173 | } | ||
| 174 | |||
| 175 | static int akita_ioexp_resume(struct platform_device *pdev) | ||
| 176 | { | ||
| 177 | schedule_work(&akita_ioexp); | ||
| 178 | return 0; | ||
| 179 | } | ||
| 180 | #else | ||
| 181 | #define akita_ioexp_suspend NULL | ||
| 182 | #define akita_ioexp_resume NULL | ||
| 183 | #endif | ||
| 184 | |||
| 185 | static int __init akita_ioexp_probe(struct platform_device *pdev) | ||
| 186 | { | ||
| 187 | return i2c_add_driver(&max7310_i2c_driver); | ||
| 188 | } | ||
| 189 | |||
| 190 | static int akita_ioexp_remove(struct platform_device *pdev) | ||
| 191 | { | ||
| 192 | i2c_del_driver(&max7310_i2c_driver); | ||
| 193 | return 0; | ||
| 194 | } | ||
| 195 | |||
| 196 | static struct platform_driver akita_ioexp_driver = { | ||
| 197 | .probe = akita_ioexp_probe, | ||
| 198 | .remove = akita_ioexp_remove, | ||
| 199 | .suspend = akita_ioexp_suspend, | ||
| 200 | .resume = akita_ioexp_resume, | ||
| 201 | .driver = { | ||
| 202 | .name = "akita-ioexp", | ||
| 203 | }, | ||
| 204 | }; | ||
| 205 | |||
| 206 | static int __init akita_ioexp_init(void) | ||
| 207 | { | ||
| 208 | return platform_driver_register(&akita_ioexp_driver); | ||
| 209 | } | ||
| 210 | |||
| 211 | static void __exit akita_ioexp_exit(void) | ||
| 212 | { | ||
| 213 | platform_driver_unregister(&akita_ioexp_driver); | ||
| 214 | } | ||
| 215 | |||
| 216 | MODULE_AUTHOR("Richard Purdie <rpurdie@openedhand.com>"); | ||
| 217 | MODULE_DESCRIPTION("Akita IO-Expander driver"); | ||
| 218 | MODULE_LICENSE("GPL"); | ||
| 219 | |||
| 220 | fs_initcall(akita_ioexp_init); | ||
| 221 | module_exit(akita_ioexp_exit); | ||
| 222 | |||
diff --git a/arch/arm/mach-pxa/am200epd.c b/arch/arm/mach-pxa/am200epd.c new file mode 100644 index 000000000000..b965085a37b9 --- /dev/null +++ b/arch/arm/mach-pxa/am200epd.c | |||
| @@ -0,0 +1,374 @@ | |||
| 1 | /* | ||
| 2 | * am200epd.c -- Platform device for AM200 EPD kit | ||
| 3 | * | ||
| 4 | * Copyright (C) 2008, Jaya Kumar | ||
| 5 | * | ||
| 6 | * This file is subject to the terms and conditions of the GNU General Public | ||
| 7 | * License. See the file COPYING in the main directory of this archive for | ||
| 8 | * more details. | ||
| 9 | * | ||
| 10 | * Layout is based on skeletonfb.c by James Simmons and Geert Uytterhoeven. | ||
| 11 | * | ||
| 12 | * This work was made possible by help and equipment support from E-Ink | ||
| 13 | * Corporation. http://support.eink.com/community | ||
| 14 | * | ||
| 15 | * This driver is written to be used with the Metronome display controller. | ||
| 16 | * on the AM200 EPD prototype kit/development kit with an E-Ink 800x600 | ||
| 17 | * Vizplex EPD on a Gumstix board using the Lyre interface board. | ||
| 18 | * | ||
| 19 | */ | ||
| 20 | |||
| 21 | #include <linux/module.h> | ||
| 22 | #include <linux/kernel.h> | ||
| 23 | #include <linux/errno.h> | ||
| 24 | #include <linux/string.h> | ||
| 25 | #include <linux/delay.h> | ||
| 26 | #include <linux/interrupt.h> | ||
| 27 | #include <linux/fb.h> | ||
| 28 | #include <linux/init.h> | ||
| 29 | #include <linux/platform_device.h> | ||
| 30 | #include <linux/irq.h> | ||
| 31 | #include <linux/gpio.h> | ||
| 32 | |||
| 33 | #include <mach/pxafb.h> | ||
| 34 | |||
| 35 | #include <video/metronomefb.h> | ||
| 36 | |||
| 37 | static unsigned int panel_type = 6; | ||
| 38 | static struct platform_device *am200_device; | ||
| 39 | static struct metronome_board am200_board; | ||
| 40 | |||
| 41 | static struct pxafb_mode_info am200_fb_mode_9inch7 = { | ||
| 42 | .pixclock = 40000, | ||
| 43 | .xres = 1200, | ||
| 44 | .yres = 842, | ||
| 45 | .bpp = 16, | ||
| 46 | .hsync_len = 2, | ||
| 47 | .left_margin = 2, | ||
| 48 | .right_margin = 2, | ||
| 49 | .vsync_len = 1, | ||
| 50 | .upper_margin = 2, | ||
| 51 | .lower_margin = 25, | ||
| 52 | .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, | ||
| 53 | }; | ||
| 54 | |||
| 55 | static struct pxafb_mode_info am200_fb_mode_8inch = { | ||
| 56 | .pixclock = 40000, | ||
| 57 | .xres = 1088, | ||
| 58 | .yres = 791, | ||
| 59 | .bpp = 16, | ||
| 60 | .hsync_len = 28, | ||
| 61 | .left_margin = 8, | ||
| 62 | .right_margin = 30, | ||
| 63 | .vsync_len = 8, | ||
| 64 | .upper_margin = 10, | ||
| 65 | .lower_margin = 8, | ||
| 66 | .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, | ||
| 67 | }; | ||
| 68 | |||
| 69 | static struct pxafb_mode_info am200_fb_mode_6inch = { | ||
| 70 | .pixclock = 40189, | ||
| 71 | .xres = 832, | ||
| 72 | .yres = 622, | ||
| 73 | .bpp = 16, | ||
| 74 | .hsync_len = 28, | ||
| 75 | .left_margin = 34, | ||
| 76 | .right_margin = 34, | ||
| 77 | .vsync_len = 25, | ||
| 78 | .upper_margin = 0, | ||
| 79 | .lower_margin = 2, | ||
| 80 | .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, | ||
| 81 | }; | ||
| 82 | |||
| 83 | static struct pxafb_mach_info am200_fb_info = { | ||
| 84 | .modes = &am200_fb_mode_6inch, | ||
| 85 | .num_modes = 1, | ||
| 86 | .lcd_conn = LCD_TYPE_COLOR_TFT | LCD_PCLK_EDGE_FALL | | ||
| 87 | LCD_AC_BIAS_FREQ(24), | ||
| 88 | }; | ||
| 89 | |||
| 90 | /* register offsets for gpio control */ | ||
| 91 | #define LED_GPIO_PIN 51 | ||
| 92 | #define STDBY_GPIO_PIN 48 | ||
| 93 | #define RST_GPIO_PIN 49 | ||
| 94 | #define RDY_GPIO_PIN 32 | ||
| 95 | #define ERR_GPIO_PIN 17 | ||
| 96 | #define PCBPWR_GPIO_PIN 16 | ||
| 97 | static int gpios[] = { LED_GPIO_PIN , STDBY_GPIO_PIN , RST_GPIO_PIN, | ||
| 98 | RDY_GPIO_PIN, ERR_GPIO_PIN, PCBPWR_GPIO_PIN }; | ||
| 99 | static char *gpio_names[] = { "LED" , "STDBY" , "RST", "RDY", "ERR", "PCBPWR" }; | ||
| 100 | |||
| 101 | static int am200_init_gpio_regs(struct metronomefb_par *par) | ||
| 102 | { | ||
| 103 | int i; | ||
| 104 | int err; | ||
| 105 | |||
| 106 | for (i = 0; i < ARRAY_SIZE(gpios); i++) { | ||
| 107 | err = gpio_request(gpios[i], gpio_names[i]); | ||
| 108 | if (err) { | ||
| 109 | dev_err(&am200_device->dev, "failed requesting " | ||
| 110 | "gpio %s, err=%d\n", gpio_names[i], err); | ||
| 111 | goto err_req_gpio; | ||
| 112 | } | ||
| 113 | } | ||
| 114 | |||
| 115 | gpio_direction_output(LED_GPIO_PIN, 0); | ||
| 116 | gpio_direction_output(STDBY_GPIO_PIN, 0); | ||
| 117 | gpio_direction_output(RST_GPIO_PIN, 0); | ||
| 118 | |||
| 119 | gpio_direction_input(RDY_GPIO_PIN); | ||
| 120 | gpio_direction_input(ERR_GPIO_PIN); | ||
| 121 | |||
| 122 | gpio_direction_output(PCBPWR_GPIO_PIN, 0); | ||
| 123 | |||
| 124 | return 0; | ||
| 125 | |||
| 126 | err_req_gpio: | ||
| 127 | while (i > 0) | ||
| 128 | gpio_free(gpios[i--]); | ||
| 129 | |||
| 130 | return err; | ||
| 131 | } | ||
| 132 | |||
| 133 | static void am200_cleanup(struct metronomefb_par *par) | ||
| 134 | { | ||
| 135 | int i; | ||
| 136 | |||
| 137 | free_irq(IRQ_GPIO(RDY_GPIO_PIN), par); | ||
| 138 | |||
| 139 | for (i = 0; i < ARRAY_SIZE(gpios); i++) | ||
| 140 | gpio_free(gpios[i]); | ||
| 141 | } | ||
| 142 | |||
| 143 | static int am200_share_video_mem(struct fb_info *info) | ||
| 144 | { | ||
| 145 | /* rough check if this is our desired fb and not something else */ | ||
| 146 | if ((info->var.xres != am200_fb_info.modes->xres) | ||
| 147 | || (info->var.yres != am200_fb_info.modes->yres)) | ||
| 148 | return 0; | ||
| 149 | |||
| 150 | /* we've now been notified that we have our new fb */ | ||
| 151 | am200_board.metromem = info->screen_base; | ||
| 152 | am200_board.host_fbinfo = info; | ||
| 153 | |||
| 154 | /* try to refcount host drv since we are the consumer after this */ | ||
| 155 | if (!try_module_get(info->fbops->owner)) | ||
| 156 | return -ENODEV; | ||
| 157 | |||
| 158 | return 0; | ||
| 159 | } | ||
| 160 | |||
| 161 | static int am200_unshare_video_mem(struct fb_info *info) | ||
| 162 | { | ||
| 163 | dev_dbg(&am200_device->dev, "ENTER %s\n", __func__); | ||
| 164 | |||
| 165 | if (info != am200_board.host_fbinfo) | ||
| 166 | return 0; | ||
| 167 | |||
| 168 | module_put(am200_board.host_fbinfo->fbops->owner); | ||
| 169 | return 0; | ||
| 170 | } | ||
| 171 | |||
| 172 | static int am200_fb_notifier_callback(struct notifier_block *self, | ||
| 173 | unsigned long event, void *data) | ||
| 174 | { | ||
| 175 | struct fb_event *evdata = data; | ||
| 176 | struct fb_info *info = evdata->info; | ||
| 177 | |||
| 178 | dev_dbg(&am200_device->dev, "ENTER %s\n", __func__); | ||
| 179 | |||
| 180 | if (event == FB_EVENT_FB_REGISTERED) | ||
| 181 | return am200_share_video_mem(info); | ||
| 182 | else if (event == FB_EVENT_FB_UNREGISTERED) | ||
| 183 | return am200_unshare_video_mem(info); | ||
| 184 | |||
| 185 | return 0; | ||
| 186 | } | ||
| 187 | |||
| 188 | static struct notifier_block am200_fb_notif = { | ||
| 189 | .notifier_call = am200_fb_notifier_callback, | ||
| 190 | }; | ||
| 191 | |||
| 192 | /* this gets called as part of our init. these steps must be done now so | ||
| 193 | * that we can use set_pxa_fb_info */ | ||
| 194 | static void __init am200_presetup_fb(void) | ||
| 195 | { | ||
| 196 | int fw; | ||
| 197 | int fh; | ||
| 198 | int padding_size; | ||
| 199 | int totalsize; | ||
| 200 | |||
| 201 | switch (panel_type) { | ||
| 202 | case 6: | ||
| 203 | am200_fb_info.modes = &am200_fb_mode_6inch; | ||
| 204 | break; | ||
| 205 | case 8: | ||
| 206 | am200_fb_info.modes = &am200_fb_mode_8inch; | ||
| 207 | break; | ||
| 208 | case 97: | ||
| 209 | am200_fb_info.modes = &am200_fb_mode_9inch7; | ||
| 210 | break; | ||
| 211 | default: | ||
| 212 | dev_err(&am200_device->dev, "invalid panel_type selection," | ||
| 213 | " setting to 6\n"); | ||
| 214 | am200_fb_info.modes = &am200_fb_mode_6inch; | ||
| 215 | break; | ||
| 216 | } | ||
| 217 | |||
| 218 | /* the frame buffer is divided as follows: | ||
| 219 | command | CRC | padding | ||
| 220 | 16kb waveform data | CRC | padding | ||
| 221 | image data | CRC | ||
| 222 | */ | ||
| 223 | |||
| 224 | fw = am200_fb_info.modes->xres; | ||
| 225 | fh = am200_fb_info.modes->yres; | ||
| 226 | |||
| 227 | /* waveform must be 16k + 2 for checksum */ | ||
| 228 | am200_board.wfm_size = roundup(16*1024 + 2, fw); | ||
| 229 | |||
| 230 | padding_size = PAGE_SIZE + (4 * fw); | ||
| 231 | |||
| 232 | /* total is 1 cmd , 1 wfm, padding and image */ | ||
| 233 | totalsize = fw + am200_board.wfm_size + padding_size + (fw*fh); | ||
| 234 | |||
| 235 | /* save this off because we're manipulating fw after this and | ||
| 236 | * we'll need it when we're ready to setup the framebuffer */ | ||
| 237 | am200_board.fw = fw; | ||
| 238 | am200_board.fh = fh; | ||
| 239 | |||
| 240 | /* the reason we do this adjustment is because we want to acquire | ||
| 241 | * more framebuffer memory without imposing custom awareness on the | ||
| 242 | * underlying pxafb driver */ | ||
| 243 | am200_fb_info.modes->yres = DIV_ROUND_UP(totalsize, fw); | ||
| 244 | |||
| 245 | /* we divide since we told the LCD controller we're 16bpp */ | ||
| 246 | am200_fb_info.modes->xres /= 2; | ||
| 247 | |||
| 248 | set_pxa_fb_info(&am200_fb_info); | ||
| 249 | |||
| 250 | } | ||
| 251 | |||
| 252 | /* this gets called by metronomefb as part of its init, in our case, we | ||
| 253 | * have already completed initial framebuffer init in presetup_fb so we | ||
| 254 | * can just setup the fb access pointers */ | ||
| 255 | static int am200_setup_fb(struct metronomefb_par *par) | ||
| 256 | { | ||
| 257 | int fw; | ||
| 258 | int fh; | ||
| 259 | |||
| 260 | fw = am200_board.fw; | ||
| 261 | fh = am200_board.fh; | ||
| 262 | |||
| 263 | /* metromem was set up by the notifier in share_video_mem so now | ||
| 264 | * we can use its value to calculate the other entries */ | ||
| 265 | par->metromem_cmd = (struct metromem_cmd *) am200_board.metromem; | ||
| 266 | par->metromem_wfm = am200_board.metromem + fw; | ||
| 267 | par->metromem_img = par->metromem_wfm + am200_board.wfm_size; | ||
| 268 | par->metromem_img_csum = (u16 *) (par->metromem_img + (fw * fh)); | ||
| 269 | par->metromem_dma = am200_board.host_fbinfo->fix.smem_start; | ||
| 270 | |||
| 271 | return 0; | ||
| 272 | } | ||
| 273 | |||
| 274 | static int am200_get_panel_type(void) | ||
| 275 | { | ||
| 276 | return panel_type; | ||
| 277 | } | ||
| 278 | |||
| 279 | static irqreturn_t am200_handle_irq(int irq, void *dev_id) | ||
| 280 | { | ||
| 281 | struct metronomefb_par *par = dev_id; | ||
| 282 | |||
| 283 | wake_up_interruptible(&par->waitq); | ||
| 284 | return IRQ_HANDLED; | ||
| 285 | } | ||
| 286 | |||
| 287 | static int am200_setup_irq(struct fb_info *info) | ||
| 288 | { | ||
| 289 | int ret; | ||
| 290 | |||
| 291 | ret = request_irq(IRQ_GPIO(RDY_GPIO_PIN), am200_handle_irq, | ||
| 292 | IRQF_DISABLED|IRQF_TRIGGER_FALLING, | ||
| 293 | "AM200", info->par); | ||
| 294 | if (ret) | ||
| 295 | dev_err(&am200_device->dev, "request_irq failed: %d\n", ret); | ||
| 296 | |||
| 297 | return ret; | ||
| 298 | } | ||
| 299 | |||
| 300 | static void am200_set_rst(struct metronomefb_par *par, int state) | ||
| 301 | { | ||
| 302 | gpio_set_value(RST_GPIO_PIN, state); | ||
| 303 | } | ||
| 304 | |||
| 305 | static void am200_set_stdby(struct metronomefb_par *par, int state) | ||
| 306 | { | ||
| 307 | gpio_set_value(STDBY_GPIO_PIN, state); | ||
| 308 | } | ||
| 309 | |||
| 310 | static int am200_wait_event(struct metronomefb_par *par) | ||
| 311 | { | ||
| 312 | return wait_event_timeout(par->waitq, gpio_get_value(RDY_GPIO_PIN), HZ); | ||
| 313 | } | ||
| 314 | |||
| 315 | static int am200_wait_event_intr(struct metronomefb_par *par) | ||
| 316 | { | ||
| 317 | return wait_event_interruptible_timeout(par->waitq, | ||
| 318 | gpio_get_value(RDY_GPIO_PIN), HZ); | ||
| 319 | } | ||
| 320 | |||
| 321 | static struct metronome_board am200_board = { | ||
| 322 | .owner = THIS_MODULE, | ||
| 323 | .setup_irq = am200_setup_irq, | ||
| 324 | .setup_io = am200_init_gpio_regs, | ||
| 325 | .setup_fb = am200_setup_fb, | ||
| 326 | .set_rst = am200_set_rst, | ||
| 327 | .set_stdby = am200_set_stdby, | ||
| 328 | .met_wait_event = am200_wait_event, | ||
| 329 | .met_wait_event_intr = am200_wait_event_intr, | ||
| 330 | .get_panel_type = am200_get_panel_type, | ||
| 331 | .cleanup = am200_cleanup, | ||
| 332 | }; | ||
| 333 | |||
| 334 | static int __init am200_init(void) | ||
| 335 | { | ||
| 336 | int ret; | ||
| 337 | |||
| 338 | /* before anything else, we request notification for any fb | ||
| 339 | * creation events */ | ||
| 340 | fb_register_client(&am200_fb_notif); | ||
| 341 | |||
| 342 | /* request our platform independent driver */ | ||
| 343 | request_module("metronomefb"); | ||
| 344 | |||
| 345 | am200_device = platform_device_alloc("metronomefb", -1); | ||
| 346 | if (!am200_device) | ||
| 347 | return -ENOMEM; | ||
| 348 | |||
| 349 | /* the am200_board that will be seen by metronomefb is a copy */ | ||
| 350 | platform_device_add_data(am200_device, &am200_board, | ||
| 351 | sizeof(am200_board)); | ||
| 352 | |||
| 353 | /* this _add binds metronomefb to am200. metronomefb refcounts am200 */ | ||
| 354 | ret = platform_device_add(am200_device); | ||
| 355 | |||
| 356 | if (ret) { | ||
| 357 | platform_device_put(am200_device); | ||
| 358 | fb_unregister_client(&am200_fb_notif); | ||
| 359 | return ret; | ||
| 360 | } | ||
| 361 | |||
| 362 | am200_presetup_fb(); | ||
| 363 | |||
| 364 | return 0; | ||
| 365 | } | ||
| 366 | |||
| 367 | module_param(panel_type, uint, 0); | ||
| 368 | MODULE_PARM_DESC(panel_type, "Select the panel type: 6, 8, 97"); | ||
| 369 | |||
| 370 | module_init(am200_init); | ||
| 371 | |||
| 372 | MODULE_DESCRIPTION("board driver for am200 metronome epd kit"); | ||
| 373 | MODULE_AUTHOR("Jaya Kumar"); | ||
| 374 | MODULE_LICENSE("GPL"); | ||
diff --git a/arch/arm/mach-pxa/cm-x255.c b/arch/arm/mach-pxa/cm-x255.c new file mode 100644 index 000000000000..83a4cdf08176 --- /dev/null +++ b/arch/arm/mach-pxa/cm-x255.c | |||
| @@ -0,0 +1,258 @@ | |||
| 1 | /* | ||
| 2 | * linux/arch/arm/mach-pxa/cm-x255.c | ||
| 3 | * | ||
| 4 | * Copyright (C) 2007, 2008 CompuLab, Ltd. | ||
| 5 | * Mike Rapoport <mike@compulab.co.il> | ||
| 6 | * | ||
| 7 | * This program is free software; you can redistribute it and/or modify | ||
| 8 | * it under the terms of the GNU General Public License version 2 as | ||
| 9 | * published by the Free Software Foundation. | ||
| 10 | */ | ||
| 11 | |||
| 12 | #include <linux/platform_device.h> | ||
| 13 | #include <linux/irq.h> | ||
| 14 | #include <linux/gpio.h> | ||
| 15 | #include <linux/mtd/partitions.h> | ||
| 16 | #include <linux/mtd/physmap.h> | ||
| 17 | #include <linux/mtd/nand-gpio.h> | ||
| 18 | |||
| 19 | #include <linux/spi/spi.h> | ||
| 20 | |||
| 21 | #include <asm/mach/arch.h> | ||
| 22 | #include <asm/mach-types.h> | ||
| 23 | #include <asm/mach/map.h> | ||
| 24 | |||
| 25 | #include <mach/pxa2xx-regs.h> | ||
| 26 | #include <mach/mfp-pxa25x.h> | ||
| 27 | #include <mach/pxa2xx_spi.h> | ||
| 28 | #include <mach/bitfield.h> | ||
| 29 | |||
| 30 | #include "generic.h" | ||
| 31 | |||
| 32 | #define GPIO_NAND_CS (5) | ||
| 33 | #define GPIO_NAND_ALE (4) | ||
| 34 | #define GPIO_NAND_CLE (3) | ||
| 35 | #define GPIO_NAND_RB (10) | ||
| 36 | |||
| 37 | static unsigned long cmx255_pin_config[] = { | ||
| 38 | /* AC'97 */ | ||
| 39 | GPIO28_AC97_BITCLK, | ||
| 40 | GPIO29_AC97_SDATA_IN_0, | ||
| 41 | GPIO30_AC97_SDATA_OUT, | ||
| 42 | GPIO31_AC97_SYNC, | ||
| 43 | |||
| 44 | /* BTUART */ | ||
| 45 | GPIO42_BTUART_RXD, | ||
| 46 | GPIO43_BTUART_TXD, | ||
| 47 | GPIO44_BTUART_CTS, | ||
| 48 | GPIO45_BTUART_RTS, | ||
| 49 | |||
| 50 | /* STUART */ | ||
| 51 | GPIO46_STUART_RXD, | ||
| 52 | GPIO47_STUART_TXD, | ||
| 53 | |||
| 54 | /* LCD */ | ||
| 55 | GPIO58_LCD_LDD_0, | ||
| 56 | GPIO59_LCD_LDD_1, | ||
| 57 | GPIO60_LCD_LDD_2, | ||
| 58 | GPIO61_LCD_LDD_3, | ||
| 59 | GPIO62_LCD_LDD_4, | ||
| 60 | GPIO63_LCD_LDD_5, | ||
| 61 | GPIO64_LCD_LDD_6, | ||
| 62 | GPIO65_LCD_LDD_7, | ||
| 63 | GPIO66_LCD_LDD_8, | ||
| 64 | GPIO67_LCD_LDD_9, | ||
| 65 | GPIO68_LCD_LDD_10, | ||
| 66 | GPIO69_LCD_LDD_11, | ||
| 67 | GPIO70_LCD_LDD_12, | ||
| 68 | GPIO71_LCD_LDD_13, | ||
| 69 | GPIO72_LCD_LDD_14, | ||
| 70 | GPIO73_LCD_LDD_15, | ||
| 71 | GPIO74_LCD_FCLK, | ||
| 72 | GPIO75_LCD_LCLK, | ||
| 73 | GPIO76_LCD_PCLK, | ||
| 74 | GPIO77_LCD_BIAS, | ||
| 75 | |||
| 76 | /* SSP1 */ | ||
| 77 | GPIO23_SSP1_SCLK, | ||
| 78 | GPIO24_SSP1_SFRM, | ||
| 79 | GPIO25_SSP1_TXD, | ||
| 80 | GPIO26_SSP1_RXD, | ||
| 81 | |||
| 82 | /* SSP2 */ | ||
| 83 | GPIO81_SSP2_CLK_OUT, | ||
| 84 | GPIO82_SSP2_FRM_OUT, | ||
| 85 | GPIO83_SSP2_TXD, | ||
| 86 | GPIO84_SSP2_RXD, | ||
| 87 | |||
| 88 | /* PC Card */ | ||
| 89 | GPIO48_nPOE, | ||
| 90 | GPIO49_nPWE, | ||
| 91 | GPIO50_nPIOR, | ||
| 92 | GPIO51_nPIOW, | ||
| 93 | GPIO52_nPCE_1, | ||
| 94 | GPIO53_nPCE_2, | ||
| 95 | GPIO54_nPSKTSEL, | ||
| 96 | GPIO55_nPREG, | ||
| 97 | GPIO56_nPWAIT, | ||
| 98 | GPIO57_nIOIS16, | ||
| 99 | |||
| 100 | /* SDRAM and local bus */ | ||
| 101 | GPIO15_nCS_1, | ||
| 102 | GPIO78_nCS_2, | ||
| 103 | GPIO79_nCS_3, | ||
| 104 | GPIO80_nCS_4, | ||
| 105 | GPIO33_nCS_5, | ||
| 106 | GPIO18_RDY, | ||
| 107 | |||
| 108 | /* GPIO */ | ||
| 109 | GPIO0_GPIO | WAKEUP_ON_EDGE_BOTH, | ||
| 110 | GPIO9_GPIO, /* PC card reset */ | ||
| 111 | |||
| 112 | /* NAND controls */ | ||
| 113 | GPIO5_GPIO | MFP_LPM_DRIVE_HIGH, /* NAND CE# */ | ||
| 114 | GPIO4_GPIO | MFP_LPM_DRIVE_LOW, /* NAND ALE */ | ||
| 115 | GPIO3_GPIO | MFP_LPM_DRIVE_LOW, /* NAND CLE */ | ||
| 116 | GPIO10_GPIO, /* NAND Ready/Busy */ | ||
| 117 | |||
| 118 | /* interrupts */ | ||
| 119 | GPIO22_GPIO, /* DM9000 interrupt */ | ||
| 120 | }; | ||
| 121 | |||
| 122 | #if defined(CONFIG_SPI_PXA2XX) | ||
| 123 | static struct pxa2xx_spi_master pxa_ssp_master_info = { | ||
| 124 | .num_chipselect = 1, | ||
| 125 | }; | ||
| 126 | |||
| 127 | static struct spi_board_info spi_board_info[] __initdata = { | ||
| 128 | [0] = { | ||
| 129 | .modalias = "rtc-max6902", | ||
| 130 | .max_speed_hz = 1000000, | ||
| 131 | .bus_num = 1, | ||
| 132 | .chip_select = 0, | ||
| 133 | }, | ||
| 134 | }; | ||
| 135 | |||
| 136 | static void __init cmx255_init_rtc(void) | ||
| 137 | { | ||
| 138 | pxa2xx_set_spi_info(1, &pxa_ssp_master_info); | ||
| 139 | spi_register_board_info(ARRAY_AND_SIZE(spi_board_info)); | ||
| 140 | } | ||
| 141 | #else | ||
| 142 | static inline void cmx255_init_rtc(void) {} | ||
| 143 | #endif | ||
| 144 | |||
| 145 | #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE) | ||
| 146 | static struct mtd_partition cmx255_nor_partitions[] = { | ||
| 147 | { | ||
| 148 | .name = "ARMmon", | ||
| 149 | .size = 0x00030000, | ||
| 150 | .offset = 0, | ||
| 151 | .mask_flags = MTD_WRITEABLE /* force read-only */ | ||
| 152 | } , { | ||
| 153 | .name = "ARMmon setup block", | ||
| 154 | .size = 0x00010000, | ||
| 155 | .offset = MTDPART_OFS_APPEND, | ||
| 156 | .mask_flags = MTD_WRITEABLE /* force read-only */ | ||
| 157 | } , { | ||
| 158 | .name = "kernel", | ||
| 159 | .size = 0x00160000, | ||
| 160 | .offset = MTDPART_OFS_APPEND, | ||
| 161 | } , { | ||
| 162 | .name = "ramdisk", | ||
| 163 | .size = MTDPART_SIZ_FULL, | ||
| 164 | .offset = MTDPART_OFS_APPEND | ||
| 165 | } | ||
| 166 | }; | ||
| 167 | |||
| 168 | static struct physmap_flash_data cmx255_nor_flash_data[] = { | ||
| 169 | { | ||
| 170 | .width = 2, /* bankwidth in bytes */ | ||
| 171 | .parts = cmx255_nor_partitions, | ||
| 172 | .nr_parts = ARRAY_SIZE(cmx255_nor_partitions) | ||
| 173 | } | ||
| 174 | }; | ||
| 175 | |||
| 176 | static struct resource cmx255_nor_resource = { | ||
| 177 | .start = PXA_CS0_PHYS, | ||
| 178 | .end = PXA_CS0_PHYS + SZ_8M - 1, | ||
| 179 | .flags = IORESOURCE_MEM, | ||
| 180 | }; | ||
| 181 | |||
| 182 | static struct platform_device cmx255_nor = { | ||
| 183 | .name = "physmap-flash", | ||
| 184 | .id = -1, | ||
| 185 | .dev = { | ||
| 186 | .platform_data = cmx255_nor_flash_data, | ||
| 187 | }, | ||
| 188 | .resource = &cmx255_nor_resource, | ||
| 189 | .num_resources = 1, | ||
| 190 | }; | ||
| 191 | |||
| 192 | static void __init cmx255_init_nor(void) | ||
| 193 | { | ||
| 194 | platform_device_register(&cmx255_nor); | ||
| 195 | } | ||
| 196 | #else | ||
| 197 | static inline void cmx255_init_nor(void) {} | ||
| 198 | #endif | ||
| 199 | |||
| 200 | #if defined(CONFIG_MTD_NAND_GPIO) || defined(CONFIG_MTD_NAND_GPIO_MODULE) | ||
| 201 | static struct resource cmx255_nand_resource[] = { | ||
| 202 | [0] = { | ||
| 203 | .start = PXA_CS1_PHYS, | ||
| 204 | .end = PXA_CS1_PHYS + 11, | ||
| 205 | .flags = IORESOURCE_MEM, | ||
| 206 | }, | ||
| 207 | [1] = { | ||
| 208 | .start = PXA_CS5_PHYS, | ||
| 209 | .end = PXA_CS5_PHYS + 3, | ||
| 210 | .flags = IORESOURCE_MEM, | ||
| 211 | }, | ||
| 212 | }; | ||
| 213 | |||
| 214 | static struct mtd_partition cmx255_nand_parts[] = { | ||
| 215 | [0] = { | ||
| 216 | .name = "cmx255-nand", | ||
| 217 | .size = MTDPART_SIZ_FULL, | ||
| 218 | .offset = 0, | ||
| 219 | }, | ||
| 220 | }; | ||
| 221 | |||
| 222 | static struct gpio_nand_platdata cmx255_nand_platdata = { | ||
| 223 | .gpio_nce = GPIO_NAND_CS, | ||
| 224 | .gpio_cle = GPIO_NAND_CLE, | ||
| 225 | .gpio_ale = GPIO_NAND_ALE, | ||
| 226 | .gpio_rdy = GPIO_NAND_RB, | ||
| 227 | .gpio_nwp = -1, | ||
| 228 | .parts = cmx255_nand_parts, | ||
| 229 | .num_parts = ARRAY_SIZE(cmx255_nand_parts), | ||
| 230 | .chip_delay = 25, | ||
| 231 | }; | ||
| 232 | |||
| 233 | static struct platform_device cmx255_nand = { | ||
| 234 | .name = "gpio-nand", | ||
| 235 | .num_resources = ARRAY_SIZE(cmx255_nand_resource), | ||
| 236 | .resource = cmx255_nand_resource, | ||
| 237 | .id = -1, | ||
| 238 | .dev = { | ||
| 239 | .platform_data = &cmx255_nand_platdata, | ||
| 240 | } | ||
| 241 | }; | ||
| 242 | |||
| 243 | static void __init cmx255_init_nand(void) | ||
| 244 | { | ||
| 245 | platform_device_register(&cmx255_nand); | ||
| 246 | } | ||
| 247 | #else | ||
| 248 | static inline void cmx255_init_nand(void) {} | ||
| 249 | #endif | ||
| 250 | |||
| 251 | void __init cmx255_init(void) | ||
| 252 | { | ||
| 253 | pxa2xx_mfp_config(ARRAY_AND_SIZE(cmx255_pin_config)); | ||
| 254 | |||
| 255 | cmx255_init_rtc(); | ||
| 256 | cmx255_init_nor(); | ||
| 257 | cmx255_init_nand(); | ||
| 258 | } | ||
diff --git a/arch/arm/mach-pxa/cm-x270-pci.h b/arch/arm/mach-pxa/cm-x270-pci.h deleted file mode 100644 index 48f532f4cb51..000000000000 --- a/arch/arm/mach-pxa/cm-x270-pci.h +++ /dev/null | |||
| @@ -1,13 +0,0 @@ | |||
| 1 | extern void __cmx270_pci_init_irq(int irq_gpio); | ||
| 2 | extern void __cmx270_pci_suspend(void); | ||
| 3 | extern void __cmx270_pci_resume(void); | ||
| 4 | |||
| 5 | #ifdef CONFIG_PCI | ||
| 6 | #define cmx270_pci_init_irq(x) __cmx270_pci_init_irq(x) | ||
| 7 | #define cmx270_pci_suspend(x) __cmx270_pci_suspend(x) | ||
| 8 | #define cmx270_pci_resume(x) __cmx270_pci_resume(x) | ||
| 9 | #else | ||
| 10 | #define cmx270_pci_init_irq(x) do {} while (0) | ||
| 11 | #define cmx270_pci_suspend(x) do {} while (0) | ||
| 12 | #define cmx270_pci_resume(x) do {} while (0) | ||
| 13 | #endif | ||
diff --git a/arch/arm/mach-pxa/cm-x270.c b/arch/arm/mach-pxa/cm-x270.c index af003a269534..a82dad1a8cc8 100644 --- a/arch/arm/mach-pxa/cm-x270.c +++ b/arch/arm/mach-pxa/cm-x270.c | |||
| @@ -14,46 +14,22 @@ | |||
| 14 | #include <linux/irq.h> | 14 | #include <linux/irq.h> |
| 15 | #include <linux/gpio.h> | 15 | #include <linux/gpio.h> |
| 16 | 16 | ||
| 17 | #include <linux/dm9000.h> | ||
| 18 | #include <linux/rtc-v3020.h> | 17 | #include <linux/rtc-v3020.h> |
| 19 | #include <video/mbxfb.h> | 18 | #include <video/mbxfb.h> |
| 20 | #include <linux/leds.h> | ||
| 21 | 19 | ||
| 22 | #include <asm/mach/arch.h> | ||
| 23 | #include <asm/mach-types.h> | ||
| 24 | #include <asm/mach/map.h> | ||
| 25 | |||
| 26 | #include <mach/pxa2xx-regs.h> | ||
| 27 | #include <mach/mfp-pxa27x.h> | 20 | #include <mach/mfp-pxa27x.h> |
| 28 | #include <mach/pxa-regs.h> | ||
| 29 | #include <mach/audio.h> | ||
| 30 | #include <mach/pxafb.h> | ||
| 31 | #include <mach/ohci.h> | 21 | #include <mach/ohci.h> |
| 32 | #include <mach/mmc.h> | 22 | #include <mach/mmc.h> |
| 33 | #include <mach/bitfield.h> | ||
| 34 | |||
| 35 | #include <asm/hardware/it8152.h> | ||
| 36 | 23 | ||
| 37 | #include "generic.h" | 24 | #include "generic.h" |
| 38 | #include "cm-x270-pci.h" | ||
| 39 | |||
| 40 | /* virtual addresses for statically mapped regions */ | ||
| 41 | #define CMX270_VIRT_BASE (0xe8000000) | ||
| 42 | #define CMX270_IT8152_VIRT (CMX270_VIRT_BASE) | ||
| 43 | 25 | ||
| 26 | /* physical address if local-bus attached devices */ | ||
| 44 | #define RTC_PHYS_BASE (PXA_CS1_PHYS + (5 << 22)) | 27 | #define RTC_PHYS_BASE (PXA_CS1_PHYS + (5 << 22)) |
| 45 | #define DM9000_PHYS_BASE (PXA_CS1_PHYS + (6 << 22)) | ||
| 46 | 28 | ||
| 47 | /* GPIO IRQ usage */ | 29 | /* GPIO IRQ usage */ |
| 48 | #define GPIO10_ETHIRQ (10) | ||
| 49 | #define GPIO22_IT8152_IRQ (22) | ||
| 50 | #define GPIO83_MMC_IRQ (83) | 30 | #define GPIO83_MMC_IRQ (83) |
| 51 | #define GPIO95_GFXIRQ (95) | ||
| 52 | 31 | ||
| 53 | #define CMX270_ETHIRQ IRQ_GPIO(GPIO10_ETHIRQ) | ||
| 54 | #define CMX270_IT8152_IRQ IRQ_GPIO(GPIO22_IT8152_IRQ) | ||
| 55 | #define CMX270_MMC_IRQ IRQ_GPIO(GPIO83_MMC_IRQ) | 32 | #define CMX270_MMC_IRQ IRQ_GPIO(GPIO83_MMC_IRQ) |
| 56 | #define CMX270_GFXIRQ IRQ_GPIO(GPIO95_GFXIRQ) | ||
| 57 | 33 | ||
| 58 | /* MMC power enable */ | 34 | /* MMC power enable */ |
| 59 | #define GPIO105_MMC_POWER (105) | 35 | #define GPIO105_MMC_POWER (105) |
| @@ -157,62 +133,6 @@ static unsigned long cmx270_pin_config[] = { | |||
| 157 | GPIO83_GPIO, /* MMC card detect */ | 133 | GPIO83_GPIO, /* MMC card detect */ |
| 158 | }; | 134 | }; |
| 159 | 135 | ||
| 160 | #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE) | ||
| 161 | static struct resource cmx270_dm9000_resource[] = { | ||
| 162 | [0] = { | ||
| 163 | .start = DM9000_PHYS_BASE, | ||
| 164 | .end = DM9000_PHYS_BASE + 4, | ||
| 165 | .flags = IORESOURCE_MEM, | ||
| 166 | }, | ||
| 167 | [1] = { | ||
| 168 | .start = DM9000_PHYS_BASE + 8, | ||
| 169 | .end = DM9000_PHYS_BASE + 8 + 500, | ||
| 170 | .flags = IORESOURCE_MEM, | ||
| 171 | }, | ||
| 172 | [2] = { | ||
| 173 | .start = CMX270_ETHIRQ, | ||
| 174 | .end = CMX270_ETHIRQ, | ||
| 175 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, | ||
| 176 | } | ||
| 177 | }; | ||
| 178 | |||
| 179 | static struct dm9000_plat_data cmx270_dm9000_platdata = { | ||
| 180 | .flags = DM9000_PLATF_32BITONLY, | ||
| 181 | }; | ||
| 182 | |||
| 183 | static struct platform_device cmx270_dm9000_device = { | ||
| 184 | .name = "dm9000", | ||
| 185 | .id = 0, | ||
| 186 | .num_resources = ARRAY_SIZE(cmx270_dm9000_resource), | ||
| 187 | .resource = cmx270_dm9000_resource, | ||
| 188 | .dev = { | ||
| 189 | .platform_data = &cmx270_dm9000_platdata, | ||
| 190 | } | ||
| 191 | }; | ||
| 192 | |||
| 193 | static void __init cmx270_init_dm9000(void) | ||
| 194 | { | ||
| 195 | platform_device_register(&cmx270_dm9000_device); | ||
| 196 | } | ||
| 197 | #else | ||
| 198 | static inline void cmx270_init_dm9000(void) {} | ||
| 199 | #endif | ||
| 200 | |||
| 201 | /* UCB1400 touchscreen controller */ | ||
| 202 | #if defined(CONFIG_TOUCHSCREEN_UCB1400) || defined(CONFIG_TOUCHSCREEN_UCB1400_MODULE) | ||
| 203 | static struct platform_device cmx270_ts_device = { | ||
| 204 | .name = "ucb1400_ts", | ||
| 205 | .id = -1, | ||
| 206 | }; | ||
| 207 | |||
| 208 | static void __init cmx270_init_touchscreen(void) | ||
| 209 | { | ||
| 210 | platform_device_register(&cmx270_ts_device); | ||
| 211 | } | ||
| 212 | #else | ||
| 213 | static inline void cmx270_init_touchscreen(void) {} | ||
| 214 | #endif | ||
| 215 | |||
| 216 | /* V3020 RTC */ | 136 | /* V3020 RTC */ |
| 217 | #if defined(CONFIG_RTC_DRV_V3020) || defined(CONFIG_RTC_DRV_V3020_MODULE) | 137 | #if defined(CONFIG_RTC_DRV_V3020) || defined(CONFIG_RTC_DRV_V3020_MODULE) |
| 218 | static struct resource cmx270_v3020_resource[] = { | 138 | static struct resource cmx270_v3020_resource[] = { |
| @@ -242,45 +162,7 @@ static void __init cmx270_init_rtc(void) | |||
| 242 | platform_device_register(&cmx270_rtc_device); | 162 | platform_device_register(&cmx270_rtc_device); |
| 243 | } | 163 | } |
| 244 | #else | 164 | #else |
| 245 | static inline void cmx270_init_rtc(void) {} | 165 | static inline void cmx2xx_init_rtc(void) {} |
| 246 | #endif | ||
| 247 | |||
| 248 | /* CM-X270 LEDs */ | ||
| 249 | #if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE) | ||
| 250 | static struct gpio_led cmx270_leds[] = { | ||
| 251 | [0] = { | ||
| 252 | .name = "cm-x270:red", | ||
| 253 | .default_trigger = "nand-disk", | ||
| 254 | .gpio = 93, | ||
| 255 | .active_low = 1, | ||
| 256 | }, | ||
| 257 | [1] = { | ||
| 258 | .name = "cm-x270:green", | ||
| 259 | .default_trigger = "heartbeat", | ||
| 260 | .gpio = 94, | ||
| 261 | .active_low = 1, | ||
| 262 | }, | ||
| 263 | }; | ||
| 264 | |||
| 265 | static struct gpio_led_platform_data cmx270_gpio_led_pdata = { | ||
| 266 | .num_leds = ARRAY_SIZE(cmx270_leds), | ||
| 267 | .leds = cmx270_leds, | ||
| 268 | }; | ||
| 269 | |||
| 270 | static struct platform_device cmx270_led_device = { | ||
| 271 | .name = "leds-gpio", | ||
| 272 | .id = -1, | ||
| 273 | .dev = { | ||
| 274 | .platform_data = &cmx270_gpio_led_pdata, | ||
| 275 | }, | ||
| 276 | }; | ||
| 277 | |||
| 278 | static void __init cmx270_init_leds(void) | ||
| 279 | { | ||
| 280 | platform_device_register(&cmx270_led_device); | ||
| 281 | } | ||
| 282 | #else | ||
| 283 | static inline void cmx270_init_leds(void) {} | ||
| 284 | #endif | 166 | #endif |
| 285 | 167 | ||
| 286 | /* 2700G graphics */ | 168 | /* 2700G graphics */ |
| @@ -373,238 +255,11 @@ static void __init cmx270_init_2700G(void) | |||
| 373 | static inline void cmx270_init_2700G(void) {} | 255 | static inline void cmx270_init_2700G(void) {} |
| 374 | #endif | 256 | #endif |
| 375 | 257 | ||
| 376 | #if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE) | ||
| 377 | /* | ||
| 378 | Display definitions | ||
| 379 | keep these for backwards compatibility, although symbolic names (as | ||
| 380 | e.g. in lpd270.c) looks better | ||
| 381 | */ | ||
| 382 | #define MTYPE_STN320x240 0 | ||
| 383 | #define MTYPE_TFT640x480 1 | ||
| 384 | #define MTYPE_CRT640x480 2 | ||
| 385 | #define MTYPE_CRT800x600 3 | ||
| 386 | #define MTYPE_TFT320x240 6 | ||
| 387 | #define MTYPE_STN640x480 7 | ||
| 388 | |||
| 389 | static struct pxafb_mode_info generic_stn_320x240_mode = { | ||
| 390 | .pixclock = 76923, | ||
| 391 | .bpp = 8, | ||
| 392 | .xres = 320, | ||
| 393 | .yres = 240, | ||
| 394 | .hsync_len = 3, | ||
| 395 | .vsync_len = 2, | ||
| 396 | .left_margin = 3, | ||
| 397 | .upper_margin = 0, | ||
| 398 | .right_margin = 3, | ||
| 399 | .lower_margin = 0, | ||
| 400 | .sync = (FB_SYNC_HOR_HIGH_ACT | | ||
| 401 | FB_SYNC_VERT_HIGH_ACT), | ||
| 402 | .cmap_greyscale = 0, | ||
| 403 | }; | ||
| 404 | |||
| 405 | static struct pxafb_mach_info generic_stn_320x240 = { | ||
| 406 | .modes = &generic_stn_320x240_mode, | ||
| 407 | .num_modes = 1, | ||
| 408 | .lccr0 = 0, | ||
| 409 | .lccr3 = (LCCR3_PixClkDiv(0x03) | | ||
| 410 | LCCR3_Acb(0xff) | | ||
| 411 | LCCR3_PCP), | ||
| 412 | .cmap_inverse = 0, | ||
| 413 | .cmap_static = 0, | ||
| 414 | }; | ||
| 415 | |||
| 416 | static struct pxafb_mode_info generic_tft_640x480_mode = { | ||
| 417 | .pixclock = 38461, | ||
| 418 | .bpp = 8, | ||
| 419 | .xres = 640, | ||
| 420 | .yres = 480, | ||
| 421 | .hsync_len = 60, | ||
| 422 | .vsync_len = 2, | ||
| 423 | .left_margin = 70, | ||
| 424 | .upper_margin = 10, | ||
| 425 | .right_margin = 70, | ||
| 426 | .lower_margin = 5, | ||
| 427 | .sync = 0, | ||
| 428 | .cmap_greyscale = 0, | ||
| 429 | }; | ||
| 430 | |||
| 431 | static struct pxafb_mach_info generic_tft_640x480 = { | ||
| 432 | .modes = &generic_tft_640x480_mode, | ||
| 433 | .num_modes = 1, | ||
| 434 | .lccr0 = (LCCR0_PAS), | ||
| 435 | .lccr3 = (LCCR3_PixClkDiv(0x01) | | ||
| 436 | LCCR3_Acb(0xff) | | ||
| 437 | LCCR3_PCP), | ||
| 438 | .cmap_inverse = 0, | ||
| 439 | .cmap_static = 0, | ||
| 440 | }; | ||
| 441 | |||
| 442 | static struct pxafb_mode_info generic_crt_640x480_mode = { | ||
| 443 | .pixclock = 38461, | ||
| 444 | .bpp = 8, | ||
| 445 | .xres = 640, | ||
| 446 | .yres = 480, | ||
| 447 | .hsync_len = 63, | ||
| 448 | .vsync_len = 2, | ||
| 449 | .left_margin = 81, | ||
| 450 | .upper_margin = 33, | ||
| 451 | .right_margin = 16, | ||
| 452 | .lower_margin = 10, | ||
| 453 | .sync = (FB_SYNC_HOR_HIGH_ACT | | ||
| 454 | FB_SYNC_VERT_HIGH_ACT), | ||
| 455 | .cmap_greyscale = 0, | ||
| 456 | }; | ||
| 457 | |||
| 458 | static struct pxafb_mach_info generic_crt_640x480 = { | ||
| 459 | .modes = &generic_crt_640x480_mode, | ||
| 460 | .num_modes = 1, | ||
| 461 | .lccr0 = (LCCR0_PAS), | ||
| 462 | .lccr3 = (LCCR3_PixClkDiv(0x01) | | ||
| 463 | LCCR3_Acb(0xff)), | ||
| 464 | .cmap_inverse = 0, | ||
| 465 | .cmap_static = 0, | ||
| 466 | }; | ||
| 467 | |||
| 468 | static struct pxafb_mode_info generic_crt_800x600_mode = { | ||
| 469 | .pixclock = 28846, | ||
| 470 | .bpp = 8, | ||
| 471 | .xres = 800, | ||
| 472 | .yres = 600, | ||
| 473 | .hsync_len = 63, | ||
| 474 | .vsync_len = 2, | ||
| 475 | .left_margin = 26, | ||
| 476 | .upper_margin = 21, | ||
| 477 | .right_margin = 26, | ||
| 478 | .lower_margin = 11, | ||
| 479 | .sync = (FB_SYNC_HOR_HIGH_ACT | | ||
| 480 | FB_SYNC_VERT_HIGH_ACT), | ||
| 481 | .cmap_greyscale = 0, | ||
| 482 | }; | ||
| 483 | |||
| 484 | static struct pxafb_mach_info generic_crt_800x600 = { | ||
| 485 | .modes = &generic_crt_800x600_mode, | ||
| 486 | .num_modes = 1, | ||
| 487 | .lccr0 = (LCCR0_PAS), | ||
| 488 | .lccr3 = (LCCR3_PixClkDiv(0x02) | | ||
| 489 | LCCR3_Acb(0xff)), | ||
| 490 | .cmap_inverse = 0, | ||
| 491 | .cmap_static = 0, | ||
| 492 | }; | ||
| 493 | |||
| 494 | static struct pxafb_mode_info generic_tft_320x240_mode = { | ||
| 495 | .pixclock = 134615, | ||
| 496 | .bpp = 16, | ||
| 497 | .xres = 320, | ||
| 498 | .yres = 240, | ||
| 499 | .hsync_len = 63, | ||
| 500 | .vsync_len = 7, | ||
| 501 | .left_margin = 75, | ||
| 502 | .upper_margin = 0, | ||
| 503 | .right_margin = 15, | ||
| 504 | .lower_margin = 15, | ||
| 505 | .sync = 0, | ||
| 506 | .cmap_greyscale = 0, | ||
| 507 | }; | ||
| 508 | |||
| 509 | static struct pxafb_mach_info generic_tft_320x240 = { | ||
| 510 | .modes = &generic_tft_320x240_mode, | ||
| 511 | .num_modes = 1, | ||
| 512 | .lccr0 = (LCCR0_PAS), | ||
| 513 | .lccr3 = (LCCR3_PixClkDiv(0x06) | | ||
| 514 | LCCR3_Acb(0xff) | | ||
| 515 | LCCR3_PCP), | ||
| 516 | .cmap_inverse = 0, | ||
| 517 | .cmap_static = 0, | ||
| 518 | }; | ||
| 519 | |||
| 520 | static struct pxafb_mode_info generic_stn_640x480_mode = { | ||
| 521 | .pixclock = 57692, | ||
| 522 | .bpp = 8, | ||
| 523 | .xres = 640, | ||
| 524 | .yres = 480, | ||
| 525 | .hsync_len = 4, | ||
| 526 | .vsync_len = 2, | ||
| 527 | .left_margin = 10, | ||
| 528 | .upper_margin = 5, | ||
| 529 | .right_margin = 10, | ||
| 530 | .lower_margin = 5, | ||
| 531 | .sync = (FB_SYNC_HOR_HIGH_ACT | | ||
| 532 | FB_SYNC_VERT_HIGH_ACT), | ||
| 533 | .cmap_greyscale = 0, | ||
| 534 | }; | ||
| 535 | |||
| 536 | static struct pxafb_mach_info generic_stn_640x480 = { | ||
| 537 | .modes = &generic_stn_640x480_mode, | ||
| 538 | .num_modes = 1, | ||
| 539 | .lccr0 = 0, | ||
| 540 | .lccr3 = (LCCR3_PixClkDiv(0x02) | | ||
| 541 | LCCR3_Acb(0xff)), | ||
| 542 | .cmap_inverse = 0, | ||
| 543 | .cmap_static = 0, | ||
| 544 | }; | ||
| 545 | |||
| 546 | static struct pxafb_mach_info *cmx270_display = &generic_crt_640x480; | ||
| 547 | |||
| 548 | static int __init cmx270_set_display(char *str) | ||
| 549 | { | ||
| 550 | int disp_type = simple_strtol(str, NULL, 0); | ||
| 551 | switch (disp_type) { | ||
| 552 | case MTYPE_STN320x240: | ||
| 553 | cmx270_display = &generic_stn_320x240; | ||
| 554 | break; | ||
| 555 | case MTYPE_TFT640x480: | ||
| 556 | cmx270_display = &generic_tft_640x480; | ||
| 557 | break; | ||
| 558 | case MTYPE_CRT640x480: | ||
| 559 | cmx270_display = &generic_crt_640x480; | ||
| 560 | break; | ||
| 561 | case MTYPE_CRT800x600: | ||
| 562 | cmx270_display = &generic_crt_800x600; | ||
| 563 | break; | ||
| 564 | case MTYPE_TFT320x240: | ||
| 565 | cmx270_display = &generic_tft_320x240; | ||
| 566 | break; | ||
| 567 | case MTYPE_STN640x480: | ||
| 568 | cmx270_display = &generic_stn_640x480; | ||
| 569 | break; | ||
| 570 | default: /* fallback to CRT 640x480 */ | ||
| 571 | cmx270_display = &generic_crt_640x480; | ||
| 572 | break; | ||
| 573 | } | ||
| 574 | return 1; | ||
| 575 | } | ||
| 576 | |||
| 577 | /* | ||
| 578 | This should be done really early to get proper configuration for | ||
| 579 | frame buffer. | ||
| 580 | Indeed, pxafb parameters can be used istead, but CM-X270 bootloader | ||
| 581 | has limitied line length for kernel command line, and also it will | ||
| 582 | break compatibitlty with proprietary releases already in field. | ||
| 583 | */ | ||
| 584 | __setup("monitor=", cmx270_set_display); | ||
| 585 | |||
| 586 | static void __init cmx270_init_display(void) | ||
| 587 | { | ||
| 588 | set_pxa_fb_info(cmx270_display); | ||
| 589 | } | ||
| 590 | #else | ||
| 591 | static inline void cmx270_init_display(void) {} | ||
| 592 | #endif | ||
| 593 | |||
| 594 | /* PXA27x OHCI controller setup */ | 258 | /* PXA27x OHCI controller setup */ |
| 595 | #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) | 259 | #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) |
| 596 | static int cmx270_ohci_init(struct device *dev) | ||
| 597 | { | ||
| 598 | /* Set the Power Control Polarity Low */ | ||
| 599 | UHCHR = (UHCHR | UHCHR_PCPL) & | ||
| 600 | ~(UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSE); | ||
| 601 | |||
| 602 | return 0; | ||
| 603 | } | ||
| 604 | |||
| 605 | static struct pxaohci_platform_data cmx270_ohci_platform_data = { | 260 | static struct pxaohci_platform_data cmx270_ohci_platform_data = { |
| 606 | .port_mode = PMM_PERPORT_MODE, | 261 | .port_mode = PMM_PERPORT_MODE, |
| 607 | .init = cmx270_ohci_init, | 262 | .flags = ENABLE_PORT1 | ENABLE_PORT2 | POWER_CONTROL_LOW, |
| 608 | }; | 263 | }; |
| 609 | 264 | ||
| 610 | static void __init cmx270_init_ohci(void) | 265 | static void __init cmx270_init_ohci(void) |
| @@ -676,131 +331,12 @@ static void __init cmx270_init_mmc(void) | |||
| 676 | static inline void cmx270_init_mmc(void) {} | 331 | static inline void cmx270_init_mmc(void) {} |
| 677 | #endif | 332 | #endif |
| 678 | 333 | ||
| 679 | #ifdef CONFIG_PM | 334 | void __init cmx270_init(void) |
| 680 | static unsigned long sleep_save_msc[10]; | ||
| 681 | |||
| 682 | static int cmx270_suspend(struct sys_device *dev, pm_message_t state) | ||
| 683 | { | ||
| 684 | cmx270_pci_suspend(); | ||
| 685 | |||
| 686 | /* save MSC registers */ | ||
| 687 | sleep_save_msc[0] = MSC0; | ||
| 688 | sleep_save_msc[1] = MSC1; | ||
| 689 | sleep_save_msc[2] = MSC2; | ||
| 690 | |||
| 691 | /* setup power saving mode registers */ | ||
| 692 | PCFR = 0x0; | ||
| 693 | PSLR = 0xff400000; | ||
| 694 | PMCR = 0x00000005; | ||
| 695 | PWER = 0x80000000; | ||
| 696 | PFER = 0x00000000; | ||
| 697 | PRER = 0x00000000; | ||
| 698 | PGSR0 = 0xC0018800; | ||
| 699 | PGSR1 = 0x004F0002; | ||
| 700 | PGSR2 = 0x6021C000; | ||
| 701 | PGSR3 = 0x00020000; | ||
| 702 | |||
| 703 | return 0; | ||
| 704 | } | ||
| 705 | |||
| 706 | static int cmx270_resume(struct sys_device *dev) | ||
| 707 | { | ||
| 708 | cmx270_pci_resume(); | ||
| 709 | |||
| 710 | /* restore MSC registers */ | ||
| 711 | MSC0 = sleep_save_msc[0]; | ||
| 712 | MSC1 = sleep_save_msc[1]; | ||
| 713 | MSC2 = sleep_save_msc[2]; | ||
| 714 | |||
| 715 | return 0; | ||
| 716 | } | ||
| 717 | |||
| 718 | static struct sysdev_class cmx270_pm_sysclass = { | ||
| 719 | .name = "pm", | ||
| 720 | .resume = cmx270_resume, | ||
| 721 | .suspend = cmx270_suspend, | ||
| 722 | }; | ||
| 723 | |||
| 724 | static struct sys_device cmx270_pm_device = { | ||
| 725 | .cls = &cmx270_pm_sysclass, | ||
| 726 | }; | ||
| 727 | |||
| 728 | static int __init cmx270_pm_init(void) | ||
| 729 | { | ||
| 730 | int error; | ||
| 731 | error = sysdev_class_register(&cmx270_pm_sysclass); | ||
| 732 | if (error == 0) | ||
| 733 | error = sysdev_register(&cmx270_pm_device); | ||
| 734 | return error; | ||
| 735 | } | ||
| 736 | #else | ||
| 737 | static int __init cmx270_pm_init(void) { return 0; } | ||
| 738 | #endif | ||
| 739 | |||
| 740 | #if defined(CONFIG_SND_PXA2XX_AC97) || defined(CONFIG_SND_PXA2XX_AC97_MODULE) | ||
| 741 | static void __init cmx270_init_ac97(void) | ||
| 742 | { | ||
| 743 | pxa_set_ac97_info(NULL); | ||
| 744 | } | ||
| 745 | #else | ||
| 746 | static inline void cmx270_init_ac97(void) {} | ||
| 747 | #endif | ||
| 748 | |||
| 749 | static void __init cmx270_init(void) | ||
| 750 | { | 335 | { |
| 751 | cmx270_pm_init(); | ||
| 752 | |||
| 753 | pxa2xx_mfp_config(ARRAY_AND_SIZE(cmx270_pin_config)); | 336 | pxa2xx_mfp_config(ARRAY_AND_SIZE(cmx270_pin_config)); |
| 754 | 337 | ||
| 755 | cmx270_init_dm9000(); | ||
| 756 | cmx270_init_rtc(); | 338 | cmx270_init_rtc(); |
| 757 | cmx270_init_display(); | ||
| 758 | cmx270_init_mmc(); | 339 | cmx270_init_mmc(); |
| 759 | cmx270_init_ohci(); | 340 | cmx270_init_ohci(); |
| 760 | cmx270_init_ac97(); | ||
| 761 | cmx270_init_touchscreen(); | ||
| 762 | cmx270_init_leds(); | ||
| 763 | cmx270_init_2700G(); | 341 | cmx270_init_2700G(); |
| 764 | } | 342 | } |
| 765 | |||
| 766 | static void __init cmx270_init_irq(void) | ||
| 767 | { | ||
| 768 | pxa27x_init_irq(); | ||
| 769 | |||
| 770 | cmx270_pci_init_irq(GPIO22_IT8152_IRQ); | ||
| 771 | } | ||
| 772 | |||
| 773 | #ifdef CONFIG_PCI | ||
| 774 | /* Map PCI companion statically */ | ||
| 775 | static struct map_desc cmx270_io_desc[] __initdata = { | ||
| 776 | [0] = { /* PCI bridge */ | ||
| 777 | .virtual = CMX270_IT8152_VIRT, | ||
| 778 | .pfn = __phys_to_pfn(PXA_CS4_PHYS), | ||
| 779 | .length = SZ_64M, | ||
| 780 | .type = MT_DEVICE | ||
| 781 | }, | ||
| 782 | }; | ||
| 783 | |||
| 784 | static void __init cmx270_map_io(void) | ||
| 785 | { | ||
| 786 | pxa_map_io(); | ||
| 787 | iotable_init(cmx270_io_desc, ARRAY_SIZE(cmx270_io_desc)); | ||
| 788 | |||
| 789 | it8152_base_address = CMX270_IT8152_VIRT; | ||
| 790 | } | ||
| 791 | #else | ||
| 792 | static void __init cmx270_map_io(void) | ||
| 793 | { | ||
| 794 | pxa_map_io(); | ||
| 795 | } | ||
| 796 | #endif | ||
| 797 | |||
| 798 | MACHINE_START(ARMCORE, "Compulab CM-x270") | ||
| 799 | .boot_params = 0xa0000100, | ||
| 800 | .phys_io = 0x40000000, | ||
| 801 | .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, | ||
| 802 | .map_io = cmx270_map_io, | ||
| 803 | .init_irq = cmx270_init_irq, | ||
| 804 | .timer = &pxa_timer, | ||
| 805 | .init_machine = cmx270_init, | ||
| 806 | MACHINE_END | ||
diff --git a/arch/arm/mach-pxa/cm-x270-pci.c b/arch/arm/mach-pxa/cm-x2xx-pci.c index 2d5bcea1e520..3156b25f6e9d 100644 --- a/arch/arm/mach-pxa/cm-x270-pci.c +++ b/arch/arm/mach-pxa/cm-x2xx-pci.c | |||
| @@ -1,5 +1,5 @@ | |||
| 1 | /* | 1 | /* |
| 2 | * linux/arch/arm/mach-pxa/cm-x270-pci.c | 2 | * linux/arch/arm/mach-pxa/cm-x2xx-pci.c |
| 3 | * | 3 | * |
| 4 | * PCI bios-type initialisation for PCI machines | 4 | * PCI bios-type initialisation for PCI machines |
| 5 | * | 5 | * |
| @@ -28,7 +28,7 @@ | |||
| 28 | #include <asm/hardware/it8152.h> | 28 | #include <asm/hardware/it8152.h> |
| 29 | 29 | ||
| 30 | unsigned long it8152_base_address; | 30 | unsigned long it8152_base_address; |
| 31 | static int cmx270_it8152_irq_gpio; | 31 | static int cmx2xx_it8152_irq_gpio; |
| 32 | 32 | ||
| 33 | /* | 33 | /* |
| 34 | * Only first 64MB of memory can be accessed via PCI. | 34 | * Only first 64MB of memory can be accessed via PCI. |
| @@ -36,13 +36,13 @@ static int cmx270_it8152_irq_gpio; | |||
| 36 | * This is really ugly and we need a better way of specifying | 36 | * This is really ugly and we need a better way of specifying |
| 37 | * DMA-capable regions of memory. | 37 | * DMA-capable regions of memory. |
| 38 | */ | 38 | */ |
| 39 | void __init cmx270_pci_adjust_zones(int node, unsigned long *zone_size, | 39 | void __init cmx2xx_pci_adjust_zones(int node, unsigned long *zone_size, |
| 40 | unsigned long *zhole_size) | 40 | unsigned long *zhole_size) |
| 41 | { | 41 | { |
| 42 | unsigned int sz = SZ_64M >> PAGE_SHIFT; | 42 | unsigned int sz = SZ_64M >> PAGE_SHIFT; |
| 43 | 43 | ||
| 44 | if (machine_is_armcore()) { | 44 | if (machine_is_armcore()) { |
| 45 | pr_info("Adjusting zones for CM-X270\n"); | 45 | pr_info("Adjusting zones for CM-X2XX\n"); |
| 46 | 46 | ||
| 47 | /* | 47 | /* |
| 48 | * Only adjust if > 64M on current system | 48 | * Only adjust if > 64M on current system |
| @@ -57,29 +57,29 @@ void __init cmx270_pci_adjust_zones(int node, unsigned long *zone_size, | |||
| 57 | } | 57 | } |
| 58 | } | 58 | } |
| 59 | 59 | ||
| 60 | static void cmx270_it8152_irq_demux(unsigned int irq, struct irq_desc *desc) | 60 | static void cmx2xx_it8152_irq_demux(unsigned int irq, struct irq_desc *desc) |
| 61 | { | 61 | { |
| 62 | /* clear our parent irq */ | 62 | /* clear our parent irq */ |
| 63 | GEDR(cmx270_it8152_irq_gpio) = GPIO_bit(cmx270_it8152_irq_gpio); | 63 | GEDR(cmx2xx_it8152_irq_gpio) = GPIO_bit(cmx2xx_it8152_irq_gpio); |
| 64 | 64 | ||
| 65 | it8152_irq_demux(irq, desc); | 65 | it8152_irq_demux(irq, desc); |
| 66 | } | 66 | } |
| 67 | 67 | ||
| 68 | void __cmx270_pci_init_irq(int irq_gpio) | 68 | void __cmx2xx_pci_init_irq(int irq_gpio) |
| 69 | { | 69 | { |
| 70 | it8152_init_irq(); | 70 | it8152_init_irq(); |
| 71 | 71 | ||
| 72 | cmx270_it8152_irq_gpio = irq_gpio; | 72 | cmx2xx_it8152_irq_gpio = irq_gpio; |
| 73 | 73 | ||
| 74 | set_irq_type(gpio_to_irq(irq_gpio), IRQ_TYPE_EDGE_RISING); | 74 | set_irq_type(gpio_to_irq(irq_gpio), IRQ_TYPE_EDGE_RISING); |
| 75 | 75 | ||
| 76 | set_irq_chained_handler(gpio_to_irq(irq_gpio), cmx270_it8152_irq_demux); | 76 | set_irq_chained_handler(gpio_to_irq(irq_gpio), cmx2xx_it8152_irq_demux); |
| 77 | } | 77 | } |
| 78 | 78 | ||
| 79 | #ifdef CONFIG_PM | 79 | #ifdef CONFIG_PM |
| 80 | static unsigned long sleep_save_ite[10]; | 80 | static unsigned long sleep_save_ite[10]; |
| 81 | 81 | ||
| 82 | void __cmx270_pci_suspend(void) | 82 | void __cmx2xx_pci_suspend(void) |
| 83 | { | 83 | { |
| 84 | /* save ITE state */ | 84 | /* save ITE state */ |
| 85 | sleep_save_ite[0] = __raw_readl(IT8152_INTC_PDCNIMR); | 85 | sleep_save_ite[0] = __raw_readl(IT8152_INTC_PDCNIMR); |
| @@ -91,7 +91,7 @@ void __cmx270_pci_suspend(void) | |||
| 91 | __raw_writel((0), IT8152_INTC_LPCNIRR); | 91 | __raw_writel((0), IT8152_INTC_LPCNIRR); |
| 92 | } | 92 | } |
| 93 | 93 | ||
| 94 | void __cmx270_pci_resume(void) | 94 | void __cmx2xx_pci_resume(void) |
| 95 | { | 95 | { |
| 96 | /* restore IT8152 state */ | 96 | /* restore IT8152 state */ |
| 97 | __raw_writel((sleep_save_ite[0]), IT8152_INTC_PDCNIMR); | 97 | __raw_writel((sleep_save_ite[0]), IT8152_INTC_PDCNIMR); |
| @@ -99,12 +99,12 @@ void __cmx270_pci_resume(void) | |||
| 99 | __raw_writel((sleep_save_ite[2]), IT8152_INTC_LPNIAR); | 99 | __raw_writel((sleep_save_ite[2]), IT8152_INTC_LPNIAR); |
| 100 | } | 100 | } |
| 101 | #else | 101 | #else |
| 102 | void cmx270_pci_suspend(void) {} | 102 | void cmx2xx_pci_suspend(void) {} |
| 103 | void cmx270_pci_resume(void) {} | 103 | void cmx2xx_pci_resume(void) {} |
| 104 | #endif | 104 | #endif |
| 105 | 105 | ||
| 106 | /* PCI IRQ mapping*/ | 106 | /* PCI IRQ mapping*/ |
| 107 | static int __init cmx270_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin) | 107 | static int __init cmx2xx_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin) |
| 108 | { | 108 | { |
| 109 | int irq; | 109 | int irq; |
| 110 | 110 | ||
| @@ -116,14 +116,14 @@ static int __init cmx270_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin) | |||
| 116 | 116 | ||
| 117 | /* | 117 | /* |
| 118 | Here comes the ugly part. The routing is baseboard specific, | 118 | Here comes the ugly part. The routing is baseboard specific, |
| 119 | but defining a platform for each possible base of CM-X270 is | 119 | but defining a platform for each possible base of CM-X2XX is |
| 120 | unrealistic. Here we keep mapping for ATXBase and SB-X270. | 120 | unrealistic. Here we keep mapping for ATXBase and SB-X2XX. |
| 121 | */ | 121 | */ |
| 122 | /* ATXBASE PCI slot */ | 122 | /* ATXBASE PCI slot */ |
| 123 | if (slot == 7) | 123 | if (slot == 7) |
| 124 | return IT8152_PCI_INTA; | 124 | return IT8152_PCI_INTA; |
| 125 | 125 | ||
| 126 | /* ATXBase/SB-x270 CardBus */ | 126 | /* ATXBase/SB-X2XX CardBus */ |
| 127 | if (slot == 8 || slot == 0) | 127 | if (slot == 8 || slot == 0) |
| 128 | return IT8152_PCI_INTB; | 128 | return IT8152_PCI_INTB; |
| 129 | 129 | ||
| @@ -131,7 +131,11 @@ static int __init cmx270_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin) | |||
| 131 | if (slot == 9) | 131 | if (slot == 9) |
| 132 | return IT8152_PCI_INTA; | 132 | return IT8152_PCI_INTA; |
| 133 | 133 | ||
| 134 | /* SB-x270 Ethernet */ | 134 | /* CM-x255 Onboard Ethernet */ |
| 135 | if (slot == 15) | ||
| 136 | return IT8152_PCI_INTC; | ||
| 137 | |||
| 138 | /* SB-x2xx Ethernet */ | ||
| 135 | if (slot == 16) | 139 | if (slot == 16) |
| 136 | return IT8152_PCI_INTA; | 140 | return IT8152_PCI_INTA; |
| 137 | 141 | ||
| @@ -144,9 +148,9 @@ static int __init cmx270_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin) | |||
| 144 | return(0); | 148 | return(0); |
| 145 | } | 149 | } |
| 146 | 150 | ||
| 147 | static void cmx270_pci_preinit(void) | 151 | static void cmx2xx_pci_preinit(void) |
| 148 | { | 152 | { |
| 149 | pr_info("Initializing CM-X270 PCI subsystem\n"); | 153 | pr_info("Initializing CM-X2XX PCI subsystem\n"); |
| 150 | 154 | ||
| 151 | __raw_writel(0x800, IT8152_PCI_CFG_ADDR); | 155 | __raw_writel(0x800, IT8152_PCI_CFG_ADDR); |
| 152 | if (__raw_readl(IT8152_PCI_CFG_DATA) == 0x81521283) { | 156 | if (__raw_readl(IT8152_PCI_CFG_DATA) == 0x81521283) { |
| @@ -200,21 +204,21 @@ static void cmx270_pci_preinit(void) | |||
| 200 | } | 204 | } |
| 201 | } | 205 | } |
| 202 | 206 | ||
| 203 | static struct hw_pci cmx270_pci __initdata = { | 207 | static struct hw_pci cmx2xx_pci __initdata = { |
| 204 | .swizzle = pci_std_swizzle, | 208 | .swizzle = pci_std_swizzle, |
| 205 | .map_irq = cmx270_pci_map_irq, | 209 | .map_irq = cmx2xx_pci_map_irq, |
| 206 | .nr_controllers = 1, | 210 | .nr_controllers = 1, |
| 207 | .setup = it8152_pci_setup, | 211 | .setup = it8152_pci_setup, |
| 208 | .scan = it8152_pci_scan_bus, | 212 | .scan = it8152_pci_scan_bus, |
| 209 | .preinit = cmx270_pci_preinit, | 213 | .preinit = cmx2xx_pci_preinit, |
| 210 | }; | 214 | }; |
| 211 | 215 | ||
| 212 | static int __init cmx270_init_pci(void) | 216 | static int __init cmx2xx_init_pci(void) |
| 213 | { | 217 | { |
| 214 | if (machine_is_armcore()) | 218 | if (machine_is_armcore()) |
| 215 | pci_common_init(&cmx270_pci); | 219 | pci_common_init(&cmx2xx_pci); |
| 216 | 220 | ||
| 217 | return 0; | 221 | return 0; |
| 218 | } | 222 | } |
| 219 | 223 | ||
| 220 | subsys_initcall(cmx270_init_pci); | 224 | subsys_initcall(cmx2xx_init_pci); |
diff --git a/arch/arm/mach-pxa/cm-x2xx-pci.h b/arch/arm/mach-pxa/cm-x2xx-pci.h new file mode 100644 index 000000000000..e24aad2e3ad7 --- /dev/null +++ b/arch/arm/mach-pxa/cm-x2xx-pci.h | |||
| @@ -0,0 +1,13 @@ | |||
| 1 | extern void __cmx2xx_pci_init_irq(int irq_gpio); | ||
| 2 | extern void __cmx2xx_pci_suspend(void); | ||
| 3 | extern void __cmx2xx_pci_resume(void); | ||
| 4 | |||
| 5 | #ifdef CONFIG_PCI | ||
| 6 | #define cmx2xx_pci_init_irq(x) __cmx2xx_pci_init_irq(x) | ||
| 7 | #define cmx2xx_pci_suspend(x) __cmx2xx_pci_suspend(x) | ||
| 8 | #define cmx2xx_pci_resume(x) __cmx2xx_pci_resume(x) | ||
| 9 | #else | ||
| 10 | #define cmx2xx_pci_init_irq(x) do {} while (0) | ||
| 11 | #define cmx2xx_pci_suspend(x) do {} while (0) | ||
| 12 | #define cmx2xx_pci_resume(x) do {} while (0) | ||
| 13 | #endif | ||
diff --git a/arch/arm/mach-pxa/cm-x2xx.c b/arch/arm/mach-pxa/cm-x2xx.c new file mode 100644 index 000000000000..0b3ce3b6d896 --- /dev/null +++ b/arch/arm/mach-pxa/cm-x2xx.c | |||
| @@ -0,0 +1,531 @@ | |||
| 1 | /* | ||
| 2 | * linux/arch/arm/mach-pxa/cm-x2xx.c | ||
| 3 | * | ||
| 4 | * Copyright (C) 2008 CompuLab, Ltd. | ||
| 5 | * Mike Rapoport <mike@compulab.co.il> | ||
| 6 | * | ||
| 7 | * This program is free software; you can redistribute it and/or modify | ||
| 8 | * it under the terms of the GNU General Public License version 2 as | ||
| 9 | * published by the Free Software Foundation. | ||
| 10 | */ | ||
| 11 | |||
| 12 | #include <linux/platform_device.h> | ||
| 13 | #include <linux/sysdev.h> | ||
| 14 | #include <linux/irq.h> | ||
| 15 | #include <linux/gpio.h> | ||
| 16 | |||
| 17 | #include <linux/dm9000.h> | ||
| 18 | #include <linux/leds.h> | ||
| 19 | |||
| 20 | #include <asm/mach/arch.h> | ||
| 21 | #include <asm/mach-types.h> | ||
| 22 | #include <asm/mach/map.h> | ||
| 23 | |||
| 24 | #include <mach/pxa2xx-regs.h> | ||
| 25 | #include <mach/mfp-pxa27x.h> | ||
| 26 | #include <mach/pxa-regs.h> | ||
| 27 | #include <mach/audio.h> | ||
| 28 | #include <mach/pxafb.h> | ||
| 29 | |||
| 30 | #include <asm/hardware/it8152.h> | ||
| 31 | |||
| 32 | #include "generic.h" | ||
| 33 | #include "cm-x2xx-pci.h" | ||
| 34 | |||
| 35 | extern void cmx255_init(void); | ||
| 36 | extern void cmx270_init(void); | ||
| 37 | |||
| 38 | /* virtual addresses for statically mapped regions */ | ||
| 39 | #define CMX2XX_VIRT_BASE (0xe8000000) | ||
| 40 | #define CMX2XX_IT8152_VIRT (CMX2XX_VIRT_BASE) | ||
| 41 | |||
| 42 | /* physical address if local-bus attached devices */ | ||
| 43 | #define CMX255_DM9000_PHYS_BASE (PXA_CS1_PHYS + (8 << 22)) | ||
| 44 | #define CMX270_DM9000_PHYS_BASE (PXA_CS1_PHYS + (6 << 22)) | ||
| 45 | |||
| 46 | /* leds */ | ||
| 47 | #define CMX255_GPIO_RED (27) | ||
| 48 | #define CMX255_GPIO_GREEN (32) | ||
| 49 | #define CMX270_GPIO_RED (93) | ||
| 50 | #define CMX270_GPIO_GREEN (94) | ||
| 51 | |||
| 52 | /* GPIO IRQ usage */ | ||
| 53 | #define GPIO22_ETHIRQ (22) | ||
| 54 | #define GPIO10_ETHIRQ (10) | ||
| 55 | #define CMX255_GPIO_IT8152_IRQ (0) | ||
| 56 | #define CMX270_GPIO_IT8152_IRQ (22) | ||
| 57 | |||
| 58 | #define CMX255_ETHIRQ IRQ_GPIO(GPIO22_ETHIRQ) | ||
| 59 | #define CMX270_ETHIRQ IRQ_GPIO(GPIO10_ETHIRQ) | ||
| 60 | |||
| 61 | #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE) | ||
| 62 | static struct resource cmx255_dm9000_resource[] = { | ||
| 63 | [0] = { | ||
| 64 | .start = CMX255_DM9000_PHYS_BASE, | ||
| 65 | .end = CMX255_DM9000_PHYS_BASE + 3, | ||
| 66 | .flags = IORESOURCE_MEM, | ||
| 67 | }, | ||
| 68 | [1] = { | ||
| 69 | .start = CMX255_DM9000_PHYS_BASE + 4, | ||
| 70 | .end = CMX255_DM9000_PHYS_BASE + 4 + 500, | ||
| 71 | .flags = IORESOURCE_MEM, | ||
| 72 | }, | ||
| 73 | [2] = { | ||
| 74 | .start = CMX255_ETHIRQ, | ||
| 75 | .end = CMX255_ETHIRQ, | ||
| 76 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, | ||
| 77 | } | ||
| 78 | }; | ||
| 79 | |||
| 80 | static struct resource cmx270_dm9000_resource[] = { | ||
| 81 | [0] = { | ||
| 82 | .start = CMX270_DM9000_PHYS_BASE, | ||
| 83 | .end = CMX270_DM9000_PHYS_BASE + 3, | ||
| 84 | .flags = IORESOURCE_MEM, | ||
| 85 | }, | ||
| 86 | [1] = { | ||
| 87 | .start = CMX270_DM9000_PHYS_BASE + 8, | ||
| 88 | .end = CMX270_DM9000_PHYS_BASE + 8 + 500, | ||
| 89 | .flags = IORESOURCE_MEM, | ||
| 90 | }, | ||
| 91 | [2] = { | ||
| 92 | .start = CMX270_ETHIRQ, | ||
| 93 | .end = CMX270_ETHIRQ, | ||
| 94 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, | ||
| 95 | } | ||
| 96 | }; | ||
| 97 | |||
| 98 | static struct dm9000_plat_data cmx270_dm9000_platdata = { | ||
| 99 | .flags = DM9000_PLATF_32BITONLY, | ||
| 100 | }; | ||
| 101 | |||
| 102 | static struct platform_device cmx2xx_dm9000_device = { | ||
| 103 | .name = "dm9000", | ||
| 104 | .id = 0, | ||
| 105 | .num_resources = ARRAY_SIZE(cmx270_dm9000_resource), | ||
| 106 | .dev = { | ||
| 107 | .platform_data = &cmx270_dm9000_platdata, | ||
| 108 | } | ||
| 109 | }; | ||
| 110 | |||
| 111 | static void __init cmx2xx_init_dm9000(void) | ||
| 112 | { | ||
| 113 | if (cpu_is_pxa25x()) | ||
| 114 | cmx2xx_dm9000_device.resource = cmx255_dm9000_resource; | ||
| 115 | else | ||
| 116 | cmx2xx_dm9000_device.resource = cmx270_dm9000_resource; | ||
| 117 | platform_device_register(&cmx2xx_dm9000_device); | ||
| 118 | } | ||
| 119 | #else | ||
| 120 | static inline void cmx2xx_init_dm9000(void) {} | ||
| 121 | #endif | ||
| 122 | |||
| 123 | /* UCB1400 touchscreen controller */ | ||
| 124 | #if defined(CONFIG_TOUCHSCREEN_UCB1400) || defined(CONFIG_TOUCHSCREEN_UCB1400_MODULE) | ||
| 125 | static struct platform_device cmx2xx_ts_device = { | ||
| 126 | .name = "ucb1400_ts", | ||
| 127 | .id = -1, | ||
| 128 | }; | ||
| 129 | |||
| 130 | static void __init cmx2xx_init_touchscreen(void) | ||
| 131 | { | ||
| 132 | platform_device_register(&cmx2xx_ts_device); | ||
| 133 | } | ||
| 134 | #else | ||
| 135 | static inline void cmx2xx_init_touchscreen(void) {} | ||
| 136 | #endif | ||
| 137 | |||
| 138 | /* CM-X270 LEDs */ | ||
| 139 | #if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE) | ||
| 140 | static struct gpio_led cmx2xx_leds[] = { | ||
| 141 | [0] = { | ||
| 142 | .name = "cm-x2xx:red", | ||
| 143 | .default_trigger = "nand-disk", | ||
| 144 | .active_low = 1, | ||
| 145 | }, | ||
| 146 | [1] = { | ||
| 147 | .name = "cm-x2xx:green", | ||
| 148 | .default_trigger = "heartbeat", | ||
| 149 | .active_low = 1, | ||
| 150 | }, | ||
| 151 | }; | ||
| 152 | |||
| 153 | static struct gpio_led_platform_data cmx2xx_gpio_led_pdata = { | ||
| 154 | .num_leds = ARRAY_SIZE(cmx2xx_leds), | ||
| 155 | .leds = cmx2xx_leds, | ||
| 156 | }; | ||
| 157 | |||
| 158 | static struct platform_device cmx2xx_led_device = { | ||
| 159 | .name = "leds-gpio", | ||
| 160 | .id = -1, | ||
| 161 | .dev = { | ||
| 162 | .platform_data = &cmx2xx_gpio_led_pdata, | ||
| 163 | }, | ||
| 164 | }; | ||
| 165 | |||
| 166 | static void __init cmx2xx_init_leds(void) | ||
| 167 | { | ||
| 168 | if (cpu_is_pxa25x()) { | ||
| 169 | cmx2xx_leds[0].gpio = CMX255_GPIO_RED; | ||
| 170 | cmx2xx_leds[1].gpio = CMX255_GPIO_GREEN; | ||
| 171 | } else { | ||
| 172 | cmx2xx_leds[0].gpio = CMX270_GPIO_RED; | ||
| 173 | cmx2xx_leds[1].gpio = CMX270_GPIO_GREEN; | ||
| 174 | } | ||
| 175 | platform_device_register(&cmx2xx_led_device); | ||
| 176 | } | ||
| 177 | #else | ||
| 178 | static inline void cmx2xx_init_leds(void) {} | ||
| 179 | #endif | ||
| 180 | |||
| 181 | #if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE) | ||
| 182 | /* | ||
| 183 | Display definitions | ||
| 184 | keep these for backwards compatibility, although symbolic names (as | ||
| 185 | e.g. in lpd270.c) looks better | ||
| 186 | */ | ||
| 187 | #define MTYPE_STN320x240 0 | ||
| 188 | #define MTYPE_TFT640x480 1 | ||
| 189 | #define MTYPE_CRT640x480 2 | ||
| 190 | #define MTYPE_CRT800x600 3 | ||
| 191 | #define MTYPE_TFT320x240 6 | ||
| 192 | #define MTYPE_STN640x480 7 | ||
| 193 | |||
| 194 | static struct pxafb_mode_info generic_stn_320x240_mode = { | ||
| 195 | .pixclock = 76923, | ||
| 196 | .bpp = 8, | ||
| 197 | .xres = 320, | ||
| 198 | .yres = 240, | ||
| 199 | .hsync_len = 3, | ||
| 200 | .vsync_len = 2, | ||
| 201 | .left_margin = 3, | ||
| 202 | .upper_margin = 0, | ||
| 203 | .right_margin = 3, | ||
| 204 | .lower_margin = 0, | ||
| 205 | .sync = (FB_SYNC_HOR_HIGH_ACT | | ||
| 206 | FB_SYNC_VERT_HIGH_ACT), | ||
| 207 | .cmap_greyscale = 0, | ||
| 208 | }; | ||
| 209 | |||
| 210 | static struct pxafb_mach_info generic_stn_320x240 = { | ||
| 211 | .modes = &generic_stn_320x240_mode, | ||
| 212 | .num_modes = 1, | ||
| 213 | .lccr0 = 0, | ||
| 214 | .lccr3 = (LCCR3_PixClkDiv(0x03) | | ||
| 215 | LCCR3_Acb(0xff) | | ||
| 216 | LCCR3_PCP), | ||
| 217 | .cmap_inverse = 0, | ||
| 218 | .cmap_static = 0, | ||
| 219 | }; | ||
| 220 | |||
| 221 | static struct pxafb_mode_info generic_tft_640x480_mode = { | ||
| 222 | .pixclock = 38461, | ||
| 223 | .bpp = 8, | ||
| 224 | .xres = 640, | ||
| 225 | .yres = 480, | ||
| 226 | .hsync_len = 60, | ||
| 227 | .vsync_len = 2, | ||
| 228 | .left_margin = 70, | ||
| 229 | .upper_margin = 10, | ||
| 230 | .right_margin = 70, | ||
| 231 | .lower_margin = 5, | ||
| 232 | .sync = 0, | ||
| 233 | .cmap_greyscale = 0, | ||
| 234 | }; | ||
| 235 | |||
| 236 | static struct pxafb_mach_info generic_tft_640x480 = { | ||
| 237 | .modes = &generic_tft_640x480_mode, | ||
| 238 | .num_modes = 1, | ||
| 239 | .lccr0 = (LCCR0_PAS), | ||
| 240 | .lccr3 = (LCCR3_PixClkDiv(0x01) | | ||
| 241 | LCCR3_Acb(0xff) | | ||
| 242 | LCCR3_PCP), | ||
| 243 | .cmap_inverse = 0, | ||
| 244 | .cmap_static = 0, | ||
| 245 | }; | ||
| 246 | |||
| 247 | static struct pxafb_mode_info generic_crt_640x480_mode = { | ||
| 248 | .pixclock = 38461, | ||
| 249 | .bpp = 8, | ||
| 250 | .xres = 640, | ||
| 251 | .yres = 480, | ||
| 252 | .hsync_len = 63, | ||
| 253 | .vsync_len = 2, | ||
| 254 | .left_margin = 81, | ||
| 255 | .upper_margin = 33, | ||
| 256 | .right_margin = 16, | ||
| 257 | .lower_margin = 10, | ||
| 258 | .sync = (FB_SYNC_HOR_HIGH_ACT | | ||
| 259 | FB_SYNC_VERT_HIGH_ACT), | ||
| 260 | .cmap_greyscale = 0, | ||
| 261 | }; | ||
| 262 | |||
| 263 | static struct pxafb_mach_info generic_crt_640x480 = { | ||
| 264 | .modes = &generic_crt_640x480_mode, | ||
| 265 | .num_modes = 1, | ||
| 266 | .lccr0 = (LCCR0_PAS), | ||
| 267 | .lccr3 = (LCCR3_PixClkDiv(0x01) | | ||
| 268 | LCCR3_Acb(0xff)), | ||
| 269 | .cmap_inverse = 0, | ||
| 270 | .cmap_static = 0, | ||
| 271 | }; | ||
| 272 | |||
| 273 | static struct pxafb_mode_info generic_crt_800x600_mode = { | ||
| 274 | .pixclock = 28846, | ||
| 275 | .bpp = 8, | ||
| 276 | .xres = 800, | ||
| 277 | .yres = 600, | ||
| 278 | .hsync_len = 63, | ||
| 279 | .vsync_len = 2, | ||
| 280 | .left_margin = 26, | ||
| 281 | .upper_margin = 21, | ||
| 282 | .right_margin = 26, | ||
| 283 | .lower_margin = 11, | ||
| 284 | .sync = (FB_SYNC_HOR_HIGH_ACT | | ||
| 285 | FB_SYNC_VERT_HIGH_ACT), | ||
| 286 | .cmap_greyscale = 0, | ||
| 287 | }; | ||
| 288 | |||
| 289 | static struct pxafb_mach_info generic_crt_800x600 = { | ||
| 290 | .modes = &generic_crt_800x600_mode, | ||
| 291 | .num_modes = 1, | ||
| 292 | .lccr0 = (LCCR0_PAS), | ||
| 293 | .lccr3 = (LCCR3_PixClkDiv(0x02) | | ||
| 294 | LCCR3_Acb(0xff)), | ||
| 295 | .cmap_inverse = 0, | ||
| 296 | .cmap_static = 0, | ||
| 297 | }; | ||
| 298 | |||
| 299 | static struct pxafb_mode_info generic_tft_320x240_mode = { | ||
| 300 | .pixclock = 134615, | ||
| 301 | .bpp = 16, | ||
| 302 | .xres = 320, | ||
| 303 | .yres = 240, | ||
| 304 | .hsync_len = 63, | ||
| 305 | .vsync_len = 7, | ||
| 306 | .left_margin = 75, | ||
| 307 | .upper_margin = 0, | ||
| 308 | .right_margin = 15, | ||
| 309 | .lower_margin = 15, | ||
| 310 | .sync = 0, | ||
| 311 | .cmap_greyscale = 0, | ||
| 312 | }; | ||
| 313 | |||
| 314 | static struct pxafb_mach_info generic_tft_320x240 = { | ||
| 315 | .modes = &generic_tft_320x240_mode, | ||
| 316 | .num_modes = 1, | ||
| 317 | .lccr0 = (LCCR0_PAS), | ||
| 318 | .lccr3 = (LCCR3_PixClkDiv(0x06) | | ||
| 319 | LCCR3_Acb(0xff) | | ||
| 320 | LCCR3_PCP), | ||
| 321 | .cmap_inverse = 0, | ||
| 322 | .cmap_static = 0, | ||
| 323 | }; | ||
| 324 | |||
| 325 | static struct pxafb_mode_info generic_stn_640x480_mode = { | ||
| 326 | .pixclock = 57692, | ||
| 327 | .bpp = 8, | ||
| 328 | .xres = 640, | ||
| 329 | .yres = 480, | ||
| 330 | .hsync_len = 4, | ||
| 331 | .vsync_len = 2, | ||
| 332 | .left_margin = 10, | ||
| 333 | .upper_margin = 5, | ||
| 334 | .right_margin = 10, | ||
| 335 | .lower_margin = 5, | ||
| 336 | .sync = (FB_SYNC_HOR_HIGH_ACT | | ||
| 337 | FB_SYNC_VERT_HIGH_ACT), | ||
| 338 | .cmap_greyscale = 0, | ||
| 339 | }; | ||
| 340 | |||
| 341 | static struct pxafb_mach_info generic_stn_640x480 = { | ||
| 342 | .modes = &generic_stn_640x480_mode, | ||
| 343 | .num_modes = 1, | ||
| 344 | .lccr0 = 0, | ||
| 345 | .lccr3 = (LCCR3_PixClkDiv(0x02) | | ||
| 346 | LCCR3_Acb(0xff)), | ||
| 347 | .cmap_inverse = 0, | ||
| 348 | .cmap_static = 0, | ||
| 349 | }; | ||
| 350 | |||
| 351 | static struct pxafb_mach_info *cmx2xx_display = &generic_crt_640x480; | ||
| 352 | |||
| 353 | static int __init cmx2xx_set_display(char *str) | ||
| 354 | { | ||
| 355 | int disp_type = simple_strtol(str, NULL, 0); | ||
| 356 | switch (disp_type) { | ||
| 357 | case MTYPE_STN320x240: | ||
| 358 | cmx2xx_display = &generic_stn_320x240; | ||
| 359 | break; | ||
| 360 | case MTYPE_TFT640x480: | ||
| 361 | cmx2xx_display = &generic_tft_640x480; | ||
| 362 | break; | ||
| 363 | case MTYPE_CRT640x480: | ||
| 364 | cmx2xx_display = &generic_crt_640x480; | ||
| 365 | break; | ||
| 366 | case MTYPE_CRT800x600: | ||
| 367 | cmx2xx_display = &generic_crt_800x600; | ||
| 368 | break; | ||
| 369 | case MTYPE_TFT320x240: | ||
| 370 | cmx2xx_display = &generic_tft_320x240; | ||
| 371 | break; | ||
| 372 | case MTYPE_STN640x480: | ||
| 373 | cmx2xx_display = &generic_stn_640x480; | ||
| 374 | break; | ||
| 375 | default: /* fallback to CRT 640x480 */ | ||
| 376 | cmx2xx_display = &generic_crt_640x480; | ||
| 377 | break; | ||
| 378 | } | ||
| 379 | return 1; | ||
| 380 | } | ||
| 381 | |||
| 382 | /* | ||
| 383 | This should be done really early to get proper configuration for | ||
| 384 | frame buffer. | ||
| 385 | Indeed, pxafb parameters can be used istead, but CM-X2XX bootloader | ||
| 386 | has limitied line length for kernel command line, and also it will | ||
| 387 | break compatibitlty with proprietary releases already in field. | ||
| 388 | */ | ||
| 389 | __setup("monitor=", cmx2xx_set_display); | ||
| 390 | |||
| 391 | static void __init cmx2xx_init_display(void) | ||
| 392 | { | ||
| 393 | set_pxa_fb_info(cmx2xx_display); | ||
| 394 | } | ||
| 395 | #else | ||
| 396 | static inline void cmx2xx_init_display(void) {} | ||
| 397 | #endif | ||
| 398 | |||
| 399 | #ifdef CONFIG_PM | ||
| 400 | static unsigned long sleep_save_msc[10]; | ||
| 401 | |||
| 402 | static int cmx2xx_suspend(struct sys_device *dev, pm_message_t state) | ||
| 403 | { | ||
| 404 | cmx2xx_pci_suspend(); | ||
| 405 | |||
| 406 | /* save MSC registers */ | ||
| 407 | sleep_save_msc[0] = MSC0; | ||
| 408 | sleep_save_msc[1] = MSC1; | ||
| 409 | sleep_save_msc[2] = MSC2; | ||
| 410 | |||
| 411 | /* setup power saving mode registers */ | ||
| 412 | PCFR = 0x0; | ||
| 413 | PSLR = 0xff400000; | ||
| 414 | PMCR = 0x00000005; | ||
| 415 | PWER = 0x80000000; | ||
| 416 | PFER = 0x00000000; | ||
| 417 | PRER = 0x00000000; | ||
| 418 | PGSR0 = 0xC0018800; | ||
| 419 | PGSR1 = 0x004F0002; | ||
| 420 | PGSR2 = 0x6021C000; | ||
| 421 | PGSR3 = 0x00020000; | ||
| 422 | |||
| 423 | return 0; | ||
| 424 | } | ||
| 425 | |||
| 426 | static int cmx2xx_resume(struct sys_device *dev) | ||
| 427 | { | ||
| 428 | cmx2xx_pci_resume(); | ||
| 429 | |||
| 430 | /* restore MSC registers */ | ||
| 431 | MSC0 = sleep_save_msc[0]; | ||
| 432 | MSC1 = sleep_save_msc[1]; | ||
| 433 | MSC2 = sleep_save_msc[2]; | ||
| 434 | |||
| 435 | return 0; | ||
| 436 | } | ||
| 437 | |||
| 438 | static struct sysdev_class cmx2xx_pm_sysclass = { | ||
| 439 | .name = "pm", | ||
| 440 | .resume = cmx2xx_resume, | ||
| 441 | .suspend = cmx2xx_suspend, | ||
| 442 | }; | ||
| 443 | |||
| 444 | static struct sys_device cmx2xx_pm_device = { | ||
| 445 | .cls = &cmx2xx_pm_sysclass, | ||
| 446 | }; | ||
| 447 | |||
| 448 | static int __init cmx2xx_pm_init(void) | ||
| 449 | { | ||
| 450 | int error; | ||
| 451 | error = sysdev_class_register(&cmx2xx_pm_sysclass); | ||
| 452 | if (error == 0) | ||
| 453 | error = sysdev_register(&cmx2xx_pm_device); | ||
| 454 | return error; | ||
| 455 | } | ||
| 456 | #else | ||
| 457 | static int __init cmx2xx_pm_init(void) { return 0; } | ||
| 458 | #endif | ||
| 459 | |||
| 460 | #if defined(CONFIG_SND_PXA2XX_AC97) || defined(CONFIG_SND_PXA2XX_AC97_MODULE) | ||
| 461 | static void __init cmx2xx_init_ac97(void) | ||
| 462 | { | ||
| 463 | pxa_set_ac97_info(NULL); | ||
| 464 | } | ||
| 465 | #else | ||
| 466 | static inline void cmx2xx_init_ac97(void) {} | ||
| 467 | #endif | ||
| 468 | |||
| 469 | static void __init cmx2xx_init(void) | ||
| 470 | { | ||
| 471 | cmx2xx_pm_init(); | ||
| 472 | |||
| 473 | if (cpu_is_pxa25x()) | ||
| 474 | cmx255_init(); | ||
| 475 | else | ||
| 476 | cmx270_init(); | ||
| 477 | |||
| 478 | cmx2xx_init_dm9000(); | ||
| 479 | cmx2xx_init_display(); | ||
| 480 | cmx2xx_init_ac97(); | ||
| 481 | cmx2xx_init_touchscreen(); | ||
| 482 | cmx2xx_init_leds(); | ||
| 483 | } | ||
| 484 | |||
| 485 | static void __init cmx2xx_init_irq(void) | ||
| 486 | { | ||
| 487 | pxa27x_init_irq(); | ||
| 488 | |||
| 489 | if (cpu_is_pxa25x()) { | ||
| 490 | pxa25x_init_irq(); | ||
| 491 | cmx2xx_pci_init_irq(CMX255_GPIO_IT8152_IRQ); | ||
| 492 | } else { | ||
| 493 | pxa27x_init_irq(); | ||
| 494 | cmx2xx_pci_init_irq(CMX270_GPIO_IT8152_IRQ); | ||
| 495 | } | ||
| 496 | } | ||
| 497 | |||
| 498 | #ifdef CONFIG_PCI | ||
| 499 | /* Map PCI companion statically */ | ||
| 500 | static struct map_desc cmx2xx_io_desc[] __initdata = { | ||
| 501 | [0] = { /* PCI bridge */ | ||
| 502 | .virtual = CMX2XX_IT8152_VIRT, | ||
| 503 | .pfn = __phys_to_pfn(PXA_CS4_PHYS), | ||
| 504 | .length = SZ_64M, | ||
| 505 | .type = MT_DEVICE | ||
| 506 | }, | ||
| 507 | }; | ||
| 508 | |||
| 509 | static void __init cmx2xx_map_io(void) | ||
| 510 | { | ||
| 511 | pxa_map_io(); | ||
| 512 | iotable_init(cmx2xx_io_desc, ARRAY_SIZE(cmx2xx_io_desc)); | ||
| 513 | |||
| 514 | it8152_base_address = CMX2XX_IT8152_VIRT; | ||
| 515 | } | ||
| 516 | #else | ||
| 517 | static void __init cmx2xx_map_io(void) | ||
| 518 | { | ||
| 519 | pxa_map_io(); | ||
| 520 | } | ||
| 521 | #endif | ||
| 522 | |||
| 523 | MACHINE_START(ARMCORE, "Compulab CM-X2XX") | ||
| 524 | .boot_params = 0xa0000100, | ||
| 525 | .phys_io = 0x40000000, | ||
| 526 | .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, | ||
| 527 | .map_io = cmx2xx_map_io, | ||
| 528 | .init_irq = cmx2xx_init_irq, | ||
| 529 | .timer = &pxa_timer, | ||
| 530 | .init_machine = cmx2xx_init, | ||
| 531 | MACHINE_END | ||
diff --git a/arch/arm/mach-pxa/cm-x300.c b/arch/arm/mach-pxa/cm-x300.c new file mode 100644 index 000000000000..deb46cd144bf --- /dev/null +++ b/arch/arm/mach-pxa/cm-x300.c | |||
| @@ -0,0 +1,465 @@ | |||
| 1 | /* | ||
| 2 | * linux/arch/arm/mach-pxa/cm-x300.c | ||
| 3 | * | ||
| 4 | * Support for the CompuLab CM-X300 modules | ||
| 5 | * | ||
| 6 | * Copyright (C) 2008 CompuLab Ltd. | ||
| 7 | * | ||
| 8 | * Mike Rapoport <mike@compulab.co.il> | ||
| 9 | * | ||
| 10 | * This program is free software; you can redistribute it and/or modify | ||
| 11 | * it under the terms of the GNU General Public License version 2 as | ||
| 12 | * published by the Free Software Foundation. | ||
| 13 | */ | ||
| 14 | |||
| 15 | #include <linux/module.h> | ||
| 16 | #include <linux/kernel.h> | ||
| 17 | #include <linux/interrupt.h> | ||
| 18 | #include <linux/init.h> | ||
| 19 | #include <linux/platform_device.h> | ||
| 20 | |||
| 21 | #include <linux/gpio.h> | ||
| 22 | #include <linux/dm9000.h> | ||
| 23 | #include <linux/leds.h> | ||
| 24 | |||
| 25 | #include <linux/i2c.h> | ||
| 26 | #include <linux/i2c/pca953x.h> | ||
| 27 | |||
| 28 | #include <asm/mach-types.h> | ||
| 29 | #include <asm/mach/arch.h> | ||
| 30 | |||
| 31 | #include <mach/mfp-pxa300.h> | ||
| 32 | |||
| 33 | #include <mach/hardware.h> | ||
| 34 | #include <mach/gpio.h> | ||
| 35 | #include <mach/pxafb.h> | ||
| 36 | #include <mach/mmc.h> | ||
| 37 | #include <mach/ohci.h> | ||
| 38 | #include <mach/i2c.h> | ||
| 39 | #include <mach/pxa3xx_nand.h> | ||
| 40 | |||
| 41 | #include <asm/mach/map.h> | ||
| 42 | |||
| 43 | #include "generic.h" | ||
| 44 | |||
| 45 | #define CM_X300_ETH_PHYS 0x08000010 | ||
| 46 | |||
| 47 | #define GPIO82_MMC2_IRQ (82) | ||
| 48 | #define GPIO85_MMC2_WP (85) | ||
| 49 | |||
| 50 | #define CM_X300_MMC2_IRQ IRQ_GPIO(GPIO82_MMC2_IRQ) | ||
| 51 | |||
| 52 | static mfp_cfg_t cm_x300_mfp_cfg[] __initdata = { | ||
| 53 | /* LCD */ | ||
| 54 | GPIO54_LCD_LDD_0, | ||
| 55 | GPIO55_LCD_LDD_1, | ||
| 56 | GPIO56_LCD_LDD_2, | ||
| 57 | GPIO57_LCD_LDD_3, | ||
| 58 | GPIO58_LCD_LDD_4, | ||
| 59 | GPIO59_LCD_LDD_5, | ||
| 60 | GPIO60_LCD_LDD_6, | ||
| 61 | GPIO61_LCD_LDD_7, | ||
| 62 | GPIO62_LCD_LDD_8, | ||
| 63 | GPIO63_LCD_LDD_9, | ||
| 64 | GPIO64_LCD_LDD_10, | ||
| 65 | GPIO65_LCD_LDD_11, | ||
| 66 | GPIO66_LCD_LDD_12, | ||
| 67 | GPIO67_LCD_LDD_13, | ||
| 68 | GPIO68_LCD_LDD_14, | ||
| 69 | GPIO69_LCD_LDD_15, | ||
| 70 | GPIO72_LCD_FCLK, | ||
| 71 | GPIO73_LCD_LCLK, | ||
| 72 | GPIO74_LCD_PCLK, | ||
| 73 | GPIO75_LCD_BIAS, | ||
| 74 | |||
| 75 | /* BTUART */ | ||
| 76 | GPIO111_UART2_RTS, | ||
| 77 | GPIO112_UART2_RXD | MFP_LPM_EDGE_FALL, | ||
| 78 | GPIO113_UART2_TXD, | ||
| 79 | GPIO114_UART2_CTS | MFP_LPM_EDGE_BOTH, | ||
| 80 | |||
| 81 | /* STUART */ | ||
| 82 | GPIO109_UART3_TXD, | ||
| 83 | GPIO110_UART3_RXD | MFP_LPM_EDGE_FALL, | ||
| 84 | |||
| 85 | /* AC97 */ | ||
| 86 | GPIO23_AC97_nACRESET, | ||
| 87 | GPIO24_AC97_SYSCLK, | ||
| 88 | GPIO29_AC97_BITCLK, | ||
| 89 | GPIO25_AC97_SDATA_IN_0, | ||
| 90 | GPIO27_AC97_SDATA_OUT, | ||
| 91 | GPIO28_AC97_SYNC, | ||
| 92 | |||
| 93 | /* Keypad */ | ||
| 94 | GPIO115_KP_MKIN_0 | MFP_LPM_EDGE_BOTH, | ||
| 95 | GPIO116_KP_MKIN_1 | MFP_LPM_EDGE_BOTH, | ||
| 96 | GPIO117_KP_MKIN_2 | MFP_LPM_EDGE_BOTH, | ||
| 97 | GPIO118_KP_MKIN_3 | MFP_LPM_EDGE_BOTH, | ||
| 98 | GPIO119_KP_MKIN_4 | MFP_LPM_EDGE_BOTH, | ||
| 99 | GPIO120_KP_MKIN_5 | MFP_LPM_EDGE_BOTH, | ||
| 100 | GPIO2_2_KP_MKIN_6 | MFP_LPM_EDGE_BOTH, | ||
| 101 | GPIO3_2_KP_MKIN_7 | MFP_LPM_EDGE_BOTH, | ||
| 102 | GPIO121_KP_MKOUT_0, | ||
| 103 | GPIO122_KP_MKOUT_1, | ||
| 104 | GPIO123_KP_MKOUT_2, | ||
| 105 | GPIO124_KP_MKOUT_3, | ||
| 106 | GPIO125_KP_MKOUT_4, | ||
| 107 | GPIO4_2_KP_MKOUT_5, | ||
| 108 | |||
| 109 | /* MMC1 */ | ||
| 110 | GPIO3_MMC1_DAT0, | ||
| 111 | GPIO4_MMC1_DAT1 | MFP_LPM_EDGE_BOTH, | ||
| 112 | GPIO5_MMC1_DAT2, | ||
| 113 | GPIO6_MMC1_DAT3, | ||
| 114 | GPIO7_MMC1_CLK, | ||
| 115 | GPIO8_MMC1_CMD, /* CMD0 for slot 0 */ | ||
| 116 | |||
| 117 | /* MMC2 */ | ||
| 118 | GPIO9_MMC2_DAT0, | ||
| 119 | GPIO10_MMC2_DAT1 | MFP_LPM_EDGE_BOTH, | ||
| 120 | GPIO11_MMC2_DAT2, | ||
| 121 | GPIO12_MMC2_DAT3, | ||
| 122 | GPIO13_MMC2_CLK, | ||
| 123 | GPIO14_MMC2_CMD, | ||
| 124 | |||
| 125 | /* FFUART */ | ||
| 126 | GPIO30_UART1_RXD | MFP_LPM_EDGE_FALL, | ||
| 127 | GPIO31_UART1_TXD, | ||
| 128 | GPIO32_UART1_CTS, | ||
| 129 | GPIO37_UART1_RTS, | ||
| 130 | GPIO33_UART1_DCD, | ||
| 131 | GPIO34_UART1_DSR | MFP_LPM_EDGE_FALL, | ||
| 132 | GPIO35_UART1_RI, | ||
| 133 | GPIO36_UART1_DTR, | ||
| 134 | |||
| 135 | /* GPIOs */ | ||
| 136 | GPIO79_GPIO, /* LED */ | ||
| 137 | GPIO82_GPIO | MFP_PULL_HIGH, /* MMC CD */ | ||
| 138 | GPIO85_GPIO, /* MMC WP */ | ||
| 139 | GPIO99_GPIO, /* Ethernet IRQ */ | ||
| 140 | }; | ||
| 141 | |||
| 142 | #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE) | ||
| 143 | static struct resource dm9000_resources[] = { | ||
| 144 | [0] = { | ||
| 145 | .start = CM_X300_ETH_PHYS, | ||
| 146 | .end = CM_X300_ETH_PHYS + 0x3, | ||
| 147 | .flags = IORESOURCE_MEM, | ||
| 148 | }, | ||
| 149 | [1] = { | ||
| 150 | .start = CM_X300_ETH_PHYS + 0x4, | ||
| 151 | .end = CM_X300_ETH_PHYS + 0x4 + 500, | ||
| 152 | .flags = IORESOURCE_MEM, | ||
| 153 | }, | ||
| 154 | [2] = { | ||
| 155 | .start = IRQ_GPIO(mfp_to_gpio(MFP_PIN_GPIO99)), | ||
| 156 | .end = IRQ_GPIO(mfp_to_gpio(MFP_PIN_GPIO99)), | ||
| 157 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, | ||
| 158 | } | ||
| 159 | }; | ||
| 160 | |||
| 161 | static struct dm9000_plat_data cm_x300_dm9000_platdata = { | ||
| 162 | .flags = DM9000_PLATF_16BITONLY, | ||
| 163 | }; | ||
| 164 | |||
| 165 | static struct platform_device dm9000_device = { | ||
| 166 | .name = "dm9000", | ||
| 167 | .id = 0, | ||
| 168 | .num_resources = ARRAY_SIZE(dm9000_resources), | ||
| 169 | .resource = dm9000_resources, | ||
| 170 | .dev = { | ||
| 171 | .platform_data = &cm_x300_dm9000_platdata, | ||
| 172 | } | ||
| 173 | |||
| 174 | }; | ||
| 175 | |||
| 176 | static void __init cm_x300_init_dm9000(void) | ||
| 177 | { | ||
| 178 | platform_device_register(&dm9000_device); | ||
| 179 | } | ||
| 180 | #else | ||
| 181 | static inline void cm_x300_init_dm9000(void) {} | ||
| 182 | #endif | ||
| 183 | |||
| 184 | #if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE) | ||
| 185 | static struct pxafb_mode_info cm_x300_lcd_modes[] = { | ||
| 186 | [0] = { | ||
| 187 | .pixclock = 38000, | ||
| 188 | .bpp = 16, | ||
| 189 | .xres = 480, | ||
| 190 | .yres = 640, | ||
| 191 | .hsync_len = 8, | ||
| 192 | .vsync_len = 2, | ||
| 193 | .left_margin = 8, | ||
| 194 | .upper_margin = 0, | ||
| 195 | .right_margin = 24, | ||
| 196 | .lower_margin = 4, | ||
| 197 | .cmap_greyscale = 0, | ||
| 198 | }, | ||
| 199 | [1] = { | ||
| 200 | .pixclock = 153800, | ||
| 201 | .bpp = 16, | ||
| 202 | .xres = 240, | ||
| 203 | .yres = 320, | ||
| 204 | .hsync_len = 8, | ||
| 205 | .vsync_len = 2, | ||
| 206 | .left_margin = 8, | ||
| 207 | .upper_margin = 2, | ||
| 208 | .right_margin = 88, | ||
| 209 | .lower_margin = 2, | ||
| 210 | .cmap_greyscale = 0, | ||
| 211 | }, | ||
| 212 | }; | ||
| 213 | |||
| 214 | static struct pxafb_mach_info cm_x300_lcd = { | ||
| 215 | .modes = cm_x300_lcd_modes, | ||
| 216 | .num_modes = 2, | ||
| 217 | .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL, | ||
| 218 | }; | ||
| 219 | |||
| 220 | static void __init cm_x300_init_lcd(void) | ||
| 221 | { | ||
| 222 | set_pxa_fb_info(&cm_x300_lcd); | ||
| 223 | } | ||
| 224 | #else | ||
| 225 | static inline void cm_x300_init_lcd(void) {} | ||
| 226 | #endif | ||
| 227 | |||
| 228 | #if defined(CONFIG_MTD_NAND_PXA3xx) || defined(CONFIG_MTD_NAND_PXA3xx_MODULE) | ||
| 229 | static struct mtd_partition cm_x300_nand_partitions[] = { | ||
| 230 | [0] = { | ||
| 231 | .name = "OBM", | ||
| 232 | .offset = 0, | ||
| 233 | .size = SZ_256K, | ||
| 234 | .mask_flags = MTD_WRITEABLE, /* force read-only */ | ||
| 235 | }, | ||
| 236 | [1] = { | ||
| 237 | .name = "U-Boot", | ||
| 238 | .offset = MTDPART_OFS_APPEND, | ||
| 239 | .size = SZ_256K, | ||
| 240 | .mask_flags = MTD_WRITEABLE, /* force read-only */ | ||
| 241 | }, | ||
| 242 | [2] = { | ||
| 243 | .name = "Environment", | ||
| 244 | .offset = MTDPART_OFS_APPEND, | ||
| 245 | .size = SZ_256K, | ||
| 246 | }, | ||
| 247 | [3] = { | ||
| 248 | .name = "reserved", | ||
| 249 | .offset = MTDPART_OFS_APPEND, | ||
| 250 | .size = SZ_256K + SZ_1M, | ||
| 251 | .mask_flags = MTD_WRITEABLE, /* force read-only */ | ||
| 252 | }, | ||
| 253 | [4] = { | ||
| 254 | .name = "kernel", | ||
| 255 | .offset = MTDPART_OFS_APPEND, | ||
| 256 | .size = SZ_4M, | ||
| 257 | }, | ||
| 258 | [5] = { | ||
| 259 | .name = "fs", | ||
| 260 | .offset = MTDPART_OFS_APPEND, | ||
| 261 | .size = MTDPART_SIZ_FULL, | ||
| 262 | }, | ||
| 263 | }; | ||
| 264 | |||
| 265 | static struct pxa3xx_nand_platform_data cm_x300_nand_info = { | ||
| 266 | .enable_arbiter = 1, | ||
| 267 | .parts = cm_x300_nand_partitions, | ||
| 268 | .nr_parts = ARRAY_SIZE(cm_x300_nand_partitions), | ||
| 269 | }; | ||
| 270 | |||
| 271 | static void __init cm_x300_init_nand(void) | ||
| 272 | { | ||
| 273 | pxa3xx_set_nand_info(&cm_x300_nand_info); | ||
| 274 | } | ||
| 275 | #else | ||
| 276 | static inline void cm_x300_init_nand(void) {} | ||
| 277 | #endif | ||
| 278 | |||
| 279 | #if defined(CONFIG_MMC) || defined(CONFIG_MMC_MODULE) | ||
| 280 | /* The first MMC slot of CM-X300 is hardwired to Libertas card and has | ||
| 281 | no detection/ro pins */ | ||
| 282 | static int cm_x300_mci_init(struct device *dev, | ||
| 283 | irq_handler_t cm_x300_detect_int, | ||
| 284 | void *data) | ||
| 285 | { | ||
| 286 | return 0; | ||
| 287 | } | ||
| 288 | |||
| 289 | static void cm_x300_mci_exit(struct device *dev, void *data) | ||
| 290 | { | ||
| 291 | } | ||
| 292 | |||
| 293 | static struct pxamci_platform_data cm_x300_mci_platform_data = { | ||
| 294 | .detect_delay = 20, | ||
| 295 | .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, | ||
| 296 | .init = cm_x300_mci_init, | ||
| 297 | .exit = cm_x300_mci_exit, | ||
| 298 | }; | ||
| 299 | |||
| 300 | static int cm_x300_mci2_ro(struct device *dev) | ||
| 301 | { | ||
| 302 | return gpio_get_value(GPIO85_MMC2_WP); | ||
| 303 | } | ||
| 304 | |||
| 305 | static int cm_x300_mci2_init(struct device *dev, | ||
| 306 | irq_handler_t cm_x300_detect_int, | ||
| 307 | void *data) | ||
| 308 | { | ||
| 309 | int err; | ||
| 310 | |||
| 311 | /* | ||
| 312 | * setup GPIO for CM-X300 MMC controller | ||
| 313 | */ | ||
| 314 | err = gpio_request(GPIO82_MMC2_IRQ, "mmc card detect"); | ||
| 315 | if (err) | ||
| 316 | goto err_request_cd; | ||
| 317 | gpio_direction_input(GPIO82_MMC2_IRQ); | ||
| 318 | |||
| 319 | err = gpio_request(GPIO85_MMC2_WP, "mmc write protect"); | ||
| 320 | if (err) | ||
| 321 | goto err_request_wp; | ||
| 322 | gpio_direction_input(GPIO85_MMC2_WP); | ||
| 323 | |||
| 324 | err = request_irq(CM_X300_MMC2_IRQ, cm_x300_detect_int, | ||
| 325 | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, | ||
| 326 | "MMC card detect", data); | ||
| 327 | if (err) { | ||
| 328 | printk(KERN_ERR "%s: MMC/SD/SDIO: " | ||
| 329 | "can't request card detect IRQ\n", __func__); | ||
| 330 | goto err_request_irq; | ||
| 331 | } | ||
| 332 | |||
| 333 | return 0; | ||
| 334 | |||
| 335 | err_request_irq: | ||
| 336 | gpio_free(GPIO85_MMC2_WP); | ||
| 337 | err_request_wp: | ||
| 338 | gpio_free(GPIO82_MMC2_IRQ); | ||
| 339 | err_request_cd: | ||
| 340 | return err; | ||
| 341 | } | ||
| 342 | |||
| 343 | static void cm_x300_mci2_exit(struct device *dev, void *data) | ||
| 344 | { | ||
| 345 | free_irq(CM_X300_MMC2_IRQ, data); | ||
| 346 | gpio_free(GPIO82_MMC2_IRQ); | ||
| 347 | gpio_free(GPIO85_MMC2_WP); | ||
| 348 | } | ||
| 349 | |||
| 350 | static struct pxamci_platform_data cm_x300_mci2_platform_data = { | ||
| 351 | .detect_delay = 20, | ||
| 352 | .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, | ||
| 353 | .init = cm_x300_mci2_init, | ||
| 354 | .exit = cm_x300_mci2_exit, | ||
| 355 | .get_ro = cm_x300_mci2_ro, | ||
| 356 | }; | ||
| 357 | |||
| 358 | static void __init cm_x300_init_mmc(void) | ||
| 359 | { | ||
| 360 | pxa_set_mci_info(&cm_x300_mci_platform_data); | ||
| 361 | pxa3xx_set_mci2_info(&cm_x300_mci2_platform_data); | ||
| 362 | } | ||
| 363 | #else | ||
| 364 | static inline void cm_x300_init_mmc(void) {} | ||
| 365 | #endif | ||
| 366 | |||
| 367 | #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) | ||
| 368 | static struct pxaohci_platform_data cm_x300_ohci_platform_data = { | ||
| 369 | .port_mode = PMM_PERPORT_MODE, | ||
| 370 | .flags = ENABLE_PORT1 | ENABLE_PORT2 | POWER_CONTROL_LOW, | ||
| 371 | }; | ||
| 372 | |||
| 373 | static void __init cm_x300_init_ohci(void) | ||
| 374 | { | ||
| 375 | pxa_set_ohci_info(&cm_x300_ohci_platform_data); | ||
| 376 | } | ||
| 377 | #else | ||
| 378 | static inline void cm_x300_init_ohci(void) {} | ||
| 379 | #endif | ||
| 380 | |||
| 381 | #if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE) | ||
| 382 | static struct gpio_led cm_x300_leds[] = { | ||
| 383 | [0] = { | ||
| 384 | .name = "cm-x300:green", | ||
| 385 | .default_trigger = "heartbeat", | ||
| 386 | .gpio = 79, | ||
| 387 | .active_low = 1, | ||
| 388 | }, | ||
| 389 | }; | ||
| 390 | |||
| 391 | static struct gpio_led_platform_data cm_x300_gpio_led_pdata = { | ||
| 392 | .num_leds = ARRAY_SIZE(cm_x300_leds), | ||
| 393 | .leds = cm_x300_leds, | ||
| 394 | }; | ||
| 395 | |||
| 396 | static struct platform_device cm_x300_led_device = { | ||
| 397 | .name = "leds-gpio", | ||
| 398 | .id = -1, | ||
| 399 | .dev = { | ||
| 400 | .platform_data = &cm_x300_gpio_led_pdata, | ||
| 401 | }, | ||
| 402 | }; | ||
| 403 | |||
| 404 | static void __init cm_x300_init_leds(void) | ||
| 405 | { | ||
| 406 | platform_device_register(&cm_x300_led_device); | ||
| 407 | } | ||
| 408 | #else | ||
| 409 | static inline void cm_x300_init_leds(void) {} | ||
| 410 | #endif | ||
| 411 | |||
| 412 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) | ||
| 413 | /* PCA9555 */ | ||
| 414 | static struct pca953x_platform_data cm_x300_gpio_ext_pdata_0 = { | ||
| 415 | .gpio_base = 128, | ||
| 416 | }; | ||
| 417 | |||
| 418 | static struct pca953x_platform_data cm_x300_gpio_ext_pdata_1 = { | ||
| 419 | .gpio_base = 144, | ||
| 420 | }; | ||
| 421 | |||
| 422 | static struct i2c_board_info cm_x300_gpio_ext_info[] = { | ||
| 423 | [0] = { | ||
| 424 | I2C_BOARD_INFO("pca9555", 0x24), | ||
| 425 | .platform_data = &cm_x300_gpio_ext_pdata_0, | ||
| 426 | }, | ||
| 427 | [1] = { | ||
| 428 | I2C_BOARD_INFO("pca9555", 0x25), | ||
| 429 | .platform_data = &cm_x300_gpio_ext_pdata_1, | ||
| 430 | }, | ||
| 431 | }; | ||
| 432 | |||
| 433 | static void __init cm_x300_init_i2c(void) | ||
| 434 | { | ||
| 435 | pxa_set_i2c_info(NULL); | ||
| 436 | i2c_register_board_info(0, cm_x300_gpio_ext_info, | ||
| 437 | ARRAY_SIZE(cm_x300_gpio_ext_info)); | ||
| 438 | } | ||
| 439 | #else | ||
| 440 | static inline void cm_x300_init_i2c(void) {} | ||
| 441 | #endif | ||
| 442 | |||
| 443 | static void __init cm_x300_init(void) | ||
| 444 | { | ||
| 445 | /* board-processor specific GPIO initialization */ | ||
| 446 | pxa3xx_mfp_config(ARRAY_AND_SIZE(cm_x300_mfp_cfg)); | ||
| 447 | |||
| 448 | cm_x300_init_dm9000(); | ||
| 449 | cm_x300_init_lcd(); | ||
| 450 | cm_x300_init_ohci(); | ||
| 451 | cm_x300_init_mmc(); | ||
| 452 | cm_x300_init_nand(); | ||
| 453 | cm_x300_init_leds(); | ||
| 454 | cm_x300_init_i2c(); | ||
| 455 | } | ||
| 456 | |||
| 457 | MACHINE_START(CM_X300, "CM-X300 module") | ||
| 458 | .phys_io = 0x40000000, | ||
| 459 | .boot_params = 0xa0000100, | ||
| 460 | .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, | ||
| 461 | .map_io = pxa_map_io, | ||
| 462 | .init_irq = pxa3xx_init_irq, | ||
| 463 | .timer = &pxa_timer, | ||
| 464 | .init_machine = cm_x300_init, | ||
| 465 | MACHINE_END | ||
diff --git a/arch/arm/mach-pxa/colibri.c b/arch/arm/mach-pxa/colibri.c index abce13c846c5..e8473624427e 100644 --- a/arch/arm/mach-pxa/colibri.c +++ b/arch/arm/mach-pxa/colibri.c | |||
| @@ -29,12 +29,17 @@ | |||
| 29 | #include <asm/mach/irq.h> | 29 | #include <asm/mach/irq.h> |
| 30 | #include <asm/mach/flash.h> | 30 | #include <asm/mach/flash.h> |
| 31 | #include <mach/pxa-regs.h> | 31 | #include <mach/pxa-regs.h> |
| 32 | #include <mach/pxa2xx-gpio.h> | 32 | #include <mach/mfp-pxa27x.h> |
| 33 | #include <mach/colibri.h> | 33 | #include <mach/colibri.h> |
| 34 | 34 | ||
| 35 | #include "generic.h" | 35 | #include "generic.h" |
| 36 | #include "devices.h" | 36 | #include "devices.h" |
| 37 | 37 | ||
| 38 | static unsigned long colibri_pin_config[] __initdata = { | ||
| 39 | GPIO78_nCS_2, /* Ethernet CS */ | ||
| 40 | GPIO114_GPIO, /* Ethernet IRQ */ | ||
| 41 | }; | ||
| 42 | |||
| 38 | /* | 43 | /* |
| 39 | * Flash | 44 | * Flash |
| 40 | */ | 45 | */ |
| @@ -116,9 +121,7 @@ static struct platform_device *colibri_devices[] __initdata = { | |||
| 116 | 121 | ||
| 117 | static void __init colibri_init(void) | 122 | static void __init colibri_init(void) |
| 118 | { | 123 | { |
| 119 | /* DM9000 LAN */ | 124 | pxa2xx_mfp_config(ARRAY_AND_SIZE(colibri_pin_config)); |
| 120 | pxa_gpio_mode(GPIO78_nCS_2_MD); | ||
| 121 | pxa_gpio_mode(GPIO_DM9000 | GPIO_IN); | ||
| 122 | 125 | ||
| 123 | platform_add_devices(colibri_devices, ARRAY_SIZE(colibri_devices)); | 126 | platform_add_devices(colibri_devices, ARRAY_SIZE(colibri_devices)); |
| 124 | } | 127 | } |
diff --git a/arch/arm/mach-pxa/corgi.c b/arch/arm/mach-pxa/corgi.c index 4cbf08bd546b..65558d6aa220 100644 --- a/arch/arm/mach-pxa/corgi.c +++ b/arch/arm/mach-pxa/corgi.c | |||
| @@ -20,8 +20,12 @@ | |||
| 20 | #include <linux/interrupt.h> | 20 | #include <linux/interrupt.h> |
| 21 | #include <linux/mmc/host.h> | 21 | #include <linux/mmc/host.h> |
| 22 | #include <linux/pm.h> | 22 | #include <linux/pm.h> |
| 23 | #include <linux/gpio.h> | ||
| 23 | #include <linux/backlight.h> | 24 | #include <linux/backlight.h> |
| 24 | #include <linux/io.h> | 25 | #include <linux/io.h> |
| 26 | #include <linux/spi/spi.h> | ||
| 27 | #include <linux/spi/ads7846.h> | ||
| 28 | #include <linux/spi/corgi_lcd.h> | ||
| 25 | #include <video/w100fb.h> | 29 | #include <video/w100fb.h> |
| 26 | 30 | ||
| 27 | #include <asm/setup.h> | 31 | #include <asm/setup.h> |
| @@ -37,11 +41,12 @@ | |||
| 37 | 41 | ||
| 38 | #include <mach/pxa-regs.h> | 42 | #include <mach/pxa-regs.h> |
| 39 | #include <mach/pxa2xx-regs.h> | 43 | #include <mach/pxa2xx-regs.h> |
| 40 | #include <mach/pxa2xx-gpio.h> | 44 | #include <mach/mfp-pxa25x.h> |
| 41 | #include <mach/i2c.h> | 45 | #include <mach/i2c.h> |
| 42 | #include <mach/irda.h> | 46 | #include <mach/irda.h> |
| 43 | #include <mach/mmc.h> | 47 | #include <mach/mmc.h> |
| 44 | #include <mach/udc.h> | 48 | #include <mach/udc.h> |
| 49 | #include <mach/pxa2xx_spi.h> | ||
| 45 | #include <mach/corgi.h> | 50 | #include <mach/corgi.h> |
| 46 | #include <mach/sharpsl.h> | 51 | #include <mach/sharpsl.h> |
| 47 | 52 | ||
| @@ -52,6 +57,61 @@ | |||
| 52 | #include "devices.h" | 57 | #include "devices.h" |
| 53 | #include "sharpsl.h" | 58 | #include "sharpsl.h" |
| 54 | 59 | ||
| 60 | static unsigned long corgi_pin_config[] __initdata = { | ||
| 61 | /* Static Memory I/O */ | ||
| 62 | GPIO78_nCS_2, /* w100fb */ | ||
| 63 | GPIO80_nCS_4, /* scoop */ | ||
| 64 | |||
| 65 | /* SSP1 */ | ||
| 66 | GPIO23_SSP1_SCLK, | ||
| 67 | GPIO25_SSP1_TXD, | ||
| 68 | GPIO26_SSP1_RXD, | ||
| 69 | GPIO24_GPIO, /* CORGI_GPIO_ADS7846_CS - SFRM as chip select */ | ||
| 70 | |||
| 71 | /* I2S */ | ||
| 72 | GPIO28_I2S_BITCLK_OUT, | ||
| 73 | GPIO29_I2S_SDATA_IN, | ||
| 74 | GPIO30_I2S_SDATA_OUT, | ||
| 75 | GPIO31_I2S_SYNC, | ||
| 76 | GPIO32_I2S_SYSCLK, | ||
| 77 | |||
| 78 | /* Infra-Red */ | ||
| 79 | GPIO47_FICP_TXD, | ||
| 80 | GPIO46_FICP_RXD, | ||
| 81 | |||
| 82 | /* FFUART */ | ||
| 83 | GPIO40_FFUART_DTR, | ||
| 84 | GPIO41_FFUART_RTS, | ||
| 85 | GPIO39_FFUART_TXD, | ||
| 86 | GPIO37_FFUART_DSR, | ||
| 87 | GPIO34_FFUART_RXD, | ||
| 88 | GPIO35_FFUART_CTS, | ||
| 89 | |||
| 90 | /* PC Card */ | ||
| 91 | GPIO48_nPOE, | ||
| 92 | GPIO49_nPWE, | ||
| 93 | GPIO50_nPIOR, | ||
| 94 | GPIO51_nPIOW, | ||
| 95 | GPIO52_nPCE_1, | ||
| 96 | GPIO53_nPCE_2, | ||
| 97 | GPIO54_nPSKTSEL, | ||
| 98 | GPIO55_nPREG, | ||
| 99 | GPIO56_nPWAIT, | ||
| 100 | GPIO57_nIOIS16, | ||
| 101 | |||
| 102 | /* MMC */ | ||
| 103 | GPIO6_MMC_CLK, | ||
| 104 | GPIO8_MMC_CS0, | ||
| 105 | |||
| 106 | /* GPIO */ | ||
| 107 | GPIO9_GPIO, /* CORGI_GPIO_nSD_DETECT */ | ||
| 108 | GPIO7_GPIO, /* CORGI_GPIO_nSD_WP */ | ||
| 109 | GPIO33_GPIO, /* CORGI_GPIO_SD_PWR */ | ||
| 110 | GPIO22_GPIO, /* CORGI_GPIO_IR_ON */ | ||
| 111 | GPIO44_GPIO, /* CORGI_GPIO_HSYNC */ | ||
| 112 | |||
| 113 | GPIO1_GPIO | WAKEUP_ON_EDGE_RISE, | ||
| 114 | }; | ||
| 55 | 115 | ||
| 56 | /* | 116 | /* |
| 57 | * Corgi SCOOP Device | 117 | * Corgi SCOOP Device |
| @@ -67,6 +127,7 @@ static struct resource corgi_scoop_resources[] = { | |||
| 67 | static struct scoop_config corgi_scoop_setup = { | 127 | static struct scoop_config corgi_scoop_setup = { |
| 68 | .io_dir = CORGI_SCOOP_IO_DIR, | 128 | .io_dir = CORGI_SCOOP_IO_DIR, |
| 69 | .io_out = CORGI_SCOOP_IO_OUT, | 129 | .io_out = CORGI_SCOOP_IO_OUT, |
| 130 | .gpio_base = CORGI_SCOOP_GPIO_BASE, | ||
| 70 | }; | 131 | }; |
| 71 | 132 | ||
| 72 | struct platform_device corgiscoop_device = { | 133 | struct platform_device corgiscoop_device = { |
| @@ -79,27 +140,6 @@ struct platform_device corgiscoop_device = { | |||
| 79 | .resource = corgi_scoop_resources, | 140 | .resource = corgi_scoop_resources, |
| 80 | }; | 141 | }; |
| 81 | 142 | ||
| 82 | static void corgi_pcmcia_init(void) | ||
| 83 | { | ||
| 84 | /* Setup default state of GPIO outputs | ||
| 85 | before we enable them as outputs. */ | ||
| 86 | GPSR(GPIO48_nPOE) = GPIO_bit(GPIO48_nPOE) | | ||
| 87 | GPIO_bit(GPIO49_nPWE) | GPIO_bit(GPIO50_nPIOR) | | ||
| 88 | GPIO_bit(GPIO51_nPIOW) | GPIO_bit(GPIO52_nPCE_1) | | ||
| 89 | GPIO_bit(GPIO53_nPCE_2); | ||
| 90 | |||
| 91 | pxa_gpio_mode(GPIO48_nPOE_MD); | ||
| 92 | pxa_gpio_mode(GPIO49_nPWE_MD); | ||
| 93 | pxa_gpio_mode(GPIO50_nPIOR_MD); | ||
| 94 | pxa_gpio_mode(GPIO51_nPIOW_MD); | ||
| 95 | pxa_gpio_mode(GPIO55_nPREG_MD); | ||
| 96 | pxa_gpio_mode(GPIO56_nPWAIT_MD); | ||
| 97 | pxa_gpio_mode(GPIO57_nIOIS16_MD); | ||
| 98 | pxa_gpio_mode(GPIO52_nPCE_1_MD); | ||
| 99 | pxa_gpio_mode(GPIO53_nPCE_2_MD); | ||
| 100 | pxa_gpio_mode(GPIO54_pSKTSEL_MD); | ||
| 101 | } | ||
| 102 | |||
| 103 | static struct scoop_pcmcia_dev corgi_pcmcia_scoop[] = { | 143 | static struct scoop_pcmcia_dev corgi_pcmcia_scoop[] = { |
| 104 | { | 144 | { |
| 105 | .dev = &corgiscoop_device.dev, | 145 | .dev = &corgiscoop_device.dev, |
| @@ -112,58 +152,10 @@ static struct scoop_pcmcia_dev corgi_pcmcia_scoop[] = { | |||
| 112 | static struct scoop_pcmcia_config corgi_pcmcia_config = { | 152 | static struct scoop_pcmcia_config corgi_pcmcia_config = { |
| 113 | .devs = &corgi_pcmcia_scoop[0], | 153 | .devs = &corgi_pcmcia_scoop[0], |
| 114 | .num_devs = 1, | 154 | .num_devs = 1, |
| 115 | .pcmcia_init = corgi_pcmcia_init, | ||
| 116 | }; | 155 | }; |
| 117 | 156 | ||
| 118 | EXPORT_SYMBOL(corgiscoop_device); | 157 | EXPORT_SYMBOL(corgiscoop_device); |
| 119 | 158 | ||
| 120 | |||
| 121 | /* | ||
| 122 | * Corgi SSP Device | ||
| 123 | * | ||
| 124 | * Set the parent as the scoop device because a lot of SSP devices | ||
| 125 | * also use scoop functions and this makes the power up/down order | ||
| 126 | * work correctly. | ||
| 127 | */ | ||
| 128 | struct platform_device corgissp_device = { | ||
| 129 | .name = "corgi-ssp", | ||
| 130 | .dev = { | ||
| 131 | .parent = &corgiscoop_device.dev, | ||
| 132 | }, | ||
| 133 | .id = -1, | ||
| 134 | }; | ||
| 135 | |||
| 136 | struct corgissp_machinfo corgi_ssp_machinfo = { | ||
| 137 | .port = 1, | ||
| 138 | .cs_lcdcon = CORGI_GPIO_LCDCON_CS, | ||
| 139 | .cs_ads7846 = CORGI_GPIO_ADS7846_CS, | ||
| 140 | .cs_max1111 = CORGI_GPIO_MAX1111_CS, | ||
| 141 | .clk_lcdcon = 76, | ||
| 142 | .clk_ads7846 = 2, | ||
| 143 | .clk_max1111 = 8, | ||
| 144 | }; | ||
| 145 | |||
| 146 | |||
| 147 | /* | ||
| 148 | * LCD/Framebuffer | ||
| 149 | */ | ||
| 150 | static void w100_lcdtg_suspend(struct w100fb_par *par) | ||
| 151 | { | ||
| 152 | corgi_lcdtg_suspend(); | ||
| 153 | } | ||
| 154 | |||
| 155 | static void w100_lcdtg_init(struct w100fb_par *par) | ||
| 156 | { | ||
| 157 | corgi_lcdtg_hw_init(par->xres); | ||
| 158 | } | ||
| 159 | |||
| 160 | |||
| 161 | static struct w100_tg_info corgi_lcdtg_info = { | ||
| 162 | .change = w100_lcdtg_init, | ||
| 163 | .suspend = w100_lcdtg_suspend, | ||
| 164 | .resume = w100_lcdtg_init, | ||
| 165 | }; | ||
| 166 | |||
| 167 | static struct w100_mem_info corgi_fb_mem = { | 159 | static struct w100_mem_info corgi_fb_mem = { |
| 168 | .ext_cntl = 0x00040003, | 160 | .ext_cntl = 0x00040003, |
| 169 | .sdram_mode_reg = 0x00650021, | 161 | .sdram_mode_reg = 0x00650021, |
| @@ -242,7 +234,6 @@ static struct w100_mode corgi_fb_modes[] = { | |||
| 242 | }; | 234 | }; |
| 243 | 235 | ||
| 244 | static struct w100fb_mach_info corgi_fb_info = { | 236 | static struct w100fb_mach_info corgi_fb_info = { |
| 245 | .tg = &corgi_lcdtg_info, | ||
| 246 | .init_mode = INIT_MODE_ROTATED, | 237 | .init_mode = INIT_MODE_ROTATED, |
| 247 | .mem = &corgi_fb_mem, | 238 | .mem = &corgi_fb_mem, |
| 248 | .regs = &corgi_fb_regs, | 239 | .regs = &corgi_fb_regs, |
| @@ -268,60 +259,10 @@ static struct platform_device corgifb_device = { | |||
| 268 | .resource = corgi_fb_resources, | 259 | .resource = corgi_fb_resources, |
| 269 | .dev = { | 260 | .dev = { |
| 270 | .platform_data = &corgi_fb_info, | 261 | .platform_data = &corgi_fb_info, |
| 271 | .parent = &corgissp_device.dev, | ||
| 272 | }, | 262 | }, |
| 273 | 263 | ||
| 274 | }; | 264 | }; |
| 275 | 265 | ||
| 276 | |||
| 277 | /* | ||
| 278 | * Corgi Backlight Device | ||
| 279 | */ | ||
| 280 | static void corgi_bl_kick_battery(void) | ||
| 281 | { | ||
| 282 | void (*kick_batt)(void); | ||
| 283 | |||
| 284 | kick_batt = symbol_get(sharpsl_battery_kick); | ||
| 285 | if (kick_batt) { | ||
| 286 | kick_batt(); | ||
| 287 | symbol_put(sharpsl_battery_kick); | ||
| 288 | } | ||
| 289 | } | ||
| 290 | |||
| 291 | static void corgi_bl_set_intensity(int intensity) | ||
| 292 | { | ||
| 293 | if (intensity > 0x10) | ||
| 294 | intensity += 0x10; | ||
| 295 | |||
| 296 | /* Bits 0-4 are accessed via the SSP interface */ | ||
| 297 | corgi_ssp_blduty_set(intensity & 0x1f); | ||
| 298 | |||
| 299 | /* Bit 5 is via SCOOP */ | ||
| 300 | if (intensity & 0x0020) | ||
| 301 | set_scoop_gpio(&corgiscoop_device.dev, CORGI_SCP_BACKLIGHT_CONT); | ||
| 302 | else | ||
| 303 | reset_scoop_gpio(&corgiscoop_device.dev, CORGI_SCP_BACKLIGHT_CONT); | ||
| 304 | } | ||
| 305 | |||
| 306 | static struct generic_bl_info corgi_bl_machinfo = { | ||
| 307 | .name = "corgi-bl", | ||
| 308 | .max_intensity = 0x2f, | ||
| 309 | .default_intensity = 0x1f, | ||
| 310 | .limit_mask = 0x0b, | ||
| 311 | .set_bl_intensity = corgi_bl_set_intensity, | ||
| 312 | .kick_battery = corgi_bl_kick_battery, | ||
| 313 | }; | ||
| 314 | |||
| 315 | static struct platform_device corgibl_device = { | ||
| 316 | .name = "generic-bl", | ||
| 317 | .dev = { | ||
| 318 | .parent = &corgifb_device.dev, | ||
| 319 | .platform_data = &corgi_bl_machinfo, | ||
| 320 | }, | ||
| 321 | .id = -1, | ||
| 322 | }; | ||
| 323 | |||
| 324 | |||
| 325 | /* | 266 | /* |
| 326 | * Corgi Keyboard Device | 267 | * Corgi Keyboard Device |
| 327 | */ | 268 | */ |
| @@ -330,75 +271,35 @@ static struct platform_device corgikbd_device = { | |||
| 330 | .id = -1, | 271 | .id = -1, |
| 331 | }; | 272 | }; |
| 332 | 273 | ||
| 333 | |||
| 334 | /* | 274 | /* |
| 335 | * Corgi LEDs | 275 | * Corgi LEDs |
| 336 | */ | 276 | */ |
| 337 | static struct platform_device corgiled_device = { | 277 | static struct gpio_led corgi_gpio_leds[] = { |
| 338 | .name = "corgi-led", | 278 | { |
| 339 | .id = -1, | 279 | .name = "corgi:amber:charge", |
| 340 | }; | 280 | .default_trigger = "sharpsl-charge", |
| 341 | 281 | .gpio = CORGI_GPIO_LED_ORANGE, | |
| 342 | 282 | }, | |
| 343 | /* | 283 | { |
| 344 | * Corgi Touch Screen Device | 284 | .name = "corgi:green:mail", |
| 345 | */ | 285 | .default_trigger = "nand-disk", |
| 346 | static unsigned long (*get_hsync_invperiod)(struct device *dev); | 286 | .gpio = CORGI_GPIO_LED_GREEN, |
| 347 | |||
| 348 | static void inline sharpsl_wait_sync(int gpio) | ||
| 349 | { | ||
| 350 | while((GPLR(gpio) & GPIO_bit(gpio)) == 0); | ||
| 351 | while((GPLR(gpio) & GPIO_bit(gpio)) != 0); | ||
| 352 | } | ||
| 353 | |||
| 354 | static unsigned long corgi_get_hsync_invperiod(void) | ||
| 355 | { | ||
| 356 | if (!get_hsync_invperiod) | ||
| 357 | get_hsync_invperiod = symbol_get(w100fb_get_hsynclen); | ||
| 358 | if (!get_hsync_invperiod) | ||
| 359 | return 0; | ||
| 360 | |||
| 361 | return get_hsync_invperiod(&corgifb_device.dev); | ||
| 362 | } | ||
| 363 | |||
| 364 | static void corgi_put_hsync(void) | ||
| 365 | { | ||
| 366 | if (get_hsync_invperiod) | ||
| 367 | symbol_put(w100fb_get_hsynclen); | ||
| 368 | get_hsync_invperiod = NULL; | ||
| 369 | } | ||
| 370 | |||
| 371 | static void corgi_wait_hsync(void) | ||
| 372 | { | ||
| 373 | sharpsl_wait_sync(CORGI_GPIO_HSYNC); | ||
| 374 | } | ||
| 375 | |||
| 376 | static struct resource corgits_resources[] = { | ||
| 377 | [0] = { | ||
| 378 | .start = CORGI_IRQ_GPIO_TP_INT, | ||
| 379 | .end = CORGI_IRQ_GPIO_TP_INT, | ||
| 380 | .flags = IORESOURCE_IRQ, | ||
| 381 | }, | 287 | }, |
| 382 | }; | 288 | }; |
| 383 | 289 | ||
| 384 | static struct corgits_machinfo corgi_ts_machinfo = { | 290 | static struct gpio_led_platform_data corgi_gpio_leds_info = { |
| 385 | .get_hsync_invperiod = corgi_get_hsync_invperiod, | 291 | .leds = corgi_gpio_leds, |
| 386 | .put_hsync = corgi_put_hsync, | 292 | .num_leds = ARRAY_SIZE(corgi_gpio_leds), |
| 387 | .wait_hsync = corgi_wait_hsync, | ||
| 388 | }; | 293 | }; |
| 389 | 294 | ||
| 390 | static struct platform_device corgits_device = { | 295 | static struct platform_device corgiled_device = { |
| 391 | .name = "corgi-ts", | 296 | .name = "leds-gpio", |
| 297 | .id = -1, | ||
| 392 | .dev = { | 298 | .dev = { |
| 393 | .parent = &corgissp_device.dev, | 299 | .platform_data = &corgi_gpio_leds_info, |
| 394 | .platform_data = &corgi_ts_machinfo, | ||
| 395 | }, | 300 | }, |
| 396 | .id = -1, | ||
| 397 | .num_resources = ARRAY_SIZE(corgits_resources), | ||
| 398 | .resource = corgits_resources, | ||
| 399 | }; | 301 | }; |
| 400 | 302 | ||
| 401 | |||
| 402 | /* | 303 | /* |
| 403 | * MMC/SD Device | 304 | * MMC/SD Device |
| 404 | * | 305 | * |
| @@ -411,20 +312,42 @@ static int corgi_mci_init(struct device *dev, irq_handler_t corgi_detect_int, vo | |||
| 411 | { | 312 | { |
| 412 | int err; | 313 | int err; |
| 413 | 314 | ||
| 414 | /* setup GPIO for PXA25x MMC controller */ | 315 | err = gpio_request(CORGI_GPIO_nSD_DETECT, "nSD_DETECT"); |
| 415 | pxa_gpio_mode(GPIO6_MMCCLK_MD); | 316 | if (err) |
| 416 | pxa_gpio_mode(GPIO8_MMCCS0_MD); | 317 | goto err_out; |
| 417 | pxa_gpio_mode(CORGI_GPIO_nSD_DETECT | GPIO_IN); | ||
| 418 | pxa_gpio_mode(CORGI_GPIO_SD_PWR | GPIO_OUT); | ||
| 419 | 318 | ||
| 420 | corgi_mci_platform_data.detect_delay = msecs_to_jiffies(250); | 319 | err = gpio_request(CORGI_GPIO_nSD_WP, "nSD_WP"); |
| 320 | if (err) | ||
| 321 | goto err_free_1; | ||
| 421 | 322 | ||
| 422 | err = request_irq(CORGI_IRQ_GPIO_nSD_DETECT, corgi_detect_int, | 323 | err = gpio_request(CORGI_GPIO_SD_PWR, "SD_PWR"); |
| 423 | IRQF_DISABLED | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, | ||
| 424 | "MMC card detect", data); | ||
| 425 | if (err) | 324 | if (err) |
| 426 | printk(KERN_ERR "corgi_mci_init: MMC/SD: can't request MMC card detect IRQ\n"); | 325 | goto err_free_2; |
| 427 | 326 | ||
| 327 | gpio_direction_input(CORGI_GPIO_nSD_DETECT); | ||
| 328 | gpio_direction_input(CORGI_GPIO_nSD_WP); | ||
| 329 | gpio_direction_output(CORGI_GPIO_SD_PWR, 0); | ||
| 330 | |||
| 331 | corgi_mci_platform_data.detect_delay = msecs_to_jiffies(250); | ||
| 332 | |||
| 333 | err = request_irq(CORGI_IRQ_GPIO_nSD_DETECT, corgi_detect_int, | ||
| 334 | IRQF_DISABLED | IRQF_TRIGGER_RISING | | ||
| 335 | IRQF_TRIGGER_FALLING, | ||
| 336 | "MMC card detect", data); | ||
| 337 | if (err) { | ||
| 338 | pr_err("%s: MMC/SD: can't request MMC card detect IRQ\n", | ||
| 339 | __func__); | ||
| 340 | goto err_free_3; | ||
| 341 | } | ||
| 342 | return 0; | ||
| 343 | |||
| 344 | err_free_3: | ||
| 345 | gpio_free(CORGI_GPIO_SD_PWR); | ||
| 346 | err_free_2: | ||
| 347 | gpio_free(CORGI_GPIO_nSD_WP); | ||
| 348 | err_free_1: | ||
| 349 | gpio_free(CORGI_GPIO_nSD_DETECT); | ||
| 350 | err_out: | ||
| 428 | return err; | 351 | return err; |
| 429 | } | 352 | } |
| 430 | 353 | ||
| @@ -432,20 +355,20 @@ static void corgi_mci_setpower(struct device *dev, unsigned int vdd) | |||
| 432 | { | 355 | { |
| 433 | struct pxamci_platform_data* p_d = dev->platform_data; | 356 | struct pxamci_platform_data* p_d = dev->platform_data; |
| 434 | 357 | ||
| 435 | if (( 1 << vdd) & p_d->ocr_mask) | 358 | gpio_set_value(CORGI_GPIO_SD_PWR, ((1 << vdd) & p_d->ocr_mask)); |
| 436 | GPSR1 = GPIO_bit(CORGI_GPIO_SD_PWR); | ||
| 437 | else | ||
| 438 | GPCR1 = GPIO_bit(CORGI_GPIO_SD_PWR); | ||
| 439 | } | 359 | } |
| 440 | 360 | ||
| 441 | static int corgi_mci_get_ro(struct device *dev) | 361 | static int corgi_mci_get_ro(struct device *dev) |
| 442 | { | 362 | { |
| 443 | return GPLR(CORGI_GPIO_nSD_WP) & GPIO_bit(CORGI_GPIO_nSD_WP); | 363 | return gpio_get_value(CORGI_GPIO_nSD_WP); |
| 444 | } | 364 | } |
| 445 | 365 | ||
| 446 | static void corgi_mci_exit(struct device *dev, void *data) | 366 | static void corgi_mci_exit(struct device *dev, void *data) |
| 447 | { | 367 | { |
| 448 | free_irq(CORGI_IRQ_GPIO_nSD_DETECT, data); | 368 | free_irq(CORGI_IRQ_GPIO_nSD_DETECT, data); |
| 369 | gpio_free(CORGI_GPIO_SD_PWR); | ||
| 370 | gpio_free(CORGI_GPIO_nSD_WP); | ||
| 371 | gpio_free(CORGI_GPIO_nSD_DETECT); | ||
| 449 | } | 372 | } |
| 450 | 373 | ||
| 451 | static struct pxamci_platform_data corgi_mci_platform_data = { | 374 | static struct pxamci_platform_data corgi_mci_platform_data = { |
| @@ -462,16 +385,32 @@ static struct pxamci_platform_data corgi_mci_platform_data = { | |||
| 462 | */ | 385 | */ |
| 463 | static void corgi_irda_transceiver_mode(struct device *dev, int mode) | 386 | static void corgi_irda_transceiver_mode(struct device *dev, int mode) |
| 464 | { | 387 | { |
| 465 | if (mode & IR_OFF) | 388 | gpio_set_value(CORGI_GPIO_IR_ON, mode & IR_OFF); |
| 466 | GPSR(CORGI_GPIO_IR_ON) = GPIO_bit(CORGI_GPIO_IR_ON); | ||
| 467 | else | ||
| 468 | GPCR(CORGI_GPIO_IR_ON) = GPIO_bit(CORGI_GPIO_IR_ON); | ||
| 469 | pxa2xx_transceiver_mode(dev, mode); | 389 | pxa2xx_transceiver_mode(dev, mode); |
| 470 | } | 390 | } |
| 471 | 391 | ||
| 392 | static int corgi_irda_startup(struct device *dev) | ||
| 393 | { | ||
| 394 | int err; | ||
| 395 | |||
| 396 | err = gpio_request(CORGI_GPIO_IR_ON, "IR_ON"); | ||
| 397 | if (err) | ||
| 398 | return err; | ||
| 399 | |||
| 400 | gpio_direction_output(CORGI_GPIO_IR_ON, 1); | ||
| 401 | return 0; | ||
| 402 | } | ||
| 403 | |||
| 404 | static void corgi_irda_shutdown(struct device *dev) | ||
| 405 | { | ||
| 406 | gpio_free(CORGI_GPIO_IR_ON); | ||
| 407 | } | ||
| 408 | |||
| 472 | static struct pxaficp_platform_data corgi_ficp_platform_data = { | 409 | static struct pxaficp_platform_data corgi_ficp_platform_data = { |
| 473 | .transceiver_cap = IR_SIRMODE | IR_OFF, | 410 | .transceiver_cap = IR_SIRMODE | IR_OFF, |
| 474 | .transceiver_mode = corgi_irda_transceiver_mode, | 411 | .transceiver_mode = corgi_irda_transceiver_mode, |
| 412 | .startup = corgi_irda_startup, | ||
| 413 | .shutdown = corgi_irda_shutdown, | ||
| 475 | }; | 414 | }; |
| 476 | 415 | ||
| 477 | 416 | ||
| @@ -483,14 +422,129 @@ static struct pxa2xx_udc_mach_info udc_info __initdata = { | |||
| 483 | .gpio_pullup = CORGI_GPIO_USB_PULLUP, | 422 | .gpio_pullup = CORGI_GPIO_USB_PULLUP, |
| 484 | }; | 423 | }; |
| 485 | 424 | ||
| 425 | #if defined(CONFIG_SPI_PXA2XX) || defined(CONFIG_SPI_PXA2XX_MASTER) | ||
| 426 | static struct pxa2xx_spi_master corgi_spi_info = { | ||
| 427 | .num_chipselect = 3, | ||
| 428 | }; | ||
| 429 | |||
| 430 | static struct ads7846_platform_data corgi_ads7846_info = { | ||
| 431 | .model = 7846, | ||
| 432 | .vref_delay_usecs = 100, | ||
| 433 | .x_plate_ohms = 419, | ||
| 434 | .y_plate_ohms = 486, | ||
| 435 | .gpio_pendown = CORGI_GPIO_TP_INT, | ||
| 436 | }; | ||
| 437 | |||
| 438 | static void corgi_ads7846_cs(u32 command) | ||
| 439 | { | ||
| 440 | gpio_set_value(CORGI_GPIO_ADS7846_CS, !(command == PXA2XX_CS_ASSERT)); | ||
| 441 | } | ||
| 442 | |||
| 443 | static struct pxa2xx_spi_chip corgi_ads7846_chip = { | ||
| 444 | .cs_control = corgi_ads7846_cs, | ||
| 445 | }; | ||
| 446 | |||
| 447 | static void corgi_bl_kick_battery(void) | ||
| 448 | { | ||
| 449 | void (*kick_batt)(void); | ||
| 450 | |||
| 451 | kick_batt = symbol_get(sharpsl_battery_kick); | ||
| 452 | if (kick_batt) { | ||
| 453 | kick_batt(); | ||
| 454 | symbol_put(sharpsl_battery_kick); | ||
| 455 | } | ||
| 456 | } | ||
| 457 | |||
| 458 | static struct corgi_lcd_platform_data corgi_lcdcon_info = { | ||
| 459 | .init_mode = CORGI_LCD_MODE_VGA, | ||
| 460 | .max_intensity = 0x2f, | ||
| 461 | .default_intensity = 0x1f, | ||
| 462 | .limit_mask = 0x0b, | ||
| 463 | .gpio_backlight_cont = CORGI_GPIO_BACKLIGHT_CONT, | ||
| 464 | .gpio_backlight_on = -1, | ||
| 465 | .kick_battery = corgi_bl_kick_battery, | ||
| 466 | }; | ||
| 467 | |||
| 468 | static void corgi_lcdcon_cs(u32 command) | ||
| 469 | { | ||
| 470 | gpio_set_value(CORGI_GPIO_LCDCON_CS, !(command == PXA2XX_CS_ASSERT)); | ||
| 471 | } | ||
| 472 | |||
| 473 | static struct pxa2xx_spi_chip corgi_lcdcon_chip = { | ||
| 474 | .cs_control = corgi_lcdcon_cs, | ||
| 475 | }; | ||
| 476 | |||
| 477 | static void corgi_max1111_cs(u32 command) | ||
| 478 | { | ||
| 479 | gpio_set_value(CORGI_GPIO_MAX1111_CS, !(command == PXA2XX_CS_ASSERT)); | ||
| 480 | } | ||
| 481 | |||
| 482 | static struct pxa2xx_spi_chip corgi_max1111_chip = { | ||
| 483 | .cs_control = corgi_max1111_cs, | ||
| 484 | }; | ||
| 485 | |||
| 486 | static struct spi_board_info corgi_spi_devices[] = { | ||
| 487 | { | ||
| 488 | .modalias = "ads7846", | ||
| 489 | .max_speed_hz = 1200000, | ||
| 490 | .bus_num = 1, | ||
| 491 | .chip_select = 0, | ||
| 492 | .platform_data = &corgi_ads7846_info, | ||
| 493 | .controller_data= &corgi_ads7846_chip, | ||
| 494 | .irq = gpio_to_irq(CORGI_GPIO_TP_INT), | ||
| 495 | }, { | ||
| 496 | .modalias = "corgi-lcd", | ||
| 497 | .max_speed_hz = 50000, | ||
| 498 | .bus_num = 1, | ||
| 499 | .chip_select = 1, | ||
| 500 | .platform_data = &corgi_lcdcon_info, | ||
| 501 | .controller_data= &corgi_lcdcon_chip, | ||
| 502 | }, { | ||
| 503 | .modalias = "max1111", | ||
| 504 | .max_speed_hz = 450000, | ||
| 505 | .bus_num = 1, | ||
| 506 | .chip_select = 2, | ||
| 507 | .controller_data= &corgi_max1111_chip, | ||
| 508 | }, | ||
| 509 | }; | ||
| 510 | |||
| 511 | static void __init corgi_init_spi(void) | ||
| 512 | { | ||
| 513 | int err; | ||
| 514 | |||
| 515 | err = gpio_request(CORGI_GPIO_ADS7846_CS, "ADS7846_CS"); | ||
| 516 | if (err) | ||
| 517 | return; | ||
| 518 | |||
| 519 | err = gpio_request(CORGI_GPIO_LCDCON_CS, "LCDCON_CS"); | ||
| 520 | if (err) | ||
| 521 | goto err_free_1; | ||
| 522 | |||
| 523 | err = gpio_request(CORGI_GPIO_MAX1111_CS, "MAX1111_CS"); | ||
| 524 | if (err) | ||
| 525 | goto err_free_2; | ||
| 526 | |||
| 527 | gpio_direction_output(CORGI_GPIO_ADS7846_CS, 1); | ||
| 528 | gpio_direction_output(CORGI_GPIO_LCDCON_CS, 1); | ||
| 529 | gpio_direction_output(CORGI_GPIO_MAX1111_CS, 1); | ||
| 530 | |||
| 531 | pxa2xx_set_spi_info(1, &corgi_spi_info); | ||
| 532 | spi_register_board_info(ARRAY_AND_SIZE(corgi_spi_devices)); | ||
| 533 | return; | ||
| 534 | |||
| 535 | err_free_2: | ||
| 536 | gpio_free(CORGI_GPIO_LCDCON_CS); | ||
| 537 | err_free_1: | ||
| 538 | gpio_free(CORGI_GPIO_ADS7846_CS); | ||
| 539 | } | ||
| 540 | #else | ||
| 541 | static inline void corgi_init_spi(void) {} | ||
| 542 | #endif | ||
| 486 | 543 | ||
| 487 | static struct platform_device *devices[] __initdata = { | 544 | static struct platform_device *devices[] __initdata = { |
| 488 | &corgiscoop_device, | 545 | &corgiscoop_device, |
| 489 | &corgissp_device, | ||
| 490 | &corgifb_device, | 546 | &corgifb_device, |
| 491 | &corgikbd_device, | 547 | &corgikbd_device, |
| 492 | &corgibl_device, | ||
| 493 | &corgits_device, | ||
| 494 | &corgiled_device, | 548 | &corgiled_device, |
| 495 | }; | 549 | }; |
| 496 | 550 | ||
| @@ -498,7 +552,8 @@ static void corgi_poweroff(void) | |||
| 498 | { | 552 | { |
| 499 | if (!machine_is_corgi()) | 553 | if (!machine_is_corgi()) |
| 500 | /* Green LED off tells the bootloader to halt */ | 554 | /* Green LED off tells the bootloader to halt */ |
| 501 | reset_scoop_gpio(&corgiscoop_device.dev, CORGI_SCP_LED_GREEN); | 555 | gpio_set_value(CORGI_GPIO_LED_GREEN, 0); |
| 556 | |||
| 502 | arm_machine_restart('h'); | 557 | arm_machine_restart('h'); |
| 503 | } | 558 | } |
| 504 | 559 | ||
| @@ -506,7 +561,8 @@ static void corgi_restart(char mode) | |||
| 506 | { | 561 | { |
| 507 | if (!machine_is_corgi()) | 562 | if (!machine_is_corgi()) |
| 508 | /* Green LED on tells the bootloader to reboot */ | 563 | /* Green LED on tells the bootloader to reboot */ |
| 509 | set_scoop_gpio(&corgiscoop_device.dev, CORGI_SCP_LED_GREEN); | 564 | gpio_set_value(CORGI_GPIO_LED_GREEN, 1); |
| 565 | |||
| 510 | arm_machine_restart('h'); | 566 | arm_machine_restart('h'); |
| 511 | } | 567 | } |
| 512 | 568 | ||
| @@ -515,20 +571,12 @@ static void __init corgi_init(void) | |||
| 515 | pm_power_off = corgi_poweroff; | 571 | pm_power_off = corgi_poweroff; |
| 516 | arm_pm_restart = corgi_restart; | 572 | arm_pm_restart = corgi_restart; |
| 517 | 573 | ||
| 518 | /* setup sleep mode values */ | ||
| 519 | PWER = 0x00000002; | ||
| 520 | PFER = 0x00000000; | ||
| 521 | PRER = 0x00000002; | ||
| 522 | PGSR0 = 0x0158C000; | ||
| 523 | PGSR1 = 0x00FF0080; | ||
| 524 | PGSR2 = 0x0001C004; | ||
| 525 | /* Stop 3.6MHz and drive HIGH to PCMCIA and CS */ | 574 | /* Stop 3.6MHz and drive HIGH to PCMCIA and CS */ |
| 526 | PCFR |= PCFR_OPDE; | 575 | PCFR |= PCFR_OPDE; |
| 527 | 576 | ||
| 528 | corgi_ssp_set_machinfo(&corgi_ssp_machinfo); | 577 | pxa2xx_mfp_config(ARRAY_AND_SIZE(corgi_pin_config)); |
| 529 | 578 | ||
| 530 | pxa_gpio_mode(CORGI_GPIO_IR_ON | GPIO_OUT); | 579 | corgi_init_spi(); |
| 531 | pxa_gpio_mode(CORGI_GPIO_HSYNC | GPIO_IN); | ||
| 532 | 580 | ||
| 533 | pxa_set_udc_info(&udc_info); | 581 | pxa_set_udc_info(&udc_info); |
| 534 | pxa_set_mci_info(&corgi_mci_platform_data); | 582 | pxa_set_mci_info(&corgi_mci_platform_data); |
diff --git a/arch/arm/mach-pxa/corgi_lcd.c b/arch/arm/mach-pxa/corgi_lcd.c deleted file mode 100644 index 311baf149b07..000000000000 --- a/arch/arm/mach-pxa/corgi_lcd.c +++ /dev/null | |||
| @@ -1,290 +0,0 @@ | |||
| 1 | /* | ||
| 2 | * linux/arch/arm/mach-pxa/corgi_lcd.c | ||
| 3 | * | ||
| 4 | * Corgi/Spitz LCD Specific Code | ||
| 5 | * | ||
| 6 | * Copyright (C) 2005 Richard Purdie | ||
| 7 | * | ||
| 8 | * Connectivity: | ||
| 9 | * Corgi - LCD to ATI Imageon w100 (Wallaby) | ||
| 10 | * Spitz - LCD to PXA Framebuffer | ||
| 11 | * | ||
| 12 | * This program is free software; you can redistribute it and/or modify | ||
| 13 | * it under the terms of the GNU General Public License version 2 as | ||
| 14 | * published by the Free Software Foundation. | ||
| 15 | * | ||
| 16 | */ | ||
| 17 | |||
| 18 | #include <linux/delay.h> | ||
| 19 | #include <linux/kernel.h> | ||
| 20 | #include <linux/platform_device.h> | ||
| 21 | #include <linux/module.h> | ||
| 22 | #include <linux/string.h> | ||
| 23 | #include <mach/akita.h> | ||
| 24 | #include <mach/corgi.h> | ||
| 25 | #include <mach/hardware.h> | ||
| 26 | #include <mach/pxa-regs.h> | ||
| 27 | #include <mach/sharpsl.h> | ||
| 28 | #include <mach/spitz.h> | ||
| 29 | #include <asm/hardware/scoop.h> | ||
| 30 | #include <asm/mach/sharpsl_param.h> | ||
| 31 | #include "generic.h" | ||
| 32 | |||
| 33 | /* Register Addresses */ | ||
| 34 | #define RESCTL_ADRS 0x00 | ||
| 35 | #define PHACTRL_ADRS 0x01 | ||
| 36 | #define DUTYCTRL_ADRS 0x02 | ||
| 37 | #define POWERREG0_ADRS 0x03 | ||
| 38 | #define POWERREG1_ADRS 0x04 | ||
| 39 | #define GPOR3_ADRS 0x05 | ||
| 40 | #define PICTRL_ADRS 0x06 | ||
| 41 | #define POLCTRL_ADRS 0x07 | ||
| 42 | |||
| 43 | /* Register Bit Definitions */ | ||
| 44 | #define RESCTL_QVGA 0x01 | ||
| 45 | #define RESCTL_VGA 0x00 | ||
| 46 | |||
| 47 | #define POWER1_VW_ON 0x01 /* VW Supply FET ON */ | ||
| 48 | #define POWER1_GVSS_ON 0x02 /* GVSS(-8V) Power Supply ON */ | ||
| 49 | #define POWER1_VDD_ON 0x04 /* VDD(8V),SVSS(-4V) Power Supply ON */ | ||
| 50 | |||
| 51 | #define POWER1_VW_OFF 0x00 /* VW Supply FET OFF */ | ||
| 52 | #define POWER1_GVSS_OFF 0x00 /* GVSS(-8V) Power Supply OFF */ | ||
| 53 | #define POWER1_VDD_OFF 0x00 /* VDD(8V),SVSS(-4V) Power Supply OFF */ | ||
| 54 | |||
| 55 | #define POWER0_COM_DCLK 0x01 /* COM Voltage DC Bias DAC Serial Data Clock */ | ||
| 56 | #define POWER0_COM_DOUT 0x02 /* COM Voltage DC Bias DAC Serial Data Out */ | ||
| 57 | #define POWER0_DAC_ON 0x04 /* DAC Power Supply ON */ | ||
| 58 | #define POWER0_COM_ON 0x08 /* COM Power Supply ON */ | ||
| 59 | #define POWER0_VCC5_ON 0x10 /* VCC5 Power Supply ON */ | ||
| 60 | |||
| 61 | #define POWER0_DAC_OFF 0x00 /* DAC Power Supply OFF */ | ||
| 62 | #define POWER0_COM_OFF 0x00 /* COM Power Supply OFF */ | ||
| 63 | #define POWER0_VCC5_OFF 0x00 /* VCC5 Power Supply OFF */ | ||
| 64 | |||
| 65 | #define PICTRL_INIT_STATE 0x01 | ||
| 66 | #define PICTRL_INIOFF 0x02 | ||
| 67 | #define PICTRL_POWER_DOWN 0x04 | ||
| 68 | #define PICTRL_COM_SIGNAL_OFF 0x08 | ||
| 69 | #define PICTRL_DAC_SIGNAL_OFF 0x10 | ||
| 70 | |||
| 71 | #define POLCTRL_SYNC_POL_FALL 0x01 | ||
| 72 | #define POLCTRL_EN_POL_FALL 0x02 | ||
| 73 | #define POLCTRL_DATA_POL_FALL 0x04 | ||
| 74 | #define POLCTRL_SYNC_ACT_H 0x08 | ||
| 75 | #define POLCTRL_EN_ACT_L 0x10 | ||
| 76 | |||
| 77 | #define POLCTRL_SYNC_POL_RISE 0x00 | ||
| 78 | #define POLCTRL_EN_POL_RISE 0x00 | ||
| 79 | #define POLCTRL_DATA_POL_RISE 0x00 | ||
| 80 | #define POLCTRL_SYNC_ACT_L 0x00 | ||
| 81 | #define POLCTRL_EN_ACT_H 0x00 | ||
| 82 | |||
| 83 | #define PHACTRL_PHASE_MANUAL 0x01 | ||
| 84 | #define DEFAULT_PHAD_QVGA (9) | ||
| 85 | #define DEFAULT_COMADJ (125) | ||
| 86 | |||
| 87 | /* | ||
| 88 | * This is only a psuedo I2C interface. We can't use the standard kernel | ||
| 89 | * routines as the interface is write only. We just assume the data is acked... | ||
| 90 | */ | ||
| 91 | static void lcdtg_ssp_i2c_send(u8 data) | ||
| 92 | { | ||
| 93 | corgi_ssp_lcdtg_send(POWERREG0_ADRS, data); | ||
| 94 | udelay(10); | ||
| 95 | } | ||
| 96 | |||
| 97 | static void lcdtg_i2c_send_bit(u8 data) | ||
| 98 | { | ||
| 99 | lcdtg_ssp_i2c_send(data); | ||
| 100 | lcdtg_ssp_i2c_send(data | POWER0_COM_DCLK); | ||
| 101 | lcdtg_ssp_i2c_send(data); | ||
| 102 | } | ||
| 103 | |||
| 104 | static void lcdtg_i2c_send_start(u8 base) | ||
| 105 | { | ||
| 106 | lcdtg_ssp_i2c_send(base | POWER0_COM_DCLK | POWER0_COM_DOUT); | ||
| 107 | lcdtg_ssp_i2c_send(base | POWER0_COM_DCLK); | ||
| 108 | lcdtg_ssp_i2c_send(base); | ||
| 109 | } | ||
| 110 | |||
| 111 | static void lcdtg_i2c_send_stop(u8 base) | ||
| 112 | { | ||
| 113 | lcdtg_ssp_i2c_send(base); | ||
| 114 | lcdtg_ssp_i2c_send(base | POWER0_COM_DCLK); | ||
| 115 | lcdtg_ssp_i2c_send(base | POWER0_COM_DCLK | POWER0_COM_DOUT); | ||
| 116 | } | ||
| 117 | |||
| 118 | static void lcdtg_i2c_send_byte(u8 base, u8 data) | ||
| 119 | { | ||
| 120 | int i; | ||
| 121 | for (i = 0; i < 8; i++) { | ||
| 122 | if (data & 0x80) | ||
| 123 | lcdtg_i2c_send_bit(base | POWER0_COM_DOUT); | ||
| 124 | else | ||
| 125 | lcdtg_i2c_send_bit(base); | ||
| 126 | data <<= 1; | ||
| 127 | } | ||
| 128 | } | ||
| 129 | |||
| 130 | static void lcdtg_i2c_wait_ack(u8 base) | ||
| 131 | { | ||
| 132 | lcdtg_i2c_send_bit(base); | ||
| 133 | } | ||
| 134 | |||
| 135 | static void lcdtg_set_common_voltage(u8 base_data, u8 data) | ||
| 136 | { | ||
| 137 | /* Set Common Voltage to M62332FP via I2C */ | ||
| 138 | lcdtg_i2c_send_start(base_data); | ||
| 139 | lcdtg_i2c_send_byte(base_data, 0x9c); | ||
| 140 | lcdtg_i2c_wait_ack(base_data); | ||
| 141 | lcdtg_i2c_send_byte(base_data, 0x00); | ||
| 142 | lcdtg_i2c_wait_ack(base_data); | ||
| 143 | lcdtg_i2c_send_byte(base_data, data); | ||
| 144 | lcdtg_i2c_wait_ack(base_data); | ||
| 145 | lcdtg_i2c_send_stop(base_data); | ||
| 146 | } | ||
| 147 | |||
| 148 | /* Set Phase Adjust */ | ||
| 149 | static void lcdtg_set_phadadj(int mode) | ||
| 150 | { | ||
| 151 | int adj; | ||
| 152 | switch(mode) { | ||
| 153 | case 480: | ||
| 154 | case 640: | ||
| 155 | /* Setting for VGA */ | ||
| 156 | adj = sharpsl_param.phadadj; | ||
| 157 | if (adj < 0) { | ||
| 158 | adj = PHACTRL_PHASE_MANUAL; | ||
| 159 | } else { | ||
| 160 | adj = ((adj & 0x0f) << 1) | PHACTRL_PHASE_MANUAL; | ||
| 161 | } | ||
| 162 | break; | ||
| 163 | case 240: | ||
| 164 | case 320: | ||
| 165 | default: | ||
| 166 | /* Setting for QVGA */ | ||
| 167 | adj = (DEFAULT_PHAD_QVGA << 1) | PHACTRL_PHASE_MANUAL; | ||
| 168 | break; | ||
| 169 | } | ||
| 170 | |||
| 171 | corgi_ssp_lcdtg_send(PHACTRL_ADRS, adj); | ||
| 172 | } | ||
| 173 | |||
| 174 | static int lcd_inited; | ||
| 175 | |||
| 176 | void corgi_lcdtg_hw_init(int mode) | ||
| 177 | { | ||
| 178 | if (!lcd_inited) { | ||
| 179 | int comadj; | ||
| 180 | |||
| 181 | /* Initialize Internal Logic & Port */ | ||
| 182 | corgi_ssp_lcdtg_send(PICTRL_ADRS, PICTRL_POWER_DOWN | PICTRL_INIOFF | PICTRL_INIT_STATE | ||
| 183 | | PICTRL_COM_SIGNAL_OFF | PICTRL_DAC_SIGNAL_OFF); | ||
| 184 | |||
| 185 | corgi_ssp_lcdtg_send(POWERREG0_ADRS, POWER0_COM_DCLK | POWER0_COM_DOUT | POWER0_DAC_OFF | ||
| 186 | | POWER0_COM_OFF | POWER0_VCC5_OFF); | ||
| 187 | |||
| 188 | corgi_ssp_lcdtg_send(POWERREG1_ADRS, POWER1_VW_OFF | POWER1_GVSS_OFF | POWER1_VDD_OFF); | ||
| 189 | |||
| 190 | /* VDD(+8V), SVSS(-4V) ON */ | ||
| 191 | corgi_ssp_lcdtg_send(POWERREG1_ADRS, POWER1_VW_OFF | POWER1_GVSS_OFF | POWER1_VDD_ON); | ||
| 192 | mdelay(3); | ||
| 193 | |||
| 194 | /* DAC ON */ | ||
| 195 | corgi_ssp_lcdtg_send(POWERREG0_ADRS, POWER0_COM_DCLK | POWER0_COM_DOUT | POWER0_DAC_ON | ||
| 196 | | POWER0_COM_OFF | POWER0_VCC5_OFF); | ||
| 197 | |||
| 198 | /* INIB = H, INI = L */ | ||
| 199 | /* PICTL[0] = H , PICTL[1] = PICTL[2] = PICTL[4] = L */ | ||
| 200 | corgi_ssp_lcdtg_send(PICTRL_ADRS, PICTRL_INIT_STATE | PICTRL_COM_SIGNAL_OFF); | ||
| 201 | |||
| 202 | /* Set Common Voltage */ | ||
| 203 | comadj = sharpsl_param.comadj; | ||
| 204 | if (comadj < 0) | ||
| 205 | comadj = DEFAULT_COMADJ; | ||
| 206 | lcdtg_set_common_voltage((POWER0_DAC_ON | POWER0_COM_OFF | POWER0_VCC5_OFF), comadj); | ||
| 207 | |||
| 208 | /* VCC5 ON, DAC ON */ | ||
| 209 | corgi_ssp_lcdtg_send(POWERREG0_ADRS, POWER0_COM_DCLK | POWER0_COM_DOUT | POWER0_DAC_ON | | ||
| 210 | POWER0_COM_OFF | POWER0_VCC5_ON); | ||
| 211 | |||
| 212 | /* GVSS(-8V) ON, VDD ON */ | ||
| 213 | corgi_ssp_lcdtg_send(POWERREG1_ADRS, POWER1_VW_OFF | POWER1_GVSS_ON | POWER1_VDD_ON); | ||
| 214 | mdelay(2); | ||
| 215 | |||
| 216 | /* COM SIGNAL ON (PICTL[3] = L) */ | ||
| 217 | corgi_ssp_lcdtg_send(PICTRL_ADRS, PICTRL_INIT_STATE); | ||
| 218 | |||
| 219 | /* COM ON, DAC ON, VCC5_ON */ | ||
| 220 | corgi_ssp_lcdtg_send(POWERREG0_ADRS, POWER0_COM_DCLK | POWER0_COM_DOUT | POWER0_DAC_ON | ||
| 221 | | POWER0_COM_ON | POWER0_VCC5_ON); | ||
| 222 | |||
| 223 | /* VW ON, GVSS ON, VDD ON */ | ||
| 224 | corgi_ssp_lcdtg_send(POWERREG1_ADRS, POWER1_VW_ON | POWER1_GVSS_ON | POWER1_VDD_ON); | ||
| 225 | |||
| 226 | /* Signals output enable */ | ||
| 227 | corgi_ssp_lcdtg_send(PICTRL_ADRS, 0); | ||
| 228 | |||
| 229 | /* Set Phase Adjust */ | ||
| 230 | lcdtg_set_phadadj(mode); | ||
| 231 | |||
| 232 | /* Initialize for Input Signals from ATI */ | ||
| 233 | corgi_ssp_lcdtg_send(POLCTRL_ADRS, POLCTRL_SYNC_POL_RISE | POLCTRL_EN_POL_RISE | ||
| 234 | | POLCTRL_DATA_POL_RISE | POLCTRL_SYNC_ACT_L | POLCTRL_EN_ACT_H); | ||
| 235 | udelay(1000); | ||
| 236 | |||
| 237 | lcd_inited=1; | ||
| 238 | } else { | ||
| 239 | lcdtg_set_phadadj(mode); | ||
| 240 | } | ||
| 241 | |||
| 242 | switch(mode) { | ||
| 243 | case 480: | ||
| 244 | case 640: | ||
| 245 | /* Set Lcd Resolution (VGA) */ | ||
| 246 | corgi_ssp_lcdtg_send(RESCTL_ADRS, RESCTL_VGA); | ||
| 247 | break; | ||
| 248 | case 240: | ||
| 249 | case 320: | ||
| 250 | default: | ||
| 251 | /* Set Lcd Resolution (QVGA) */ | ||
| 252 | corgi_ssp_lcdtg_send(RESCTL_ADRS, RESCTL_QVGA); | ||
| 253 | break; | ||
| 254 | } | ||
| 255 | } | ||
| 256 | |||
| 257 | void corgi_lcdtg_suspend(void) | ||
| 258 | { | ||
| 259 | /* 60Hz x 2 frame = 16.7msec x 2 = 33.4 msec */ | ||
| 260 | mdelay(34); | ||
| 261 | |||
| 262 | /* (1)VW OFF */ | ||
| 263 | corgi_ssp_lcdtg_send(POWERREG1_ADRS, POWER1_VW_OFF | POWER1_GVSS_ON | POWER1_VDD_ON); | ||
| 264 | |||
| 265 | /* (2)COM OFF */ | ||
| 266 | corgi_ssp_lcdtg_send(PICTRL_ADRS, PICTRL_COM_SIGNAL_OFF); | ||
| 267 | corgi_ssp_lcdtg_send(POWERREG0_ADRS, POWER0_DAC_ON | POWER0_COM_OFF | POWER0_VCC5_ON); | ||
| 268 | |||
| 269 | /* (3)Set Common Voltage Bias 0V */ | ||
| 270 | lcdtg_set_common_voltage(POWER0_DAC_ON | POWER0_COM_OFF | POWER0_VCC5_ON, 0); | ||
| 271 | |||
| 272 | /* (4)GVSS OFF */ | ||
| 273 | corgi_ssp_lcdtg_send(POWERREG1_ADRS, POWER1_VW_OFF | POWER1_GVSS_OFF | POWER1_VDD_ON); | ||
| 274 | |||
| 275 | /* (5)VCC5 OFF */ | ||
| 276 | corgi_ssp_lcdtg_send(POWERREG0_ADRS, POWER0_DAC_ON | POWER0_COM_OFF | POWER0_VCC5_OFF); | ||
| 277 | |||
| 278 | /* (6)Set PDWN, INIOFF, DACOFF */ | ||
| 279 | corgi_ssp_lcdtg_send(PICTRL_ADRS, PICTRL_INIOFF | PICTRL_DAC_SIGNAL_OFF | | ||
| 280 | PICTRL_POWER_DOWN | PICTRL_COM_SIGNAL_OFF); | ||
| 281 | |||
| 282 | /* (7)DAC OFF */ | ||
| 283 | corgi_ssp_lcdtg_send(POWERREG0_ADRS, POWER0_DAC_OFF | POWER0_COM_OFF | POWER0_VCC5_OFF); | ||
| 284 | |||
| 285 | /* (8)VDD OFF */ | ||
| 286 | corgi_ssp_lcdtg_send(POWERREG1_ADRS, POWER1_VW_OFF | POWER1_GVSS_OFF | POWER1_VDD_OFF); | ||
| 287 | |||
| 288 | lcd_inited = 0; | ||
| 289 | } | ||
| 290 | |||
diff --git a/arch/arm/mach-pxa/corgi_pm.c b/arch/arm/mach-pxa/corgi_pm.c index 35bbfccd2df3..eb7d6c94aa42 100644 --- a/arch/arm/mach-pxa/corgi_pm.c +++ b/arch/arm/mach-pxa/corgi_pm.c | |||
| @@ -21,7 +21,6 @@ | |||
| 21 | #include <asm/irq.h> | 21 | #include <asm/irq.h> |
| 22 | #include <asm/mach-types.h> | 22 | #include <asm/mach-types.h> |
| 23 | #include <mach/hardware.h> | 23 | #include <mach/hardware.h> |
| 24 | #include <asm/hardware/scoop.h> | ||
| 25 | 24 | ||
| 26 | #include <mach/sharpsl.h> | 25 | #include <mach/sharpsl.h> |
| 27 | #include <mach/corgi.h> | 26 | #include <mach/corgi.h> |
diff --git a/arch/arm/mach-pxa/corgi_ssp.c b/arch/arm/mach-pxa/corgi_ssp.c deleted file mode 100644 index 8e2f2215c4ba..000000000000 --- a/arch/arm/mach-pxa/corgi_ssp.c +++ /dev/null | |||
| @@ -1,276 +0,0 @@ | |||
| 1 | /* | ||
| 2 | * SSP control code for Sharp Corgi devices | ||
| 3 | * | ||
| 4 | * Copyright (c) 2004-2005 Richard Purdie | ||
| 5 | * | ||
| 6 | * This program is free software; you can redistribute it and/or modify | ||
| 7 | * it under the terms of the GNU General Public License version 2 as | ||
| 8 | * published by the Free Software Foundation. | ||
| 9 | * | ||
| 10 | */ | ||
| 11 | |||
| 12 | #include <linux/module.h> | ||
| 13 | #include <linux/init.h> | ||
| 14 | #include <linux/kernel.h> | ||
| 15 | #include <linux/sched.h> | ||
| 16 | #include <linux/slab.h> | ||
| 17 | #include <linux/delay.h> | ||
| 18 | #include <linux/platform_device.h> | ||
| 19 | #include <mach/hardware.h> | ||
| 20 | #include <asm/mach-types.h> | ||
| 21 | |||
| 22 | #include <mach/ssp.h> | ||
| 23 | #include <mach/pxa-regs.h> | ||
| 24 | #include <mach/pxa2xx-gpio.h> | ||
| 25 | #include <mach/regs-ssp.h> | ||
| 26 | #include "sharpsl.h" | ||
| 27 | |||
| 28 | static DEFINE_SPINLOCK(corgi_ssp_lock); | ||
| 29 | static struct ssp_dev corgi_ssp_dev; | ||
| 30 | static struct ssp_state corgi_ssp_state; | ||
| 31 | static struct corgissp_machinfo *ssp_machinfo; | ||
| 32 | |||
| 33 | /* | ||
| 34 | * There are three devices connected to the SSP interface: | ||
| 35 | * 1. A touchscreen controller (TI ADS7846 compatible) | ||
| 36 | * 2. An LCD controller (with some Backlight functionality) | ||
| 37 | * 3. A battery monitoring IC (Maxim MAX1111) | ||
| 38 | * | ||
| 39 | * Each device uses a different speed/mode of communication. | ||
| 40 | * | ||
| 41 | * The touchscreen is very sensitive and the most frequently used | ||
| 42 | * so the port is left configured for this. | ||
| 43 | * | ||
| 44 | * Devices are selected using Chip Selects on GPIOs. | ||
| 45 | */ | ||
| 46 | |||
| 47 | /* | ||
| 48 | * ADS7846 Routines | ||
| 49 | */ | ||
| 50 | unsigned long corgi_ssp_ads7846_putget(ulong data) | ||
| 51 | { | ||
| 52 | unsigned long flag; | ||
| 53 | u32 ret = 0; | ||
| 54 | |||
| 55 | spin_lock_irqsave(&corgi_ssp_lock, flag); | ||
| 56 | if (ssp_machinfo->cs_ads7846 >= 0) | ||
| 57 | GPCR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846); | ||
| 58 | |||
| 59 | ssp_write_word(&corgi_ssp_dev,data); | ||
| 60 | ssp_read_word(&corgi_ssp_dev, &ret); | ||
| 61 | |||
| 62 | if (ssp_machinfo->cs_ads7846 >= 0) | ||
| 63 | GPSR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846); | ||
| 64 | spin_unlock_irqrestore(&corgi_ssp_lock, flag); | ||
| 65 | |||
| 66 | return ret; | ||
| 67 | } | ||
| 68 | |||
| 69 | /* | ||
| 70 | * NOTE: These functions should always be called in interrupt context | ||
| 71 | * and use the _lock and _unlock functions. They are very time sensitive. | ||
| 72 | */ | ||
| 73 | void corgi_ssp_ads7846_lock(void) | ||
| 74 | { | ||
| 75 | spin_lock(&corgi_ssp_lock); | ||
| 76 | if (ssp_machinfo->cs_ads7846 >= 0) | ||
| 77 | GPCR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846); | ||
| 78 | } | ||
| 79 | |||
| 80 | void corgi_ssp_ads7846_unlock(void) | ||
| 81 | { | ||
| 82 | if (ssp_machinfo->cs_ads7846 >= 0) | ||
| 83 | GPSR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846); | ||
| 84 | spin_unlock(&corgi_ssp_lock); | ||
| 85 | } | ||
| 86 | |||
| 87 | void corgi_ssp_ads7846_put(ulong data) | ||
| 88 | { | ||
| 89 | ssp_write_word(&corgi_ssp_dev,data); | ||
| 90 | } | ||
| 91 | |||
| 92 | unsigned long corgi_ssp_ads7846_get(void) | ||
| 93 | { | ||
| 94 | u32 ret = 0; | ||
| 95 | ssp_read_word(&corgi_ssp_dev, &ret); | ||
| 96 | return ret; | ||
| 97 | } | ||
| 98 | |||
| 99 | EXPORT_SYMBOL(corgi_ssp_ads7846_putget); | ||
| 100 | EXPORT_SYMBOL(corgi_ssp_ads7846_lock); | ||
| 101 | EXPORT_SYMBOL(corgi_ssp_ads7846_unlock); | ||
| 102 | EXPORT_SYMBOL(corgi_ssp_ads7846_put); | ||
| 103 | EXPORT_SYMBOL(corgi_ssp_ads7846_get); | ||
| 104 | |||
| 105 | |||
| 106 | /* | ||
| 107 | * LCD/Backlight Routines | ||
| 108 | */ | ||
| 109 | unsigned long corgi_ssp_dac_put(ulong data) | ||
| 110 | { | ||
| 111 | unsigned long flag, sscr1 = SSCR1_SPH; | ||
| 112 | u32 tmp; | ||
| 113 | |||
| 114 | spin_lock_irqsave(&corgi_ssp_lock, flag); | ||
| 115 | |||
| 116 | if (machine_is_spitz() || machine_is_akita() || machine_is_borzoi()) | ||
| 117 | sscr1 = 0; | ||
| 118 | |||
| 119 | ssp_disable(&corgi_ssp_dev); | ||
| 120 | ssp_config(&corgi_ssp_dev, (SSCR0_Motorola | (SSCR0_DSS & 0x07 )), sscr1, 0, SSCR0_SerClkDiv(ssp_machinfo->clk_lcdcon)); | ||
| 121 | ssp_enable(&corgi_ssp_dev); | ||
| 122 | |||
| 123 | if (ssp_machinfo->cs_lcdcon >= 0) | ||
| 124 | GPCR(ssp_machinfo->cs_lcdcon) = GPIO_bit(ssp_machinfo->cs_lcdcon); | ||
| 125 | ssp_write_word(&corgi_ssp_dev,data); | ||
| 126 | /* Read null data back from device to prevent SSP overflow */ | ||
| 127 | ssp_read_word(&corgi_ssp_dev, &tmp); | ||
| 128 | if (ssp_machinfo->cs_lcdcon >= 0) | ||
| 129 | GPSR(ssp_machinfo->cs_lcdcon) = GPIO_bit(ssp_machinfo->cs_lcdcon); | ||
| 130 | |||
| 131 | ssp_disable(&corgi_ssp_dev); | ||
| 132 | ssp_config(&corgi_ssp_dev, (SSCR0_National | (SSCR0_DSS & 0x0b )), 0, 0, SSCR0_SerClkDiv(ssp_machinfo->clk_ads7846)); | ||
| 133 | ssp_enable(&corgi_ssp_dev); | ||
| 134 | |||
| 135 | spin_unlock_irqrestore(&corgi_ssp_lock, flag); | ||
| 136 | |||
| 137 | return 0; | ||
| 138 | } | ||
| 139 | |||
| 140 | void corgi_ssp_lcdtg_send(u8 adrs, u8 data) | ||
| 141 | { | ||
| 142 | corgi_ssp_dac_put(((adrs & 0x07) << 5) | (data & 0x1f)); | ||
| 143 | } | ||
| 144 | |||
| 145 | void corgi_ssp_blduty_set(int duty) | ||
| 146 | { | ||
| 147 | corgi_ssp_lcdtg_send(0x02,duty); | ||
| 148 | } | ||
| 149 | |||
| 150 | EXPORT_SYMBOL(corgi_ssp_lcdtg_send); | ||
| 151 | EXPORT_SYMBOL(corgi_ssp_blduty_set); | ||
| 152 | |||
| 153 | /* | ||
| 154 | * Max1111 Routines | ||
| 155 | */ | ||
| 156 | int corgi_ssp_max1111_get(ulong data) | ||
| 157 | { | ||
| 158 | unsigned long flag; | ||
| 159 | long voltage = 0, voltage1 = 0, voltage2 = 0; | ||
| 160 | |||
| 161 | spin_lock_irqsave(&corgi_ssp_lock, flag); | ||
| 162 | if (ssp_machinfo->cs_max1111 >= 0) | ||
| 163 | GPCR(ssp_machinfo->cs_max1111) = GPIO_bit(ssp_machinfo->cs_max1111); | ||
| 164 | ssp_disable(&corgi_ssp_dev); | ||
| 165 | ssp_config(&corgi_ssp_dev, (SSCR0_Motorola | (SSCR0_DSS & 0x07 )), 0, 0, SSCR0_SerClkDiv(ssp_machinfo->clk_max1111)); | ||
| 166 | ssp_enable(&corgi_ssp_dev); | ||
| 167 | |||
| 168 | udelay(1); | ||
| 169 | |||
| 170 | /* TB1/RB1 */ | ||
| 171 | ssp_write_word(&corgi_ssp_dev,data); | ||
| 172 | ssp_read_word(&corgi_ssp_dev, (u32*)&voltage1); /* null read */ | ||
| 173 | |||
| 174 | /* TB12/RB2 */ | ||
| 175 | ssp_write_word(&corgi_ssp_dev,0); | ||
| 176 | ssp_read_word(&corgi_ssp_dev, (u32*)&voltage1); | ||
| 177 | |||
| 178 | /* TB13/RB3*/ | ||
| 179 | ssp_write_word(&corgi_ssp_dev,0); | ||
| 180 | ssp_read_word(&corgi_ssp_dev, (u32*)&voltage2); | ||
| 181 | |||
| 182 | ssp_disable(&corgi_ssp_dev); | ||
| 183 | ssp_config(&corgi_ssp_dev, (SSCR0_National | (SSCR0_DSS & 0x0b )), 0, 0, SSCR0_SerClkDiv(ssp_machinfo->clk_ads7846)); | ||
| 184 | ssp_enable(&corgi_ssp_dev); | ||
| 185 | if (ssp_machinfo->cs_max1111 >= 0) | ||
| 186 | GPSR(ssp_machinfo->cs_max1111) = GPIO_bit(ssp_machinfo->cs_max1111); | ||
| 187 | spin_unlock_irqrestore(&corgi_ssp_lock, flag); | ||
| 188 | |||
| 189 | if (voltage1 & 0xc0 || voltage2 & 0x3f) | ||
| 190 | voltage = -1; | ||
| 191 | else | ||
| 192 | voltage = ((voltage1 << 2) & 0xfc) | ((voltage2 >> 6) & 0x03); | ||
| 193 | |||
| 194 | return voltage; | ||
| 195 | } | ||
| 196 | |||
| 197 | EXPORT_SYMBOL(corgi_ssp_max1111_get); | ||
| 198 | |||
| 199 | /* | ||
| 200 | * Support Routines | ||
| 201 | */ | ||
| 202 | |||
| 203 | void __init corgi_ssp_set_machinfo(struct corgissp_machinfo *machinfo) | ||
| 204 | { | ||
| 205 | ssp_machinfo = machinfo; | ||
| 206 | } | ||
| 207 | |||
| 208 | static int __init corgi_ssp_probe(struct platform_device *dev) | ||
| 209 | { | ||
| 210 | int ret; | ||
| 211 | |||
| 212 | /* Chip Select - Disable All */ | ||
| 213 | if (ssp_machinfo->cs_lcdcon >= 0) | ||
| 214 | pxa_gpio_mode(ssp_machinfo->cs_lcdcon | GPIO_OUT | GPIO_DFLT_HIGH); | ||
| 215 | if (ssp_machinfo->cs_max1111 >= 0) | ||
| 216 | pxa_gpio_mode(ssp_machinfo->cs_max1111 | GPIO_OUT | GPIO_DFLT_HIGH); | ||
| 217 | if (ssp_machinfo->cs_ads7846 >= 0) | ||
| 218 | pxa_gpio_mode(ssp_machinfo->cs_ads7846 | GPIO_OUT | GPIO_DFLT_HIGH); | ||
| 219 | |||
| 220 | ret = ssp_init(&corgi_ssp_dev, ssp_machinfo->port, 0); | ||
| 221 | |||
| 222 | if (ret) | ||
| 223 | printk(KERN_ERR "Unable to register SSP handler!\n"); | ||
| 224 | else { | ||
| 225 | ssp_disable(&corgi_ssp_dev); | ||
| 226 | ssp_config(&corgi_ssp_dev, (SSCR0_National | (SSCR0_DSS & 0x0b )), 0, 0, SSCR0_SerClkDiv(ssp_machinfo->clk_ads7846)); | ||
| 227 | ssp_enable(&corgi_ssp_dev); | ||
| 228 | } | ||
| 229 | |||
| 230 | return ret; | ||
| 231 | } | ||
| 232 | |||
| 233 | static int corgi_ssp_remove(struct platform_device *dev) | ||
| 234 | { | ||
| 235 | ssp_exit(&corgi_ssp_dev); | ||
| 236 | return 0; | ||
| 237 | } | ||
| 238 | |||
| 239 | static int corgi_ssp_suspend(struct platform_device *dev, pm_message_t state) | ||
| 240 | { | ||
| 241 | ssp_flush(&corgi_ssp_dev); | ||
| 242 | ssp_save_state(&corgi_ssp_dev,&corgi_ssp_state); | ||
| 243 | |||
| 244 | return 0; | ||
| 245 | } | ||
| 246 | |||
| 247 | static int corgi_ssp_resume(struct platform_device *dev) | ||
| 248 | { | ||
| 249 | if (ssp_machinfo->cs_lcdcon >= 0) | ||
| 250 | GPSR(ssp_machinfo->cs_lcdcon) = GPIO_bit(ssp_machinfo->cs_lcdcon); /* High - Disable LCD Control/Timing Gen */ | ||
| 251 | if (ssp_machinfo->cs_max1111 >= 0) | ||
| 252 | GPSR(ssp_machinfo->cs_max1111) = GPIO_bit(ssp_machinfo->cs_max1111); /* High - Disable MAX1111*/ | ||
| 253 | if (ssp_machinfo->cs_ads7846 >= 0) | ||
| 254 | GPSR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846); /* High - Disable ADS7846*/ | ||
| 255 | ssp_restore_state(&corgi_ssp_dev,&corgi_ssp_state); | ||
| 256 | ssp_enable(&corgi_ssp_dev); | ||
| 257 | |||
| 258 | return 0; | ||
| 259 | } | ||
| 260 | |||
| 261 | static struct platform_driver corgissp_driver = { | ||
| 262 | .probe = corgi_ssp_probe, | ||
| 263 | .remove = corgi_ssp_remove, | ||
| 264 | .suspend = corgi_ssp_suspend, | ||
| 265 | .resume = corgi_ssp_resume, | ||
| 266 | .driver = { | ||
| 267 | .name = "corgi-ssp", | ||
| 268 | }, | ||
| 269 | }; | ||
| 270 | |||
| 271 | int __init corgi_ssp_init(void) | ||
| 272 | { | ||
| 273 | return platform_driver_register(&corgissp_driver); | ||
| 274 | } | ||
| 275 | |||
| 276 | arch_initcall(corgi_ssp_init); | ||
diff --git a/arch/arm/mach-pxa/cpu-pxa.c b/arch/arm/mach-pxa/cpufreq-pxa2xx.c index 6f5569bac131..d82528e74bd0 100644 --- a/arch/arm/mach-pxa/cpu-pxa.c +++ b/arch/arm/mach-pxa/cpufreq-pxa2xx.c | |||
| @@ -1,5 +1,5 @@ | |||
| 1 | /* | 1 | /* |
| 2 | * linux/arch/arm/mach-pxa/cpu-pxa.c | 2 | * linux/arch/arm/mach-pxa/cpufreq-pxa2xx.c |
| 3 | * | 3 | * |
| 4 | * Copyright (C) 2002,2003 Intrinsyc Software | 4 | * Copyright (C) 2002,2003 Intrinsyc Software |
| 5 | * | 5 | * |
diff --git a/arch/arm/mach-pxa/cpufreq-pxa3xx.c b/arch/arm/mach-pxa/cpufreq-pxa3xx.c new file mode 100644 index 000000000000..1ea0c9c0adaf --- /dev/null +++ b/arch/arm/mach-pxa/cpufreq-pxa3xx.c | |||
| @@ -0,0 +1,258 @@ | |||
| 1 | /* | ||
| 2 | * linux/arch/arm/mach-pxa/cpufreq-pxa3xx.c | ||
| 3 | * | ||
| 4 | * Copyright (C) 2008 Marvell International Ltd. | ||
| 5 | * | ||
| 6 | * This program is free software; you can redistribute it and/or modify | ||
| 7 | * it under the terms of the GNU General Public License as published by | ||
| 8 | * the Free Software Foundation; either version 2 of the License, or | ||
| 9 | * (at your option) any later version. | ||
| 10 | */ | ||
| 11 | |||
| 12 | #include <linux/kernel.h> | ||
| 13 | #include <linux/module.h> | ||
| 14 | #include <linux/sched.h> | ||
| 15 | #include <linux/init.h> | ||
| 16 | #include <linux/cpufreq.h> | ||
| 17 | |||
| 18 | #include <mach/hardware.h> | ||
| 19 | #include <mach/pxa-regs.h> | ||
| 20 | #include <mach/pxa3xx-regs.h> | ||
| 21 | |||
| 22 | #include "generic.h" | ||
| 23 | |||
| 24 | #define HSS_104M (0) | ||
| 25 | #define HSS_156M (1) | ||
| 26 | #define HSS_208M (2) | ||
| 27 | #define HSS_312M (3) | ||
| 28 | |||
| 29 | #define SMCFS_78M (0) | ||
| 30 | #define SMCFS_104M (2) | ||
| 31 | #define SMCFS_208M (5) | ||
| 32 | |||
| 33 | #define SFLFS_104M (0) | ||
| 34 | #define SFLFS_156M (1) | ||
| 35 | #define SFLFS_208M (2) | ||
| 36 | #define SFLFS_312M (3) | ||
| 37 | |||
| 38 | #define XSPCLK_156M (0) | ||
| 39 | #define XSPCLK_NONE (3) | ||
| 40 | |||
| 41 | #define DMCFS_26M (0) | ||
| 42 | #define DMCFS_260M (3) | ||
| 43 | |||
| 44 | struct pxa3xx_freq_info { | ||
| 45 | unsigned int cpufreq_mhz; | ||
| 46 | unsigned int core_xl : 5; | ||
| 47 | unsigned int core_xn : 3; | ||
| 48 | unsigned int hss : 2; | ||
| 49 | unsigned int dmcfs : 2; | ||
| 50 | unsigned int smcfs : 3; | ||
| 51 | unsigned int sflfs : 2; | ||
| 52 | unsigned int df_clkdiv : 3; | ||
| 53 | |||
| 54 | int vcc_core; /* in mV */ | ||
| 55 | int vcc_sram; /* in mV */ | ||
| 56 | }; | ||
| 57 | |||
| 58 | #define OP(cpufreq, _xl, _xn, _hss, _dmc, _smc, _sfl, _dfi, vcore, vsram) \ | ||
| 59 | { \ | ||
| 60 | .cpufreq_mhz = cpufreq, \ | ||
| 61 | .core_xl = _xl, \ | ||
| 62 | .core_xn = _xn, \ | ||
| 63 | .hss = HSS_##_hss##M, \ | ||
| 64 | .dmcfs = DMCFS_##_dmc##M, \ | ||
| 65 | .smcfs = SMCFS_##_smc##M, \ | ||
| 66 | .sflfs = SFLFS_##_sfl##M, \ | ||
| 67 | .df_clkdiv = _dfi, \ | ||
| 68 | .vcc_core = vcore, \ | ||
| 69 | .vcc_sram = vsram, \ | ||
| 70 | } | ||
| 71 | |||
| 72 | static struct pxa3xx_freq_info pxa300_freqs[] = { | ||
| 73 | /* CPU XL XN HSS DMEM SMEM SRAM DFI VCC_CORE VCC_SRAM */ | ||
| 74 | OP(104, 8, 1, 104, 260, 78, 104, 3, 1000, 1100), /* 104MHz */ | ||
| 75 | OP(208, 16, 1, 104, 260, 104, 156, 2, 1000, 1100), /* 208MHz */ | ||
| 76 | OP(416, 16, 2, 156, 260, 104, 208, 2, 1100, 1200), /* 416MHz */ | ||
| 77 | OP(624, 24, 2, 208, 260, 208, 312, 3, 1375, 1400), /* 624MHz */ | ||
| 78 | }; | ||
| 79 | |||
| 80 | static struct pxa3xx_freq_info pxa320_freqs[] = { | ||
| 81 | /* CPU XL XN HSS DMEM SMEM SRAM DFI VCC_CORE VCC_SRAM */ | ||
| 82 | OP(104, 8, 1, 104, 260, 78, 104, 3, 1000, 1100), /* 104MHz */ | ||
| 83 | OP(208, 16, 1, 104, 260, 104, 156, 2, 1000, 1100), /* 208MHz */ | ||
| 84 | OP(416, 16, 2, 156, 260, 104, 208, 2, 1100, 1200), /* 416MHz */ | ||
| 85 | OP(624, 24, 2, 208, 260, 208, 312, 3, 1375, 1400), /* 624MHz */ | ||
| 86 | OP(806, 31, 2, 208, 260, 208, 312, 3, 1400, 1400), /* 806MHz */ | ||
| 87 | }; | ||
| 88 | |||
| 89 | static unsigned int pxa3xx_freqs_num; | ||
| 90 | static struct pxa3xx_freq_info *pxa3xx_freqs; | ||
| 91 | static struct cpufreq_frequency_table *pxa3xx_freqs_table; | ||
| 92 | |||
| 93 | static int setup_freqs_table(struct cpufreq_policy *policy, | ||
| 94 | struct pxa3xx_freq_info *freqs, int num) | ||
| 95 | { | ||
| 96 | struct cpufreq_frequency_table *table; | ||
| 97 | int i; | ||
| 98 | |||
| 99 | table = kzalloc((num + 1) * sizeof(*table), GFP_KERNEL); | ||
| 100 | if (table == NULL) | ||
| 101 | return -ENOMEM; | ||
| 102 | |||
| 103 | for (i = 0; i < num; i++) { | ||
| 104 | table[i].index = i; | ||
| 105 | table[i].frequency = freqs[i].cpufreq_mhz * 1000; | ||
| 106 | } | ||
| 107 | table[num].frequency = i; | ||
| 108 | table[num].frequency = CPUFREQ_TABLE_END; | ||
| 109 | |||
| 110 | pxa3xx_freqs = freqs; | ||
| 111 | pxa3xx_freqs_num = num; | ||
| 112 | pxa3xx_freqs_table = table; | ||
| 113 | |||
| 114 | return cpufreq_frequency_table_cpuinfo(policy, table); | ||
| 115 | } | ||
| 116 | |||
| 117 | static void __update_core_freq(struct pxa3xx_freq_info *info) | ||
| 118 | { | ||
| 119 | uint32_t mask = ACCR_XN_MASK | ACCR_XL_MASK; | ||
| 120 | uint32_t accr = ACCR; | ||
| 121 | uint32_t xclkcfg; | ||
| 122 | |||
| 123 | accr &= ~(ACCR_XN_MASK | ACCR_XL_MASK | ACCR_XSPCLK_MASK); | ||
| 124 | accr |= ACCR_XN(info->core_xn) | ACCR_XL(info->core_xl); | ||
| 125 | |||
| 126 | /* No clock until core PLL is re-locked */ | ||
| 127 | accr |= ACCR_XSPCLK(XSPCLK_NONE); | ||
| 128 | |||
| 129 | xclkcfg = (info->core_xn == 2) ? 0x3 : 0x2; /* turbo bit */ | ||
| 130 | |||
| 131 | ACCR = accr; | ||
| 132 | __asm__("mcr p14, 0, %0, c6, c0, 0\n" : : "r"(xclkcfg)); | ||
| 133 | |||
| 134 | while ((ACSR & mask) != (accr & mask)) | ||
| 135 | cpu_relax(); | ||
| 136 | } | ||
| 137 | |||
| 138 | static void __update_bus_freq(struct pxa3xx_freq_info *info) | ||
| 139 | { | ||
| 140 | uint32_t mask; | ||
| 141 | uint32_t accr = ACCR; | ||
| 142 | |||
| 143 | mask = ACCR_SMCFS_MASK | ACCR_SFLFS_MASK | ACCR_HSS_MASK | | ||
| 144 | ACCR_DMCFS_MASK; | ||
| 145 | |||
| 146 | accr &= ~mask; | ||
| 147 | accr |= ACCR_SMCFS(info->smcfs) | ACCR_SFLFS(info->sflfs) | | ||
| 148 | ACCR_HSS(info->hss) | ACCR_DMCFS(info->dmcfs); | ||
| 149 | |||
| 150 | ACCR = accr; | ||
| 151 | |||
| 152 | while ((ACSR & mask) != (accr & mask)) | ||
| 153 | cpu_relax(); | ||
| 154 | } | ||
| 155 | |||
| 156 | static int pxa3xx_cpufreq_verify(struct cpufreq_policy *policy) | ||
| 157 | { | ||
| 158 | return cpufreq_frequency_table_verify(policy, pxa3xx_freqs_table); | ||
| 159 | } | ||
| 160 | |||
| 161 | static unsigned int pxa3xx_cpufreq_get(unsigned int cpu) | ||
| 162 | { | ||
| 163 | return get_clk_frequency_khz(0); | ||
| 164 | } | ||
| 165 | |||
| 166 | static int pxa3xx_cpufreq_set(struct cpufreq_policy *policy, | ||
| 167 | unsigned int target_freq, | ||
| 168 | unsigned int relation) | ||
| 169 | { | ||
| 170 | struct pxa3xx_freq_info *next; | ||
| 171 | struct cpufreq_freqs freqs; | ||
| 172 | unsigned long flags; | ||
| 173 | int idx; | ||
| 174 | |||
| 175 | if (policy->cpu != 0) | ||
| 176 | return -EINVAL; | ||
| 177 | |||
| 178 | /* Lookup the next frequency */ | ||
| 179 | if (cpufreq_frequency_table_target(policy, pxa3xx_freqs_table, | ||
| 180 | target_freq, relation, &idx)) | ||
| 181 | return -EINVAL; | ||
| 182 | |||
| 183 | next = &pxa3xx_freqs[idx]; | ||
| 184 | |||
| 185 | freqs.old = policy->cur; | ||
| 186 | freqs.new = next->cpufreq_mhz * 1000; | ||
| 187 | freqs.cpu = policy->cpu; | ||
| 188 | |||
| 189 | pr_debug("CPU frequency from %d MHz to %d MHz%s\n", | ||
| 190 | freqs.old / 1000, freqs.new / 1000, | ||
| 191 | (freqs.old == freqs.new) ? " (skipped)" : ""); | ||
| 192 | |||
| 193 | if (freqs.old == target_freq) | ||
| 194 | return 0; | ||
| 195 | |||
| 196 | cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); | ||
| 197 | |||
| 198 | local_irq_save(flags); | ||
| 199 | __update_core_freq(next); | ||
| 200 | __update_bus_freq(next); | ||
| 201 | local_irq_restore(flags); | ||
| 202 | |||
| 203 | cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); | ||
| 204 | |||
| 205 | return 0; | ||
| 206 | } | ||
| 207 | |||
| 208 | static __init int pxa3xx_cpufreq_init(struct cpufreq_policy *policy) | ||
| 209 | { | ||
| 210 | int ret = -EINVAL; | ||
| 211 | |||
| 212 | /* set default policy and cpuinfo */ | ||
| 213 | policy->governor = CPUFREQ_DEFAULT_GOVERNOR; | ||
| 214 | policy->cpuinfo.min_freq = 104000; | ||
| 215 | policy->cpuinfo.max_freq = (cpu_is_pxa320()) ? 806000 : 624000; | ||
| 216 | policy->cpuinfo.transition_latency = 1000; /* FIXME: 1 ms, assumed */ | ||
| 217 | policy->cur = policy->min = policy->max = get_clk_frequency_khz(0); | ||
| 218 | |||
| 219 | if (cpu_is_pxa300() || cpu_is_pxa310()) | ||
| 220 | ret = setup_freqs_table(policy, ARRAY_AND_SIZE(pxa300_freqs)); | ||
| 221 | |||
| 222 | if (cpu_is_pxa320()) | ||
| 223 | ret = setup_freqs_table(policy, ARRAY_AND_SIZE(pxa320_freqs)); | ||
| 224 | |||
| 225 | if (ret) { | ||
| 226 | pr_err("failed to setup frequency table\n"); | ||
| 227 | return ret; | ||
| 228 | } | ||
| 229 | |||
| 230 | pr_info("CPUFREQ support for PXA3xx initialized\n"); | ||
| 231 | return 0; | ||
| 232 | } | ||
| 233 | |||
| 234 | static struct cpufreq_driver pxa3xx_cpufreq_driver = { | ||
| 235 | .verify = pxa3xx_cpufreq_verify, | ||
| 236 | .target = pxa3xx_cpufreq_set, | ||
| 237 | .init = pxa3xx_cpufreq_init, | ||
| 238 | .get = pxa3xx_cpufreq_get, | ||
| 239 | .name = "pxa3xx-cpufreq", | ||
| 240 | }; | ||
| 241 | |||
| 242 | static int __init cpufreq_init(void) | ||
| 243 | { | ||
| 244 | if (cpu_is_pxa3xx()) | ||
| 245 | return cpufreq_register_driver(&pxa3xx_cpufreq_driver); | ||
| 246 | |||
| 247 | return 0; | ||
| 248 | } | ||
| 249 | module_init(cpufreq_init); | ||
| 250 | |||
| 251 | static void __exit cpufreq_exit(void) | ||
| 252 | { | ||
| 253 | cpufreq_unregister_driver(&pxa3xx_cpufreq_driver); | ||
| 254 | } | ||
| 255 | module_exit(cpufreq_exit); | ||
| 256 | |||
| 257 | MODULE_DESCRIPTION("CPU frequency scaling driver for PXA3xx"); | ||
| 258 | MODULE_LICENSE("GPL"); | ||
diff --git a/arch/arm/mach-pxa/devices.h b/arch/arm/mach-pxa/devices.h index 887c738f5911..bb04af4b0aa3 100644 --- a/arch/arm/mach-pxa/devices.h +++ b/arch/arm/mach-pxa/devices.h | |||
| @@ -32,5 +32,6 @@ extern struct platform_device pxa27x_device_pwm0; | |||
| 32 | extern struct platform_device pxa27x_device_pwm1; | 32 | extern struct platform_device pxa27x_device_pwm1; |
| 33 | 33 | ||
| 34 | extern struct platform_device pxa3xx_device_nand; | 34 | extern struct platform_device pxa3xx_device_nand; |
| 35 | extern struct platform_device pxa3xx_device_i2c_power; | ||
| 35 | 36 | ||
| 36 | void __init pxa_register_device(struct platform_device *dev, void *data); | 37 | void __init pxa_register_device(struct platform_device *dev, void *data); |
diff --git a/arch/arm/mach-pxa/e330.c b/arch/arm/mach-pxa/e330.c new file mode 100644 index 000000000000..d488eded2058 --- /dev/null +++ b/arch/arm/mach-pxa/e330.c | |||
| @@ -0,0 +1,43 @@ | |||
| 1 | /* | ||
| 2 | * Hardware definitions for the Toshiba eseries PDAs | ||
| 3 | * | ||
| 4 | * Copyright (c) 2003 Ian Molton <spyro@f2s.com> | ||
| 5 | * | ||
| 6 | * This file is licensed under | ||
| 7 | * the terms of the GNU General Public License version 2. This program | ||
| 8 | * is licensed "as is" without any warranty of any kind, whether express | ||
| 9 | * or implied. | ||
| 10 | * | ||
| 11 | */ | ||
| 12 | |||
| 13 | #include <linux/kernel.h> | ||
| 14 | #include <linux/init.h> | ||
| 15 | |||
| 16 | #include <asm/setup.h> | ||
| 17 | #include <asm/mach/arch.h> | ||
| 18 | #include <asm/mach-types.h> | ||
| 19 | |||
| 20 | #include <mach/mfp-pxa25x.h> | ||
| 21 | #include <mach/hardware.h> | ||
| 22 | #include <mach/udc.h> | ||
| 23 | |||
| 24 | #include "generic.h" | ||
| 25 | #include "eseries.h" | ||
| 26 | |||
| 27 | static void __init e330_init(void) | ||
| 28 | { | ||
| 29 | pxa_set_udc_info(&e7xx_udc_mach_info); | ||
| 30 | } | ||
| 31 | |||
| 32 | MACHINE_START(E330, "Toshiba e330") | ||
| 33 | /* Maintainer: Ian Molton (spyro@f2s.com) */ | ||
| 34 | .phys_io = 0x40000000, | ||
| 35 | .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, | ||
| 36 | .boot_params = 0xa0000100, | ||
| 37 | .map_io = pxa_map_io, | ||
| 38 | .init_irq = pxa25x_init_irq, | ||
| 39 | .fixup = eseries_fixup, | ||
| 40 | .init_machine = e330_init, | ||
| 41 | .timer = &pxa_timer, | ||
| 42 | MACHINE_END | ||
| 43 | |||
diff --git a/arch/arm/mach-pxa/e350.c b/arch/arm/mach-pxa/e350.c new file mode 100644 index 000000000000..8ecbc5479828 --- /dev/null +++ b/arch/arm/mach-pxa/e350.c | |||
| @@ -0,0 +1,43 @@ | |||
| 1 | /* | ||
| 2 | * Hardware definitions for the Toshiba eseries PDAs | ||
| 3 | * | ||
| 4 | * Copyright (c) 2003 Ian Molton <spyro@f2s.com> | ||
| 5 | * | ||
| 6 | * This file is licensed under | ||
| 7 | * the terms of the GNU General Public License version 2. This program | ||
| 8 | * is licensed "as is" without any warranty of any kind, whether express | ||
| 9 | * or implied. | ||
| 10 | * | ||
| 11 | */ | ||
| 12 | |||
| 13 | #include <linux/kernel.h> | ||
| 14 | #include <linux/init.h> | ||
| 15 | |||
| 16 | #include <asm/setup.h> | ||
| 17 | #include <asm/mach/arch.h> | ||
| 18 | #include <asm/mach-types.h> | ||
| 19 | |||
| 20 | #include <mach/mfp-pxa25x.h> | ||
| 21 | #include <mach/hardware.h> | ||
| 22 | #include <mach/udc.h> | ||
| 23 | |||
| 24 | #include "generic.h" | ||
| 25 | #include "eseries.h" | ||
| 26 | |||
| 27 | static void __init e350_init(void) | ||
| 28 | { | ||
| 29 | pxa_set_udc_info(&e7xx_udc_mach_info); | ||
| 30 | } | ||
| 31 | |||
| 32 | MACHINE_START(E350, "Toshiba e350") | ||
| 33 | /* Maintainer: Ian Molton (spyro@f2s.com) */ | ||
| 34 | .phys_io = 0x40000000, | ||
| 35 | .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, | ||
| 36 | .boot_params = 0xa0000100, | ||
| 37 | .map_io = pxa_map_io, | ||
| 38 | .init_irq = pxa25x_init_irq, | ||
| 39 | .fixup = eseries_fixup, | ||
| 40 | .init_machine = e350_init, | ||
| 41 | .timer = &pxa_timer, | ||
| 42 | MACHINE_END | ||
| 43 | |||
diff --git a/arch/arm/mach-pxa/e400.c b/arch/arm/mach-pxa/e400.c new file mode 100644 index 000000000000..544bbaa20621 --- /dev/null +++ b/arch/arm/mach-pxa/e400.c | |||
| @@ -0,0 +1,94 @@ | |||
| 1 | /* | ||
| 2 | * Hardware definitions for the Toshiba eseries PDAs | ||
| 3 | * | ||
| 4 | * Copyright (c) 2003 Ian Molton <spyro@f2s.com> | ||
| 5 | * | ||
| 6 | * This file is licensed under | ||
| 7 | * the terms of the GNU General Public License version 2. This program | ||
| 8 | * is licensed "as is" without any warranty of any kind, whether express | ||
| 9 | * or implied. | ||
| 10 | * | ||
| 11 | */ | ||
| 12 | |||
| 13 | #include <linux/kernel.h> | ||
| 14 | #include <linux/init.h> | ||
| 15 | |||
| 16 | #include <asm/setup.h> | ||
| 17 | #include <asm/mach/arch.h> | ||
| 18 | #include <asm/mach-types.h> | ||
| 19 | |||
| 20 | #include <mach/pxa-regs.h> | ||
| 21 | #include <mach/mfp-pxa25x.h> | ||
| 22 | #include <mach/hardware.h> | ||
| 23 | |||
| 24 | #include <mach/pxafb.h> | ||
| 25 | #include <mach/udc.h> | ||
| 26 | |||
| 27 | #include "generic.h" | ||
| 28 | #include "eseries.h" | ||
| 29 | |||
| 30 | /* ------------------------ E400 LCD definitions ------------------------ */ | ||
| 31 | |||
| 32 | static struct pxafb_mode_info e400_pxafb_mode_info = { | ||
| 33 | .pixclock = 140703, | ||
| 34 | .xres = 240, | ||
| 35 | .yres = 320, | ||
| 36 | .bpp = 16, | ||
| 37 | .hsync_len = 4, | ||
| 38 | .left_margin = 28, | ||
| 39 | .right_margin = 8, | ||
| 40 | .vsync_len = 3, | ||
| 41 | .upper_margin = 5, | ||
| 42 | .lower_margin = 6, | ||
| 43 | .sync = 0, | ||
| 44 | }; | ||
| 45 | |||
| 46 | static struct pxafb_mach_info e400_pxafb_mach_info = { | ||
| 47 | .modes = &e400_pxafb_mode_info, | ||
| 48 | .num_modes = 1, | ||
| 49 | .lccr0 = LCCR0_Color | LCCR0_Sngl | LCCR0_Act, | ||
| 50 | .lccr3 = 0, | ||
| 51 | .pxafb_backlight_power = NULL, | ||
| 52 | }; | ||
| 53 | |||
| 54 | /* ------------------------ E400 MFP config ----------------------------- */ | ||
| 55 | |||
| 56 | static unsigned long e400_pin_config[] __initdata = { | ||
| 57 | /* Chip selects */ | ||
| 58 | GPIO15_nCS_1, /* CS1 - Flash */ | ||
| 59 | GPIO80_nCS_4, /* CS4 - TMIO */ | ||
| 60 | |||
| 61 | /* Clocks */ | ||
| 62 | GPIO12_32KHz, | ||
| 63 | |||
| 64 | /* BTUART */ | ||
| 65 | GPIO42_BTUART_RXD, | ||
| 66 | GPIO43_BTUART_TXD, | ||
| 67 | GPIO44_BTUART_CTS, | ||
| 68 | GPIO45_GPIO, /* Used by TMIO for #SUSPEND */ | ||
| 69 | |||
| 70 | /* wakeup */ | ||
| 71 | GPIO0_GPIO | WAKEUP_ON_EDGE_RISE, | ||
| 72 | }; | ||
| 73 | |||
| 74 | /* ---------------------------------------------------------------------- */ | ||
| 75 | |||
| 76 | static void __init e400_init(void) | ||
| 77 | { | ||
| 78 | pxa2xx_mfp_config(ARRAY_AND_SIZE(e400_pin_config)); | ||
| 79 | set_pxa_fb_info(&e400_pxafb_mach_info); | ||
| 80 | pxa_set_udc_info(&e7xx_udc_mach_info); | ||
| 81 | } | ||
| 82 | |||
| 83 | MACHINE_START(E400, "Toshiba e400") | ||
| 84 | /* Maintainer: Ian Molton (spyro@f2s.com) */ | ||
| 85 | .phys_io = 0x40000000, | ||
| 86 | .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, | ||
| 87 | .boot_params = 0xa0000100, | ||
| 88 | .map_io = pxa_map_io, | ||
| 89 | .init_irq = pxa25x_init_irq, | ||
| 90 | .fixup = eseries_fixup, | ||
| 91 | .init_machine = e400_init, | ||
| 92 | .timer = &pxa_timer, | ||
| 93 | MACHINE_END | ||
| 94 | |||
diff --git a/arch/arm/mach-pxa/e400_lcd.c b/arch/arm/mach-pxa/e400_lcd.c deleted file mode 100644 index 263884165f57..000000000000 --- a/arch/arm/mach-pxa/e400_lcd.c +++ /dev/null | |||
| @@ -1,56 +0,0 @@ | |||
| 1 | /* | ||
| 2 | * e400_lcd.c | ||
| 3 | * | ||
| 4 | * (c) 2005 Ian Molton <spyro@f2s.com> | ||
| 5 | * | ||
| 6 | * This program is free software; you can redistribute it and/or modify | ||
| 7 | * it under the terms of the GNU General Public License version 2 as | ||
| 8 | * published by the Free Software Foundation. | ||
| 9 | * | ||
| 10 | */ | ||
| 11 | |||
| 12 | #include <linux/kernel.h> | ||
| 13 | #include <linux/init.h> | ||
| 14 | #include <linux/module.h> | ||
| 15 | |||
| 16 | #include <asm/mach-types.h> | ||
| 17 | #include <mach/pxa-regs.h> | ||
| 18 | #include <mach/pxafb.h> | ||
| 19 | |||
| 20 | static struct pxafb_mode_info e400_pxafb_mode_info = { | ||
| 21 | .pixclock = 140703, | ||
| 22 | .xres = 240, | ||
| 23 | .yres = 320, | ||
| 24 | .bpp = 16, | ||
| 25 | .hsync_len = 4, | ||
| 26 | .left_margin = 28, | ||
| 27 | .right_margin = 8, | ||
| 28 | .vsync_len = 3, | ||
| 29 | .upper_margin = 5, | ||
| 30 | .lower_margin = 6, | ||
| 31 | .sync = 0, | ||
| 32 | }; | ||
| 33 | |||
| 34 | static struct pxafb_mach_info e400_pxafb_mach_info = { | ||
| 35 | .modes = &e400_pxafb_mode_info, | ||
| 36 | .num_modes = 1, | ||
| 37 | .lccr0 = LCCR0_Color | LCCR0_Sngl | LCCR0_Act, | ||
| 38 | .lccr3 = 0, | ||
| 39 | .pxafb_backlight_power = NULL, | ||
| 40 | }; | ||
| 41 | |||
| 42 | static int __init e400_lcd_init(void) | ||
| 43 | { | ||
| 44 | if (!machine_is_e400()) | ||
| 45 | return -ENODEV; | ||
| 46 | |||
| 47 | set_pxa_fb_info(&e400_pxafb_mach_info); | ||
| 48 | return 0; | ||
| 49 | } | ||
| 50 | |||
| 51 | module_init(e400_lcd_init); | ||
| 52 | |||
| 53 | MODULE_AUTHOR("Ian Molton <spyro@f2s.com>"); | ||
| 54 | MODULE_DESCRIPTION("e400 lcd driver"); | ||
| 55 | MODULE_LICENSE("GPLv2"); | ||
| 56 | |||
diff --git a/arch/arm/mach-pxa/e740.c b/arch/arm/mach-pxa/e740.c new file mode 100644 index 000000000000..c57a15b37f0d --- /dev/null +++ b/arch/arm/mach-pxa/e740.c | |||
| @@ -0,0 +1,169 @@ | |||
| 1 | /* | ||
| 2 | * Hardware definitions for the Toshiba eseries PDAs | ||
| 3 | * | ||
| 4 | * Copyright (c) 2003 Ian Molton <spyro@f2s.com> | ||
| 5 | * | ||
| 6 | * This file is licensed under | ||
| 7 | * the terms of the GNU General Public License version 2. This program | ||
| 8 | * is licensed "as is" without any warranty of any kind, whether express | ||
| 9 | * or implied. | ||
| 10 | * | ||
| 11 | */ | ||
| 12 | |||
| 13 | #include <linux/kernel.h> | ||
| 14 | #include <linux/init.h> | ||
| 15 | #include <linux/device.h> | ||
| 16 | #include <linux/platform_device.h> | ||
| 17 | #include <linux/fb.h> | ||
| 18 | |||
| 19 | #include <video/w100fb.h> | ||
| 20 | |||
| 21 | #include <asm/setup.h> | ||
| 22 | #include <asm/mach/arch.h> | ||
| 23 | #include <asm/mach-types.h> | ||
| 24 | |||
| 25 | #include <mach/mfp-pxa25x.h> | ||
| 26 | #include <mach/hardware.h> | ||
| 27 | #include <mach/udc.h> | ||
| 28 | |||
| 29 | #include "generic.h" | ||
| 30 | #include "eseries.h" | ||
| 31 | |||
| 32 | |||
| 33 | /* ------------------------ e740 video support --------------------------- */ | ||
| 34 | |||
| 35 | static struct w100_gen_regs e740_lcd_regs = { | ||
| 36 | .lcd_format = 0x00008023, | ||
| 37 | .lcdd_cntl1 = 0x0f000000, | ||
| 38 | .lcdd_cntl2 = 0x0003ffff, | ||
| 39 | .genlcd_cntl1 = 0x00ffff03, | ||
| 40 | .genlcd_cntl2 = 0x003c0f03, | ||
| 41 | .genlcd_cntl3 = 0x000143aa, | ||
| 42 | }; | ||
| 43 | |||
| 44 | static struct w100_mode e740_lcd_mode = { | ||
| 45 | .xres = 240, | ||
| 46 | .yres = 320, | ||
| 47 | .left_margin = 20, | ||
| 48 | .right_margin = 28, | ||
| 49 | .upper_margin = 9, | ||
| 50 | .lower_margin = 8, | ||
| 51 | .crtc_ss = 0x80140013, | ||
| 52 | .crtc_ls = 0x81150110, | ||
| 53 | .crtc_gs = 0x80050005, | ||
| 54 | .crtc_vpos_gs = 0x000a0009, | ||
| 55 | .crtc_rev = 0x0040010a, | ||
| 56 | .crtc_dclk = 0xa906000a, | ||
| 57 | .crtc_gclk = 0x80050108, | ||
| 58 | .crtc_goe = 0x80050108, | ||
| 59 | .pll_freq = 57, | ||
| 60 | .pixclk_divider = 4, | ||
| 61 | .pixclk_divider_rotated = 4, | ||
| 62 | .pixclk_src = CLK_SRC_XTAL, | ||
| 63 | .sysclk_divider = 1, | ||
| 64 | .sysclk_src = CLK_SRC_PLL, | ||
| 65 | .crtc_ps1_active = 0x41060010, | ||
| 66 | }; | ||
| 67 | |||
| 68 | static struct w100_gpio_regs e740_w100_gpio_info = { | ||
| 69 | .init_data1 = 0x21002103, | ||
| 70 | .gpio_dir1 = 0xffffdeff, | ||
| 71 | .gpio_oe1 = 0x03c00643, | ||
| 72 | .init_data2 = 0x003f003f, | ||
| 73 | .gpio_dir2 = 0xffffffff, | ||
| 74 | .gpio_oe2 = 0x000000ff, | ||
| 75 | }; | ||
| 76 | |||
| 77 | static struct w100fb_mach_info e740_fb_info = { | ||
| 78 | .modelist = &e740_lcd_mode, | ||
| 79 | .num_modes = 1, | ||
| 80 | .regs = &e740_lcd_regs, | ||
| 81 | .gpio = &e740_w100_gpio_info, | ||
| 82 | .xtal_freq = 14318000, | ||
| 83 | .xtal_dbl = 1, | ||
| 84 | }; | ||
| 85 | |||
| 86 | static struct resource e740_fb_resources[] = { | ||
| 87 | [0] = { | ||
| 88 | .start = 0x0c000000, | ||
| 89 | .end = 0x0cffffff, | ||
| 90 | .flags = IORESOURCE_MEM, | ||
| 91 | }, | ||
| 92 | }; | ||
| 93 | |||
| 94 | static struct platform_device e740_fb_device = { | ||
| 95 | .name = "w100fb", | ||
| 96 | .id = -1, | ||
| 97 | .dev = { | ||
| 98 | .platform_data = &e740_fb_info, | ||
| 99 | }, | ||
| 100 | .num_resources = ARRAY_SIZE(e740_fb_resources), | ||
| 101 | .resource = e740_fb_resources, | ||
| 102 | }; | ||
| 103 | |||
| 104 | /* --------------------------- MFP Pin config -------------------------- */ | ||
| 105 | |||
| 106 | static unsigned long e740_pin_config[] __initdata = { | ||
| 107 | /* Chip selects */ | ||
| 108 | GPIO15_nCS_1, /* CS1 - Flash */ | ||
| 109 | GPIO79_nCS_3, /* CS3 - IMAGEON */ | ||
| 110 | GPIO80_nCS_4, /* CS4 - TMIO */ | ||
| 111 | |||
| 112 | /* Clocks */ | ||
| 113 | GPIO12_32KHz, | ||
| 114 | |||
| 115 | /* BTUART */ | ||
| 116 | GPIO42_BTUART_RXD, | ||
| 117 | GPIO43_BTUART_TXD, | ||
| 118 | GPIO44_BTUART_CTS, | ||
| 119 | GPIO45_GPIO, /* Used by TMIO for #SUSPEND */ | ||
| 120 | |||
| 121 | /* PC Card */ | ||
| 122 | GPIO8_GPIO, /* CD0 */ | ||
| 123 | GPIO44_GPIO, /* CD1 */ | ||
| 124 | GPIO11_GPIO, /* IRQ0 */ | ||
| 125 | GPIO6_GPIO, /* IRQ1 */ | ||
| 126 | GPIO27_GPIO, /* RST0 */ | ||
| 127 | GPIO24_GPIO, /* RST1 */ | ||
| 128 | GPIO20_GPIO, /* PWR0 */ | ||
| 129 | GPIO23_GPIO, /* PWR1 */ | ||
| 130 | GPIO48_nPOE, | ||
| 131 | GPIO49_nPWE, | ||
| 132 | GPIO50_nPIOR, | ||
| 133 | GPIO51_nPIOW, | ||
| 134 | GPIO52_nPCE_1, | ||
| 135 | GPIO53_nPCE_2, | ||
| 136 | GPIO54_nPSKTSEL, | ||
| 137 | GPIO55_nPREG, | ||
| 138 | GPIO56_nPWAIT, | ||
| 139 | GPIO57_nIOIS16, | ||
| 140 | |||
| 141 | /* wakeup */ | ||
| 142 | GPIO0_GPIO | WAKEUP_ON_EDGE_RISE, | ||
| 143 | }; | ||
| 144 | |||
| 145 | /* ----------------------------------------------------------------------- */ | ||
| 146 | |||
| 147 | static struct platform_device *devices[] __initdata = { | ||
| 148 | &e740_fb_device, | ||
| 149 | }; | ||
| 150 | |||
| 151 | static void __init e740_init(void) | ||
| 152 | { | ||
| 153 | pxa2xx_mfp_config(ARRAY_AND_SIZE(e740_pin_config)); | ||
| 154 | platform_add_devices(devices, ARRAY_SIZE(devices)); | ||
| 155 | pxa_set_udc_info(&e7xx_udc_mach_info); | ||
| 156 | } | ||
| 157 | |||
| 158 | MACHINE_START(E740, "Toshiba e740") | ||
| 159 | /* Maintainer: Ian Molton (spyro@f2s.com) */ | ||
| 160 | .phys_io = 0x40000000, | ||
| 161 | .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, | ||
| 162 | .boot_params = 0xa0000100, | ||
| 163 | .map_io = pxa_map_io, | ||
| 164 | .init_irq = pxa25x_init_irq, | ||
| 165 | .fixup = eseries_fixup, | ||
| 166 | .init_machine = e740_init, | ||
| 167 | .timer = &pxa_timer, | ||
| 168 | MACHINE_END | ||
| 169 | |||
diff --git a/arch/arm/mach-pxa/e740_lcd.c b/arch/arm/mach-pxa/e740_lcd.c deleted file mode 100644 index 26bd599af178..000000000000 --- a/arch/arm/mach-pxa/e740_lcd.c +++ /dev/null | |||
| @@ -1,123 +0,0 @@ | |||
| 1 | /* e740_lcd.c | ||
| 2 | * | ||
| 3 | * This file contains the definitions for the LCD timings and functions | ||
| 4 | * to control the LCD power / frontlighting via the w100fb driver. | ||
| 5 | * | ||
| 6 | * (c) 2005 Ian Molton <spyro@f2s.com> | ||
| 7 | * | ||
| 8 | * This program is free software; you can redistribute it and/or modify | ||
| 9 | * it under the terms of the GNU General Public License version 2 as | ||
| 10 | * published by the Free Software Foundation. | ||
| 11 | * | ||
| 12 | */ | ||
| 13 | |||
| 14 | #include <linux/module.h> | ||
| 15 | #include <linux/device.h> | ||
| 16 | #include <linux/fb.h> | ||
| 17 | #include <linux/err.h> | ||
| 18 | #include <linux/platform_device.h> | ||
| 19 | |||
| 20 | #include <asm/mach-types.h> | ||
| 21 | |||
| 22 | #include <video/w100fb.h> | ||
| 23 | |||
| 24 | /* | ||
| 25 | **potential** shutdown routine - to be investigated | ||
| 26 | devmem2 0x0c010528 w 0xff3fff00 | ||
| 27 | devmem2 0x0c010190 w 0x7FFF8000 | ||
| 28 | devmem2 0x0c0101b0 w 0x00FF0000 | ||
| 29 | devmem2 0x0c01008c w 0x00000000 | ||
| 30 | devmem2 0x0c010080 w 0x000000bf | ||
| 31 | devmem2 0x0c010098 w 0x00000015 | ||
| 32 | devmem2 0x0c010088 w 0x4b000204 | ||
| 33 | devmem2 0x0c010098 w 0x0000001d | ||
| 34 | */ | ||
| 35 | |||
| 36 | static struct w100_gen_regs e740_lcd_regs = { | ||
| 37 | .lcd_format = 0x00008023, | ||
| 38 | .lcdd_cntl1 = 0x0f000000, | ||
| 39 | .lcdd_cntl2 = 0x0003ffff, | ||
| 40 | .genlcd_cntl1 = 0x00ffff03, | ||
| 41 | .genlcd_cntl2 = 0x003c0f03, | ||
| 42 | .genlcd_cntl3 = 0x000143aa, | ||
| 43 | }; | ||
| 44 | |||
| 45 | static struct w100_mode e740_lcd_mode = { | ||
| 46 | .xres = 240, | ||
| 47 | .yres = 320, | ||
| 48 | .left_margin = 20, | ||
| 49 | .right_margin = 28, | ||
| 50 | .upper_margin = 9, | ||
| 51 | .lower_margin = 8, | ||
| 52 | .crtc_ss = 0x80140013, | ||
| 53 | .crtc_ls = 0x81150110, | ||
| 54 | .crtc_gs = 0x80050005, | ||
| 55 | .crtc_vpos_gs = 0x000a0009, | ||
| 56 | .crtc_rev = 0x0040010a, | ||
| 57 | .crtc_dclk = 0xa906000a, | ||
| 58 | .crtc_gclk = 0x80050108, | ||
| 59 | .crtc_goe = 0x80050108, | ||
| 60 | .pll_freq = 57, | ||
| 61 | .pixclk_divider = 4, | ||
| 62 | .pixclk_divider_rotated = 4, | ||
| 63 | .pixclk_src = CLK_SRC_XTAL, | ||
| 64 | .sysclk_divider = 1, | ||
| 65 | .sysclk_src = CLK_SRC_PLL, | ||
| 66 | .crtc_ps1_active = 0x41060010, | ||
| 67 | }; | ||
| 68 | |||
| 69 | |||
| 70 | static struct w100_gpio_regs e740_w100_gpio_info = { | ||
| 71 | .init_data1 = 0x21002103, | ||
| 72 | .gpio_dir1 = 0xffffdeff, | ||
| 73 | .gpio_oe1 = 0x03c00643, | ||
| 74 | .init_data2 = 0x003f003f, | ||
| 75 | .gpio_dir2 = 0xffffffff, | ||
| 76 | .gpio_oe2 = 0x000000ff, | ||
| 77 | }; | ||
| 78 | |||
| 79 | static struct w100fb_mach_info e740_fb_info = { | ||
| 80 | .modelist = &e740_lcd_mode, | ||
| 81 | .num_modes = 1, | ||
| 82 | .regs = &e740_lcd_regs, | ||
| 83 | .gpio = &e740_w100_gpio_info, | ||
| 84 | .xtal_freq = 14318000, | ||
| 85 | .xtal_dbl = 1, | ||
| 86 | }; | ||
| 87 | |||
| 88 | static struct resource e740_fb_resources[] = { | ||
| 89 | [0] = { | ||
| 90 | .start = 0x0c000000, | ||
| 91 | .end = 0x0cffffff, | ||
| 92 | .flags = IORESOURCE_MEM, | ||
| 93 | }, | ||
| 94 | }; | ||
| 95 | |||
| 96 | /* ----------------------- device declarations -------------------------- */ | ||
| 97 | |||
| 98 | |||
| 99 | static struct platform_device e740_fb_device = { | ||
| 100 | .name = "w100fb", | ||
| 101 | .id = -1, | ||
| 102 | .dev = { | ||
| 103 | .platform_data = &e740_fb_info, | ||
| 104 | }, | ||
| 105 | .num_resources = ARRAY_SIZE(e740_fb_resources), | ||
| 106 | .resource = e740_fb_resources, | ||
| 107 | }; | ||
| 108 | |||
| 109 | static int e740_lcd_init(void) | ||
| 110 | { | ||
| 111 | int ret; | ||
| 112 | |||
| 113 | if (!machine_is_e740()) | ||
| 114 | return -ENODEV; | ||
| 115 | |||
| 116 | return platform_device_register(&e740_fb_device); | ||
| 117 | } | ||
| 118 | |||
| 119 | module_init(e740_lcd_init); | ||
| 120 | |||
| 121 | MODULE_AUTHOR("Ian Molton <spyro@f2s.com>"); | ||
| 122 | MODULE_DESCRIPTION("e740 lcd driver"); | ||
| 123 | MODULE_LICENSE("GPLv2"); | ||
diff --git a/arch/arm/mach-pxa/e750_lcd.c b/arch/arm/mach-pxa/e750.c index 75edc3b5390f..640e738b85df 100644 --- a/arch/arm/mach-pxa/e750_lcd.c +++ b/arch/arm/mach-pxa/e750.c | |||
| @@ -1,25 +1,35 @@ | |||
| 1 | /* e750_lcd.c | 1 | /* |
| 2 | * Hardware definitions for the Toshiba eseries PDAs | ||
| 2 | * | 3 | * |
| 3 | * This file contains the definitions for the LCD timings and functions | 4 | * Copyright (c) 2003 Ian Molton <spyro@f2s.com> |
| 4 | * to control the LCD power / frontlighting via the w100fb driver. | ||
| 5 | * | 5 | * |
| 6 | * (c) 2005 Ian Molton <spyro@f2s.com> | 6 | * This file is licensed under |
| 7 | * | 7 | * the terms of the GNU General Public License version 2. This program |
| 8 | * This program is free software; you can redistribute it and/or modify | 8 | * is licensed "as is" without any warranty of any kind, whether express |
| 9 | * it under the terms of the GNU General Public License version 2 as | 9 | * or implied. |
| 10 | * published by the Free Software Foundation. | ||
| 11 | * | 10 | * |
| 12 | */ | 11 | */ |
| 13 | 12 | ||
| 14 | #include <linux/module.h> | 13 | #include <linux/kernel.h> |
| 14 | #include <linux/init.h> | ||
| 15 | #include <linux/device.h> | 15 | #include <linux/device.h> |
| 16 | #include <linux/fb.h> | ||
| 17 | #include <linux/err.h> | ||
| 18 | #include <linux/platform_device.h> | 16 | #include <linux/platform_device.h> |
| 17 | #include <linux/fb.h> | ||
| 18 | |||
| 19 | #include <video/w100fb.h> | ||
| 19 | 20 | ||
| 21 | #include <asm/setup.h> | ||
| 22 | #include <asm/mach/arch.h> | ||
| 20 | #include <asm/mach-types.h> | 23 | #include <asm/mach-types.h> |
| 21 | 24 | ||
| 22 | #include <video/w100fb.h> | 25 | #include <mach/mfp-pxa25x.h> |
| 26 | #include <mach/hardware.h> | ||
| 27 | #include <mach/udc.h> | ||
| 28 | |||
| 29 | #include "generic.h" | ||
| 30 | #include "eseries.h" | ||
| 31 | |||
| 32 | /* ---------------------- E750 LCD definitions -------------------- */ | ||
| 23 | 33 | ||
| 24 | static struct w100_gen_regs e750_lcd_regs = { | 34 | static struct w100_gen_regs e750_lcd_regs = { |
| 25 | .lcd_format = 0x00008003, | 35 | .lcd_format = 0x00008003, |
| @@ -54,7 +64,6 @@ static struct w100_mode e750_lcd_mode = { | |||
| 54 | .sysclk_src = CLK_SRC_PLL, | 64 | .sysclk_src = CLK_SRC_PLL, |
| 55 | }; | 65 | }; |
| 56 | 66 | ||
| 57 | |||
| 58 | static struct w100_gpio_regs e750_w100_gpio_info = { | 67 | static struct w100_gpio_regs e750_w100_gpio_info = { |
| 59 | .init_data1 = 0x01192f1b, | 68 | .init_data1 = 0x01192f1b, |
| 60 | .gpio_dir1 = 0xd5ffdeff, | 69 | .gpio_dir1 = 0xd5ffdeff, |
| @@ -81,9 +90,6 @@ static struct resource e750_fb_resources[] = { | |||
| 81 | }, | 90 | }, |
| 82 | }; | 91 | }; |
| 83 | 92 | ||
| 84 | /* ----------------------- device declarations -------------------------- */ | ||
| 85 | |||
| 86 | |||
| 87 | static struct platform_device e750_fb_device = { | 93 | static struct platform_device e750_fb_device = { |
| 88 | .name = "w100fb", | 94 | .name = "w100fb", |
| 89 | .id = -1, | 95 | .id = -1, |
| @@ -94,16 +100,27 @@ static struct platform_device e750_fb_device = { | |||
| 94 | .resource = e750_fb_resources, | 100 | .resource = e750_fb_resources, |
| 95 | }; | 101 | }; |
| 96 | 102 | ||
| 97 | static int e750_lcd_init(void) | 103 | /* ----------------------------------------------------------------------- */ |
| 98 | { | ||
| 99 | if (!machine_is_e750()) | ||
| 100 | return -ENODEV; | ||
| 101 | 104 | ||
| 102 | return platform_device_register(&e750_fb_device); | 105 | static struct platform_device *devices[] __initdata = { |
| 106 | &e750_fb_device, | ||
| 107 | }; | ||
| 108 | |||
| 109 | static void __init e750_init(void) | ||
| 110 | { | ||
| 111 | platform_add_devices(devices, ARRAY_SIZE(devices)); | ||
| 112 | pxa_set_udc_info(&e7xx_udc_mach_info); | ||
| 103 | } | 113 | } |
| 104 | 114 | ||
| 105 | module_init(e750_lcd_init); | 115 | MACHINE_START(E750, "Toshiba e750") |
| 116 | /* Maintainer: Ian Molton (spyro@f2s.com) */ | ||
| 117 | .phys_io = 0x40000000, | ||
| 118 | .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, | ||
| 119 | .boot_params = 0xa0000100, | ||
| 120 | .map_io = pxa_map_io, | ||
| 121 | .init_irq = pxa25x_init_irq, | ||
| 122 | .fixup = eseries_fixup, | ||
| 123 | .init_machine = e750_init, | ||
| 124 | .timer = &pxa_timer, | ||
| 125 | MACHINE_END | ||
| 106 | 126 | ||
| 107 | MODULE_AUTHOR("Ian Molton <spyro@f2s.com>"); | ||
| 108 | MODULE_DESCRIPTION("e750 lcd driver"); | ||
| 109 | MODULE_LICENSE("GPLv2"); | ||
diff --git a/arch/arm/mach-pxa/e800_lcd.c b/arch/arm/mach-pxa/e800.c index e6aeab0ebc22..a293e09bfe25 100644 --- a/arch/arm/mach-pxa/e800_lcd.c +++ b/arch/arm/mach-pxa/e800.c | |||
| @@ -1,25 +1,36 @@ | |||
| 1 | /* e800_lcd.c | 1 | /* |
| 2 | * Hardware definitions for the Toshiba eseries PDAs | ||
| 2 | * | 3 | * |
| 3 | * This file contains the definitions for the LCD timings and functions | 4 | * Copyright (c) 2003 Ian Molton <spyro@f2s.com> |
| 4 | * to control the LCD power / frontlighting via the w100fb driver. | ||
| 5 | * | 5 | * |
| 6 | * (c) 2005 Ian Molton <spyro@f2s.com> | 6 | * This file is licensed under |
| 7 | * | 7 | * the terms of the GNU General Public License version 2. This program |
| 8 | * This program is free software; you can redistribute it and/or modify | 8 | * is licensed "as is" without any warranty of any kind, whether express |
| 9 | * it under the terms of the GNU General Public License version 2 as | 9 | * or implied. |
| 10 | * published by the Free Software Foundation. | ||
| 11 | * | 10 | * |
| 12 | */ | 11 | */ |
| 13 | 12 | ||
| 14 | #include <linux/module.h> | 13 | #include <linux/kernel.h> |
| 14 | #include <linux/init.h> | ||
| 15 | #include <linux/device.h> | 15 | #include <linux/device.h> |
| 16 | #include <linux/fb.h> | ||
| 17 | #include <linux/err.h> | ||
| 18 | #include <linux/platform_device.h> | 16 | #include <linux/platform_device.h> |
| 17 | #include <linux/fb.h> | ||
| 18 | |||
| 19 | #include <video/w100fb.h> | ||
| 19 | 20 | ||
| 21 | #include <asm/setup.h> | ||
| 22 | #include <asm/mach/arch.h> | ||
| 20 | #include <asm/mach-types.h> | 23 | #include <asm/mach-types.h> |
| 21 | 24 | ||
| 22 | #include <video/w100fb.h> | 25 | #include <mach/mfp-pxa25x.h> |
| 26 | #include <mach/hardware.h> | ||
| 27 | #include <mach/eseries-gpio.h> | ||
| 28 | #include <mach/udc.h> | ||
| 29 | |||
| 30 | #include "generic.h" | ||
| 31 | #include "eseries.h" | ||
| 32 | |||
| 33 | /* ------------------------ e800 LCD definitions ------------------------- */ | ||
| 23 | 34 | ||
| 24 | static struct w100_gen_regs e800_lcd_regs = { | 35 | static struct w100_gen_regs e800_lcd_regs = { |
| 25 | .lcd_format = 0x00008003, | 36 | .lcd_format = 0x00008003, |
| @@ -71,8 +82,8 @@ static struct w100_mode e800_lcd_mode[2] = { | |||
| 71 | .crtc_goe = 0x80cc0015, | 82 | .crtc_goe = 0x80cc0015, |
| 72 | .crtc_ps1_active = 0x00000000, | 83 | .crtc_ps1_active = 0x00000000, |
| 73 | .pll_freq = 100, | 84 | .pll_freq = 100, |
| 74 | .pixclk_divider = 6, /* Wince uses 14 which gives a 7MHz pclk. */ | 85 | .pixclk_divider = 6, /* Wince uses 14 which gives a */ |
| 75 | .pixclk_divider_rotated = 6, /* we want a 14MHz one (much nicer to look at) */ | 86 | .pixclk_divider_rotated = 6, /* 7MHz Pclk. We use a 14MHz one */ |
| 76 | .pixclk_src = CLK_SRC_PLL, | 87 | .pixclk_src = CLK_SRC_PLL, |
| 77 | .sysclk_divider = 0, | 88 | .sysclk_divider = 0, |
| 78 | .sysclk_src = CLK_SRC_PLL, | 89 | .sysclk_src = CLK_SRC_PLL, |
| @@ -131,9 +142,6 @@ static struct resource e800_fb_resources[] = { | |||
| 131 | }, | 142 | }, |
| 132 | }; | 143 | }; |
| 133 | 144 | ||
| 134 | /* ----------------------- device declarations -------------------------- */ | ||
| 135 | |||
| 136 | |||
| 137 | static struct platform_device e800_fb_device = { | 145 | static struct platform_device e800_fb_device = { |
| 138 | .name = "w100fb", | 146 | .name = "w100fb", |
| 139 | .id = -1, | 147 | .id = -1, |
| @@ -144,16 +152,35 @@ static struct platform_device e800_fb_device = { | |||
| 144 | .resource = e800_fb_resources, | 152 | .resource = e800_fb_resources, |
| 145 | }; | 153 | }; |
| 146 | 154 | ||
| 147 | static int e800_lcd_init(void) | 155 | /* --------------------------- UDC definitions --------------------------- */ |
| 148 | { | 156 | |
| 149 | if (!machine_is_e800()) | 157 | static struct pxa2xx_udc_mach_info e800_udc_mach_info = { |
| 150 | return -ENODEV; | 158 | .gpio_vbus = GPIO_E800_USB_DISC, |
| 159 | .gpio_pullup = GPIO_E800_USB_PULLUP, | ||
| 160 | .gpio_pullup_inverted = 1 | ||
| 161 | }; | ||
| 151 | 162 | ||
| 152 | return platform_device_register(&e800_fb_device); | 163 | /* ----------------------------------------------------------------------- */ |
| 164 | |||
| 165 | static struct platform_device *devices[] __initdata = { | ||
| 166 | &e800_fb_device, | ||
| 167 | }; | ||
| 168 | |||
| 169 | static void __init e800_init(void) | ||
| 170 | { | ||
| 171 | platform_add_devices(devices, ARRAY_SIZE(devices)); | ||
| 172 | pxa_set_udc_info(&e800_udc_mach_info); | ||
| 153 | } | 173 | } |
| 154 | 174 | ||
| 155 | module_init(e800_lcd_init); | 175 | MACHINE_START(E800, "Toshiba e800") |
| 176 | /* Maintainer: Ian Molton (spyro@f2s.com) */ | ||
| 177 | .phys_io = 0x40000000, | ||
| 178 | .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, | ||
| 179 | .boot_params = 0xa0000100, | ||
| 180 | .map_io = pxa_map_io, | ||
| 181 | .init_irq = pxa25x_init_irq, | ||
| 182 | .fixup = eseries_fixup, | ||
| 183 | .init_machine = e800_init, | ||
| 184 | .timer = &pxa_timer, | ||
| 185 | MACHINE_END | ||
| 156 | 186 | ||
| 157 | MODULE_AUTHOR("Ian Molton <spyro@f2s.com>"); | ||
| 158 | MODULE_DESCRIPTION("e800 lcd driver"); | ||
| 159 | MODULE_LICENSE("GPLv2"); | ||
diff --git a/arch/arm/mach-pxa/em-x270.c b/arch/arm/mach-pxa/em-x270.c index 7a0a681a5847..f5ed8038ede5 100644 --- a/arch/arm/mach-pxa/em-x270.c +++ b/arch/arm/mach-pxa/em-x270.c | |||
| @@ -373,10 +373,6 @@ static inline void em_x270_init_nand(void) {} | |||
| 373 | #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) | 373 | #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) |
| 374 | static int em_x270_ohci_init(struct device *dev) | 374 | static int em_x270_ohci_init(struct device *dev) |
| 375 | { | 375 | { |
| 376 | /* Set the Power Control Polarity Low */ | ||
| 377 | UHCHR = (UHCHR | UHCHR_PCPL) & | ||
| 378 | ~(UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSE); | ||
| 379 | |||
| 380 | /* enable port 2 transiever */ | 376 | /* enable port 2 transiever */ |
| 381 | UP2OCR = UP2OCR_HXS | UP2OCR_HXOE; | 377 | UP2OCR = UP2OCR_HXS | UP2OCR_HXOE; |
| 382 | 378 | ||
| @@ -385,6 +381,7 @@ static int em_x270_ohci_init(struct device *dev) | |||
| 385 | 381 | ||
| 386 | static struct pxaohci_platform_data em_x270_ohci_platform_data = { | 382 | static struct pxaohci_platform_data em_x270_ohci_platform_data = { |
| 387 | .port_mode = PMM_PERPORT_MODE, | 383 | .port_mode = PMM_PERPORT_MODE, |
| 384 | .flags = ENABLE_PORT1 | ENABLE_PORT2 | POWER_CONTROL_LOW, | ||
| 388 | .init = em_x270_ohci_init, | 385 | .init = em_x270_ohci_init, |
| 389 | }; | 386 | }; |
| 390 | 387 | ||
diff --git a/arch/arm/mach-pxa/eseries.c b/arch/arm/mach-pxa/eseries.c index 001a252bd514..d28849b50a14 100644 --- a/arch/arm/mach-pxa/eseries.c +++ b/arch/arm/mach-pxa/eseries.c | |||
| @@ -19,68 +19,13 @@ | |||
| 19 | 19 | ||
| 20 | #include <mach/mfp-pxa25x.h> | 20 | #include <mach/mfp-pxa25x.h> |
| 21 | #include <mach/hardware.h> | 21 | #include <mach/hardware.h> |
| 22 | #include <mach/eseries-gpio.h> | ||
| 23 | #include <mach/udc.h> | ||
| 22 | 24 | ||
| 23 | #include "generic.h" | 25 | #include "generic.h" |
| 24 | 26 | ||
| 25 | static unsigned long e740_pin_config[] __initdata = { | ||
| 26 | /* Chip selects */ | ||
| 27 | GPIO15_nCS_1, /* CS1 - Flash */ | ||
| 28 | GPIO79_nCS_3, /* CS3 - IMAGEON */ | ||
| 29 | GPIO80_nCS_4, /* CS4 - TMIO */ | ||
| 30 | |||
| 31 | /* Clocks */ | ||
| 32 | GPIO12_32KHz, | ||
| 33 | |||
| 34 | /* BTUART */ | ||
| 35 | GPIO42_BTUART_RXD, | ||
| 36 | GPIO43_BTUART_TXD, | ||
| 37 | GPIO44_BTUART_CTS, | ||
| 38 | GPIO45_GPIO, /* Used by TMIO for #SUSPEND */ | ||
| 39 | |||
| 40 | /* PC Card */ | ||
| 41 | GPIO8_GPIO, /* CD0 */ | ||
| 42 | GPIO44_GPIO, /* CD1 */ | ||
| 43 | GPIO11_GPIO, /* IRQ0 */ | ||
| 44 | GPIO6_GPIO, /* IRQ1 */ | ||
| 45 | GPIO27_GPIO, /* RST0 */ | ||
| 46 | GPIO24_GPIO, /* RST1 */ | ||
| 47 | GPIO20_GPIO, /* PWR0 */ | ||
| 48 | GPIO23_GPIO, /* PWR1 */ | ||
| 49 | GPIO48_nPOE, | ||
| 50 | GPIO49_nPWE, | ||
| 51 | GPIO50_nPIOR, | ||
| 52 | GPIO51_nPIOW, | ||
| 53 | GPIO52_nPCE_1, | ||
| 54 | GPIO53_nPCE_2, | ||
| 55 | GPIO54_nPSKTSEL, | ||
| 56 | GPIO55_nPREG, | ||
| 57 | GPIO56_nPWAIT, | ||
| 58 | GPIO57_nIOIS16, | ||
| 59 | |||
| 60 | /* wakeup */ | ||
| 61 | GPIO0_GPIO | WAKEUP_ON_EDGE_RISE, | ||
| 62 | }; | ||
| 63 | |||
| 64 | static unsigned long e400_pin_config[] __initdata = { | ||
| 65 | /* Chip selects */ | ||
| 66 | GPIO15_nCS_1, /* CS1 - Flash */ | ||
| 67 | GPIO80_nCS_4, /* CS4 - TMIO */ | ||
| 68 | |||
| 69 | /* Clocks */ | ||
| 70 | GPIO12_32KHz, | ||
| 71 | |||
| 72 | /* BTUART */ | ||
| 73 | GPIO42_BTUART_RXD, | ||
| 74 | GPIO43_BTUART_TXD, | ||
| 75 | GPIO44_BTUART_CTS, | ||
| 76 | GPIO45_GPIO, /* Used by TMIO for #SUSPEND */ | ||
| 77 | |||
| 78 | /* wakeup */ | ||
| 79 | GPIO0_GPIO | WAKEUP_ON_EDGE_RISE, | ||
| 80 | }; | ||
| 81 | |||
| 82 | /* Only e800 has 128MB RAM */ | 27 | /* Only e800 has 128MB RAM */ |
| 83 | static void __init eseries_fixup(struct machine_desc *desc, | 28 | void __init eseries_fixup(struct machine_desc *desc, |
| 84 | struct tag *tags, char **cmdline, struct meminfo *mi) | 29 | struct tag *tags, char **cmdline, struct meminfo *mi) |
| 85 | { | 30 | { |
| 86 | mi->nr_banks=1; | 31 | mi->nr_banks=1; |
| @@ -92,95 +37,9 @@ static void __init eseries_fixup(struct machine_desc *desc, | |||
| 92 | mi->bank[0].size = (64*1024*1024); | 37 | mi->bank[0].size = (64*1024*1024); |
| 93 | } | 38 | } |
| 94 | 39 | ||
| 95 | static void __init e740_init(void) | 40 | struct pxa2xx_udc_mach_info e7xx_udc_mach_info = { |
| 96 | { | 41 | .gpio_vbus = GPIO_E7XX_USB_DISC, |
| 97 | pxa2xx_mfp_config(ARRAY_AND_SIZE(e740_pin_config)); | 42 | .gpio_pullup = GPIO_E7XX_USB_PULLUP, |
| 98 | } | 43 | .gpio_pullup_inverted = 1 |
| 99 | 44 | }; | |
| 100 | static void __init e400_init(void) | ||
| 101 | { | ||
| 102 | pxa2xx_mfp_config(ARRAY_AND_SIZE(e400_pin_config)); | ||
| 103 | } | ||
| 104 | |||
| 105 | /* e-series machine definitions */ | ||
| 106 | |||
| 107 | #ifdef CONFIG_MACH_E330 | ||
| 108 | MACHINE_START(E330, "Toshiba e330") | ||
| 109 | /* Maintainer: Ian Molton (spyro@f2s.com) */ | ||
| 110 | .phys_io = 0x40000000, | ||
| 111 | .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, | ||
| 112 | .boot_params = 0xa0000100, | ||
| 113 | .map_io = pxa_map_io, | ||
| 114 | .init_irq = pxa25x_init_irq, | ||
| 115 | .fixup = eseries_fixup, | ||
| 116 | .timer = &pxa_timer, | ||
| 117 | MACHINE_END | ||
| 118 | #endif | ||
| 119 | |||
| 120 | #ifdef CONFIG_MACH_E350 | ||
| 121 | MACHINE_START(E350, "Toshiba e350") | ||
| 122 | /* Maintainer: Ian Molton (spyro@f2s.com) */ | ||
| 123 | .phys_io = 0x40000000, | ||
| 124 | .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, | ||
| 125 | .boot_params = 0xa0000100, | ||
| 126 | .map_io = pxa_map_io, | ||
| 127 | .init_irq = pxa25x_init_irq, | ||
| 128 | .fixup = eseries_fixup, | ||
| 129 | .timer = &pxa_timer, | ||
| 130 | MACHINE_END | ||
| 131 | #endif | ||
| 132 | |||
| 133 | #ifdef CONFIG_MACH_E740 | ||
| 134 | MACHINE_START(E740, "Toshiba e740") | ||
| 135 | /* Maintainer: Ian Molton (spyro@f2s.com) */ | ||
| 136 | .phys_io = 0x40000000, | ||
| 137 | .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, | ||
| 138 | .boot_params = 0xa0000100, | ||
| 139 | .map_io = pxa_map_io, | ||
| 140 | .init_irq = pxa25x_init_irq, | ||
| 141 | .fixup = eseries_fixup, | ||
| 142 | .init_machine = e740_init, | ||
| 143 | .timer = &pxa_timer, | ||
| 144 | MACHINE_END | ||
| 145 | #endif | ||
| 146 | |||
| 147 | #ifdef CONFIG_MACH_E750 | ||
| 148 | MACHINE_START(E750, "Toshiba e750") | ||
| 149 | /* Maintainer: Ian Molton (spyro@f2s.com) */ | ||
| 150 | .phys_io = 0x40000000, | ||
| 151 | .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, | ||
| 152 | .boot_params = 0xa0000100, | ||
| 153 | .map_io = pxa_map_io, | ||
| 154 | .init_irq = pxa25x_init_irq, | ||
| 155 | .fixup = eseries_fixup, | ||
| 156 | .timer = &pxa_timer, | ||
| 157 | MACHINE_END | ||
| 158 | #endif | ||
| 159 | |||
| 160 | #ifdef CONFIG_MACH_E400 | ||
| 161 | MACHINE_START(E400, "Toshiba e400") | ||
| 162 | /* Maintainer: Ian Molton (spyro@f2s.com) */ | ||
| 163 | .phys_io = 0x40000000, | ||
| 164 | .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, | ||
| 165 | .boot_params = 0xa0000100, | ||
| 166 | .map_io = pxa_map_io, | ||
| 167 | .init_irq = pxa25x_init_irq, | ||
| 168 | .fixup = eseries_fixup, | ||
| 169 | .init_machine = e400_init, | ||
| 170 | .timer = &pxa_timer, | ||
| 171 | MACHINE_END | ||
| 172 | #endif | ||
| 173 | |||
| 174 | #ifdef CONFIG_MACH_E800 | ||
| 175 | MACHINE_START(E800, "Toshiba e800") | ||
| 176 | /* Maintainer: Ian Molton (spyro@f2s.com) */ | ||
| 177 | .phys_io = 0x40000000, | ||
| 178 | .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, | ||
| 179 | .boot_params = 0xa0000100, | ||
| 180 | .map_io = pxa_map_io, | ||
| 181 | .init_irq = pxa25x_init_irq, | ||
| 182 | .fixup = eseries_fixup, | ||
| 183 | .timer = &pxa_timer, | ||
| 184 | MACHINE_END | ||
| 185 | #endif | ||
| 186 | 45 | ||
diff --git a/arch/arm/mach-pxa/eseries.h b/arch/arm/mach-pxa/eseries.h new file mode 100644 index 000000000000..a83f88d4b6ad --- /dev/null +++ b/arch/arm/mach-pxa/eseries.h | |||
| @@ -0,0 +1,4 @@ | |||
| 1 | void __init eseries_fixup(struct machine_desc *desc, | ||
| 2 | struct tag *tags, char **cmdline, struct meminfo *mi); | ||
| 3 | |||
| 4 | extern struct pxa2xx_udc_mach_info e7xx_udc_mach_info; | ||
diff --git a/arch/arm/mach-pxa/eseries_udc.c b/arch/arm/mach-pxa/eseries_udc.c deleted file mode 100644 index d622c04c0d44..000000000000 --- a/arch/arm/mach-pxa/eseries_udc.c +++ /dev/null | |||
| @@ -1,57 +0,0 @@ | |||
| 1 | /* | ||
| 2 | * UDC functions for the Toshiba e-series PDAs | ||
| 3 | * | ||
| 4 | * Copyright (c) Ian Molton 2003 | ||
| 5 | * | ||
| 6 | * This file is licensed under | ||
| 7 | * the terms of the GNU General Public License version 2. This program | ||
| 8 | * is licensed "as is" without any warranty of any kind, whether express | ||
| 9 | * or implied. | ||
| 10 | * | ||
| 11 | */ | ||
| 12 | |||
| 13 | #include <linux/kernel.h> | ||
| 14 | #include <linux/init.h> | ||
| 15 | #include <linux/device.h> | ||
| 16 | |||
| 17 | #include <mach/udc.h> | ||
| 18 | #include <mach/eseries-gpio.h> | ||
| 19 | #include <mach/hardware.h> | ||
| 20 | #include <mach/pxa-regs.h> | ||
| 21 | #include <asm/mach/arch.h> | ||
| 22 | #include <asm/mach-types.h> | ||
| 23 | #include <asm/mach/map.h> | ||
| 24 | #include <asm/domain.h> | ||
| 25 | |||
| 26 | /* local PXA generic code */ | ||
| 27 | #include "generic.h" | ||
| 28 | |||
| 29 | static struct pxa2xx_udc_mach_info e7xx_udc_mach_info = { | ||
| 30 | .gpio_vbus = GPIO_E7XX_USB_DISC, | ||
| 31 | .gpio_pullup = GPIO_E7XX_USB_PULLUP, | ||
| 32 | .gpio_pullup_inverted = 1 | ||
| 33 | }; | ||
| 34 | |||
| 35 | static struct pxa2xx_udc_mach_info e800_udc_mach_info = { | ||
| 36 | .gpio_vbus = GPIO_E800_USB_DISC, | ||
| 37 | .gpio_pullup = GPIO_E800_USB_PULLUP, | ||
| 38 | .gpio_pullup_inverted = 1 | ||
| 39 | }; | ||
| 40 | |||
| 41 | static int __init eseries_udc_init(void) | ||
| 42 | { | ||
| 43 | if (machine_is_e330() || machine_is_e350() || | ||
| 44 | machine_is_e740() || machine_is_e750() || | ||
| 45 | machine_is_e400()) | ||
| 46 | pxa_set_udc_info(&e7xx_udc_mach_info); | ||
| 47 | else if (machine_is_e800()) | ||
| 48 | pxa_set_udc_info(&e800_udc_mach_info); | ||
| 49 | |||
| 50 | return 0; | ||
| 51 | } | ||
| 52 | |||
| 53 | module_init(eseries_udc_init); | ||
| 54 | |||
| 55 | MODULE_AUTHOR("Ian Molton <spyro@f2s.com>"); | ||
| 56 | MODULE_DESCRIPTION("eseries UDC support"); | ||
| 57 | MODULE_LICENSE("GPLv2"); | ||
diff --git a/arch/arm/mach-pxa/generic.c b/arch/arm/mach-pxa/generic.c index ceaed0076366..85ed0b33331f 100644 --- a/arch/arm/mach-pxa/generic.c +++ b/arch/arm/mach-pxa/generic.c | |||
| @@ -46,7 +46,7 @@ void clear_reset_status(unsigned int mask) | |||
| 46 | */ | 46 | */ |
| 47 | unsigned int get_clk_frequency_khz(int info) | 47 | unsigned int get_clk_frequency_khz(int info) |
| 48 | { | 48 | { |
| 49 | if (cpu_is_pxa21x() || cpu_is_pxa25x()) | 49 | if (cpu_is_pxa25x()) |
| 50 | return pxa25x_get_clk_frequency_khz(info); | 50 | return pxa25x_get_clk_frequency_khz(info); |
| 51 | else if (cpu_is_pxa27x()) | 51 | else if (cpu_is_pxa27x()) |
| 52 | return pxa27x_get_clk_frequency_khz(info); | 52 | return pxa27x_get_clk_frequency_khz(info); |
| @@ -60,7 +60,7 @@ EXPORT_SYMBOL(get_clk_frequency_khz); | |||
| 60 | */ | 60 | */ |
| 61 | unsigned int get_memclk_frequency_10khz(void) | 61 | unsigned int get_memclk_frequency_10khz(void) |
| 62 | { | 62 | { |
| 63 | if (cpu_is_pxa21x() || cpu_is_pxa25x()) | 63 | if (cpu_is_pxa25x()) |
| 64 | return pxa25x_get_memclk_frequency_10khz(); | 64 | return pxa25x_get_memclk_frequency_10khz(); |
| 65 | else if (cpu_is_pxa27x()) | 65 | else if (cpu_is_pxa27x()) |
| 66 | return pxa27x_get_memclk_frequency_10khz(); | 66 | return pxa27x_get_memclk_frequency_10khz(); |
| @@ -88,11 +88,6 @@ static struct map_desc standard_io_desc[] __initdata = { | |||
| 88 | .pfn = __phys_to_pfn(0x48000000), | 88 | .pfn = __phys_to_pfn(0x48000000), |
| 89 | .length = 0x00200000, | 89 | .length = 0x00200000, |
| 90 | .type = MT_DEVICE | 90 | .type = MT_DEVICE |
| 91 | }, { /* USB host */ | ||
| 92 | .virtual = 0xf8000000, | ||
| 93 | .pfn = __phys_to_pfn(0x4c000000), | ||
| 94 | .length = 0x00100000, | ||
| 95 | .type = MT_DEVICE | ||
| 96 | }, { /* Camera */ | 91 | }, { /* Camera */ |
| 97 | .virtual = 0xfa000000, | 92 | .virtual = 0xfa000000, |
| 98 | .pfn = __phys_to_pfn(0x50000000), | 93 | .pfn = __phys_to_pfn(0x50000000), |
diff --git a/arch/arm/mach-pxa/generic.h b/arch/arm/mach-pxa/generic.h index 041c048320e4..dc876a8e6668 100644 --- a/arch/arm/mach-pxa/generic.h +++ b/arch/arm/mach-pxa/generic.h | |||
| @@ -65,4 +65,5 @@ static inline void pxa3xx_clear_reset_status(unsigned int mask) {} | |||
| 65 | 65 | ||
| 66 | extern struct sysdev_class pxa_irq_sysclass; | 66 | extern struct sysdev_class pxa_irq_sysclass; |
| 67 | extern struct sysdev_class pxa_gpio_sysclass; | 67 | extern struct sysdev_class pxa_gpio_sysclass; |
| 68 | extern struct sysdev_class pxa2xx_mfp_sysclass; | ||
| 68 | extern struct sysdev_class pxa3xx_mfp_sysclass; | 69 | extern struct sysdev_class pxa3xx_mfp_sysclass; |
diff --git a/arch/arm/mach-pxa/gpio.c b/arch/arm/mach-pxa/gpio.c index 418d4dfd44ab..14930cf8be7b 100644 --- a/arch/arm/mach-pxa/gpio.c +++ b/arch/arm/mach-pxa/gpio.c | |||
| @@ -275,7 +275,7 @@ static void pxa_gpio_demux_handler(unsigned int irq, struct irq_desc *desc) | |||
| 275 | loop = 1; | 275 | loop = 1; |
| 276 | 276 | ||
| 277 | n = PXA_GPIO_IRQ_BASE + bit; | 277 | n = PXA_GPIO_IRQ_BASE + bit; |
| 278 | desc_handle_irq(n, irq_desc + n); | 278 | generic_handle_irq(n); |
| 279 | 279 | ||
| 280 | bit = find_next_bit(gedr, GEDR_BITS, bit + 1); | 280 | bit = find_next_bit(gedr, GEDR_BITS, bit + 1); |
| 281 | } | 281 | } |
diff --git a/arch/arm/mach-pxa/gumstix.c b/arch/arm/mach-pxa/gumstix.c index c0092472fa58..d8962a0fb98d 100644 --- a/arch/arm/mach-pxa/gumstix.c +++ b/arch/arm/mach-pxa/gumstix.c | |||
| @@ -20,8 +20,12 @@ | |||
| 20 | #include <linux/init.h> | 20 | #include <linux/init.h> |
| 21 | #include <linux/platform_device.h> | 21 | #include <linux/platform_device.h> |
| 22 | #include <linux/interrupt.h> | 22 | #include <linux/interrupt.h> |
| 23 | #include <linux/delay.h> | ||
| 23 | #include <linux/mtd/mtd.h> | 24 | #include <linux/mtd/mtd.h> |
| 24 | #include <linux/mtd/partitions.h> | 25 | #include <linux/mtd/partitions.h> |
| 26 | #include <linux/gpio.h> | ||
| 27 | #include <linux/err.h> | ||
| 28 | #include <linux/clk.h> | ||
| 25 | 29 | ||
| 26 | #include <asm/setup.h> | 30 | #include <asm/setup.h> |
| 27 | #include <asm/memory.h> | 31 | #include <asm/memory.h> |
| @@ -40,7 +44,7 @@ | |||
| 40 | 44 | ||
| 41 | #include <mach/pxa-regs.h> | 45 | #include <mach/pxa-regs.h> |
| 42 | #include <mach/pxa2xx-regs.h> | 46 | #include <mach/pxa2xx-regs.h> |
| 43 | #include <mach/pxa2xx-gpio.h> | 47 | #include <mach/mfp-pxa25x.h> |
| 44 | 48 | ||
| 45 | #include "generic.h" | 49 | #include "generic.h" |
| 46 | 50 | ||
| @@ -85,21 +89,8 @@ static struct platform_device *devices[] __initdata = { | |||
| 85 | }; | 89 | }; |
| 86 | 90 | ||
| 87 | #ifdef CONFIG_MMC_PXA | 91 | #ifdef CONFIG_MMC_PXA |
| 88 | static struct pxamci_platform_data gumstix_mci_platform_data; | ||
| 89 | |||
| 90 | static int gumstix_mci_init(struct device *dev, irq_handler_t detect_int, | ||
| 91 | void *data) | ||
| 92 | { | ||
| 93 | pxa_gpio_mode(GPIO6_MMCCLK_MD); | ||
| 94 | pxa_gpio_mode(GPIO53_MMCCLK_MD); | ||
| 95 | pxa_gpio_mode(GPIO8_MMCCS0_MD); | ||
| 96 | |||
| 97 | return 0; | ||
| 98 | } | ||
| 99 | |||
| 100 | static struct pxamci_platform_data gumstix_mci_platform_data = { | 92 | static struct pxamci_platform_data gumstix_mci_platform_data = { |
| 101 | .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, | 93 | .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, |
| 102 | .init = gumstix_mci_init, | ||
| 103 | }; | 94 | }; |
| 104 | 95 | ||
| 105 | static void __init gumstix_mmc_init(void) | 96 | static void __init gumstix_mmc_init(void) |
| @@ -109,11 +100,11 @@ static void __init gumstix_mmc_init(void) | |||
| 109 | #else | 100 | #else |
| 110 | static void __init gumstix_mmc_init(void) | 101 | static void __init gumstix_mmc_init(void) |
| 111 | { | 102 | { |
| 112 | printk(KERN_INFO "Gumstix mmc disabled\n"); | 103 | pr_debug("Gumstix mmc disabled\n"); |
| 113 | } | 104 | } |
| 114 | #endif | 105 | #endif |
| 115 | 106 | ||
| 116 | #ifdef CONFIG_USB_GADGET_PXA2XX | 107 | #ifdef CONFIG_USB_GADGET_PXA25X |
| 117 | static struct pxa2xx_udc_mach_info gumstix_udc_info __initdata = { | 108 | static struct pxa2xx_udc_mach_info gumstix_udc_info __initdata = { |
| 118 | .gpio_vbus = GPIO_GUMSTIX_USB_GPIOn, | 109 | .gpio_vbus = GPIO_GUMSTIX_USB_GPIOn, |
| 119 | .gpio_pullup = GPIO_GUMSTIX_USB_GPIOx, | 110 | .gpio_pullup = GPIO_GUMSTIX_USB_GPIOx, |
| @@ -126,12 +117,87 @@ static void __init gumstix_udc_init(void) | |||
| 126 | #else | 117 | #else |
| 127 | static void gumstix_udc_init(void) | 118 | static void gumstix_udc_init(void) |
| 128 | { | 119 | { |
| 129 | printk(KERN_INFO "Gumstix udc is disabled\n"); | 120 | pr_debug("Gumstix udc is disabled\n"); |
| 130 | } | 121 | } |
| 131 | #endif | 122 | #endif |
| 132 | 123 | ||
| 124 | #ifdef CONFIG_BT | ||
| 125 | /* Normally, the bootloader would have enabled this 32kHz clock but many | ||
| 126 | ** boards still have u-boot 1.1.4 so we check if it has been turned on and | ||
| 127 | ** if not, we turn it on with a warning message. */ | ||
| 128 | static void gumstix_setup_bt_clock(void) | ||
| 129 | { | ||
| 130 | int timeout = 500; | ||
| 131 | |||
| 132 | if (!(OSCC & OSCC_OOK)) | ||
| 133 | pr_warning("32kHz clock was not on. Bootloader may need to " | ||
| 134 | "be updated\n"); | ||
| 135 | else | ||
| 136 | return; | ||
| 137 | |||
| 138 | OSCC |= OSCC_OON; | ||
| 139 | do { | ||
| 140 | if (OSCC & OSCC_OOK) | ||
| 141 | break; | ||
| 142 | udelay(1); | ||
| 143 | } while (--timeout); | ||
| 144 | if (!timeout) | ||
| 145 | pr_err("Failed to start 32kHz clock\n"); | ||
| 146 | } | ||
| 147 | |||
| 148 | static void __init gumstix_bluetooth_init(void) | ||
| 149 | { | ||
| 150 | int err; | ||
| 151 | |||
| 152 | gumstix_setup_bt_clock(); | ||
| 153 | |||
| 154 | err = gpio_request(GPIO_GUMSTIX_BTRESET, "BTRST"); | ||
| 155 | if (err) { | ||
| 156 | pr_err("gumstix: failed request gpio for bluetooth reset\n"); | ||
| 157 | return; | ||
| 158 | } | ||
| 159 | |||
| 160 | err = gpio_direction_output(GPIO_GUMSTIX_BTRESET, 1); | ||
| 161 | if (err) { | ||
| 162 | pr_err("gumstix: can't reset bluetooth\n"); | ||
| 163 | return; | ||
| 164 | } | ||
| 165 | gpio_set_value(GPIO_GUMSTIX_BTRESET, 0); | ||
| 166 | udelay(100); | ||
| 167 | gpio_set_value(GPIO_GUMSTIX_BTRESET, 1); | ||
| 168 | } | ||
| 169 | #else | ||
| 170 | static void gumstix_bluetooth_init(void) | ||
| 171 | { | ||
| 172 | pr_debug("Gumstix Bluetooth is disabled\n"); | ||
| 173 | } | ||
| 174 | #endif | ||
| 175 | |||
| 176 | static unsigned long gumstix_pin_config[] __initdata = { | ||
| 177 | GPIO12_32KHz, | ||
| 178 | /* BTUART */ | ||
| 179 | GPIO42_HWUART_RXD, | ||
| 180 | GPIO43_HWUART_TXD, | ||
| 181 | GPIO44_HWUART_CTS, | ||
| 182 | GPIO45_HWUART_RTS, | ||
| 183 | /* MMC */ | ||
| 184 | GPIO6_MMC_CLK, | ||
| 185 | GPIO53_MMC_CLK, | ||
| 186 | GPIO8_MMC_CS0, | ||
| 187 | /* these are used by AM200EPD */ | ||
| 188 | GPIO51_GPIO, | ||
| 189 | GPIO49_GPIO, | ||
| 190 | GPIO48_GPIO, | ||
| 191 | GPIO32_GPIO, | ||
| 192 | GPIO17_GPIO, | ||
| 193 | GPIO16_GPIO, | ||
| 194 | }; | ||
| 195 | |||
| 133 | static void __init gumstix_init(void) | 196 | static void __init gumstix_init(void) |
| 134 | { | 197 | { |
| 198 | pxa2xx_mfp_config(ARRAY_AND_SIZE(gumstix_pin_config)); | ||
| 199 | |||
| 200 | gumstix_bluetooth_init(); | ||
| 135 | gumstix_udc_init(); | 201 | gumstix_udc_init(); |
| 136 | gumstix_mmc_init(); | 202 | gumstix_mmc_init(); |
| 137 | (void) platform_add_devices(devices, ARRAY_SIZE(devices)); | 203 | (void) platform_add_devices(devices, ARRAY_SIZE(devices)); |
diff --git a/arch/arm/mach-pxa/idp.c b/arch/arm/mach-pxa/idp.c index 5aa0270d5605..013b15baa034 100644 --- a/arch/arm/mach-pxa/idp.c +++ b/arch/arm/mach-pxa/idp.c | |||
| @@ -32,7 +32,7 @@ | |||
| 32 | #include <asm/mach/map.h> | 32 | #include <asm/mach/map.h> |
| 33 | 33 | ||
| 34 | #include <mach/pxa-regs.h> | 34 | #include <mach/pxa-regs.h> |
| 35 | #include <mach/pxa2xx-gpio.h> | 35 | #include <mach/mfp-pxa25x.h> |
| 36 | #include <mach/idp.h> | 36 | #include <mach/idp.h> |
| 37 | #include <mach/pxafb.h> | 37 | #include <mach/pxafb.h> |
| 38 | #include <mach/bitfield.h> | 38 | #include <mach/bitfield.h> |
| @@ -46,6 +46,47 @@ | |||
| 46 | * - Ethernet interrupt | 46 | * - Ethernet interrupt |
| 47 | */ | 47 | */ |
| 48 | 48 | ||
| 49 | static unsigned long idp_pin_config[] __initdata = { | ||
| 50 | /* LCD */ | ||
| 51 | GPIO58_LCD_LDD_0, | ||
| 52 | GPIO59_LCD_LDD_1, | ||
| 53 | GPIO60_LCD_LDD_2, | ||
| 54 | GPIO61_LCD_LDD_3, | ||
| 55 | GPIO62_LCD_LDD_4, | ||
| 56 | GPIO63_LCD_LDD_5, | ||
| 57 | GPIO64_LCD_LDD_6, | ||
| 58 | GPIO65_LCD_LDD_7, | ||
| 59 | GPIO66_LCD_LDD_8, | ||
| 60 | GPIO67_LCD_LDD_9, | ||
| 61 | GPIO68_LCD_LDD_10, | ||
| 62 | GPIO69_LCD_LDD_11, | ||
| 63 | GPIO70_LCD_LDD_12, | ||
| 64 | GPIO71_LCD_LDD_13, | ||
| 65 | GPIO72_LCD_LDD_14, | ||
| 66 | GPIO73_LCD_LDD_15, | ||
| 67 | GPIO74_LCD_FCLK, | ||
| 68 | GPIO75_LCD_LCLK, | ||
| 69 | GPIO76_LCD_PCLK, | ||
| 70 | |||
| 71 | /* BTUART */ | ||
| 72 | GPIO42_BTUART_RXD, | ||
| 73 | GPIO43_BTUART_TXD, | ||
| 74 | GPIO44_BTUART_CTS, | ||
| 75 | GPIO45_BTUART_RTS, | ||
| 76 | |||
| 77 | /* STUART */ | ||
| 78 | GPIO46_STUART_RXD, | ||
| 79 | GPIO47_STUART_TXD, | ||
| 80 | |||
| 81 | /* MMC */ | ||
| 82 | GPIO6_MMC_CLK, | ||
| 83 | GPIO8_MMC_CS0, | ||
| 84 | |||
| 85 | /* Ethernet */ | ||
| 86 | GPIO33_nCS_5, /* Ethernet CS */ | ||
| 87 | GPIO4_GPIO, /* Ethernet IRQ */ | ||
| 88 | }; | ||
| 89 | |||
| 49 | static struct resource smc91x_resources[] = { | 90 | static struct resource smc91x_resources[] = { |
| 50 | [0] = { | 91 | [0] = { |
| 51 | .start = (IDP_ETH_PHYS + 0x300), | 92 | .start = (IDP_ETH_PHYS + 0x300), |
| @@ -121,44 +162,28 @@ static struct pxafb_mach_info sharp_lm8v31 = { | |||
| 121 | .num_modes = 1, | 162 | .num_modes = 1, |
| 122 | .cmap_inverse = 0, | 163 | .cmap_inverse = 0, |
| 123 | .cmap_static = 0, | 164 | .cmap_static = 0, |
| 124 | .lccr0 = LCCR0_SDS, | 165 | .lcd_conn = LCD_COLOR_DSTN_16BPP | LCD_PCLK_EDGE_FALL | |
| 125 | .lccr3 = LCCR3_PCP | LCCR3_Acb(255), | 166 | LCD_AC_BIAS_FREQ(255), |
| 126 | .pxafb_backlight_power = &idp_backlight_power, | 167 | .pxafb_backlight_power = &idp_backlight_power, |
| 127 | .pxafb_lcd_power = &idp_lcd_power | 168 | .pxafb_lcd_power = &idp_lcd_power |
| 128 | }; | 169 | }; |
| 129 | 170 | ||
| 130 | static int idp_mci_init(struct device *dev, irq_handler_t idp_detect_int, void *data) | ||
| 131 | { | ||
| 132 | /* setup GPIO for PXA25x MMC controller */ | ||
| 133 | pxa_gpio_mode(GPIO6_MMCCLK_MD); | ||
| 134 | pxa_gpio_mode(GPIO8_MMCCS0_MD); | ||
| 135 | |||
| 136 | return 0; | ||
| 137 | } | ||
| 138 | |||
| 139 | static struct pxamci_platform_data idp_mci_platform_data = { | 171 | static struct pxamci_platform_data idp_mci_platform_data = { |
| 140 | .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, | 172 | .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, |
| 141 | .init = idp_mci_init, | ||
| 142 | }; | 173 | }; |
| 143 | 174 | ||
| 144 | static void __init idp_init(void) | 175 | static void __init idp_init(void) |
| 145 | { | 176 | { |
| 146 | printk("idp_init()\n"); | 177 | printk("idp_init()\n"); |
| 147 | 178 | ||
| 179 | pxa2xx_mfp_config(ARRAY_AND_SIZE(idp_pin_config)); | ||
| 180 | |||
| 148 | platform_device_register(&smc91x_device); | 181 | platform_device_register(&smc91x_device); |
| 149 | //platform_device_register(&mst_audio_device); | 182 | //platform_device_register(&mst_audio_device); |
| 150 | set_pxa_fb_info(&sharp_lm8v31); | 183 | set_pxa_fb_info(&sharp_lm8v31); |
| 151 | pxa_set_mci_info(&idp_mci_platform_data); | 184 | pxa_set_mci_info(&idp_mci_platform_data); |
| 152 | } | 185 | } |
| 153 | 186 | ||
| 154 | static void __init idp_init_irq(void) | ||
| 155 | { | ||
| 156 | |||
| 157 | pxa25x_init_irq(); | ||
| 158 | |||
| 159 | set_irq_type(TOUCH_PANEL_IRQ, TOUCH_PANEL_IRQ_EDGE); | ||
| 160 | } | ||
| 161 | |||
| 162 | static struct map_desc idp_io_desc[] __initdata = { | 187 | static struct map_desc idp_io_desc[] __initdata = { |
| 163 | { | 188 | { |
| 164 | .virtual = IDP_COREVOLT_VIRT, | 189 | .virtual = IDP_COREVOLT_VIRT, |
| @@ -177,15 +202,6 @@ static void __init idp_map_io(void) | |||
| 177 | { | 202 | { |
| 178 | pxa_map_io(); | 203 | pxa_map_io(); |
| 179 | iotable_init(idp_io_desc, ARRAY_SIZE(idp_io_desc)); | 204 | iotable_init(idp_io_desc, ARRAY_SIZE(idp_io_desc)); |
| 180 | |||
| 181 | // serial ports 2 & 3 | ||
| 182 | pxa_gpio_mode(GPIO42_BTRXD_MD); | ||
| 183 | pxa_gpio_mode(GPIO43_BTTXD_MD); | ||
| 184 | pxa_gpio_mode(GPIO44_BTCTS_MD); | ||
| 185 | pxa_gpio_mode(GPIO45_BTRTS_MD); | ||
| 186 | pxa_gpio_mode(GPIO46_STRXD_MD); | ||
| 187 | pxa_gpio_mode(GPIO47_STTXD_MD); | ||
| 188 | |||
| 189 | } | 205 | } |
| 190 | 206 | ||
| 191 | 207 | ||
| @@ -194,7 +210,7 @@ MACHINE_START(PXA_IDP, "Vibren PXA255 IDP") | |||
| 194 | .phys_io = 0x40000000, | 210 | .phys_io = 0x40000000, |
| 195 | .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, | 211 | .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, |
| 196 | .map_io = idp_map_io, | 212 | .map_io = idp_map_io, |
| 197 | .init_irq = idp_init_irq, | 213 | .init_irq = pxa25x_init_irq, |
| 198 | .timer = &pxa_timer, | 214 | .timer = &pxa_timer, |
| 199 | .init_machine = idp_init, | 215 | .init_machine = idp_init, |
| 200 | MACHINE_END | 216 | MACHINE_END |
diff --git a/arch/arm/mach-pxa/include/mach/akita.h b/arch/arm/mach-pxa/include/mach/akita.h deleted file mode 100644 index 5d8cc1d9cb10..000000000000 --- a/arch/arm/mach-pxa/include/mach/akita.h +++ /dev/null | |||
| @@ -1,32 +0,0 @@ | |||
| 1 | /* | ||
| 2 | * Hardware specific definitions for SL-C1000 (Akita) | ||
| 3 | * | ||
| 4 | * Copyright (c) 2005 Richard Purdie | ||
| 5 | * | ||
| 6 | * This program is free software; you can redistribute it and/or modify | ||
| 7 | * it under the terms of the GNU General Public License version 2 as | ||
| 8 | * published by the Free Software Foundation. | ||
| 9 | * | ||
| 10 | */ | ||
| 11 | |||
| 12 | /* Akita IO Expander GPIOs */ | ||
| 13 | |||
| 14 | #define AKITA_IOEXP_RESERVED_7 (1 << 7) | ||
| 15 | #define AKITA_IOEXP_IR_ON (1 << 6) | ||
| 16 | #define AKITA_IOEXP_AKIN_PULLUP (1 << 5) | ||
| 17 | #define AKITA_IOEXP_BACKLIGHT_CONT (1 << 4) | ||
| 18 | #define AKITA_IOEXP_BACKLIGHT_ON (1 << 3) | ||
| 19 | #define AKITA_IOEXP_MIC_BIAS (1 << 2) | ||
| 20 | #define AKITA_IOEXP_RESERVED_1 (1 << 1) | ||
| 21 | #define AKITA_IOEXP_RESERVED_0 (1 << 0) | ||
| 22 | |||
| 23 | /* Direction Bitfield 0=output 1=input */ | ||
| 24 | #define AKITA_IOEXP_IO_DIR 0 | ||
| 25 | /* Default Values */ | ||
| 26 | #define AKITA_IOEXP_IO_OUT (AKITA_IOEXP_IR_ON | AKITA_IOEXP_AKIN_PULLUP) | ||
| 27 | |||
| 28 | extern struct platform_device akitaioexp_device; | ||
| 29 | |||
| 30 | void akita_set_ioexp(struct device *dev, unsigned char bitmask); | ||
| 31 | void akita_reset_ioexp(struct device *dev, unsigned char bitmask); | ||
| 32 | |||
diff --git a/arch/arm/mach-pxa/include/mach/corgi.h b/arch/arm/mach-pxa/include/mach/corgi.h index bf856503baf6..585970ef08ce 100644 --- a/arch/arm/mach-pxa/include/mach/corgi.h +++ b/arch/arm/mach-pxa/include/mach/corgi.h | |||
| @@ -98,12 +98,21 @@ | |||
| 98 | CORGI_SCP_MIC_BIAS ) | 98 | CORGI_SCP_MIC_BIAS ) |
| 99 | #define CORGI_SCOOP_IO_OUT ( CORGI_SCP_MUTE_L | CORGI_SCP_MUTE_R ) | 99 | #define CORGI_SCOOP_IO_OUT ( CORGI_SCP_MUTE_L | CORGI_SCP_MUTE_R ) |
| 100 | 100 | ||
| 101 | #define CORGI_SCOOP_GPIO_BASE (NR_BUILTIN_GPIO) | ||
| 102 | #define CORGI_GPIO_LED_GREEN (CORGI_SCOOP_GPIO_BASE + 0) | ||
| 103 | #define CORGI_GPIO_SWA (CORGI_SCOOP_GPIO_BASE + 1) /* Hinge Switch A */ | ||
| 104 | #define CORGI_GPIO_SWB (CORGI_SCOOP_GPIO_BASE + 2) /* Hinge Switch B */ | ||
| 105 | #define CORGI_GPIO_MUTE_L (CORGI_SCOOP_GPIO_BASE + 3) | ||
| 106 | #define CORGI_GPIO_MUTE_R (CORGI_SCOOP_GPIO_BASE + 4) | ||
| 107 | #define CORGI_GPIO_AKIN_PULLUP (CORGI_SCOOP_GPIO_BASE + 5) | ||
| 108 | #define CORGI_GPIO_APM_ON (CORGI_SCOOP_GPIO_BASE + 6) | ||
| 109 | #define CORGI_GPIO_BACKLIGHT_CONT (CORGI_SCOOP_GPIO_BASE + 7) | ||
| 110 | #define CORGI_GPIO_MIC_BIAS (CORGI_SCOOP_GPIO_BASE + 8) | ||
| 101 | 111 | ||
| 102 | /* | 112 | /* |
| 103 | * Shared data structures | 113 | * Shared data structures |
| 104 | */ | 114 | */ |
| 105 | extern struct platform_device corgiscoop_device; | 115 | extern struct platform_device corgiscoop_device; |
| 106 | extern struct platform_device corgissp_device; | ||
| 107 | 116 | ||
| 108 | #endif /* __ASM_ARCH_CORGI_H */ | 117 | #endif /* __ASM_ARCH_CORGI_H */ |
| 109 | 118 | ||
diff --git a/arch/arm/mach-pxa/include/mach/entry-macro.S b/arch/arm/mach-pxa/include/mach/entry-macro.S index de16c12d5232..f6b4bf3e73d2 100644 --- a/arch/arm/mach-pxa/include/mach/entry-macro.S +++ b/arch/arm/mach-pxa/include/mach/entry-macro.S | |||
| @@ -41,7 +41,7 @@ | |||
| 41 | and \irqstat, \irqstat, \irqnr | 41 | and \irqstat, \irqstat, \irqnr |
| 42 | clz \irqnr, \irqstat | 42 | clz \irqnr, \irqstat |
| 43 | rsb \irqnr, \irqnr, #31 | 43 | rsb \irqnr, \irqnr, #31 |
| 44 | add \irqnr, \irqnr, #32 | 44 | add \irqnr, \irqnr, #(32 + PXA_IRQ(0)) |
| 45 | b 1001f | 45 | b 1001f |
| 46 | 1003: | 46 | 1003: |
| 47 | mrc p6, 0, \irqstat, c0, c0, 0 @ ICIP | 47 | mrc p6, 0, \irqstat, c0, c0, 0 @ ICIP |
| @@ -52,6 +52,6 @@ | |||
| 52 | rsb \irqstat, \irqnr, #0 | 52 | rsb \irqstat, \irqnr, #0 |
| 53 | and \irqstat, \irqstat, \irqnr | 53 | and \irqstat, \irqstat, \irqnr |
| 54 | clz \irqnr, \irqstat | 54 | clz \irqnr, \irqstat |
| 55 | rsb \irqnr, \irqnr, #31 | 55 | rsb \irqnr, \irqnr, #(31 + PXA_IRQ(0)) |
| 56 | 1001: | 56 | 1001: |
| 57 | .endm | 57 | .endm |
diff --git a/arch/arm/mach-pxa/include/mach/hardware.h b/arch/arm/mach-pxa/include/mach/hardware.h index a1a0a2ffd642..a582a6d9b92b 100644 --- a/arch/arm/mach-pxa/include/mach/hardware.h +++ b/arch/arm/mach-pxa/include/mach/hardware.h | |||
| @@ -64,26 +64,72 @@ | |||
| 64 | 64 | ||
| 65 | #include <asm/cputype.h> | 65 | #include <asm/cputype.h> |
| 66 | 66 | ||
| 67 | /* | ||
| 68 | * CPU Stepping CPU_ID JTAG_ID | ||
| 69 | * | ||
| 70 | * PXA210 B0 0x69052922 0x2926C013 | ||
| 71 | * PXA210 B1 0x69052923 0x3926C013 | ||
| 72 | * PXA210 B2 0x69052924 0x4926C013 | ||
| 73 | * PXA210 C0 0x69052D25 0x5926C013 | ||
| 74 | * | ||
| 75 | * PXA250 A0 0x69052100 0x09264013 | ||
| 76 | * PXA250 A1 0x69052101 0x19264013 | ||
| 77 | * PXA250 B0 0x69052902 0x29264013 | ||
| 78 | * PXA250 B1 0x69052903 0x39264013 | ||
| 79 | * PXA250 B2 0x69052904 0x49264013 | ||
| 80 | * PXA250 C0 0x69052D05 0x59264013 | ||
| 81 | * | ||
| 82 | * PXA255 A0 0x69052D06 0x69264013 | ||
| 83 | * | ||
| 84 | * PXA26x A0 0x69052903 0x39264013 | ||
| 85 | * PXA26x B0 0x69052D05 0x59264013 | ||
| 86 | * | ||
| 87 | * PXA27x A0 0x69054110 0x09265013 | ||
| 88 | * PXA27x A1 0x69054111 0x19265013 | ||
| 89 | * PXA27x B0 0x69054112 0x29265013 | ||
| 90 | * PXA27x B1 0x69054113 0x39265013 | ||
| 91 | * PXA27x C0 0x69054114 0x49265013 | ||
| 92 | * PXA27x C5 0x69054117 0x79265013 | ||
| 93 | * | ||
| 94 | * PXA30x A0 0x69056880 0x0E648013 | ||
| 95 | * PXA30x A1 0x69056881 0x1E648013 | ||
| 96 | * PXA31x A0 0x69056890 0x0E649013 | ||
| 97 | * PXA31x A1 0x69056891 0x1E649013 | ||
| 98 | * PXA31x A2 0x69056892 0x2E649013 | ||
| 99 | * PXA32x B1 0x69056825 0x5E642013 | ||
| 100 | * PXA32x B2 0x69056826 0x6E642013 | ||
| 101 | * | ||
| 102 | * PXA930 B0 0x69056835 0x5E643013 | ||
| 103 | * PXA930 B1 0x69056837 0x7E643013 | ||
| 104 | * PXA930 B2 0x69056838 0x8E643013 | ||
| 105 | */ | ||
| 67 | #ifdef CONFIG_PXA25x | 106 | #ifdef CONFIG_PXA25x |
| 68 | #define __cpu_is_pxa21x(id) \ | 107 | #define __cpu_is_pxa210(id) \ |
| 69 | ({ \ | 108 | ({ \ |
| 70 | unsigned int _id = (id) >> 4 & 0xf3f; \ | 109 | unsigned int _id = (id) & 0xf3f0; \ |
| 71 | _id == 0x212; \ | 110 | _id == 0x2120; \ |
| 72 | }) | 111 | }) |
| 73 | 112 | ||
| 74 | #define __cpu_is_pxa255(id) \ | 113 | #define __cpu_is_pxa250(id) \ |
| 75 | ({ \ | 114 | ({ \ |
| 76 | unsigned int _id = (id) >> 4 & 0xfff; \ | 115 | unsigned int _id = (id) & 0xf3ff; \ |
| 77 | _id == 0x2d0; \ | 116 | _id <= 0x2105; \ |
| 78 | }) | 117 | }) |
| 118 | |||
| 119 | #define __cpu_is_pxa255(id) \ | ||
| 120 | ({ \ | ||
| 121 | unsigned int _id = (id) & 0xffff; \ | ||
| 122 | _id == 0x2d06; \ | ||
| 123 | }) | ||
| 79 | 124 | ||
| 80 | #define __cpu_is_pxa25x(id) \ | 125 | #define __cpu_is_pxa25x(id) \ |
| 81 | ({ \ | 126 | ({ \ |
| 82 | unsigned int _id = (id) >> 4 & 0xfff; \ | 127 | unsigned int _id = (id) & 0xf300; \ |
| 83 | _id == 0x2d0 || _id == 0x290; \ | 128 | _id == 0x2100; \ |
| 84 | }) | 129 | }) |
| 85 | #else | 130 | #else |
| 86 | #define __cpu_is_pxa21x(id) (0) | 131 | #define __cpu_is_pxa210(id) (0) |
| 132 | #define __cpu_is_pxa250(id) (0) | ||
| 87 | #define __cpu_is_pxa255(id) (0) | 133 | #define __cpu_is_pxa255(id) (0) |
| 88 | #define __cpu_is_pxa25x(id) (0) | 134 | #define __cpu_is_pxa25x(id) (0) |
| 89 | #endif | 135 | #endif |
| @@ -138,9 +184,14 @@ | |||
| 138 | #define __cpu_is_pxa930(id) (0) | 184 | #define __cpu_is_pxa930(id) (0) |
| 139 | #endif | 185 | #endif |
| 140 | 186 | ||
| 141 | #define cpu_is_pxa21x() \ | 187 | #define cpu_is_pxa210() \ |
| 142 | ({ \ | 188 | ({ \ |
| 143 | __cpu_is_pxa21x(read_cpuid_id()); \ | 189 | __cpu_is_pxa210(read_cpuid_id()); \ |
| 190 | }) | ||
| 191 | |||
| 192 | #define cpu_is_pxa250() \ | ||
| 193 | ({ \ | ||
| 194 | __cpu_is_pxa250(read_cpuid_id()); \ | ||
| 144 | }) | 195 | }) |
| 145 | 196 | ||
| 146 | #define cpu_is_pxa255() \ | 197 | #define cpu_is_pxa255() \ |
| @@ -153,6 +204,8 @@ | |||
| 153 | __cpu_is_pxa25x(read_cpuid_id()); \ | 204 | __cpu_is_pxa25x(read_cpuid_id()); \ |
| 154 | }) | 205 | }) |
| 155 | 206 | ||
| 207 | extern int cpu_is_pxa26x(void); | ||
| 208 | |||
| 156 | #define cpu_is_pxa27x() \ | 209 | #define cpu_is_pxa27x() \ |
| 157 | ({ \ | 210 | ({ \ |
| 158 | __cpu_is_pxa27x(read_cpuid_id()); \ | 211 | __cpu_is_pxa27x(read_cpuid_id()); \ |
diff --git a/arch/arm/mach-pxa/include/mach/i2c.h b/arch/arm/mach-pxa/include/mach/i2c.h index 80596b013443..1a9f65e6ec0f 100644 --- a/arch/arm/mach-pxa/include/mach/i2c.h +++ b/arch/arm/mach-pxa/include/mach/i2c.h | |||
| @@ -65,13 +65,18 @@ struct i2c_pxa_platform_data { | |||
| 65 | unsigned int slave_addr; | 65 | unsigned int slave_addr; |
| 66 | struct i2c_slave_client *slave; | 66 | struct i2c_slave_client *slave; |
| 67 | unsigned int class; | 67 | unsigned int class; |
| 68 | int use_pio; | 68 | unsigned int use_pio :1; |
| 69 | unsigned int fast_mode :1; | ||
| 69 | }; | 70 | }; |
| 70 | 71 | ||
| 71 | extern void pxa_set_i2c_info(struct i2c_pxa_platform_data *info); | 72 | extern void pxa_set_i2c_info(struct i2c_pxa_platform_data *info); |
| 72 | 73 | ||
| 73 | #ifdef CONFIG_PXA27x | 74 | #ifdef CONFIG_PXA27x |
| 74 | extern void pxa_set_i2c_power_info(struct i2c_pxa_platform_data *info); | 75 | extern void pxa27x_set_i2c_power_info(struct i2c_pxa_platform_data *info); |
| 76 | #endif | ||
| 77 | |||
| 78 | #ifdef CONFIG_PXA3xx | ||
| 79 | extern void pxa3xx_set_i2c_power_info(struct i2c_pxa_platform_data *info); | ||
| 75 | #endif | 80 | #endif |
| 76 | 81 | ||
| 77 | #endif | 82 | #endif |
diff --git a/arch/arm/mach-pxa/include/mach/irqs.h b/arch/arm/mach-pxa/include/mach/irqs.h index 108b5db9b2af..9c163e19ada9 100644 --- a/arch/arm/mach-pxa/include/mach/irqs.h +++ b/arch/arm/mach-pxa/include/mach/irqs.h | |||
| @@ -11,7 +11,14 @@ | |||
| 11 | */ | 11 | */ |
| 12 | 12 | ||
| 13 | 13 | ||
| 14 | #define PXA_IRQ(x) (x) | 14 | #ifdef CONFIG_PXA_HAVE_ISA_IRQS |
| 15 | #define PXA_ISA_IRQ(x) (x) | ||
| 16 | #define PXA_ISA_IRQ_NUM (16) | ||
| 17 | #else | ||
| 18 | #define PXA_ISA_IRQ_NUM (0) | ||
| 19 | #endif | ||
| 20 | |||
| 21 | #define PXA_IRQ(x) (PXA_ISA_IRQ_NUM + (x)) | ||
| 15 | 22 | ||
| 16 | #if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx) | 23 | #if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx) |
| 17 | #define IRQ_SSP3 PXA_IRQ(0) /* SSP3 service request */ | 24 | #define IRQ_SSP3 PXA_IRQ(0) /* SSP3 service request */ |
| @@ -73,7 +80,7 @@ | |||
| 73 | #define IRQ_MMC3 PXA_IRQ(55) /* MMC3 Controller (PXA310) */ | 80 | #define IRQ_MMC3 PXA_IRQ(55) /* MMC3 Controller (PXA310) */ |
| 74 | #endif | 81 | #endif |
| 75 | 82 | ||
| 76 | #define PXA_GPIO_IRQ_BASE (64) | 83 | #define PXA_GPIO_IRQ_BASE PXA_IRQ(64) |
| 77 | #define PXA_GPIO_IRQ_NUM (128) | 84 | #define PXA_GPIO_IRQ_NUM (128) |
| 78 | 85 | ||
| 79 | #define GPIO_2_x_TO_IRQ(x) (PXA_GPIO_IRQ_BASE + (x)) | 86 | #define GPIO_2_x_TO_IRQ(x) (PXA_GPIO_IRQ_BASE + (x)) |
| @@ -178,13 +185,7 @@ | |||
| 178 | #define NR_IRQS (IRQ_S1_BVD1_STSCHG + 1) | 185 | #define NR_IRQS (IRQ_S1_BVD1_STSCHG + 1) |
| 179 | #elif defined(CONFIG_SHARP_LOCOMO) | 186 | #elif defined(CONFIG_SHARP_LOCOMO) |
| 180 | #define NR_IRQS (IRQ_LOCOMO_SPI_TEND + 1) | 187 | #define NR_IRQS (IRQ_LOCOMO_SPI_TEND + 1) |
| 181 | #elif defined(CONFIG_ARCH_LUBBOCK) || \ | 188 | #elif defined(CONFIG_PXA_HAVE_BOARD_IRQS) |
| 182 | defined(CONFIG_MACH_LOGICPD_PXA270) || \ | ||
| 183 | defined(CONFIG_MACH_TOSA) || \ | ||
| 184 | defined(CONFIG_MACH_MAINSTONE) || \ | ||
| 185 | defined(CONFIG_MACH_PCM027) || \ | ||
| 186 | defined(CONFIG_ARCH_PXA_ESERIES) || \ | ||
| 187 | defined(CONFIG_MACH_MAGICIAN) | ||
| 188 | #define NR_IRQS (IRQ_BOARD_END) | 189 | #define NR_IRQS (IRQ_BOARD_END) |
| 189 | #elif defined(CONFIG_MACH_ZYLONITE) | 190 | #elif defined(CONFIG_MACH_ZYLONITE) |
| 190 | #define NR_IRQS (IRQ_BOARD_START + 32) | 191 | #define NR_IRQS (IRQ_BOARD_START + 32) |
diff --git a/arch/arm/mach-pxa/include/mach/littleton.h b/arch/arm/mach-pxa/include/mach/littleton.h index 79d209b826f4..5c4e320c1437 100644 --- a/arch/arm/mach-pxa/include/mach/littleton.h +++ b/arch/arm/mach-pxa/include/mach/littleton.h | |||
| @@ -3,4 +3,6 @@ | |||
| 3 | 3 | ||
| 4 | #define LITTLETON_ETH_PHYS 0x30000000 | 4 | #define LITTLETON_ETH_PHYS 0x30000000 |
| 5 | 5 | ||
| 6 | #define LITTLETON_GPIO_LCD_CS (17) | ||
| 7 | |||
| 6 | #endif /* __ASM_ARCH_ZYLONITE_H */ | 8 | #endif /* __ASM_ARCH_ZYLONITE_H */ |
diff --git a/arch/arm/mach-pxa/include/mach/memory.h b/arch/arm/mach-pxa/include/mach/memory.h index 552eb7fa6579..59aef89808d6 100644 --- a/arch/arm/mach-pxa/include/mach/memory.h +++ b/arch/arm/mach-pxa/include/mach/memory.h | |||
| @@ -40,11 +40,11 @@ | |||
| 40 | #define NODE_MEM_SIZE_BITS 26 | 40 | #define NODE_MEM_SIZE_BITS 26 |
| 41 | 41 | ||
| 42 | #if !defined(__ASSEMBLY__) && defined(CONFIG_MACH_ARMCORE) && defined(CONFIG_PCI) | 42 | #if !defined(__ASSEMBLY__) && defined(CONFIG_MACH_ARMCORE) && defined(CONFIG_PCI) |
| 43 | void cmx270_pci_adjust_zones(int node, unsigned long *size, | 43 | void cmx2xx_pci_adjust_zones(int node, unsigned long *size, |
| 44 | unsigned long *holes); | 44 | unsigned long *holes); |
| 45 | 45 | ||
| 46 | #define arch_adjust_zones(node, size, holes) \ | 46 | #define arch_adjust_zones(node, size, holes) \ |
| 47 | cmx270_pci_adjust_zones(node, size, holes) | 47 | cmx2xx_pci_adjust_zones(node, size, holes) |
| 48 | 48 | ||
| 49 | #define ISA_DMA_THRESHOLD (PHYS_OFFSET + SZ_64M - 1) | 49 | #define ISA_DMA_THRESHOLD (PHYS_OFFSET + SZ_64M - 1) |
| 50 | #endif | 50 | #endif |
diff --git a/arch/arm/mach-pxa/include/mach/mfp-pxa25x.h b/arch/arm/mach-pxa/include/mach/mfp-pxa25x.h index 6c8e72238bfd..617cab2cc8d0 100644 --- a/arch/arm/mach-pxa/include/mach/mfp-pxa25x.h +++ b/arch/arm/mach-pxa/include/mach/mfp-pxa25x.h | |||
| @@ -17,7 +17,7 @@ | |||
| 17 | 17 | ||
| 18 | /* Crystal and Clock Signals */ | 18 | /* Crystal and Clock Signals */ |
| 19 | #define GPIO10_RTCCLK MFP_CFG_OUT(GPIO10, AF1, DRIVE_LOW) | 19 | #define GPIO10_RTCCLK MFP_CFG_OUT(GPIO10, AF1, DRIVE_LOW) |
| 20 | #define GPIO70_RTC_CLK MFP_CFG_OUT(GPIO70, AF1, DRIVE_LOW) | 20 | #define GPIO70_RTCCLK MFP_CFG_OUT(GPIO70, AF1, DRIVE_LOW) |
| 21 | #define GPIO7_48MHz MFP_CFG_OUT(GPIO7, AF1, DRIVE_LOW) | 21 | #define GPIO7_48MHz MFP_CFG_OUT(GPIO7, AF1, DRIVE_LOW) |
| 22 | #define GPIO11_3_6MHz MFP_CFG_OUT(GPIO11, AF1, DRIVE_LOW) | 22 | #define GPIO11_3_6MHz MFP_CFG_OUT(GPIO11, AF1, DRIVE_LOW) |
| 23 | #define GPIO71_3_6MHz MFP_CFG_OUT(GPIO71, AF1, DRIVE_LOW) | 23 | #define GPIO71_3_6MHz MFP_CFG_OUT(GPIO71, AF1, DRIVE_LOW) |
| @@ -156,6 +156,6 @@ | |||
| 156 | #define GPIO74_LCD_FCLK MFP_CFG_OUT(GPIO74, AF2, DRIVE_LOW) | 156 | #define GPIO74_LCD_FCLK MFP_CFG_OUT(GPIO74, AF2, DRIVE_LOW) |
| 157 | #define GPIO75_LCD_LCLK MFP_CFG_OUT(GPIO75, AF2, DRIVE_LOW) | 157 | #define GPIO75_LCD_LCLK MFP_CFG_OUT(GPIO75, AF2, DRIVE_LOW) |
| 158 | #define GPIO76_LCD_PCLK MFP_CFG_OUT(GPIO76, AF2, DRIVE_LOW) | 158 | #define GPIO76_LCD_PCLK MFP_CFG_OUT(GPIO76, AF2, DRIVE_LOW) |
| 159 | #define GPIO77_LCD_ACBIAS MFP_CFG_OUT(GPIO77, AF2, DRIVE_LOW) | 159 | #define GPIO77_LCD_BIAS MFP_CFG_OUT(GPIO77, AF2, DRIVE_LOW) |
| 160 | 160 | ||
| 161 | #endif /* __ASM_ARCH_MFP_PXA25X_H */ | 161 | #endif /* __ASM_ARCH_MFP_PXA25X_H */ |
diff --git a/arch/arm/mach-pxa/include/mach/mfp-pxa320.h b/arch/arm/mach-pxa/include/mach/mfp-pxa320.h index 74990510cf34..67f8385ea548 100644 --- a/arch/arm/mach-pxa/include/mach/mfp-pxa320.h +++ b/arch/arm/mach-pxa/include/mach/mfp-pxa320.h | |||
| @@ -257,10 +257,10 @@ | |||
| 257 | #define GPIO38_SSP2_RXD MFP_CFG(GPIO38, AF2) | 257 | #define GPIO38_SSP2_RXD MFP_CFG(GPIO38, AF2) |
| 258 | #define GPIO38_SSP2_TXD MFP_CFG(GPIO38, AF5) | 258 | #define GPIO38_SSP2_TXD MFP_CFG(GPIO38, AF5) |
| 259 | 259 | ||
| 260 | #define GPIO69_SSP3_SCLK MFP_CFG(GPIO69, AF2, DS08X, FLOAT) | 260 | #define GPIO69_SSP3_SCLK MFP_CFG_X(GPIO69, AF2, DS08X, FLOAT) |
| 261 | #define GPIO70_SSP3_FRM MFP_CFG(GPIO70, AF2, DS08X, DRIVE_LOW) | 261 | #define GPIO70_SSP3_FRM MFP_CFG_X(GPIO70, AF2, DS08X, DRIVE_LOW) |
| 262 | #define GPIO89_SSP3_SCLK MFP_CFG(GPIO89, AF1, DS08X, FLOAT) | 262 | #define GPIO89_SSP3_SCLK MFP_CFG_X(GPIO89, AF1, DS08X, FLOAT) |
| 263 | #define GPIO90_SSP3_FRM MFP_CFG(GPIO90, AF1, DS08X, DRIVE_LOW) | 263 | #define GPIO90_SSP3_FRM MFP_CFG_X(GPIO90, AF1, DS08X, DRIVE_LOW) |
| 264 | #define GPIO71_SSP3_RXD MFP_CFG_X(GPIO71, AF5, DS08X, FLOAT) | 264 | #define GPIO71_SSP3_RXD MFP_CFG_X(GPIO71, AF5, DS08X, FLOAT) |
| 265 | #define GPIO71_SSP3_TXD MFP_CFG_X(GPIO71, AF2, DS08X, DRIVE_LOW) | 265 | #define GPIO71_SSP3_TXD MFP_CFG_X(GPIO71, AF2, DS08X, DRIVE_LOW) |
| 266 | #define GPIO72_SSP3_RXD MFP_CFG_X(GPIO72, AF2, DS08X, FLOAT) | 266 | #define GPIO72_SSP3_RXD MFP_CFG_X(GPIO72, AF2, DS08X, FLOAT) |
diff --git a/arch/arm/mach-pxa/include/mach/mfp.h b/arch/arm/mach-pxa/include/mach/mfp.h index 8769567b389b..482185053a92 100644 --- a/arch/arm/mach-pxa/include/mach/mfp.h +++ b/arch/arm/mach-pxa/include/mach/mfp.h | |||
| @@ -274,12 +274,13 @@ typedef unsigned long mfp_cfg_t; | |||
| 274 | #define MFP_DS_MASK (0x7 << 13) | 274 | #define MFP_DS_MASK (0x7 << 13) |
| 275 | #define MFP_DS(x) (((x) >> 13) & 0x7) | 275 | #define MFP_DS(x) (((x) >> 13) & 0x7) |
| 276 | 276 | ||
| 277 | #define MFP_LPM_INPUT (0x0 << 16) | 277 | #define MFP_LPM_DEFAULT (0x0 << 16) |
| 278 | #define MFP_LPM_DRIVE_LOW (0x1 << 16) | 278 | #define MFP_LPM_DRIVE_LOW (0x1 << 16) |
| 279 | #define MFP_LPM_DRIVE_HIGH (0x2 << 16) | 279 | #define MFP_LPM_DRIVE_HIGH (0x2 << 16) |
| 280 | #define MFP_LPM_PULL_LOW (0x3 << 16) | 280 | #define MFP_LPM_PULL_LOW (0x3 << 16) |
| 281 | #define MFP_LPM_PULL_HIGH (0x4 << 16) | 281 | #define MFP_LPM_PULL_HIGH (0x4 << 16) |
| 282 | #define MFP_LPM_FLOAT (0x5 << 16) | 282 | #define MFP_LPM_FLOAT (0x5 << 16) |
| 283 | #define MFP_LPM_INPUT (0x6 << 16) | ||
| 283 | #define MFP_LPM_STATE_MASK (0x7 << 16) | 284 | #define MFP_LPM_STATE_MASK (0x7 << 16) |
| 284 | #define MFP_LPM_STATE(x) (((x) >> 16) & 0x7) | 285 | #define MFP_LPM_STATE(x) (((x) >> 16) & 0x7) |
| 285 | 286 | ||
| @@ -297,7 +298,7 @@ typedef unsigned long mfp_cfg_t; | |||
| 297 | #define MFP_PULL_MASK (0x3 << 21) | 298 | #define MFP_PULL_MASK (0x3 << 21) |
| 298 | #define MFP_PULL(x) (((x) >> 21) & 0x3) | 299 | #define MFP_PULL(x) (((x) >> 21) & 0x3) |
| 299 | 300 | ||
| 300 | #define MFP_CFG_DEFAULT (MFP_AF0 | MFP_DS03X | MFP_LPM_INPUT |\ | 301 | #define MFP_CFG_DEFAULT (MFP_AF0 | MFP_DS03X | MFP_LPM_DEFAULT |\ |
| 301 | MFP_LPM_EDGE_NONE | MFP_PULL_NONE) | 302 | MFP_LPM_EDGE_NONE | MFP_PULL_NONE) |
| 302 | 303 | ||
| 303 | #define MFP_CFG(pin, af) \ | 304 | #define MFP_CFG(pin, af) \ |
diff --git a/arch/arm/mach-pxa/include/mach/mioa701.h b/arch/arm/mach-pxa/include/mach/mioa701.h new file mode 100644 index 000000000000..8483cb511831 --- /dev/null +++ b/arch/arm/mach-pxa/include/mach/mioa701.h | |||
| @@ -0,0 +1,67 @@ | |||
| 1 | #ifndef _MIOA701_H_ | ||
| 2 | #define _MIOA701_H_ | ||
| 3 | |||
| 4 | #define MIO_CFG_IN(pin, af) \ | ||
| 5 | ((MFP_CFG_DEFAULT & ~(MFP_AF_MASK | MFP_DIR_MASK)) |\ | ||
| 6 | (MFP_PIN(pin) | MFP_##af | MFP_DIR_IN)) | ||
| 7 | |||
| 8 | #define MIO_CFG_OUT(pin, af, state) \ | ||
| 9 | ((MFP_CFG_DEFAULT & ~(MFP_AF_MASK | MFP_DIR_MASK | MFP_LPM_STATE_MASK)) |\ | ||
| 10 | (MFP_PIN(pin) | MFP_##af | MFP_DIR_OUT | MFP_LPM_##state)) | ||
| 11 | |||
| 12 | /* Global GPIOs */ | ||
| 13 | #define GPIO9_CHARGE_nEN 9 | ||
| 14 | #define GPIO18_POWEROFF 18 | ||
| 15 | #define GPIO87_LCD_POWER 87 | ||
| 16 | |||
| 17 | /* USB */ | ||
| 18 | #define GPIO13_USB_DETECT 13 | ||
| 19 | #define GPIO22_USB_ENABLE 22 | ||
| 20 | |||
| 21 | /* SDIO bits */ | ||
| 22 | #define GPIO78_SDIO_RO 78 | ||
| 23 | #define GPIO15_SDIO_INSERT 15 | ||
| 24 | #define GPIO91_SDIO_EN 91 | ||
| 25 | |||
| 26 | /* Bluetooth */ | ||
| 27 | #define GPIO83_BT_ON 83 | ||
| 28 | |||
| 29 | /* GPS */ | ||
| 30 | #define GPIO23_GPS_UNKNOWN1 23 | ||
| 31 | #define GPIO26_GPS_ON 26 | ||
| 32 | #define GPIO27_GPS_RESET 27 | ||
| 33 | #define GPIO106_GPS_UNKNOWN2 106 | ||
| 34 | #define GPIO107_GPS_UNKNOWN3 107 | ||
| 35 | |||
| 36 | /* GSM */ | ||
| 37 | #define GPIO24_GSM_MOD_RESET_CMD 24 | ||
| 38 | #define GPIO88_GSM_nMOD_ON_CMD 88 | ||
| 39 | #define GPIO90_GSM_nMOD_OFF_CMD 90 | ||
| 40 | #define GPIO114_GSM_nMOD_DTE_UART_STATE 114 | ||
| 41 | #define GPIO25_GSM_MOD_ON_STATE 25 | ||
| 42 | #define GPIO113_GSM_EVENT 113 | ||
| 43 | |||
| 44 | /* SOUND */ | ||
| 45 | #define GPIO12_HPJACK_INSERT 12 | ||
| 46 | |||
| 47 | /* LEDS */ | ||
| 48 | #define GPIO10_LED_nCharging 10 | ||
| 49 | #define GPIO97_LED_nBlue 97 | ||
| 50 | #define GPIO98_LED_nOrange 98 | ||
| 51 | #define GPIO82_LED_nVibra 82 | ||
| 52 | #define GPIO115_LED_nKeyboard 115 | ||
| 53 | |||
| 54 | /* Keyboard */ | ||
| 55 | #define GPIO0_KEY_POWER 0 | ||
| 56 | #define GPIO93_KEY_VOLUME_UP 93 | ||
| 57 | #define GPIO94_KEY_VOLUME_DOWN 94 | ||
| 58 | |||
| 59 | extern struct input_dev *mioa701_evdev; | ||
| 60 | extern void mioa701_gpio_lpm_set(unsigned long mfp_pin); | ||
| 61 | |||
| 62 | /* Assembler externals mioa701_bootresume.S */ | ||
| 63 | extern u32 mioa701_bootstrap; | ||
| 64 | extern u32 mioa701_jumpaddr; | ||
| 65 | extern u32 mioa701_bootstrap_lg; | ||
| 66 | |||
| 67 | #endif /* _MIOA701_H */ | ||
diff --git a/arch/arm/mach-pxa/include/mach/ohci.h b/arch/arm/mach-pxa/include/mach/ohci.h index e848a47128cd..95b6e2a6e514 100644 --- a/arch/arm/mach-pxa/include/mach/ohci.h +++ b/arch/arm/mach-pxa/include/mach/ohci.h | |||
| @@ -7,6 +7,22 @@ struct pxaohci_platform_data { | |||
| 7 | int (*init)(struct device *); | 7 | int (*init)(struct device *); |
| 8 | void (*exit)(struct device *); | 8 | void (*exit)(struct device *); |
| 9 | 9 | ||
| 10 | unsigned long flags; | ||
| 11 | #define ENABLE_PORT1 (1 << 0) | ||
| 12 | #define ENABLE_PORT2 (1 << 1) | ||
| 13 | #define ENABLE_PORT3 (1 << 2) | ||
| 14 | #define ENABLE_PORT_ALL (ENABLE_PORT1 | ENABLE_PORT2 | ENABLE_PORT3) | ||
| 15 | |||
| 16 | #define POWER_SENSE_LOW (1 << 3) | ||
| 17 | #define POWER_CONTROL_LOW (1 << 4) | ||
| 18 | #define NO_OC_PROTECTION (1 << 5) | ||
| 19 | #define OC_MODE_GLOBAL (0 << 6) | ||
| 20 | #define OC_MODE_PERPORT (1 << 6) | ||
| 21 | |||
| 22 | int power_on_delay; /* Power On to Power Good time - in ms | ||
| 23 | * HCD must wait for this duration before | ||
| 24 | * accessing a powered on port | ||
| 25 | */ | ||
| 10 | int port_mode; | 26 | int port_mode; |
| 11 | #define PMM_NPS_MODE 1 | 27 | #define PMM_NPS_MODE 1 |
| 12 | #define PMM_GLOBAL_MODE 2 | 28 | #define PMM_GLOBAL_MODE 2 |
diff --git a/arch/arm/mach-pxa/include/mach/palmz72.h b/arch/arm/mach-pxa/include/mach/palmz72.h new file mode 100644 index 000000000000..5032307ebf7d --- /dev/null +++ b/arch/arm/mach-pxa/include/mach/palmz72.h | |||
| @@ -0,0 +1,80 @@ | |||
| 1 | /* | ||
| 2 | * GPIOs and interrupts for Palm Zire72 Handheld Computer | ||
| 3 | * | ||
| 4 | * Authors: Alex Osborne <bobofdoom@gmail.com> | ||
| 5 | * Jan Herman <2hp@seznam.cz> | ||
| 6 | * Sergey Lapin <slapin@ossfans.org> | ||
| 7 | * | ||
| 8 | * This program is free software; you can redistribute it and/or modify | ||
| 9 | * it under the terms of the GNU General Public License version 2 as | ||
| 10 | * published by the Free Software Foundation. | ||
| 11 | * | ||
| 12 | */ | ||
| 13 | |||
| 14 | #ifndef _INCLUDE_PALMZ72_H_ | ||
| 15 | #define _INCLUDE_PALMZ72_H_ | ||
| 16 | |||
| 17 | /* Power and control */ | ||
| 18 | #define GPIO_NR_PALMZ72_GPIO_RESET 1 | ||
| 19 | #define GPIO_NR_PALMZ72_POWER_DETECT 0 | ||
| 20 | |||
| 21 | /* SD/MMC */ | ||
| 22 | #define GPIO_NR_PALMZ72_SD_DETECT_N 14 | ||
| 23 | #define GPIO_NR_PALMZ72_SD_POWER_N 98 | ||
| 24 | #define GPIO_NR_PALMZ72_SD_RO 115 | ||
| 25 | |||
| 26 | /* Touchscreen */ | ||
| 27 | #define GPIO_NR_PALMZ72_WM9712_IRQ 27 | ||
| 28 | |||
| 29 | /* IRDA - disable GPIO connected to SD pin of tranceiver (TFBS4710?) ? */ | ||
| 30 | #define GPIO_NR_PALMZ72_IR_DISABLE 49 | ||
| 31 | |||
| 32 | /* USB */ | ||
| 33 | #define GPIO_NR_PALMZ72_USB_DETECT_N 15 | ||
| 34 | #define GPIO_NR_PALMZ72_USB_POWER 95 | ||
| 35 | #define GPIO_NR_PALMZ72_USB_PULLUP 12 | ||
| 36 | |||
| 37 | /* LCD/Backlight */ | ||
| 38 | #define GPIO_NR_PALMZ72_BL_POWER 20 | ||
| 39 | #define GPIO_NR_PALMZ72_LCD_POWER 96 | ||
| 40 | |||
| 41 | /* LED */ | ||
| 42 | #define GPIO_NR_PALMZ72_LED_GREEN 88 | ||
| 43 | |||
| 44 | /* Bluetooth */ | ||
| 45 | #define GPIO_NR_PALMZ72_BT_POWER 17 | ||
| 46 | #define GPIO_NR_PALMZ72_BT_RESET 83 | ||
| 47 | |||
| 48 | /** Initial values **/ | ||
| 49 | |||
| 50 | /* Battery */ | ||
| 51 | #define PALMZ72_BAT_MAX_VOLTAGE 4000 /* 4.00v current voltage */ | ||
| 52 | #define PALMZ72_BAT_MIN_VOLTAGE 3550 /* 3.55v critical voltage */ | ||
| 53 | #define PALMZ72_BAT_MAX_CURRENT 0 /* unknokn */ | ||
| 54 | #define PALMZ72_BAT_MIN_CURRENT 0 /* unknown */ | ||
| 55 | #define PALMZ72_BAT_MAX_CHARGE 1 /* unknown */ | ||
| 56 | #define PALMZ72_BAT_MIN_CHARGE 1 /* unknown */ | ||
| 57 | #define PALMZ72_MAX_LIFE_MINS 360 /* on-life in minutes */ | ||
| 58 | |||
| 59 | /* Backlight */ | ||
| 60 | #define PALMZ72_MAX_INTENSITY 0xFE | ||
| 61 | #define PALMZ72_DEFAULT_INTENSITY 0x7E | ||
| 62 | #define PALMZ72_LIMIT_MASK 0x7F | ||
| 63 | #define PALMZ72_PRESCALER 0x3F | ||
| 64 | #define PALMZ72_PERIOD_NS 3500 | ||
| 65 | |||
| 66 | #ifdef CONFIG_PM | ||
| 67 | struct palmz72_resume_info { | ||
| 68 | u32 magic0; /* 0x0 */ | ||
| 69 | u32 magic1; /* 0x4 */ | ||
| 70 | u32 resume_addr; /* 0x8 */ | ||
| 71 | u32 pad[11]; /* 0xc..0x37 */ | ||
| 72 | u32 arm_control; /* 0x38 */ | ||
| 73 | u32 aux_control; /* 0x3c */ | ||
| 74 | u32 ttb; /* 0x40 */ | ||
| 75 | u32 domain_access; /* 0x44 */ | ||
| 76 | u32 process_id; /* 0x48 */ | ||
| 77 | }; | ||
| 78 | #endif | ||
| 79 | #endif | ||
| 80 | |||
diff --git a/arch/arm/mach-pxa/include/mach/pm.h b/arch/arm/mach-pxa/include/mach/pm.h index 261e5bc958db..83342469acac 100644 --- a/arch/arm/mach-pxa/include/mach/pm.h +++ b/arch/arm/mach-pxa/include/mach/pm.h | |||
| @@ -15,6 +15,8 @@ struct pxa_cpu_pm_fns { | |||
| 15 | void (*restore)(unsigned long *); | 15 | void (*restore)(unsigned long *); |
| 16 | int (*valid)(suspend_state_t state); | 16 | int (*valid)(suspend_state_t state); |
| 17 | void (*enter)(suspend_state_t state); | 17 | void (*enter)(suspend_state_t state); |
| 18 | int (*prepare)(void); | ||
| 19 | void (*finish)(void); | ||
| 18 | }; | 20 | }; |
| 19 | 21 | ||
| 20 | extern struct pxa_cpu_pm_fns *pxa_cpu_pm_fns; | 22 | extern struct pxa_cpu_pm_fns *pxa_cpu_pm_fns; |
diff --git a/arch/arm/mach-pxa/include/mach/poodle.h b/arch/arm/mach-pxa/include/mach/poodle.h index 67debc47e8c6..0b3e6d051c64 100644 --- a/arch/arm/mach-pxa/include/mach/poodle.h +++ b/arch/arm/mach-pxa/include/mach/poodle.h | |||
| @@ -23,6 +23,7 @@ | |||
| 23 | #define POODLE_GPIO_AC_IN (1) | 23 | #define POODLE_GPIO_AC_IN (1) |
| 24 | #define POODLE_GPIO_CO 16 | 24 | #define POODLE_GPIO_CO 16 |
| 25 | #define POODLE_GPIO_TP_INT (5) | 25 | #define POODLE_GPIO_TP_INT (5) |
| 26 | #define POODLE_GPIO_TP_CS (24) | ||
| 26 | #define POODLE_GPIO_WAKEUP (11) /* change battery */ | 27 | #define POODLE_GPIO_WAKEUP (11) /* change battery */ |
| 27 | #define POODLE_GPIO_GA_INT (10) | 28 | #define POODLE_GPIO_GA_INT (10) |
| 28 | #define POODLE_GPIO_IR_ON (22) | 29 | #define POODLE_GPIO_IR_ON (22) |
| @@ -70,6 +71,14 @@ | |||
| 70 | #define POODLE_SCOOP_IO_DIR ( POODLE_SCOOP_VPEN | POODLE_SCOOP_HS_OUT ) | 71 | #define POODLE_SCOOP_IO_DIR ( POODLE_SCOOP_VPEN | POODLE_SCOOP_HS_OUT ) |
| 71 | #define POODLE_SCOOP_IO_OUT ( 0 ) | 72 | #define POODLE_SCOOP_IO_OUT ( 0 ) |
| 72 | 73 | ||
| 74 | #define POODLE_SCOOP_GPIO_BASE (NR_BUILTIN_GPIO) | ||
| 75 | #define POODLE_GPIO_CHARGE_ON (POODLE_SCOOP_GPIO_BASE + 0) | ||
| 76 | #define POODLE_GPIO_CP401 (POODLE_SCOOP_GPIO_BASE + 2) | ||
| 77 | #define POODLE_GPIO_VPEN (POODLE_SCOOP_GPIO_BASE + 7) | ||
| 78 | #define POODLE_GPIO_L_PCLK (POODLE_SCOOP_GPIO_BASE + 9) | ||
| 79 | #define POODLE_GPIO_L_LCLK (POODLE_SCOOP_GPIO_BASE + 10) | ||
| 80 | #define POODLE_GPIO_HS_OUT (POODLE_SCOOP_GPIO_BASE + 11) | ||
| 81 | |||
| 73 | #define POODLE_LOCOMO_GPIO_AMP_ON LOCOMO_GPIO(8) | 82 | #define POODLE_LOCOMO_GPIO_AMP_ON LOCOMO_GPIO(8) |
| 74 | #define POODLE_LOCOMO_GPIO_MUTE_L LOCOMO_GPIO(10) | 83 | #define POODLE_LOCOMO_GPIO_MUTE_L LOCOMO_GPIO(10) |
| 75 | #define POODLE_LOCOMO_GPIO_MUTE_R LOCOMO_GPIO(11) | 84 | #define POODLE_LOCOMO_GPIO_MUTE_R LOCOMO_GPIO(11) |
diff --git a/arch/arm/mach-pxa/include/mach/pxa-regs.h b/arch/arm/mach-pxa/include/mach/pxa-regs.h index 12288ca3cbb2..15295d960000 100644 --- a/arch/arm/mach-pxa/include/mach/pxa-regs.h +++ b/arch/arm/mach-pxa/include/mach/pxa-regs.h | |||
| @@ -69,30 +69,18 @@ | |||
| 69 | /* | 69 | /* |
| 70 | * DMA Controller | 70 | * DMA Controller |
| 71 | */ | 71 | */ |
| 72 | |||
| 73 | #define DCSR0 __REG(0x40000000) /* DMA Control / Status Register for Channel 0 */ | ||
| 74 | #define DCSR1 __REG(0x40000004) /* DMA Control / Status Register for Channel 1 */ | ||
| 75 | #define DCSR2 __REG(0x40000008) /* DMA Control / Status Register for Channel 2 */ | ||
| 76 | #define DCSR3 __REG(0x4000000c) /* DMA Control / Status Register for Channel 3 */ | ||
| 77 | #define DCSR4 __REG(0x40000010) /* DMA Control / Status Register for Channel 4 */ | ||
| 78 | #define DCSR5 __REG(0x40000014) /* DMA Control / Status Register for Channel 5 */ | ||
| 79 | #define DCSR6 __REG(0x40000018) /* DMA Control / Status Register for Channel 6 */ | ||
| 80 | #define DCSR7 __REG(0x4000001c) /* DMA Control / Status Register for Channel 7 */ | ||
| 81 | #define DCSR8 __REG(0x40000020) /* DMA Control / Status Register for Channel 8 */ | ||
| 82 | #define DCSR9 __REG(0x40000024) /* DMA Control / Status Register for Channel 9 */ | ||
| 83 | #define DCSR10 __REG(0x40000028) /* DMA Control / Status Register for Channel 10 */ | ||
| 84 | #define DCSR11 __REG(0x4000002c) /* DMA Control / Status Register for Channel 11 */ | ||
| 85 | #define DCSR12 __REG(0x40000030) /* DMA Control / Status Register for Channel 12 */ | ||
| 86 | #define DCSR13 __REG(0x40000034) /* DMA Control / Status Register for Channel 13 */ | ||
| 87 | #define DCSR14 __REG(0x40000038) /* DMA Control / Status Register for Channel 14 */ | ||
| 88 | #define DCSR15 __REG(0x4000003c) /* DMA Control / Status Register for Channel 15 */ | ||
| 89 | |||
| 90 | #define DCSR(x) __REG2(0x40000000, (x) << 2) | 72 | #define DCSR(x) __REG2(0x40000000, (x) << 2) |
| 91 | 73 | ||
| 92 | #define DCSR_RUN (1 << 31) /* Run Bit (read / write) */ | 74 | #define DCSR_RUN (1 << 31) /* Run Bit (read / write) */ |
| 93 | #define DCSR_NODESC (1 << 30) /* No-Descriptor Fetch (read / write) */ | 75 | #define DCSR_NODESC (1 << 30) /* No-Descriptor Fetch (read / write) */ |
| 94 | #define DCSR_STOPIRQEN (1 << 29) /* Stop Interrupt Enable (read / write) */ | 76 | #define DCSR_STOPIRQEN (1 << 29) /* Stop Interrupt Enable (read / write) */ |
| 95 | #ifdef CONFIG_PXA27x | 77 | #define DCSR_REQPEND (1 << 8) /* Request Pending (read-only) */ |
| 78 | #define DCSR_STOPSTATE (1 << 3) /* Stop State (read-only) */ | ||
| 79 | #define DCSR_ENDINTR (1 << 2) /* End Interrupt (read / write) */ | ||
| 80 | #define DCSR_STARTINTR (1 << 1) /* Start Interrupt (read / write) */ | ||
| 81 | #define DCSR_BUSERR (1 << 0) /* Bus Error Interrupt (read / write) */ | ||
| 82 | |||
| 83 | #if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx) | ||
| 96 | #define DCSR_EORIRQEN (1 << 28) /* End of Receive Interrupt Enable (R/W) */ | 84 | #define DCSR_EORIRQEN (1 << 28) /* End of Receive Interrupt Enable (R/W) */ |
| 97 | #define DCSR_EORJMPEN (1 << 27) /* Jump to next descriptor on EOR */ | 85 | #define DCSR_EORJMPEN (1 << 27) /* Jump to next descriptor on EOR */ |
| 98 | #define DCSR_EORSTOPEN (1 << 26) /* STOP on an EOR */ | 86 | #define DCSR_EORSTOPEN (1 << 26) /* STOP on an EOR */ |
| @@ -101,11 +89,6 @@ | |||
| 101 | #define DCSR_CMPST (1 << 10) /* The Descriptor Compare Status */ | 89 | #define DCSR_CMPST (1 << 10) /* The Descriptor Compare Status */ |
| 102 | #define DCSR_EORINTR (1 << 9) /* The end of Receive */ | 90 | #define DCSR_EORINTR (1 << 9) /* The end of Receive */ |
| 103 | #endif | 91 | #endif |
| 104 | #define DCSR_REQPEND (1 << 8) /* Request Pending (read-only) */ | ||
| 105 | #define DCSR_STOPSTATE (1 << 3) /* Stop State (read-only) */ | ||
| 106 | #define DCSR_ENDINTR (1 << 2) /* End Interrupt (read / write) */ | ||
| 107 | #define DCSR_STARTINTR (1 << 1) /* Start Interrupt (read / write) */ | ||
| 108 | #define DCSR_BUSERR (1 << 0) /* Bus Error Interrupt (read / write) */ | ||
| 109 | 92 | ||
| 110 | #define DALGN __REG(0x400000a0) /* DMA Alignment Register */ | 93 | #define DALGN __REG(0x400000a0) /* DMA Alignment Register */ |
| 111 | #define DINT __REG(0x400000f0) /* DMA Interrupt Register */ | 94 | #define DINT __REG(0x400000f0) /* DMA Interrupt Register */ |
| @@ -114,145 +97,9 @@ | |||
| 114 | &__REG2(0x40000100, ((n) & 0x3f) << 2) : \ | 97 | &__REG2(0x40000100, ((n) & 0x3f) << 2) : \ |
| 115 | &__REG2(0x40001100, ((n) & 0x3f) << 2))) | 98 | &__REG2(0x40001100, ((n) & 0x3f) << 2))) |
| 116 | 99 | ||
| 117 | #define DRCMR0 __REG(0x40000100) /* Request to Channel Map Register for DREQ 0 */ | ||
| 118 | #define DRCMR1 __REG(0x40000104) /* Request to Channel Map Register for DREQ 1 */ | ||
| 119 | #define DRCMR2 __REG(0x40000108) /* Request to Channel Map Register for I2S receive Request */ | ||
| 120 | #define DRCMR3 __REG(0x4000010c) /* Request to Channel Map Register for I2S transmit Request */ | ||
| 121 | #define DRCMR4 __REG(0x40000110) /* Request to Channel Map Register for BTUART receive Request */ | ||
| 122 | #define DRCMR5 __REG(0x40000114) /* Request to Channel Map Register for BTUART transmit Request. */ | ||
| 123 | #define DRCMR6 __REG(0x40000118) /* Request to Channel Map Register for FFUART receive Request */ | ||
| 124 | #define DRCMR7 __REG(0x4000011c) /* Request to Channel Map Register for FFUART transmit Request */ | ||
| 125 | #define DRCMR8 __REG(0x40000120) /* Request to Channel Map Register for AC97 microphone Request */ | ||
| 126 | #define DRCMR9 __REG(0x40000124) /* Request to Channel Map Register for AC97 modem receive Request */ | ||
| 127 | #define DRCMR10 __REG(0x40000128) /* Request to Channel Map Register for AC97 modem transmit Request */ | ||
| 128 | #define DRCMR11 __REG(0x4000012c) /* Request to Channel Map Register for AC97 audio receive Request */ | ||
| 129 | #define DRCMR12 __REG(0x40000130) /* Request to Channel Map Register for AC97 audio transmit Request */ | ||
| 130 | #define DRCMR13 __REG(0x40000134) /* Request to Channel Map Register for SSP receive Request */ | ||
| 131 | #define DRCMR14 __REG(0x40000138) /* Request to Channel Map Register for SSP transmit Request */ | ||
| 132 | #define DRCMR15 __REG(0x4000013c) /* Request to Channel Map Register for SSP2 receive Request */ | ||
| 133 | #define DRCMR16 __REG(0x40000140) /* Request to Channel Map Register for SSP2 transmit Request */ | ||
| 134 | #define DRCMR17 __REG(0x40000144) /* Request to Channel Map Register for ICP receive Request */ | ||
| 135 | #define DRCMR18 __REG(0x40000148) /* Request to Channel Map Register for ICP transmit Request */ | ||
| 136 | #define DRCMR19 __REG(0x4000014c) /* Request to Channel Map Register for STUART receive Request */ | ||
| 137 | #define DRCMR20 __REG(0x40000150) /* Request to Channel Map Register for STUART transmit Request */ | ||
| 138 | #define DRCMR21 __REG(0x40000154) /* Request to Channel Map Register for MMC receive Request */ | ||
| 139 | #define DRCMR22 __REG(0x40000158) /* Request to Channel Map Register for MMC transmit Request */ | ||
| 140 | #define DRCMR23 __REG(0x4000015c) /* Reserved */ | ||
| 141 | #define DRCMR24 __REG(0x40000160) /* Reserved */ | ||
| 142 | #define DRCMR25 __REG(0x40000164) /* Request to Channel Map Register for USB endpoint 1 Request */ | ||
| 143 | #define DRCMR26 __REG(0x40000168) /* Request to Channel Map Register for USB endpoint 2 Request */ | ||
| 144 | #define DRCMR27 __REG(0x4000016C) /* Request to Channel Map Register for USB endpoint 3 Request */ | ||
| 145 | #define DRCMR28 __REG(0x40000170) /* Request to Channel Map Register for USB endpoint 4 Request */ | ||
| 146 | #define DRCMR29 __REG(0x40000174) /* Reserved */ | ||
| 147 | #define DRCMR30 __REG(0x40000178) /* Request to Channel Map Register for USB endpoint 6 Request */ | ||
| 148 | #define DRCMR31 __REG(0x4000017C) /* Request to Channel Map Register for USB endpoint 7 Request */ | ||
| 149 | #define DRCMR32 __REG(0x40000180) /* Request to Channel Map Register for USB endpoint 8 Request */ | ||
| 150 | #define DRCMR33 __REG(0x40000184) /* Request to Channel Map Register for USB endpoint 9 Request */ | ||
| 151 | #define DRCMR34 __REG(0x40000188) /* Reserved */ | ||
| 152 | #define DRCMR35 __REG(0x4000018C) /* Request to Channel Map Register for USB endpoint 11 Request */ | ||
| 153 | #define DRCMR36 __REG(0x40000190) /* Request to Channel Map Register for USB endpoint 12 Request */ | ||
| 154 | #define DRCMR37 __REG(0x40000194) /* Request to Channel Map Register for USB endpoint 13 Request */ | ||
| 155 | #define DRCMR38 __REG(0x40000198) /* Request to Channel Map Register for USB endpoint 14 Request */ | ||
| 156 | #define DRCMR39 __REG(0x4000019C) /* Reserved */ | ||
| 157 | #define DRCMR66 __REG(0x40001108) /* Request to Channel Map Register for SSP3 receive Request */ | ||
| 158 | #define DRCMR67 __REG(0x4000110C) /* Request to Channel Map Register for SSP3 transmit Request */ | ||
| 159 | #define DRCMR68 __REG(0x40001110) /* Request to Channel Map Register for Camera FIFO 0 Request */ | ||
| 160 | #define DRCMR69 __REG(0x40001114) /* Request to Channel Map Register for Camera FIFO 1 Request */ | ||
| 161 | #define DRCMR70 __REG(0x40001118) /* Request to Channel Map Register for Camera FIFO 2 Request */ | ||
| 162 | |||
| 163 | #define DRCMRRXSADR DRCMR2 | ||
| 164 | #define DRCMRTXSADR DRCMR3 | ||
| 165 | #define DRCMRRXBTRBR DRCMR4 | ||
| 166 | #define DRCMRTXBTTHR DRCMR5 | ||
| 167 | #define DRCMRRXFFRBR DRCMR6 | ||
| 168 | #define DRCMRTXFFTHR DRCMR7 | ||
| 169 | #define DRCMRRXMCDR DRCMR8 | ||
| 170 | #define DRCMRRXMODR DRCMR9 | ||
| 171 | #define DRCMRTXMODR DRCMR10 | ||
| 172 | #define DRCMRRXPCDR DRCMR11 | ||
| 173 | #define DRCMRTXPCDR DRCMR12 | ||
| 174 | #define DRCMRRXSSDR DRCMR13 | ||
| 175 | #define DRCMRTXSSDR DRCMR14 | ||
| 176 | #define DRCMRRXSS2DR DRCMR15 | ||
| 177 | #define DRCMRTXSS2DR DRCMR16 | ||
| 178 | #define DRCMRRXICDR DRCMR17 | ||
| 179 | #define DRCMRTXICDR DRCMR18 | ||
| 180 | #define DRCMRRXSTRBR DRCMR19 | ||
| 181 | #define DRCMRTXSTTHR DRCMR20 | ||
| 182 | #define DRCMRRXMMC DRCMR21 | ||
| 183 | #define DRCMRTXMMC DRCMR22 | ||
| 184 | #define DRCMRRXSS3DR DRCMR66 | ||
| 185 | #define DRCMRTXSS3DR DRCMR67 | ||
| 186 | #define DRCMRUDC(x) DRCMR((x) + 24) | ||
| 187 | |||
| 188 | #define DRCMR_MAPVLD (1 << 7) /* Map Valid (read / write) */ | 100 | #define DRCMR_MAPVLD (1 << 7) /* Map Valid (read / write) */ |
| 189 | #define DRCMR_CHLNUM 0x1f /* mask for Channel Number (read / write) */ | 101 | #define DRCMR_CHLNUM 0x1f /* mask for Channel Number (read / write) */ |
| 190 | 102 | ||
| 191 | #define DDADR0 __REG(0x40000200) /* DMA Descriptor Address Register Channel 0 */ | ||
| 192 | #define DSADR0 __REG(0x40000204) /* DMA Source Address Register Channel 0 */ | ||
| 193 | #define DTADR0 __REG(0x40000208) /* DMA Target Address Register Channel 0 */ | ||
| 194 | #define DCMD0 __REG(0x4000020c) /* DMA Command Address Register Channel 0 */ | ||
| 195 | #define DDADR1 __REG(0x40000210) /* DMA Descriptor Address Register Channel 1 */ | ||
| 196 | #define DSADR1 __REG(0x40000214) /* DMA Source Address Register Channel 1 */ | ||
| 197 | #define DTADR1 __REG(0x40000218) /* DMA Target Address Register Channel 1 */ | ||
| 198 | #define DCMD1 __REG(0x4000021c) /* DMA Command Address Register Channel 1 */ | ||
| 199 | #define DDADR2 __REG(0x40000220) /* DMA Descriptor Address Register Channel 2 */ | ||
| 200 | #define DSADR2 __REG(0x40000224) /* DMA Source Address Register Channel 2 */ | ||
| 201 | #define DTADR2 __REG(0x40000228) /* DMA Target Address Register Channel 2 */ | ||
| 202 | #define DCMD2 __REG(0x4000022c) /* DMA Command Address Register Channel 2 */ | ||
| 203 | #define DDADR3 __REG(0x40000230) /* DMA Descriptor Address Register Channel 3 */ | ||
| 204 | #define DSADR3 __REG(0x40000234) /* DMA Source Address Register Channel 3 */ | ||
| 205 | #define DTADR3 __REG(0x40000238) /* DMA Target Address Register Channel 3 */ | ||
| 206 | #define DCMD3 __REG(0x4000023c) /* DMA Command Address Register Channel 3 */ | ||
| 207 | #define DDADR4 __REG(0x40000240) /* DMA Descriptor Address Register Channel 4 */ | ||
| 208 | #define DSADR4 __REG(0x40000244) /* DMA Source Address Register Channel 4 */ | ||
| 209 | #define DTADR4 __REG(0x40000248) /* DMA Target Address Register Channel 4 */ | ||
| 210 | #define DCMD4 __REG(0x4000024c) /* DMA Command Address Register Channel 4 */ | ||
| 211 | #define DDADR5 __REG(0x40000250) /* DMA Descriptor Address Register Channel 5 */ | ||
| 212 | #define DSADR5 __REG(0x40000254) /* DMA Source Address Register Channel 5 */ | ||
| 213 | #define DTADR5 __REG(0x40000258) /* DMA Target Address Register Channel 5 */ | ||
| 214 | #define DCMD5 __REG(0x4000025c) /* DMA Command Address Register Channel 5 */ | ||
| 215 | #define DDADR6 __REG(0x40000260) /* DMA Descriptor Address Register Channel 6 */ | ||
| 216 | #define DSADR6 __REG(0x40000264) /* DMA Source Address Register Channel 6 */ | ||
| 217 | #define DTADR6 __REG(0x40000268) /* DMA Target Address Register Channel 6 */ | ||
| 218 | #define DCMD6 __REG(0x4000026c) /* DMA Command Address Register Channel 6 */ | ||
| 219 | #define DDADR7 __REG(0x40000270) /* DMA Descriptor Address Register Channel 7 */ | ||
| 220 | #define DSADR7 __REG(0x40000274) /* DMA Source Address Register Channel 7 */ | ||
| 221 | #define DTADR7 __REG(0x40000278) /* DMA Target Address Register Channel 7 */ | ||
| 222 | #define DCMD7 __REG(0x4000027c) /* DMA Command Address Register Channel 7 */ | ||
| 223 | #define DDADR8 __REG(0x40000280) /* DMA Descriptor Address Register Channel 8 */ | ||
| 224 | #define DSADR8 __REG(0x40000284) /* DMA Source Address Register Channel 8 */ | ||
| 225 | #define DTADR8 __REG(0x40000288) /* DMA Target Address Register Channel 8 */ | ||
| 226 | #define DCMD8 __REG(0x4000028c) /* DMA Command Address Register Channel 8 */ | ||
| 227 | #define DDADR9 __REG(0x40000290) /* DMA Descriptor Address Register Channel 9 */ | ||
| 228 | #define DSADR9 __REG(0x40000294) /* DMA Source Address Register Channel 9 */ | ||
| 229 | #define DTADR9 __REG(0x40000298) /* DMA Target Address Register Channel 9 */ | ||
| 230 | #define DCMD9 __REG(0x4000029c) /* DMA Command Address Register Channel 9 */ | ||
| 231 | #define DDADR10 __REG(0x400002a0) /* DMA Descriptor Address Register Channel 10 */ | ||
| 232 | #define DSADR10 __REG(0x400002a4) /* DMA Source Address Register Channel 10 */ | ||
| 233 | #define DTADR10 __REG(0x400002a8) /* DMA Target Address Register Channel 10 */ | ||
| 234 | #define DCMD10 __REG(0x400002ac) /* DMA Command Address Register Channel 10 */ | ||
| 235 | #define DDADR11 __REG(0x400002b0) /* DMA Descriptor Address Register Channel 11 */ | ||
| 236 | #define DSADR11 __REG(0x400002b4) /* DMA Source Address Register Channel 11 */ | ||
| 237 | #define DTADR11 __REG(0x400002b8) /* DMA Target Address Register Channel 11 */ | ||
| 238 | #define DCMD11 __REG(0x400002bc) /* DMA Command Address Register Channel 11 */ | ||
| 239 | #define DDADR12 __REG(0x400002c0) /* DMA Descriptor Address Register Channel 12 */ | ||
| 240 | #define DSADR12 __REG(0x400002c4) /* DMA Source Address Register Channel 12 */ | ||
| 241 | #define DTADR12 __REG(0x400002c8) /* DMA Target Address Register Channel 12 */ | ||
| 242 | #define DCMD12 __REG(0x400002cc) /* DMA Command Address Register Channel 12 */ | ||
| 243 | #define DDADR13 __REG(0x400002d0) /* DMA Descriptor Address Register Channel 13 */ | ||
| 244 | #define DSADR13 __REG(0x400002d4) /* DMA Source Address Register Channel 13 */ | ||
| 245 | #define DTADR13 __REG(0x400002d8) /* DMA Target Address Register Channel 13 */ | ||
| 246 | #define DCMD13 __REG(0x400002dc) /* DMA Command Address Register Channel 13 */ | ||
| 247 | #define DDADR14 __REG(0x400002e0) /* DMA Descriptor Address Register Channel 14 */ | ||
| 248 | #define DSADR14 __REG(0x400002e4) /* DMA Source Address Register Channel 14 */ | ||
| 249 | #define DTADR14 __REG(0x400002e8) /* DMA Target Address Register Channel 14 */ | ||
| 250 | #define DCMD14 __REG(0x400002ec) /* DMA Command Address Register Channel 14 */ | ||
| 251 | #define DDADR15 __REG(0x400002f0) /* DMA Descriptor Address Register Channel 15 */ | ||
| 252 | #define DSADR15 __REG(0x400002f4) /* DMA Source Address Register Channel 15 */ | ||
| 253 | #define DTADR15 __REG(0x400002f8) /* DMA Target Address Register Channel 15 */ | ||
| 254 | #define DCMD15 __REG(0x400002fc) /* DMA Command Address Register Channel 15 */ | ||
| 255 | |||
| 256 | #define DDADR(x) __REG2(0x40000200, (x) << 4) | 103 | #define DDADR(x) __REG2(0x40000200, (x) << 4) |
| 257 | #define DSADR(x) __REG2(0x40000204, (x) << 4) | 104 | #define DSADR(x) __REG2(0x40000204, (x) << 4) |
| 258 | #define DTADR(x) __REG2(0x40000208, (x) << 4) | 105 | #define DTADR(x) __REG2(0x40000208, (x) << 4) |
| @@ -418,91 +265,13 @@ | |||
| 418 | 265 | ||
| 419 | 266 | ||
| 420 | /* | 267 | /* |
| 421 | * I2C registers | 268 | * I2C registers - moved into drivers/i2c/busses/i2c-pxa.c |
| 422 | */ | 269 | */ |
| 423 | 270 | ||
| 424 | #define IBMR __REG(0x40301680) /* I2C Bus Monitor Register - IBMR */ | ||
| 425 | #define IDBR __REG(0x40301688) /* I2C Data Buffer Register - IDBR */ | ||
| 426 | #define ICR __REG(0x40301690) /* I2C Control Register - ICR */ | ||
| 427 | #define ISR __REG(0x40301698) /* I2C Status Register - ISR */ | ||
| 428 | #define ISAR __REG(0x403016A0) /* I2C Slave Address Register - ISAR */ | ||
| 429 | |||
| 430 | #define PWRIBMR __REG(0x40f00180) /* Power I2C Bus Monitor Register-IBMR */ | ||
| 431 | #define PWRIDBR __REG(0x40f00188) /* Power I2C Data Buffer Register-IDBR */ | ||
| 432 | #define PWRICR __REG(0x40f00190) /* Power I2C Control Register - ICR */ | ||
| 433 | #define PWRISR __REG(0x40f00198) /* Power I2C Status Register - ISR */ | ||
| 434 | #define PWRISAR __REG(0x40f001A0) /*Power I2C Slave Address Register-ISAR */ | ||
| 435 | |||
| 436 | #define ICR_START (1 << 0) /* start bit */ | ||
| 437 | #define ICR_STOP (1 << 1) /* stop bit */ | ||
| 438 | #define ICR_ACKNAK (1 << 2) /* send ACK(0) or NAK(1) */ | ||
| 439 | #define ICR_TB (1 << 3) /* transfer byte bit */ | ||
| 440 | #define ICR_MA (1 << 4) /* master abort */ | ||
| 441 | #define ICR_SCLE (1 << 5) /* master clock enable */ | ||
| 442 | #define ICR_IUE (1 << 6) /* unit enable */ | ||
| 443 | #define ICR_GCD (1 << 7) /* general call disable */ | ||
| 444 | #define ICR_ITEIE (1 << 8) /* enable tx interrupts */ | ||
| 445 | #define ICR_IRFIE (1 << 9) /* enable rx interrupts */ | ||
| 446 | #define ICR_BEIE (1 << 10) /* enable bus error ints */ | ||
| 447 | #define ICR_SSDIE (1 << 11) /* slave STOP detected int enable */ | ||
| 448 | #define ICR_ALDIE (1 << 12) /* enable arbitration interrupt */ | ||
| 449 | #define ICR_SADIE (1 << 13) /* slave address detected int enable */ | ||
| 450 | #define ICR_UR (1 << 14) /* unit reset */ | ||
| 451 | |||
| 452 | #define ISR_RWM (1 << 0) /* read/write mode */ | ||
| 453 | #define ISR_ACKNAK (1 << 1) /* ack/nak status */ | ||
| 454 | #define ISR_UB (1 << 2) /* unit busy */ | ||
| 455 | #define ISR_IBB (1 << 3) /* bus busy */ | ||
| 456 | #define ISR_SSD (1 << 4) /* slave stop detected */ | ||
| 457 | #define ISR_ALD (1 << 5) /* arbitration loss detected */ | ||
| 458 | #define ISR_ITE (1 << 6) /* tx buffer empty */ | ||
| 459 | #define ISR_IRF (1 << 7) /* rx buffer full */ | ||
| 460 | #define ISR_GCAD (1 << 8) /* general call address detected */ | ||
| 461 | #define ISR_SAD (1 << 9) /* slave address detected */ | ||
| 462 | #define ISR_BED (1 << 10) /* bus error no ACK/NAK */ | ||
| 463 | |||
| 464 | |||
| 465 | /* | 271 | /* |
| 466 | * Serial Audio Controller | 272 | * Serial Audio Controller - moved into sound/soc/pxa/pxa2xx-i2s.c |
| 467 | */ | 273 | */ |
| 468 | 274 | ||
| 469 | #define SACR0 __REG(0x40400000) /* Global Control Register */ | ||
| 470 | #define SACR1 __REG(0x40400004) /* Serial Audio I 2 S/MSB-Justified Control Register */ | ||
| 471 | #define SASR0 __REG(0x4040000C) /* Serial Audio I 2 S/MSB-Justified Interface and FIFO Status Register */ | ||
| 472 | #define SAIMR __REG(0x40400014) /* Serial Audio Interrupt Mask Register */ | ||
| 473 | #define SAICR __REG(0x40400018) /* Serial Audio Interrupt Clear Register */ | ||
| 474 | #define SADIV __REG(0x40400060) /* Audio Clock Divider Register. */ | ||
| 475 | #define SADR __REG(0x40400080) /* Serial Audio Data Register (TX and RX FIFO access Register). */ | ||
| 476 | |||
| 477 | #define SACR0_RFTH(x) ((x) << 12) /* Rx FIFO Interrupt or DMA Trigger Threshold */ | ||
| 478 | #define SACR0_TFTH(x) ((x) << 8) /* Tx FIFO Interrupt or DMA Trigger Threshold */ | ||
| 479 | #define SACR0_STRF (1 << 5) /* FIFO Select for EFWR Special Function */ | ||
| 480 | #define SACR0_EFWR (1 << 4) /* Enable EFWR Function */ | ||
| 481 | #define SACR0_RST (1 << 3) /* FIFO, i2s Register Reset */ | ||
| 482 | #define SACR0_BCKD (1 << 2) /* Bit Clock Direction */ | ||
| 483 | #define SACR0_ENB (1 << 0) /* Enable I2S Link */ | ||
| 484 | #define SACR1_ENLBF (1 << 5) /* Enable Loopback */ | ||
| 485 | #define SACR1_DRPL (1 << 4) /* Disable Replaying Function */ | ||
| 486 | #define SACR1_DREC (1 << 3) /* Disable Recording Function */ | ||
| 487 | #define SACR1_AMSL (1 << 0) /* Specify Alternate Mode */ | ||
| 488 | |||
| 489 | #define SASR0_I2SOFF (1 << 7) /* Controller Status */ | ||
| 490 | #define SASR0_ROR (1 << 6) /* Rx FIFO Overrun */ | ||
| 491 | #define SASR0_TUR (1 << 5) /* Tx FIFO Underrun */ | ||
| 492 | #define SASR0_RFS (1 << 4) /* Rx FIFO Service Request */ | ||
| 493 | #define SASR0_TFS (1 << 3) /* Tx FIFO Service Request */ | ||
| 494 | #define SASR0_BSY (1 << 2) /* I2S Busy */ | ||
| 495 | #define SASR0_RNE (1 << 1) /* Rx FIFO Not Empty */ | ||
| 496 | #define SASR0_TNF (1 << 0) /* Tx FIFO Not Empty */ | ||
| 497 | |||
| 498 | #define SAICR_ROR (1 << 6) /* Clear Rx FIFO Overrun Interrupt */ | ||
| 499 | #define SAICR_TUR (1 << 5) /* Clear Tx FIFO Underrun Interrupt */ | ||
| 500 | |||
| 501 | #define SAIMR_ROR (1 << 6) /* Enable Rx FIFO Overrun Condition Interrupt */ | ||
| 502 | #define SAIMR_TUR (1 << 5) /* Enable Tx FIFO Underrun Condition Interrupt */ | ||
| 503 | #define SAIMR_RFS (1 << 4) /* Enable Rx FIFO Service Interrupt */ | ||
| 504 | #define SAIMR_TFS (1 << 3) /* Enable Tx FIFO Service Interrupt */ | ||
| 505 | |||
| 506 | /* | 275 | /* |
| 507 | * AC97 Controller registers | 276 | * AC97 Controller registers |
| 508 | */ | 277 | */ |
| @@ -989,77 +758,6 @@ | |||
| 989 | 758 | ||
| 990 | #endif | 759 | #endif |
| 991 | 760 | ||
| 992 | #if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx) | ||
| 993 | /* | ||
| 994 | * UHC: USB Host Controller (OHCI-like) register definitions | ||
| 995 | */ | ||
| 996 | #define UHC_BASE_PHYS (0x4C000000) | ||
| 997 | #define UHCREV __REG(0x4C000000) /* UHC HCI Spec Revision */ | ||
| 998 | #define UHCHCON __REG(0x4C000004) /* UHC Host Control Register */ | ||
| 999 | #define UHCCOMS __REG(0x4C000008) /* UHC Command Status Register */ | ||
| 1000 | #define UHCINTS __REG(0x4C00000C) /* UHC Interrupt Status Register */ | ||
| 1001 | #define UHCINTE __REG(0x4C000010) /* UHC Interrupt Enable */ | ||
| 1002 | #define UHCINTD __REG(0x4C000014) /* UHC Interrupt Disable */ | ||
| 1003 | #define UHCHCCA __REG(0x4C000018) /* UHC Host Controller Comm. Area */ | ||
| 1004 | #define UHCPCED __REG(0x4C00001C) /* UHC Period Current Endpt Descr */ | ||
| 1005 | #define UHCCHED __REG(0x4C000020) /* UHC Control Head Endpt Descr */ | ||
| 1006 | #define UHCCCED __REG(0x4C000024) /* UHC Control Current Endpt Descr */ | ||
| 1007 | #define UHCBHED __REG(0x4C000028) /* UHC Bulk Head Endpt Descr */ | ||
| 1008 | #define UHCBCED __REG(0x4C00002C) /* UHC Bulk Current Endpt Descr */ | ||
| 1009 | #define UHCDHEAD __REG(0x4C000030) /* UHC Done Head */ | ||
| 1010 | #define UHCFMI __REG(0x4C000034) /* UHC Frame Interval */ | ||
| 1011 | #define UHCFMR __REG(0x4C000038) /* UHC Frame Remaining */ | ||
| 1012 | #define UHCFMN __REG(0x4C00003C) /* UHC Frame Number */ | ||
| 1013 | #define UHCPERS __REG(0x4C000040) /* UHC Periodic Start */ | ||
| 1014 | #define UHCLS __REG(0x4C000044) /* UHC Low Speed Threshold */ | ||
| 1015 | |||
| 1016 | #define UHCRHDA __REG(0x4C000048) /* UHC Root Hub Descriptor A */ | ||
| 1017 | #define UHCRHDA_NOCP (1 << 12) /* No over current protection */ | ||
| 1018 | |||
| 1019 | #define UHCRHDB __REG(0x4C00004C) /* UHC Root Hub Descriptor B */ | ||
| 1020 | #define UHCRHS __REG(0x4C000050) /* UHC Root Hub Status */ | ||
| 1021 | #define UHCRHPS1 __REG(0x4C000054) /* UHC Root Hub Port 1 Status */ | ||
| 1022 | #define UHCRHPS2 __REG(0x4C000058) /* UHC Root Hub Port 2 Status */ | ||
| 1023 | #define UHCRHPS3 __REG(0x4C00005C) /* UHC Root Hub Port 3 Status */ | ||
| 1024 | |||
| 1025 | #define UHCSTAT __REG(0x4C000060) /* UHC Status Register */ | ||
| 1026 | #define UHCSTAT_UPS3 (1 << 16) /* USB Power Sense Port3 */ | ||
| 1027 | #define UHCSTAT_SBMAI (1 << 15) /* System Bus Master Abort Interrupt*/ | ||
| 1028 | #define UHCSTAT_SBTAI (1 << 14) /* System Bus Target Abort Interrupt*/ | ||
| 1029 | #define UHCSTAT_UPRI (1 << 13) /* USB Port Resume Interrupt */ | ||
| 1030 | #define UHCSTAT_UPS2 (1 << 12) /* USB Power Sense Port 2 */ | ||
| 1031 | #define UHCSTAT_UPS1 (1 << 11) /* USB Power Sense Port 1 */ | ||
| 1032 | #define UHCSTAT_HTA (1 << 10) /* HCI Target Abort */ | ||
| 1033 | #define UHCSTAT_HBA (1 << 8) /* HCI Buffer Active */ | ||
| 1034 | #define UHCSTAT_RWUE (1 << 7) /* HCI Remote Wake Up Event */ | ||
| 1035 | |||
| 1036 | #define UHCHR __REG(0x4C000064) /* UHC Reset Register */ | ||
| 1037 | #define UHCHR_SSEP3 (1 << 11) /* Sleep Standby Enable for Port3 */ | ||
| 1038 | #define UHCHR_SSEP2 (1 << 10) /* Sleep Standby Enable for Port2 */ | ||
| 1039 | #define UHCHR_SSEP1 (1 << 9) /* Sleep Standby Enable for Port1 */ | ||
| 1040 | #define UHCHR_PCPL (1 << 7) /* Power control polarity low */ | ||
| 1041 | #define UHCHR_PSPL (1 << 6) /* Power sense polarity low */ | ||
| 1042 | #define UHCHR_SSE (1 << 5) /* Sleep Standby Enable */ | ||
| 1043 | #define UHCHR_UIT (1 << 4) /* USB Interrupt Test */ | ||
| 1044 | #define UHCHR_SSDC (1 << 3) /* Simulation Scale Down Clock */ | ||
| 1045 | #define UHCHR_CGR (1 << 2) /* Clock Generation Reset */ | ||
| 1046 | #define UHCHR_FHR (1 << 1) /* Force Host Controller Reset */ | ||
| 1047 | #define UHCHR_FSBIR (1 << 0) /* Force System Bus Iface Reset */ | ||
| 1048 | |||
| 1049 | #define UHCHIE __REG(0x4C000068) /* UHC Interrupt Enable Register*/ | ||
| 1050 | #define UHCHIE_UPS3IE (1 << 14) /* Power Sense Port3 IntEn */ | ||
| 1051 | #define UHCHIE_UPRIE (1 << 13) /* Port Resume IntEn */ | ||
| 1052 | #define UHCHIE_UPS2IE (1 << 12) /* Power Sense Port2 IntEn */ | ||
| 1053 | #define UHCHIE_UPS1IE (1 << 11) /* Power Sense Port1 IntEn */ | ||
| 1054 | #define UHCHIE_TAIE (1 << 10) /* HCI Interface Transfer Abort | ||
| 1055 | Interrupt Enable*/ | ||
| 1056 | #define UHCHIE_HBAIE (1 << 8) /* HCI Buffer Active IntEn */ | ||
| 1057 | #define UHCHIE_RWIE (1 << 7) /* Remote Wake-up IntEn */ | ||
| 1058 | |||
| 1059 | #define UHCHIT __REG(0x4C00006C) /* UHC Interrupt Test register */ | ||
| 1060 | |||
| 1061 | #endif /* CONFIG_PXA27x || CONFIG_PXA3xx */ | ||
| 1062 | |||
| 1063 | /* PWRMODE register M field values */ | 761 | /* PWRMODE register M field values */ |
| 1064 | 762 | ||
| 1065 | #define PWRMODE_IDLE 0x1 | 763 | #define PWRMODE_IDLE 0x1 |
diff --git a/arch/arm/mach-pxa/include/mach/pxa3xx-regs.h b/arch/arm/mach-pxa/include/mach/pxa3xx-regs.h index 39eb68319e28..b1fcd10ab6c6 100644 --- a/arch/arm/mach-pxa/include/mach/pxa3xx-regs.h +++ b/arch/arm/mach-pxa/include/mach/pxa3xx-regs.h | |||
| @@ -131,6 +131,28 @@ | |||
| 131 | #define CKENB __REG(0x41340010) /* B Clock Enable Register */ | 131 | #define CKENB __REG(0x41340010) /* B Clock Enable Register */ |
| 132 | #define AC97_DIV __REG(0x41340014) /* AC97 clock divisor value register */ | 132 | #define AC97_DIV __REG(0x41340014) /* AC97 clock divisor value register */ |
| 133 | 133 | ||
| 134 | #define ACCR_XPDIS (1 << 31) /* Core PLL Output Disable */ | ||
| 135 | #define ACCR_SPDIS (1 << 30) /* System PLL Output Disable */ | ||
| 136 | #define ACCR_D0CS (1 << 26) /* D0 Mode Clock Select */ | ||
| 137 | #define ACCR_PCCE (1 << 11) /* Power Mode Change Clock Enable */ | ||
| 138 | #define ACCR_DDR_D0CS (1 << 7) /* DDR SDRAM clock frequency in D0CS (PXA31x only) */ | ||
| 139 | |||
| 140 | #define ACCR_SMCFS_MASK (0x7 << 23) /* Static Memory Controller Frequency Select */ | ||
| 141 | #define ACCR_SFLFS_MASK (0x3 << 18) /* Frequency Select for Internal Memory Controller */ | ||
| 142 | #define ACCR_XSPCLK_MASK (0x3 << 16) /* Core Frequency during Frequency Change */ | ||
| 143 | #define ACCR_HSS_MASK (0x3 << 14) /* System Bus-Clock Frequency Select */ | ||
| 144 | #define ACCR_DMCFS_MASK (0x3 << 12) /* Dynamic Memory Controller Clock Frequency Select */ | ||
| 145 | #define ACCR_XN_MASK (0x7 << 8) /* Core PLL Turbo-Mode-to-Run-Mode Ratio */ | ||
| 146 | #define ACCR_XL_MASK (0x1f) /* Core PLL Run-Mode-to-Oscillator Ratio */ | ||
| 147 | |||
| 148 | #define ACCR_SMCFS(x) (((x) & 0x7) << 23) | ||
| 149 | #define ACCR_SFLFS(x) (((x) & 0x3) << 18) | ||
| 150 | #define ACCR_XSPCLK(x) (((x) & 0x3) << 16) | ||
| 151 | #define ACCR_HSS(x) (((x) & 0x3) << 14) | ||
| 152 | #define ACCR_DMCFS(x) (((x) & 0x3) << 12) | ||
| 153 | #define ACCR_XN(x) (((x) & 0x7) << 8) | ||
| 154 | #define ACCR_XL(x) ((x) & 0x1f) | ||
| 155 | |||
| 134 | /* | 156 | /* |
| 135 | * Clock Enable Bit | 157 | * Clock Enable Bit |
| 136 | */ | 158 | */ |
diff --git a/arch/arm/mach-pxa/include/mach/spitz.h b/arch/arm/mach-pxa/include/mach/spitz.h index bd14365f7ed5..31ac26b55bc1 100644 --- a/arch/arm/mach-pxa/include/mach/spitz.h +++ b/arch/arm/mach-pxa/include/mach/spitz.h | |||
| @@ -16,6 +16,7 @@ | |||
| 16 | #endif | 16 | #endif |
| 17 | 17 | ||
| 18 | #include <linux/fb.h> | 18 | #include <linux/fb.h> |
| 19 | #include <linux/gpio.h> | ||
| 19 | 20 | ||
| 20 | /* Spitz/Akita GPIOs */ | 21 | /* Spitz/Akita GPIOs */ |
| 21 | 22 | ||
| @@ -100,13 +101,24 @@ | |||
| 100 | #define SPITZ_SCP_JK_A SCOOP_GPCR_PA18 /* Low */ | 101 | #define SPITZ_SCP_JK_A SCOOP_GPCR_PA18 /* Low */ |
| 101 | #define SPITZ_SCP_ADC_TEMP_ON SCOOP_GPCR_PA19 /* Low */ | 102 | #define SPITZ_SCP_ADC_TEMP_ON SCOOP_GPCR_PA19 /* Low */ |
| 102 | 103 | ||
| 103 | #define SPITZ_SCP_IO_DIR (SPITZ_SCP_LED_GREEN | SPITZ_SCP_JK_B | SPITZ_SCP_CHRG_ON | \ | 104 | #define SPITZ_SCP_IO_DIR (SPITZ_SCP_JK_B | SPITZ_SCP_CHRG_ON | \ |
| 104 | SPITZ_SCP_MUTE_L | SPITZ_SCP_MUTE_R | SPITZ_SCP_LED_ORANGE | \ | 105 | SPITZ_SCP_MUTE_L | SPITZ_SCP_MUTE_R | \ |
| 105 | SPITZ_SCP_CF_POWER | SPITZ_SCP_JK_A | SPITZ_SCP_ADC_TEMP_ON) | 106 | SPITZ_SCP_CF_POWER | SPITZ_SCP_JK_A | SPITZ_SCP_ADC_TEMP_ON) |
| 106 | #define SPITZ_SCP_IO_OUT (SPITZ_SCP_CHRG_ON | SPITZ_SCP_MUTE_L | SPITZ_SCP_MUTE_R) | 107 | #define SPITZ_SCP_IO_OUT (SPITZ_SCP_CHRG_ON | SPITZ_SCP_MUTE_L | SPITZ_SCP_MUTE_R) |
| 107 | #define SPITZ_SCP_SUS_CLR (SPITZ_SCP_MUTE_L | SPITZ_SCP_MUTE_R | SPITZ_SCP_JK_A | SPITZ_SCP_ADC_TEMP_ON) | 108 | #define SPITZ_SCP_SUS_CLR (SPITZ_SCP_MUTE_L | SPITZ_SCP_MUTE_R | SPITZ_SCP_JK_A | SPITZ_SCP_ADC_TEMP_ON) |
| 108 | #define SPITZ_SCP_SUS_SET 0 | 109 | #define SPITZ_SCP_SUS_SET 0 |
| 109 | 110 | ||
| 111 | #define SPITZ_SCP_GPIO_BASE (NR_BUILTIN_GPIO) | ||
| 112 | #define SPITZ_GPIO_LED_GREEN (SPITZ_SCP_GPIO_BASE + 0) | ||
| 113 | #define SPITZ_GPIO_JK_B (SPITZ_SCP_GPIO_BASE + 1) | ||
| 114 | #define SPITZ_GPIO_CHRG_ON (SPITZ_SCP_GPIO_BASE + 2) | ||
| 115 | #define SPITZ_GPIO_MUTE_L (SPITZ_SCP_GPIO_BASE + 3) | ||
| 116 | #define SPITZ_GPIO_MUTE_R (SPITZ_SCP_GPIO_BASE + 4) | ||
| 117 | #define SPITZ_GPIO_CF_POWER (SPITZ_SCP_GPIO_BASE + 5) | ||
| 118 | #define SPITZ_GPIO_LED_ORANGE (SPITZ_SCP_GPIO_BASE + 6) | ||
| 119 | #define SPITZ_GPIO_JK_A (SPITZ_SCP_GPIO_BASE + 7) | ||
| 120 | #define SPITZ_GPIO_ADC_TEMP_ON (SPITZ_SCP_GPIO_BASE + 8) | ||
| 121 | |||
| 110 | /* Spitz Scoop Device (No. 2) GPIOs */ | 122 | /* Spitz Scoop Device (No. 2) GPIOs */ |
| 111 | /* Suspend States in comments */ | 123 | /* Suspend States in comments */ |
| 112 | #define SPITZ_SCP2_IR_ON SCOOP_GPCR_PA11 /* High */ | 124 | #define SPITZ_SCP2_IR_ON SCOOP_GPCR_PA11 /* High */ |
| @@ -119,15 +131,36 @@ | |||
| 119 | #define SPITZ_SCP2_BACKLIGHT_ON SCOOP_GPCR_PA18 /* Low */ | 131 | #define SPITZ_SCP2_BACKLIGHT_ON SCOOP_GPCR_PA18 /* Low */ |
| 120 | #define SPITZ_SCP2_MIC_BIAS SCOOP_GPCR_PA19 /* Low */ | 132 | #define SPITZ_SCP2_MIC_BIAS SCOOP_GPCR_PA19 /* Low */ |
| 121 | 133 | ||
| 122 | #define SPITZ_SCP2_IO_DIR (SPITZ_SCP2_IR_ON | SPITZ_SCP2_AKIN_PULLUP | SPITZ_SCP2_RESERVED_1 | \ | 134 | #define SPITZ_SCP2_IO_DIR (SPITZ_SCP2_AKIN_PULLUP | SPITZ_SCP2_RESERVED_1 | \ |
| 123 | SPITZ_SCP2_RESERVED_2 | SPITZ_SCP2_RESERVED_3 | SPITZ_SCP2_RESERVED_4 | \ | 135 | SPITZ_SCP2_RESERVED_2 | SPITZ_SCP2_RESERVED_3 | SPITZ_SCP2_RESERVED_4 | \ |
| 124 | SPITZ_SCP2_BACKLIGHT_CONT | SPITZ_SCP2_BACKLIGHT_ON | SPITZ_SCP2_MIC_BIAS) | 136 | SPITZ_SCP2_BACKLIGHT_CONT | SPITZ_SCP2_BACKLIGHT_ON | SPITZ_SCP2_MIC_BIAS) |
| 125 | 137 | ||
| 126 | #define SPITZ_SCP2_IO_OUT (SPITZ_SCP2_IR_ON | SPITZ_SCP2_AKIN_PULLUP | SPITZ_SCP2_RESERVED_1) | 138 | #define SPITZ_SCP2_IO_OUT (SPITZ_SCP2_AKIN_PULLUP | SPITZ_SCP2_RESERVED_1) |
| 127 | #define SPITZ_SCP2_SUS_CLR (SPITZ_SCP2_RESERVED_2 | SPITZ_SCP2_RESERVED_3 | SPITZ_SCP2_RESERVED_4 | \ | 139 | #define SPITZ_SCP2_SUS_CLR (SPITZ_SCP2_RESERVED_2 | SPITZ_SCP2_RESERVED_3 | SPITZ_SCP2_RESERVED_4 | \ |
| 128 | SPITZ_SCP2_BACKLIGHT_CONT | SPITZ_SCP2_BACKLIGHT_ON | SPITZ_SCP2_MIC_BIAS) | 140 | SPITZ_SCP2_BACKLIGHT_CONT | SPITZ_SCP2_BACKLIGHT_ON | SPITZ_SCP2_MIC_BIAS) |
| 129 | #define SPITZ_SCP2_SUS_SET (SPITZ_SCP2_IR_ON | SPITZ_SCP2_RESERVED_1) | 141 | #define SPITZ_SCP2_SUS_SET (SPITZ_SCP2_IR_ON | SPITZ_SCP2_RESERVED_1) |
| 130 | 142 | ||
| 143 | #define SPITZ_SCP2_GPIO_BASE (NR_BUILTIN_GPIO + 12) | ||
| 144 | #define SPITZ_GPIO_IR_ON (SPITZ_SCP2_GPIO_BASE + 0) | ||
| 145 | #define SPITZ_GPIO_AKIN_PULLUP (SPITZ_SCP2_GPIO_BASE + 1 | ||
| 146 | #define SPITZ_GPIO_RESERVED_1 (SPITZ_SCP2_GPIO_BASE + 2) | ||
| 147 | #define SPITZ_GPIO_RESERVED_2 (SPITZ_SCP2_GPIO_BASE + 3) | ||
| 148 | #define SPITZ_GPIO_RESERVED_3 (SPITZ_SCP2_GPIO_BASE + 4) | ||
| 149 | #define SPITZ_GPIO_RESERVED_4 (SPITZ_SCP2_GPIO_BASE + 5) | ||
| 150 | #define SPITZ_GPIO_BACKLIGHT_CONT (SPITZ_SCP2_GPIO_BASE + 6) | ||
| 151 | #define SPITZ_GPIO_BACKLIGHT_ON (SPITZ_SCP2_GPIO_BASE + 7) | ||
| 152 | #define SPITZ_GPIO_MIC_BIAS (SPITZ_SCP2_GPIO_BASE + 8) | ||
| 153 | |||
| 154 | /* Akita IO Expander GPIOs */ | ||
| 155 | #define AKITA_IOEXP_GPIO_BASE (NR_BUILTIN_GPIO + 12) | ||
| 156 | #define AKITA_GPIO_RESERVED_0 (AKITA_IOEXP_GPIO_BASE + 0) | ||
| 157 | #define AKITA_GPIO_RESERVED_1 (AKITA_IOEXP_GPIO_BASE + 1) | ||
| 158 | #define AKITA_GPIO_MIC_BIAS (AKITA_IOEXP_GPIO_BASE + 2) | ||
| 159 | #define AKITA_GPIO_BACKLIGHT_ON (AKITA_IOEXP_GPIO_BASE + 3) | ||
| 160 | #define AKITA_GPIO_BACKLIGHT_CONT (AKITA_IOEXP_GPIO_BASE + 4) | ||
| 161 | #define AKITA_GPIO_AKIN_PULLUP (AKITA_IOEXP_GPIO_BASE + 5) | ||
| 162 | #define AKITA_GPIO_IR_ON (AKITA_IOEXP_GPIO_BASE + 6) | ||
| 163 | #define AKITA_GPIO_RESERVED_7 (AKITA_IOEXP_GPIO_BASE + 7) | ||
| 131 | 164 | ||
| 132 | /* Spitz IRQ Definitions */ | 165 | /* Spitz IRQ Definitions */ |
| 133 | 166 | ||
| @@ -154,5 +187,4 @@ | |||
| 154 | */ | 187 | */ |
| 155 | extern struct platform_device spitzscoop_device; | 188 | extern struct platform_device spitzscoop_device; |
| 156 | extern struct platform_device spitzscoop2_device; | 189 | extern struct platform_device spitzscoop2_device; |
| 157 | extern struct platform_device spitzssp_device; | ||
| 158 | extern struct sharpsl_charger_machinfo spitz_pm_machinfo; | 190 | extern struct sharpsl_charger_machinfo spitz_pm_machinfo; |
diff --git a/arch/arm/mach-pxa/include/mach/ssp.h b/arch/arm/mach-pxa/include/mach/ssp.h index a012882c9ee6..cb5cb766f0f1 100644 --- a/arch/arm/mach-pxa/include/mach/ssp.h +++ b/arch/arm/mach-pxa/include/mach/ssp.h | |||
| @@ -20,6 +20,7 @@ | |||
| 20 | #define __ASM_ARCH_SSP_H | 20 | #define __ASM_ARCH_SSP_H |
| 21 | 21 | ||
| 22 | #include <linux/list.h> | 22 | #include <linux/list.h> |
| 23 | #include <linux/io.h> | ||
| 23 | 24 | ||
| 24 | enum pxa_ssp_type { | 25 | enum pxa_ssp_type { |
| 25 | SSP_UNDEFINED = 0, | 26 | SSP_UNDEFINED = 0, |
| @@ -78,6 +79,29 @@ int ssp_init(struct ssp_dev *dev, u32 port, u32 init_flags); | |||
| 78 | int ssp_config(struct ssp_dev *dev, u32 mode, u32 flags, u32 psp_flags, u32 speed); | 79 | int ssp_config(struct ssp_dev *dev, u32 mode, u32 flags, u32 psp_flags, u32 speed); |
| 79 | void ssp_exit(struct ssp_dev *dev); | 80 | void ssp_exit(struct ssp_dev *dev); |
| 80 | 81 | ||
| 82 | /** | ||
| 83 | * ssp_write_reg - Write to a SSP register | ||
| 84 | * | ||
| 85 | * @dev: SSP device to access | ||
| 86 | * @reg: Register to write to | ||
| 87 | * @val: Value to be written. | ||
| 88 | */ | ||
| 89 | static inline void ssp_write_reg(struct ssp_device *dev, u32 reg, u32 val) | ||
| 90 | { | ||
| 91 | __raw_writel(val, dev->mmio_base + reg); | ||
| 92 | } | ||
| 93 | |||
| 94 | /** | ||
| 95 | * ssp_read_reg - Read from a SSP register | ||
| 96 | * | ||
| 97 | * @dev: SSP device to access | ||
| 98 | * @reg: Register to read from | ||
| 99 | */ | ||
| 100 | static inline u32 ssp_read_reg(struct ssp_device *dev, u32 reg) | ||
| 101 | { | ||
| 102 | return __raw_readl(dev->mmio_base + reg); | ||
| 103 | } | ||
| 104 | |||
| 81 | struct ssp_device *ssp_request(int port, const char *label); | 105 | struct ssp_device *ssp_request(int port, const char *label); |
| 82 | void ssp_free(struct ssp_device *); | 106 | void ssp_free(struct ssp_device *); |
| 83 | #endif /* __ASM_ARCH_SSP_H */ | 107 | #endif /* __ASM_ARCH_SSP_H */ |
diff --git a/arch/arm/mach-pxa/include/mach/trizeps4.h b/arch/arm/mach-pxa/include/mach/trizeps4.h index 641d0ec110bb..903e1a2e6641 100644 --- a/arch/arm/mach-pxa/include/mach/trizeps4.h +++ b/arch/arm/mach-pxa/include/mach/trizeps4.h | |||
| @@ -17,11 +17,16 @@ | |||
| 17 | #define TRIZEPS4_PIC_PHYS (PXA_CS3_PHYS) /* Logic chip on ConXS-Board */ | 17 | #define TRIZEPS4_PIC_PHYS (PXA_CS3_PHYS) /* Logic chip on ConXS-Board */ |
| 18 | #define TRIZEPS4_SDRAM_BASE 0xa0000000 /* SDRAM region */ | 18 | #define TRIZEPS4_SDRAM_BASE 0xa0000000 /* SDRAM region */ |
| 19 | 19 | ||
| 20 | #define TRIZEPS4_CFSR_PHYS (PXA_CS3_PHYS) /* Logic chip on ConXS-Board CSFR register */ | 20 | /* Logic on ConXS-board CSFR register*/ |
| 21 | #define TRIZEPS4_BOCR_PHYS (PXA_CS3_PHYS+0x02000000) /* Logic chip on ConXS-Board BOCR register */ | 21 | #define TRIZEPS4_CFSR_PHYS (PXA_CS3_PHYS) |
| 22 | #define TRIZEPS4_IRCR_PHYS (PXA_CS3_PHYS+0x02400000) /* Logic chip on ConXS-Board IRCR register*/ | 22 | /* Logic on ConXS-board BOCR register*/ |
| 23 | #define TRIZEPS4_UPSR_PHYS (PXA_CS3_PHYS+0x02800000) /* Logic chip on ConXS-Board UPSR register*/ | 23 | #define TRIZEPS4_BOCR_PHYS (PXA_CS3_PHYS+0x02000000) |
| 24 | #define TRIZEPS4_DICR_PHYS (PXA_CS3_PHYS+0x03800000) /* Logic chip on ConXS-Board DICR register*/ | 24 | /* Logic on ConXS-board IRCR register*/ |
| 25 | #define TRIZEPS4_IRCR_PHYS (PXA_CS3_PHYS+0x02400000) | ||
| 26 | /* Logic on ConXS-board UPSR register*/ | ||
| 27 | #define TRIZEPS4_UPSR_PHYS (PXA_CS3_PHYS+0x02800000) | ||
| 28 | /* Logic on ConXS-board DICR register*/ | ||
| 29 | #define TRIZEPS4_DICR_PHYS (PXA_CS3_PHYS+0x03800000) | ||
| 25 | 30 | ||
| 26 | /* virtual memory regions */ | 31 | /* virtual memory regions */ |
| 27 | #define TRIZEPS4_DISK_VIRT 0xF0000000 /* Disk On Chip region */ | 32 | #define TRIZEPS4_DISK_VIRT 0xF0000000 /* Disk On Chip region */ |
| @@ -54,6 +59,15 @@ | |||
| 54 | #define GPIO_MMC_DET 12 | 59 | #define GPIO_MMC_DET 12 |
| 55 | #define TRIZEPS4_MMC_IRQ IRQ_GPIO(GPIO_MMC_DET) | 60 | #define TRIZEPS4_MMC_IRQ IRQ_GPIO(GPIO_MMC_DET) |
| 56 | 61 | ||
| 62 | /* DOC NAND chip */ | ||
| 63 | #define GPIO_DOC_LOCK 94 | ||
| 64 | #define GPIO_DOC_IRQ 93 | ||
| 65 | #define TRIZEPS4_DOC_IRQ IRQ_GPIO(GPIO_DOC_IRQ) | ||
| 66 | |||
| 67 | /* SPI interface */ | ||
| 68 | #define GPIO_SPI 53 | ||
| 69 | #define TRIZEPS4_SPI_IRQ IRQ_GPIO(GPIO_SPI) | ||
| 70 | |||
| 57 | /* LEDS using tx2 / rx2 */ | 71 | /* LEDS using tx2 / rx2 */ |
| 58 | #define GPIO_SYS_BUSY_LED 46 | 72 | #define GPIO_SYS_BUSY_LED 46 |
| 59 | #define GPIO_HEARTBEAT_LED 47 | 73 | #define GPIO_HEARTBEAT_LED 47 |
| @@ -62,24 +76,66 @@ | |||
| 62 | #define GPIO_PIC 0 | 76 | #define GPIO_PIC 0 |
| 63 | #define TRIZEPS4_PIC_IRQ IRQ_GPIO(GPIO_PIC) | 77 | #define TRIZEPS4_PIC_IRQ IRQ_GPIO(GPIO_PIC) |
| 64 | 78 | ||
| 65 | #define CFSR_P2V(x) ((x) - TRIZEPS4_CFSR_PHYS + TRIZEPS4_CFSR_VIRT) | 79 | #ifdef CONFIG_MACH_TRIZEPS_CONXS |
| 66 | #define CFSR_V2P(x) ((x) - TRIZEPS4_CFSR_VIRT + TRIZEPS4_CFSR_PHYS) | 80 | /* for CONXS base board define these registers */ |
| 81 | #define CFSR_P2V(x) ((x) - TRIZEPS4_CFSR_PHYS + TRIZEPS4_CFSR_VIRT) | ||
| 82 | #define CFSR_V2P(x) ((x) - TRIZEPS4_CFSR_VIRT + TRIZEPS4_CFSR_PHYS) | ||
| 67 | 83 | ||
| 68 | #define BCR_P2V(x) ((x) - TRIZEPS4_BOCR_PHYS + TRIZEPS4_BOCR_VIRT) | 84 | #define BCR_P2V(x) ((x) - TRIZEPS4_BOCR_PHYS + TRIZEPS4_BOCR_VIRT) |
| 69 | #define BCR_V2P(x) ((x) - TRIZEPS4_BOCR_VIRT + TRIZEPS4_BOCR_PHYS) | 85 | #define BCR_V2P(x) ((x) - TRIZEPS4_BOCR_VIRT + TRIZEPS4_BOCR_PHYS) |
| 70 | 86 | ||
| 71 | #define DCR_P2V(x) ((x) - TRIZEPS4_DICR_PHYS + TRIZEPS4_DICR_VIRT) | 87 | #define DCR_P2V(x) ((x) - TRIZEPS4_DICR_PHYS + TRIZEPS4_DICR_VIRT) |
| 72 | #define DCR_V2P(x) ((x) - TRIZEPS4_DICR_VIRT + TRIZEPS4_DICR_PHYS) | 88 | #define DCR_V2P(x) ((x) - TRIZEPS4_DICR_VIRT + TRIZEPS4_DICR_PHYS) |
| 89 | |||
| 90 | #define IRCR_P2V(x) ((x) - TRIZEPS4_IRCR_PHYS + TRIZEPS4_IRCR_VIRT) | ||
| 91 | #define IRCR_V2P(x) ((x) - TRIZEPS4_IRCR_VIRT + TRIZEPS4_IRCR_PHYS) | ||
| 73 | 92 | ||
| 74 | #ifndef __ASSEMBLY__ | 93 | #ifndef __ASSEMBLY__ |
| 75 | #define ConXS_CFSR (*((volatile unsigned short *)CFSR_P2V(0x0C000000))) | 94 | static inline unsigned short CFSR_readw(void) |
| 76 | #define ConXS_BCR (*((volatile unsigned short *)BCR_P2V(0x0E000000))) | 95 | { |
| 77 | #define ConXS_DCR (*((volatile unsigned short *)DCR_P2V(0x0F800000))) | 96 | /* [Compact Flash Status Register] is read only */ |
| 97 | return *((unsigned short *)CFSR_P2V(0x0C000000)); | ||
| 98 | } | ||
| 99 | static inline void BCR_writew(unsigned short value) | ||
| 100 | { | ||
| 101 | /* [Board Control Regsiter] is write only */ | ||
| 102 | *((unsigned short *)BCR_P2V(0x0E000000)) = value; | ||
| 103 | } | ||
| 104 | static inline void DCR_writew(unsigned short value) | ||
| 105 | { | ||
| 106 | /* [Display Control Register] is write only */ | ||
| 107 | *((unsigned short *)DCR_P2V(0x0E000000)) = value; | ||
| 108 | } | ||
| 109 | static inline void IRCR_writew(unsigned short value) | ||
| 110 | { | ||
| 111 | /* [InfraRed data Control Register] is write only */ | ||
| 112 | *((unsigned short *)IRCR_P2V(0x0E000000)) = value; | ||
| 113 | } | ||
| 78 | #else | 114 | #else |
| 79 | #define ConXS_CFSR CFSR_P2V(0x0C000000) | 115 | #define ConXS_CFSR CFSR_P2V(0x0C000000) |
| 80 | #define ConXS_BCR BCR_P2V(0x0E000000) | 116 | #define ConXS_BCR BCR_P2V(0x0E000000) |
| 81 | #define ConXS_DCR DCR_P2V(0x0F800000) | 117 | #define ConXS_DCR DCR_P2V(0x0F800000) |
| 118 | #define ConXS_IRCR IRCR_P2V(0x0F800000) | ||
| 82 | #endif | 119 | #endif |
| 120 | #else | ||
| 121 | /* for whatever baseboard define function registers */ | ||
| 122 | static inline unsigned short CFSR_readw(void) | ||
| 123 | { | ||
| 124 | return 0; | ||
| 125 | } | ||
| 126 | static inline void BCR_writew(unsigned short value) | ||
| 127 | { | ||
| 128 | ; | ||
| 129 | } | ||
| 130 | static inline void DCR_writew(unsigned short value) | ||
| 131 | { | ||
| 132 | ; | ||
| 133 | } | ||
| 134 | static inline void IRCR_writew(unsigned short value) | ||
| 135 | { | ||
| 136 | ; | ||
| 137 | } | ||
| 138 | #endif /* CONFIG_MACH_TRIZEPS_CONXS */ | ||
| 83 | 139 | ||
| 84 | #define ConXS_CFSR_BVD_MASK 0x0003 | 140 | #define ConXS_CFSR_BVD_MASK 0x0003 |
| 85 | #define ConXS_CFSR_BVD1 (1 << 0) | 141 | #define ConXS_CFSR_BVD1 (1 << 0) |
diff --git a/arch/arm/mach-pxa/include/mach/viper.h b/arch/arm/mach-pxa/include/mach/viper.h new file mode 100644 index 000000000000..10988c270ca3 --- /dev/null +++ b/arch/arm/mach-pxa/include/mach/viper.h | |||
| @@ -0,0 +1,96 @@ | |||
| 1 | /* | ||
| 2 | * arch/arm/mach-pxa/include/mach/viper.h | ||
| 3 | * | ||
| 4 | * Author: Ian Campbell | ||
| 5 | * Created: Feb 03, 2003 | ||
| 6 | * Copyright: Arcom Control Systems. | ||
| 7 | * | ||
| 8 | * Maintained by Marc Zyngier <maz@misterjones.org> | ||
| 9 | * <marc.zyngier@altran.com> | ||
| 10 | * | ||
| 11 | * Created based on lubbock.h: | ||
| 12 | * Author: Nicolas Pitre | ||
| 13 | * Created: Jun 15, 2001 | ||
| 14 | * Copyright: MontaVista Software Inc. | ||
| 15 | * | ||
| 16 | * This program is free software; you can redistribute it and/or modify | ||
| 17 | * it under the terms of the GNU General Public License version 2 as | ||
| 18 | * published by the Free Software Foundation. | ||
| 19 | */ | ||
| 20 | |||
| 21 | #ifndef ARCH_VIPER_H | ||
| 22 | #define ARCH_VIPER_H | ||
| 23 | |||
| 24 | #define VIPER_BOOT_PHYS PXA_CS0_PHYS | ||
| 25 | #define VIPER_FLASH_PHYS PXA_CS1_PHYS | ||
| 26 | #define VIPER_ETH_PHYS PXA_CS2_PHYS | ||
| 27 | #define VIPER_USB_PHYS PXA_CS3_PHYS | ||
| 28 | #define VIPER_ETH_DATA_PHYS PXA_CS4_PHYS | ||
| 29 | #define VIPER_CPLD_PHYS PXA_CS5_PHYS | ||
| 30 | |||
| 31 | #define VIPER_CPLD_BASE (0xf0000000) | ||
| 32 | #define VIPER_PC104IO_BASE (0xf1000000) | ||
| 33 | #define VIPER_USB_BASE (0xf1800000) | ||
| 34 | |||
| 35 | #define VIPER_ETH_GPIO (0) | ||
| 36 | #define VIPER_CPLD_GPIO (1) | ||
| 37 | #define VIPER_USB_GPIO (2) | ||
| 38 | #define VIPER_UARTA_GPIO (4) | ||
| 39 | #define VIPER_UARTB_GPIO (3) | ||
| 40 | #define VIPER_CF_CD_GPIO (32) | ||
| 41 | #define VIPER_CF_RDY_GPIO (8) | ||
| 42 | #define VIPER_BCKLIGHT_EN_GPIO (9) | ||
| 43 | #define VIPER_LCD_EN_GPIO (10) | ||
| 44 | #define VIPER_PSU_DATA_GPIO (6) | ||
| 45 | #define VIPER_PSU_CLK_GPIO (11) | ||
| 46 | #define VIPER_UART_SHDN_GPIO (12) | ||
| 47 | #define VIPER_BRIGHTNESS_GPIO (16) | ||
| 48 | #define VIPER_PSU_nCS_LD_GPIO (19) | ||
| 49 | #define VIPER_UPS_GPIO (20) | ||
| 50 | #define VIPER_CF_POWER_GPIO (82) | ||
| 51 | #define VIPER_TPM_I2C_SDA_GPIO (26) | ||
| 52 | #define VIPER_TPM_I2C_SCL_GPIO (27) | ||
| 53 | #define VIPER_RTC_I2C_SDA_GPIO (83) | ||
| 54 | #define VIPER_RTC_I2C_SCL_GPIO (84) | ||
| 55 | |||
| 56 | #define VIPER_CPLD_P2V(x) ((x) - VIPER_CPLD_PHYS + VIPER_CPLD_BASE) | ||
| 57 | #define VIPER_CPLD_V2P(x) ((x) - VIPER_CPLD_BASE + VIPER_CPLD_PHYS) | ||
| 58 | |||
| 59 | #ifndef __ASSEMBLY__ | ||
| 60 | # define __VIPER_CPLD_REG(x) (*((volatile u16 *)VIPER_CPLD_P2V(x))) | ||
| 61 | #endif | ||
| 62 | |||
| 63 | /* board level registers in the CPLD: (offsets from CPLD_BASE) ... */ | ||
| 64 | |||
| 65 | /* ... Physical addresses */ | ||
| 66 | #define _VIPER_LO_IRQ_STATUS (VIPER_CPLD_PHYS + 0x100000) | ||
| 67 | #define _VIPER_ICR_PHYS (VIPER_CPLD_PHYS + 0x100002) | ||
| 68 | #define _VIPER_HI_IRQ_STATUS (VIPER_CPLD_PHYS + 0x100004) | ||
| 69 | #define _VIPER_VERSION_PHYS (VIPER_CPLD_PHYS + 0x100006) | ||
| 70 | #define VIPER_UARTA_PHYS (VIPER_CPLD_PHYS + 0x300010) | ||
| 71 | #define VIPER_UARTB_PHYS (VIPER_CPLD_PHYS + 0x300000) | ||
| 72 | #define _VIPER_SRAM_BASE (VIPER_CPLD_PHYS + 0x800000) | ||
| 73 | |||
| 74 | /* ... Virtual addresses */ | ||
| 75 | #define VIPER_LO_IRQ_STATUS __VIPER_CPLD_REG(_VIPER_LO_IRQ_STATUS) | ||
| 76 | #define VIPER_HI_IRQ_STATUS __VIPER_CPLD_REG(_VIPER_HI_IRQ_STATUS) | ||
| 77 | #define VIPER_VERSION __VIPER_CPLD_REG(_VIPER_VERSION_PHYS) | ||
| 78 | #define VIPER_ICR __VIPER_CPLD_REG(_VIPER_ICR_PHYS) | ||
| 79 | |||
| 80 | /* Decode VIPER_VERSION register */ | ||
| 81 | #define VIPER_CPLD_REVISION(x) (((x) >> 5) & 0x7) | ||
| 82 | #define VIPER_BOARD_VERSION(x) (((x) >> 3) & 0x3) | ||
| 83 | #define VIPER_BOARD_ISSUE(x) (((x) >> 0) & 0x7) | ||
| 84 | |||
| 85 | /* Interrupt and Configuration Register (VIPER_ICR) */ | ||
| 86 | /* This is a write only register. Only CF_RST is used under Linux */ | ||
| 87 | |||
| 88 | extern void viper_cf_rst(int state); | ||
| 89 | |||
| 90 | #define VIPER_ICR_RETRIG (1 << 0) | ||
| 91 | #define VIPER_ICR_AUTO_CLR (1 << 1) | ||
| 92 | #define VIPER_ICR_R_DIS (1 << 2) | ||
| 93 | #define VIPER_ICR_CF_RST (1 << 3) | ||
| 94 | |||
| 95 | #endif | ||
| 96 | |||
diff --git a/arch/arm/mach-pxa/irq.c b/arch/arm/mach-pxa/irq.c index 5e95c5372fec..fa69c3a6a38e 100644 --- a/arch/arm/mach-pxa/irq.c +++ b/arch/arm/mach-pxa/irq.c | |||
| @@ -57,7 +57,7 @@ void __init pxa_init_irq(int irq_nr, set_wake_t fn) | |||
| 57 | 57 | ||
| 58 | pxa_internal_irq_nr = irq_nr; | 58 | pxa_internal_irq_nr = irq_nr; |
| 59 | 59 | ||
| 60 | for (irq = 0; irq < irq_nr; irq += 32) { | 60 | for (irq = PXA_IRQ(0); irq < PXA_IRQ(irq_nr); irq += 32) { |
| 61 | _ICMR(irq) = 0; /* disable all IRQs */ | 61 | _ICMR(irq) = 0; /* disable all IRQs */ |
| 62 | _ICLR(irq) = 0; /* all IRQs are IRQ, not FIQ */ | 62 | _ICLR(irq) = 0; /* all IRQs are IRQ, not FIQ */ |
| 63 | } | 63 | } |
diff --git a/arch/arm/mach-pxa/leds-trizeps4.c b/arch/arm/mach-pxa/leds-trizeps4.c deleted file mode 100644 index 3bc29007df3a..000000000000 --- a/arch/arm/mach-pxa/leds-trizeps4.c +++ /dev/null | |||
| @@ -1,134 +0,0 @@ | |||
| 1 | /* | ||
| 2 | * linux/arch/arm/mach-pxa/leds-trizeps4.c | ||
| 3 | * | ||
| 4 | * Author: Jürgen Schindele | ||
| 5 | * Created: 20 02, 2006 | ||
| 6 | * Copyright: Jürgen Schindele | ||
| 7 | * | ||
| 8 | * This program is free software; you can redistribute it and/or modify | ||
| 9 | * it under the terms of the GNU General Public License version 2 as | ||
| 10 | * published by the Free Software Foundation. | ||
| 11 | */ | ||
| 12 | |||
| 13 | #include <linux/init.h> | ||
| 14 | |||
| 15 | #include <mach/hardware.h> | ||
| 16 | #include <asm/system.h> | ||
| 17 | #include <asm/types.h> | ||
| 18 | #include <asm/leds.h> | ||
| 19 | |||
| 20 | #include <mach/pxa-regs.h> | ||
| 21 | #include <mach/pxa2xx-gpio.h> | ||
| 22 | #include <mach/trizeps4.h> | ||
| 23 | |||
| 24 | #include "leds.h" | ||
| 25 | |||
| 26 | #define LED_STATE_ENABLED 1 | ||
| 27 | #define LED_STATE_CLAIMED 2 | ||
| 28 | |||
| 29 | #define SYS_BUSY 0x01 | ||
| 30 | #define HEARTBEAT 0x02 | ||
| 31 | #define BLINK 0x04 | ||
| 32 | |||
| 33 | static unsigned int led_state; | ||
| 34 | static unsigned int hw_led_state; | ||
| 35 | |||
| 36 | void trizeps4_leds_event(led_event_t evt) | ||
| 37 | { | ||
| 38 | unsigned long flags; | ||
| 39 | |||
| 40 | local_irq_save(flags); | ||
| 41 | |||
| 42 | switch (evt) { | ||
| 43 | case led_start: | ||
| 44 | hw_led_state = 0; | ||
| 45 | pxa_gpio_mode( GPIO_SYS_BUSY_LED | GPIO_OUT); /* LED1 */ | ||
| 46 | pxa_gpio_mode( GPIO_HEARTBEAT_LED | GPIO_OUT); /* LED2 */ | ||
| 47 | led_state = LED_STATE_ENABLED; | ||
| 48 | break; | ||
| 49 | |||
| 50 | case led_stop: | ||
| 51 | led_state &= ~LED_STATE_ENABLED; | ||
| 52 | break; | ||
| 53 | |||
| 54 | case led_claim: | ||
| 55 | led_state |= LED_STATE_CLAIMED; | ||
| 56 | hw_led_state = 0; | ||
| 57 | break; | ||
| 58 | |||
| 59 | case led_release: | ||
| 60 | led_state &= ~LED_STATE_CLAIMED; | ||
| 61 | hw_led_state = 0; | ||
| 62 | break; | ||
| 63 | |||
| 64 | #ifdef CONFIG_LEDS_TIMER | ||
| 65 | case led_timer: | ||
| 66 | hw_led_state ^= HEARTBEAT; | ||
| 67 | break; | ||
| 68 | #endif | ||
| 69 | |||
| 70 | #ifdef CONFIG_LEDS_CPU | ||
| 71 | case led_idle_start: | ||
| 72 | hw_led_state &= ~SYS_BUSY; | ||
| 73 | break; | ||
| 74 | |||
| 75 | case led_idle_end: | ||
| 76 | hw_led_state |= SYS_BUSY; | ||
| 77 | break; | ||
| 78 | #endif | ||
| 79 | |||
| 80 | case led_halted: | ||
| 81 | break; | ||
| 82 | |||
| 83 | case led_green_on: | ||
| 84 | hw_led_state |= BLINK; | ||
| 85 | break; | ||
| 86 | |||
| 87 | case led_green_off: | ||
| 88 | hw_led_state &= ~BLINK; | ||
| 89 | break; | ||
| 90 | |||
| 91 | case led_amber_on: | ||
| 92 | break; | ||
| 93 | |||
| 94 | case led_amber_off: | ||
| 95 | break; | ||
| 96 | |||
| 97 | case led_red_on: | ||
| 98 | break; | ||
| 99 | |||
| 100 | case led_red_off: | ||
| 101 | break; | ||
| 102 | |||
| 103 | default: | ||
| 104 | break; | ||
| 105 | } | ||
| 106 | |||
| 107 | if (led_state & LED_STATE_ENABLED) { | ||
| 108 | switch (hw_led_state) { | ||
| 109 | case 0: | ||
| 110 | GPSR(GPIO_SYS_BUSY_LED) |= GPIO_bit(GPIO_SYS_BUSY_LED); | ||
| 111 | GPSR(GPIO_HEARTBEAT_LED) |= GPIO_bit(GPIO_HEARTBEAT_LED); | ||
| 112 | break; | ||
| 113 | case 1: | ||
| 114 | GPCR(GPIO_SYS_BUSY_LED) |= GPIO_bit(GPIO_SYS_BUSY_LED); | ||
| 115 | GPSR(GPIO_HEARTBEAT_LED) |= GPIO_bit(GPIO_HEARTBEAT_LED); | ||
| 116 | break; | ||
| 117 | case 2: | ||
| 118 | GPSR(GPIO_SYS_BUSY_LED) |= GPIO_bit(GPIO_SYS_BUSY_LED); | ||
| 119 | GPCR(GPIO_HEARTBEAT_LED) |= GPIO_bit(GPIO_HEARTBEAT_LED); | ||
| 120 | break; | ||
| 121 | case 3: | ||
| 122 | GPCR(GPIO_SYS_BUSY_LED) |= GPIO_bit(GPIO_SYS_BUSY_LED); | ||
| 123 | GPCR(GPIO_HEARTBEAT_LED) |= GPIO_bit(GPIO_HEARTBEAT_LED); | ||
| 124 | break; | ||
| 125 | } | ||
| 126 | } | ||
| 127 | else { | ||
| 128 | /* turn all off */ | ||
| 129 | GPSR(GPIO_SYS_BUSY_LED) |= GPIO_bit(GPIO_SYS_BUSY_LED); | ||
| 130 | GPSR(GPIO_HEARTBEAT_LED) |= GPIO_bit(GPIO_HEARTBEAT_LED); | ||
| 131 | } | ||
| 132 | |||
| 133 | local_irq_restore(flags); | ||
| 134 | } | ||
diff --git a/arch/arm/mach-pxa/leds.c b/arch/arm/mach-pxa/leds.c index e13eb841e48d..bbe4d5f6afaa 100644 --- a/arch/arm/mach-pxa/leds.c +++ b/arch/arm/mach-pxa/leds.c | |||
| @@ -24,8 +24,6 @@ pxa_leds_init(void) | |||
| 24 | leds_event = mainstone_leds_event; | 24 | leds_event = mainstone_leds_event; |
| 25 | if (machine_is_pxa_idp()) | 25 | if (machine_is_pxa_idp()) |
| 26 | leds_event = idp_leds_event; | 26 | leds_event = idp_leds_event; |
| 27 | if (machine_is_trizeps4()) | ||
| 28 | leds_event = trizeps4_leds_event; | ||
| 29 | 27 | ||
| 30 | leds_event(led_start); | 28 | leds_event(led_start); |
| 31 | return 0; | 29 | return 0; |
diff --git a/arch/arm/mach-pxa/littleton.c b/arch/arm/mach-pxa/littleton.c index 58f3402a0375..b4d00aba0e31 100644 --- a/arch/arm/mach-pxa/littleton.c +++ b/arch/arm/mach-pxa/littleton.c | |||
| @@ -20,6 +20,7 @@ | |||
| 20 | #include <linux/delay.h> | 20 | #include <linux/delay.h> |
| 21 | #include <linux/platform_device.h> | 21 | #include <linux/platform_device.h> |
| 22 | #include <linux/clk.h> | 22 | #include <linux/clk.h> |
| 23 | #include <linux/spi/spi.h> | ||
| 23 | #include <linux/smc91x.h> | 24 | #include <linux/smc91x.h> |
| 24 | 25 | ||
| 25 | #include <asm/types.h> | 26 | #include <asm/types.h> |
| @@ -38,6 +39,7 @@ | |||
| 38 | #include <mach/gpio.h> | 39 | #include <mach/gpio.h> |
| 39 | #include <mach/pxafb.h> | 40 | #include <mach/pxafb.h> |
| 40 | #include <mach/ssp.h> | 41 | #include <mach/ssp.h> |
| 42 | #include <mach/pxa2xx_spi.h> | ||
| 41 | #include <mach/pxa27x_keypad.h> | 43 | #include <mach/pxa27x_keypad.h> |
| 42 | #include <mach/pxa3xx_nand.h> | 44 | #include <mach/pxa3xx_nand.h> |
| 43 | #include <mach/littleton.h> | 45 | #include <mach/littleton.h> |
| @@ -72,8 +74,8 @@ static mfp_cfg_t littleton_mfp_cfg[] __initdata = { | |||
| 72 | 74 | ||
| 73 | /* SSP2 */ | 75 | /* SSP2 */ |
| 74 | GPIO25_SSP2_SCLK, | 76 | GPIO25_SSP2_SCLK, |
| 75 | GPIO17_SSP2_FRM, | ||
| 76 | GPIO27_SSP2_TXD, | 77 | GPIO27_SSP2_TXD, |
| 78 | GPIO17_GPIO, /* SFRM as chip-select */ | ||
| 77 | 79 | ||
| 78 | /* Debug Ethernet */ | 80 | /* Debug Ethernet */ |
| 79 | GPIO90_GPIO, | 81 | GPIO90_GPIO, |
| @@ -123,160 +125,6 @@ static struct platform_device smc91x_device = { | |||
| 123 | }; | 125 | }; |
| 124 | 126 | ||
| 125 | #if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE) | 127 | #if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE) |
| 126 | /* use bit 30, 31 as the indicator of command parameter number */ | ||
| 127 | #define CMD0(x) ((0x00000000) | ((x) << 9)) | ||
| 128 | #define CMD1(x, x1) ((0x40000000) | ((x) << 9) | 0x100 | (x1)) | ||
| 129 | #define CMD2(x, x1, x2) ((0x80000000) | ((x) << 18) | 0x20000 |\ | ||
| 130 | ((x1) << 9) | 0x100 | (x2)) | ||
| 131 | |||
| 132 | static uint32_t lcd_panel_reset[] = { | ||
| 133 | CMD0(0x1), /* reset */ | ||
| 134 | CMD0(0x0), /* nop */ | ||
| 135 | CMD0(0x0), /* nop */ | ||
| 136 | CMD0(0x0), /* nop */ | ||
| 137 | }; | ||
| 138 | |||
| 139 | static uint32_t lcd_panel_on[] = { | ||
| 140 | CMD0(0x29), /* Display ON */ | ||
| 141 | CMD2(0xB8, 0xFF, 0xF9), /* Output Control */ | ||
| 142 | CMD0(0x11), /* Sleep out */ | ||
| 143 | CMD1(0xB0, 0x16), /* Wake */ | ||
| 144 | }; | ||
| 145 | |||
| 146 | static uint32_t lcd_panel_off[] = { | ||
| 147 | CMD0(0x28), /* Display OFF */ | ||
| 148 | CMD2(0xB8, 0x80, 0x02), /* Output Control */ | ||
| 149 | CMD0(0x10), /* Sleep in */ | ||
| 150 | CMD1(0xB0, 0x00), /* Deep stand by in */ | ||
| 151 | }; | ||
| 152 | |||
| 153 | static uint32_t lcd_vga_pass_through[] = { | ||
| 154 | CMD1(0xB0, 0x16), | ||
| 155 | CMD1(0xBC, 0x80), | ||
| 156 | CMD1(0xE1, 0x00), | ||
| 157 | CMD1(0x36, 0x50), | ||
| 158 | CMD1(0x3B, 0x00), | ||
| 159 | }; | ||
| 160 | |||
| 161 | static uint32_t lcd_qvga_pass_through[] = { | ||
| 162 | CMD1(0xB0, 0x16), | ||
| 163 | CMD1(0xBC, 0x81), | ||
| 164 | CMD1(0xE1, 0x00), | ||
| 165 | CMD1(0x36, 0x50), | ||
| 166 | CMD1(0x3B, 0x22), | ||
| 167 | }; | ||
| 168 | |||
| 169 | static uint32_t lcd_vga_transfer[] = { | ||
| 170 | CMD1(0xcf, 0x02), /* Blanking period control (1) */ | ||
| 171 | CMD2(0xd0, 0x08, 0x04), /* Blanking period control (2) */ | ||
| 172 | CMD1(0xd1, 0x01), /* CKV timing control on/off */ | ||
| 173 | CMD2(0xd2, 0x14, 0x00), /* CKV 1,2 timing control */ | ||
| 174 | CMD2(0xd3, 0x1a, 0x0f), /* OEV timing control */ | ||
| 175 | CMD2(0xd4, 0x1f, 0xaf), /* ASW timing control (1) */ | ||
| 176 | CMD1(0xd5, 0x14), /* ASW timing control (2) */ | ||
| 177 | CMD0(0x21), /* Invert for normally black display */ | ||
| 178 | CMD0(0x29), /* Display on */ | ||
| 179 | }; | ||
| 180 | |||
| 181 | static uint32_t lcd_qvga_transfer[] = { | ||
| 182 | CMD1(0xd6, 0x02), /* Blanking period control (1) */ | ||
| 183 | CMD2(0xd7, 0x08, 0x04), /* Blanking period control (2) */ | ||
| 184 | CMD1(0xd8, 0x01), /* CKV timing control on/off */ | ||
| 185 | CMD2(0xd9, 0x00, 0x08), /* CKV 1,2 timing control */ | ||
| 186 | CMD2(0xde, 0x05, 0x0a), /* OEV timing control */ | ||
| 187 | CMD2(0xdf, 0x0a, 0x19), /* ASW timing control (1) */ | ||
| 188 | CMD1(0xe0, 0x0a), /* ASW timing control (2) */ | ||
| 189 | CMD0(0x21), /* Invert for normally black display */ | ||
| 190 | CMD0(0x29), /* Display on */ | ||
| 191 | }; | ||
| 192 | |||
| 193 | static uint32_t lcd_panel_config[] = { | ||
| 194 | CMD2(0xb8, 0xff, 0xf9), /* Output control */ | ||
| 195 | CMD0(0x11), /* sleep out */ | ||
| 196 | CMD1(0xba, 0x01), /* Display mode (1) */ | ||
| 197 | CMD1(0xbb, 0x00), /* Display mode (2) */ | ||
| 198 | CMD1(0x3a, 0x60), /* Display mode 18-bit RGB */ | ||
| 199 | CMD1(0xbf, 0x10), /* Drive system change control */ | ||
| 200 | CMD1(0xb1, 0x56), /* Booster operation setup */ | ||
| 201 | CMD1(0xb2, 0x33), /* Booster mode setup */ | ||
| 202 | CMD1(0xb3, 0x11), /* Booster frequency setup */ | ||
| 203 | CMD1(0xb4, 0x02), /* Op amp/system clock */ | ||
| 204 | CMD1(0xb5, 0x35), /* VCS voltage */ | ||
| 205 | CMD1(0xb6, 0x40), /* VCOM voltage */ | ||
| 206 | CMD1(0xb7, 0x03), /* External display signal */ | ||
| 207 | CMD1(0xbd, 0x00), /* ASW slew rate */ | ||
| 208 | CMD1(0xbe, 0x00), /* Dummy data for QuadData operation */ | ||
| 209 | CMD1(0xc0, 0x11), /* Sleep out FR count (A) */ | ||
| 210 | CMD1(0xc1, 0x11), /* Sleep out FR count (B) */ | ||
| 211 | CMD1(0xc2, 0x11), /* Sleep out FR count (C) */ | ||
| 212 | CMD2(0xc3, 0x20, 0x40), /* Sleep out FR count (D) */ | ||
| 213 | CMD2(0xc4, 0x60, 0xc0), /* Sleep out FR count (E) */ | ||
| 214 | CMD2(0xc5, 0x10, 0x20), /* Sleep out FR count (F) */ | ||
| 215 | CMD1(0xc6, 0xc0), /* Sleep out FR count (G) */ | ||
| 216 | CMD2(0xc7, 0x33, 0x43), /* Gamma 1 fine tuning (1) */ | ||
| 217 | CMD1(0xc8, 0x44), /* Gamma 1 fine tuning (2) */ | ||
| 218 | CMD1(0xc9, 0x33), /* Gamma 1 inclination adjustment */ | ||
| 219 | CMD1(0xca, 0x00), /* Gamma 1 blue offset adjustment */ | ||
| 220 | CMD2(0xec, 0x01, 0xf0), /* Horizontal clock cycles */ | ||
| 221 | }; | ||
| 222 | |||
| 223 | static void ssp_reconfig(struct ssp_dev *dev, int nparam) | ||
| 224 | { | ||
| 225 | static int last_nparam = -1; | ||
| 226 | |||
| 227 | /* check if it is necessary to re-config SSP */ | ||
| 228 | if (nparam == last_nparam) | ||
| 229 | return; | ||
| 230 | |||
| 231 | ssp_disable(dev); | ||
| 232 | ssp_config(dev, (nparam == 2) ? 0x0010058a : 0x00100581, 0x18, 0, 0); | ||
| 233 | |||
| 234 | last_nparam = nparam; | ||
| 235 | } | ||
| 236 | |||
| 237 | static void ssp_send_cmd(uint32_t *cmd, int num) | ||
| 238 | { | ||
| 239 | static int ssp_initialized; | ||
| 240 | static struct ssp_dev ssp2; | ||
| 241 | |||
| 242 | int i; | ||
| 243 | |||
| 244 | if (!ssp_initialized) { | ||
| 245 | ssp_init(&ssp2, 2, SSP_NO_IRQ); | ||
| 246 | ssp_initialized = 1; | ||
| 247 | } | ||
| 248 | |||
| 249 | clk_enable(ssp2.ssp->clk); | ||
| 250 | for (i = 0; i < num; i++, cmd++) { | ||
| 251 | ssp_reconfig(&ssp2, (*cmd >> 30) & 0x3); | ||
| 252 | ssp_write_word(&ssp2, *cmd & 0x3fffffff); | ||
| 253 | |||
| 254 | /* FIXME: ssp_flush() is mandatory here to work */ | ||
| 255 | ssp_flush(&ssp2); | ||
| 256 | } | ||
| 257 | clk_disable(ssp2.ssp->clk); | ||
| 258 | } | ||
| 259 | |||
| 260 | static void littleton_lcd_power(int on, struct fb_var_screeninfo *var) | ||
| 261 | { | ||
| 262 | if (on) { | ||
| 263 | ssp_send_cmd(ARRAY_AND_SIZE(lcd_panel_on)); | ||
| 264 | ssp_send_cmd(ARRAY_AND_SIZE(lcd_panel_reset)); | ||
| 265 | if (var->xres > 240) { | ||
| 266 | /* VGA */ | ||
| 267 | ssp_send_cmd(ARRAY_AND_SIZE(lcd_vga_pass_through)); | ||
| 268 | ssp_send_cmd(ARRAY_AND_SIZE(lcd_panel_config)); | ||
| 269 | ssp_send_cmd(ARRAY_AND_SIZE(lcd_vga_transfer)); | ||
| 270 | } else { | ||
| 271 | /* QVGA */ | ||
| 272 | ssp_send_cmd(ARRAY_AND_SIZE(lcd_qvga_pass_through)); | ||
| 273 | ssp_send_cmd(ARRAY_AND_SIZE(lcd_panel_config)); | ||
| 274 | ssp_send_cmd(ARRAY_AND_SIZE(lcd_qvga_transfer)); | ||
| 275 | } | ||
| 276 | } else | ||
| 277 | ssp_send_cmd(ARRAY_AND_SIZE(lcd_panel_off)); | ||
| 278 | } | ||
| 279 | |||
| 280 | static struct pxafb_mode_info tpo_tdo24mtea1_modes[] = { | 128 | static struct pxafb_mode_info tpo_tdo24mtea1_modes[] = { |
| 281 | [0] = { | 129 | [0] = { |
| 282 | /* VGA */ | 130 | /* VGA */ |
| @@ -312,7 +160,6 @@ static struct pxafb_mach_info littleton_lcd_info = { | |||
| 312 | .modes = tpo_tdo24mtea1_modes, | 160 | .modes = tpo_tdo24mtea1_modes, |
| 313 | .num_modes = 2, | 161 | .num_modes = 2, |
| 314 | .lcd_conn = LCD_COLOR_TFT_16BPP, | 162 | .lcd_conn = LCD_COLOR_TFT_16BPP, |
| 315 | .pxafb_lcd_power = littleton_lcd_power, | ||
| 316 | }; | 163 | }; |
| 317 | 164 | ||
| 318 | static void littleton_init_lcd(void) | 165 | static void littleton_init_lcd(void) |
| @@ -323,6 +170,51 @@ static void littleton_init_lcd(void) | |||
| 323 | static inline void littleton_init_lcd(void) {}; | 170 | static inline void littleton_init_lcd(void) {}; |
| 324 | #endif /* CONFIG_FB_PXA || CONFIG_FB_PXA_MODULE */ | 171 | #endif /* CONFIG_FB_PXA || CONFIG_FB_PXA_MODULE */ |
| 325 | 172 | ||
| 173 | #if defined(CONFIG_SPI_PXA2XX) || defined(CONFIG_SPI_PXA2XX_MODULE) | ||
| 174 | static struct pxa2xx_spi_master littleton_spi_info = { | ||
| 175 | .num_chipselect = 1, | ||
| 176 | }; | ||
| 177 | |||
| 178 | static void littleton_tdo24m_cs(u32 cmd) | ||
| 179 | { | ||
| 180 | gpio_set_value(LITTLETON_GPIO_LCD_CS, !(cmd == PXA2XX_CS_ASSERT)); | ||
| 181 | } | ||
| 182 | |||
| 183 | static struct pxa2xx_spi_chip littleton_tdo24m_chip = { | ||
| 184 | .rx_threshold = 1, | ||
| 185 | .tx_threshold = 1, | ||
| 186 | .cs_control = littleton_tdo24m_cs, | ||
| 187 | }; | ||
| 188 | |||
| 189 | static struct spi_board_info littleton_spi_devices[] __initdata = { | ||
| 190 | { | ||
| 191 | .modalias = "tdo24m", | ||
| 192 | .max_speed_hz = 1000000, | ||
| 193 | .bus_num = 2, | ||
| 194 | .chip_select = 0, | ||
| 195 | .controller_data= &littleton_tdo24m_chip, | ||
| 196 | }, | ||
| 197 | }; | ||
| 198 | |||
| 199 | static void __init littleton_init_spi(void) | ||
| 200 | { | ||
| 201 | int err; | ||
| 202 | |||
| 203 | err = gpio_request(LITTLETON_GPIO_LCD_CS, "LCD_CS"); | ||
| 204 | if (err) { | ||
| 205 | pr_warning("failed to request GPIO for LCS CS\n"); | ||
| 206 | return; | ||
| 207 | } | ||
| 208 | |||
| 209 | gpio_direction_output(LITTLETON_GPIO_LCD_CS, 1); | ||
| 210 | |||
| 211 | pxa2xx_set_spi_info(2, &littleton_spi_info); | ||
| 212 | spi_register_board_info(ARRAY_AND_SIZE(littleton_spi_devices)); | ||
| 213 | } | ||
| 214 | #else | ||
| 215 | static inline void littleton_init_spi(void) {} | ||
| 216 | #endif | ||
| 217 | |||
| 326 | #if defined(CONFIG_KEYBOARD_PXA27x) || defined(CONFIG_KEYBOARD_PXA27x_MODULE) | 218 | #if defined(CONFIG_KEYBOARD_PXA27x) || defined(CONFIG_KEYBOARD_PXA27x_MODULE) |
| 327 | static unsigned int littleton_matrix_key_map[] = { | 219 | static unsigned int littleton_matrix_key_map[] = { |
| 328 | /* KEY(row, col, key_code) */ | 220 | /* KEY(row, col, key_code) */ |
| @@ -433,6 +325,7 @@ static void __init littleton_init(void) | |||
| 433 | */ | 325 | */ |
| 434 | platform_device_register(&smc91x_device); | 326 | platform_device_register(&smc91x_device); |
| 435 | 327 | ||
| 328 | littleton_init_spi(); | ||
| 436 | littleton_init_lcd(); | 329 | littleton_init_lcd(); |
| 437 | littleton_init_keypad(); | 330 | littleton_init_keypad(); |
| 438 | littleton_init_nand(); | 331 | littleton_init_nand(); |
diff --git a/arch/arm/mach-pxa/lpd270.c b/arch/arm/mach-pxa/lpd270.c index b7038948d1d4..de3f67daaacf 100644 --- a/arch/arm/mach-pxa/lpd270.c +++ b/arch/arm/mach-pxa/lpd270.c | |||
| @@ -40,7 +40,7 @@ | |||
| 40 | 40 | ||
| 41 | #include <mach/pxa-regs.h> | 41 | #include <mach/pxa-regs.h> |
| 42 | #include <mach/pxa2xx-regs.h> | 42 | #include <mach/pxa2xx-regs.h> |
| 43 | #include <mach/pxa2xx-gpio.h> | 43 | #include <mach/mfp-pxa27x.h> |
| 44 | #include <mach/lpd270.h> | 44 | #include <mach/lpd270.h> |
| 45 | #include <mach/audio.h> | 45 | #include <mach/audio.h> |
| 46 | #include <mach/pxafb.h> | 46 | #include <mach/pxafb.h> |
| @@ -51,6 +51,43 @@ | |||
| 51 | #include "generic.h" | 51 | #include "generic.h" |
| 52 | #include "devices.h" | 52 | #include "devices.h" |
| 53 | 53 | ||
| 54 | static unsigned long lpd270_pin_config[] __initdata = { | ||
| 55 | /* Chip Selects */ | ||
| 56 | GPIO15_nCS_1, /* Mainboard Flash */ | ||
| 57 | GPIO78_nCS_2, /* CPLD + Ethernet */ | ||
| 58 | |||
| 59 | /* LCD - 16bpp Active TFT */ | ||
| 60 | GPIO58_LCD_LDD_0, | ||
| 61 | GPIO59_LCD_LDD_1, | ||
| 62 | GPIO60_LCD_LDD_2, | ||
| 63 | GPIO61_LCD_LDD_3, | ||
| 64 | GPIO62_LCD_LDD_4, | ||
| 65 | GPIO63_LCD_LDD_5, | ||
| 66 | GPIO64_LCD_LDD_6, | ||
| 67 | GPIO65_LCD_LDD_7, | ||
| 68 | GPIO66_LCD_LDD_8, | ||
| 69 | GPIO67_LCD_LDD_9, | ||
| 70 | GPIO68_LCD_LDD_10, | ||
| 71 | GPIO69_LCD_LDD_11, | ||
| 72 | GPIO70_LCD_LDD_12, | ||
| 73 | GPIO71_LCD_LDD_13, | ||
| 74 | GPIO72_LCD_LDD_14, | ||
| 75 | GPIO73_LCD_LDD_15, | ||
| 76 | GPIO74_LCD_FCLK, | ||
| 77 | GPIO75_LCD_LCLK, | ||
| 78 | GPIO76_LCD_PCLK, | ||
| 79 | GPIO77_LCD_BIAS, | ||
| 80 | GPIO16_PWM0_OUT, /* Backlight */ | ||
| 81 | |||
| 82 | /* USB Host */ | ||
| 83 | GPIO88_USBH1_PWR, | ||
| 84 | GPIO89_USBH1_PEN, | ||
| 85 | |||
| 86 | /* AC97 */ | ||
| 87 | GPIO45_AC97_SYSCLK, | ||
| 88 | |||
| 89 | GPIO1_GPIO | WAKEUP_ON_EDGE_BOTH, | ||
| 90 | }; | ||
| 54 | 91 | ||
| 55 | static unsigned int lpd270_irq_enabled; | 92 | static unsigned int lpd270_irq_enabled; |
| 56 | 93 | ||
| @@ -88,8 +125,7 @@ static void lpd270_irq_handler(unsigned int irq, struct irq_desc *desc) | |||
| 88 | GEDR(0) = GPIO_bit(0); /* clear useless edge notification */ | 125 | GEDR(0) = GPIO_bit(0); /* clear useless edge notification */ |
| 89 | if (likely(pending)) { | 126 | if (likely(pending)) { |
| 90 | irq = LPD270_IRQ(0) + __ffs(pending); | 127 | irq = LPD270_IRQ(0) + __ffs(pending); |
| 91 | desc = irq_desc + irq; | 128 | generic_handle_irq(irq); |
| 92 | desc_handle_irq(irq, desc); | ||
| 93 | 129 | ||
| 94 | pending = __raw_readw(LPD270_INT_STATUS) & | 130 | pending = __raw_readw(LPD270_INT_STATUS) & |
| 95 | lpd270_irq_enabled; | 131 | lpd270_irq_enabled; |
| @@ -265,8 +301,8 @@ static struct pxafb_mode_info sharp_lq057q3dc02_mode = { | |||
| 265 | static struct pxafb_mach_info sharp_lq057q3dc02 = { | 301 | static struct pxafb_mach_info sharp_lq057q3dc02 = { |
| 266 | .modes = &sharp_lq057q3dc02_mode, | 302 | .modes = &sharp_lq057q3dc02_mode, |
| 267 | .num_modes = 1, | 303 | .num_modes = 1, |
| 268 | .lccr0 = 0x07800080, | 304 | .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL | |
| 269 | .lccr3 = 0x00400000, | 305 | LCD_ALTERNATE_MAPPING, |
| 270 | }; | 306 | }; |
| 271 | 307 | ||
| 272 | /* 12.1" TFT SVGA (LoLo display number 2) */ | 308 | /* 12.1" TFT SVGA (LoLo display number 2) */ |
| @@ -287,8 +323,8 @@ static struct pxafb_mode_info sharp_lq121s1dg31_mode = { | |||
| 287 | static struct pxafb_mach_info sharp_lq121s1dg31 = { | 323 | static struct pxafb_mach_info sharp_lq121s1dg31 = { |
| 288 | .modes = &sharp_lq121s1dg31_mode, | 324 | .modes = &sharp_lq121s1dg31_mode, |
| 289 | .num_modes = 1, | 325 | .num_modes = 1, |
| 290 | .lccr0 = 0x07800080, | 326 | .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL | |
| 291 | .lccr3 = 0x00400000, | 327 | LCD_ALTERNATE_MAPPING, |
| 292 | }; | 328 | }; |
| 293 | 329 | ||
| 294 | /* 3.6" TFT QVGA (LoLo display number 3) */ | 330 | /* 3.6" TFT QVGA (LoLo display number 3) */ |
| @@ -309,8 +345,8 @@ static struct pxafb_mode_info sharp_lq036q1da01_mode = { | |||
| 309 | static struct pxafb_mach_info sharp_lq036q1da01 = { | 345 | static struct pxafb_mach_info sharp_lq036q1da01 = { |
| 310 | .modes = &sharp_lq036q1da01_mode, | 346 | .modes = &sharp_lq036q1da01_mode, |
| 311 | .num_modes = 1, | 347 | .num_modes = 1, |
| 312 | .lccr0 = 0x07800080, | 348 | .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL | |
| 313 | .lccr3 = 0x00400000, | 349 | LCD_ALTERNATE_MAPPING, |
| 314 | }; | 350 | }; |
| 315 | 351 | ||
| 316 | /* 6.4" TFT VGA (LoLo display number 5) */ | 352 | /* 6.4" TFT VGA (LoLo display number 5) */ |
| @@ -331,8 +367,8 @@ static struct pxafb_mode_info sharp_lq64d343_mode = { | |||
| 331 | static struct pxafb_mach_info sharp_lq64d343 = { | 367 | static struct pxafb_mach_info sharp_lq64d343 = { |
| 332 | .modes = &sharp_lq64d343_mode, | 368 | .modes = &sharp_lq64d343_mode, |
| 333 | .num_modes = 1, | 369 | .num_modes = 1, |
| 334 | .lccr0 = 0x07800080, | 370 | .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL | |
| 335 | .lccr3 = 0x00400000, | 371 | LCD_ALTERNATE_MAPPING, |
| 336 | }; | 372 | }; |
| 337 | 373 | ||
| 338 | /* 10.4" TFT VGA (LoLo display number 7) */ | 374 | /* 10.4" TFT VGA (LoLo display number 7) */ |
| @@ -353,8 +389,8 @@ static struct pxafb_mode_info sharp_lq10d368_mode = { | |||
| 353 | static struct pxafb_mach_info sharp_lq10d368 = { | 389 | static struct pxafb_mach_info sharp_lq10d368 = { |
| 354 | .modes = &sharp_lq10d368_mode, | 390 | .modes = &sharp_lq10d368_mode, |
| 355 | .num_modes = 1, | 391 | .num_modes = 1, |
| 356 | .lccr0 = 0x07800080, | 392 | .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL | |
| 357 | .lccr3 = 0x00400000, | 393 | LCD_ALTERNATE_MAPPING, |
| 358 | }; | 394 | }; |
| 359 | 395 | ||
| 360 | /* 3.5" TFT QVGA (LoLo display number 8) */ | 396 | /* 3.5" TFT QVGA (LoLo display number 8) */ |
| @@ -375,8 +411,8 @@ static struct pxafb_mode_info sharp_lq035q7db02_20_mode = { | |||
| 375 | static struct pxafb_mach_info sharp_lq035q7db02_20 = { | 411 | static struct pxafb_mach_info sharp_lq035q7db02_20 = { |
| 376 | .modes = &sharp_lq035q7db02_20_mode, | 412 | .modes = &sharp_lq035q7db02_20_mode, |
| 377 | .num_modes = 1, | 413 | .num_modes = 1, |
| 378 | .lccr0 = 0x07800080, | 414 | .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL | |
| 379 | .lccr3 = 0x00400000, | 415 | LCD_ALTERNATE_MAPPING, |
| 380 | }; | 416 | }; |
| 381 | 417 | ||
| 382 | static struct pxafb_mach_info *lpd270_lcd_to_use; | 418 | static struct pxafb_mach_info *lpd270_lcd_to_use; |
| @@ -411,27 +447,15 @@ static struct platform_device *platform_devices[] __initdata = { | |||
| 411 | &lpd270_flash_device[1], | 447 | &lpd270_flash_device[1], |
| 412 | }; | 448 | }; |
| 413 | 449 | ||
| 414 | static int lpd270_ohci_init(struct device *dev) | ||
| 415 | { | ||
| 416 | /* setup Port1 GPIO pin. */ | ||
| 417 | pxa_gpio_mode(88 | GPIO_ALT_FN_1_IN); /* USBHPWR1 */ | ||
| 418 | pxa_gpio_mode(89 | GPIO_ALT_FN_2_OUT); /* USBHPEN1 */ | ||
| 419 | |||
| 420 | /* Set the Power Control Polarity Low and Power Sense | ||
| 421 | Polarity Low to active low. */ | ||
| 422 | UHCHR = (UHCHR | UHCHR_PCPL | UHCHR_PSPL) & | ||
| 423 | ~(UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSEP3 | UHCHR_SSE); | ||
| 424 | |||
| 425 | return 0; | ||
| 426 | } | ||
| 427 | |||
| 428 | static struct pxaohci_platform_data lpd270_ohci_platform_data = { | 450 | static struct pxaohci_platform_data lpd270_ohci_platform_data = { |
| 429 | .port_mode = PMM_PERPORT_MODE, | 451 | .port_mode = PMM_PERPORT_MODE, |
| 430 | .init = lpd270_ohci_init, | 452 | .flags = ENABLE_PORT_ALL | POWER_CONTROL_LOW | POWER_SENSE_LOW, |
| 431 | }; | 453 | }; |
| 432 | 454 | ||
| 433 | static void __init lpd270_init(void) | 455 | static void __init lpd270_init(void) |
| 434 | { | 456 | { |
| 457 | pxa2xx_mfp_config(ARRAY_AND_SIZE(lpd270_pin_config)); | ||
| 458 | |||
| 435 | lpd270_flash_data[0].width = (BOOT_DEF & 1) ? 2 : 4; | 459 | lpd270_flash_data[0].width = (BOOT_DEF & 1) ? 2 : 4; |
| 436 | lpd270_flash_data[1].width = 4; | 460 | lpd270_flash_data[1].width = 4; |
| 437 | 461 | ||
| @@ -442,12 +466,6 @@ static void __init lpd270_init(void) | |||
| 442 | */ | 466 | */ |
| 443 | ARB_CNTRL = ARB_CORE_PARK | 0x234; | 467 | ARB_CNTRL = ARB_CORE_PARK | 0x234; |
| 444 | 468 | ||
| 445 | /* | ||
| 446 | * On LogicPD PXA270, we route AC97_SYSCLK via GPIO45. | ||
| 447 | */ | ||
| 448 | pxa_gpio_mode(GPIO45_SYSCLK_AC97_MD); | ||
| 449 | pxa_gpio_mode(GPIO16_PWM0_MD); | ||
| 450 | |||
| 451 | platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); | 469 | platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); |
| 452 | 470 | ||
| 453 | pxa_set_ac97_info(NULL); | 471 | pxa_set_ac97_info(NULL); |
| @@ -473,15 +491,6 @@ static void __init lpd270_map_io(void) | |||
| 473 | pxa_map_io(); | 491 | pxa_map_io(); |
| 474 | iotable_init(lpd270_io_desc, ARRAY_SIZE(lpd270_io_desc)); | 492 | iotable_init(lpd270_io_desc, ARRAY_SIZE(lpd270_io_desc)); |
| 475 | 493 | ||
| 476 | /* initialize sleep mode regs (wake-up sources, etc) */ | ||
| 477 | PGSR0 = 0x00008800; | ||
| 478 | PGSR1 = 0x00000002; | ||
| 479 | PGSR2 = 0x0001FC00; | ||
| 480 | PGSR3 = 0x00001F81; | ||
| 481 | PWER = 0xC0000002; | ||
| 482 | PRER = 0x00000002; | ||
| 483 | PFER = 0x00000002; | ||
| 484 | |||
| 485 | /* for use I SRAM as framebuffer. */ | 494 | /* for use I SRAM as framebuffer. */ |
| 486 | PSLR |= 0x00000F04; | 495 | PSLR |= 0x00000F04; |
| 487 | PCFR = 0x00000066; | 496 | PCFR = 0x00000066; |
diff --git a/arch/arm/mach-pxa/lubbock.c b/arch/arm/mach-pxa/lubbock.c index 4ffdff2d9ff1..bff704354c1a 100644 --- a/arch/arm/mach-pxa/lubbock.c +++ b/arch/arm/mach-pxa/lubbock.c | |||
| @@ -57,13 +57,36 @@ | |||
| 57 | 57 | ||
| 58 | static unsigned long lubbock_pin_config[] __initdata = { | 58 | static unsigned long lubbock_pin_config[] __initdata = { |
| 59 | GPIO15_nCS_1, /* CS1 - Flash */ | 59 | GPIO15_nCS_1, /* CS1 - Flash */ |
| 60 | GPIO78_nCS_2, /* CS2 - Baseboard FGPA */ | ||
| 60 | GPIO79_nCS_3, /* CS3 - SMC ethernet */ | 61 | GPIO79_nCS_3, /* CS3 - SMC ethernet */ |
| 62 | GPIO80_nCS_4, /* CS4 - SA1111 */ | ||
| 61 | 63 | ||
| 62 | /* SSP data pins */ | 64 | /* SSP data pins */ |
| 63 | GPIO23_SSP1_SCLK, | 65 | GPIO23_SSP1_SCLK, |
| 64 | GPIO25_SSP1_TXD, | 66 | GPIO25_SSP1_TXD, |
| 65 | GPIO26_SSP1_RXD, | 67 | GPIO26_SSP1_RXD, |
| 66 | 68 | ||
| 69 | /* LCD - 16bpp DSTN */ | ||
| 70 | GPIO58_LCD_LDD_0, | ||
| 71 | GPIO59_LCD_LDD_1, | ||
| 72 | GPIO60_LCD_LDD_2, | ||
| 73 | GPIO61_LCD_LDD_3, | ||
| 74 | GPIO62_LCD_LDD_4, | ||
| 75 | GPIO63_LCD_LDD_5, | ||
| 76 | GPIO64_LCD_LDD_6, | ||
| 77 | GPIO65_LCD_LDD_7, | ||
| 78 | GPIO66_LCD_LDD_8, | ||
| 79 | GPIO67_LCD_LDD_9, | ||
| 80 | GPIO68_LCD_LDD_10, | ||
| 81 | GPIO69_LCD_LDD_11, | ||
| 82 | GPIO70_LCD_LDD_12, | ||
| 83 | GPIO71_LCD_LDD_13, | ||
| 84 | GPIO72_LCD_LDD_14, | ||
| 85 | GPIO73_LCD_LDD_15, | ||
| 86 | GPIO74_LCD_FCLK, | ||
| 87 | GPIO75_LCD_LCLK, | ||
| 88 | GPIO76_LCD_PCLK, | ||
| 89 | |||
| 67 | /* BTUART */ | 90 | /* BTUART */ |
| 68 | GPIO42_BTUART_RXD, | 91 | GPIO42_BTUART_RXD, |
| 69 | GPIO43_BTUART_TXD, | 92 | GPIO43_BTUART_TXD, |
| @@ -132,8 +155,7 @@ static void lubbock_irq_handler(unsigned int irq, struct irq_desc *desc) | |||
| 132 | GEDR(0) = GPIO_bit(0); /* clear our parent irq */ | 155 | GEDR(0) = GPIO_bit(0); /* clear our parent irq */ |
| 133 | if (likely(pending)) { | 156 | if (likely(pending)) { |
| 134 | irq = LUBBOCK_IRQ(0) + __ffs(pending); | 157 | irq = LUBBOCK_IRQ(0) + __ffs(pending); |
| 135 | desc = irq_desc + irq; | 158 | generic_handle_irq(irq); |
| 136 | desc_handle_irq(irq, desc); | ||
| 137 | } | 159 | } |
| 138 | pending = LUB_IRQ_SET_CLR & lubbock_irq_enabled; | 160 | pending = LUB_IRQ_SET_CLR & lubbock_irq_enabled; |
| 139 | } while (pending); | 161 | } while (pending); |
diff --git a/arch/arm/mach-pxa/magician.c b/arch/arm/mach-pxa/magician.c index 143f28adaf95..519138bc5f85 100644 --- a/arch/arm/mach-pxa/magician.c +++ b/arch/arm/mach-pxa/magician.c | |||
| @@ -409,7 +409,7 @@ static struct platform_device backlight = { | |||
| 409 | * LEDs | 409 | * LEDs |
| 410 | */ | 410 | */ |
| 411 | 411 | ||
| 412 | struct gpio_led gpio_leds[] = { | 412 | static struct gpio_led gpio_leds[] = { |
| 413 | { | 413 | { |
| 414 | .name = "magician::vibra", | 414 | .name = "magician::vibra", |
| 415 | .default_trigger = "none", | 415 | .default_trigger = "none", |
| @@ -669,18 +669,10 @@ static struct pxamci_platform_data magician_mci_info = { | |||
| 669 | * USB OHCI | 669 | * USB OHCI |
| 670 | */ | 670 | */ |
| 671 | 671 | ||
| 672 | static int magician_ohci_init(struct device *dev) | ||
| 673 | { | ||
| 674 | UHCHR = (UHCHR | UHCHR_SSEP2 | UHCHR_PCPL | UHCHR_CGR) & | ||
| 675 | ~(UHCHR_SSEP1 | UHCHR_SSEP3 | UHCHR_SSE); | ||
| 676 | |||
| 677 | return 0; | ||
| 678 | } | ||
| 679 | |||
| 680 | static struct pxaohci_platform_data magician_ohci_info = { | 672 | static struct pxaohci_platform_data magician_ohci_info = { |
| 681 | .port_mode = PMM_PERPORT_MODE, | 673 | .port_mode = PMM_PERPORT_MODE, |
| 682 | .init = magician_ohci_init, | 674 | .flags = ENABLE_PORT1 | ENABLE_PORT3 | POWER_CONTROL_LOW, |
| 683 | .power_budget = 0, | 675 | .power_budget = 0, |
| 684 | }; | 676 | }; |
| 685 | 677 | ||
| 686 | 678 | ||
diff --git a/arch/arm/mach-pxa/mainstone.c b/arch/arm/mach-pxa/mainstone.c index d44af761564d..f2c7ad8f2b6b 100644 --- a/arch/arm/mach-pxa/mainstone.c +++ b/arch/arm/mach-pxa/mainstone.c | |||
| @@ -162,8 +162,7 @@ static void mainstone_irq_handler(unsigned int irq, struct irq_desc *desc) | |||
| 162 | GEDR(0) = GPIO_bit(0); /* clear useless edge notification */ | 162 | GEDR(0) = GPIO_bit(0); /* clear useless edge notification */ |
| 163 | if (likely(pending)) { | 163 | if (likely(pending)) { |
| 164 | irq = MAINSTONE_IRQ(0) + __ffs(pending); | 164 | irq = MAINSTONE_IRQ(0) + __ffs(pending); |
| 165 | desc = irq_desc + irq; | 165 | generic_handle_irq(irq); |
| 166 | desc_handle_irq(irq, desc); | ||
| 167 | } | 166 | } |
| 168 | pending = MST_INTSETCLR & mainstone_irq_enabled; | 167 | pending = MST_INTSETCLR & mainstone_irq_enabled; |
| 169 | } while (pending); | 168 | } while (pending); |
| @@ -508,19 +507,9 @@ static struct platform_device *platform_devices[] __initdata = { | |||
| 508 | &mst_gpio_keys_device, | 507 | &mst_gpio_keys_device, |
| 509 | }; | 508 | }; |
| 510 | 509 | ||
| 511 | static int mainstone_ohci_init(struct device *dev) | ||
| 512 | { | ||
| 513 | /* Set the Power Control Polarity Low and Power Sense | ||
| 514 | Polarity Low to active low. */ | ||
| 515 | UHCHR = (UHCHR | UHCHR_PCPL | UHCHR_PSPL) & | ||
| 516 | ~(UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSEP3 | UHCHR_SSE); | ||
| 517 | |||
| 518 | return 0; | ||
| 519 | } | ||
| 520 | |||
| 521 | static struct pxaohci_platform_data mainstone_ohci_platform_data = { | 510 | static struct pxaohci_platform_data mainstone_ohci_platform_data = { |
| 522 | .port_mode = PMM_PERPORT_MODE, | 511 | .port_mode = PMM_PERPORT_MODE, |
| 523 | .init = mainstone_ohci_init, | 512 | .flags = ENABLE_PORT_ALL | POWER_CONTROL_LOW | POWER_SENSE_LOW, |
| 524 | }; | 513 | }; |
| 525 | 514 | ||
| 526 | #if defined(CONFIG_KEYBOARD_PXA27x) || defined(CONFIG_KEYBOARD_PXA27x_MODULE) | 515 | #if defined(CONFIG_KEYBOARD_PXA27x) || defined(CONFIG_KEYBOARD_PXA27x_MODULE) |
diff --git a/arch/arm/mach-pxa/mfp-pxa2xx.c b/arch/arm/mach-pxa/mfp-pxa2xx.c index 925575f10acf..2061c00c8ead 100644 --- a/arch/arm/mach-pxa/mfp-pxa2xx.c +++ b/arch/arm/mach-pxa/mfp-pxa2xx.c | |||
| @@ -25,7 +25,12 @@ | |||
| 25 | 25 | ||
| 26 | #include "generic.h" | 26 | #include "generic.h" |
| 27 | 27 | ||
| 28 | #define PGSR(x) __REG2(0x40F00020, ((x) & 0x60) >> 3) | 28 | #define gpio_to_bank(gpio) ((gpio) >> 5) |
| 29 | |||
| 30 | #define PGSR(x) __REG2(0x40F00020, (x) << 2) | ||
| 31 | #define __GAFR(u, x) __REG2((u) ? 0x40E00058 : 0x40E00054, (x) << 3) | ||
| 32 | #define GAFR_L(x) __GAFR(0, x) | ||
| 33 | #define GAFR_U(x) __GAFR(1, x) | ||
| 29 | 34 | ||
| 30 | #define PWER_WE35 (1 << 24) | 35 | #define PWER_WE35 (1 << 24) |
| 31 | 36 | ||
| @@ -38,49 +43,59 @@ struct gpio_desc { | |||
| 38 | }; | 43 | }; |
| 39 | 44 | ||
| 40 | static struct gpio_desc gpio_desc[MFP_PIN_GPIO127 + 1]; | 45 | static struct gpio_desc gpio_desc[MFP_PIN_GPIO127 + 1]; |
| 46 | static int gpio_nr; | ||
| 41 | 47 | ||
| 42 | static int __mfp_config_lpm(unsigned gpio, unsigned long lpm) | 48 | static unsigned long gpdr_lpm[4]; |
| 43 | { | ||
| 44 | unsigned mask = GPIO_bit(gpio); | ||
| 45 | |||
| 46 | /* low power state */ | ||
| 47 | switch (lpm) { | ||
| 48 | case MFP_LPM_DRIVE_HIGH: | ||
| 49 | PGSR(gpio) |= mask; | ||
| 50 | break; | ||
| 51 | case MFP_LPM_DRIVE_LOW: | ||
| 52 | PGSR(gpio) &= ~mask; | ||
| 53 | break; | ||
| 54 | case MFP_LPM_INPUT: | ||
| 55 | break; | ||
| 56 | default: | ||
| 57 | pr_warning("%s: invalid low power state for GPIO%d\n", | ||
| 58 | __func__, gpio); | ||
| 59 | return -EINVAL; | ||
| 60 | } | ||
| 61 | return 0; | ||
| 62 | } | ||
| 63 | 49 | ||
| 64 | static int __mfp_config_gpio(unsigned gpio, unsigned long c) | 50 | static int __mfp_config_gpio(unsigned gpio, unsigned long c) |
| 65 | { | 51 | { |
| 66 | unsigned long gafr, mask = GPIO_bit(gpio); | 52 | unsigned long gafr, mask = GPIO_bit(gpio); |
| 67 | int fn; | 53 | int bank = gpio_to_bank(gpio); |
| 54 | int uorl = !!(gpio & 0x10); /* GAFRx_U or GAFRx_L ? */ | ||
| 55 | int shft = (gpio & 0xf) << 1; | ||
| 56 | int fn = MFP_AF(c); | ||
| 57 | int dir = c & MFP_DIR_OUT; | ||
| 68 | 58 | ||
| 69 | fn = MFP_AF(c); | ||
| 70 | if (fn > 3) | 59 | if (fn > 3) |
| 71 | return -EINVAL; | 60 | return -EINVAL; |
| 72 | 61 | ||
| 73 | /* alternate function and direction */ | 62 | /* alternate function and direction at run-time */ |
| 74 | gafr = GAFR(gpio) & ~(0x3 << ((gpio & 0xf) * 2)); | 63 | gafr = (uorl == 0) ? GAFR_L(bank) : GAFR_U(bank); |
| 75 | GAFR(gpio) = gafr | (fn << ((gpio & 0xf) * 2)); | 64 | gafr = (gafr & ~(0x3 << shft)) | (fn << shft); |
| 76 | 65 | ||
| 77 | if (c & MFP_DIR_OUT) | 66 | if (uorl == 0) |
| 67 | GAFR_L(bank) = gafr; | ||
| 68 | else | ||
| 69 | GAFR_U(bank) = gafr; | ||
| 70 | |||
| 71 | if (dir == MFP_DIR_OUT) | ||
| 78 | GPDR(gpio) |= mask; | 72 | GPDR(gpio) |= mask; |
| 79 | else | 73 | else |
| 80 | GPDR(gpio) &= ~mask; | 74 | GPDR(gpio) &= ~mask; |
| 81 | 75 | ||
| 82 | if (__mfp_config_lpm(gpio, c & MFP_LPM_STATE_MASK)) | 76 | /* alternate function and direction at low power mode */ |
| 83 | return -EINVAL; | 77 | switch (c & MFP_LPM_STATE_MASK) { |
| 78 | case MFP_LPM_DRIVE_HIGH: | ||
| 79 | PGSR(bank) |= mask; | ||
| 80 | dir = MFP_DIR_OUT; | ||
| 81 | break; | ||
| 82 | case MFP_LPM_DRIVE_LOW: | ||
| 83 | PGSR(bank) &= ~mask; | ||
| 84 | dir = MFP_DIR_OUT; | ||
| 85 | break; | ||
| 86 | case MFP_LPM_DEFAULT: | ||
| 87 | break; | ||
| 88 | default: | ||
| 89 | /* warning and fall through, treat as MFP_LPM_DEFAULT */ | ||
| 90 | pr_warning("%s: GPIO%d: unsupported low power mode\n", | ||
| 91 | __func__, gpio); | ||
| 92 | break; | ||
| 93 | } | ||
| 94 | |||
| 95 | if (dir == MFP_DIR_OUT) | ||
| 96 | gpdr_lpm[bank] |= mask; | ||
| 97 | else | ||
| 98 | gpdr_lpm[bank] &= ~mask; | ||
| 84 | 99 | ||
| 85 | /* give early warning if MFP_LPM_CAN_WAKEUP is set on the | 100 | /* give early warning if MFP_LPM_CAN_WAKEUP is set on the |
| 86 | * configurations of those pins not able to wakeup | 101 | * configurations of those pins not able to wakeup |
| @@ -91,7 +106,7 @@ static int __mfp_config_gpio(unsigned gpio, unsigned long c) | |||
| 91 | return -EINVAL; | 106 | return -EINVAL; |
| 92 | } | 107 | } |
| 93 | 108 | ||
| 94 | if ((c & MFP_LPM_CAN_WAKEUP) && (c & MFP_DIR_OUT)) { | 109 | if ((c & MFP_LPM_CAN_WAKEUP) && (dir == MFP_DIR_OUT)) { |
| 95 | pr_warning("%s: output GPIO%d unable to wakeup\n", | 110 | pr_warning("%s: output GPIO%d unable to wakeup\n", |
| 96 | __func__, gpio); | 111 | __func__, gpio); |
| 97 | return -EINVAL; | 112 | return -EINVAL; |
| @@ -135,7 +150,7 @@ void pxa2xx_mfp_config(unsigned long *mfp_cfgs, int num) | |||
| 135 | 150 | ||
| 136 | void pxa2xx_mfp_set_lpm(int mfp, unsigned long lpm) | 151 | void pxa2xx_mfp_set_lpm(int mfp, unsigned long lpm) |
| 137 | { | 152 | { |
| 138 | unsigned long flags; | 153 | unsigned long flags, c; |
| 139 | int gpio; | 154 | int gpio; |
| 140 | 155 | ||
| 141 | gpio = __mfp_validate(mfp); | 156 | gpio = __mfp_validate(mfp); |
| @@ -143,7 +158,11 @@ void pxa2xx_mfp_set_lpm(int mfp, unsigned long lpm) | |||
| 143 | return; | 158 | return; |
| 144 | 159 | ||
| 145 | local_irq_save(flags); | 160 | local_irq_save(flags); |
| 146 | __mfp_config_lpm(gpio, lpm); | 161 | |
| 162 | c = gpio_desc[gpio].config; | ||
| 163 | c = (c & ~MFP_LPM_STATE_MASK) | lpm; | ||
| 164 | __mfp_config_gpio(gpio, c); | ||
| 165 | |||
| 147 | local_irq_restore(flags); | 166 | local_irq_restore(flags); |
| 148 | } | 167 | } |
| 149 | 168 | ||
| @@ -187,23 +206,22 @@ int gpio_set_wake(unsigned int gpio, unsigned int on) | |||
| 187 | } | 206 | } |
| 188 | 207 | ||
| 189 | #ifdef CONFIG_PXA25x | 208 | #ifdef CONFIG_PXA25x |
| 190 | static int __init pxa25x_mfp_init(void) | 209 | static void __init pxa25x_mfp_init(void) |
| 191 | { | 210 | { |
| 192 | int i; | 211 | int i; |
| 193 | 212 | ||
| 194 | if (cpu_is_pxa25x()) { | 213 | for (i = 0; i <= 84; i++) |
| 195 | for (i = 0; i <= 84; i++) | 214 | gpio_desc[i].valid = 1; |
| 196 | gpio_desc[i].valid = 1; | ||
| 197 | 215 | ||
| 198 | for (i = 0; i <= 15; i++) { | 216 | for (i = 0; i <= 15; i++) { |
| 199 | gpio_desc[i].can_wakeup = 1; | 217 | gpio_desc[i].can_wakeup = 1; |
| 200 | gpio_desc[i].mask = GPIO_bit(i); | 218 | gpio_desc[i].mask = GPIO_bit(i); |
| 201 | } | ||
| 202 | } | 219 | } |
| 203 | 220 | ||
| 204 | return 0; | 221 | gpio_nr = 85; |
| 205 | } | 222 | } |
| 206 | postcore_initcall(pxa25x_mfp_init); | 223 | #else |
| 224 | static inline void pxa25x_mfp_init(void) {} | ||
| 207 | #endif /* CONFIG_PXA25x */ | 225 | #endif /* CONFIG_PXA25x */ |
| 208 | 226 | ||
| 209 | #ifdef CONFIG_PXA27x | 227 | #ifdef CONFIG_PXA27x |
| @@ -233,45 +251,106 @@ int keypad_set_wake(unsigned int on) | |||
| 233 | return 0; | 251 | return 0; |
| 234 | } | 252 | } |
| 235 | 253 | ||
| 236 | static int __init pxa27x_mfp_init(void) | 254 | static void __init pxa27x_mfp_init(void) |
| 237 | { | 255 | { |
| 238 | int i, gpio; | 256 | int i, gpio; |
| 239 | 257 | ||
| 240 | if (cpu_is_pxa27x()) { | 258 | for (i = 0; i <= 120; i++) { |
| 241 | for (i = 0; i <= 120; i++) { | 259 | /* skip GPIO2, 5, 6, 7, 8, they are not |
| 242 | /* skip GPIO2, 5, 6, 7, 8, they are not | 260 | * valid pins allow configuration |
| 243 | * valid pins allow configuration | 261 | */ |
| 244 | */ | 262 | if (i == 2 || i == 5 || i == 6 || i == 7 || i == 8) |
| 245 | if (i == 2 || i == 5 || i == 6 || | 263 | continue; |
| 246 | i == 7 || i == 8) | ||
| 247 | continue; | ||
| 248 | 264 | ||
| 249 | gpio_desc[i].valid = 1; | 265 | gpio_desc[i].valid = 1; |
| 250 | } | 266 | } |
| 251 | 267 | ||
| 252 | /* Keypad GPIOs */ | 268 | /* Keypad GPIOs */ |
| 253 | for (i = 0; i < ARRAY_SIZE(pxa27x_pkwr_gpio); i++) { | 269 | for (i = 0; i < ARRAY_SIZE(pxa27x_pkwr_gpio); i++) { |
| 254 | gpio = pxa27x_pkwr_gpio[i]; | 270 | gpio = pxa27x_pkwr_gpio[i]; |
| 255 | gpio_desc[gpio].can_wakeup = 1; | 271 | gpio_desc[gpio].can_wakeup = 1; |
| 256 | gpio_desc[gpio].keypad_gpio = 1; | 272 | gpio_desc[gpio].keypad_gpio = 1; |
| 257 | gpio_desc[gpio].mask = 1 << i; | 273 | gpio_desc[gpio].mask = 1 << i; |
| 258 | } | 274 | } |
| 259 | 275 | ||
| 260 | /* Overwrite GPIO13 as a PWER wakeup source */ | 276 | /* Overwrite GPIO13 as a PWER wakeup source */ |
| 261 | for (i = 0; i <= 15; i++) { | 277 | for (i = 0; i <= 15; i++) { |
| 262 | /* skip GPIO2, 5, 6, 7, 8 */ | 278 | /* skip GPIO2, 5, 6, 7, 8 */ |
| 263 | if (GPIO_bit(i) & 0x1e4) | 279 | if (GPIO_bit(i) & 0x1e4) |
| 264 | continue; | 280 | continue; |
| 265 | 281 | ||
| 266 | gpio_desc[i].can_wakeup = 1; | 282 | gpio_desc[i].can_wakeup = 1; |
| 267 | gpio_desc[i].mask = GPIO_bit(i); | 283 | gpio_desc[i].mask = GPIO_bit(i); |
| 268 | } | 284 | } |
| 285 | |||
| 286 | gpio_desc[35].can_wakeup = 1; | ||
| 287 | gpio_desc[35].mask = PWER_WE35; | ||
| 288 | |||
| 289 | gpio_nr = 121; | ||
| 290 | } | ||
| 291 | #else | ||
| 292 | static inline void pxa27x_mfp_init(void) {} | ||
| 293 | #endif /* CONFIG_PXA27x */ | ||
| 294 | |||
| 295 | #ifdef CONFIG_PM | ||
| 296 | static unsigned long saved_gafr[2][4]; | ||
| 297 | static unsigned long saved_gpdr[4]; | ||
| 269 | 298 | ||
| 270 | gpio_desc[35].can_wakeup = 1; | 299 | static int pxa2xx_mfp_suspend(struct sys_device *d, pm_message_t state) |
| 271 | gpio_desc[35].mask = PWER_WE35; | 300 | { |
| 301 | int i; | ||
| 302 | |||
| 303 | for (i = 0; i <= gpio_to_bank(gpio_nr); i++) { | ||
| 304 | |||
| 305 | saved_gafr[0][i] = GAFR_L(i); | ||
| 306 | saved_gafr[1][i] = GAFR_U(i); | ||
| 307 | saved_gpdr[i] = GPDR(i * 32); | ||
| 308 | |||
| 309 | GPDR(i * 32) = gpdr_lpm[i]; | ||
| 272 | } | 310 | } |
| 311 | return 0; | ||
| 312 | } | ||
| 273 | 313 | ||
| 314 | static int pxa2xx_mfp_resume(struct sys_device *d) | ||
| 315 | { | ||
| 316 | int i; | ||
| 317 | |||
| 318 | for (i = 0; i <= gpio_to_bank(gpio_nr); i++) { | ||
| 319 | GAFR_L(i) = saved_gafr[0][i]; | ||
| 320 | GAFR_U(i) = saved_gafr[1][i]; | ||
| 321 | GPDR(i * 32) = saved_gpdr[i]; | ||
| 322 | } | ||
| 323 | PSSR = PSSR_RDH | PSSR_PH; | ||
| 274 | return 0; | 324 | return 0; |
| 275 | } | 325 | } |
| 276 | postcore_initcall(pxa27x_mfp_init); | 326 | #else |
| 277 | #endif /* CONFIG_PXA27x */ | 327 | #define pxa2xx_mfp_suspend NULL |
| 328 | #define pxa2xx_mfp_resume NULL | ||
| 329 | #endif | ||
| 330 | |||
| 331 | struct sysdev_class pxa2xx_mfp_sysclass = { | ||
| 332 | .name = "mfp", | ||
| 333 | .suspend = pxa2xx_mfp_suspend, | ||
| 334 | .resume = pxa2xx_mfp_resume, | ||
| 335 | }; | ||
| 336 | |||
| 337 | static int __init pxa2xx_mfp_init(void) | ||
| 338 | { | ||
| 339 | int i; | ||
| 340 | |||
| 341 | if (!cpu_is_pxa2xx()) | ||
| 342 | return 0; | ||
| 343 | |||
| 344 | if (cpu_is_pxa25x()) | ||
| 345 | pxa25x_mfp_init(); | ||
| 346 | |||
| 347 | if (cpu_is_pxa27x()) | ||
| 348 | pxa27x_mfp_init(); | ||
| 349 | |||
| 350 | /* initialize gafr_run[], pgsr_lpm[] from existing values */ | ||
| 351 | for (i = 0; i <= gpio_to_bank(gpio_nr); i++) | ||
| 352 | gpdr_lpm[i] = GPDR(i * 32); | ||
| 353 | |||
| 354 | return sysdev_class_register(&pxa2xx_mfp_sysclass); | ||
| 355 | } | ||
| 356 | postcore_initcall(pxa2xx_mfp_init); | ||
diff --git a/arch/arm/mach-pxa/mioa701.c b/arch/arm/mach-pxa/mioa701.c new file mode 100644 index 000000000000..0842c531ee4d --- /dev/null +++ b/arch/arm/mach-pxa/mioa701.c | |||
| @@ -0,0 +1,905 @@ | |||
| 1 | /* | ||
| 2 | * Handles the Mitac Mio A701 Board | ||
| 3 | * | ||
| 4 | * Copyright (C) 2008 Robert Jarzmik | ||
| 5 | * | ||
| 6 | * This program is free software; you can redistribute it and/or modify | ||
| 7 | * it under the terms of the GNU General Public License as published by | ||
| 8 | * the Free Software Foundation; either version 2 of the License, or | ||
| 9 | * (at your option) any later version. | ||
| 10 | * | ||
| 11 | * This program is distributed in the hope that it will be useful, | ||
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 14 | * GNU General Public License for more details. | ||
| 15 | * | ||
| 16 | * You should have received a copy of the GNU General Public License | ||
| 17 | * along with this program; if not, write to the Free Software | ||
| 18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
| 19 | * | ||
| 20 | */ | ||
| 21 | |||
| 22 | #include <linux/kernel.h> | ||
| 23 | #include <linux/init.h> | ||
| 24 | #include <linux/platform_device.h> | ||
| 25 | #include <linux/sysdev.h> | ||
| 26 | #include <linux/input.h> | ||
| 27 | #include <linux/delay.h> | ||
| 28 | #include <linux/gpio_keys.h> | ||
| 29 | #include <linux/pwm_backlight.h> | ||
| 30 | #include <linux/rtc.h> | ||
| 31 | #include <linux/leds.h> | ||
| 32 | #include <linux/gpio.h> | ||
| 33 | #include <linux/interrupt.h> | ||
| 34 | #include <linux/irq.h> | ||
| 35 | #include <linux/pda_power.h> | ||
| 36 | #include <linux/power_supply.h> | ||
| 37 | #include <linux/wm97xx.h> | ||
| 38 | #include <linux/mtd/physmap.h> | ||
| 39 | |||
| 40 | #include <asm/mach-types.h> | ||
| 41 | #include <asm/mach/arch.h> | ||
| 42 | #include <mach/mfp-pxa27x.h> | ||
| 43 | #include <mach/pxa27x_keypad.h> | ||
| 44 | #include <mach/pxafb.h> | ||
| 45 | #include <mach/pxa2xx-regs.h> | ||
| 46 | #include <mach/mmc.h> | ||
| 47 | #include <mach/udc.h> | ||
| 48 | #include <mach/pxa27x-udc.h> | ||
| 49 | |||
| 50 | #include <mach/mioa701.h> | ||
| 51 | |||
| 52 | #include "generic.h" | ||
| 53 | #include "devices.h" | ||
| 54 | |||
| 55 | static unsigned long mioa701_pin_config[] = { | ||
| 56 | /* Mio global */ | ||
| 57 | MIO_CFG_OUT(GPIO9_CHARGE_nEN, AF0, DRIVE_LOW), | ||
| 58 | MIO_CFG_OUT(GPIO18_POWEROFF, AF0, DRIVE_LOW), | ||
| 59 | MFP_CFG_OUT(GPIO3, AF0, DRIVE_HIGH), | ||
| 60 | MFP_CFG_OUT(GPIO4, AF0, DRIVE_HIGH), | ||
| 61 | |||
| 62 | /* Backlight PWM 0 */ | ||
| 63 | GPIO16_PWM0_OUT, | ||
| 64 | |||
| 65 | /* MMC */ | ||
| 66 | GPIO32_MMC_CLK, | ||
| 67 | GPIO92_MMC_DAT_0, | ||
| 68 | GPIO109_MMC_DAT_1, | ||
| 69 | GPIO110_MMC_DAT_2, | ||
| 70 | GPIO111_MMC_DAT_3, | ||
| 71 | GPIO112_MMC_CMD, | ||
| 72 | MIO_CFG_IN(GPIO78_SDIO_RO, AF0), | ||
| 73 | MIO_CFG_IN(GPIO15_SDIO_INSERT, AF0), | ||
| 74 | MIO_CFG_OUT(GPIO91_SDIO_EN, AF0, DRIVE_LOW), | ||
| 75 | |||
| 76 | /* USB */ | ||
| 77 | MIO_CFG_IN(GPIO13_USB_DETECT, AF0), | ||
| 78 | MIO_CFG_OUT(GPIO22_USB_ENABLE, AF0, DRIVE_LOW), | ||
| 79 | |||
| 80 | /* LCD */ | ||
| 81 | GPIO58_LCD_LDD_0, | ||
| 82 | GPIO59_LCD_LDD_1, | ||
| 83 | GPIO60_LCD_LDD_2, | ||
| 84 | GPIO61_LCD_LDD_3, | ||
| 85 | GPIO62_LCD_LDD_4, | ||
| 86 | GPIO63_LCD_LDD_5, | ||
| 87 | GPIO64_LCD_LDD_6, | ||
| 88 | GPIO65_LCD_LDD_7, | ||
| 89 | GPIO66_LCD_LDD_8, | ||
| 90 | GPIO67_LCD_LDD_9, | ||
| 91 | GPIO68_LCD_LDD_10, | ||
| 92 | GPIO69_LCD_LDD_11, | ||
| 93 | GPIO70_LCD_LDD_12, | ||
| 94 | GPIO71_LCD_LDD_13, | ||
| 95 | GPIO72_LCD_LDD_14, | ||
| 96 | GPIO73_LCD_LDD_15, | ||
| 97 | GPIO74_LCD_FCLK, | ||
| 98 | GPIO75_LCD_LCLK, | ||
| 99 | GPIO76_LCD_PCLK, | ||
| 100 | |||
| 101 | /* Bluetooth */ | ||
| 102 | GPIO44_BTUART_CTS, | ||
| 103 | GPIO42_BTUART_RXD, | ||
| 104 | GPIO45_BTUART_RTS, | ||
| 105 | GPIO43_BTUART_TXD, | ||
| 106 | MIO_CFG_OUT(GPIO83_BT_ON, AF0, DRIVE_LOW), | ||
| 107 | |||
| 108 | /* GPS */ | ||
| 109 | MIO_CFG_OUT(GPIO23_GPS_UNKNOWN1, AF0, DRIVE_LOW), | ||
| 110 | MIO_CFG_OUT(GPIO26_GPS_ON, AF0, DRIVE_LOW), | ||
| 111 | MIO_CFG_OUT(GPIO27_GPS_RESET, AF0, DRIVE_LOW), | ||
| 112 | MIO_CFG_OUT(GPIO106_GPS_UNKNOWN2, AF0, DRIVE_LOW), | ||
| 113 | MIO_CFG_OUT(GPIO107_GPS_UNKNOWN3, AF0, DRIVE_LOW), | ||
| 114 | GPIO46_STUART_RXD, | ||
| 115 | GPIO47_STUART_TXD, | ||
| 116 | |||
| 117 | /* GSM */ | ||
| 118 | MIO_CFG_OUT(GPIO24_GSM_MOD_RESET_CMD, AF0, DRIVE_LOW), | ||
| 119 | MIO_CFG_OUT(GPIO88_GSM_nMOD_ON_CMD, AF0, DRIVE_HIGH), | ||
| 120 | MIO_CFG_OUT(GPIO90_GSM_nMOD_OFF_CMD, AF0, DRIVE_HIGH), | ||
| 121 | MIO_CFG_OUT(GPIO114_GSM_nMOD_DTE_UART_STATE, AF0, DRIVE_HIGH), | ||
| 122 | MIO_CFG_IN(GPIO25_GSM_MOD_ON_STATE, AF0), | ||
| 123 | MIO_CFG_IN(GPIO113_GSM_EVENT, AF0) | WAKEUP_ON_EDGE_BOTH, | ||
| 124 | GPIO34_FFUART_RXD, | ||
| 125 | GPIO35_FFUART_CTS, | ||
| 126 | GPIO36_FFUART_DCD, | ||
| 127 | GPIO37_FFUART_DSR, | ||
| 128 | GPIO39_FFUART_TXD, | ||
| 129 | GPIO40_FFUART_DTR, | ||
| 130 | GPIO41_FFUART_RTS, | ||
| 131 | |||
| 132 | /* Sound */ | ||
| 133 | GPIO89_AC97_SYSCLK, | ||
| 134 | MIO_CFG_IN(GPIO12_HPJACK_INSERT, AF0), | ||
| 135 | |||
| 136 | /* Leds */ | ||
| 137 | MIO_CFG_OUT(GPIO10_LED_nCharging, AF0, DRIVE_HIGH), | ||
| 138 | MIO_CFG_OUT(GPIO97_LED_nBlue, AF0, DRIVE_HIGH), | ||
| 139 | MIO_CFG_OUT(GPIO98_LED_nOrange, AF0, DRIVE_HIGH), | ||
| 140 | MIO_CFG_OUT(GPIO82_LED_nVibra, AF0, DRIVE_HIGH), | ||
| 141 | MIO_CFG_OUT(GPIO115_LED_nKeyboard, AF0, DRIVE_HIGH), | ||
| 142 | |||
| 143 | /* Keyboard */ | ||
| 144 | MIO_CFG_IN(GPIO0_KEY_POWER, AF0) | WAKEUP_ON_EDGE_BOTH, | ||
| 145 | MIO_CFG_IN(GPIO93_KEY_VOLUME_UP, AF0), | ||
| 146 | MIO_CFG_IN(GPIO94_KEY_VOLUME_DOWN, AF0), | ||
| 147 | GPIO100_KP_MKIN_0, | ||
| 148 | GPIO101_KP_MKIN_1, | ||
| 149 | GPIO102_KP_MKIN_2, | ||
| 150 | GPIO103_KP_MKOUT_0, | ||
| 151 | GPIO104_KP_MKOUT_1, | ||
| 152 | GPIO105_KP_MKOUT_2, | ||
| 153 | |||
| 154 | /* Unknown */ | ||
| 155 | MFP_CFG_IN(GPIO14, AF0), | ||
| 156 | MFP_CFG_IN(GPIO20, AF0), | ||
| 157 | MFP_CFG_IN(GPIO21, AF0), | ||
| 158 | MFP_CFG_IN(GPIO33, AF0), | ||
| 159 | MFP_CFG_OUT(GPIO49, AF0, DRIVE_HIGH), | ||
| 160 | MFP_CFG_OUT(GPIO57, AF0, DRIVE_HIGH), | ||
| 161 | MFP_CFG_OUT(GPIO77, AF0, DRIVE_HIGH), | ||
| 162 | MFP_CFG_IN(GPIO80, AF0), | ||
| 163 | MFP_CFG_OUT(GPIO86, AF0, DRIVE_HIGH), | ||
| 164 | MFP_CFG_IN(GPIO96, AF0), | ||
| 165 | MFP_CFG_OUT(GPIO116, AF0, DRIVE_HIGH), | ||
| 166 | }; | ||
| 167 | |||
| 168 | #define MIO_GPIO_IN(num, _desc) \ | ||
| 169 | { .gpio = (num), .dir = 0, .desc = (_desc) } | ||
| 170 | #define MIO_GPIO_OUT(num, _init, _desc) \ | ||
| 171 | { .gpio = (num), .dir = 1, .init = (_init), .desc = (_desc) } | ||
| 172 | struct gpio_ress { | ||
| 173 | unsigned gpio : 8; | ||
| 174 | unsigned dir : 1; | ||
| 175 | unsigned init : 1; | ||
| 176 | char *desc; | ||
| 177 | }; | ||
| 178 | |||
| 179 | static int mio_gpio_request(struct gpio_ress *gpios, int size) | ||
| 180 | { | ||
| 181 | int i, rc = 0; | ||
| 182 | int gpio; | ||
| 183 | int dir; | ||
| 184 | |||
| 185 | for (i = 0; (!rc) && (i < size); i++) { | ||
| 186 | gpio = gpios[i].gpio; | ||
| 187 | dir = gpios[i].dir; | ||
| 188 | rc = gpio_request(gpio, gpios[i].desc); | ||
| 189 | if (rc) { | ||
| 190 | printk(KERN_ERR "Error requesting GPIO %d(%s) : %d\n", | ||
| 191 | gpio, gpios[i].desc, rc); | ||
| 192 | continue; | ||
| 193 | } | ||
| 194 | if (dir) | ||
| 195 | gpio_direction_output(gpio, gpios[i].init); | ||
| 196 | else | ||
| 197 | gpio_direction_input(gpio); | ||
| 198 | } | ||
| 199 | while ((rc) && (--i >= 0)) | ||
| 200 | gpio_free(gpios[i].gpio); | ||
| 201 | return rc; | ||
| 202 | } | ||
| 203 | |||
| 204 | static void mio_gpio_free(struct gpio_ress *gpios, int size) | ||
| 205 | { | ||
| 206 | int i; | ||
| 207 | |||
| 208 | for (i = 0; i < size; i++) | ||
| 209 | gpio_free(gpios[i].gpio); | ||
| 210 | } | ||
| 211 | |||
| 212 | /* LCD Screen and Backlight */ | ||
| 213 | static struct platform_pwm_backlight_data mioa701_backlight_data = { | ||
| 214 | .pwm_id = 0, | ||
| 215 | .max_brightness = 100, | ||
| 216 | .dft_brightness = 50, | ||
| 217 | .pwm_period_ns = 4000 * 1024, /* Fl = 250kHz */ | ||
| 218 | }; | ||
| 219 | |||
| 220 | /* | ||
| 221 | * LTM0305A776C LCD panel timings | ||
| 222 | * | ||
| 223 | * see: | ||
| 224 | * - the LTM0305A776C datasheet, | ||
| 225 | * - and the PXA27x Programmers' manual | ||
| 226 | */ | ||
| 227 | static struct pxafb_mode_info mioa701_ltm0305a776c = { | ||
| 228 | .pixclock = 220000, /* CLK=4.545 MHz */ | ||
| 229 | .xres = 240, | ||
| 230 | .yres = 320, | ||
| 231 | .bpp = 16, | ||
| 232 | .hsync_len = 4, | ||
| 233 | .vsync_len = 2, | ||
| 234 | .left_margin = 6, | ||
| 235 | .right_margin = 4, | ||
| 236 | .upper_margin = 5, | ||
| 237 | .lower_margin = 3, | ||
| 238 | }; | ||
| 239 | |||
| 240 | static void mioa701_lcd_power(int on, struct fb_var_screeninfo *si) | ||
| 241 | { | ||
| 242 | gpio_set_value(GPIO87_LCD_POWER, on); | ||
| 243 | } | ||
| 244 | |||
| 245 | static struct pxafb_mach_info mioa701_pxafb_info = { | ||
| 246 | .modes = &mioa701_ltm0305a776c, | ||
| 247 | .num_modes = 1, | ||
| 248 | .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL, | ||
| 249 | .pxafb_lcd_power = mioa701_lcd_power, | ||
| 250 | }; | ||
| 251 | |||
| 252 | /* | ||
| 253 | * Keyboard configuration | ||
| 254 | */ | ||
| 255 | static unsigned int mioa701_matrix_keys[] = { | ||
| 256 | KEY(0, 0, KEY_UP), | ||
| 257 | KEY(0, 1, KEY_RIGHT), | ||
| 258 | KEY(0, 2, KEY_MEDIA), | ||
| 259 | KEY(1, 0, KEY_DOWN), | ||
| 260 | KEY(1, 1, KEY_ENTER), | ||
| 261 | KEY(1, 2, KEY_CONNECT), /* GPS key */ | ||
| 262 | KEY(2, 0, KEY_LEFT), | ||
| 263 | KEY(2, 1, KEY_PHONE), /* Phone Green key */ | ||
| 264 | KEY(2, 2, KEY_CAMERA) /* Camera key */ | ||
| 265 | }; | ||
| 266 | static struct pxa27x_keypad_platform_data mioa701_keypad_info = { | ||
| 267 | .matrix_key_rows = 3, | ||
| 268 | .matrix_key_cols = 3, | ||
| 269 | .matrix_key_map = mioa701_matrix_keys, | ||
| 270 | .matrix_key_map_size = ARRAY_SIZE(mioa701_matrix_keys), | ||
| 271 | }; | ||
| 272 | |||
| 273 | /* | ||
| 274 | * GPIO Key Configuration | ||
| 275 | */ | ||
| 276 | #define MIO_KEY(key, _gpio, _desc, _wakeup) \ | ||
| 277 | { .code = (key), .gpio = (_gpio), .active_low = 0, \ | ||
| 278 | .desc = (_desc), .type = EV_KEY, .wakeup = (_wakeup) } | ||
| 279 | static struct gpio_keys_button mioa701_button_table[] = { | ||
| 280 | MIO_KEY(KEY_EXIT, GPIO0_KEY_POWER, "Power button", 1), | ||
| 281 | MIO_KEY(KEY_VOLUMEUP, GPIO93_KEY_VOLUME_UP, "Volume up", 0), | ||
| 282 | MIO_KEY(KEY_VOLUMEDOWN, GPIO94_KEY_VOLUME_DOWN, "Volume down", 0), | ||
| 283 | MIO_KEY(KEY_HP, GPIO12_HPJACK_INSERT, "HP jack detect", 0) | ||
| 284 | }; | ||
| 285 | |||
| 286 | static struct gpio_keys_platform_data mioa701_gpio_keys_data = { | ||
| 287 | .buttons = mioa701_button_table, | ||
| 288 | .nbuttons = ARRAY_SIZE(mioa701_button_table), | ||
| 289 | }; | ||
| 290 | |||
| 291 | /* | ||
| 292 | * Leds and vibrator | ||
| 293 | */ | ||
| 294 | #define ONE_LED(_gpio, _name) \ | ||
| 295 | { .gpio = (_gpio), .name = (_name), .active_low = true } | ||
| 296 | static struct gpio_led gpio_leds[] = { | ||
| 297 | ONE_LED(GPIO10_LED_nCharging, "mioa701:charging"), | ||
| 298 | ONE_LED(GPIO97_LED_nBlue, "mioa701:blue"), | ||
| 299 | ONE_LED(GPIO98_LED_nOrange, "mioa701:orange"), | ||
| 300 | ONE_LED(GPIO82_LED_nVibra, "mioa701:vibra"), | ||
| 301 | ONE_LED(GPIO115_LED_nKeyboard, "mioa701:keyboard") | ||
| 302 | }; | ||
| 303 | |||
| 304 | static struct gpio_led_platform_data gpio_led_info = { | ||
| 305 | .leds = gpio_leds, | ||
| 306 | .num_leds = ARRAY_SIZE(gpio_leds), | ||
| 307 | }; | ||
| 308 | |||
| 309 | /* | ||
| 310 | * GSM Sagem XS200 chip | ||
| 311 | * | ||
| 312 | * GSM handling was purged from kernel. For history, this is the way to go : | ||
| 313 | * - init : GPIO24_GSM_MOD_RESET_CMD = 0, GPIO114_GSM_nMOD_DTE_UART_STATE = 1 | ||
| 314 | * GPIO88_GSM_nMOD_ON_CMD = 1, GPIO90_GSM_nMOD_OFF_CMD = 1 | ||
| 315 | * - reset : GPIO24_GSM_MOD_RESET_CMD = 1, msleep(100), | ||
| 316 | * GPIO24_GSM_MOD_RESET_CMD = 0 | ||
| 317 | * - turn on : GPIO88_GSM_nMOD_ON_CMD = 0, msleep(1000), | ||
| 318 | * GPIO88_GSM_nMOD_ON_CMD = 1 | ||
| 319 | * - turn off : GPIO90_GSM_nMOD_OFF_CMD = 0, msleep(1000), | ||
| 320 | * GPIO90_GSM_nMOD_OFF_CMD = 1 | ||
| 321 | */ | ||
| 322 | static int is_gsm_on(void) | ||
| 323 | { | ||
| 324 | int is_on; | ||
| 325 | |||
| 326 | is_on = !!gpio_get_value(GPIO25_GSM_MOD_ON_STATE); | ||
| 327 | return is_on; | ||
| 328 | } | ||
| 329 | |||
| 330 | irqreturn_t gsm_on_irq(int irq, void *p) | ||
| 331 | { | ||
| 332 | printk(KERN_DEBUG "Mioa701: GSM status changed to %s\n", | ||
| 333 | is_gsm_on() ? "on" : "off"); | ||
| 334 | return IRQ_HANDLED; | ||
| 335 | } | ||
| 336 | |||
| 337 | struct gpio_ress gsm_gpios[] = { | ||
| 338 | MIO_GPIO_IN(GPIO25_GSM_MOD_ON_STATE, "GSM state"), | ||
| 339 | MIO_GPIO_IN(GPIO113_GSM_EVENT, "GSM event"), | ||
| 340 | }; | ||
| 341 | |||
| 342 | static int __init gsm_init(void) | ||
| 343 | { | ||
| 344 | int rc; | ||
| 345 | |||
| 346 | rc = mio_gpio_request(ARRAY_AND_SIZE(gsm_gpios)); | ||
| 347 | if (rc) | ||
| 348 | goto err_gpio; | ||
| 349 | rc = request_irq(gpio_to_irq(GPIO25_GSM_MOD_ON_STATE), gsm_on_irq, | ||
| 350 | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, | ||
| 351 | "GSM XS200 Power Irq", NULL); | ||
| 352 | if (rc) | ||
| 353 | goto err_irq; | ||
| 354 | |||
| 355 | gpio_set_wake(GPIO113_GSM_EVENT, 1); | ||
| 356 | return 0; | ||
| 357 | |||
| 358 | err_irq: | ||
| 359 | printk(KERN_ERR "Mioa701: Can't request GSM_ON irq\n"); | ||
| 360 | mio_gpio_free(ARRAY_AND_SIZE(gsm_gpios)); | ||
| 361 | err_gpio: | ||
| 362 | printk(KERN_ERR "Mioa701: gsm not available\n"); | ||
| 363 | return rc; | ||
| 364 | } | ||
| 365 | |||
| 366 | static void gsm_exit(void) | ||
| 367 | { | ||
| 368 | free_irq(gpio_to_irq(GPIO25_GSM_MOD_ON_STATE), NULL); | ||
| 369 | mio_gpio_free(ARRAY_AND_SIZE(gsm_gpios)); | ||
| 370 | } | ||
| 371 | |||
| 372 | /* | ||
| 373 | * Bluetooth BRF6150 chip | ||
| 374 | * | ||
| 375 | * BT handling was purged from kernel. For history, this is the way to go : | ||
| 376 | * - turn on : GPIO83_BT_ON = 1 | ||
| 377 | * - turn off : GPIO83_BT_ON = 0 | ||
| 378 | */ | ||
| 379 | |||
| 380 | /* | ||
| 381 | * GPS Sirf Star III chip | ||
| 382 | * | ||
| 383 | * GPS handling was purged from kernel. For history, this is the way to go : | ||
| 384 | * - init : GPIO23_GPS_UNKNOWN1 = 1, GPIO26_GPS_ON = 0, GPIO27_GPS_RESET = 0 | ||
| 385 | * GPIO106_GPS_UNKNOWN2 = 0, GPIO107_GPS_UNKNOWN3 = 0 | ||
| 386 | * - turn on : GPIO27_GPS_RESET = 1, GPIO26_GPS_ON = 1 | ||
| 387 | * - turn off : GPIO26_GPS_ON = 0, GPIO27_GPS_RESET = 0 | ||
| 388 | */ | ||
| 389 | |||
| 390 | /* | ||
| 391 | * USB UDC | ||
| 392 | */ | ||
| 393 | static void udc_power_command(int cmd) | ||
| 394 | { | ||
| 395 | switch (cmd) { | ||
| 396 | case PXA2XX_UDC_CMD_DISCONNECT: | ||
| 397 | gpio_set_value(GPIO22_USB_ENABLE, 0); | ||
| 398 | break; | ||
| 399 | case PXA2XX_UDC_CMD_CONNECT: | ||
| 400 | gpio_set_value(GPIO22_USB_ENABLE, 1); | ||
| 401 | break; | ||
| 402 | default: | ||
| 403 | printk(KERN_INFO "udc_control: unknown command (0x%x)!\n", cmd); | ||
| 404 | break; | ||
| 405 | } | ||
| 406 | } | ||
| 407 | |||
| 408 | static int is_usb_connected(void) | ||
| 409 | { | ||
| 410 | return !!gpio_get_value(GPIO13_USB_DETECT); | ||
| 411 | } | ||
| 412 | |||
| 413 | static struct pxa2xx_udc_mach_info mioa701_udc_info = { | ||
| 414 | .udc_is_connected = is_usb_connected, | ||
| 415 | .udc_command = udc_power_command, | ||
| 416 | }; | ||
| 417 | |||
| 418 | struct gpio_ress udc_gpios[] = { | ||
| 419 | MIO_GPIO_OUT(GPIO22_USB_ENABLE, 0, "USB Vbus enable") | ||
| 420 | }; | ||
| 421 | |||
| 422 | static int __init udc_init(void) | ||
| 423 | { | ||
| 424 | pxa_set_udc_info(&mioa701_udc_info); | ||
| 425 | return mio_gpio_request(ARRAY_AND_SIZE(udc_gpios)); | ||
| 426 | } | ||
| 427 | |||
| 428 | static void udc_exit(void) | ||
| 429 | { | ||
| 430 | mio_gpio_free(ARRAY_AND_SIZE(udc_gpios)); | ||
| 431 | } | ||
| 432 | |||
| 433 | /* | ||
| 434 | * SDIO/MMC Card controller | ||
| 435 | */ | ||
| 436 | static void mci_setpower(struct device *dev, unsigned int vdd) | ||
| 437 | { | ||
| 438 | struct pxamci_platform_data *p_d = dev->platform_data; | ||
| 439 | |||
| 440 | if ((1 << vdd) & p_d->ocr_mask) | ||
| 441 | gpio_set_value(GPIO91_SDIO_EN, 1); /* enable SDIO power */ | ||
| 442 | else | ||
| 443 | gpio_set_value(GPIO91_SDIO_EN, 0); /* disable SDIO power */ | ||
| 444 | } | ||
| 445 | |||
| 446 | static int mci_get_ro(struct device *dev) | ||
| 447 | { | ||
| 448 | return gpio_get_value(GPIO78_SDIO_RO); | ||
| 449 | } | ||
| 450 | |||
| 451 | struct gpio_ress mci_gpios[] = { | ||
| 452 | MIO_GPIO_IN(GPIO78_SDIO_RO, "SDIO readonly detect"), | ||
| 453 | MIO_GPIO_IN(GPIO15_SDIO_INSERT, "SDIO insertion detect"), | ||
| 454 | MIO_GPIO_OUT(GPIO91_SDIO_EN, 0, "SDIO power enable") | ||
| 455 | }; | ||
| 456 | |||
| 457 | static void mci_exit(struct device *dev, void *data) | ||
| 458 | { | ||
| 459 | mio_gpio_free(ARRAY_AND_SIZE(mci_gpios)); | ||
| 460 | free_irq(gpio_to_irq(GPIO15_SDIO_INSERT), data); | ||
| 461 | } | ||
| 462 | |||
| 463 | static struct pxamci_platform_data mioa701_mci_info; | ||
| 464 | |||
| 465 | /** | ||
| 466 | * The card detect interrupt isn't debounced so we delay it by 250ms | ||
| 467 | * to give the card a chance to fully insert/eject. | ||
| 468 | */ | ||
| 469 | static int mci_init(struct device *dev, irq_handler_t detect_int, void *data) | ||
| 470 | { | ||
| 471 | int rc; | ||
| 472 | int irq = gpio_to_irq(GPIO15_SDIO_INSERT); | ||
| 473 | |||
| 474 | rc = mio_gpio_request(ARRAY_AND_SIZE(mci_gpios)); | ||
| 475 | if (rc) | ||
| 476 | goto err_gpio; | ||
| 477 | /* enable RE/FE interrupt on card insertion and removal */ | ||
| 478 | rc = request_irq(irq, detect_int, | ||
| 479 | IRQF_DISABLED | IRQF_TRIGGER_RISING | | ||
| 480 | IRQF_TRIGGER_FALLING, | ||
| 481 | "MMC card detect", data); | ||
| 482 | if (rc) | ||
| 483 | goto err_irq; | ||
| 484 | |||
| 485 | mioa701_mci_info.detect_delay = msecs_to_jiffies(250); | ||
| 486 | return 0; | ||
| 487 | |||
| 488 | err_irq: | ||
| 489 | dev_err(dev, "mioa701_mci_init: MMC/SD:" | ||
| 490 | " can't request MMC card detect IRQ\n"); | ||
| 491 | mio_gpio_free(ARRAY_AND_SIZE(mci_gpios)); | ||
| 492 | err_gpio: | ||
| 493 | return rc; | ||
| 494 | } | ||
| 495 | |||
| 496 | static struct pxamci_platform_data mioa701_mci_info = { | ||
| 497 | .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, | ||
| 498 | .init = mci_init, | ||
| 499 | .get_ro = mci_get_ro, | ||
| 500 | .setpower = mci_setpower, | ||
| 501 | .exit = mci_exit, | ||
| 502 | }; | ||
| 503 | |||
| 504 | /* FlashRAM */ | ||
| 505 | static struct resource strataflash_resource = { | ||
| 506 | .start = PXA_CS0_PHYS, | ||
| 507 | .end = PXA_CS0_PHYS + SZ_64M - 1, | ||
| 508 | .flags = IORESOURCE_MEM, | ||
| 509 | }; | ||
| 510 | |||
| 511 | static struct physmap_flash_data strataflash_data = { | ||
| 512 | .width = 2, | ||
| 513 | /* .set_vpp = mioa701_set_vpp, */ | ||
| 514 | }; | ||
| 515 | |||
| 516 | static struct platform_device strataflash = { | ||
| 517 | .name = "physmap-flash", | ||
| 518 | .id = -1, | ||
| 519 | .resource = &strataflash_resource, | ||
| 520 | .num_resources = 1, | ||
| 521 | .dev = { | ||
| 522 | .platform_data = &strataflash_data, | ||
| 523 | }, | ||
| 524 | }; | ||
| 525 | |||
| 526 | /* | ||
| 527 | * Suspend/Resume bootstrap management | ||
| 528 | * | ||
| 529 | * MIO A701 reboot sequence is highly ROM dependant. From the one dissassembled, | ||
| 530 | * this sequence is as follows : | ||
| 531 | * - disables interrupts | ||
| 532 | * - initialize SDRAM (self refresh RAM into active RAM) | ||
| 533 | * - initialize GPIOs (depends on value at 0xa020b020) | ||
| 534 | * - initialize coprossessors | ||
| 535 | * - if edge detect on PWR_SCL(GPIO3), then proceed to cold start | ||
| 536 | * - or if value at 0xa020b000 not equal to 0x0f0f0f0f, proceed to cold start | ||
| 537 | * - else do a resume, ie. jump to addr 0xa0100000 | ||
| 538 | */ | ||
| 539 | #define RESUME_ENABLE_ADDR 0xa020b000 | ||
| 540 | #define RESUME_ENABLE_VAL 0x0f0f0f0f | ||
| 541 | #define RESUME_BT_ADDR 0xa020b020 | ||
| 542 | #define RESUME_UNKNOWN_ADDR 0xa020b024 | ||
| 543 | #define RESUME_VECTOR_ADDR 0xa0100000 | ||
| 544 | #define BOOTSTRAP_WORDS mioa701_bootstrap_lg/4 | ||
| 545 | |||
| 546 | static u32 *save_buffer; | ||
| 547 | |||
| 548 | static void install_bootstrap(void) | ||
| 549 | { | ||
| 550 | int i; | ||
| 551 | u32 *rom_bootstrap = phys_to_virt(RESUME_VECTOR_ADDR); | ||
| 552 | u32 *src = &mioa701_bootstrap; | ||
| 553 | |||
| 554 | for (i = 0; i < BOOTSTRAP_WORDS; i++) | ||
| 555 | rom_bootstrap[i] = src[i]; | ||
| 556 | } | ||
| 557 | |||
| 558 | |||
| 559 | static int mioa701_sys_suspend(struct sys_device *sysdev, pm_message_t state) | ||
| 560 | { | ||
| 561 | int i = 0, is_bt_on; | ||
| 562 | u32 *mem_resume_vector = phys_to_virt(RESUME_VECTOR_ADDR); | ||
| 563 | u32 *mem_resume_enabler = phys_to_virt(RESUME_ENABLE_ADDR); | ||
| 564 | u32 *mem_resume_bt = phys_to_virt(RESUME_BT_ADDR); | ||
| 565 | u32 *mem_resume_unknown = phys_to_virt(RESUME_UNKNOWN_ADDR); | ||
| 566 | |||
| 567 | /* Devices prepare suspend */ | ||
| 568 | is_bt_on = gpio_get_value(GPIO83_BT_ON); | ||
| 569 | pxa2xx_mfp_set_lpm(GPIO83_BT_ON, | ||
| 570 | is_bt_on ? MFP_LPM_DRIVE_HIGH : MFP_LPM_DRIVE_LOW); | ||
| 571 | |||
| 572 | for (i = 0; i < BOOTSTRAP_WORDS; i++) | ||
| 573 | save_buffer[i] = mem_resume_vector[i]; | ||
| 574 | save_buffer[i++] = *mem_resume_enabler; | ||
| 575 | save_buffer[i++] = *mem_resume_bt; | ||
| 576 | save_buffer[i++] = *mem_resume_unknown; | ||
| 577 | |||
| 578 | *mem_resume_enabler = RESUME_ENABLE_VAL; | ||
| 579 | *mem_resume_bt = is_bt_on; | ||
| 580 | |||
| 581 | install_bootstrap(); | ||
| 582 | return 0; | ||
| 583 | } | ||
| 584 | |||
| 585 | static int mioa701_sys_resume(struct sys_device *sysdev) | ||
| 586 | { | ||
| 587 | int i = 0; | ||
| 588 | u32 *mem_resume_vector = phys_to_virt(RESUME_VECTOR_ADDR); | ||
| 589 | u32 *mem_resume_enabler = phys_to_virt(RESUME_ENABLE_ADDR); | ||
| 590 | u32 *mem_resume_bt = phys_to_virt(RESUME_BT_ADDR); | ||
| 591 | u32 *mem_resume_unknown = phys_to_virt(RESUME_UNKNOWN_ADDR); | ||
| 592 | |||
| 593 | for (i = 0; i < BOOTSTRAP_WORDS; i++) | ||
| 594 | mem_resume_vector[i] = save_buffer[i]; | ||
| 595 | *mem_resume_enabler = save_buffer[i++]; | ||
| 596 | *mem_resume_bt = save_buffer[i++]; | ||
| 597 | *mem_resume_unknown = save_buffer[i++]; | ||
| 598 | |||
| 599 | return 0; | ||
| 600 | } | ||
| 601 | |||
| 602 | static struct sysdev_class mioa701_sysclass = { | ||
| 603 | .name = "mioa701", | ||
| 604 | }; | ||
| 605 | |||
| 606 | static struct sys_device sysdev_bootstrap = { | ||
| 607 | .cls = &mioa701_sysclass, | ||
| 608 | }; | ||
| 609 | |||
| 610 | static struct sysdev_driver driver_bootstrap = { | ||
| 611 | .suspend = &mioa701_sys_suspend, | ||
| 612 | .resume = &mioa701_sys_resume, | ||
| 613 | }; | ||
| 614 | |||
| 615 | static int __init bootstrap_init(void) | ||
| 616 | { | ||
| 617 | int rc; | ||
| 618 | int save_size = mioa701_bootstrap_lg + (sizeof(u32) * 3); | ||
| 619 | |||
| 620 | rc = sysdev_class_register(&mioa701_sysclass); | ||
| 621 | if (rc) { | ||
| 622 | printk(KERN_ERR "Failed registering mioa701 sys class\n"); | ||
| 623 | return -ENODEV; | ||
| 624 | } | ||
| 625 | rc = sysdev_register(&sysdev_bootstrap); | ||
| 626 | if (rc) { | ||
| 627 | printk(KERN_ERR "Failed registering mioa701 sys device\n"); | ||
| 628 | return -ENODEV; | ||
| 629 | } | ||
| 630 | rc = sysdev_driver_register(&mioa701_sysclass, &driver_bootstrap); | ||
| 631 | if (rc) { | ||
| 632 | printk(KERN_ERR "Failed registering PMU sys driver\n"); | ||
| 633 | return -ENODEV; | ||
| 634 | } | ||
| 635 | |||
| 636 | save_buffer = kmalloc(save_size, GFP_KERNEL); | ||
| 637 | if (!save_buffer) | ||
| 638 | return -ENOMEM; | ||
| 639 | printk(KERN_INFO "MioA701: allocated %d bytes for bootstrap\n", | ||
| 640 | save_size); | ||
| 641 | return 0; | ||
| 642 | } | ||
| 643 | |||
| 644 | static void bootstrap_exit(void) | ||
| 645 | { | ||
| 646 | kfree(save_buffer); | ||
| 647 | sysdev_driver_unregister(&mioa701_sysclass, &driver_bootstrap); | ||
| 648 | sysdev_unregister(&sysdev_bootstrap); | ||
| 649 | sysdev_class_unregister(&mioa701_sysclass); | ||
| 650 | |||
| 651 | printk(KERN_CRIT "Unregistering mioa701 suspend will hang next" | ||
| 652 | "resume !!!\n"); | ||
| 653 | } | ||
| 654 | |||
| 655 | /* | ||
| 656 | * Power Supply | ||
| 657 | */ | ||
| 658 | static char *supplicants[] = { | ||
| 659 | "mioa701_battery" | ||
| 660 | }; | ||
| 661 | |||
| 662 | static void mioa701_set_charge(int flags) | ||
| 663 | { | ||
| 664 | gpio_set_value(GPIO9_CHARGE_nEN, !flags); | ||
| 665 | } | ||
| 666 | |||
| 667 | static struct pda_power_pdata power_pdata = { | ||
| 668 | .is_ac_online = is_usb_connected, | ||
| 669 | .set_charge = mioa701_set_charge, | ||
| 670 | .supplied_to = supplicants, | ||
| 671 | .num_supplicants = ARRAY_SIZE(supplicants), | ||
| 672 | }; | ||
| 673 | |||
| 674 | static struct resource power_resources[] = { | ||
| 675 | [0] = { | ||
| 676 | .name = "ac", | ||
| 677 | .start = gpio_to_irq(GPIO13_USB_DETECT), | ||
| 678 | .end = gpio_to_irq(GPIO13_USB_DETECT), | ||
| 679 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE | | ||
| 680 | IORESOURCE_IRQ_LOWEDGE, | ||
| 681 | }, | ||
| 682 | }; | ||
| 683 | |||
| 684 | static struct platform_device power_dev = { | ||
| 685 | .name = "pda-power", | ||
| 686 | .id = -1, | ||
| 687 | .resource = power_resources, | ||
| 688 | .num_resources = ARRAY_SIZE(power_resources), | ||
| 689 | .dev = { | ||
| 690 | .platform_data = &power_pdata, | ||
| 691 | }, | ||
| 692 | }; | ||
| 693 | |||
| 694 | #if defined(CONFIG_PDA_POWER) && defined(CONFIG_TOUCHSCREEN_WM97XX) | ||
| 695 | static struct wm97xx *battery_wm; | ||
| 696 | |||
| 697 | static enum power_supply_property battery_props[] = { | ||
| 698 | POWER_SUPPLY_PROP_STATUS, | ||
| 699 | POWER_SUPPLY_PROP_VOLTAGE_MAX_DESIGN, | ||
| 700 | POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN, | ||
| 701 | POWER_SUPPLY_PROP_VOLTAGE_NOW, | ||
| 702 | POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN, /* Necessary for apm */ | ||
| 703 | }; | ||
| 704 | |||
| 705 | static int get_battery_voltage(void) | ||
| 706 | { | ||
| 707 | int adc = -1; | ||
| 708 | |||
| 709 | if (battery_wm) | ||
| 710 | adc = wm97xx_read_aux_adc(battery_wm, WM97XX_AUX_ID1); | ||
| 711 | return adc; | ||
| 712 | } | ||
| 713 | |||
| 714 | static int get_battery_status(struct power_supply *b) | ||
| 715 | { | ||
| 716 | int status; | ||
| 717 | |||
| 718 | if (is_usb_connected()) | ||
| 719 | status = POWER_SUPPLY_STATUS_CHARGING; | ||
| 720 | else | ||
| 721 | status = POWER_SUPPLY_STATUS_DISCHARGING; | ||
| 722 | |||
| 723 | return status; | ||
| 724 | } | ||
| 725 | |||
| 726 | static int get_property(struct power_supply *b, | ||
| 727 | enum power_supply_property psp, | ||
| 728 | union power_supply_propval *val) | ||
| 729 | { | ||
| 730 | int rc = 0; | ||
| 731 | |||
| 732 | switch (psp) { | ||
| 733 | case POWER_SUPPLY_PROP_STATUS: | ||
| 734 | val->intval = get_battery_status(b); | ||
| 735 | break; | ||
| 736 | case POWER_SUPPLY_PROP_VOLTAGE_MAX_DESIGN: | ||
| 737 | val->intval = 0xfd0; | ||
| 738 | break; | ||
| 739 | case POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN: | ||
| 740 | val->intval = 0xc00; | ||
| 741 | break; | ||
| 742 | case POWER_SUPPLY_PROP_VOLTAGE_NOW: | ||
| 743 | val->intval = get_battery_voltage(); | ||
| 744 | break; | ||
| 745 | case POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN: | ||
| 746 | val->intval = 100; | ||
| 747 | break; | ||
| 748 | default: | ||
| 749 | val->intval = -1; | ||
| 750 | rc = -1; | ||
| 751 | } | ||
| 752 | |||
| 753 | return rc; | ||
| 754 | }; | ||
| 755 | |||
| 756 | static struct power_supply battery_ps = { | ||
| 757 | .name = "mioa701_battery", | ||
| 758 | .type = POWER_SUPPLY_TYPE_BATTERY, | ||
| 759 | .get_property = get_property, | ||
| 760 | .properties = battery_props, | ||
| 761 | .num_properties = ARRAY_SIZE(battery_props), | ||
| 762 | }; | ||
| 763 | |||
| 764 | static int battery_probe(struct platform_device *pdev) | ||
| 765 | { | ||
| 766 | struct wm97xx *wm = platform_get_drvdata(pdev); | ||
| 767 | int rc; | ||
| 768 | |||
| 769 | battery_wm = wm; | ||
| 770 | |||
| 771 | rc = power_supply_register(NULL, &battery_ps); | ||
| 772 | if (rc) | ||
| 773 | dev_err(&pdev->dev, | ||
| 774 | "Could not register mioa701 battery -> %d\n", rc); | ||
| 775 | return rc; | ||
| 776 | } | ||
| 777 | |||
| 778 | static int battery_remove(struct platform_device *pdev) | ||
| 779 | { | ||
| 780 | battery_wm = NULL; | ||
| 781 | return 0; | ||
| 782 | } | ||
| 783 | |||
| 784 | static struct platform_driver mioa701_battery_driver = { | ||
| 785 | .driver = { | ||
| 786 | .name = "wm97xx-battery", | ||
| 787 | }, | ||
| 788 | .probe = battery_probe, | ||
| 789 | .remove = battery_remove | ||
| 790 | }; | ||
| 791 | |||
| 792 | static int __init mioa701_battery_init(void) | ||
| 793 | { | ||
| 794 | int rc; | ||
| 795 | |||
| 796 | rc = platform_driver_register(&mioa701_battery_driver); | ||
| 797 | if (rc) | ||
| 798 | printk(KERN_ERR "Could not register mioa701 battery driver\n"); | ||
| 799 | return rc; | ||
| 800 | } | ||
| 801 | |||
| 802 | #else | ||
| 803 | static int __init mioa701_battery_init(void) | ||
| 804 | { | ||
| 805 | return 0; | ||
| 806 | } | ||
| 807 | #endif | ||
| 808 | |||
| 809 | /* | ||
| 810 | * Mio global | ||
| 811 | */ | ||
| 812 | |||
| 813 | /* Devices */ | ||
| 814 | #define MIO_PARENT_DEV(var, strname, tparent, pdata) \ | ||
| 815 | static struct platform_device var = { \ | ||
| 816 | .name = strname, \ | ||
| 817 | .id = -1, \ | ||
| 818 | .dev = { \ | ||
| 819 | .platform_data = pdata, \ | ||
| 820 | .parent = tparent, \ | ||
| 821 | }, \ | ||
| 822 | }; | ||
| 823 | #define MIO_SIMPLE_DEV(var, strname, pdata) \ | ||
| 824 | MIO_PARENT_DEV(var, strname, NULL, pdata) | ||
| 825 | |||
| 826 | MIO_SIMPLE_DEV(mioa701_gpio_keys, "gpio-keys", &mioa701_gpio_keys_data) | ||
| 827 | MIO_PARENT_DEV(mioa701_backlight, "pwm-backlight", &pxa27x_device_pwm0.dev, | ||
| 828 | &mioa701_backlight_data); | ||
| 829 | MIO_SIMPLE_DEV(mioa701_led, "leds-gpio", &gpio_led_info) | ||
| 830 | MIO_SIMPLE_DEV(pxa2xx_pcm, "pxa2xx-pcm", NULL) | ||
| 831 | MIO_SIMPLE_DEV(pxa2xx_ac97, "pxa2xx-ac97", NULL) | ||
| 832 | MIO_PARENT_DEV(mio_wm9713_codec, "wm9713-codec", &pxa2xx_ac97.dev, NULL) | ||
| 833 | MIO_SIMPLE_DEV(mioa701_sound, "mioa701-wm9713", NULL) | ||
| 834 | MIO_SIMPLE_DEV(mioa701_board, "mioa701-board", NULL) | ||
| 835 | |||
| 836 | static struct platform_device *devices[] __initdata = { | ||
| 837 | &mioa701_gpio_keys, | ||
| 838 | &mioa701_backlight, | ||
| 839 | &mioa701_led, | ||
| 840 | &pxa2xx_pcm, | ||
| 841 | &pxa2xx_ac97, | ||
| 842 | &mio_wm9713_codec, | ||
| 843 | &mioa701_sound, | ||
| 844 | &power_dev, | ||
| 845 | &strataflash, | ||
| 846 | &mioa701_board | ||
| 847 | }; | ||
| 848 | |||
| 849 | static void mioa701_machine_exit(void); | ||
| 850 | |||
| 851 | static void mioa701_poweroff(void) | ||
| 852 | { | ||
| 853 | mioa701_machine_exit(); | ||
| 854 | gpio_set_value(GPIO18_POWEROFF, 1); | ||
| 855 | } | ||
| 856 | |||
| 857 | static void mioa701_restart(char c) | ||
| 858 | { | ||
| 859 | mioa701_machine_exit(); | ||
| 860 | arm_machine_restart(c); | ||
| 861 | } | ||
| 862 | |||
| 863 | struct gpio_ress global_gpios[] = { | ||
| 864 | MIO_GPIO_OUT(GPIO9_CHARGE_nEN, 1, "Charger enable"), | ||
| 865 | MIO_GPIO_OUT(GPIO18_POWEROFF, 0, "Power Off"), | ||
| 866 | MIO_GPIO_OUT(GPIO87_LCD_POWER, 0, "LCD Power") | ||
| 867 | }; | ||
| 868 | |||
| 869 | static void __init mioa701_machine_init(void) | ||
| 870 | { | ||
| 871 | PSLR = 0xff100000; /* SYSDEL=125ms, PWRDEL=125ms, PSLR_SL_ROD=1 */ | ||
| 872 | PCFR = PCFR_DC_EN | PCFR_GPR_EN | PCFR_OPDE; | ||
| 873 | RTTR = 32768 - 1; /* Reset crazy WinCE value */ | ||
| 874 | UP2OCR = UP2OCR_HXOE; | ||
| 875 | |||
| 876 | pxa2xx_mfp_config(ARRAY_AND_SIZE(mioa701_pin_config)); | ||
| 877 | mio_gpio_request(ARRAY_AND_SIZE(global_gpios)); | ||
| 878 | bootstrap_init(); | ||
| 879 | set_pxa_fb_info(&mioa701_pxafb_info); | ||
| 880 | pxa_set_mci_info(&mioa701_mci_info); | ||
| 881 | pxa_set_keypad_info(&mioa701_keypad_info); | ||
| 882 | udc_init(); | ||
| 883 | pm_power_off = mioa701_poweroff; | ||
| 884 | arm_pm_restart = mioa701_restart; | ||
| 885 | platform_add_devices(devices, ARRAY_SIZE(devices)); | ||
| 886 | gsm_init(); | ||
| 887 | mioa701_battery_init(); | ||
| 888 | } | ||
| 889 | |||
| 890 | static void mioa701_machine_exit(void) | ||
| 891 | { | ||
| 892 | udc_exit(); | ||
| 893 | bootstrap_exit(); | ||
| 894 | gsm_exit(); | ||
| 895 | } | ||
| 896 | |||
| 897 | MACHINE_START(MIOA701, "MIO A701") | ||
| 898 | .phys_io = 0x40000000, | ||
| 899 | .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, | ||
| 900 | .boot_params = 0xa0000100, | ||
| 901 | .map_io = &pxa_map_io, | ||
| 902 | .init_irq = &pxa27x_init_irq, | ||
| 903 | .init_machine = mioa701_machine_init, | ||
| 904 | .timer = &pxa_timer, | ||
| 905 | MACHINE_END | ||
diff --git a/arch/arm/mach-pxa/mioa701_bootresume.S b/arch/arm/mach-pxa/mioa701_bootresume.S new file mode 100644 index 000000000000..a647693d9856 --- /dev/null +++ b/arch/arm/mach-pxa/mioa701_bootresume.S | |||
| @@ -0,0 +1,36 @@ | |||
| 1 | /* Bootloader to resume MIO A701 | ||
| 2 | * | ||
| 3 | * 2007-1-12 Robert Jarzmik | ||
| 4 | * | ||
| 5 | * This code is licenced under the GPLv2. | ||
| 6 | */ | ||
| 7 | |||
| 8 | #include <linux/linkage.h> | ||
| 9 | #include <asm/assembler.h> | ||
| 10 | |||
| 11 | /* | ||
| 12 | * Note: Yes, part of the following code is located into the .data section. | ||
| 13 | * This is to allow jumpaddr to be accessed with a relative load | ||
| 14 | * while we can't rely on any MMU translation. We could have put | ||
| 15 | * sleep_save_sp in the .text section as well, but some setups might | ||
| 16 | * insist on it to be truly read-only. | ||
| 17 | */ | ||
| 18 | .data | ||
| 19 | ENTRY(mioa701_bootstrap) | ||
| 20 | 0: | ||
| 21 | b 1f | ||
| 22 | ENTRY(mioa701_jumpaddr) | ||
| 23 | .word 0x40f00008 @ PSPR in no-MMU mode | ||
| 24 | 1: | ||
| 25 | mov r0, #0xa0000000 @ Don't suppose memory access works | ||
| 26 | orr r0, r0, #0x00200000 @ even if it's supposed to | ||
| 27 | mov r1, #0 | ||
| 28 | str r1, [r0] @ Early disable resume for next boot | ||
| 29 | ldr r0, mioa701_jumpaddr @ (Murphy's Law) | ||
| 30 | ldr r0, [r0] | ||
| 31 | mov pc, r0 | ||
| 32 | 2: | ||
| 33 | |||
| 34 | ENTRY(mioa701_bootstrap_lg) | ||
| 35 | .data | ||
| 36 | .word 2b-0b | ||
diff --git a/arch/arm/mach-pxa/mp900.c b/arch/arm/mach-pxa/mp900.c new file mode 100644 index 000000000000..8a73814126b1 --- /dev/null +++ b/arch/arm/mach-pxa/mp900.c | |||
| @@ -0,0 +1,100 @@ | |||
| 1 | /* | ||
| 2 | * linux/arch/arm/mach-pxa/mp900.c | ||
| 3 | * | ||
| 4 | * Support for the NEC MobilePro900/C platform | ||
| 5 | * | ||
| 6 | * Based on mach-pxa/gumstix.c | ||
| 7 | * | ||
| 8 | * 2007, 2008 Kristoffer Ericson <kristoffer.ericson@gmail.com> | ||
| 9 | * 2007, 2008 Michael Petchkovsky <mkpetch@internode.on.net> | ||
| 10 | * | ||
| 11 | * This program is free software; you can redistribute it and/or modify | ||
| 12 | * it under the terms of the GNU General Public License version 2 as | ||
| 13 | * published by the Free Software Foundation. | ||
| 14 | */ | ||
| 15 | |||
| 16 | #include <linux/init.h> | ||
| 17 | #include <linux/device.h> | ||
| 18 | #include <linux/platform_device.h> | ||
| 19 | #include <linux/types.h> | ||
| 20 | #include <linux/usb/isp116x.h> | ||
| 21 | |||
| 22 | #include <mach/hardware.h> | ||
| 23 | #include <mach/pxa-regs.h> | ||
| 24 | #include <asm/mach-types.h> | ||
| 25 | #include <asm/mach/arch.h> | ||
| 26 | #include "generic.h" | ||
| 27 | |||
| 28 | static void isp116x_pfm_delay(struct device *dev, int delay) | ||
| 29 | { | ||
| 30 | |||
| 31 | /* 400Mhz PXA2 = 2.5ns / instruction */ | ||
| 32 | |||
| 33 | int cyc = delay / 10; | ||
| 34 | |||
| 35 | /* 4 Instructions = 4 x 2.5ns = 10ns */ | ||
| 36 | __asm__ volatile ("0:\n" | ||
| 37 | "subs %0, %1, #1\n" | ||
| 38 | "bge 0b\n" | ||
| 39 | :"=r" (cyc) | ||
| 40 | :"0"(cyc) | ||
| 41 | ); | ||
| 42 | } | ||
| 43 | |||
| 44 | static struct isp116x_platform_data isp116x_pfm_data = { | ||
| 45 | .remote_wakeup_enable = 1, | ||
| 46 | .delay = isp116x_pfm_delay, | ||
| 47 | }; | ||
| 48 | |||
| 49 | static struct resource isp116x_pfm_resources[] = { | ||
| 50 | [0] = { | ||
| 51 | .start = 0x0d000000, | ||
| 52 | .end = 0x0d000000 + 1, | ||
| 53 | .flags = IORESOURCE_MEM, | ||
| 54 | }, | ||
| 55 | [1] = { | ||
| 56 | .start = 0x0d000000 + 4, | ||
| 57 | .end = 0x0d000000 + 5, | ||
| 58 | .flags = IORESOURCE_MEM, | ||
| 59 | }, | ||
| 60 | [2] = { | ||
| 61 | .start = 61, | ||
| 62 | .end = 61, | ||
| 63 | .flags = IORESOURCE_IRQ, | ||
| 64 | }, | ||
| 65 | }; | ||
| 66 | |||
| 67 | static struct platform_device mp900c_dummy_device = { | ||
| 68 | .name = "mp900c_dummy", | ||
| 69 | .id = -1, | ||
| 70 | }; | ||
| 71 | |||
| 72 | static struct platform_device mp900c_usb = { | ||
| 73 | .name = "isp116x-hcd", | ||
| 74 | .num_resources = ARRAY_SIZE(isp116x_pfm_resources), | ||
| 75 | .resource = isp116x_pfm_resources, | ||
| 76 | .dev.platform_data = &isp116x_pfm_data, | ||
| 77 | }; | ||
| 78 | |||
| 79 | static struct platform_device *devices[] __initdata = { | ||
| 80 | &mp900c_dummy_device, | ||
| 81 | &mp900c_usb, | ||
| 82 | }; | ||
| 83 | |||
| 84 | static void __init mp900c_init(void) | ||
| 85 | { | ||
| 86 | printk(KERN_INFO "MobilePro 900/C machine init\n"); | ||
| 87 | platform_add_devices(devices, ARRAY_SIZE(devices)); | ||
| 88 | } | ||
| 89 | |||
| 90 | /* Maintainer - Michael Petchkovsky <mkpetch@internode.on.net> */ | ||
| 91 | MACHINE_START(NEC_MP900, "MobilePro900/C") | ||
| 92 | .phys_io = 0x40000000, | ||
| 93 | .boot_params = 0xa0220100, | ||
| 94 | .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, | ||
| 95 | .timer = &pxa_timer, | ||
| 96 | .map_io = pxa_map_io, | ||
| 97 | .init_irq = pxa25x_init_irq, | ||
| 98 | .init_machine = mp900c_init, | ||
| 99 | MACHINE_END | ||
| 100 | |||
diff --git a/arch/arm/mach-pxa/palmtx.c b/arch/arm/mach-pxa/palmtx.c index fe924a23debe..4447711c9fc6 100644 --- a/arch/arm/mach-pxa/palmtx.c +++ b/arch/arm/mach-pxa/palmtx.c | |||
| @@ -25,6 +25,8 @@ | |||
| 25 | #include <linux/pda_power.h> | 25 | #include <linux/pda_power.h> |
| 26 | #include <linux/pwm_backlight.h> | 26 | #include <linux/pwm_backlight.h> |
| 27 | #include <linux/gpio.h> | 27 | #include <linux/gpio.h> |
| 28 | #include <linux/wm97xx_batt.h> | ||
| 29 | #include <linux/power_supply.h> | ||
| 28 | 30 | ||
| 29 | #include <asm/mach-types.h> | 31 | #include <asm/mach-types.h> |
| 30 | #include <asm/mach/arch.h> | 32 | #include <asm/mach/arch.h> |
| @@ -340,6 +342,23 @@ static struct platform_device power_supply = { | |||
| 340 | }; | 342 | }; |
| 341 | 343 | ||
| 342 | /****************************************************************************** | 344 | /****************************************************************************** |
| 345 | * WM97xx battery | ||
| 346 | ******************************************************************************/ | ||
| 347 | static struct wm97xx_batt_info wm97xx_batt_pdata = { | ||
| 348 | .batt_aux = WM97XX_AUX_ID3, | ||
| 349 | .temp_aux = WM97XX_AUX_ID2, | ||
| 350 | .charge_gpio = -1, | ||
| 351 | .max_voltage = PALMTX_BAT_MAX_VOLTAGE, | ||
| 352 | .min_voltage = PALMTX_BAT_MIN_VOLTAGE, | ||
| 353 | .batt_mult = 1000, | ||
| 354 | .batt_div = 414, | ||
| 355 | .temp_mult = 1, | ||
| 356 | .temp_div = 1, | ||
| 357 | .batt_tech = POWER_SUPPLY_TECHNOLOGY_LIPO, | ||
| 358 | .batt_name = "main-batt", | ||
| 359 | }; | ||
| 360 | |||
| 361 | /****************************************************************************** | ||
| 343 | * Framebuffer | 362 | * Framebuffer |
| 344 | ******************************************************************************/ | 363 | ******************************************************************************/ |
| 345 | static struct pxafb_mode_info palmtx_lcd_modes[] = { | 364 | static struct pxafb_mode_info palmtx_lcd_modes[] = { |
| @@ -401,6 +420,7 @@ static void __init palmtx_init(void) | |||
| 401 | pxa_set_ac97_info(NULL); | 420 | pxa_set_ac97_info(NULL); |
| 402 | pxa_set_ficp_info(&palmtx_ficp_platform_data); | 421 | pxa_set_ficp_info(&palmtx_ficp_platform_data); |
| 403 | pxa_set_keypad_info(&palmtx_keypad_platform_data); | 422 | pxa_set_keypad_info(&palmtx_keypad_platform_data); |
| 423 | wm97xx_bat_set_pdata(&wm97xx_batt_pdata); | ||
| 404 | 424 | ||
| 405 | platform_add_devices(devices, ARRAY_SIZE(devices)); | 425 | platform_add_devices(devices, ARRAY_SIZE(devices)); |
| 406 | } | 426 | } |
diff --git a/arch/arm/mach-pxa/palmz72.c b/arch/arm/mach-pxa/palmz72.c new file mode 100644 index 000000000000..2f730da3bba8 --- /dev/null +++ b/arch/arm/mach-pxa/palmz72.c | |||
| @@ -0,0 +1,554 @@ | |||
| 1 | /* | ||
| 2 | * Hardware definitions for Palm Zire72 | ||
| 3 | * | ||
| 4 | * Authors: | ||
| 5 | * Vladimir "Farcaller" Pouzanov <farcaller@gmail.com> | ||
| 6 | * Sergey Lapin <slapin@ossfans.org> | ||
| 7 | * Alex Osborne <bobofdoom@gmail.com> | ||
| 8 | * Jan Herman <2hp@seznam.cz> | ||
| 9 | * | ||
| 10 | * Rewrite for mainline: | ||
| 11 | * Marek Vasut <marek.vasut@gmail.com> | ||
| 12 | * | ||
| 13 | * This program is free software; you can redistribute it and/or modify | ||
| 14 | * it under the terms of the GNU General Public License version 2 as | ||
| 15 | * published by the Free Software Foundation. | ||
| 16 | * | ||
| 17 | * (find more info at www.hackndev.com) | ||
| 18 | * | ||
| 19 | */ | ||
| 20 | |||
| 21 | #include <linux/platform_device.h> | ||
| 22 | #include <linux/sysdev.h> | ||
| 23 | #include <linux/delay.h> | ||
| 24 | #include <linux/irq.h> | ||
| 25 | #include <linux/gpio_keys.h> | ||
| 26 | #include <linux/input.h> | ||
| 27 | #include <linux/pda_power.h> | ||
| 28 | #include <linux/pwm_backlight.h> | ||
| 29 | #include <linux/gpio.h> | ||
| 30 | #include <linux/power_supply.h> | ||
| 31 | |||
| 32 | #include <asm/mach-types.h> | ||
| 33 | #include <asm/mach/arch.h> | ||
| 34 | #include <asm/mach/map.h> | ||
| 35 | |||
| 36 | #include <mach/audio.h> | ||
| 37 | #include <mach/palmz72.h> | ||
| 38 | #include <mach/mmc.h> | ||
| 39 | #include <mach/pxafb.h> | ||
| 40 | #include <mach/pxa-regs.h> | ||
| 41 | #include <mach/pxa2xx-regs.h> | ||
| 42 | #include <mach/mfp-pxa27x.h> | ||
| 43 | #include <mach/irda.h> | ||
| 44 | #include <mach/pxa27x_keypad.h> | ||
| 45 | #include <mach/udc.h> | ||
| 46 | #include <mach/pm.h> | ||
| 47 | |||
| 48 | #include "generic.h" | ||
| 49 | #include "devices.h" | ||
| 50 | |||
| 51 | /****************************************************************************** | ||
| 52 | * Pin configuration | ||
| 53 | ******************************************************************************/ | ||
| 54 | static unsigned long palmz72_pin_config[] __initdata = { | ||
| 55 | /* MMC */ | ||
| 56 | GPIO32_MMC_CLK, | ||
| 57 | GPIO92_MMC_DAT_0, | ||
| 58 | GPIO109_MMC_DAT_1, | ||
| 59 | GPIO110_MMC_DAT_2, | ||
| 60 | GPIO111_MMC_DAT_3, | ||
| 61 | GPIO112_MMC_CMD, | ||
| 62 | GPIO14_GPIO, /* SD detect */ | ||
| 63 | GPIO115_GPIO, /* SD RO */ | ||
| 64 | GPIO98_GPIO, /* SD power */ | ||
| 65 | |||
| 66 | /* AC97 */ | ||
| 67 | GPIO28_AC97_BITCLK, | ||
| 68 | GPIO29_AC97_SDATA_IN_0, | ||
| 69 | GPIO30_AC97_SDATA_OUT, | ||
| 70 | GPIO31_AC97_SYNC, | ||
| 71 | |||
| 72 | /* IrDA */ | ||
| 73 | GPIO49_GPIO, /* ir disable */ | ||
| 74 | GPIO46_FICP_RXD, | ||
| 75 | GPIO47_FICP_TXD, | ||
| 76 | |||
| 77 | /* PWM */ | ||
| 78 | GPIO16_PWM0_OUT, | ||
| 79 | |||
| 80 | /* USB */ | ||
| 81 | GPIO15_GPIO, /* usb detect */ | ||
| 82 | GPIO12_GPIO, /* usb pullup */ | ||
| 83 | GPIO95_GPIO, /* usb power */ | ||
| 84 | |||
| 85 | /* Matrix keypad */ | ||
| 86 | GPIO100_KP_MKIN_0 | WAKEUP_ON_LEVEL_HIGH, | ||
| 87 | GPIO101_KP_MKIN_1 | WAKEUP_ON_LEVEL_HIGH, | ||
| 88 | GPIO102_KP_MKIN_2 | WAKEUP_ON_LEVEL_HIGH, | ||
| 89 | GPIO97_KP_MKIN_3 | WAKEUP_ON_LEVEL_HIGH, | ||
| 90 | GPIO103_KP_MKOUT_0, | ||
| 91 | GPIO104_KP_MKOUT_1, | ||
| 92 | GPIO105_KP_MKOUT_2, | ||
| 93 | |||
| 94 | /* LCD */ | ||
| 95 | GPIO58_LCD_LDD_0, | ||
| 96 | GPIO59_LCD_LDD_1, | ||
| 97 | GPIO60_LCD_LDD_2, | ||
| 98 | GPIO61_LCD_LDD_3, | ||
| 99 | GPIO62_LCD_LDD_4, | ||
| 100 | GPIO63_LCD_LDD_5, | ||
| 101 | GPIO64_LCD_LDD_6, | ||
| 102 | GPIO65_LCD_LDD_7, | ||
| 103 | GPIO66_LCD_LDD_8, | ||
| 104 | GPIO67_LCD_LDD_9, | ||
| 105 | GPIO68_LCD_LDD_10, | ||
| 106 | GPIO69_LCD_LDD_11, | ||
| 107 | GPIO70_LCD_LDD_12, | ||
| 108 | GPIO71_LCD_LDD_13, | ||
| 109 | GPIO72_LCD_LDD_14, | ||
| 110 | GPIO73_LCD_LDD_15, | ||
| 111 | GPIO74_LCD_FCLK, | ||
| 112 | GPIO75_LCD_LCLK, | ||
| 113 | GPIO76_LCD_PCLK, | ||
| 114 | GPIO77_LCD_BIAS, | ||
| 115 | GPIO20_GPIO, /* bl power */ | ||
| 116 | GPIO21_GPIO, /* LCD border switch */ | ||
| 117 | GPIO22_GPIO, /* LCD border color */ | ||
| 118 | GPIO96_GPIO, /* lcd power */ | ||
| 119 | |||
| 120 | /* Misc. */ | ||
| 121 | GPIO0_GPIO | WAKEUP_ON_LEVEL_HIGH, /* power detect */ | ||
| 122 | GPIO88_GPIO, /* green led */ | ||
| 123 | GPIO27_GPIO, /* WM9712 IRQ */ | ||
| 124 | }; | ||
| 125 | |||
| 126 | /****************************************************************************** | ||
| 127 | * SD/MMC card controller | ||
| 128 | ******************************************************************************/ | ||
| 129 | static int palmz72_mci_init(struct device *dev, | ||
| 130 | irq_handler_t palmz72_detect_int, void *data) | ||
| 131 | { | ||
| 132 | int err = 0; | ||
| 133 | |||
| 134 | /* Setup an interrupt for detecting card insert/remove events */ | ||
| 135 | err = gpio_request(GPIO_NR_PALMZ72_SD_DETECT_N, "SD IRQ"); | ||
| 136 | if (err) | ||
| 137 | goto err; | ||
| 138 | err = gpio_direction_input(GPIO_NR_PALMZ72_SD_DETECT_N); | ||
| 139 | if (err) | ||
| 140 | goto err2; | ||
| 141 | err = request_irq(gpio_to_irq(GPIO_NR_PALMZ72_SD_DETECT_N), | ||
| 142 | palmz72_detect_int, IRQF_DISABLED | IRQF_SAMPLE_RANDOM | | ||
| 143 | IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING, | ||
| 144 | "SD/MMC card detect", data); | ||
| 145 | if (err) { | ||
| 146 | printk(KERN_ERR "%s: cannot request SD/MMC card detect IRQ\n", | ||
| 147 | __func__); | ||
| 148 | goto err2; | ||
| 149 | } | ||
| 150 | |||
| 151 | /* SD_POWER is not actually power, but it is more like chip | ||
| 152 | * select, i.e. it is inverted */ | ||
| 153 | |||
| 154 | err = gpio_request(GPIO_NR_PALMZ72_SD_POWER_N, "SD_POWER"); | ||
| 155 | if (err) | ||
| 156 | goto err3; | ||
| 157 | err = gpio_direction_output(GPIO_NR_PALMZ72_SD_POWER_N, 0); | ||
| 158 | if (err) | ||
| 159 | goto err4; | ||
| 160 | err = gpio_request(GPIO_NR_PALMZ72_SD_RO, "SD_RO"); | ||
| 161 | if (err) | ||
| 162 | goto err4; | ||
| 163 | err = gpio_direction_input(GPIO_NR_PALMZ72_SD_RO); | ||
| 164 | if (err) | ||
| 165 | goto err5; | ||
| 166 | |||
| 167 | printk(KERN_DEBUG "%s: irq registered\n", __func__); | ||
| 168 | |||
| 169 | return 0; | ||
| 170 | |||
| 171 | err5: | ||
| 172 | gpio_free(GPIO_NR_PALMZ72_SD_RO); | ||
| 173 | err4: | ||
| 174 | gpio_free(GPIO_NR_PALMZ72_SD_POWER_N); | ||
| 175 | err3: | ||
| 176 | free_irq(gpio_to_irq(GPIO_NR_PALMZ72_SD_DETECT_N), data); | ||
| 177 | err2: | ||
| 178 | gpio_free(GPIO_NR_PALMZ72_SD_DETECT_N); | ||
| 179 | err: | ||
| 180 | return err; | ||
| 181 | } | ||
| 182 | |||
| 183 | static void palmz72_mci_exit(struct device *dev, void *data) | ||
| 184 | { | ||
| 185 | gpio_free(GPIO_NR_PALMZ72_SD_POWER_N); | ||
| 186 | free_irq(gpio_to_irq(GPIO_NR_PALMZ72_SD_DETECT_N), data); | ||
| 187 | gpio_free(GPIO_NR_PALMZ72_SD_DETECT_N); | ||
| 188 | gpio_free(GPIO_NR_PALMZ72_SD_RO); | ||
| 189 | } | ||
| 190 | |||
| 191 | static void palmz72_mci_power(struct device *dev, unsigned int vdd) | ||
| 192 | { | ||
| 193 | struct pxamci_platform_data *p_d = dev->platform_data; | ||
| 194 | if (p_d->ocr_mask & (1 << vdd)) | ||
| 195 | gpio_set_value(GPIO_NR_PALMZ72_SD_POWER_N, 0); | ||
| 196 | else | ||
| 197 | gpio_set_value(GPIO_NR_PALMZ72_SD_POWER_N, 1); | ||
| 198 | } | ||
| 199 | |||
| 200 | static int palmz72_mci_ro(struct device *dev) | ||
| 201 | { | ||
| 202 | return gpio_get_value(GPIO_NR_PALMZ72_SD_RO); | ||
| 203 | } | ||
| 204 | |||
| 205 | static struct pxamci_platform_data palmz72_mci_platform_data = { | ||
| 206 | .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, | ||
| 207 | .setpower = palmz72_mci_power, | ||
| 208 | .get_ro = palmz72_mci_ro, | ||
| 209 | .init = palmz72_mci_init, | ||
| 210 | .exit = palmz72_mci_exit, | ||
| 211 | }; | ||
| 212 | |||
| 213 | /****************************************************************************** | ||
| 214 | * GPIO keyboard | ||
| 215 | ******************************************************************************/ | ||
| 216 | static unsigned int palmz72_matrix_keys[] = { | ||
| 217 | KEY(0, 0, KEY_POWER), | ||
| 218 | KEY(0, 1, KEY_F1), | ||
| 219 | KEY(0, 2, KEY_ENTER), | ||
| 220 | |||
| 221 | KEY(1, 0, KEY_F2), | ||
| 222 | KEY(1, 1, KEY_F3), | ||
| 223 | KEY(1, 2, KEY_F4), | ||
| 224 | |||
| 225 | KEY(2, 0, KEY_UP), | ||
| 226 | KEY(2, 2, KEY_DOWN), | ||
| 227 | |||
| 228 | KEY(3, 0, KEY_RIGHT), | ||
| 229 | KEY(3, 2, KEY_LEFT), | ||
| 230 | }; | ||
| 231 | |||
| 232 | static struct pxa27x_keypad_platform_data palmz72_keypad_platform_data = { | ||
| 233 | .matrix_key_rows = 4, | ||
| 234 | .matrix_key_cols = 3, | ||
| 235 | .matrix_key_map = palmz72_matrix_keys, | ||
| 236 | .matrix_key_map_size = ARRAY_SIZE(palmz72_matrix_keys), | ||
| 237 | |||
| 238 | .debounce_interval = 30, | ||
| 239 | }; | ||
| 240 | |||
| 241 | /****************************************************************************** | ||
| 242 | * Backlight | ||
| 243 | ******************************************************************************/ | ||
| 244 | static int palmz72_backlight_init(struct device *dev) | ||
| 245 | { | ||
| 246 | int ret; | ||
| 247 | |||
| 248 | ret = gpio_request(GPIO_NR_PALMZ72_BL_POWER, "BL POWER"); | ||
| 249 | if (ret) | ||
| 250 | goto err; | ||
| 251 | ret = gpio_direction_output(GPIO_NR_PALMZ72_BL_POWER, 0); | ||
| 252 | if (ret) | ||
| 253 | goto err2; | ||
| 254 | ret = gpio_request(GPIO_NR_PALMZ72_LCD_POWER, "LCD POWER"); | ||
| 255 | if (ret) | ||
| 256 | goto err2; | ||
| 257 | ret = gpio_direction_output(GPIO_NR_PALMZ72_LCD_POWER, 0); | ||
| 258 | if (ret) | ||
| 259 | goto err3; | ||
| 260 | |||
| 261 | return 0; | ||
| 262 | err3: | ||
| 263 | gpio_free(GPIO_NR_PALMZ72_LCD_POWER); | ||
| 264 | err2: | ||
| 265 | gpio_free(GPIO_NR_PALMZ72_BL_POWER); | ||
| 266 | err: | ||
| 267 | return ret; | ||
| 268 | } | ||
| 269 | |||
| 270 | static int palmz72_backlight_notify(int brightness) | ||
| 271 | { | ||
| 272 | gpio_set_value(GPIO_NR_PALMZ72_BL_POWER, brightness); | ||
| 273 | gpio_set_value(GPIO_NR_PALMZ72_LCD_POWER, brightness); | ||
| 274 | return brightness; | ||
| 275 | } | ||
| 276 | |||
| 277 | static void palmz72_backlight_exit(struct device *dev) | ||
| 278 | { | ||
| 279 | gpio_free(GPIO_NR_PALMZ72_BL_POWER); | ||
| 280 | gpio_free(GPIO_NR_PALMZ72_LCD_POWER); | ||
| 281 | } | ||
| 282 | |||
| 283 | static struct platform_pwm_backlight_data palmz72_backlight_data = { | ||
| 284 | .pwm_id = 0, | ||
| 285 | .max_brightness = PALMZ72_MAX_INTENSITY, | ||
| 286 | .dft_brightness = PALMZ72_MAX_INTENSITY, | ||
| 287 | .pwm_period_ns = PALMZ72_PERIOD_NS, | ||
| 288 | .init = palmz72_backlight_init, | ||
| 289 | .notify = palmz72_backlight_notify, | ||
| 290 | .exit = palmz72_backlight_exit, | ||
| 291 | }; | ||
| 292 | |||
| 293 | static struct platform_device palmz72_backlight = { | ||
| 294 | .name = "pwm-backlight", | ||
| 295 | .dev = { | ||
| 296 | .parent = &pxa27x_device_pwm0.dev, | ||
| 297 | .platform_data = &palmz72_backlight_data, | ||
| 298 | }, | ||
| 299 | }; | ||
| 300 | |||
| 301 | /****************************************************************************** | ||
| 302 | * IrDA | ||
| 303 | ******************************************************************************/ | ||
| 304 | static int palmz72_irda_startup(struct device *dev) | ||
| 305 | { | ||
| 306 | int err; | ||
| 307 | err = gpio_request(GPIO_NR_PALMZ72_IR_DISABLE, "IR DISABLE"); | ||
| 308 | if (err) | ||
| 309 | goto err; | ||
| 310 | err = gpio_direction_output(GPIO_NR_PALMZ72_IR_DISABLE, 1); | ||
| 311 | if (err) | ||
| 312 | gpio_free(GPIO_NR_PALMZ72_IR_DISABLE); | ||
| 313 | err: | ||
| 314 | return err; | ||
| 315 | } | ||
| 316 | |||
| 317 | static void palmz72_irda_shutdown(struct device *dev) | ||
| 318 | { | ||
| 319 | gpio_free(GPIO_NR_PALMZ72_IR_DISABLE); | ||
| 320 | } | ||
| 321 | |||
| 322 | static void palmz72_irda_transceiver_mode(struct device *dev, int mode) | ||
| 323 | { | ||
| 324 | gpio_set_value(GPIO_NR_PALMZ72_IR_DISABLE, mode & IR_OFF); | ||
| 325 | pxa2xx_transceiver_mode(dev, mode); | ||
| 326 | } | ||
| 327 | |||
| 328 | static struct pxaficp_platform_data palmz72_ficp_platform_data = { | ||
| 329 | .startup = palmz72_irda_startup, | ||
| 330 | .shutdown = palmz72_irda_shutdown, | ||
| 331 | .transceiver_cap = IR_SIRMODE | IR_OFF, | ||
| 332 | .transceiver_mode = palmz72_irda_transceiver_mode, | ||
| 333 | }; | ||
| 334 | |||
| 335 | /****************************************************************************** | ||
| 336 | * LEDs | ||
| 337 | ******************************************************************************/ | ||
| 338 | static struct gpio_led gpio_leds[] = { | ||
| 339 | { | ||
| 340 | .name = "palmz72:green:led", | ||
| 341 | .default_trigger = "none", | ||
| 342 | .gpio = GPIO_NR_PALMZ72_LED_GREEN, | ||
| 343 | }, | ||
| 344 | }; | ||
| 345 | |||
| 346 | static struct gpio_led_platform_data gpio_led_info = { | ||
| 347 | .leds = gpio_leds, | ||
| 348 | .num_leds = ARRAY_SIZE(gpio_leds), | ||
| 349 | }; | ||
| 350 | |||
| 351 | static struct platform_device palmz72_leds = { | ||
| 352 | .name = "leds-gpio", | ||
| 353 | .id = -1, | ||
| 354 | .dev = { | ||
| 355 | .platform_data = &gpio_led_info, | ||
| 356 | } | ||
| 357 | }; | ||
| 358 | |||
| 359 | /****************************************************************************** | ||
| 360 | * Power supply | ||
| 361 | ******************************************************************************/ | ||
| 362 | static int power_supply_init(struct device *dev) | ||
| 363 | { | ||
| 364 | int ret; | ||
| 365 | |||
| 366 | ret = gpio_request(GPIO_NR_PALMZ72_POWER_DETECT, "CABLE_STATE_AC"); | ||
| 367 | if (ret) | ||
| 368 | goto err1; | ||
| 369 | ret = gpio_direction_input(GPIO_NR_PALMZ72_POWER_DETECT); | ||
| 370 | if (ret) | ||
| 371 | goto err2; | ||
| 372 | |||
| 373 | ret = gpio_request(GPIO_NR_PALMZ72_USB_DETECT_N, "CABLE_STATE_USB"); | ||
| 374 | if (ret) | ||
| 375 | goto err2; | ||
| 376 | ret = gpio_direction_input(GPIO_NR_PALMZ72_USB_DETECT_N); | ||
| 377 | if (ret) | ||
| 378 | goto err3; | ||
| 379 | |||
| 380 | return 0; | ||
| 381 | err3: | ||
| 382 | gpio_free(GPIO_NR_PALMZ72_USB_DETECT_N); | ||
| 383 | err2: | ||
| 384 | gpio_free(GPIO_NR_PALMZ72_POWER_DETECT); | ||
| 385 | err1: | ||
| 386 | return ret; | ||
| 387 | } | ||
| 388 | |||
| 389 | static int palmz72_is_ac_online(void) | ||
| 390 | { | ||
| 391 | return gpio_get_value(GPIO_NR_PALMZ72_POWER_DETECT); | ||
| 392 | } | ||
| 393 | |||
| 394 | static int palmz72_is_usb_online(void) | ||
| 395 | { | ||
| 396 | return !gpio_get_value(GPIO_NR_PALMZ72_USB_DETECT_N); | ||
| 397 | } | ||
| 398 | |||
| 399 | static void power_supply_exit(struct device *dev) | ||
| 400 | { | ||
| 401 | gpio_free(GPIO_NR_PALMZ72_USB_DETECT_N); | ||
| 402 | gpio_free(GPIO_NR_PALMZ72_POWER_DETECT); | ||
| 403 | } | ||
| 404 | |||
| 405 | static char *palmz72_supplicants[] = { | ||
| 406 | "main-battery", | ||
| 407 | }; | ||
| 408 | |||
| 409 | static struct pda_power_pdata power_supply_info = { | ||
| 410 | .init = power_supply_init, | ||
| 411 | .is_ac_online = palmz72_is_ac_online, | ||
| 412 | .is_usb_online = palmz72_is_usb_online, | ||
| 413 | .exit = power_supply_exit, | ||
| 414 | .supplied_to = palmz72_supplicants, | ||
| 415 | .num_supplicants = ARRAY_SIZE(palmz72_supplicants), | ||
| 416 | }; | ||
| 417 | |||
| 418 | static struct platform_device power_supply = { | ||
| 419 | .name = "pda-power", | ||
| 420 | .id = -1, | ||
| 421 | .dev = { | ||
| 422 | .platform_data = &power_supply_info, | ||
| 423 | }, | ||
| 424 | }; | ||
| 425 | |||
| 426 | /****************************************************************************** | ||
| 427 | * Framebuffer | ||
| 428 | ******************************************************************************/ | ||
| 429 | static struct pxafb_mode_info palmz72_lcd_modes[] = { | ||
| 430 | { | ||
| 431 | .pixclock = 115384, | ||
| 432 | .xres = 320, | ||
| 433 | .yres = 320, | ||
| 434 | .bpp = 16, | ||
| 435 | |||
| 436 | .left_margin = 27, | ||
| 437 | .right_margin = 7, | ||
| 438 | .upper_margin = 7, | ||
| 439 | .lower_margin = 8, | ||
| 440 | |||
| 441 | .hsync_len = 6, | ||
| 442 | .vsync_len = 1, | ||
| 443 | }, | ||
| 444 | }; | ||
| 445 | |||
| 446 | static struct pxafb_mach_info palmz72_lcd_screen = { | ||
| 447 | .modes = palmz72_lcd_modes, | ||
| 448 | .num_modes = ARRAY_SIZE(palmz72_lcd_modes), | ||
| 449 | .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL, | ||
| 450 | }; | ||
| 451 | |||
| 452 | #ifdef CONFIG_PM | ||
| 453 | |||
| 454 | /* We have some black magic here | ||
| 455 | * PalmOS ROM on recover expects special struct physical address | ||
| 456 | * to be transferred via PSPR. Using this struct PalmOS restores | ||
| 457 | * its state after sleep. As for Linux, we need to setup it the | ||
| 458 | * same way. More than that, PalmOS ROM changes some values in memory. | ||
| 459 | * For now only one location is found, which needs special treatment. | ||
| 460 | * Thanks to Alex Osborne, Andrzej Zaborowski, and lots of other people | ||
| 461 | * for reading backtraces for me :) | ||
| 462 | */ | ||
| 463 | |||
| 464 | #define PALMZ72_SAVE_DWORD ((unsigned long *)0xc0000050) | ||
| 465 | |||
| 466 | static struct palmz72_resume_info palmz72_resume_info = { | ||
| 467 | .magic0 = 0xb4e6, | ||
| 468 | .magic1 = 1, | ||
| 469 | |||
| 470 | /* reset state, MMU off etc */ | ||
| 471 | .arm_control = 0, | ||
| 472 | .aux_control = 0, | ||
| 473 | .ttb = 0, | ||
| 474 | .domain_access = 0, | ||
| 475 | .process_id = 0, | ||
| 476 | }; | ||
| 477 | |||
| 478 | static unsigned long store_ptr; | ||
| 479 | |||
| 480 | /* sys_device for Palm Zire 72 PM */ | ||
| 481 | |||
| 482 | static int palmz72_pm_suspend(struct sys_device *dev, pm_message_t msg) | ||
| 483 | { | ||
| 484 | /* setup the resume_info struct for the original bootloader */ | ||
| 485 | palmz72_resume_info.resume_addr = (u32) pxa_cpu_resume; | ||
| 486 | |||
| 487 | /* Storing memory touched by ROM */ | ||
| 488 | store_ptr = *PALMZ72_SAVE_DWORD; | ||
| 489 | |||
| 490 | /* Setting PSPR to a proper value */ | ||
| 491 | PSPR = virt_to_phys(&palmz72_resume_info); | ||
| 492 | |||
| 493 | return 0; | ||
| 494 | } | ||
| 495 | |||
| 496 | static int palmz72_pm_resume(struct sys_device *dev) | ||
| 497 | { | ||
| 498 | *PALMZ72_SAVE_DWORD = store_ptr; | ||
| 499 | return 0; | ||
| 500 | } | ||
| 501 | |||
| 502 | static struct sysdev_class palmz72_pm_sysclass = { | ||
| 503 | .name = "palmz72_pm", | ||
| 504 | .suspend = palmz72_pm_suspend, | ||
| 505 | .resume = palmz72_pm_resume, | ||
| 506 | }; | ||
| 507 | |||
| 508 | static struct sys_device palmz72_pm_device = { | ||
| 509 | .cls = &palmz72_pm_sysclass, | ||
| 510 | }; | ||
| 511 | |||
| 512 | static int __init palmz72_pm_init(void) | ||
| 513 | { | ||
| 514 | int ret = -ENODEV; | ||
| 515 | if (machine_is_palmz72()) { | ||
| 516 | ret = sysdev_class_register(&palmz72_pm_sysclass); | ||
| 517 | if (ret == 0) | ||
| 518 | ret = sysdev_register(&palmz72_pm_device); | ||
| 519 | } | ||
| 520 | return ret; | ||
| 521 | } | ||
| 522 | |||
| 523 | device_initcall(palmz72_pm_init); | ||
| 524 | #endif | ||
| 525 | |||
| 526 | /****************************************************************************** | ||
| 527 | * Machine init | ||
| 528 | ******************************************************************************/ | ||
| 529 | static struct platform_device *devices[] __initdata = { | ||
| 530 | &palmz72_backlight, | ||
| 531 | &palmz72_leds, | ||
| 532 | &power_supply, | ||
| 533 | }; | ||
| 534 | |||
| 535 | static void __init palmz72_init(void) | ||
| 536 | { | ||
| 537 | pxa2xx_mfp_config(ARRAY_AND_SIZE(palmz72_pin_config)); | ||
| 538 | set_pxa_fb_info(&palmz72_lcd_screen); | ||
| 539 | pxa_set_mci_info(&palmz72_mci_platform_data); | ||
| 540 | pxa_set_ac97_info(NULL); | ||
| 541 | pxa_set_ficp_info(&palmz72_ficp_platform_data); | ||
| 542 | pxa_set_keypad_info(&palmz72_keypad_platform_data); | ||
| 543 | platform_add_devices(devices, ARRAY_SIZE(devices)); | ||
| 544 | } | ||
| 545 | |||
| 546 | MACHINE_START(PALMZ72, "Palm Zire72") | ||
| 547 | .phys_io = 0x40000000, | ||
| 548 | .io_pg_offst = io_p2v(0x40000000), | ||
| 549 | .boot_params = 0xa0000100, | ||
| 550 | .map_io = pxa_map_io, | ||
| 551 | .init_irq = pxa27x_init_irq, | ||
| 552 | .timer = &pxa_timer, | ||
| 553 | .init_machine = palmz72_init | ||
| 554 | MACHINE_END | ||
diff --git a/arch/arm/mach-pxa/pcm027.c b/arch/arm/mach-pxa/pcm027.c index 730b9f6ede1d..36135a02fdc7 100644 --- a/arch/arm/mach-pxa/pcm027.c +++ b/arch/arm/mach-pxa/pcm027.c | |||
| @@ -31,7 +31,7 @@ | |||
| 31 | #include <asm/mach/arch.h> | 31 | #include <asm/mach/arch.h> |
| 32 | #include <mach/hardware.h> | 32 | #include <mach/hardware.h> |
| 33 | #include <mach/pxa-regs.h> | 33 | #include <mach/pxa-regs.h> |
| 34 | #include <mach/pxa2xx-gpio.h> | 34 | #include <mach/mfp-pxa27x.h> |
| 35 | #include <mach/pxa2xx-regs.h> | 35 | #include <mach/pxa2xx-regs.h> |
| 36 | #include <mach/pxa2xx_spi.h> | 36 | #include <mach/pxa2xx_spi.h> |
| 37 | #include <mach/pcm027.h> | 37 | #include <mach/pcm027.h> |
| @@ -86,6 +86,28 @@ | |||
| 86 | * *) CPU internal use only | 86 | * *) CPU internal use only |
| 87 | */ | 87 | */ |
| 88 | 88 | ||
| 89 | static unsigned long pcm027_pin_config[] __initdata = { | ||
| 90 | /* Chip Selects */ | ||
| 91 | GPIO20_nSDCS_2, | ||
| 92 | GPIO21_nSDCS_3, | ||
| 93 | GPIO15_nCS_1, | ||
| 94 | GPIO78_nCS_2, | ||
| 95 | GPIO80_nCS_4, | ||
| 96 | GPIO33_nCS_5, /* Ethernet */ | ||
| 97 | |||
| 98 | /* I2C */ | ||
| 99 | GPIO117_I2C_SCL, | ||
| 100 | GPIO118_I2C_SDA, | ||
| 101 | |||
| 102 | /* GPIO */ | ||
| 103 | GPIO52_GPIO, /* IRQ from network controller */ | ||
| 104 | #ifdef CONFIG_LEDS_GPIO | ||
| 105 | GPIO90_GPIO, /* PCM027_LED_CPU */ | ||
| 106 | GPIO91_GPIO, /* PCM027_LED_HEART_BEAT */ | ||
| 107 | #endif | ||
| 108 | GPIO114_GPIO, /* IRQ from CAN controller */ | ||
| 109 | }; | ||
| 110 | |||
| 89 | /* | 111 | /* |
| 90 | * SMC91x network controller specific stuff | 112 | * SMC91x network controller specific stuff |
| 91 | */ | 113 | */ |
| @@ -206,13 +228,9 @@ static void __init pcm027_init(void) | |||
| 206 | */ | 228 | */ |
| 207 | ARB_CNTRL = ARB_CORE_PARK | 0x234; | 229 | ARB_CNTRL = ARB_CORE_PARK | 0x234; |
| 208 | 230 | ||
| 209 | platform_add_devices(devices, ARRAY_SIZE(devices)); | 231 | pxa2xx_mfp_config(pcm027_pin_config, ARRAY_SIZE(pcm027_pin_config)); |
| 210 | 232 | ||
| 211 | /* LEDs (on demand only) */ | 233 | platform_add_devices(devices, ARRAY_SIZE(devices)); |
| 212 | #ifdef CONFIG_LEDS_GPIO | ||
| 213 | pxa_gpio_mode(PCM027_LED_CPU | GPIO_OUT); | ||
| 214 | pxa_gpio_mode(PCM027_LED_HEARD_BEAT | GPIO_OUT); | ||
| 215 | #endif /* CONFIG_LEDS_GPIO */ | ||
| 216 | 234 | ||
| 217 | /* at last call the baseboard to initialize itself */ | 235 | /* at last call the baseboard to initialize itself */ |
| 218 | #ifdef CONFIG_MACH_PCM990_BASEBOARD | 236 | #ifdef CONFIG_MACH_PCM990_BASEBOARD |
diff --git a/arch/arm/mach-pxa/pcm990-baseboard.c b/arch/arm/mach-pxa/pcm990-baseboard.c index 420c9b3813f6..f601425f1b1e 100644 --- a/arch/arm/mach-pxa/pcm990-baseboard.c +++ b/arch/arm/mach-pxa/pcm990-baseboard.c | |||
| @@ -262,8 +262,7 @@ static void pcm990_irq_handler(unsigned int irq, struct irq_desc *desc) | |||
| 262 | GPIO_bit(PCM990_CTRL_INT_IRQ_GPIO); | 262 | GPIO_bit(PCM990_CTRL_INT_IRQ_GPIO); |
| 263 | if (likely(pending)) { | 263 | if (likely(pending)) { |
| 264 | irq = PCM027_IRQ(0) + __ffs(pending); | 264 | irq = PCM027_IRQ(0) + __ffs(pending); |
| 265 | desc = irq_desc + irq; | 265 | generic_handle_irq(irq); |
| 266 | desc_handle_irq(irq, desc); | ||
| 267 | } | 266 | } |
| 268 | pending = (~PCM990_INTSETCLR) & pcm990_irq_enabled; | 267 | pending = (~PCM990_INTSETCLR) & pcm990_irq_enabled; |
| 269 | } while (pending); | 268 | } while (pending); |
| @@ -328,36 +327,10 @@ static struct pxamci_platform_data pcm990_mci_platform_data = { | |||
| 328 | .exit = pcm990_mci_exit, | 327 | .exit = pcm990_mci_exit, |
| 329 | }; | 328 | }; |
| 330 | 329 | ||
| 331 | /* | ||
| 332 | * init OHCI hardware to work with | ||
| 333 | * | ||
| 334 | * Note: Only USB port 1 (host only) is connected | ||
| 335 | * | ||
| 336 | * GPIO88 (USBHPWR#1): overcurrent in, overcurrent when low | ||
| 337 | * GPIO89 (USBHPEN#1): power-on out, on when low | ||
| 338 | */ | ||
| 339 | static int pcm990_ohci_init(struct device *dev) | ||
| 340 | { | ||
| 341 | /* | ||
| 342 | * disable USB port 2 and 3 | ||
| 343 | * power sense is active low | ||
| 344 | */ | ||
| 345 | UHCHR = ((UHCHR) | UHCHR_PCPL | UHCHR_PSPL | UHCHR_SSEP2 | | ||
| 346 | UHCHR_SSEP3) & ~(UHCHR_SSEP1 | UHCHR_SSE); | ||
| 347 | /* | ||
| 348 | * wait 10ms after Power on | ||
| 349 | * overcurrent per port | ||
| 350 | * power switch per port | ||
| 351 | */ | ||
| 352 | UHCRHDA = (5<<24) | (1<<11) | (1<<8); /* FIXME: Required? */ | ||
| 353 | |||
| 354 | return 0; | ||
| 355 | } | ||
| 356 | |||
| 357 | static struct pxaohci_platform_data pcm990_ohci_platform_data = { | 330 | static struct pxaohci_platform_data pcm990_ohci_platform_data = { |
| 358 | .port_mode = PMM_PERPORT_MODE, | 331 | .port_mode = PMM_PERPORT_MODE, |
| 359 | .init = pcm990_ohci_init, | 332 | .flags = ENABLE_PORT1 | POWER_CONTROL_LOW | POWER_SENSE_LOW, |
| 360 | .exit = NULL, | 333 | .power_on_delay = 10, |
| 361 | }; | 334 | }; |
| 362 | 335 | ||
| 363 | /* | 336 | /* |
diff --git a/arch/arm/mach-pxa/pm.c b/arch/arm/mach-pxa/pm.c index 1b539e675579..164eb0bb6321 100644 --- a/arch/arm/mach-pxa/pm.c +++ b/arch/arm/mach-pxa/pm.c | |||
| @@ -86,9 +86,27 @@ static int pxa_pm_valid(suspend_state_t state) | |||
| 86 | return -EINVAL; | 86 | return -EINVAL; |
| 87 | } | 87 | } |
| 88 | 88 | ||
| 89 | static int pxa_pm_prepare(void) | ||
| 90 | { | ||
| 91 | int ret = 0; | ||
| 92 | |||
| 93 | if (pxa_cpu_pm_fns && pxa_cpu_pm_fns->prepare) | ||
| 94 | ret = pxa_cpu_pm_fns->prepare(); | ||
| 95 | |||
| 96 | return ret; | ||
| 97 | } | ||
| 98 | |||
| 99 | static void pxa_pm_finish(void) | ||
| 100 | { | ||
| 101 | if (pxa_cpu_pm_fns && pxa_cpu_pm_fns->finish) | ||
| 102 | pxa_cpu_pm_fns->finish(); | ||
| 103 | } | ||
| 104 | |||
| 89 | static struct platform_suspend_ops pxa_pm_ops = { | 105 | static struct platform_suspend_ops pxa_pm_ops = { |
| 90 | .valid = pxa_pm_valid, | 106 | .valid = pxa_pm_valid, |
| 91 | .enter = pxa_pm_enter, | 107 | .enter = pxa_pm_enter, |
| 108 | .prepare = pxa_pm_prepare, | ||
| 109 | .finish = pxa_pm_finish, | ||
| 92 | }; | 110 | }; |
| 93 | 111 | ||
| 94 | static int __init pxa_pm_init(void) | 112 | static int __init pxa_pm_init(void) |
diff --git a/arch/arm/mach-pxa/poodle.c b/arch/arm/mach-pxa/poodle.c index 3f5f484549b3..2e3bd8b1523b 100644 --- a/arch/arm/mach-pxa/poodle.c +++ b/arch/arm/mach-pxa/poodle.c | |||
| @@ -20,6 +20,9 @@ | |||
| 20 | #include <linux/fb.h> | 20 | #include <linux/fb.h> |
| 21 | #include <linux/pm.h> | 21 | #include <linux/pm.h> |
| 22 | #include <linux/delay.h> | 22 | #include <linux/delay.h> |
| 23 | #include <linux/gpio.h> | ||
| 24 | #include <linux/spi/spi.h> | ||
| 25 | #include <linux/spi/ads7846.h> | ||
| 23 | 26 | ||
| 24 | #include <mach/hardware.h> | 27 | #include <mach/hardware.h> |
| 25 | #include <asm/mach-types.h> | 28 | #include <asm/mach-types.h> |
| @@ -33,7 +36,7 @@ | |||
| 33 | 36 | ||
| 34 | #include <mach/pxa-regs.h> | 37 | #include <mach/pxa-regs.h> |
| 35 | #include <mach/pxa2xx-regs.h> | 38 | #include <mach/pxa2xx-regs.h> |
| 36 | #include <mach/pxa2xx-gpio.h> | 39 | #include <mach/mfp-pxa25x.h> |
| 37 | #include <mach/mmc.h> | 40 | #include <mach/mmc.h> |
| 38 | #include <mach/udc.h> | 41 | #include <mach/udc.h> |
| 39 | #include <mach/i2c.h> | 42 | #include <mach/i2c.h> |
| @@ -42,6 +45,7 @@ | |||
| 42 | #include <mach/pxafb.h> | 45 | #include <mach/pxafb.h> |
| 43 | #include <mach/sharpsl.h> | 46 | #include <mach/sharpsl.h> |
| 44 | #include <mach/ssp.h> | 47 | #include <mach/ssp.h> |
| 48 | #include <mach/pxa2xx_spi.h> | ||
| 45 | 49 | ||
| 46 | #include <asm/hardware/scoop.h> | 50 | #include <asm/hardware/scoop.h> |
| 47 | #include <asm/hardware/locomo.h> | 51 | #include <asm/hardware/locomo.h> |
| @@ -51,6 +55,88 @@ | |||
| 51 | #include "devices.h" | 55 | #include "devices.h" |
| 52 | #include "sharpsl.h" | 56 | #include "sharpsl.h" |
| 53 | 57 | ||
| 58 | static unsigned long poodle_pin_config[] __initdata = { | ||
| 59 | /* I/O */ | ||
| 60 | GPIO79_nCS_3, | ||
| 61 | GPIO80_nCS_4, | ||
| 62 | GPIO18_RDY, | ||
| 63 | |||
| 64 | /* Clock */ | ||
| 65 | GPIO12_32KHz, | ||
| 66 | |||
| 67 | /* SSP1 */ | ||
| 68 | GPIO23_SSP1_SCLK, | ||
| 69 | GPIO25_SSP1_TXD, | ||
| 70 | GPIO26_SSP1_RXD, | ||
| 71 | GPIO24_GPIO, /* POODLE_GPIO_TP_CS - SFRM as chip select */ | ||
| 72 | |||
| 73 | /* I2S */ | ||
| 74 | GPIO28_I2S_BITCLK_OUT, | ||
| 75 | GPIO29_I2S_SDATA_IN, | ||
| 76 | GPIO30_I2S_SDATA_OUT, | ||
| 77 | GPIO31_I2S_SYNC, | ||
| 78 | GPIO32_I2S_SYSCLK, | ||
| 79 | |||
| 80 | /* Infra-Red */ | ||
| 81 | GPIO47_FICP_TXD, | ||
| 82 | GPIO46_FICP_RXD, | ||
| 83 | |||
| 84 | /* FFUART */ | ||
| 85 | GPIO40_FFUART_DTR, | ||
| 86 | GPIO41_FFUART_RTS, | ||
| 87 | GPIO39_FFUART_TXD, | ||
| 88 | GPIO37_FFUART_DSR, | ||
| 89 | GPIO34_FFUART_RXD, | ||
| 90 | GPIO35_FFUART_CTS, | ||
| 91 | |||
| 92 | /* LCD */ | ||
| 93 | GPIO58_LCD_LDD_0, | ||
| 94 | GPIO59_LCD_LDD_1, | ||
| 95 | GPIO60_LCD_LDD_2, | ||
| 96 | GPIO61_LCD_LDD_3, | ||
| 97 | GPIO62_LCD_LDD_4, | ||
| 98 | GPIO63_LCD_LDD_5, | ||
| 99 | GPIO64_LCD_LDD_6, | ||
| 100 | GPIO65_LCD_LDD_7, | ||
| 101 | GPIO66_LCD_LDD_8, | ||
| 102 | GPIO67_LCD_LDD_9, | ||
| 103 | GPIO68_LCD_LDD_10, | ||
| 104 | GPIO69_LCD_LDD_11, | ||
| 105 | GPIO70_LCD_LDD_12, | ||
| 106 | GPIO71_LCD_LDD_13, | ||
| 107 | GPIO72_LCD_LDD_14, | ||
| 108 | GPIO73_LCD_LDD_15, | ||
| 109 | GPIO74_LCD_FCLK, | ||
| 110 | GPIO75_LCD_LCLK, | ||
| 111 | GPIO76_LCD_PCLK, | ||
| 112 | GPIO77_LCD_BIAS, | ||
| 113 | |||
| 114 | /* PC Card */ | ||
| 115 | GPIO48_nPOE, | ||
| 116 | GPIO49_nPWE, | ||
| 117 | GPIO50_nPIOR, | ||
| 118 | GPIO51_nPIOW, | ||
| 119 | GPIO52_nPCE_1, | ||
| 120 | GPIO53_nPCE_2, | ||
| 121 | GPIO54_nPSKTSEL, | ||
| 122 | GPIO55_nPREG, | ||
| 123 | GPIO56_nPWAIT, | ||
| 124 | GPIO57_nIOIS16, | ||
| 125 | |||
| 126 | /* MMC */ | ||
| 127 | GPIO6_MMC_CLK, | ||
| 128 | GPIO8_MMC_CS0, | ||
| 129 | |||
| 130 | /* GPIO */ | ||
| 131 | GPIO9_GPIO, /* POODLE_GPIO_nSD_DETECT */ | ||
| 132 | GPIO7_GPIO, /* POODLE_GPIO_nSD_WP */ | ||
| 133 | GPIO3_GPIO, /* POODLE_GPIO_SD_PWR */ | ||
| 134 | GPIO33_GPIO, /* POODLE_GPIO_SD_PWR1 */ | ||
| 135 | |||
| 136 | GPIO20_GPIO, /* POODLE_GPIO_USB_PULLUP */ | ||
| 137 | GPIO22_GPIO, /* POODLE_GPIO_IR_ON */ | ||
| 138 | }; | ||
| 139 | |||
| 54 | static struct resource poodle_scoop_resources[] = { | 140 | static struct resource poodle_scoop_resources[] = { |
| 55 | [0] = { | 141 | [0] = { |
| 56 | .start = 0x10800000, | 142 | .start = 0x10800000, |
| @@ -62,6 +148,7 @@ static struct resource poodle_scoop_resources[] = { | |||
| 62 | static struct scoop_config poodle_scoop_setup = { | 148 | static struct scoop_config poodle_scoop_setup = { |
| 63 | .io_dir = POODLE_SCOOP_IO_DIR, | 149 | .io_dir = POODLE_SCOOP_IO_DIR, |
| 64 | .io_out = POODLE_SCOOP_IO_OUT, | 150 | .io_out = POODLE_SCOOP_IO_OUT, |
| 151 | .gpio_base = POODLE_SCOOP_GPIO_BASE, | ||
| 65 | }; | 152 | }; |
| 66 | 153 | ||
| 67 | struct platform_device poodle_scoop_device = { | 154 | struct platform_device poodle_scoop_device = { |
| @@ -74,27 +161,6 @@ struct platform_device poodle_scoop_device = { | |||
| 74 | .resource = poodle_scoop_resources, | 161 | .resource = poodle_scoop_resources, |
| 75 | }; | 162 | }; |
| 76 | 163 | ||
| 77 | static void poodle_pcmcia_init(void) | ||
| 78 | { | ||
| 79 | /* Setup default state of GPIO outputs | ||
| 80 | before we enable them as outputs. */ | ||
| 81 | GPSR(GPIO48_nPOE) = GPIO_bit(GPIO48_nPOE) | | ||
| 82 | GPIO_bit(GPIO49_nPWE) | GPIO_bit(GPIO50_nPIOR) | | ||
| 83 | GPIO_bit(GPIO51_nPIOW) | GPIO_bit(GPIO52_nPCE_1) | | ||
| 84 | GPIO_bit(GPIO53_nPCE_2); | ||
| 85 | |||
| 86 | pxa_gpio_mode(GPIO48_nPOE_MD); | ||
| 87 | pxa_gpio_mode(GPIO49_nPWE_MD); | ||
| 88 | pxa_gpio_mode(GPIO50_nPIOR_MD); | ||
| 89 | pxa_gpio_mode(GPIO51_nPIOW_MD); | ||
| 90 | pxa_gpio_mode(GPIO55_nPREG_MD); | ||
| 91 | pxa_gpio_mode(GPIO56_nPWAIT_MD); | ||
| 92 | pxa_gpio_mode(GPIO57_nIOIS16_MD); | ||
| 93 | pxa_gpio_mode(GPIO52_nPCE_1_MD); | ||
| 94 | pxa_gpio_mode(GPIO53_nPCE_2_MD); | ||
| 95 | pxa_gpio_mode(GPIO54_pSKTSEL_MD); | ||
| 96 | } | ||
| 97 | |||
| 98 | static struct scoop_pcmcia_dev poodle_pcmcia_scoop[] = { | 164 | static struct scoop_pcmcia_dev poodle_pcmcia_scoop[] = { |
| 99 | { | 165 | { |
| 100 | .dev = &poodle_scoop_device.dev, | 166 | .dev = &poodle_scoop_device.dev, |
| @@ -107,7 +173,6 @@ static struct scoop_pcmcia_dev poodle_pcmcia_scoop[] = { | |||
| 107 | static struct scoop_pcmcia_config poodle_pcmcia_config = { | 173 | static struct scoop_pcmcia_config poodle_pcmcia_config = { |
| 108 | .devs = &poodle_pcmcia_scoop[0], | 174 | .devs = &poodle_pcmcia_scoop[0], |
| 109 | .num_devs = 1, | 175 | .num_devs = 1, |
| 110 | .pcmcia_init = poodle_pcmcia_init, | ||
| 111 | }; | 176 | }; |
| 112 | 177 | ||
| 113 | EXPORT_SYMBOL(poodle_scoop_device); | 178 | EXPORT_SYMBOL(poodle_scoop_device); |
| @@ -136,62 +201,55 @@ struct platform_device poodle_locomo_device = { | |||
| 136 | 201 | ||
| 137 | EXPORT_SYMBOL(poodle_locomo_device); | 202 | EXPORT_SYMBOL(poodle_locomo_device); |
| 138 | 203 | ||
| 139 | /* | 204 | #if defined(CONFIG_SPI_PXA2XX) || defined(CONFIG_SPI_PXA2XX_MODULE) |
| 140 | * Poodle SSP Device | 205 | static struct pxa2xx_spi_master poodle_spi_info = { |
| 141 | */ | 206 | .num_chipselect = 1, |
| 142 | |||
| 143 | struct platform_device poodle_ssp_device = { | ||
| 144 | .name = "corgi-ssp", | ||
| 145 | .id = -1, | ||
| 146 | }; | ||
| 147 | |||
| 148 | struct corgissp_machinfo poodle_ssp_machinfo = { | ||
| 149 | .port = 1, | ||
| 150 | .cs_lcdcon = -1, | ||
| 151 | .cs_ads7846 = -1, | ||
| 152 | .cs_max1111 = -1, | ||
| 153 | .clk_lcdcon = 2, | ||
| 154 | .clk_ads7846 = 36, | ||
| 155 | .clk_max1111 = 2, | ||
| 156 | }; | 207 | }; |
| 157 | 208 | ||
| 158 | 209 | static struct ads7846_platform_data poodle_ads7846_info = { | |
| 159 | /* | 210 | .model = 7846, |
| 160 | * Poodle Touch Screen Device | 211 | .vref_delay_usecs = 100, |
| 161 | */ | 212 | .x_plate_ohms = 419, |
| 162 | static struct resource poodlets_resources[] = { | 213 | .y_plate_ohms = 486, |
| 163 | [0] = { | 214 | .gpio_pendown = POODLE_GPIO_TP_INT, |
| 164 | .start = POODLE_IRQ_GPIO_TP_INT, | ||
| 165 | .end = POODLE_IRQ_GPIO_TP_INT, | ||
| 166 | .flags = IORESOURCE_IRQ, | ||
| 167 | }, | ||
| 168 | }; | 215 | }; |
| 169 | 216 | ||
| 170 | static unsigned long poodle_get_hsync_invperiod(void) | 217 | static void ads7846_cs(u32 command) |
| 171 | { | 218 | { |
| 172 | return 0; | 219 | gpio_set_value(POODLE_GPIO_TP_CS, !(command == PXA2XX_CS_ASSERT)); |
| 173 | } | 220 | } |
| 174 | 221 | ||
| 175 | static void poodle_null_hsync(void) | 222 | static struct pxa2xx_spi_chip poodle_ads7846_chip = { |
| 176 | { | 223 | .cs_control = ads7846_cs, |
| 177 | } | ||
| 178 | |||
| 179 | static struct corgits_machinfo poodle_ts_machinfo = { | ||
| 180 | .get_hsync_invperiod = poodle_get_hsync_invperiod, | ||
| 181 | .put_hsync = poodle_null_hsync, | ||
| 182 | .wait_hsync = poodle_null_hsync, | ||
| 183 | }; | 224 | }; |
| 184 | 225 | ||
| 185 | static struct platform_device poodle_ts_device = { | 226 | static struct spi_board_info poodle_spi_devices[] = { |
| 186 | .name = "corgi-ts", | 227 | { |
| 187 | .dev = { | 228 | .modalias = "ads7846", |
| 188 | .platform_data = &poodle_ts_machinfo, | 229 | .max_speed_hz = 10000, |
| 230 | .bus_num = 1, | ||
| 231 | .platform_data = &poodle_ads7846_info, | ||
| 232 | .controller_data= &poodle_ads7846_chip, | ||
| 233 | .irq = gpio_to_irq(POODLE_GPIO_TP_INT), | ||
| 189 | }, | 234 | }, |
| 190 | .id = -1, | ||
| 191 | .num_resources = ARRAY_SIZE(poodlets_resources), | ||
| 192 | .resource = poodlets_resources, | ||
| 193 | }; | 235 | }; |
| 194 | 236 | ||
| 237 | static void __init poodle_init_spi(void) | ||
| 238 | { | ||
| 239 | int err; | ||
| 240 | |||
| 241 | err = gpio_request(POODLE_GPIO_TP_CS, "ADS7846_CS"); | ||
| 242 | if (err) | ||
| 243 | return; | ||
| 244 | |||
| 245 | gpio_direction_output(POODLE_GPIO_TP_CS, 1); | ||
| 246 | |||
| 247 | pxa2xx_set_spi_info(1, &poodle_spi_info); | ||
| 248 | spi_register_board_info(ARRAY_AND_SIZE(poodle_spi_devices)); | ||
| 249 | } | ||
| 250 | #else | ||
| 251 | static inline void poodle_init_spi(void) {} | ||
| 252 | #endif | ||
| 195 | 253 | ||
| 196 | /* | 254 | /* |
| 197 | * MMC/SD Device | 255 | * MMC/SD Device |
| @@ -205,22 +263,50 @@ static int poodle_mci_init(struct device *dev, irq_handler_t poodle_detect_int, | |||
| 205 | { | 263 | { |
| 206 | int err; | 264 | int err; |
| 207 | 265 | ||
| 208 | /* setup GPIO for PXA25x MMC controller */ | 266 | err = gpio_request(POODLE_GPIO_nSD_DETECT, "nSD_DETECT"); |
| 209 | pxa_gpio_mode(GPIO6_MMCCLK_MD); | 267 | if (err) |
| 210 | pxa_gpio_mode(GPIO8_MMCCS0_MD); | 268 | goto err_out; |
| 211 | pxa_gpio_mode(POODLE_GPIO_nSD_DETECT | GPIO_IN); | 269 | |
| 212 | pxa_gpio_mode(POODLE_GPIO_nSD_WP | GPIO_IN); | 270 | err = gpio_request(POODLE_GPIO_nSD_WP, "nSD_WP"); |
| 213 | pxa_gpio_mode(POODLE_GPIO_SD_PWR | GPIO_OUT); | 271 | if (err) |
| 214 | pxa_gpio_mode(POODLE_GPIO_SD_PWR1 | GPIO_OUT); | 272 | goto err_free_1; |
| 273 | |||
| 274 | err = gpio_request(POODLE_GPIO_SD_PWR, "SD_PWR"); | ||
| 275 | if (err) | ||
| 276 | goto err_free_2; | ||
| 277 | |||
| 278 | err = gpio_request(POODLE_GPIO_SD_PWR1, "SD_PWR1"); | ||
| 279 | if (err) | ||
| 280 | goto err_free_3; | ||
| 281 | |||
| 282 | gpio_direction_input(POODLE_GPIO_nSD_DETECT); | ||
| 283 | gpio_direction_input(POODLE_GPIO_nSD_WP); | ||
| 284 | |||
| 285 | gpio_direction_output(POODLE_GPIO_SD_PWR, 0); | ||
| 286 | gpio_direction_output(POODLE_GPIO_SD_PWR1, 0); | ||
| 215 | 287 | ||
| 216 | poodle_mci_platform_data.detect_delay = msecs_to_jiffies(250); | 288 | poodle_mci_platform_data.detect_delay = msecs_to_jiffies(250); |
| 217 | 289 | ||
| 218 | err = request_irq(POODLE_IRQ_GPIO_nSD_DETECT, poodle_detect_int, | 290 | err = request_irq(POODLE_IRQ_GPIO_nSD_DETECT, poodle_detect_int, |
| 219 | IRQF_DISABLED | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, | 291 | IRQF_DISABLED | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, |
| 220 | "MMC card detect", data); | 292 | "MMC card detect", data); |
| 221 | if (err) | 293 | if (err) { |
| 222 | printk(KERN_ERR "poodle_mci_init: MMC/SD: can't request MMC card detect IRQ\n"); | 294 | pr_err("%s: MMC/SD: can't request MMC card detect IRQ\n", |
| 295 | __func__); | ||
| 296 | goto err_free_4; | ||
| 297 | } | ||
| 298 | |||
| 299 | return 0; | ||
| 223 | 300 | ||
| 301 | err_free_4: | ||
| 302 | gpio_free(POODLE_GPIO_SD_PWR1); | ||
| 303 | err_free_3: | ||
| 304 | gpio_free(POODLE_GPIO_SD_PWR); | ||
| 305 | err_free_2: | ||
| 306 | gpio_free(POODLE_GPIO_nSD_WP); | ||
| 307 | err_free_1: | ||
| 308 | gpio_free(POODLE_GPIO_nSD_DETECT); | ||
| 309 | err_out: | ||
| 224 | return err; | 310 | return err; |
| 225 | } | 311 | } |
| 226 | 312 | ||
| @@ -228,18 +314,19 @@ static void poodle_mci_setpower(struct device *dev, unsigned int vdd) | |||
| 228 | { | 314 | { |
| 229 | struct pxamci_platform_data* p_d = dev->platform_data; | 315 | struct pxamci_platform_data* p_d = dev->platform_data; |
| 230 | 316 | ||
| 231 | if (( 1 << vdd) & p_d->ocr_mask) { | 317 | if ((1 << vdd) & p_d->ocr_mask) { |
| 232 | GPSR(POODLE_GPIO_SD_PWR) = GPIO_bit(POODLE_GPIO_SD_PWR); | 318 | gpio_set_value(POODLE_GPIO_SD_PWR, 1); |
| 233 | mdelay(2); | 319 | mdelay(2); |
| 234 | GPSR(POODLE_GPIO_SD_PWR1) = GPIO_bit(POODLE_GPIO_SD_PWR1); | 320 | gpio_set_value(POODLE_GPIO_SD_PWR1, 1); |
| 235 | } else { | 321 | } else { |
| 236 | GPCR(POODLE_GPIO_SD_PWR1) = GPIO_bit(POODLE_GPIO_SD_PWR1); | 322 | gpio_set_value(POODLE_GPIO_SD_PWR1, 0); |
| 237 | GPCR(POODLE_GPIO_SD_PWR) = GPIO_bit(POODLE_GPIO_SD_PWR); | 323 | gpio_set_value(POODLE_GPIO_SD_PWR, 0); |
| 238 | } | 324 | } |
| 239 | } | 325 | } |
| 240 | 326 | ||
| 241 | static int poodle_mci_get_ro(struct device *dev) | 327 | static int poodle_mci_get_ro(struct device *dev) |
| 242 | { | 328 | { |
| 329 | return !!gpio_get_value(POODLE_GPIO_nSD_WP); | ||
| 243 | return GPLR(POODLE_GPIO_nSD_WP) & GPIO_bit(POODLE_GPIO_nSD_WP); | 330 | return GPLR(POODLE_GPIO_nSD_WP) & GPIO_bit(POODLE_GPIO_nSD_WP); |
| 244 | } | 331 | } |
| 245 | 332 | ||
| @@ -247,6 +334,10 @@ static int poodle_mci_get_ro(struct device *dev) | |||
| 247 | static void poodle_mci_exit(struct device *dev, void *data) | 334 | static void poodle_mci_exit(struct device *dev, void *data) |
| 248 | { | 335 | { |
| 249 | free_irq(POODLE_IRQ_GPIO_nSD_DETECT, data); | 336 | free_irq(POODLE_IRQ_GPIO_nSD_DETECT, data); |
| 337 | gpio_free(POODLE_GPIO_SD_PWR1); | ||
| 338 | gpio_free(POODLE_GPIO_SD_PWR); | ||
| 339 | gpio_free(POODLE_GPIO_nSD_WP); | ||
| 340 | gpio_free(POODLE_GPIO_nSD_DETECT); | ||
| 250 | } | 341 | } |
| 251 | 342 | ||
| 252 | static struct pxamci_platform_data poodle_mci_platform_data = { | 343 | static struct pxamci_platform_data poodle_mci_platform_data = { |
| @@ -263,38 +354,41 @@ static struct pxamci_platform_data poodle_mci_platform_data = { | |||
| 263 | */ | 354 | */ |
| 264 | static void poodle_irda_transceiver_mode(struct device *dev, int mode) | 355 | static void poodle_irda_transceiver_mode(struct device *dev, int mode) |
| 265 | { | 356 | { |
| 266 | if (mode & IR_OFF) { | 357 | gpio_set_value(POODLE_GPIO_IR_ON, mode & IR_OFF); |
| 267 | GPSR(POODLE_GPIO_IR_ON) = GPIO_bit(POODLE_GPIO_IR_ON); | ||
| 268 | } else { | ||
| 269 | GPCR(POODLE_GPIO_IR_ON) = GPIO_bit(POODLE_GPIO_IR_ON); | ||
| 270 | } | ||
| 271 | pxa2xx_transceiver_mode(dev, mode); | 358 | pxa2xx_transceiver_mode(dev, mode); |
| 272 | } | 359 | } |
| 273 | 360 | ||
| 361 | static int poodle_irda_startup(struct device *dev) | ||
| 362 | { | ||
| 363 | int err; | ||
| 364 | |||
| 365 | err = gpio_request(POODLE_GPIO_IR_ON, "IR_ON"); | ||
| 366 | if (err) | ||
| 367 | return err; | ||
| 368 | |||
| 369 | gpio_direction_output(POODLE_GPIO_IR_ON, 1); | ||
| 370 | return 0; | ||
| 371 | } | ||
| 372 | |||
| 373 | static void poodle_irda_shutdown(struct device *dev) | ||
| 374 | { | ||
| 375 | gpio_free(POODLE_GPIO_IR_ON); | ||
| 376 | } | ||
| 377 | |||
| 274 | static struct pxaficp_platform_data poodle_ficp_platform_data = { | 378 | static struct pxaficp_platform_data poodle_ficp_platform_data = { |
| 275 | .transceiver_cap = IR_SIRMODE | IR_OFF, | 379 | .transceiver_cap = IR_SIRMODE | IR_OFF, |
| 276 | .transceiver_mode = poodle_irda_transceiver_mode, | 380 | .transceiver_mode = poodle_irda_transceiver_mode, |
| 381 | .startup = poodle_irda_startup, | ||
| 382 | .shutdown = poodle_irda_shutdown, | ||
| 277 | }; | 383 | }; |
| 278 | 384 | ||
| 279 | 385 | ||
| 280 | /* | 386 | /* |
| 281 | * USB Device Controller | 387 | * USB Device Controller |
| 282 | */ | 388 | */ |
| 283 | static void poodle_udc_command(int cmd) | ||
| 284 | { | ||
| 285 | switch(cmd) { | ||
| 286 | case PXA2XX_UDC_CMD_CONNECT: | ||
| 287 | GPSR(POODLE_GPIO_USB_PULLUP) = GPIO_bit(POODLE_GPIO_USB_PULLUP); | ||
| 288 | break; | ||
| 289 | case PXA2XX_UDC_CMD_DISCONNECT: | ||
| 290 | GPCR(POODLE_GPIO_USB_PULLUP) = GPIO_bit(POODLE_GPIO_USB_PULLUP); | ||
| 291 | break; | ||
| 292 | } | ||
| 293 | } | ||
| 294 | |||
| 295 | static struct pxa2xx_udc_mach_info udc_info __initdata = { | 389 | static struct pxa2xx_udc_mach_info udc_info __initdata = { |
| 296 | /* no connect GPIO; poodle can't tell connection status */ | 390 | /* no connect GPIO; poodle can't tell connection status */ |
| 297 | .udc_command = poodle_udc_command, | 391 | .gpio_pullup = POODLE_GPIO_USB_PULLUP, |
| 298 | }; | 392 | }; |
| 299 | 393 | ||
| 300 | 394 | ||
| @@ -316,15 +410,12 @@ static struct pxafb_mode_info poodle_fb_mode = { | |||
| 316 | static struct pxafb_mach_info poodle_fb_info = { | 410 | static struct pxafb_mach_info poodle_fb_info = { |
| 317 | .modes = &poodle_fb_mode, | 411 | .modes = &poodle_fb_mode, |
| 318 | .num_modes = 1, | 412 | .num_modes = 1, |
| 319 | .lccr0 = LCCR0_Act | LCCR0_Sngl | LCCR0_Color, | 413 | .lcd_conn = LCD_COLOR_TFT_16BPP, |
| 320 | .lccr3 = 0, | ||
| 321 | }; | 414 | }; |
| 322 | 415 | ||
| 323 | static struct platform_device *devices[] __initdata = { | 416 | static struct platform_device *devices[] __initdata = { |
| 324 | &poodle_locomo_device, | 417 | &poodle_locomo_device, |
| 325 | &poodle_scoop_device, | 418 | &poodle_scoop_device, |
| 326 | &poodle_ssp_device, | ||
| 327 | &poodle_ts_device, | ||
| 328 | }; | 419 | }; |
| 329 | 420 | ||
| 330 | static void poodle_poweroff(void) | 421 | static void poodle_poweroff(void) |
| @@ -344,59 +435,23 @@ static void __init poodle_init(void) | |||
| 344 | pm_power_off = poodle_poweroff; | 435 | pm_power_off = poodle_poweroff; |
| 345 | arm_pm_restart = poodle_restart; | 436 | arm_pm_restart = poodle_restart; |
| 346 | 437 | ||
| 347 | /* setup sleep mode values */ | ||
| 348 | PWER = 0x00000002; | ||
| 349 | PFER = 0x00000000; | ||
| 350 | PRER = 0x00000002; | ||
| 351 | PGSR0 = 0x00008000; | ||
| 352 | PGSR1 = 0x003F0202; | ||
| 353 | PGSR2 = 0x0001C000; | ||
| 354 | PCFR |= PCFR_OPDE; | 438 | PCFR |= PCFR_OPDE; |
| 355 | 439 | ||
| 356 | /* cpu initialize */ | 440 | pxa2xx_mfp_config(ARRAY_AND_SIZE(poodle_pin_config)); |
| 357 | /* Pgsr Register */ | 441 | |
| 358 | PGSR0 = 0x0146dd80; | 442 | platform_scoop_config = &poodle_pcmcia_config; |
| 359 | PGSR1 = 0x03bf0890; | 443 | |
| 360 | PGSR2 = 0x0001c000; | 444 | ret = platform_add_devices(devices, ARRAY_SIZE(devices)); |
| 361 | 445 | if (ret) | |
| 362 | /* Alternate Register */ | 446 | pr_warning("poodle: Unable to register LoCoMo device\n"); |
| 363 | GAFR0_L = 0x01001000; | ||
| 364 | GAFR0_U = 0x591a8010; | ||
| 365 | GAFR1_L = 0x900a8451; | ||
| 366 | GAFR1_U = 0xaaa5aaaa; | ||
| 367 | GAFR2_L = 0x8aaaaaaa; | ||
| 368 | GAFR2_U = 0x00000002; | ||
| 369 | |||
| 370 | /* Direction Register */ | ||
| 371 | GPDR0 = 0xd3f0904c; | ||
| 372 | GPDR1 = 0xfcffb7d3; | ||
| 373 | GPDR2 = 0x0001ffff; | ||
| 374 | |||
| 375 | /* Output Register */ | ||
| 376 | GPCR0 = 0x00000000; | ||
| 377 | GPCR1 = 0x00000000; | ||
| 378 | GPCR2 = 0x00000000; | ||
| 379 | |||
| 380 | GPSR0 = 0x00400000; | ||
| 381 | GPSR1 = 0x00000000; | ||
| 382 | GPSR2 = 0x00000000; | ||
| 383 | 447 | ||
| 384 | set_pxa_fb_parent(&poodle_locomo_device.dev); | 448 | set_pxa_fb_parent(&poodle_locomo_device.dev); |
| 385 | set_pxa_fb_info(&poodle_fb_info); | 449 | set_pxa_fb_info(&poodle_fb_info); |
| 386 | pxa_gpio_mode(POODLE_GPIO_USB_PULLUP | GPIO_OUT); | ||
| 387 | pxa_gpio_mode(POODLE_GPIO_IR_ON | GPIO_OUT); | ||
| 388 | pxa_set_udc_info(&udc_info); | 450 | pxa_set_udc_info(&udc_info); |
| 389 | pxa_set_mci_info(&poodle_mci_platform_data); | 451 | pxa_set_mci_info(&poodle_mci_platform_data); |
| 390 | pxa_set_ficp_info(&poodle_ficp_platform_data); | 452 | pxa_set_ficp_info(&poodle_ficp_platform_data); |
| 391 | pxa_set_i2c_info(NULL); | 453 | pxa_set_i2c_info(NULL); |
| 392 | 454 | poodle_init_spi(); | |
| 393 | platform_scoop_config = &poodle_pcmcia_config; | ||
| 394 | |||
| 395 | ret = platform_add_devices(devices, ARRAY_SIZE(devices)); | ||
| 396 | if (ret) { | ||
| 397 | printk(KERN_WARNING "poodle: Unable to register LoCoMo device\n"); | ||
| 398 | } | ||
| 399 | corgi_ssp_set_machinfo(&poodle_ssp_machinfo); | ||
| 400 | } | 455 | } |
| 401 | 456 | ||
| 402 | static void __init fixup_poodle(struct machine_desc *desc, | 457 | static void __init fixup_poodle(struct machine_desc *desc, |
diff --git a/arch/arm/mach-pxa/pxa25x.c b/arch/arm/mach-pxa/pxa25x.c index 305452b56e91..25d17a1dab78 100644 --- a/arch/arm/mach-pxa/pxa25x.c +++ b/arch/arm/mach-pxa/pxa25x.c | |||
| @@ -36,6 +36,12 @@ | |||
| 36 | #include "devices.h" | 36 | #include "devices.h" |
| 37 | #include "clock.h" | 37 | #include "clock.h" |
| 38 | 38 | ||
| 39 | int cpu_is_pxa26x(void) | ||
| 40 | { | ||
| 41 | return cpu_is_pxa250() && ((BOOT_DEF & 0x8) == 0); | ||
| 42 | } | ||
| 43 | EXPORT_SYMBOL_GPL(cpu_is_pxa26x); | ||
| 44 | |||
| 39 | /* | 45 | /* |
| 40 | * Various clock factors driven by the CCCR register. | 46 | * Various clock factors driven by the CCCR register. |
| 41 | */ | 47 | */ |
| @@ -203,48 +209,21 @@ static struct clk pxa25x_clks[] = { | |||
| 203 | * More ones like CP and general purpose register values are preserved | 209 | * More ones like CP and general purpose register values are preserved |
| 204 | * with the stack pointer in sleep.S. | 210 | * with the stack pointer in sleep.S. |
| 205 | */ | 211 | */ |
| 206 | enum { SLEEP_SAVE_PGSR0, SLEEP_SAVE_PGSR1, SLEEP_SAVE_PGSR2, | 212 | enum { |
| 207 | |||
| 208 | SLEEP_SAVE_GAFR0_L, SLEEP_SAVE_GAFR0_U, | ||
| 209 | SLEEP_SAVE_GAFR1_L, SLEEP_SAVE_GAFR1_U, | ||
| 210 | SLEEP_SAVE_GAFR2_L, SLEEP_SAVE_GAFR2_U, | ||
| 211 | |||
| 212 | SLEEP_SAVE_PSTR, | 213 | SLEEP_SAVE_PSTR, |
| 213 | |||
| 214 | SLEEP_SAVE_CKEN, | 214 | SLEEP_SAVE_CKEN, |
| 215 | |||
| 216 | SLEEP_SAVE_COUNT | 215 | SLEEP_SAVE_COUNT |
| 217 | }; | 216 | }; |
| 218 | 217 | ||
| 219 | 218 | ||
| 220 | static void pxa25x_cpu_pm_save(unsigned long *sleep_save) | 219 | static void pxa25x_cpu_pm_save(unsigned long *sleep_save) |
| 221 | { | 220 | { |
| 222 | SAVE(PGSR0); SAVE(PGSR1); SAVE(PGSR2); | ||
| 223 | |||
| 224 | SAVE(GAFR0_L); SAVE(GAFR0_U); | ||
| 225 | SAVE(GAFR1_L); SAVE(GAFR1_U); | ||
| 226 | SAVE(GAFR2_L); SAVE(GAFR2_U); | ||
| 227 | |||
| 228 | SAVE(CKEN); | 221 | SAVE(CKEN); |
| 229 | SAVE(PSTR); | 222 | SAVE(PSTR); |
| 230 | |||
| 231 | /* Clear GPIO transition detect bits */ | ||
| 232 | GEDR0 = GEDR0; GEDR1 = GEDR1; GEDR2 = GEDR2; | ||
| 233 | } | 223 | } |
| 234 | 224 | ||
| 235 | static void pxa25x_cpu_pm_restore(unsigned long *sleep_save) | 225 | static void pxa25x_cpu_pm_restore(unsigned long *sleep_save) |
| 236 | { | 226 | { |
| 237 | /* ensure not to come back here if it wasn't intended */ | ||
| 238 | PSPR = 0; | ||
| 239 | |||
| 240 | /* restore registers */ | ||
| 241 | RESTORE(GAFR0_L); RESTORE(GAFR0_U); | ||
| 242 | RESTORE(GAFR1_L); RESTORE(GAFR1_U); | ||
| 243 | RESTORE(GAFR2_L); RESTORE(GAFR2_U); | ||
| 244 | RESTORE(PGSR0); RESTORE(PGSR1); RESTORE(PGSR2); | ||
| 245 | |||
| 246 | PSSR = PSSR_RDH | PSSR_PH; | ||
| 247 | |||
| 248 | RESTORE(CKEN); | 227 | RESTORE(CKEN); |
| 249 | RESTORE(PSTR); | 228 | RESTORE(PSTR); |
| 250 | } | 229 | } |
| @@ -256,19 +235,32 @@ static void pxa25x_cpu_pm_enter(suspend_state_t state) | |||
| 256 | 235 | ||
| 257 | switch (state) { | 236 | switch (state) { |
| 258 | case PM_SUSPEND_MEM: | 237 | case PM_SUSPEND_MEM: |
| 259 | /* set resume return address */ | ||
| 260 | PSPR = virt_to_phys(pxa_cpu_resume); | ||
| 261 | pxa25x_cpu_suspend(PWRMODE_SLEEP); | 238 | pxa25x_cpu_suspend(PWRMODE_SLEEP); |
| 262 | break; | 239 | break; |
| 263 | } | 240 | } |
| 264 | } | 241 | } |
| 265 | 242 | ||
| 243 | static int pxa25x_cpu_pm_prepare(void) | ||
| 244 | { | ||
| 245 | /* set resume return address */ | ||
| 246 | PSPR = virt_to_phys(pxa_cpu_resume); | ||
| 247 | return 0; | ||
| 248 | } | ||
| 249 | |||
| 250 | static void pxa25x_cpu_pm_finish(void) | ||
| 251 | { | ||
| 252 | /* ensure not to come back here if it wasn't intended */ | ||
| 253 | PSPR = 0; | ||
| 254 | } | ||
| 255 | |||
| 266 | static struct pxa_cpu_pm_fns pxa25x_cpu_pm_fns = { | 256 | static struct pxa_cpu_pm_fns pxa25x_cpu_pm_fns = { |
| 267 | .save_count = SLEEP_SAVE_COUNT, | 257 | .save_count = SLEEP_SAVE_COUNT, |
| 268 | .valid = suspend_valid_only_mem, | 258 | .valid = suspend_valid_only_mem, |
| 269 | .save = pxa25x_cpu_pm_save, | 259 | .save = pxa25x_cpu_pm_save, |
| 270 | .restore = pxa25x_cpu_pm_restore, | 260 | .restore = pxa25x_cpu_pm_restore, |
| 271 | .enter = pxa25x_cpu_pm_enter, | 261 | .enter = pxa25x_cpu_pm_enter, |
| 262 | .prepare = pxa25x_cpu_pm_prepare, | ||
| 263 | .finish = pxa25x_cpu_pm_finish, | ||
| 272 | }; | 264 | }; |
| 273 | 265 | ||
| 274 | static void __init pxa25x_init_pm(void) | 266 | static void __init pxa25x_init_pm(void) |
| @@ -330,6 +322,8 @@ static struct sys_device pxa25x_sysdev[] = { | |||
| 330 | { | 322 | { |
| 331 | .cls = &pxa_irq_sysclass, | 323 | .cls = &pxa_irq_sysclass, |
| 332 | }, { | 324 | }, { |
| 325 | .cls = &pxa2xx_mfp_sysclass, | ||
| 326 | }, { | ||
| 333 | .cls = &pxa_gpio_sysclass, | 327 | .cls = &pxa_gpio_sysclass, |
| 334 | }, | 328 | }, |
| 335 | }; | 329 | }; |
| @@ -338,11 +332,7 @@ static int __init pxa25x_init(void) | |||
| 338 | { | 332 | { |
| 339 | int i, ret = 0; | 333 | int i, ret = 0; |
| 340 | 334 | ||
| 341 | /* Only add HWUART for PXA255/26x; PXA210/250/27x do not have it. */ | 335 | if (cpu_is_pxa25x()) { |
| 342 | if (cpu_is_pxa255()) | ||
| 343 | clks_register(&pxa25x_hwuart_clk, 1); | ||
| 344 | |||
| 345 | if (cpu_is_pxa21x() || cpu_is_pxa25x()) { | ||
| 346 | 336 | ||
| 347 | reset_status = RCSR; | 337 | reset_status = RCSR; |
| 348 | 338 | ||
| @@ -365,9 +355,11 @@ static int __init pxa25x_init(void) | |||
| 365 | return ret; | 355 | return ret; |
| 366 | } | 356 | } |
| 367 | 357 | ||
| 368 | /* Only add HWUART for PXA255/26x; PXA210/250/27x do not have it. */ | 358 | /* Only add HWUART for PXA255/26x; PXA210/250 do not have it. */ |
| 369 | if (cpu_is_pxa255()) | 359 | if (cpu_is_pxa255() || cpu_is_pxa26x()) { |
| 360 | clks_register(&pxa25x_hwuart_clk, 1); | ||
| 370 | ret = platform_device_register(&pxa_device_hwuart); | 361 | ret = platform_device_register(&pxa_device_hwuart); |
| 362 | } | ||
| 371 | 363 | ||
| 372 | return ret; | 364 | return ret; |
| 373 | } | 365 | } |
diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c index f9f6a9c31f4b..3e4ab2279c99 100644 --- a/arch/arm/mach-pxa/pxa27x.c +++ b/arch/arm/mach-pxa/pxa27x.c | |||
| @@ -34,6 +34,13 @@ | |||
| 34 | #include "devices.h" | 34 | #include "devices.h" |
| 35 | #include "clock.h" | 35 | #include "clock.h" |
| 36 | 36 | ||
| 37 | void pxa27x_clear_otgph(void) | ||
| 38 | { | ||
| 39 | if (cpu_is_pxa27x() && (PSSR & PSSR_OTGPH)) | ||
| 40 | PSSR |= PSSR_OTGPH; | ||
| 41 | } | ||
| 42 | EXPORT_SYMBOL(pxa27x_clear_otgph); | ||
| 43 | |||
| 37 | /* Crystal clock: 13MHz */ | 44 | /* Crystal clock: 13MHz */ |
| 38 | #define BASE_CLK 13000000 | 45 | #define BASE_CLK 13000000 |
| 39 | 46 | ||
| @@ -183,36 +190,18 @@ static struct clk pxa27x_clks[] = { | |||
| 183 | * More ones like CP and general purpose register values are preserved | 190 | * More ones like CP and general purpose register values are preserved |
| 184 | * with the stack pointer in sleep.S. | 191 | * with the stack pointer in sleep.S. |
| 185 | */ | 192 | */ |
| 186 | enum { SLEEP_SAVE_PGSR0, SLEEP_SAVE_PGSR1, SLEEP_SAVE_PGSR2, SLEEP_SAVE_PGSR3, | 193 | enum { |
| 187 | |||
| 188 | SLEEP_SAVE_GAFR0_L, SLEEP_SAVE_GAFR0_U, | ||
| 189 | SLEEP_SAVE_GAFR1_L, SLEEP_SAVE_GAFR1_U, | ||
| 190 | SLEEP_SAVE_GAFR2_L, SLEEP_SAVE_GAFR2_U, | ||
| 191 | SLEEP_SAVE_GAFR3_L, SLEEP_SAVE_GAFR3_U, | ||
| 192 | |||
| 193 | SLEEP_SAVE_PSTR, | 194 | SLEEP_SAVE_PSTR, |
| 194 | |||
| 195 | SLEEP_SAVE_CKEN, | 195 | SLEEP_SAVE_CKEN, |
| 196 | |||
| 197 | SLEEP_SAVE_MDREFR, | 196 | SLEEP_SAVE_MDREFR, |
| 198 | SLEEP_SAVE_PWER, SLEEP_SAVE_PCFR, SLEEP_SAVE_PRER, | 197 | SLEEP_SAVE_PCFR, |
| 199 | SLEEP_SAVE_PFER, SLEEP_SAVE_PKWR, | ||
| 200 | |||
| 201 | SLEEP_SAVE_COUNT | 198 | SLEEP_SAVE_COUNT |
| 202 | }; | 199 | }; |
| 203 | 200 | ||
| 204 | void pxa27x_cpu_pm_save(unsigned long *sleep_save) | 201 | void pxa27x_cpu_pm_save(unsigned long *sleep_save) |
| 205 | { | 202 | { |
| 206 | SAVE(PGSR0); SAVE(PGSR1); SAVE(PGSR2); SAVE(PGSR3); | ||
| 207 | |||
| 208 | SAVE(GAFR0_L); SAVE(GAFR0_U); | ||
| 209 | SAVE(GAFR1_L); SAVE(GAFR1_U); | ||
| 210 | SAVE(GAFR2_L); SAVE(GAFR2_U); | ||
| 211 | SAVE(GAFR3_L); SAVE(GAFR3_U); | ||
| 212 | |||
| 213 | SAVE(MDREFR); | 203 | SAVE(MDREFR); |
| 214 | SAVE(PWER); SAVE(PCFR); SAVE(PRER); | 204 | SAVE(PCFR); |
| 215 | SAVE(PFER); SAVE(PKWR); | ||
| 216 | 205 | ||
| 217 | SAVE(CKEN); | 206 | SAVE(CKEN); |
| 218 | SAVE(PSTR); | 207 | SAVE(PSTR); |
| @@ -220,24 +209,12 @@ void pxa27x_cpu_pm_save(unsigned long *sleep_save) | |||
| 220 | 209 | ||
| 221 | void pxa27x_cpu_pm_restore(unsigned long *sleep_save) | 210 | void pxa27x_cpu_pm_restore(unsigned long *sleep_save) |
| 222 | { | 211 | { |
| 223 | /* ensure not to come back here if it wasn't intended */ | ||
| 224 | PSPR = 0; | ||
| 225 | |||
| 226 | /* restore registers */ | ||
| 227 | RESTORE(GAFR0_L); RESTORE(GAFR0_U); | ||
| 228 | RESTORE(GAFR1_L); RESTORE(GAFR1_U); | ||
| 229 | RESTORE(GAFR2_L); RESTORE(GAFR2_U); | ||
| 230 | RESTORE(GAFR3_L); RESTORE(GAFR3_U); | ||
| 231 | RESTORE(PGSR0); RESTORE(PGSR1); RESTORE(PGSR2); RESTORE(PGSR3); | ||
| 232 | |||
| 233 | RESTORE(MDREFR); | 212 | RESTORE(MDREFR); |
| 234 | RESTORE(PWER); RESTORE(PCFR); RESTORE(PRER); | 213 | RESTORE(PCFR); |
| 235 | RESTORE(PFER); RESTORE(PKWR); | ||
| 236 | 214 | ||
| 237 | PSSR = PSSR_RDH | PSSR_PH; | 215 | PSSR = PSSR_RDH | PSSR_PH; |
| 238 | 216 | ||
| 239 | RESTORE(CKEN); | 217 | RESTORE(CKEN); |
| 240 | |||
| 241 | RESTORE(PSTR); | 218 | RESTORE(PSTR); |
| 242 | } | 219 | } |
| 243 | 220 | ||
| @@ -259,8 +236,6 @@ void pxa27x_cpu_pm_enter(suspend_state_t state) | |||
| 259 | pxa_cpu_standby(); | 236 | pxa_cpu_standby(); |
| 260 | break; | 237 | break; |
| 261 | case PM_SUSPEND_MEM: | 238 | case PM_SUSPEND_MEM: |
| 262 | /* set resume return address */ | ||
| 263 | PSPR = virt_to_phys(pxa_cpu_resume); | ||
| 264 | pxa27x_cpu_suspend(PWRMODE_SLEEP); | 239 | pxa27x_cpu_suspend(PWRMODE_SLEEP); |
| 265 | break; | 240 | break; |
| 266 | } | 241 | } |
| @@ -271,12 +246,27 @@ static int pxa27x_cpu_pm_valid(suspend_state_t state) | |||
| 271 | return state == PM_SUSPEND_MEM || state == PM_SUSPEND_STANDBY; | 246 | return state == PM_SUSPEND_MEM || state == PM_SUSPEND_STANDBY; |
| 272 | } | 247 | } |
| 273 | 248 | ||
| 249 | static int pxa27x_cpu_pm_prepare(void) | ||
| 250 | { | ||
| 251 | /* set resume return address */ | ||
| 252 | PSPR = virt_to_phys(pxa_cpu_resume); | ||
| 253 | return 0; | ||
| 254 | } | ||
| 255 | |||
| 256 | static void pxa27x_cpu_pm_finish(void) | ||
| 257 | { | ||
| 258 | /* ensure not to come back here if it wasn't intended */ | ||
| 259 | PSPR = 0; | ||
| 260 | } | ||
| 261 | |||
| 274 | static struct pxa_cpu_pm_fns pxa27x_cpu_pm_fns = { | 262 | static struct pxa_cpu_pm_fns pxa27x_cpu_pm_fns = { |
| 275 | .save_count = SLEEP_SAVE_COUNT, | 263 | .save_count = SLEEP_SAVE_COUNT, |
| 276 | .save = pxa27x_cpu_pm_save, | 264 | .save = pxa27x_cpu_pm_save, |
| 277 | .restore = pxa27x_cpu_pm_restore, | 265 | .restore = pxa27x_cpu_pm_restore, |
| 278 | .valid = pxa27x_cpu_pm_valid, | 266 | .valid = pxa27x_cpu_pm_valid, |
| 279 | .enter = pxa27x_cpu_pm_enter, | 267 | .enter = pxa27x_cpu_pm_enter, |
| 268 | .prepare = pxa27x_cpu_pm_prepare, | ||
| 269 | .finish = pxa27x_cpu_pm_finish, | ||
| 280 | }; | 270 | }; |
| 281 | 271 | ||
| 282 | static void __init pxa27x_init_pm(void) | 272 | static void __init pxa27x_init_pm(void) |
| @@ -349,7 +339,7 @@ struct platform_device pxa27x_device_i2c_power = { | |||
| 349 | .num_resources = ARRAY_SIZE(i2c_power_resources), | 339 | .num_resources = ARRAY_SIZE(i2c_power_resources), |
| 350 | }; | 340 | }; |
| 351 | 341 | ||
| 352 | void __init pxa_set_i2c_power_info(struct i2c_pxa_platform_data *info) | 342 | void __init pxa27x_set_i2c_power_info(struct i2c_pxa_platform_data *info) |
| 353 | { | 343 | { |
| 354 | local_irq_disable(); | 344 | local_irq_disable(); |
| 355 | PCFR |= PCFR_PI2CEN; | 345 | PCFR |= PCFR_PI2CEN; |
| @@ -376,6 +366,8 @@ static struct sys_device pxa27x_sysdev[] = { | |||
| 376 | { | 366 | { |
| 377 | .cls = &pxa_irq_sysclass, | 367 | .cls = &pxa_irq_sysclass, |
| 378 | }, { | 368 | }, { |
| 369 | .cls = &pxa2xx_mfp_sysclass, | ||
| 370 | }, { | ||
| 379 | .cls = &pxa_gpio_sysclass, | 371 | .cls = &pxa_gpio_sysclass, |
| 380 | }, | 372 | }, |
| 381 | }; | 373 | }; |
diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c index 03cbc38103ed..b3cd5d0b0f35 100644 --- a/arch/arm/mach-pxa/pxa3xx.c +++ b/arch/arm/mach-pxa/pxa3xx.c | |||
| @@ -203,6 +203,19 @@ static const struct clkops clk_pout_ops = { | |||
| 203 | .disable = clk_pout_disable, | 203 | .disable = clk_pout_disable, |
| 204 | }; | 204 | }; |
| 205 | 205 | ||
| 206 | static void clk_dummy_enable(struct clk *clk) | ||
| 207 | { | ||
| 208 | } | ||
| 209 | |||
| 210 | static void clk_dummy_disable(struct clk *clk) | ||
| 211 | { | ||
| 212 | } | ||
| 213 | |||
| 214 | static const struct clkops clk_dummy_ops = { | ||
| 215 | .enable = clk_dummy_enable, | ||
| 216 | .disable = clk_dummy_disable, | ||
| 217 | }; | ||
| 218 | |||
| 206 | static struct clk pxa3xx_clks[] = { | 219 | static struct clk pxa3xx_clks[] = { |
| 207 | { | 220 | { |
| 208 | .name = "CLK_POUT", | 221 | .name = "CLK_POUT", |
| @@ -211,6 +224,13 @@ static struct clk pxa3xx_clks[] = { | |||
| 211 | .delay = 70, | 224 | .delay = 70, |
| 212 | }, | 225 | }, |
| 213 | 226 | ||
| 227 | /* Power I2C clock is always on */ | ||
| 228 | { | ||
| 229 | .name = "I2CCLK", | ||
| 230 | .ops = &clk_dummy_ops, | ||
| 231 | .dev = &pxa3xx_device_i2c_power.dev, | ||
| 232 | }, | ||
| 233 | |||
| 214 | PXA3xx_CK("LCDCLK", LCD, &clk_pxa3xx_hsio_ops, &pxa_device_fb.dev), | 234 | PXA3xx_CK("LCDCLK", LCD, &clk_pxa3xx_hsio_ops, &pxa_device_fb.dev), |
| 215 | PXA3xx_CK("CAMCLK", CAMERA, &clk_pxa3xx_hsio_ops, NULL), | 235 | PXA3xx_CK("CAMCLK", CAMERA, &clk_pxa3xx_hsio_ops, NULL), |
| 216 | PXA3xx_CK("AC97CLK", AC97, &clk_pxa3xx_ac97_ops, NULL), | 236 | PXA3xx_CK("AC97CLK", AC97, &clk_pxa3xx_ac97_ops, NULL), |
| @@ -509,6 +529,30 @@ void __init pxa3xx_init_irq(void) | |||
| 509 | * device registration specific to PXA3xx. | 529 | * device registration specific to PXA3xx. |
| 510 | */ | 530 | */ |
| 511 | 531 | ||
| 532 | static struct resource i2c_power_resources[] = { | ||
| 533 | { | ||
| 534 | .start = 0x40f500c0, | ||
| 535 | .end = 0x40f500d3, | ||
| 536 | .flags = IORESOURCE_MEM, | ||
| 537 | }, { | ||
| 538 | .start = IRQ_PWRI2C, | ||
| 539 | .end = IRQ_PWRI2C, | ||
| 540 | .flags = IORESOURCE_IRQ, | ||
| 541 | }, | ||
| 542 | }; | ||
| 543 | |||
| 544 | struct platform_device pxa3xx_device_i2c_power = { | ||
| 545 | .name = "pxa2xx-i2c", | ||
| 546 | .id = 1, | ||
| 547 | .resource = i2c_power_resources, | ||
| 548 | .num_resources = ARRAY_SIZE(i2c_power_resources), | ||
| 549 | }; | ||
| 550 | |||
| 551 | void __init pxa3xx_set_i2c_power_info(struct i2c_pxa_platform_data *info) | ||
| 552 | { | ||
| 553 | pxa3xx_device_i2c_power.dev.platform_data = info; | ||
| 554 | } | ||
| 555 | |||
| 512 | static struct platform_device *devices[] __initdata = { | 556 | static struct platform_device *devices[] __initdata = { |
| 513 | /* &pxa_device_udc, The UDC driver is PXA25x only */ | 557 | /* &pxa_device_udc, The UDC driver is PXA25x only */ |
| 514 | &pxa_device_ffuart, | 558 | &pxa_device_ffuart, |
| @@ -522,6 +566,7 @@ static struct platform_device *devices[] __initdata = { | |||
| 522 | &pxa3xx_device_ssp4, | 566 | &pxa3xx_device_ssp4, |
| 523 | &pxa27x_device_pwm0, | 567 | &pxa27x_device_pwm0, |
| 524 | &pxa27x_device_pwm1, | 568 | &pxa27x_device_pwm1, |
| 569 | &pxa3xx_device_i2c_power, | ||
| 525 | }; | 570 | }; |
| 526 | 571 | ||
| 527 | static struct sys_device pxa3xx_sysdev[] = { | 572 | static struct sys_device pxa3xx_sysdev[] = { |
diff --git a/arch/arm/mach-pxa/sharpsl_pm.c b/arch/arm/mach-pxa/sharpsl_pm.c index e804ae09370c..15c2f1a8623b 100644 --- a/arch/arm/mach-pxa/sharpsl_pm.c +++ b/arch/arm/mach-pxa/sharpsl_pm.c | |||
| @@ -116,24 +116,20 @@ struct battery_thresh spitz_battery_levels_noac[] = { | |||
| 116 | { 0, 0}, | 116 | { 0, 0}, |
| 117 | }; | 117 | }; |
| 118 | 118 | ||
| 119 | /* MAX1111 Commands */ | ||
| 120 | #define MAXCTRL_PD0 1u << 0 | ||
| 121 | #define MAXCTRL_PD1 1u << 1 | ||
| 122 | #define MAXCTRL_SGL 1u << 2 | ||
| 123 | #define MAXCTRL_UNI 1u << 3 | ||
| 124 | #define MAXCTRL_SEL_SH 4 | ||
| 125 | #define MAXCTRL_STR 1u << 7 | ||
| 126 | |||
| 127 | /* | 119 | /* |
| 128 | * Read MAX1111 ADC | 120 | * Read MAX1111 ADC |
| 129 | */ | 121 | */ |
| 122 | extern int max1111_read_channel(int); | ||
| 123 | |||
| 130 | int sharpsl_pm_pxa_read_max1111(int channel) | 124 | int sharpsl_pm_pxa_read_max1111(int channel) |
| 131 | { | 125 | { |
| 132 | if (machine_is_tosa()) // Ugly, better move this function into another module | 126 | if (machine_is_tosa()) // Ugly, better move this function into another module |
| 133 | return 0; | 127 | return 0; |
| 134 | 128 | ||
| 135 | return corgi_ssp_max1111_get((channel << MAXCTRL_SEL_SH) | MAXCTRL_PD0 | MAXCTRL_PD1 | 129 | /* max1111 accepts channels from 0-3, however, |
| 136 | | MAXCTRL_SGL | MAXCTRL_UNI | MAXCTRL_STR); | 130 | * it is encoded from 0-7 here in the code. |
| 131 | */ | ||
| 132 | return max1111_read_channel(channel >> 1); | ||
| 137 | } | 133 | } |
| 138 | 134 | ||
| 139 | void sharpsl_pm_pxa_init(void) | 135 | void sharpsl_pm_pxa_init(void) |
diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c index 7e181afcca39..9b4f24c7c055 100644 --- a/arch/arm/mach-pxa/spitz.c +++ b/arch/arm/mach-pxa/spitz.c | |||
| @@ -19,10 +19,17 @@ | |||
| 19 | #include <linux/major.h> | 19 | #include <linux/major.h> |
| 20 | #include <linux/fs.h> | 20 | #include <linux/fs.h> |
| 21 | #include <linux/interrupt.h> | 21 | #include <linux/interrupt.h> |
| 22 | #include <linux/gpio.h> | ||
| 23 | #include <linux/leds.h> | ||
| 22 | #include <linux/mmc/host.h> | 24 | #include <linux/mmc/host.h> |
| 23 | #include <linux/pm.h> | 25 | #include <linux/pm.h> |
| 24 | #include <linux/backlight.h> | 26 | #include <linux/backlight.h> |
| 25 | #include <linux/io.h> | 27 | #include <linux/io.h> |
| 28 | #include <linux/i2c.h> | ||
| 29 | #include <linux/i2c/pca953x.h> | ||
| 30 | #include <linux/spi/spi.h> | ||
| 31 | #include <linux/spi/ads7846.h> | ||
| 32 | #include <linux/spi/corgi_lcd.h> | ||
| 26 | 33 | ||
| 27 | #include <asm/setup.h> | 34 | #include <asm/setup.h> |
| 28 | #include <asm/memory.h> | 35 | #include <asm/memory.h> |
| @@ -37,7 +44,7 @@ | |||
| 37 | 44 | ||
| 38 | #include <mach/pxa-regs.h> | 45 | #include <mach/pxa-regs.h> |
| 39 | #include <mach/pxa2xx-regs.h> | 46 | #include <mach/pxa2xx-regs.h> |
| 40 | #include <mach/pxa2xx-gpio.h> | 47 | #include <mach/mfp-pxa27x.h> |
| 41 | #include <mach/pxa27x-udc.h> | 48 | #include <mach/pxa27x-udc.h> |
| 42 | #include <mach/reset.h> | 49 | #include <mach/reset.h> |
| 43 | #include <mach/i2c.h> | 50 | #include <mach/i2c.h> |
| @@ -46,7 +53,7 @@ | |||
| 46 | #include <mach/ohci.h> | 53 | #include <mach/ohci.h> |
| 47 | #include <mach/udc.h> | 54 | #include <mach/udc.h> |
| 48 | #include <mach/pxafb.h> | 55 | #include <mach/pxafb.h> |
| 49 | #include <mach/akita.h> | 56 | #include <mach/pxa2xx_spi.h> |
| 50 | #include <mach/spitz.h> | 57 | #include <mach/spitz.h> |
| 51 | #include <mach/sharpsl.h> | 58 | #include <mach/sharpsl.h> |
| 52 | 59 | ||
| @@ -57,6 +64,66 @@ | |||
| 57 | #include "devices.h" | 64 | #include "devices.h" |
| 58 | #include "sharpsl.h" | 65 | #include "sharpsl.h" |
| 59 | 66 | ||
| 67 | static unsigned long spitz_pin_config[] __initdata = { | ||
| 68 | /* Chip Selects */ | ||
| 69 | GPIO78_nCS_2, /* SCOOP #2 */ | ||
| 70 | GPIO80_nCS_4, /* SCOOP #1 */ | ||
| 71 | |||
| 72 | /* LCD - 16bpp Active TFT */ | ||
| 73 | GPIO58_LCD_LDD_0, | ||
| 74 | GPIO59_LCD_LDD_1, | ||
| 75 | GPIO60_LCD_LDD_2, | ||
| 76 | GPIO61_LCD_LDD_3, | ||
| 77 | GPIO62_LCD_LDD_4, | ||
| 78 | GPIO63_LCD_LDD_5, | ||
| 79 | GPIO64_LCD_LDD_6, | ||
| 80 | GPIO65_LCD_LDD_7, | ||
| 81 | GPIO66_LCD_LDD_8, | ||
| 82 | GPIO67_LCD_LDD_9, | ||
| 83 | GPIO68_LCD_LDD_10, | ||
| 84 | GPIO69_LCD_LDD_11, | ||
| 85 | GPIO70_LCD_LDD_12, | ||
| 86 | GPIO71_LCD_LDD_13, | ||
| 87 | GPIO72_LCD_LDD_14, | ||
| 88 | GPIO73_LCD_LDD_15, | ||
| 89 | GPIO74_LCD_FCLK, | ||
| 90 | GPIO75_LCD_LCLK, | ||
| 91 | GPIO76_LCD_PCLK, | ||
| 92 | |||
| 93 | /* PC Card */ | ||
| 94 | GPIO48_nPOE, | ||
| 95 | GPIO49_nPWE, | ||
| 96 | GPIO50_nPIOR, | ||
| 97 | GPIO51_nPIOW, | ||
| 98 | GPIO85_nPCE_1, | ||
| 99 | GPIO54_nPCE_2, | ||
| 100 | GPIO79_PSKTSEL, | ||
| 101 | GPIO55_nPREG, | ||
| 102 | GPIO56_nPWAIT, | ||
| 103 | GPIO57_nIOIS16, | ||
| 104 | |||
| 105 | /* MMC */ | ||
| 106 | GPIO32_MMC_CLK, | ||
| 107 | GPIO112_MMC_CMD, | ||
| 108 | GPIO92_MMC_DAT_0, | ||
| 109 | GPIO109_MMC_DAT_1, | ||
| 110 | GPIO110_MMC_DAT_2, | ||
| 111 | GPIO111_MMC_DAT_3, | ||
| 112 | |||
| 113 | /* GPIOs */ | ||
| 114 | GPIO9_GPIO, /* SPITZ_GPIO_nSD_DETECT */ | ||
| 115 | GPIO81_GPIO, /* SPITZ_GPIO_nSD_WP */ | ||
| 116 | GPIO41_GPIO, /* SPITZ_GPIO_USB_CONNECT */ | ||
| 117 | GPIO37_GPIO, /* SPITZ_GPIO_USB_HOST */ | ||
| 118 | GPIO35_GPIO, /* SPITZ_GPIO_USB_DEVICE */ | ||
| 119 | GPIO22_GPIO, /* SPITZ_GPIO_HSYNC */ | ||
| 120 | GPIO94_GPIO, /* SPITZ_GPIO_CF_CD */ | ||
| 121 | GPIO105_GPIO, /* SPITZ_GPIO_CF_IRQ */ | ||
| 122 | GPIO106_GPIO, /* SPITZ_GPIO_CF2_IRQ */ | ||
| 123 | |||
| 124 | GPIO1_GPIO | WAKEUP_ON_EDGE_RISE, | ||
| 125 | }; | ||
| 126 | |||
| 60 | /* | 127 | /* |
| 61 | * Spitz SCOOP Device #1 | 128 | * Spitz SCOOP Device #1 |
| 62 | */ | 129 | */ |
| @@ -69,10 +136,11 @@ static struct resource spitz_scoop_resources[] = { | |||
| 69 | }; | 136 | }; |
| 70 | 137 | ||
| 71 | static struct scoop_config spitz_scoop_setup = { | 138 | static struct scoop_config spitz_scoop_setup = { |
| 72 | .io_dir = SPITZ_SCP_IO_DIR, | 139 | .io_dir = SPITZ_SCP_IO_DIR, |
| 73 | .io_out = SPITZ_SCP_IO_OUT, | 140 | .io_out = SPITZ_SCP_IO_OUT, |
| 74 | .suspend_clr = SPITZ_SCP_SUS_CLR, | 141 | .suspend_clr = SPITZ_SCP_SUS_CLR, |
| 75 | .suspend_set = SPITZ_SCP_SUS_SET, | 142 | .suspend_set = SPITZ_SCP_SUS_SET, |
| 143 | .gpio_base = SPITZ_SCP_GPIO_BASE, | ||
| 76 | }; | 144 | }; |
| 77 | 145 | ||
| 78 | struct platform_device spitzscoop_device = { | 146 | struct platform_device spitzscoop_device = { |
| @@ -97,10 +165,11 @@ static struct resource spitz_scoop2_resources[] = { | |||
| 97 | }; | 165 | }; |
| 98 | 166 | ||
| 99 | static struct scoop_config spitz_scoop2_setup = { | 167 | static struct scoop_config spitz_scoop2_setup = { |
| 100 | .io_dir = SPITZ_SCP2_IO_DIR, | 168 | .io_dir = SPITZ_SCP2_IO_DIR, |
| 101 | .io_out = SPITZ_SCP2_IO_OUT, | 169 | .io_out = SPITZ_SCP2_IO_OUT, |
| 102 | .suspend_clr = SPITZ_SCP2_SUS_CLR, | 170 | .suspend_clr = SPITZ_SCP2_SUS_CLR, |
| 103 | .suspend_set = SPITZ_SCP2_SUS_SET, | 171 | .suspend_set = SPITZ_SCP2_SUS_SET, |
| 172 | .gpio_base = SPITZ_SCP2_GPIO_BASE, | ||
| 104 | }; | 173 | }; |
| 105 | 174 | ||
| 106 | struct platform_device spitzscoop2_device = { | 175 | struct platform_device spitzscoop2_device = { |
| @@ -122,7 +191,7 @@ static void spitz_card_pwr_ctrl(int device, unsigned short new_cpr) | |||
| 122 | unsigned short cpr = read_scoop_reg(&spitzscoop_device.dev, SCOOP_CPR); | 191 | unsigned short cpr = read_scoop_reg(&spitzscoop_device.dev, SCOOP_CPR); |
| 123 | 192 | ||
| 124 | if (new_cpr & 0x0007) { | 193 | if (new_cpr & 0x0007) { |
| 125 | set_scoop_gpio(&spitzscoop_device.dev, SPITZ_SCP_CF_POWER); | 194 | gpio_set_value(SPITZ_GPIO_CF_POWER, 1); |
| 126 | if (!(cpr & 0x0002) && !(cpr & 0x0004)) | 195 | if (!(cpr & 0x0002) && !(cpr & 0x0004)) |
| 127 | mdelay(5); | 196 | mdelay(5); |
| 128 | if (device == SPITZ_PWR_CF) | 197 | if (device == SPITZ_PWR_CF) |
| @@ -138,34 +207,13 @@ static void spitz_card_pwr_ctrl(int device, unsigned short new_cpr) | |||
| 138 | if (!(cpr & 0x0002) && !(cpr & 0x0004)) { | 207 | if (!(cpr & 0x0002) && !(cpr & 0x0004)) { |
| 139 | write_scoop_reg(&spitzscoop_device.dev, SCOOP_CPR, 0x0000); | 208 | write_scoop_reg(&spitzscoop_device.dev, SCOOP_CPR, 0x0000); |
| 140 | mdelay(1); | 209 | mdelay(1); |
| 141 | reset_scoop_gpio(&spitzscoop_device.dev, SPITZ_SCP_CF_POWER); | 210 | gpio_set_value(SPITZ_GPIO_CF_POWER, 0); |
| 142 | } else { | 211 | } else { |
| 143 | write_scoop_reg(&spitzscoop_device.dev, SCOOP_CPR, cpr | new_cpr); | 212 | write_scoop_reg(&spitzscoop_device.dev, SCOOP_CPR, cpr | new_cpr); |
| 144 | } | 213 | } |
| 145 | } | 214 | } |
| 146 | } | 215 | } |
| 147 | 216 | ||
| 148 | static void spitz_pcmcia_init(void) | ||
| 149 | { | ||
| 150 | /* Setup default state of GPIO outputs | ||
| 151 | before we enable them as outputs. */ | ||
| 152 | GPSR(GPIO48_nPOE) = GPIO_bit(GPIO48_nPOE) | | ||
| 153 | GPIO_bit(GPIO49_nPWE) | GPIO_bit(GPIO50_nPIOR) | | ||
| 154 | GPIO_bit(GPIO51_nPIOW) | GPIO_bit(GPIO54_nPCE_2); | ||
| 155 | GPSR(GPIO85_nPCE_1) = GPIO_bit(GPIO85_nPCE_1); | ||
| 156 | |||
| 157 | pxa_gpio_mode(GPIO48_nPOE_MD); | ||
| 158 | pxa_gpio_mode(GPIO49_nPWE_MD); | ||
| 159 | pxa_gpio_mode(GPIO50_nPIOR_MD); | ||
| 160 | pxa_gpio_mode(GPIO51_nPIOW_MD); | ||
| 161 | pxa_gpio_mode(GPIO55_nPREG_MD); | ||
| 162 | pxa_gpio_mode(GPIO56_nPWAIT_MD); | ||
| 163 | pxa_gpio_mode(GPIO57_nIOIS16_MD); | ||
| 164 | pxa_gpio_mode(GPIO85_nPCE_1_MD); | ||
| 165 | pxa_gpio_mode(GPIO54_nPCE_2_MD); | ||
| 166 | pxa_gpio_mode(GPIO104_pSKTSEL_MD); | ||
| 167 | } | ||
| 168 | |||
| 169 | static void spitz_pcmcia_pwr(struct device *scoop, unsigned short cpr, int nr) | 217 | static void spitz_pcmcia_pwr(struct device *scoop, unsigned short cpr, int nr) |
| 170 | { | 218 | { |
| 171 | /* Only need to override behaviour for slot 0 */ | 219 | /* Only need to override behaviour for slot 0 */ |
| @@ -191,165 +239,169 @@ static struct scoop_pcmcia_dev spitz_pcmcia_scoop[] = { | |||
| 191 | static struct scoop_pcmcia_config spitz_pcmcia_config = { | 239 | static struct scoop_pcmcia_config spitz_pcmcia_config = { |
| 192 | .devs = &spitz_pcmcia_scoop[0], | 240 | .devs = &spitz_pcmcia_scoop[0], |
| 193 | .num_devs = 2, | 241 | .num_devs = 2, |
| 194 | .pcmcia_init = spitz_pcmcia_init, | ||
| 195 | .power_ctrl = spitz_pcmcia_pwr, | 242 | .power_ctrl = spitz_pcmcia_pwr, |
| 196 | }; | 243 | }; |
| 197 | 244 | ||
| 198 | EXPORT_SYMBOL(spitzscoop_device); | 245 | EXPORT_SYMBOL(spitzscoop_device); |
| 199 | EXPORT_SYMBOL(spitzscoop2_device); | 246 | EXPORT_SYMBOL(spitzscoop2_device); |
| 200 | 247 | ||
| 201 | |||
| 202 | /* | 248 | /* |
| 203 | * Spitz SSP Device | 249 | * Spitz Keyboard Device |
| 204 | * | ||
| 205 | * Set the parent as the scoop device because a lot of SSP devices | ||
| 206 | * also use scoop functions and this makes the power up/down order | ||
| 207 | * work correctly. | ||
| 208 | */ | 250 | */ |
| 209 | struct platform_device spitzssp_device = { | 251 | static struct platform_device spitzkbd_device = { |
| 210 | .name = "corgi-ssp", | 252 | .name = "spitz-keyboard", |
| 211 | .dev = { | ||
| 212 | .parent = &spitzscoop_device.dev, | ||
| 213 | }, | ||
| 214 | .id = -1, | 253 | .id = -1, |
| 215 | }; | 254 | }; |
| 216 | 255 | ||
| 217 | struct corgissp_machinfo spitz_ssp_machinfo = { | ||
| 218 | .port = 2, | ||
| 219 | .cs_lcdcon = SPITZ_GPIO_LCDCON_CS, | ||
| 220 | .cs_ads7846 = SPITZ_GPIO_ADS7846_CS, | ||
| 221 | .cs_max1111 = SPITZ_GPIO_MAX1111_CS, | ||
| 222 | .clk_lcdcon = 520, | ||
| 223 | .clk_ads7846 = 14, | ||
| 224 | .clk_max1111 = 56, | ||
| 225 | }; | ||
| 226 | |||
| 227 | 256 | ||
| 228 | /* | 257 | /* |
| 229 | * Spitz Backlight Device | 258 | * Spitz LEDs |
| 230 | */ | 259 | */ |
| 231 | static void spitz_bl_kick_battery(void) | 260 | static struct gpio_led spitz_gpio_leds[] = { |
| 232 | { | 261 | { |
| 233 | void (*kick_batt)(void); | 262 | .name = "spitz:amber:charge", |
| 234 | 263 | .default_trigger = "sharpsl-charge", | |
| 235 | kick_batt = symbol_get(sharpsl_battery_kick); | 264 | .gpio = SPITZ_GPIO_LED_ORANGE, |
| 236 | if (kick_batt) { | 265 | }, |
| 237 | kick_batt(); | 266 | { |
| 238 | symbol_put(sharpsl_battery_kick); | 267 | .name = "spitz:green:hddactivity", |
| 239 | } | 268 | .default_trigger = "ide-disk", |
| 240 | } | 269 | .gpio = SPITZ_GPIO_LED_GREEN, |
| 241 | |||
| 242 | static struct generic_bl_info spitz_bl_machinfo = { | ||
| 243 | .name = "corgi-bl", | ||
| 244 | .default_intensity = 0x1f, | ||
| 245 | .limit_mask = 0x0b, | ||
| 246 | .max_intensity = 0x2f, | ||
| 247 | .kick_battery = spitz_bl_kick_battery, | ||
| 248 | }; | ||
| 249 | |||
| 250 | static struct platform_device spitzbl_device = { | ||
| 251 | .name = "generic-bl", | ||
| 252 | .dev = { | ||
| 253 | .platform_data = &spitz_bl_machinfo, | ||
| 254 | }, | 270 | }, |
| 255 | .id = -1, | ||
| 256 | }; | 271 | }; |
| 257 | 272 | ||
| 258 | 273 | static struct gpio_led_platform_data spitz_gpio_leds_info = { | |
| 259 | /* | 274 | .leds = spitz_gpio_leds, |
| 260 | * Spitz Keyboard Device | 275 | .num_leds = ARRAY_SIZE(spitz_gpio_leds), |
| 261 | */ | ||
| 262 | static struct platform_device spitzkbd_device = { | ||
| 263 | .name = "spitz-keyboard", | ||
| 264 | .id = -1, | ||
| 265 | }; | 276 | }; |
| 266 | 277 | ||
| 267 | |||
| 268 | /* | ||
| 269 | * Spitz LEDs | ||
| 270 | */ | ||
| 271 | static struct platform_device spitzled_device = { | 278 | static struct platform_device spitzled_device = { |
| 272 | .name = "spitz-led", | 279 | .name = "leds-gpio", |
| 273 | .id = -1, | 280 | .id = -1, |
| 281 | .dev = { | ||
| 282 | .platform_data = &spitz_gpio_leds_info, | ||
| 283 | }, | ||
| 274 | }; | 284 | }; |
| 275 | 285 | ||
| 276 | /* | 286 | #if defined(CONFIG_SPI_PXA2XX) || defined(CONFIG_SPI_PXA2XX_MODULE) |
| 277 | * Spitz Touch Screen Device | 287 | static struct pxa2xx_spi_master spitz_spi_info = { |
| 278 | */ | 288 | .num_chipselect = 3, |
| 289 | }; | ||
| 279 | 290 | ||
| 280 | static unsigned long (*get_hsync_invperiod)(struct device *dev); | 291 | static struct ads7846_platform_data spitz_ads7846_info = { |
| 292 | .model = 7846, | ||
| 293 | .vref_delay_usecs = 100, | ||
| 294 | .x_plate_ohms = 419, | ||
| 295 | .y_plate_ohms = 486, | ||
| 296 | .gpio_pendown = SPITZ_GPIO_TP_INT, | ||
| 297 | }; | ||
| 281 | 298 | ||
| 282 | static void inline sharpsl_wait_sync(int gpio) | 299 | static void spitz_ads7846_cs(u32 command) |
| 283 | { | 300 | { |
| 284 | while((GPLR(gpio) & GPIO_bit(gpio)) == 0); | 301 | gpio_set_value(SPITZ_GPIO_ADS7846_CS, !(command == PXA2XX_CS_ASSERT)); |
| 285 | while((GPLR(gpio) & GPIO_bit(gpio)) != 0); | ||
| 286 | } | 302 | } |
| 287 | 303 | ||
| 288 | static struct device *spitz_pxafb_dev; | 304 | static struct pxa2xx_spi_chip spitz_ads7846_chip = { |
| 305 | .cs_control = spitz_ads7846_cs, | ||
| 306 | }; | ||
| 289 | 307 | ||
| 290 | static int is_pxafb_device(struct device * dev, void * data) | 308 | static void spitz_bl_kick_battery(void) |
| 291 | { | 309 | { |
| 292 | struct platform_device *pdev = container_of(dev, struct platform_device, dev); | 310 | void (*kick_batt)(void); |
| 293 | |||
| 294 | return (strncmp(pdev->name, "pxa2xx-fb", 9) == 0); | ||
| 295 | } | ||
| 296 | 311 | ||
| 297 | static unsigned long spitz_get_hsync_invperiod(void) | 312 | kick_batt = symbol_get(sharpsl_battery_kick); |
| 298 | { | 313 | if (kick_batt) { |
| 299 | #ifdef CONFIG_FB_PXA | 314 | kick_batt(); |
| 300 | if (!spitz_pxafb_dev) { | 315 | symbol_put(sharpsl_battery_kick); |
| 301 | spitz_pxafb_dev = bus_find_device(&platform_bus_type, NULL, NULL, is_pxafb_device); | ||
| 302 | if (!spitz_pxafb_dev) | ||
| 303 | return 0; | ||
| 304 | } | 316 | } |
| 305 | if (!get_hsync_invperiod) | ||
| 306 | get_hsync_invperiod = symbol_get(pxafb_get_hsync_time); | ||
| 307 | if (!get_hsync_invperiod) | ||
| 308 | #endif | ||
| 309 | return 0; | ||
| 310 | |||
| 311 | return get_hsync_invperiod(spitz_pxafb_dev); | ||
| 312 | } | 317 | } |
| 313 | 318 | ||
| 314 | static void spitz_put_hsync(void) | 319 | static struct corgi_lcd_platform_data spitz_lcdcon_info = { |
| 315 | { | 320 | .init_mode = CORGI_LCD_MODE_VGA, |
| 316 | put_device(spitz_pxafb_dev); | 321 | .max_intensity = 0x2f, |
| 317 | if (get_hsync_invperiod) | 322 | .default_intensity = 0x1f, |
| 318 | symbol_put(pxafb_get_hsync_time); | 323 | .limit_mask = 0x0b, |
| 319 | spitz_pxafb_dev = NULL; | 324 | .gpio_backlight_cont = SPITZ_GPIO_BACKLIGHT_CONT, |
| 320 | get_hsync_invperiod = NULL; | 325 | .gpio_backlight_on = SPITZ_GPIO_BACKLIGHT_ON, |
| 321 | } | 326 | .kick_battery = spitz_bl_kick_battery, |
| 327 | }; | ||
| 322 | 328 | ||
| 323 | static void spitz_wait_hsync(void) | 329 | static void spitz_lcdcon_cs(u32 command) |
| 324 | { | 330 | { |
| 325 | sharpsl_wait_sync(SPITZ_GPIO_HSYNC); | 331 | gpio_set_value(SPITZ_GPIO_LCDCON_CS, !(command == PXA2XX_CS_ASSERT)); |
| 326 | } | 332 | } |
| 327 | 333 | ||
| 328 | static struct resource spitzts_resources[] = { | 334 | static struct pxa2xx_spi_chip spitz_lcdcon_chip = { |
| 329 | [0] = { | 335 | .cs_control = spitz_lcdcon_cs, |
| 330 | .start = SPITZ_IRQ_GPIO_TP_INT, | ||
| 331 | .end = SPITZ_IRQ_GPIO_TP_INT, | ||
| 332 | .flags = IORESOURCE_IRQ, | ||
| 333 | }, | ||
| 334 | }; | 336 | }; |
| 335 | 337 | ||
| 336 | static struct corgits_machinfo spitz_ts_machinfo = { | 338 | static void spitz_max1111_cs(u32 command) |
| 337 | .get_hsync_invperiod = spitz_get_hsync_invperiod, | 339 | { |
| 338 | .put_hsync = spitz_put_hsync, | 340 | gpio_set_value(SPITZ_GPIO_MAX1111_CS, !(command == PXA2XX_CS_ASSERT)); |
| 339 | .wait_hsync = spitz_wait_hsync, | 341 | } |
| 342 | |||
| 343 | static struct pxa2xx_spi_chip spitz_max1111_chip = { | ||
| 344 | .cs_control = spitz_max1111_cs, | ||
| 340 | }; | 345 | }; |
| 341 | 346 | ||
| 342 | static struct platform_device spitzts_device = { | 347 | static struct spi_board_info spitz_spi_devices[] = { |
| 343 | .name = "corgi-ts", | 348 | { |
| 344 | .dev = { | 349 | .modalias = "ads7846", |
| 345 | .parent = &spitzssp_device.dev, | 350 | .max_speed_hz = 1200000, |
| 346 | .platform_data = &spitz_ts_machinfo, | 351 | .bus_num = 2, |
| 352 | .chip_select = 0, | ||
| 353 | .platform_data = &spitz_ads7846_info, | ||
| 354 | .controller_data= &spitz_ads7846_chip, | ||
| 355 | .irq = gpio_to_irq(SPITZ_GPIO_TP_INT), | ||
| 356 | }, { | ||
| 357 | .modalias = "corgi-lcd", | ||
| 358 | .max_speed_hz = 50000, | ||
| 359 | .bus_num = 2, | ||
| 360 | .chip_select = 1, | ||
| 361 | .platform_data = &spitz_lcdcon_info, | ||
| 362 | .controller_data= &spitz_lcdcon_chip, | ||
| 363 | }, { | ||
| 364 | .modalias = "max1111", | ||
| 365 | .max_speed_hz = 450000, | ||
| 366 | .bus_num = 2, | ||
| 367 | .chip_select = 2, | ||
| 368 | .controller_data= &spitz_max1111_chip, | ||
| 347 | }, | 369 | }, |
| 348 | .id = -1, | ||
| 349 | .num_resources = ARRAY_SIZE(spitzts_resources), | ||
| 350 | .resource = spitzts_resources, | ||
| 351 | }; | 370 | }; |
| 352 | 371 | ||
| 372 | static void __init spitz_init_spi(void) | ||
| 373 | { | ||
| 374 | int err; | ||
| 375 | |||
| 376 | err = gpio_request(SPITZ_GPIO_ADS7846_CS, "ADS7846_CS"); | ||
| 377 | if (err) | ||
| 378 | return; | ||
| 379 | |||
| 380 | err = gpio_request(SPITZ_GPIO_LCDCON_CS, "LCDCON_CS"); | ||
| 381 | if (err) | ||
| 382 | goto err_free_1; | ||
| 383 | |||
| 384 | err = gpio_request(SPITZ_GPIO_MAX1111_CS, "MAX1111_CS"); | ||
| 385 | if (err) | ||
| 386 | goto err_free_2; | ||
| 387 | |||
| 388 | if (machine_is_akita()) { | ||
| 389 | spitz_lcdcon_info.gpio_backlight_cont = AKITA_GPIO_BACKLIGHT_CONT; | ||
| 390 | spitz_lcdcon_info.gpio_backlight_on = AKITA_GPIO_BACKLIGHT_ON; | ||
| 391 | } | ||
| 392 | |||
| 393 | pxa2xx_set_spi_info(2, &spitz_spi_info); | ||
| 394 | spi_register_board_info(ARRAY_AND_SIZE(spitz_spi_devices)); | ||
| 395 | return; | ||
| 396 | |||
| 397 | err_free_2: | ||
| 398 | gpio_free(SPITZ_GPIO_LCDCON_CS); | ||
| 399 | err_free_1: | ||
| 400 | gpio_free(SPITZ_GPIO_ADS7846_CS); | ||
| 401 | } | ||
| 402 | #else | ||
| 403 | static inline void spitz_init_spi(void) {} | ||
| 404 | #endif | ||
| 353 | 405 | ||
| 354 | /* | 406 | /* |
| 355 | * MMC/SD Device | 407 | * MMC/SD Device |
| @@ -364,24 +416,35 @@ static int spitz_mci_init(struct device *dev, irq_handler_t spitz_detect_int, vo | |||
| 364 | { | 416 | { |
| 365 | int err; | 417 | int err; |
| 366 | 418 | ||
| 367 | /* setup GPIO for PXA27x MMC controller */ | 419 | err = gpio_request(SPITZ_GPIO_nSD_DETECT, "nSD_DETECT"); |
| 368 | pxa_gpio_mode(GPIO32_MMCCLK_MD); | 420 | if (err) |
| 369 | pxa_gpio_mode(GPIO112_MMCCMD_MD); | 421 | goto err_out; |
| 370 | pxa_gpio_mode(GPIO92_MMCDAT0_MD); | 422 | |
| 371 | pxa_gpio_mode(GPIO109_MMCDAT1_MD); | 423 | err = gpio_request(SPITZ_GPIO_nSD_WP, "nSD_WP"); |
| 372 | pxa_gpio_mode(GPIO110_MMCDAT2_MD); | 424 | if (err) |
| 373 | pxa_gpio_mode(GPIO111_MMCDAT3_MD); | 425 | goto err_free_1; |
| 374 | pxa_gpio_mode(SPITZ_GPIO_nSD_DETECT | GPIO_IN); | 426 | |
| 375 | pxa_gpio_mode(SPITZ_GPIO_nSD_WP | GPIO_IN); | 427 | gpio_direction_input(SPITZ_GPIO_nSD_DETECT); |
| 428 | gpio_direction_input(SPITZ_GPIO_nSD_WP); | ||
| 376 | 429 | ||
| 377 | spitz_mci_platform_data.detect_delay = msecs_to_jiffies(250); | 430 | spitz_mci_platform_data.detect_delay = msecs_to_jiffies(250); |
| 378 | 431 | ||
| 379 | err = request_irq(SPITZ_IRQ_GPIO_nSD_DETECT, spitz_detect_int, | 432 | err = request_irq(SPITZ_IRQ_GPIO_nSD_DETECT, spitz_detect_int, |
| 380 | IRQF_DISABLED | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, | 433 | IRQF_DISABLED | IRQF_TRIGGER_RISING | |
| 434 | IRQF_TRIGGER_FALLING, | ||
| 381 | "MMC card detect", data); | 435 | "MMC card detect", data); |
| 382 | if (err) | 436 | if (err) { |
| 383 | printk(KERN_ERR "spitz_mci_init: MMC/SD: can't request MMC card detect IRQ\n"); | 437 | pr_err("%s: MMC/SD: can't request MMC card detect IRQ\n", |
| 438 | __func__); | ||
| 439 | goto err_free_2; | ||
| 440 | } | ||
| 441 | return 0; | ||
| 384 | 442 | ||
| 443 | err_free_2: | ||
| 444 | gpio_free(SPITZ_GPIO_nSD_WP); | ||
| 445 | err_free_1: | ||
| 446 | gpio_free(SPITZ_GPIO_nSD_DETECT); | ||
| 447 | err_out: | ||
| 385 | return err; | 448 | return err; |
| 386 | } | 449 | } |
| 387 | 450 | ||
| @@ -397,12 +460,14 @@ static void spitz_mci_setpower(struct device *dev, unsigned int vdd) | |||
| 397 | 460 | ||
| 398 | static int spitz_mci_get_ro(struct device *dev) | 461 | static int spitz_mci_get_ro(struct device *dev) |
| 399 | { | 462 | { |
| 400 | return GPLR(SPITZ_GPIO_nSD_WP) & GPIO_bit(SPITZ_GPIO_nSD_WP); | 463 | return gpio_get_value(SPITZ_GPIO_nSD_WP); |
| 401 | } | 464 | } |
| 402 | 465 | ||
| 403 | static void spitz_mci_exit(struct device *dev, void *data) | 466 | static void spitz_mci_exit(struct device *dev, void *data) |
| 404 | { | 467 | { |
| 405 | free_irq(SPITZ_IRQ_GPIO_nSD_DETECT, data); | 468 | free_irq(SPITZ_IRQ_GPIO_nSD_DETECT, data); |
| 469 | gpio_free(SPITZ_GPIO_nSD_WP); | ||
| 470 | gpio_free(SPITZ_GPIO_nSD_DETECT); | ||
| 406 | } | 471 | } |
| 407 | 472 | ||
| 408 | static struct pxamci_platform_data spitz_mci_platform_data = { | 473 | static struct pxamci_platform_data spitz_mci_platform_data = { |
| @@ -419,27 +484,24 @@ static struct pxamci_platform_data spitz_mci_platform_data = { | |||
| 419 | */ | 484 | */ |
| 420 | static int spitz_ohci_init(struct device *dev) | 485 | static int spitz_ohci_init(struct device *dev) |
| 421 | { | 486 | { |
| 422 | /* Only Port 2 is connected */ | 487 | int err; |
| 423 | pxa_gpio_mode(SPITZ_GPIO_USB_CONNECT | GPIO_IN); | ||
| 424 | pxa_gpio_mode(SPITZ_GPIO_USB_HOST | GPIO_OUT); | ||
| 425 | pxa_gpio_mode(SPITZ_GPIO_USB_DEVICE | GPIO_IN); | ||
| 426 | |||
| 427 | /* Setup USB Port 2 Output Control Register */ | ||
| 428 | UP2OCR = UP2OCR_HXS | UP2OCR_HXOE | UP2OCR_DPPDE | UP2OCR_DMPDE; | ||
| 429 | |||
| 430 | GPSR(SPITZ_GPIO_USB_HOST) = GPIO_bit(SPITZ_GPIO_USB_HOST); | ||
| 431 | 488 | ||
| 432 | UHCHR = (UHCHR) & | 489 | err = gpio_request(SPITZ_GPIO_USB_HOST, "USB_HOST"); |
| 433 | ~(UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSEP3 | UHCHR_SSE); | 490 | if (err) |
| 491 | return err; | ||
| 434 | 492 | ||
| 435 | UHCRHDA |= UHCRHDA_NOCP; | 493 | /* Only Port 2 is connected |
| 494 | * Setup USB Port 2 Output Control Register | ||
| 495 | */ | ||
| 496 | UP2OCR = UP2OCR_HXS | UP2OCR_HXOE | UP2OCR_DPPDE | UP2OCR_DMPDE; | ||
| 436 | 497 | ||
| 437 | return 0; | 498 | return gpio_direction_output(SPITZ_GPIO_USB_HOST, 1); |
| 438 | } | 499 | } |
| 439 | 500 | ||
| 440 | static struct pxaohci_platform_data spitz_ohci_platform_data = { | 501 | static struct pxaohci_platform_data spitz_ohci_platform_data = { |
| 441 | .port_mode = PMM_NPS_MODE, | 502 | .port_mode = PMM_NPS_MODE, |
| 442 | .init = spitz_ohci_init, | 503 | .init = spitz_ohci_init, |
| 504 | .flags = ENABLE_PORT_ALL | NO_OC_PROTECTION, | ||
| 443 | .power_budget = 150, | 505 | .power_budget = 150, |
| 444 | }; | 506 | }; |
| 445 | 507 | ||
| @@ -447,29 +509,50 @@ static struct pxaohci_platform_data spitz_ohci_platform_data = { | |||
| 447 | /* | 509 | /* |
| 448 | * Irda | 510 | * Irda |
| 449 | */ | 511 | */ |
| 512 | static int spitz_irda_startup(struct device *dev) | ||
| 513 | { | ||
| 514 | int rc; | ||
| 515 | |||
| 516 | rc = gpio_request(SPITZ_GPIO_IR_ON, "IrDA on"); | ||
| 517 | if (rc) | ||
| 518 | goto err; | ||
| 519 | |||
| 520 | rc = gpio_direction_output(SPITZ_GPIO_IR_ON, 1); | ||
| 521 | if (rc) | ||
| 522 | goto err_dir; | ||
| 523 | |||
| 524 | return 0; | ||
| 525 | |||
| 526 | err_dir: | ||
| 527 | gpio_free(SPITZ_GPIO_IR_ON); | ||
| 528 | err: | ||
| 529 | return rc; | ||
| 530 | } | ||
| 531 | |||
| 532 | static void spitz_irda_shutdown(struct device *dev) | ||
| 533 | { | ||
| 534 | gpio_free(SPITZ_GPIO_IR_ON); | ||
| 535 | } | ||
| 536 | |||
| 450 | static void spitz_irda_transceiver_mode(struct device *dev, int mode) | 537 | static void spitz_irda_transceiver_mode(struct device *dev, int mode) |
| 451 | { | 538 | { |
| 452 | if (mode & IR_OFF) | 539 | gpio_set_value(SPITZ_GPIO_IR_ON, mode & IR_OFF); |
| 453 | set_scoop_gpio(&spitzscoop2_device.dev, SPITZ_SCP2_IR_ON); | ||
| 454 | else | ||
| 455 | reset_scoop_gpio(&spitzscoop2_device.dev, SPITZ_SCP2_IR_ON); | ||
| 456 | pxa2xx_transceiver_mode(dev, mode); | 540 | pxa2xx_transceiver_mode(dev, mode); |
| 457 | } | 541 | } |
| 458 | 542 | ||
| 459 | #ifdef CONFIG_MACH_AKITA | 543 | #ifdef CONFIG_MACH_AKITA |
| 460 | static void akita_irda_transceiver_mode(struct device *dev, int mode) | 544 | static void akita_irda_transceiver_mode(struct device *dev, int mode) |
| 461 | { | 545 | { |
| 462 | if (mode & IR_OFF) | 546 | gpio_set_value(AKITA_GPIO_IR_ON, mode & IR_OFF); |
| 463 | akita_set_ioexp(&akitaioexp_device.dev, AKITA_IOEXP_IR_ON); | ||
| 464 | else | ||
| 465 | akita_reset_ioexp(&akitaioexp_device.dev, AKITA_IOEXP_IR_ON); | ||
| 466 | pxa2xx_transceiver_mode(dev, mode); | 547 | pxa2xx_transceiver_mode(dev, mode); |
| 467 | } | 548 | } |
| 468 | #endif | 549 | #endif |
| 469 | 550 | ||
| 470 | static struct pxaficp_platform_data spitz_ficp_platform_data = { | 551 | static struct pxaficp_platform_data spitz_ficp_platform_data = { |
| 471 | .transceiver_cap = IR_SIRMODE | IR_OFF, | 552 | .transceiver_cap = IR_SIRMODE | IR_OFF, |
| 472 | .transceiver_mode = spitz_irda_transceiver_mode, | 553 | .transceiver_mode = spitz_irda_transceiver_mode, |
| 554 | .startup = spitz_irda_startup, | ||
| 555 | .shutdown = spitz_irda_shutdown, | ||
| 473 | }; | 556 | }; |
| 474 | 557 | ||
| 475 | 558 | ||
| @@ -477,14 +560,6 @@ static struct pxaficp_platform_data spitz_ficp_platform_data = { | |||
| 477 | * Spitz PXA Framebuffer | 560 | * Spitz PXA Framebuffer |
| 478 | */ | 561 | */ |
| 479 | 562 | ||
| 480 | static void spitz_lcd_power(int on, struct fb_var_screeninfo *var) | ||
| 481 | { | ||
| 482 | if (on) | ||
| 483 | corgi_lcdtg_hw_init(var->xres); | ||
| 484 | else | ||
| 485 | corgi_lcdtg_suspend(); | ||
| 486 | } | ||
| 487 | |||
| 488 | static struct pxafb_mode_info spitz_pxafb_modes[] = { | 563 | static struct pxafb_mode_info spitz_pxafb_modes[] = { |
| 489 | { | 564 | { |
| 490 | .pixclock = 19231, | 565 | .pixclock = 19231, |
| @@ -517,18 +592,13 @@ static struct pxafb_mach_info spitz_pxafb_info = { | |||
| 517 | .modes = &spitz_pxafb_modes[0], | 592 | .modes = &spitz_pxafb_modes[0], |
| 518 | .num_modes = 2, | 593 | .num_modes = 2, |
| 519 | .fixed_modes = 1, | 594 | .fixed_modes = 1, |
| 520 | .lccr0 = LCCR0_Color | LCCR0_Sngl | LCCR0_Act | LCCR0_LDDALT | LCCR0_OUC | LCCR0_CMDIM | LCCR0_RDSTM, | 595 | .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_ALTERNATE_MAPPING, |
| 521 | .lccr3 = LCCR3_PixRsEdg | LCCR3_OutEnH, | ||
| 522 | .pxafb_lcd_power = spitz_lcd_power, | ||
| 523 | }; | 596 | }; |
| 524 | 597 | ||
| 525 | 598 | ||
| 526 | static struct platform_device *devices[] __initdata = { | 599 | static struct platform_device *devices[] __initdata = { |
| 527 | &spitzscoop_device, | 600 | &spitzscoop_device, |
| 528 | &spitzssp_device, | ||
| 529 | &spitzkbd_device, | 601 | &spitzkbd_device, |
| 530 | &spitzts_device, | ||
| 531 | &spitzbl_device, | ||
| 532 | &spitzled_device, | 602 | &spitzled_device, |
| 533 | }; | 603 | }; |
| 534 | 604 | ||
| @@ -554,57 +624,26 @@ static void __init common_init(void) | |||
| 554 | 624 | ||
| 555 | PMCR = 0x00; | 625 | PMCR = 0x00; |
| 556 | 626 | ||
| 557 | /* setup sleep mode values */ | ||
| 558 | PWER = 0x00000002; | ||
| 559 | PFER = 0x00000000; | ||
| 560 | PRER = 0x00000002; | ||
| 561 | PGSR0 = 0x0158C000; | ||
| 562 | PGSR1 = 0x00FF0080; | ||
| 563 | PGSR2 = 0x0001C004; | ||
| 564 | |||
| 565 | /* Stop 3.6MHz and drive HIGH to PCMCIA and CS */ | 627 | /* Stop 3.6MHz and drive HIGH to PCMCIA and CS */ |
| 566 | PCFR |= PCFR_OPDE; | 628 | PCFR |= PCFR_OPDE; |
| 567 | 629 | ||
| 568 | corgi_ssp_set_machinfo(&spitz_ssp_machinfo); | 630 | pxa2xx_mfp_config(ARRAY_AND_SIZE(spitz_pin_config)); |
| 569 | 631 | ||
| 570 | pxa_gpio_mode(SPITZ_GPIO_HSYNC | GPIO_IN); | 632 | spitz_init_spi(); |
| 571 | 633 | ||
| 572 | platform_add_devices(devices, ARRAY_SIZE(devices)); | 634 | platform_add_devices(devices, ARRAY_SIZE(devices)); |
| 573 | pxa_set_mci_info(&spitz_mci_platform_data); | 635 | pxa_set_mci_info(&spitz_mci_platform_data); |
| 574 | pxa_set_ohci_info(&spitz_ohci_platform_data); | 636 | pxa_set_ohci_info(&spitz_ohci_platform_data); |
| 575 | pxa_set_ficp_info(&spitz_ficp_platform_data); | 637 | pxa_set_ficp_info(&spitz_ficp_platform_data); |
| 576 | set_pxa_fb_parent(&spitzssp_device.dev); | ||
| 577 | set_pxa_fb_info(&spitz_pxafb_info); | 638 | set_pxa_fb_info(&spitz_pxafb_info); |
| 578 | pxa_set_i2c_info(NULL); | 639 | pxa_set_i2c_info(NULL); |
| 579 | } | 640 | } |
| 580 | 641 | ||
| 581 | #if defined(CONFIG_MACH_SPITZ) || defined(CONFIG_MACH_BORZOI) | 642 | #if defined(CONFIG_MACH_SPITZ) || defined(CONFIG_MACH_BORZOI) |
| 582 | static void spitz_bl_set_intensity(int intensity) | ||
| 583 | { | ||
| 584 | if (intensity > 0x10) | ||
| 585 | intensity += 0x10; | ||
| 586 | |||
| 587 | /* Bits 0-4 are accessed via the SSP interface */ | ||
| 588 | corgi_ssp_blduty_set(intensity & 0x1f); | ||
| 589 | |||
| 590 | /* Bit 5 is via SCOOP */ | ||
| 591 | if (intensity & 0x0020) | ||
| 592 | reset_scoop_gpio(&spitzscoop2_device.dev, SPITZ_SCP2_BACKLIGHT_CONT); | ||
| 593 | else | ||
| 594 | set_scoop_gpio(&spitzscoop2_device.dev, SPITZ_SCP2_BACKLIGHT_CONT); | ||
| 595 | |||
| 596 | if (intensity) | ||
| 597 | set_scoop_gpio(&spitzscoop2_device.dev, SPITZ_SCP2_BACKLIGHT_ON); | ||
| 598 | else | ||
| 599 | reset_scoop_gpio(&spitzscoop2_device.dev, SPITZ_SCP2_BACKLIGHT_ON); | ||
| 600 | } | ||
| 601 | |||
| 602 | static void __init spitz_init(void) | 643 | static void __init spitz_init(void) |
| 603 | { | 644 | { |
| 604 | platform_scoop_config = &spitz_pcmcia_config; | 645 | platform_scoop_config = &spitz_pcmcia_config; |
| 605 | 646 | ||
| 606 | spitz_bl_machinfo.set_bl_intensity = spitz_bl_set_intensity; | ||
| 607 | |||
| 608 | common_init(); | 647 | common_init(); |
| 609 | 648 | ||
| 610 | platform_device_register(&spitzscoop2_device); | 649 | platform_device_register(&spitzscoop2_device); |
| @@ -615,32 +654,17 @@ static void __init spitz_init(void) | |||
| 615 | /* | 654 | /* |
| 616 | * Akita IO Expander | 655 | * Akita IO Expander |
| 617 | */ | 656 | */ |
| 618 | struct platform_device akitaioexp_device = { | 657 | static struct pca953x_platform_data akita_ioexp = { |
| 619 | .name = "akita-ioexp", | 658 | .gpio_base = AKITA_IOEXP_GPIO_BASE, |
| 620 | .id = -1, | ||
| 621 | }; | 659 | }; |
| 622 | 660 | ||
| 623 | EXPORT_SYMBOL_GPL(akitaioexp_device); | 661 | static struct i2c_board_info akita_i2c_board_info[] = { |
| 624 | 662 | { | |
| 625 | static void akita_bl_set_intensity(int intensity) | 663 | .type = "max7310", |
| 626 | { | 664 | .addr = 0x18, |
| 627 | if (intensity > 0x10) | 665 | .platform_data = &akita_ioexp, |
| 628 | intensity += 0x10; | 666 | }, |
| 629 | 667 | }; | |
| 630 | /* Bits 0-4 are accessed via the SSP interface */ | ||
| 631 | corgi_ssp_blduty_set(intensity & 0x1f); | ||
| 632 | |||
| 633 | /* Bit 5 is via IO-Expander */ | ||
| 634 | if (intensity & 0x0020) | ||
| 635 | akita_reset_ioexp(&akitaioexp_device.dev, AKITA_IOEXP_BACKLIGHT_CONT); | ||
| 636 | else | ||
| 637 | akita_set_ioexp(&akitaioexp_device.dev, AKITA_IOEXP_BACKLIGHT_CONT); | ||
| 638 | |||
| 639 | if (intensity) | ||
| 640 | akita_set_ioexp(&akitaioexp_device.dev, AKITA_IOEXP_BACKLIGHT_ON); | ||
| 641 | else | ||
| 642 | akita_reset_ioexp(&akitaioexp_device.dev, AKITA_IOEXP_BACKLIGHT_ON); | ||
| 643 | } | ||
| 644 | 668 | ||
| 645 | static void __init akita_init(void) | 669 | static void __init akita_init(void) |
| 646 | { | 670 | { |
| @@ -649,11 +673,10 @@ static void __init akita_init(void) | |||
| 649 | /* We just pretend the second element of the array doesn't exist */ | 673 | /* We just pretend the second element of the array doesn't exist */ |
| 650 | spitz_pcmcia_config.num_devs = 1; | 674 | spitz_pcmcia_config.num_devs = 1; |
| 651 | platform_scoop_config = &spitz_pcmcia_config; | 675 | platform_scoop_config = &spitz_pcmcia_config; |
| 652 | spitz_bl_machinfo.set_bl_intensity = akita_bl_set_intensity; | ||
| 653 | 676 | ||
| 654 | platform_device_register(&akitaioexp_device); | 677 | pxa_set_i2c_info(NULL); |
| 678 | i2c_register_board_info(0, ARRAY_AND_SIZE(akita_i2c_board_info)); | ||
| 655 | 679 | ||
| 656 | spitzscoop_device.dev.parent = &akitaioexp_device.dev; | ||
| 657 | common_init(); | 680 | common_init(); |
| 658 | } | 681 | } |
| 659 | #endif | 682 | #endif |
diff --git a/arch/arm/mach-pxa/spitz_pm.c b/arch/arm/mach-pxa/spitz_pm.c index 8a40505dfd28..53018db106ac 100644 --- a/arch/arm/mach-pxa/spitz_pm.c +++ b/arch/arm/mach-pxa/spitz_pm.c | |||
| @@ -21,7 +21,6 @@ | |||
| 21 | #include <asm/irq.h> | 21 | #include <asm/irq.h> |
| 22 | #include <asm/mach-types.h> | 22 | #include <asm/mach-types.h> |
| 23 | #include <mach/hardware.h> | 23 | #include <mach/hardware.h> |
| 24 | #include <asm/hardware/scoop.h> | ||
| 25 | 24 | ||
| 26 | #include <mach/sharpsl.h> | 25 | #include <mach/sharpsl.h> |
| 27 | #include <mach/spitz.h> | 26 | #include <mach/spitz.h> |
| @@ -48,44 +47,35 @@ static void spitz_charger_init(void) | |||
| 48 | 47 | ||
| 49 | static void spitz_measure_temp(int on) | 48 | static void spitz_measure_temp(int on) |
| 50 | { | 49 | { |
| 51 | if (on) | 50 | gpio_set_value(SPITZ_GPIO_ADC_TEMP_ON, on); |
| 52 | set_scoop_gpio(&spitzscoop_device.dev, SPITZ_SCP_ADC_TEMP_ON); | ||
| 53 | else | ||
| 54 | reset_scoop_gpio(&spitzscoop_device.dev, SPITZ_SCP_ADC_TEMP_ON); | ||
| 55 | } | 51 | } |
| 56 | 52 | ||
| 57 | static void spitz_charge(int on) | 53 | static void spitz_charge(int on) |
| 58 | { | 54 | { |
| 59 | if (on) { | 55 | if (on) { |
| 60 | if (sharpsl_pm.flags & SHARPSL_SUSPENDED) { | 56 | if (sharpsl_pm.flags & SHARPSL_SUSPENDED) { |
| 61 | set_scoop_gpio(&spitzscoop_device.dev, SPITZ_SCP_JK_B); | 57 | gpio_set_value(SPITZ_GPIO_JK_B, 1); |
| 62 | reset_scoop_gpio(&spitzscoop_device.dev, SPITZ_SCP_CHRG_ON); | 58 | gpio_set_value(SPITZ_GPIO_CHRG_ON, 0); |
| 63 | } else { | 59 | } else { |
| 64 | reset_scoop_gpio(&spitzscoop_device.dev, SPITZ_SCP_JK_B); | 60 | gpio_set_value(SPITZ_GPIO_JK_B, 0); |
| 65 | reset_scoop_gpio(&spitzscoop_device.dev, SPITZ_SCP_CHRG_ON); | 61 | gpio_set_value(SPITZ_GPIO_CHRG_ON, 0); |
| 66 | } | 62 | } |
| 67 | } else { | 63 | } else { |
| 68 | reset_scoop_gpio(&spitzscoop_device.dev, SPITZ_SCP_JK_B); | 64 | gpio_set_value(SPITZ_GPIO_JK_B, 0); |
| 69 | set_scoop_gpio(&spitzscoop_device.dev, SPITZ_SCP_CHRG_ON); | 65 | gpio_set_value(SPITZ_GPIO_CHRG_ON, 1); |
| 70 | } | 66 | } |
| 71 | } | 67 | } |
| 72 | 68 | ||
| 73 | static void spitz_discharge(int on) | 69 | static void spitz_discharge(int on) |
| 74 | { | 70 | { |
| 75 | if (on) | 71 | gpio_set_value(SPITZ_GPIO_JK_A, on); |
| 76 | set_scoop_gpio(&spitzscoop_device.dev, SPITZ_SCP_JK_A); | ||
| 77 | else | ||
| 78 | reset_scoop_gpio(&spitzscoop_device.dev, SPITZ_SCP_JK_A); | ||
| 79 | } | 72 | } |
| 80 | 73 | ||
| 81 | /* HACK - For unknown reasons, accurate voltage readings are only made with a load | 74 | /* HACK - For unknown reasons, accurate voltage readings are only made with a load |
| 82 | on the power bus which the green led on spitz provides */ | 75 | on the power bus which the green led on spitz provides */ |
| 83 | static void spitz_discharge1(int on) | 76 | static void spitz_discharge1(int on) |
| 84 | { | 77 | { |
| 85 | if (on) | 78 | gpio_set_value(SPITZ_GPIO_LED_GREEN, on); |
| 86 | set_scoop_gpio(&spitzscoop_device.dev, SPITZ_SCP_LED_GREEN); | ||
| 87 | else | ||
| 88 | reset_scoop_gpio(&spitzscoop_device.dev, SPITZ_SCP_LED_GREEN); | ||
| 89 | } | 79 | } |
| 90 | 80 | ||
| 91 | static void spitz_presuspend(void) | 81 | static void spitz_presuspend(void) |
diff --git a/arch/arm/mach-pxa/time.c b/arch/arm/mach-pxa/time.c index 67e18509d7bf..18d149745837 100644 --- a/arch/arm/mach-pxa/time.c +++ b/arch/arm/mach-pxa/time.c | |||
| @@ -155,7 +155,7 @@ static void __init pxa_timer_init(void) | |||
| 155 | OIER = 0; | 155 | OIER = 0; |
| 156 | OSSR = OSSR_M0 | OSSR_M1 | OSSR_M2 | OSSR_M3; | 156 | OSSR = OSSR_M0 | OSSR_M1 | OSSR_M2 | OSSR_M3; |
| 157 | 157 | ||
| 158 | if (cpu_is_pxa21x() || cpu_is_pxa25x()) | 158 | if (cpu_is_pxa25x()) |
| 159 | clock_tick_rate = 3686400; | 159 | clock_tick_rate = 3686400; |
| 160 | else if (machine_is_mainstone()) | 160 | else if (machine_is_mainstone()) |
| 161 | clock_tick_rate = 3249600; | 161 | clock_tick_rate = 3249600; |
diff --git a/arch/arm/mach-pxa/trizeps4.c b/arch/arm/mach-pxa/trizeps4.c index 3ed757e6bcc8..a13dbf3c2c05 100644 --- a/arch/arm/mach-pxa/trizeps4.c +++ b/arch/arm/mach-pxa/trizeps4.c | |||
| @@ -22,8 +22,8 @@ | |||
| 22 | #include <linux/fb.h> | 22 | #include <linux/fb.h> |
| 23 | #include <linux/ioport.h> | 23 | #include <linux/ioport.h> |
| 24 | #include <linux/delay.h> | 24 | #include <linux/delay.h> |
| 25 | #include <linux/serial_8250.h> | 25 | #include <linux/gpio.h> |
| 26 | #include <linux/mtd/mtd.h> | 26 | #include <linux/dm9000.h> |
| 27 | #include <linux/mtd/physmap.h> | 27 | #include <linux/mtd/physmap.h> |
| 28 | #include <linux/mtd/partitions.h> | 28 | #include <linux/mtd/partitions.h> |
| 29 | 29 | ||
| @@ -31,7 +31,6 @@ | |||
| 31 | #include <asm/setup.h> | 31 | #include <asm/setup.h> |
| 32 | #include <asm/memory.h> | 32 | #include <asm/memory.h> |
| 33 | #include <asm/mach-types.h> | 33 | #include <asm/mach-types.h> |
| 34 | #include <mach/hardware.h> | ||
| 35 | #include <asm/irq.h> | 34 | #include <asm/irq.h> |
| 36 | #include <asm/sizes.h> | 35 | #include <asm/sizes.h> |
| 37 | 36 | ||
| @@ -40,41 +39,148 @@ | |||
| 40 | #include <asm/mach/irq.h> | 39 | #include <asm/mach/irq.h> |
| 41 | #include <asm/mach/flash.h> | 40 | #include <asm/mach/flash.h> |
| 42 | 41 | ||
| 42 | #include <mach/hardware.h> | ||
| 43 | #include <mach/pxa-regs.h> | 43 | #include <mach/pxa-regs.h> |
| 44 | #include <mach/pxa2xx-regs.h> | 44 | #include <mach/pxa2xx-regs.h> |
| 45 | #include <mach/pxa2xx-gpio.h> | 45 | #include <mach/mfp-pxa27x.h> |
| 46 | #include <mach/pxa2xx_spi.h> | ||
| 46 | #include <mach/trizeps4.h> | 47 | #include <mach/trizeps4.h> |
| 47 | #include <mach/audio.h> | 48 | #include <mach/audio.h> |
| 48 | #include <mach/pxafb.h> | 49 | #include <mach/pxafb.h> |
| 49 | #include <mach/mmc.h> | 50 | #include <mach/mmc.h> |
| 50 | #include <mach/irda.h> | 51 | #include <mach/irda.h> |
| 51 | #include <mach/ohci.h> | 52 | #include <mach/ohci.h> |
| 53 | #include <mach/i2c.h> | ||
| 52 | 54 | ||
| 53 | #include "generic.h" | 55 | #include "generic.h" |
| 54 | #include "devices.h" | 56 | #include "devices.h" |
| 55 | 57 | ||
| 56 | /******************************************************************************************** | 58 | /* comment out the following line if you want to use the |
| 59 | * Standard UART from PXA for serial / irda transmission | ||
| 60 | * and acivate it if you have status leds connected */ | ||
| 61 | #define STATUS_LEDS_ON_STUART_PINS 1 | ||
| 62 | |||
| 63 | /***************************************************************************** | ||
| 64 | * MultiFunctionPins of CPU | ||
| 65 | *****************************************************************************/ | ||
| 66 | static unsigned long trizeps4_pin_config[] __initdata = { | ||
| 67 | /* Chip Selects */ | ||
| 68 | GPIO15_nCS_1, /* DiskOnChip CS */ | ||
| 69 | GPIO93_GPIO, /* TRIZEPS4_DOC_IRQ */ | ||
| 70 | GPIO94_GPIO, /* DOC lock */ | ||
| 71 | |||
| 72 | GPIO78_nCS_2, /* DM9000 CS */ | ||
| 73 | GPIO101_GPIO, /* TRIZEPS4_ETH_IRQ */ | ||
| 74 | |||
| 75 | GPIO79_nCS_3, /* Logic CS */ | ||
| 76 | GPIO0_GPIO | WAKEUP_ON_EDGE_RISE, /* Logic irq */ | ||
| 77 | |||
| 78 | /* LCD - 16bpp Active TFT */ | ||
| 79 | GPIO58_LCD_LDD_0, | ||
| 80 | GPIO59_LCD_LDD_1, | ||
| 81 | GPIO60_LCD_LDD_2, | ||
| 82 | GPIO61_LCD_LDD_3, | ||
| 83 | GPIO62_LCD_LDD_4, | ||
| 84 | GPIO63_LCD_LDD_5, | ||
| 85 | GPIO64_LCD_LDD_6, | ||
| 86 | GPIO65_LCD_LDD_7, | ||
| 87 | GPIO66_LCD_LDD_8, | ||
| 88 | GPIO67_LCD_LDD_9, | ||
| 89 | GPIO68_LCD_LDD_10, | ||
| 90 | GPIO69_LCD_LDD_11, | ||
| 91 | GPIO70_LCD_LDD_12, | ||
| 92 | GPIO71_LCD_LDD_13, | ||
| 93 | GPIO72_LCD_LDD_14, | ||
| 94 | GPIO73_LCD_LDD_15, | ||
| 95 | GPIO74_LCD_FCLK, | ||
| 96 | GPIO75_LCD_LCLK, | ||
| 97 | GPIO76_LCD_PCLK, | ||
| 98 | GPIO77_LCD_BIAS, | ||
| 99 | |||
| 100 | /* UART */ | ||
| 101 | GPIO9_FFUART_CTS, | ||
| 102 | GPIO10_FFUART_DCD, | ||
| 103 | GPIO16_FFUART_TXD, | ||
| 104 | GPIO33_FFUART_DSR, | ||
| 105 | GPIO38_FFUART_RI, | ||
| 106 | GPIO82_FFUART_DTR, | ||
| 107 | GPIO83_FFUART_RTS, | ||
| 108 | GPIO96_FFUART_RXD, | ||
| 109 | |||
| 110 | GPIO42_BTUART_RXD, | ||
| 111 | GPIO43_BTUART_TXD, | ||
| 112 | GPIO44_BTUART_CTS, | ||
| 113 | GPIO45_BTUART_RTS, | ||
| 114 | #ifdef STATUS_LEDS_ON_STUART_PINS | ||
| 115 | GPIO46_GPIO, | ||
| 116 | GPIO47_GPIO, | ||
| 117 | #else | ||
| 118 | GPIO46_STUART_RXD, | ||
| 119 | GPIO47_STUART_TXD, | ||
| 120 | #endif | ||
| 121 | /* PCMCIA */ | ||
| 122 | GPIO11_GPIO, /* TRIZEPS4_CD_IRQ */ | ||
| 123 | GPIO13_GPIO, /* TRIZEPS4_READY_NINT */ | ||
| 124 | GPIO48_nPOE, | ||
| 125 | GPIO49_nPWE, | ||
| 126 | GPIO50_nPIOR, | ||
| 127 | GPIO51_nPIOW, | ||
| 128 | GPIO54_nPCE_2, | ||
| 129 | GPIO55_nPREG, | ||
| 130 | GPIO56_nPWAIT, | ||
| 131 | GPIO57_nIOIS16, | ||
| 132 | GPIO102_nPCE_1, | ||
| 133 | GPIO104_PSKTSEL, | ||
| 134 | |||
| 135 | /* MultiMediaCard */ | ||
| 136 | GPIO32_MMC_CLK, | ||
| 137 | GPIO92_MMC_DAT_0, | ||
| 138 | GPIO109_MMC_DAT_1, | ||
| 139 | GPIO110_MMC_DAT_2, | ||
| 140 | GPIO111_MMC_DAT_3, | ||
| 141 | GPIO112_MMC_CMD, | ||
| 142 | GPIO12_GPIO, /* TRIZEPS4_MMC_IRQ */ | ||
| 143 | |||
| 144 | /* USB OHCI */ | ||
| 145 | GPIO88_USBH1_PWR, /* USBHPWR1 */ | ||
| 146 | GPIO89_USBH1_PEN, /* USBHPEN1 */ | ||
| 147 | |||
| 148 | /* I2C */ | ||
| 149 | GPIO117_I2C_SCL, | ||
| 150 | GPIO118_I2C_SDA, | ||
| 151 | }; | ||
| 152 | |||
| 153 | static unsigned long trizeps4wl_pin_config[] __initdata = { | ||
| 154 | /* SSP 2 */ | ||
| 155 | GPIO14_SSP2_SFRM, | ||
| 156 | GPIO19_SSP2_SCLK, | ||
| 157 | GPIO53_GPIO, /* TRIZEPS4_SPI_IRQ */ | ||
| 158 | GPIO86_SSP2_RXD, | ||
| 159 | GPIO87_SSP2_TXD, | ||
| 160 | }; | ||
| 161 | |||
| 162 | /**************************************************************************** | ||
| 57 | * ONBOARD FLASH | 163 | * ONBOARD FLASH |
| 58 | ********************************************************************************************/ | 164 | ****************************************************************************/ |
| 59 | static struct mtd_partition trizeps4_partitions[] = { | 165 | static struct mtd_partition trizeps4_partitions[] = { |
| 60 | { | 166 | { |
| 61 | .name = "Bootloader", | 167 | .name = "Bootloader", |
| 62 | .offset = 0x00000000, | 168 | .offset = 0x00000000, |
| 63 | .size = 0x00040000, | 169 | .size = 0x00040000, |
| 64 | .mask_flags = MTD_WRITEABLE /* force read-only */ | 170 | .mask_flags = MTD_WRITEABLE /* force read-only */ |
| 65 | },{ | 171 | }, { |
| 66 | .name = "Backup", | 172 | .name = "Backup", |
| 67 | .offset = 0x00040000, | 173 | .offset = 0x00040000, |
| 68 | .size = 0x00040000, | 174 | .size = 0x00040000, |
| 69 | },{ | 175 | }, { |
| 70 | .name = "Image", | 176 | .name = "Image", |
| 71 | .offset = 0x00080000, | 177 | .offset = 0x00080000, |
| 72 | .size = 0x01080000, | 178 | .size = 0x01080000, |
| 73 | },{ | 179 | }, { |
| 74 | .name = "IPSM", | 180 | .name = "IPSM", |
| 75 | .offset = 0x01100000, | 181 | .offset = 0x01100000, |
| 76 | .size = 0x00e00000, | 182 | .size = 0x00e00000, |
| 77 | },{ | 183 | }, { |
| 78 | .name = "Registry", | 184 | .name = "Registry", |
| 79 | .offset = 0x01f00000, | 185 | .offset = 0x01f00000, |
| 80 | .size = MTDPART_SIZ_FULL, | 186 | .size = MTDPART_SIZ_FULL, |
| @@ -105,9 +211,9 @@ static struct platform_device flash_device = { | |||
| 105 | .num_resources = 1, | 211 | .num_resources = 1, |
| 106 | }; | 212 | }; |
| 107 | 213 | ||
| 108 | /******************************************************************************************** | 214 | /**************************************************************************** |
| 109 | * DAVICOM DM9000 Ethernet | 215 | * DAVICOM DM9000 Ethernet |
| 110 | ********************************************************************************************/ | 216 | ****************************************************************************/ |
| 111 | static struct resource dm9000_resources[] = { | 217 | static struct resource dm9000_resources[] = { |
| 112 | [0] = { | 218 | [0] = { |
| 113 | .start = TRIZEPS4_ETH_PHYS+0x300, | 219 | .start = TRIZEPS4_ETH_PHYS+0x300, |
| @@ -122,67 +228,68 @@ static struct resource dm9000_resources[] = { | |||
| 122 | [2] = { | 228 | [2] = { |
| 123 | .start = TRIZEPS4_ETH_IRQ, | 229 | .start = TRIZEPS4_ETH_IRQ, |
| 124 | .end = TRIZEPS4_ETH_IRQ, | 230 | .end = TRIZEPS4_ETH_IRQ, |
| 125 | .flags = (IORESOURCE_IRQ | IRQ_TYPE_EDGE_RISING), | 231 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, |
| 126 | }, | 232 | }, |
| 127 | }; | 233 | }; |
| 128 | 234 | ||
| 235 | static struct dm9000_plat_data tri_dm9000_platdata = { | ||
| 236 | .flags = DM9000_PLATF_32BITONLY, | ||
| 237 | }; | ||
| 238 | |||
| 129 | static struct platform_device dm9000_device = { | 239 | static struct platform_device dm9000_device = { |
| 130 | .name = "dm9000", | 240 | .name = "dm9000", |
| 131 | .id = -1, | 241 | .id = -1, |
| 132 | .num_resources = ARRAY_SIZE(dm9000_resources), | 242 | .num_resources = ARRAY_SIZE(dm9000_resources), |
| 133 | .resource = dm9000_resources, | 243 | .resource = dm9000_resources, |
| 244 | .dev = { | ||
| 245 | .platform_data = &tri_dm9000_platdata, | ||
| 246 | } | ||
| 134 | }; | 247 | }; |
| 135 | 248 | ||
| 136 | /******************************************************************************************** | 249 | /**************************************************************************** |
| 137 | * PXA270 serial ports | 250 | * LED's on GPIO pins of PXA |
| 138 | ********************************************************************************************/ | 251 | ****************************************************************************/ |
| 139 | static struct plat_serial8250_port tri_serial_ports[] = { | 252 | static struct gpio_led trizeps4_led[] = { |
| 140 | #ifdef CONFIG_SERIAL_PXA | 253 | #ifdef STATUS_LEDS_ON_STUART_PINS |
| 141 | /* this uses the own PXA driver */ | ||
| 142 | { | 254 | { |
| 143 | 0, | 255 | .name = "led0:orange:heartbeat", /* */ |
| 144 | }, | 256 | .default_trigger = "heartbeat", |
| 145 | #else | 257 | .gpio = GPIO_HEARTBEAT_LED, |
| 146 | /* this uses the generic 8520 driver */ | 258 | .active_low = 1, |
| 147 | [0] = { | ||
| 148 | .membase = (void *)&FFUART, | ||
| 149 | .irq = IRQ_FFUART, | ||
| 150 | .flags = UPF_BOOT_AUTOCONF, | ||
| 151 | .iotype = UPIO_MEM32, | ||
| 152 | .regshift = 2, | ||
| 153 | .uartclk = (921600*16), | ||
| 154 | }, | ||
| 155 | [1] = { | ||
| 156 | .membase = (void *)&BTUART, | ||
| 157 | .irq = IRQ_BTUART, | ||
| 158 | .flags = UPF_BOOT_AUTOCONF, | ||
| 159 | .iotype = UPIO_MEM32, | ||
| 160 | .regshift = 2, | ||
| 161 | .uartclk = (921600*16), | ||
| 162 | }, | 259 | }, |
| 163 | { | 260 | { |
| 164 | 0, | 261 | .name = "led1:yellow:cpubusy", /* */ |
| 262 | .default_trigger = "cpu-busy", | ||
| 263 | .gpio = GPIO_SYS_BUSY_LED, | ||
| 264 | .active_low = 1, | ||
| 165 | }, | 265 | }, |
| 166 | #endif | 266 | #endif |
| 167 | }; | 267 | }; |
| 168 | 268 | ||
| 169 | static struct platform_device uart_devices = { | 269 | static struct gpio_led_platform_data trizeps4_led_data = { |
| 170 | .name = "serial8250", | 270 | .leds = trizeps4_led, |
| 171 | .id = 0, | 271 | .num_leds = ARRAY_SIZE(trizeps4_led), |
| 272 | }; | ||
| 273 | |||
| 274 | static struct platform_device leds_devices = { | ||
| 275 | .name = "leds-gpio", | ||
| 276 | .id = -1, | ||
| 172 | .dev = { | 277 | .dev = { |
| 173 | .platform_data = tri_serial_ports, | 278 | .platform_data = &trizeps4_led_data, |
| 174 | }, | 279 | }, |
| 175 | .num_resources = 0, | ||
| 176 | .resource = NULL, | ||
| 177 | }; | 280 | }; |
| 178 | 281 | ||
| 179 | static struct platform_device * trizeps4_devices[] __initdata = { | 282 | static struct platform_device *trizeps4_devices[] __initdata = { |
| 180 | &flash_device, | 283 | &flash_device, |
| 181 | &uart_devices, | ||
| 182 | &dm9000_device, | 284 | &dm9000_device, |
| 285 | &leds_devices, | ||
| 286 | }; | ||
| 287 | |||
| 288 | static struct platform_device *trizeps4wl_devices[] __initdata = { | ||
| 289 | &flash_device, | ||
| 290 | &leds_devices, | ||
| 183 | }; | 291 | }; |
| 184 | 292 | ||
| 185 | #ifdef CONFIG_MACH_TRIZEPS4_CONXS | ||
| 186 | static short trizeps_conxs_bcr; | 293 | static short trizeps_conxs_bcr; |
| 187 | 294 | ||
| 188 | /* PCCARD power switching supports only 3,3V */ | 295 | /* PCCARD power switching supports only 3,3V */ |
| @@ -192,108 +299,63 @@ void board_pcmcia_power(int power) | |||
| 192 | /* switch power on, put in reset and enable buffers */ | 299 | /* switch power on, put in reset and enable buffers */ |
| 193 | trizeps_conxs_bcr |= power; | 300 | trizeps_conxs_bcr |= power; |
| 194 | trizeps_conxs_bcr |= ConXS_BCR_CF_RESET; | 301 | trizeps_conxs_bcr |= ConXS_BCR_CF_RESET; |
| 195 | trizeps_conxs_bcr &= ~(ConXS_BCR_CF_BUF_EN); | 302 | trizeps_conxs_bcr &= ~ConXS_BCR_CF_BUF_EN; |
| 196 | ConXS_BCR = trizeps_conxs_bcr; | 303 | BCR_writew(trizeps_conxs_bcr); |
| 197 | /* wait a little */ | 304 | /* wait a little */ |
| 198 | udelay(2000); | 305 | udelay(2000); |
| 199 | /* take reset away */ | 306 | /* take reset away */ |
| 200 | trizeps_conxs_bcr &= ~(ConXS_BCR_CF_RESET); | 307 | trizeps_conxs_bcr &= ~ConXS_BCR_CF_RESET; |
| 201 | ConXS_BCR = trizeps_conxs_bcr; | 308 | BCR_writew(trizeps_conxs_bcr); |
| 202 | udelay(2000); | 309 | udelay(2000); |
| 203 | } else { | 310 | } else { |
| 204 | /* put in reset */ | 311 | /* put in reset */ |
| 205 | trizeps_conxs_bcr |= ConXS_BCR_CF_RESET; | 312 | trizeps_conxs_bcr |= ConXS_BCR_CF_RESET; |
| 206 | ConXS_BCR = trizeps_conxs_bcr; | 313 | BCR_writew(trizeps_conxs_bcr); |
| 207 | udelay(1000); | 314 | udelay(1000); |
| 208 | /* switch power off */ | 315 | /* switch power off */ |
| 209 | trizeps_conxs_bcr &= ~(0xf); | 316 | trizeps_conxs_bcr &= ~0xf; |
| 210 | ConXS_BCR = trizeps_conxs_bcr; | 317 | BCR_writew(trizeps_conxs_bcr); |
| 211 | |||
| 212 | } | 318 | } |
| 213 | pr_debug("%s: o%s 0x%x\n", __func__, power ? "n": "ff", trizeps_conxs_bcr); | 319 | pr_debug("%s: o%s 0x%x\n", __func__, power ? "n" : "ff", |
| 320 | trizeps_conxs_bcr); | ||
| 214 | } | 321 | } |
| 322 | EXPORT_SYMBOL(board_pcmcia_power); | ||
| 215 | 323 | ||
| 216 | /* backlight power switching for LCD panel */ | 324 | /* backlight power switching for LCD panel */ |
| 217 | static void board_backlight_power(int on) | 325 | static void board_backlight_power(int on) |
| 218 | { | 326 | { |
| 219 | if (on) { | 327 | if (on) |
| 220 | trizeps_conxs_bcr |= ConXS_BCR_L_DISP; | 328 | trizeps_conxs_bcr |= ConXS_BCR_L_DISP; |
| 221 | } else { | 329 | else |
| 222 | trizeps_conxs_bcr &= ~ConXS_BCR_L_DISP; | 330 | trizeps_conxs_bcr &= ~ConXS_BCR_L_DISP; |
| 223 | } | ||
| 224 | pr_debug("%s: o%s 0x%x\n", __func__, on ? "n" : "ff", trizeps_conxs_bcr); | ||
| 225 | ConXS_BCR = trizeps_conxs_bcr; | ||
| 226 | } | ||
| 227 | 331 | ||
| 228 | /* Powersupply for MMC/SD cardslot */ | 332 | pr_debug("%s: o%s 0x%x\n", __func__, on ? "n" : "ff", |
| 229 | static void board_mci_power(struct device *dev, unsigned int vdd) | 333 | trizeps_conxs_bcr); |
| 230 | { | 334 | BCR_writew(trizeps_conxs_bcr); |
| 231 | struct pxamci_platform_data* p_d = dev->platform_data; | ||
| 232 | |||
| 233 | if (( 1 << vdd) & p_d->ocr_mask) { | ||
| 234 | pr_debug("%s: on\n", __func__); | ||
| 235 | /* FIXME fill in values here */ | ||
| 236 | } else { | ||
| 237 | pr_debug("%s: off\n", __func__); | ||
| 238 | /* FIXME fill in values here */ | ||
| 239 | } | ||
| 240 | } | ||
| 241 | |||
| 242 | static short trizeps_conxs_ircr; | ||
| 243 | |||
| 244 | /* Switch modes and Power for IRDA receiver */ | ||
| 245 | static void board_irda_mode(struct device *dev, int mode) | ||
| 246 | { | ||
| 247 | unsigned long flags; | ||
| 248 | |||
| 249 | local_irq_save(flags); | ||
| 250 | if (mode & IR_SIRMODE) { | ||
| 251 | /* Slow mode */ | ||
| 252 | trizeps_conxs_ircr &= ~ConXS_IRCR_MODE; | ||
| 253 | } else if (mode & IR_FIRMODE) { | ||
| 254 | /* Fast mode */ | ||
| 255 | trizeps_conxs_ircr |= ConXS_IRCR_MODE; | ||
| 256 | } | ||
| 257 | pxa2xx_transceiver_mode(dev, mode); | ||
| 258 | if (mode & IR_OFF) { | ||
| 259 | trizeps_conxs_ircr |= ConXS_IRCR_SD; | ||
| 260 | } else { | ||
| 261 | trizeps_conxs_ircr &= ~ConXS_IRCR_SD; | ||
| 262 | } | ||
| 263 | /* FIXME write values to register */ | ||
| 264 | local_irq_restore(flags); | ||
| 265 | } | 335 | } |
| 266 | 336 | ||
| 267 | #else | 337 | /* a I2C based RTC is known on CONXS board */ |
| 268 | /* for other baseboards define dummies */ | 338 | static struct i2c_board_info trizeps4_i2c_devices[] __initdata = { |
| 269 | void board_pcmcia_power(int power) {;} | 339 | { I2C_BOARD_INFO("rtc-pcf8593", 0x51) } |
| 270 | #define board_backlight_power NULL | 340 | }; |
| 271 | #define board_mci_power NULL | ||
| 272 | #define board_irda_mode NULL | ||
| 273 | |||
| 274 | #endif /* CONFIG_MACH_TRIZEPS4_CONXS */ | ||
| 275 | EXPORT_SYMBOL(board_pcmcia_power); | ||
| 276 | 341 | ||
| 277 | static int trizeps4_mci_init(struct device *dev, irq_handler_t mci_detect_int, void *data) | 342 | /**************************************************************************** |
| 343 | * MMC card slot external to module | ||
| 344 | ****************************************************************************/ | ||
| 345 | static int trizeps4_mci_init(struct device *dev, irq_handler_t mci_detect_int, | ||
| 346 | void *data) | ||
| 278 | { | 347 | { |
| 279 | int err; | 348 | int err; |
| 280 | /* setup GPIO for PXA27x MMC controller */ | ||
| 281 | pxa_gpio_mode(GPIO32_MMCCLK_MD); | ||
| 282 | pxa_gpio_mode(GPIO112_MMCCMD_MD); | ||
| 283 | pxa_gpio_mode(GPIO92_MMCDAT0_MD); | ||
| 284 | pxa_gpio_mode(GPIO109_MMCDAT1_MD); | ||
| 285 | pxa_gpio_mode(GPIO110_MMCDAT2_MD); | ||
| 286 | pxa_gpio_mode(GPIO111_MMCDAT3_MD); | ||
| 287 | |||
| 288 | pxa_gpio_mode(GPIO_MMC_DET | GPIO_IN); | ||
| 289 | 349 | ||
| 290 | err = request_irq(TRIZEPS4_MMC_IRQ, mci_detect_int, | 350 | err = request_irq(TRIZEPS4_MMC_IRQ, mci_detect_int, |
| 291 | IRQF_DISABLED | IRQF_TRIGGER_RISING, | 351 | IRQF_DISABLED | IRQF_TRIGGER_RISING | IRQF_SAMPLE_RANDOM, |
| 292 | "MMC card detect", data); | 352 | "MMC card detect", data); |
| 293 | if (err) | 353 | if (err) { |
| 294 | printk(KERN_ERR "trizeps4_mci_init: MMC/SD: can't request MMC card detect IRQ\n"); | 354 | printk(KERN_ERR "trizeps4_mci_init: MMC/SD: can't request" |
| 295 | 355 | "MMC card detect IRQ\n"); | |
| 296 | return err; | 356 | return -1; |
| 357 | } | ||
| 358 | return 0; | ||
| 297 | } | 359 | } |
| 298 | 360 | ||
| 299 | static void trizeps4_mci_exit(struct device *dev, void *data) | 361 | static void trizeps4_mci_exit(struct device *dev, void *data) |
| @@ -303,39 +365,69 @@ static void trizeps4_mci_exit(struct device *dev, void *data) | |||
| 303 | 365 | ||
| 304 | static struct pxamci_platform_data trizeps4_mci_platform_data = { | 366 | static struct pxamci_platform_data trizeps4_mci_platform_data = { |
| 305 | .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, | 367 | .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, |
| 368 | .detect_delay = 1, | ||
| 306 | .init = trizeps4_mci_init, | 369 | .init = trizeps4_mci_init, |
| 307 | .exit = trizeps4_mci_exit, | 370 | .exit = trizeps4_mci_exit, |
| 308 | .setpower = board_mci_power, | 371 | .get_ro = NULL, /* write-protection not supported */ |
| 372 | .setpower = NULL, /* power-switching not supported */ | ||
| 309 | }; | 373 | }; |
| 310 | 374 | ||
| 311 | static struct pxaficp_platform_data trizeps4_ficp_platform_data = { | 375 | /**************************************************************************** |
| 312 | .transceiver_cap = IR_SIRMODE | IR_FIRMODE | IR_OFF, | 376 | * IRDA mode switching on stuart |
| 313 | .transceiver_mode = board_irda_mode, | 377 | ****************************************************************************/ |
| 314 | }; | 378 | #ifndef STATUS_LEDS_ON_STUART_PINS |
| 379 | static short trizeps_conxs_ircr; | ||
| 315 | 380 | ||
| 316 | static int trizeps4_ohci_init(struct device *dev) | 381 | static int trizeps4_irda_startup(struct device *dev) |
| 317 | { | 382 | { |
| 318 | /* setup Port1 GPIO pin. */ | 383 | trizeps_conxs_ircr &= ~ConXS_IRCR_SD; |
| 319 | pxa_gpio_mode( 88 | GPIO_ALT_FN_1_IN); /* USBHPWR1 */ | 384 | IRCR_writew(trizeps_conxs_ircr); |
| 320 | pxa_gpio_mode( 89 | GPIO_ALT_FN_2_OUT); /* USBHPEN1 */ | ||
| 321 | |||
| 322 | /* Set the Power Control Polarity Low and Power Sense | ||
| 323 | Polarity Low to active low. */ | ||
| 324 | UHCHR = (UHCHR | UHCHR_PCPL | UHCHR_PSPL) & | ||
| 325 | ~(UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSEP3 | UHCHR_SSE); | ||
| 326 | |||
| 327 | return 0; | 385 | return 0; |
| 328 | } | 386 | } |
| 329 | 387 | ||
| 330 | static void trizeps4_ohci_exit(struct device *dev) | 388 | static void trizeps4_irda_shutdown(struct device *dev) |
| 389 | { | ||
| 390 | trizeps_conxs_ircr |= ConXS_IRCR_SD; | ||
| 391 | IRCR_writew(trizeps_conxs_ircr); | ||
| 392 | } | ||
| 393 | |||
| 394 | static void trizeps4_irda_transceiver_mode(struct device *dev, int mode) | ||
| 331 | { | 395 | { |
| 332 | ; | 396 | unsigned long flags; |
| 397 | |||
| 398 | local_irq_save(flags); | ||
| 399 | /* Switch mode */ | ||
| 400 | if (mode & IR_SIRMODE) | ||
| 401 | trizeps_conxs_ircr &= ~ConXS_IRCR_MODE; /* Slow mode */ | ||
| 402 | else if (mode & IR_FIRMODE) { | ||
| 403 | trizeps_conxs_ircr |= ConXS_IRCR_MODE; /* Fast mode */ | ||
| 404 | |||
| 405 | /* Switch power */ | ||
| 406 | if (mode & IR_OFF) | ||
| 407 | trizeps_conxs_ircr |= ConXS_IRCR_SD; | ||
| 408 | else | ||
| 409 | trizeps_conxs_ircr &= ~ConXS_IRCR_SD; | ||
| 410 | |||
| 411 | IRCR_writew(trizeps_conxs_ircr); | ||
| 412 | local_irq_restore(flags); | ||
| 413 | |||
| 414 | pxa2xx_transceiver_mode(dev, mode); | ||
| 333 | } | 415 | } |
| 334 | 416 | ||
| 417 | static struct pxaficp_platform_data trizeps4_ficp_platform_data = { | ||
| 418 | .transceiver_cap = IR_SIRMODE | IR_FIRMODE | IR_OFF, | ||
| 419 | .transceiver_mode = trizeps4_irda_transceiver_mode, | ||
| 420 | .startup = trizeps4_irda_startup, | ||
| 421 | .shutdown = trizeps4_irda_shutdown, | ||
| 422 | }; | ||
| 423 | #endif | ||
| 424 | |||
| 425 | /**************************************************************************** | ||
| 426 | * OHCI USB port | ||
| 427 | ****************************************************************************/ | ||
| 335 | static struct pxaohci_platform_data trizeps4_ohci_platform_data = { | 428 | static struct pxaohci_platform_data trizeps4_ohci_platform_data = { |
| 336 | .port_mode = PMM_PERPORT_MODE, | 429 | .port_mode = PMM_PERPORT_MODE, |
| 337 | .init = trizeps4_ohci_init, | 430 | .flags = ENABLE_PORT_ALL | POWER_CONTROL_LOW | POWER_SENSE_LOW, |
| 338 | .exit = trizeps4_ohci_exit, | ||
| 339 | }; | 431 | }; |
| 340 | 432 | ||
| 341 | static struct map_desc trizeps4_io_desc[] __initdata = { | 433 | static struct map_desc trizeps4_io_desc[] __initdata = { |
| @@ -372,105 +464,80 @@ static struct map_desc trizeps4_io_desc[] __initdata = { | |||
| 372 | }; | 464 | }; |
| 373 | 465 | ||
| 374 | static struct pxafb_mode_info sharp_lcd_mode = { | 466 | static struct pxafb_mode_info sharp_lcd_mode = { |
| 375 | .pixclock = 78000, | 467 | .pixclock = 78000, |
| 376 | .xres = 640, | 468 | .xres = 640, |
| 377 | .yres = 480, | 469 | .yres = 480, |
| 378 | .bpp = 8, | 470 | .bpp = 8, |
| 379 | .hsync_len = 4, | 471 | .hsync_len = 4, |
| 380 | .left_margin = 4, | 472 | .left_margin = 4, |
| 381 | .right_margin = 4, | 473 | .right_margin = 4, |
| 382 | .vsync_len = 2, | 474 | .vsync_len = 2, |
| 383 | .upper_margin = 0, | 475 | .upper_margin = 0, |
| 384 | .lower_margin = 0, | 476 | .lower_margin = 0, |
| 385 | .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, | 477 | .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, |
| 386 | .cmap_greyscale = 0, | 478 | .cmap_greyscale = 0, |
| 387 | }; | 479 | }; |
| 388 | 480 | ||
| 389 | static struct pxafb_mach_info sharp_lcd = { | 481 | static struct pxafb_mach_info sharp_lcd = { |
| 390 | .modes = &sharp_lcd_mode, | 482 | .modes = &sharp_lcd_mode, |
| 391 | .num_modes = 1, | 483 | .num_modes = 1, |
| 392 | .cmap_inverse = 0, | 484 | .lcd_conn = LCD_COLOR_DSTN_16BPP | LCD_PCLK_EDGE_FALL, |
| 393 | .cmap_static = 0, | 485 | .cmap_inverse = 0, |
| 394 | .lccr0 = LCCR0_Color | LCCR0_Pas | LCCR0_Dual, | 486 | .cmap_static = 0, |
| 395 | .lccr3 = 0x0340ff02, | 487 | .pxafb_backlight_power = board_backlight_power, |
| 396 | .pxafb_backlight_power = board_backlight_power, | ||
| 397 | }; | 488 | }; |
| 398 | 489 | ||
| 399 | static struct pxafb_mode_info toshiba_lcd_mode = { | 490 | static struct pxafb_mode_info toshiba_lcd_mode = { |
| 400 | .pixclock = 39720, | 491 | .pixclock = 39720, |
| 401 | .xres = 640, | 492 | .xres = 640, |
| 402 | .yres = 480, | 493 | .yres = 480, |
| 403 | .bpp = 8, | 494 | .bpp = 8, |
| 404 | .hsync_len = 63, | 495 | .hsync_len = 63, |
| 405 | .left_margin = 12, | 496 | .left_margin = 12, |
| 406 | .right_margin = 12, | 497 | .right_margin = 12, |
| 407 | .vsync_len = 4, | 498 | .vsync_len = 4, |
| 408 | .upper_margin = 32, | 499 | .upper_margin = 32, |
| 409 | .lower_margin = 10, | 500 | .lower_margin = 10, |
| 410 | .sync = 0, | 501 | .sync = 0, |
| 411 | .cmap_greyscale = 0, | 502 | .cmap_greyscale = 0, |
| 412 | }; | 503 | }; |
| 413 | 504 | ||
| 414 | static struct pxafb_mach_info toshiba_lcd = { | 505 | static struct pxafb_mach_info toshiba_lcd = { |
| 415 | .modes = &toshiba_lcd_mode, | 506 | .modes = &toshiba_lcd_mode, |
| 416 | .num_modes = 1, | 507 | .num_modes = 1, |
| 417 | .cmap_inverse = 0, | 508 | .lcd_conn = (LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL), |
| 418 | .cmap_static = 0, | 509 | .cmap_inverse = 0, |
| 419 | .lccr0 = LCCR0_Color | LCCR0_Act, | 510 | .cmap_static = 0, |
| 420 | .lccr3 = 0x03400002, | 511 | .pxafb_backlight_power = board_backlight_power, |
| 421 | .pxafb_backlight_power = board_backlight_power, | ||
| 422 | }; | 512 | }; |
| 423 | 513 | ||
| 424 | static void __init trizeps4_init(void) | 514 | static void __init trizeps4_init(void) |
| 425 | { | 515 | { |
| 426 | platform_add_devices(trizeps4_devices, ARRAY_SIZE(trizeps4_devices)); | 516 | pxa2xx_mfp_config(ARRAY_AND_SIZE(trizeps4_pin_config)); |
| 517 | if (machine_is_trizeps4wl()) { | ||
| 518 | pxa2xx_mfp_config(ARRAY_AND_SIZE(trizeps4wl_pin_config)); | ||
| 519 | platform_add_devices(trizeps4wl_devices, | ||
| 520 | ARRAY_SIZE(trizeps4wl_devices)); | ||
| 521 | } else { | ||
| 522 | platform_add_devices(trizeps4_devices, | ||
| 523 | ARRAY_SIZE(trizeps4_devices)); | ||
| 524 | } | ||
| 427 | 525 | ||
| 428 | /* set_pxa_fb_info(&sharp_lcd); */ | 526 | if (0) /* dont know how to determine LCD */ |
| 429 | set_pxa_fb_info(&toshiba_lcd); | 527 | set_pxa_fb_info(&sharp_lcd); |
| 528 | else | ||
| 529 | set_pxa_fb_info(&toshiba_lcd); | ||
| 430 | 530 | ||
| 431 | pxa_set_mci_info(&trizeps4_mci_platform_data); | 531 | pxa_set_mci_info(&trizeps4_mci_platform_data); |
| 532 | #ifndef STATUS_LEDS_ON_STUART_PINS | ||
| 432 | pxa_set_ficp_info(&trizeps4_ficp_platform_data); | 533 | pxa_set_ficp_info(&trizeps4_ficp_platform_data); |
| 534 | #endif | ||
| 433 | pxa_set_ohci_info(&trizeps4_ohci_platform_data); | 535 | pxa_set_ohci_info(&trizeps4_ohci_platform_data); |
| 434 | pxa_set_ac97_info(NULL); | 536 | pxa_set_ac97_info(NULL); |
| 435 | } | 537 | pxa_set_i2c_info(NULL); |
| 436 | 538 | i2c_register_board_info(0, trizeps4_i2c_devices, | |
| 437 | static void __init trizeps4_map_io(void) | 539 | ARRAY_SIZE(trizeps4_i2c_devices)); |
| 438 | { | ||
| 439 | pxa_map_io(); | ||
| 440 | iotable_init(trizeps4_io_desc, ARRAY_SIZE(trizeps4_io_desc)); | ||
| 441 | |||
| 442 | /* for DiskOnChip */ | ||
| 443 | pxa_gpio_mode(GPIO15_nCS_1_MD); | ||
| 444 | |||
| 445 | /* for off-module PIC on ConXS board */ | ||
| 446 | pxa_gpio_mode(GPIO_PIC | GPIO_IN); | ||
| 447 | |||
| 448 | /* UCB1400 irq */ | ||
| 449 | pxa_gpio_mode(GPIO_UCB1400 | GPIO_IN); | ||
| 450 | |||
| 451 | /* for DM9000 LAN */ | ||
| 452 | pxa_gpio_mode(GPIO78_nCS_2_MD); | ||
| 453 | pxa_gpio_mode(GPIO_DM9000 | GPIO_IN); | ||
| 454 | |||
| 455 | /* for PCMCIA device */ | ||
| 456 | pxa_gpio_mode(GPIO_PCD | GPIO_IN); | ||
| 457 | pxa_gpio_mode(GPIO_PRDY | GPIO_IN); | ||
| 458 | |||
| 459 | /* for I2C adapter */ | ||
| 460 | pxa_gpio_mode(GPIO117_I2CSCL_MD); | ||
| 461 | pxa_gpio_mode(GPIO118_I2CSDA_MD); | ||
| 462 | 540 | ||
| 463 | /* MMC_DET s.o. */ | ||
| 464 | pxa_gpio_mode(GPIO_MMC_DET | GPIO_IN); | ||
| 465 | |||
| 466 | /* whats that for ??? */ | ||
| 467 | pxa_gpio_mode(GPIO79_nCS_3_MD); | ||
| 468 | |||
| 469 | #ifdef CONFIG_LEDS | ||
| 470 | pxa_gpio_mode( GPIO_SYS_BUSY_LED | GPIO_OUT); /* LED1 */ | ||
| 471 | pxa_gpio_mode( GPIO_HEARTBEAT_LED | GPIO_OUT); /* LED2 */ | ||
| 472 | #endif | ||
| 473 | #ifdef CONFIG_MACH_TRIZEPS4_CONXS | ||
| 474 | #ifdef CONFIG_IDE_PXA_CF | 541 | #ifdef CONFIG_IDE_PXA_CF |
| 475 | /* if boot direct from compact flash dont disable power */ | 542 | /* if boot direct from compact flash dont disable power */ |
| 476 | trizeps_conxs_bcr = 0x0009; | 543 | trizeps_conxs_bcr = 0x0009; |
| @@ -478,18 +545,24 @@ static void __init trizeps4_map_io(void) | |||
| 478 | /* this is the reset value */ | 545 | /* this is the reset value */ |
| 479 | trizeps_conxs_bcr = 0x00A0; | 546 | trizeps_conxs_bcr = 0x00A0; |
| 480 | #endif | 547 | #endif |
| 481 | ConXS_BCR = trizeps_conxs_bcr; | 548 | BCR_writew(trizeps_conxs_bcr); |
| 482 | #endif | 549 | board_backlight_power(1); |
| 550 | } | ||
| 551 | |||
| 552 | static void __init trizeps4_map_io(void) | ||
| 553 | { | ||
| 554 | pxa_map_io(); | ||
| 555 | iotable_init(trizeps4_io_desc, ARRAY_SIZE(trizeps4_io_desc)); | ||
| 483 | 556 | ||
| 484 | #warning FIXME - accessing PM registers directly is deprecated | 557 | if ((MSC0 & 0x8) && (BOOT_DEF & 0x1)) { |
| 485 | PWER = 0x00000002; | 558 | /* if flash is 16 bit wide its a Trizeps4 WL */ |
| 486 | PFER = 0x00000000; | 559 | __machine_arch_type = MACH_TYPE_TRIZEPS4WL; |
| 487 | PRER = 0x00000002; | 560 | trizeps4_flash_data[0].width = 2; |
| 488 | PGSR0 = 0x0158C000; | 561 | } else { |
| 489 | PGSR1 = 0x00FF0080; | 562 | /* if flash is 32 bit wide its a Trizeps4 */ |
| 490 | PGSR2 = 0x0001C004; | 563 | __machine_arch_type = MACH_TYPE_TRIZEPS4; |
| 491 | /* Stop 3.6MHz and drive HIGH to PCMCIA and CS */ | 564 | trizeps4_flash_data[0].width = 4; |
| 492 | PCFR |= PCFR_OPDE; | 565 | } |
| 493 | } | 566 | } |
| 494 | 567 | ||
| 495 | MACHINE_START(TRIZEPS4, "Keith und Koep Trizeps IV module") | 568 | MACHINE_START(TRIZEPS4, "Keith und Koep Trizeps IV module") |
| @@ -503,3 +576,13 @@ MACHINE_START(TRIZEPS4, "Keith und Koep Trizeps IV module") | |||
| 503 | .timer = &pxa_timer, | 576 | .timer = &pxa_timer, |
| 504 | MACHINE_END | 577 | MACHINE_END |
| 505 | 578 | ||
| 579 | MACHINE_START(TRIZEPS4WL, "Keith und Koep Trizeps IV-WL module") | ||
| 580 | /* MAINTAINER("Jürgen Schindele") */ | ||
| 581 | .phys_io = 0x40000000, | ||
| 582 | .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, | ||
| 583 | .boot_params = TRIZEPS4_SDRAM_BASE + 0x100, | ||
| 584 | .init_machine = trizeps4_init, | ||
| 585 | .map_io = trizeps4_map_io, | ||
| 586 | .init_irq = pxa27x_init_irq, | ||
| 587 | .timer = &pxa_timer, | ||
| 588 | MACHINE_END | ||
diff --git a/arch/arm/mach-pxa/viper.c b/arch/arm/mach-pxa/viper.c new file mode 100644 index 000000000000..d7632f63603c --- /dev/null +++ b/arch/arm/mach-pxa/viper.c | |||
| @@ -0,0 +1,951 @@ | |||
| 1 | /* | ||
| 2 | * linux/arch/arm/mach-pxa/viper.c | ||
| 3 | * | ||
| 4 | * Support for the Arcom VIPER SBC. | ||
| 5 | * | ||
| 6 | * Author: Ian Campbell | ||
| 7 | * Created: Feb 03, 2003 | ||
| 8 | * Copyright: Arcom Control Systems | ||
| 9 | * | ||
| 10 | * Maintained by Marc Zyngier <maz@misterjones.org> | ||
| 11 | * <marc.zyngier@altran.com> | ||
| 12 | * | ||
| 13 | * Based on lubbock.c: | ||
| 14 | * Author: Nicolas Pitre | ||
| 15 | * Created: Jun 15, 2001 | ||
| 16 | * Copyright: MontaVista Software Inc. | ||
| 17 | * | ||
| 18 | * This program is free software; you can redistribute it and/or modify | ||
| 19 | * it under the terms of the GNU General Public License version 2 as | ||
| 20 | * published by the Free Software Foundation. | ||
| 21 | */ | ||
| 22 | |||
| 23 | #include <linux/types.h> | ||
| 24 | #include <linux/memory.h> | ||
| 25 | #include <linux/cpu.h> | ||
| 26 | #include <linux/cpufreq.h> | ||
| 27 | #include <linux/delay.h> | ||
| 28 | #include <linux/fs.h> | ||
| 29 | #include <linux/init.h> | ||
| 30 | #include <linux/interrupt.h> | ||
| 31 | #include <linux/major.h> | ||
| 32 | #include <linux/module.h> | ||
| 33 | #include <linux/pm.h> | ||
| 34 | #include <linux/sched.h> | ||
| 35 | #include <linux/gpio.h> | ||
| 36 | #include <linux/i2c-gpio.h> | ||
| 37 | #include <linux/serial_8250.h> | ||
| 38 | #include <linux/smc91x.h> | ||
| 39 | #include <linux/pwm_backlight.h> | ||
| 40 | #include <linux/usb/isp116x.h> | ||
| 41 | #include <linux/mtd/mtd.h> | ||
| 42 | #include <linux/mtd/partitions.h> | ||
| 43 | #include <linux/mtd/physmap.h> | ||
| 44 | |||
| 45 | #include <mach/pxa-regs.h> | ||
| 46 | #include <mach/pxa2xx-regs.h> | ||
| 47 | #include <mach/bitfield.h> | ||
| 48 | #include <mach/audio.h> | ||
| 49 | #include <mach/pxafb.h> | ||
| 50 | #include <mach/mfp-pxa25x.h> | ||
| 51 | #include <mach/i2c.h> | ||
| 52 | #include <mach/viper.h> | ||
| 53 | |||
| 54 | #include <asm/setup.h> | ||
| 55 | #include <asm/mach-types.h> | ||
| 56 | #include <asm/irq.h> | ||
| 57 | #include <asm/sizes.h> | ||
| 58 | |||
| 59 | #include <asm/mach/arch.h> | ||
| 60 | #include <asm/mach/map.h> | ||
| 61 | #include <asm/mach/irq.h> | ||
| 62 | |||
| 63 | #include "generic.h" | ||
| 64 | #include "devices.h" | ||
| 65 | |||
| 66 | static unsigned int icr; | ||
| 67 | |||
| 68 | static void viper_icr_set_bit(unsigned int bit) | ||
| 69 | { | ||
| 70 | icr |= bit; | ||
| 71 | VIPER_ICR = icr; | ||
| 72 | } | ||
| 73 | |||
| 74 | static void viper_icr_clear_bit(unsigned int bit) | ||
| 75 | { | ||
| 76 | icr &= ~bit; | ||
| 77 | VIPER_ICR = icr; | ||
| 78 | } | ||
| 79 | |||
| 80 | /* This function is used from the pcmcia module to reset the CF */ | ||
| 81 | void viper_cf_rst(int state) | ||
| 82 | { | ||
| 83 | if (state) | ||
| 84 | viper_icr_set_bit(VIPER_ICR_CF_RST); | ||
| 85 | else | ||
| 86 | viper_icr_clear_bit(VIPER_ICR_CF_RST); | ||
| 87 | } | ||
| 88 | EXPORT_SYMBOL(viper_cf_rst); | ||
| 89 | |||
| 90 | /* | ||
| 91 | * The CPLD version register was not present on VIPER boards prior to | ||
| 92 | * v2i1. On v1 boards where the version register is not present we | ||
| 93 | * will just read back the previous value from the databus. | ||
| 94 | * | ||
| 95 | * Therefore we do two reads. The first time we write 0 to the | ||
| 96 | * (read-only) register before reading and the second time we write | ||
| 97 | * 0xff first. If the two reads do not match or they read back as 0xff | ||
| 98 | * or 0x00 then we have version 1 hardware. | ||
| 99 | */ | ||
| 100 | static u8 viper_hw_version(void) | ||
| 101 | { | ||
| 102 | u8 v1, v2; | ||
| 103 | unsigned long flags; | ||
| 104 | |||
| 105 | local_irq_save(flags); | ||
| 106 | |||
| 107 | VIPER_VERSION = 0; | ||
| 108 | v1 = VIPER_VERSION; | ||
| 109 | VIPER_VERSION = 0xff; | ||
| 110 | v2 = VIPER_VERSION; | ||
| 111 | |||
| 112 | v1 = (v1 != v2 || v1 == 0xff) ? 0 : v1; | ||
| 113 | |||
| 114 | local_irq_restore(flags); | ||
| 115 | return v1; | ||
| 116 | } | ||
| 117 | |||
| 118 | /* CPU sysdev */ | ||
| 119 | static int viper_cpu_suspend(struct sys_device *sysdev, pm_message_t state) | ||
| 120 | { | ||
| 121 | viper_icr_set_bit(VIPER_ICR_R_DIS); | ||
| 122 | return 0; | ||
| 123 | } | ||
| 124 | |||
| 125 | static int viper_cpu_resume(struct sys_device *sysdev) | ||
| 126 | { | ||
| 127 | viper_icr_clear_bit(VIPER_ICR_R_DIS); | ||
| 128 | return 0; | ||
| 129 | } | ||
| 130 | |||
| 131 | static struct sysdev_driver viper_cpu_sysdev_driver = { | ||
| 132 | .suspend = viper_cpu_suspend, | ||
| 133 | .resume = viper_cpu_resume, | ||
| 134 | }; | ||
| 135 | |||
| 136 | static unsigned int current_voltage_divisor; | ||
| 137 | |||
| 138 | /* | ||
| 139 | * If force is not true then step from existing to new divisor. If | ||
| 140 | * force is true then jump straight to the new divisor. Stepping is | ||
| 141 | * used because if the jump in voltage is too large, the VCC can dip | ||
| 142 | * too low and the regulator cuts out. | ||
| 143 | * | ||
| 144 | * force can be used to initialize the divisor to a know state by | ||
| 145 | * setting the value for the current clock speed, since we are already | ||
| 146 | * running at that speed we know the voltage should be pretty close so | ||
| 147 | * the jump won't be too large | ||
| 148 | */ | ||
| 149 | static void viper_set_core_cpu_voltage(unsigned long khz, int force) | ||
| 150 | { | ||
| 151 | int i = 0; | ||
| 152 | unsigned int divisor = 0; | ||
| 153 | const char *v; | ||
| 154 | |||
| 155 | if (khz < 200000) { | ||
| 156 | v = "1.0"; divisor = 0xfff; | ||
| 157 | } else if (khz < 300000) { | ||
| 158 | v = "1.1"; divisor = 0xde5; | ||
| 159 | } else { | ||
| 160 | v = "1.3"; divisor = 0x325; | ||
| 161 | } | ||
| 162 | |||
| 163 | pr_debug("viper: setting CPU core voltage to %sV at %d.%03dMHz\n", | ||
| 164 | v, (int)khz / 1000, (int)khz % 1000); | ||
| 165 | |||
| 166 | #define STEP 0x100 | ||
| 167 | do { | ||
| 168 | int step; | ||
| 169 | |||
| 170 | if (force) | ||
| 171 | step = divisor; | ||
| 172 | else if (current_voltage_divisor < divisor - STEP) | ||
| 173 | step = current_voltage_divisor + STEP; | ||
| 174 | else if (current_voltage_divisor > divisor + STEP) | ||
| 175 | step = current_voltage_divisor - STEP; | ||
| 176 | else | ||
| 177 | step = divisor; | ||
| 178 | force = 0; | ||
| 179 | |||
| 180 | gpio_set_value(VIPER_PSU_CLK_GPIO, 0); | ||
| 181 | gpio_set_value(VIPER_PSU_nCS_LD_GPIO, 0); | ||
| 182 | |||
| 183 | for (i = 1 << 11 ; i > 0 ; i >>= 1) { | ||
| 184 | udelay(1); | ||
| 185 | |||
| 186 | gpio_set_value(VIPER_PSU_DATA_GPIO, step & i); | ||
| 187 | udelay(1); | ||
| 188 | |||
| 189 | gpio_set_value(VIPER_PSU_CLK_GPIO, 1); | ||
| 190 | udelay(1); | ||
| 191 | |||
| 192 | gpio_set_value(VIPER_PSU_CLK_GPIO, 0); | ||
| 193 | } | ||
| 194 | udelay(1); | ||
| 195 | |||
| 196 | gpio_set_value(VIPER_PSU_nCS_LD_GPIO, 1); | ||
| 197 | udelay(1); | ||
| 198 | |||
| 199 | gpio_set_value(VIPER_PSU_nCS_LD_GPIO, 0); | ||
| 200 | |||
| 201 | current_voltage_divisor = step; | ||
| 202 | } while (current_voltage_divisor != divisor); | ||
| 203 | } | ||
| 204 | |||
| 205 | /* Interrupt handling */ | ||
| 206 | static unsigned long viper_irq_enabled_mask; | ||
| 207 | |||
| 208 | static void viper_ack_irq(unsigned int irq) | ||
| 209 | { | ||
| 210 | int viper_irq = irq - PXA_ISA_IRQ(0); | ||
| 211 | |||
| 212 | if (viper_irq < 8) | ||
| 213 | VIPER_LO_IRQ_STATUS = 1 << viper_irq; | ||
| 214 | else | ||
| 215 | VIPER_HI_IRQ_STATUS = 1 << (viper_irq - 8); | ||
| 216 | } | ||
| 217 | |||
| 218 | static void viper_mask_irq(unsigned int irq) | ||
| 219 | { | ||
| 220 | viper_irq_enabled_mask &= ~(1 << (irq - PXA_ISA_IRQ(0))); | ||
| 221 | } | ||
| 222 | |||
| 223 | static void viper_unmask_irq(unsigned int irq) | ||
| 224 | { | ||
| 225 | viper_irq_enabled_mask |= (1 << (irq - PXA_ISA_IRQ(0))); | ||
| 226 | } | ||
| 227 | |||
| 228 | static inline unsigned long viper_irq_pending(void) | ||
| 229 | { | ||
| 230 | return (VIPER_HI_IRQ_STATUS << 8 | VIPER_LO_IRQ_STATUS) & | ||
| 231 | viper_irq_enabled_mask; | ||
| 232 | } | ||
| 233 | |||
| 234 | static void viper_irq_handler(unsigned int irq, struct irq_desc *desc) | ||
| 235 | { | ||
| 236 | unsigned long pending; | ||
| 237 | |||
| 238 | pending = viper_irq_pending(); | ||
| 239 | do { | ||
| 240 | if (likely(pending)) { | ||
| 241 | irq = PXA_ISA_IRQ(0) + __ffs(pending); | ||
| 242 | generic_handle_irq(irq); | ||
| 243 | } | ||
| 244 | pending = viper_irq_pending(); | ||
| 245 | } while (pending); | ||
| 246 | } | ||
| 247 | |||
| 248 | static struct irq_chip viper_irq_chip = { | ||
| 249 | .name = "ISA", | ||
| 250 | .ack = viper_ack_irq, | ||
| 251 | .mask = viper_mask_irq, | ||
| 252 | .unmask = viper_unmask_irq | ||
| 253 | }; | ||
| 254 | |||
| 255 | static void __init viper_init_irq(void) | ||
| 256 | { | ||
| 257 | const int isa_irqs[] = { 3, 4, 5, 6, 7, 10, 11, 12, 9, 14, 15 }; | ||
| 258 | int irq; | ||
| 259 | int isa_irq; | ||
| 260 | |||
| 261 | pxa25x_init_irq(); | ||
| 262 | |||
| 263 | /* setup ISA IRQs */ | ||
| 264 | for (irq = 0; irq < ARRAY_SIZE(isa_irqs); irq++) { | ||
| 265 | isa_irq = isa_irqs[irq]; | ||
| 266 | set_irq_chip(isa_irq, &viper_irq_chip); | ||
| 267 | set_irq_handler(isa_irq, handle_edge_irq); | ||
| 268 | set_irq_flags(isa_irq, IRQF_VALID | IRQF_PROBE); | ||
| 269 | } | ||
| 270 | |||
| 271 | set_irq_chained_handler(gpio_to_irq(VIPER_CPLD_GPIO), | ||
| 272 | viper_irq_handler); | ||
| 273 | set_irq_type(gpio_to_irq(VIPER_CPLD_GPIO), IRQ_TYPE_EDGE_BOTH); | ||
| 274 | |||
| 275 | #ifndef CONFIG_SERIAL_PXA | ||
| 276 | /* | ||
| 277 | * 8250 doesn't support IRQ_TYPE being passed as part | ||
| 278 | * of the plat_serial8250_port structure... | ||
| 279 | */ | ||
| 280 | set_irq_type(gpio_to_irq(VIPER_UARTA_GPIO), IRQ_TYPE_EDGE_RISING); | ||
| 281 | set_irq_type(gpio_to_irq(VIPER_UARTB_GPIO), IRQ_TYPE_EDGE_RISING); | ||
| 282 | #endif | ||
| 283 | } | ||
| 284 | |||
| 285 | /* Flat Panel */ | ||
| 286 | static struct pxafb_mode_info fb_mode_info[] = { | ||
| 287 | { | ||
| 288 | .pixclock = 157500, | ||
| 289 | |||
| 290 | .xres = 320, | ||
| 291 | .yres = 240, | ||
| 292 | |||
| 293 | .bpp = 16, | ||
| 294 | |||
| 295 | .hsync_len = 63, | ||
| 296 | .left_margin = 7, | ||
| 297 | .right_margin = 13, | ||
| 298 | |||
| 299 | .vsync_len = 20, | ||
| 300 | .upper_margin = 0, | ||
| 301 | .lower_margin = 0, | ||
| 302 | |||
| 303 | .sync = 0, | ||
| 304 | }, | ||
| 305 | }; | ||
| 306 | |||
| 307 | static struct pxafb_mach_info fb_info = { | ||
| 308 | .modes = fb_mode_info, | ||
| 309 | .num_modes = 1, | ||
| 310 | .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL, | ||
| 311 | }; | ||
| 312 | |||
| 313 | static int viper_backlight_init(struct device *dev) | ||
| 314 | { | ||
| 315 | int ret; | ||
| 316 | |||
| 317 | /* GPIO9 and 10 control FB backlight. Initialise to off */ | ||
| 318 | ret = gpio_request(VIPER_BCKLIGHT_EN_GPIO, "Backlight"); | ||
| 319 | if (ret) | ||
| 320 | goto err_request_bckl; | ||
| 321 | |||
| 322 | ret = gpio_request(VIPER_LCD_EN_GPIO, "LCD"); | ||
| 323 | if (ret) | ||
| 324 | goto err_request_lcd; | ||
| 325 | |||
| 326 | ret = gpio_direction_output(VIPER_BCKLIGHT_EN_GPIO, 0); | ||
| 327 | if (ret) | ||
| 328 | goto err_dir; | ||
| 329 | |||
| 330 | ret = gpio_direction_output(VIPER_LCD_EN_GPIO, 0); | ||
| 331 | if (ret) | ||
| 332 | goto err_dir; | ||
| 333 | |||
| 334 | return 0; | ||
| 335 | |||
| 336 | err_dir: | ||
| 337 | gpio_free(VIPER_LCD_EN_GPIO); | ||
| 338 | err_request_lcd: | ||
| 339 | gpio_free(VIPER_BCKLIGHT_EN_GPIO); | ||
| 340 | err_request_bckl: | ||
| 341 | dev_err(dev, "Failed to setup LCD GPIOs\n"); | ||
| 342 | |||
| 343 | return ret; | ||
| 344 | } | ||
| 345 | |||
| 346 | static int viper_backlight_notify(int brightness) | ||
| 347 | { | ||
| 348 | gpio_set_value(VIPER_LCD_EN_GPIO, !!brightness); | ||
| 349 | gpio_set_value(VIPER_BCKLIGHT_EN_GPIO, !!brightness); | ||
| 350 | |||
| 351 | return brightness; | ||
| 352 | } | ||
| 353 | |||
| 354 | static void viper_backlight_exit(struct device *dev) | ||
| 355 | { | ||
| 356 | gpio_free(VIPER_LCD_EN_GPIO); | ||
| 357 | gpio_free(VIPER_BCKLIGHT_EN_GPIO); | ||
| 358 | } | ||
| 359 | |||
| 360 | static struct platform_pwm_backlight_data viper_backlight_data = { | ||
| 361 | .pwm_id = 0, | ||
| 362 | .max_brightness = 100, | ||
| 363 | .dft_brightness = 100, | ||
| 364 | .pwm_period_ns = 1000000, | ||
| 365 | .init = viper_backlight_init, | ||
| 366 | .notify = viper_backlight_notify, | ||
| 367 | .exit = viper_backlight_exit, | ||
| 368 | }; | ||
| 369 | |||
| 370 | static struct platform_device viper_backlight_device = { | ||
| 371 | .name = "pwm-backlight", | ||
| 372 | .dev = { | ||
| 373 | .parent = &pxa25x_device_pwm0.dev, | ||
| 374 | .platform_data = &viper_backlight_data, | ||
| 375 | }, | ||
| 376 | }; | ||
| 377 | |||
| 378 | /* Ethernet */ | ||
| 379 | static struct resource smc91x_resources[] = { | ||
| 380 | [0] = { | ||
| 381 | .name = "smc91x-regs", | ||
| 382 | .start = VIPER_ETH_PHYS + 0x300, | ||
| 383 | .end = VIPER_ETH_PHYS + 0x30f, | ||
| 384 | .flags = IORESOURCE_MEM, | ||
| 385 | }, | ||
| 386 | [1] = { | ||
| 387 | .start = gpio_to_irq(VIPER_ETH_GPIO), | ||
| 388 | .end = gpio_to_irq(VIPER_ETH_GPIO), | ||
| 389 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, | ||
| 390 | }, | ||
| 391 | [2] = { | ||
| 392 | .name = "smc91x-data32", | ||
| 393 | .start = VIPER_ETH_DATA_PHYS, | ||
| 394 | .end = VIPER_ETH_DATA_PHYS + 3, | ||
| 395 | .flags = IORESOURCE_MEM, | ||
| 396 | }, | ||
| 397 | }; | ||
| 398 | |||
| 399 | static struct smc91x_platdata viper_smc91x_info = { | ||
| 400 | .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT, | ||
| 401 | .leda = RPC_LED_100_10, | ||
| 402 | .ledb = RPC_LED_TX_RX, | ||
| 403 | }; | ||
| 404 | |||
| 405 | static struct platform_device smc91x_device = { | ||
| 406 | .name = "smc91x", | ||
| 407 | .id = -1, | ||
| 408 | .num_resources = ARRAY_SIZE(smc91x_resources), | ||
| 409 | .resource = smc91x_resources, | ||
| 410 | .dev = { | ||
| 411 | .platform_data = &viper_smc91x_info, | ||
| 412 | }, | ||
| 413 | }; | ||
| 414 | |||
| 415 | /* i2c */ | ||
| 416 | static struct i2c_gpio_platform_data i2c_bus_data = { | ||
| 417 | .sda_pin = VIPER_RTC_I2C_SDA_GPIO, | ||
| 418 | .scl_pin = VIPER_RTC_I2C_SCL_GPIO, | ||
| 419 | .udelay = 10, | ||
| 420 | .timeout = 100, | ||
| 421 | }; | ||
| 422 | |||
| 423 | static struct platform_device i2c_bus_device = { | ||
| 424 | .name = "i2c-gpio", | ||
| 425 | .id = 1, /* pxa2xx-i2c is bus 0, so start at 1 */ | ||
| 426 | .dev = { | ||
| 427 | .platform_data = &i2c_bus_data, | ||
| 428 | } | ||
| 429 | }; | ||
| 430 | |||
| 431 | static struct i2c_board_info __initdata viper_i2c_devices[] = { | ||
| 432 | { | ||
| 433 | I2C_BOARD_INFO("ds1338", 0x68), | ||
| 434 | }, | ||
| 435 | }; | ||
| 436 | |||
| 437 | /* | ||
| 438 | * Serial configuration: | ||
| 439 | * You can either have the standard PXA ports driven by the PXA driver, | ||
| 440 | * or all the ports (PXA + 16850) driven by the 8250 driver. | ||
| 441 | * Choose your poison. | ||
| 442 | */ | ||
| 443 | |||
| 444 | static struct resource viper_serial_resources[] = { | ||
| 445 | #ifndef CONFIG_SERIAL_PXA | ||
| 446 | { | ||
| 447 | .start = 0x40100000, | ||
| 448 | .end = 0x4010001f, | ||
| 449 | .flags = IORESOURCE_MEM, | ||
| 450 | }, | ||
| 451 | { | ||
| 452 | .start = 0x40200000, | ||
| 453 | .end = 0x4020001f, | ||
| 454 | .flags = IORESOURCE_MEM, | ||
| 455 | }, | ||
| 456 | { | ||
| 457 | .start = 0x40700000, | ||
| 458 | .end = 0x4070001f, | ||
| 459 | .flags = IORESOURCE_MEM, | ||
| 460 | }, | ||
| 461 | { | ||
| 462 | .start = VIPER_UARTA_PHYS, | ||
| 463 | .end = VIPER_UARTA_PHYS + 0xf, | ||
| 464 | .flags = IORESOURCE_MEM, | ||
| 465 | }, | ||
| 466 | { | ||
| 467 | .start = VIPER_UARTB_PHYS, | ||
| 468 | .end = VIPER_UARTB_PHYS + 0xf, | ||
| 469 | .flags = IORESOURCE_MEM, | ||
| 470 | }, | ||
| 471 | #else | ||
| 472 | { | ||
| 473 | 0, | ||
| 474 | }, | ||
| 475 | #endif | ||
| 476 | }; | ||
| 477 | |||
| 478 | static struct plat_serial8250_port serial_platform_data[] = { | ||
| 479 | #ifndef CONFIG_SERIAL_PXA | ||
| 480 | /* Internal UARTs */ | ||
| 481 | { | ||
| 482 | .membase = (void *)&FFUART, | ||
| 483 | .mapbase = __PREG(FFUART), | ||
| 484 | .irq = IRQ_FFUART, | ||
| 485 | .uartclk = 921600 * 16, | ||
| 486 | .regshift = 2, | ||
| 487 | .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, | ||
| 488 | .iotype = UPIO_MEM, | ||
| 489 | }, | ||
| 490 | { | ||
| 491 | .membase = (void *)&BTUART, | ||
| 492 | .mapbase = __PREG(BTUART), | ||
| 493 | .irq = IRQ_BTUART, | ||
| 494 | .uartclk = 921600 * 16, | ||
| 495 | .regshift = 2, | ||
| 496 | .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, | ||
| 497 | .iotype = UPIO_MEM, | ||
| 498 | }, | ||
| 499 | { | ||
| 500 | .membase = (void *)&STUART, | ||
| 501 | .mapbase = __PREG(STUART), | ||
| 502 | .irq = IRQ_STUART, | ||
| 503 | .uartclk = 921600 * 16, | ||
| 504 | .regshift = 2, | ||
| 505 | .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, | ||
| 506 | .iotype = UPIO_MEM, | ||
| 507 | }, | ||
| 508 | /* External UARTs */ | ||
| 509 | { | ||
| 510 | .mapbase = VIPER_UARTA_PHYS, | ||
| 511 | .irq = gpio_to_irq(VIPER_UARTA_GPIO), | ||
| 512 | .uartclk = 1843200, | ||
| 513 | .regshift = 1, | ||
| 514 | .iotype = UPIO_MEM, | ||
| 515 | .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP | | ||
| 516 | UPF_SKIP_TEST, | ||
| 517 | }, | ||
| 518 | { | ||
| 519 | .mapbase = VIPER_UARTB_PHYS, | ||
| 520 | .irq = gpio_to_irq(VIPER_UARTB_GPIO), | ||
| 521 | .uartclk = 1843200, | ||
| 522 | .regshift = 1, | ||
| 523 | .iotype = UPIO_MEM, | ||
| 524 | .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP | | ||
| 525 | UPF_SKIP_TEST, | ||
| 526 | }, | ||
| 527 | #endif | ||
| 528 | { }, | ||
| 529 | }; | ||
| 530 | |||
| 531 | static struct platform_device serial_device = { | ||
| 532 | .name = "serial8250", | ||
| 533 | .id = 0, | ||
| 534 | .dev = { | ||
| 535 | .platform_data = serial_platform_data, | ||
| 536 | }, | ||
| 537 | .num_resources = ARRAY_SIZE(viper_serial_resources), | ||
| 538 | .resource = viper_serial_resources, | ||
| 539 | }; | ||
| 540 | |||
| 541 | /* USB */ | ||
| 542 | static void isp116x_delay(struct device *dev, int delay) | ||
| 543 | { | ||
| 544 | ndelay(delay); | ||
| 545 | } | ||
| 546 | |||
| 547 | static struct resource isp116x_resources[] = { | ||
| 548 | [0] = { /* DATA */ | ||
| 549 | .start = VIPER_USB_PHYS + 0, | ||
| 550 | .end = VIPER_USB_PHYS + 1, | ||
| 551 | .flags = IORESOURCE_MEM, | ||
| 552 | }, | ||
| 553 | [1] = { /* ADDR */ | ||
| 554 | .start = VIPER_USB_PHYS + 2, | ||
| 555 | .end = VIPER_USB_PHYS + 3, | ||
| 556 | .flags = IORESOURCE_MEM, | ||
| 557 | }, | ||
| 558 | [2] = { | ||
| 559 | .start = gpio_to_irq(VIPER_USB_GPIO), | ||
| 560 | .end = gpio_to_irq(VIPER_USB_GPIO), | ||
| 561 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, | ||
| 562 | }, | ||
| 563 | }; | ||
| 564 | |||
| 565 | /* (DataBusWidth16|AnalogOCEnable|DREQOutputPolarity|DownstreamPort15KRSel ) */ | ||
| 566 | static struct isp116x_platform_data isp116x_platform_data = { | ||
| 567 | /* Enable internal resistors on downstream ports */ | ||
| 568 | .sel15Kres = 1, | ||
| 569 | /* On-chip overcurrent protection */ | ||
| 570 | .oc_enable = 1, | ||
| 571 | /* INT output polarity */ | ||
| 572 | .int_act_high = 1, | ||
| 573 | /* INT edge or level triggered */ | ||
| 574 | .int_edge_triggered = 0, | ||
| 575 | |||
| 576 | /* WAKEUP pin connected - NOT SUPPORTED */ | ||
| 577 | /* .remote_wakeup_connected = 0, */ | ||
| 578 | /* Wakeup by devices on usb bus enabled */ | ||
| 579 | .remote_wakeup_enable = 0, | ||
| 580 | .delay = isp116x_delay, | ||
| 581 | }; | ||
| 582 | |||
| 583 | static struct platform_device isp116x_device = { | ||
| 584 | .name = "isp116x-hcd", | ||
| 585 | .id = -1, | ||
| 586 | .num_resources = ARRAY_SIZE(isp116x_resources), | ||
| 587 | .resource = isp116x_resources, | ||
| 588 | .dev = { | ||
| 589 | .platform_data = &isp116x_platform_data, | ||
| 590 | }, | ||
| 591 | |||
| 592 | }; | ||
| 593 | |||
| 594 | /* MTD */ | ||
| 595 | static struct resource mtd_resources[] = { | ||
| 596 | [0] = { /* RedBoot config + filesystem flash */ | ||
| 597 | .start = VIPER_FLASH_PHYS, | ||
| 598 | .end = VIPER_FLASH_PHYS + SZ_32M - 1, | ||
| 599 | .flags = IORESOURCE_MEM, | ||
| 600 | }, | ||
| 601 | [1] = { /* Boot flash */ | ||
| 602 | .start = VIPER_BOOT_PHYS, | ||
| 603 | .end = VIPER_BOOT_PHYS + SZ_1M - 1, | ||
| 604 | .flags = IORESOURCE_MEM, | ||
| 605 | }, | ||
| 606 | [2] = { /* | ||
| 607 | * SRAM size is actually 256KB, 8bits, with a sparse mapping | ||
| 608 | * (each byte is on a 16bit boundary). | ||
| 609 | */ | ||
| 610 | .start = _VIPER_SRAM_BASE, | ||
| 611 | .end = _VIPER_SRAM_BASE + SZ_512K - 1, | ||
| 612 | .flags = IORESOURCE_MEM, | ||
| 613 | }, | ||
| 614 | }; | ||
| 615 | |||
| 616 | static struct mtd_partition viper_boot_flash_partition = { | ||
| 617 | .name = "RedBoot", | ||
| 618 | .size = SZ_1M, | ||
| 619 | .offset = 0, | ||
| 620 | .mask_flags = MTD_WRITEABLE, /* force R/O */ | ||
| 621 | }; | ||
| 622 | |||
| 623 | static struct physmap_flash_data viper_flash_data[] = { | ||
| 624 | [0] = { | ||
| 625 | .width = 2, | ||
| 626 | .parts = NULL, | ||
| 627 | .nr_parts = 0, | ||
| 628 | }, | ||
| 629 | [1] = { | ||
| 630 | .width = 2, | ||
| 631 | .parts = &viper_boot_flash_partition, | ||
| 632 | .nr_parts = 1, | ||
| 633 | }, | ||
| 634 | }; | ||
| 635 | |||
| 636 | static struct platform_device viper_mtd_devices[] = { | ||
| 637 | [0] = { | ||
| 638 | .name = "physmap-flash", | ||
| 639 | .id = 0, | ||
| 640 | .dev = { | ||
| 641 | .platform_data = &viper_flash_data[0], | ||
| 642 | }, | ||
| 643 | .resource = &mtd_resources[0], | ||
| 644 | .num_resources = 1, | ||
| 645 | }, | ||
| 646 | [1] = { | ||
| 647 | .name = "physmap-flash", | ||
| 648 | .id = 1, | ||
| 649 | .dev = { | ||
| 650 | .platform_data = &viper_flash_data[1], | ||
| 651 | }, | ||
| 652 | .resource = &mtd_resources[1], | ||
| 653 | .num_resources = 1, | ||
| 654 | }, | ||
| 655 | }; | ||
| 656 | |||
| 657 | static struct platform_device *viper_devs[] __initdata = { | ||
| 658 | &smc91x_device, | ||
| 659 | &i2c_bus_device, | ||
| 660 | &serial_device, | ||
| 661 | &isp116x_device, | ||
| 662 | &viper_mtd_devices[0], | ||
| 663 | &viper_mtd_devices[1], | ||
| 664 | &viper_backlight_device, | ||
| 665 | }; | ||
| 666 | |||
| 667 | static mfp_cfg_t viper_pin_config[] __initdata = { | ||
| 668 | /* Chip selects */ | ||
| 669 | GPIO15_nCS_1, | ||
| 670 | GPIO78_nCS_2, | ||
| 671 | GPIO79_nCS_3, | ||
| 672 | GPIO80_nCS_4, | ||
| 673 | GPIO33_nCS_5, | ||
| 674 | |||
| 675 | /* FP Backlight */ | ||
| 676 | GPIO9_GPIO, /* VIPER_BCKLIGHT_EN_GPIO */ | ||
| 677 | GPIO10_GPIO, /* VIPER_LCD_EN_GPIO */ | ||
| 678 | GPIO16_PWM0_OUT, | ||
| 679 | |||
| 680 | /* Ethernet PHY Ready */ | ||
| 681 | GPIO18_RDY, | ||
| 682 | |||
| 683 | /* Serial shutdown */ | ||
| 684 | GPIO12_GPIO | MFP_LPM_DRIVE_HIGH, /* VIPER_UART_SHDN_GPIO */ | ||
| 685 | |||
| 686 | /* Compact-Flash / PC104 */ | ||
| 687 | GPIO48_nPOE, | ||
| 688 | GPIO49_nPWE, | ||
| 689 | GPIO50_nPIOR, | ||
| 690 | GPIO51_nPIOW, | ||
| 691 | GPIO52_nPCE_1, | ||
| 692 | GPIO53_nPCE_2, | ||
| 693 | GPIO54_nPSKTSEL, | ||
| 694 | GPIO55_nPREG, | ||
| 695 | GPIO56_nPWAIT, | ||
| 696 | GPIO57_nIOIS16, | ||
| 697 | GPIO8_GPIO, /* VIPER_CF_RDY_GPIO */ | ||
| 698 | GPIO32_GPIO, /* VIPER_CF_CD_GPIO */ | ||
| 699 | GPIO82_GPIO, /* VIPER_CF_POWER_GPIO */ | ||
| 700 | |||
| 701 | /* Integrated UPS control */ | ||
| 702 | GPIO20_GPIO, /* VIPER_UPS_GPIO */ | ||
| 703 | |||
| 704 | /* Vcc regulator control */ | ||
| 705 | GPIO6_GPIO, /* VIPER_PSU_DATA_GPIO */ | ||
| 706 | GPIO11_GPIO, /* VIPER_PSU_CLK_GPIO */ | ||
| 707 | GPIO19_GPIO, /* VIPER_PSU_nCS_LD_GPIO */ | ||
| 708 | |||
| 709 | /* i2c busses */ | ||
| 710 | GPIO26_GPIO, /* VIPER_TPM_I2C_SDA_GPIO */ | ||
| 711 | GPIO27_GPIO, /* VIPER_TPM_I2C_SCL_GPIO */ | ||
| 712 | GPIO83_GPIO, /* VIPER_RTC_I2C_SDA_GPIO */ | ||
| 713 | GPIO84_GPIO, /* VIPER_RTC_I2C_SCL_GPIO */ | ||
| 714 | |||
| 715 | /* PC/104 Interrupt */ | ||
| 716 | GPIO1_GPIO | WAKEUP_ON_EDGE_RISE, /* VIPER_CPLD_GPIO */ | ||
| 717 | }; | ||
| 718 | |||
| 719 | static unsigned long viper_tpm; | ||
| 720 | |||
| 721 | static int __init viper_tpm_setup(char *str) | ||
| 722 | { | ||
| 723 | strict_strtoul(str, 10, &viper_tpm); | ||
| 724 | return 1; | ||
| 725 | } | ||
| 726 | |||
| 727 | __setup("tpm=", viper_tpm_setup); | ||
| 728 | |||
| 729 | static void __init viper_tpm_init(void) | ||
| 730 | { | ||
| 731 | struct platform_device *tpm_device; | ||
| 732 | struct i2c_gpio_platform_data i2c_tpm_data = { | ||
| 733 | .sda_pin = VIPER_TPM_I2C_SDA_GPIO, | ||
| 734 | .scl_pin = VIPER_TPM_I2C_SCL_GPIO, | ||
| 735 | .udelay = 10, | ||
| 736 | .timeout = 100, | ||
| 737 | }; | ||
| 738 | char *errstr; | ||
| 739 | |||
| 740 | /* Allocate TPM i2c bus if requested */ | ||
| 741 | if (!viper_tpm) | ||
| 742 | return; | ||
| 743 | |||
| 744 | tpm_device = platform_device_alloc("i2c-gpio", 2); | ||
| 745 | if (tpm_device) { | ||
| 746 | if (!platform_device_add_data(tpm_device, | ||
| 747 | &i2c_tpm_data, | ||
| 748 | sizeof(i2c_tpm_data))) { | ||
| 749 | if (platform_device_add(tpm_device)) { | ||
| 750 | errstr = "register TPM i2c bus"; | ||
| 751 | goto error_free_tpm; | ||
| 752 | } | ||
| 753 | } else { | ||
| 754 | errstr = "allocate TPM i2c bus data"; | ||
| 755 | goto error_free_tpm; | ||
| 756 | } | ||
| 757 | } else { | ||
| 758 | errstr = "allocate TPM i2c device"; | ||
| 759 | goto error_tpm; | ||
| 760 | } | ||
| 761 | |||
| 762 | return; | ||
| 763 | |||
| 764 | error_free_tpm: | ||
| 765 | kfree(tpm_device); | ||
| 766 | error_tpm: | ||
| 767 | pr_err("viper: Couldn't %s, giving up\n", errstr); | ||
| 768 | } | ||
| 769 | |||
| 770 | static void __init viper_init_vcore_gpios(void) | ||
| 771 | { | ||
| 772 | if (gpio_request(VIPER_PSU_DATA_GPIO, "PSU data")) | ||
| 773 | goto err_request_data; | ||
| 774 | |||
| 775 | if (gpio_request(VIPER_PSU_CLK_GPIO, "PSU clock")) | ||
| 776 | goto err_request_clk; | ||
| 777 | |||
| 778 | if (gpio_request(VIPER_PSU_nCS_LD_GPIO, "PSU cs")) | ||
| 779 | goto err_request_cs; | ||
| 780 | |||
| 781 | if (gpio_direction_output(VIPER_PSU_DATA_GPIO, 0) || | ||
| 782 | gpio_direction_output(VIPER_PSU_CLK_GPIO, 0) || | ||
| 783 | gpio_direction_output(VIPER_PSU_nCS_LD_GPIO, 0)) | ||
| 784 | goto err_dir; | ||
| 785 | |||
| 786 | /* c/should assume redboot set the correct level ??? */ | ||
| 787 | viper_set_core_cpu_voltage(get_clk_frequency_khz(0), 1); | ||
| 788 | |||
| 789 | return; | ||
| 790 | |||
| 791 | err_dir: | ||
| 792 | gpio_free(VIPER_PSU_nCS_LD_GPIO); | ||
| 793 | err_request_cs: | ||
| 794 | gpio_free(VIPER_PSU_CLK_GPIO); | ||
| 795 | err_request_clk: | ||
| 796 | gpio_free(VIPER_PSU_DATA_GPIO); | ||
| 797 | err_request_data: | ||
| 798 | pr_err("viper: Failed to setup vcore control GPIOs\n"); | ||
| 799 | } | ||
| 800 | |||
| 801 | static void __init viper_init_serial_gpio(void) | ||
| 802 | { | ||
| 803 | if (gpio_request(VIPER_UART_SHDN_GPIO, "UARTs shutdown")) | ||
| 804 | goto err_request; | ||
| 805 | |||
| 806 | if (gpio_direction_output(VIPER_UART_SHDN_GPIO, 0)) | ||
| 807 | goto err_dir; | ||
| 808 | |||
| 809 | return; | ||
| 810 | |||
| 811 | err_dir: | ||
| 812 | gpio_free(VIPER_UART_SHDN_GPIO); | ||
| 813 | err_request: | ||
| 814 | pr_err("viper: Failed to setup UART shutdown GPIO\n"); | ||
| 815 | } | ||
| 816 | |||
| 817 | #ifdef CONFIG_CPU_FREQ | ||
| 818 | static int viper_cpufreq_notifier(struct notifier_block *nb, | ||
| 819 | unsigned long val, void *data) | ||
| 820 | { | ||
| 821 | struct cpufreq_freqs *freq = data; | ||
| 822 | |||
| 823 | /* TODO: Adjust timings??? */ | ||
| 824 | |||
| 825 | switch (val) { | ||
| 826 | case CPUFREQ_PRECHANGE: | ||
| 827 | if (freq->old < freq->new) { | ||
| 828 | /* we are getting faster so raise the voltage | ||
| 829 | * before we change freq */ | ||
| 830 | viper_set_core_cpu_voltage(freq->new, 0); | ||
| 831 | } | ||
| 832 | break; | ||
| 833 | case CPUFREQ_POSTCHANGE: | ||
| 834 | if (freq->old > freq->new) { | ||
| 835 | /* we are slowing down so drop the power | ||
| 836 | * after we change freq */ | ||
| 837 | viper_set_core_cpu_voltage(freq->new, 0); | ||
| 838 | } | ||
| 839 | break; | ||
| 840 | case CPUFREQ_RESUMECHANGE: | ||
| 841 | viper_set_core_cpu_voltage(freq->new, 0); | ||
| 842 | break; | ||
| 843 | default: | ||
| 844 | /* ignore */ | ||
| 845 | break; | ||
| 846 | } | ||
| 847 | |||
| 848 | return 0; | ||
| 849 | } | ||
| 850 | |||
| 851 | static struct notifier_block viper_cpufreq_notifier_block = { | ||
| 852 | .notifier_call = viper_cpufreq_notifier | ||
| 853 | }; | ||
| 854 | |||
| 855 | static void __init viper_init_cpufreq(void) | ||
| 856 | { | ||
| 857 | if (cpufreq_register_notifier(&viper_cpufreq_notifier_block, | ||
| 858 | CPUFREQ_TRANSITION_NOTIFIER)) | ||
| 859 | pr_err("viper: Failed to setup cpufreq notifier\n"); | ||
| 860 | } | ||
| 861 | #else | ||
| 862 | static inline void viper_init_cpufreq(void) {} | ||
| 863 | #endif | ||
| 864 | |||
| 865 | static void viper_power_off(void) | ||
| 866 | { | ||
| 867 | pr_notice("Shutting off UPS\n"); | ||
| 868 | gpio_set_value(VIPER_UPS_GPIO, 1); | ||
| 869 | /* Spin to death... */ | ||
| 870 | while (1); | ||
| 871 | } | ||
| 872 | |||
| 873 | static void __init viper_init(void) | ||
| 874 | { | ||
| 875 | u8 version; | ||
| 876 | |||
| 877 | pm_power_off = viper_power_off; | ||
| 878 | |||
| 879 | pxa2xx_mfp_config(ARRAY_AND_SIZE(viper_pin_config)); | ||
| 880 | |||
| 881 | /* Wake-up serial console */ | ||
| 882 | viper_init_serial_gpio(); | ||
| 883 | |||
| 884 | set_pxa_fb_info(&fb_info); | ||
| 885 | |||
| 886 | /* v1 hardware cannot use the datacs line */ | ||
| 887 | version = viper_hw_version(); | ||
| 888 | if (version == 0) | ||
| 889 | smc91x_device.num_resources--; | ||
| 890 | |||
| 891 | pxa_set_i2c_info(NULL); | ||
| 892 | platform_add_devices(viper_devs, ARRAY_SIZE(viper_devs)); | ||
| 893 | |||
| 894 | viper_init_vcore_gpios(); | ||
| 895 | viper_init_cpufreq(); | ||
| 896 | |||
| 897 | sysdev_driver_register(&cpu_sysdev_class, &viper_cpu_sysdev_driver); | ||
| 898 | |||
| 899 | if (version) { | ||
| 900 | pr_info("viper: hardware v%di%d detected. " | ||
| 901 | "CPLD revision %d.\n", | ||
| 902 | VIPER_BOARD_VERSION(version), | ||
| 903 | VIPER_BOARD_ISSUE(version), | ||
| 904 | VIPER_CPLD_REVISION(version)); | ||
| 905 | system_rev = (VIPER_BOARD_VERSION(version) << 8) | | ||
| 906 | (VIPER_BOARD_ISSUE(version) << 4) | | ||
| 907 | VIPER_CPLD_REVISION(version); | ||
| 908 | } else { | ||
| 909 | pr_info("viper: No version register.\n"); | ||
| 910 | } | ||
| 911 | |||
| 912 | i2c_register_board_info(1, ARRAY_AND_SIZE(viper_i2c_devices)); | ||
| 913 | |||
| 914 | viper_tpm_init(); | ||
| 915 | pxa_set_ac97_info(NULL); | ||
| 916 | } | ||
| 917 | |||
| 918 | static struct map_desc viper_io_desc[] __initdata = { | ||
| 919 | { | ||
| 920 | .virtual = VIPER_CPLD_BASE, | ||
| 921 | .pfn = __phys_to_pfn(VIPER_CPLD_PHYS), | ||
| 922 | .length = 0x00300000, | ||
| 923 | .type = MT_DEVICE, | ||
| 924 | }, | ||
| 925 | { | ||
| 926 | .virtual = VIPER_PC104IO_BASE, | ||
| 927 | .pfn = __phys_to_pfn(_PCMCIA1IO), | ||
| 928 | .length = 0x00800000, | ||
| 929 | .type = MT_DEVICE, | ||
| 930 | }, | ||
| 931 | }; | ||
| 932 | |||
| 933 | static void __init viper_map_io(void) | ||
| 934 | { | ||
| 935 | pxa_map_io(); | ||
| 936 | |||
| 937 | iotable_init(viper_io_desc, ARRAY_SIZE(viper_io_desc)); | ||
| 938 | |||
| 939 | PCFR |= PCFR_OPDE; | ||
| 940 | } | ||
| 941 | |||
| 942 | MACHINE_START(VIPER, "Arcom/Eurotech VIPER SBC") | ||
| 943 | /* Maintainer: Marc Zyngier <maz@misterjones.org> */ | ||
| 944 | .phys_io = 0x40000000, | ||
| 945 | .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, | ||
| 946 | .boot_params = 0xa0000100, | ||
| 947 | .map_io = viper_map_io, | ||
| 948 | .init_irq = viper_init_irq, | ||
| 949 | .timer = &pxa_timer, | ||
| 950 | .init_machine = viper_init, | ||
| 951 | MACHINE_END | ||
diff --git a/arch/arm/mach-pxa/zylonite.c b/arch/arm/mach-pxa/zylonite.c index 0cb65b5772fe..813804433466 100644 --- a/arch/arm/mach-pxa/zylonite.c +++ b/arch/arm/mach-pxa/zylonite.c | |||
| @@ -29,6 +29,7 @@ | |||
| 29 | #include <mach/pxafb.h> | 29 | #include <mach/pxafb.h> |
| 30 | #include <mach/zylonite.h> | 30 | #include <mach/zylonite.h> |
| 31 | #include <mach/mmc.h> | 31 | #include <mach/mmc.h> |
| 32 | #include <mach/ohci.h> | ||
| 32 | #include <mach/pxa27x_keypad.h> | 33 | #include <mach/pxa27x_keypad.h> |
| 33 | #include <mach/pxa3xx_nand.h> | 34 | #include <mach/pxa3xx_nand.h> |
| 34 | 35 | ||
| @@ -423,6 +424,21 @@ static void __init zylonite_init_nand(void) | |||
| 423 | static inline void zylonite_init_nand(void) {} | 424 | static inline void zylonite_init_nand(void) {} |
| 424 | #endif /* CONFIG_MTD_NAND_PXA3xx || CONFIG_MTD_NAND_PXA3xx_MODULE */ | 425 | #endif /* CONFIG_MTD_NAND_PXA3xx || CONFIG_MTD_NAND_PXA3xx_MODULE */ |
| 425 | 426 | ||
| 427 | #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) | ||
| 428 | static struct pxaohci_platform_data zylonite_ohci_info = { | ||
| 429 | .port_mode = PMM_PERPORT_MODE, | ||
| 430 | .flags = ENABLE_PORT1 | ENABLE_PORT2 | | ||
| 431 | POWER_CONTROL_LOW | POWER_SENSE_LOW, | ||
| 432 | }; | ||
| 433 | |||
| 434 | static void __init zylonite_init_ohci(void) | ||
| 435 | { | ||
| 436 | pxa_set_ohci_info(&zylonite_ohci_info); | ||
| 437 | } | ||
| 438 | #else | ||
| 439 | static inline void zylonite_init_ohci(void) {} | ||
| 440 | #endif /* CONFIG_USB_OHCI_HCD || CONFIG_USB_OHCI_HCD_MODULE */ | ||
| 441 | |||
| 426 | static void __init zylonite_init(void) | 442 | static void __init zylonite_init(void) |
| 427 | { | 443 | { |
| 428 | /* board-processor specific initialization */ | 444 | /* board-processor specific initialization */ |
| @@ -443,6 +459,7 @@ static void __init zylonite_init(void) | |||
| 443 | zylonite_init_keypad(); | 459 | zylonite_init_keypad(); |
| 444 | zylonite_init_nand(); | 460 | zylonite_init_nand(); |
| 445 | zylonite_init_leds(); | 461 | zylonite_init_leds(); |
| 462 | zylonite_init_ohci(); | ||
| 446 | } | 463 | } |
| 447 | 464 | ||
| 448 | MACHINE_START(ZYLONITE, "PXA3xx Platform Development Kit (aka Zylonite)") | 465 | MACHINE_START(ZYLONITE, "PXA3xx Platform Development Kit (aka Zylonite)") |
diff --git a/arch/arm/mach-pxa/zylonite_pxa300.c b/arch/arm/mach-pxa/zylonite_pxa300.c index 095f5c648236..46538885a58a 100644 --- a/arch/arm/mach-pxa/zylonite_pxa300.c +++ b/arch/arm/mach-pxa/zylonite_pxa300.c | |||
| @@ -73,6 +73,12 @@ static mfp_cfg_t common_mfp_cfg[] __initdata = { | |||
| 73 | GPIO27_AC97_SDATA_OUT, | 73 | GPIO27_AC97_SDATA_OUT, |
| 74 | GPIO28_AC97_SYNC, | 74 | GPIO28_AC97_SYNC, |
| 75 | 75 | ||
| 76 | /* SSP3 */ | ||
| 77 | GPIO91_SSP3_SCLK, | ||
| 78 | GPIO92_SSP3_FRM, | ||
| 79 | GPIO93_SSP3_TXD, | ||
| 80 | GPIO94_SSP3_RXD, | ||
| 81 | |||
| 76 | /* WM9713 IRQ */ | 82 | /* WM9713 IRQ */ |
| 77 | GPIO26_GPIO, | 83 | GPIO26_GPIO, |
| 78 | 84 | ||
| @@ -113,6 +119,10 @@ static mfp_cfg_t common_mfp_cfg[] __initdata = { | |||
| 113 | GPIO13_MMC2_CLK, | 119 | GPIO13_MMC2_CLK, |
| 114 | GPIO14_MMC2_CMD, | 120 | GPIO14_MMC2_CMD, |
| 115 | 121 | ||
| 122 | /* USB Host */ | ||
| 123 | GPIO0_2_USBH_PEN, | ||
| 124 | GPIO1_2_USBH_PWR, | ||
| 125 | |||
| 116 | /* Standard I2C */ | 126 | /* Standard I2C */ |
| 117 | GPIO21_I2C_SCL, | 127 | GPIO21_I2C_SCL, |
| 118 | GPIO22_I2C_SDA, | 128 | GPIO22_I2C_SDA, |
| @@ -209,7 +219,7 @@ static struct pca953x_platform_data gpio_exp[] = { | |||
| 209 | }, | 219 | }, |
| 210 | }; | 220 | }; |
| 211 | 221 | ||
| 212 | struct i2c_board_info zylonite_i2c_board_info[] = { | 222 | static struct i2c_board_info zylonite_i2c_board_info[] = { |
| 213 | { | 223 | { |
| 214 | .type = "pca9539", | 224 | .type = "pca9539", |
| 215 | .addr = 0x74, | 225 | .addr = 0x74, |
diff --git a/arch/arm/mach-pxa/zylonite_pxa320.c b/arch/arm/mach-pxa/zylonite_pxa320.c index 9879d7da2df5..0f244744daae 100644 --- a/arch/arm/mach-pxa/zylonite_pxa320.c +++ b/arch/arm/mach-pxa/zylonite_pxa320.c | |||
| @@ -69,6 +69,12 @@ static mfp_cfg_t mfp_cfg[] __initdata = { | |||
| 69 | GPIO39_AC97_BITCLK, | 69 | GPIO39_AC97_BITCLK, |
| 70 | GPIO40_AC97_nACRESET, | 70 | GPIO40_AC97_nACRESET, |
| 71 | 71 | ||
| 72 | /* SSP3 */ | ||
| 73 | GPIO89_SSP3_SCLK, | ||
| 74 | GPIO90_SSP3_FRM, | ||
| 75 | GPIO91_SSP3_TXD, | ||
| 76 | GPIO92_SSP3_RXD, | ||
| 77 | |||
| 72 | /* WM9713 IRQ */ | 78 | /* WM9713 IRQ */ |
| 73 | GPIO15_GPIO, | 79 | GPIO15_GPIO, |
| 74 | 80 | ||
| @@ -117,6 +123,10 @@ static mfp_cfg_t mfp_cfg[] __initdata = { | |||
| 117 | GPIO28_MMC2_CLK, | 123 | GPIO28_MMC2_CLK, |
| 118 | GPIO29_MMC2_CMD, | 124 | GPIO29_MMC2_CMD, |
| 119 | 125 | ||
| 126 | /* USB Host */ | ||
| 127 | GPIO2_2_USBH_PEN, | ||
| 128 | GPIO3_2_USBH_PWR, | ||
| 129 | |||
| 120 | /* Debug LEDs */ | 130 | /* Debug LEDs */ |
| 121 | GPIO1_2_GPIO | MFP_LPM_DRIVE_HIGH, | 131 | GPIO1_2_GPIO | MFP_LPM_DRIVE_HIGH, |
| 122 | GPIO4_2_GPIO | MFP_LPM_DRIVE_HIGH, | 132 | GPIO4_2_GPIO | MFP_LPM_DRIVE_HIGH, |
diff --git a/arch/arm/mach-s3c2410/bast-irq.c b/arch/arm/mach-s3c2410/bast-irq.c index 604224a2d9a6..75738000272b 100644 --- a/arch/arm/mach-s3c2410/bast-irq.c +++ b/arch/arm/mach-s3c2410/bast-irq.c | |||
| @@ -130,8 +130,7 @@ bast_irq_pc104_demux(unsigned int irq, | |||
| 130 | for (i = 0; stat != 0; i++, stat >>= 1) { | 130 | for (i = 0; stat != 0; i++, stat >>= 1) { |
| 131 | if (stat & 1) { | 131 | if (stat & 1) { |
| 132 | irqno = bast_pc104_irqs[i]; | 132 | irqno = bast_pc104_irqs[i]; |
| 133 | desc = irq_desc + irqno; | 133 | generic_handle_irq(irqno); |
| 134 | desc_handle_irq(irqno, desc); | ||
| 135 | } | 134 | } |
| 136 | } | 135 | } |
| 137 | } | 136 | } |
diff --git a/arch/arm/mach-s3c2412/irq.c b/arch/arm/mach-s3c2412/irq.c index 1686950fa557..41720f2c1fea 100644 --- a/arch/arm/mach-s3c2412/irq.c +++ b/arch/arm/mach-s3c2412/irq.c | |||
| @@ -123,10 +123,10 @@ static void s3c2412_irq_demux_cfsdi(unsigned int irq, struct irq_desc *desc) | |||
| 123 | subsrc &= ~submsk; | 123 | subsrc &= ~submsk; |
| 124 | 124 | ||
| 125 | if (subsrc & INTBIT(IRQ_S3C2412_SDI)) | 125 | if (subsrc & INTBIT(IRQ_S3C2412_SDI)) |
| 126 | desc_handle_irq(IRQ_S3C2412_SDI, irq_desc + IRQ_S3C2412_SDI); | 126 | generic_handle_irq(IRQ_S3C2412_SDI); |
| 127 | 127 | ||
| 128 | if (subsrc & INTBIT(IRQ_S3C2412_CF)) | 128 | if (subsrc & INTBIT(IRQ_S3C2412_CF)) |
| 129 | desc_handle_irq(IRQ_S3C2412_CF, irq_desc + IRQ_S3C2412_CF); | 129 | generic_handle_irq(IRQ_S3C2412_CF); |
| 130 | } | 130 | } |
| 131 | 131 | ||
| 132 | #define INTMSK_CFSDI (1UL << (IRQ_S3C2412_CFSDI - IRQ_EINT0)) | 132 | #define INTMSK_CFSDI (1UL << (IRQ_S3C2412_CFSDI - IRQ_EINT0)) |
diff --git a/arch/arm/mach-s3c2440/irq.c b/arch/arm/mach-s3c2440/irq.c index 93fff75220cf..33e3ede0a2b3 100644 --- a/arch/arm/mach-s3c2440/irq.c +++ b/arch/arm/mach-s3c2440/irq.c | |||
| @@ -44,7 +44,6 @@ static void s3c_irq_demux_wdtac97(unsigned int irq, | |||
| 44 | struct irq_desc *desc) | 44 | struct irq_desc *desc) |
| 45 | { | 45 | { |
| 46 | unsigned int subsrc, submsk; | 46 | unsigned int subsrc, submsk; |
| 47 | struct irq_desc *mydesc; | ||
| 48 | 47 | ||
| 49 | /* read the current pending interrupts, and the mask | 48 | /* read the current pending interrupts, and the mask |
| 50 | * for what it is available */ | 49 | * for what it is available */ |
| @@ -58,12 +57,10 @@ static void s3c_irq_demux_wdtac97(unsigned int irq, | |||
| 58 | 57 | ||
| 59 | if (subsrc != 0) { | 58 | if (subsrc != 0) { |
| 60 | if (subsrc & 1) { | 59 | if (subsrc & 1) { |
| 61 | mydesc = irq_desc + IRQ_S3C2440_WDT; | 60 | generic_handle_irq(IRQ_S3C2440_WDT); |
| 62 | desc_handle_irq(IRQ_S3C2440_WDT, mydesc); | ||
| 63 | } | 61 | } |
| 64 | if (subsrc & 2) { | 62 | if (subsrc & 2) { |
| 65 | mydesc = irq_desc + IRQ_S3C2440_AC97; | 63 | generic_handle_irq(IRQ_S3C2440_AC97); |
| 66 | desc_handle_irq(IRQ_S3C2440_AC97, mydesc); | ||
| 67 | } | 64 | } |
| 68 | } | 65 | } |
| 69 | } | 66 | } |
diff --git a/arch/arm/mach-s3c2443/irq.c b/arch/arm/mach-s3c2443/irq.c index bd89c8361b3c..e44341d7dfef 100644 --- a/arch/arm/mach-s3c2443/irq.c +++ b/arch/arm/mach-s3c2443/irq.c | |||
| @@ -44,7 +44,6 @@ static inline void s3c2443_irq_demux(unsigned int irq, unsigned int len) | |||
| 44 | { | 44 | { |
| 45 | unsigned int subsrc, submsk; | 45 | unsigned int subsrc, submsk; |
| 46 | unsigned int end; | 46 | unsigned int end; |
| 47 | struct irq_desc *mydesc; | ||
| 48 | 47 | ||
| 49 | /* read the current pending interrupts, and the mask | 48 | /* read the current pending interrupts, and the mask |
| 50 | * for what it is available */ | 49 | * for what it is available */ |
| @@ -57,13 +56,11 @@ static inline void s3c2443_irq_demux(unsigned int irq, unsigned int len) | |||
| 57 | subsrc &= (1 << len)-1; | 56 | subsrc &= (1 << len)-1; |
| 58 | 57 | ||
| 59 | end = len + irq; | 58 | end = len + irq; |
| 60 | mydesc = irq_desc + irq; | ||
| 61 | 59 | ||
| 62 | for (; irq < end && subsrc; irq++) { | 60 | for (; irq < end && subsrc; irq++) { |
| 63 | if (subsrc & 1) | 61 | if (subsrc & 1) |
| 64 | desc_handle_irq(irq, mydesc); | 62 | generic_handle_irq(irq); |
| 65 | 63 | ||
| 66 | mydesc++; | ||
| 67 | subsrc >>= 1; | 64 | subsrc >>= 1; |
| 68 | } | 65 | } |
| 69 | } | 66 | } |
diff --git a/arch/arm/mach-sa1100/irq.c b/arch/arm/mach-sa1100/irq.c index 86369a8f0cea..3093d46a9c6f 100644 --- a/arch/arm/mach-sa1100/irq.c +++ b/arch/arm/mach-sa1100/irq.c | |||
| @@ -122,14 +122,12 @@ sa1100_high_gpio_handler(unsigned int irq, struct irq_desc *desc) | |||
| 122 | GEDR = mask; | 122 | GEDR = mask; |
| 123 | 123 | ||
| 124 | irq = IRQ_GPIO11; | 124 | irq = IRQ_GPIO11; |
| 125 | desc = irq_desc + irq; | ||
| 126 | mask >>= 11; | 125 | mask >>= 11; |
| 127 | do { | 126 | do { |
| 128 | if (mask & 1) | 127 | if (mask & 1) |
| 129 | desc_handle_irq(irq, desc); | 128 | generic_handle_irq(irq); |
| 130 | mask >>= 1; | 129 | mask >>= 1; |
| 131 | irq++; | 130 | irq++; |
| 132 | desc++; | ||
| 133 | } while (mask); | 131 | } while (mask); |
| 134 | 132 | ||
| 135 | mask = GEDR & 0xfffff800; | 133 | mask = GEDR & 0xfffff800; |
diff --git a/arch/arm/mach-sa1100/neponset.c b/arch/arm/mach-sa1100/neponset.c index 4856a6bd2482..6ccd175bc4cf 100644 --- a/arch/arm/mach-sa1100/neponset.c +++ b/arch/arm/mach-sa1100/neponset.c | |||
| @@ -33,8 +33,6 @@ neponset_irq_handler(unsigned int irq, struct irq_desc *desc) | |||
| 33 | unsigned int irr; | 33 | unsigned int irr; |
| 34 | 34 | ||
| 35 | while (1) { | 35 | while (1) { |
| 36 | struct irq_desc *d; | ||
| 37 | |||
| 38 | /* | 36 | /* |
| 39 | * Acknowledge the parent IRQ. | 37 | * Acknowledge the parent IRQ. |
| 40 | */ | 38 | */ |
| @@ -67,21 +65,18 @@ neponset_irq_handler(unsigned int irq, struct irq_desc *desc) | |||
| 67 | desc->chip->ack(irq); | 65 | desc->chip->ack(irq); |
| 68 | 66 | ||
| 69 | if (irr & IRR_ETHERNET) { | 67 | if (irr & IRR_ETHERNET) { |
| 70 | d = irq_desc + IRQ_NEPONSET_SMC9196; | 68 | generic_handle_irq(IRQ_NEPONSET_SMC9196); |
| 71 | desc_handle_irq(IRQ_NEPONSET_SMC9196, d); | ||
| 72 | } | 69 | } |
| 73 | 70 | ||
| 74 | if (irr & IRR_USAR) { | 71 | if (irr & IRR_USAR) { |
| 75 | d = irq_desc + IRQ_NEPONSET_USAR; | 72 | generic_handle_irq(IRQ_NEPONSET_USAR); |
| 76 | desc_handle_irq(IRQ_NEPONSET_USAR, d); | ||
| 77 | } | 73 | } |
| 78 | 74 | ||
| 79 | desc->chip->unmask(irq); | 75 | desc->chip->unmask(irq); |
| 80 | } | 76 | } |
| 81 | 77 | ||
| 82 | if (irr & IRR_SA1111) { | 78 | if (irr & IRR_SA1111) { |
| 83 | d = irq_desc + IRQ_NEPONSET_SA1111; | 79 | generic_handle_irq(IRQ_NEPONSET_SA1111); |
| 84 | desc_handle_irq(IRQ_NEPONSET_SA1111, d); | ||
| 85 | } | 80 | } |
| 86 | } | 81 | } |
| 87 | } | 82 | } |
diff --git a/arch/arm/mach-versatile/core.c b/arch/arm/mach-versatile/core.c index 534f93282177..824121d52b8d 100644 --- a/arch/arm/mach-versatile/core.c +++ b/arch/arm/mach-versatile/core.c | |||
| @@ -95,8 +95,7 @@ sic_handle_irq(unsigned int irq, struct irq_desc *desc) | |||
| 95 | 95 | ||
| 96 | irq += IRQ_SIC_START; | 96 | irq += IRQ_SIC_START; |
| 97 | 97 | ||
| 98 | desc = irq_desc + irq; | 98 | generic_handle_irq(irq); |
| 99 | desc_handle_irq(irq, desc); | ||
| 100 | } while (status); | 99 | } while (status); |
| 101 | } | 100 | } |
| 102 | 101 | ||
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c index 5764bce98cf3..5935ae4e550b 100644 --- a/arch/arm/plat-omap/gpio.c +++ b/arch/arm/plat-omap/gpio.c | |||
| @@ -1050,13 +1050,10 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc) | |||
| 1050 | 1050 | ||
| 1051 | gpio_irq = bank->virtual_irq_start; | 1051 | gpio_irq = bank->virtual_irq_start; |
| 1052 | for (; isr != 0; isr >>= 1, gpio_irq++) { | 1052 | for (; isr != 0; isr >>= 1, gpio_irq++) { |
| 1053 | struct irq_desc *d; | ||
| 1054 | |||
| 1055 | if (!(isr & 1)) | 1053 | if (!(isr & 1)) |
| 1056 | continue; | 1054 | continue; |
| 1057 | d = irq_desc + gpio_irq; | ||
| 1058 | 1055 | ||
| 1059 | desc_handle_irq(gpio_irq, d); | 1056 | generic_handle_irq(gpio_irq); |
| 1060 | } | 1057 | } |
| 1061 | } | 1058 | } |
| 1062 | /* if bank has any level sensitive GPIO pin interrupt | 1059 | /* if bank has any level sensitive GPIO pin interrupt |
diff --git a/arch/arm/plat-s3c24xx/irq.c b/arch/arm/plat-s3c24xx/irq.c index fa70d34eb4a5..590fc5a3ab06 100644 --- a/arch/arm/plat-s3c24xx/irq.c +++ b/arch/arm/plat-s3c24xx/irq.c | |||
| @@ -468,7 +468,6 @@ static void s3c_irq_demux_adc(unsigned int irq, | |||
| 468 | { | 468 | { |
| 469 | unsigned int subsrc, submsk; | 469 | unsigned int subsrc, submsk; |
| 470 | unsigned int offset = 9; | 470 | unsigned int offset = 9; |
| 471 | struct irq_desc *mydesc; | ||
| 472 | 471 | ||
| 473 | /* read the current pending interrupts, and the mask | 472 | /* read the current pending interrupts, and the mask |
| 474 | * for what it is available */ | 473 | * for what it is available */ |
| @@ -482,12 +481,10 @@ static void s3c_irq_demux_adc(unsigned int irq, | |||
| 482 | 481 | ||
| 483 | if (subsrc != 0) { | 482 | if (subsrc != 0) { |
| 484 | if (subsrc & 1) { | 483 | if (subsrc & 1) { |
| 485 | mydesc = irq_desc + IRQ_TC; | 484 | generic_handle_irq(IRQ_TC); |
| 486 | desc_handle_irq(IRQ_TC, mydesc); | ||
| 487 | } | 485 | } |
| 488 | if (subsrc & 2) { | 486 | if (subsrc & 2) { |
| 489 | mydesc = irq_desc + IRQ_ADC; | 487 | generic_handle_irq(IRQ_ADC); |
| 490 | desc_handle_irq(IRQ_ADC, mydesc); | ||
| 491 | } | 488 | } |
| 492 | } | 489 | } |
| 493 | } | 490 | } |
| @@ -496,7 +493,6 @@ static void s3c_irq_demux_uart(unsigned int start) | |||
| 496 | { | 493 | { |
| 497 | unsigned int subsrc, submsk; | 494 | unsigned int subsrc, submsk; |
| 498 | unsigned int offset = start - IRQ_S3CUART_RX0; | 495 | unsigned int offset = start - IRQ_S3CUART_RX0; |
| 499 | struct irq_desc *desc; | ||
| 500 | 496 | ||
| 501 | /* read the current pending interrupts, and the mask | 497 | /* read the current pending interrupts, and the mask |
| 502 | * for what it is available */ | 498 | * for what it is available */ |
| @@ -512,20 +508,14 @@ static void s3c_irq_demux_uart(unsigned int start) | |||
| 512 | subsrc &= 7; | 508 | subsrc &= 7; |
| 513 | 509 | ||
| 514 | if (subsrc != 0) { | 510 | if (subsrc != 0) { |
| 515 | desc = irq_desc + start; | ||
| 516 | |||
| 517 | if (subsrc & 1) | 511 | if (subsrc & 1) |
| 518 | desc_handle_irq(start, desc); | 512 | generic_handle_irq(start); |
| 519 | |||
| 520 | desc++; | ||
| 521 | 513 | ||
| 522 | if (subsrc & 2) | 514 | if (subsrc & 2) |
| 523 | desc_handle_irq(start+1, desc); | 515 | generic_handle_irq(start+1); |
| 524 | |||
| 525 | desc++; | ||
| 526 | 516 | ||
| 527 | if (subsrc & 4) | 517 | if (subsrc & 4) |
| 528 | desc_handle_irq(start+2, desc); | 518 | generic_handle_irq(start+2); |
| 529 | } | 519 | } |
| 530 | } | 520 | } |
| 531 | 521 | ||
| @@ -572,7 +562,7 @@ s3c_irq_demux_extint8(unsigned int irq, | |||
| 572 | eintpnd &= ~(1<<irq); | 562 | eintpnd &= ~(1<<irq); |
| 573 | 563 | ||
| 574 | irq += (IRQ_EINT4 - 4); | 564 | irq += (IRQ_EINT4 - 4); |
| 575 | desc_handle_irq(irq, irq_desc + irq); | 565 | generic_handle_irq(irq); |
| 576 | } | 566 | } |
| 577 | 567 | ||
| 578 | } | 568 | } |
| @@ -595,7 +585,7 @@ s3c_irq_demux_extint4t7(unsigned int irq, | |||
| 595 | 585 | ||
| 596 | irq += (IRQ_EINT4 - 4); | 586 | irq += (IRQ_EINT4 - 4); |
| 597 | 587 | ||
| 598 | desc_handle_irq(irq, irq_desc + irq); | 588 | generic_handle_irq(irq); |
| 599 | } | 589 | } |
| 600 | } | 590 | } |
| 601 | 591 | ||
diff --git a/arch/arm/plat-s3c24xx/s3c244x-irq.c b/arch/arm/plat-s3c24xx/s3c244x-irq.c index 13bc655e1b6e..0601c5f3230b 100644 --- a/arch/arm/plat-s3c24xx/s3c244x-irq.c +++ b/arch/arm/plat-s3c24xx/s3c244x-irq.c | |||
| @@ -44,7 +44,6 @@ static void s3c_irq_demux_cam(unsigned int irq, | |||
| 44 | struct irq_desc *desc) | 44 | struct irq_desc *desc) |
| 45 | { | 45 | { |
| 46 | unsigned int subsrc, submsk; | 46 | unsigned int subsrc, submsk; |
| 47 | struct irq_desc *mydesc; | ||
| 48 | 47 | ||
| 49 | /* read the current pending interrupts, and the mask | 48 | /* read the current pending interrupts, and the mask |
| 50 | * for what it is available */ | 49 | * for what it is available */ |
| @@ -58,12 +57,10 @@ static void s3c_irq_demux_cam(unsigned int irq, | |||
| 58 | 57 | ||
| 59 | if (subsrc != 0) { | 58 | if (subsrc != 0) { |
| 60 | if (subsrc & 1) { | 59 | if (subsrc & 1) { |
| 61 | mydesc = irq_desc + IRQ_S3C2440_CAM_C; | 60 | generic_handle_irq(IRQ_S3C2440_CAM_C); |
| 62 | desc_handle_irq(IRQ_S3C2440_CAM_C, mydesc); | ||
| 63 | } | 61 | } |
| 64 | if (subsrc & 2) { | 62 | if (subsrc & 2) { |
| 65 | mydesc = irq_desc + IRQ_S3C2440_CAM_P; | 63 | generic_handle_irq(IRQ_S3C2440_CAM_P); |
| 66 | desc_handle_irq(IRQ_S3C2440_CAM_P, mydesc); | ||
| 67 | } | 64 | } |
| 68 | } | 65 | } |
| 69 | } | 66 | } |