aboutsummaryrefslogtreecommitdiffstats
path: root/arch
diff options
context:
space:
mode:
authorLinus Torvalds <torvalds@g5.osdl.org>2006-07-04 00:30:03 -0400
committerLinus Torvalds <torvalds@g5.osdl.org>2006-07-04 00:30:03 -0400
commit060ec6f2fb3c8abb85927758de8ac5d1018e6a43 (patch)
tree14d451f638805a4db17d6cf38d5003220b1314df /arch
parent0d1782144e81faf6203075c5fcd0a2f0db91af5b (diff)
parent0f1482fdd7e5efc473335b92f350027b8f1519fb (diff)
Merge master.kernel.org:/home/rmk/linux-2.6-arm
* master.kernel.org:/home/rmk/linux-2.6-arm: [ARM] Fix lh7a40x_udc.c [ARM] Fix warning in consistent.c [ARM] Fix warnings in arch/arm/kernel/setup.c [ARM] Fix ecard.c resource warnings. [ARM] Fix ISA IRQ resources [ARM] Fix bad asm instruction in proc-arm925.S [ARM] More missing proc-macros.S includes [ARM] 3708/2: fix SMP build after section ioremap changes
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/kernel/ecard.c2
-rw-r--r--arch/arm/kernel/setup.c2
-rw-r--r--arch/arm/mach-footbridge/isa-irq.c19
-rw-r--r--arch/arm/mm/ioremap.c5
-rw-r--r--arch/arm/mm/proc-arm1020.S2
-rw-r--r--arch/arm/mm/proc-arm1020e.S2
-rw-r--r--arch/arm/mm/proc-arm1022.S2
-rw-r--r--arch/arm/mm/proc-arm1026.S2
-rw-r--r--arch/arm/mm/proc-arm925.S3
9 files changed, 31 insertions, 8 deletions
diff --git a/arch/arm/kernel/ecard.c b/arch/arm/kernel/ecard.c
index ab4ad9562eee..b9a74a741d00 100644
--- a/arch/arm/kernel/ecard.c
+++ b/arch/arm/kernel/ecard.c
@@ -883,7 +883,7 @@ static ssize_t ecard_show_resources(struct device *dev, struct device_attribute
883 int i; 883 int i;
884 884
885 for (i = 0; i < ECARD_NUM_RESOURCES; i++) 885 for (i = 0; i < ECARD_NUM_RESOURCES; i++)
886 str += sprintf(str, "%08lx %08lx %08lx\n", 886 str += sprintf(str, "%08x %08x %08lx\n",
887 ec->resource[i].start, 887 ec->resource[i].start,
888 ec->resource[i].end, 888 ec->resource[i].end,
889 ec->resource[i].flags); 889 ec->resource[i].flags);
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
index 7d6a516c0b9f..ed1c4d62d999 100644
--- a/arch/arm/kernel/setup.c
+++ b/arch/arm/kernel/setup.c
@@ -344,7 +344,7 @@ static void __init setup_processor(void)
344 cpu_cache = *list->cache; 344 cpu_cache = *list->cache;
345#endif 345#endif
346 346
347 printk("CPU: %s [%08x] revision %d (ARMv%s), cr=%08x\n", 347 printk("CPU: %s [%08x] revision %d (ARMv%s), cr=%08lx\n",
348 cpu_name, processor_id, (int)processor_id & 15, 348 cpu_name, processor_id, (int)processor_id & 15,
349 proc_arch[cpu_architecture()], cr_alignment); 349 proc_arch[cpu_architecture()], cr_alignment);
350 350
diff --git a/arch/arm/mach-footbridge/isa-irq.c b/arch/arm/mach-footbridge/isa-irq.c
index e1c43b331d64..87448c2d6baa 100644
--- a/arch/arm/mach-footbridge/isa-irq.c
+++ b/arch/arm/mach-footbridge/isa-irq.c
@@ -98,9 +98,22 @@ isa_irq_handler(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs)
98 desc_handle_irq(isa_irq, desc, regs); 98 desc_handle_irq(isa_irq, desc, regs);
99} 99}
100 100
101static struct irqaction irq_cascade = { .handler = no_action, .name = "cascade", }; 101static struct irqaction irq_cascade = {
102static struct resource pic1_resource = { "pic1", 0x20, 0x3f }; 102 .handler = no_action,
103static struct resource pic2_resource = { "pic2", 0xa0, 0xbf }; 103 .name = "cascade",
104};
105
106static struct resource pic1_resource = {
107 .name = "pic1",
108 .start = 0x20,
109 .end = 0x3f,
110};
111
112static struct resource pic2_resource = {
113 .name = "pic2",
114 .start = 0xa0,
115 .end = 0xbf,
116};
104 117
105void __init isa_init_irq(unsigned int host_irq) 118void __init isa_init_irq(unsigned int host_irq)
106{ 119{
diff --git a/arch/arm/mm/ioremap.c b/arch/arm/mm/ioremap.c
index 7eac87f05180..dba7dddfe57d 100644
--- a/arch/arm/mm/ioremap.c
+++ b/arch/arm/mm/ioremap.c
@@ -303,7 +303,6 @@ __ioremap_pfn(unsigned long pfn, unsigned long offset, size_t size,
303 int err; 303 int err;
304 unsigned long addr; 304 unsigned long addr;
305 struct vm_struct * area; 305 struct vm_struct * area;
306 unsigned int cr = get_cr();
307 306
308 /* 307 /*
309 * High mappings must be supersection aligned 308 * High mappings must be supersection aligned
@@ -317,7 +316,7 @@ __ioremap_pfn(unsigned long pfn, unsigned long offset, size_t size,
317 addr = (unsigned long)area->addr; 316 addr = (unsigned long)area->addr;
318 317
319#ifndef CONFIG_SMP 318#ifndef CONFIG_SMP
320 if ((((cpu_architecture() >= CPU_ARCH_ARMv6) && (cr & CR_XP)) || 319 if ((((cpu_architecture() >= CPU_ARCH_ARMv6) && (get_cr() & CR_XP)) ||
321 cpu_is_xsc3()) && 320 cpu_is_xsc3()) &&
322 !((__pfn_to_phys(pfn) | size | addr) & ~SUPERSECTION_MASK)) { 321 !((__pfn_to_phys(pfn) | size | addr) & ~SUPERSECTION_MASK)) {
323 area->flags |= VM_ARM_SECTION_MAPPING; 322 area->flags |= VM_ARM_SECTION_MAPPING;
@@ -369,6 +368,7 @@ void __iounmap(void __iomem *addr)
369 368
370 addr = (void __iomem *)(PAGE_MASK & (unsigned long)addr); 369 addr = (void __iomem *)(PAGE_MASK & (unsigned long)addr);
371 370
371#ifndef CONFIG_SMP
372 /* 372 /*
373 * If this is a section based mapping we need to handle it 373 * If this is a section based mapping we need to handle it
374 * specially as the VM subysystem does not know how to handle 374 * specially as the VM subysystem does not know how to handle
@@ -390,6 +390,7 @@ void __iounmap(void __iomem *addr)
390 } 390 }
391 } 391 }
392 write_unlock(&vmlist_lock); 392 write_unlock(&vmlist_lock);
393#endif
393 394
394 if (!section_mapping) 395 if (!section_mapping)
395 vunmap(addr); 396 vunmap(addr);
diff --git a/arch/arm/mm/proc-arm1020.S b/arch/arm/mm/proc-arm1020.S
index 700297ae4a55..1d8316f3cecf 100644
--- a/arch/arm/mm/proc-arm1020.S
+++ b/arch/arm/mm/proc-arm1020.S
@@ -34,6 +34,8 @@
34#include <asm/procinfo.h> 34#include <asm/procinfo.h>
35#include <asm/ptrace.h> 35#include <asm/ptrace.h>
36 36
37#include "proc-macros.S"
38
37/* 39/*
38 * This is the maximum size of an area which will be invalidated 40 * This is the maximum size of an area which will be invalidated
39 * using the single invalidate entry instructions. Anything larger 41 * using the single invalidate entry instructions. Anything larger
diff --git a/arch/arm/mm/proc-arm1020e.S b/arch/arm/mm/proc-arm1020e.S
index 0c33a5ed5a61..89b1d6d3d7c0 100644
--- a/arch/arm/mm/proc-arm1020e.S
+++ b/arch/arm/mm/proc-arm1020e.S
@@ -34,6 +34,8 @@
34#include <asm/procinfo.h> 34#include <asm/procinfo.h>
35#include <asm/ptrace.h> 35#include <asm/ptrace.h>
36 36
37#include "proc-macros.S"
38
37/* 39/*
38 * This is the maximum size of an area which will be invalidated 40 * This is the maximum size of an area which will be invalidated
39 * using the single invalidate entry instructions. Anything larger 41 * using the single invalidate entry instructions. Anything larger
diff --git a/arch/arm/mm/proc-arm1022.S b/arch/arm/mm/proc-arm1022.S
index 566a55653072..a089528e6bce 100644
--- a/arch/arm/mm/proc-arm1022.S
+++ b/arch/arm/mm/proc-arm1022.S
@@ -23,6 +23,8 @@
23#include <asm/procinfo.h> 23#include <asm/procinfo.h>
24#include <asm/ptrace.h> 24#include <asm/ptrace.h>
25 25
26#include "proc-macros.S"
27
26/* 28/*
27 * This is the maximum size of an area which will be invalidated 29 * This is the maximum size of an area which will be invalidated
28 * using the single invalidate entry instructions. Anything larger 30 * using the single invalidate entry instructions. Anything larger
diff --git a/arch/arm/mm/proc-arm1026.S b/arch/arm/mm/proc-arm1026.S
index 6ea76321d0df..d6d84d92c7c7 100644
--- a/arch/arm/mm/proc-arm1026.S
+++ b/arch/arm/mm/proc-arm1026.S
@@ -23,6 +23,8 @@
23#include <asm/procinfo.h> 23#include <asm/procinfo.h>
24#include <asm/ptrace.h> 24#include <asm/ptrace.h>
25 25
26#include "proc-macros.S"
27
26/* 28/*
27 * This is the maximum size of an area which will be invalidated 29 * This is the maximum size of an area which will be invalidated
28 * using the single invalidate entry instructions. Anything larger 30 * using the single invalidate entry instructions. Anything larger
diff --git a/arch/arm/mm/proc-arm925.S b/arch/arm/mm/proc-arm925.S
index ad15f8503d51..8d9a9f93b011 100644
--- a/arch/arm/mm/proc-arm925.S
+++ b/arch/arm/mm/proc-arm925.S
@@ -454,7 +454,8 @@ __arm925_setup:
454 mcr p15, 7, r0, c15, c0, 0 454 mcr p15, 7, r0, c15, c0, 0
455#endif 455#endif
456 456
457 adr r5, {r5, r6} 457 adr r5, arm925_crval
458 ldmia r5, {r5, r6}
458 mrc p15, 0, r0, c1, c0 @ get control register v4 459 mrc p15, 0, r0, c1, c0 @ get control register v4
459 bic r0, r0, r5 460 bic r0, r0, r5
460 orr r0, r0, r6 461 orr r0, r0, r6