diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2008-09-08 18:50:19 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2008-09-08 18:50:19 -0400 |
commit | 4ced08b89f591521c3d2e3e87ab914016e6b7d94 (patch) | |
tree | ba5850b531db27d4fb8960b17bf7ddce0f5749d7 /arch | |
parent | e1d7bf14999469b16e86889ac71c94a9d0d2f5f4 (diff) | |
parent | 1ad77a876da48331451698cc4172c90ab9b6372f (diff) |
Merge master.kernel.org:/home/rmk/linux-2.6-arm
* master.kernel.org:/home/rmk/linux-2.6-arm:
[ARM] 5241/1: provide ioremap_wc()
[ARM] omap: fix virtual vs physical address space confusions
[ARM] remove unused #include <version.h>
[ARM] omap: fix build error in ohci-omap.c
[ARM] omap: fix gpio.c build error
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/include/asm/io.h | 5 | ||||
-rw-r--r-- | arch/arm/include/asm/mach/map.h | 14 | ||||
-rw-r--r-- | arch/arm/mach-omap1/mcbsp.c | 8 | ||||
-rw-r--r-- | arch/arm/mach-omap2/mcbsp.c | 4 | ||||
-rw-r--r-- | arch/arm/mm/mmu.c | 20 | ||||
-rw-r--r-- | arch/arm/plat-mxc/clock.c | 1 | ||||
-rw-r--r-- | arch/arm/plat-omap/gpio.c | 2 | ||||
-rw-r--r-- | arch/arm/plat-omap/include/mach/mcbsp.h | 2 | ||||
-rw-r--r-- | arch/arm/plat-omap/mcbsp.c | 5 |
9 files changed, 49 insertions, 12 deletions
diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h index 94a95d7fafd6..71934856fc22 100644 --- a/arch/arm/include/asm/io.h +++ b/arch/arm/include/asm/io.h | |||
@@ -61,8 +61,9 @@ extern void __raw_readsl(const void __iomem *addr, void *data, int longlen); | |||
61 | #define MT_DEVICE_NONSHARED 1 | 61 | #define MT_DEVICE_NONSHARED 1 |
62 | #define MT_DEVICE_CACHED 2 | 62 | #define MT_DEVICE_CACHED 2 |
63 | #define MT_DEVICE_IXP2000 3 | 63 | #define MT_DEVICE_IXP2000 3 |
64 | #define MT_DEVICE_WC 4 | ||
64 | /* | 65 | /* |
65 | * types 4 onwards can be found in asm/mach/map.h and are undefined | 66 | * types 5 onwards can be found in asm/mach/map.h and are undefined |
66 | * for ioremap | 67 | * for ioremap |
67 | */ | 68 | */ |
68 | 69 | ||
@@ -215,11 +216,13 @@ extern void _memset_io(volatile void __iomem *, int, size_t); | |||
215 | #define ioremap(cookie,size) __arm_ioremap(cookie, size, MT_DEVICE) | 216 | #define ioremap(cookie,size) __arm_ioremap(cookie, size, MT_DEVICE) |
216 | #define ioremap_nocache(cookie,size) __arm_ioremap(cookie, size, MT_DEVICE) | 217 | #define ioremap_nocache(cookie,size) __arm_ioremap(cookie, size, MT_DEVICE) |
217 | #define ioremap_cached(cookie,size) __arm_ioremap(cookie, size, MT_DEVICE_CACHED) | 218 | #define ioremap_cached(cookie,size) __arm_ioremap(cookie, size, MT_DEVICE_CACHED) |
219 | #define ioremap_wc(cookie,size) __arm_ioremap(cookie, size, MT_DEVICE_WC) | ||
218 | #define iounmap(cookie) __iounmap(cookie) | 220 | #define iounmap(cookie) __iounmap(cookie) |
219 | #else | 221 | #else |
220 | #define ioremap(cookie,size) __arch_ioremap((cookie), (size), MT_DEVICE) | 222 | #define ioremap(cookie,size) __arch_ioremap((cookie), (size), MT_DEVICE) |
221 | #define ioremap_nocache(cookie,size) __arch_ioremap((cookie), (size), MT_DEVICE) | 223 | #define ioremap_nocache(cookie,size) __arch_ioremap((cookie), (size), MT_DEVICE) |
222 | #define ioremap_cached(cookie,size) __arch_ioremap((cookie), (size), MT_DEVICE_CACHED) | 224 | #define ioremap_cached(cookie,size) __arch_ioremap((cookie), (size), MT_DEVICE_CACHED) |
225 | #define ioremap_wc(cookie,size) __arch_ioremap((cookie), (size), MT_DEVICE_WC) | ||
223 | #define iounmap(cookie) __arch_iounmap(cookie) | 226 | #define iounmap(cookie) __arch_iounmap(cookie) |
224 | #endif | 227 | #endif |
225 | 228 | ||
diff --git a/arch/arm/include/asm/mach/map.h b/arch/arm/include/asm/mach/map.h index 06f583b13999..9eb936e49cc3 100644 --- a/arch/arm/include/asm/mach/map.h +++ b/arch/arm/include/asm/mach/map.h | |||
@@ -18,13 +18,13 @@ struct map_desc { | |||
18 | unsigned int type; | 18 | unsigned int type; |
19 | }; | 19 | }; |
20 | 20 | ||
21 | /* types 0-3 are defined in asm/io.h */ | 21 | /* types 0-4 are defined in asm/io.h */ |
22 | #define MT_CACHECLEAN 4 | 22 | #define MT_CACHECLEAN 5 |
23 | #define MT_MINICLEAN 5 | 23 | #define MT_MINICLEAN 6 |
24 | #define MT_LOW_VECTORS 6 | 24 | #define MT_LOW_VECTORS 7 |
25 | #define MT_HIGH_VECTORS 7 | 25 | #define MT_HIGH_VECTORS 8 |
26 | #define MT_MEMORY 8 | 26 | #define MT_MEMORY 9 |
27 | #define MT_ROM 9 | 27 | #define MT_ROM 10 |
28 | 28 | ||
29 | #define MT_NONSHARED_DEVICE MT_DEVICE_NONSHARED | 29 | #define MT_NONSHARED_DEVICE MT_DEVICE_NONSHARED |
30 | #define MT_IXP2000_DEVICE MT_DEVICE_IXP2000 | 30 | #define MT_IXP2000_DEVICE MT_DEVICE_IXP2000 |
diff --git a/arch/arm/mach-omap1/mcbsp.c b/arch/arm/mach-omap1/mcbsp.c index 826010d5d014..2baeaeb0c900 100644 --- a/arch/arm/mach-omap1/mcbsp.c +++ b/arch/arm/mach-omap1/mcbsp.c | |||
@@ -159,6 +159,7 @@ static struct omap_mcbsp_ops omap1_mcbsp_ops = { | |||
159 | #ifdef CONFIG_ARCH_OMAP730 | 159 | #ifdef CONFIG_ARCH_OMAP730 |
160 | static struct omap_mcbsp_platform_data omap730_mcbsp_pdata[] = { | 160 | static struct omap_mcbsp_platform_data omap730_mcbsp_pdata[] = { |
161 | { | 161 | { |
162 | .phys_base = OMAP730_MCBSP1_BASE, | ||
162 | .virt_base = io_p2v(OMAP730_MCBSP1_BASE), | 163 | .virt_base = io_p2v(OMAP730_MCBSP1_BASE), |
163 | .dma_rx_sync = OMAP_DMA_MCBSP1_RX, | 164 | .dma_rx_sync = OMAP_DMA_MCBSP1_RX, |
164 | .dma_tx_sync = OMAP_DMA_MCBSP1_TX, | 165 | .dma_tx_sync = OMAP_DMA_MCBSP1_TX, |
@@ -167,6 +168,7 @@ static struct omap_mcbsp_platform_data omap730_mcbsp_pdata[] = { | |||
167 | .ops = &omap1_mcbsp_ops, | 168 | .ops = &omap1_mcbsp_ops, |
168 | }, | 169 | }, |
169 | { | 170 | { |
171 | .phys_base = OMAP730_MCBSP2_BASE, | ||
170 | .virt_base = io_p2v(OMAP730_MCBSP2_BASE), | 172 | .virt_base = io_p2v(OMAP730_MCBSP2_BASE), |
171 | .dma_rx_sync = OMAP_DMA_MCBSP3_RX, | 173 | .dma_rx_sync = OMAP_DMA_MCBSP3_RX, |
172 | .dma_tx_sync = OMAP_DMA_MCBSP3_TX, | 174 | .dma_tx_sync = OMAP_DMA_MCBSP3_TX, |
@@ -184,6 +186,7 @@ static struct omap_mcbsp_platform_data omap730_mcbsp_pdata[] = { | |||
184 | #ifdef CONFIG_ARCH_OMAP15XX | 186 | #ifdef CONFIG_ARCH_OMAP15XX |
185 | static struct omap_mcbsp_platform_data omap15xx_mcbsp_pdata[] = { | 187 | static struct omap_mcbsp_platform_data omap15xx_mcbsp_pdata[] = { |
186 | { | 188 | { |
189 | .phys_base = OMAP1510_MCBSP1_BASE, | ||
187 | .virt_base = OMAP1510_MCBSP1_BASE, | 190 | .virt_base = OMAP1510_MCBSP1_BASE, |
188 | .dma_rx_sync = OMAP_DMA_MCBSP1_RX, | 191 | .dma_rx_sync = OMAP_DMA_MCBSP1_RX, |
189 | .dma_tx_sync = OMAP_DMA_MCBSP1_TX, | 192 | .dma_tx_sync = OMAP_DMA_MCBSP1_TX, |
@@ -193,6 +196,7 @@ static struct omap_mcbsp_platform_data omap15xx_mcbsp_pdata[] = { | |||
193 | .clk_name = "mcbsp_clk", | 196 | .clk_name = "mcbsp_clk", |
194 | }, | 197 | }, |
195 | { | 198 | { |
199 | .phys_base = OMAP1510_MCBSP2_BASE, | ||
196 | .virt_base = io_p2v(OMAP1510_MCBSP2_BASE), | 200 | .virt_base = io_p2v(OMAP1510_MCBSP2_BASE), |
197 | .dma_rx_sync = OMAP_DMA_MCBSP2_RX, | 201 | .dma_rx_sync = OMAP_DMA_MCBSP2_RX, |
198 | .dma_tx_sync = OMAP_DMA_MCBSP2_TX, | 202 | .dma_tx_sync = OMAP_DMA_MCBSP2_TX, |
@@ -201,6 +205,7 @@ static struct omap_mcbsp_platform_data omap15xx_mcbsp_pdata[] = { | |||
201 | .ops = &omap1_mcbsp_ops, | 205 | .ops = &omap1_mcbsp_ops, |
202 | }, | 206 | }, |
203 | { | 207 | { |
208 | .phys_base = OMAP1510_MCBSP3_BASE, | ||
204 | .virt_base = OMAP1510_MCBSP3_BASE, | 209 | .virt_base = OMAP1510_MCBSP3_BASE, |
205 | .dma_rx_sync = OMAP_DMA_MCBSP3_RX, | 210 | .dma_rx_sync = OMAP_DMA_MCBSP3_RX, |
206 | .dma_tx_sync = OMAP_DMA_MCBSP3_TX, | 211 | .dma_tx_sync = OMAP_DMA_MCBSP3_TX, |
@@ -219,6 +224,7 @@ static struct omap_mcbsp_platform_data omap15xx_mcbsp_pdata[] = { | |||
219 | #ifdef CONFIG_ARCH_OMAP16XX | 224 | #ifdef CONFIG_ARCH_OMAP16XX |
220 | static struct omap_mcbsp_platform_data omap16xx_mcbsp_pdata[] = { | 225 | static struct omap_mcbsp_platform_data omap16xx_mcbsp_pdata[] = { |
221 | { | 226 | { |
227 | .phys_base = OMAP1610_MCBSP1_BASE, | ||
222 | .virt_base = OMAP1610_MCBSP1_BASE, | 228 | .virt_base = OMAP1610_MCBSP1_BASE, |
223 | .dma_rx_sync = OMAP_DMA_MCBSP1_RX, | 229 | .dma_rx_sync = OMAP_DMA_MCBSP1_RX, |
224 | .dma_tx_sync = OMAP_DMA_MCBSP1_TX, | 230 | .dma_tx_sync = OMAP_DMA_MCBSP1_TX, |
@@ -228,6 +234,7 @@ static struct omap_mcbsp_platform_data omap16xx_mcbsp_pdata[] = { | |||
228 | .clk_name = "mcbsp_clk", | 234 | .clk_name = "mcbsp_clk", |
229 | }, | 235 | }, |
230 | { | 236 | { |
237 | .phys_base = OMAP1610_MCBSP2_BASE, | ||
231 | .virt_base = io_p2v(OMAP1610_MCBSP2_BASE), | 238 | .virt_base = io_p2v(OMAP1610_MCBSP2_BASE), |
232 | .dma_rx_sync = OMAP_DMA_MCBSP2_RX, | 239 | .dma_rx_sync = OMAP_DMA_MCBSP2_RX, |
233 | .dma_tx_sync = OMAP_DMA_MCBSP2_TX, | 240 | .dma_tx_sync = OMAP_DMA_MCBSP2_TX, |
@@ -236,6 +243,7 @@ static struct omap_mcbsp_platform_data omap16xx_mcbsp_pdata[] = { | |||
236 | .ops = &omap1_mcbsp_ops, | 243 | .ops = &omap1_mcbsp_ops, |
237 | }, | 244 | }, |
238 | { | 245 | { |
246 | .phys_base = OMAP1610_MCBSP3_BASE, | ||
239 | .virt_base = OMAP1610_MCBSP3_BASE, | 247 | .virt_base = OMAP1610_MCBSP3_BASE, |
240 | .dma_rx_sync = OMAP_DMA_MCBSP3_RX, | 248 | .dma_rx_sync = OMAP_DMA_MCBSP3_RX, |
241 | .dma_tx_sync = OMAP_DMA_MCBSP3_TX, | 249 | .dma_tx_sync = OMAP_DMA_MCBSP3_TX, |
diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c index 27eb6e3ca926..b261f1f80b5e 100644 --- a/arch/arm/mach-omap2/mcbsp.c +++ b/arch/arm/mach-omap2/mcbsp.c | |||
@@ -134,6 +134,7 @@ static struct omap_mcbsp_ops omap2_mcbsp_ops = { | |||
134 | #ifdef CONFIG_ARCH_OMAP24XX | 134 | #ifdef CONFIG_ARCH_OMAP24XX |
135 | static struct omap_mcbsp_platform_data omap24xx_mcbsp_pdata[] = { | 135 | static struct omap_mcbsp_platform_data omap24xx_mcbsp_pdata[] = { |
136 | { | 136 | { |
137 | .phys_base = OMAP24XX_MCBSP1_BASE, | ||
137 | .virt_base = IO_ADDRESS(OMAP24XX_MCBSP1_BASE), | 138 | .virt_base = IO_ADDRESS(OMAP24XX_MCBSP1_BASE), |
138 | .dma_rx_sync = OMAP24XX_DMA_MCBSP1_RX, | 139 | .dma_rx_sync = OMAP24XX_DMA_MCBSP1_RX, |
139 | .dma_tx_sync = OMAP24XX_DMA_MCBSP1_TX, | 140 | .dma_tx_sync = OMAP24XX_DMA_MCBSP1_TX, |
@@ -143,6 +144,7 @@ static struct omap_mcbsp_platform_data omap24xx_mcbsp_pdata[] = { | |||
143 | .clk_name = "mcbsp_clk", | 144 | .clk_name = "mcbsp_clk", |
144 | }, | 145 | }, |
145 | { | 146 | { |
147 | .phys_base = OMAP24XX_MCBSP2_BASE, | ||
146 | .virt_base = IO_ADDRESS(OMAP24XX_MCBSP2_BASE), | 148 | .virt_base = IO_ADDRESS(OMAP24XX_MCBSP2_BASE), |
147 | .dma_rx_sync = OMAP24XX_DMA_MCBSP2_RX, | 149 | .dma_rx_sync = OMAP24XX_DMA_MCBSP2_RX, |
148 | .dma_tx_sync = OMAP24XX_DMA_MCBSP2_TX, | 150 | .dma_tx_sync = OMAP24XX_DMA_MCBSP2_TX, |
@@ -161,6 +163,7 @@ static struct omap_mcbsp_platform_data omap24xx_mcbsp_pdata[] = { | |||
161 | #ifdef CONFIG_ARCH_OMAP34XX | 163 | #ifdef CONFIG_ARCH_OMAP34XX |
162 | static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = { | 164 | static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = { |
163 | { | 165 | { |
166 | .phys_base = OMAP34XX_MCBSP1_BASE, | ||
164 | .virt_base = IO_ADDRESS(OMAP34XX_MCBSP1_BASE), | 167 | .virt_base = IO_ADDRESS(OMAP34XX_MCBSP1_BASE), |
165 | .dma_rx_sync = OMAP24XX_DMA_MCBSP1_RX, | 168 | .dma_rx_sync = OMAP24XX_DMA_MCBSP1_RX, |
166 | .dma_tx_sync = OMAP24XX_DMA_MCBSP1_TX, | 169 | .dma_tx_sync = OMAP24XX_DMA_MCBSP1_TX, |
@@ -170,6 +173,7 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = { | |||
170 | .clk_name = "mcbsp_clk", | 173 | .clk_name = "mcbsp_clk", |
171 | }, | 174 | }, |
172 | { | 175 | { |
176 | .phys_base = OMAP34XX_MCBSP2_BASE, | ||
173 | .virt_base = IO_ADDRESS(OMAP34XX_MCBSP2_BASE), | 177 | .virt_base = IO_ADDRESS(OMAP34XX_MCBSP2_BASE), |
174 | .dma_rx_sync = OMAP24XX_DMA_MCBSP2_RX, | 178 | .dma_rx_sync = OMAP24XX_DMA_MCBSP2_RX, |
175 | .dma_tx_sync = OMAP24XX_DMA_MCBSP2_TX, | 179 | .dma_tx_sync = OMAP24XX_DMA_MCBSP2_TX, |
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c index 25d9a11eb617..a713e40e1f1a 100644 --- a/arch/arm/mm/mmu.c +++ b/arch/arm/mm/mmu.c | |||
@@ -211,6 +211,12 @@ static struct mem_type mem_types[] = { | |||
211 | PMD_SECT_TEX(1), | 211 | PMD_SECT_TEX(1), |
212 | .domain = DOMAIN_IO, | 212 | .domain = DOMAIN_IO, |
213 | }, | 213 | }, |
214 | [MT_DEVICE_WC] = { /* ioremap_wc */ | ||
215 | .prot_pte = PROT_PTE_DEVICE, | ||
216 | .prot_l1 = PMD_TYPE_TABLE, | ||
217 | .prot_sect = PROT_SECT_DEVICE, | ||
218 | .domain = DOMAIN_IO, | ||
219 | }, | ||
214 | [MT_CACHECLEAN] = { | 220 | [MT_CACHECLEAN] = { |
215 | .prot_sect = PMD_TYPE_SECT | PMD_SECT_XN, | 221 | .prot_sect = PMD_TYPE_SECT | PMD_SECT_XN, |
216 | .domain = DOMAIN_KERNEL, | 222 | .domain = DOMAIN_KERNEL, |
@@ -273,6 +279,20 @@ static void __init build_mem_type_table(void) | |||
273 | } | 279 | } |
274 | 280 | ||
275 | /* | 281 | /* |
282 | * On non-Xscale3 ARMv5-and-older systems, use CB=01 | ||
283 | * (Uncached/Buffered) for ioremap_wc() mappings. On XScale3 | ||
284 | * and ARMv6+, use TEXCB=00100 mappings (Inner/Outer Uncacheable | ||
285 | * in xsc3 parlance, Uncached Normal in ARMv6 parlance). | ||
286 | */ | ||
287 | if (cpu_is_xsc3() || cpu_arch >= CPU_ARCH_ARMv6) { | ||
288 | mem_types[MT_DEVICE_WC].prot_pte_ext |= PTE_EXT_TEX(1); | ||
289 | mem_types[MT_DEVICE_WC].prot_sect |= PMD_SECT_TEX(1); | ||
290 | } else { | ||
291 | mem_types[MT_DEVICE_WC].prot_pte |= L_PTE_BUFFERABLE; | ||
292 | mem_types[MT_DEVICE_WC].prot_sect |= PMD_SECT_BUFFERABLE; | ||
293 | } | ||
294 | |||
295 | /* | ||
276 | * ARMv5 and lower, bit 4 must be set for page tables. | 296 | * ARMv5 and lower, bit 4 must be set for page tables. |
277 | * (was: cache "update-able on write" bit on ARM610) | 297 | * (was: cache "update-able on write" bit on ARM610) |
278 | * However, Xscale cores require this bit to be cleared. | 298 | * However, Xscale cores require this bit to be cleared. |
diff --git a/arch/arm/plat-mxc/clock.c b/arch/arm/plat-mxc/clock.c index 2f8627218839..0a38f0b396eb 100644 --- a/arch/arm/plat-mxc/clock.c +++ b/arch/arm/plat-mxc/clock.c | |||
@@ -37,7 +37,6 @@ | |||
37 | #include <linux/proc_fs.h> | 37 | #include <linux/proc_fs.h> |
38 | #include <linux/semaphore.h> | 38 | #include <linux/semaphore.h> |
39 | #include <linux/string.h> | 39 | #include <linux/string.h> |
40 | #include <linux/version.h> | ||
41 | 40 | ||
42 | #include <mach/clock.h> | 41 | #include <mach/clock.h> |
43 | 42 | ||
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c index 3e76ee2bc731..9e1341ebc14e 100644 --- a/arch/arm/plat-omap/gpio.c +++ b/arch/arm/plat-omap/gpio.c | |||
@@ -1488,7 +1488,7 @@ static int __init _omap_gpio_init(void) | |||
1488 | bank->chip.set = gpio_set; | 1488 | bank->chip.set = gpio_set; |
1489 | if (bank_is_mpuio(bank)) { | 1489 | if (bank_is_mpuio(bank)) { |
1490 | bank->chip.label = "mpuio"; | 1490 | bank->chip.label = "mpuio"; |
1491 | #ifdef CONFIG_ARCH_OMAP1 | 1491 | #ifdef CONFIG_ARCH_OMAP16XX |
1492 | bank->chip.dev = &omap_mpuio_device.dev; | 1492 | bank->chip.dev = &omap_mpuio_device.dev; |
1493 | #endif | 1493 | #endif |
1494 | bank->chip.base = OMAP_MPUIO(0); | 1494 | bank->chip.base = OMAP_MPUIO(0); |
diff --git a/arch/arm/plat-omap/include/mach/mcbsp.h b/arch/arm/plat-omap/include/mach/mcbsp.h index 6eb44a92871d..8fdb95e26fcd 100644 --- a/arch/arm/plat-omap/include/mach/mcbsp.h +++ b/arch/arm/plat-omap/include/mach/mcbsp.h | |||
@@ -315,6 +315,7 @@ struct omap_mcbsp_ops { | |||
315 | }; | 315 | }; |
316 | 316 | ||
317 | struct omap_mcbsp_platform_data { | 317 | struct omap_mcbsp_platform_data { |
318 | unsigned long phys_base; | ||
318 | u32 virt_base; | 319 | u32 virt_base; |
319 | u8 dma_rx_sync, dma_tx_sync; | 320 | u8 dma_rx_sync, dma_tx_sync; |
320 | u16 rx_irq, tx_irq; | 321 | u16 rx_irq, tx_irq; |
@@ -324,6 +325,7 @@ struct omap_mcbsp_platform_data { | |||
324 | 325 | ||
325 | struct omap_mcbsp { | 326 | struct omap_mcbsp { |
326 | struct device *dev; | 327 | struct device *dev; |
328 | unsigned long phys_base; | ||
327 | u32 io_base; | 329 | u32 io_base; |
328 | u8 id; | 330 | u8 id; |
329 | u8 free; | 331 | u8 free; |
diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c index d0844050f2d2..014d26574bb6 100644 --- a/arch/arm/plat-omap/mcbsp.c +++ b/arch/arm/plat-omap/mcbsp.c | |||
@@ -651,7 +651,7 @@ int omap_mcbsp_xmit_buffer(unsigned int id, dma_addr_t buffer, | |||
651 | omap_set_dma_dest_params(mcbsp[id].dma_tx_lch, | 651 | omap_set_dma_dest_params(mcbsp[id].dma_tx_lch, |
652 | src_port, | 652 | src_port, |
653 | OMAP_DMA_AMODE_CONSTANT, | 653 | OMAP_DMA_AMODE_CONSTANT, |
654 | mcbsp[id].io_base + OMAP_MCBSP_REG_DXR1, | 654 | mcbsp[id].phys_base + OMAP_MCBSP_REG_DXR1, |
655 | 0, 0); | 655 | 0, 0); |
656 | 656 | ||
657 | omap_set_dma_src_params(mcbsp[id].dma_tx_lch, | 657 | omap_set_dma_src_params(mcbsp[id].dma_tx_lch, |
@@ -712,7 +712,7 @@ int omap_mcbsp_recv_buffer(unsigned int id, dma_addr_t buffer, | |||
712 | omap_set_dma_src_params(mcbsp[id].dma_rx_lch, | 712 | omap_set_dma_src_params(mcbsp[id].dma_rx_lch, |
713 | src_port, | 713 | src_port, |
714 | OMAP_DMA_AMODE_CONSTANT, | 714 | OMAP_DMA_AMODE_CONSTANT, |
715 | mcbsp[id].io_base + OMAP_MCBSP_REG_DRR1, | 715 | mcbsp[id].phys_base + OMAP_MCBSP_REG_DRR1, |
716 | 0, 0); | 716 | 0, 0); |
717 | 717 | ||
718 | omap_set_dma_dest_params(mcbsp[id].dma_rx_lch, | 718 | omap_set_dma_dest_params(mcbsp[id].dma_rx_lch, |
@@ -830,6 +830,7 @@ static int __init omap_mcbsp_probe(struct platform_device *pdev) | |||
830 | mcbsp[id].dma_tx_lch = -1; | 830 | mcbsp[id].dma_tx_lch = -1; |
831 | mcbsp[id].dma_rx_lch = -1; | 831 | mcbsp[id].dma_rx_lch = -1; |
832 | 832 | ||
833 | mcbsp[id].phys_base = pdata->phys_base; | ||
833 | mcbsp[id].io_base = pdata->virt_base; | 834 | mcbsp[id].io_base = pdata->virt_base; |
834 | /* Default I/O is IRQ based */ | 835 | /* Default I/O is IRQ based */ |
835 | mcbsp[id].io_type = OMAP_MCBSP_IRQ_IO; | 836 | mcbsp[id].io_type = OMAP_MCBSP_IRQ_IO; |