aboutsummaryrefslogtreecommitdiffstats
path: root/arch
diff options
context:
space:
mode:
authorLinus Torvalds <torvalds@woody.linux-foundation.org>2007-02-15 13:01:15 -0500
committerLinus Torvalds <torvalds@woody.linux-foundation.org>2007-02-15 13:01:15 -0500
commitf99c6bb6e2e9c35bd3dc0b1d0faa28bd6970930d (patch)
tree338721c5084d536208a944567c2dface6a38a994 /arch
parente0a04cffa4e97e1e53625e40e70895c882e8972f (diff)
parent9c57548f17806ffd8e4dc4f7973ce78bbfbc2079 (diff)
Merge master.kernel.org:/pub/scm/linux/kernel/git/lethal/sh-2.6
* master.kernel.org:/pub/scm/linux/kernel/git/lethal/sh-2.6: (35 commits) sh: rts7751r2d board updates. sh: Kill off dead bigsur and ec3104 boards. sh: Fixup r7780rp pata_platform for devres conversion. sh: Revert TLB miss fast-path changes that broke PTEA parts. sh: Compile fix for heartbeat consolidation. sh: heartbeat consolidation for banked LEDs. sh: define dma noncoherent API functions. sh: Missing flush_dcache_all() proto in cacheflush.h. sh: Kill dead/unused ISA code from __ioremap(). sh: Add cpu-features header to asm/Kbuild. sh: Move __KERNEL__ up in asm/page.h. sh: Fix syscall numbering breakage. sh: dcache write-back for R7780RP PIO. sh: Switch to local TLB flush variants in additional callsites. sh: Local TLB flushing variants for SMP prep. sh: Fixup cpu_data references for the non-boot CPUs. sh: Use a per-cpu ASID cache. sh: add SH_CLK_MD Kconfig default. sh: Fixup SHMIN INTC register definitions. sh: SH-DMAC compile fixes ...
Diffstat (limited to 'arch')
-rw-r--r--arch/sh/Kconfig17
-rw-r--r--arch/sh/Makefile3
-rw-r--r--arch/sh/boards/bigsur/Makefile6
-rw-r--r--arch/sh/boards/bigsur/io.c120
-rw-r--r--arch/sh/boards/bigsur/irq.c334
-rw-r--r--arch/sh/boards/bigsur/led.c54
-rw-r--r--arch/sh/boards/bigsur/setup.c88
-rw-r--r--arch/sh/boards/ec3104/Makefile6
-rw-r--r--arch/sh/boards/ec3104/io.c81
-rw-r--r--arch/sh/boards/ec3104/irq.c196
-rw-r--r--arch/sh/boards/ec3104/setup.c65
-rw-r--r--arch/sh/boards/mpc1211/Makefile2
-rw-r--r--arch/sh/boards/mpc1211/led.c63
-rw-r--r--arch/sh/boards/mpc1211/setup.c31
-rw-r--r--arch/sh/boards/renesas/r7780rp/Makefile1
-rw-r--r--arch/sh/boards/renesas/r7780rp/io.c152
-rw-r--r--arch/sh/boards/renesas/r7780rp/led.c43
-rw-r--r--arch/sh/boards/renesas/r7780rp/setup.c49
-rw-r--r--arch/sh/boards/renesas/rts7751r2d/Makefile3
-rw-r--r--arch/sh/boards/renesas/rts7751r2d/io.c302
-rw-r--r--arch/sh/boards/renesas/rts7751r2d/irq.c80
-rw-r--r--arch/sh/boards/renesas/rts7751r2d/led.c44
-rw-r--r--arch/sh/boards/renesas/rts7751r2d/setup.c142
-rw-r--r--arch/sh/boards/se/7206/Makefile2
-rw-r--r--arch/sh/boards/se/7206/led.c57
-rw-r--r--arch/sh/boards/se/7206/setup.c34
-rw-r--r--arch/sh/boards/se/7300/Makefile2
-rw-r--r--arch/sh/boards/se/7300/led.c54
-rw-r--r--arch/sh/boards/se/7300/setup.c36
-rw-r--r--arch/sh/boards/se/73180/Makefile2
-rw-r--r--arch/sh/boards/se/73180/led.c53
-rw-r--r--arch/sh/boards/se/73180/setup.c31
-rw-r--r--arch/sh/boards/se/7343/Makefile2
-rw-r--r--arch/sh/boards/se/7343/led.c44
-rw-r--r--arch/sh/boards/se/7343/setup.c26
-rw-r--r--arch/sh/boards/se/770x/Makefile1
-rw-r--r--arch/sh/boards/se/770x/irq.c108
-rw-r--r--arch/sh/boards/se/770x/led.c52
-rw-r--r--arch/sh/boards/se/770x/setup.c43
-rw-r--r--arch/sh/boards/se/7751/Makefile1
-rw-r--r--arch/sh/boards/se/7751/led.c51
-rw-r--r--arch/sh/boards/se/7751/setup.c36
-rw-r--r--arch/sh/boards/sh03/Makefile1
-rw-r--r--arch/sh/boards/sh03/led.c48
-rw-r--r--arch/sh/boards/sh03/setup.c30
-rw-r--r--arch/sh/boards/shmin/setup.c12
-rw-r--r--arch/sh/cchips/voyagergx/irq.c70
-rw-r--r--arch/sh/cchips/voyagergx/setup.c4
-rw-r--r--arch/sh/configs/rts7751r2d_defconfig308
-rw-r--r--arch/sh/configs/se7750_defconfig140
-rw-r--r--arch/sh/drivers/Makefile1
-rw-r--r--arch/sh/drivers/dma/dma-sh.c45
-rw-r--r--arch/sh/drivers/heartbeat.c132
-rw-r--r--arch/sh/drivers/pci/Makefile1
-rw-r--r--arch/sh/drivers/pci/ops-bigsur.c83
-rw-r--r--arch/sh/drivers/pci/pci-sh7751.c9
-rw-r--r--arch/sh/kernel/Makefile3
-rw-r--r--arch/sh/kernel/cpu/init.c41
-rw-r--r--arch/sh/kernel/cpu/irq/ipr.c19
-rw-r--r--arch/sh/kernel/cpu/sh2/entry.S12
-rw-r--r--arch/sh/kernel/cpu/sh2/probe.c32
-rw-r--r--arch/sh/kernel/cpu/sh2/setup-sh7619.c62
-rw-r--r--arch/sh/kernel/cpu/sh2a/probe.c16
-rw-r--r--arch/sh/kernel/cpu/sh2a/setup-sh7206.c89
-rw-r--r--arch/sh/kernel/cpu/sh3/entry.S207
-rw-r--r--arch/sh/kernel/cpu/sh3/probe.c42
-rw-r--r--arch/sh/kernel/cpu/sh3/setup-sh7709.c21
-rw-r--r--arch/sh/kernel/cpu/sh4/probe.c183
-rw-r--r--arch/sh/kernel/cpu/sh4/setup-sh7750.c4
-rw-r--r--arch/sh/kernel/cpu/sh4/setup-sh7760.c66
-rw-r--r--arch/sh/kernel/debugtraps.S41
-rw-r--r--arch/sh/kernel/early_printk.c24
-rw-r--r--arch/sh/kernel/entry-common.S119
-rw-r--r--arch/sh/kernel/io_generic.c12
-rw-r--r--arch/sh/kernel/kgdb_stub.c7
-rw-r--r--arch/sh/kernel/process.c95
-rw-r--r--arch/sh/kernel/setup.c49
-rw-r--r--arch/sh/kernel/sh_ksyms.c1
-rw-r--r--arch/sh/kernel/signal.c6
-rw-r--r--arch/sh/kernel/syscalls.S8
-rw-r--r--arch/sh/kernel/traps.c4
-rw-r--r--arch/sh/mm/Kconfig5
-rw-r--r--arch/sh/mm/cache-debugfs.c4
-rw-r--r--arch/sh/mm/cache-sh3.c8
-rw-r--r--arch/sh/mm/cache-sh4.c77
-rw-r--r--arch/sh/mm/cache-sh7705.c29
-rw-r--r--arch/sh/mm/fault.c87
-rw-r--r--arch/sh/mm/init.c7
-rw-r--r--arch/sh/mm/ioremap.c6
-rw-r--r--arch/sh/mm/pg-sh4.c28
-rw-r--r--arch/sh/mm/pg-sh7705.c37
-rw-r--r--arch/sh/mm/tlb-flush.c101
-rw-r--r--arch/sh/mm/tlb-nommu.c19
-rw-r--r--arch/sh/mm/tlb-sh3.c67
-rw-r--r--arch/sh/mm/tlb-sh4.c70
-rw-r--r--arch/sh/oprofile/op_model_sh7750.c2
-rw-r--r--arch/sh/tools/mach-types1
97 files changed, 1869 insertions, 3243 deletions
diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig
index 4f3891215b87..4d16d8917074 100644
--- a/arch/sh/Kconfig
+++ b/arch/sh/Kconfig
@@ -135,12 +135,6 @@ config SH_HP6XX
135 More information (hardware only) at 135 More information (hardware only) at
136 <http://www.hp.com/jornada/>. 136 <http://www.hp.com/jornada/>.
137 137
138config SH_EC3104
139 bool "EC3104"
140 help
141 Select EC3104 if configuring for a system with an Eclipse
142 International EC3104 chip, e.g. the Harris AD2000.
143
144config SH_SATURN 138config SH_SATURN
145 bool "Saturn" 139 bool "Saturn"
146 select CPU_SUBTYPE_SH7604 140 select CPU_SUBTYPE_SH7604
@@ -156,9 +150,6 @@ config SH_DREAMCAST
156 <http://www.m17n.org/linux-sh/dreamcast/>. There is a 150 <http://www.m17n.org/linux-sh/dreamcast/>. There is a
157 Dreamcast project is at <http://linuxdc.sourceforge.net/>. 151 Dreamcast project is at <http://linuxdc.sourceforge.net/>.
158 152
159config SH_BIGSUR
160 bool "BigSur"
161
162config SH_MPC1211 153config SH_MPC1211
163 bool "Interface MPC1211" 154 bool "Interface MPC1211"
164 help 155 help
@@ -481,6 +472,7 @@ config SH_PCLK_FREQ
481 472
482config SH_CLK_MD 473config SH_CLK_MD
483 int "CPU Mode Pin Setting" 474 int "CPU Mode Pin Setting"
475 default 0
484 depends on CPU_SUBTYPE_SH7619 || CPU_SUBTYPE_SH7206 476 depends on CPU_SUBTYPE_SH7619 || CPU_SUBTYPE_SH7206
485 help 477 help
486 MD2 - MD0 pin setting. 478 MD2 - MD0 pin setting.
@@ -510,8 +502,9 @@ source "arch/sh/cchips/Kconfig"
510config HEARTBEAT 502config HEARTBEAT
511 bool "Heartbeat LED" 503 bool "Heartbeat LED"
512 depends on SH_MPC1211 || SH_SH03 || \ 504 depends on SH_MPC1211 || SH_SH03 || \
513 SH_BIGSUR || SOLUTION_ENGINE || \ 505 SOLUTION_ENGINE || \
514 SH_RTS7751R2D || SH_SH4202_MICRODEV || SH_LANDISK 506 SH_RTS7751R2D || SH_SH4202_MICRODEV || SH_LANDISK || \
507 SH_R7780RP
515 help 508 help
516 Use the power-on LED on your machine as a load meter. The exact 509 Use the power-on LED on your machine as a load meter. The exact
517 behavior is platform-dependent, but normally the flash frequency is 510 behavior is platform-dependent, but normally the flash frequency is
@@ -596,6 +589,8 @@ menu "Boot options"
596config ZERO_PAGE_OFFSET 589config ZERO_PAGE_OFFSET
597 hex "Zero page offset" 590 hex "Zero page offset"
598 default "0x00004000" if SH_MPC1211 || SH_SH03 591 default "0x00004000" if SH_MPC1211 || SH_SH03
592 default "0x00010000" if PAGE_SIZE_64KB
593 default "0x00002000" if PAGE_SIZE_8KB
599 default "0x00001000" 594 default "0x00001000"
600 help 595 help
601 This sets the default offset of zero page. 596 This sets the default offset of zero page.
diff --git a/arch/sh/Makefile b/arch/sh/Makefile
index c1dbef212634..bd9b1729f8b8 100644
--- a/arch/sh/Makefile
+++ b/arch/sh/Makefile
@@ -35,6 +35,7 @@ endif
35endif 35endif
36 36
37cflags-$(CONFIG_CPU_SH2) := -m2 37cflags-$(CONFIG_CPU_SH2) := -m2
38cflags-$(CONFIG_CPU_SH2A) := -m2a $(call cc-option,-m2a-nofpu,)
38cflags-$(CONFIG_CPU_SH3) := -m3 39cflags-$(CONFIG_CPU_SH3) := -m3
39cflags-$(CONFIG_CPU_SH4) := -m4 \ 40cflags-$(CONFIG_CPU_SH4) := -m4 \
40 $(call cc-option,-mno-implicit-fp,-m4-nofpu) 41 $(call cc-option,-mno-implicit-fp,-m4-nofpu)
@@ -93,10 +94,8 @@ machdir-$(CONFIG_SH_7300_SOLUTION_ENGINE) := se/7300
93machdir-$(CONFIG_SH_7343_SOLUTION_ENGINE) := se/7343 94machdir-$(CONFIG_SH_7343_SOLUTION_ENGINE) := se/7343
94machdir-$(CONFIG_SH_73180_SOLUTION_ENGINE) := se/73180 95machdir-$(CONFIG_SH_73180_SOLUTION_ENGINE) := se/73180
95machdir-$(CONFIG_SH_HP6XX) := hp6xx 96machdir-$(CONFIG_SH_HP6XX) := hp6xx
96machdir-$(CONFIG_SH_EC3104) := ec3104
97machdir-$(CONFIG_SH_SATURN) := saturn 97machdir-$(CONFIG_SH_SATURN) := saturn
98machdir-$(CONFIG_SH_DREAMCAST) := dreamcast 98machdir-$(CONFIG_SH_DREAMCAST) := dreamcast
99machdir-$(CONFIG_SH_BIGSUR) := bigsur
100machdir-$(CONFIG_SH_MPC1211) := mpc1211 99machdir-$(CONFIG_SH_MPC1211) := mpc1211
101machdir-$(CONFIG_SH_SH03) := sh03 100machdir-$(CONFIG_SH_SH03) := sh03
102machdir-$(CONFIG_SH_SECUREEDGE5410) := snapgear 101machdir-$(CONFIG_SH_SECUREEDGE5410) := snapgear
diff --git a/arch/sh/boards/bigsur/Makefile b/arch/sh/boards/bigsur/Makefile
deleted file mode 100644
index 0ff9497ac58e..000000000000
--- a/arch/sh/boards/bigsur/Makefile
+++ /dev/null
@@ -1,6 +0,0 @@
1#
2# Makefile for the BigSur specific parts of the kernel
3#
4
5obj-y := setup.o io.o irq.o led.o
6
diff --git a/arch/sh/boards/bigsur/io.c b/arch/sh/boards/bigsur/io.c
deleted file mode 100644
index 23071f97eec3..000000000000
--- a/arch/sh/boards/bigsur/io.c
+++ /dev/null
@@ -1,120 +0,0 @@
1/*
2 * arch/sh/boards/bigsur/io.c
3 *
4 * By Dustin McIntire (dustin@sensoria.com) (c)2001
5 * Derived from io_hd64465.h, which bore the message:
6 * By Greg Banks <gbanks@pocketpenguins.com>
7 * (c) 2000 PocketPenguins Inc.
8 * and from io_hd64461.h, which bore the message:
9 * Copyright 2000 Stuart Menefy (stuart.menefy@st.com)
10 *
11 * May be copied or modified under the terms of the GNU General Public
12 * License. See linux/COPYING for more information.
13 *
14 * IO functions for a Hitachi Big Sur Evaluation Board.
15 */
16
17#include <linux/kernel.h>
18#include <linux/module.h>
19#include <asm/machvec.h>
20#include <asm/io.h>
21#include <asm/bigsur/bigsur.h>
22
23/* Low iomap maps port 0-1K to addresses in 8byte chunks */
24#define BIGSUR_IOMAP_LO_THRESH 0x400
25#define BIGSUR_IOMAP_LO_SHIFT 3
26#define BIGSUR_IOMAP_LO_MASK ((1<<BIGSUR_IOMAP_LO_SHIFT)-1)
27#define BIGSUR_IOMAP_LO_NMAP (BIGSUR_IOMAP_LO_THRESH>>BIGSUR_IOMAP_LO_SHIFT)
28static u32 bigsur_iomap_lo[BIGSUR_IOMAP_LO_NMAP];
29static u8 bigsur_iomap_lo_shift[BIGSUR_IOMAP_LO_NMAP];
30
31/* High iomap maps port 1K-64K to addresses in 1K chunks */
32#define BIGSUR_IOMAP_HI_THRESH 0x10000
33#define BIGSUR_IOMAP_HI_SHIFT 10
34#define BIGSUR_IOMAP_HI_MASK ((1<<BIGSUR_IOMAP_HI_SHIFT)-1)
35#define BIGSUR_IOMAP_HI_NMAP (BIGSUR_IOMAP_HI_THRESH>>BIGSUR_IOMAP_HI_SHIFT)
36static u32 bigsur_iomap_hi[BIGSUR_IOMAP_HI_NMAP];
37static u8 bigsur_iomap_hi_shift[BIGSUR_IOMAP_HI_NMAP];
38
39void bigsur_port_map(u32 baseport, u32 nports, u32 addr, u8 shift)
40{
41 u32 port, endport = baseport + nports;
42
43 pr_debug("bigsur_port_map(base=0x%0x, n=0x%0x, addr=0x%08x)\n",
44 baseport, nports, addr);
45
46 for (port = baseport ;
47 port < endport && port < BIGSUR_IOMAP_LO_THRESH ;
48 port += (1<<BIGSUR_IOMAP_LO_SHIFT)) {
49 pr_debug(" maplo[0x%x] = 0x%08x\n", port, addr);
50 bigsur_iomap_lo[port>>BIGSUR_IOMAP_LO_SHIFT] = addr;
51 bigsur_iomap_lo_shift[port>>BIGSUR_IOMAP_LO_SHIFT] = shift;
52 addr += (1<<(BIGSUR_IOMAP_LO_SHIFT));
53 }
54
55 for (port = max_t(u32, baseport, BIGSUR_IOMAP_LO_THRESH);
56 port < endport && port < BIGSUR_IOMAP_HI_THRESH ;
57 port += (1<<BIGSUR_IOMAP_HI_SHIFT)) {
58 pr_debug(" maphi[0x%x] = 0x%08x\n", port, addr);
59 bigsur_iomap_hi[port>>BIGSUR_IOMAP_HI_SHIFT] = addr;
60 bigsur_iomap_hi_shift[port>>BIGSUR_IOMAP_HI_SHIFT] = shift;
61 addr += (1<<(BIGSUR_IOMAP_HI_SHIFT));
62 }
63}
64EXPORT_SYMBOL(bigsur_port_map);
65
66void bigsur_port_unmap(u32 baseport, u32 nports)
67{
68 u32 port, endport = baseport + nports;
69
70 pr_debug("bigsur_port_unmap(base=0x%0x, n=0x%0x)\n", baseport, nports);
71
72 for (port = baseport ;
73 port < endport && port < BIGSUR_IOMAP_LO_THRESH ;
74 port += (1<<BIGSUR_IOMAP_LO_SHIFT)) {
75 bigsur_iomap_lo[port>>BIGSUR_IOMAP_LO_SHIFT] = 0;
76 }
77
78 for (port = max_t(u32, baseport, BIGSUR_IOMAP_LO_THRESH);
79 port < endport && port < BIGSUR_IOMAP_HI_THRESH ;
80 port += (1<<BIGSUR_IOMAP_HI_SHIFT)) {
81 bigsur_iomap_hi[port>>BIGSUR_IOMAP_HI_SHIFT] = 0;
82 }
83}
84EXPORT_SYMBOL(bigsur_port_unmap);
85
86unsigned long bigsur_isa_port2addr(unsigned long port)
87{
88 unsigned long addr = 0;
89 unsigned char shift;
90
91 /* Physical address not in P0, do nothing */
92 if (PXSEG(port)) {
93 addr = port;
94 /* physical address in P0, map to P2 */
95 } else if (port >= 0x30000) {
96 addr = P2SEGADDR(port);
97 /* Big Sur I/O + HD64465 registers 0x10000-0x30000 */
98 } else if (port >= BIGSUR_IOMAP_HI_THRESH) {
99 addr = BIGSUR_INTERNAL_BASE + (port - BIGSUR_IOMAP_HI_THRESH);
100 /* Handle remapping of high IO/PCI IO ports */
101 } else if (port >= BIGSUR_IOMAP_LO_THRESH) {
102 addr = bigsur_iomap_hi[port >> BIGSUR_IOMAP_HI_SHIFT];
103 shift = bigsur_iomap_hi_shift[port >> BIGSUR_IOMAP_HI_SHIFT];
104
105 if (addr != 0)
106 addr += (port & BIGSUR_IOMAP_HI_MASK) << shift;
107 } else {
108 /* Handle remapping of low IO ports */
109 addr = bigsur_iomap_lo[port >> BIGSUR_IOMAP_LO_SHIFT];
110 shift = bigsur_iomap_lo_shift[port >> BIGSUR_IOMAP_LO_SHIFT];
111
112 if (addr != 0)
113 addr += (port & BIGSUR_IOMAP_LO_MASK) << shift;
114 }
115
116 pr_debug("%s(0x%08lx) = 0x%08lx\n", __FUNCTION__, port, addr);
117
118 return addr;
119}
120
diff --git a/arch/sh/boards/bigsur/irq.c b/arch/sh/boards/bigsur/irq.c
deleted file mode 100644
index 1ab04da36382..000000000000
--- a/arch/sh/boards/bigsur/irq.c
+++ /dev/null
@@ -1,334 +0,0 @@
1/*
2 *
3 * By Dustin McIntire (dustin@sensoria.com) (c)2001
4 *
5 * Setup and IRQ handling code for the HD64465 companion chip.
6 * by Greg Banks <gbanks@pocketpenguins.com>
7 * Copyright (c) 2000 PocketPenguins Inc
8 *
9 * Derived from setup_hd64465.c which bore the message:
10 * Greg Banks <gbanks@pocketpenguins.com>
11 * Copyright (c) 2000 PocketPenguins Inc and
12 * Copyright (C) 2000 YAEGASHI Takeshi
13 * and setup_cqreek.c which bore message:
14 * Copyright (C) 2000 Niibe Yutaka
15 *
16 * May be copied or modified under the terms of the GNU General Public
17 * License. See linux/COPYING for more information.
18 *
19 * IRQ functions for a Hitachi Big Sur Evaluation Board.
20 *
21 */
22#undef DEBUG
23
24#include <linux/sched.h>
25#include <linux/module.h>
26#include <linux/kernel.h>
27#include <linux/param.h>
28#include <linux/ioport.h>
29#include <linux/interrupt.h>
30#include <linux/init.h>
31#include <linux/irq.h>
32#include <linux/bitops.h>
33
34#include <asm/io.h>
35#include <asm/irq.h>
36
37#include <asm/bigsur/io.h>
38#include <asm/hd64465/hd64465.h>
39#include <asm/bigsur/bigsur.h>
40
41//#define BIGSUR_DEBUG 3
42#undef BIGSUR_DEBUG
43
44#ifdef BIGSUR_DEBUG
45#define DIPRINTK(n, args...) if (BIGSUR_DEBUG>(n)) printk(args)
46#else
47#define DIPRINTK(n, args...)
48#endif /* BIGSUR_DEBUG */
49
50#ifdef CONFIG_HD64465
51extern int hd64465_irq_demux(int irq);
52#endif /* CONFIG_HD64465 */
53
54
55/*===========================================================*/
56// Big Sur CPLD IRQ Routines
57/*===========================================================*/
58
59/* Level 1 IRQ routines */
60static void disable_bigsur_l1irq(unsigned int irq)
61{
62 unsigned char mask;
63 unsigned int mask_port = ((irq - BIGSUR_IRQ_LOW)/8) ? BIGSUR_IRLMR1 : BIGSUR_IRLMR0;
64 unsigned char bit = (1 << ((irq - MGATE_IRQ_LOW)%8) );
65
66 if(irq >= BIGSUR_IRQ_LOW && irq < BIGSUR_IRQ_HIGH) {
67 pr_debug("Disable L1 IRQ %d\n", irq);
68 DIPRINTK(2,"disable_bigsur_l1irq: IMR=0x%08x mask=0x%x\n",
69 mask_port, bit);
70
71 /* Disable IRQ - set mask bit */
72 mask = inb(mask_port) | bit;
73 outb(mask, mask_port);
74 return;
75 }
76 pr_debug("disable_bigsur_l1irq: Invalid IRQ %d\n", irq);
77}
78
79static void enable_bigsur_l1irq(unsigned int irq)
80{
81 unsigned char mask;
82 unsigned int mask_port = ((irq - BIGSUR_IRQ_LOW)/8) ? BIGSUR_IRLMR1 : BIGSUR_IRLMR0;
83 unsigned char bit = (1 << ((irq - MGATE_IRQ_LOW)%8) );
84
85 if(irq >= BIGSUR_IRQ_LOW && irq < BIGSUR_IRQ_HIGH) {
86 pr_debug("Enable L1 IRQ %d\n", irq);
87 DIPRINTK(2,"enable_bigsur_l1irq: IMR=0x%08x mask=0x%x\n",
88 mask_port, bit);
89 /* Enable L1 IRQ - clear mask bit */
90 mask = inb(mask_port) & ~bit;
91 outb(mask, mask_port);
92 return;
93 }
94 pr_debug("enable_bigsur_l1irq: Invalid IRQ %d\n", irq);
95}
96
97
98/* Level 2 irq masks and registers for L2 decoding */
99/* Level2 bitmasks for each level 1 IRQ */
100const u32 bigsur_l2irq_mask[] =
101 {0x40,0x80,0x08,0x01,0x01,0x3C,0x3E,0xFF,0x40,0x80,0x06,0x03};
102/* Level2 to ISR[n] map for each level 1 IRQ */
103const u32 bigsur_l2irq_reg[] =
104 { 2, 2, 3, 3, 1, 2, 1, 0, 1, 1, 3, 2};
105/* Level2 to Level 1 IRQ map */
106const u32 bigsur_l2_l1_map[] =
107 {7,7,7,7,7,7,7,7, 4,6,6,6,6,6,8,9, 11,11,5,5,5,5,0,1, 3,10,10,2,-1,-1,-1,-1};
108/* IRQ inactive level (high or low) */
109const u32 bigsur_l2_inactv_state[] = {0x00, 0xBE, 0xFC, 0xF7};
110
111/* CPLD external status and mask registers base and offsets */
112static const u32 isr_base = BIGSUR_IRQ0;
113static const u32 isr_offset = BIGSUR_IRQ0 - BIGSUR_IRQ1;
114static const u32 imr_base = BIGSUR_IMR0;
115static const u32 imr_offset = BIGSUR_IMR0 - BIGSUR_IMR1;
116
117#define REG_NUM(irq) ((irq-BIGSUR_2NDLVL_IRQ_LOW)/8 )
118
119/* Level 2 IRQ routines */
120static void disable_bigsur_l2irq(unsigned int irq)
121{
122 unsigned char mask;
123 unsigned char bit = 1 << ((irq-BIGSUR_2NDLVL_IRQ_LOW)%8);
124 unsigned int mask_port = imr_base - REG_NUM(irq)*imr_offset;
125
126 if(irq >= BIGSUR_2NDLVL_IRQ_LOW && irq < BIGSUR_2NDLVL_IRQ_HIGH) {
127 pr_debug("Disable L2 IRQ %d\n", irq);
128 DIPRINTK(2,"disable_bigsur_l2irq: IMR=0x%08x mask=0x%x\n",
129 mask_port, bit);
130
131 /* Disable L2 IRQ - set mask bit */
132 mask = inb(mask_port) | bit;
133 outb(mask, mask_port);
134 return;
135 }
136 pr_debug("disable_bigsur_l2irq: Invalid IRQ %d\n", irq);
137}
138
139static void enable_bigsur_l2irq(unsigned int irq)
140{
141 unsigned char mask;
142 unsigned char bit = 1 << ((irq-BIGSUR_2NDLVL_IRQ_LOW)%8);
143 unsigned int mask_port = imr_base - REG_NUM(irq)*imr_offset;
144
145 if(irq >= BIGSUR_2NDLVL_IRQ_LOW && irq < BIGSUR_2NDLVL_IRQ_HIGH) {
146 pr_debug("Enable L2 IRQ %d\n", irq);
147 DIPRINTK(2,"enable_bigsur_l2irq: IMR=0x%08x mask=0x%x\n",
148 mask_port, bit);
149
150 /* Enable L2 IRQ - clear mask bit */
151 mask = inb(mask_port) & ~bit;
152 outb(mask, mask_port);
153 return;
154 }
155 pr_debug("enable_bigsur_l2irq: Invalid IRQ %d\n", irq);
156}
157
158static void mask_and_ack_bigsur(unsigned int irq)
159{
160 pr_debug("mask_and_ack_bigsur IRQ %d\n", irq);
161 if(irq >= BIGSUR_IRQ_LOW && irq < BIGSUR_IRQ_HIGH)
162 disable_bigsur_l1irq(irq);
163 else
164 disable_bigsur_l2irq(irq);
165}
166
167static void end_bigsur_irq(unsigned int irq)
168{
169 pr_debug("end_bigsur_irq IRQ %d\n", irq);
170 if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) {
171 if(irq >= BIGSUR_IRQ_LOW && irq < BIGSUR_IRQ_HIGH)
172 enable_bigsur_l1irq(irq);
173 else
174 enable_bigsur_l2irq(irq);
175 }
176}
177
178static unsigned int startup_bigsur_irq(unsigned int irq)
179{
180 u8 mask;
181 u32 reg;
182
183 pr_debug("startup_bigsur_irq IRQ %d\n", irq);
184
185 if(irq >= BIGSUR_IRQ_LOW && irq < BIGSUR_IRQ_HIGH) {
186 /* Enable the L1 IRQ */
187 enable_bigsur_l1irq(irq);
188 /* Enable all L2 IRQs in this L1 IRQ */
189 mask = ~(bigsur_l2irq_mask[irq-BIGSUR_IRQ_LOW]);
190 reg = imr_base - bigsur_l2irq_reg[irq-BIGSUR_IRQ_LOW] * imr_offset;
191 mask &= inb(reg);
192 outb(mask,reg);
193 DIPRINTK(2,"startup_bigsur_irq: IMR=0x%08x mask=0x%x\n",reg,inb(reg));
194 }
195 else {
196 /* Enable the L2 IRQ - clear mask bit */
197 enable_bigsur_l2irq(irq);
198 /* Enable the L1 bit masking this L2 IRQ */
199 enable_bigsur_l1irq(bigsur_l2_l1_map[irq-BIGSUR_2NDLVL_IRQ_LOW]);
200 DIPRINTK(2,"startup_bigsur_irq: L1=%d L2=%d\n",
201 bigsur_l2_l1_map[irq-BIGSUR_2NDLVL_IRQ_LOW],irq);
202 }
203 return 0;
204}
205
206static void shutdown_bigsur_irq(unsigned int irq)
207{
208 pr_debug("shutdown_bigsur_irq IRQ %d\n", irq);
209 if(irq >= BIGSUR_IRQ_LOW && irq < BIGSUR_IRQ_HIGH)
210 disable_bigsur_l1irq(irq);
211 else
212 disable_bigsur_l2irq(irq);
213}
214
215/* Define the IRQ structures for the L1 and L2 IRQ types */
216static struct hw_interrupt_type bigsur_l1irq_type = {
217 .typename = "BigSur-CPLD-Level1-IRQ",
218 .startup = startup_bigsur_irq,
219 .shutdown = shutdown_bigsur_irq,
220 .enable = enable_bigsur_l1irq,
221 .disable = disable_bigsur_l1irq,
222 .ack = mask_and_ack_bigsur,
223 .end = end_bigsur_irq
224};
225
226static struct hw_interrupt_type bigsur_l2irq_type = {
227 .typename = "BigSur-CPLD-Level2-IRQ",
228 .startup = startup_bigsur_irq,
229 .shutdown =shutdown_bigsur_irq,
230 .enable = enable_bigsur_l2irq,
231 .disable = disable_bigsur_l2irq,
232 .ack = mask_and_ack_bigsur,
233 .end = end_bigsur_irq
234};
235
236
237static void make_bigsur_l1isr(unsigned int irq) {
238
239 /* sanity check first */
240 if(irq >= BIGSUR_IRQ_LOW && irq < BIGSUR_IRQ_HIGH) {
241 /* save the handler in the main description table */
242 irq_desc[irq].chip = &bigsur_l1irq_type;
243 irq_desc[irq].status = IRQ_DISABLED;
244 irq_desc[irq].action = 0;
245 irq_desc[irq].depth = 1;
246
247 disable_bigsur_l1irq(irq);
248 return;
249 }
250 pr_debug("make_bigsur_l1isr: bad irq, %d\n", irq);
251 return;
252}
253
254static void make_bigsur_l2isr(unsigned int irq) {
255
256 /* sanity check first */
257 if(irq >= BIGSUR_2NDLVL_IRQ_LOW && irq < BIGSUR_2NDLVL_IRQ_HIGH) {
258 /* save the handler in the main description table */
259 irq_desc[irq].chip = &bigsur_l2irq_type;
260 irq_desc[irq].status = IRQ_DISABLED;
261 irq_desc[irq].action = 0;
262 irq_desc[irq].depth = 1;
263
264 disable_bigsur_l2irq(irq);
265 return;
266 }
267 pr_debug("make_bigsur_l2isr: bad irq, %d\n", irq);
268 return;
269}
270
271/* The IRQ's will be decoded as follows:
272 * If a level 2 handler exists and there is an unmasked active
273 * IRQ, the 2nd level handler will be called.
274 * If a level 2 handler does not exist for the active IRQ
275 * the 1st level handler will be called.
276 */
277
278int bigsur_irq_demux(int irq)
279{
280 int dmux_irq = irq;
281 u8 mask, actv_irqs;
282 u32 reg_num;
283
284 DIPRINTK(3,"bigsur_irq_demux, irq=%d\n", irq);
285 /* decode the 1st level IRQ */
286 if(irq >= BIGSUR_IRQ_LOW && irq < BIGSUR_IRQ_HIGH) {
287 /* Get corresponding L2 ISR bitmask and ISR number */
288 mask = bigsur_l2irq_mask[irq-BIGSUR_IRQ_LOW];
289 reg_num = bigsur_l2irq_reg[irq-BIGSUR_IRQ_LOW];
290 /* find the active IRQ's (XOR with inactive level)*/
291 actv_irqs = inb(isr_base-reg_num*isr_offset) ^
292 bigsur_l2_inactv_state[reg_num];
293 /* decode active IRQ's */
294 actv_irqs = actv_irqs & mask & ~(inb(imr_base-reg_num*imr_offset));
295 /* if NEZ then we have an active L2 IRQ */
296 if(actv_irqs) dmux_irq = ffz(~actv_irqs) + reg_num*8+BIGSUR_2NDLVL_IRQ_LOW;
297 /* if no 2nd level IRQ action, but has 1st level, use 1st level handler */
298 if(!irq_desc[dmux_irq].action && irq_desc[irq].action)
299 dmux_irq = irq;
300 DIPRINTK(1,"bigsur_irq_demux: irq=%d dmux_irq=%d mask=0x%04x reg=%d\n",
301 irq, dmux_irq, mask, reg_num);
302 }
303#ifdef CONFIG_HD64465
304 dmux_irq = hd64465_irq_demux(dmux_irq);
305#endif /* CONFIG_HD64465 */
306 DIPRINTK(3,"bigsur_irq_demux, demux_irq=%d\n", dmux_irq);
307
308 return dmux_irq;
309}
310
311/*===========================================================*/
312// Big Sur Init Routines
313/*===========================================================*/
314void __init init_bigsur_IRQ(void)
315{
316 int i;
317
318 if (!MACH_BIGSUR) return;
319
320 /* Create ISR's for Big Sur CPLD IRQ's */
321 /*==============================================================*/
322 for(i=BIGSUR_IRQ_LOW;i<BIGSUR_IRQ_HIGH;i++)
323 make_bigsur_l1isr(i);
324
325 printk(KERN_INFO "Big Sur CPLD L1 interrupts %d to %d.\n",
326 BIGSUR_IRQ_LOW,BIGSUR_IRQ_HIGH);
327
328 for(i=BIGSUR_2NDLVL_IRQ_LOW;i<BIGSUR_2NDLVL_IRQ_HIGH;i++)
329 make_bigsur_l2isr(i);
330
331 printk(KERN_INFO "Big Sur CPLD L2 interrupts %d to %d.\n",
332 BIGSUR_2NDLVL_IRQ_LOW,BIGSUR_2NDLVL_IRQ_HIGH);
333
334}
diff --git a/arch/sh/boards/bigsur/led.c b/arch/sh/boards/bigsur/led.c
deleted file mode 100644
index d221439aafcc..000000000000
--- a/arch/sh/boards/bigsur/led.c
+++ /dev/null
@@ -1,54 +0,0 @@
1/*
2 * linux/arch/sh/boards/bigsur/led.c
3 *
4 * By Dustin McIntire (dustin@sensoria.com) (c)2001
5 * Derived from led_se.c and led.c, which bore the message:
6 * Copyright (C) 2000 Stuart Menefy <stuart.menefy@st.com>
7 *
8 * May be copied or modified under the terms of the GNU General Public
9 * License. See linux/COPYING for more information.
10 *
11 * This file contains Big Sur specific LED code.
12 */
13
14#include <asm/io.h>
15#include <asm/bigsur/bigsur.h>
16
17static void mach_led(int position, int value)
18{
19 int word;
20
21 word = bigsur_inl(BIGSUR_CSLR);
22 if (value) {
23 bigsur_outl(word & ~BIGSUR_LED, BIGSUR_CSLR);
24 } else {
25 bigsur_outl(word | BIGSUR_LED, BIGSUR_CSLR);
26 }
27}
28
29#ifdef CONFIG_HEARTBEAT
30
31#include <linux/sched.h>
32
33/* Cycle the LED on/off */
34void heartbeat_bigsur(void)
35{
36 static unsigned cnt = 0, period = 0, dist = 0;
37
38 if (cnt == 0 || cnt == dist)
39 mach_led( -1, 1);
40 else if (cnt == 7 || cnt == dist+7)
41 mach_led( -1, 0);
42
43 if (++cnt > period) {
44 cnt = 0;
45 /* The hyperbolic function below modifies the heartbeat period
46 * length in dependency of the current (5min) load. It goes
47 * through the points f(0)=126, f(1)=86, f(5)=51,
48 * f(inf)->30. */
49 period = ((672<<FSHIFT)/(5*avenrun[0]+(7<<FSHIFT))) + 30;
50 dist = period / 4;
51 }
52}
53#endif /* CONFIG_HEARTBEAT */
54
diff --git a/arch/sh/boards/bigsur/setup.c b/arch/sh/boards/bigsur/setup.c
deleted file mode 100644
index 9711c20fc9e4..000000000000
--- a/arch/sh/boards/bigsur/setup.c
+++ /dev/null
@@ -1,88 +0,0 @@
1/*
2 *
3 * By Dustin McIntire (dustin@sensoria.com) (c)2001
4 *
5 * Setup and IRQ handling code for the HD64465 companion chip.
6 * by Greg Banks <gbanks@pocketpenguins.com>
7 * Copyright (c) 2000 PocketPenguins Inc
8 *
9 * Derived from setup_hd64465.c which bore the message:
10 * Greg Banks <gbanks@pocketpenguins.com>
11 * Copyright (c) 2000 PocketPenguins Inc and
12 * Copyright (C) 2000 YAEGASHI Takeshi
13 * and setup_cqreek.c which bore message:
14 * Copyright (C) 2000 Niibe Yutaka
15 *
16 * May be copied or modified under the terms of the GNU General Public
17 * License. See linux/COPYING for more information.
18 *
19 * Setup functions for a Hitachi Big Sur Evaluation Board.
20 *
21 */
22
23#include <linux/sched.h>
24#include <linux/module.h>
25#include <linux/kernel.h>
26#include <linux/param.h>
27#include <linux/ioport.h>
28#include <linux/interrupt.h>
29#include <linux/init.h>
30#include <linux/irq.h>
31#include <linux/bitops.h>
32
33#include <asm/io.h>
34#include <asm/irq.h>
35#include <asm/machvec.h>
36#include <asm/bigsur/io.h>
37#include <asm/hd64465/hd64465.h>
38#include <asm/bigsur/bigsur.h>
39
40/*===========================================================*/
41// Big Sur Init Routines
42/*===========================================================*/
43
44static void __init bigsur_setup(char **cmdline_p)
45{
46 /* Mask all 2nd level IRQ's */
47 outb(-1,BIGSUR_IMR0);
48 outb(-1,BIGSUR_IMR1);
49 outb(-1,BIGSUR_IMR2);
50 outb(-1,BIGSUR_IMR3);
51
52 /* Mask 1st level interrupts */
53 outb(-1,BIGSUR_IRLMR0);
54 outb(-1,BIGSUR_IRLMR1);
55
56#if defined (CONFIG_HD64465) && defined (CONFIG_SERIAL)
57 /* remap IO ports for first ISA serial port to HD64465 UART */
58 bigsur_port_map(0x3f8, 8, CONFIG_HD64465_IOBASE + 0x8000, 1);
59#endif /* CONFIG_HD64465 && CONFIG_SERIAL */
60 /* TODO: setup IDE registers */
61 bigsur_port_map(BIGSUR_IDECTL_IOPORT, 2, BIGSUR_ICTL, 8);
62 /* Setup the Ethernet port to BIGSUR_ETHER_IOPORT */
63 bigsur_port_map(BIGSUR_ETHER_IOPORT, 16, BIGSUR_ETHR+BIGSUR_ETHER_IOPORT, 0);
64 /* set page to 1 */
65 outw(1, BIGSUR_ETHR+0xe);
66 /* set the IO port to BIGSUR_ETHER_IOPORT */
67 outw(BIGSUR_ETHER_IOPORT<<3, BIGSUR_ETHR+0x2);
68}
69
70/*
71 * The Machine Vector
72 */
73extern void heartbeat_bigsur(void);
74extern void init_bigsur_IRQ(void);
75
76struct sh_machine_vector mv_bigsur __initmv = {
77 .mv_name = "Big Sur",
78 .mv_setup = bigsur_setup,
79
80 .mv_isa_port2addr = bigsur_isa_port2addr,
81 .mv_irq_demux = bigsur_irq_demux,
82
83 .mv_init_irq = init_bigsur_IRQ,
84#ifdef CONFIG_HEARTBEAT
85 .mv_heartbeat = heartbeat_bigsur,
86#endif
87};
88ALIAS_MV(bigsur)
diff --git a/arch/sh/boards/ec3104/Makefile b/arch/sh/boards/ec3104/Makefile
deleted file mode 100644
index 178891534b67..000000000000
--- a/arch/sh/boards/ec3104/Makefile
+++ /dev/null
@@ -1,6 +0,0 @@
1#
2# Makefile for the EC3104 specific parts of the kernel
3#
4
5obj-y := setup.o io.o irq.o
6
diff --git a/arch/sh/boards/ec3104/io.c b/arch/sh/boards/ec3104/io.c
deleted file mode 100644
index 2f86394b280b..000000000000
--- a/arch/sh/boards/ec3104/io.c
+++ /dev/null
@@ -1,81 +0,0 @@
1/*
2 * linux/arch/sh/boards/ec3104/io.c
3 * EC3104 companion chip support
4 *
5 * Copyright (C) 2000 Philipp Rumpf <prumpf@tux.org>
6 *
7 */
8/* EC3104 note:
9 * This code was written without any documentation about the EC3104 chip. While
10 * I hope I got most of the basic functionality right, the register names I use
11 * are most likely completely different from those in the chip documentation.
12 *
13 * If you have any further information about the EC3104, please tell me
14 * (prumpf@tux.org).
15 */
16
17#include <linux/kernel.h>
18#include <linux/types.h>
19#include <asm/io.h>
20#include <asm/page.h>
21#include <asm/ec3104/ec3104.h>
22
23/*
24 * EC3104 has a real ISA bus which we redirect low port accesses to (the
25 * actual device on mine is a ESS 1868, and I don't want to hack the driver
26 * more than strictly necessary). I am not going to duplicate the
27 * hard coding of PC addresses (for the 16550s aso) here though; it's just
28 * too ugly.
29 */
30
31#define low_port(port) ((port) < 0x10000)
32
33static inline unsigned long port2addr(unsigned long port)
34{
35 switch(port >> 16) {
36 case 0:
37 return EC3104_ISA_BASE + port * 2;
38
39 /* XXX hack. it's unclear what to do about the serial ports */
40 case 1:
41 return EC3104_BASE + (port&0xffff) * 4;
42
43 default:
44 /* XXX PCMCIA */
45 return 0;
46 }
47}
48
49unsigned char ec3104_inb(unsigned long port)
50{
51 u8 ret;
52
53 ret = *(volatile u8 *)port2addr(port);
54
55 return ret;
56}
57
58unsigned short ec3104_inw(unsigned long port)
59{
60 BUG();
61}
62
63unsigned long ec3104_inl(unsigned long port)
64{
65 BUG();
66}
67
68void ec3104_outb(unsigned char data, unsigned long port)
69{
70 *(volatile u8 *)port2addr(port) = data;
71}
72
73void ec3104_outw(unsigned short data, unsigned long port)
74{
75 BUG();
76}
77
78void ec3104_outl(unsigned long data, unsigned long port)
79{
80 BUG();
81}
diff --git a/arch/sh/boards/ec3104/irq.c b/arch/sh/boards/ec3104/irq.c
deleted file mode 100644
index ffa4ff1f090f..000000000000
--- a/arch/sh/boards/ec3104/irq.c
+++ /dev/null
@@ -1,196 +0,0 @@
1/*
2 * linux/arch/sh/boards/ec3104/irq.c
3 * EC3104 companion chip support
4 *
5 * Copyright (C) 2000 Philipp Rumpf <prumpf@tux.org>
6 *
7 */
8
9#include <asm/io.h>
10#include <asm/irq.h>
11#include <asm/ec3104/ec3104.h>
12
13/* This is for debugging mostly; here's the table that I intend to keep
14 * in here:
15 *
16 * index function base addr power interrupt bit
17 * 0 power b0ec0000 --- 00000001 (unused)
18 * 1 irqs b0ec1000 --- 00000002 (unused)
19 * 2 ?? b0ec2000 b0ec0008 00000004
20 * 3 PS2 (1) b0ec3000 b0ec000c 00000008
21 * 4 PS2 (2) b0ec4000 b0ec0010 00000010
22 * 5 ?? b0ec5000 b0ec0014 00000020
23 * 6 I2C b0ec6000 b0ec0018 00000040
24 * 7 serial (1) b0ec7000 b0ec001c 00000080
25 * 8 serial (2) b0ec8000 b0ec0020 00000100
26 * 9 serial (3) b0ec9000 b0ec0024 00000200
27 * 10 serial (4) b0eca000 b0ec0028 00000400
28 * 12 GPIO (1) b0ecc000 b0ec0030
29 * 13 GPIO (2) b0ecc000 b0ec0030
30 * 16 pcmcia (1) b0ed0000 b0ec0040 00010000
31 * 17 pcmcia (2) b0ed1000 b0ec0044 00020000
32 */
33
34/* I used the register names from another interrupt controller I worked with,
35 * since it seems to be identical to the ec3104 except that all bits are
36 * inverted:
37 *
38 * IRR: Interrupt Request Register (pending and enabled interrupts)
39 * IMR: Interrupt Mask Register (which interrupts are enabled)
40 * IPR: Interrupt Pending Register (pending interrupts, even disabled ones)
41 *
42 * 0 bits mean pending or enabled, 1 bits mean not pending or disabled. all
43 * IRQs seem to be level-triggered.
44 */
45
46#define EC3104_IRR (EC3104_BASE + 0x1000)
47#define EC3104_IMR (EC3104_BASE + 0x1004)
48#define EC3104_IPR (EC3104_BASE + 0x1008)
49
50#define ctrl_readl(addr) (*(volatile u32 *)(addr))
51#define ctrl_writel(data,addr) (*(volatile u32 *)(addr) = (data))
52#define ctrl_readb(addr) (*(volatile u8 *)(addr))
53
54static char *ec3104_name(unsigned index)
55{
56 switch(index) {
57 case 0:
58 return "power management";
59 case 1:
60 return "interrupts";
61 case 3:
62 return "PS2 (1)";
63 case 4:
64 return "PS2 (2)";
65 case 5:
66 return "I2C (1)";
67 case 6:
68 return "I2C (2)";
69 case 7:
70 return "serial (1)";
71 case 8:
72 return "serial (2)";
73 case 9:
74 return "serial (3)";
75 case 10:
76 return "serial (4)";
77 case 16:
78 return "pcmcia (1)";
79 case 17:
80 return "pcmcia (2)";
81 default: {
82 static char buf[32];
83
84 sprintf(buf, "unknown (%d)", index);
85
86 return buf;
87 }
88 }
89}
90
91int get_pending_interrupts(char *buf)
92{
93 u32 ipr;
94 u32 bit;
95 char *p = buf;
96
97 p += sprintf(p, "pending: (");
98
99 ipr = ctrl_inl(EC3104_IPR);
100
101 for (bit = 1; bit < 32; bit++)
102 if (!(ipr & (1<<bit)))
103 p += sprintf(p, "%s ", ec3104_name(bit));
104
105 p += sprintf(p, ")\n");
106
107 return p - buf;
108}
109
110static inline u32 ec3104_irq2mask(unsigned int irq)
111{
112 return (1 << (irq - EC3104_IRQBASE));
113}
114
115static inline void mask_ec3104_irq(unsigned int irq)
116{
117 u32 mask;
118
119 mask = ctrl_readl(EC3104_IMR);
120
121 mask |= ec3104_irq2mask(irq);
122
123 ctrl_writel(mask, EC3104_IMR);
124}
125
126static inline void unmask_ec3104_irq(unsigned int irq)
127{
128 u32 mask;
129
130 mask = ctrl_readl(EC3104_IMR);
131
132 mask &= ~ec3104_irq2mask(irq);
133
134 ctrl_writel(mask, EC3104_IMR);
135}
136
137static void disable_ec3104_irq(unsigned int irq)
138{
139 mask_ec3104_irq(irq);
140}
141
142static void enable_ec3104_irq(unsigned int irq)
143{
144 unmask_ec3104_irq(irq);
145}
146
147static void mask_and_ack_ec3104_irq(unsigned int irq)
148{
149 mask_ec3104_irq(irq);
150}
151
152static void end_ec3104_irq(unsigned int irq)
153{
154 if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
155 unmask_ec3104_irq(irq);
156}
157
158static unsigned int startup_ec3104_irq(unsigned int irq)
159{
160 unmask_ec3104_irq(irq);
161
162 return 0;
163}
164
165static void shutdown_ec3104_irq(unsigned int irq)
166{
167 mask_ec3104_irq(irq);
168
169}
170
171static struct hw_interrupt_type ec3104_int = {
172 .typename = "EC3104",
173 .enable = enable_ec3104_irq,
174 .disable = disable_ec3104_irq,
175 .ack = mask_and_ack_ec3104_irq,
176 .end = end_ec3104_irq,
177 .startup = startup_ec3104_irq,
178 .shutdown = shutdown_ec3104_irq,
179};
180
181/* Yuck. the _demux API is ugly */
182int ec3104_irq_demux(int irq)
183{
184 if (irq == EC3104_IRQ) {
185 unsigned int mask;
186
187 mask = ctrl_readl(EC3104_IRR);
188
189 if (mask == 0xffffffff)
190 return EC3104_IRQ;
191 else
192 return EC3104_IRQBASE + ffz(mask);
193 }
194
195 return irq;
196}
diff --git a/arch/sh/boards/ec3104/setup.c b/arch/sh/boards/ec3104/setup.c
deleted file mode 100644
index 902bc975a13e..000000000000
--- a/arch/sh/boards/ec3104/setup.c
+++ /dev/null
@@ -1,65 +0,0 @@
1/*
2 * linux/arch/sh/boards/ec3104/setup.c
3 * EC3104 companion chip support
4 *
5 * Copyright (C) 2000 Philipp Rumpf <prumpf@tux.org>
6 *
7 */
8/* EC3104 note:
9 * This code was written without any documentation about the EC3104 chip. While
10 * I hope I got most of the basic functionality right, the register names I use
11 * are most likely completely different from those in the chip documentation.
12 *
13 * If you have any further information about the EC3104, please tell me
14 * (prumpf@tux.org).
15 */
16
17#include <linux/sched.h>
18#include <linux/kernel.h>
19#include <linux/param.h>
20#include <linux/interrupt.h>
21#include <linux/init.h>
22#include <linux/irq.h>
23#include <linux/types.h>
24#include <asm/io.h>
25#include <asm/irq.h>
26#include <asm/machvec.h>
27#include <asm/mach/ec3104.h>
28
29static void __init ec3104_setup(char **cmdline_p)
30{
31 char str[8];
32 int i;
33
34 for (i=0; i<8; i++)
35 str[i] = ctrl_readb(EC3104_BASE + i);
36
37 for (i = EC3104_IRQBASE; i < EC3104_IRQBASE + 32; i++)
38 irq_desc[i].handler = &ec3104_int;
39
40 printk("initializing EC3104 \"%.8s\" at %08x, IRQ %d, IRQ base %d\n",
41 str, EC3104_BASE, EC3104_IRQ, EC3104_IRQBASE);
42
43 /* mask all interrupts. this should have been done by the boot
44 * loader for us but we want to be sure ... */
45 ctrl_writel(0xffffffff, EC3104_IMR);
46}
47
48/*
49 * The Machine Vector
50 */
51struct sh_machine_vector mv_ec3104 __initmv = {
52 .mv_name = "EC3104",
53 .mv_setup = ec3104_setup,
54 .mv_nr_irqs = 96,
55
56 .mv_inb = ec3104_inb,
57 .mv_inw = ec3104_inw,
58 .mv_inl = ec3104_inl,
59 .mv_outb = ec3104_outb,
60 .mv_outw = ec3104_outw,
61 .mv_outl = ec3104_outl,
62
63 .mv_irq_demux = ec3104_irq_demux,
64};
65ALIAS_MV(ec3104)
diff --git a/arch/sh/boards/mpc1211/Makefile b/arch/sh/boards/mpc1211/Makefile
index 1644ebed78cb..8cd31b5d200b 100644
--- a/arch/sh/boards/mpc1211/Makefile
+++ b/arch/sh/boards/mpc1211/Makefile
@@ -2,7 +2,7 @@
2# Makefile for the Interface (CTP/PCI/MPC-SH02) specific parts of the kernel 2# Makefile for the Interface (CTP/PCI/MPC-SH02) specific parts of the kernel
3# 3#
4 4
5obj-y := setup.o rtc.o led.o 5obj-y := setup.o rtc.o
6 6
7obj-$(CONFIG_PCI) += pci.o 7obj-$(CONFIG_PCI) += pci.o
8 8
diff --git a/arch/sh/boards/mpc1211/led.c b/arch/sh/boards/mpc1211/led.c
deleted file mode 100644
index 8df1591823d6..000000000000
--- a/arch/sh/boards/mpc1211/led.c
+++ /dev/null
@@ -1,63 +0,0 @@
1/*
2 * linux/arch/sh/boards/mpc1211/led.c
3 *
4 * Copyright (C) 2001 Saito.K & Jeanne
5 *
6 * This file contains Interface MPC-1211 specific LED code.
7 */
8
9
10static void mach_led(int position, int value)
11{
12 volatile unsigned char* p = (volatile unsigned char*)0xa2000000;
13
14 if (value) {
15 *p |= 1;
16 } else {
17 *p &= ~1;
18 }
19}
20
21#ifdef CONFIG_HEARTBEAT
22
23#include <linux/sched.h>
24
25/* Cycle the LED's in the clasic Knightrider/Sun pattern */
26void heartbeat_mpc1211(void)
27{
28 static unsigned int cnt = 0, period = 0;
29 volatile unsigned char* p = (volatile unsigned char*)0xa2000000;
30 static unsigned bit = 0, up = 1;
31
32 cnt += 1;
33 if (cnt < period) {
34 return;
35 }
36
37 cnt = 0;
38
39 /* Go through the points (roughly!):
40 * f(0)=10, f(1)=16, f(2)=20, f(5)=35,f(inf)->110
41 */
42 period = 110 - ( (300<<FSHIFT)/
43 ((avenrun[0]/5) + (3<<FSHIFT)) );
44
45 if (up) {
46 if (bit == 7) {
47 bit--;
48 up=0;
49 } else {
50 bit ++;
51 }
52 } else {
53 if (bit == 0) {
54 bit++;
55 up=1;
56 } else {
57 bit--;
58 }
59 }
60 *p = 1<<bit;
61
62}
63#endif /* CONFIG_HEARTBEAT */
diff --git a/arch/sh/boards/mpc1211/setup.c b/arch/sh/boards/mpc1211/setup.c
index 7c3d1d304157..1a0604b23ce0 100644
--- a/arch/sh/boards/mpc1211/setup.c
+++ b/arch/sh/boards/mpc1211/setup.c
@@ -10,6 +10,7 @@
10#include <linux/hdreg.h> 10#include <linux/hdreg.h>
11#include <linux/ide.h> 11#include <linux/ide.h>
12#include <linux/interrupt.h> 12#include <linux/interrupt.h>
13#include <linux/platform_device.h>
13#include <asm/io.h> 14#include <asm/io.h>
14#include <asm/machvec.h> 15#include <asm/machvec.h>
15#include <asm/mpc1211/mpc1211.h> 16#include <asm/mpc1211/mpc1211.h>
@@ -281,6 +282,32 @@ static int put_smb_blk(unsigned char *p, int address, int command, int no)
281 return 0; 282 return 0;
282} 283}
283 284
285static struct resource heartbeat_resources[] = {
286 [0] = {
287 .start = 0xa2000000,
288 .end = 0xa2000000 + 8 - 1,
289 .flags = IORESOURCE_MEM,
290 },
291};
292
293static struct platform_device heartbeat_device = {
294 .name = "heartbeat",
295 .id = -1,
296 .num_resources = ARRAY_SIZE(heartbeat_resources),
297 .resource = heartbeat_resources,
298};
299
300static struct platform_device *mpc1211_devices[] __initdata = {
301 &heartbeat_device,
302};
303
304static int __init mpc1211_devices_setup(void)
305{
306 return platform_add_devices(mpc1211_devices,
307 ARRAY_SIZE(mpc1211_devices));
308}
309__initcall(mpc1211_devices_setup);
310
284/* arch/sh/boards/mpc1211/rtc.c */ 311/* arch/sh/boards/mpc1211/rtc.c */
285void mpc1211_time_init(void); 312void mpc1211_time_init(void);
286 313
@@ -317,9 +344,5 @@ struct sh_machine_vector mv_mpc1211 __initmv = {
317 .mv_nr_irqs = 48, 344 .mv_nr_irqs = 48,
318 .mv_irq_demux = mpc1211_irq_demux, 345 .mv_irq_demux = mpc1211_irq_demux,
319 .mv_init_irq = init_mpc1211_IRQ, 346 .mv_init_irq = init_mpc1211_IRQ,
320
321#ifdef CONFIG_HEARTBEAT
322 .mv_heartbeat = heartbeat_mpc1211,
323#endif
324}; 347};
325ALIAS_MV(mpc1211) 348ALIAS_MV(mpc1211)
diff --git a/arch/sh/boards/renesas/r7780rp/Makefile b/arch/sh/boards/renesas/r7780rp/Makefile
index 574b0316ed56..3c93012e91a3 100644
--- a/arch/sh/boards/renesas/r7780rp/Makefile
+++ b/arch/sh/boards/renesas/r7780rp/Makefile
@@ -4,5 +4,4 @@
4 4
5obj-y := setup.o io.o irq.o 5obj-y := setup.o io.o irq.o
6 6
7obj-$(CONFIG_HEARTBEAT) += led.o
8obj-$(CONFIG_PUSH_SWITCH) += psw.o 7obj-$(CONFIG_PUSH_SWITCH) += psw.o
diff --git a/arch/sh/boards/renesas/r7780rp/io.c b/arch/sh/boards/renesas/r7780rp/io.c
index 311ccccba718..f74d2ffb3851 100644
--- a/arch/sh/boards/renesas/r7780rp/io.c
+++ b/arch/sh/boards/renesas/r7780rp/io.c
@@ -11,22 +11,9 @@
11#include <linux/pci.h> 11#include <linux/pci.h>
12#include <linux/kernel.h> 12#include <linux/kernel.h>
13#include <linux/types.h> 13#include <linux/types.h>
14#include <linux/io.h>
14#include <asm/r7780rp.h> 15#include <asm/r7780rp.h>
15#include <asm/addrspace.h> 16#include <asm/addrspace.h>
16#include <asm/io.h>
17
18static inline unsigned long port2adr(unsigned int port)
19{
20 if ((0x1f0 <= port && port < 0x1f8) || port == 0x3f6)
21 if (port == 0x3f6)
22 return (PA_AREA5_IO + 0x80c);
23 else
24 return (PA_AREA5_IO + 0x1000 + ((port-0x1f0) << 1));
25 else
26 maybebadio((unsigned long)port);
27
28 return port;
29}
30 17
31static inline unsigned long port88796l(unsigned int port, int flag) 18static inline unsigned long port88796l(unsigned int port, int flag)
32{ 19{
@@ -40,18 +27,6 @@ static inline unsigned long port88796l(unsigned int port, int flag)
40 return addr; 27 return addr;
41} 28}
42 29
43/* The 7780 R7780RP-1 seems to have everything hooked */
44/* up pretty normally (nothing on high-bytes only...) so this */
45/* shouldn't be needed */
46static inline int shifted_port(unsigned long port)
47{
48 /* For IDE registers, value is not shifted */
49 if ((0x1f0 <= port && port < 0x1f8) || port == 0x3f6)
50 return 0;
51 else
52 return 1;
53}
54
55#if defined(CONFIG_NE2000) || defined(CONFIG_NE2000_MODULE) 30#if defined(CONFIG_NE2000) || defined(CONFIG_NE2000_MODULE)
56#define CHECK_AX88796L_PORT(port) \ 31#define CHECK_AX88796L_PORT(port) \
57 ((port >= AX88796L_IO_BASE) && (port < (AX88796L_IO_BASE+0x20))) 32 ((port >= AX88796L_IO_BASE) && (port < (AX88796L_IO_BASE+0x20)))
@@ -70,12 +45,10 @@ u8 r7780rp_inb(unsigned long port)
70{ 45{
71 if (CHECK_AX88796L_PORT(port)) 46 if (CHECK_AX88796L_PORT(port))
72 return ctrl_inw(port88796l(port, 0)) & 0xff; 47 return ctrl_inw(port88796l(port, 0)) & 0xff;
73 else if (PXSEG(port)) 48 else if (is_pci_ioaddr(port))
74 return ctrl_inb(port);
75 else if (is_pci_ioaddr(port) || shifted_port(port))
76 return ctrl_inb(pci_ioaddr(port)); 49 return ctrl_inb(pci_ioaddr(port));
77 50
78 return ctrl_inw(port2adr(port)) & 0xff; 51 return ctrl_inw(port) & 0xff;
79} 52}
80 53
81u8 r7780rp_inb_p(unsigned long port) 54u8 r7780rp_inb_p(unsigned long port)
@@ -84,12 +57,10 @@ u8 r7780rp_inb_p(unsigned long port)
84 57
85 if (CHECK_AX88796L_PORT(port)) 58 if (CHECK_AX88796L_PORT(port))
86 v = ctrl_inw(port88796l(port, 0)) & 0xff; 59 v = ctrl_inw(port88796l(port, 0)) & 0xff;
87 else if (PXSEG(port)) 60 else if (is_pci_ioaddr(port))
88 v = ctrl_inb(port);
89 else if (is_pci_ioaddr(port) || shifted_port(port))
90 v = ctrl_inb(pci_ioaddr(port)); 61 v = ctrl_inb(pci_ioaddr(port));
91 else 62 else
92 v = ctrl_inw(port2adr(port)) & 0xff; 63 v = ctrl_inw(port) & 0xff;
93 64
94 ctrl_delay(); 65 ctrl_delay();
95 66
@@ -98,80 +69,56 @@ u8 r7780rp_inb_p(unsigned long port)
98 69
99u16 r7780rp_inw(unsigned long port) 70u16 r7780rp_inw(unsigned long port)
100{ 71{
101 if (CHECK_AX88796L_PORT(port)) 72 if (is_pci_ioaddr(port))
102 maybebadio(port);
103 else if (PXSEG(port))
104 return ctrl_inw(port);
105 else if (is_pci_ioaddr(port) || shifted_port(port))
106 return ctrl_inw(pci_ioaddr(port)); 73 return ctrl_inw(pci_ioaddr(port));
107 else
108 maybebadio(port);
109 74
110 return 0; 75 return ctrl_inw(port);
111} 76}
112 77
113u32 r7780rp_inl(unsigned long port) 78u32 r7780rp_inl(unsigned long port)
114{ 79{
115 if (CHECK_AX88796L_PORT(port)) 80 if (is_pci_ioaddr(port))
116 maybebadio(port);
117 else if (PXSEG(port))
118 return ctrl_inl(port);
119 else if (is_pci_ioaddr(port) || shifted_port(port))
120 return ctrl_inl(pci_ioaddr(port)); 81 return ctrl_inl(pci_ioaddr(port));
121 else
122 maybebadio(port);
123 82
124 return 0; 83 return ctrl_inl(port);
125} 84}
126 85
127void r7780rp_outb(u8 value, unsigned long port) 86void r7780rp_outb(u8 value, unsigned long port)
128{ 87{
129 if (CHECK_AX88796L_PORT(port)) 88 if (CHECK_AX88796L_PORT(port))
130 ctrl_outw(value, port88796l(port, 0)); 89 ctrl_outw(value, port88796l(port, 0));
131 else if (PXSEG(port)) 90 else if (is_pci_ioaddr(port))
132 ctrl_outb(value, port);
133 else if (is_pci_ioaddr(port) || shifted_port(port))
134 ctrl_outb(value, pci_ioaddr(port)); 91 ctrl_outb(value, pci_ioaddr(port));
135 else 92 else
136 ctrl_outw(value, port2adr(port)); 93 ctrl_outb(value, port);
137} 94}
138 95
139void r7780rp_outb_p(u8 value, unsigned long port) 96void r7780rp_outb_p(u8 value, unsigned long port)
140{ 97{
141 if (CHECK_AX88796L_PORT(port)) 98 if (CHECK_AX88796L_PORT(port))
142 ctrl_outw(value, port88796l(port, 0)); 99 ctrl_outw(value, port88796l(port, 0));
143 else if (PXSEG(port)) 100 else if (is_pci_ioaddr(port))
144 ctrl_outb(value, port);
145 else if (is_pci_ioaddr(port) || shifted_port(port))
146 ctrl_outb(value, pci_ioaddr(port)); 101 ctrl_outb(value, pci_ioaddr(port));
147 else 102 else
148 ctrl_outw(value, port2adr(port)); 103 ctrl_outb(value, port);
149 104
150 ctrl_delay(); 105 ctrl_delay();
151} 106}
152 107
153void r7780rp_outw(u16 value, unsigned long port) 108void r7780rp_outw(u16 value, unsigned long port)
154{ 109{
155 if (CHECK_AX88796L_PORT(port)) 110 if (is_pci_ioaddr(port))
156 maybebadio(port);
157 else if (PXSEG(port))
158 ctrl_outw(value, port);
159 else if (is_pci_ioaddr(port) || shifted_port(port))
160 ctrl_outw(value, pci_ioaddr(port)); 111 ctrl_outw(value, pci_ioaddr(port));
161 else 112 else
162 maybebadio(port); 113 ctrl_outw(value, port);
163} 114}
164 115
165void r7780rp_outl(u32 value, unsigned long port) 116void r7780rp_outl(u32 value, unsigned long port)
166{ 117{
167 if (CHECK_AX88796L_PORT(port)) 118 if (is_pci_ioaddr(port))
168 maybebadio(port);
169 else if (PXSEG(port))
170 ctrl_outl(value, port);
171 else if (is_pci_ioaddr(port) || shifted_port(port))
172 ctrl_outl(value, pci_ioaddr(port)); 119 ctrl_outl(value, pci_ioaddr(port));
173 else 120 else
174 maybebadio(port); 121 ctrl_outl(value, port);
175} 122}
176 123
177void r7780rp_insb(unsigned long port, void *dst, unsigned long count) 124void r7780rp_insb(unsigned long port, void *dst, unsigned long count)
@@ -183,16 +130,13 @@ void r7780rp_insb(unsigned long port, void *dst, unsigned long count)
183 p = (volatile u16 *)port88796l(port, 0); 130 p = (volatile u16 *)port88796l(port, 0);
184 while (count--) 131 while (count--)
185 *buf++ = *p & 0xff; 132 *buf++ = *p & 0xff;
186 } else if (PXSEG(port)) { 133 } else if (is_pci_ioaddr(port)) {
187 while (count--)
188 *buf++ = *(volatile u8 *)port;
189 } else if (is_pci_ioaddr(port) || shifted_port(port)) {
190 volatile u8 *bp = (volatile u8 *)pci_ioaddr(port); 134 volatile u8 *bp = (volatile u8 *)pci_ioaddr(port);
191 135
192 while (count--) 136 while (count--)
193 *buf++ = *bp; 137 *buf++ = *bp;
194 } else { 138 } else {
195 p = (volatile u16 *)port2adr(port); 139 p = (volatile u16 *)port;
196 while (count--) 140 while (count--)
197 *buf++ = *p & 0xff; 141 *buf++ = *p & 0xff;
198 } 142 }
@@ -205,30 +149,26 @@ void r7780rp_insw(unsigned long port, void *dst, unsigned long count)
205 149
206 if (CHECK_AX88796L_PORT(port)) 150 if (CHECK_AX88796L_PORT(port))
207 p = (volatile u16 *)port88796l(port, 1); 151 p = (volatile u16 *)port88796l(port, 1);
208 else if (PXSEG(port)) 152 else if (is_pci_ioaddr(port))
209 p = (volatile u16 *)port;
210 else if (is_pci_ioaddr(port) || shifted_port(port))
211 p = (volatile u16 *)pci_ioaddr(port); 153 p = (volatile u16 *)pci_ioaddr(port);
212 else 154 else
213 p = (volatile u16 *)port2adr(port); 155 p = (volatile u16 *)port;
214 156
215 while (count--) 157 while (count--)
216 *buf++ = *p; 158 *buf++ = *p;
159
160 flush_dcache_all();
217} 161}
218 162
219void r7780rp_insl(unsigned long port, void *dst, unsigned long count) 163void r7780rp_insl(unsigned long port, void *dst, unsigned long count)
220{ 164{
221 u32 *buf = dst; 165 if (is_pci_ioaddr(port)) {
222
223 if (CHECK_AX88796L_PORT(port))
224 maybebadio(port);
225 else if (is_pci_ioaddr(port) || shifted_port(port)) {
226 volatile u32 *p = (volatile u32 *)pci_ioaddr(port); 166 volatile u32 *p = (volatile u32 *)pci_ioaddr(port);
167 u32 *buf = dst;
227 168
228 while (count--) 169 while (count--)
229 *buf++ = *p; 170 *buf++ = *p;
230 } else 171 }
231 maybebadio(port);
232} 172}
233 173
234void r7780rp_outsb(unsigned long port, const void *src, unsigned long count) 174void r7780rp_outsb(unsigned long port, const void *src, unsigned long count)
@@ -240,19 +180,14 @@ void r7780rp_outsb(unsigned long port, const void *src, unsigned long count)
240 p = (volatile u16 *)port88796l(port, 0); 180 p = (volatile u16 *)port88796l(port, 0);
241 while (count--) 181 while (count--)
242 *p = *buf++; 182 *p = *buf++;
243 } else if (PXSEG(port)) 183 } else if (is_pci_ioaddr(port)) {
244 while (count--)
245 ctrl_outb(*buf++, port);
246 else if (is_pci_ioaddr(port) || shifted_port(port)) {
247 volatile u8 *bp = (volatile u8 *)pci_ioaddr(port); 184 volatile u8 *bp = (volatile u8 *)pci_ioaddr(port);
248 185
249 while (count--) 186 while (count--)
250 *bp = *buf++; 187 *bp = *buf++;
251 } else { 188 } else
252 p = (volatile u16 *)port2adr(port);
253 while (count--) 189 while (count--)
254 *p = *buf++; 190 ctrl_outb(*buf++, port);
255 }
256} 191}
257 192
258void r7780rp_outsw(unsigned long port, const void *src, unsigned long count) 193void r7780rp_outsw(unsigned long port, const void *src, unsigned long count)
@@ -262,40 +197,37 @@ void r7780rp_outsw(unsigned long port, const void *src, unsigned long count)
262 197
263 if (CHECK_AX88796L_PORT(port)) 198 if (CHECK_AX88796L_PORT(port))
264 p = (volatile u16 *)port88796l(port, 1); 199 p = (volatile u16 *)port88796l(port, 1);
265 else if (PXSEG(port)) 200 else if (is_pci_ioaddr(port))
266 p = (volatile u16 *)port;
267 else if (is_pci_ioaddr(port) || shifted_port(port))
268 p = (volatile u16 *)pci_ioaddr(port); 201 p = (volatile u16 *)pci_ioaddr(port);
269 else 202 else
270 p = (volatile u16 *)port2adr(port); 203 p = (volatile u16 *)port;
271 204
272 while (count--) 205 while (count--)
273 *p = *buf++; 206 *p = *buf++;
207
208 flush_dcache_all();
274} 209}
275 210
276void r7780rp_outsl(unsigned long port, const void *src, unsigned long count) 211void r7780rp_outsl(unsigned long port, const void *src, unsigned long count)
277{ 212{
278 const u32 *buf = src; 213 const u32 *buf = src;
214 u32 *p;
279 215
280 if (CHECK_AX88796L_PORT(port)) 216 if (is_pci_ioaddr(port))
281 maybebadio(port); 217 p = (u32 *)pci_ioaddr(port);
282 else if (is_pci_ioaddr(port) || shifted_port(port)) { 218 else
283 volatile u32 *p = (volatile u32 *)pci_ioaddr(port); 219 p = (u32 *)port;
284 220
285 while (count--) 221 while (count--)
286 *p = *buf++; 222 ctrl_outl(*buf++, (unsigned long)p);
287 } else
288 maybebadio(port);
289} 223}
290 224
291void __iomem *r7780rp_ioport_map(unsigned long port, unsigned int size) 225void __iomem *r7780rp_ioport_map(unsigned long port, unsigned int size)
292{ 226{
293 if (CHECK_AX88796L_PORT(port)) 227 if (CHECK_AX88796L_PORT(port))
294 return (void __iomem *)port88796l(port, size > 1); 228 return (void __iomem *)port88796l(port, size > 1);
295 else if (PXSEG(port)) 229 else if (is_pci_ioaddr(port))
296 return (void __iomem *)port;
297 else if (is_pci_ioaddr(port) || shifted_port(port))
298 return (void __iomem *)pci_ioaddr(port); 230 return (void __iomem *)pci_ioaddr(port);
299 231
300 return (void __iomem *)port2adr(port); 232 return (void __iomem *)port;
301} 233}
diff --git a/arch/sh/boards/renesas/r7780rp/led.c b/arch/sh/boards/renesas/r7780rp/led.c
deleted file mode 100644
index 6a00a257afd2..000000000000
--- a/arch/sh/boards/renesas/r7780rp/led.c
+++ /dev/null
@@ -1,43 +0,0 @@
1/*
2 * Copyright (C) Atom Create Engineering Co., Ltd.
3 *
4 * May be copied or modified under the terms of GNU General Public
5 * License. See linux/COPYING for more information.
6 *
7 * This file contains Renesas Solutions HIGHLANDER R7780RP-1 specific LED code.
8 */
9#include <linux/sched.h>
10#include <asm/io.h>
11#include <asm/r7780rp/r7780rp.h>
12
13/* Cycle the LED's in the clasic Knightriger/Sun pattern */
14void heartbeat_r7780rp(void)
15{
16 static unsigned int cnt = 0, period = 0;
17 volatile unsigned short *p = (volatile unsigned short *)PA_OBLED;
18 static unsigned bit = 0, up = 1;
19 unsigned bit_pos[] = {2, 1, 0, 3, 6, 5, 4, 7};
20
21 cnt += 1;
22 if (cnt < period)
23 return;
24
25 cnt = 0;
26
27 /* Go through the points (roughly!):
28 * f(0)=10, f(1)=16, f(2)=20, f(5)=35, f(int)->110
29 */
30 period = 110 - ((300 << FSHIFT)/((avenrun[0]/5) + (3<<FSHIFT)));
31
32 *p = 1 << bit_pos[bit];
33 if (up)
34 if (bit == 7) {
35 bit--;
36 up = 0;
37 } else
38 bit++;
39 else if (bit == 0)
40 up = 1;
41 else
42 bit--;
43}
diff --git a/arch/sh/boards/renesas/r7780rp/setup.c b/arch/sh/boards/renesas/r7780rp/setup.c
index 9f89c8de9db9..0d74db9f1792 100644
--- a/arch/sh/boards/renesas/r7780rp/setup.c
+++ b/arch/sh/boards/renesas/r7780rp/setup.c
@@ -2,7 +2,7 @@
2 * arch/sh/boards/renesas/r7780rp/setup.c 2 * arch/sh/boards/renesas/r7780rp/setup.c
3 * 3 *
4 * Copyright (C) 2002 Atom Create Engineering Co., Ltd. 4 * Copyright (C) 2002 Atom Create Engineering Co., Ltd.
5 * Copyright (C) 2005, 2006 Paul Mundt 5 * Copyright (C) 2005 - 2007 Paul Mundt
6 * 6 *
7 * Renesas Solutions Highlander R7780RP-1 Support. 7 * Renesas Solutions Highlander R7780RP-1 Support.
8 * 8 *
@@ -12,12 +12,12 @@
12 */ 12 */
13#include <linux/init.h> 13#include <linux/init.h>
14#include <linux/platform_device.h> 14#include <linux/platform_device.h>
15#include <linux/pata_platform.h>
15#include <asm/machvec.h> 16#include <asm/machvec.h>
16#include <asm/r7780rp.h> 17#include <asm/r7780rp.h>
17#include <asm/clock.h> 18#include <asm/clock.h>
18#include <asm/io.h> 19#include <asm/io.h>
19 20
20extern void heartbeat_r7780rp(void);
21extern void init_r7780rp_IRQ(void); 21extern void init_r7780rp_IRQ(void);
22 22
23static struct resource m66596_usb_host_resources[] = { 23static struct resource m66596_usb_host_resources[] = {
@@ -46,14 +46,14 @@ static struct platform_device m66596_usb_host_device = {
46 46
47static struct resource cf_ide_resources[] = { 47static struct resource cf_ide_resources[] = {
48 [0] = { 48 [0] = {
49 .start = 0x1f0, 49 .start = PA_AREA5_IO + 0x1000,
50 .end = 0x1f0 + 8, 50 .end = PA_AREA5_IO + 0x1000 + 0x08 - 1,
51 .flags = IORESOURCE_IO, 51 .flags = IORESOURCE_MEM,
52 }, 52 },
53 [1] = { 53 [1] = {
54 .start = 0x1f0 + 0x206, 54 .start = PA_AREA5_IO + 0x80c,
55 .end = 0x1f0 + 8 + 0x206 + 8, 55 .end = PA_AREA5_IO + 0x80c + 0x16 - 1,
56 .flags = IORESOURCE_IO, 56 .flags = IORESOURCE_MEM,
57 }, 57 },
58 [2] = { 58 [2] = {
59#ifdef CONFIG_SH_R7780MP 59#ifdef CONFIG_SH_R7780MP
@@ -65,16 +65,44 @@ static struct resource cf_ide_resources[] = {
65 }, 65 },
66}; 66};
67 67
68static struct pata_platform_info pata_info = {
69 .ioport_shift = 1,
70};
71
68static struct platform_device cf_ide_device = { 72static struct platform_device cf_ide_device = {
69 .name = "pata_platform", 73 .name = "pata_platform",
70 .id = -1, 74 .id = -1,
71 .num_resources = ARRAY_SIZE(cf_ide_resources), 75 .num_resources = ARRAY_SIZE(cf_ide_resources),
72 .resource = cf_ide_resources, 76 .resource = cf_ide_resources,
77 .dev = {
78 .platform_data = &pata_info,
79 },
80};
81
82static unsigned char heartbeat_bit_pos[] = { 2, 1, 0, 3, 6, 5, 4, 7 };
83
84static struct resource heartbeat_resources[] = {
85 [0] = {
86 .start = PA_OBLED,
87 .end = PA_OBLED + ARRAY_SIZE(heartbeat_bit_pos) - 1,
88 .flags = IORESOURCE_MEM,
89 },
90};
91
92static struct platform_device heartbeat_device = {
93 .name = "heartbeat",
94 .id = -1,
95 .dev = {
96 .platform_data = heartbeat_bit_pos,
97 },
98 .num_resources = ARRAY_SIZE(heartbeat_resources),
99 .resource = heartbeat_resources,
73}; 100};
74 101
75static struct platform_device *r7780rp_devices[] __initdata = { 102static struct platform_device *r7780rp_devices[] __initdata = {
76 &m66596_usb_host_device, 103 &m66596_usb_host_device,
77 &cf_ide_device, 104 &cf_ide_device,
105 &heartbeat_device,
78}; 106};
79 107
80static int __init r7780rp_devices_setup(void) 108static int __init r7780rp_devices_setup(void)
@@ -148,7 +176,7 @@ static void __init r7780rp_setup(char **cmdline_p)
148#ifndef CONFIG_SH_R7780MP 176#ifndef CONFIG_SH_R7780MP
149 ctrl_outw(0x0001, PA_SDPOW); /* SD Power ON */ 177 ctrl_outw(0x0001, PA_SDPOW); /* SD Power ON */
150#endif 178#endif
151 ctrl_outw(ctrl_inw(PA_IVDRCTL) | 0x0100, PA_IVDRCTL); /* Si13112 */ 179 ctrl_outw(ctrl_inw(PA_IVDRCTL) | 0x01, PA_IVDRCTL); /* Si13112 */
152 180
153 pm_power_off = r7780rp_power_off; 181 pm_power_off = r7780rp_power_off;
154} 182}
@@ -185,8 +213,5 @@ struct sh_machine_vector mv_r7780rp __initmv = {
185 213
186 .mv_ioport_map = r7780rp_ioport_map, 214 .mv_ioport_map = r7780rp_ioport_map,
187 .mv_init_irq = init_r7780rp_IRQ, 215 .mv_init_irq = init_r7780rp_IRQ,
188#ifdef CONFIG_HEARTBEAT
189 .mv_heartbeat = heartbeat_r7780rp,
190#endif
191}; 216};
192ALIAS_MV(r7780rp) 217ALIAS_MV(r7780rp)
diff --git a/arch/sh/boards/renesas/rts7751r2d/Makefile b/arch/sh/boards/renesas/rts7751r2d/Makefile
index 686fc9ea5989..0d4c75a72be0 100644
--- a/arch/sh/boards/renesas/rts7751r2d/Makefile
+++ b/arch/sh/boards/renesas/rts7751r2d/Makefile
@@ -2,5 +2,4 @@
2# Makefile for the RTS7751R2D specific parts of the kernel 2# Makefile for the RTS7751R2D specific parts of the kernel
3# 3#
4 4
5obj-y := setup.o io.o irq.o 5obj-y := setup.o irq.o
6obj-$(CONFIG_HEARTBEAT) += led.o
diff --git a/arch/sh/boards/renesas/rts7751r2d/io.c b/arch/sh/boards/renesas/rts7751r2d/io.c
deleted file mode 100644
index f2507a804979..000000000000
--- a/arch/sh/boards/renesas/rts7751r2d/io.c
+++ /dev/null
@@ -1,302 +0,0 @@
1/*
2 * Copyright (C) 2001 Ian da Silva, Jeremy Siegel
3 * Based largely on io_se.c.
4 *
5 * I/O routine for Renesas Technology sales RTS7751R2D.
6 *
7 * Initial version only to support LAN access; some
8 * placeholder code from io_rts7751r2d.c left in with the
9 * expectation of later SuperIO and PCMCIA access.
10 */
11#include <linux/kernel.h>
12#include <linux/types.h>
13#include <linux/pci.h>
14#include <linux/io.h>
15#include <asm/rts7751r2d.h>
16#include <asm/addrspace.h>
17
18/*
19 * The 7751R RTS7751R2D uses the built-in PCI controller (PCIC)
20 * of the 7751R processor, and has a SuperIO accessible via the PCI.
21 * The board also includes a PCMCIA controller on its memory bus,
22 * like the other Solution Engine boards.
23 */
24
25static inline unsigned long port2adr(unsigned int port)
26{
27 if ((0x1f0 <= port && port < 0x1f8) || port == 0x3f6)
28 if (port == 0x3f6)
29 return (PA_AREA5_IO + 0x80c);
30 else
31 return (PA_AREA5_IO + 0x1000 + ((port-0x1f0) << 1));
32 else
33 maybebadio((unsigned long)port);
34
35 return port;
36}
37
38static inline unsigned long port88796l(unsigned int port, int flag)
39{
40 unsigned long addr;
41
42 if (flag)
43 addr = PA_AX88796L + ((port - AX88796L_IO_BASE) << 1);
44 else
45 addr = PA_AX88796L + ((port - AX88796L_IO_BASE) << 1) + 0x1000;
46
47 return addr;
48}
49
50/* The 7751R RTS7751R2D seems to have everything hooked */
51/* up pretty normally (nothing on high-bytes only...) so this */
52/* shouldn't be needed */
53static inline int shifted_port(unsigned long port)
54{
55 /* For IDE registers, value is not shifted */
56 if ((0x1f0 <= port && port < 0x1f8) || port == 0x3f6)
57 return 0;
58 else
59 return 1;
60}
61
62#if defined(CONFIG_NE2000) || defined(CONFIG_NE2000_MODULE)
63#define CHECK_AX88796L_PORT(port) \
64 ((port >= AX88796L_IO_BASE) && (port < (AX88796L_IO_BASE+0x20)))
65#else
66#define CHECK_AX88796L_PORT(port) (0)
67#endif
68
69/*
70 * General outline: remap really low stuff [eventually] to SuperIO,
71 * stuff in PCI IO space (at or above window at pci.h:PCIBIOS_MIN_IO)
72 * is mapped through the PCI IO window. Stuff with high bits (PXSEG)
73 * should be way beyond the window, and is used w/o translation for
74 * compatibility.
75 */
76unsigned char rts7751r2d_inb(unsigned long port)
77{
78 if (CHECK_AX88796L_PORT(port))
79 return (*(volatile unsigned short *)port88796l(port, 0)) & 0xff;
80 else if (PXSEG(port))
81 return *(volatile unsigned char *)port;
82 else if (is_pci_ioaddr(port) || shifted_port(port))
83 return *(volatile unsigned char *)pci_ioaddr(port);
84 else
85 return (*(volatile unsigned short *)port2adr(port) & 0xff);
86}
87
88unsigned char rts7751r2d_inb_p(unsigned long port)
89{
90 unsigned char v;
91
92 if (CHECK_AX88796L_PORT(port))
93 v = (*(volatile unsigned short *)port88796l(port, 0)) & 0xff;
94 else if (PXSEG(port))
95 v = *(volatile unsigned char *)port;
96 else if (is_pci_ioaddr(port) || shifted_port(port))
97 v = *(volatile unsigned char *)pci_ioaddr(port);
98 else
99 v = (*(volatile unsigned short *)port2adr(port) & 0xff);
100
101 ctrl_delay();
102
103 return v;
104}
105
106unsigned short rts7751r2d_inw(unsigned long port)
107{
108 if (CHECK_AX88796L_PORT(port))
109 maybebadio(port);
110 else if (PXSEG(port))
111 return *(volatile unsigned short *)port;
112 else if (is_pci_ioaddr(port) || shifted_port(port))
113 return *(volatile unsigned short *)pci_ioaddr(port);
114 else
115 maybebadio(port);
116
117 return 0;
118}
119
120unsigned int rts7751r2d_inl(unsigned long port)
121{
122 if (CHECK_AX88796L_PORT(port))
123 maybebadio(port);
124 else if (PXSEG(port))
125 return *(volatile unsigned long *)port;
126 else if (is_pci_ioaddr(port) || shifted_port(port))
127 return *(volatile unsigned long *)pci_ioaddr(port);
128 else
129 maybebadio(port);
130
131 return 0;
132}
133
134void rts7751r2d_outb(unsigned char value, unsigned long port)
135{
136 if (CHECK_AX88796L_PORT(port))
137 *((volatile unsigned short *)port88796l(port, 0)) = value;
138 else if (PXSEG(port))
139 *(volatile unsigned char *)port = value;
140 else if (is_pci_ioaddr(port) || shifted_port(port))
141 *(volatile unsigned char *)pci_ioaddr(port) = value;
142 else
143 *(volatile unsigned short *)port2adr(port) = value;
144}
145
146void rts7751r2d_outb_p(unsigned char value, unsigned long port)
147{
148 if (CHECK_AX88796L_PORT(port))
149 *((volatile unsigned short *)port88796l(port, 0)) = value;
150 else if (PXSEG(port))
151 *(volatile unsigned char *)port = value;
152 else if (is_pci_ioaddr(port) || shifted_port(port))
153 *(volatile unsigned char *)pci_ioaddr(port) = value;
154 else
155 *(volatile unsigned short *)port2adr(port) = value;
156
157 ctrl_delay();
158}
159
160void rts7751r2d_outw(unsigned short value, unsigned long port)
161{
162 if (CHECK_AX88796L_PORT(port))
163 maybebadio(port);
164 else if (PXSEG(port))
165 *(volatile unsigned short *)port = value;
166 else if (is_pci_ioaddr(port) || shifted_port(port))
167 *(volatile unsigned short *)pci_ioaddr(port) = value;
168 else
169 maybebadio(port);
170}
171
172void rts7751r2d_outl(unsigned int value, unsigned long port)
173{
174 if (CHECK_AX88796L_PORT(port))
175 maybebadio(port);
176 else if (PXSEG(port))
177 *(volatile unsigned long *)port = value;
178 else if (is_pci_ioaddr(port) || shifted_port(port))
179 *(volatile unsigned long *)pci_ioaddr(port) = value;
180 else
181 maybebadio(port);
182}
183
184void rts7751r2d_insb(unsigned long port, void *addr, unsigned long count)
185{
186 unsigned long a = (unsigned long)addr;
187 volatile __u8 *bp;
188 volatile __u16 *p;
189
190 if (CHECK_AX88796L_PORT(port)) {
191 p = (volatile unsigned short *)port88796l(port, 0);
192 while (count--)
193 ctrl_outb(*p & 0xff, a++);
194 } else if (PXSEG(port))
195 while (count--)
196 ctrl_outb(ctrl_inb(port), a++);
197 else if (is_pci_ioaddr(port) || shifted_port(port)) {
198 bp = (__u8 *)pci_ioaddr(port);
199 while (count--)
200 ctrl_outb(*bp, a++);
201 } else {
202 p = (volatile unsigned short *)port2adr(port);
203 while (count--)
204 ctrl_outb(*p & 0xff, a++);
205 }
206}
207
208void rts7751r2d_insw(unsigned long port, void *addr, unsigned long count)
209{
210 unsigned long a = (unsigned long)addr;
211 volatile __u16 *p;
212
213 if (CHECK_AX88796L_PORT(port))
214 p = (volatile unsigned short *)port88796l(port, 1);
215 else if (PXSEG(port))
216 p = (volatile unsigned short *)port;
217 else if (is_pci_ioaddr(port) || shifted_port(port))
218 p = (volatile unsigned short *)pci_ioaddr(port);
219 else
220 p = (volatile unsigned short *)port2adr(port);
221 while (count--)
222 ctrl_outw(*p, a++);
223}
224
225void rts7751r2d_insl(unsigned long port, void *addr, unsigned long count)
226{
227 if (CHECK_AX88796L_PORT(port))
228 maybebadio(port);
229 else if (is_pci_ioaddr(port) || shifted_port(port)) {
230 unsigned long a = (unsigned long)addr;
231
232 while (count--) {
233 ctrl_outl(ctrl_inl(pci_ioaddr(port)), a);
234 a += 4;
235 }
236 } else
237 maybebadio(port);
238}
239
240void rts7751r2d_outsb(unsigned long port, const void *addr, unsigned long count)
241{
242 unsigned long a = (unsigned long)addr;
243 volatile __u8 *bp;
244 volatile __u16 *p;
245
246 if (CHECK_AX88796L_PORT(port)) {
247 p = (volatile unsigned short *)port88796l(port, 0);
248 while (count--)
249 *p = ctrl_inb(a++);
250 } else if (PXSEG(port))
251 while (count--)
252 ctrl_outb(a++, port);
253 else if (is_pci_ioaddr(port) || shifted_port(port)) {
254 bp = (__u8 *)pci_ioaddr(port);
255 while (count--)
256 *bp = ctrl_inb(a++);
257 } else {
258 p = (volatile unsigned short *)port2adr(port);
259 while (count--)
260 *p = ctrl_inb(a++);
261 }
262}
263
264void rts7751r2d_outsw(unsigned long port, const void *addr, unsigned long count)
265{
266 unsigned long a = (unsigned long)addr;
267 volatile __u16 *p;
268
269 if (CHECK_AX88796L_PORT(port))
270 p = (volatile unsigned short *)port88796l(port, 1);
271 else if (PXSEG(port))
272 p = (volatile unsigned short *)port;
273 else if (is_pci_ioaddr(port) || shifted_port(port))
274 p = (volatile unsigned short *)pci_ioaddr(port);
275 else
276 p = (volatile unsigned short *)port2adr(port);
277
278 while (count--) {
279 ctrl_outw(*p, a);
280 a += 2;
281 }
282}
283
284void rts7751r2d_outsl(unsigned long port, const void *addr, unsigned long count)
285{
286 if (CHECK_AX88796L_PORT(port))
287 maybebadio(port);
288 else if (is_pci_ioaddr(port) || shifted_port(port)) {
289 unsigned long a = (unsigned long)addr;
290
291 while (count--) {
292 ctrl_outl(ctrl_inl(a), pci_ioaddr(port));
293 a += 4;
294 }
295 } else
296 maybebadio(port);
297}
298
299unsigned long rts7751r2d_isa_port2addr(unsigned long offset)
300{
301 return port2adr(offset);
302}
diff --git a/arch/sh/boards/renesas/rts7751r2d/irq.c b/arch/sh/boards/renesas/rts7751r2d/irq.c
index cb0eb20d1b43..0bae9041aceb 100644
--- a/arch/sh/boards/renesas/rts7751r2d/irq.c
+++ b/arch/sh/boards/renesas/rts7751r2d/irq.c
@@ -9,7 +9,9 @@
9 * Atom Create Engineering Co., Ltd. 2002. 9 * Atom Create Engineering Co., Ltd. 2002.
10 */ 10 */
11#include <linux/init.h> 11#include <linux/init.h>
12#include <linux/interrupt.h>
12#include <linux/irq.h> 13#include <linux/irq.h>
14#include <linux/interrupt.h>
13#include <linux/io.h> 15#include <linux/io.h>
14#include <asm/rts7751r2d.h> 16#include <asm/rts7751r2d.h>
15 17
@@ -22,79 +24,31 @@ static int mask_pos[] = {6, 11, 9, 8, 12, 10, 5, 4, 7, 14, 13, 0, 0, 0, 0};
22extern int voyagergx_irq_demux(int irq); 24extern int voyagergx_irq_demux(int irq);
23extern void setup_voyagergx_irq(void); 25extern void setup_voyagergx_irq(void);
24 26
25static void enable_rts7751r2d_irq(unsigned int irq); 27static void enable_rts7751r2d_irq(unsigned int irq)
26static void disable_rts7751r2d_irq(unsigned int irq);
27
28/* shutdown is same as "disable" */
29#define shutdown_rts7751r2d_irq disable_rts7751r2d_irq
30
31static void ack_rts7751r2d_irq(unsigned int irq);
32static void end_rts7751r2d_irq(unsigned int irq);
33
34static unsigned int startup_rts7751r2d_irq(unsigned int irq)
35{ 28{
36 enable_rts7751r2d_irq(irq); 29 /* Set priority in IPR back to original value */
37 return 0; /* never anything pending */ 30 ctrl_outw(ctrl_inw(IRLCNTR1) | (1 << mask_pos[irq]), IRLCNTR1);
38} 31}
39 32
40static void disable_rts7751r2d_irq(unsigned int irq) 33static void disable_rts7751r2d_irq(unsigned int irq)
41{ 34{
42 unsigned short val;
43 unsigned short mask = 0xffff ^ (0x0001 << mask_pos[irq]);
44
45 /* Set the priority in IPR to 0 */ 35 /* Set the priority in IPR to 0 */
46 val = ctrl_inw(IRLCNTR1); 36 ctrl_outw(ctrl_inw(IRLCNTR1) & (0xffff ^ (1 << mask_pos[irq])),
47 val &= mask; 37 IRLCNTR1);
48 ctrl_outw(val, IRLCNTR1);
49}
50
51static void enable_rts7751r2d_irq(unsigned int irq)
52{
53 unsigned short val;
54 unsigned short value = (0x0001 << mask_pos[irq]);
55
56 /* Set priority in IPR back to original value */
57 val = ctrl_inw(IRLCNTR1);
58 val |= value;
59 ctrl_outw(val, IRLCNTR1);
60} 38}
61 39
62int rts7751r2d_irq_demux(int irq) 40int rts7751r2d_irq_demux(int irq)
63{ 41{
64 int demux_irq; 42 return voyagergx_irq_demux(irq);
65
66 demux_irq = voyagergx_irq_demux(irq);
67 return demux_irq;
68}
69
70static void ack_rts7751r2d_irq(unsigned int irq)
71{
72 disable_rts7751r2d_irq(irq);
73} 43}
74 44
75static void end_rts7751r2d_irq(unsigned int irq) 45static struct irq_chip rts7751r2d_irq_chip __read_mostly = {
76{ 46 .name = "rts7751r2d",
77 if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) 47 .mask = disable_rts7751r2d_irq,
78 enable_rts7751r2d_irq(irq); 48 .unmask = enable_rts7751r2d_irq,
79} 49 .mask_ack = disable_rts7751r2d_irq,
80
81static struct hw_interrupt_type rts7751r2d_irq_type = {
82 .typename = "RTS7751R2D IRQ",
83 .startup = startup_rts7751r2d_irq,
84 .shutdown = shutdown_rts7751r2d_irq,
85 .enable = enable_rts7751r2d_irq,
86 .disable = disable_rts7751r2d_irq,
87 .ack = ack_rts7751r2d_irq,
88 .end = end_rts7751r2d_irq,
89}; 50};
90 51
91static void make_rts7751r2d_irq(unsigned int irq)
92{
93 disable_irq_nosync(irq);
94 irq_desc[irq].chip = &rts7751r2d_irq_type;
95 disable_rts7751r2d_irq(irq);
96}
97
98/* 52/*
99 * Initialize IRQ setting 53 * Initialize IRQ setting
100 */ 54 */
@@ -119,8 +73,12 @@ void __init init_rts7751r2d_IRQ(void)
119 * IRL14=Extention #3 73 * IRL14=Extention #3
120 */ 74 */
121 75
122 for (i=0; i<15; i++) 76 for (i=0; i<15; i++) {
123 make_rts7751r2d_irq(i); 77 disable_irq_nosync(i);
78 set_irq_chip_and_handler_name(i, &rts7751r2d_irq_chip,
79 handle_level_irq, "level");
80 enable_rts7751r2d_irq(i);
81 }
124 82
125 setup_voyagergx_irq(); 83 setup_voyagergx_irq();
126} 84}
diff --git a/arch/sh/boards/renesas/rts7751r2d/led.c b/arch/sh/boards/renesas/rts7751r2d/led.c
deleted file mode 100644
index 509f548bdce0..000000000000
--- a/arch/sh/boards/renesas/rts7751r2d/led.c
+++ /dev/null
@@ -1,44 +0,0 @@
1/*
2 * linux/arch/sh/boards/renesas/rts7751r2d/led.c
3 *
4 * Copyright (C) Atom Create Engineering Co., Ltd.
5 *
6 * May be copied or modified under the terms of GNU General Public
7 * License. See linux/COPYING for more information.
8 *
9 * This file contains Renesas Technology Sales RTS7751R2D specific LED code.
10 */
11#include <linux/io.h>
12#include <linux/sched.h>
13#include <asm/rts7751r2d.h>
14
15/* Cycle the LED's in the clasic Knightriger/Sun pattern */
16void heartbeat_rts7751r2d(void)
17{
18 static unsigned int cnt = 0, period = 0;
19 volatile unsigned short *p = (volatile unsigned short *)PA_OUTPORT;
20 static unsigned bit = 0, up = 1;
21
22 cnt += 1;
23 if (cnt < period)
24 return;
25
26 cnt = 0;
27
28 /* Go through the points (roughly!):
29 * f(0)=10, f(1)=16, f(2)=20, f(5)=35, f(int)->110
30 */
31 period = 110 - ((300 << FSHIFT)/((avenrun[0]/5) + (3<<FSHIFT)));
32
33 *p = 1 << bit;
34 if (up)
35 if (bit == 7) {
36 bit--;
37 up = 0;
38 } else
39 bit++;
40 else if (bit == 0)
41 up = 1;
42 else
43 bit--;
44}
diff --git a/arch/sh/boards/renesas/rts7751r2d/setup.c b/arch/sh/boards/renesas/rts7751r2d/setup.c
index 5c042d35ec91..44b42082a0af 100644
--- a/arch/sh/boards/renesas/rts7751r2d/setup.c
+++ b/arch/sh/boards/renesas/rts7751r2d/setup.c
@@ -1,8 +1,8 @@
1/* 1/*
2 * Renesas Technology Sales RTS7751R2D Support. 2 * Renesas Technology Sales RTS7751R2D Support.
3 * 3 *
4 * Copyright (C) 2002 Atom Create Engineering Co., Ltd. 4 * Copyright (C) 2002 - 2006 Atom Create Engineering Co., Ltd.
5 * Copyright (C) 2004 - 2006 Paul Mundt 5 * Copyright (C) 2004 - 2007 Paul Mundt
6 * 6 *
7 * This file is subject to the terms and conditions of the GNU General Public 7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file "COPYING" in the main directory of this archive 8 * License. See the file "COPYING" in the main directory of this archive
@@ -10,33 +10,13 @@
10 */ 10 */
11#include <linux/init.h> 11#include <linux/init.h>
12#include <linux/platform_device.h> 12#include <linux/platform_device.h>
13#include <linux/pata_platform.h>
13#include <linux/serial_8250.h> 14#include <linux/serial_8250.h>
14#include <linux/pm.h> 15#include <linux/pm.h>
15#include <asm/machvec.h> 16#include <asm/machvec.h>
16#include <asm/mach/rts7751r2d.h> 17#include <asm/rts7751r2d.h>
17#include <asm/io.h>
18#include <asm/voyagergx.h> 18#include <asm/voyagergx.h>
19 19#include <asm/io.h>
20extern void heartbeat_rts7751r2d(void);
21extern void init_rts7751r2d_IRQ(void);
22extern int rts7751r2d_irq_demux(int irq);
23
24extern void *voyagergx_consistent_alloc(struct device *, size_t, dma_addr_t *, gfp_t);
25extern int voyagergx_consistent_free(struct device *, size_t, void *, dma_addr_t);
26
27static struct plat_serial8250_port uart_platform_data[] = {
28 {
29 .membase = (void *)VOYAGER_UART_BASE,
30 .mapbase = VOYAGER_UART_BASE,
31 .iotype = UPIO_MEM,
32 .irq = VOYAGER_UART0_IRQ,
33 .flags = UPF_BOOT_AUTOCONF,
34 .regshift = 2,
35 .uartclk = (9600 * 16),
36 }, {
37 .flags = 0,
38 },
39};
40 20
41static void __init voyagergx_serial_init(void) 21static void __init voyagergx_serial_init(void)
42{ 22{
@@ -45,32 +25,96 @@ static void __init voyagergx_serial_init(void)
45 /* 25 /*
46 * GPIO Control 26 * GPIO Control
47 */ 27 */
48 val = inl(GPIO_MUX_HIGH); 28 val = readl((void __iomem *)GPIO_MUX_HIGH);
49 val |= 0x00001fe0; 29 val |= 0x00001fe0;
50 outl(val, GPIO_MUX_HIGH); 30 writel(val, (void __iomem *)GPIO_MUX_HIGH);
51 31
52 /* 32 /*
53 * Power Mode Gate 33 * Power Mode Gate
54 */ 34 */
55 val = inl(POWER_MODE0_GATE); 35 val = readl((void __iomem *)POWER_MODE0_GATE);
56 val |= (POWER_MODE0_GATE_U0 | POWER_MODE0_GATE_U1); 36 val |= (POWER_MODE0_GATE_U0 | POWER_MODE0_GATE_U1);
57 outl(val, POWER_MODE0_GATE); 37 writel(val, (void __iomem *)POWER_MODE0_GATE);
58 38
59 val = inl(POWER_MODE1_GATE); 39 val = readl((void __iomem *)POWER_MODE1_GATE);
60 val |= (POWER_MODE1_GATE_U0 | POWER_MODE1_GATE_U1); 40 val |= (POWER_MODE1_GATE_U0 | POWER_MODE1_GATE_U1);
61 outl(val, POWER_MODE1_GATE); 41 writel(val, (void __iomem *)POWER_MODE1_GATE);
62} 42}
63 43
44static struct resource cf_ide_resources[] = {
45 [0] = {
46 .start = PA_AREA5_IO + 0x1000,
47 .end = PA_AREA5_IO + 0x1000 + 0x08 - 1,
48 .flags = IORESOURCE_MEM,
49 },
50 [1] = {
51 .start = PA_AREA5_IO + 0x80c,
52 .end = PA_AREA5_IO + 0x80c + 0x16 - 1,
53 .flags = IORESOURCE_MEM,
54 },
55 [2] = {
56#ifdef CONFIG_RTS7751R2D_REV11
57 .start = 1,
58#else
59 .start = 2,
60#endif
61 .flags = IORESOURCE_IRQ,
62 },
63};
64
65static struct pata_platform_info pata_info = {
66 .ioport_shift = 1,
67};
68
69static struct platform_device cf_ide_device = {
70 .name = "pata_platform",
71 .id = -1,
72 .num_resources = ARRAY_SIZE(cf_ide_resources),
73 .resource = cf_ide_resources,
74 .dev = {
75 .platform_data = &pata_info,
76 },
77};
78
79static struct plat_serial8250_port uart_platform_data[] = {
80 {
81 .membase = (void __iomem *)VOYAGER_UART_BASE,
82 .mapbase = VOYAGER_UART_BASE,
83 .iotype = UPIO_MEM,
84 .irq = VOYAGER_UART0_IRQ,
85 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
86 .regshift = 2,
87 .uartclk = (9600 * 16),
88 }
89};
90
64static struct platform_device uart_device = { 91static struct platform_device uart_device = {
65 .name = "serial8250", 92 .name = "serial8250",
66 .id = -1, 93 .id = PLAT8250_DEV_PLATFORM,
67 .dev = { 94 .dev = {
68 .platform_data = uart_platform_data, 95 .platform_data = uart_platform_data,
69 }, 96 },
70}; 97};
71 98
99static struct resource heartbeat_resources[] = {
100 [0] = {
101 .start = PA_OUTPORT,
102 .end = PA_OUTPORT + 8 - 1,
103 .flags = IORESOURCE_MEM,
104 },
105};
106
107static struct platform_device heartbeat_device = {
108 .name = "heartbeat",
109 .id = -1,
110 .num_resources = ARRAY_SIZE(heartbeat_resources),
111 .resource = heartbeat_resources,
112};
113
72static struct platform_device *rts7751r2d_devices[] __initdata = { 114static struct platform_device *rts7751r2d_devices[] __initdata = {
73 &uart_device, 115 &uart_device,
116 &heartbeat_device,
117 &cf_ide_device,
74}; 118};
75 119
76static int __init rts7751r2d_devices_setup(void) 120static int __init rts7751r2d_devices_setup(void)
@@ -78,6 +122,7 @@ static int __init rts7751r2d_devices_setup(void)
78 return platform_add_devices(rts7751r2d_devices, 122 return platform_add_devices(rts7751r2d_devices,
79 ARRAY_SIZE(rts7751r2d_devices)); 123 ARRAY_SIZE(rts7751r2d_devices));
80} 124}
125__initcall(rts7751r2d_devices_setup);
81 126
82static void rts7751r2d_power_off(void) 127static void rts7751r2d_power_off(void)
83{ 128{
@@ -89,14 +134,17 @@ static void rts7751r2d_power_off(void)
89 */ 134 */
90static void __init rts7751r2d_setup(char **cmdline_p) 135static void __init rts7751r2d_setup(char **cmdline_p)
91{ 136{
92 device_initcall(rts7751r2d_devices_setup); 137 u16 ver = ctrl_inw(PA_VERREG);
138
139 printk(KERN_INFO "Renesas Technology Sales RTS7751R2D support.\n");
140
141 printk(KERN_INFO "FPGA version:%d (revision:%d)\n",
142 (ver >> 4) & 0xf, ver & 0xf);
93 143
94 ctrl_outw(0x0000, PA_OUTPORT); 144 ctrl_outw(0x0000, PA_OUTPORT);
95 pm_power_off = rts7751r2d_power_off; 145 pm_power_off = rts7751r2d_power_off;
96 146
97 voyagergx_serial_init(); 147 voyagergx_serial_init();
98
99 printk(KERN_INFO "Renesas Technology Sales RTS7751R2D support.\n");
100} 148}
101 149
102/* 150/*
@@ -107,31 +155,7 @@ struct sh_machine_vector mv_rts7751r2d __initmv = {
107 .mv_setup = rts7751r2d_setup, 155 .mv_setup = rts7751r2d_setup,
108 .mv_nr_irqs = 72, 156 .mv_nr_irqs = 72,
109 157
110 .mv_inb = rts7751r2d_inb,
111 .mv_inw = rts7751r2d_inw,
112 .mv_inl = rts7751r2d_inl,
113 .mv_outb = rts7751r2d_outb,
114 .mv_outw = rts7751r2d_outw,
115 .mv_outl = rts7751r2d_outl,
116
117 .mv_inb_p = rts7751r2d_inb_p,
118 .mv_inw_p = rts7751r2d_inw,
119 .mv_inl_p = rts7751r2d_inl,
120 .mv_outb_p = rts7751r2d_outb_p,
121 .mv_outw_p = rts7751r2d_outw,
122 .mv_outl_p = rts7751r2d_outl,
123
124 .mv_insb = rts7751r2d_insb,
125 .mv_insw = rts7751r2d_insw,
126 .mv_insl = rts7751r2d_insl,
127 .mv_outsb = rts7751r2d_outsb,
128 .mv_outsw = rts7751r2d_outsw,
129 .mv_outsl = rts7751r2d_outsl,
130
131 .mv_init_irq = init_rts7751r2d_IRQ, 158 .mv_init_irq = init_rts7751r2d_IRQ,
132#ifdef CONFIG_HEARTBEAT
133 .mv_heartbeat = heartbeat_rts7751r2d,
134#endif
135 .mv_irq_demux = rts7751r2d_irq_demux, 159 .mv_irq_demux = rts7751r2d_irq_demux,
136 160
137#ifdef CONFIG_USB_SM501 161#ifdef CONFIG_USB_SM501
diff --git a/arch/sh/boards/se/7206/Makefile b/arch/sh/boards/se/7206/Makefile
index 63950f4f2453..63e7ed699f39 100644
--- a/arch/sh/boards/se/7206/Makefile
+++ b/arch/sh/boards/se/7206/Makefile
@@ -3,5 +3,3 @@
3# 3#
4 4
5obj-y := setup.o io.o irq.o 5obj-y := setup.o io.o irq.o
6obj-$(CONFIG_HEARTBEAT) += led.o
7
diff --git a/arch/sh/boards/se/7206/led.c b/arch/sh/boards/se/7206/led.c
deleted file mode 100644
index ef794601ab86..000000000000
--- a/arch/sh/boards/se/7206/led.c
+++ /dev/null
@@ -1,57 +0,0 @@
1/*
2 * linux/arch/sh/kernel/led_se.c
3 *
4 * Copyright (C) 2000 Stuart Menefy <stuart.menefy@st.com>
5 *
6 * May be copied or modified under the terms of the GNU General Public
7 * License. See linux/COPYING for more information.
8 *
9 * This file contains Solution Engine specific LED code.
10 */
11
12#include <linux/config.h>
13#include <asm/se7206.h>
14
15#ifdef CONFIG_HEARTBEAT
16
17#include <linux/sched.h>
18
19/* Cycle the LED's in the clasic Knightrider/Sun pattern */
20void heartbeat_se(void)
21{
22 static unsigned int cnt = 0, period = 0;
23 volatile unsigned short* p = (volatile unsigned short*)PA_LED;
24 static unsigned bit = 0, up = 1;
25
26 cnt += 1;
27 if (cnt < period) {
28 return;
29 }
30
31 cnt = 0;
32
33 /* Go through the points (roughly!):
34 * f(0)=10, f(1)=16, f(2)=20, f(5)=35,f(inf)->110
35 */
36 period = 110 - ( (300<<FSHIFT)/
37 ((avenrun[0]/5) + (3<<FSHIFT)) );
38
39 if (up) {
40 if (bit == 7) {
41 bit--;
42 up=0;
43 } else {
44 bit ++;
45 }
46 } else {
47 if (bit == 0) {
48 bit++;
49 up=1;
50 } else {
51 bit--;
52 }
53 }
54 *p = 1<<(bit+8);
55
56}
57#endif /* CONFIG_HEARTBEAT */
diff --git a/arch/sh/boards/se/7206/setup.c b/arch/sh/boards/se/7206/setup.c
index 0f42e91a3238..ca714879f559 100644
--- a/arch/sh/boards/se/7206/setup.c
+++ b/arch/sh/boards/se/7206/setup.c
@@ -3,6 +3,7 @@
3 * linux/arch/sh/boards/se/7206/setup.c 3 * linux/arch/sh/boards/se/7206/setup.c
4 * 4 *
5 * Copyright (C) 2006 Yoshinori Sato 5 * Copyright (C) 2006 Yoshinori Sato
6 * Copyright (C) 2007 Paul Mundt
6 * 7 *
7 * Hitachi 7206 SolutionEngine Support. 8 * Hitachi 7206 SolutionEngine Support.
8 * 9 *
@@ -34,15 +35,37 @@ static struct platform_device smc91x_device = {
34 .resource = smc91x_resources, 35 .resource = smc91x_resources,
35}; 36};
36 37
38static unsigned char heartbeat_bit_pos[] = { 8, 9, 10, 11, 12, 13, 14, 15 };
39
40static struct resource heartbeat_resources[] = {
41 [0] = {
42 .start = PA_LED,
43 .end = PA_LED + ARRAY_SIZE(heartbeat_bit_pos) - 1,
44 .flags = IORESOURCE_MEM,
45 },
46};
47
48static struct platform_device heartbeat_device = {
49 .name = "heartbeat",
50 .id = -1,
51 .dev = {
52 .platform_data = heartbeat_bit_pos,
53 },
54 .num_resources = ARRAY_SIZE(heartbeat_resources),
55 .resource = heartbeat_resources,
56};
57
58static struct platform_device *se7206_devices[] __initdata = {
59 &smc91x_device,
60 &heartbeat_device,
61};
62
37static int __init se7206_devices_setup(void) 63static int __init se7206_devices_setup(void)
38{ 64{
39 return platform_device_register(&smc91x_device); 65 return platform_add_devices(se7206_devices, ARRAY_SIZE(se7206_devices));
40} 66}
41
42__initcall(se7206_devices_setup); 67__initcall(se7206_devices_setup);
43 68
44void heartbeat_se(void);
45
46/* 69/*
47 * The Machine Vector 70 * The Machine Vector
48 */ 71 */
@@ -72,8 +95,5 @@ struct sh_machine_vector mv_se __initmv = {
72 .mv_outsl = se7206_outsl, 95 .mv_outsl = se7206_outsl,
73 96
74 .mv_init_irq = init_se7206_IRQ, 97 .mv_init_irq = init_se7206_IRQ,
75#ifdef CONFIG_HEARTBEAT
76 .mv_heartbeat = heartbeat_se,
77#endif
78}; 98};
79ALIAS_MV(se) 99ALIAS_MV(se)
diff --git a/arch/sh/boards/se/7300/Makefile b/arch/sh/boards/se/7300/Makefile
index 0fbd4f47815c..46247368f14b 100644
--- a/arch/sh/boards/se/7300/Makefile
+++ b/arch/sh/boards/se/7300/Makefile
@@ -3,5 +3,3 @@
3# 3#
4 4
5obj-y := setup.o io.o irq.o 5obj-y := setup.o io.o irq.o
6
7obj-$(CONFIG_HEARTBEAT) += led.o
diff --git a/arch/sh/boards/se/7300/led.c b/arch/sh/boards/se/7300/led.c
deleted file mode 100644
index 4d03bb7774be..000000000000
--- a/arch/sh/boards/se/7300/led.c
+++ /dev/null
@@ -1,54 +0,0 @@
1/*
2 * linux/arch/sh/boards/se/7300/led.c
3 *
4 * Derived from linux/arch/sh/boards/se/770x/led.c
5 *
6 * Copyright (C) 2000 Stuart Menefy <stuart.menefy@st.com>
7 *
8 * May be copied or modified under the terms of the GNU General Public
9 * License. See linux/COPYING for more information.
10 *
11 * This file contains Solution Engine specific LED code.
12 */
13
14#include <linux/sched.h>
15#include <asm/se7300.h>
16
17/* Cycle the LED's in the clasic Knightrider/Sun pattern */
18void heartbeat_7300se(void)
19{
20 static unsigned int cnt = 0, period = 0;
21 volatile unsigned short *p = (volatile unsigned short *) PA_LED;
22 static unsigned bit = 0, up = 1;
23
24 cnt += 1;
25 if (cnt < period) {
26 return;
27 }
28
29 cnt = 0;
30
31 /* Go through the points (roughly!):
32 * f(0)=10, f(1)=16, f(2)=20, f(5)=35,f(inf)->110
33 */
34 period = 110 - ((300 << FSHIFT) / ((avenrun[0] / 5) + (3 << FSHIFT)));
35
36 if (up) {
37 if (bit == 7) {
38 bit--;
39 up = 0;
40 } else {
41 bit++;
42 }
43 } else {
44 if (bit == 0) {
45 bit++;
46 up = 1;
47 } else {
48 bit--;
49 }
50 }
51 *p = 1 << (bit + 8);
52
53}
54
diff --git a/arch/sh/boards/se/7300/setup.c b/arch/sh/boards/se/7300/setup.c
index 6f082a722d42..f1960956bad0 100644
--- a/arch/sh/boards/se/7300/setup.c
+++ b/arch/sh/boards/se/7300/setup.c
@@ -6,14 +6,43 @@
6 * SH-Mobile SolutionEngine 7300 Support. 6 * SH-Mobile SolutionEngine 7300 Support.
7 * 7 *
8 */ 8 */
9
10#include <linux/init.h> 9#include <linux/init.h>
10#include <linux/platform_device.h>
11#include <asm/machvec.h> 11#include <asm/machvec.h>
12#include <asm/se7300.h> 12#include <asm/se7300.h>
13 13
14void heartbeat_7300se(void);
15void init_7300se_IRQ(void); 14void init_7300se_IRQ(void);
16 15
16static unsigned char heartbeat_bit_pos[] = { 8, 9, 10, 11, 12, 13, 14, 15 };
17
18static struct resource heartbeat_resources[] = {
19 [0] = {
20 .start = PA_LED,
21 .end = PA_LED + ARRAY_SIZE(heartbeat_bit_pos) - 1,
22 .flags = IORESOURCE_MEM,
23 },
24};
25
26static struct platform_device heartbeat_device = {
27 .name = "heartbeat",
28 .id = -1,
29 .dev = {
30 .platform_data = heartbeat_bit_pos,
31 },
32 .num_resources = ARRAY_SIZE(heartbeat_resources),
33 .resource = heartbeat_resources,
34};
35
36static struct platform_device *se7300_devices[] __initdata = {
37 &heartbeat_device,
38};
39
40static int __init se7300_devices_setup(void)
41{
42 return platform_add_devices(se7300_devices, ARRAY_SIZE(se7300_devices));
43}
44__initcall(se7300_devices_setup);
45
17/* 46/*
18 * The Machine Vector 47 * The Machine Vector
19 */ 48 */
@@ -42,8 +71,5 @@ struct sh_machine_vector mv_7300se __initmv = {
42 .mv_outsl = sh7300se_outsl, 71 .mv_outsl = sh7300se_outsl,
43 72
44 .mv_init_irq = init_7300se_IRQ, 73 .mv_init_irq = init_7300se_IRQ,
45#ifdef CONFIG_HEARTBEAT
46 .mv_heartbeat = heartbeat_7300se,
47#endif
48}; 74};
49ALIAS_MV(7300se) 75ALIAS_MV(7300se)
diff --git a/arch/sh/boards/se/73180/Makefile b/arch/sh/boards/se/73180/Makefile
index 8f63886a0f3f..e7c09967c529 100644
--- a/arch/sh/boards/se/73180/Makefile
+++ b/arch/sh/boards/se/73180/Makefile
@@ -3,5 +3,3 @@
3# 3#
4 4
5obj-y := setup.o io.o irq.o 5obj-y := setup.o io.o irq.o
6
7obj-$(CONFIG_HEARTBEAT) += led.o
diff --git a/arch/sh/boards/se/73180/led.c b/arch/sh/boards/se/73180/led.c
deleted file mode 100644
index 4b72e9a3ead9..000000000000
--- a/arch/sh/boards/se/73180/led.c
+++ /dev/null
@@ -1,53 +0,0 @@
1/*
2 * arch/sh/boards/se/73180/led.c
3 *
4 * Derived from arch/sh/boards/se/770x/led.c
5 *
6 * Copyright (C) 2000 Stuart Menefy <stuart.menefy@st.com>
7 *
8 * May be copied or modified under the terms of the GNU General Public
9 * License. See linux/COPYING for more information.
10 *
11 * This file contains Solution Engine specific LED code.
12 */
13
14#include <linux/sched.h>
15#include <asm/mach/se73180.h>
16
17/* Cycle the LED's in the clasic Knightrider/Sun pattern */
18void heartbeat_73180se(void)
19{
20 static unsigned int cnt = 0, period = 0;
21 volatile unsigned short *p = (volatile unsigned short *) PA_LED;
22 static unsigned bit = 0, up = 1;
23
24 cnt += 1;
25 if (cnt < period) {
26 return;
27 }
28
29 cnt = 0;
30
31 /* Go through the points (roughly!):
32 * f(0)=10, f(1)=16, f(2)=20, f(5)=35,f(inf)->110
33 */
34 period = 110 - ((300 << FSHIFT) / ((avenrun[0] / 5) + (3 << FSHIFT)));
35
36 if (up) {
37 if (bit == 7) {
38 bit--;
39 up = 0;
40 } else {
41 bit++;
42 }
43 } else {
44 if (bit == 0) {
45 bit++;
46 up = 1;
47 } else {
48 bit--;
49 }
50 }
51 *p = 1 << (bit + LED_SHIFT);
52
53}
diff --git a/arch/sh/boards/se/73180/setup.c b/arch/sh/boards/se/73180/setup.c
index b38ef50a160a..911ce1cdbd7f 100644
--- a/arch/sh/boards/se/73180/setup.c
+++ b/arch/sh/boards/se/73180/setup.c
@@ -10,13 +10,39 @@
10 */ 10 */
11 11
12#include <linux/init.h> 12#include <linux/init.h>
13#include <linux/platform_device.h>
13#include <asm/machvec.h> 14#include <asm/machvec.h>
14#include <asm/se73180.h> 15#include <asm/se73180.h>
15#include <asm/irq.h> 16#include <asm/irq.h>
16 17
17void heartbeat_73180se(void);
18void init_73180se_IRQ(void); 18void init_73180se_IRQ(void);
19 19
20static struct resource heartbeat_resources[] = {
21 [0] = {
22 .start = PA_LED,
23 .end = PA_LED + 8 - 1,
24 .flags = IORESOURCE_MEM,
25 },
26};
27
28static struct platform_device heartbeat_device = {
29 .name = "heartbeat",
30 .id = -1,
31 .num_resources = ARRAY_SIZE(heartbeat_resources),
32 .resource = heartbeat_resources,
33};
34
35static struct platform_device *se73180_devices[] __initdata = {
36 &heartbeat_device,
37};
38
39static int __init se73180_devices_setup(void)
40{
41 return platform_add_devices(sh7343se_platform_devices,
42 ARRAY_SIZE(sh7343se_platform_devices));
43}
44__initcall(se73180_devices_setup);
45
20/* 46/*
21 * The Machine Vector 47 * The Machine Vector
22 */ 48 */
@@ -46,8 +72,5 @@ struct sh_machine_vector mv_73180se __initmv = {
46 72
47 .mv_init_irq = init_73180se_IRQ, 73 .mv_init_irq = init_73180se_IRQ,
48 .mv_irq_demux = shmse_irq_demux, 74 .mv_irq_demux = shmse_irq_demux,
49#ifdef CONFIG_HEARTBEAT
50 .mv_heartbeat = heartbeat_73180se,
51#endif
52}; 75};
53ALIAS_MV(73180se) 76ALIAS_MV(73180se)
diff --git a/arch/sh/boards/se/7343/Makefile b/arch/sh/boards/se/7343/Makefile
index 4291069c0b4f..3024796c6203 100644
--- a/arch/sh/boards/se/7343/Makefile
+++ b/arch/sh/boards/se/7343/Makefile
@@ -3,5 +3,3 @@
3# 3#
4 4
5obj-y := setup.o io.o irq.o 5obj-y := setup.o io.o irq.o
6
7obj-$(CONFIG_HEARTBEAT) += led.o
diff --git a/arch/sh/boards/se/7343/led.c b/arch/sh/boards/se/7343/led.c
deleted file mode 100644
index 6b39e191c420..000000000000
--- a/arch/sh/boards/se/7343/led.c
+++ /dev/null
@@ -1,44 +0,0 @@
1/*
2 * arch/sh/boards/se/7343/led.c
3 *
4 */
5#include <linux/sched.h>
6#include <asm/mach/se7343.h>
7
8/* Cycle the LED's in the clasic Knightrider/Sun pattern */
9void heartbeat_7343se(void)
10{
11 static unsigned int cnt = 0, period = 0;
12 volatile unsigned short *p = (volatile unsigned short *) PA_LED;
13 static unsigned bit = 0, up = 1;
14
15 cnt += 1;
16 if (cnt < period) {
17 return;
18 }
19
20 cnt = 0;
21
22 /* Go through the points (roughly!):
23 * f(0)=10, f(1)=16, f(2)=20, f(5)=35,f(inf)->110
24 */
25 period = 110 - ((300 << FSHIFT) / ((avenrun[0] / 5) + (3 << FSHIFT)));
26
27 if (up) {
28 if (bit == 7) {
29 bit--;
30 up = 0;
31 } else {
32 bit++;
33 }
34 } else {
35 if (bit == 0) {
36 bit++;
37 up = 1;
38 } else {
39 bit--;
40 }
41 }
42 *p = 1 << (bit + LED_SHIFT);
43
44}
diff --git a/arch/sh/boards/se/7343/setup.c b/arch/sh/boards/se/7343/setup.c
index c7d17fe7764e..3fdb16f2cef1 100644
--- a/arch/sh/boards/se/7343/setup.c
+++ b/arch/sh/boards/se/7343/setup.c
@@ -4,7 +4,6 @@
4#include <asm/mach/se7343.h> 4#include <asm/mach/se7343.h>
5#include <asm/irq.h> 5#include <asm/irq.h>
6 6
7void heartbeat_7343se(void);
8void init_7343se_IRQ(void); 7void init_7343se_IRQ(void);
9 8
10static struct resource smc91x_resources[] = { 9static struct resource smc91x_resources[] = {
@@ -31,14 +30,30 @@ static struct platform_device smc91x_device = {
31 .resource = smc91x_resources, 30 .resource = smc91x_resources,
32}; 31};
33 32
34static struct platform_device *smc91x_platform_devices[] __initdata = { 33static struct resource heartbeat_resources[] = {
34 [0] = {
35 .start = PA_LED,
36 .end = PA_LED + 8 - 1,
37 .flags = IORESOURCE_MEM,
38 },
39};
40
41static struct platform_device heartbeat_device = {
42 .name = "heartbeat",
43 .id = -1,
44 .num_resources = ARRAY_SIZE(heartbeat_resources),
45 .resource = heartbeat_resources,
46};
47
48static struct platform_device *sh7343se_platform_devices[] __initdata = {
35 &smc91x_device, 49 &smc91x_device,
50 &heartbeat_device,
36}; 51};
37 52
38static int __init sh7343se_devices_setup(void) 53static int __init sh7343se_devices_setup(void)
39{ 54{
40 return platform_add_devices(smc91x_platform_devices, 55 return platform_add_devices(sh7343se_platform_devices,
41 ARRAY_SIZE(smc91x_platform_devices)); 56 ARRAY_SIZE(sh7343se_platform_devices));
42} 57}
43 58
44static void __init sh7343se_setup(char **cmdline_p) 59static void __init sh7343se_setup(char **cmdline_p)
@@ -76,8 +91,5 @@ struct sh_machine_vector mv_7343se __initmv = {
76 91
77 .mv_init_irq = init_7343se_IRQ, 92 .mv_init_irq = init_7343se_IRQ,
78 .mv_irq_demux = shmse_irq_demux, 93 .mv_irq_demux = shmse_irq_demux,
79#ifdef CONFIG_HEARTBEAT
80 .mv_heartbeat = heartbeat_7343se,
81#endif
82}; 94};
83ALIAS_MV(7343se) 95ALIAS_MV(7343se)
diff --git a/arch/sh/boards/se/770x/Makefile b/arch/sh/boards/se/770x/Makefile
index 9a5035f80ec0..8e624b06d5ea 100644
--- a/arch/sh/boards/se/770x/Makefile
+++ b/arch/sh/boards/se/770x/Makefile
@@ -3,4 +3,3 @@
3# 3#
4 4
5obj-y := setup.o io.o irq.o 5obj-y := setup.o io.o irq.o
6obj-$(CONFIG_HEARTBEAT) += led.o
diff --git a/arch/sh/boards/se/770x/irq.c b/arch/sh/boards/se/770x/irq.c
index fcd7cd7fa05f..307ca5da6232 100644
--- a/arch/sh/boards/se/770x/irq.c
+++ b/arch/sh/boards/se/770x/irq.c
@@ -2,56 +2,96 @@
2 * linux/arch/sh/boards/se/770x/irq.c 2 * linux/arch/sh/boards/se/770x/irq.c
3 * 3 *
4 * Copyright (C) 2000 Kazumoto Kojima 4 * Copyright (C) 2000 Kazumoto Kojima
5 * Copyright (C) 2006 Nobuhiro Iwamatsu
5 * 6 *
6 * Hitachi SolutionEngine Support. 7 * Hitachi SolutionEngine Support.
7 * 8 *
8 */ 9 */
9 10
10#include <linux/init.h> 11#include <linux/init.h>
12#include <linux/interrupt.h>
11#include <linux/irq.h> 13#include <linux/irq.h>
12#include <asm/irq.h> 14#include <asm/irq.h>
13#include <asm/io.h> 15#include <asm/io.h>
14#include <asm/se.h> 16#include <asm/se.h>
15 17
18/*
19 * If the problem of make_ipr_irq is solved,
20 * this code will become unnecessary. :-)
21 */
22static void se770x_disable_ipr_irq(unsigned int irq)
23{
24 struct ipr_data *p = get_irq_chip_data(irq);
25
26 ctrl_outw(ctrl_inw(p->addr) & (0xffff ^ (0xf << p->shift)), p->addr);
27}
28
29static void se770x_enable_ipr_irq(unsigned int irq)
30{
31 struct ipr_data *p = get_irq_chip_data(irq);
32
33 ctrl_outw(ctrl_inw(p->addr) | (p->priority << p->shift), p->addr);
34}
35
36static struct irq_chip se770x_irq_chip = {
37 .name = "MS770xSE-FPGA",
38 .mask = se770x_disable_ipr_irq,
39 .unmask = se770x_enable_ipr_irq,
40 .mask_ack = se770x_disable_ipr_irq,
41};
42
43void make_se770x_irq(struct ipr_data *table, unsigned int nr_irqs)
44{
45 int i;
46
47 for (i = 0; i < nr_irqs; i++) {
48 unsigned int irq = table[i].irq;
49 disable_irq_nosync(irq);
50 set_irq_chip_and_handler_name(irq, &se770x_irq_chip,
51 handle_level_irq, "level");
52 set_irq_chip_data(irq, &table[i]);
53 se770x_enable_ipr_irq(irq);
54 }
55}
56
16static struct ipr_data se770x_ipr_map[] = { 57static struct ipr_data se770x_ipr_map[] = {
17#if defined(CONFIG_CPU_SUBTYPE_SH7705) 58#if defined(CONFIG_CPU_SUBTYPE_SH7705)
18 /* This is default value */ 59 /* This is default value */
19 { 0xf-0x2, BCR_ILCRA, 2, 0x2 }, 60 { 0xf-0x2, 0, 8, 0x2 , BCR_ILCRA},
20 { 0xf-0xa, BCR_ILCRA, 1, 0xa }, 61 { 0xf-0xa, 0, 4, 0xa , BCR_ILCRA},
21 { 0xf-0x5, BCR_ILCRB, 0, 0x5 }, 62 { 0xf-0x5, 0, 0, 0x5 , BCR_ILCRB},
22 { 0xf-0x8, BCR_ILCRC, 1, 0x8 }, 63 { 0xf-0x8, 0, 4, 0x8 , BCR_ILCRC},
23 { 0xf-0xc, BCR_ILCRC, 0, 0xc }, 64 { 0xf-0xc, 0, 0, 0xc , BCR_ILCRC},
24 { 0xf-0xe, BCR_ILCRD, 3, 0xe }, 65 { 0xf-0xe, 0, 12, 0xe , BCR_ILCRD},
25 { 0xf-0x3, BCR_ILCRD, 1, 0x3 }, /* LAN */ 66 { 0xf-0x3, 0, 4, 0x3 , BCR_ILCRD}, /* LAN */
26 { 0xf-0xd, BCR_ILCRE, 2, 0xd }, 67 { 0xf-0xd, 0, 8, 0xd , BCR_ILCRE},
27 { 0xf-0x9, BCR_ILCRE, 1, 0x9 }, 68 { 0xf-0x9, 0, 4, 0x9 , BCR_ILCRE},
28 { 0xf-0x1, BCR_ILCRE, 0, 0x1 }, 69 { 0xf-0x1, 0, 0, 0x1 , BCR_ILCRE},
29 { 0xf-0xf, BCR_ILCRF, 3, 0xf }, 70 { 0xf-0xf, 0, 12, 0xf , BCR_ILCRF},
30 { 0xf-0xb, BCR_ILCRF, 1, 0xb }, 71 { 0xf-0xb, 0, 4, 0xb , BCR_ILCRF},
31 { 0xf-0x7, BCR_ILCRG, 3, 0x7 }, 72 { 0xf-0x7, 0, 12, 0x7 , BCR_ILCRG},
32 { 0xf-0x6, BCR_ILCRG, 2, 0x6 }, 73 { 0xf-0x6, 0, 8, 0x6 , BCR_ILCRG},
33 { 0xf-0x4, BCR_ILCRG, 1, 0x4 }, 74 { 0xf-0x4, 0, 4, 0x4 , BCR_ILCRG},
34#else 75#else
35 { 14, BCR_ILCRA, 2, 0x0f-14 }, 76 { 14, 0, 8, 0x0f-14 ,BCR_ILCRA},
36 { 12, BCR_ILCRA, 1, 0x0f-12 }, 77 { 12, 0, 4, 0x0f-12 ,BCR_ILCRA},
37 { 8, BCR_ILCRB, 1, 0x0f- 8 }, 78 { 8, 0, 4, 0x0f- 8 ,BCR_ILCRB},
38 { 6, BCR_ILCRC, 3, 0x0f- 6 }, 79 { 6, 0, 12, 0x0f- 6 ,BCR_ILCRC},
39 { 5, BCR_ILCRC, 2, 0x0f- 5 }, 80 { 5, 0, 8, 0x0f- 5 ,BCR_ILCRC},
40 { 4, BCR_ILCRC, 1, 0x0f- 4 }, 81 { 4, 0, 4, 0x0f- 4 ,BCR_ILCRC},
41 { 3, BCR_ILCRC, 0, 0x0f- 3 }, 82 { 3, 0, 0, 0x0f- 3 ,BCR_ILCRC},
42 { 1, BCR_ILCRD, 3, 0x0f- 1 }, 83 { 1, 0, 12, 0x0f- 1 ,BCR_ILCRD},
43 84 /* ST NIC */
44 { 10, BCR_ILCRD, 1, 0x0f-10 }, /* LAN */ 85 { 10, 0, 4, 0x0f-10 ,BCR_ILCRD}, /* LAN */
45 86 /* MRSHPC IRQs setting */
46 { 0, BCR_ILCRE, 3, 0x0f- 0 }, /* PCIRQ3 */ 87 { 0, 0, 12, 0x0f- 0 ,BCR_ILCRE}, /* PCIRQ3 */
47 { 11, BCR_ILCRE, 2, 0x0f-11 }, /* PCIRQ2 */ 88 { 11, 0, 8, 0x0f-11 ,BCR_ILCRE}, /* PCIRQ2 */
48 { 9, BCR_ILCRE, 1, 0x0f- 9 }, /* PCIRQ1 */ 89 { 9, 0, 4, 0x0f- 9 ,BCR_ILCRE}, /* PCIRQ1 */
49 { 7, BCR_ILCRE, 0, 0x0f- 7 }, /* PCIRQ0 */ 90 { 7, 0, 0, 0x0f- 7 ,BCR_ILCRE}, /* PCIRQ0 */
50
51 /* #2, #13 are allocated for SLOT IRQ #1 and #2 (for now) */ 91 /* #2, #13 are allocated for SLOT IRQ #1 and #2 (for now) */
52 /* NOTE: #2 and #13 are not used on PC */ 92 /* NOTE: #2 and #13 are not used on PC */
53 { 13, BCR_ILCRG, 1, 0x0f-13 }, /* SLOTIRQ2 */ 93 { 13, 0, 4, 0x0f-13 ,BCR_ILCRG}, /* SLOTIRQ2 */
54 { 2, BCR_ILCRG, 0, 0x0f- 2 }, /* SLOTIRQ1 */ 94 { 2, 0, 0, 0x0f- 2 ,BCR_ILCRG}, /* SLOTIRQ1 */
55#endif 95#endif
56}; 96};
57 97
@@ -81,5 +121,5 @@ void __init init_se_IRQ(void)
81 ctrl_outw(0, BCR_ILCRF); 121 ctrl_outw(0, BCR_ILCRF);
82 ctrl_outw(0, BCR_ILCRG); 122 ctrl_outw(0, BCR_ILCRG);
83#endif 123#endif
84 make_ipr_irq(se770x_ipr_map, ARRAY_SIZE(se770x_ipr_map)); 124 make_se770x_irq(se770x_ipr_map, ARRAY_SIZE(se770x_ipr_map));
85} 125}
diff --git a/arch/sh/boards/se/770x/led.c b/arch/sh/boards/se/770x/led.c
deleted file mode 100644
index d93dd831b2ad..000000000000
--- a/arch/sh/boards/se/770x/led.c
+++ /dev/null
@@ -1,52 +0,0 @@
1/*
2 * linux/arch/sh/boards/se/770x/led.c
3 *
4 * Copyright (C) 2000 Stuart Menefy <stuart.menefy@st.com>
5 *
6 * May be copied or modified under the terms of the GNU General Public
7 * License. See linux/COPYING for more information.
8 *
9 * This file contains Solution Engine specific LED code.
10 */
11
12#include <linux/sched.h>
13#include <asm/se.h>
14
15/* Cycle the LED's in the clasic Knightrider/Sun pattern */
16void heartbeat_se(void)
17{
18 static unsigned int cnt = 0, period = 0;
19 volatile unsigned short* p = (volatile unsigned short*)PA_LED;
20 static unsigned bit = 0, up = 1;
21
22 cnt += 1;
23 if (cnt < period) {
24 return;
25 }
26
27 cnt = 0;
28
29 /* Go through the points (roughly!):
30 * f(0)=10, f(1)=16, f(2)=20, f(5)=35,f(inf)->110
31 */
32 period = 110 - ( (300<<FSHIFT)/
33 ((avenrun[0]/5) + (3<<FSHIFT)) );
34
35 if (up) {
36 if (bit == 7) {
37 bit--;
38 up=0;
39 } else {
40 bit ++;
41 }
42 } else {
43 if (bit == 0) {
44 bit++;
45 up=1;
46 } else {
47 bit--;
48 }
49 }
50 *p = 1<<(bit+8);
51
52}
diff --git a/arch/sh/boards/se/770x/setup.c b/arch/sh/boards/se/770x/setup.c
index a1d51d5fa925..45cbc36b9fb7 100644
--- a/arch/sh/boards/se/770x/setup.c
+++ b/arch/sh/boards/se/770x/setup.c
@@ -1,5 +1,4 @@
1/* $Id: setup.c,v 1.1.2.4 2002/03/02 21:57:07 lethal Exp $ 1/*
2 *
3 * linux/arch/sh/boards/se/770x/setup.c 2 * linux/arch/sh/boards/se/770x/setup.c
4 * 3 *
5 * Copyright (C) 2000 Kazumoto Kojima 4 * Copyright (C) 2000 Kazumoto Kojima
@@ -8,12 +7,12 @@
8 * 7 *
9 */ 8 */
10#include <linux/init.h> 9#include <linux/init.h>
10#include <linux/platform_device.h>
11#include <asm/machvec.h> 11#include <asm/machvec.h>
12#include <asm/se.h> 12#include <asm/se.h>
13#include <asm/io.h> 13#include <asm/io.h>
14#include <asm/smc37c93x.h> 14#include <asm/smc37c93x.h>
15 15
16void heartbeat_se(void);
17void init_se_IRQ(void); 16void init_se_IRQ(void);
18 17
19/* 18/*
@@ -36,11 +35,6 @@ static void __init smsc_setup(char **cmdline_p)
36 smsc_config(ACTIVATE_INDEX, 0x01); 35 smsc_config(ACTIVATE_INDEX, 0x01);
37 smsc_config(IRQ_SELECT_INDEX, 6); /* IRQ6 */ 36 smsc_config(IRQ_SELECT_INDEX, 6); /* IRQ6 */
38 37
39 /* IDE1 */
40 smsc_config(CURRENT_LDN_INDEX, LDN_IDE1);
41 smsc_config(ACTIVATE_INDEX, 0x01);
42 smsc_config(IRQ_SELECT_INDEX, 14); /* IRQ14 */
43
44 /* AUXIO (GPIO): to use IDE1 */ 38 /* AUXIO (GPIO): to use IDE1 */
45 smsc_config(CURRENT_LDN_INDEX, LDN_AUXIO); 39 smsc_config(CURRENT_LDN_INDEX, LDN_AUXIO);
46 smsc_config(GPIO46_INDEX, 0x00); /* nIOROP */ 40 smsc_config(GPIO46_INDEX, 0x00); /* nIOROP */
@@ -69,6 +63,36 @@ static void __init smsc_setup(char **cmdline_p)
69 outb_p(CONFIG_EXIT, CONFIG_PORT); 63 outb_p(CONFIG_EXIT, CONFIG_PORT);
70} 64}
71 65
66static unsigned char heartbeat_bit_pos[] = { 8, 9, 10, 11, 12, 13, 14, 15 };
67
68static struct resource heartbeat_resources[] = {
69 [0] = {
70 .start = PA_LED,
71 .end = PA_LED + ARRAY_SIZE(heartbeat_bit_pos) - 1,
72 .flags = IORESOURCE_MEM,
73 },
74};
75
76static struct platform_device heartbeat_device = {
77 .name = "heartbeat",
78 .id = -1,
79 .dev = {
80 .platform_data = heartbeat_bit_pos,
81 },
82 .num_resources = ARRAY_SIZE(heartbeat_resources),
83 .resource = heartbeat_resources,
84};
85
86static struct platform_device *se_devices[] __initdata = {
87 &heartbeat_device,
88};
89
90static int __init se_devices_setup(void)
91{
92 return platform_add_devices(se_devices, ARRAY_SIZE(se_devices));
93}
94__initcall(se_devices_setup);
95
72/* 96/*
73 * The Machine Vector 97 * The Machine Vector
74 */ 98 */
@@ -107,8 +131,5 @@ struct sh_machine_vector mv_se __initmv = {
107 .mv_outsl = se_outsl, 131 .mv_outsl = se_outsl,
108 132
109 .mv_init_irq = init_se_IRQ, 133 .mv_init_irq = init_se_IRQ,
110#ifdef CONFIG_HEARTBEAT
111 .mv_heartbeat = heartbeat_se,
112#endif
113}; 134};
114ALIAS_MV(se) 135ALIAS_MV(se)
diff --git a/arch/sh/boards/se/7751/Makefile b/arch/sh/boards/se/7751/Makefile
index 188900c48321..dbc29f3a9de5 100644
--- a/arch/sh/boards/se/7751/Makefile
+++ b/arch/sh/boards/se/7751/Makefile
@@ -5,4 +5,3 @@
5obj-y := setup.o io.o irq.o 5obj-y := setup.o io.o irq.o
6 6
7obj-$(CONFIG_PCI) += pci.o 7obj-$(CONFIG_PCI) += pci.o
8obj-$(CONFIG_HEARTBEAT) += led.o
diff --git a/arch/sh/boards/se/7751/led.c b/arch/sh/boards/se/7751/led.c
deleted file mode 100644
index de4194d97c88..000000000000
--- a/arch/sh/boards/se/7751/led.c
+++ /dev/null
@@ -1,51 +0,0 @@
1/*
2 * linux/arch/sh/boards/se/7751/led.c
3 *
4 * Copyright (C) 2000 Stuart Menefy <stuart.menefy@st.com>
5 *
6 * May be copied or modified under the terms of the GNU General Public
7 * License. See linux/COPYING for more information.
8 *
9 * This file contains Solution Engine specific LED code.
10 */
11#include <linux/sched.h>
12#include <asm/se7751.h>
13
14/* Cycle the LED's in the clasic Knightrider/Sun pattern */
15void heartbeat_7751se(void)
16{
17 static unsigned int cnt = 0, period = 0;
18 volatile unsigned short* p = (volatile unsigned short*)PA_LED;
19 static unsigned bit = 0, up = 1;
20
21 cnt += 1;
22 if (cnt < period) {
23 return;
24 }
25
26 cnt = 0;
27
28 /* Go through the points (roughly!):
29 * f(0)=10, f(1)=16, f(2)=20, f(5)=35,f(inf)->110
30 */
31 period = 110 - ( (300<<FSHIFT)/
32 ((avenrun[0]/5) + (3<<FSHIFT)) );
33
34 if (up) {
35 if (bit == 7) {
36 bit--;
37 up=0;
38 } else {
39 bit ++;
40 }
41 } else {
42 if (bit == 0) {
43 bit++;
44 up=1;
45 } else {
46 bit--;
47 }
48 }
49 *p = 1<<(bit+8);
50
51}
diff --git a/arch/sh/boards/se/7751/setup.c b/arch/sh/boards/se/7751/setup.c
index f7e1dd39c836..e3feae6ec0bf 100644
--- a/arch/sh/boards/se/7751/setup.c
+++ b/arch/sh/boards/se/7751/setup.c
@@ -9,11 +9,11 @@
9 * Ian da Silva and Jeremy Siegel, 2001. 9 * Ian da Silva and Jeremy Siegel, 2001.
10 */ 10 */
11#include <linux/init.h> 11#include <linux/init.h>
12#include <linux/platform_device.h>
12#include <asm/machvec.h> 13#include <asm/machvec.h>
13#include <asm/se7751.h> 14#include <asm/se7751.h>
14#include <asm/io.h> 15#include <asm/io.h>
15 16
16void heartbeat_7751se(void);
17void init_7751se_IRQ(void); 17void init_7751se_IRQ(void);
18 18
19#ifdef CONFIG_SH_KGDB 19#ifdef CONFIG_SH_KGDB
@@ -161,11 +161,40 @@ static int kgdb_uart_setup(void)
161} 161}
162#endif /* CONFIG_SH_KGDB */ 162#endif /* CONFIG_SH_KGDB */
163 163
164static unsigned char heartbeat_bit_pos[] = { 8, 9, 10, 11, 12, 13, 14, 15 };
165
166static struct resource heartbeat_resources[] = {
167 [0] = {
168 .start = PA_LED,
169 .end = PA_LED + ARRAY_SIZE(heartbeat_bit_pos) - 1,
170 .flags = IORESOURCE_MEM,
171 },
172};
173
174static struct platform_device heartbeat_device = {
175 .name = "heartbeat",
176 .id = -1,
177 .dev = {
178 .platform_data = heartbeat_bit_pos,
179 },
180 .num_resources = ARRAY_SIZE(heartbeat_resources),
181 .resource = heartbeat_resources,
182};
183
184static struct platform_device *se7751_devices[] __initdata = {
185 &smc91x_device,
186 &heartbeat_device,
187};
188
189static int __init se7751_devices_setup(void)
190{
191 return platform_add_devices(se7751_devices, ARRAY_SIZE(se7751_devices));
192}
193__initcall(se7751_devices_setup);
164 194
165/* 195/*
166 * The Machine Vector 196 * The Machine Vector
167 */ 197 */
168
169struct sh_machine_vector mv_7751se __initmv = { 198struct sh_machine_vector mv_7751se __initmv = {
170 .mv_name = "7751 SolutionEngine", 199 .mv_name = "7751 SolutionEngine",
171 .mv_setup = sh7751se_setup, 200 .mv_setup = sh7751se_setup,
@@ -189,8 +218,5 @@ struct sh_machine_vector mv_7751se __initmv = {
189 .mv_outsl = sh7751se_outsl, 218 .mv_outsl = sh7751se_outsl,
190 219
191 .mv_init_irq = init_7751se_IRQ, 220 .mv_init_irq = init_7751se_IRQ,
192#ifdef CONFIG_HEARTBEAT
193 .mv_heartbeat = heartbeat_7751se,
194#endif
195}; 221};
196ALIAS_MV(7751se) 222ALIAS_MV(7751se)
diff --git a/arch/sh/boards/sh03/Makefile b/arch/sh/boards/sh03/Makefile
index 321be50e36a5..400306a796ec 100644
--- a/arch/sh/boards/sh03/Makefile
+++ b/arch/sh/boards/sh03/Makefile
@@ -3,4 +3,3 @@
3# 3#
4 4
5obj-y := setup.o rtc.o 5obj-y := setup.o rtc.o
6obj-$(CONFIG_HEARTBEAT) += led.o
diff --git a/arch/sh/boards/sh03/led.c b/arch/sh/boards/sh03/led.c
deleted file mode 100644
index d38562ad6be8..000000000000
--- a/arch/sh/boards/sh03/led.c
+++ /dev/null
@@ -1,48 +0,0 @@
1/*
2 * linux/arch/sh/boards/sh03/led.c
3 *
4 * Copyright (C) 2004 Saito.K Interface Corporation.
5 *
6 * This file contains Interface CTP/PCI-SH03 specific LED code.
7 */
8
9#include <linux/sched.h>
10
11/* Cycle the LED's in the clasic Knightrider/Sun pattern */
12void heartbeat_sh03(void)
13{
14 static unsigned int cnt = 0, period = 0;
15 volatile unsigned char* p = (volatile unsigned char*)0xa0800000;
16 static unsigned bit = 0, up = 1;
17
18 cnt += 1;
19 if (cnt < period) {
20 return;
21 }
22
23 cnt = 0;
24
25 /* Go through the points (roughly!):
26 * f(0)=10, f(1)=16, f(2)=20, f(5)=35,f(inf)->110
27 */
28 period = 110 - ( (300<<FSHIFT)/
29 ((avenrun[0]/5) + (3<<FSHIFT)) );
30
31 if (up) {
32 if (bit == 7) {
33 bit--;
34 up=0;
35 } else {
36 bit ++;
37 }
38 } else {
39 if (bit == 0) {
40 bit++;
41 up=1;
42 } else {
43 bit--;
44 }
45 }
46 *p = 1<<bit;
47
48}
diff --git a/arch/sh/boards/sh03/setup.c b/arch/sh/boards/sh03/setup.c
index 5ad1e19771be..c069c444b4ec 100644
--- a/arch/sh/boards/sh03/setup.c
+++ b/arch/sh/boards/sh03/setup.c
@@ -8,6 +8,7 @@
8#include <linux/init.h> 8#include <linux/init.h>
9#include <linux/irq.h> 9#include <linux/irq.h>
10#include <linux/pci.h> 10#include <linux/pci.h>
11#include <linux/platform_device.h>
11#include <asm/io.h> 12#include <asm/io.h>
12#include <asm/rtc.h> 13#include <asm/rtc.h>
13#include <asm/sh03/io.h> 14#include <asm/sh03/io.h>
@@ -48,15 +49,36 @@ static void __init sh03_setup(char **cmdline_p)
48 board_time_init = sh03_time_init; 49 board_time_init = sh03_time_init;
49} 50}
50 51
52static struct resource heartbeat_resources[] = {
53 [0] = {
54 .start = 0xa0800000,
55 .end = 0xa0800000 + 8 - 1,
56 .flags = IORESOURCE_MEM,
57 },
58};
59
60static struct platform_device heartbeat_device = {
61 .name = "heartbeat",
62 .id = -1,
63 .num_resources = ARRAY_SIZE(heartbeat_resources),
64 .resource = heartbeat_resources,
65};
66
67static struct platform_device *sh03_devices[] __initdata = {
68 &heartbeat_device,
69};
70
71static int __init sh03_devices_setup(void)
72{
73 return platform_add_devices(sh03_devices, ARRAY_SIZE(sh03_devices));
74}
75__initcall(sh03_devices_setup);
76
51struct sh_machine_vector mv_sh03 __initmv = { 77struct sh_machine_vector mv_sh03 __initmv = {
52 .mv_name = "Interface (CTP/PCI-SH03)", 78 .mv_name = "Interface (CTP/PCI-SH03)",
53 .mv_setup = sh03_setup, 79 .mv_setup = sh03_setup,
54 .mv_nr_irqs = 48, 80 .mv_nr_irqs = 48,
55 .mv_ioport_map = sh03_ioport_map, 81 .mv_ioport_map = sh03_ioport_map,
56 .mv_init_irq = init_sh03_IRQ, 82 .mv_init_irq = init_sh03_IRQ,
57
58#ifdef CONFIG_HEARTBEAT
59 .mv_heartbeat = heartbeat_sh03,
60#endif
61}; 83};
62ALIAS_MV(sh03) 84ALIAS_MV(sh03)
diff --git a/arch/sh/boards/shmin/setup.c b/arch/sh/boards/shmin/setup.c
index a31a1d1e2681..4a9df4a6b034 100644
--- a/arch/sh/boards/shmin/setup.c
+++ b/arch/sh/boards/shmin/setup.c
@@ -12,12 +12,22 @@
12#include <asm/irq.h> 12#include <asm/irq.h>
13#include <asm/io.h> 13#include <asm/io.h>
14 14
15#define PFC_PHCR 0xa400010e 15#define PFC_PHCR 0xa400010eUL
16#define INTC_ICR1 0xa4000010UL
17#define INTC_IPRC 0xa4000016UL
18
19static struct ipr_data shmin_ipr_map[] = {
20 { .irq=32, .addr=INTC_IPRC, .shift= 0, .priority=0 },
21 { .irq=33, .addr=INTC_IPRC, .shift= 4, .priority=0 },
22 { .irq=34, .addr=INTC_IPRC, .shift= 8, .priority=8 },
23 { .irq=35, .addr=INTC_IPRC, .shift=12, .priority=0 },
24};
16 25
17static void __init init_shmin_irq(void) 26static void __init init_shmin_irq(void)
18{ 27{
19 ctrl_outw(0x2a00, PFC_PHCR); // IRQ0-3=IRQ 28 ctrl_outw(0x2a00, PFC_PHCR); // IRQ0-3=IRQ
20 ctrl_outw(0x0aaa, INTC_ICR1); // IRQ0-3=IRQ-mode,Low-active. 29 ctrl_outw(0x0aaa, INTC_ICR1); // IRQ0-3=IRQ-mode,Low-active.
30 make_ipr_irq(shmin_ipr_map, ARRAY_SIZE(shmin_ipr_map));
21} 31}
22 32
23static void __iomem *shmin_ioport_map(unsigned long port, unsigned int size) 33static void __iomem *shmin_ioport_map(unsigned long port, unsigned int size)
diff --git a/arch/sh/cchips/voyagergx/irq.c b/arch/sh/cchips/voyagergx/irq.c
index f7ea700d05ae..70f12907647f 100644
--- a/arch/sh/cchips/voyagergx/irq.c
+++ b/arch/sh/cchips/voyagergx/irq.c
@@ -28,21 +28,21 @@ static void disable_voyagergx_irq(unsigned int irq)
28 unsigned long val; 28 unsigned long val;
29 unsigned long mask = 1 << (irq - VOYAGER_IRQ_BASE); 29 unsigned long mask = 1 << (irq - VOYAGER_IRQ_BASE);
30 30
31 pr_debug("disable_voyagergx_irq(%d): mask=%lx\n", irq, mask); 31 pr_debug("disable_voyagergx_irq(%d): mask=%x\n", irq, mask);
32 val = inl(VOYAGER_INT_MASK); 32 val = readl((void __iomem *)VOYAGER_INT_MASK);
33 val &= ~mask; 33 val &= ~mask;
34 outl(val, VOYAGER_INT_MASK); 34 writel(val, (void __iomem *)VOYAGER_INT_MASK);
35} 35}
36 36
37static void enable_voyagergx_irq(unsigned int irq) 37static void enable_voyagergx_irq(unsigned int irq)
38{ 38{
39 unsigned long val; 39 unsigned long val;
40 unsigned long mask = 1 << (irq - VOYAGER_IRQ_BASE); 40 unsigned long mask = 1 << (irq - VOYAGER_IRQ_BASE);
41 41
42 pr_debug("disable_voyagergx_irq(%d): mask=%lx\n", irq, mask); 42 pr_debug("disable_voyagergx_irq(%d): mask=%x\n", irq, mask);
43 val = inl(VOYAGER_INT_MASK); 43 val = readl((void __iomem *)VOYAGER_INT_MASK);
44 val |= mask; 44 val |= mask;
45 outl(val, VOYAGER_INT_MASK); 45 writel(val, (void __iomem *)VOYAGER_INT_MASK);
46} 46}
47 47
48static void mask_and_ack_voyagergx(unsigned int irq) 48static void mask_and_ack_voyagergx(unsigned int irq)
@@ -68,20 +68,20 @@ static void shutdown_voyagergx_irq(unsigned int irq)
68} 68}
69 69
70static struct hw_interrupt_type voyagergx_irq_type = { 70static struct hw_interrupt_type voyagergx_irq_type = {
71 .typename = "VOYAGERGX-IRQ", 71 .typename = "VOYAGERGX-IRQ",
72 .startup = startup_voyagergx_irq, 72 .startup = startup_voyagergx_irq,
73 .shutdown = shutdown_voyagergx_irq, 73 .shutdown = shutdown_voyagergx_irq,
74 .enable = enable_voyagergx_irq, 74 .enable = enable_voyagergx_irq,
75 .disable = disable_voyagergx_irq, 75 .disable = disable_voyagergx_irq,
76 .ack = mask_and_ack_voyagergx, 76 .ack = mask_and_ack_voyagergx,
77 .end = end_voyagergx_irq, 77 .end = end_voyagergx_irq,
78}; 78};
79 79
80static irqreturn_t voyagergx_interrupt(int irq, void *dev_id) 80static irqreturn_t voyagergx_interrupt(int irq, void *dev_id)
81{ 81{
82 printk(KERN_INFO 82 printk(KERN_INFO
83 "VoyagerGX: spurious interrupt, status: 0x%x\n", 83 "VoyagerGX: spurious interrupt, status: 0x%x\n",
84 inl(INT_STATUS)); 84 (unsigned int)readl((void __iomem *)INT_STATUS));
85 return IRQ_HANDLED; 85 return IRQ_HANDLED;
86} 86}
87 87
@@ -93,13 +93,13 @@ static struct {
93void voyagergx_register_irq_demux(int irq, 93void voyagergx_register_irq_demux(int irq,
94 int (*demux)(int irq, void *dev), void *dev) 94 int (*demux)(int irq, void *dev), void *dev)
95{ 95{
96 voyagergx_demux[irq - VOYAGER_IRQ_BASE].func = demux; 96 voyagergx_demux[irq - VOYAGER_IRQ_BASE].func = demux;
97 voyagergx_demux[irq - VOYAGER_IRQ_BASE].dev = dev; 97 voyagergx_demux[irq - VOYAGER_IRQ_BASE].dev = dev;
98} 98}
99 99
100void voyagergx_unregister_irq_demux(int irq) 100void voyagergx_unregister_irq_demux(int irq)
101{ 101{
102 voyagergx_demux[irq - VOYAGER_IRQ_BASE].func = 0; 102 voyagergx_demux[irq - VOYAGER_IRQ_BASE].func = 0;
103} 103}
104 104
105int voyagergx_irq_demux(int irq) 105int voyagergx_irq_demux(int irq)
@@ -107,31 +107,25 @@ int voyagergx_irq_demux(int irq)
107 107
108 if (irq == IRQ_VOYAGER ) { 108 if (irq == IRQ_VOYAGER ) {
109 unsigned long i = 0, bit __attribute__ ((unused)); 109 unsigned long i = 0, bit __attribute__ ((unused));
110 unsigned long val = inl(INT_STATUS); 110 unsigned long val = readl((void __iomem *)INT_STATUS);
111#if 1 111
112 if ( val & ( 1 << 1 )){ 112 if (val & (1 << 1))
113 i = 1; 113 i = 1;
114 } else if ( val & ( 1 << 2 )){ 114 else if (val & (1 << 2))
115 i = 2; 115 i = 2;
116 } else if ( val & ( 1 << 6 )){ 116 else if (val & (1 << 6))
117 i = 6; 117 i = 6;
118 } else if( val & ( 1 << 10 )){ 118 else if (val & (1 << 10))
119 i = 10; 119 i = 10;
120 } else if( val & ( 1 << 11 )){ 120 else if (val & (1 << 11))
121 i = 11; 121 i = 11;
122 } else if( val & ( 1 << 12 )){ 122 else if (val & (1 << 12))
123 i = 12; 123 i = 12;
124 } else if( val & ( 1 << 17 )){ 124 else if (val & (1 << 17))
125 i = 17; 125 i = 17;
126 } else { 126 else
127 printk("Unexpected IRQ irq = %d status = 0x%08lx\n", irq, val); 127 printk("Unexpected IRQ irq = %d status = 0x%08lx\n", irq, val);
128 } 128 pr_debug("voyagergx_irq_demux %d \n", i);
129 pr_debug("voyagergx_irq_demux %ld\n", i);
130#else
131 for (bit = 1, i = 0 ; i < VOYAGER_IRQ_NUM ; bit <<= 1, i++)
132 if (val & bit)
133 break;
134#endif
135 if (i < VOYAGER_IRQ_NUM) { 129 if (i < VOYAGER_IRQ_NUM) {
136 irq = VOYAGER_IRQ_BASE + i; 130 irq = VOYAGER_IRQ_BASE + i;
137 if (voyagergx_demux[i].func != 0) 131 if (voyagergx_demux[i].func != 0)
diff --git a/arch/sh/cchips/voyagergx/setup.c b/arch/sh/cchips/voyagergx/setup.c
index 66b2fedd7ad9..33f03027c193 100644
--- a/arch/sh/cchips/voyagergx/setup.c
+++ b/arch/sh/cchips/voyagergx/setup.c
@@ -19,7 +19,7 @@ static int __init setup_voyagergx(void)
19{ 19{
20 unsigned long val; 20 unsigned long val;
21 21
22 val = inl(DRAM_CTRL); 22 val = readl((void __iomem *)DRAM_CTRL);
23 val |= (DRAM_CTRL_CPU_COLUMN_SIZE_256 | 23 val |= (DRAM_CTRL_CPU_COLUMN_SIZE_256 |
24 DRAM_CTRL_CPU_ACTIVE_PRECHARGE | 24 DRAM_CTRL_CPU_ACTIVE_PRECHARGE |
25 DRAM_CTRL_CPU_RESET | 25 DRAM_CTRL_CPU_RESET |
@@ -29,7 +29,7 @@ static int __init setup_voyagergx(void)
29 DRAM_CTRL_ACTIVE_PRECHARGE | 29 DRAM_CTRL_ACTIVE_PRECHARGE |
30 DRAM_CTRL_RESET | 30 DRAM_CTRL_RESET |
31 DRAM_CTRL_REMAIN_ACTIVE); 31 DRAM_CTRL_REMAIN_ACTIVE);
32 outl(val, DRAM_CTRL); 32 writel(val, (void __iomem *)DRAM_CTRL);
33 33
34 return 0; 34 return 0;
35} 35}
diff --git a/arch/sh/configs/rts7751r2d_defconfig b/arch/sh/configs/rts7751r2d_defconfig
index 099e98f14729..db6a02df5af6 100644
--- a/arch/sh/configs/rts7751r2d_defconfig
+++ b/arch/sh/configs/rts7751r2d_defconfig
@@ -1,15 +1,21 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.18 3# Linux kernel version: 2.6.20
4# Tue Oct 3 11:38:36 2006 4# Thu Feb 15 17:17:29 2007
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_RWSEM_GENERIC_SPINLOCK=y 7CONFIG_RWSEM_GENERIC_SPINLOCK=y
8CONFIG_GENERIC_FIND_NEXT_BIT=y 8CONFIG_GENERIC_FIND_NEXT_BIT=y
9CONFIG_GENERIC_HWEIGHT=y 9CONFIG_GENERIC_HWEIGHT=y
10CONFIG_GENERIC_HARDIRQS=y 10CONFIG_GENERIC_HARDIRQS=y
11CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
11CONFIG_GENERIC_IRQ_PROBE=y 12CONFIG_GENERIC_IRQ_PROBE=y
12CONFIG_GENERIC_CALIBRATE_DELAY=y 13CONFIG_GENERIC_CALIBRATE_DELAY=y
14# CONFIG_GENERIC_TIME is not set
15CONFIG_STACKTRACE_SUPPORT=y
16CONFIG_LOCKDEP_SUPPORT=y
17# CONFIG_ARCH_HAS_ILOG2_U32 is not set
18# CONFIG_ARCH_HAS_ILOG2_U64 is not set
13CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 19CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
14 20
15# 21#
@@ -33,8 +39,8 @@ CONFIG_SYSVIPC=y
33# CONFIG_UTS_NS is not set 39# CONFIG_UTS_NS is not set
34# CONFIG_AUDIT is not set 40# CONFIG_AUDIT is not set
35# CONFIG_IKCONFIG is not set 41# CONFIG_IKCONFIG is not set
42CONFIG_SYSFS_DEPRECATED=y
36# CONFIG_RELAY is not set 43# CONFIG_RELAY is not set
37CONFIG_INITRAMFS_SOURCE=""
38# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 44# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
39CONFIG_SYSCTL=y 45CONFIG_SYSCTL=y
40CONFIG_EMBEDDED=y 46CONFIG_EMBEDDED=y
@@ -97,10 +103,8 @@ CONFIG_DEFAULT_IOSCHED="anticipatory"
97# CONFIG_SH_73180_SOLUTION_ENGINE is not set 103# CONFIG_SH_73180_SOLUTION_ENGINE is not set
98# CONFIG_SH_7751_SYSTEMH is not set 104# CONFIG_SH_7751_SYSTEMH is not set
99# CONFIG_SH_HP6XX is not set 105# CONFIG_SH_HP6XX is not set
100# CONFIG_SH_EC3104 is not set
101# CONFIG_SH_SATURN is not set 106# CONFIG_SH_SATURN is not set
102# CONFIG_SH_DREAMCAST is not set 107# CONFIG_SH_DREAMCAST is not set
103# CONFIG_SH_BIGSUR is not set
104# CONFIG_SH_MPC1211 is not set 108# CONFIG_SH_MPC1211 is not set
105# CONFIG_SH_SH03 is not set 109# CONFIG_SH_SH03 is not set
106# CONFIG_SH_SECUREEDGE5410 is not set 110# CONFIG_SH_SECUREEDGE5410 is not set
@@ -113,6 +117,9 @@ CONFIG_SH_RTS7751R2D=y
113# CONFIG_SH_LANDISK is not set 117# CONFIG_SH_LANDISK is not set
114# CONFIG_SH_TITAN is not set 118# CONFIG_SH_TITAN is not set
115# CONFIG_SH_SHMIN is not set 119# CONFIG_SH_SHMIN is not set
120# CONFIG_SH_7206_SOLUTION_ENGINE is not set
121# CONFIG_SH_7619_SOLUTION_ENGINE is not set
122# CONFIG_SH_ASDAP310 is not set
116# CONFIG_SH_UNKNOWN is not set 123# CONFIG_SH_UNKNOWN is not set
117 124
118# 125#
@@ -124,6 +131,12 @@ CONFIG_CPU_SH4=y
124# SH-2 Processor Support 131# SH-2 Processor Support
125# 132#
126# CONFIG_CPU_SUBTYPE_SH7604 is not set 133# CONFIG_CPU_SUBTYPE_SH7604 is not set
134# CONFIG_CPU_SUBTYPE_SH7619 is not set
135
136#
137# SH-2A Processor Support
138#
139# CONFIG_CPU_SUBTYPE_SH7206 is not set
127 140
128# 141#
129# SH-3 Processor Support 142# SH-3 Processor Support
@@ -159,12 +172,14 @@ CONFIG_CPU_SUBTYPE_SH7751R=y
159# 172#
160# CONFIG_CPU_SUBTYPE_SH7770 is not set 173# CONFIG_CPU_SUBTYPE_SH7770 is not set
161# CONFIG_CPU_SUBTYPE_SH7780 is not set 174# CONFIG_CPU_SUBTYPE_SH7780 is not set
175# CONFIG_CPU_SUBTYPE_SH7785 is not set
162 176
163# 177#
164# SH4AL-DSP Processor Support 178# SH4AL-DSP Processor Support
165# 179#
166# CONFIG_CPU_SUBTYPE_SH73180 is not set 180# CONFIG_CPU_SUBTYPE_SH73180 is not set
167# CONFIG_CPU_SUBTYPE_SH7343 is not set 181# CONFIG_CPU_SUBTYPE_SH7343 is not set
182# CONFIG_CPU_SUBTYPE_SH7722 is not set
168 183
169# 184#
170# Memory management options 185# Memory management options
@@ -174,6 +189,9 @@ CONFIG_PAGE_OFFSET=0x80000000
174CONFIG_MEMORY_START=0x0c000000 189CONFIG_MEMORY_START=0x0c000000
175CONFIG_MEMORY_SIZE=0x04000000 190CONFIG_MEMORY_SIZE=0x04000000
176CONFIG_VSYSCALL=y 191CONFIG_VSYSCALL=y
192CONFIG_PAGE_SIZE_4KB=y
193# CONFIG_PAGE_SIZE_8KB is not set
194# CONFIG_PAGE_SIZE_64KB is not set
177CONFIG_SELECT_MEMORY_MODEL=y 195CONFIG_SELECT_MEMORY_MODEL=y
178CONFIG_FLATMEM_MANUAL=y 196CONFIG_FLATMEM_MANUAL=y
179# CONFIG_DISCONTIGMEM_MANUAL is not set 197# CONFIG_DISCONTIGMEM_MANUAL is not set
@@ -183,6 +201,7 @@ CONFIG_FLAT_NODE_MEM_MAP=y
183# CONFIG_SPARSEMEM_STATIC is not set 201# CONFIG_SPARSEMEM_STATIC is not set
184CONFIG_SPLIT_PTLOCK_CPUS=4 202CONFIG_SPLIT_PTLOCK_CPUS=4
185# CONFIG_RESOURCES_64BIT is not set 203# CONFIG_RESOURCES_64BIT is not set
204CONFIG_ZONE_DMA_FLAG=0
186 205
187# 206#
188# Cache configuration 207# Cache configuration
@@ -195,11 +214,14 @@ CONFIG_SPLIT_PTLOCK_CPUS=4
195# Processor features 214# Processor features
196# 215#
197CONFIG_CPU_LITTLE_ENDIAN=y 216CONFIG_CPU_LITTLE_ENDIAN=y
217# CONFIG_CPU_BIG_ENDIAN is not set
198CONFIG_SH_FPU=y 218CONFIG_SH_FPU=y
199# CONFIG_SH_DSP is not set 219# CONFIG_SH_DSP is not set
200# CONFIG_SH_STORE_QUEUES is not set 220# CONFIG_SH_STORE_QUEUES is not set
201CONFIG_CPU_HAS_INTEVT=y 221CONFIG_CPU_HAS_INTEVT=y
222CONFIG_CPU_HAS_IPR_IRQ=y
202CONFIG_CPU_HAS_SR_RB=y 223CONFIG_CPU_HAS_SR_RB=y
224CONFIG_CPU_HAS_PTEA=y
203 225
204# 226#
205# Timer support 227# Timer support
@@ -210,6 +232,8 @@ CONFIG_SH_TMU=y
210# RTS7751R2D options 232# RTS7751R2D options
211# 233#
212CONFIG_RTS7751R2D_REV11=y 234CONFIG_RTS7751R2D_REV11=y
235CONFIG_SH_TIMER_IRQ=16
236# CONFIG_NO_IDLE_HZ is not set
213CONFIG_SH_PCLK_FREQ=60000000 237CONFIG_SH_PCLK_FREQ=60000000
214 238
215# 239#
@@ -232,10 +256,16 @@ CONFIG_VOYAGERGX=y
232CONFIG_HEARTBEAT=y 256CONFIG_HEARTBEAT=y
233 257
234# 258#
259# Additional SuperH Device Drivers
260#
261# CONFIG_PUSH_SWITCH is not set
262
263#
235# Kernel features 264# Kernel features
236# 265#
237# CONFIG_HZ_100 is not set 266# CONFIG_HZ_100 is not set
238CONFIG_HZ_250=y 267CONFIG_HZ_250=y
268# CONFIG_HZ_300 is not set
239# CONFIG_HZ_1000 is not set 269# CONFIG_HZ_1000 is not set
240CONFIG_HZ=250 270CONFIG_HZ=250
241# CONFIG_KEXEC is not set 271# CONFIG_KEXEC is not set
@@ -251,7 +281,7 @@ CONFIG_ZERO_PAGE_OFFSET=0x00010000
251CONFIG_BOOT_LINK_OFFSET=0x00800000 281CONFIG_BOOT_LINK_OFFSET=0x00800000
252# CONFIG_UBC_WAKEUP is not set 282# CONFIG_UBC_WAKEUP is not set
253CONFIG_CMDLINE_BOOL=y 283CONFIG_CMDLINE_BOOL=y
254CONFIG_CMDLINE="mem=64M console=ttySC0,115200 root=/dev/hda1" 284CONFIG_CMDLINE="console=ttySC0,115200 root=/dev/sda1"
255 285
256# 286#
257# Bus options 287# Bus options
@@ -260,7 +290,6 @@ CONFIG_PCI=y
260CONFIG_SH_PCIDMA_NONCOHERENT=y 290CONFIG_SH_PCIDMA_NONCOHERENT=y
261CONFIG_PCI_AUTO=y 291CONFIG_PCI_AUTO=y
262CONFIG_PCI_AUTO_UPDATE_RESOURCES=y 292CONFIG_PCI_AUTO_UPDATE_RESOURCES=y
263# CONFIG_PCI_MULTITHREAD_PROBE is not set
264 293
265# 294#
266# PCCARD (PCMCIA/CardBus) support 295# PCCARD (PCMCIA/CardBus) support
@@ -302,6 +331,7 @@ CONFIG_UNIX=y
302CONFIG_XFRM=y 331CONFIG_XFRM=y
303# CONFIG_XFRM_USER is not set 332# CONFIG_XFRM_USER is not set
304# CONFIG_XFRM_SUB_POLICY is not set 333# CONFIG_XFRM_SUB_POLICY is not set
334# CONFIG_XFRM_MIGRATE is not set
305# CONFIG_NET_KEY is not set 335# CONFIG_NET_KEY is not set
306CONFIG_INET=y 336CONFIG_INET=y
307# CONFIG_IP_MULTICAST is not set 337# CONFIG_IP_MULTICAST is not set
@@ -319,11 +349,13 @@ CONFIG_IP_FIB_HASH=y
319# CONFIG_INET_TUNNEL is not set 349# CONFIG_INET_TUNNEL is not set
320CONFIG_INET_XFRM_MODE_TRANSPORT=y 350CONFIG_INET_XFRM_MODE_TRANSPORT=y
321CONFIG_INET_XFRM_MODE_TUNNEL=y 351CONFIG_INET_XFRM_MODE_TUNNEL=y
352CONFIG_INET_XFRM_MODE_BEET=y
322CONFIG_INET_DIAG=y 353CONFIG_INET_DIAG=y
323CONFIG_INET_TCP_DIAG=y 354CONFIG_INET_TCP_DIAG=y
324# CONFIG_TCP_CONG_ADVANCED is not set 355# CONFIG_TCP_CONG_ADVANCED is not set
325CONFIG_TCP_CONG_CUBIC=y 356CONFIG_TCP_CONG_CUBIC=y
326CONFIG_DEFAULT_TCP_CONG="cubic" 357CONFIG_DEFAULT_TCP_CONG="cubic"
358# CONFIG_TCP_MD5SIG is not set
327# CONFIG_IPV6 is not set 359# CONFIG_IPV6 is not set
328# CONFIG_INET6_XFRM_TUNNEL is not set 360# CONFIG_INET6_XFRM_TUNNEL is not set
329# CONFIG_INET6_TUNNEL is not set 361# CONFIG_INET6_TUNNEL is not set
@@ -380,7 +412,7 @@ CONFIG_WIRELESS_EXT=y
380# 412#
381CONFIG_STANDALONE=y 413CONFIG_STANDALONE=y
382CONFIG_PREVENT_FIRMWARE_BUILD=y 414CONFIG_PREVENT_FIRMWARE_BUILD=y
383# CONFIG_FW_LOADER is not set 415CONFIG_FW_LOADER=m
384# CONFIG_SYS_HYPERVISOR is not set 416# CONFIG_SYS_HYPERVISOR is not set
385 417
386# 418#
@@ -422,44 +454,145 @@ CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
422# CONFIG_ATA_OVER_ETH is not set 454# CONFIG_ATA_OVER_ETH is not set
423 455
424# 456#
425# ATA/ATAPI/MFM/RLL support 457# Misc devices
426#
427CONFIG_IDE=y
428CONFIG_IDE_MAX_HWIFS=4
429CONFIG_BLK_DEV_IDE=y
430
431#
432# Please see Documentation/ide.txt for help/info on IDE drives
433# 458#
434# CONFIG_BLK_DEV_IDE_SATA is not set 459# CONFIG_SGI_IOC4 is not set
435CONFIG_BLK_DEV_IDEDISK=y 460# CONFIG_TIFM_CORE is not set
436# CONFIG_IDEDISK_MULTI_MODE is not set
437# CONFIG_BLK_DEV_IDECD is not set
438# CONFIG_BLK_DEV_IDETAPE is not set
439# CONFIG_BLK_DEV_IDEFLOPPY is not set
440# CONFIG_IDE_TASK_IOCTL is not set
441 461
442# 462#
443# IDE chipset support/bugfixes 463# ATA/ATAPI/MFM/RLL support
444# 464#
445CONFIG_IDE_GENERIC=y 465# CONFIG_IDE is not set
446# CONFIG_BLK_DEV_IDEPCI is not set
447# CONFIG_IDE_ARM is not set
448# CONFIG_BLK_DEV_IDEDMA is not set
449# CONFIG_IDEDMA_AUTO is not set
450# CONFIG_BLK_DEV_HD is not set
451 466
452# 467#
453# SCSI device support 468# SCSI device support
454# 469#
455# CONFIG_RAID_ATTRS is not set 470# CONFIG_RAID_ATTRS is not set
456# CONFIG_SCSI is not set 471CONFIG_SCSI=y
472# CONFIG_SCSI_TGT is not set
457# CONFIG_SCSI_NETLINK is not set 473# CONFIG_SCSI_NETLINK is not set
474CONFIG_SCSI_PROC_FS=y
475
476#
477# SCSI support type (disk, tape, CD-ROM)
478#
479CONFIG_BLK_DEV_SD=y
480# CONFIG_CHR_DEV_ST is not set
481# CONFIG_CHR_DEV_OSST is not set
482# CONFIG_BLK_DEV_SR is not set
483# CONFIG_CHR_DEV_SG is not set
484# CONFIG_CHR_DEV_SCH is not set
485
486#
487# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
488#
489# CONFIG_SCSI_MULTI_LUN is not set
490# CONFIG_SCSI_CONSTANTS is not set
491# CONFIG_SCSI_LOGGING is not set
492# CONFIG_SCSI_SCAN_ASYNC is not set
493
494#
495# SCSI Transports
496#
497# CONFIG_SCSI_SPI_ATTRS is not set
498# CONFIG_SCSI_FC_ATTRS is not set
499# CONFIG_SCSI_ISCSI_ATTRS is not set
500# CONFIG_SCSI_SAS_ATTRS is not set
501# CONFIG_SCSI_SAS_LIBSAS is not set
502
503#
504# SCSI low-level drivers
505#
506# CONFIG_ISCSI_TCP is not set
507# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
508# CONFIG_SCSI_3W_9XXX is not set
509# CONFIG_SCSI_ACARD is not set
510# CONFIG_SCSI_AACRAID is not set
511# CONFIG_SCSI_AIC7XXX is not set
512# CONFIG_SCSI_AIC7XXX_OLD is not set
513# CONFIG_SCSI_AIC79XX is not set
514# CONFIG_SCSI_AIC94XX is not set
515# CONFIG_SCSI_DPT_I2O is not set
516# CONFIG_SCSI_ARCMSR is not set
517# CONFIG_MEGARAID_NEWGEN is not set
518# CONFIG_MEGARAID_LEGACY is not set
519# CONFIG_MEGARAID_SAS is not set
520# CONFIG_SCSI_HPTIOP is not set
521# CONFIG_SCSI_DMX3191D is not set
522# CONFIG_SCSI_FUTURE_DOMAIN is not set
523# CONFIG_SCSI_IPS is not set
524# CONFIG_SCSI_INITIO is not set
525# CONFIG_SCSI_INIA100 is not set
526# CONFIG_SCSI_STEX is not set
527# CONFIG_SCSI_SYM53C8XX_2 is not set
528# CONFIG_SCSI_IPR is not set
529# CONFIG_SCSI_QLOGIC_1280 is not set
530# CONFIG_SCSI_QLA_FC is not set
531# CONFIG_SCSI_QLA_ISCSI is not set
532# CONFIG_SCSI_LPFC is not set
533# CONFIG_SCSI_DC395x is not set
534# CONFIG_SCSI_DC390T is not set
535# CONFIG_SCSI_NSP32 is not set
536# CONFIG_SCSI_DEBUG is not set
537# CONFIG_SCSI_SRP is not set
458 538
459# 539#
460# Serial ATA (prod) and Parallel ATA (experimental) drivers 540# Serial ATA (prod) and Parallel ATA (experimental) drivers
461# 541#
462# CONFIG_ATA is not set 542CONFIG_ATA=y
543# CONFIG_ATA_NONSTANDARD is not set
544# CONFIG_SATA_AHCI is not set
545# CONFIG_SATA_SVW is not set
546# CONFIG_ATA_PIIX is not set
547# CONFIG_SATA_MV is not set
548# CONFIG_SATA_NV is not set
549# CONFIG_PDC_ADMA is not set
550# CONFIG_SATA_QSTOR is not set
551# CONFIG_SATA_PROMISE is not set
552# CONFIG_SATA_SX4 is not set
553# CONFIG_SATA_SIL is not set
554# CONFIG_SATA_SIL24 is not set
555# CONFIG_SATA_SIS is not set
556# CONFIG_SATA_ULI is not set
557# CONFIG_SATA_VIA is not set
558# CONFIG_SATA_VITESSE is not set
559# CONFIG_SATA_INIC162X is not set
560# CONFIG_PATA_ALI is not set
561# CONFIG_PATA_AMD is not set
562# CONFIG_PATA_ARTOP is not set
563# CONFIG_PATA_ATIIXP is not set
564# CONFIG_PATA_CMD64X is not set
565# CONFIG_PATA_CS5520 is not set
566# CONFIG_PATA_CS5530 is not set
567# CONFIG_PATA_CYPRESS is not set
568# CONFIG_PATA_EFAR is not set
569# CONFIG_ATA_GENERIC is not set
570# CONFIG_PATA_HPT366 is not set
571# CONFIG_PATA_HPT37X is not set
572# CONFIG_PATA_HPT3X2N is not set
573# CONFIG_PATA_HPT3X3 is not set
574# CONFIG_PATA_IT821X is not set
575# CONFIG_PATA_IT8213 is not set
576# CONFIG_PATA_JMICRON is not set
577# CONFIG_PATA_TRIFLEX is not set
578# CONFIG_PATA_MARVELL is not set
579# CONFIG_PATA_MPIIX is not set
580# CONFIG_PATA_OLDPIIX is not set
581# CONFIG_PATA_NETCELL is not set
582# CONFIG_PATA_NS87410 is not set
583# CONFIG_PATA_OPTI is not set
584# CONFIG_PATA_OPTIDMA is not set
585# CONFIG_PATA_PDC_OLD is not set
586# CONFIG_PATA_RADISYS is not set
587# CONFIG_PATA_RZ1000 is not set
588# CONFIG_PATA_SC1200 is not set
589# CONFIG_PATA_SERVERWORKS is not set
590# CONFIG_PATA_PDC2027X is not set
591# CONFIG_PATA_SIL680 is not set
592# CONFIG_PATA_SIS is not set
593# CONFIG_PATA_VIA is not set
594# CONFIG_PATA_WINBOND is not set
595CONFIG_PATA_PLATFORM=y
463 596
464# 597#
465# Multi-device support (RAID and LVM) 598# Multi-device support (RAID and LVM)
@@ -470,6 +603,9 @@ CONFIG_IDE_GENERIC=y
470# Fusion MPT device support 603# Fusion MPT device support
471# 604#
472# CONFIG_FUSION is not set 605# CONFIG_FUSION is not set
606# CONFIG_FUSION_SPI is not set
607# CONFIG_FUSION_FC is not set
608# CONFIG_FUSION_SAS is not set
473 609
474# 610#
475# IEEE 1394 (FireWire) support 611# IEEE 1394 (FireWire) support
@@ -540,6 +676,7 @@ CONFIG_8139TOO=y
540# CONFIG_SUNDANCE is not set 676# CONFIG_SUNDANCE is not set
541# CONFIG_TLAN is not set 677# CONFIG_TLAN is not set
542# CONFIG_VIA_RHINE is not set 678# CONFIG_VIA_RHINE is not set
679# CONFIG_SC92031 is not set
543 680
544# 681#
545# Ethernet (1000 Mbit) 682# Ethernet (1000 Mbit)
@@ -559,14 +696,17 @@ CONFIG_8139TOO=y
559# CONFIG_TIGON3 is not set 696# CONFIG_TIGON3 is not set
560# CONFIG_BNX2 is not set 697# CONFIG_BNX2 is not set
561# CONFIG_QLA3XXX is not set 698# CONFIG_QLA3XXX is not set
699# CONFIG_ATL1 is not set
562 700
563# 701#
564# Ethernet (10000 Mbit) 702# Ethernet (10000 Mbit)
565# 703#
566# CONFIG_CHELSIO_T1 is not set 704# CONFIG_CHELSIO_T1 is not set
705# CONFIG_CHELSIO_T3 is not set
567# CONFIG_IXGB is not set 706# CONFIG_IXGB is not set
568# CONFIG_S2IO is not set 707# CONFIG_S2IO is not set
569# CONFIG_MYRI10GE is not set 708# CONFIG_MYRI10GE is not set
709# CONFIG_NETXEN_NIC is not set
570 710
571# 711#
572# Token Ring devices 712# Token Ring devices
@@ -611,6 +751,7 @@ CONFIG_NET_WIRELESS=y
611# CONFIG_HIPPI is not set 751# CONFIG_HIPPI is not set
612# CONFIG_PPP is not set 752# CONFIG_PPP is not set
613# CONFIG_SLIP is not set 753# CONFIG_SLIP is not set
754# CONFIG_NET_FC is not set
614# CONFIG_SHAPER is not set 755# CONFIG_SHAPER is not set
615# CONFIG_NETCONSOLE is not set 756# CONFIG_NETCONSOLE is not set
616# CONFIG_NETPOLL is not set 757# CONFIG_NETPOLL is not set
@@ -646,14 +787,23 @@ CONFIG_NET_WIRELESS=y
646# 787#
647# Serial drivers 788# Serial drivers
648# 789#
649# CONFIG_SERIAL_8250 is not set 790CONFIG_SERIAL_8250=y
791# CONFIG_SERIAL_8250_CONSOLE is not set
792CONFIG_SERIAL_8250_PCI=y
793CONFIG_SERIAL_8250_NR_UARTS=4
794CONFIG_SERIAL_8250_RUNTIME_UARTS=4
795# CONFIG_SERIAL_8250_EXTENDED is not set
650 796
651# 797#
652# Non-8250 serial port support 798# Non-8250 serial port support
653# 799#
654# CONFIG_SERIAL_SH_SCI is not set 800CONFIG_SERIAL_SH_SCI=y
801CONFIG_SERIAL_SH_SCI_NR_UARTS=1
802CONFIG_SERIAL_SH_SCI_CONSOLE=y
803CONFIG_SERIAL_CORE=y
804CONFIG_SERIAL_CORE_CONSOLE=y
655# CONFIG_SERIAL_JSM is not set 805# CONFIG_SERIAL_JSM is not set
656# CONFIG_UNIX98_PTYS is not set 806CONFIG_UNIX98_PTYS=y
657CONFIG_LEGACY_PTYS=y 807CONFIG_LEGACY_PTYS=y
658CONFIG_LEGACY_PTY_COUNT=256 808CONFIG_LEGACY_PTY_COUNT=256
659 809
@@ -671,10 +821,6 @@ CONFIG_HW_RANDOM=y
671# CONFIG_DTLK is not set 821# CONFIG_DTLK is not set
672# CONFIG_R3964 is not set 822# CONFIG_R3964 is not set
673# CONFIG_APPLICOM is not set 823# CONFIG_APPLICOM is not set
674
675#
676# Ftape, the floppy tape device driver
677#
678# CONFIG_DRM is not set 824# CONFIG_DRM is not set
679# CONFIG_RAW_DRIVER is not set 825# CONFIG_RAW_DRIVER is not set
680 826
@@ -682,7 +828,6 @@ CONFIG_HW_RANDOM=y
682# TPM devices 828# TPM devices
683# 829#
684# CONFIG_TCG_TPM is not set 830# CONFIG_TCG_TPM is not set
685# CONFIG_TELCLOCK is not set
686 831
687# 832#
688# I2C support 833# I2C support
@@ -698,6 +843,7 @@ CONFIG_HW_RANDOM=y
698# 843#
699# Dallas's 1-wire bus 844# Dallas's 1-wire bus
700# 845#
846# CONFIG_W1 is not set
701 847
702# 848#
703# Hardware Monitoring support 849# Hardware Monitoring support
@@ -706,18 +852,14 @@ CONFIG_HWMON=y
706# CONFIG_HWMON_VID is not set 852# CONFIG_HWMON_VID is not set
707# CONFIG_SENSORS_ABITUGURU is not set 853# CONFIG_SENSORS_ABITUGURU is not set
708# CONFIG_SENSORS_F71805F is not set 854# CONFIG_SENSORS_F71805F is not set
855# CONFIG_SENSORS_PC87427 is not set
709# CONFIG_SENSORS_VT1211 is not set 856# CONFIG_SENSORS_VT1211 is not set
710# CONFIG_HWMON_DEBUG_CHIP is not set 857# CONFIG_HWMON_DEBUG_CHIP is not set
711 858
712# 859#
713# Misc devices
714#
715
716#
717# Multimedia devices 860# Multimedia devices
718# 861#
719# CONFIG_VIDEO_DEV is not set 862# CONFIG_VIDEO_DEV is not set
720CONFIG_VIDEO_V4L2=y
721 863
722# 864#
723# Digital Video Broadcasting Devices 865# Digital Video Broadcasting Devices
@@ -759,7 +901,6 @@ CONFIG_SND_VERBOSE_PROCFS=y
759CONFIG_SND_MPU401_UART=m 901CONFIG_SND_MPU401_UART=m
760CONFIG_SND_OPL3_LIB=m 902CONFIG_SND_OPL3_LIB=m
761CONFIG_SND_AC97_CODEC=m 903CONFIG_SND_AC97_CODEC=m
762CONFIG_SND_AC97_BUS=m
763# CONFIG_SND_DUMMY is not set 904# CONFIG_SND_DUMMY is not set
764# CONFIG_SND_MTPAV is not set 905# CONFIG_SND_MTPAV is not set
765# CONFIG_SND_SERIAL_U16550 is not set 906# CONFIG_SND_SERIAL_U16550 is not set
@@ -782,6 +923,18 @@ CONFIG_SND_AC97_BUS=m
782# CONFIG_SND_CMIPCI is not set 923# CONFIG_SND_CMIPCI is not set
783# CONFIG_SND_CS4281 is not set 924# CONFIG_SND_CS4281 is not set
784# CONFIG_SND_CS46XX is not set 925# CONFIG_SND_CS46XX is not set
926# CONFIG_SND_DARLA20 is not set
927# CONFIG_SND_GINA20 is not set
928# CONFIG_SND_LAYLA20 is not set
929# CONFIG_SND_DARLA24 is not set
930# CONFIG_SND_GINA24 is not set
931# CONFIG_SND_LAYLA24 is not set
932# CONFIG_SND_MONA is not set
933# CONFIG_SND_MIA is not set
934# CONFIG_SND_ECHO3G is not set
935# CONFIG_SND_INDIGO is not set
936# CONFIG_SND_INDIGOIO is not set
937# CONFIG_SND_INDIGODJ is not set
785# CONFIG_SND_EMU10K1 is not set 938# CONFIG_SND_EMU10K1 is not set
786# CONFIG_SND_EMU10K1X is not set 939# CONFIG_SND_EMU10K1X is not set
787# CONFIG_SND_ENS1370 is not set 940# CONFIG_SND_ENS1370 is not set
@@ -801,6 +954,7 @@ CONFIG_SND_AC97_BUS=m
801# CONFIG_SND_MIXART is not set 954# CONFIG_SND_MIXART is not set
802# CONFIG_SND_NM256 is not set 955# CONFIG_SND_NM256 is not set
803# CONFIG_SND_PCXHR is not set 956# CONFIG_SND_PCXHR is not set
957# CONFIG_SND_RIPTIDE is not set
804# CONFIG_SND_RME32 is not set 958# CONFIG_SND_RME32 is not set
805# CONFIG_SND_RME96 is not set 959# CONFIG_SND_RME96 is not set
806# CONFIG_SND_RME9652 is not set 960# CONFIG_SND_RME9652 is not set
@@ -813,17 +967,22 @@ CONFIG_SND_YMFPCI=m
813# CONFIG_SND_AC97_POWER_SAVE is not set 967# CONFIG_SND_AC97_POWER_SAVE is not set
814 968
815# 969#
970# SoC audio support
971#
972# CONFIG_SND_SOC is not set
973
974#
816# Open Sound System 975# Open Sound System
817# 976#
818CONFIG_SOUND_PRIME=m 977CONFIG_SOUND_PRIME=m
819# CONFIG_OSS_OBSOLETE_DRIVER is not set 978# CONFIG_OBSOLETE_OSS is not set
820# CONFIG_SOUND_BT878 is not set 979# CONFIG_SOUND_BT878 is not set
821# CONFIG_SOUND_ES1371 is not set
822# CONFIG_SOUND_ICH is not set 980# CONFIG_SOUND_ICH is not set
823# CONFIG_SOUND_TRIDENT is not set 981# CONFIG_SOUND_TRIDENT is not set
824# CONFIG_SOUND_MSNDCLAS is not set 982# CONFIG_SOUND_MSNDCLAS is not set
825# CONFIG_SOUND_MSNDPIN is not set 983# CONFIG_SOUND_MSNDPIN is not set
826# CONFIG_SOUND_VIA82CXXX is not set 984# CONFIG_SOUND_VIA82CXXX is not set
985CONFIG_AC97_BUS=m
827 986
828# 987#
829# USB support 988# USB support
@@ -872,7 +1031,29 @@ CONFIG_USB_ARCH_HAS_EHCI=y
872# 1031#
873# Real Time Clock 1032# Real Time Clock
874# 1033#
875# CONFIG_RTC_CLASS is not set 1034CONFIG_RTC_LIB=y
1035CONFIG_RTC_CLASS=y
1036CONFIG_RTC_HCTOSYS=y
1037CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
1038# CONFIG_RTC_DEBUG is not set
1039
1040#
1041# RTC interfaces
1042#
1043CONFIG_RTC_INTF_SYSFS=y
1044CONFIG_RTC_INTF_PROC=y
1045CONFIG_RTC_INTF_DEV=y
1046# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
1047
1048#
1049# RTC drivers
1050#
1051# CONFIG_RTC_DRV_DS1553 is not set
1052# CONFIG_RTC_DRV_DS1742 is not set
1053# CONFIG_RTC_DRV_M48T86 is not set
1054CONFIG_RTC_DRV_SH=y
1055# CONFIG_RTC_DRV_TEST is not set
1056# CONFIG_RTC_DRV_V3020 is not set
876 1057
877# 1058#
878# DMA Engine support 1059# DMA Engine support
@@ -888,16 +1069,26 @@ CONFIG_USB_ARCH_HAS_EHCI=y
888# 1069#
889 1070
890# 1071#
1072# Auxiliary Display support
1073#
1074
1075#
1076# Virtualization
1077#
1078
1079#
891# File systems 1080# File systems
892# 1081#
893CONFIG_EXT2_FS=y 1082CONFIG_EXT2_FS=y
894# CONFIG_EXT2_FS_XATTR is not set 1083# CONFIG_EXT2_FS_XATTR is not set
895# CONFIG_EXT2_FS_XIP is not set 1084# CONFIG_EXT2_FS_XIP is not set
896# CONFIG_EXT3_FS is not set 1085# CONFIG_EXT3_FS is not set
1086# CONFIG_EXT4DEV_FS is not set
897# CONFIG_REISERFS_FS is not set 1087# CONFIG_REISERFS_FS is not set
898# CONFIG_JFS_FS is not set 1088# CONFIG_JFS_FS is not set
899# CONFIG_FS_POSIX_ACL is not set 1089# CONFIG_FS_POSIX_ACL is not set
900# CONFIG_XFS_FS is not set 1090# CONFIG_XFS_FS is not set
1091# CONFIG_GFS2_FS is not set
901# CONFIG_OCFS2_FS is not set 1092# CONFIG_OCFS2_FS is not set
902CONFIG_MINIX_FS=y 1093CONFIG_MINIX_FS=y
903# CONFIG_ROMFS_FS is not set 1094# CONFIG_ROMFS_FS is not set
@@ -932,7 +1123,8 @@ CONFIG_PROC_FS=y
932CONFIG_PROC_KCORE=y 1123CONFIG_PROC_KCORE=y
933CONFIG_PROC_SYSCTL=y 1124CONFIG_PROC_SYSCTL=y
934CONFIG_SYSFS=y 1125CONFIG_SYSFS=y
935# CONFIG_TMPFS is not set 1126CONFIG_TMPFS=y
1127# CONFIG_TMPFS_POSIX_ACL is not set
936# CONFIG_HUGETLBFS is not set 1128# CONFIG_HUGETLBFS is not set
937# CONFIG_HUGETLB_PAGE is not set 1129# CONFIG_HUGETLB_PAGE is not set
938CONFIG_RAMFS=y 1130CONFIG_RAMFS=y
@@ -1018,6 +1210,11 @@ CONFIG_NLS_CODEPAGE_932=y
1018# CONFIG_NLS_UTF8 is not set 1210# CONFIG_NLS_UTF8 is not set
1019 1211
1020# 1212#
1213# Distributed Lock Manager
1214#
1215# CONFIG_DLM is not set
1216
1217#
1021# Profiling support 1218# Profiling support
1022# 1219#
1023CONFIG_PROFILING=y 1220CONFIG_PROFILING=y
@@ -1026,16 +1223,20 @@ CONFIG_OPROFILE=y
1026# 1223#
1027# Kernel hacking 1224# Kernel hacking
1028# 1225#
1226CONFIG_TRACE_IRQFLAGS_SUPPORT=y
1029# CONFIG_PRINTK_TIME is not set 1227# CONFIG_PRINTK_TIME is not set
1030CONFIG_ENABLE_MUST_CHECK=y 1228CONFIG_ENABLE_MUST_CHECK=y
1031# CONFIG_MAGIC_SYSRQ is not set 1229# CONFIG_MAGIC_SYSRQ is not set
1032# CONFIG_UNUSED_SYMBOLS is not set 1230# CONFIG_UNUSED_SYMBOLS is not set
1231# CONFIG_DEBUG_FS is not set
1232# CONFIG_HEADERS_CHECK is not set
1033# CONFIG_DEBUG_KERNEL is not set 1233# CONFIG_DEBUG_KERNEL is not set
1034CONFIG_LOG_BUF_SHIFT=14 1234CONFIG_LOG_BUF_SHIFT=14
1035# CONFIG_DEBUG_BUGVERBOSE is not set 1235# CONFIG_DEBUG_BUGVERBOSE is not set
1036# CONFIG_DEBUG_FS is not set
1037# CONFIG_SH_STANDARD_BIOS is not set 1236# CONFIG_SH_STANDARD_BIOS is not set
1038# CONFIG_EARLY_SCIF_CONSOLE is not set 1237CONFIG_EARLY_SCIF_CONSOLE=y
1238CONFIG_EARLY_SCIF_CONSOLE_PORT=0xffe80000
1239CONFIG_EARLY_PRINTK=y
1039# CONFIG_KGDB is not set 1240# CONFIG_KGDB is not set
1040 1241
1041# 1242#
@@ -1052,8 +1253,11 @@ CONFIG_LOG_BUF_SHIFT=14
1052# 1253#
1053# Library routines 1254# Library routines
1054# 1255#
1256CONFIG_BITREVERSE=y
1055# CONFIG_CRC_CCITT is not set 1257# CONFIG_CRC_CCITT is not set
1056# CONFIG_CRC16 is not set 1258# CONFIG_CRC16 is not set
1057CONFIG_CRC32=y 1259CONFIG_CRC32=y
1058# CONFIG_LIBCRC32C is not set 1260# CONFIG_LIBCRC32C is not set
1059CONFIG_PLIST=y 1261CONFIG_PLIST=y
1262CONFIG_HAS_IOMEM=y
1263CONFIG_HAS_IOPORT=y
diff --git a/arch/sh/configs/se7750_defconfig b/arch/sh/configs/se7750_defconfig
index 5d357d68b234..4e6e77fa4ce7 100644
--- a/arch/sh/configs/se7750_defconfig
+++ b/arch/sh/configs/se7750_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.18 3# Linux kernel version: 2.6.20-rc2
4# Tue Oct 3 11:49:01 2006 4# Thu Dec 28 23:15:49 2006
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_RWSEM_GENERIC_SPINLOCK=y 7CONFIG_RWSEM_GENERIC_SPINLOCK=y
@@ -10,6 +10,11 @@ CONFIG_GENERIC_HWEIGHT=y
10CONFIG_GENERIC_HARDIRQS=y 10CONFIG_GENERIC_HARDIRQS=y
11CONFIG_GENERIC_IRQ_PROBE=y 11CONFIG_GENERIC_IRQ_PROBE=y
12CONFIG_GENERIC_CALIBRATE_DELAY=y 12CONFIG_GENERIC_CALIBRATE_DELAY=y
13# CONFIG_GENERIC_TIME is not set
14CONFIG_STACKTRACE_SUPPORT=y
15CONFIG_LOCKDEP_SUPPORT=y
16# CONFIG_ARCH_HAS_ILOG2_U32 is not set
17# CONFIG_ARCH_HAS_ILOG2_U64 is not set
13CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 18CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
14 19
15# 20#
@@ -35,6 +40,7 @@ CONFIG_BSD_PROCESS_ACCT=y
35# CONFIG_AUDIT is not set 40# CONFIG_AUDIT is not set
36CONFIG_IKCONFIG=y 41CONFIG_IKCONFIG=y
37CONFIG_IKCONFIG_PROC=y 42CONFIG_IKCONFIG_PROC=y
43CONFIG_SYSFS_DEPRECATED=y
38# CONFIG_RELAY is not set 44# CONFIG_RELAY is not set
39CONFIG_INITRAMFS_SOURCE="" 45CONFIG_INITRAMFS_SOURCE=""
40# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 46# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
@@ -116,6 +122,8 @@ CONFIG_SH_SOLUTION_ENGINE=y
116# CONFIG_SH_LANDISK is not set 122# CONFIG_SH_LANDISK is not set
117# CONFIG_SH_TITAN is not set 123# CONFIG_SH_TITAN is not set
118# CONFIG_SH_SHMIN is not set 124# CONFIG_SH_SHMIN is not set
125# CONFIG_SH_7206_SOLUTION_ENGINE is not set
126# CONFIG_SH_7619_SOLUTION_ENGINE is not set
119# CONFIG_SH_UNKNOWN is not set 127# CONFIG_SH_UNKNOWN is not set
120 128
121# 129#
@@ -127,6 +135,12 @@ CONFIG_CPU_SH4=y
127# SH-2 Processor Support 135# SH-2 Processor Support
128# 136#
129# CONFIG_CPU_SUBTYPE_SH7604 is not set 137# CONFIG_CPU_SUBTYPE_SH7604 is not set
138# CONFIG_CPU_SUBTYPE_SH7619 is not set
139
140#
141# SH-2A Processor Support
142#
143# CONFIG_CPU_SUBTYPE_SH7206 is not set
130 144
131# 145#
132# SH-3 Processor Support 146# SH-3 Processor Support
@@ -162,12 +176,14 @@ CONFIG_CPU_SUBTYPE_SH7750=y
162# 176#
163# CONFIG_CPU_SUBTYPE_SH7770 is not set 177# CONFIG_CPU_SUBTYPE_SH7770 is not set
164# CONFIG_CPU_SUBTYPE_SH7780 is not set 178# CONFIG_CPU_SUBTYPE_SH7780 is not set
179# CONFIG_CPU_SUBTYPE_SH7785 is not set
165 180
166# 181#
167# SH4AL-DSP Processor Support 182# SH4AL-DSP Processor Support
168# 183#
169# CONFIG_CPU_SUBTYPE_SH73180 is not set 184# CONFIG_CPU_SUBTYPE_SH73180 is not set
170# CONFIG_CPU_SUBTYPE_SH7343 is not set 185# CONFIG_CPU_SUBTYPE_SH7343 is not set
186# CONFIG_CPU_SUBTYPE_SH7722 is not set
171 187
172# 188#
173# Memory management options 189# Memory management options
@@ -177,6 +193,9 @@ CONFIG_PAGE_OFFSET=0x80000000
177CONFIG_MEMORY_START=0x0c000000 193CONFIG_MEMORY_START=0x0c000000
178CONFIG_MEMORY_SIZE=0x02000000 194CONFIG_MEMORY_SIZE=0x02000000
179CONFIG_VSYSCALL=y 195CONFIG_VSYSCALL=y
196CONFIG_PAGE_SIZE_4KB=y
197# CONFIG_PAGE_SIZE_8KB is not set
198# CONFIG_PAGE_SIZE_64KB is not set
180CONFIG_SELECT_MEMORY_MODEL=y 199CONFIG_SELECT_MEMORY_MODEL=y
181CONFIG_FLATMEM_MANUAL=y 200CONFIG_FLATMEM_MANUAL=y
182# CONFIG_DISCONTIGMEM_MANUAL is not set 201# CONFIG_DISCONTIGMEM_MANUAL is not set
@@ -202,17 +221,22 @@ CONFIG_CF_BASE_ADDR=0xb8000000
202# Processor features 221# Processor features
203# 222#
204CONFIG_CPU_LITTLE_ENDIAN=y 223CONFIG_CPU_LITTLE_ENDIAN=y
224# CONFIG_CPU_BIG_ENDIAN is not set
205CONFIG_SH_FPU=y 225CONFIG_SH_FPU=y
206# CONFIG_SH_DSP is not set 226# CONFIG_SH_DSP is not set
207# CONFIG_SH_STORE_QUEUES is not set 227# CONFIG_SH_STORE_QUEUES is not set
208CONFIG_CPU_HAS_INTEVT=y 228CONFIG_CPU_HAS_INTEVT=y
229CONFIG_CPU_HAS_IPR_IRQ=y
209CONFIG_CPU_HAS_SR_RB=y 230CONFIG_CPU_HAS_SR_RB=y
231CONFIG_CPU_HAS_PTEA=y
210 232
211# 233#
212# Timer support 234# Timer support
213# 235#
214CONFIG_SH_TMU=y 236CONFIG_SH_TMU=y
215CONFIG_SH_PCLK_FREQ=50000000 237CONFIG_SH_TIMER_IRQ=16
238# CONFIG_NO_IDLE_HZ is not set
239CONFIG_SH_PCLK_FREQ=33333333
216 240
217# 241#
218# CPU Frequency scaling 242# CPU Frequency scaling
@@ -231,10 +255,16 @@ CONFIG_SH_PCLK_FREQ=50000000
231CONFIG_HEARTBEAT=y 255CONFIG_HEARTBEAT=y
232 256
233# 257#
258# Additional SuperH Device Drivers
259#
260# CONFIG_PUSH_SWITCH is not set
261
262#
234# Kernel features 263# Kernel features
235# 264#
236# CONFIG_HZ_100 is not set 265# CONFIG_HZ_100 is not set
237CONFIG_HZ_250=y 266CONFIG_HZ_250=y
267# CONFIG_HZ_300 is not set
238# CONFIG_HZ_1000 is not set 268# CONFIG_HZ_1000 is not set
239CONFIG_HZ=250 269CONFIG_HZ=250
240# CONFIG_KEXEC is not set 270# CONFIG_KEXEC is not set
@@ -249,8 +279,7 @@ CONFIG_PREEMPT_NONE=y
249CONFIG_ZERO_PAGE_OFFSET=0x00001000 279CONFIG_ZERO_PAGE_OFFSET=0x00001000
250CONFIG_BOOT_LINK_OFFSET=0x00800000 280CONFIG_BOOT_LINK_OFFSET=0x00800000
251# CONFIG_UBC_WAKEUP is not set 281# CONFIG_UBC_WAKEUP is not set
252CONFIG_CMDLINE_BOOL=y 282# CONFIG_CMDLINE_BOOL is not set
253CONFIG_CMDLINE="console=ttySC1,38400 root=/dev/nfs ip=bootp"
254 283
255# 284#
256# Bus options 285# Bus options
@@ -313,11 +342,13 @@ CONFIG_IP_PNP_BOOTP=y
313# CONFIG_INET_TUNNEL is not set 342# CONFIG_INET_TUNNEL is not set
314CONFIG_INET_XFRM_MODE_TRANSPORT=y 343CONFIG_INET_XFRM_MODE_TRANSPORT=y
315CONFIG_INET_XFRM_MODE_TUNNEL=y 344CONFIG_INET_XFRM_MODE_TUNNEL=y
345CONFIG_INET_XFRM_MODE_BEET=y
316CONFIG_INET_DIAG=y 346CONFIG_INET_DIAG=y
317CONFIG_INET_TCP_DIAG=y 347CONFIG_INET_TCP_DIAG=y
318# CONFIG_TCP_CONG_ADVANCED is not set 348# CONFIG_TCP_CONG_ADVANCED is not set
319CONFIG_TCP_CONG_CUBIC=y 349CONFIG_TCP_CONG_CUBIC=y
320CONFIG_DEFAULT_TCP_CONG="cubic" 350CONFIG_DEFAULT_TCP_CONG="cubic"
351# CONFIG_TCP_MD5SIG is not set
321# CONFIG_IPV6 is not set 352# CONFIG_IPV6 is not set
322# CONFIG_INET6_XFRM_TUNNEL is not set 353# CONFIG_INET6_XFRM_TUNNEL is not set
323# CONFIG_INET6_TUNNEL is not set 354# CONFIG_INET6_TUNNEL is not set
@@ -480,16 +511,79 @@ CONFIG_MTD_ROM=y
480# CONFIG_ATA_OVER_ETH is not set 511# CONFIG_ATA_OVER_ETH is not set
481 512
482# 513#
514# Misc devices
515#
516# CONFIG_TIFM_CORE is not set
517
518#
483# ATA/ATAPI/MFM/RLL support 519# ATA/ATAPI/MFM/RLL support
484# 520#
485# CONFIG_IDE is not set 521CONFIG_IDE=y
522CONFIG_IDE_MAX_HWIFS=4
523CONFIG_BLK_DEV_IDE=y
524
525#
526# Please see Documentation/ide.txt for help/info on IDE drives
527#
528# CONFIG_BLK_DEV_IDE_SATA is not set
529CONFIG_BLK_DEV_IDEDISK=y
530# CONFIG_IDEDISK_MULTI_MODE is not set
531# CONFIG_BLK_DEV_IDECD is not set
532# CONFIG_BLK_DEV_IDETAPE is not set
533# CONFIG_BLK_DEV_IDEFLOPPY is not set
534# CONFIG_BLK_DEV_IDESCSI is not set
535# CONFIG_IDE_TASK_IOCTL is not set
536
537#
538# IDE chipset support/bugfixes
539#
540# CONFIG_IDE_GENERIC is not set
541# CONFIG_IDE_ARM is not set
542# CONFIG_BLK_DEV_IDEDMA is not set
543# CONFIG_IDEDMA_AUTO is not set
544# CONFIG_BLK_DEV_HD is not set
486 545
487# 546#
488# SCSI device support 547# SCSI device support
489# 548#
490# CONFIG_RAID_ATTRS is not set 549# CONFIG_RAID_ATTRS is not set
491# CONFIG_SCSI is not set 550CONFIG_SCSI=y
551# CONFIG_SCSI_TGT is not set
492# CONFIG_SCSI_NETLINK is not set 552# CONFIG_SCSI_NETLINK is not set
553CONFIG_SCSI_PROC_FS=y
554
555#
556# SCSI support type (disk, tape, CD-ROM)
557#
558# CONFIG_BLK_DEV_SD is not set
559# CONFIG_CHR_DEV_ST is not set
560# CONFIG_CHR_DEV_OSST is not set
561# CONFIG_BLK_DEV_SR is not set
562# CONFIG_CHR_DEV_SG is not set
563# CONFIG_CHR_DEV_SCH is not set
564
565#
566# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
567#
568# CONFIG_SCSI_MULTI_LUN is not set
569# CONFIG_SCSI_CONSTANTS is not set
570# CONFIG_SCSI_LOGGING is not set
571# CONFIG_SCSI_SCAN_ASYNC is not set
572
573#
574# SCSI Transports
575#
576# CONFIG_SCSI_SPI_ATTRS is not set
577# CONFIG_SCSI_FC_ATTRS is not set
578# CONFIG_SCSI_ISCSI_ATTRS is not set
579# CONFIG_SCSI_SAS_ATTRS is not set
580# CONFIG_SCSI_SAS_LIBSAS is not set
581
582#
583# SCSI low-level drivers
584#
585# CONFIG_ISCSI_TCP is not set
586# CONFIG_SCSI_DEBUG is not set
493 587
494# 588#
495# Serial ATA (prod) and Parallel ATA (experimental) drivers 589# Serial ATA (prod) and Parallel ATA (experimental) drivers
@@ -633,17 +727,12 @@ CONFIG_HW_RANDOM=y
633# CONFIG_GEN_RTC is not set 727# CONFIG_GEN_RTC is not set
634# CONFIG_DTLK is not set 728# CONFIG_DTLK is not set
635# CONFIG_R3964 is not set 729# CONFIG_R3964 is not set
636
637#
638# Ftape, the floppy tape device driver
639#
640# CONFIG_RAW_DRIVER is not set 730# CONFIG_RAW_DRIVER is not set
641 731
642# 732#
643# TPM devices 733# TPM devices
644# 734#
645# CONFIG_TCG_TPM is not set 735# CONFIG_TCG_TPM is not set
646# CONFIG_TELCLOCK is not set
647 736
648# 737#
649# I2C support 738# I2C support
@@ -659,6 +748,7 @@ CONFIG_HW_RANDOM=y
659# 748#
660# Dallas's 1-wire bus 749# Dallas's 1-wire bus
661# 750#
751# CONFIG_W1 is not set
662 752
663# 753#
664# Hardware Monitoring support 754# Hardware Monitoring support
@@ -667,18 +757,14 @@ CONFIG_HWMON=y
667# CONFIG_HWMON_VID is not set 757# CONFIG_HWMON_VID is not set
668# CONFIG_SENSORS_ABITUGURU is not set 758# CONFIG_SENSORS_ABITUGURU is not set
669# CONFIG_SENSORS_F71805F is not set 759# CONFIG_SENSORS_F71805F is not set
760# CONFIG_SENSORS_PC87427 is not set
670# CONFIG_SENSORS_VT1211 is not set 761# CONFIG_SENSORS_VT1211 is not set
671# CONFIG_HWMON_DEBUG_CHIP is not set 762# CONFIG_HWMON_DEBUG_CHIP is not set
672 763
673# 764#
674# Misc devices
675#
676
677#
678# Multimedia devices 765# Multimedia devices
679# 766#
680# CONFIG_VIDEO_DEV is not set 767# CONFIG_VIDEO_DEV is not set
681CONFIG_VIDEO_V4L2=y
682 768
683# 769#
684# Digital Video Broadcasting Devices 770# Digital Video Broadcasting Devices
@@ -758,14 +844,20 @@ CONFIG_FIRMWARE_EDID=y
758# 844#
759 845
760# 846#
847# Virtualization
848#
849
850#
761# File systems 851# File systems
762# 852#
763# CONFIG_EXT2_FS is not set 853# CONFIG_EXT2_FS is not set
764# CONFIG_EXT3_FS is not set 854# CONFIG_EXT3_FS is not set
855# CONFIG_EXT4DEV_FS is not set
765# CONFIG_REISERFS_FS is not set 856# CONFIG_REISERFS_FS is not set
766# CONFIG_JFS_FS is not set 857# CONFIG_JFS_FS is not set
767# CONFIG_FS_POSIX_ACL is not set 858# CONFIG_FS_POSIX_ACL is not set
768# CONFIG_XFS_FS is not set 859# CONFIG_XFS_FS is not set
860# CONFIG_GFS2_FS is not set
769# CONFIG_OCFS2_FS is not set 861# CONFIG_OCFS2_FS is not set
770# CONFIG_MINIX_FS is not set 862# CONFIG_MINIX_FS is not set
771# CONFIG_ROMFS_FS is not set 863# CONFIG_ROMFS_FS is not set
@@ -814,7 +906,6 @@ CONFIG_RAMFS=y
814# CONFIG_BEFS_FS is not set 906# CONFIG_BEFS_FS is not set
815# CONFIG_BFS_FS is not set 907# CONFIG_BFS_FS is not set
816# CONFIG_EFS_FS is not set 908# CONFIG_EFS_FS is not set
817# CONFIG_JFFS_FS is not set
818CONFIG_JFFS2_FS=y 909CONFIG_JFFS2_FS=y
819CONFIG_JFFS2_FS_DEBUG=0 910CONFIG_JFFS2_FS_DEBUG=0
820CONFIG_JFFS2_FS_WRITEBUFFER=y 911CONFIG_JFFS2_FS_WRITEBUFFER=y
@@ -875,6 +966,11 @@ CONFIG_PARTITION_ADVANCED=y
875# CONFIG_NLS is not set 966# CONFIG_NLS is not set
876 967
877# 968#
969# Distributed Lock Manager
970#
971# CONFIG_DLM is not set
972
973#
878# Profiling support 974# Profiling support
879# 975#
880# CONFIG_PROFILING is not set 976# CONFIG_PROFILING is not set
@@ -882,14 +978,16 @@ CONFIG_PARTITION_ADVANCED=y
882# 978#
883# Kernel hacking 979# Kernel hacking
884# 980#
981CONFIG_TRACE_IRQFLAGS_SUPPORT=y
885# CONFIG_PRINTK_TIME is not set 982# CONFIG_PRINTK_TIME is not set
886CONFIG_ENABLE_MUST_CHECK=y 983# CONFIG_ENABLE_MUST_CHECK is not set
887# CONFIG_MAGIC_SYSRQ is not set 984# CONFIG_MAGIC_SYSRQ is not set
888# CONFIG_UNUSED_SYMBOLS is not set 985# CONFIG_UNUSED_SYMBOLS is not set
986# CONFIG_DEBUG_FS is not set
987# CONFIG_HEADERS_CHECK is not set
889# CONFIG_DEBUG_KERNEL is not set 988# CONFIG_DEBUG_KERNEL is not set
890CONFIG_LOG_BUF_SHIFT=14 989CONFIG_LOG_BUF_SHIFT=14
891# CONFIG_DEBUG_BUGVERBOSE is not set 990# CONFIG_DEBUG_BUGVERBOSE is not set
892# CONFIG_DEBUG_FS is not set
893# CONFIG_SH_STANDARD_BIOS is not set 991# CONFIG_SH_STANDARD_BIOS is not set
894# CONFIG_EARLY_SCIF_CONSOLE is not set 992# CONFIG_EARLY_SCIF_CONSOLE is not set
895# CONFIG_KGDB is not set 993# CONFIG_KGDB is not set
@@ -908,6 +1006,7 @@ CONFIG_LOG_BUF_SHIFT=14
908# 1006#
909# Library routines 1007# Library routines
910# 1008#
1009CONFIG_BITREVERSE=y
911# CONFIG_CRC_CCITT is not set 1010# CONFIG_CRC_CCITT is not set
912# CONFIG_CRC16 is not set 1011# CONFIG_CRC16 is not set
913CONFIG_CRC32=y 1012CONFIG_CRC32=y
@@ -915,3 +1014,4 @@ CONFIG_CRC32=y
915CONFIG_ZLIB_INFLATE=y 1014CONFIG_ZLIB_INFLATE=y
916CONFIG_ZLIB_DEFLATE=y 1015CONFIG_ZLIB_DEFLATE=y
917CONFIG_PLIST=y 1016CONFIG_PLIST=y
1017CONFIG_IOMAP_COPY=y
diff --git a/arch/sh/drivers/Makefile b/arch/sh/drivers/Makefile
index bf18dbfb6787..6cb92676c5fc 100644
--- a/arch/sh/drivers/Makefile
+++ b/arch/sh/drivers/Makefile
@@ -6,3 +6,4 @@ obj-$(CONFIG_PCI) += pci/
6obj-$(CONFIG_SH_DMA) += dma/ 6obj-$(CONFIG_SH_DMA) += dma/
7obj-$(CONFIG_SUPERHYWAY) += superhyway/ 7obj-$(CONFIG_SUPERHYWAY) += superhyway/
8obj-$(CONFIG_PUSH_SWITCH) += push-switch.o 8obj-$(CONFIG_PUSH_SWITCH) += push-switch.o
9obj-$(CONFIG_HEARTBEAT) += heartbeat.o
diff --git a/arch/sh/drivers/dma/dma-sh.c b/arch/sh/drivers/dma/dma-sh.c
index f63721ed86c2..06ed0609a95d 100644
--- a/arch/sh/drivers/dma/dma-sh.c
+++ b/arch/sh/drivers/dma/dma-sh.c
@@ -19,34 +19,26 @@
19#include <asm/io.h> 19#include <asm/io.h>
20#include "dma-sh.h" 20#include "dma-sh.h"
21 21
22 22static int dmte_irq_map[] = {
23 23 DMTE0_IRQ,
24#ifdef CONFIG_CPU_SH4 24 DMTE1_IRQ,
25static struct ipr_data dmae_ipr_map[] = { 25 DMTE2_IRQ,
26 { DMAE_IRQ, DMA_IPR_ADDR, DMA_IPR_POS, DMA_PRIORITY }, 26 DMTE3_IRQ,
27}; 27#if defined(CONFIG_CPU_SUBTYPE_SH7751R) || \
28 defined(CONFIG_CPU_SUBTYPE_SH7760) || \
29 defined(CONFIG_CPU_SUBTYPE_SH7780)
30 DMTE4_IRQ,
31 DMTE5_IRQ,
32 DMTE6_IRQ,
33 DMTE7_IRQ,
28#endif 34#endif
29static struct ipr_data dmte_ipr_map[] = {
30 /*
31 * Normally we could just do DMTE0_IRQ + chan outright, though in the
32 * case of the 7751R, the DMTE IRQs for channels > 4 start right above
33 * the SCIF
34 */
35 { DMTE0_IRQ + 0, DMA_IPR_ADDR, DMA_IPR_POS, DMA_PRIORITY },
36 { DMTE0_IRQ + 1, DMA_IPR_ADDR, DMA_IPR_POS, DMA_PRIORITY },
37 { DMTE0_IRQ + 2, DMA_IPR_ADDR, DMA_IPR_POS, DMA_PRIORITY },
38 { DMTE0_IRQ + 3, DMA_IPR_ADDR, DMA_IPR_POS, DMA_PRIORITY },
39 { DMTE4_IRQ + 0, DMA_IPR_ADDR, DMA_IPR_POS, DMA_PRIORITY },
40 { DMTE4_IRQ + 1, DMA_IPR_ADDR, DMA_IPR_POS, DMA_PRIORITY },
41 { DMTE4_IRQ + 2, DMA_IPR_ADDR, DMA_IPR_POS, DMA_PRIORITY },
42 { DMTE4_IRQ + 3, DMA_IPR_ADDR, DMA_IPR_POS, DMA_PRIORITY },
43}; 35};
44 36
45static inline unsigned int get_dmte_irq(unsigned int chan) 37static inline unsigned int get_dmte_irq(unsigned int chan)
46{ 38{
47 unsigned int irq = 0; 39 unsigned int irq = 0;
48 if (chan < ARRAY_SIZE(dmte_ipr_map)) 40 if (chan < ARRAY_SIZE(dmte_irq_map))
49 irq = dmte_ipr_map[chan].irq; 41 irq = dmte_irq_map[chan];
50 return irq; 42 return irq;
51} 43}
52 44
@@ -103,7 +95,7 @@ static void sh_dmac_free_dma(struct dma_channel *chan)
103 free_irq(get_dmte_irq(chan->chan), chan); 95 free_irq(get_dmte_irq(chan->chan), chan);
104} 96}
105 97
106static void 98static int
107sh_dmac_configure_channel(struct dma_channel *chan, unsigned long chcr) 99sh_dmac_configure_channel(struct dma_channel *chan, unsigned long chcr)
108{ 100{
109 if (!chcr) 101 if (!chcr)
@@ -119,6 +111,7 @@ sh_dmac_configure_channel(struct dma_channel *chan, unsigned long chcr)
119 ctrl_outl(chcr, CHCR[chan->chan]); 111 ctrl_outl(chcr, CHCR[chan->chan]);
120 112
121 chan->flags |= DMA_CONFIGURED; 113 chan->flags |= DMA_CONFIGURED;
114 return 0;
122} 115}
123 116
124static void sh_dmac_enable_dma(struct dma_channel *chan) 117static void sh_dmac_enable_dma(struct dma_channel *chan)
@@ -262,17 +255,11 @@ static int __init sh_dmac_init(void)
262 int i; 255 int i;
263 256
264#ifdef CONFIG_CPU_SH4 257#ifdef CONFIG_CPU_SH4
265 make_ipr_irq(dmae_ipr_map, ARRAY_SIZE(dmae_ipr_map));
266 i = request_irq(DMAE_IRQ, dma_err, IRQF_DISABLED, "DMAC Address Error", 0); 258 i = request_irq(DMAE_IRQ, dma_err, IRQF_DISABLED, "DMAC Address Error", 0);
267 if (unlikely(i < 0)) 259 if (unlikely(i < 0))
268 return i; 260 return i;
269#endif 261#endif
270 262
271 i = info->nr_channels;
272 if (i > ARRAY_SIZE(dmte_ipr_map))
273 i = ARRAY_SIZE(dmte_ipr_map);
274 make_ipr_irq(dmte_ipr_map, i);
275
276 /* 263 /*
277 * Initialize DMAOR, and clean up any error flags that may have 264 * Initialize DMAOR, and clean up any error flags that may have
278 * been set. 265 * been set.
diff --git a/arch/sh/drivers/heartbeat.c b/arch/sh/drivers/heartbeat.c
new file mode 100644
index 000000000000..bc59cb6cd78b
--- /dev/null
+++ b/arch/sh/drivers/heartbeat.c
@@ -0,0 +1,132 @@
1/*
2 * Generic heartbeat driver for regular LED banks
3 *
4 * Copyright (C) 2007 Paul Mundt
5 *
6 * Most SH reference boards include a number of individual LEDs that can
7 * be independently controlled (either via a pre-defined hardware
8 * function or via the LED class, if desired -- the hardware tends to
9 * encapsulate some of the same "triggers" that the LED class supports,
10 * so there's not too much value in it).
11 *
12 * Additionally, most of these boards also have a LED bank that we've
13 * traditionally used for strobing the load average. This use case is
14 * handled by this driver, rather than giving each LED bit position its
15 * own struct device.
16 *
17 * This file is subject to the terms and conditions of the GNU General Public
18 * License. See the file "COPYING" in the main directory of this archive
19 * for more details.
20 */
21#include <linux/init.h>
22#include <linux/module.h>
23#include <linux/platform_device.h>
24#include <linux/sched.h>
25#include <linux/timer.h>
26#include <linux/io.h>
27
28#define DRV_NAME "heartbeat"
29#define DRV_VERSION "0.1.0"
30
31struct heartbeat_data {
32 void __iomem *base;
33 unsigned char bit_pos[8];
34 struct timer_list timer;
35};
36
37static void heartbeat_timer(unsigned long data)
38{
39 struct heartbeat_data *hd = (struct heartbeat_data *)data;
40 static unsigned bit = 0, up = 1;
41
42 ctrl_outw(1 << hd->bit_pos[bit], (unsigned long)hd->base);
43 if (up)
44 if (bit == (ARRAY_SIZE(hd->bit_pos) - 1)) {
45 bit--;
46 up = 0;
47 } else
48 bit++;
49 else if (bit == 0)
50 up = 1;
51 else
52 bit--;
53
54 mod_timer(&hd->timer, jiffies + (110 - ((300 << FSHIFT) /
55 ((avenrun[0] / 5) + (3 << FSHIFT)))));
56}
57
58static int heartbeat_drv_probe(struct platform_device *pdev)
59{
60 struct resource *res;
61 struct heartbeat_data *hd;
62
63 if (unlikely(pdev->num_resources != 1)) {
64 dev_err(&pdev->dev, "invalid number of resources\n");
65 return -EINVAL;
66 }
67
68 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
69 if (unlikely(res == NULL)) {
70 dev_err(&pdev->dev, "invalid resource\n");
71 return -EINVAL;
72 }
73
74 hd = kmalloc(sizeof(struct heartbeat_data), GFP_KERNEL);
75 if (unlikely(!hd))
76 return -ENOMEM;
77
78 if (pdev->dev.platform_data) {
79 memcpy(hd->bit_pos, pdev->dev.platform_data,
80 ARRAY_SIZE(hd->bit_pos));
81 } else {
82 int i;
83
84 for (i = 0; i < ARRAY_SIZE(hd->bit_pos); i++)
85 hd->bit_pos[i] = i;
86 }
87
88 hd->base = (void __iomem *)res->start;
89
90 setup_timer(&hd->timer, heartbeat_timer, (unsigned long)hd);
91 platform_set_drvdata(pdev, hd);
92
93 return mod_timer(&hd->timer, jiffies + 1);
94}
95
96static int heartbeat_drv_remove(struct platform_device *pdev)
97{
98 struct heartbeat_data *hd = platform_get_drvdata(pdev);
99
100 del_timer_sync(&hd->timer);
101
102 platform_set_drvdata(pdev, NULL);
103
104 kfree(hd);
105
106 return 0;
107}
108
109static struct platform_driver heartbeat_driver = {
110 .probe = heartbeat_drv_probe,
111 .remove = heartbeat_drv_remove,
112 .driver = {
113 .name = DRV_NAME,
114 },
115};
116
117static int __init heartbeat_init(void)
118{
119 printk(KERN_NOTICE DRV_NAME ": version %s loaded\n", DRV_VERSION);
120 return platform_driver_register(&heartbeat_driver);
121}
122
123static void __exit heartbeat_exit(void)
124{
125 platform_driver_unregister(&heartbeat_driver);
126}
127module_init(heartbeat_init);
128module_exit(heartbeat_exit);
129
130MODULE_VERSION(DRV_VERSION);
131MODULE_AUTHOR("Paul Mundt");
132MODULE_LICENSE("GPLv2");
diff --git a/arch/sh/drivers/pci/Makefile b/arch/sh/drivers/pci/Makefile
index 9e00cb8a39e9..cc8d0d0b1427 100644
--- a/arch/sh/drivers/pci/Makefile
+++ b/arch/sh/drivers/pci/Makefile
@@ -12,7 +12,6 @@ obj-$(CONFIG_CPU_SUBTYPE_SH7780) += pci-sh7780.o ops-sh4.o
12obj-$(CONFIG_SH_DREAMCAST) += ops-dreamcast.o fixups-dreamcast.o \ 12obj-$(CONFIG_SH_DREAMCAST) += ops-dreamcast.o fixups-dreamcast.o \
13 dma-dreamcast.o 13 dma-dreamcast.o
14obj-$(CONFIG_SH_SECUREEDGE5410) += ops-snapgear.o 14obj-$(CONFIG_SH_SECUREEDGE5410) += ops-snapgear.o
15obj-$(CONFIG_SH_BIGSUR) += ops-bigsur.o
16obj-$(CONFIG_SH_RTS7751R2D) += ops-rts7751r2d.o fixups-rts7751r2d.o 15obj-$(CONFIG_SH_RTS7751R2D) += ops-rts7751r2d.o fixups-rts7751r2d.o
17obj-$(CONFIG_SH_SH03) += ops-sh03.o fixups-sh03.o 16obj-$(CONFIG_SH_SH03) += ops-sh03.o fixups-sh03.o
18obj-$(CONFIG_SH_R7780RP) += ops-r7780rp.o fixups-r7780rp.o 17obj-$(CONFIG_SH_R7780RP) += ops-r7780rp.o fixups-r7780rp.o
diff --git a/arch/sh/drivers/pci/ops-bigsur.c b/arch/sh/drivers/pci/ops-bigsur.c
deleted file mode 100644
index eb31be751524..000000000000
--- a/arch/sh/drivers/pci/ops-bigsur.c
+++ /dev/null
@@ -1,83 +0,0 @@
1/*
2 * linux/arch/sh/drivers/pci/ops-bigsur.c
3 *
4 * By Dustin McIntire (dustin@sensoria.com) (c)2001
5 *
6 * Ported to new API by Paul Mundt <lethal@linux-sh.org>.
7 *
8 * May be copied or modified under the terms of the GNU General Public
9 * License. See linux/COPYING for more information.
10 *
11 * PCI initialization for the Hitachi Big Sur Evaluation Board
12 */
13#include <linux/kernel.h>
14#include <linux/types.h>
15#include <linux/init.h>
16#include <linux/pci.h>
17#include <asm/io.h>
18#include "pci-sh4.h"
19#include <asm/bigsur/bigsur.h>
20
21#define BIGSUR_PCI_IO 0x4000
22#define BIGSUR_PCI_MEM 0xfd000000
23
24static struct resource sh7751_io_resource = {
25 .name = "SH7751 IO",
26 .start = BIGSUR_PCI_IO,
27 .end = BIGSUR_PCI_IO + (64*1024) - 1,
28 .flags = IORESOURCE_IO,
29};
30
31static struct resource sh7751_mem_resource = {
32 .name = "SH7751 mem",
33 .start = BIGSUR_PCI_MEM,
34 .end = BIGSUR_PCI_MEM + (64*1024*1024) - 1,
35 .flags = IORESOURCE_MEM,
36};
37
38extern struct pci_ops sh7751_pci_ops;
39
40struct pci_channel board_pci_channels[] = {
41 { &sh4_pci_ops, &sh7751_io_resource, &sh7751_mem_resource, 0, 0xff },
42 { 0, }
43};
44
45static struct sh4_pci_address_map sh7751_pci_map = {
46 .window0 = {
47 .base = SH7751_CS3_BASE_ADDR,
48 .size = BIGSUR_LSR0_SIZE,
49 },
50
51 .window1 = {
52 .base = SH7751_CS3_BASE_ADDR,
53 .size = BIGSUR_LSR1_SIZE,
54 },
55};
56
57/*
58 * Initialize the Big Sur PCI interface
59 * Setup hardware to be Central Funtion
60 * Copy the BSR regs to the PCI interface
61 * Setup PCI windows into local RAM
62 */
63int __init pcibios_init_platform(void)
64{
65 return sh7751_pcic_init(&sh7751_pci_map);
66}
67
68int __init pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin)
69{
70 /*
71 * The Big Sur can be used in a CPCI chassis, but the SH7751 PCI
72 * interface is on the wrong end of the board so that it can also
73 * support a V320 CPI interface chip... Therefor the IRQ mapping is
74 * somewhat use dependent... I'l assume a linear map for now, i.e.
75 * INTA=slot0,pin0... INTD=slot3,pin0...
76 */
77 int irq = (slot + pin-1) % 4 + BIGSUR_SH7751_PCI_IRQ_BASE;
78
79 PCIDBG(2, "PCI: Mapping Big Sur IRQ for slot %d, pin %c to irq %d\n",
80 slot, pin-1+'A', irq);
81
82 return irq;
83}
diff --git a/arch/sh/drivers/pci/pci-sh7751.c b/arch/sh/drivers/pci/pci-sh7751.c
index 85e1ee2e2e7b..9ddff760d3c6 100644
--- a/arch/sh/drivers/pci/pci-sh7751.c
+++ b/arch/sh/drivers/pci/pci-sh7751.c
@@ -157,15 +157,6 @@ int __init sh7751_pcic_init(struct sh4_pci_address_map *map)
157 PCIBIOS_MIN_IO, (64 << 10), 157 PCIBIOS_MIN_IO, (64 << 10),
158 SH7751_PCI_IO_BASE + PCIBIOS_MIN_IO); 158 SH7751_PCI_IO_BASE + PCIBIOS_MIN_IO);
159 159
160 /*
161 * XXX: For now, leave this board-specific. In the event we have other
162 * boards that need to do similar work, this can be wrapped.
163 */
164#ifdef CONFIG_SH_BIGSUR
165 bigsur_port_map(PCIBIOS_MIN_IO, (64 << 10),
166 SH7751_PCI_IO_BASE + PCIBIOS_MIN_IO, 0);
167#endif
168
169 /* Make sure the MSB's of IO window are set to access PCI space 160 /* Make sure the MSB's of IO window are set to access PCI space
170 * correctly */ 161 * correctly */
171 word = PCIBIOS_MIN_IO & SH4_PCIIOBR_MASK; 162 word = PCIBIOS_MIN_IO & SH4_PCIIOBR_MASK;
diff --git a/arch/sh/kernel/Makefile b/arch/sh/kernel/Makefile
index 2f6d2bcb1c93..ff30d7f58043 100644
--- a/arch/sh/kernel/Makefile
+++ b/arch/sh/kernel/Makefile
@@ -6,7 +6,8 @@ extra-y := head.o init_task.o vmlinux.lds
6 6
7obj-y := process.o signal.o traps.o irq.o \ 7obj-y := process.o signal.o traps.o irq.o \
8 ptrace.o setup.o time.o sys_sh.o semaphore.o \ 8 ptrace.o setup.o time.o sys_sh.o semaphore.o \
9 io.o io_generic.o sh_ksyms.o syscalls.o 9 io.o io_generic.o sh_ksyms.o syscalls.o \
10 debugtraps.o
10 11
11obj-y += cpu/ timers/ 12obj-y += cpu/ timers/
12obj-$(CONFIG_VSYSCALL) += vsyscall/ 13obj-$(CONFIG_VSYSCALL) += vsyscall/
diff --git a/arch/sh/kernel/cpu/init.c b/arch/sh/kernel/cpu/init.c
index 48121766e8d2..4b339a640b13 100644
--- a/arch/sh/kernel/cpu/init.c
+++ b/arch/sh/kernel/cpu/init.c
@@ -3,7 +3,7 @@
3 * 3 *
4 * CPU init code 4 * CPU init code
5 * 5 *
6 * Copyright (C) 2002, 2003 Paul Mundt 6 * Copyright (C) 2002 - 2006 Paul Mundt
7 * Copyright (C) 2003 Richard Curnow 7 * Copyright (C) 2003 Richard Curnow
8 * 8 *
9 * This file is subject to the terms and conditions of the GNU General Public 9 * This file is subject to the terms and conditions of the GNU General Public
@@ -12,6 +12,8 @@
12 */ 12 */
13#include <linux/init.h> 13#include <linux/init.h>
14#include <linux/kernel.h> 14#include <linux/kernel.h>
15#include <linux/mm.h>
16#include <asm/mmu_context.h>
15#include <asm/processor.h> 17#include <asm/processor.h>
16#include <asm/uaccess.h> 18#include <asm/uaccess.h>
17#include <asm/page.h> 19#include <asm/page.h>
@@ -46,7 +48,7 @@ static void __init cache_init(void)
46{ 48{
47 unsigned long ccr, flags; 49 unsigned long ccr, flags;
48 50
49 if (cpu_data->type == CPU_SH_NONE) 51 if (current_cpu_data.type == CPU_SH_NONE)
50 panic("Unknown CPU"); 52 panic("Unknown CPU");
51 53
52 jump_to_P2(); 54 jump_to_P2();
@@ -66,7 +68,7 @@ static void __init cache_init(void)
66 if (ccr & CCR_CACHE_ENABLE) { 68 if (ccr & CCR_CACHE_ENABLE) {
67 unsigned long ways, waysize, addrstart; 69 unsigned long ways, waysize, addrstart;
68 70
69 waysize = cpu_data->dcache.sets; 71 waysize = current_cpu_data.dcache.sets;
70 72
71#ifdef CCR_CACHE_ORA 73#ifdef CCR_CACHE_ORA
72 /* 74 /*
@@ -77,7 +79,7 @@ static void __init cache_init(void)
77 waysize >>= 1; 79 waysize >>= 1;
78#endif 80#endif
79 81
80 waysize <<= cpu_data->dcache.entry_shift; 82 waysize <<= current_cpu_data.dcache.entry_shift;
81 83
82#ifdef CCR_CACHE_EMODE 84#ifdef CCR_CACHE_EMODE
83 /* If EMODE is not set, we only have 1 way to flush. */ 85 /* If EMODE is not set, we only have 1 way to flush. */
@@ -85,7 +87,7 @@ static void __init cache_init(void)
85 ways = 1; 87 ways = 1;
86 else 88 else
87#endif 89#endif
88 ways = cpu_data->dcache.ways; 90 ways = current_cpu_data.dcache.ways;
89 91
90 addrstart = CACHE_OC_ADDRESS_ARRAY; 92 addrstart = CACHE_OC_ADDRESS_ARRAY;
91 do { 93 do {
@@ -93,10 +95,10 @@ static void __init cache_init(void)
93 95
94 for (addr = addrstart; 96 for (addr = addrstart;
95 addr < addrstart + waysize; 97 addr < addrstart + waysize;
96 addr += cpu_data->dcache.linesz) 98 addr += current_cpu_data.dcache.linesz)
97 ctrl_outl(0, addr); 99 ctrl_outl(0, addr);
98 100
99 addrstart += cpu_data->dcache.way_incr; 101 addrstart += current_cpu_data.dcache.way_incr;
100 } while (--ways); 102 } while (--ways);
101 } 103 }
102 104
@@ -108,7 +110,7 @@ static void __init cache_init(void)
108 110
109#ifdef CCR_CACHE_EMODE 111#ifdef CCR_CACHE_EMODE
110 /* Force EMODE if possible */ 112 /* Force EMODE if possible */
111 if (cpu_data->dcache.ways > 1) 113 if (current_cpu_data.dcache.ways > 1)
112 flags |= CCR_CACHE_EMODE; 114 flags |= CCR_CACHE_EMODE;
113 else 115 else
114 flags &= ~CCR_CACHE_EMODE; 116 flags &= ~CCR_CACHE_EMODE;
@@ -125,10 +127,10 @@ static void __init cache_init(void)
125#ifdef CONFIG_SH_OCRAM 127#ifdef CONFIG_SH_OCRAM
126 /* Turn on OCRAM -- halve the OC */ 128 /* Turn on OCRAM -- halve the OC */
127 flags |= CCR_CACHE_ORA; 129 flags |= CCR_CACHE_ORA;
128 cpu_data->dcache.sets >>= 1; 130 current_cpu_data.dcache.sets >>= 1;
129 131
130 cpu_data->dcache.way_size = cpu_data->dcache.sets * 132 current_cpu_data.dcache.way_size = current_cpu_data.dcache.sets *
131 cpu_data->dcache.linesz; 133 current_cpu_data.dcache.linesz;
132#endif 134#endif
133 135
134 ctrl_outl(flags, CCR); 136 ctrl_outl(flags, CCR);
@@ -170,7 +172,7 @@ static void __init dsp_init(void)
170 172
171 /* If the DSP bit is still set, this CPU has a DSP */ 173 /* If the DSP bit is still set, this CPU has a DSP */
172 if (sr & SR_DSP) 174 if (sr & SR_DSP)
173 cpu_data->flags |= CPU_HAS_DSP; 175 current_cpu_data.flags |= CPU_HAS_DSP;
174 176
175 /* Now that we've determined the DSP status, clear the DSP bit. */ 177 /* Now that we've determined the DSP status, clear the DSP bit. */
176 release_dsp(); 178 release_dsp();
@@ -202,22 +204,28 @@ asmlinkage void __init sh_cpu_init(void)
202 cache_init(); 204 cache_init();
203 205
204 shm_align_mask = max_t(unsigned long, 206 shm_align_mask = max_t(unsigned long,
205 cpu_data->dcache.way_size - 1, 207 current_cpu_data.dcache.way_size - 1,
206 PAGE_SIZE - 1); 208 PAGE_SIZE - 1);
207 209
208 /* Disable the FPU */ 210 /* Disable the FPU */
209 if (fpu_disabled) { 211 if (fpu_disabled) {
210 printk("FPU Disabled\n"); 212 printk("FPU Disabled\n");
211 cpu_data->flags &= ~CPU_HAS_FPU; 213 current_cpu_data.flags &= ~CPU_HAS_FPU;
212 disable_fpu(); 214 disable_fpu();
213 } 215 }
214 216
215 /* FPU initialization */ 217 /* FPU initialization */
216 if ((cpu_data->flags & CPU_HAS_FPU)) { 218 if ((current_cpu_data.flags & CPU_HAS_FPU)) {
217 clear_thread_flag(TIF_USEDFPU); 219 clear_thread_flag(TIF_USEDFPU);
218 clear_used_math(); 220 clear_used_math();
219 } 221 }
220 222
223 /*
224 * Initialize the per-CPU ASID cache very early, since the
225 * TLB flushing routines depend on this being setup.
226 */
227 current_cpu_data.asid_cache = NO_CONTEXT;
228
221#ifdef CONFIG_SH_DSP 229#ifdef CONFIG_SH_DSP
222 /* Probe for DSP */ 230 /* Probe for DSP */
223 dsp_init(); 231 dsp_init();
@@ -225,7 +233,7 @@ asmlinkage void __init sh_cpu_init(void)
225 /* Disable the DSP */ 233 /* Disable the DSP */
226 if (dsp_disabled) { 234 if (dsp_disabled) {
227 printk("DSP Disabled\n"); 235 printk("DSP Disabled\n");
228 cpu_data->flags &= ~CPU_HAS_DSP; 236 current_cpu_data.flags &= ~CPU_HAS_DSP;
229 release_dsp(); 237 release_dsp();
230 } 238 }
231#endif 239#endif
@@ -240,4 +248,3 @@ asmlinkage void __init sh_cpu_init(void)
240 ubc_wakeup(); 248 ubc_wakeup();
241#endif 249#endif
242} 250}
243
diff --git a/arch/sh/kernel/cpu/irq/ipr.c b/arch/sh/kernel/cpu/irq/ipr.c
index 35eb5751a3aa..210280b6fddf 100644
--- a/arch/sh/kernel/cpu/irq/ipr.c
+++ b/arch/sh/kernel/cpu/irq/ipr.c
@@ -43,16 +43,29 @@ static struct irq_chip ipr_irq_chip = {
43 .mask_ack = disable_ipr_irq, 43 .mask_ack = disable_ipr_irq,
44}; 44};
45 45
46unsigned int map_ipridx_to_addr(int idx) __attribute__ ((weak));
47unsigned int map_ipridx_to_addr(int idx)
48{
49 return 0;
50}
51
46void make_ipr_irq(struct ipr_data *table, unsigned int nr_irqs) 52void make_ipr_irq(struct ipr_data *table, unsigned int nr_irqs)
47{ 53{
48 int i; 54 int i;
49 55
50 for (i = 0; i < nr_irqs; i++) { 56 for (i = 0; i < nr_irqs; i++) {
51 unsigned int irq = table[i].irq; 57 unsigned int irq = table[i].irq;
52 table[i].addr = map_ipridx_to_addr(table[i].ipr_idx); 58
59 if (!irq)
60 irq = table[i].irq = i;
61
53 /* could the IPR index be mapped, if not we ignore this */ 62 /* could the IPR index be mapped, if not we ignore this */
54 if (table[i].addr == 0) 63 if (!table[i].addr) {
55 continue; 64 table[i].addr = map_ipridx_to_addr(table[i].ipr_idx);
65 if (!table[i].addr)
66 continue;
67 }
68
56 disable_irq_nosync(irq); 69 disable_irq_nosync(irq);
57 set_irq_chip_and_handler_name(irq, &ipr_irq_chip, 70 set_irq_chip_and_handler_name(irq, &ipr_irq_chip,
58 handle_level_irq, "level"); 71 handle_level_irq, "level");
diff --git a/arch/sh/kernel/cpu/sh2/entry.S b/arch/sh/kernel/cpu/sh2/entry.S
index d51fa5e9904a..7f7d292f36ec 100644
--- a/arch/sh/kernel/cpu/sh2/entry.S
+++ b/arch/sh/kernel/cpu/sh2/entry.S
@@ -178,12 +178,10 @@ interrupt_entry:
1788: .long do_exception_error 1788: .long do_exception_error
179 179
180trap_entry: 180trap_entry:
181 /* verbose BUG trapa entry check */ 181 mov #0x30,r8
182 mov #0x3e,r8 182 cmp/ge r8,r9 ! vector 0x20-0x2f is systemcall
183 cmp/ge r8,r9 183 bt 1f
184 bf/s 1f 184 add #-0x10,r9 ! convert SH2 to SH3/4 ABI
185 add #-0x10,r9
186 add #0x10,r9
1871: 1851:
188 shll2 r9 ! TRA 186 shll2 r9 ! TRA
189 mov #OFF_TRA,r8 187 mov #OFF_TRA,r8
@@ -206,7 +204,7 @@ trap_entry:
206 204
207#if defined(CONFIG_SH_STANDARD_BIOS) 205#if defined(CONFIG_SH_STANDARD_BIOS)
208 /* Unwind the stack and jmp to the debug entry */ 206 /* Unwind the stack and jmp to the debug entry */
209debug_kernel_fw: 207ENTRY(sh_bios_handler)
210 mov r15,r0 208 mov r15,r0
211 add #(22-4)*4-4,r0 209 add #(22-4)*4-4,r0
212 ldc.l @r0+,gbr 210 ldc.l @r0+,gbr
diff --git a/arch/sh/kernel/cpu/sh2/probe.c b/arch/sh/kernel/cpu/sh2/probe.c
index ba527d9b5024..108e81b682ed 100644
--- a/arch/sh/kernel/cpu/sh2/probe.c
+++ b/arch/sh/kernel/cpu/sh2/probe.c
@@ -18,27 +18,27 @@
18int __init detect_cpu_and_cache_system(void) 18int __init detect_cpu_and_cache_system(void)
19{ 19{
20#if defined(CONFIG_CPU_SUBTYPE_SH7604) 20#if defined(CONFIG_CPU_SUBTYPE_SH7604)
21 cpu_data->type = CPU_SH7604; 21 current_cpu_data.type = CPU_SH7604;
22 cpu_data->dcache.ways = 4; 22 current_cpu_data.dcache.ways = 4;
23 cpu_data->dcache.way_incr = (1<<10); 23 current_cpu_data.dcache.way_incr = (1<<10);
24 cpu_data->dcache.sets = 64; 24 current_cpu_data.dcache.sets = 64;
25 cpu_data->dcache.entry_shift = 4; 25 current_cpu_data.dcache.entry_shift = 4;
26 cpu_data->dcache.linesz = L1_CACHE_BYTES; 26 current_cpu_data.dcache.linesz = L1_CACHE_BYTES;
27 cpu_data->dcache.flags = 0; 27 current_cpu_data.dcache.flags = 0;
28#elif defined(CONFIG_CPU_SUBTYPE_SH7619) 28#elif defined(CONFIG_CPU_SUBTYPE_SH7619)
29 cpu_data->type = CPU_SH7619; 29 current_cpu_data.type = CPU_SH7619;
30 cpu_data->dcache.ways = 4; 30 current_cpu_data.dcache.ways = 4;
31 cpu_data->dcache.way_incr = (1<<12); 31 current_cpu_data.dcache.way_incr = (1<<12);
32 cpu_data->dcache.sets = 256; 32 current_cpu_data.dcache.sets = 256;
33 cpu_data->dcache.entry_shift = 4; 33 current_cpu_data.dcache.entry_shift = 4;
34 cpu_data->dcache.linesz = L1_CACHE_BYTES; 34 current_cpu_data.dcache.linesz = L1_CACHE_BYTES;
35 cpu_data->dcache.flags = 0; 35 current_cpu_data.dcache.flags = 0;
36#endif 36#endif
37 /* 37 /*
38 * SH-2 doesn't have separate caches 38 * SH-2 doesn't have separate caches
39 */ 39 */
40 cpu_data->dcache.flags |= SH_CACHE_COMBINED; 40 current_cpu_data.dcache.flags |= SH_CACHE_COMBINED;
41 cpu_data->icache = cpu_data->dcache; 41 current_cpu_data.icache = current_cpu_data.dcache;
42 42
43 return 0; 43 return 0;
44} 44}
diff --git a/arch/sh/kernel/cpu/sh2/setup-sh7619.c b/arch/sh/kernel/cpu/sh2/setup-sh7619.c
index 79283e6c1d8f..f83ff8a68f35 100644
--- a/arch/sh/kernel/cpu/sh2/setup-sh7619.c
+++ b/arch/sh/kernel/cpu/sh2/setup-sh7619.c
@@ -52,42 +52,38 @@ static int __init sh7619_devices_setup(void)
52} 52}
53__initcall(sh7619_devices_setup); 53__initcall(sh7619_devices_setup);
54 54
55#define INTC_IPRC 0xf8080000UL
56#define INTC_IPRD 0xf8080002UL
57
58#define CMI0_IRQ 86
59
60#define SCIF0_ERI_IRQ 88
61#define SCIF0_RXI_IRQ 89
62#define SCIF0_BRI_IRQ 90
63#define SCIF0_TXI_IRQ 91
64
65#define SCIF1_ERI_IRQ 92
66#define SCIF1_RXI_IRQ 93
67#define SCIF1_BRI_IRQ 94
68#define SCIF1_TXI_IRQ 95
69
70#define SCIF2_BRI_IRQ 96
71#define SCIF2_ERI_IRQ 97
72#define SCIF2_RXI_IRQ 98
73#define SCIF2_TXI_IRQ 99
74
75static struct ipr_data sh7619_ipr_map[] = { 55static struct ipr_data sh7619_ipr_map[] = {
76 { CMI0_IRQ, INTC_IPRC, 1, 2 }, 56 { 86, 0, 4, 2 }, /* CMI0 */
77 { SCIF0_ERI_IRQ, INTC_IPRD, 3, 3 }, 57 { 88, 1, 12, 3 }, /* SCIF0_ERI */
78 { SCIF0_RXI_IRQ, INTC_IPRD, 3, 3 }, 58 { 89, 1, 12, 3 }, /* SCIF0_RXI */
79 { SCIF0_BRI_IRQ, INTC_IPRD, 3, 3 }, 59 { 90, 1, 12, 3 }, /* SCIF0_BRI */
80 { SCIF0_TXI_IRQ, INTC_IPRD, 3, 3 }, 60 { 91, 1, 12, 3 }, /* SCIF0_TXI */
81 { SCIF1_ERI_IRQ, INTC_IPRD, 2, 3 }, 61 { 92, 1, 8, 3 }, /* SCIF1_ERI */
82 { SCIF1_RXI_IRQ, INTC_IPRD, 2, 3 }, 62 { 93, 1, 8, 3 }, /* SCIF1_RXI */
83 { SCIF1_BRI_IRQ, INTC_IPRD, 2, 3 }, 63 { 94, 1, 8, 3 }, /* SCIF1_BRI */
84 { SCIF1_TXI_IRQ, INTC_IPRD, 2, 3 }, 64 { 95, 1, 8, 3 }, /* SCIF1_TXI */
85 { SCIF2_ERI_IRQ, INTC_IPRD, 1, 3 }, 65 { 96, 1, 4, 3 }, /* SCIF2_ERI */
86 { SCIF2_RXI_IRQ, INTC_IPRD, 1, 3 }, 66 { 97, 1, 4, 3 }, /* SCIF2_RXI */
87 { SCIF2_BRI_IRQ, INTC_IPRD, 1, 3 }, 67 { 98, 1, 4, 3 }, /* SCIF2_BRI */
88 { SCIF2_TXI_IRQ, INTC_IPRD, 1, 3 }, 68 { 99, 1, 4, 3 }, /* SCIF2_TXI */
89}; 69};
90 70
71static unsigned int ipr_offsets[] = {
72 0xf8080000, /* IPRC */
73 0xf8080002, /* IPRD */
74 0xf8080004, /* IPRE */
75 0xf8080006, /* IPRF */
76 0xf8080008, /* IPRG */
77};
78
79/* given the IPR index return the address of the IPR register */
80unsigned int map_ipridx_to_addr(int idx)
81{
82 if (unlikely(idx >= ARRAY_SIZE(ipr_offsets)))
83 return 0;
84 return ipr_offsets[idx];
85}
86
91void __init init_IRQ_ipr(void) 87void __init init_IRQ_ipr(void)
92{ 88{
93 make_ipr_irq(sh7619_ipr_map, ARRAY_SIZE(sh7619_ipr_map)); 89 make_ipr_irq(sh7619_ipr_map, ARRAY_SIZE(sh7619_ipr_map));
diff --git a/arch/sh/kernel/cpu/sh2a/probe.c b/arch/sh/kernel/cpu/sh2a/probe.c
index 87c6c0542089..426f6db01fc6 100644
--- a/arch/sh/kernel/cpu/sh2a/probe.c
+++ b/arch/sh/kernel/cpu/sh2a/probe.c
@@ -17,14 +17,14 @@
17int __init detect_cpu_and_cache_system(void) 17int __init detect_cpu_and_cache_system(void)
18{ 18{
19 /* Just SH7206 for now .. */ 19 /* Just SH7206 for now .. */
20 cpu_data->type = CPU_SH7206; 20 current_cpu_data.type = CPU_SH7206;
21 21
22 cpu_data->dcache.ways = 4; 22 current_cpu_data.dcache.ways = 4;
23 cpu_data->dcache.way_incr = (1 << 11); 23 current_cpu_data.dcache.way_incr = (1 << 11);
24 cpu_data->dcache.sets = 128; 24 current_cpu_data.dcache.sets = 128;
25 cpu_data->dcache.entry_shift = 4; 25 current_cpu_data.dcache.entry_shift = 4;
26 cpu_data->dcache.linesz = L1_CACHE_BYTES; 26 current_cpu_data.dcache.linesz = L1_CACHE_BYTES;
27 cpu_data->dcache.flags = 0; 27 current_cpu_data.dcache.flags = 0;
28 28
29 /* 29 /*
30 * The icache is the same as the dcache as far as this setup is 30 * The icache is the same as the dcache as far as this setup is
@@ -32,7 +32,7 @@ int __init detect_cpu_and_cache_system(void)
32 * lacks the U bit that the dcache has, none of this has any bearing 32 * lacks the U bit that the dcache has, none of this has any bearing
33 * on the cache info. 33 * on the cache info.
34 */ 34 */
35 cpu_data->icache = cpu_data->dcache; 35 current_cpu_data.icache = current_cpu_data.dcache;
36 36
37 return 0; 37 return 0;
38} 38}
diff --git a/arch/sh/kernel/cpu/sh2a/setup-sh7206.c b/arch/sh/kernel/cpu/sh2a/setup-sh7206.c
index 4b60fcc7d667..4ed9110632bc 100644
--- a/arch/sh/kernel/cpu/sh2a/setup-sh7206.c
+++ b/arch/sh/kernel/cpu/sh2a/setup-sh7206.c
@@ -57,55 +57,52 @@ static int __init sh7206_devices_setup(void)
57} 57}
58__initcall(sh7206_devices_setup); 58__initcall(sh7206_devices_setup);
59 59
60#define INTC_IPR08 0xfffe0c04UL
61#define INTC_IPR09 0xfffe0c06UL
62#define INTC_IPR14 0xfffe0c10UL
63
64#define CMI0_IRQ 140
65
66#define MTU1_TGI1A 164
67
68#define SCIF0_BRI_IRQ 240
69#define SCIF0_ERI_IRQ 241
70#define SCIF0_RXI_IRQ 242
71#define SCIF0_TXI_IRQ 243
72
73#define SCIF1_BRI_IRQ 244
74#define SCIF1_ERI_IRQ 245
75#define SCIF1_RXI_IRQ 246
76#define SCIF1_TXI_IRQ 247
77
78#define SCIF2_BRI_IRQ 248
79#define SCIF2_ERI_IRQ 249
80#define SCIF2_RXI_IRQ 250
81#define SCIF2_TXI_IRQ 251
82
83#define SCIF3_BRI_IRQ 252
84#define SCIF3_ERI_IRQ 253
85#define SCIF3_RXI_IRQ 254
86#define SCIF3_TXI_IRQ 255
87
88static struct ipr_data sh7206_ipr_map[] = { 60static struct ipr_data sh7206_ipr_map[] = {
89 { CMI0_IRQ, INTC_IPR08, 3, 2 }, 61 { 140, 7, 12, 2 }, /* CMI0 */
90 { MTU2_TGI1A, INTC_IPR09, 1, 2 }, 62 { 164, 8, 4, 2 }, /* MTU2_TGI1A */
91 { SCIF0_ERI_IRQ, INTC_IPR14, 3, 3 }, 63 { 240, 13, 12, 3 }, /* SCIF0_BRI */
92 { SCIF0_RXI_IRQ, INTC_IPR14, 3, 3 }, 64 { 241, 13, 12, 3 }, /* SCIF0_ERI */
93 { SCIF0_BRI_IRQ, INTC_IPR14, 3, 3 }, 65 { 242, 13, 12, 3 }, /* SCIF0_RXI */
94 { SCIF0_TXI_IRQ, INTC_IPR14, 3, 3 }, 66 { 243, 13, 12, 3 }, /* SCIF0_TXI */
95 { SCIF1_ERI_IRQ, INTC_IPR14, 2, 3 }, 67 { 244, 13, 8, 3 }, /* SCIF1_BRI */
96 { SCIF1_RXI_IRQ, INTC_IPR14, 2, 3 }, 68 { 245, 13, 8, 3 }, /* SCIF1_ERI */
97 { SCIF1_BRI_IRQ, INTC_IPR14, 2, 3 }, 69 { 246, 13, 8, 3 }, /* SCIF1_RXI */
98 { SCIF1_TXI_IRQ, INTC_IPR14, 2, 3 }, 70 { 247, 13, 8, 3 }, /* SCIF1_TXI */
99 { SCIF2_ERI_IRQ, INTC_IPR14, 1, 3 }, 71 { 248, 13, 4, 3 }, /* SCIF2_BRI */
100 { SCIF2_RXI_IRQ, INTC_IPR14, 1, 3 }, 72 { 249, 13, 4, 3 }, /* SCIF2_ERI */
101 { SCIF2_BRI_IRQ, INTC_IPR14, 1, 3 }, 73 { 250, 13, 4, 3 }, /* SCIF2_RXI */
102 { SCIF2_TXI_IRQ, INTC_IPR14, 1, 3 }, 74 { 251, 13, 4, 3 }, /* SCIF2_TXI */
103 { SCIF3_ERI_IRQ, INTC_IPR14, 0, 3 }, 75 { 252, 13, 0, 3 }, /* SCIF3_BRI */
104 { SCIF3_RXI_IRQ, INTC_IPR14, 0, 3 }, 76 { 253, 13, 0, 3 }, /* SCIF3_ERI */
105 { SCIF3_BRI_IRQ, INTC_IPR14, 0, 3 }, 77 { 254, 13, 0, 3 }, /* SCIF3_RXI */
106 { SCIF3_TXI_IRQ, INTC_IPR14, 0, 3 }, 78 { 255, 13, 0, 3 }, /* SCIF3_TXI */
79};
80
81static unsigned int ipr_offsets[] = {
82 0xfffe0818, /* IPR01 */
83 0xfffe081a, /* IPR02 */
84 0, /* unused */
85 0, /* unused */
86 0xfffe0820, /* IPR05 */
87 0xfffe0c00, /* IPR06 */
88 0xfffe0c02, /* IPR07 */
89 0xfffe0c04, /* IPR08 */
90 0xfffe0c06, /* IPR09 */
91 0xfffe0c08, /* IPR10 */
92 0xfffe0c0a, /* IPR11 */
93 0xfffe0c0c, /* IPR12 */
94 0xfffe0c0e, /* IPR13 */
95 0xfffe0c10, /* IPR14 */
107}; 96};
108 97
98/* given the IPR index return the address of the IPR register */
99unsigned int map_ipridx_to_addr(int idx)
100{
101 if (unlikely(idx >= ARRAY_SIZE(ipr_offsets)))
102 return 0;
103 return ipr_offsets[idx];
104}
105
109void __init init_IRQ_ipr(void) 106void __init init_IRQ_ipr(void)
110{ 107{
111 make_ipr_irq(sh7206_ipr_map, ARRAY_SIZE(sh7206_ipr_map)); 108 make_ipr_irq(sh7206_ipr_map, ARRAY_SIZE(sh7206_ipr_map));
diff --git a/arch/sh/kernel/cpu/sh3/entry.S b/arch/sh/kernel/cpu/sh3/entry.S
index 8c0dc2700c69..c19205b0f2c0 100644
--- a/arch/sh/kernel/cpu/sh3/entry.S
+++ b/arch/sh/kernel/cpu/sh3/entry.S
@@ -13,10 +13,8 @@
13#include <linux/linkage.h> 13#include <linux/linkage.h>
14#include <asm/asm-offsets.h> 14#include <asm/asm-offsets.h>
15#include <asm/thread_info.h> 15#include <asm/thread_info.h>
16#include <asm/unistd.h>
17#include <asm/cpu/mmu_context.h> 16#include <asm/cpu/mmu_context.h>
18#include <asm/pgtable.h> 17#include <asm/unistd.h>
19#include <asm/page.h>
20 18
21! NOTE: 19! NOTE:
22! GNU as (as of 2.9.1) changes bf/s into bt/s and bra, when the address 20! GNU as (as of 2.9.1) changes bf/s into bt/s and bra, when the address
@@ -138,14 +136,29 @@ ENTRY(tlb_protection_violation_store)
138 136
139call_dpf: 137call_dpf:
140 mov.l 1f, r0 138 mov.l 1f, r0
141 mov.l @r0, r6 ! address 139 mov r5, r8
140 mov.l @r0, r6
141 mov r6, r9
142 mov.l 2f, r0
143 sts pr, r10
144 jsr @r0
145 mov r15, r4
146 !
147 tst r0, r0
148 bf/s 0f
149 lds r10, pr
150 rts
151 nop
1520: sti
142 mov.l 3f, r0 153 mov.l 3f, r0
143 154 mov r9, r6
155 mov r8, r5
144 jmp @r0 156 jmp @r0
145 mov r15, r4 ! regs 157 mov r15, r4
146 158
147 .align 2 159 .align 2
1481: .long MMU_TEA 1601: .long MMU_TEA
1612: .long __do_page_fault
1493: .long do_page_fault 1623: .long do_page_fault
150 163
151 .align 2 164 .align 2
@@ -173,7 +186,7 @@ call_dae:
173 186
174#if defined(CONFIG_SH_STANDARD_BIOS) 187#if defined(CONFIG_SH_STANDARD_BIOS)
175 /* Unwind the stack and jmp to the debug entry */ 188 /* Unwind the stack and jmp to the debug entry */
176debug_kernel_fw: 189ENTRY(sh_bios_handler)
177 mov.l @r15+, r0 190 mov.l @r15+, r0
178 mov.l @r15+, r1 191 mov.l @r15+, r1
179 mov.l @r15+, r2 192 mov.l @r15+, r2
@@ -332,175 +345,9 @@ general_exception:
332! 345!
333! 346!
334 347
335/* This code makes some assumptions to improve performance.
336 * Make sure they are stil true. */
337#if PTRS_PER_PGD != PTRS_PER_PTE
338#error PGD and PTE sizes don't match
339#endif
340
341/* gas doesn't flag impossible values for mov #immediate as an error */
342#if (_PAGE_PRESENT >> 2) > 0x7f
343#error cannot load PAGE_PRESENT as an immediate
344#endif
345#if _PAGE_DIRTY > 0x7f
346#error cannot load PAGE_DIRTY as an immediate
347#endif
348#if (_PAGE_PRESENT << 2) != _PAGE_ACCESSED
349#error cannot derive PAGE_ACCESSED from PAGE_PRESENT
350#endif
351
352#if defined(CONFIG_CPU_SH4)
353#define ldmmupteh(r) mov.l 8f, r
354#else
355#define ldmmupteh(r) mov #MMU_PTEH, r
356#endif
357
358 .balign 1024,0,1024 348 .balign 1024,0,1024
359tlb_miss: 349tlb_miss:
360#ifdef COUNT_EXCEPTIONS 350 mov.l 1f, k2
361 ! Increment the counts
362 mov.l 9f, k1
363 mov.l @k1, k2
364 add #1, k2
365 mov.l k2, @k1
366#endif
367
368 ! k0 scratch
369 ! k1 pgd and pte pointers
370 ! k2 faulting address
371 ! k3 pgd and pte index masks
372 ! k4 shift
373
374 ! Load up the pgd entry (k1)
375
376 ldmmupteh(k0) ! 9 LS (latency=2) MMU_PTEH
377
378 mov.w 4f, k3 ! 8 LS (latency=2) (PTRS_PER_PGD-1) << 2
379 mov #-(PGDIR_SHIFT-2), k4 ! 6 EX
380
381 mov.l @(MMU_TEA-MMU_PTEH,k0), k2 ! 18 LS (latency=2)
382
383 mov.l @(MMU_TTB-MMU_PTEH,k0), k1 ! 18 LS (latency=2)
384
385 mov k2, k0 ! 5 MT (latency=0)
386 shld k4, k0 ! 99 EX
387
388 and k3, k0 ! 78 EX
389
390 mov.l @(k0, k1), k1 ! 21 LS (latency=2)
391 mov #-(PAGE_SHIFT-2), k4 ! 6 EX
392
393 ! Load up the pte entry (k2)
394
395 mov k2, k0 ! 5 MT (latency=0)
396 shld k4, k0 ! 99 EX
397
398 tst k1, k1 ! 86 MT
399
400 bt 20f ! 110 BR
401
402 and k3, k0 ! 78 EX
403 mov.w 5f, k4 ! 8 LS (latency=2) _PAGE_PRESENT
404
405 mov.l @(k0, k1), k2 ! 21 LS (latency=2)
406 add k0, k1 ! 49 EX
407
408#ifdef CONFIG_CPU_HAS_PTEA
409 ! Test the entry for present and _PAGE_ACCESSED
410
411 mov #-28, k3 ! 6 EX
412 mov k2, k0 ! 5 MT (latency=0)
413
414 tst k4, k2 ! 68 MT
415 shld k3, k0 ! 99 EX
416
417 bt 20f ! 110 BR
418
419 ! Set PTEA register
420 ! MMU_PTEA = ((pteval >> 28) & 0xe) | (pteval & 0x1)
421 !
422 ! k0=pte>>28, k1=pte*, k2=pte, k3=<unused>, k4=_PAGE_PRESENT
423
424 and #0xe, k0 ! 79 EX
425
426 mov k0, k3 ! 5 MT (latency=0)
427 mov k2, k0 ! 5 MT (latency=0)
428
429 and #1, k0 ! 79 EX
430
431 or k0, k3 ! 82 EX
432
433 ldmmupteh(k0) ! 9 LS (latency=2)
434 shll2 k4 ! 101 EX _PAGE_ACCESSED
435
436 tst k4, k2 ! 68 MT
437
438 mov.l k3, @(MMU_PTEA-MMU_PTEH,k0) ! 27 LS
439
440 mov.l 7f, k3 ! 9 LS (latency=2) _PAGE_FLAGS_HARDWARE_MASK
441
442 ! k0=MMU_PTEH, k1=pte*, k2=pte, k3=_PAGE_FLAGS_HARDWARE, k4=_PAGE_ACCESSED
443#else
444
445 ! Test the entry for present and _PAGE_ACCESSED
446
447 mov.l 7f, k3 ! 9 LS (latency=2) _PAGE_FLAGS_HARDWARE_MASK
448 tst k4, k2 ! 68 MT
449
450 shll2 k4 ! 101 EX _PAGE_ACCESSED
451 ldmmupteh(k0) ! 9 LS (latency=2)
452
453 bt 20f ! 110 BR
454 tst k4, k2 ! 68 MT
455
456 ! k0=MMU_PTEH, k1=pte*, k2=pte, k3=_PAGE_FLAGS_HARDWARE, k4=_PAGE_ACCESSED
457
458#endif
459
460 ! Set up the entry
461
462 and k2, k3 ! 78 EX
463 bt/s 10f ! 108 BR
464
465 mov.l k3, @(MMU_PTEL-MMU_PTEH,k0) ! 27 LS
466
467 ldtlb ! 128 CO
468
469 ! At least one instruction between ldtlb and rte
470 nop ! 119 NOP
471
472 rte ! 126 CO
473
474 nop ! 119 NOP
475
476
47710: or k4, k2 ! 82 EX
478
479 ldtlb ! 128 CO
480
481 ! At least one instruction between ldtlb and rte
482 mov.l k2, @k1 ! 27 LS
483
484 rte ! 126 CO
485
486 ! Note we cannot execute mov here, because it is executed after
487 ! restoring SSR, so would be executed in user space.
488 nop ! 119 NOP
489
490
491 .align 5
492 ! Once cache line if possible...
4931: .long swapper_pg_dir
4944: .short (PTRS_PER_PGD-1) << 2
4955: .short _PAGE_PRESENT
4967: .long _PAGE_FLAGS_HARDWARE_MASK
4978: .long MMU_PTEH
498#ifdef COUNT_EXCEPTIONS
4999: .long exception_count_miss
500#endif
501
502 ! Either pgd or pte not present
50320: mov.l 1f, k2
504 mov.l 4f, k3 351 mov.l 4f, k3
505 bra handle_exception 352 bra handle_exception
506 mov.l @k2, k2 353 mov.l @k2, k2
@@ -651,15 +498,6 @@ skip_save:
651 bf interrupt_exception 498 bf interrupt_exception
652 shlr2 r8 499 shlr2 r8
653 shlr r8 500 shlr r8
654
655#ifdef COUNT_EXCEPTIONS
656 mov.l 5f, r9
657 add r8, r9
658 mov.l @r9, r10
659 add #1, r10
660 mov.l r10, @r9
661#endif
662
663 mov.l 4f, r9 501 mov.l 4f, r9
664 add r8, r9 502 add r8, r9
665 mov.l @r9, r9 503 mov.l @r9, r9
@@ -673,9 +511,6 @@ skip_save:
6732: .long 0x000080f0 ! FD=1, IMASK=15 5112: .long 0x000080f0 ! FD=1, IMASK=15
6743: .long 0xcfffffff ! RB=0, BL=0 5123: .long 0xcfffffff ! RB=0, BL=0
6754: .long exception_handling_table 5134: .long exception_handling_table
676#ifdef COUNT_EXCEPTIONS
6775: .long exception_count_table
678#endif
679 514
680interrupt_exception: 515interrupt_exception:
681 mov.l 1f, r9 516 mov.l 1f, r9
diff --git a/arch/sh/kernel/cpu/sh3/probe.c b/arch/sh/kernel/cpu/sh3/probe.c
index e67098836290..821b0ab7b528 100644
--- a/arch/sh/kernel/cpu/sh3/probe.c
+++ b/arch/sh/kernel/cpu/sh3/probe.c
@@ -50,41 +50,41 @@ int __init detect_cpu_and_cache_system(void)
50 50
51 back_to_P1(); 51 back_to_P1();
52 52
53 cpu_data->dcache.ways = 4; 53 current_cpu_data.dcache.ways = 4;
54 cpu_data->dcache.entry_shift = 4; 54 current_cpu_data.dcache.entry_shift = 4;
55 cpu_data->dcache.linesz = L1_CACHE_BYTES; 55 current_cpu_data.dcache.linesz = L1_CACHE_BYTES;
56 cpu_data->dcache.flags = 0; 56 current_cpu_data.dcache.flags = 0;
57 57
58 /* 58 /*
59 * 7709A/7729 has 16K cache (256-entry), while 7702 has only 59 * 7709A/7729 has 16K cache (256-entry), while 7702 has only
60 * 2K(direct) 7702 is not supported (yet) 60 * 2K(direct) 7702 is not supported (yet)
61 */ 61 */
62 if (data0 == data1 && data2 == data3) { /* Shadow */ 62 if (data0 == data1 && data2 == data3) { /* Shadow */
63 cpu_data->dcache.way_incr = (1 << 11); 63 current_cpu_data.dcache.way_incr = (1 << 11);
64 cpu_data->dcache.entry_mask = 0x7f0; 64 current_cpu_data.dcache.entry_mask = 0x7f0;
65 cpu_data->dcache.sets = 128; 65 current_cpu_data.dcache.sets = 128;
66 cpu_data->type = CPU_SH7708; 66 current_cpu_data.type = CPU_SH7708;
67 67
68 cpu_data->flags |= CPU_HAS_MMU_PAGE_ASSOC; 68 current_cpu_data.flags |= CPU_HAS_MMU_PAGE_ASSOC;
69 } else { /* 7709A or 7729 */ 69 } else { /* 7709A or 7729 */
70 cpu_data->dcache.way_incr = (1 << 12); 70 current_cpu_data.dcache.way_incr = (1 << 12);
71 cpu_data->dcache.entry_mask = 0xff0; 71 current_cpu_data.dcache.entry_mask = 0xff0;
72 cpu_data->dcache.sets = 256; 72 current_cpu_data.dcache.sets = 256;
73 cpu_data->type = CPU_SH7729; 73 current_cpu_data.type = CPU_SH7729;
74 74
75#if defined(CONFIG_CPU_SUBTYPE_SH7706) 75#if defined(CONFIG_CPU_SUBTYPE_SH7706)
76 cpu_data->type = CPU_SH7706; 76 current_cpu_data.type = CPU_SH7706;
77#endif 77#endif
78#if defined(CONFIG_CPU_SUBTYPE_SH7710) 78#if defined(CONFIG_CPU_SUBTYPE_SH7710)
79 cpu_data->type = CPU_SH7710; 79 current_cpu_data.type = CPU_SH7710;
80#endif 80#endif
81#if defined(CONFIG_CPU_SUBTYPE_SH7705) 81#if defined(CONFIG_CPU_SUBTYPE_SH7705)
82 cpu_data->type = CPU_SH7705; 82 current_cpu_data.type = CPU_SH7705;
83 83
84#if defined(CONFIG_SH7705_CACHE_32KB) 84#if defined(CONFIG_SH7705_CACHE_32KB)
85 cpu_data->dcache.way_incr = (1 << 13); 85 current_cpu_data.dcache.way_incr = (1 << 13);
86 cpu_data->dcache.entry_mask = 0x1ff0; 86 current_cpu_data.dcache.entry_mask = 0x1ff0;
87 cpu_data->dcache.sets = 512; 87 current_cpu_data.dcache.sets = 512;
88 ctrl_outl(CCR_CACHE_32KB, CCR3); 88 ctrl_outl(CCR_CACHE_32KB, CCR3);
89#else 89#else
90 ctrl_outl(CCR_CACHE_16KB, CCR3); 90 ctrl_outl(CCR_CACHE_16KB, CCR3);
@@ -95,8 +95,8 @@ int __init detect_cpu_and_cache_system(void)
95 /* 95 /*
96 * SH-3 doesn't have separate caches 96 * SH-3 doesn't have separate caches
97 */ 97 */
98 cpu_data->dcache.flags |= SH_CACHE_COMBINED; 98 current_cpu_data.dcache.flags |= SH_CACHE_COMBINED;
99 cpu_data->icache = cpu_data->dcache; 99 current_cpu_data.icache = current_cpu_data.dcache;
100 100
101 return 0; 101 return 0;
102} 102}
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7709.c b/arch/sh/kernel/cpu/sh3/setup-sh7709.c
index ff43ef2a1f0c..dc9b211cf87f 100644
--- a/arch/sh/kernel/cpu/sh3/setup-sh7709.c
+++ b/arch/sh/kernel/cpu/sh3/setup-sh7709.c
@@ -51,3 +51,24 @@ static int __init sh7709_devices_setup(void)
51 ARRAY_SIZE(sh7709_devices)); 51 ARRAY_SIZE(sh7709_devices));
52} 52}
53__initcall(sh7709_devices_setup); 53__initcall(sh7709_devices_setup);
54
55#define IPRx(A,N) .addr=A, .shift=0*N*-1
56#define IPRA(N) IPRx(0xfffffee2UL,N)
57#define IPRB(N) IPRx(0xfffffee4UL,N)
58#define IPRE(N) IPRx(0xa400001aUL,N)
59
60static struct ipr_data sh7709_ipr_map[] = {
61 [16] = { IPRA(15-12), 2 }, /* TMU TUNI0 */
62 [17] = { IPRA(11-8), 4 }, /* TMU TUNI1 */
63 [22] = { IPRA(3-0), 2 }, /* RTC CUI */
64 [23 ... 26] = { IPRB(7-4), 3 }, /* SCI */
65 [27] = { IPRB(15-12), 2 }, /* WDT ITI */
66 [48 ... 51] = { IPRE(15-12), 7 }, /* DMA */
67 [52 ... 55] = { IPRE(11-8), 3 }, /* IRDA */
68 [56 ... 59] = { IPRE(7-4), 3 }, /* SCIF */
69};
70
71void __init init_IRQ_ipr()
72{
73 make_ipr_irq(sh7709_ipr_map, ARRAY_SIZE(sh7709_ipr_map));
74}
diff --git a/arch/sh/kernel/cpu/sh4/probe.c b/arch/sh/kernel/cpu/sh4/probe.c
index 9031a22a2ce7..9d28c88d2f9d 100644
--- a/arch/sh/kernel/cpu/sh4/probe.c
+++ b/arch/sh/kernel/cpu/sh4/probe.c
@@ -10,11 +10,10 @@
10 * License. See the file "COPYING" in the main directory of this archive 10 * License. See the file "COPYING" in the main directory of this archive
11 * for more details. 11 * for more details.
12 */ 12 */
13
14#include <linux/init.h> 13#include <linux/init.h>
14#include <linux/io.h>
15#include <asm/processor.h> 15#include <asm/processor.h>
16#include <asm/cache.h> 16#include <asm/cache.h>
17#include <asm/io.h>
18 17
19int __init detect_cpu_and_cache_system(void) 18int __init detect_cpu_and_cache_system(void)
20{ 19{
@@ -36,20 +35,20 @@ int __init detect_cpu_and_cache_system(void)
36 /* 35 /*
37 * Setup some sane SH-4 defaults for the icache 36 * Setup some sane SH-4 defaults for the icache
38 */ 37 */
39 cpu_data->icache.way_incr = (1 << 13); 38 current_cpu_data.icache.way_incr = (1 << 13);
40 cpu_data->icache.entry_shift = 5; 39 current_cpu_data.icache.entry_shift = 5;
41 cpu_data->icache.sets = 256; 40 current_cpu_data.icache.sets = 256;
42 cpu_data->icache.ways = 1; 41 current_cpu_data.icache.ways = 1;
43 cpu_data->icache.linesz = L1_CACHE_BYTES; 42 current_cpu_data.icache.linesz = L1_CACHE_BYTES;
44 43
45 /* 44 /*
46 * And again for the dcache .. 45 * And again for the dcache ..
47 */ 46 */
48 cpu_data->dcache.way_incr = (1 << 14); 47 current_cpu_data.dcache.way_incr = (1 << 14);
49 cpu_data->dcache.entry_shift = 5; 48 current_cpu_data.dcache.entry_shift = 5;
50 cpu_data->dcache.sets = 512; 49 current_cpu_data.dcache.sets = 512;
51 cpu_data->dcache.ways = 1; 50 current_cpu_data.dcache.ways = 1;
52 cpu_data->dcache.linesz = L1_CACHE_BYTES; 51 current_cpu_data.dcache.linesz = L1_CACHE_BYTES;
53 52
54 /* 53 /*
55 * Setup some generic flags we can probe 54 * Setup some generic flags we can probe
@@ -57,16 +56,16 @@ int __init detect_cpu_and_cache_system(void)
57 */ 56 */
58 if (((pvr >> 16) & 0xff) == 0x10) { 57 if (((pvr >> 16) & 0xff) == 0x10) {
59 if ((cvr & 0x02000000) == 0) 58 if ((cvr & 0x02000000) == 0)
60 cpu_data->flags |= CPU_HAS_L2_CACHE; 59 current_cpu_data.flags |= CPU_HAS_L2_CACHE;
61 if ((cvr & 0x10000000) == 0) 60 if ((cvr & 0x10000000) == 0)
62 cpu_data->flags |= CPU_HAS_DSP; 61 current_cpu_data.flags |= CPU_HAS_DSP;
63 62
64 cpu_data->flags |= CPU_HAS_LLSC; 63 current_cpu_data.flags |= CPU_HAS_LLSC;
65 } 64 }
66 65
67 /* FPU detection works for everyone */ 66 /* FPU detection works for everyone */
68 if ((cvr & 0x20000000) == 1) 67 if ((cvr & 0x20000000) == 1)
69 cpu_data->flags |= CPU_HAS_FPU; 68 current_cpu_data.flags |= CPU_HAS_FPU;
70 69
71 /* Mask off the upper chip ID */ 70 /* Mask off the upper chip ID */
72 pvr &= 0xffff; 71 pvr &= 0xffff;
@@ -77,151 +76,151 @@ int __init detect_cpu_and_cache_system(void)
77 */ 76 */
78 switch (pvr) { 77 switch (pvr) {
79 case 0x205: 78 case 0x205:
80 cpu_data->type = CPU_SH7750; 79 current_cpu_data.type = CPU_SH7750;
81 cpu_data->flags |= CPU_HAS_P2_FLUSH_BUG | CPU_HAS_FPU | 80 current_cpu_data.flags |= CPU_HAS_P2_FLUSH_BUG | CPU_HAS_FPU |
82 CPU_HAS_PERF_COUNTER; 81 CPU_HAS_PERF_COUNTER;
83 break; 82 break;
84 case 0x206: 83 case 0x206:
85 cpu_data->type = CPU_SH7750S; 84 current_cpu_data.type = CPU_SH7750S;
86 cpu_data->flags |= CPU_HAS_P2_FLUSH_BUG | CPU_HAS_FPU | 85 current_cpu_data.flags |= CPU_HAS_P2_FLUSH_BUG | CPU_HAS_FPU |
87 CPU_HAS_PERF_COUNTER; 86 CPU_HAS_PERF_COUNTER;
88 break; 87 break;
89 case 0x1100: 88 case 0x1100:
90 cpu_data->type = CPU_SH7751; 89 current_cpu_data.type = CPU_SH7751;
91 cpu_data->flags |= CPU_HAS_FPU; 90 current_cpu_data.flags |= CPU_HAS_FPU;
92 break; 91 break;
93 case 0x2000: 92 case 0x2000:
94 cpu_data->type = CPU_SH73180; 93 current_cpu_data.type = CPU_SH73180;
95 cpu_data->icache.ways = 4; 94 current_cpu_data.icache.ways = 4;
96 cpu_data->dcache.ways = 4; 95 current_cpu_data.dcache.ways = 4;
97 cpu_data->flags |= CPU_HAS_LLSC; 96 current_cpu_data.flags |= CPU_HAS_LLSC;
98 break; 97 break;
99 case 0x2001: 98 case 0x2001:
100 case 0x2004: 99 case 0x2004:
101 cpu_data->type = CPU_SH7770; 100 current_cpu_data.type = CPU_SH7770;
102 cpu_data->icache.ways = 4; 101 current_cpu_data.icache.ways = 4;
103 cpu_data->dcache.ways = 4; 102 current_cpu_data.dcache.ways = 4;
104 103
105 cpu_data->flags |= CPU_HAS_FPU | CPU_HAS_LLSC; 104 current_cpu_data.flags |= CPU_HAS_FPU | CPU_HAS_LLSC;
106 break; 105 break;
107 case 0x2006: 106 case 0x2006:
108 case 0x200A: 107 case 0x200A:
109 if (prr == 0x61) 108 if (prr == 0x61)
110 cpu_data->type = CPU_SH7781; 109 current_cpu_data.type = CPU_SH7781;
111 else 110 else
112 cpu_data->type = CPU_SH7780; 111 current_cpu_data.type = CPU_SH7780;
113 112
114 cpu_data->icache.ways = 4; 113 current_cpu_data.icache.ways = 4;
115 cpu_data->dcache.ways = 4; 114 current_cpu_data.dcache.ways = 4;
116 115
117 cpu_data->flags |= CPU_HAS_FPU | CPU_HAS_PERF_COUNTER | 116 current_cpu_data.flags |= CPU_HAS_FPU | CPU_HAS_PERF_COUNTER |
118 CPU_HAS_LLSC; 117 CPU_HAS_LLSC;
119 break; 118 break;
120 case 0x3000: 119 case 0x3000:
121 case 0x3003: 120 case 0x3003:
122 case 0x3009: 121 case 0x3009:
123 cpu_data->type = CPU_SH7343; 122 current_cpu_data.type = CPU_SH7343;
124 cpu_data->icache.ways = 4; 123 current_cpu_data.icache.ways = 4;
125 cpu_data->dcache.ways = 4; 124 current_cpu_data.dcache.ways = 4;
126 cpu_data->flags |= CPU_HAS_LLSC; 125 current_cpu_data.flags |= CPU_HAS_LLSC;
127 break; 126 break;
128 case 0x3008: 127 case 0x3008:
129 if (prr == 0xa0) { 128 if (prr == 0xa0) {
130 cpu_data->type = CPU_SH7722; 129 current_cpu_data.type = CPU_SH7722;
131 cpu_data->icache.ways = 4; 130 current_cpu_data.icache.ways = 4;
132 cpu_data->dcache.ways = 4; 131 current_cpu_data.dcache.ways = 4;
133 cpu_data->flags |= CPU_HAS_LLSC; 132 current_cpu_data.flags |= CPU_HAS_LLSC;
134 } 133 }
135 break; 134 break;
136 case 0x8000: 135 case 0x8000:
137 cpu_data->type = CPU_ST40RA; 136 current_cpu_data.type = CPU_ST40RA;
138 cpu_data->flags |= CPU_HAS_FPU; 137 current_cpu_data.flags |= CPU_HAS_FPU;
139 break; 138 break;
140 case 0x8100: 139 case 0x8100:
141 cpu_data->type = CPU_ST40GX1; 140 current_cpu_data.type = CPU_ST40GX1;
142 cpu_data->flags |= CPU_HAS_FPU; 141 current_cpu_data.flags |= CPU_HAS_FPU;
143 break; 142 break;
144 case 0x700: 143 case 0x700:
145 cpu_data->type = CPU_SH4_501; 144 current_cpu_data.type = CPU_SH4_501;
146 cpu_data->icache.ways = 2; 145 current_cpu_data.icache.ways = 2;
147 cpu_data->dcache.ways = 2; 146 current_cpu_data.dcache.ways = 2;
148 break; 147 break;
149 case 0x600: 148 case 0x600:
150 cpu_data->type = CPU_SH4_202; 149 current_cpu_data.type = CPU_SH4_202;
151 cpu_data->icache.ways = 2; 150 current_cpu_data.icache.ways = 2;
152 cpu_data->dcache.ways = 2; 151 current_cpu_data.dcache.ways = 2;
153 cpu_data->flags |= CPU_HAS_FPU; 152 current_cpu_data.flags |= CPU_HAS_FPU;
154 break; 153 break;
155 case 0x500 ... 0x501: 154 case 0x500 ... 0x501:
156 switch (prr) { 155 switch (prr) {
157 case 0x10: 156 case 0x10:
158 cpu_data->type = CPU_SH7750R; 157 current_cpu_data.type = CPU_SH7750R;
159 break; 158 break;
160 case 0x11: 159 case 0x11:
161 cpu_data->type = CPU_SH7751R; 160 current_cpu_data.type = CPU_SH7751R;
162 break; 161 break;
163 case 0x50 ... 0x5f: 162 case 0x50 ... 0x5f:
164 cpu_data->type = CPU_SH7760; 163 current_cpu_data.type = CPU_SH7760;
165 break; 164 break;
166 } 165 }
167 166
168 cpu_data->icache.ways = 2; 167 current_cpu_data.icache.ways = 2;
169 cpu_data->dcache.ways = 2; 168 current_cpu_data.dcache.ways = 2;
170 169
171 cpu_data->flags |= CPU_HAS_FPU; 170 current_cpu_data.flags |= CPU_HAS_FPU;
172 171
173 break; 172 break;
174 default: 173 default:
175 cpu_data->type = CPU_SH_NONE; 174 current_cpu_data.type = CPU_SH_NONE;
176 break; 175 break;
177 } 176 }
178 177
179#ifdef CONFIG_SH_DIRECT_MAPPED 178#ifdef CONFIG_SH_DIRECT_MAPPED
180 cpu_data->icache.ways = 1; 179 current_cpu_data.icache.ways = 1;
181 cpu_data->dcache.ways = 1; 180 current_cpu_data.dcache.ways = 1;
182#endif 181#endif
183 182
184#ifdef CONFIG_CPU_HAS_PTEA 183#ifdef CONFIG_CPU_HAS_PTEA
185 cpu_data->flags |= CPU_HAS_PTEA; 184 current_cpu_data.flags |= CPU_HAS_PTEA;
186#endif 185#endif
187 186
188 /* 187 /*
189 * On anything that's not a direct-mapped cache, look to the CVR 188 * On anything that's not a direct-mapped cache, look to the CVR
190 * for I/D-cache specifics. 189 * for I/D-cache specifics.
191 */ 190 */
192 if (cpu_data->icache.ways > 1) { 191 if (current_cpu_data.icache.ways > 1) {
193 size = sizes[(cvr >> 20) & 0xf]; 192 size = sizes[(cvr >> 20) & 0xf];
194 cpu_data->icache.way_incr = (size >> 1); 193 current_cpu_data.icache.way_incr = (size >> 1);
195 cpu_data->icache.sets = (size >> 6); 194 current_cpu_data.icache.sets = (size >> 6);
196 195
197 } 196 }
198 197
199 /* Setup the rest of the I-cache info */ 198 /* Setup the rest of the I-cache info */
200 cpu_data->icache.entry_mask = cpu_data->icache.way_incr - 199 current_cpu_data.icache.entry_mask = current_cpu_data.icache.way_incr -
201 cpu_data->icache.linesz; 200 current_cpu_data.icache.linesz;
202 201
203 cpu_data->icache.way_size = cpu_data->icache.sets * 202 current_cpu_data.icache.way_size = current_cpu_data.icache.sets *
204 cpu_data->icache.linesz; 203 current_cpu_data.icache.linesz;
205 204
206 /* And the rest of the D-cache */ 205 /* And the rest of the D-cache */
207 if (cpu_data->dcache.ways > 1) { 206 if (current_cpu_data.dcache.ways > 1) {
208 size = sizes[(cvr >> 16) & 0xf]; 207 size = sizes[(cvr >> 16) & 0xf];
209 cpu_data->dcache.way_incr = (size >> 1); 208 current_cpu_data.dcache.way_incr = (size >> 1);
210 cpu_data->dcache.sets = (size >> 6); 209 current_cpu_data.dcache.sets = (size >> 6);
211 } 210 }
212 211
213 cpu_data->dcache.entry_mask = cpu_data->dcache.way_incr - 212 current_cpu_data.dcache.entry_mask = current_cpu_data.dcache.way_incr -
214 cpu_data->dcache.linesz; 213 current_cpu_data.dcache.linesz;
215 214
216 cpu_data->dcache.way_size = cpu_data->dcache.sets * 215 current_cpu_data.dcache.way_size = current_cpu_data.dcache.sets *
217 cpu_data->dcache.linesz; 216 current_cpu_data.dcache.linesz;
218 217
219 /* 218 /*
220 * Setup the L2 cache desc 219 * Setup the L2 cache desc
221 * 220 *
222 * SH-4A's have an optional PIPT L2. 221 * SH-4A's have an optional PIPT L2.
223 */ 222 */
224 if (cpu_data->flags & CPU_HAS_L2_CACHE) { 223 if (current_cpu_data.flags & CPU_HAS_L2_CACHE) {
225 /* 224 /*
226 * Size calculation is much more sensible 225 * Size calculation is much more sensible
227 * than it is for the L1. 226 * than it is for the L1.
@@ -232,16 +231,22 @@ int __init detect_cpu_and_cache_system(void)
232 231
233 BUG_ON(!size); 232 BUG_ON(!size);
234 233
235 cpu_data->scache.way_incr = (1 << 16); 234 current_cpu_data.scache.way_incr = (1 << 16);
236 cpu_data->scache.entry_shift = 5; 235 current_cpu_data.scache.entry_shift = 5;
237 cpu_data->scache.ways = 4; 236 current_cpu_data.scache.ways = 4;
238 cpu_data->scache.linesz = L1_CACHE_BYTES; 237 current_cpu_data.scache.linesz = L1_CACHE_BYTES;
239 cpu_data->scache.entry_mask = 238
240 (cpu_data->scache.way_incr - cpu_data->scache.linesz); 239 current_cpu_data.scache.entry_mask =
241 cpu_data->scache.sets = size / 240 (current_cpu_data.scache.way_incr -
242 (cpu_data->scache.linesz * cpu_data->scache.ways); 241 current_cpu_data.scache.linesz);
243 cpu_data->scache.way_size = 242
244 (cpu_data->scache.sets * cpu_data->scache.linesz); 243 current_cpu_data.scache.sets = size /
244 (current_cpu_data.scache.linesz *
245 current_cpu_data.scache.ways);
246
247 current_cpu_data.scache.way_size =
248 (current_cpu_data.scache.sets *
249 current_cpu_data.scache.linesz);
245 } 250 }
246 251
247 return 0; 252 return 0;
diff --git a/arch/sh/kernel/cpu/sh4/setup-sh7750.c b/arch/sh/kernel/cpu/sh4/setup-sh7750.c
index cbac27634c0b..6f8f458912c7 100644
--- a/arch/sh/kernel/cpu/sh4/setup-sh7750.c
+++ b/arch/sh/kernel/cpu/sh4/setup-sh7750.c
@@ -46,11 +46,13 @@ static struct platform_device rtc_device = {
46 46
47static struct plat_sci_port sci_platform_data[] = { 47static struct plat_sci_port sci_platform_data[] = {
48 { 48 {
49#ifndef CONFIG_SH_RTS7751R2D
49 .mapbase = 0xffe00000, 50 .mapbase = 0xffe00000,
50 .flags = UPF_BOOT_AUTOCONF, 51 .flags = UPF_BOOT_AUTOCONF,
51 .type = PORT_SCI, 52 .type = PORT_SCI,
52 .irqs = { 23, 24, 25, 0 }, 53 .irqs = { 23, 24, 25, 0 },
53 }, { 54 }, {
55#endif
54 .mapbase = 0xffe80000, 56 .mapbase = 0xffe80000,
55 .flags = UPF_BOOT_AUTOCONF, 57 .flags = UPF_BOOT_AUTOCONF,
56 .type = PORT_SCIF, 58 .type = PORT_SCIF,
@@ -101,7 +103,7 @@ static struct ipr_data sh7750_ipr_map[] = {
101 { 35, 2, 8, 7 }, /* DMAC DMTE1 */ 103 { 35, 2, 8, 7 }, /* DMAC DMTE1 */
102 { 36, 2, 8, 7 }, /* DMAC DMTE2 */ 104 { 36, 2, 8, 7 }, /* DMAC DMTE2 */
103 { 37, 2, 8, 7 }, /* DMAC DMTE3 */ 105 { 37, 2, 8, 7 }, /* DMAC DMTE3 */
104 { 28, 2, 8, 7 }, /* DMAC DMAE */ 106 { 38, 2, 8, 7 }, /* DMAC DMAE */
105}; 107};
106 108
107static struct ipr_data sh7751_ipr_map[] = { 109static struct ipr_data sh7751_ipr_map[] = {
diff --git a/arch/sh/kernel/cpu/sh4/setup-sh7760.c b/arch/sh/kernel/cpu/sh4/setup-sh7760.c
index 07e5377bf550..b7c702821e6f 100644
--- a/arch/sh/kernel/cpu/sh4/setup-sh7760.c
+++ b/arch/sh/kernel/cpu/sh4/setup-sh7760.c
@@ -52,17 +52,11 @@ static int __init sh7760_devices_setup(void)
52} 52}
53__initcall(sh7760_devices_setup); 53__initcall(sh7760_devices_setup);
54 54
55/*
56 * SH7760 INTC2-Style interrupts, vectors IRQ48-111 INTEVT 0x800-0xFE0
57 */
58static struct intc2_data intc2_irq_table[] = { 55static struct intc2_data intc2_irq_table[] = {
59 /* INTPRIO0 | INTMSK0 */
60 {48, 0, 28, 0, 31, 3}, /* IRQ 4 */ 56 {48, 0, 28, 0, 31, 3}, /* IRQ 4 */
61 {49, 0, 24, 0, 30, 3}, /* IRQ 3 */ 57 {49, 0, 24, 0, 30, 3}, /* IRQ 3 */
62 {50, 0, 20, 0, 29, 3}, /* IRQ 2 */ 58 {50, 0, 20, 0, 29, 3}, /* IRQ 2 */
63 {51, 0, 16, 0, 28, 3}, /* IRQ 1 */ 59 {51, 0, 16, 0, 28, 3}, /* IRQ 1 */
64 /* 52-55 (INTEVT 0x880-0x8E0) unused/reserved */
65 /* INTPRIO4 | INTMSK0 */
66 {56, 4, 28, 0, 25, 3}, /* HCAN2_CHAN0 */ 60 {56, 4, 28, 0, 25, 3}, /* HCAN2_CHAN0 */
67 {57, 4, 24, 0, 24, 3}, /* HCAN2_CHAN1 */ 61 {57, 4, 24, 0, 24, 3}, /* HCAN2_CHAN1 */
68 {58, 4, 20, 0, 23, 3}, /* I2S_CHAN0 */ 62 {58, 4, 20, 0, 23, 3}, /* I2S_CHAN0 */
@@ -71,18 +65,15 @@ static struct intc2_data intc2_irq_table[] = {
71 {61, 4, 8, 0, 20, 3}, /* AC97_CHAN1 */ 65 {61, 4, 8, 0, 20, 3}, /* AC97_CHAN1 */
72 {62, 4, 4, 0, 19, 3}, /* I2C_CHAN0 */ 66 {62, 4, 4, 0, 19, 3}, /* I2C_CHAN0 */
73 {63, 4, 0, 0, 18, 3}, /* I2C_CHAN1 */ 67 {63, 4, 0, 0, 18, 3}, /* I2C_CHAN1 */
74 /* INTPRIO8 | INTMSK0 */
75 {52, 8, 16, 0, 11, 3}, /* SCIF0_ERI_IRQ */ 68 {52, 8, 16, 0, 11, 3}, /* SCIF0_ERI_IRQ */
76 {53, 8, 16, 0, 10, 3}, /* SCIF0_RXI_IRQ */ 69 {53, 8, 16, 0, 10, 3}, /* SCIF0_RXI_IRQ */
77 {54, 8, 16, 0, 9, 3}, /* SCIF0_BRI_IRQ */ 70 {54, 8, 16, 0, 9, 3}, /* SCIF0_BRI_IRQ */
78 {55, 8, 16, 0, 8, 3}, /* SCIF0_TXI_IRQ */ 71 {55, 8, 16, 0, 8, 3}, /* SCIF0_TXI_IRQ */
79 {64, 8, 28, 0, 17, 3}, /* USBHI_IRQ */ 72 {64, 8, 28, 0, 17, 3}, /* USBHI_IRQ */
80 {65, 8, 24, 0, 16, 3}, /* LCDC */ 73 {65, 8, 24, 0, 16, 3}, /* LCDC */
81 /* 66, 67 unused */
82 {68, 8, 20, 0, 14, 13}, /* DMABRGI0_IRQ */ 74 {68, 8, 20, 0, 14, 13}, /* DMABRGI0_IRQ */
83 {69, 8, 20, 0, 13, 13}, /* DMABRGI1_IRQ */ 75 {69, 8, 20, 0, 13, 13}, /* DMABRGI1_IRQ */
84 {70, 8, 20, 0, 12, 13}, /* DMABRGI2_IRQ */ 76 {70, 8, 20, 0, 12, 13}, /* DMABRGI2_IRQ */
85 /* 71 unused */
86 {72, 8, 12, 0, 7, 3}, /* SCIF1_ERI_IRQ */ 77 {72, 8, 12, 0, 7, 3}, /* SCIF1_ERI_IRQ */
87 {73, 8, 12, 0, 6, 3}, /* SCIF1_RXI_IRQ */ 78 {73, 8, 12, 0, 6, 3}, /* SCIF1_RXI_IRQ */
88 {74, 8, 12, 0, 5, 3}, /* SCIF1_BRI_IRQ */ 79 {74, 8, 12, 0, 5, 3}, /* SCIF1_BRI_IRQ */
@@ -91,26 +82,71 @@ static struct intc2_data intc2_irq_table[] = {
91 {77, 8, 8, 0, 2, 3}, /* SCIF2_RXI_IRQ */ 82 {77, 8, 8, 0, 2, 3}, /* SCIF2_RXI_IRQ */
92 {78, 8, 8, 0, 1, 3}, /* SCIF2_BRI_IRQ */ 83 {78, 8, 8, 0, 1, 3}, /* SCIF2_BRI_IRQ */
93 {79, 8, 8, 0, 0, 3}, /* SCIF2_TXI_IRQ */ 84 {79, 8, 8, 0, 0, 3}, /* SCIF2_TXI_IRQ */
94 /* | INTMSK4 */
95 {80, 8, 4, 4, 23, 3}, /* SIM_ERI */ 85 {80, 8, 4, 4, 23, 3}, /* SIM_ERI */
96 {81, 8, 4, 4, 22, 3}, /* SIM_RXI */ 86 {81, 8, 4, 4, 22, 3}, /* SIM_RXI */
97 {82, 8, 4, 4, 21, 3}, /* SIM_TXI */ 87 {82, 8, 4, 4, 21, 3}, /* SIM_TXI */
98 {83, 8, 4, 4, 20, 3}, /* SIM_TEI */ 88 {83, 8, 4, 4, 20, 3}, /* SIM_TEI */
99 {84, 8, 0, 4, 19, 3}, /* HSPII */ 89 {84, 8, 0, 4, 19, 3}, /* HSPII */
100 /* INTPRIOC | INTMSK4 */
101 /* 85-87 unused/reserved */
102 {88, 12, 20, 4, 18, 3}, /* MMCI0 */ 90 {88, 12, 20, 4, 18, 3}, /* MMCI0 */
103 {89, 12, 20, 4, 17, 3}, /* MMCI1 */ 91 {89, 12, 20, 4, 17, 3}, /* MMCI1 */
104 {90, 12, 20, 4, 16, 3}, /* MMCI2 */ 92 {90, 12, 20, 4, 16, 3}, /* MMCI2 */
105 {91, 12, 20, 4, 15, 3}, /* MMCI3 */ 93 {91, 12, 20, 4, 15, 3}, /* MMCI3 */
106 {92, 12, 12, 4, 6, 3}, /* MFI (unsure, bug? in my 7760 manual*/ 94 {92, 12, 12, 4, 6, 3}, /* MFI */
107 /* 93-107 reserved/undocumented */
108 {108,12, 4, 4, 1, 3}, /* ADC */ 95 {108,12, 4, 4, 1, 3}, /* ADC */
109 {109,12, 0, 4, 0, 3}, /* CMTI */ 96 {109,12, 0, 4, 0, 3}, /* CMTI */
110 /* 110-111 reserved/unused */
111}; 97};
112 98
99static struct ipr_data sh7760_ipr_map[] = {
100 /* IRQ, IPR-idx, shift, priority */
101 { 16, 0, 12, 2 }, /* TMU0 TUNI*/
102 { 17, 0, 8, 2 }, /* TMU1 TUNI */
103 { 18, 0, 4, 2 }, /* TMU2 TUNI */
104 { 19, 0, 4, 2 }, /* TMU2 TIPCI */
105 { 27, 1, 12, 2 }, /* WDT ITI */
106 { 28, 1, 8, 2 }, /* REF RCMI */
107 { 29, 1, 8, 2 }, /* REF ROVI */
108 { 32, 2, 0, 7 }, /* HUDI */
109 { 33, 2, 12, 7 }, /* GPIOI */
110 { 34, 2, 8, 7 }, /* DMAC DMTE0 */
111 { 35, 2, 8, 7 }, /* DMAC DMTE1 */
112 { 36, 2, 8, 7 }, /* DMAC DMTE2 */
113 { 37, 2, 8, 7 }, /* DMAC DMTE3 */
114 { 38, 2, 8, 7 }, /* DMAC DMAE */
115 { 44, 2, 8, 7 }, /* DMAC DMTE4 */
116 { 45, 2, 8, 7 }, /* DMAC DMTE5 */
117 { 46, 2, 8, 7 }, /* DMAC DMTE6 */
118 { 47, 2, 8, 7 }, /* DMAC DMTE7 */
119/* these here are only valid if INTC_ICR bit 7 is set to 1!
120 * XXX: maybe CONFIG_SH_IRLMODE symbol? SH7751 could use it too */
121#if 0
122 { 2, 3, 12, 3 }, /* IRL0 */
123 { 5, 3, 8, 3 }, /* IRL1 */
124 { 8, 3, 4, 3 }, /* IRL2 */
125 { 11, 3, 0, 3 }, /* IRL3 */
126#endif
127};
128
129static unsigned long ipr_offsets[] = {
130 0xffd00004UL, /* 0: IPRA */
131 0xffd00008UL, /* 1: IPRB */
132 0xffd0000cUL, /* 2: IPRC */
133 0xffd00010UL, /* 3: IPRD */
134};
135
136/* given the IPR index return the address of the IPR register */
137unsigned int map_ipridx_to_addr(int idx)
138{
139 if (idx >= ARRAY_SIZE(ipr_offsets))
140 return 0;
141 return ipr_offsets[idx];
142}
143
113void __init init_IRQ_intc2(void) 144void __init init_IRQ_intc2(void)
114{ 145{
115 make_intc2_irq(intc2_irq_table, ARRAY_SIZE(intc2_irq_table)); 146 make_intc2_irq(intc2_irq_table, ARRAY_SIZE(intc2_irq_table));
116} 147}
148
149void __init init_IRQ_ipr(void)
150{
151 make_ipr_irq(sh7760_ipr_map, ARRAY_SIZE(sh7760_ipr_map));
152}
diff --git a/arch/sh/kernel/debugtraps.S b/arch/sh/kernel/debugtraps.S
new file mode 100644
index 000000000000..13b66746410a
--- /dev/null
+++ b/arch/sh/kernel/debugtraps.S
@@ -0,0 +1,41 @@
1/*
2 * arch/sh/kernel/debugtraps.S
3 *
4 * Debug trap jump tables for SuperH
5 *
6 * Copyright (C) 2006 Paul Mundt
7 *
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
10 * for more details.
11 */
12#include <linux/sys.h>
13#include <linux/linkage.h>
14
15#if !defined(CONFIG_SH_KGDB)
16#define kgdb_handle_exception debug_trap_handler
17#endif
18
19#if !defined(CONFIG_SH_STANDARD_BIOS)
20#define sh_bios_handler debug_trap_handler
21#endif
22
23 .data
24
25ENTRY(debug_trap_table)
26 .long debug_trap_handler /* 0x30 */
27 .long debug_trap_handler /* 0x31 */
28 .long debug_trap_handler /* 0x32 */
29 .long debug_trap_handler /* 0x33 */
30 .long debug_trap_handler /* 0x34 */
31 .long debug_trap_handler /* 0x35 */
32 .long debug_trap_handler /* 0x36 */
33 .long debug_trap_handler /* 0x37 */
34 .long debug_trap_handler /* 0x38 */
35 .long debug_trap_handler /* 0x39 */
36 .long debug_trap_handler /* 0x3a */
37 .long debug_trap_handler /* 0x3b */
38 .long kgdb_handle_exception /* 0x3c */
39 .long debug_trap_handler /* 0x3d */
40 .long bug_trap_handler /* 0x3e */
41 .long sh_bios_handler /* 0x3f */
diff --git a/arch/sh/kernel/early_printk.c b/arch/sh/kernel/early_printk.c
index 560b91cdd15c..9048c0326d87 100644
--- a/arch/sh/kernel/early_printk.c
+++ b/arch/sh/kernel/early_printk.c
@@ -106,12 +106,32 @@ static struct console scif_console = {
106}; 106};
107 107
108#if defined(CONFIG_CPU_SH4) && !defined(CONFIG_SH_STANDARD_BIOS) 108#if defined(CONFIG_CPU_SH4) && !defined(CONFIG_SH_STANDARD_BIOS)
109#define DEFAULT_BAUD 115200
109/* 110/*
110 * Simple SCIF init, primarily aimed at SH7750 and other similar SH-4 111 * Simple SCIF init, primarily aimed at SH7750 and other similar SH-4
111 * devices that aren't using sh-ipl+g. 112 * devices that aren't using sh-ipl+g.
112 */ 113 */
113static void scif_sercon_init(int baud) 114static void scif_sercon_init(char *s)
114{ 115{
116 unsigned baud = DEFAULT_BAUD;
117 char *e;
118
119 if (*s == ',')
120 ++s;
121
122 if (*s) {
123 /* ignore ioport/device name */
124 s += strcspn(s, ",");
125 if (*s == ',')
126 s++;
127 }
128
129 if (*s) {
130 baud = simple_strtoul(s, &e, 0);
131 if (baud == 0 || s == e)
132 baud = DEFAULT_BAUD;
133 }
134
115 ctrl_outw(0, scif_port.mapbase + 8); 135 ctrl_outw(0, scif_port.mapbase + 8);
116 ctrl_outw(0, scif_port.mapbase); 136 ctrl_outw(0, scif_port.mapbase);
117 137
@@ -167,7 +187,7 @@ int __init setup_early_printk(char *buf)
167 early_console = &scif_console; 187 early_console = &scif_console;
168 188
169#if defined(CONFIG_CPU_SH4) && !defined(CONFIG_SH_STANDARD_BIOS) 189#if defined(CONFIG_CPU_SH4) && !defined(CONFIG_SH_STANDARD_BIOS)
170 scif_sercon_init(115200); 190 scif_sercon_init(buf + 6);
171#endif 191#endif
172 } 192 }
173#endif 193#endif
diff --git a/arch/sh/kernel/entry-common.S b/arch/sh/kernel/entry-common.S
index fc279aeb73ab..ab4ebb856c2a 100644
--- a/arch/sh/kernel/entry-common.S
+++ b/arch/sh/kernel/entry-common.S
@@ -54,79 +54,24 @@
54# define resume_kernel __restore_all 54# define resume_kernel __restore_all
55#endif 55#endif
56 56
57#if defined(CONFIG_SH_STANDARD_BIOS) || defined(CONFIG_SH_KGDB)
58! Handle kernel debug if either kgdb (SW) or gdb-stub (FW) is present.
59! If both are configured, handle the debug traps (breakpoints) in SW,
60! but still allow BIOS traps to FW.
61
62 .align 2
63debug_kernel:
64#if defined(CONFIG_SH_STANDARD_BIOS) && defined(CONFIG_SH_KGDB)
65 /* Force BIOS call to FW (debug_trap put TRA in r8) */
66 mov r8,r0
67 shlr2 r0
68 cmp/eq #0x3f,r0
69 bt debug_kernel_fw
70#endif /* CONFIG_SH_STANDARD_BIOS && CONFIG_SH_KGDB */
71
72debug_enter:
73#if defined(CONFIG_SH_KGDB)
74 /* Jump to kgdb, pass stacked regs as arg */
75debug_kernel_sw:
76 mov.l 3f, r0
77 jmp @r0
78 mov r15, r4
79 .align 2
803: .long kgdb_handle_exception
81#endif /* CONFIG_SH_KGDB */
82#ifdef CONFIG_SH_STANDARD_BIOS
83 bra debug_kernel_fw
84 nop
85#endif
86#endif /* CONFIG_SH_STANDARD_BIOS || CONFIG_SH_KGDB */
87
88 .align 2
89debug_trap:
90#if defined(CONFIG_SH_STANDARD_BIOS) || defined(CONFIG_SH_KGDB)
91 mov r8, r0
92 shlr2 r0
93 cmp/eq #0x3f, r0 ! sh_bios() trap
94 bf 1f
95#ifdef CONFIG_SH_KGDB
96 cmp/eq #0xff, r0 ! XXX: KGDB trap, fix for SH-2.
97 bf 1f
98#endif
99 mov #OFF_SR, r0
100 mov.l @(r0,r15), r0 ! get status register
101 shll r0
102 shll r0 ! kernel space?
103 bt/s debug_kernel
1041:
105#endif
106 mov.l @r15, r0 ! Restore R0 value
107 mov.l 1f, r8
108 jmp @r8
109 nop
110 57
111 .align 2 58 .align 2
112ENTRY(exception_error) 59ENTRY(exception_error)
113 ! 60 !
114#ifdef CONFIG_TRACE_IRQFLAGS 61#ifdef CONFIG_TRACE_IRQFLAGS
115 mov.l 3f, r0 62 mov.l 2f, r0
116 jsr @r0 63 jsr @r0
117 nop 64 nop
118#endif 65#endif
119 sti 66 sti
120 mov.l 2f, r0 67 mov.l 1f, r0
121 jmp @r0 68 jmp @r0
122 nop 69 nop
123 70
124!
125 .align 2 71 .align 2
1261: .long break_point_trap_software 721: .long do_exception_error
1272: .long do_exception_error
128#ifdef CONFIG_TRACE_IRQFLAGS 73#ifdef CONFIG_TRACE_IRQFLAGS
1293: .long trace_hardirqs_on 742: .long trace_hardirqs_on
130#endif 75#endif
131 76
132 .align 2 77 .align 2
@@ -331,16 +276,31 @@ __restore_all:
3311: .long restore_all 2761: .long restore_all
332 277
333 .align 2 278 .align 2
334not_syscall_tra:
335 bra debug_trap
336 nop
337
338 .align 2
339syscall_badsys: ! Bad syscall number 279syscall_badsys: ! Bad syscall number
340 mov #-ENOSYS, r0 280 mov #-ENOSYS, r0
341 bra resume_userspace 281 bra resume_userspace
342 mov.l r0, @(OFF_R0,r15) ! Return value 282 mov.l r0, @(OFF_R0,r15) ! Return value
343 283
284/*
285 * The main debug trap handler.
286 *
287 * r8=TRA (not the trap number!)
288 *
289 * Note: This assumes that the trapa value is left in its original
290 * form (without the shlr2 shift) so the calculation for the jump
291 * call table offset remains a simple in place mask.
292 */
293debug_trap:
294 mov r8, r0
295 and #(0xf << 2), r0
296 mov.l 1f, r8
297 add r0, r8
298 mov.l @r8, r8
299 jmp @r8
300 nop
301
302 .align 2
3031: .long debug_trap_table
344 304
345/* 305/*
346 * Syscall interface: 306 * Syscall interface:
@@ -348,17 +308,19 @@ syscall_badsys: ! Bad syscall number
348 * Syscall #: R3 308 * Syscall #: R3
349 * Arguments #0 to #3: R4--R7 309 * Arguments #0 to #3: R4--R7
350 * Arguments #4 to #6: R0, R1, R2 310 * Arguments #4 to #6: R0, R1, R2
351 * TRA: (number of arguments + 0x10) x 4 311 * TRA: (number of arguments + ABI revision) x 4
352 * 312 *
353 * This code also handles delegating other traps to the BIOS/gdb stub 313 * This code also handles delegating other traps to the BIOS/gdb stub
354 * according to: 314 * according to:
355 * 315 *
356 * Trap number 316 * Trap number
357 * (TRA>>2) Purpose 317 * (TRA>>2) Purpose
358 * -------- ------- 318 * -------- -------
359 * 0x0-0xf old syscall ABI 319 * 0x00-0x0f original SH-3/4 syscall ABI (not in general use).
360 * 0x10-0x1f new syscall ABI 320 * 0x10-0x1f general SH-3/4 syscall ABI.
361 * 0x20-0xff delegated through debug_trap to BIOS/gdb stub. 321 * 0x20-0x2f syscall ABI for SH-2 parts.
322 * 0x30-0x3f debug traps used by the kernel.
323 * 0x40-0xff Not supported by all parts, so left unhandled.
362 * 324 *
363 * Note: When we're first called, the TRA value must be shifted 325 * Note: When we're first called, the TRA value must be shifted
364 * right 2 bits in order to get the value that was used as the "trapa" 326 * right 2 bits in order to get the value that was used as the "trapa"
@@ -375,17 +337,22 @@ ret_from_fork:
375 nop 337 nop
376 .align 2 338 .align 2
3771: .long schedule_tail 3391: .long schedule_tail
378 ! 340
341/*
342 * The poorly named main trapa decode and dispatch routine, for
343 * system calls and debug traps through their respective jump tables.
344 */
379ENTRY(system_call) 345ENTRY(system_call)
380#if !defined(CONFIG_CPU_SH2) 346#if !defined(CONFIG_CPU_SH2)
381 mov.l 1f, r9 347 mov.l 1f, r9
382 mov.l @r9, r8 ! Read from TRA (Trap Address) Register 348 mov.l @r9, r8 ! Read from TRA (Trap Address) Register
383#endif 349#endif
384 ! 350 /*
385 ! Is the trap argument >= 0x20? (TRA will be >= 0x80) 351 * Check the trap type
386 mov #0x7f, r9 352 */
353 mov #((0x20 << 2) - 1), r9
387 cmp/hi r9, r8 354 cmp/hi r9, r8
388 bt/s not_syscall_tra 355 bt/s debug_trap ! it's a debug trap..
389 mov #OFF_TRA, r9 356 mov #OFF_TRA, r9
390 add r15, r9 357 add r15, r9
391 mov.l r8, @r9 ! set TRA value to tra 358 mov.l r8, @r9 ! set TRA value to tra
diff --git a/arch/sh/kernel/io_generic.c b/arch/sh/kernel/io_generic.c
index 28ec7487de8c..66626c03e1ee 100644
--- a/arch/sh/kernel/io_generic.c
+++ b/arch/sh/kernel/io_generic.c
@@ -1,9 +1,8 @@
1/* $Id: io_generic.c,v 1.2 2003/05/04 19:29:53 lethal Exp $ 1/*
2 * 2 * arch/sh/kernel/io_generic.c
3 * linux/arch/sh/kernel/io_generic.c
4 * 3 *
5 * Copyright (C) 2000 Niibe Yutaka 4 * Copyright (C) 2000 Niibe Yutaka
6 * Copyright (C) 2005 Paul Mundt 5 * Copyright (C) 2005 - 2007 Paul Mundt
7 * 6 *
8 * Generic I/O routine. These can be used where a machine specific version 7 * Generic I/O routine. These can be used where a machine specific version
9 * is not required. 8 * is not required.
@@ -13,8 +12,9 @@
13 * for more details. 12 * for more details.
14 */ 13 */
15#include <linux/module.h> 14#include <linux/module.h>
16#include <asm/io.h> 15#include <linux/io.h>
17#include <asm/machvec.h> 16#include <asm/machvec.h>
17#include <asm/cacheflush.h>
18 18
19#ifdef CONFIG_CPU_SH3 19#ifdef CONFIG_CPU_SH3
20/* SH3 has a PCMCIA bug that needs a dummy read from area 6 for a 20/* SH3 has a PCMCIA bug that needs a dummy read from area 6 for a
@@ -96,6 +96,7 @@ void generic_insw(unsigned long port, void *dst, unsigned long count)
96 while (count--) 96 while (count--)
97 *buf++ = *port_addr; 97 *buf++ = *port_addr;
98 98
99 flush_dcache_all();
99 dummy_read(); 100 dummy_read();
100} 101}
101 102
@@ -170,6 +171,7 @@ void generic_outsw(unsigned long port, const void *src, unsigned long count)
170 while (count--) 171 while (count--)
171 *port_addr = *buf++; 172 *port_addr = *buf++;
172 173
174 flush_dcache_all();
173 dummy_read(); 175 dummy_read();
174} 176}
175 177
diff --git a/arch/sh/kernel/kgdb_stub.c b/arch/sh/kernel/kgdb_stub.c
index 9c6315f0335d..d8927d85492e 100644
--- a/arch/sh/kernel/kgdb_stub.c
+++ b/arch/sh/kernel/kgdb_stub.c
@@ -1323,8 +1323,11 @@ static void kgdb_command_loop(const int excep_code, const int trapa_value)
1323} 1323}
1324 1324
1325/* There has been an exception, most likely a breakpoint. */ 1325/* There has been an exception, most likely a breakpoint. */
1326void kgdb_handle_exception(struct pt_regs *regs) 1326asmlinkage void kgdb_handle_exception(unsigned long r4, unsigned long r5,
1327 unsigned long r6, unsigned long r7,
1328 struct pt_regs __regs)
1327{ 1329{
1330 struct pt_regs *regs = RELOC_HIDE(&__regs, 0);
1328 int excep_code, vbr_val; 1331 int excep_code, vbr_val;
1329 int count; 1332 int count;
1330 int trapa_value = ctrl_inl(TRA); 1333 int trapa_value = ctrl_inl(TRA);
@@ -1368,8 +1371,6 @@ void kgdb_handle_exception(struct pt_regs *regs)
1368 1371
1369 vbr_val = trap_registers.vbr; 1372 vbr_val = trap_registers.vbr;
1370 asm("ldc %0, vbr": :"r"(vbr_val)); 1373 asm("ldc %0, vbr": :"r"(vbr_val));
1371
1372 return;
1373} 1374}
1374 1375
1375/* Trigger a breakpoint by function */ 1376/* Trigger a breakpoint by function */
diff --git a/arch/sh/kernel/process.c b/arch/sh/kernel/process.c
index 486c06e18033..9d6a438b3eaf 100644
--- a/arch/sh/kernel/process.c
+++ b/arch/sh/kernel/process.c
@@ -1,42 +1,30 @@
1/* $Id: process.c,v 1.28 2004/05/05 16:54:23 lethal Exp $ 1/*
2 * arch/sh/kernel/process.c
2 * 3 *
3 * linux/arch/sh/kernel/process.c 4 * This file handles the architecture-dependent parts of process handling..
4 * 5 *
5 * Copyright (C) 1995 Linus Torvalds 6 * Copyright (C) 1995 Linus Torvalds
6 * 7 *
7 * SuperH version: Copyright (C) 1999, 2000 Niibe Yutaka & Kaz Kojima 8 * SuperH version: Copyright (C) 1999, 2000 Niibe Yutaka & Kaz Kojima
8 * Copyright (C) 2006 Lineo Solutions Inc. support SH4A UBC 9 * Copyright (C) 2006 Lineo Solutions Inc. support SH4A UBC
10 * Copyright (C) 2002 - 2006 Paul Mundt
9 */ 11 */
10
11/*
12 * This file handles the architecture-dependent parts of process handling..
13 */
14
15#include <linux/module.h> 12#include <linux/module.h>
16#include <linux/unistd.h>
17#include <linux/mm.h> 13#include <linux/mm.h>
18#include <linux/elfcore.h> 14#include <linux/elfcore.h>
19#include <linux/a.out.h>
20#include <linux/slab.h>
21#include <linux/pm.h> 15#include <linux/pm.h>
22#include <linux/ptrace.h>
23#include <linux/kallsyms.h> 16#include <linux/kallsyms.h>
24#include <linux/kexec.h> 17#include <linux/kexec.h>
25
26#include <asm/io.h>
27#include <asm/uaccess.h> 18#include <asm/uaccess.h>
28#include <asm/mmu_context.h> 19#include <asm/mmu_context.h>
29#include <asm/elf.h>
30#include <asm/ubc.h> 20#include <asm/ubc.h>
31 21
32static int hlt_counter=0; 22static int hlt_counter;
33
34int ubc_usercnt = 0; 23int ubc_usercnt = 0;
35 24
36#define HARD_IDLE_TIMEOUT (HZ / 3) 25#define HARD_IDLE_TIMEOUT (HZ / 3)
37 26
38void (*pm_idle)(void); 27void (*pm_idle)(void);
39
40void (*pm_power_off)(void); 28void (*pm_power_off)(void);
41EXPORT_SYMBOL(pm_power_off); 29EXPORT_SYMBOL(pm_power_off);
42 30
@@ -44,14 +32,12 @@ void disable_hlt(void)
44{ 32{
45 hlt_counter++; 33 hlt_counter++;
46} 34}
47
48EXPORT_SYMBOL(disable_hlt); 35EXPORT_SYMBOL(disable_hlt);
49 36
50void enable_hlt(void) 37void enable_hlt(void)
51{ 38{
52 hlt_counter--; 39 hlt_counter--;
53} 40}
54
55EXPORT_SYMBOL(enable_hlt); 41EXPORT_SYMBOL(enable_hlt);
56 42
57void default_idle(void) 43void default_idle(void)
@@ -152,19 +138,21 @@ __asm__(".align 5\n"
152 ".align 2\n\t" 138 ".align 2\n\t"
153 "1:.long do_exit"); 139 "1:.long do_exit");
154 140
141/* Don't use this in BL=1(cli). Or else, CPU resets! */
155int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags) 142int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags)
156{ /* Don't use this in BL=1(cli). Or else, CPU resets! */ 143{
157 struct pt_regs regs; 144 struct pt_regs regs;
158 145
159 memset(&regs, 0, sizeof(regs)); 146 memset(&regs, 0, sizeof(regs));
160 regs.regs[4] = (unsigned long) arg; 147 regs.regs[4] = (unsigned long)arg;
161 regs.regs[5] = (unsigned long) fn; 148 regs.regs[5] = (unsigned long)fn;
162 149
163 regs.pc = (unsigned long) kernel_thread_helper; 150 regs.pc = (unsigned long)kernel_thread_helper;
164 regs.sr = (1 << 30); 151 regs.sr = (1 << 30);
165 152
166 /* Ok, create the new process.. */ 153 /* Ok, create the new process.. */
167 return do_fork(flags | CLONE_VM | CLONE_UNTRACED, 0, &regs, 0, NULL, NULL); 154 return do_fork(flags | CLONE_VM | CLONE_UNTRACED, 0,
155 &regs, 0, NULL, NULL);
168} 156}
169 157
170/* 158/*
@@ -211,21 +199,20 @@ int dump_fpu(struct pt_regs *regs, elf_fpregset_t *fpu)
211 return fpvalid; 199 return fpvalid;
212} 200}
213 201
214/* 202/*
215 * Capture the user space registers if the task is not running (in user space) 203 * Capture the user space registers if the task is not running (in user space)
216 */ 204 */
217int dump_task_regs(struct task_struct *tsk, elf_gregset_t *regs) 205int dump_task_regs(struct task_struct *tsk, elf_gregset_t *regs)
218{ 206{
219 struct pt_regs ptregs; 207 struct pt_regs ptregs;
220 208
221 ptregs = *task_pt_regs(tsk); 209 ptregs = *task_pt_regs(tsk);
222 elf_core_copy_regs(regs, &ptregs); 210 elf_core_copy_regs(regs, &ptregs);
223 211
224 return 1; 212 return 1;
225} 213}
226 214
227int 215int dump_task_fpu(struct task_struct *tsk, elf_fpregset_t *fpu)
228dump_task_fpu (struct task_struct *tsk, elf_fpregset_t *fpu)
229{ 216{
230 int fpvalid = 0; 217 int fpvalid = 0;
231 218
@@ -263,12 +250,14 @@ int copy_thread(int nr, unsigned long clone_flags, unsigned long usp,
263 childregs->regs[15] = usp; 250 childregs->regs[15] = usp;
264 ti->addr_limit = USER_DS; 251 ti->addr_limit = USER_DS;
265 } else { 252 } else {
266 childregs->regs[15] = (unsigned long)task_stack_page(p) + THREAD_SIZE; 253 childregs->regs[15] = (unsigned long)task_stack_page(p) +
254 THREAD_SIZE;
267 ti->addr_limit = KERNEL_DS; 255 ti->addr_limit = KERNEL_DS;
268 } 256 }
269 if (clone_flags & CLONE_SETTLS) { 257
258 if (clone_flags & CLONE_SETTLS)
270 childregs->gbr = childregs->regs[0]; 259 childregs->gbr = childregs->regs[0];
271 } 260
272 childregs->regs[0] = 0; /* Set return value for child */ 261 childregs->regs[0] = 0; /* Set return value for child */
273 262
274 p->thread.sp = (unsigned long) childregs; 263 p->thread.sp = (unsigned long) childregs;
@@ -280,8 +269,7 @@ int copy_thread(int nr, unsigned long clone_flags, unsigned long usp,
280} 269}
281 270
282/* Tracing by user break controller. */ 271/* Tracing by user break controller. */
283static void 272static void ubc_set_tracing(int asid, unsigned long pc)
284ubc_set_tracing(int asid, unsigned long pc)
285{ 273{
286#if defined(CONFIG_CPU_SH4A) 274#if defined(CONFIG_CPU_SH4A)
287 unsigned long val; 275 unsigned long val;
@@ -297,7 +285,7 @@ ubc_set_tracing(int asid, unsigned long pc)
297 val = (UBC_CRR_RES | UBC_CRR_PCB | UBC_CRR_BIE); 285 val = (UBC_CRR_RES | UBC_CRR_PCB | UBC_CRR_BIE);
298 ctrl_outl(val, UBC_CRR0); 286 ctrl_outl(val, UBC_CRR0);
299 287
300 /* Read UBC register that we writed last. For chekking UBC Register changed */ 288 /* Read UBC register that we wrote last, for checking update */
301 val = ctrl_inl(UBC_CRR0); 289 val = ctrl_inl(UBC_CRR0);
302 290
303#else /* CONFIG_CPU_SH4A */ 291#else /* CONFIG_CPU_SH4A */
@@ -305,13 +293,14 @@ ubc_set_tracing(int asid, unsigned long pc)
305 293
306#ifdef CONFIG_MMU 294#ifdef CONFIG_MMU
307 /* We don't have any ASID settings for the SH-2! */ 295 /* We don't have any ASID settings for the SH-2! */
308 if (cpu_data->type != CPU_SH7604) 296 if (current_cpu_data.type != CPU_SH7604)
309 ctrl_outb(asid, UBC_BASRA); 297 ctrl_outb(asid, UBC_BASRA);
310#endif 298#endif
311 299
312 ctrl_outl(0, UBC_BAMRA); 300 ctrl_outl(0, UBC_BAMRA);
313 301
314 if (cpu_data->type == CPU_SH7729 || cpu_data->type == CPU_SH7710) { 302 if (current_cpu_data.type == CPU_SH7729 ||
303 current_cpu_data.type == CPU_SH7710) {
315 ctrl_outw(BBR_INST | BBR_READ | BBR_CPU, UBC_BBRA); 304 ctrl_outw(BBR_INST | BBR_READ | BBR_CPU, UBC_BBRA);
316 ctrl_outl(BRCR_PCBA | BRCR_PCTE, UBC_BRCR); 305 ctrl_outl(BRCR_PCBA | BRCR_PCTE, UBC_BRCR);
317 } else { 306 } else {
@@ -325,7 +314,8 @@ ubc_set_tracing(int asid, unsigned long pc)
325 * switch_to(x,y) should switch tasks from x to y. 314 * switch_to(x,y) should switch tasks from x to y.
326 * 315 *
327 */ 316 */
328struct task_struct *__switch_to(struct task_struct *prev, struct task_struct *next) 317struct task_struct *__switch_to(struct task_struct *prev,
318 struct task_struct *next)
329{ 319{
330#if defined(CONFIG_SH_FPU) 320#if defined(CONFIG_SH_FPU)
331 unlazy_fpu(prev, task_pt_regs(prev)); 321 unlazy_fpu(prev, task_pt_regs(prev));
@@ -354,7 +344,7 @@ struct task_struct *__switch_to(struct task_struct *prev, struct task_struct *ne
354#ifdef CONFIG_MMU 344#ifdef CONFIG_MMU
355 /* 345 /*
356 * Restore the kernel mode register 346 * Restore the kernel mode register
357 * k7 (r7_bank1) 347 * k7 (r7_bank1)
358 */ 348 */
359 asm volatile("ldc %0, r7_bank" 349 asm volatile("ldc %0, r7_bank"
360 : /* no output */ 350 : /* no output */
@@ -367,7 +357,7 @@ struct task_struct *__switch_to(struct task_struct *prev, struct task_struct *ne
367 else if (next->thread.ubc_pc && next->mm) { 357 else if (next->thread.ubc_pc && next->mm) {
368 int asid = 0; 358 int asid = 0;
369#ifdef CONFIG_MMU 359#ifdef CONFIG_MMU
370 asid |= next->mm->context.id & MMU_CONTEXT_ASID_MASK; 360 asid |= cpu_asid(smp_processor_id(), next->mm);
371#endif 361#endif
372 ubc_set_tracing(asid, next->thread.ubc_pc); 362 ubc_set_tracing(asid, next->thread.ubc_pc);
373 } else { 363 } else {
@@ -405,7 +395,8 @@ asmlinkage int sys_clone(unsigned long clone_flags, unsigned long newsp,
405 if (!newsp) 395 if (!newsp)
406 newsp = regs->regs[15]; 396 newsp = regs->regs[15];
407 return do_fork(clone_flags, newsp, regs, 0, 397 return do_fork(clone_flags, newsp, regs, 0,
408 (int __user *)parent_tidptr, (int __user *)child_tidptr); 398 (int __user *)parent_tidptr,
399 (int __user *)child_tidptr);
409} 400}
410 401
411/* 402/*
@@ -493,9 +484,27 @@ asmlinkage void break_point_trap(void)
493 force_sig(SIGTRAP, current); 484 force_sig(SIGTRAP, current);
494} 485}
495 486
496asmlinkage void break_point_trap_software(unsigned long r4, unsigned long r5, 487/*
497 unsigned long r6, unsigned long r7, 488 * Generic trap handler.
498 struct pt_regs __regs) 489 */
490asmlinkage void debug_trap_handler(unsigned long r4, unsigned long r5,
491 unsigned long r6, unsigned long r7,
492 struct pt_regs __regs)
493{
494 struct pt_regs *regs = RELOC_HIDE(&__regs, 0);
495
496 /* Rewind */
497 regs->pc -= 2;
498
499 force_sig(SIGTRAP, current);
500}
501
502/*
503 * Special handler for BUG() traps.
504 */
505asmlinkage void bug_trap_handler(unsigned long r4, unsigned long r5,
506 unsigned long r6, unsigned long r7,
507 struct pt_regs __regs)
499{ 508{
500 struct pt_regs *regs = RELOC_HIDE(&__regs, 0); 509 struct pt_regs *regs = RELOC_HIDE(&__regs, 0);
501 510
diff --git a/arch/sh/kernel/setup.c b/arch/sh/kernel/setup.c
index d6b817aa568f..98802ab28211 100644
--- a/arch/sh/kernel/setup.c
+++ b/arch/sh/kernel/setup.c
@@ -1,14 +1,11 @@
1/* 1/*
2 * linux/arch/sh/kernel/setup.c 2 * arch/sh/kernel/setup.c
3 * 3 *
4 * Copyright (C) 1999 Niibe Yutaka
5 * Copyright (C) 2002, 2003 Paul Mundt
6 */
7
8/*
9 * This file handles the architecture-dependent parts of initialization 4 * This file handles the architecture-dependent parts of initialization
5 *
6 * Copyright (C) 1999 Niibe Yutaka
7 * Copyright (C) 2002 - 2006 Paul Mundt
10 */ 8 */
11
12#include <linux/screen_info.h> 9#include <linux/screen_info.h>
13#include <linux/ioport.h> 10#include <linux/ioport.h>
14#include <linux/init.h> 11#include <linux/init.h>
@@ -395,9 +392,9 @@ static const char *cpu_name[] = {
395 [CPU_SH_NONE] = "Unknown" 392 [CPU_SH_NONE] = "Unknown"
396}; 393};
397 394
398const char *get_cpu_subtype(void) 395const char *get_cpu_subtype(struct sh_cpuinfo *c)
399{ 396{
400 return cpu_name[boot_cpu_data.type]; 397 return cpu_name[c->type];
401} 398}
402 399
403#ifdef CONFIG_PROC_FS 400#ifdef CONFIG_PROC_FS
@@ -407,19 +404,19 @@ static const char *cpu_flags[] = {
407 "ptea", "llsc", "l2", NULL 404 "ptea", "llsc", "l2", NULL
408}; 405};
409 406
410static void show_cpuflags(struct seq_file *m) 407static void show_cpuflags(struct seq_file *m, struct sh_cpuinfo *c)
411{ 408{
412 unsigned long i; 409 unsigned long i;
413 410
414 seq_printf(m, "cpu flags\t:"); 411 seq_printf(m, "cpu flags\t:");
415 412
416 if (!cpu_data->flags) { 413 if (!c->flags) {
417 seq_printf(m, " %s\n", cpu_flags[0]); 414 seq_printf(m, " %s\n", cpu_flags[0]);
418 return; 415 return;
419 } 416 }
420 417
421 for (i = 0; cpu_flags[i]; i++) 418 for (i = 0; cpu_flags[i]; i++)
422 if ((cpu_data->flags & (1 << i))) 419 if ((c->flags & (1 << i)))
423 seq_printf(m, " %s", cpu_flags[i+1]); 420 seq_printf(m, " %s", cpu_flags[i+1]);
424 421
425 seq_printf(m, "\n"); 422 seq_printf(m, "\n");
@@ -441,16 +438,20 @@ static void show_cacheinfo(struct seq_file *m, const char *type,
441 */ 438 */
442static int show_cpuinfo(struct seq_file *m, void *v) 439static int show_cpuinfo(struct seq_file *m, void *v)
443{ 440{
444 unsigned int cpu = smp_processor_id(); 441 struct sh_cpuinfo *c = v;
442 unsigned int cpu = c - cpu_data;
443
444 if (!cpu_online(cpu))
445 return 0;
445 446
446 if (!cpu && cpu_online(cpu)) 447 if (cpu == 0)
447 seq_printf(m, "machine\t\t: %s\n", get_system_type()); 448 seq_printf(m, "machine\t\t: %s\n", get_system_type());
448 449
449 seq_printf(m, "processor\t: %d\n", cpu); 450 seq_printf(m, "processor\t: %d\n", cpu);
450 seq_printf(m, "cpu family\t: %s\n", init_utsname()->machine); 451 seq_printf(m, "cpu family\t: %s\n", init_utsname()->machine);
451 seq_printf(m, "cpu type\t: %s\n", get_cpu_subtype()); 452 seq_printf(m, "cpu type\t: %s\n", get_cpu_subtype(c));
452 453
453 show_cpuflags(m); 454 show_cpuflags(m, c);
454 455
455 seq_printf(m, "cache type\t: "); 456 seq_printf(m, "cache type\t: ");
456 457
@@ -459,22 +460,22 @@ static int show_cpuinfo(struct seq_file *m, void *v)
459 * unified cache on the SH-2 and SH-3, as well as the harvard 460 * unified cache on the SH-2 and SH-3, as well as the harvard
460 * style cache on the SH-4. 461 * style cache on the SH-4.
461 */ 462 */
462 if (boot_cpu_data.icache.flags & SH_CACHE_COMBINED) { 463 if (c->icache.flags & SH_CACHE_COMBINED) {
463 seq_printf(m, "unified\n"); 464 seq_printf(m, "unified\n");
464 show_cacheinfo(m, "cache", boot_cpu_data.icache); 465 show_cacheinfo(m, "cache", c->icache);
465 } else { 466 } else {
466 seq_printf(m, "split (harvard)\n"); 467 seq_printf(m, "split (harvard)\n");
467 show_cacheinfo(m, "icache", boot_cpu_data.icache); 468 show_cacheinfo(m, "icache", c->icache);
468 show_cacheinfo(m, "dcache", boot_cpu_data.dcache); 469 show_cacheinfo(m, "dcache", c->dcache);
469 } 470 }
470 471
471 /* Optional secondary cache */ 472 /* Optional secondary cache */
472 if (boot_cpu_data.flags & CPU_HAS_L2_CACHE) 473 if (c->flags & CPU_HAS_L2_CACHE)
473 show_cacheinfo(m, "scache", boot_cpu_data.scache); 474 show_cacheinfo(m, "scache", c->scache);
474 475
475 seq_printf(m, "bogomips\t: %lu.%02lu\n", 476 seq_printf(m, "bogomips\t: %lu.%02lu\n",
476 boot_cpu_data.loops_per_jiffy/(500000/HZ), 477 c->loops_per_jiffy/(500000/HZ),
477 (boot_cpu_data.loops_per_jiffy/(5000/HZ)) % 100); 478 (c->loops_per_jiffy/(5000/HZ)) % 100);
478 479
479 return show_clocks(m); 480 return show_clocks(m);
480} 481}
diff --git a/arch/sh/kernel/sh_ksyms.c b/arch/sh/kernel/sh_ksyms.c
index e6106239a0fe..fe1b276c97c6 100644
--- a/arch/sh/kernel/sh_ksyms.c
+++ b/arch/sh/kernel/sh_ksyms.c
@@ -105,7 +105,6 @@ EXPORT_SYMBOL(__flush_purge_region);
105EXPORT_SYMBOL(clear_user_page); 105EXPORT_SYMBOL(clear_user_page);
106#endif 106#endif
107 107
108EXPORT_SYMBOL(flush_tlb_page);
109EXPORT_SYMBOL(__down_trylock); 108EXPORT_SYMBOL(__down_trylock);
110 109
111#ifdef CONFIG_SMP 110#ifdef CONFIG_SMP
diff --git a/arch/sh/kernel/signal.c b/arch/sh/kernel/signal.c
index 379c88bf5d9a..32f10a03fbb5 100644
--- a/arch/sh/kernel/signal.c
+++ b/arch/sh/kernel/signal.c
@@ -127,7 +127,7 @@ static inline int restore_sigcontext_fpu(struct sigcontext __user *sc)
127{ 127{
128 struct task_struct *tsk = current; 128 struct task_struct *tsk = current;
129 129
130 if (!(cpu_data->flags & CPU_HAS_FPU)) 130 if (!(current_cpu_data.flags & CPU_HAS_FPU))
131 return 0; 131 return 0;
132 132
133 set_used_math(); 133 set_used_math();
@@ -140,7 +140,7 @@ static inline int save_sigcontext_fpu(struct sigcontext __user *sc,
140{ 140{
141 struct task_struct *tsk = current; 141 struct task_struct *tsk = current;
142 142
143 if (!(cpu_data->flags & CPU_HAS_FPU)) 143 if (!(current_cpu_data.flags & CPU_HAS_FPU))
144 return 0; 144 return 0;
145 145
146 if (!used_math()) { 146 if (!used_math()) {
@@ -181,7 +181,7 @@ restore_sigcontext(struct pt_regs *regs, struct sigcontext __user *sc, int *r0_p
181#undef COPY 181#undef COPY
182 182
183#ifdef CONFIG_SH_FPU 183#ifdef CONFIG_SH_FPU
184 if (cpu_data->flags & CPU_HAS_FPU) { 184 if (current_cpu_data.flags & CPU_HAS_FPU) {
185 int owned_fp; 185 int owned_fp;
186 struct task_struct *tsk = current; 186 struct task_struct *tsk = current;
187 187
diff --git a/arch/sh/kernel/syscalls.S b/arch/sh/kernel/syscalls.S
index ca81976e9e34..38fc8cd3ea3a 100644
--- a/arch/sh/kernel/syscalls.S
+++ b/arch/sh/kernel/syscalls.S
@@ -319,15 +319,15 @@ ENTRY(sys_call_table)
319 .long sys_mq_getsetattr 319 .long sys_mq_getsetattr
320 .long sys_kexec_load 320 .long sys_kexec_load
321 .long sys_waitid 321 .long sys_waitid
322 .long sys_ni_syscall /* 285 */ 322 .long sys_add_key /* 285 */
323 .long sys_add_key
324 .long sys_request_key 323 .long sys_request_key
325 .long sys_keyctl 324 .long sys_keyctl
326 .long sys_ioprio_set 325 .long sys_ioprio_set
327 .long sys_ioprio_get /* 290 */ 326 .long sys_ioprio_get
328 .long sys_inotify_init 327 .long sys_inotify_init /* 290 */
329 .long sys_inotify_add_watch 328 .long sys_inotify_add_watch
330 .long sys_inotify_rm_watch 329 .long sys_inotify_rm_watch
330 .long sys_ni_syscall
331 .long sys_migrate_pages 331 .long sys_migrate_pages
332 .long sys_openat /* 295 */ 332 .long sys_openat /* 295 */
333 .long sys_mkdirat 333 .long sys_mkdirat
diff --git a/arch/sh/kernel/traps.c b/arch/sh/kernel/traps.c
index ec110157992d..e9f168f60f95 100644
--- a/arch/sh/kernel/traps.c
+++ b/arch/sh/kernel/traps.c
@@ -156,13 +156,13 @@ static inline void do_bug_verbose(struct pt_regs *regs)
156{ 156{
157} 157}
158#endif /* CONFIG_DEBUG_BUGVERBOSE */ 158#endif /* CONFIG_DEBUG_BUGVERBOSE */
159#endif /* CONFIG_BUG */
160 159
161void handle_BUG(struct pt_regs *regs) 160void handle_BUG(struct pt_regs *regs)
162{ 161{
163 do_bug_verbose(regs); 162 do_bug_verbose(regs);
164 die("Kernel BUG", regs, TRAPA_BUG_OPCODE & 0xff); 163 die("Kernel BUG", regs, TRAPA_BUG_OPCODE & 0xff);
165} 164}
165#endif /* CONFIG_BUG */
166 166
167/* 167/*
168 * handle an instruction that does an unaligned memory access by emulating the 168 * handle an instruction that does an unaligned memory access by emulating the
@@ -641,7 +641,7 @@ int is_dsp_inst(struct pt_regs *regs)
641 * Safe guard if DSP mode is already enabled or we're lacking 641 * Safe guard if DSP mode is already enabled or we're lacking
642 * the DSP altogether. 642 * the DSP altogether.
643 */ 643 */
644 if (!(cpu_data->flags & CPU_HAS_DSP) || (regs->sr & SR_DSP)) 644 if (!(current_cpu_data.flags & CPU_HAS_DSP) || (regs->sr & SR_DSP))
645 return 0; 645 return 0;
646 646
647 get_user(inst, ((unsigned short *) regs->pc)); 647 get_user(inst, ((unsigned short *) regs->pc));
diff --git a/arch/sh/mm/Kconfig b/arch/sh/mm/Kconfig
index 29f4ee35c6dc..6b0d28ac9241 100644
--- a/arch/sh/mm/Kconfig
+++ b/arch/sh/mm/Kconfig
@@ -20,7 +20,7 @@ config CPU_SH4
20 bool 20 bool
21 select CPU_HAS_INTEVT 21 select CPU_HAS_INTEVT
22 select CPU_HAS_SR_RB 22 select CPU_HAS_SR_RB
23 select CPU_HAS_PTEA if !CPU_SUBTYPE_ST40 23 select CPU_HAS_PTEA if (!CPU_SUBTYPE_ST40 && !CPU_SH4A) || CPU_SHX2
24 24
25config CPU_SH4A 25config CPU_SH4A
26 bool 26 bool
@@ -72,6 +72,7 @@ config CPU_SUBTYPE_SH7705
72config CPU_SUBTYPE_SH7706 72config CPU_SUBTYPE_SH7706
73 bool "Support SH7706 processor" 73 bool "Support SH7706 processor"
74 select CPU_SH3 74 select CPU_SH3
75 select CPU_HAS_IPR_IRQ
75 help 76 help
76 Select SH7706 if you have a 133 Mhz SH-3 HD6417706 CPU. 77 Select SH7706 if you have a 133 Mhz SH-3 HD6417706 CPU.
77 78
@@ -92,6 +93,7 @@ config CPU_SUBTYPE_SH7708
92config CPU_SUBTYPE_SH7709 93config CPU_SUBTYPE_SH7709
93 bool "Support SH7709 processor" 94 bool "Support SH7709 processor"
94 select CPU_SH3 95 select CPU_SH3
96 select CPU_HAS_IPR_IRQ
95 select CPU_HAS_PINT_IRQ 97 select CPU_HAS_PINT_IRQ
96 help 98 help
97 Select SH7709 if you have a 80 Mhz SH-3 HD6417709 CPU. 99 Select SH7709 if you have a 80 Mhz SH-3 HD6417709 CPU.
@@ -149,6 +151,7 @@ config CPU_SUBTYPE_SH7760
149 bool "Support SH7760 processor" 151 bool "Support SH7760 processor"
150 select CPU_SH4 152 select CPU_SH4
151 select CPU_HAS_INTC2_IRQ 153 select CPU_HAS_INTC2_IRQ
154 select CPU_HAS_IPR_IRQ
152 155
153config CPU_SUBTYPE_SH4_202 156config CPU_SUBTYPE_SH4_202
154 bool "Support SH4-202 processor" 157 bool "Support SH4-202 processor"
diff --git a/arch/sh/mm/cache-debugfs.c b/arch/sh/mm/cache-debugfs.c
index 909dcfa8c8c6..de6d2c9aa477 100644
--- a/arch/sh/mm/cache-debugfs.c
+++ b/arch/sh/mm/cache-debugfs.c
@@ -46,10 +46,10 @@ static int cache_seq_show(struct seq_file *file, void *iter)
46 46
47 if (cache_type == CACHE_TYPE_DCACHE) { 47 if (cache_type == CACHE_TYPE_DCACHE) {
48 base = CACHE_OC_ADDRESS_ARRAY; 48 base = CACHE_OC_ADDRESS_ARRAY;
49 cache = &cpu_data->dcache; 49 cache = &current_cpu_data.dcache;
50 } else { 50 } else {
51 base = CACHE_IC_ADDRESS_ARRAY; 51 base = CACHE_IC_ADDRESS_ARRAY;
52 cache = &cpu_data->icache; 52 cache = &current_cpu_data.icache;
53 } 53 }
54 54
55 /* 55 /*
diff --git a/arch/sh/mm/cache-sh3.c b/arch/sh/mm/cache-sh3.c
index 838731fc608d..6d1dbec08ad4 100644
--- a/arch/sh/mm/cache-sh3.c
+++ b/arch/sh/mm/cache-sh3.c
@@ -44,11 +44,11 @@ void __flush_wback_region(void *start, int size)
44 44
45 for (v = begin; v < end; v+=L1_CACHE_BYTES) { 45 for (v = begin; v < end; v+=L1_CACHE_BYTES) {
46 unsigned long addrstart = CACHE_OC_ADDRESS_ARRAY; 46 unsigned long addrstart = CACHE_OC_ADDRESS_ARRAY;
47 for (j = 0; j < cpu_data->dcache.ways; j++) { 47 for (j = 0; j < current_cpu_data.dcache.ways; j++) {
48 unsigned long data, addr, p; 48 unsigned long data, addr, p;
49 49
50 p = __pa(v); 50 p = __pa(v);
51 addr = addrstart | (v & cpu_data->dcache.entry_mask); 51 addr = addrstart | (v & current_cpu_data.dcache.entry_mask);
52 local_irq_save(flags); 52 local_irq_save(flags);
53 data = ctrl_inl(addr); 53 data = ctrl_inl(addr);
54 54
@@ -60,7 +60,7 @@ void __flush_wback_region(void *start, int size)
60 break; 60 break;
61 } 61 }
62 local_irq_restore(flags); 62 local_irq_restore(flags);
63 addrstart += cpu_data->dcache.way_incr; 63 addrstart += current_cpu_data.dcache.way_incr;
64 } 64 }
65 } 65 }
66} 66}
@@ -85,7 +85,7 @@ void __flush_purge_region(void *start, int size)
85 85
86 data = (v & 0xfffffc00); /* _Virtual_ address, ~U, ~V */ 86 data = (v & 0xfffffc00); /* _Virtual_ address, ~U, ~V */
87 addr = CACHE_OC_ADDRESS_ARRAY | 87 addr = CACHE_OC_ADDRESS_ARRAY |
88 (v & cpu_data->dcache.entry_mask) | SH_CACHE_ASSOC; 88 (v & current_cpu_data.dcache.entry_mask) | SH_CACHE_ASSOC;
89 ctrl_outl(data, addr); 89 ctrl_outl(data, addr);
90 } 90 }
91} 91}
diff --git a/arch/sh/mm/cache-sh4.c b/arch/sh/mm/cache-sh4.c
index c6955157c989..e0cd4b7f4aeb 100644
--- a/arch/sh/mm/cache-sh4.c
+++ b/arch/sh/mm/cache-sh4.c
@@ -54,21 +54,21 @@ static void __init emit_cache_params(void)
54 ctrl_inl(CCN_CVR), 54 ctrl_inl(CCN_CVR),
55 ctrl_inl(CCN_PRR)); 55 ctrl_inl(CCN_PRR));
56 printk("I-cache : n_ways=%d n_sets=%d way_incr=%d\n", 56 printk("I-cache : n_ways=%d n_sets=%d way_incr=%d\n",
57 cpu_data->icache.ways, 57 current_cpu_data.icache.ways,
58 cpu_data->icache.sets, 58 current_cpu_data.icache.sets,
59 cpu_data->icache.way_incr); 59 current_cpu_data.icache.way_incr);
60 printk("I-cache : entry_mask=0x%08x alias_mask=0x%08x n_aliases=%d\n", 60 printk("I-cache : entry_mask=0x%08x alias_mask=0x%08x n_aliases=%d\n",
61 cpu_data->icache.entry_mask, 61 current_cpu_data.icache.entry_mask,
62 cpu_data->icache.alias_mask, 62 current_cpu_data.icache.alias_mask,
63 cpu_data->icache.n_aliases); 63 current_cpu_data.icache.n_aliases);
64 printk("D-cache : n_ways=%d n_sets=%d way_incr=%d\n", 64 printk("D-cache : n_ways=%d n_sets=%d way_incr=%d\n",
65 cpu_data->dcache.ways, 65 current_cpu_data.dcache.ways,
66 cpu_data->dcache.sets, 66 current_cpu_data.dcache.sets,
67 cpu_data->dcache.way_incr); 67 current_cpu_data.dcache.way_incr);
68 printk("D-cache : entry_mask=0x%08x alias_mask=0x%08x n_aliases=%d\n", 68 printk("D-cache : entry_mask=0x%08x alias_mask=0x%08x n_aliases=%d\n",
69 cpu_data->dcache.entry_mask, 69 current_cpu_data.dcache.entry_mask,
70 cpu_data->dcache.alias_mask, 70 current_cpu_data.dcache.alias_mask,
71 cpu_data->dcache.n_aliases); 71 current_cpu_data.dcache.n_aliases);
72 72
73 if (!__flush_dcache_segment_fn) 73 if (!__flush_dcache_segment_fn)
74 panic("unknown number of cache ways\n"); 74 panic("unknown number of cache ways\n");
@@ -87,10 +87,10 @@ void __init p3_cache_init(void)
87{ 87{
88 int i; 88 int i;
89 89
90 compute_alias(&cpu_data->icache); 90 compute_alias(&current_cpu_data.icache);
91 compute_alias(&cpu_data->dcache); 91 compute_alias(&current_cpu_data.dcache);
92 92
93 switch (cpu_data->dcache.ways) { 93 switch (current_cpu_data.dcache.ways) {
94 case 1: 94 case 1:
95 __flush_dcache_segment_fn = __flush_dcache_segment_1way; 95 __flush_dcache_segment_fn = __flush_dcache_segment_1way;
96 break; 96 break;
@@ -110,7 +110,7 @@ void __init p3_cache_init(void)
110 if (ioremap_page_range(P3SEG, P3SEG + (PAGE_SIZE * 4), 0, PAGE_KERNEL)) 110 if (ioremap_page_range(P3SEG, P3SEG + (PAGE_SIZE * 4), 0, PAGE_KERNEL))
111 panic("%s failed.", __FUNCTION__); 111 panic("%s failed.", __FUNCTION__);
112 112
113 for (i = 0; i < cpu_data->dcache.n_aliases; i++) 113 for (i = 0; i < current_cpu_data.dcache.n_aliases; i++)
114 mutex_init(&p3map_mutex[i]); 114 mutex_init(&p3map_mutex[i]);
115} 115}
116 116
@@ -200,13 +200,14 @@ void flush_cache_sigtramp(unsigned long addr)
200 : /* no output */ 200 : /* no output */
201 : "m" (__m(v))); 201 : "m" (__m(v)));
202 202
203 index = CACHE_IC_ADDRESS_ARRAY | (v & cpu_data->icache.entry_mask); 203 index = CACHE_IC_ADDRESS_ARRAY |
204 (v & current_cpu_data.icache.entry_mask);
204 205
205 local_irq_save(flags); 206 local_irq_save(flags);
206 jump_to_P2(); 207 jump_to_P2();
207 208
208 for (i = 0; i < cpu_data->icache.ways; 209 for (i = 0; i < current_cpu_data.icache.ways;
209 i++, index += cpu_data->icache.way_incr) 210 i++, index += current_cpu_data.icache.way_incr)
210 ctrl_outl(0, index); /* Clear out Valid-bit */ 211 ctrl_outl(0, index); /* Clear out Valid-bit */
211 212
212 back_to_P1(); 213 back_to_P1();
@@ -223,7 +224,7 @@ static inline void flush_cache_4096(unsigned long start,
223 * All types of SH-4 require PC to be in P2 to operate on the I-cache. 224 * All types of SH-4 require PC to be in P2 to operate on the I-cache.
224 * Some types of SH-4 require PC to be in P2 to operate on the D-cache. 225 * Some types of SH-4 require PC to be in P2 to operate on the D-cache.
225 */ 226 */
226 if ((cpu_data->flags & CPU_HAS_P2_FLUSH_BUG) || 227 if ((current_cpu_data.flags & CPU_HAS_P2_FLUSH_BUG) ||
227 (start < CACHE_OC_ADDRESS_ARRAY)) 228 (start < CACHE_OC_ADDRESS_ARRAY))
228 exec_offset = 0x20000000; 229 exec_offset = 0x20000000;
229 230
@@ -236,16 +237,26 @@ static inline void flush_cache_4096(unsigned long start,
236/* 237/*
237 * Write back & invalidate the D-cache of the page. 238 * Write back & invalidate the D-cache of the page.
238 * (To avoid "alias" issues) 239 * (To avoid "alias" issues)
240 *
241 * This uses a lazy write-back on UP, which is explicitly
242 * disabled on SMP.
239 */ 243 */
240void flush_dcache_page(struct page *page) 244void flush_dcache_page(struct page *page)
241{ 245{
242 if (test_bit(PG_mapped, &page->flags)) { 246#ifndef CONFIG_SMP
247 struct address_space *mapping = page_mapping(page);
248
249 if (mapping && !mapping_mapped(mapping))
250 set_bit(PG_dcache_dirty, &page->flags);
251 else
252#endif
253 {
243 unsigned long phys = PHYSADDR(page_address(page)); 254 unsigned long phys = PHYSADDR(page_address(page));
244 unsigned long addr = CACHE_OC_ADDRESS_ARRAY; 255 unsigned long addr = CACHE_OC_ADDRESS_ARRAY;
245 int i, n; 256 int i, n;
246 257
247 /* Loop all the D-cache */ 258 /* Loop all the D-cache */
248 n = cpu_data->dcache.n_aliases; 259 n = current_cpu_data.dcache.n_aliases;
249 for (i = 0; i < n; i++, addr += 4096) 260 for (i = 0; i < n; i++, addr += 4096)
250 flush_cache_4096(addr, phys); 261 flush_cache_4096(addr, phys);
251 } 262 }
@@ -277,7 +288,7 @@ static inline void flush_icache_all(void)
277 288
278void flush_dcache_all(void) 289void flush_dcache_all(void)
279{ 290{
280 (*__flush_dcache_segment_fn)(0UL, cpu_data->dcache.way_size); 291 (*__flush_dcache_segment_fn)(0UL, current_cpu_data.dcache.way_size);
281 wmb(); 292 wmb();
282} 293}
283 294
@@ -291,8 +302,8 @@ static void __flush_cache_mm(struct mm_struct *mm, unsigned long start,
291 unsigned long end) 302 unsigned long end)
292{ 303{
293 unsigned long d = 0, p = start & PAGE_MASK; 304 unsigned long d = 0, p = start & PAGE_MASK;
294 unsigned long alias_mask = cpu_data->dcache.alias_mask; 305 unsigned long alias_mask = current_cpu_data.dcache.alias_mask;
295 unsigned long n_aliases = cpu_data->dcache.n_aliases; 306 unsigned long n_aliases = current_cpu_data.dcache.n_aliases;
296 unsigned long select_bit; 307 unsigned long select_bit;
297 unsigned long all_aliases_mask; 308 unsigned long all_aliases_mask;
298 unsigned long addr_offset; 309 unsigned long addr_offset;
@@ -379,7 +390,7 @@ void flush_cache_mm(struct mm_struct *mm)
379 * If cache is only 4k-per-way, there are never any 'aliases'. Since 390 * If cache is only 4k-per-way, there are never any 'aliases'. Since
380 * the cache is physically tagged, the data can just be left in there. 391 * the cache is physically tagged, the data can just be left in there.
381 */ 392 */
382 if (cpu_data->dcache.n_aliases == 0) 393 if (current_cpu_data.dcache.n_aliases == 0)
383 return; 394 return;
384 395
385 /* 396 /*
@@ -416,7 +427,7 @@ void flush_cache_page(struct vm_area_struct *vma, unsigned long address,
416 unsigned long phys = pfn << PAGE_SHIFT; 427 unsigned long phys = pfn << PAGE_SHIFT;
417 unsigned int alias_mask; 428 unsigned int alias_mask;
418 429
419 alias_mask = cpu_data->dcache.alias_mask; 430 alias_mask = current_cpu_data.dcache.alias_mask;
420 431
421 /* We only need to flush D-cache when we have alias */ 432 /* We only need to flush D-cache when we have alias */
422 if ((address^phys) & alias_mask) { 433 if ((address^phys) & alias_mask) {
@@ -430,7 +441,7 @@ void flush_cache_page(struct vm_area_struct *vma, unsigned long address,
430 phys); 441 phys);
431 } 442 }
432 443
433 alias_mask = cpu_data->icache.alias_mask; 444 alias_mask = current_cpu_data.icache.alias_mask;
434 if (vma->vm_flags & VM_EXEC) { 445 if (vma->vm_flags & VM_EXEC) {
435 /* 446 /*
436 * Evict entries from the portion of the cache from which code 447 * Evict entries from the portion of the cache from which code
@@ -462,7 +473,7 @@ void flush_cache_range(struct vm_area_struct *vma, unsigned long start,
462 * If cache is only 4k-per-way, there are never any 'aliases'. Since 473 * If cache is only 4k-per-way, there are never any 'aliases'. Since
463 * the cache is physically tagged, the data can just be left in there. 474 * the cache is physically tagged, the data can just be left in there.
464 */ 475 */
465 if (cpu_data->dcache.n_aliases == 0) 476 if (current_cpu_data.dcache.n_aliases == 0)
466 return; 477 return;
467 478
468 /* 479 /*
@@ -523,7 +534,7 @@ static void __flush_cache_4096(unsigned long addr, unsigned long phys,
523 unsigned long a, ea, p; 534 unsigned long a, ea, p;
524 unsigned long temp_pc; 535 unsigned long temp_pc;
525 536
526 dcache = &cpu_data->dcache; 537 dcache = &current_cpu_data.dcache;
527 /* Write this way for better assembly. */ 538 /* Write this way for better assembly. */
528 way_count = dcache->ways; 539 way_count = dcache->ways;
529 way_incr = dcache->way_incr; 540 way_incr = dcache->way_incr;
@@ -598,7 +609,7 @@ static void __flush_dcache_segment_1way(unsigned long start,
598 base_addr = ((base_addr >> 16) << 16); 609 base_addr = ((base_addr >> 16) << 16);
599 base_addr |= start; 610 base_addr |= start;
600 611
601 dcache = &cpu_data->dcache; 612 dcache = &current_cpu_data.dcache;
602 linesz = dcache->linesz; 613 linesz = dcache->linesz;
603 way_incr = dcache->way_incr; 614 way_incr = dcache->way_incr;
604 way_size = dcache->way_size; 615 way_size = dcache->way_size;
@@ -640,7 +651,7 @@ static void __flush_dcache_segment_2way(unsigned long start,
640 base_addr = ((base_addr >> 16) << 16); 651 base_addr = ((base_addr >> 16) << 16);
641 base_addr |= start; 652 base_addr |= start;
642 653
643 dcache = &cpu_data->dcache; 654 dcache = &current_cpu_data.dcache;
644 linesz = dcache->linesz; 655 linesz = dcache->linesz;
645 way_incr = dcache->way_incr; 656 way_incr = dcache->way_incr;
646 way_size = dcache->way_size; 657 way_size = dcache->way_size;
@@ -699,7 +710,7 @@ static void __flush_dcache_segment_4way(unsigned long start,
699 base_addr = ((base_addr >> 16) << 16); 710 base_addr = ((base_addr >> 16) << 16);
700 base_addr |= start; 711 base_addr |= start;
701 712
702 dcache = &cpu_data->dcache; 713 dcache = &current_cpu_data.dcache;
703 linesz = dcache->linesz; 714 linesz = dcache->linesz;
704 way_incr = dcache->way_incr; 715 way_incr = dcache->way_incr;
705 way_size = dcache->way_size; 716 way_size = dcache->way_size;
diff --git a/arch/sh/mm/cache-sh7705.c b/arch/sh/mm/cache-sh7705.c
index 045abdf078f5..31f8deb7a158 100644
--- a/arch/sh/mm/cache-sh7705.c
+++ b/arch/sh/mm/cache-sh7705.c
@@ -3,11 +3,11 @@
3 * 3 *
4 * Copyright (C) 1999, 2000 Niibe Yutaka 4 * Copyright (C) 1999, 2000 Niibe Yutaka
5 * Copyright (C) 2004 Alex Song 5 * Copyright (C) 2004 Alex Song
6 * Copyright (C) 2006 Paul Mundt
6 * 7 *
7 * This file is subject to the terms and conditions of the GNU General Public 8 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file "COPYING" in the main directory of this archive 9 * License. See the file "COPYING" in the main directory of this archive
9 * for more details. 10 * for more details.
10 *
11 */ 11 */
12#include <linux/init.h> 12#include <linux/init.h>
13#include <linux/mman.h> 13#include <linux/mman.h>
@@ -32,9 +32,9 @@ static inline void cache_wback_all(void)
32{ 32{
33 unsigned long ways, waysize, addrstart; 33 unsigned long ways, waysize, addrstart;
34 34
35 ways = cpu_data->dcache.ways; 35 ways = current_cpu_data.dcache.ways;
36 waysize = cpu_data->dcache.sets; 36 waysize = current_cpu_data.dcache.sets;
37 waysize <<= cpu_data->dcache.entry_shift; 37 waysize <<= current_cpu_data.dcache.entry_shift;
38 38
39 addrstart = CACHE_OC_ADDRESS_ARRAY; 39 addrstart = CACHE_OC_ADDRESS_ARRAY;
40 40
@@ -43,7 +43,7 @@ static inline void cache_wback_all(void)
43 43
44 for (addr = addrstart; 44 for (addr = addrstart;
45 addr < addrstart + waysize; 45 addr < addrstart + waysize;
46 addr += cpu_data->dcache.linesz) { 46 addr += current_cpu_data.dcache.linesz) {
47 unsigned long data; 47 unsigned long data;
48 int v = SH_CACHE_UPDATED | SH_CACHE_VALID; 48 int v = SH_CACHE_UPDATED | SH_CACHE_VALID;
49 49
@@ -51,10 +51,9 @@ static inline void cache_wback_all(void)
51 51
52 if ((data & v) == v) 52 if ((data & v) == v)
53 ctrl_outl(data & ~v, addr); 53 ctrl_outl(data & ~v, addr);
54
55 } 54 }
56 55
57 addrstart += cpu_data->dcache.way_incr; 56 addrstart += current_cpu_data.dcache.way_incr;
58 } while (--ways); 57 } while (--ways);
59} 58}
60 59
@@ -94,9 +93,9 @@ static void __flush_dcache_page(unsigned long phys)
94 local_irq_save(flags); 93 local_irq_save(flags);
95 jump_to_P2(); 94 jump_to_P2();
96 95
97 ways = cpu_data->dcache.ways; 96 ways = current_cpu_data.dcache.ways;
98 waysize = cpu_data->dcache.sets; 97 waysize = current_cpu_data.dcache.sets;
99 waysize <<= cpu_data->dcache.entry_shift; 98 waysize <<= current_cpu_data.dcache.entry_shift;
100 99
101 addrstart = CACHE_OC_ADDRESS_ARRAY; 100 addrstart = CACHE_OC_ADDRESS_ARRAY;
102 101
@@ -105,7 +104,7 @@ static void __flush_dcache_page(unsigned long phys)
105 104
106 for (addr = addrstart; 105 for (addr = addrstart;
107 addr < addrstart + waysize; 106 addr < addrstart + waysize;
108 addr += cpu_data->dcache.linesz) { 107 addr += current_cpu_data.dcache.linesz) {
109 unsigned long data; 108 unsigned long data;
110 109
111 data = ctrl_inl(addr) & (0x1ffffC00 | SH_CACHE_VALID); 110 data = ctrl_inl(addr) & (0x1ffffC00 | SH_CACHE_VALID);
@@ -115,7 +114,7 @@ static void __flush_dcache_page(unsigned long phys)
115 } 114 }
116 } 115 }
117 116
118 addrstart += cpu_data->dcache.way_incr; 117 addrstart += current_cpu_data.dcache.way_incr;
119 } while (--ways); 118 } while (--ways);
120 119
121 back_to_P1(); 120 back_to_P1();
@@ -128,7 +127,11 @@ static void __flush_dcache_page(unsigned long phys)
128 */ 127 */
129void flush_dcache_page(struct page *page) 128void flush_dcache_page(struct page *page)
130{ 129{
131 if (test_bit(PG_mapped, &page->flags)) 130 struct address_space *mapping = page_mapping(page);
131
132 if (mapping && !mapping_mapped(mapping))
133 set_bit(PG_dcache_dirty, &page->flags);
134 else
132 __flush_dcache_page(PHYSADDR(page_address(page))); 135 __flush_dcache_page(PHYSADDR(page_address(page)));
133} 136}
134 137
diff --git a/arch/sh/mm/fault.c b/arch/sh/mm/fault.c
index 716ebf568af2..fa5d7f0b9f18 100644
--- a/arch/sh/mm/fault.c
+++ b/arch/sh/mm/fault.c
@@ -17,6 +17,7 @@
17#include <linux/kprobes.h> 17#include <linux/kprobes.h>
18#include <asm/system.h> 18#include <asm/system.h>
19#include <asm/mmu_context.h> 19#include <asm/mmu_context.h>
20#include <asm/tlbflush.h>
20#include <asm/kgdb.h> 21#include <asm/kgdb.h>
21 22
22extern void die(const char *,struct pt_regs *,long); 23extern void die(const char *,struct pt_regs *,long);
@@ -224,3 +225,89 @@ do_sigbus:
224 if (!user_mode(regs)) 225 if (!user_mode(regs))
225 goto no_context; 226 goto no_context;
226} 227}
228
229#ifdef CONFIG_SH_STORE_QUEUES
230/*
231 * This is a special case for the SH-4 store queues, as pages for this
232 * space still need to be faulted in before it's possible to flush the
233 * store queue cache for writeout to the remapped region.
234 */
235#define P3_ADDR_MAX (P4SEG_STORE_QUE + 0x04000000)
236#else
237#define P3_ADDR_MAX P4SEG
238#endif
239
240/*
241 * Called with interrupts disabled.
242 */
243asmlinkage int __kprobes __do_page_fault(struct pt_regs *regs,
244 unsigned long writeaccess,
245 unsigned long address)
246{
247 pgd_t *pgd;
248 pud_t *pud;
249 pmd_t *pmd;
250 pte_t *pte;
251 pte_t entry;
252 struct mm_struct *mm = current->mm;
253 spinlock_t *ptl;
254 int ret = 1;
255
256#ifdef CONFIG_SH_KGDB
257 if (kgdb_nofault && kgdb_bus_err_hook)
258 kgdb_bus_err_hook();
259#endif
260
261 /*
262 * We don't take page faults for P1, P2, and parts of P4, these
263 * are always mapped, whether it be due to legacy behaviour in
264 * 29-bit mode, or due to PMB configuration in 32-bit mode.
265 */
266 if (address >= P3SEG && address < P3_ADDR_MAX) {
267 pgd = pgd_offset_k(address);
268 mm = NULL;
269 } else {
270 if (unlikely(address >= TASK_SIZE || !mm))
271 return 1;
272
273 pgd = pgd_offset(mm, address);
274 }
275
276 pud = pud_offset(pgd, address);
277 if (pud_none_or_clear_bad(pud))
278 return 1;
279 pmd = pmd_offset(pud, address);
280 if (pmd_none_or_clear_bad(pmd))
281 return 1;
282
283 if (mm)
284 pte = pte_offset_map_lock(mm, pmd, address, &ptl);
285 else
286 pte = pte_offset_kernel(pmd, address);
287
288 entry = *pte;
289 if (unlikely(pte_none(entry) || pte_not_present(entry)))
290 goto unlock;
291 if (unlikely(writeaccess && !pte_write(entry)))
292 goto unlock;
293
294 if (writeaccess)
295 entry = pte_mkdirty(entry);
296 entry = pte_mkyoung(entry);
297
298#ifdef CONFIG_CPU_SH4
299 /*
300 * ITLB is not affected by "ldtlb" instruction.
301 * So, we need to flush the entry by ourselves.
302 */
303 local_flush_tlb_one(get_asid(), address & PAGE_MASK);
304#endif
305
306 set_pte(pte, entry);
307 update_mmu_cache(NULL, address, entry);
308 ret = 0;
309unlock:
310 if (mm)
311 pte_unmap_unlock(pte, ptl);
312 return ret;
313}
diff --git a/arch/sh/mm/init.c b/arch/sh/mm/init.c
index bf0c263cb6fd..ae957a932375 100644
--- a/arch/sh/mm/init.c
+++ b/arch/sh/mm/init.c
@@ -39,11 +39,6 @@
39DEFINE_PER_CPU(struct mmu_gather, mmu_gathers); 39DEFINE_PER_CPU(struct mmu_gather, mmu_gathers);
40pgd_t swapper_pg_dir[PTRS_PER_PGD]; 40pgd_t swapper_pg_dir[PTRS_PER_PGD];
41 41
42/*
43 * Cache of MMU context last used.
44 */
45unsigned long mmu_context_cache = NO_CONTEXT;
46
47#ifdef CONFIG_MMU 42#ifdef CONFIG_MMU
48/* It'd be good if these lines were in the standard header file. */ 43/* It'd be good if these lines were in the standard header file. */
49#define START_PFN (NODE_DATA(0)->bdata->node_boot_start >> PAGE_SHIFT) 44#define START_PFN (NODE_DATA(0)->bdata->node_boot_start >> PAGE_SHIFT)
@@ -111,7 +106,7 @@ static void set_pte_phys(unsigned long addr, unsigned long phys, pgprot_t prot)
111 106
112 set_pte(pte, pfn_pte(phys >> PAGE_SHIFT, prot)); 107 set_pte(pte, pfn_pte(phys >> PAGE_SHIFT, prot));
113 108
114 __flush_tlb_page(get_asid(), addr); 109 flush_tlb_one(get_asid(), addr);
115} 110}
116 111
117/* 112/*
diff --git a/arch/sh/mm/ioremap.c b/arch/sh/mm/ioremap.c
index 90b494a0cf45..be03d74e99cb 100644
--- a/arch/sh/mm/ioremap.c
+++ b/arch/sh/mm/ioremap.c
@@ -45,12 +45,6 @@ void __iomem *__ioremap(unsigned long phys_addr, unsigned long size,
45 return NULL; 45 return NULL;
46 46
47 /* 47 /*
48 * Don't remap the low PCI/ISA area, it's always mapped..
49 */
50 if (phys_addr >= 0xA0000 && last_addr < 0x100000)
51 return (void __iomem *)phys_to_virt(phys_addr);
52
53 /*
54 * If we're on an SH7751 or SH7780 PCI controller, PCI memory is 48 * If we're on an SH7751 or SH7780 PCI controller, PCI memory is
55 * mapped at the end of the address space (typically 0xfd000000) 49 * mapped at the end of the address space (typically 0xfd000000)
56 * in a non-translatable area, so mapping through page tables for 50 * in a non-translatable area, so mapping through page tables for
diff --git a/arch/sh/mm/pg-sh4.c b/arch/sh/mm/pg-sh4.c
index 3f98d2a4f936..969efeceb928 100644
--- a/arch/sh/mm/pg-sh4.c
+++ b/arch/sh/mm/pg-sh4.c
@@ -13,7 +13,7 @@
13 13
14extern struct mutex p3map_mutex[]; 14extern struct mutex p3map_mutex[];
15 15
16#define CACHE_ALIAS (cpu_data->dcache.alias_mask) 16#define CACHE_ALIAS (current_cpu_data.dcache.alias_mask)
17 17
18/* 18/*
19 * clear_user_page 19 * clear_user_page
@@ -23,7 +23,6 @@ extern struct mutex p3map_mutex[];
23 */ 23 */
24void clear_user_page(void *to, unsigned long address, struct page *page) 24void clear_user_page(void *to, unsigned long address, struct page *page)
25{ 25{
26 __set_bit(PG_mapped, &page->flags);
27 if (((address ^ (unsigned long)to) & CACHE_ALIAS) == 0) 26 if (((address ^ (unsigned long)to) & CACHE_ALIAS) == 0)
28 clear_page(to); 27 clear_page(to);
29 else { 28 else {
@@ -40,7 +39,7 @@ void clear_user_page(void *to, unsigned long address, struct page *page)
40 mutex_lock(&p3map_mutex[(address & CACHE_ALIAS)>>12]); 39 mutex_lock(&p3map_mutex[(address & CACHE_ALIAS)>>12]);
41 set_pte(pte, entry); 40 set_pte(pte, entry);
42 local_irq_save(flags); 41 local_irq_save(flags);
43 __flush_tlb_page(get_asid(), p3_addr); 42 flush_tlb_one(get_asid(), p3_addr);
44 local_irq_restore(flags); 43 local_irq_restore(flags);
45 update_mmu_cache(NULL, p3_addr, entry); 44 update_mmu_cache(NULL, p3_addr, entry);
46 __clear_user_page((void *)p3_addr, to); 45 __clear_user_page((void *)p3_addr, to);
@@ -59,7 +58,6 @@ void clear_user_page(void *to, unsigned long address, struct page *page)
59void copy_user_page(void *to, void *from, unsigned long address, 58void copy_user_page(void *to, void *from, unsigned long address,
60 struct page *page) 59 struct page *page)
61{ 60{
62 __set_bit(PG_mapped, &page->flags);
63 if (((address ^ (unsigned long)to) & CACHE_ALIAS) == 0) 61 if (((address ^ (unsigned long)to) & CACHE_ALIAS) == 0)
64 copy_page(to, from); 62 copy_page(to, from);
65 else { 63 else {
@@ -76,7 +74,7 @@ void copy_user_page(void *to, void *from, unsigned long address,
76 mutex_lock(&p3map_mutex[(address & CACHE_ALIAS)>>12]); 74 mutex_lock(&p3map_mutex[(address & CACHE_ALIAS)>>12]);
77 set_pte(pte, entry); 75 set_pte(pte, entry);
78 local_irq_save(flags); 76 local_irq_save(flags);
79 __flush_tlb_page(get_asid(), p3_addr); 77 flush_tlb_one(get_asid(), p3_addr);
80 local_irq_restore(flags); 78 local_irq_restore(flags);
81 update_mmu_cache(NULL, p3_addr, entry); 79 update_mmu_cache(NULL, p3_addr, entry);
82 __copy_user_page((void *)p3_addr, from, to); 80 __copy_user_page((void *)p3_addr, from, to);
@@ -84,23 +82,3 @@ void copy_user_page(void *to, void *from, unsigned long address,
84 mutex_unlock(&p3map_mutex[(address & CACHE_ALIAS)>>12]); 82 mutex_unlock(&p3map_mutex[(address & CACHE_ALIAS)>>12]);
85 } 83 }
86} 84}
87
88/*
89 * For SH-4, we have our own implementation for ptep_get_and_clear
90 */
91inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
92{
93 pte_t pte = *ptep;
94
95 pte_clear(mm, addr, ptep);
96 if (!pte_not_present(pte)) {
97 unsigned long pfn = pte_pfn(pte);
98 if (pfn_valid(pfn)) {
99 struct page *page = pfn_to_page(pfn);
100 struct address_space *mapping = page_mapping(page);
101 if (!mapping || !mapping_writably_mapped(mapping))
102 __clear_bit(PG_mapped, &page->flags);
103 }
104 }
105 return pte;
106}
diff --git a/arch/sh/mm/pg-sh7705.c b/arch/sh/mm/pg-sh7705.c
index ff9ece986cbc..887ab9d18ccd 100644
--- a/arch/sh/mm/pg-sh7705.c
+++ b/arch/sh/mm/pg-sh7705.c
@@ -7,9 +7,7 @@
7 * This file is subject to the terms and conditions of the GNU General Public 7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file "COPYING" in the main directory of this archive 8 * License. See the file "COPYING" in the main directory of this archive
9 * for more details. 9 * for more details.
10 *
11 */ 10 */
12
13#include <linux/init.h> 11#include <linux/init.h>
14#include <linux/mman.h> 12#include <linux/mman.h>
15#include <linux/mm.h> 13#include <linux/mm.h>
@@ -45,13 +43,13 @@ static inline void __flush_purge_virtual_region(void *p1, void *virt, int size)
45 43
46 p = __pa(p1_begin); 44 p = __pa(p1_begin);
47 45
48 ways = cpu_data->dcache.ways; 46 ways = current_cpu_data.dcache.ways;
49 addr = CACHE_OC_ADDRESS_ARRAY; 47 addr = CACHE_OC_ADDRESS_ARRAY;
50 48
51 do { 49 do {
52 unsigned long data; 50 unsigned long data;
53 51
54 addr |= (v & cpu_data->dcache.entry_mask); 52 addr |= (v & current_cpu_data.dcache.entry_mask);
55 53
56 data = ctrl_inl(addr); 54 data = ctrl_inl(addr);
57 if ((data & CACHE_PHYSADDR_MASK) == 55 if ((data & CACHE_PHYSADDR_MASK) ==
@@ -60,7 +58,7 @@ static inline void __flush_purge_virtual_region(void *p1, void *virt, int size)
60 ctrl_outl(data, addr); 58 ctrl_outl(data, addr);
61 } 59 }
62 60
63 addr += cpu_data->dcache.way_incr; 61 addr += current_cpu_data.dcache.way_incr;
64 } while (--ways); 62 } while (--ways);
65 63
66 p1_begin += L1_CACHE_BYTES; 64 p1_begin += L1_CACHE_BYTES;
@@ -76,7 +74,6 @@ void clear_user_page(void *to, unsigned long address, struct page *pg)
76{ 74{
77 struct page *page = virt_to_page(to); 75 struct page *page = virt_to_page(to);
78 76
79 __set_bit(PG_mapped, &page->flags);
80 if (((address ^ (unsigned long)to) & CACHE_ALIAS) == 0) { 77 if (((address ^ (unsigned long)to) & CACHE_ALIAS) == 0) {
81 clear_page(to); 78 clear_page(to);
82 __flush_wback_region(to, PAGE_SIZE); 79 __flush_wback_region(to, PAGE_SIZE);
@@ -95,12 +92,11 @@ void clear_user_page(void *to, unsigned long address, struct page *pg)
95 * @from: P1 address 92 * @from: P1 address
96 * @address: U0 address to be mapped 93 * @address: U0 address to be mapped
97 */ 94 */
98void copy_user_page(void *to, void *from, unsigned long address, struct page *pg) 95void copy_user_page(void *to, void *from, unsigned long address,
96 struct page *pg)
99{ 97{
100 struct page *page = virt_to_page(to); 98 struct page *page = virt_to_page(to);
101 99
102
103 __set_bit(PG_mapped, &page->flags);
104 if (((address ^ (unsigned long)to) & CACHE_ALIAS) == 0) { 100 if (((address ^ (unsigned long)to) & CACHE_ALIAS) == 0) {
105 copy_page(to, from); 101 copy_page(to, from);
106 __flush_wback_region(to, PAGE_SIZE); 102 __flush_wback_region(to, PAGE_SIZE);
@@ -112,26 +108,3 @@ void copy_user_page(void *to, void *from, unsigned long address, struct page *pg
112 __flush_wback_region(to, PAGE_SIZE); 108 __flush_wback_region(to, PAGE_SIZE);
113 } 109 }
114} 110}
115
116/*
117 * For SH7705, we have our own implementation for ptep_get_and_clear
118 * Copied from pg-sh4.c
119 */
120inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
121{
122 pte_t pte = *ptep;
123
124 pte_clear(mm, addr, ptep);
125 if (!pte_not_present(pte)) {
126 unsigned long pfn = pte_pfn(pte);
127 if (pfn_valid(pfn)) {
128 struct page *page = pfn_to_page(pfn);
129 struct address_space *mapping = page_mapping(page);
130 if (!mapping || !mapping_writably_mapped(mapping))
131 __clear_bit(PG_mapped, &page->flags);
132 }
133 }
134
135 return pte;
136}
137
diff --git a/arch/sh/mm/tlb-flush.c b/arch/sh/mm/tlb-flush.c
index 73ec7f6084fa..d2f7b4a2eb05 100644
--- a/arch/sh/mm/tlb-flush.c
+++ b/arch/sh/mm/tlb-flush.c
@@ -2,24 +2,28 @@
2 * TLB flushing operations for SH with an MMU. 2 * TLB flushing operations for SH with an MMU.
3 * 3 *
4 * Copyright (C) 1999 Niibe Yutaka 4 * Copyright (C) 1999 Niibe Yutaka
5 * Copyright (C) 2003 Paul Mundt 5 * Copyright (C) 2003 - 2006 Paul Mundt
6 * 6 *
7 * This file is subject to the terms and conditions of the GNU General Public 7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file "COPYING" in the main directory of this archive 8 * License. See the file "COPYING" in the main directory of this archive
9 * for more details. 9 * for more details.
10 */ 10 */
11#include <linux/mm.h> 11#include <linux/mm.h>
12#include <linux/io.h>
12#include <asm/mmu_context.h> 13#include <asm/mmu_context.h>
13#include <asm/tlbflush.h> 14#include <asm/tlbflush.h>
15#include <asm/cacheflush.h>
14 16
15void flush_tlb_page(struct vm_area_struct *vma, unsigned long page) 17void local_flush_tlb_page(struct vm_area_struct *vma, unsigned long page)
16{ 18{
17 if (vma->vm_mm && vma->vm_mm->context.id != NO_CONTEXT) { 19 unsigned int cpu = smp_processor_id();
20
21 if (vma->vm_mm && cpu_context(cpu, vma->vm_mm) != NO_CONTEXT) {
18 unsigned long flags; 22 unsigned long flags;
19 unsigned long asid; 23 unsigned long asid;
20 unsigned long saved_asid = MMU_NO_ASID; 24 unsigned long saved_asid = MMU_NO_ASID;
21 25
22 asid = vma->vm_mm->context.id & MMU_CONTEXT_ASID_MASK; 26 asid = cpu_asid(cpu, vma->vm_mm);
23 page &= PAGE_MASK; 27 page &= PAGE_MASK;
24 28
25 local_irq_save(flags); 29 local_irq_save(flags);
@@ -27,33 +31,34 @@ void flush_tlb_page(struct vm_area_struct *vma, unsigned long page)
27 saved_asid = get_asid(); 31 saved_asid = get_asid();
28 set_asid(asid); 32 set_asid(asid);
29 } 33 }
30 __flush_tlb_page(asid, page); 34 local_flush_tlb_one(asid, page);
31 if (saved_asid != MMU_NO_ASID) 35 if (saved_asid != MMU_NO_ASID)
32 set_asid(saved_asid); 36 set_asid(saved_asid);
33 local_irq_restore(flags); 37 local_irq_restore(flags);
34 } 38 }
35} 39}
36 40
37void flush_tlb_range(struct vm_area_struct *vma, unsigned long start, 41void local_flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
38 unsigned long end) 42 unsigned long end)
39{ 43{
40 struct mm_struct *mm = vma->vm_mm; 44 struct mm_struct *mm = vma->vm_mm;
45 unsigned int cpu = smp_processor_id();
41 46
42 if (mm->context.id != NO_CONTEXT) { 47 if (cpu_context(cpu, mm) != NO_CONTEXT) {
43 unsigned long flags; 48 unsigned long flags;
44 int size; 49 int size;
45 50
46 local_irq_save(flags); 51 local_irq_save(flags);
47 size = (end - start + (PAGE_SIZE - 1)) >> PAGE_SHIFT; 52 size = (end - start + (PAGE_SIZE - 1)) >> PAGE_SHIFT;
48 if (size > (MMU_NTLB_ENTRIES/4)) { /* Too many TLB to flush */ 53 if (size > (MMU_NTLB_ENTRIES/4)) { /* Too many TLB to flush */
49 mm->context.id = NO_CONTEXT; 54 cpu_context(cpu, mm) = NO_CONTEXT;
50 if (mm == current->mm) 55 if (mm == current->mm)
51 activate_context(mm); 56 activate_context(mm, cpu);
52 } else { 57 } else {
53 unsigned long asid; 58 unsigned long asid;
54 unsigned long saved_asid = MMU_NO_ASID; 59 unsigned long saved_asid = MMU_NO_ASID;
55 60
56 asid = mm->context.id & MMU_CONTEXT_ASID_MASK; 61 asid = cpu_asid(cpu, mm);
57 start &= PAGE_MASK; 62 start &= PAGE_MASK;
58 end += (PAGE_SIZE - 1); 63 end += (PAGE_SIZE - 1);
59 end &= PAGE_MASK; 64 end &= PAGE_MASK;
@@ -62,7 +67,7 @@ void flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
62 set_asid(asid); 67 set_asid(asid);
63 } 68 }
64 while (start < end) { 69 while (start < end) {
65 __flush_tlb_page(asid, start); 70 local_flush_tlb_one(asid, start);
66 start += PAGE_SIZE; 71 start += PAGE_SIZE;
67 } 72 }
68 if (saved_asid != MMU_NO_ASID) 73 if (saved_asid != MMU_NO_ASID)
@@ -72,26 +77,27 @@ void flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
72 } 77 }
73} 78}
74 79
75void flush_tlb_kernel_range(unsigned long start, unsigned long end) 80void local_flush_tlb_kernel_range(unsigned long start, unsigned long end)
76{ 81{
82 unsigned int cpu = smp_processor_id();
77 unsigned long flags; 83 unsigned long flags;
78 int size; 84 int size;
79 85
80 local_irq_save(flags); 86 local_irq_save(flags);
81 size = (end - start + (PAGE_SIZE - 1)) >> PAGE_SHIFT; 87 size = (end - start + (PAGE_SIZE - 1)) >> PAGE_SHIFT;
82 if (size > (MMU_NTLB_ENTRIES/4)) { /* Too many TLB to flush */ 88 if (size > (MMU_NTLB_ENTRIES/4)) { /* Too many TLB to flush */
83 flush_tlb_all(); 89 local_flush_tlb_all();
84 } else { 90 } else {
85 unsigned long asid; 91 unsigned long asid;
86 unsigned long saved_asid = get_asid(); 92 unsigned long saved_asid = get_asid();
87 93
88 asid = init_mm.context.id & MMU_CONTEXT_ASID_MASK; 94 asid = cpu_asid(cpu, &init_mm);
89 start &= PAGE_MASK; 95 start &= PAGE_MASK;
90 end += (PAGE_SIZE - 1); 96 end += (PAGE_SIZE - 1);
91 end &= PAGE_MASK; 97 end &= PAGE_MASK;
92 set_asid(asid); 98 set_asid(asid);
93 while (start < end) { 99 while (start < end) {
94 __flush_tlb_page(asid, start); 100 local_flush_tlb_one(asid, start);
95 start += PAGE_SIZE; 101 start += PAGE_SIZE;
96 } 102 }
97 set_asid(saved_asid); 103 set_asid(saved_asid);
@@ -99,22 +105,24 @@ void flush_tlb_kernel_range(unsigned long start, unsigned long end)
99 local_irq_restore(flags); 105 local_irq_restore(flags);
100} 106}
101 107
102void flush_tlb_mm(struct mm_struct *mm) 108void local_flush_tlb_mm(struct mm_struct *mm)
103{ 109{
110 unsigned int cpu = smp_processor_id();
111
104 /* Invalidate all TLB of this process. */ 112 /* Invalidate all TLB of this process. */
105 /* Instead of invalidating each TLB, we get new MMU context. */ 113 /* Instead of invalidating each TLB, we get new MMU context. */
106 if (mm->context.id != NO_CONTEXT) { 114 if (cpu_context(cpu, mm) != NO_CONTEXT) {
107 unsigned long flags; 115 unsigned long flags;
108 116
109 local_irq_save(flags); 117 local_irq_save(flags);
110 mm->context.id = NO_CONTEXT; 118 cpu_context(cpu, mm) = NO_CONTEXT;
111 if (mm == current->mm) 119 if (mm == current->mm)
112 activate_context(mm); 120 activate_context(mm, cpu);
113 local_irq_restore(flags); 121 local_irq_restore(flags);
114 } 122 }
115} 123}
116 124
117void flush_tlb_all(void) 125void local_flush_tlb_all(void)
118{ 126{
119 unsigned long flags, status; 127 unsigned long flags, status;
120 128
@@ -132,3 +140,54 @@ void flush_tlb_all(void)
132 ctrl_barrier(); 140 ctrl_barrier();
133 local_irq_restore(flags); 141 local_irq_restore(flags);
134} 142}
143
144void update_mmu_cache(struct vm_area_struct *vma,
145 unsigned long address, pte_t pte)
146{
147 unsigned long flags;
148 unsigned long pteval;
149 unsigned long vpn;
150 struct page *page;
151 unsigned long pfn = pte_pfn(pte);
152 struct address_space *mapping;
153
154 if (!pfn_valid(pfn))
155 return;
156
157 page = pfn_to_page(pfn);
158 mapping = page_mapping(page);
159 if (mapping) {
160 unsigned long phys = pte_val(pte) & PTE_PHYS_MASK;
161 int dirty = test_and_clear_bit(PG_dcache_dirty, &page->flags);
162
163 if (dirty)
164 __flush_wback_region((void *)P1SEGADDR(phys),
165 PAGE_SIZE);
166 }
167
168 local_irq_save(flags);
169
170 /* Set PTEH register */
171 vpn = (address & MMU_VPN_MASK) | get_asid();
172 ctrl_outl(vpn, MMU_PTEH);
173
174 pteval = pte_val(pte);
175
176#ifdef CONFIG_CPU_HAS_PTEA
177 /* Set PTEA register */
178 /* TODO: make this look less hacky */
179 ctrl_outl(((pteval >> 28) & 0xe) | (pteval & 0x1), MMU_PTEA);
180#endif
181
182 /* Set PTEL register */
183 pteval &= _PAGE_FLAGS_HARDWARE_MASK; /* drop software flags */
184#if defined(CONFIG_SH_WRITETHROUGH) && defined(CONFIG_CPU_SH4)
185 pteval |= _PAGE_WT;
186#endif
187 /* conveniently, we want all the software flags to be 0 anyway */
188 ctrl_outl(pteval, MMU_PTEL);
189
190 /* Load the TLB */
191 asm volatile("ldtlb": /* no output */ : /* no input */ : "memory");
192 local_irq_restore(flags);
193}
diff --git a/arch/sh/mm/tlb-nommu.c b/arch/sh/mm/tlb-nommu.c
index e55cfea01092..1ccca7c0532e 100644
--- a/arch/sh/mm/tlb-nommu.c
+++ b/arch/sh/mm/tlb-nommu.c
@@ -13,39 +13,33 @@
13/* 13/*
14 * Nothing too terribly exciting here .. 14 * Nothing too terribly exciting here ..
15 */ 15 */
16 16void local_flush_tlb_all(void)
17void flush_tlb(void)
18{
19 BUG();
20}
21
22void flush_tlb_all(void)
23{ 17{
24 BUG(); 18 BUG();
25} 19}
26 20
27void flush_tlb_mm(struct mm_struct *mm) 21void local_flush_tlb_mm(struct mm_struct *mm)
28{ 22{
29 BUG(); 23 BUG();
30} 24}
31 25
32void flush_tlb_range(struct vm_area_struct *vma, unsigned long start, 26void local_flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
33 unsigned long end) 27 unsigned long end)
34{ 28{
35 BUG(); 29 BUG();
36} 30}
37 31
38void flush_tlb_page(struct vm_area_struct *vma, unsigned long page) 32void local_flush_tlb_page(struct vm_area_struct *vma, unsigned long page)
39{ 33{
40 BUG(); 34 BUG();
41} 35}
42 36
43void __flush_tlb_page(unsigned long asid, unsigned long page) 37void local_flush_tlb_one(unsigned long asid, unsigned long page)
44{ 38{
45 BUG(); 39 BUG();
46} 40}
47 41
48void flush_tlb_kernel_range(unsigned long start, unsigned long end) 42void local_flush_tlb_kernel_range(unsigned long start, unsigned long end)
49{ 43{
50 BUG(); 44 BUG();
51} 45}
@@ -55,4 +49,3 @@ void update_mmu_cache(struct vm_area_struct * vma,
55{ 49{
56 BUG(); 50 BUG();
57} 51}
58
diff --git a/arch/sh/mm/tlb-sh3.c b/arch/sh/mm/tlb-sh3.c
index 46b09e26e082..e5e76eb7ee09 100644
--- a/arch/sh/mm/tlb-sh3.c
+++ b/arch/sh/mm/tlb-sh3.c
@@ -8,71 +8,11 @@
8 * 8 *
9 * Released under the terms of the GNU GPL v2.0. 9 * Released under the terms of the GNU GPL v2.0.
10 */ 10 */
11#include <linux/signal.h> 11#include <linux/io.h>
12#include <linux/sched.h>
13#include <linux/kernel.h>
14#include <linux/errno.h>
15#include <linux/string.h>
16#include <linux/types.h>
17#include <linux/ptrace.h>
18#include <linux/mman.h>
19#include <linux/mm.h>
20#include <linux/smp.h>
21#include <linux/smp_lock.h>
22#include <linux/interrupt.h>
23
24#include <asm/system.h> 12#include <asm/system.h>
25#include <asm/io.h>
26#include <asm/uaccess.h>
27#include <asm/pgalloc.h>
28#include <asm/mmu_context.h> 13#include <asm/mmu_context.h>
29#include <asm/cacheflush.h>
30 14
31void update_mmu_cache(struct vm_area_struct * vma, 15void local_flush_tlb_one(unsigned long asid, unsigned long page)
32 unsigned long address, pte_t pte)
33{
34 unsigned long flags;
35 unsigned long pteval;
36 unsigned long vpn;
37
38 /* Ptrace may call this routine. */
39 if (vma && current->active_mm != vma->vm_mm)
40 return;
41
42#if defined(CONFIG_SH7705_CACHE_32KB)
43 {
44 struct page *page = pte_page(pte);
45 unsigned long pfn = pte_pfn(pte);
46
47 if (pfn_valid(pfn) && !test_bit(PG_mapped, &page->flags)) {
48 unsigned long phys = pte_val(pte) & PTE_PHYS_MASK;
49
50 __flush_wback_region((void *)P1SEGADDR(phys),
51 PAGE_SIZE);
52 __set_bit(PG_mapped, &page->flags);
53 }
54 }
55#endif
56
57 local_irq_save(flags);
58
59 /* Set PTEH register */
60 vpn = (address & MMU_VPN_MASK) | get_asid();
61 ctrl_outl(vpn, MMU_PTEH);
62
63 pteval = pte_val(pte);
64
65 /* Set PTEL register */
66 pteval &= _PAGE_FLAGS_HARDWARE_MASK; /* drop software flags */
67 /* conveniently, we want all the software flags to be 0 anyway */
68 ctrl_outl(pteval, MMU_PTEL);
69
70 /* Load the TLB */
71 asm volatile("ldtlb": /* no output */ : /* no input */ : "memory");
72 local_irq_restore(flags);
73}
74
75void __flush_tlb_page(unsigned long asid, unsigned long page)
76{ 16{
77 unsigned long addr, data; 17 unsigned long addr, data;
78 int i, ways = MMU_NTLB_WAYS; 18 int i, ways = MMU_NTLB_WAYS;
@@ -86,7 +26,7 @@ void __flush_tlb_page(unsigned long asid, unsigned long page)
86 addr = MMU_TLB_ADDRESS_ARRAY | (page & 0x1F000); 26 addr = MMU_TLB_ADDRESS_ARRAY | (page & 0x1F000);
87 data = (page & 0xfffe0000) | asid; /* VALID bit is off */ 27 data = (page & 0xfffe0000) | asid; /* VALID bit is off */
88 28
89 if ((cpu_data->flags & CPU_HAS_MMU_PAGE_ASSOC)) { 29 if ((current_cpu_data.flags & CPU_HAS_MMU_PAGE_ASSOC)) {
90 addr |= MMU_PAGE_ASSOC_BIT; 30 addr |= MMU_PAGE_ASSOC_BIT;
91 ways = 1; /* we already know the way .. */ 31 ways = 1; /* we already know the way .. */
92 } 32 }
@@ -94,4 +34,3 @@ void __flush_tlb_page(unsigned long asid, unsigned long page)
94 for (i = 0; i < ways; i++) 34 for (i = 0; i < ways; i++)
95 ctrl_outl(data, addr + (i << 8)); 35 ctrl_outl(data, addr + (i << 8));
96} 36}
97
diff --git a/arch/sh/mm/tlb-sh4.c b/arch/sh/mm/tlb-sh4.c
index 812b2d567de2..221e7095473d 100644
--- a/arch/sh/mm/tlb-sh4.c
+++ b/arch/sh/mm/tlb-sh4.c
@@ -8,76 +8,11 @@
8 * 8 *
9 * Released under the terms of the GNU GPL v2.0. 9 * Released under the terms of the GNU GPL v2.0.
10 */ 10 */
11#include <linux/signal.h> 11#include <linux/io.h>
12#include <linux/sched.h>
13#include <linux/kernel.h>
14#include <linux/errno.h>
15#include <linux/string.h>
16#include <linux/types.h>
17#include <linux/ptrace.h>
18#include <linux/mman.h>
19#include <linux/mm.h>
20#include <linux/smp.h>
21#include <linux/smp_lock.h>
22#include <linux/interrupt.h>
23
24#include <asm/system.h> 12#include <asm/system.h>
25#include <asm/io.h>
26#include <asm/uaccess.h>
27#include <asm/pgalloc.h>
28#include <asm/mmu_context.h> 13#include <asm/mmu_context.h>
29#include <asm/cacheflush.h>
30 14
31void update_mmu_cache(struct vm_area_struct * vma, 15void local_flush_tlb_one(unsigned long asid, unsigned long page)
32 unsigned long address, pte_t pte)
33{
34 unsigned long flags;
35 unsigned long pteval;
36 unsigned long vpn;
37 struct page *page;
38 unsigned long pfn;
39
40 /* Ptrace may call this routine. */
41 if (vma && current->active_mm != vma->vm_mm)
42 return;
43
44 pfn = pte_pfn(pte);
45 if (pfn_valid(pfn)) {
46 page = pfn_to_page(pfn);
47 if (!test_bit(PG_mapped, &page->flags)) {
48 unsigned long phys = pte_val(pte) & PTE_PHYS_MASK;
49 __flush_wback_region((void *)P1SEGADDR(phys), PAGE_SIZE);
50 __set_bit(PG_mapped, &page->flags);
51 }
52 }
53
54 local_irq_save(flags);
55
56 /* Set PTEH register */
57 vpn = (address & MMU_VPN_MASK) | get_asid();
58 ctrl_outl(vpn, MMU_PTEH);
59
60 pteval = pte_val(pte);
61
62 /* Set PTEA register */
63 if (cpu_data->flags & CPU_HAS_PTEA)
64 /* TODO: make this look less hacky */
65 ctrl_outl(((pteval >> 28) & 0xe) | (pteval & 0x1), MMU_PTEA);
66
67 /* Set PTEL register */
68 pteval &= _PAGE_FLAGS_HARDWARE_MASK; /* drop software flags */
69#ifdef CONFIG_SH_WRITETHROUGH
70 pteval |= _PAGE_WT;
71#endif
72 /* conveniently, we want all the software flags to be 0 anyway */
73 ctrl_outl(pteval, MMU_PTEL);
74
75 /* Load the TLB */
76 asm volatile("ldtlb": /* no output */ : /* no input */ : "memory");
77 local_irq_restore(flags);
78}
79
80void __flush_tlb_page(unsigned long asid, unsigned long page)
81{ 16{
82 unsigned long addr, data; 17 unsigned long addr, data;
83 18
@@ -93,4 +28,3 @@ void __flush_tlb_page(unsigned long asid, unsigned long page)
93 ctrl_outl(data, addr); 28 ctrl_outl(data, addr);
94 back_to_P1(); 29 back_to_P1();
95} 30}
96
diff --git a/arch/sh/oprofile/op_model_sh7750.c b/arch/sh/oprofile/op_model_sh7750.c
index 0104e44bc76a..ebee7e24ede9 100644
--- a/arch/sh/oprofile/op_model_sh7750.c
+++ b/arch/sh/oprofile/op_model_sh7750.c
@@ -259,7 +259,7 @@ static struct oprofile_operations sh7750_perf_counter_ops = {
259 259
260int __init oprofile_arch_init(struct oprofile_operations **ops) 260int __init oprofile_arch_init(struct oprofile_operations **ops)
261{ 261{
262 if (!(cpu_data->flags & CPU_HAS_PERF_COUNTER)) 262 if (!(current_cpu_data.flags & CPU_HAS_PERF_COUNTER))
263 return -ENODEV; 263 return -ENODEV;
264 264
265 sh7750_perf_counter_ops.cpu_type = (char *)get_cpu_subtype(); 265 sh7750_perf_counter_ops.cpu_type = (char *)get_cpu_subtype();
diff --git a/arch/sh/tools/mach-types b/arch/sh/tools/mach-types
index 0571755e9a84..4fe0f94cbf42 100644
--- a/arch/sh/tools/mach-types
+++ b/arch/sh/tools/mach-types
@@ -16,7 +16,6 @@ HD64461 HD64461
16HD64465 HD64465 16HD64465 HD64465
17SATURN SH_SATURN 17SATURN SH_SATURN
18DREAMCAST SH_DREAMCAST 18DREAMCAST SH_DREAMCAST
19BIGSUR SH_BIGSUR
20MPC1211 SH_MPC1211 19MPC1211 SH_MPC1211
21SNAPGEAR SH_SECUREEDGE5410 20SNAPGEAR SH_SECUREEDGE5410
22HS7751RVOIP SH_HS7751RVOIP 21HS7751RVOIP SH_HS7751RVOIP
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-24 15:27:22 -0500