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authorRyusuke Sakato <sakato.ryusuke@renesas.com>2007-05-06 21:48:56 -0400
committerPaul Mundt <lethal@hera.kernel.org>2007-05-06 22:11:57 -0400
commit39374aadcd0159b4744ab456f4efa100bea84bd4 (patch)
treeabc7f4066e3404cf12e50688f558e0f9afd1de9d /arch
parent9c37dc633016e9ebdc39adba0737b390e0de1507 (diff)
sh: R7785RP board updates.
Some fixups for the R7785RP board. Gets iVDR working. Signed-off-by: Ryusuke Sakato <sakato.ryusuke@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/sh/boards/renesas/r7780rp/setup.c4
-rw-r--r--arch/sh/drivers/pci/ops-r7780rp.c12
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7785.c21
3 files changed, 16 insertions, 21 deletions
diff --git a/arch/sh/boards/renesas/r7780rp/setup.c b/arch/sh/boards/renesas/r7780rp/setup.c
index 6af0cc35ceb7..0727ef92f2b3 100644
--- a/arch/sh/boards/renesas/r7780rp/setup.c
+++ b/arch/sh/boards/renesas/r7780rp/setup.c
@@ -97,12 +97,12 @@ device_initcall(r7780rp_devices_setup);
97 */ 97 */
98static void ivdr_clk_enable(struct clk *clk) 98static void ivdr_clk_enable(struct clk *clk)
99{ 99{
100 ctrl_outw(ctrl_inw(PA_IVDRCTL) | (1 << 8), PA_IVDRCTL); 100 ctrl_outw(ctrl_inw(PA_IVDRCTL) | (1 << IVDR_CK_ON), PA_IVDRCTL);
101} 101}
102 102
103static void ivdr_clk_disable(struct clk *clk) 103static void ivdr_clk_disable(struct clk *clk)
104{ 104{
105 ctrl_outw(ctrl_inw(PA_IVDRCTL) & ~(1 << 8), PA_IVDRCTL); 105 ctrl_outw(ctrl_inw(PA_IVDRCTL) & ~(1 << IVDR_CK_ON), PA_IVDRCTL);
106} 106}
107 107
108static struct clk_ops ivdr_clk_ops = { 108static struct clk_ops ivdr_clk_ops = {
diff --git a/arch/sh/drivers/pci/ops-r7780rp.c b/arch/sh/drivers/pci/ops-r7780rp.c
index 6f4fb38bafa2..f2216081ab85 100644
--- a/arch/sh/drivers/pci/ops-r7780rp.c
+++ b/arch/sh/drivers/pci/ops-r7780rp.c
@@ -25,22 +25,12 @@ static char r7780mp_irq_tab[] __initdata = {
25 65, 66, 67, 68, 25 65, 66, 67, 68,
26}; 26};
27 27
28static char r7785rp_irq_tab[][4] __initdata = {
29 { 65, 66, 67, 68 }, /* INT ABCD */
30 { 66, 67, 68, 65 }, /* INT BCDA */
31 { 67, 68, 65, 66 }, /* INT CDAB */
32 { 68, 65, 66, 67 }, /* INT DABC */
33 { 64, 64, 64, 64 }, /* PCI Host */
34};
35
36int __init pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin) 28int __init pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin)
37{ 29{
38 if (mach_is_r7780rp()) 30 if (mach_is_r7780rp())
39 return r7780rp_irq_tab[slot]; 31 return r7780rp_irq_tab[slot];
40 if (mach_is_r7780mp()) 32 if (mach_is_r7780mp() || mach_is_r7785rp())
41 return r7780mp_irq_tab[slot]; 33 return r7780mp_irq_tab[slot];
42 if (mach_is_r7785rp())
43 return r7785rp_irq_tab[slot][pin];
44 34
45 printk(KERN_ERR "PCI: Bad IRQ mapping " 35 printk(KERN_ERR "PCI: Bad IRQ mapping "
46 "request for slot %d, func %d\n", slot, pin-1); 36 "request for slot %d, func %d\n", slot, pin-1);
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7785.c b/arch/sh/kernel/cpu/sh4a/setup-sh7785.c
index c9ae6592f098..07b0de82cfe6 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7785.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7785.c
@@ -75,21 +75,26 @@ __initcall(sh7785_devices_setup);
75static struct intc2_data intc2_irq_table[] = { 75static struct intc2_data intc2_irq_table[] = {
76 { 28, 0, 24, 0, 0, 2 }, /* TMU0 */ 76 { 28, 0, 24, 0, 0, 2 }, /* TMU0 */
77 77
78 { 40, 8, 24, 0, 3, 3 }, /* SCIF0 ERI */ 78 { 40, 8, 24, 0, 2, 3 }, /* SCIF0 ERI */
79 { 41, 8, 24, 0, 3, 3 }, /* SCIF0 RXI */ 79 { 41, 8, 24, 0, 2, 3 }, /* SCIF0 RXI */
80 { 42, 8, 24, 0, 3, 3 }, /* SCIF0 BRI */ 80 { 42, 8, 24, 0, 2, 3 }, /* SCIF0 BRI */
81 { 43, 8, 24, 0, 3, 3 }, /* SCIF0 TXI */ 81 { 43, 8, 24, 0, 2, 3 }, /* SCIF0 TXI */
82 82
83 { 76, 8, 16, 0, 4, 3 }, /* SCIF1 ERI */ 83 { 44, 8, 16, 0, 3, 3 }, /* SCIF1 ERI */
84 { 77, 8, 16, 0, 4, 3 }, /* SCIF1 RXI */ 84 { 45, 8, 16, 0, 3, 3 }, /* SCIF1 RXI */
85 { 78, 8, 16, 0, 4, 3 }, /* SCIF1 BRI */ 85 { 46, 8, 16, 0, 3, 3 }, /* SCIF1 BRI */
86 { 79, 8, 16, 0, 4, 3 }, /* SCIF1 TXI */ 86 { 47, 8, 16, 0, 3, 3 }, /* SCIF1 TXI */
87 87
88 { 64, 0x14, 8, 0, 14, 2 }, /* PCIC0 */ 88 { 64, 0x14, 8, 0, 14, 2 }, /* PCIC0 */
89 { 65, 0x14, 0, 0, 15, 2 }, /* PCIC1 */ 89 { 65, 0x14, 0, 0, 15, 2 }, /* PCIC1 */
90 { 66, 0x18, 24, 0, 16, 2 }, /* PCIC2 */ 90 { 66, 0x18, 24, 0, 16, 2 }, /* PCIC2 */
91 { 67, 0x18, 16, 0, 17, 2 }, /* PCIC3 */ 91 { 67, 0x18, 16, 0, 17, 2 }, /* PCIC3 */
92 { 68, 0x18, 8, 0, 18, 2 }, /* PCIC4 */ 92 { 68, 0x18, 8, 0, 18, 2 }, /* PCIC4 */
93
94 { 60, 8, 8, 0, 4, 3 }, /* SCIF2 ERI, RXI, BRI, TXI */
95 { 60, 8, 0, 0, 5, 3 }, /* SCIF3 ERI, RXI, BRI, TXI */
96 { 60, 12, 24, 0, 6, 3 }, /* SCIF4 ERI, RXI, BRI, TXI */
97 { 60, 12, 16, 0, 7, 3 }, /* SCIF5 ERI, RXI, BRI, TXI */
93}; 98};
94 99
95void __init init_IRQ_intc2(void) 100void __init init_IRQ_intc2(void)