aboutsummaryrefslogtreecommitdiffstats
path: root/arch
diff options
context:
space:
mode:
authorLinus Torvalds <torvalds@woody.linux-foundation.org>2007-07-12 16:28:54 -0400
committerLinus Torvalds <torvalds@woody.linux-foundation.org>2007-07-12 16:28:54 -0400
commit0b9062f6b57a87f22309c6b920a51aaa66ce2a13 (patch)
treecbef02e5b1bfc1557a53f7d45c7d632fb1f91ae5 /arch
parent82afee684fe3badaf5ee3fc5b6fda687d558bfb5 (diff)
parentde61b542b822746d1498718c40f5dd740da49629 (diff)
Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: [MIPS] Rename PC speaker code [MIPS] Don't use genrtc. [MIPS] Remove unused time.c for swarm [MIPS] Sparse: Use NULL for pointer [MIPS] Fix a sparse warning in arch/mips/pci/pci.c [MIPS] SMTC: Interrupt mask backstop hack [MIPS] separate platform_device registration for VR41xx RTC [MIPS] Separate platform_device registration for VR41xx GPIO [MIPS] MIPSsim: Fix build. [MIPS] separate platform_device registration for VR41xx serial interface [MIPS] Include cacheflush.h in uncache.c [MIPS] Cleanup tlbdebug.h [MIPS] Change names of local variables to silence sparse (part 2) [MIPS] Workaround for a sparse warning in include/asm-mips/io.h [MIPS] RM: Use only phyiscal address for 82596 and 53c710 [MIPS] Hydrogen3: Remove remaining bits of code. [MIPS] DEC: Fix modpost warning. Revert "[MIPS] DEC: Fix modpost warning." [MIPS] Fix resume for 64K page size on R4000 class processors.
Diffstat (limited to 'arch')
-rw-r--r--arch/mips/Kconfig21
-rw-r--r--arch/mips/au1000/common/setup.c3
-rw-r--r--arch/mips/configs/jazz_defconfig2
-rw-r--r--arch/mips/configs/qemu_defconfig2
-rw-r--r--arch/mips/configs/rm200_defconfig2
-rw-r--r--arch/mips/configs/yosemite_defconfig2
-rw-r--r--arch/mips/kernel/Makefile2
-rw-r--r--arch/mips/kernel/entry.S2
-rw-r--r--arch/mips/kernel/genex.S2
-rw-r--r--arch/mips/kernel/pcspeaker.c (renamed from arch/mips/kernel/i8253.c)0
-rw-r--r--arch/mips/kernel/r4k_switch.S7
-rw-r--r--arch/mips/kernel/traps.c2
-rw-r--r--arch/mips/lib/dump_tlb.c1
-rw-r--r--arch/mips/lib/r3k_dump_tlb.c1
-rw-r--r--arch/mips/lib/uncached.c1
-rw-r--r--arch/mips/mipssim/sim_int.c2
-rw-r--r--arch/mips/mipssim/sim_setup.c2
-rw-r--r--arch/mips/mipssim/sim_time.c1
-rw-r--r--arch/mips/pci/pci.c2
-rw-r--r--arch/mips/sibyte/swarm/time.c244
-rw-r--r--arch/mips/sni/a20r.c8
-rw-r--r--arch/mips/sni/rm200.c4
-rw-r--r--arch/mips/vr41xx/common/Makefile2
-rw-r--r--arch/mips/vr41xx/common/giu.c122
-rw-r--r--arch/mips/vr41xx/common/rtc.c117
-rw-r--r--arch/mips/vr41xx/common/siu.c120
26 files changed, 399 insertions, 275 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index a00fabe2e4e0..5c863bcd5614 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -117,9 +117,9 @@ config MACH_JAZZ
117 select ARC32 117 select ARC32
118 select ARCH_MAY_HAVE_PC_FDC 118 select ARCH_MAY_HAVE_PC_FDC
119 select GENERIC_ISA_DMA 119 select GENERIC_ISA_DMA
120 select I8253
121 select I8259 120 select I8259
122 select ISA 121 select ISA
122 select PCSPEAKER
123 select SYS_HAS_CPU_R4X00 123 select SYS_HAS_CPU_R4X00
124 select SYS_SUPPORTS_32BIT_KERNEL 124 select SYS_SUPPORTS_32BIT_KERNEL
125 select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL 125 select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
@@ -347,9 +347,9 @@ config QEMU
347 select DMA_COHERENT 347 select DMA_COHERENT
348 select GENERIC_ISA_DMA 348 select GENERIC_ISA_DMA
349 select HAVE_STD_PC_SERIAL_PORT 349 select HAVE_STD_PC_SERIAL_PORT
350 select I8253
351 select I8259 350 select I8259
352 select ISA 351 select ISA
352 select PCSPEAKER
353 select SWAP_IO_SPACE 353 select SWAP_IO_SPACE
354 select SYS_HAS_CPU_MIPS32_R1 354 select SYS_HAS_CPU_MIPS32_R1
355 select SYS_SUPPORTS_32BIT_KERNEL 355 select SYS_SUPPORTS_32BIT_KERNEL
@@ -562,9 +562,9 @@ config SNI_RM
562 select HW_HAS_EISA 562 select HW_HAS_EISA
563 select HW_HAS_PCI 563 select HW_HAS_PCI
564 select IRQ_CPU 564 select IRQ_CPU
565 select I8253
566 select I8259 565 select I8259
567 select ISA 566 select ISA
567 select PCSPEAKER
568 select SWAP_IO_SPACE if CPU_BIG_ENDIAN 568 select SWAP_IO_SPACE if CPU_BIG_ENDIAN
569 select SYS_HAS_CPU_R4X00 569 select SYS_HAS_CPU_R4X00
570 select SYS_HAS_CPU_R5000 570 select SYS_HAS_CPU_R5000
@@ -1404,6 +1404,19 @@ config MIPS_MT_SMTC_INSTANT_REPLAY
1404 it off), but ensures that IPIs are handled promptly even under 1404 it off), but ensures that IPIs are handled promptly even under
1405 heavy I/O interrupt load. 1405 heavy I/O interrupt load.
1406 1406
1407config MIPS_MT_SMTC_IM_BACKSTOP
1408 bool "Use per-TC register bits as backstop for inhibited IM bits"
1409 depends on MIPS_MT_SMTC
1410 default y
1411 help
1412 To support multiple TC microthreads acting as "CPUs" within
1413 a VPE, VPE-wide interrupt mask bits must be specially manipulated
1414 during interrupt handling. To support legacy drivers and interrupt
1415 controller management code, SMTC has a "backstop" to track and
1416 if necessary restore the interrupt mask. This has some performance
1417 impact on interrupt service overhead. Disable it only if you know
1418 what you are doing.
1419
1407config MIPS_VPE_LOADER_TOM 1420config MIPS_VPE_LOADER_TOM
1408 bool "Load VPE program into memory hidden from linux" 1421 bool "Load VPE program into memory hidden from linux"
1409 depends on MIPS_VPE_LOADER 1422 depends on MIPS_VPE_LOADER
@@ -1851,7 +1864,7 @@ config MMU
1851 bool 1864 bool
1852 default y 1865 default y
1853 1866
1854config I8253 1867config PCSPEAKER
1855 bool 1868 bool
1856 1869
1857source "drivers/pcmcia/Kconfig" 1870source "drivers/pcmcia/Kconfig"
diff --git a/arch/mips/au1000/common/setup.c b/arch/mips/au1000/common/setup.c
index 13fe187f35d6..fdf2b85a69c8 100644
--- a/arch/mips/au1000/common/setup.c
+++ b/arch/mips/au1000/common/setup.c
@@ -100,9 +100,6 @@ void __init plat_mem_setup(void)
100 argptr = prom_getcmdline(); 100 argptr = prom_getcmdline();
101 /* default panel */ 101 /* default panel */
102 /*strcat(argptr, " video=au1100fb:panel:Sharp_320x240_16");*/ 102 /*strcat(argptr, " video=au1100fb:panel:Sharp_320x240_16");*/
103#ifdef CONFIG_MIPS_HYDROGEN3
104 strcat(argptr, " video=au1100fb:panel:Hydrogen_3_NEC_panel_320x240,nohwcursor");
105#endif
106 } 103 }
107#endif 104#endif
108 105
diff --git a/arch/mips/configs/jazz_defconfig b/arch/mips/configs/jazz_defconfig
index dd04eece9fd3..8a0b4ac5283d 100644
--- a/arch/mips/configs/jazz_defconfig
+++ b/arch/mips/configs/jazz_defconfig
@@ -241,7 +241,7 @@ CONFIG_DEFAULT_IOSCHED="anticipatory"
241# 241#
242CONFIG_ISA=y 242CONFIG_ISA=y
243CONFIG_MMU=y 243CONFIG_MMU=y
244CONFIG_I8253=y 244CONFIG_PCSPEAKER=y
245 245
246# 246#
247# PCCARD (PCMCIA/CardBus) support 247# PCCARD (PCMCIA/CardBus) support
diff --git a/arch/mips/configs/qemu_defconfig b/arch/mips/configs/qemu_defconfig
index 6cca105832ca..703de002e372 100644
--- a/arch/mips/configs/qemu_defconfig
+++ b/arch/mips/configs/qemu_defconfig
@@ -221,7 +221,7 @@ CONFIG_DEFAULT_IOSCHED="noop"
221# 221#
222CONFIG_ISA=y 222CONFIG_ISA=y
223CONFIG_MMU=y 223CONFIG_MMU=y
224CONFIG_I8253=y 224CONFIG_PCSPEAKER=y
225 225
226# 226#
227# PCCARD (PCMCIA/CardBus) support 227# PCCARD (PCMCIA/CardBus) support
diff --git a/arch/mips/configs/rm200_defconfig b/arch/mips/configs/rm200_defconfig
index 1a67a85aabbb..a5dc5cb97aae 100644
--- a/arch/mips/configs/rm200_defconfig
+++ b/arch/mips/configs/rm200_defconfig
@@ -251,7 +251,7 @@ CONFIG_PCI=y
251CONFIG_ISA=y 251CONFIG_ISA=y
252# CONFIG_EISA is not set 252# CONFIG_EISA is not set
253CONFIG_MMU=y 253CONFIG_MMU=y
254CONFIG_I8253=y 254CONFIG_PCSPEAKER=y
255 255
256# 256#
257# PCCARD (PCMCIA/CardBus) support 257# PCCARD (PCMCIA/CardBus) support
diff --git a/arch/mips/configs/yosemite_defconfig b/arch/mips/configs/yosemite_defconfig
index f1cdb12f7925..f342d8c887b8 100644
--- a/arch/mips/configs/yosemite_defconfig
+++ b/arch/mips/configs/yosemite_defconfig
@@ -592,8 +592,6 @@ CONFIG_LEGACY_PTY_COUNT=256
592# CONFIG_WATCHDOG is not set 592# CONFIG_WATCHDOG is not set
593# CONFIG_HW_RANDOM is not set 593# CONFIG_HW_RANDOM is not set
594# CONFIG_RTC is not set 594# CONFIG_RTC is not set
595CONFIG_GEN_RTC=y
596CONFIG_GEN_RTC_X=y
597# CONFIG_DTLK is not set 595# CONFIG_DTLK is not set
598# CONFIG_R3964 is not set 596# CONFIG_R3964 is not set
599# CONFIG_APPLICOM is not set 597# CONFIG_APPLICOM is not set
diff --git a/arch/mips/kernel/Makefile b/arch/mips/kernel/Makefile
index 961594cb5214..5c8085b6d7ab 100644
--- a/arch/mips/kernel/Makefile
+++ b/arch/mips/kernel/Makefile
@@ -63,7 +63,7 @@ obj-$(CONFIG_PROC_FS) += proc.o
63 63
64obj-$(CONFIG_64BIT) += cpu-bugs64.o 64obj-$(CONFIG_64BIT) += cpu-bugs64.o
65 65
66obj-$(CONFIG_I8253) += i8253.o 66obj-$(CONFIG_PCSPEAKER) += pcspeaker.o
67 67
68obj-$(CONFIG_KEXEC) += machine_kexec.o relocate_kernel.o 68obj-$(CONFIG_KEXEC) += machine_kexec.o relocate_kernel.o
69obj-$(CONFIG_EARLY_PRINTK) += early_printk.o 69obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
diff --git a/arch/mips/kernel/entry.S b/arch/mips/kernel/entry.S
index 686249c5c328..e29598ae939d 100644
--- a/arch/mips/kernel/entry.S
+++ b/arch/mips/kernel/entry.S
@@ -84,6 +84,7 @@ FEXPORT(restore_all) # restore full frame
84 LONG_S sp, TI_REGS($28) 84 LONG_S sp, TI_REGS($28)
85 jal deferred_smtc_ipi 85 jal deferred_smtc_ipi
86 LONG_S s0, TI_REGS($28) 86 LONG_S s0, TI_REGS($28)
87#ifdef CONFIG_MIPS_MT_SMTC_IM_BACKSTOP
87/* Re-arm any temporarily masked interrupts not explicitly "acked" */ 88/* Re-arm any temporarily masked interrupts not explicitly "acked" */
88 mfc0 v0, CP0_TCSTATUS 89 mfc0 v0, CP0_TCSTATUS
89 ori v1, v0, TCSTATUS_IXMT 90 ori v1, v0, TCSTATUS_IXMT
@@ -110,6 +111,7 @@ FEXPORT(restore_all) # restore full frame
110 _ehb 111 _ehb
111 xor t0, t0, t3 112 xor t0, t0, t3
112 mtc0 t0, CP0_TCCONTEXT 113 mtc0 t0, CP0_TCCONTEXT
114#endif /* CONFIG_MIPS_MT_SMTC_IM_BACKSTOP */
113#endif /* CONFIG_MIPS_MT_SMTC */ 115#endif /* CONFIG_MIPS_MT_SMTC */
114 .set noat 116 .set noat
115 RESTORE_TEMP 117 RESTORE_TEMP
diff --git a/arch/mips/kernel/genex.S b/arch/mips/kernel/genex.S
index 297bd56c2347..c0f19d638b98 100644
--- a/arch/mips/kernel/genex.S
+++ b/arch/mips/kernel/genex.S
@@ -243,9 +243,11 @@ NESTED(except_vec_vi_handler, 0, sp)
243 */ 243 */
244 mfc0 t1, CP0_STATUS 244 mfc0 t1, CP0_STATUS
245 and t0, a0, t1 245 and t0, a0, t1
246#ifdef CONFIG_MIPS_MT_SMTC_IM_BACKSTOP
246 mfc0 t2, CP0_TCCONTEXT 247 mfc0 t2, CP0_TCCONTEXT
247 or t0, t0, t2 248 or t0, t0, t2
248 mtc0 t0, CP0_TCCONTEXT 249 mtc0 t0, CP0_TCCONTEXT
250#endif /* CONFIG_MIPS_MT_SMTC_IM_BACKSTOP */
249 xor t1, t1, t0 251 xor t1, t1, t0
250 mtc0 t1, CP0_STATUS 252 mtc0 t1, CP0_STATUS
251 _ehb 253 _ehb
diff --git a/arch/mips/kernel/i8253.c b/arch/mips/kernel/pcspeaker.c
index 475df6904219..475df6904219 100644
--- a/arch/mips/kernel/i8253.c
+++ b/arch/mips/kernel/pcspeaker.c
diff --git a/arch/mips/kernel/r4k_switch.S b/arch/mips/kernel/r4k_switch.S
index 06729596812f..d9bfae53c43f 100644
--- a/arch/mips/kernel/r4k_switch.S
+++ b/arch/mips/kernel/r4k_switch.S
@@ -85,12 +85,7 @@
85 move $28, a2 85 move $28, a2
86 cpu_restore_nonscratch a1 86 cpu_restore_nonscratch a1
87 87
88#if (_THREAD_SIZE - 32) < 0x10000 88 PTR_ADDU t0, $28, _THREAD_SIZE - 32
89 PTR_ADDIU t0, $28, _THREAD_SIZE - 32
90#else
91 PTR_LI t0, _THREAD_SIZE - 32
92 PTR_ADDU t0, $28
93#endif
94 set_saved_sp t0, t1, t2 89 set_saved_sp t0, t1, t2
95#ifdef CONFIG_MIPS_MT_SMTC 90#ifdef CONFIG_MIPS_MT_SMTC
96 /* Read-modify-writes of Status must be atomic on a VPE */ 91 /* Read-modify-writes of Status must be atomic on a VPE */
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
index 80ea4fa95bd9..5e9fa83c4ef0 100644
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -373,7 +373,7 @@ asmlinkage void do_be(struct pt_regs *regs)
373 action = MIPS_BE_FIXUP; 373 action = MIPS_BE_FIXUP;
374 374
375 if (board_be_handler) 375 if (board_be_handler)
376 action = board_be_handler(regs, fixup != 0); 376 action = board_be_handler(regs, fixup != NULL);
377 377
378 switch (action) { 378 switch (action) {
379 case MIPS_BE_DISCARD: 379 case MIPS_BE_DISCARD:
diff --git a/arch/mips/lib/dump_tlb.c b/arch/mips/lib/dump_tlb.c
index 1a4db7dc77cb..465ff0ec85b9 100644
--- a/arch/mips/lib/dump_tlb.c
+++ b/arch/mips/lib/dump_tlb.c
@@ -10,6 +10,7 @@
10#include <asm/mipsregs.h> 10#include <asm/mipsregs.h>
11#include <asm/page.h> 11#include <asm/page.h>
12#include <asm/pgtable.h> 12#include <asm/pgtable.h>
13#include <asm/tlbdebug.h>
13 14
14static inline const char *msk2str(unsigned int mask) 15static inline const char *msk2str(unsigned int mask)
15{ 16{
diff --git a/arch/mips/lib/r3k_dump_tlb.c b/arch/mips/lib/r3k_dump_tlb.c
index 52f87795ecc3..9cee907975ae 100644
--- a/arch/mips/lib/r3k_dump_tlb.c
+++ b/arch/mips/lib/r3k_dump_tlb.c
@@ -11,6 +11,7 @@
11#include <asm/mipsregs.h> 11#include <asm/mipsregs.h>
12#include <asm/page.h> 12#include <asm/page.h>
13#include <asm/pgtable.h> 13#include <asm/pgtable.h>
14#include <asm/tlbdebug.h>
14 15
15extern int r3k_have_wired_reg; /* defined in tlb-r3k.c */ 16extern int r3k_have_wired_reg; /* defined in tlb-r3k.c */
16 17
diff --git a/arch/mips/lib/uncached.c b/arch/mips/lib/uncached.c
index 2388f7f3ffde..58d14f4d9349 100644
--- a/arch/mips/lib/uncached.c
+++ b/arch/mips/lib/uncached.c
@@ -12,6 +12,7 @@
12 12
13#include <asm/addrspace.h> 13#include <asm/addrspace.h>
14#include <asm/bug.h> 14#include <asm/bug.h>
15#include <asm/cacheflush.h>
15 16
16#ifndef CKSEG2 17#ifndef CKSEG2
17#define CKSEG2 CKSSEG 18#define CKSEG2 CKSSEG
diff --git a/arch/mips/mipssim/sim_int.c b/arch/mips/mipssim/sim_int.c
index d86b37235cf6..5cbc3509ab52 100644
--- a/arch/mips/mipssim/sim_int.c
+++ b/arch/mips/mipssim/sim_int.c
@@ -77,7 +77,7 @@ asmlinkage void plat_irq_dispatch(void)
77 irq = irq_ffs(pending); 77 irq = irq_ffs(pending);
78 78
79 if (irq > 0) 79 if (irq > 0)
80 do_IRQ(MIPSCPU_INT_BASE + irq); 80 do_IRQ(MIPS_CPU_IRQ_BASE + irq);
81 else 81 else
82 spurious_interrupt(); 82 spurious_interrupt();
83} 83}
diff --git a/arch/mips/mipssim/sim_setup.c b/arch/mips/mipssim/sim_setup.c
index 3643582bdade..60e66906be65 100644
--- a/arch/mips/mipssim/sim_setup.c
+++ b/arch/mips/mipssim/sim_setup.c
@@ -84,7 +84,7 @@ static void __init serial_init(void)
84 /* hardware int 4 - the serial int, is CPU int 6 84 /* hardware int 4 - the serial int, is CPU int 6
85 but poll for now */ 85 but poll for now */
86 s.irq = 0; 86 s.irq = 0;
87 s.uartclk = BASE_BAUD * 16; 87 s.uartclk = 1843200;
88 s.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST; 88 s.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST;
89 s.iotype = UPIO_PORT; 89 s.iotype = UPIO_PORT;
90 s.regshift = 0; 90 s.regshift = 0;
diff --git a/arch/mips/mipssim/sim_time.c b/arch/mips/mipssim/sim_time.c
index 874a18e8ac24..a0f5a5dca1b2 100644
--- a/arch/mips/mipssim/sim_time.c
+++ b/arch/mips/mipssim/sim_time.c
@@ -5,7 +5,6 @@
5#include <linux/spinlock.h> 5#include <linux/spinlock.h>
6#include <linux/interrupt.h> 6#include <linux/interrupt.h>
7#include <linux/mc146818rtc.h> 7#include <linux/mc146818rtc.h>
8#include <linux/mipsregs.h>
9#include <linux/smp.h> 8#include <linux/smp.h>
10#include <linux/timex.h> 9#include <linux/timex.h>
11 10
diff --git a/arch/mips/pci/pci.c b/arch/mips/pci/pci.c
index 8108231f2e20..99d8f4fd3ff4 100644
--- a/arch/mips/pci/pci.c
+++ b/arch/mips/pci/pci.c
@@ -269,7 +269,7 @@ void __devinit pcibios_fixup_bus(struct pci_bus *bus)
269 } 269 }
270 270
271 for (ln = bus->devices.next; ln != &bus->devices; ln = ln->next) { 271 for (ln = bus->devices.next; ln != &bus->devices; ln = ln->next) {
272 struct pci_dev *dev = pci_dev_b(ln); 272 dev = pci_dev_b(ln);
273 273
274 if ((dev->class >> 8) != PCI_CLASS_BRIDGE_PCI) 274 if ((dev->class >> 8) != PCI_CLASS_BRIDGE_PCI)
275 pcibios_fixup_device_resources(dev, bus); 275 pcibios_fixup_device_resources(dev, bus);
diff --git a/arch/mips/sibyte/swarm/time.c b/arch/mips/sibyte/swarm/time.c
deleted file mode 100644
index 97c73c793c35..000000000000
--- a/arch/mips/sibyte/swarm/time.c
+++ /dev/null
@@ -1,244 +0,0 @@
1/*
2 * Copyright (C) 2000, 2001 Broadcom Corporation
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version 2
7 * of the License, or (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
17 */
18
19/*
20 * Time routines for the swarm board. We pass all the hard stuff
21 * through to the sb1250 handling code. Only thing we really keep
22 * track of here is what time of day we think it is. And we don't
23 * really even do a good job of that...
24 */
25
26
27#include <linux/bcd.h>
28#include <linux/init.h>
29#include <linux/time.h>
30#include <linux/sched.h>
31#include <linux/spinlock.h>
32#include <asm/system.h>
33#include <asm/addrspace.h>
34#include <asm/io.h>
35
36#include <asm/sibyte/sb1250.h>
37#include <asm/sibyte/sb1250_regs.h>
38#include <asm/sibyte/sb1250_smbus.h>
39
40static unsigned long long sec_bias = 0;
41static unsigned int usec_bias = 0;
42
43/* Xicor 1241 definitions */
44
45/*
46 * Register bits
47 */
48
49#define X1241REG_SR_BAT 0x80 /* currently on battery power */
50#define X1241REG_SR_RWEL 0x04 /* r/w latch is enabled, can write RTC */
51#define X1241REG_SR_WEL 0x02 /* r/w latch is unlocked, can enable r/w now */
52#define X1241REG_SR_RTCF 0x01 /* clock failed */
53#define X1241REG_BL_BP2 0x80 /* block protect 2 */
54#define X1241REG_BL_BP1 0x40 /* block protect 1 */
55#define X1241REG_BL_BP0 0x20 /* block protect 0 */
56#define X1241REG_BL_WD1 0x10
57#define X1241REG_BL_WD0 0x08
58#define X1241REG_HR_MIL 0x80 /* military time format */
59
60/*
61 * Register numbers
62 */
63
64#define X1241REG_BL 0x10 /* block protect bits */
65#define X1241REG_INT 0x11 /* */
66#define X1241REG_SC 0x30 /* Seconds */
67#define X1241REG_MN 0x31 /* Minutes */
68#define X1241REG_HR 0x32 /* Hours */
69#define X1241REG_DT 0x33 /* Day of month */
70#define X1241REG_MO 0x34 /* Month */
71#define X1241REG_YR 0x35 /* Year */
72#define X1241REG_DW 0x36 /* Day of Week */
73#define X1241REG_Y2K 0x37 /* Year 2K */
74#define X1241REG_SR 0x3F /* Status register */
75
76#define X1241_CCR_ADDRESS 0x6F
77
78#define SMB_CSR(reg) (IOADDR(A_SMB_REGISTER(1, reg)))
79
80static int xicor_read(uint8_t addr)
81{
82 while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
83 ;
84
85 __raw_writeq((addr >> 8) & 0x7, SMB_CSR(R_SMB_CMD));
86 __raw_writeq(addr & 0xff, SMB_CSR(R_SMB_DATA));
87 __raw_writeq(V_SMB_ADDR(X1241_CCR_ADDRESS) | V_SMB_TT_WR2BYTE,
88 SMB_CSR(R_SMB_START));
89
90 while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
91 ;
92
93 __raw_writeq(V_SMB_ADDR(X1241_CCR_ADDRESS) | V_SMB_TT_RD1BYTE,
94 SMB_CSR(R_SMB_START));
95
96 while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
97 ;
98
99 if (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_ERROR) {
100 /* Clear error bit by writing a 1 */
101 __raw_writeq(M_SMB_ERROR, SMB_CSR(R_SMB_STATUS));
102 return -1;
103 }
104
105 return (__raw_readq(SMB_CSR(R_SMB_DATA)) & 0xff);
106}
107
108static int xicor_write(uint8_t addr, int b)
109{
110 while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
111 ;
112
113 __raw_writeq(addr, SMB_CSR(R_SMB_CMD));
114 __raw_writeq((addr & 0xff) | ((b & 0xff) << 8), SMB_CSR(R_SMB_DATA));
115 __raw_writeq(V_SMB_ADDR(X1241_CCR_ADDRESS) | V_SMB_TT_WR3BYTE,
116 SMB_CSR(R_SMB_START));
117
118 while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
119 ;
120
121 if (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_ERROR) {
122 /* Clear error bit by writing a 1 */
123 __raw_writeq(M_SMB_ERROR, SMB_CSR(R_SMB_STATUS));
124 return -1;
125 } else {
126 return 0;
127 }
128}
129
130/*
131 * In order to set the CMOS clock precisely, set_rtc_mmss has to be
132 * called 500 ms after the second nowtime has started, because when
133 * nowtime is written into the registers of the CMOS clock, it will
134 * jump to the next second precisely 500 ms later. Check the Motorola
135 * MC146818A or Dallas DS12887 data sheet for details.
136 *
137 * BUG: This routine does not handle hour overflow properly; it just
138 * sets the minutes. Usually you'll only notice that after reboot!
139 */
140int set_rtc_mmss(unsigned long nowtime)
141{
142 int retval = 0;
143 int real_seconds, real_minutes, cmos_minutes;
144
145 cmos_minutes = xicor_read(X1241REG_MN);
146 cmos_minutes = BCD2BIN(cmos_minutes);
147
148 /*
149 * since we're only adjusting minutes and seconds,
150 * don't interfere with hour overflow. This avoids
151 * messing with unknown time zones but requires your
152 * RTC not to be off by more than 15 minutes
153 */
154 real_seconds = nowtime % 60;
155 real_minutes = nowtime / 60;
156 if (((abs(real_minutes - cmos_minutes) + 15)/30) & 1)
157 real_minutes += 30; /* correct for half hour time zone */
158 real_minutes %= 60;
159
160 /* unlock writes to the CCR */
161 xicor_write(X1241REG_SR, X1241REG_SR_WEL);
162 xicor_write(X1241REG_SR, X1241REG_SR_WEL | X1241REG_SR_RWEL);
163
164 if (abs(real_minutes - cmos_minutes) < 30) {
165 real_seconds = BIN2BCD(real_seconds);
166 real_minutes = BIN2BCD(real_minutes);
167 xicor_write(X1241REG_SC, real_seconds);
168 xicor_write(X1241REG_MN, real_minutes);
169 } else {
170 printk(KERN_WARNING
171 "set_rtc_mmss: can't update from %d to %d\n",
172 cmos_minutes, real_minutes);
173 retval = -1;
174 }
175
176 xicor_write(X1241REG_SR, 0);
177
178 printk("set_rtc_mmss: %02d:%02d\n", real_minutes, real_seconds);
179
180 return retval;
181}
182
183static unsigned long __init get_swarm_time(void)
184{
185 unsigned int year, mon, day, hour, min, sec, y2k;
186
187 sec = xicor_read(X1241REG_SC);
188 min = xicor_read(X1241REG_MN);
189 hour = xicor_read(X1241REG_HR);
190
191 if (hour & X1241REG_HR_MIL) {
192 hour &= 0x3f;
193 } else {
194 if (hour & 0x20)
195 hour = (hour & 0xf) + 0x12;
196 }
197
198 sec = BCD2BIN(sec);
199 min = BCD2BIN(min);
200 hour = BCD2BIN(hour);
201
202 day = xicor_read(X1241REG_DT);
203 mon = xicor_read(X1241REG_MO);
204 year = xicor_read(X1241REG_YR);
205 y2k = xicor_read(X1241REG_Y2K);
206
207 day = BCD2BIN(day);
208 mon = BCD2BIN(mon);
209 year = BCD2BIN(year);
210 y2k = BCD2BIN(y2k);
211
212 year += (y2k * 100);
213
214 return mktime(year, mon, day, hour, min, sec);
215}
216
217/*
218 * Bring up the timer at 100 Hz.
219 */
220void __init swarm_time_init(void)
221{
222 unsigned int flags;
223 int status;
224
225 /* Set up the scd general purpose timer 0 to cpu 0 */
226 sb1250_time_init();
227
228 /* Establish communication with the Xicor 1241 RTC */
229 /* XXXKW how do I share the SMBus with the I2C subsystem? */
230
231 __raw_writeq(K_SMB_FREQ_400KHZ, SMB_CSR(R_SMB_FREQ));
232 __raw_writeq(0, SMB_CSR(R_SMB_CONTROL));
233
234 if ((status = xicor_read(X1241REG_SR_RTCF)) < 0) {
235 printk("x1241: couldn't detect on SWARM SMBus 1\n");
236 } else {
237 if (status & X1241REG_SR_RTCF)
238 printk("x1241: battery failed -- time is probably wrong\n");
239 write_seqlock_irqsave(&xtime_lock, flags);
240 xtime.tv_sec = get_swarm_time();
241 xtime.tv_nsec = 0;
242 write_sequnlock_irqrestore(&xtime_lock, flags);
243 }
244}
diff --git a/arch/mips/sni/a20r.c b/arch/mips/sni/a20r.c
index 6850a29defcd..acc9ba76c1a9 100644
--- a/arch/mips/sni/a20r.c
+++ b/arch/mips/sni/a20r.c
@@ -87,8 +87,8 @@ static struct platform_device snirm_82596_pdev = {
87 87
88static struct resource snirm_53c710_rsrc[] = { 88static struct resource snirm_53c710_rsrc[] = {
89 { 89 {
90 .start = 0xb9000000, 90 .start = 0x19000000,
91 .end = 0xb90fffff, 91 .end = 0x190fffff,
92 .flags = IORESOURCE_MEM 92 .flags = IORESOURCE_MEM
93 }, 93 },
94 { 94 {
@@ -106,8 +106,8 @@ static struct platform_device snirm_53c710_pdev = {
106 106
107static struct resource sc26xx_rsrc[] = { 107static struct resource sc26xx_rsrc[] = {
108 { 108 {
109 .start = 0xbc070000, 109 .start = 0x1c070000,
110 .end = 0xbc0700ff, 110 .end = 0x1c0700ff,
111 .flags = IORESOURCE_MEM 111 .flags = IORESOURCE_MEM
112 }, 112 },
113 { 113 {
diff --git a/arch/mips/sni/rm200.c b/arch/mips/sni/rm200.c
index 4bfda020fdc7..28a11d8605ce 100644
--- a/arch/mips/sni/rm200.c
+++ b/arch/mips/sni/rm200.c
@@ -88,8 +88,8 @@ static struct platform_device snirm_82596_rm200_pdev = {
88 88
89static struct resource snirm_53c710_rm200_rsrc[] = { 89static struct resource snirm_53c710_rm200_rsrc[] = {
90 { 90 {
91 .start = 0xb9000000, 91 .start = 0x19000000,
92 .end = 0xb90fffff, 92 .end = 0x190fffff,
93 .flags = IORESOURCE_MEM 93 .flags = IORESOURCE_MEM
94 }, 94 },
95 { 95 {
diff --git a/arch/mips/vr41xx/common/Makefile b/arch/mips/vr41xx/common/Makefile
index f842783acd86..d0d84ec8d63d 100644
--- a/arch/mips/vr41xx/common/Makefile
+++ b/arch/mips/vr41xx/common/Makefile
@@ -2,4 +2,4 @@
2# Makefile for common code of the NEC VR4100 series. 2# Makefile for common code of the NEC VR4100 series.
3# 3#
4 4
5obj-y += bcu.o cmu.o icu.o init.o irq.o pmu.o type.o 5obj-y += bcu.o cmu.o giu.o icu.o init.o irq.o pmu.o rtc.o siu.o type.o
diff --git a/arch/mips/vr41xx/common/giu.c b/arch/mips/vr41xx/common/giu.c
new file mode 100644
index 000000000000..d21f6f2d22a3
--- /dev/null
+++ b/arch/mips/vr41xx/common/giu.c
@@ -0,0 +1,122 @@
1/*
2 * NEC VR4100 series GIU platform device.
3 *
4 * Copyright (C) 2007 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
19 */
20#include <linux/errno.h>
21#include <linux/init.h>
22#include <linux/ioport.h>
23#include <linux/platform_device.h>
24
25#include <asm/cpu.h>
26#include <asm/vr41xx/giu.h>
27#include <asm/vr41xx/irq.h>
28
29static struct resource giu_50pins_pullupdown_resource[] __initdata = {
30 {
31 .start = 0x0b000100,
32 .end = 0x0b00011f,
33 .flags = IORESOURCE_MEM,
34 },
35 {
36 .start = 0x0b0002e0,
37 .end = 0x0b0002e3,
38 .flags = IORESOURCE_MEM,
39 },
40 {
41 .start = GIUINT_IRQ,
42 .end = GIUINT_IRQ,
43 .flags = IORESOURCE_IRQ,
44 },
45};
46
47static struct resource giu_36pins_resource[] __initdata = {
48 {
49 .start = 0x0f000140,
50 .end = 0x0f00015f,
51 .flags = IORESOURCE_MEM,
52 },
53 {
54 .start = GIUINT_IRQ,
55 .end = GIUINT_IRQ,
56 .flags = IORESOURCE_IRQ,
57 },
58};
59
60static struct resource giu_48pins_resource[] __initdata = {
61 {
62 .start = 0x0f000140,
63 .end = 0x0f000167,
64 .flags = IORESOURCE_MEM,
65 },
66 {
67 .start = GIUINT_IRQ,
68 .end = GIUINT_IRQ,
69 .flags = IORESOURCE_IRQ,
70 },
71};
72
73static int __init vr41xx_giu_add(void)
74{
75 struct platform_device *pdev;
76 struct resource *res;
77 unsigned int num;
78 int retval;
79
80 pdev = platform_device_alloc("GIU", -1);
81 if (!pdev)
82 return -ENOMEM;
83
84 switch (current_cpu_data.cputype) {
85 case CPU_VR4111:
86 case CPU_VR4121:
87 pdev->id = GPIO_50PINS_PULLUPDOWN;
88 res = giu_50pins_pullupdown_resource;
89 num = ARRAY_SIZE(giu_50pins_pullupdown_resource);
90 break;
91 case CPU_VR4122:
92 case CPU_VR4131:
93 pdev->id = GPIO_36PINS;
94 res = giu_36pins_resource;
95 num = ARRAY_SIZE(giu_36pins_resource);
96 break;
97 case CPU_VR4133:
98 pdev->id = GPIO_48PINS_EDGE_SELECT;
99 res = giu_48pins_resource;
100 num = ARRAY_SIZE(giu_48pins_resource);
101 break;
102 default:
103 retval = -ENODEV;
104 goto err_free_device;
105 }
106
107 retval = platform_device_add_resources(pdev, res, num);
108 if (retval)
109 goto err_free_device;
110
111 retval = platform_device_add(pdev);
112 if (retval)
113 goto err_free_device;
114
115 return 0;
116
117err_free_device:
118 platform_device_put(pdev);
119
120 return retval;
121}
122device_initcall(vr41xx_giu_add);
diff --git a/arch/mips/vr41xx/common/rtc.c b/arch/mips/vr41xx/common/rtc.c
new file mode 100644
index 000000000000..cce605b3d688
--- /dev/null
+++ b/arch/mips/vr41xx/common/rtc.c
@@ -0,0 +1,117 @@
1/*
2 * NEC VR4100 series RTC platform device.
3 *
4 * Copyright (C) 2007 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
19 */
20#include <linux/errno.h>
21#include <linux/init.h>
22#include <linux/ioport.h>
23#include <linux/platform_device.h>
24
25#include <asm/cpu.h>
26#include <asm/vr41xx/irq.h>
27
28static struct resource rtc_type1_resource[] __initdata = {
29 {
30 .start = 0x0b0000c0,
31 .end = 0x0b0000df,
32 .flags = IORESOURCE_MEM,
33 },
34 {
35 .start = 0x0b0001c0,
36 .end = 0x0b0001df,
37 .flags = IORESOURCE_MEM,
38 },
39 {
40 .start = ELAPSEDTIME_IRQ,
41 .end = ELAPSEDTIME_IRQ,
42 .flags = IORESOURCE_IRQ,
43 },
44 {
45 .start = RTCLONG1_IRQ,
46 .end = RTCLONG1_IRQ,
47 .flags = IORESOURCE_IRQ,
48 },
49};
50
51static struct resource rtc_type2_resource[] __initdata = {
52 {
53 .start = 0x0f000100,
54 .end = 0x0f00011f,
55 .flags = IORESOURCE_MEM,
56 },
57 {
58 .start = 0x0f000120,
59 .end = 0x0f00013f,
60 .flags = IORESOURCE_MEM,
61 },
62 {
63 .start = ELAPSEDTIME_IRQ,
64 .end = ELAPSEDTIME_IRQ,
65 .flags = IORESOURCE_IRQ,
66 },
67 {
68 .start = RTCLONG1_IRQ,
69 .end = RTCLONG1_IRQ,
70 .flags = IORESOURCE_IRQ,
71 },
72};
73
74static int __init vr41xx_rtc_add(void)
75{
76 struct platform_device *pdev;
77 struct resource *res;
78 unsigned int num;
79 int retval;
80
81 pdev = platform_device_alloc("RTC", -1);
82 if (!pdev)
83 return -ENOMEM;
84
85 switch (current_cpu_data.cputype) {
86 case CPU_VR4111:
87 case CPU_VR4121:
88 res = rtc_type1_resource;
89 num = ARRAY_SIZE(rtc_type1_resource);
90 break;
91 case CPU_VR4122:
92 case CPU_VR4131:
93 case CPU_VR4133:
94 res = rtc_type2_resource;
95 num = ARRAY_SIZE(rtc_type2_resource);
96 break;
97 default:
98 retval = -ENODEV;
99 goto err_free_device;
100 }
101
102 retval = platform_device_add_resources(pdev, res, num);
103 if (retval)
104 goto err_free_device;
105
106 retval = platform_device_add(pdev);
107 if (retval)
108 goto err_free_device;
109
110 return 0;
111
112err_free_device:
113 platform_device_put(pdev);
114
115 return retval;
116}
117device_initcall(vr41xx_rtc_add);
diff --git a/arch/mips/vr41xx/common/siu.c b/arch/mips/vr41xx/common/siu.c
new file mode 100644
index 000000000000..a1e774142163
--- /dev/null
+++ b/arch/mips/vr41xx/common/siu.c
@@ -0,0 +1,120 @@
1/*
2 * NEC VR4100 series SIU platform device.
3 *
4 * Copyright (C) 2007 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
19 */
20#include <linux/errno.h>
21#include <linux/init.h>
22#include <linux/ioport.h>
23#include <linux/platform_device.h>
24#include <linux/serial_core.h>
25
26#include <asm/cpu.h>
27#include <asm/vr41xx/siu.h>
28
29static unsigned int siu_type1_ports[SIU_PORTS_MAX] __initdata = {
30 PORT_VR41XX_SIU,
31 PORT_UNKNOWN,
32};
33
34static struct resource siu_type1_resource[] __initdata = {
35 {
36 .start = 0x0c000000,
37 .end = 0x0c00000a,
38 .flags = IORESOURCE_MEM,
39 },
40 {
41 .start = SIU_IRQ,
42 .end = SIU_IRQ,
43 .flags = IORESOURCE_IRQ,
44 },
45};
46
47static unsigned int siu_type2_ports[SIU_PORTS_MAX] __initdata = {
48 PORT_VR41XX_SIU,
49 PORT_VR41XX_DSIU,
50};
51
52static struct resource siu_type2_resource[] __initdata = {
53 {
54 .start = 0x0f000800,
55 .end = 0x0f00080a,
56 .flags = IORESOURCE_MEM,
57 },
58 {
59 .start = 0x0f000820,
60 .end = 0x0f000829,
61 .flags = IORESOURCE_MEM,
62 },
63 {
64 .start = SIU_IRQ,
65 .end = SIU_IRQ,
66 .flags = IORESOURCE_IRQ,
67 },
68 {
69 .start = DSIU_IRQ,
70 .end = DSIU_IRQ,
71 .flags = IORESOURCE_IRQ,
72 },
73};
74
75static int __init vr41xx_siu_add(void)
76{
77 struct platform_device *pdev;
78 struct resource *res;
79 unsigned int num;
80 int retval;
81
82 pdev = platform_device_alloc("SIU", -1);
83 if (!pdev)
84 return -ENOMEM;
85
86 switch (current_cpu_data.cputype) {
87 case CPU_VR4111:
88 case CPU_VR4121:
89 pdev->dev.platform_data = siu_type1_ports;
90 res = siu_type1_resource;
91 num = ARRAY_SIZE(siu_type1_resource);
92 break;
93 case CPU_VR4122:
94 case CPU_VR4131:
95 case CPU_VR4133:
96 pdev->dev.platform_data = siu_type2_ports;
97 res = siu_type2_resource;
98 num = ARRAY_SIZE(siu_type2_resource);
99 break;
100 default:
101 retval = -ENODEV;
102 goto err_free_device;
103 }
104
105 retval = platform_device_add_resources(pdev, res, num);
106 if (retval)
107 goto err_free_device;
108
109 retval = platform_device_add(pdev);
110 if (retval)
111 goto err_free_device;
112
113 return 0;
114
115err_free_device:
116 platform_device_put(pdev);
117
118 return retval;
119}
120device_initcall(vr41xx_siu_add);