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authorAndi Kleen <ak@suse.de>2007-07-03 19:38:13 -0400
committerLinus Torvalds <torvalds@woody.linux-foundation.org>2007-07-03 21:11:35 -0400
commit5dcccd8d7eae870d85c3f175fd0823d3da07d0e3 (patch)
tree87bf8efa01f2a668e01f48157f59ca42fe7be5d5 /arch
parent0f8dc2f06560e2ca126d1670a24126ba08357d38 (diff)
Revert perfctr reservation to 2.6.21 state
With this change it works again when the nmi watchdog is disabled. Signed-off-by: Andi Kleen <ak@suse.de> Cc: Björn Steinbrink <B.Steinbrink@gmx.de> Cc: Stephane Eranian <eranian@hpl.hp.com> Cc: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/i386/kernel/cpu/perfctr-watchdog.c35
1 files changed, 33 insertions, 2 deletions
diff --git a/arch/i386/kernel/cpu/perfctr-watchdog.c b/arch/i386/kernel/cpu/perfctr-watchdog.c
index f0b67630b90d..4d26d514c56f 100644
--- a/arch/i386/kernel/cpu/perfctr-watchdog.c
+++ b/arch/i386/kernel/cpu/perfctr-watchdog.c
@@ -55,14 +55,45 @@ static DEFINE_PER_CPU(struct nmi_watchdog_ctlblk, nmi_watchdog_ctlblk);
55/* converts an msr to an appropriate reservation bit */ 55/* converts an msr to an appropriate reservation bit */
56static inline unsigned int nmi_perfctr_msr_to_bit(unsigned int msr) 56static inline unsigned int nmi_perfctr_msr_to_bit(unsigned int msr)
57{ 57{
58 return wd_ops ? msr - wd_ops->perfctr : 0; 58 /* returns the bit offset of the performance counter register */
59 switch (boot_cpu_data.x86_vendor) {
60 case X86_VENDOR_AMD:
61 return (msr - MSR_K7_PERFCTR0);
62 case X86_VENDOR_INTEL:
63 if (cpu_has(&boot_cpu_data, X86_FEATURE_ARCH_PERFMON))
64 return (msr - MSR_ARCH_PERFMON_PERFCTR0);
65
66 switch (boot_cpu_data.x86) {
67 case 6:
68 return (msr - MSR_P6_PERFCTR0);
69 case 15:
70 return (msr - MSR_P4_BPU_PERFCTR0);
71 }
72 }
73 return 0;
59} 74}
60 75
61/* converts an msr to an appropriate reservation bit */ 76/* converts an msr to an appropriate reservation bit */
62/* returns the bit offset of the event selection register */ 77/* returns the bit offset of the event selection register */
63static inline unsigned int nmi_evntsel_msr_to_bit(unsigned int msr) 78static inline unsigned int nmi_evntsel_msr_to_bit(unsigned int msr)
64{ 79{
65 return wd_ops ? msr - wd_ops->evntsel : 0; 80 /* returns the bit offset of the event selection register */
81 switch (boot_cpu_data.x86_vendor) {
82 case X86_VENDOR_AMD:
83 return (msr - MSR_K7_EVNTSEL0);
84 case X86_VENDOR_INTEL:
85 if (cpu_has(&boot_cpu_data, X86_FEATURE_ARCH_PERFMON))
86 return (msr - MSR_ARCH_PERFMON_EVENTSEL0);
87
88 switch (boot_cpu_data.x86) {
89 case 6:
90 return (msr - MSR_P6_EVNTSEL0);
91 case 15:
92 return (msr - MSR_P4_BSU_ESCR0);
93 }
94 }
95 return 0;
96
66} 97}
67 98
68/* checks for a bit availability (hack for oprofile) */ 99/* checks for a bit availability (hack for oprofile) */