diff options
author | David Howells <dhowells@redhat.com> | 2006-12-05 09:37:56 -0500 |
---|---|---|
committer | David Howells <dhowells@warthog.cambridge.redhat.com> | 2006-12-05 09:37:56 -0500 |
commit | 4c1ac1b49122b805adfa4efc620592f68dccf5db (patch) | |
tree | 87557f4bc2fd4fe65b7570489c2f610c45c0adcd /arch | |
parent | c4028958b6ecad064b1a6303a6a5906d4fe48d73 (diff) | |
parent | d916faace3efc0bf19fe9a615a1ab8fa1a24cd93 (diff) |
Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6
Conflicts:
drivers/infiniband/core/iwcm.c
drivers/net/chelsio/cxgb2.c
drivers/net/wireless/bcm43xx/bcm43xx_main.c
drivers/net/wireless/prism54/islpci_eth.c
drivers/usb/core/hub.h
drivers/usb/input/hid-core.c
net/core/netpoll.c
Fix up merge failures with Linus's head and fix new compilation failures.
Signed-Off-By: David Howells <dhowells@redhat.com>
Diffstat (limited to 'arch')
166 files changed, 2534 insertions, 3060 deletions
diff --git a/arch/alpha/lib/checksum.c b/arch/alpha/lib/checksum.c index 89044e6385fe..ab3761c437a8 100644 --- a/arch/alpha/lib/checksum.c +++ b/arch/alpha/lib/checksum.c | |||
@@ -41,28 +41,25 @@ static inline unsigned short from64to16(unsigned long x) | |||
41 | * computes the checksum of the TCP/UDP pseudo-header | 41 | * computes the checksum of the TCP/UDP pseudo-header |
42 | * returns a 16-bit checksum, already complemented. | 42 | * returns a 16-bit checksum, already complemented. |
43 | */ | 43 | */ |
44 | unsigned short int csum_tcpudp_magic(unsigned long saddr, | 44 | __sum16 csum_tcpudp_magic(__be32 saddr, __be32 daddr, |
45 | unsigned long daddr, | ||
46 | unsigned short len, | 45 | unsigned short len, |
47 | unsigned short proto, | 46 | unsigned short proto, |
48 | unsigned int sum) | 47 | __wsum sum) |
49 | { | 48 | { |
50 | return ~from64to16(saddr + daddr + sum + | 49 | return (__force __sum16)~from64to16( |
51 | ((unsigned long) ntohs(len) << 16) + | 50 | (__force u64)saddr + (__force u64)daddr + |
52 | ((unsigned long) proto << 8)); | 51 | (__force u64)sum + ((len + proto) << 8)); |
53 | } | 52 | } |
54 | 53 | ||
55 | unsigned int csum_tcpudp_nofold(unsigned long saddr, | 54 | __wsum csum_tcpudp_nofold(__be32 saddr, __be32 daddr, |
56 | unsigned long daddr, | ||
57 | unsigned short len, | 55 | unsigned short len, |
58 | unsigned short proto, | 56 | unsigned short proto, |
59 | unsigned int sum) | 57 | __wsum sum) |
60 | { | 58 | { |
61 | unsigned long result; | 59 | unsigned long result; |
62 | 60 | ||
63 | result = (saddr + daddr + sum + | 61 | result = (__force u64)saddr + (__force u64)daddr + |
64 | ((unsigned long) ntohs(len) << 16) + | 62 | (__force u64)sum + ((len + proto) << 8); |
65 | ((unsigned long) proto << 8)); | ||
66 | 63 | ||
67 | /* Fold down to 32-bits so we don't lose in the typedef-less | 64 | /* Fold down to 32-bits so we don't lose in the typedef-less |
68 | network stack. */ | 65 | network stack. */ |
@@ -70,7 +67,7 @@ unsigned int csum_tcpudp_nofold(unsigned long saddr, | |||
70 | result = (result & 0xffffffff) + (result >> 32); | 67 | result = (result & 0xffffffff) + (result >> 32); |
71 | /* 33 to 32 */ | 68 | /* 33 to 32 */ |
72 | result = (result & 0xffffffff) + (result >> 32); | 69 | result = (result & 0xffffffff) + (result >> 32); |
73 | return result; | 70 | return (__force __wsum)result; |
74 | } | 71 | } |
75 | 72 | ||
76 | /* | 73 | /* |
@@ -146,9 +143,9 @@ out: | |||
146 | * This is a version of ip_compute_csum() optimized for IP headers, | 143 | * This is a version of ip_compute_csum() optimized for IP headers, |
147 | * which always checksum on 4 octet boundaries. | 144 | * which always checksum on 4 octet boundaries. |
148 | */ | 145 | */ |
149 | unsigned short ip_fast_csum(unsigned char * iph, unsigned int ihl) | 146 | __sum16 ip_fast_csum(const void *iph, unsigned int ihl) |
150 | { | 147 | { |
151 | return ~do_csum(iph,ihl*4); | 148 | return (__force __sum16)~do_csum(iph,ihl*4); |
152 | } | 149 | } |
153 | 150 | ||
154 | /* | 151 | /* |
@@ -163,15 +160,15 @@ unsigned short ip_fast_csum(unsigned char * iph, unsigned int ihl) | |||
163 | * | 160 | * |
164 | * it's best to have buff aligned on a 32-bit boundary | 161 | * it's best to have buff aligned on a 32-bit boundary |
165 | */ | 162 | */ |
166 | unsigned int csum_partial(const unsigned char * buff, int len, unsigned int sum) | 163 | __wsum csum_partial(const void *buff, int len, __wsum sum) |
167 | { | 164 | { |
168 | unsigned long result = do_csum(buff, len); | 165 | unsigned long result = do_csum(buff, len); |
169 | 166 | ||
170 | /* add in old sum, and carry.. */ | 167 | /* add in old sum, and carry.. */ |
171 | result += sum; | 168 | result += (__force u32)sum; |
172 | /* 32+c bits -> 32 bits */ | 169 | /* 32+c bits -> 32 bits */ |
173 | result = (result & 0xffffffff) + (result >> 32); | 170 | result = (result & 0xffffffff) + (result >> 32); |
174 | return result; | 171 | return (__force __wsum)result; |
175 | } | 172 | } |
176 | 173 | ||
177 | EXPORT_SYMBOL(csum_partial); | 174 | EXPORT_SYMBOL(csum_partial); |
@@ -180,7 +177,7 @@ EXPORT_SYMBOL(csum_partial); | |||
180 | * this routine is used for miscellaneous IP-like checksums, mainly | 177 | * this routine is used for miscellaneous IP-like checksums, mainly |
181 | * in icmp.c | 178 | * in icmp.c |
182 | */ | 179 | */ |
183 | unsigned short ip_compute_csum(unsigned char * buff, int len) | 180 | __sum16 ip_compute_csum(const void *buff, int len) |
184 | { | 181 | { |
185 | return ~from64to16(do_csum(buff,len)); | 182 | return (__force __sum16)~from64to16(do_csum(buff,len)); |
186 | } | 183 | } |
diff --git a/arch/alpha/lib/csum_partial_copy.c b/arch/alpha/lib/csum_partial_copy.c index a37948f3037a..4ca75c74ce90 100644 --- a/arch/alpha/lib/csum_partial_copy.c +++ b/arch/alpha/lib/csum_partial_copy.c | |||
@@ -329,11 +329,11 @@ csum_partial_cfu_unaligned(const unsigned long __user * src, | |||
329 | return checksum; | 329 | return checksum; |
330 | } | 330 | } |
331 | 331 | ||
332 | static unsigned int | 332 | __wsum |
333 | do_csum_partial_copy_from_user(const char __user *src, char *dst, int len, | 333 | csum_partial_copy_from_user(const void __user *src, void *dst, int len, |
334 | unsigned int sum, int *errp) | 334 | __wsum sum, int *errp) |
335 | { | 335 | { |
336 | unsigned long checksum = (unsigned) sum; | 336 | unsigned long checksum = (__force u32) sum; |
337 | unsigned long soff = 7 & (unsigned long) src; | 337 | unsigned long soff = 7 & (unsigned long) src; |
338 | unsigned long doff = 7 & (unsigned long) dst; | 338 | unsigned long doff = 7 & (unsigned long) dst; |
339 | 339 | ||
@@ -367,25 +367,12 @@ do_csum_partial_copy_from_user(const char __user *src, char *dst, int len, | |||
367 | } | 367 | } |
368 | checksum = from64to16 (checksum); | 368 | checksum = from64to16 (checksum); |
369 | } | 369 | } |
370 | return checksum; | 370 | return (__force __wsum)checksum; |
371 | } | ||
372 | |||
373 | unsigned int | ||
374 | csum_partial_copy_from_user(const char __user *src, char *dst, int len, | ||
375 | unsigned int sum, int *errp) | ||
376 | { | ||
377 | if (!access_ok(VERIFY_READ, src, len)) { | ||
378 | *errp = -EFAULT; | ||
379 | memset(dst, 0, len); | ||
380 | return sum; | ||
381 | } | ||
382 | |||
383 | return do_csum_partial_copy_from_user(src, dst, len, sum, errp); | ||
384 | } | 371 | } |
385 | 372 | ||
386 | unsigned int | 373 | __wsum |
387 | csum_partial_copy_nocheck(const char __user *src, char *dst, int len, | 374 | csum_partial_copy_nocheck(const void *src, void *dst, int len, __wsum sum) |
388 | unsigned int sum) | ||
389 | { | 375 | { |
390 | return do_csum_partial_copy_from_user(src, dst, len, sum, NULL); | 376 | return csum_partial_copy_from_user((__force const void __user *)src, |
377 | dst, len, sum, NULL); | ||
391 | } | 378 | } |
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index adb05de40e24..ce00c570459d 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig | |||
@@ -879,6 +879,8 @@ endif | |||
879 | 879 | ||
880 | source "drivers/scsi/Kconfig" | 880 | source "drivers/scsi/Kconfig" |
881 | 881 | ||
882 | source "drivers/ata/Kconfig" | ||
883 | |||
882 | source "drivers/md/Kconfig" | 884 | source "drivers/md/Kconfig" |
883 | 885 | ||
884 | source "drivers/message/fusion/Kconfig" | 886 | source "drivers/message/fusion/Kconfig" |
diff --git a/arch/arm/configs/assabet_defconfig b/arch/arm/configs/assabet_defconfig index 089c9d598409..b1cd331aaecf 100644 --- a/arch/arm/configs/assabet_defconfig +++ b/arch/arm/configs/assabet_defconfig | |||
@@ -184,6 +184,7 @@ CONFIG_BINFMT_ELF=y | |||
184 | # Power management options | 184 | # Power management options |
185 | # | 185 | # |
186 | CONFIG_PM=y | 186 | CONFIG_PM=y |
187 | # CONFIG_PM_LEGACY is not set | ||
187 | # CONFIG_APM is not set | 188 | # CONFIG_APM is not set |
188 | 189 | ||
189 | # | 190 | # |
diff --git a/arch/arm/configs/cerfcube_defconfig b/arch/arm/configs/cerfcube_defconfig index f81a60005cd3..09b7acd7f647 100644 --- a/arch/arm/configs/cerfcube_defconfig +++ b/arch/arm/configs/cerfcube_defconfig | |||
@@ -194,6 +194,7 @@ CONFIG_BINFMT_ELF=y | |||
194 | # Power management options | 194 | # Power management options |
195 | # | 195 | # |
196 | CONFIG_PM=y | 196 | CONFIG_PM=y |
197 | # CONFIG_PM_LEGACY is not set | ||
197 | # CONFIG_APM is not set | 198 | # CONFIG_APM is not set |
198 | 199 | ||
199 | # | 200 | # |
diff --git a/arch/arm/configs/corgi_defconfig b/arch/arm/configs/corgi_defconfig index 3c3461e83398..c41c04fa5020 100644 --- a/arch/arm/configs/corgi_defconfig +++ b/arch/arm/configs/corgi_defconfig | |||
@@ -208,6 +208,7 @@ CONFIG_BINFMT_MISC=m | |||
208 | # Power management options | 208 | # Power management options |
209 | # | 209 | # |
210 | CONFIG_PM=y | 210 | CONFIG_PM=y |
211 | # CONFIG_PM_LEGACY is not set | ||
211 | CONFIG_APM=y | 212 | CONFIG_APM=y |
212 | 213 | ||
213 | # | 214 | # |
diff --git a/arch/arm/configs/h3600_defconfig b/arch/arm/configs/h3600_defconfig index 7a0da0b7facb..8f986e9f1c62 100644 --- a/arch/arm/configs/h3600_defconfig +++ b/arch/arm/configs/h3600_defconfig | |||
@@ -194,6 +194,7 @@ CONFIG_BINFMT_ELF=y | |||
194 | # Power management options | 194 | # Power management options |
195 | # | 195 | # |
196 | CONFIG_PM=y | 196 | CONFIG_PM=y |
197 | # CONFIG_PM_LEGACY is not set | ||
197 | # CONFIG_APM is not set | 198 | # CONFIG_APM is not set |
198 | 199 | ||
199 | # | 200 | # |
diff --git a/arch/arm/configs/integrator_defconfig b/arch/arm/configs/integrator_defconfig index d1ba7fdde818..692ab57ba1ca 100644 --- a/arch/arm/configs/integrator_defconfig +++ b/arch/arm/configs/integrator_defconfig | |||
@@ -190,6 +190,7 @@ CONFIG_BINFMT_ELF=y | |||
190 | # Power management options | 190 | # Power management options |
191 | # | 191 | # |
192 | CONFIG_PM=y | 192 | CONFIG_PM=y |
193 | # CONFIG_PM_LEGACY is not set | ||
193 | # CONFIG_APM is not set | 194 | # CONFIG_APM is not set |
194 | 195 | ||
195 | # | 196 | # |
diff --git a/arch/arm/configs/jornada720_defconfig b/arch/arm/configs/jornada720_defconfig index ad1048db96fb..80a6fd97eb32 100644 --- a/arch/arm/configs/jornada720_defconfig +++ b/arch/arm/configs/jornada720_defconfig | |||
@@ -182,6 +182,7 @@ CONFIG_BINFMT_AOUT=m | |||
182 | # Power management options | 182 | # Power management options |
183 | # | 183 | # |
184 | CONFIG_PM=y | 184 | CONFIG_PM=y |
185 | # CONFIG_PM_LEGACY is not set | ||
185 | # CONFIG_APM is not set | 186 | # CONFIG_APM is not set |
186 | 187 | ||
187 | # | 188 | # |
diff --git a/arch/arm/configs/lart_defconfig b/arch/arm/configs/lart_defconfig index c3a932844160..a1cc34f25602 100644 --- a/arch/arm/configs/lart_defconfig +++ b/arch/arm/configs/lart_defconfig | |||
@@ -180,6 +180,7 @@ CONFIG_BINFMT_AOUT=y | |||
180 | # Power management options | 180 | # Power management options |
181 | # | 181 | # |
182 | CONFIG_PM=y | 182 | CONFIG_PM=y |
183 | # CONFIG_PM_LEGACY is not set | ||
183 | CONFIG_APM=m | 184 | CONFIG_APM=m |
184 | 185 | ||
185 | # | 186 | # |
diff --git a/arch/arm/configs/neponset_defconfig b/arch/arm/configs/neponset_defconfig index 3d35255c64ed..df8168e57b7c 100644 --- a/arch/arm/configs/neponset_defconfig +++ b/arch/arm/configs/neponset_defconfig | |||
@@ -190,6 +190,7 @@ CONFIG_BINFMT_AOUT=y | |||
190 | # Power management options | 190 | # Power management options |
191 | # | 191 | # |
192 | CONFIG_PM=y | 192 | CONFIG_PM=y |
193 | # CONFIG_PM_LEGACY is not set | ||
193 | CONFIG_APM=y | 194 | CONFIG_APM=y |
194 | 195 | ||
195 | # | 196 | # |
diff --git a/arch/arm/configs/simpad_defconfig b/arch/arm/configs/simpad_defconfig index 2e5a616cc98d..140056a3507f 100644 --- a/arch/arm/configs/simpad_defconfig +++ b/arch/arm/configs/simpad_defconfig | |||
@@ -180,6 +180,7 @@ CONFIG_BINFMT_MISC=m | |||
180 | # Power management options | 180 | # Power management options |
181 | # | 181 | # |
182 | CONFIG_PM=y | 182 | CONFIG_PM=y |
183 | # CONFIG_PM_LEGACY is not set | ||
183 | CONFIG_APM=y | 184 | CONFIG_APM=y |
184 | 185 | ||
185 | # | 186 | # |
diff --git a/arch/arm/configs/spitz_defconfig b/arch/arm/configs/spitz_defconfig index d1ace3abfd8a..bd03238968c1 100644 --- a/arch/arm/configs/spitz_defconfig +++ b/arch/arm/configs/spitz_defconfig | |||
@@ -207,6 +207,7 @@ CONFIG_BINFMT_MISC=m | |||
207 | # Power management options | 207 | # Power management options |
208 | # | 208 | # |
209 | CONFIG_PM=y | 209 | CONFIG_PM=y |
210 | # CONFIG_PM_LEGACY is not set | ||
210 | CONFIG_APM=y | 211 | CONFIG_APM=y |
211 | 212 | ||
212 | # | 213 | # |
diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c index a07d202143c3..070bcb7a6306 100644 --- a/arch/arm/kernel/smp.c +++ b/arch/arm/kernel/smp.c | |||
@@ -451,6 +451,7 @@ int smp_call_function(void (*func)(void *info), void *info, int retry, | |||
451 | return smp_call_function_on_cpu(func, info, retry, wait, | 451 | return smp_call_function_on_cpu(func, info, retry, wait, |
452 | cpu_online_map); | 452 | cpu_online_map); |
453 | } | 453 | } |
454 | EXPORT_SYMBOL_GPL(smp_call_function); | ||
454 | 455 | ||
455 | void show_ipi_list(struct seq_file *p) | 456 | void show_ipi_list(struct seq_file *p) |
456 | { | 457 | { |
diff --git a/arch/arm/mach-ebsa110/io.c b/arch/arm/mach-ebsa110/io.c index c648bfb676a1..db38afb2aa88 100644 --- a/arch/arm/mach-ebsa110/io.c +++ b/arch/arm/mach-ebsa110/io.c | |||
@@ -28,7 +28,7 @@ | |||
28 | #include <asm/io.h> | 28 | #include <asm/io.h> |
29 | #include <asm/page.h> | 29 | #include <asm/page.h> |
30 | 30 | ||
31 | static void __iomem *__isamem_convert_addr(void __iomem *addr) | 31 | static void __iomem *__isamem_convert_addr(const volatile void __iomem *addr) |
32 | { | 32 | { |
33 | u32 ret, a = (u32 __force) addr; | 33 | u32 ret, a = (u32 __force) addr; |
34 | 34 | ||
@@ -63,7 +63,7 @@ static void __iomem *__isamem_convert_addr(void __iomem *addr) | |||
63 | /* | 63 | /* |
64 | * read[bwl] and write[bwl] | 64 | * read[bwl] and write[bwl] |
65 | */ | 65 | */ |
66 | u8 __readb(void __iomem *addr) | 66 | u8 __readb(const volatile void __iomem *addr) |
67 | { | 67 | { |
68 | void __iomem *a = __isamem_convert_addr(addr); | 68 | void __iomem *a = __isamem_convert_addr(addr); |
69 | u32 ret; | 69 | u32 ret; |
@@ -75,7 +75,7 @@ u8 __readb(void __iomem *addr) | |||
75 | return ret; | 75 | return ret; |
76 | } | 76 | } |
77 | 77 | ||
78 | u16 __readw(void __iomem *addr) | 78 | u16 __readw(const volatile void __iomem *addr) |
79 | { | 79 | { |
80 | void __iomem *a = __isamem_convert_addr(addr); | 80 | void __iomem *a = __isamem_convert_addr(addr); |
81 | 81 | ||
@@ -85,7 +85,7 @@ u16 __readw(void __iomem *addr) | |||
85 | return __raw_readw(a); | 85 | return __raw_readw(a); |
86 | } | 86 | } |
87 | 87 | ||
88 | u32 __readl(void __iomem *addr) | 88 | u32 __readl(const volatile void __iomem *addr) |
89 | { | 89 | { |
90 | void __iomem *a = __isamem_convert_addr(addr); | 90 | void __iomem *a = __isamem_convert_addr(addr); |
91 | u32 ret; | 91 | u32 ret; |
diff --git a/arch/arm/mach-ixp4xx/Kconfig b/arch/arm/mach-ixp4xx/Kconfig index 57f23b465392..e316bd93313f 100644 --- a/arch/arm/mach-ixp4xx/Kconfig +++ b/arch/arm/mach-ixp4xx/Kconfig | |||
@@ -133,7 +133,7 @@ config IXP4XX_INDIRECT_PCI | |||
133 | into the kernel and we can use the standard read[bwl]/write[bwl] | 133 | into the kernel and we can use the standard read[bwl]/write[bwl] |
134 | macros. This is the preferred method due to speed but it | 134 | macros. This is the preferred method due to speed but it |
135 | limits the system to just 64MB of PCI memory. This can be | 135 | limits the system to just 64MB of PCI memory. This can be |
136 | problamatic if using video cards and other memory-heavy devices. | 136 | problematic if using video cards and other memory-heavy devices. |
137 | 137 | ||
138 | 2) If > 64MB of memory space is required, the IXP4xx can be | 138 | 2) If > 64MB of memory space is required, the IXP4xx can be |
139 | configured to use indirect registers to access PCI This allows | 139 | configured to use indirect registers to access PCI This allows |
diff --git a/arch/arm/mach-lh7a40x/Kconfig b/arch/arm/mach-lh7a40x/Kconfig index 147b01928a9b..6f4c6a1798c1 100644 --- a/arch/arm/mach-lh7a40x/Kconfig +++ b/arch/arm/mach-lh7a40x/Kconfig | |||
@@ -8,7 +8,7 @@ config MACH_KEV7A400 | |||
8 | help | 8 | help |
9 | Say Y here if you are using the Sharp KEV7A400 development | 9 | Say Y here if you are using the Sharp KEV7A400 development |
10 | board. This hardware is discontinued, so I'd be very | 10 | board. This hardware is discontinued, so I'd be very |
11 | suprised if you wanted this option. | 11 | surprised if you wanted this option. |
12 | 12 | ||
13 | config MACH_LPD7A400 | 13 | config MACH_LPD7A400 |
14 | bool "LPD7A400 Card Engine" | 14 | bool "LPD7A400 Card Engine" |
diff --git a/arch/arm/mach-s3c2410/Kconfig b/arch/arm/mach-s3c2410/Kconfig index 63965c78de8c..9aa26b99045d 100644 --- a/arch/arm/mach-s3c2410/Kconfig +++ b/arch/arm/mach-s3c2410/Kconfig | |||
@@ -91,7 +91,7 @@ config SMDK2440_CPU2442 | |||
91 | config MACH_S3C2413 | 91 | config MACH_S3C2413 |
92 | bool | 92 | bool |
93 | help | 93 | help |
94 | Internal node for S3C2413 verison of SMDK2413, so that | 94 | Internal node for S3C2413 version of SMDK2413, so that |
95 | machine_is_s3c2413() will work when MACH_SMDK2413 is | 95 | machine_is_s3c2413() will work when MACH_SMDK2413 is |
96 | selected | 96 | selected |
97 | 97 | ||
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig index c0bfb8212b77..b09a19f87d68 100644 --- a/arch/arm/mm/Kconfig +++ b/arch/arm/mm/Kconfig | |||
@@ -197,7 +197,7 @@ config CPU_ARM940T | |||
197 | select CPU_CP15_MPU | 197 | select CPU_CP15_MPU |
198 | help | 198 | help |
199 | ARM940T is a member of the ARM9TDMI family of general- | 199 | ARM940T is a member of the ARM9TDMI family of general- |
200 | purpose microprocessors with MPU and seperate 4KB | 200 | purpose microprocessors with MPU and separate 4KB |
201 | instruction and 4KB data cases, each with a 4-word line | 201 | instruction and 4KB data cases, each with a 4-word line |
202 | length. | 202 | length. |
203 | 203 | ||
diff --git a/arch/arm/mm/consistent.c b/arch/arm/mm/consistent.c index 50e6b6bfb2e2..b797217e82be 100644 --- a/arch/arm/mm/consistent.c +++ b/arch/arm/mm/consistent.c | |||
@@ -476,6 +476,9 @@ core_initcall(consistent_init); | |||
476 | 476 | ||
477 | /* | 477 | /* |
478 | * Make an area consistent for devices. | 478 | * Make an area consistent for devices. |
479 | * Note: Drivers should NOT use this function directly, as it will break | ||
480 | * platforms with CONFIG_DMABOUNCE. | ||
481 | * Use the driver DMA support - see dma-mapping.h (dma_sync_*) | ||
479 | */ | 482 | */ |
480 | void consistent_sync(void *vaddr, size_t size, int direction) | 483 | void consistent_sync(void *vaddr, size_t size, int direction) |
481 | { | 484 | { |
diff --git a/arch/cris/arch-v10/Kconfig b/arch/cris/arch-v10/Kconfig index 44eb1b9accb3..c7ea9efd0104 100644 --- a/arch/cris/arch-v10/Kconfig +++ b/arch/cris/arch-v10/Kconfig | |||
@@ -323,7 +323,7 @@ config ETRAX_DEF_R_WAITSTATES | |||
323 | depends on ETRAX_ARCH_V10 | 323 | depends on ETRAX_ARCH_V10 |
324 | default "95a6" | 324 | default "95a6" |
325 | help | 325 | help |
326 | Waitstates for SRAM, Flash and peripherials (not DRAM). 95f8 is a | 326 | Waitstates for SRAM, Flash and peripherals (not DRAM). 95f8 is a |
327 | good choice for most Axis products... | 327 | good choice for most Axis products... |
328 | 328 | ||
329 | config ETRAX_DEF_R_BUS_CONFIG | 329 | config ETRAX_DEF_R_BUS_CONFIG |
diff --git a/arch/cris/arch-v10/drivers/Kconfig b/arch/cris/arch-v10/drivers/Kconfig index 734d5f3a5304..e7e724bc0ba6 100644 --- a/arch/cris/arch-v10/drivers/Kconfig +++ b/arch/cris/arch-v10/drivers/Kconfig | |||
@@ -839,7 +839,7 @@ config ETRAX_DS1302_TRICKLE_CHARGE | |||
839 | default "0" | 839 | default "0" |
840 | help | 840 | help |
841 | This controls the initial value of the trickle charge register. | 841 | This controls the initial value of the trickle charge register. |
842 | 0 = disabled (use this if you are unsure or have a non rechargable battery) | 842 | 0 = disabled (use this if you are unsure or have a non rechargeable battery) |
843 | Otherwise the following values can be OR:ed together to control the | 843 | Otherwise the following values can be OR:ed together to control the |
844 | charge current: | 844 | charge current: |
845 | 1 = 2kohm, 2 = 4kohm, 3 = 4kohm | 845 | 1 = 2kohm, 2 = 4kohm, 3 = 4kohm |
diff --git a/arch/cris/arch-v10/drivers/eeprom.c b/arch/cris/arch-v10/drivers/eeprom.c index 6e1f191a71e3..284ebfda03f0 100644 --- a/arch/cris/arch-v10/drivers/eeprom.c +++ b/arch/cris/arch-v10/drivers/eeprom.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /*!***************************************************************************** | 1 | /*!***************************************************************************** |
2 | *! | 2 | *! |
3 | *! Implements an interface for i2c compatible eeproms to run under linux. | 3 | *! Implements an interface for i2c compatible eeproms to run under Linux. |
4 | *! Supports 2k, 8k(?) and 16k. Uses adaptive timing adjustents by | 4 | *! Supports 2k, 8k(?) and 16k. Uses adaptive timing adjustments by |
5 | *! Johan.Adolfsson@axis.com | 5 | *! Johan.Adolfsson@axis.com |
6 | *! | 6 | *! |
7 | *! Probing results: | 7 | *! Probing results: |
@@ -51,7 +51,7 @@ | |||
51 | *! Revision 1.8 2001/06/15 13:24:29 jonashg | 51 | *! Revision 1.8 2001/06/15 13:24:29 jonashg |
52 | *! * Added verification of pointers from userspace in read and write. | 52 | *! * Added verification of pointers from userspace in read and write. |
53 | *! * Made busy counter volatile. | 53 | *! * Made busy counter volatile. |
54 | *! * Added define for inital write delay. | 54 | *! * Added define for initial write delay. |
55 | *! * Removed warnings by using loff_t instead of unsigned long. | 55 | *! * Removed warnings by using loff_t instead of unsigned long. |
56 | *! | 56 | *! |
57 | *! Revision 1.7 2001/06/14 15:26:54 jonashg | 57 | *! Revision 1.7 2001/06/14 15:26:54 jonashg |
diff --git a/arch/cris/arch-v10/drivers/i2c.c b/arch/cris/arch-v10/drivers/i2c.c index 6114596c3b33..092c724a645f 100644 --- a/arch/cris/arch-v10/drivers/i2c.c +++ b/arch/cris/arch-v10/drivers/i2c.c | |||
@@ -47,7 +47,7 @@ | |||
47 | *! Update Port B register and shadow even when running with hardware support | 47 | *! Update Port B register and shadow even when running with hardware support |
48 | *! to avoid glitches when reading bits | 48 | *! to avoid glitches when reading bits |
49 | *! Never set direction to out in i2c_inbyte | 49 | *! Never set direction to out in i2c_inbyte |
50 | *! Removed incorrect clock togling at end of i2c_inbyte | 50 | *! Removed incorrect clock toggling at end of i2c_inbyte |
51 | *! | 51 | *! |
52 | *! Revision 1.8 2002/08/13 06:31:53 starvik | 52 | *! Revision 1.8 2002/08/13 06:31:53 starvik |
53 | *! Made SDA and SCL line configurable | 53 | *! Made SDA and SCL line configurable |
diff --git a/arch/cris/arch-v10/kernel/kgdb.c b/arch/cris/arch-v10/kernel/kgdb.c index 34528da98817..07628a13c6c4 100644 --- a/arch/cris/arch-v10/kernel/kgdb.c +++ b/arch/cris/arch-v10/kernel/kgdb.c | |||
@@ -33,7 +33,7 @@ | |||
33 | *! | 33 | *! |
34 | *! Revision 1.2 2002/11/19 14:35:24 starvik | 34 | *! Revision 1.2 2002/11/19 14:35:24 starvik |
35 | *! Changes from linux 2.4 | 35 | *! Changes from linux 2.4 |
36 | *! Changed struct initializer syntax to the currently prefered notation | 36 | *! Changed struct initializer syntax to the currently preferred notation |
37 | *! | 37 | *! |
38 | *! Revision 1.1 2001/12/17 13:59:27 bjornw | 38 | *! Revision 1.1 2001/12/17 13:59:27 bjornw |
39 | *! Initial revision | 39 | *! Initial revision |
diff --git a/arch/cris/arch-v10/lib/old_checksum.c b/arch/cris/arch-v10/lib/old_checksum.c index 22a6f0aa9cef..497634a64829 100644 --- a/arch/cris/arch-v10/lib/old_checksum.c +++ b/arch/cris/arch-v10/lib/old_checksum.c | |||
@@ -47,39 +47,41 @@ | |||
47 | 47 | ||
48 | #include <asm/delay.h> | 48 | #include <asm/delay.h> |
49 | 49 | ||
50 | unsigned int csum_partial(const unsigned char * buff, int len, unsigned int sum) | 50 | __wsum csum_partial(const void *p, int len, __wsum __sum) |
51 | { | 51 | { |
52 | /* | 52 | u32 sum = (__force u32)__sum; |
53 | * Experiments with ethernet and slip connections show that buff | 53 | const u16 *buff = p; |
54 | * is aligned on either a 2-byte or 4-byte boundary. | 54 | /* |
55 | */ | 55 | * Experiments with ethernet and slip connections show that buff |
56 | const unsigned char *endMarker = buff + len; | 56 | * is aligned on either a 2-byte or 4-byte boundary. |
57 | const unsigned char *marker = endMarker - (len % 16); | 57 | */ |
58 | const void *endMarker = p + len; | ||
59 | const void *marker = endMarker - (len % 16); | ||
58 | #if 0 | 60 | #if 0 |
59 | if((int)buff & 0x3) | 61 | if((int)buff & 0x3) |
60 | printk("unaligned buff %p\n", buff); | 62 | printk("unaligned buff %p\n", buff); |
61 | __delay(900); /* extra delay of 90 us to test performance hit */ | 63 | __delay(900); /* extra delay of 90 us to test performance hit */ |
62 | #endif | 64 | #endif |
63 | BITON; | 65 | BITON; |
64 | while (buff < marker) { | 66 | while (buff < marker) { |
65 | sum += *((unsigned short *)buff)++; | 67 | sum += *buff++; |
66 | sum += *((unsigned short *)buff)++; | 68 | sum += *buff++; |
67 | sum += *((unsigned short *)buff)++; | 69 | sum += *buff++; |
68 | sum += *((unsigned short *)buff)++; | 70 | sum += *buff++; |
69 | sum += *((unsigned short *)buff)++; | 71 | sum += *buff++; |
70 | sum += *((unsigned short *)buff)++; | 72 | sum += *buff++; |
71 | sum += *((unsigned short *)buff)++; | 73 | sum += *buff++; |
72 | sum += *((unsigned short *)buff)++; | 74 | sum += *buff++; |
73 | } | 75 | } |
74 | marker = endMarker - (len % 2); | 76 | marker = endMarker - (len % 2); |
75 | while(buff < marker) { | 77 | while (buff < marker) |
76 | sum += *((unsigned short *)buff)++; | 78 | sum += *buff++; |
77 | } | 79 | |
78 | if(endMarker - buff > 0) { | 80 | if (endMarker > buff) |
79 | sum += *buff; /* add extra byte seperately */ | 81 | sum += *(const u8 *)buff; /* add extra byte seperately */ |
80 | } | 82 | |
81 | BITOFF; | 83 | BITOFF; |
82 | return(sum); | 84 | return (__force __wsum)sum; |
83 | } | 85 | } |
84 | 86 | ||
85 | EXPORT_SYMBOL(csum_partial); | 87 | EXPORT_SYMBOL(csum_partial); |
diff --git a/arch/cris/arch-v32/drivers/Kconfig b/arch/cris/arch-v32/drivers/Kconfig index a33097f95362..f64624fc4504 100644 --- a/arch/cris/arch-v32/drivers/Kconfig +++ b/arch/cris/arch-v32/drivers/Kconfig | |||
@@ -88,7 +88,7 @@ config ETRAX_SERIAL_PORT0_DMA7_IN | |||
88 | help | 88 | help |
89 | Enables the DMA7 input channel for ser0 (ttyS0). | 89 | Enables the DMA7 input channel for ser0 (ttyS0). |
90 | If you do not enable DMA, an interrupt for each character will be | 90 | If you do not enable DMA, an interrupt for each character will be |
91 | used when receiveing data. | 91 | used when receiving data. |
92 | Normally you want to use DMA, unless you use the DMA channel for | 92 | Normally you want to use DMA, unless you use the DMA channel for |
93 | something else. | 93 | something else. |
94 | 94 | ||
@@ -157,7 +157,7 @@ config ETRAX_SERIAL_PORT1_DMA5_IN | |||
157 | help | 157 | help |
158 | Enables the DMA5 input channel for ser1 (ttyS1). | 158 | Enables the DMA5 input channel for ser1 (ttyS1). |
159 | If you do not enable DMA, an interrupt for each character will be | 159 | If you do not enable DMA, an interrupt for each character will be |
160 | used when receiveing data. | 160 | used when receiving data. |
161 | Normally you want this on, unless you use the DMA channel for | 161 | Normally you want this on, unless you use the DMA channel for |
162 | something else. | 162 | something else. |
163 | 163 | ||
@@ -228,7 +228,7 @@ config ETRAX_SERIAL_PORT2_DMA3_IN | |||
228 | help | 228 | help |
229 | Enables the DMA3 input channel for ser2 (ttyS2). | 229 | Enables the DMA3 input channel for ser2 (ttyS2). |
230 | If you do not enable DMA, an interrupt for each character will be | 230 | If you do not enable DMA, an interrupt for each character will be |
231 | used when receiveing data. | 231 | used when receiving data. |
232 | Normally you want to use DMA, unless you use the DMA channel for | 232 | Normally you want to use DMA, unless you use the DMA channel for |
233 | something else. | 233 | something else. |
234 | 234 | ||
@@ -297,7 +297,7 @@ config ETRAX_SERIAL_PORT3_DMA9_IN | |||
297 | help | 297 | help |
298 | Enables the DMA9 input channel for ser3 (ttyS3). | 298 | Enables the DMA9 input channel for ser3 (ttyS3). |
299 | If you do not enable DMA, an interrupt for each character will be | 299 | If you do not enable DMA, an interrupt for each character will be |
300 | used when receiveing data. | 300 | used when receiving data. |
301 | Normally you want to use DMA, unless you use the DMA channel for | 301 | Normally you want to use DMA, unless you use the DMA channel for |
302 | something else. | 302 | something else. |
303 | 303 | ||
diff --git a/arch/frv/lib/checksum.c b/arch/frv/lib/checksum.c index 20e7dfc474ef..44e16d59bc10 100644 --- a/arch/frv/lib/checksum.c +++ b/arch/frv/lib/checksum.c | |||
@@ -32,7 +32,6 @@ | |||
32 | of the assembly has to go. */ | 32 | of the assembly has to go. */ |
33 | 33 | ||
34 | #include <net/checksum.h> | 34 | #include <net/checksum.h> |
35 | #include <asm/checksum.h> | ||
36 | #include <linux/module.h> | 35 | #include <linux/module.h> |
37 | 36 | ||
38 | static inline unsigned short from32to16(unsigned long x) | 37 | static inline unsigned short from32to16(unsigned long x) |
@@ -105,15 +104,15 @@ out: | |||
105 | * | 104 | * |
106 | * it's best to have buff aligned on a 32-bit boundary | 105 | * it's best to have buff aligned on a 32-bit boundary |
107 | */ | 106 | */ |
108 | unsigned int csum_partial(const unsigned char * buff, int len, unsigned int sum) | 107 | __wsum csum_partial(const void *buff, int len, __wsum sum) |
109 | { | 108 | { |
110 | unsigned int result = do_csum(buff, len); | 109 | unsigned int result = do_csum(buff, len); |
111 | 110 | ||
112 | /* add in old sum, and carry.. */ | 111 | /* add in old sum, and carry.. */ |
113 | result += sum; | 112 | result += (__force u32)sum; |
114 | if (sum > result) | 113 | if ((__force u32)sum > result) |
115 | result += 1; | 114 | result += 1; |
116 | return result; | 115 | return (__force __wsum)result; |
117 | } | 116 | } |
118 | 117 | ||
119 | EXPORT_SYMBOL(csum_partial); | 118 | EXPORT_SYMBOL(csum_partial); |
@@ -122,9 +121,9 @@ EXPORT_SYMBOL(csum_partial); | |||
122 | * this routine is used for miscellaneous IP-like checksums, mainly | 121 | * this routine is used for miscellaneous IP-like checksums, mainly |
123 | * in icmp.c | 122 | * in icmp.c |
124 | */ | 123 | */ |
125 | unsigned short ip_compute_csum(const unsigned char * buff, int len) | 124 | __sum16 ip_compute_csum(const void *buff, int len) |
126 | { | 125 | { |
127 | return ~do_csum(buff, len); | 126 | return (__force __sum16)~do_csum(buff, len); |
128 | } | 127 | } |
129 | 128 | ||
130 | EXPORT_SYMBOL(ip_compute_csum); | 129 | EXPORT_SYMBOL(ip_compute_csum); |
@@ -132,9 +131,9 @@ EXPORT_SYMBOL(ip_compute_csum); | |||
132 | /* | 131 | /* |
133 | * copy from fs while checksumming, otherwise like csum_partial | 132 | * copy from fs while checksumming, otherwise like csum_partial |
134 | */ | 133 | */ |
135 | unsigned int | 134 | __wsum |
136 | csum_partial_copy_from_user(const char __user *src, char *dst, | 135 | csum_partial_copy_from_user(const void __user *src, void *dst, |
137 | int len, int sum, int *csum_err) | 136 | int len, __wsum sum, int *csum_err) |
138 | { | 137 | { |
139 | int rem; | 138 | int rem; |
140 | 139 | ||
@@ -157,11 +156,11 @@ EXPORT_SYMBOL(csum_partial_copy_from_user); | |||
157 | /* | 156 | /* |
158 | * copy from ds while checksumming, otherwise like csum_partial | 157 | * copy from ds while checksumming, otherwise like csum_partial |
159 | */ | 158 | */ |
160 | unsigned int | 159 | __wsum |
161 | csum_partial_copy(const char *src, char *dst, int len, int sum) | 160 | csum_partial_copy_nocheck(const void *src, void *dst, int len, __wsum sum) |
162 | { | 161 | { |
163 | memcpy(dst, src, len); | 162 | memcpy(dst, src, len); |
164 | return csum_partial(dst, len, sum); | 163 | return csum_partial(dst, len, sum); |
165 | } | 164 | } |
166 | 165 | ||
167 | EXPORT_SYMBOL(csum_partial_copy); | 166 | EXPORT_SYMBOL(csum_partial_copy_nocheck); |
diff --git a/arch/h8300/kernel/h8300_ksyms.c b/arch/h8300/kernel/h8300_ksyms.c index 9b4be053de3c..d1b15267ac81 100644 --- a/arch/h8300/kernel/h8300_ksyms.c +++ b/arch/h8300/kernel/h8300_ksyms.c | |||
@@ -39,7 +39,7 @@ EXPORT_SYMBOL(enable_irq); | |||
39 | EXPORT_SYMBOL(disable_irq); | 39 | EXPORT_SYMBOL(disable_irq); |
40 | 40 | ||
41 | /* Networking helper routines. */ | 41 | /* Networking helper routines. */ |
42 | EXPORT_SYMBOL(csum_partial_copy); | 42 | EXPORT_SYMBOL(csum_partial_copy_nocheck); |
43 | 43 | ||
44 | /* The following are special because they're not called | 44 | /* The following are special because they're not called |
45 | explicitly (the C compiler generates them). Fortunately, | 45 | explicitly (the C compiler generates them). Fortunately, |
diff --git a/arch/h8300/lib/checksum.c b/arch/h8300/lib/checksum.c index 5aa688d9242d..bdc5b032acd6 100644 --- a/arch/h8300/lib/checksum.c +++ b/arch/h8300/lib/checksum.c | |||
@@ -96,9 +96,9 @@ out: | |||
96 | * This is a version of ip_compute_csum() optimized for IP headers, | 96 | * This is a version of ip_compute_csum() optimized for IP headers, |
97 | * which always checksum on 4 octet boundaries. | 97 | * which always checksum on 4 octet boundaries. |
98 | */ | 98 | */ |
99 | unsigned short ip_fast_csum(unsigned char * iph, unsigned int ihl) | 99 | __sum16 ip_fast_csum(const void *iph, unsigned int ihl) |
100 | { | 100 | { |
101 | return ~do_csum(iph,ihl*4); | 101 | return (__force __sum16)~do_csum(iph,ihl*4); |
102 | } | 102 | } |
103 | 103 | ||
104 | /* | 104 | /* |
@@ -113,15 +113,19 @@ unsigned short ip_fast_csum(unsigned char * iph, unsigned int ihl) | |||
113 | * | 113 | * |
114 | * it's best to have buff aligned on a 32-bit boundary | 114 | * it's best to have buff aligned on a 32-bit boundary |
115 | */ | 115 | */ |
116 | unsigned int csum_partial(const unsigned char * buff, int len, unsigned int sum) | 116 | /* |
117 | * Egads... That thing apparently assumes that *all* checksums it ever sees will | ||
118 | * be folded. Very likely a bug. | ||
119 | */ | ||
120 | __wsum csum_partial(const void *buff, int len, __wsum sum) | ||
117 | { | 121 | { |
118 | unsigned int result = do_csum(buff, len); | 122 | unsigned int result = do_csum(buff, len); |
119 | 123 | ||
120 | /* add in old sum, and carry.. */ | 124 | /* add in old sum, and carry.. */ |
121 | result += sum; | 125 | result += (__force u32)sum; |
122 | /* 16+c bits -> 16 bits */ | 126 | /* 16+c bits -> 16 bits */ |
123 | result = (result & 0xffff) + (result >> 16); | 127 | result = (result & 0xffff) + (result >> 16); |
124 | return result; | 128 | return (__force __wsum)result; |
125 | } | 129 | } |
126 | 130 | ||
127 | EXPORT_SYMBOL(csum_partial); | 131 | EXPORT_SYMBOL(csum_partial); |
@@ -130,20 +134,21 @@ EXPORT_SYMBOL(csum_partial); | |||
130 | * this routine is used for miscellaneous IP-like checksums, mainly | 134 | * this routine is used for miscellaneous IP-like checksums, mainly |
131 | * in icmp.c | 135 | * in icmp.c |
132 | */ | 136 | */ |
133 | unsigned short ip_compute_csum(const unsigned char * buff, int len) | 137 | __sum16 ip_compute_csum(const void *buff, int len) |
134 | { | 138 | { |
135 | return ~do_csum(buff,len); | 139 | return (__force __sum16)~do_csum(buff,len); |
136 | } | 140 | } |
137 | 141 | ||
138 | /* | 142 | /* |
139 | * copy from fs while checksumming, otherwise like csum_partial | 143 | * copy from fs while checksumming, otherwise like csum_partial |
140 | */ | 144 | */ |
141 | 145 | ||
142 | unsigned int | 146 | __wsum |
143 | csum_partial_copy_from_user(const char *src, char *dst, int len, int sum, int *csum_err) | 147 | csum_partial_copy_from_user(const void __user *src, void *dst, int len, |
148 | __wsum sum, int *csum_err) | ||
144 | { | 149 | { |
145 | if (csum_err) *csum_err = 0; | 150 | if (csum_err) *csum_err = 0; |
146 | memcpy(dst, src, len); | 151 | memcpy(dst, (__force const void *)src, len); |
147 | return csum_partial(dst, len, sum); | 152 | return csum_partial(dst, len, sum); |
148 | } | 153 | } |
149 | 154 | ||
@@ -151,8 +156,8 @@ csum_partial_copy_from_user(const char *src, char *dst, int len, int sum, int *c | |||
151 | * copy from ds while checksumming, otherwise like csum_partial | 156 | * copy from ds while checksumming, otherwise like csum_partial |
152 | */ | 157 | */ |
153 | 158 | ||
154 | unsigned int | 159 | __wsum |
155 | csum_partial_copy(const char *src, char *dst, int len, int sum) | 160 | csum_partial_copy_nocheck(const void *src, void *dst, int len, __wsum sum) |
156 | { | 161 | { |
157 | memcpy(dst, src, len); | 162 | memcpy(dst, src, len); |
158 | return csum_partial(dst, len, sum); | 163 | return csum_partial(dst, len, sum); |
diff --git a/arch/i386/kernel/acpi/boot.c b/arch/i386/kernel/acpi/boot.c index d12fb97a5337..c8f96cff07c6 100644 --- a/arch/i386/kernel/acpi/boot.c +++ b/arch/i386/kernel/acpi/boot.c | |||
@@ -333,7 +333,7 @@ acpi_parse_ioapic(acpi_table_entry_header * header, const unsigned long end) | |||
333 | /* | 333 | /* |
334 | * Parse Interrupt Source Override for the ACPI SCI | 334 | * Parse Interrupt Source Override for the ACPI SCI |
335 | */ | 335 | */ |
336 | static void acpi_sci_ioapic_setup(u32 bus_irq, u32 gsi, u16 polarity, u16 trigger) | 336 | static void acpi_sci_ioapic_setup(u32 gsi, u16 polarity, u16 trigger) |
337 | { | 337 | { |
338 | if (trigger == 0) /* compatible SCI trigger is level */ | 338 | if (trigger == 0) /* compatible SCI trigger is level */ |
339 | trigger = 3; | 339 | trigger = 3; |
@@ -353,13 +353,13 @@ static void acpi_sci_ioapic_setup(u32 bus_irq, u32 gsi, u16 polarity, u16 trigge | |||
353 | * If GSI is < 16, this will update its flags, | 353 | * If GSI is < 16, this will update its flags, |
354 | * else it will create a new mp_irqs[] entry. | 354 | * else it will create a new mp_irqs[] entry. |
355 | */ | 355 | */ |
356 | mp_override_legacy_irq(bus_irq, polarity, trigger, gsi); | 356 | mp_override_legacy_irq(gsi, polarity, trigger, gsi); |
357 | 357 | ||
358 | /* | 358 | /* |
359 | * stash over-ride to indicate we've been here | 359 | * stash over-ride to indicate we've been here |
360 | * and for later update of acpi_fadt | 360 | * and for later update of acpi_fadt |
361 | */ | 361 | */ |
362 | acpi_sci_override_gsi = bus_irq; | 362 | acpi_sci_override_gsi = gsi; |
363 | return; | 363 | return; |
364 | } | 364 | } |
365 | 365 | ||
@@ -377,7 +377,7 @@ acpi_parse_int_src_ovr(acpi_table_entry_header * header, | |||
377 | acpi_table_print_madt_entry(header); | 377 | acpi_table_print_madt_entry(header); |
378 | 378 | ||
379 | if (intsrc->bus_irq == acpi_fadt.sci_int) { | 379 | if (intsrc->bus_irq == acpi_fadt.sci_int) { |
380 | acpi_sci_ioapic_setup(intsrc->bus_irq, intsrc->global_irq, | 380 | acpi_sci_ioapic_setup(intsrc->global_irq, |
381 | intsrc->flags.polarity, | 381 | intsrc->flags.polarity, |
382 | intsrc->flags.trigger); | 382 | intsrc->flags.trigger); |
383 | return 0; | 383 | return 0; |
@@ -880,7 +880,7 @@ static int __init acpi_parse_madt_ioapic_entries(void) | |||
880 | * pretend we got one so we can set the SCI flags. | 880 | * pretend we got one so we can set the SCI flags. |
881 | */ | 881 | */ |
882 | if (!acpi_sci_override_gsi) | 882 | if (!acpi_sci_override_gsi) |
883 | acpi_sci_ioapic_setup(acpi_fadt.sci_int, acpi_fadt.sci_int, 0, 0); | 883 | acpi_sci_ioapic_setup(acpi_fadt.sci_int, 0, 0); |
884 | 884 | ||
885 | /* Fill in identity legacy mapings where no override */ | 885 | /* Fill in identity legacy mapings where no override */ |
886 | mp_config_acpi_legacy_irqs(); | 886 | mp_config_acpi_legacy_irqs(); |
diff --git a/arch/i386/kernel/cpuid.c b/arch/i386/kernel/cpuid.c index fde8bea85cee..ab0c327e79dc 100644 --- a/arch/i386/kernel/cpuid.c +++ b/arch/i386/kernel/cpuid.c | |||
@@ -156,14 +156,14 @@ static struct file_operations cpuid_fops = { | |||
156 | .open = cpuid_open, | 156 | .open = cpuid_open, |
157 | }; | 157 | }; |
158 | 158 | ||
159 | static int cpuid_class_device_create(int i) | 159 | static int cpuid_device_create(int i) |
160 | { | 160 | { |
161 | int err = 0; | 161 | int err = 0; |
162 | struct class_device *class_err; | 162 | struct device *dev; |
163 | 163 | ||
164 | class_err = class_device_create(cpuid_class, NULL, MKDEV(CPUID_MAJOR, i), NULL, "cpu%d",i); | 164 | dev = device_create(cpuid_class, NULL, MKDEV(CPUID_MAJOR, i), "cpu%d",i); |
165 | if (IS_ERR(class_err)) | 165 | if (IS_ERR(dev)) |
166 | err = PTR_ERR(class_err); | 166 | err = PTR_ERR(dev); |
167 | return err; | 167 | return err; |
168 | } | 168 | } |
169 | 169 | ||
@@ -174,10 +174,10 @@ static int cpuid_class_cpu_callback(struct notifier_block *nfb, unsigned long ac | |||
174 | 174 | ||
175 | switch (action) { | 175 | switch (action) { |
176 | case CPU_ONLINE: | 176 | case CPU_ONLINE: |
177 | cpuid_class_device_create(cpu); | 177 | cpuid_device_create(cpu); |
178 | break; | 178 | break; |
179 | case CPU_DEAD: | 179 | case CPU_DEAD: |
180 | class_device_destroy(cpuid_class, MKDEV(CPUID_MAJOR, cpu)); | 180 | device_destroy(cpuid_class, MKDEV(CPUID_MAJOR, cpu)); |
181 | break; | 181 | break; |
182 | } | 182 | } |
183 | return NOTIFY_OK; | 183 | return NOTIFY_OK; |
@@ -206,7 +206,7 @@ static int __init cpuid_init(void) | |||
206 | goto out_chrdev; | 206 | goto out_chrdev; |
207 | } | 207 | } |
208 | for_each_online_cpu(i) { | 208 | for_each_online_cpu(i) { |
209 | err = cpuid_class_device_create(i); | 209 | err = cpuid_device_create(i); |
210 | if (err != 0) | 210 | if (err != 0) |
211 | goto out_class; | 211 | goto out_class; |
212 | } | 212 | } |
@@ -218,7 +218,7 @@ static int __init cpuid_init(void) | |||
218 | out_class: | 218 | out_class: |
219 | i = 0; | 219 | i = 0; |
220 | for_each_online_cpu(i) { | 220 | for_each_online_cpu(i) { |
221 | class_device_destroy(cpuid_class, MKDEV(CPUID_MAJOR, i)); | 221 | device_destroy(cpuid_class, MKDEV(CPUID_MAJOR, i)); |
222 | } | 222 | } |
223 | class_destroy(cpuid_class); | 223 | class_destroy(cpuid_class); |
224 | out_chrdev: | 224 | out_chrdev: |
@@ -232,7 +232,7 @@ static void __exit cpuid_exit(void) | |||
232 | int cpu = 0; | 232 | int cpu = 0; |
233 | 233 | ||
234 | for_each_online_cpu(cpu) | 234 | for_each_online_cpu(cpu) |
235 | class_device_destroy(cpuid_class, MKDEV(CPUID_MAJOR, cpu)); | 235 | device_destroy(cpuid_class, MKDEV(CPUID_MAJOR, cpu)); |
236 | class_destroy(cpuid_class); | 236 | class_destroy(cpuid_class); |
237 | unregister_chrdev(CPUID_MAJOR, "cpu/cpuid"); | 237 | unregister_chrdev(CPUID_MAJOR, "cpu/cpuid"); |
238 | unregister_hotcpu_notifier(&cpuid_class_cpu_notifier); | 238 | unregister_hotcpu_notifier(&cpuid_class_cpu_notifier); |
diff --git a/arch/i386/kernel/msr.c b/arch/i386/kernel/msr.c index d535cdbbfd25..a773f776c9ea 100644 --- a/arch/i386/kernel/msr.c +++ b/arch/i386/kernel/msr.c | |||
@@ -239,14 +239,14 @@ static struct file_operations msr_fops = { | |||
239 | .open = msr_open, | 239 | .open = msr_open, |
240 | }; | 240 | }; |
241 | 241 | ||
242 | static int msr_class_device_create(int i) | 242 | static int msr_device_create(int i) |
243 | { | 243 | { |
244 | int err = 0; | 244 | int err = 0; |
245 | struct class_device *class_err; | 245 | struct device *dev; |
246 | 246 | ||
247 | class_err = class_device_create(msr_class, NULL, MKDEV(MSR_MAJOR, i), NULL, "msr%d",i); | 247 | dev = device_create(msr_class, NULL, MKDEV(MSR_MAJOR, i), "msr%d",i); |
248 | if (IS_ERR(class_err)) | 248 | if (IS_ERR(dev)) |
249 | err = PTR_ERR(class_err); | 249 | err = PTR_ERR(dev); |
250 | return err; | 250 | return err; |
251 | } | 251 | } |
252 | 252 | ||
@@ -258,10 +258,10 @@ static int msr_class_cpu_callback(struct notifier_block *nfb, | |||
258 | 258 | ||
259 | switch (action) { | 259 | switch (action) { |
260 | case CPU_ONLINE: | 260 | case CPU_ONLINE: |
261 | msr_class_device_create(cpu); | 261 | msr_device_create(cpu); |
262 | break; | 262 | break; |
263 | case CPU_DEAD: | 263 | case CPU_DEAD: |
264 | class_device_destroy(msr_class, MKDEV(MSR_MAJOR, cpu)); | 264 | device_destroy(msr_class, MKDEV(MSR_MAJOR, cpu)); |
265 | break; | 265 | break; |
266 | } | 266 | } |
267 | return NOTIFY_OK; | 267 | return NOTIFY_OK; |
@@ -290,7 +290,7 @@ static int __init msr_init(void) | |||
290 | goto out_chrdev; | 290 | goto out_chrdev; |
291 | } | 291 | } |
292 | for_each_online_cpu(i) { | 292 | for_each_online_cpu(i) { |
293 | err = msr_class_device_create(i); | 293 | err = msr_device_create(i); |
294 | if (err != 0) | 294 | if (err != 0) |
295 | goto out_class; | 295 | goto out_class; |
296 | } | 296 | } |
@@ -302,7 +302,7 @@ static int __init msr_init(void) | |||
302 | out_class: | 302 | out_class: |
303 | i = 0; | 303 | i = 0; |
304 | for_each_online_cpu(i) | 304 | for_each_online_cpu(i) |
305 | class_device_destroy(msr_class, MKDEV(MSR_MAJOR, i)); | 305 | device_destroy(msr_class, MKDEV(MSR_MAJOR, i)); |
306 | class_destroy(msr_class); | 306 | class_destroy(msr_class); |
307 | out_chrdev: | 307 | out_chrdev: |
308 | unregister_chrdev(MSR_MAJOR, "cpu/msr"); | 308 | unregister_chrdev(MSR_MAJOR, "cpu/msr"); |
@@ -314,7 +314,7 @@ static void __exit msr_exit(void) | |||
314 | { | 314 | { |
315 | int cpu = 0; | 315 | int cpu = 0; |
316 | for_each_online_cpu(cpu) | 316 | for_each_online_cpu(cpu) |
317 | class_device_destroy(msr_class, MKDEV(MSR_MAJOR, cpu)); | 317 | device_destroy(msr_class, MKDEV(MSR_MAJOR, cpu)); |
318 | class_destroy(msr_class); | 318 | class_destroy(msr_class); |
319 | unregister_chrdev(MSR_MAJOR, "cpu/msr"); | 319 | unregister_chrdev(MSR_MAJOR, "cpu/msr"); |
320 | unregister_hotcpu_notifier(&msr_class_cpu_notifier); | 320 | unregister_hotcpu_notifier(&msr_class_cpu_notifier); |
diff --git a/arch/i386/kernel/pci-dma.c b/arch/i386/kernel/pci-dma.c index 25fe66853934..5c8c6ef1fc5e 100644 --- a/arch/i386/kernel/pci-dma.c +++ b/arch/i386/kernel/pci-dma.c | |||
@@ -75,7 +75,7 @@ EXPORT_SYMBOL(dma_free_coherent); | |||
75 | int dma_declare_coherent_memory(struct device *dev, dma_addr_t bus_addr, | 75 | int dma_declare_coherent_memory(struct device *dev, dma_addr_t bus_addr, |
76 | dma_addr_t device_addr, size_t size, int flags) | 76 | dma_addr_t device_addr, size_t size, int flags) |
77 | { | 77 | { |
78 | void __iomem *mem_base; | 78 | void __iomem *mem_base = NULL; |
79 | int pages = size >> PAGE_SHIFT; | 79 | int pages = size >> PAGE_SHIFT; |
80 | int bitmap_size = (pages + 31)/32; | 80 | int bitmap_size = (pages + 31)/32; |
81 | 81 | ||
@@ -114,6 +114,8 @@ int dma_declare_coherent_memory(struct device *dev, dma_addr_t bus_addr, | |||
114 | free1_out: | 114 | free1_out: |
115 | kfree(dev->dma_mem->bitmap); | 115 | kfree(dev->dma_mem->bitmap); |
116 | out: | 116 | out: |
117 | if (mem_base) | ||
118 | iounmap(mem_base); | ||
117 | return 0; | 119 | return 0; |
118 | } | 120 | } |
119 | EXPORT_SYMBOL(dma_declare_coherent_memory); | 121 | EXPORT_SYMBOL(dma_declare_coherent_memory); |
diff --git a/arch/i386/pci/common.c b/arch/i386/pci/common.c index cdfcf971098b..53ca6e897984 100644 --- a/arch/i386/pci/common.c +++ b/arch/i386/pci/common.c | |||
@@ -20,7 +20,7 @@ | |||
20 | unsigned int pci_probe = PCI_PROBE_BIOS | PCI_PROBE_CONF1 | PCI_PROBE_CONF2 | | 20 | unsigned int pci_probe = PCI_PROBE_BIOS | PCI_PROBE_CONF1 | PCI_PROBE_CONF2 | |
21 | PCI_PROBE_MMCONF; | 21 | PCI_PROBE_MMCONF; |
22 | 22 | ||
23 | int pci_bf_sort; | 23 | static int pci_bf_sort; |
24 | int pci_routeirq; | 24 | int pci_routeirq; |
25 | int pcibios_last_bus = -1; | 25 | int pcibios_last_bus = -1; |
26 | unsigned long pirq_table_addr; | 26 | unsigned long pirq_table_addr; |
diff --git a/arch/i386/pci/fixup.c b/arch/i386/pci/fixup.c index c1949ff38d61..cde1170b01a1 100644 --- a/arch/i386/pci/fixup.c +++ b/arch/i386/pci/fixup.c | |||
@@ -74,52 +74,6 @@ static void __devinit pci_fixup_ncr53c810(struct pci_dev *d) | |||
74 | } | 74 | } |
75 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_NCR, PCI_DEVICE_ID_NCR_53C810, pci_fixup_ncr53c810); | 75 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_NCR, PCI_DEVICE_ID_NCR_53C810, pci_fixup_ncr53c810); |
76 | 76 | ||
77 | static void __devinit pci_fixup_ide_bases(struct pci_dev *d) | ||
78 | { | ||
79 | int i; | ||
80 | |||
81 | /* | ||
82 | * PCI IDE controllers use non-standard I/O port decoding, respect it. | ||
83 | */ | ||
84 | if ((d->class >> 8) != PCI_CLASS_STORAGE_IDE) | ||
85 | return; | ||
86 | DBG("PCI: IDE base address fixup for %s\n", pci_name(d)); | ||
87 | for(i=0; i<4; i++) { | ||
88 | struct resource *r = &d->resource[i]; | ||
89 | if ((r->start & ~0x80) == 0x374) { | ||
90 | r->start |= 2; | ||
91 | r->end = r->start; | ||
92 | } | ||
93 | } | ||
94 | } | ||
95 | DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, pci_fixup_ide_bases); | ||
96 | |||
97 | static void __devinit pci_fixup_ide_trash(struct pci_dev *d) | ||
98 | { | ||
99 | int i; | ||
100 | |||
101 | /* | ||
102 | * Runs the fixup only for the first IDE controller | ||
103 | * (Shai Fultheim - shai@ftcon.com) | ||
104 | */ | ||
105 | static int called = 0; | ||
106 | if (called) | ||
107 | return; | ||
108 | called = 1; | ||
109 | |||
110 | /* | ||
111 | * There exist PCI IDE controllers which have utter garbage | ||
112 | * in first four base registers. Ignore that. | ||
113 | */ | ||
114 | DBG("PCI: IDE base address trash cleared for %s\n", pci_name(d)); | ||
115 | for(i=0; i<4; i++) | ||
116 | d->resource[i].start = d->resource[i].end = d->resource[i].flags = 0; | ||
117 | } | ||
118 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_5513, pci_fixup_ide_trash); | ||
119 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801CA_10, pci_fixup_ide_trash); | ||
120 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801CA_11, pci_fixup_ide_trash); | ||
121 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801DB_9, pci_fixup_ide_trash); | ||
122 | |||
123 | static void __devinit pci_fixup_latency(struct pci_dev *d) | 77 | static void __devinit pci_fixup_latency(struct pci_dev *d) |
124 | { | 78 | { |
125 | /* | 79 | /* |
diff --git a/arch/i386/pci/i386.c b/arch/i386/pci/i386.c index 98580292f0d4..43005f044424 100644 --- a/arch/i386/pci/i386.c +++ b/arch/i386/pci/i386.c | |||
@@ -104,16 +104,24 @@ static void __init pcibios_allocate_bus_resources(struct list_head *bus_list) | |||
104 | /* Depth-First Search on bus tree */ | 104 | /* Depth-First Search on bus tree */ |
105 | list_for_each_entry(bus, bus_list, node) { | 105 | list_for_each_entry(bus, bus_list, node) { |
106 | if ((dev = bus->self)) { | 106 | if ((dev = bus->self)) { |
107 | for (idx = PCI_BRIDGE_RESOURCES; idx < PCI_NUM_RESOURCES; idx++) { | 107 | for (idx = PCI_BRIDGE_RESOURCES; |
108 | idx < PCI_NUM_RESOURCES; idx++) { | ||
108 | r = &dev->resource[idx]; | 109 | r = &dev->resource[idx]; |
109 | if (!r->flags) | 110 | if (!r->flags) |
110 | continue; | 111 | continue; |
111 | pr = pci_find_parent_resource(dev, r); | 112 | pr = pci_find_parent_resource(dev, r); |
112 | if (!r->start || !pr || request_resource(pr, r) < 0) { | 113 | if (!r->start || !pr || |
113 | printk(KERN_ERR "PCI: Cannot allocate resource region %d of bridge %s\n", idx, pci_name(dev)); | 114 | request_resource(pr, r) < 0) { |
114 | /* Something is wrong with the region. | 115 | printk(KERN_ERR "PCI: Cannot allocate " |
115 | Invalidate the resource to prevent child | 116 | "resource region %d " |
116 | resource allocations in this range. */ | 117 | "of bridge %s\n", |
118 | idx, pci_name(dev)); | ||
119 | /* | ||
120 | * Something is wrong with the region. | ||
121 | * Invalidate the resource to prevent | ||
122 | * child resource allocations in this | ||
123 | * range. | ||
124 | */ | ||
117 | r->flags = 0; | 125 | r->flags = 0; |
118 | } | 126 | } |
119 | } | 127 | } |
@@ -131,7 +139,7 @@ static void __init pcibios_allocate_resources(int pass) | |||
131 | 139 | ||
132 | for_each_pci_dev(dev) { | 140 | for_each_pci_dev(dev) { |
133 | pci_read_config_word(dev, PCI_COMMAND, &command); | 141 | pci_read_config_word(dev, PCI_COMMAND, &command); |
134 | for(idx = 0; idx < 6; idx++) { | 142 | for (idx = 0; idx < PCI_ROM_RESOURCE; idx++) { |
135 | r = &dev->resource[idx]; | 143 | r = &dev->resource[idx]; |
136 | if (r->parent) /* Already allocated */ | 144 | if (r->parent) /* Already allocated */ |
137 | continue; | 145 | continue; |
@@ -142,11 +150,15 @@ static void __init pcibios_allocate_resources(int pass) | |||
142 | else | 150 | else |
143 | disabled = !(command & PCI_COMMAND_MEMORY); | 151 | disabled = !(command & PCI_COMMAND_MEMORY); |
144 | if (pass == disabled) { | 152 | if (pass == disabled) { |
145 | DBG("PCI: Resource %08lx-%08lx (f=%lx, d=%d, p=%d)\n", | 153 | DBG("PCI: Resource %08lx-%08lx " |
154 | "(f=%lx, d=%d, p=%d)\n", | ||
146 | r->start, r->end, r->flags, disabled, pass); | 155 | r->start, r->end, r->flags, disabled, pass); |
147 | pr = pci_find_parent_resource(dev, r); | 156 | pr = pci_find_parent_resource(dev, r); |
148 | if (!pr || request_resource(pr, r) < 0) { | 157 | if (!pr || request_resource(pr, r) < 0) { |
149 | printk(KERN_ERR "PCI: Cannot allocate resource region %d of device %s\n", idx, pci_name(dev)); | 158 | printk(KERN_ERR "PCI: Cannot allocate " |
159 | "resource region %d " | ||
160 | "of device %s\n", | ||
161 | idx, pci_name(dev)); | ||
150 | /* We'll assign a new address later */ | 162 | /* We'll assign a new address later */ |
151 | r->end -= r->start; | 163 | r->end -= r->start; |
152 | r->start = 0; | 164 | r->start = 0; |
@@ -156,12 +168,16 @@ static void __init pcibios_allocate_resources(int pass) | |||
156 | if (!pass) { | 168 | if (!pass) { |
157 | r = &dev->resource[PCI_ROM_RESOURCE]; | 169 | r = &dev->resource[PCI_ROM_RESOURCE]; |
158 | if (r->flags & IORESOURCE_ROM_ENABLE) { | 170 | if (r->flags & IORESOURCE_ROM_ENABLE) { |
159 | /* Turn the ROM off, leave the resource region, but keep it unregistered. */ | 171 | /* Turn the ROM off, leave the resource region, |
172 | * but keep it unregistered. */ | ||
160 | u32 reg; | 173 | u32 reg; |
161 | DBG("PCI: Switching off ROM of %s\n", pci_name(dev)); | 174 | DBG("PCI: Switching off ROM of %s\n", |
175 | pci_name(dev)); | ||
162 | r->flags &= ~IORESOURCE_ROM_ENABLE; | 176 | r->flags &= ~IORESOURCE_ROM_ENABLE; |
163 | pci_read_config_dword(dev, dev->rom_base_reg, ®); | 177 | pci_read_config_dword(dev, |
164 | pci_write_config_dword(dev, dev->rom_base_reg, reg & ~PCI_ROM_ADDRESS_ENABLE); | 178 | dev->rom_base_reg, ®); |
179 | pci_write_config_dword(dev, dev->rom_base_reg, | ||
180 | reg & ~PCI_ROM_ADDRESS_ENABLE); | ||
165 | } | 181 | } |
166 | } | 182 | } |
167 | } | 183 | } |
@@ -173,9 +189,11 @@ static int __init pcibios_assign_resources(void) | |||
173 | struct resource *r, *pr; | 189 | struct resource *r, *pr; |
174 | 190 | ||
175 | if (!(pci_probe & PCI_ASSIGN_ROMS)) { | 191 | if (!(pci_probe & PCI_ASSIGN_ROMS)) { |
176 | /* Try to use BIOS settings for ROMs, otherwise let | 192 | /* |
177 | pci_assign_unassigned_resources() allocate the new | 193 | * Try to use BIOS settings for ROMs, otherwise let |
178 | addresses. */ | 194 | * pci_assign_unassigned_resources() allocate the new |
195 | * addresses. | ||
196 | */ | ||
179 | for_each_pci_dev(dev) { | 197 | for_each_pci_dev(dev) { |
180 | r = &dev->resource[PCI_ROM_RESOURCE]; | 198 | r = &dev->resource[PCI_ROM_RESOURCE]; |
181 | if (!r->flags || !r->start) | 199 | if (!r->flags || !r->start) |
@@ -215,9 +233,9 @@ int pcibios_enable_resources(struct pci_dev *dev, int mask) | |||
215 | 233 | ||
216 | pci_read_config_word(dev, PCI_COMMAND, &cmd); | 234 | pci_read_config_word(dev, PCI_COMMAND, &cmd); |
217 | old_cmd = cmd; | 235 | old_cmd = cmd; |
218 | for(idx = 0; idx < PCI_NUM_RESOURCES; idx++) { | 236 | for (idx = 0; idx < PCI_NUM_RESOURCES; idx++) { |
219 | /* Only set up the requested stuff */ | 237 | /* Only set up the requested stuff */ |
220 | if (!(mask & (1<<idx))) | 238 | if (!(mask & (1 << idx))) |
221 | continue; | 239 | continue; |
222 | 240 | ||
223 | r = &dev->resource[idx]; | 241 | r = &dev->resource[idx]; |
@@ -227,7 +245,9 @@ int pcibios_enable_resources(struct pci_dev *dev, int mask) | |||
227 | (!(r->flags & IORESOURCE_ROM_ENABLE))) | 245 | (!(r->flags & IORESOURCE_ROM_ENABLE))) |
228 | continue; | 246 | continue; |
229 | if (!r->start && r->end) { | 247 | if (!r->start && r->end) { |
230 | printk(KERN_ERR "PCI: Device %s not available because of resource collisions\n", pci_name(dev)); | 248 | printk(KERN_ERR "PCI: Device %s not available " |
249 | "because of resource collisions\n", | ||
250 | pci_name(dev)); | ||
231 | return -EINVAL; | 251 | return -EINVAL; |
232 | } | 252 | } |
233 | if (r->flags & IORESOURCE_IO) | 253 | if (r->flags & IORESOURCE_IO) |
@@ -236,7 +256,8 @@ int pcibios_enable_resources(struct pci_dev *dev, int mask) | |||
236 | cmd |= PCI_COMMAND_MEMORY; | 256 | cmd |= PCI_COMMAND_MEMORY; |
237 | } | 257 | } |
238 | if (cmd != old_cmd) { | 258 | if (cmd != old_cmd) { |
239 | printk("PCI: Enabling device %s (%04x -> %04x)\n", pci_name(dev), old_cmd, cmd); | 259 | printk("PCI: Enabling device %s (%04x -> %04x)\n", |
260 | pci_name(dev), old_cmd, cmd); | ||
240 | pci_write_config_word(dev, PCI_COMMAND, cmd); | 261 | pci_write_config_word(dev, PCI_COMMAND, cmd); |
241 | } | 262 | } |
242 | return 0; | 263 | return 0; |
@@ -258,7 +279,8 @@ void pcibios_set_master(struct pci_dev *dev) | |||
258 | lat = pcibios_max_latency; | 279 | lat = pcibios_max_latency; |
259 | else | 280 | else |
260 | return; | 281 | return; |
261 | printk(KERN_DEBUG "PCI: Setting latency timer of device %s to %d\n", pci_name(dev), lat); | 282 | printk(KERN_DEBUG "PCI: Setting latency timer of device %s to %d\n", |
283 | pci_name(dev), lat); | ||
262 | pci_write_config_byte(dev, PCI_LATENCY_TIMER, lat); | 284 | pci_write_config_byte(dev, PCI_LATENCY_TIMER, lat); |
263 | } | 285 | } |
264 | 286 | ||
diff --git a/arch/i386/pci/irq.c b/arch/i386/pci/irq.c index 69163998adeb..e65551cd8216 100644 --- a/arch/i386/pci/irq.c +++ b/arch/i386/pci/irq.c | |||
@@ -543,6 +543,12 @@ static __init int intel_router_probe(struct irq_router *r, struct pci_dev *route | |||
543 | case PCI_DEVICE_ID_INTEL_ICH8_2: | 543 | case PCI_DEVICE_ID_INTEL_ICH8_2: |
544 | case PCI_DEVICE_ID_INTEL_ICH8_3: | 544 | case PCI_DEVICE_ID_INTEL_ICH8_3: |
545 | case PCI_DEVICE_ID_INTEL_ICH8_4: | 545 | case PCI_DEVICE_ID_INTEL_ICH8_4: |
546 | case PCI_DEVICE_ID_INTEL_ICH9_0: | ||
547 | case PCI_DEVICE_ID_INTEL_ICH9_1: | ||
548 | case PCI_DEVICE_ID_INTEL_ICH9_2: | ||
549 | case PCI_DEVICE_ID_INTEL_ICH9_3: | ||
550 | case PCI_DEVICE_ID_INTEL_ICH9_4: | ||
551 | case PCI_DEVICE_ID_INTEL_ICH9_5: | ||
546 | r->name = "PIIX/ICH"; | 552 | r->name = "PIIX/ICH"; |
547 | r->get = pirq_piix_get; | 553 | r->get = pirq_piix_get; |
548 | r->set = pirq_piix_set; | 554 | r->set = pirq_piix_set; |
diff --git a/arch/ia64/hp/common/sba_iommu.c b/arch/ia64/hp/common/sba_iommu.c index db8e1fcfa047..14691cda05c3 100644 --- a/arch/ia64/hp/common/sba_iommu.c +++ b/arch/ia64/hp/common/sba_iommu.c | |||
@@ -75,7 +75,7 @@ | |||
75 | ** If a device prefetches beyond the end of a valid pdir entry, it will cause | 75 | ** If a device prefetches beyond the end of a valid pdir entry, it will cause |
76 | ** a hard failure, ie. MCA. Version 3.0 and later of the zx1 LBA should | 76 | ** a hard failure, ie. MCA. Version 3.0 and later of the zx1 LBA should |
77 | ** disconnect on 4k boundaries and prevent such issues. If the device is | 77 | ** disconnect on 4k boundaries and prevent such issues. If the device is |
78 | ** particularly agressive, this option will keep the entire pdir valid such | 78 | ** particularly aggressive, this option will keep the entire pdir valid such |
79 | ** that prefetching will hit a valid address. This could severely impact | 79 | ** that prefetching will hit a valid address. This could severely impact |
80 | ** error containment, and is therefore off by default. The page that is | 80 | ** error containment, and is therefore off by default. The page that is |
81 | ** used for spill-over is poisoned, so that should help debugging somewhat. | 81 | ** used for spill-over is poisoned, so that should help debugging somewhat. |
@@ -258,10 +258,10 @@ static u64 prefetch_spill_page; | |||
258 | 258 | ||
259 | /* | 259 | /* |
260 | ** DMA_CHUNK_SIZE is used by the SCSI mid-layer to break up | 260 | ** DMA_CHUNK_SIZE is used by the SCSI mid-layer to break up |
261 | ** (or rather not merge) DMA's into managable chunks. | 261 | ** (or rather not merge) DMAs into manageable chunks. |
262 | ** On parisc, this is more of the software/tuning constraint | 262 | ** On parisc, this is more of the software/tuning constraint |
263 | ** rather than the HW. I/O MMU allocation alogorithms can be | 263 | ** rather than the HW. I/O MMU allocation algorithms can be |
264 | ** faster with smaller size is (to some degree). | 264 | ** faster with smaller sizes (to some degree). |
265 | */ | 265 | */ |
266 | #define DMA_CHUNK_SIZE (BITS_PER_LONG*iovp_size) | 266 | #define DMA_CHUNK_SIZE (BITS_PER_LONG*iovp_size) |
267 | 267 | ||
diff --git a/arch/ia64/lib/checksum.c b/arch/ia64/lib/checksum.c index beb11721d9f5..4411d9baeb21 100644 --- a/arch/ia64/lib/checksum.c +++ b/arch/ia64/lib/checksum.c | |||
@@ -33,32 +33,32 @@ from64to16 (unsigned long x) | |||
33 | * computes the checksum of the TCP/UDP pseudo-header | 33 | * computes the checksum of the TCP/UDP pseudo-header |
34 | * returns a 16-bit checksum, already complemented. | 34 | * returns a 16-bit checksum, already complemented. |
35 | */ | 35 | */ |
36 | unsigned short int | 36 | __sum16 |
37 | csum_tcpudp_magic (unsigned long saddr, unsigned long daddr, unsigned short len, | 37 | csum_tcpudp_magic (__be32 saddr, __be32 daddr, unsigned short len, |
38 | unsigned short proto, unsigned int sum) | 38 | unsigned short proto, __wsum sum) |
39 | { | 39 | { |
40 | return ~from64to16(saddr + daddr + sum + ((unsigned long) ntohs(len) << 16) + | 40 | return (__force __sum16)~from64to16( |
41 | ((unsigned long) proto << 8)); | 41 | (__force u64)saddr + (__force u64)daddr + |
42 | (__force u64)sum + ((len + proto) << 8)); | ||
42 | } | 43 | } |
43 | 44 | ||
44 | EXPORT_SYMBOL(csum_tcpudp_magic); | 45 | EXPORT_SYMBOL(csum_tcpudp_magic); |
45 | 46 | ||
46 | unsigned int | 47 | __wsum |
47 | csum_tcpudp_nofold (unsigned long saddr, unsigned long daddr, unsigned short len, | 48 | csum_tcpudp_nofold (__be32 saddr, __be32 daddr, unsigned short len, |
48 | unsigned short proto, unsigned int sum) | 49 | unsigned short proto, __wsum sum) |
49 | { | 50 | { |
50 | unsigned long result; | 51 | unsigned long result; |
51 | 52 | ||
52 | result = (saddr + daddr + sum + | 53 | result = (__force u64)saddr + (__force u64)daddr + |
53 | ((unsigned long) ntohs(len) << 16) + | 54 | (__force u64)sum + ((len + proto) << 8); |
54 | ((unsigned long) proto << 8)); | ||
55 | 55 | ||
56 | /* Fold down to 32-bits so we don't lose in the typedef-less network stack. */ | 56 | /* Fold down to 32-bits so we don't lose in the typedef-less network stack. */ |
57 | /* 64 to 33 */ | 57 | /* 64 to 33 */ |
58 | result = (result & 0xffffffff) + (result >> 32); | 58 | result = (result & 0xffffffff) + (result >> 32); |
59 | /* 33 to 32 */ | 59 | /* 33 to 32 */ |
60 | result = (result & 0xffffffff) + (result >> 32); | 60 | result = (result & 0xffffffff) + (result >> 32); |
61 | return result; | 61 | return (__force __wsum)result; |
62 | } | 62 | } |
63 | 63 | ||
64 | extern unsigned long do_csum (const unsigned char *, long); | 64 | extern unsigned long do_csum (const unsigned char *, long); |
@@ -75,16 +75,15 @@ extern unsigned long do_csum (const unsigned char *, long); | |||
75 | * | 75 | * |
76 | * it's best to have buff aligned on a 32-bit boundary | 76 | * it's best to have buff aligned on a 32-bit boundary |
77 | */ | 77 | */ |
78 | unsigned int | 78 | __wsum csum_partial(const void *buff, int len, __wsum sum) |
79 | csum_partial (const unsigned char * buff, int len, unsigned int sum) | ||
80 | { | 79 | { |
81 | unsigned long result = do_csum(buff, len); | 80 | u64 result = do_csum(buff, len); |
82 | 81 | ||
83 | /* add in old sum, and carry.. */ | 82 | /* add in old sum, and carry.. */ |
84 | result += sum; | 83 | result += (__force u32)sum; |
85 | /* 32+c bits -> 32 bits */ | 84 | /* 32+c bits -> 32 bits */ |
86 | result = (result & 0xffffffff) + (result >> 32); | 85 | result = (result & 0xffffffff) + (result >> 32); |
87 | return result; | 86 | return (__force __wsum)result; |
88 | } | 87 | } |
89 | 88 | ||
90 | EXPORT_SYMBOL(csum_partial); | 89 | EXPORT_SYMBOL(csum_partial); |
@@ -93,10 +92,9 @@ EXPORT_SYMBOL(csum_partial); | |||
93 | * this routine is used for miscellaneous IP-like checksums, mainly | 92 | * this routine is used for miscellaneous IP-like checksums, mainly |
94 | * in icmp.c | 93 | * in icmp.c |
95 | */ | 94 | */ |
96 | unsigned short | 95 | __sum16 ip_compute_csum (const void *buff, int len) |
97 | ip_compute_csum (unsigned char * buff, int len) | ||
98 | { | 96 | { |
99 | return ~do_csum(buff,len); | 97 | return (__force __sum16)~do_csum(buff,len); |
100 | } | 98 | } |
101 | 99 | ||
102 | EXPORT_SYMBOL(ip_compute_csum); | 100 | EXPORT_SYMBOL(ip_compute_csum); |
diff --git a/arch/ia64/lib/csum_partial_copy.c b/arch/ia64/lib/csum_partial_copy.c index 36866e8a5d2b..503dfe6d1450 100644 --- a/arch/ia64/lib/csum_partial_copy.c +++ b/arch/ia64/lib/csum_partial_copy.c | |||
@@ -104,9 +104,9 @@ out: | |||
104 | */ | 104 | */ |
105 | extern unsigned long do_csum(const unsigned char *, long); | 105 | extern unsigned long do_csum(const unsigned char *, long); |
106 | 106 | ||
107 | static unsigned int | 107 | __wsum |
108 | do_csum_partial_copy_from_user (const unsigned char __user *src, unsigned char *dst, | 108 | csum_partial_copy_from_user(const void __user *src, void *dst, |
109 | int len, unsigned int psum, int *errp) | 109 | int len, __wsum psum, int *errp) |
110 | { | 110 | { |
111 | unsigned long result; | 111 | unsigned long result; |
112 | 112 | ||
@@ -122,30 +122,17 @@ do_csum_partial_copy_from_user (const unsigned char __user *src, unsigned char * | |||
122 | result = do_csum(dst, len); | 122 | result = do_csum(dst, len); |
123 | 123 | ||
124 | /* add in old sum, and carry.. */ | 124 | /* add in old sum, and carry.. */ |
125 | result += psum; | 125 | result += (__force u32)psum; |
126 | /* 32+c bits -> 32 bits */ | 126 | /* 32+c bits -> 32 bits */ |
127 | result = (result & 0xffffffff) + (result >> 32); | 127 | result = (result & 0xffffffff) + (result >> 32); |
128 | return result; | 128 | return (__force __wsum)result; |
129 | } | ||
130 | |||
131 | unsigned int | ||
132 | csum_partial_copy_from_user (const unsigned char __user *src, unsigned char *dst, | ||
133 | int len, unsigned int sum, int *errp) | ||
134 | { | ||
135 | if (!access_ok(VERIFY_READ, src, len)) { | ||
136 | *errp = -EFAULT; | ||
137 | memset(dst, 0, len); | ||
138 | return sum; | ||
139 | } | ||
140 | |||
141 | return do_csum_partial_copy_from_user(src, dst, len, sum, errp); | ||
142 | } | 129 | } |
143 | 130 | ||
144 | unsigned int | 131 | __wsum |
145 | csum_partial_copy_nocheck(const unsigned char __user *src, unsigned char *dst, | 132 | csum_partial_copy_nocheck(const void *src, void *dst, int len, __wsum sum) |
146 | int len, unsigned int sum) | ||
147 | { | 133 | { |
148 | return do_csum_partial_copy_from_user(src, dst, len, sum, NULL); | 134 | return csum_partial_copy_from_user((__force const void __user *)src, |
135 | dst, len, sum, NULL); | ||
149 | } | 136 | } |
150 | 137 | ||
151 | EXPORT_SYMBOL(csum_partial_copy_nocheck); | 138 | EXPORT_SYMBOL(csum_partial_copy_nocheck); |
diff --git a/arch/ia64/pci/pci.c b/arch/ia64/pci/pci.c index b30be7c48ba8..f4edfbf27134 100644 --- a/arch/ia64/pci/pci.c +++ b/arch/ia64/pci/pci.c | |||
@@ -469,10 +469,11 @@ pcibios_fixup_resources(struct pci_dev *dev, int start, int limit) | |||
469 | } | 469 | } |
470 | } | 470 | } |
471 | 471 | ||
472 | static void __devinit pcibios_fixup_device_resources(struct pci_dev *dev) | 472 | void __devinit pcibios_fixup_device_resources(struct pci_dev *dev) |
473 | { | 473 | { |
474 | pcibios_fixup_resources(dev, 0, PCI_BRIDGE_RESOURCES); | 474 | pcibios_fixup_resources(dev, 0, PCI_BRIDGE_RESOURCES); |
475 | } | 475 | } |
476 | EXPORT_SYMBOL_GPL(pcibios_fixup_device_resources); | ||
476 | 477 | ||
477 | static void __devinit pcibios_fixup_bridge_resources(struct pci_dev *dev) | 478 | static void __devinit pcibios_fixup_bridge_resources(struct pci_dev *dev) |
478 | { | 479 | { |
@@ -493,6 +494,7 @@ pcibios_fixup_bus (struct pci_bus *b) | |||
493 | } | 494 | } |
494 | list_for_each_entry(dev, &b->devices, bus_list) | 495 | list_for_each_entry(dev, &b->devices, bus_list) |
495 | pcibios_fixup_device_resources(dev); | 496 | pcibios_fixup_device_resources(dev); |
497 | platform_pci_fixup_bus(b); | ||
496 | 498 | ||
497 | return; | 499 | return; |
498 | } | 500 | } |
@@ -738,75 +740,44 @@ int ia64_pci_legacy_write(struct pci_bus *bus, u16 port, u32 val, u8 size) | |||
738 | return ret; | 740 | return ret; |
739 | } | 741 | } |
740 | 742 | ||
743 | /* It's defined in drivers/pci/pci.c */ | ||
744 | extern u8 pci_cache_line_size; | ||
745 | |||
741 | /** | 746 | /** |
742 | * pci_cacheline_size - determine cacheline size for PCI devices | 747 | * set_pci_cacheline_size - determine cacheline size for PCI devices |
743 | * @dev: void | ||
744 | * | 748 | * |
745 | * We want to use the line-size of the outer-most cache. We assume | 749 | * We want to use the line-size of the outer-most cache. We assume |
746 | * that this line-size is the same for all CPUs. | 750 | * that this line-size is the same for all CPUs. |
747 | * | 751 | * |
748 | * Code mostly taken from arch/ia64/kernel/palinfo.c:cache_info(). | 752 | * Code mostly taken from arch/ia64/kernel/palinfo.c:cache_info(). |
749 | * | ||
750 | * RETURNS: An appropriate -ERRNO error value on eror, or zero for success. | ||
751 | */ | 753 | */ |
752 | static unsigned long | 754 | static void __init set_pci_cacheline_size(void) |
753 | pci_cacheline_size (void) | ||
754 | { | 755 | { |
755 | u64 levels, unique_caches; | 756 | u64 levels, unique_caches; |
756 | s64 status; | 757 | s64 status; |
757 | pal_cache_config_info_t cci; | 758 | pal_cache_config_info_t cci; |
758 | static u8 cacheline_size; | ||
759 | |||
760 | if (cacheline_size) | ||
761 | return cacheline_size; | ||
762 | 759 | ||
763 | status = ia64_pal_cache_summary(&levels, &unique_caches); | 760 | status = ia64_pal_cache_summary(&levels, &unique_caches); |
764 | if (status != 0) { | 761 | if (status != 0) { |
765 | printk(KERN_ERR "%s: ia64_pal_cache_summary() failed (status=%ld)\n", | 762 | printk(KERN_ERR "%s: ia64_pal_cache_summary() failed " |
766 | __FUNCTION__, status); | 763 | "(status=%ld)\n", __FUNCTION__, status); |
767 | return SMP_CACHE_BYTES; | 764 | return; |
768 | } | 765 | } |
769 | 766 | ||
770 | status = ia64_pal_cache_config_info(levels - 1, /* cache_type (data_or_unified)= */ 2, | 767 | status = ia64_pal_cache_config_info(levels - 1, |
771 | &cci); | 768 | /* cache_type (data_or_unified)= */ 2, &cci); |
772 | if (status != 0) { | 769 | if (status != 0) { |
773 | printk(KERN_ERR "%s: ia64_pal_cache_config_info() failed (status=%ld)\n", | 770 | printk(KERN_ERR "%s: ia64_pal_cache_config_info() failed " |
774 | __FUNCTION__, status); | 771 | "(status=%ld)\n", __FUNCTION__, status); |
775 | return SMP_CACHE_BYTES; | 772 | return; |
776 | } | 773 | } |
777 | cacheline_size = 1 << cci.pcci_line_size; | 774 | pci_cache_line_size = (1 << cci.pcci_line_size) / 4; |
778 | return cacheline_size; | ||
779 | } | 775 | } |
780 | 776 | ||
781 | /** | 777 | static int __init pcibios_init(void) |
782 | * pcibios_prep_mwi - helper function for drivers/pci/pci.c:pci_set_mwi() | 778 | { |
783 | * @dev: the PCI device for which MWI is enabled | 779 | set_pci_cacheline_size(); |
784 | * | 780 | return 0; |
785 | * For ia64, we can get the cacheline sizes from PAL. | ||
786 | * | ||
787 | * RETURNS: An appropriate -ERRNO error value on eror, or zero for success. | ||
788 | */ | ||
789 | int | ||
790 | pcibios_prep_mwi (struct pci_dev *dev) | ||
791 | { | ||
792 | unsigned long desired_linesize, current_linesize; | ||
793 | int rc = 0; | ||
794 | u8 pci_linesize; | ||
795 | |||
796 | desired_linesize = pci_cacheline_size(); | ||
797 | |||
798 | pci_read_config_byte(dev, PCI_CACHE_LINE_SIZE, &pci_linesize); | ||
799 | current_linesize = 4 * pci_linesize; | ||
800 | if (desired_linesize != current_linesize) { | ||
801 | printk(KERN_WARNING "PCI: slot %s has incorrect PCI cache line size of %lu bytes,", | ||
802 | pci_name(dev), current_linesize); | ||
803 | if (current_linesize > desired_linesize) { | ||
804 | printk(" expected %lu bytes instead\n", desired_linesize); | ||
805 | rc = -EINVAL; | ||
806 | } else { | ||
807 | printk(" correcting to %lu\n", desired_linesize); | ||
808 | pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, desired_linesize / 4); | ||
809 | } | ||
810 | } | ||
811 | return rc; | ||
812 | } | 781 | } |
782 | |||
783 | subsys_initcall(pcibios_init); | ||
diff --git a/arch/ia64/sn/kernel/Makefile b/arch/ia64/sn/kernel/Makefile index 2d78f34dd763..0a59371d3475 100644 --- a/arch/ia64/sn/kernel/Makefile +++ b/arch/ia64/sn/kernel/Makefile | |||
@@ -4,13 +4,14 @@ | |||
4 | # License. See the file "COPYING" in the main directory of this archive | 4 | # License. See the file "COPYING" in the main directory of this archive |
5 | # for more details. | 5 | # for more details. |
6 | # | 6 | # |
7 | # Copyright (C) 1999,2001-2005 Silicon Graphics, Inc. All Rights Reserved. | 7 | # Copyright (C) 1999,2001-2006 Silicon Graphics, Inc. All Rights Reserved. |
8 | # | 8 | # |
9 | 9 | ||
10 | CPPFLAGS += -I$(srctree)/arch/ia64/sn/include | 10 | CPPFLAGS += -I$(srctree)/arch/ia64/sn/include |
11 | 11 | ||
12 | obj-y += setup.o bte.o bte_error.o irq.o mca.o idle.o \ | 12 | obj-y += setup.o bte.o bte_error.o irq.o mca.o idle.o \ |
13 | huberror.o io_init.o iomv.o klconflib.o pio_phys.o \ | 13 | huberror.o io_acpi_init.o io_common.o \ |
14 | io_init.o iomv.o klconflib.o pio_phys.o \ | ||
14 | sn2/ | 15 | sn2/ |
15 | obj-$(CONFIG_IA64_GENERIC) += machvec.o | 16 | obj-$(CONFIG_IA64_GENERIC) += machvec.o |
16 | obj-$(CONFIG_SGI_TIOCX) += tiocx.o | 17 | obj-$(CONFIG_SGI_TIOCX) += tiocx.o |
diff --git a/arch/ia64/sn/kernel/io_acpi_init.c b/arch/ia64/sn/kernel/io_acpi_init.c new file mode 100644 index 000000000000..99d7f278612a --- /dev/null +++ b/arch/ia64/sn/kernel/io_acpi_init.c | |||
@@ -0,0 +1,231 @@ | |||
1 | /* | ||
2 | * This file is subject to the terms and conditions of the GNU General Public | ||
3 | * License. See the file "COPYING" in the main directory of this archive | ||
4 | * for more details. | ||
5 | * | ||
6 | * Copyright (C) 2006 Silicon Graphics, Inc. All rights reserved. | ||
7 | */ | ||
8 | |||
9 | #include <asm/sn/types.h> | ||
10 | #include <asm/sn/addrs.h> | ||
11 | #include <asm/sn/pcidev.h> | ||
12 | #include <asm/sn/pcibus_provider_defs.h> | ||
13 | #include <asm/sn/sn_sal.h> | ||
14 | #include "xtalk/hubdev.h" | ||
15 | #include <linux/acpi.h> | ||
16 | |||
17 | |||
18 | /* | ||
19 | * The code in this file will only be executed when running with | ||
20 | * a PROM that has ACPI IO support. (i.e., SN_ACPI_BASE_SUPPORT() == 1) | ||
21 | */ | ||
22 | |||
23 | |||
24 | /* | ||
25 | * This value must match the UUID the PROM uses | ||
26 | * (io/acpi/defblk.c) when building a vendor descriptor. | ||
27 | */ | ||
28 | struct acpi_vendor_uuid sn_uuid = { | ||
29 | .subtype = 0, | ||
30 | .data = { 0x2c, 0xc6, 0xa6, 0xfe, 0x9c, 0x44, 0xda, 0x11, | ||
31 | 0xa2, 0x7c, 0x08, 0x00, 0x69, 0x13, 0xea, 0x51 }, | ||
32 | }; | ||
33 | |||
34 | /* | ||
35 | * Perform the early IO init in PROM. | ||
36 | */ | ||
37 | static s64 | ||
38 | sal_ioif_init(u64 *result) | ||
39 | { | ||
40 | struct ia64_sal_retval isrv = {0,0,0,0}; | ||
41 | |||
42 | SAL_CALL_NOLOCK(isrv, | ||
43 | SN_SAL_IOIF_INIT, 0, 0, 0, 0, 0, 0, 0); | ||
44 | *result = isrv.v0; | ||
45 | return isrv.status; | ||
46 | } | ||
47 | |||
48 | /* | ||
49 | * sn_hubdev_add - The 'add' function of the acpi_sn_hubdev_driver. | ||
50 | * Called for every "SGIHUB" or "SGITIO" device defined | ||
51 | * in the ACPI namespace. | ||
52 | */ | ||
53 | static int __init | ||
54 | sn_hubdev_add(struct acpi_device *device) | ||
55 | { | ||
56 | struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL }; | ||
57 | u64 addr; | ||
58 | struct hubdev_info *hubdev; | ||
59 | struct hubdev_info *hubdev_ptr; | ||
60 | int i; | ||
61 | u64 nasid; | ||
62 | struct acpi_resource *resource; | ||
63 | int ret = 0; | ||
64 | acpi_status status; | ||
65 | struct acpi_resource_vendor_typed *vendor; | ||
66 | extern void sn_common_hubdev_init(struct hubdev_info *); | ||
67 | |||
68 | status = acpi_get_vendor_resource(device->handle, METHOD_NAME__CRS, | ||
69 | &sn_uuid, &buffer); | ||
70 | if (ACPI_FAILURE(status)) { | ||
71 | printk(KERN_ERR | ||
72 | "sn_hubdev_add: acpi_get_vendor_resource() failed: %d\n", | ||
73 | status); | ||
74 | return 1; | ||
75 | } | ||
76 | |||
77 | resource = buffer.pointer; | ||
78 | vendor = &resource->data.vendor_typed; | ||
79 | if ((vendor->byte_length - sizeof(struct acpi_vendor_uuid)) != | ||
80 | sizeof(struct hubdev_info *)) { | ||
81 | printk(KERN_ERR | ||
82 | "sn_hubdev_add: Invalid vendor data length: %d\n", | ||
83 | vendor->byte_length); | ||
84 | ret = 1; | ||
85 | goto exit; | ||
86 | } | ||
87 | |||
88 | memcpy(&addr, vendor->byte_data, sizeof(struct hubdev_info *)); | ||
89 | hubdev_ptr = __va((struct hubdev_info *) addr); | ||
90 | |||
91 | nasid = hubdev_ptr->hdi_nasid; | ||
92 | i = nasid_to_cnodeid(nasid); | ||
93 | hubdev = (struct hubdev_info *)(NODEPDA(i)->pdinfo); | ||
94 | *hubdev = *hubdev_ptr; | ||
95 | sn_common_hubdev_init(hubdev); | ||
96 | |||
97 | exit: | ||
98 | kfree(buffer.pointer); | ||
99 | return ret; | ||
100 | } | ||
101 | |||
102 | /* | ||
103 | * sn_get_bussoft_ptr() - The pcibus_bussoft pointer is found in | ||
104 | * the ACPI Vendor resource for this bus. | ||
105 | */ | ||
106 | static struct pcibus_bussoft * | ||
107 | sn_get_bussoft_ptr(struct pci_bus *bus) | ||
108 | { | ||
109 | u64 addr; | ||
110 | struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL }; | ||
111 | acpi_handle handle; | ||
112 | struct pcibus_bussoft *prom_bussoft_ptr; | ||
113 | struct acpi_resource *resource; | ||
114 | acpi_status status; | ||
115 | struct acpi_resource_vendor_typed *vendor; | ||
116 | |||
117 | |||
118 | handle = PCI_CONTROLLER(bus)->acpi_handle; | ||
119 | status = acpi_get_vendor_resource(handle, METHOD_NAME__CRS, | ||
120 | &sn_uuid, &buffer); | ||
121 | if (ACPI_FAILURE(status)) { | ||
122 | printk(KERN_ERR "get_acpi_pcibus_ptr: " | ||
123 | "get_acpi_bussoft_info() failed: %d\n", | ||
124 | status); | ||
125 | return NULL; | ||
126 | } | ||
127 | resource = buffer.pointer; | ||
128 | vendor = &resource->data.vendor_typed; | ||
129 | |||
130 | if ((vendor->byte_length - sizeof(struct acpi_vendor_uuid)) != | ||
131 | sizeof(struct pcibus_bussoft *)) { | ||
132 | printk(KERN_ERR | ||
133 | "get_acpi_bussoft_ptr: Invalid vendor data " | ||
134 | "length %d\n", vendor->byte_length); | ||
135 | kfree(buffer.pointer); | ||
136 | return NULL; | ||
137 | } | ||
138 | memcpy(&addr, vendor->byte_data, sizeof(struct pcibus_bussoft *)); | ||
139 | prom_bussoft_ptr = __va((struct pcibus_bussoft *) addr); | ||
140 | kfree(buffer.pointer); | ||
141 | |||
142 | return prom_bussoft_ptr; | ||
143 | } | ||
144 | |||
145 | /* | ||
146 | * sn_acpi_bus_fixup | ||
147 | */ | ||
148 | void | ||
149 | sn_acpi_bus_fixup(struct pci_bus *bus) | ||
150 | { | ||
151 | struct pci_dev *pci_dev = NULL; | ||
152 | struct pcibus_bussoft *prom_bussoft_ptr; | ||
153 | extern void sn_common_bus_fixup(struct pci_bus *, | ||
154 | struct pcibus_bussoft *); | ||
155 | |||
156 | if (!bus->parent) { /* If root bus */ | ||
157 | prom_bussoft_ptr = sn_get_bussoft_ptr(bus); | ||
158 | if (prom_bussoft_ptr == NULL) { | ||
159 | printk(KERN_ERR | ||
160 | "sn_pci_fixup_bus: 0x%04x:0x%02x Unable to " | ||
161 | "obtain prom_bussoft_ptr\n", | ||
162 | pci_domain_nr(bus), bus->number); | ||
163 | return; | ||
164 | } | ||
165 | sn_common_bus_fixup(bus, prom_bussoft_ptr); | ||
166 | } | ||
167 | list_for_each_entry(pci_dev, &bus->devices, bus_list) { | ||
168 | sn_pci_fixup_slot(pci_dev); | ||
169 | } | ||
170 | } | ||
171 | |||
172 | /* | ||
173 | * sn_acpi_slot_fixup - Perform any SN specific slot fixup. | ||
174 | * At present there does not appear to be | ||
175 | * any generic way to handle a ROM image | ||
176 | * that has been shadowed by the PROM, so | ||
177 | * we pass a pointer to it within the | ||
178 | * pcidev_info structure. | ||
179 | */ | ||
180 | |||
181 | void | ||
182 | sn_acpi_slot_fixup(struct pci_dev *dev, struct pcidev_info *pcidev_info) | ||
183 | { | ||
184 | void __iomem *addr; | ||
185 | size_t size; | ||
186 | |||
187 | if (pcidev_info->pdi_pio_mapped_addr[PCI_ROM_RESOURCE]) { | ||
188 | /* | ||
189 | * A valid ROM image exists and has been shadowed by the | ||
190 | * PROM. Setup the pci_dev ROM resource to point to | ||
191 | * the shadowed copy. | ||
192 | */ | ||
193 | size = dev->resource[PCI_ROM_RESOURCE].end - | ||
194 | dev->resource[PCI_ROM_RESOURCE].start; | ||
195 | addr = | ||
196 | ioremap(pcidev_info->pdi_pio_mapped_addr[PCI_ROM_RESOURCE], | ||
197 | size); | ||
198 | dev->resource[PCI_ROM_RESOURCE].start = (unsigned long) addr; | ||
199 | dev->resource[PCI_ROM_RESOURCE].end = | ||
200 | (unsigned long) addr + size; | ||
201 | dev->resource[PCI_ROM_RESOURCE].flags |= IORESOURCE_ROM_BIOS_COPY; | ||
202 | } | ||
203 | } | ||
204 | |||
205 | static struct acpi_driver acpi_sn_hubdev_driver = { | ||
206 | .name = "SGI HUBDEV Driver", | ||
207 | .ids = "SGIHUB,SGITIO", | ||
208 | .ops = { | ||
209 | .add = sn_hubdev_add, | ||
210 | }, | ||
211 | }; | ||
212 | |||
213 | |||
214 | /* | ||
215 | * sn_io_acpi_init - PROM has ACPI support for IO, defining at a minimum the | ||
216 | * nodes and root buses in the DSDT. As a result, bus scanning | ||
217 | * will be initiated by the Linux ACPI code. | ||
218 | */ | ||
219 | |||
220 | void __init | ||
221 | sn_io_acpi_init(void) | ||
222 | { | ||
223 | u64 result; | ||
224 | s64 status; | ||
225 | |||
226 | acpi_bus_register_driver(&acpi_sn_hubdev_driver); | ||
227 | status = sal_ioif_init(&result); | ||
228 | if (status || result) | ||
229 | panic("sal_ioif_init failed: [%lx] %s\n", | ||
230 | status, ia64_sal_strerror(status)); | ||
231 | } | ||
diff --git a/arch/ia64/sn/kernel/io_common.c b/arch/ia64/sn/kernel/io_common.c new file mode 100644 index 000000000000..d4dd8f4b6b8d --- /dev/null +++ b/arch/ia64/sn/kernel/io_common.c | |||
@@ -0,0 +1,613 @@ | |||
1 | /* | ||
2 | * This file is subject to the terms and conditions of the GNU General Public | ||
3 | * License. See the file "COPYING" in the main directory of this archive | ||
4 | * for more details. | ||
5 | * | ||
6 | * Copyright (C) 2006 Silicon Graphics, Inc. All rights reserved. | ||
7 | */ | ||
8 | |||
9 | #include <linux/bootmem.h> | ||
10 | #include <asm/sn/types.h> | ||
11 | #include <asm/sn/addrs.h> | ||
12 | #include <asm/sn/sn_feature_sets.h> | ||
13 | #include <asm/sn/geo.h> | ||
14 | #include <asm/sn/io.h> | ||
15 | #include <asm/sn/l1.h> | ||
16 | #include <asm/sn/module.h> | ||
17 | #include <asm/sn/pcibr_provider.h> | ||
18 | #include <asm/sn/pcibus_provider_defs.h> | ||
19 | #include <asm/sn/pcidev.h> | ||
20 | #include <asm/sn/simulator.h> | ||
21 | #include <asm/sn/sn_sal.h> | ||
22 | #include <asm/sn/tioca_provider.h> | ||
23 | #include <asm/sn/tioce_provider.h> | ||
24 | #include "xtalk/hubdev.h" | ||
25 | #include "xtalk/xwidgetdev.h" | ||
26 | #include <linux/acpi.h> | ||
27 | #include <asm/sn/sn2/sn_hwperf.h> | ||
28 | #include <asm/sn/acpi.h> | ||
29 | |||
30 | extern void sn_init_cpei_timer(void); | ||
31 | extern void register_sn_procfs(void); | ||
32 | extern void sn_acpi_bus_fixup(struct pci_bus *); | ||
33 | extern void sn_bus_fixup(struct pci_bus *); | ||
34 | extern void sn_acpi_slot_fixup(struct pci_dev *, struct pcidev_info *); | ||
35 | extern void sn_more_slot_fixup(struct pci_dev *, struct pcidev_info *); | ||
36 | extern void sn_legacy_pci_window_fixup(struct pci_controller *, u64, u64); | ||
37 | extern void sn_io_acpi_init(void); | ||
38 | extern void sn_io_init(void); | ||
39 | |||
40 | |||
41 | static struct list_head sn_sysdata_list; | ||
42 | |||
43 | /* sysdata list struct */ | ||
44 | struct sysdata_el { | ||
45 | struct list_head entry; | ||
46 | void *sysdata; | ||
47 | }; | ||
48 | |||
49 | int sn_ioif_inited; /* SN I/O infrastructure initialized? */ | ||
50 | |||
51 | struct sn_pcibus_provider *sn_pci_provider[PCIIO_ASIC_MAX_TYPES]; /* indexed by asic type */ | ||
52 | |||
53 | /* | ||
54 | * Hooks and struct for unsupported pci providers | ||
55 | */ | ||
56 | |||
57 | static dma_addr_t | ||
58 | sn_default_pci_map(struct pci_dev *pdev, unsigned long paddr, size_t size, int type) | ||
59 | { | ||
60 | return 0; | ||
61 | } | ||
62 | |||
63 | static void | ||
64 | sn_default_pci_unmap(struct pci_dev *pdev, dma_addr_t addr, int direction) | ||
65 | { | ||
66 | return; | ||
67 | } | ||
68 | |||
69 | static void * | ||
70 | sn_default_pci_bus_fixup(struct pcibus_bussoft *soft, struct pci_controller *controller) | ||
71 | { | ||
72 | return NULL; | ||
73 | } | ||
74 | |||
75 | static struct sn_pcibus_provider sn_pci_default_provider = { | ||
76 | .dma_map = sn_default_pci_map, | ||
77 | .dma_map_consistent = sn_default_pci_map, | ||
78 | .dma_unmap = sn_default_pci_unmap, | ||
79 | .bus_fixup = sn_default_pci_bus_fixup, | ||
80 | }; | ||
81 | |||
82 | /* | ||
83 | * Retrieve the DMA Flush List given nasid, widget, and device. | ||
84 | * This list is needed to implement the WAR - Flush DMA data on PIO Reads. | ||
85 | */ | ||
86 | static inline u64 | ||
87 | sal_get_device_dmaflush_list(u64 nasid, u64 widget_num, u64 device_num, | ||
88 | u64 address) | ||
89 | { | ||
90 | struct ia64_sal_retval ret_stuff; | ||
91 | ret_stuff.status = 0; | ||
92 | ret_stuff.v0 = 0; | ||
93 | |||
94 | SAL_CALL_NOLOCK(ret_stuff, | ||
95 | (u64) SN_SAL_IOIF_GET_DEVICE_DMAFLUSH_LIST, | ||
96 | (u64) nasid, (u64) widget_num, | ||
97 | (u64) device_num, (u64) address, 0, 0, 0); | ||
98 | return ret_stuff.status; | ||
99 | } | ||
100 | |||
101 | /* | ||
102 | * Retrieve the pci device information given the bus and device|function number. | ||
103 | */ | ||
104 | static inline u64 | ||
105 | sal_get_pcidev_info(u64 segment, u64 bus_number, u64 devfn, u64 pci_dev, | ||
106 | u64 sn_irq_info) | ||
107 | { | ||
108 | struct ia64_sal_retval ret_stuff; | ||
109 | ret_stuff.status = 0; | ||
110 | ret_stuff.v0 = 0; | ||
111 | |||
112 | SAL_CALL_NOLOCK(ret_stuff, | ||
113 | (u64) SN_SAL_IOIF_GET_PCIDEV_INFO, | ||
114 | (u64) segment, (u64) bus_number, (u64) devfn, | ||
115 | (u64) pci_dev, | ||
116 | sn_irq_info, 0, 0); | ||
117 | return ret_stuff.v0; | ||
118 | } | ||
119 | |||
120 | /* | ||
121 | * sn_pcidev_info_get() - Retrieve the pcidev_info struct for the specified | ||
122 | * device. | ||
123 | */ | ||
124 | inline struct pcidev_info * | ||
125 | sn_pcidev_info_get(struct pci_dev *dev) | ||
126 | { | ||
127 | struct pcidev_info *pcidev; | ||
128 | |||
129 | list_for_each_entry(pcidev, | ||
130 | &(SN_PLATFORM_DATA(dev)->pcidev_info), pdi_list) { | ||
131 | if (pcidev->pdi_linux_pcidev == dev) | ||
132 | return pcidev; | ||
133 | } | ||
134 | return NULL; | ||
135 | } | ||
136 | |||
137 | /* Older PROM flush WAR | ||
138 | * | ||
139 | * 01/16/06 -- This war will be in place until a new official PROM is released. | ||
140 | * Additionally note that the struct sn_flush_device_war also has to be | ||
141 | * removed from arch/ia64/sn/include/xtalk/hubdev.h | ||
142 | */ | ||
143 | static u8 war_implemented = 0; | ||
144 | |||
145 | static s64 sn_device_fixup_war(u64 nasid, u64 widget, int device, | ||
146 | struct sn_flush_device_common *common) | ||
147 | { | ||
148 | struct sn_flush_device_war *war_list; | ||
149 | struct sn_flush_device_war *dev_entry; | ||
150 | struct ia64_sal_retval isrv = {0,0,0,0}; | ||
151 | |||
152 | if (!war_implemented) { | ||
153 | printk(KERN_WARNING "PROM version < 4.50 -- implementing old " | ||
154 | "PROM flush WAR\n"); | ||
155 | war_implemented = 1; | ||
156 | } | ||
157 | |||
158 | war_list = kzalloc(DEV_PER_WIDGET * sizeof(*war_list), GFP_KERNEL); | ||
159 | if (!war_list) | ||
160 | BUG(); | ||
161 | |||
162 | SAL_CALL_NOLOCK(isrv, SN_SAL_IOIF_GET_WIDGET_DMAFLUSH_LIST, | ||
163 | nasid, widget, __pa(war_list), 0, 0, 0 ,0); | ||
164 | if (isrv.status) | ||
165 | panic("sn_device_fixup_war failed: %s\n", | ||
166 | ia64_sal_strerror(isrv.status)); | ||
167 | |||
168 | dev_entry = war_list + device; | ||
169 | memcpy(common,dev_entry, sizeof(*common)); | ||
170 | kfree(war_list); | ||
171 | |||
172 | return isrv.status; | ||
173 | } | ||
174 | |||
175 | /* | ||
176 | * sn_common_hubdev_init() - This routine is called to initialize the HUB data | ||
177 | * structure for each node in the system. | ||
178 | */ | ||
179 | void __init | ||
180 | sn_common_hubdev_init(struct hubdev_info *hubdev) | ||
181 | { | ||
182 | |||
183 | struct sn_flush_device_kernel *sn_flush_device_kernel; | ||
184 | struct sn_flush_device_kernel *dev_entry; | ||
185 | s64 status; | ||
186 | int widget, device, size; | ||
187 | |||
188 | /* Attach the error interrupt handlers */ | ||
189 | if (hubdev->hdi_nasid & 1) /* If TIO */ | ||
190 | ice_error_init(hubdev); | ||
191 | else | ||
192 | hub_error_init(hubdev); | ||
193 | |||
194 | for (widget = 0; widget <= HUB_WIDGET_ID_MAX; widget++) | ||
195 | hubdev->hdi_xwidget_info[widget].xwi_hubinfo = hubdev; | ||
196 | |||
197 | if (!hubdev->hdi_flush_nasid_list.widget_p) | ||
198 | return; | ||
199 | |||
200 | size = (HUB_WIDGET_ID_MAX + 1) * | ||
201 | sizeof(struct sn_flush_device_kernel *); | ||
202 | hubdev->hdi_flush_nasid_list.widget_p = | ||
203 | kzalloc(size, GFP_KERNEL); | ||
204 | if (!hubdev->hdi_flush_nasid_list.widget_p) | ||
205 | BUG(); | ||
206 | |||
207 | for (widget = 0; widget <= HUB_WIDGET_ID_MAX; widget++) { | ||
208 | size = DEV_PER_WIDGET * | ||
209 | sizeof(struct sn_flush_device_kernel); | ||
210 | sn_flush_device_kernel = kzalloc(size, GFP_KERNEL); | ||
211 | if (!sn_flush_device_kernel) | ||
212 | BUG(); | ||
213 | |||
214 | dev_entry = sn_flush_device_kernel; | ||
215 | for (device = 0; device < DEV_PER_WIDGET; | ||
216 | device++, dev_entry++) { | ||
217 | size = sizeof(struct sn_flush_device_common); | ||
218 | dev_entry->common = kzalloc(size, GFP_KERNEL); | ||
219 | if (!dev_entry->common) | ||
220 | BUG(); | ||
221 | if (sn_prom_feature_available(PRF_DEVICE_FLUSH_LIST)) | ||
222 | status = sal_get_device_dmaflush_list( | ||
223 | hubdev->hdi_nasid, widget, device, | ||
224 | (u64)(dev_entry->common)); | ||
225 | else | ||
226 | status = sn_device_fixup_war(hubdev->hdi_nasid, | ||
227 | widget, device, | ||
228 | dev_entry->common); | ||
229 | if (status != SALRET_OK) | ||
230 | panic("SAL call failed: %s\n", | ||
231 | ia64_sal_strerror(status)); | ||
232 | |||
233 | spin_lock_init(&dev_entry->sfdl_flush_lock); | ||
234 | } | ||
235 | |||
236 | if (sn_flush_device_kernel) | ||
237 | hubdev->hdi_flush_nasid_list.widget_p[widget] = | ||
238 | sn_flush_device_kernel; | ||
239 | } | ||
240 | } | ||
241 | |||
242 | void sn_pci_unfixup_slot(struct pci_dev *dev) | ||
243 | { | ||
244 | struct pci_dev *host_pci_dev = SN_PCIDEV_INFO(dev)->host_pci_dev; | ||
245 | |||
246 | sn_irq_unfixup(dev); | ||
247 | pci_dev_put(host_pci_dev); | ||
248 | pci_dev_put(dev); | ||
249 | } | ||
250 | |||
251 | /* | ||
252 | * sn_pci_fixup_slot() - This routine sets up a slot's resources consistent | ||
253 | * with the Linux PCI abstraction layer. Resources | ||
254 | * acquired from our PCI provider include PIO maps | ||
255 | * to BAR space and interrupt objects. | ||
256 | */ | ||
257 | void sn_pci_fixup_slot(struct pci_dev *dev) | ||
258 | { | ||
259 | int segment = pci_domain_nr(dev->bus); | ||
260 | int status = 0; | ||
261 | struct pcibus_bussoft *bs; | ||
262 | struct pci_bus *host_pci_bus; | ||
263 | struct pci_dev *host_pci_dev; | ||
264 | struct pcidev_info *pcidev_info; | ||
265 | struct sn_irq_info *sn_irq_info; | ||
266 | unsigned int bus_no, devfn; | ||
267 | |||
268 | pci_dev_get(dev); /* for the sysdata pointer */ | ||
269 | pcidev_info = kzalloc(sizeof(struct pcidev_info), GFP_KERNEL); | ||
270 | if (!pcidev_info) | ||
271 | BUG(); /* Cannot afford to run out of memory */ | ||
272 | |||
273 | sn_irq_info = kzalloc(sizeof(struct sn_irq_info), GFP_KERNEL); | ||
274 | if (!sn_irq_info) | ||
275 | BUG(); /* Cannot afford to run out of memory */ | ||
276 | |||
277 | /* Call to retrieve pci device information needed by kernel. */ | ||
278 | status = sal_get_pcidev_info((u64) segment, (u64) dev->bus->number, | ||
279 | dev->devfn, | ||
280 | (u64) __pa(pcidev_info), | ||
281 | (u64) __pa(sn_irq_info)); | ||
282 | if (status) | ||
283 | BUG(); /* Cannot get platform pci device information */ | ||
284 | |||
285 | /* Add pcidev_info to list in pci_controller.platform_data */ | ||
286 | list_add_tail(&pcidev_info->pdi_list, | ||
287 | &(SN_PLATFORM_DATA(dev->bus)->pcidev_info)); | ||
288 | |||
289 | if (SN_ACPI_BASE_SUPPORT()) | ||
290 | sn_acpi_slot_fixup(dev, pcidev_info); | ||
291 | else | ||
292 | sn_more_slot_fixup(dev, pcidev_info); | ||
293 | /* | ||
294 | * Using the PROMs values for the PCI host bus, get the Linux | ||
295 | * PCI host_pci_dev struct and set up host bus linkages | ||
296 | */ | ||
297 | |||
298 | bus_no = (pcidev_info->pdi_slot_host_handle >> 32) & 0xff; | ||
299 | devfn = pcidev_info->pdi_slot_host_handle & 0xffffffff; | ||
300 | host_pci_bus = pci_find_bus(segment, bus_no); | ||
301 | host_pci_dev = pci_get_slot(host_pci_bus, devfn); | ||
302 | |||
303 | pcidev_info->host_pci_dev = host_pci_dev; | ||
304 | pcidev_info->pdi_linux_pcidev = dev; | ||
305 | pcidev_info->pdi_host_pcidev_info = SN_PCIDEV_INFO(host_pci_dev); | ||
306 | bs = SN_PCIBUS_BUSSOFT(dev->bus); | ||
307 | pcidev_info->pdi_pcibus_info = bs; | ||
308 | |||
309 | if (bs && bs->bs_asic_type < PCIIO_ASIC_MAX_TYPES) { | ||
310 | SN_PCIDEV_BUSPROVIDER(dev) = sn_pci_provider[bs->bs_asic_type]; | ||
311 | } else { | ||
312 | SN_PCIDEV_BUSPROVIDER(dev) = &sn_pci_default_provider; | ||
313 | } | ||
314 | |||
315 | /* Only set up IRQ stuff if this device has a host bus context */ | ||
316 | if (bs && sn_irq_info->irq_irq) { | ||
317 | pcidev_info->pdi_sn_irq_info = sn_irq_info; | ||
318 | dev->irq = pcidev_info->pdi_sn_irq_info->irq_irq; | ||
319 | sn_irq_fixup(dev, sn_irq_info); | ||
320 | } else { | ||
321 | pcidev_info->pdi_sn_irq_info = NULL; | ||
322 | kfree(sn_irq_info); | ||
323 | } | ||
324 | } | ||
325 | |||
326 | /* | ||
327 | * sn_common_bus_fixup - Perform platform specific bus fixup. | ||
328 | * Execute the ASIC specific fixup routine | ||
329 | * for this bus. | ||
330 | */ | ||
331 | void | ||
332 | sn_common_bus_fixup(struct pci_bus *bus, | ||
333 | struct pcibus_bussoft *prom_bussoft_ptr) | ||
334 | { | ||
335 | int cnode; | ||
336 | struct pci_controller *controller; | ||
337 | struct hubdev_info *hubdev_info; | ||
338 | int nasid; | ||
339 | void *provider_soft; | ||
340 | struct sn_pcibus_provider *provider; | ||
341 | struct sn_platform_data *sn_platform_data; | ||
342 | |||
343 | controller = PCI_CONTROLLER(bus); | ||
344 | /* | ||
345 | * Per-provider fixup. Copies the bus soft structure from prom | ||
346 | * to local area and links SN_PCIBUS_BUSSOFT(). | ||
347 | */ | ||
348 | |||
349 | if (prom_bussoft_ptr->bs_asic_type >= PCIIO_ASIC_MAX_TYPES) { | ||
350 | printk(KERN_WARNING "sn_common_bus_fixup: Unsupported asic type, %d", | ||
351 | prom_bussoft_ptr->bs_asic_type); | ||
352 | return; | ||
353 | } | ||
354 | |||
355 | if (prom_bussoft_ptr->bs_asic_type == PCIIO_ASIC_TYPE_PPB) | ||
356 | return; /* no further fixup necessary */ | ||
357 | |||
358 | provider = sn_pci_provider[prom_bussoft_ptr->bs_asic_type]; | ||
359 | if (provider == NULL) | ||
360 | panic("sn_common_bus_fixup: No provider registered for this asic type, %d", | ||
361 | prom_bussoft_ptr->bs_asic_type); | ||
362 | |||
363 | if (provider->bus_fixup) | ||
364 | provider_soft = (*provider->bus_fixup) (prom_bussoft_ptr, | ||
365 | controller); | ||
366 | else | ||
367 | provider_soft = NULL; | ||
368 | |||
369 | /* | ||
370 | * Generic bus fixup goes here. Don't reference prom_bussoft_ptr | ||
371 | * after this point. | ||
372 | */ | ||
373 | controller->platform_data = kzalloc(sizeof(struct sn_platform_data), | ||
374 | GFP_KERNEL); | ||
375 | if (controller->platform_data == NULL) | ||
376 | BUG(); | ||
377 | sn_platform_data = | ||
378 | (struct sn_platform_data *) controller->platform_data; | ||
379 | sn_platform_data->provider_soft = provider_soft; | ||
380 | INIT_LIST_HEAD(&((struct sn_platform_data *) | ||
381 | controller->platform_data)->pcidev_info); | ||
382 | nasid = NASID_GET(SN_PCIBUS_BUSSOFT(bus)->bs_base); | ||
383 | cnode = nasid_to_cnodeid(nasid); | ||
384 | hubdev_info = (struct hubdev_info *)(NODEPDA(cnode)->pdinfo); | ||
385 | SN_PCIBUS_BUSSOFT(bus)->bs_xwidget_info = | ||
386 | &(hubdev_info->hdi_xwidget_info[SN_PCIBUS_BUSSOFT(bus)->bs_xid]); | ||
387 | |||
388 | /* | ||
389 | * If the node information we obtained during the fixup phase is | ||
390 | * invalid then set controller->node to -1 (undetermined) | ||
391 | */ | ||
392 | if (controller->node >= num_online_nodes()) { | ||
393 | struct pcibus_bussoft *b = SN_PCIBUS_BUSSOFT(bus); | ||
394 | |||
395 | printk(KERN_WARNING "Device ASIC=%u XID=%u PBUSNUM=%u" | ||
396 | "L_IO=%lx L_MEM=%lx BASE=%lx\n", | ||
397 | b->bs_asic_type, b->bs_xid, b->bs_persist_busnum, | ||
398 | b->bs_legacy_io, b->bs_legacy_mem, b->bs_base); | ||
399 | printk(KERN_WARNING "on node %d but only %d nodes online." | ||
400 | "Association set to undetermined.\n", | ||
401 | controller->node, num_online_nodes()); | ||
402 | controller->node = -1; | ||
403 | } | ||
404 | } | ||
405 | |||
406 | void sn_bus_store_sysdata(struct pci_dev *dev) | ||
407 | { | ||
408 | struct sysdata_el *element; | ||
409 | |||
410 | element = kzalloc(sizeof(struct sysdata_el), GFP_KERNEL); | ||
411 | if (!element) { | ||
412 | dev_dbg(dev, "%s: out of memory!\n", __FUNCTION__); | ||
413 | return; | ||
414 | } | ||
415 | element->sysdata = SN_PCIDEV_INFO(dev); | ||
416 | list_add(&element->entry, &sn_sysdata_list); | ||
417 | } | ||
418 | |||
419 | void sn_bus_free_sysdata(void) | ||
420 | { | ||
421 | struct sysdata_el *element; | ||
422 | struct list_head *list, *safe; | ||
423 | |||
424 | list_for_each_safe(list, safe, &sn_sysdata_list) { | ||
425 | element = list_entry(list, struct sysdata_el, entry); | ||
426 | list_del(&element->entry); | ||
427 | list_del(&(((struct pcidev_info *) | ||
428 | (element->sysdata))->pdi_list)); | ||
429 | kfree(element->sysdata); | ||
430 | kfree(element); | ||
431 | } | ||
432 | return; | ||
433 | } | ||
434 | |||
435 | /* | ||
436 | * hubdev_init_node() - Creates the HUB data structure and link them to it's | ||
437 | * own NODE specific data area. | ||
438 | */ | ||
439 | void hubdev_init_node(nodepda_t * npda, cnodeid_t node) | ||
440 | { | ||
441 | struct hubdev_info *hubdev_info; | ||
442 | int size; | ||
443 | pg_data_t *pg; | ||
444 | |||
445 | size = sizeof(struct hubdev_info); | ||
446 | |||
447 | if (node >= num_online_nodes()) /* Headless/memless IO nodes */ | ||
448 | pg = NODE_DATA(0); | ||
449 | else | ||
450 | pg = NODE_DATA(node); | ||
451 | |||
452 | hubdev_info = (struct hubdev_info *)alloc_bootmem_node(pg, size); | ||
453 | |||
454 | npda->pdinfo = (void *)hubdev_info; | ||
455 | } | ||
456 | |||
457 | geoid_t | ||
458 | cnodeid_get_geoid(cnodeid_t cnode) | ||
459 | { | ||
460 | struct hubdev_info *hubdev; | ||
461 | |||
462 | hubdev = (struct hubdev_info *)(NODEPDA(cnode)->pdinfo); | ||
463 | return hubdev->hdi_geoid; | ||
464 | } | ||
465 | |||
466 | void sn_generate_path(struct pci_bus *pci_bus, char *address) | ||
467 | { | ||
468 | nasid_t nasid; | ||
469 | cnodeid_t cnode; | ||
470 | geoid_t geoid; | ||
471 | moduleid_t moduleid; | ||
472 | u16 bricktype; | ||
473 | |||
474 | nasid = NASID_GET(SN_PCIBUS_BUSSOFT(pci_bus)->bs_base); | ||
475 | cnode = nasid_to_cnodeid(nasid); | ||
476 | geoid = cnodeid_get_geoid(cnode); | ||
477 | moduleid = geo_module(geoid); | ||
478 | |||
479 | sprintf(address, "module_%c%c%c%c%.2d", | ||
480 | '0'+RACK_GET_CLASS(MODULE_GET_RACK(moduleid)), | ||
481 | '0'+RACK_GET_GROUP(MODULE_GET_RACK(moduleid)), | ||
482 | '0'+RACK_GET_NUM(MODULE_GET_RACK(moduleid)), | ||
483 | MODULE_GET_BTCHAR(moduleid), MODULE_GET_BPOS(moduleid)); | ||
484 | |||
485 | /* Tollhouse requires slot id to be displayed */ | ||
486 | bricktype = MODULE_GET_BTYPE(moduleid); | ||
487 | if ((bricktype == L1_BRICKTYPE_191010) || | ||
488 | (bricktype == L1_BRICKTYPE_1932)) | ||
489 | sprintf(address, "%s^%d", address, geo_slot(geoid)); | ||
490 | } | ||
491 | |||
492 | /* | ||
493 | * sn_pci_fixup_bus() - Perform SN specific setup of software structs | ||
494 | * (pcibus_bussoft, pcidev_info) and hardware | ||
495 | * registers, for the specified bus and devices under it. | ||
496 | */ | ||
497 | void __devinit | ||
498 | sn_pci_fixup_bus(struct pci_bus *bus) | ||
499 | { | ||
500 | |||
501 | if (SN_ACPI_BASE_SUPPORT()) | ||
502 | sn_acpi_bus_fixup(bus); | ||
503 | else | ||
504 | sn_bus_fixup(bus); | ||
505 | } | ||
506 | |||
507 | /* | ||
508 | * sn_io_early_init - Perform early IO (and some non-IO) initialization. | ||
509 | * In particular, setup the sn_pci_provider[] array. | ||
510 | * This needs to be done prior to any bus scanning | ||
511 | * (acpi_scan_init()) in the ACPI case, as the SN | ||
512 | * bus fixup code will reference the array. | ||
513 | */ | ||
514 | static int __init | ||
515 | sn_io_early_init(void) | ||
516 | { | ||
517 | int i; | ||
518 | |||
519 | if (!ia64_platform_is("sn2") || IS_RUNNING_ON_FAKE_PROM()) | ||
520 | return 0; | ||
521 | |||
522 | /* | ||
523 | * prime sn_pci_provider[]. Individial provider init routines will | ||
524 | * override their respective default entries. | ||
525 | */ | ||
526 | |||
527 | for (i = 0; i < PCIIO_ASIC_MAX_TYPES; i++) | ||
528 | sn_pci_provider[i] = &sn_pci_default_provider; | ||
529 | |||
530 | pcibr_init_provider(); | ||
531 | tioca_init_provider(); | ||
532 | tioce_init_provider(); | ||
533 | |||
534 | /* | ||
535 | * This is needed to avoid bounce limit checks in the blk layer | ||
536 | */ | ||
537 | ia64_max_iommu_merge_mask = ~PAGE_MASK; | ||
538 | |||
539 | sn_irq_lh_init(); | ||
540 | INIT_LIST_HEAD(&sn_sysdata_list); | ||
541 | sn_init_cpei_timer(); | ||
542 | |||
543 | #ifdef CONFIG_PROC_FS | ||
544 | register_sn_procfs(); | ||
545 | #endif | ||
546 | |||
547 | printk(KERN_INFO "ACPI DSDT OEM Rev 0x%x\n", | ||
548 | acpi_gbl_DSDT->oem_revision); | ||
549 | if (SN_ACPI_BASE_SUPPORT()) | ||
550 | sn_io_acpi_init(); | ||
551 | else | ||
552 | sn_io_init(); | ||
553 | return 0; | ||
554 | } | ||
555 | |||
556 | arch_initcall(sn_io_early_init); | ||
557 | |||
558 | /* | ||
559 | * sn_io_late_init() - Perform any final platform specific IO initialization. | ||
560 | */ | ||
561 | |||
562 | int __init | ||
563 | sn_io_late_init(void) | ||
564 | { | ||
565 | struct pci_bus *bus; | ||
566 | struct pcibus_bussoft *bussoft; | ||
567 | cnodeid_t cnode; | ||
568 | nasid_t nasid; | ||
569 | cnodeid_t near_cnode; | ||
570 | |||
571 | if (!ia64_platform_is("sn2") || IS_RUNNING_ON_FAKE_PROM()) | ||
572 | return 0; | ||
573 | |||
574 | /* | ||
575 | * Setup closest node in pci_controller->node for | ||
576 | * PIC, TIOCP, TIOCE (TIOCA does it during bus fixup using | ||
577 | * info from the PROM). | ||
578 | */ | ||
579 | bus = NULL; | ||
580 | while ((bus = pci_find_next_bus(bus)) != NULL) { | ||
581 | bussoft = SN_PCIBUS_BUSSOFT(bus); | ||
582 | nasid = NASID_GET(bussoft->bs_base); | ||
583 | cnode = nasid_to_cnodeid(nasid); | ||
584 | if ((bussoft->bs_asic_type == PCIIO_ASIC_TYPE_TIOCP) || | ||
585 | (bussoft->bs_asic_type == PCIIO_ASIC_TYPE_TIOCE)) { | ||
586 | /* TIO PCI Bridge: find nearest node with CPUs */ | ||
587 | int e = sn_hwperf_get_nearest_node(cnode, NULL, | ||
588 | &near_cnode); | ||
589 | if (e < 0) { | ||
590 | near_cnode = (cnodeid_t)-1; /* use any node */ | ||
591 | printk(KERN_WARNING "pcibr_bus_fixup: failed " | ||
592 | "to find near node with CPUs to TIO " | ||
593 | "node %d, err=%d\n", cnode, e); | ||
594 | } | ||
595 | PCI_CONTROLLER(bus)->node = near_cnode; | ||
596 | } else if (bussoft->bs_asic_type == PCIIO_ASIC_TYPE_PIC) { | ||
597 | PCI_CONTROLLER(bus)->node = cnode; | ||
598 | } | ||
599 | } | ||
600 | |||
601 | sn_ioif_inited = 1; /* SN I/O infrastructure now initialized */ | ||
602 | |||
603 | return 0; | ||
604 | } | ||
605 | |||
606 | fs_initcall(sn_io_late_init); | ||
607 | |||
608 | EXPORT_SYMBOL(sn_pci_fixup_slot); | ||
609 | EXPORT_SYMBOL(sn_pci_unfixup_slot); | ||
610 | EXPORT_SYMBOL(sn_bus_store_sysdata); | ||
611 | EXPORT_SYMBOL(sn_bus_free_sysdata); | ||
612 | EXPORT_SYMBOL(sn_generate_path); | ||
613 | |||
diff --git a/arch/ia64/sn/kernel/io_init.c b/arch/ia64/sn/kernel/io_init.c index dc09a6a28a37..9ad843e0383b 100644 --- a/arch/ia64/sn/kernel/io_init.c +++ b/arch/ia64/sn/kernel/io_init.c | |||
@@ -3,103 +3,28 @@ | |||
3 | * License. See the file "COPYING" in the main directory of this archive | 3 | * License. See the file "COPYING" in the main directory of this archive |
4 | * for more details. | 4 | * for more details. |
5 | * | 5 | * |
6 | * Copyright (C) 1992 - 1997, 2000-2005 Silicon Graphics, Inc. All rights reserved. | 6 | * Copyright (C) 1992 - 1997, 2000-2006 Silicon Graphics, Inc. All rights reserved. |
7 | */ | 7 | */ |
8 | 8 | ||
9 | #include <linux/bootmem.h> | ||
10 | #include <linux/nodemask.h> | ||
11 | #include <asm/sn/types.h> | 9 | #include <asm/sn/types.h> |
12 | #include <asm/sn/addrs.h> | 10 | #include <asm/sn/addrs.h> |
13 | #include <asm/sn/sn_feature_sets.h> | ||
14 | #include <asm/sn/geo.h> | ||
15 | #include <asm/sn/io.h> | 11 | #include <asm/sn/io.h> |
16 | #include <asm/sn/l1.h> | ||
17 | #include <asm/sn/module.h> | 12 | #include <asm/sn/module.h> |
18 | #include <asm/sn/pcibr_provider.h> | 13 | #include <asm/sn/intr.h> |
19 | #include <asm/sn/pcibus_provider_defs.h> | 14 | #include <asm/sn/pcibus_provider_defs.h> |
20 | #include <asm/sn/pcidev.h> | 15 | #include <asm/sn/pcidev.h> |
21 | #include <asm/sn/simulator.h> | ||
22 | #include <asm/sn/sn_sal.h> | 16 | #include <asm/sn/sn_sal.h> |
23 | #include <asm/sn/tioca_provider.h> | ||
24 | #include <asm/sn/tioce_provider.h> | ||
25 | #include "xtalk/hubdev.h" | 17 | #include "xtalk/hubdev.h" |
26 | #include "xtalk/xwidgetdev.h" | ||
27 | |||
28 | |||
29 | extern void sn_init_cpei_timer(void); | ||
30 | extern void register_sn_procfs(void); | ||
31 | |||
32 | static struct list_head sn_sysdata_list; | ||
33 | |||
34 | /* sysdata list struct */ | ||
35 | struct sysdata_el { | ||
36 | struct list_head entry; | ||
37 | void *sysdata; | ||
38 | }; | ||
39 | |||
40 | struct slab_info { | ||
41 | struct hubdev_info hubdev; | ||
42 | }; | ||
43 | |||
44 | struct brick { | ||
45 | moduleid_t id; /* Module ID of this module */ | ||
46 | struct slab_info slab_info[MAX_SLABS + 1]; | ||
47 | }; | ||
48 | |||
49 | int sn_ioif_inited; /* SN I/O infrastructure initialized? */ | ||
50 | |||
51 | struct sn_pcibus_provider *sn_pci_provider[PCIIO_ASIC_MAX_TYPES]; /* indexed by asic type */ | ||
52 | |||
53 | static int max_segment_number; /* Default highest segment number */ | ||
54 | static int max_pcibus_number = 255; /* Default highest pci bus number */ | ||
55 | 18 | ||
56 | /* | 19 | /* |
57 | * Hooks and struct for unsupported pci providers | 20 | * The code in this file will only be executed when running with |
21 | * a PROM that does _not_ have base ACPI IO support. | ||
22 | * (i.e., SN_ACPI_BASE_SUPPORT() == 0) | ||
58 | */ | 23 | */ |
59 | 24 | ||
60 | static dma_addr_t | 25 | static int max_segment_number; /* Default highest segment number */ |
61 | sn_default_pci_map(struct pci_dev *pdev, unsigned long paddr, size_t size, int type) | 26 | static int max_pcibus_number = 255; /* Default highest pci bus number */ |
62 | { | ||
63 | return 0; | ||
64 | } | ||
65 | |||
66 | static void | ||
67 | sn_default_pci_unmap(struct pci_dev *pdev, dma_addr_t addr, int direction) | ||
68 | { | ||
69 | return; | ||
70 | } | ||
71 | |||
72 | static void * | ||
73 | sn_default_pci_bus_fixup(struct pcibus_bussoft *soft, struct pci_controller *controller) | ||
74 | { | ||
75 | return NULL; | ||
76 | } | ||
77 | |||
78 | static struct sn_pcibus_provider sn_pci_default_provider = { | ||
79 | .dma_map = sn_default_pci_map, | ||
80 | .dma_map_consistent = sn_default_pci_map, | ||
81 | .dma_unmap = sn_default_pci_unmap, | ||
82 | .bus_fixup = sn_default_pci_bus_fixup, | ||
83 | }; | ||
84 | |||
85 | /* | ||
86 | * Retrieve the DMA Flush List given nasid, widget, and device. | ||
87 | * This list is needed to implement the WAR - Flush DMA data on PIO Reads. | ||
88 | */ | ||
89 | static inline u64 | ||
90 | sal_get_device_dmaflush_list(u64 nasid, u64 widget_num, u64 device_num, | ||
91 | u64 address) | ||
92 | { | ||
93 | struct ia64_sal_retval ret_stuff; | ||
94 | ret_stuff.status = 0; | ||
95 | ret_stuff.v0 = 0; | ||
96 | 27 | ||
97 | SAL_CALL_NOLOCK(ret_stuff, | ||
98 | (u64) SN_SAL_IOIF_GET_DEVICE_DMAFLUSH_LIST, | ||
99 | (u64) nasid, (u64) widget_num, | ||
100 | (u64) device_num, (u64) address, 0, 0, 0); | ||
101 | return ret_stuff.status; | ||
102 | } | ||
103 | 28 | ||
104 | /* | 29 | /* |
105 | * Retrieve the hub device info structure for the given nasid. | 30 | * Retrieve the hub device info structure for the given nasid. |
@@ -131,93 +56,20 @@ static inline u64 sal_get_pcibus_info(u64 segment, u64 busnum, u64 address) | |||
131 | return ret_stuff.v0; | 56 | return ret_stuff.v0; |
132 | } | 57 | } |
133 | 58 | ||
134 | /* | ||
135 | * Retrieve the pci device information given the bus and device|function number. | ||
136 | */ | ||
137 | static inline u64 | ||
138 | sal_get_pcidev_info(u64 segment, u64 bus_number, u64 devfn, u64 pci_dev, | ||
139 | u64 sn_irq_info) | ||
140 | { | ||
141 | struct ia64_sal_retval ret_stuff; | ||
142 | ret_stuff.status = 0; | ||
143 | ret_stuff.v0 = 0; | ||
144 | |||
145 | SAL_CALL_NOLOCK(ret_stuff, | ||
146 | (u64) SN_SAL_IOIF_GET_PCIDEV_INFO, | ||
147 | (u64) segment, (u64) bus_number, (u64) devfn, | ||
148 | (u64) pci_dev, | ||
149 | sn_irq_info, 0, 0); | ||
150 | return ret_stuff.v0; | ||
151 | } | ||
152 | |||
153 | /* | ||
154 | * sn_pcidev_info_get() - Retrieve the pcidev_info struct for the specified | ||
155 | * device. | ||
156 | */ | ||
157 | inline struct pcidev_info * | ||
158 | sn_pcidev_info_get(struct pci_dev *dev) | ||
159 | { | ||
160 | struct pcidev_info *pcidev; | ||
161 | |||
162 | list_for_each_entry(pcidev, | ||
163 | &(SN_PCI_CONTROLLER(dev)->pcidev_info), pdi_list) { | ||
164 | if (pcidev->pdi_linux_pcidev == dev) { | ||
165 | return pcidev; | ||
166 | } | ||
167 | } | ||
168 | return NULL; | ||
169 | } | ||
170 | |||
171 | /* Older PROM flush WAR | ||
172 | * | ||
173 | * 01/16/06 -- This war will be in place until a new official PROM is released. | ||
174 | * Additionally note that the struct sn_flush_device_war also has to be | ||
175 | * removed from arch/ia64/sn/include/xtalk/hubdev.h | ||
176 | */ | ||
177 | static u8 war_implemented = 0; | ||
178 | |||
179 | static s64 sn_device_fixup_war(u64 nasid, u64 widget, int device, | ||
180 | struct sn_flush_device_common *common) | ||
181 | { | ||
182 | struct sn_flush_device_war *war_list; | ||
183 | struct sn_flush_device_war *dev_entry; | ||
184 | struct ia64_sal_retval isrv = {0,0,0,0}; | ||
185 | |||
186 | if (!war_implemented) { | ||
187 | printk(KERN_WARNING "PROM version < 4.50 -- implementing old " | ||
188 | "PROM flush WAR\n"); | ||
189 | war_implemented = 1; | ||
190 | } | ||
191 | |||
192 | war_list = kzalloc(DEV_PER_WIDGET * sizeof(*war_list), GFP_KERNEL); | ||
193 | if (!war_list) | ||
194 | BUG(); | ||
195 | |||
196 | SAL_CALL_NOLOCK(isrv, SN_SAL_IOIF_GET_WIDGET_DMAFLUSH_LIST, | ||
197 | nasid, widget, __pa(war_list), 0, 0, 0 ,0); | ||
198 | if (isrv.status) | ||
199 | panic("sn_device_fixup_war failed: %s\n", | ||
200 | ia64_sal_strerror(isrv.status)); | ||
201 | |||
202 | dev_entry = war_list + device; | ||
203 | memcpy(common,dev_entry, sizeof(*common)); | ||
204 | kfree(war_list); | ||
205 | |||
206 | return isrv.status; | ||
207 | } | ||
208 | 59 | ||
209 | /* | 60 | /* |
210 | * sn_fixup_ionodes() - This routine initializes the HUB data strcuture for | 61 | * sn_fixup_ionodes() - This routine initializes the HUB data structure for |
211 | * each node in the system. | 62 | * each node in the system. This function is only |
63 | * executed when running with a non-ACPI capable PROM. | ||
212 | */ | 64 | */ |
213 | static void __init sn_fixup_ionodes(void) | 65 | static void __init sn_fixup_ionodes(void) |
214 | { | 66 | { |
215 | struct sn_flush_device_kernel *sn_flush_device_kernel; | 67 | |
216 | struct sn_flush_device_kernel *dev_entry; | ||
217 | struct hubdev_info *hubdev; | 68 | struct hubdev_info *hubdev; |
218 | u64 status; | 69 | u64 status; |
219 | u64 nasid; | 70 | u64 nasid; |
220 | int i, widget, device, size; | 71 | int i; |
72 | extern void sn_common_hubdev_init(struct hubdev_info *); | ||
221 | 73 | ||
222 | /* | 74 | /* |
223 | * Get SGI Specific HUB chipset information. | 75 | * Get SGI Specific HUB chipset information. |
@@ -240,70 +92,47 @@ static void __init sn_fixup_ionodes(void) | |||
240 | max_segment_number = hubdev->max_segment_number; | 92 | max_segment_number = hubdev->max_segment_number; |
241 | max_pcibus_number = hubdev->max_pcibus_number; | 93 | max_pcibus_number = hubdev->max_pcibus_number; |
242 | } | 94 | } |
95 | sn_common_hubdev_init(hubdev); | ||
96 | } | ||
97 | } | ||
243 | 98 | ||
244 | /* Attach the error interrupt handlers */ | 99 | /* |
245 | if (nasid & 1) | 100 | * sn_pci_legacy_window_fixup - Create PCI controller windows for |
246 | ice_error_init(hubdev); | 101 | * legacy IO and MEM space. This needs to |
247 | else | 102 | * be done here, as the PROM does not have |
248 | hub_error_init(hubdev); | 103 | * ACPI support defining the root buses |
249 | 104 | * and their resources (_CRS), | |
250 | for (widget = 0; widget <= HUB_WIDGET_ID_MAX; widget++) | 105 | */ |
251 | hubdev->hdi_xwidget_info[widget].xwi_hubinfo = hubdev; | 106 | static void |
252 | 107 | sn_legacy_pci_window_fixup(struct pci_controller *controller, | |
253 | if (!hubdev->hdi_flush_nasid_list.widget_p) | 108 | u64 legacy_io, u64 legacy_mem) |
254 | continue; | 109 | { |
255 | 110 | controller->window = kcalloc(2, sizeof(struct pci_window), | |
256 | size = (HUB_WIDGET_ID_MAX + 1) * | 111 | GFP_KERNEL); |
257 | sizeof(struct sn_flush_device_kernel *); | 112 | if (controller->window == NULL) |
258 | hubdev->hdi_flush_nasid_list.widget_p = | ||
259 | kzalloc(size, GFP_KERNEL); | ||
260 | if (!hubdev->hdi_flush_nasid_list.widget_p) | ||
261 | BUG(); | 113 | BUG(); |
262 | 114 | controller->window[0].offset = legacy_io; | |
263 | for (widget = 0; widget <= HUB_WIDGET_ID_MAX; widget++) { | 115 | controller->window[0].resource.name = "legacy_io"; |
264 | size = DEV_PER_WIDGET * | 116 | controller->window[0].resource.flags = IORESOURCE_IO; |
265 | sizeof(struct sn_flush_device_kernel); | 117 | controller->window[0].resource.start = legacy_io; |
266 | sn_flush_device_kernel = kzalloc(size, GFP_KERNEL); | 118 | controller->window[0].resource.end = |
267 | if (!sn_flush_device_kernel) | 119 | controller->window[0].resource.start + 0xffff; |
268 | BUG(); | 120 | controller->window[0].resource.parent = &ioport_resource; |
269 | 121 | controller->window[1].offset = legacy_mem; | |
270 | dev_entry = sn_flush_device_kernel; | 122 | controller->window[1].resource.name = "legacy_mem"; |
271 | for (device = 0; device < DEV_PER_WIDGET; | 123 | controller->window[1].resource.flags = IORESOURCE_MEM; |
272 | device++,dev_entry++) { | 124 | controller->window[1].resource.start = legacy_mem; |
273 | size = sizeof(struct sn_flush_device_common); | 125 | controller->window[1].resource.end = |
274 | dev_entry->common = kzalloc(size, GFP_KERNEL); | 126 | controller->window[1].resource.start + (1024 * 1024) - 1; |
275 | if (!dev_entry->common) | 127 | controller->window[1].resource.parent = &iomem_resource; |
276 | BUG(); | 128 | controller->windows = 2; |
277 | |||
278 | if (sn_prom_feature_available( | ||
279 | PRF_DEVICE_FLUSH_LIST)) | ||
280 | status = sal_get_device_dmaflush_list( | ||
281 | nasid, widget, device, | ||
282 | (u64)(dev_entry->common)); | ||
283 | else | ||
284 | status = sn_device_fixup_war(nasid, | ||
285 | widget, device, | ||
286 | dev_entry->common); | ||
287 | if (status != SALRET_OK) | ||
288 | panic("SAL call failed: %s\n", | ||
289 | ia64_sal_strerror(status)); | ||
290 | |||
291 | spin_lock_init(&dev_entry->sfdl_flush_lock); | ||
292 | } | ||
293 | |||
294 | if (sn_flush_device_kernel) | ||
295 | hubdev->hdi_flush_nasid_list.widget_p[widget] = | ||
296 | sn_flush_device_kernel; | ||
297 | } | ||
298 | } | ||
299 | } | 129 | } |
300 | 130 | ||
301 | /* | 131 | /* |
302 | * sn_pci_window_fixup() - Create a pci_window for each device resource. | 132 | * sn_pci_window_fixup() - Create a pci_window for each device resource. |
303 | * Until ACPI support is added, we need this code | 133 | * It will setup pci_windows for use by |
304 | * to setup pci_windows for use by | 134 | * pcibios_bus_to_resource(), pcibios_resource_to_bus(), |
305 | * pcibios_bus_to_resource(), | 135 | * etc. |
306 | * pcibios_resource_to_bus(), etc. | ||
307 | */ | 136 | */ |
308 | static void | 137 | static void |
309 | sn_pci_window_fixup(struct pci_dev *dev, unsigned int count, | 138 | sn_pci_window_fixup(struct pci_dev *dev, unsigned int count, |
@@ -342,60 +171,22 @@ sn_pci_window_fixup(struct pci_dev *dev, unsigned int count, | |||
342 | controller->window = new_window; | 171 | controller->window = new_window; |
343 | } | 172 | } |
344 | 173 | ||
345 | void sn_pci_unfixup_slot(struct pci_dev *dev) | ||
346 | { | ||
347 | struct pci_dev *host_pci_dev = SN_PCIDEV_INFO(dev)->host_pci_dev; | ||
348 | |||
349 | sn_irq_unfixup(dev); | ||
350 | pci_dev_put(host_pci_dev); | ||
351 | pci_dev_put(dev); | ||
352 | } | ||
353 | |||
354 | /* | 174 | /* |
355 | * sn_pci_fixup_slot() - This routine sets up a slot's resources | 175 | * sn_more_slot_fixup() - We are not running with an ACPI capable PROM, |
356 | * consistent with the Linux PCI abstraction layer. Resources acquired | 176 | * and need to convert the pci_dev->resource |
357 | * from our PCI provider include PIO maps to BAR space and interrupt | 177 | * 'start' and 'end' addresses to mapped addresses, |
358 | * objects. | 178 | * and setup the pci_controller->window array entries. |
359 | */ | 179 | */ |
360 | void sn_pci_fixup_slot(struct pci_dev *dev) | 180 | void |
181 | sn_more_slot_fixup(struct pci_dev *dev, struct pcidev_info *pcidev_info) | ||
361 | { | 182 | { |
362 | unsigned int count = 0; | 183 | unsigned int count = 0; |
363 | int idx; | 184 | int idx; |
364 | int segment = pci_domain_nr(dev->bus); | ||
365 | int status = 0; | ||
366 | struct pcibus_bussoft *bs; | ||
367 | struct pci_bus *host_pci_bus; | ||
368 | struct pci_dev *host_pci_dev; | ||
369 | struct pcidev_info *pcidev_info; | ||
370 | s64 pci_addrs[PCI_ROM_RESOURCE + 1]; | 185 | s64 pci_addrs[PCI_ROM_RESOURCE + 1]; |
371 | struct sn_irq_info *sn_irq_info; | 186 | unsigned long addr, end, size, start; |
372 | unsigned long size; | ||
373 | unsigned int bus_no, devfn; | ||
374 | |||
375 | pci_dev_get(dev); /* for the sysdata pointer */ | ||
376 | pcidev_info = kzalloc(sizeof(struct pcidev_info), GFP_KERNEL); | ||
377 | if (!pcidev_info) | ||
378 | BUG(); /* Cannot afford to run out of memory */ | ||
379 | |||
380 | sn_irq_info = kzalloc(sizeof(struct sn_irq_info), GFP_KERNEL); | ||
381 | if (!sn_irq_info) | ||
382 | BUG(); /* Cannot afford to run out of memory */ | ||
383 | |||
384 | /* Call to retrieve pci device information needed by kernel. */ | ||
385 | status = sal_get_pcidev_info((u64) segment, (u64) dev->bus->number, | ||
386 | dev->devfn, | ||
387 | (u64) __pa(pcidev_info), | ||
388 | (u64) __pa(sn_irq_info)); | ||
389 | if (status) | ||
390 | BUG(); /* Cannot get platform pci device information */ | ||
391 | |||
392 | /* Add pcidev_info to list in sn_pci_controller struct */ | ||
393 | list_add_tail(&pcidev_info->pdi_list, | ||
394 | &(SN_PCI_CONTROLLER(dev->bus)->pcidev_info)); | ||
395 | 187 | ||
396 | /* Copy over PIO Mapped Addresses */ | 188 | /* Copy over PIO Mapped Addresses */ |
397 | for (idx = 0; idx <= PCI_ROM_RESOURCE; idx++) { | 189 | for (idx = 0; idx <= PCI_ROM_RESOURCE; idx++) { |
398 | unsigned long start, end, addr; | ||
399 | 190 | ||
400 | if (!pcidev_info->pdi_pio_mapped_addr[idx]) { | 191 | if (!pcidev_info->pdi_pio_mapped_addr[idx]) { |
401 | pci_addrs[idx] = -1; | 192 | pci_addrs[idx] = -1; |
@@ -419,60 +210,28 @@ void sn_pci_fixup_slot(struct pci_dev *dev) | |||
419 | dev->resource[idx].parent = &ioport_resource; | 210 | dev->resource[idx].parent = &ioport_resource; |
420 | else | 211 | else |
421 | dev->resource[idx].parent = &iomem_resource; | 212 | dev->resource[idx].parent = &iomem_resource; |
213 | /* If ROM, mark as shadowed in PROM */ | ||
214 | if (idx == PCI_ROM_RESOURCE) | ||
215 | dev->resource[idx].flags |= IORESOURCE_ROM_BIOS_COPY; | ||
422 | } | 216 | } |
423 | /* Create a pci_window in the pci_controller struct for | 217 | /* Create a pci_window in the pci_controller struct for |
424 | * each device resource. | 218 | * each device resource. |
425 | */ | 219 | */ |
426 | if (count > 0) | 220 | if (count > 0) |
427 | sn_pci_window_fixup(dev, count, pci_addrs); | 221 | sn_pci_window_fixup(dev, count, pci_addrs); |
428 | |||
429 | /* | ||
430 | * Using the PROMs values for the PCI host bus, get the Linux | ||
431 | * PCI host_pci_dev struct and set up host bus linkages | ||
432 | */ | ||
433 | |||
434 | bus_no = (pcidev_info->pdi_slot_host_handle >> 32) & 0xff; | ||
435 | devfn = pcidev_info->pdi_slot_host_handle & 0xffffffff; | ||
436 | host_pci_bus = pci_find_bus(segment, bus_no); | ||
437 | host_pci_dev = pci_get_slot(host_pci_bus, devfn); | ||
438 | |||
439 | pcidev_info->host_pci_dev = host_pci_dev; | ||
440 | pcidev_info->pdi_linux_pcidev = dev; | ||
441 | pcidev_info->pdi_host_pcidev_info = SN_PCIDEV_INFO(host_pci_dev); | ||
442 | bs = SN_PCIBUS_BUSSOFT(dev->bus); | ||
443 | pcidev_info->pdi_pcibus_info = bs; | ||
444 | |||
445 | if (bs && bs->bs_asic_type < PCIIO_ASIC_MAX_TYPES) { | ||
446 | SN_PCIDEV_BUSPROVIDER(dev) = sn_pci_provider[bs->bs_asic_type]; | ||
447 | } else { | ||
448 | SN_PCIDEV_BUSPROVIDER(dev) = &sn_pci_default_provider; | ||
449 | } | ||
450 | |||
451 | /* Only set up IRQ stuff if this device has a host bus context */ | ||
452 | if (bs && sn_irq_info->irq_irq) { | ||
453 | pcidev_info->pdi_sn_irq_info = sn_irq_info; | ||
454 | dev->irq = pcidev_info->pdi_sn_irq_info->irq_irq; | ||
455 | sn_irq_fixup(dev, sn_irq_info); | ||
456 | } else { | ||
457 | pcidev_info->pdi_sn_irq_info = NULL; | ||
458 | kfree(sn_irq_info); | ||
459 | } | ||
460 | } | 222 | } |
461 | 223 | ||
462 | /* | 224 | /* |
463 | * sn_pci_controller_fixup() - This routine sets up a bus's resources | 225 | * sn_pci_controller_fixup() - This routine sets up a bus's resources |
464 | * consistent with the Linux PCI abstraction layer. | 226 | * consistent with the Linux PCI abstraction layer. |
465 | */ | 227 | */ |
466 | void sn_pci_controller_fixup(int segment, int busnum, struct pci_bus *bus) | 228 | static void |
229 | sn_pci_controller_fixup(int segment, int busnum, struct pci_bus *bus) | ||
467 | { | 230 | { |
468 | int status; | 231 | s64 status = 0; |
469 | int nasid, cnode; | ||
470 | struct pci_controller *controller; | 232 | struct pci_controller *controller; |
471 | struct sn_pci_controller *sn_controller; | ||
472 | struct pcibus_bussoft *prom_bussoft_ptr; | 233 | struct pcibus_bussoft *prom_bussoft_ptr; |
473 | struct hubdev_info *hubdev_info; | 234 | |
474 | void *provider_soft; | ||
475 | struct sn_pcibus_provider *provider; | ||
476 | 235 | ||
477 | status = sal_get_pcibus_info((u64) segment, (u64) busnum, | 236 | status = sal_get_pcibus_info((u64) segment, (u64) busnum, |
478 | (u64) ia64_tpa(&prom_bussoft_ptr)); | 237 | (u64) ia64_tpa(&prom_bussoft_ptr)); |
@@ -480,261 +239,77 @@ void sn_pci_controller_fixup(int segment, int busnum, struct pci_bus *bus) | |||
480 | return; /*bus # does not exist */ | 239 | return; /*bus # does not exist */ |
481 | prom_bussoft_ptr = __va(prom_bussoft_ptr); | 240 | prom_bussoft_ptr = __va(prom_bussoft_ptr); |
482 | 241 | ||
483 | /* Allocate a sn_pci_controller, which has a pci_controller struct | 242 | controller = kzalloc(sizeof(*controller), GFP_KERNEL); |
484 | * as the first member. | 243 | if (!controller) |
485 | */ | ||
486 | sn_controller = kzalloc(sizeof(struct sn_pci_controller), GFP_KERNEL); | ||
487 | if (!sn_controller) | ||
488 | BUG(); | 244 | BUG(); |
489 | INIT_LIST_HEAD(&sn_controller->pcidev_info); | ||
490 | controller = &sn_controller->pci_controller; | ||
491 | controller->segment = segment; | 245 | controller->segment = segment; |
492 | 246 | ||
493 | if (bus == NULL) { | ||
494 | bus = pci_scan_bus(busnum, &pci_root_ops, controller); | ||
495 | if (bus == NULL) | ||
496 | goto error_return; /* error, or bus already scanned */ | ||
497 | bus->sysdata = NULL; | ||
498 | } | ||
499 | |||
500 | if (bus->sysdata) | ||
501 | goto error_return; /* sysdata already alloc'd */ | ||
502 | |||
503 | /* | 247 | /* |
504 | * Per-provider fixup. Copies the contents from prom to local | 248 | * Temporarily save the prom_bussoft_ptr for use by sn_bus_fixup(). |
505 | * area and links SN_PCIBUS_BUSSOFT(). | 249 | * (platform_data will be overwritten later in sn_common_bus_fixup()) |
506 | */ | 250 | */ |
251 | controller->platform_data = prom_bussoft_ptr; | ||
507 | 252 | ||
508 | if (prom_bussoft_ptr->bs_asic_type >= PCIIO_ASIC_MAX_TYPES) | 253 | bus = pci_scan_bus(busnum, &pci_root_ops, controller); |
509 | goto error_return; /* unsupported asic type */ | 254 | if (bus == NULL) |
510 | 255 | goto error_return; /* error, or bus already scanned */ | |
511 | if (prom_bussoft_ptr->bs_asic_type == PCIIO_ASIC_TYPE_PPB) | ||
512 | goto error_return; /* no further fixup necessary */ | ||
513 | |||
514 | provider = sn_pci_provider[prom_bussoft_ptr->bs_asic_type]; | ||
515 | if (provider == NULL) | ||
516 | goto error_return; /* no provider registerd for this asic */ | ||
517 | 256 | ||
518 | bus->sysdata = controller; | 257 | bus->sysdata = controller; |
519 | if (provider->bus_fixup) | ||
520 | provider_soft = (*provider->bus_fixup) (prom_bussoft_ptr, controller); | ||
521 | else | ||
522 | provider_soft = NULL; | ||
523 | |||
524 | if (provider_soft == NULL) { | ||
525 | /* fixup failed or not applicable */ | ||
526 | bus->sysdata = NULL; | ||
527 | goto error_return; | ||
528 | } | ||
529 | |||
530 | /* | ||
531 | * Setup pci_windows for legacy IO and MEM space. | ||
532 | * (Temporary until ACPI support is in place.) | ||
533 | */ | ||
534 | controller->window = kcalloc(2, sizeof(struct pci_window), GFP_KERNEL); | ||
535 | if (controller->window == NULL) | ||
536 | BUG(); | ||
537 | controller->window[0].offset = prom_bussoft_ptr->bs_legacy_io; | ||
538 | controller->window[0].resource.name = "legacy_io"; | ||
539 | controller->window[0].resource.flags = IORESOURCE_IO; | ||
540 | controller->window[0].resource.start = prom_bussoft_ptr->bs_legacy_io; | ||
541 | controller->window[0].resource.end = | ||
542 | controller->window[0].resource.start + 0xffff; | ||
543 | controller->window[0].resource.parent = &ioport_resource; | ||
544 | controller->window[1].offset = prom_bussoft_ptr->bs_legacy_mem; | ||
545 | controller->window[1].resource.name = "legacy_mem"; | ||
546 | controller->window[1].resource.flags = IORESOURCE_MEM; | ||
547 | controller->window[1].resource.start = prom_bussoft_ptr->bs_legacy_mem; | ||
548 | controller->window[1].resource.end = | ||
549 | controller->window[1].resource.start + (1024 * 1024) - 1; | ||
550 | controller->window[1].resource.parent = &iomem_resource; | ||
551 | controller->windows = 2; | ||
552 | |||
553 | /* | ||
554 | * Generic bus fixup goes here. Don't reference prom_bussoft_ptr | ||
555 | * after this point. | ||
556 | */ | ||
557 | |||
558 | PCI_CONTROLLER(bus)->platform_data = provider_soft; | ||
559 | nasid = NASID_GET(SN_PCIBUS_BUSSOFT(bus)->bs_base); | ||
560 | cnode = nasid_to_cnodeid(nasid); | ||
561 | hubdev_info = (struct hubdev_info *)(NODEPDA(cnode)->pdinfo); | ||
562 | SN_PCIBUS_BUSSOFT(bus)->bs_xwidget_info = | ||
563 | &(hubdev_info->hdi_xwidget_info[SN_PCIBUS_BUSSOFT(bus)->bs_xid]); | ||
564 | 258 | ||
565 | /* | ||
566 | * If the node information we obtained during the fixup phase is invalid | ||
567 | * then set controller->node to -1 (undetermined) | ||
568 | */ | ||
569 | if (controller->node >= num_online_nodes()) { | ||
570 | struct pcibus_bussoft *b = SN_PCIBUS_BUSSOFT(bus); | ||
571 | |||
572 | printk(KERN_WARNING "Device ASIC=%u XID=%u PBUSNUM=%u" | ||
573 | "L_IO=%lx L_MEM=%lx BASE=%lx\n", | ||
574 | b->bs_asic_type, b->bs_xid, b->bs_persist_busnum, | ||
575 | b->bs_legacy_io, b->bs_legacy_mem, b->bs_base); | ||
576 | printk(KERN_WARNING "on node %d but only %d nodes online." | ||
577 | "Association set to undetermined.\n", | ||
578 | controller->node, num_online_nodes()); | ||
579 | controller->node = -1; | ||
580 | } | ||
581 | return; | 259 | return; |
582 | 260 | ||
583 | error_return: | 261 | error_return: |
584 | 262 | ||
585 | kfree(sn_controller); | 263 | kfree(controller); |
586 | return; | 264 | return; |
587 | } | 265 | } |
588 | 266 | ||
589 | void sn_bus_store_sysdata(struct pci_dev *dev) | 267 | /* |
268 | * sn_bus_fixup | ||
269 | */ | ||
270 | void | ||
271 | sn_bus_fixup(struct pci_bus *bus) | ||
590 | { | 272 | { |
591 | struct sysdata_el *element; | 273 | struct pci_dev *pci_dev = NULL; |
592 | 274 | struct pcibus_bussoft *prom_bussoft_ptr; | |
593 | element = kzalloc(sizeof(struct sysdata_el), GFP_KERNEL); | 275 | extern void sn_common_bus_fixup(struct pci_bus *, |
594 | if (!element) { | 276 | struct pcibus_bussoft *); |
595 | dev_dbg(dev, "%s: out of memory!\n", __FUNCTION__); | 277 | |
596 | return; | 278 | |
597 | } | 279 | if (!bus->parent) { /* If root bus */ |
598 | element->sysdata = SN_PCIDEV_INFO(dev); | 280 | prom_bussoft_ptr = PCI_CONTROLLER(bus)->platform_data; |
599 | list_add(&element->entry, &sn_sysdata_list); | 281 | if (prom_bussoft_ptr == NULL) { |
600 | } | 282 | printk(KERN_ERR |
283 | "sn_bus_fixup: 0x%04x:0x%02x Unable to " | ||
284 | "obtain prom_bussoft_ptr\n", | ||
285 | pci_domain_nr(bus), bus->number); | ||
286 | return; | ||
287 | } | ||
288 | sn_common_bus_fixup(bus, prom_bussoft_ptr); | ||
289 | sn_legacy_pci_window_fixup(PCI_CONTROLLER(bus), | ||
290 | prom_bussoft_ptr->bs_legacy_io, | ||
291 | prom_bussoft_ptr->bs_legacy_mem); | ||
292 | } | ||
293 | list_for_each_entry(pci_dev, &bus->devices, bus_list) { | ||
294 | sn_pci_fixup_slot(pci_dev); | ||
295 | } | ||
601 | 296 | ||
602 | void sn_bus_free_sysdata(void) | ||
603 | { | ||
604 | struct sysdata_el *element; | ||
605 | struct list_head *list, *safe; | ||
606 | |||
607 | list_for_each_safe(list, safe, &sn_sysdata_list) { | ||
608 | element = list_entry(list, struct sysdata_el, entry); | ||
609 | list_del(&element->entry); | ||
610 | list_del(&(((struct pcidev_info *) | ||
611 | (element->sysdata))->pdi_list)); | ||
612 | kfree(element->sysdata); | ||
613 | kfree(element); | ||
614 | } | ||
615 | return; | ||
616 | } | 297 | } |
617 | 298 | ||
618 | /* | 299 | /* |
619 | * Ugly hack to get PCI setup until we have a proper ACPI namespace. | 300 | * sn_io_init - PROM does not have ACPI support to define nodes or root buses, |
301 | * so we need to do things the hard way, including initiating the | ||
302 | * bus scanning ourselves. | ||
620 | */ | 303 | */ |
621 | 304 | ||
622 | #define PCI_BUSES_TO_SCAN 256 | 305 | void __init sn_io_init(void) |
623 | |||
624 | static int __init sn_pci_init(void) | ||
625 | { | 306 | { |
626 | int i, j; | 307 | int i, j; |
627 | struct pci_dev *pci_dev = NULL; | ||
628 | |||
629 | if (!ia64_platform_is("sn2") || IS_RUNNING_ON_FAKE_PROM()) | ||
630 | return 0; | ||
631 | |||
632 | /* | ||
633 | * prime sn_pci_provider[]. Individial provider init routines will | ||
634 | * override their respective default entries. | ||
635 | */ | ||
636 | |||
637 | for (i = 0; i < PCIIO_ASIC_MAX_TYPES; i++) | ||
638 | sn_pci_provider[i] = &sn_pci_default_provider; | ||
639 | 308 | ||
640 | pcibr_init_provider(); | ||
641 | tioca_init_provider(); | ||
642 | tioce_init_provider(); | ||
643 | |||
644 | /* | ||
645 | * This is needed to avoid bounce limit checks in the blk layer | ||
646 | */ | ||
647 | ia64_max_iommu_merge_mask = ~PAGE_MASK; | ||
648 | sn_fixup_ionodes(); | 309 | sn_fixup_ionodes(); |
649 | sn_irq_lh_init(); | ||
650 | INIT_LIST_HEAD(&sn_sysdata_list); | ||
651 | sn_init_cpei_timer(); | ||
652 | |||
653 | #ifdef CONFIG_PROC_FS | ||
654 | register_sn_procfs(); | ||
655 | #endif | ||
656 | 310 | ||
657 | /* busses are not known yet ... */ | 311 | /* busses are not known yet ... */ |
658 | for (i = 0; i <= max_segment_number; i++) | 312 | for (i = 0; i <= max_segment_number; i++) |
659 | for (j = 0; j <= max_pcibus_number; j++) | 313 | for (j = 0; j <= max_pcibus_number; j++) |
660 | sn_pci_controller_fixup(i, j, NULL); | 314 | sn_pci_controller_fixup(i, j, NULL); |
661 | |||
662 | /* | ||
663 | * Generic Linux PCI Layer has created the pci_bus and pci_dev | ||
664 | * structures - time for us to add our SN PLatform specific | ||
665 | * information. | ||
666 | */ | ||
667 | |||
668 | while ((pci_dev = | ||
669 | pci_get_device(PCI_ANY_ID, PCI_ANY_ID, pci_dev)) != NULL) | ||
670 | sn_pci_fixup_slot(pci_dev); | ||
671 | |||
672 | sn_ioif_inited = 1; /* sn I/O infrastructure now initialized */ | ||
673 | |||
674 | return 0; | ||
675 | } | ||
676 | |||
677 | /* | ||
678 | * hubdev_init_node() - Creates the HUB data structure and link them to it's | ||
679 | * own NODE specific data area. | ||
680 | */ | ||
681 | void hubdev_init_node(nodepda_t * npda, cnodeid_t node) | ||
682 | { | ||
683 | struct hubdev_info *hubdev_info; | ||
684 | int size; | ||
685 | pg_data_t *pg; | ||
686 | |||
687 | size = sizeof(struct hubdev_info); | ||
688 | |||
689 | if (node >= num_online_nodes()) /* Headless/memless IO nodes */ | ||
690 | pg = NODE_DATA(0); | ||
691 | else | ||
692 | pg = NODE_DATA(node); | ||
693 | |||
694 | hubdev_info = (struct hubdev_info *)alloc_bootmem_node(pg, size); | ||
695 | |||
696 | npda->pdinfo = (void *)hubdev_info; | ||
697 | } | 315 | } |
698 | |||
699 | geoid_t | ||
700 | cnodeid_get_geoid(cnodeid_t cnode) | ||
701 | { | ||
702 | struct hubdev_info *hubdev; | ||
703 | |||
704 | hubdev = (struct hubdev_info *)(NODEPDA(cnode)->pdinfo); | ||
705 | return hubdev->hdi_geoid; | ||
706 | } | ||
707 | |||
708 | void sn_generate_path(struct pci_bus *pci_bus, char *address) | ||
709 | { | ||
710 | nasid_t nasid; | ||
711 | cnodeid_t cnode; | ||
712 | geoid_t geoid; | ||
713 | moduleid_t moduleid; | ||
714 | u16 bricktype; | ||
715 | |||
716 | nasid = NASID_GET(SN_PCIBUS_BUSSOFT(pci_bus)->bs_base); | ||
717 | cnode = nasid_to_cnodeid(nasid); | ||
718 | geoid = cnodeid_get_geoid(cnode); | ||
719 | moduleid = geo_module(geoid); | ||
720 | |||
721 | sprintf(address, "module_%c%c%c%c%.2d", | ||
722 | '0'+RACK_GET_CLASS(MODULE_GET_RACK(moduleid)), | ||
723 | '0'+RACK_GET_GROUP(MODULE_GET_RACK(moduleid)), | ||
724 | '0'+RACK_GET_NUM(MODULE_GET_RACK(moduleid)), | ||
725 | MODULE_GET_BTCHAR(moduleid), MODULE_GET_BPOS(moduleid)); | ||
726 | |||
727 | /* Tollhouse requires slot id to be displayed */ | ||
728 | bricktype = MODULE_GET_BTYPE(moduleid); | ||
729 | if ((bricktype == L1_BRICKTYPE_191010) || | ||
730 | (bricktype == L1_BRICKTYPE_1932)) | ||
731 | sprintf(address, "%s^%d", address, geo_slot(geoid)); | ||
732 | } | ||
733 | |||
734 | subsys_initcall(sn_pci_init); | ||
735 | EXPORT_SYMBOL(sn_pci_fixup_slot); | ||
736 | EXPORT_SYMBOL(sn_pci_unfixup_slot); | ||
737 | EXPORT_SYMBOL(sn_pci_controller_fixup); | ||
738 | EXPORT_SYMBOL(sn_bus_store_sysdata); | ||
739 | EXPORT_SYMBOL(sn_bus_free_sysdata); | ||
740 | EXPORT_SYMBOL(sn_generate_path); | ||
diff --git a/arch/ia64/sn/kernel/iomv.c b/arch/ia64/sn/kernel/iomv.c index 7ce3cdad627b..4aa4f301d56d 100644 --- a/arch/ia64/sn/kernel/iomv.c +++ b/arch/ia64/sn/kernel/iomv.c | |||
@@ -3,10 +3,11 @@ | |||
3 | * License. See the file "COPYING" in the main directory of this archive | 3 | * License. See the file "COPYING" in the main directory of this archive |
4 | * for more details. | 4 | * for more details. |
5 | * | 5 | * |
6 | * Copyright (C) 2000-2003 Silicon Graphics, Inc. All rights reserved. | 6 | * Copyright (C) 2000-2003, 2006 Silicon Graphics, Inc. All rights reserved. |
7 | */ | 7 | */ |
8 | 8 | ||
9 | #include <linux/module.h> | 9 | #include <linux/module.h> |
10 | #include <linux/acpi.h> | ||
10 | #include <asm/io.h> | 11 | #include <asm/io.h> |
11 | #include <asm/delay.h> | 12 | #include <asm/delay.h> |
12 | #include <asm/vga.h> | 13 | #include <asm/vga.h> |
@@ -15,6 +16,7 @@ | |||
15 | #include <asm/sn/pda.h> | 16 | #include <asm/sn/pda.h> |
16 | #include <asm/sn/sn_cpuid.h> | 17 | #include <asm/sn/sn_cpuid.h> |
17 | #include <asm/sn/shub_mmr.h> | 18 | #include <asm/sn/shub_mmr.h> |
19 | #include <asm/sn/acpi.h> | ||
18 | 20 | ||
19 | #define IS_LEGACY_VGA_IOPORT(p) \ | 21 | #define IS_LEGACY_VGA_IOPORT(p) \ |
20 | (((p) >= 0x3b0 && (p) <= 0x3bb) || ((p) >= 0x3c0 && (p) <= 0x3df)) | 22 | (((p) >= 0x3b0 && (p) <= 0x3bb) || ((p) >= 0x3c0 && (p) <= 0x3df)) |
@@ -31,11 +33,14 @@ void *sn_io_addr(unsigned long port) | |||
31 | { | 33 | { |
32 | if (!IS_RUNNING_ON_SIMULATOR()) { | 34 | if (!IS_RUNNING_ON_SIMULATOR()) { |
33 | if (IS_LEGACY_VGA_IOPORT(port)) | 35 | if (IS_LEGACY_VGA_IOPORT(port)) |
34 | port += vga_console_iobase; | 36 | return (__ia64_mk_io_addr(port)); |
35 | /* On sn2, legacy I/O ports don't point at anything */ | 37 | /* On sn2, legacy I/O ports don't point at anything */ |
36 | if (port < (64 * 1024)) | 38 | if (port < (64 * 1024)) |
37 | return NULL; | 39 | return NULL; |
38 | return ((void *)(port | __IA64_UNCACHED_OFFSET)); | 40 | if (SN_ACPI_BASE_SUPPORT()) |
41 | return (__ia64_mk_io_addr(port)); | ||
42 | else | ||
43 | return ((void *)(port | __IA64_UNCACHED_OFFSET)); | ||
39 | } else { | 44 | } else { |
40 | /* but the simulator uses them... */ | 45 | /* but the simulator uses them... */ |
41 | unsigned long addr; | 46 | unsigned long addr; |
diff --git a/arch/ia64/sn/kernel/setup.c b/arch/ia64/sn/kernel/setup.c index 7a2d824c5ce3..1d009f93244d 100644 --- a/arch/ia64/sn/kernel/setup.c +++ b/arch/ia64/sn/kernel/setup.c | |||
@@ -388,6 +388,14 @@ void __init sn_setup(char **cmdline_p) | |||
388 | ia64_sn_plat_set_error_handling_features(); // obsolete | 388 | ia64_sn_plat_set_error_handling_features(); // obsolete |
389 | ia64_sn_set_os_feature(OSF_MCA_SLV_TO_OS_INIT_SLV); | 389 | ia64_sn_set_os_feature(OSF_MCA_SLV_TO_OS_INIT_SLV); |
390 | ia64_sn_set_os_feature(OSF_FEAT_LOG_SBES); | 390 | ia64_sn_set_os_feature(OSF_FEAT_LOG_SBES); |
391 | /* | ||
392 | * Note: The calls to notify the PROM of ACPI and PCI Segment | ||
393 | * support must be done prior to acpi_load_tables(), as | ||
394 | * an ACPI capable PROM will rebuild the DSDT as result | ||
395 | * of the call. | ||
396 | */ | ||
397 | ia64_sn_set_os_feature(OSF_PCISEGMENT_ENABLE); | ||
398 | ia64_sn_set_os_feature(OSF_ACPI_ENABLE); | ||
391 | 399 | ||
392 | 400 | ||
393 | #if defined(CONFIG_VT) && defined(CONFIG_VGA_CONSOLE) | 401 | #if defined(CONFIG_VT) && defined(CONFIG_VGA_CONSOLE) |
@@ -413,6 +421,16 @@ void __init sn_setup(char **cmdline_p) | |||
413 | if (! vga_console_membase) | 421 | if (! vga_console_membase) |
414 | sn_scan_pcdp(); | 422 | sn_scan_pcdp(); |
415 | 423 | ||
424 | /* | ||
425 | * Setup legacy IO space. | ||
426 | * vga_console_iobase maps to PCI IO Space address 0 on the | ||
427 | * bus containing the VGA console. | ||
428 | */ | ||
429 | if (vga_console_iobase) { | ||
430 | io_space[0].mmio_base = vga_console_iobase; | ||
431 | io_space[0].sparse = 0; | ||
432 | } | ||
433 | |||
416 | if (vga_console_membase) { | 434 | if (vga_console_membase) { |
417 | /* usable vga ... make tty0 the preferred default console */ | 435 | /* usable vga ... make tty0 the preferred default console */ |
418 | if (!strstr(*cmdline_p, "console=")) | 436 | if (!strstr(*cmdline_p, "console=")) |
diff --git a/arch/ia64/sn/kernel/tiocx.c b/arch/ia64/sn/kernel/tiocx.c index feaf1a6e8101..493380b2c05f 100644 --- a/arch/ia64/sn/kernel/tiocx.c +++ b/arch/ia64/sn/kernel/tiocx.c | |||
@@ -552,7 +552,7 @@ static void __exit tiocx_exit(void) | |||
552 | bus_unregister(&tiocx_bus_type); | 552 | bus_unregister(&tiocx_bus_type); |
553 | } | 553 | } |
554 | 554 | ||
555 | subsys_initcall(tiocx_init); | 555 | fs_initcall(tiocx_init); |
556 | module_exit(tiocx_exit); | 556 | module_exit(tiocx_exit); |
557 | 557 | ||
558 | /************************************************************************ | 558 | /************************************************************************ |
diff --git a/arch/ia64/sn/pci/pcibr/pcibr_provider.c b/arch/ia64/sn/pci/pcibr/pcibr_provider.c index 27dd7df0f446..6846dc9b432d 100644 --- a/arch/ia64/sn/pci/pcibr/pcibr_provider.c +++ b/arch/ia64/sn/pci/pcibr/pcibr_provider.c | |||
@@ -3,7 +3,7 @@ | |||
3 | * License. See the file "COPYING" in the main directory of this archive | 3 | * License. See the file "COPYING" in the main directory of this archive |
4 | * for more details. | 4 | * for more details. |
5 | * | 5 | * |
6 | * Copyright (C) 2001-2004 Silicon Graphics, Inc. All rights reserved. | 6 | * Copyright (C) 2001-2004, 2006 Silicon Graphics, Inc. All rights reserved. |
7 | */ | 7 | */ |
8 | 8 | ||
9 | #include <linux/interrupt.h> | 9 | #include <linux/interrupt.h> |
@@ -109,7 +109,6 @@ void * | |||
109 | pcibr_bus_fixup(struct pcibus_bussoft *prom_bussoft, struct pci_controller *controller) | 109 | pcibr_bus_fixup(struct pcibus_bussoft *prom_bussoft, struct pci_controller *controller) |
110 | { | 110 | { |
111 | int nasid, cnode, j; | 111 | int nasid, cnode, j; |
112 | cnodeid_t near_cnode; | ||
113 | struct hubdev_info *hubdev_info; | 112 | struct hubdev_info *hubdev_info; |
114 | struct pcibus_info *soft; | 113 | struct pcibus_info *soft; |
115 | struct sn_flush_device_kernel *sn_flush_device_kernel; | 114 | struct sn_flush_device_kernel *sn_flush_device_kernel; |
@@ -186,20 +185,6 @@ pcibr_bus_fixup(struct pcibus_bussoft *prom_bussoft, struct pci_controller *cont | |||
186 | return NULL; | 185 | return NULL; |
187 | } | 186 | } |
188 | 187 | ||
189 | if (prom_bussoft->bs_asic_type == PCIIO_ASIC_TYPE_TIOCP) { | ||
190 | /* TIO PCI Bridge: find nearest node with CPUs */ | ||
191 | int e = sn_hwperf_get_nearest_node(cnode, NULL, &near_cnode); | ||
192 | |||
193 | if (e < 0) { | ||
194 | near_cnode = (cnodeid_t)-1; /* use any node */ | ||
195 | printk(KERN_WARNING "pcibr_bus_fixup: failed to find " | ||
196 | "near node with CPUs to TIO node %d, err=%d\n", | ||
197 | cnode, e); | ||
198 | } | ||
199 | controller->node = near_cnode; | ||
200 | } | ||
201 | else | ||
202 | controller->node = cnode; | ||
203 | return soft; | 188 | return soft; |
204 | } | 189 | } |
205 | 190 | ||
diff --git a/arch/ia64/sn/pci/tioce_provider.c b/arch/ia64/sn/pci/tioce_provider.c index 46e16dcf5971..35f854fb6120 100644 --- a/arch/ia64/sn/pci/tioce_provider.c +++ b/arch/ia64/sn/pci/tioce_provider.c | |||
@@ -15,7 +15,6 @@ | |||
15 | #include <asm/sn/pcidev.h> | 15 | #include <asm/sn/pcidev.h> |
16 | #include <asm/sn/pcibus_provider_defs.h> | 16 | #include <asm/sn/pcibus_provider_defs.h> |
17 | #include <asm/sn/tioce_provider.h> | 17 | #include <asm/sn/tioce_provider.h> |
18 | #include <asm/sn/sn2/sn_hwperf.h> | ||
19 | 18 | ||
20 | /* | 19 | /* |
21 | * 1/26/2006 | 20 | * 1/26/2006 |
@@ -990,8 +989,6 @@ tioce_target_interrupt(struct sn_irq_info *sn_irq_info) | |||
990 | static void * | 989 | static void * |
991 | tioce_bus_fixup(struct pcibus_bussoft *prom_bussoft, struct pci_controller *controller) | 990 | tioce_bus_fixup(struct pcibus_bussoft *prom_bussoft, struct pci_controller *controller) |
992 | { | 991 | { |
993 | int my_nasid; | ||
994 | cnodeid_t my_cnode, mem_cnode; | ||
995 | struct tioce_common *tioce_common; | 992 | struct tioce_common *tioce_common; |
996 | struct tioce_kernel *tioce_kern; | 993 | struct tioce_kernel *tioce_kern; |
997 | struct tioce __iomem *tioce_mmr; | 994 | struct tioce __iomem *tioce_mmr; |
@@ -1035,21 +1032,6 @@ tioce_bus_fixup(struct pcibus_bussoft *prom_bussoft, struct pci_controller *cont | |||
1035 | tioce_common->ce_pcibus.bs_persist_segment, | 1032 | tioce_common->ce_pcibus.bs_persist_segment, |
1036 | tioce_common->ce_pcibus.bs_persist_busnum); | 1033 | tioce_common->ce_pcibus.bs_persist_busnum); |
1037 | 1034 | ||
1038 | /* | ||
1039 | * identify closest nasid for memory allocations | ||
1040 | */ | ||
1041 | |||
1042 | my_nasid = NASID_GET(tioce_common->ce_pcibus.bs_base); | ||
1043 | my_cnode = nasid_to_cnodeid(my_nasid); | ||
1044 | |||
1045 | if (sn_hwperf_get_nearest_node(my_cnode, &mem_cnode, NULL) < 0) { | ||
1046 | printk(KERN_WARNING "tioce_bus_fixup: failed to find " | ||
1047 | "closest node with MEM to TIO node %d\n", my_cnode); | ||
1048 | mem_cnode = (cnodeid_t)-1; /* use any node */ | ||
1049 | } | ||
1050 | |||
1051 | controller->node = mem_cnode; | ||
1052 | |||
1053 | return tioce_common; | 1035 | return tioce_common; |
1054 | } | 1036 | } |
1055 | 1037 | ||
diff --git a/arch/m32r/lib/csum_partial_copy.c b/arch/m32r/lib/csum_partial_copy.c index 3d5f06145854..5596f3df833f 100644 --- a/arch/m32r/lib/csum_partial_copy.c +++ b/arch/m32r/lib/csum_partial_copy.c | |||
@@ -27,9 +27,8 @@ | |||
27 | /* | 27 | /* |
28 | * Copy while checksumming, otherwise like csum_partial | 28 | * Copy while checksumming, otherwise like csum_partial |
29 | */ | 29 | */ |
30 | unsigned int | 30 | __wsum |
31 | csum_partial_copy_nocheck (const unsigned char *src, unsigned char *dst, | 31 | csum_partial_copy_nocheck (const void *src, void *dst, int len, __wsum sum) |
32 | int len, unsigned int sum) | ||
33 | { | 32 | { |
34 | sum = csum_partial(src, len, sum); | 33 | sum = csum_partial(src, len, sum); |
35 | memcpy(dst, src, len); | 34 | memcpy(dst, src, len); |
@@ -42,10 +41,9 @@ EXPORT_SYMBOL(csum_partial_copy_nocheck); | |||
42 | * Copy from userspace and compute checksum. If we catch an exception | 41 | * Copy from userspace and compute checksum. If we catch an exception |
43 | * then zero the rest of the buffer. | 42 | * then zero the rest of the buffer. |
44 | */ | 43 | */ |
45 | unsigned int | 44 | __wsum |
46 | csum_partial_copy_from_user (const unsigned char __user *src, | 45 | csum_partial_copy_from_user (const void __user *src, void *dst, |
47 | unsigned char *dst, | 46 | int len, __wsum sum, int *err_ptr) |
48 | int len, unsigned int sum, int *err_ptr) | ||
49 | { | 47 | { |
50 | int missing; | 48 | int missing; |
51 | 49 | ||
diff --git a/arch/m68k/lib/checksum.c b/arch/m68k/lib/checksum.c index cb13c6e3ccae..aed3be29e06b 100644 --- a/arch/m68k/lib/checksum.c +++ b/arch/m68k/lib/checksum.c | |||
@@ -39,8 +39,7 @@ | |||
39 | * computes a partial checksum, e.g. for TCP/UDP fragments | 39 | * computes a partial checksum, e.g. for TCP/UDP fragments |
40 | */ | 40 | */ |
41 | 41 | ||
42 | unsigned int | 42 | __wsum csum_partial(const void *buff, int len, __wsum sum) |
43 | csum_partial (const unsigned char *buff, int len, unsigned int sum) | ||
44 | { | 43 | { |
45 | unsigned long tmp1, tmp2; | 44 | unsigned long tmp1, tmp2; |
46 | /* | 45 | /* |
@@ -133,9 +132,9 @@ EXPORT_SYMBOL(csum_partial); | |||
133 | * copy from user space while checksumming, with exception handling. | 132 | * copy from user space while checksumming, with exception handling. |
134 | */ | 133 | */ |
135 | 134 | ||
136 | unsigned int | 135 | __wsum |
137 | csum_partial_copy_from_user(const unsigned char __user *src, unsigned char *dst, | 136 | csum_partial_copy_from_user(const void __user *src, void *dst, |
138 | int len, int sum, int *csum_err) | 137 | int len, __wsum sum, int *csum_err) |
139 | { | 138 | { |
140 | /* | 139 | /* |
141 | * GCC doesn't like more than 10 operands for the asm | 140 | * GCC doesn't like more than 10 operands for the asm |
@@ -325,8 +324,8 @@ csum_partial_copy_from_user(const unsigned char __user *src, unsigned char *dst, | |||
325 | * copy from kernel space while checksumming, otherwise like csum_partial | 324 | * copy from kernel space while checksumming, otherwise like csum_partial |
326 | */ | 325 | */ |
327 | 326 | ||
328 | unsigned int | 327 | __wsum |
329 | csum_partial_copy_nocheck(const unsigned char *src, unsigned char *dst, int len, int sum) | 328 | csum_partial_copy_nocheck(const void *src, void *dst, int len, __wsum sum) |
330 | { | 329 | { |
331 | unsigned long tmp1, tmp2; | 330 | unsigned long tmp1, tmp2; |
332 | __asm__("movel %2,%4\n\t" | 331 | __asm__("movel %2,%4\n\t" |
diff --git a/arch/m68knommu/Kconfig b/arch/m68knommu/Kconfig index 6d920d4bdc3d..c1bc22c6d0d8 100644 --- a/arch/m68knommu/Kconfig +++ b/arch/m68knommu/Kconfig | |||
@@ -565,7 +565,7 @@ config ROMVEC | |||
565 | depends on ROM | 565 | depends on ROM |
566 | help | 566 | help |
567 | This is almost always the same as the base of the ROM. Since on all | 567 | This is almost always the same as the base of the ROM. Since on all |
568 | 68000 type varients the vectors are at the base of the boot device | 568 | 68000 type variants the vectors are at the base of the boot device |
569 | on system startup. | 569 | on system startup. |
570 | 570 | ||
571 | config ROMVECSIZE | 571 | config ROMVECSIZE |
@@ -574,7 +574,7 @@ config ROMVECSIZE | |||
574 | depends on ROM | 574 | depends on ROM |
575 | help | 575 | help |
576 | Define the size of the vector region in ROM. For most 68000 | 576 | Define the size of the vector region in ROM. For most 68000 |
577 | varients this would be 0x400 bytes in size. Set to 0 if you do | 577 | variants this would be 0x400 bytes in size. Set to 0 if you do |
578 | not want a vector region at the start of the ROM. | 578 | not want a vector region at the start of the ROM. |
579 | 579 | ||
580 | config ROMSTART | 580 | config ROMSTART |
diff --git a/arch/m68knommu/kernel/m68k_ksyms.c b/arch/m68knommu/kernel/m68k_ksyms.c index 1e62150f3588..25327c9eadd7 100644 --- a/arch/m68knommu/kernel/m68k_ksyms.c +++ b/arch/m68knommu/kernel/m68k_ksyms.c | |||
@@ -38,7 +38,7 @@ EXPORT_SYMBOL(ip_fast_csum); | |||
38 | EXPORT_SYMBOL(kernel_thread); | 38 | EXPORT_SYMBOL(kernel_thread); |
39 | 39 | ||
40 | /* Networking helper routines. */ | 40 | /* Networking helper routines. */ |
41 | EXPORT_SYMBOL(csum_partial_copy); | 41 | EXPORT_SYMBOL(csum_partial_copy_nocheck); |
42 | 42 | ||
43 | /* The following are special because they're not called | 43 | /* The following are special because they're not called |
44 | explicitly (the C compiler generates them). Fortunately, | 44 | explicitly (the C compiler generates them). Fortunately, |
diff --git a/arch/m68knommu/lib/checksum.c b/arch/m68knommu/lib/checksum.c index 7bec6fdee34b..269d83bfbbe1 100644 --- a/arch/m68knommu/lib/checksum.c +++ b/arch/m68knommu/lib/checksum.c | |||
@@ -96,9 +96,9 @@ out: | |||
96 | * This is a version of ip_compute_csum() optimized for IP headers, | 96 | * This is a version of ip_compute_csum() optimized for IP headers, |
97 | * which always checksum on 4 octet boundaries. | 97 | * which always checksum on 4 octet boundaries. |
98 | */ | 98 | */ |
99 | unsigned short ip_fast_csum(unsigned char * iph, unsigned int ihl) | 99 | __sum16 ip_fast_csum(const void *iph, unsigned int ihl) |
100 | { | 100 | { |
101 | return ~do_csum(iph,ihl*4); | 101 | return (__force __sum16)~do_csum(iph,ihl*4); |
102 | } | 102 | } |
103 | 103 | ||
104 | /* | 104 | /* |
@@ -113,15 +113,15 @@ unsigned short ip_fast_csum(unsigned char * iph, unsigned int ihl) | |||
113 | * | 113 | * |
114 | * it's best to have buff aligned on a 32-bit boundary | 114 | * it's best to have buff aligned on a 32-bit boundary |
115 | */ | 115 | */ |
116 | unsigned int csum_partial(const unsigned char * buff, int len, unsigned int sum) | 116 | __wsum csum_partial(const void *buff, int len, __wsum sum) |
117 | { | 117 | { |
118 | unsigned int result = do_csum(buff, len); | 118 | unsigned int result = do_csum(buff, len); |
119 | 119 | ||
120 | /* add in old sum, and carry.. */ | 120 | /* add in old sum, and carry.. */ |
121 | result += sum; | 121 | result += (__force u32)sum; |
122 | if (sum > result) | 122 | if ((__force u32)sum > result) |
123 | result += 1; | 123 | result += 1; |
124 | return result; | 124 | return (__force __wsum)result; |
125 | } | 125 | } |
126 | 126 | ||
127 | EXPORT_SYMBOL(csum_partial); | 127 | EXPORT_SYMBOL(csum_partial); |
@@ -130,21 +130,21 @@ EXPORT_SYMBOL(csum_partial); | |||
130 | * this routine is used for miscellaneous IP-like checksums, mainly | 130 | * this routine is used for miscellaneous IP-like checksums, mainly |
131 | * in icmp.c | 131 | * in icmp.c |
132 | */ | 132 | */ |
133 | unsigned short ip_compute_csum(const unsigned char * buff, int len) | 133 | __sum16 ip_compute_csum(const void *buff, int len) |
134 | { | 134 | { |
135 | return ~do_csum(buff,len); | 135 | return (__force __sum16)~do_csum(buff,len); |
136 | } | 136 | } |
137 | 137 | ||
138 | /* | 138 | /* |
139 | * copy from fs while checksumming, otherwise like csum_partial | 139 | * copy from fs while checksumming, otherwise like csum_partial |
140 | */ | 140 | */ |
141 | 141 | ||
142 | unsigned int | 142 | __wsum |
143 | csum_partial_copy_from_user(const unsigned char *src, unsigned char *dst, | 143 | csum_partial_copy_from_user(const void __user *src, void *dst, |
144 | int len, int sum, int *csum_err) | 144 | int len, __wsum sum, int *csum_err) |
145 | { | 145 | { |
146 | if (csum_err) *csum_err = 0; | 146 | if (csum_err) *csum_err = 0; |
147 | memcpy(dst, src, len); | 147 | memcpy(dst, (__force const void *)src, len); |
148 | return csum_partial(dst, len, sum); | 148 | return csum_partial(dst, len, sum); |
149 | } | 149 | } |
150 | 150 | ||
@@ -152,8 +152,8 @@ csum_partial_copy_from_user(const unsigned char *src, unsigned char *dst, | |||
152 | * copy from ds while checksumming, otherwise like csum_partial | 152 | * copy from ds while checksumming, otherwise like csum_partial |
153 | */ | 153 | */ |
154 | 154 | ||
155 | unsigned int | 155 | __wsum |
156 | csum_partial_copy(const unsigned char *src, unsigned char *dst, int len, int sum) | 156 | csum_partial_copy_nocheck(const void *src, void *dst, int len, __wsum sum) |
157 | { | 157 | { |
158 | memcpy(dst, src, len); | 158 | memcpy(dst, src, len); |
159 | return csum_partial(dst, len, sum); | 159 | return csum_partial(dst, len, sum); |
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 1443024b1c7c..27f83e642968 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig | |||
@@ -266,8 +266,8 @@ config MIPS_MALTA | |||
266 | select BOOT_ELF32 | 266 | select BOOT_ELF32 |
267 | select HAVE_STD_PC_SERIAL_PORT | 267 | select HAVE_STD_PC_SERIAL_PORT |
268 | select DMA_NONCOHERENT | 268 | select DMA_NONCOHERENT |
269 | select IRQ_CPU | ||
270 | select GENERIC_ISA_DMA | 269 | select GENERIC_ISA_DMA |
270 | select IRQ_CPU | ||
271 | select HW_HAS_PCI | 271 | select HW_HAS_PCI |
272 | select I8259 | 272 | select I8259 |
273 | select MIPS_BOARDS_GEN | 273 | select MIPS_BOARDS_GEN |
@@ -534,7 +534,7 @@ config SGI_IP22 | |||
534 | select HW_HAS_EISA | 534 | select HW_HAS_EISA |
535 | select IP22_CPU_SCACHE | 535 | select IP22_CPU_SCACHE |
536 | select IRQ_CPU | 536 | select IRQ_CPU |
537 | select NO_ISA if ISA | 537 | select GENERIC_ISA_DMA_SUPPORT_BROKEN |
538 | select SWAP_IO_SPACE | 538 | select SWAP_IO_SPACE |
539 | select SYS_HAS_CPU_R4X00 | 539 | select SYS_HAS_CPU_R4X00 |
540 | select SYS_HAS_CPU_R5000 | 540 | select SYS_HAS_CPU_R5000 |
@@ -766,6 +766,23 @@ config TOSHIBA_RBTX4938 | |||
766 | 766 | ||
767 | endchoice | 767 | endchoice |
768 | 768 | ||
769 | config KEXEC | ||
770 | bool "Kexec system call (EXPERIMENTAL)" | ||
771 | depends on EXPERIMENTAL | ||
772 | help | ||
773 | kexec is a system call that implements the ability to shutdown your | ||
774 | current kernel, and to start another kernel. It is like a reboot | ||
775 | but it is indepedent of the system firmware. And like a reboot | ||
776 | you can start any kernel with it, not just Linux. | ||
777 | |||
778 | The name comes from the similiarity to the exec system call. | ||
779 | |||
780 | It is an ongoing process to be certain the hardware in a machine | ||
781 | is properly shutdown, so do not be surprised if this code does not | ||
782 | initially work for you. It may help to enable device hotplugging | ||
783 | support. As of this writing the exact hardware interface is | ||
784 | strongly in flux, so no good recommendation can be made. | ||
785 | |||
769 | source "arch/mips/ddb5xxx/Kconfig" | 786 | source "arch/mips/ddb5xxx/Kconfig" |
770 | source "arch/mips/gt64120/ev64120/Kconfig" | 787 | source "arch/mips/gt64120/ev64120/Kconfig" |
771 | source "arch/mips/jazz/Kconfig" | 788 | source "arch/mips/jazz/Kconfig" |
@@ -864,8 +881,11 @@ config MIPS_NILE4 | |||
864 | config MIPS_DISABLE_OBSOLETE_IDE | 881 | config MIPS_DISABLE_OBSOLETE_IDE |
865 | bool | 882 | bool |
866 | 883 | ||
884 | config GENERIC_ISA_DMA_SUPPORT_BROKEN | ||
885 | bool | ||
886 | |||
867 | # | 887 | # |
868 | # Endianess selection. Suffiently obscure so many users don't know what to | 888 | # Endianess selection. Sufficiently obscure so many users don't know what to |
869 | # answer,so we try hard to limit the available choices. Also the use of a | 889 | # answer,so we try hard to limit the available choices. Also the use of a |
870 | # choice statement should be more obvious to the user. | 890 | # choice statement should be more obvious to the user. |
871 | # | 891 | # |
@@ -874,7 +894,7 @@ choice | |||
874 | help | 894 | help |
875 | Some MIPS machines can be configured for either little or big endian | 895 | Some MIPS machines can be configured for either little or big endian |
876 | byte order. These modes require different kernels and a different | 896 | byte order. These modes require different kernels and a different |
877 | Linux distribution. In general there is one prefered byteorder for a | 897 | Linux distribution. In general there is one preferred byteorder for a |
878 | particular system but some systems are just as commonly used in the | 898 | particular system but some systems are just as commonly used in the |
879 | one or the other endianess. | 899 | one or the other endianess. |
880 | 900 | ||
@@ -1835,13 +1855,11 @@ source "drivers/pci/Kconfig" | |||
1835 | config ISA | 1855 | config ISA |
1836 | bool | 1856 | bool |
1837 | 1857 | ||
1838 | config NO_ISA | ||
1839 | bool | ||
1840 | |||
1841 | config EISA | 1858 | config EISA |
1842 | bool "EISA support" | 1859 | bool "EISA support" |
1843 | depends on HW_HAS_EISA | 1860 | depends on HW_HAS_EISA |
1844 | select ISA | 1861 | select ISA |
1862 | select GENERIC_ISA_DMA | ||
1845 | ---help--- | 1863 | ---help--- |
1846 | The Extended Industry Standard Architecture (EISA) bus was | 1864 | The Extended Industry Standard Architecture (EISA) bus was |
1847 | developed as an open alternative to the IBM MicroChannel bus. | 1865 | developed as an open alternative to the IBM MicroChannel bus. |
diff --git a/arch/mips/Makefile b/arch/mips/Makefile index d580d46f967b..641aa30b3638 100644 --- a/arch/mips/Makefile +++ b/arch/mips/Makefile | |||
@@ -63,9 +63,7 @@ cflags-y += -mabi=64 | |||
63 | ifdef CONFIG_BUILD_ELF64 | 63 | ifdef CONFIG_BUILD_ELF64 |
64 | cflags-y += $(call cc-option,-mno-explicit-relocs) | 64 | cflags-y += $(call cc-option,-mno-explicit-relocs) |
65 | else | 65 | else |
66 | # -msym32 can not be used for modules since they are loaded into XKSEG | 66 | cflags-y += $(call cc-option,-msym32) |
67 | CFLAGS_MODULE += $(call cc-option,-mno-explicit-relocs) | ||
68 | CFLAGS_KERNEL += $(call cc-option,-msym32) | ||
69 | endif | 67 | endif |
70 | endif | 68 | endif |
71 | 69 | ||
diff --git a/arch/mips/au1000/common/irq.c b/arch/mips/au1000/common/irq.c index 2abe132bb07d..9cf7b6715836 100644 --- a/arch/mips/au1000/common/irq.c +++ b/arch/mips/au1000/common/irq.c | |||
@@ -70,7 +70,6 @@ extern irq_cpustat_t irq_stat [NR_CPUS]; | |||
70 | extern void mips_timer_interrupt(void); | 70 | extern void mips_timer_interrupt(void); |
71 | 71 | ||
72 | static void setup_local_irq(unsigned int irq, int type, int int_req); | 72 | static void setup_local_irq(unsigned int irq, int type, int int_req); |
73 | static unsigned int startup_irq(unsigned int irq); | ||
74 | static void end_irq(unsigned int irq_nr); | 73 | static void end_irq(unsigned int irq_nr); |
75 | static inline void mask_and_ack_level_irq(unsigned int irq_nr); | 74 | static inline void mask_and_ack_level_irq(unsigned int irq_nr); |
76 | static inline void mask_and_ack_rise_edge_irq(unsigned int irq_nr); | 75 | static inline void mask_and_ack_rise_edge_irq(unsigned int irq_nr); |
@@ -84,20 +83,6 @@ void (*board_init_irq)(void); | |||
84 | static DEFINE_SPINLOCK(irq_lock); | 83 | static DEFINE_SPINLOCK(irq_lock); |
85 | 84 | ||
86 | 85 | ||
87 | static unsigned int startup_irq(unsigned int irq_nr) | ||
88 | { | ||
89 | local_enable_irq(irq_nr); | ||
90 | return 0; | ||
91 | } | ||
92 | |||
93 | |||
94 | static void shutdown_irq(unsigned int irq_nr) | ||
95 | { | ||
96 | local_disable_irq(irq_nr); | ||
97 | return; | ||
98 | } | ||
99 | |||
100 | |||
101 | inline void local_enable_irq(unsigned int irq_nr) | 86 | inline void local_enable_irq(unsigned int irq_nr) |
102 | { | 87 | { |
103 | if (irq_nr > AU1000_LAST_INTC0_INT) { | 88 | if (irq_nr > AU1000_LAST_INTC0_INT) { |
@@ -249,41 +234,37 @@ void restore_local_and_enable(int controller, unsigned long mask) | |||
249 | 234 | ||
250 | static struct irq_chip rise_edge_irq_type = { | 235 | static struct irq_chip rise_edge_irq_type = { |
251 | .typename = "Au1000 Rise Edge", | 236 | .typename = "Au1000 Rise Edge", |
252 | .startup = startup_irq, | ||
253 | .shutdown = shutdown_irq, | ||
254 | .enable = local_enable_irq, | ||
255 | .disable = local_disable_irq, | ||
256 | .ack = mask_and_ack_rise_edge_irq, | 237 | .ack = mask_and_ack_rise_edge_irq, |
238 | .mask = local_disable_irq, | ||
239 | .mask_ack = mask_and_ack_rise_edge_irq, | ||
240 | .unmask = local_enable_irq, | ||
257 | .end = end_irq, | 241 | .end = end_irq, |
258 | }; | 242 | }; |
259 | 243 | ||
260 | static struct irq_chip fall_edge_irq_type = { | 244 | static struct irq_chip fall_edge_irq_type = { |
261 | .typename = "Au1000 Fall Edge", | 245 | .typename = "Au1000 Fall Edge", |
262 | .startup = startup_irq, | ||
263 | .shutdown = shutdown_irq, | ||
264 | .enable = local_enable_irq, | ||
265 | .disable = local_disable_irq, | ||
266 | .ack = mask_and_ack_fall_edge_irq, | 246 | .ack = mask_and_ack_fall_edge_irq, |
247 | .mask = local_disable_irq, | ||
248 | .mask_ack = mask_and_ack_fall_edge_irq, | ||
249 | .unmask = local_enable_irq, | ||
267 | .end = end_irq, | 250 | .end = end_irq, |
268 | }; | 251 | }; |
269 | 252 | ||
270 | static struct irq_chip either_edge_irq_type = { | 253 | static struct irq_chip either_edge_irq_type = { |
271 | .typename = "Au1000 Rise or Fall Edge", | 254 | .typename = "Au1000 Rise or Fall Edge", |
272 | .startup = startup_irq, | ||
273 | .shutdown = shutdown_irq, | ||
274 | .enable = local_enable_irq, | ||
275 | .disable = local_disable_irq, | ||
276 | .ack = mask_and_ack_either_edge_irq, | 255 | .ack = mask_and_ack_either_edge_irq, |
256 | .mask = local_disable_irq, | ||
257 | .mask_ack = mask_and_ack_either_edge_irq, | ||
258 | .unmask = local_enable_irq, | ||
277 | .end = end_irq, | 259 | .end = end_irq, |
278 | }; | 260 | }; |
279 | 261 | ||
280 | static struct irq_chip level_irq_type = { | 262 | static struct irq_chip level_irq_type = { |
281 | .typename = "Au1000 Level", | 263 | .typename = "Au1000 Level", |
282 | .startup = startup_irq, | ||
283 | .shutdown = shutdown_irq, | ||
284 | .enable = local_enable_irq, | ||
285 | .disable = local_disable_irq, | ||
286 | .ack = mask_and_ack_level_irq, | 264 | .ack = mask_and_ack_level_irq, |
265 | .mask = local_disable_irq, | ||
266 | .mask_ack = mask_and_ack_level_irq, | ||
267 | .unmask = local_enable_irq, | ||
287 | .end = end_irq, | 268 | .end = end_irq, |
288 | }; | 269 | }; |
289 | 270 | ||
@@ -328,31 +309,31 @@ static void setup_local_irq(unsigned int irq_nr, int type, int int_req) | |||
328 | au_writel(1<<(irq_nr-32), IC1_CFG2CLR); | 309 | au_writel(1<<(irq_nr-32), IC1_CFG2CLR); |
329 | au_writel(1<<(irq_nr-32), IC1_CFG1CLR); | 310 | au_writel(1<<(irq_nr-32), IC1_CFG1CLR); |
330 | au_writel(1<<(irq_nr-32), IC1_CFG0SET); | 311 | au_writel(1<<(irq_nr-32), IC1_CFG0SET); |
331 | irq_desc[irq_nr].chip = &rise_edge_irq_type; | 312 | set_irq_chip(irq_nr, &rise_edge_irq_type); |
332 | break; | 313 | break; |
333 | case INTC_INT_FALL_EDGE: /* 0:1:0 */ | 314 | case INTC_INT_FALL_EDGE: /* 0:1:0 */ |
334 | au_writel(1<<(irq_nr-32), IC1_CFG2CLR); | 315 | au_writel(1<<(irq_nr-32), IC1_CFG2CLR); |
335 | au_writel(1<<(irq_nr-32), IC1_CFG1SET); | 316 | au_writel(1<<(irq_nr-32), IC1_CFG1SET); |
336 | au_writel(1<<(irq_nr-32), IC1_CFG0CLR); | 317 | au_writel(1<<(irq_nr-32), IC1_CFG0CLR); |
337 | irq_desc[irq_nr].chip = &fall_edge_irq_type; | 318 | set_irq_chip(irq_nr, &fall_edge_irq_type); |
338 | break; | 319 | break; |
339 | case INTC_INT_RISE_AND_FALL_EDGE: /* 0:1:1 */ | 320 | case INTC_INT_RISE_AND_FALL_EDGE: /* 0:1:1 */ |
340 | au_writel(1<<(irq_nr-32), IC1_CFG2CLR); | 321 | au_writel(1<<(irq_nr-32), IC1_CFG2CLR); |
341 | au_writel(1<<(irq_nr-32), IC1_CFG1SET); | 322 | au_writel(1<<(irq_nr-32), IC1_CFG1SET); |
342 | au_writel(1<<(irq_nr-32), IC1_CFG0SET); | 323 | au_writel(1<<(irq_nr-32), IC1_CFG0SET); |
343 | irq_desc[irq_nr].chip = &either_edge_irq_type; | 324 | set_irq_chip(irq_nr, &either_edge_irq_type); |
344 | break; | 325 | break; |
345 | case INTC_INT_HIGH_LEVEL: /* 1:0:1 */ | 326 | case INTC_INT_HIGH_LEVEL: /* 1:0:1 */ |
346 | au_writel(1<<(irq_nr-32), IC1_CFG2SET); | 327 | au_writel(1<<(irq_nr-32), IC1_CFG2SET); |
347 | au_writel(1<<(irq_nr-32), IC1_CFG1CLR); | 328 | au_writel(1<<(irq_nr-32), IC1_CFG1CLR); |
348 | au_writel(1<<(irq_nr-32), IC1_CFG0SET); | 329 | au_writel(1<<(irq_nr-32), IC1_CFG0SET); |
349 | irq_desc[irq_nr].chip = &level_irq_type; | 330 | set_irq_chip(irq_nr, &level_irq_type); |
350 | break; | 331 | break; |
351 | case INTC_INT_LOW_LEVEL: /* 1:1:0 */ | 332 | case INTC_INT_LOW_LEVEL: /* 1:1:0 */ |
352 | au_writel(1<<(irq_nr-32), IC1_CFG2SET); | 333 | au_writel(1<<(irq_nr-32), IC1_CFG2SET); |
353 | au_writel(1<<(irq_nr-32), IC1_CFG1SET); | 334 | au_writel(1<<(irq_nr-32), IC1_CFG1SET); |
354 | au_writel(1<<(irq_nr-32), IC1_CFG0CLR); | 335 | au_writel(1<<(irq_nr-32), IC1_CFG0CLR); |
355 | irq_desc[irq_nr].chip = &level_irq_type; | 336 | set_irq_chip(irq_nr, &level_irq_type); |
356 | break; | 337 | break; |
357 | case INTC_INT_DISABLED: /* 0:0:0 */ | 338 | case INTC_INT_DISABLED: /* 0:0:0 */ |
358 | au_writel(1<<(irq_nr-32), IC1_CFG0CLR); | 339 | au_writel(1<<(irq_nr-32), IC1_CFG0CLR); |
@@ -380,31 +361,31 @@ static void setup_local_irq(unsigned int irq_nr, int type, int int_req) | |||
380 | au_writel(1<<irq_nr, IC0_CFG2CLR); | 361 | au_writel(1<<irq_nr, IC0_CFG2CLR); |
381 | au_writel(1<<irq_nr, IC0_CFG1CLR); | 362 | au_writel(1<<irq_nr, IC0_CFG1CLR); |
382 | au_writel(1<<irq_nr, IC0_CFG0SET); | 363 | au_writel(1<<irq_nr, IC0_CFG0SET); |
383 | irq_desc[irq_nr].chip = &rise_edge_irq_type; | 364 | set_irq_chip(irq_nr, &rise_edge_irq_type); |
384 | break; | 365 | break; |
385 | case INTC_INT_FALL_EDGE: /* 0:1:0 */ | 366 | case INTC_INT_FALL_EDGE: /* 0:1:0 */ |
386 | au_writel(1<<irq_nr, IC0_CFG2CLR); | 367 | au_writel(1<<irq_nr, IC0_CFG2CLR); |
387 | au_writel(1<<irq_nr, IC0_CFG1SET); | 368 | au_writel(1<<irq_nr, IC0_CFG1SET); |
388 | au_writel(1<<irq_nr, IC0_CFG0CLR); | 369 | au_writel(1<<irq_nr, IC0_CFG0CLR); |
389 | irq_desc[irq_nr].chip = &fall_edge_irq_type; | 370 | set_irq_chip(irq_nr, &fall_edge_irq_type); |
390 | break; | 371 | break; |
391 | case INTC_INT_RISE_AND_FALL_EDGE: /* 0:1:1 */ | 372 | case INTC_INT_RISE_AND_FALL_EDGE: /* 0:1:1 */ |
392 | au_writel(1<<irq_nr, IC0_CFG2CLR); | 373 | au_writel(1<<irq_nr, IC0_CFG2CLR); |
393 | au_writel(1<<irq_nr, IC0_CFG1SET); | 374 | au_writel(1<<irq_nr, IC0_CFG1SET); |
394 | au_writel(1<<irq_nr, IC0_CFG0SET); | 375 | au_writel(1<<irq_nr, IC0_CFG0SET); |
395 | irq_desc[irq_nr].chip = &either_edge_irq_type; | 376 | set_irq_chip(irq_nr, &either_edge_irq_type); |
396 | break; | 377 | break; |
397 | case INTC_INT_HIGH_LEVEL: /* 1:0:1 */ | 378 | case INTC_INT_HIGH_LEVEL: /* 1:0:1 */ |
398 | au_writel(1<<irq_nr, IC0_CFG2SET); | 379 | au_writel(1<<irq_nr, IC0_CFG2SET); |
399 | au_writel(1<<irq_nr, IC0_CFG1CLR); | 380 | au_writel(1<<irq_nr, IC0_CFG1CLR); |
400 | au_writel(1<<irq_nr, IC0_CFG0SET); | 381 | au_writel(1<<irq_nr, IC0_CFG0SET); |
401 | irq_desc[irq_nr].chip = &level_irq_type; | 382 | set_irq_chip(irq_nr, &level_irq_type); |
402 | break; | 383 | break; |
403 | case INTC_INT_LOW_LEVEL: /* 1:1:0 */ | 384 | case INTC_INT_LOW_LEVEL: /* 1:1:0 */ |
404 | au_writel(1<<irq_nr, IC0_CFG2SET); | 385 | au_writel(1<<irq_nr, IC0_CFG2SET); |
405 | au_writel(1<<irq_nr, IC0_CFG1SET); | 386 | au_writel(1<<irq_nr, IC0_CFG1SET); |
406 | au_writel(1<<irq_nr, IC0_CFG0CLR); | 387 | au_writel(1<<irq_nr, IC0_CFG0CLR); |
407 | irq_desc[irq_nr].chip = &level_irq_type; | 388 | set_irq_chip(irq_nr, &level_irq_type); |
408 | break; | 389 | break; |
409 | case INTC_INT_DISABLED: /* 0:0:0 */ | 390 | case INTC_INT_DISABLED: /* 0:0:0 */ |
410 | au_writel(1<<irq_nr, IC0_CFG0CLR); | 391 | au_writel(1<<irq_nr, IC0_CFG0CLR); |
diff --git a/arch/mips/au1000/pb1200/board_setup.c b/arch/mips/au1000/pb1200/board_setup.c index 8b953b9fc25c..043302b7fe58 100644 --- a/arch/mips/au1000/pb1200/board_setup.c +++ b/arch/mips/au1000/pb1200/board_setup.c | |||
@@ -55,7 +55,7 @@ | |||
55 | #endif | 55 | #endif |
56 | 56 | ||
57 | extern void _board_init_irq(void); | 57 | extern void _board_init_irq(void); |
58 | extern void (*board_init_irq)(void); | 58 | extern void (*board_init_irq)(void); |
59 | 59 | ||
60 | void board_reset (void) | 60 | void board_reset (void) |
61 | { | 61 | { |
@@ -151,11 +151,7 @@ void __init board_setup(void) | |||
151 | #endif | 151 | #endif |
152 | 152 | ||
153 | /* Setup Pb1200 External Interrupt Controller */ | 153 | /* Setup Pb1200 External Interrupt Controller */ |
154 | { | 154 | board_init_irq = _board_init_irq; |
155 | extern void (*board_init_irq)(void); | ||
156 | extern void _board_init_irq(void); | ||
157 | board_init_irq = _board_init_irq; | ||
158 | } | ||
159 | } | 155 | } |
160 | 156 | ||
161 | int | 157 | int |
diff --git a/arch/mips/cobalt/irq.c b/arch/mips/cobalt/irq.c index 82e569d5b02c..4c46f0e73783 100644 --- a/arch/mips/cobalt/irq.c +++ b/arch/mips/cobalt/irq.c | |||
@@ -45,25 +45,22 @@ static inline void galileo_irq(void) | |||
45 | { | 45 | { |
46 | unsigned int mask, pending, devfn; | 46 | unsigned int mask, pending, devfn; |
47 | 47 | ||
48 | mask = GALILEO_INL(GT_INTRMASK_OFS); | 48 | mask = GT_READ(GT_INTRMASK_OFS); |
49 | pending = GALILEO_INL(GT_INTRCAUSE_OFS) & mask; | 49 | pending = GT_READ(GT_INTRCAUSE_OFS) & mask; |
50 | 50 | ||
51 | if (pending & GALILEO_INTR_T0EXP) { | 51 | if (pending & GT_INTR_T0EXP_MSK) { |
52 | 52 | GT_WRITE(GT_INTRCAUSE_OFS, ~GT_INTR_T0EXP_MSK); | |
53 | GALILEO_OUTL(~GALILEO_INTR_T0EXP, GT_INTRCAUSE_OFS); | ||
54 | do_IRQ(COBALT_GALILEO_IRQ); | 53 | do_IRQ(COBALT_GALILEO_IRQ); |
55 | 54 | } else if (pending & GT_INTR_RETRYCTR0_MSK) { | |
56 | } else if (pending & GALILEO_INTR_RETRY_CTR) { | 55 | devfn = GT_READ(GT_PCI0_CFGADDR_OFS) >> 8; |
57 | 56 | GT_WRITE(GT_INTRCAUSE_OFS, ~GT_INTR_RETRYCTR0_MSK); | |
58 | devfn = GALILEO_INL(GT_PCI0_CFGADDR_OFS) >> 8; | 57 | printk(KERN_WARNING |
59 | GALILEO_OUTL(~GALILEO_INTR_RETRY_CTR, GT_INTRCAUSE_OFS); | 58 | "Galileo: PCI retry count exceeded (%02x.%u)\n", |
60 | printk(KERN_WARNING "Galileo: PCI retry count exceeded (%02x.%u)\n", | 59 | PCI_SLOT(devfn), PCI_FUNC(devfn)); |
61 | PCI_SLOT(devfn), PCI_FUNC(devfn)); | ||
62 | |||
63 | } else { | 60 | } else { |
64 | 61 | GT_WRITE(GT_INTRMASK_OFS, mask & ~pending); | |
65 | GALILEO_OUTL(mask & ~pending, GT_INTRMASK_OFS); | 62 | printk(KERN_WARNING |
66 | printk(KERN_WARNING "Galileo: masking unexpected interrupt %08x\n", pending); | 63 | "Galileo: masking unexpected interrupt %08x\n", pending); |
67 | } | 64 | } |
68 | } | 65 | } |
69 | 66 | ||
@@ -104,7 +101,7 @@ void __init arch_init_irq(void) | |||
104 | * Mask all Galileo interrupts. The Galileo | 101 | * Mask all Galileo interrupts. The Galileo |
105 | * handler is set in cobalt_timer_setup() | 102 | * handler is set in cobalt_timer_setup() |
106 | */ | 103 | */ |
107 | GALILEO_OUTL(0, GT_INTRMASK_OFS); | 104 | GT_WRITE(GT_INTRMASK_OFS, 0); |
108 | 105 | ||
109 | init_i8259_irqs(); /* 0 ... 15 */ | 106 | init_i8259_irqs(); /* 0 ... 15 */ |
110 | mips_cpu_irq_init(COBALT_CPU_IRQ); /* 16 ... 23 */ | 107 | mips_cpu_irq_init(COBALT_CPU_IRQ); /* 16 ... 23 */ |
diff --git a/arch/mips/cobalt/setup.c b/arch/mips/cobalt/setup.c index bf9dc72b9720..e8f0f20b852d 100644 --- a/arch/mips/cobalt/setup.c +++ b/arch/mips/cobalt/setup.c | |||
@@ -51,23 +51,23 @@ const char *get_system_type(void) | |||
51 | void __init plat_timer_setup(struct irqaction *irq) | 51 | void __init plat_timer_setup(struct irqaction *irq) |
52 | { | 52 | { |
53 | /* Load timer value for HZ (TCLK is 50MHz) */ | 53 | /* Load timer value for HZ (TCLK is 50MHz) */ |
54 | GALILEO_OUTL(50*1000*1000 / HZ, GT_TC0_OFS); | 54 | GT_WRITE(GT_TC0_OFS, 50*1000*1000 / HZ); |
55 | 55 | ||
56 | /* Enable timer */ | 56 | /* Enable timer */ |
57 | GALILEO_OUTL(GALILEO_ENTC0 | GALILEO_SELTC0, GT_TC_CONTROL_OFS); | 57 | GT_WRITE(GT_TC_CONTROL_OFS, GT_TC_CONTROL_ENTC0_MSK | GT_TC_CONTROL_SELTC0_MSK); |
58 | 58 | ||
59 | /* Register interrupt */ | 59 | /* Register interrupt */ |
60 | setup_irq(COBALT_GALILEO_IRQ, irq); | 60 | setup_irq(COBALT_GALILEO_IRQ, irq); |
61 | 61 | ||
62 | /* Enable interrupt */ | 62 | /* Enable interrupt */ |
63 | GALILEO_OUTL(GALILEO_INTR_T0EXP | GALILEO_INL(GT_INTRMASK_OFS), GT_INTRMASK_OFS); | 63 | GT_WRITE(GT_INTRMASK_OFS, GT_INTR_T0EXP_MSK | GT_READ(GT_INTRMASK_OFS)); |
64 | } | 64 | } |
65 | 65 | ||
66 | extern struct pci_ops gt64111_pci_ops; | 66 | extern struct pci_ops gt64111_pci_ops; |
67 | 67 | ||
68 | static struct resource cobalt_mem_resource = { | 68 | static struct resource cobalt_mem_resource = { |
69 | .start = GT64111_MEM_BASE, | 69 | .start = GT_DEF_PCI0_MEM0_BASE, |
70 | .end = GT64111_MEM_END, | 70 | .end = GT_DEF_PCI0_MEM0_BASE + GT_DEF_PCI0_MEM0_SIZE - 1, |
71 | .name = "PCI memory", | 71 | .name = "PCI memory", |
72 | .flags = IORESOURCE_MEM | 72 | .flags = IORESOURCE_MEM |
73 | }; | 73 | }; |
@@ -115,7 +115,7 @@ static struct pci_controller cobalt_pci_controller = { | |||
115 | .mem_resource = &cobalt_mem_resource, | 115 | .mem_resource = &cobalt_mem_resource, |
116 | .mem_offset = 0, | 116 | .mem_offset = 0, |
117 | .io_resource = &cobalt_io_resource, | 117 | .io_resource = &cobalt_io_resource, |
118 | .io_offset = 0 - GT64111_IO_BASE | 118 | .io_offset = 0 - GT_DEF_PCI0_IO_BASE, |
119 | }; | 119 | }; |
120 | 120 | ||
121 | void __init plat_mem_setup(void) | 121 | void __init plat_mem_setup(void) |
@@ -128,7 +128,7 @@ void __init plat_mem_setup(void) | |||
128 | _machine_halt = cobalt_machine_halt; | 128 | _machine_halt = cobalt_machine_halt; |
129 | pm_power_off = cobalt_machine_power_off; | 129 | pm_power_off = cobalt_machine_power_off; |
130 | 130 | ||
131 | set_io_port_base(CKSEG1ADDR(GT64111_IO_BASE)); | 131 | set_io_port_base(CKSEG1ADDR(GT_DEF_PCI0_IO_BASE)); |
132 | 132 | ||
133 | /* I/O port resource must include UART and LCD/buttons */ | 133 | /* I/O port resource must include UART and LCD/buttons */ |
134 | ioport_resource.end = 0x0fffffff; | 134 | ioport_resource.end = 0x0fffffff; |
@@ -139,7 +139,7 @@ void __init plat_mem_setup(void) | |||
139 | 139 | ||
140 | /* Read the cobalt id register out of the PCI config space */ | 140 | /* Read the cobalt id register out of the PCI config space */ |
141 | PCI_CFG_SET(devfn, (VIA_COBALT_BRD_ID_REG & ~0x3)); | 141 | PCI_CFG_SET(devfn, (VIA_COBALT_BRD_ID_REG & ~0x3)); |
142 | cobalt_board_id = GALILEO_INL(GT_PCI0_CFGDATA_OFS); | 142 | cobalt_board_id = GT_READ(GT_PCI0_CFGDATA_OFS); |
143 | cobalt_board_id >>= ((VIA_COBALT_BRD_ID_REG & 3) * 8); | 143 | cobalt_board_id >>= ((VIA_COBALT_BRD_ID_REG & 3) * 8); |
144 | cobalt_board_id = VIA_COBALT_BRD_REG_to_ID(cobalt_board_id); | 144 | cobalt_board_id = VIA_COBALT_BRD_REG_to_ID(cobalt_board_id); |
145 | 145 | ||
diff --git a/arch/mips/ddb5xxx/ddb5477/irq_5477.c b/arch/mips/ddb5xxx/ddb5477/irq_5477.c index ba52705a2738..96249aa5df5d 100644 --- a/arch/mips/ddb5xxx/ddb5477/irq_5477.c +++ b/arch/mips/ddb5xxx/ddb5477/irq_5477.c | |||
@@ -53,14 +53,6 @@ vrc5477_irq_disable(unsigned int irq) | |||
53 | ll_vrc5477_irq_disable(irq - vrc5477_irq_base); | 53 | ll_vrc5477_irq_disable(irq - vrc5477_irq_base); |
54 | } | 54 | } |
55 | 55 | ||
56 | static unsigned int vrc5477_irq_startup(unsigned int irq) | ||
57 | { | ||
58 | vrc5477_irq_enable(irq); | ||
59 | return 0; | ||
60 | } | ||
61 | |||
62 | #define vrc5477_irq_shutdown vrc5477_irq_disable | ||
63 | |||
64 | static void | 56 | static void |
65 | vrc5477_irq_ack(unsigned int irq) | 57 | vrc5477_irq_ack(unsigned int irq) |
66 | { | 58 | { |
@@ -91,11 +83,10 @@ vrc5477_irq_end(unsigned int irq) | |||
91 | 83 | ||
92 | struct irq_chip vrc5477_irq_controller = { | 84 | struct irq_chip vrc5477_irq_controller = { |
93 | .typename = "vrc5477_irq", | 85 | .typename = "vrc5477_irq", |
94 | .startup = vrc5477_irq_startup, | ||
95 | .shutdown = vrc5477_irq_shutdown, | ||
96 | .enable = vrc5477_irq_enable, | ||
97 | .disable = vrc5477_irq_disable, | ||
98 | .ack = vrc5477_irq_ack, | 86 | .ack = vrc5477_irq_ack, |
87 | .mask = vrc5477_irq_disable, | ||
88 | .mask_ack = vrc5477_irq_ack, | ||
89 | .unmask = vrc5477_irq_enable, | ||
99 | .end = vrc5477_irq_end | 90 | .end = vrc5477_irq_end |
100 | }; | 91 | }; |
101 | 92 | ||
@@ -103,12 +94,8 @@ void __init vrc5477_irq_init(u32 irq_base) | |||
103 | { | 94 | { |
104 | u32 i; | 95 | u32 i; |
105 | 96 | ||
106 | for (i= irq_base; i< irq_base+ NUM_5477_IRQ; i++) { | 97 | for (i= irq_base; i< irq_base+ NUM_5477_IRQ; i++) |
107 | irq_desc[i].status = IRQ_DISABLED; | 98 | set_irq_chip(i, &vrc5477_irq_controller); |
108 | irq_desc[i].action = NULL; | ||
109 | irq_desc[i].depth = 1; | ||
110 | irq_desc[i].chip = &vrc5477_irq_controller; | ||
111 | } | ||
112 | 99 | ||
113 | vrc5477_irq_base = irq_base; | 100 | vrc5477_irq_base = irq_base; |
114 | } | 101 | } |
diff --git a/arch/mips/dec/ecc-berr.c b/arch/mips/dec/ecc-berr.c index 3e374d05978f..c8430c07355e 100644 --- a/arch/mips/dec/ecc-berr.c +++ b/arch/mips/dec/ecc-berr.c | |||
@@ -18,7 +18,6 @@ | |||
18 | #include <linux/interrupt.h> | 18 | #include <linux/interrupt.h> |
19 | #include <linux/kernel.h> | 19 | #include <linux/kernel.h> |
20 | #include <linux/sched.h> | 20 | #include <linux/sched.h> |
21 | #include <linux/spinlock.h> | ||
22 | #include <linux/types.h> | 21 | #include <linux/types.h> |
23 | 22 | ||
24 | #include <asm/addrspace.h> | 23 | #include <asm/addrspace.h> |
@@ -231,13 +230,10 @@ irqreturn_t dec_ecc_be_interrupt(int irq, void *dev_id) | |||
231 | static inline void dec_kn02_be_init(void) | 230 | static inline void dec_kn02_be_init(void) |
232 | { | 231 | { |
233 | volatile u32 *csr = (void *)CKSEG1ADDR(KN02_SLOT_BASE + KN02_CSR); | 232 | volatile u32 *csr = (void *)CKSEG1ADDR(KN02_SLOT_BASE + KN02_CSR); |
234 | unsigned long flags; | ||
235 | 233 | ||
236 | kn0x_erraddr = (void *)CKSEG1ADDR(KN02_SLOT_BASE + KN02_ERRADDR); | 234 | kn0x_erraddr = (void *)CKSEG1ADDR(KN02_SLOT_BASE + KN02_ERRADDR); |
237 | kn0x_chksyn = (void *)CKSEG1ADDR(KN02_SLOT_BASE + KN02_CHKSYN); | 235 | kn0x_chksyn = (void *)CKSEG1ADDR(KN02_SLOT_BASE + KN02_CHKSYN); |
238 | 236 | ||
239 | spin_lock_irqsave(&kn02_lock, flags); | ||
240 | |||
241 | /* Preset write-only bits of the Control Register cache. */ | 237 | /* Preset write-only bits of the Control Register cache. */ |
242 | cached_kn02_csr = *csr | KN02_CSR_LEDS; | 238 | cached_kn02_csr = *csr | KN02_CSR_LEDS; |
243 | 239 | ||
@@ -247,8 +243,6 @@ static inline void dec_kn02_be_init(void) | |||
247 | cached_kn02_csr |= KN02_CSR_CORRECT; | 243 | cached_kn02_csr |= KN02_CSR_CORRECT; |
248 | *csr = cached_kn02_csr; | 244 | *csr = cached_kn02_csr; |
249 | iob(); | 245 | iob(); |
250 | |||
251 | spin_unlock_irqrestore(&kn02_lock, flags); | ||
252 | } | 246 | } |
253 | 247 | ||
254 | static inline void dec_kn03_be_init(void) | 248 | static inline void dec_kn03_be_init(void) |
diff --git a/arch/mips/dec/int-handler.S b/arch/mips/dec/int-handler.S index 31dd47d1002d..b251ef864c33 100644 --- a/arch/mips/dec/int-handler.S +++ b/arch/mips/dec/int-handler.S | |||
@@ -267,7 +267,7 @@ handle_it: | |||
267 | LONG_L s0, TI_REGS($28) | 267 | LONG_L s0, TI_REGS($28) |
268 | LONG_S sp, TI_REGS($28) | 268 | LONG_S sp, TI_REGS($28) |
269 | PTR_LA ra, ret_from_irq | 269 | PTR_LA ra, ret_from_irq |
270 | j do_IRQ | 270 | j dec_irq_dispatch |
271 | nop | 271 | nop |
272 | 272 | ||
273 | #ifdef CONFIG_32BIT | 273 | #ifdef CONFIG_32BIT |
diff --git a/arch/mips/dec/ioasic-irq.c b/arch/mips/dec/ioasic-irq.c index 41cd2a96148b..269b22b34313 100644 --- a/arch/mips/dec/ioasic-irq.c +++ b/arch/mips/dec/ioasic-irq.c | |||
@@ -13,7 +13,6 @@ | |||
13 | 13 | ||
14 | #include <linux/init.h> | 14 | #include <linux/init.h> |
15 | #include <linux/irq.h> | 15 | #include <linux/irq.h> |
16 | #include <linux/spinlock.h> | ||
17 | #include <linux/types.h> | 16 | #include <linux/types.h> |
18 | 17 | ||
19 | #include <asm/dec/ioasic.h> | 18 | #include <asm/dec/ioasic.h> |
@@ -21,8 +20,6 @@ | |||
21 | #include <asm/dec/ioasic_ints.h> | 20 | #include <asm/dec/ioasic_ints.h> |
22 | 21 | ||
23 | 22 | ||
24 | static DEFINE_SPINLOCK(ioasic_lock); | ||
25 | |||
26 | static int ioasic_irq_base; | 23 | static int ioasic_irq_base; |
27 | 24 | ||
28 | 25 | ||
@@ -52,65 +49,31 @@ static inline void clear_ioasic_irq(unsigned int irq) | |||
52 | ioasic_write(IO_REG_SIR, sir); | 49 | ioasic_write(IO_REG_SIR, sir); |
53 | } | 50 | } |
54 | 51 | ||
55 | static inline void enable_ioasic_irq(unsigned int irq) | ||
56 | { | ||
57 | unsigned long flags; | ||
58 | |||
59 | spin_lock_irqsave(&ioasic_lock, flags); | ||
60 | unmask_ioasic_irq(irq); | ||
61 | spin_unlock_irqrestore(&ioasic_lock, flags); | ||
62 | } | ||
63 | |||
64 | static inline void disable_ioasic_irq(unsigned int irq) | ||
65 | { | ||
66 | unsigned long flags; | ||
67 | |||
68 | spin_lock_irqsave(&ioasic_lock, flags); | ||
69 | mask_ioasic_irq(irq); | ||
70 | spin_unlock_irqrestore(&ioasic_lock, flags); | ||
71 | } | ||
72 | |||
73 | |||
74 | static inline unsigned int startup_ioasic_irq(unsigned int irq) | ||
75 | { | ||
76 | enable_ioasic_irq(irq); | ||
77 | return 0; | ||
78 | } | ||
79 | |||
80 | #define shutdown_ioasic_irq disable_ioasic_irq | ||
81 | |||
82 | static inline void ack_ioasic_irq(unsigned int irq) | 52 | static inline void ack_ioasic_irq(unsigned int irq) |
83 | { | 53 | { |
84 | spin_lock(&ioasic_lock); | ||
85 | mask_ioasic_irq(irq); | 54 | mask_ioasic_irq(irq); |
86 | spin_unlock(&ioasic_lock); | ||
87 | fast_iob(); | 55 | fast_iob(); |
88 | } | 56 | } |
89 | 57 | ||
90 | static inline void end_ioasic_irq(unsigned int irq) | 58 | static inline void end_ioasic_irq(unsigned int irq) |
91 | { | 59 | { |
92 | if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) | 60 | if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) |
93 | enable_ioasic_irq(irq); | 61 | unmask_ioasic_irq(irq); |
94 | } | 62 | } |
95 | 63 | ||
96 | static struct irq_chip ioasic_irq_type = { | 64 | static struct irq_chip ioasic_irq_type = { |
97 | .typename = "IO-ASIC", | 65 | .typename = "IO-ASIC", |
98 | .startup = startup_ioasic_irq, | ||
99 | .shutdown = shutdown_ioasic_irq, | ||
100 | .enable = enable_ioasic_irq, | ||
101 | .disable = disable_ioasic_irq, | ||
102 | .ack = ack_ioasic_irq, | 66 | .ack = ack_ioasic_irq, |
67 | .mask = mask_ioasic_irq, | ||
68 | .mask_ack = ack_ioasic_irq, | ||
69 | .unmask = unmask_ioasic_irq, | ||
103 | .end = end_ioasic_irq, | 70 | .end = end_ioasic_irq, |
104 | }; | 71 | }; |
105 | 72 | ||
106 | 73 | ||
107 | #define startup_ioasic_dma_irq startup_ioasic_irq | 74 | #define unmask_ioasic_dma_irq unmask_ioasic_irq |
108 | |||
109 | #define shutdown_ioasic_dma_irq shutdown_ioasic_irq | ||
110 | |||
111 | #define enable_ioasic_dma_irq enable_ioasic_irq | ||
112 | 75 | ||
113 | #define disable_ioasic_dma_irq disable_ioasic_irq | 76 | #define mask_ioasic_dma_irq mask_ioasic_irq |
114 | 77 | ||
115 | #define ack_ioasic_dma_irq ack_ioasic_irq | 78 | #define ack_ioasic_dma_irq ack_ioasic_irq |
116 | 79 | ||
@@ -123,11 +86,10 @@ static inline void end_ioasic_dma_irq(unsigned int irq) | |||
123 | 86 | ||
124 | static struct irq_chip ioasic_dma_irq_type = { | 87 | static struct irq_chip ioasic_dma_irq_type = { |
125 | .typename = "IO-ASIC-DMA", | 88 | .typename = "IO-ASIC-DMA", |
126 | .startup = startup_ioasic_dma_irq, | ||
127 | .shutdown = shutdown_ioasic_dma_irq, | ||
128 | .enable = enable_ioasic_dma_irq, | ||
129 | .disable = disable_ioasic_dma_irq, | ||
130 | .ack = ack_ioasic_dma_irq, | 89 | .ack = ack_ioasic_dma_irq, |
90 | .mask = mask_ioasic_dma_irq, | ||
91 | .mask_ack = ack_ioasic_dma_irq, | ||
92 | .unmask = unmask_ioasic_dma_irq, | ||
131 | .end = end_ioasic_dma_irq, | 93 | .end = end_ioasic_dma_irq, |
132 | }; | 94 | }; |
133 | 95 | ||
@@ -140,18 +102,12 @@ void __init init_ioasic_irqs(int base) | |||
140 | ioasic_write(IO_REG_SIMR, 0); | 102 | ioasic_write(IO_REG_SIMR, 0); |
141 | fast_iob(); | 103 | fast_iob(); |
142 | 104 | ||
143 | for (i = base; i < base + IO_INR_DMA; i++) { | 105 | for (i = base; i < base + IO_INR_DMA; i++) |
144 | irq_desc[i].status = IRQ_DISABLED; | 106 | set_irq_chip_and_handler(i, &ioasic_irq_type, |
145 | irq_desc[i].action = 0; | 107 | handle_level_irq); |
146 | irq_desc[i].depth = 1; | 108 | for (; i < base + IO_IRQ_LINES; i++) |
147 | irq_desc[i].chip = &ioasic_irq_type; | 109 | set_irq_chip_and_handler(i, &ioasic_dma_irq_type, |
148 | } | 110 | handle_level_irq); |
149 | for (; i < base + IO_IRQ_LINES; i++) { | ||
150 | irq_desc[i].status = IRQ_DISABLED; | ||
151 | irq_desc[i].action = 0; | ||
152 | irq_desc[i].depth = 1; | ||
153 | irq_desc[i].chip = &ioasic_dma_irq_type; | ||
154 | } | ||
155 | 111 | ||
156 | ioasic_irq_base = base; | 112 | ioasic_irq_base = base; |
157 | } | 113 | } |
diff --git a/arch/mips/dec/kn02-irq.c b/arch/mips/dec/kn02-irq.c index 04a367a60a57..5a9be4c93584 100644 --- a/arch/mips/dec/kn02-irq.c +++ b/arch/mips/dec/kn02-irq.c | |||
@@ -14,7 +14,6 @@ | |||
14 | 14 | ||
15 | #include <linux/init.h> | 15 | #include <linux/init.h> |
16 | #include <linux/irq.h> | 16 | #include <linux/irq.h> |
17 | #include <linux/spinlock.h> | ||
18 | #include <linux/types.h> | 17 | #include <linux/types.h> |
19 | 18 | ||
20 | #include <asm/dec/kn02.h> | 19 | #include <asm/dec/kn02.h> |
@@ -29,7 +28,6 @@ | |||
29 | * There is no default value -- it has to be initialized. | 28 | * There is no default value -- it has to be initialized. |
30 | */ | 29 | */ |
31 | u32 cached_kn02_csr; | 30 | u32 cached_kn02_csr; |
32 | DEFINE_SPINLOCK(kn02_lock); | ||
33 | 31 | ||
34 | 32 | ||
35 | static int kn02_irq_base; | 33 | static int kn02_irq_base; |
@@ -53,54 +51,24 @@ static inline void mask_kn02_irq(unsigned int irq) | |||
53 | *csr = cached_kn02_csr; | 51 | *csr = cached_kn02_csr; |
54 | } | 52 | } |
55 | 53 | ||
56 | static inline void enable_kn02_irq(unsigned int irq) | ||
57 | { | ||
58 | unsigned long flags; | ||
59 | |||
60 | spin_lock_irqsave(&kn02_lock, flags); | ||
61 | unmask_kn02_irq(irq); | ||
62 | spin_unlock_irqrestore(&kn02_lock, flags); | ||
63 | } | ||
64 | |||
65 | static inline void disable_kn02_irq(unsigned int irq) | ||
66 | { | ||
67 | unsigned long flags; | ||
68 | |||
69 | spin_lock_irqsave(&kn02_lock, flags); | ||
70 | mask_kn02_irq(irq); | ||
71 | spin_unlock_irqrestore(&kn02_lock, flags); | ||
72 | } | ||
73 | |||
74 | |||
75 | static unsigned int startup_kn02_irq(unsigned int irq) | ||
76 | { | ||
77 | enable_kn02_irq(irq); | ||
78 | return 0; | ||
79 | } | ||
80 | |||
81 | #define shutdown_kn02_irq disable_kn02_irq | ||
82 | |||
83 | static void ack_kn02_irq(unsigned int irq) | 54 | static void ack_kn02_irq(unsigned int irq) |
84 | { | 55 | { |
85 | spin_lock(&kn02_lock); | ||
86 | mask_kn02_irq(irq); | 56 | mask_kn02_irq(irq); |
87 | spin_unlock(&kn02_lock); | ||
88 | iob(); | 57 | iob(); |
89 | } | 58 | } |
90 | 59 | ||
91 | static void end_kn02_irq(unsigned int irq) | 60 | static void end_kn02_irq(unsigned int irq) |
92 | { | 61 | { |
93 | if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) | 62 | if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) |
94 | enable_kn02_irq(irq); | 63 | unmask_kn02_irq(irq); |
95 | } | 64 | } |
96 | 65 | ||
97 | static struct irq_chip kn02_irq_type = { | 66 | static struct irq_chip kn02_irq_type = { |
98 | .typename = "KN02-CSR", | 67 | .typename = "KN02-CSR", |
99 | .startup = startup_kn02_irq, | ||
100 | .shutdown = shutdown_kn02_irq, | ||
101 | .enable = enable_kn02_irq, | ||
102 | .disable = disable_kn02_irq, | ||
103 | .ack = ack_kn02_irq, | 68 | .ack = ack_kn02_irq, |
69 | .mask = mask_kn02_irq, | ||
70 | .mask_ack = ack_kn02_irq, | ||
71 | .unmask = unmask_kn02_irq, | ||
104 | .end = end_kn02_irq, | 72 | .end = end_kn02_irq, |
105 | }; | 73 | }; |
106 | 74 | ||
@@ -109,22 +77,15 @@ void __init init_kn02_irqs(int base) | |||
109 | { | 77 | { |
110 | volatile u32 *csr = (volatile u32 *)CKSEG1ADDR(KN02_SLOT_BASE + | 78 | volatile u32 *csr = (volatile u32 *)CKSEG1ADDR(KN02_SLOT_BASE + |
111 | KN02_CSR); | 79 | KN02_CSR); |
112 | unsigned long flags; | ||
113 | int i; | 80 | int i; |
114 | 81 | ||
115 | /* Mask interrupts. */ | 82 | /* Mask interrupts. */ |
116 | spin_lock_irqsave(&kn02_lock, flags); | ||
117 | cached_kn02_csr &= ~KN02_CSR_IOINTEN; | 83 | cached_kn02_csr &= ~KN02_CSR_IOINTEN; |
118 | *csr = cached_kn02_csr; | 84 | *csr = cached_kn02_csr; |
119 | iob(); | 85 | iob(); |
120 | spin_unlock_irqrestore(&kn02_lock, flags); | 86 | |
121 | 87 | for (i = base; i < base + KN02_IRQ_LINES; i++) | |
122 | for (i = base; i < base + KN02_IRQ_LINES; i++) { | 88 | set_irq_chip_and_handler(i, &kn02_irq_type, handle_level_irq); |
123 | irq_desc[i].status = IRQ_DISABLED; | ||
124 | irq_desc[i].action = 0; | ||
125 | irq_desc[i].depth = 1; | ||
126 | irq_desc[i].chip = &kn02_irq_type; | ||
127 | } | ||
128 | 89 | ||
129 | kn02_irq_base = base; | 90 | kn02_irq_base = base; |
130 | } | 91 | } |
diff --git a/arch/mips/dec/setup.c b/arch/mips/dec/setup.c index 6b7481e97bec..d34032ac492a 100644 --- a/arch/mips/dec/setup.c +++ b/arch/mips/dec/setup.c | |||
@@ -761,3 +761,9 @@ void __init arch_init_irq(void) | |||
761 | if (dec_interrupt[DEC_IRQ_HALT] >= 0) | 761 | if (dec_interrupt[DEC_IRQ_HALT] >= 0) |
762 | setup_irq(dec_interrupt[DEC_IRQ_HALT], &haltirq); | 762 | setup_irq(dec_interrupt[DEC_IRQ_HALT], &haltirq); |
763 | } | 763 | } |
764 | |||
765 | asmlinkage unsigned int dec_irq_dispatch(unsigned int irq) | ||
766 | { | ||
767 | do_IRQ(irq); | ||
768 | return 0; | ||
769 | } | ||
diff --git a/arch/mips/dec/time.c b/arch/mips/dec/time.c index 69e424e9ab6f..8b7e0c17ac35 100644 --- a/arch/mips/dec/time.c +++ b/arch/mips/dec/time.c | |||
@@ -151,7 +151,7 @@ static void dec_timer_ack(void) | |||
151 | CMOS_READ(RTC_REG_C); /* Ack the RTC interrupt. */ | 151 | CMOS_READ(RTC_REG_C); /* Ack the RTC interrupt. */ |
152 | } | 152 | } |
153 | 153 | ||
154 | static unsigned int dec_ioasic_hpt_read(void) | 154 | static cycle_t dec_ioasic_hpt_read(void) |
155 | { | 155 | { |
156 | /* | 156 | /* |
157 | * The free-running counter is 32-bit which is good for about | 157 | * The free-running counter is 32-bit which is good for about |
@@ -171,7 +171,7 @@ void __init dec_time_init(void) | |||
171 | 171 | ||
172 | if (!cpu_has_counter && IOASIC) | 172 | if (!cpu_has_counter && IOASIC) |
173 | /* For pre-R4k systems we use the I/O ASIC's counter. */ | 173 | /* For pre-R4k systems we use the I/O ASIC's counter. */ |
174 | mips_hpt_read = dec_ioasic_hpt_read; | 174 | clocksource_mips.read = dec_ioasic_hpt_read; |
175 | 175 | ||
176 | /* Set up the rate of periodic DS1287 interrupts. */ | 176 | /* Set up the rate of periodic DS1287 interrupts. */ |
177 | CMOS_WRITE(RTC_REF_CLCK_32KHZ | (16 - __ffs(HZ)), RTC_REG_A); | 177 | CMOS_WRITE(RTC_REF_CLCK_32KHZ | (16 - __ffs(HZ)), RTC_REG_A); |
diff --git a/arch/mips/emma2rh/common/irq_emma2rh.c b/arch/mips/emma2rh/common/irq_emma2rh.c index 197ed4c2ba04..59b98299c896 100644 --- a/arch/mips/emma2rh/common/irq_emma2rh.c +++ b/arch/mips/emma2rh/common/irq_emma2rh.c | |||
@@ -56,22 +56,6 @@ static void emma2rh_irq_disable(unsigned int irq) | |||
56 | ll_emma2rh_irq_disable(irq - emma2rh_irq_base); | 56 | ll_emma2rh_irq_disable(irq - emma2rh_irq_base); |
57 | } | 57 | } |
58 | 58 | ||
59 | static unsigned int emma2rh_irq_startup(unsigned int irq) | ||
60 | { | ||
61 | emma2rh_irq_enable(irq); | ||
62 | return 0; | ||
63 | } | ||
64 | |||
65 | #define emma2rh_irq_shutdown emma2rh_irq_disable | ||
66 | |||
67 | static void emma2rh_irq_ack(unsigned int irq) | ||
68 | { | ||
69 | /* disable interrupt - some handler will re-enable the irq | ||
70 | * and if the interrupt is leveled, we will have infinite loop | ||
71 | */ | ||
72 | ll_emma2rh_irq_disable(irq - emma2rh_irq_base); | ||
73 | } | ||
74 | |||
75 | static void emma2rh_irq_end(unsigned int irq) | 59 | static void emma2rh_irq_end(unsigned int irq) |
76 | { | 60 | { |
77 | if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) | 61 | if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) |
@@ -80,25 +64,20 @@ static void emma2rh_irq_end(unsigned int irq) | |||
80 | 64 | ||
81 | struct irq_chip emma2rh_irq_controller = { | 65 | struct irq_chip emma2rh_irq_controller = { |
82 | .typename = "emma2rh_irq", | 66 | .typename = "emma2rh_irq", |
83 | .startup = emma2rh_irq_startup, | 67 | .ack = emma2rh_irq_disable, |
84 | .shutdown = emma2rh_irq_shutdown, | 68 | .mask = emma2rh_irq_disable, |
85 | .enable = emma2rh_irq_enable, | 69 | .mask_ack = emma2rh_irq_disable, |
86 | .disable = emma2rh_irq_disable, | 70 | .unmask = emma2rh_irq_enable, |
87 | .ack = emma2rh_irq_ack, | ||
88 | .end = emma2rh_irq_end, | 71 | .end = emma2rh_irq_end, |
89 | .set_affinity = NULL /* no affinity stuff for UP */ | ||
90 | }; | 72 | }; |
91 | 73 | ||
92 | void emma2rh_irq_init(u32 irq_base) | 74 | void emma2rh_irq_init(u32 irq_base) |
93 | { | 75 | { |
94 | u32 i; | 76 | u32 i; |
95 | 77 | ||
96 | for (i = irq_base; i < irq_base + NUM_EMMA2RH_IRQ; i++) { | 78 | for (i = irq_base; i < irq_base + NUM_EMMA2RH_IRQ; i++) |
97 | irq_desc[i].status = IRQ_DISABLED; | 79 | set_irq_chip_and_handler(i, &emma2rh_irq_controller, |
98 | irq_desc[i].action = NULL; | 80 | handle_level_irq); |
99 | irq_desc[i].depth = 1; | ||
100 | irq_desc[i].chip = &emma2rh_irq_controller; | ||
101 | } | ||
102 | 81 | ||
103 | emma2rh_irq_base = irq_base; | 82 | emma2rh_irq_base = irq_base; |
104 | } | 83 | } |
diff --git a/arch/mips/emma2rh/markeins/irq_markeins.c b/arch/mips/emma2rh/markeins/irq_markeins.c index 0b36eb001e62..3ac4e405ecdc 100644 --- a/arch/mips/emma2rh/markeins/irq_markeins.c +++ b/arch/mips/emma2rh/markeins/irq_markeins.c | |||
@@ -48,19 +48,6 @@ static void emma2rh_sw_irq_disable(unsigned int irq) | |||
48 | ll_emma2rh_sw_irq_disable(irq - emma2rh_sw_irq_base); | 48 | ll_emma2rh_sw_irq_disable(irq - emma2rh_sw_irq_base); |
49 | } | 49 | } |
50 | 50 | ||
51 | static unsigned int emma2rh_sw_irq_startup(unsigned int irq) | ||
52 | { | ||
53 | emma2rh_sw_irq_enable(irq); | ||
54 | return 0; | ||
55 | } | ||
56 | |||
57 | #define emma2rh_sw_irq_shutdown emma2rh_sw_irq_disable | ||
58 | |||
59 | static void emma2rh_sw_irq_ack(unsigned int irq) | ||
60 | { | ||
61 | ll_emma2rh_sw_irq_disable(irq - emma2rh_sw_irq_base); | ||
62 | } | ||
63 | |||
64 | static void emma2rh_sw_irq_end(unsigned int irq) | 51 | static void emma2rh_sw_irq_end(unsigned int irq) |
65 | { | 52 | { |
66 | if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) | 53 | if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) |
@@ -69,25 +56,20 @@ static void emma2rh_sw_irq_end(unsigned int irq) | |||
69 | 56 | ||
70 | struct irq_chip emma2rh_sw_irq_controller = { | 57 | struct irq_chip emma2rh_sw_irq_controller = { |
71 | .typename = "emma2rh_sw_irq", | 58 | .typename = "emma2rh_sw_irq", |
72 | .startup = emma2rh_sw_irq_startup, | 59 | .ack = emma2rh_sw_irq_disable, |
73 | .shutdown = emma2rh_sw_irq_shutdown, | 60 | .mask = emma2rh_sw_irq_disable, |
74 | .enable = emma2rh_sw_irq_enable, | 61 | .mask_ack = emma2rh_sw_irq_disable, |
75 | .disable = emma2rh_sw_irq_disable, | 62 | .unmask = emma2rh_sw_irq_enable, |
76 | .ack = emma2rh_sw_irq_ack, | ||
77 | .end = emma2rh_sw_irq_end, | 63 | .end = emma2rh_sw_irq_end, |
78 | .set_affinity = NULL, | ||
79 | }; | 64 | }; |
80 | 65 | ||
81 | void emma2rh_sw_irq_init(u32 irq_base) | 66 | void emma2rh_sw_irq_init(u32 irq_base) |
82 | { | 67 | { |
83 | u32 i; | 68 | u32 i; |
84 | 69 | ||
85 | for (i = irq_base; i < irq_base + NUM_EMMA2RH_IRQ_SW; i++) { | 70 | for (i = irq_base; i < irq_base + NUM_EMMA2RH_IRQ_SW; i++) |
86 | irq_desc[i].status = IRQ_DISABLED; | 71 | set_irq_chip_and_handler(i, &emma2rh_sw_irq_controller, |
87 | irq_desc[i].action = NULL; | 72 | handle_level_irq); |
88 | irq_desc[i].depth = 2; | ||
89 | irq_desc[i].chip = &emma2rh_sw_irq_controller; | ||
90 | } | ||
91 | 73 | ||
92 | emma2rh_sw_irq_base = irq_base; | 74 | emma2rh_sw_irq_base = irq_base; |
93 | } | 75 | } |
@@ -126,14 +108,6 @@ static void emma2rh_gpio_irq_disable(unsigned int irq) | |||
126 | ll_emma2rh_gpio_irq_disable(irq - emma2rh_gpio_irq_base); | 108 | ll_emma2rh_gpio_irq_disable(irq - emma2rh_gpio_irq_base); |
127 | } | 109 | } |
128 | 110 | ||
129 | static unsigned int emma2rh_gpio_irq_startup(unsigned int irq) | ||
130 | { | ||
131 | emma2rh_gpio_irq_enable(irq); | ||
132 | return 0; | ||
133 | } | ||
134 | |||
135 | #define emma2rh_gpio_irq_shutdown emma2rh_gpio_irq_disable | ||
136 | |||
137 | static void emma2rh_gpio_irq_ack(unsigned int irq) | 111 | static void emma2rh_gpio_irq_ack(unsigned int irq) |
138 | { | 112 | { |
139 | irq -= emma2rh_gpio_irq_base; | 113 | irq -= emma2rh_gpio_irq_base; |
@@ -149,25 +123,19 @@ static void emma2rh_gpio_irq_end(unsigned int irq) | |||
149 | 123 | ||
150 | struct irq_chip emma2rh_gpio_irq_controller = { | 124 | struct irq_chip emma2rh_gpio_irq_controller = { |
151 | .typename = "emma2rh_gpio_irq", | 125 | .typename = "emma2rh_gpio_irq", |
152 | .startup = emma2rh_gpio_irq_startup, | ||
153 | .shutdown = emma2rh_gpio_irq_shutdown, | ||
154 | .enable = emma2rh_gpio_irq_enable, | ||
155 | .disable = emma2rh_gpio_irq_disable, | ||
156 | .ack = emma2rh_gpio_irq_ack, | 126 | .ack = emma2rh_gpio_irq_ack, |
127 | .mask = emma2rh_gpio_irq_disable, | ||
128 | .mask_ack = emma2rh_gpio_irq_ack, | ||
129 | .unmask = emma2rh_gpio_irq_enable, | ||
157 | .end = emma2rh_gpio_irq_end, | 130 | .end = emma2rh_gpio_irq_end, |
158 | .set_affinity = NULL, | ||
159 | }; | 131 | }; |
160 | 132 | ||
161 | void emma2rh_gpio_irq_init(u32 irq_base) | 133 | void emma2rh_gpio_irq_init(u32 irq_base) |
162 | { | 134 | { |
163 | u32 i; | 135 | u32 i; |
164 | 136 | ||
165 | for (i = irq_base; i < irq_base + NUM_EMMA2RH_IRQ_GPIO; i++) { | 137 | for (i = irq_base; i < irq_base + NUM_EMMA2RH_IRQ_GPIO; i++) |
166 | irq_desc[i].status = IRQ_DISABLED; | 138 | set_irq_chip(i, &emma2rh_gpio_irq_controller); |
167 | irq_desc[i].action = NULL; | ||
168 | irq_desc[i].depth = 2; | ||
169 | irq_desc[i].chip = &emma2rh_gpio_irq_controller; | ||
170 | } | ||
171 | 139 | ||
172 | emma2rh_gpio_irq_base = irq_base; | 140 | emma2rh_gpio_irq_base = irq_base; |
173 | } | 141 | } |
diff --git a/arch/mips/gt64120/ev64120/irq.c b/arch/mips/gt64120/ev64120/irq.c index ed4d82b9a24a..b3e5796c81d7 100644 --- a/arch/mips/gt64120/ev64120/irq.c +++ b/arch/mips/gt64120/ev64120/irq.c | |||
@@ -66,38 +66,21 @@ asmlinkage void plat_irq_dispatch(void) | |||
66 | 66 | ||
67 | static void disable_ev64120_irq(unsigned int irq_nr) | 67 | static void disable_ev64120_irq(unsigned int irq_nr) |
68 | { | 68 | { |
69 | unsigned long flags; | ||
70 | |||
71 | local_irq_save(flags); | ||
72 | if (irq_nr >= 8) { // All PCI interrupts are on line 5 or 2 | 69 | if (irq_nr >= 8) { // All PCI interrupts are on line 5 or 2 |
73 | clear_c0_status(9 << 10); | 70 | clear_c0_status(9 << 10); |
74 | } else { | 71 | } else { |
75 | clear_c0_status(1 << (irq_nr + 8)); | 72 | clear_c0_status(1 << (irq_nr + 8)); |
76 | } | 73 | } |
77 | local_irq_restore(flags); | ||
78 | } | 74 | } |
79 | 75 | ||
80 | static void enable_ev64120_irq(unsigned int irq_nr) | 76 | static void enable_ev64120_irq(unsigned int irq_nr) |
81 | { | 77 | { |
82 | unsigned long flags; | ||
83 | |||
84 | local_irq_save(flags); | ||
85 | if (irq_nr >= 8) // All PCI interrupts are on line 5 or 2 | 78 | if (irq_nr >= 8) // All PCI interrupts are on line 5 or 2 |
86 | set_c0_status(9 << 10); | 79 | set_c0_status(9 << 10); |
87 | else | 80 | else |
88 | set_c0_status(1 << (irq_nr + 8)); | 81 | set_c0_status(1 << (irq_nr + 8)); |
89 | local_irq_restore(flags); | ||
90 | } | ||
91 | |||
92 | static unsigned int startup_ev64120_irq(unsigned int irq) | ||
93 | { | ||
94 | enable_ev64120_irq(irq); | ||
95 | return 0; /* Never anything pending */ | ||
96 | } | 82 | } |
97 | 83 | ||
98 | #define shutdown_ev64120_irq disable_ev64120_irq | ||
99 | #define mask_and_ack_ev64120_irq disable_ev64120_irq | ||
100 | |||
101 | static void end_ev64120_irq(unsigned int irq) | 84 | static void end_ev64120_irq(unsigned int irq) |
102 | { | 85 | { |
103 | if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) | 86 | if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) |
@@ -106,13 +89,11 @@ static void end_ev64120_irq(unsigned int irq) | |||
106 | 89 | ||
107 | static struct irq_chip ev64120_irq_type = { | 90 | static struct irq_chip ev64120_irq_type = { |
108 | .typename = "EV64120", | 91 | .typename = "EV64120", |
109 | .startup = startup_ev64120_irq, | 92 | .ack = disable_ev64120_irq, |
110 | .shutdown = shutdown_ev64120_irq, | 93 | .mask = disable_ev64120_irq, |
111 | .enable = enable_ev64120_irq, | 94 | .mask_ack = disable_ev64120_irq, |
112 | .disable = disable_ev64120_irq, | 95 | .unmask = enable_ev64120_irq, |
113 | .ack = mask_and_ack_ev64120_irq, | ||
114 | .end = end_ev64120_irq, | 96 | .end = end_ev64120_irq, |
115 | .set_affinity = NULL | ||
116 | }; | 97 | }; |
117 | 98 | ||
118 | void gt64120_irq_setup(void) | 99 | void gt64120_irq_setup(void) |
@@ -122,8 +103,6 @@ void gt64120_irq_setup(void) | |||
122 | */ | 103 | */ |
123 | clear_c0_status(ST0_IM); | 104 | clear_c0_status(ST0_IM); |
124 | 105 | ||
125 | local_irq_disable(); | ||
126 | |||
127 | /* | 106 | /* |
128 | * Enable timer. Other interrupts will be enabled as they are | 107 | * Enable timer. Other interrupts will be enabled as they are |
129 | * registered. | 108 | * registered. |
@@ -133,16 +112,5 @@ void gt64120_irq_setup(void) | |||
133 | 112 | ||
134 | void __init arch_init_irq(void) | 113 | void __init arch_init_irq(void) |
135 | { | 114 | { |
136 | int i; | ||
137 | |||
138 | /* Let's initialize our IRQ descriptors */ | ||
139 | for (i = 0; i < NR_IRQS; i++) { | ||
140 | irq_desc[i].status = 0; | ||
141 | irq_desc[i].chip = &no_irq_chip; | ||
142 | irq_desc[i].action = NULL; | ||
143 | irq_desc[i].depth = 0; | ||
144 | spin_lock_init(&irq_desc[i].lock); | ||
145 | } | ||
146 | |||
147 | gt64120_irq_setup(); | 115 | gt64120_irq_setup(); |
148 | } | 116 | } |
diff --git a/arch/mips/jazz/irq.c b/arch/mips/jazz/irq.c index d5bd6b3a0933..5c4f50cdf157 100644 --- a/arch/mips/jazz/irq.c +++ b/arch/mips/jazz/irq.c | |||
@@ -28,14 +28,6 @@ static void enable_r4030_irq(unsigned int irq) | |||
28 | spin_unlock_irqrestore(&r4030_lock, flags); | 28 | spin_unlock_irqrestore(&r4030_lock, flags); |
29 | } | 29 | } |
30 | 30 | ||
31 | static unsigned int startup_r4030_irq(unsigned int irq) | ||
32 | { | ||
33 | enable_r4030_irq(irq); | ||
34 | return 0; /* never anything pending */ | ||
35 | } | ||
36 | |||
37 | #define shutdown_r4030_irq disable_r4030_irq | ||
38 | |||
39 | void disable_r4030_irq(unsigned int irq) | 31 | void disable_r4030_irq(unsigned int irq) |
40 | { | 32 | { |
41 | unsigned int mask = ~(1 << (irq - JAZZ_PARALLEL_IRQ)); | 33 | unsigned int mask = ~(1 << (irq - JAZZ_PARALLEL_IRQ)); |
@@ -47,8 +39,6 @@ void disable_r4030_irq(unsigned int irq) | |||
47 | spin_unlock_irqrestore(&r4030_lock, flags); | 39 | spin_unlock_irqrestore(&r4030_lock, flags); |
48 | } | 40 | } |
49 | 41 | ||
50 | #define mask_and_ack_r4030_irq disable_r4030_irq | ||
51 | |||
52 | static void end_r4030_irq(unsigned int irq) | 42 | static void end_r4030_irq(unsigned int irq) |
53 | { | 43 | { |
54 | if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) | 44 | if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) |
@@ -57,11 +47,10 @@ static void end_r4030_irq(unsigned int irq) | |||
57 | 47 | ||
58 | static struct irq_chip r4030_irq_type = { | 48 | static struct irq_chip r4030_irq_type = { |
59 | .typename = "R4030", | 49 | .typename = "R4030", |
60 | .startup = startup_r4030_irq, | 50 | .ack = disable_r4030_irq, |
61 | .shutdown = shutdown_r4030_irq, | 51 | .mask = disable_r4030_irq, |
62 | .enable = enable_r4030_irq, | 52 | .mask_ack = disable_r4030_irq, |
63 | .disable = disable_r4030_irq, | 53 | .unmask = enable_r4030_irq, |
64 | .ack = mask_and_ack_r4030_irq, | ||
65 | .end = end_r4030_irq, | 54 | .end = end_r4030_irq, |
66 | }; | 55 | }; |
67 | 56 | ||
@@ -69,12 +58,8 @@ void __init init_r4030_ints(void) | |||
69 | { | 58 | { |
70 | int i; | 59 | int i; |
71 | 60 | ||
72 | for (i = JAZZ_PARALLEL_IRQ; i <= JAZZ_TIMER_IRQ; i++) { | 61 | for (i = JAZZ_PARALLEL_IRQ; i <= JAZZ_TIMER_IRQ; i++) |
73 | irq_desc[i].status = IRQ_DISABLED; | 62 | set_irq_chip_and_handler(i, &r4030_irq_type, handle_level_irq); |
74 | irq_desc[i].action = 0; | ||
75 | irq_desc[i].depth = 1; | ||
76 | irq_desc[i].chip = &r4030_irq_type; | ||
77 | } | ||
78 | 63 | ||
79 | r4030_write_reg16(JAZZ_IO_IRQ_ENABLE, 0); | 64 | r4030_write_reg16(JAZZ_IO_IRQ_ENABLE, 0); |
80 | r4030_read_reg16(JAZZ_IO_IRQ_SOURCE); /* clear pending IRQs */ | 65 | r4030_read_reg16(JAZZ_IO_IRQ_SOURCE); /* clear pending IRQs */ |
diff --git a/arch/mips/jmr3927/rbhma3100/irq.c b/arch/mips/jmr3927/rbhma3100/irq.c index de4a238c28be..3da49c5aaf49 100644 --- a/arch/mips/jmr3927/rbhma3100/irq.c +++ b/arch/mips/jmr3927/rbhma3100/irq.c | |||
@@ -90,17 +90,6 @@ static unsigned char irc_level[TX3927_NUM_IR] = { | |||
90 | static void jmr3927_irq_disable(unsigned int irq_nr); | 90 | static void jmr3927_irq_disable(unsigned int irq_nr); |
91 | static void jmr3927_irq_enable(unsigned int irq_nr); | 91 | static void jmr3927_irq_enable(unsigned int irq_nr); |
92 | 92 | ||
93 | static DEFINE_SPINLOCK(jmr3927_irq_lock); | ||
94 | |||
95 | static unsigned int jmr3927_irq_startup(unsigned int irq) | ||
96 | { | ||
97 | jmr3927_irq_enable(irq); | ||
98 | |||
99 | return 0; | ||
100 | } | ||
101 | |||
102 | #define jmr3927_irq_shutdown jmr3927_irq_disable | ||
103 | |||
104 | static void jmr3927_irq_ack(unsigned int irq) | 93 | static void jmr3927_irq_ack(unsigned int irq) |
105 | { | 94 | { |
106 | if (irq == JMR3927_IRQ_IRC_TMR0) | 95 | if (irq == JMR3927_IRQ_IRC_TMR0) |
@@ -118,9 +107,7 @@ static void jmr3927_irq_end(unsigned int irq) | |||
118 | static void jmr3927_irq_disable(unsigned int irq_nr) | 107 | static void jmr3927_irq_disable(unsigned int irq_nr) |
119 | { | 108 | { |
120 | struct tb_irq_space* sp; | 109 | struct tb_irq_space* sp; |
121 | unsigned long flags; | ||
122 | 110 | ||
123 | spin_lock_irqsave(&jmr3927_irq_lock, flags); | ||
124 | for (sp = tb_irq_spaces; sp; sp = sp->next) { | 111 | for (sp = tb_irq_spaces; sp; sp = sp->next) { |
125 | if (sp->start_irqno <= irq_nr && | 112 | if (sp->start_irqno <= irq_nr && |
126 | irq_nr < sp->start_irqno + sp->nr_irqs) { | 113 | irq_nr < sp->start_irqno + sp->nr_irqs) { |
@@ -130,15 +117,12 @@ static void jmr3927_irq_disable(unsigned int irq_nr) | |||
130 | break; | 117 | break; |
131 | } | 118 | } |
132 | } | 119 | } |
133 | spin_unlock_irqrestore(&jmr3927_irq_lock, flags); | ||
134 | } | 120 | } |
135 | 121 | ||
136 | static void jmr3927_irq_enable(unsigned int irq_nr) | 122 | static void jmr3927_irq_enable(unsigned int irq_nr) |
137 | { | 123 | { |
138 | struct tb_irq_space* sp; | 124 | struct tb_irq_space* sp; |
139 | unsigned long flags; | ||
140 | 125 | ||
141 | spin_lock_irqsave(&jmr3927_irq_lock, flags); | ||
142 | for (sp = tb_irq_spaces; sp; sp = sp->next) { | 126 | for (sp = tb_irq_spaces; sp; sp = sp->next) { |
143 | if (sp->start_irqno <= irq_nr && | 127 | if (sp->start_irqno <= irq_nr && |
144 | irq_nr < sp->start_irqno + sp->nr_irqs) { | 128 | irq_nr < sp->start_irqno + sp->nr_irqs) { |
@@ -148,7 +132,6 @@ static void jmr3927_irq_enable(unsigned int irq_nr) | |||
148 | break; | 132 | break; |
149 | } | 133 | } |
150 | } | 134 | } |
151 | spin_unlock_irqrestore(&jmr3927_irq_lock, flags); | ||
152 | } | 135 | } |
153 | 136 | ||
154 | /* | 137 | /* |
@@ -457,11 +440,10 @@ void __init arch_init_irq(void) | |||
457 | 440 | ||
458 | static struct irq_chip jmr3927_irq_controller = { | 441 | static struct irq_chip jmr3927_irq_controller = { |
459 | .typename = "jmr3927_irq", | 442 | .typename = "jmr3927_irq", |
460 | .startup = jmr3927_irq_startup, | ||
461 | .shutdown = jmr3927_irq_shutdown, | ||
462 | .enable = jmr3927_irq_enable, | ||
463 | .disable = jmr3927_irq_disable, | ||
464 | .ack = jmr3927_irq_ack, | 443 | .ack = jmr3927_irq_ack, |
444 | .mask = jmr3927_irq_disable, | ||
445 | .mask_ack = jmr3927_irq_ack, | ||
446 | .unmask = jmr3927_irq_enable, | ||
465 | .end = jmr3927_irq_end, | 447 | .end = jmr3927_irq_end, |
466 | }; | 448 | }; |
467 | 449 | ||
@@ -469,12 +451,8 @@ void jmr3927_irq_init(u32 irq_base) | |||
469 | { | 451 | { |
470 | u32 i; | 452 | u32 i; |
471 | 453 | ||
472 | for (i= irq_base; i< irq_base + JMR3927_NR_IRQ_IRC + JMR3927_NR_IRQ_IOC; i++) { | 454 | for (i= irq_base; i< irq_base + JMR3927_NR_IRQ_IRC + JMR3927_NR_IRQ_IOC; i++) |
473 | irq_desc[i].status = IRQ_DISABLED; | 455 | set_irq_chip(i, &jmr3927_irq_controller); |
474 | irq_desc[i].action = NULL; | ||
475 | irq_desc[i].depth = 1; | ||
476 | irq_desc[i].chip = &jmr3927_irq_controller; | ||
477 | } | ||
478 | 456 | ||
479 | jmr3927_irq_base = irq_base; | 457 | jmr3927_irq_base = irq_base; |
480 | } | 458 | } |
diff --git a/arch/mips/jmr3927/rbhma3100/setup.c b/arch/mips/jmr3927/rbhma3100/setup.c index 16e5dfe7aa8a..138f25efe38a 100644 --- a/arch/mips/jmr3927/rbhma3100/setup.c +++ b/arch/mips/jmr3927/rbhma3100/setup.c | |||
@@ -170,7 +170,7 @@ static void jmr3927_machine_power_off(void) | |||
170 | while (1); | 170 | while (1); |
171 | } | 171 | } |
172 | 172 | ||
173 | static unsigned int jmr3927_hpt_read(void) | 173 | static cycle_t jmr3927_hpt_read(void) |
174 | { | 174 | { |
175 | /* We assume this function is called xtime_lock held. */ | 175 | /* We assume this function is called xtime_lock held. */ |
176 | return jiffies * (JMR3927_TIMER_CLK / HZ) + jmr3927_tmrptr->trr; | 176 | return jiffies * (JMR3927_TIMER_CLK / HZ) + jmr3927_tmrptr->trr; |
@@ -182,7 +182,7 @@ extern void rtc_ds1742_init(unsigned long base); | |||
182 | #endif | 182 | #endif |
183 | static void __init jmr3927_time_init(void) | 183 | static void __init jmr3927_time_init(void) |
184 | { | 184 | { |
185 | mips_hpt_read = jmr3927_hpt_read; | 185 | clocksource_mips.read = jmr3927_hpt_read; |
186 | mips_hpt_frequency = JMR3927_TIMER_CLK; | 186 | mips_hpt_frequency = JMR3927_TIMER_CLK; |
187 | #ifdef USE_RTC_DS1742 | 187 | #ifdef USE_RTC_DS1742 |
188 | if (jmr3927_have_nvram()) { | 188 | if (jmr3927_have_nvram()) { |
diff --git a/arch/mips/kernel/Makefile b/arch/mips/kernel/Makefile index cd9cec9e39e9..bbbb8d7cb89b 100644 --- a/arch/mips/kernel/Makefile +++ b/arch/mips/kernel/Makefile | |||
@@ -6,7 +6,7 @@ extra-y := head.o init_task.o vmlinux.lds | |||
6 | 6 | ||
7 | obj-y += cpu-probe.o branch.o entry.o genex.o irq.o process.o \ | 7 | obj-y += cpu-probe.o branch.o entry.o genex.o irq.o process.o \ |
8 | ptrace.o reset.o semaphore.o setup.o signal.o syscall.o \ | 8 | ptrace.o reset.o semaphore.o setup.o signal.o syscall.o \ |
9 | time.o traps.o unaligned.o | 9 | time.o topology.o traps.o unaligned.o |
10 | 10 | ||
11 | binfmt_irix-objs := irixelf.o irixinv.o irixioctl.o irixsig.o \ | 11 | binfmt_irix-objs := irixelf.o irixinv.o irixioctl.o irixsig.o \ |
12 | irix5sys.o sysirix.o | 12 | irix5sys.o sysirix.o |
@@ -45,7 +45,6 @@ obj-$(CONFIG_MIPS_APSP_KSPD) += kspd.o | |||
45 | obj-$(CONFIG_MIPS_VPE_LOADER) += vpe.o | 45 | obj-$(CONFIG_MIPS_VPE_LOADER) += vpe.o |
46 | obj-$(CONFIG_MIPS_VPE_APSP_API) += rtlx.o | 46 | obj-$(CONFIG_MIPS_VPE_APSP_API) += rtlx.o |
47 | 47 | ||
48 | obj-$(CONFIG_NO_ISA) += dma-no-isa.o | ||
49 | obj-$(CONFIG_I8259) += i8259.o | 48 | obj-$(CONFIG_I8259) += i8259.o |
50 | obj-$(CONFIG_IRQ_CPU) += irq_cpu.o | 49 | obj-$(CONFIG_IRQ_CPU) += irq_cpu.o |
51 | obj-$(CONFIG_IRQ_CPU_RM7K) += irq-rm7000.o | 50 | obj-$(CONFIG_IRQ_CPU_RM7K) += irq-rm7000.o |
@@ -67,6 +66,8 @@ obj-$(CONFIG_64BIT) += cpu-bugs64.o | |||
67 | 66 | ||
68 | obj-$(CONFIG_I8253) += i8253.o | 67 | obj-$(CONFIG_I8253) += i8253.o |
69 | 68 | ||
69 | obj-$(CONFIG_KEXEC) += machine_kexec.o relocate_kernel.o | ||
70 | |||
70 | CFLAGS_cpu-bugs64.o = $(shell if $(CC) $(CFLAGS) -Wa,-mdaddi -c -o /dev/null -xc /dev/null >/dev/null 2>&1; then echo "-DHAVE_AS_SET_DADDI"; fi) | 71 | CFLAGS_cpu-bugs64.o = $(shell if $(CC) $(CFLAGS) -Wa,-mdaddi -c -o /dev/null -xc /dev/null >/dev/null 2>&1; then echo "-DHAVE_AS_SET_DADDI"; fi) |
71 | 72 | ||
72 | EXTRA_AFLAGS := $(CFLAGS) | 73 | EXTRA_AFLAGS := $(CFLAGS) |
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c index 8485af340ee1..442839e9578c 100644 --- a/arch/mips/kernel/cpu-probe.c +++ b/arch/mips/kernel/cpu-probe.c | |||
@@ -110,9 +110,8 @@ static inline void check_wait(void) | |||
110 | { | 110 | { |
111 | struct cpuinfo_mips *c = ¤t_cpu_data; | 111 | struct cpuinfo_mips *c = ¤t_cpu_data; |
112 | 112 | ||
113 | printk("Checking for 'wait' instruction... "); | ||
114 | if (nowait) { | 113 | if (nowait) { |
115 | printk (" disabled.\n"); | 114 | printk("Wait instruction disabled.\n"); |
116 | return; | 115 | return; |
117 | } | 116 | } |
118 | 117 | ||
@@ -120,11 +119,9 @@ static inline void check_wait(void) | |||
120 | case CPU_R3081: | 119 | case CPU_R3081: |
121 | case CPU_R3081E: | 120 | case CPU_R3081E: |
122 | cpu_wait = r3081_wait; | 121 | cpu_wait = r3081_wait; |
123 | printk(" available.\n"); | ||
124 | break; | 122 | break; |
125 | case CPU_TX3927: | 123 | case CPU_TX3927: |
126 | cpu_wait = r39xx_wait; | 124 | cpu_wait = r39xx_wait; |
127 | printk(" available.\n"); | ||
128 | break; | 125 | break; |
129 | case CPU_R4200: | 126 | case CPU_R4200: |
130 | /* case CPU_R4300: */ | 127 | /* case CPU_R4300: */ |
@@ -146,33 +143,23 @@ static inline void check_wait(void) | |||
146 | case CPU_74K: | 143 | case CPU_74K: |
147 | case CPU_PR4450: | 144 | case CPU_PR4450: |
148 | cpu_wait = r4k_wait; | 145 | cpu_wait = r4k_wait; |
149 | printk(" available.\n"); | ||
150 | break; | 146 | break; |
151 | case CPU_TX49XX: | 147 | case CPU_TX49XX: |
152 | cpu_wait = r4k_wait_irqoff; | 148 | cpu_wait = r4k_wait_irqoff; |
153 | printk(" available.\n"); | ||
154 | break; | 149 | break; |
155 | case CPU_AU1000: | 150 | case CPU_AU1000: |
156 | case CPU_AU1100: | 151 | case CPU_AU1100: |
157 | case CPU_AU1500: | 152 | case CPU_AU1500: |
158 | case CPU_AU1550: | 153 | case CPU_AU1550: |
159 | case CPU_AU1200: | 154 | case CPU_AU1200: |
160 | if (allow_au1k_wait) { | 155 | if (allow_au1k_wait) |
161 | cpu_wait = au1k_wait; | 156 | cpu_wait = au1k_wait; |
162 | printk(" available.\n"); | ||
163 | } else | ||
164 | printk(" unavailable.\n"); | ||
165 | break; | 157 | break; |
166 | case CPU_RM9000: | 158 | case CPU_RM9000: |
167 | if ((c->processor_id & 0x00ff) >= 0x40) { | 159 | if ((c->processor_id & 0x00ff) >= 0x40) |
168 | cpu_wait = r4k_wait; | 160 | cpu_wait = r4k_wait; |
169 | printk(" available.\n"); | ||
170 | } else { | ||
171 | printk(" unavailable.\n"); | ||
172 | } | ||
173 | break; | 161 | break; |
174 | default: | 162 | default: |
175 | printk(" unavailable.\n"); | ||
176 | break; | 163 | break; |
177 | } | 164 | } |
178 | } | 165 | } |
diff --git a/arch/mips/kernel/dma-no-isa.c b/arch/mips/kernel/dma-no-isa.c deleted file mode 100644 index 6df8b07741e3..000000000000 --- a/arch/mips/kernel/dma-no-isa.c +++ /dev/null | |||
@@ -1,28 +0,0 @@ | |||
1 | /* | ||
2 | * This file is subject to the terms and conditions of the GNU General Public | ||
3 | * License. See the file "COPYING" in the main directory of this archive | ||
4 | * for more details. | ||
5 | * | ||
6 | * Copyright (C) 2004 by Ralf Baechle | ||
7 | * | ||
8 | * Dummy ISA DMA functions for systems that don't have ISA but share drivers | ||
9 | * with ISA such as legacy free PCI. | ||
10 | */ | ||
11 | #include <linux/errno.h> | ||
12 | #include <linux/module.h> | ||
13 | #include <linux/spinlock.h> | ||
14 | |||
15 | DEFINE_SPINLOCK(dma_spin_lock); | ||
16 | |||
17 | int request_dma(unsigned int dmanr, const char * device_id) | ||
18 | { | ||
19 | return -EINVAL; | ||
20 | } | ||
21 | |||
22 | void free_dma(unsigned int dmanr) | ||
23 | { | ||
24 | } | ||
25 | |||
26 | EXPORT_SYMBOL(dma_spin_lock); | ||
27 | EXPORT_SYMBOL(request_dma); | ||
28 | EXPORT_SYMBOL(free_dma); | ||
diff --git a/arch/mips/kernel/genex.S b/arch/mips/kernel/genex.S index 5baca16993d0..aacd4a005c5f 100644 --- a/arch/mips/kernel/genex.S +++ b/arch/mips/kernel/genex.S | |||
@@ -19,6 +19,7 @@ | |||
19 | #include <asm/mipsregs.h> | 19 | #include <asm/mipsregs.h> |
20 | #include <asm/stackframe.h> | 20 | #include <asm/stackframe.h> |
21 | #include <asm/war.h> | 21 | #include <asm/war.h> |
22 | #include <asm/page.h> | ||
22 | 23 | ||
23 | #define PANIC_PIC(msg) \ | 24 | #define PANIC_PIC(msg) \ |
24 | .set push; \ | 25 | .set push; \ |
@@ -378,6 +379,68 @@ NESTED(nmi_handler, PT_SIZE, sp) | |||
378 | BUILD_HANDLER dsp dsp sti silent /* #26 */ | 379 | BUILD_HANDLER dsp dsp sti silent /* #26 */ |
379 | BUILD_HANDLER reserved reserved sti verbose /* others */ | 380 | BUILD_HANDLER reserved reserved sti verbose /* others */ |
380 | 381 | ||
382 | .align 5 | ||
383 | LEAF(handle_ri_rdhwr_vivt) | ||
384 | #ifdef CONFIG_MIPS_MT_SMTC | ||
385 | PANIC_PIC("handle_ri_rdhwr_vivt called") | ||
386 | #else | ||
387 | .set push | ||
388 | .set noat | ||
389 | .set noreorder | ||
390 | /* check if TLB contains a entry for EPC */ | ||
391 | MFC0 k1, CP0_ENTRYHI | ||
392 | andi k1, 0xff /* ASID_MASK */ | ||
393 | MFC0 k0, CP0_EPC | ||
394 | PTR_SRL k0, PAGE_SHIFT + 1 | ||
395 | PTR_SLL k0, PAGE_SHIFT + 1 | ||
396 | or k1, k0 | ||
397 | MTC0 k1, CP0_ENTRYHI | ||
398 | mtc0_tlbw_hazard | ||
399 | tlbp | ||
400 | tlb_probe_hazard | ||
401 | mfc0 k1, CP0_INDEX | ||
402 | .set pop | ||
403 | bltz k1, handle_ri /* slow path */ | ||
404 | /* fall thru */ | ||
405 | #endif | ||
406 | END(handle_ri_rdhwr_vivt) | ||
407 | |||
408 | LEAF(handle_ri_rdhwr) | ||
409 | .set push | ||
410 | .set noat | ||
411 | .set noreorder | ||
412 | /* 0x7c03e83b: rdhwr v1,$29 */ | ||
413 | MFC0 k1, CP0_EPC | ||
414 | lui k0, 0x7c03 | ||
415 | lw k1, (k1) | ||
416 | ori k0, 0xe83b | ||
417 | .set reorder | ||
418 | bne k0, k1, handle_ri /* if not ours */ | ||
419 | /* The insn is rdhwr. No need to check CAUSE.BD here. */ | ||
420 | get_saved_sp /* k1 := current_thread_info */ | ||
421 | .set noreorder | ||
422 | MFC0 k0, CP0_EPC | ||
423 | #if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX) | ||
424 | ori k1, _THREAD_MASK | ||
425 | xori k1, _THREAD_MASK | ||
426 | LONG_L v1, TI_TP_VALUE(k1) | ||
427 | LONG_ADDIU k0, 4 | ||
428 | jr k0 | ||
429 | rfe | ||
430 | #else | ||
431 | LONG_ADDIU k0, 4 /* stall on $k0 */ | ||
432 | MTC0 k0, CP0_EPC | ||
433 | /* I hope three instructions between MTC0 and ERET are enough... */ | ||
434 | ori k1, _THREAD_MASK | ||
435 | xori k1, _THREAD_MASK | ||
436 | LONG_L v1, TI_TP_VALUE(k1) | ||
437 | .set mips3 | ||
438 | eret | ||
439 | .set mips0 | ||
440 | #endif | ||
441 | .set pop | ||
442 | END(handle_ri_rdhwr) | ||
443 | |||
381 | #ifdef CONFIG_64BIT | 444 | #ifdef CONFIG_64BIT |
382 | /* A temporary overflow handler used by check_daddi(). */ | 445 | /* A temporary overflow handler used by check_daddi(). */ |
383 | 446 | ||
diff --git a/arch/mips/kernel/head.S b/arch/mips/kernel/head.S index ddc1b71c9378..a2e095adaa3f 100644 --- a/arch/mips/kernel/head.S +++ b/arch/mips/kernel/head.S | |||
@@ -250,6 +250,9 @@ NESTED(smp_bootstrap, 16, sp) | |||
250 | */ | 250 | */ |
251 | page swapper_pg_dir, _PGD_ORDER | 251 | page swapper_pg_dir, _PGD_ORDER |
252 | #ifdef CONFIG_64BIT | 252 | #ifdef CONFIG_64BIT |
253 | #if defined(CONFIG_MODULES) && !defined(CONFIG_BUILD_ELF64) | ||
254 | page module_pg_dir, _PGD_ORDER | ||
255 | #endif | ||
253 | page invalid_pmd_table, _PMD_ORDER | 256 | page invalid_pmd_table, _PMD_ORDER |
254 | #endif | 257 | #endif |
255 | page invalid_pte_table, _PTE_ORDER | 258 | page invalid_pte_table, _PTE_ORDER |
diff --git a/arch/mips/kernel/i8259.c b/arch/mips/kernel/i8259.c index 48e3418c217b..2526c0ca4d81 100644 --- a/arch/mips/kernel/i8259.c +++ b/arch/mips/kernel/i8259.c | |||
@@ -40,21 +40,10 @@ static void end_8259A_irq (unsigned int irq) | |||
40 | enable_8259A_irq(irq); | 40 | enable_8259A_irq(irq); |
41 | } | 41 | } |
42 | 42 | ||
43 | #define shutdown_8259A_irq disable_8259A_irq | ||
44 | |||
45 | void mask_and_ack_8259A(unsigned int); | 43 | void mask_and_ack_8259A(unsigned int); |
46 | 44 | ||
47 | static unsigned int startup_8259A_irq(unsigned int irq) | ||
48 | { | ||
49 | enable_8259A_irq(irq); | ||
50 | |||
51 | return 0; /* never anything pending */ | ||
52 | } | ||
53 | |||
54 | static struct irq_chip i8259A_irq_type = { | 45 | static struct irq_chip i8259A_irq_type = { |
55 | .typename = "XT-PIC", | 46 | .typename = "XT-PIC", |
56 | .startup = startup_8259A_irq, | ||
57 | .shutdown = shutdown_8259A_irq, | ||
58 | .enable = enable_8259A_irq, | 47 | .enable = enable_8259A_irq, |
59 | .disable = disable_8259A_irq, | 48 | .disable = disable_8259A_irq, |
60 | .ack = mask_and_ack_8259A, | 49 | .ack = mask_and_ack_8259A, |
@@ -120,7 +109,7 @@ int i8259A_irq_pending(unsigned int irq) | |||
120 | void make_8259A_irq(unsigned int irq) | 109 | void make_8259A_irq(unsigned int irq) |
121 | { | 110 | { |
122 | disable_irq_nosync(irq); | 111 | disable_irq_nosync(irq); |
123 | irq_desc[irq].chip = &i8259A_irq_type; | 112 | set_irq_chip(irq, &i8259A_irq_type); |
124 | enable_irq(irq); | 113 | enable_irq(irq); |
125 | } | 114 | } |
126 | 115 | ||
@@ -323,12 +312,8 @@ void __init init_i8259_irqs (void) | |||
323 | 312 | ||
324 | init_8259A(0); | 313 | init_8259A(0); |
325 | 314 | ||
326 | for (i = 0; i < 16; i++) { | 315 | for (i = 0; i < 16; i++) |
327 | irq_desc[i].status = IRQ_DISABLED; | 316 | set_irq_chip(i, &i8259A_irq_type); |
328 | irq_desc[i].action = NULL; | ||
329 | irq_desc[i].depth = 1; | ||
330 | irq_desc[i].chip = &i8259A_irq_type; | ||
331 | } | ||
332 | 317 | ||
333 | setup_irq(2, &irq2); | 318 | setup_irq(2, &irq2); |
334 | } | 319 | } |
diff --git a/arch/mips/kernel/irq-msc01.c b/arch/mips/kernel/irq-msc01.c index 650a80ca3741..bcaad6696082 100644 --- a/arch/mips/kernel/irq-msc01.c +++ b/arch/mips/kernel/irq-msc01.c | |||
@@ -45,31 +45,6 @@ static inline void unmask_msc_irq(unsigned int irq) | |||
45 | } | 45 | } |
46 | 46 | ||
47 | /* | 47 | /* |
48 | * Enables the IRQ on SOC-it | ||
49 | */ | ||
50 | static void enable_msc_irq(unsigned int irq) | ||
51 | { | ||
52 | unmask_msc_irq(irq); | ||
53 | } | ||
54 | |||
55 | /* | ||
56 | * Initialize the IRQ on SOC-it | ||
57 | */ | ||
58 | static unsigned int startup_msc_irq(unsigned int irq) | ||
59 | { | ||
60 | unmask_msc_irq(irq); | ||
61 | return 0; | ||
62 | } | ||
63 | |||
64 | /* | ||
65 | * Disables the IRQ on SOC-it | ||
66 | */ | ||
67 | static void disable_msc_irq(unsigned int irq) | ||
68 | { | ||
69 | mask_msc_irq(irq); | ||
70 | } | ||
71 | |||
72 | /* | ||
73 | * Masks and ACKs an IRQ | 48 | * Masks and ACKs an IRQ |
74 | */ | 49 | */ |
75 | static void level_mask_and_ack_msc_irq(unsigned int irq) | 50 | static void level_mask_and_ack_msc_irq(unsigned int irq) |
@@ -136,25 +111,23 @@ msc_bind_eic_interrupt (unsigned int irq, unsigned int set) | |||
136 | (irq<<MSC01_IC_RAMW_ADDR_SHF) | (set<<MSC01_IC_RAMW_DATA_SHF)); | 111 | (irq<<MSC01_IC_RAMW_ADDR_SHF) | (set<<MSC01_IC_RAMW_DATA_SHF)); |
137 | } | 112 | } |
138 | 113 | ||
139 | #define shutdown_msc_irq disable_msc_irq | ||
140 | |||
141 | struct irq_chip msc_levelirq_type = { | 114 | struct irq_chip msc_levelirq_type = { |
142 | .typename = "SOC-it-Level", | 115 | .typename = "SOC-it-Level", |
143 | .startup = startup_msc_irq, | ||
144 | .shutdown = shutdown_msc_irq, | ||
145 | .enable = enable_msc_irq, | ||
146 | .disable = disable_msc_irq, | ||
147 | .ack = level_mask_and_ack_msc_irq, | 116 | .ack = level_mask_and_ack_msc_irq, |
117 | .mask = mask_msc_irq, | ||
118 | .mask_ack = level_mask_and_ack_msc_irq, | ||
119 | .unmask = unmask_msc_irq, | ||
120 | .eoi = unmask_msc_irq, | ||
148 | .end = end_msc_irq, | 121 | .end = end_msc_irq, |
149 | }; | 122 | }; |
150 | 123 | ||
151 | struct irq_chip msc_edgeirq_type = { | 124 | struct irq_chip msc_edgeirq_type = { |
152 | .typename = "SOC-it-Edge", | 125 | .typename = "SOC-it-Edge", |
153 | .startup =startup_msc_irq, | ||
154 | .shutdown = shutdown_msc_irq, | ||
155 | .enable = enable_msc_irq, | ||
156 | .disable = disable_msc_irq, | ||
157 | .ack = edge_mask_and_ack_msc_irq, | 126 | .ack = edge_mask_and_ack_msc_irq, |
127 | .mask = mask_msc_irq, | ||
128 | .mask_ack = edge_mask_and_ack_msc_irq, | ||
129 | .unmask = unmask_msc_irq, | ||
130 | .eoi = unmask_msc_irq, | ||
158 | .end = end_msc_irq, | 131 | .end = end_msc_irq, |
159 | }; | 132 | }; |
160 | 133 | ||
@@ -175,14 +148,14 @@ void __init init_msc_irqs(unsigned int base, msc_irqmap_t *imp, int nirq) | |||
175 | 148 | ||
176 | switch (imp->im_type) { | 149 | switch (imp->im_type) { |
177 | case MSC01_IRQ_EDGE: | 150 | case MSC01_IRQ_EDGE: |
178 | irq_desc[base+n].chip = &msc_edgeirq_type; | 151 | set_irq_chip(base+n, &msc_edgeirq_type); |
179 | if (cpu_has_veic) | 152 | if (cpu_has_veic) |
180 | MSCIC_WRITE(MSC01_IC_SUP+n*8, MSC01_IC_SUP_EDGE_BIT); | 153 | MSCIC_WRITE(MSC01_IC_SUP+n*8, MSC01_IC_SUP_EDGE_BIT); |
181 | else | 154 | else |
182 | MSCIC_WRITE(MSC01_IC_SUP+n*8, MSC01_IC_SUP_EDGE_BIT | imp->im_lvl); | 155 | MSCIC_WRITE(MSC01_IC_SUP+n*8, MSC01_IC_SUP_EDGE_BIT | imp->im_lvl); |
183 | break; | 156 | break; |
184 | case MSC01_IRQ_LEVEL: | 157 | case MSC01_IRQ_LEVEL: |
185 | irq_desc[base+n].chip = &msc_levelirq_type; | 158 | set_irq_chip(base+n, &msc_levelirq_type); |
186 | if (cpu_has_veic) | 159 | if (cpu_has_veic) |
187 | MSCIC_WRITE(MSC01_IC_SUP+n*8, 0); | 160 | MSCIC_WRITE(MSC01_IC_SUP+n*8, 0); |
188 | else | 161 | else |
diff --git a/arch/mips/kernel/irq-mv6434x.c b/arch/mips/kernel/irq-mv6434x.c index 37d106202b83..6cfb31cafde2 100644 --- a/arch/mips/kernel/irq-mv6434x.c +++ b/arch/mips/kernel/irq-mv6434x.c | |||
@@ -67,39 +67,6 @@ static inline void unmask_mv64340_irq(unsigned int irq) | |||
67 | } | 67 | } |
68 | 68 | ||
69 | /* | 69 | /* |
70 | * Enables the IRQ on Marvell Chip | ||
71 | */ | ||
72 | static void enable_mv64340_irq(unsigned int irq) | ||
73 | { | ||
74 | unmask_mv64340_irq(irq); | ||
75 | } | ||
76 | |||
77 | /* | ||
78 | * Initialize the IRQ on Marvell Chip | ||
79 | */ | ||
80 | static unsigned int startup_mv64340_irq(unsigned int irq) | ||
81 | { | ||
82 | unmask_mv64340_irq(irq); | ||
83 | return 0; | ||
84 | } | ||
85 | |||
86 | /* | ||
87 | * Disables the IRQ on Marvell Chip | ||
88 | */ | ||
89 | static void disable_mv64340_irq(unsigned int irq) | ||
90 | { | ||
91 | mask_mv64340_irq(irq); | ||
92 | } | ||
93 | |||
94 | /* | ||
95 | * Masks and ACKs an IRQ | ||
96 | */ | ||
97 | static void mask_and_ack_mv64340_irq(unsigned int irq) | ||
98 | { | ||
99 | mask_mv64340_irq(irq); | ||
100 | } | ||
101 | |||
102 | /* | ||
103 | * End IRQ processing | 70 | * End IRQ processing |
104 | */ | 71 | */ |
105 | static void end_mv64340_irq(unsigned int irq) | 72 | static void end_mv64340_irq(unsigned int irq) |
@@ -133,15 +100,12 @@ void ll_mv64340_irq(void) | |||
133 | do_IRQ(ls1bit32(irq_src_high) + irq_base + 32); | 100 | do_IRQ(ls1bit32(irq_src_high) + irq_base + 32); |
134 | } | 101 | } |
135 | 102 | ||
136 | #define shutdown_mv64340_irq disable_mv64340_irq | ||
137 | |||
138 | struct irq_chip mv64340_irq_type = { | 103 | struct irq_chip mv64340_irq_type = { |
139 | .typename = "MV-64340", | 104 | .typename = "MV-64340", |
140 | .startup = startup_mv64340_irq, | 105 | .ack = mask_mv64340_irq, |
141 | .shutdown = shutdown_mv64340_irq, | 106 | .mask = mask_mv64340_irq, |
142 | .enable = enable_mv64340_irq, | 107 | .mask_ack = mask_mv64340_irq, |
143 | .disable = disable_mv64340_irq, | 108 | .unmask = unmask_mv64340_irq, |
144 | .ack = mask_and_ack_mv64340_irq, | ||
145 | .end = end_mv64340_irq, | 109 | .end = end_mv64340_irq, |
146 | }; | 110 | }; |
147 | 111 | ||
@@ -149,13 +113,9 @@ void __init mv64340_irq_init(unsigned int base) | |||
149 | { | 113 | { |
150 | int i; | 114 | int i; |
151 | 115 | ||
152 | /* Reset irq handlers pointers to NULL */ | 116 | for (i = base; i < base + 64; i++) |
153 | for (i = base; i < base + 64; i++) { | 117 | set_irq_chip_and_handler(i, &mv64340_irq_type, |
154 | irq_desc[i].status = IRQ_DISABLED; | 118 | handle_level_irq); |
155 | irq_desc[i].action = 0; | ||
156 | irq_desc[i].depth = 2; | ||
157 | irq_desc[i].chip = &mv64340_irq_type; | ||
158 | } | ||
159 | 119 | ||
160 | irq_base = base; | 120 | irq_base = base; |
161 | } | 121 | } |
diff --git a/arch/mips/kernel/irq-rm7000.c b/arch/mips/kernel/irq-rm7000.c index 6b54c7109e2e..ddcc2a5f8a06 100644 --- a/arch/mips/kernel/irq-rm7000.c +++ b/arch/mips/kernel/irq-rm7000.c | |||
@@ -29,42 +29,6 @@ static inline void mask_rm7k_irq(unsigned int irq) | |||
29 | clear_c0_intcontrol(0x100 << (irq - irq_base)); | 29 | clear_c0_intcontrol(0x100 << (irq - irq_base)); |
30 | } | 30 | } |
31 | 31 | ||
32 | static inline void rm7k_cpu_irq_enable(unsigned int irq) | ||
33 | { | ||
34 | unsigned long flags; | ||
35 | |||
36 | local_irq_save(flags); | ||
37 | unmask_rm7k_irq(irq); | ||
38 | local_irq_restore(flags); | ||
39 | } | ||
40 | |||
41 | static void rm7k_cpu_irq_disable(unsigned int irq) | ||
42 | { | ||
43 | unsigned long flags; | ||
44 | |||
45 | local_irq_save(flags); | ||
46 | mask_rm7k_irq(irq); | ||
47 | local_irq_restore(flags); | ||
48 | } | ||
49 | |||
50 | static unsigned int rm7k_cpu_irq_startup(unsigned int irq) | ||
51 | { | ||
52 | rm7k_cpu_irq_enable(irq); | ||
53 | |||
54 | return 0; | ||
55 | } | ||
56 | |||
57 | #define rm7k_cpu_irq_shutdown rm7k_cpu_irq_disable | ||
58 | |||
59 | /* | ||
60 | * While we ack the interrupt interrupts are disabled and thus we don't need | ||
61 | * to deal with concurrency issues. Same for rm7k_cpu_irq_end. | ||
62 | */ | ||
63 | static void rm7k_cpu_irq_ack(unsigned int irq) | ||
64 | { | ||
65 | mask_rm7k_irq(irq); | ||
66 | } | ||
67 | |||
68 | static void rm7k_cpu_irq_end(unsigned int irq) | 32 | static void rm7k_cpu_irq_end(unsigned int irq) |
69 | { | 33 | { |
70 | if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) | 34 | if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) |
@@ -73,11 +37,10 @@ static void rm7k_cpu_irq_end(unsigned int irq) | |||
73 | 37 | ||
74 | static struct irq_chip rm7k_irq_controller = { | 38 | static struct irq_chip rm7k_irq_controller = { |
75 | .typename = "RM7000", | 39 | .typename = "RM7000", |
76 | .startup = rm7k_cpu_irq_startup, | 40 | .ack = mask_rm7k_irq, |
77 | .shutdown = rm7k_cpu_irq_shutdown, | 41 | .mask = mask_rm7k_irq, |
78 | .enable = rm7k_cpu_irq_enable, | 42 | .mask_ack = mask_rm7k_irq, |
79 | .disable = rm7k_cpu_irq_disable, | 43 | .unmask = unmask_rm7k_irq, |
80 | .ack = rm7k_cpu_irq_ack, | ||
81 | .end = rm7k_cpu_irq_end, | 44 | .end = rm7k_cpu_irq_end, |
82 | }; | 45 | }; |
83 | 46 | ||
@@ -87,12 +50,9 @@ void __init rm7k_cpu_irq_init(int base) | |||
87 | 50 | ||
88 | clear_c0_intcontrol(0x00000f00); /* Mask all */ | 51 | clear_c0_intcontrol(0x00000f00); /* Mask all */ |
89 | 52 | ||
90 | for (i = base; i < base + 4; i++) { | 53 | for (i = base; i < base + 4; i++) |
91 | irq_desc[i].status = IRQ_DISABLED; | 54 | set_irq_chip_and_handler(i, &rm7k_irq_controller, |
92 | irq_desc[i].action = NULL; | 55 | handle_level_irq); |
93 | irq_desc[i].depth = 1; | ||
94 | irq_desc[i].chip = &rm7k_irq_controller; | ||
95 | } | ||
96 | 56 | ||
97 | irq_base = base; | 57 | irq_base = base; |
98 | } | 58 | } |
diff --git a/arch/mips/kernel/irq-rm9000.c b/arch/mips/kernel/irq-rm9000.c index 62f011ba97a2..ba6440c88abd 100644 --- a/arch/mips/kernel/irq-rm9000.c +++ b/arch/mips/kernel/irq-rm9000.c | |||
@@ -48,15 +48,6 @@ static void rm9k_cpu_irq_disable(unsigned int irq) | |||
48 | local_irq_restore(flags); | 48 | local_irq_restore(flags); |
49 | } | 49 | } |
50 | 50 | ||
51 | static unsigned int rm9k_cpu_irq_startup(unsigned int irq) | ||
52 | { | ||
53 | rm9k_cpu_irq_enable(irq); | ||
54 | |||
55 | return 0; | ||
56 | } | ||
57 | |||
58 | #define rm9k_cpu_irq_shutdown rm9k_cpu_irq_disable | ||
59 | |||
60 | /* | 51 | /* |
61 | * Performance counter interrupts are global on all processors. | 52 | * Performance counter interrupts are global on all processors. |
62 | */ | 53 | */ |
@@ -89,16 +80,6 @@ static void rm9k_perfcounter_irq_shutdown(unsigned int irq) | |||
89 | on_each_cpu(local_rm9k_perfcounter_irq_shutdown, (void *) irq, 0, 1); | 80 | on_each_cpu(local_rm9k_perfcounter_irq_shutdown, (void *) irq, 0, 1); |
90 | } | 81 | } |
91 | 82 | ||
92 | |||
93 | /* | ||
94 | * While we ack the interrupt interrupts are disabled and thus we don't need | ||
95 | * to deal with concurrency issues. Same for rm9k_cpu_irq_end. | ||
96 | */ | ||
97 | static void rm9k_cpu_irq_ack(unsigned int irq) | ||
98 | { | ||
99 | mask_rm9k_irq(irq); | ||
100 | } | ||
101 | |||
102 | static void rm9k_cpu_irq_end(unsigned int irq) | 83 | static void rm9k_cpu_irq_end(unsigned int irq) |
103 | { | 84 | { |
104 | if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) | 85 | if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) |
@@ -107,11 +88,10 @@ static void rm9k_cpu_irq_end(unsigned int irq) | |||
107 | 88 | ||
108 | static struct irq_chip rm9k_irq_controller = { | 89 | static struct irq_chip rm9k_irq_controller = { |
109 | .typename = "RM9000", | 90 | .typename = "RM9000", |
110 | .startup = rm9k_cpu_irq_startup, | 91 | .ack = mask_rm9k_irq, |
111 | .shutdown = rm9k_cpu_irq_shutdown, | 92 | .mask = mask_rm9k_irq, |
112 | .enable = rm9k_cpu_irq_enable, | 93 | .mask_ack = mask_rm9k_irq, |
113 | .disable = rm9k_cpu_irq_disable, | 94 | .unmask = unmask_rm9k_irq, |
114 | .ack = rm9k_cpu_irq_ack, | ||
115 | .end = rm9k_cpu_irq_end, | 95 | .end = rm9k_cpu_irq_end, |
116 | }; | 96 | }; |
117 | 97 | ||
@@ -119,9 +99,10 @@ static struct irq_chip rm9k_perfcounter_irq = { | |||
119 | .typename = "RM9000", | 99 | .typename = "RM9000", |
120 | .startup = rm9k_perfcounter_irq_startup, | 100 | .startup = rm9k_perfcounter_irq_startup, |
121 | .shutdown = rm9k_perfcounter_irq_shutdown, | 101 | .shutdown = rm9k_perfcounter_irq_shutdown, |
122 | .enable = rm9k_cpu_irq_enable, | 102 | .ack = mask_rm9k_irq, |
123 | .disable = rm9k_cpu_irq_disable, | 103 | .mask = mask_rm9k_irq, |
124 | .ack = rm9k_cpu_irq_ack, | 104 | .mask_ack = mask_rm9k_irq, |
105 | .unmask = unmask_rm9k_irq, | ||
125 | .end = rm9k_cpu_irq_end, | 106 | .end = rm9k_cpu_irq_end, |
126 | }; | 107 | }; |
127 | 108 | ||
@@ -135,15 +116,13 @@ void __init rm9k_cpu_irq_init(int base) | |||
135 | 116 | ||
136 | clear_c0_intcontrol(0x0000f000); /* Mask all */ | 117 | clear_c0_intcontrol(0x0000f000); /* Mask all */ |
137 | 118 | ||
138 | for (i = base; i < base + 4; i++) { | 119 | for (i = base; i < base + 4; i++) |
139 | irq_desc[i].status = IRQ_DISABLED; | 120 | set_irq_chip_and_handler(i, &rm9k_irq_controller, |
140 | irq_desc[i].action = NULL; | 121 | handle_level_irq); |
141 | irq_desc[i].depth = 1; | ||
142 | irq_desc[i].chip = &rm9k_irq_controller; | ||
143 | } | ||
144 | 122 | ||
145 | rm9000_perfcount_irq = base + 1; | 123 | rm9000_perfcount_irq = base + 1; |
146 | irq_desc[rm9000_perfcount_irq].chip = &rm9k_perfcounter_irq; | 124 | set_irq_chip_and_handler(rm9000_perfcount_irq, &rm9k_perfcounter_irq, |
125 | handle_level_irq); | ||
147 | 126 | ||
148 | irq_base = base; | 127 | irq_base = base; |
149 | } | 128 | } |
diff --git a/arch/mips/kernel/irq.c b/arch/mips/kernel/irq.c index 9b0e49d63d7b..b339798b3172 100644 --- a/arch/mips/kernel/irq.c +++ b/arch/mips/kernel/irq.c | |||
@@ -88,25 +88,6 @@ atomic_t irq_err_count; | |||
88 | unsigned long irq_hwmask[NR_IRQS]; | 88 | unsigned long irq_hwmask[NR_IRQS]; |
89 | #endif /* CONFIG_MIPS_MT_SMTC */ | 89 | #endif /* CONFIG_MIPS_MT_SMTC */ |
90 | 90 | ||
91 | #undef do_IRQ | ||
92 | |||
93 | /* | ||
94 | * do_IRQ handles all normal device IRQ's (the special | ||
95 | * SMP cross-CPU interrupts have their own specific | ||
96 | * handlers). | ||
97 | */ | ||
98 | asmlinkage unsigned int do_IRQ(unsigned int irq) | ||
99 | { | ||
100 | irq_enter(); | ||
101 | |||
102 | __DO_IRQ_SMTC_HOOK(); | ||
103 | __do_IRQ(irq); | ||
104 | |||
105 | irq_exit(); | ||
106 | |||
107 | return 1; | ||
108 | } | ||
109 | |||
110 | /* | 91 | /* |
111 | * Generic, controller-independent functions: | 92 | * Generic, controller-independent functions: |
112 | */ | 93 | */ |
@@ -172,19 +153,6 @@ __setup("nokgdb", nokgdb); | |||
172 | 153 | ||
173 | void __init init_IRQ(void) | 154 | void __init init_IRQ(void) |
174 | { | 155 | { |
175 | int i; | ||
176 | |||
177 | for (i = 0; i < NR_IRQS; i++) { | ||
178 | irq_desc[i].status = IRQ_DISABLED; | ||
179 | irq_desc[i].action = NULL; | ||
180 | irq_desc[i].depth = 1; | ||
181 | irq_desc[i].chip = &no_irq_chip; | ||
182 | spin_lock_init(&irq_desc[i].lock); | ||
183 | #ifdef CONFIG_MIPS_MT_SMTC | ||
184 | irq_hwmask[i] = 0; | ||
185 | #endif /* CONFIG_MIPS_MT_SMTC */ | ||
186 | } | ||
187 | |||
188 | arch_init_irq(); | 156 | arch_init_irq(); |
189 | 157 | ||
190 | #ifdef CONFIG_KGDB | 158 | #ifdef CONFIG_KGDB |
diff --git a/arch/mips/kernel/irq_cpu.c b/arch/mips/kernel/irq_cpu.c index 9bb21c7f2149..be5ac23d3812 100644 --- a/arch/mips/kernel/irq_cpu.c +++ b/arch/mips/kernel/irq_cpu.c | |||
@@ -50,44 +50,6 @@ static inline void mask_mips_irq(unsigned int irq) | |||
50 | irq_disable_hazard(); | 50 | irq_disable_hazard(); |
51 | } | 51 | } |
52 | 52 | ||
53 | static inline void mips_cpu_irq_enable(unsigned int irq) | ||
54 | { | ||
55 | unsigned long flags; | ||
56 | |||
57 | local_irq_save(flags); | ||
58 | unmask_mips_irq(irq); | ||
59 | back_to_back_c0_hazard(); | ||
60 | local_irq_restore(flags); | ||
61 | } | ||
62 | |||
63 | static void mips_cpu_irq_disable(unsigned int irq) | ||
64 | { | ||
65 | unsigned long flags; | ||
66 | |||
67 | local_irq_save(flags); | ||
68 | mask_mips_irq(irq); | ||
69 | back_to_back_c0_hazard(); | ||
70 | local_irq_restore(flags); | ||
71 | } | ||
72 | |||
73 | static unsigned int mips_cpu_irq_startup(unsigned int irq) | ||
74 | { | ||
75 | mips_cpu_irq_enable(irq); | ||
76 | |||
77 | return 0; | ||
78 | } | ||
79 | |||
80 | #define mips_cpu_irq_shutdown mips_cpu_irq_disable | ||
81 | |||
82 | /* | ||
83 | * While we ack the interrupt interrupts are disabled and thus we don't need | ||
84 | * to deal with concurrency issues. Same for mips_cpu_irq_end. | ||
85 | */ | ||
86 | static void mips_cpu_irq_ack(unsigned int irq) | ||
87 | { | ||
88 | mask_mips_irq(irq); | ||
89 | } | ||
90 | |||
91 | static void mips_cpu_irq_end(unsigned int irq) | 53 | static void mips_cpu_irq_end(unsigned int irq) |
92 | { | 54 | { |
93 | if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) | 55 | if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) |
@@ -96,11 +58,11 @@ static void mips_cpu_irq_end(unsigned int irq) | |||
96 | 58 | ||
97 | static struct irq_chip mips_cpu_irq_controller = { | 59 | static struct irq_chip mips_cpu_irq_controller = { |
98 | .typename = "MIPS", | 60 | .typename = "MIPS", |
99 | .startup = mips_cpu_irq_startup, | 61 | .ack = mask_mips_irq, |
100 | .shutdown = mips_cpu_irq_shutdown, | 62 | .mask = mask_mips_irq, |
101 | .enable = mips_cpu_irq_enable, | 63 | .mask_ack = mask_mips_irq, |
102 | .disable = mips_cpu_irq_disable, | 64 | .unmask = unmask_mips_irq, |
103 | .ack = mips_cpu_irq_ack, | 65 | .eoi = unmask_mips_irq, |
104 | .end = mips_cpu_irq_end, | 66 | .end = mips_cpu_irq_end, |
105 | }; | 67 | }; |
106 | 68 | ||
@@ -110,8 +72,6 @@ static struct irq_chip mips_cpu_irq_controller = { | |||
110 | 72 | ||
111 | #define unmask_mips_mt_irq unmask_mips_irq | 73 | #define unmask_mips_mt_irq unmask_mips_irq |
112 | #define mask_mips_mt_irq mask_mips_irq | 74 | #define mask_mips_mt_irq mask_mips_irq |
113 | #define mips_mt_cpu_irq_enable mips_cpu_irq_enable | ||
114 | #define mips_mt_cpu_irq_disable mips_cpu_irq_disable | ||
115 | 75 | ||
116 | static unsigned int mips_mt_cpu_irq_startup(unsigned int irq) | 76 | static unsigned int mips_mt_cpu_irq_startup(unsigned int irq) |
117 | { | 77 | { |
@@ -119,13 +79,11 @@ static unsigned int mips_mt_cpu_irq_startup(unsigned int irq) | |||
119 | 79 | ||
120 | clear_c0_cause(0x100 << (irq - mips_cpu_irq_base)); | 80 | clear_c0_cause(0x100 << (irq - mips_cpu_irq_base)); |
121 | evpe(vpflags); | 81 | evpe(vpflags); |
122 | mips_mt_cpu_irq_enable(irq); | 82 | unmask_mips_mt_irq(irq); |
123 | 83 | ||
124 | return 0; | 84 | return 0; |
125 | } | 85 | } |
126 | 86 | ||
127 | #define mips_mt_cpu_irq_shutdown mips_mt_cpu_irq_disable | ||
128 | |||
129 | /* | 87 | /* |
130 | * While we ack the interrupt interrupts are disabled and thus we don't need | 88 | * While we ack the interrupt interrupts are disabled and thus we don't need |
131 | * to deal with concurrency issues. Same for mips_cpu_irq_end. | 89 | * to deal with concurrency issues. Same for mips_cpu_irq_end. |
@@ -143,10 +101,11 @@ static void mips_mt_cpu_irq_ack(unsigned int irq) | |||
143 | static struct irq_chip mips_mt_cpu_irq_controller = { | 101 | static struct irq_chip mips_mt_cpu_irq_controller = { |
144 | .typename = "MIPS", | 102 | .typename = "MIPS", |
145 | .startup = mips_mt_cpu_irq_startup, | 103 | .startup = mips_mt_cpu_irq_startup, |
146 | .shutdown = mips_mt_cpu_irq_shutdown, | ||
147 | .enable = mips_mt_cpu_irq_enable, | ||
148 | .disable = mips_mt_cpu_irq_disable, | ||
149 | .ack = mips_mt_cpu_irq_ack, | 104 | .ack = mips_mt_cpu_irq_ack, |
105 | .mask = mask_mips_mt_irq, | ||
106 | .mask_ack = mips_mt_cpu_irq_ack, | ||
107 | .unmask = unmask_mips_mt_irq, | ||
108 | .eoi = unmask_mips_mt_irq, | ||
150 | .end = mips_mt_cpu_irq_end, | 109 | .end = mips_mt_cpu_irq_end, |
151 | }; | 110 | }; |
152 | 111 | ||
@@ -163,19 +122,12 @@ void __init mips_cpu_irq_init(int irq_base) | |||
163 | * leave them uninitialized for other processors. | 122 | * leave them uninitialized for other processors. |
164 | */ | 123 | */ |
165 | if (cpu_has_mipsmt) | 124 | if (cpu_has_mipsmt) |
166 | for (i = irq_base; i < irq_base + 2; i++) { | 125 | for (i = irq_base; i < irq_base + 2; i++) |
167 | irq_desc[i].status = IRQ_DISABLED; | 126 | set_irq_chip(i, &mips_mt_cpu_irq_controller); |
168 | irq_desc[i].action = NULL; | 127 | |
169 | irq_desc[i].depth = 1; | 128 | for (i = irq_base + 2; i < irq_base + 8; i++) |
170 | irq_desc[i].chip = &mips_mt_cpu_irq_controller; | 129 | set_irq_chip_and_handler(i, &mips_cpu_irq_controller, |
171 | } | 130 | handle_level_irq); |
172 | |||
173 | for (i = irq_base + 2; i < irq_base + 8; i++) { | ||
174 | irq_desc[i].status = IRQ_DISABLED; | ||
175 | irq_desc[i].action = NULL; | ||
176 | irq_desc[i].depth = 1; | ||
177 | irq_desc[i].chip = &mips_cpu_irq_controller; | ||
178 | } | ||
179 | 131 | ||
180 | mips_cpu_irq_base = irq_base; | 132 | mips_cpu_irq_base = irq_base; |
181 | } | 133 | } |
diff --git a/arch/mips/kernel/machine_kexec.c b/arch/mips/kernel/machine_kexec.c new file mode 100644 index 000000000000..e0ad754c7edd --- /dev/null +++ b/arch/mips/kernel/machine_kexec.c | |||
@@ -0,0 +1,85 @@ | |||
1 | /* | ||
2 | * machine_kexec.c for kexec | ||
3 | * Created by <nschichan@corp.free.fr> on Thu Oct 12 15:15:06 2006 | ||
4 | * | ||
5 | * This source code is licensed under the GNU General Public License, | ||
6 | * Version 2. See the file COPYING for more details. | ||
7 | */ | ||
8 | |||
9 | #include <linux/kexec.h> | ||
10 | #include <linux/mm.h> | ||
11 | #include <linux/delay.h> | ||
12 | |||
13 | #include <asm/cacheflush.h> | ||
14 | #include <asm/page.h> | ||
15 | |||
16 | const extern unsigned char relocate_new_kernel[]; | ||
17 | const extern unsigned int relocate_new_kernel_size; | ||
18 | |||
19 | extern unsigned long kexec_start_address; | ||
20 | extern unsigned long kexec_indirection_page; | ||
21 | |||
22 | int | ||
23 | machine_kexec_prepare(struct kimage *kimage) | ||
24 | { | ||
25 | return 0; | ||
26 | } | ||
27 | |||
28 | void | ||
29 | machine_kexec_cleanup(struct kimage *kimage) | ||
30 | { | ||
31 | } | ||
32 | |||
33 | void | ||
34 | machine_shutdown(void) | ||
35 | { | ||
36 | } | ||
37 | |||
38 | void | ||
39 | machine_crash_shutdown(struct pt_regs *regs) | ||
40 | { | ||
41 | } | ||
42 | |||
43 | void | ||
44 | machine_kexec(struct kimage *image) | ||
45 | { | ||
46 | unsigned long reboot_code_buffer; | ||
47 | unsigned long entry; | ||
48 | unsigned long *ptr; | ||
49 | |||
50 | reboot_code_buffer = | ||
51 | (unsigned long)page_address(image->control_code_page); | ||
52 | |||
53 | kexec_start_address = image->start; | ||
54 | kexec_indirection_page = phys_to_virt(image->head & PAGE_MASK); | ||
55 | |||
56 | memcpy((void*)reboot_code_buffer, relocate_new_kernel, | ||
57 | relocate_new_kernel_size); | ||
58 | |||
59 | /* | ||
60 | * The generic kexec code builds a page list with physical | ||
61 | * addresses. they are directly accessible through KSEG0 (or | ||
62 | * CKSEG0 or XPHYS if on 64bit system), hence the | ||
63 | * pys_to_virt() call. | ||
64 | */ | ||
65 | for (ptr = &image->head; (entry = *ptr) && !(entry &IND_DONE); | ||
66 | ptr = (entry & IND_INDIRECTION) ? | ||
67 | phys_to_virt(entry & PAGE_MASK) : ptr + 1) { | ||
68 | if (*ptr & IND_SOURCE || *ptr & IND_INDIRECTION || | ||
69 | *ptr & IND_DESTINATION) | ||
70 | *ptr = phys_to_virt(*ptr); | ||
71 | } | ||
72 | |||
73 | /* | ||
74 | * we do not want to be bothered. | ||
75 | */ | ||
76 | local_irq_disable(); | ||
77 | |||
78 | flush_icache_range(reboot_code_buffer, | ||
79 | reboot_code_buffer + KEXEC_CONTROL_CODE_SIZE); | ||
80 | |||
81 | printk("Will call new kernel at %08x\n", image->start); | ||
82 | printk("Bye ...\n"); | ||
83 | flush_cache_all(); | ||
84 | ((void (*)(void))reboot_code_buffer)(); | ||
85 | } | ||
diff --git a/arch/mips/kernel/module.c b/arch/mips/kernel/module.c index d7bf0215bc1d..cb0801437b66 100644 --- a/arch/mips/kernel/module.c +++ b/arch/mips/kernel/module.c | |||
@@ -29,6 +29,7 @@ | |||
29 | #include <linux/kernel.h> | 29 | #include <linux/kernel.h> |
30 | #include <linux/module.h> | 30 | #include <linux/module.h> |
31 | #include <linux/spinlock.h> | 31 | #include <linux/spinlock.h> |
32 | #include <asm/pgtable.h> /* MODULE_START */ | ||
32 | 33 | ||
33 | struct mips_hi16 { | 34 | struct mips_hi16 { |
34 | struct mips_hi16 *next; | 35 | struct mips_hi16 *next; |
@@ -43,9 +44,23 @@ static DEFINE_SPINLOCK(dbe_lock); | |||
43 | 44 | ||
44 | void *module_alloc(unsigned long size) | 45 | void *module_alloc(unsigned long size) |
45 | { | 46 | { |
47 | #ifdef MODULE_START | ||
48 | struct vm_struct *area; | ||
49 | |||
50 | size = PAGE_ALIGN(size); | ||
51 | if (!size) | ||
52 | return NULL; | ||
53 | |||
54 | area = __get_vm_area(size, VM_ALLOC, MODULE_START, MODULE_END); | ||
55 | if (!area) | ||
56 | return NULL; | ||
57 | |||
58 | return __vmalloc_area(area, GFP_KERNEL, PAGE_KERNEL); | ||
59 | #else | ||
46 | if (size == 0) | 60 | if (size == 0) |
47 | return NULL; | 61 | return NULL; |
48 | return vmalloc(size); | 62 | return vmalloc(size); |
63 | #endif | ||
49 | } | 64 | } |
50 | 65 | ||
51 | /* Free memory returned from module_alloc */ | 66 | /* Free memory returned from module_alloc */ |
diff --git a/arch/mips/kernel/relocate_kernel.S b/arch/mips/kernel/relocate_kernel.S new file mode 100644 index 000000000000..a3f0d00c1334 --- /dev/null +++ b/arch/mips/kernel/relocate_kernel.S | |||
@@ -0,0 +1,80 @@ | |||
1 | /* | ||
2 | * relocate_kernel.S for kexec | ||
3 | * Created by <nschichan@corp.free.fr> on Thu Oct 12 17:49:57 2006 | ||
4 | * | ||
5 | * This source code is licensed under the GNU General Public License, | ||
6 | * Version 2. See the file COPYING for more details. | ||
7 | */ | ||
8 | |||
9 | #include <asm/asm.h> | ||
10 | #include <asm/asmmacro.h> | ||
11 | #include <asm/regdef.h> | ||
12 | #include <asm/page.h> | ||
13 | #include <asm/mipsregs.h> | ||
14 | #include <asm/stackframe.h> | ||
15 | #include <asm/addrspace.h> | ||
16 | |||
17 | .globl relocate_new_kernel | ||
18 | relocate_new_kernel: | ||
19 | |||
20 | PTR_L s0, kexec_indirection_page | ||
21 | PTR_L s1, kexec_start_address | ||
22 | |||
23 | process_entry: | ||
24 | PTR_L s2, (s0) | ||
25 | PTR_ADD s0, s0, SZREG | ||
26 | |||
27 | /* destination page */ | ||
28 | and s3, s2, 0x1 | ||
29 | beq s3, zero, 1f | ||
30 | and s4, s2, ~0x1 /* store destination addr in s4 */ | ||
31 | move a0, s4 | ||
32 | b process_entry | ||
33 | |||
34 | 1: | ||
35 | /* indirection page, update s0 */ | ||
36 | and s3, s2, 0x2 | ||
37 | beq s3, zero, 1f | ||
38 | and s0, s2, ~0x2 | ||
39 | b process_entry | ||
40 | |||
41 | 1: | ||
42 | /* done page */ | ||
43 | and s3, s2, 0x4 | ||
44 | beq s3, zero, 1f | ||
45 | b done | ||
46 | 1: | ||
47 | /* source page */ | ||
48 | and s3, s2, 0x8 | ||
49 | beq s3, zero, process_entry | ||
50 | and s2, s2, ~0x8 | ||
51 | li s6, (1 << PAGE_SHIFT) / SZREG | ||
52 | |||
53 | copy_word: | ||
54 | /* copy page word by word */ | ||
55 | REG_L s5, (s2) | ||
56 | REG_S s5, (s4) | ||
57 | INT_ADD s4, s4, SZREG | ||
58 | INT_ADD s2, s2, SZREG | ||
59 | INT_SUB s6, s6, 1 | ||
60 | beq s6, zero, process_entry | ||
61 | b copy_word | ||
62 | b process_entry | ||
63 | |||
64 | done: | ||
65 | /* jump to kexec_start_address */ | ||
66 | j s1 | ||
67 | |||
68 | .globl kexec_start_address | ||
69 | kexec_start_address: | ||
70 | .long 0x0 | ||
71 | |||
72 | .globl kexec_indirection_page | ||
73 | kexec_indirection_page: | ||
74 | .long 0x0 | ||
75 | |||
76 | relocate_new_kernel_end: | ||
77 | |||
78 | .globl relocate_new_kernel_size | ||
79 | relocate_new_kernel_size: | ||
80 | .long relocate_new_kernel_end - relocate_new_kernel | ||
diff --git a/arch/mips/kernel/scall32-o32.S b/arch/mips/kernel/scall32-o32.S index a95f37de080e..7c0b3936ba44 100644 --- a/arch/mips/kernel/scall32-o32.S +++ b/arch/mips/kernel/scall32-o32.S | |||
@@ -653,7 +653,7 @@ einval: li v0, -EINVAL | |||
653 | sys sys_move_pages 6 | 653 | sys sys_move_pages 6 |
654 | sys sys_set_robust_list 2 | 654 | sys sys_set_robust_list 2 |
655 | sys sys_get_robust_list 3 /* 4310 */ | 655 | sys sys_get_robust_list 3 /* 4310 */ |
656 | sys sys_ni_syscall 0 | 656 | sys sys_kexec_load 4 |
657 | sys sys_getcpu 3 | 657 | sys sys_getcpu 3 |
658 | sys sys_epoll_pwait 6 | 658 | sys sys_epoll_pwait 6 |
659 | .endm | 659 | .endm |
diff --git a/arch/mips/kernel/scall64-64.S b/arch/mips/kernel/scall64-64.S index 8fb0f60f657b..e569b846e9a3 100644 --- a/arch/mips/kernel/scall64-64.S +++ b/arch/mips/kernel/scall64-64.S | |||
@@ -468,6 +468,6 @@ sys_call_table: | |||
468 | PTR sys_move_pages | 468 | PTR sys_move_pages |
469 | PTR sys_set_robust_list | 469 | PTR sys_set_robust_list |
470 | PTR sys_get_robust_list | 470 | PTR sys_get_robust_list |
471 | PTR sys_ni_syscall /* 5270 */ | 471 | PTR sys_kexec_load /* 5270 */ |
472 | PTR sys_getcpu | 472 | PTR sys_getcpu |
473 | PTR sys_epoll_pwait | 473 | PTR sys_epoll_pwait |
diff --git a/arch/mips/kernel/scall64-n32.S b/arch/mips/kernel/scall64-n32.S index 0da5ca2040ff..5b18f265d75b 100644 --- a/arch/mips/kernel/scall64-n32.S +++ b/arch/mips/kernel/scall64-n32.S | |||
@@ -394,6 +394,6 @@ EXPORT(sysn32_call_table) | |||
394 | PTR sys_move_pages | 394 | PTR sys_move_pages |
395 | PTR compat_sys_set_robust_list | 395 | PTR compat_sys_set_robust_list |
396 | PTR compat_sys_get_robust_list | 396 | PTR compat_sys_get_robust_list |
397 | PTR sys_ni_syscall | 397 | PTR compat_sys_kexec_load |
398 | PTR sys_getcpu | 398 | PTR sys_getcpu |
399 | PTR sys_epoll_pwait | 399 | PTR sys_epoll_pwait |
diff --git a/arch/mips/kernel/scall64-o32.S b/arch/mips/kernel/scall64-o32.S index b9d00cae8b5f..e91379c1be1d 100644 --- a/arch/mips/kernel/scall64-o32.S +++ b/arch/mips/kernel/scall64-o32.S | |||
@@ -516,7 +516,7 @@ sys_call_table: | |||
516 | PTR compat_sys_move_pages | 516 | PTR compat_sys_move_pages |
517 | PTR compat_sys_set_robust_list | 517 | PTR compat_sys_set_robust_list |
518 | PTR compat_sys_get_robust_list /* 4310 */ | 518 | PTR compat_sys_get_robust_list /* 4310 */ |
519 | PTR sys_ni_syscall | 519 | PTR compat_sys_kexec_load |
520 | PTR sys_getcpu | 520 | PTR sys_getcpu |
521 | PTR sys_epoll_pwait | 521 | PTR sys_epoll_pwait |
522 | .size sys_call_table,.-sys_call_table | 522 | .size sys_call_table,.-sys_call_table |
diff --git a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c index 8f6e89697ccf..89440a0d8528 100644 --- a/arch/mips/kernel/setup.c +++ b/arch/mips/kernel/setup.c | |||
@@ -145,13 +145,12 @@ static int __init rd_start_early(char *p) | |||
145 | unsigned long start = memparse(p, &p); | 145 | unsigned long start = memparse(p, &p); |
146 | 146 | ||
147 | #ifdef CONFIG_64BIT | 147 | #ifdef CONFIG_64BIT |
148 | /* HACK: Guess if the sign extension was forgotten */ | 148 | /* Guess if the sign extension was forgotten by bootloader */ |
149 | if (start > 0x0000000080000000 && start < 0x00000000ffffffff) | 149 | if (start < XKPHYS) |
150 | start |= 0xffffffff00000000UL; | 150 | start = (int)start; |
151 | #endif | 151 | #endif |
152 | initrd_start = start; | 152 | initrd_start = start; |
153 | initrd_end += start; | 153 | initrd_end += start; |
154 | |||
155 | return 0; | 154 | return 0; |
156 | } | 155 | } |
157 | early_param("rd_start", rd_start_early); | 156 | early_param("rd_start", rd_start_early); |
@@ -159,41 +158,64 @@ early_param("rd_start", rd_start_early); | |||
159 | static int __init rd_size_early(char *p) | 158 | static int __init rd_size_early(char *p) |
160 | { | 159 | { |
161 | initrd_end += memparse(p, &p); | 160 | initrd_end += memparse(p, &p); |
162 | |||
163 | return 0; | 161 | return 0; |
164 | } | 162 | } |
165 | early_param("rd_size", rd_size_early); | 163 | early_param("rd_size", rd_size_early); |
166 | 164 | ||
165 | /* it returns the next free pfn after initrd */ | ||
167 | static unsigned long __init init_initrd(void) | 166 | static unsigned long __init init_initrd(void) |
168 | { | 167 | { |
169 | unsigned long tmp, end, size; | 168 | unsigned long end; |
170 | u32 *initrd_header; | 169 | u32 *initrd_header; |
171 | 170 | ||
172 | ROOT_DEV = Root_RAM0; | ||
173 | |||
174 | /* | 171 | /* |
175 | * Board specific code or command line parser should have | 172 | * Board specific code or command line parser should have |
176 | * already set up initrd_start and initrd_end. In these cases | 173 | * already set up initrd_start and initrd_end. In these cases |
177 | * perfom sanity checks and use them if all looks good. | 174 | * perfom sanity checks and use them if all looks good. |
178 | */ | 175 | */ |
179 | size = initrd_end - initrd_start; | 176 | if (initrd_start && initrd_end > initrd_start) |
180 | if (initrd_end == 0 || size == 0) { | 177 | goto sanitize; |
181 | initrd_start = 0; | 178 | |
182 | initrd_end = 0; | 179 | /* |
183 | } else | 180 | * See if initrd has been added to the kernel image by |
184 | return initrd_end; | 181 | * arch/mips/boot/addinitrd.c. In that case a header is |
185 | 182 | * prepended to initrd and is made up by 8 bytes. The fisrt | |
186 | end = (unsigned long)&_end; | 183 | * word is a magic number and the second one is the size of |
187 | tmp = PAGE_ALIGN(end) - sizeof(u32) * 2; | 184 | * initrd. Initrd start must be page aligned in any cases. |
188 | if (tmp < end) | 185 | */ |
189 | tmp += PAGE_SIZE; | 186 | initrd_header = __va(PAGE_ALIGN(__pa_symbol(&_end) + 8)) - 8; |
190 | 187 | if (initrd_header[0] != 0x494E5244) | |
191 | initrd_header = (u32 *)tmp; | 188 | goto disable; |
192 | if (initrd_header[0] == 0x494E5244) { | 189 | initrd_start = (unsigned long)(initrd_header + 2); |
193 | initrd_start = (unsigned long)&initrd_header[2]; | 190 | initrd_end = initrd_start + initrd_header[1]; |
194 | initrd_end = initrd_start + initrd_header[1]; | 191 | |
192 | sanitize: | ||
193 | if (initrd_start & ~PAGE_MASK) { | ||
194 | printk(KERN_ERR "initrd start must be page aligned\n"); | ||
195 | goto disable; | ||
195 | } | 196 | } |
196 | return initrd_end; | 197 | if (initrd_start < PAGE_OFFSET) { |
198 | printk(KERN_ERR "initrd start < PAGE_OFFSET\n"); | ||
199 | goto disable; | ||
200 | } | ||
201 | |||
202 | /* | ||
203 | * Sanitize initrd addresses. For example firmware | ||
204 | * can't guess if they need to pass them through | ||
205 | * 64-bits values if the kernel has been built in pure | ||
206 | * 32-bit. We need also to switch from KSEG0 to XKPHYS | ||
207 | * addresses now, so the code can now safely use __pa(). | ||
208 | */ | ||
209 | end = __pa(initrd_end); | ||
210 | initrd_end = (unsigned long)__va(end); | ||
211 | initrd_start = (unsigned long)__va(__pa(initrd_start)); | ||
212 | |||
213 | ROOT_DEV = Root_RAM0; | ||
214 | return PFN_UP(end); | ||
215 | disable: | ||
216 | initrd_start = 0; | ||
217 | initrd_end = 0; | ||
218 | return 0; | ||
197 | } | 219 | } |
198 | 220 | ||
199 | static void __init finalize_initrd(void) | 221 | static void __init finalize_initrd(void) |
@@ -204,12 +226,12 @@ static void __init finalize_initrd(void) | |||
204 | printk(KERN_INFO "Initrd not found or empty"); | 226 | printk(KERN_INFO "Initrd not found or empty"); |
205 | goto disable; | 227 | goto disable; |
206 | } | 228 | } |
207 | if (CPHYSADDR(initrd_end) > PFN_PHYS(max_low_pfn)) { | 229 | if (__pa(initrd_end) > PFN_PHYS(max_low_pfn)) { |
208 | printk("Initrd extends beyond end of memory"); | 230 | printk("Initrd extends beyond end of memory"); |
209 | goto disable; | 231 | goto disable; |
210 | } | 232 | } |
211 | 233 | ||
212 | reserve_bootmem(CPHYSADDR(initrd_start), size); | 234 | reserve_bootmem(__pa(initrd_start), size); |
213 | initrd_below_start_ok = 1; | 235 | initrd_below_start_ok = 1; |
214 | 236 | ||
215 | printk(KERN_INFO "Initial ramdisk at: 0x%lx (%lu bytes)\n", | 237 | printk(KERN_INFO "Initial ramdisk at: 0x%lx (%lu bytes)\n", |
@@ -259,8 +281,7 @@ static void __init bootmem_init(void) | |||
259 | * not selected. Once that done we can determine the low bound | 281 | * not selected. Once that done we can determine the low bound |
260 | * of usable memory. | 282 | * of usable memory. |
261 | */ | 283 | */ |
262 | reserved_end = init_initrd(); | 284 | reserved_end = max(init_initrd(), PFN_UP(__pa_symbol(&_end))); |
263 | reserved_end = PFN_UP(CPHYSADDR(max(reserved_end, (unsigned long)&_end))); | ||
264 | 285 | ||
265 | /* | 286 | /* |
266 | * Find the highest page frame number we have available. | 287 | * Find the highest page frame number we have available. |
@@ -432,10 +453,10 @@ static void __init resource_init(void) | |||
432 | if (UNCAC_BASE != IO_BASE) | 453 | if (UNCAC_BASE != IO_BASE) |
433 | return; | 454 | return; |
434 | 455 | ||
435 | code_resource.start = virt_to_phys(&_text); | 456 | code_resource.start = __pa_symbol(&_text); |
436 | code_resource.end = virt_to_phys(&_etext) - 1; | 457 | code_resource.end = __pa_symbol(&_etext) - 1; |
437 | data_resource.start = virt_to_phys(&_etext); | 458 | data_resource.start = __pa_symbol(&_etext); |
438 | data_resource.end = virt_to_phys(&_edata) - 1; | 459 | data_resource.end = __pa_symbol(&_edata) - 1; |
439 | 460 | ||
440 | /* | 461 | /* |
441 | * Request address space for all standard RAM. | 462 | * Request address space for all standard RAM. |
diff --git a/arch/mips/kernel/signal_n32.c b/arch/mips/kernel/signal_n32.c index 477c5334ec1b..a67c18555ed3 100644 --- a/arch/mips/kernel/signal_n32.c +++ b/arch/mips/kernel/signal_n32.c | |||
@@ -17,7 +17,6 @@ | |||
17 | */ | 17 | */ |
18 | #include <linux/cache.h> | 18 | #include <linux/cache.h> |
19 | #include <linux/sched.h> | 19 | #include <linux/sched.h> |
20 | #include <linux/sched.h> | ||
21 | #include <linux/mm.h> | 20 | #include <linux/mm.h> |
22 | #include <linux/smp.h> | 21 | #include <linux/smp.h> |
23 | #include <linux/smp_lock.h> | 22 | #include <linux/smp_lock.h> |
diff --git a/arch/mips/kernel/smp-mt.c b/arch/mips/kernel/smp-mt.c index 2ac19a6cbf68..1ee689c0e0c9 100644 --- a/arch/mips/kernel/smp-mt.c +++ b/arch/mips/kernel/smp-mt.c | |||
@@ -278,7 +278,9 @@ void __init plat_prepare_cpus(unsigned int max_cpus) | |||
278 | 278 | ||
279 | /* need to mark IPI's as IRQ_PER_CPU */ | 279 | /* need to mark IPI's as IRQ_PER_CPU */ |
280 | irq_desc[cpu_ipi_resched_irq].status |= IRQ_PER_CPU; | 280 | irq_desc[cpu_ipi_resched_irq].status |= IRQ_PER_CPU; |
281 | set_irq_handler(cpu_ipi_resched_irq, handle_percpu_irq); | ||
281 | irq_desc[cpu_ipi_call_irq].status |= IRQ_PER_CPU; | 282 | irq_desc[cpu_ipi_call_irq].status |= IRQ_PER_CPU; |
283 | set_irq_handler(cpu_ipi_call_irq, handle_percpu_irq); | ||
282 | } | 284 | } |
283 | 285 | ||
284 | /* | 286 | /* |
diff --git a/arch/mips/kernel/smp.c b/arch/mips/kernel/smp.c index db80957ada89..49db516789e0 100644 --- a/arch/mips/kernel/smp.c +++ b/arch/mips/kernel/smp.c | |||
@@ -463,28 +463,5 @@ void flush_tlb_one(unsigned long vaddr) | |||
463 | smp_on_each_tlb(flush_tlb_one_ipi, (void *) vaddr); | 463 | smp_on_each_tlb(flush_tlb_one_ipi, (void *) vaddr); |
464 | } | 464 | } |
465 | 465 | ||
466 | static DEFINE_PER_CPU(struct cpu, cpu_devices); | ||
467 | |||
468 | static int __init topology_init(void) | ||
469 | { | ||
470 | int i, ret; | ||
471 | |||
472 | #ifdef CONFIG_NUMA | ||
473 | for_each_online_node(i) | ||
474 | register_one_node(i); | ||
475 | #endif /* CONFIG_NUMA */ | ||
476 | |||
477 | for_each_present_cpu(i) { | ||
478 | ret = register_cpu(&per_cpu(cpu_devices, i), i); | ||
479 | if (ret) | ||
480 | printk(KERN_WARNING "topology_init: register_cpu %d " | ||
481 | "failed (%d)\n", i, ret); | ||
482 | } | ||
483 | |||
484 | return 0; | ||
485 | } | ||
486 | |||
487 | subsys_initcall(topology_init); | ||
488 | |||
489 | EXPORT_SYMBOL(flush_tlb_page); | 466 | EXPORT_SYMBOL(flush_tlb_page); |
490 | EXPORT_SYMBOL(flush_tlb_one); | 467 | EXPORT_SYMBOL(flush_tlb_one); |
diff --git a/arch/mips/kernel/smtc.c b/arch/mips/kernel/smtc.c index 3b78caf112f5..802febed7df5 100644 --- a/arch/mips/kernel/smtc.c +++ b/arch/mips/kernel/smtc.c | |||
@@ -1009,6 +1009,7 @@ void setup_cross_vpe_interrupts(void) | |||
1009 | setup_irq_smtc(cpu_ipi_irq, &irq_ipi, (0x100 << MIPS_CPU_IPI_IRQ)); | 1009 | setup_irq_smtc(cpu_ipi_irq, &irq_ipi, (0x100 << MIPS_CPU_IPI_IRQ)); |
1010 | 1010 | ||
1011 | irq_desc[cpu_ipi_irq].status |= IRQ_PER_CPU; | 1011 | irq_desc[cpu_ipi_irq].status |= IRQ_PER_CPU; |
1012 | set_irq_handler(cpu_ipi_irq, handle_percpu_irq); | ||
1012 | } | 1013 | } |
1013 | 1014 | ||
1014 | /* | 1015 | /* |
diff --git a/arch/mips/kernel/time.c b/arch/mips/kernel/time.c index e535f86efa2f..11aab6d6bfe5 100644 --- a/arch/mips/kernel/time.c +++ b/arch/mips/kernel/time.c | |||
@@ -11,7 +11,6 @@ | |||
11 | * Free Software Foundation; either version 2 of the License, or (at your | 11 | * Free Software Foundation; either version 2 of the License, or (at your |
12 | * option) any later version. | 12 | * option) any later version. |
13 | */ | 13 | */ |
14 | #include <linux/clocksource.h> | ||
15 | #include <linux/types.h> | 14 | #include <linux/types.h> |
16 | #include <linux/kernel.h> | 15 | #include <linux/kernel.h> |
17 | #include <linux/init.h> | 16 | #include <linux/init.h> |
@@ -83,17 +82,11 @@ static void null_timer_ack(void) { /* nothing */ } | |||
83 | /* | 82 | /* |
84 | * Null high precision timer functions for systems lacking one. | 83 | * Null high precision timer functions for systems lacking one. |
85 | */ | 84 | */ |
86 | static unsigned int null_hpt_read(void) | 85 | static cycle_t null_hpt_read(void) |
87 | { | 86 | { |
88 | return 0; | 87 | return 0; |
89 | } | 88 | } |
90 | 89 | ||
91 | static void __init null_hpt_init(void) | ||
92 | { | ||
93 | /* nothing */ | ||
94 | } | ||
95 | |||
96 | |||
97 | /* | 90 | /* |
98 | * Timer ack for an R4k-compatible timer of a known frequency. | 91 | * Timer ack for an R4k-compatible timer of a known frequency. |
99 | */ | 92 | */ |
@@ -118,7 +111,7 @@ static void c0_timer_ack(void) | |||
118 | /* | 111 | /* |
119 | * High precision timer functions for a R4k-compatible timer. | 112 | * High precision timer functions for a R4k-compatible timer. |
120 | */ | 113 | */ |
121 | static unsigned int c0_hpt_read(void) | 114 | static cycle_t c0_hpt_read(void) |
122 | { | 115 | { |
123 | return read_c0_count(); | 116 | return read_c0_count(); |
124 | } | 117 | } |
@@ -132,9 +125,6 @@ static void __init c0_hpt_timer_init(void) | |||
132 | 125 | ||
133 | int (*mips_timer_state)(void); | 126 | int (*mips_timer_state)(void); |
134 | void (*mips_timer_ack)(void); | 127 | void (*mips_timer_ack)(void); |
135 | unsigned int (*mips_hpt_read)(void); | ||
136 | void (*mips_hpt_init)(void) __initdata = null_hpt_init; | ||
137 | unsigned int mips_hpt_mask = 0xffffffff; | ||
138 | 128 | ||
139 | /* last time when xtime and rtc are sync'ed up */ | 129 | /* last time when xtime and rtc are sync'ed up */ |
140 | static long last_rtc_update; | 130 | static long last_rtc_update; |
@@ -276,8 +266,7 @@ static struct irqaction timer_irqaction = { | |||
276 | 266 | ||
277 | static unsigned int __init calibrate_hpt(void) | 267 | static unsigned int __init calibrate_hpt(void) |
278 | { | 268 | { |
279 | u64 frequency; | 269 | cycle_t frequency, hpt_start, hpt_end, hpt_count, hz; |
280 | u32 hpt_start, hpt_end, hpt_count, hz; | ||
281 | 270 | ||
282 | const int loops = HZ / 10; | 271 | const int loops = HZ / 10; |
283 | int log_2_loops = 0; | 272 | int log_2_loops = 0; |
@@ -303,28 +292,23 @@ static unsigned int __init calibrate_hpt(void) | |||
303 | * during the calculated number of periods between timer | 292 | * during the calculated number of periods between timer |
304 | * interrupts. | 293 | * interrupts. |
305 | */ | 294 | */ |
306 | hpt_start = mips_hpt_read(); | 295 | hpt_start = clocksource_mips.read(); |
307 | do { | 296 | do { |
308 | while (mips_timer_state()); | 297 | while (mips_timer_state()); |
309 | while (!mips_timer_state()); | 298 | while (!mips_timer_state()); |
310 | } while (--i); | 299 | } while (--i); |
311 | hpt_end = mips_hpt_read(); | 300 | hpt_end = clocksource_mips.read(); |
312 | 301 | ||
313 | hpt_count = (hpt_end - hpt_start) & mips_hpt_mask; | 302 | hpt_count = (hpt_end - hpt_start) & clocksource_mips.mask; |
314 | hz = HZ; | 303 | hz = HZ; |
315 | frequency = (u64)hpt_count * (u64)hz; | 304 | frequency = hpt_count * hz; |
316 | 305 | ||
317 | return frequency >> log_2_loops; | 306 | return frequency >> log_2_loops; |
318 | } | 307 | } |
319 | 308 | ||
320 | static cycle_t read_mips_hpt(void) | 309 | struct clocksource clocksource_mips = { |
321 | { | ||
322 | return (cycle_t)mips_hpt_read(); | ||
323 | } | ||
324 | |||
325 | static struct clocksource clocksource_mips = { | ||
326 | .name = "MIPS", | 310 | .name = "MIPS", |
327 | .read = read_mips_hpt, | 311 | .mask = 0xffffffff, |
328 | .is_continuous = 1, | 312 | .is_continuous = 1, |
329 | }; | 313 | }; |
330 | 314 | ||
@@ -333,7 +317,7 @@ static void __init init_mips_clocksource(void) | |||
333 | u64 temp; | 317 | u64 temp; |
334 | u32 shift; | 318 | u32 shift; |
335 | 319 | ||
336 | if (!mips_hpt_frequency || mips_hpt_read == null_hpt_read) | 320 | if (!mips_hpt_frequency || clocksource_mips.read == null_hpt_read) |
337 | return; | 321 | return; |
338 | 322 | ||
339 | /* Calclate a somewhat reasonable rating value */ | 323 | /* Calclate a somewhat reasonable rating value */ |
@@ -347,7 +331,6 @@ static void __init init_mips_clocksource(void) | |||
347 | } | 331 | } |
348 | clocksource_mips.shift = shift; | 332 | clocksource_mips.shift = shift; |
349 | clocksource_mips.mult = (u32)temp; | 333 | clocksource_mips.mult = (u32)temp; |
350 | clocksource_mips.mask = mips_hpt_mask; | ||
351 | 334 | ||
352 | clocksource_register(&clocksource_mips); | 335 | clocksource_register(&clocksource_mips); |
353 | } | 336 | } |
@@ -367,32 +350,36 @@ void __init time_init(void) | |||
367 | -xtime.tv_sec, -xtime.tv_nsec); | 350 | -xtime.tv_sec, -xtime.tv_nsec); |
368 | 351 | ||
369 | /* Choose appropriate high precision timer routines. */ | 352 | /* Choose appropriate high precision timer routines. */ |
370 | if (!cpu_has_counter && !mips_hpt_read) | 353 | if (!cpu_has_counter && !clocksource_mips.read) |
371 | /* No high precision timer -- sorry. */ | 354 | /* No high precision timer -- sorry. */ |
372 | mips_hpt_read = null_hpt_read; | 355 | clocksource_mips.read = null_hpt_read; |
373 | else if (!mips_hpt_frequency && !mips_timer_state) { | 356 | else if (!mips_hpt_frequency && !mips_timer_state) { |
374 | /* A high precision timer of unknown frequency. */ | 357 | /* A high precision timer of unknown frequency. */ |
375 | if (!mips_hpt_read) | 358 | if (!clocksource_mips.read) |
376 | /* No external high precision timer -- use R4k. */ | 359 | /* No external high precision timer -- use R4k. */ |
377 | mips_hpt_read = c0_hpt_read; | 360 | clocksource_mips.read = c0_hpt_read; |
378 | } else { | 361 | } else { |
379 | /* We know counter frequency. Or we can get it. */ | 362 | /* We know counter frequency. Or we can get it. */ |
380 | if (!mips_hpt_read) { | 363 | if (!clocksource_mips.read) { |
381 | /* No external high precision timer -- use R4k. */ | 364 | /* No external high precision timer -- use R4k. */ |
382 | mips_hpt_read = c0_hpt_read; | 365 | clocksource_mips.read = c0_hpt_read; |
383 | 366 | ||
384 | if (!mips_timer_state) { | 367 | if (!mips_timer_state) { |
385 | /* No external timer interrupt -- use R4k. */ | 368 | /* No external timer interrupt -- use R4k. */ |
386 | mips_hpt_init = c0_hpt_timer_init; | ||
387 | mips_timer_ack = c0_timer_ack; | 369 | mips_timer_ack = c0_timer_ack; |
370 | /* Calculate cache parameters. */ | ||
371 | cycles_per_jiffy = | ||
372 | (mips_hpt_frequency + HZ / 2) / HZ; | ||
373 | /* | ||
374 | * This sets up the high precision | ||
375 | * timer for the first interrupt. | ||
376 | */ | ||
377 | c0_hpt_timer_init(); | ||
388 | } | 378 | } |
389 | } | 379 | } |
390 | if (!mips_hpt_frequency) | 380 | if (!mips_hpt_frequency) |
391 | mips_hpt_frequency = calibrate_hpt(); | 381 | mips_hpt_frequency = calibrate_hpt(); |
392 | 382 | ||
393 | /* Calculate cache parameters. */ | ||
394 | cycles_per_jiffy = (mips_hpt_frequency + HZ / 2) / HZ; | ||
395 | |||
396 | /* Report the high precision timer rate for a reference. */ | 383 | /* Report the high precision timer rate for a reference. */ |
397 | printk("Using %u.%03u MHz high precision timer.\n", | 384 | printk("Using %u.%03u MHz high precision timer.\n", |
398 | ((mips_hpt_frequency + 500) / 1000) / 1000, | 385 | ((mips_hpt_frequency + 500) / 1000) / 1000, |
@@ -403,9 +390,6 @@ void __init time_init(void) | |||
403 | /* No timer interrupt ack (e.g. i8254). */ | 390 | /* No timer interrupt ack (e.g. i8254). */ |
404 | mips_timer_ack = null_timer_ack; | 391 | mips_timer_ack = null_timer_ack; |
405 | 392 | ||
406 | /* This sets up the high precision timer for the first interrupt. */ | ||
407 | mips_hpt_init(); | ||
408 | |||
409 | /* | 393 | /* |
410 | * Call board specific timer interrupt setup. | 394 | * Call board specific timer interrupt setup. |
411 | * | 395 | * |
diff --git a/arch/mips/kernel/topology.c b/arch/mips/kernel/topology.c new file mode 100644 index 000000000000..660e44ed44d7 --- /dev/null +++ b/arch/mips/kernel/topology.c | |||
@@ -0,0 +1,29 @@ | |||
1 | #include <linux/cpu.h> | ||
2 | #include <linux/cpumask.h> | ||
3 | #include <linux/init.h> | ||
4 | #include <linux/node.h> | ||
5 | #include <linux/nodemask.h> | ||
6 | #include <linux/percpu.h> | ||
7 | |||
8 | static DEFINE_PER_CPU(struct cpu, cpu_devices); | ||
9 | |||
10 | static int __init topology_init(void) | ||
11 | { | ||
12 | int i, ret; | ||
13 | |||
14 | #ifdef CONFIG_NUMA | ||
15 | for_each_online_node(i) | ||
16 | register_one_node(i); | ||
17 | #endif /* CONFIG_NUMA */ | ||
18 | |||
19 | for_each_present_cpu(i) { | ||
20 | ret = register_cpu(&per_cpu(cpu_devices, i), i); | ||
21 | if (ret) | ||
22 | printk(KERN_WARNING "topology_init: register_cpu %d " | ||
23 | "failed (%d)\n", i, ret); | ||
24 | } | ||
25 | |||
26 | return 0; | ||
27 | } | ||
28 | |||
29 | subsys_initcall(topology_init); | ||
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c index 9fda1b8be3a7..2a932cada244 100644 --- a/arch/mips/kernel/traps.c +++ b/arch/mips/kernel/traps.c | |||
@@ -54,6 +54,8 @@ extern asmlinkage void handle_dbe(void); | |||
54 | extern asmlinkage void handle_sys(void); | 54 | extern asmlinkage void handle_sys(void); |
55 | extern asmlinkage void handle_bp(void); | 55 | extern asmlinkage void handle_bp(void); |
56 | extern asmlinkage void handle_ri(void); | 56 | extern asmlinkage void handle_ri(void); |
57 | extern asmlinkage void handle_ri_rdhwr_vivt(void); | ||
58 | extern asmlinkage void handle_ri_rdhwr(void); | ||
57 | extern asmlinkage void handle_cpu(void); | 59 | extern asmlinkage void handle_cpu(void); |
58 | extern asmlinkage void handle_ov(void); | 60 | extern asmlinkage void handle_ov(void); |
59 | extern asmlinkage void handle_tr(void); | 61 | extern asmlinkage void handle_tr(void); |
@@ -397,19 +399,6 @@ asmlinkage void do_be(struct pt_regs *regs) | |||
397 | force_sig(SIGBUS, current); | 399 | force_sig(SIGBUS, current); |
398 | } | 400 | } |
399 | 401 | ||
400 | static inline int get_insn_opcode(struct pt_regs *regs, unsigned int *opcode) | ||
401 | { | ||
402 | unsigned int __user *epc; | ||
403 | |||
404 | epc = (unsigned int __user *) regs->cp0_epc + | ||
405 | ((regs->cp0_cause & CAUSEF_BD) != 0); | ||
406 | if (!get_user(*opcode, epc)) | ||
407 | return 0; | ||
408 | |||
409 | force_sig(SIGSEGV, current); | ||
410 | return 1; | ||
411 | } | ||
412 | |||
413 | /* | 402 | /* |
414 | * ll/sc emulation | 403 | * ll/sc emulation |
415 | */ | 404 | */ |
@@ -544,8 +533,8 @@ static inline int simulate_llsc(struct pt_regs *regs) | |||
544 | { | 533 | { |
545 | unsigned int opcode; | 534 | unsigned int opcode; |
546 | 535 | ||
547 | if (unlikely(get_insn_opcode(regs, &opcode))) | 536 | if (get_user(opcode, (unsigned int __user *) exception_epc(regs))) |
548 | return -EFAULT; | 537 | goto out_sigsegv; |
549 | 538 | ||
550 | if ((opcode & OPCODE) == LL) { | 539 | if ((opcode & OPCODE) == LL) { |
551 | simulate_ll(regs, opcode); | 540 | simulate_ll(regs, opcode); |
@@ -557,6 +546,10 @@ static inline int simulate_llsc(struct pt_regs *regs) | |||
557 | } | 546 | } |
558 | 547 | ||
559 | return -EFAULT; /* Strange things going on ... */ | 548 | return -EFAULT; /* Strange things going on ... */ |
549 | |||
550 | out_sigsegv: | ||
551 | force_sig(SIGSEGV, current); | ||
552 | return -EFAULT; | ||
560 | } | 553 | } |
561 | 554 | ||
562 | /* | 555 | /* |
@@ -569,8 +562,8 @@ static inline int simulate_rdhwr(struct pt_regs *regs) | |||
569 | struct thread_info *ti = task_thread_info(current); | 562 | struct thread_info *ti = task_thread_info(current); |
570 | unsigned int opcode; | 563 | unsigned int opcode; |
571 | 564 | ||
572 | if (unlikely(get_insn_opcode(regs, &opcode))) | 565 | if (get_user(opcode, (unsigned int __user *) exception_epc(regs))) |
573 | return -EFAULT; | 566 | goto out_sigsegv; |
574 | 567 | ||
575 | if (unlikely(compute_return_epc(regs))) | 568 | if (unlikely(compute_return_epc(regs))) |
576 | return -EFAULT; | 569 | return -EFAULT; |
@@ -589,6 +582,10 @@ static inline int simulate_rdhwr(struct pt_regs *regs) | |||
589 | 582 | ||
590 | /* Not ours. */ | 583 | /* Not ours. */ |
591 | return -EFAULT; | 584 | return -EFAULT; |
585 | |||
586 | out_sigsegv: | ||
587 | force_sig(SIGSEGV, current); | ||
588 | return -EFAULT; | ||
592 | } | 589 | } |
593 | 590 | ||
594 | asmlinkage void do_ov(struct pt_regs *regs) | 591 | asmlinkage void do_ov(struct pt_regs *regs) |
@@ -672,10 +669,8 @@ asmlinkage void do_bp(struct pt_regs *regs) | |||
672 | unsigned int opcode, bcode; | 669 | unsigned int opcode, bcode; |
673 | siginfo_t info; | 670 | siginfo_t info; |
674 | 671 | ||
675 | die_if_kernel("Break instruction in kernel code", regs); | 672 | if (get_user(opcode, (unsigned int __user *) exception_epc(regs))) |
676 | 673 | goto out_sigsegv; | |
677 | if (get_insn_opcode(regs, &opcode)) | ||
678 | return; | ||
679 | 674 | ||
680 | /* | 675 | /* |
681 | * There is the ancient bug in the MIPS assemblers that the break | 676 | * There is the ancient bug in the MIPS assemblers that the break |
@@ -696,6 +691,7 @@ asmlinkage void do_bp(struct pt_regs *regs) | |||
696 | switch (bcode) { | 691 | switch (bcode) { |
697 | case BRK_OVERFLOW << 10: | 692 | case BRK_OVERFLOW << 10: |
698 | case BRK_DIVZERO << 10: | 693 | case BRK_DIVZERO << 10: |
694 | die_if_kernel("Break instruction in kernel code", regs); | ||
699 | if (bcode == (BRK_DIVZERO << 10)) | 695 | if (bcode == (BRK_DIVZERO << 10)) |
700 | info.si_code = FPE_INTDIV; | 696 | info.si_code = FPE_INTDIV; |
701 | else | 697 | else |
@@ -705,9 +701,16 @@ asmlinkage void do_bp(struct pt_regs *regs) | |||
705 | info.si_addr = (void __user *) regs->cp0_epc; | 701 | info.si_addr = (void __user *) regs->cp0_epc; |
706 | force_sig_info(SIGFPE, &info, current); | 702 | force_sig_info(SIGFPE, &info, current); |
707 | break; | 703 | break; |
704 | case BRK_BUG: | ||
705 | die("Kernel bug detected", regs); | ||
706 | break; | ||
708 | default: | 707 | default: |
708 | die_if_kernel("Break instruction in kernel code", regs); | ||
709 | force_sig(SIGTRAP, current); | 709 | force_sig(SIGTRAP, current); |
710 | } | 710 | } |
711 | |||
712 | out_sigsegv: | ||
713 | force_sig(SIGSEGV, current); | ||
711 | } | 714 | } |
712 | 715 | ||
713 | asmlinkage void do_tr(struct pt_regs *regs) | 716 | asmlinkage void do_tr(struct pt_regs *regs) |
@@ -715,10 +718,8 @@ asmlinkage void do_tr(struct pt_regs *regs) | |||
715 | unsigned int opcode, tcode = 0; | 718 | unsigned int opcode, tcode = 0; |
716 | siginfo_t info; | 719 | siginfo_t info; |
717 | 720 | ||
718 | die_if_kernel("Trap instruction in kernel code", regs); | 721 | if (get_user(opcode, (unsigned int __user *) exception_epc(regs))) |
719 | 722 | goto out_sigsegv; | |
720 | if (get_insn_opcode(regs, &opcode)) | ||
721 | return; | ||
722 | 723 | ||
723 | /* Immediate versions don't provide a code. */ | 724 | /* Immediate versions don't provide a code. */ |
724 | if (!(opcode & OPCODE)) | 725 | if (!(opcode & OPCODE)) |
@@ -733,6 +734,7 @@ asmlinkage void do_tr(struct pt_regs *regs) | |||
733 | switch (tcode) { | 734 | switch (tcode) { |
734 | case BRK_OVERFLOW: | 735 | case BRK_OVERFLOW: |
735 | case BRK_DIVZERO: | 736 | case BRK_DIVZERO: |
737 | die_if_kernel("Trap instruction in kernel code", regs); | ||
736 | if (tcode == BRK_DIVZERO) | 738 | if (tcode == BRK_DIVZERO) |
737 | info.si_code = FPE_INTDIV; | 739 | info.si_code = FPE_INTDIV; |
738 | else | 740 | else |
@@ -742,9 +744,16 @@ asmlinkage void do_tr(struct pt_regs *regs) | |||
742 | info.si_addr = (void __user *) regs->cp0_epc; | 744 | info.si_addr = (void __user *) regs->cp0_epc; |
743 | force_sig_info(SIGFPE, &info, current); | 745 | force_sig_info(SIGFPE, &info, current); |
744 | break; | 746 | break; |
747 | case BRK_BUG: | ||
748 | die("Kernel bug detected", regs); | ||
749 | break; | ||
745 | default: | 750 | default: |
751 | die_if_kernel("Trap instruction in kernel code", regs); | ||
746 | force_sig(SIGTRAP, current); | 752 | force_sig(SIGTRAP, current); |
747 | } | 753 | } |
754 | |||
755 | out_sigsegv: | ||
756 | force_sig(SIGSEGV, current); | ||
748 | } | 757 | } |
749 | 758 | ||
750 | asmlinkage void do_ri(struct pt_regs *regs) | 759 | asmlinkage void do_ri(struct pt_regs *regs) |
@@ -1423,6 +1432,15 @@ void __init set_uncached_handler (unsigned long offset, void *addr, unsigned lon | |||
1423 | memcpy((void *)(uncached_ebase + offset), addr, size); | 1432 | memcpy((void *)(uncached_ebase + offset), addr, size); |
1424 | } | 1433 | } |
1425 | 1434 | ||
1435 | static int __initdata rdhwr_noopt; | ||
1436 | static int __init set_rdhwr_noopt(char *str) | ||
1437 | { | ||
1438 | rdhwr_noopt = 1; | ||
1439 | return 1; | ||
1440 | } | ||
1441 | |||
1442 | __setup("rdhwr_noopt", set_rdhwr_noopt); | ||
1443 | |||
1426 | void __init trap_init(void) | 1444 | void __init trap_init(void) |
1427 | { | 1445 | { |
1428 | extern char except_vec3_generic, except_vec3_r4000; | 1446 | extern char except_vec3_generic, except_vec3_r4000; |
@@ -1502,7 +1520,9 @@ void __init trap_init(void) | |||
1502 | 1520 | ||
1503 | set_except_vector(8, handle_sys); | 1521 | set_except_vector(8, handle_sys); |
1504 | set_except_vector(9, handle_bp); | 1522 | set_except_vector(9, handle_bp); |
1505 | set_except_vector(10, handle_ri); | 1523 | set_except_vector(10, rdhwr_noopt ? handle_ri : |
1524 | (cpu_has_vtag_icache ? | ||
1525 | handle_ri_rdhwr_vivt : handle_ri_rdhwr)); | ||
1506 | set_except_vector(11, handle_cpu); | 1526 | set_except_vector(11, handle_cpu); |
1507 | set_except_vector(12, handle_ov); | 1527 | set_except_vector(12, handle_ov); |
1508 | set_except_vector(13, handle_tr); | 1528 | set_except_vector(13, handle_tr); |
diff --git a/arch/mips/lasat/interrupt.c b/arch/mips/lasat/interrupt.c index a144a002dcc4..4a84a7beac53 100644 --- a/arch/mips/lasat/interrupt.c +++ b/arch/mips/lasat/interrupt.c | |||
@@ -36,33 +36,14 @@ static volatile int lasat_int_mask_shift; | |||
36 | 36 | ||
37 | void disable_lasat_irq(unsigned int irq_nr) | 37 | void disable_lasat_irq(unsigned int irq_nr) |
38 | { | 38 | { |
39 | unsigned long flags; | ||
40 | |||
41 | local_irq_save(flags); | ||
42 | *lasat_int_mask &= ~(1 << irq_nr) << lasat_int_mask_shift; | 39 | *lasat_int_mask &= ~(1 << irq_nr) << lasat_int_mask_shift; |
43 | local_irq_restore(flags); | ||
44 | } | 40 | } |
45 | 41 | ||
46 | void enable_lasat_irq(unsigned int irq_nr) | 42 | void enable_lasat_irq(unsigned int irq_nr) |
47 | { | 43 | { |
48 | unsigned long flags; | ||
49 | |||
50 | local_irq_save(flags); | ||
51 | *lasat_int_mask |= (1 << irq_nr) << lasat_int_mask_shift; | 44 | *lasat_int_mask |= (1 << irq_nr) << lasat_int_mask_shift; |
52 | local_irq_restore(flags); | ||
53 | } | 45 | } |
54 | 46 | ||
55 | static unsigned int startup_lasat_irq(unsigned int irq) | ||
56 | { | ||
57 | enable_lasat_irq(irq); | ||
58 | |||
59 | return 0; /* never anything pending */ | ||
60 | } | ||
61 | |||
62 | #define shutdown_lasat_irq disable_lasat_irq | ||
63 | |||
64 | #define mask_and_ack_lasat_irq disable_lasat_irq | ||
65 | |||
66 | static void end_lasat_irq(unsigned int irq) | 47 | static void end_lasat_irq(unsigned int irq) |
67 | { | 48 | { |
68 | if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) | 49 | if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) |
@@ -71,11 +52,10 @@ static void end_lasat_irq(unsigned int irq) | |||
71 | 52 | ||
72 | static struct irq_chip lasat_irq_type = { | 53 | static struct irq_chip lasat_irq_type = { |
73 | .typename = "Lasat", | 54 | .typename = "Lasat", |
74 | .startup = startup_lasat_irq, | 55 | .ack = disable_lasat_irq, |
75 | .shutdown = shutdown_lasat_irq, | 56 | .mask = disable_lasat_irq, |
76 | .enable = enable_lasat_irq, | 57 | .mask_ack = disable_lasat_irq, |
77 | .disable = disable_lasat_irq, | 58 | .unmask = enable_lasat_irq, |
78 | .ack = mask_and_ack_lasat_irq, | ||
79 | .end = end_lasat_irq, | 59 | .end = end_lasat_irq, |
80 | }; | 60 | }; |
81 | 61 | ||
@@ -152,10 +132,6 @@ void __init arch_init_irq(void) | |||
152 | panic("arch_init_irq: mips_machtype incorrect"); | 132 | panic("arch_init_irq: mips_machtype incorrect"); |
153 | } | 133 | } |
154 | 134 | ||
155 | for (i = 0; i <= LASATINT_END; i++) { | 135 | for (i = 0; i <= LASATINT_END; i++) |
156 | irq_desc[i].status = IRQ_DISABLED; | 136 | set_irq_chip_and_handler(i, &lasat_irq_type, handle_level_irq); |
157 | irq_desc[i].action = 0; | ||
158 | irq_desc[i].depth = 1; | ||
159 | irq_desc[i].chip = &lasat_irq_type; | ||
160 | } | ||
161 | } | 137 | } |
diff --git a/arch/mips/lib/csum_partial_copy.c b/arch/mips/lib/csum_partial_copy.c index 6e9f366f961d..1720f2ceeeae 100644 --- a/arch/mips/lib/csum_partial_copy.c +++ b/arch/mips/lib/csum_partial_copy.c | |||
@@ -16,8 +16,8 @@ | |||
16 | /* | 16 | /* |
17 | * copy while checksumming, otherwise like csum_partial | 17 | * copy while checksumming, otherwise like csum_partial |
18 | */ | 18 | */ |
19 | unsigned int csum_partial_copy_nocheck(const unsigned char *src, | 19 | __wsum csum_partial_copy_nocheck(const void *src, |
20 | unsigned char *dst, int len, unsigned int sum) | 20 | void *dst, int len, __wsum sum) |
21 | { | 21 | { |
22 | /* | 22 | /* |
23 | * It's 2:30 am and I don't feel like doing it real ... | 23 | * It's 2:30 am and I don't feel like doing it real ... |
@@ -33,8 +33,8 @@ unsigned int csum_partial_copy_nocheck(const unsigned char *src, | |||
33 | * Copy from userspace and compute checksum. If we catch an exception | 33 | * Copy from userspace and compute checksum. If we catch an exception |
34 | * then zero the rest of the buffer. | 34 | * then zero the rest of the buffer. |
35 | */ | 35 | */ |
36 | unsigned int csum_partial_copy_from_user (const unsigned char __user *src, | 36 | __wsum csum_partial_copy_from_user (const void __user *src, |
37 | unsigned char *dst, int len, unsigned int sum, int *err_ptr) | 37 | void *dst, int len, __wsum sum, int *err_ptr) |
38 | { | 38 | { |
39 | int missing; | 39 | int missing; |
40 | 40 | ||
diff --git a/arch/mips/mips-boards/atlas/atlas_int.c b/arch/mips/mips-boards/atlas/atlas_int.c index be624b8c3b0e..43dba6ce6603 100644 --- a/arch/mips/mips-boards/atlas/atlas_int.c +++ b/arch/mips/mips-boards/atlas/atlas_int.c | |||
@@ -62,16 +62,6 @@ void enable_atlas_irq(unsigned int irq_nr) | |||
62 | iob(); | 62 | iob(); |
63 | } | 63 | } |
64 | 64 | ||
65 | static unsigned int startup_atlas_irq(unsigned int irq) | ||
66 | { | ||
67 | enable_atlas_irq(irq); | ||
68 | return 0; /* never anything pending */ | ||
69 | } | ||
70 | |||
71 | #define shutdown_atlas_irq disable_atlas_irq | ||
72 | |||
73 | #define mask_and_ack_atlas_irq disable_atlas_irq | ||
74 | |||
75 | static void end_atlas_irq(unsigned int irq) | 65 | static void end_atlas_irq(unsigned int irq) |
76 | { | 66 | { |
77 | if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) | 67 | if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) |
@@ -80,11 +70,11 @@ static void end_atlas_irq(unsigned int irq) | |||
80 | 70 | ||
81 | static struct irq_chip atlas_irq_type = { | 71 | static struct irq_chip atlas_irq_type = { |
82 | .typename = "Atlas", | 72 | .typename = "Atlas", |
83 | .startup = startup_atlas_irq, | 73 | .ack = disable_atlas_irq, |
84 | .shutdown = shutdown_atlas_irq, | 74 | .mask = disable_atlas_irq, |
85 | .enable = enable_atlas_irq, | 75 | .mask_ack = disable_atlas_irq, |
86 | .disable = disable_atlas_irq, | 76 | .unmask = enable_atlas_irq, |
87 | .ack = mask_and_ack_atlas_irq, | 77 | .eoi = enable_atlas_irq, |
88 | .end = end_atlas_irq, | 78 | .end = end_atlas_irq, |
89 | }; | 79 | }; |
90 | 80 | ||
@@ -217,13 +207,8 @@ static inline void init_atlas_irqs (int base) | |||
217 | */ | 207 | */ |
218 | atlas_hw0_icregs->intrsten = 0xffffffff; | 208 | atlas_hw0_icregs->intrsten = 0xffffffff; |
219 | 209 | ||
220 | for (i = ATLAS_INT_BASE; i <= ATLAS_INT_END; i++) { | 210 | for (i = ATLAS_INT_BASE; i <= ATLAS_INT_END; i++) |
221 | irq_desc[i].status = IRQ_DISABLED; | 211 | set_irq_chip_and_handler(i, &atlas_irq_type, handle_level_irq); |
222 | irq_desc[i].action = 0; | ||
223 | irq_desc[i].depth = 1; | ||
224 | irq_desc[i].chip = &atlas_irq_type; | ||
225 | spin_lock_init(&irq_desc[i].lock); | ||
226 | } | ||
227 | } | 212 | } |
228 | 213 | ||
229 | static struct irqaction atlasirq = { | 214 | static struct irqaction atlasirq = { |
diff --git a/arch/mips/mips-boards/generic/time.c b/arch/mips/mips-boards/generic/time.c index d817c60c5ca5..e4604c73f02e 100644 --- a/arch/mips/mips-boards/generic/time.c +++ b/arch/mips/mips-boards/generic/time.c | |||
@@ -288,6 +288,7 @@ void __init plat_timer_setup(struct irqaction *irq) | |||
288 | The effect is that the int remains disabled on the second cpu. | 288 | The effect is that the int remains disabled on the second cpu. |
289 | Mark the interrupt with IRQ_PER_CPU to avoid any confusion */ | 289 | Mark the interrupt with IRQ_PER_CPU to avoid any confusion */ |
290 | irq_desc[mips_cpu_timer_irq].status |= IRQ_PER_CPU; | 290 | irq_desc[mips_cpu_timer_irq].status |= IRQ_PER_CPU; |
291 | set_irq_handler(mips_cpu_timer_irq, handle_percpu_irq); | ||
291 | #endif | 292 | #endif |
292 | 293 | ||
293 | /* to generate the first timer interrupt */ | 294 | /* to generate the first timer interrupt */ |
diff --git a/arch/mips/mips-boards/malta/malta_setup.c b/arch/mips/mips-boards/malta/malta_setup.c index ab460f805bef..282f3e52eea3 100644 --- a/arch/mips/mips-boards/malta/malta_setup.c +++ b/arch/mips/mips-boards/malta/malta_setup.c | |||
@@ -159,7 +159,7 @@ void __init plat_mem_setup(void) | |||
159 | BONITO_PCIMEMBASECFG |= | 159 | BONITO_PCIMEMBASECFG |= |
160 | (BONITO_PCIMEMBASECFG_MEMBASE0_CACHED | | 160 | (BONITO_PCIMEMBASECFG_MEMBASE0_CACHED | |
161 | BONITO_PCIMEMBASECFG_MEMBASE1_CACHED); | 161 | BONITO_PCIMEMBASECFG_MEMBASE1_CACHED); |
162 | printk("Disabled Bonito IOBC coherency\n"); | 162 | printk("Enabled Bonito IOBC coherency\n"); |
163 | } | 163 | } |
164 | } | 164 | } |
165 | else | 165 | else |
diff --git a/arch/mips/mips-boards/sim/sim_time.c b/arch/mips/mips-boards/sim/sim_time.c index 24a4ed00cc0a..30711d016fed 100644 --- a/arch/mips/mips-boards/sim/sim_time.c +++ b/arch/mips/mips-boards/sim/sim_time.c | |||
@@ -3,31 +3,24 @@ | |||
3 | #include <linux/kernel_stat.h> | 3 | #include <linux/kernel_stat.h> |
4 | #include <linux/sched.h> | 4 | #include <linux/sched.h> |
5 | #include <linux/spinlock.h> | 5 | #include <linux/spinlock.h> |
6 | |||
7 | #include <asm/mipsregs.h> | ||
8 | #include <asm/ptrace.h> | ||
9 | #include <asm/hardirq.h> | ||
10 | #include <asm/div64.h> | ||
11 | #include <asm/cpu.h> | ||
12 | #include <asm/time.h> | ||
13 | |||
14 | #include <linux/interrupt.h> | 6 | #include <linux/interrupt.h> |
15 | #include <linux/mc146818rtc.h> | 7 | #include <linux/mc146818rtc.h> |
16 | #include <linux/timex.h> | 8 | #include <linux/timex.h> |
9 | |||
17 | #include <asm/mipsregs.h> | 10 | #include <asm/mipsregs.h> |
11 | #include <asm/ptrace.h> | ||
18 | #include <asm/hardirq.h> | 12 | #include <asm/hardirq.h> |
19 | #include <asm/irq.h> | ||
20 | #include <asm/div64.h> | 13 | #include <asm/div64.h> |
21 | #include <asm/cpu.h> | 14 | #include <asm/cpu.h> |
22 | #include <asm/time.h> | 15 | #include <asm/time.h> |
16 | #include <asm/irq.h> | ||
23 | #include <asm/mc146818-time.h> | 17 | #include <asm/mc146818-time.h> |
24 | #include <asm/msc01_ic.h> | 18 | #include <asm/msc01_ic.h> |
19 | #include <asm/smp.h> | ||
25 | 20 | ||
26 | #include <asm/mips-boards/generic.h> | 21 | #include <asm/mips-boards/generic.h> |
27 | #include <asm/mips-boards/prom.h> | 22 | #include <asm/mips-boards/prom.h> |
28 | #include <asm/mips-boards/simint.h> | 23 | #include <asm/mips-boards/simint.h> |
29 | #include <asm/mc146818-time.h> | ||
30 | #include <asm/smp.h> | ||
31 | 24 | ||
32 | 25 | ||
33 | unsigned long cpu_khz; | 26 | unsigned long cpu_khz; |
@@ -203,7 +196,8 @@ void __init plat_timer_setup(struct irqaction *irq) | |||
203 | on seperate cpu's the first one tries to handle the second interrupt. | 196 | on seperate cpu's the first one tries to handle the second interrupt. |
204 | The effect is that the int remains disabled on the second cpu. | 197 | The effect is that the int remains disabled on the second cpu. |
205 | Mark the interrupt with IRQ_PER_CPU to avoid any confusion */ | 198 | Mark the interrupt with IRQ_PER_CPU to avoid any confusion */ |
206 | irq_desc[mips_cpu_timer_irq].status |= IRQ_PER_CPU; | 199 | irq_desc[mips_cpu_timer_irq].flags |= IRQ_PER_CPU; |
200 | set_irq_handler(mips_cpu_timer_irq, handle_percpu_irq); | ||
207 | #endif | 201 | #endif |
208 | 202 | ||
209 | /* to generate the first timer interrupt */ | 203 | /* to generate the first timer interrupt */ |
diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c index cc895dad71d2..df04a315d830 100644 --- a/arch/mips/mm/c-r4k.c +++ b/arch/mips/mm/c-r4k.c | |||
@@ -323,7 +323,6 @@ static void __init r4k_blast_scache_setup(void) | |||
323 | static inline void local_r4k_flush_cache_all(void * args) | 323 | static inline void local_r4k_flush_cache_all(void * args) |
324 | { | 324 | { |
325 | r4k_blast_dcache(); | 325 | r4k_blast_dcache(); |
326 | r4k_blast_icache(); | ||
327 | } | 326 | } |
328 | 327 | ||
329 | static void r4k_flush_cache_all(void) | 328 | static void r4k_flush_cache_all(void) |
@@ -359,21 +358,19 @@ static void r4k___flush_cache_all(void) | |||
359 | static inline void local_r4k_flush_cache_range(void * args) | 358 | static inline void local_r4k_flush_cache_range(void * args) |
360 | { | 359 | { |
361 | struct vm_area_struct *vma = args; | 360 | struct vm_area_struct *vma = args; |
362 | int exec; | ||
363 | 361 | ||
364 | if (!(cpu_context(smp_processor_id(), vma->vm_mm))) | 362 | if (!(cpu_context(smp_processor_id(), vma->vm_mm))) |
365 | return; | 363 | return; |
366 | 364 | ||
367 | exec = vma->vm_flags & VM_EXEC; | 365 | r4k_blast_dcache(); |
368 | if (cpu_has_dc_aliases || exec) | ||
369 | r4k_blast_dcache(); | ||
370 | if (exec) | ||
371 | r4k_blast_icache(); | ||
372 | } | 366 | } |
373 | 367 | ||
374 | static void r4k_flush_cache_range(struct vm_area_struct *vma, | 368 | static void r4k_flush_cache_range(struct vm_area_struct *vma, |
375 | unsigned long start, unsigned long end) | 369 | unsigned long start, unsigned long end) |
376 | { | 370 | { |
371 | if (!cpu_has_dc_aliases) | ||
372 | return; | ||
373 | |||
377 | r4k_on_each_cpu(local_r4k_flush_cache_range, vma, 1, 1); | 374 | r4k_on_each_cpu(local_r4k_flush_cache_range, vma, 1, 1); |
378 | } | 375 | } |
379 | 376 | ||
@@ -384,18 +381,21 @@ static inline void local_r4k_flush_cache_mm(void * args) | |||
384 | if (!cpu_context(smp_processor_id(), mm)) | 381 | if (!cpu_context(smp_processor_id(), mm)) |
385 | return; | 382 | return; |
386 | 383 | ||
387 | r4k_blast_dcache(); | ||
388 | r4k_blast_icache(); | ||
389 | |||
390 | /* | 384 | /* |
391 | * Kludge alert. For obscure reasons R4000SC and R4400SC go nuts if we | 385 | * Kludge alert. For obscure reasons R4000SC and R4400SC go nuts if we |
392 | * only flush the primary caches but R10000 and R12000 behave sane ... | 386 | * only flush the primary caches but R10000 and R12000 behave sane ... |
387 | * R4000SC and R4400SC indexed S-cache ops also invalidate primary | ||
388 | * caches, so we can bail out early. | ||
393 | */ | 389 | */ |
394 | if (current_cpu_data.cputype == CPU_R4000SC || | 390 | if (current_cpu_data.cputype == CPU_R4000SC || |
395 | current_cpu_data.cputype == CPU_R4000MC || | 391 | current_cpu_data.cputype == CPU_R4000MC || |
396 | current_cpu_data.cputype == CPU_R4400SC || | 392 | current_cpu_data.cputype == CPU_R4400SC || |
397 | current_cpu_data.cputype == CPU_R4400MC) | 393 | current_cpu_data.cputype == CPU_R4400MC) { |
398 | r4k_blast_scache(); | 394 | r4k_blast_scache(); |
395 | return; | ||
396 | } | ||
397 | |||
398 | r4k_blast_dcache(); | ||
399 | } | 399 | } |
400 | 400 | ||
401 | static void r4k_flush_cache_mm(struct mm_struct *mm) | 401 | static void r4k_flush_cache_mm(struct mm_struct *mm) |
diff --git a/arch/mips/mm/c-sb1.c b/arch/mips/mm/c-sb1.c index d0ddb4a768a5..3a8afd47feaa 100644 --- a/arch/mips/mm/c-sb1.c +++ b/arch/mips/mm/c-sb1.c | |||
@@ -19,6 +19,7 @@ | |||
19 | * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. | 19 | * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. |
20 | */ | 20 | */ |
21 | #include <linux/init.h> | 21 | #include <linux/init.h> |
22 | #include <linux/hardirq.h> | ||
22 | 23 | ||
23 | #include <asm/asm.h> | 24 | #include <asm/asm.h> |
24 | #include <asm/bootinfo.h> | 25 | #include <asm/bootinfo.h> |
@@ -242,6 +243,25 @@ void sb1_flush_cache_page(struct vm_area_struct *vma, unsigned long addr, unsign | |||
242 | __attribute__((alias("local_sb1_flush_cache_page"))); | 243 | __attribute__((alias("local_sb1_flush_cache_page"))); |
243 | #endif | 244 | #endif |
244 | 245 | ||
246 | #ifdef CONFIG_SMP | ||
247 | static void sb1_flush_cache_data_page_ipi(void *info) | ||
248 | { | ||
249 | unsigned long start = (unsigned long)info; | ||
250 | |||
251 | __sb1_writeback_inv_dcache_range(start, start + PAGE_SIZE); | ||
252 | } | ||
253 | |||
254 | static void sb1_flush_cache_data_page(unsigned long addr) | ||
255 | { | ||
256 | if (in_atomic()) | ||
257 | __sb1_writeback_inv_dcache_range(addr, addr + PAGE_SIZE); | ||
258 | else | ||
259 | on_each_cpu(sb1_flush_cache_data_page_ipi, (void *) addr, 1, 1); | ||
260 | } | ||
261 | #else | ||
262 | void sb1_flush_cache_data_page(unsigned long) | ||
263 | __attribute__((alias("local_sb1_flush_cache_data_page"))); | ||
264 | #endif | ||
245 | 265 | ||
246 | /* | 266 | /* |
247 | * Invalidate all caches on this CPU | 267 | * Invalidate all caches on this CPU |
@@ -481,7 +501,7 @@ void sb1_cache_init(void) | |||
481 | 501 | ||
482 | flush_cache_sigtramp = sb1_flush_cache_sigtramp; | 502 | flush_cache_sigtramp = sb1_flush_cache_sigtramp; |
483 | local_flush_data_cache_page = (void *) sb1_nop; | 503 | local_flush_data_cache_page = (void *) sb1_nop; |
484 | flush_data_cache_page = (void *) sb1_nop; | 504 | flush_data_cache_page = sb1_flush_cache_data_page; |
485 | 505 | ||
486 | /* Full flush */ | 506 | /* Full flush */ |
487 | __flush_cache_all = sb1___flush_cache_all; | 507 | __flush_cache_all = sb1___flush_cache_all; |
diff --git a/arch/mips/mm/fault.c b/arch/mips/mm/fault.c index 8423d8590779..6f90e7ef66ac 100644 --- a/arch/mips/mm/fault.c +++ b/arch/mips/mm/fault.c | |||
@@ -60,6 +60,10 @@ asmlinkage void do_page_fault(struct pt_regs *regs, unsigned long write, | |||
60 | */ | 60 | */ |
61 | if (unlikely(address >= VMALLOC_START && address <= VMALLOC_END)) | 61 | if (unlikely(address >= VMALLOC_START && address <= VMALLOC_END)) |
62 | goto vmalloc_fault; | 62 | goto vmalloc_fault; |
63 | #ifdef MODULE_START | ||
64 | if (unlikely(address >= MODULE_START && address < MODULE_END)) | ||
65 | goto vmalloc_fault; | ||
66 | #endif | ||
63 | 67 | ||
64 | /* | 68 | /* |
65 | * If we're in an interrupt or have no user | 69 | * If we're in an interrupt or have no user |
diff --git a/arch/mips/mm/init.c b/arch/mips/mm/init.c index 2de4d3c367a2..9e29ba9205f0 100644 --- a/arch/mips/mm/init.c +++ b/arch/mips/mm/init.c | |||
@@ -90,9 +90,9 @@ unsigned long setup_zero_pages(void) | |||
90 | if (!empty_zero_page) | 90 | if (!empty_zero_page) |
91 | panic("Oh boy, that early out of memory?"); | 91 | panic("Oh boy, that early out of memory?"); |
92 | 92 | ||
93 | page = virt_to_page(empty_zero_page); | 93 | page = virt_to_page((void *)empty_zero_page); |
94 | split_page(page, order); | 94 | split_page(page, order); |
95 | while (page < virt_to_page(empty_zero_page + (PAGE_SIZE << order))) { | 95 | while (page < virt_to_page((void *)(empty_zero_page + (PAGE_SIZE << order)))) { |
96 | SetPageReserved(page); | 96 | SetPageReserved(page); |
97 | page++; | 97 | page++; |
98 | } | 98 | } |
@@ -443,15 +443,18 @@ void __init mem_init(void) | |||
443 | } | 443 | } |
444 | #endif /* !CONFIG_NEED_MULTIPLE_NODES */ | 444 | #endif /* !CONFIG_NEED_MULTIPLE_NODES */ |
445 | 445 | ||
446 | void free_init_pages(char *what, unsigned long begin, unsigned long end) | 446 | static void free_init_pages(char *what, unsigned long begin, unsigned long end) |
447 | { | 447 | { |
448 | unsigned long addr; | 448 | unsigned long pfn; |
449 | 449 | ||
450 | for (addr = begin; addr < end; addr += PAGE_SIZE) { | 450 | for (pfn = PFN_UP(begin); pfn < PFN_DOWN(end); pfn++) { |
451 | ClearPageReserved(virt_to_page(addr)); | 451 | struct page *page = pfn_to_page(pfn); |
452 | init_page_count(virt_to_page(addr)); | 452 | void *addr = phys_to_virt(PFN_PHYS(pfn)); |
453 | memset((void *)addr, 0xcc, PAGE_SIZE); | 453 | |
454 | free_page(addr); | 454 | ClearPageReserved(page); |
455 | init_page_count(page); | ||
456 | memset(addr, POISON_FREE_INITMEM, PAGE_SIZE); | ||
457 | __free_page(page); | ||
455 | totalram_pages++; | 458 | totalram_pages++; |
456 | } | 459 | } |
457 | printk(KERN_INFO "Freeing %s: %ldk freed\n", what, (end - begin) >> 10); | 460 | printk(KERN_INFO "Freeing %s: %ldk freed\n", what, (end - begin) >> 10); |
@@ -460,12 +463,9 @@ void free_init_pages(char *what, unsigned long begin, unsigned long end) | |||
460 | #ifdef CONFIG_BLK_DEV_INITRD | 463 | #ifdef CONFIG_BLK_DEV_INITRD |
461 | void free_initrd_mem(unsigned long start, unsigned long end) | 464 | void free_initrd_mem(unsigned long start, unsigned long end) |
462 | { | 465 | { |
463 | #ifdef CONFIG_64BIT | 466 | free_init_pages("initrd memory", |
464 | /* Switch from KSEG0 to XKPHYS addresses */ | 467 | virt_to_phys((void *)start), |
465 | start = (unsigned long)phys_to_virt(CPHYSADDR(start)); | 468 | virt_to_phys((void *)end)); |
466 | end = (unsigned long)phys_to_virt(CPHYSADDR(end)); | ||
467 | #endif | ||
468 | free_init_pages("initrd memory", start, end); | ||
469 | } | 469 | } |
470 | #endif | 470 | #endif |
471 | 471 | ||
@@ -473,17 +473,13 @@ extern unsigned long prom_free_prom_memory(void); | |||
473 | 473 | ||
474 | void free_initmem(void) | 474 | void free_initmem(void) |
475 | { | 475 | { |
476 | unsigned long start, end, freed; | 476 | unsigned long freed; |
477 | 477 | ||
478 | freed = prom_free_prom_memory(); | 478 | freed = prom_free_prom_memory(); |
479 | if (freed) | 479 | if (freed) |
480 | printk(KERN_INFO "Freeing firmware memory: %ldk freed\n",freed); | 480 | printk(KERN_INFO "Freeing firmware memory: %ldk freed\n",freed); |
481 | 481 | ||
482 | start = (unsigned long)(&__init_begin); | 482 | free_init_pages("unused kernel memory", |
483 | end = (unsigned long)(&__init_end); | 483 | __pa_symbol(&__init_begin), |
484 | #ifdef CONFIG_64BIT | 484 | __pa_symbol(&__init_end)); |
485 | start = PAGE_OFFSET | CPHYSADDR(start); | ||
486 | end = PAGE_OFFSET | CPHYSADDR(end); | ||
487 | #endif | ||
488 | free_init_pages("unused kernel memory", start, end); | ||
489 | } | 485 | } |
diff --git a/arch/mips/mm/pgtable-64.c b/arch/mips/mm/pgtable-64.c index 8d600d307d5d..c46eb651bf09 100644 --- a/arch/mips/mm/pgtable-64.c +++ b/arch/mips/mm/pgtable-64.c | |||
@@ -58,6 +58,9 @@ void __init pagetable_init(void) | |||
58 | 58 | ||
59 | /* Initialize the entire pgd. */ | 59 | /* Initialize the entire pgd. */ |
60 | pgd_init((unsigned long)swapper_pg_dir); | 60 | pgd_init((unsigned long)swapper_pg_dir); |
61 | #ifdef MODULE_START | ||
62 | pgd_init((unsigned long)module_pg_dir); | ||
63 | #endif | ||
61 | pmd_init((unsigned long)invalid_pmd_table, (unsigned long)invalid_pte_table); | 64 | pmd_init((unsigned long)invalid_pmd_table, (unsigned long)invalid_pte_table); |
62 | 65 | ||
63 | pgd_base = swapper_pg_dir; | 66 | pgd_base = swapper_pg_dir; |
diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c index fec318a1c8c5..492c518e7ba5 100644 --- a/arch/mips/mm/tlbex.c +++ b/arch/mips/mm/tlbex.c | |||
@@ -423,6 +423,9 @@ enum label_id { | |||
423 | label_invalid, | 423 | label_invalid, |
424 | label_second_part, | 424 | label_second_part, |
425 | label_leave, | 425 | label_leave, |
426 | #ifdef MODULE_START | ||
427 | label_module_alloc, | ||
428 | #endif | ||
426 | label_vmalloc, | 429 | label_vmalloc, |
427 | label_vmalloc_done, | 430 | label_vmalloc_done, |
428 | label_tlbw_hazard, | 431 | label_tlbw_hazard, |
@@ -455,6 +458,9 @@ static __init void build_label(struct label **lab, u32 *addr, | |||
455 | 458 | ||
456 | L_LA(_second_part) | 459 | L_LA(_second_part) |
457 | L_LA(_leave) | 460 | L_LA(_leave) |
461 | #ifdef MODULE_START | ||
462 | L_LA(_module_alloc) | ||
463 | #endif | ||
458 | L_LA(_vmalloc) | 464 | L_LA(_vmalloc) |
459 | L_LA(_vmalloc_done) | 465 | L_LA(_vmalloc_done) |
460 | L_LA(_tlbw_hazard) | 466 | L_LA(_tlbw_hazard) |
@@ -686,6 +692,13 @@ static void __init il_bgezl(u32 **p, struct reloc **r, unsigned int reg, | |||
686 | i_bgezl(p, reg, 0); | 692 | i_bgezl(p, reg, 0); |
687 | } | 693 | } |
688 | 694 | ||
695 | static void __init __attribute__((unused)) | ||
696 | il_bgez(u32 **p, struct reloc **r, unsigned int reg, enum label_id l) | ||
697 | { | ||
698 | r_mips_pc16(r, *p, l); | ||
699 | i_bgez(p, reg, 0); | ||
700 | } | ||
701 | |||
689 | /* The only general purpose registers allowed in TLB handlers. */ | 702 | /* The only general purpose registers allowed in TLB handlers. */ |
690 | #define K0 26 | 703 | #define K0 26 |
691 | #define K1 27 | 704 | #define K1 27 |
@@ -970,7 +983,11 @@ build_get_pmde64(u32 **p, struct label **l, struct reloc **r, | |||
970 | * The vmalloc handling is not in the hotpath. | 983 | * The vmalloc handling is not in the hotpath. |
971 | */ | 984 | */ |
972 | i_dmfc0(p, tmp, C0_BADVADDR); | 985 | i_dmfc0(p, tmp, C0_BADVADDR); |
986 | #ifdef MODULE_START | ||
987 | il_bltz(p, r, tmp, label_module_alloc); | ||
988 | #else | ||
973 | il_bltz(p, r, tmp, label_vmalloc); | 989 | il_bltz(p, r, tmp, label_vmalloc); |
990 | #endif | ||
974 | /* No i_nop needed here, since the next insn doesn't touch TMP. */ | 991 | /* No i_nop needed here, since the next insn doesn't touch TMP. */ |
975 | 992 | ||
976 | #ifdef CONFIG_SMP | 993 | #ifdef CONFIG_SMP |
@@ -1023,8 +1040,46 @@ build_get_pgd_vmalloc64(u32 **p, struct label **l, struct reloc **r, | |||
1023 | { | 1040 | { |
1024 | long swpd = (long)swapper_pg_dir; | 1041 | long swpd = (long)swapper_pg_dir; |
1025 | 1042 | ||
1043 | #ifdef MODULE_START | ||
1044 | long modd = (long)module_pg_dir; | ||
1045 | |||
1046 | l_module_alloc(l, *p); | ||
1047 | /* | ||
1048 | * Assumption: | ||
1049 | * VMALLOC_START >= 0xc000000000000000UL | ||
1050 | * MODULE_START >= 0xe000000000000000UL | ||
1051 | */ | ||
1052 | i_SLL(p, ptr, bvaddr, 2); | ||
1053 | il_bgez(p, r, ptr, label_vmalloc); | ||
1054 | |||
1055 | if (in_compat_space_p(MODULE_START) && !rel_lo(MODULE_START)) { | ||
1056 | i_lui(p, ptr, rel_hi(MODULE_START)); /* delay slot */ | ||
1057 | } else { | ||
1058 | /* unlikely configuration */ | ||
1059 | i_nop(p); /* delay slot */ | ||
1060 | i_LA(p, ptr, MODULE_START); | ||
1061 | } | ||
1062 | i_dsubu(p, bvaddr, bvaddr, ptr); | ||
1063 | |||
1064 | if (in_compat_space_p(modd) && !rel_lo(modd)) { | ||
1065 | il_b(p, r, label_vmalloc_done); | ||
1066 | i_lui(p, ptr, rel_hi(modd)); | ||
1067 | } else { | ||
1068 | i_LA_mostly(p, ptr, modd); | ||
1069 | il_b(p, r, label_vmalloc_done); | ||
1070 | i_daddiu(p, ptr, ptr, rel_lo(modd)); | ||
1071 | } | ||
1072 | |||
1073 | l_vmalloc(l, *p); | ||
1074 | if (in_compat_space_p(MODULE_START) && !rel_lo(MODULE_START) && | ||
1075 | MODULE_START << 32 == VMALLOC_START) | ||
1076 | i_dsll32(p, ptr, ptr, 0); /* typical case */ | ||
1077 | else | ||
1078 | i_LA(p, ptr, VMALLOC_START); | ||
1079 | #else | ||
1026 | l_vmalloc(l, *p); | 1080 | l_vmalloc(l, *p); |
1027 | i_LA(p, ptr, VMALLOC_START); | 1081 | i_LA(p, ptr, VMALLOC_START); |
1082 | #endif | ||
1028 | i_dsubu(p, bvaddr, bvaddr, ptr); | 1083 | i_dsubu(p, bvaddr, bvaddr, ptr); |
1029 | 1084 | ||
1030 | if (in_compat_space_p(swpd) && !rel_lo(swpd)) { | 1085 | if (in_compat_space_p(swpd) && !rel_lo(swpd)) { |
diff --git a/arch/mips/momentum/ocelot_c/cpci-irq.c b/arch/mips/momentum/ocelot_c/cpci-irq.c index 47e3fa32b075..e5a4a0a8a7f0 100644 --- a/arch/mips/momentum/ocelot_c/cpci-irq.c +++ b/arch/mips/momentum/ocelot_c/cpci-irq.c | |||
@@ -66,39 +66,6 @@ static inline void unmask_cpci_irq(unsigned int irq) | |||
66 | } | 66 | } |
67 | 67 | ||
68 | /* | 68 | /* |
69 | * Enables the IRQ in the FPGA | ||
70 | */ | ||
71 | static void enable_cpci_irq(unsigned int irq) | ||
72 | { | ||
73 | unmask_cpci_irq(irq); | ||
74 | } | ||
75 | |||
76 | /* | ||
77 | * Initialize the IRQ in the FPGA | ||
78 | */ | ||
79 | static unsigned int startup_cpci_irq(unsigned int irq) | ||
80 | { | ||
81 | unmask_cpci_irq(irq); | ||
82 | return 0; | ||
83 | } | ||
84 | |||
85 | /* | ||
86 | * Disables the IRQ in the FPGA | ||
87 | */ | ||
88 | static void disable_cpci_irq(unsigned int irq) | ||
89 | { | ||
90 | mask_cpci_irq(irq); | ||
91 | } | ||
92 | |||
93 | /* | ||
94 | * Masks and ACKs an IRQ | ||
95 | */ | ||
96 | static void mask_and_ack_cpci_irq(unsigned int irq) | ||
97 | { | ||
98 | mask_cpci_irq(irq); | ||
99 | } | ||
100 | |||
101 | /* | ||
102 | * End IRQ processing | 69 | * End IRQ processing |
103 | */ | 70 | */ |
104 | static void end_cpci_irq(unsigned int irq) | 71 | static void end_cpci_irq(unsigned int irq) |
@@ -125,15 +92,12 @@ void ll_cpci_irq(void) | |||
125 | do_IRQ(ls1bit8(irq_src) + CPCI_IRQ_BASE); | 92 | do_IRQ(ls1bit8(irq_src) + CPCI_IRQ_BASE); |
126 | } | 93 | } |
127 | 94 | ||
128 | #define shutdown_cpci_irq disable_cpci_irq | ||
129 | |||
130 | struct irq_chip cpci_irq_type = { | 95 | struct irq_chip cpci_irq_type = { |
131 | .typename = "CPCI/FPGA", | 96 | .typename = "CPCI/FPGA", |
132 | .startup = startup_cpci_irq, | 97 | .ack = mask_cpci_irq, |
133 | .shutdown = shutdown_cpci_irq, | 98 | .mask = mask_cpci_irq, |
134 | .enable = enable_cpci_irq, | 99 | .mask_ack = mask_cpci_irq, |
135 | .disable = disable_cpci_irq, | 100 | .unmask = unmask_cpci_irq, |
136 | .ack = mask_and_ack_cpci_irq, | ||
137 | .end = end_cpci_irq, | 101 | .end = end_cpci_irq, |
138 | }; | 102 | }; |
139 | 103 | ||
@@ -141,11 +105,6 @@ void cpci_irq_init(void) | |||
141 | { | 105 | { |
142 | int i; | 106 | int i; |
143 | 107 | ||
144 | /* Reset irq handlers pointers to NULL */ | 108 | for (i = CPCI_IRQ_BASE; i < (CPCI_IRQ_BASE + 8); i++) |
145 | for (i = CPCI_IRQ_BASE; i < (CPCI_IRQ_BASE + 8); i++) { | 109 | set_irq_chip_and_handler(i, &cpci_irq_type, handle_level_irq); |
146 | irq_desc[i].status = IRQ_DISABLED; | ||
147 | irq_desc[i].action = 0; | ||
148 | irq_desc[i].depth = 2; | ||
149 | irq_desc[i].chip = &cpci_irq_type; | ||
150 | } | ||
151 | } | 110 | } |
diff --git a/arch/mips/momentum/ocelot_c/uart-irq.c b/arch/mips/momentum/ocelot_c/uart-irq.c index 510257dc205a..0029f0008dea 100644 --- a/arch/mips/momentum/ocelot_c/uart-irq.c +++ b/arch/mips/momentum/ocelot_c/uart-irq.c | |||
@@ -60,39 +60,6 @@ static inline void unmask_uart_irq(unsigned int irq) | |||
60 | } | 60 | } |
61 | 61 | ||
62 | /* | 62 | /* |
63 | * Enables the IRQ in the FPGA | ||
64 | */ | ||
65 | static void enable_uart_irq(unsigned int irq) | ||
66 | { | ||
67 | unmask_uart_irq(irq); | ||
68 | } | ||
69 | |||
70 | /* | ||
71 | * Initialize the IRQ in the FPGA | ||
72 | */ | ||
73 | static unsigned int startup_uart_irq(unsigned int irq) | ||
74 | { | ||
75 | unmask_uart_irq(irq); | ||
76 | return 0; | ||
77 | } | ||
78 | |||
79 | /* | ||
80 | * Disables the IRQ in the FPGA | ||
81 | */ | ||
82 | static void disable_uart_irq(unsigned int irq) | ||
83 | { | ||
84 | mask_uart_irq(irq); | ||
85 | } | ||
86 | |||
87 | /* | ||
88 | * Masks and ACKs an IRQ | ||
89 | */ | ||
90 | static void mask_and_ack_uart_irq(unsigned int irq) | ||
91 | { | ||
92 | mask_uart_irq(irq); | ||
93 | } | ||
94 | |||
95 | /* | ||
96 | * End IRQ processing | 63 | * End IRQ processing |
97 | */ | 64 | */ |
98 | static void end_uart_irq(unsigned int irq) | 65 | static void end_uart_irq(unsigned int irq) |
@@ -118,28 +85,17 @@ void ll_uart_irq(void) | |||
118 | do_IRQ(ls1bit8(irq_src) + 74); | 85 | do_IRQ(ls1bit8(irq_src) + 74); |
119 | } | 86 | } |
120 | 87 | ||
121 | #define shutdown_uart_irq disable_uart_irq | ||
122 | |||
123 | struct irq_chip uart_irq_type = { | 88 | struct irq_chip uart_irq_type = { |
124 | .typename = "UART/FPGA", | 89 | .typename = "UART/FPGA", |
125 | .startup = startup_uart_irq, | 90 | .ack = mask_uart_irq, |
126 | .shutdown = shutdown_uart_irq, | 91 | .mask = mask_uart_irq, |
127 | .enable = enable_uart_irq, | 92 | .mask_ack = mask_uart_irq, |
128 | .disable = disable_uart_irq, | 93 | .unmask = unmask_uart_irq, |
129 | .ack = mask_and_ack_uart_irq, | ||
130 | .end = end_uart_irq, | 94 | .end = end_uart_irq, |
131 | }; | 95 | }; |
132 | 96 | ||
133 | void uart_irq_init(void) | 97 | void uart_irq_init(void) |
134 | { | 98 | { |
135 | /* Reset irq handlers pointers to NULL */ | 99 | set_irq_chip_and_handler(80, &uart_irq_type, handle_level_irq); |
136 | irq_desc[80].status = IRQ_DISABLED; | 100 | set_irq_chip_and_handler(81, &uart_irq_type, handle_level_irq); |
137 | irq_desc[80].action = 0; | ||
138 | irq_desc[80].depth = 2; | ||
139 | irq_desc[80].chip = &uart_irq_type; | ||
140 | |||
141 | irq_desc[81].status = IRQ_DISABLED; | ||
142 | irq_desc[81].action = 0; | ||
143 | irq_desc[81].depth = 2; | ||
144 | irq_desc[81].chip = &uart_irq_type; | ||
145 | } | 101 | } |
diff --git a/arch/mips/oprofile/Makefile b/arch/mips/oprofile/Makefile index 0a50aad5bbe4..bf3be6fcf7ff 100644 --- a/arch/mips/oprofile/Makefile +++ b/arch/mips/oprofile/Makefile | |||
@@ -12,5 +12,6 @@ oprofile-y := $(DRIVER_OBJS) common.o | |||
12 | 12 | ||
13 | oprofile-$(CONFIG_CPU_MIPS32) += op_model_mipsxx.o | 13 | oprofile-$(CONFIG_CPU_MIPS32) += op_model_mipsxx.o |
14 | oprofile-$(CONFIG_CPU_MIPS64) += op_model_mipsxx.o | 14 | oprofile-$(CONFIG_CPU_MIPS64) += op_model_mipsxx.o |
15 | oprofile-$(CONFIG_CPU_R10000) += op_model_mipsxx.o | ||
15 | oprofile-$(CONFIG_CPU_SB1) += op_model_mipsxx.o | 16 | oprofile-$(CONFIG_CPU_SB1) += op_model_mipsxx.o |
16 | oprofile-$(CONFIG_CPU_RM9000) += op_model_rm9000.o | 17 | oprofile-$(CONFIG_CPU_RM9000) += op_model_rm9000.o |
diff --git a/arch/mips/oprofile/common.c b/arch/mips/oprofile/common.c index 65eb55400d77..4e0a90b3916b 100644 --- a/arch/mips/oprofile/common.c +++ b/arch/mips/oprofile/common.c | |||
@@ -83,6 +83,9 @@ int __init oprofile_arch_init(struct oprofile_operations *ops) | |||
83 | case CPU_74K: | 83 | case CPU_74K: |
84 | case CPU_SB1: | 84 | case CPU_SB1: |
85 | case CPU_SB1A: | 85 | case CPU_SB1A: |
86 | case CPU_R10000: | ||
87 | case CPU_R12000: | ||
88 | case CPU_R14000: | ||
86 | lmodel = &op_model_mipsxx_ops; | 89 | lmodel = &op_model_mipsxx_ops; |
87 | break; | 90 | break; |
88 | 91 | ||
diff --git a/arch/mips/oprofile/op_model_mipsxx.c b/arch/mips/oprofile/op_model_mipsxx.c index 1fb240c57bac..455d76ad06d8 100644 --- a/arch/mips/oprofile/op_model_mipsxx.c +++ b/arch/mips/oprofile/op_model_mipsxx.c | |||
@@ -18,7 +18,7 @@ | |||
18 | #define M_PERFCTL_SUPERVISOR (1UL << 2) | 18 | #define M_PERFCTL_SUPERVISOR (1UL << 2) |
19 | #define M_PERFCTL_USER (1UL << 3) | 19 | #define M_PERFCTL_USER (1UL << 3) |
20 | #define M_PERFCTL_INTERRUPT_ENABLE (1UL << 4) | 20 | #define M_PERFCTL_INTERRUPT_ENABLE (1UL << 4) |
21 | #define M_PERFCTL_EVENT(event) ((event) << 5) | 21 | #define M_PERFCTL_EVENT(event) (((event) & 0x3f) << 5) |
22 | #define M_PERFCTL_VPEID(vpe) ((vpe) << 16) | 22 | #define M_PERFCTL_VPEID(vpe) ((vpe) << 16) |
23 | #define M_PERFCTL_MT_EN(filter) ((filter) << 20) | 23 | #define M_PERFCTL_MT_EN(filter) ((filter) << 20) |
24 | #define M_TC_EN_ALL M_PERFCTL_MT_EN(0) | 24 | #define M_TC_EN_ALL M_PERFCTL_MT_EN(0) |
@@ -218,13 +218,23 @@ static inline int __n_counters(void) | |||
218 | 218 | ||
219 | static inline int n_counters(void) | 219 | static inline int n_counters(void) |
220 | { | 220 | { |
221 | int counters = __n_counters(); | 221 | int counters; |
222 | |||
223 | switch (current_cpu_data.cputype) { | ||
224 | case CPU_R10000: | ||
225 | counters = 2; | ||
226 | |||
227 | case CPU_R12000: | ||
228 | case CPU_R14000: | ||
229 | counters = 4; | ||
230 | |||
231 | default: | ||
232 | counters = __n_counters(); | ||
233 | } | ||
222 | 234 | ||
223 | #ifdef CONFIG_MIPS_MT_SMP | 235 | #ifdef CONFIG_MIPS_MT_SMP |
224 | if (current_cpu_data.cputype == CPU_34K) | 236 | counters >> 1; |
225 | return counters >> 1; | ||
226 | #endif | 237 | #endif |
227 | |||
228 | return counters; | 238 | return counters; |
229 | } | 239 | } |
230 | 240 | ||
@@ -284,6 +294,18 @@ static int __init mipsxx_init(void) | |||
284 | op_model_mipsxx_ops.cpu_type = "mips/5K"; | 294 | op_model_mipsxx_ops.cpu_type = "mips/5K"; |
285 | break; | 295 | break; |
286 | 296 | ||
297 | case CPU_R10000: | ||
298 | if ((current_cpu_data.processor_id & 0xff) == 0x20) | ||
299 | op_model_mipsxx_ops.cpu_type = "mips/r10000-v2.x"; | ||
300 | else | ||
301 | op_model_mipsxx_ops.cpu_type = "mips/r10000"; | ||
302 | break; | ||
303 | |||
304 | case CPU_R12000: | ||
305 | case CPU_R14000: | ||
306 | op_model_mipsxx_ops.cpu_type = "mips/r12000"; | ||
307 | break; | ||
308 | |||
287 | case CPU_SB1: | 309 | case CPU_SB1: |
288 | case CPU_SB1A: | 310 | case CPU_SB1A: |
289 | op_model_mipsxx_ops.cpu_type = "mips/sb1"; | 311 | op_model_mipsxx_ops.cpu_type = "mips/sb1"; |
diff --git a/arch/mips/pci/fixup-cobalt.c b/arch/mips/pci/fixup-cobalt.c index 75a01e764898..7d5f6bbf7a9d 100644 --- a/arch/mips/pci/fixup-cobalt.c +++ b/arch/mips/pci/fixup-cobalt.c | |||
@@ -94,22 +94,21 @@ static void qube_raq_galileo_fixup(struct pci_dev *dev) | |||
94 | #if 0 | 94 | #if 0 |
95 | if (galileo_id >= 0x10) { | 95 | if (galileo_id >= 0x10) { |
96 | /* New Galileo, assumes PCI stop line to VIA is connected. */ | 96 | /* New Galileo, assumes PCI stop line to VIA is connected. */ |
97 | GALILEO_OUTL(0x4020, GT_PCI0_TOR_OFS); | 97 | GT_WRITE(GT_PCI0_TOR_OFS, 0x4020); |
98 | } else if (galileo_id == 0x1 || galileo_id == 0x2) | 98 | } else if (galileo_id == 0x1 || galileo_id == 0x2) |
99 | #endif | 99 | #endif |
100 | { | 100 | { |
101 | signed int timeo; | 101 | signed int timeo; |
102 | /* XXX WE MUST DO THIS ELSE GALILEO LOCKS UP! -DaveM */ | 102 | /* XXX WE MUST DO THIS ELSE GALILEO LOCKS UP! -DaveM */ |
103 | timeo = GALILEO_INL(GT_PCI0_TOR_OFS); | 103 | timeo = GT_READ(GT_PCI0_TOR_OFS); |
104 | /* Old Galileo, assumes PCI STOP line to VIA is disconnected. */ | 104 | /* Old Galileo, assumes PCI STOP line to VIA is disconnected. */ |
105 | GALILEO_OUTL( | 105 | GT_WRITE(GT_PCI0_TOR_OFS, |
106 | (0xff << 16) | /* retry count */ | 106 | (0xff << 16) | /* retry count */ |
107 | (0xff << 8) | /* timeout 1 */ | 107 | (0xff << 8) | /* timeout 1 */ |
108 | 0xff, /* timeout 0 */ | 108 | 0xff); /* timeout 0 */ |
109 | GT_PCI0_TOR_OFS); | ||
110 | 109 | ||
111 | /* enable PCI retry exceeded interrupt */ | 110 | /* enable PCI retry exceeded interrupt */ |
112 | GALILEO_OUTL(GALILEO_INTR_RETRY_CTR | GALILEO_INL(GT_INTRMASK_OFS), GT_INTRMASK_OFS); | 111 | GT_WRITE(GT_INTRMASK_OFS, GT_INTR_RETRYCTR0_MSK | GT_READ(GT_INTRMASK_OFS)); |
113 | } | 112 | } |
114 | } | 113 | } |
115 | 114 | ||
diff --git a/arch/mips/pci/ops-gt64111.c b/arch/mips/pci/ops-gt64111.c index 13de45940b19..ecd3991bd0e4 100644 --- a/arch/mips/pci/ops-gt64111.c +++ b/arch/mips/pci/ops-gt64111.c | |||
@@ -38,18 +38,18 @@ static int gt64111_pci_read_config(struct pci_bus *bus, unsigned int devfn, | |||
38 | switch (size) { | 38 | switch (size) { |
39 | case 4: | 39 | case 4: |
40 | PCI_CFG_SET(devfn, where); | 40 | PCI_CFG_SET(devfn, where); |
41 | *val = GALILEO_INL(GT_PCI0_CFGDATA_OFS); | 41 | *val = GT_READ(GT_PCI0_CFGDATA_OFS); |
42 | return PCIBIOS_SUCCESSFUL; | 42 | return PCIBIOS_SUCCESSFUL; |
43 | 43 | ||
44 | case 2: | 44 | case 2: |
45 | PCI_CFG_SET(devfn, (where & ~0x3)); | 45 | PCI_CFG_SET(devfn, (where & ~0x3)); |
46 | *val = GALILEO_INL(GT_PCI0_CFGDATA_OFS) | 46 | *val = GT_READ(GT_PCI0_CFGDATA_OFS) |
47 | >> ((where & 3) * 8); | 47 | >> ((where & 3) * 8); |
48 | return PCIBIOS_SUCCESSFUL; | 48 | return PCIBIOS_SUCCESSFUL; |
49 | 49 | ||
50 | case 1: | 50 | case 1: |
51 | PCI_CFG_SET(devfn, (where & ~0x3)); | 51 | PCI_CFG_SET(devfn, (where & ~0x3)); |
52 | *val = GALILEO_INL(GT_PCI0_CFGDATA_OFS) | 52 | *val = GT_READ(GT_PCI0_CFGDATA_OFS) |
53 | >> ((where & 3) * 8); | 53 | >> ((where & 3) * 8); |
54 | return PCIBIOS_SUCCESSFUL; | 54 | return PCIBIOS_SUCCESSFUL; |
55 | } | 55 | } |
@@ -68,25 +68,25 @@ static int gt64111_pci_write_config(struct pci_bus *bus, unsigned int devfn, | |||
68 | switch (size) { | 68 | switch (size) { |
69 | case 4: | 69 | case 4: |
70 | PCI_CFG_SET(devfn, where); | 70 | PCI_CFG_SET(devfn, where); |
71 | GALILEO_OUTL(val, GT_PCI0_CFGDATA_OFS); | 71 | GT_WRITE(GT_PCI0_CFGDATA_OFS, val); |
72 | 72 | ||
73 | return PCIBIOS_SUCCESSFUL; | 73 | return PCIBIOS_SUCCESSFUL; |
74 | 74 | ||
75 | case 2: | 75 | case 2: |
76 | PCI_CFG_SET(devfn, (where & ~0x3)); | 76 | PCI_CFG_SET(devfn, (where & ~0x3)); |
77 | tmp = GALILEO_INL(GT_PCI0_CFGDATA_OFS); | 77 | tmp = GT_READ(GT_PCI0_CFGDATA_OFS); |
78 | tmp &= ~(0xffff << ((where & 0x3) * 8)); | 78 | tmp &= ~(0xffff << ((where & 0x3) * 8)); |
79 | tmp |= (val << ((where & 0x3) * 8)); | 79 | tmp |= (val << ((where & 0x3) * 8)); |
80 | GALILEO_OUTL(tmp, GT_PCI0_CFGDATA_OFS); | 80 | GT_WRITE(GT_PCI0_CFGDATA_OFS, tmp); |
81 | 81 | ||
82 | return PCIBIOS_SUCCESSFUL; | 82 | return PCIBIOS_SUCCESSFUL; |
83 | 83 | ||
84 | case 1: | 84 | case 1: |
85 | PCI_CFG_SET(devfn, (where & ~0x3)); | 85 | PCI_CFG_SET(devfn, (where & ~0x3)); |
86 | tmp = GALILEO_INL(GT_PCI0_CFGDATA_OFS); | 86 | tmp = GT_READ(GT_PCI0_CFGDATA_OFS); |
87 | tmp &= ~(0xff << ((where & 0x3) * 8)); | 87 | tmp &= ~(0xff << ((where & 0x3) * 8)); |
88 | tmp |= (val << ((where & 0x3) * 8)); | 88 | tmp |= (val << ((where & 0x3) * 8)); |
89 | GALILEO_OUTL(tmp, GT_PCI0_CFGDATA_OFS); | 89 | GT_WRITE(GT_PCI0_CFGDATA_OFS, tmp); |
90 | 90 | ||
91 | return PCIBIOS_SUCCESSFUL; | 91 | return PCIBIOS_SUCCESSFUL; |
92 | } | 92 | } |
diff --git a/arch/mips/philips/pnx8550/common/int.c b/arch/mips/philips/pnx8550/common/int.c index 710611615ca2..0dc23930edbd 100644 --- a/arch/mips/philips/pnx8550/common/int.c +++ b/arch/mips/philips/pnx8550/common/int.c | |||
@@ -38,8 +38,6 @@ | |||
38 | #include <int.h> | 38 | #include <int.h> |
39 | #include <uart.h> | 39 | #include <uart.h> |
40 | 40 | ||
41 | static DEFINE_SPINLOCK(irq_lock); | ||
42 | |||
43 | /* default prio for interrupts */ | 41 | /* default prio for interrupts */ |
44 | /* first one is a no-no so therefore always prio 0 (disabled) */ | 42 | /* first one is a no-no so therefore always prio 0 (disabled) */ |
45 | static char gic_prio[PNX8550_INT_GIC_TOTINT] = { | 43 | static char gic_prio[PNX8550_INT_GIC_TOTINT] = { |
@@ -149,38 +147,6 @@ static inline void unmask_irq(unsigned int irq_nr) | |||
149 | } | 147 | } |
150 | } | 148 | } |
151 | 149 | ||
152 | #define pnx8550_disable pnx8550_ack | ||
153 | static void pnx8550_ack(unsigned int irq) | ||
154 | { | ||
155 | unsigned long flags; | ||
156 | |||
157 | spin_lock_irqsave(&irq_lock, flags); | ||
158 | mask_irq(irq); | ||
159 | spin_unlock_irqrestore(&irq_lock, flags); | ||
160 | } | ||
161 | |||
162 | #define pnx8550_enable pnx8550_unmask | ||
163 | static void pnx8550_unmask(unsigned int irq) | ||
164 | { | ||
165 | unsigned long flags; | ||
166 | |||
167 | spin_lock_irqsave(&irq_lock, flags); | ||
168 | unmask_irq(irq); | ||
169 | spin_unlock_irqrestore(&irq_lock, flags); | ||
170 | } | ||
171 | |||
172 | static unsigned int startup_irq(unsigned int irq_nr) | ||
173 | { | ||
174 | pnx8550_unmask(irq_nr); | ||
175 | return 0; | ||
176 | } | ||
177 | |||
178 | static void shutdown_irq(unsigned int irq_nr) | ||
179 | { | ||
180 | pnx8550_ack(irq_nr); | ||
181 | return; | ||
182 | } | ||
183 | |||
184 | int pnx8550_set_gic_priority(int irq, int priority) | 150 | int pnx8550_set_gic_priority(int irq, int priority) |
185 | { | 151 | { |
186 | int gic_irq = irq-PNX8550_INT_GIC_MIN; | 152 | int gic_irq = irq-PNX8550_INT_GIC_MIN; |
@@ -192,26 +158,19 @@ int pnx8550_set_gic_priority(int irq, int priority) | |||
192 | return prev_priority; | 158 | return prev_priority; |
193 | } | 159 | } |
194 | 160 | ||
195 | static inline void mask_and_ack_level_irq(unsigned int irq) | ||
196 | { | ||
197 | pnx8550_disable(irq); | ||
198 | return; | ||
199 | } | ||
200 | |||
201 | static void end_irq(unsigned int irq) | 161 | static void end_irq(unsigned int irq) |
202 | { | 162 | { |
203 | if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) { | 163 | if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) { |
204 | pnx8550_enable(irq); | 164 | unmask_irq(irq); |
205 | } | 165 | } |
206 | } | 166 | } |
207 | 167 | ||
208 | static struct irq_chip level_irq_type = { | 168 | static struct irq_chip level_irq_type = { |
209 | .typename = "PNX Level IRQ", | 169 | .typename = "PNX Level IRQ", |
210 | .startup = startup_irq, | 170 | .ack = mask_irq, |
211 | .shutdown = shutdown_irq, | 171 | .mask = mask_irq, |
212 | .enable = pnx8550_enable, | 172 | .mask_ack = mask_irq, |
213 | .disable = pnx8550_disable, | 173 | .unmask = unmask_irq, |
214 | .ack = mask_and_ack_level_irq, | ||
215 | .end = end_irq, | 174 | .end = end_irq, |
216 | }; | 175 | }; |
217 | 176 | ||
@@ -233,8 +192,8 @@ void __init arch_init_irq(void) | |||
233 | int configPR; | 192 | int configPR; |
234 | 193 | ||
235 | for (i = 0; i < PNX8550_INT_CP0_TOTINT; i++) { | 194 | for (i = 0; i < PNX8550_INT_CP0_TOTINT; i++) { |
236 | irq_desc[i].chip = &level_irq_type; | 195 | set_irq_chip_and_handler(i, &level_irq_type, handle_level_irq); |
237 | pnx8550_ack(i); /* mask the irq just in case */ | 196 | mask_irq(i); /* mask the irq just in case */ |
238 | } | 197 | } |
239 | 198 | ||
240 | /* init of GIC/IPC interrupts */ | 199 | /* init of GIC/IPC interrupts */ |
@@ -270,7 +229,7 @@ void __init arch_init_irq(void) | |||
270 | /* mask/priority is still 0 so we will not get any | 229 | /* mask/priority is still 0 so we will not get any |
271 | * interrupts until it is unmasked */ | 230 | * interrupts until it is unmasked */ |
272 | 231 | ||
273 | irq_desc[i].chip = &level_irq_type; | 232 | set_irq_chip_and_handler(i, &level_irq_type, handle_level_irq); |
274 | } | 233 | } |
275 | 234 | ||
276 | /* Priority level 0 */ | 235 | /* Priority level 0 */ |
@@ -279,20 +238,21 @@ void __init arch_init_irq(void) | |||
279 | /* Set int vector table address */ | 238 | /* Set int vector table address */ |
280 | PNX8550_GIC_VECTOR_0 = PNX8550_GIC_VECTOR_1 = 0; | 239 | PNX8550_GIC_VECTOR_0 = PNX8550_GIC_VECTOR_1 = 0; |
281 | 240 | ||
282 | irq_desc[MIPS_CPU_GIC_IRQ].chip = &level_irq_type; | 241 | set_irq_chip_and_handler(MIPS_CPU_GIC_IRQ, &level_irq_type, |
242 | handle_level_irq); | ||
283 | setup_irq(MIPS_CPU_GIC_IRQ, &gic_action); | 243 | setup_irq(MIPS_CPU_GIC_IRQ, &gic_action); |
284 | 244 | ||
285 | /* init of Timer interrupts */ | 245 | /* init of Timer interrupts */ |
286 | for (i = PNX8550_INT_TIMER_MIN; i <= PNX8550_INT_TIMER_MAX; i++) { | 246 | for (i = PNX8550_INT_TIMER_MIN; i <= PNX8550_INT_TIMER_MAX; i++) |
287 | irq_desc[i].chip = &level_irq_type; | 247 | set_irq_chip_and_handler(i, &level_irq_type, handle_level_irq); |
288 | } | ||
289 | 248 | ||
290 | /* Stop Timer 1-3 */ | 249 | /* Stop Timer 1-3 */ |
291 | configPR = read_c0_config7(); | 250 | configPR = read_c0_config7(); |
292 | configPR |= 0x00000038; | 251 | configPR |= 0x00000038; |
293 | write_c0_config7(configPR); | 252 | write_c0_config7(configPR); |
294 | 253 | ||
295 | irq_desc[MIPS_CPU_TIMER_IRQ].chip = &level_irq_type; | 254 | set_irq_chip_and_handler(MIPS_CPU_TIMER_IRQ, &level_irq_type, |
255 | handle_level_irq); | ||
296 | setup_irq(MIPS_CPU_TIMER_IRQ, &timer_action); | 256 | setup_irq(MIPS_CPU_TIMER_IRQ, &timer_action); |
297 | } | 257 | } |
298 | 258 | ||
diff --git a/arch/mips/pmc-sierra/yosemite/smp.c b/arch/mips/pmc-sierra/yosemite/smp.c index 3cc0436db6cf..305491e74dbe 100644 --- a/arch/mips/pmc-sierra/yosemite/smp.c +++ b/arch/mips/pmc-sierra/yosemite/smp.c | |||
@@ -99,8 +99,6 @@ void prom_cpus_done(void) | |||
99 | */ | 99 | */ |
100 | void prom_init_secondary(void) | 100 | void prom_init_secondary(void) |
101 | { | 101 | { |
102 | mips_hpt_init(); | ||
103 | |||
104 | set_c0_status(ST0_CO | ST0_IE | ST0_IM); | 102 | set_c0_status(ST0_CO | ST0_IE | ST0_IM); |
105 | } | 103 | } |
106 | 104 | ||
diff --git a/arch/mips/sgi-ip22/ip22-eisa.c b/arch/mips/sgi-ip22/ip22-eisa.c index 0d18ed47c47a..a1a9af6da7bf 100644 --- a/arch/mips/sgi-ip22/ip22-eisa.c +++ b/arch/mips/sgi-ip22/ip22-eisa.c | |||
@@ -95,16 +95,11 @@ static irqreturn_t ip22_eisa_intr(int irq, void *dev_id) | |||
95 | 95 | ||
96 | static void enable_eisa1_irq(unsigned int irq) | 96 | static void enable_eisa1_irq(unsigned int irq) |
97 | { | 97 | { |
98 | unsigned long flags; | ||
99 | u8 mask; | 98 | u8 mask; |
100 | 99 | ||
101 | local_irq_save(flags); | ||
102 | |||
103 | mask = inb(EISA_INT1_MASK); | 100 | mask = inb(EISA_INT1_MASK); |
104 | mask &= ~((u8) (1 << irq)); | 101 | mask &= ~((u8) (1 << irq)); |
105 | outb(mask, EISA_INT1_MASK); | 102 | outb(mask, EISA_INT1_MASK); |
106 | |||
107 | local_irq_restore(flags); | ||
108 | } | 103 | } |
109 | 104 | ||
110 | static unsigned int startup_eisa1_irq(unsigned int irq) | 105 | static unsigned int startup_eisa1_irq(unsigned int irq) |
@@ -130,8 +125,6 @@ static void disable_eisa1_irq(unsigned int irq) | |||
130 | outb(mask, EISA_INT1_MASK); | 125 | outb(mask, EISA_INT1_MASK); |
131 | } | 126 | } |
132 | 127 | ||
133 | #define shutdown_eisa1_irq disable_eisa1_irq | ||
134 | |||
135 | static void mask_and_ack_eisa1_irq(unsigned int irq) | 128 | static void mask_and_ack_eisa1_irq(unsigned int irq) |
136 | { | 129 | { |
137 | disable_eisa1_irq(irq); | 130 | disable_eisa1_irq(irq); |
@@ -148,25 +141,20 @@ static void end_eisa1_irq(unsigned int irq) | |||
148 | static struct irq_chip ip22_eisa1_irq_type = { | 141 | static struct irq_chip ip22_eisa1_irq_type = { |
149 | .typename = "IP22 EISA", | 142 | .typename = "IP22 EISA", |
150 | .startup = startup_eisa1_irq, | 143 | .startup = startup_eisa1_irq, |
151 | .shutdown = shutdown_eisa1_irq, | ||
152 | .enable = enable_eisa1_irq, | ||
153 | .disable = disable_eisa1_irq, | ||
154 | .ack = mask_and_ack_eisa1_irq, | 144 | .ack = mask_and_ack_eisa1_irq, |
145 | .mask = disable_eisa1_irq, | ||
146 | .mask_ack = mask_and_ack_eisa1_irq, | ||
147 | .unmask = enable_eisa1_irq, | ||
155 | .end = end_eisa1_irq, | 148 | .end = end_eisa1_irq, |
156 | }; | 149 | }; |
157 | 150 | ||
158 | static void enable_eisa2_irq(unsigned int irq) | 151 | static void enable_eisa2_irq(unsigned int irq) |
159 | { | 152 | { |
160 | unsigned long flags; | ||
161 | u8 mask; | 153 | u8 mask; |
162 | 154 | ||
163 | local_irq_save(flags); | ||
164 | |||
165 | mask = inb(EISA_INT2_MASK); | 155 | mask = inb(EISA_INT2_MASK); |
166 | mask &= ~((u8) (1 << (irq - 8))); | 156 | mask &= ~((u8) (1 << (irq - 8))); |
167 | outb(mask, EISA_INT2_MASK); | 157 | outb(mask, EISA_INT2_MASK); |
168 | |||
169 | local_irq_restore(flags); | ||
170 | } | 158 | } |
171 | 159 | ||
172 | static unsigned int startup_eisa2_irq(unsigned int irq) | 160 | static unsigned int startup_eisa2_irq(unsigned int irq) |
@@ -192,8 +180,6 @@ static void disable_eisa2_irq(unsigned int irq) | |||
192 | outb(mask, EISA_INT2_MASK); | 180 | outb(mask, EISA_INT2_MASK); |
193 | } | 181 | } |
194 | 182 | ||
195 | #define shutdown_eisa2_irq disable_eisa2_irq | ||
196 | |||
197 | static void mask_and_ack_eisa2_irq(unsigned int irq) | 183 | static void mask_and_ack_eisa2_irq(unsigned int irq) |
198 | { | 184 | { |
199 | disable_eisa2_irq(irq); | 185 | disable_eisa2_irq(irq); |
@@ -210,10 +196,10 @@ static void end_eisa2_irq(unsigned int irq) | |||
210 | static struct irq_chip ip22_eisa2_irq_type = { | 196 | static struct irq_chip ip22_eisa2_irq_type = { |
211 | .typename = "IP22 EISA", | 197 | .typename = "IP22 EISA", |
212 | .startup = startup_eisa2_irq, | 198 | .startup = startup_eisa2_irq, |
213 | .shutdown = shutdown_eisa2_irq, | ||
214 | .enable = enable_eisa2_irq, | ||
215 | .disable = disable_eisa2_irq, | ||
216 | .ack = mask_and_ack_eisa2_irq, | 199 | .ack = mask_and_ack_eisa2_irq, |
200 | .mask = disable_eisa2_irq, | ||
201 | .mask_ack = mask_and_ack_eisa2_irq, | ||
202 | .unmask = enable_eisa2_irq, | ||
217 | .end = end_eisa2_irq, | 203 | .end = end_eisa2_irq, |
218 | }; | 204 | }; |
219 | 205 | ||
@@ -275,13 +261,10 @@ int __init ip22_eisa_init(void) | |||
275 | outb(0, EISA_DMA2_WRITE_SINGLE); | 261 | outb(0, EISA_DMA2_WRITE_SINGLE); |
276 | 262 | ||
277 | for (i = SGINT_EISA; i < (SGINT_EISA + EISA_MAX_IRQ); i++) { | 263 | for (i = SGINT_EISA; i < (SGINT_EISA + EISA_MAX_IRQ); i++) { |
278 | irq_desc[i].status = IRQ_DISABLED; | ||
279 | irq_desc[i].action = 0; | ||
280 | irq_desc[i].depth = 1; | ||
281 | if (i < (SGINT_EISA + 8)) | 264 | if (i < (SGINT_EISA + 8)) |
282 | irq_desc[i].chip = &ip22_eisa1_irq_type; | 265 | set_irq_chip(i, &ip22_eisa1_irq_type); |
283 | else | 266 | else |
284 | irq_desc[i].chip = &ip22_eisa2_irq_type; | 267 | set_irq_chip(i, &ip22_eisa2_irq_type); |
285 | } | 268 | } |
286 | 269 | ||
287 | /* Cannot use request_irq because of kmalloc not being ready at such | 270 | /* Cannot use request_irq because of kmalloc not being ready at such |
diff --git a/arch/mips/sgi-ip22/ip22-int.c b/arch/mips/sgi-ip22/ip22-int.c index af518898eaa1..c7b138053159 100644 --- a/arch/mips/sgi-ip22/ip22-int.c +++ b/arch/mips/sgi-ip22/ip22-int.c | |||
@@ -40,34 +40,17 @@ extern int ip22_eisa_init(void); | |||
40 | 40 | ||
41 | static void enable_local0_irq(unsigned int irq) | 41 | static void enable_local0_irq(unsigned int irq) |
42 | { | 42 | { |
43 | unsigned long flags; | ||
44 | |||
45 | local_irq_save(flags); | ||
46 | /* don't allow mappable interrupt to be enabled from setup_irq, | 43 | /* don't allow mappable interrupt to be enabled from setup_irq, |
47 | * we have our own way to do so */ | 44 | * we have our own way to do so */ |
48 | if (irq != SGI_MAP_0_IRQ) | 45 | if (irq != SGI_MAP_0_IRQ) |
49 | sgint->imask0 |= (1 << (irq - SGINT_LOCAL0)); | 46 | sgint->imask0 |= (1 << (irq - SGINT_LOCAL0)); |
50 | local_irq_restore(flags); | ||
51 | } | ||
52 | |||
53 | static unsigned int startup_local0_irq(unsigned int irq) | ||
54 | { | ||
55 | enable_local0_irq(irq); | ||
56 | return 0; /* Never anything pending */ | ||
57 | } | 47 | } |
58 | 48 | ||
59 | static void disable_local0_irq(unsigned int irq) | 49 | static void disable_local0_irq(unsigned int irq) |
60 | { | 50 | { |
61 | unsigned long flags; | ||
62 | |||
63 | local_irq_save(flags); | ||
64 | sgint->imask0 &= ~(1 << (irq - SGINT_LOCAL0)); | 51 | sgint->imask0 &= ~(1 << (irq - SGINT_LOCAL0)); |
65 | local_irq_restore(flags); | ||
66 | } | 52 | } |
67 | 53 | ||
68 | #define shutdown_local0_irq disable_local0_irq | ||
69 | #define mask_and_ack_local0_irq disable_local0_irq | ||
70 | |||
71 | static void end_local0_irq (unsigned int irq) | 54 | static void end_local0_irq (unsigned int irq) |
72 | { | 55 | { |
73 | if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) | 56 | if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) |
@@ -76,44 +59,26 @@ static void end_local0_irq (unsigned int irq) | |||
76 | 59 | ||
77 | static struct irq_chip ip22_local0_irq_type = { | 60 | static struct irq_chip ip22_local0_irq_type = { |
78 | .typename = "IP22 local 0", | 61 | .typename = "IP22 local 0", |
79 | .startup = startup_local0_irq, | 62 | .ack = disable_local0_irq, |
80 | .shutdown = shutdown_local0_irq, | 63 | .mask = disable_local0_irq, |
81 | .enable = enable_local0_irq, | 64 | .mask_ack = disable_local0_irq, |
82 | .disable = disable_local0_irq, | 65 | .unmask = enable_local0_irq, |
83 | .ack = mask_and_ack_local0_irq, | ||
84 | .end = end_local0_irq, | 66 | .end = end_local0_irq, |
85 | }; | 67 | }; |
86 | 68 | ||
87 | static void enable_local1_irq(unsigned int irq) | 69 | static void enable_local1_irq(unsigned int irq) |
88 | { | 70 | { |
89 | unsigned long flags; | ||
90 | |||
91 | local_irq_save(flags); | ||
92 | /* don't allow mappable interrupt to be enabled from setup_irq, | 71 | /* don't allow mappable interrupt to be enabled from setup_irq, |
93 | * we have our own way to do so */ | 72 | * we have our own way to do so */ |
94 | if (irq != SGI_MAP_1_IRQ) | 73 | if (irq != SGI_MAP_1_IRQ) |
95 | sgint->imask1 |= (1 << (irq - SGINT_LOCAL1)); | 74 | sgint->imask1 |= (1 << (irq - SGINT_LOCAL1)); |
96 | local_irq_restore(flags); | ||
97 | } | ||
98 | |||
99 | static unsigned int startup_local1_irq(unsigned int irq) | ||
100 | { | ||
101 | enable_local1_irq(irq); | ||
102 | return 0; /* Never anything pending */ | ||
103 | } | 75 | } |
104 | 76 | ||
105 | void disable_local1_irq(unsigned int irq) | 77 | void disable_local1_irq(unsigned int irq) |
106 | { | 78 | { |
107 | unsigned long flags; | ||
108 | |||
109 | local_irq_save(flags); | ||
110 | sgint->imask1 &= ~(1 << (irq - SGINT_LOCAL1)); | 79 | sgint->imask1 &= ~(1 << (irq - SGINT_LOCAL1)); |
111 | local_irq_restore(flags); | ||
112 | } | 80 | } |
113 | 81 | ||
114 | #define shutdown_local1_irq disable_local1_irq | ||
115 | #define mask_and_ack_local1_irq disable_local1_irq | ||
116 | |||
117 | static void end_local1_irq (unsigned int irq) | 82 | static void end_local1_irq (unsigned int irq) |
118 | { | 83 | { |
119 | if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) | 84 | if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) |
@@ -122,44 +87,26 @@ static void end_local1_irq (unsigned int irq) | |||
122 | 87 | ||
123 | static struct irq_chip ip22_local1_irq_type = { | 88 | static struct irq_chip ip22_local1_irq_type = { |
124 | .typename = "IP22 local 1", | 89 | .typename = "IP22 local 1", |
125 | .startup = startup_local1_irq, | 90 | .ack = disable_local1_irq, |
126 | .shutdown = shutdown_local1_irq, | 91 | .mask = disable_local1_irq, |
127 | .enable = enable_local1_irq, | 92 | .mask_ack = disable_local1_irq, |
128 | .disable = disable_local1_irq, | 93 | .unmask = enable_local1_irq, |
129 | .ack = mask_and_ack_local1_irq, | ||
130 | .end = end_local1_irq, | 94 | .end = end_local1_irq, |
131 | }; | 95 | }; |
132 | 96 | ||
133 | static void enable_local2_irq(unsigned int irq) | 97 | static void enable_local2_irq(unsigned int irq) |
134 | { | 98 | { |
135 | unsigned long flags; | ||
136 | |||
137 | local_irq_save(flags); | ||
138 | sgint->imask0 |= (1 << (SGI_MAP_0_IRQ - SGINT_LOCAL0)); | 99 | sgint->imask0 |= (1 << (SGI_MAP_0_IRQ - SGINT_LOCAL0)); |
139 | sgint->cmeimask0 |= (1 << (irq - SGINT_LOCAL2)); | 100 | sgint->cmeimask0 |= (1 << (irq - SGINT_LOCAL2)); |
140 | local_irq_restore(flags); | ||
141 | } | ||
142 | |||
143 | static unsigned int startup_local2_irq(unsigned int irq) | ||
144 | { | ||
145 | enable_local2_irq(irq); | ||
146 | return 0; /* Never anything pending */ | ||
147 | } | 101 | } |
148 | 102 | ||
149 | void disable_local2_irq(unsigned int irq) | 103 | void disable_local2_irq(unsigned int irq) |
150 | { | 104 | { |
151 | unsigned long flags; | ||
152 | |||
153 | local_irq_save(flags); | ||
154 | sgint->cmeimask0 &= ~(1 << (irq - SGINT_LOCAL2)); | 105 | sgint->cmeimask0 &= ~(1 << (irq - SGINT_LOCAL2)); |
155 | if (!sgint->cmeimask0) | 106 | if (!sgint->cmeimask0) |
156 | sgint->imask0 &= ~(1 << (SGI_MAP_0_IRQ - SGINT_LOCAL0)); | 107 | sgint->imask0 &= ~(1 << (SGI_MAP_0_IRQ - SGINT_LOCAL0)); |
157 | local_irq_restore(flags); | ||
158 | } | 108 | } |
159 | 109 | ||
160 | #define shutdown_local2_irq disable_local2_irq | ||
161 | #define mask_and_ack_local2_irq disable_local2_irq | ||
162 | |||
163 | static void end_local2_irq (unsigned int irq) | 110 | static void end_local2_irq (unsigned int irq) |
164 | { | 111 | { |
165 | if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) | 112 | if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) |
@@ -168,44 +115,26 @@ static void end_local2_irq (unsigned int irq) | |||
168 | 115 | ||
169 | static struct irq_chip ip22_local2_irq_type = { | 116 | static struct irq_chip ip22_local2_irq_type = { |
170 | .typename = "IP22 local 2", | 117 | .typename = "IP22 local 2", |
171 | .startup = startup_local2_irq, | 118 | .ack = disable_local2_irq, |
172 | .shutdown = shutdown_local2_irq, | 119 | .mask = disable_local2_irq, |
173 | .enable = enable_local2_irq, | 120 | .mask_ack = disable_local2_irq, |
174 | .disable = disable_local2_irq, | 121 | .unmask = enable_local2_irq, |
175 | .ack = mask_and_ack_local2_irq, | ||
176 | .end = end_local2_irq, | 122 | .end = end_local2_irq, |
177 | }; | 123 | }; |
178 | 124 | ||
179 | static void enable_local3_irq(unsigned int irq) | 125 | static void enable_local3_irq(unsigned int irq) |
180 | { | 126 | { |
181 | unsigned long flags; | ||
182 | |||
183 | local_irq_save(flags); | ||
184 | sgint->imask1 |= (1 << (SGI_MAP_1_IRQ - SGINT_LOCAL1)); | 127 | sgint->imask1 |= (1 << (SGI_MAP_1_IRQ - SGINT_LOCAL1)); |
185 | sgint->cmeimask1 |= (1 << (irq - SGINT_LOCAL3)); | 128 | sgint->cmeimask1 |= (1 << (irq - SGINT_LOCAL3)); |
186 | local_irq_restore(flags); | ||
187 | } | ||
188 | |||
189 | static unsigned int startup_local3_irq(unsigned int irq) | ||
190 | { | ||
191 | enable_local3_irq(irq); | ||
192 | return 0; /* Never anything pending */ | ||
193 | } | 129 | } |
194 | 130 | ||
195 | void disable_local3_irq(unsigned int irq) | 131 | void disable_local3_irq(unsigned int irq) |
196 | { | 132 | { |
197 | unsigned long flags; | ||
198 | |||
199 | local_irq_save(flags); | ||
200 | sgint->cmeimask1 &= ~(1 << (irq - SGINT_LOCAL3)); | 133 | sgint->cmeimask1 &= ~(1 << (irq - SGINT_LOCAL3)); |
201 | if (!sgint->cmeimask1) | 134 | if (!sgint->cmeimask1) |
202 | sgint->imask1 &= ~(1 << (SGI_MAP_1_IRQ - SGINT_LOCAL1)); | 135 | sgint->imask1 &= ~(1 << (SGI_MAP_1_IRQ - SGINT_LOCAL1)); |
203 | local_irq_restore(flags); | ||
204 | } | 136 | } |
205 | 137 | ||
206 | #define shutdown_local3_irq disable_local3_irq | ||
207 | #define mask_and_ack_local3_irq disable_local3_irq | ||
208 | |||
209 | static void end_local3_irq (unsigned int irq) | 138 | static void end_local3_irq (unsigned int irq) |
210 | { | 139 | { |
211 | if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) | 140 | if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) |
@@ -214,11 +143,10 @@ static void end_local3_irq (unsigned int irq) | |||
214 | 143 | ||
215 | static struct irq_chip ip22_local3_irq_type = { | 144 | static struct irq_chip ip22_local3_irq_type = { |
216 | .typename = "IP22 local 3", | 145 | .typename = "IP22 local 3", |
217 | .startup = startup_local3_irq, | 146 | .ack = disable_local3_irq, |
218 | .shutdown = shutdown_local3_irq, | 147 | .mask = disable_local3_irq, |
219 | .enable = enable_local3_irq, | 148 | .mask_ack = disable_local3_irq, |
220 | .disable = disable_local3_irq, | 149 | .unmask = enable_local3_irq, |
221 | .ack = mask_and_ack_local3_irq, | ||
222 | .end = end_local3_irq, | 150 | .end = end_local3_irq, |
223 | }; | 151 | }; |
224 | 152 | ||
@@ -430,10 +358,7 @@ void __init arch_init_irq(void) | |||
430 | else | 358 | else |
431 | handler = &ip22_local3_irq_type; | 359 | handler = &ip22_local3_irq_type; |
432 | 360 | ||
433 | irq_desc[i].status = IRQ_DISABLED; | 361 | set_irq_chip_and_handler(i, handler, handle_level_irq); |
434 | irq_desc[i].action = 0; | ||
435 | irq_desc[i].depth = 1; | ||
436 | irq_desc[i].chip = handler; | ||
437 | } | 362 | } |
438 | 363 | ||
439 | /* vector handler. this register the IRQ as non-sharable */ | 364 | /* vector handler. this register the IRQ as non-sharable */ |
diff --git a/arch/mips/sgi-ip27/ip27-irq.c b/arch/mips/sgi-ip27/ip27-irq.c index 270ecd3e6b4a..5f8835b4e84a 100644 --- a/arch/mips/sgi-ip27/ip27-irq.c +++ b/arch/mips/sgi-ip27/ip27-irq.c | |||
@@ -332,11 +332,6 @@ static inline void disable_bridge_irq(unsigned int irq) | |||
332 | intr_disconnect_level(cpu, swlevel); | 332 | intr_disconnect_level(cpu, swlevel); |
333 | } | 333 | } |
334 | 334 | ||
335 | static void mask_and_ack_bridge_irq(unsigned int irq) | ||
336 | { | ||
337 | disable_bridge_irq(irq); | ||
338 | } | ||
339 | |||
340 | static void end_bridge_irq(unsigned int irq) | 335 | static void end_bridge_irq(unsigned int irq) |
341 | { | 336 | { |
342 | if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)) && | 337 | if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)) && |
@@ -348,18 +343,16 @@ static struct irq_chip bridge_irq_type = { | |||
348 | .typename = "bridge", | 343 | .typename = "bridge", |
349 | .startup = startup_bridge_irq, | 344 | .startup = startup_bridge_irq, |
350 | .shutdown = shutdown_bridge_irq, | 345 | .shutdown = shutdown_bridge_irq, |
351 | .enable = enable_bridge_irq, | 346 | .ack = disable_bridge_irq, |
352 | .disable = disable_bridge_irq, | 347 | .mask = disable_bridge_irq, |
353 | .ack = mask_and_ack_bridge_irq, | 348 | .mask_ack = disable_bridge_irq, |
349 | .unmask = enable_bridge_irq, | ||
354 | .end = end_bridge_irq, | 350 | .end = end_bridge_irq, |
355 | }; | 351 | }; |
356 | 352 | ||
357 | void __devinit register_bridge_irq(unsigned int irq) | 353 | void __devinit register_bridge_irq(unsigned int irq) |
358 | { | 354 | { |
359 | irq_desc[irq].status = IRQ_DISABLED; | 355 | set_irq_chip_and_handler(irq, &bridge_irq_type, handle_level_irq); |
360 | irq_desc[irq].action = 0; | ||
361 | irq_desc[irq].depth = 1; | ||
362 | irq_desc[irq].chip = &bridge_irq_type; | ||
363 | } | 356 | } |
364 | 357 | ||
365 | int __devinit request_bridge_irq(struct bridge_controller *bc) | 358 | int __devinit request_bridge_irq(struct bridge_controller *bc) |
diff --git a/arch/mips/sgi-ip27/ip27-timer.c b/arch/mips/sgi-ip27/ip27-timer.c index 5e82a268e3c9..7d361726bbfb 100644 --- a/arch/mips/sgi-ip27/ip27-timer.c +++ b/arch/mips/sgi-ip27/ip27-timer.c | |||
@@ -172,15 +172,6 @@ static __init unsigned long get_m48t35_time(void) | |||
172 | return mktime(year, month, date, hour, min, sec); | 172 | return mktime(year, month, date, hour, min, sec); |
173 | } | 173 | } |
174 | 174 | ||
175 | static unsigned int startup_rt_irq(unsigned int irq) | ||
176 | { | ||
177 | return 0; | ||
178 | } | ||
179 | |||
180 | static void shutdown_rt_irq(unsigned int irq) | ||
181 | { | ||
182 | } | ||
183 | |||
184 | static void enable_rt_irq(unsigned int irq) | 175 | static void enable_rt_irq(unsigned int irq) |
185 | { | 176 | { |
186 | } | 177 | } |
@@ -189,21 +180,17 @@ static void disable_rt_irq(unsigned int irq) | |||
189 | { | 180 | { |
190 | } | 181 | } |
191 | 182 | ||
192 | static void mask_and_ack_rt(unsigned int irq) | ||
193 | { | ||
194 | } | ||
195 | |||
196 | static void end_rt_irq(unsigned int irq) | 183 | static void end_rt_irq(unsigned int irq) |
197 | { | 184 | { |
198 | } | 185 | } |
199 | 186 | ||
200 | static struct irq_chip rt_irq_type = { | 187 | static struct irq_chip rt_irq_type = { |
201 | .typename = "SN HUB RT timer", | 188 | .typename = "SN HUB RT timer", |
202 | .startup = startup_rt_irq, | 189 | .ack = disable_rt_irq, |
203 | .shutdown = shutdown_rt_irq, | 190 | .mask = disable_rt_irq, |
204 | .enable = enable_rt_irq, | 191 | .mask_ack = disable_rt_irq, |
205 | .disable = disable_rt_irq, | 192 | .unmask = enable_rt_irq, |
206 | .ack = mask_and_ack_rt, | 193 | .eoi = enable_rt_irq, |
207 | .end = end_rt_irq, | 194 | .end = end_rt_irq, |
208 | }; | 195 | }; |
209 | 196 | ||
@@ -221,10 +208,7 @@ void __init plat_timer_setup(struct irqaction *irq) | |||
221 | if (irqno < 0) | 208 | if (irqno < 0) |
222 | panic("Can't allocate interrupt number for timer interrupt"); | 209 | panic("Can't allocate interrupt number for timer interrupt"); |
223 | 210 | ||
224 | irq_desc[irqno].status = IRQ_DISABLED; | 211 | set_irq_chip_and_handler(irqno, &rt_irq_type, handle_percpu_irq); |
225 | irq_desc[irqno].action = NULL; | ||
226 | irq_desc[irqno].depth = 1; | ||
227 | irq_desc[irqno].chip = &rt_irq_type; | ||
228 | 212 | ||
229 | /* over-write the handler, we use our own way */ | 213 | /* over-write the handler, we use our own way */ |
230 | irq->handler = no_action; | 214 | irq->handler = no_action; |
@@ -239,14 +223,14 @@ void __init plat_timer_setup(struct irqaction *irq) | |||
239 | setup_irq(irqno, &rt_irqaction); | 223 | setup_irq(irqno, &rt_irqaction); |
240 | } | 224 | } |
241 | 225 | ||
242 | static unsigned int ip27_hpt_read(void) | 226 | static cycle_t ip27_hpt_read(void) |
243 | { | 227 | { |
244 | return REMOTE_HUB_L(cputonasid(0), PI_RT_COUNT); | 228 | return REMOTE_HUB_L(cputonasid(0), PI_RT_COUNT); |
245 | } | 229 | } |
246 | 230 | ||
247 | void __init ip27_time_init(void) | 231 | void __init ip27_time_init(void) |
248 | { | 232 | { |
249 | mips_hpt_read = ip27_hpt_read; | 233 | clocksource_mips.read = ip27_hpt_read; |
250 | mips_hpt_frequency = CYCLES_PER_SEC; | 234 | mips_hpt_frequency = CYCLES_PER_SEC; |
251 | xtime.tv_sec = get_m48t35_time(); | 235 | xtime.tv_sec = get_m48t35_time(); |
252 | xtime.tv_nsec = 0; | 236 | xtime.tv_nsec = 0; |
diff --git a/arch/mips/sgi-ip32/ip32-irq.c b/arch/mips/sgi-ip32/ip32-irq.c index c9acadd0846b..ae063864c026 100644 --- a/arch/mips/sgi-ip32/ip32-irq.c +++ b/arch/mips/sgi-ip32/ip32-irq.c | |||
@@ -113,12 +113,6 @@ static void inline flush_mace_bus(void) | |||
113 | * is quite different anyway. | 113 | * is quite different anyway. |
114 | */ | 114 | */ |
115 | 115 | ||
116 | /* | ||
117 | * IRQ spinlock - Ralf says not to disable CPU interrupts, | ||
118 | * and I think he knows better. | ||
119 | */ | ||
120 | static DEFINE_SPINLOCK(ip32_irq_lock); | ||
121 | |||
122 | /* Some initial interrupts to set up */ | 116 | /* Some initial interrupts to set up */ |
123 | extern irqreturn_t crime_memerr_intr(int irq, void *dev_id); | 117 | extern irqreturn_t crime_memerr_intr(int irq, void *dev_id); |
124 | extern irqreturn_t crime_cpuerr_intr(int irq, void *dev_id); | 118 | extern irqreturn_t crime_cpuerr_intr(int irq, void *dev_id); |
@@ -138,12 +132,6 @@ static void enable_cpu_irq(unsigned int irq) | |||
138 | set_c0_status(STATUSF_IP7); | 132 | set_c0_status(STATUSF_IP7); |
139 | } | 133 | } |
140 | 134 | ||
141 | static unsigned int startup_cpu_irq(unsigned int irq) | ||
142 | { | ||
143 | enable_cpu_irq(irq); | ||
144 | return 0; | ||
145 | } | ||
146 | |||
147 | static void disable_cpu_irq(unsigned int irq) | 135 | static void disable_cpu_irq(unsigned int irq) |
148 | { | 136 | { |
149 | clear_c0_status(STATUSF_IP7); | 137 | clear_c0_status(STATUSF_IP7); |
@@ -155,16 +143,12 @@ static void end_cpu_irq(unsigned int irq) | |||
155 | enable_cpu_irq (irq); | 143 | enable_cpu_irq (irq); |
156 | } | 144 | } |
157 | 145 | ||
158 | #define shutdown_cpu_irq disable_cpu_irq | ||
159 | #define mask_and_ack_cpu_irq disable_cpu_irq | ||
160 | |||
161 | static struct irq_chip ip32_cpu_interrupt = { | 146 | static struct irq_chip ip32_cpu_interrupt = { |
162 | .typename = "IP32 CPU", | 147 | .typename = "IP32 CPU", |
163 | .startup = startup_cpu_irq, | 148 | .ack = disable_cpu_irq, |
164 | .shutdown = shutdown_cpu_irq, | 149 | .mask = disable_cpu_irq, |
165 | .enable = enable_cpu_irq, | 150 | .mask_ack = disable_cpu_irq, |
166 | .disable = disable_cpu_irq, | 151 | .unmask = enable_cpu_irq, |
167 | .ack = mask_and_ack_cpu_irq, | ||
168 | .end = end_cpu_irq, | 152 | .end = end_cpu_irq, |
169 | }; | 153 | }; |
170 | 154 | ||
@@ -177,45 +161,27 @@ static uint64_t crime_mask; | |||
177 | 161 | ||
178 | static void enable_crime_irq(unsigned int irq) | 162 | static void enable_crime_irq(unsigned int irq) |
179 | { | 163 | { |
180 | unsigned long flags; | ||
181 | |||
182 | spin_lock_irqsave(&ip32_irq_lock, flags); | ||
183 | crime_mask |= 1 << (irq - 1); | 164 | crime_mask |= 1 << (irq - 1); |
184 | crime->imask = crime_mask; | 165 | crime->imask = crime_mask; |
185 | spin_unlock_irqrestore(&ip32_irq_lock, flags); | ||
186 | } | ||
187 | |||
188 | static unsigned int startup_crime_irq(unsigned int irq) | ||
189 | { | ||
190 | enable_crime_irq(irq); | ||
191 | return 0; /* This is probably not right; we could have pending irqs */ | ||
192 | } | 166 | } |
193 | 167 | ||
194 | static void disable_crime_irq(unsigned int irq) | 168 | static void disable_crime_irq(unsigned int irq) |
195 | { | 169 | { |
196 | unsigned long flags; | ||
197 | |||
198 | spin_lock_irqsave(&ip32_irq_lock, flags); | ||
199 | crime_mask &= ~(1 << (irq - 1)); | 170 | crime_mask &= ~(1 << (irq - 1)); |
200 | crime->imask = crime_mask; | 171 | crime->imask = crime_mask; |
201 | flush_crime_bus(); | 172 | flush_crime_bus(); |
202 | spin_unlock_irqrestore(&ip32_irq_lock, flags); | ||
203 | } | 173 | } |
204 | 174 | ||
205 | static void mask_and_ack_crime_irq(unsigned int irq) | 175 | static void mask_and_ack_crime_irq(unsigned int irq) |
206 | { | 176 | { |
207 | unsigned long flags; | ||
208 | |||
209 | /* Edge triggered interrupts must be cleared. */ | 177 | /* Edge triggered interrupts must be cleared. */ |
210 | if ((irq >= CRIME_GBE0_IRQ && irq <= CRIME_GBE3_IRQ) | 178 | if ((irq >= CRIME_GBE0_IRQ && irq <= CRIME_GBE3_IRQ) |
211 | || (irq >= CRIME_RE_EMPTY_E_IRQ && irq <= CRIME_RE_IDLE_E_IRQ) | 179 | || (irq >= CRIME_RE_EMPTY_E_IRQ && irq <= CRIME_RE_IDLE_E_IRQ) |
212 | || (irq >= CRIME_SOFT0_IRQ && irq <= CRIME_SOFT2_IRQ)) { | 180 | || (irq >= CRIME_SOFT0_IRQ && irq <= CRIME_SOFT2_IRQ)) { |
213 | uint64_t crime_int; | 181 | uint64_t crime_int; |
214 | spin_lock_irqsave(&ip32_irq_lock, flags); | ||
215 | crime_int = crime->hard_int; | 182 | crime_int = crime->hard_int; |
216 | crime_int &= ~(1 << (irq - 1)); | 183 | crime_int &= ~(1 << (irq - 1)); |
217 | crime->hard_int = crime_int; | 184 | crime->hard_int = crime_int; |
218 | spin_unlock_irqrestore(&ip32_irq_lock, flags); | ||
219 | } | 185 | } |
220 | disable_crime_irq(irq); | 186 | disable_crime_irq(irq); |
221 | } | 187 | } |
@@ -226,15 +192,12 @@ static void end_crime_irq(unsigned int irq) | |||
226 | enable_crime_irq(irq); | 192 | enable_crime_irq(irq); |
227 | } | 193 | } |
228 | 194 | ||
229 | #define shutdown_crime_irq disable_crime_irq | ||
230 | |||
231 | static struct irq_chip ip32_crime_interrupt = { | 195 | static struct irq_chip ip32_crime_interrupt = { |
232 | .typename = "IP32 CRIME", | 196 | .typename = "IP32 CRIME", |
233 | .startup = startup_crime_irq, | ||
234 | .shutdown = shutdown_crime_irq, | ||
235 | .enable = enable_crime_irq, | ||
236 | .disable = disable_crime_irq, | ||
237 | .ack = mask_and_ack_crime_irq, | 197 | .ack = mask_and_ack_crime_irq, |
198 | .mask = disable_crime_irq, | ||
199 | .mask_ack = mask_and_ack_crime_irq, | ||
200 | .unmask = enable_crime_irq, | ||
238 | .end = end_crime_irq, | 201 | .end = end_crime_irq, |
239 | }; | 202 | }; |
240 | 203 | ||
@@ -248,34 +211,20 @@ static unsigned long macepci_mask; | |||
248 | 211 | ||
249 | static void enable_macepci_irq(unsigned int irq) | 212 | static void enable_macepci_irq(unsigned int irq) |
250 | { | 213 | { |
251 | unsigned long flags; | ||
252 | |||
253 | spin_lock_irqsave(&ip32_irq_lock, flags); | ||
254 | macepci_mask |= MACEPCI_CONTROL_INT(irq - 9); | 214 | macepci_mask |= MACEPCI_CONTROL_INT(irq - 9); |
255 | mace->pci.control = macepci_mask; | 215 | mace->pci.control = macepci_mask; |
256 | crime_mask |= 1 << (irq - 1); | 216 | crime_mask |= 1 << (irq - 1); |
257 | crime->imask = crime_mask; | 217 | crime->imask = crime_mask; |
258 | spin_unlock_irqrestore(&ip32_irq_lock, flags); | ||
259 | } | ||
260 | |||
261 | static unsigned int startup_macepci_irq(unsigned int irq) | ||
262 | { | ||
263 | enable_macepci_irq (irq); | ||
264 | return 0; | ||
265 | } | 218 | } |
266 | 219 | ||
267 | static void disable_macepci_irq(unsigned int irq) | 220 | static void disable_macepci_irq(unsigned int irq) |
268 | { | 221 | { |
269 | unsigned long flags; | ||
270 | |||
271 | spin_lock_irqsave(&ip32_irq_lock, flags); | ||
272 | crime_mask &= ~(1 << (irq - 1)); | 222 | crime_mask &= ~(1 << (irq - 1)); |
273 | crime->imask = crime_mask; | 223 | crime->imask = crime_mask; |
274 | flush_crime_bus(); | 224 | flush_crime_bus(); |
275 | macepci_mask &= ~MACEPCI_CONTROL_INT(irq - 9); | 225 | macepci_mask &= ~MACEPCI_CONTROL_INT(irq - 9); |
276 | mace->pci.control = macepci_mask; | 226 | mace->pci.control = macepci_mask; |
277 | flush_mace_bus(); | 227 | flush_mace_bus(); |
278 | spin_unlock_irqrestore(&ip32_irq_lock, flags); | ||
279 | } | 228 | } |
280 | 229 | ||
281 | static void end_macepci_irq(unsigned int irq) | 230 | static void end_macepci_irq(unsigned int irq) |
@@ -284,16 +233,12 @@ static void end_macepci_irq(unsigned int irq) | |||
284 | enable_macepci_irq(irq); | 233 | enable_macepci_irq(irq); |
285 | } | 234 | } |
286 | 235 | ||
287 | #define shutdown_macepci_irq disable_macepci_irq | ||
288 | #define mask_and_ack_macepci_irq disable_macepci_irq | ||
289 | |||
290 | static struct irq_chip ip32_macepci_interrupt = { | 236 | static struct irq_chip ip32_macepci_interrupt = { |
291 | .typename = "IP32 MACE PCI", | 237 | .typename = "IP32 MACE PCI", |
292 | .startup = startup_macepci_irq, | 238 | .ack = disable_macepci_irq, |
293 | .shutdown = shutdown_macepci_irq, | 239 | .mask = disable_macepci_irq, |
294 | .enable = enable_macepci_irq, | 240 | .mask_ack = disable_macepci_irq, |
295 | .disable = disable_macepci_irq, | 241 | .unmask = enable_macepci_irq, |
296 | .ack = mask_and_ack_macepci_irq, | ||
297 | .end = end_macepci_irq, | 242 | .end = end_macepci_irq, |
298 | }; | 243 | }; |
299 | 244 | ||
@@ -339,7 +284,6 @@ static unsigned long maceisa_mask; | |||
339 | static void enable_maceisa_irq (unsigned int irq) | 284 | static void enable_maceisa_irq (unsigned int irq) |
340 | { | 285 | { |
341 | unsigned int crime_int = 0; | 286 | unsigned int crime_int = 0; |
342 | unsigned long flags; | ||
343 | 287 | ||
344 | DBG ("maceisa enable: %u\n", irq); | 288 | DBG ("maceisa enable: %u\n", irq); |
345 | 289 | ||
@@ -355,26 +299,16 @@ static void enable_maceisa_irq (unsigned int irq) | |||
355 | break; | 299 | break; |
356 | } | 300 | } |
357 | DBG ("crime_int %08x enabled\n", crime_int); | 301 | DBG ("crime_int %08x enabled\n", crime_int); |
358 | spin_lock_irqsave(&ip32_irq_lock, flags); | ||
359 | crime_mask |= crime_int; | 302 | crime_mask |= crime_int; |
360 | crime->imask = crime_mask; | 303 | crime->imask = crime_mask; |
361 | maceisa_mask |= 1 << (irq - 33); | 304 | maceisa_mask |= 1 << (irq - 33); |
362 | mace->perif.ctrl.imask = maceisa_mask; | 305 | mace->perif.ctrl.imask = maceisa_mask; |
363 | spin_unlock_irqrestore(&ip32_irq_lock, flags); | ||
364 | } | ||
365 | |||
366 | static unsigned int startup_maceisa_irq(unsigned int irq) | ||
367 | { | ||
368 | enable_maceisa_irq(irq); | ||
369 | return 0; | ||
370 | } | 306 | } |
371 | 307 | ||
372 | static void disable_maceisa_irq(unsigned int irq) | 308 | static void disable_maceisa_irq(unsigned int irq) |
373 | { | 309 | { |
374 | unsigned int crime_int = 0; | 310 | unsigned int crime_int = 0; |
375 | unsigned long flags; | ||
376 | 311 | ||
377 | spin_lock_irqsave(&ip32_irq_lock, flags); | ||
378 | maceisa_mask &= ~(1 << (irq - 33)); | 312 | maceisa_mask &= ~(1 << (irq - 33)); |
379 | if(!(maceisa_mask & MACEISA_AUDIO_INT)) | 313 | if(!(maceisa_mask & MACEISA_AUDIO_INT)) |
380 | crime_int |= MACE_AUDIO_INT; | 314 | crime_int |= MACE_AUDIO_INT; |
@@ -387,23 +321,20 @@ static void disable_maceisa_irq(unsigned int irq) | |||
387 | flush_crime_bus(); | 321 | flush_crime_bus(); |
388 | mace->perif.ctrl.imask = maceisa_mask; | 322 | mace->perif.ctrl.imask = maceisa_mask; |
389 | flush_mace_bus(); | 323 | flush_mace_bus(); |
390 | spin_unlock_irqrestore(&ip32_irq_lock, flags); | ||
391 | } | 324 | } |
392 | 325 | ||
393 | static void mask_and_ack_maceisa_irq(unsigned int irq) | 326 | static void mask_and_ack_maceisa_irq(unsigned int irq) |
394 | { | 327 | { |
395 | unsigned long mace_int, flags; | 328 | unsigned long mace_int; |
396 | 329 | ||
397 | switch (irq) { | 330 | switch (irq) { |
398 | case MACEISA_PARALLEL_IRQ: | 331 | case MACEISA_PARALLEL_IRQ: |
399 | case MACEISA_SERIAL1_TDMAPR_IRQ: | 332 | case MACEISA_SERIAL1_TDMAPR_IRQ: |
400 | case MACEISA_SERIAL2_TDMAPR_IRQ: | 333 | case MACEISA_SERIAL2_TDMAPR_IRQ: |
401 | /* edge triggered */ | 334 | /* edge triggered */ |
402 | spin_lock_irqsave(&ip32_irq_lock, flags); | ||
403 | mace_int = mace->perif.ctrl.istat; | 335 | mace_int = mace->perif.ctrl.istat; |
404 | mace_int &= ~(1 << (irq - 33)); | 336 | mace_int &= ~(1 << (irq - 33)); |
405 | mace->perif.ctrl.istat = mace_int; | 337 | mace->perif.ctrl.istat = mace_int; |
406 | spin_unlock_irqrestore(&ip32_irq_lock, flags); | ||
407 | break; | 338 | break; |
408 | } | 339 | } |
409 | disable_maceisa_irq(irq); | 340 | disable_maceisa_irq(irq); |
@@ -415,15 +346,12 @@ static void end_maceisa_irq(unsigned irq) | |||
415 | enable_maceisa_irq(irq); | 346 | enable_maceisa_irq(irq); |
416 | } | 347 | } |
417 | 348 | ||
418 | #define shutdown_maceisa_irq disable_maceisa_irq | ||
419 | |||
420 | static struct irq_chip ip32_maceisa_interrupt = { | 349 | static struct irq_chip ip32_maceisa_interrupt = { |
421 | .typename = "IP32 MACE ISA", | 350 | .typename = "IP32 MACE ISA", |
422 | .startup = startup_maceisa_irq, | ||
423 | .shutdown = shutdown_maceisa_irq, | ||
424 | .enable = enable_maceisa_irq, | ||
425 | .disable = disable_maceisa_irq, | ||
426 | .ack = mask_and_ack_maceisa_irq, | 351 | .ack = mask_and_ack_maceisa_irq, |
352 | .mask = disable_maceisa_irq, | ||
353 | .mask_ack = mask_and_ack_maceisa_irq, | ||
354 | .unmask = enable_maceisa_irq, | ||
427 | .end = end_maceisa_irq, | 355 | .end = end_maceisa_irq, |
428 | }; | 356 | }; |
429 | 357 | ||
@@ -433,29 +361,15 @@ static struct irq_chip ip32_maceisa_interrupt = { | |||
433 | 361 | ||
434 | static void enable_mace_irq(unsigned int irq) | 362 | static void enable_mace_irq(unsigned int irq) |
435 | { | 363 | { |
436 | unsigned long flags; | ||
437 | |||
438 | spin_lock_irqsave(&ip32_irq_lock, flags); | ||
439 | crime_mask |= 1 << (irq - 1); | 364 | crime_mask |= 1 << (irq - 1); |
440 | crime->imask = crime_mask; | 365 | crime->imask = crime_mask; |
441 | spin_unlock_irqrestore(&ip32_irq_lock, flags); | ||
442 | } | ||
443 | |||
444 | static unsigned int startup_mace_irq(unsigned int irq) | ||
445 | { | ||
446 | enable_mace_irq(irq); | ||
447 | return 0; | ||
448 | } | 366 | } |
449 | 367 | ||
450 | static void disable_mace_irq(unsigned int irq) | 368 | static void disable_mace_irq(unsigned int irq) |
451 | { | 369 | { |
452 | unsigned long flags; | ||
453 | |||
454 | spin_lock_irqsave(&ip32_irq_lock, flags); | ||
455 | crime_mask &= ~(1 << (irq - 1)); | 370 | crime_mask &= ~(1 << (irq - 1)); |
456 | crime->imask = crime_mask; | 371 | crime->imask = crime_mask; |
457 | flush_crime_bus(); | 372 | flush_crime_bus(); |
458 | spin_unlock_irqrestore(&ip32_irq_lock, flags); | ||
459 | } | 373 | } |
460 | 374 | ||
461 | static void end_mace_irq(unsigned int irq) | 375 | static void end_mace_irq(unsigned int irq) |
@@ -464,16 +378,12 @@ static void end_mace_irq(unsigned int irq) | |||
464 | enable_mace_irq(irq); | 378 | enable_mace_irq(irq); |
465 | } | 379 | } |
466 | 380 | ||
467 | #define shutdown_mace_irq disable_mace_irq | ||
468 | #define mask_and_ack_mace_irq disable_mace_irq | ||
469 | |||
470 | static struct irq_chip ip32_mace_interrupt = { | 381 | static struct irq_chip ip32_mace_interrupt = { |
471 | .typename = "IP32 MACE", | 382 | .typename = "IP32 MACE", |
472 | .startup = startup_mace_irq, | 383 | .ack = disable_mace_irq, |
473 | .shutdown = shutdown_mace_irq, | 384 | .mask = disable_mace_irq, |
474 | .enable = enable_mace_irq, | 385 | .mask_ack = disable_mace_irq, |
475 | .disable = disable_mace_irq, | 386 | .unmask = enable_mace_irq, |
476 | .ack = mask_and_ack_mace_irq, | ||
477 | .end = end_mace_irq, | 387 | .end = end_mace_irq, |
478 | }; | 388 | }; |
479 | 389 | ||
@@ -586,10 +496,7 @@ void __init arch_init_irq(void) | |||
586 | else | 496 | else |
587 | controller = &ip32_maceisa_interrupt; | 497 | controller = &ip32_maceisa_interrupt; |
588 | 498 | ||
589 | irq_desc[irq].status = IRQ_DISABLED; | 499 | set_irq_chip(irq, controller); |
590 | irq_desc[irq].action = 0; | ||
591 | irq_desc[irq].depth = 0; | ||
592 | irq_desc[irq].chip = controller; | ||
593 | } | 500 | } |
594 | setup_irq(CRIME_MEMERR_IRQ, &memerr_irq); | 501 | setup_irq(CRIME_MEMERR_IRQ, &memerr_irq); |
595 | setup_irq(CRIME_CPUERR_IRQ, &cpuerr_irq); | 502 | setup_irq(CRIME_CPUERR_IRQ, &cpuerr_irq); |
diff --git a/arch/mips/sibyte/bcm1480/irq.c b/arch/mips/sibyte/bcm1480/irq.c index 8b1f41484923..2e8f6b2e2420 100644 --- a/arch/mips/sibyte/bcm1480/irq.c +++ b/arch/mips/sibyte/bcm1480/irq.c | |||
@@ -45,11 +45,9 @@ | |||
45 | */ | 45 | */ |
46 | 46 | ||
47 | 47 | ||
48 | #define shutdown_bcm1480_irq disable_bcm1480_irq | ||
49 | static void end_bcm1480_irq(unsigned int irq); | 48 | static void end_bcm1480_irq(unsigned int irq); |
50 | static void enable_bcm1480_irq(unsigned int irq); | 49 | static void enable_bcm1480_irq(unsigned int irq); |
51 | static void disable_bcm1480_irq(unsigned int irq); | 50 | static void disable_bcm1480_irq(unsigned int irq); |
52 | static unsigned int startup_bcm1480_irq(unsigned int irq); | ||
53 | static void ack_bcm1480_irq(unsigned int irq); | 51 | static void ack_bcm1480_irq(unsigned int irq); |
54 | #ifdef CONFIG_SMP | 52 | #ifdef CONFIG_SMP |
55 | static void bcm1480_set_affinity(unsigned int irq, cpumask_t mask); | 53 | static void bcm1480_set_affinity(unsigned int irq, cpumask_t mask); |
@@ -85,11 +83,10 @@ extern char sb1250_duart_present[]; | |||
85 | 83 | ||
86 | static struct irq_chip bcm1480_irq_type = { | 84 | static struct irq_chip bcm1480_irq_type = { |
87 | .typename = "BCM1480-IMR", | 85 | .typename = "BCM1480-IMR", |
88 | .startup = startup_bcm1480_irq, | ||
89 | .shutdown = shutdown_bcm1480_irq, | ||
90 | .enable = enable_bcm1480_irq, | ||
91 | .disable = disable_bcm1480_irq, | ||
92 | .ack = ack_bcm1480_irq, | 86 | .ack = ack_bcm1480_irq, |
87 | .mask = disable_bcm1480_irq, | ||
88 | .mask_ack = ack_bcm1480_irq, | ||
89 | .unmask = enable_bcm1480_irq, | ||
93 | .end = end_bcm1480_irq, | 90 | .end = end_bcm1480_irq, |
94 | #ifdef CONFIG_SMP | 91 | #ifdef CONFIG_SMP |
95 | .set_affinity = bcm1480_set_affinity | 92 | .set_affinity = bcm1480_set_affinity |
@@ -188,14 +185,6 @@ static void bcm1480_set_affinity(unsigned int irq, cpumask_t mask) | |||
188 | 185 | ||
189 | /*****************************************************************************/ | 186 | /*****************************************************************************/ |
190 | 187 | ||
191 | static unsigned int startup_bcm1480_irq(unsigned int irq) | ||
192 | { | ||
193 | bcm1480_unmask_irq(bcm1480_irq_owner[irq], irq); | ||
194 | |||
195 | return 0; /* never anything pending */ | ||
196 | } | ||
197 | |||
198 | |||
199 | static void disable_bcm1480_irq(unsigned int irq) | 188 | static void disable_bcm1480_irq(unsigned int irq) |
200 | { | 189 | { |
201 | bcm1480_mask_irq(bcm1480_irq_owner[irq], irq); | 190 | bcm1480_mask_irq(bcm1480_irq_owner[irq], irq); |
@@ -270,16 +259,9 @@ void __init init_bcm1480_irqs(void) | |||
270 | { | 259 | { |
271 | int i; | 260 | int i; |
272 | 261 | ||
273 | for (i = 0; i < NR_IRQS; i++) { | 262 | for (i = 0; i < BCM1480_NR_IRQS; i++) { |
274 | irq_desc[i].status = IRQ_DISABLED; | 263 | set_irq_chip(i, &bcm1480_irq_type); |
275 | irq_desc[i].action = 0; | 264 | bcm1480_irq_owner[i] = 0; |
276 | irq_desc[i].depth = 1; | ||
277 | if (i < BCM1480_NR_IRQS) { | ||
278 | irq_desc[i].chip = &bcm1480_irq_type; | ||
279 | bcm1480_irq_owner[i] = 0; | ||
280 | } else { | ||
281 | irq_desc[i].chip = &no_irq_chip; | ||
282 | } | ||
283 | } | 265 | } |
284 | } | 266 | } |
285 | 267 | ||
diff --git a/arch/mips/sibyte/bcm1480/time.c b/arch/mips/sibyte/bcm1480/time.c index e136bde5248e..6f3f71bf4244 100644 --- a/arch/mips/sibyte/bcm1480/time.c +++ b/arch/mips/sibyte/bcm1480/time.c | |||
@@ -94,8 +94,6 @@ void bcm1480_time_init(void) | |||
94 | */ | 94 | */ |
95 | } | 95 | } |
96 | 96 | ||
97 | #include <asm/sibyte/sb1250.h> | ||
98 | |||
99 | void bcm1480_timer_interrupt(void) | 97 | void bcm1480_timer_interrupt(void) |
100 | { | 98 | { |
101 | int cpu = smp_processor_id(); | 99 | int cpu = smp_processor_id(); |
@@ -119,7 +117,7 @@ void bcm1480_timer_interrupt(void) | |||
119 | } | 117 | } |
120 | } | 118 | } |
121 | 119 | ||
122 | static unsigned int bcm1480_hpt_read(void) | 120 | static cycle_t bcm1480_hpt_read(void) |
123 | { | 121 | { |
124 | /* We assume this function is called xtime_lock held. */ | 122 | /* We assume this function is called xtime_lock held. */ |
125 | unsigned long count = | 123 | unsigned long count = |
@@ -129,6 +127,6 @@ static unsigned int bcm1480_hpt_read(void) | |||
129 | 127 | ||
130 | void __init bcm1480_hpt_setup(void) | 128 | void __init bcm1480_hpt_setup(void) |
131 | { | 129 | { |
132 | mips_hpt_read = bcm1480_hpt_read; | 130 | clocksource_mips.read = bcm1480_hpt_read; |
133 | mips_hpt_frequency = BCM1480_HPT_VALUE; | 131 | mips_hpt_frequency = BCM1480_HPT_VALUE; |
134 | } | 132 | } |
diff --git a/arch/mips/sibyte/sb1250/irq.c b/arch/mips/sibyte/sb1250/irq.c index d5d26770daf6..82ce7533053f 100644 --- a/arch/mips/sibyte/sb1250/irq.c +++ b/arch/mips/sibyte/sb1250/irq.c | |||
@@ -44,11 +44,9 @@ | |||
44 | */ | 44 | */ |
45 | 45 | ||
46 | 46 | ||
47 | #define shutdown_sb1250_irq disable_sb1250_irq | ||
48 | static void end_sb1250_irq(unsigned int irq); | 47 | static void end_sb1250_irq(unsigned int irq); |
49 | static void enable_sb1250_irq(unsigned int irq); | 48 | static void enable_sb1250_irq(unsigned int irq); |
50 | static void disable_sb1250_irq(unsigned int irq); | 49 | static void disable_sb1250_irq(unsigned int irq); |
51 | static unsigned int startup_sb1250_irq(unsigned int irq); | ||
52 | static void ack_sb1250_irq(unsigned int irq); | 50 | static void ack_sb1250_irq(unsigned int irq); |
53 | #ifdef CONFIG_SMP | 51 | #ifdef CONFIG_SMP |
54 | static void sb1250_set_affinity(unsigned int irq, cpumask_t mask); | 52 | static void sb1250_set_affinity(unsigned int irq, cpumask_t mask); |
@@ -70,11 +68,10 @@ extern char sb1250_duart_present[]; | |||
70 | 68 | ||
71 | static struct irq_chip sb1250_irq_type = { | 69 | static struct irq_chip sb1250_irq_type = { |
72 | .typename = "SB1250-IMR", | 70 | .typename = "SB1250-IMR", |
73 | .startup = startup_sb1250_irq, | ||
74 | .shutdown = shutdown_sb1250_irq, | ||
75 | .enable = enable_sb1250_irq, | ||
76 | .disable = disable_sb1250_irq, | ||
77 | .ack = ack_sb1250_irq, | 71 | .ack = ack_sb1250_irq, |
72 | .mask = disable_sb1250_irq, | ||
73 | .mask_ack = ack_sb1250_irq, | ||
74 | .unmask = enable_sb1250_irq, | ||
78 | .end = end_sb1250_irq, | 75 | .end = end_sb1250_irq, |
79 | #ifdef CONFIG_SMP | 76 | #ifdef CONFIG_SMP |
80 | .set_affinity = sb1250_set_affinity | 77 | .set_affinity = sb1250_set_affinity |
@@ -163,14 +160,6 @@ static void sb1250_set_affinity(unsigned int irq, cpumask_t mask) | |||
163 | 160 | ||
164 | /*****************************************************************************/ | 161 | /*****************************************************************************/ |
165 | 162 | ||
166 | static unsigned int startup_sb1250_irq(unsigned int irq) | ||
167 | { | ||
168 | sb1250_unmask_irq(sb1250_irq_owner[irq], irq); | ||
169 | |||
170 | return 0; /* never anything pending */ | ||
171 | } | ||
172 | |||
173 | |||
174 | static void disable_sb1250_irq(unsigned int irq) | 163 | static void disable_sb1250_irq(unsigned int irq) |
175 | { | 164 | { |
176 | sb1250_mask_irq(sb1250_irq_owner[irq], irq); | 165 | sb1250_mask_irq(sb1250_irq_owner[irq], irq); |
@@ -239,16 +228,9 @@ void __init init_sb1250_irqs(void) | |||
239 | { | 228 | { |
240 | int i; | 229 | int i; |
241 | 230 | ||
242 | for (i = 0; i < NR_IRQS; i++) { | 231 | for (i = 0; i < SB1250_NR_IRQS; i++) { |
243 | irq_desc[i].status = IRQ_DISABLED; | 232 | set_irq_chip(i, &sb1250_irq_type); |
244 | irq_desc[i].action = 0; | 233 | sb1250_irq_owner[i] = 0; |
245 | irq_desc[i].depth = 1; | ||
246 | if (i < SB1250_NR_IRQS) { | ||
247 | irq_desc[i].chip = &sb1250_irq_type; | ||
248 | sb1250_irq_owner[i] = 0; | ||
249 | } else { | ||
250 | irq_desc[i].chip = &no_irq_chip; | ||
251 | } | ||
252 | } | 234 | } |
253 | } | 235 | } |
254 | 236 | ||
diff --git a/arch/mips/sibyte/sb1250/time.c b/arch/mips/sibyte/sb1250/time.c index bcb74f2c1948..2efffe15ff23 100644 --- a/arch/mips/sibyte/sb1250/time.c +++ b/arch/mips/sibyte/sb1250/time.c | |||
@@ -51,7 +51,7 @@ | |||
51 | 51 | ||
52 | extern int sb1250_steal_irq(int irq); | 52 | extern int sb1250_steal_irq(int irq); |
53 | 53 | ||
54 | static unsigned int sb1250_hpt_read(void); | 54 | static cycle_t sb1250_hpt_read(void); |
55 | 55 | ||
56 | void __init sb1250_hpt_setup(void) | 56 | void __init sb1250_hpt_setup(void) |
57 | { | 57 | { |
@@ -66,8 +66,8 @@ void __init sb1250_hpt_setup(void) | |||
66 | IOADDR(A_SCD_TIMER_REGISTER(SB1250_HPT_NUM, R_SCD_TIMER_CFG))); | 66 | IOADDR(A_SCD_TIMER_REGISTER(SB1250_HPT_NUM, R_SCD_TIMER_CFG))); |
67 | 67 | ||
68 | mips_hpt_frequency = V_SCD_TIMER_FREQ; | 68 | mips_hpt_frequency = V_SCD_TIMER_FREQ; |
69 | mips_hpt_read = sb1250_hpt_read; | 69 | clocksource_mips.read = sb1250_hpt_read; |
70 | mips_hpt_mask = M_SCD_TIMER_INIT; | 70 | clocksource_mips.mask = M_SCD_TIMER_INIT; |
71 | } | 71 | } |
72 | } | 72 | } |
73 | 73 | ||
@@ -143,7 +143,7 @@ void sb1250_timer_interrupt(void) | |||
143 | * The HPT is free running from SB1250_HPT_VALUE down to 0 then starts over | 143 | * The HPT is free running from SB1250_HPT_VALUE down to 0 then starts over |
144 | * again. | 144 | * again. |
145 | */ | 145 | */ |
146 | static unsigned int sb1250_hpt_read(void) | 146 | static cycle_t sb1250_hpt_read(void) |
147 | { | 147 | { |
148 | unsigned int count; | 148 | unsigned int count; |
149 | 149 | ||
diff --git a/arch/mips/sni/irq.c b/arch/mips/sni/irq.c index 48fb74a7aaec..8511bcc6d99d 100644 --- a/arch/mips/sni/irq.c +++ b/arch/mips/sni/irq.c | |||
@@ -11,44 +11,25 @@ | |||
11 | #include <linux/interrupt.h> | 11 | #include <linux/interrupt.h> |
12 | #include <linux/irq.h> | 12 | #include <linux/irq.h> |
13 | #include <linux/kernel.h> | 13 | #include <linux/kernel.h> |
14 | #include <linux/spinlock.h> | ||
15 | 14 | ||
16 | #include <asm/i8259.h> | 15 | #include <asm/i8259.h> |
17 | #include <asm/io.h> | 16 | #include <asm/io.h> |
18 | #include <asm/sni.h> | 17 | #include <asm/sni.h> |
19 | 18 | ||
20 | DEFINE_SPINLOCK(pciasic_lock); | ||
21 | |||
22 | static void enable_pciasic_irq(unsigned int irq) | 19 | static void enable_pciasic_irq(unsigned int irq) |
23 | { | 20 | { |
24 | unsigned int mask = 1 << (irq - PCIMT_IRQ_INT2); | 21 | unsigned int mask = 1 << (irq - PCIMT_IRQ_INT2); |
25 | unsigned long flags; | ||
26 | 22 | ||
27 | spin_lock_irqsave(&pciasic_lock, flags); | ||
28 | *(volatile u8 *) PCIMT_IRQSEL |= mask; | 23 | *(volatile u8 *) PCIMT_IRQSEL |= mask; |
29 | spin_unlock_irqrestore(&pciasic_lock, flags); | ||
30 | } | ||
31 | |||
32 | static unsigned int startup_pciasic_irq(unsigned int irq) | ||
33 | { | ||
34 | enable_pciasic_irq(irq); | ||
35 | return 0; /* never anything pending */ | ||
36 | } | 24 | } |
37 | 25 | ||
38 | #define shutdown_pciasic_irq disable_pciasic_irq | ||
39 | |||
40 | void disable_pciasic_irq(unsigned int irq) | 26 | void disable_pciasic_irq(unsigned int irq) |
41 | { | 27 | { |
42 | unsigned int mask = ~(1 << (irq - PCIMT_IRQ_INT2)); | 28 | unsigned int mask = ~(1 << (irq - PCIMT_IRQ_INT2)); |
43 | unsigned long flags; | ||
44 | 29 | ||
45 | spin_lock_irqsave(&pciasic_lock, flags); | ||
46 | *(volatile u8 *) PCIMT_IRQSEL &= mask; | 30 | *(volatile u8 *) PCIMT_IRQSEL &= mask; |
47 | spin_unlock_irqrestore(&pciasic_lock, flags); | ||
48 | } | 31 | } |
49 | 32 | ||
50 | #define mask_and_ack_pciasic_irq disable_pciasic_irq | ||
51 | |||
52 | static void end_pciasic_irq(unsigned int irq) | 33 | static void end_pciasic_irq(unsigned int irq) |
53 | { | 34 | { |
54 | if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) | 35 | if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) |
@@ -57,11 +38,10 @@ static void end_pciasic_irq(unsigned int irq) | |||
57 | 38 | ||
58 | static struct irq_chip pciasic_irq_type = { | 39 | static struct irq_chip pciasic_irq_type = { |
59 | .typename = "ASIC-PCI", | 40 | .typename = "ASIC-PCI", |
60 | .startup = startup_pciasic_irq, | 41 | .ack = disable_pciasic_irq, |
61 | .shutdown = shutdown_pciasic_irq, | 42 | .mask = disable_pciasic_irq, |
62 | .enable = enable_pciasic_irq, | 43 | .mask_ack = disable_pciasic_irq, |
63 | .disable = disable_pciasic_irq, | 44 | .unmask = enable_pciasic_irq, |
64 | .ack = mask_and_ack_pciasic_irq, | ||
65 | .end = end_pciasic_irq, | 45 | .end = end_pciasic_irq, |
66 | }; | 46 | }; |
67 | 47 | ||
@@ -178,12 +158,8 @@ asmlinkage void plat_irq_dispatch(void) | |||
178 | 158 | ||
179 | void __init init_pciasic(void) | 159 | void __init init_pciasic(void) |
180 | { | 160 | { |
181 | unsigned long flags; | ||
182 | |||
183 | spin_lock_irqsave(&pciasic_lock, flags); | ||
184 | * (volatile u8 *) PCIMT_IRQSEL = | 161 | * (volatile u8 *) PCIMT_IRQSEL = |
185 | IT_EISA | IT_INTA | IT_INTB | IT_INTC | IT_INTD; | 162 | IT_EISA | IT_INTA | IT_INTB | IT_INTC | IT_INTD; |
186 | spin_unlock_irqrestore(&pciasic_lock, flags); | ||
187 | } | 163 | } |
188 | 164 | ||
189 | /* | 165 | /* |
@@ -199,12 +175,8 @@ void __init arch_init_irq(void) | |||
199 | init_pciasic(); | 175 | init_pciasic(); |
200 | 176 | ||
201 | /* Actually we've got more interrupts to handle ... */ | 177 | /* Actually we've got more interrupts to handle ... */ |
202 | for (i = PCIMT_IRQ_INT2; i <= PCIMT_IRQ_ETHERNET; i++) { | 178 | for (i = PCIMT_IRQ_INT2; i <= PCIMT_IRQ_ETHERNET; i++) |
203 | irq_desc[i].status = IRQ_DISABLED; | 179 | set_irq_chip(i, &pciasic_irq_type); |
204 | irq_desc[i].action = 0; | ||
205 | irq_desc[i].depth = 1; | ||
206 | irq_desc[i].chip = &pciasic_irq_type; | ||
207 | } | ||
208 | 180 | ||
209 | change_c0_status(ST0_IM, IE_IRQ1|IE_IRQ2|IE_IRQ3|IE_IRQ4); | 181 | change_c0_status(ST0_IM, IE_IRQ1|IE_IRQ2|IE_IRQ3|IE_IRQ4); |
210 | } | 182 | } |
diff --git a/arch/mips/tx4927/common/tx4927_irq.c b/arch/mips/tx4927/common/tx4927_irq.c index 8266a88a3f88..21873de49aa8 100644 --- a/arch/mips/tx4927/common/tx4927_irq.c +++ b/arch/mips/tx4927/common/tx4927_irq.c | |||
@@ -64,19 +64,13 @@ | |||
64 | #define TX4927_IRQ_NEST4 ( 1 << 9 ) | 64 | #define TX4927_IRQ_NEST4 ( 1 << 9 ) |
65 | 65 | ||
66 | #define TX4927_IRQ_CP0_INIT ( 1 << 10 ) | 66 | #define TX4927_IRQ_CP0_INIT ( 1 << 10 ) |
67 | #define TX4927_IRQ_CP0_STARTUP ( 1 << 11 ) | ||
68 | #define TX4927_IRQ_CP0_SHUTDOWN ( 1 << 12 ) | ||
69 | #define TX4927_IRQ_CP0_ENABLE ( 1 << 13 ) | 67 | #define TX4927_IRQ_CP0_ENABLE ( 1 << 13 ) |
70 | #define TX4927_IRQ_CP0_DISABLE ( 1 << 14 ) | 68 | #define TX4927_IRQ_CP0_DISABLE ( 1 << 14 ) |
71 | #define TX4927_IRQ_CP0_MASK ( 1 << 15 ) | ||
72 | #define TX4927_IRQ_CP0_ENDIRQ ( 1 << 16 ) | 69 | #define TX4927_IRQ_CP0_ENDIRQ ( 1 << 16 ) |
73 | 70 | ||
74 | #define TX4927_IRQ_PIC_INIT ( 1 << 20 ) | 71 | #define TX4927_IRQ_PIC_INIT ( 1 << 20 ) |
75 | #define TX4927_IRQ_PIC_STARTUP ( 1 << 21 ) | ||
76 | #define TX4927_IRQ_PIC_SHUTDOWN ( 1 << 22 ) | ||
77 | #define TX4927_IRQ_PIC_ENABLE ( 1 << 23 ) | 72 | #define TX4927_IRQ_PIC_ENABLE ( 1 << 23 ) |
78 | #define TX4927_IRQ_PIC_DISABLE ( 1 << 24 ) | 73 | #define TX4927_IRQ_PIC_DISABLE ( 1 << 24 ) |
79 | #define TX4927_IRQ_PIC_MASK ( 1 << 25 ) | ||
80 | #define TX4927_IRQ_PIC_ENDIRQ ( 1 << 26 ) | 74 | #define TX4927_IRQ_PIC_ENDIRQ ( 1 << 26 ) |
81 | 75 | ||
82 | #define TX4927_IRQ_ALL 0xffffffff | 76 | #define TX4927_IRQ_ALL 0xffffffff |
@@ -87,18 +81,12 @@ static const u32 tx4927_irq_debug_flag = (TX4927_IRQ_NONE | |||
87 | | TX4927_IRQ_INFO | 81 | | TX4927_IRQ_INFO |
88 | | TX4927_IRQ_WARN | TX4927_IRQ_EROR | 82 | | TX4927_IRQ_WARN | TX4927_IRQ_EROR |
89 | // | TX4927_IRQ_CP0_INIT | 83 | // | TX4927_IRQ_CP0_INIT |
90 | // | TX4927_IRQ_CP0_STARTUP | ||
91 | // | TX4927_IRQ_CP0_SHUTDOWN | ||
92 | // | TX4927_IRQ_CP0_ENABLE | 84 | // | TX4927_IRQ_CP0_ENABLE |
93 | // | TX4927_IRQ_CP0_DISABLE | 85 | // | TX4927_IRQ_CP0_DISABLE |
94 | // | TX4927_IRQ_CP0_MASK | ||
95 | // | TX4927_IRQ_CP0_ENDIRQ | 86 | // | TX4927_IRQ_CP0_ENDIRQ |
96 | // | TX4927_IRQ_PIC_INIT | 87 | // | TX4927_IRQ_PIC_INIT |
97 | // | TX4927_IRQ_PIC_STARTUP | ||
98 | // | TX4927_IRQ_PIC_SHUTDOWN | ||
99 | // | TX4927_IRQ_PIC_ENABLE | 88 | // | TX4927_IRQ_PIC_ENABLE |
100 | // | TX4927_IRQ_PIC_DISABLE | 89 | // | TX4927_IRQ_PIC_DISABLE |
101 | // | TX4927_IRQ_PIC_MASK | ||
102 | // | TX4927_IRQ_PIC_ENDIRQ | 90 | // | TX4927_IRQ_PIC_ENDIRQ |
103 | // | TX4927_IRQ_INIT | 91 | // | TX4927_IRQ_INIT |
104 | // | TX4927_IRQ_NEST1 | 92 | // | TX4927_IRQ_NEST1 |
@@ -124,49 +112,36 @@ static const u32 tx4927_irq_debug_flag = (TX4927_IRQ_NONE | |||
124 | * Forwad definitions for all pic's | 112 | * Forwad definitions for all pic's |
125 | */ | 113 | */ |
126 | 114 | ||
127 | static unsigned int tx4927_irq_cp0_startup(unsigned int irq); | ||
128 | static void tx4927_irq_cp0_shutdown(unsigned int irq); | ||
129 | static void tx4927_irq_cp0_enable(unsigned int irq); | 115 | static void tx4927_irq_cp0_enable(unsigned int irq); |
130 | static void tx4927_irq_cp0_disable(unsigned int irq); | 116 | static void tx4927_irq_cp0_disable(unsigned int irq); |
131 | static void tx4927_irq_cp0_mask_and_ack(unsigned int irq); | ||
132 | static void tx4927_irq_cp0_end(unsigned int irq); | 117 | static void tx4927_irq_cp0_end(unsigned int irq); |
133 | 118 | ||
134 | static unsigned int tx4927_irq_pic_startup(unsigned int irq); | ||
135 | static void tx4927_irq_pic_shutdown(unsigned int irq); | ||
136 | static void tx4927_irq_pic_enable(unsigned int irq); | 119 | static void tx4927_irq_pic_enable(unsigned int irq); |
137 | static void tx4927_irq_pic_disable(unsigned int irq); | 120 | static void tx4927_irq_pic_disable(unsigned int irq); |
138 | static void tx4927_irq_pic_mask_and_ack(unsigned int irq); | ||
139 | static void tx4927_irq_pic_end(unsigned int irq); | 121 | static void tx4927_irq_pic_end(unsigned int irq); |
140 | 122 | ||
141 | /* | 123 | /* |
142 | * Kernel structs for all pic's | 124 | * Kernel structs for all pic's |
143 | */ | 125 | */ |
144 | 126 | ||
145 | static DEFINE_SPINLOCK(tx4927_cp0_lock); | ||
146 | static DEFINE_SPINLOCK(tx4927_pic_lock); | ||
147 | |||
148 | #define TX4927_CP0_NAME "TX4927-CP0" | 127 | #define TX4927_CP0_NAME "TX4927-CP0" |
149 | static struct irq_chip tx4927_irq_cp0_type = { | 128 | static struct irq_chip tx4927_irq_cp0_type = { |
150 | .typename = TX4927_CP0_NAME, | 129 | .typename = TX4927_CP0_NAME, |
151 | .startup = tx4927_irq_cp0_startup, | 130 | .ack = tx4927_irq_cp0_disable, |
152 | .shutdown = tx4927_irq_cp0_shutdown, | 131 | .mask = tx4927_irq_cp0_disable, |
153 | .enable = tx4927_irq_cp0_enable, | 132 | .mask_ack = tx4927_irq_cp0_disable, |
154 | .disable = tx4927_irq_cp0_disable, | 133 | .unmask = tx4927_irq_cp0_enable, |
155 | .ack = tx4927_irq_cp0_mask_and_ack, | ||
156 | .end = tx4927_irq_cp0_end, | 134 | .end = tx4927_irq_cp0_end, |
157 | .set_affinity = NULL | ||
158 | }; | 135 | }; |
159 | 136 | ||
160 | #define TX4927_PIC_NAME "TX4927-PIC" | 137 | #define TX4927_PIC_NAME "TX4927-PIC" |
161 | static struct irq_chip tx4927_irq_pic_type = { | 138 | static struct irq_chip tx4927_irq_pic_type = { |
162 | .typename = TX4927_PIC_NAME, | 139 | .typename = TX4927_PIC_NAME, |
163 | .startup = tx4927_irq_pic_startup, | 140 | .ack = tx4927_irq_pic_disable, |
164 | .shutdown = tx4927_irq_pic_shutdown, | 141 | .mask = tx4927_irq_pic_disable, |
165 | .enable = tx4927_irq_pic_enable, | 142 | .mask_ack = tx4927_irq_pic_disable, |
166 | .disable = tx4927_irq_pic_disable, | 143 | .unmask = tx4927_irq_pic_enable, |
167 | .ack = tx4927_irq_pic_mask_and_ack, | ||
168 | .end = tx4927_irq_pic_end, | 144 | .end = tx4927_irq_pic_end, |
169 | .set_affinity = NULL | ||
170 | }; | 145 | }; |
171 | 146 | ||
172 | #define TX4927_PIC_ACTION(s) { no_action, 0, CPU_MASK_NONE, s, NULL, NULL } | 147 | #define TX4927_PIC_ACTION(s) { no_action, 0, CPU_MASK_NONE, s, NULL, NULL } |
@@ -211,8 +186,6 @@ tx4927_irq_cp0_modify(unsigned cp0_reg, unsigned clr_bits, unsigned set_bits) | |||
211 | break; | 186 | break; |
212 | } | 187 | } |
213 | } | 188 | } |
214 | |||
215 | return; | ||
216 | } | 189 | } |
217 | 190 | ||
218 | static void __init tx4927_irq_cp0_init(void) | 191 | static void __init tx4927_irq_cp0_init(void) |
@@ -222,71 +195,23 @@ static void __init tx4927_irq_cp0_init(void) | |||
222 | TX4927_IRQ_DPRINTK(TX4927_IRQ_CP0_INIT, "beg=%d end=%d\n", | 195 | TX4927_IRQ_DPRINTK(TX4927_IRQ_CP0_INIT, "beg=%d end=%d\n", |
223 | TX4927_IRQ_CP0_BEG, TX4927_IRQ_CP0_END); | 196 | TX4927_IRQ_CP0_BEG, TX4927_IRQ_CP0_END); |
224 | 197 | ||
225 | for (i = TX4927_IRQ_CP0_BEG; i <= TX4927_IRQ_CP0_END; i++) { | 198 | for (i = TX4927_IRQ_CP0_BEG; i <= TX4927_IRQ_CP0_END; i++) |
226 | irq_desc[i].status = IRQ_DISABLED; | 199 | set_irq_chip_and_handler(i, &tx4927_irq_cp0_type, |
227 | irq_desc[i].action = 0; | 200 | handle_level_irq); |
228 | irq_desc[i].depth = 1; | ||
229 | irq_desc[i].chip = &tx4927_irq_cp0_type; | ||
230 | } | ||
231 | |||
232 | return; | ||
233 | } | ||
234 | |||
235 | static unsigned int tx4927_irq_cp0_startup(unsigned int irq) | ||
236 | { | ||
237 | TX4927_IRQ_DPRINTK(TX4927_IRQ_CP0_STARTUP, "irq=%d \n", irq); | ||
238 | |||
239 | tx4927_irq_cp0_enable(irq); | ||
240 | |||
241 | return (0); | ||
242 | } | ||
243 | |||
244 | static void tx4927_irq_cp0_shutdown(unsigned int irq) | ||
245 | { | ||
246 | TX4927_IRQ_DPRINTK(TX4927_IRQ_CP0_SHUTDOWN, "irq=%d \n", irq); | ||
247 | |||
248 | tx4927_irq_cp0_disable(irq); | ||
249 | |||
250 | return; | ||
251 | } | 201 | } |
252 | 202 | ||
253 | static void tx4927_irq_cp0_enable(unsigned int irq) | 203 | static void tx4927_irq_cp0_enable(unsigned int irq) |
254 | { | 204 | { |
255 | unsigned long flags; | ||
256 | |||
257 | TX4927_IRQ_DPRINTK(TX4927_IRQ_CP0_ENABLE, "irq=%d \n", irq); | 205 | TX4927_IRQ_DPRINTK(TX4927_IRQ_CP0_ENABLE, "irq=%d \n", irq); |
258 | 206 | ||
259 | spin_lock_irqsave(&tx4927_cp0_lock, flags); | ||
260 | |||
261 | tx4927_irq_cp0_modify(CCP0_STATUS, 0, tx4927_irq_cp0_mask(irq)); | 207 | tx4927_irq_cp0_modify(CCP0_STATUS, 0, tx4927_irq_cp0_mask(irq)); |
262 | |||
263 | spin_unlock_irqrestore(&tx4927_cp0_lock, flags); | ||
264 | |||
265 | return; | ||
266 | } | 208 | } |
267 | 209 | ||
268 | static void tx4927_irq_cp0_disable(unsigned int irq) | 210 | static void tx4927_irq_cp0_disable(unsigned int irq) |
269 | { | 211 | { |
270 | unsigned long flags; | ||
271 | |||
272 | TX4927_IRQ_DPRINTK(TX4927_IRQ_CP0_DISABLE, "irq=%d \n", irq); | 212 | TX4927_IRQ_DPRINTK(TX4927_IRQ_CP0_DISABLE, "irq=%d \n", irq); |
273 | 213 | ||
274 | spin_lock_irqsave(&tx4927_cp0_lock, flags); | ||
275 | |||
276 | tx4927_irq_cp0_modify(CCP0_STATUS, tx4927_irq_cp0_mask(irq), 0); | 214 | tx4927_irq_cp0_modify(CCP0_STATUS, tx4927_irq_cp0_mask(irq), 0); |
277 | |||
278 | spin_unlock_irqrestore(&tx4927_cp0_lock, flags); | ||
279 | |||
280 | return; | ||
281 | } | ||
282 | |||
283 | static void tx4927_irq_cp0_mask_and_ack(unsigned int irq) | ||
284 | { | ||
285 | TX4927_IRQ_DPRINTK(TX4927_IRQ_CP0_MASK, "irq=%d \n", irq); | ||
286 | |||
287 | tx4927_irq_cp0_disable(irq); | ||
288 | |||
289 | return; | ||
290 | } | 215 | } |
291 | 216 | ||
292 | static void tx4927_irq_cp0_end(unsigned int irq) | 217 | static void tx4927_irq_cp0_end(unsigned int irq) |
@@ -296,8 +221,6 @@ static void tx4927_irq_cp0_end(unsigned int irq) | |||
296 | if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) { | 221 | if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) { |
297 | tx4927_irq_cp0_enable(irq); | 222 | tx4927_irq_cp0_enable(irq); |
298 | } | 223 | } |
299 | |||
300 | return; | ||
301 | } | 224 | } |
302 | 225 | ||
303 | /* | 226 | /* |
@@ -418,94 +341,39 @@ static void tx4927_irq_pic_modify(unsigned pic_reg, unsigned clr_bits, | |||
418 | val &= (~clr_bits); | 341 | val &= (~clr_bits); |
419 | val |= (set_bits); | 342 | val |= (set_bits); |
420 | TX4927_WR(pic_reg, val); | 343 | TX4927_WR(pic_reg, val); |
421 | |||
422 | return; | ||
423 | } | 344 | } |
424 | 345 | ||
425 | static void __init tx4927_irq_pic_init(void) | 346 | static void __init tx4927_irq_pic_init(void) |
426 | { | 347 | { |
427 | unsigned long flags; | ||
428 | int i; | 348 | int i; |
429 | 349 | ||
430 | TX4927_IRQ_DPRINTK(TX4927_IRQ_PIC_INIT, "beg=%d end=%d\n", | 350 | TX4927_IRQ_DPRINTK(TX4927_IRQ_PIC_INIT, "beg=%d end=%d\n", |
431 | TX4927_IRQ_PIC_BEG, TX4927_IRQ_PIC_END); | 351 | TX4927_IRQ_PIC_BEG, TX4927_IRQ_PIC_END); |
432 | 352 | ||
433 | for (i = TX4927_IRQ_PIC_BEG; i <= TX4927_IRQ_PIC_END; i++) { | 353 | for (i = TX4927_IRQ_PIC_BEG; i <= TX4927_IRQ_PIC_END; i++) |
434 | irq_desc[i].status = IRQ_DISABLED; | 354 | set_irq_chip_and_handler(i, &tx4927_irq_pic_type, |
435 | irq_desc[i].action = 0; | 355 | handle_level_irq); |
436 | irq_desc[i].depth = 2; | ||
437 | irq_desc[i].chip = &tx4927_irq_pic_type; | ||
438 | } | ||
439 | 356 | ||
440 | setup_irq(TX4927_IRQ_NEST_PIC_ON_CP0, &tx4927_irq_pic_action); | 357 | setup_irq(TX4927_IRQ_NEST_PIC_ON_CP0, &tx4927_irq_pic_action); |
441 | 358 | ||
442 | spin_lock_irqsave(&tx4927_pic_lock, flags); | ||
443 | |||
444 | TX4927_WR(0xff1ff640, 0x6); /* irq level mask -- only accept hightest */ | 359 | TX4927_WR(0xff1ff640, 0x6); /* irq level mask -- only accept hightest */ |
445 | TX4927_WR(0xff1ff600, TX4927_RD(0xff1ff600) | 0x1); /* irq enable */ | 360 | TX4927_WR(0xff1ff600, TX4927_RD(0xff1ff600) | 0x1); /* irq enable */ |
446 | |||
447 | spin_unlock_irqrestore(&tx4927_pic_lock, flags); | ||
448 | |||
449 | return; | ||
450 | } | ||
451 | |||
452 | static unsigned int tx4927_irq_pic_startup(unsigned int irq) | ||
453 | { | ||
454 | TX4927_IRQ_DPRINTK(TX4927_IRQ_PIC_STARTUP, "irq=%d\n", irq); | ||
455 | |||
456 | tx4927_irq_pic_enable(irq); | ||
457 | |||
458 | return (0); | ||
459 | } | ||
460 | |||
461 | static void tx4927_irq_pic_shutdown(unsigned int irq) | ||
462 | { | ||
463 | TX4927_IRQ_DPRINTK(TX4927_IRQ_PIC_SHUTDOWN, "irq=%d\n", irq); | ||
464 | |||
465 | tx4927_irq_pic_disable(irq); | ||
466 | |||
467 | return; | ||
468 | } | 361 | } |
469 | 362 | ||
470 | static void tx4927_irq_pic_enable(unsigned int irq) | 363 | static void tx4927_irq_pic_enable(unsigned int irq) |
471 | { | 364 | { |
472 | unsigned long flags; | ||
473 | |||
474 | TX4927_IRQ_DPRINTK(TX4927_IRQ_PIC_ENABLE, "irq=%d\n", irq); | 365 | TX4927_IRQ_DPRINTK(TX4927_IRQ_PIC_ENABLE, "irq=%d\n", irq); |
475 | 366 | ||
476 | spin_lock_irqsave(&tx4927_pic_lock, flags); | ||
477 | |||
478 | tx4927_irq_pic_modify(tx4927_irq_pic_addr(irq), 0, | 367 | tx4927_irq_pic_modify(tx4927_irq_pic_addr(irq), 0, |
479 | tx4927_irq_pic_mask(irq)); | 368 | tx4927_irq_pic_mask(irq)); |
480 | |||
481 | spin_unlock_irqrestore(&tx4927_pic_lock, flags); | ||
482 | |||
483 | return; | ||
484 | } | 369 | } |
485 | 370 | ||
486 | static void tx4927_irq_pic_disable(unsigned int irq) | 371 | static void tx4927_irq_pic_disable(unsigned int irq) |
487 | { | 372 | { |
488 | unsigned long flags; | ||
489 | |||
490 | TX4927_IRQ_DPRINTK(TX4927_IRQ_PIC_DISABLE, "irq=%d\n", irq); | 373 | TX4927_IRQ_DPRINTK(TX4927_IRQ_PIC_DISABLE, "irq=%d\n", irq); |
491 | 374 | ||
492 | spin_lock_irqsave(&tx4927_pic_lock, flags); | ||
493 | |||
494 | tx4927_irq_pic_modify(tx4927_irq_pic_addr(irq), | 375 | tx4927_irq_pic_modify(tx4927_irq_pic_addr(irq), |
495 | tx4927_irq_pic_mask(irq), 0); | 376 | tx4927_irq_pic_mask(irq), 0); |
496 | |||
497 | spin_unlock_irqrestore(&tx4927_pic_lock, flags); | ||
498 | |||
499 | return; | ||
500 | } | ||
501 | |||
502 | static void tx4927_irq_pic_mask_and_ack(unsigned int irq) | ||
503 | { | ||
504 | TX4927_IRQ_DPRINTK(TX4927_IRQ_PIC_MASK, "irq=%d\n", irq); | ||
505 | |||
506 | tx4927_irq_pic_disable(irq); | ||
507 | |||
508 | return; | ||
509 | } | 377 | } |
510 | 378 | ||
511 | static void tx4927_irq_pic_end(unsigned int irq) | 379 | static void tx4927_irq_pic_end(unsigned int irq) |
@@ -515,8 +383,6 @@ static void tx4927_irq_pic_end(unsigned int irq) | |||
515 | if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) { | 383 | if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) { |
516 | tx4927_irq_pic_enable(irq); | 384 | tx4927_irq_pic_enable(irq); |
517 | } | 385 | } |
518 | |||
519 | return; | ||
520 | } | 386 | } |
521 | 387 | ||
522 | /* | 388 | /* |
@@ -533,8 +399,6 @@ void __init tx4927_irq_init(void) | |||
533 | tx4927_irq_pic_init(); | 399 | tx4927_irq_pic_init(); |
534 | 400 | ||
535 | TX4927_IRQ_DPRINTK(TX4927_IRQ_INIT, "+\n"); | 401 | TX4927_IRQ_DPRINTK(TX4927_IRQ_INIT, "+\n"); |
536 | |||
537 | return; | ||
538 | } | 402 | } |
539 | 403 | ||
540 | static int tx4927_irq_nested(void) | 404 | static int tx4927_irq_nested(void) |
diff --git a/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c b/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c index 0c3c3f668230..34cdb2a240e9 100644 --- a/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c +++ b/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c | |||
@@ -151,16 +151,11 @@ JP7 is not bus master -- do NOT use -- only 4 pci bus master's allowed -- SouthB | |||
151 | #define TOSHIBA_RBTX4927_IRQ_EROR ( 1 << 2 ) | 151 | #define TOSHIBA_RBTX4927_IRQ_EROR ( 1 << 2 ) |
152 | 152 | ||
153 | #define TOSHIBA_RBTX4927_IRQ_IOC_INIT ( 1 << 10 ) | 153 | #define TOSHIBA_RBTX4927_IRQ_IOC_INIT ( 1 << 10 ) |
154 | #define TOSHIBA_RBTX4927_IRQ_IOC_STARTUP ( 1 << 11 ) | ||
155 | #define TOSHIBA_RBTX4927_IRQ_IOC_SHUTDOWN ( 1 << 12 ) | ||
156 | #define TOSHIBA_RBTX4927_IRQ_IOC_ENABLE ( 1 << 13 ) | 154 | #define TOSHIBA_RBTX4927_IRQ_IOC_ENABLE ( 1 << 13 ) |
157 | #define TOSHIBA_RBTX4927_IRQ_IOC_DISABLE ( 1 << 14 ) | 155 | #define TOSHIBA_RBTX4927_IRQ_IOC_DISABLE ( 1 << 14 ) |
158 | #define TOSHIBA_RBTX4927_IRQ_IOC_MASK ( 1 << 15 ) | ||
159 | #define TOSHIBA_RBTX4927_IRQ_IOC_ENDIRQ ( 1 << 16 ) | 156 | #define TOSHIBA_RBTX4927_IRQ_IOC_ENDIRQ ( 1 << 16 ) |
160 | 157 | ||
161 | #define TOSHIBA_RBTX4927_IRQ_ISA_INIT ( 1 << 20 ) | 158 | #define TOSHIBA_RBTX4927_IRQ_ISA_INIT ( 1 << 20 ) |
162 | #define TOSHIBA_RBTX4927_IRQ_ISA_STARTUP ( 1 << 21 ) | ||
163 | #define TOSHIBA_RBTX4927_IRQ_ISA_SHUTDOWN ( 1 << 22 ) | ||
164 | #define TOSHIBA_RBTX4927_IRQ_ISA_ENABLE ( 1 << 23 ) | 159 | #define TOSHIBA_RBTX4927_IRQ_ISA_ENABLE ( 1 << 23 ) |
165 | #define TOSHIBA_RBTX4927_IRQ_ISA_DISABLE ( 1 << 24 ) | 160 | #define TOSHIBA_RBTX4927_IRQ_ISA_DISABLE ( 1 << 24 ) |
166 | #define TOSHIBA_RBTX4927_IRQ_ISA_MASK ( 1 << 25 ) | 161 | #define TOSHIBA_RBTX4927_IRQ_ISA_MASK ( 1 << 25 ) |
@@ -175,15 +170,10 @@ static const u32 toshiba_rbtx4927_irq_debug_flag = | |||
175 | (TOSHIBA_RBTX4927_IRQ_NONE | TOSHIBA_RBTX4927_IRQ_INFO | | 170 | (TOSHIBA_RBTX4927_IRQ_NONE | TOSHIBA_RBTX4927_IRQ_INFO | |
176 | TOSHIBA_RBTX4927_IRQ_WARN | TOSHIBA_RBTX4927_IRQ_EROR | 171 | TOSHIBA_RBTX4927_IRQ_WARN | TOSHIBA_RBTX4927_IRQ_EROR |
177 | // | TOSHIBA_RBTX4927_IRQ_IOC_INIT | 172 | // | TOSHIBA_RBTX4927_IRQ_IOC_INIT |
178 | // | TOSHIBA_RBTX4927_IRQ_IOC_STARTUP | ||
179 | // | TOSHIBA_RBTX4927_IRQ_IOC_SHUTDOWN | ||
180 | // | TOSHIBA_RBTX4927_IRQ_IOC_ENABLE | 173 | // | TOSHIBA_RBTX4927_IRQ_IOC_ENABLE |
181 | // | TOSHIBA_RBTX4927_IRQ_IOC_DISABLE | 174 | // | TOSHIBA_RBTX4927_IRQ_IOC_DISABLE |
182 | // | TOSHIBA_RBTX4927_IRQ_IOC_MASK | ||
183 | // | TOSHIBA_RBTX4927_IRQ_IOC_ENDIRQ | 175 | // | TOSHIBA_RBTX4927_IRQ_IOC_ENDIRQ |
184 | // | TOSHIBA_RBTX4927_IRQ_ISA_INIT | 176 | // | TOSHIBA_RBTX4927_IRQ_ISA_INIT |
185 | // | TOSHIBA_RBTX4927_IRQ_ISA_STARTUP | ||
186 | // | TOSHIBA_RBTX4927_IRQ_ISA_SHUTDOWN | ||
187 | // | TOSHIBA_RBTX4927_IRQ_ISA_ENABLE | 177 | // | TOSHIBA_RBTX4927_IRQ_ISA_ENABLE |
188 | // | TOSHIBA_RBTX4927_IRQ_ISA_DISABLE | 178 | // | TOSHIBA_RBTX4927_IRQ_ISA_DISABLE |
189 | // | TOSHIBA_RBTX4927_IRQ_ISA_MASK | 179 | // | TOSHIBA_RBTX4927_IRQ_ISA_MASK |
@@ -231,35 +221,25 @@ extern void disable_8259A_irq(unsigned int irq); | |||
231 | extern void mask_and_ack_8259A(unsigned int irq); | 221 | extern void mask_and_ack_8259A(unsigned int irq); |
232 | #endif | 222 | #endif |
233 | 223 | ||
234 | static unsigned int toshiba_rbtx4927_irq_ioc_startup(unsigned int irq); | ||
235 | static void toshiba_rbtx4927_irq_ioc_shutdown(unsigned int irq); | ||
236 | static void toshiba_rbtx4927_irq_ioc_enable(unsigned int irq); | 224 | static void toshiba_rbtx4927_irq_ioc_enable(unsigned int irq); |
237 | static void toshiba_rbtx4927_irq_ioc_disable(unsigned int irq); | 225 | static void toshiba_rbtx4927_irq_ioc_disable(unsigned int irq); |
238 | static void toshiba_rbtx4927_irq_ioc_mask_and_ack(unsigned int irq); | ||
239 | static void toshiba_rbtx4927_irq_ioc_end(unsigned int irq); | 226 | static void toshiba_rbtx4927_irq_ioc_end(unsigned int irq); |
240 | 227 | ||
241 | #ifdef CONFIG_TOSHIBA_FPCIB0 | 228 | #ifdef CONFIG_TOSHIBA_FPCIB0 |
242 | static unsigned int toshiba_rbtx4927_irq_isa_startup(unsigned int irq); | ||
243 | static void toshiba_rbtx4927_irq_isa_shutdown(unsigned int irq); | ||
244 | static void toshiba_rbtx4927_irq_isa_enable(unsigned int irq); | 229 | static void toshiba_rbtx4927_irq_isa_enable(unsigned int irq); |
245 | static void toshiba_rbtx4927_irq_isa_disable(unsigned int irq); | 230 | static void toshiba_rbtx4927_irq_isa_disable(unsigned int irq); |
246 | static void toshiba_rbtx4927_irq_isa_mask_and_ack(unsigned int irq); | 231 | static void toshiba_rbtx4927_irq_isa_mask_and_ack(unsigned int irq); |
247 | static void toshiba_rbtx4927_irq_isa_end(unsigned int irq); | 232 | static void toshiba_rbtx4927_irq_isa_end(unsigned int irq); |
248 | #endif | 233 | #endif |
249 | 234 | ||
250 | static DEFINE_SPINLOCK(toshiba_rbtx4927_ioc_lock); | ||
251 | |||
252 | |||
253 | #define TOSHIBA_RBTX4927_IOC_NAME "RBTX4927-IOC" | 235 | #define TOSHIBA_RBTX4927_IOC_NAME "RBTX4927-IOC" |
254 | static struct irq_chip toshiba_rbtx4927_irq_ioc_type = { | 236 | static struct irq_chip toshiba_rbtx4927_irq_ioc_type = { |
255 | .typename = TOSHIBA_RBTX4927_IOC_NAME, | 237 | .typename = TOSHIBA_RBTX4927_IOC_NAME, |
256 | .startup = toshiba_rbtx4927_irq_ioc_startup, | 238 | .ack = toshiba_rbtx4927_irq_ioc_disable, |
257 | .shutdown = toshiba_rbtx4927_irq_ioc_shutdown, | 239 | .mask = toshiba_rbtx4927_irq_ioc_disable, |
258 | .enable = toshiba_rbtx4927_irq_ioc_enable, | 240 | .mask_ack = toshiba_rbtx4927_irq_ioc_disable, |
259 | .disable = toshiba_rbtx4927_irq_ioc_disable, | 241 | .unmask = toshiba_rbtx4927_irq_ioc_enable, |
260 | .ack = toshiba_rbtx4927_irq_ioc_mask_and_ack, | ||
261 | .end = toshiba_rbtx4927_irq_ioc_end, | 242 | .end = toshiba_rbtx4927_irq_ioc_end, |
262 | .set_affinity = NULL | ||
263 | }; | 243 | }; |
264 | #define TOSHIBA_RBTX4927_IOC_INTR_ENAB 0xbc002000 | 244 | #define TOSHIBA_RBTX4927_IOC_INTR_ENAB 0xbc002000 |
265 | #define TOSHIBA_RBTX4927_IOC_INTR_STAT 0xbc002006 | 245 | #define TOSHIBA_RBTX4927_IOC_INTR_STAT 0xbc002006 |
@@ -269,13 +249,11 @@ static struct irq_chip toshiba_rbtx4927_irq_ioc_type = { | |||
269 | #define TOSHIBA_RBTX4927_ISA_NAME "RBTX4927-ISA" | 249 | #define TOSHIBA_RBTX4927_ISA_NAME "RBTX4927-ISA" |
270 | static struct irq_chip toshiba_rbtx4927_irq_isa_type = { | 250 | static struct irq_chip toshiba_rbtx4927_irq_isa_type = { |
271 | .typename = TOSHIBA_RBTX4927_ISA_NAME, | 251 | .typename = TOSHIBA_RBTX4927_ISA_NAME, |
272 | .startup = toshiba_rbtx4927_irq_isa_startup, | ||
273 | .shutdown = toshiba_rbtx4927_irq_isa_shutdown, | ||
274 | .enable = toshiba_rbtx4927_irq_isa_enable, | ||
275 | .disable = toshiba_rbtx4927_irq_isa_disable, | ||
276 | .ack = toshiba_rbtx4927_irq_isa_mask_and_ack, | 252 | .ack = toshiba_rbtx4927_irq_isa_mask_and_ack, |
253 | .mask = toshiba_rbtx4927_irq_isa_disable, | ||
254 | .mask_ack = toshiba_rbtx4927_irq_isa_mask_and_ack, | ||
255 | .unmask = toshiba_rbtx4927_irq_isa_enable, | ||
277 | .end = toshiba_rbtx4927_irq_isa_end, | 256 | .end = toshiba_rbtx4927_irq_isa_end, |
278 | .set_affinity = NULL | ||
279 | }; | 257 | }; |
280 | #endif | 258 | #endif |
281 | 259 | ||
@@ -363,58 +341,16 @@ static void __init toshiba_rbtx4927_irq_ioc_init(void) | |||
363 | TOSHIBA_RBTX4927_IRQ_IOC_END); | 341 | TOSHIBA_RBTX4927_IRQ_IOC_END); |
364 | 342 | ||
365 | for (i = TOSHIBA_RBTX4927_IRQ_IOC_BEG; | 343 | for (i = TOSHIBA_RBTX4927_IRQ_IOC_BEG; |
366 | i <= TOSHIBA_RBTX4927_IRQ_IOC_END; i++) { | 344 | i <= TOSHIBA_RBTX4927_IRQ_IOC_END; i++) |
367 | irq_desc[i].status = IRQ_DISABLED; | 345 | set_irq_chip_and_handler(i, &toshiba_rbtx4927_irq_ioc_type, |
368 | irq_desc[i].action = 0; | 346 | handle_level_irq); |
369 | irq_desc[i].depth = 3; | ||
370 | irq_desc[i].chip = &toshiba_rbtx4927_irq_ioc_type; | ||
371 | } | ||
372 | 347 | ||
373 | setup_irq(TOSHIBA_RBTX4927_IRQ_NEST_IOC_ON_PIC, | 348 | setup_irq(TOSHIBA_RBTX4927_IRQ_NEST_IOC_ON_PIC, |
374 | &toshiba_rbtx4927_irq_ioc_action); | 349 | &toshiba_rbtx4927_irq_ioc_action); |
375 | |||
376 | return; | ||
377 | } | 350 | } |
378 | 351 | ||
379 | static unsigned int toshiba_rbtx4927_irq_ioc_startup(unsigned int irq) | ||
380 | { | ||
381 | TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_IOC_STARTUP, | ||
382 | "irq=%d\n", irq); | ||
383 | |||
384 | if (irq < TOSHIBA_RBTX4927_IRQ_IOC_BEG | ||
385 | || irq > TOSHIBA_RBTX4927_IRQ_IOC_END) { | ||
386 | TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_EROR, | ||
387 | "bad irq=%d\n", irq); | ||
388 | panic("\n"); | ||
389 | } | ||
390 | |||
391 | toshiba_rbtx4927_irq_ioc_enable(irq); | ||
392 | |||
393 | return (0); | ||
394 | } | ||
395 | |||
396 | |||
397 | static void toshiba_rbtx4927_irq_ioc_shutdown(unsigned int irq) | ||
398 | { | ||
399 | TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_IOC_SHUTDOWN, | ||
400 | "irq=%d\n", irq); | ||
401 | |||
402 | if (irq < TOSHIBA_RBTX4927_IRQ_IOC_BEG | ||
403 | || irq > TOSHIBA_RBTX4927_IRQ_IOC_END) { | ||
404 | TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_EROR, | ||
405 | "bad irq=%d\n", irq); | ||
406 | panic("\n"); | ||
407 | } | ||
408 | |||
409 | toshiba_rbtx4927_irq_ioc_disable(irq); | ||
410 | |||
411 | return; | ||
412 | } | ||
413 | |||
414 | |||
415 | static void toshiba_rbtx4927_irq_ioc_enable(unsigned int irq) | 352 | static void toshiba_rbtx4927_irq_ioc_enable(unsigned int irq) |
416 | { | 353 | { |
417 | unsigned long flags; | ||
418 | volatile unsigned char v; | 354 | volatile unsigned char v; |
419 | 355 | ||
420 | TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_IOC_ENABLE, | 356 | TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_IOC_ENABLE, |
@@ -427,21 +363,14 @@ static void toshiba_rbtx4927_irq_ioc_enable(unsigned int irq) | |||
427 | panic("\n"); | 363 | panic("\n"); |
428 | } | 364 | } |
429 | 365 | ||
430 | spin_lock_irqsave(&toshiba_rbtx4927_ioc_lock, flags); | ||
431 | |||
432 | v = TX4927_RD08(TOSHIBA_RBTX4927_IOC_INTR_ENAB); | 366 | v = TX4927_RD08(TOSHIBA_RBTX4927_IOC_INTR_ENAB); |
433 | v |= (1 << (irq - TOSHIBA_RBTX4927_IRQ_IOC_BEG)); | 367 | v |= (1 << (irq - TOSHIBA_RBTX4927_IRQ_IOC_BEG)); |
434 | TOSHIBA_RBTX4927_WR08(TOSHIBA_RBTX4927_IOC_INTR_ENAB, v); | 368 | TOSHIBA_RBTX4927_WR08(TOSHIBA_RBTX4927_IOC_INTR_ENAB, v); |
435 | |||
436 | spin_unlock_irqrestore(&toshiba_rbtx4927_ioc_lock, flags); | ||
437 | |||
438 | return; | ||
439 | } | 369 | } |
440 | 370 | ||
441 | 371 | ||
442 | static void toshiba_rbtx4927_irq_ioc_disable(unsigned int irq) | 372 | static void toshiba_rbtx4927_irq_ioc_disable(unsigned int irq) |
443 | { | 373 | { |
444 | unsigned long flags; | ||
445 | volatile unsigned char v; | 374 | volatile unsigned char v; |
446 | 375 | ||
447 | TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_IOC_DISABLE, | 376 | TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_IOC_DISABLE, |
@@ -454,36 +383,11 @@ static void toshiba_rbtx4927_irq_ioc_disable(unsigned int irq) | |||
454 | panic("\n"); | 383 | panic("\n"); |
455 | } | 384 | } |
456 | 385 | ||
457 | spin_lock_irqsave(&toshiba_rbtx4927_ioc_lock, flags); | ||
458 | |||
459 | v = TX4927_RD08(TOSHIBA_RBTX4927_IOC_INTR_ENAB); | 386 | v = TX4927_RD08(TOSHIBA_RBTX4927_IOC_INTR_ENAB); |
460 | v &= ~(1 << (irq - TOSHIBA_RBTX4927_IRQ_IOC_BEG)); | 387 | v &= ~(1 << (irq - TOSHIBA_RBTX4927_IRQ_IOC_BEG)); |
461 | TOSHIBA_RBTX4927_WR08(TOSHIBA_RBTX4927_IOC_INTR_ENAB, v); | 388 | TOSHIBA_RBTX4927_WR08(TOSHIBA_RBTX4927_IOC_INTR_ENAB, v); |
462 | |||
463 | spin_unlock_irqrestore(&toshiba_rbtx4927_ioc_lock, flags); | ||
464 | |||
465 | return; | ||
466 | } | 389 | } |
467 | 390 | ||
468 | |||
469 | static void toshiba_rbtx4927_irq_ioc_mask_and_ack(unsigned int irq) | ||
470 | { | ||
471 | TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_IOC_MASK, | ||
472 | "irq=%d\n", irq); | ||
473 | |||
474 | if (irq < TOSHIBA_RBTX4927_IRQ_IOC_BEG | ||
475 | || irq > TOSHIBA_RBTX4927_IRQ_IOC_END) { | ||
476 | TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_EROR, | ||
477 | "bad irq=%d\n", irq); | ||
478 | panic("\n"); | ||
479 | } | ||
480 | |||
481 | toshiba_rbtx4927_irq_ioc_disable(irq); | ||
482 | |||
483 | return; | ||
484 | } | ||
485 | |||
486 | |||
487 | static void toshiba_rbtx4927_irq_ioc_end(unsigned int irq) | 391 | static void toshiba_rbtx4927_irq_ioc_end(unsigned int irq) |
488 | { | 392 | { |
489 | TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_IOC_ENDIRQ, | 393 | TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_IOC_ENDIRQ, |
@@ -499,8 +403,6 @@ static void toshiba_rbtx4927_irq_ioc_end(unsigned int irq) | |||
499 | if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) { | 403 | if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) { |
500 | toshiba_rbtx4927_irq_ioc_enable(irq); | 404 | toshiba_rbtx4927_irq_ioc_enable(irq); |
501 | } | 405 | } |
502 | |||
503 | return; | ||
504 | } | 406 | } |
505 | 407 | ||
506 | 408 | ||
@@ -520,13 +422,8 @@ static void __init toshiba_rbtx4927_irq_isa_init(void) | |||
520 | TOSHIBA_RBTX4927_IRQ_ISA_END); | 422 | TOSHIBA_RBTX4927_IRQ_ISA_END); |
521 | 423 | ||
522 | for (i = TOSHIBA_RBTX4927_IRQ_ISA_BEG; | 424 | for (i = TOSHIBA_RBTX4927_IRQ_ISA_BEG; |
523 | i <= TOSHIBA_RBTX4927_IRQ_ISA_END; i++) { | 425 | i <= TOSHIBA_RBTX4927_IRQ_ISA_END; i++) |
524 | irq_desc[i].status = IRQ_DISABLED; | 426 | set_irq_chip(i, &toshiba_rbtx4927_irq_isa_type); |
525 | irq_desc[i].action = 0; | ||
526 | irq_desc[i].depth = | ||
527 | ((i < TOSHIBA_RBTX4927_IRQ_ISA_MID) ? (4) : (5)); | ||
528 | irq_desc[i].chip = &toshiba_rbtx4927_irq_isa_type; | ||
529 | } | ||
530 | 427 | ||
531 | setup_irq(TOSHIBA_RBTX4927_IRQ_NEST_ISA_ON_IOC, | 428 | setup_irq(TOSHIBA_RBTX4927_IRQ_NEST_ISA_ON_IOC, |
532 | &toshiba_rbtx4927_irq_isa_master); | 429 | &toshiba_rbtx4927_irq_isa_master); |
@@ -536,48 +433,6 @@ static void __init toshiba_rbtx4927_irq_isa_init(void) | |||
536 | /* make sure we are looking at IRR (not ISR) */ | 433 | /* make sure we are looking at IRR (not ISR) */ |
537 | outb(0x0A, 0x20); | 434 | outb(0x0A, 0x20); |
538 | outb(0x0A, 0xA0); | 435 | outb(0x0A, 0xA0); |
539 | |||
540 | return; | ||
541 | } | ||
542 | #endif | ||
543 | |||
544 | |||
545 | #ifdef CONFIG_TOSHIBA_FPCIB0 | ||
546 | static unsigned int toshiba_rbtx4927_irq_isa_startup(unsigned int irq) | ||
547 | { | ||
548 | TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_ISA_STARTUP, | ||
549 | "irq=%d\n", irq); | ||
550 | |||
551 | if (irq < TOSHIBA_RBTX4927_IRQ_ISA_BEG | ||
552 | || irq > TOSHIBA_RBTX4927_IRQ_ISA_END) { | ||
553 | TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_EROR, | ||
554 | "bad irq=%d\n", irq); | ||
555 | panic("\n"); | ||
556 | } | ||
557 | |||
558 | toshiba_rbtx4927_irq_isa_enable(irq); | ||
559 | |||
560 | return (0); | ||
561 | } | ||
562 | #endif | ||
563 | |||
564 | |||
565 | #ifdef CONFIG_TOSHIBA_FPCIB0 | ||
566 | static void toshiba_rbtx4927_irq_isa_shutdown(unsigned int irq) | ||
567 | { | ||
568 | TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_ISA_SHUTDOWN, | ||
569 | "irq=%d\n", irq); | ||
570 | |||
571 | if (irq < TOSHIBA_RBTX4927_IRQ_ISA_BEG | ||
572 | || irq > TOSHIBA_RBTX4927_IRQ_ISA_END) { | ||
573 | TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_EROR, | ||
574 | "bad irq=%d\n", irq); | ||
575 | panic("\n"); | ||
576 | } | ||
577 | |||
578 | toshiba_rbtx4927_irq_isa_disable(irq); | ||
579 | |||
580 | return; | ||
581 | } | 436 | } |
582 | #endif | 437 | #endif |
583 | 438 | ||
@@ -596,8 +451,6 @@ static void toshiba_rbtx4927_irq_isa_enable(unsigned int irq) | |||
596 | } | 451 | } |
597 | 452 | ||
598 | enable_8259A_irq(irq); | 453 | enable_8259A_irq(irq); |
599 | |||
600 | return; | ||
601 | } | 454 | } |
602 | #endif | 455 | #endif |
603 | 456 | ||
@@ -616,8 +469,6 @@ static void toshiba_rbtx4927_irq_isa_disable(unsigned int irq) | |||
616 | } | 469 | } |
617 | 470 | ||
618 | disable_8259A_irq(irq); | 471 | disable_8259A_irq(irq); |
619 | |||
620 | return; | ||
621 | } | 472 | } |
622 | #endif | 473 | #endif |
623 | 474 | ||
@@ -636,8 +487,6 @@ static void toshiba_rbtx4927_irq_isa_mask_and_ack(unsigned int irq) | |||
636 | } | 487 | } |
637 | 488 | ||
638 | mask_and_ack_8259A(irq); | 489 | mask_and_ack_8259A(irq); |
639 | |||
640 | return; | ||
641 | } | 490 | } |
642 | #endif | 491 | #endif |
643 | 492 | ||
@@ -658,8 +507,6 @@ static void toshiba_rbtx4927_irq_isa_end(unsigned int irq) | |||
658 | if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) { | 507 | if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) { |
659 | toshiba_rbtx4927_irq_isa_enable(irq); | 508 | toshiba_rbtx4927_irq_isa_enable(irq); |
660 | } | 509 | } |
661 | |||
662 | return; | ||
663 | } | 510 | } |
664 | #endif | 511 | #endif |
665 | 512 | ||
@@ -668,8 +515,6 @@ void __init arch_init_irq(void) | |||
668 | { | 515 | { |
669 | extern void tx4927_irq_init(void); | 516 | extern void tx4927_irq_init(void); |
670 | 517 | ||
671 | local_irq_disable(); | ||
672 | |||
673 | tx4927_irq_init(); | 518 | tx4927_irq_init(); |
674 | toshiba_rbtx4927_irq_ioc_init(); | 519 | toshiba_rbtx4927_irq_ioc_init(); |
675 | #ifdef CONFIG_TOSHIBA_FPCIB0 | 520 | #ifdef CONFIG_TOSHIBA_FPCIB0 |
@@ -681,8 +526,6 @@ void __init arch_init_irq(void) | |||
681 | #endif | 526 | #endif |
682 | 527 | ||
683 | wbflush(); | 528 | wbflush(); |
684 | |||
685 | return; | ||
686 | } | 529 | } |
687 | 530 | ||
688 | void toshiba_rbtx4927_irq_dump(char *key) | 531 | void toshiba_rbtx4927_irq_dump(char *key) |
@@ -715,7 +558,6 @@ void toshiba_rbtx4927_irq_dump(char *key) | |||
715 | } | 558 | } |
716 | } | 559 | } |
717 | #endif | 560 | #endif |
718 | return; | ||
719 | } | 561 | } |
720 | 562 | ||
721 | void toshiba_rbtx4927_irq_dump_pics(char *s) | 563 | void toshiba_rbtx4927_irq_dump_pics(char *s) |
@@ -780,6 +622,4 @@ void toshiba_rbtx4927_irq_dump_pics(char *s) | |||
780 | level5_s); | 622 | level5_s); |
781 | TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_INFO, "[%s]\n", | 623 | TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_INFO, "[%s]\n", |
782 | s); | 624 | s); |
783 | |||
784 | return; | ||
785 | } | 625 | } |
diff --git a/arch/mips/tx4938/common/irq.c b/arch/mips/tx4938/common/irq.c index 77fe2454f5b9..42e127683ae9 100644 --- a/arch/mips/tx4938/common/irq.c +++ b/arch/mips/tx4938/common/irq.c | |||
@@ -37,48 +37,36 @@ | |||
37 | /* Forwad definitions for all pic's */ | 37 | /* Forwad definitions for all pic's */ |
38 | /**********************************************************************************/ | 38 | /**********************************************************************************/ |
39 | 39 | ||
40 | static unsigned int tx4938_irq_cp0_startup(unsigned int irq); | ||
41 | static void tx4938_irq_cp0_shutdown(unsigned int irq); | ||
42 | static void tx4938_irq_cp0_enable(unsigned int irq); | 40 | static void tx4938_irq_cp0_enable(unsigned int irq); |
43 | static void tx4938_irq_cp0_disable(unsigned int irq); | 41 | static void tx4938_irq_cp0_disable(unsigned int irq); |
44 | static void tx4938_irq_cp0_mask_and_ack(unsigned int irq); | ||
45 | static void tx4938_irq_cp0_end(unsigned int irq); | 42 | static void tx4938_irq_cp0_end(unsigned int irq); |
46 | 43 | ||
47 | static unsigned int tx4938_irq_pic_startup(unsigned int irq); | ||
48 | static void tx4938_irq_pic_shutdown(unsigned int irq); | ||
49 | static void tx4938_irq_pic_enable(unsigned int irq); | 44 | static void tx4938_irq_pic_enable(unsigned int irq); |
50 | static void tx4938_irq_pic_disable(unsigned int irq); | 45 | static void tx4938_irq_pic_disable(unsigned int irq); |
51 | static void tx4938_irq_pic_mask_and_ack(unsigned int irq); | ||
52 | static void tx4938_irq_pic_end(unsigned int irq); | 46 | static void tx4938_irq_pic_end(unsigned int irq); |
53 | 47 | ||
54 | /**********************************************************************************/ | 48 | /**********************************************************************************/ |
55 | /* Kernel structs for all pic's */ | 49 | /* Kernel structs for all pic's */ |
56 | /**********************************************************************************/ | 50 | /**********************************************************************************/ |
57 | DEFINE_SPINLOCK(tx4938_cp0_lock); | ||
58 | DEFINE_SPINLOCK(tx4938_pic_lock); | ||
59 | 51 | ||
60 | #define TX4938_CP0_NAME "TX4938-CP0" | 52 | #define TX4938_CP0_NAME "TX4938-CP0" |
61 | static struct irq_chip tx4938_irq_cp0_type = { | 53 | static struct irq_chip tx4938_irq_cp0_type = { |
62 | .typename = TX4938_CP0_NAME, | 54 | .typename = TX4938_CP0_NAME, |
63 | .startup = tx4938_irq_cp0_startup, | 55 | .ack = tx4938_irq_cp0_disable, |
64 | .shutdown = tx4938_irq_cp0_shutdown, | 56 | .mask = tx4938_irq_cp0_disable, |
65 | .enable = tx4938_irq_cp0_enable, | 57 | .mask_ack = tx4938_irq_cp0_disable, |
66 | .disable = tx4938_irq_cp0_disable, | 58 | .unmask = tx4938_irq_cp0_enable, |
67 | .ack = tx4938_irq_cp0_mask_and_ack, | ||
68 | .end = tx4938_irq_cp0_end, | 59 | .end = tx4938_irq_cp0_end, |
69 | .set_affinity = NULL | ||
70 | }; | 60 | }; |
71 | 61 | ||
72 | #define TX4938_PIC_NAME "TX4938-PIC" | 62 | #define TX4938_PIC_NAME "TX4938-PIC" |
73 | static struct irq_chip tx4938_irq_pic_type = { | 63 | static struct irq_chip tx4938_irq_pic_type = { |
74 | .typename = TX4938_PIC_NAME, | 64 | .typename = TX4938_PIC_NAME, |
75 | .startup = tx4938_irq_pic_startup, | 65 | .ack = tx4938_irq_pic_disable, |
76 | .shutdown = tx4938_irq_pic_shutdown, | 66 | .mask = tx4938_irq_pic_disable, |
77 | .enable = tx4938_irq_pic_enable, | 67 | .mask_ack = tx4938_irq_pic_disable, |
78 | .disable = tx4938_irq_pic_disable, | 68 | .unmask = tx4938_irq_pic_enable, |
79 | .ack = tx4938_irq_pic_mask_and_ack, | ||
80 | .end = tx4938_irq_pic_end, | 69 | .end = tx4938_irq_pic_end, |
81 | .set_affinity = NULL | ||
82 | }; | 70 | }; |
83 | 71 | ||
84 | static struct irqaction tx4938_irq_pic_action = { | 72 | static struct irqaction tx4938_irq_pic_action = { |
@@ -99,56 +87,21 @@ tx4938_irq_cp0_init(void) | |||
99 | { | 87 | { |
100 | int i; | 88 | int i; |
101 | 89 | ||
102 | for (i = TX4938_IRQ_CP0_BEG; i <= TX4938_IRQ_CP0_END; i++) { | 90 | for (i = TX4938_IRQ_CP0_BEG; i <= TX4938_IRQ_CP0_END; i++) |
103 | irq_desc[i].status = IRQ_DISABLED; | 91 | set_irq_chip_and_handler(i, &tx4938_irq_cp0_type, |
104 | irq_desc[i].action = 0; | 92 | handle_level_irq); |
105 | irq_desc[i].depth = 1; | ||
106 | irq_desc[i].chip = &tx4938_irq_cp0_type; | ||
107 | } | ||
108 | } | ||
109 | |||
110 | static unsigned int | ||
111 | tx4938_irq_cp0_startup(unsigned int irq) | ||
112 | { | ||
113 | tx4938_irq_cp0_enable(irq); | ||
114 | |||
115 | return 0; | ||
116 | } | ||
117 | |||
118 | static void | ||
119 | tx4938_irq_cp0_shutdown(unsigned int irq) | ||
120 | { | ||
121 | tx4938_irq_cp0_disable(irq); | ||
122 | } | 93 | } |
123 | 94 | ||
124 | static void | 95 | static void |
125 | tx4938_irq_cp0_enable(unsigned int irq) | 96 | tx4938_irq_cp0_enable(unsigned int irq) |
126 | { | 97 | { |
127 | unsigned long flags; | ||
128 | |||
129 | spin_lock_irqsave(&tx4938_cp0_lock, flags); | ||
130 | |||
131 | set_c0_status(tx4938_irq_cp0_mask(irq)); | 98 | set_c0_status(tx4938_irq_cp0_mask(irq)); |
132 | |||
133 | spin_unlock_irqrestore(&tx4938_cp0_lock, flags); | ||
134 | } | 99 | } |
135 | 100 | ||
136 | static void | 101 | static void |
137 | tx4938_irq_cp0_disable(unsigned int irq) | 102 | tx4938_irq_cp0_disable(unsigned int irq) |
138 | { | 103 | { |
139 | unsigned long flags; | ||
140 | |||
141 | spin_lock_irqsave(&tx4938_cp0_lock, flags); | ||
142 | |||
143 | clear_c0_status(tx4938_irq_cp0_mask(irq)); | 104 | clear_c0_status(tx4938_irq_cp0_mask(irq)); |
144 | |||
145 | spin_unlock_irqrestore(&tx4938_cp0_lock, flags); | ||
146 | } | ||
147 | |||
148 | static void | ||
149 | tx4938_irq_cp0_mask_and_ack(unsigned int irq) | ||
150 | { | ||
151 | tx4938_irq_cp0_disable(irq); | ||
152 | } | 105 | } |
153 | 106 | ||
154 | static void | 107 | static void |
@@ -290,70 +243,30 @@ tx4938_irq_pic_modify(unsigned pic_reg, unsigned clr_bits, unsigned set_bits) | |||
290 | static void __init | 243 | static void __init |
291 | tx4938_irq_pic_init(void) | 244 | tx4938_irq_pic_init(void) |
292 | { | 245 | { |
293 | unsigned long flags; | ||
294 | int i; | 246 | int i; |
295 | 247 | ||
296 | for (i = TX4938_IRQ_PIC_BEG; i <= TX4938_IRQ_PIC_END; i++) { | 248 | for (i = TX4938_IRQ_PIC_BEG; i <= TX4938_IRQ_PIC_END; i++) |
297 | irq_desc[i].status = IRQ_DISABLED; | 249 | set_irq_chip_and_handler(i, &tx4938_irq_pic_type, |
298 | irq_desc[i].action = 0; | 250 | handle_level_irq); |
299 | irq_desc[i].depth = 2; | ||
300 | irq_desc[i].chip = &tx4938_irq_pic_type; | ||
301 | } | ||
302 | 251 | ||
303 | setup_irq(TX4938_IRQ_NEST_PIC_ON_CP0, &tx4938_irq_pic_action); | 252 | setup_irq(TX4938_IRQ_NEST_PIC_ON_CP0, &tx4938_irq_pic_action); |
304 | 253 | ||
305 | spin_lock_irqsave(&tx4938_pic_lock, flags); | ||
306 | |||
307 | TX4938_WR(0xff1ff640, 0x6); /* irq level mask -- only accept hightest */ | 254 | TX4938_WR(0xff1ff640, 0x6); /* irq level mask -- only accept hightest */ |
308 | TX4938_WR(0xff1ff600, TX4938_RD(0xff1ff600) | 0x1); /* irq enable */ | 255 | TX4938_WR(0xff1ff600, TX4938_RD(0xff1ff600) | 0x1); /* irq enable */ |
309 | |||
310 | spin_unlock_irqrestore(&tx4938_pic_lock, flags); | ||
311 | } | ||
312 | |||
313 | static unsigned int | ||
314 | tx4938_irq_pic_startup(unsigned int irq) | ||
315 | { | ||
316 | tx4938_irq_pic_enable(irq); | ||
317 | |||
318 | return 0; | ||
319 | } | ||
320 | |||
321 | static void | ||
322 | tx4938_irq_pic_shutdown(unsigned int irq) | ||
323 | { | ||
324 | tx4938_irq_pic_disable(irq); | ||
325 | } | 256 | } |
326 | 257 | ||
327 | static void | 258 | static void |
328 | tx4938_irq_pic_enable(unsigned int irq) | 259 | tx4938_irq_pic_enable(unsigned int irq) |
329 | { | 260 | { |
330 | unsigned long flags; | ||
331 | |||
332 | spin_lock_irqsave(&tx4938_pic_lock, flags); | ||
333 | |||
334 | tx4938_irq_pic_modify(tx4938_irq_pic_addr(irq), 0, | 261 | tx4938_irq_pic_modify(tx4938_irq_pic_addr(irq), 0, |
335 | tx4938_irq_pic_mask(irq)); | 262 | tx4938_irq_pic_mask(irq)); |
336 | |||
337 | spin_unlock_irqrestore(&tx4938_pic_lock, flags); | ||
338 | } | 263 | } |
339 | 264 | ||
340 | static void | 265 | static void |
341 | tx4938_irq_pic_disable(unsigned int irq) | 266 | tx4938_irq_pic_disable(unsigned int irq) |
342 | { | 267 | { |
343 | unsigned long flags; | ||
344 | |||
345 | spin_lock_irqsave(&tx4938_pic_lock, flags); | ||
346 | |||
347 | tx4938_irq_pic_modify(tx4938_irq_pic_addr(irq), | 268 | tx4938_irq_pic_modify(tx4938_irq_pic_addr(irq), |
348 | tx4938_irq_pic_mask(irq), 0); | 269 | tx4938_irq_pic_mask(irq), 0); |
349 | |||
350 | spin_unlock_irqrestore(&tx4938_pic_lock, flags); | ||
351 | } | ||
352 | |||
353 | static void | ||
354 | tx4938_irq_pic_mask_and_ack(unsigned int irq) | ||
355 | { | ||
356 | tx4938_irq_pic_disable(irq); | ||
357 | } | 270 | } |
358 | 271 | ||
359 | static void | 272 | static void |
diff --git a/arch/mips/tx4938/common/setup.c b/arch/mips/tx4938/common/setup.c index f415a1f18fba..dc87d92bb08d 100644 --- a/arch/mips/tx4938/common/setup.c +++ b/arch/mips/tx4938/common/setup.c | |||
@@ -31,7 +31,6 @@ | |||
31 | #include <asm/mipsregs.h> | 31 | #include <asm/mipsregs.h> |
32 | #include <asm/system.h> | 32 | #include <asm/system.h> |
33 | #include <asm/time.h> | 33 | #include <asm/time.h> |
34 | #include <asm/time.h> | ||
35 | #include <asm/tx4938/rbtx4938.h> | 34 | #include <asm/tx4938/rbtx4938.h> |
36 | 35 | ||
37 | extern void toshiba_rbtx4938_setup(void); | 36 | extern void toshiba_rbtx4938_setup(void); |
diff --git a/arch/mips/tx4938/toshiba_rbtx4938/irq.c b/arch/mips/tx4938/toshiba_rbtx4938/irq.c index 102e473c10a2..8c87a35f3068 100644 --- a/arch/mips/tx4938/toshiba_rbtx4938/irq.c +++ b/arch/mips/tx4938/toshiba_rbtx4938/irq.c | |||
@@ -87,25 +87,18 @@ IRQ Device | |||
87 | #include <linux/bootmem.h> | 87 | #include <linux/bootmem.h> |
88 | #include <asm/tx4938/rbtx4938.h> | 88 | #include <asm/tx4938/rbtx4938.h> |
89 | 89 | ||
90 | static unsigned int toshiba_rbtx4938_irq_ioc_startup(unsigned int irq); | ||
91 | static void toshiba_rbtx4938_irq_ioc_shutdown(unsigned int irq); | ||
92 | static void toshiba_rbtx4938_irq_ioc_enable(unsigned int irq); | 90 | static void toshiba_rbtx4938_irq_ioc_enable(unsigned int irq); |
93 | static void toshiba_rbtx4938_irq_ioc_disable(unsigned int irq); | 91 | static void toshiba_rbtx4938_irq_ioc_disable(unsigned int irq); |
94 | static void toshiba_rbtx4938_irq_ioc_mask_and_ack(unsigned int irq); | ||
95 | static void toshiba_rbtx4938_irq_ioc_end(unsigned int irq); | 92 | static void toshiba_rbtx4938_irq_ioc_end(unsigned int irq); |
96 | 93 | ||
97 | DEFINE_SPINLOCK(toshiba_rbtx4938_ioc_lock); | ||
98 | |||
99 | #define TOSHIBA_RBTX4938_IOC_NAME "RBTX4938-IOC" | 94 | #define TOSHIBA_RBTX4938_IOC_NAME "RBTX4938-IOC" |
100 | static struct irq_chip toshiba_rbtx4938_irq_ioc_type = { | 95 | static struct irq_chip toshiba_rbtx4938_irq_ioc_type = { |
101 | .typename = TOSHIBA_RBTX4938_IOC_NAME, | 96 | .typename = TOSHIBA_RBTX4938_IOC_NAME, |
102 | .startup = toshiba_rbtx4938_irq_ioc_startup, | 97 | .ack = toshiba_rbtx4938_irq_ioc_disable, |
103 | .shutdown = toshiba_rbtx4938_irq_ioc_shutdown, | 98 | .mask = toshiba_rbtx4938_irq_ioc_disable, |
104 | .enable = toshiba_rbtx4938_irq_ioc_enable, | 99 | .mask_ack = toshiba_rbtx4938_irq_ioc_disable, |
105 | .disable = toshiba_rbtx4938_irq_ioc_disable, | 100 | .unmask = toshiba_rbtx4938_irq_ioc_enable, |
106 | .ack = toshiba_rbtx4938_irq_ioc_mask_and_ack, | ||
107 | .end = toshiba_rbtx4938_irq_ioc_end, | 101 | .end = toshiba_rbtx4938_irq_ioc_end, |
108 | .set_affinity = NULL | ||
109 | }; | 102 | }; |
110 | 103 | ||
111 | #define TOSHIBA_RBTX4938_IOC_INTR_ENAB 0xb7f02000 | 104 | #define TOSHIBA_RBTX4938_IOC_INTR_ENAB 0xb7f02000 |
@@ -142,69 +135,36 @@ toshiba_rbtx4938_irq_ioc_init(void) | |||
142 | int i; | 135 | int i; |
143 | 136 | ||
144 | for (i = TOSHIBA_RBTX4938_IRQ_IOC_BEG; | 137 | for (i = TOSHIBA_RBTX4938_IRQ_IOC_BEG; |
145 | i <= TOSHIBA_RBTX4938_IRQ_IOC_END; i++) { | 138 | i <= TOSHIBA_RBTX4938_IRQ_IOC_END; i++) |
146 | irq_desc[i].status = IRQ_DISABLED; | 139 | set_irq_chip_and_handler(i, &toshiba_rbtx4938_irq_ioc_type, |
147 | irq_desc[i].action = 0; | 140 | handle_level_irq); |
148 | irq_desc[i].depth = 3; | ||
149 | irq_desc[i].chip = &toshiba_rbtx4938_irq_ioc_type; | ||
150 | } | ||
151 | 141 | ||
152 | setup_irq(RBTX4938_IRQ_IOCINT, | 142 | setup_irq(RBTX4938_IRQ_IOCINT, |
153 | &toshiba_rbtx4938_irq_ioc_action); | 143 | &toshiba_rbtx4938_irq_ioc_action); |
154 | } | 144 | } |
155 | 145 | ||
156 | static unsigned int | ||
157 | toshiba_rbtx4938_irq_ioc_startup(unsigned int irq) | ||
158 | { | ||
159 | toshiba_rbtx4938_irq_ioc_enable(irq); | ||
160 | |||
161 | return 0; | ||
162 | } | ||
163 | |||
164 | static void | ||
165 | toshiba_rbtx4938_irq_ioc_shutdown(unsigned int irq) | ||
166 | { | ||
167 | toshiba_rbtx4938_irq_ioc_disable(irq); | ||
168 | } | ||
169 | |||
170 | static void | 146 | static void |
171 | toshiba_rbtx4938_irq_ioc_enable(unsigned int irq) | 147 | toshiba_rbtx4938_irq_ioc_enable(unsigned int irq) |
172 | { | 148 | { |
173 | unsigned long flags; | ||
174 | volatile unsigned char v; | 149 | volatile unsigned char v; |
175 | 150 | ||
176 | spin_lock_irqsave(&toshiba_rbtx4938_ioc_lock, flags); | ||
177 | |||
178 | v = TX4938_RD08(TOSHIBA_RBTX4938_IOC_INTR_ENAB); | 151 | v = TX4938_RD08(TOSHIBA_RBTX4938_IOC_INTR_ENAB); |
179 | v |= (1 << (irq - TOSHIBA_RBTX4938_IRQ_IOC_BEG)); | 152 | v |= (1 << (irq - TOSHIBA_RBTX4938_IRQ_IOC_BEG)); |
180 | TX4938_WR08(TOSHIBA_RBTX4938_IOC_INTR_ENAB, v); | 153 | TX4938_WR08(TOSHIBA_RBTX4938_IOC_INTR_ENAB, v); |
181 | mmiowb(); | 154 | mmiowb(); |
182 | TX4938_RD08(TOSHIBA_RBTX4938_IOC_INTR_ENAB); | 155 | TX4938_RD08(TOSHIBA_RBTX4938_IOC_INTR_ENAB); |
183 | |||
184 | spin_unlock_irqrestore(&toshiba_rbtx4938_ioc_lock, flags); | ||
185 | } | 156 | } |
186 | 157 | ||
187 | static void | 158 | static void |
188 | toshiba_rbtx4938_irq_ioc_disable(unsigned int irq) | 159 | toshiba_rbtx4938_irq_ioc_disable(unsigned int irq) |
189 | { | 160 | { |
190 | unsigned long flags; | ||
191 | volatile unsigned char v; | 161 | volatile unsigned char v; |
192 | 162 | ||
193 | spin_lock_irqsave(&toshiba_rbtx4938_ioc_lock, flags); | ||
194 | |||
195 | v = TX4938_RD08(TOSHIBA_RBTX4938_IOC_INTR_ENAB); | 163 | v = TX4938_RD08(TOSHIBA_RBTX4938_IOC_INTR_ENAB); |
196 | v &= ~(1 << (irq - TOSHIBA_RBTX4938_IRQ_IOC_BEG)); | 164 | v &= ~(1 << (irq - TOSHIBA_RBTX4938_IRQ_IOC_BEG)); |
197 | TX4938_WR08(TOSHIBA_RBTX4938_IOC_INTR_ENAB, v); | 165 | TX4938_WR08(TOSHIBA_RBTX4938_IOC_INTR_ENAB, v); |
198 | mmiowb(); | 166 | mmiowb(); |
199 | TX4938_RD08(TOSHIBA_RBTX4938_IOC_INTR_ENAB); | 167 | TX4938_RD08(TOSHIBA_RBTX4938_IOC_INTR_ENAB); |
200 | |||
201 | spin_unlock_irqrestore(&toshiba_rbtx4938_ioc_lock, flags); | ||
202 | } | ||
203 | |||
204 | static void | ||
205 | toshiba_rbtx4938_irq_ioc_mask_and_ack(unsigned int irq) | ||
206 | { | ||
207 | toshiba_rbtx4938_irq_ioc_disable(irq); | ||
208 | } | 168 | } |
209 | 169 | ||
210 | static void | 170 | static void |
diff --git a/arch/mips/vr41xx/common/icu.c b/arch/mips/vr41xx/common/icu.c index c215c0d39fae..54b92a74c7ac 100644 --- a/arch/mips/vr41xx/common/icu.c +++ b/arch/mips/vr41xx/common/icu.c | |||
@@ -417,14 +417,7 @@ void vr41xx_disable_bcuint(void) | |||
417 | 417 | ||
418 | EXPORT_SYMBOL(vr41xx_disable_bcuint); | 418 | EXPORT_SYMBOL(vr41xx_disable_bcuint); |
419 | 419 | ||
420 | static unsigned int startup_sysint1_irq(unsigned int irq) | 420 | static void disable_sysint1_irq(unsigned int irq) |
421 | { | ||
422 | icu1_set(MSYSINT1REG, 1 << SYSINT1_IRQ_TO_PIN(irq)); | ||
423 | |||
424 | return 0; /* never anything pending */ | ||
425 | } | ||
426 | |||
427 | static void shutdown_sysint1_irq(unsigned int irq) | ||
428 | { | 421 | { |
429 | icu1_clear(MSYSINT1REG, 1 << SYSINT1_IRQ_TO_PIN(irq)); | 422 | icu1_clear(MSYSINT1REG, 1 << SYSINT1_IRQ_TO_PIN(irq)); |
430 | } | 423 | } |
@@ -434,9 +427,6 @@ static void enable_sysint1_irq(unsigned int irq) | |||
434 | icu1_set(MSYSINT1REG, 1 << SYSINT1_IRQ_TO_PIN(irq)); | 427 | icu1_set(MSYSINT1REG, 1 << SYSINT1_IRQ_TO_PIN(irq)); |
435 | } | 428 | } |
436 | 429 | ||
437 | #define disable_sysint1_irq shutdown_sysint1_irq | ||
438 | #define ack_sysint1_irq shutdown_sysint1_irq | ||
439 | |||
440 | static void end_sysint1_irq(unsigned int irq) | 430 | static void end_sysint1_irq(unsigned int irq) |
441 | { | 431 | { |
442 | if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) | 432 | if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) |
@@ -445,22 +435,14 @@ static void end_sysint1_irq(unsigned int irq) | |||
445 | 435 | ||
446 | static struct irq_chip sysint1_irq_type = { | 436 | static struct irq_chip sysint1_irq_type = { |
447 | .typename = "SYSINT1", | 437 | .typename = "SYSINT1", |
448 | .startup = startup_sysint1_irq, | 438 | .ack = disable_sysint1_irq, |
449 | .shutdown = shutdown_sysint1_irq, | 439 | .mask = disable_sysint1_irq, |
450 | .enable = enable_sysint1_irq, | 440 | .mask_ack = disable_sysint1_irq, |
451 | .disable = disable_sysint1_irq, | 441 | .unmask = enable_sysint1_irq, |
452 | .ack = ack_sysint1_irq, | ||
453 | .end = end_sysint1_irq, | 442 | .end = end_sysint1_irq, |
454 | }; | 443 | }; |
455 | 444 | ||
456 | static unsigned int startup_sysint2_irq(unsigned int irq) | 445 | static void disable_sysint2_irq(unsigned int irq) |
457 | { | ||
458 | icu2_set(MSYSINT2REG, 1 << SYSINT2_IRQ_TO_PIN(irq)); | ||
459 | |||
460 | return 0; /* never anything pending */ | ||
461 | } | ||
462 | |||
463 | static void shutdown_sysint2_irq(unsigned int irq) | ||
464 | { | 446 | { |
465 | icu2_clear(MSYSINT2REG, 1 << SYSINT2_IRQ_TO_PIN(irq)); | 447 | icu2_clear(MSYSINT2REG, 1 << SYSINT2_IRQ_TO_PIN(irq)); |
466 | } | 448 | } |
@@ -470,9 +452,6 @@ static void enable_sysint2_irq(unsigned int irq) | |||
470 | icu2_set(MSYSINT2REG, 1 << SYSINT2_IRQ_TO_PIN(irq)); | 452 | icu2_set(MSYSINT2REG, 1 << SYSINT2_IRQ_TO_PIN(irq)); |
471 | } | 453 | } |
472 | 454 | ||
473 | #define disable_sysint2_irq shutdown_sysint2_irq | ||
474 | #define ack_sysint2_irq shutdown_sysint2_irq | ||
475 | |||
476 | static void end_sysint2_irq(unsigned int irq) | 455 | static void end_sysint2_irq(unsigned int irq) |
477 | { | 456 | { |
478 | if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) | 457 | if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) |
@@ -481,11 +460,10 @@ static void end_sysint2_irq(unsigned int irq) | |||
481 | 460 | ||
482 | static struct irq_chip sysint2_irq_type = { | 461 | static struct irq_chip sysint2_irq_type = { |
483 | .typename = "SYSINT2", | 462 | .typename = "SYSINT2", |
484 | .startup = startup_sysint2_irq, | 463 | .ack = disable_sysint2_irq, |
485 | .shutdown = shutdown_sysint2_irq, | 464 | .mask = disable_sysint2_irq, |
486 | .enable = enable_sysint2_irq, | 465 | .mask_ack = disable_sysint2_irq, |
487 | .disable = disable_sysint2_irq, | 466 | .unmask = enable_sysint2_irq, |
488 | .ack = ack_sysint2_irq, | ||
489 | .end = end_sysint2_irq, | 467 | .end = end_sysint2_irq, |
490 | }; | 468 | }; |
491 | 469 | ||
@@ -723,10 +701,12 @@ static int __init vr41xx_icu_init(void) | |||
723 | icu2_write(MGIUINTHREG, 0xffff); | 701 | icu2_write(MGIUINTHREG, 0xffff); |
724 | 702 | ||
725 | for (i = SYSINT1_IRQ_BASE; i <= SYSINT1_IRQ_LAST; i++) | 703 | for (i = SYSINT1_IRQ_BASE; i <= SYSINT1_IRQ_LAST; i++) |
726 | irq_desc[i].chip = &sysint1_irq_type; | 704 | set_irq_chip_and_handler(i, &sysint1_irq_type, |
705 | handle_level_irq); | ||
727 | 706 | ||
728 | for (i = SYSINT2_IRQ_BASE; i <= SYSINT2_IRQ_LAST; i++) | 707 | for (i = SYSINT2_IRQ_BASE; i <= SYSINT2_IRQ_LAST; i++) |
729 | irq_desc[i].chip = &sysint2_irq_type; | 708 | set_irq_chip_and_handler(i, &sysint2_irq_type, |
709 | handle_level_irq); | ||
730 | 710 | ||
731 | cascade_irq(INT0_IRQ, icu_get_irq); | 711 | cascade_irq(INT0_IRQ, icu_get_irq); |
732 | cascade_irq(INT1_IRQ, icu_get_irq); | 712 | cascade_irq(INT1_IRQ, icu_get_irq); |
diff --git a/arch/mips/vr41xx/nec-cmbvr4133/irq.c b/arch/mips/vr41xx/nec-cmbvr4133/irq.c index 2483487344c2..a039bb7251ff 100644 --- a/arch/mips/vr41xx/nec-cmbvr4133/irq.c +++ b/arch/mips/vr41xx/nec-cmbvr4133/irq.c | |||
@@ -30,17 +30,6 @@ extern void init_8259A(int hoge); | |||
30 | 30 | ||
31 | extern int vr4133_rockhopper; | 31 | extern int vr4133_rockhopper; |
32 | 32 | ||
33 | static unsigned int startup_i8259_irq(unsigned int irq) | ||
34 | { | ||
35 | enable_8259A_irq(irq - I8259_IRQ_BASE); | ||
36 | return 0; | ||
37 | } | ||
38 | |||
39 | static void shutdown_i8259_irq(unsigned int irq) | ||
40 | { | ||
41 | disable_8259A_irq(irq - I8259_IRQ_BASE); | ||
42 | } | ||
43 | |||
44 | static void enable_i8259_irq(unsigned int irq) | 33 | static void enable_i8259_irq(unsigned int irq) |
45 | { | 34 | { |
46 | enable_8259A_irq(irq - I8259_IRQ_BASE); | 35 | enable_8259A_irq(irq - I8259_IRQ_BASE); |
@@ -64,11 +53,10 @@ static void end_i8259_irq(unsigned int irq) | |||
64 | 53 | ||
65 | static struct irq_chip i8259_irq_type = { | 54 | static struct irq_chip i8259_irq_type = { |
66 | .typename = "XT-PIC", | 55 | .typename = "XT-PIC", |
67 | .startup = startup_i8259_irq, | ||
68 | .shutdown = shutdown_i8259_irq, | ||
69 | .enable = enable_i8259_irq, | ||
70 | .disable = disable_i8259_irq, | ||
71 | .ack = ack_i8259_irq, | 56 | .ack = ack_i8259_irq, |
57 | .mask = disable_i8259_irq, | ||
58 | .mask_ack = ack_i8259_irq, | ||
59 | .unmask = enable_i8259_irq, | ||
72 | .end = end_i8259_irq, | 60 | .end = end_i8259_irq, |
73 | }; | 61 | }; |
74 | 62 | ||
@@ -104,7 +92,7 @@ void __init rockhopper_init_irq(void) | |||
104 | } | 92 | } |
105 | 93 | ||
106 | for (i = I8259_IRQ_BASE; i <= I8259_IRQ_LAST; i++) | 94 | for (i = I8259_IRQ_BASE; i <= I8259_IRQ_LAST; i++) |
107 | irq_desc[i].chip = &i8259_irq_type; | 95 | set_irq_chip(i, &i8259_irq_type); |
108 | 96 | ||
109 | setup_irq(I8259_SLAVE_IRQ, &i8259_slave_cascade); | 97 | setup_irq(I8259_SLAVE_IRQ, &i8259_slave_cascade); |
110 | 98 | ||
diff --git a/arch/parisc/lib/checksum.c b/arch/parisc/lib/checksum.c index 8a1e08068e7d..462696d30d3b 100644 --- a/arch/parisc/lib/checksum.c +++ b/arch/parisc/lib/checksum.c | |||
@@ -101,11 +101,14 @@ out: | |||
101 | /* | 101 | /* |
102 | * computes a partial checksum, e.g. for TCP/UDP fragments | 102 | * computes a partial checksum, e.g. for TCP/UDP fragments |
103 | */ | 103 | */ |
104 | unsigned int csum_partial(const unsigned char *buff, int len, unsigned int sum) | 104 | /* |
105 | * why bother folding? | ||
106 | */ | ||
107 | __wsum csum_partial(const void *buff, int len, __wsum sum) | ||
105 | { | 108 | { |
106 | unsigned int result = do_csum(buff, len); | 109 | unsigned int result = do_csum(buff, len); |
107 | addc(result, sum); | 110 | addc(result, sum); |
108 | return from32to16(result); | 111 | return (__force __wsum)from32to16(result); |
109 | } | 112 | } |
110 | 113 | ||
111 | EXPORT_SYMBOL(csum_partial); | 114 | EXPORT_SYMBOL(csum_partial); |
@@ -113,8 +116,8 @@ EXPORT_SYMBOL(csum_partial); | |||
113 | /* | 116 | /* |
114 | * copy while checksumming, otherwise like csum_partial | 117 | * copy while checksumming, otherwise like csum_partial |
115 | */ | 118 | */ |
116 | unsigned int csum_partial_copy_nocheck(const unsigned char *src, unsigned char *dst, | 119 | __wsum csum_partial_copy_nocheck(const void *src, void *dst, |
117 | int len, unsigned int sum) | 120 | int len, __wsum sum) |
118 | { | 121 | { |
119 | /* | 122 | /* |
120 | * It's 2:30 am and I don't feel like doing it real ... | 123 | * It's 2:30 am and I don't feel like doing it real ... |
@@ -131,9 +134,9 @@ EXPORT_SYMBOL(csum_partial_copy_nocheck); | |||
131 | * Copy from userspace and compute checksum. If we catch an exception | 134 | * Copy from userspace and compute checksum. If we catch an exception |
132 | * then zero the rest of the buffer. | 135 | * then zero the rest of the buffer. |
133 | */ | 136 | */ |
134 | unsigned int csum_partial_copy_from_user(const unsigned char __user *src, | 137 | __wsum csum_partial_copy_from_user(const void __user *src, |
135 | unsigned char *dst, int len, | 138 | void *dst, int len, |
136 | unsigned int sum, int *err_ptr) | 139 | __wsum sum, int *err_ptr) |
137 | { | 140 | { |
138 | int missing; | 141 | int missing; |
139 | 142 | ||
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig index 0673dbedb241..116d7d3683ed 100644 --- a/arch/powerpc/Kconfig +++ b/arch/powerpc/Kconfig | |||
@@ -425,7 +425,7 @@ config PPC_MAPLE | |||
425 | default n | 425 | default n |
426 | help | 426 | help |
427 | This option enables support for the Maple 970FX Evaluation Board. | 427 | This option enables support for the Maple 970FX Evaluation Board. |
428 | For more informations, refer to <http://www.970eval.com> | 428 | For more information, refer to <http://www.970eval.com> |
429 | 429 | ||
430 | config PPC_PASEMI | 430 | config PPC_PASEMI |
431 | depends on PPC_MULTIPLATFORM && PPC64 | 431 | depends on PPC_MULTIPLATFORM && PPC64 |
diff --git a/arch/powerpc/platforms/83xx/Kconfig b/arch/powerpc/platforms/83xx/Kconfig index 7edb6b461382..edcd5b875b66 100644 --- a/arch/powerpc/platforms/83xx/Kconfig +++ b/arch/powerpc/platforms/83xx/Kconfig | |||
@@ -21,7 +21,7 @@ config MPC834x_SYS | |||
21 | Be aware that PCI buses can only function when SYS board is plugged | 21 | Be aware that PCI buses can only function when SYS board is plugged |
22 | into the PIB (Platform IO Board) board from Freescale which provide | 22 | into the PIB (Platform IO Board) board from Freescale which provide |
23 | 3 PCI slots. The PIBs PCI initialization is the bootloader's | 23 | 3 PCI slots. The PIBs PCI initialization is the bootloader's |
24 | responsiblilty. | 24 | responsibility. |
25 | 25 | ||
26 | config MPC834x_ITX | 26 | config MPC834x_ITX |
27 | bool "Freescale MPC834x ITX" | 27 | bool "Freescale MPC834x ITX" |
@@ -30,7 +30,7 @@ config MPC834x_ITX | |||
30 | This option enables support for the MPC 834x ITX evaluation board. | 30 | This option enables support for the MPC 834x ITX evaluation board. |
31 | 31 | ||
32 | Be aware that PCI initialization is the bootloader's | 32 | Be aware that PCI initialization is the bootloader's |
33 | responsiblilty. | 33 | responsibility. |
34 | 34 | ||
35 | config MPC8360E_PB | 35 | config MPC8360E_PB |
36 | bool "Freescale MPC8360E PB" | 36 | bool "Freescale MPC8360E PB" |
diff --git a/arch/powerpc/platforms/powermac/pci.c b/arch/powerpc/platforms/powermac/pci.c index 9923adc5248e..257dc9068468 100644 --- a/arch/powerpc/platforms/powermac/pci.c +++ b/arch/powerpc/platforms/powermac/pci.c | |||
@@ -48,7 +48,6 @@ static struct pci_controller *u3_ht; | |||
48 | static int has_second_ohare; | 48 | static int has_second_ohare; |
49 | #endif /* CONFIG_PPC64 */ | 49 | #endif /* CONFIG_PPC64 */ |
50 | 50 | ||
51 | extern u8 pci_cache_line_size; | ||
52 | extern int pcibios_assign_bus_offset; | 51 | extern int pcibios_assign_bus_offset; |
53 | 52 | ||
54 | struct device_node *k2_skiplist[2]; | 53 | struct device_node *k2_skiplist[2]; |
diff --git a/arch/ppc/Kconfig b/arch/ppc/Kconfig index 077711e63104..ef018e25fb07 100644 --- a/arch/ppc/Kconfig +++ b/arch/ppc/Kconfig | |||
@@ -724,7 +724,7 @@ config MPC834x_SYS | |||
724 | Be aware that PCI buses can only function when SYS board is plugged | 724 | Be aware that PCI buses can only function when SYS board is plugged |
725 | into the PIB (Platform IO Board) board from Freescale which provide | 725 | into the PIB (Platform IO Board) board from Freescale which provide |
726 | 3 PCI slots. The PIBs PCI initialization is the bootloader's | 726 | 3 PCI slots. The PIBs PCI initialization is the bootloader's |
727 | responsiblilty. | 727 | responsibility. |
728 | 728 | ||
729 | config EV64360 | 729 | config EV64360 |
730 | bool "Marvell-EV64360BP" | 730 | bool "Marvell-EV64360BP" |
diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig index 6a461d4caeff..bffc7e176970 100644 --- a/arch/sh/Kconfig +++ b/arch/sh/Kconfig | |||
@@ -217,7 +217,7 @@ config SH_SHMIN | |||
217 | bool "SHMIN" | 217 | bool "SHMIN" |
218 | select CPU_SUBTYPE_SH7706 | 218 | select CPU_SUBTYPE_SH7706 |
219 | help | 219 | help |
220 | Select SHMIN if configureing for the SHMIN board | 220 | Select SHMIN if configuring for the SHMIN board. |
221 | 221 | ||
222 | config SH_UNKNOWN | 222 | config SH_UNKNOWN |
223 | bool "BareCPU" | 223 | bool "BareCPU" |
diff --git a/arch/sh/kernel/sh_ksyms.c b/arch/sh/kernel/sh_ksyms.c index 9daad70bc305..8a2fd19dc9eb 100644 --- a/arch/sh/kernel/sh_ksyms.c +++ b/arch/sh/kernel/sh_ksyms.c | |||
@@ -18,7 +18,6 @@ | |||
18 | #include <asm/delay.h> | 18 | #include <asm/delay.h> |
19 | #include <asm/tlbflush.h> | 19 | #include <asm/tlbflush.h> |
20 | #include <asm/cacheflush.h> | 20 | #include <asm/cacheflush.h> |
21 | #include <asm/checksum.h> | ||
22 | 21 | ||
23 | extern int dump_fpu(struct pt_regs *, elf_fpregset_t *); | 22 | extern int dump_fpu(struct pt_regs *, elf_fpregset_t *); |
24 | extern struct hw_interrupt_type no_irq_type; | 23 | extern struct hw_interrupt_type no_irq_type; |
diff --git a/arch/sh64/kernel/sh_ksyms.c b/arch/sh64/kernel/sh_ksyms.c index 4b2df7247b59..7aa4b4f7bc5e 100644 --- a/arch/sh64/kernel/sh_ksyms.c +++ b/arch/sh64/kernel/sh_ksyms.c | |||
@@ -38,7 +38,7 @@ EXPORT_SYMBOL(disable_irq); | |||
38 | EXPORT_SYMBOL(kernel_thread); | 38 | EXPORT_SYMBOL(kernel_thread); |
39 | 39 | ||
40 | /* Networking helper routines. */ | 40 | /* Networking helper routines. */ |
41 | EXPORT_SYMBOL(csum_partial_copy); | 41 | EXPORT_SYMBOL(csum_partial_copy_nocheck); |
42 | 42 | ||
43 | EXPORT_SYMBOL(strstr); | 43 | EXPORT_SYMBOL(strstr); |
44 | 44 | ||
diff --git a/arch/sh64/lib/c-checksum.c b/arch/sh64/lib/c-checksum.c index 0e8a742abf8c..4b2676380deb 100644 --- a/arch/sh64/lib/c-checksum.c +++ b/arch/sh64/lib/c-checksum.c | |||
@@ -118,24 +118,24 @@ static unsigned long do_csum(const unsigned char *buff, int len) | |||
118 | 118 | ||
119 | /* computes the checksum of a memory block at buff, length len, | 119 | /* computes the checksum of a memory block at buff, length len, |
120 | and adds in "sum" (32-bit) */ | 120 | and adds in "sum" (32-bit) */ |
121 | unsigned int csum_partial(const unsigned char *buff, int len, unsigned int sum) | 121 | __wsum csum_partial(const void *buff, int len, __wsum sum) |
122 | { | 122 | { |
123 | unsigned long long result = do_csum(buff, len); | 123 | unsigned long long result = do_csum(buff, len); |
124 | 124 | ||
125 | /* add in old sum, and carry.. */ | 125 | /* add in old sum, and carry.. */ |
126 | result += sum; | 126 | result += (__force u32)sum; |
127 | /* 32+c bits -> 32 bits */ | 127 | /* 32+c bits -> 32 bits */ |
128 | result = (result & 0xffffffff) + (result >> 32); | 128 | result = (result & 0xffffffff) + (result >> 32); |
129 | 129 | ||
130 | pr_debug("csum_partial, buff %p len %d sum 0x%x result=0x%016Lx\n", | 130 | pr_debug("csum_partial, buff %p len %d sum 0x%x result=0x%016Lx\n", |
131 | buff, len, sum, result); | 131 | buff, len, sum, result); |
132 | 132 | ||
133 | return result; | 133 | return (__force __wsum)result; |
134 | } | 134 | } |
135 | 135 | ||
136 | /* Copy while checksumming, otherwise like csum_partial. */ | 136 | /* Copy while checksumming, otherwise like csum_partial. */ |
137 | unsigned int | 137 | __wsum |
138 | csum_partial_copy(const unsigned char *src, unsigned char *dst, int len, unsigned int sum) | 138 | csum_partial_copy_nocheck(const void *src, void *dst, int len, __wsum sum) |
139 | { | 139 | { |
140 | sum = csum_partial(src, len, sum); | 140 | sum = csum_partial(src, len, sum); |
141 | memcpy(dst, src, len); | 141 | memcpy(dst, src, len); |
@@ -145,9 +145,9 @@ csum_partial_copy(const unsigned char *src, unsigned char *dst, int len, unsigne | |||
145 | 145 | ||
146 | /* Copy from userspace and compute checksum. If we catch an exception | 146 | /* Copy from userspace and compute checksum. If we catch an exception |
147 | then zero the rest of the buffer. */ | 147 | then zero the rest of the buffer. */ |
148 | unsigned int | 148 | __wsum |
149 | csum_partial_copy_from_user(const unsigned char *src, unsigned char *dst, int len, | 149 | csum_partial_copy_from_user(const void __user *src, void *dst, int len, |
150 | unsigned int sum, int *err_ptr) | 150 | __wsum sum, int *err_ptr) |
151 | { | 151 | { |
152 | int missing; | 152 | int missing; |
153 | 153 | ||
@@ -166,9 +166,9 @@ csum_partial_copy_from_user(const unsigned char *src, unsigned char *dst, int le | |||
166 | } | 166 | } |
167 | 167 | ||
168 | /* Copy to userspace and compute checksum. */ | 168 | /* Copy to userspace and compute checksum. */ |
169 | unsigned int | 169 | __wsum |
170 | csum_partial_copy_to_user(const unsigned char *src, unsigned char *dst, int len, | 170 | csum_partial_copy_to_user(const unsigned char *src, unsigned char *dst, int len, |
171 | unsigned int sum, int *err_ptr) | 171 | __wsum sum, int *err_ptr) |
172 | { | 172 | { |
173 | sum = csum_partial(src, len, sum); | 173 | sum = csum_partial(src, len, sum); |
174 | 174 | ||
@@ -182,28 +182,24 @@ csum_partial_copy_to_user(const unsigned char *src, unsigned char *dst, int len, | |||
182 | * This is a version of ip_compute_csum() optimized for IP headers, | 182 | * This is a version of ip_compute_csum() optimized for IP headers, |
183 | * which always checksum on 4 octet boundaries. | 183 | * which always checksum on 4 octet boundaries. |
184 | */ | 184 | */ |
185 | unsigned short ip_fast_csum(unsigned char *iph, unsigned int ihl) | 185 | __sum16 ip_fast_csum(const void *iph, unsigned int ihl) |
186 | { | 186 | { |
187 | pr_debug("ip_fast_csum %p,%d\n", iph, ihl); | 187 | pr_debug("ip_fast_csum %p,%d\n", iph, ihl); |
188 | 188 | ||
189 | return ~do_csum(iph, ihl * 4); | 189 | return (__force __sum16)~do_csum(iph, ihl * 4); |
190 | } | 190 | } |
191 | 191 | ||
192 | unsigned int csum_tcpudp_nofold(unsigned long saddr, | 192 | __wsum csum_tcpudp_nofold(__be32 saddr, __be32 daddr, |
193 | unsigned long daddr, | ||
194 | unsigned short len, | 193 | unsigned short len, |
195 | unsigned short proto, unsigned int sum) | 194 | unsigned short proto, __wsum sum) |
196 | { | 195 | { |
197 | unsigned long long result; | 196 | unsigned long long result; |
198 | 197 | ||
199 | pr_debug("ntohs(0x%x)=0x%x\n", 0xdead, ntohs(0xdead)); | 198 | pr_debug("ntohs(0x%x)=0x%x\n", 0xdead, ntohs(0xdead)); |
200 | pr_debug("htons(0x%x)=0x%x\n", 0xdead, htons(0xdead)); | 199 | pr_debug("htons(0x%x)=0x%x\n", 0xdead, htons(0xdead)); |
201 | 200 | ||
202 | result = ((unsigned long long) saddr + | 201 | result = (__force u64) saddr + (__force u64) daddr + |
203 | (unsigned long long) daddr + | 202 | (__force u64) sum + ((len + proto) << 8); |
204 | (unsigned long long) sum + | ||
205 | ((unsigned long long) ntohs(len) << 16) + | ||
206 | ((unsigned long long) proto << 8)); | ||
207 | 203 | ||
208 | /* Fold down to 32-bits so we don't loose in the typedef-less | 204 | /* Fold down to 32-bits so we don't loose in the typedef-less |
209 | network stack. */ | 205 | network stack. */ |
@@ -215,16 +211,5 @@ unsigned int csum_tcpudp_nofold(unsigned long saddr, | |||
215 | pr_debug("%s saddr %x daddr %x len %x proto %x sum %x result %08Lx\n", | 211 | pr_debug("%s saddr %x daddr %x len %x proto %x sum %x result %08Lx\n", |
216 | __FUNCTION__, saddr, daddr, len, proto, sum, result); | 212 | __FUNCTION__, saddr, daddr, len, proto, sum, result); |
217 | 213 | ||
218 | return result; | 214 | return (__wsum)result; |
219 | } | ||
220 | |||
221 | // Post SIM: | ||
222 | unsigned int | ||
223 | csum_partial_copy_nocheck(const unsigned char *src, unsigned char *dst, int len, unsigned int sum) | ||
224 | { | ||
225 | // unsigned dummy; | ||
226 | pr_debug("csum_partial_copy_nocheck src %p dst %p len %d\n", src, dst, | ||
227 | len); | ||
228 | |||
229 | return csum_partial_copy(src, dst, len, sum); | ||
230 | } | 215 | } |
diff --git a/arch/sh64/lib/dbg.c b/arch/sh64/lib/dbg.c index 1326f45f31eb..4310fc87444e 100644 --- a/arch/sh64/lib/dbg.c +++ b/arch/sh64/lib/dbg.c | |||
@@ -383,7 +383,7 @@ void show_excp_regs(char *from, int trapnr, int signr, struct pt_regs *regs) | |||
383 | /* ======================================================================= */ | 383 | /* ======================================================================= */ |
384 | 384 | ||
385 | /* | 385 | /* |
386 | ** Depending on <base> scan the MMU, Data or Instrction side | 386 | ** Depending on <base> scan the MMU, Data or Instruction side |
387 | ** looking for a valid mapping matching Eaddr & asid. | 387 | ** looking for a valid mapping matching Eaddr & asid. |
388 | ** Return -1 if not found or the TLB id entry otherwise. | 388 | ** Return -1 if not found or the TLB id entry otherwise. |
389 | ** Note: it works only for 4k pages! | 389 | ** Note: it works only for 4k pages! |
diff --git a/arch/sparc/Kconfig b/arch/sparc/Kconfig index 2f96610a83e9..92a7c8a636d3 100644 --- a/arch/sparc/Kconfig +++ b/arch/sparc/Kconfig | |||
@@ -212,8 +212,8 @@ config SPARC_LED | |||
212 | tristate "Sun4m LED driver" | 212 | tristate "Sun4m LED driver" |
213 | help | 213 | help |
214 | This driver toggles the front-panel LED on sun4m systems | 214 | This driver toggles the front-panel LED on sun4m systems |
215 | in a user-specifyable manner. It's state can be probed | 215 | in a user-specifiable manner. Its state can be probed |
216 | by reading /proc/led and it's blinking mode can be changed | 216 | by reading /proc/led and its blinking mode can be changed |
217 | via writes to /proc/led | 217 | via writes to /proc/led |
218 | 218 | ||
219 | source "fs/Kconfig.binfmt" | 219 | source "fs/Kconfig.binfmt" |
diff --git a/arch/sparc64/kernel/pci.c b/arch/sparc64/kernel/pci.c index e02f01b644af..dfc41cd4bb5d 100644 --- a/arch/sparc64/kernel/pci.c +++ b/arch/sparc64/kernel/pci.c | |||
@@ -646,13 +646,4 @@ int pci_domain_nr(struct pci_bus *pbus) | |||
646 | } | 646 | } |
647 | EXPORT_SYMBOL(pci_domain_nr); | 647 | EXPORT_SYMBOL(pci_domain_nr); |
648 | 648 | ||
649 | int pcibios_prep_mwi(struct pci_dev *dev) | ||
650 | { | ||
651 | /* We set correct PCI_CACHE_LINE_SIZE register values for every | ||
652 | * device probed on this platform. So there is nothing to check | ||
653 | * and this always succeeds. | ||
654 | */ | ||
655 | return 0; | ||
656 | } | ||
657 | |||
658 | #endif /* !(CONFIG_PCI) */ | 649 | #endif /* !(CONFIG_PCI) */ |
diff --git a/arch/um/drivers/chan_user.c b/arch/um/drivers/chan_user.c index 2f880cb167a5..0cad3546cb89 100644 --- a/arch/um/drivers/chan_user.c +++ b/arch/um/drivers/chan_user.c | |||
@@ -120,7 +120,7 @@ static int winch_thread(void *arg) | |||
120 | /* These are synchronization calls between various UML threads on the | 120 | /* These are synchronization calls between various UML threads on the |
121 | * host - since they are not different kernel threads, we cannot use | 121 | * host - since they are not different kernel threads, we cannot use |
122 | * kernel semaphores. We don't use SysV semaphores because they are | 122 | * kernel semaphores. We don't use SysV semaphores because they are |
123 | * persistant. */ | 123 | * persistent. */ |
124 | count = os_read_file(pipe_fd, &c, sizeof(c)); | 124 | count = os_read_file(pipe_fd, &c, sizeof(c)); |
125 | if(count != sizeof(c)) | 125 | if(count != sizeof(c)) |
126 | printk("winch_thread : failed to read synchronization byte, " | 126 | printk("winch_thread : failed to read synchronization byte, " |
diff --git a/arch/um/include/os.h b/arch/um/include/os.h index 6516f6dca96d..13a86bd383d3 100644 --- a/arch/um/include/os.h +++ b/arch/um/include/os.h | |||
@@ -233,6 +233,8 @@ extern unsigned long __do_user_copy(void *to, const void *from, int n, | |||
233 | void (*op)(void *to, const void *from, | 233 | void (*op)(void *to, const void *from, |
234 | int n), int *faulted_out); | 234 | int n), int *faulted_out); |
235 | 235 | ||
236 | /* execvp.c */ | ||
237 | extern int execvp_noalloc(char *buf, const char *file, char *const argv[]); | ||
236 | /* helper.c */ | 238 | /* helper.c */ |
237 | extern int run_helper(void (*pre_exec)(void *), void *pre_data, char **argv, | 239 | extern int run_helper(void (*pre_exec)(void *), void *pre_data, char **argv, |
238 | unsigned long *stack_out); | 240 | unsigned long *stack_out); |
diff --git a/arch/um/include/sysdep-i386/checksum.h b/arch/um/include/sysdep-i386/checksum.h index 052bb061a978..0cb4645cbeb8 100644 --- a/arch/um/include/sysdep-i386/checksum.h +++ b/arch/um/include/sysdep-i386/checksum.h | |||
@@ -20,8 +20,7 @@ | |||
20 | * | 20 | * |
21 | * it's best to have buff aligned on a 32-bit boundary | 21 | * it's best to have buff aligned on a 32-bit boundary |
22 | */ | 22 | */ |
23 | unsigned int csum_partial(const unsigned char * buff, int len, | 23 | __wsum csum_partial(const void *buff, int len, __wsum sum); |
24 | unsigned int sum); | ||
25 | 24 | ||
26 | /* | 25 | /* |
27 | * Note: when you get a NULL pointer exception here this means someone | 26 | * Note: when you get a NULL pointer exception here this means someone |
@@ -32,8 +31,8 @@ unsigned int csum_partial(const unsigned char * buff, int len, | |||
32 | */ | 31 | */ |
33 | 32 | ||
34 | static __inline__ | 33 | static __inline__ |
35 | unsigned int csum_partial_copy_nocheck(const unsigned char *src, unsigned char *dst, | 34 | __wsum csum_partial_copy_nocheck(const void *src, void *dst, |
36 | int len, int sum) | 35 | int len, __wsum sum) |
37 | { | 36 | { |
38 | memcpy(dst, src, len); | 37 | memcpy(dst, src, len); |
39 | return csum_partial(dst, len, sum); | 38 | return csum_partial(dst, len, sum); |
@@ -48,36 +47,25 @@ unsigned int csum_partial_copy_nocheck(const unsigned char *src, unsigned char * | |||
48 | */ | 47 | */ |
49 | 48 | ||
50 | static __inline__ | 49 | static __inline__ |
51 | unsigned int csum_partial_copy_from_user(const unsigned char __user *src, | 50 | __wsum csum_partial_copy_from_user(const void __user *src, void *dst, |
52 | unsigned char *dst, | 51 | int len, __wsum sum, int *err_ptr) |
53 | int len, int sum, int *err_ptr) | ||
54 | { | 52 | { |
55 | if(copy_from_user(dst, src, len)){ | 53 | if (copy_from_user(dst, src, len)) { |
56 | *err_ptr = -EFAULT; | 54 | *err_ptr = -EFAULT; |
57 | return(-1); | 55 | return (__force __wsum)-1; |
58 | } | 56 | } |
59 | 57 | ||
60 | return csum_partial(dst, len, sum); | 58 | return csum_partial(dst, len, sum); |
61 | } | 59 | } |
62 | 60 | ||
63 | /* | 61 | /* |
64 | * These are the old (and unsafe) way of doing checksums, a warning message | ||
65 | * will be printed if they are used and an exception occurs. | ||
66 | * | ||
67 | * these functions should go away after some time. | ||
68 | */ | ||
69 | |||
70 | #define csum_partial_copy_fromuser csum_partial_copy_from_user | ||
71 | |||
72 | /* | ||
73 | * This is a version of ip_compute_csum() optimized for IP headers, | 62 | * This is a version of ip_compute_csum() optimized for IP headers, |
74 | * which always checksum on 4 octet boundaries. | 63 | * which always checksum on 4 octet boundaries. |
75 | * | 64 | * |
76 | * By Jorge Cwik <jorge@laser.satlink.net>, adapted for linux by | 65 | * By Jorge Cwik <jorge@laser.satlink.net>, adapted for linux by |
77 | * Arnt Gulbrandsen. | 66 | * Arnt Gulbrandsen. |
78 | */ | 67 | */ |
79 | static inline unsigned short ip_fast_csum(unsigned char * iph, | 68 | static inline __sum16 ip_fast_csum(const void *iph, unsigned int ihl) |
80 | unsigned int ihl) | ||
81 | { | 69 | { |
82 | unsigned int sum; | 70 | unsigned int sum; |
83 | 71 | ||
@@ -105,29 +93,29 @@ static inline unsigned short ip_fast_csum(unsigned char * iph, | |||
105 | : "=r" (sum), "=r" (iph), "=r" (ihl) | 93 | : "=r" (sum), "=r" (iph), "=r" (ihl) |
106 | : "1" (iph), "2" (ihl) | 94 | : "1" (iph), "2" (ihl) |
107 | : "memory"); | 95 | : "memory"); |
108 | return sum; | 96 | return (__force __sum16)sum; |
109 | } | 97 | } |
110 | 98 | ||
111 | /* | 99 | /* |
112 | * Fold a partial checksum | 100 | * Fold a partial checksum |
113 | */ | 101 | */ |
114 | 102 | ||
115 | static inline unsigned int csum_fold(unsigned int sum) | 103 | static inline __sum16 csum_fold(__wsum sum) |
116 | { | 104 | { |
117 | __asm__( | 105 | __asm__( |
118 | "addl %1, %0 ;\n" | 106 | "addl %1, %0 ;\n" |
119 | "adcl $0xffff, %0 ;\n" | 107 | "adcl $0xffff, %0 ;\n" |
120 | : "=r" (sum) | 108 | : "=r" (sum) |
121 | : "r" (sum << 16), "0" (sum & 0xffff0000) | 109 | : "r" ((__force u32)sum << 16), |
110 | "0" ((__force u32)sum & 0xffff0000) | ||
122 | ); | 111 | ); |
123 | return (~sum) >> 16; | 112 | return (__force __sum16)(~(__force u32)sum >> 16); |
124 | } | 113 | } |
125 | 114 | ||
126 | static inline unsigned long csum_tcpudp_nofold(unsigned long saddr, | 115 | static inline __wsum csum_tcpudp_nofold(__be32 saddr, __be32 daddr, |
127 | unsigned long daddr, | ||
128 | unsigned short len, | 116 | unsigned short len, |
129 | unsigned short proto, | 117 | unsigned short proto, |
130 | unsigned int sum) | 118 | __wsum sum) |
131 | { | 119 | { |
132 | __asm__( | 120 | __asm__( |
133 | "addl %1, %0 ;\n" | 121 | "addl %1, %0 ;\n" |
@@ -135,7 +123,7 @@ static inline unsigned long csum_tcpudp_nofold(unsigned long saddr, | |||
135 | "adcl %3, %0 ;\n" | 123 | "adcl %3, %0 ;\n" |
136 | "adcl $0, %0 ;\n" | 124 | "adcl $0, %0 ;\n" |
137 | : "=r" (sum) | 125 | : "=r" (sum) |
138 | : "g" (daddr), "g"(saddr), "g"((ntohs(len)<<16)+proto*256), "0"(sum)); | 126 | : "g" (daddr), "g"(saddr), "g"((len + proto) << 8), "0"(sum)); |
139 | return sum; | 127 | return sum; |
140 | } | 128 | } |
141 | 129 | ||
@@ -143,11 +131,10 @@ static inline unsigned long csum_tcpudp_nofold(unsigned long saddr, | |||
143 | * computes the checksum of the TCP/UDP pseudo-header | 131 | * computes the checksum of the TCP/UDP pseudo-header |
144 | * returns a 16-bit checksum, already complemented | 132 | * returns a 16-bit checksum, already complemented |
145 | */ | 133 | */ |
146 | static inline unsigned short int csum_tcpudp_magic(unsigned long saddr, | 134 | static inline __sum16 csum_tcpudp_magic(__be32 saddr, __be32 daddr, |
147 | unsigned long daddr, | ||
148 | unsigned short len, | 135 | unsigned short len, |
149 | unsigned short proto, | 136 | unsigned short proto, |
150 | unsigned int sum) | 137 | __wsum sum) |
151 | { | 138 | { |
152 | return csum_fold(csum_tcpudp_nofold(saddr,daddr,len,proto,sum)); | 139 | return csum_fold(csum_tcpudp_nofold(saddr,daddr,len,proto,sum)); |
153 | } | 140 | } |
@@ -157,17 +144,16 @@ static inline unsigned short int csum_tcpudp_magic(unsigned long saddr, | |||
157 | * in icmp.c | 144 | * in icmp.c |
158 | */ | 145 | */ |
159 | 146 | ||
160 | static inline unsigned short ip_compute_csum(unsigned char * buff, int len) | 147 | static inline __sum16 ip_compute_csum(const void *buff, int len) |
161 | { | 148 | { |
162 | return csum_fold (csum_partial(buff, len, 0)); | 149 | return csum_fold (csum_partial(buff, len, 0)); |
163 | } | 150 | } |
164 | 151 | ||
165 | #define _HAVE_ARCH_IPV6_CSUM | 152 | #define _HAVE_ARCH_IPV6_CSUM |
166 | static __inline__ unsigned short int csum_ipv6_magic(struct in6_addr *saddr, | 153 | static __inline__ __sum16 csum_ipv6_magic(const struct in6_addr *saddr, |
167 | struct in6_addr *daddr, | 154 | const struct in6_addr *daddr, |
168 | __u32 len, | 155 | __u32 len, unsigned short proto, |
169 | unsigned short proto, | 156 | __wsum sum) |
170 | unsigned int sum) | ||
171 | { | 157 | { |
172 | __asm__( | 158 | __asm__( |
173 | "addl 0(%1), %0 ;\n" | 159 | "addl 0(%1), %0 ;\n" |
@@ -192,14 +178,14 @@ static __inline__ unsigned short int csum_ipv6_magic(struct in6_addr *saddr, | |||
192 | * Copy and checksum to user | 178 | * Copy and checksum to user |
193 | */ | 179 | */ |
194 | #define HAVE_CSUM_COPY_USER | 180 | #define HAVE_CSUM_COPY_USER |
195 | static __inline__ unsigned int csum_and_copy_to_user(const unsigned char *src, | 181 | static __inline__ __wsum csum_and_copy_to_user(const void *src, |
196 | unsigned char __user *dst, | 182 | void __user *dst, |
197 | int len, int sum, int *err_ptr) | 183 | int len, __wsum sum, int *err_ptr) |
198 | { | 184 | { |
199 | if (access_ok(VERIFY_WRITE, dst, len)){ | 185 | if (access_ok(VERIFY_WRITE, dst, len)) { |
200 | if(copy_to_user(dst, src, len)){ | 186 | if (copy_to_user(dst, src, len)) { |
201 | *err_ptr = -EFAULT; | 187 | *err_ptr = -EFAULT; |
202 | return(-1); | 188 | return (__force __wsum)-1; |
203 | } | 189 | } |
204 | 190 | ||
205 | return csum_partial(src, len, sum); | 191 | return csum_partial(src, len, sum); |
@@ -208,7 +194,7 @@ static __inline__ unsigned int csum_and_copy_to_user(const unsigned char *src, | |||
208 | if (len) | 194 | if (len) |
209 | *err_ptr = -EFAULT; | 195 | *err_ptr = -EFAULT; |
210 | 196 | ||
211 | return -1; /* invalid checksum */ | 197 | return (__force __wsum)-1; /* invalid checksum */ |
212 | } | 198 | } |
213 | 199 | ||
214 | #endif | 200 | #endif |
diff --git a/arch/um/include/sysdep-x86_64/checksum.h b/arch/um/include/sysdep-x86_64/checksum.h index ea97005af694..a5be9031ea85 100644 --- a/arch/um/include/sysdep-x86_64/checksum.h +++ b/arch/um/include/sysdep-x86_64/checksum.h | |||
@@ -9,8 +9,7 @@ | |||
9 | #include "linux/in6.h" | 9 | #include "linux/in6.h" |
10 | #include "asm/uaccess.h" | 10 | #include "asm/uaccess.h" |
11 | 11 | ||
12 | extern unsigned csum_partial(const unsigned char *buff, unsigned len, | 12 | extern __wsum csum_partial(const void *buff, int len, __wsum sum); |
13 | unsigned sum); | ||
14 | 13 | ||
15 | /* | 14 | /* |
16 | * Note: when you get a NULL pointer exception here this means someone | 15 | * Note: when you get a NULL pointer exception here this means someone |
@@ -21,21 +20,21 @@ extern unsigned csum_partial(const unsigned char *buff, unsigned len, | |||
21 | */ | 20 | */ |
22 | 21 | ||
23 | static __inline__ | 22 | static __inline__ |
24 | unsigned int csum_partial_copy_nocheck(const unsigned char *src, unsigned char *dst, | 23 | __wsum csum_partial_copy_nocheck(const void *src, void *dst, |
25 | int len, int sum) | 24 | int len, __wsum sum) |
26 | { | 25 | { |
27 | memcpy(dst, src, len); | 26 | memcpy(dst, src, len); |
28 | return(csum_partial(dst, len, sum)); | 27 | return(csum_partial(dst, len, sum)); |
29 | } | 28 | } |
30 | 29 | ||
31 | static __inline__ | 30 | static __inline__ |
32 | unsigned int csum_partial_copy_from_user(const unsigned char *src, | 31 | __wsum csum_partial_copy_from_user(const void __user *src, |
33 | unsigned char *dst, int len, int sum, | 32 | void *dst, int len, __wsum sum, |
34 | int *err_ptr) | 33 | int *err_ptr) |
35 | { | 34 | { |
36 | if(copy_from_user(dst, src, len)){ | 35 | if (copy_from_user(dst, src, len)) { |
37 | *err_ptr = -EFAULT; | 36 | *err_ptr = -EFAULT; |
38 | return(-1); | 37 | return (__force __wsum)-1; |
39 | } | 38 | } |
40 | return csum_partial(dst, len, sum); | 39 | return csum_partial(dst, len, sum); |
41 | } | 40 | } |
@@ -48,15 +47,16 @@ unsigned int csum_partial_copy_from_user(const unsigned char *src, | |||
48 | * the last step before putting a checksum into a packet. | 47 | * the last step before putting a checksum into a packet. |
49 | * Make sure not to mix with 64bit checksums. | 48 | * Make sure not to mix with 64bit checksums. |
50 | */ | 49 | */ |
51 | static inline unsigned int csum_fold(unsigned int sum) | 50 | static inline __sum16 csum_fold(__wsum sum) |
52 | { | 51 | { |
53 | __asm__( | 52 | __asm__( |
54 | " addl %1,%0\n" | 53 | " addl %1,%0\n" |
55 | " adcl $0xffff,%0" | 54 | " adcl $0xffff,%0" |
56 | : "=r" (sum) | 55 | : "=r" (sum) |
57 | : "r" (sum << 16), "0" (sum & 0xffff0000) | 56 | : "r" ((__force u32)sum << 16), |
57 | "0" ((__force u32)sum & 0xffff0000) | ||
58 | ); | 58 | ); |
59 | return (~sum) >> 16; | 59 | return (__force __sum16)(~(__force u32)sum >> 16); |
60 | } | 60 | } |
61 | 61 | ||
62 | /** | 62 | /** |
@@ -70,28 +70,27 @@ static inline unsigned int csum_fold(unsigned int sum) | |||
70 | * Returns the pseudo header checksum the input data. Result is | 70 | * Returns the pseudo header checksum the input data. Result is |
71 | * 32bit unfolded. | 71 | * 32bit unfolded. |
72 | */ | 72 | */ |
73 | static inline unsigned long | 73 | static inline __wsum |
74 | csum_tcpudp_nofold(unsigned saddr, unsigned daddr, unsigned short len, | 74 | csum_tcpudp_nofold(__be32 saddr, __be32 daddr, unsigned short len, |
75 | unsigned short proto, unsigned int sum) | 75 | unsigned short proto, __wsum sum) |
76 | { | 76 | { |
77 | asm(" addl %1, %0\n" | 77 | asm(" addl %1, %0\n" |
78 | " adcl %2, %0\n" | 78 | " adcl %2, %0\n" |
79 | " adcl %3, %0\n" | 79 | " adcl %3, %0\n" |
80 | " adcl $0, %0\n" | 80 | " adcl $0, %0\n" |
81 | : "=r" (sum) | 81 | : "=r" (sum) |
82 | : "g" (daddr), "g" (saddr), "g" ((ntohs(len)<<16)+proto*256), "0" (sum)); | 82 | : "g" (daddr), "g" (saddr), "g" ((len + proto) << 8), "0" (sum)); |
83 | return sum; | 83 | return sum; |
84 | } | 84 | } |
85 | 85 | ||
86 | /* | 86 | /* |
87 | * computes the checksum of the TCP/UDP pseudo-header | 87 | * computes the checksum of the TCP/UDP pseudo-header |
88 | * returns a 16-bit checksum, already complemented | 88 | * returns a 16-bit checksum, already complemented |
89 | */ | 89 | */ |
90 | static inline unsigned short int csum_tcpudp_magic(unsigned long saddr, | 90 | static inline __sum16 csum_tcpudp_magic(__be32 saddr, __be32 daddr, |
91 | unsigned long daddr, | 91 | unsigned short len, |
92 | unsigned short len, | 92 | unsigned short proto, |
93 | unsigned short proto, | 93 | __wsum sum) |
94 | unsigned int sum) | ||
95 | { | 94 | { |
96 | return csum_fold(csum_tcpudp_nofold(saddr,daddr,len,proto,sum)); | 95 | return csum_fold(csum_tcpudp_nofold(saddr,daddr,len,proto,sum)); |
97 | } | 96 | } |
@@ -101,7 +100,7 @@ static inline unsigned short int csum_tcpudp_magic(unsigned long saddr, | |||
101 | * iph: ipv4 header | 100 | * iph: ipv4 header |
102 | * ihl: length of header / 4 | 101 | * ihl: length of header / 4 |
103 | */ | 102 | */ |
104 | static inline unsigned short ip_fast_csum(unsigned char *iph, unsigned int ihl) | 103 | static inline __sum16 ip_fast_csum(const void *iph, unsigned int ihl) |
105 | { | 104 | { |
106 | unsigned int sum; | 105 | unsigned int sum; |
107 | 106 | ||
@@ -128,7 +127,7 @@ static inline unsigned short ip_fast_csum(unsigned char *iph, unsigned int ihl) | |||
128 | : "=r" (sum), "=r" (iph), "=r" (ihl) | 127 | : "=r" (sum), "=r" (iph), "=r" (ihl) |
129 | : "1" (iph), "2" (ihl) | 128 | : "1" (iph), "2" (ihl) |
130 | : "memory"); | 129 | : "memory"); |
131 | return(sum); | 130 | return (__force __sum16)sum; |
132 | } | 131 | } |
133 | 132 | ||
134 | static inline unsigned add32_with_carry(unsigned a, unsigned b) | 133 | static inline unsigned add32_with_carry(unsigned a, unsigned b) |
@@ -140,6 +139,6 @@ static inline unsigned add32_with_carry(unsigned a, unsigned b) | |||
140 | return a; | 139 | return a; |
141 | } | 140 | } |
142 | 141 | ||
143 | extern unsigned short ip_compute_csum(unsigned char * buff, int len); | 142 | extern __sum16 ip_compute_csum(const void *buff, int len); |
144 | 143 | ||
145 | #endif | 144 | #endif |
diff --git a/arch/um/os-Linux/Makefile b/arch/um/os-Linux/Makefile index b4183929b32c..2f8c79464015 100644 --- a/arch/um/os-Linux/Makefile +++ b/arch/um/os-Linux/Makefile | |||
@@ -3,8 +3,8 @@ | |||
3 | # Licensed under the GPL | 3 | # Licensed under the GPL |
4 | # | 4 | # |
5 | 5 | ||
6 | obj-y = aio.o elf_aux.o file.o helper.o irq.o main.o mem.o process.o sigio.o \ | 6 | obj-y = aio.o elf_aux.o execvp.o file.o helper.o irq.o main.o mem.o process.o \ |
7 | signal.o start_up.o time.o trap.o tty.o uaccess.o umid.o tls.o \ | 7 | sigio.o signal.o start_up.o time.o trap.o tty.o uaccess.o umid.o tls.o \ |
8 | user_syms.o util.o drivers/ sys-$(SUBARCH)/ | 8 | user_syms.o util.o drivers/ sys-$(SUBARCH)/ |
9 | 9 | ||
10 | obj-$(CONFIG_MODE_SKAS) += skas/ | 10 | obj-$(CONFIG_MODE_SKAS) += skas/ |
@@ -15,9 +15,9 @@ user-objs-$(CONFIG_MODE_TT) += tt.o | |||
15 | obj-$(CONFIG_TTY_LOG) += tty_log.o | 15 | obj-$(CONFIG_TTY_LOG) += tty_log.o |
16 | user-objs-$(CONFIG_TTY_LOG) += tty_log.o | 16 | user-objs-$(CONFIG_TTY_LOG) += tty_log.o |
17 | 17 | ||
18 | USER_OBJS := $(user-objs-y) aio.o elf_aux.o file.o helper.o irq.o main.o mem.o \ | 18 | USER_OBJS := $(user-objs-y) aio.o elf_aux.o execvp.o file.o helper.o irq.o \ |
19 | process.o sigio.o signal.o start_up.o time.o trap.o tty.o tls.o \ | 19 | main.o mem.o process.o sigio.o signal.o start_up.o time.o trap.o tty.o \ |
20 | uaccess.o umid.o util.o | 20 | tls.o uaccess.o umid.o util.o |
21 | 21 | ||
22 | CFLAGS_user_syms.o += -DSUBARCH_$(SUBARCH) | 22 | CFLAGS_user_syms.o += -DSUBARCH_$(SUBARCH) |
23 | 23 | ||
diff --git a/arch/um/os-Linux/execvp.c b/arch/um/os-Linux/execvp.c new file mode 100644 index 000000000000..66e583a4031b --- /dev/null +++ b/arch/um/os-Linux/execvp.c | |||
@@ -0,0 +1,149 @@ | |||
1 | /* Copyright (C) 2006 by Paolo Giarrusso - modified from glibc' execvp.c. | ||
2 | Original copyright notice follows: | ||
3 | |||
4 | Copyright (C) 1991,92,1995-99,2002,2004 Free Software Foundation, Inc. | ||
5 | This file is part of the GNU C Library. | ||
6 | |||
7 | The GNU C Library is free software; you can redistribute it and/or | ||
8 | modify it under the terms of the GNU Lesser General Public | ||
9 | License as published by the Free Software Foundation; either | ||
10 | version 2.1 of the License, or (at your option) any later version. | ||
11 | |||
12 | The GNU C Library is distributed in the hope that it will be useful, | ||
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | ||
15 | Lesser General Public License for more details. | ||
16 | |||
17 | You should have received a copy of the GNU Lesser General Public | ||
18 | License along with the GNU C Library; if not, write to the Free | ||
19 | Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA | ||
20 | 02111-1307 USA. */ | ||
21 | #include <unistd.h> | ||
22 | |||
23 | #include <stdbool.h> | ||
24 | #include <stdlib.h> | ||
25 | #include <string.h> | ||
26 | #include <errno.h> | ||
27 | #include <limits.h> | ||
28 | |||
29 | #ifndef TEST | ||
30 | #include "um_malloc.h" | ||
31 | #else | ||
32 | #include <stdio.h> | ||
33 | #define um_kmalloc malloc | ||
34 | #endif | ||
35 | #include "os.h" | ||
36 | |||
37 | /* Execute FILE, searching in the `PATH' environment variable if it contains | ||
38 | no slashes, with arguments ARGV and environment from `environ'. */ | ||
39 | int execvp_noalloc(char *buf, const char *file, char *const argv[]) | ||
40 | { | ||
41 | if (*file == '\0') { | ||
42 | return -ENOENT; | ||
43 | } | ||
44 | |||
45 | if (strchr (file, '/') != NULL) { | ||
46 | /* Don't search when it contains a slash. */ | ||
47 | execv(file, argv); | ||
48 | } else { | ||
49 | int got_eacces; | ||
50 | size_t len, pathlen; | ||
51 | char *name, *p; | ||
52 | char *path = getenv("PATH"); | ||
53 | if (path == NULL) | ||
54 | path = ":/bin:/usr/bin"; | ||
55 | |||
56 | len = strlen(file) + 1; | ||
57 | pathlen = strlen(path); | ||
58 | /* Copy the file name at the top. */ | ||
59 | name = memcpy(buf + pathlen + 1, file, len); | ||
60 | /* And add the slash. */ | ||
61 | *--name = '/'; | ||
62 | |||
63 | got_eacces = 0; | ||
64 | p = path; | ||
65 | do { | ||
66 | char *startp; | ||
67 | |||
68 | path = p; | ||
69 | //Let's avoid this GNU extension. | ||
70 | //p = strchrnul (path, ':'); | ||
71 | p = strchr(path, ':'); | ||
72 | if (!p) | ||
73 | p = strchr(path, '\0'); | ||
74 | |||
75 | if (p == path) | ||
76 | /* Two adjacent colons, or a colon at the beginning or the end | ||
77 | of `PATH' means to search the current directory. */ | ||
78 | startp = name + 1; | ||
79 | else | ||
80 | startp = memcpy(name - (p - path), path, p - path); | ||
81 | |||
82 | /* Try to execute this name. If it works, execv will not return. */ | ||
83 | execv(startp, argv); | ||
84 | |||
85 | /* | ||
86 | if (errno == ENOEXEC) { | ||
87 | } | ||
88 | */ | ||
89 | |||
90 | switch (errno) { | ||
91 | case EACCES: | ||
92 | /* Record the we got a `Permission denied' error. If we end | ||
93 | up finding no executable we can use, we want to diagnose | ||
94 | that we did find one but were denied access. */ | ||
95 | got_eacces = 1; | ||
96 | case ENOENT: | ||
97 | case ESTALE: | ||
98 | case ENOTDIR: | ||
99 | /* Those errors indicate the file is missing or not executable | ||
100 | by us, in which case we want to just try the next path | ||
101 | directory. */ | ||
102 | case ENODEV: | ||
103 | case ETIMEDOUT: | ||
104 | /* Some strange filesystems like AFS return even | ||
105 | stranger error numbers. They cannot reasonably mean | ||
106 | anything else so ignore those, too. */ | ||
107 | case ENOEXEC: | ||
108 | /* We won't go searching for the shell | ||
109 | * if it is not executable - the Linux | ||
110 | * kernel already handles this enough, | ||
111 | * for us. */ | ||
112 | break; | ||
113 | |||
114 | default: | ||
115 | /* Some other error means we found an executable file, but | ||
116 | something went wrong executing it; return the error to our | ||
117 | caller. */ | ||
118 | return -errno; | ||
119 | } | ||
120 | } while (*p++ != '\0'); | ||
121 | |||
122 | /* We tried every element and none of them worked. */ | ||
123 | if (got_eacces) | ||
124 | /* At least one failure was due to permissions, so report that | ||
125 | error. */ | ||
126 | return -EACCES; | ||
127 | } | ||
128 | |||
129 | /* Return the error from the last attempt (probably ENOENT). */ | ||
130 | return -errno; | ||
131 | } | ||
132 | #ifdef TEST | ||
133 | int main(int argc, char**argv) | ||
134 | { | ||
135 | char buf[PATH_MAX]; | ||
136 | int ret; | ||
137 | argc--; | ||
138 | if (!argc) { | ||
139 | fprintf(stderr, "Not enough arguments\n"); | ||
140 | return 1; | ||
141 | } | ||
142 | argv++; | ||
143 | if (ret = execvp_noalloc(buf, argv[0], argv)) { | ||
144 | errno = -ret; | ||
145 | perror("execvp_noalloc"); | ||
146 | } | ||
147 | return 0; | ||
148 | } | ||
149 | #endif | ||
diff --git a/arch/um/os-Linux/helper.c b/arch/um/os-Linux/helper.c index d13299cfa318..c7ad6306e22f 100644 --- a/arch/um/os-Linux/helper.c +++ b/arch/um/os-Linux/helper.c | |||
@@ -8,18 +8,21 @@ | |||
8 | #include <unistd.h> | 8 | #include <unistd.h> |
9 | #include <errno.h> | 9 | #include <errno.h> |
10 | #include <sched.h> | 10 | #include <sched.h> |
11 | #include <limits.h> | ||
11 | #include <sys/signal.h> | 12 | #include <sys/signal.h> |
12 | #include <sys/wait.h> | 13 | #include <sys/wait.h> |
13 | #include "user.h" | 14 | #include "user.h" |
14 | #include "kern_util.h" | 15 | #include "kern_util.h" |
15 | #include "user_util.h" | 16 | #include "user_util.h" |
16 | #include "os.h" | 17 | #include "os.h" |
18 | #include "um_malloc.h" | ||
17 | 19 | ||
18 | struct helper_data { | 20 | struct helper_data { |
19 | void (*pre_exec)(void*); | 21 | void (*pre_exec)(void*); |
20 | void *pre_data; | 22 | void *pre_data; |
21 | char **argv; | 23 | char **argv; |
22 | int fd; | 24 | int fd; |
25 | char *buf; | ||
23 | }; | 26 | }; |
24 | 27 | ||
25 | /* Debugging aid, changed only from gdb */ | 28 | /* Debugging aid, changed only from gdb */ |
@@ -41,9 +44,8 @@ static int helper_child(void *arg) | |||
41 | } | 44 | } |
42 | if (data->pre_exec != NULL) | 45 | if (data->pre_exec != NULL) |
43 | (*data->pre_exec)(data->pre_data); | 46 | (*data->pre_exec)(data->pre_data); |
44 | execvp(argv[0], argv); | 47 | errval = execvp_noalloc(data->buf, argv[0], argv); |
45 | errval = -errno; | 48 | printk("helper_child - execvp of '%s' failed - errno = %d\n", argv[0], -errval); |
46 | printk("helper_child - execve of '%s' failed - errno = %d\n", argv[0], errno); | ||
47 | os_write_file(data->fd, &errval, sizeof(errval)); | 49 | os_write_file(data->fd, &errval, sizeof(errval)); |
48 | kill(os_getpid(), SIGKILL); | 50 | kill(os_getpid(), SIGKILL); |
49 | return 0; | 51 | return 0; |
@@ -84,11 +86,13 @@ int run_helper(void (*pre_exec)(void *), void *pre_data, char **argv, | |||
84 | data.pre_data = pre_data; | 86 | data.pre_data = pre_data; |
85 | data.argv = argv; | 87 | data.argv = argv; |
86 | data.fd = fds[1]; | 88 | data.fd = fds[1]; |
89 | data.buf = __cant_sleep() ? um_kmalloc_atomic(PATH_MAX) : | ||
90 | um_kmalloc(PATH_MAX); | ||
87 | pid = clone(helper_child, (void *) sp, CLONE_VM | SIGCHLD, &data); | 91 | pid = clone(helper_child, (void *) sp, CLONE_VM | SIGCHLD, &data); |
88 | if (pid < 0) { | 92 | if (pid < 0) { |
89 | ret = -errno; | 93 | ret = -errno; |
90 | printk("run_helper : clone failed, errno = %d\n", errno); | 94 | printk("run_helper : clone failed, errno = %d\n", errno); |
91 | goto out_close; | 95 | goto out_free2; |
92 | } | 96 | } |
93 | 97 | ||
94 | close(fds[1]); | 98 | close(fds[1]); |
@@ -109,6 +113,8 @@ int run_helper(void (*pre_exec)(void *), void *pre_data, char **argv, | |||
109 | CATCH_EINTR(waitpid(pid, NULL, 0)); | 113 | CATCH_EINTR(waitpid(pid, NULL, 0)); |
110 | } | 114 | } |
111 | 115 | ||
116 | out_free2: | ||
117 | kfree(data.buf); | ||
112 | out_close: | 118 | out_close: |
113 | if (fds[1] != -1) | 119 | if (fds[1] != -1) |
114 | close(fds[1]); | 120 | close(fds[1]); |
diff --git a/arch/v850/kernel/v850_ksyms.c b/arch/v850/kernel/v850_ksyms.c index 67bc48e57c60..93575fdc874d 100644 --- a/arch/v850/kernel/v850_ksyms.c +++ b/arch/v850/kernel/v850_ksyms.c | |||
@@ -24,7 +24,7 @@ EXPORT_SYMBOL (kernel_thread); | |||
24 | EXPORT_SYMBOL (__bug); | 24 | EXPORT_SYMBOL (__bug); |
25 | 25 | ||
26 | /* Networking helper routines. */ | 26 | /* Networking helper routines. */ |
27 | EXPORT_SYMBOL (csum_partial_copy); | 27 | EXPORT_SYMBOL (csum_partial_copy_nocheck); |
28 | EXPORT_SYMBOL (csum_partial_copy_from_user); | 28 | EXPORT_SYMBOL (csum_partial_copy_from_user); |
29 | EXPORT_SYMBOL (ip_compute_csum); | 29 | EXPORT_SYMBOL (ip_compute_csum); |
30 | EXPORT_SYMBOL (ip_fast_csum); | 30 | EXPORT_SYMBOL (ip_fast_csum); |
diff --git a/arch/v850/lib/checksum.c b/arch/v850/lib/checksum.c index fa5872633075..042158dfe17a 100644 --- a/arch/v850/lib/checksum.c +++ b/arch/v850/lib/checksum.c | |||
@@ -88,32 +88,32 @@ out: | |||
88 | * This is a version of ip_compute_csum() optimized for IP headers, | 88 | * This is a version of ip_compute_csum() optimized for IP headers, |
89 | * which always checksum on 4 octet boundaries. | 89 | * which always checksum on 4 octet boundaries. |
90 | */ | 90 | */ |
91 | unsigned short ip_fast_csum(unsigned char * iph, unsigned int ihl) | 91 | __sum16 ip_fast_csum(const void *iph, unsigned int ihl) |
92 | { | 92 | { |
93 | return ~do_csum(iph,ihl*4); | 93 | return (__force __sum16)~do_csum(iph,ihl*4); |
94 | } | 94 | } |
95 | 95 | ||
96 | /* | 96 | /* |
97 | * this routine is used for miscellaneous IP-like checksums, mainly | 97 | * this routine is used for miscellaneous IP-like checksums, mainly |
98 | * in icmp.c | 98 | * in icmp.c |
99 | */ | 99 | */ |
100 | unsigned short ip_compute_csum(const unsigned char * buff, int len) | 100 | __sum16 ip_compute_csum(const void *buff, int len) |
101 | { | 101 | { |
102 | return ~do_csum(buff,len); | 102 | return (__force __sum16)~do_csum(buff,len); |
103 | } | 103 | } |
104 | 104 | ||
105 | /* | 105 | /* |
106 | * computes a partial checksum, e.g. for TCP/UDP fragments | 106 | * computes a partial checksum, e.g. for TCP/UDP fragments |
107 | */ | 107 | */ |
108 | unsigned int csum_partial(const unsigned char *buff, int len, unsigned int sum) | 108 | __wsum csum_partial(const void *buff, int len, __wsum sum) |
109 | { | 109 | { |
110 | unsigned int result = do_csum(buff, len); | 110 | unsigned int result = do_csum(buff, len); |
111 | 111 | ||
112 | /* add in old sum, and carry.. */ | 112 | /* add in old sum, and carry.. */ |
113 | result += sum; | 113 | result += (__force u32)sum; |
114 | if(sum > result) | 114 | if ((__force u32)sum > result) |
115 | result += 1; | 115 | result += 1; |
116 | return result; | 116 | return (__force __wsum)result; |
117 | } | 117 | } |
118 | 118 | ||
119 | EXPORT_SYMBOL(csum_partial); | 119 | EXPORT_SYMBOL(csum_partial); |
@@ -121,8 +121,8 @@ EXPORT_SYMBOL(csum_partial); | |||
121 | /* | 121 | /* |
122 | * copy while checksumming, otherwise like csum_partial | 122 | * copy while checksumming, otherwise like csum_partial |
123 | */ | 123 | */ |
124 | unsigned int csum_partial_copy(const unsigned char *src, unsigned char *dst, | 124 | __wsum csum_partial_copy_nocheck(const void *src, void *dst, |
125 | int len, unsigned int sum) | 125 | int len, __wsum sum) |
126 | { | 126 | { |
127 | /* | 127 | /* |
128 | * It's 2:30 am and I don't feel like doing it real ... | 128 | * It's 2:30 am and I don't feel like doing it real ... |
@@ -138,9 +138,9 @@ unsigned int csum_partial_copy(const unsigned char *src, unsigned char *dst, | |||
138 | * Copy from userspace and compute checksum. If we catch an exception | 138 | * Copy from userspace and compute checksum. If we catch an exception |
139 | * then zero the rest of the buffer. | 139 | * then zero the rest of the buffer. |
140 | */ | 140 | */ |
141 | unsigned int csum_partial_copy_from_user (const unsigned char *src, | 141 | __wsum csum_partial_copy_from_user (const void *src, |
142 | unsigned char *dst, | 142 | void *dst, |
143 | int len, unsigned int sum, | 143 | int len, __wsum sum, |
144 | int *err_ptr) | 144 | int *err_ptr) |
145 | { | 145 | { |
146 | int missing; | 146 | int missing; |
diff --git a/arch/x86_64/kernel/early_printk.c b/arch/x86_64/kernel/early_printk.c index e22ecd54870d..47b6d90349da 100644 --- a/arch/x86_64/kernel/early_printk.c +++ b/arch/x86_64/kernel/early_printk.c | |||
@@ -224,7 +224,7 @@ static int __init setup_early_printk(char *buf) | |||
224 | return 0; | 224 | return 0; |
225 | early_console_initialized = 1; | 225 | early_console_initialized = 1; |
226 | 226 | ||
227 | if (!strcmp(buf,"keep")) | 227 | if (strstr(buf, "keep")) |
228 | keep_early = 1; | 228 | keep_early = 1; |
229 | 229 | ||
230 | if (!strncmp(buf, "serial", 6)) { | 230 | if (!strncmp(buf, "serial", 6)) { |
diff --git a/arch/x86_64/kernel/io_apic.c b/arch/x86_64/kernel/io_apic.c index 14654e682411..c80081a6ba41 100644 --- a/arch/x86_64/kernel/io_apic.c +++ b/arch/x86_64/kernel/io_apic.c | |||
@@ -754,10 +754,8 @@ void __setup_vector_irq(int cpu) | |||
754 | { | 754 | { |
755 | /* Initialize vector_irq on a new cpu */ | 755 | /* Initialize vector_irq on a new cpu */ |
756 | /* This function must be called with vector_lock held */ | 756 | /* This function must be called with vector_lock held */ |
757 | unsigned long flags; | ||
758 | int irq, vector; | 757 | int irq, vector; |
759 | 758 | ||
760 | |||
761 | /* Mark the inuse vectors */ | 759 | /* Mark the inuse vectors */ |
762 | for (irq = 0; irq < NR_IRQ_VECTORS; ++irq) { | 760 | for (irq = 0; irq < NR_IRQ_VECTORS; ++irq) { |
763 | if (!cpu_isset(cpu, irq_domain[irq])) | 761 | if (!cpu_isset(cpu, irq_domain[irq])) |
diff --git a/arch/x86_64/kernel/traps.c b/arch/x86_64/kernel/traps.c index a153d0a01b72..0d65b22f229c 100644 --- a/arch/x86_64/kernel/traps.c +++ b/arch/x86_64/kernel/traps.c | |||
@@ -242,12 +242,19 @@ static int dump_trace_unwind(struct unwind_frame_info *info, void *context) | |||
242 | * severe exception (double fault, nmi, stack fault, debug, mce) hardware stack | 242 | * severe exception (double fault, nmi, stack fault, debug, mce) hardware stack |
243 | */ | 243 | */ |
244 | 244 | ||
245 | static inline int valid_stack_ptr(struct thread_info *tinfo, void *p) | ||
246 | { | ||
247 | void *t = (void *)tinfo; | ||
248 | return p > t && p < t + THREAD_SIZE - 3; | ||
249 | } | ||
250 | |||
245 | void dump_trace(struct task_struct *tsk, struct pt_regs *regs, unsigned long * stack, | 251 | void dump_trace(struct task_struct *tsk, struct pt_regs *regs, unsigned long * stack, |
246 | struct stacktrace_ops *ops, void *data) | 252 | struct stacktrace_ops *ops, void *data) |
247 | { | 253 | { |
248 | const unsigned cpu = smp_processor_id(); | 254 | const unsigned cpu = smp_processor_id(); |
249 | unsigned long *irqstack_end = (unsigned long *)cpu_pda(cpu)->irqstackptr; | 255 | unsigned long *irqstack_end = (unsigned long *)cpu_pda(cpu)->irqstackptr; |
250 | unsigned used = 0; | 256 | unsigned used = 0; |
257 | struct thread_info *tinfo; | ||
251 | 258 | ||
252 | if (!tsk) | 259 | if (!tsk) |
253 | tsk = current; | 260 | tsk = current; |
@@ -370,7 +377,8 @@ void dump_trace(struct task_struct *tsk, struct pt_regs *regs, unsigned long * s | |||
370 | /* | 377 | /* |
371 | * This handles the process stack: | 378 | * This handles the process stack: |
372 | */ | 379 | */ |
373 | HANDLE_STACK (((long) stack & (THREAD_SIZE-1)) != 0); | 380 | tinfo = current_thread_info(); |
381 | HANDLE_STACK (valid_stack_ptr(tinfo, stack)); | ||
374 | #undef HANDLE_STACK | 382 | #undef HANDLE_STACK |
375 | } | 383 | } |
376 | EXPORT_SYMBOL(dump_trace); | 384 | EXPORT_SYMBOL(dump_trace); |
diff --git a/arch/x86_64/lib/csum-partial.c b/arch/x86_64/lib/csum-partial.c index c493735218da..06ae630de82b 100644 --- a/arch/x86_64/lib/csum-partial.c +++ b/arch/x86_64/lib/csum-partial.c | |||
@@ -132,9 +132,10 @@ static __force_inline unsigned do_csum(const unsigned char *buff, unsigned len) | |||
132 | * | 132 | * |
133 | * it's best to have buff aligned on a 64-bit boundary | 133 | * it's best to have buff aligned on a 64-bit boundary |
134 | */ | 134 | */ |
135 | unsigned csum_partial(const unsigned char *buff, unsigned len, unsigned sum) | 135 | __wsum csum_partial(const void *buff, int len, __wsum sum) |
136 | { | 136 | { |
137 | return add32_with_carry(do_csum(buff, len), sum); | 137 | return (__force __wsum)add32_with_carry(do_csum(buff, len), |
138 | (__force u32)sum); | ||
138 | } | 139 | } |
139 | 140 | ||
140 | EXPORT_SYMBOL(csum_partial); | 141 | EXPORT_SYMBOL(csum_partial); |
@@ -143,7 +144,7 @@ EXPORT_SYMBOL(csum_partial); | |||
143 | * this routine is used for miscellaneous IP-like checksums, mainly | 144 | * this routine is used for miscellaneous IP-like checksums, mainly |
144 | * in icmp.c | 145 | * in icmp.c |
145 | */ | 146 | */ |
146 | unsigned short ip_compute_csum(unsigned char * buff, int len) | 147 | __sum16 ip_compute_csum(const void *buff, int len) |
147 | { | 148 | { |
148 | return csum_fold(csum_partial(buff,len,0)); | 149 | return csum_fold(csum_partial(buff,len,0)); |
149 | } | 150 | } |
diff --git a/arch/x86_64/lib/csum-wrappers.c b/arch/x86_64/lib/csum-wrappers.c index b1320ec58428..fd42a4a095fc 100644 --- a/arch/x86_64/lib/csum-wrappers.c +++ b/arch/x86_64/lib/csum-wrappers.c | |||
@@ -18,9 +18,9 @@ | |||
18 | * Returns an 32bit unfolded checksum of the buffer. | 18 | * Returns an 32bit unfolded checksum of the buffer. |
19 | * src and dst are best aligned to 64bits. | 19 | * src and dst are best aligned to 64bits. |
20 | */ | 20 | */ |
21 | unsigned int | 21 | __wsum |
22 | csum_partial_copy_from_user(const unsigned char __user *src, unsigned char *dst, | 22 | csum_partial_copy_from_user(const void __user *src, void *dst, |
23 | int len, unsigned int isum, int *errp) | 23 | int len, __wsum isum, int *errp) |
24 | { | 24 | { |
25 | might_sleep(); | 25 | might_sleep(); |
26 | *errp = 0; | 26 | *errp = 0; |
@@ -34,17 +34,19 @@ csum_partial_copy_from_user(const unsigned char __user *src, unsigned char *dst, | |||
34 | if (unlikely((unsigned long)src & 6)) { | 34 | if (unlikely((unsigned long)src & 6)) { |
35 | while (((unsigned long)src & 6) && len >= 2) { | 35 | while (((unsigned long)src & 6) && len >= 2) { |
36 | __u16 val16; | 36 | __u16 val16; |
37 | *errp = __get_user(val16, (__u16 __user *)src); | 37 | *errp = __get_user(val16, (const __u16 __user *)src); |
38 | if (*errp) | 38 | if (*errp) |
39 | return isum; | 39 | return isum; |
40 | *(__u16 *)dst = val16; | 40 | *(__u16 *)dst = val16; |
41 | isum = add32_with_carry(isum, val16); | 41 | isum = (__force __wsum)add32_with_carry( |
42 | (__force unsigned)isum, val16); | ||
42 | src += 2; | 43 | src += 2; |
43 | dst += 2; | 44 | dst += 2; |
44 | len -= 2; | 45 | len -= 2; |
45 | } | 46 | } |
46 | } | 47 | } |
47 | isum = csum_partial_copy_generic((__force void *)src,dst,len,isum,errp,NULL); | 48 | isum = csum_partial_copy_generic((__force const void *)src, |
49 | dst, len, isum, errp, NULL); | ||
48 | if (likely(*errp == 0)) | 50 | if (likely(*errp == 0)) |
49 | return isum; | 51 | return isum; |
50 | } | 52 | } |
@@ -66,9 +68,9 @@ EXPORT_SYMBOL(csum_partial_copy_from_user); | |||
66 | * Returns an 32bit unfolded checksum of the buffer. | 68 | * Returns an 32bit unfolded checksum of the buffer. |
67 | * src and dst are best aligned to 64bits. | 69 | * src and dst are best aligned to 64bits. |
68 | */ | 70 | */ |
69 | unsigned int | 71 | __wsum |
70 | csum_partial_copy_to_user(unsigned const char *src, unsigned char __user *dst, | 72 | csum_partial_copy_to_user(const void *src, void __user *dst, |
71 | int len, unsigned int isum, int *errp) | 73 | int len, __wsum isum, int *errp) |
72 | { | 74 | { |
73 | might_sleep(); | 75 | might_sleep(); |
74 | if (unlikely(!access_ok(VERIFY_WRITE, dst, len))) { | 76 | if (unlikely(!access_ok(VERIFY_WRITE, dst, len))) { |
@@ -79,7 +81,8 @@ csum_partial_copy_to_user(unsigned const char *src, unsigned char __user *dst, | |||
79 | if (unlikely((unsigned long)dst & 6)) { | 81 | if (unlikely((unsigned long)dst & 6)) { |
80 | while (((unsigned long)dst & 6) && len >= 2) { | 82 | while (((unsigned long)dst & 6) && len >= 2) { |
81 | __u16 val16 = *(__u16 *)src; | 83 | __u16 val16 = *(__u16 *)src; |
82 | isum = add32_with_carry(isum, val16); | 84 | isum = (__force __wsum)add32_with_carry( |
85 | (__force unsigned)isum, val16); | ||
83 | *errp = __put_user(val16, (__u16 __user *)dst); | 86 | *errp = __put_user(val16, (__u16 __user *)dst); |
84 | if (*errp) | 87 | if (*errp) |
85 | return isum; | 88 | return isum; |
@@ -104,19 +107,21 @@ EXPORT_SYMBOL(csum_partial_copy_to_user); | |||
104 | * | 107 | * |
105 | * Returns an 32bit unfolded checksum of the buffer. | 108 | * Returns an 32bit unfolded checksum of the buffer. |
106 | */ | 109 | */ |
107 | unsigned int | 110 | __wsum |
108 | csum_partial_copy_nocheck(const unsigned char *src, unsigned char *dst, int len, unsigned int sum) | 111 | csum_partial_copy_nocheck(const void *src, void *dst, int len, __wsum sum) |
109 | { | 112 | { |
110 | return csum_partial_copy_generic(src,dst,len,sum,NULL,NULL); | 113 | return csum_partial_copy_generic(src,dst,len,sum,NULL,NULL); |
111 | } | 114 | } |
112 | EXPORT_SYMBOL(csum_partial_copy_nocheck); | 115 | EXPORT_SYMBOL(csum_partial_copy_nocheck); |
113 | 116 | ||
114 | unsigned short csum_ipv6_magic(struct in6_addr *saddr, struct in6_addr *daddr, | 117 | __sum16 csum_ipv6_magic(const struct in6_addr *saddr, |
115 | __u32 len, unsigned short proto, unsigned int sum) | 118 | const struct in6_addr *daddr, |
119 | __u32 len, unsigned short proto, __wsum sum) | ||
116 | { | 120 | { |
117 | __u64 rest, sum64; | 121 | __u64 rest, sum64; |
118 | 122 | ||
119 | rest = (__u64)htonl(len) + (__u64)htons(proto) + (__u64)sum; | 123 | rest = (__force __u64)htonl(len) + (__force __u64)htons(proto) + |
124 | (__force __u64)sum; | ||
120 | asm(" addq (%[saddr]),%[sum]\n" | 125 | asm(" addq (%[saddr]),%[sum]\n" |
121 | " adcq 8(%[saddr]),%[sum]\n" | 126 | " adcq 8(%[saddr]),%[sum]\n" |
122 | " adcq (%[daddr]),%[sum]\n" | 127 | " adcq (%[daddr]),%[sum]\n" |
@@ -124,7 +129,7 @@ unsigned short csum_ipv6_magic(struct in6_addr *saddr, struct in6_addr *daddr, | |||
124 | " adcq $0,%[sum]\n" | 129 | " adcq $0,%[sum]\n" |
125 | : [sum] "=r" (sum64) | 130 | : [sum] "=r" (sum64) |
126 | : "[sum]" (rest),[saddr] "r" (saddr), [daddr] "r" (daddr)); | 131 | : "[sum]" (rest),[saddr] "r" (saddr), [daddr] "r" (daddr)); |
127 | return csum_fold(add32_with_carry(sum64 & 0xffffffff, sum64>>32)); | 132 | return csum_fold((__force __wsum)add32_with_carry(sum64 & 0xffffffff, sum64>>32)); |
128 | } | 133 | } |
129 | 134 | ||
130 | EXPORT_SYMBOL(csum_ipv6_magic); | 135 | EXPORT_SYMBOL(csum_ipv6_magic); |