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authorZhang Wei <wei.zhang@freescale.com>2008-04-18 16:33:44 -0400
committerPaul Mackerras <paulus@samba.org>2008-04-29 05:40:29 -0400
commit7f620df839661b37ee679402ced7e32da6aa5446 (patch)
tree016052cb8076c1a31b0e290d5ed267518a809ad7 /arch
parent61b269179df582bb363f871e88f732fe8af62a5e (diff)
[RAPIDIO] Add RapidIO connection info print out and re-training for broken connections
Signed-off-by: Zhang Wei <wei.zhang@freescale.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/powerpc/sysdev/fsl_rio.c71
1 files changed, 71 insertions, 0 deletions
diff --git a/arch/powerpc/sysdev/fsl_rio.c b/arch/powerpc/sysdev/fsl_rio.c
index 935822a25030..dca8eead3967 100644
--- a/arch/powerpc/sysdev/fsl_rio.c
+++ b/arch/powerpc/sysdev/fsl_rio.c
@@ -942,6 +942,48 @@ static int fsl_rio_get_cmdline(char *s)
942 942
943__setup("riohdid=", fsl_rio_get_cmdline); 943__setup("riohdid=", fsl_rio_get_cmdline);
944 944
945static inline void fsl_rio_info(struct device *dev, u32 ccsr)
946{
947 const char *str;
948 if (ccsr & 1) {
949 /* Serial phy */
950 switch (ccsr >> 30) {
951 case 0:
952 str = "1";
953 break;
954 case 1:
955 str = "4";
956 break;
957 default:
958 str = "Unknown";
959 break;;
960 }
961 dev_info(dev, "Hardware port width: %s\n", str);
962
963 switch ((ccsr >> 27) & 7) {
964 case 0:
965 str = "Single-lane 0";
966 break;
967 case 1:
968 str = "Single-lane 2";
969 break;
970 case 2:
971 str = "Four-lane";
972 break;
973 default:
974 str = "Unknown";
975 break;
976 }
977 dev_info(dev, "Training connection status: %s\n", str);
978 } else {
979 /* Parallel phy */
980 if (!(ccsr & 0x80000000))
981 dev_info(dev, "Output port operating in 8-bit mode\n");
982 if (!(ccsr & 0x08000000))
983 dev_info(dev, "Input port operating in 8-bit mode\n");
984 }
985}
986
945/** 987/**
946 * fsl_rio_setup - Setup MPC85xx RapidIO interface 988 * fsl_rio_setup - Setup MPC85xx RapidIO interface
947 * @fsl_rio_setup - Setup Freescale PowerPC RapidIO interface 989 * @fsl_rio_setup - Setup Freescale PowerPC RapidIO interface
@@ -1055,6 +1097,35 @@ int fsl_rio_setup(struct of_device *dev)
1055 (port->phy_type == RIO_PHY_PARALLEL) ? "parallel" : 1097 (port->phy_type == RIO_PHY_PARALLEL) ? "parallel" :
1056 ((port->phy_type == RIO_PHY_SERIAL) ? "serial" : 1098 ((port->phy_type == RIO_PHY_SERIAL) ? "serial" :
1057 "unknown")); 1099 "unknown"));
1100 /* Checking the port training status */
1101 if (in_be32((priv->regs_win + RIO_ESCSR)) & 1) {
1102 dev_err(&dev->dev, "Port is not ready. "
1103 "Try to restart connection...\n");
1104 switch (port->phy_type) {
1105 case RIO_PHY_SERIAL:
1106 /* Disable ports */
1107 out_be32(priv->regs_win + RIO_CCSR, 0);
1108 /* Set 1x lane */
1109 setbits32(priv->regs_win + RIO_CCSR, 0x02000000);
1110 /* Enable ports */
1111 setbits32(priv->regs_win + RIO_CCSR, 0x00600000);
1112 break;
1113 case RIO_PHY_PARALLEL:
1114 /* Disable ports */
1115 out_be32(priv->regs_win + RIO_CCSR, 0x22000000);
1116 /* Enable ports */
1117 out_be32(priv->regs_win + RIO_CCSR, 0x44000000);
1118 break;
1119 }
1120 msleep(100);
1121 if (in_be32((priv->regs_win + RIO_ESCSR)) & 1) {
1122 dev_err(&dev->dev, "Port restart failed.\n");
1123 rc = -ENOLINK;
1124 goto err;
1125 }
1126 dev_info(&dev->dev, "Port restart success!\n");
1127 }
1128 fsl_rio_info(&dev->dev, ccsr);
1058 1129
1059 port->sys_size = (in_be32((priv->regs_win + RIO_PEF_CAR)) 1130 port->sys_size = (in_be32((priv->regs_win + RIO_PEF_CAR))
1060 & RIO_PEF_CTLS) >> 4; 1131 & RIO_PEF_CTLS) >> 4;