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author | Linus Torvalds <torvalds@g5.osdl.org> | 2006-02-28 12:14:09 -0500 |
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committer | Linus Torvalds <torvalds@g5.osdl.org> | 2006-02-28 12:14:09 -0500 |
commit | b9756c047ce6b60e3b96aa3c5db958acbdacedde (patch) | |
tree | 734a96bc44fc9d239935934551d7cba4658a1635 /arch | |
parent | b54633056d626590f32912540500c8c20ce6d520 (diff) | |
parent | 778e2ac5970e445f8c6b7d8aa597ac162afe270a (diff) |
Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
Diffstat (limited to 'arch')
-rw-r--r-- | arch/mips/lib/iomap.c | 2 | ||||
-rw-r--r-- | arch/mips/mm/c-r4k.c | 16 |
2 files changed, 12 insertions, 6 deletions
diff --git a/arch/mips/lib/iomap.c b/arch/mips/lib/iomap.c index 7e2ced715cfb..f4ac5bbcd81f 100644 --- a/arch/mips/lib/iomap.c +++ b/arch/mips/lib/iomap.c | |||
@@ -63,7 +63,7 @@ void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen) | |||
63 | return ioport_map(start, len); | 63 | return ioport_map(start, len); |
64 | if (flags & IORESOURCE_MEM) { | 64 | if (flags & IORESOURCE_MEM) { |
65 | if (flags & IORESOURCE_CACHEABLE) | 65 | if (flags & IORESOURCE_CACHEABLE) |
66 | return ioremap_cacheable_cow(start, len); | 66 | return ioremap_cachable(start, len); |
67 | return ioremap_nocache(start, len); | 67 | return ioremap_nocache(start, len); |
68 | } | 68 | } |
69 | 69 | ||
diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c index 1b71d91e8268..0668e9bfce41 100644 --- a/arch/mips/mm/c-r4k.c +++ b/arch/mips/mm/c-r4k.c | |||
@@ -235,7 +235,9 @@ static inline void r4k_blast_scache_page_setup(void) | |||
235 | { | 235 | { |
236 | unsigned long sc_lsize = cpu_scache_line_size(); | 236 | unsigned long sc_lsize = cpu_scache_line_size(); |
237 | 237 | ||
238 | if (sc_lsize == 16) | 238 | if (scache_size == 0) |
239 | r4k_blast_scache_page = (void *)no_sc_noop; | ||
240 | else if (sc_lsize == 16) | ||
239 | r4k_blast_scache_page = blast_scache16_page; | 241 | r4k_blast_scache_page = blast_scache16_page; |
240 | else if (sc_lsize == 32) | 242 | else if (sc_lsize == 32) |
241 | r4k_blast_scache_page = blast_scache32_page; | 243 | r4k_blast_scache_page = blast_scache32_page; |
@@ -251,7 +253,9 @@ static inline void r4k_blast_scache_page_indexed_setup(void) | |||
251 | { | 253 | { |
252 | unsigned long sc_lsize = cpu_scache_line_size(); | 254 | unsigned long sc_lsize = cpu_scache_line_size(); |
253 | 255 | ||
254 | if (sc_lsize == 16) | 256 | if (scache_size == 0) |
257 | r4k_blast_scache_page_indexed = (void *)no_sc_noop; | ||
258 | else if (sc_lsize == 16) | ||
255 | r4k_blast_scache_page_indexed = blast_scache16_page_indexed; | 259 | r4k_blast_scache_page_indexed = blast_scache16_page_indexed; |
256 | else if (sc_lsize == 32) | 260 | else if (sc_lsize == 32) |
257 | r4k_blast_scache_page_indexed = blast_scache32_page_indexed; | 261 | r4k_blast_scache_page_indexed = blast_scache32_page_indexed; |
@@ -267,7 +271,9 @@ static inline void r4k_blast_scache_setup(void) | |||
267 | { | 271 | { |
268 | unsigned long sc_lsize = cpu_scache_line_size(); | 272 | unsigned long sc_lsize = cpu_scache_line_size(); |
269 | 273 | ||
270 | if (sc_lsize == 16) | 274 | if (scache_size == 0) |
275 | r4k_blast_scache = (void *)no_sc_noop; | ||
276 | else if (sc_lsize == 16) | ||
271 | r4k_blast_scache = blast_scache16; | 277 | r4k_blast_scache = blast_scache16; |
272 | else if (sc_lsize == 32) | 278 | else if (sc_lsize == 32) |
273 | r4k_blast_scache = blast_scache32; | 279 | r4k_blast_scache = blast_scache32; |
@@ -482,7 +488,7 @@ static inline void local_r4k_flush_icache_range(void *args) | |||
482 | protected_blast_dcache_range(start, end); | 488 | protected_blast_dcache_range(start, end); |
483 | } | 489 | } |
484 | 490 | ||
485 | if (!cpu_icache_snoops_remote_store) { | 491 | if (!cpu_icache_snoops_remote_store && scache_size) { |
486 | if (end - start > scache_size) | 492 | if (end - start > scache_size) |
487 | r4k_blast_scache(); | 493 | r4k_blast_scache(); |
488 | else | 494 | else |
@@ -651,7 +657,7 @@ static void local_r4k_flush_cache_sigtramp(void * arg) | |||
651 | 657 | ||
652 | R4600_HIT_CACHEOP_WAR_IMPL; | 658 | R4600_HIT_CACHEOP_WAR_IMPL; |
653 | protected_writeback_dcache_line(addr & ~(dc_lsize - 1)); | 659 | protected_writeback_dcache_line(addr & ~(dc_lsize - 1)); |
654 | if (!cpu_icache_snoops_remote_store) | 660 | if (!cpu_icache_snoops_remote_store && scache_size) |
655 | protected_writeback_scache_line(addr & ~(sc_lsize - 1)); | 661 | protected_writeback_scache_line(addr & ~(sc_lsize - 1)); |
656 | protected_flush_icache_line(addr & ~(ic_lsize - 1)); | 662 | protected_flush_icache_line(addr & ~(ic_lsize - 1)); |
657 | if (MIPS4K_ICACHE_REFILL_WAR) { | 663 | if (MIPS4K_ICACHE_REFILL_WAR) { |