x86: remove the write-only timer_uses_ioapic_pin_0

This patch removes the write-only timer_uses_ioapic_pin_0
(gsi can't be <= 15 in the line of it's fake usage in mpparse_32.c).

Spotted by the GNU C compiler.

Signed-off-by: Adrian Bunk <bunk@kernel.org>
Signed-off-by: Ingo Molnar <mingo@elte.hu>

2 files changed, 1 insertions, 7 deletions

diff --git a/arch/x86/kernel/io_apic_32.c b/arch/x86/kernel/io_apic_32.c
index 0d70acd3b134..742fab45e1c6 100644
--- a/arch/x86/kernel/io_apic_32.c
+++ b/arch/x86/kernel/io_apic_32.c
@@ -2114,8 +2114,6 @@ static inline void unlock_ExtINT_logic(void)
         ioapic_write_entry(apic, pin, entry0);
 }
 
-int timer_uses_ioapic_pin_0;
-
 /*
  * This code may look a bit paranoid, but it's supposed to cooperate with
  * a wide range of boards and BIOS bugs.  Fortunately only the timer IRQ
@@ -2155,9 +2153,6 @@ static inline void __init check_timer(void)
         pin2  = ioapic_i8259.pin;
         apic2 = ioapic_i8259.apic;
 
-        if (pin1 == 0)
-                timer_uses_ioapic_pin_0 = 1;
-
         printk(KERN_INFO "..TIMER: vector=0x%02X apic1=%d pin1=%d apic2=%d pin2=%d\n",
                 vector, apic1, pin1, apic2, pin2);
 
diff --git a/arch/x86/kernel/mpparse_32.c b/arch/x86/kernel/mpparse_32.c
index 15dd87110298..15265ee11f89 100644
--- a/arch/x86/kernel/mpparse_32.c
+++ b/arch/x86/kernel/mpparse_32.c
@@ -1176,8 +1176,7 @@ int mp_register_gsi(u32 gsi, int triggering, int polarity)
                          * So test for this condition, and if necessary, avoid
                          * the pin collision.
                          */
-                        if (gsi > 15 || (gsi == 0 && !timer_uses_ioapic_pin_0))
-                                gsi = pci_irq++;
+                        gsi = pci_irq++;
                         /*
                          * Don't assign IRQ used by ACPI SCI
                          */