diff options
author | Sascha Hauer <s.hauer@pengutronix.de> | 2011-02-17 08:43:48 -0500 |
---|---|---|
committer | Sascha Hauer <s.hauer@pengutronix.de> | 2011-03-07 13:29:37 -0500 |
commit | 5ae30b477e9fb7319e2976fbf3521c0fac2625f1 (patch) | |
tree | e9c943a384e61b4552175e35a981bdf2316baba2 /arch | |
parent | 9685a3609d7f15297987c511c323b43693317960 (diff) |
ARM i.MX: Move gpio initialization to SoC specific files
This saves us from soc level dispatching in generic files
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/mach-imx/mm-imx1.c | 11 | ||||
-rw-r--r-- | arch/arm/mach-imx/mm-imx21.c | 13 | ||||
-rw-r--r-- | arch/arm/mach-imx/mm-imx25.c | 11 | ||||
-rw-r--r-- | arch/arm/mach-imx/mm-imx27.c | 13 | ||||
-rw-r--r-- | arch/arm/mach-mx3/mm.c | 20 | ||||
-rw-r--r-- | arch/arm/mach-mx5/mm-mx50.c | 13 | ||||
-rw-r--r-- | arch/arm/plat-mxc/gpio.c | 110 | ||||
-rw-r--r-- | arch/arm/plat-mxc/include/mach/gpio.h | 15 |
8 files changed, 82 insertions, 124 deletions
diff --git a/arch/arm/mach-imx/mm-imx1.c b/arch/arm/mach-imx/mm-imx1.c index 378c61b1e74c..8613e440e48c 100644 --- a/arch/arm/mach-imx/mm-imx1.c +++ b/arch/arm/mach-imx/mm-imx1.c | |||
@@ -23,6 +23,8 @@ | |||
23 | 23 | ||
24 | #include <mach/common.h> | 24 | #include <mach/common.h> |
25 | #include <mach/hardware.h> | 25 | #include <mach/hardware.h> |
26 | #include <mach/gpio.h> | ||
27 | #include <mach/irqs.h> | ||
26 | 28 | ||
27 | static struct map_desc imx_io_desc[] __initdata = { | 29 | static struct map_desc imx_io_desc[] __initdata = { |
28 | imx_map_entry(MX1, IO, MT_DEVICE), | 30 | imx_map_entry(MX1, IO, MT_DEVICE), |
@@ -39,10 +41,15 @@ void __init imx1_init_early(void) | |||
39 | mxc_arch_reset_init(MX1_IO_ADDRESS(MX1_WDT_BASE_ADDR)); | 41 | mxc_arch_reset_init(MX1_IO_ADDRESS(MX1_WDT_BASE_ADDR)); |
40 | } | 42 | } |
41 | 43 | ||
42 | int imx1_register_gpios(void); | 44 | static struct mxc_gpio_port imx1_gpio_ports[] = { |
45 | DEFINE_IMX_GPIO_PORT_IRQ(MX1, 0, 1, MX1_GPIO_INT_PORTA), | ||
46 | DEFINE_IMX_GPIO_PORT_IRQ(MX1, 1, 2, MX1_GPIO_INT_PORTB), | ||
47 | DEFINE_IMX_GPIO_PORT_IRQ(MX1, 2, 3, MX1_GPIO_INT_PORTC), | ||
48 | DEFINE_IMX_GPIO_PORT_IRQ(MX1, 3, 4, MX1_GPIO_INT_PORTD), | ||
49 | }; | ||
43 | 50 | ||
44 | void __init mx1_init_irq(void) | 51 | void __init mx1_init_irq(void) |
45 | { | 52 | { |
46 | mxc_init_irq(MX1_IO_ADDRESS(MX1_AVIC_BASE_ADDR)); | 53 | mxc_init_irq(MX1_IO_ADDRESS(MX1_AVIC_BASE_ADDR)); |
47 | imx1_register_gpios(); | 54 | mxc_gpio_init(imx1_gpio_ports, ARRAY_SIZE(imx1_gpio_ports)); |
48 | } | 55 | } |
diff --git a/arch/arm/mach-imx/mm-imx21.c b/arch/arm/mach-imx/mm-imx21.c index b6152c6b5b29..6027e35ebfdb 100644 --- a/arch/arm/mach-imx/mm-imx21.c +++ b/arch/arm/mach-imx/mm-imx21.c | |||
@@ -24,6 +24,8 @@ | |||
24 | #include <mach/common.h> | 24 | #include <mach/common.h> |
25 | #include <asm/pgtable.h> | 25 | #include <asm/pgtable.h> |
26 | #include <asm/mach/map.h> | 26 | #include <asm/mach/map.h> |
27 | #include <mach/gpio.h> | ||
28 | #include <mach/irqs.h> | ||
27 | 29 | ||
28 | /* MX21 memory map definition */ | 30 | /* MX21 memory map definition */ |
29 | static struct map_desc imx21_io_desc[] __initdata = { | 31 | static struct map_desc imx21_io_desc[] __initdata = { |
@@ -65,10 +67,17 @@ void __init imx21_init_early(void) | |||
65 | mxc_arch_reset_init(MX21_IO_ADDRESS(MX21_WDOG_BASE_ADDR)); | 67 | mxc_arch_reset_init(MX21_IO_ADDRESS(MX21_WDOG_BASE_ADDR)); |
66 | } | 68 | } |
67 | 69 | ||
68 | int imx21_register_gpios(void); | 70 | static struct mxc_gpio_port imx21_gpio_ports[] = { |
71 | DEFINE_IMX_GPIO_PORT_IRQ(MX21, 0, 1, MX21_INT_GPIO), | ||
72 | DEFINE_IMX_GPIO_PORT(MX21, 1, 2), | ||
73 | DEFINE_IMX_GPIO_PORT(MX21, 2, 3), | ||
74 | DEFINE_IMX_GPIO_PORT(MX21, 3, 4), | ||
75 | DEFINE_IMX_GPIO_PORT(MX21, 4, 5), | ||
76 | DEFINE_IMX_GPIO_PORT(MX21, 5, 6), | ||
77 | }; | ||
69 | 78 | ||
70 | void __init mx21_init_irq(void) | 79 | void __init mx21_init_irq(void) |
71 | { | 80 | { |
72 | mxc_init_irq(MX21_IO_ADDRESS(MX21_AVIC_BASE_ADDR)); | 81 | mxc_init_irq(MX21_IO_ADDRESS(MX21_AVIC_BASE_ADDR)); |
73 | imx21_register_gpios(); | 82 | mxc_gpio_init(imx21_gpio_ports, ARRAY_SIZE(imx21_gpio_ports)); |
74 | } | 83 | } |
diff --git a/arch/arm/mach-imx/mm-imx25.c b/arch/arm/mach-imx/mm-imx25.c index 09dd8d4e15bb..02f7b5c7fa8e 100644 --- a/arch/arm/mach-imx/mm-imx25.c +++ b/arch/arm/mach-imx/mm-imx25.c | |||
@@ -27,6 +27,8 @@ | |||
27 | #include <mach/hardware.h> | 27 | #include <mach/hardware.h> |
28 | #include <mach/mx25.h> | 28 | #include <mach/mx25.h> |
29 | #include <mach/iomux-v3.h> | 29 | #include <mach/iomux-v3.h> |
30 | #include <mach/gpio.h> | ||
31 | #include <mach/irqs.h> | ||
30 | 32 | ||
31 | /* | 33 | /* |
32 | * This table defines static virtual address mappings for I/O regions. | 34 | * This table defines static virtual address mappings for I/O regions. |
@@ -55,11 +57,16 @@ void __init imx25_init_early(void) | |||
55 | mxc_arch_reset_init(MX25_IO_ADDRESS(MX25_WDOG_BASE_ADDR)); | 57 | mxc_arch_reset_init(MX25_IO_ADDRESS(MX25_WDOG_BASE_ADDR)); |
56 | } | 58 | } |
57 | 59 | ||
58 | int imx25_register_gpios(void); | 60 | static struct mxc_gpio_port imx25_gpio_ports[] = { |
61 | DEFINE_IMX_GPIO_PORT_IRQ(MX25, 0, 1, MX25_INT_GPIO1), | ||
62 | DEFINE_IMX_GPIO_PORT_IRQ(MX25, 1, 2, MX25_INT_GPIO2), | ||
63 | DEFINE_IMX_GPIO_PORT_IRQ(MX25, 2, 3, MX25_INT_GPIO3), | ||
64 | DEFINE_IMX_GPIO_PORT_IRQ(MX25, 3, 4, MX25_INT_GPIO4), | ||
65 | }; | ||
59 | 66 | ||
60 | void __init mx25_init_irq(void) | 67 | void __init mx25_init_irq(void) |
61 | { | 68 | { |
62 | mxc_init_irq(MX25_IO_ADDRESS(MX25_AVIC_BASE_ADDR)); | 69 | mxc_init_irq(MX25_IO_ADDRESS(MX25_AVIC_BASE_ADDR)); |
63 | imx25_register_gpios(); | 70 | mxc_gpio_init(imx25_gpio_ports, ARRAY_SIZE(imx25_gpio_ports)); |
64 | } | 71 | } |
65 | 72 | ||
diff --git a/arch/arm/mach-imx/mm-imx27.c b/arch/arm/mach-imx/mm-imx27.c index bcaa3b69c456..e172e3ed3340 100644 --- a/arch/arm/mach-imx/mm-imx27.c +++ b/arch/arm/mach-imx/mm-imx27.c | |||
@@ -24,6 +24,8 @@ | |||
24 | #include <mach/common.h> | 24 | #include <mach/common.h> |
25 | #include <asm/pgtable.h> | 25 | #include <asm/pgtable.h> |
26 | #include <asm/mach/map.h> | 26 | #include <asm/mach/map.h> |
27 | #include <mach/gpio.h> | ||
28 | #include <mach/irqs.h> | ||
27 | 29 | ||
28 | /* MX27 memory map definition */ | 30 | /* MX27 memory map definition */ |
29 | static struct map_desc imx27_io_desc[] __initdata = { | 31 | static struct map_desc imx27_io_desc[] __initdata = { |
@@ -65,10 +67,17 @@ void __init imx27_init_early(void) | |||
65 | mxc_arch_reset_init(MX27_IO_ADDRESS(MX27_WDOG_BASE_ADDR)); | 67 | mxc_arch_reset_init(MX27_IO_ADDRESS(MX27_WDOG_BASE_ADDR)); |
66 | } | 68 | } |
67 | 69 | ||
68 | int imx27_register_gpios(void); | 70 | static struct mxc_gpio_port imx27_gpio_ports[] = { |
71 | DEFINE_IMX_GPIO_PORT_IRQ(MX27, 0, 1, MX27_INT_GPIO), | ||
72 | DEFINE_IMX_GPIO_PORT(MX27, 1, 2), | ||
73 | DEFINE_IMX_GPIO_PORT(MX27, 2, 3), | ||
74 | DEFINE_IMX_GPIO_PORT(MX27, 3, 4), | ||
75 | DEFINE_IMX_GPIO_PORT(MX27, 4, 5), | ||
76 | DEFINE_IMX_GPIO_PORT(MX27, 5, 6), | ||
77 | }; | ||
69 | 78 | ||
70 | void __init mx27_init_irq(void) | 79 | void __init mx27_init_irq(void) |
71 | { | 80 | { |
72 | mxc_init_irq(MX27_IO_ADDRESS(MX27_AVIC_BASE_ADDR)); | 81 | mxc_init_irq(MX27_IO_ADDRESS(MX27_AVIC_BASE_ADDR)); |
73 | imx27_register_gpios(); | 82 | mxc_gpio_init(imx27_gpio_ports, ARRAY_SIZE(imx27_gpio_ports)); |
74 | } | 83 | } |
diff --git a/arch/arm/mach-mx3/mm.c b/arch/arm/mach-mx3/mm.c index eefd4cf0a693..54d7174b4202 100644 --- a/arch/arm/mach-mx3/mm.c +++ b/arch/arm/mach-mx3/mm.c | |||
@@ -27,6 +27,8 @@ | |||
27 | #include <mach/common.h> | 27 | #include <mach/common.h> |
28 | #include <mach/hardware.h> | 28 | #include <mach/hardware.h> |
29 | #include <mach/iomux-v3.h> | 29 | #include <mach/iomux-v3.h> |
30 | #include <mach/gpio.h> | ||
31 | #include <mach/irqs.h> | ||
30 | 32 | ||
31 | #ifdef CONFIG_SOC_IMX31 | 33 | #ifdef CONFIG_SOC_IMX31 |
32 | static struct map_desc mx31_io_desc[] __initdata = { | 34 | static struct map_desc mx31_io_desc[] __initdata = { |
@@ -53,11 +55,16 @@ void __init imx31_init_early(void) | |||
53 | mxc_arch_reset_init(MX31_IO_ADDRESS(MX31_WDOG_BASE_ADDR)); | 55 | mxc_arch_reset_init(MX31_IO_ADDRESS(MX31_WDOG_BASE_ADDR)); |
54 | } | 56 | } |
55 | 57 | ||
56 | int imx31_register_gpios(void); | 58 | static struct mxc_gpio_port imx31_gpio_ports[] = { |
59 | DEFINE_IMX_GPIO_PORT_IRQ(MX31, 0, 1, MX31_INT_GPIO1), | ||
60 | DEFINE_IMX_GPIO_PORT_IRQ(MX31, 1, 2, MX31_INT_GPIO2), | ||
61 | DEFINE_IMX_GPIO_PORT_IRQ(MX31, 2, 3, MX31_INT_GPIO3), | ||
62 | }; | ||
63 | |||
57 | void __init mx31_init_irq(void) | 64 | void __init mx31_init_irq(void) |
58 | { | 65 | { |
59 | mxc_init_irq(MX31_IO_ADDRESS(MX31_AVIC_BASE_ADDR)); | 66 | mxc_init_irq(MX31_IO_ADDRESS(MX31_AVIC_BASE_ADDR)); |
60 | imx31_register_gpios(); | 67 | mxc_gpio_init(imx31_gpio_ports, ARRAY_SIZE(imx31_gpio_ports)); |
61 | } | 68 | } |
62 | #endif /* ifdef CONFIG_SOC_IMX31 */ | 69 | #endif /* ifdef CONFIG_SOC_IMX31 */ |
63 | 70 | ||
@@ -82,11 +89,16 @@ void __init imx35_init_early(void) | |||
82 | mxc_arch_reset_init(MX35_IO_ADDRESS(MX35_WDOG_BASE_ADDR)); | 89 | mxc_arch_reset_init(MX35_IO_ADDRESS(MX35_WDOG_BASE_ADDR)); |
83 | } | 90 | } |
84 | 91 | ||
85 | int imx35_register_gpios(void); | 92 | static struct mxc_gpio_port imx35_gpio_ports[] = { |
93 | DEFINE_IMX_GPIO_PORT_IRQ(MX35, 0, 1, MX35_INT_GPIO1), | ||
94 | DEFINE_IMX_GPIO_PORT_IRQ(MX35, 1, 2, MX35_INT_GPIO2), | ||
95 | DEFINE_IMX_GPIO_PORT_IRQ(MX35, 2, 3, MX35_INT_GPIO3), | ||
96 | }; | ||
97 | |||
86 | void __init mx35_init_irq(void) | 98 | void __init mx35_init_irq(void) |
87 | { | 99 | { |
88 | mxc_init_irq(MX35_IO_ADDRESS(MX35_AVIC_BASE_ADDR)); | 100 | mxc_init_irq(MX35_IO_ADDRESS(MX35_AVIC_BASE_ADDR)); |
89 | imx35_register_gpios(); | 101 | mxc_gpio_init(imx35_gpio_ports, ARRAY_SIZE(imx35_gpio_ports)); |
90 | } | 102 | } |
91 | #endif /* ifdef CONFIG_SOC_IMX35 */ | 103 | #endif /* ifdef CONFIG_SOC_IMX35 */ |
92 | 104 | ||
diff --git a/arch/arm/mach-mx5/mm-mx50.c b/arch/arm/mach-mx5/mm-mx50.c index 69b34269dae5..b9c363b514a9 100644 --- a/arch/arm/mach-mx5/mm-mx50.c +++ b/arch/arm/mach-mx5/mm-mx50.c | |||
@@ -26,6 +26,8 @@ | |||
26 | #include <mach/hardware.h> | 26 | #include <mach/hardware.h> |
27 | #include <mach/common.h> | 27 | #include <mach/common.h> |
28 | #include <mach/iomux-v3.h> | 28 | #include <mach/iomux-v3.h> |
29 | #include <mach/gpio.h> | ||
30 | #include <mach/irqs.h> | ||
29 | 31 | ||
30 | /* | 32 | /* |
31 | * Define the MX50 memory map. | 33 | * Define the MX50 memory map. |
@@ -54,10 +56,17 @@ void __init imx50_init_early(void) | |||
54 | mxc_arch_reset_init(MX50_IO_ADDRESS(MX50_WDOG_BASE_ADDR)); | 56 | mxc_arch_reset_init(MX50_IO_ADDRESS(MX50_WDOG_BASE_ADDR)); |
55 | } | 57 | } |
56 | 58 | ||
57 | int imx50_register_gpios(void); | 59 | static struct mxc_gpio_port imx50_gpio_ports[] = { |
60 | DEFINE_IMX_GPIO_PORT_IRQ_HIGH(MX50, 0, 1, MX50_INT_GPIO1_LOW, MX50_INT_GPIO1_HIGH), | ||
61 | DEFINE_IMX_GPIO_PORT_IRQ_HIGH(MX50, 1, 2, MX50_INT_GPIO2_LOW, MX50_INT_GPIO2_HIGH), | ||
62 | DEFINE_IMX_GPIO_PORT_IRQ_HIGH(MX50, 2, 3, MX50_INT_GPIO3_LOW, MX50_INT_GPIO3_HIGH), | ||
63 | DEFINE_IMX_GPIO_PORT_IRQ_HIGH(MX50, 3, 4, MX50_INT_GPIO3_LOW, MX50_INT_GPIO3_HIGH), | ||
64 | DEFINE_IMX_GPIO_PORT_IRQ_HIGH(MX50, 4, 5, MX50_INT_GPIO3_LOW, MX50_INT_GPIO3_HIGH), | ||
65 | DEFINE_IMX_GPIO_PORT_IRQ_HIGH(MX50, 5, 6, MX50_INT_GPIO3_LOW, MX50_INT_GPIO3_HIGH), | ||
66 | }; | ||
58 | 67 | ||
59 | void __init mx50_init_irq(void) | 68 | void __init mx50_init_irq(void) |
60 | { | 69 | { |
61 | tzic_init_irq(MX50_IO_ADDRESS(MX50_TZIC_BASE_ADDR)); | 70 | tzic_init_irq(MX50_IO_ADDRESS(MX50_TZIC_BASE_ADDR)); |
62 | imx50_register_gpios(); | 71 | mxc_gpio_init(imx50_gpio_ports, ARRAY_SIZE(imx50_gpio_ports)); |
63 | } | 72 | } |
diff --git a/arch/arm/plat-mxc/gpio.c b/arch/arm/plat-mxc/gpio.c index e396df8faef8..57d59855f9ec 100644 --- a/arch/arm/plat-mxc/gpio.c +++ b/arch/arm/plat-mxc/gpio.c | |||
@@ -350,113 +350,3 @@ int __init mxc_gpio_init(struct mxc_gpio_port *port, int cnt) | |||
350 | 350 | ||
351 | return 0; | 351 | return 0; |
352 | } | 352 | } |
353 | |||
354 | #define DEFINE_IMX_GPIO_PORT_IRQ_HIGH(soc, _id, _hwid, _irq, _irq_high) \ | ||
355 | { \ | ||
356 | .chip.label = "gpio-" #_id, \ | ||
357 | .irq = _irq, \ | ||
358 | .irq_high = _irq_high, \ | ||
359 | .base = soc ## _IO_ADDRESS( \ | ||
360 | soc ## _GPIO ## _hwid ## _BASE_ADDR), \ | ||
361 | .virtual_irq_start = MXC_GPIO_IRQ_START + (_id) * 32, \ | ||
362 | } | ||
363 | |||
364 | #define DEFINE_IMX_GPIO_PORT_IRQ(soc, _id, _hwid, _irq) \ | ||
365 | DEFINE_IMX_GPIO_PORT_IRQ_HIGH(soc, _id, _hwid, _irq, 0) | ||
366 | #define DEFINE_IMX_GPIO_PORT(soc, _id, _hwid) \ | ||
367 | DEFINE_IMX_GPIO_PORT_IRQ(soc, _id, _hwid, 0) | ||
368 | |||
369 | #define DEFINE_REGISTER_FUNCTION(prefix) \ | ||
370 | int __init prefix ## _register_gpios(void) \ | ||
371 | { \ | ||
372 | return mxc_gpio_init(prefix ## _gpio_ports, \ | ||
373 | ARRAY_SIZE(prefix ## _gpio_ports)); \ | ||
374 | } | ||
375 | |||
376 | #if defined(CONFIG_SOC_IMX1) | ||
377 | static struct mxc_gpio_port imx1_gpio_ports[] = { | ||
378 | DEFINE_IMX_GPIO_PORT_IRQ(MX1, 0, 1, MX1_GPIO_INT_PORTA), | ||
379 | DEFINE_IMX_GPIO_PORT_IRQ(MX1, 1, 2, MX1_GPIO_INT_PORTB), | ||
380 | DEFINE_IMX_GPIO_PORT_IRQ(MX1, 2, 3, MX1_GPIO_INT_PORTC), | ||
381 | DEFINE_IMX_GPIO_PORT_IRQ(MX1, 3, 4, MX1_GPIO_INT_PORTD), | ||
382 | }; | ||
383 | |||
384 | DEFINE_REGISTER_FUNCTION(imx1) | ||
385 | |||
386 | #endif /* if defined(CONFIG_SOC_IMX1) */ | ||
387 | |||
388 | #if defined(CONFIG_SOC_IMX21) | ||
389 | static struct mxc_gpio_port imx21_gpio_ports[] = { | ||
390 | DEFINE_IMX_GPIO_PORT_IRQ(MX21, 0, 1, MX21_INT_GPIO), | ||
391 | DEFINE_IMX_GPIO_PORT(MX21, 1, 2), | ||
392 | DEFINE_IMX_GPIO_PORT(MX21, 2, 3), | ||
393 | DEFINE_IMX_GPIO_PORT(MX21, 3, 4), | ||
394 | DEFINE_IMX_GPIO_PORT(MX21, 4, 5), | ||
395 | DEFINE_IMX_GPIO_PORT(MX21, 5, 6), | ||
396 | }; | ||
397 | |||
398 | DEFINE_REGISTER_FUNCTION(imx21) | ||
399 | |||
400 | #endif /* if defined(CONFIG_SOC_IMX21) */ | ||
401 | |||
402 | #if defined(CONFIG_SOC_IMX25) | ||
403 | static struct mxc_gpio_port imx25_gpio_ports[] = { | ||
404 | DEFINE_IMX_GPIO_PORT_IRQ(MX25, 0, 1, MX25_INT_GPIO1), | ||
405 | DEFINE_IMX_GPIO_PORT_IRQ(MX25, 1, 2, MX25_INT_GPIO2), | ||
406 | DEFINE_IMX_GPIO_PORT_IRQ(MX25, 2, 3, MX25_INT_GPIO3), | ||
407 | DEFINE_IMX_GPIO_PORT_IRQ(MX25, 3, 4, MX25_INT_GPIO4), | ||
408 | }; | ||
409 | |||
410 | DEFINE_REGISTER_FUNCTION(imx25) | ||
411 | |||
412 | #endif /* if defined(CONFIG_SOC_IMX25) */ | ||
413 | |||
414 | #if defined(CONFIG_SOC_IMX27) | ||
415 | static struct mxc_gpio_port imx27_gpio_ports[] = { | ||
416 | DEFINE_IMX_GPIO_PORT_IRQ(MX27, 0, 1, MX27_INT_GPIO), | ||
417 | DEFINE_IMX_GPIO_PORT(MX27, 1, 2), | ||
418 | DEFINE_IMX_GPIO_PORT(MX27, 2, 3), | ||
419 | DEFINE_IMX_GPIO_PORT(MX27, 3, 4), | ||
420 | DEFINE_IMX_GPIO_PORT(MX27, 4, 5), | ||
421 | DEFINE_IMX_GPIO_PORT(MX27, 5, 6), | ||
422 | }; | ||
423 | |||
424 | DEFINE_REGISTER_FUNCTION(imx27) | ||
425 | |||
426 | #endif /* if defined(CONFIG_SOC_IMX27) */ | ||
427 | |||
428 | #if defined(CONFIG_SOC_IMX31) | ||
429 | static struct mxc_gpio_port imx31_gpio_ports[] = { | ||
430 | DEFINE_IMX_GPIO_PORT_IRQ(MX31, 0, 1, MX31_INT_GPIO1), | ||
431 | DEFINE_IMX_GPIO_PORT_IRQ(MX31, 1, 2, MX31_INT_GPIO2), | ||
432 | DEFINE_IMX_GPIO_PORT_IRQ(MX31, 2, 3, MX31_INT_GPIO3), | ||
433 | }; | ||
434 | |||
435 | DEFINE_REGISTER_FUNCTION(imx31) | ||
436 | |||
437 | #endif /* if defined(CONFIG_SOC_IMX31) */ | ||
438 | |||
439 | #if defined(CONFIG_SOC_IMX35) | ||
440 | static struct mxc_gpio_port imx35_gpio_ports[] = { | ||
441 | DEFINE_IMX_GPIO_PORT_IRQ(MX35, 0, 1, MX35_INT_GPIO1), | ||
442 | DEFINE_IMX_GPIO_PORT_IRQ(MX35, 1, 2, MX35_INT_GPIO2), | ||
443 | DEFINE_IMX_GPIO_PORT_IRQ(MX35, 2, 3, MX35_INT_GPIO3), | ||
444 | }; | ||
445 | |||
446 | DEFINE_REGISTER_FUNCTION(imx35) | ||
447 | |||
448 | #endif /* if defined(CONFIG_SOC_IMX35) */ | ||
449 | |||
450 | #if defined(CONFIG_SOC_IMX50) | ||
451 | static struct mxc_gpio_port imx50_gpio_ports[] = { | ||
452 | DEFINE_IMX_GPIO_PORT_IRQ_HIGH(MX50, 0, 1, MX50_INT_GPIO1_LOW, MX50_INT_GPIO1_HIGH), | ||
453 | DEFINE_IMX_GPIO_PORT_IRQ_HIGH(MX50, 1, 2, MX50_INT_GPIO2_LOW, MX50_INT_GPIO2_HIGH), | ||
454 | DEFINE_IMX_GPIO_PORT_IRQ_HIGH(MX50, 2, 3, MX50_INT_GPIO3_LOW, MX50_INT_GPIO3_HIGH), | ||
455 | DEFINE_IMX_GPIO_PORT_IRQ_HIGH(MX50, 3, 4, MX50_INT_GPIO3_LOW, MX50_INT_GPIO3_HIGH), | ||
456 | DEFINE_IMX_GPIO_PORT_IRQ_HIGH(MX50, 4, 5, MX50_INT_GPIO3_LOW, MX50_INT_GPIO3_HIGH), | ||
457 | DEFINE_IMX_GPIO_PORT_IRQ_HIGH(MX50, 5, 6, MX50_INT_GPIO3_LOW, MX50_INT_GPIO3_HIGH), | ||
458 | }; | ||
459 | |||
460 | DEFINE_REGISTER_FUNCTION(imx50) | ||
461 | |||
462 | #endif /* if defined(CONFIG_SOC_IMX50) */ | ||
diff --git a/arch/arm/plat-mxc/include/mach/gpio.h b/arch/arm/plat-mxc/include/mach/gpio.h index 0044e2f1bea8..a2747f12813e 100644 --- a/arch/arm/plat-mxc/include/mach/gpio.h +++ b/arch/arm/plat-mxc/include/mach/gpio.h | |||
@@ -46,6 +46,21 @@ struct mxc_gpio_port { | |||
46 | spinlock_t lock; | 46 | spinlock_t lock; |
47 | }; | 47 | }; |
48 | 48 | ||
49 | #define DEFINE_IMX_GPIO_PORT_IRQ_HIGH(soc, _id, _hwid, _irq, _irq_high) \ | ||
50 | { \ | ||
51 | .chip.label = "gpio-" #_id, \ | ||
52 | .irq = _irq, \ | ||
53 | .irq_high = _irq_high, \ | ||
54 | .base = soc ## _IO_ADDRESS( \ | ||
55 | soc ## _GPIO ## _hwid ## _BASE_ADDR), \ | ||
56 | .virtual_irq_start = MXC_GPIO_IRQ_START + (_id) * 32, \ | ||
57 | } | ||
58 | |||
59 | #define DEFINE_IMX_GPIO_PORT_IRQ(soc, _id, _hwid, _irq) \ | ||
60 | DEFINE_IMX_GPIO_PORT_IRQ_HIGH(soc, _id, _hwid, _irq, 0) | ||
61 | #define DEFINE_IMX_GPIO_PORT(soc, _id, _hwid) \ | ||
62 | DEFINE_IMX_GPIO_PORT_IRQ(soc, _id, _hwid, 0) | ||
63 | |||
49 | int mxc_gpio_init(struct mxc_gpio_port*, int); | 64 | int mxc_gpio_init(struct mxc_gpio_port*, int); |
50 | 65 | ||
51 | #endif | 66 | #endif |