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author | Ingo Molnar <mingo@elte.hu> | 2008-11-07 13:22:10 -0500 |
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committer | Ingo Molnar <mingo@elte.hu> | 2008-11-07 13:22:10 -0500 |
commit | 01aab518b084a547940ed6ff334e9a7721c7dc71 (patch) | |
tree | 627f0c7e4833b1c563aba403a1f731fc7c4f3b0c /arch | |
parent | fed4d59b6ec5481caceb17863f19a0b0e5eaa939 (diff) | |
parent | 7c64ade53a6f977d73f16243865c42ceae999aea (diff) |
Merge branch 'oprofile-for-tip' of git://git.kernel.org/pub/scm/linux/kernel/git/rric/oprofile into x86/urgent
Diffstat (limited to 'arch')
-rw-r--r-- | arch/Kconfig | 2 | ||||
-rw-r--r-- | arch/x86/oprofile/op_model_ppro.c | 9 |
2 files changed, 5 insertions, 6 deletions
diff --git a/arch/Kconfig b/arch/Kconfig index e6ab550bceb3..8977d99987cb 100644 --- a/arch/Kconfig +++ b/arch/Kconfig | |||
@@ -21,7 +21,7 @@ config OPROFILE_IBS | |||
21 | Instruction-Based Sampling (IBS) is a new profiling | 21 | Instruction-Based Sampling (IBS) is a new profiling |
22 | technique that provides rich, precise program performance | 22 | technique that provides rich, precise program performance |
23 | information. IBS is introduced by AMD Family10h processors | 23 | information. IBS is introduced by AMD Family10h processors |
24 | (AMD Opteron Quad-Core processor “Barcelona”) to overcome | 24 | (AMD Opteron Quad-Core processor "Barcelona") to overcome |
25 | the limitations of conventional performance counter | 25 | the limitations of conventional performance counter |
26 | sampling. | 26 | sampling. |
27 | 27 | ||
diff --git a/arch/x86/oprofile/op_model_ppro.c b/arch/x86/oprofile/op_model_ppro.c index 0620d6d45f7d..3f1b81a83e2e 100644 --- a/arch/x86/oprofile/op_model_ppro.c +++ b/arch/x86/oprofile/op_model_ppro.c | |||
@@ -27,8 +27,7 @@ static int num_counters = 2; | |||
27 | static int counter_width = 32; | 27 | static int counter_width = 32; |
28 | 28 | ||
29 | #define CTR_IS_RESERVED(msrs, c) (msrs->counters[(c)].addr ? 1 : 0) | 29 | #define CTR_IS_RESERVED(msrs, c) (msrs->counters[(c)].addr ? 1 : 0) |
30 | #define CTR_READ(l, h, msrs, c) do {rdmsr(msrs->counters[(c)].addr, (l), (h)); } while (0) | 30 | #define CTR_OVERFLOWED(n) (!((n) & (1ULL<<(counter_width-1)))) |
31 | #define CTR_OVERFLOWED(n) (!((n) & (1U<<(counter_width-1)))) | ||
32 | 31 | ||
33 | #define CTRL_IS_RESERVED(msrs, c) (msrs->controls[(c)].addr ? 1 : 0) | 32 | #define CTRL_IS_RESERVED(msrs, c) (msrs->controls[(c)].addr ? 1 : 0) |
34 | #define CTRL_READ(l, h, msrs, c) do {rdmsr((msrs->controls[(c)].addr), (l), (h)); } while (0) | 33 | #define CTRL_READ(l, h, msrs, c) do {rdmsr((msrs->controls[(c)].addr), (l), (h)); } while (0) |
@@ -124,14 +123,14 @@ static void ppro_setup_ctrs(struct op_msrs const * const msrs) | |||
124 | static int ppro_check_ctrs(struct pt_regs * const regs, | 123 | static int ppro_check_ctrs(struct pt_regs * const regs, |
125 | struct op_msrs const * const msrs) | 124 | struct op_msrs const * const msrs) |
126 | { | 125 | { |
127 | unsigned int low, high; | 126 | u64 val; |
128 | int i; | 127 | int i; |
129 | 128 | ||
130 | for (i = 0 ; i < num_counters; ++i) { | 129 | for (i = 0 ; i < num_counters; ++i) { |
131 | if (!reset_value[i]) | 130 | if (!reset_value[i]) |
132 | continue; | 131 | continue; |
133 | CTR_READ(low, high, msrs, i); | 132 | rdmsrl(msrs->counters[i].addr, val); |
134 | if (CTR_OVERFLOWED(low)) { | 133 | if (CTR_OVERFLOWED(val)) { |
135 | oprofile_add_sample(regs, i); | 134 | oprofile_add_sample(regs, i); |
136 | wrmsrl(msrs->counters[i].addr, -reset_value[i]); | 135 | wrmsrl(msrs->counters[i].addr, -reset_value[i]); |
137 | } | 136 | } |