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authorRalf Baechle <ralf@linux-mips.org>2009-10-12 16:54:47 -0400
committerRalf Baechle <ralf@linux-mips.org>2009-11-02 06:00:04 -0500
commita951f2829adba3f2945172b740528fce4366907d (patch)
treea36449474bb1524bedbd1cc684cec7c474982bde /arch
parentc70887555143fdede9595df4c7a598676922f107 (diff)
MIPS: Malta: Enable PCI 2.1 compatibility in PIIX4
Based on original patch by Chris Dearman <chris@mips.com>. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/mips/mti-malta/malta-pci.c13
1 files changed, 13 insertions, 0 deletions
diff --git a/arch/mips/mti-malta/malta-pci.c b/arch/mips/mti-malta/malta-pci.c
index b9743190609a..efdb4f66ffcf 100644
--- a/arch/mips/mti-malta/malta-pci.c
+++ b/arch/mips/mti-malta/malta-pci.c
@@ -241,3 +241,16 @@ void __init mips_pcibios_init(void)
241 241
242 register_pci_controller(controller); 242 register_pci_controller(controller);
243} 243}
244
245/* Enable PCI 2.1 compatibility in PIIX4 */
246static void __init quirk_dlcsetup(struct pci_dev *dev)
247{
248 u8 odlc, ndlc;
249 (void) pci_read_config_byte(dev, 0x82, &odlc);
250 /* Enable passive releases and delayed transaction */
251 ndlc = odlc | 7;
252 (void) pci_write_config_byte(dev, 0x82, ndlc);
253}
254
255DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371AB_0,
256 quirk_dlcsetup);