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authorGreg Ungerer <gerg@snapgear.com>2006-06-26 02:33:05 -0400
committerLinus Torvalds <torvalds@g5.osdl.org>2006-06-26 13:59:07 -0400
commit73e2fba8dc1e0a686073a5183be1a99e9285d2ac (patch)
tree5b7f3da77c830e6ece66786a53b34634589c63e9 /arch
parent63e413d19db0018e443a43c6c7a482993edf79cf (diff)
[PATCH] m68knommu: use configurable RAM setup in linker script
Remove the fixed RAM configurations for each board type from the linker script. Replace with simple defines usng the flexible RAM configuration options. This cleans out of lot of board specific munging of addresses. Signed-off-by: Greg Ungerer <gerg@uclinux.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/m68knommu/kernel/vmlinux.lds.S160
1 files changed, 6 insertions, 154 deletions
diff --git a/arch/m68knommu/kernel/vmlinux.lds.S b/arch/m68knommu/kernel/vmlinux.lds.S
index a331cc90797c..6a2f0c693254 100644
--- a/arch/m68knommu/kernel/vmlinux.lds.S
+++ b/arch/m68knommu/kernel/vmlinux.lds.S
@@ -1,7 +1,7 @@
1/* 1/*
2 * vmlinux.lds.S -- master linker script for m68knommu arch 2 * vmlinux.lds.S -- master linker script for m68knommu arch
3 * 3 *
4 * (C) Copyright 2002-2004, Greg Ungerer <gerg@snapgear.com> 4 * (C) Copyright 2002-2006, Greg Ungerer <gerg@snapgear.com>
5 * 5 *
6 * This ends up looking compilcated, because of the number of 6 * This ends up looking compilcated, because of the number of
7 * address variations for ram and rom/flash layouts. The real 7 * address variations for ram and rom/flash layouts. The real
@@ -22,13 +22,7 @@
22#define ROM_START 0x10c10400 22#define ROM_START 0x10c10400
23#define ROM_LENGTH 0xfec00 23#define ROM_LENGTH 0xfec00
24#define ROM_END 0x10d00000 24#define ROM_END 0x10d00000
25#define RAMVEC_START 0x00000000 25#define DATA_ADDR CONFIG_KERNELBASE
26#define RAMVEC_LENGTH 0x400
27#define RAM_START 0x10000400
28#define RAM_LENGTH 0xffc00
29#define RAM_END 0x10100000
30#define _ramend _ram_end_notused
31#define DATA_ADDR RAM_START
32#endif 26#endif
33 27
34/* 28/*
@@ -41,11 +35,6 @@
41#define ROM_START 0x10c10400 35#define ROM_START 0x10c10400
42#define ROM_LENGTH 0x1efc00 36#define ROM_LENGTH 0x1efc00
43#define ROM_END 0x10e00000 37#define ROM_END 0x10e00000
44#define RAMVEC_START 0x00000000
45#define RAMVEC_LENGTH 0x400
46#define RAM_START 0x00020400
47#define RAM_LENGTH 0x7dfc00
48#define RAM_END 0x00800000
49#endif 38#endif
50#ifdef CONFIG_ROMKERNEL 39#ifdef CONFIG_ROMKERNEL
51#define ROMVEC_START 0x10c10000 40#define ROMVEC_START 0x10c10000
@@ -53,11 +42,6 @@
53#define ROM_START 0x10c10400 42#define ROM_START 0x10c10400
54#define ROM_LENGTH 0x1efc00 43#define ROM_LENGTH 0x1efc00
55#define ROM_END 0x10e00000 44#define ROM_END 0x10e00000
56#define RAMVEC_START 0x00000000
57#define RAMVEC_LENGTH 0x400
58#define RAM_START 0x00020000
59#define RAM_LENGTH 0x600000
60#define RAM_END 0x00800000
61#endif 45#endif
62#ifdef CONFIG_HIMEMKERNEL 46#ifdef CONFIG_HIMEMKERNEL
63#define ROMVEC_START 0x00600000 47#define ROMVEC_START 0x00600000
@@ -65,141 +49,28 @@
65#define ROM_START 0x00600400 49#define ROM_START 0x00600400
66#define ROM_LENGTH 0x1efc00 50#define ROM_LENGTH 0x1efc00
67#define ROM_END 0x007f0000 51#define ROM_END 0x007f0000
68#define RAMVEC_START 0x00000000
69#define RAMVEC_LENGTH 0x400
70#define RAM_START 0x00020000
71#define RAM_LENGTH 0x5e0000
72#define RAM_END 0x00600000
73#endif 52#endif
74#endif 53#endif
75 54
76#ifdef CONFIG_DRAGEN2
77#define RAM_START 0x10000
78#define RAM_LENGTH 0x7f0000
79#endif
80
81#ifdef CONFIG_UCQUICC 55#ifdef CONFIG_UCQUICC
82#define ROMVEC_START 0x00000000 56#define ROMVEC_START 0x00000000
83#define ROMVEC_LENGTH 0x404 57#define ROMVEC_LENGTH 0x404
84#define ROM_START 0x00000404 58#define ROM_START 0x00000404
85#define ROM_LENGTH 0x1ff6fc 59#define ROM_LENGTH 0x1ff6fc
86#define ROM_END 0x00200000 60#define ROM_END 0x00200000
87#define RAMVEC_START 0x00200000
88#define RAMVEC_LENGTH 0x404
89#define RAM_START 0x00200404
90#define RAM_LENGTH 0x1ff6fc
91#define RAM_END 0x00400000
92#endif
93
94/*
95 * The standard Arnewsh 5206 board only has 1MiB of ram. Not normally
96 * enough to be useful. Assume the user has fitted something larger,
97 * at least 4MiB in size. No point in not letting the kernel completely
98 * link, it will be obvious if it is too big when they go to load it.
99 */
100#if defined(CONFIG_ARN5206)
101#define RAM_START 0x10000
102#define RAM_LENGTH 0x3f0000
103#endif
104
105/*
106 * The Motorola 5206eLITE board only has 1MiB of static RAM.
107 */
108#if defined(CONFIG_ELITE)
109#define RAM_START 0x30020000
110#define RAM_LENGTH 0xe0000
111#endif
112
113/*
114 * All the Motorola eval boards have the same basic arrangement.
115 * The end of RAM will vary depending on how much ram is fitted,
116 * but this isn't important here, we assume at least 4MiB.
117 */
118#if defined(CONFIG_M5206eC3) || defined(CONFIG_M5249C3) || \
119 defined(CONFIG_M5272C3) || defined(CONFIG_M5307C3) || \
120 defined(CONFIG_ARN5307) || defined(CONFIG_M5407C3) || \
121 defined(CONFIG_M5271EVB) || defined(CONFIG_M5275EVB) || \
122 defined(CONFIG_M5235EVB)
123#define RAM_START 0x20000
124#define RAM_LENGTH 0x3e0000
125#endif
126
127/*
128 * The Freescale 5208EVB board has 32MB of RAM.
129 */
130#if defined(CONFIG_M5208EVB)
131#define RAM_START 0x40020000
132#define RAM_LENGTH 0x01fe0000
133#endif
134
135/*
136 * The senTec COBRA5272 board has nearly the same memory layout as
137 * the M5272C3. We assume 16MiB ram.
138 */
139#if defined(CONFIG_COBRA5272)
140#define RAM_START 0x20000
141#define RAM_LENGTH 0xfe0000
142#endif
143
144#if defined(CONFIG_M5282EVB)
145#define RAM_START 0x10000
146#define RAM_LENGTH 0x3f0000
147#endif
148
149/*
150 * The senTec COBRA5282 board has the same memory layout as the M5282EVB.
151 */
152#if defined(CONFIG_COBRA5282)
153#define RAM_START 0x10000
154#define RAM_LENGTH 0x3f0000
155#endif
156
157
158/*
159 * The EMAC SoM-5282EM module.
160 */
161#if defined(CONFIG_SOM5282EM)
162#define RAM_START 0x10000
163#define RAM_LENGTH 0xff0000
164#endif
165
166
167/*
168 * These flash boot boards use all of ram for operation. Again the
169 * actual memory size is not important here, assume at least 4MiB.
170 * They currently have no support for running in flash.
171 */
172#if defined(CONFIG_NETtel) || defined(CONFIG_eLIA) || \
173 defined(CONFIG_DISKtel) || defined(CONFIG_SECUREEDGEMP3) || \
174 defined(CONFIG_HW_FEITH)
175#define RAM_START 0x400
176#define RAM_LENGTH 0x3ffc00
177#endif
178
179/*
180 * Sneha Boards mimimun memory
181 * The end of RAM will vary depending on how much ram is fitted,
182 * but this isn't important here, we assume at least 4MiB.
183 */
184#if defined(CONFIG_CPU16B)
185#define RAM_START 0x20000
186#define RAM_LENGTH 0x3e0000
187#endif
188
189#if defined(CONFIG_MOD5272)
190#define RAM_START 0x02000000
191#define RAM_LENGTH 0x00800000
192#define RAMVEC_START 0x20000000
193#define RAMVEC_LENGTH 0x00000400
194#endif 61#endif
195 62
196#if defined(CONFIG_RAMKERNEL) 63#if defined(CONFIG_RAMKERNEL)
64#define RAM_START CONFIG_KERNELBASE
65#define RAM_LENGTH (CONFIG_RAMBASE + CONFIG_RAMSIZE - CONFIG_KERNELBASE)
197#define TEXT ram 66#define TEXT ram
198#define DATA ram 67#define DATA ram
199#define INIT ram 68#define INIT ram
200#define BSS ram 69#define BSS ram
201#endif 70#endif
202#if defined(CONFIG_ROMKERNEL) || defined(CONFIG_HIMEMKERNEL) 71#if defined(CONFIG_ROMKERNEL) || defined(CONFIG_HIMEMKERNEL)
72#define RAM_START CONFIG_RAMBASE
73#define RAM_LENGTH CONFIG_RAMSIZE
203#define TEXT rom 74#define TEXT rom
204#define DATA ram 75#define DATA ram
205#define INIT ram 76#define INIT ram
@@ -215,13 +86,7 @@ OUTPUT_ARCH(m68k)
215ENTRY(_start) 86ENTRY(_start)
216 87
217MEMORY { 88MEMORY {
218#ifdef RAMVEC_START
219 ramvec : ORIGIN = RAMVEC_START, LENGTH = RAMVEC_LENGTH
220#endif
221 ram : ORIGIN = RAM_START, LENGTH = RAM_LENGTH 89 ram : ORIGIN = RAM_START, LENGTH = RAM_LENGTH
222#ifdef RAM_END
223 eram : ORIGIN = RAM_END, LENGTH = 0
224#endif
225#ifdef ROM_START 90#ifdef ROM_START
226 romvec : ORIGIN = ROMVEC_START, LENGTH = ROMVEC_LENGTH 91 romvec : ORIGIN = ROMVEC_START, LENGTH = ROMVEC_LENGTH
227 rom : ORIGIN = ROM_START, LENGTH = ROM_LENGTH 92 rom : ORIGIN = ROM_START, LENGTH = ROM_LENGTH
@@ -308,12 +173,6 @@ SECTIONS {
308 __rom_end = . ; 173 __rom_end = . ;
309 } > erom 174 } > erom
310#endif 175#endif
311#ifdef RAMVEC_START
312 . = RAMVEC_START ;
313 .ramvec : {
314 __ramvec = .;
315 } > ramvec
316#endif
317 176
318 .data DATA_ADDR : { 177 .data DATA_ADDR : {
319 . = ALIGN(4); 178 . = ALIGN(4);
@@ -373,12 +232,5 @@ SECTIONS {
373 _ebss = . ; 232 _ebss = . ;
374 } > BSS 233 } > BSS
375 234
376#ifdef RAM_END
377 . = RAM_END ;
378 .eram : {
379 __ramend = . ;
380 _ramend = . ;
381 } > eram
382#endif
383} 235}
384 236