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authorLinus Torvalds <torvalds@woody.osdl.org>2006-12-01 19:41:27 -0500
committerLinus Torvalds <torvalds@woody.osdl.org>2006-12-01 19:41:27 -0500
commit72a73a69f6a79266b8b4b18f796907b73a5c01e3 (patch)
tree7684193f3c7f21b0ca14c430b8ead75b2c2025eb /arch
parent4549df891a31b9a05b7d183106c09049b79327be (diff)
parent2b290da053608692ea206507d993b70c39d2cdea (diff)
Merge master.kernel.org:/pub/scm/linux/kernel/git/gregkh/pci-2.6
* master.kernel.org:/pub/scm/linux/kernel/git/gregkh/pci-2.6: (28 commits) PCI: make arch/i386/pci/common.c:pci_bf_sort static PCI: ibmphp_pci.c: fix NULL dereference pciehp: remove unnecessary pci_disable_msi pciehp: remove unnecessary free_irq PCI: rpaphp: change device tree examination PCI: Change memory allocation for acpiphp slots i2c-i801: SMBus patch for Intel ICH9 PCI: irq: irq and pci_ids patch for Intel ICH9 PCI: pci_{enable,disable}_device() nestable ports PCI: switch pci_{enable,disable}_device() to be nestable PCI: arch/i386/kernel/pci-dma.c: ioremap balanced with iounmap pci/i386: style cleanups PCI: Block on access to temporarily unavailable pci device pci: fix __pci_register_driver error handling pci: clear osc support flags if no _OSC method acpiphp: fix missing acpiphp_glue_exit() acpiphp: fix use of list_for_each macro Altix: Initial ACPI support - ROM shadowing. Altix: SN ACPI hotplug support. Altix: Add initial ACPI IO support ...
Diffstat (limited to 'arch')
-rw-r--r--arch/i386/kernel/pci-dma.c4
-rw-r--r--arch/i386/pci/common.c2
-rw-r--r--arch/i386/pci/fixup.c46
-rw-r--r--arch/i386/pci/i386.c64
-rw-r--r--arch/i386/pci/irq.c6
-rw-r--r--arch/ia64/pci/pci.c75
-rw-r--r--arch/ia64/sn/kernel/Makefile5
-rw-r--r--arch/ia64/sn/kernel/io_acpi_init.c231
-rw-r--r--arch/ia64/sn/kernel/io_common.c613
-rw-r--r--arch/ia64/sn/kernel/io_init.c633
-rw-r--r--arch/ia64/sn/kernel/iomv.c11
-rw-r--r--arch/ia64/sn/kernel/setup.c18
-rw-r--r--arch/ia64/sn/kernel/tiocx.c2
-rw-r--r--arch/ia64/sn/pci/pcibr/pcibr_provider.c17
-rw-r--r--arch/ia64/sn/pci/tioce_provider.c18
-rw-r--r--arch/powerpc/platforms/powermac/pci.c1
-rw-r--r--arch/sparc64/kernel/pci.c9
17 files changed, 1055 insertions, 700 deletions
diff --git a/arch/i386/kernel/pci-dma.c b/arch/i386/kernel/pci-dma.c
index 25fe66853934..5c8c6ef1fc5e 100644
--- a/arch/i386/kernel/pci-dma.c
+++ b/arch/i386/kernel/pci-dma.c
@@ -75,7 +75,7 @@ EXPORT_SYMBOL(dma_free_coherent);
75int dma_declare_coherent_memory(struct device *dev, dma_addr_t bus_addr, 75int dma_declare_coherent_memory(struct device *dev, dma_addr_t bus_addr,
76 dma_addr_t device_addr, size_t size, int flags) 76 dma_addr_t device_addr, size_t size, int flags)
77{ 77{
78 void __iomem *mem_base; 78 void __iomem *mem_base = NULL;
79 int pages = size >> PAGE_SHIFT; 79 int pages = size >> PAGE_SHIFT;
80 int bitmap_size = (pages + 31)/32; 80 int bitmap_size = (pages + 31)/32;
81 81
@@ -114,6 +114,8 @@ int dma_declare_coherent_memory(struct device *dev, dma_addr_t bus_addr,
114 free1_out: 114 free1_out:
115 kfree(dev->dma_mem->bitmap); 115 kfree(dev->dma_mem->bitmap);
116 out: 116 out:
117 if (mem_base)
118 iounmap(mem_base);
117 return 0; 119 return 0;
118} 120}
119EXPORT_SYMBOL(dma_declare_coherent_memory); 121EXPORT_SYMBOL(dma_declare_coherent_memory);
diff --git a/arch/i386/pci/common.c b/arch/i386/pci/common.c
index cdfcf971098b..53ca6e897984 100644
--- a/arch/i386/pci/common.c
+++ b/arch/i386/pci/common.c
@@ -20,7 +20,7 @@
20unsigned int pci_probe = PCI_PROBE_BIOS | PCI_PROBE_CONF1 | PCI_PROBE_CONF2 | 20unsigned int pci_probe = PCI_PROBE_BIOS | PCI_PROBE_CONF1 | PCI_PROBE_CONF2 |
21 PCI_PROBE_MMCONF; 21 PCI_PROBE_MMCONF;
22 22
23int pci_bf_sort; 23static int pci_bf_sort;
24int pci_routeirq; 24int pci_routeirq;
25int pcibios_last_bus = -1; 25int pcibios_last_bus = -1;
26unsigned long pirq_table_addr; 26unsigned long pirq_table_addr;
diff --git a/arch/i386/pci/fixup.c b/arch/i386/pci/fixup.c
index c1949ff38d61..cde1170b01a1 100644
--- a/arch/i386/pci/fixup.c
+++ b/arch/i386/pci/fixup.c
@@ -74,52 +74,6 @@ static void __devinit pci_fixup_ncr53c810(struct pci_dev *d)
74} 74}
75DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_NCR, PCI_DEVICE_ID_NCR_53C810, pci_fixup_ncr53c810); 75DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_NCR, PCI_DEVICE_ID_NCR_53C810, pci_fixup_ncr53c810);
76 76
77static void __devinit pci_fixup_ide_bases(struct pci_dev *d)
78{
79 int i;
80
81 /*
82 * PCI IDE controllers use non-standard I/O port decoding, respect it.
83 */
84 if ((d->class >> 8) != PCI_CLASS_STORAGE_IDE)
85 return;
86 DBG("PCI: IDE base address fixup for %s\n", pci_name(d));
87 for(i=0; i<4; i++) {
88 struct resource *r = &d->resource[i];
89 if ((r->start & ~0x80) == 0x374) {
90 r->start |= 2;
91 r->end = r->start;
92 }
93 }
94}
95DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, pci_fixup_ide_bases);
96
97static void __devinit pci_fixup_ide_trash(struct pci_dev *d)
98{
99 int i;
100
101 /*
102 * Runs the fixup only for the first IDE controller
103 * (Shai Fultheim - shai@ftcon.com)
104 */
105 static int called = 0;
106 if (called)
107 return;
108 called = 1;
109
110 /*
111 * There exist PCI IDE controllers which have utter garbage
112 * in first four base registers. Ignore that.
113 */
114 DBG("PCI: IDE base address trash cleared for %s\n", pci_name(d));
115 for(i=0; i<4; i++)
116 d->resource[i].start = d->resource[i].end = d->resource[i].flags = 0;
117}
118DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_5513, pci_fixup_ide_trash);
119DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801CA_10, pci_fixup_ide_trash);
120DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801CA_11, pci_fixup_ide_trash);
121DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801DB_9, pci_fixup_ide_trash);
122
123static void __devinit pci_fixup_latency(struct pci_dev *d) 77static void __devinit pci_fixup_latency(struct pci_dev *d)
124{ 78{
125 /* 79 /*
diff --git a/arch/i386/pci/i386.c b/arch/i386/pci/i386.c
index 98580292f0d4..43005f044424 100644
--- a/arch/i386/pci/i386.c
+++ b/arch/i386/pci/i386.c
@@ -104,16 +104,24 @@ static void __init pcibios_allocate_bus_resources(struct list_head *bus_list)
104 /* Depth-First Search on bus tree */ 104 /* Depth-First Search on bus tree */
105 list_for_each_entry(bus, bus_list, node) { 105 list_for_each_entry(bus, bus_list, node) {
106 if ((dev = bus->self)) { 106 if ((dev = bus->self)) {
107 for (idx = PCI_BRIDGE_RESOURCES; idx < PCI_NUM_RESOURCES; idx++) { 107 for (idx = PCI_BRIDGE_RESOURCES;
108 idx < PCI_NUM_RESOURCES; idx++) {
108 r = &dev->resource[idx]; 109 r = &dev->resource[idx];
109 if (!r->flags) 110 if (!r->flags)
110 continue; 111 continue;
111 pr = pci_find_parent_resource(dev, r); 112 pr = pci_find_parent_resource(dev, r);
112 if (!r->start || !pr || request_resource(pr, r) < 0) { 113 if (!r->start || !pr ||
113 printk(KERN_ERR "PCI: Cannot allocate resource region %d of bridge %s\n", idx, pci_name(dev)); 114 request_resource(pr, r) < 0) {
114 /* Something is wrong with the region. 115 printk(KERN_ERR "PCI: Cannot allocate "
115 Invalidate the resource to prevent child 116 "resource region %d "
116 resource allocations in this range. */ 117 "of bridge %s\n",
118 idx, pci_name(dev));
119 /*
120 * Something is wrong with the region.
121 * Invalidate the resource to prevent
122 * child resource allocations in this
123 * range.
124 */
117 r->flags = 0; 125 r->flags = 0;
118 } 126 }
119 } 127 }
@@ -131,7 +139,7 @@ static void __init pcibios_allocate_resources(int pass)
131 139
132 for_each_pci_dev(dev) { 140 for_each_pci_dev(dev) {
133 pci_read_config_word(dev, PCI_COMMAND, &command); 141 pci_read_config_word(dev, PCI_COMMAND, &command);
134 for(idx = 0; idx < 6; idx++) { 142 for (idx = 0; idx < PCI_ROM_RESOURCE; idx++) {
135 r = &dev->resource[idx]; 143 r = &dev->resource[idx];
136 if (r->parent) /* Already allocated */ 144 if (r->parent) /* Already allocated */
137 continue; 145 continue;
@@ -142,11 +150,15 @@ static void __init pcibios_allocate_resources(int pass)
142 else 150 else
143 disabled = !(command & PCI_COMMAND_MEMORY); 151 disabled = !(command & PCI_COMMAND_MEMORY);
144 if (pass == disabled) { 152 if (pass == disabled) {
145 DBG("PCI: Resource %08lx-%08lx (f=%lx, d=%d, p=%d)\n", 153 DBG("PCI: Resource %08lx-%08lx "
154 "(f=%lx, d=%d, p=%d)\n",
146 r->start, r->end, r->flags, disabled, pass); 155 r->start, r->end, r->flags, disabled, pass);
147 pr = pci_find_parent_resource(dev, r); 156 pr = pci_find_parent_resource(dev, r);
148 if (!pr || request_resource(pr, r) < 0) { 157 if (!pr || request_resource(pr, r) < 0) {
149 printk(KERN_ERR "PCI: Cannot allocate resource region %d of device %s\n", idx, pci_name(dev)); 158 printk(KERN_ERR "PCI: Cannot allocate "
159 "resource region %d "
160 "of device %s\n",
161 idx, pci_name(dev));
150 /* We'll assign a new address later */ 162 /* We'll assign a new address later */
151 r->end -= r->start; 163 r->end -= r->start;
152 r->start = 0; 164 r->start = 0;
@@ -156,12 +168,16 @@ static void __init pcibios_allocate_resources(int pass)
156 if (!pass) { 168 if (!pass) {
157 r = &dev->resource[PCI_ROM_RESOURCE]; 169 r = &dev->resource[PCI_ROM_RESOURCE];
158 if (r->flags & IORESOURCE_ROM_ENABLE) { 170 if (r->flags & IORESOURCE_ROM_ENABLE) {
159 /* Turn the ROM off, leave the resource region, but keep it unregistered. */ 171 /* Turn the ROM off, leave the resource region,
172 * but keep it unregistered. */
160 u32 reg; 173 u32 reg;
161 DBG("PCI: Switching off ROM of %s\n", pci_name(dev)); 174 DBG("PCI: Switching off ROM of %s\n",
175 pci_name(dev));
162 r->flags &= ~IORESOURCE_ROM_ENABLE; 176 r->flags &= ~IORESOURCE_ROM_ENABLE;
163 pci_read_config_dword(dev, dev->rom_base_reg, &reg); 177 pci_read_config_dword(dev,
164 pci_write_config_dword(dev, dev->rom_base_reg, reg & ~PCI_ROM_ADDRESS_ENABLE); 178 dev->rom_base_reg, &reg);
179 pci_write_config_dword(dev, dev->rom_base_reg,
180 reg & ~PCI_ROM_ADDRESS_ENABLE);
165 } 181 }
166 } 182 }
167 } 183 }
@@ -173,9 +189,11 @@ static int __init pcibios_assign_resources(void)
173 struct resource *r, *pr; 189 struct resource *r, *pr;
174 190
175 if (!(pci_probe & PCI_ASSIGN_ROMS)) { 191 if (!(pci_probe & PCI_ASSIGN_ROMS)) {
176 /* Try to use BIOS settings for ROMs, otherwise let 192 /*
177 pci_assign_unassigned_resources() allocate the new 193 * Try to use BIOS settings for ROMs, otherwise let
178 addresses. */ 194 * pci_assign_unassigned_resources() allocate the new
195 * addresses.
196 */
179 for_each_pci_dev(dev) { 197 for_each_pci_dev(dev) {
180 r = &dev->resource[PCI_ROM_RESOURCE]; 198 r = &dev->resource[PCI_ROM_RESOURCE];
181 if (!r->flags || !r->start) 199 if (!r->flags || !r->start)
@@ -215,9 +233,9 @@ int pcibios_enable_resources(struct pci_dev *dev, int mask)
215 233
216 pci_read_config_word(dev, PCI_COMMAND, &cmd); 234 pci_read_config_word(dev, PCI_COMMAND, &cmd);
217 old_cmd = cmd; 235 old_cmd = cmd;
218 for(idx = 0; idx < PCI_NUM_RESOURCES; idx++) { 236 for (idx = 0; idx < PCI_NUM_RESOURCES; idx++) {
219 /* Only set up the requested stuff */ 237 /* Only set up the requested stuff */
220 if (!(mask & (1<<idx))) 238 if (!(mask & (1 << idx)))
221 continue; 239 continue;
222 240
223 r = &dev->resource[idx]; 241 r = &dev->resource[idx];
@@ -227,7 +245,9 @@ int pcibios_enable_resources(struct pci_dev *dev, int mask)
227 (!(r->flags & IORESOURCE_ROM_ENABLE))) 245 (!(r->flags & IORESOURCE_ROM_ENABLE)))
228 continue; 246 continue;
229 if (!r->start && r->end) { 247 if (!r->start && r->end) {
230 printk(KERN_ERR "PCI: Device %s not available because of resource collisions\n", pci_name(dev)); 248 printk(KERN_ERR "PCI: Device %s not available "
249 "because of resource collisions\n",
250 pci_name(dev));
231 return -EINVAL; 251 return -EINVAL;
232 } 252 }
233 if (r->flags & IORESOURCE_IO) 253 if (r->flags & IORESOURCE_IO)
@@ -236,7 +256,8 @@ int pcibios_enable_resources(struct pci_dev *dev, int mask)
236 cmd |= PCI_COMMAND_MEMORY; 256 cmd |= PCI_COMMAND_MEMORY;
237 } 257 }
238 if (cmd != old_cmd) { 258 if (cmd != old_cmd) {
239 printk("PCI: Enabling device %s (%04x -> %04x)\n", pci_name(dev), old_cmd, cmd); 259 printk("PCI: Enabling device %s (%04x -> %04x)\n",
260 pci_name(dev), old_cmd, cmd);
240 pci_write_config_word(dev, PCI_COMMAND, cmd); 261 pci_write_config_word(dev, PCI_COMMAND, cmd);
241 } 262 }
242 return 0; 263 return 0;
@@ -258,7 +279,8 @@ void pcibios_set_master(struct pci_dev *dev)
258 lat = pcibios_max_latency; 279 lat = pcibios_max_latency;
259 else 280 else
260 return; 281 return;
261 printk(KERN_DEBUG "PCI: Setting latency timer of device %s to %d\n", pci_name(dev), lat); 282 printk(KERN_DEBUG "PCI: Setting latency timer of device %s to %d\n",
283 pci_name(dev), lat);
262 pci_write_config_byte(dev, PCI_LATENCY_TIMER, lat); 284 pci_write_config_byte(dev, PCI_LATENCY_TIMER, lat);
263} 285}
264 286
diff --git a/arch/i386/pci/irq.c b/arch/i386/pci/irq.c
index 69163998adeb..e65551cd8216 100644
--- a/arch/i386/pci/irq.c
+++ b/arch/i386/pci/irq.c
@@ -543,6 +543,12 @@ static __init int intel_router_probe(struct irq_router *r, struct pci_dev *route
543 case PCI_DEVICE_ID_INTEL_ICH8_2: 543 case PCI_DEVICE_ID_INTEL_ICH8_2:
544 case PCI_DEVICE_ID_INTEL_ICH8_3: 544 case PCI_DEVICE_ID_INTEL_ICH8_3:
545 case PCI_DEVICE_ID_INTEL_ICH8_4: 545 case PCI_DEVICE_ID_INTEL_ICH8_4:
546 case PCI_DEVICE_ID_INTEL_ICH9_0:
547 case PCI_DEVICE_ID_INTEL_ICH9_1:
548 case PCI_DEVICE_ID_INTEL_ICH9_2:
549 case PCI_DEVICE_ID_INTEL_ICH9_3:
550 case PCI_DEVICE_ID_INTEL_ICH9_4:
551 case PCI_DEVICE_ID_INTEL_ICH9_5:
546 r->name = "PIIX/ICH"; 552 r->name = "PIIX/ICH";
547 r->get = pirq_piix_get; 553 r->get = pirq_piix_get;
548 r->set = pirq_piix_set; 554 r->set = pirq_piix_set;
diff --git a/arch/ia64/pci/pci.c b/arch/ia64/pci/pci.c
index b30be7c48ba8..f4edfbf27134 100644
--- a/arch/ia64/pci/pci.c
+++ b/arch/ia64/pci/pci.c
@@ -469,10 +469,11 @@ pcibios_fixup_resources(struct pci_dev *dev, int start, int limit)
469 } 469 }
470} 470}
471 471
472static void __devinit pcibios_fixup_device_resources(struct pci_dev *dev) 472void __devinit pcibios_fixup_device_resources(struct pci_dev *dev)
473{ 473{
474 pcibios_fixup_resources(dev, 0, PCI_BRIDGE_RESOURCES); 474 pcibios_fixup_resources(dev, 0, PCI_BRIDGE_RESOURCES);
475} 475}
476EXPORT_SYMBOL_GPL(pcibios_fixup_device_resources);
476 477
477static void __devinit pcibios_fixup_bridge_resources(struct pci_dev *dev) 478static void __devinit pcibios_fixup_bridge_resources(struct pci_dev *dev)
478{ 479{
@@ -493,6 +494,7 @@ pcibios_fixup_bus (struct pci_bus *b)
493 } 494 }
494 list_for_each_entry(dev, &b->devices, bus_list) 495 list_for_each_entry(dev, &b->devices, bus_list)
495 pcibios_fixup_device_resources(dev); 496 pcibios_fixup_device_resources(dev);
497 platform_pci_fixup_bus(b);
496 498
497 return; 499 return;
498} 500}
@@ -738,75 +740,44 @@ int ia64_pci_legacy_write(struct pci_bus *bus, u16 port, u32 val, u8 size)
738 return ret; 740 return ret;
739} 741}
740 742
743/* It's defined in drivers/pci/pci.c */
744extern u8 pci_cache_line_size;
745
741/** 746/**
742 * pci_cacheline_size - determine cacheline size for PCI devices 747 * set_pci_cacheline_size - determine cacheline size for PCI devices
743 * @dev: void
744 * 748 *
745 * We want to use the line-size of the outer-most cache. We assume 749 * We want to use the line-size of the outer-most cache. We assume
746 * that this line-size is the same for all CPUs. 750 * that this line-size is the same for all CPUs.
747 * 751 *
748 * Code mostly taken from arch/ia64/kernel/palinfo.c:cache_info(). 752 * Code mostly taken from arch/ia64/kernel/palinfo.c:cache_info().
749 *
750 * RETURNS: An appropriate -ERRNO error value on eror, or zero for success.
751 */ 753 */
752static unsigned long 754static void __init set_pci_cacheline_size(void)
753pci_cacheline_size (void)
754{ 755{
755 u64 levels, unique_caches; 756 u64 levels, unique_caches;
756 s64 status; 757 s64 status;
757 pal_cache_config_info_t cci; 758 pal_cache_config_info_t cci;
758 static u8 cacheline_size;
759
760 if (cacheline_size)
761 return cacheline_size;
762 759
763 status = ia64_pal_cache_summary(&levels, &unique_caches); 760 status = ia64_pal_cache_summary(&levels, &unique_caches);
764 if (status != 0) { 761 if (status != 0) {
765 printk(KERN_ERR "%s: ia64_pal_cache_summary() failed (status=%ld)\n", 762 printk(KERN_ERR "%s: ia64_pal_cache_summary() failed "
766 __FUNCTION__, status); 763 "(status=%ld)\n", __FUNCTION__, status);
767 return SMP_CACHE_BYTES; 764 return;
768 } 765 }
769 766
770 status = ia64_pal_cache_config_info(levels - 1, /* cache_type (data_or_unified)= */ 2, 767 status = ia64_pal_cache_config_info(levels - 1,
771 &cci); 768 /* cache_type (data_or_unified)= */ 2, &cci);
772 if (status != 0) { 769 if (status != 0) {
773 printk(KERN_ERR "%s: ia64_pal_cache_config_info() failed (status=%ld)\n", 770 printk(KERN_ERR "%s: ia64_pal_cache_config_info() failed "
774 __FUNCTION__, status); 771 "(status=%ld)\n", __FUNCTION__, status);
775 return SMP_CACHE_BYTES; 772 return;
776 } 773 }
777 cacheline_size = 1 << cci.pcci_line_size; 774 pci_cache_line_size = (1 << cci.pcci_line_size) / 4;
778 return cacheline_size;
779} 775}
780 776
781/** 777static int __init pcibios_init(void)
782 * pcibios_prep_mwi - helper function for drivers/pci/pci.c:pci_set_mwi() 778{
783 * @dev: the PCI device for which MWI is enabled 779 set_pci_cacheline_size();
784 * 780 return 0;
785 * For ia64, we can get the cacheline sizes from PAL.
786 *
787 * RETURNS: An appropriate -ERRNO error value on eror, or zero for success.
788 */
789int
790pcibios_prep_mwi (struct pci_dev *dev)
791{
792 unsigned long desired_linesize, current_linesize;
793 int rc = 0;
794 u8 pci_linesize;
795
796 desired_linesize = pci_cacheline_size();
797
798 pci_read_config_byte(dev, PCI_CACHE_LINE_SIZE, &pci_linesize);
799 current_linesize = 4 * pci_linesize;
800 if (desired_linesize != current_linesize) {
801 printk(KERN_WARNING "PCI: slot %s has incorrect PCI cache line size of %lu bytes,",
802 pci_name(dev), current_linesize);
803 if (current_linesize > desired_linesize) {
804 printk(" expected %lu bytes instead\n", desired_linesize);
805 rc = -EINVAL;
806 } else {
807 printk(" correcting to %lu\n", desired_linesize);
808 pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, desired_linesize / 4);
809 }
810 }
811 return rc;
812} 781}
782
783subsys_initcall(pcibios_init);
diff --git a/arch/ia64/sn/kernel/Makefile b/arch/ia64/sn/kernel/Makefile
index 2d78f34dd763..0a59371d3475 100644
--- a/arch/ia64/sn/kernel/Makefile
+++ b/arch/ia64/sn/kernel/Makefile
@@ -4,13 +4,14 @@
4# License. See the file "COPYING" in the main directory of this archive 4# License. See the file "COPYING" in the main directory of this archive
5# for more details. 5# for more details.
6# 6#
7# Copyright (C) 1999,2001-2005 Silicon Graphics, Inc. All Rights Reserved. 7# Copyright (C) 1999,2001-2006 Silicon Graphics, Inc. All Rights Reserved.
8# 8#
9 9
10CPPFLAGS += -I$(srctree)/arch/ia64/sn/include 10CPPFLAGS += -I$(srctree)/arch/ia64/sn/include
11 11
12obj-y += setup.o bte.o bte_error.o irq.o mca.o idle.o \ 12obj-y += setup.o bte.o bte_error.o irq.o mca.o idle.o \
13 huberror.o io_init.o iomv.o klconflib.o pio_phys.o \ 13 huberror.o io_acpi_init.o io_common.o \
14 io_init.o iomv.o klconflib.o pio_phys.o \
14 sn2/ 15 sn2/
15obj-$(CONFIG_IA64_GENERIC) += machvec.o 16obj-$(CONFIG_IA64_GENERIC) += machvec.o
16obj-$(CONFIG_SGI_TIOCX) += tiocx.o 17obj-$(CONFIG_SGI_TIOCX) += tiocx.o
diff --git a/arch/ia64/sn/kernel/io_acpi_init.c b/arch/ia64/sn/kernel/io_acpi_init.c
new file mode 100644
index 000000000000..99d7f278612a
--- /dev/null
+++ b/arch/ia64/sn/kernel/io_acpi_init.c
@@ -0,0 +1,231 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2006 Silicon Graphics, Inc. All rights reserved.
7 */
8
9#include <asm/sn/types.h>
10#include <asm/sn/addrs.h>
11#include <asm/sn/pcidev.h>
12#include <asm/sn/pcibus_provider_defs.h>
13#include <asm/sn/sn_sal.h>
14#include "xtalk/hubdev.h"
15#include <linux/acpi.h>
16
17
18/*
19 * The code in this file will only be executed when running with
20 * a PROM that has ACPI IO support. (i.e., SN_ACPI_BASE_SUPPORT() == 1)
21 */
22
23
24/*
25 * This value must match the UUID the PROM uses
26 * (io/acpi/defblk.c) when building a vendor descriptor.
27 */
28struct acpi_vendor_uuid sn_uuid = {
29 .subtype = 0,
30 .data = { 0x2c, 0xc6, 0xa6, 0xfe, 0x9c, 0x44, 0xda, 0x11,
31 0xa2, 0x7c, 0x08, 0x00, 0x69, 0x13, 0xea, 0x51 },
32};
33
34/*
35 * Perform the early IO init in PROM.
36 */
37static s64
38sal_ioif_init(u64 *result)
39{
40 struct ia64_sal_retval isrv = {0,0,0,0};
41
42 SAL_CALL_NOLOCK(isrv,
43 SN_SAL_IOIF_INIT, 0, 0, 0, 0, 0, 0, 0);
44 *result = isrv.v0;
45 return isrv.status;
46}
47
48/*
49 * sn_hubdev_add - The 'add' function of the acpi_sn_hubdev_driver.
50 * Called for every "SGIHUB" or "SGITIO" device defined
51 * in the ACPI namespace.
52 */
53static int __init
54sn_hubdev_add(struct acpi_device *device)
55{
56 struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
57 u64 addr;
58 struct hubdev_info *hubdev;
59 struct hubdev_info *hubdev_ptr;
60 int i;
61 u64 nasid;
62 struct acpi_resource *resource;
63 int ret = 0;
64 acpi_status status;
65 struct acpi_resource_vendor_typed *vendor;
66 extern void sn_common_hubdev_init(struct hubdev_info *);
67
68 status = acpi_get_vendor_resource(device->handle, METHOD_NAME__CRS,
69 &sn_uuid, &buffer);
70 if (ACPI_FAILURE(status)) {
71 printk(KERN_ERR
72 "sn_hubdev_add: acpi_get_vendor_resource() failed: %d\n",
73 status);
74 return 1;
75 }
76
77 resource = buffer.pointer;
78 vendor = &resource->data.vendor_typed;
79 if ((vendor->byte_length - sizeof(struct acpi_vendor_uuid)) !=
80 sizeof(struct hubdev_info *)) {
81 printk(KERN_ERR
82 "sn_hubdev_add: Invalid vendor data length: %d\n",
83 vendor->byte_length);
84 ret = 1;
85 goto exit;
86 }
87
88 memcpy(&addr, vendor->byte_data, sizeof(struct hubdev_info *));
89 hubdev_ptr = __va((struct hubdev_info *) addr);
90
91 nasid = hubdev_ptr->hdi_nasid;
92 i = nasid_to_cnodeid(nasid);
93 hubdev = (struct hubdev_info *)(NODEPDA(i)->pdinfo);
94 *hubdev = *hubdev_ptr;
95 sn_common_hubdev_init(hubdev);
96
97exit:
98 kfree(buffer.pointer);
99 return ret;
100}
101
102/*
103 * sn_get_bussoft_ptr() - The pcibus_bussoft pointer is found in
104 * the ACPI Vendor resource for this bus.
105 */
106static struct pcibus_bussoft *
107sn_get_bussoft_ptr(struct pci_bus *bus)
108{
109 u64 addr;
110 struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
111 acpi_handle handle;
112 struct pcibus_bussoft *prom_bussoft_ptr;
113 struct acpi_resource *resource;
114 acpi_status status;
115 struct acpi_resource_vendor_typed *vendor;
116
117
118 handle = PCI_CONTROLLER(bus)->acpi_handle;
119 status = acpi_get_vendor_resource(handle, METHOD_NAME__CRS,
120 &sn_uuid, &buffer);
121 if (ACPI_FAILURE(status)) {
122 printk(KERN_ERR "get_acpi_pcibus_ptr: "
123 "get_acpi_bussoft_info() failed: %d\n",
124 status);
125 return NULL;
126 }
127 resource = buffer.pointer;
128 vendor = &resource->data.vendor_typed;
129
130 if ((vendor->byte_length - sizeof(struct acpi_vendor_uuid)) !=
131 sizeof(struct pcibus_bussoft *)) {
132 printk(KERN_ERR
133 "get_acpi_bussoft_ptr: Invalid vendor data "
134 "length %d\n", vendor->byte_length);
135 kfree(buffer.pointer);
136 return NULL;
137 }
138 memcpy(&addr, vendor->byte_data, sizeof(struct pcibus_bussoft *));
139 prom_bussoft_ptr = __va((struct pcibus_bussoft *) addr);
140 kfree(buffer.pointer);
141
142 return prom_bussoft_ptr;
143}
144
145/*
146 * sn_acpi_bus_fixup
147 */
148void
149sn_acpi_bus_fixup(struct pci_bus *bus)
150{
151 struct pci_dev *pci_dev = NULL;
152 struct pcibus_bussoft *prom_bussoft_ptr;
153 extern void sn_common_bus_fixup(struct pci_bus *,
154 struct pcibus_bussoft *);
155
156 if (!bus->parent) { /* If root bus */
157 prom_bussoft_ptr = sn_get_bussoft_ptr(bus);
158 if (prom_bussoft_ptr == NULL) {
159 printk(KERN_ERR
160 "sn_pci_fixup_bus: 0x%04x:0x%02x Unable to "
161 "obtain prom_bussoft_ptr\n",
162 pci_domain_nr(bus), bus->number);
163 return;
164 }
165 sn_common_bus_fixup(bus, prom_bussoft_ptr);
166 }
167 list_for_each_entry(pci_dev, &bus->devices, bus_list) {
168 sn_pci_fixup_slot(pci_dev);
169 }
170}
171
172/*
173 * sn_acpi_slot_fixup - Perform any SN specific slot fixup.
174 * At present there does not appear to be
175 * any generic way to handle a ROM image
176 * that has been shadowed by the PROM, so
177 * we pass a pointer to it within the
178 * pcidev_info structure.
179 */
180
181void
182sn_acpi_slot_fixup(struct pci_dev *dev, struct pcidev_info *pcidev_info)
183{
184 void __iomem *addr;
185 size_t size;
186
187 if (pcidev_info->pdi_pio_mapped_addr[PCI_ROM_RESOURCE]) {
188 /*
189 * A valid ROM image exists and has been shadowed by the
190 * PROM. Setup the pci_dev ROM resource to point to
191 * the shadowed copy.
192 */
193 size = dev->resource[PCI_ROM_RESOURCE].end -
194 dev->resource[PCI_ROM_RESOURCE].start;
195 addr =
196 ioremap(pcidev_info->pdi_pio_mapped_addr[PCI_ROM_RESOURCE],
197 size);
198 dev->resource[PCI_ROM_RESOURCE].start = (unsigned long) addr;
199 dev->resource[PCI_ROM_RESOURCE].end =
200 (unsigned long) addr + size;
201 dev->resource[PCI_ROM_RESOURCE].flags |= IORESOURCE_ROM_BIOS_COPY;
202 }
203}
204
205static struct acpi_driver acpi_sn_hubdev_driver = {
206 .name = "SGI HUBDEV Driver",
207 .ids = "SGIHUB,SGITIO",
208 .ops = {
209 .add = sn_hubdev_add,
210 },
211};
212
213
214/*
215 * sn_io_acpi_init - PROM has ACPI support for IO, defining at a minimum the
216 * nodes and root buses in the DSDT. As a result, bus scanning
217 * will be initiated by the Linux ACPI code.
218 */
219
220void __init
221sn_io_acpi_init(void)
222{
223 u64 result;
224 s64 status;
225
226 acpi_bus_register_driver(&acpi_sn_hubdev_driver);
227 status = sal_ioif_init(&result);
228 if (status || result)
229 panic("sal_ioif_init failed: [%lx] %s\n",
230 status, ia64_sal_strerror(status));
231}
diff --git a/arch/ia64/sn/kernel/io_common.c b/arch/ia64/sn/kernel/io_common.c
new file mode 100644
index 000000000000..d4dd8f4b6b8d
--- /dev/null
+++ b/arch/ia64/sn/kernel/io_common.c
@@ -0,0 +1,613 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2006 Silicon Graphics, Inc. All rights reserved.
7 */
8
9#include <linux/bootmem.h>
10#include <asm/sn/types.h>
11#include <asm/sn/addrs.h>
12#include <asm/sn/sn_feature_sets.h>
13#include <asm/sn/geo.h>
14#include <asm/sn/io.h>
15#include <asm/sn/l1.h>
16#include <asm/sn/module.h>
17#include <asm/sn/pcibr_provider.h>
18#include <asm/sn/pcibus_provider_defs.h>
19#include <asm/sn/pcidev.h>
20#include <asm/sn/simulator.h>
21#include <asm/sn/sn_sal.h>
22#include <asm/sn/tioca_provider.h>
23#include <asm/sn/tioce_provider.h>
24#include "xtalk/hubdev.h"
25#include "xtalk/xwidgetdev.h"
26#include <linux/acpi.h>
27#include <asm/sn/sn2/sn_hwperf.h>
28#include <asm/sn/acpi.h>
29
30extern void sn_init_cpei_timer(void);
31extern void register_sn_procfs(void);
32extern void sn_acpi_bus_fixup(struct pci_bus *);
33extern void sn_bus_fixup(struct pci_bus *);
34extern void sn_acpi_slot_fixup(struct pci_dev *, struct pcidev_info *);
35extern void sn_more_slot_fixup(struct pci_dev *, struct pcidev_info *);
36extern void sn_legacy_pci_window_fixup(struct pci_controller *, u64, u64);
37extern void sn_io_acpi_init(void);
38extern void sn_io_init(void);
39
40
41static struct list_head sn_sysdata_list;
42
43/* sysdata list struct */
44struct sysdata_el {
45 struct list_head entry;
46 void *sysdata;
47};
48
49int sn_ioif_inited; /* SN I/O infrastructure initialized? */
50
51struct sn_pcibus_provider *sn_pci_provider[PCIIO_ASIC_MAX_TYPES]; /* indexed by asic type */
52
53/*
54 * Hooks and struct for unsupported pci providers
55 */
56
57static dma_addr_t
58sn_default_pci_map(struct pci_dev *pdev, unsigned long paddr, size_t size, int type)
59{
60 return 0;
61}
62
63static void
64sn_default_pci_unmap(struct pci_dev *pdev, dma_addr_t addr, int direction)
65{
66 return;
67}
68
69static void *
70sn_default_pci_bus_fixup(struct pcibus_bussoft *soft, struct pci_controller *controller)
71{
72 return NULL;
73}
74
75static struct sn_pcibus_provider sn_pci_default_provider = {
76 .dma_map = sn_default_pci_map,
77 .dma_map_consistent = sn_default_pci_map,
78 .dma_unmap = sn_default_pci_unmap,
79 .bus_fixup = sn_default_pci_bus_fixup,
80};
81
82/*
83 * Retrieve the DMA Flush List given nasid, widget, and device.
84 * This list is needed to implement the WAR - Flush DMA data on PIO Reads.
85 */
86static inline u64
87sal_get_device_dmaflush_list(u64 nasid, u64 widget_num, u64 device_num,
88 u64 address)
89{
90 struct ia64_sal_retval ret_stuff;
91 ret_stuff.status = 0;
92 ret_stuff.v0 = 0;
93
94 SAL_CALL_NOLOCK(ret_stuff,
95 (u64) SN_SAL_IOIF_GET_DEVICE_DMAFLUSH_LIST,
96 (u64) nasid, (u64) widget_num,
97 (u64) device_num, (u64) address, 0, 0, 0);
98 return ret_stuff.status;
99}
100
101/*
102 * Retrieve the pci device information given the bus and device|function number.
103 */
104static inline u64
105sal_get_pcidev_info(u64 segment, u64 bus_number, u64 devfn, u64 pci_dev,
106 u64 sn_irq_info)
107{
108 struct ia64_sal_retval ret_stuff;
109 ret_stuff.status = 0;
110 ret_stuff.v0 = 0;
111
112 SAL_CALL_NOLOCK(ret_stuff,
113 (u64) SN_SAL_IOIF_GET_PCIDEV_INFO,
114 (u64) segment, (u64) bus_number, (u64) devfn,
115 (u64) pci_dev,
116 sn_irq_info, 0, 0);
117 return ret_stuff.v0;
118}
119
120/*
121 * sn_pcidev_info_get() - Retrieve the pcidev_info struct for the specified
122 * device.
123 */
124inline struct pcidev_info *
125sn_pcidev_info_get(struct pci_dev *dev)
126{
127 struct pcidev_info *pcidev;
128
129 list_for_each_entry(pcidev,
130 &(SN_PLATFORM_DATA(dev)->pcidev_info), pdi_list) {
131 if (pcidev->pdi_linux_pcidev == dev)
132 return pcidev;
133 }
134 return NULL;
135}
136
137/* Older PROM flush WAR
138 *
139 * 01/16/06 -- This war will be in place until a new official PROM is released.
140 * Additionally note that the struct sn_flush_device_war also has to be
141 * removed from arch/ia64/sn/include/xtalk/hubdev.h
142 */
143static u8 war_implemented = 0;
144
145static s64 sn_device_fixup_war(u64 nasid, u64 widget, int device,
146 struct sn_flush_device_common *common)
147{
148 struct sn_flush_device_war *war_list;
149 struct sn_flush_device_war *dev_entry;
150 struct ia64_sal_retval isrv = {0,0,0,0};
151
152 if (!war_implemented) {
153 printk(KERN_WARNING "PROM version < 4.50 -- implementing old "
154 "PROM flush WAR\n");
155 war_implemented = 1;
156 }
157
158 war_list = kzalloc(DEV_PER_WIDGET * sizeof(*war_list), GFP_KERNEL);
159 if (!war_list)
160 BUG();
161
162 SAL_CALL_NOLOCK(isrv, SN_SAL_IOIF_GET_WIDGET_DMAFLUSH_LIST,
163 nasid, widget, __pa(war_list), 0, 0, 0 ,0);
164 if (isrv.status)
165 panic("sn_device_fixup_war failed: %s\n",
166 ia64_sal_strerror(isrv.status));
167
168 dev_entry = war_list + device;
169 memcpy(common,dev_entry, sizeof(*common));
170 kfree(war_list);
171
172 return isrv.status;
173}
174
175/*
176 * sn_common_hubdev_init() - This routine is called to initialize the HUB data
177 * structure for each node in the system.
178 */
179void __init
180sn_common_hubdev_init(struct hubdev_info *hubdev)
181{
182
183 struct sn_flush_device_kernel *sn_flush_device_kernel;
184 struct sn_flush_device_kernel *dev_entry;
185 s64 status;
186 int widget, device, size;
187
188 /* Attach the error interrupt handlers */
189 if (hubdev->hdi_nasid & 1) /* If TIO */
190 ice_error_init(hubdev);
191 else
192 hub_error_init(hubdev);
193
194 for (widget = 0; widget <= HUB_WIDGET_ID_MAX; widget++)
195 hubdev->hdi_xwidget_info[widget].xwi_hubinfo = hubdev;
196
197 if (!hubdev->hdi_flush_nasid_list.widget_p)
198 return;
199
200 size = (HUB_WIDGET_ID_MAX + 1) *
201 sizeof(struct sn_flush_device_kernel *);
202 hubdev->hdi_flush_nasid_list.widget_p =
203 kzalloc(size, GFP_KERNEL);
204 if (!hubdev->hdi_flush_nasid_list.widget_p)
205 BUG();
206
207 for (widget = 0; widget <= HUB_WIDGET_ID_MAX; widget++) {
208 size = DEV_PER_WIDGET *
209 sizeof(struct sn_flush_device_kernel);
210 sn_flush_device_kernel = kzalloc(size, GFP_KERNEL);
211 if (!sn_flush_device_kernel)
212 BUG();
213
214 dev_entry = sn_flush_device_kernel;
215 for (device = 0; device < DEV_PER_WIDGET;
216 device++, dev_entry++) {
217 size = sizeof(struct sn_flush_device_common);
218 dev_entry->common = kzalloc(size, GFP_KERNEL);
219 if (!dev_entry->common)
220 BUG();
221 if (sn_prom_feature_available(PRF_DEVICE_FLUSH_LIST))
222 status = sal_get_device_dmaflush_list(
223 hubdev->hdi_nasid, widget, device,
224 (u64)(dev_entry->common));
225 else
226 status = sn_device_fixup_war(hubdev->hdi_nasid,
227 widget, device,
228 dev_entry->common);
229 if (status != SALRET_OK)
230 panic("SAL call failed: %s\n",
231 ia64_sal_strerror(status));
232
233 spin_lock_init(&dev_entry->sfdl_flush_lock);
234 }
235
236 if (sn_flush_device_kernel)
237 hubdev->hdi_flush_nasid_list.widget_p[widget] =
238 sn_flush_device_kernel;
239 }
240}
241
242void sn_pci_unfixup_slot(struct pci_dev *dev)
243{
244 struct pci_dev *host_pci_dev = SN_PCIDEV_INFO(dev)->host_pci_dev;
245
246 sn_irq_unfixup(dev);
247 pci_dev_put(host_pci_dev);
248 pci_dev_put(dev);
249}
250
251/*
252 * sn_pci_fixup_slot() - This routine sets up a slot's resources consistent
253 * with the Linux PCI abstraction layer. Resources
254 * acquired from our PCI provider include PIO maps
255 * to BAR space and interrupt objects.
256 */
257void sn_pci_fixup_slot(struct pci_dev *dev)
258{
259 int segment = pci_domain_nr(dev->bus);
260 int status = 0;
261 struct pcibus_bussoft *bs;
262 struct pci_bus *host_pci_bus;
263 struct pci_dev *host_pci_dev;
264 struct pcidev_info *pcidev_info;
265 struct sn_irq_info *sn_irq_info;
266 unsigned int bus_no, devfn;
267
268 pci_dev_get(dev); /* for the sysdata pointer */
269 pcidev_info = kzalloc(sizeof(struct pcidev_info), GFP_KERNEL);
270 if (!pcidev_info)
271 BUG(); /* Cannot afford to run out of memory */
272
273 sn_irq_info = kzalloc(sizeof(struct sn_irq_info), GFP_KERNEL);
274 if (!sn_irq_info)
275 BUG(); /* Cannot afford to run out of memory */
276
277 /* Call to retrieve pci device information needed by kernel. */
278 status = sal_get_pcidev_info((u64) segment, (u64) dev->bus->number,
279 dev->devfn,
280 (u64) __pa(pcidev_info),
281 (u64) __pa(sn_irq_info));
282 if (status)
283 BUG(); /* Cannot get platform pci device information */
284
285 /* Add pcidev_info to list in pci_controller.platform_data */
286 list_add_tail(&pcidev_info->pdi_list,
287 &(SN_PLATFORM_DATA(dev->bus)->pcidev_info));
288
289 if (SN_ACPI_BASE_SUPPORT())
290 sn_acpi_slot_fixup(dev, pcidev_info);
291 else
292 sn_more_slot_fixup(dev, pcidev_info);
293 /*
294 * Using the PROMs values for the PCI host bus, get the Linux
295 * PCI host_pci_dev struct and set up host bus linkages
296 */
297
298 bus_no = (pcidev_info->pdi_slot_host_handle >> 32) & 0xff;
299 devfn = pcidev_info->pdi_slot_host_handle & 0xffffffff;
300 host_pci_bus = pci_find_bus(segment, bus_no);
301 host_pci_dev = pci_get_slot(host_pci_bus, devfn);
302
303 pcidev_info->host_pci_dev = host_pci_dev;
304 pcidev_info->pdi_linux_pcidev = dev;
305 pcidev_info->pdi_host_pcidev_info = SN_PCIDEV_INFO(host_pci_dev);
306 bs = SN_PCIBUS_BUSSOFT(dev->bus);
307 pcidev_info->pdi_pcibus_info = bs;
308
309 if (bs && bs->bs_asic_type < PCIIO_ASIC_MAX_TYPES) {
310 SN_PCIDEV_BUSPROVIDER(dev) = sn_pci_provider[bs->bs_asic_type];
311 } else {
312 SN_PCIDEV_BUSPROVIDER(dev) = &sn_pci_default_provider;
313 }
314
315 /* Only set up IRQ stuff if this device has a host bus context */
316 if (bs && sn_irq_info->irq_irq) {
317 pcidev_info->pdi_sn_irq_info = sn_irq_info;
318 dev->irq = pcidev_info->pdi_sn_irq_info->irq_irq;
319 sn_irq_fixup(dev, sn_irq_info);
320 } else {
321 pcidev_info->pdi_sn_irq_info = NULL;
322 kfree(sn_irq_info);
323 }
324}
325
326/*
327 * sn_common_bus_fixup - Perform platform specific bus fixup.
328 * Execute the ASIC specific fixup routine
329 * for this bus.
330 */
331void
332sn_common_bus_fixup(struct pci_bus *bus,
333 struct pcibus_bussoft *prom_bussoft_ptr)
334{
335 int cnode;
336 struct pci_controller *controller;
337 struct hubdev_info *hubdev_info;
338 int nasid;
339 void *provider_soft;
340 struct sn_pcibus_provider *provider;
341 struct sn_platform_data *sn_platform_data;
342
343 controller = PCI_CONTROLLER(bus);
344 /*
345 * Per-provider fixup. Copies the bus soft structure from prom
346 * to local area and links SN_PCIBUS_BUSSOFT().
347 */
348
349 if (prom_bussoft_ptr->bs_asic_type >= PCIIO_ASIC_MAX_TYPES) {
350 printk(KERN_WARNING "sn_common_bus_fixup: Unsupported asic type, %d",
351 prom_bussoft_ptr->bs_asic_type);
352 return;
353 }
354
355 if (prom_bussoft_ptr->bs_asic_type == PCIIO_ASIC_TYPE_PPB)
356 return; /* no further fixup necessary */
357
358 provider = sn_pci_provider[prom_bussoft_ptr->bs_asic_type];
359 if (provider == NULL)
360 panic("sn_common_bus_fixup: No provider registered for this asic type, %d",
361 prom_bussoft_ptr->bs_asic_type);
362
363 if (provider->bus_fixup)
364 provider_soft = (*provider->bus_fixup) (prom_bussoft_ptr,
365 controller);
366 else
367 provider_soft = NULL;
368
369 /*
370 * Generic bus fixup goes here. Don't reference prom_bussoft_ptr
371 * after this point.
372 */
373 controller->platform_data = kzalloc(sizeof(struct sn_platform_data),
374 GFP_KERNEL);
375 if (controller->platform_data == NULL)
376 BUG();
377 sn_platform_data =
378 (struct sn_platform_data *) controller->platform_data;
379 sn_platform_data->provider_soft = provider_soft;
380 INIT_LIST_HEAD(&((struct sn_platform_data *)
381 controller->platform_data)->pcidev_info);
382 nasid = NASID_GET(SN_PCIBUS_BUSSOFT(bus)->bs_base);
383 cnode = nasid_to_cnodeid(nasid);
384 hubdev_info = (struct hubdev_info *)(NODEPDA(cnode)->pdinfo);
385 SN_PCIBUS_BUSSOFT(bus)->bs_xwidget_info =
386 &(hubdev_info->hdi_xwidget_info[SN_PCIBUS_BUSSOFT(bus)->bs_xid]);
387
388 /*
389 * If the node information we obtained during the fixup phase is
390 * invalid then set controller->node to -1 (undetermined)
391 */
392 if (controller->node >= num_online_nodes()) {
393 struct pcibus_bussoft *b = SN_PCIBUS_BUSSOFT(bus);
394
395 printk(KERN_WARNING "Device ASIC=%u XID=%u PBUSNUM=%u"
396 "L_IO=%lx L_MEM=%lx BASE=%lx\n",
397 b->bs_asic_type, b->bs_xid, b->bs_persist_busnum,
398 b->bs_legacy_io, b->bs_legacy_mem, b->bs_base);
399 printk(KERN_WARNING "on node %d but only %d nodes online."
400 "Association set to undetermined.\n",
401 controller->node, num_online_nodes());
402 controller->node = -1;
403 }
404}
405
406void sn_bus_store_sysdata(struct pci_dev *dev)
407{
408 struct sysdata_el *element;
409
410 element = kzalloc(sizeof(struct sysdata_el), GFP_KERNEL);
411 if (!element) {
412 dev_dbg(dev, "%s: out of memory!\n", __FUNCTION__);
413 return;
414 }
415 element->sysdata = SN_PCIDEV_INFO(dev);
416 list_add(&element->entry, &sn_sysdata_list);
417}
418
419void sn_bus_free_sysdata(void)
420{
421 struct sysdata_el *element;
422 struct list_head *list, *safe;
423
424 list_for_each_safe(list, safe, &sn_sysdata_list) {
425 element = list_entry(list, struct sysdata_el, entry);
426 list_del(&element->entry);
427 list_del(&(((struct pcidev_info *)
428 (element->sysdata))->pdi_list));
429 kfree(element->sysdata);
430 kfree(element);
431 }
432 return;
433}
434
435/*
436 * hubdev_init_node() - Creates the HUB data structure and link them to it's
437 * own NODE specific data area.
438 */
439void hubdev_init_node(nodepda_t * npda, cnodeid_t node)
440{
441 struct hubdev_info *hubdev_info;
442 int size;
443 pg_data_t *pg;
444
445 size = sizeof(struct hubdev_info);
446
447 if (node >= num_online_nodes()) /* Headless/memless IO nodes */
448 pg = NODE_DATA(0);
449 else
450 pg = NODE_DATA(node);
451
452 hubdev_info = (struct hubdev_info *)alloc_bootmem_node(pg, size);
453
454 npda->pdinfo = (void *)hubdev_info;
455}
456
457geoid_t
458cnodeid_get_geoid(cnodeid_t cnode)
459{
460 struct hubdev_info *hubdev;
461
462 hubdev = (struct hubdev_info *)(NODEPDA(cnode)->pdinfo);
463 return hubdev->hdi_geoid;
464}
465
466void sn_generate_path(struct pci_bus *pci_bus, char *address)
467{
468 nasid_t nasid;
469 cnodeid_t cnode;
470 geoid_t geoid;
471 moduleid_t moduleid;
472 u16 bricktype;
473
474 nasid = NASID_GET(SN_PCIBUS_BUSSOFT(pci_bus)->bs_base);
475 cnode = nasid_to_cnodeid(nasid);
476 geoid = cnodeid_get_geoid(cnode);
477 moduleid = geo_module(geoid);
478
479 sprintf(address, "module_%c%c%c%c%.2d",
480 '0'+RACK_GET_CLASS(MODULE_GET_RACK(moduleid)),
481 '0'+RACK_GET_GROUP(MODULE_GET_RACK(moduleid)),
482 '0'+RACK_GET_NUM(MODULE_GET_RACK(moduleid)),
483 MODULE_GET_BTCHAR(moduleid), MODULE_GET_BPOS(moduleid));
484
485 /* Tollhouse requires slot id to be displayed */
486 bricktype = MODULE_GET_BTYPE(moduleid);
487 if ((bricktype == L1_BRICKTYPE_191010) ||
488 (bricktype == L1_BRICKTYPE_1932))
489 sprintf(address, "%s^%d", address, geo_slot(geoid));
490}
491
492/*
493 * sn_pci_fixup_bus() - Perform SN specific setup of software structs
494 * (pcibus_bussoft, pcidev_info) and hardware
495 * registers, for the specified bus and devices under it.
496 */
497void __devinit
498sn_pci_fixup_bus(struct pci_bus *bus)
499{
500
501 if (SN_ACPI_BASE_SUPPORT())
502 sn_acpi_bus_fixup(bus);
503 else
504 sn_bus_fixup(bus);
505}
506
507/*
508 * sn_io_early_init - Perform early IO (and some non-IO) initialization.
509 * In particular, setup the sn_pci_provider[] array.
510 * This needs to be done prior to any bus scanning
511 * (acpi_scan_init()) in the ACPI case, as the SN
512 * bus fixup code will reference the array.
513 */
514static int __init
515sn_io_early_init(void)
516{
517 int i;
518
519 if (!ia64_platform_is("sn2") || IS_RUNNING_ON_FAKE_PROM())
520 return 0;
521
522 /*
523 * prime sn_pci_provider[]. Individial provider init routines will
524 * override their respective default entries.
525 */
526
527 for (i = 0; i < PCIIO_ASIC_MAX_TYPES; i++)
528 sn_pci_provider[i] = &sn_pci_default_provider;
529
530 pcibr_init_provider();
531 tioca_init_provider();
532 tioce_init_provider();
533
534 /*
535 * This is needed to avoid bounce limit checks in the blk layer
536 */
537 ia64_max_iommu_merge_mask = ~PAGE_MASK;
538
539 sn_irq_lh_init();
540 INIT_LIST_HEAD(&sn_sysdata_list);
541 sn_init_cpei_timer();
542
543#ifdef CONFIG_PROC_FS
544 register_sn_procfs();
545#endif
546
547 printk(KERN_INFO "ACPI DSDT OEM Rev 0x%x\n",
548 acpi_gbl_DSDT->oem_revision);
549 if (SN_ACPI_BASE_SUPPORT())
550 sn_io_acpi_init();
551 else
552 sn_io_init();
553 return 0;
554}
555
556arch_initcall(sn_io_early_init);
557
558/*
559 * sn_io_late_init() - Perform any final platform specific IO initialization.
560 */
561
562int __init
563sn_io_late_init(void)
564{
565 struct pci_bus *bus;
566 struct pcibus_bussoft *bussoft;
567 cnodeid_t cnode;
568 nasid_t nasid;
569 cnodeid_t near_cnode;
570
571 if (!ia64_platform_is("sn2") || IS_RUNNING_ON_FAKE_PROM())
572 return 0;
573
574 /*
575 * Setup closest node in pci_controller->node for
576 * PIC, TIOCP, TIOCE (TIOCA does it during bus fixup using
577 * info from the PROM).
578 */
579 bus = NULL;
580 while ((bus = pci_find_next_bus(bus)) != NULL) {
581 bussoft = SN_PCIBUS_BUSSOFT(bus);
582 nasid = NASID_GET(bussoft->bs_base);
583 cnode = nasid_to_cnodeid(nasid);
584 if ((bussoft->bs_asic_type == PCIIO_ASIC_TYPE_TIOCP) ||
585 (bussoft->bs_asic_type == PCIIO_ASIC_TYPE_TIOCE)) {
586 /* TIO PCI Bridge: find nearest node with CPUs */
587 int e = sn_hwperf_get_nearest_node(cnode, NULL,
588 &near_cnode);
589 if (e < 0) {
590 near_cnode = (cnodeid_t)-1; /* use any node */
591 printk(KERN_WARNING "pcibr_bus_fixup: failed "
592 "to find near node with CPUs to TIO "
593 "node %d, err=%d\n", cnode, e);
594 }
595 PCI_CONTROLLER(bus)->node = near_cnode;
596 } else if (bussoft->bs_asic_type == PCIIO_ASIC_TYPE_PIC) {
597 PCI_CONTROLLER(bus)->node = cnode;
598 }
599 }
600
601 sn_ioif_inited = 1; /* SN I/O infrastructure now initialized */
602
603 return 0;
604}
605
606fs_initcall(sn_io_late_init);
607
608EXPORT_SYMBOL(sn_pci_fixup_slot);
609EXPORT_SYMBOL(sn_pci_unfixup_slot);
610EXPORT_SYMBOL(sn_bus_store_sysdata);
611EXPORT_SYMBOL(sn_bus_free_sysdata);
612EXPORT_SYMBOL(sn_generate_path);
613
diff --git a/arch/ia64/sn/kernel/io_init.c b/arch/ia64/sn/kernel/io_init.c
index dc09a6a28a37..9ad843e0383b 100644
--- a/arch/ia64/sn/kernel/io_init.c
+++ b/arch/ia64/sn/kernel/io_init.c
@@ -3,103 +3,28 @@
3 * License. See the file "COPYING" in the main directory of this archive 3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details. 4 * for more details.
5 * 5 *
6 * Copyright (C) 1992 - 1997, 2000-2005 Silicon Graphics, Inc. All rights reserved. 6 * Copyright (C) 1992 - 1997, 2000-2006 Silicon Graphics, Inc. All rights reserved.
7 */ 7 */
8 8
9#include <linux/bootmem.h>
10#include <linux/nodemask.h>
11#include <asm/sn/types.h> 9#include <asm/sn/types.h>
12#include <asm/sn/addrs.h> 10#include <asm/sn/addrs.h>
13#include <asm/sn/sn_feature_sets.h>
14#include <asm/sn/geo.h>
15#include <asm/sn/io.h> 11#include <asm/sn/io.h>
16#include <asm/sn/l1.h>
17#include <asm/sn/module.h> 12#include <asm/sn/module.h>
18#include <asm/sn/pcibr_provider.h> 13#include <asm/sn/intr.h>
19#include <asm/sn/pcibus_provider_defs.h> 14#include <asm/sn/pcibus_provider_defs.h>
20#include <asm/sn/pcidev.h> 15#include <asm/sn/pcidev.h>
21#include <asm/sn/simulator.h>
22#include <asm/sn/sn_sal.h> 16#include <asm/sn/sn_sal.h>
23#include <asm/sn/tioca_provider.h>
24#include <asm/sn/tioce_provider.h>
25#include "xtalk/hubdev.h" 17#include "xtalk/hubdev.h"
26#include "xtalk/xwidgetdev.h"
27
28
29extern void sn_init_cpei_timer(void);
30extern void register_sn_procfs(void);
31
32static struct list_head sn_sysdata_list;
33
34/* sysdata list struct */
35struct sysdata_el {
36 struct list_head entry;
37 void *sysdata;
38};
39
40struct slab_info {
41 struct hubdev_info hubdev;
42};
43
44struct brick {
45 moduleid_t id; /* Module ID of this module */
46 struct slab_info slab_info[MAX_SLABS + 1];
47};
48
49int sn_ioif_inited; /* SN I/O infrastructure initialized? */
50
51struct sn_pcibus_provider *sn_pci_provider[PCIIO_ASIC_MAX_TYPES]; /* indexed by asic type */
52
53static int max_segment_number; /* Default highest segment number */
54static int max_pcibus_number = 255; /* Default highest pci bus number */
55 18
56/* 19/*
57 * Hooks and struct for unsupported pci providers 20 * The code in this file will only be executed when running with
21 * a PROM that does _not_ have base ACPI IO support.
22 * (i.e., SN_ACPI_BASE_SUPPORT() == 0)
58 */ 23 */
59 24
60static dma_addr_t 25static int max_segment_number; /* Default highest segment number */
61sn_default_pci_map(struct pci_dev *pdev, unsigned long paddr, size_t size, int type) 26static int max_pcibus_number = 255; /* Default highest pci bus number */
62{
63 return 0;
64}
65
66static void
67sn_default_pci_unmap(struct pci_dev *pdev, dma_addr_t addr, int direction)
68{
69 return;
70}
71
72static void *
73sn_default_pci_bus_fixup(struct pcibus_bussoft *soft, struct pci_controller *controller)
74{
75 return NULL;
76}
77
78static struct sn_pcibus_provider sn_pci_default_provider = {
79 .dma_map = sn_default_pci_map,
80 .dma_map_consistent = sn_default_pci_map,
81 .dma_unmap = sn_default_pci_unmap,
82 .bus_fixup = sn_default_pci_bus_fixup,
83};
84
85/*
86 * Retrieve the DMA Flush List given nasid, widget, and device.
87 * This list is needed to implement the WAR - Flush DMA data on PIO Reads.
88 */
89static inline u64
90sal_get_device_dmaflush_list(u64 nasid, u64 widget_num, u64 device_num,
91 u64 address)
92{
93 struct ia64_sal_retval ret_stuff;
94 ret_stuff.status = 0;
95 ret_stuff.v0 = 0;
96 27
97 SAL_CALL_NOLOCK(ret_stuff,
98 (u64) SN_SAL_IOIF_GET_DEVICE_DMAFLUSH_LIST,
99 (u64) nasid, (u64) widget_num,
100 (u64) device_num, (u64) address, 0, 0, 0);
101 return ret_stuff.status;
102}
103 28
104/* 29/*
105 * Retrieve the hub device info structure for the given nasid. 30 * Retrieve the hub device info structure for the given nasid.
@@ -131,93 +56,20 @@ static inline u64 sal_get_pcibus_info(u64 segment, u64 busnum, u64 address)
131 return ret_stuff.v0; 56 return ret_stuff.v0;
132} 57}
133 58
134/*
135 * Retrieve the pci device information given the bus and device|function number.
136 */
137static inline u64
138sal_get_pcidev_info(u64 segment, u64 bus_number, u64 devfn, u64 pci_dev,
139 u64 sn_irq_info)
140{
141 struct ia64_sal_retval ret_stuff;
142 ret_stuff.status = 0;
143 ret_stuff.v0 = 0;
144
145 SAL_CALL_NOLOCK(ret_stuff,
146 (u64) SN_SAL_IOIF_GET_PCIDEV_INFO,
147 (u64) segment, (u64) bus_number, (u64) devfn,
148 (u64) pci_dev,
149 sn_irq_info, 0, 0);
150 return ret_stuff.v0;
151}
152
153/*
154 * sn_pcidev_info_get() - Retrieve the pcidev_info struct for the specified
155 * device.
156 */
157inline struct pcidev_info *
158sn_pcidev_info_get(struct pci_dev *dev)
159{
160 struct pcidev_info *pcidev;
161
162 list_for_each_entry(pcidev,
163 &(SN_PCI_CONTROLLER(dev)->pcidev_info), pdi_list) {
164 if (pcidev->pdi_linux_pcidev == dev) {
165 return pcidev;
166 }
167 }
168 return NULL;
169}
170
171/* Older PROM flush WAR
172 *
173 * 01/16/06 -- This war will be in place until a new official PROM is released.
174 * Additionally note that the struct sn_flush_device_war also has to be
175 * removed from arch/ia64/sn/include/xtalk/hubdev.h
176 */
177static u8 war_implemented = 0;
178
179static s64 sn_device_fixup_war(u64 nasid, u64 widget, int device,
180 struct sn_flush_device_common *common)
181{
182 struct sn_flush_device_war *war_list;
183 struct sn_flush_device_war *dev_entry;
184 struct ia64_sal_retval isrv = {0,0,0,0};
185
186 if (!war_implemented) {
187 printk(KERN_WARNING "PROM version < 4.50 -- implementing old "
188 "PROM flush WAR\n");
189 war_implemented = 1;
190 }
191
192 war_list = kzalloc(DEV_PER_WIDGET * sizeof(*war_list), GFP_KERNEL);
193 if (!war_list)
194 BUG();
195
196 SAL_CALL_NOLOCK(isrv, SN_SAL_IOIF_GET_WIDGET_DMAFLUSH_LIST,
197 nasid, widget, __pa(war_list), 0, 0, 0 ,0);
198 if (isrv.status)
199 panic("sn_device_fixup_war failed: %s\n",
200 ia64_sal_strerror(isrv.status));
201
202 dev_entry = war_list + device;
203 memcpy(common,dev_entry, sizeof(*common));
204 kfree(war_list);
205
206 return isrv.status;
207}
208 59
209/* 60/*
210 * sn_fixup_ionodes() - This routine initializes the HUB data strcuture for 61 * sn_fixup_ionodes() - This routine initializes the HUB data structure for
211 * each node in the system. 62 * each node in the system. This function is only
63 * executed when running with a non-ACPI capable PROM.
212 */ 64 */
213static void __init sn_fixup_ionodes(void) 65static void __init sn_fixup_ionodes(void)
214{ 66{
215 struct sn_flush_device_kernel *sn_flush_device_kernel; 67
216 struct sn_flush_device_kernel *dev_entry;
217 struct hubdev_info *hubdev; 68 struct hubdev_info *hubdev;
218 u64 status; 69 u64 status;
219 u64 nasid; 70 u64 nasid;
220 int i, widget, device, size; 71 int i;
72 extern void sn_common_hubdev_init(struct hubdev_info *);
221 73
222 /* 74 /*
223 * Get SGI Specific HUB chipset information. 75 * Get SGI Specific HUB chipset information.
@@ -240,70 +92,47 @@ static void __init sn_fixup_ionodes(void)
240 max_segment_number = hubdev->max_segment_number; 92 max_segment_number = hubdev->max_segment_number;
241 max_pcibus_number = hubdev->max_pcibus_number; 93 max_pcibus_number = hubdev->max_pcibus_number;
242 } 94 }
95 sn_common_hubdev_init(hubdev);
96 }
97}
243 98
244 /* Attach the error interrupt handlers */ 99/*
245 if (nasid & 1) 100 * sn_pci_legacy_window_fixup - Create PCI controller windows for
246 ice_error_init(hubdev); 101 * legacy IO and MEM space. This needs to
247 else 102 * be done here, as the PROM does not have
248 hub_error_init(hubdev); 103 * ACPI support defining the root buses
249 104 * and their resources (_CRS),
250 for (widget = 0; widget <= HUB_WIDGET_ID_MAX; widget++) 105 */
251 hubdev->hdi_xwidget_info[widget].xwi_hubinfo = hubdev; 106static void
252 107sn_legacy_pci_window_fixup(struct pci_controller *controller,
253 if (!hubdev->hdi_flush_nasid_list.widget_p) 108 u64 legacy_io, u64 legacy_mem)
254 continue; 109{
255 110 controller->window = kcalloc(2, sizeof(struct pci_window),
256 size = (HUB_WIDGET_ID_MAX + 1) * 111 GFP_KERNEL);
257 sizeof(struct sn_flush_device_kernel *); 112 if (controller->window == NULL)
258 hubdev->hdi_flush_nasid_list.widget_p =
259 kzalloc(size, GFP_KERNEL);
260 if (!hubdev->hdi_flush_nasid_list.widget_p)
261 BUG(); 113 BUG();
262 114 controller->window[0].offset = legacy_io;
263 for (widget = 0; widget <= HUB_WIDGET_ID_MAX; widget++) { 115 controller->window[0].resource.name = "legacy_io";
264 size = DEV_PER_WIDGET * 116 controller->window[0].resource.flags = IORESOURCE_IO;
265 sizeof(struct sn_flush_device_kernel); 117 controller->window[0].resource.start = legacy_io;
266 sn_flush_device_kernel = kzalloc(size, GFP_KERNEL); 118 controller->window[0].resource.end =
267 if (!sn_flush_device_kernel) 119 controller->window[0].resource.start + 0xffff;
268 BUG(); 120 controller->window[0].resource.parent = &ioport_resource;
269 121 controller->window[1].offset = legacy_mem;
270 dev_entry = sn_flush_device_kernel; 122 controller->window[1].resource.name = "legacy_mem";
271 for (device = 0; device < DEV_PER_WIDGET; 123 controller->window[1].resource.flags = IORESOURCE_MEM;
272 device++,dev_entry++) { 124 controller->window[1].resource.start = legacy_mem;
273 size = sizeof(struct sn_flush_device_common); 125 controller->window[1].resource.end =
274 dev_entry->common = kzalloc(size, GFP_KERNEL); 126 controller->window[1].resource.start + (1024 * 1024) - 1;
275 if (!dev_entry->common) 127 controller->window[1].resource.parent = &iomem_resource;
276 BUG(); 128 controller->windows = 2;
277
278 if (sn_prom_feature_available(
279 PRF_DEVICE_FLUSH_LIST))
280 status = sal_get_device_dmaflush_list(
281 nasid, widget, device,
282 (u64)(dev_entry->common));
283 else
284 status = sn_device_fixup_war(nasid,
285 widget, device,
286 dev_entry->common);
287 if (status != SALRET_OK)
288 panic("SAL call failed: %s\n",
289 ia64_sal_strerror(status));
290
291 spin_lock_init(&dev_entry->sfdl_flush_lock);
292 }
293
294 if (sn_flush_device_kernel)
295 hubdev->hdi_flush_nasid_list.widget_p[widget] =
296 sn_flush_device_kernel;
297 }
298 }
299} 129}
300 130
301/* 131/*
302 * sn_pci_window_fixup() - Create a pci_window for each device resource. 132 * sn_pci_window_fixup() - Create a pci_window for each device resource.
303 * Until ACPI support is added, we need this code 133 * It will setup pci_windows for use by
304 * to setup pci_windows for use by 134 * pcibios_bus_to_resource(), pcibios_resource_to_bus(),
305 * pcibios_bus_to_resource(), 135 * etc.
306 * pcibios_resource_to_bus(), etc.
307 */ 136 */
308static void 137static void
309sn_pci_window_fixup(struct pci_dev *dev, unsigned int count, 138sn_pci_window_fixup(struct pci_dev *dev, unsigned int count,
@@ -342,60 +171,22 @@ sn_pci_window_fixup(struct pci_dev *dev, unsigned int count,
342 controller->window = new_window; 171 controller->window = new_window;
343} 172}
344 173
345void sn_pci_unfixup_slot(struct pci_dev *dev)
346{
347 struct pci_dev *host_pci_dev = SN_PCIDEV_INFO(dev)->host_pci_dev;
348
349 sn_irq_unfixup(dev);
350 pci_dev_put(host_pci_dev);
351 pci_dev_put(dev);
352}
353
354/* 174/*
355 * sn_pci_fixup_slot() - This routine sets up a slot's resources 175 * sn_more_slot_fixup() - We are not running with an ACPI capable PROM,
356 * consistent with the Linux PCI abstraction layer. Resources acquired 176 * and need to convert the pci_dev->resource
357 * from our PCI provider include PIO maps to BAR space and interrupt 177 * 'start' and 'end' addresses to mapped addresses,
358 * objects. 178 * and setup the pci_controller->window array entries.
359 */ 179 */
360void sn_pci_fixup_slot(struct pci_dev *dev) 180void
181sn_more_slot_fixup(struct pci_dev *dev, struct pcidev_info *pcidev_info)
361{ 182{
362 unsigned int count = 0; 183 unsigned int count = 0;
363 int idx; 184 int idx;
364 int segment = pci_domain_nr(dev->bus);
365 int status = 0;
366 struct pcibus_bussoft *bs;
367 struct pci_bus *host_pci_bus;
368 struct pci_dev *host_pci_dev;
369 struct pcidev_info *pcidev_info;
370 s64 pci_addrs[PCI_ROM_RESOURCE + 1]; 185 s64 pci_addrs[PCI_ROM_RESOURCE + 1];
371 struct sn_irq_info *sn_irq_info; 186 unsigned long addr, end, size, start;
372 unsigned long size;
373 unsigned int bus_no, devfn;
374
375 pci_dev_get(dev); /* for the sysdata pointer */
376 pcidev_info = kzalloc(sizeof(struct pcidev_info), GFP_KERNEL);
377 if (!pcidev_info)
378 BUG(); /* Cannot afford to run out of memory */
379
380 sn_irq_info = kzalloc(sizeof(struct sn_irq_info), GFP_KERNEL);
381 if (!sn_irq_info)
382 BUG(); /* Cannot afford to run out of memory */
383
384 /* Call to retrieve pci device information needed by kernel. */
385 status = sal_get_pcidev_info((u64) segment, (u64) dev->bus->number,
386 dev->devfn,
387 (u64) __pa(pcidev_info),
388 (u64) __pa(sn_irq_info));
389 if (status)
390 BUG(); /* Cannot get platform pci device information */
391
392 /* Add pcidev_info to list in sn_pci_controller struct */
393 list_add_tail(&pcidev_info->pdi_list,
394 &(SN_PCI_CONTROLLER(dev->bus)->pcidev_info));
395 187
396 /* Copy over PIO Mapped Addresses */ 188 /* Copy over PIO Mapped Addresses */
397 for (idx = 0; idx <= PCI_ROM_RESOURCE; idx++) { 189 for (idx = 0; idx <= PCI_ROM_RESOURCE; idx++) {
398 unsigned long start, end, addr;
399 190
400 if (!pcidev_info->pdi_pio_mapped_addr[idx]) { 191 if (!pcidev_info->pdi_pio_mapped_addr[idx]) {
401 pci_addrs[idx] = -1; 192 pci_addrs[idx] = -1;
@@ -419,60 +210,28 @@ void sn_pci_fixup_slot(struct pci_dev *dev)
419 dev->resource[idx].parent = &ioport_resource; 210 dev->resource[idx].parent = &ioport_resource;
420 else 211 else
421 dev->resource[idx].parent = &iomem_resource; 212 dev->resource[idx].parent = &iomem_resource;
213 /* If ROM, mark as shadowed in PROM */
214 if (idx == PCI_ROM_RESOURCE)
215 dev->resource[idx].flags |= IORESOURCE_ROM_BIOS_COPY;
422 } 216 }
423 /* Create a pci_window in the pci_controller struct for 217 /* Create a pci_window in the pci_controller struct for
424 * each device resource. 218 * each device resource.
425 */ 219 */
426 if (count > 0) 220 if (count > 0)
427 sn_pci_window_fixup(dev, count, pci_addrs); 221 sn_pci_window_fixup(dev, count, pci_addrs);
428
429 /*
430 * Using the PROMs values for the PCI host bus, get the Linux
431 * PCI host_pci_dev struct and set up host bus linkages
432 */
433
434 bus_no = (pcidev_info->pdi_slot_host_handle >> 32) & 0xff;
435 devfn = pcidev_info->pdi_slot_host_handle & 0xffffffff;
436 host_pci_bus = pci_find_bus(segment, bus_no);
437 host_pci_dev = pci_get_slot(host_pci_bus, devfn);
438
439 pcidev_info->host_pci_dev = host_pci_dev;
440 pcidev_info->pdi_linux_pcidev = dev;
441 pcidev_info->pdi_host_pcidev_info = SN_PCIDEV_INFO(host_pci_dev);
442 bs = SN_PCIBUS_BUSSOFT(dev->bus);
443 pcidev_info->pdi_pcibus_info = bs;
444
445 if (bs && bs->bs_asic_type < PCIIO_ASIC_MAX_TYPES) {
446 SN_PCIDEV_BUSPROVIDER(dev) = sn_pci_provider[bs->bs_asic_type];
447 } else {
448 SN_PCIDEV_BUSPROVIDER(dev) = &sn_pci_default_provider;
449 }
450
451 /* Only set up IRQ stuff if this device has a host bus context */
452 if (bs && sn_irq_info->irq_irq) {
453 pcidev_info->pdi_sn_irq_info = sn_irq_info;
454 dev->irq = pcidev_info->pdi_sn_irq_info->irq_irq;
455 sn_irq_fixup(dev, sn_irq_info);
456 } else {
457 pcidev_info->pdi_sn_irq_info = NULL;
458 kfree(sn_irq_info);
459 }
460} 222}
461 223
462/* 224/*
463 * sn_pci_controller_fixup() - This routine sets up a bus's resources 225 * sn_pci_controller_fixup() - This routine sets up a bus's resources
464 * consistent with the Linux PCI abstraction layer. 226 * consistent with the Linux PCI abstraction layer.
465 */ 227 */
466void sn_pci_controller_fixup(int segment, int busnum, struct pci_bus *bus) 228static void
229sn_pci_controller_fixup(int segment, int busnum, struct pci_bus *bus)
467{ 230{
468 int status; 231 s64 status = 0;
469 int nasid, cnode;
470 struct pci_controller *controller; 232 struct pci_controller *controller;
471 struct sn_pci_controller *sn_controller;
472 struct pcibus_bussoft *prom_bussoft_ptr; 233 struct pcibus_bussoft *prom_bussoft_ptr;
473 struct hubdev_info *hubdev_info; 234
474 void *provider_soft;
475 struct sn_pcibus_provider *provider;
476 235
477 status = sal_get_pcibus_info((u64) segment, (u64) busnum, 236 status = sal_get_pcibus_info((u64) segment, (u64) busnum,
478 (u64) ia64_tpa(&prom_bussoft_ptr)); 237 (u64) ia64_tpa(&prom_bussoft_ptr));
@@ -480,261 +239,77 @@ void sn_pci_controller_fixup(int segment, int busnum, struct pci_bus *bus)
480 return; /*bus # does not exist */ 239 return; /*bus # does not exist */
481 prom_bussoft_ptr = __va(prom_bussoft_ptr); 240 prom_bussoft_ptr = __va(prom_bussoft_ptr);
482 241
483 /* Allocate a sn_pci_controller, which has a pci_controller struct 242 controller = kzalloc(sizeof(*controller), GFP_KERNEL);
484 * as the first member. 243 if (!controller)
485 */
486 sn_controller = kzalloc(sizeof(struct sn_pci_controller), GFP_KERNEL);
487 if (!sn_controller)
488 BUG(); 244 BUG();
489 INIT_LIST_HEAD(&sn_controller->pcidev_info);
490 controller = &sn_controller->pci_controller;
491 controller->segment = segment; 245 controller->segment = segment;
492 246
493 if (bus == NULL) {
494 bus = pci_scan_bus(busnum, &pci_root_ops, controller);
495 if (bus == NULL)
496 goto error_return; /* error, or bus already scanned */
497 bus->sysdata = NULL;
498 }
499
500 if (bus->sysdata)
501 goto error_return; /* sysdata already alloc'd */
502
503 /* 247 /*
504 * Per-provider fixup. Copies the contents from prom to local 248 * Temporarily save the prom_bussoft_ptr for use by sn_bus_fixup().
505 * area and links SN_PCIBUS_BUSSOFT(). 249 * (platform_data will be overwritten later in sn_common_bus_fixup())
506 */ 250 */
251 controller->platform_data = prom_bussoft_ptr;
507 252
508 if (prom_bussoft_ptr->bs_asic_type >= PCIIO_ASIC_MAX_TYPES) 253 bus = pci_scan_bus(busnum, &pci_root_ops, controller);
509 goto error_return; /* unsupported asic type */ 254 if (bus == NULL)
510 255 goto error_return; /* error, or bus already scanned */
511 if (prom_bussoft_ptr->bs_asic_type == PCIIO_ASIC_TYPE_PPB)
512 goto error_return; /* no further fixup necessary */
513
514 provider = sn_pci_provider[prom_bussoft_ptr->bs_asic_type];
515 if (provider == NULL)
516 goto error_return; /* no provider registerd for this asic */
517 256
518 bus->sysdata = controller; 257 bus->sysdata = controller;
519 if (provider->bus_fixup)
520 provider_soft = (*provider->bus_fixup) (prom_bussoft_ptr, controller);
521 else
522 provider_soft = NULL;
523
524 if (provider_soft == NULL) {
525 /* fixup failed or not applicable */
526 bus->sysdata = NULL;
527 goto error_return;
528 }
529
530 /*
531 * Setup pci_windows for legacy IO and MEM space.
532 * (Temporary until ACPI support is in place.)
533 */
534 controller->window = kcalloc(2, sizeof(struct pci_window), GFP_KERNEL);
535 if (controller->window == NULL)
536 BUG();
537 controller->window[0].offset = prom_bussoft_ptr->bs_legacy_io;
538 controller->window[0].resource.name = "legacy_io";
539 controller->window[0].resource.flags = IORESOURCE_IO;
540 controller->window[0].resource.start = prom_bussoft_ptr->bs_legacy_io;
541 controller->window[0].resource.end =
542 controller->window[0].resource.start + 0xffff;
543 controller->window[0].resource.parent = &ioport_resource;
544 controller->window[1].offset = prom_bussoft_ptr->bs_legacy_mem;
545 controller->window[1].resource.name = "legacy_mem";
546 controller->window[1].resource.flags = IORESOURCE_MEM;
547 controller->window[1].resource.start = prom_bussoft_ptr->bs_legacy_mem;
548 controller->window[1].resource.end =
549 controller->window[1].resource.start + (1024 * 1024) - 1;
550 controller->window[1].resource.parent = &iomem_resource;
551 controller->windows = 2;
552
553 /*
554 * Generic bus fixup goes here. Don't reference prom_bussoft_ptr
555 * after this point.
556 */
557
558 PCI_CONTROLLER(bus)->platform_data = provider_soft;
559 nasid = NASID_GET(SN_PCIBUS_BUSSOFT(bus)->bs_base);
560 cnode = nasid_to_cnodeid(nasid);
561 hubdev_info = (struct hubdev_info *)(NODEPDA(cnode)->pdinfo);
562 SN_PCIBUS_BUSSOFT(bus)->bs_xwidget_info =
563 &(hubdev_info->hdi_xwidget_info[SN_PCIBUS_BUSSOFT(bus)->bs_xid]);
564 258
565 /*
566 * If the node information we obtained during the fixup phase is invalid
567 * then set controller->node to -1 (undetermined)
568 */
569 if (controller->node >= num_online_nodes()) {
570 struct pcibus_bussoft *b = SN_PCIBUS_BUSSOFT(bus);
571
572 printk(KERN_WARNING "Device ASIC=%u XID=%u PBUSNUM=%u"
573 "L_IO=%lx L_MEM=%lx BASE=%lx\n",
574 b->bs_asic_type, b->bs_xid, b->bs_persist_busnum,
575 b->bs_legacy_io, b->bs_legacy_mem, b->bs_base);
576 printk(KERN_WARNING "on node %d but only %d nodes online."
577 "Association set to undetermined.\n",
578 controller->node, num_online_nodes());
579 controller->node = -1;
580 }
581 return; 259 return;
582 260
583error_return: 261error_return:
584 262
585 kfree(sn_controller); 263 kfree(controller);
586 return; 264 return;
587} 265}
588 266
589void sn_bus_store_sysdata(struct pci_dev *dev) 267/*
268 * sn_bus_fixup
269 */
270void
271sn_bus_fixup(struct pci_bus *bus)
590{ 272{
591 struct sysdata_el *element; 273 struct pci_dev *pci_dev = NULL;
592 274 struct pcibus_bussoft *prom_bussoft_ptr;
593 element = kzalloc(sizeof(struct sysdata_el), GFP_KERNEL); 275 extern void sn_common_bus_fixup(struct pci_bus *,
594 if (!element) { 276 struct pcibus_bussoft *);
595 dev_dbg(dev, "%s: out of memory!\n", __FUNCTION__); 277
596 return; 278
597 } 279 if (!bus->parent) { /* If root bus */
598 element->sysdata = SN_PCIDEV_INFO(dev); 280 prom_bussoft_ptr = PCI_CONTROLLER(bus)->platform_data;
599 list_add(&element->entry, &sn_sysdata_list); 281 if (prom_bussoft_ptr == NULL) {
600} 282 printk(KERN_ERR
283 "sn_bus_fixup: 0x%04x:0x%02x Unable to "
284 "obtain prom_bussoft_ptr\n",
285 pci_domain_nr(bus), bus->number);
286 return;
287 }
288 sn_common_bus_fixup(bus, prom_bussoft_ptr);
289 sn_legacy_pci_window_fixup(PCI_CONTROLLER(bus),
290 prom_bussoft_ptr->bs_legacy_io,
291 prom_bussoft_ptr->bs_legacy_mem);
292 }
293 list_for_each_entry(pci_dev, &bus->devices, bus_list) {
294 sn_pci_fixup_slot(pci_dev);
295 }
601 296
602void sn_bus_free_sysdata(void)
603{
604 struct sysdata_el *element;
605 struct list_head *list, *safe;
606
607 list_for_each_safe(list, safe, &sn_sysdata_list) {
608 element = list_entry(list, struct sysdata_el, entry);
609 list_del(&element->entry);
610 list_del(&(((struct pcidev_info *)
611 (element->sysdata))->pdi_list));
612 kfree(element->sysdata);
613 kfree(element);
614 }
615 return;
616} 297}
617 298
618/* 299/*
619 * Ugly hack to get PCI setup until we have a proper ACPI namespace. 300 * sn_io_init - PROM does not have ACPI support to define nodes or root buses,
301 * so we need to do things the hard way, including initiating the
302 * bus scanning ourselves.
620 */ 303 */
621 304
622#define PCI_BUSES_TO_SCAN 256 305void __init sn_io_init(void)
623
624static int __init sn_pci_init(void)
625{ 306{
626 int i, j; 307 int i, j;
627 struct pci_dev *pci_dev = NULL;
628
629 if (!ia64_platform_is("sn2") || IS_RUNNING_ON_FAKE_PROM())
630 return 0;
631
632 /*
633 * prime sn_pci_provider[]. Individial provider init routines will
634 * override their respective default entries.
635 */
636
637 for (i = 0; i < PCIIO_ASIC_MAX_TYPES; i++)
638 sn_pci_provider[i] = &sn_pci_default_provider;
639 308
640 pcibr_init_provider();
641 tioca_init_provider();
642 tioce_init_provider();
643
644 /*
645 * This is needed to avoid bounce limit checks in the blk layer
646 */
647 ia64_max_iommu_merge_mask = ~PAGE_MASK;
648 sn_fixup_ionodes(); 309 sn_fixup_ionodes();
649 sn_irq_lh_init();
650 INIT_LIST_HEAD(&sn_sysdata_list);
651 sn_init_cpei_timer();
652
653#ifdef CONFIG_PROC_FS
654 register_sn_procfs();
655#endif
656 310
657 /* busses are not known yet ... */ 311 /* busses are not known yet ... */
658 for (i = 0; i <= max_segment_number; i++) 312 for (i = 0; i <= max_segment_number; i++)
659 for (j = 0; j <= max_pcibus_number; j++) 313 for (j = 0; j <= max_pcibus_number; j++)
660 sn_pci_controller_fixup(i, j, NULL); 314 sn_pci_controller_fixup(i, j, NULL);
661
662 /*
663 * Generic Linux PCI Layer has created the pci_bus and pci_dev
664 * structures - time for us to add our SN PLatform specific
665 * information.
666 */
667
668 while ((pci_dev =
669 pci_get_device(PCI_ANY_ID, PCI_ANY_ID, pci_dev)) != NULL)
670 sn_pci_fixup_slot(pci_dev);
671
672 sn_ioif_inited = 1; /* sn I/O infrastructure now initialized */
673
674 return 0;
675}
676
677/*
678 * hubdev_init_node() - Creates the HUB data structure and link them to it's
679 * own NODE specific data area.
680 */
681void hubdev_init_node(nodepda_t * npda, cnodeid_t node)
682{
683 struct hubdev_info *hubdev_info;
684 int size;
685 pg_data_t *pg;
686
687 size = sizeof(struct hubdev_info);
688
689 if (node >= num_online_nodes()) /* Headless/memless IO nodes */
690 pg = NODE_DATA(0);
691 else
692 pg = NODE_DATA(node);
693
694 hubdev_info = (struct hubdev_info *)alloc_bootmem_node(pg, size);
695
696 npda->pdinfo = (void *)hubdev_info;
697} 315}
698
699geoid_t
700cnodeid_get_geoid(cnodeid_t cnode)
701{
702 struct hubdev_info *hubdev;
703
704 hubdev = (struct hubdev_info *)(NODEPDA(cnode)->pdinfo);
705 return hubdev->hdi_geoid;
706}
707
708void sn_generate_path(struct pci_bus *pci_bus, char *address)
709{
710 nasid_t nasid;
711 cnodeid_t cnode;
712 geoid_t geoid;
713 moduleid_t moduleid;
714 u16 bricktype;
715
716 nasid = NASID_GET(SN_PCIBUS_BUSSOFT(pci_bus)->bs_base);
717 cnode = nasid_to_cnodeid(nasid);
718 geoid = cnodeid_get_geoid(cnode);
719 moduleid = geo_module(geoid);
720
721 sprintf(address, "module_%c%c%c%c%.2d",
722 '0'+RACK_GET_CLASS(MODULE_GET_RACK(moduleid)),
723 '0'+RACK_GET_GROUP(MODULE_GET_RACK(moduleid)),
724 '0'+RACK_GET_NUM(MODULE_GET_RACK(moduleid)),
725 MODULE_GET_BTCHAR(moduleid), MODULE_GET_BPOS(moduleid));
726
727 /* Tollhouse requires slot id to be displayed */
728 bricktype = MODULE_GET_BTYPE(moduleid);
729 if ((bricktype == L1_BRICKTYPE_191010) ||
730 (bricktype == L1_BRICKTYPE_1932))
731 sprintf(address, "%s^%d", address, geo_slot(geoid));
732}
733
734subsys_initcall(sn_pci_init);
735EXPORT_SYMBOL(sn_pci_fixup_slot);
736EXPORT_SYMBOL(sn_pci_unfixup_slot);
737EXPORT_SYMBOL(sn_pci_controller_fixup);
738EXPORT_SYMBOL(sn_bus_store_sysdata);
739EXPORT_SYMBOL(sn_bus_free_sysdata);
740EXPORT_SYMBOL(sn_generate_path);
diff --git a/arch/ia64/sn/kernel/iomv.c b/arch/ia64/sn/kernel/iomv.c
index 7ce3cdad627b..4aa4f301d56d 100644
--- a/arch/ia64/sn/kernel/iomv.c
+++ b/arch/ia64/sn/kernel/iomv.c
@@ -3,10 +3,11 @@
3 * License. See the file "COPYING" in the main directory of this archive 3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details. 4 * for more details.
5 * 5 *
6 * Copyright (C) 2000-2003 Silicon Graphics, Inc. All rights reserved. 6 * Copyright (C) 2000-2003, 2006 Silicon Graphics, Inc. All rights reserved.
7 */ 7 */
8 8
9#include <linux/module.h> 9#include <linux/module.h>
10#include <linux/acpi.h>
10#include <asm/io.h> 11#include <asm/io.h>
11#include <asm/delay.h> 12#include <asm/delay.h>
12#include <asm/vga.h> 13#include <asm/vga.h>
@@ -15,6 +16,7 @@
15#include <asm/sn/pda.h> 16#include <asm/sn/pda.h>
16#include <asm/sn/sn_cpuid.h> 17#include <asm/sn/sn_cpuid.h>
17#include <asm/sn/shub_mmr.h> 18#include <asm/sn/shub_mmr.h>
19#include <asm/sn/acpi.h>
18 20
19#define IS_LEGACY_VGA_IOPORT(p) \ 21#define IS_LEGACY_VGA_IOPORT(p) \
20 (((p) >= 0x3b0 && (p) <= 0x3bb) || ((p) >= 0x3c0 && (p) <= 0x3df)) 22 (((p) >= 0x3b0 && (p) <= 0x3bb) || ((p) >= 0x3c0 && (p) <= 0x3df))
@@ -31,11 +33,14 @@ void *sn_io_addr(unsigned long port)
31{ 33{
32 if (!IS_RUNNING_ON_SIMULATOR()) { 34 if (!IS_RUNNING_ON_SIMULATOR()) {
33 if (IS_LEGACY_VGA_IOPORT(port)) 35 if (IS_LEGACY_VGA_IOPORT(port))
34 port += vga_console_iobase; 36 return (__ia64_mk_io_addr(port));
35 /* On sn2, legacy I/O ports don't point at anything */ 37 /* On sn2, legacy I/O ports don't point at anything */
36 if (port < (64 * 1024)) 38 if (port < (64 * 1024))
37 return NULL; 39 return NULL;
38 return ((void *)(port | __IA64_UNCACHED_OFFSET)); 40 if (SN_ACPI_BASE_SUPPORT())
41 return (__ia64_mk_io_addr(port));
42 else
43 return ((void *)(port | __IA64_UNCACHED_OFFSET));
39 } else { 44 } else {
40 /* but the simulator uses them... */ 45 /* but the simulator uses them... */
41 unsigned long addr; 46 unsigned long addr;
diff --git a/arch/ia64/sn/kernel/setup.c b/arch/ia64/sn/kernel/setup.c
index 7a2d824c5ce3..1d009f93244d 100644
--- a/arch/ia64/sn/kernel/setup.c
+++ b/arch/ia64/sn/kernel/setup.c
@@ -388,6 +388,14 @@ void __init sn_setup(char **cmdline_p)
388 ia64_sn_plat_set_error_handling_features(); // obsolete 388 ia64_sn_plat_set_error_handling_features(); // obsolete
389 ia64_sn_set_os_feature(OSF_MCA_SLV_TO_OS_INIT_SLV); 389 ia64_sn_set_os_feature(OSF_MCA_SLV_TO_OS_INIT_SLV);
390 ia64_sn_set_os_feature(OSF_FEAT_LOG_SBES); 390 ia64_sn_set_os_feature(OSF_FEAT_LOG_SBES);
391 /*
392 * Note: The calls to notify the PROM of ACPI and PCI Segment
393 * support must be done prior to acpi_load_tables(), as
394 * an ACPI capable PROM will rebuild the DSDT as result
395 * of the call.
396 */
397 ia64_sn_set_os_feature(OSF_PCISEGMENT_ENABLE);
398 ia64_sn_set_os_feature(OSF_ACPI_ENABLE);
391 399
392 400
393#if defined(CONFIG_VT) && defined(CONFIG_VGA_CONSOLE) 401#if defined(CONFIG_VT) && defined(CONFIG_VGA_CONSOLE)
@@ -413,6 +421,16 @@ void __init sn_setup(char **cmdline_p)
413 if (! vga_console_membase) 421 if (! vga_console_membase)
414 sn_scan_pcdp(); 422 sn_scan_pcdp();
415 423
424 /*
425 * Setup legacy IO space.
426 * vga_console_iobase maps to PCI IO Space address 0 on the
427 * bus containing the VGA console.
428 */
429 if (vga_console_iobase) {
430 io_space[0].mmio_base = vga_console_iobase;
431 io_space[0].sparse = 0;
432 }
433
416 if (vga_console_membase) { 434 if (vga_console_membase) {
417 /* usable vga ... make tty0 the preferred default console */ 435 /* usable vga ... make tty0 the preferred default console */
418 if (!strstr(*cmdline_p, "console=")) 436 if (!strstr(*cmdline_p, "console="))
diff --git a/arch/ia64/sn/kernel/tiocx.c b/arch/ia64/sn/kernel/tiocx.c
index feaf1a6e8101..493380b2c05f 100644
--- a/arch/ia64/sn/kernel/tiocx.c
+++ b/arch/ia64/sn/kernel/tiocx.c
@@ -552,7 +552,7 @@ static void __exit tiocx_exit(void)
552 bus_unregister(&tiocx_bus_type); 552 bus_unregister(&tiocx_bus_type);
553} 553}
554 554
555subsys_initcall(tiocx_init); 555fs_initcall(tiocx_init);
556module_exit(tiocx_exit); 556module_exit(tiocx_exit);
557 557
558/************************************************************************ 558/************************************************************************
diff --git a/arch/ia64/sn/pci/pcibr/pcibr_provider.c b/arch/ia64/sn/pci/pcibr/pcibr_provider.c
index 27dd7df0f446..6846dc9b432d 100644
--- a/arch/ia64/sn/pci/pcibr/pcibr_provider.c
+++ b/arch/ia64/sn/pci/pcibr/pcibr_provider.c
@@ -3,7 +3,7 @@
3 * License. See the file "COPYING" in the main directory of this archive 3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details. 4 * for more details.
5 * 5 *
6 * Copyright (C) 2001-2004 Silicon Graphics, Inc. All rights reserved. 6 * Copyright (C) 2001-2004, 2006 Silicon Graphics, Inc. All rights reserved.
7 */ 7 */
8 8
9#include <linux/interrupt.h> 9#include <linux/interrupt.h>
@@ -109,7 +109,6 @@ void *
109pcibr_bus_fixup(struct pcibus_bussoft *prom_bussoft, struct pci_controller *controller) 109pcibr_bus_fixup(struct pcibus_bussoft *prom_bussoft, struct pci_controller *controller)
110{ 110{
111 int nasid, cnode, j; 111 int nasid, cnode, j;
112 cnodeid_t near_cnode;
113 struct hubdev_info *hubdev_info; 112 struct hubdev_info *hubdev_info;
114 struct pcibus_info *soft; 113 struct pcibus_info *soft;
115 struct sn_flush_device_kernel *sn_flush_device_kernel; 114 struct sn_flush_device_kernel *sn_flush_device_kernel;
@@ -186,20 +185,6 @@ pcibr_bus_fixup(struct pcibus_bussoft *prom_bussoft, struct pci_controller *cont
186 return NULL; 185 return NULL;
187 } 186 }
188 187
189 if (prom_bussoft->bs_asic_type == PCIIO_ASIC_TYPE_TIOCP) {
190 /* TIO PCI Bridge: find nearest node with CPUs */
191 int e = sn_hwperf_get_nearest_node(cnode, NULL, &near_cnode);
192
193 if (e < 0) {
194 near_cnode = (cnodeid_t)-1; /* use any node */
195 printk(KERN_WARNING "pcibr_bus_fixup: failed to find "
196 "near node with CPUs to TIO node %d, err=%d\n",
197 cnode, e);
198 }
199 controller->node = near_cnode;
200 }
201 else
202 controller->node = cnode;
203 return soft; 188 return soft;
204} 189}
205 190
diff --git a/arch/ia64/sn/pci/tioce_provider.c b/arch/ia64/sn/pci/tioce_provider.c
index 46e16dcf5971..35f854fb6120 100644
--- a/arch/ia64/sn/pci/tioce_provider.c
+++ b/arch/ia64/sn/pci/tioce_provider.c
@@ -15,7 +15,6 @@
15#include <asm/sn/pcidev.h> 15#include <asm/sn/pcidev.h>
16#include <asm/sn/pcibus_provider_defs.h> 16#include <asm/sn/pcibus_provider_defs.h>
17#include <asm/sn/tioce_provider.h> 17#include <asm/sn/tioce_provider.h>
18#include <asm/sn/sn2/sn_hwperf.h>
19 18
20/* 19/*
21 * 1/26/2006 20 * 1/26/2006
@@ -990,8 +989,6 @@ tioce_target_interrupt(struct sn_irq_info *sn_irq_info)
990static void * 989static void *
991tioce_bus_fixup(struct pcibus_bussoft *prom_bussoft, struct pci_controller *controller) 990tioce_bus_fixup(struct pcibus_bussoft *prom_bussoft, struct pci_controller *controller)
992{ 991{
993 int my_nasid;
994 cnodeid_t my_cnode, mem_cnode;
995 struct tioce_common *tioce_common; 992 struct tioce_common *tioce_common;
996 struct tioce_kernel *tioce_kern; 993 struct tioce_kernel *tioce_kern;
997 struct tioce __iomem *tioce_mmr; 994 struct tioce __iomem *tioce_mmr;
@@ -1035,21 +1032,6 @@ tioce_bus_fixup(struct pcibus_bussoft *prom_bussoft, struct pci_controller *cont
1035 tioce_common->ce_pcibus.bs_persist_segment, 1032 tioce_common->ce_pcibus.bs_persist_segment,
1036 tioce_common->ce_pcibus.bs_persist_busnum); 1033 tioce_common->ce_pcibus.bs_persist_busnum);
1037 1034
1038 /*
1039 * identify closest nasid for memory allocations
1040 */
1041
1042 my_nasid = NASID_GET(tioce_common->ce_pcibus.bs_base);
1043 my_cnode = nasid_to_cnodeid(my_nasid);
1044
1045 if (sn_hwperf_get_nearest_node(my_cnode, &mem_cnode, NULL) < 0) {
1046 printk(KERN_WARNING "tioce_bus_fixup: failed to find "
1047 "closest node with MEM to TIO node %d\n", my_cnode);
1048 mem_cnode = (cnodeid_t)-1; /* use any node */
1049 }
1050
1051 controller->node = mem_cnode;
1052
1053 return tioce_common; 1035 return tioce_common;
1054} 1036}
1055 1037
diff --git a/arch/powerpc/platforms/powermac/pci.c b/arch/powerpc/platforms/powermac/pci.c
index 9923adc5248e..257dc9068468 100644
--- a/arch/powerpc/platforms/powermac/pci.c
+++ b/arch/powerpc/platforms/powermac/pci.c
@@ -48,7 +48,6 @@ static struct pci_controller *u3_ht;
48static int has_second_ohare; 48static int has_second_ohare;
49#endif /* CONFIG_PPC64 */ 49#endif /* CONFIG_PPC64 */
50 50
51extern u8 pci_cache_line_size;
52extern int pcibios_assign_bus_offset; 51extern int pcibios_assign_bus_offset;
53 52
54struct device_node *k2_skiplist[2]; 53struct device_node *k2_skiplist[2];
diff --git a/arch/sparc64/kernel/pci.c b/arch/sparc64/kernel/pci.c
index e02f01b644af..dfc41cd4bb5d 100644
--- a/arch/sparc64/kernel/pci.c
+++ b/arch/sparc64/kernel/pci.c
@@ -646,13 +646,4 @@ int pci_domain_nr(struct pci_bus *pbus)
646} 646}
647EXPORT_SYMBOL(pci_domain_nr); 647EXPORT_SYMBOL(pci_domain_nr);
648 648
649int pcibios_prep_mwi(struct pci_dev *dev)
650{
651 /* We set correct PCI_CACHE_LINE_SIZE register values for every
652 * device probed on this platform. So there is nothing to check
653 * and this always succeeds.
654 */
655 return 0;
656}
657
658#endif /* !(CONFIG_PCI) */ 649#endif /* !(CONFIG_PCI) */