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authorKumar Gala <galak@kernel.crashing.org>2007-05-15 17:12:27 -0400
committerPaul Mackerras <paulus@samba.org>2007-05-17 07:10:17 -0400
commit5c1992f83304cf2d56934dd6c06709b96e1b0c81 (patch)
treecadce665cce8a79b7b0a6eb8c4be5a68aa904895 /arch
parentc0fabf7535f827cebf938ac5e44863089ae7eafd (diff)
[POWERPC] Removed hardcoded phandles from dts
Remove explicit phandles and move to using references that autogenerate the phandles when needed. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/powerpc/boot/dts/kuroboxHD.dts44
-rw-r--r--arch/powerpc/boot/dts/kuroboxHG.dts45
-rw-r--r--arch/powerpc/boot/dts/lite5200.dts69
-rw-r--r--arch/powerpc/boot/dts/lite5200b.dts77
-rw-r--r--arch/powerpc/boot/dts/mpc7448hpc2.dts72
5 files changed, 139 insertions, 168 deletions
diff --git a/arch/powerpc/boot/dts/kuroboxHD.dts b/arch/powerpc/boot/dts/kuroboxHD.dts
index 157dc98d3988..a983680c3263 100644
--- a/arch/powerpc/boot/dts/kuroboxHD.dts
+++ b/arch/powerpc/boot/dts/kuroboxHD.dts
@@ -21,19 +21,16 @@ build with: "dtc -f -I dts -O dtb -o kuroboxHD.dtb -V 16 kuroboxHD.dts"
21 */ 21 */
22 22
23/ { 23/ {
24 linux,phandle = <1000>;
25 model = "KuroboxHD"; 24 model = "KuroboxHD";
26 compatible = "linkstation"; 25 compatible = "linkstation";
27 #address-cells = <1>; 26 #address-cells = <1>;
28 #size-cells = <1>; 27 #size-cells = <1>;
29 28
30 cpus { 29 cpus {
31 linux,phandle = <2000>;
32 #address-cells = <1>; 30 #address-cells = <1>;
33 #size-cells = <0>; 31 #size-cells = <0>;
34 32
35 PowerPC,603e { /* Really 8241 */ 33 PowerPC,603e { /* Really 8241 */
36 linux,phandle = <2100>;
37 device_type = "cpu"; 34 device_type = "cpu";
38 reg = <0>; 35 reg = <0>;
39 clock-frequency = <bebc200>; /* Fixed by bootwrapper */ 36 clock-frequency = <bebc200>; /* Fixed by bootwrapper */
@@ -48,13 +45,11 @@ build with: "dtc -f -I dts -O dtb -o kuroboxHD.dtb -V 16 kuroboxHD.dts"
48 }; 45 };
49 46
50 memory { 47 memory {
51 linux,phandle = <3000>;
52 device_type = "memory"; 48 device_type = "memory";
53 reg = <00000000 04000000>; 49 reg = <00000000 04000000>;
54 }; 50 };
55 51
56 soc10x { /* AFAICT need to make soc for 8245's uarts to be defined */ 52 soc10x { /* AFAICT need to make soc for 8245's uarts to be defined */
57 linux,phandle = <4000>;
58 #address-cells = <1>; 53 #address-cells = <1>;
59 #size-cells = <1>; 54 #size-cells = <1>;
60 #interrupt-cells = <2>; 55 #interrupt-cells = <2>;
@@ -69,38 +64,34 @@ build with: "dtc -f -I dts -O dtb -o kuroboxHD.dtb -V 16 kuroboxHD.dts"
69 fef00000 fef00000 00100000>; /* pci iack */ 64 fef00000 fef00000 00100000>; /* pci iack */
70 65
71 i2c@80003000 { 66 i2c@80003000 {
72 linux,phandle = <4300>;
73 device_type = "i2c"; 67 device_type = "i2c";
74 compatible = "fsl-i2c"; 68 compatible = "fsl-i2c";
75 reg = <80003000 1000>; 69 reg = <80003000 1000>;
76 interrupts = <5 2>; 70 interrupts = <5 2>;
77 interrupt-parent = <4400>; 71 interrupt-parent = <&mpic>;
78 }; 72 };
79 73
80 serial@80004500 { 74 serial@80004500 {
81 linux,phandle = <4511>;
82 device_type = "serial"; 75 device_type = "serial";
83 compatible = "ns16550"; 76 compatible = "ns16550";
84 reg = <80004500 8>; 77 reg = <80004500 8>;
85 clock-frequency = <5d08d88>; 78 clock-frequency = <5d08d88>;
86 current-speed = <2580>; 79 current-speed = <2580>;
87 interrupts = <9 2>; 80 interrupts = <9 2>;
88 interrupt-parent = <4400>; 81 interrupt-parent = <&mpic>;
89 }; 82 };
90 83
91 serial@80004600 { 84 serial@80004600 {
92 linux,phandle = <4512>;
93 device_type = "serial"; 85 device_type = "serial";
94 compatible = "ns16550"; 86 compatible = "ns16550";
95 reg = <80004600 8>; 87 reg = <80004600 8>;
96 clock-frequency = <5d08d88>; 88 clock-frequency = <5d08d88>;
97 current-speed = <e100>; 89 current-speed = <e100>;
98 interrupts = <a 0>; 90 interrupts = <a 0>;
99 interrupt-parent = <4400>; 91 interrupt-parent = <&mpic>;
100 }; 92 };
101 93
102 pic@80040000 { 94 mpic: pic@80040000 {
103 linux,phandle = <4400>;
104 #interrupt-cells = <2>; 95 #interrupt-cells = <2>;
105 #address-cells = <0>; 96 #address-cells = <0>;
106 device_type = "open-pic"; 97 device_type = "open-pic";
@@ -111,7 +102,6 @@ build with: "dtc -f -I dts -O dtb -o kuroboxHD.dtb -V 16 kuroboxHD.dts"
111 }; 102 };
112 103
113 pci@fec00000 { 104 pci@fec00000 {
114 linux,phandle = <4500>;
115 #address-cells = <3>; 105 #address-cells = <3>;
116 #size-cells = <2>; 106 #size-cells = <2>;
117 #interrupt-cells = <1>; 107 #interrupt-cells = <1>;
@@ -122,24 +112,24 @@ build with: "dtc -f -I dts -O dtb -o kuroboxHD.dtb -V 16 kuroboxHD.dts"
122 02000000 0 80000000 80000000 0 70000000>; 112 02000000 0 80000000 80000000 0 70000000>;
123 bus-range = <0 ff>; 113 bus-range = <0 ff>;
124 clock-frequency = <7f28155>; 114 clock-frequency = <7f28155>;
125 interrupt-parent = <4400>; 115 interrupt-parent = <&mpic>;
126 interrupt-map-mask = <f800 0 0 7>; 116 interrupt-map-mask = <f800 0 0 7>;
127 interrupt-map = < 117 interrupt-map = <
128 /* IDSEL 11 - IRQ0 ETH */ 118 /* IDSEL 11 - IRQ0 ETH */
129 5800 0 0 1 4400 0 1 119 5800 0 0 1 &mpic 0 1
130 5800 0 0 2 4400 1 1 120 5800 0 0 2 &mpic 1 1
131 5800 0 0 3 4400 2 1 121 5800 0 0 3 &mpic 2 1
132 5800 0 0 4 4400 3 1 122 5800 0 0 4 &mpic 3 1
133 /* IDSEL 12 - IRQ1 IDE0 */ 123 /* IDSEL 12 - IRQ1 IDE0 */
134 6000 0 0 1 4400 1 1 124 6000 0 0 1 &mpic 1 1
135 6000 0 0 2 4400 2 1 125 6000 0 0 2 &mpic 2 1
136 6000 0 0 3 4400 3 1 126 6000 0 0 3 &mpic 3 1
137 6000 0 0 4 4400 0 1 127 6000 0 0 4 &mpic 0 1
138 /* IDSEL 14 - IRQ3 USB2.0 */ 128 /* IDSEL 14 - IRQ3 USB2.0 */
139 7000 0 0 1 4400 3 1 129 7000 0 0 1 &mpic 3 1
140 7000 0 0 2 4400 3 1 130 7000 0 0 2 &mpic 3 1
141 7000 0 0 3 4400 3 1 131 7000 0 0 3 &mpic 3 1
142 7000 0 0 4 4400 3 1 132 7000 0 0 4 &mpic 3 1
143 >; 133 >;
144 }; 134 };
145 }; 135 };
diff --git a/arch/powerpc/boot/dts/kuroboxHG.dts b/arch/powerpc/boot/dts/kuroboxHG.dts
index 919eb29097db..5cf42dc022df 100644
--- a/arch/powerpc/boot/dts/kuroboxHG.dts
+++ b/arch/powerpc/boot/dts/kuroboxHG.dts
@@ -21,19 +21,16 @@ build with: "dtc -f -I dts -O dtb -o kuroboxHG.dtb -V 16 kuroboxHG.dts"
21 */ 21 */
22 22
23/ { 23/ {
24 linux,phandle = <1000>;
25 model = "KuroboxHG"; 24 model = "KuroboxHG";
26 compatible = "linkstation"; 25 compatible = "linkstation";
27 #address-cells = <1>; 26 #address-cells = <1>;
28 #size-cells = <1>; 27 #size-cells = <1>;
29 28
30 cpus { 29 cpus {
31 linux,phandle = <2000>;
32 #address-cells = <1>; 30 #address-cells = <1>;
33 #size-cells = <0>; 31 #size-cells = <0>;
34 32
35 PowerPC,603e { /* Really 8241 */ 33 PowerPC,603e { /* Really 8241 */
36 linux,phandle = <2100>;
37 device_type = "cpu"; 34 device_type = "cpu";
38 reg = <0>; 35 reg = <0>;
39 clock-frequency = <fdad680>; /* Fixed by bootwrapper */ 36 clock-frequency = <fdad680>; /* Fixed by bootwrapper */
@@ -48,13 +45,11 @@ build with: "dtc -f -I dts -O dtb -o kuroboxHG.dtb -V 16 kuroboxHG.dts"
48 }; 45 };
49 46
50 memory { 47 memory {
51 linux,phandle = <3000>;
52 device_type = "memory"; 48 device_type = "memory";
53 reg = <00000000 08000000>; 49 reg = <00000000 08000000>;
54 }; 50 };
55 51
56 soc10x { /* AFAICT need to make soc for 8245's uarts to be defined */ 52 soc10x { /* AFAICT need to make soc for 8245's uarts to be defined */
57 linux,phandle = <4000>;
58 #address-cells = <1>; 53 #address-cells = <1>;
59 #size-cells = <1>; 54 #size-cells = <1>;
60 #interrupt-cells = <2>; 55 #interrupt-cells = <2>;
@@ -69,38 +64,35 @@ build with: "dtc -f -I dts -O dtb -o kuroboxHG.dtb -V 16 kuroboxHG.dts"
69 fef00000 fef00000 00100000>; /* pci iack */ 64 fef00000 fef00000 00100000>; /* pci iack */
70 65
71 i2c@80003000 { 66 i2c@80003000 {
72 linux,phandle = <4300>;
73 device_type = "i2c"; 67 device_type = "i2c";
74 compatible = "fsl-i2c"; 68 compatible = "fsl-i2c";
75 reg = <80003000 1000>; 69 reg = <80003000 1000>;
76 interrupts = <5 2>; 70 interrupts = <5 2>;
77 interrupt-parent = <4400>; 71 interrupt-parent = <&mpic>;
78 }; 72 };
79 73
80 serial@80004500 { 74 serial@80004500 {
81 linux,phandle = <4511>;
82 device_type = "serial"; 75 device_type = "serial";
83 compatible = "ns16550"; 76 compatible = "ns16550";
84 reg = <80004500 8>; 77 reg = <80004500 8>;
85 clock-frequency = <7c044a8>; 78 clock-frequency = <7c044a8>;
86 current-speed = <2580>; 79 current-speed = <2580>;
87 interrupts = <9 2>; 80 interrupts = <9 2>;
88 interrupt-parent = <4400>; 81 interrupt-parent = <&mpic>;
89 }; 82 };
90 83
91 serial@80004600 { 84 serial@80004600 {
92 linux,phandle = <4512>;
93 device_type = "serial"; 85 device_type = "serial";
94 compatible = "ns16550"; 86 compatible = "ns16550";
95 reg = <80004600 8>; 87 reg = <80004600 8>;
96 clock-frequency = <7c044a8>; 88 clock-frequency = <7c044a8>;
97 current-speed = <e100>; 89 current-speed = <e100>;
98 interrupts = <a 0>; 90 interrupts = <a 0>;
99 interrupt-parent = <4400>; 91 interrupt-parent = <&mpic>;
100 }; 92 };
101 93
102 pic@80040000 { 94 mpic: pic@80040000 {
103 linux,phandle = <4400>; 95 interrupt-parent = <&mpic>;
104 #interrupt-cells = <2>; 96 #interrupt-cells = <2>;
105 #address-cells = <0>; 97 #address-cells = <0>;
106 device_type = "open-pic"; 98 device_type = "open-pic";
@@ -111,7 +103,6 @@ build with: "dtc -f -I dts -O dtb -o kuroboxHG.dtb -V 16 kuroboxHG.dts"
111 }; 103 };
112 104
113 pci@fec00000 { 105 pci@fec00000 {
114 linux,phandle = <4500>;
115 #address-cells = <3>; 106 #address-cells = <3>;
116 #size-cells = <2>; 107 #size-cells = <2>;
117 #interrupt-cells = <1>; 108 #interrupt-cells = <1>;
@@ -122,24 +113,24 @@ build with: "dtc -f -I dts -O dtb -o kuroboxHG.dtb -V 16 kuroboxHG.dts"
122 02000000 0 80000000 80000000 0 70000000>; 113 02000000 0 80000000 80000000 0 70000000>;
123 bus-range = <0 ff>; 114 bus-range = <0 ff>;
124 clock-frequency = <7f28155>; 115 clock-frequency = <7f28155>;
125 interrupt-parent = <4400>; 116 interrupt-parent = <&mpic>;
126 interrupt-map-mask = <f800 0 0 7>; 117 interrupt-map-mask = <f800 0 0 7>;
127 interrupt-map = < 118 interrupt-map = <
128 /* IDSEL 11 - IRQ0 ETH */ 119 /* IDSEL 11 - IRQ0 ETH */
129 5800 0 0 1 4400 0 1 120 5800 0 0 1 &mpic 0 1
130 5800 0 0 2 4400 1 1 121 5800 0 0 2 &mpic 1 1
131 5800 0 0 3 4400 2 1 122 5800 0 0 3 &mpic 2 1
132 5800 0 0 4 4400 3 1 123 5800 0 0 4 &mpic 3 1
133 /* IDSEL 12 - IRQ1 IDE0 */ 124 /* IDSEL 12 - IRQ1 IDE0 */
134 6000 0 0 1 4400 1 1 125 6000 0 0 1 &mpic 1 1
135 6000 0 0 2 4400 2 1 126 6000 0 0 2 &mpic 2 1
136 6000 0 0 3 4400 3 1 127 6000 0 0 3 &mpic 3 1
137 6000 0 0 4 4400 0 1 128 6000 0 0 4 &mpic 0 1
138 /* IDSEL 14 - IRQ3 USB2.0 */ 129 /* IDSEL 14 - IRQ3 USB2.0 */
139 7000 0 0 1 4400 3 1 130 7000 0 0 1 &mpic 3 1
140 7000 0 0 2 4400 3 1 131 7000 0 0 2 &mpic 3 1
141 7000 0 0 3 4400 3 1 132 7000 0 0 3 &mpic 3 1
142 7000 0 0 4 4400 3 1 133 7000 0 0 4 &mpic 3 1
143 >; 134 >;
144 }; 135 };
145 }; 136 };
diff --git a/arch/powerpc/boot/dts/lite5200.dts b/arch/powerpc/boot/dts/lite5200.dts
index e13ac6ef05a9..eae68ab1177f 100644
--- a/arch/powerpc/boot/dts/lite5200.dts
+++ b/arch/powerpc/boot/dts/lite5200.dts
@@ -49,7 +49,7 @@
49 soc5200@f0000000 { 49 soc5200@f0000000 {
50 model = "fsl,mpc5200"; 50 model = "fsl,mpc5200";
51 compatible = "mpc5200"; 51 compatible = "mpc5200";
52 revision = "" // from bootloader 52 revision = ""; // from bootloader
53 #interrupt-cells = <3>; 53 #interrupt-cells = <3>;
54 device_type = "soc"; 54 device_type = "soc";
55 ranges = <0 f0000000 f0010000>; 55 ranges = <0 f0000000 f0010000>;
@@ -62,13 +62,12 @@
62 reg = <200 38>; 62 reg = <200 38>;
63 }; 63 };
64 64
65 pic@500 { 65 mpc5200_pic: pic@500 {
66 // 5200 interrupts are encoded into two levels; 66 // 5200 interrupts are encoded into two levels;
67 linux,phandle = <500>;
68 interrupt-controller; 67 interrupt-controller;
69 #interrupt-cells = <3>; 68 #interrupt-cells = <3>;
70 device_type = "interrupt-controller"; 69 device_type = "interrupt-controller";
71 compatible = "mpc5200-pic"; 70 compatible = "mpc5200_pic";
72 reg = <500 80>; 71 reg = <500 80>;
73 built-in; 72 built-in;
74 }; 73 };
@@ -79,7 +78,7 @@
79 cell-index = <0>; 78 cell-index = <0>;
80 reg = <600 10>; 79 reg = <600 10>;
81 interrupts = <1 9 0>; 80 interrupts = <1 9 0>;
82 interrupt-parent = <500>; 81 interrupt-parent = <&mpc5200_pic>;
83 has-wdt; 82 has-wdt;
84 }; 83 };
85 84
@@ -89,7 +88,7 @@
89 cell-index = <1>; 88 cell-index = <1>;
90 reg = <610 10>; 89 reg = <610 10>;
91 interrupts = <1 a 0>; 90 interrupts = <1 a 0>;
92 interrupt-parent = <500>; 91 interrupt-parent = <&mpc5200_pic>;
93 }; 92 };
94 93
95 gpt@620 { // General Purpose Timer 94 gpt@620 { // General Purpose Timer
@@ -98,7 +97,7 @@
98 cell-index = <2>; 97 cell-index = <2>;
99 reg = <620 10>; 98 reg = <620 10>;
100 interrupts = <1 b 0>; 99 interrupts = <1 b 0>;
101 interrupt-parent = <500>; 100 interrupt-parent = <&mpc5200_pic>;
102 }; 101 };
103 102
104 gpt@630 { // General Purpose Timer 103 gpt@630 { // General Purpose Timer
@@ -107,7 +106,7 @@
107 cell-index = <3>; 106 cell-index = <3>;
108 reg = <630 10>; 107 reg = <630 10>;
109 interrupts = <1 c 0>; 108 interrupts = <1 c 0>;
110 interrupt-parent = <500>; 109 interrupt-parent = <&mpc5200_pic>;
111 }; 110 };
112 111
113 gpt@640 { // General Purpose Timer 112 gpt@640 { // General Purpose Timer
@@ -116,7 +115,7 @@
116 cell-index = <4>; 115 cell-index = <4>;
117 reg = <640 10>; 116 reg = <640 10>;
118 interrupts = <1 d 0>; 117 interrupts = <1 d 0>;
119 interrupt-parent = <500>; 118 interrupt-parent = <&mpc5200_pic>;
120 }; 119 };
121 120
122 gpt@650 { // General Purpose Timer 121 gpt@650 { // General Purpose Timer
@@ -125,7 +124,7 @@
125 cell-index = <5>; 124 cell-index = <5>;
126 reg = <650 10>; 125 reg = <650 10>;
127 interrupts = <1 e 0>; 126 interrupts = <1 e 0>;
128 interrupt-parent = <500>; 127 interrupt-parent = <&mpc5200_pic>;
129 }; 128 };
130 129
131 gpt@660 { // General Purpose Timer 130 gpt@660 { // General Purpose Timer
@@ -134,7 +133,7 @@
134 cell-index = <6>; 133 cell-index = <6>;
135 reg = <660 10>; 134 reg = <660 10>;
136 interrupts = <1 f 0>; 135 interrupts = <1 f 0>;
137 interrupt-parent = <500>; 136 interrupt-parent = <&mpc5200_pic>;
138 }; 137 };
139 138
140 gpt@670 { // General Purpose Timer 139 gpt@670 { // General Purpose Timer
@@ -143,7 +142,7 @@
143 cell-index = <7>; 142 cell-index = <7>;
144 reg = <670 10>; 143 reg = <670 10>;
145 interrupts = <1 10 0>; 144 interrupts = <1 10 0>;
146 interrupt-parent = <500>; 145 interrupt-parent = <&mpc5200_pic>;
147 }; 146 };
148 147
149 rtc@800 { // Real time clock 148 rtc@800 { // Real time clock
@@ -151,7 +150,7 @@
151 device_type = "rtc"; 150 device_type = "rtc";
152 reg = <800 100>; 151 reg = <800 100>;
153 interrupts = <1 5 0 1 6 0>; 152 interrupts = <1 5 0 1 6 0>;
154 interrupt-parent = <500>; 153 interrupt-parent = <&mpc5200_pic>;
155 }; 154 };
156 155
157 mscan@900 { 156 mscan@900 {
@@ -159,7 +158,7 @@
159 compatible = "mpc5200-mscan"; 158 compatible = "mpc5200-mscan";
160 cell-index = <0>; 159 cell-index = <0>;
161 interrupts = <2 11 0>; 160 interrupts = <2 11 0>;
162 interrupt-parent = <500>; 161 interrupt-parent = <&mpc5200_pic>;
163 reg = <900 80>; 162 reg = <900 80>;
164 }; 163 };
165 164
@@ -168,7 +167,7 @@
168 compatible = "mpc5200-mscan"; 167 compatible = "mpc5200-mscan";
169 cell-index = <1>; 168 cell-index = <1>;
170 interrupts = <2 12 0>; 169 interrupts = <2 12 0>;
171 interrupt-parent = <500>; 170 interrupt-parent = <&mpc5200_pic>;
172 reg = <980 80>; 171 reg = <980 80>;
173 }; 172 };
174 173
@@ -176,14 +175,14 @@
176 compatible = "mpc5200-gpio"; 175 compatible = "mpc5200-gpio";
177 reg = <b00 40>; 176 reg = <b00 40>;
178 interrupts = <1 7 0>; 177 interrupts = <1 7 0>;
179 interrupt-parent = <500>; 178 interrupt-parent = <&mpc5200_pic>;
180 }; 179 };
181 180
182 gpio-wkup@c00 { 181 gpio-wkup@c00 {
183 compatible = "mpc5200-gpio-wkup"; 182 compatible = "mpc5200-gpio-wkup";
184 reg = <c00 40>; 183 reg = <c00 40>;
185 interrupts = <1 8 0 0 3 0>; 184 interrupts = <1 8 0 0 3 0>;
186 interrupt-parent = <500>; 185 interrupt-parent = <&mpc5200_pic>;
187 }; 186 };
188 187
189 pci@0d00 { 188 pci@0d00 {
@@ -194,13 +193,13 @@
194 compatible = "mpc5200-pci"; 193 compatible = "mpc5200-pci";
195 reg = <d00 100>; 194 reg = <d00 100>;
196 interrupt-map-mask = <f800 0 0 7>; 195 interrupt-map-mask = <f800 0 0 7>;
197 interrupt-map = <c000 0 0 1 500 0 0 3 196 interrupt-map = <c000 0 0 1 &mpc5200_pic 0 0 3
198 c000 0 0 2 500 0 0 3 197 c000 0 0 2 &mpc5200_pic 0 0 3
199 c000 0 0 3 500 0 0 3 198 c000 0 0 3 &mpc5200_pic 0 0 3
200 c000 0 0 4 500 0 0 3>; 199 c000 0 0 4 &mpc5200_pic 0 0 3>;
201 clock-frequency = <0>; // From boot loader 200 clock-frequency = <0>; // From boot loader
202 interrupts = <2 8 0 2 9 0 2 a 0>; 201 interrupts = <2 8 0 2 9 0 2 a 0>;
203 interrupt-parent = <500>; 202 interrupt-parent = <&mpc5200_pic>;
204 bus-range = <0 0>; 203 bus-range = <0 0>;
205 ranges = <42000000 0 80000000 80000000 0 20000000 204 ranges = <42000000 0 80000000 80000000 0 20000000
206 02000000 0 a0000000 a0000000 0 10000000 205 02000000 0 a0000000 a0000000 0 10000000
@@ -212,7 +211,7 @@
212 compatible = "mpc5200-spi"; 211 compatible = "mpc5200-spi";
213 reg = <f00 20>; 212 reg = <f00 20>;
214 interrupts = <2 d 0 2 e 0>; 213 interrupts = <2 d 0 2 e 0>;
215 interrupt-parent = <500>; 214 interrupt-parent = <&mpc5200_pic>;
216 }; 215 };
217 216
218 usb@1000 { 217 usb@1000 {
@@ -220,7 +219,7 @@
220 compatible = "mpc5200-ohci\0ohci-be"; 219 compatible = "mpc5200-ohci\0ohci-be";
221 reg = <1000 ff>; 220 reg = <1000 ff>;
222 interrupts = <2 6 0>; 221 interrupts = <2 6 0>;
223 interrupt-parent = <500>; 222 interrupt-parent = <&mpc5200_pic>;
224 }; 223 };
225 224
226 bestcomm@1200 { 225 bestcomm@1200 {
@@ -231,7 +230,7 @@
231 3 4 0 3 5 0 3 6 0 3 7 0 230 3 4 0 3 5 0 3 6 0 3 7 0
232 3 8 0 3 9 0 3 a 0 3 b 0 231 3 8 0 3 9 0 3 a 0 3 b 0
233 3 c 0 3 d 0 3 e 0 3 f 0>; 232 3 c 0 3 d 0 3 e 0 3 f 0>;
234 interrupt-parent = <500>; 233 interrupt-parent = <&mpc5200_pic>;
235 }; 234 };
236 235
237 xlb@1f00 { 236 xlb@1f00 {
@@ -246,7 +245,7 @@
246 cell-index = <0>; 245 cell-index = <0>;
247 reg = <2000 100>; 246 reg = <2000 100>;
248 interrupts = <2 1 0>; 247 interrupts = <2 1 0>;
249 interrupt-parent = <500>; 248 interrupt-parent = <&mpc5200_pic>;
250 }; 249 };
251 250
252 // PSC2 in ac97 mode example 251 // PSC2 in ac97 mode example
@@ -256,7 +255,7 @@
256 // cell-index = <1>; 255 // cell-index = <1>;
257 // reg = <2200 100>; 256 // reg = <2200 100>;
258 // interrupts = <2 2 0>; 257 // interrupts = <2 2 0>;
259 // interrupt-parent = <500>; 258 // interrupt-parent = <&mpc5200_pic>;
260 //}; 259 //};
261 260
262 // PSC3 in CODEC mode example 261 // PSC3 in CODEC mode example
@@ -266,7 +265,7 @@
266 // cell-index = <2>; 265 // cell-index = <2>;
267 // reg = <2400 100>; 266 // reg = <2400 100>;
268 // interrupts = <2 3 0>; 267 // interrupts = <2 3 0>;
269 // interrupt-parent = <500>; 268 // interrupt-parent = <&mpc5200_pic>;
270 //}; 269 //};
271 270
272 // PSC4 in uart mode example 271 // PSC4 in uart mode example
@@ -276,7 +275,7 @@
276 // cell-index = <3>; 275 // cell-index = <3>;
277 // reg = <2600 100>; 276 // reg = <2600 100>;
278 // interrupts = <2 b 0>; 277 // interrupts = <2 b 0>;
279 // interrupt-parent = <500>; 278 // interrupt-parent = <&mpc5200_pic>;
280 //}; 279 //};
281 280
282 // PSC5 in uart mode example 281 // PSC5 in uart mode example
@@ -286,7 +285,7 @@
286 // cell-index = <4>; 285 // cell-index = <4>;
287 // reg = <2800 100>; 286 // reg = <2800 100>;
288 // interrupts = <2 c 0>; 287 // interrupts = <2 c 0>;
289 // interrupt-parent = <500>; 288 // interrupt-parent = <&mpc5200_pic>;
290 //}; 289 //};
291 290
292 // PSC6 in spi mode example 291 // PSC6 in spi mode example
@@ -296,7 +295,7 @@
296 // cell-index = <5>; 295 // cell-index = <5>;
297 // reg = <2c00 100>; 296 // reg = <2c00 100>;
298 // interrupts = <2 4 0>; 297 // interrupts = <2 4 0>;
299 // interrupt-parent = <500>; 298 // interrupt-parent = <&mpc5200_pic>;
300 //}; 299 //};
301 300
302 ethernet@3000 { 301 ethernet@3000 {
@@ -305,7 +304,7 @@
305 reg = <3000 800>; 304 reg = <3000 800>;
306 mac-address = [ 02 03 04 05 06 07 ]; // Bad! 305 mac-address = [ 02 03 04 05 06 07 ]; // Bad!
307 interrupts = <2 5 0>; 306 interrupts = <2 5 0>;
308 interrupt-parent = <500>; 307 interrupt-parent = <&mpc5200_pic>;
309 }; 308 };
310 309
311 ata@3a00 { 310 ata@3a00 {
@@ -313,7 +312,7 @@
313 compatible = "mpc5200-ata"; 312 compatible = "mpc5200-ata";
314 reg = <3a00 100>; 313 reg = <3a00 100>;
315 interrupts = <2 7 0>; 314 interrupts = <2 7 0>;
316 interrupt-parent = <500>; 315 interrupt-parent = <&mpc5200_pic>;
317 }; 316 };
318 317
319 i2c@3d00 { 318 i2c@3d00 {
@@ -322,7 +321,7 @@
322 cell-index = <0>; 321 cell-index = <0>;
323 reg = <3d00 40>; 322 reg = <3d00 40>;
324 interrupts = <2 f 0>; 323 interrupts = <2 f 0>;
325 interrupt-parent = <500>; 324 interrupt-parent = <&mpc5200_pic>;
326 fsl5200-clocking; 325 fsl5200-clocking;
327 }; 326 };
328 327
@@ -332,7 +331,7 @@
332 cell-index = <1>; 331 cell-index = <1>;
333 reg = <3d40 40>; 332 reg = <3d40 40>;
334 interrupts = <2 10 0>; 333 interrupts = <2 10 0>;
335 interrupt-parent = <500>; 334 interrupt-parent = <&mpc5200_pic>;
336 fsl5200-clocking; 335 fsl5200-clocking;
337 }; 336 };
338 sram@8000 { 337 sram@8000 {
diff --git a/arch/powerpc/boot/dts/lite5200b.dts b/arch/powerpc/boot/dts/lite5200b.dts
index 00211b39a342..5185625a9419 100644
--- a/arch/powerpc/boot/dts/lite5200b.dts
+++ b/arch/powerpc/boot/dts/lite5200b.dts
@@ -62,13 +62,12 @@
62 reg = <200 38>; 62 reg = <200 38>;
63 }; 63 };
64 64
65 pic@500 { 65 mpc5200_pic: pic@500 {
66 // 5200 interrupts are encoded into two levels; 66 // 5200 interrupts are encoded into two levels;
67 linux,phandle = <500>;
68 interrupt-controller; 67 interrupt-controller;
69 #interrupt-cells = <3>; 68 #interrupt-cells = <3>;
70 device_type = "interrupt-controller"; 69 device_type = "interrupt-controller";
71 compatible = "mpc5200b-pic\0mpc5200-pic"; 70 compatible = "mpc5200b-pic\0mpc5200_pic";
72 reg = <500 80>; 71 reg = <500 80>;
73 built-in; 72 built-in;
74 }; 73 };
@@ -79,7 +78,7 @@
79 cell-index = <0>; 78 cell-index = <0>;
80 reg = <600 10>; 79 reg = <600 10>;
81 interrupts = <1 9 0>; 80 interrupts = <1 9 0>;
82 interrupt-parent = <500>; 81 interrupt-parent = <&mpc5200_pic>;
83 has-wdt; 82 has-wdt;
84 }; 83 };
85 84
@@ -89,7 +88,7 @@
89 cell-index = <1>; 88 cell-index = <1>;
90 reg = <610 10>; 89 reg = <610 10>;
91 interrupts = <1 a 0>; 90 interrupts = <1 a 0>;
92 interrupt-parent = <500>; 91 interrupt-parent = <&mpc5200_pic>;
93 }; 92 };
94 93
95 gpt@620 { // General Purpose Timer 94 gpt@620 { // General Purpose Timer
@@ -98,7 +97,7 @@
98 cell-index = <2>; 97 cell-index = <2>;
99 reg = <620 10>; 98 reg = <620 10>;
100 interrupts = <1 b 0>; 99 interrupts = <1 b 0>;
101 interrupt-parent = <500>; 100 interrupt-parent = <&mpc5200_pic>;
102 }; 101 };
103 102
104 gpt@630 { // General Purpose Timer 103 gpt@630 { // General Purpose Timer
@@ -107,7 +106,7 @@
107 cell-index = <3>; 106 cell-index = <3>;
108 reg = <630 10>; 107 reg = <630 10>;
109 interrupts = <1 c 0>; 108 interrupts = <1 c 0>;
110 interrupt-parent = <500>; 109 interrupt-parent = <&mpc5200_pic>;
111 }; 110 };
112 111
113 gpt@640 { // General Purpose Timer 112 gpt@640 { // General Purpose Timer
@@ -116,7 +115,7 @@
116 cell-index = <4>; 115 cell-index = <4>;
117 reg = <640 10>; 116 reg = <640 10>;
118 interrupts = <1 d 0>; 117 interrupts = <1 d 0>;
119 interrupt-parent = <500>; 118 interrupt-parent = <&mpc5200_pic>;
120 }; 119 };
121 120
122 gpt@650 { // General Purpose Timer 121 gpt@650 { // General Purpose Timer
@@ -125,7 +124,7 @@
125 cell-index = <5>; 124 cell-index = <5>;
126 reg = <650 10>; 125 reg = <650 10>;
127 interrupts = <1 e 0>; 126 interrupts = <1 e 0>;
128 interrupt-parent = <500>; 127 interrupt-parent = <&mpc5200_pic>;
129 }; 128 };
130 129
131 gpt@660 { // General Purpose Timer 130 gpt@660 { // General Purpose Timer
@@ -134,7 +133,7 @@
134 cell-index = <6>; 133 cell-index = <6>;
135 reg = <660 10>; 134 reg = <660 10>;
136 interrupts = <1 f 0>; 135 interrupts = <1 f 0>;
137 interrupt-parent = <500>; 136 interrupt-parent = <&mpc5200_pic>;
138 }; 137 };
139 138
140 gpt@670 { // General Purpose Timer 139 gpt@670 { // General Purpose Timer
@@ -143,7 +142,7 @@
143 cell-index = <7>; 142 cell-index = <7>;
144 reg = <670 10>; 143 reg = <670 10>;
145 interrupts = <1 10 0>; 144 interrupts = <1 10 0>;
146 interrupt-parent = <500>; 145 interrupt-parent = <&mpc5200_pic>;
147 }; 146 };
148 147
149 rtc@800 { // Real time clock 148 rtc@800 { // Real time clock
@@ -151,7 +150,7 @@
151 device_type = "rtc"; 150 device_type = "rtc";
152 reg = <800 100>; 151 reg = <800 100>;
153 interrupts = <1 5 0 1 6 0>; 152 interrupts = <1 5 0 1 6 0>;
154 interrupt-parent = <500>; 153 interrupt-parent = <&mpc5200_pic>;
155 }; 154 };
156 155
157 mscan@900 { 156 mscan@900 {
@@ -159,7 +158,7 @@
159 compatible = "mpc5200b-mscan\0mpc5200-mscan"; 158 compatible = "mpc5200b-mscan\0mpc5200-mscan";
160 cell-index = <0>; 159 cell-index = <0>;
161 interrupts = <2 11 0>; 160 interrupts = <2 11 0>;
162 interrupt-parent = <500>; 161 interrupt-parent = <&mpc5200_pic>;
163 reg = <900 80>; 162 reg = <900 80>;
164 }; 163 };
165 164
@@ -168,7 +167,7 @@
168 compatible = "mpc5200b-mscan\0mpc5200-mscan"; 167 compatible = "mpc5200b-mscan\0mpc5200-mscan";
169 cell-index = <1>; 168 cell-index = <1>;
170 interrupts = <2 12 0>; 169 interrupts = <2 12 0>;
171 interrupt-parent = <500>; 170 interrupt-parent = <&mpc5200_pic>;
172 reg = <980 80>; 171 reg = <980 80>;
173 }; 172 };
174 173
@@ -176,14 +175,14 @@
176 compatible = "mpc5200b-gpio\0mpc5200-gpio"; 175 compatible = "mpc5200b-gpio\0mpc5200-gpio";
177 reg = <b00 40>; 176 reg = <b00 40>;
178 interrupts = <1 7 0>; 177 interrupts = <1 7 0>;
179 interrupt-parent = <500>; 178 interrupt-parent = <&mpc5200_pic>;
180 }; 179 };
181 180
182 gpio-wkup@c00 { 181 gpio-wkup@c00 {
183 compatible = "mpc5200b-gpio-wkup\0mpc5200-gpio-wkup"; 182 compatible = "mpc5200b-gpio-wkup\0mpc5200-gpio-wkup";
184 reg = <c00 40>; 183 reg = <c00 40>;
185 interrupts = <1 8 0 0 3 0>; 184 interrupts = <1 8 0 0 3 0>;
186 interrupt-parent = <500>; 185 interrupt-parent = <&mpc5200_pic>;
187 }; 186 };
188 187
189 pci@0d00 { 188 pci@0d00 {
@@ -194,18 +193,18 @@
194 compatible = "mpc5200b-pci\0mpc5200-pci"; 193 compatible = "mpc5200b-pci\0mpc5200-pci";
195 reg = <d00 100>; 194 reg = <d00 100>;
196 interrupt-map-mask = <f800 0 0 7>; 195 interrupt-map-mask = <f800 0 0 7>;
197 interrupt-map = <c000 0 0 1 500 0 0 3 // 1st slot 196 interrupt-map = <c000 0 0 1 &mpc5200_pic 0 0 3 // 1st slot
198 c000 0 0 2 500 1 1 3 197 c000 0 0 2 &mpc5200_pic 1 1 3
199 c000 0 0 3 500 1 2 3 198 c000 0 0 3 &mpc5200_pic 1 2 3
200 c000 0 0 4 500 1 3 3 199 c000 0 0 4 &mpc5200_pic 1 3 3
201 200
202 c800 0 0 1 500 1 1 3 // 2nd slot 201 c800 0 0 1 &mpc5200_pic 1 1 3 // 2nd slot
203 c800 0 0 2 500 1 2 3 202 c800 0 0 2 &mpc5200_pic 1 2 3
204 c800 0 0 3 500 1 3 3 203 c800 0 0 3 &mpc5200_pic 1 3 3
205 c800 0 0 4 500 0 0 3>; 204 c800 0 0 4 &mpc5200_pic 0 0 3>;
206 clock-frequency = <0>; // From boot loader 205 clock-frequency = <0>; // From boot loader
207 interrupts = <2 8 0 2 9 0 2 a 0>; 206 interrupts = <2 8 0 2 9 0 2 a 0>;
208 interrupt-parent = <500>; 207 interrupt-parent = <&mpc5200_pic>;
209 bus-range = <0 0>; 208 bus-range = <0 0>;
210 ranges = <42000000 0 80000000 80000000 0 20000000 209 ranges = <42000000 0 80000000 80000000 0 20000000
211 02000000 0 a0000000 a0000000 0 10000000 210 02000000 0 a0000000 a0000000 0 10000000
@@ -217,7 +216,7 @@
217 compatible = "mpc5200b-spi\0mpc5200-spi"; 216 compatible = "mpc5200b-spi\0mpc5200-spi";
218 reg = <f00 20>; 217 reg = <f00 20>;
219 interrupts = <2 d 0 2 e 0>; 218 interrupts = <2 d 0 2 e 0>;
220 interrupt-parent = <500>; 219 interrupt-parent = <&mpc5200_pic>;
221 }; 220 };
222 221
223 usb@1000 { 222 usb@1000 {
@@ -225,7 +224,7 @@
225 compatible = "mpc5200b-ohci\0mpc5200-ohci\0ohci-be"; 224 compatible = "mpc5200b-ohci\0mpc5200-ohci\0ohci-be";
226 reg = <1000 ff>; 225 reg = <1000 ff>;
227 interrupts = <2 6 0>; 226 interrupts = <2 6 0>;
228 interrupt-parent = <500>; 227 interrupt-parent = <&mpc5200_pic>;
229 }; 228 };
230 229
231 bestcomm@1200 { 230 bestcomm@1200 {
@@ -236,7 +235,7 @@
236 3 4 0 3 5 0 3 6 0 3 7 0 235 3 4 0 3 5 0 3 6 0 3 7 0
237 3 8 0 3 9 0 3 a 0 3 b 0 236 3 8 0 3 9 0 3 a 0 3 b 0
238 3 c 0 3 d 0 3 e 0 3 f 0>; 237 3 c 0 3 d 0 3 e 0 3 f 0>;
239 interrupt-parent = <500>; 238 interrupt-parent = <&mpc5200_pic>;
240 }; 239 };
241 240
242 xlb@1f00 { 241 xlb@1f00 {
@@ -251,7 +250,7 @@
251 cell-index = <0>; 250 cell-index = <0>;
252 reg = <2000 100>; 251 reg = <2000 100>;
253 interrupts = <2 1 0>; 252 interrupts = <2 1 0>;
254 interrupt-parent = <500>; 253 interrupt-parent = <&mpc5200_pic>;
255 }; 254 };
256 255
257 // PSC2 in ac97 mode example 256 // PSC2 in ac97 mode example
@@ -261,7 +260,7 @@
261 // cell-index = <1>; 260 // cell-index = <1>;
262 // reg = <2200 100>; 261 // reg = <2200 100>;
263 // interrupts = <2 2 0>; 262 // interrupts = <2 2 0>;
264 // interrupt-parent = <500>; 263 // interrupt-parent = <&mpc5200_pic>;
265 //}; 264 //};
266 265
267 // PSC3 in CODEC mode example 266 // PSC3 in CODEC mode example
@@ -271,7 +270,7 @@
271 // cell-index = <2>; 270 // cell-index = <2>;
272 // reg = <2400 100>; 271 // reg = <2400 100>;
273 // interrupts = <2 3 0>; 272 // interrupts = <2 3 0>;
274 // interrupt-parent = <500>; 273 // interrupt-parent = <&mpc5200_pic>;
275 //}; 274 //};
276 275
277 // PSC4 in uart mode example 276 // PSC4 in uart mode example
@@ -281,7 +280,7 @@
281 // cell-index = <3>; 280 // cell-index = <3>;
282 // reg = <2600 100>; 281 // reg = <2600 100>;
283 // interrupts = <2 b 0>; 282 // interrupts = <2 b 0>;
284 // interrupt-parent = <500>; 283 // interrupt-parent = <&mpc5200_pic>;
285 //}; 284 //};
286 285
287 // PSC5 in uart mode example 286 // PSC5 in uart mode example
@@ -291,7 +290,7 @@
291 // cell-index = <4>; 290 // cell-index = <4>;
292 // reg = <2800 100>; 291 // reg = <2800 100>;
293 // interrupts = <2 c 0>; 292 // interrupts = <2 c 0>;
294 // interrupt-parent = <500>; 293 // interrupt-parent = <&mpc5200_pic>;
295 //}; 294 //};
296 295
297 // PSC6 in spi mode example 296 // PSC6 in spi mode example
@@ -301,7 +300,7 @@
301 // cell-index = <5>; 300 // cell-index = <5>;
302 // reg = <2c00 100>; 301 // reg = <2c00 100>;
303 // interrupts = <2 4 0>; 302 // interrupts = <2 4 0>;
304 // interrupt-parent = <500>; 303 // interrupt-parent = <&mpc5200_pic>;
305 //}; 304 //};
306 305
307 ethernet@3000 { 306 ethernet@3000 {
@@ -310,7 +309,7 @@
310 reg = <3000 800>; 309 reg = <3000 800>;
311 mac-address = [ 02 03 04 05 06 07 ]; // Bad! 310 mac-address = [ 02 03 04 05 06 07 ]; // Bad!
312 interrupts = <2 5 0>; 311 interrupts = <2 5 0>;
313 interrupt-parent = <500>; 312 interrupt-parent = <&mpc5200_pic>;
314 }; 313 };
315 314
316 ata@3a00 { 315 ata@3a00 {
@@ -318,7 +317,7 @@
318 compatible = "mpc5200b-ata\0mpc5200-ata"; 317 compatible = "mpc5200b-ata\0mpc5200-ata";
319 reg = <3a00 100>; 318 reg = <3a00 100>;
320 interrupts = <2 7 0>; 319 interrupts = <2 7 0>;
321 interrupt-parent = <500>; 320 interrupt-parent = <&mpc5200_pic>;
322 }; 321 };
323 322
324 i2c@3d00 { 323 i2c@3d00 {
@@ -327,7 +326,7 @@
327 cell-index = <0>; 326 cell-index = <0>;
328 reg = <3d00 40>; 327 reg = <3d00 40>;
329 interrupts = <2 f 0>; 328 interrupts = <2 f 0>;
330 interrupt-parent = <500>; 329 interrupt-parent = <&mpc5200_pic>;
331 fsl5200-clocking; 330 fsl5200-clocking;
332 }; 331 };
333 332
@@ -337,7 +336,7 @@
337 cell-index = <1>; 336 cell-index = <1>;
338 reg = <3d40 40>; 337 reg = <3d40 40>;
339 interrupts = <2 10 0>; 338 interrupts = <2 10 0>;
340 interrupt-parent = <500>; 339 interrupt-parent = <&mpc5200_pic>;
341 fsl5200-clocking; 340 fsl5200-clocking;
342 }; 341 };
343 sram@8000 { 342 sram@8000 {
diff --git a/arch/powerpc/boot/dts/mpc7448hpc2.dts b/arch/powerpc/boot/dts/mpc7448hpc2.dts
index 6fa3754f293a..765c306ecf80 100644
--- a/arch/powerpc/boot/dts/mpc7448hpc2.dts
+++ b/arch/powerpc/boot/dts/mpc7448hpc2.dts
@@ -16,12 +16,10 @@
16 compatible = "mpc74xx"; 16 compatible = "mpc74xx";
17 #address-cells = <1>; 17 #address-cells = <1>;
18 #size-cells = <1>; 18 #size-cells = <1>;
19 linux,phandle = <100>;
20 19
21 cpus { 20 cpus {
22 #address-cells = <1>; 21 #address-cells = <1>;
23 #size-cells =<0>; 22 #size-cells =<0>;
24 linux,phandle = <200>;
25 23
26 PowerPC,7448@0 { 24 PowerPC,7448@0 {
27 device_type = "cpu"; 25 device_type = "cpu";
@@ -34,13 +32,11 @@
34 clock-frequency = <0>; // From U-Boot 32 clock-frequency = <0>; // From U-Boot
35 bus-frequency = <0>; // From U-Boot 33 bus-frequency = <0>; // From U-Boot
36 32-bit; 34 32-bit;
37 linux,phandle = <201>;
38 }; 35 };
39 }; 36 };
40 37
41 memory { 38 memory {
42 device_type = "memory"; 39 device_type = "memory";
43 linux,phandle = <300>;
44 reg = <00000000 20000000 // DDR2 512M at 0 40 reg = <00000000 20000000 // DDR2 512M at 0
45 >; 41 >;
46 }; 42 };
@@ -55,7 +51,7 @@
55 bus-frequency = <0>; 51 bus-frequency = <0>;
56 52
57 i2c@7000 { 53 i2c@7000 {
58 interrupt-parent = <7400>; 54 interrupt-parent = <&mpic>;
59 interrupts = <E 0>; 55 interrupts = <E 0>;
60 reg = <7000 400>; 56 reg = <7000 400>;
61 device_type = "i2c"; 57 device_type = "i2c";
@@ -66,18 +62,16 @@
66 device_type = "mdio"; 62 device_type = "mdio";
67 compatible = "tsi-ethernet"; 63 compatible = "tsi-ethernet";
68 64
69 ethernet-phy@6000 { 65 phy8: ethernet-phy@6000 {
70 linux,phandle = <6000>; 66 interrupt-parent = <&mpic>;
71 interrupt-parent = <7400>;
72 interrupts = <2 1>; 67 interrupts = <2 1>;
73 reg = <6000 50>; 68 reg = <6000 50>;
74 phy-id = <8>; 69 phy-id = <8>;
75 device_type = "ethernet-phy"; 70 device_type = "ethernet-phy";
76 }; 71 };
77 72
78 ethernet-phy@6400 { 73 phy9: ethernet-phy@6400 {
79 linux,phandle = <6400>; 74 interrupt-parent = <&mpic>;
80 interrupt-parent = <7400>;
81 interrupts = <2 1>; 75 interrupts = <2 1>;
82 reg = <6000 50>; 76 reg = <6000 50>;
83 phy-id = <9>; 77 phy-id = <9>;
@@ -94,8 +88,8 @@
94 reg = <6000 200>; 88 reg = <6000 200>;
95 address = [ 00 06 D2 00 00 01 ]; 89 address = [ 00 06 D2 00 00 01 ];
96 interrupts = <10 2>; 90 interrupts = <10 2>;
97 interrupt-parent = <7400>; 91 interrupt-parent = <&mpic>;
98 phy-handle = <6000>; 92 phy-handle = <&phy8>;
99 }; 93 };
100 94
101 ethernet@6600 { 95 ethernet@6600 {
@@ -107,8 +101,8 @@
107 reg = <6400 200>; 101 reg = <6400 200>;
108 address = [ 00 06 D2 00 00 02 ]; 102 address = [ 00 06 D2 00 00 02 ];
109 interrupts = <11 2>; 103 interrupts = <11 2>;
110 interrupt-parent = <7400>; 104 interrupt-parent = <&mpic>;
111 phy-handle = <6400>; 105 phy-handle = <&phy9>;
112 }; 106 };
113 107
114 serial@7808 { 108 serial@7808 {
@@ -117,7 +111,7 @@
117 reg = <7808 200>; 111 reg = <7808 200>;
118 clock-frequency = <3f6b5a00>; 112 clock-frequency = <3f6b5a00>;
119 interrupts = <c 0>; 113 interrupts = <c 0>;
120 interrupt-parent = <7400>; 114 interrupt-parent = <&mpic>;
121 }; 115 };
122 116
123 serial@7c08 { 117 serial@7c08 {
@@ -126,11 +120,10 @@
126 reg = <7c08 200>; 120 reg = <7c08 200>;
127 clock-frequency = <3f6b5a00>; 121 clock-frequency = <3f6b5a00>;
128 interrupts = <d 0>; 122 interrupts = <d 0>;
129 interrupt-parent = <7400>; 123 interrupt-parent = <&mpic>;
130 }; 124 };
131 125
132 pic@7400 { 126 mpic: pic@7400 {
133 linux,phandle = <7400>;
134 clock-frequency = <0>; 127 clock-frequency = <0>;
135 interrupt-controller; 128 interrupt-controller;
136 #address-cells = <0>; 129 #address-cells = <0>;
@@ -144,7 +137,6 @@
144 pci@1000 { 137 pci@1000 {
145 compatible = "tsi10x"; 138 compatible = "tsi10x";
146 device_type = "pci"; 139 device_type = "pci";
147 linux,phandle = <1000>;
148 #interrupt-cells = <1>; 140 #interrupt-cells = <1>;
149 #size-cells = <2>; 141 #size-cells = <2>;
150 #address-cells = <3>; 142 #address-cells = <3>;
@@ -153,37 +145,37 @@
153 ranges = <02000000 0 e0000000 e0000000 0 1A000000 145 ranges = <02000000 0 e0000000 e0000000 0 1A000000
154 01000000 0 00000000 fa000000 0 00010000>; 146 01000000 0 00000000 fa000000 0 00010000>;
155 clock-frequency = <7f28154>; 147 clock-frequency = <7f28154>;
156 interrupt-parent = <7400>; 148 interrupt-parent = <&mpic>;
157 interrupts = <17 2>; 149 interrupts = <17 2>;
158 interrupt-map-mask = <f800 0 0 7>; 150 interrupt-map-mask = <f800 0 0 7>;
159 interrupt-map = < 151 interrupt-map = <
160 152
161 /* IDSEL 0x11 */ 153 /* IDSEL 0x11 */
162 0800 0 0 1 1180 24 0 154 0800 0 0 1 &RT0 24 0
163 0800 0 0 2 1180 25 0 155 0800 0 0 2 &RT0 25 0
164 0800 0 0 3 1180 26 0 156 0800 0 0 3 &RT0 26 0
165 0800 0 0 4 1180 27 0 157 0800 0 0 4 &RT0 27 0
166 158
167 /* IDSEL 0x12 */ 159 /* IDSEL 0x12 */
168 1000 0 0 1 1180 25 0 160 1000 0 0 1 &RT0 25 0
169 1000 0 0 2 1180 26 0 161 1000 0 0 2 &RT0 26 0
170 1000 0 0 3 1180 27 0 162 1000 0 0 3 &RT0 27 0
171 1000 0 0 4 1180 24 0 163 1000 0 0 4 &RT0 24 0
172 164
173 /* IDSEL 0x13 */ 165 /* IDSEL 0x13 */
174 1800 0 0 1 1180 26 0 166 1800 0 0 1 &RT0 26 0
175 1800 0 0 2 1180 27 0 167 1800 0 0 2 &RT0 27 0
176 1800 0 0 3 1180 24 0 168 1800 0 0 3 &RT0 24 0
177 1800 0 0 4 1180 25 0 169 1800 0 0 4 &RT0 25 0
178 170
179 /* IDSEL 0x14 */ 171 /* IDSEL 0x14 */
180 2000 0 0 1 1180 27 0 172 2000 0 0 1 &RT0 27 0
181 2000 0 0 2 1180 24 0 173 2000 0 0 2 &RT0 24 0
182 2000 0 0 3 1180 25 0 174 2000 0 0 3 &RT0 25 0
183 2000 0 0 4 1180 26 0 175 2000 0 0 4 &RT0 26 0
184 >; 176 >;
185 router@1180 { 177
186 linux,phandle = <1180>; 178 RT0: router@1180 {
187 clock-frequency = <0>; 179 clock-frequency = <0>;
188 interrupt-controller; 180 interrupt-controller;
189 device_type = "pic-router"; 181 device_type = "pic-router";
@@ -192,7 +184,7 @@
192 built-in; 184 built-in;
193 big-endian; 185 big-endian;
194 interrupts = <17 2>; 186 interrupts = <17 2>;
195 interrupt-parent = <7400>; 187 interrupt-parent = <&mpic>;
196 }; 188 };
197 }; 189 };
198 }; 190 };
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-19 19:20:16 -0500