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authorPaul Mundt <lethal@linux-sh.org>2009-04-21 04:12:16 -0400
committerPaul Mundt <lethal@linux-sh.org>2009-04-21 04:12:16 -0400
commit4db25d496c09fdf094d52d11a90ae51f9ee473c6 (patch)
tree77ab8003db1d6ccbcf3a9acafad26002fba37b63 /arch
parentb8c193f88ebd8705b3e916532539031cd9fc0b4c (diff)
parent8c31813f31cd4403b46802866949a95a6e8fa584 (diff)
Merge branch 'sh/stable-updates' into sh/for-2.6.30
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/common/vic.c9
-rw-r--r--arch/arm/configs/imx27ads_defconfig826
-rw-r--r--arch/arm/configs/mx1_defconfig (renamed from arch/arm/configs/mx31ads_defconfig)536
-rw-r--r--arch/arm/configs/mx27_defconfig (renamed from arch/arm/configs/pcm038_defconfig)354
-rw-r--r--arch/arm/configs/mx3_defconfig (renamed from arch/arm/configs/mx31litekit_defconfig)783
-rw-r--r--arch/arm/configs/pcm037_defconfig769
-rw-r--r--arch/arm/configs/s3c2410_defconfig1112
-rw-r--r--arch/arm/include/asm/tlb.h25
-rw-r--r--arch/arm/kernel/sys_oabi-compat.c1
-rw-r--r--arch/arm/mach-ep93xx/core.c2
-rw-r--r--arch/arm/mach-mx1/mx1ads.c6
-rw-r--r--arch/arm/mach-mx2/clock_imx21.c8
-rw-r--r--arch/arm/mach-mx3/Kconfig2
-rw-r--r--arch/arm/mach-mx3/mx31ads.c4
-rw-r--r--arch/arm/mach-mx3/pcm037.c4
-rw-r--r--arch/arm/mach-mx3/qong.c28
-rw-r--r--arch/arm/mach-pxa/em-x270.c6
-rw-r--r--arch/arm/mach-pxa/generic.h3
-rw-r--r--arch/arm/mach-pxa/include/mach/colibri.h4
-rw-r--r--arch/arm/mach-pxa/include/mach/palmt5.h1
-rw-r--r--arch/arm/mach-pxa/include/mach/palmtx.h1
-rw-r--r--arch/arm/mach-pxa/palmt5.c11
-rw-r--r--arch/arm/mach-pxa/palmtx.c11
-rw-r--r--arch/arm/mach-s3c2412/mach-jive.c5
-rw-r--r--arch/arm/mach-s3c2440/mach-anubis.c2
-rw-r--r--arch/arm/mach-s3c2440/mach-osiris.c1
-rw-r--r--arch/arm/mach-s3c6410/mach-smdk6410.c4
-rw-r--r--arch/arm/plat-mxc/include/mach/imx-uart.h2
-rw-r--r--arch/arm/plat-mxc/include/mach/iomux-mx3.h48
-rw-r--r--arch/arm/plat-mxc/include/mach/irqs.h2
-rw-r--r--arch/arm/plat-mxc/include/mach/mx21.h3
-rw-r--r--arch/arm/plat-mxc/irq.c14
-rw-r--r--arch/arm/plat-s3c/gpio-config.c3
-rw-r--r--arch/arm/plat-s3c/include/plat/devs.h1
-rw-r--r--arch/arm/plat-s3c24xx/adc.c19
-rw-r--r--arch/arm/plat-s3c24xx/gpiolib.c2
-rw-r--r--arch/h8300/include/asm/timer.h25
-rw-r--r--arch/m32r/include/asm/Kbuild1
-rw-r--r--arch/m32r/include/asm/addrspace.h57
-rw-r--r--arch/m32r/include/asm/assembler.h229
-rw-r--r--arch/m32r/include/asm/atomic.h318
-rw-r--r--arch/m32r/include/asm/auxvec.h4
-rw-r--r--arch/m32r/include/asm/bitops.h275
-rw-r--r--arch/m32r/include/asm/bug.h4
-rw-r--r--arch/m32r/include/asm/bugs.h19
-rw-r--r--arch/m32r/include/asm/byteorder.h10
-rw-r--r--arch/m32r/include/asm/cache.h8
-rw-r--r--arch/m32r/include/asm/cachectl.h26
-rw-r--r--arch/m32r/include/asm/cacheflush.h69
-rw-r--r--arch/m32r/include/asm/checksum.h204
-rw-r--r--arch/m32r/include/asm/cputime.h6
-rw-r--r--arch/m32r/include/asm/current.h15
-rw-r--r--arch/m32r/include/asm/delay.h26
-rw-r--r--arch/m32r/include/asm/device.h7
-rw-r--r--arch/m32r/include/asm/div64.h1
-rw-r--r--arch/m32r/include/asm/dma.h12
-rw-r--r--arch/m32r/include/asm/elf.h134
-rw-r--r--arch/m32r/include/asm/emergency-restart.h6
-rw-r--r--arch/m32r/include/asm/errno.h6
-rw-r--r--arch/m32r/include/asm/fb.h19
-rw-r--r--arch/m32r/include/asm/fcntl.h1
-rw-r--r--arch/m32r/include/asm/flat.h146
-rw-r--r--arch/m32r/include/asm/ftrace.h1
-rw-r--r--arch/m32r/include/asm/futex.h6
-rw-r--r--arch/m32r/include/asm/hardirq.h36
-rw-r--r--arch/m32r/include/asm/hw_irq.h4
-rw-r--r--arch/m32r/include/asm/io.h200
-rw-r--r--arch/m32r/include/asm/ioctl.h1
-rw-r--r--arch/m32r/include/asm/ioctls.h87
-rw-r--r--arch/m32r/include/asm/ipcbuf.h29
-rw-r--r--arch/m32r/include/asm/irq.h90
-rw-r--r--arch/m32r/include/asm/irq_regs.h1
-rw-r--r--arch/m32r/include/asm/kdebug.h1
-rw-r--r--arch/m32r/include/asm/kmap_types.h29
-rw-r--r--arch/m32r/include/asm/linkage.h7
-rw-r--r--arch/m32r/include/asm/local.h366
-rw-r--r--arch/m32r/include/asm/m32102.h314
-rw-r--r--arch/m32r/include/asm/m32104ut/m32104ut_pld.h161
-rw-r--r--arch/m32r/include/asm/m32700ut/m32700ut_lan.h103
-rw-r--r--arch/m32r/include/asm/m32700ut/m32700ut_lcd.h55
-rw-r--r--arch/m32r/include/asm/m32700ut/m32700ut_pld.h259
-rw-r--r--arch/m32r/include/asm/m32r.h160
-rw-r--r--arch/m32r/include/asm/m32r_mp_fpga.h313
-rw-r--r--arch/m32r/include/asm/mappi2/mappi2_pld.h150
-rw-r--r--arch/m32r/include/asm/mappi3/mappi3_pld.h142
-rw-r--r--arch/m32r/include/asm/mc146818rtc.h29
-rw-r--r--arch/m32r/include/asm/mman.h17
-rw-r--r--arch/m32r/include/asm/mmu.h21
-rw-r--r--arch/m32r/include/asm/mmu_context.h164
-rw-r--r--arch/m32r/include/asm/mmzone.h59
-rw-r--r--arch/m32r/include/asm/module.h10
-rw-r--r--arch/m32r/include/asm/msgbuf.h31
-rw-r--r--arch/m32r/include/asm/mutex.h9
-rw-r--r--arch/m32r/include/asm/opsput/opsput_lan.h52
-rw-r--r--arch/m32r/include/asm/opsput/opsput_lcd.h55
-rw-r--r--arch/m32r/include/asm/opsput/opsput_pld.h255
-rw-r--r--arch/m32r/include/asm/page.h87
-rw-r--r--arch/m32r/include/asm/param.h23
-rw-r--r--arch/m32r/include/asm/pci.h8
-rw-r--r--arch/m32r/include/asm/percpu.h6
-rw-r--r--arch/m32r/include/asm/pgalloc.h76
-rw-r--r--arch/m32r/include/asm/pgtable-2level.h78
-rw-r--r--arch/m32r/include/asm/pgtable.h363
-rw-r--r--arch/m32r/include/asm/poll.h1
-rw-r--r--arch/m32r/include/asm/posix_types.h118
-rw-r--r--arch/m32r/include/asm/processor.h147
-rw-r--r--arch/m32r/include/asm/ptrace.h148
-rw-r--r--arch/m32r/include/asm/resource.h6
-rw-r--r--arch/m32r/include/asm/rtc.h65
-rw-r--r--arch/m32r/include/asm/s1d13806.h199
-rw-r--r--arch/m32r/include/asm/scatterlist.h21
-rw-r--r--arch/m32r/include/asm/sections.h7
-rw-r--r--arch/m32r/include/asm/segment.h10
-rw-r--r--arch/m32r/include/asm/sembuf.h25
-rw-r--r--arch/m32r/include/asm/serial.h9
-rw-r--r--arch/m32r/include/asm/setup.h38
-rw-r--r--arch/m32r/include/asm/shmbuf.h42
-rw-r--r--arch/m32r/include/asm/shmparam.h6
-rw-r--r--arch/m32r/include/asm/sigcontext.h39
-rw-r--r--arch/m32r/include/asm/siginfo.h6
-rw-r--r--arch/m32r/include/asm/signal.h166
-rw-r--r--arch/m32r/include/asm/smp.h119
-rw-r--r--arch/m32r/include/asm/socket.h60
-rw-r--r--arch/m32r/include/asm/sockios.h13
-rw-r--r--arch/m32r/include/asm/spinlock.h326
-rw-r--r--arch/m32r/include/asm/spinlock_types.h23
-rw-r--r--arch/m32r/include/asm/stat.h87
-rw-r--r--arch/m32r/include/asm/statfs.h6
-rw-r--r--arch/m32r/include/asm/string.h13
-rw-r--r--arch/m32r/include/asm/swab.h10
-rw-r--r--arch/m32r/include/asm/syscall.h8
-rw-r--r--arch/m32r/include/asm/system.h431
-rw-r--r--arch/m32r/include/asm/termbits.h199
-rw-r--r--arch/m32r/include/asm/termios.h91
-rw-r--r--arch/m32r/include/asm/thread_info.h184
-rw-r--r--arch/m32r/include/asm/timex.h27
-rw-r--r--arch/m32r/include/asm/tlb.h20
-rw-r--r--arch/m32r/include/asm/tlbflush.h97
-rw-r--r--arch/m32r/include/asm/topology.h6
-rw-r--r--arch/m32r/include/asm/types.h30
-rw-r--r--arch/m32r/include/asm/uaccess.h693
-rw-r--r--arch/m32r/include/asm/ucontext.h12
-rw-r--r--arch/m32r/include/asm/unaligned.h18
-rw-r--r--arch/m32r/include/asm/unistd.h389
-rw-r--r--arch/m32r/include/asm/user.h52
-rw-r--r--arch/m32r/include/asm/vga.h20
-rw-r--r--arch/m32r/include/asm/xor.h6
-rw-r--r--arch/mn10300/include/asm/bug.h10
-rw-r--r--arch/mn10300/include/asm/unistd.h2
-rw-r--r--arch/mn10300/kernel/entry.S2
-rw-r--r--arch/mn10300/kernel/setup.c4
-rw-r--r--arch/s390/appldata/appldata_base.c2
-rw-r--r--arch/s390/include/asm/cpuid.h25
-rw-r--r--arch/s390/include/asm/kvm_host.h1
-rw-r--r--arch/s390/include/asm/lowcore.h12
-rw-r--r--arch/s390/include/asm/processor.h17
-rw-r--r--arch/s390/include/asm/ptrace.h2
-rw-r--r--arch/s390/include/asm/setup.h24
-rw-r--r--arch/s390/include/asm/thread_info.h3
-rw-r--r--arch/s390/include/asm/timer.h1
-rw-r--r--arch/s390/include/asm/timex.h5
-rw-r--r--arch/s390/include/asm/unistd.h4
-rw-r--r--arch/s390/kernel/asm-offsets.c2
-rw-r--r--arch/s390/kernel/compat_wrapper.S18
-rw-r--r--arch/s390/kernel/early.c19
-rw-r--r--arch/s390/kernel/entry.S13
-rw-r--r--arch/s390/kernel/entry64.S13
-rw-r--r--arch/s390/kernel/head.S15
-rw-r--r--arch/s390/kernel/nmi.c5
-rw-r--r--arch/s390/kernel/setup.c12
-rw-r--r--arch/s390/kernel/smp.c4
-rw-r--r--arch/s390/kernel/syscalls.S2
-rw-r--r--arch/s390/kernel/time.c77
-rw-r--r--arch/s390/kernel/vtime.c67
-rw-r--r--arch/sh/kernel/sys_sh.c9
-rw-r--r--arch/sparc/include/asm/atomic_32.h2
-rw-r--r--arch/sparc/kernel/ldc.c6
-rw-r--r--arch/sparc/kernel/smp_64.c4
-rw-r--r--arch/x86/Kconfig1
-rw-r--r--arch/x86/Kconfig.cpu1
-rw-r--r--arch/x86/include/asm/pat.h4
-rw-r--r--arch/x86/include/asm/uv/uv_mmrs.h5
-rw-r--r--arch/x86/kernel/apic/x2apic_uv_x.c16
-rw-r--r--arch/x86/kernel/bios_uv.c3
-rw-r--r--arch/x86/kernel/microcode_core.c2
-rw-r--r--arch/x86/kernel/pci-swiotlb.c2
-rw-r--r--arch/x86/kernel/tlb_uv.c189
-rw-r--r--arch/x86/kernel/uv_sysfs.c4
-rw-r--r--arch/x86/mm/ioremap.c10
-rw-r--r--arch/x86/mm/pageattr.c127
-rw-r--r--arch/x86/mm/pat.c189
191 files changed, 12158 insertions, 2868 deletions
diff --git a/arch/arm/common/vic.c b/arch/arm/common/vic.c
index ecf0bfbab107..b2a781d9ce05 100644
--- a/arch/arm/common/vic.c
+++ b/arch/arm/common/vic.c
@@ -85,12 +85,11 @@ void __init vic_init(void __iomem *base, unsigned int irq_start,
85 writel(32, base + VIC_PL190_DEF_VECT_ADDR); 85 writel(32, base + VIC_PL190_DEF_VECT_ADDR);
86 86
87 for (i = 0; i < 32; i++) { 87 for (i = 0; i < 32; i++) {
88 unsigned int irq = irq_start + i;
89
90 set_irq_chip(irq, &vic_chip);
91 set_irq_chip_data(irq, base);
92
93 if (vic_sources & (1 << i)) { 88 if (vic_sources & (1 << i)) {
89 unsigned int irq = irq_start + i;
90
91 set_irq_chip(irq, &vic_chip);
92 set_irq_chip_data(irq, base);
94 set_irq_handler(irq, handle_level_irq); 93 set_irq_handler(irq, handle_level_irq);
95 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); 94 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
96 } 95 }
diff --git a/arch/arm/configs/imx27ads_defconfig b/arch/arm/configs/imx27ads_defconfig
deleted file mode 100644
index bcd95b8dd2df..000000000000
--- a/arch/arm/configs/imx27ads_defconfig
+++ /dev/null
@@ -1,826 +0,0 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.26-rc6
4# Fri Jun 20 16:29:34 2008
5#
6CONFIG_ARM=y
7CONFIG_SYS_SUPPORTS_APM_EMULATION=y
8CONFIG_GENERIC_GPIO=y
9CONFIG_GENERIC_TIME=y
10CONFIG_GENERIC_CLOCKEVENTS=y
11CONFIG_MMU=y
12# CONFIG_NO_IOPORT is not set
13CONFIG_GENERIC_HARDIRQS=y
14CONFIG_STACKTRACE_SUPPORT=y
15CONFIG_LOCKDEP_SUPPORT=y
16CONFIG_TRACE_IRQFLAGS_SUPPORT=y
17CONFIG_HARDIRQS_SW_RESEND=y
18CONFIG_GENERIC_IRQ_PROBE=y
19CONFIG_RWSEM_GENERIC_SPINLOCK=y
20# CONFIG_ARCH_HAS_ILOG2_U32 is not set
21# CONFIG_ARCH_HAS_ILOG2_U64 is not set
22CONFIG_GENERIC_HWEIGHT=y
23CONFIG_GENERIC_CALIBRATE_DELAY=y
24CONFIG_ARCH_SUPPORTS_AOUT=y
25CONFIG_ZONE_DMA=y
26CONFIG_ARCH_MTD_XIP=y
27CONFIG_VECTORS_BASE=0xffff0000
28CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
29
30#
31# General setup
32#
33CONFIG_EXPERIMENTAL=y
34CONFIG_BROKEN_ON_SMP=y
35CONFIG_LOCK_KERNEL=y
36CONFIG_INIT_ENV_ARG_LIMIT=32
37CONFIG_LOCALVERSION=""
38CONFIG_LOCALVERSION_AUTO=y
39# CONFIG_SWAP is not set
40CONFIG_SYSVIPC=y
41CONFIG_SYSVIPC_SYSCTL=y
42CONFIG_POSIX_MQUEUE=y
43# CONFIG_BSD_PROCESS_ACCT is not set
44# CONFIG_TASKSTATS is not set
45# CONFIG_AUDIT is not set
46# CONFIG_IKCONFIG is not set
47CONFIG_LOG_BUF_SHIFT=14
48# CONFIG_CGROUPS is not set
49# CONFIG_GROUP_SCHED is not set
50CONFIG_SYSFS_DEPRECATED=y
51CONFIG_SYSFS_DEPRECATED_V2=y
52# CONFIG_RELAY is not set
53# CONFIG_NAMESPACES is not set
54# CONFIG_BLK_DEV_INITRD is not set
55# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
56CONFIG_SYSCTL=y
57CONFIG_EMBEDDED=y
58CONFIG_UID16=y
59CONFIG_SYSCTL_SYSCALL=y
60CONFIG_SYSCTL_SYSCALL_CHECK=y
61CONFIG_KALLSYMS=y
62CONFIG_KALLSYMS_EXTRA_PASS=y
63CONFIG_HOTPLUG=y
64CONFIG_PRINTK=y
65CONFIG_BUG=y
66CONFIG_ELF_CORE=y
67CONFIG_COMPAT_BRK=y
68CONFIG_BASE_FULL=y
69CONFIG_FUTEX=y
70CONFIG_ANON_INODES=y
71CONFIG_EPOLL=y
72CONFIG_SIGNALFD=y
73CONFIG_TIMERFD=y
74CONFIG_EVENTFD=y
75CONFIG_SHMEM=y
76CONFIG_VM_EVENT_COUNTERS=y
77CONFIG_SLAB=y
78# CONFIG_SLUB is not set
79# CONFIG_SLOB is not set
80# CONFIG_PROFILING is not set
81# CONFIG_MARKERS is not set
82CONFIG_HAVE_OPROFILE=y
83# CONFIG_KPROBES is not set
84CONFIG_HAVE_KPROBES=y
85CONFIG_HAVE_KRETPROBES=y
86# CONFIG_HAVE_DMA_ATTRS is not set
87CONFIG_PROC_PAGE_MONITOR=y
88CONFIG_SLABINFO=y
89CONFIG_RT_MUTEXES=y
90# CONFIG_TINY_SHMEM is not set
91CONFIG_BASE_SMALL=0
92CONFIG_MODULES=y
93# CONFIG_MODULE_FORCE_LOAD is not set
94CONFIG_MODULE_UNLOAD=y
95# CONFIG_MODULE_FORCE_UNLOAD is not set
96# CONFIG_MODVERSIONS is not set
97# CONFIG_MODULE_SRCVERSION_ALL is not set
98# CONFIG_KMOD is not set
99CONFIG_BLOCK=y
100# CONFIG_LBD is not set
101# CONFIG_BLK_DEV_IO_TRACE is not set
102# CONFIG_LSF is not set
103# CONFIG_BLK_DEV_BSG is not set
104
105#
106# IO Schedulers
107#
108CONFIG_IOSCHED_NOOP=y
109# CONFIG_IOSCHED_AS is not set
110# CONFIG_IOSCHED_DEADLINE is not set
111# CONFIG_IOSCHED_CFQ is not set
112# CONFIG_DEFAULT_AS is not set
113# CONFIG_DEFAULT_DEADLINE is not set
114# CONFIG_DEFAULT_CFQ is not set
115CONFIG_DEFAULT_NOOP=y
116CONFIG_DEFAULT_IOSCHED="noop"
117CONFIG_CLASSIC_RCU=y
118
119#
120# System Type
121#
122# CONFIG_ARCH_AAEC2000 is not set
123# CONFIG_ARCH_INTEGRATOR is not set
124# CONFIG_ARCH_REALVIEW is not set
125# CONFIG_ARCH_VERSATILE is not set
126# CONFIG_ARCH_AT91 is not set
127# CONFIG_ARCH_CLPS7500 is not set
128# CONFIG_ARCH_CLPS711X is not set
129# CONFIG_ARCH_CO285 is not set
130# CONFIG_ARCH_EBSA110 is not set
131# CONFIG_ARCH_EP93XX is not set
132# CONFIG_ARCH_FOOTBRIDGE is not set
133# CONFIG_ARCH_NETX is not set
134# CONFIG_ARCH_H720X is not set
135# CONFIG_ARCH_IMX is not set
136# CONFIG_ARCH_IOP13XX is not set
137# CONFIG_ARCH_IOP32X is not set
138# CONFIG_ARCH_IOP33X is not set
139# CONFIG_ARCH_IXP23XX is not set
140# CONFIG_ARCH_IXP2000 is not set
141# CONFIG_ARCH_IXP4XX is not set
142# CONFIG_ARCH_L7200 is not set
143# CONFIG_ARCH_KS8695 is not set
144# CONFIG_ARCH_NS9XXX is not set
145CONFIG_ARCH_MXC=y
146# CONFIG_ARCH_ORION5X is not set
147# CONFIG_ARCH_PNX4008 is not set
148# CONFIG_ARCH_PXA is not set
149# CONFIG_ARCH_RPC is not set
150# CONFIG_ARCH_SA1100 is not set
151# CONFIG_ARCH_S3C2410 is not set
152# CONFIG_ARCH_SHARK is not set
153# CONFIG_ARCH_LH7A40X is not set
154# CONFIG_ARCH_DAVINCI is not set
155# CONFIG_ARCH_OMAP is not set
156# CONFIG_ARCH_MSM7X00A is not set
157
158#
159# Boot options
160#
161
162#
163# Power management
164#
165
166#
167# Freescale MXC Implementations
168#
169CONFIG_ARCH_MX2=y
170# CONFIG_ARCH_MX3 is not set
171
172#
173# MX2 family CPU support
174#
175CONFIG_MACH_MX27=y
176
177#
178# MX2 Platforms
179#
180CONFIG_MACH_MX27ADS=y
181# CONFIG_MACH_PCM038 is not set
182
183#
184# Processor Type
185#
186CONFIG_CPU_32=y
187CONFIG_CPU_ARM926T=y
188CONFIG_CPU_32v5=y
189CONFIG_CPU_ABRT_EV5TJ=y
190CONFIG_CPU_PABRT_NOIFAR=y
191CONFIG_CPU_CACHE_VIVT=y
192CONFIG_CPU_COPY_V4WB=y
193CONFIG_CPU_TLB_V4WBI=y
194CONFIG_CPU_CP15=y
195CONFIG_CPU_CP15_MMU=y
196
197#
198# Processor Features
199#
200CONFIG_ARM_THUMB=y
201# CONFIG_CPU_ICACHE_DISABLE is not set
202# CONFIG_CPU_DCACHE_DISABLE is not set
203# CONFIG_CPU_DCACHE_WRITETHROUGH is not set
204# CONFIG_CPU_CACHE_ROUND_ROBIN is not set
205# CONFIG_OUTER_CACHE is not set
206
207#
208# Bus support
209#
210# CONFIG_PCI_SYSCALL is not set
211# CONFIG_ARCH_SUPPORTS_MSI is not set
212# CONFIG_PCCARD is not set
213
214#
215# Kernel Features
216#
217CONFIG_TICK_ONESHOT=y
218CONFIG_NO_HZ=y
219CONFIG_HIGH_RES_TIMERS=y
220CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
221CONFIG_PREEMPT=y
222CONFIG_HZ=100
223CONFIG_AEABI=y
224# CONFIG_OABI_COMPAT is not set
225# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
226CONFIG_SELECT_MEMORY_MODEL=y
227CONFIG_FLATMEM_MANUAL=y
228# CONFIG_DISCONTIGMEM_MANUAL is not set
229# CONFIG_SPARSEMEM_MANUAL is not set
230CONFIG_FLATMEM=y
231CONFIG_FLAT_NODE_MEM_MAP=y
232# CONFIG_SPARSEMEM_STATIC is not set
233# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
234CONFIG_PAGEFLAGS_EXTENDED=y
235CONFIG_SPLIT_PTLOCK_CPUS=4096
236# CONFIG_RESOURCES_64BIT is not set
237CONFIG_ZONE_DMA_FLAG=1
238CONFIG_BOUNCE=y
239CONFIG_VIRT_TO_BUS=y
240CONFIG_ALIGNMENT_TRAP=y
241
242#
243# Boot options
244#
245CONFIG_ZBOOT_ROM_TEXT=0x0
246CONFIG_ZBOOT_ROM_BSS=0x0
247CONFIG_CMDLINE=""
248# CONFIG_XIP_KERNEL is not set
249# CONFIG_KEXEC is not set
250
251#
252# Floating point emulation
253#
254
255#
256# At least one emulation must be selected
257#
258# CONFIG_VFP is not set
259
260#
261# Userspace binary formats
262#
263CONFIG_BINFMT_ELF=y
264# CONFIG_BINFMT_AOUT is not set
265# CONFIG_BINFMT_MISC is not set
266
267#
268# Power management options
269#
270# CONFIG_PM is not set
271CONFIG_ARCH_SUSPEND_POSSIBLE=y
272
273#
274# Networking
275#
276CONFIG_NET=y
277
278#
279# Networking options
280#
281CONFIG_PACKET=y
282CONFIG_PACKET_MMAP=y
283CONFIG_UNIX=y
284# CONFIG_NET_KEY is not set
285CONFIG_INET=y
286CONFIG_IP_MULTICAST=y
287# CONFIG_IP_ADVANCED_ROUTER is not set
288CONFIG_IP_FIB_HASH=y
289CONFIG_IP_PNP=y
290# CONFIG_IP_PNP_DHCP is not set
291# CONFIG_IP_PNP_BOOTP is not set
292# CONFIG_IP_PNP_RARP is not set
293# CONFIG_NET_IPIP is not set
294# CONFIG_NET_IPGRE is not set
295# CONFIG_IP_MROUTE is not set
296# CONFIG_ARPD is not set
297# CONFIG_SYN_COOKIES is not set
298# CONFIG_INET_AH is not set
299# CONFIG_INET_ESP is not set
300# CONFIG_INET_IPCOMP is not set
301# CONFIG_INET_XFRM_TUNNEL is not set
302# CONFIG_INET_TUNNEL is not set
303# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
304# CONFIG_INET_XFRM_MODE_TUNNEL is not set
305# CONFIG_INET_XFRM_MODE_BEET is not set
306# CONFIG_INET_LRO is not set
307# CONFIG_INET_DIAG is not set
308# CONFIG_TCP_CONG_ADVANCED is not set
309CONFIG_TCP_CONG_CUBIC=y
310CONFIG_DEFAULT_TCP_CONG="cubic"
311# CONFIG_TCP_MD5SIG is not set
312# CONFIG_IPV6 is not set
313# CONFIG_NETWORK_SECMARK is not set
314# CONFIG_NETFILTER is not set
315# CONFIG_IP_DCCP is not set
316# CONFIG_IP_SCTP is not set
317# CONFIG_TIPC is not set
318# CONFIG_ATM is not set
319# CONFIG_BRIDGE is not set
320# CONFIG_VLAN_8021Q is not set
321# CONFIG_DECNET is not set
322# CONFIG_LLC2 is not set
323# CONFIG_IPX is not set
324# CONFIG_ATALK is not set
325# CONFIG_X25 is not set
326# CONFIG_LAPB is not set
327# CONFIG_ECONET is not set
328# CONFIG_WAN_ROUTER is not set
329# CONFIG_NET_SCHED is not set
330
331#
332# Network testing
333#
334# CONFIG_NET_PKTGEN is not set
335# CONFIG_HAMRADIO is not set
336# CONFIG_CAN is not set
337# CONFIG_IRDA is not set
338# CONFIG_BT is not set
339# CONFIG_AF_RXRPC is not set
340
341#
342# Wireless
343#
344# CONFIG_CFG80211 is not set
345# CONFIG_WIRELESS_EXT is not set
346# CONFIG_MAC80211 is not set
347# CONFIG_IEEE80211 is not set
348# CONFIG_RFKILL is not set
349# CONFIG_NET_9P is not set
350
351#
352# Device Drivers
353#
354
355#
356# Generic Driver Options
357#
358CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
359CONFIG_STANDALONE=y
360CONFIG_PREVENT_FIRMWARE_BUILD=y
361# CONFIG_FW_LOADER is not set
362# CONFIG_SYS_HYPERVISOR is not set
363# CONFIG_CONNECTOR is not set
364CONFIG_MTD=y
365# CONFIG_MTD_DEBUG is not set
366# CONFIG_MTD_CONCAT is not set
367CONFIG_MTD_PARTITIONS=y
368# CONFIG_MTD_REDBOOT_PARTS is not set
369CONFIG_MTD_CMDLINE_PARTS=y
370# CONFIG_MTD_AFS_PARTS is not set
371# CONFIG_MTD_AR7_PARTS is not set
372
373#
374# User Modules And Translation Layers
375#
376CONFIG_MTD_CHAR=y
377CONFIG_MTD_BLKDEVS=y
378CONFIG_MTD_BLOCK=y
379# CONFIG_FTL is not set
380# CONFIG_NFTL is not set
381# CONFIG_INFTL is not set
382# CONFIG_RFD_FTL is not set
383# CONFIG_SSFDC is not set
384# CONFIG_MTD_OOPS is not set
385
386#
387# RAM/ROM/Flash chip drivers
388#
389CONFIG_MTD_CFI=y
390# CONFIG_MTD_JEDECPROBE is not set
391CONFIG_MTD_GEN_PROBE=y
392CONFIG_MTD_CFI_ADV_OPTIONS=y
393CONFIG_MTD_CFI_NOSWAP=y
394# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set
395# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set
396CONFIG_MTD_CFI_GEOMETRY=y
397# CONFIG_MTD_MAP_BANK_WIDTH_1 is not set
398CONFIG_MTD_MAP_BANK_WIDTH_2=y
399# CONFIG_MTD_MAP_BANK_WIDTH_4 is not set
400# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
401# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
402# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
403CONFIG_MTD_CFI_I1=y
404# CONFIG_MTD_CFI_I2 is not set
405# CONFIG_MTD_CFI_I4 is not set
406# CONFIG_MTD_CFI_I8 is not set
407# CONFIG_MTD_OTP is not set
408CONFIG_MTD_CFI_INTELEXT=y
409# CONFIG_MTD_CFI_AMDSTD is not set
410# CONFIG_MTD_CFI_STAA is not set
411CONFIG_MTD_CFI_UTIL=y
412# CONFIG_MTD_RAM is not set
413# CONFIG_MTD_ROM is not set
414# CONFIG_MTD_ABSENT is not set
415# CONFIG_MTD_XIP is not set
416
417#
418# Mapping drivers for chip access
419#
420# CONFIG_MTD_COMPLEX_MAPPINGS is not set
421CONFIG_MTD_PHYSMAP=y
422CONFIG_MTD_PHYSMAP_START=0x00000000
423CONFIG_MTD_PHYSMAP_LEN=0x0
424CONFIG_MTD_PHYSMAP_BANKWIDTH=2
425# CONFIG_MTD_ARM_INTEGRATOR is not set
426# CONFIG_MTD_PLATRAM is not set
427
428#
429# Self-contained MTD device drivers
430#
431# CONFIG_MTD_SLRAM is not set
432# CONFIG_MTD_PHRAM is not set
433# CONFIG_MTD_MTDRAM is not set
434# CONFIG_MTD_BLOCK2MTD is not set
435
436#
437# Disk-On-Chip Device Drivers
438#
439# CONFIG_MTD_DOC2000 is not set
440# CONFIG_MTD_DOC2001 is not set
441# CONFIG_MTD_DOC2001PLUS is not set
442# CONFIG_MTD_NAND is not set
443# CONFIG_MTD_ONENAND is not set
444
445#
446# UBI - Unsorted block images
447#
448# CONFIG_MTD_UBI is not set
449# CONFIG_PARPORT is not set
450CONFIG_BLK_DEV=y
451# CONFIG_BLK_DEV_COW_COMMON is not set
452# CONFIG_BLK_DEV_LOOP is not set
453# CONFIG_BLK_DEV_NBD is not set
454# CONFIG_BLK_DEV_RAM is not set
455# CONFIG_CDROM_PKTCDVD is not set
456# CONFIG_ATA_OVER_ETH is not set
457# CONFIG_MISC_DEVICES is not set
458CONFIG_HAVE_IDE=y
459# CONFIG_IDE is not set
460
461#
462# SCSI device support
463#
464# CONFIG_RAID_ATTRS is not set
465# CONFIG_SCSI is not set
466# CONFIG_SCSI_DMA is not set
467# CONFIG_SCSI_NETLINK is not set
468# CONFIG_ATA is not set
469# CONFIG_MD is not set
470CONFIG_NETDEVICES=y
471# CONFIG_NETDEVICES_MULTIQUEUE is not set
472# CONFIG_DUMMY is not set
473# CONFIG_BONDING is not set
474# CONFIG_MACVLAN is not set
475# CONFIG_EQUALIZER is not set
476# CONFIG_TUN is not set
477# CONFIG_VETH is not set
478# CONFIG_PHYLIB is not set
479CONFIG_NET_ETHERNET=y
480# CONFIG_MII is not set
481# CONFIG_AX88796 is not set
482# CONFIG_SMC91X is not set
483# CONFIG_DM9000 is not set
484# CONFIG_IBM_NEW_EMAC_ZMII is not set
485# CONFIG_IBM_NEW_EMAC_RGMII is not set
486# CONFIG_IBM_NEW_EMAC_TAH is not set
487# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
488# CONFIG_B44 is not set
489# CONFIG_FEC_OLD is not set
490# CONFIG_NETDEV_1000 is not set
491# CONFIG_NETDEV_10000 is not set
492
493#
494# Wireless LAN
495#
496# CONFIG_WLAN_PRE80211 is not set
497# CONFIG_WLAN_80211 is not set
498# CONFIG_IWLWIFI_LEDS is not set
499# CONFIG_WAN is not set
500# CONFIG_PPP is not set
501# CONFIG_SLIP is not set
502# CONFIG_NETCONSOLE is not set
503# CONFIG_NETPOLL is not set
504# CONFIG_NET_POLL_CONTROLLER is not set
505# CONFIG_ISDN is not set
506
507#
508# Input device support
509#
510CONFIG_INPUT=y
511# CONFIG_INPUT_FF_MEMLESS is not set
512# CONFIG_INPUT_POLLDEV is not set
513
514#
515# Userland interfaces
516#
517# CONFIG_INPUT_MOUSEDEV is not set
518# CONFIG_INPUT_JOYDEV is not set
519CONFIG_INPUT_EVDEV=y
520# CONFIG_INPUT_EVBUG is not set
521
522#
523# Input Device Drivers
524#
525# CONFIG_INPUT_KEYBOARD is not set
526# CONFIG_INPUT_MOUSE is not set
527# CONFIG_INPUT_JOYSTICK is not set
528# CONFIG_INPUT_TABLET is not set
529CONFIG_INPUT_TOUCHSCREEN=y
530# CONFIG_TOUCHSCREEN_FUJITSU is not set
531# CONFIG_TOUCHSCREEN_GUNZE is not set
532# CONFIG_TOUCHSCREEN_ELO is not set
533# CONFIG_TOUCHSCREEN_MTOUCH is not set
534# CONFIG_TOUCHSCREEN_MK712 is not set
535# CONFIG_TOUCHSCREEN_PENMOUNT is not set
536# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
537# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
538# CONFIG_TOUCHSCREEN_UCB1400 is not set
539# CONFIG_INPUT_MISC is not set
540
541#
542# Hardware I/O ports
543#
544# CONFIG_SERIO is not set
545# CONFIG_GAMEPORT is not set
546
547#
548# Character devices
549#
550# CONFIG_VT is not set
551CONFIG_DEVKMEM=y
552# CONFIG_SERIAL_NONSTANDARD is not set
553
554#
555# Serial drivers
556#
557# CONFIG_SERIAL_8250 is not set
558
559#
560# Non-8250 serial port support
561#
562# CONFIG_SERIAL_IMX is not set
563CONFIG_UNIX98_PTYS=y
564# CONFIG_LEGACY_PTYS is not set
565# CONFIG_IPMI_HANDLER is not set
566# CONFIG_HW_RANDOM is not set
567# CONFIG_NVRAM is not set
568# CONFIG_R3964 is not set
569# CONFIG_RAW_DRIVER is not set
570# CONFIG_TCG_TPM is not set
571# CONFIG_I2C is not set
572# CONFIG_SPI is not set
573CONFIG_HAVE_GPIO_LIB=y
574
575#
576# GPIO Support
577#
578
579#
580# I2C GPIO expanders:
581#
582
583#
584# SPI GPIO expanders:
585#
586# CONFIG_W1 is not set
587# CONFIG_POWER_SUPPLY is not set
588# CONFIG_HWMON is not set
589# CONFIG_WATCHDOG is not set
590
591#
592# Sonics Silicon Backplane
593#
594CONFIG_SSB_POSSIBLE=y
595# CONFIG_SSB is not set
596
597#
598# Multifunction device drivers
599#
600# CONFIG_MFD_SM501 is not set
601# CONFIG_MFD_ASIC3 is not set
602# CONFIG_HTC_EGPIO is not set
603# CONFIG_HTC_PASIC3 is not set
604
605#
606# Multimedia devices
607#
608
609#
610# Multimedia core support
611#
612# CONFIG_VIDEO_DEV is not set
613# CONFIG_DVB_CORE is not set
614# CONFIG_VIDEO_MEDIA is not set
615
616#
617# Multimedia drivers
618#
619# CONFIG_DAB is not set
620
621#
622# Graphics support
623#
624# CONFIG_VGASTATE is not set
625# CONFIG_VIDEO_OUTPUT_CONTROL is not set
626# CONFIG_FB is not set
627# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
628
629#
630# Display device support
631#
632# CONFIG_DISPLAY_SUPPORT is not set
633
634#
635# Sound
636#
637# CONFIG_SOUND is not set
638# CONFIG_HID_SUPPORT is not set
639# CONFIG_USB_SUPPORT is not set
640# CONFIG_MMC is not set
641# CONFIG_NEW_LEDS is not set
642CONFIG_RTC_LIB=y
643# CONFIG_RTC_CLASS is not set
644# CONFIG_UIO is not set
645
646#
647# File systems
648#
649# CONFIG_EXT2_FS is not set
650# CONFIG_EXT3_FS is not set
651# CONFIG_EXT4DEV_FS is not set
652# CONFIG_REISERFS_FS is not set
653# CONFIG_JFS_FS is not set
654# CONFIG_FS_POSIX_ACL is not set
655# CONFIG_XFS_FS is not set
656# CONFIG_OCFS2_FS is not set
657# CONFIG_DNOTIFY is not set
658# CONFIG_INOTIFY is not set
659# CONFIG_QUOTA is not set
660# CONFIG_AUTOFS_FS is not set
661# CONFIG_AUTOFS4_FS is not set
662# CONFIG_FUSE_FS is not set
663
664#
665# CD-ROM/DVD Filesystems
666#
667# CONFIG_ISO9660_FS is not set
668# CONFIG_UDF_FS is not set
669
670#
671# DOS/FAT/NT Filesystems
672#
673# CONFIG_MSDOS_FS is not set
674# CONFIG_VFAT_FS is not set
675# CONFIG_NTFS_FS is not set
676
677#
678# Pseudo filesystems
679#
680CONFIG_PROC_FS=y
681CONFIG_PROC_SYSCTL=y
682CONFIG_SYSFS=y
683CONFIG_TMPFS=y
684# CONFIG_TMPFS_POSIX_ACL is not set
685# CONFIG_HUGETLB_PAGE is not set
686# CONFIG_CONFIGFS_FS is not set
687
688#
689# Miscellaneous filesystems
690#
691# CONFIG_ADFS_FS is not set
692# CONFIG_AFFS_FS is not set
693# CONFIG_HFS_FS is not set
694# CONFIG_HFSPLUS_FS is not set
695# CONFIG_BEFS_FS is not set
696# CONFIG_BFS_FS is not set
697# CONFIG_EFS_FS is not set
698CONFIG_JFFS2_FS=y
699CONFIG_JFFS2_FS_DEBUG=0
700CONFIG_JFFS2_FS_WRITEBUFFER=y
701# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
702# CONFIG_JFFS2_SUMMARY is not set
703# CONFIG_JFFS2_FS_XATTR is not set
704# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
705CONFIG_JFFS2_ZLIB=y
706# CONFIG_JFFS2_LZO is not set
707CONFIG_JFFS2_RTIME=y
708# CONFIG_JFFS2_RUBIN is not set
709# CONFIG_CRAMFS is not set
710# CONFIG_VXFS_FS is not set
711# CONFIG_MINIX_FS is not set
712# CONFIG_HPFS_FS is not set
713# CONFIG_QNX4FS_FS is not set
714# CONFIG_ROMFS_FS is not set
715# CONFIG_SYSV_FS is not set
716# CONFIG_UFS_FS is not set
717CONFIG_NETWORK_FILESYSTEMS=y
718CONFIG_NFS_FS=y
719CONFIG_NFS_V3=y
720# CONFIG_NFS_V3_ACL is not set
721# CONFIG_NFS_V4 is not set
722# CONFIG_NFSD is not set
723CONFIG_ROOT_NFS=y
724CONFIG_LOCKD=y
725CONFIG_LOCKD_V4=y
726CONFIG_NFS_COMMON=y
727CONFIG_SUNRPC=y
728# CONFIG_SUNRPC_BIND34 is not set
729# CONFIG_RPCSEC_GSS_KRB5 is not set
730# CONFIG_RPCSEC_GSS_SPKM3 is not set
731# CONFIG_SMB_FS is not set
732# CONFIG_CIFS is not set
733# CONFIG_NCP_FS is not set
734# CONFIG_CODA_FS is not set
735# CONFIG_AFS_FS is not set
736
737#
738# Partition Types
739#
740# CONFIG_PARTITION_ADVANCED is not set
741CONFIG_MSDOS_PARTITION=y
742CONFIG_NLS=y
743CONFIG_NLS_DEFAULT="iso8859-1"
744CONFIG_NLS_CODEPAGE_437=m
745# CONFIG_NLS_CODEPAGE_737 is not set
746# CONFIG_NLS_CODEPAGE_775 is not set
747CONFIG_NLS_CODEPAGE_850=m
748# CONFIG_NLS_CODEPAGE_852 is not set
749# CONFIG_NLS_CODEPAGE_855 is not set
750# CONFIG_NLS_CODEPAGE_857 is not set
751# CONFIG_NLS_CODEPAGE_860 is not set
752# CONFIG_NLS_CODEPAGE_861 is not set
753# CONFIG_NLS_CODEPAGE_862 is not set
754# CONFIG_NLS_CODEPAGE_863 is not set
755# CONFIG_NLS_CODEPAGE_864 is not set
756# CONFIG_NLS_CODEPAGE_865 is not set
757# CONFIG_NLS_CODEPAGE_866 is not set
758# CONFIG_NLS_CODEPAGE_869 is not set
759# CONFIG_NLS_CODEPAGE_936 is not set
760# CONFIG_NLS_CODEPAGE_950 is not set
761# CONFIG_NLS_CODEPAGE_932 is not set
762# CONFIG_NLS_CODEPAGE_949 is not set
763# CONFIG_NLS_CODEPAGE_874 is not set
764# CONFIG_NLS_ISO8859_8 is not set
765# CONFIG_NLS_CODEPAGE_1250 is not set
766# CONFIG_NLS_CODEPAGE_1251 is not set
767# CONFIG_NLS_ASCII is not set
768CONFIG_NLS_ISO8859_1=y
769# CONFIG_NLS_ISO8859_2 is not set
770# CONFIG_NLS_ISO8859_3 is not set
771# CONFIG_NLS_ISO8859_4 is not set
772# CONFIG_NLS_ISO8859_5 is not set
773# CONFIG_NLS_ISO8859_6 is not set
774# CONFIG_NLS_ISO8859_7 is not set
775# CONFIG_NLS_ISO8859_9 is not set
776# CONFIG_NLS_ISO8859_13 is not set
777# CONFIG_NLS_ISO8859_14 is not set
778CONFIG_NLS_ISO8859_15=m
779# CONFIG_NLS_KOI8_R is not set
780# CONFIG_NLS_KOI8_U is not set
781# CONFIG_NLS_UTF8 is not set
782# CONFIG_DLM is not set
783
784#
785# Kernel hacking
786#
787# CONFIG_PRINTK_TIME is not set
788CONFIG_ENABLE_WARN_DEPRECATED=y
789CONFIG_ENABLE_MUST_CHECK=y
790CONFIG_FRAME_WARN=1024
791# CONFIG_MAGIC_SYSRQ is not set
792# CONFIG_UNUSED_SYMBOLS is not set
793# CONFIG_DEBUG_FS is not set
794# CONFIG_HEADERS_CHECK is not set
795# CONFIG_DEBUG_KERNEL is not set
796# CONFIG_DEBUG_BUGVERBOSE is not set
797CONFIG_FRAME_POINTER=y
798# CONFIG_SAMPLES is not set
799# CONFIG_DEBUG_USER is not set
800
801#
802# Security options
803#
804# CONFIG_KEYS is not set
805# CONFIG_SECURITY is not set
806# CONFIG_SECURITY_FILE_CAPABILITIES is not set
807# CONFIG_CRYPTO is not set
808
809#
810# Library routines
811#
812CONFIG_BITREVERSE=y
813# CONFIG_GENERIC_FIND_FIRST_BIT is not set
814# CONFIG_GENERIC_FIND_NEXT_BIT is not set
815# CONFIG_CRC_CCITT is not set
816# CONFIG_CRC16 is not set
817# CONFIG_CRC_ITU_T is not set
818CONFIG_CRC32=y
819# CONFIG_CRC7 is not set
820# CONFIG_LIBCRC32C is not set
821CONFIG_ZLIB_INFLATE=y
822CONFIG_ZLIB_DEFLATE=y
823CONFIG_PLIST=y
824CONFIG_HAS_IOMEM=y
825CONFIG_HAS_IOPORT=y
826CONFIG_HAS_DMA=y
diff --git a/arch/arm/configs/mx31ads_defconfig b/arch/arm/configs/mx1_defconfig
index e05271753e15..0200d67e30ba 100644
--- a/arch/arm/configs/mx31ads_defconfig
+++ b/arch/arm/configs/mx1_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.26-rc6 3# Linux kernel version: 2.6.30-rc1
4# Fri Jun 20 16:21:11 2008 4# Wed Apr 8 11:11:33 2009
5# 5#
6CONFIG_ARM=y 6CONFIG_ARM=y
7CONFIG_SYS_SUPPORTS_APM_EMULATION=y 7CONFIG_SYS_SUPPORTS_APM_EMULATION=y
@@ -12,6 +12,7 @@ CONFIG_MMU=y
12# CONFIG_NO_IOPORT is not set 12# CONFIG_NO_IOPORT is not set
13CONFIG_GENERIC_HARDIRQS=y 13CONFIG_GENERIC_HARDIRQS=y
14CONFIG_STACKTRACE_SUPPORT=y 14CONFIG_STACKTRACE_SUPPORT=y
15CONFIG_HAVE_LATENCYTOP_SUPPORT=y
15CONFIG_LOCKDEP_SUPPORT=y 16CONFIG_LOCKDEP_SUPPORT=y
16CONFIG_TRACE_IRQFLAGS_SUPPORT=y 17CONFIG_TRACE_IRQFLAGS_SUPPORT=y
17CONFIG_HARDIRQS_SW_RESEND=y 18CONFIG_HARDIRQS_SW_RESEND=y
@@ -21,9 +22,8 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y
21# CONFIG_ARCH_HAS_ILOG2_U64 is not set 22# CONFIG_ARCH_HAS_ILOG2_U64 is not set
22CONFIG_GENERIC_HWEIGHT=y 23CONFIG_GENERIC_HWEIGHT=y
23CONFIG_GENERIC_CALIBRATE_DELAY=y 24CONFIG_GENERIC_CALIBRATE_DELAY=y
24CONFIG_ARCH_SUPPORTS_AOUT=y
25CONFIG_ZONE_DMA=y
26CONFIG_ARCH_MTD_XIP=y 25CONFIG_ARCH_MTD_XIP=y
26CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
27CONFIG_VECTORS_BASE=0xffff0000 27CONFIG_VECTORS_BASE=0xffff0000
28CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 28CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
29 29
@@ -43,15 +43,24 @@ CONFIG_SYSVIPC_SYSCTL=y
43# CONFIG_BSD_PROCESS_ACCT is not set 43# CONFIG_BSD_PROCESS_ACCT is not set
44# CONFIG_TASKSTATS is not set 44# CONFIG_TASKSTATS is not set
45# CONFIG_AUDIT is not set 45# CONFIG_AUDIT is not set
46
47#
48# RCU Subsystem
49#
50CONFIG_CLASSIC_RCU=y
51# CONFIG_TREE_RCU is not set
52# CONFIG_PREEMPT_RCU is not set
53# CONFIG_TREE_RCU_TRACE is not set
54# CONFIG_PREEMPT_RCU_TRACE is not set
46CONFIG_IKCONFIG=y 55CONFIG_IKCONFIG=y
47CONFIG_IKCONFIG_PROC=y 56CONFIG_IKCONFIG_PROC=y
48CONFIG_LOG_BUF_SHIFT=14 57CONFIG_LOG_BUF_SHIFT=14
49# CONFIG_CGROUPS is not set
50CONFIG_GROUP_SCHED=y 58CONFIG_GROUP_SCHED=y
51CONFIG_FAIR_GROUP_SCHED=y 59CONFIG_FAIR_GROUP_SCHED=y
52# CONFIG_RT_GROUP_SCHED is not set 60# CONFIG_RT_GROUP_SCHED is not set
53CONFIG_USER_SCHED=y 61CONFIG_USER_SCHED=y
54# CONFIG_CGROUP_SCHED is not set 62# CONFIG_CGROUP_SCHED is not set
63# CONFIG_CGROUPS is not set
55CONFIG_SYSFS_DEPRECATED=y 64CONFIG_SYSFS_DEPRECATED=y
56CONFIG_SYSFS_DEPRECATED_V2=y 65CONFIG_SYSFS_DEPRECATED_V2=y
57# CONFIG_RELAY is not set 66# CONFIG_RELAY is not set
@@ -59,26 +68,26 @@ CONFIG_SYSFS_DEPRECATED_V2=y
59# CONFIG_BLK_DEV_INITRD is not set 68# CONFIG_BLK_DEV_INITRD is not set
60CONFIG_CC_OPTIMIZE_FOR_SIZE=y 69CONFIG_CC_OPTIMIZE_FOR_SIZE=y
61CONFIG_SYSCTL=y 70CONFIG_SYSCTL=y
71CONFIG_ANON_INODES=y
62CONFIG_EMBEDDED=y 72CONFIG_EMBEDDED=y
63CONFIG_UID16=y 73CONFIG_UID16=y
64CONFIG_SYSCTL_SYSCALL=y 74CONFIG_SYSCTL_SYSCALL=y
65CONFIG_SYSCTL_SYSCALL_CHECK=y
66CONFIG_KALLSYMS=y 75CONFIG_KALLSYMS=y
67# CONFIG_KALLSYMS_EXTRA_PASS is not set 76# CONFIG_KALLSYMS_EXTRA_PASS is not set
68CONFIG_HOTPLUG=y 77CONFIG_HOTPLUG=y
69CONFIG_PRINTK=y 78CONFIG_PRINTK=y
70CONFIG_BUG=y 79CONFIG_BUG=y
71CONFIG_ELF_CORE=y 80CONFIG_ELF_CORE=y
72CONFIG_COMPAT_BRK=y
73CONFIG_BASE_FULL=y 81CONFIG_BASE_FULL=y
74CONFIG_FUTEX=y 82CONFIG_FUTEX=y
75CONFIG_ANON_INODES=y
76CONFIG_EPOLL=y 83CONFIG_EPOLL=y
77CONFIG_SIGNALFD=y 84CONFIG_SIGNALFD=y
78CONFIG_TIMERFD=y 85CONFIG_TIMERFD=y
79CONFIG_EVENTFD=y 86CONFIG_EVENTFD=y
80CONFIG_SHMEM=y 87CONFIG_SHMEM=y
88CONFIG_AIO=y
81CONFIG_VM_EVENT_COUNTERS=y 89CONFIG_VM_EVENT_COUNTERS=y
90CONFIG_COMPAT_BRK=y
82CONFIG_SLAB=y 91CONFIG_SLAB=y
83# CONFIG_SLUB is not set 92# CONFIG_SLUB is not set
84# CONFIG_SLOB is not set 93# CONFIG_SLOB is not set
@@ -88,11 +97,10 @@ CONFIG_HAVE_OPROFILE=y
88# CONFIG_KPROBES is not set 97# CONFIG_KPROBES is not set
89CONFIG_HAVE_KPROBES=y 98CONFIG_HAVE_KPROBES=y
90CONFIG_HAVE_KRETPROBES=y 99CONFIG_HAVE_KRETPROBES=y
91# CONFIG_HAVE_DMA_ATTRS is not set 100# CONFIG_SLOW_WORK is not set
92CONFIG_PROC_PAGE_MONITOR=y 101CONFIG_HAVE_GENERIC_DMA_COHERENT=y
93CONFIG_SLABINFO=y 102CONFIG_SLABINFO=y
94CONFIG_RT_MUTEXES=y 103CONFIG_RT_MUTEXES=y
95# CONFIG_TINY_SHMEM is not set
96CONFIG_BASE_SMALL=0 104CONFIG_BASE_SMALL=0
97CONFIG_MODULES=y 105CONFIG_MODULES=y
98# CONFIG_MODULE_FORCE_LOAD is not set 106# CONFIG_MODULE_FORCE_LOAD is not set
@@ -100,12 +108,10 @@ CONFIG_MODULE_UNLOAD=y
100CONFIG_MODULE_FORCE_UNLOAD=y 108CONFIG_MODULE_FORCE_UNLOAD=y
101CONFIG_MODVERSIONS=y 109CONFIG_MODVERSIONS=y
102# CONFIG_MODULE_SRCVERSION_ALL is not set 110# CONFIG_MODULE_SRCVERSION_ALL is not set
103CONFIG_KMOD=y
104CONFIG_BLOCK=y 111CONFIG_BLOCK=y
105# CONFIG_LBD is not set 112# CONFIG_LBD is not set
106# CONFIG_BLK_DEV_IO_TRACE is not set
107# CONFIG_LSF is not set
108# CONFIG_BLK_DEV_BSG is not set 113# CONFIG_BLK_DEV_BSG is not set
114# CONFIG_BLK_DEV_INTEGRITY is not set
109 115
110# 116#
111# IO Schedulers 117# IO Schedulers
@@ -119,7 +125,7 @@ CONFIG_IOSCHED_CFQ=y
119CONFIG_DEFAULT_CFQ=y 125CONFIG_DEFAULT_CFQ=y
120# CONFIG_DEFAULT_NOOP is not set 126# CONFIG_DEFAULT_NOOP is not set
121CONFIG_DEFAULT_IOSCHED="cfq" 127CONFIG_DEFAULT_IOSCHED="cfq"
122CONFIG_CLASSIC_RCU=y 128CONFIG_FREEZER=y
123 129
124# 130#
125# System Type 131# System Type
@@ -129,11 +135,10 @@ CONFIG_CLASSIC_RCU=y
129# CONFIG_ARCH_REALVIEW is not set 135# CONFIG_ARCH_REALVIEW is not set
130# CONFIG_ARCH_VERSATILE is not set 136# CONFIG_ARCH_VERSATILE is not set
131# CONFIG_ARCH_AT91 is not set 137# CONFIG_ARCH_AT91 is not set
132# CONFIG_ARCH_CLPS7500 is not set
133# CONFIG_ARCH_CLPS711X is not set 138# CONFIG_ARCH_CLPS711X is not set
134# CONFIG_ARCH_CO285 is not set
135# CONFIG_ARCH_EBSA110 is not set 139# CONFIG_ARCH_EBSA110 is not set
136# CONFIG_ARCH_EP93XX is not set 140# CONFIG_ARCH_EP93XX is not set
141# CONFIG_ARCH_GEMINI is not set
137# CONFIG_ARCH_FOOTBRIDGE is not set 142# CONFIG_ARCH_FOOTBRIDGE is not set
138# CONFIG_ARCH_NETX is not set 143# CONFIG_ARCH_NETX is not set
139# CONFIG_ARCH_H720X is not set 144# CONFIG_ARCH_H720X is not set
@@ -145,55 +150,55 @@ CONFIG_CLASSIC_RCU=y
145# CONFIG_ARCH_IXP2000 is not set 150# CONFIG_ARCH_IXP2000 is not set
146# CONFIG_ARCH_IXP4XX is not set 151# CONFIG_ARCH_IXP4XX is not set
147# CONFIG_ARCH_L7200 is not set 152# CONFIG_ARCH_L7200 is not set
153# CONFIG_ARCH_KIRKWOOD is not set
148# CONFIG_ARCH_KS8695 is not set 154# CONFIG_ARCH_KS8695 is not set
149# CONFIG_ARCH_NS9XXX is not set 155# CONFIG_ARCH_NS9XXX is not set
156# CONFIG_ARCH_LOKI is not set
157# CONFIG_ARCH_MV78XX0 is not set
150CONFIG_ARCH_MXC=y 158CONFIG_ARCH_MXC=y
151# CONFIG_ARCH_ORION5X is not set 159# CONFIG_ARCH_ORION5X is not set
152# CONFIG_ARCH_PNX4008 is not set 160# CONFIG_ARCH_PNX4008 is not set
153# CONFIG_ARCH_PXA is not set 161# CONFIG_ARCH_PXA is not set
162# CONFIG_ARCH_MMP is not set
154# CONFIG_ARCH_RPC is not set 163# CONFIG_ARCH_RPC is not set
155# CONFIG_ARCH_SA1100 is not set 164# CONFIG_ARCH_SA1100 is not set
156# CONFIG_ARCH_S3C2410 is not set 165# CONFIG_ARCH_S3C2410 is not set
166# CONFIG_ARCH_S3C64XX is not set
157# CONFIG_ARCH_SHARK is not set 167# CONFIG_ARCH_SHARK is not set
158# CONFIG_ARCH_LH7A40X is not set 168# CONFIG_ARCH_LH7A40X is not set
159# CONFIG_ARCH_DAVINCI is not set 169# CONFIG_ARCH_DAVINCI is not set
160# CONFIG_ARCH_OMAP is not set 170# CONFIG_ARCH_OMAP is not set
161# CONFIG_ARCH_MSM7X00A is not set 171# CONFIG_ARCH_MSM is not set
162 172# CONFIG_ARCH_W90X900 is not set
163# 173CONFIG_ARCH_MX1ADS=y
164# Boot options
165#
166
167#
168# Power management
169#
170 174
171# 175#
172# Freescale MXC Implementations 176# Freescale MXC Implementations
173# 177#
178CONFIG_ARCH_MX1=y
174# CONFIG_ARCH_MX2 is not set 179# CONFIG_ARCH_MX2 is not set
175CONFIG_ARCH_MX3=y 180# CONFIG_ARCH_MX3 is not set
176 181
177# 182#
178# MX3 Options 183# MX1 platforms:
179# 184#
180CONFIG_MACH_MX31ADS=y 185CONFIG_MACH_MXLADS=y
181# CONFIG_MACH_PCM037 is not set 186CONFIG_MACH_SCB9328=y
187CONFIG_MXC_IRQ_PRIOR=y
188# CONFIG_MXC_PWM is not set
182 189
183# 190#
184# Processor Type 191# Processor Type
185# 192#
186CONFIG_CPU_32=y 193CONFIG_CPU_32=y
187CONFIG_CPU_V6=y 194CONFIG_CPU_ARM920T=y
188# CONFIG_CPU_32v6K is not set 195CONFIG_CPU_32v4T=y
189CONFIG_CPU_32v6=y 196CONFIG_CPU_ABRT_EV4T=y
190CONFIG_CPU_ABRT_EV6=y
191CONFIG_CPU_PABRT_NOIFAR=y 197CONFIG_CPU_PABRT_NOIFAR=y
192CONFIG_CPU_CACHE_V6=y 198CONFIG_CPU_CACHE_V4WT=y
193CONFIG_CPU_CACHE_VIPT=y 199CONFIG_CPU_CACHE_VIVT=y
194CONFIG_CPU_COPY_V6=y 200CONFIG_CPU_COPY_V4WB=y
195CONFIG_CPU_TLB_V6=y 201CONFIG_CPU_TLB_V4WBI=y
196CONFIG_CPU_HAS_ASID=y
197CONFIG_CPU_CP15=y 202CONFIG_CPU_CP15=y
198CONFIG_CPU_CP15_MMU=y 203CONFIG_CPU_CP15_MMU=y
199 204
@@ -203,7 +208,7 @@ CONFIG_CPU_CP15_MMU=y
203CONFIG_ARM_THUMB=y 208CONFIG_ARM_THUMB=y
204# CONFIG_CPU_ICACHE_DISABLE is not set 209# CONFIG_CPU_ICACHE_DISABLE is not set
205# CONFIG_CPU_DCACHE_DISABLE is not set 210# CONFIG_CPU_DCACHE_DISABLE is not set
206# CONFIG_CPU_BPREDICT_DISABLE is not set 211# CONFIG_CPU_DCACHE_WRITETHROUGH is not set
207# CONFIG_OUTER_CACHE is not set 212# CONFIG_OUTER_CACHE is not set
208 213
209# 214#
@@ -220,25 +225,32 @@ CONFIG_TICK_ONESHOT=y
220CONFIG_NO_HZ=y 225CONFIG_NO_HZ=y
221CONFIG_HIGH_RES_TIMERS=y 226CONFIG_HIGH_RES_TIMERS=y
222CONFIG_GENERIC_CLOCKEVENTS_BUILD=y 227CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
228CONFIG_VMSPLIT_3G=y
229# CONFIG_VMSPLIT_2G is not set
230# CONFIG_VMSPLIT_1G is not set
231CONFIG_PAGE_OFFSET=0xC0000000
223CONFIG_PREEMPT=y 232CONFIG_PREEMPT=y
224CONFIG_HZ=100 233CONFIG_HZ=100
225CONFIG_AEABI=y 234CONFIG_AEABI=y
226# CONFIG_OABI_COMPAT is not set 235CONFIG_OABI_COMPAT=y
227# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set 236CONFIG_ARCH_FLATMEM_HAS_HOLES=y
237# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
238# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
239# CONFIG_HIGHMEM is not set
228CONFIG_SELECT_MEMORY_MODEL=y 240CONFIG_SELECT_MEMORY_MODEL=y
229CONFIG_FLATMEM_MANUAL=y 241CONFIG_FLATMEM_MANUAL=y
230# CONFIG_DISCONTIGMEM_MANUAL is not set 242# CONFIG_DISCONTIGMEM_MANUAL is not set
231# CONFIG_SPARSEMEM_MANUAL is not set 243# CONFIG_SPARSEMEM_MANUAL is not set
232CONFIG_FLATMEM=y 244CONFIG_FLATMEM=y
233CONFIG_FLAT_NODE_MEM_MAP=y 245CONFIG_FLAT_NODE_MEM_MAP=y
234# CONFIG_SPARSEMEM_STATIC is not set
235# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
236CONFIG_PAGEFLAGS_EXTENDED=y 246CONFIG_PAGEFLAGS_EXTENDED=y
237CONFIG_SPLIT_PTLOCK_CPUS=4 247CONFIG_SPLIT_PTLOCK_CPUS=4096
238# CONFIG_RESOURCES_64BIT is not set 248# CONFIG_PHYS_ADDR_T_64BIT is not set
239CONFIG_ZONE_DMA_FLAG=1 249CONFIG_ZONE_DMA_FLAG=0
240CONFIG_BOUNCE=y
241CONFIG_VIRT_TO_BUS=y 250CONFIG_VIRT_TO_BUS=y
251CONFIG_UNEVICTABLE_LRU=y
252CONFIG_HAVE_MLOCK=y
253CONFIG_HAVE_MLOCKED_PAGE_BIT=y
242CONFIG_ALIGNMENT_TRAP=y 254CONFIG_ALIGNMENT_TRAP=y
243 255
244# 256#
@@ -251,30 +263,41 @@ CONFIG_CMDLINE="noinitrd console=ttymxc0,115200 root=/dev/mtdblock2 rw ip=off"
251# CONFIG_KEXEC is not set 263# CONFIG_KEXEC is not set
252 264
253# 265#
266# CPU Power Management
267#
268# CONFIG_CPU_IDLE is not set
269
270#
254# Floating point emulation 271# Floating point emulation
255# 272#
256 273
257# 274#
258# At least one emulation must be selected 275# At least one emulation must be selected
259# 276#
260CONFIG_VFP=y 277# CONFIG_FPE_NWFPE is not set
278# CONFIG_FPE_FASTFPE is not set
261 279
262# 280#
263# Userspace binary formats 281# Userspace binary formats
264# 282#
265CONFIG_BINFMT_ELF=y 283CONFIG_BINFMT_ELF=y
284# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
285CONFIG_HAVE_AOUT=y
266# CONFIG_BINFMT_AOUT is not set 286# CONFIG_BINFMT_AOUT is not set
267# CONFIG_BINFMT_MISC is not set 287# CONFIG_BINFMT_MISC is not set
268 288
269# 289#
270# Power management options 290# Power management options
271# 291#
272# CONFIG_PM is not set 292CONFIG_PM=y
293CONFIG_PM_DEBUG=y
294# CONFIG_PM_VERBOSE is not set
295CONFIG_CAN_PM_TRACE=y
296CONFIG_PM_SLEEP=y
297CONFIG_SUSPEND=y
298CONFIG_SUSPEND_FREEZER=y
299# CONFIG_APM_EMULATION is not set
273CONFIG_ARCH_SUSPEND_POSSIBLE=y 300CONFIG_ARCH_SUSPEND_POSSIBLE=y
274
275#
276# Networking
277#
278CONFIG_NET=y 301CONFIG_NET=y
279 302
280# 303#
@@ -283,11 +306,6 @@ CONFIG_NET=y
283CONFIG_PACKET=y 306CONFIG_PACKET=y
284# CONFIG_PACKET_MMAP is not set 307# CONFIG_PACKET_MMAP is not set
285CONFIG_UNIX=y 308CONFIG_UNIX=y
286CONFIG_XFRM=y
287# CONFIG_XFRM_USER is not set
288# CONFIG_XFRM_SUB_POLICY is not set
289# CONFIG_XFRM_MIGRATE is not set
290# CONFIG_XFRM_STATISTICS is not set
291# CONFIG_NET_KEY is not set 309# CONFIG_NET_KEY is not set
292CONFIG_INET=y 310CONFIG_INET=y
293# CONFIG_IP_MULTICAST is not set 311# CONFIG_IP_MULTICAST is not set
@@ -306,12 +324,11 @@ CONFIG_IP_PNP_DHCP=y
306# CONFIG_INET_IPCOMP is not set 324# CONFIG_INET_IPCOMP is not set
307# CONFIG_INET_XFRM_TUNNEL is not set 325# CONFIG_INET_XFRM_TUNNEL is not set
308# CONFIG_INET_TUNNEL is not set 326# CONFIG_INET_TUNNEL is not set
309CONFIG_INET_XFRM_MODE_TRANSPORT=y 327# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
310CONFIG_INET_XFRM_MODE_TUNNEL=y 328# CONFIG_INET_XFRM_MODE_TUNNEL is not set
311CONFIG_INET_XFRM_MODE_BEET=y 329# CONFIG_INET_XFRM_MODE_BEET is not set
312# CONFIG_INET_LRO is not set 330# CONFIG_INET_LRO is not set
313CONFIG_INET_DIAG=y 331# CONFIG_INET_DIAG is not set
314CONFIG_INET_TCP_DIAG=y
315# CONFIG_TCP_CONG_ADVANCED is not set 332# CONFIG_TCP_CONG_ADVANCED is not set
316CONFIG_TCP_CONG_CUBIC=y 333CONFIG_TCP_CONG_CUBIC=y
317CONFIG_DEFAULT_TCP_CONG="cubic" 334CONFIG_DEFAULT_TCP_CONG="cubic"
@@ -324,6 +341,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
324# CONFIG_TIPC is not set 341# CONFIG_TIPC is not set
325# CONFIG_ATM is not set 342# CONFIG_ATM is not set
326# CONFIG_BRIDGE is not set 343# CONFIG_BRIDGE is not set
344# CONFIG_NET_DSA is not set
327# CONFIG_VLAN_8021Q is not set 345# CONFIG_VLAN_8021Q is not set
328# CONFIG_DECNET is not set 346# CONFIG_DECNET is not set
329# CONFIG_LLC2 is not set 347# CONFIG_LLC2 is not set
@@ -333,7 +351,9 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
333# CONFIG_LAPB is not set 351# CONFIG_LAPB is not set
334# CONFIG_ECONET is not set 352# CONFIG_ECONET is not set
335# CONFIG_WAN_ROUTER is not set 353# CONFIG_WAN_ROUTER is not set
354# CONFIG_PHONET is not set
336# CONFIG_NET_SCHED is not set 355# CONFIG_NET_SCHED is not set
356# CONFIG_DCB is not set
337 357
338# 358#
339# Network testing 359# Network testing
@@ -344,14 +364,8 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
344# CONFIG_IRDA is not set 364# CONFIG_IRDA is not set
345# CONFIG_BT is not set 365# CONFIG_BT is not set
346# CONFIG_AF_RXRPC is not set 366# CONFIG_AF_RXRPC is not set
347 367# CONFIG_WIRELESS is not set
348# 368# CONFIG_WIMAX is not set
349# Wireless
350#
351# CONFIG_CFG80211 is not set
352# CONFIG_WIRELESS_EXT is not set
353# CONFIG_MAC80211 is not set
354# CONFIG_IEEE80211 is not set
355# CONFIG_RFKILL is not set 369# CONFIG_RFKILL is not set
356# CONFIG_NET_9P is not set 370# CONFIG_NET_9P is not set
357 371
@@ -366,16 +380,16 @@ CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
366CONFIG_STANDALONE=y 380CONFIG_STANDALONE=y
367CONFIG_PREVENT_FIRMWARE_BUILD=y 381CONFIG_PREVENT_FIRMWARE_BUILD=y
368CONFIG_FW_LOADER=m 382CONFIG_FW_LOADER=m
383CONFIG_FIRMWARE_IN_KERNEL=y
384CONFIG_EXTRA_FIRMWARE=""
369# CONFIG_SYS_HYPERVISOR is not set 385# CONFIG_SYS_HYPERVISOR is not set
370# CONFIG_CONNECTOR is not set 386# CONFIG_CONNECTOR is not set
371CONFIG_MTD=y 387CONFIG_MTD=y
372# CONFIG_MTD_DEBUG is not set 388# CONFIG_MTD_DEBUG is not set
373# CONFIG_MTD_CONCAT is not set 389# CONFIG_MTD_CONCAT is not set
374CONFIG_MTD_PARTITIONS=y 390CONFIG_MTD_PARTITIONS=y
375CONFIG_MTD_REDBOOT_PARTS=y 391# CONFIG_MTD_TESTS is not set
376CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-1 392# CONFIG_MTD_REDBOOT_PARTS is not set
377# CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED is not set
378# CONFIG_MTD_REDBOOT_PARTS_READONLY is not set
379CONFIG_MTD_CMDLINE_PARTS=y 393CONFIG_MTD_CMDLINE_PARTS=y
380# CONFIG_MTD_AFS_PARTS is not set 394# CONFIG_MTD_AFS_PARTS is not set
381# CONFIG_MTD_AR7_PARTS is not set 395# CONFIG_MTD_AR7_PARTS is not set
@@ -399,36 +413,31 @@ CONFIG_MTD_BLOCK=y
399CONFIG_MTD_CFI=y 413CONFIG_MTD_CFI=y
400# CONFIG_MTD_JEDECPROBE is not set 414# CONFIG_MTD_JEDECPROBE is not set
401CONFIG_MTD_GEN_PROBE=y 415CONFIG_MTD_GEN_PROBE=y
402CONFIG_MTD_CFI_ADV_OPTIONS=y 416# CONFIG_MTD_CFI_ADV_OPTIONS is not set
403CONFIG_MTD_CFI_NOSWAP=y 417CONFIG_MTD_MAP_BANK_WIDTH_1=y
404# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set
405# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set
406CONFIG_MTD_CFI_GEOMETRY=y
407# CONFIG_MTD_MAP_BANK_WIDTH_1 is not set
408CONFIG_MTD_MAP_BANK_WIDTH_2=y 418CONFIG_MTD_MAP_BANK_WIDTH_2=y
409# CONFIG_MTD_MAP_BANK_WIDTH_4 is not set 419CONFIG_MTD_MAP_BANK_WIDTH_4=y
410# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set 420# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
411# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set 421# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
412# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set 422# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
413CONFIG_MTD_CFI_I1=y 423CONFIG_MTD_CFI_I1=y
414# CONFIG_MTD_CFI_I2 is not set 424CONFIG_MTD_CFI_I2=y
415# CONFIG_MTD_CFI_I4 is not set 425# CONFIG_MTD_CFI_I4 is not set
416# CONFIG_MTD_CFI_I8 is not set 426# CONFIG_MTD_CFI_I8 is not set
417# CONFIG_MTD_OTP is not set
418# CONFIG_MTD_CFI_INTELEXT is not set 427# CONFIG_MTD_CFI_INTELEXT is not set
419CONFIG_MTD_CFI_AMDSTD=y 428# CONFIG_MTD_CFI_AMDSTD is not set
420# CONFIG_MTD_CFI_STAA is not set 429# CONFIG_MTD_CFI_STAA is not set
421CONFIG_MTD_CFI_UTIL=y 430CONFIG_MTD_CFI_UTIL=y
422CONFIG_MTD_RAM=y 431# CONFIG_MTD_RAM is not set
423# CONFIG_MTD_ROM is not set 432# CONFIG_MTD_ROM is not set
424# CONFIG_MTD_ABSENT is not set 433# CONFIG_MTD_ABSENT is not set
425# CONFIG_MTD_XIP is not set
426 434
427# 435#
428# Mapping drivers for chip access 436# Mapping drivers for chip access
429# 437#
430# CONFIG_MTD_COMPLEX_MAPPINGS is not set 438# CONFIG_MTD_COMPLEX_MAPPINGS is not set
431# CONFIG_MTD_PHYSMAP is not set 439CONFIG_MTD_PHYSMAP=y
440# CONFIG_MTD_PHYSMAP_COMPAT is not set
432# CONFIG_MTD_ARM_INTEGRATOR is not set 441# CONFIG_MTD_ARM_INTEGRATOR is not set
433# CONFIG_MTD_PLATRAM is not set 442# CONFIG_MTD_PLATRAM is not set
434 443
@@ -446,17 +455,15 @@ CONFIG_MTD_RAM=y
446# CONFIG_MTD_DOC2000 is not set 455# CONFIG_MTD_DOC2000 is not set
447# CONFIG_MTD_DOC2001 is not set 456# CONFIG_MTD_DOC2001 is not set
448# CONFIG_MTD_DOC2001PLUS is not set 457# CONFIG_MTD_DOC2001PLUS is not set
449CONFIG_MTD_NAND=y 458# CONFIG_MTD_NAND is not set
450# CONFIG_MTD_NAND_VERIFY_WRITE is not set
451# CONFIG_MTD_NAND_ECC_SMC is not set
452# CONFIG_MTD_NAND_MUSEUM_IDS is not set
453CONFIG_MTD_NAND_IDS=y
454# CONFIG_MTD_NAND_DISKONCHIP is not set
455# CONFIG_MTD_NAND_NANDSIM is not set
456# CONFIG_MTD_NAND_PLATFORM is not set
457# CONFIG_MTD_ONENAND is not set 459# CONFIG_MTD_ONENAND is not set
458 460
459# 461#
462# LPDDR flash memory drivers
463#
464# CONFIG_MTD_LPDDR is not set
465
466#
460# UBI - Unsorted block images 467# UBI - Unsorted block images
461# 468#
462# CONFIG_MTD_UBI is not set 469# CONFIG_MTD_UBI is not set
@@ -476,23 +483,51 @@ CONFIG_HAVE_IDE=y
476# CONFIG_ATA is not set 483# CONFIG_ATA is not set
477# CONFIG_MD is not set 484# CONFIG_MD is not set
478CONFIG_NETDEVICES=y 485CONFIG_NETDEVICES=y
479# CONFIG_NETDEVICES_MULTIQUEUE is not set 486CONFIG_COMPAT_NET_DEV_OPS=y
480# CONFIG_DUMMY is not set 487# CONFIG_DUMMY is not set
481# CONFIG_BONDING is not set 488# CONFIG_BONDING is not set
482# CONFIG_MACVLAN is not set 489# CONFIG_MACVLAN is not set
483# CONFIG_EQUALIZER is not set 490# CONFIG_EQUALIZER is not set
484# CONFIG_TUN is not set 491# CONFIG_TUN is not set
485# CONFIG_VETH is not set 492# CONFIG_VETH is not set
486# CONFIG_PHYLIB is not set 493CONFIG_PHYLIB=y
494
495#
496# MII PHY device drivers
497#
498# CONFIG_MARVELL_PHY is not set
499# CONFIG_DAVICOM_PHY is not set
500# CONFIG_QSEMI_PHY is not set
501# CONFIG_LXT_PHY is not set
502# CONFIG_CICADA_PHY is not set
503# CONFIG_VITESSE_PHY is not set
504CONFIG_SMSC_PHY=y
505# CONFIG_BROADCOM_PHY is not set
506# CONFIG_ICPLUS_PHY is not set
507# CONFIG_REALTEK_PHY is not set
508# CONFIG_NATIONAL_PHY is not set
509# CONFIG_STE10XP is not set
510# CONFIG_LSI_ET1011C_PHY is not set
511# CONFIG_FIXED_PHY is not set
512# CONFIG_MDIO_BITBANG is not set
487CONFIG_NET_ETHERNET=y 513CONFIG_NET_ETHERNET=y
488CONFIG_MII=y 514CONFIG_MII=y
489# CONFIG_AX88796 is not set 515# CONFIG_AX88796 is not set
490# CONFIG_SMC91X is not set 516# CONFIG_SMC91X is not set
491# CONFIG_DM9000 is not set 517CONFIG_DM9000=y
518CONFIG_DM9000_DEBUGLEVEL=4
519# CONFIG_DM9000_FORCE_SIMPLE_PHY_POLL is not set
520# CONFIG_ETHOC is not set
521# CONFIG_SMC911X is not set
522# CONFIG_SMSC911X is not set
523# CONFIG_DNET is not set
492# CONFIG_IBM_NEW_EMAC_ZMII is not set 524# CONFIG_IBM_NEW_EMAC_ZMII is not set
493# CONFIG_IBM_NEW_EMAC_RGMII is not set 525# CONFIG_IBM_NEW_EMAC_RGMII is not set
494# CONFIG_IBM_NEW_EMAC_TAH is not set 526# CONFIG_IBM_NEW_EMAC_TAH is not set
495# CONFIG_IBM_NEW_EMAC_EMAC4 is not set 527# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
528# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
529# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
530# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
496# CONFIG_B44 is not set 531# CONFIG_B44 is not set
497# CONFIG_NETDEV_1000 is not set 532# CONFIG_NETDEV_1000 is not set
498# CONFIG_NETDEV_10000 is not set 533# CONFIG_NETDEV_10000 is not set
@@ -502,7 +537,10 @@ CONFIG_MII=y
502# 537#
503# CONFIG_WLAN_PRE80211 is not set 538# CONFIG_WLAN_PRE80211 is not set
504# CONFIG_WLAN_80211 is not set 539# CONFIG_WLAN_80211 is not set
505# CONFIG_IWLWIFI_LEDS is not set 540
541#
542# Enable WiMAX (Networking options) to see the WiMAX drivers
543#
506# CONFIG_WAN is not set 544# CONFIG_WAN is not set
507# CONFIG_PPP is not set 545# CONFIG_PPP is not set
508# CONFIG_SLIP is not set 546# CONFIG_SLIP is not set
@@ -542,46 +580,124 @@ CONFIG_SERIAL_IMX_CONSOLE=y
542CONFIG_SERIAL_CORE=y 580CONFIG_SERIAL_CORE=y
543CONFIG_SERIAL_CORE_CONSOLE=y 581CONFIG_SERIAL_CORE_CONSOLE=y
544CONFIG_UNIX98_PTYS=y 582CONFIG_UNIX98_PTYS=y
583# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
545# CONFIG_LEGACY_PTYS is not set 584# CONFIG_LEGACY_PTYS is not set
546# CONFIG_IPMI_HANDLER is not set 585# CONFIG_IPMI_HANDLER is not set
547# CONFIG_HW_RANDOM is not set 586# CONFIG_HW_RANDOM is not set
548# CONFIG_NVRAM is not set
549# CONFIG_R3964 is not set 587# CONFIG_R3964 is not set
550# CONFIG_RAW_DRIVER is not set 588# CONFIG_RAW_DRIVER is not set
551# CONFIG_TCG_TPM is not set 589# CONFIG_TCG_TPM is not set
552# CONFIG_I2C is not set 590CONFIG_I2C=y
591CONFIG_I2C_BOARDINFO=y
592CONFIG_I2C_CHARDEV=y
593CONFIG_I2C_HELPER_AUTO=y
594
595#
596# I2C Hardware Bus support
597#
598
599#
600# I2C system bus drivers (mostly embedded / system-on-chip)
601#
602# CONFIG_I2C_GPIO is not set
603CONFIG_I2C_IMX=y
604# CONFIG_I2C_OCORES is not set
605# CONFIG_I2C_SIMTEC is not set
606
607#
608# External I2C/SMBus adapter drivers
609#
610# CONFIG_I2C_PARPORT_LIGHT is not set
611# CONFIG_I2C_TAOS_EVM is not set
612
613#
614# Other I2C/SMBus bus drivers
615#
616# CONFIG_I2C_PCA_PLATFORM is not set
617# CONFIG_I2C_STUB is not set
618
619#
620# Miscellaneous I2C Chip support
621#
622# CONFIG_DS1682 is not set
623# CONFIG_SENSORS_PCF8574 is not set
624# CONFIG_PCF8575 is not set
625# CONFIG_SENSORS_PCA9539 is not set
626# CONFIG_SENSORS_MAX6875 is not set
627# CONFIG_SENSORS_TSL2550 is not set
628# CONFIG_I2C_DEBUG_CORE is not set
629# CONFIG_I2C_DEBUG_ALGO is not set
630# CONFIG_I2C_DEBUG_BUS is not set
631# CONFIG_I2C_DEBUG_CHIP is not set
553# CONFIG_SPI is not set 632# CONFIG_SPI is not set
554CONFIG_HAVE_GPIO_LIB=y 633CONFIG_ARCH_REQUIRE_GPIOLIB=y
634CONFIG_GPIOLIB=y
635# CONFIG_GPIO_SYSFS is not set
555 636
556# 637#
557# GPIO Support 638# Memory mapped GPIO expanders:
558# 639#
559 640
560# 641#
561# I2C GPIO expanders: 642# I2C GPIO expanders:
562# 643#
644# CONFIG_GPIO_MAX732X is not set
645# CONFIG_GPIO_PCA953X is not set
646# CONFIG_GPIO_PCF857X is not set
647
648#
649# PCI GPIO expanders:
650#
563 651
564# 652#
565# SPI GPIO expanders: 653# SPI GPIO expanders:
566# 654#
567# CONFIG_W1 is not set 655CONFIG_W1=y
656
657#
658# 1-wire Bus Masters
659#
660# CONFIG_W1_MASTER_DS2482 is not set
661CONFIG_W1_MASTER_MXC=y
662# CONFIG_W1_MASTER_GPIO is not set
663
664#
665# 1-wire Slaves
666#
667CONFIG_W1_SLAVE_THERM=y
668# CONFIG_W1_SLAVE_SMEM is not set
669# CONFIG_W1_SLAVE_DS2431 is not set
670# CONFIG_W1_SLAVE_DS2433 is not set
671# CONFIG_W1_SLAVE_DS2760 is not set
672# CONFIG_W1_SLAVE_BQ27000 is not set
568# CONFIG_POWER_SUPPLY is not set 673# CONFIG_POWER_SUPPLY is not set
569# CONFIG_HWMON is not set 674# CONFIG_HWMON is not set
675# CONFIG_THERMAL is not set
676# CONFIG_THERMAL_HWMON is not set
570# CONFIG_WATCHDOG is not set 677# CONFIG_WATCHDOG is not set
678CONFIG_SSB_POSSIBLE=y
571 679
572# 680#
573# Sonics Silicon Backplane 681# Sonics Silicon Backplane
574# 682#
575CONFIG_SSB_POSSIBLE=y
576# CONFIG_SSB is not set 683# CONFIG_SSB is not set
577 684
578# 685#
579# Multifunction device drivers 686# Multifunction device drivers
580# 687#
688# CONFIG_MFD_CORE is not set
581# CONFIG_MFD_SM501 is not set 689# CONFIG_MFD_SM501 is not set
582# CONFIG_MFD_ASIC3 is not set 690# CONFIG_MFD_ASIC3 is not set
583# CONFIG_HTC_EGPIO is not set 691# CONFIG_HTC_EGPIO is not set
584# CONFIG_HTC_PASIC3 is not set 692# CONFIG_HTC_PASIC3 is not set
693# CONFIG_TPS65010 is not set
694# CONFIG_TWL4030_CORE is not set
695# CONFIG_MFD_TMIO is not set
696# CONFIG_MFD_TC6393XB is not set
697# CONFIG_PMIC_DA903X is not set
698# CONFIG_MFD_WM8400 is not set
699# CONFIG_MFD_WM8350_I2C is not set
700# CONFIG_MFD_PCF50633 is not set
585 701
586# 702#
587# Multimedia devices 703# Multimedia devices
@@ -604,36 +720,131 @@ CONFIG_SSB_POSSIBLE=y
604# 720#
605# CONFIG_VGASTATE is not set 721# CONFIG_VGASTATE is not set
606# CONFIG_VIDEO_OUTPUT_CONTROL is not set 722# CONFIG_VIDEO_OUTPUT_CONTROL is not set
607# CONFIG_FB is not set 723CONFIG_FB=y
724# CONFIG_FIRMWARE_EDID is not set
725# CONFIG_FB_DDC is not set
726# CONFIG_FB_BOOT_VESA_SUPPORT is not set
727# CONFIG_FB_CFB_FILLRECT is not set
728# CONFIG_FB_CFB_COPYAREA is not set
729# CONFIG_FB_CFB_IMAGEBLIT is not set
730# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
731# CONFIG_FB_SYS_FILLRECT is not set
732# CONFIG_FB_SYS_COPYAREA is not set
733# CONFIG_FB_SYS_IMAGEBLIT is not set
734# CONFIG_FB_FOREIGN_ENDIAN is not set
735# CONFIG_FB_SYS_FOPS is not set
736# CONFIG_FB_SVGALIB is not set
737# CONFIG_FB_MACMODES is not set
738# CONFIG_FB_BACKLIGHT is not set
739# CONFIG_FB_MODE_HELPERS is not set
740# CONFIG_FB_TILEBLITTING is not set
741
742#
743# Frame buffer hardware drivers
744#
745# CONFIG_FB_S1D13XXX is not set
746# CONFIG_FB_VIRTUAL is not set
747# CONFIG_FB_METRONOME is not set
748# CONFIG_FB_MB862XX is not set
749# CONFIG_FB_BROADSHEET is not set
608# CONFIG_BACKLIGHT_LCD_SUPPORT is not set 750# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
609 751
610# 752#
611# Display device support 753# Display device support
612# 754#
613# CONFIG_DISPLAY_SUPPORT is not set 755# CONFIG_DISPLAY_SUPPORT is not set
756# CONFIG_LOGO is not set
757# CONFIG_SOUND is not set
758CONFIG_USB_SUPPORT=y
759CONFIG_USB_ARCH_HAS_HCD=y
760# CONFIG_USB_ARCH_HAS_OHCI is not set
761# CONFIG_USB_ARCH_HAS_EHCI is not set
762# CONFIG_USB is not set
763# CONFIG_USB_OTG_WHITELIST is not set
764# CONFIG_USB_OTG_BLACKLIST_HUB is not set
765# CONFIG_USB_GADGET_MUSB_HDRC is not set
614 766
615# 767#
616# Sound 768# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
769#
770CONFIG_USB_GADGET=y
771# CONFIG_USB_GADGET_DEBUG_FILES is not set
772CONFIG_USB_GADGET_VBUS_DRAW=2
773CONFIG_USB_GADGET_SELECTED=y
774# CONFIG_USB_GADGET_AT91 is not set
775# CONFIG_USB_GADGET_ATMEL_USBA is not set
776# CONFIG_USB_GADGET_FSL_USB2 is not set
777# CONFIG_USB_GADGET_LH7A40X is not set
778# CONFIG_USB_GADGET_OMAP is not set
779# CONFIG_USB_GADGET_PXA25X is not set
780# CONFIG_USB_GADGET_PXA27X is not set
781# CONFIG_USB_GADGET_S3C2410 is not set
782CONFIG_USB_GADGET_IMX=y
783CONFIG_USB_IMX=y
784# CONFIG_USB_GADGET_M66592 is not set
785# CONFIG_USB_GADGET_AMD5536UDC is not set
786# CONFIG_USB_GADGET_FSL_QE is not set
787# CONFIG_USB_GADGET_CI13XXX is not set
788# CONFIG_USB_GADGET_NET2280 is not set
789# CONFIG_USB_GADGET_GOKU is not set
790# CONFIG_USB_GADGET_DUMMY_HCD is not set
791# CONFIG_USB_GADGET_DUALSPEED is not set
792# CONFIG_USB_ZERO is not set
793CONFIG_USB_ETH=y
794CONFIG_USB_ETH_RNDIS=y
795# CONFIG_USB_GADGETFS is not set
796# CONFIG_USB_FILE_STORAGE is not set
797# CONFIG_USB_G_SERIAL is not set
798# CONFIG_USB_MIDI_GADGET is not set
799# CONFIG_USB_G_PRINTER is not set
800# CONFIG_USB_CDC_COMPOSITE is not set
801
617# 802#
618# CONFIG_SOUND is not set 803# OTG and related infrastructure
619# CONFIG_USB_SUPPORT is not set 804#
620# CONFIG_MMC is not set 805# CONFIG_USB_GPIO_VBUS is not set
806# CONFIG_NOP_USB_XCEIV is not set
807CONFIG_MMC=y
808# CONFIG_MMC_DEBUG is not set
809# CONFIG_MMC_UNSAFE_RESUME is not set
810
811#
812# MMC/SD/SDIO Card Drivers
813#
814CONFIG_MMC_BLOCK=y
815CONFIG_MMC_BLOCK_BOUNCE=y
816# CONFIG_SDIO_UART is not set
817# CONFIG_MMC_TEST is not set
818
819#
820# MMC/SD/SDIO Host Controller Drivers
821#
822# CONFIG_MMC_SDHCI is not set
823CONFIG_MMC_MXC=y
824# CONFIG_MEMSTICK is not set
825# CONFIG_ACCESSIBILITY is not set
621# CONFIG_NEW_LEDS is not set 826# CONFIG_NEW_LEDS is not set
622CONFIG_RTC_LIB=y 827CONFIG_RTC_LIB=y
623# CONFIG_RTC_CLASS is not set 828# CONFIG_RTC_CLASS is not set
829# CONFIG_DMADEVICES is not set
830# CONFIG_AUXDISPLAY is not set
831# CONFIG_REGULATOR is not set
624# CONFIG_UIO is not set 832# CONFIG_UIO is not set
833# CONFIG_STAGING is not set
625 834
626# 835#
627# File systems 836# File systems
628# 837#
629# CONFIG_EXT2_FS is not set 838# CONFIG_EXT2_FS is not set
630# CONFIG_EXT3_FS is not set 839# CONFIG_EXT3_FS is not set
631# CONFIG_EXT4DEV_FS is not set 840# CONFIG_EXT4_FS is not set
632# CONFIG_REISERFS_FS is not set 841# CONFIG_REISERFS_FS is not set
633# CONFIG_JFS_FS is not set 842# CONFIG_JFS_FS is not set
634# CONFIG_FS_POSIX_ACL is not set 843# CONFIG_FS_POSIX_ACL is not set
844CONFIG_FILE_LOCKING=y
635# CONFIG_XFS_FS is not set 845# CONFIG_XFS_FS is not set
636# CONFIG_OCFS2_FS is not set 846# CONFIG_OCFS2_FS is not set
847# CONFIG_BTRFS_FS is not set
637# CONFIG_DNOTIFY is not set 848# CONFIG_DNOTIFY is not set
638CONFIG_INOTIFY=y 849CONFIG_INOTIFY=y
639CONFIG_INOTIFY_USER=y 850CONFIG_INOTIFY_USER=y
@@ -643,6 +854,11 @@ CONFIG_INOTIFY_USER=y
643# CONFIG_FUSE_FS is not set 854# CONFIG_FUSE_FS is not set
644 855
645# 856#
857# Caches
858#
859# CONFIG_FSCACHE is not set
860
861#
646# CD-ROM/DVD Filesystems 862# CD-ROM/DVD Filesystems
647# 863#
648# CONFIG_ISO9660_FS is not set 864# CONFIG_ISO9660_FS is not set
@@ -660,15 +876,13 @@ CONFIG_INOTIFY_USER=y
660# 876#
661CONFIG_PROC_FS=y 877CONFIG_PROC_FS=y
662CONFIG_PROC_SYSCTL=y 878CONFIG_PROC_SYSCTL=y
879CONFIG_PROC_PAGE_MONITOR=y
663CONFIG_SYSFS=y 880CONFIG_SYSFS=y
664CONFIG_TMPFS=y 881CONFIG_TMPFS=y
665# CONFIG_TMPFS_POSIX_ACL is not set 882# CONFIG_TMPFS_POSIX_ACL is not set
666# CONFIG_HUGETLB_PAGE is not set 883# CONFIG_HUGETLB_PAGE is not set
667# CONFIG_CONFIGFS_FS is not set 884# CONFIG_CONFIGFS_FS is not set
668 885CONFIG_MISC_FILESYSTEMS=y
669#
670# Miscellaneous filesystems
671#
672# CONFIG_ADFS_FS is not set 886# CONFIG_ADFS_FS is not set
673# CONFIG_AFFS_FS is not set 887# CONFIG_AFFS_FS is not set
674# CONFIG_HFS_FS is not set 888# CONFIG_HFS_FS is not set
@@ -687,25 +901,30 @@ CONFIG_JFFS2_ZLIB=y
687# CONFIG_JFFS2_LZO is not set 901# CONFIG_JFFS2_LZO is not set
688CONFIG_JFFS2_RTIME=y 902CONFIG_JFFS2_RTIME=y
689# CONFIG_JFFS2_RUBIN is not set 903# CONFIG_JFFS2_RUBIN is not set
690CONFIG_CRAMFS=y 904# CONFIG_CRAMFS is not set
905# CONFIG_SQUASHFS is not set
691# CONFIG_VXFS_FS is not set 906# CONFIG_VXFS_FS is not set
692# CONFIG_MINIX_FS is not set 907# CONFIG_MINIX_FS is not set
908# CONFIG_OMFS_FS is not set
693# CONFIG_HPFS_FS is not set 909# CONFIG_HPFS_FS is not set
694# CONFIG_QNX4FS_FS is not set 910# CONFIG_QNX4FS_FS is not set
695# CONFIG_ROMFS_FS is not set 911# CONFIG_ROMFS_FS is not set
696# CONFIG_SYSV_FS is not set 912# CONFIG_SYSV_FS is not set
697# CONFIG_UFS_FS is not set 913# CONFIG_UFS_FS is not set
914# CONFIG_NILFS2_FS is not set
698CONFIG_NETWORK_FILESYSTEMS=y 915CONFIG_NETWORK_FILESYSTEMS=y
699CONFIG_NFS_FS=y 916CONFIG_NFS_FS=y
700# CONFIG_NFS_V3 is not set 917CONFIG_NFS_V3=y
701# CONFIG_NFS_V4 is not set 918# CONFIG_NFS_V3_ACL is not set
702# CONFIG_NFSD is not set 919CONFIG_NFS_V4=y
703CONFIG_ROOT_NFS=y 920CONFIG_ROOT_NFS=y
921# CONFIG_NFSD is not set
704CONFIG_LOCKD=y 922CONFIG_LOCKD=y
923CONFIG_LOCKD_V4=y
705CONFIG_NFS_COMMON=y 924CONFIG_NFS_COMMON=y
706CONFIG_SUNRPC=y 925CONFIG_SUNRPC=y
707# CONFIG_SUNRPC_BIND34 is not set 926CONFIG_SUNRPC_GSS=y
708# CONFIG_RPCSEC_GSS_KRB5 is not set 927CONFIG_RPCSEC_GSS_KRB5=y
709# CONFIG_RPCSEC_GSS_SPKM3 is not set 928# CONFIG_RPCSEC_GSS_SPKM3 is not set
710# CONFIG_SMB_FS is not set 929# CONFIG_SMB_FS is not set
711# CONFIG_CIFS is not set 930# CONFIG_CIFS is not set
@@ -724,9 +943,9 @@ CONFIG_MSDOS_PARTITION=y
724# 943#
725# Kernel hacking 944# Kernel hacking
726# 945#
727CONFIG_PRINTK_TIME=y 946# CONFIG_PRINTK_TIME is not set
728CONFIG_ENABLE_WARN_DEPRECATED=y 947# CONFIG_ENABLE_WARN_DEPRECATED is not set
729CONFIG_ENABLE_MUST_CHECK=y 948# CONFIG_ENABLE_MUST_CHECK is not set
730CONFIG_FRAME_WARN=1024 949CONFIG_FRAME_WARN=1024
731# CONFIG_MAGIC_SYSRQ is not set 950# CONFIG_MAGIC_SYSRQ is not set
732# CONFIG_UNUSED_SYMBOLS is not set 951# CONFIG_UNUSED_SYMBOLS is not set
@@ -734,8 +953,31 @@ CONFIG_FRAME_WARN=1024
734# CONFIG_HEADERS_CHECK is not set 953# CONFIG_HEADERS_CHECK is not set
735# CONFIG_DEBUG_KERNEL is not set 954# CONFIG_DEBUG_KERNEL is not set
736# CONFIG_DEBUG_BUGVERBOSE is not set 955# CONFIG_DEBUG_BUGVERBOSE is not set
737CONFIG_FRAME_POINTER=y 956# CONFIG_DEBUG_MEMORY_INIT is not set
957# CONFIG_RCU_CPU_STALL_DETECTOR is not set
958# CONFIG_LATENCYTOP is not set
959CONFIG_SYSCTL_SYSCALL_CHECK=y
960CONFIG_HAVE_FUNCTION_TRACER=y
961CONFIG_TRACING_SUPPORT=y
962
963#
964# Tracers
965#
966# CONFIG_FUNCTION_TRACER is not set
967# CONFIG_IRQSOFF_TRACER is not set
968# CONFIG_PREEMPT_TRACER is not set
969# CONFIG_SCHED_TRACER is not set
970# CONFIG_CONTEXT_SWITCH_TRACER is not set
971# CONFIG_EVENT_TRACER is not set
972# CONFIG_BOOT_TRACER is not set
973# CONFIG_TRACE_BRANCH_PROFILING is not set
974# CONFIG_STACK_TRACER is not set
975# CONFIG_KMEMTRACE is not set
976# CONFIG_WORKQUEUE_TRACER is not set
977# CONFIG_BLK_DEV_IO_TRACE is not set
738# CONFIG_SAMPLES is not set 978# CONFIG_SAMPLES is not set
979CONFIG_HAVE_ARCH_KGDB=y
980CONFIG_ARM_UNWIND=y
739# CONFIG_DEBUG_USER is not set 981# CONFIG_DEBUG_USER is not set
740 982
741# 983#
@@ -743,15 +985,28 @@ CONFIG_FRAME_POINTER=y
743# 985#
744# CONFIG_KEYS is not set 986# CONFIG_KEYS is not set
745# CONFIG_SECURITY is not set 987# CONFIG_SECURITY is not set
988# CONFIG_SECURITYFS is not set
746# CONFIG_SECURITY_FILE_CAPABILITIES is not set 989# CONFIG_SECURITY_FILE_CAPABILITIES is not set
747CONFIG_CRYPTO=y 990CONFIG_CRYPTO=y
748 991
749# 992#
750# Crypto core or helper 993# Crypto core or helper
751# 994#
752# CONFIG_CRYPTO_MANAGER is not set 995# CONFIG_CRYPTO_FIPS is not set
996CONFIG_CRYPTO_ALGAPI=y
997CONFIG_CRYPTO_ALGAPI2=y
998CONFIG_CRYPTO_AEAD2=y
999CONFIG_CRYPTO_BLKCIPHER=y
1000CONFIG_CRYPTO_BLKCIPHER2=y
1001CONFIG_CRYPTO_HASH=y
1002CONFIG_CRYPTO_HASH2=y
1003CONFIG_CRYPTO_RNG2=y
1004CONFIG_CRYPTO_PCOMP=y
1005CONFIG_CRYPTO_MANAGER=y
1006CONFIG_CRYPTO_MANAGER2=y
753# CONFIG_CRYPTO_GF128MUL is not set 1007# CONFIG_CRYPTO_GF128MUL is not set
754# CONFIG_CRYPTO_NULL is not set 1008# CONFIG_CRYPTO_NULL is not set
1009CONFIG_CRYPTO_WORKQUEUE=y
755# CONFIG_CRYPTO_CRYPTD is not set 1010# CONFIG_CRYPTO_CRYPTD is not set
756# CONFIG_CRYPTO_AUTHENC is not set 1011# CONFIG_CRYPTO_AUTHENC is not set
757# CONFIG_CRYPTO_TEST is not set 1012# CONFIG_CRYPTO_TEST is not set
@@ -766,7 +1021,7 @@ CONFIG_CRYPTO=y
766# 1021#
767# Block modes 1022# Block modes
768# 1023#
769# CONFIG_CRYPTO_CBC is not set 1024CONFIG_CRYPTO_CBC=y
770# CONFIG_CRYPTO_CTR is not set 1025# CONFIG_CRYPTO_CTR is not set
771# CONFIG_CRYPTO_CTS is not set 1026# CONFIG_CRYPTO_CTS is not set
772# CONFIG_CRYPTO_ECB is not set 1027# CONFIG_CRYPTO_ECB is not set
@@ -785,8 +1040,12 @@ CONFIG_CRYPTO=y
785# 1040#
786# CONFIG_CRYPTO_CRC32C is not set 1041# CONFIG_CRYPTO_CRC32C is not set
787# CONFIG_CRYPTO_MD4 is not set 1042# CONFIG_CRYPTO_MD4 is not set
788# CONFIG_CRYPTO_MD5 is not set 1043CONFIG_CRYPTO_MD5=y
789# CONFIG_CRYPTO_MICHAEL_MIC is not set 1044# CONFIG_CRYPTO_MICHAEL_MIC is not set
1045# CONFIG_CRYPTO_RMD128 is not set
1046# CONFIG_CRYPTO_RMD160 is not set
1047# CONFIG_CRYPTO_RMD256 is not set
1048# CONFIG_CRYPTO_RMD320 is not set
790# CONFIG_CRYPTO_SHA1 is not set 1049# CONFIG_CRYPTO_SHA1 is not set
791# CONFIG_CRYPTO_SHA256 is not set 1050# CONFIG_CRYPTO_SHA256 is not set
792# CONFIG_CRYPTO_SHA512 is not set 1051# CONFIG_CRYPTO_SHA512 is not set
@@ -803,7 +1062,7 @@ CONFIG_CRYPTO=y
803# CONFIG_CRYPTO_CAMELLIA is not set 1062# CONFIG_CRYPTO_CAMELLIA is not set
804# CONFIG_CRYPTO_CAST5 is not set 1063# CONFIG_CRYPTO_CAST5 is not set
805# CONFIG_CRYPTO_CAST6 is not set 1064# CONFIG_CRYPTO_CAST6 is not set
806# CONFIG_CRYPTO_DES is not set 1065CONFIG_CRYPTO_DES=y
807# CONFIG_CRYPTO_FCRYPT is not set 1066# CONFIG_CRYPTO_FCRYPT is not set
808# CONFIG_CRYPTO_KHAZAD is not set 1067# CONFIG_CRYPTO_KHAZAD is not set
809# CONFIG_CRYPTO_SALSA20 is not set 1068# CONFIG_CRYPTO_SALSA20 is not set
@@ -816,24 +1075,31 @@ CONFIG_CRYPTO=y
816# Compression 1075# Compression
817# 1076#
818# CONFIG_CRYPTO_DEFLATE is not set 1077# CONFIG_CRYPTO_DEFLATE is not set
1078# CONFIG_CRYPTO_ZLIB is not set
819# CONFIG_CRYPTO_LZO is not set 1079# CONFIG_CRYPTO_LZO is not set
820# CONFIG_CRYPTO_HW is not set 1080
1081#
1082# Random Number Generation
1083#
1084# CONFIG_CRYPTO_ANSI_CPRNG is not set
1085CONFIG_CRYPTO_HW=y
1086# CONFIG_BINARY_PRINTF is not set
821 1087
822# 1088#
823# Library routines 1089# Library routines
824# 1090#
825CONFIG_BITREVERSE=y 1091CONFIG_BITREVERSE=y
826# CONFIG_GENERIC_FIND_FIRST_BIT is not set 1092CONFIG_GENERIC_FIND_LAST_BIT=y
827# CONFIG_GENERIC_FIND_NEXT_BIT is not set
828# CONFIG_CRC_CCITT is not set 1093# CONFIG_CRC_CCITT is not set
829# CONFIG_CRC16 is not set 1094# CONFIG_CRC16 is not set
1095# CONFIG_CRC_T10DIF is not set
830# CONFIG_CRC_ITU_T is not set 1096# CONFIG_CRC_ITU_T is not set
831CONFIG_CRC32=y 1097CONFIG_CRC32=y
832# CONFIG_CRC7 is not set 1098# CONFIG_CRC7 is not set
833# CONFIG_LIBCRC32C is not set 1099# CONFIG_LIBCRC32C is not set
834CONFIG_ZLIB_INFLATE=y 1100CONFIG_ZLIB_INFLATE=y
835CONFIG_ZLIB_DEFLATE=y 1101CONFIG_ZLIB_DEFLATE=y
836CONFIG_PLIST=y
837CONFIG_HAS_IOMEM=y 1102CONFIG_HAS_IOMEM=y
838CONFIG_HAS_IOPORT=y 1103CONFIG_HAS_IOPORT=y
839CONFIG_HAS_DMA=y 1104CONFIG_HAS_DMA=y
1105CONFIG_NLATTR=y
diff --git a/arch/arm/configs/pcm038_defconfig b/arch/arm/configs/mx27_defconfig
index 41429a00f58c..083516cd0d7f 100644
--- a/arch/arm/configs/pcm038_defconfig
+++ b/arch/arm/configs/mx27_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.26-rc6 3# Linux kernel version: 2.6.30-rc1
4# Fri Jun 20 16:38:36 2008 4# Wed Apr 8 10:18:06 2009
5# 5#
6CONFIG_ARM=y 6CONFIG_ARM=y
7CONFIG_SYS_SUPPORTS_APM_EMULATION=y 7CONFIG_SYS_SUPPORTS_APM_EMULATION=y
@@ -12,6 +12,7 @@ CONFIG_MMU=y
12# CONFIG_NO_IOPORT is not set 12# CONFIG_NO_IOPORT is not set
13CONFIG_GENERIC_HARDIRQS=y 13CONFIG_GENERIC_HARDIRQS=y
14CONFIG_STACKTRACE_SUPPORT=y 14CONFIG_STACKTRACE_SUPPORT=y
15CONFIG_HAVE_LATENCYTOP_SUPPORT=y
15CONFIG_LOCKDEP_SUPPORT=y 16CONFIG_LOCKDEP_SUPPORT=y
16CONFIG_TRACE_IRQFLAGS_SUPPORT=y 17CONFIG_TRACE_IRQFLAGS_SUPPORT=y
17CONFIG_HARDIRQS_SW_RESEND=y 18CONFIG_HARDIRQS_SW_RESEND=y
@@ -21,9 +22,8 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y
21# CONFIG_ARCH_HAS_ILOG2_U64 is not set 22# CONFIG_ARCH_HAS_ILOG2_U64 is not set
22CONFIG_GENERIC_HWEIGHT=y 23CONFIG_GENERIC_HWEIGHT=y
23CONFIG_GENERIC_CALIBRATE_DELAY=y 24CONFIG_GENERIC_CALIBRATE_DELAY=y
24CONFIG_ARCH_SUPPORTS_AOUT=y
25CONFIG_ZONE_DMA=y
26CONFIG_ARCH_MTD_XIP=y 25CONFIG_ARCH_MTD_XIP=y
26CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
27CONFIG_VECTORS_BASE=0xffff0000 27CONFIG_VECTORS_BASE=0xffff0000
28CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 28CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
29 29
@@ -40,47 +40,58 @@ CONFIG_LOCALVERSION_AUTO=y
40CONFIG_SYSVIPC=y 40CONFIG_SYSVIPC=y
41CONFIG_SYSVIPC_SYSCTL=y 41CONFIG_SYSVIPC_SYSCTL=y
42CONFIG_POSIX_MQUEUE=y 42CONFIG_POSIX_MQUEUE=y
43CONFIG_POSIX_MQUEUE_SYSCTL=y
43# CONFIG_BSD_PROCESS_ACCT is not set 44# CONFIG_BSD_PROCESS_ACCT is not set
44# CONFIG_TASKSTATS is not set 45# CONFIG_TASKSTATS is not set
45# CONFIG_AUDIT is not set 46# CONFIG_AUDIT is not set
47
48#
49# RCU Subsystem
50#
51CONFIG_CLASSIC_RCU=y
52# CONFIG_TREE_RCU is not set
53# CONFIG_PREEMPT_RCU is not set
54# CONFIG_TREE_RCU_TRACE is not set
55# CONFIG_PREEMPT_RCU_TRACE is not set
46# CONFIG_IKCONFIG is not set 56# CONFIG_IKCONFIG is not set
47CONFIG_LOG_BUF_SHIFT=14 57CONFIG_LOG_BUF_SHIFT=14
48# CONFIG_CGROUPS is not set
49CONFIG_GROUP_SCHED=y 58CONFIG_GROUP_SCHED=y
50CONFIG_FAIR_GROUP_SCHED=y 59CONFIG_FAIR_GROUP_SCHED=y
51CONFIG_RT_GROUP_SCHED=y 60CONFIG_RT_GROUP_SCHED=y
52CONFIG_USER_SCHED=y 61CONFIG_USER_SCHED=y
53# CONFIG_CGROUP_SCHED is not set 62# CONFIG_CGROUP_SCHED is not set
63# CONFIG_CGROUPS is not set
54# CONFIG_SYSFS_DEPRECATED_V2 is not set 64# CONFIG_SYSFS_DEPRECATED_V2 is not set
55# CONFIG_RELAY is not set 65# CONFIG_RELAY is not set
56# CONFIG_NAMESPACES is not set 66# CONFIG_NAMESPACES is not set
57# CONFIG_BLK_DEV_INITRD is not set 67# CONFIG_BLK_DEV_INITRD is not set
58# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 68# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
59CONFIG_SYSCTL=y 69CONFIG_SYSCTL=y
70CONFIG_ANON_INODES=y
60CONFIG_EMBEDDED=y 71CONFIG_EMBEDDED=y
61CONFIG_UID16=y 72CONFIG_UID16=y
62CONFIG_SYSCTL_SYSCALL=y 73CONFIG_SYSCTL_SYSCALL=y
63CONFIG_SYSCTL_SYSCALL_CHECK=y
64CONFIG_KALLSYMS=y 74CONFIG_KALLSYMS=y
65CONFIG_KALLSYMS_EXTRA_PASS=y 75CONFIG_KALLSYMS_EXTRA_PASS=y
66CONFIG_HOTPLUG=y 76CONFIG_HOTPLUG=y
67CONFIG_PRINTK=y 77CONFIG_PRINTK=y
68CONFIG_BUG=y 78CONFIG_BUG=y
69CONFIG_ELF_CORE=y 79CONFIG_ELF_CORE=y
70# CONFIG_COMPAT_BRK is not set
71CONFIG_BASE_FULL=y 80CONFIG_BASE_FULL=y
72CONFIG_FUTEX=y 81CONFIG_FUTEX=y
73CONFIG_ANON_INODES=y
74CONFIG_EPOLL=y 82CONFIG_EPOLL=y
75CONFIG_SIGNALFD=y 83CONFIG_SIGNALFD=y
76CONFIG_TIMERFD=y 84CONFIG_TIMERFD=y
77CONFIG_EVENTFD=y 85CONFIG_EVENTFD=y
78CONFIG_SHMEM=y 86CONFIG_SHMEM=y
87CONFIG_AIO=y
79CONFIG_VM_EVENT_COUNTERS=y 88CONFIG_VM_EVENT_COUNTERS=y
89# CONFIG_COMPAT_BRK is not set
80CONFIG_SLAB=y 90CONFIG_SLAB=y
81# CONFIG_SLUB is not set 91# CONFIG_SLUB is not set
82# CONFIG_SLOB is not set 92# CONFIG_SLOB is not set
83CONFIG_PROFILING=y 93CONFIG_PROFILING=y
94CONFIG_TRACEPOINTS=y
84CONFIG_MARKERS=y 95CONFIG_MARKERS=y
85CONFIG_OPROFILE=y 96CONFIG_OPROFILE=y
86CONFIG_HAVE_OPROFILE=y 97CONFIG_HAVE_OPROFILE=y
@@ -88,11 +99,10 @@ CONFIG_KPROBES=y
88CONFIG_KRETPROBES=y 99CONFIG_KRETPROBES=y
89CONFIG_HAVE_KPROBES=y 100CONFIG_HAVE_KPROBES=y
90CONFIG_HAVE_KRETPROBES=y 101CONFIG_HAVE_KRETPROBES=y
91# CONFIG_HAVE_DMA_ATTRS is not set 102# CONFIG_SLOW_WORK is not set
92# CONFIG_PROC_PAGE_MONITOR is not set 103CONFIG_HAVE_GENERIC_DMA_COHERENT=y
93CONFIG_SLABINFO=y 104CONFIG_SLABINFO=y
94CONFIG_RT_MUTEXES=y 105CONFIG_RT_MUTEXES=y
95# CONFIG_TINY_SHMEM is not set
96CONFIG_BASE_SMALL=0 106CONFIG_BASE_SMALL=0
97CONFIG_MODULES=y 107CONFIG_MODULES=y
98# CONFIG_MODULE_FORCE_LOAD is not set 108# CONFIG_MODULE_FORCE_LOAD is not set
@@ -100,12 +110,10 @@ CONFIG_MODULE_UNLOAD=y
100# CONFIG_MODULE_FORCE_UNLOAD is not set 110# CONFIG_MODULE_FORCE_UNLOAD is not set
101# CONFIG_MODVERSIONS is not set 111# CONFIG_MODVERSIONS is not set
102# CONFIG_MODULE_SRCVERSION_ALL is not set 112# CONFIG_MODULE_SRCVERSION_ALL is not set
103# CONFIG_KMOD is not set
104CONFIG_BLOCK=y 113CONFIG_BLOCK=y
105# CONFIG_LBD is not set 114# CONFIG_LBD is not set
106# CONFIG_BLK_DEV_IO_TRACE is not set
107# CONFIG_LSF is not set
108# CONFIG_BLK_DEV_BSG is not set 115# CONFIG_BLK_DEV_BSG is not set
116# CONFIG_BLK_DEV_INTEGRITY is not set
109 117
110# 118#
111# IO Schedulers 119# IO Schedulers
@@ -119,7 +127,7 @@ CONFIG_IOSCHED_NOOP=y
119# CONFIG_DEFAULT_CFQ is not set 127# CONFIG_DEFAULT_CFQ is not set
120CONFIG_DEFAULT_NOOP=y 128CONFIG_DEFAULT_NOOP=y
121CONFIG_DEFAULT_IOSCHED="noop" 129CONFIG_DEFAULT_IOSCHED="noop"
122CONFIG_CLASSIC_RCU=y 130CONFIG_FREEZER=y
123 131
124# 132#
125# System Type 133# System Type
@@ -129,11 +137,10 @@ CONFIG_CLASSIC_RCU=y
129# CONFIG_ARCH_REALVIEW is not set 137# CONFIG_ARCH_REALVIEW is not set
130# CONFIG_ARCH_VERSATILE is not set 138# CONFIG_ARCH_VERSATILE is not set
131# CONFIG_ARCH_AT91 is not set 139# CONFIG_ARCH_AT91 is not set
132# CONFIG_ARCH_CLPS7500 is not set
133# CONFIG_ARCH_CLPS711X is not set 140# CONFIG_ARCH_CLPS711X is not set
134# CONFIG_ARCH_CO285 is not set
135# CONFIG_ARCH_EBSA110 is not set 141# CONFIG_ARCH_EBSA110 is not set
136# CONFIG_ARCH_EP93XX is not set 142# CONFIG_ARCH_EP93XX is not set
143# CONFIG_ARCH_GEMINI is not set
137# CONFIG_ARCH_FOOTBRIDGE is not set 144# CONFIG_ARCH_FOOTBRIDGE is not set
138# CONFIG_ARCH_NETX is not set 145# CONFIG_ARCH_NETX is not set
139# CONFIG_ARCH_H720X is not set 146# CONFIG_ARCH_H720X is not set
@@ -145,46 +152,44 @@ CONFIG_CLASSIC_RCU=y
145# CONFIG_ARCH_IXP2000 is not set 152# CONFIG_ARCH_IXP2000 is not set
146# CONFIG_ARCH_IXP4XX is not set 153# CONFIG_ARCH_IXP4XX is not set
147# CONFIG_ARCH_L7200 is not set 154# CONFIG_ARCH_L7200 is not set
155# CONFIG_ARCH_KIRKWOOD is not set
148# CONFIG_ARCH_KS8695 is not set 156# CONFIG_ARCH_KS8695 is not set
149# CONFIG_ARCH_NS9XXX is not set 157# CONFIG_ARCH_NS9XXX is not set
158# CONFIG_ARCH_LOKI is not set
159# CONFIG_ARCH_MV78XX0 is not set
150CONFIG_ARCH_MXC=y 160CONFIG_ARCH_MXC=y
151# CONFIG_ARCH_ORION5X is not set 161# CONFIG_ARCH_ORION5X is not set
152# CONFIG_ARCH_PNX4008 is not set 162# CONFIG_ARCH_PNX4008 is not set
153# CONFIG_ARCH_PXA is not set 163# CONFIG_ARCH_PXA is not set
164# CONFIG_ARCH_MMP is not set
154# CONFIG_ARCH_RPC is not set 165# CONFIG_ARCH_RPC is not set
155# CONFIG_ARCH_SA1100 is not set 166# CONFIG_ARCH_SA1100 is not set
156# CONFIG_ARCH_S3C2410 is not set 167# CONFIG_ARCH_S3C2410 is not set
168# CONFIG_ARCH_S3C64XX is not set
157# CONFIG_ARCH_SHARK is not set 169# CONFIG_ARCH_SHARK is not set
158# CONFIG_ARCH_LH7A40X is not set 170# CONFIG_ARCH_LH7A40X is not set
159# CONFIG_ARCH_DAVINCI is not set 171# CONFIG_ARCH_DAVINCI is not set
160# CONFIG_ARCH_OMAP is not set 172# CONFIG_ARCH_OMAP is not set
161# CONFIG_ARCH_MSM7X00A is not set 173# CONFIG_ARCH_MSM is not set
162 174# CONFIG_ARCH_W90X900 is not set
163#
164# Boot options
165#
166
167#
168# Power management
169#
170 175
171# 176#
172# Freescale MXC Implementations 177# Freescale MXC Implementations
173# 178#
179# CONFIG_ARCH_MX1 is not set
174CONFIG_ARCH_MX2=y 180CONFIG_ARCH_MX2=y
175# CONFIG_ARCH_MX3 is not set 181# CONFIG_ARCH_MX3 is not set
176 182# CONFIG_MACH_MX21 is not set
177#
178# MX2 family CPU support
179#
180CONFIG_MACH_MX27=y 183CONFIG_MACH_MX27=y
181 184
182# 185#
183# MX2 Platforms 186# MX2 platforms:
184# 187#
185# CONFIG_MACH_MX27ADS is not set 188CONFIG_MACH_MX27ADS=y
186CONFIG_MACH_PCM038=y 189CONFIG_MACH_PCM038=y
187CONFIG_MACH_PCM970_BASEBOARD=y 190CONFIG_MACH_PCM970_BASEBOARD=y
191CONFIG_MXC_IRQ_PRIOR=y
192CONFIG_MXC_PWM=y
188 193
189# 194#
190# Processor Type 195# Processor Type
@@ -209,6 +214,7 @@ CONFIG_ARM_THUMB=y
209# CONFIG_CPU_DCACHE_WRITETHROUGH is not set 214# CONFIG_CPU_DCACHE_WRITETHROUGH is not set
210# CONFIG_CPU_CACHE_ROUND_ROBIN is not set 215# CONFIG_CPU_CACHE_ROUND_ROBIN is not set
211# CONFIG_OUTER_CACHE is not set 216# CONFIG_OUTER_CACHE is not set
217CONFIG_COMMON_CLKDEV=y
212 218
213# 219#
214# Bus support 220# Bus support
@@ -224,25 +230,32 @@ CONFIG_TICK_ONESHOT=y
224CONFIG_NO_HZ=y 230CONFIG_NO_HZ=y
225CONFIG_HIGH_RES_TIMERS=y 231CONFIG_HIGH_RES_TIMERS=y
226CONFIG_GENERIC_CLOCKEVENTS_BUILD=y 232CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
233CONFIG_VMSPLIT_3G=y
234# CONFIG_VMSPLIT_2G is not set
235# CONFIG_VMSPLIT_1G is not set
236CONFIG_PAGE_OFFSET=0xC0000000
227CONFIG_PREEMPT=y 237CONFIG_PREEMPT=y
228CONFIG_HZ=100 238CONFIG_HZ=100
229CONFIG_AEABI=y 239CONFIG_AEABI=y
230# CONFIG_OABI_COMPAT is not set 240CONFIG_OABI_COMPAT=y
231# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set 241CONFIG_ARCH_FLATMEM_HAS_HOLES=y
242# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
243# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
244# CONFIG_HIGHMEM is not set
232CONFIG_SELECT_MEMORY_MODEL=y 245CONFIG_SELECT_MEMORY_MODEL=y
233CONFIG_FLATMEM_MANUAL=y 246CONFIG_FLATMEM_MANUAL=y
234# CONFIG_DISCONTIGMEM_MANUAL is not set 247# CONFIG_DISCONTIGMEM_MANUAL is not set
235# CONFIG_SPARSEMEM_MANUAL is not set 248# CONFIG_SPARSEMEM_MANUAL is not set
236CONFIG_FLATMEM=y 249CONFIG_FLATMEM=y
237CONFIG_FLAT_NODE_MEM_MAP=y 250CONFIG_FLAT_NODE_MEM_MAP=y
238# CONFIG_SPARSEMEM_STATIC is not set
239# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
240CONFIG_PAGEFLAGS_EXTENDED=y 251CONFIG_PAGEFLAGS_EXTENDED=y
241CONFIG_SPLIT_PTLOCK_CPUS=4096 252CONFIG_SPLIT_PTLOCK_CPUS=4096
242# CONFIG_RESOURCES_64BIT is not set 253# CONFIG_PHYS_ADDR_T_64BIT is not set
243CONFIG_ZONE_DMA_FLAG=1 254CONFIG_ZONE_DMA_FLAG=0
244CONFIG_BOUNCE=y
245CONFIG_VIRT_TO_BUS=y 255CONFIG_VIRT_TO_BUS=y
256CONFIG_UNEVICTABLE_LRU=y
257CONFIG_HAVE_MLOCK=y
258CONFIG_HAVE_MLOCKED_PAGE_BIT=y
246CONFIG_ALIGNMENT_TRAP=y 259CONFIG_ALIGNMENT_TRAP=y
247 260
248# 261#
@@ -255,30 +268,44 @@ CONFIG_CMDLINE=""
255# CONFIG_KEXEC is not set 268# CONFIG_KEXEC is not set
256 269
257# 270#
271# CPU Power Management
272#
273# CONFIG_CPU_IDLE is not set
274
275#
258# Floating point emulation 276# Floating point emulation
259# 277#
260 278
261# 279#
262# At least one emulation must be selected 280# At least one emulation must be selected
263# 281#
282CONFIG_FPE_NWFPE=y
283CONFIG_FPE_NWFPE_XP=y
284# CONFIG_FPE_FASTFPE is not set
264# CONFIG_VFP is not set 285# CONFIG_VFP is not set
265 286
266# 287#
267# Userspace binary formats 288# Userspace binary formats
268# 289#
269CONFIG_BINFMT_ELF=y 290CONFIG_BINFMT_ELF=y
291# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
292CONFIG_HAVE_AOUT=y
270# CONFIG_BINFMT_AOUT is not set 293# CONFIG_BINFMT_AOUT is not set
271# CONFIG_BINFMT_MISC is not set 294# CONFIG_BINFMT_MISC is not set
272 295
273# 296#
274# Power management options 297# Power management options
275# 298#
276# CONFIG_PM is not set 299CONFIG_PM=y
300CONFIG_PM_DEBUG=y
301# CONFIG_PM_VERBOSE is not set
302CONFIG_CAN_PM_TRACE=y
303CONFIG_PM_SLEEP=y
304CONFIG_SUSPEND=y
305# CONFIG_PM_TEST_SUSPEND is not set
306CONFIG_SUSPEND_FREEZER=y
307# CONFIG_APM_EMULATION is not set
277CONFIG_ARCH_SUSPEND_POSSIBLE=y 308CONFIG_ARCH_SUSPEND_POSSIBLE=y
278
279#
280# Networking
281#
282CONFIG_NET=y 309CONFIG_NET=y
283 310
284# 311#
@@ -293,7 +320,7 @@ CONFIG_IP_MULTICAST=y
293# CONFIG_IP_ADVANCED_ROUTER is not set 320# CONFIG_IP_ADVANCED_ROUTER is not set
294CONFIG_IP_FIB_HASH=y 321CONFIG_IP_FIB_HASH=y
295CONFIG_IP_PNP=y 322CONFIG_IP_PNP=y
296# CONFIG_IP_PNP_DHCP is not set 323CONFIG_IP_PNP_DHCP=y
297# CONFIG_IP_PNP_BOOTP is not set 324# CONFIG_IP_PNP_BOOTP is not set
298# CONFIG_IP_PNP_RARP is not set 325# CONFIG_IP_PNP_RARP is not set
299# CONFIG_NET_IPIP is not set 326# CONFIG_NET_IPIP is not set
@@ -323,6 +350,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
323# CONFIG_TIPC is not set 350# CONFIG_TIPC is not set
324# CONFIG_ATM is not set 351# CONFIG_ATM is not set
325# CONFIG_BRIDGE is not set 352# CONFIG_BRIDGE is not set
353# CONFIG_NET_DSA is not set
326# CONFIG_VLAN_8021Q is not set 354# CONFIG_VLAN_8021Q is not set
327# CONFIG_DECNET is not set 355# CONFIG_DECNET is not set
328# CONFIG_LLC2 is not set 356# CONFIG_LLC2 is not set
@@ -332,26 +360,23 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
332# CONFIG_LAPB is not set 360# CONFIG_LAPB is not set
333# CONFIG_ECONET is not set 361# CONFIG_ECONET is not set
334# CONFIG_WAN_ROUTER is not set 362# CONFIG_WAN_ROUTER is not set
363# CONFIG_PHONET is not set
335# CONFIG_NET_SCHED is not set 364# CONFIG_NET_SCHED is not set
365# CONFIG_DCB is not set
336 366
337# 367#
338# Network testing 368# Network testing
339# 369#
340# CONFIG_NET_PKTGEN is not set 370# CONFIG_NET_PKTGEN is not set
341# CONFIG_NET_TCPPROBE is not set 371# CONFIG_NET_TCPPROBE is not set
372# CONFIG_NET_DROP_MONITOR is not set
342# CONFIG_HAMRADIO is not set 373# CONFIG_HAMRADIO is not set
343# CONFIG_CAN is not set 374# CONFIG_CAN is not set
344# CONFIG_IRDA is not set 375# CONFIG_IRDA is not set
345# CONFIG_BT is not set 376# CONFIG_BT is not set
346# CONFIG_AF_RXRPC is not set 377# CONFIG_AF_RXRPC is not set
347 378# CONFIG_WIRELESS is not set
348# 379# CONFIG_WIMAX is not set
349# Wireless
350#
351# CONFIG_CFG80211 is not set
352# CONFIG_WIRELESS_EXT is not set
353# CONFIG_MAC80211 is not set
354# CONFIG_IEEE80211 is not set
355# CONFIG_RFKILL is not set 380# CONFIG_RFKILL is not set
356# CONFIG_NET_9P is not set 381# CONFIG_NET_9P is not set
357 382
@@ -366,12 +391,15 @@ CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
366CONFIG_STANDALONE=y 391CONFIG_STANDALONE=y
367CONFIG_PREVENT_FIRMWARE_BUILD=y 392CONFIG_PREVENT_FIRMWARE_BUILD=y
368CONFIG_FW_LOADER=y 393CONFIG_FW_LOADER=y
394CONFIG_FIRMWARE_IN_KERNEL=y
395CONFIG_EXTRA_FIRMWARE=""
369# CONFIG_SYS_HYPERVISOR is not set 396# CONFIG_SYS_HYPERVISOR is not set
370# CONFIG_CONNECTOR is not set 397# CONFIG_CONNECTOR is not set
371CONFIG_MTD=y 398CONFIG_MTD=y
372# CONFIG_MTD_DEBUG is not set 399# CONFIG_MTD_DEBUG is not set
373# CONFIG_MTD_CONCAT is not set 400# CONFIG_MTD_CONCAT is not set
374CONFIG_MTD_PARTITIONS=y 401CONFIG_MTD_PARTITIONS=y
402# CONFIG_MTD_TESTS is not set
375# CONFIG_MTD_REDBOOT_PARTS is not set 403# CONFIG_MTD_REDBOOT_PARTS is not set
376CONFIG_MTD_CMDLINE_PARTS=y 404CONFIG_MTD_CMDLINE_PARTS=y
377# CONFIG_MTD_AFS_PARTS is not set 405# CONFIG_MTD_AFS_PARTS is not set
@@ -426,9 +454,7 @@ CONFIG_MTD_CFI_UTIL=y
426# 454#
427# CONFIG_MTD_COMPLEX_MAPPINGS is not set 455# CONFIG_MTD_COMPLEX_MAPPINGS is not set
428CONFIG_MTD_PHYSMAP=y 456CONFIG_MTD_PHYSMAP=y
429CONFIG_MTD_PHYSMAP_START=0x00000000 457# CONFIG_MTD_PHYSMAP_COMPAT is not set
430CONFIG_MTD_PHYSMAP_LEN=0x0
431CONFIG_MTD_PHYSMAP_BANKWIDTH=2
432# CONFIG_MTD_ARM_INTEGRATOR is not set 458# CONFIG_MTD_ARM_INTEGRATOR is not set
433# CONFIG_MTD_PLATRAM is not set 459# CONFIG_MTD_PLATRAM is not set
434 460
@@ -452,6 +478,11 @@ CONFIG_MTD_PHYSMAP_BANKWIDTH=2
452# CONFIG_MTD_ONENAND is not set 478# CONFIG_MTD_ONENAND is not set
453 479
454# 480#
481# LPDDR flash memory drivers
482#
483# CONFIG_MTD_LPDDR is not set
484
485#
455# UBI - Unsorted block images 486# UBI - Unsorted block images
456# 487#
457# CONFIG_MTD_UBI is not set 488# CONFIG_MTD_UBI is not set
@@ -477,7 +508,7 @@ CONFIG_HAVE_IDE=y
477# CONFIG_ATA is not set 508# CONFIG_ATA is not set
478# CONFIG_MD is not set 509# CONFIG_MD is not set
479CONFIG_NETDEVICES=y 510CONFIG_NETDEVICES=y
480# CONFIG_NETDEVICES_MULTIQUEUE is not set 511CONFIG_COMPAT_NET_DEV_OPS=y
481# CONFIG_DUMMY is not set 512# CONFIG_DUMMY is not set
482# CONFIG_BONDING is not set 513# CONFIG_BONDING is not set
483# CONFIG_MACVLAN is not set 514# CONFIG_MACVLAN is not set
@@ -491,12 +522,20 @@ CONFIG_NET_ETHERNET=y
491# CONFIG_SMC91X is not set 522# CONFIG_SMC91X is not set
492# CONFIG_DM9000 is not set 523# CONFIG_DM9000 is not set
493# CONFIG_ENC28J60 is not set 524# CONFIG_ENC28J60 is not set
525# CONFIG_ETHOC is not set
526# CONFIG_SMC911X is not set
527# CONFIG_SMSC911X is not set
528# CONFIG_DNET is not set
494# CONFIG_IBM_NEW_EMAC_ZMII is not set 529# CONFIG_IBM_NEW_EMAC_ZMII is not set
495# CONFIG_IBM_NEW_EMAC_RGMII is not set 530# CONFIG_IBM_NEW_EMAC_RGMII is not set
496# CONFIG_IBM_NEW_EMAC_TAH is not set 531# CONFIG_IBM_NEW_EMAC_TAH is not set
497# CONFIG_IBM_NEW_EMAC_EMAC4 is not set 532# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
533# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
534# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
535# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
498# CONFIG_B44 is not set 536# CONFIG_B44 is not set
499CONFIG_FEC_OLD=y 537CONFIG_FEC=y
538# CONFIG_FEC2 is not set
500# CONFIG_NETDEV_1000 is not set 539# CONFIG_NETDEV_1000 is not set
501# CONFIG_NETDEV_10000 is not set 540# CONFIG_NETDEV_10000 is not set
502 541
@@ -505,7 +544,10 @@ CONFIG_FEC_OLD=y
505# 544#
506# CONFIG_WLAN_PRE80211 is not set 545# CONFIG_WLAN_PRE80211 is not set
507# CONFIG_WLAN_80211 is not set 546# CONFIG_WLAN_80211 is not set
508# CONFIG_IWLWIFI_LEDS is not set 547
548#
549# Enable WiMAX (Networking options) to see the WiMAX drivers
550#
509# CONFIG_WAN is not set 551# CONFIG_WAN is not set
510# CONFIG_PPP is not set 552# CONFIG_PPP is not set
511# CONFIG_SLIP is not set 553# CONFIG_SLIP is not set
@@ -541,12 +583,15 @@ CONFIG_INPUT_TOUCHSCREEN=y
541# CONFIG_TOUCHSCREEN_FUJITSU is not set 583# CONFIG_TOUCHSCREEN_FUJITSU is not set
542# CONFIG_TOUCHSCREEN_GUNZE is not set 584# CONFIG_TOUCHSCREEN_GUNZE is not set
543# CONFIG_TOUCHSCREEN_ELO is not set 585# CONFIG_TOUCHSCREEN_ELO is not set
586# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set
544# CONFIG_TOUCHSCREEN_MTOUCH is not set 587# CONFIG_TOUCHSCREEN_MTOUCH is not set
588# CONFIG_TOUCHSCREEN_INEXIO is not set
545# CONFIG_TOUCHSCREEN_MK712 is not set 589# CONFIG_TOUCHSCREEN_MK712 is not set
546# CONFIG_TOUCHSCREEN_PENMOUNT is not set 590# CONFIG_TOUCHSCREEN_PENMOUNT is not set
547# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set 591# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
548# CONFIG_TOUCHSCREEN_TOUCHWIN is not set 592# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
549# CONFIG_TOUCHSCREEN_UCB1400 is not set 593# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
594# CONFIG_TOUCHSCREEN_TSC2007 is not set
550# CONFIG_INPUT_MISC is not set 595# CONFIG_INPUT_MISC is not set
551 596
552# 597#
@@ -559,6 +604,7 @@ CONFIG_INPUT_TOUCHSCREEN=y
559# Character devices 604# Character devices
560# 605#
561CONFIG_VT=y 606CONFIG_VT=y
607CONFIG_CONSOLE_TRANSLATIONS=y
562CONFIG_VT_CONSOLE=y 608CONFIG_VT_CONSOLE=y
563CONFIG_HW_CONSOLE=y 609CONFIG_HW_CONSOLE=y
564# CONFIG_VT_HW_CONSOLE_BINDING is not set 610# CONFIG_VT_HW_CONSOLE_BINDING is not set
@@ -573,42 +619,55 @@ CONFIG_DEVKMEM=y
573# 619#
574# Non-8250 serial port support 620# Non-8250 serial port support
575# 621#
622# CONFIG_SERIAL_MAX3100 is not set
576CONFIG_SERIAL_IMX=y 623CONFIG_SERIAL_IMX=y
577CONFIG_SERIAL_IMX_CONSOLE=y 624CONFIG_SERIAL_IMX_CONSOLE=y
578CONFIG_SERIAL_CORE=y 625CONFIG_SERIAL_CORE=y
579CONFIG_SERIAL_CORE_CONSOLE=y 626CONFIG_SERIAL_CORE_CONSOLE=y
580CONFIG_UNIX98_PTYS=y 627CONFIG_UNIX98_PTYS=y
628# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
581# CONFIG_LEGACY_PTYS is not set 629# CONFIG_LEGACY_PTYS is not set
582# CONFIG_IPMI_HANDLER is not set 630# CONFIG_IPMI_HANDLER is not set
583# CONFIG_HW_RANDOM is not set 631# CONFIG_HW_RANDOM is not set
584# CONFIG_NVRAM is not set
585# CONFIG_R3964 is not set 632# CONFIG_R3964 is not set
586# CONFIG_RAW_DRIVER is not set 633# CONFIG_RAW_DRIVER is not set
587# CONFIG_TCG_TPM is not set 634# CONFIG_TCG_TPM is not set
588CONFIG_I2C=y 635CONFIG_I2C=y
589CONFIG_I2C_BOARDINFO=y 636CONFIG_I2C_BOARDINFO=y
590# CONFIG_I2C_CHARDEV is not set 637CONFIG_I2C_CHARDEV=y
638CONFIG_I2C_HELPER_AUTO=y
591 639
592# 640#
593# I2C Hardware Bus support 641# I2C Hardware Bus support
594# 642#
643
644#
645# I2C system bus drivers (mostly embedded / system-on-chip)
646#
595# CONFIG_I2C_GPIO is not set 647# CONFIG_I2C_GPIO is not set
648CONFIG_I2C_IMX=y
596# CONFIG_I2C_OCORES is not set 649# CONFIG_I2C_OCORES is not set
597# CONFIG_I2C_PARPORT_LIGHT is not set
598# CONFIG_I2C_SIMTEC is not set 650# CONFIG_I2C_SIMTEC is not set
651
652#
653# External I2C/SMBus adapter drivers
654#
655# CONFIG_I2C_PARPORT_LIGHT is not set
599# CONFIG_I2C_TAOS_EVM is not set 656# CONFIG_I2C_TAOS_EVM is not set
600# CONFIG_I2C_STUB is not set 657
658#
659# Other I2C/SMBus bus drivers
660#
601# CONFIG_I2C_PCA_PLATFORM is not set 661# CONFIG_I2C_PCA_PLATFORM is not set
662# CONFIG_I2C_STUB is not set
602 663
603# 664#
604# Miscellaneous I2C Chip support 665# Miscellaneous I2C Chip support
605# 666#
606# CONFIG_DS1682 is not set 667# CONFIG_DS1682 is not set
607# CONFIG_EEPROM_LEGACY is not set
608# CONFIG_SENSORS_PCF8574 is not set 668# CONFIG_SENSORS_PCF8574 is not set
609# CONFIG_PCF8575 is not set 669# CONFIG_PCF8575 is not set
610# CONFIG_SENSORS_PCF8591 is not set 670# CONFIG_SENSORS_PCA9539 is not set
611# CONFIG_TPS65010 is not set
612# CONFIG_SENSORS_MAX6875 is not set 671# CONFIG_SENSORS_MAX6875 is not set
613# CONFIG_SENSORS_TSL2550 is not set 672# CONFIG_SENSORS_TSL2550 is not set
614# CONFIG_I2C_DEBUG_CORE is not set 673# CONFIG_I2C_DEBUG_CORE is not set
@@ -622,47 +681,83 @@ CONFIG_SPI_MASTER=y
622# SPI Master Controller Drivers 681# SPI Master Controller Drivers
623# 682#
624CONFIG_SPI_BITBANG=y 683CONFIG_SPI_BITBANG=y
684# CONFIG_SPI_GPIO is not set
625 685
626# 686#
627# SPI Protocol Masters 687# SPI Protocol Masters
628# 688#
629# CONFIG_EEPROM_AT25 is not set
630# CONFIG_SPI_SPIDEV is not set 689# CONFIG_SPI_SPIDEV is not set
631# CONFIG_SPI_TLE62X0 is not set 690# CONFIG_SPI_TLE62X0 is not set
632CONFIG_HAVE_GPIO_LIB=y 691CONFIG_ARCH_REQUIRE_GPIOLIB=y
692CONFIG_GPIOLIB=y
693# CONFIG_GPIO_SYSFS is not set
633 694
634# 695#
635# GPIO Support 696# Memory mapped GPIO expanders:
636# 697#
637 698
638# 699#
639# I2C GPIO expanders: 700# I2C GPIO expanders:
640# 701#
702# CONFIG_GPIO_MAX732X is not set
641# CONFIG_GPIO_PCA953X is not set 703# CONFIG_GPIO_PCA953X is not set
642# CONFIG_GPIO_PCF857X is not set 704# CONFIG_GPIO_PCF857X is not set
643 705
644# 706#
707# PCI GPIO expanders:
708#
709
710#
645# SPI GPIO expanders: 711# SPI GPIO expanders:
646# 712#
713# CONFIG_GPIO_MAX7301 is not set
647# CONFIG_GPIO_MCP23S08 is not set 714# CONFIG_GPIO_MCP23S08 is not set
648# CONFIG_W1 is not set 715CONFIG_W1=y
716
717#
718# 1-wire Bus Masters
719#
720# CONFIG_W1_MASTER_DS2482 is not set
721CONFIG_W1_MASTER_MXC=y
722# CONFIG_W1_MASTER_GPIO is not set
723
724#
725# 1-wire Slaves
726#
727CONFIG_W1_SLAVE_THERM=y
728# CONFIG_W1_SLAVE_SMEM is not set
729# CONFIG_W1_SLAVE_DS2431 is not set
730# CONFIG_W1_SLAVE_DS2433 is not set
731# CONFIG_W1_SLAVE_DS2760 is not set
732# CONFIG_W1_SLAVE_BQ27000 is not set
649# CONFIG_POWER_SUPPLY is not set 733# CONFIG_POWER_SUPPLY is not set
650# CONFIG_HWMON is not set 734# CONFIG_HWMON is not set
735# CONFIG_THERMAL is not set
736# CONFIG_THERMAL_HWMON is not set
651# CONFIG_WATCHDOG is not set 737# CONFIG_WATCHDOG is not set
738CONFIG_SSB_POSSIBLE=y
652 739
653# 740#
654# Sonics Silicon Backplane 741# Sonics Silicon Backplane
655# 742#
656CONFIG_SSB_POSSIBLE=y
657# CONFIG_SSB is not set 743# CONFIG_SSB is not set
658 744
659# 745#
660# Multifunction device drivers 746# Multifunction device drivers
661# 747#
748# CONFIG_MFD_CORE is not set
662# CONFIG_MFD_SM501 is not set 749# CONFIG_MFD_SM501 is not set
663# CONFIG_MFD_ASIC3 is not set 750# CONFIG_MFD_ASIC3 is not set
664# CONFIG_HTC_EGPIO is not set 751# CONFIG_HTC_EGPIO is not set
665# CONFIG_HTC_PASIC3 is not set 752# CONFIG_HTC_PASIC3 is not set
753# CONFIG_TPS65010 is not set
754# CONFIG_TWL4030_CORE is not set
755# CONFIG_MFD_TMIO is not set
756# CONFIG_MFD_TC6393XB is not set
757# CONFIG_PMIC_DA903X is not set
758# CONFIG_MFD_WM8400 is not set
759# CONFIG_MFD_WM8350_I2C is not set
760# CONFIG_MFD_PCF50633 is not set
666 761
667# 762#
668# Multimedia devices 763# Multimedia devices
@@ -683,7 +778,7 @@ CONFIG_VIDEO_MEDIA=y
683# 778#
684# CONFIG_MEDIA_ATTACH is not set 779# CONFIG_MEDIA_ATTACH is not set
685CONFIG_MEDIA_TUNER=y 780CONFIG_MEDIA_TUNER=y
686# CONFIG_MEDIA_TUNER_CUSTOMIZE is not set 781# CONFIG_MEDIA_TUNER_CUSTOMISE is not set
687CONFIG_MEDIA_TUNER_SIMPLE=y 782CONFIG_MEDIA_TUNER_SIMPLE=y
688CONFIG_MEDIA_TUNER_TDA8290=y 783CONFIG_MEDIA_TUNER_TDA8290=y
689CONFIG_MEDIA_TUNER_TDA9887=y 784CONFIG_MEDIA_TUNER_TDA9887=y
@@ -692,16 +787,17 @@ CONFIG_MEDIA_TUNER_TEA5767=y
692CONFIG_MEDIA_TUNER_MT20XX=y 787CONFIG_MEDIA_TUNER_MT20XX=y
693CONFIG_MEDIA_TUNER_XC2028=y 788CONFIG_MEDIA_TUNER_XC2028=y
694CONFIG_MEDIA_TUNER_XC5000=y 789CONFIG_MEDIA_TUNER_XC5000=y
790CONFIG_MEDIA_TUNER_MC44S803=y
695CONFIG_VIDEO_V4L2=y 791CONFIG_VIDEO_V4L2=y
696CONFIG_VIDEO_V4L1=y 792CONFIG_VIDEO_V4L1=y
697CONFIG_VIDEO_CAPTURE_DRIVERS=y 793CONFIG_VIDEO_CAPTURE_DRIVERS=y
698# CONFIG_VIDEO_ADV_DEBUG is not set 794# CONFIG_VIDEO_ADV_DEBUG is not set
795# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set
699CONFIG_VIDEO_HELPER_CHIPS_AUTO=y 796CONFIG_VIDEO_HELPER_CHIPS_AUTO=y
700# CONFIG_VIDEO_VIVI is not set 797# CONFIG_VIDEO_VIVI is not set
701# CONFIG_VIDEO_CPIA is not set 798# CONFIG_VIDEO_CPIA is not set
702# CONFIG_VIDEO_SAA5246A is not set 799# CONFIG_VIDEO_SAA5246A is not set
703# CONFIG_VIDEO_SAA5249 is not set 800# CONFIG_VIDEO_SAA5249 is not set
704# CONFIG_TUNER_3036 is not set
705# CONFIG_SOC_CAMERA is not set 801# CONFIG_SOC_CAMERA is not set
706# CONFIG_RADIO_ADAPTERS is not set 802# CONFIG_RADIO_ADAPTERS is not set
707# CONFIG_DAB is not set 803# CONFIG_DAB is not set
@@ -714,9 +810,10 @@ CONFIG_VIDEO_HELPER_CHIPS_AUTO=y
714CONFIG_FB=y 810CONFIG_FB=y
715# CONFIG_FIRMWARE_EDID is not set 811# CONFIG_FIRMWARE_EDID is not set
716# CONFIG_FB_DDC is not set 812# CONFIG_FB_DDC is not set
717# CONFIG_FB_CFB_FILLRECT is not set 813# CONFIG_FB_BOOT_VESA_SUPPORT is not set
718# CONFIG_FB_CFB_COPYAREA is not set 814CONFIG_FB_CFB_FILLRECT=y
719# CONFIG_FB_CFB_IMAGEBLIT is not set 815CONFIG_FB_CFB_COPYAREA=y
816CONFIG_FB_CFB_IMAGEBLIT=y
720# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set 817# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
721# CONFIG_FB_SYS_FILLRECT is not set 818# CONFIG_FB_SYS_FILLRECT is not set
722# CONFIG_FB_SYS_COPYAREA is not set 819# CONFIG_FB_SYS_COPYAREA is not set
@@ -732,8 +829,12 @@ CONFIG_FB=y
732# 829#
733# Frame buffer hardware drivers 830# Frame buffer hardware drivers
734# 831#
832CONFIG_FB_IMX=y
735# CONFIG_FB_S1D13XXX is not set 833# CONFIG_FB_S1D13XXX is not set
736# CONFIG_FB_VIRTUAL is not set 834# CONFIG_FB_VIRTUAL is not set
835# CONFIG_FB_METRONOME is not set
836# CONFIG_FB_MB862XX is not set
837# CONFIG_FB_BROADSHEET is not set
737# CONFIG_BACKLIGHT_LCD_SUPPORT is not set 838# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
738 839
739# 840#
@@ -761,14 +862,29 @@ CONFIG_FONT_8x8=y
761# CONFIG_FONT_SUN12x22 is not set 862# CONFIG_FONT_SUN12x22 is not set
762# CONFIG_FONT_10x18 is not set 863# CONFIG_FONT_10x18 is not set
763# CONFIG_LOGO is not set 864# CONFIG_LOGO is not set
764
765#
766# Sound
767#
768# CONFIG_SOUND is not set 865# CONFIG_SOUND is not set
769# CONFIG_HID_SUPPORT is not set 866# CONFIG_HID_SUPPORT is not set
770# CONFIG_USB_SUPPORT is not set 867# CONFIG_USB_SUPPORT is not set
771# CONFIG_MMC is not set 868CONFIG_MMC=y
869# CONFIG_MMC_DEBUG is not set
870# CONFIG_MMC_UNSAFE_RESUME is not set
871
872#
873# MMC/SD/SDIO Card Drivers
874#
875CONFIG_MMC_BLOCK=y
876CONFIG_MMC_BLOCK_BOUNCE=y
877# CONFIG_SDIO_UART is not set
878# CONFIG_MMC_TEST is not set
879
880#
881# MMC/SD/SDIO Host Controller Drivers
882#
883# CONFIG_MMC_SDHCI is not set
884CONFIG_MMC_MXC=y
885# CONFIG_MMC_SPI is not set
886# CONFIG_MEMSTICK is not set
887# CONFIG_ACCESSIBILITY is not set
772# CONFIG_NEW_LEDS is not set 888# CONFIG_NEW_LEDS is not set
773CONFIG_RTC_LIB=y 889CONFIG_RTC_LIB=y
774CONFIG_RTC_CLASS=y 890CONFIG_RTC_CLASS=y
@@ -800,42 +916,56 @@ CONFIG_RTC_DRV_PCF8563=y
800# CONFIG_RTC_DRV_M41T80 is not set 916# CONFIG_RTC_DRV_M41T80 is not set
801# CONFIG_RTC_DRV_S35390A is not set 917# CONFIG_RTC_DRV_S35390A is not set
802# CONFIG_RTC_DRV_FM3130 is not set 918# CONFIG_RTC_DRV_FM3130 is not set
919# CONFIG_RTC_DRV_RX8581 is not set
803 920
804# 921#
805# SPI RTC drivers 922# SPI RTC drivers
806# 923#
924# CONFIG_RTC_DRV_M41T94 is not set
925# CONFIG_RTC_DRV_DS1305 is not set
926# CONFIG_RTC_DRV_DS1390 is not set
807# CONFIG_RTC_DRV_MAX6902 is not set 927# CONFIG_RTC_DRV_MAX6902 is not set
808# CONFIG_RTC_DRV_R9701 is not set 928# CONFIG_RTC_DRV_R9701 is not set
809# CONFIG_RTC_DRV_RS5C348 is not set 929# CONFIG_RTC_DRV_RS5C348 is not set
930# CONFIG_RTC_DRV_DS3234 is not set
810 931
811# 932#
812# Platform RTC drivers 933# Platform RTC drivers
813# 934#
814# CONFIG_RTC_DRV_CMOS is not set 935# CONFIG_RTC_DRV_CMOS is not set
936# CONFIG_RTC_DRV_DS1286 is not set
815# CONFIG_RTC_DRV_DS1511 is not set 937# CONFIG_RTC_DRV_DS1511 is not set
816# CONFIG_RTC_DRV_DS1553 is not set 938# CONFIG_RTC_DRV_DS1553 is not set
817# CONFIG_RTC_DRV_DS1742 is not set 939# CONFIG_RTC_DRV_DS1742 is not set
818# CONFIG_RTC_DRV_STK17TA8 is not set 940# CONFIG_RTC_DRV_STK17TA8 is not set
819# CONFIG_RTC_DRV_M48T86 is not set 941# CONFIG_RTC_DRV_M48T86 is not set
942# CONFIG_RTC_DRV_M48T35 is not set
820# CONFIG_RTC_DRV_M48T59 is not set 943# CONFIG_RTC_DRV_M48T59 is not set
944# CONFIG_RTC_DRV_BQ4802 is not set
821# CONFIG_RTC_DRV_V3020 is not set 945# CONFIG_RTC_DRV_V3020 is not set
822 946
823# 947#
824# on-CPU RTC drivers 948# on-CPU RTC drivers
825# 949#
950# CONFIG_DMADEVICES is not set
951# CONFIG_AUXDISPLAY is not set
952# CONFIG_REGULATOR is not set
826# CONFIG_UIO is not set 953# CONFIG_UIO is not set
954# CONFIG_STAGING is not set
827 955
828# 956#
829# File systems 957# File systems
830# 958#
831# CONFIG_EXT2_FS is not set 959# CONFIG_EXT2_FS is not set
832# CONFIG_EXT3_FS is not set 960# CONFIG_EXT3_FS is not set
833# CONFIG_EXT4DEV_FS is not set 961# CONFIG_EXT4_FS is not set
834# CONFIG_REISERFS_FS is not set 962# CONFIG_REISERFS_FS is not set
835# CONFIG_JFS_FS is not set 963# CONFIG_JFS_FS is not set
836# CONFIG_FS_POSIX_ACL is not set 964# CONFIG_FS_POSIX_ACL is not set
965CONFIG_FILE_LOCKING=y
837# CONFIG_XFS_FS is not set 966# CONFIG_XFS_FS is not set
838# CONFIG_OCFS2_FS is not set 967# CONFIG_OCFS2_FS is not set
968# CONFIG_BTRFS_FS is not set
839# CONFIG_DNOTIFY is not set 969# CONFIG_DNOTIFY is not set
840# CONFIG_INOTIFY is not set 970# CONFIG_INOTIFY is not set
841# CONFIG_QUOTA is not set 971# CONFIG_QUOTA is not set
@@ -844,6 +974,11 @@ CONFIG_RTC_DRV_PCF8563=y
844# CONFIG_FUSE_FS is not set 974# CONFIG_FUSE_FS is not set
845 975
846# 976#
977# Caches
978#
979# CONFIG_FSCACHE is not set
980
981#
847# CD-ROM/DVD Filesystems 982# CD-ROM/DVD Filesystems
848# 983#
849# CONFIG_ISO9660_FS is not set 984# CONFIG_ISO9660_FS is not set
@@ -861,15 +996,13 @@ CONFIG_RTC_DRV_PCF8563=y
861# 996#
862CONFIG_PROC_FS=y 997CONFIG_PROC_FS=y
863CONFIG_PROC_SYSCTL=y 998CONFIG_PROC_SYSCTL=y
999# CONFIG_PROC_PAGE_MONITOR is not set
864CONFIG_SYSFS=y 1000CONFIG_SYSFS=y
865CONFIG_TMPFS=y 1001CONFIG_TMPFS=y
866# CONFIG_TMPFS_POSIX_ACL is not set 1002# CONFIG_TMPFS_POSIX_ACL is not set
867# CONFIG_HUGETLB_PAGE is not set 1003# CONFIG_HUGETLB_PAGE is not set
868# CONFIG_CONFIGFS_FS is not set 1004# CONFIG_CONFIGFS_FS is not set
869 1005CONFIG_MISC_FILESYSTEMS=y
870#
871# Miscellaneous filesystems
872#
873# CONFIG_ADFS_FS is not set 1006# CONFIG_ADFS_FS is not set
874# CONFIG_AFFS_FS is not set 1007# CONFIG_AFFS_FS is not set
875# CONFIG_HFS_FS is not set 1008# CONFIG_HFS_FS is not set
@@ -889,25 +1022,27 @@ CONFIG_JFFS2_ZLIB=y
889CONFIG_JFFS2_RTIME=y 1022CONFIG_JFFS2_RTIME=y
890# CONFIG_JFFS2_RUBIN is not set 1023# CONFIG_JFFS2_RUBIN is not set
891# CONFIG_CRAMFS is not set 1024# CONFIG_CRAMFS is not set
1025# CONFIG_SQUASHFS is not set
892# CONFIG_VXFS_FS is not set 1026# CONFIG_VXFS_FS is not set
893# CONFIG_MINIX_FS is not set 1027# CONFIG_MINIX_FS is not set
1028# CONFIG_OMFS_FS is not set
894# CONFIG_HPFS_FS is not set 1029# CONFIG_HPFS_FS is not set
895# CONFIG_QNX4FS_FS is not set 1030# CONFIG_QNX4FS_FS is not set
896# CONFIG_ROMFS_FS is not set 1031# CONFIG_ROMFS_FS is not set
897# CONFIG_SYSV_FS is not set 1032# CONFIG_SYSV_FS is not set
898# CONFIG_UFS_FS is not set 1033# CONFIG_UFS_FS is not set
1034# CONFIG_NILFS2_FS is not set
899CONFIG_NETWORK_FILESYSTEMS=y 1035CONFIG_NETWORK_FILESYSTEMS=y
900CONFIG_NFS_FS=y 1036CONFIG_NFS_FS=y
901CONFIG_NFS_V3=y 1037CONFIG_NFS_V3=y
902# CONFIG_NFS_V3_ACL is not set 1038# CONFIG_NFS_V3_ACL is not set
903# CONFIG_NFS_V4 is not set 1039# CONFIG_NFS_V4 is not set
904# CONFIG_NFSD is not set
905CONFIG_ROOT_NFS=y 1040CONFIG_ROOT_NFS=y
1041# CONFIG_NFSD is not set
906CONFIG_LOCKD=y 1042CONFIG_LOCKD=y
907CONFIG_LOCKD_V4=y 1043CONFIG_LOCKD_V4=y
908CONFIG_NFS_COMMON=y 1044CONFIG_NFS_COMMON=y
909CONFIG_SUNRPC=y 1045CONFIG_SUNRPC=y
910# CONFIG_SUNRPC_BIND34 is not set
911# CONFIG_RPCSEC_GSS_KRB5 is not set 1046# CONFIG_RPCSEC_GSS_KRB5 is not set
912# CONFIG_RPCSEC_GSS_SPKM3 is not set 1047# CONFIG_RPCSEC_GSS_SPKM3 is not set
913# CONFIG_SMB_FS is not set 1048# CONFIG_SMB_FS is not set
@@ -972,12 +1107,41 @@ CONFIG_ENABLE_MUST_CHECK=y
972CONFIG_FRAME_WARN=1024 1107CONFIG_FRAME_WARN=1024
973# CONFIG_MAGIC_SYSRQ is not set 1108# CONFIG_MAGIC_SYSRQ is not set
974# CONFIG_UNUSED_SYMBOLS is not set 1109# CONFIG_UNUSED_SYMBOLS is not set
975# CONFIG_DEBUG_FS is not set 1110CONFIG_DEBUG_FS=y
976# CONFIG_HEADERS_CHECK is not set 1111# CONFIG_HEADERS_CHECK is not set
977# CONFIG_DEBUG_KERNEL is not set 1112# CONFIG_DEBUG_KERNEL is not set
1113CONFIG_STACKTRACE=y
978# CONFIG_DEBUG_BUGVERBOSE is not set 1114# CONFIG_DEBUG_BUGVERBOSE is not set
979CONFIG_FRAME_POINTER=y 1115# CONFIG_DEBUG_MEMORY_INIT is not set
1116# CONFIG_RCU_CPU_STALL_DETECTOR is not set
1117# CONFIG_LATENCYTOP is not set
1118CONFIG_SYSCTL_SYSCALL_CHECK=y
1119CONFIG_NOP_TRACER=y
1120CONFIG_HAVE_FUNCTION_TRACER=y
1121CONFIG_RING_BUFFER=y
1122CONFIG_TRACING=y
1123CONFIG_TRACING_SUPPORT=y
1124
1125#
1126# Tracers
1127#
1128# CONFIG_FUNCTION_TRACER is not set
1129# CONFIG_IRQSOFF_TRACER is not set
1130# CONFIG_PREEMPT_TRACER is not set
1131# CONFIG_SCHED_TRACER is not set
1132# CONFIG_CONTEXT_SWITCH_TRACER is not set
1133# CONFIG_EVENT_TRACER is not set
1134# CONFIG_BOOT_TRACER is not set
1135# CONFIG_TRACE_BRANCH_PROFILING is not set
1136# CONFIG_STACK_TRACER is not set
1137# CONFIG_KMEMTRACE is not set
1138# CONFIG_WORKQUEUE_TRACER is not set
1139# CONFIG_BLK_DEV_IO_TRACE is not set
1140# CONFIG_FTRACE_STARTUP_TEST is not set
1141# CONFIG_DYNAMIC_DEBUG is not set
980# CONFIG_SAMPLES is not set 1142# CONFIG_SAMPLES is not set
1143CONFIG_HAVE_ARCH_KGDB=y
1144CONFIG_ARM_UNWIND=y
981# CONFIG_DEBUG_USER is not set 1145# CONFIG_DEBUG_USER is not set
982 1146
983# 1147#
@@ -985,24 +1149,26 @@ CONFIG_FRAME_POINTER=y
985# 1149#
986# CONFIG_KEYS is not set 1150# CONFIG_KEYS is not set
987# CONFIG_SECURITY is not set 1151# CONFIG_SECURITY is not set
1152# CONFIG_SECURITYFS is not set
988# CONFIG_SECURITY_FILE_CAPABILITIES is not set 1153# CONFIG_SECURITY_FILE_CAPABILITIES is not set
989# CONFIG_CRYPTO is not set 1154# CONFIG_CRYPTO is not set
1155CONFIG_BINARY_PRINTF=y
990 1156
991# 1157#
992# Library routines 1158# Library routines
993# 1159#
994CONFIG_BITREVERSE=y 1160CONFIG_BITREVERSE=y
995# CONFIG_GENERIC_FIND_FIRST_BIT is not set 1161CONFIG_GENERIC_FIND_LAST_BIT=y
996# CONFIG_GENERIC_FIND_NEXT_BIT is not set
997# CONFIG_CRC_CCITT is not set 1162# CONFIG_CRC_CCITT is not set
998# CONFIG_CRC16 is not set 1163# CONFIG_CRC16 is not set
1164# CONFIG_CRC_T10DIF is not set
999# CONFIG_CRC_ITU_T is not set 1165# CONFIG_CRC_ITU_T is not set
1000CONFIG_CRC32=y 1166CONFIG_CRC32=y
1001# CONFIG_CRC7 is not set 1167# CONFIG_CRC7 is not set
1002# CONFIG_LIBCRC32C is not set 1168# CONFIG_LIBCRC32C is not set
1003CONFIG_ZLIB_INFLATE=y 1169CONFIG_ZLIB_INFLATE=y
1004CONFIG_ZLIB_DEFLATE=y 1170CONFIG_ZLIB_DEFLATE=y
1005CONFIG_PLIST=y
1006CONFIG_HAS_IOMEM=y 1171CONFIG_HAS_IOMEM=y
1007CONFIG_HAS_IOPORT=y 1172CONFIG_HAS_IOPORT=y
1008CONFIG_HAS_DMA=y 1173CONFIG_HAS_DMA=y
1174CONFIG_NLATTR=y
diff --git a/arch/arm/configs/mx31litekit_defconfig b/arch/arm/configs/mx3_defconfig
index 4f41c4135685..72a8201a5370 100644
--- a/arch/arm/configs/mx31litekit_defconfig
+++ b/arch/arm/configs/mx3_defconfig
@@ -1,17 +1,18 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.26-rc5 3# Linux kernel version: 2.6.30-rc1
4# Fri Jun 13 14:23:39 2008 4# Wed Apr 8 11:06:37 2009
5# 5#
6CONFIG_ARM=y 6CONFIG_ARM=y
7CONFIG_SYS_SUPPORTS_APM_EMULATION=y 7CONFIG_SYS_SUPPORTS_APM_EMULATION=y
8# CONFIG_GENERIC_GPIO is not set 8CONFIG_GENERIC_GPIO=y
9# CONFIG_GENERIC_TIME is not set 9CONFIG_GENERIC_TIME=y
10# CONFIG_GENERIC_CLOCKEVENTS is not set 10CONFIG_GENERIC_CLOCKEVENTS=y
11CONFIG_MMU=y 11CONFIG_MMU=y
12# CONFIG_NO_IOPORT is not set 12# CONFIG_NO_IOPORT is not set
13CONFIG_GENERIC_HARDIRQS=y 13CONFIG_GENERIC_HARDIRQS=y
14CONFIG_STACKTRACE_SUPPORT=y 14CONFIG_STACKTRACE_SUPPORT=y
15CONFIG_HAVE_LATENCYTOP_SUPPORT=y
15CONFIG_LOCKDEP_SUPPORT=y 16CONFIG_LOCKDEP_SUPPORT=y
16CONFIG_TRACE_IRQFLAGS_SUPPORT=y 17CONFIG_TRACE_IRQFLAGS_SUPPORT=y
17CONFIG_HARDIRQS_SW_RESEND=y 18CONFIG_HARDIRQS_SW_RESEND=y
@@ -21,9 +22,8 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y
21# CONFIG_ARCH_HAS_ILOG2_U64 is not set 22# CONFIG_ARCH_HAS_ILOG2_U64 is not set
22CONFIG_GENERIC_HWEIGHT=y 23CONFIG_GENERIC_HWEIGHT=y
23CONFIG_GENERIC_CALIBRATE_DELAY=y 24CONFIG_GENERIC_CALIBRATE_DELAY=y
24CONFIG_ARCH_SUPPORTS_AOUT=y
25CONFIG_ZONE_DMA=y
26CONFIG_ARCH_MTD_XIP=y 25CONFIG_ARCH_MTD_XIP=y
26CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
27CONFIG_VECTORS_BASE=0xffff0000 27CONFIG_VECTORS_BASE=0xffff0000
28CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 28CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
29 29
@@ -43,11 +43,24 @@ CONFIG_SYSVIPC_SYSCTL=y
43# CONFIG_BSD_PROCESS_ACCT is not set 43# CONFIG_BSD_PROCESS_ACCT is not set
44# CONFIG_TASKSTATS is not set 44# CONFIG_TASKSTATS is not set
45# CONFIG_AUDIT is not set 45# CONFIG_AUDIT is not set
46
47#
48# RCU Subsystem
49#
50CONFIG_CLASSIC_RCU=y
51# CONFIG_TREE_RCU is not set
52# CONFIG_PREEMPT_RCU is not set
53# CONFIG_TREE_RCU_TRACE is not set
54# CONFIG_PREEMPT_RCU_TRACE is not set
46CONFIG_IKCONFIG=y 55CONFIG_IKCONFIG=y
47CONFIG_IKCONFIG_PROC=y 56CONFIG_IKCONFIG_PROC=y
48CONFIG_LOG_BUF_SHIFT=14 57CONFIG_LOG_BUF_SHIFT=14
58CONFIG_GROUP_SCHED=y
59CONFIG_FAIR_GROUP_SCHED=y
60# CONFIG_RT_GROUP_SCHED is not set
61CONFIG_USER_SCHED=y
62# CONFIG_CGROUP_SCHED is not set
49# CONFIG_CGROUPS is not set 63# CONFIG_CGROUPS is not set
50# CONFIG_GROUP_SCHED is not set
51CONFIG_SYSFS_DEPRECATED=y 64CONFIG_SYSFS_DEPRECATED=y
52CONFIG_SYSFS_DEPRECATED_V2=y 65CONFIG_SYSFS_DEPRECATED_V2=y
53# CONFIG_RELAY is not set 66# CONFIG_RELAY is not set
@@ -55,27 +68,26 @@ CONFIG_SYSFS_DEPRECATED_V2=y
55# CONFIG_BLK_DEV_INITRD is not set 68# CONFIG_BLK_DEV_INITRD is not set
56CONFIG_CC_OPTIMIZE_FOR_SIZE=y 69CONFIG_CC_OPTIMIZE_FOR_SIZE=y
57CONFIG_SYSCTL=y 70CONFIG_SYSCTL=y
71CONFIG_ANON_INODES=y
58CONFIG_EMBEDDED=y 72CONFIG_EMBEDDED=y
59CONFIG_UID16=y 73CONFIG_UID16=y
60CONFIG_SYSCTL_SYSCALL=y 74CONFIG_SYSCTL_SYSCALL=y
61CONFIG_SYSCTL_SYSCALL_CHECK=y
62CONFIG_KALLSYMS=y 75CONFIG_KALLSYMS=y
63# CONFIG_KALLSYMS_ALL is not set
64# CONFIG_KALLSYMS_EXTRA_PASS is not set 76# CONFIG_KALLSYMS_EXTRA_PASS is not set
65CONFIG_HOTPLUG=y 77CONFIG_HOTPLUG=y
66CONFIG_PRINTK=y 78CONFIG_PRINTK=y
67CONFIG_BUG=y 79CONFIG_BUG=y
68CONFIG_ELF_CORE=y 80CONFIG_ELF_CORE=y
69CONFIG_COMPAT_BRK=y
70CONFIG_BASE_FULL=y 81CONFIG_BASE_FULL=y
71CONFIG_FUTEX=y 82CONFIG_FUTEX=y
72CONFIG_ANON_INODES=y
73CONFIG_EPOLL=y 83CONFIG_EPOLL=y
74CONFIG_SIGNALFD=y 84CONFIG_SIGNALFD=y
75CONFIG_TIMERFD=y 85CONFIG_TIMERFD=y
76CONFIG_EVENTFD=y 86CONFIG_EVENTFD=y
77CONFIG_SHMEM=y 87CONFIG_SHMEM=y
88CONFIG_AIO=y
78CONFIG_VM_EVENT_COUNTERS=y 89CONFIG_VM_EVENT_COUNTERS=y
90CONFIG_COMPAT_BRK=y
79CONFIG_SLAB=y 91CONFIG_SLAB=y
80# CONFIG_SLUB is not set 92# CONFIG_SLUB is not set
81# CONFIG_SLOB is not set 93# CONFIG_SLOB is not set
@@ -85,11 +97,10 @@ CONFIG_HAVE_OPROFILE=y
85# CONFIG_KPROBES is not set 97# CONFIG_KPROBES is not set
86CONFIG_HAVE_KPROBES=y 98CONFIG_HAVE_KPROBES=y
87CONFIG_HAVE_KRETPROBES=y 99CONFIG_HAVE_KRETPROBES=y
88# CONFIG_HAVE_DMA_ATTRS is not set 100# CONFIG_SLOW_WORK is not set
89CONFIG_PROC_PAGE_MONITOR=y 101CONFIG_HAVE_GENERIC_DMA_COHERENT=y
90CONFIG_SLABINFO=y 102CONFIG_SLABINFO=y
91CONFIG_RT_MUTEXES=y 103CONFIG_RT_MUTEXES=y
92# CONFIG_TINY_SHMEM is not set
93CONFIG_BASE_SMALL=0 104CONFIG_BASE_SMALL=0
94CONFIG_MODULES=y 105CONFIG_MODULES=y
95# CONFIG_MODULE_FORCE_LOAD is not set 106# CONFIG_MODULE_FORCE_LOAD is not set
@@ -97,12 +108,10 @@ CONFIG_MODULE_UNLOAD=y
97CONFIG_MODULE_FORCE_UNLOAD=y 108CONFIG_MODULE_FORCE_UNLOAD=y
98CONFIG_MODVERSIONS=y 109CONFIG_MODVERSIONS=y
99# CONFIG_MODULE_SRCVERSION_ALL is not set 110# CONFIG_MODULE_SRCVERSION_ALL is not set
100CONFIG_KMOD=y
101CONFIG_BLOCK=y 111CONFIG_BLOCK=y
102# CONFIG_LBD is not set 112# CONFIG_LBD is not set
103# CONFIG_BLK_DEV_IO_TRACE is not set
104# CONFIG_LSF is not set
105# CONFIG_BLK_DEV_BSG is not set 113# CONFIG_BLK_DEV_BSG is not set
114# CONFIG_BLK_DEV_INTEGRITY is not set
106 115
107# 116#
108# IO Schedulers 117# IO Schedulers
@@ -116,7 +125,7 @@ CONFIG_IOSCHED_CFQ=y
116CONFIG_DEFAULT_CFQ=y 125CONFIG_DEFAULT_CFQ=y
117# CONFIG_DEFAULT_NOOP is not set 126# CONFIG_DEFAULT_NOOP is not set
118CONFIG_DEFAULT_IOSCHED="cfq" 127CONFIG_DEFAULT_IOSCHED="cfq"
119CONFIG_CLASSIC_RCU=y 128CONFIG_FREEZER=y
120 129
121# 130#
122# System Type 131# System Type
@@ -126,11 +135,10 @@ CONFIG_CLASSIC_RCU=y
126# CONFIG_ARCH_REALVIEW is not set 135# CONFIG_ARCH_REALVIEW is not set
127# CONFIG_ARCH_VERSATILE is not set 136# CONFIG_ARCH_VERSATILE is not set
128# CONFIG_ARCH_AT91 is not set 137# CONFIG_ARCH_AT91 is not set
129# CONFIG_ARCH_CLPS7500 is not set
130# CONFIG_ARCH_CLPS711X is not set 138# CONFIG_ARCH_CLPS711X is not set
131# CONFIG_ARCH_CO285 is not set
132# CONFIG_ARCH_EBSA110 is not set 139# CONFIG_ARCH_EBSA110 is not set
133# CONFIG_ARCH_EP93XX is not set 140# CONFIG_ARCH_EP93XX is not set
141# CONFIG_ARCH_GEMINI is not set
134# CONFIG_ARCH_FOOTBRIDGE is not set 142# CONFIG_ARCH_FOOTBRIDGE is not set
135# CONFIG_ARCH_NETX is not set 143# CONFIG_ARCH_NETX is not set
136# CONFIG_ARCH_H720X is not set 144# CONFIG_ARCH_H720X is not set
@@ -142,46 +150,54 @@ CONFIG_CLASSIC_RCU=y
142# CONFIG_ARCH_IXP2000 is not set 150# CONFIG_ARCH_IXP2000 is not set
143# CONFIG_ARCH_IXP4XX is not set 151# CONFIG_ARCH_IXP4XX is not set
144# CONFIG_ARCH_L7200 is not set 152# CONFIG_ARCH_L7200 is not set
153# CONFIG_ARCH_KIRKWOOD is not set
145# CONFIG_ARCH_KS8695 is not set 154# CONFIG_ARCH_KS8695 is not set
146# CONFIG_ARCH_NS9XXX is not set 155# CONFIG_ARCH_NS9XXX is not set
156# CONFIG_ARCH_LOKI is not set
157# CONFIG_ARCH_MV78XX0 is not set
147CONFIG_ARCH_MXC=y 158CONFIG_ARCH_MXC=y
148# CONFIG_ARCH_ORION5X is not set 159# CONFIG_ARCH_ORION5X is not set
149# CONFIG_ARCH_PNX4008 is not set 160# CONFIG_ARCH_PNX4008 is not set
150# CONFIG_ARCH_PXA is not set 161# CONFIG_ARCH_PXA is not set
162# CONFIG_ARCH_MMP is not set
151# CONFIG_ARCH_RPC is not set 163# CONFIG_ARCH_RPC is not set
152# CONFIG_ARCH_SA1100 is not set 164# CONFIG_ARCH_SA1100 is not set
153# CONFIG_ARCH_S3C2410 is not set 165# CONFIG_ARCH_S3C2410 is not set
166# CONFIG_ARCH_S3C64XX is not set
154# CONFIG_ARCH_SHARK is not set 167# CONFIG_ARCH_SHARK is not set
155# CONFIG_ARCH_LH7A40X is not set 168# CONFIG_ARCH_LH7A40X is not set
156# CONFIG_ARCH_DAVINCI is not set 169# CONFIG_ARCH_DAVINCI is not set
157# CONFIG_ARCH_OMAP is not set 170# CONFIG_ARCH_OMAP is not set
158# CONFIG_ARCH_MSM7X00A is not set 171# CONFIG_ARCH_MSM is not set
159 172# CONFIG_ARCH_W90X900 is not set
160#
161# Boot options
162#
163
164#
165# Power management
166#
167 173
168# 174#
169# Freescale MXC Implementations 175# Freescale MXC Implementations
170# 176#
177# CONFIG_ARCH_MX1 is not set
178# CONFIG_ARCH_MX2 is not set
171CONFIG_ARCH_MX3=y 179CONFIG_ARCH_MX3=y
180CONFIG_ARCH_MX31=y
172 181
173# 182#
174# MX3 Options 183# MX3 platforms:
175# 184#
176# CONFIG_MACH_MX31ADS is not set 185CONFIG_MACH_MX31ADS=y
186CONFIG_MACH_MX31ADS_WM1133_EV1=y
187CONFIG_MACH_PCM037=y
177CONFIG_MACH_MX31LITE=y 188CONFIG_MACH_MX31LITE=y
189CONFIG_MACH_MX31_3DS=y
190CONFIG_MACH_MX31MOBOARD=y
191CONFIG_MACH_QONG=y
192CONFIG_MXC_IRQ_PRIOR=y
193CONFIG_MXC_PWM=y
178 194
179# 195#
180# Processor Type 196# Processor Type
181# 197#
182CONFIG_CPU_32=y 198CONFIG_CPU_32=y
183CONFIG_CPU_V6=y 199CONFIG_CPU_V6=y
184# CONFIG_CPU_32v6K is not set 200CONFIG_CPU_32v6K=y
185CONFIG_CPU_32v6=y 201CONFIG_CPU_32v6=y
186CONFIG_CPU_ABRT_EV6=y 202CONFIG_CPU_ABRT_EV6=y
187CONFIG_CPU_PABRT_NOIFAR=y 203CONFIG_CPU_PABRT_NOIFAR=y
@@ -200,45 +216,50 @@ CONFIG_ARM_THUMB=y
200# CONFIG_CPU_ICACHE_DISABLE is not set 216# CONFIG_CPU_ICACHE_DISABLE is not set
201# CONFIG_CPU_DCACHE_DISABLE is not set 217# CONFIG_CPU_DCACHE_DISABLE is not set
202# CONFIG_CPU_BPREDICT_DISABLE is not set 218# CONFIG_CPU_BPREDICT_DISABLE is not set
203# CONFIG_OUTER_CACHE is not set 219CONFIG_OUTER_CACHE=y
220CONFIG_CACHE_L2X0=y
221CONFIG_COMMON_CLKDEV=y
204 222
205# 223#
206# Bus support 224# Bus support
207# 225#
208# CONFIG_PCI_SYSCALL is not set 226# CONFIG_PCI_SYSCALL is not set
209# CONFIG_ARCH_SUPPORTS_MSI is not set 227# CONFIG_ARCH_SUPPORTS_MSI is not set
210CONFIG_PCCARD=m 228# CONFIG_PCCARD is not set
211# CONFIG_PCMCIA_DEBUG is not set
212# CONFIG_PCMCIA is not set
213
214#
215# PC-card bridges
216#
217 229
218# 230#
219# Kernel Features 231# Kernel Features
220# 232#
221# CONFIG_TICK_ONESHOT is not set 233CONFIG_TICK_ONESHOT=y
234CONFIG_NO_HZ=y
235CONFIG_HIGH_RES_TIMERS=y
236CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
237CONFIG_VMSPLIT_3G=y
238# CONFIG_VMSPLIT_2G is not set
239# CONFIG_VMSPLIT_1G is not set
240CONFIG_PAGE_OFFSET=0xC0000000
222CONFIG_PREEMPT=y 241CONFIG_PREEMPT=y
223# CONFIG_NO_IDLE_HZ is not set
224CONFIG_HZ=100 242CONFIG_HZ=100
225CONFIG_AEABI=y 243CONFIG_AEABI=y
226# CONFIG_OABI_COMPAT is not set 244CONFIG_OABI_COMPAT=y
227# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set 245CONFIG_ARCH_FLATMEM_HAS_HOLES=y
246# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
247# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
248# CONFIG_HIGHMEM is not set
228CONFIG_SELECT_MEMORY_MODEL=y 249CONFIG_SELECT_MEMORY_MODEL=y
229CONFIG_FLATMEM_MANUAL=y 250CONFIG_FLATMEM_MANUAL=y
230# CONFIG_DISCONTIGMEM_MANUAL is not set 251# CONFIG_DISCONTIGMEM_MANUAL is not set
231# CONFIG_SPARSEMEM_MANUAL is not set 252# CONFIG_SPARSEMEM_MANUAL is not set
232CONFIG_FLATMEM=y 253CONFIG_FLATMEM=y
233CONFIG_FLAT_NODE_MEM_MAP=y 254CONFIG_FLAT_NODE_MEM_MAP=y
234# CONFIG_SPARSEMEM_STATIC is not set
235# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
236CONFIG_PAGEFLAGS_EXTENDED=y 255CONFIG_PAGEFLAGS_EXTENDED=y
237CONFIG_SPLIT_PTLOCK_CPUS=4 256CONFIG_SPLIT_PTLOCK_CPUS=4
238# CONFIG_RESOURCES_64BIT is not set 257# CONFIG_PHYS_ADDR_T_64BIT is not set
239CONFIG_ZONE_DMA_FLAG=1 258CONFIG_ZONE_DMA_FLAG=0
240CONFIG_BOUNCE=y
241CONFIG_VIRT_TO_BUS=y 259CONFIG_VIRT_TO_BUS=y
260CONFIG_UNEVICTABLE_LRU=y
261CONFIG_HAVE_MLOCK=y
262CONFIG_HAVE_MLOCKED_PAGE_BIT=y
242CONFIG_ALIGNMENT_TRAP=y 263CONFIG_ALIGNMENT_TRAP=y
243 264
244# 265#
@@ -251,33 +272,42 @@ CONFIG_CMDLINE="noinitrd console=ttymxc0,115200 root=/dev/mtdblock2 rw ip=off"
251# CONFIG_KEXEC is not set 272# CONFIG_KEXEC is not set
252 273
253# 274#
275# CPU Power Management
276#
277# CONFIG_CPU_IDLE is not set
278
279#
254# Floating point emulation 280# Floating point emulation
255# 281#
256 282
257# 283#
258# At least one emulation must be selected 284# At least one emulation must be selected
259# 285#
286# CONFIG_FPE_NWFPE is not set
287# CONFIG_FPE_FASTFPE is not set
260CONFIG_VFP=y 288CONFIG_VFP=y
261 289
262# 290#
263# Userspace binary formats 291# Userspace binary formats
264# 292#
265CONFIG_BINFMT_ELF=y 293CONFIG_BINFMT_ELF=y
266CONFIG_BINFMT_AOUT=y 294# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
295CONFIG_HAVE_AOUT=y
296# CONFIG_BINFMT_AOUT is not set
267# CONFIG_BINFMT_MISC is not set 297# CONFIG_BINFMT_MISC is not set
268 298
269# 299#
270# Power management options 300# Power management options
271# 301#
272CONFIG_PM=y 302CONFIG_PM=y
273# CONFIG_PM_DEBUG is not set 303CONFIG_PM_DEBUG=y
274# CONFIG_SUSPEND is not set 304# CONFIG_PM_VERBOSE is not set
305CONFIG_CAN_PM_TRACE=y
306CONFIG_PM_SLEEP=y
307CONFIG_SUSPEND=y
308CONFIG_SUSPEND_FREEZER=y
275# CONFIG_APM_EMULATION is not set 309# CONFIG_APM_EMULATION is not set
276CONFIG_ARCH_SUSPEND_POSSIBLE=y 310CONFIG_ARCH_SUSPEND_POSSIBLE=y
277
278#
279# Networking
280#
281CONFIG_NET=y 311CONFIG_NET=y
282 312
283# 313#
@@ -286,11 +316,6 @@ CONFIG_NET=y
286CONFIG_PACKET=y 316CONFIG_PACKET=y
287# CONFIG_PACKET_MMAP is not set 317# CONFIG_PACKET_MMAP is not set
288CONFIG_UNIX=y 318CONFIG_UNIX=y
289CONFIG_XFRM=y
290# CONFIG_XFRM_USER is not set
291# CONFIG_XFRM_SUB_POLICY is not set
292# CONFIG_XFRM_MIGRATE is not set
293# CONFIG_XFRM_STATISTICS is not set
294# CONFIG_NET_KEY is not set 319# CONFIG_NET_KEY is not set
295CONFIG_INET=y 320CONFIG_INET=y
296# CONFIG_IP_MULTICAST is not set 321# CONFIG_IP_MULTICAST is not set
@@ -309,12 +334,11 @@ CONFIG_IP_PNP_DHCP=y
309# CONFIG_INET_IPCOMP is not set 334# CONFIG_INET_IPCOMP is not set
310# CONFIG_INET_XFRM_TUNNEL is not set 335# CONFIG_INET_XFRM_TUNNEL is not set
311# CONFIG_INET_TUNNEL is not set 336# CONFIG_INET_TUNNEL is not set
312CONFIG_INET_XFRM_MODE_TRANSPORT=y 337# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
313CONFIG_INET_XFRM_MODE_TUNNEL=y 338# CONFIG_INET_XFRM_MODE_TUNNEL is not set
314CONFIG_INET_XFRM_MODE_BEET=y 339# CONFIG_INET_XFRM_MODE_BEET is not set
315# CONFIG_INET_LRO is not set 340# CONFIG_INET_LRO is not set
316CONFIG_INET_DIAG=y 341# CONFIG_INET_DIAG is not set
317CONFIG_INET_TCP_DIAG=y
318# CONFIG_TCP_CONG_ADVANCED is not set 342# CONFIG_TCP_CONG_ADVANCED is not set
319CONFIG_TCP_CONG_CUBIC=y 343CONFIG_TCP_CONG_CUBIC=y
320CONFIG_DEFAULT_TCP_CONG="cubic" 344CONFIG_DEFAULT_TCP_CONG="cubic"
@@ -327,6 +351,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
327# CONFIG_TIPC is not set 351# CONFIG_TIPC is not set
328# CONFIG_ATM is not set 352# CONFIG_ATM is not set
329# CONFIG_BRIDGE is not set 353# CONFIG_BRIDGE is not set
354# CONFIG_NET_DSA is not set
330# CONFIG_VLAN_8021Q is not set 355# CONFIG_VLAN_8021Q is not set
331# CONFIG_DECNET is not set 356# CONFIG_DECNET is not set
332# CONFIG_LLC2 is not set 357# CONFIG_LLC2 is not set
@@ -336,7 +361,9 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
336# CONFIG_LAPB is not set 361# CONFIG_LAPB is not set
337# CONFIG_ECONET is not set 362# CONFIG_ECONET is not set
338# CONFIG_WAN_ROUTER is not set 363# CONFIG_WAN_ROUTER is not set
364# CONFIG_PHONET is not set
339# CONFIG_NET_SCHED is not set 365# CONFIG_NET_SCHED is not set
366# CONFIG_DCB is not set
340 367
341# 368#
342# Network testing 369# Network testing
@@ -347,14 +374,8 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
347# CONFIG_IRDA is not set 374# CONFIG_IRDA is not set
348# CONFIG_BT is not set 375# CONFIG_BT is not set
349# CONFIG_AF_RXRPC is not set 376# CONFIG_AF_RXRPC is not set
350 377# CONFIG_WIRELESS is not set
351# 378# CONFIG_WIMAX is not set
352# Wireless
353#
354# CONFIG_CFG80211 is not set
355# CONFIG_WIRELESS_EXT is not set
356# CONFIG_MAC80211 is not set
357# CONFIG_IEEE80211 is not set
358# CONFIG_RFKILL is not set 379# CONFIG_RFKILL is not set
359# CONFIG_NET_9P is not set 380# CONFIG_NET_9P is not set
360 381
@@ -369,18 +390,16 @@ CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
369CONFIG_STANDALONE=y 390CONFIG_STANDALONE=y
370CONFIG_PREVENT_FIRMWARE_BUILD=y 391CONFIG_PREVENT_FIRMWARE_BUILD=y
371CONFIG_FW_LOADER=m 392CONFIG_FW_LOADER=m
372# CONFIG_DEBUG_DRIVER is not set 393CONFIG_FIRMWARE_IN_KERNEL=y
373# CONFIG_DEBUG_DEVRES is not set 394CONFIG_EXTRA_FIRMWARE=""
374# CONFIG_SYS_HYPERVISOR is not set 395# CONFIG_SYS_HYPERVISOR is not set
375# CONFIG_CONNECTOR is not set 396# CONFIG_CONNECTOR is not set
376CONFIG_MTD=y 397CONFIG_MTD=y
377# CONFIG_MTD_DEBUG is not set 398# CONFIG_MTD_DEBUG is not set
378# CONFIG_MTD_CONCAT is not set 399# CONFIG_MTD_CONCAT is not set
379CONFIG_MTD_PARTITIONS=y 400CONFIG_MTD_PARTITIONS=y
380CONFIG_MTD_REDBOOT_PARTS=y 401# CONFIG_MTD_TESTS is not set
381CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-1 402# CONFIG_MTD_REDBOOT_PARTS is not set
382# CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED is not set
383# CONFIG_MTD_REDBOOT_PARTS_READONLY is not set
384CONFIG_MTD_CMDLINE_PARTS=y 403CONFIG_MTD_CMDLINE_PARTS=y
385# CONFIG_MTD_AFS_PARTS is not set 404# CONFIG_MTD_AFS_PARTS is not set
386# CONFIG_MTD_AR7_PARTS is not set 405# CONFIG_MTD_AR7_PARTS is not set
@@ -404,36 +423,31 @@ CONFIG_MTD_BLOCK=y
404CONFIG_MTD_CFI=y 423CONFIG_MTD_CFI=y
405# CONFIG_MTD_JEDECPROBE is not set 424# CONFIG_MTD_JEDECPROBE is not set
406CONFIG_MTD_GEN_PROBE=y 425CONFIG_MTD_GEN_PROBE=y
407CONFIG_MTD_CFI_ADV_OPTIONS=y 426# CONFIG_MTD_CFI_ADV_OPTIONS is not set
408CONFIG_MTD_CFI_NOSWAP=y 427CONFIG_MTD_MAP_BANK_WIDTH_1=y
409# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set
410# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set
411CONFIG_MTD_CFI_GEOMETRY=y
412# CONFIG_MTD_MAP_BANK_WIDTH_1 is not set
413CONFIG_MTD_MAP_BANK_WIDTH_2=y 428CONFIG_MTD_MAP_BANK_WIDTH_2=y
414# CONFIG_MTD_MAP_BANK_WIDTH_4 is not set 429CONFIG_MTD_MAP_BANK_WIDTH_4=y
415# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set 430# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
416# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set 431# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
417# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set 432# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
418CONFIG_MTD_CFI_I1=y 433CONFIG_MTD_CFI_I1=y
419# CONFIG_MTD_CFI_I2 is not set 434CONFIG_MTD_CFI_I2=y
420# CONFIG_MTD_CFI_I4 is not set 435# CONFIG_MTD_CFI_I4 is not set
421# CONFIG_MTD_CFI_I8 is not set 436# CONFIG_MTD_CFI_I8 is not set
422# CONFIG_MTD_OTP is not set
423# CONFIG_MTD_CFI_INTELEXT is not set 437# CONFIG_MTD_CFI_INTELEXT is not set
424CONFIG_MTD_CFI_AMDSTD=y 438# CONFIG_MTD_CFI_AMDSTD is not set
425# CONFIG_MTD_CFI_STAA is not set 439# CONFIG_MTD_CFI_STAA is not set
426CONFIG_MTD_CFI_UTIL=y 440CONFIG_MTD_CFI_UTIL=y
427CONFIG_MTD_RAM=y 441# CONFIG_MTD_RAM is not set
428# CONFIG_MTD_ROM is not set 442# CONFIG_MTD_ROM is not set
429# CONFIG_MTD_ABSENT is not set 443# CONFIG_MTD_ABSENT is not set
430# CONFIG_MTD_XIP is not set
431 444
432# 445#
433# Mapping drivers for chip access 446# Mapping drivers for chip access
434# 447#
435# CONFIG_MTD_COMPLEX_MAPPINGS is not set 448# CONFIG_MTD_COMPLEX_MAPPINGS is not set
436# CONFIG_MTD_PHYSMAP is not set 449CONFIG_MTD_PHYSMAP=y
450# CONFIG_MTD_PHYSMAP_COMPAT is not set
437# CONFIG_MTD_ARM_INTEGRATOR is not set 451# CONFIG_MTD_ARM_INTEGRATOR is not set
438# CONFIG_MTD_PLATRAM is not set 452# CONFIG_MTD_PLATRAM is not set
439 453
@@ -451,18 +465,15 @@ CONFIG_MTD_RAM=y
451# CONFIG_MTD_DOC2000 is not set 465# CONFIG_MTD_DOC2000 is not set
452# CONFIG_MTD_DOC2001 is not set 466# CONFIG_MTD_DOC2001 is not set
453# CONFIG_MTD_DOC2001PLUS is not set 467# CONFIG_MTD_DOC2001PLUS is not set
454CONFIG_MTD_NAND=y 468# CONFIG_MTD_NAND is not set
455# CONFIG_MTD_NAND_VERIFY_WRITE is not set
456# CONFIG_MTD_NAND_ECC_SMC is not set
457# CONFIG_MTD_NAND_MUSEUM_IDS is not set
458CONFIG_MTD_NAND_IDS=y
459# CONFIG_MTD_NAND_DISKONCHIP is not set
460# CONFIG_MTD_NAND_NANDSIM is not set
461# CONFIG_MTD_NAND_PLATFORM is not set
462# CONFIG_MTD_ALAUDA is not set
463# CONFIG_MTD_ONENAND is not set 469# CONFIG_MTD_ONENAND is not set
464 470
465# 471#
472# LPDDR flash memory drivers
473#
474# CONFIG_MTD_LPDDR is not set
475
476#
466# UBI - Unsorted block images 477# UBI - Unsorted block images
467# 478#
468# CONFIG_MTD_UBI is not set 479# CONFIG_MTD_UBI is not set
@@ -476,63 +487,58 @@ CONFIG_HAVE_IDE=y
476# SCSI device support 487# SCSI device support
477# 488#
478# CONFIG_RAID_ATTRS is not set 489# CONFIG_RAID_ATTRS is not set
479CONFIG_SCSI=y 490# CONFIG_SCSI is not set
480CONFIG_SCSI_DMA=y 491# CONFIG_SCSI_DMA is not set
481# CONFIG_SCSI_TGT is not set
482# CONFIG_SCSI_NETLINK is not set 492# CONFIG_SCSI_NETLINK is not set
483CONFIG_SCSI_PROC_FS=y
484
485#
486# SCSI support type (disk, tape, CD-ROM)
487#
488CONFIG_BLK_DEV_SD=y
489# CONFIG_CHR_DEV_ST is not set
490# CONFIG_CHR_DEV_OSST is not set
491# CONFIG_BLK_DEV_SR is not set
492# CONFIG_CHR_DEV_SG is not set
493# CONFIG_CHR_DEV_SCH is not set
494
495#
496# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
497#
498CONFIG_SCSI_MULTI_LUN=y
499# CONFIG_SCSI_CONSTANTS is not set
500# CONFIG_SCSI_LOGGING is not set
501# CONFIG_SCSI_SCAN_ASYNC is not set
502CONFIG_SCSI_WAIT_SCAN=m
503
504#
505# SCSI Transports
506#
507# CONFIG_SCSI_SPI_ATTRS is not set
508# CONFIG_SCSI_FC_ATTRS is not set
509# CONFIG_SCSI_ISCSI_ATTRS is not set
510# CONFIG_SCSI_SAS_LIBSAS is not set
511# CONFIG_SCSI_SRP_ATTRS is not set
512CONFIG_SCSI_LOWLEVEL=y
513# CONFIG_ISCSI_TCP is not set
514# CONFIG_SCSI_DEBUG is not set
515# CONFIG_ATA is not set 493# CONFIG_ATA is not set
516# CONFIG_MD is not set 494# CONFIG_MD is not set
517CONFIG_NETDEVICES=y 495CONFIG_NETDEVICES=y
518# CONFIG_NETDEVICES_MULTIQUEUE is not set 496CONFIG_COMPAT_NET_DEV_OPS=y
519# CONFIG_DUMMY is not set 497# CONFIG_DUMMY is not set
520# CONFIG_BONDING is not set 498# CONFIG_BONDING is not set
521# CONFIG_MACVLAN is not set 499# CONFIG_MACVLAN is not set
522# CONFIG_EQUALIZER is not set 500# CONFIG_EQUALIZER is not set
523# CONFIG_TUN is not set 501# CONFIG_TUN is not set
524# CONFIG_VETH is not set 502# CONFIG_VETH is not set
525# CONFIG_PHYLIB is not set 503CONFIG_PHYLIB=y
504
505#
506# MII PHY device drivers
507#
508# CONFIG_MARVELL_PHY is not set
509# CONFIG_DAVICOM_PHY is not set
510# CONFIG_QSEMI_PHY is not set
511# CONFIG_LXT_PHY is not set
512# CONFIG_CICADA_PHY is not set
513# CONFIG_VITESSE_PHY is not set
514CONFIG_SMSC_PHY=y
515# CONFIG_BROADCOM_PHY is not set
516# CONFIG_ICPLUS_PHY is not set
517# CONFIG_REALTEK_PHY is not set
518# CONFIG_NATIONAL_PHY is not set
519# CONFIG_STE10XP is not set
520# CONFIG_LSI_ET1011C_PHY is not set
521# CONFIG_FIXED_PHY is not set
522# CONFIG_MDIO_BITBANG is not set
526CONFIG_NET_ETHERNET=y 523CONFIG_NET_ETHERNET=y
527CONFIG_MII=y 524CONFIG_MII=y
528# CONFIG_AX88796 is not set 525# CONFIG_AX88796 is not set
529# CONFIG_SMC91X is not set 526# CONFIG_SMC91X is not set
530# CONFIG_DM9000 is not set 527# CONFIG_DM9000 is not set
528# CONFIG_ETHOC is not set
529# CONFIG_SMC911X is not set
530CONFIG_SMSC911X=y
531# CONFIG_DNET is not set
531# CONFIG_IBM_NEW_EMAC_ZMII is not set 532# CONFIG_IBM_NEW_EMAC_ZMII is not set
532# CONFIG_IBM_NEW_EMAC_RGMII is not set 533# CONFIG_IBM_NEW_EMAC_RGMII is not set
533# CONFIG_IBM_NEW_EMAC_TAH is not set 534# CONFIG_IBM_NEW_EMAC_TAH is not set
534# CONFIG_IBM_NEW_EMAC_EMAC4 is not set 535# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
536# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
537# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
538# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
535# CONFIG_B44 is not set 539# CONFIG_B44 is not set
540CONFIG_CS89x0=y
541CONFIG_CS89x0_NONISA_IRQ=y
536# CONFIG_NETDEV_1000 is not set 542# CONFIG_NETDEV_1000 is not set
537# CONFIG_NETDEV_10000 is not set 543# CONFIG_NETDEV_10000 is not set
538 544
@@ -541,16 +547,10 @@ CONFIG_MII=y
541# 547#
542# CONFIG_WLAN_PRE80211 is not set 548# CONFIG_WLAN_PRE80211 is not set
543# CONFIG_WLAN_80211 is not set 549# CONFIG_WLAN_80211 is not set
544# CONFIG_IWLWIFI_LEDS is not set
545 550
546# 551#
547# USB Network Adapters 552# Enable WiMAX (Networking options) to see the WiMAX drivers
548# 553#
549# CONFIG_USB_CATC is not set
550# CONFIG_USB_KAWETH is not set
551# CONFIG_USB_PEGASUS is not set
552# CONFIG_USB_RTL8150 is not set
553# CONFIG_USB_USBNET is not set
554# CONFIG_WAN is not set 554# CONFIG_WAN is not set
555# CONFIG_PPP is not set 555# CONFIG_PPP is not set
556# CONFIG_SLIP is not set 556# CONFIG_SLIP is not set
@@ -562,43 +562,7 @@ CONFIG_MII=y
562# 562#
563# Input device support 563# Input device support
564# 564#
565CONFIG_INPUT=y 565# CONFIG_INPUT is not set
566# CONFIG_INPUT_FF_MEMLESS is not set
567# CONFIG_INPUT_POLLDEV is not set
568
569#
570# Userland interfaces
571#
572# CONFIG_INPUT_MOUSEDEV is not set
573# CONFIG_INPUT_JOYDEV is not set
574CONFIG_INPUT_EVDEV=y
575# CONFIG_INPUT_EVBUG is not set
576
577#
578# Input Device Drivers
579#
580CONFIG_INPUT_KEYBOARD=y
581# CONFIG_KEYBOARD_ATKBD is not set
582# CONFIG_KEYBOARD_SUNKBD is not set
583# CONFIG_KEYBOARD_LKKBD is not set
584# CONFIG_KEYBOARD_XTKBD is not set
585# CONFIG_KEYBOARD_NEWTON is not set
586# CONFIG_KEYBOARD_STOWAWAY is not set
587# CONFIG_INPUT_MOUSE is not set
588# CONFIG_INPUT_JOYSTICK is not set
589# CONFIG_INPUT_TABLET is not set
590CONFIG_INPUT_TOUCHSCREEN=y
591# CONFIG_TOUCHSCREEN_FUJITSU is not set
592# CONFIG_TOUCHSCREEN_GUNZE is not set
593# CONFIG_TOUCHSCREEN_ELO is not set
594# CONFIG_TOUCHSCREEN_MTOUCH is not set
595# CONFIG_TOUCHSCREEN_MK712 is not set
596# CONFIG_TOUCHSCREEN_PENMOUNT is not set
597# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
598# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
599# CONFIG_TOUCHSCREEN_UCB1400 is not set
600# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set
601# CONFIG_INPUT_MISC is not set
602 566
603# 567#
604# Hardware I/O ports 568# Hardware I/O ports
@@ -609,10 +573,7 @@ CONFIG_INPUT_TOUCHSCREEN=y
609# 573#
610# Character devices 574# Character devices
611# 575#
612CONFIG_VT=y 576# CONFIG_VT is not set
613CONFIG_VT_CONSOLE=y
614CONFIG_HW_CONSOLE=y
615# CONFIG_VT_HW_CONSOLE_BINDING is not set
616CONFIG_DEVKMEM=y 577CONFIG_DEVKMEM=y
617# CONFIG_SERIAL_NONSTANDARD is not set 578# CONFIG_SERIAL_NONSTANDARD is not set
618 579
@@ -624,45 +585,132 @@ CONFIG_DEVKMEM=y
624# 585#
625# Non-8250 serial port support 586# Non-8250 serial port support
626# 587#
588CONFIG_SERIAL_IMX=y
589CONFIG_SERIAL_IMX_CONSOLE=y
590CONFIG_SERIAL_CORE=y
591CONFIG_SERIAL_CORE_CONSOLE=y
627CONFIG_UNIX98_PTYS=y 592CONFIG_UNIX98_PTYS=y
628CONFIG_LEGACY_PTYS=y 593# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
629CONFIG_LEGACY_PTY_COUNT=256 594# CONFIG_LEGACY_PTYS is not set
630# CONFIG_IPMI_HANDLER is not set 595# CONFIG_IPMI_HANDLER is not set
631CONFIG_HW_RANDOM=y 596# CONFIG_HW_RANDOM is not set
632# CONFIG_NVRAM is not set
633# CONFIG_R3964 is not set 597# CONFIG_R3964 is not set
634# CONFIG_RAW_DRIVER is not set 598# CONFIG_RAW_DRIVER is not set
635# CONFIG_TCG_TPM is not set 599# CONFIG_TCG_TPM is not set
636# CONFIG_I2C is not set 600CONFIG_I2C=y
601CONFIG_I2C_BOARDINFO=y
602CONFIG_I2C_CHARDEV=y
603CONFIG_I2C_HELPER_AUTO=y
604
605#
606# I2C Hardware Bus support
607#
608
609#
610# I2C system bus drivers (mostly embedded / system-on-chip)
611#
612# CONFIG_I2C_GPIO is not set
613CONFIG_I2C_IMX=y
614# CONFIG_I2C_OCORES is not set
615# CONFIG_I2C_SIMTEC is not set
616
617#
618# External I2C/SMBus adapter drivers
619#
620# CONFIG_I2C_PARPORT_LIGHT is not set
621# CONFIG_I2C_TAOS_EVM is not set
622
623#
624# Other I2C/SMBus bus drivers
625#
626# CONFIG_I2C_PCA_PLATFORM is not set
627# CONFIG_I2C_STUB is not set
628
629#
630# Miscellaneous I2C Chip support
631#
632# CONFIG_DS1682 is not set
633# CONFIG_SENSORS_PCF8574 is not set
634# CONFIG_PCF8575 is not set
635# CONFIG_SENSORS_PCA9539 is not set
636# CONFIG_SENSORS_MAX6875 is not set
637# CONFIG_SENSORS_TSL2550 is not set
638# CONFIG_I2C_DEBUG_CORE is not set
639# CONFIG_I2C_DEBUG_ALGO is not set
640# CONFIG_I2C_DEBUG_BUS is not set
641# CONFIG_I2C_DEBUG_CHIP is not set
637# CONFIG_SPI is not set 642# CONFIG_SPI is not set
638# CONFIG_W1 is not set 643CONFIG_ARCH_REQUIRE_GPIOLIB=y
639# CONFIG_POWER_SUPPLY is not set 644CONFIG_GPIOLIB=y
640# CONFIG_HWMON is not set 645# CONFIG_GPIO_SYSFS is not set
641CONFIG_WATCHDOG=y
642CONFIG_WATCHDOG_NOWAYOUT=y
643 646
644# 647#
645# Watchdog Device Drivers 648# Memory mapped GPIO expanders:
646# 649#
647# CONFIG_SOFT_WATCHDOG is not set
648 650
649# 651#
650# USB-based Watchdog Cards 652# I2C GPIO expanders:
651# 653#
652# CONFIG_USBPCWATCHDOG is not set 654# CONFIG_GPIO_MAX732X is not set
655# CONFIG_GPIO_PCA953X is not set
656# CONFIG_GPIO_PCF857X is not set
653 657
654# 658#
655# Sonics Silicon Backplane 659# PCI GPIO expanders:
656# 660#
661
662#
663# SPI GPIO expanders:
664#
665CONFIG_W1=y
666
667#
668# 1-wire Bus Masters
669#
670# CONFIG_W1_MASTER_DS2482 is not set
671CONFIG_W1_MASTER_MXC=y
672# CONFIG_W1_MASTER_GPIO is not set
673
674#
675# 1-wire Slaves
676#
677CONFIG_W1_SLAVE_THERM=y
678# CONFIG_W1_SLAVE_SMEM is not set
679# CONFIG_W1_SLAVE_DS2431 is not set
680# CONFIG_W1_SLAVE_DS2433 is not set
681# CONFIG_W1_SLAVE_DS2760 is not set
682# CONFIG_W1_SLAVE_BQ27000 is not set
683# CONFIG_POWER_SUPPLY is not set
684# CONFIG_HWMON is not set
685# CONFIG_THERMAL is not set
686# CONFIG_THERMAL_HWMON is not set
687# CONFIG_WATCHDOG is not set
657CONFIG_SSB_POSSIBLE=y 688CONFIG_SSB_POSSIBLE=y
689
690#
691# Sonics Silicon Backplane
692#
658# CONFIG_SSB is not set 693# CONFIG_SSB is not set
659 694
660# 695#
661# Multifunction device drivers 696# Multifunction device drivers
662# 697#
698# CONFIG_MFD_CORE is not set
663# CONFIG_MFD_SM501 is not set 699# CONFIG_MFD_SM501 is not set
664# CONFIG_MFD_ASIC3 is not set 700# CONFIG_MFD_ASIC3 is not set
701# CONFIG_HTC_EGPIO is not set
665# CONFIG_HTC_PASIC3 is not set 702# CONFIG_HTC_PASIC3 is not set
703# CONFIG_TPS65010 is not set
704# CONFIG_TWL4030_CORE is not set
705# CONFIG_MFD_TMIO is not set
706# CONFIG_MFD_TC6393XB is not set
707# CONFIG_PMIC_DA903X is not set
708# CONFIG_MFD_WM8400 is not set
709CONFIG_MFD_WM8350=y
710CONFIG_MFD_WM8350_CONFIG_MODE_0=y
711CONFIG_MFD_WM8352_CONFIG_MODE_0=y
712CONFIG_MFD_WM8350_I2C=y
713# CONFIG_MFD_PCF50633 is not set
666 714
667# 715#
668# Multimedia devices 716# Multimedia devices
@@ -673,7 +721,7 @@ CONFIG_SSB_POSSIBLE=y
673# 721#
674CONFIG_VIDEO_DEV=y 722CONFIG_VIDEO_DEV=y
675CONFIG_VIDEO_V4L2_COMMON=y 723CONFIG_VIDEO_V4L2_COMMON=y
676CONFIG_VIDEO_ALLOW_V4L1=y 724# CONFIG_VIDEO_ALLOW_V4L1 is not set
677CONFIG_VIDEO_V4L1_COMPAT=y 725CONFIG_VIDEO_V4L1_COMPAT=y
678# CONFIG_DVB_CORE is not set 726# CONFIG_DVB_CORE is not set
679CONFIG_VIDEO_MEDIA=y 727CONFIG_VIDEO_MEDIA=y
@@ -682,34 +730,38 @@ CONFIG_VIDEO_MEDIA=y
682# Multimedia drivers 730# Multimedia drivers
683# 731#
684# CONFIG_MEDIA_ATTACH is not set 732# CONFIG_MEDIA_ATTACH is not set
733CONFIG_MEDIA_TUNER=y
734# CONFIG_MEDIA_TUNER_CUSTOMISE is not set
735CONFIG_MEDIA_TUNER_SIMPLE=y
736CONFIG_MEDIA_TUNER_TDA8290=y
737CONFIG_MEDIA_TUNER_TDA9887=y
738CONFIG_MEDIA_TUNER_TEA5761=y
739CONFIG_MEDIA_TUNER_TEA5767=y
740CONFIG_MEDIA_TUNER_MT20XX=y
741CONFIG_MEDIA_TUNER_XC2028=y
742CONFIG_MEDIA_TUNER_XC5000=y
743CONFIG_MEDIA_TUNER_MC44S803=y
685CONFIG_VIDEO_V4L2=y 744CONFIG_VIDEO_V4L2=y
686CONFIG_VIDEO_V4L1=y 745CONFIG_VIDEOBUF_GEN=y
746CONFIG_VIDEOBUF_DMA_CONTIG=y
687CONFIG_VIDEO_CAPTURE_DRIVERS=y 747CONFIG_VIDEO_CAPTURE_DRIVERS=y
688# CONFIG_VIDEO_ADV_DEBUG is not set 748# CONFIG_VIDEO_ADV_DEBUG is not set
749# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set
689CONFIG_VIDEO_HELPER_CHIPS_AUTO=y 750CONFIG_VIDEO_HELPER_CHIPS_AUTO=y
690# CONFIG_VIDEO_VIVI is not set 751# CONFIG_VIDEO_VIVI is not set
691# CONFIG_VIDEO_CPIA is not set 752# CONFIG_VIDEO_SAA5246A is not set
692# CONFIG_VIDEO_CPIA2 is not set 753# CONFIG_VIDEO_SAA5249 is not set
693CONFIG_V4L_USB_DRIVERS=y 754CONFIG_SOC_CAMERA=y
694# CONFIG_USB_VICAM is not set 755CONFIG_SOC_CAMERA_MT9M001=y
695# CONFIG_USB_IBMCAM is not set 756CONFIG_SOC_CAMERA_MT9M111=y
696# CONFIG_USB_KONICAWC is not set 757CONFIG_SOC_CAMERA_MT9T031=y
697# CONFIG_USB_QUICKCAM_MESSENGER is not set 758CONFIG_SOC_CAMERA_MT9V022=y
698# CONFIG_USB_ET61X251 is not set 759CONFIG_SOC_CAMERA_TW9910=y
699# CONFIG_USB_OV511 is not set 760# CONFIG_SOC_CAMERA_PLATFORM is not set
700# CONFIG_USB_SE401 is not set 761# CONFIG_SOC_CAMERA_OV772X is not set
701# CONFIG_USB_SN9C102 is not set 762CONFIG_VIDEO_MX3=y
702# CONFIG_USB_STV680 is not set 763# CONFIG_RADIO_ADAPTERS is not set
703# CONFIG_USB_ZC0301 is not set 764# CONFIG_DAB is not set
704# CONFIG_USB_PWC is not set
705# CONFIG_USB_ZR364XX is not set
706# CONFIG_USB_STKWEBCAM is not set
707# CONFIG_SOC_CAMERA is not set
708CONFIG_RADIO_ADAPTERS=y
709# CONFIG_USB_DSBR is not set
710# CONFIG_USB_SI470X is not set
711CONFIG_DAB=y
712# CONFIG_USB_DABUSB is not set
713 765
714# 766#
715# Graphics support 767# Graphics support
@@ -719,9 +771,10 @@ CONFIG_DAB=y
719CONFIG_FB=y 771CONFIG_FB=y
720# CONFIG_FIRMWARE_EDID is not set 772# CONFIG_FIRMWARE_EDID is not set
721# CONFIG_FB_DDC is not set 773# CONFIG_FB_DDC is not set
722# CONFIG_FB_CFB_FILLRECT is not set 774# CONFIG_FB_BOOT_VESA_SUPPORT is not set
723# CONFIG_FB_CFB_COPYAREA is not set 775CONFIG_FB_CFB_FILLRECT=y
724# CONFIG_FB_CFB_IMAGEBLIT is not set 776CONFIG_FB_CFB_COPYAREA=y
777CONFIG_FB_CFB_IMAGEBLIT=y
725# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set 778# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
726# CONFIG_FB_SYS_FILLRECT is not set 779# CONFIG_FB_SYS_FILLRECT is not set
727# CONFIG_FB_SYS_COPYAREA is not set 780# CONFIG_FB_SYS_COPYAREA is not set
@@ -739,131 +792,79 @@ CONFIG_FB=y
739# 792#
740# CONFIG_FB_S1D13XXX is not set 793# CONFIG_FB_S1D13XXX is not set
741# CONFIG_FB_VIRTUAL is not set 794# CONFIG_FB_VIRTUAL is not set
795# CONFIG_FB_METRONOME is not set
796# CONFIG_FB_MB862XX is not set
797CONFIG_FB_MX3=y
798# CONFIG_FB_BROADSHEET is not set
742# CONFIG_BACKLIGHT_LCD_SUPPORT is not set 799# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
743 800
744# 801#
745# Display device support 802# Display device support
746# 803#
747# CONFIG_DISPLAY_SUPPORT is not set 804# CONFIG_DISPLAY_SUPPORT is not set
748 805# CONFIG_LOGO is not set
749#
750# Console display driver support
751#
752# CONFIG_VGA_CONSOLE is not set
753CONFIG_DUMMY_CONSOLE=y
754CONFIG_FRAMEBUFFER_CONSOLE=y
755# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
756# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
757# CONFIG_FONTS is not set
758CONFIG_FONT_8x8=y
759CONFIG_FONT_8x16=y
760CONFIG_LOGO=y
761# CONFIG_LOGO_LINUX_MONO is not set
762# CONFIG_LOGO_LINUX_VGA16 is not set
763CONFIG_LOGO_LINUX_CLUT224=y
764
765#
766# Sound
767#
768# CONFIG_SOUND is not set 806# CONFIG_SOUND is not set
769# CONFIG_HID_SUPPORT is not set 807# CONFIG_USB_SUPPORT is not set
770CONFIG_USB_SUPPORT=y 808CONFIG_MMC=y
771CONFIG_USB_ARCH_HAS_HCD=y 809# CONFIG_MMC_DEBUG is not set
772# CONFIG_USB_ARCH_HAS_OHCI is not set 810# CONFIG_MMC_UNSAFE_RESUME is not set
773# CONFIG_USB_ARCH_HAS_EHCI is not set
774CONFIG_USB=y
775# CONFIG_USB_DEBUG is not set
776# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
777 811
778# 812#
779# Miscellaneous USB options 813# MMC/SD/SDIO Card Drivers
780# 814#
781# CONFIG_USB_DEVICEFS is not set 815CONFIG_MMC_BLOCK=y
782CONFIG_USB_DEVICE_CLASS=y 816CONFIG_MMC_BLOCK_BOUNCE=y
783# CONFIG_USB_DYNAMIC_MINORS is not set 817# CONFIG_SDIO_UART is not set
784# CONFIG_USB_SUSPEND is not set 818# CONFIG_MMC_TEST is not set
785# CONFIG_USB_OTG is not set
786# CONFIG_USB_OTG_WHITELIST is not set
787# CONFIG_USB_OTG_BLACKLIST_HUB is not set
788 819
789# 820#
790# USB Host Controller Drivers 821# MMC/SD/SDIO Host Controller Drivers
791# 822#
792# CONFIG_USB_C67X00_HCD is not set 823# CONFIG_MMC_SDHCI is not set
793# CONFIG_USB_ISP116X_HCD is not set 824CONFIG_MMC_MXC=y
794# CONFIG_USB_ISP1760_HCD is not set 825# CONFIG_MEMSTICK is not set
795# CONFIG_USB_SL811_HCD is not set 826# CONFIG_ACCESSIBILITY is not set
796# CONFIG_USB_R8A66597_HCD is not set 827# CONFIG_NEW_LEDS is not set
797 828CONFIG_RTC_LIB=y
798# 829# CONFIG_RTC_CLASS is not set
799# USB Device Class drivers 830CONFIG_DMADEVICES=y
800#
801# CONFIG_USB_ACM is not set
802# CONFIG_USB_PRINTER is not set
803# CONFIG_USB_WDM is not set
804
805#
806# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
807#
808
809#
810# may also be needed; see USB_STORAGE Help for more information
811#
812# CONFIG_USB_STORAGE is not set
813# CONFIG_USB_LIBUSUAL is not set
814
815#
816# USB Imaging devices
817#
818# CONFIG_USB_MDC800 is not set
819# CONFIG_USB_MICROTEK is not set
820CONFIG_USB_MON=y
821 831
822# 832#
823# USB port drivers 833# DMA Devices
824# 834#
825# CONFIG_USB_SERIAL is not set 835CONFIG_MX3_IPU=y
836CONFIG_MX3_IPU_IRQS=4
837CONFIG_DMA_ENGINE=y
826 838
827# 839#
828# USB Miscellaneous drivers 840# DMA Clients
829# 841#
830# CONFIG_USB_EMI62 is not set 842# CONFIG_NET_DMA is not set
831# CONFIG_USB_EMI26 is not set 843# CONFIG_ASYNC_TX_DMA is not set
832# CONFIG_USB_ADUTUX is not set 844# CONFIG_DMATEST is not set
833# CONFIG_USB_AUERSWALD is not set 845# CONFIG_AUXDISPLAY is not set
834# CONFIG_USB_RIO500 is not set 846CONFIG_REGULATOR=y
835# CONFIG_USB_LEGOTOWER is not set 847# CONFIG_REGULATOR_DEBUG is not set
836# CONFIG_USB_LCD is not set 848# CONFIG_REGULATOR_FIXED_VOLTAGE is not set
837# CONFIG_USB_BERRY_CHARGE is not set 849# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set
838# CONFIG_USB_LED is not set 850# CONFIG_REGULATOR_BQ24022 is not set
839# CONFIG_USB_CYPRESS_CY7C63 is not set 851CONFIG_REGULATOR_WM8350=y
840# CONFIG_USB_CYTHERM is not set
841# CONFIG_USB_PHIDGET is not set
842# CONFIG_USB_IDMOUSE is not set
843# CONFIG_USB_FTDI_ELAN is not set
844# CONFIG_USB_APPLEDISPLAY is not set
845# CONFIG_USB_LD is not set
846# CONFIG_USB_TRANCEVIBRATOR is not set
847# CONFIG_USB_IOWARRIOR is not set
848# CONFIG_USB_ISIGHTFW is not set
849# CONFIG_USB_GADGET is not set
850# CONFIG_MMC is not set
851# CONFIG_NEW_LEDS is not set
852CONFIG_RTC_LIB=y
853# CONFIG_RTC_CLASS is not set
854# CONFIG_UIO is not set 852# CONFIG_UIO is not set
853# CONFIG_STAGING is not set
855 854
856# 855#
857# File systems 856# File systems
858# 857#
859# CONFIG_EXT2_FS is not set 858# CONFIG_EXT2_FS is not set
860# CONFIG_EXT3_FS is not set 859# CONFIG_EXT3_FS is not set
861# CONFIG_EXT4DEV_FS is not set 860# CONFIG_EXT4_FS is not set
862# CONFIG_REISERFS_FS is not set 861# CONFIG_REISERFS_FS is not set
863# CONFIG_JFS_FS is not set 862# CONFIG_JFS_FS is not set
864# CONFIG_FS_POSIX_ACL is not set 863# CONFIG_FS_POSIX_ACL is not set
864CONFIG_FILE_LOCKING=y
865# CONFIG_XFS_FS is not set 865# CONFIG_XFS_FS is not set
866# CONFIG_OCFS2_FS is not set 866# CONFIG_OCFS2_FS is not set
867# CONFIG_BTRFS_FS is not set
867# CONFIG_DNOTIFY is not set 868# CONFIG_DNOTIFY is not set
868CONFIG_INOTIFY=y 869CONFIG_INOTIFY=y
869CONFIG_INOTIFY_USER=y 870CONFIG_INOTIFY_USER=y
@@ -873,6 +874,11 @@ CONFIG_INOTIFY_USER=y
873# CONFIG_FUSE_FS is not set 874# CONFIG_FUSE_FS is not set
874 875
875# 876#
877# Caches
878#
879# CONFIG_FSCACHE is not set
880
881#
876# CD-ROM/DVD Filesystems 882# CD-ROM/DVD Filesystems
877# 883#
878# CONFIG_ISO9660_FS is not set 884# CONFIG_ISO9660_FS is not set
@@ -890,15 +896,13 @@ CONFIG_INOTIFY_USER=y
890# 896#
891CONFIG_PROC_FS=y 897CONFIG_PROC_FS=y
892CONFIG_PROC_SYSCTL=y 898CONFIG_PROC_SYSCTL=y
899CONFIG_PROC_PAGE_MONITOR=y
893CONFIG_SYSFS=y 900CONFIG_SYSFS=y
894CONFIG_TMPFS=y 901CONFIG_TMPFS=y
895# CONFIG_TMPFS_POSIX_ACL is not set 902# CONFIG_TMPFS_POSIX_ACL is not set
896# CONFIG_HUGETLB_PAGE is not set 903# CONFIG_HUGETLB_PAGE is not set
897# CONFIG_CONFIGFS_FS is not set 904# CONFIG_CONFIGFS_FS is not set
898 905CONFIG_MISC_FILESYSTEMS=y
899#
900# Miscellaneous filesystems
901#
902# CONFIG_ADFS_FS is not set 906# CONFIG_ADFS_FS is not set
903# CONFIG_AFFS_FS is not set 907# CONFIG_AFFS_FS is not set
904# CONFIG_HFS_FS is not set 908# CONFIG_HFS_FS is not set
@@ -917,25 +921,30 @@ CONFIG_JFFS2_ZLIB=y
917# CONFIG_JFFS2_LZO is not set 921# CONFIG_JFFS2_LZO is not set
918CONFIG_JFFS2_RTIME=y 922CONFIG_JFFS2_RTIME=y
919# CONFIG_JFFS2_RUBIN is not set 923# CONFIG_JFFS2_RUBIN is not set
920CONFIG_CRAMFS=y 924# CONFIG_CRAMFS is not set
925# CONFIG_SQUASHFS is not set
921# CONFIG_VXFS_FS is not set 926# CONFIG_VXFS_FS is not set
922# CONFIG_MINIX_FS is not set 927# CONFIG_MINIX_FS is not set
928# CONFIG_OMFS_FS is not set
923# CONFIG_HPFS_FS is not set 929# CONFIG_HPFS_FS is not set
924# CONFIG_QNX4FS_FS is not set 930# CONFIG_QNX4FS_FS is not set
925# CONFIG_ROMFS_FS is not set 931# CONFIG_ROMFS_FS is not set
926# CONFIG_SYSV_FS is not set 932# CONFIG_SYSV_FS is not set
927# CONFIG_UFS_FS is not set 933# CONFIG_UFS_FS is not set
934# CONFIG_NILFS2_FS is not set
928CONFIG_NETWORK_FILESYSTEMS=y 935CONFIG_NETWORK_FILESYSTEMS=y
929CONFIG_NFS_FS=y 936CONFIG_NFS_FS=y
930# CONFIG_NFS_V3 is not set 937CONFIG_NFS_V3=y
931# CONFIG_NFS_V4 is not set 938# CONFIG_NFS_V3_ACL is not set
932# CONFIG_NFSD is not set 939CONFIG_NFS_V4=y
933CONFIG_ROOT_NFS=y 940CONFIG_ROOT_NFS=y
941# CONFIG_NFSD is not set
934CONFIG_LOCKD=y 942CONFIG_LOCKD=y
943CONFIG_LOCKD_V4=y
935CONFIG_NFS_COMMON=y 944CONFIG_NFS_COMMON=y
936CONFIG_SUNRPC=y 945CONFIG_SUNRPC=y
937# CONFIG_SUNRPC_BIND34 is not set 946CONFIG_SUNRPC_GSS=y
938# CONFIG_RPCSEC_GSS_KRB5 is not set 947CONFIG_RPCSEC_GSS_KRB5=y
939# CONFIG_RPCSEC_GSS_SPKM3 is not set 948# CONFIG_RPCSEC_GSS_SPKM3 is not set
940# CONFIG_SMB_FS is not set 949# CONFIG_SMB_FS is not set
941# CONFIG_CIFS is not set 950# CONFIG_CIFS is not set
@@ -954,65 +963,70 @@ CONFIG_MSDOS_PARTITION=y
954# 963#
955# Kernel hacking 964# Kernel hacking
956# 965#
957CONFIG_PRINTK_TIME=y 966# CONFIG_PRINTK_TIME is not set
958CONFIG_ENABLE_WARN_DEPRECATED=y 967# CONFIG_ENABLE_WARN_DEPRECATED is not set
959CONFIG_ENABLE_MUST_CHECK=y 968# CONFIG_ENABLE_MUST_CHECK is not set
960CONFIG_FRAME_WARN=1024 969CONFIG_FRAME_WARN=1024
961# CONFIG_MAGIC_SYSRQ is not set 970# CONFIG_MAGIC_SYSRQ is not set
962# CONFIG_UNUSED_SYMBOLS is not set 971# CONFIG_UNUSED_SYMBOLS is not set
963# CONFIG_DEBUG_FS is not set 972# CONFIG_DEBUG_FS is not set
964# CONFIG_HEADERS_CHECK is not set 973# CONFIG_HEADERS_CHECK is not set
965CONFIG_DEBUG_KERNEL=y 974# CONFIG_DEBUG_KERNEL is not set
966# CONFIG_DEBUG_SHIRQ is not set 975# CONFIG_DEBUG_BUGVERBOSE is not set
967CONFIG_DETECT_SOFTLOCKUP=y 976# CONFIG_DEBUG_MEMORY_INIT is not set
968CONFIG_SCHED_DEBUG=y 977# CONFIG_RCU_CPU_STALL_DETECTOR is not set
969# CONFIG_SCHEDSTATS is not set 978# CONFIG_LATENCYTOP is not set
970# CONFIG_TIMER_STATS is not set 979CONFIG_SYSCTL_SYSCALL_CHECK=y
971# CONFIG_DEBUG_OBJECTS is not set 980CONFIG_HAVE_FUNCTION_TRACER=y
972# CONFIG_DEBUG_SLAB is not set 981CONFIG_TRACING_SUPPORT=y
973CONFIG_DEBUG_PREEMPT=y 982
974# CONFIG_DEBUG_RT_MUTEXES is not set 983#
975# CONFIG_RT_MUTEX_TESTER is not set 984# Tracers
976# CONFIG_DEBUG_SPINLOCK is not set 985#
977# CONFIG_DEBUG_MUTEXES is not set 986# CONFIG_FUNCTION_TRACER is not set
978# CONFIG_DEBUG_LOCK_ALLOC is not set 987# CONFIG_IRQSOFF_TRACER is not set
979# CONFIG_PROVE_LOCKING is not set 988# CONFIG_PREEMPT_TRACER is not set
980# CONFIG_LOCK_STAT is not set 989# CONFIG_SCHED_TRACER is not set
981# CONFIG_DEBUG_SPINLOCK_SLEEP is not set 990# CONFIG_CONTEXT_SWITCH_TRACER is not set
982# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set 991# CONFIG_EVENT_TRACER is not set
983# CONFIG_DEBUG_KOBJECT is not set 992# CONFIG_BOOT_TRACER is not set
984CONFIG_DEBUG_BUGVERBOSE=y 993# CONFIG_TRACE_BRANCH_PROFILING is not set
985# CONFIG_DEBUG_INFO is not set 994# CONFIG_STACK_TRACER is not set
986# CONFIG_DEBUG_VM is not set 995# CONFIG_KMEMTRACE is not set
987# CONFIG_DEBUG_WRITECOUNT is not set 996# CONFIG_WORKQUEUE_TRACER is not set
988# CONFIG_DEBUG_LIST is not set 997# CONFIG_BLK_DEV_IO_TRACE is not set
989# CONFIG_DEBUG_SG is not set
990CONFIG_FRAME_POINTER=y
991# CONFIG_BOOT_PRINTK_DELAY is not set
992# CONFIG_RCU_TORTURE_TEST is not set
993# CONFIG_BACKTRACE_SELF_TEST is not set
994# CONFIG_FAULT_INJECTION is not set
995# CONFIG_SAMPLES is not set 998# CONFIG_SAMPLES is not set
999CONFIG_HAVE_ARCH_KGDB=y
1000CONFIG_ARM_UNWIND=y
996# CONFIG_DEBUG_USER is not set 1001# CONFIG_DEBUG_USER is not set
997CONFIG_DEBUG_ERRORS=y
998# CONFIG_DEBUG_STACK_USAGE is not set
999CONFIG_DEBUG_LL=y
1000# CONFIG_DEBUG_ICEDCC is not set
1001 1002
1002# 1003#
1003# Security options 1004# Security options
1004# 1005#
1005# CONFIG_KEYS is not set 1006# CONFIG_KEYS is not set
1006# CONFIG_SECURITY is not set 1007# CONFIG_SECURITY is not set
1008# CONFIG_SECURITYFS is not set
1007# CONFIG_SECURITY_FILE_CAPABILITIES is not set 1009# CONFIG_SECURITY_FILE_CAPABILITIES is not set
1008CONFIG_CRYPTO=y 1010CONFIG_CRYPTO=y
1009 1011
1010# 1012#
1011# Crypto core or helper 1013# Crypto core or helper
1012# 1014#
1013# CONFIG_CRYPTO_MANAGER is not set 1015# CONFIG_CRYPTO_FIPS is not set
1016CONFIG_CRYPTO_ALGAPI=y
1017CONFIG_CRYPTO_ALGAPI2=y
1018CONFIG_CRYPTO_AEAD2=y
1019CONFIG_CRYPTO_BLKCIPHER=y
1020CONFIG_CRYPTO_BLKCIPHER2=y
1021CONFIG_CRYPTO_HASH=y
1022CONFIG_CRYPTO_HASH2=y
1023CONFIG_CRYPTO_RNG2=y
1024CONFIG_CRYPTO_PCOMP=y
1025CONFIG_CRYPTO_MANAGER=y
1026CONFIG_CRYPTO_MANAGER2=y
1014# CONFIG_CRYPTO_GF128MUL is not set 1027# CONFIG_CRYPTO_GF128MUL is not set
1015# CONFIG_CRYPTO_NULL is not set 1028# CONFIG_CRYPTO_NULL is not set
1029CONFIG_CRYPTO_WORKQUEUE=y
1016# CONFIG_CRYPTO_CRYPTD is not set 1030# CONFIG_CRYPTO_CRYPTD is not set
1017# CONFIG_CRYPTO_AUTHENC is not set 1031# CONFIG_CRYPTO_AUTHENC is not set
1018# CONFIG_CRYPTO_TEST is not set 1032# CONFIG_CRYPTO_TEST is not set
@@ -1027,7 +1041,7 @@ CONFIG_CRYPTO=y
1027# 1041#
1028# Block modes 1042# Block modes
1029# 1043#
1030# CONFIG_CRYPTO_CBC is not set 1044CONFIG_CRYPTO_CBC=y
1031# CONFIG_CRYPTO_CTR is not set 1045# CONFIG_CRYPTO_CTR is not set
1032# CONFIG_CRYPTO_CTS is not set 1046# CONFIG_CRYPTO_CTS is not set
1033# CONFIG_CRYPTO_ECB is not set 1047# CONFIG_CRYPTO_ECB is not set
@@ -1046,8 +1060,12 @@ CONFIG_CRYPTO=y
1046# 1060#
1047# CONFIG_CRYPTO_CRC32C is not set 1061# CONFIG_CRYPTO_CRC32C is not set
1048# CONFIG_CRYPTO_MD4 is not set 1062# CONFIG_CRYPTO_MD4 is not set
1049# CONFIG_CRYPTO_MD5 is not set 1063CONFIG_CRYPTO_MD5=y
1050# CONFIG_CRYPTO_MICHAEL_MIC is not set 1064# CONFIG_CRYPTO_MICHAEL_MIC is not set
1065# CONFIG_CRYPTO_RMD128 is not set
1066# CONFIG_CRYPTO_RMD160 is not set
1067# CONFIG_CRYPTO_RMD256 is not set
1068# CONFIG_CRYPTO_RMD320 is not set
1051# CONFIG_CRYPTO_SHA1 is not set 1069# CONFIG_CRYPTO_SHA1 is not set
1052# CONFIG_CRYPTO_SHA256 is not set 1070# CONFIG_CRYPTO_SHA256 is not set
1053# CONFIG_CRYPTO_SHA512 is not set 1071# CONFIG_CRYPTO_SHA512 is not set
@@ -1064,7 +1082,7 @@ CONFIG_CRYPTO=y
1064# CONFIG_CRYPTO_CAMELLIA is not set 1082# CONFIG_CRYPTO_CAMELLIA is not set
1065# CONFIG_CRYPTO_CAST5 is not set 1083# CONFIG_CRYPTO_CAST5 is not set
1066# CONFIG_CRYPTO_CAST6 is not set 1084# CONFIG_CRYPTO_CAST6 is not set
1067# CONFIG_CRYPTO_DES is not set 1085CONFIG_CRYPTO_DES=y
1068# CONFIG_CRYPTO_FCRYPT is not set 1086# CONFIG_CRYPTO_FCRYPT is not set
1069# CONFIG_CRYPTO_KHAZAD is not set 1087# CONFIG_CRYPTO_KHAZAD is not set
1070# CONFIG_CRYPTO_SALSA20 is not set 1088# CONFIG_CRYPTO_SALSA20 is not set
@@ -1077,24 +1095,31 @@ CONFIG_CRYPTO=y
1077# Compression 1095# Compression
1078# 1096#
1079# CONFIG_CRYPTO_DEFLATE is not set 1097# CONFIG_CRYPTO_DEFLATE is not set
1098# CONFIG_CRYPTO_ZLIB is not set
1080# CONFIG_CRYPTO_LZO is not set 1099# CONFIG_CRYPTO_LZO is not set
1100
1101#
1102# Random Number Generation
1103#
1104# CONFIG_CRYPTO_ANSI_CPRNG is not set
1081CONFIG_CRYPTO_HW=y 1105CONFIG_CRYPTO_HW=y
1106# CONFIG_BINARY_PRINTF is not set
1082 1107
1083# 1108#
1084# Library routines 1109# Library routines
1085# 1110#
1086CONFIG_BITREVERSE=y 1111CONFIG_BITREVERSE=y
1087# CONFIG_GENERIC_FIND_FIRST_BIT is not set 1112CONFIG_GENERIC_FIND_LAST_BIT=y
1088# CONFIG_GENERIC_FIND_NEXT_BIT is not set 1113# CONFIG_CRC_CCITT is not set
1089CONFIG_CRC_CCITT=m
1090# CONFIG_CRC16 is not set 1114# CONFIG_CRC16 is not set
1115# CONFIG_CRC_T10DIF is not set
1091# CONFIG_CRC_ITU_T is not set 1116# CONFIG_CRC_ITU_T is not set
1092CONFIG_CRC32=y 1117CONFIG_CRC32=y
1093# CONFIG_CRC7 is not set 1118# CONFIG_CRC7 is not set
1094# CONFIG_LIBCRC32C is not set 1119# CONFIG_LIBCRC32C is not set
1095CONFIG_ZLIB_INFLATE=y 1120CONFIG_ZLIB_INFLATE=y
1096CONFIG_ZLIB_DEFLATE=y 1121CONFIG_ZLIB_DEFLATE=y
1097CONFIG_PLIST=y
1098CONFIG_HAS_IOMEM=y 1122CONFIG_HAS_IOMEM=y
1099CONFIG_HAS_IOPORT=y 1123CONFIG_HAS_IOPORT=y
1100CONFIG_HAS_DMA=y 1124CONFIG_HAS_DMA=y
1125CONFIG_NLATTR=y
diff --git a/arch/arm/configs/pcm037_defconfig b/arch/arm/configs/pcm037_defconfig
deleted file mode 100644
index 6e37c77c4760..000000000000
--- a/arch/arm/configs/pcm037_defconfig
+++ /dev/null
@@ -1,769 +0,0 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.26-rc6
4# Wed Jun 25 11:52:42 2008
5#
6CONFIG_ARM=y
7CONFIG_SYS_SUPPORTS_APM_EMULATION=y
8CONFIG_GENERIC_GPIO=y
9CONFIG_GENERIC_TIME=y
10CONFIG_GENERIC_CLOCKEVENTS=y
11CONFIG_MMU=y
12# CONFIG_NO_IOPORT is not set
13CONFIG_GENERIC_HARDIRQS=y
14CONFIG_STACKTRACE_SUPPORT=y
15CONFIG_LOCKDEP_SUPPORT=y
16CONFIG_TRACE_IRQFLAGS_SUPPORT=y
17CONFIG_HARDIRQS_SW_RESEND=y
18CONFIG_GENERIC_IRQ_PROBE=y
19CONFIG_RWSEM_GENERIC_SPINLOCK=y
20# CONFIG_ARCH_HAS_ILOG2_U32 is not set
21# CONFIG_ARCH_HAS_ILOG2_U64 is not set
22CONFIG_GENERIC_HWEIGHT=y
23CONFIG_GENERIC_CALIBRATE_DELAY=y
24CONFIG_ARCH_SUPPORTS_AOUT=y
25CONFIG_ZONE_DMA=y
26CONFIG_ARCH_MTD_XIP=y
27CONFIG_VECTORS_BASE=0xffff0000
28CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
29
30#
31# General setup
32#
33CONFIG_EXPERIMENTAL=y
34CONFIG_BROKEN_ON_SMP=y
35CONFIG_LOCK_KERNEL=y
36CONFIG_INIT_ENV_ARG_LIMIT=32
37CONFIG_LOCALVERSION=""
38CONFIG_LOCALVERSION_AUTO=y
39CONFIG_SWAP=y
40CONFIG_SYSVIPC=y
41CONFIG_SYSVIPC_SYSCTL=y
42# CONFIG_POSIX_MQUEUE is not set
43# CONFIG_BSD_PROCESS_ACCT is not set
44# CONFIG_TASKSTATS is not set
45# CONFIG_AUDIT is not set
46CONFIG_IKCONFIG=y
47CONFIG_IKCONFIG_PROC=y
48CONFIG_LOG_BUF_SHIFT=14
49# CONFIG_CGROUPS is not set
50CONFIG_GROUP_SCHED=y
51CONFIG_FAIR_GROUP_SCHED=y
52# CONFIG_RT_GROUP_SCHED is not set
53CONFIG_USER_SCHED=y
54# CONFIG_CGROUP_SCHED is not set
55CONFIG_SYSFS_DEPRECATED=y
56CONFIG_SYSFS_DEPRECATED_V2=y
57# CONFIG_RELAY is not set
58# CONFIG_NAMESPACES is not set
59# CONFIG_BLK_DEV_INITRD is not set
60CONFIG_CC_OPTIMIZE_FOR_SIZE=y
61CONFIG_SYSCTL=y
62CONFIG_EMBEDDED=y
63CONFIG_UID16=y
64CONFIG_SYSCTL_SYSCALL=y
65CONFIG_SYSCTL_SYSCALL_CHECK=y
66CONFIG_KALLSYMS=y
67# CONFIG_KALLSYMS_EXTRA_PASS is not set
68CONFIG_HOTPLUG=y
69CONFIG_PRINTK=y
70CONFIG_BUG=y
71CONFIG_ELF_CORE=y
72CONFIG_COMPAT_BRK=y
73CONFIG_BASE_FULL=y
74CONFIG_FUTEX=y
75CONFIG_ANON_INODES=y
76CONFIG_EPOLL=y
77CONFIG_SIGNALFD=y
78CONFIG_TIMERFD=y
79CONFIG_EVENTFD=y
80CONFIG_SHMEM=y
81CONFIG_VM_EVENT_COUNTERS=y
82CONFIG_SLAB=y
83# CONFIG_SLUB is not set
84# CONFIG_SLOB is not set
85# CONFIG_PROFILING is not set
86# CONFIG_MARKERS is not set
87CONFIG_HAVE_OPROFILE=y
88# CONFIG_KPROBES is not set
89CONFIG_HAVE_KPROBES=y
90CONFIG_HAVE_KRETPROBES=y
91# CONFIG_HAVE_DMA_ATTRS is not set
92CONFIG_PROC_PAGE_MONITOR=y
93CONFIG_SLABINFO=y
94CONFIG_RT_MUTEXES=y
95# CONFIG_TINY_SHMEM is not set
96CONFIG_BASE_SMALL=0
97CONFIG_MODULES=y
98# CONFIG_MODULE_FORCE_LOAD is not set
99CONFIG_MODULE_UNLOAD=y
100CONFIG_MODULE_FORCE_UNLOAD=y
101CONFIG_MODVERSIONS=y
102# CONFIG_MODULE_SRCVERSION_ALL is not set
103CONFIG_KMOD=y
104CONFIG_BLOCK=y
105# CONFIG_LBD is not set
106# CONFIG_BLK_DEV_IO_TRACE is not set
107# CONFIG_LSF is not set
108# CONFIG_BLK_DEV_BSG is not set
109
110#
111# IO Schedulers
112#
113CONFIG_IOSCHED_NOOP=y
114CONFIG_IOSCHED_AS=y
115CONFIG_IOSCHED_DEADLINE=y
116CONFIG_IOSCHED_CFQ=y
117# CONFIG_DEFAULT_AS is not set
118# CONFIG_DEFAULT_DEADLINE is not set
119CONFIG_DEFAULT_CFQ=y
120# CONFIG_DEFAULT_NOOP is not set
121CONFIG_DEFAULT_IOSCHED="cfq"
122CONFIG_CLASSIC_RCU=y
123
124#
125# System Type
126#
127# CONFIG_ARCH_AAEC2000 is not set
128# CONFIG_ARCH_INTEGRATOR is not set
129# CONFIG_ARCH_REALVIEW is not set
130# CONFIG_ARCH_VERSATILE is not set
131# CONFIG_ARCH_AT91 is not set
132# CONFIG_ARCH_CLPS7500 is not set
133# CONFIG_ARCH_CLPS711X is not set
134# CONFIG_ARCH_CO285 is not set
135# CONFIG_ARCH_EBSA110 is not set
136# CONFIG_ARCH_EP93XX is not set
137# CONFIG_ARCH_FOOTBRIDGE is not set
138# CONFIG_ARCH_NETX is not set
139# CONFIG_ARCH_H720X is not set
140# CONFIG_ARCH_IMX is not set
141# CONFIG_ARCH_IOP13XX is not set
142# CONFIG_ARCH_IOP32X is not set
143# CONFIG_ARCH_IOP33X is not set
144# CONFIG_ARCH_IXP23XX is not set
145# CONFIG_ARCH_IXP2000 is not set
146# CONFIG_ARCH_IXP4XX is not set
147# CONFIG_ARCH_L7200 is not set
148# CONFIG_ARCH_KS8695 is not set
149# CONFIG_ARCH_NS9XXX is not set
150CONFIG_ARCH_MXC=y
151# CONFIG_ARCH_ORION5X is not set
152# CONFIG_ARCH_PNX4008 is not set
153# CONFIG_ARCH_PXA is not set
154# CONFIG_ARCH_RPC is not set
155# CONFIG_ARCH_SA1100 is not set
156# CONFIG_ARCH_S3C2410 is not set
157# CONFIG_ARCH_SHARK is not set
158# CONFIG_ARCH_LH7A40X is not set
159# CONFIG_ARCH_DAVINCI is not set
160# CONFIG_ARCH_OMAP is not set
161# CONFIG_ARCH_MSM7X00A is not set
162
163#
164# Boot options
165#
166
167#
168# Power management
169#
170
171#
172# Freescale MXC Implementations
173#
174CONFIG_ARCH_MX3=y
175
176#
177# MX3 Options
178#
179# CONFIG_MACH_MX31ADS is not set
180CONFIG_MACH_PCM037=y
181
182#
183# Processor Type
184#
185CONFIG_CPU_32=y
186CONFIG_CPU_V6=y
187# CONFIG_CPU_32v6K is not set
188CONFIG_CPU_32v6=y
189CONFIG_CPU_ABRT_EV6=y
190CONFIG_CPU_PABRT_NOIFAR=y
191CONFIG_CPU_CACHE_V6=y
192CONFIG_CPU_CACHE_VIPT=y
193CONFIG_CPU_COPY_V6=y
194CONFIG_CPU_TLB_V6=y
195CONFIG_CPU_HAS_ASID=y
196CONFIG_CPU_CP15=y
197CONFIG_CPU_CP15_MMU=y
198
199#
200# Processor Features
201#
202CONFIG_ARM_THUMB=y
203# CONFIG_CPU_ICACHE_DISABLE is not set
204# CONFIG_CPU_DCACHE_DISABLE is not set
205# CONFIG_CPU_BPREDICT_DISABLE is not set
206# CONFIG_OUTER_CACHE is not set
207
208#
209# Bus support
210#
211# CONFIG_PCI_SYSCALL is not set
212# CONFIG_ARCH_SUPPORTS_MSI is not set
213# CONFIG_PCCARD is not set
214
215#
216# Kernel Features
217#
218CONFIG_TICK_ONESHOT=y
219CONFIG_NO_HZ=y
220CONFIG_HIGH_RES_TIMERS=y
221CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
222CONFIG_PREEMPT=y
223CONFIG_HZ=100
224CONFIG_AEABI=y
225# CONFIG_OABI_COMPAT is not set
226# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
227CONFIG_SELECT_MEMORY_MODEL=y
228CONFIG_FLATMEM_MANUAL=y
229# CONFIG_DISCONTIGMEM_MANUAL is not set
230# CONFIG_SPARSEMEM_MANUAL is not set
231CONFIG_FLATMEM=y
232CONFIG_FLAT_NODE_MEM_MAP=y
233# CONFIG_SPARSEMEM_STATIC is not set
234# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
235CONFIG_PAGEFLAGS_EXTENDED=y
236CONFIG_SPLIT_PTLOCK_CPUS=4
237# CONFIG_RESOURCES_64BIT is not set
238CONFIG_ZONE_DMA_FLAG=1
239CONFIG_BOUNCE=y
240CONFIG_VIRT_TO_BUS=y
241CONFIG_ALIGNMENT_TRAP=y
242
243#
244# Boot options
245#
246CONFIG_ZBOOT_ROM_TEXT=0x0
247CONFIG_ZBOOT_ROM_BSS=0x0
248CONFIG_CMDLINE="noinitrd console=ttymxc0,115200 root=/dev/mtdblock2 rw ip=off"
249# CONFIG_XIP_KERNEL is not set
250# CONFIG_KEXEC is not set
251
252#
253# Floating point emulation
254#
255
256#
257# At least one emulation must be selected
258#
259CONFIG_VFP=y
260
261#
262# Userspace binary formats
263#
264CONFIG_BINFMT_ELF=y
265# CONFIG_BINFMT_AOUT is not set
266# CONFIG_BINFMT_MISC is not set
267
268#
269# Power management options
270#
271# CONFIG_PM is not set
272CONFIG_ARCH_SUSPEND_POSSIBLE=y
273
274#
275# Networking
276#
277CONFIG_NET=y
278
279#
280# Networking options
281#
282CONFIG_PACKET=y
283# CONFIG_PACKET_MMAP is not set
284CONFIG_UNIX=y
285# CONFIG_NET_KEY is not set
286CONFIG_INET=y
287# CONFIG_IP_MULTICAST is not set
288# CONFIG_IP_ADVANCED_ROUTER is not set
289CONFIG_IP_FIB_HASH=y
290CONFIG_IP_PNP=y
291CONFIG_IP_PNP_DHCP=y
292# CONFIG_IP_PNP_BOOTP is not set
293# CONFIG_IP_PNP_RARP is not set
294# CONFIG_NET_IPIP is not set
295# CONFIG_NET_IPGRE is not set
296# CONFIG_ARPD is not set
297# CONFIG_SYN_COOKIES is not set
298# CONFIG_INET_AH is not set
299# CONFIG_INET_ESP is not set
300# CONFIG_INET_IPCOMP is not set
301# CONFIG_INET_XFRM_TUNNEL is not set
302# CONFIG_INET_TUNNEL is not set
303# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
304# CONFIG_INET_XFRM_MODE_TUNNEL is not set
305# CONFIG_INET_XFRM_MODE_BEET is not set
306# CONFIG_INET_LRO is not set
307# CONFIG_INET_DIAG is not set
308# CONFIG_TCP_CONG_ADVANCED is not set
309CONFIG_TCP_CONG_CUBIC=y
310CONFIG_DEFAULT_TCP_CONG="cubic"
311# CONFIG_TCP_MD5SIG is not set
312# CONFIG_IPV6 is not set
313# CONFIG_NETWORK_SECMARK is not set
314# CONFIG_NETFILTER is not set
315# CONFIG_IP_DCCP is not set
316# CONFIG_IP_SCTP is not set
317# CONFIG_TIPC is not set
318# CONFIG_ATM is not set
319# CONFIG_BRIDGE is not set
320# CONFIG_VLAN_8021Q is not set
321# CONFIG_DECNET is not set
322# CONFIG_LLC2 is not set
323# CONFIG_IPX is not set
324# CONFIG_ATALK is not set
325# CONFIG_X25 is not set
326# CONFIG_LAPB is not set
327# CONFIG_ECONET is not set
328# CONFIG_WAN_ROUTER is not set
329# CONFIG_NET_SCHED is not set
330
331#
332# Network testing
333#
334# CONFIG_NET_PKTGEN is not set
335# CONFIG_HAMRADIO is not set
336# CONFIG_CAN is not set
337# CONFIG_IRDA is not set
338# CONFIG_BT is not set
339# CONFIG_AF_RXRPC is not set
340
341#
342# Wireless
343#
344# CONFIG_CFG80211 is not set
345# CONFIG_WIRELESS_EXT is not set
346# CONFIG_MAC80211 is not set
347# CONFIG_IEEE80211 is not set
348# CONFIG_RFKILL is not set
349# CONFIG_NET_9P is not set
350
351#
352# Device Drivers
353#
354
355#
356# Generic Driver Options
357#
358CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
359CONFIG_STANDALONE=y
360CONFIG_PREVENT_FIRMWARE_BUILD=y
361CONFIG_FW_LOADER=m
362# CONFIG_SYS_HYPERVISOR is not set
363# CONFIG_CONNECTOR is not set
364CONFIG_MTD=y
365# CONFIG_MTD_DEBUG is not set
366# CONFIG_MTD_CONCAT is not set
367CONFIG_MTD_PARTITIONS=y
368# CONFIG_MTD_REDBOOT_PARTS is not set
369CONFIG_MTD_CMDLINE_PARTS=y
370# CONFIG_MTD_AFS_PARTS is not set
371# CONFIG_MTD_AR7_PARTS is not set
372
373#
374# User Modules And Translation Layers
375#
376CONFIG_MTD_CHAR=y
377CONFIG_MTD_BLKDEVS=y
378CONFIG_MTD_BLOCK=y
379# CONFIG_FTL is not set
380# CONFIG_NFTL is not set
381# CONFIG_INFTL is not set
382# CONFIG_RFD_FTL is not set
383# CONFIG_SSFDC is not set
384# CONFIG_MTD_OOPS is not set
385
386#
387# RAM/ROM/Flash chip drivers
388#
389CONFIG_MTD_CFI=y
390# CONFIG_MTD_JEDECPROBE is not set
391CONFIG_MTD_GEN_PROBE=y
392# CONFIG_MTD_CFI_ADV_OPTIONS is not set
393# CONFIG_MTD_CFI_NOSWAP is not set
394# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set
395# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set
396CONFIG_MTD_MAP_BANK_WIDTH_1=y
397CONFIG_MTD_MAP_BANK_WIDTH_2=y
398CONFIG_MTD_MAP_BANK_WIDTH_4=y
399# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
400# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
401# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
402CONFIG_MTD_CFI_I1=y
403CONFIG_MTD_CFI_I2=y
404# CONFIG_MTD_CFI_I4 is not set
405# CONFIG_MTD_CFI_I8 is not set
406# CONFIG_MTD_CFI_INTELEXT is not set
407# CONFIG_MTD_CFI_AMDSTD is not set
408# CONFIG_MTD_CFI_STAA is not set
409# CONFIG_MTD_RAM is not set
410# CONFIG_MTD_ROM is not set
411# CONFIG_MTD_ABSENT is not set
412
413#
414# Mapping drivers for chip access
415#
416# CONFIG_MTD_COMPLEX_MAPPINGS is not set
417CONFIG_MTD_PHYSMAP=y
418CONFIG_MTD_PHYSMAP_START=0x0
419CONFIG_MTD_PHYSMAP_LEN=0
420CONFIG_MTD_PHYSMAP_BANKWIDTH=2
421# CONFIG_MTD_ARM_INTEGRATOR is not set
422# CONFIG_MTD_PLATRAM is not set
423
424#
425# Self-contained MTD device drivers
426#
427# CONFIG_MTD_SLRAM is not set
428# CONFIG_MTD_PHRAM is not set
429# CONFIG_MTD_MTDRAM is not set
430# CONFIG_MTD_BLOCK2MTD is not set
431
432#
433# Disk-On-Chip Device Drivers
434#
435# CONFIG_MTD_DOC2000 is not set
436# CONFIG_MTD_DOC2001 is not set
437# CONFIG_MTD_DOC2001PLUS is not set
438# CONFIG_MTD_NAND is not set
439# CONFIG_MTD_ONENAND is not set
440
441#
442# UBI - Unsorted block images
443#
444# CONFIG_MTD_UBI is not set
445# CONFIG_PARPORT is not set
446# CONFIG_BLK_DEV is not set
447# CONFIG_MISC_DEVICES is not set
448CONFIG_HAVE_IDE=y
449# CONFIG_IDE is not set
450
451#
452# SCSI device support
453#
454# CONFIG_RAID_ATTRS is not set
455# CONFIG_SCSI is not set
456# CONFIG_SCSI_DMA is not set
457# CONFIG_SCSI_NETLINK is not set
458# CONFIG_ATA is not set
459# CONFIG_MD is not set
460CONFIG_NETDEVICES=y
461# CONFIG_NETDEVICES_MULTIQUEUE is not set
462# CONFIG_DUMMY is not set
463# CONFIG_BONDING is not set
464# CONFIG_MACVLAN is not set
465# CONFIG_EQUALIZER is not set
466# CONFIG_TUN is not set
467# CONFIG_VETH is not set
468CONFIG_PHYLIB=y
469
470#
471# MII PHY device drivers
472#
473# CONFIG_MARVELL_PHY is not set
474# CONFIG_DAVICOM_PHY is not set
475# CONFIG_QSEMI_PHY is not set
476# CONFIG_LXT_PHY is not set
477# CONFIG_CICADA_PHY is not set
478# CONFIG_VITESSE_PHY is not set
479CONFIG_SMSC_PHY=y
480# CONFIG_BROADCOM_PHY is not set
481# CONFIG_ICPLUS_PHY is not set
482# CONFIG_REALTEK_PHY is not set
483# CONFIG_NATIONAL_PHY is not set
484# CONFIG_STE10XP is not set
485# CONFIG_LSI_ET1011C_PHY is not set
486# CONFIG_FIXED_PHY is not set
487# CONFIG_MDIO_BITBANG is not set
488CONFIG_NET_ETHERNET=y
489CONFIG_MII=y
490# CONFIG_AX88796 is not set
491CONFIG_SMC91X=y
492# CONFIG_DM9000 is not set
493# CONFIG_SMC911X is not set
494CONFIG_SMSC911X=y
495# CONFIG_IBM_NEW_EMAC_ZMII is not set
496# CONFIG_IBM_NEW_EMAC_RGMII is not set
497# CONFIG_IBM_NEW_EMAC_TAH is not set
498# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
499# CONFIG_B44 is not set
500# CONFIG_NETDEV_1000 is not set
501# CONFIG_NETDEV_10000 is not set
502
503#
504# Wireless LAN
505#
506# CONFIG_WLAN_PRE80211 is not set
507# CONFIG_WLAN_80211 is not set
508# CONFIG_IWLWIFI_LEDS is not set
509# CONFIG_WAN is not set
510# CONFIG_PPP is not set
511# CONFIG_SLIP is not set
512# CONFIG_NETCONSOLE is not set
513# CONFIG_NETPOLL is not set
514# CONFIG_NET_POLL_CONTROLLER is not set
515# CONFIG_ISDN is not set
516
517#
518# Input device support
519#
520# CONFIG_INPUT is not set
521
522#
523# Hardware I/O ports
524#
525# CONFIG_SERIO is not set
526# CONFIG_GAMEPORT is not set
527
528#
529# Character devices
530#
531# CONFIG_VT is not set
532CONFIG_DEVKMEM=y
533# CONFIG_SERIAL_NONSTANDARD is not set
534
535#
536# Serial drivers
537#
538# CONFIG_SERIAL_8250 is not set
539
540#
541# Non-8250 serial port support
542#
543CONFIG_SERIAL_IMX=y
544CONFIG_SERIAL_IMX_CONSOLE=y
545CONFIG_SERIAL_CORE=y
546CONFIG_SERIAL_CORE_CONSOLE=y
547CONFIG_UNIX98_PTYS=y
548# CONFIG_LEGACY_PTYS is not set
549# CONFIG_IPMI_HANDLER is not set
550# CONFIG_HW_RANDOM is not set
551# CONFIG_NVRAM is not set
552# CONFIG_R3964 is not set
553# CONFIG_RAW_DRIVER is not set
554# CONFIG_TCG_TPM is not set
555# CONFIG_I2C is not set
556# CONFIG_SPI is not set
557CONFIG_HAVE_GPIO_LIB=y
558
559#
560# GPIO Support
561#
562
563#
564# I2C GPIO expanders:
565#
566
567#
568# SPI GPIO expanders:
569#
570# CONFIG_W1 is not set
571# CONFIG_POWER_SUPPLY is not set
572# CONFIG_HWMON is not set
573# CONFIG_WATCHDOG is not set
574
575#
576# Sonics Silicon Backplane
577#
578CONFIG_SSB_POSSIBLE=y
579# CONFIG_SSB is not set
580
581#
582# Multifunction device drivers
583#
584# CONFIG_MFD_SM501 is not set
585# CONFIG_MFD_ASIC3 is not set
586# CONFIG_HTC_EGPIO is not set
587# CONFIG_HTC_PASIC3 is not set
588
589#
590# Multimedia devices
591#
592
593#
594# Multimedia core support
595#
596# CONFIG_VIDEO_DEV is not set
597# CONFIG_DVB_CORE is not set
598# CONFIG_VIDEO_MEDIA is not set
599
600#
601# Multimedia drivers
602#
603# CONFIG_DAB is not set
604
605#
606# Graphics support
607#
608# CONFIG_VGASTATE is not set
609# CONFIG_VIDEO_OUTPUT_CONTROL is not set
610# CONFIG_FB is not set
611# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
612
613#
614# Display device support
615#
616# CONFIG_DISPLAY_SUPPORT is not set
617
618#
619# Sound
620#
621# CONFIG_SOUND is not set
622# CONFIG_USB_SUPPORT is not set
623# CONFIG_MMC is not set
624# CONFIG_NEW_LEDS is not set
625CONFIG_RTC_LIB=y
626# CONFIG_RTC_CLASS is not set
627# CONFIG_UIO is not set
628
629#
630# File systems
631#
632# CONFIG_EXT2_FS is not set
633# CONFIG_EXT3_FS is not set
634# CONFIG_EXT4DEV_FS is not set
635# CONFIG_REISERFS_FS is not set
636# CONFIG_JFS_FS is not set
637# CONFIG_FS_POSIX_ACL is not set
638# CONFIG_XFS_FS is not set
639# CONFIG_OCFS2_FS is not set
640# CONFIG_DNOTIFY is not set
641CONFIG_INOTIFY=y
642CONFIG_INOTIFY_USER=y
643# CONFIG_QUOTA is not set
644# CONFIG_AUTOFS_FS is not set
645# CONFIG_AUTOFS4_FS is not set
646# CONFIG_FUSE_FS is not set
647
648#
649# CD-ROM/DVD Filesystems
650#
651# CONFIG_ISO9660_FS is not set
652# CONFIG_UDF_FS is not set
653
654#
655# DOS/FAT/NT Filesystems
656#
657# CONFIG_MSDOS_FS is not set
658# CONFIG_VFAT_FS is not set
659# CONFIG_NTFS_FS is not set
660
661#
662# Pseudo filesystems
663#
664CONFIG_PROC_FS=y
665CONFIG_PROC_SYSCTL=y
666CONFIG_SYSFS=y
667CONFIG_TMPFS=y
668# CONFIG_TMPFS_POSIX_ACL is not set
669# CONFIG_HUGETLB_PAGE is not set
670# CONFIG_CONFIGFS_FS is not set
671
672#
673# Miscellaneous filesystems
674#
675# CONFIG_ADFS_FS is not set
676# CONFIG_AFFS_FS is not set
677# CONFIG_HFS_FS is not set
678# CONFIG_HFSPLUS_FS is not set
679# CONFIG_BEFS_FS is not set
680# CONFIG_BFS_FS is not set
681# CONFIG_EFS_FS is not set
682CONFIG_JFFS2_FS=y
683CONFIG_JFFS2_FS_DEBUG=0
684CONFIG_JFFS2_FS_WRITEBUFFER=y
685# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
686# CONFIG_JFFS2_SUMMARY is not set
687# CONFIG_JFFS2_FS_XATTR is not set
688# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
689CONFIG_JFFS2_ZLIB=y
690# CONFIG_JFFS2_LZO is not set
691CONFIG_JFFS2_RTIME=y
692# CONFIG_JFFS2_RUBIN is not set
693# CONFIG_CRAMFS is not set
694# CONFIG_VXFS_FS is not set
695# CONFIG_MINIX_FS is not set
696# CONFIG_HPFS_FS is not set
697# CONFIG_QNX4FS_FS is not set
698# CONFIG_ROMFS_FS is not set
699# CONFIG_SYSV_FS is not set
700# CONFIG_UFS_FS is not set
701CONFIG_NETWORK_FILESYSTEMS=y
702CONFIG_NFS_FS=y
703# CONFIG_NFS_V3 is not set
704# CONFIG_NFS_V4 is not set
705# CONFIG_NFSD is not set
706CONFIG_ROOT_NFS=y
707CONFIG_LOCKD=y
708CONFIG_NFS_COMMON=y
709CONFIG_SUNRPC=y
710# CONFIG_SUNRPC_BIND34 is not set
711# CONFIG_RPCSEC_GSS_KRB5 is not set
712# CONFIG_RPCSEC_GSS_SPKM3 is not set
713# CONFIG_SMB_FS is not set
714# CONFIG_CIFS is not set
715# CONFIG_NCP_FS is not set
716# CONFIG_CODA_FS is not set
717# CONFIG_AFS_FS is not set
718
719#
720# Partition Types
721#
722# CONFIG_PARTITION_ADVANCED is not set
723CONFIG_MSDOS_PARTITION=y
724# CONFIG_NLS is not set
725# CONFIG_DLM is not set
726
727#
728# Kernel hacking
729#
730# CONFIG_PRINTK_TIME is not set
731# CONFIG_ENABLE_WARN_DEPRECATED is not set
732# CONFIG_ENABLE_MUST_CHECK is not set
733CONFIG_FRAME_WARN=1024
734# CONFIG_MAGIC_SYSRQ is not set
735# CONFIG_UNUSED_SYMBOLS is not set
736# CONFIG_DEBUG_FS is not set
737# CONFIG_HEADERS_CHECK is not set
738# CONFIG_DEBUG_KERNEL is not set
739# CONFIG_DEBUG_BUGVERBOSE is not set
740CONFIG_FRAME_POINTER=y
741# CONFIG_SAMPLES is not set
742# CONFIG_DEBUG_USER is not set
743
744#
745# Security options
746#
747# CONFIG_KEYS is not set
748# CONFIG_SECURITY is not set
749# CONFIG_SECURITY_FILE_CAPABILITIES is not set
750# CONFIG_CRYPTO is not set
751
752#
753# Library routines
754#
755CONFIG_BITREVERSE=y
756# CONFIG_GENERIC_FIND_FIRST_BIT is not set
757# CONFIG_GENERIC_FIND_NEXT_BIT is not set
758# CONFIG_CRC_CCITT is not set
759# CONFIG_CRC16 is not set
760# CONFIG_CRC_ITU_T is not set
761CONFIG_CRC32=y
762# CONFIG_CRC7 is not set
763# CONFIG_LIBCRC32C is not set
764CONFIG_ZLIB_INFLATE=y
765CONFIG_ZLIB_DEFLATE=y
766CONFIG_PLIST=y
767CONFIG_HAS_IOMEM=y
768CONFIG_HAS_IOPORT=y
769CONFIG_HAS_DMA=y
diff --git a/arch/arm/configs/s3c2410_defconfig b/arch/arm/configs/s3c2410_defconfig
index 65a583ee5df8..2d58b8fe59be 100644
--- a/arch/arm/configs/s3c2410_defconfig
+++ b/arch/arm/configs/s3c2410_defconfig
@@ -1,9 +1,9 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.26-rc8 3# Linux kernel version: 2.6.30-rc2
4# Mon Jul 7 16:59:23 2008
5# 4#
6CONFIG_ARM=y 5CONFIG_ARM=y
6CONFIG_HAVE_PWM=y
7CONFIG_SYS_SUPPORTS_APM_EMULATION=y 7CONFIG_SYS_SUPPORTS_APM_EMULATION=y
8CONFIG_GENERIC_GPIO=y 8CONFIG_GENERIC_GPIO=y
9# CONFIG_GENERIC_TIME is not set 9# CONFIG_GENERIC_TIME is not set
@@ -12,6 +12,7 @@ CONFIG_MMU=y
12CONFIG_NO_IOPORT=y 12CONFIG_NO_IOPORT=y
13CONFIG_GENERIC_HARDIRQS=y 13CONFIG_GENERIC_HARDIRQS=y
14CONFIG_STACKTRACE_SUPPORT=y 14CONFIG_STACKTRACE_SUPPORT=y
15CONFIG_HAVE_LATENCYTOP_SUPPORT=y
15CONFIG_LOCKDEP_SUPPORT=y 16CONFIG_LOCKDEP_SUPPORT=y
16CONFIG_TRACE_IRQFLAGS_SUPPORT=y 17CONFIG_TRACE_IRQFLAGS_SUPPORT=y
17CONFIG_HARDIRQS_SW_RESEND=y 18CONFIG_HARDIRQS_SW_RESEND=y
@@ -21,8 +22,7 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y
21# CONFIG_ARCH_HAS_ILOG2_U64 is not set 22# CONFIG_ARCH_HAS_ILOG2_U64 is not set
22CONFIG_GENERIC_HWEIGHT=y 23CONFIG_GENERIC_HWEIGHT=y
23CONFIG_GENERIC_CALIBRATE_DELAY=y 24CONFIG_GENERIC_CALIBRATE_DELAY=y
24CONFIG_ARCH_SUPPORTS_AOUT=y 25CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
25CONFIG_ZONE_DMA=y
26CONFIG_VECTORS_BASE=0xffff0000 26CONFIG_VECTORS_BASE=0xffff0000
27CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 27CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
28 28
@@ -41,11 +41,20 @@ CONFIG_SYSVIPC_SYSCTL=y
41# CONFIG_BSD_PROCESS_ACCT is not set 41# CONFIG_BSD_PROCESS_ACCT is not set
42# CONFIG_TASKSTATS is not set 42# CONFIG_TASKSTATS is not set
43# CONFIG_AUDIT is not set 43# CONFIG_AUDIT is not set
44
45#
46# RCU Subsystem
47#
48CONFIG_CLASSIC_RCU=y
49# CONFIG_TREE_RCU is not set
50# CONFIG_PREEMPT_RCU is not set
51# CONFIG_TREE_RCU_TRACE is not set
52# CONFIG_PREEMPT_RCU_TRACE is not set
44CONFIG_IKCONFIG=m 53CONFIG_IKCONFIG=m
45CONFIG_IKCONFIG_PROC=y 54CONFIG_IKCONFIG_PROC=y
46CONFIG_LOG_BUF_SHIFT=16 55CONFIG_LOG_BUF_SHIFT=16
47# CONFIG_CGROUPS is not set
48# CONFIG_GROUP_SCHED is not set 56# CONFIG_GROUP_SCHED is not set
57# CONFIG_CGROUPS is not set
49CONFIG_SYSFS_DEPRECATED=y 58CONFIG_SYSFS_DEPRECATED=y
50CONFIG_SYSFS_DEPRECATED_V2=y 59CONFIG_SYSFS_DEPRECATED_V2=y
51# CONFIG_RELAY is not set 60# CONFIG_RELAY is not set
@@ -54,31 +63,36 @@ CONFIG_NAMESPACES=y
54# CONFIG_IPC_NS is not set 63# CONFIG_IPC_NS is not set
55# CONFIG_USER_NS is not set 64# CONFIG_USER_NS is not set
56# CONFIG_PID_NS is not set 65# CONFIG_PID_NS is not set
66# CONFIG_NET_NS is not set
57CONFIG_BLK_DEV_INITRD=y 67CONFIG_BLK_DEV_INITRD=y
58CONFIG_INITRAMFS_SOURCE="" 68CONFIG_INITRAMFS_SOURCE=""
69CONFIG_RD_GZIP=y
70CONFIG_RD_BZIP2=y
71CONFIG_RD_LZMA=y
59CONFIG_CC_OPTIMIZE_FOR_SIZE=y 72CONFIG_CC_OPTIMIZE_FOR_SIZE=y
60CONFIG_SYSCTL=y 73CONFIG_SYSCTL=y
74CONFIG_ANON_INODES=y
61# CONFIG_EMBEDDED is not set 75# CONFIG_EMBEDDED is not set
62CONFIG_UID16=y 76CONFIG_UID16=y
63CONFIG_SYSCTL_SYSCALL=y 77CONFIG_SYSCTL_SYSCALL=y
64CONFIG_SYSCTL_SYSCALL_CHECK=y
65CONFIG_KALLSYMS=y 78CONFIG_KALLSYMS=y
66# CONFIG_KALLSYMS_ALL is not set 79# CONFIG_KALLSYMS_ALL is not set
67# CONFIG_KALLSYMS_EXTRA_PASS is not set 80# CONFIG_KALLSYMS_EXTRA_PASS is not set
81# CONFIG_STRIP_ASM_SYMS is not set
68CONFIG_HOTPLUG=y 82CONFIG_HOTPLUG=y
69CONFIG_PRINTK=y 83CONFIG_PRINTK=y
70CONFIG_BUG=y 84CONFIG_BUG=y
71CONFIG_ELF_CORE=y 85CONFIG_ELF_CORE=y
72CONFIG_COMPAT_BRK=y
73CONFIG_BASE_FULL=y 86CONFIG_BASE_FULL=y
74CONFIG_FUTEX=y 87CONFIG_FUTEX=y
75CONFIG_ANON_INODES=y
76CONFIG_EPOLL=y 88CONFIG_EPOLL=y
77CONFIG_SIGNALFD=y 89CONFIG_SIGNALFD=y
78CONFIG_TIMERFD=y 90CONFIG_TIMERFD=y
79CONFIG_EVENTFD=y 91CONFIG_EVENTFD=y
80CONFIG_SHMEM=y 92CONFIG_SHMEM=y
93CONFIG_AIO=y
81CONFIG_VM_EVENT_COUNTERS=y 94CONFIG_VM_EVENT_COUNTERS=y
95CONFIG_COMPAT_BRK=y
82CONFIG_SLAB=y 96CONFIG_SLAB=y
83# CONFIG_SLUB is not set 97# CONFIG_SLUB is not set
84# CONFIG_SLOB is not set 98# CONFIG_SLOB is not set
@@ -88,11 +102,11 @@ CONFIG_HAVE_OPROFILE=y
88# CONFIG_KPROBES is not set 102# CONFIG_KPROBES is not set
89CONFIG_HAVE_KPROBES=y 103CONFIG_HAVE_KPROBES=y
90CONFIG_HAVE_KRETPROBES=y 104CONFIG_HAVE_KRETPROBES=y
91# CONFIG_HAVE_DMA_ATTRS is not set 105CONFIG_HAVE_CLK=y
92CONFIG_PROC_PAGE_MONITOR=y 106# CONFIG_SLOW_WORK is not set
107CONFIG_HAVE_GENERIC_DMA_COHERENT=y
93CONFIG_SLABINFO=y 108CONFIG_SLABINFO=y
94CONFIG_RT_MUTEXES=y 109CONFIG_RT_MUTEXES=y
95# CONFIG_TINY_SHMEM is not set
96CONFIG_BASE_SMALL=0 110CONFIG_BASE_SMALL=0
97CONFIG_MODULES=y 111CONFIG_MODULES=y
98# CONFIG_MODULE_FORCE_LOAD is not set 112# CONFIG_MODULE_FORCE_LOAD is not set
@@ -100,12 +114,10 @@ CONFIG_MODULE_UNLOAD=y
100# CONFIG_MODULE_FORCE_UNLOAD is not set 114# CONFIG_MODULE_FORCE_UNLOAD is not set
101# CONFIG_MODVERSIONS is not set 115# CONFIG_MODVERSIONS is not set
102# CONFIG_MODULE_SRCVERSION_ALL is not set 116# CONFIG_MODULE_SRCVERSION_ALL is not set
103CONFIG_KMOD=y
104CONFIG_BLOCK=y 117CONFIG_BLOCK=y
105# CONFIG_LBD is not set 118# CONFIG_LBD is not set
106# CONFIG_BLK_DEV_IO_TRACE is not set
107# CONFIG_LSF is not set
108# CONFIG_BLK_DEV_BSG is not set 119# CONFIG_BLK_DEV_BSG is not set
120# CONFIG_BLK_DEV_INTEGRITY is not set
109 121
110# 122#
111# IO Schedulers 123# IO Schedulers
@@ -119,7 +131,7 @@ CONFIG_DEFAULT_AS=y
119# CONFIG_DEFAULT_CFQ is not set 131# CONFIG_DEFAULT_CFQ is not set
120# CONFIG_DEFAULT_NOOP is not set 132# CONFIG_DEFAULT_NOOP is not set
121CONFIG_DEFAULT_IOSCHED="anticipatory" 133CONFIG_DEFAULT_IOSCHED="anticipatory"
122CONFIG_CLASSIC_RCU=y 134CONFIG_FREEZER=y
123 135
124# 136#
125# System Type 137# System Type
@@ -129,11 +141,10 @@ CONFIG_CLASSIC_RCU=y
129# CONFIG_ARCH_REALVIEW is not set 141# CONFIG_ARCH_REALVIEW is not set
130# CONFIG_ARCH_VERSATILE is not set 142# CONFIG_ARCH_VERSATILE is not set
131# CONFIG_ARCH_AT91 is not set 143# CONFIG_ARCH_AT91 is not set
132# CONFIG_ARCH_CLPS7500 is not set
133# CONFIG_ARCH_CLPS711X is not set 144# CONFIG_ARCH_CLPS711X is not set
134# CONFIG_ARCH_CO285 is not set
135# CONFIG_ARCH_EBSA110 is not set 145# CONFIG_ARCH_EBSA110 is not set
136# CONFIG_ARCH_EP93XX is not set 146# CONFIG_ARCH_EP93XX is not set
147# CONFIG_ARCH_GEMINI is not set
137# CONFIG_ARCH_FOOTBRIDGE is not set 148# CONFIG_ARCH_FOOTBRIDGE is not set
138# CONFIG_ARCH_NETX is not set 149# CONFIG_ARCH_NETX is not set
139# CONFIG_ARCH_H720X is not set 150# CONFIG_ARCH_H720X is not set
@@ -145,26 +156,38 @@ CONFIG_CLASSIC_RCU=y
145# CONFIG_ARCH_IXP2000 is not set 156# CONFIG_ARCH_IXP2000 is not set
146# CONFIG_ARCH_IXP4XX is not set 157# CONFIG_ARCH_IXP4XX is not set
147# CONFIG_ARCH_L7200 is not set 158# CONFIG_ARCH_L7200 is not set
159# CONFIG_ARCH_KIRKWOOD is not set
148# CONFIG_ARCH_KS8695 is not set 160# CONFIG_ARCH_KS8695 is not set
149# CONFIG_ARCH_NS9XXX is not set 161# CONFIG_ARCH_NS9XXX is not set
162# CONFIG_ARCH_LOKI is not set
163# CONFIG_ARCH_MV78XX0 is not set
150# CONFIG_ARCH_MXC is not set 164# CONFIG_ARCH_MXC is not set
151# CONFIG_ARCH_ORION5X is not set 165# CONFIG_ARCH_ORION5X is not set
152# CONFIG_ARCH_PNX4008 is not set 166# CONFIG_ARCH_PNX4008 is not set
153# CONFIG_ARCH_PXA is not set 167# CONFIG_ARCH_PXA is not set
168# CONFIG_ARCH_MMP is not set
154# CONFIG_ARCH_RPC is not set 169# CONFIG_ARCH_RPC is not set
155# CONFIG_ARCH_SA1100 is not set 170# CONFIG_ARCH_SA1100 is not set
156CONFIG_ARCH_S3C2410=y 171CONFIG_ARCH_S3C2410=y
172# CONFIG_ARCH_S3C64XX is not set
157# CONFIG_ARCH_SHARK is not set 173# CONFIG_ARCH_SHARK is not set
158# CONFIG_ARCH_LH7A40X is not set 174# CONFIG_ARCH_LH7A40X is not set
159# CONFIG_ARCH_DAVINCI is not set 175# CONFIG_ARCH_DAVINCI is not set
160# CONFIG_ARCH_OMAP is not set 176# CONFIG_ARCH_OMAP is not set
161# CONFIG_ARCH_MSM7X00A is not set 177# CONFIG_ARCH_MSM is not set
178# CONFIG_ARCH_W90X900 is not set
162CONFIG_PLAT_S3C24XX=y 179CONFIG_PLAT_S3C24XX=y
180CONFIG_S3C2410_CLOCK=y
181CONFIG_S3C24XX_DCLK=y
163CONFIG_CPU_S3C244X=y 182CONFIG_CPU_S3C244X=y
164# CONFIG_S3C24XX_PWM is not set 183CONFIG_S3C24XX_PWM=y
184CONFIG_S3C24XX_GPIO_EXTRA=128
185CONFIG_S3C24XX_GPIO_EXTRA64=y
186CONFIG_S3C24XX_GPIO_EXTRA128=y
165CONFIG_PM_SIMTEC=y 187CONFIG_PM_SIMTEC=y
166CONFIG_S3C2410_DMA=y 188CONFIG_S3C2410_DMA=y
167# CONFIG_S3C2410_DMA_DEBUG is not set 189# CONFIG_S3C2410_DMA_DEBUG is not set
190CONFIG_S3C24XX_ADC=y
168CONFIG_MACH_SMDK=y 191CONFIG_MACH_SMDK=y
169CONFIG_PLAT_S3C=y 192CONFIG_PLAT_S3C=y
170CONFIG_CPU_LLSERIAL_S3C2410=y 193CONFIG_CPU_LLSERIAL_S3C2410=y
@@ -174,7 +197,8 @@ CONFIG_CPU_LLSERIAL_S3C2440=y
174# Boot options 197# Boot options
175# 198#
176# CONFIG_S3C_BOOT_WATCHDOG is not set 199# CONFIG_S3C_BOOT_WATCHDOG is not set
177# CONFIG_S3C_BOOT_ERROR_RESET is not set 200CONFIG_S3C_BOOT_ERROR_RESET=y
201CONFIG_S3C_BOOT_UART_FORCE_FIFO=y
178 202
179# 203#
180# Power management 204# Power management
@@ -182,6 +206,8 @@ CONFIG_CPU_LLSERIAL_S3C2440=y
182# CONFIG_S3C2410_PM_DEBUG is not set 206# CONFIG_S3C2410_PM_DEBUG is not set
183# CONFIG_S3C2410_PM_CHECK is not set 207# CONFIG_S3C2410_PM_CHECK is not set
184CONFIG_S3C_LOWLEVEL_UART_PORT=0 208CONFIG_S3C_LOWLEVEL_UART_PORT=0
209CONFIG_S3C_GPIO_SPACE=0
210CONFIG_S3C_DEV_HSMMC=y
185 211
186# 212#
187# S3C2400 Machines 213# S3C2400 Machines
@@ -190,7 +216,6 @@ CONFIG_CPU_S3C2410=y
190CONFIG_CPU_S3C2410_DMA=y 216CONFIG_CPU_S3C2410_DMA=y
191CONFIG_S3C2410_PM=y 217CONFIG_S3C2410_PM=y
192CONFIG_S3C2410_GPIO=y 218CONFIG_S3C2410_GPIO=y
193CONFIG_S3C2410_CLOCK=y
194CONFIG_SIMTEC_NOR=y 219CONFIG_SIMTEC_NOR=y
195CONFIG_MACH_BAST_IDE=y 220CONFIG_MACH_BAST_IDE=y
196 221
@@ -205,7 +230,7 @@ CONFIG_ARCH_BAST=y
205CONFIG_MACH_OTOM=y 230CONFIG_MACH_OTOM=y
206CONFIG_MACH_AML_M5900=y 231CONFIG_MACH_AML_M5900=y
207CONFIG_BAST_PC104_IRQ=y 232CONFIG_BAST_PC104_IRQ=y
208# CONFIG_MACH_TCT_HAMMER is not set 233CONFIG_MACH_TCT_HAMMER=y
209CONFIG_MACH_VR1000=y 234CONFIG_MACH_VR1000=y
210CONFIG_MACH_QT2410=y 235CONFIG_MACH_QT2410=y
211CONFIG_CPU_S3C2412=y 236CONFIG_CPU_S3C2412=y
@@ -215,10 +240,11 @@ CONFIG_S3C2412_PM=y
215# 240#
216# S3C2412 Machines 241# S3C2412 Machines
217# 242#
218# CONFIG_MACH_JIVE is not set 243CONFIG_MACH_JIVE=y
244# CONFIG_MACH_JIVE_SHOW_BOOTLOADER is not set
219CONFIG_MACH_SMDK2413=y 245CONFIG_MACH_SMDK2413=y
220CONFIG_MACH_S3C2413=y 246CONFIG_MACH_S3C2413=y
221# CONFIG_MACH_SMDK2412 is not set 247CONFIG_MACH_SMDK2412=y
222CONFIG_MACH_VSTMS=y 248CONFIG_MACH_VSTMS=y
223CONFIG_CPU_S3C2440=y 249CONFIG_CPU_S3C2440=y
224CONFIG_S3C2440_DMA=y 250CONFIG_S3C2440_DMA=y
@@ -232,7 +258,7 @@ CONFIG_MACH_RX3715=y
232CONFIG_ARCH_S3C2440=y 258CONFIG_ARCH_S3C2440=y
233CONFIG_MACH_NEXCODER_2440=y 259CONFIG_MACH_NEXCODER_2440=y
234CONFIG_SMDK2440_CPU2440=y 260CONFIG_SMDK2440_CPU2440=y
235# CONFIG_MACH_AT2440EVB is not set 261CONFIG_MACH_AT2440EVB=y
236CONFIG_CPU_S3C2442=y 262CONFIG_CPU_S3C2442=y
237 263
238# 264#
@@ -286,25 +312,31 @@ CONFIG_ISA=y
286# 312#
287# Kernel Features 313# Kernel Features
288# 314#
289# CONFIG_TICK_ONESHOT is not set 315CONFIG_VMSPLIT_3G=y
316# CONFIG_VMSPLIT_2G is not set
317# CONFIG_VMSPLIT_1G is not set
318CONFIG_PAGE_OFFSET=0xC0000000
290# CONFIG_PREEMPT is not set 319# CONFIG_PREEMPT is not set
291CONFIG_HZ=200 320CONFIG_HZ=200
292# CONFIG_AEABI is not set 321# CONFIG_AEABI is not set
293# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set 322CONFIG_ARCH_FLATMEM_HAS_HOLES=y
323# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
324# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
325# CONFIG_HIGHMEM is not set
294CONFIG_SELECT_MEMORY_MODEL=y 326CONFIG_SELECT_MEMORY_MODEL=y
295CONFIG_FLATMEM_MANUAL=y 327CONFIG_FLATMEM_MANUAL=y
296# CONFIG_DISCONTIGMEM_MANUAL is not set 328# CONFIG_DISCONTIGMEM_MANUAL is not set
297# CONFIG_SPARSEMEM_MANUAL is not set 329# CONFIG_SPARSEMEM_MANUAL is not set
298CONFIG_FLATMEM=y 330CONFIG_FLATMEM=y
299CONFIG_FLAT_NODE_MEM_MAP=y 331CONFIG_FLAT_NODE_MEM_MAP=y
300# CONFIG_SPARSEMEM_STATIC is not set
301# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
302CONFIG_PAGEFLAGS_EXTENDED=y 332CONFIG_PAGEFLAGS_EXTENDED=y
303CONFIG_SPLIT_PTLOCK_CPUS=4096 333CONFIG_SPLIT_PTLOCK_CPUS=4096
304# CONFIG_RESOURCES_64BIT is not set 334# CONFIG_PHYS_ADDR_T_64BIT is not set
305CONFIG_ZONE_DMA_FLAG=1 335CONFIG_ZONE_DMA_FLAG=0
306CONFIG_BOUNCE=y
307CONFIG_VIRT_TO_BUS=y 336CONFIG_VIRT_TO_BUS=y
337CONFIG_UNEVICTABLE_LRU=y
338CONFIG_HAVE_MLOCK=y
339CONFIG_HAVE_MLOCKED_PAGE_BIT=y
308CONFIG_ALIGNMENT_TRAP=y 340CONFIG_ALIGNMENT_TRAP=y
309 341
310# 342#
@@ -317,6 +349,11 @@ CONFIG_CMDLINE="root=/dev/hda1 ro init=/bin/bash console=ttySAC0"
317# CONFIG_KEXEC is not set 349# CONFIG_KEXEC is not set
318 350
319# 351#
352# CPU Power Management
353#
354# CONFIG_CPU_IDLE is not set
355
356#
320# Floating point emulation 357# Floating point emulation
321# 358#
322 359
@@ -332,6 +369,8 @@ CONFIG_FPE_NWFPE_XP=y
332# Userspace binary formats 369# Userspace binary formats
333# 370#
334CONFIG_BINFMT_ELF=y 371CONFIG_BINFMT_ELF=y
372# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
373CONFIG_HAVE_AOUT=y
335CONFIG_BINFMT_AOUT=y 374CONFIG_BINFMT_AOUT=y
336# CONFIG_BINFMT_MISC is not set 375# CONFIG_BINFMT_MISC is not set
337# CONFIG_ARTHUR is not set 376# CONFIG_ARTHUR is not set
@@ -346,10 +385,6 @@ CONFIG_SUSPEND=y
346CONFIG_SUSPEND_FREEZER=y 385CONFIG_SUSPEND_FREEZER=y
347CONFIG_APM_EMULATION=m 386CONFIG_APM_EMULATION=m
348CONFIG_ARCH_SUSPEND_POSSIBLE=y 387CONFIG_ARCH_SUSPEND_POSSIBLE=y
349
350#
351# Networking
352#
353CONFIG_NET=y 388CONFIG_NET=y
354 389
355# 390#
@@ -359,11 +394,13 @@ CONFIG_PACKET=y
359# CONFIG_PACKET_MMAP is not set 394# CONFIG_PACKET_MMAP is not set
360CONFIG_UNIX=y 395CONFIG_UNIX=y
361CONFIG_XFRM=y 396CONFIG_XFRM=y
362# CONFIG_XFRM_USER is not set 397CONFIG_XFRM_USER=m
363# CONFIG_XFRM_SUB_POLICY is not set 398# CONFIG_XFRM_SUB_POLICY is not set
364# CONFIG_XFRM_MIGRATE is not set 399# CONFIG_XFRM_MIGRATE is not set
365# CONFIG_XFRM_STATISTICS is not set 400# CONFIG_XFRM_STATISTICS is not set
366# CONFIG_NET_KEY is not set 401CONFIG_XFRM_IPCOMP=m
402CONFIG_NET_KEY=m
403# CONFIG_NET_KEY_MIGRATE is not set
367CONFIG_INET=y 404CONFIG_INET=y
368CONFIG_IP_MULTICAST=y 405CONFIG_IP_MULTICAST=y
369# CONFIG_IP_ADVANCED_ROUTER is not set 406# CONFIG_IP_ADVANCED_ROUTER is not set
@@ -372,15 +409,16 @@ CONFIG_IP_PNP=y
372CONFIG_IP_PNP_DHCP=y 409CONFIG_IP_PNP_DHCP=y
373CONFIG_IP_PNP_BOOTP=y 410CONFIG_IP_PNP_BOOTP=y
374# CONFIG_IP_PNP_RARP is not set 411# CONFIG_IP_PNP_RARP is not set
375# CONFIG_NET_IPIP is not set 412CONFIG_NET_IPIP=m
376# CONFIG_NET_IPGRE is not set 413CONFIG_NET_IPGRE=m
414# CONFIG_NET_IPGRE_BROADCAST is not set
377# CONFIG_IP_MROUTE is not set 415# CONFIG_IP_MROUTE is not set
378# CONFIG_ARPD is not set 416# CONFIG_ARPD is not set
379# CONFIG_SYN_COOKIES is not set 417# CONFIG_SYN_COOKIES is not set
380# CONFIG_INET_AH is not set 418CONFIG_INET_AH=m
381# CONFIG_INET_ESP is not set 419CONFIG_INET_ESP=m
382# CONFIG_INET_IPCOMP is not set 420CONFIG_INET_IPCOMP=m
383# CONFIG_INET_XFRM_TUNNEL is not set 421CONFIG_INET_XFRM_TUNNEL=m
384CONFIG_INET_TUNNEL=m 422CONFIG_INET_TUNNEL=m
385CONFIG_INET_XFRM_MODE_TRANSPORT=y 423CONFIG_INET_XFRM_MODE_TRANSPORT=y
386CONFIG_INET_XFRM_MODE_TUNNEL=y 424CONFIG_INET_XFRM_MODE_TUNNEL=y
@@ -388,8 +426,25 @@ CONFIG_INET_XFRM_MODE_BEET=y
388# CONFIG_INET_LRO is not set 426# CONFIG_INET_LRO is not set
389CONFIG_INET_DIAG=y 427CONFIG_INET_DIAG=y
390CONFIG_INET_TCP_DIAG=y 428CONFIG_INET_TCP_DIAG=y
391# CONFIG_TCP_CONG_ADVANCED is not set 429CONFIG_TCP_CONG_ADVANCED=y
430CONFIG_TCP_CONG_BIC=m
392CONFIG_TCP_CONG_CUBIC=y 431CONFIG_TCP_CONG_CUBIC=y
432CONFIG_TCP_CONG_WESTWOOD=m
433CONFIG_TCP_CONG_HTCP=m
434CONFIG_TCP_CONG_HSTCP=m
435CONFIG_TCP_CONG_HYBLA=m
436CONFIG_TCP_CONG_VEGAS=m
437CONFIG_TCP_CONG_SCALABLE=m
438CONFIG_TCP_CONG_LP=m
439CONFIG_TCP_CONG_VENO=m
440CONFIG_TCP_CONG_YEAH=m
441CONFIG_TCP_CONG_ILLINOIS=m
442# CONFIG_DEFAULT_BIC is not set
443CONFIG_DEFAULT_CUBIC=y
444# CONFIG_DEFAULT_HTCP is not set
445# CONFIG_DEFAULT_VEGAS is not set
446# CONFIG_DEFAULT_WESTWOOD is not set
447# CONFIG_DEFAULT_RENO is not set
393CONFIG_DEFAULT_TCP_CONG="cubic" 448CONFIG_DEFAULT_TCP_CONG="cubic"
394# CONFIG_TCP_MD5SIG is not set 449# CONFIG_TCP_MD5SIG is not set
395CONFIG_IPV6=m 450CONFIG_IPV6=m
@@ -413,12 +468,181 @@ CONFIG_IPV6_TUNNEL=m
413# CONFIG_IPV6_MULTIPLE_TABLES is not set 468# CONFIG_IPV6_MULTIPLE_TABLES is not set
414# CONFIG_IPV6_MROUTE is not set 469# CONFIG_IPV6_MROUTE is not set
415# CONFIG_NETWORK_SECMARK is not set 470# CONFIG_NETWORK_SECMARK is not set
416# CONFIG_NETFILTER is not set 471CONFIG_NETFILTER=y
472# CONFIG_NETFILTER_DEBUG is not set
473CONFIG_NETFILTER_ADVANCED=y
474
475#
476# Core Netfilter Configuration
477#
478CONFIG_NETFILTER_NETLINK=m
479CONFIG_NETFILTER_NETLINK_QUEUE=m
480CONFIG_NETFILTER_NETLINK_LOG=m
481CONFIG_NF_CONNTRACK=m
482CONFIG_NF_CT_ACCT=y
483CONFIG_NF_CONNTRACK_MARK=y
484CONFIG_NF_CONNTRACK_EVENTS=y
485CONFIG_NF_CT_PROTO_DCCP=m
486CONFIG_NF_CT_PROTO_GRE=m
487CONFIG_NF_CT_PROTO_SCTP=m
488CONFIG_NF_CT_PROTO_UDPLITE=m
489CONFIG_NF_CONNTRACK_AMANDA=m
490CONFIG_NF_CONNTRACK_FTP=m
491CONFIG_NF_CONNTRACK_H323=m
492CONFIG_NF_CONNTRACK_IRC=m
493CONFIG_NF_CONNTRACK_NETBIOS_NS=m
494CONFIG_NF_CONNTRACK_PPTP=m
495CONFIG_NF_CONNTRACK_SANE=m
496CONFIG_NF_CONNTRACK_SIP=m
497CONFIG_NF_CONNTRACK_TFTP=m
498CONFIG_NF_CT_NETLINK=m
499# CONFIG_NETFILTER_TPROXY is not set
500CONFIG_NETFILTER_XTABLES=m
501CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m
502CONFIG_NETFILTER_XT_TARGET_CONNMARK=m
503# CONFIG_NETFILTER_XT_TARGET_DSCP is not set
504CONFIG_NETFILTER_XT_TARGET_HL=m
505CONFIG_NETFILTER_XT_TARGET_LED=m
506CONFIG_NETFILTER_XT_TARGET_MARK=m
507CONFIG_NETFILTER_XT_TARGET_NFLOG=m
508CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m
509# CONFIG_NETFILTER_XT_TARGET_NOTRACK is not set
510CONFIG_NETFILTER_XT_TARGET_RATEEST=m
511# CONFIG_NETFILTER_XT_TARGET_TRACE is not set
512CONFIG_NETFILTER_XT_TARGET_TCPMSS=m
513# CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set
514CONFIG_NETFILTER_XT_MATCH_CLUSTER=m
515CONFIG_NETFILTER_XT_MATCH_COMMENT=m
516CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m
517CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m
518CONFIG_NETFILTER_XT_MATCH_CONNMARK=m
519CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m
520CONFIG_NETFILTER_XT_MATCH_DCCP=m
521CONFIG_NETFILTER_XT_MATCH_DSCP=m
522CONFIG_NETFILTER_XT_MATCH_ESP=m
523CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m
524CONFIG_NETFILTER_XT_MATCH_HELPER=m
525CONFIG_NETFILTER_XT_MATCH_HL=m
526CONFIG_NETFILTER_XT_MATCH_IPRANGE=m
527CONFIG_NETFILTER_XT_MATCH_LENGTH=m
528CONFIG_NETFILTER_XT_MATCH_LIMIT=m
529CONFIG_NETFILTER_XT_MATCH_MAC=m
530CONFIG_NETFILTER_XT_MATCH_MARK=m
531CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m
532CONFIG_NETFILTER_XT_MATCH_OWNER=m
533CONFIG_NETFILTER_XT_MATCH_POLICY=m
534CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m
535CONFIG_NETFILTER_XT_MATCH_QUOTA=m
536CONFIG_NETFILTER_XT_MATCH_RATEEST=m
537CONFIG_NETFILTER_XT_MATCH_REALM=m
538CONFIG_NETFILTER_XT_MATCH_RECENT=m
539# CONFIG_NETFILTER_XT_MATCH_RECENT_PROC_COMPAT is not set
540CONFIG_NETFILTER_XT_MATCH_SCTP=m
541CONFIG_NETFILTER_XT_MATCH_STATE=m
542CONFIG_NETFILTER_XT_MATCH_STATISTIC=m
543CONFIG_NETFILTER_XT_MATCH_STRING=m
544CONFIG_NETFILTER_XT_MATCH_TCPMSS=m
545CONFIG_NETFILTER_XT_MATCH_TIME=m
546CONFIG_NETFILTER_XT_MATCH_U32=m
547CONFIG_IP_VS=m
548# CONFIG_IP_VS_IPV6 is not set
549# CONFIG_IP_VS_DEBUG is not set
550CONFIG_IP_VS_TAB_BITS=12
551
552#
553# IPVS transport protocol load balancing support
554#
555# CONFIG_IP_VS_PROTO_TCP is not set
556# CONFIG_IP_VS_PROTO_UDP is not set
557# CONFIG_IP_VS_PROTO_ESP is not set
558# CONFIG_IP_VS_PROTO_AH is not set
559
560#
561# IPVS scheduler
562#
563# CONFIG_IP_VS_RR is not set
564# CONFIG_IP_VS_WRR is not set
565# CONFIG_IP_VS_LC is not set
566# CONFIG_IP_VS_WLC is not set
567# CONFIG_IP_VS_LBLC is not set
568# CONFIG_IP_VS_LBLCR is not set
569# CONFIG_IP_VS_DH is not set
570# CONFIG_IP_VS_SH is not set
571# CONFIG_IP_VS_SED is not set
572# CONFIG_IP_VS_NQ is not set
573
574#
575# IPVS application helper
576#
577
578#
579# IP: Netfilter Configuration
580#
581CONFIG_NF_DEFRAG_IPV4=m
582CONFIG_NF_CONNTRACK_IPV4=m
583CONFIG_NF_CONNTRACK_PROC_COMPAT=y
584CONFIG_IP_NF_QUEUE=m
585CONFIG_IP_NF_IPTABLES=m
586CONFIG_IP_NF_MATCH_ADDRTYPE=m
587CONFIG_IP_NF_MATCH_AH=m
588CONFIG_IP_NF_MATCH_ECN=m
589CONFIG_IP_NF_MATCH_TTL=m
590CONFIG_IP_NF_FILTER=m
591CONFIG_IP_NF_TARGET_REJECT=m
592CONFIG_IP_NF_TARGET_LOG=m
593CONFIG_IP_NF_TARGET_ULOG=m
594CONFIG_NF_NAT=m
595CONFIG_NF_NAT_NEEDED=y
596CONFIG_IP_NF_TARGET_MASQUERADE=m
597CONFIG_IP_NF_TARGET_NETMAP=m
598CONFIG_IP_NF_TARGET_REDIRECT=m
599CONFIG_NF_NAT_SNMP_BASIC=m
600CONFIG_NF_NAT_PROTO_DCCP=m
601CONFIG_NF_NAT_PROTO_GRE=m
602CONFIG_NF_NAT_PROTO_UDPLITE=m
603CONFIG_NF_NAT_PROTO_SCTP=m
604CONFIG_NF_NAT_FTP=m
605CONFIG_NF_NAT_IRC=m
606CONFIG_NF_NAT_TFTP=m
607CONFIG_NF_NAT_AMANDA=m
608CONFIG_NF_NAT_PPTP=m
609CONFIG_NF_NAT_H323=m
610CONFIG_NF_NAT_SIP=m
611CONFIG_IP_NF_MANGLE=m
612CONFIG_IP_NF_TARGET_CLUSTERIP=m
613CONFIG_IP_NF_TARGET_ECN=m
614CONFIG_IP_NF_TARGET_TTL=m
615CONFIG_IP_NF_RAW=m
616CONFIG_IP_NF_ARPTABLES=m
617CONFIG_IP_NF_ARPFILTER=m
618CONFIG_IP_NF_ARP_MANGLE=m
619
620#
621# IPv6: Netfilter Configuration
622#
623CONFIG_NF_CONNTRACK_IPV6=m
624CONFIG_IP6_NF_QUEUE=m
625CONFIG_IP6_NF_IPTABLES=m
626CONFIG_IP6_NF_MATCH_AH=m
627CONFIG_IP6_NF_MATCH_EUI64=m
628CONFIG_IP6_NF_MATCH_FRAG=m
629CONFIG_IP6_NF_MATCH_OPTS=m
630CONFIG_IP6_NF_MATCH_HL=m
631CONFIG_IP6_NF_MATCH_IPV6HEADER=m
632CONFIG_IP6_NF_MATCH_MH=m
633CONFIG_IP6_NF_MATCH_RT=m
634CONFIG_IP6_NF_TARGET_HL=m
635CONFIG_IP6_NF_TARGET_LOG=m
636CONFIG_IP6_NF_FILTER=m
637CONFIG_IP6_NF_TARGET_REJECT=m
638CONFIG_IP6_NF_MANGLE=m
639CONFIG_IP6_NF_RAW=m
417# CONFIG_IP_DCCP is not set 640# CONFIG_IP_DCCP is not set
418# CONFIG_IP_SCTP is not set 641# CONFIG_IP_SCTP is not set
419# CONFIG_TIPC is not set 642# CONFIG_TIPC is not set
420# CONFIG_ATM is not set 643# CONFIG_ATM is not set
421# CONFIG_BRIDGE is not set 644# CONFIG_BRIDGE is not set
645# CONFIG_NET_DSA is not set
422# CONFIG_VLAN_8021Q is not set 646# CONFIG_VLAN_8021Q is not set
423# CONFIG_DECNET is not set 647# CONFIG_DECNET is not set
424# CONFIG_LLC2 is not set 648# CONFIG_LLC2 is not set
@@ -428,8 +652,10 @@ CONFIG_IPV6_TUNNEL=m
428# CONFIG_LAPB is not set 652# CONFIG_LAPB is not set
429# CONFIG_ECONET is not set 653# CONFIG_ECONET is not set
430# CONFIG_WAN_ROUTER is not set 654# CONFIG_WAN_ROUTER is not set
655# CONFIG_PHONET is not set
431# CONFIG_NET_SCHED is not set 656# CONFIG_NET_SCHED is not set
432CONFIG_NET_SCH_FIFO=y 657CONFIG_NET_CLS_ROUTE=y
658# CONFIG_DCB is not set
433 659
434# 660#
435# Network testing 661# Network testing
@@ -451,8 +677,8 @@ CONFIG_BT_HIDP=m
451# 677#
452# Bluetooth device drivers 678# Bluetooth device drivers
453# 679#
454CONFIG_BT_HCIUSB=m 680# CONFIG_BT_HCIBTUSB is not set
455CONFIG_BT_HCIUSB_SCO=y 681# CONFIG_BT_HCIBTSDIO is not set
456CONFIG_BT_HCIUART=m 682CONFIG_BT_HCIUART=m
457CONFIG_BT_HCIUART_H4=y 683CONFIG_BT_HCIUART_H4=y
458CONFIG_BT_HCIUART_BCSP=y 684CONFIG_BT_HCIUART_BCSP=y
@@ -462,35 +688,26 @@ CONFIG_BT_HCIBPA10X=m
462CONFIG_BT_HCIBFUSB=m 688CONFIG_BT_HCIBFUSB=m
463CONFIG_BT_HCIVHCI=m 689CONFIG_BT_HCIVHCI=m
464# CONFIG_AF_RXRPC is not set 690# CONFIG_AF_RXRPC is not set
465 691CONFIG_WIRELESS=y
466#
467# Wireless
468#
469CONFIG_CFG80211=m 692CONFIG_CFG80211=m
470CONFIG_NL80211=y 693# CONFIG_CFG80211_REG_DEBUG is not set
694# CONFIG_WIRELESS_OLD_REGULATORY is not set
471CONFIG_WIRELESS_EXT=y 695CONFIG_WIRELESS_EXT=y
696CONFIG_WIRELESS_EXT_SYSFS=y
697# CONFIG_LIB80211 is not set
472CONFIG_MAC80211=m 698CONFIG_MAC80211=m
473 699
474# 700#
475# Rate control algorithm selection 701# Rate control algorithm selection
476# 702#
477CONFIG_MAC80211_RC_DEFAULT_PID=y 703CONFIG_MAC80211_RC_MINSTREL=y
478# CONFIG_MAC80211_RC_DEFAULT_NONE is not set 704# CONFIG_MAC80211_RC_DEFAULT_PID is not set
479 705CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y
480# 706CONFIG_MAC80211_RC_DEFAULT="minstrel"
481# Selecting 'y' for an algorithm will
482#
483
484#
485# build the algorithm into mac80211.
486#
487CONFIG_MAC80211_RC_DEFAULT="pid"
488CONFIG_MAC80211_RC_PID=y
489CONFIG_MAC80211_MESH=y 707CONFIG_MAC80211_MESH=y
490CONFIG_MAC80211_LEDS=y 708CONFIG_MAC80211_LEDS=y
491# CONFIG_MAC80211_DEBUG_PACKET_ALIGNMENT is not set 709# CONFIG_MAC80211_DEBUG_MENU is not set
492# CONFIG_MAC80211_DEBUG is not set 710# CONFIG_WIMAX is not set
493# CONFIG_IEEE80211 is not set
494# CONFIG_RFKILL is not set 711# CONFIG_RFKILL is not set
495# CONFIG_NET_9P is not set 712# CONFIG_NET_9P is not set
496 713
@@ -504,7 +721,9 @@ CONFIG_MAC80211_LEDS=y
504CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" 721CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
505CONFIG_STANDALONE=y 722CONFIG_STANDALONE=y
506CONFIG_PREVENT_FIRMWARE_BUILD=y 723CONFIG_PREVENT_FIRMWARE_BUILD=y
507CONFIG_FW_LOADER=m 724CONFIG_FW_LOADER=y
725CONFIG_FIRMWARE_IN_KERNEL=y
726CONFIG_EXTRA_FIRMWARE=""
508# CONFIG_DEBUG_DRIVER is not set 727# CONFIG_DEBUG_DRIVER is not set
509# CONFIG_DEBUG_DEVRES is not set 728# CONFIG_DEBUG_DEVRES is not set
510# CONFIG_SYS_HYPERVISOR is not set 729# CONFIG_SYS_HYPERVISOR is not set
@@ -513,6 +732,7 @@ CONFIG_MTD=y
513# CONFIG_MTD_DEBUG is not set 732# CONFIG_MTD_DEBUG is not set
514# CONFIG_MTD_CONCAT is not set 733# CONFIG_MTD_CONCAT is not set
515CONFIG_MTD_PARTITIONS=y 734CONFIG_MTD_PARTITIONS=y
735# CONFIG_MTD_TESTS is not set
516CONFIG_MTD_REDBOOT_PARTS=y 736CONFIG_MTD_REDBOOT_PARTS=y
517CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-1 737CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-1
518CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED=y 738CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED=y
@@ -545,7 +765,7 @@ CONFIG_MTD_MAP_BANK_WIDTH_1=y
545CONFIG_MTD_MAP_BANK_WIDTH_2=y 765CONFIG_MTD_MAP_BANK_WIDTH_2=y
546CONFIG_MTD_MAP_BANK_WIDTH_4=y 766CONFIG_MTD_MAP_BANK_WIDTH_4=y
547# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set 767# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
548CONFIG_MTD_MAP_BANK_WIDTH_16=y 768# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
549# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set 769# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
550CONFIG_MTD_CFI_I1=y 770CONFIG_MTD_CFI_I1=y
551CONFIG_MTD_CFI_I2=y 771CONFIG_MTD_CFI_I2=y
@@ -566,8 +786,6 @@ CONFIG_MTD_ROM=y
566# CONFIG_MTD_PHYSMAP is not set 786# CONFIG_MTD_PHYSMAP is not set
567# CONFIG_MTD_ARM_INTEGRATOR is not set 787# CONFIG_MTD_ARM_INTEGRATOR is not set
568# CONFIG_MTD_IMPA7 is not set 788# CONFIG_MTD_IMPA7 is not set
569CONFIG_MTD_BAST=y
570CONFIG_MTD_BAST_MAXSIZE=4
571# CONFIG_MTD_PLATRAM is not set 789# CONFIG_MTD_PLATRAM is not set
572 790
573# 791#
@@ -590,6 +808,7 @@ CONFIG_MTD_NAND=y
590# CONFIG_MTD_NAND_VERIFY_WRITE is not set 808# CONFIG_MTD_NAND_VERIFY_WRITE is not set
591# CONFIG_MTD_NAND_ECC_SMC is not set 809# CONFIG_MTD_NAND_ECC_SMC is not set
592# CONFIG_MTD_NAND_MUSEUM_IDS is not set 810# CONFIG_MTD_NAND_MUSEUM_IDS is not set
811# CONFIG_MTD_NAND_GPIO is not set
593CONFIG_MTD_NAND_IDS=y 812CONFIG_MTD_NAND_IDS=y
594CONFIG_MTD_NAND_S3C2410=y 813CONFIG_MTD_NAND_S3C2410=y
595# CONFIG_MTD_NAND_S3C2410_DEBUG is not set 814# CONFIG_MTD_NAND_S3C2410_DEBUG is not set
@@ -602,6 +821,11 @@ CONFIG_MTD_NAND_S3C2410=y
602# CONFIG_MTD_ONENAND is not set 821# CONFIG_MTD_ONENAND is not set
603 822
604# 823#
824# LPDDR flash memory drivers
825#
826# CONFIG_MTD_LPDDR is not set
827
828#
605# UBI - Unsorted block images 829# UBI - Unsorted block images
606# 830#
607# CONFIG_MTD_UBI is not set 831# CONFIG_MTD_UBI is not set
@@ -620,7 +844,7 @@ CONFIG_BLK_DEV=y
620CONFIG_BLK_DEV_LOOP=y 844CONFIG_BLK_DEV_LOOP=y
621# CONFIG_BLK_DEV_CRYPTOLOOP is not set 845# CONFIG_BLK_DEV_CRYPTOLOOP is not set
622CONFIG_BLK_DEV_NBD=m 846CONFIG_BLK_DEV_NBD=m
623# CONFIG_BLK_DEV_UB is not set 847CONFIG_BLK_DEV_UB=m
624CONFIG_BLK_DEV_RAM=y 848CONFIG_BLK_DEV_RAM=y
625CONFIG_BLK_DEV_RAM_COUNT=16 849CONFIG_BLK_DEV_RAM_COUNT=16
626CONFIG_BLK_DEV_RAM_SIZE=4096 850CONFIG_BLK_DEV_RAM_SIZE=4096
@@ -628,32 +852,40 @@ CONFIG_BLK_DEV_RAM_SIZE=4096
628# CONFIG_CDROM_PKTCDVD is not set 852# CONFIG_CDROM_PKTCDVD is not set
629CONFIG_ATA_OVER_ETH=m 853CONFIG_ATA_OVER_ETH=m
630CONFIG_MISC_DEVICES=y 854CONFIG_MISC_DEVICES=y
631# CONFIG_EEPROM_93CX6 is not set 855# CONFIG_ICS932S401 is not set
632# CONFIG_ENCLOSURE_SERVICES is not set 856# CONFIG_ENCLOSURE_SERVICES is not set
857# CONFIG_ISL29003 is not set
858# CONFIG_C2PORT is not set
859
860#
861# EEPROM support
862#
863CONFIG_EEPROM_AT24=m
864CONFIG_EEPROM_AT25=m
865CONFIG_EEPROM_LEGACY=m
866CONFIG_EEPROM_93CX6=m
633CONFIG_HAVE_IDE=y 867CONFIG_HAVE_IDE=y
634CONFIG_IDE=y 868CONFIG_IDE=y
635CONFIG_BLK_DEV_IDE=y
636 869
637# 870#
638# Please see Documentation/ide/ide.txt for help/info on IDE drives 871# Please see Documentation/ide/ide.txt for help/info on IDE drives
639# 872#
873CONFIG_IDE_ATAPI=y
640# CONFIG_BLK_DEV_IDE_SATA is not set 874# CONFIG_BLK_DEV_IDE_SATA is not set
641CONFIG_BLK_DEV_IDEDISK=y 875CONFIG_IDE_GD=y
642# CONFIG_IDEDISK_MULTI_MODE is not set 876CONFIG_IDE_GD_ATA=y
877# CONFIG_IDE_GD_ATAPI is not set
643CONFIG_BLK_DEV_IDECD=y 878CONFIG_BLK_DEV_IDECD=y
644CONFIG_BLK_DEV_IDECD_VERBOSE_ERRORS=y 879CONFIG_BLK_DEV_IDECD_VERBOSE_ERRORS=y
645CONFIG_BLK_DEV_IDETAPE=m 880CONFIG_BLK_DEV_IDETAPE=m
646CONFIG_BLK_DEV_IDEFLOPPY=m
647# CONFIG_BLK_DEV_IDESCSI is not set
648# CONFIG_IDE_TASK_IOCTL is not set 881# CONFIG_IDE_TASK_IOCTL is not set
649CONFIG_IDE_PROC_FS=y 882CONFIG_IDE_PROC_FS=y
650 883
651# 884#
652# IDE chipset support/bugfixes 885# IDE chipset support/bugfixes
653# 886#
654# CONFIG_BLK_DEV_PLATFORM is not set 887CONFIG_BLK_DEV_PLATFORM=y
655# CONFIG_BLK_DEV_IDEDMA is not set 888# CONFIG_BLK_DEV_IDEDMA is not set
656# CONFIG_BLK_DEV_HD is not set
657 889
658# 890#
659# SCSI device support 891# SCSI device support
@@ -699,6 +931,8 @@ CONFIG_SCSI_LOWLEVEL=y
699# CONFIG_SCSI_AIC7XXX_OLD is not set 931# CONFIG_SCSI_AIC7XXX_OLD is not set
700# CONFIG_SCSI_ADVANSYS is not set 932# CONFIG_SCSI_ADVANSYS is not set
701# CONFIG_SCSI_IN2000 is not set 933# CONFIG_SCSI_IN2000 is not set
934# CONFIG_LIBFC is not set
935# CONFIG_LIBFCOE is not set
702# CONFIG_SCSI_DTC3280 is not set 936# CONFIG_SCSI_DTC3280 is not set
703# CONFIG_SCSI_FUTURE_DOMAIN is not set 937# CONFIG_SCSI_FUTURE_DOMAIN is not set
704# CONFIG_SCSI_GENERIC_NCR5380 is not set 938# CONFIG_SCSI_GENERIC_NCR5380 is not set
@@ -711,11 +945,13 @@ CONFIG_SCSI_LOWLEVEL=y
711# CONFIG_SCSI_SYM53C416 is not set 945# CONFIG_SCSI_SYM53C416 is not set
712# CONFIG_SCSI_T128 is not set 946# CONFIG_SCSI_T128 is not set
713# CONFIG_SCSI_DEBUG is not set 947# CONFIG_SCSI_DEBUG is not set
948# CONFIG_SCSI_DH is not set
949# CONFIG_SCSI_OSD_INITIATOR is not set
714# CONFIG_ATA is not set 950# CONFIG_ATA is not set
715CONFIG_HAVE_PATA_PLATFORM=y 951CONFIG_HAVE_PATA_PLATFORM=y
716# CONFIG_MD is not set 952# CONFIG_MD is not set
717CONFIG_NETDEVICES=y 953CONFIG_NETDEVICES=y
718# CONFIG_NETDEVICES_MULTIQUEUE is not set 954CONFIG_COMPAT_NET_DEV_OPS=y
719# CONFIG_DUMMY is not set 955# CONFIG_DUMMY is not set
720# CONFIG_BONDING is not set 956# CONFIG_BONDING is not set
721# CONFIG_MACVLAN is not set 957# CONFIG_MACVLAN is not set
@@ -731,9 +967,14 @@ CONFIG_MII=y
731# CONFIG_NET_VENDOR_SMC is not set 967# CONFIG_NET_VENDOR_SMC is not set
732# CONFIG_SMC91X is not set 968# CONFIG_SMC91X is not set
733CONFIG_DM9000=y 969CONFIG_DM9000=y
734# CONFIG_ENC28J60 is not set
735CONFIG_DM9000_DEBUGLEVEL=4 970CONFIG_DM9000_DEBUGLEVEL=4
971# CONFIG_DM9000_FORCE_SIMPLE_PHY_POLL is not set
972# CONFIG_ENC28J60 is not set
973# CONFIG_ETHOC is not set
974# CONFIG_SMC911X is not set
975# CONFIG_SMSC911X is not set
736# CONFIG_NET_VENDOR_RACAL is not set 976# CONFIG_NET_VENDOR_RACAL is not set
977# CONFIG_DNET is not set
737# CONFIG_AT1700 is not set 978# CONFIG_AT1700 is not set
738# CONFIG_DEPCA is not set 979# CONFIG_DEPCA is not set
739# CONFIG_HP100 is not set 980# CONFIG_HP100 is not set
@@ -742,11 +983,14 @@ CONFIG_DM9000_DEBUGLEVEL=4
742# CONFIG_IBM_NEW_EMAC_RGMII is not set 983# CONFIG_IBM_NEW_EMAC_RGMII is not set
743# CONFIG_IBM_NEW_EMAC_TAH is not set 984# CONFIG_IBM_NEW_EMAC_TAH is not set
744# CONFIG_IBM_NEW_EMAC_EMAC4 is not set 985# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
986# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
987# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
988# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
745# CONFIG_NET_PCI is not set 989# CONFIG_NET_PCI is not set
746# CONFIG_B44 is not set 990# CONFIG_B44 is not set
991# CONFIG_CS89x0 is not set
747# CONFIG_NET_POCKET is not set 992# CONFIG_NET_POCKET is not set
748CONFIG_NETDEV_1000=y 993CONFIG_NETDEV_1000=y
749# CONFIG_E1000E_ENABLED is not set
750CONFIG_NETDEV_10000=y 994CONFIG_NETDEV_10000=y
751# CONFIG_TR is not set 995# CONFIG_TR is not set
752 996
@@ -755,7 +999,10 @@ CONFIG_NETDEV_10000=y
755# 999#
756# CONFIG_WLAN_PRE80211 is not set 1000# CONFIG_WLAN_PRE80211 is not set
757# CONFIG_WLAN_80211 is not set 1001# CONFIG_WLAN_80211 is not set
758# CONFIG_IWLWIFI_LEDS is not set 1002
1003#
1004# Enable WiMAX (Networking options) to see the WiMAX drivers
1005#
759 1006
760# 1007#
761# USB Network Adapters 1008# USB Network Adapters
@@ -778,7 +1025,7 @@ CONFIG_NETDEV_10000=y
778# Input device support 1025# Input device support
779# 1026#
780CONFIG_INPUT=y 1027CONFIG_INPUT=y
781# CONFIG_INPUT_FF_MEMLESS is not set 1028CONFIG_INPUT_FF_MEMLESS=m
782# CONFIG_INPUT_POLLDEV is not set 1029# CONFIG_INPUT_POLLDEV is not set
783 1030
784# 1031#
@@ -789,7 +1036,7 @@ CONFIG_INPUT_MOUSEDEV_PSAUX=y
789CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 1036CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
790CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 1037CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
791# CONFIG_INPUT_JOYDEV is not set 1038# CONFIG_INPUT_JOYDEV is not set
792# CONFIG_INPUT_EVDEV is not set 1039CONFIG_INPUT_EVDEV=y
793# CONFIG_INPUT_EVBUG is not set 1040# CONFIG_INPUT_EVBUG is not set
794 1041
795# 1042#
@@ -808,20 +1055,88 @@ CONFIG_MOUSE_PS2=y
808CONFIG_MOUSE_PS2_ALPS=y 1055CONFIG_MOUSE_PS2_ALPS=y
809CONFIG_MOUSE_PS2_LOGIPS2PP=y 1056CONFIG_MOUSE_PS2_LOGIPS2PP=y
810CONFIG_MOUSE_PS2_SYNAPTICS=y 1057CONFIG_MOUSE_PS2_SYNAPTICS=y
811CONFIG_MOUSE_PS2_LIFEBOOK=y
812CONFIG_MOUSE_PS2_TRACKPOINT=y 1058CONFIG_MOUSE_PS2_TRACKPOINT=y
1059# CONFIG_MOUSE_PS2_ELANTECH is not set
813# CONFIG_MOUSE_PS2_TOUCHKIT is not set 1060# CONFIG_MOUSE_PS2_TOUCHKIT is not set
814# CONFIG_MOUSE_SERIAL is not set 1061# CONFIG_MOUSE_SERIAL is not set
815# CONFIG_MOUSE_APPLETOUCH is not set 1062CONFIG_MOUSE_APPLETOUCH=m
1063CONFIG_MOUSE_BCM5974=m
816# CONFIG_MOUSE_INPORT is not set 1064# CONFIG_MOUSE_INPORT is not set
817# CONFIG_MOUSE_LOGIBM is not set 1065# CONFIG_MOUSE_LOGIBM is not set
818# CONFIG_MOUSE_PC110PAD is not set 1066# CONFIG_MOUSE_PC110PAD is not set
819# CONFIG_MOUSE_VSXXXAA is not set 1067# CONFIG_MOUSE_VSXXXAA is not set
820# CONFIG_MOUSE_GPIO is not set 1068# CONFIG_MOUSE_GPIO is not set
821# CONFIG_INPUT_JOYSTICK is not set 1069CONFIG_INPUT_JOYSTICK=y
1070CONFIG_JOYSTICK_ANALOG=m
1071CONFIG_JOYSTICK_A3D=m
1072CONFIG_JOYSTICK_ADI=m
1073CONFIG_JOYSTICK_COBRA=m
1074CONFIG_JOYSTICK_GF2K=m
1075CONFIG_JOYSTICK_GRIP=m
1076CONFIG_JOYSTICK_GRIP_MP=m
1077CONFIG_JOYSTICK_GUILLEMOT=m
1078CONFIG_JOYSTICK_INTERACT=m
1079CONFIG_JOYSTICK_SIDEWINDER=m
1080CONFIG_JOYSTICK_TMDC=m
1081CONFIG_JOYSTICK_IFORCE=m
1082# CONFIG_JOYSTICK_IFORCE_USB is not set
1083# CONFIG_JOYSTICK_IFORCE_232 is not set
1084# CONFIG_JOYSTICK_WARRIOR is not set
1085CONFIG_JOYSTICK_MAGELLAN=m
1086CONFIG_JOYSTICK_SPACEORB=m
1087CONFIG_JOYSTICK_SPACEBALL=m
1088CONFIG_JOYSTICK_STINGER=m
1089CONFIG_JOYSTICK_TWIDJOY=m
1090CONFIG_JOYSTICK_ZHENHUA=m
1091CONFIG_JOYSTICK_DB9=m
1092CONFIG_JOYSTICK_GAMECON=m
1093CONFIG_JOYSTICK_TURBOGRAFX=m
1094CONFIG_JOYSTICK_JOYDUMP=m
1095CONFIG_JOYSTICK_XPAD=m
1096CONFIG_JOYSTICK_XPAD_FF=y
1097CONFIG_JOYSTICK_XPAD_LEDS=y
822# CONFIG_INPUT_TABLET is not set 1098# CONFIG_INPUT_TABLET is not set
823# CONFIG_INPUT_TOUCHSCREEN is not set 1099CONFIG_INPUT_TOUCHSCREEN=y
824# CONFIG_INPUT_MISC is not set 1100# CONFIG_TOUCHSCREEN_ADS7846 is not set
1101# CONFIG_TOUCHSCREEN_AD7877 is not set
1102# CONFIG_TOUCHSCREEN_AD7879_I2C is not set
1103# CONFIG_TOUCHSCREEN_AD7879_SPI is not set
1104# CONFIG_TOUCHSCREEN_AD7879 is not set
1105# CONFIG_TOUCHSCREEN_FUJITSU is not set
1106# CONFIG_TOUCHSCREEN_GUNZE is not set
1107# CONFIG_TOUCHSCREEN_ELO is not set
1108# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set
1109# CONFIG_TOUCHSCREEN_MTOUCH is not set
1110# CONFIG_TOUCHSCREEN_INEXIO is not set
1111# CONFIG_TOUCHSCREEN_MK712 is not set
1112# CONFIG_TOUCHSCREEN_HTCPEN is not set
1113# CONFIG_TOUCHSCREEN_PENMOUNT is not set
1114# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
1115# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
1116# CONFIG_TOUCHSCREEN_WM97XX is not set
1117CONFIG_TOUCHSCREEN_USB_COMPOSITE=m
1118CONFIG_TOUCHSCREEN_USB_EGALAX=y
1119CONFIG_TOUCHSCREEN_USB_PANJIT=y
1120CONFIG_TOUCHSCREEN_USB_3M=y
1121CONFIG_TOUCHSCREEN_USB_ITM=y
1122CONFIG_TOUCHSCREEN_USB_ETURBO=y
1123CONFIG_TOUCHSCREEN_USB_GUNZE=y
1124CONFIG_TOUCHSCREEN_USB_DMC_TSC10=y
1125CONFIG_TOUCHSCREEN_USB_IRTOUCH=y
1126CONFIG_TOUCHSCREEN_USB_IDEALTEK=y
1127CONFIG_TOUCHSCREEN_USB_GENERAL_TOUCH=y
1128CONFIG_TOUCHSCREEN_USB_GOTOP=y
1129# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
1130# CONFIG_TOUCHSCREEN_TSC2007 is not set
1131CONFIG_INPUT_MISC=y
1132CONFIG_INPUT_ATI_REMOTE=m
1133CONFIG_INPUT_ATI_REMOTE2=m
1134CONFIG_INPUT_KEYSPAN_REMOTE=m
1135CONFIG_INPUT_POWERMATE=m
1136CONFIG_INPUT_YEALINK=m
1137CONFIG_INPUT_CM109=m
1138CONFIG_INPUT_UINPUT=m
1139CONFIG_INPUT_GPIO_ROTARY_ENCODER=m
825 1140
826# 1141#
827# Hardware I/O ports 1142# Hardware I/O ports
@@ -831,12 +1146,15 @@ CONFIG_SERIO_SERPORT=y
831# CONFIG_SERIO_PARKBD is not set 1146# CONFIG_SERIO_PARKBD is not set
832CONFIG_SERIO_LIBPS2=y 1147CONFIG_SERIO_LIBPS2=y
833# CONFIG_SERIO_RAW is not set 1148# CONFIG_SERIO_RAW is not set
834# CONFIG_GAMEPORT is not set 1149CONFIG_GAMEPORT=m
1150# CONFIG_GAMEPORT_NS558 is not set
1151# CONFIG_GAMEPORT_L4 is not set
835 1152
836# 1153#
837# Character devices 1154# Character devices
838# 1155#
839CONFIG_VT=y 1156CONFIG_VT=y
1157CONFIG_CONSOLE_TRANSLATIONS=y
840CONFIG_VT_CONSOLE=y 1158CONFIG_VT_CONSOLE=y
841CONFIG_HW_CONSOLE=y 1159CONFIG_HW_CONSOLE=y
842# CONFIG_VT_HW_CONSOLE_BINDING is not set 1160# CONFIG_VT_HW_CONSOLE_BINDING is not set
@@ -877,14 +1195,17 @@ CONFIG_SERIAL_8250_SHARE_IRQ=y
877# Non-8250 serial port support 1195# Non-8250 serial port support
878# 1196#
879CONFIG_SERIAL_SAMSUNG=y 1197CONFIG_SERIAL_SAMSUNG=y
1198CONFIG_SERIAL_SAMSUNG_UARTS=4
880# CONFIG_SERIAL_SAMSUNG_DEBUG is not set 1199# CONFIG_SERIAL_SAMSUNG_DEBUG is not set
881CONFIG_SERIAL_SAMSUNG_CONSOLE=y 1200CONFIG_SERIAL_SAMSUNG_CONSOLE=y
882CONFIG_SERIAL_S3C2410=y 1201CONFIG_SERIAL_S3C2410=y
883CONFIG_SERIAL_S3C2412=y 1202CONFIG_SERIAL_S3C2412=y
884CONFIG_SERIAL_S3C2440=y 1203CONFIG_SERIAL_S3C2440=y
1204# CONFIG_SERIAL_MAX3100 is not set
885CONFIG_SERIAL_CORE=y 1205CONFIG_SERIAL_CORE=y
886CONFIG_SERIAL_CORE_CONSOLE=y 1206CONFIG_SERIAL_CORE_CONSOLE=y
887CONFIG_UNIX98_PTYS=y 1207CONFIG_UNIX98_PTYS=y
1208# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
888CONFIG_LEGACY_PTYS=y 1209CONFIG_LEGACY_PTYS=y
889CONFIG_LEGACY_PTY_COUNT=256 1210CONFIG_LEGACY_PTY_COUNT=256
890CONFIG_PRINTER=y 1211CONFIG_PRINTER=y
@@ -892,7 +1213,7 @@ CONFIG_PRINTER=y
892CONFIG_PPDEV=y 1213CONFIG_PPDEV=y
893# CONFIG_IPMI_HANDLER is not set 1214# CONFIG_IPMI_HANDLER is not set
894CONFIG_HW_RANDOM=y 1215CONFIG_HW_RANDOM=y
895# CONFIG_NVRAM is not set 1216# CONFIG_HW_RANDOM_TIMERIOMEM is not set
896# CONFIG_DTLK is not set 1217# CONFIG_DTLK is not set
897# CONFIG_R3964 is not set 1218# CONFIG_R3964 is not set
898# CONFIG_RAW_DRIVER is not set 1219# CONFIG_RAW_DRIVER is not set
@@ -901,33 +1222,44 @@ CONFIG_DEVPORT=y
901CONFIG_I2C=y 1222CONFIG_I2C=y
902CONFIG_I2C_BOARDINFO=y 1223CONFIG_I2C_BOARDINFO=y
903CONFIG_I2C_CHARDEV=m 1224CONFIG_I2C_CHARDEV=m
1225CONFIG_I2C_HELPER_AUTO=y
904CONFIG_I2C_ALGOBIT=y 1226CONFIG_I2C_ALGOBIT=y
905 1227
906# 1228#
907# I2C Hardware Bus support 1229# I2C Hardware Bus support
908# 1230#
909# CONFIG_I2C_ELEKTOR is not set 1231
1232#
1233# I2C system bus drivers (mostly embedded / system-on-chip)
1234#
910# CONFIG_I2C_GPIO is not set 1235# CONFIG_I2C_GPIO is not set
911# CONFIG_I2C_OCORES is not set 1236# CONFIG_I2C_OCORES is not set
912# CONFIG_I2C_PARPORT is not set
913# CONFIG_I2C_PARPORT_LIGHT is not set
914CONFIG_I2C_S3C2410=y 1237CONFIG_I2C_S3C2410=y
915CONFIG_I2C_SIMTEC=y 1238CONFIG_I2C_SIMTEC=y
1239
1240#
1241# External I2C/SMBus adapter drivers
1242#
1243# CONFIG_I2C_PARPORT is not set
1244# CONFIG_I2C_PARPORT_LIGHT is not set
916# CONFIG_I2C_TAOS_EVM is not set 1245# CONFIG_I2C_TAOS_EVM is not set
917# CONFIG_I2C_STUB is not set
918# CONFIG_I2C_TINY_USB is not set 1246# CONFIG_I2C_TINY_USB is not set
1247
1248#
1249# Other I2C/SMBus bus drivers
1250#
1251# CONFIG_I2C_ELEKTOR is not set
919# CONFIG_I2C_PCA_ISA is not set 1252# CONFIG_I2C_PCA_ISA is not set
920# CONFIG_I2C_PCA_PLATFORM is not set 1253# CONFIG_I2C_PCA_PLATFORM is not set
1254# CONFIG_I2C_STUB is not set
921 1255
922# 1256#
923# Miscellaneous I2C Chip support 1257# Miscellaneous I2C Chip support
924# 1258#
925# CONFIG_DS1682 is not set 1259# CONFIG_DS1682 is not set
926CONFIG_EEPROM_LEGACY=m
927# CONFIG_SENSORS_PCF8574 is not set 1260# CONFIG_SENSORS_PCF8574 is not set
928# CONFIG_PCF8575 is not set 1261# CONFIG_PCF8575 is not set
929# CONFIG_SENSORS_PCF8591 is not set 1262# CONFIG_SENSORS_PCA9539 is not set
930# CONFIG_TPS65010 is not set
931# CONFIG_SENSORS_MAX6875 is not set 1263# CONFIG_SENSORS_MAX6875 is not set
932# CONFIG_SENSORS_TSL2550 is not set 1264# CONFIG_SENSORS_TSL2550 is not set
933# CONFIG_I2C_DEBUG_CORE is not set 1265# CONFIG_I2C_DEBUG_CORE is not set
@@ -943,6 +1275,7 @@ CONFIG_SPI_MASTER=y
943# 1275#
944CONFIG_SPI_BITBANG=m 1276CONFIG_SPI_BITBANG=m
945# CONFIG_SPI_BUTTERFLY is not set 1277# CONFIG_SPI_BUTTERFLY is not set
1278CONFIG_SPI_GPIO=m
946# CONFIG_SPI_LM70_LLP is not set 1279# CONFIG_SPI_LM70_LLP is not set
947CONFIG_SPI_S3C24XX=m 1280CONFIG_SPI_S3C24XX=m
948CONFIG_SPI_S3C24XX_GPIO=m 1281CONFIG_SPI_S3C24XX_GPIO=m
@@ -950,44 +1283,56 @@ CONFIG_SPI_S3C24XX_GPIO=m
950# 1283#
951# SPI Protocol Masters 1284# SPI Protocol Masters
952# 1285#
953# CONFIG_EEPROM_AT25 is not set 1286CONFIG_SPI_SPIDEV=m
954# CONFIG_SPI_SPIDEV is not set 1287CONFIG_SPI_TLE62X0=m
955# CONFIG_SPI_TLE62X0 is not set 1288CONFIG_ARCH_REQUIRE_GPIOLIB=y
956CONFIG_HAVE_GPIO_LIB=y 1289CONFIG_GPIOLIB=y
1290# CONFIG_DEBUG_GPIO is not set
1291# CONFIG_GPIO_SYSFS is not set
957 1292
958# 1293#
959# GPIO Support 1294# Memory mapped GPIO expanders:
960# 1295#
961# CONFIG_DEBUG_GPIO is not set
962 1296
963# 1297#
964# I2C GPIO expanders: 1298# I2C GPIO expanders:
965# 1299#
1300# CONFIG_GPIO_MAX732X is not set
966# CONFIG_GPIO_PCA953X is not set 1301# CONFIG_GPIO_PCA953X is not set
967# CONFIG_GPIO_PCF857X is not set 1302# CONFIG_GPIO_PCF857X is not set
968 1303
969# 1304#
1305# PCI GPIO expanders:
1306#
1307
1308#
970# SPI GPIO expanders: 1309# SPI GPIO expanders:
971# 1310#
1311# CONFIG_GPIO_MAX7301 is not set
972# CONFIG_GPIO_MCP23S08 is not set 1312# CONFIG_GPIO_MCP23S08 is not set
973# CONFIG_W1 is not set 1313# CONFIG_W1 is not set
974# CONFIG_POWER_SUPPLY is not set 1314# CONFIG_POWER_SUPPLY is not set
975CONFIG_HWMON=y 1315CONFIG_HWMON=y
976CONFIG_HWMON_VID=m 1316CONFIG_HWMON_VID=m
1317# CONFIG_SENSORS_AD7414 is not set
977# CONFIG_SENSORS_AD7418 is not set 1318# CONFIG_SENSORS_AD7418 is not set
1319# CONFIG_SENSORS_ADCXX is not set
978# CONFIG_SENSORS_ADM1021 is not set 1320# CONFIG_SENSORS_ADM1021 is not set
979# CONFIG_SENSORS_ADM1025 is not set 1321# CONFIG_SENSORS_ADM1025 is not set
980# CONFIG_SENSORS_ADM1026 is not set 1322# CONFIG_SENSORS_ADM1026 is not set
981# CONFIG_SENSORS_ADM1029 is not set 1323# CONFIG_SENSORS_ADM1029 is not set
982# CONFIG_SENSORS_ADM1031 is not set 1324# CONFIG_SENSORS_ADM1031 is not set
983# CONFIG_SENSORS_ADM9240 is not set 1325# CONFIG_SENSORS_ADM9240 is not set
1326# CONFIG_SENSORS_ADT7462 is not set
984# CONFIG_SENSORS_ADT7470 is not set 1327# CONFIG_SENSORS_ADT7470 is not set
985# CONFIG_SENSORS_ADT7473 is not set 1328# CONFIG_SENSORS_ADT7473 is not set
1329# CONFIG_SENSORS_ADT7475 is not set
986# CONFIG_SENSORS_ATXP1 is not set 1330# CONFIG_SENSORS_ATXP1 is not set
987# CONFIG_SENSORS_DS1621 is not set 1331# CONFIG_SENSORS_DS1621 is not set
988# CONFIG_SENSORS_F71805F is not set 1332# CONFIG_SENSORS_F71805F is not set
989# CONFIG_SENSORS_F71882FG is not set 1333# CONFIG_SENSORS_F71882FG is not set
990# CONFIG_SENSORS_F75375S is not set 1334# CONFIG_SENSORS_F75375S is not set
1335# CONFIG_SENSORS_G760A is not set
991# CONFIG_SENSORS_GL518SM is not set 1336# CONFIG_SENSORS_GL518SM is not set
992# CONFIG_SENSORS_GL520SM is not set 1337# CONFIG_SENSORS_GL520SM is not set
993# CONFIG_SENSORS_IT87 is not set 1338# CONFIG_SENSORS_IT87 is not set
@@ -1003,10 +1348,16 @@ CONFIG_SENSORS_LM85=m
1003# CONFIG_SENSORS_LM90 is not set 1348# CONFIG_SENSORS_LM90 is not set
1004# CONFIG_SENSORS_LM92 is not set 1349# CONFIG_SENSORS_LM92 is not set
1005# CONFIG_SENSORS_LM93 is not set 1350# CONFIG_SENSORS_LM93 is not set
1351# CONFIG_SENSORS_LTC4215 is not set
1352# CONFIG_SENSORS_LTC4245 is not set
1353# CONFIG_SENSORS_LM95241 is not set
1354# CONFIG_SENSORS_MAX1111 is not set
1006# CONFIG_SENSORS_MAX1619 is not set 1355# CONFIG_SENSORS_MAX1619 is not set
1007# CONFIG_SENSORS_MAX6650 is not set 1356# CONFIG_SENSORS_MAX6650 is not set
1008# CONFIG_SENSORS_PC87360 is not set 1357# CONFIG_SENSORS_PC87360 is not set
1009# CONFIG_SENSORS_PC87427 is not set 1358# CONFIG_SENSORS_PC87427 is not set
1359# CONFIG_SENSORS_PCF8591 is not set
1360# CONFIG_SENSORS_SHT15 is not set
1010# CONFIG_SENSORS_DME1737 is not set 1361# CONFIG_SENSORS_DME1737 is not set
1011# CONFIG_SENSORS_SMSC47M1 is not set 1362# CONFIG_SENSORS_SMSC47M1 is not set
1012# CONFIG_SENSORS_SMSC47M192 is not set 1363# CONFIG_SENSORS_SMSC47M192 is not set
@@ -1022,7 +1373,10 @@ CONFIG_SENSORS_LM85=m
1022# CONFIG_SENSORS_W83L786NG is not set 1373# CONFIG_SENSORS_W83L786NG is not set
1023# CONFIG_SENSORS_W83627HF is not set 1374# CONFIG_SENSORS_W83627HF is not set
1024# CONFIG_SENSORS_W83627EHF is not set 1375# CONFIG_SENSORS_W83627EHF is not set
1376# CONFIG_SENSORS_LIS3_SPI is not set
1025# CONFIG_HWMON_DEBUG_CHIP is not set 1377# CONFIG_HWMON_DEBUG_CHIP is not set
1378# CONFIG_THERMAL is not set
1379# CONFIG_THERMAL_HWMON is not set
1026CONFIG_WATCHDOG=y 1380CONFIG_WATCHDOG=y
1027# CONFIG_WATCHDOG_NOWAYOUT is not set 1381# CONFIG_WATCHDOG_NOWAYOUT is not set
1028 1382
@@ -1043,20 +1397,33 @@ CONFIG_S3C2410_WATCHDOG=y
1043# USB-based Watchdog Cards 1397# USB-based Watchdog Cards
1044# 1398#
1045# CONFIG_USBPCWATCHDOG is not set 1399# CONFIG_USBPCWATCHDOG is not set
1400CONFIG_SSB_POSSIBLE=y
1046 1401
1047# 1402#
1048# Sonics Silicon Backplane 1403# Sonics Silicon Backplane
1049# 1404#
1050CONFIG_SSB_POSSIBLE=y
1051# CONFIG_SSB is not set 1405# CONFIG_SSB is not set
1052 1406
1053# 1407#
1054# Multifunction device drivers 1408# Multifunction device drivers
1055# 1409#
1410# CONFIG_MFD_CORE is not set
1056CONFIG_MFD_SM501=y 1411CONFIG_MFD_SM501=y
1412# CONFIG_MFD_SM501_GPIO is not set
1057# CONFIG_MFD_ASIC3 is not set 1413# CONFIG_MFD_ASIC3 is not set
1058# CONFIG_HTC_EGPIO is not set 1414# CONFIG_HTC_EGPIO is not set
1059# CONFIG_HTC_PASIC3 is not set 1415# CONFIG_HTC_PASIC3 is not set
1416# CONFIG_UCB1400_CORE is not set
1417# CONFIG_TPS65010 is not set
1418# CONFIG_TWL4030_CORE is not set
1419# CONFIG_MFD_TMIO is not set
1420# CONFIG_MFD_T7L66XB is not set
1421# CONFIG_MFD_TC6387XB is not set
1422# CONFIG_MFD_TC6393XB is not set
1423# CONFIG_PMIC_DA903X is not set
1424# CONFIG_MFD_WM8400 is not set
1425# CONFIG_MFD_WM8350_I2C is not set
1426# CONFIG_MFD_PCF50633 is not set
1060 1427
1061# 1428#
1062# Multimedia devices 1429# Multimedia devices
@@ -1065,14 +1432,189 @@ CONFIG_MFD_SM501=y
1065# 1432#
1066# Multimedia core support 1433# Multimedia core support
1067# 1434#
1068# CONFIG_VIDEO_DEV is not set 1435CONFIG_VIDEO_DEV=m
1069# CONFIG_DVB_CORE is not set 1436CONFIG_VIDEO_V4L2_COMMON=m
1070# CONFIG_VIDEO_MEDIA is not set 1437CONFIG_VIDEO_ALLOW_V4L1=y
1438CONFIG_VIDEO_V4L1_COMPAT=y
1439CONFIG_DVB_CORE=m
1440CONFIG_VIDEO_MEDIA=m
1071 1441
1072# 1442#
1073# Multimedia drivers 1443# Multimedia drivers
1074# 1444#
1075# CONFIG_DAB is not set 1445CONFIG_MEDIA_ATTACH=y
1446CONFIG_MEDIA_TUNER=m
1447# CONFIG_MEDIA_TUNER_CUSTOMISE is not set
1448CONFIG_MEDIA_TUNER_SIMPLE=m
1449CONFIG_MEDIA_TUNER_TDA8290=m
1450CONFIG_MEDIA_TUNER_TDA827X=m
1451CONFIG_MEDIA_TUNER_TDA18271=m
1452CONFIG_MEDIA_TUNER_TDA9887=m
1453CONFIG_MEDIA_TUNER_TEA5761=m
1454CONFIG_MEDIA_TUNER_TEA5767=m
1455CONFIG_MEDIA_TUNER_MT20XX=m
1456CONFIG_MEDIA_TUNER_MT2060=m
1457CONFIG_MEDIA_TUNER_MT2266=m
1458CONFIG_MEDIA_TUNER_QT1010=m
1459CONFIG_MEDIA_TUNER_XC2028=m
1460CONFIG_MEDIA_TUNER_XC5000=m
1461CONFIG_MEDIA_TUNER_MXL5005S=m
1462CONFIG_MEDIA_TUNER_MXL5007T=m
1463CONFIG_MEDIA_TUNER_MC44S803=m
1464CONFIG_VIDEO_V4L2=m
1465CONFIG_VIDEO_V4L1=m
1466CONFIG_VIDEOBUF_GEN=m
1467CONFIG_VIDEOBUF_VMALLOC=m
1468CONFIG_VIDEO_TVEEPROM=m
1469CONFIG_VIDEO_CAPTURE_DRIVERS=y
1470# CONFIG_VIDEO_ADV_DEBUG is not set
1471# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set
1472CONFIG_VIDEO_HELPER_CHIPS_AUTO=y
1473CONFIG_VIDEO_VIVI=m
1474CONFIG_VIDEO_PMS=m
1475CONFIG_VIDEO_BWQCAM=m
1476CONFIG_VIDEO_CQCAM=m
1477CONFIG_VIDEO_W9966=m
1478CONFIG_VIDEO_CPIA=m
1479CONFIG_VIDEO_CPIA_PP=m
1480CONFIG_VIDEO_CPIA_USB=m
1481CONFIG_VIDEO_CPIA2=m
1482CONFIG_VIDEO_SAA5246A=m
1483CONFIG_VIDEO_SAA5249=m
1484CONFIG_VIDEO_AU0828=m
1485# CONFIG_SOC_CAMERA is not set
1486CONFIG_V4L_USB_DRIVERS=y
1487# CONFIG_USB_VIDEO_CLASS is not set
1488CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y
1489CONFIG_USB_GSPCA=m
1490# CONFIG_USB_M5602 is not set
1491# CONFIG_USB_STV06XX is not set
1492# CONFIG_USB_GSPCA_CONEX is not set
1493# CONFIG_USB_GSPCA_ETOMS is not set
1494# CONFIG_USB_GSPCA_FINEPIX is not set
1495# CONFIG_USB_GSPCA_MARS is not set
1496# CONFIG_USB_GSPCA_MR97310A is not set
1497# CONFIG_USB_GSPCA_OV519 is not set
1498# CONFIG_USB_GSPCA_OV534 is not set
1499# CONFIG_USB_GSPCA_PAC207 is not set
1500# CONFIG_USB_GSPCA_PAC7311 is not set
1501# CONFIG_USB_GSPCA_SONIXB is not set
1502# CONFIG_USB_GSPCA_SONIXJ is not set
1503# CONFIG_USB_GSPCA_SPCA500 is not set
1504# CONFIG_USB_GSPCA_SPCA501 is not set
1505# CONFIG_USB_GSPCA_SPCA505 is not set
1506# CONFIG_USB_GSPCA_SPCA506 is not set
1507# CONFIG_USB_GSPCA_SPCA508 is not set
1508# CONFIG_USB_GSPCA_SPCA561 is not set
1509# CONFIG_USB_GSPCA_SQ905 is not set
1510# CONFIG_USB_GSPCA_SQ905C is not set
1511# CONFIG_USB_GSPCA_STK014 is not set
1512# CONFIG_USB_GSPCA_SUNPLUS is not set
1513# CONFIG_USB_GSPCA_T613 is not set
1514# CONFIG_USB_GSPCA_TV8532 is not set
1515# CONFIG_USB_GSPCA_VC032X is not set
1516# CONFIG_USB_GSPCA_ZC3XX is not set
1517# CONFIG_VIDEO_PVRUSB2 is not set
1518# CONFIG_VIDEO_HDPVR is not set
1519# CONFIG_VIDEO_EM28XX is not set
1520# CONFIG_VIDEO_CX231XX is not set
1521# CONFIG_VIDEO_USBVISION is not set
1522# CONFIG_USB_VICAM is not set
1523# CONFIG_USB_IBMCAM is not set
1524# CONFIG_USB_KONICAWC is not set
1525# CONFIG_USB_QUICKCAM_MESSENGER is not set
1526# CONFIG_USB_ET61X251 is not set
1527# CONFIG_VIDEO_OVCAMCHIP is not set
1528# CONFIG_USB_OV511 is not set
1529# CONFIG_USB_SE401 is not set
1530# CONFIG_USB_SN9C102 is not set
1531# CONFIG_USB_STV680 is not set
1532# CONFIG_USB_ZC0301 is not set
1533# CONFIG_USB_PWC is not set
1534CONFIG_USB_PWC_INPUT_EVDEV=y
1535# CONFIG_USB_ZR364XX is not set
1536# CONFIG_USB_STKWEBCAM is not set
1537# CONFIG_USB_S2255 is not set
1538CONFIG_RADIO_ADAPTERS=y
1539CONFIG_RADIO_CADET=m
1540CONFIG_RADIO_RTRACK=m
1541CONFIG_RADIO_RTRACK2=m
1542CONFIG_RADIO_AZTECH=m
1543CONFIG_RADIO_GEMTEK=m
1544CONFIG_RADIO_SF16FMI=m
1545CONFIG_RADIO_SF16FMR2=m
1546CONFIG_RADIO_TERRATEC=m
1547CONFIG_RADIO_TRUST=m
1548CONFIG_RADIO_TYPHOON=m
1549CONFIG_RADIO_TYPHOON_PROC_FS=y
1550CONFIG_RADIO_ZOLTRIX=m
1551CONFIG_USB_DSBR=m
1552CONFIG_USB_SI470X=m
1553CONFIG_USB_MR800=m
1554CONFIG_RADIO_TEA5764=m
1555CONFIG_DVB_DYNAMIC_MINORS=y
1556CONFIG_DVB_CAPTURE_DRIVERS=y
1557# CONFIG_TTPCI_EEPROM is not set
1558
1559#
1560# Supported USB Adapters
1561#
1562CONFIG_DVB_USB=m
1563# CONFIG_DVB_USB_DEBUG is not set
1564# CONFIG_DVB_USB_A800 is not set
1565CONFIG_DVB_USB_DIBUSB_MB=m
1566# CONFIG_DVB_USB_DIBUSB_MB_FAULTY is not set
1567CONFIG_DVB_USB_DIBUSB_MC=m
1568CONFIG_DVB_USB_DIB0700=m
1569CONFIG_DVB_USB_UMT_010=m
1570CONFIG_DVB_USB_CXUSB=m
1571CONFIG_DVB_USB_M920X=m
1572# CONFIG_DVB_USB_GL861 is not set
1573# CONFIG_DVB_USB_AU6610 is not set
1574# CONFIG_DVB_USB_DIGITV is not set
1575# CONFIG_DVB_USB_VP7045 is not set
1576# CONFIG_DVB_USB_VP702X is not set
1577# CONFIG_DVB_USB_GP8PSK is not set
1578# CONFIG_DVB_USB_NOVA_T_USB2 is not set
1579# CONFIG_DVB_USB_TTUSB2 is not set
1580# CONFIG_DVB_USB_DTT200U is not set
1581# CONFIG_DVB_USB_OPERA1 is not set
1582CONFIG_DVB_USB_AF9005=m
1583# CONFIG_DVB_USB_AF9005_REMOTE is not set
1584# CONFIG_DVB_USB_DW2102 is not set
1585# CONFIG_DVB_USB_CINERGY_T2 is not set
1586# CONFIG_DVB_USB_ANYSEE is not set
1587# CONFIG_DVB_USB_DTV5100 is not set
1588# CONFIG_DVB_USB_AF9015 is not set
1589# CONFIG_DVB_USB_CE6230 is not set
1590# CONFIG_DVB_SIANO_SMS1XXX is not set
1591
1592#
1593# Supported FlexCopII (B2C2) Adapters
1594#
1595# CONFIG_DVB_B2C2_FLEXCOP is not set
1596
1597#
1598# Supported DVB Frontends
1599#
1600# CONFIG_DVB_FE_CUSTOMISE is not set
1601CONFIG_DVB_CX22702=m
1602CONFIG_DVB_TDA1004X=m
1603CONFIG_DVB_MT352=m
1604CONFIG_DVB_ZL10353=m
1605CONFIG_DVB_DIB3000MB=m
1606CONFIG_DVB_DIB3000MC=m
1607CONFIG_DVB_DIB7000M=m
1608CONFIG_DVB_DIB7000P=m
1609CONFIG_DVB_LGDT330X=m
1610CONFIG_DVB_LGDT3305=m
1611CONFIG_DVB_AU8522=m
1612CONFIG_DVB_S5H1411=m
1613CONFIG_DVB_PLL=m
1614CONFIG_DVB_TUNER_DIB0070=m
1615CONFIG_DVB_LGS8GL5=m
1616CONFIG_DAB=y
1617CONFIG_USB_DABUSB=m
1076 1618
1077# 1619#
1078# Graphics support 1620# Graphics support
@@ -1082,6 +1624,7 @@ CONFIG_MFD_SM501=y
1082CONFIG_FB=y 1624CONFIG_FB=y
1083CONFIG_FIRMWARE_EDID=y 1625CONFIG_FIRMWARE_EDID=y
1084# CONFIG_FB_DDC is not set 1626# CONFIG_FB_DDC is not set
1627# CONFIG_FB_BOOT_VESA_SUPPORT is not set
1085CONFIG_FB_CFB_FILLRECT=y 1628CONFIG_FB_CFB_FILLRECT=y
1086CONFIG_FB_CFB_COPYAREA=y 1629CONFIG_FB_CFB_COPYAREA=y
1087CONFIG_FB_CFB_IMAGEBLIT=y 1630CONFIG_FB_CFB_IMAGEBLIT=y
@@ -1105,7 +1648,19 @@ CONFIG_FB_S3C2410=y
1105# CONFIG_FB_S3C2410_DEBUG is not set 1648# CONFIG_FB_S3C2410_DEBUG is not set
1106CONFIG_FB_SM501=y 1649CONFIG_FB_SM501=y
1107# CONFIG_FB_VIRTUAL is not set 1650# CONFIG_FB_VIRTUAL is not set
1108# CONFIG_BACKLIGHT_LCD_SUPPORT is not set 1651# CONFIG_FB_METRONOME is not set
1652# CONFIG_FB_MB862XX is not set
1653# CONFIG_FB_BROADSHEET is not set
1654CONFIG_BACKLIGHT_LCD_SUPPORT=y
1655CONFIG_LCD_CLASS_DEVICE=m
1656# CONFIG_LCD_LTV350QV is not set
1657# CONFIG_LCD_ILI9320 is not set
1658# CONFIG_LCD_TDO24M is not set
1659# CONFIG_LCD_VGG2432A4 is not set
1660# CONFIG_LCD_PLATFORM is not set
1661CONFIG_BACKLIGHT_CLASS_DEVICE=m
1662CONFIG_BACKLIGHT_GENERIC=m
1663CONFIG_BACKLIGHT_PWM=m
1109 1664
1110# 1665#
1111# Display device support 1666# Display device support
@@ -1125,11 +1680,54 @@ CONFIG_FRAMEBUFFER_CONSOLE=y
1125CONFIG_FONT_8x8=y 1680CONFIG_FONT_8x8=y
1126CONFIG_FONT_8x16=y 1681CONFIG_FONT_8x16=y
1127# CONFIG_LOGO is not set 1682# CONFIG_LOGO is not set
1128 1683CONFIG_SOUND=y
1129# 1684CONFIG_SOUND_OSS_CORE=y
1130# Sound 1685CONFIG_SND=y
1131# 1686CONFIG_SND_TIMER=y
1132# CONFIG_SOUND is not set 1687CONFIG_SND_PCM=y
1688CONFIG_SND_HWDEP=m
1689CONFIG_SND_RAWMIDI=m
1690CONFIG_SND_JACK=y
1691CONFIG_SND_SEQUENCER=m
1692# CONFIG_SND_SEQ_DUMMY is not set
1693CONFIG_SND_OSSEMUL=y
1694CONFIG_SND_MIXER_OSS=m
1695CONFIG_SND_PCM_OSS=m
1696CONFIG_SND_PCM_OSS_PLUGINS=y
1697CONFIG_SND_SEQUENCER_OSS=y
1698# CONFIG_SND_DYNAMIC_MINORS is not set
1699CONFIG_SND_SUPPORT_OLD_API=y
1700CONFIG_SND_VERBOSE_PROCFS=y
1701CONFIG_SND_VERBOSE_PRINTK=y
1702# CONFIG_SND_DEBUG is not set
1703CONFIG_SND_VMASTER=y
1704CONFIG_SND_AC97_CODEC=m
1705# CONFIG_SND_DRIVERS is not set
1706# CONFIG_SND_ARM is not set
1707# CONFIG_SND_SPI is not set
1708CONFIG_SND_USB=y
1709CONFIG_SND_USB_AUDIO=m
1710CONFIG_SND_USB_CAIAQ=m
1711# CONFIG_SND_USB_CAIAQ_INPUT is not set
1712CONFIG_SND_SOC=y
1713CONFIG_SND_SOC_AC97_BUS=y
1714CONFIG_SND_S3C24XX_SOC=y
1715CONFIG_SND_S3C24XX_SOC_I2S=m
1716CONFIG_SND_S3C_I2SV2_SOC=m
1717CONFIG_SND_S3C2412_SOC_I2S=m
1718CONFIG_SND_S3C2443_SOC_AC97=m
1719CONFIG_SND_S3C24XX_SOC_JIVE_WM8750=m
1720CONFIG_SND_S3C24XX_SOC_SMDK2443_WM9710=m
1721CONFIG_SND_S3C24XX_SOC_LN2440SBC_ALC650=m
1722CONFIG_SND_S3C24XX_SOC_S3C24XX_UDA134X=m
1723CONFIG_SND_SOC_I2C_AND_SPI=y
1724# CONFIG_SND_SOC_ALL_CODECS is not set
1725CONFIG_SND_SOC_AC97_CODEC=m
1726CONFIG_SND_SOC_L3=m
1727CONFIG_SND_SOC_UDA134X=m
1728CONFIG_SND_SOC_WM8750=m
1729# CONFIG_SOUND_PRIME is not set
1730CONFIG_AC97_BUS=y
1133CONFIG_HID_SUPPORT=y 1731CONFIG_HID_SUPPORT=y
1134CONFIG_HID=y 1732CONFIG_HID=y
1135# CONFIG_HID_DEBUG is not set 1733# CONFIG_HID_DEBUG is not set
@@ -1139,12 +1737,12 @@ CONFIG_HID=y
1139# USB Input Devices 1737# USB Input Devices
1140# 1738#
1141# CONFIG_USB_HID is not set 1739# CONFIG_USB_HID is not set
1740# CONFIG_HID_PID is not set
1142 1741
1143# 1742#
1144# USB HID Boot Protocol drivers 1743# Special HID drivers
1145# 1744#
1146# CONFIG_USB_KBD is not set 1745CONFIG_HID_APPLE=m
1147# CONFIG_USB_MOUSE is not set
1148CONFIG_USB_SUPPORT=y 1746CONFIG_USB_SUPPORT=y
1149CONFIG_USB_ARCH_HAS_HCD=y 1747CONFIG_USB_ARCH_HAS_HCD=y
1150CONFIG_USB_ARCH_HAS_OHCI=y 1748CONFIG_USB_ARCH_HAS_OHCI=y
@@ -1161,19 +1759,26 @@ CONFIG_USB_DEVICE_CLASS=y
1161# CONFIG_USB_DYNAMIC_MINORS is not set 1759# CONFIG_USB_DYNAMIC_MINORS is not set
1162# CONFIG_USB_SUSPEND is not set 1760# CONFIG_USB_SUSPEND is not set
1163# CONFIG_USB_OTG is not set 1761# CONFIG_USB_OTG is not set
1762CONFIG_USB_MON=y
1763# CONFIG_USB_WUSB is not set
1764# CONFIG_USB_WUSB_CBAF is not set
1164 1765
1165# 1766#
1166# USB Host Controller Drivers 1767# USB Host Controller Drivers
1167# 1768#
1168# CONFIG_USB_C67X00_HCD is not set 1769# CONFIG_USB_C67X00_HCD is not set
1770# CONFIG_USB_OXU210HP_HCD is not set
1169# CONFIG_USB_ISP116X_HCD is not set 1771# CONFIG_USB_ISP116X_HCD is not set
1170# CONFIG_USB_ISP1760_HCD is not set 1772# CONFIG_USB_ISP1760_HCD is not set
1171CONFIG_USB_OHCI_HCD=y 1773CONFIG_USB_OHCI_HCD=y
1172# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set 1774# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
1173# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set 1775# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
1174CONFIG_USB_OHCI_LITTLE_ENDIAN=y 1776CONFIG_USB_OHCI_LITTLE_ENDIAN=y
1777# CONFIG_USB_U132_HCD is not set
1175# CONFIG_USB_SL811_HCD is not set 1778# CONFIG_USB_SL811_HCD is not set
1176# CONFIG_USB_R8A66597_HCD is not set 1779# CONFIG_USB_R8A66597_HCD is not set
1780# CONFIG_USB_HWA_HCD is not set
1781# CONFIG_USB_MUSB_HDRC is not set
1177 1782
1178# 1783#
1179# USB Device Class drivers 1784# USB Device Class drivers
@@ -1181,53 +1786,51 @@ CONFIG_USB_OHCI_LITTLE_ENDIAN=y
1181CONFIG_USB_ACM=m 1786CONFIG_USB_ACM=m
1182CONFIG_USB_PRINTER=m 1787CONFIG_USB_PRINTER=m
1183CONFIG_USB_WDM=m 1788CONFIG_USB_WDM=m
1789# CONFIG_USB_TMC is not set
1184 1790
1185# 1791#
1186# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' 1792# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
1187# 1793#
1188 1794
1189# 1795#
1190# may also be needed; see USB_STORAGE Help for more information 1796# also be needed; see USB_STORAGE Help for more info
1191# 1797#
1192CONFIG_USB_STORAGE=m 1798CONFIG_USB_STORAGE=m
1193# CONFIG_USB_STORAGE_DEBUG is not set 1799# CONFIG_USB_STORAGE_DEBUG is not set
1194# CONFIG_USB_STORAGE_DATAFAB is not set 1800CONFIG_USB_STORAGE_DATAFAB=m
1195# CONFIG_USB_STORAGE_FREECOM is not set 1801CONFIG_USB_STORAGE_FREECOM=m
1196# CONFIG_USB_STORAGE_ISD200 is not set 1802CONFIG_USB_STORAGE_ISD200=m
1197# CONFIG_USB_STORAGE_DPCM is not set 1803CONFIG_USB_STORAGE_USBAT=m
1198# CONFIG_USB_STORAGE_USBAT is not set 1804CONFIG_USB_STORAGE_SDDR09=m
1199# CONFIG_USB_STORAGE_SDDR09 is not set 1805CONFIG_USB_STORAGE_SDDR55=m
1200# CONFIG_USB_STORAGE_SDDR55 is not set 1806CONFIG_USB_STORAGE_JUMPSHOT=m
1201# CONFIG_USB_STORAGE_JUMPSHOT is not set 1807CONFIG_USB_STORAGE_ALAUDA=m
1202# CONFIG_USB_STORAGE_ALAUDA is not set 1808CONFIG_USB_STORAGE_ONETOUCH=m
1203# CONFIG_USB_STORAGE_ONETOUCH is not set 1809CONFIG_USB_STORAGE_KARMA=m
1204# CONFIG_USB_STORAGE_KARMA is not set 1810CONFIG_USB_STORAGE_CYPRESS_ATACB=m
1205# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
1206CONFIG_USB_LIBUSUAL=y 1811CONFIG_USB_LIBUSUAL=y
1207 1812
1208# 1813#
1209# USB Imaging devices 1814# USB Imaging devices
1210# 1815#
1211# CONFIG_USB_MDC800 is not set 1816CONFIG_USB_MDC800=m
1212# CONFIG_USB_MICROTEK is not set 1817CONFIG_USB_MICROTEK=m
1213CONFIG_USB_MON=y
1214 1818
1215# 1819#
1216# USB port drivers 1820# USB port drivers
1217# 1821#
1218# CONFIG_USB_USS720 is not set 1822CONFIG_USB_USS720=m
1219CONFIG_USB_SERIAL=y 1823CONFIG_USB_SERIAL=y
1220# CONFIG_USB_SERIAL_CONSOLE is not set 1824# CONFIG_USB_SERIAL_CONSOLE is not set
1221# CONFIG_USB_EZUSB is not set 1825# CONFIG_USB_EZUSB is not set
1222CONFIG_USB_SERIAL_GENERIC=y 1826CONFIG_USB_SERIAL_GENERIC=y
1223# CONFIG_USB_SERIAL_AIRCABLE is not set 1827# CONFIG_USB_SERIAL_AIRCABLE is not set
1224# CONFIG_USB_SERIAL_AIRPRIME is not set
1225# CONFIG_USB_SERIAL_ARK3116 is not set 1828# CONFIG_USB_SERIAL_ARK3116 is not set
1226# CONFIG_USB_SERIAL_BELKIN is not set 1829# CONFIG_USB_SERIAL_BELKIN is not set
1227# CONFIG_USB_SERIAL_CH341 is not set 1830# CONFIG_USB_SERIAL_CH341 is not set
1228# CONFIG_USB_SERIAL_WHITEHEAT is not set 1831# CONFIG_USB_SERIAL_WHITEHEAT is not set
1229# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set 1832# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set
1230# CONFIG_USB_SERIAL_CP2101 is not set 1833# CONFIG_USB_SERIAL_CP210X is not set
1231# CONFIG_USB_SERIAL_CYPRESS_M8 is not set 1834# CONFIG_USB_SERIAL_CYPRESS_M8 is not set
1232# CONFIG_USB_SERIAL_EMPEG is not set 1835# CONFIG_USB_SERIAL_EMPEG is not set
1233CONFIG_USB_SERIAL_FTDI_SIO=y 1836CONFIG_USB_SERIAL_FTDI_SIO=y
@@ -1251,42 +1854,71 @@ CONFIG_USB_SERIAL_FTDI_SIO=y
1251CONFIG_USB_SERIAL_NAVMAN=m 1854CONFIG_USB_SERIAL_NAVMAN=m
1252CONFIG_USB_SERIAL_PL2303=y 1855CONFIG_USB_SERIAL_PL2303=y
1253# CONFIG_USB_SERIAL_OTI6858 is not set 1856# CONFIG_USB_SERIAL_OTI6858 is not set
1857# CONFIG_USB_SERIAL_QUALCOMM is not set
1254# CONFIG_USB_SERIAL_SPCP8X5 is not set 1858# CONFIG_USB_SERIAL_SPCP8X5 is not set
1255# CONFIG_USB_SERIAL_HP4X is not set 1859# CONFIG_USB_SERIAL_HP4X is not set
1256# CONFIG_USB_SERIAL_SAFE is not set 1860# CONFIG_USB_SERIAL_SAFE is not set
1861# CONFIG_USB_SERIAL_SIEMENS_MPI is not set
1257# CONFIG_USB_SERIAL_SIERRAWIRELESS is not set 1862# CONFIG_USB_SERIAL_SIERRAWIRELESS is not set
1863# CONFIG_USB_SERIAL_SYMBOL is not set
1258# CONFIG_USB_SERIAL_TI is not set 1864# CONFIG_USB_SERIAL_TI is not set
1259# CONFIG_USB_SERIAL_CYBERJACK is not set 1865# CONFIG_USB_SERIAL_CYBERJACK is not set
1260# CONFIG_USB_SERIAL_XIRCOM is not set 1866# CONFIG_USB_SERIAL_XIRCOM is not set
1261CONFIG_USB_SERIAL_OPTION=m 1867CONFIG_USB_SERIAL_OPTION=m
1262# CONFIG_USB_SERIAL_OMNINET is not set 1868# CONFIG_USB_SERIAL_OMNINET is not set
1869# CONFIG_USB_SERIAL_OPTICON is not set
1263# CONFIG_USB_SERIAL_DEBUG is not set 1870# CONFIG_USB_SERIAL_DEBUG is not set
1264 1871
1265# 1872#
1266# USB Miscellaneous drivers 1873# USB Miscellaneous drivers
1267# 1874#
1268# CONFIG_USB_EMI62 is not set 1875CONFIG_USB_EMI62=m
1269# CONFIG_USB_EMI26 is not set 1876CONFIG_USB_EMI26=m
1270# CONFIG_USB_ADUTUX is not set 1877CONFIG_USB_ADUTUX=m
1271# CONFIG_USB_AUERSWALD is not set 1878CONFIG_USB_SEVSEG=m
1272# CONFIG_USB_RIO500 is not set 1879CONFIG_USB_RIO500=m
1273# CONFIG_USB_LEGOTOWER is not set 1880CONFIG_USB_LEGOTOWER=m
1274# CONFIG_USB_LCD is not set 1881CONFIG_USB_LCD=m
1275# CONFIG_USB_BERRY_CHARGE is not set 1882CONFIG_USB_BERRY_CHARGE=m
1276CONFIG_USB_LED=m 1883CONFIG_USB_LED=m
1277# CONFIG_USB_CYPRESS_CY7C63 is not set 1884CONFIG_USB_CYPRESS_CY7C63=m
1278# CONFIG_USB_CYTHERM is not set 1885CONFIG_USB_CYTHERM=m
1279# CONFIG_USB_PHIDGET is not set 1886CONFIG_USB_IDMOUSE=m
1280# CONFIG_USB_IDMOUSE is not set 1887CONFIG_USB_FTDI_ELAN=m
1281# CONFIG_USB_FTDI_ELAN is not set 1888CONFIG_USB_APPLEDISPLAY=m
1282# CONFIG_USB_APPLEDISPLAY is not set
1283CONFIG_USB_LD=m 1889CONFIG_USB_LD=m
1284# CONFIG_USB_TRANCEVIBRATOR is not set 1890CONFIG_USB_TRANCEVIBRATOR=m
1285# CONFIG_USB_IOWARRIOR is not set 1891CONFIG_USB_IOWARRIOR=m
1286# CONFIG_USB_TEST is not set 1892CONFIG_USB_TEST=m
1287# CONFIG_USB_ISIGHTFW is not set 1893# CONFIG_USB_ISIGHTFW is not set
1894# CONFIG_USB_VST is not set
1288# CONFIG_USB_GADGET is not set 1895# CONFIG_USB_GADGET is not set
1289# CONFIG_MMC is not set 1896
1897#
1898# OTG and related infrastructure
1899#
1900# CONFIG_USB_GPIO_VBUS is not set
1901# CONFIG_NOP_USB_XCEIV is not set
1902CONFIG_MMC=y
1903# CONFIG_MMC_DEBUG is not set
1904# CONFIG_MMC_UNSAFE_RESUME is not set
1905
1906#
1907# MMC/SD/SDIO Card Drivers
1908#
1909CONFIG_MMC_BLOCK=y
1910CONFIG_MMC_BLOCK_BOUNCE=y
1911CONFIG_SDIO_UART=m
1912CONFIG_MMC_TEST=m
1913
1914#
1915# MMC/SD/SDIO Host Controller Drivers
1916#
1917CONFIG_MMC_SDHCI=m
1918CONFIG_MMC_SPI=m
1919CONFIG_MMC_S3C=y
1920# CONFIG_MEMSTICK is not set
1921# CONFIG_ACCESSIBILITY is not set
1290CONFIG_NEW_LEDS=y 1922CONFIG_NEW_LEDS=y
1291CONFIG_LEDS_CLASS=m 1923CONFIG_LEDS_CLASS=m
1292 1924
@@ -1295,7 +1927,14 @@ CONFIG_LEDS_CLASS=m
1295# 1927#
1296CONFIG_LEDS_S3C24XX=m 1928CONFIG_LEDS_S3C24XX=m
1297CONFIG_LEDS_H1940=m 1929CONFIG_LEDS_H1940=m
1298# CONFIG_LEDS_GPIO is not set 1930CONFIG_LEDS_PCA9532=m
1931CONFIG_LEDS_GPIO=m
1932CONFIG_LEDS_GPIO_PLATFORM=y
1933CONFIG_LEDS_LP5521=m
1934CONFIG_LEDS_PCA955X=m
1935CONFIG_LEDS_DAC124S085=m
1936CONFIG_LEDS_PWM=m
1937CONFIG_LEDS_BD2802=m
1299 1938
1300# 1939#
1301# LED Triggers 1940# LED Triggers
@@ -1304,7 +1943,13 @@ CONFIG_LEDS_TRIGGERS=y
1304CONFIG_LEDS_TRIGGER_TIMER=m 1943CONFIG_LEDS_TRIGGER_TIMER=m
1305# CONFIG_LEDS_TRIGGER_IDE_DISK is not set 1944# CONFIG_LEDS_TRIGGER_IDE_DISK is not set
1306CONFIG_LEDS_TRIGGER_HEARTBEAT=m 1945CONFIG_LEDS_TRIGGER_HEARTBEAT=m
1307# CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set 1946CONFIG_LEDS_TRIGGER_BACKLIGHT=m
1947CONFIG_LEDS_TRIGGER_GPIO=m
1948CONFIG_LEDS_TRIGGER_DEFAULT_ON=m
1949
1950#
1951# iptables trigger is under Netfilter config (LED target)
1952#
1308CONFIG_RTC_LIB=y 1953CONFIG_RTC_LIB=y
1309CONFIG_RTC_CLASS=y 1954CONFIG_RTC_CLASS=y
1310CONFIG_RTC_HCTOSYS=y 1955CONFIG_RTC_HCTOSYS=y
@@ -1335,31 +1980,43 @@ CONFIG_RTC_INTF_DEV=y
1335# CONFIG_RTC_DRV_M41T80 is not set 1980# CONFIG_RTC_DRV_M41T80 is not set
1336# CONFIG_RTC_DRV_S35390A is not set 1981# CONFIG_RTC_DRV_S35390A is not set
1337# CONFIG_RTC_DRV_FM3130 is not set 1982# CONFIG_RTC_DRV_FM3130 is not set
1983# CONFIG_RTC_DRV_RX8581 is not set
1338 1984
1339# 1985#
1340# SPI RTC drivers 1986# SPI RTC drivers
1341# 1987#
1988# CONFIG_RTC_DRV_M41T94 is not set
1989# CONFIG_RTC_DRV_DS1305 is not set
1990# CONFIG_RTC_DRV_DS1390 is not set
1342# CONFIG_RTC_DRV_MAX6902 is not set 1991# CONFIG_RTC_DRV_MAX6902 is not set
1343# CONFIG_RTC_DRV_R9701 is not set 1992# CONFIG_RTC_DRV_R9701 is not set
1344# CONFIG_RTC_DRV_RS5C348 is not set 1993# CONFIG_RTC_DRV_RS5C348 is not set
1994# CONFIG_RTC_DRV_DS3234 is not set
1345 1995
1346# 1996#
1347# Platform RTC drivers 1997# Platform RTC drivers
1348# 1998#
1349# CONFIG_RTC_DRV_CMOS is not set 1999# CONFIG_RTC_DRV_CMOS is not set
2000# CONFIG_RTC_DRV_DS1286 is not set
1350# CONFIG_RTC_DRV_DS1511 is not set 2001# CONFIG_RTC_DRV_DS1511 is not set
1351# CONFIG_RTC_DRV_DS1553 is not set 2002# CONFIG_RTC_DRV_DS1553 is not set
1352# CONFIG_RTC_DRV_DS1742 is not set 2003# CONFIG_RTC_DRV_DS1742 is not set
1353# CONFIG_RTC_DRV_STK17TA8 is not set 2004# CONFIG_RTC_DRV_STK17TA8 is not set
1354# CONFIG_RTC_DRV_M48T86 is not set 2005# CONFIG_RTC_DRV_M48T86 is not set
2006# CONFIG_RTC_DRV_M48T35 is not set
1355# CONFIG_RTC_DRV_M48T59 is not set 2007# CONFIG_RTC_DRV_M48T59 is not set
2008# CONFIG_RTC_DRV_BQ4802 is not set
1356# CONFIG_RTC_DRV_V3020 is not set 2009# CONFIG_RTC_DRV_V3020 is not set
1357 2010
1358# 2011#
1359# on-CPU RTC drivers 2012# on-CPU RTC drivers
1360# 2013#
1361CONFIG_RTC_DRV_S3C=y 2014CONFIG_RTC_DRV_S3C=y
2015# CONFIG_DMADEVICES is not set
2016# CONFIG_AUXDISPLAY is not set
2017# CONFIG_REGULATOR is not set
1362# CONFIG_UIO is not set 2018# CONFIG_UIO is not set
2019# CONFIG_STAGING is not set
1363 2020
1364# 2021#
1365# File systems 2022# File systems
@@ -1370,27 +2027,40 @@ CONFIG_EXT2_FS_POSIX_ACL=y
1370CONFIG_EXT2_FS_SECURITY=y 2027CONFIG_EXT2_FS_SECURITY=y
1371# CONFIG_EXT2_FS_XIP is not set 2028# CONFIG_EXT2_FS_XIP is not set
1372CONFIG_EXT3_FS=y 2029CONFIG_EXT3_FS=y
2030# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
1373CONFIG_EXT3_FS_XATTR=y 2031CONFIG_EXT3_FS_XATTR=y
1374CONFIG_EXT3_FS_POSIX_ACL=y 2032CONFIG_EXT3_FS_POSIX_ACL=y
1375# CONFIG_EXT3_FS_SECURITY is not set 2033# CONFIG_EXT3_FS_SECURITY is not set
1376# CONFIG_EXT4DEV_FS is not set 2034CONFIG_EXT4_FS=m
2035# CONFIG_EXT4DEV_COMPAT is not set
2036CONFIG_EXT4_FS_XATTR=y
2037CONFIG_EXT4_FS_POSIX_ACL=y
2038# CONFIG_EXT4_FS_SECURITY is not set
1377CONFIG_JBD=y 2039CONFIG_JBD=y
2040CONFIG_JBD2=m
1378CONFIG_FS_MBCACHE=y 2041CONFIG_FS_MBCACHE=y
1379# CONFIG_REISERFS_FS is not set 2042# CONFIG_REISERFS_FS is not set
1380# CONFIG_JFS_FS is not set 2043# CONFIG_JFS_FS is not set
1381CONFIG_FS_POSIX_ACL=y 2044CONFIG_FS_POSIX_ACL=y
2045CONFIG_FILE_LOCKING=y
1382# CONFIG_XFS_FS is not set 2046# CONFIG_XFS_FS is not set
1383# CONFIG_OCFS2_FS is not set 2047# CONFIG_OCFS2_FS is not set
2048# CONFIG_BTRFS_FS is not set
1384CONFIG_DNOTIFY=y 2049CONFIG_DNOTIFY=y
1385CONFIG_INOTIFY=y 2050CONFIG_INOTIFY=y
1386CONFIG_INOTIFY_USER=y 2051CONFIG_INOTIFY_USER=y
1387# CONFIG_QUOTA is not set 2052# CONFIG_QUOTA is not set
1388# CONFIG_AUTOFS_FS is not set 2053CONFIG_AUTOFS_FS=m
1389# CONFIG_AUTOFS4_FS is not set 2054CONFIG_AUTOFS4_FS=m
1390# CONFIG_FUSE_FS is not set 2055CONFIG_FUSE_FS=m
1391CONFIG_GENERIC_ACL=y 2056CONFIG_GENERIC_ACL=y
1392 2057
1393# 2058#
2059# Caches
2060#
2061# CONFIG_FSCACHE is not set
2062
2063#
1394# CD-ROM/DVD Filesystems 2064# CD-ROM/DVD Filesystems
1395# 2065#
1396CONFIG_ISO9660_FS=y 2066CONFIG_ISO9660_FS=y
@@ -1416,15 +2086,13 @@ CONFIG_NTFS_FS=m
1416# 2086#
1417CONFIG_PROC_FS=y 2087CONFIG_PROC_FS=y
1418CONFIG_PROC_SYSCTL=y 2088CONFIG_PROC_SYSCTL=y
2089CONFIG_PROC_PAGE_MONITOR=y
1419CONFIG_SYSFS=y 2090CONFIG_SYSFS=y
1420CONFIG_TMPFS=y 2091CONFIG_TMPFS=y
1421CONFIG_TMPFS_POSIX_ACL=y 2092CONFIG_TMPFS_POSIX_ACL=y
1422# CONFIG_HUGETLB_PAGE is not set 2093# CONFIG_HUGETLB_PAGE is not set
1423CONFIG_CONFIGFS_FS=m 2094CONFIG_CONFIGFS_FS=m
1424 2095CONFIG_MISC_FILESYSTEMS=y
1425#
1426# Miscellaneous filesystems
1427#
1428# CONFIG_ADFS_FS is not set 2096# CONFIG_ADFS_FS is not set
1429# CONFIG_AFFS_FS is not set 2097# CONFIG_AFFS_FS is not set
1430# CONFIG_HFS_FS is not set 2098# CONFIG_HFS_FS is not set
@@ -1444,27 +2112,49 @@ CONFIG_JFFS2_ZLIB=y
1444CONFIG_JFFS2_RTIME=y 2112CONFIG_JFFS2_RTIME=y
1445# CONFIG_JFFS2_RUBIN is not set 2113# CONFIG_JFFS2_RUBIN is not set
1446CONFIG_CRAMFS=y 2114CONFIG_CRAMFS=y
2115CONFIG_SQUASHFS=m
2116# CONFIG_SQUASHFS_EMBEDDED is not set
2117CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3
1447# CONFIG_VXFS_FS is not set 2118# CONFIG_VXFS_FS is not set
1448# CONFIG_MINIX_FS is not set 2119# CONFIG_MINIX_FS is not set
2120# CONFIG_OMFS_FS is not set
1449# CONFIG_HPFS_FS is not set 2121# CONFIG_HPFS_FS is not set
1450# CONFIG_QNX4FS_FS is not set 2122# CONFIG_QNX4FS_FS is not set
1451CONFIG_ROMFS_FS=y 2123CONFIG_ROMFS_FS=y
2124CONFIG_ROMFS_BACKED_BY_BLOCK=y
2125# CONFIG_ROMFS_BACKED_BY_MTD is not set
2126# CONFIG_ROMFS_BACKED_BY_BOTH is not set
2127CONFIG_ROMFS_ON_BLOCK=y
1452# CONFIG_SYSV_FS is not set 2128# CONFIG_SYSV_FS is not set
1453# CONFIG_UFS_FS is not set 2129# CONFIG_UFS_FS is not set
2130# CONFIG_NILFS2_FS is not set
1454CONFIG_NETWORK_FILESYSTEMS=y 2131CONFIG_NETWORK_FILESYSTEMS=y
1455CONFIG_NFS_FS=y 2132CONFIG_NFS_FS=y
1456# CONFIG_NFS_V3 is not set 2133CONFIG_NFS_V3=y
2134CONFIG_NFS_V3_ACL=y
1457# CONFIG_NFS_V4 is not set 2135# CONFIG_NFS_V4 is not set
1458# CONFIG_NFSD is not set
1459CONFIG_ROOT_NFS=y 2136CONFIG_ROOT_NFS=y
2137CONFIG_NFSD=m
2138CONFIG_NFSD_V2_ACL=y
2139CONFIG_NFSD_V3=y
2140CONFIG_NFSD_V3_ACL=y
2141CONFIG_NFSD_V4=y
1460CONFIG_LOCKD=y 2142CONFIG_LOCKD=y
2143CONFIG_LOCKD_V4=y
2144CONFIG_EXPORTFS=m
2145CONFIG_NFS_ACL_SUPPORT=y
1461CONFIG_NFS_COMMON=y 2146CONFIG_NFS_COMMON=y
1462CONFIG_SUNRPC=y 2147CONFIG_SUNRPC=y
1463# CONFIG_SUNRPC_BIND34 is not set 2148CONFIG_SUNRPC_GSS=m
1464# CONFIG_RPCSEC_GSS_KRB5 is not set 2149CONFIG_RPCSEC_GSS_KRB5=m
1465# CONFIG_RPCSEC_GSS_SPKM3 is not set 2150# CONFIG_RPCSEC_GSS_SPKM3 is not set
1466# CONFIG_SMB_FS is not set 2151# CONFIG_SMB_FS is not set
1467# CONFIG_CIFS is not set 2152CONFIG_CIFS=m
2153# CONFIG_CIFS_STATS is not set
2154# CONFIG_CIFS_WEAK_PW_HASH is not set
2155# CONFIG_CIFS_XATTR is not set
2156# CONFIG_CIFS_DEBUG2 is not set
2157# CONFIG_CIFS_EXPERIMENTAL is not set
1468# CONFIG_NCP_FS is not set 2158# CONFIG_NCP_FS is not set
1469# CONFIG_CODA_FS is not set 2159# CONFIG_CODA_FS is not set
1470# CONFIG_AFS_FS is not set 2160# CONFIG_AFS_FS is not set
@@ -1546,6 +2236,11 @@ CONFIG_MAGIC_SYSRQ=y
1546CONFIG_DEBUG_KERNEL=y 2236CONFIG_DEBUG_KERNEL=y
1547# CONFIG_DEBUG_SHIRQ is not set 2237# CONFIG_DEBUG_SHIRQ is not set
1548CONFIG_DETECT_SOFTLOCKUP=y 2238CONFIG_DETECT_SOFTLOCKUP=y
2239# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
2240CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
2241CONFIG_DETECT_HUNG_TASK=y
2242# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
2243CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
1549CONFIG_SCHED_DEBUG=y 2244CONFIG_SCHED_DEBUG=y
1550# CONFIG_SCHEDSTATS is not set 2245# CONFIG_SCHEDSTATS is not set
1551# CONFIG_TIMER_STATS is not set 2246# CONFIG_TIMER_STATS is not set
@@ -1565,14 +2260,39 @@ CONFIG_DEBUG_BUGVERBOSE=y
1565CONFIG_DEBUG_INFO=y 2260CONFIG_DEBUG_INFO=y
1566# CONFIG_DEBUG_VM is not set 2261# CONFIG_DEBUG_VM is not set
1567# CONFIG_DEBUG_WRITECOUNT is not set 2262# CONFIG_DEBUG_WRITECOUNT is not set
2263CONFIG_DEBUG_MEMORY_INIT=y
1568# CONFIG_DEBUG_LIST is not set 2264# CONFIG_DEBUG_LIST is not set
1569# CONFIG_DEBUG_SG is not set 2265# CONFIG_DEBUG_SG is not set
2266# CONFIG_DEBUG_NOTIFIERS is not set
1570CONFIG_FRAME_POINTER=y 2267CONFIG_FRAME_POINTER=y
1571# CONFIG_BOOT_PRINTK_DELAY is not set 2268# CONFIG_BOOT_PRINTK_DELAY is not set
1572# CONFIG_RCU_TORTURE_TEST is not set 2269# CONFIG_RCU_TORTURE_TEST is not set
2270# CONFIG_RCU_CPU_STALL_DETECTOR is not set
1573# CONFIG_BACKTRACE_SELF_TEST is not set 2271# CONFIG_BACKTRACE_SELF_TEST is not set
2272# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
1574# CONFIG_FAULT_INJECTION is not set 2273# CONFIG_FAULT_INJECTION is not set
2274# CONFIG_LATENCYTOP is not set
2275CONFIG_SYSCTL_SYSCALL_CHECK=y
2276# CONFIG_PAGE_POISONING is not set
2277CONFIG_HAVE_FUNCTION_TRACER=y
2278CONFIG_TRACING_SUPPORT=y
2279
2280#
2281# Tracers
2282#
2283# CONFIG_FUNCTION_TRACER is not set
2284# CONFIG_SCHED_TRACER is not set
2285# CONFIG_CONTEXT_SWITCH_TRACER is not set
2286# CONFIG_EVENT_TRACER is not set
2287# CONFIG_BOOT_TRACER is not set
2288# CONFIG_TRACE_BRANCH_PROFILING is not set
2289# CONFIG_STACK_TRACER is not set
2290# CONFIG_KMEMTRACE is not set
2291# CONFIG_WORKQUEUE_TRACER is not set
2292# CONFIG_BLK_DEV_IO_TRACE is not set
1575# CONFIG_SAMPLES is not set 2293# CONFIG_SAMPLES is not set
2294CONFIG_HAVE_ARCH_KGDB=y
2295# CONFIG_KGDB is not set
1576CONFIG_DEBUG_USER=y 2296CONFIG_DEBUG_USER=y
1577CONFIG_DEBUG_ERRORS=y 2297CONFIG_DEBUG_ERRORS=y
1578# CONFIG_DEBUG_STACK_USAGE is not set 2298# CONFIG_DEBUG_STACK_USAGE is not set
@@ -1586,19 +2306,29 @@ CONFIG_DEBUG_S3C_UART=0
1586# 2306#
1587# CONFIG_KEYS is not set 2307# CONFIG_KEYS is not set
1588# CONFIG_SECURITY is not set 2308# CONFIG_SECURITY is not set
2309# CONFIG_SECURITYFS is not set
1589# CONFIG_SECURITY_FILE_CAPABILITIES is not set 2310# CONFIG_SECURITY_FILE_CAPABILITIES is not set
1590CONFIG_CRYPTO=y 2311CONFIG_CRYPTO=y
1591 2312
1592# 2313#
1593# Crypto core or helper 2314# Crypto core or helper
1594# 2315#
2316# CONFIG_CRYPTO_FIPS is not set
1595CONFIG_CRYPTO_ALGAPI=m 2317CONFIG_CRYPTO_ALGAPI=m
2318CONFIG_CRYPTO_ALGAPI2=m
1596CONFIG_CRYPTO_AEAD=m 2319CONFIG_CRYPTO_AEAD=m
2320CONFIG_CRYPTO_AEAD2=m
1597CONFIG_CRYPTO_BLKCIPHER=m 2321CONFIG_CRYPTO_BLKCIPHER=m
2322CONFIG_CRYPTO_BLKCIPHER2=m
1598CONFIG_CRYPTO_HASH=m 2323CONFIG_CRYPTO_HASH=m
2324CONFIG_CRYPTO_HASH2=m
2325CONFIG_CRYPTO_RNG2=m
2326CONFIG_CRYPTO_PCOMP=m
1599CONFIG_CRYPTO_MANAGER=m 2327CONFIG_CRYPTO_MANAGER=m
2328CONFIG_CRYPTO_MANAGER2=m
1600# CONFIG_CRYPTO_GF128MUL is not set 2329# CONFIG_CRYPTO_GF128MUL is not set
1601# CONFIG_CRYPTO_NULL is not set 2330# CONFIG_CRYPTO_NULL is not set
2331CONFIG_CRYPTO_WORKQUEUE=m
1602# CONFIG_CRYPTO_CRYPTD is not set 2332# CONFIG_CRYPTO_CRYPTD is not set
1603CONFIG_CRYPTO_AUTHENC=m 2333CONFIG_CRYPTO_AUTHENC=m
1604# CONFIG_CRYPTO_TEST is not set 2334# CONFIG_CRYPTO_TEST is not set
@@ -1630,10 +2360,14 @@ CONFIG_CRYPTO_HMAC=m
1630# 2360#
1631# Digest 2361# Digest
1632# 2362#
1633# CONFIG_CRYPTO_CRC32C is not set 2363CONFIG_CRYPTO_CRC32C=m
1634# CONFIG_CRYPTO_MD4 is not set 2364# CONFIG_CRYPTO_MD4 is not set
1635CONFIG_CRYPTO_MD5=m 2365CONFIG_CRYPTO_MD5=m
1636# CONFIG_CRYPTO_MICHAEL_MIC is not set 2366# CONFIG_CRYPTO_MICHAEL_MIC is not set
2367# CONFIG_CRYPTO_RMD128 is not set
2368# CONFIG_CRYPTO_RMD160 is not set
2369# CONFIG_CRYPTO_RMD256 is not set
2370# CONFIG_CRYPTO_RMD320 is not set
1637CONFIG_CRYPTO_SHA1=m 2371CONFIG_CRYPTO_SHA1=m
1638# CONFIG_CRYPTO_SHA256 is not set 2372# CONFIG_CRYPTO_SHA256 is not set
1639# CONFIG_CRYPTO_SHA512 is not set 2373# CONFIG_CRYPTO_SHA512 is not set
@@ -1663,23 +2397,37 @@ CONFIG_CRYPTO_DES=m
1663# Compression 2397# Compression
1664# 2398#
1665CONFIG_CRYPTO_DEFLATE=m 2399CONFIG_CRYPTO_DEFLATE=m
2400# CONFIG_CRYPTO_ZLIB is not set
1666# CONFIG_CRYPTO_LZO is not set 2401# CONFIG_CRYPTO_LZO is not set
2402
2403#
2404# Random Number Generation
2405#
2406# CONFIG_CRYPTO_ANSI_CPRNG is not set
1667CONFIG_CRYPTO_HW=y 2407CONFIG_CRYPTO_HW=y
2408# CONFIG_BINARY_PRINTF is not set
1668 2409
1669# 2410#
1670# Library routines 2411# Library routines
1671# 2412#
1672CONFIG_BITREVERSE=y 2413CONFIG_BITREVERSE=y
1673# CONFIG_GENERIC_FIND_FIRST_BIT is not set 2414CONFIG_GENERIC_FIND_LAST_BIT=y
1674# CONFIG_GENERIC_FIND_NEXT_BIT is not set
1675# CONFIG_CRC_CCITT is not set 2415# CONFIG_CRC_CCITT is not set
1676# CONFIG_CRC16 is not set 2416CONFIG_CRC16=m
2417# CONFIG_CRC_T10DIF is not set
1677CONFIG_CRC_ITU_T=m 2418CONFIG_CRC_ITU_T=m
1678CONFIG_CRC32=y 2419CONFIG_CRC32=y
1679# CONFIG_CRC7 is not set 2420CONFIG_CRC7=m
1680# CONFIG_LIBCRC32C is not set 2421CONFIG_LIBCRC32C=m
1681CONFIG_ZLIB_INFLATE=y 2422CONFIG_ZLIB_INFLATE=y
1682CONFIG_ZLIB_DEFLATE=y 2423CONFIG_ZLIB_DEFLATE=y
1683CONFIG_PLIST=y 2424CONFIG_DECOMPRESS_GZIP=y
2425CONFIG_DECOMPRESS_BZIP2=y
2426CONFIG_DECOMPRESS_LZMA=y
2427CONFIG_TEXTSEARCH=y
2428CONFIG_TEXTSEARCH_KMP=m
2429CONFIG_TEXTSEARCH_BM=m
2430CONFIG_TEXTSEARCH_FSM=m
1684CONFIG_HAS_IOMEM=y 2431CONFIG_HAS_IOMEM=y
1685CONFIG_HAS_DMA=y 2432CONFIG_HAS_DMA=y
2433CONFIG_NLATTR=y
diff --git a/arch/arm/include/asm/tlb.h b/arch/arm/include/asm/tlb.h
index 857f1dfac794..321c83e43a1e 100644
--- a/arch/arm/include/asm/tlb.h
+++ b/arch/arm/include/asm/tlb.h
@@ -36,6 +36,8 @@
36struct mmu_gather { 36struct mmu_gather {
37 struct mm_struct *mm; 37 struct mm_struct *mm;
38 unsigned int fullmm; 38 unsigned int fullmm;
39 unsigned long range_start;
40 unsigned long range_end;
39}; 41};
40 42
41DECLARE_PER_CPU(struct mmu_gather, mmu_gathers); 43DECLARE_PER_CPU(struct mmu_gather, mmu_gathers);
@@ -63,7 +65,19 @@ tlb_finish_mmu(struct mmu_gather *tlb, unsigned long start, unsigned long end)
63 put_cpu_var(mmu_gathers); 65 put_cpu_var(mmu_gathers);
64} 66}
65 67
66#define tlb_remove_tlb_entry(tlb,ptep,address) do { } while (0) 68/*
69 * Memorize the range for the TLB flush.
70 */
71static inline void
72tlb_remove_tlb_entry(struct mmu_gather *tlb, pte_t *ptep, unsigned long addr)
73{
74 if (!tlb->fullmm) {
75 if (addr < tlb->range_start)
76 tlb->range_start = addr;
77 if (addr + PAGE_SIZE > tlb->range_end)
78 tlb->range_end = addr + PAGE_SIZE;
79 }
80}
67 81
68/* 82/*
69 * In the case of tlb vma handling, we can optimise these away in the 83 * In the case of tlb vma handling, we can optimise these away in the
@@ -73,15 +87,18 @@ tlb_finish_mmu(struct mmu_gather *tlb, unsigned long start, unsigned long end)
73static inline void 87static inline void
74tlb_start_vma(struct mmu_gather *tlb, struct vm_area_struct *vma) 88tlb_start_vma(struct mmu_gather *tlb, struct vm_area_struct *vma)
75{ 89{
76 if (!tlb->fullmm) 90 if (!tlb->fullmm) {
77 flush_cache_range(vma, vma->vm_start, vma->vm_end); 91 flush_cache_range(vma, vma->vm_start, vma->vm_end);
92 tlb->range_start = TASK_SIZE;
93 tlb->range_end = 0;
94 }
78} 95}
79 96
80static inline void 97static inline void
81tlb_end_vma(struct mmu_gather *tlb, struct vm_area_struct *vma) 98tlb_end_vma(struct mmu_gather *tlb, struct vm_area_struct *vma)
82{ 99{
83 if (!tlb->fullmm) 100 if (!tlb->fullmm && tlb->range_end > 0)
84 flush_tlb_range(vma, vma->vm_start, vma->vm_end); 101 flush_tlb_range(vma, tlb->range_start, tlb->range_end);
85} 102}
86 103
87#define tlb_remove_page(tlb,page) free_page_and_swap_cache(page) 104#define tlb_remove_page(tlb,page) free_page_and_swap_cache(page)
diff --git a/arch/arm/kernel/sys_oabi-compat.c b/arch/arm/kernel/sys_oabi-compat.c
index 42623db7f870..e04173c7e621 100644
--- a/arch/arm/kernel/sys_oabi-compat.c
+++ b/arch/arm/kernel/sys_oabi-compat.c
@@ -83,6 +83,7 @@
83#include <linux/net.h> 83#include <linux/net.h>
84#include <linux/ipc.h> 84#include <linux/ipc.h>
85#include <linux/uaccess.h> 85#include <linux/uaccess.h>
86#include <linux/slab.h>
86 87
87struct oldabi_stat64 { 88struct oldabi_stat64 {
88 unsigned long long st_dev; 89 unsigned long long st_dev;
diff --git a/arch/arm/mach-ep93xx/core.c b/arch/arm/mach-ep93xx/core.c
index 6d9152de6074..ae24486f858a 100644
--- a/arch/arm/mach-ep93xx/core.c
+++ b/arch/arm/mach-ep93xx/core.c
@@ -100,7 +100,7 @@ static unsigned int last_jiffy_time;
100 100
101#define TIMER4_TICKS_PER_JIFFY ((CLOCK_TICK_RATE + (HZ/2)) / HZ) 101#define TIMER4_TICKS_PER_JIFFY ((CLOCK_TICK_RATE + (HZ/2)) / HZ)
102 102
103static int ep93xx_timer_interrupt(int irq, void *dev_id) 103static irqreturn_t ep93xx_timer_interrupt(int irq, void *dev_id)
104{ 104{
105 __raw_writel(1, EP93XX_TIMER1_CLEAR); 105 __raw_writel(1, EP93XX_TIMER1_CLEAR);
106 while ((signed long) 106 while ((signed long)
diff --git a/arch/arm/mach-mx1/mx1ads.c b/arch/arm/mach-mx1/mx1ads.c
index 7ae229bc1b79..e54057fb855b 100644
--- a/arch/arm/mach-mx1/mx1ads.c
+++ b/arch/arm/mach-mx1/mx1ads.c
@@ -28,9 +28,7 @@
28#include <mach/common.h> 28#include <mach/common.h>
29#include <mach/imx-uart.h> 29#include <mach/imx-uart.h>
30#include <mach/irqs.h> 30#include <mach/irqs.h>
31#ifdef CONFIG_I2C_IMX
32#include <mach/i2c.h> 31#include <mach/i2c.h>
33#endif
34#include <mach/iomux.h> 32#include <mach/iomux.h>
35#include "devices.h" 33#include "devices.h"
36 34
@@ -114,7 +112,6 @@ static struct platform_device flash_device = {
114 * I2C 112 * I2C
115 */ 113 */
116 114
117#ifdef CONFIG_I2C_IMX
118static int i2c_pins[] = { 115static int i2c_pins[] = {
119 PA15_PF_I2C_SDA, 116 PA15_PF_I2C_SDA,
120 PA16_PF_I2C_SCL, 117 PA16_PF_I2C_SCL,
@@ -157,7 +154,6 @@ static struct i2c_board_info mx1ads_i2c_devices[] = {
157 .platform_data = &pcf857x_data[1], 154 .platform_data = &pcf857x_data[1],
158 }, 155 },
159}; 156};
160#endif
161 157
162/* 158/*
163 * Board init 159 * Board init
@@ -172,12 +168,10 @@ static void __init mx1ads_init(void)
172 mxc_register_device(&flash_device, &mx1ads_flash_data); 168 mxc_register_device(&flash_device, &mx1ads_flash_data);
173 169
174 /* I2C */ 170 /* I2C */
175#ifdef CONFIG_I2C_IMX
176 i2c_register_board_info(0, mx1ads_i2c_devices, 171 i2c_register_board_info(0, mx1ads_i2c_devices,
177 ARRAY_SIZE(mx1ads_i2c_devices)); 172 ARRAY_SIZE(mx1ads_i2c_devices));
178 173
179 mxc_register_device(&imx_i2c_device, &mx1ads_i2c_data); 174 mxc_register_device(&imx_i2c_device, &mx1ads_i2c_data);
180#endif
181} 175}
182 176
183static void __init mx1ads_timer_init(void) 177static void __init mx1ads_timer_init(void)
diff --git a/arch/arm/mach-mx2/clock_imx21.c b/arch/arm/mach-mx2/clock_imx21.c
index 2dee5c87614c..999d013e06e3 100644
--- a/arch/arm/mach-mx2/clock_imx21.c
+++ b/arch/arm/mach-mx2/clock_imx21.c
@@ -919,19 +919,19 @@ static struct clk_lookup lookups[] __initdata = {
919 _REGISTER_CLOCK(NULL, "cspi1", cspi_clk[0]) 919 _REGISTER_CLOCK(NULL, "cspi1", cspi_clk[0])
920 _REGISTER_CLOCK(NULL, "cspi2", cspi_clk[1]) 920 _REGISTER_CLOCK(NULL, "cspi2", cspi_clk[1])
921 _REGISTER_CLOCK(NULL, "cspi3", cspi_clk[2]) 921 _REGISTER_CLOCK(NULL, "cspi3", cspi_clk[2])
922 _REGISTER_CLOCK(NULL, "lcdc", lcdc_clk[0]) 922 _REGISTER_CLOCK("imx-fb.0", NULL, lcdc_clk[0])
923 _REGISTER_CLOCK(NULL, "csi", csi_clk[0]) 923 _REGISTER_CLOCK(NULL, "csi", csi_clk[0])
924 _REGISTER_CLOCK(NULL, "usb", usb_clk[0]) 924 _REGISTER_CLOCK(NULL, "usb", usb_clk[0])
925 _REGISTER_CLOCK(NULL, "ssi1", ssi_clk[0]) 925 _REGISTER_CLOCK(NULL, "ssi1", ssi_clk[0])
926 _REGISTER_CLOCK(NULL, "ssi2", ssi_clk[1]) 926 _REGISTER_CLOCK(NULL, "ssi2", ssi_clk[1])
927 _REGISTER_CLOCK(NULL, "nfc", nfc_clk) 927 _REGISTER_CLOCK("mxc_nand.0", NULL, nfc_clk)
928 _REGISTER_CLOCK(NULL, "dma", dma_clk[0]) 928 _REGISTER_CLOCK(NULL, "dma", dma_clk[0])
929 _REGISTER_CLOCK(NULL, "brom", brom_clk) 929 _REGISTER_CLOCK(NULL, "brom", brom_clk)
930 _REGISTER_CLOCK(NULL, "emma", emma_clk[0]) 930 _REGISTER_CLOCK(NULL, "emma", emma_clk[0])
931 _REGISTER_CLOCK(NULL, "slcdc", slcdc_clk[0]) 931 _REGISTER_CLOCK(NULL, "slcdc", slcdc_clk[0])
932 _REGISTER_CLOCK(NULL, "wdog", wdog_clk) 932 _REGISTER_CLOCK("imx-wdt.0", NULL, wdog_clk)
933 _REGISTER_CLOCK(NULL, "gpio", gpio_clk) 933 _REGISTER_CLOCK(NULL, "gpio", gpio_clk)
934 _REGISTER_CLOCK(NULL, "i2c", i2c_clk) 934 _REGISTER_CLOCK("imx-i2c.0", NULL, i2c_clk)
935 _REGISTER_CLOCK("mxc-keypad", NULL, kpp_clk) 935 _REGISTER_CLOCK("mxc-keypad", NULL, kpp_clk)
936 _REGISTER_CLOCK(NULL, "owire", owire_clk) 936 _REGISTER_CLOCK(NULL, "owire", owire_clk)
937 _REGISTER_CLOCK(NULL, "rtc", rtc_clk) 937 _REGISTER_CLOCK(NULL, "rtc", rtc_clk)
diff --git a/arch/arm/mach-mx3/Kconfig b/arch/arm/mach-mx3/Kconfig
index d6235583e979..194b8428bba4 100644
--- a/arch/arm/mach-mx3/Kconfig
+++ b/arch/arm/mach-mx3/Kconfig
@@ -19,6 +19,8 @@ config MACH_MX31ADS
19config MACH_MX31ADS_WM1133_EV1 19config MACH_MX31ADS_WM1133_EV1
20 bool "Support Wolfson Microelectronics 1133-EV1 module" 20 bool "Support Wolfson Microelectronics 1133-EV1 module"
21 depends on MACH_MX31ADS 21 depends on MACH_MX31ADS
22 depends on MFD_WM8350_I2C
23 depends on REGULATOR_WM8350
22 select MFD_WM8350_CONFIG_MODE_0 24 select MFD_WM8350_CONFIG_MODE_0
23 select MFD_WM8352_CONFIG_MODE_0 25 select MFD_WM8352_CONFIG_MODE_0
24 help 26 help
diff --git a/arch/arm/mach-mx3/mx31ads.c b/arch/arm/mach-mx3/mx31ads.c
index 83e5e8e1276f..a6d6efefa6aa 100644
--- a/arch/arm/mach-mx3/mx31ads.c
+++ b/arch/arm/mach-mx3/mx31ads.c
@@ -102,7 +102,7 @@ static struct imxuart_platform_data uart_pdata = {
102 .flags = IMXUART_HAVE_RTSCTS, 102 .flags = IMXUART_HAVE_RTSCTS,
103}; 103};
104 104
105static int uart_pins[] = { 105static unsigned int uart_pins[] = {
106 MX31_PIN_CTS1__CTS1, 106 MX31_PIN_CTS1__CTS1,
107 MX31_PIN_RTS1__RTS1, 107 MX31_PIN_RTS1__RTS1,
108 MX31_PIN_TXD1__TXD1, 108 MX31_PIN_TXD1__TXD1,
@@ -452,6 +452,8 @@ static int mx31_wm8350_init(struct wm8350 *wm8350)
452 452
453 wm8350->codec.platform_data = &imx32ads_wm8350_setup; 453 wm8350->codec.platform_data = &imx32ads_wm8350_setup;
454 454
455 regulator_has_full_constraints();
456
455 return 0; 457 return 0;
456} 458}
457 459
diff --git a/arch/arm/mach-mx3/pcm037.c b/arch/arm/mach-mx3/pcm037.c
index c3648eff5137..b5227d837b2f 100644
--- a/arch/arm/mach-mx3/pcm037.c
+++ b/arch/arm/mach-mx3/pcm037.c
@@ -226,10 +226,10 @@ static void __init mxc_board_init(void)
226 mxc_iomux_setup_pin(MX31_PIN_BATT_LINE__OWIRE, "batt-0wire"); 226 mxc_iomux_setup_pin(MX31_PIN_BATT_LINE__OWIRE, "batt-0wire");
227 mxc_register_device(&mxc_w1_master_device, NULL); 227 mxc_register_device(&mxc_w1_master_device, NULL);
228 228
229 /* SMSC9215 IRQ pin */ 229 /* LAN9217 IRQ pin */
230 if (!mxc_iomux_setup_pin(IOMUX_MODE(MX31_PIN_GPIO3_1, IOMUX_CONFIG_GPIO), 230 if (!mxc_iomux_setup_pin(IOMUX_MODE(MX31_PIN_GPIO3_1, IOMUX_CONFIG_GPIO),
231 "pcm037-eth")) 231 "pcm037-eth"))
232 gpio_direction_input(MX31_PIN_GPIO3_1); 232 gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_GPIO3_1));
233 233
234#ifdef CONFIG_I2C_IMX 234#ifdef CONFIG_I2C_IMX
235 i2c_register_board_info(1, pcm037_i2c_devices, 235 i2c_register_board_info(1, pcm037_i2c_devices,
diff --git a/arch/arm/mach-mx3/qong.c b/arch/arm/mach-mx3/qong.c
index 6c4283cec6f4..5a01e48fd8f1 100644
--- a/arch/arm/mach-mx3/qong.c
+++ b/arch/arm/mach-mx3/qong.c
@@ -251,32 +251,6 @@ static void __init qong_init_fpga(void)
251} 251}
252 252
253/* 253/*
254 * This structure defines the MX31 memory map.
255 */
256static struct map_desc qong_io_desc[] __initdata = {
257 {
258 .virtual = AIPS1_BASE_ADDR_VIRT,
259 .pfn = __phys_to_pfn(AIPS1_BASE_ADDR),
260 .length = AIPS1_SIZE,
261 .type = MT_DEVICE_NONSHARED
262 }, {
263 .virtual = AIPS2_BASE_ADDR_VIRT,
264 .pfn = __phys_to_pfn(AIPS2_BASE_ADDR),
265 .length = AIPS2_SIZE,
266 .type = MT_DEVICE_NONSHARED
267 }
268};
269
270/*
271 * Set up static virtual mappings.
272 */
273static void __init qong_map_io(void)
274{
275 mxc_map_io();
276 iotable_init(qong_io_desc, ARRAY_SIZE(qong_io_desc));
277}
278
279/*
280 * Board specific initialization. 254 * Board specific initialization.
281 */ 255 */
282static void __init mxc_board_init(void) 256static void __init mxc_board_init(void)
@@ -305,7 +279,7 @@ MACHINE_START(QONG, "Dave/DENX QongEVB-LITE")
305 .phys_io = AIPS1_BASE_ADDR, 279 .phys_io = AIPS1_BASE_ADDR,
306 .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, 280 .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
307 .boot_params = PHYS_OFFSET + 0x100, 281 .boot_params = PHYS_OFFSET + 0x100,
308 .map_io = qong_map_io, 282 .map_io = mxc_map_io,
309 .init_irq = mxc_init_irq, 283 .init_irq = mxc_init_irq,
310 .init_machine = mxc_board_init, 284 .init_machine = mxc_board_init,
311 .timer = &qong_timer, 285 .timer = &qong_timer,
diff --git a/arch/arm/mach-pxa/em-x270.c b/arch/arm/mach-pxa/em-x270.c
index 67611dadb44e..bc0f73fbd4ca 100644
--- a/arch/arm/mach-pxa/em-x270.c
+++ b/arch/arm/mach-pxa/em-x270.c
@@ -28,7 +28,6 @@
28#include <linux/spi/libertas_spi.h> 28#include <linux/spi/libertas_spi.h>
29#include <linux/power_supply.h> 29#include <linux/power_supply.h>
30#include <linux/apm-emulation.h> 30#include <linux/apm-emulation.h>
31#include <linux/delay.h>
32 31
33#include <media/soc_camera.h> 32#include <media/soc_camera.h>
34 33
@@ -644,8 +643,9 @@ static struct pxa2xx_spi_master em_x270_spi_info = {
644}; 643};
645 644
646static struct pxa2xx_spi_chip em_x270_tdo24m_chip = { 645static struct pxa2xx_spi_chip em_x270_tdo24m_chip = {
647 .rx_threshold = 1, 646 .rx_threshold = 1,
648 .tx_threshold = 1, 647 .tx_threshold = 1,
648 .gpio_cs = -1,
649}; 649};
650 650
651static struct tdo24m_platform_data em_x270_tdo24m_pdata = { 651static struct tdo24m_platform_data em_x270_tdo24m_pdata = {
diff --git a/arch/arm/mach-pxa/generic.h b/arch/arm/mach-pxa/generic.h
index 3465268ca716..485fede83d97 100644
--- a/arch/arm/mach-pxa/generic.h
+++ b/arch/arm/mach-pxa/generic.h
@@ -15,6 +15,9 @@ extern struct sys_timer pxa_timer;
15extern void __init pxa_init_irq(int irq_nr, 15extern void __init pxa_init_irq(int irq_nr,
16 int (*set_wake)(unsigned int, unsigned int)); 16 int (*set_wake)(unsigned int, unsigned int));
17extern void __init pxa25x_init_irq(void); 17extern void __init pxa25x_init_irq(void);
18#ifdef CONFIG_CPU_PXA26x
19extern void __init pxa26x_init_irq(void);
20#endif
18extern void __init pxa27x_init_irq(void); 21extern void __init pxa27x_init_irq(void);
19extern void __init pxa3xx_init_irq(void); 22extern void __init pxa3xx_init_irq(void);
20extern void __init pxa_map_io(void); 23extern void __init pxa_map_io(void);
diff --git a/arch/arm/mach-pxa/include/mach/colibri.h b/arch/arm/mach-pxa/include/mach/colibri.h
index 90230c6f9925..a88d7caff0d1 100644
--- a/arch/arm/mach-pxa/include/mach/colibri.h
+++ b/arch/arm/mach-pxa/include/mach/colibri.h
@@ -10,13 +10,13 @@
10#if defined(CONFIG_MMC_PXA) || defined(CONFIG_MMC_PXA_MODULE) 10#if defined(CONFIG_MMC_PXA) || defined(CONFIG_MMC_PXA_MODULE)
11extern void colibri_pxa3xx_init_mmc(mfp_cfg_t *pins, int len, int detect_pin); 11extern void colibri_pxa3xx_init_mmc(mfp_cfg_t *pins, int len, int detect_pin);
12#else 12#else
13static inline void colibri_pxa3xx_init_mmc(mfp_cfg_t *, int, int) {} 13static inline void colibri_pxa3xx_init_mmc(mfp_cfg_t *pins, int len, int detect_pin) {}
14#endif 14#endif
15 15
16#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE) 16#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
17extern void colibri_pxa3xx_init_lcd(int bl_pin); 17extern void colibri_pxa3xx_init_lcd(int bl_pin);
18#else 18#else
19static inline void colibri_pxa3xx_init_lcd(int) {} 19static inline void colibri_pxa3xx_init_lcd(int bl_pin) {}
20#endif 20#endif
21 21
22#if defined(CONFIG_AX88796) 22#if defined(CONFIG_AX88796)
diff --git a/arch/arm/mach-pxa/include/mach/palmt5.h b/arch/arm/mach-pxa/include/mach/palmt5.h
index 052bfe788ada..d15662aba008 100644
--- a/arch/arm/mach-pxa/include/mach/palmt5.h
+++ b/arch/arm/mach-pxa/include/mach/palmt5.h
@@ -37,7 +37,6 @@
37 37
38/* USB */ 38/* USB */
39#define GPIO_NR_PALMT5_USB_DETECT_N 15 39#define GPIO_NR_PALMT5_USB_DETECT_N 15
40#define GPIO_NR_PALMT5_USB_POWER 95
41#define GPIO_NR_PALMT5_USB_PULLUP 93 40#define GPIO_NR_PALMT5_USB_PULLUP 93
42 41
43/* LCD/BACKLIGHT */ 42/* LCD/BACKLIGHT */
diff --git a/arch/arm/mach-pxa/include/mach/palmtx.h b/arch/arm/mach-pxa/include/mach/palmtx.h
index 9f7d62fb4cbb..e74082c872e1 100644
--- a/arch/arm/mach-pxa/include/mach/palmtx.h
+++ b/arch/arm/mach-pxa/include/mach/palmtx.h
@@ -38,7 +38,6 @@
38 38
39/* USB */ 39/* USB */
40#define GPIO_NR_PALMTX_USB_DETECT_N 13 40#define GPIO_NR_PALMTX_USB_DETECT_N 13
41#define GPIO_NR_PALMTX_USB_POWER 95
42#define GPIO_NR_PALMTX_USB_PULLUP 93 41#define GPIO_NR_PALMTX_USB_PULLUP 93
43 42
44/* LCD/BACKLIGHT */ 43/* LCD/BACKLIGHT */
diff --git a/arch/arm/mach-pxa/palmt5.c b/arch/arm/mach-pxa/palmt5.c
index 0680f1a575a3..d7f81068c613 100644
--- a/arch/arm/mach-pxa/palmt5.c
+++ b/arch/arm/mach-pxa/palmt5.c
@@ -64,6 +64,7 @@ static unsigned long palmt5_pin_config[] __initdata = {
64 GPIO29_AC97_SDATA_IN_0, 64 GPIO29_AC97_SDATA_IN_0,
65 GPIO30_AC97_SDATA_OUT, 65 GPIO30_AC97_SDATA_OUT,
66 GPIO31_AC97_SYNC, 66 GPIO31_AC97_SYNC,
67 GPIO95_AC97_nRESET,
67 68
68 /* IrDA */ 69 /* IrDA */
69 GPIO40_GPIO, /* ir disable */ 70 GPIO40_GPIO, /* ir disable */
@@ -72,7 +73,7 @@ static unsigned long palmt5_pin_config[] __initdata = {
72 73
73 /* USB */ 74 /* USB */
74 GPIO15_GPIO, /* usb detect */ 75 GPIO15_GPIO, /* usb detect */
75 GPIO95_GPIO, /* usb power */ 76 GPIO93_GPIO, /* usb power */
76 77
77 /* MATRIX KEYPAD */ 78 /* MATRIX KEYPAD */
78 GPIO100_KP_MKIN_0 | WAKEUP_ON_LEVEL_HIGH, 79 GPIO100_KP_MKIN_0 | WAKEUP_ON_LEVEL_HIGH,
@@ -344,7 +345,7 @@ static struct pxaficp_platform_data palmt5_ficp_platform_data = {
344static struct pxa2xx_udc_mach_info palmt5_udc_info __initdata = { 345static struct pxa2xx_udc_mach_info palmt5_udc_info __initdata = {
345 .gpio_vbus = GPIO_NR_PALMT5_USB_DETECT_N, 346 .gpio_vbus = GPIO_NR_PALMT5_USB_DETECT_N,
346 .gpio_vbus_inverted = 1, 347 .gpio_vbus_inverted = 1,
347 .gpio_pullup = GPIO_NR_PALMT5_USB_POWER, 348 .gpio_pullup = GPIO_NR_PALMT5_USB_PULLUP,
348 .gpio_pullup_inverted = 0, 349 .gpio_pullup_inverted = 0,
349}; 350};
350 351
@@ -490,9 +491,9 @@ static struct platform_device *devices[] __initdata = {
490/* setup udc GPIOs initial state */ 491/* setup udc GPIOs initial state */
491static void __init palmt5_udc_init(void) 492static void __init palmt5_udc_init(void)
492{ 493{
493 if (!gpio_request(GPIO_NR_PALMT5_USB_POWER, "UDC Vbus")) { 494 if (!gpio_request(GPIO_NR_PALMT5_USB_PULLUP, "UDC Vbus")) {
494 gpio_direction_output(GPIO_NR_PALMT5_USB_POWER, 1); 495 gpio_direction_output(GPIO_NR_PALMT5_USB_PULLUP, 1);
495 gpio_free(GPIO_NR_PALMT5_USB_POWER); 496 gpio_free(GPIO_NR_PALMT5_USB_PULLUP);
496 } 497 }
497} 498}
498 499
diff --git a/arch/arm/mach-pxa/palmtx.c b/arch/arm/mach-pxa/palmtx.c
index 59d0c1cba556..14393d0ad8b8 100644
--- a/arch/arm/mach-pxa/palmtx.c
+++ b/arch/arm/mach-pxa/palmtx.c
@@ -64,6 +64,7 @@ static unsigned long palmtx_pin_config[] __initdata = {
64 GPIO29_AC97_SDATA_IN_0, 64 GPIO29_AC97_SDATA_IN_0,
65 GPIO30_AC97_SDATA_OUT, 65 GPIO30_AC97_SDATA_OUT,
66 GPIO31_AC97_SYNC, 66 GPIO31_AC97_SYNC,
67 GPIO95_AC97_nRESET,
67 68
68 /* IrDA */ 69 /* IrDA */
69 GPIO40_GPIO, /* ir disable */ 70 GPIO40_GPIO, /* ir disable */
@@ -75,7 +76,7 @@ static unsigned long palmtx_pin_config[] __initdata = {
75 76
76 /* USB */ 77 /* USB */
77 GPIO13_GPIO, /* usb detect */ 78 GPIO13_GPIO, /* usb detect */
78 GPIO95_GPIO, /* usb power */ 79 GPIO93_GPIO, /* usb power */
79 80
80 /* PCMCIA */ 81 /* PCMCIA */
81 GPIO48_nPOE, 82 GPIO48_nPOE,
@@ -359,7 +360,7 @@ static struct pxaficp_platform_data palmtx_ficp_platform_data = {
359static struct pxa2xx_udc_mach_info palmtx_udc_info __initdata = { 360static struct pxa2xx_udc_mach_info palmtx_udc_info __initdata = {
360 .gpio_vbus = GPIO_NR_PALMTX_USB_DETECT_N, 361 .gpio_vbus = GPIO_NR_PALMTX_USB_DETECT_N,
361 .gpio_vbus_inverted = 1, 362 .gpio_vbus_inverted = 1,
362 .gpio_pullup = GPIO_NR_PALMTX_USB_POWER, 363 .gpio_pullup = GPIO_NR_PALMTX_USB_PULLUP,
363 .gpio_pullup_inverted = 0, 364 .gpio_pullup_inverted = 0,
364}; 365};
365 366
@@ -514,9 +515,9 @@ static void __init palmtx_map_io(void)
514/* setup udc GPIOs initial state */ 515/* setup udc GPIOs initial state */
515static void __init palmtx_udc_init(void) 516static void __init palmtx_udc_init(void)
516{ 517{
517 if (!gpio_request(GPIO_NR_PALMTX_USB_POWER, "UDC Vbus")) { 518 if (!gpio_request(GPIO_NR_PALMTX_USB_PULLUP, "UDC Vbus")) {
518 gpio_direction_output(GPIO_NR_PALMTX_USB_POWER, 1); 519 gpio_direction_output(GPIO_NR_PALMTX_USB_PULLUP, 1);
519 gpio_free(GPIO_NR_PALMTX_USB_POWER); 520 gpio_free(GPIO_NR_PALMTX_USB_PULLUP);
520 } 521 }
521} 522}
522 523
diff --git a/arch/arm/mach-s3c2412/mach-jive.c b/arch/arm/mach-s3c2412/mach-jive.c
index 332bd3263eaf..8f0d37d43b43 100644
--- a/arch/arm/mach-s3c2412/mach-jive.c
+++ b/arch/arm/mach-s3c2412/mach-jive.c
@@ -52,7 +52,6 @@
52#include <plat/cpu.h> 52#include <plat/cpu.h>
53#include <plat/pm.h> 53#include <plat/pm.h>
54#include <plat/udc.h> 54#include <plat/udc.h>
55#include <plat/iic.h>
56 55
57static struct map_desc jive_iodesc[] __initdata = { 56static struct map_desc jive_iodesc[] __initdata = {
58}; 57};
@@ -278,7 +277,7 @@ __setup("mtdset=", jive_mtdset);
278#define LCD_HTOT (LCD_HSYNC + LCD_LEFT_MARGIN + LCD_XRES + LCD_RIGHT_MARGIN) 277#define LCD_HTOT (LCD_HSYNC + LCD_LEFT_MARGIN + LCD_XRES + LCD_RIGHT_MARGIN)
279#define LCD_VTOT (LCD_VSYNC + LCD_LOWER_MARGIN + LCD_YRES + LCD_UPPER_MARGIN) 278#define LCD_VTOT (LCD_VSYNC + LCD_LOWER_MARGIN + LCD_YRES + LCD_UPPER_MARGIN)
280 279
281struct s3c2410fb_display jive_vgg2432a4_display[] = { 280static struct s3c2410fb_display jive_vgg2432a4_display[] = {
282 [0] = { 281 [0] = {
283 .width = LCD_XRES, 282 .width = LCD_XRES,
284 .height = LCD_YRES, 283 .height = LCD_YRES,
@@ -311,7 +310,7 @@ struct s3c2410fb_display jive_vgg2432a4_display[] = {
311#define S3C2410_GPCCON_MASK(x) (3 << ((x) * 2)) 310#define S3C2410_GPCCON_MASK(x) (3 << ((x) * 2))
312#define S3C2410_GPDCON_MASK(x) (3 << ((x) * 2)) 311#define S3C2410_GPDCON_MASK(x) (3 << ((x) * 2))
313 312
314struct s3c2410fb_mach_info jive_lcd_config = { 313static struct s3c2410fb_mach_info jive_lcd_config = {
315 .displays = jive_vgg2432a4_display, 314 .displays = jive_vgg2432a4_display,
316 .num_displays = ARRAY_SIZE(jive_vgg2432a4_display), 315 .num_displays = ARRAY_SIZE(jive_vgg2432a4_display),
317 .default_display = 0, 316 .default_display = 0,
diff --git a/arch/arm/mach-s3c2440/mach-anubis.c b/arch/arm/mach-s3c2440/mach-anubis.c
index b05d56e230a1..9c6abf9fb540 100644
--- a/arch/arm/mach-s3c2440/mach-anubis.c
+++ b/arch/arm/mach-s3c2440/mach-anubis.c
@@ -243,7 +243,7 @@ static struct s3c2410_platform_nand anubis_nand_info = {
243 243
244/* IDE channels */ 244/* IDE channels */
245 245
246struct pata_platform_info anubis_ide_platdata = { 246static struct pata_platform_info anubis_ide_platdata = {
247 .ioport_shift = 5, 247 .ioport_shift = 5,
248}; 248};
249 249
diff --git a/arch/arm/mach-s3c2440/mach-osiris.c b/arch/arm/mach-s3c2440/mach-osiris.c
index 41a00f57e5da..c8a46685ce38 100644
--- a/arch/arm/mach-s3c2440/mach-osiris.c
+++ b/arch/arm/mach-s3c2440/mach-osiris.c
@@ -413,7 +413,6 @@ MACHINE_START(OSIRIS, "Simtec-OSIRIS")
413 .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc, 413 .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc,
414 .boot_params = S3C2410_SDRAM_PA + 0x100, 414 .boot_params = S3C2410_SDRAM_PA + 0x100,
415 .map_io = osiris_map_io, 415 .map_io = osiris_map_io,
416 .init_machine = osiris_init,
417 .init_irq = s3c24xx_init_irq, 416 .init_irq = s3c24xx_init_irq,
418 .init_machine = osiris_init, 417 .init_machine = osiris_init,
419 .timer = &s3c24xx_timer, 418 .timer = &s3c24xx_timer,
diff --git a/arch/arm/mach-s3c6410/mach-smdk6410.c b/arch/arm/mach-s3c6410/mach-smdk6410.c
index 25f7935576f8..7f473e47e4f1 100644
--- a/arch/arm/mach-s3c6410/mach-smdk6410.c
+++ b/arch/arm/mach-s3c6410/mach-smdk6410.c
@@ -166,6 +166,10 @@ static void __init smdk6410_machine_init(void)
166 s3c_i2c1_set_platdata(NULL); 166 s3c_i2c1_set_platdata(NULL);
167 s3c_fb_set_platdata(&smdk6410_lcd_pdata); 167 s3c_fb_set_platdata(&smdk6410_lcd_pdata);
168 168
169 gpio_request(S3C64XX_GPN(5), "LCD power");
170 gpio_request(S3C64XX_GPF(13), "LCD power");
171 gpio_request(S3C64XX_GPF(15), "LCD power");
172
169 i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0)); 173 i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0));
170 i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1)); 174 i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
171 175
diff --git a/arch/arm/plat-mxc/include/mach/imx-uart.h b/arch/arm/plat-mxc/include/mach/imx-uart.h
index 83fb72c4048a..599217b2e13f 100644
--- a/arch/arm/plat-mxc/include/mach/imx-uart.h
+++ b/arch/arm/plat-mxc/include/mach/imx-uart.h
@@ -27,6 +27,4 @@ struct imxuart_platform_data {
27 unsigned int flags; 27 unsigned int flags;
28}; 28};
29 29
30int __init imx_init_uart(int uart_no, struct imxuart_platform_data *pdata);
31
32#endif 30#endif
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx3.h b/arch/arm/plat-mxc/include/mach/iomux-mx3.h
index ab838cfe94f9..57e927a1fd3a 100644
--- a/arch/arm/plat-mxc/include/mach/iomux-mx3.h
+++ b/arch/arm/plat-mxc/include/mach/iomux-mx3.h
@@ -518,6 +518,8 @@ enum iomux_pins {
518 */ 518 */
519#define MX31_PIN_CSPI3_MOSI__RXD3 IOMUX_MODE(MX31_PIN_CSPI3_MOSI, IOMUX_CONFIG_ALT1) 519#define MX31_PIN_CSPI3_MOSI__RXD3 IOMUX_MODE(MX31_PIN_CSPI3_MOSI, IOMUX_CONFIG_ALT1)
520#define MX31_PIN_CSPI3_MISO__TXD3 IOMUX_MODE(MX31_PIN_CSPI3_MISO, IOMUX_CONFIG_ALT1) 520#define MX31_PIN_CSPI3_MISO__TXD3 IOMUX_MODE(MX31_PIN_CSPI3_MISO, IOMUX_CONFIG_ALT1)
521#define MX31_PIN_CSPI3_SCLK__RTS3 IOMUX_MODE(MX31_PIN_CSPI3_SCLK, IOMUX_CONFIG_ALT1)
522#define MX31_PIN_CSPI3_SPI_RDY__CTS3 IOMUX_MODE(MX31_PIN_CSPI3_SPI_RDY, IOMUX_CONFIG_ALT1)
521#define MX31_PIN_CTS1__CTS1 IOMUX_MODE(MX31_PIN_CTS1, IOMUX_CONFIG_FUNC) 523#define MX31_PIN_CTS1__CTS1 IOMUX_MODE(MX31_PIN_CTS1, IOMUX_CONFIG_FUNC)
522#define MX31_PIN_RTS1__RTS1 IOMUX_MODE(MX31_PIN_RTS1, IOMUX_CONFIG_FUNC) 524#define MX31_PIN_RTS1__RTS1 IOMUX_MODE(MX31_PIN_RTS1, IOMUX_CONFIG_FUNC)
523#define MX31_PIN_TXD1__TXD1 IOMUX_MODE(MX31_PIN_TXD1, IOMUX_CONFIG_FUNC) 525#define MX31_PIN_TXD1__TXD1 IOMUX_MODE(MX31_PIN_TXD1, IOMUX_CONFIG_FUNC)
@@ -558,6 +560,16 @@ enum iomux_pins {
558#define MX31_PIN_SD1_DATA0__SD1_DATA0 IOMUX_MODE(MX31_PIN_SD1_DATA0, IOMUX_CONFIG_FUNC) 560#define MX31_PIN_SD1_DATA0__SD1_DATA0 IOMUX_MODE(MX31_PIN_SD1_DATA0, IOMUX_CONFIG_FUNC)
559#define MX31_PIN_SD1_CLK__SD1_CLK IOMUX_MODE(MX31_PIN_SD1_CLK, IOMUX_CONFIG_FUNC) 561#define MX31_PIN_SD1_CLK__SD1_CLK IOMUX_MODE(MX31_PIN_SD1_CLK, IOMUX_CONFIG_FUNC)
560#define MX31_PIN_SD1_CMD__SD1_CMD IOMUX_MODE(MX31_PIN_SD1_CMD, IOMUX_CONFIG_FUNC) 562#define MX31_PIN_SD1_CMD__SD1_CMD IOMUX_MODE(MX31_PIN_SD1_CMD, IOMUX_CONFIG_FUNC)
563#define MX31_PIN_ATA_CS0__GPIO3_26 IOMUX_MODE(MX31_PIN_ATA_CS0, IOMUX_CONFIG_GPIO)
564#define MX31_PIN_ATA_CS1__GPIO3_27 IOMUX_MODE(MX31_PIN_ATA_CS1, IOMUX_CONFIG_GPIO)
565#define MX31_PIN_PC_PWRON__SD2_DATA3 IOMUX_MODE(MX31_PIN_PC_PWRON, IOMUX_CONFIG_ALT1)
566#define MX31_PIN_PC_VS1__SD2_DATA2 IOMUX_MODE(MX31_PIN_PC_VS1, IOMUX_CONFIG_ALT1)
567#define MX31_PIN_PC_READY__SD2_DATA1 IOMUX_MODE(MX31_PIN_PC_READY, IOMUX_CONFIG_ALT1)
568#define MX31_PIN_PC_WAIT_B__SD2_DATA0 IOMUX_MODE(MX31_PIN_PC_WAIT_B, IOMUX_CONFIG_ALT1)
569#define MX31_PIN_PC_CD2_B__SD2_CLK IOMUX_MODE(MX31_PIN_PC_CD2_B, IOMUX_CONFIG_ALT1)
570#define MX31_PIN_PC_CD1_B__SD2_CMD IOMUX_MODE(MX31_PIN_PC_CD1_B, IOMUX_CONFIG_ALT1)
571#define MX31_PIN_ATA_DIOR__GPIO3_28 IOMUX_MODE(MX31_PIN_ATA_DIOR, IOMUX_CONFIG_GPIO)
572#define MX31_PIN_ATA_DIOW__GPIO3_29 IOMUX_MODE(MX31_PIN_ATA_DIOW, IOMUX_CONFIG_GPIO)
561#define MX31_PIN_LD0__LD0 IOMUX_MODE(MX31_PIN_LD0, IOMUX_CONFIG_FUNC) 573#define MX31_PIN_LD0__LD0 IOMUX_MODE(MX31_PIN_LD0, IOMUX_CONFIG_FUNC)
562#define MX31_PIN_LD1__LD1 IOMUX_MODE(MX31_PIN_LD1, IOMUX_CONFIG_FUNC) 574#define MX31_PIN_LD1__LD1 IOMUX_MODE(MX31_PIN_LD1, IOMUX_CONFIG_FUNC)
563#define MX31_PIN_LD2__LD2 IOMUX_MODE(MX31_PIN_LD2, IOMUX_CONFIG_FUNC) 575#define MX31_PIN_LD2__LD2 IOMUX_MODE(MX31_PIN_LD2, IOMUX_CONFIG_FUNC)
@@ -585,6 +597,42 @@ enum iomux_pins {
585#define MX31_PIN_D3_SPL__D3_SPL IOMUX_MODE(MX31_PIN_D3_SPL, IOMUX_CONFIG_FUNC) 597#define MX31_PIN_D3_SPL__D3_SPL IOMUX_MODE(MX31_PIN_D3_SPL, IOMUX_CONFIG_FUNC)
586#define MX31_PIN_D3_CLS__D3_CLS IOMUX_MODE(MX31_PIN_D3_CLS, IOMUX_CONFIG_FUNC) 598#define MX31_PIN_D3_CLS__D3_CLS IOMUX_MODE(MX31_PIN_D3_CLS, IOMUX_CONFIG_FUNC)
587#define MX31_PIN_LCS0__GPI03_23 IOMUX_MODE(MX31_PIN_LCS0, IOMUX_CONFIG_GPIO) 599#define MX31_PIN_LCS0__GPI03_23 IOMUX_MODE(MX31_PIN_LCS0, IOMUX_CONFIG_GPIO)
600#define MX31_PIN_GPIO1_1__GPIO IOMUX_MODE(MX31_PIN_GPIO1_1, IOMUX_CONFIG_GPIO)
601#define MX31_PIN_I2C_CLK__SCL IOMUX_MODE(MX31_PIN_I2C_CLK, IOMUX_CONFIG_FUNC)
602#define MX31_PIN_I2C_DAT__SDA IOMUX_MODE(MX31_PIN_I2C_DAT, IOMUX_CONFIG_FUNC)
603#define MX31_PIN_DCD_DTE1__I2C2_SDA IOMUX_MODE(MX31_PIN_DCD_DTE1, IOMUX_CONFIG_ALT2)
604#define MX31_PIN_RI_DTE1__I2C2_SCL IOMUX_MODE(MX31_PIN_RI_DTE1, IOMUX_CONFIG_ALT2)
605#define MX31_PIN_CSI_D4__CSI_D4 IOMUX_MODE(MX31_PIN_CSI_D4, IOMUX_CONFIG_FUNC)
606#define MX31_PIN_CSI_D5__CSI_D5 IOMUX_MODE(MX31_PIN_CSI_D5, IOMUX_CONFIG_FUNC)
607#define MX31_PIN_CSI_D6__CSI_D6 IOMUX_MODE(MX31_PIN_CSI_D6, IOMUX_CONFIG_FUNC)
608#define MX31_PIN_CSI_D7__CSI_D7 IOMUX_MODE(MX31_PIN_CSI_D7, IOMUX_CONFIG_FUNC)
609#define MX31_PIN_CSI_D8__CSI_D8 IOMUX_MODE(MX31_PIN_CSI_D8, IOMUX_CONFIG_FUNC)
610#define MX31_PIN_CSI_D9__CSI_D9 IOMUX_MODE(MX31_PIN_CSI_D9, IOMUX_CONFIG_FUNC)
611#define MX31_PIN_CSI_D10__CSI_D10 IOMUX_MODE(MX31_PIN_CSI_D10, IOMUX_CONFIG_FUNC)
612#define MX31_PIN_CSI_D11__CSI_D11 IOMUX_MODE(MX31_PIN_CSI_D11, IOMUX_CONFIG_FUNC)
613#define MX31_PIN_CSI_D12__CSI_D12 IOMUX_MODE(MX31_PIN_CSI_D12, IOMUX_CONFIG_FUNC)
614#define MX31_PIN_CSI_D13__CSI_D13 IOMUX_MODE(MX31_PIN_CSI_D13, IOMUX_CONFIG_FUNC)
615#define MX31_PIN_CSI_D14__CSI_D14 IOMUX_MODE(MX31_PIN_CSI_D14, IOMUX_CONFIG_FUNC)
616#define MX31_PIN_CSI_D15__CSI_D15 IOMUX_MODE(MX31_PIN_CSI_D15, IOMUX_CONFIG_FUNC)
617#define MX31_PIN_CSI_HSYNC__CSI_HSYNC IOMUX_MODE(MX31_PIN_CSI_HSYNC, IOMUX_CONFIG_FUNC)
618#define MX31_PIN_CSI_MCLK__CSI_MCLK IOMUX_MODE(MX31_PIN_CSI_MCLK, IOMUX_CONFIG_FUNC)
619#define MX31_PIN_CSI_PIXCLK__CSI_PIXCLK IOMUX_MODE(MX31_PIN_CSI_PIXCLK, IOMUX_CONFIG_FUNC)
620#define MX31_PIN_CSI_VSYNC__CSI_VSYNC IOMUX_MODE(MX31_PIN_CSI_VSYNC, IOMUX_CONFIG_FUNC)
621#define MX31_PIN_GPIO3_0__GPIO3_0 IOMUX_MODE(MX31_PIN_GPIO3_0, IOMUX_CONFIG_GPIO)
622#define MX31_PIN_GPIO3_1__GPIO3_1 IOMUX_MODE(MX31_PIN_GPIO3_1, IOMUX_CONFIG_GPIO)
623#define MX31_PIN_TXD2__GPIO1_28 IOMUX_MODE(MX31_PIN_TXD2, IOMUX_CONFIG_GPIO)
624#define MX31_PIN_USBOTG_DATA0__USBOTG_DATA0 IOMUX_MODE(MX31_PIN_USBOTG_DATA0, IOMUX_CONFIG_FUNC)
625#define MX31_PIN_USBOTG_DATA1__USBOTG_DATA1 IOMUX_MODE(MX31_PIN_USBOTG_DATA1, IOMUX_CONFIG_FUNC)
626#define MX31_PIN_USBOTG_DATA2__USBOTG_DATA2 IOMUX_MODE(MX31_PIN_USBOTG_DATA2, IOMUX_CONFIG_FUNC)
627#define MX31_PIN_USBOTG_DATA3__USBOTG_DATA3 IOMUX_MODE(MX31_PIN_USBOTG_DATA3, IOMUX_CONFIG_FUNC)
628#define MX31_PIN_USBOTG_DATA4__USBOTG_DATA4 IOMUX_MODE(MX31_PIN_USBOTG_DATA4, IOMUX_CONFIG_FUNC)
629#define MX31_PIN_USBOTG_DATA5__USBOTG_DATA5 IOMUX_MODE(MX31_PIN_USBOTG_DATA5, IOMUX_CONFIG_FUNC)
630#define MX31_PIN_USBOTG_DATA6__USBOTG_DATA6 IOMUX_MODE(MX31_PIN_USBOTG_DATA6, IOMUX_CONFIG_FUNC)
631#define MX31_PIN_USBOTG_DATA7__USBOTG_DATA7 IOMUX_MODE(MX31_PIN_USBOTG_DATA7, IOMUX_CONFIG_FUNC)
632#define MX31_PIN_USBOTG_CLK__USBOTG_CLK IOMUX_MODE(MX31_PIN_USBOTG_CLK, IOMUX_CONFIG_FUNC)
633#define MX31_PIN_USBOTG_DIR__USBOTG_DIR IOMUX_MODE(MX31_PIN_USBOTG_DIR, IOMUX_CONFIG_FUNC)
634#define MX31_PIN_USBOTG_NXT__USBOTG_NXT IOMUX_MODE(MX31_PIN_USBOTG_NXT, IOMUX_CONFIG_FUNC)
635#define MX31_PIN_USBOTG_STP__USBOTG_STP IOMUX_MODE(MX31_PIN_USBOTG_STP, IOMUX_CONFIG_FUNC)
588 636
589/*XXX: The SS0, SS1, SS2, SS3 lines of spi3 are multiplexed by cspi2_ss0, cspi2_ss1, cspi1_ss0 637/*XXX: The SS0, SS1, SS2, SS3 lines of spi3 are multiplexed by cspi2_ss0, cspi2_ss1, cspi1_ss0
590 * cspi1_ss1*/ 638 * cspi1_ss1*/
diff --git a/arch/arm/plat-mxc/include/mach/irqs.h b/arch/arm/plat-mxc/include/mach/irqs.h
index c02b8fc2d821..518a36504b88 100644
--- a/arch/arm/plat-mxc/include/mach/irqs.h
+++ b/arch/arm/plat-mxc/include/mach/irqs.h
@@ -45,7 +45,7 @@
45 45
46#define NR_IRQS (MXC_IPU_IRQ_START + MX3_IPU_IRQS) 46#define NR_IRQS (MXC_IPU_IRQ_START + MX3_IPU_IRQS)
47 47
48extern void imx_irq_set_priority(unsigned char irq, unsigned char prio); 48extern int imx_irq_set_priority(unsigned char irq, unsigned char prio);
49 49
50/* all normal IRQs can be FIQs */ 50/* all normal IRQs can be FIQs */
51#define FIQ_START 0 51#define FIQ_START 0
diff --git a/arch/arm/plat-mxc/include/mach/mx21.h b/arch/arm/plat-mxc/include/mach/mx21.h
index e8c4cf56c24e..8b070a041a99 100644
--- a/arch/arm/plat-mxc/include/mach/mx21.h
+++ b/arch/arm/plat-mxc/include/mach/mx21.h
@@ -54,9 +54,6 @@
54 54
55#define IRAM_BASE_ADDR 0xFFFFE800 /* internal ram */ 55#define IRAM_BASE_ADDR 0xFFFFE800 /* internal ram */
56 56
57/* this CPU supports up to 192 GPIOs (don't forget the baseboard!) */
58#define ARCH_NR_GPIOS (6*32 + 16)
59
60/* fixed interrupt numbers */ 57/* fixed interrupt numbers */
61#define MXC_INT_USBCTRL 58 58#define MXC_INT_USBCTRL 58
62#define MXC_INT_USBCTRL 58 59#define MXC_INT_USBCTRL 58
diff --git a/arch/arm/plat-mxc/irq.c b/arch/arm/plat-mxc/irq.c
index 6e7578a3514b..0fb68a531f55 100644
--- a/arch/arm/plat-mxc/irq.c
+++ b/arch/arm/plat-mxc/irq.c
@@ -50,23 +50,27 @@
50#define IIM_PROD_REV_SH 3 50#define IIM_PROD_REV_SH 3
51#define IIM_PROD_REV_LEN 5 51#define IIM_PROD_REV_LEN 5
52 52
53#ifdef CONFIG_MXC_IRQ_PRIOR 53int imx_irq_set_priority(unsigned char irq, unsigned char prio)
54void imx_irq_set_priority(unsigned char irq, unsigned char prio)
55{ 54{
55#ifdef CONFIG_MXC_IRQ_PRIOR
56 unsigned int temp; 56 unsigned int temp;
57 unsigned int mask = 0x0F << irq % 8 * 4; 57 unsigned int mask = 0x0F << irq % 8 * 4;
58 58
59 if (irq > 63) 59 if (irq >= MXC_INTERNAL_IRQS)
60 return; 60 return -EINVAL;;
61 61
62 temp = __raw_readl(AVIC_NIPRIORITY(irq / 8)); 62 temp = __raw_readl(AVIC_NIPRIORITY(irq / 8));
63 temp &= ~mask; 63 temp &= ~mask;
64 temp |= prio & mask; 64 temp |= prio & mask;
65 65
66 __raw_writel(temp, AVIC_NIPRIORITY(irq / 8)); 66 __raw_writel(temp, AVIC_NIPRIORITY(irq / 8));
67
68 return 0;
69#else
70 return -ENOSYS;
71#endif
67} 72}
68EXPORT_SYMBOL(imx_irq_set_priority); 73EXPORT_SYMBOL(imx_irq_set_priority);
69#endif
70 74
71#ifdef CONFIG_FIQ 75#ifdef CONFIG_FIQ
72int mxc_set_irq_fiq(unsigned int irq, unsigned int type) 76int mxc_set_irq_fiq(unsigned int irq, unsigned int type)
diff --git a/arch/arm/plat-s3c/gpio-config.c b/arch/arm/plat-s3c/gpio-config.c
index 7642b975a998..08044dec9731 100644
--- a/arch/arm/plat-s3c/gpio-config.c
+++ b/arch/arm/plat-s3c/gpio-config.c
@@ -13,6 +13,7 @@
13*/ 13*/
14 14
15#include <linux/kernel.h> 15#include <linux/kernel.h>
16#include <linux/module.h>
16#include <linux/gpio.h> 17#include <linux/gpio.h>
17#include <linux/io.h> 18#include <linux/io.h>
18 19
@@ -38,6 +39,7 @@ int s3c_gpio_cfgpin(unsigned int pin, unsigned int config)
38 39
39 return ret; 40 return ret;
40} 41}
42EXPORT_SYMBOL(s3c_gpio_cfgpin);
41 43
42int s3c_gpio_setpull(unsigned int pin, s3c_gpio_pull_t pull) 44int s3c_gpio_setpull(unsigned int pin, s3c_gpio_pull_t pull)
43{ 45{
@@ -56,6 +58,7 @@ int s3c_gpio_setpull(unsigned int pin, s3c_gpio_pull_t pull)
56 58
57 return ret; 59 return ret;
58} 60}
61EXPORT_SYMBOL(s3c_gpio_setpull);
59 62
60#ifdef CONFIG_S3C_GPIO_CFG_S3C24XX 63#ifdef CONFIG_S3C_GPIO_CFG_S3C24XX
61int s3c_gpio_setcfg_s3c24xx_banka(struct s3c_gpio_chip *chip, 64int s3c_gpio_setcfg_s3c24xx_banka(struct s3c_gpio_chip *chip,
diff --git a/arch/arm/plat-s3c/include/plat/devs.h b/arch/arm/plat-s3c/include/plat/devs.h
index 6b1b5231511c..26f0cec3ac04 100644
--- a/arch/arm/plat-s3c/include/plat/devs.h
+++ b/arch/arm/plat-s3c/include/plat/devs.h
@@ -34,6 +34,7 @@ extern struct platform_device s3c_device_iis;
34extern struct platform_device s3c_device_rtc; 34extern struct platform_device s3c_device_rtc;
35extern struct platform_device s3c_device_adc; 35extern struct platform_device s3c_device_adc;
36extern struct platform_device s3c_device_sdi; 36extern struct platform_device s3c_device_sdi;
37extern struct platform_device s3c_device_hwmon;
37extern struct platform_device s3c_device_hsmmc0; 38extern struct platform_device s3c_device_hsmmc0;
38extern struct platform_device s3c_device_hsmmc1; 39extern struct platform_device s3c_device_hsmmc1;
39extern struct platform_device s3c_device_hsmmc2; 40extern struct platform_device s3c_device_hsmmc2;
diff --git a/arch/arm/plat-s3c24xx/adc.c b/arch/arm/plat-s3c24xx/adc.c
index 9a5c767e0a42..91adfa71c172 100644
--- a/arch/arm/plat-s3c24xx/adc.c
+++ b/arch/arm/plat-s3c24xx/adc.c
@@ -100,7 +100,7 @@ static void s3c_adc_dbgshow(struct adc_device *adc)
100 readl(adc->regs + S3C2410_ADCDLY)); 100 readl(adc->regs + S3C2410_ADCDLY));
101} 101}
102 102
103void s3c_adc_try(struct adc_device *adc) 103static void s3c_adc_try(struct adc_device *adc)
104{ 104{
105 struct s3c_adc_client *next = adc->ts_pend; 105 struct s3c_adc_client *next = adc->ts_pend;
106 106
@@ -190,6 +190,23 @@ EXPORT_SYMBOL_GPL(s3c_adc_register);
190void s3c_adc_release(struct s3c_adc_client *client) 190void s3c_adc_release(struct s3c_adc_client *client)
191{ 191{
192 /* We should really check that nothing is in progress. */ 192 /* We should really check that nothing is in progress. */
193 if (adc_dev->cur == client)
194 adc_dev->cur = NULL;
195 if (adc_dev->ts_pend == client)
196 adc_dev->ts_pend = NULL;
197 else {
198 struct list_head *p, *n;
199 struct s3c_adc_client *tmp;
200
201 list_for_each_safe(p, n, &adc_pending) {
202 tmp = list_entry(p, struct s3c_adc_client, pend);
203 if (tmp == client)
204 list_del(&tmp->pend);
205 }
206 }
207
208 if (adc_dev->cur == NULL)
209 s3c_adc_try(adc_dev);
193 kfree(client); 210 kfree(client);
194} 211}
195EXPORT_SYMBOL_GPL(s3c_adc_release); 212EXPORT_SYMBOL_GPL(s3c_adc_release);
diff --git a/arch/arm/plat-s3c24xx/gpiolib.c b/arch/arm/plat-s3c24xx/gpiolib.c
index 94a341aaa4e4..5c0491bf738b 100644
--- a/arch/arm/plat-s3c24xx/gpiolib.c
+++ b/arch/arm/plat-s3c24xx/gpiolib.c
@@ -19,7 +19,7 @@
19#include <linux/io.h> 19#include <linux/io.h>
20#include <linux/gpio.h> 20#include <linux/gpio.h>
21 21
22#include <plat/gpio-core.h> 22#include <mach/gpio-core.h>
23#include <mach/hardware.h> 23#include <mach/hardware.h>
24#include <asm/irq.h> 24#include <asm/irq.h>
25 25
diff --git a/arch/h8300/include/asm/timer.h b/arch/h8300/include/asm/timer.h
new file mode 100644
index 000000000000..def80464d38f
--- /dev/null
+++ b/arch/h8300/include/asm/timer.h
@@ -0,0 +1,25 @@
1#ifndef __H8300_TIMER_H
2#define __H8300_TIMER_H
3
4void h8300_timer_tick(void);
5void h8300_timer_setup(void);
6void h8300_gettod(unsigned int *year, unsigned int *mon, unsigned int *day,
7 unsigned int *hour, unsigned int *min, unsigned int *sec);
8
9#define TIMER_FREQ (CONFIG_CPU_CLOCK*10000) /* Timer input freq. */
10
11#define calc_param(cnt, div, rate, limit) \
12do { \
13 cnt = TIMER_FREQ / HZ; \
14 for (div = 0; div < ARRAY_SIZE(divide_rate); div++) { \
15 if (rate[div] == 0) \
16 continue; \
17 if ((cnt / rate[div]) > limit) \
18 break; \
19 } \
20 if (div == ARRAY_SIZE(divide_rate)) \
21 panic("Timer counter overflow"); \
22 cnt /= divide_rate[div]; \
23} while(0)
24
25#endif
diff --git a/arch/m32r/include/asm/Kbuild b/arch/m32r/include/asm/Kbuild
new file mode 100644
index 000000000000..c68e1680da01
--- /dev/null
+++ b/arch/m32r/include/asm/Kbuild
@@ -0,0 +1 @@
include include/asm-generic/Kbuild.asm
diff --git a/arch/m32r/include/asm/addrspace.h b/arch/m32r/include/asm/addrspace.h
new file mode 100644
index 000000000000..81782c122da4
--- /dev/null
+++ b/arch/m32r/include/asm/addrspace.h
@@ -0,0 +1,57 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2001 by Hiroyuki Kondo
7 *
8 * Defitions for the address spaces of the M32R CPUs.
9 */
10#ifndef __ASM_M32R_ADDRSPACE_H
11#define __ASM_M32R_ADDRSPACE_H
12
13/*
14 * Memory segments (32bit kernel mode addresses)
15 */
16#define KUSEG 0x00000000
17#define KSEG0 0x80000000
18#define KSEG1 0xa0000000
19#define KSEG2 0xc0000000
20#define KSEG3 0xe0000000
21
22#define K0BASE KSEG0
23
24/*
25 * Returns the kernel segment base of a given address
26 */
27#ifndef __ASSEMBLY__
28#define KSEGX(a) (((unsigned long)(a)) & 0xe0000000)
29#else
30#define KSEGX(a) ((a) & 0xe0000000)
31#endif
32
33/*
34 * Returns the physical address of a KSEG0/KSEG1 address
35 */
36#ifndef __ASSEMBLY__
37#define PHYSADDR(a) (((unsigned long)(a)) & 0x1fffffff)
38#else
39#define PHYSADDR(a) ((a) & 0x1fffffff)
40#endif
41
42/*
43 * Map an address to a certain kernel segment
44 */
45#ifndef __ASSEMBLY__
46#define KSEG0ADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | KSEG0))
47#define KSEG1ADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | KSEG1))
48#define KSEG2ADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | KSEG2))
49#define KSEG3ADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | KSEG3))
50#else
51#define KSEG0ADDR(a) (((a) & 0x1fffffff) | KSEG0)
52#define KSEG1ADDR(a) (((a) & 0x1fffffff) | KSEG1)
53#define KSEG2ADDR(a) (((a) & 0x1fffffff) | KSEG2)
54#define KSEG3ADDR(a) (((a) & 0x1fffffff) | KSEG3)
55#endif
56
57#endif /* __ASM_M32R_ADDRSPACE_H */
diff --git a/arch/m32r/include/asm/assembler.h b/arch/m32r/include/asm/assembler.h
new file mode 100644
index 000000000000..26351539b5ff
--- /dev/null
+++ b/arch/m32r/include/asm/assembler.h
@@ -0,0 +1,229 @@
1#ifndef _ASM_M32R_ASSEMBLER_H
2#define _ASM_M32R_ASSEMBLER_H
3
4/*
5 * linux/asm-m32r/assembler.h
6 *
7 * Copyright (C) 2004 Hirokazu Takata <takata at linux-m32r.org>
8 *
9 * This file contains M32R architecture specific macro definitions.
10 */
11
12
13#ifndef __STR
14#ifdef __ASSEMBLY__
15#define __STR(x) x
16#else
17#define __STR(x) #x
18#endif
19#endif /* __STR */
20
21#ifdef CONFIG_SMP
22#define M32R_LOCK __STR(lock)
23#define M32R_UNLOCK __STR(unlock)
24#else
25#define M32R_LOCK __STR(ld)
26#define M32R_UNLOCK __STR(st)
27#endif
28
29#ifdef __ASSEMBLY__
30#undef ENTRY
31#define ENTRY(name) ENTRY_M name
32 .macro ENTRY_M name
33 .global \name
34 ALIGN
35\name:
36 .endm
37#endif
38
39
40/**
41 * LDIMM - load immediate value
42 * STI - enable interruption
43 * CLI - disable interruption
44 */
45
46#ifdef __ASSEMBLY__
47
48#define LDIMM(reg,x) LDIMM reg x
49 .macro LDIMM reg x
50 seth \reg, #high(\x)
51 or3 \reg, \reg, #low(\x)
52 .endm
53
54#if !(defined(CONFIG_CHIP_M32102) || defined(CONFIG_CHIP_M32104))
55#define ENABLE_INTERRUPTS(reg) ENABLE_INTERRUPTS reg
56 .macro ENABLE_INTERRUPTS reg
57 setpsw #0x40 -> nop
58 ; WORKAROUND: "-> nop" is a workaround for the M32700(TS1).
59 .endm
60
61#define DISABLE_INTERRUPTS(reg) DISABLE_INTERRUPTS reg
62 .macro DISABLE_INTERRUPTS reg
63 clrpsw #0x40 -> nop
64 ; WORKAROUND: "-> nop" is a workaround for the M32700(TS1).
65 .endm
66#else /* CONFIG_CHIP_M32102 || CONFIG_CHIP_M32104 */
67#define ENABLE_INTERRUPTS(reg) ENABLE_INTERRUPTS reg
68 .macro ENABLE_INTERRUPTS reg
69 mvfc \reg, psw
70 or3 \reg, \reg, #0x0040
71 mvtc \reg, psw
72 .endm
73
74#define DISABLE_INTERRUPTS(reg) DISABLE_INTERRUPTS reg
75 .macro DISABLE_INTERRUPTS reg
76 mvfc \reg, psw
77 and3 \reg, \reg, #0xffbf
78 mvtc \reg, psw
79 .endm
80#endif /* CONFIG_CHIP_M32102 */
81
82 .macro SAVE_ALL
83 push r0 ; orig_r0
84 push sp ; spi (r15)
85 push lr ; r14
86 push r13
87 mvfc r13, cr3 ; spu
88 push r13
89 mvfc r13, bbpc
90 push r13
91 mvfc r13, bbpsw
92 push r13
93 mvfc r13, bpc
94 push r13
95 mvfc r13, psw
96 push r13
97#if defined(CONFIG_ISA_M32R2) && defined(CONFIG_ISA_DSP_LEVEL2)
98 mvfaclo r13, a1
99 push r13
100 mvfachi r13, a1
101 push r13
102 mvfaclo r13, a0
103 push r13
104 mvfachi r13, a0
105 push r13
106#elif defined(CONFIG_ISA_M32R2) || defined(CONFIG_ISA_M32R)
107 mvfaclo r13
108 push r13
109 mvfachi r13
110 push r13
111 ldi r13, #0
112 push r13 ; dummy push acc1h
113 push r13 ; dummy push acc1l
114#else
115#error unknown isa configuration
116#endif
117 ldi r13, #-1
118 push r13 ; syscall_nr (default: -1)
119 push r12
120 push r11
121 push r10
122 push r9
123 push r8
124 push r7
125 push r3
126 push r2
127 push r1
128 push r0
129 addi sp, #-4 ; room for implicit pt_regs parameter
130 push r6
131 push r5
132 push r4
133 .endm
134
135 .macro RESTORE_ALL
136 pop r4
137 pop r5
138 pop r6
139 addi sp, #4
140 pop r0
141 pop r1
142 pop r2
143 pop r3
144 pop r7
145 pop r8
146 pop r9
147 pop r10
148 pop r11
149 pop r12
150 addi r15, #4 ; Skip syscall number
151#if defined(CONFIG_ISA_M32R2) && defined(CONFIG_ISA_DSP_LEVEL2)
152 pop r13
153 mvtachi r13, a0
154 pop r13
155 mvtaclo r13, a0
156 pop r13
157 mvtachi r13, a1
158 pop r13
159 mvtaclo r13, a1
160#elif defined(CONFIG_ISA_M32R2) || defined(CONFIG_ISA_M32R)
161 pop r13 ; dummy pop acc1h
162 pop r13 ; dummy pop acc1l
163 pop r13
164 mvtachi r13
165 pop r13
166 mvtaclo r13
167#else
168#error unknown isa configuration
169#endif
170 pop r14
171 mvtc r14, psw
172 pop r14
173 mvtc r14, bpc
174 addi sp, #8 ; Skip bbpsw, bbpc
175 pop r14
176 mvtc r14, cr3 ; spu
177 pop r13
178 pop lr ; r14
179 pop sp ; spi (r15)
180 addi sp, #4 ; Skip orig_r0
181 .fillinsn
1821: rte
183 .section .fixup,"ax"
1842: bl do_exit
185 .previous
186 .section __ex_table,"a"
187 ALIGN
188 .long 1b, 2b
189 .previous
190 .endm
191
192#define GET_CURRENT(reg) get_current reg
193 .macro get_current reg
194 ldi \reg, #-8192
195 and \reg, sp
196 .endm
197
198#if !(defined(CONFIG_CHIP_M32102) || defined(CONFIG_CHIP_M32104))
199 .macro SWITCH_TO_KERNEL_STACK
200 ; switch to kernel stack (spi)
201 clrpsw #0x80 -> nop
202 .endm
203#else /* CONFIG_CHIP_M32102 || CONFIG_CHIP_M32104 */
204 .macro SWITCH_TO_KERNEL_STACK
205 push r0 ; save r0 for working
206 mvfc r0, psw
207 and3 r0, r0, #0x00ff7f
208 mvtc r0, psw
209 slli r0, #16
210 bltz r0, 1f ; check BSM-bit
211;
212 ;; called from kernel context: previous stack = spi
213 pop r0 ; retrieve r0
214 bra 2f
215 .fillinsn
2161:
217 ;; called from user context: previous stack = spu
218 mvfc r0, cr3 ; spu
219 addi r0, #4
220 mvtc r0, cr3 ; spu
221 ld r0, @(-4,r0) ; retrieve r0
222 .fillinsn
2232:
224 .endm
225#endif /* CONFIG_CHIP_M32102 || CONFIG_CHIP_M32104 */
226
227#endif /* __ASSEMBLY__ */
228
229#endif /* _ASM_M32R_ASSEMBLER_H */
diff --git a/arch/m32r/include/asm/atomic.h b/arch/m32r/include/asm/atomic.h
new file mode 100644
index 000000000000..2eed30f84080
--- /dev/null
+++ b/arch/m32r/include/asm/atomic.h
@@ -0,0 +1,318 @@
1#ifndef _ASM_M32R_ATOMIC_H
2#define _ASM_M32R_ATOMIC_H
3
4/*
5 * linux/include/asm-m32r/atomic.h
6 *
7 * M32R version:
8 * Copyright (C) 2001, 2002 Hitoshi Yamamoto
9 * Copyright (C) 2004 Hirokazu Takata <takata at linux-m32r.org>
10 */
11
12#include <linux/types.h>
13#include <asm/assembler.h>
14#include <asm/system.h>
15
16/*
17 * Atomic operations that C can't guarantee us. Useful for
18 * resource counting etc..
19 */
20
21#define ATOMIC_INIT(i) { (i) }
22
23/**
24 * atomic_read - read atomic variable
25 * @v: pointer of type atomic_t
26 *
27 * Atomically reads the value of @v.
28 */
29#define atomic_read(v) ((v)->counter)
30
31/**
32 * atomic_set - set atomic variable
33 * @v: pointer of type atomic_t
34 * @i: required value
35 *
36 * Atomically sets the value of @v to @i.
37 */
38#define atomic_set(v,i) (((v)->counter) = (i))
39
40/**
41 * atomic_add_return - add integer to atomic variable and return it
42 * @i: integer value to add
43 * @v: pointer of type atomic_t
44 *
45 * Atomically adds @i to @v and return (@i + @v).
46 */
47static __inline__ int atomic_add_return(int i, atomic_t *v)
48{
49 unsigned long flags;
50 int result;
51
52 local_irq_save(flags);
53 __asm__ __volatile__ (
54 "# atomic_add_return \n\t"
55 DCACHE_CLEAR("%0", "r4", "%1")
56 M32R_LOCK" %0, @%1; \n\t"
57 "add %0, %2; \n\t"
58 M32R_UNLOCK" %0, @%1; \n\t"
59 : "=&r" (result)
60 : "r" (&v->counter), "r" (i)
61 : "memory"
62#ifdef CONFIG_CHIP_M32700_TS1
63 , "r4"
64#endif /* CONFIG_CHIP_M32700_TS1 */
65 );
66 local_irq_restore(flags);
67
68 return result;
69}
70
71/**
72 * atomic_sub_return - subtract integer from atomic variable and return it
73 * @i: integer value to subtract
74 * @v: pointer of type atomic_t
75 *
76 * Atomically subtracts @i from @v and return (@v - @i).
77 */
78static __inline__ int atomic_sub_return(int i, atomic_t *v)
79{
80 unsigned long flags;
81 int result;
82
83 local_irq_save(flags);
84 __asm__ __volatile__ (
85 "# atomic_sub_return \n\t"
86 DCACHE_CLEAR("%0", "r4", "%1")
87 M32R_LOCK" %0, @%1; \n\t"
88 "sub %0, %2; \n\t"
89 M32R_UNLOCK" %0, @%1; \n\t"
90 : "=&r" (result)
91 : "r" (&v->counter), "r" (i)
92 : "memory"
93#ifdef CONFIG_CHIP_M32700_TS1
94 , "r4"
95#endif /* CONFIG_CHIP_M32700_TS1 */
96 );
97 local_irq_restore(flags);
98
99 return result;
100}
101
102/**
103 * atomic_add - add integer to atomic variable
104 * @i: integer value to add
105 * @v: pointer of type atomic_t
106 *
107 * Atomically adds @i to @v.
108 */
109#define atomic_add(i,v) ((void) atomic_add_return((i), (v)))
110
111/**
112 * atomic_sub - subtract the atomic variable
113 * @i: integer value to subtract
114 * @v: pointer of type atomic_t
115 *
116 * Atomically subtracts @i from @v.
117 */
118#define atomic_sub(i,v) ((void) atomic_sub_return((i), (v)))
119
120/**
121 * atomic_sub_and_test - subtract value from variable and test result
122 * @i: integer value to subtract
123 * @v: pointer of type atomic_t
124 *
125 * Atomically subtracts @i from @v and returns
126 * true if the result is zero, or false for all
127 * other cases.
128 */
129#define atomic_sub_and_test(i,v) (atomic_sub_return((i), (v)) == 0)
130
131/**
132 * atomic_inc_return - increment atomic variable and return it
133 * @v: pointer of type atomic_t
134 *
135 * Atomically increments @v by 1 and returns the result.
136 */
137static __inline__ int atomic_inc_return(atomic_t *v)
138{
139 unsigned long flags;
140 int result;
141
142 local_irq_save(flags);
143 __asm__ __volatile__ (
144 "# atomic_inc_return \n\t"
145 DCACHE_CLEAR("%0", "r4", "%1")
146 M32R_LOCK" %0, @%1; \n\t"
147 "addi %0, #1; \n\t"
148 M32R_UNLOCK" %0, @%1; \n\t"
149 : "=&r" (result)
150 : "r" (&v->counter)
151 : "memory"
152#ifdef CONFIG_CHIP_M32700_TS1
153 , "r4"
154#endif /* CONFIG_CHIP_M32700_TS1 */
155 );
156 local_irq_restore(flags);
157
158 return result;
159}
160
161/**
162 * atomic_dec_return - decrement atomic variable and return it
163 * @v: pointer of type atomic_t
164 *
165 * Atomically decrements @v by 1 and returns the result.
166 */
167static __inline__ int atomic_dec_return(atomic_t *v)
168{
169 unsigned long flags;
170 int result;
171
172 local_irq_save(flags);
173 __asm__ __volatile__ (
174 "# atomic_dec_return \n\t"
175 DCACHE_CLEAR("%0", "r4", "%1")
176 M32R_LOCK" %0, @%1; \n\t"
177 "addi %0, #-1; \n\t"
178 M32R_UNLOCK" %0, @%1; \n\t"
179 : "=&r" (result)
180 : "r" (&v->counter)
181 : "memory"
182#ifdef CONFIG_CHIP_M32700_TS1
183 , "r4"
184#endif /* CONFIG_CHIP_M32700_TS1 */
185 );
186 local_irq_restore(flags);
187
188 return result;
189}
190
191/**
192 * atomic_inc - increment atomic variable
193 * @v: pointer of type atomic_t
194 *
195 * Atomically increments @v by 1.
196 */
197#define atomic_inc(v) ((void)atomic_inc_return(v))
198
199/**
200 * atomic_dec - decrement atomic variable
201 * @v: pointer of type atomic_t
202 *
203 * Atomically decrements @v by 1.
204 */
205#define atomic_dec(v) ((void)atomic_dec_return(v))
206
207/**
208 * atomic_inc_and_test - increment and test
209 * @v: pointer of type atomic_t
210 *
211 * Atomically increments @v by 1
212 * and returns true if the result is zero, or false for all
213 * other cases.
214 */
215#define atomic_inc_and_test(v) (atomic_inc_return(v) == 0)
216
217/**
218 * atomic_dec_and_test - decrement and test
219 * @v: pointer of type atomic_t
220 *
221 * Atomically decrements @v by 1 and
222 * returns true if the result is 0, or false for all
223 * other cases.
224 */
225#define atomic_dec_and_test(v) (atomic_dec_return(v) == 0)
226
227/**
228 * atomic_add_negative - add and test if negative
229 * @v: pointer of type atomic_t
230 * @i: integer value to add
231 *
232 * Atomically adds @i to @v and returns true
233 * if the result is negative, or false when
234 * result is greater than or equal to zero.
235 */
236#define atomic_add_negative(i,v) (atomic_add_return((i), (v)) < 0)
237
238#define atomic_cmpxchg(v, o, n) ((int)cmpxchg(&((v)->counter), (o), (n)))
239#define atomic_xchg(v, new) (xchg(&((v)->counter), new))
240
241/**
242 * atomic_add_unless - add unless the number is a given value
243 * @v: pointer of type atomic_t
244 * @a: the amount to add to v...
245 * @u: ...unless v is equal to u.
246 *
247 * Atomically adds @a to @v, so long as it was not @u.
248 * Returns non-zero if @v was not @u, and zero otherwise.
249 */
250static __inline__ int atomic_add_unless(atomic_t *v, int a, int u)
251{
252 int c, old;
253 c = atomic_read(v);
254 for (;;) {
255 if (unlikely(c == (u)))
256 break;
257 old = atomic_cmpxchg((v), c, c + (a));
258 if (likely(old == c))
259 break;
260 c = old;
261 }
262 return c != (u);
263}
264
265#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
266
267static __inline__ void atomic_clear_mask(unsigned long mask, atomic_t *addr)
268{
269 unsigned long flags;
270 unsigned long tmp;
271
272 local_irq_save(flags);
273 __asm__ __volatile__ (
274 "# atomic_clear_mask \n\t"
275 DCACHE_CLEAR("%0", "r5", "%1")
276 M32R_LOCK" %0, @%1; \n\t"
277 "and %0, %2; \n\t"
278 M32R_UNLOCK" %0, @%1; \n\t"
279 : "=&r" (tmp)
280 : "r" (addr), "r" (~mask)
281 : "memory"
282#ifdef CONFIG_CHIP_M32700_TS1
283 , "r5"
284#endif /* CONFIG_CHIP_M32700_TS1 */
285 );
286 local_irq_restore(flags);
287}
288
289static __inline__ void atomic_set_mask(unsigned long mask, atomic_t *addr)
290{
291 unsigned long flags;
292 unsigned long tmp;
293
294 local_irq_save(flags);
295 __asm__ __volatile__ (
296 "# atomic_set_mask \n\t"
297 DCACHE_CLEAR("%0", "r5", "%1")
298 M32R_LOCK" %0, @%1; \n\t"
299 "or %0, %2; \n\t"
300 M32R_UNLOCK" %0, @%1; \n\t"
301 : "=&r" (tmp)
302 : "r" (addr), "r" (mask)
303 : "memory"
304#ifdef CONFIG_CHIP_M32700_TS1
305 , "r5"
306#endif /* CONFIG_CHIP_M32700_TS1 */
307 );
308 local_irq_restore(flags);
309}
310
311/* Atomic operations are already serializing on m32r */
312#define smp_mb__before_atomic_dec() barrier()
313#define smp_mb__after_atomic_dec() barrier()
314#define smp_mb__before_atomic_inc() barrier()
315#define smp_mb__after_atomic_inc() barrier()
316
317#include <asm-generic/atomic.h>
318#endif /* _ASM_M32R_ATOMIC_H */
diff --git a/arch/m32r/include/asm/auxvec.h b/arch/m32r/include/asm/auxvec.h
new file mode 100644
index 000000000000..f76dcc860fae
--- /dev/null
+++ b/arch/m32r/include/asm/auxvec.h
@@ -0,0 +1,4 @@
1#ifndef _ASM_M32R__AUXVEC_H
2#define _ASM_M32R__AUXVEC_H
3
4#endif /* _ASM_M32R__AUXVEC_H */
diff --git a/arch/m32r/include/asm/bitops.h b/arch/m32r/include/asm/bitops.h
new file mode 100644
index 000000000000..aaddf0d57603
--- /dev/null
+++ b/arch/m32r/include/asm/bitops.h
@@ -0,0 +1,275 @@
1#ifndef _ASM_M32R_BITOPS_H
2#define _ASM_M32R_BITOPS_H
3
4/*
5 * linux/include/asm-m32r/bitops.h
6 *
7 * Copyright 1992, Linus Torvalds.
8 *
9 * M32R version:
10 * Copyright (C) 2001, 2002 Hitoshi Yamamoto
11 * Copyright (C) 2004 Hirokazu Takata <takata at linux-m32r.org>
12 */
13
14#ifndef _LINUX_BITOPS_H
15#error only <linux/bitops.h> can be included directly
16#endif
17
18#include <linux/compiler.h>
19#include <asm/assembler.h>
20#include <asm/system.h>
21#include <asm/byteorder.h>
22#include <asm/types.h>
23
24/*
25 * These have to be done with inline assembly: that way the bit-setting
26 * is guaranteed to be atomic. All bit operations return 0 if the bit
27 * was cleared before the operation and != 0 if it was not.
28 *
29 * bit 0 is the LSB of addr; bit 32 is the LSB of (addr+1).
30 */
31
32/**
33 * set_bit - Atomically set a bit in memory
34 * @nr: the bit to set
35 * @addr: the address to start counting from
36 *
37 * This function is atomic and may not be reordered. See __set_bit()
38 * if you do not require the atomic guarantees.
39 * Note that @nr may be almost arbitrarily large; this function is not
40 * restricted to acting on a single-word quantity.
41 */
42static __inline__ void set_bit(int nr, volatile void * addr)
43{
44 __u32 mask;
45 volatile __u32 *a = addr;
46 unsigned long flags;
47 unsigned long tmp;
48
49 a += (nr >> 5);
50 mask = (1 << (nr & 0x1F));
51
52 local_irq_save(flags);
53 __asm__ __volatile__ (
54 DCACHE_CLEAR("%0", "r6", "%1")
55 M32R_LOCK" %0, @%1; \n\t"
56 "or %0, %2; \n\t"
57 M32R_UNLOCK" %0, @%1; \n\t"
58 : "=&r" (tmp)
59 : "r" (a), "r" (mask)
60 : "memory"
61#ifdef CONFIG_CHIP_M32700_TS1
62 , "r6"
63#endif /* CONFIG_CHIP_M32700_TS1 */
64 );
65 local_irq_restore(flags);
66}
67
68/**
69 * clear_bit - Clears a bit in memory
70 * @nr: Bit to clear
71 * @addr: Address to start counting from
72 *
73 * clear_bit() is atomic and may not be reordered. However, it does
74 * not contain a memory barrier, so if it is used for locking purposes,
75 * you should call smp_mb__before_clear_bit() and/or smp_mb__after_clear_bit()
76 * in order to ensure changes are visible on other processors.
77 */
78static __inline__ void clear_bit(int nr, volatile void * addr)
79{
80 __u32 mask;
81 volatile __u32 *a = addr;
82 unsigned long flags;
83 unsigned long tmp;
84
85 a += (nr >> 5);
86 mask = (1 << (nr & 0x1F));
87
88 local_irq_save(flags);
89
90 __asm__ __volatile__ (
91 DCACHE_CLEAR("%0", "r6", "%1")
92 M32R_LOCK" %0, @%1; \n\t"
93 "and %0, %2; \n\t"
94 M32R_UNLOCK" %0, @%1; \n\t"
95 : "=&r" (tmp)
96 : "r" (a), "r" (~mask)
97 : "memory"
98#ifdef CONFIG_CHIP_M32700_TS1
99 , "r6"
100#endif /* CONFIG_CHIP_M32700_TS1 */
101 );
102 local_irq_restore(flags);
103}
104
105#define smp_mb__before_clear_bit() barrier()
106#define smp_mb__after_clear_bit() barrier()
107
108/**
109 * change_bit - Toggle a bit in memory
110 * @nr: Bit to clear
111 * @addr: Address to start counting from
112 *
113 * change_bit() is atomic and may not be reordered.
114 * Note that @nr may be almost arbitrarily large; this function is not
115 * restricted to acting on a single-word quantity.
116 */
117static __inline__ void change_bit(int nr, volatile void * addr)
118{
119 __u32 mask;
120 volatile __u32 *a = addr;
121 unsigned long flags;
122 unsigned long tmp;
123
124 a += (nr >> 5);
125 mask = (1 << (nr & 0x1F));
126
127 local_irq_save(flags);
128 __asm__ __volatile__ (
129 DCACHE_CLEAR("%0", "r6", "%1")
130 M32R_LOCK" %0, @%1; \n\t"
131 "xor %0, %2; \n\t"
132 M32R_UNLOCK" %0, @%1; \n\t"
133 : "=&r" (tmp)
134 : "r" (a), "r" (mask)
135 : "memory"
136#ifdef CONFIG_CHIP_M32700_TS1
137 , "r6"
138#endif /* CONFIG_CHIP_M32700_TS1 */
139 );
140 local_irq_restore(flags);
141}
142
143/**
144 * test_and_set_bit - Set a bit and return its old value
145 * @nr: Bit to set
146 * @addr: Address to count from
147 *
148 * This operation is atomic and cannot be reordered.
149 * It also implies a memory barrier.
150 */
151static __inline__ int test_and_set_bit(int nr, volatile void * addr)
152{
153 __u32 mask, oldbit;
154 volatile __u32 *a = addr;
155 unsigned long flags;
156 unsigned long tmp;
157
158 a += (nr >> 5);
159 mask = (1 << (nr & 0x1F));
160
161 local_irq_save(flags);
162 __asm__ __volatile__ (
163 DCACHE_CLEAR("%0", "%1", "%2")
164 M32R_LOCK" %0, @%2; \n\t"
165 "mv %1, %0; \n\t"
166 "and %0, %3; \n\t"
167 "or %1, %3; \n\t"
168 M32R_UNLOCK" %1, @%2; \n\t"
169 : "=&r" (oldbit), "=&r" (tmp)
170 : "r" (a), "r" (mask)
171 : "memory"
172 );
173 local_irq_restore(flags);
174
175 return (oldbit != 0);
176}
177
178/**
179 * test_and_clear_bit - Clear a bit and return its old value
180 * @nr: Bit to set
181 * @addr: Address to count from
182 *
183 * This operation is atomic and cannot be reordered.
184 * It also implies a memory barrier.
185 */
186static __inline__ int test_and_clear_bit(int nr, volatile void * addr)
187{
188 __u32 mask, oldbit;
189 volatile __u32 *a = addr;
190 unsigned long flags;
191 unsigned long tmp;
192
193 a += (nr >> 5);
194 mask = (1 << (nr & 0x1F));
195
196 local_irq_save(flags);
197
198 __asm__ __volatile__ (
199 DCACHE_CLEAR("%0", "%1", "%3")
200 M32R_LOCK" %0, @%3; \n\t"
201 "mv %1, %0; \n\t"
202 "and %0, %2; \n\t"
203 "not %2, %2; \n\t"
204 "and %1, %2; \n\t"
205 M32R_UNLOCK" %1, @%3; \n\t"
206 : "=&r" (oldbit), "=&r" (tmp), "+r" (mask)
207 : "r" (a)
208 : "memory"
209 );
210 local_irq_restore(flags);
211
212 return (oldbit != 0);
213}
214
215/**
216 * test_and_change_bit - Change a bit and return its old value
217 * @nr: Bit to set
218 * @addr: Address to count from
219 *
220 * This operation is atomic and cannot be reordered.
221 * It also implies a memory barrier.
222 */
223static __inline__ int test_and_change_bit(int nr, volatile void * addr)
224{
225 __u32 mask, oldbit;
226 volatile __u32 *a = addr;
227 unsigned long flags;
228 unsigned long tmp;
229
230 a += (nr >> 5);
231 mask = (1 << (nr & 0x1F));
232
233 local_irq_save(flags);
234 __asm__ __volatile__ (
235 DCACHE_CLEAR("%0", "%1", "%2")
236 M32R_LOCK" %0, @%2; \n\t"
237 "mv %1, %0; \n\t"
238 "and %0, %3; \n\t"
239 "xor %1, %3; \n\t"
240 M32R_UNLOCK" %1, @%2; \n\t"
241 : "=&r" (oldbit), "=&r" (tmp)
242 : "r" (a), "r" (mask)
243 : "memory"
244 );
245 local_irq_restore(flags);
246
247 return (oldbit != 0);
248}
249
250#include <asm-generic/bitops/non-atomic.h>
251#include <asm-generic/bitops/ffz.h>
252#include <asm-generic/bitops/__ffs.h>
253#include <asm-generic/bitops/fls.h>
254#include <asm-generic/bitops/__fls.h>
255#include <asm-generic/bitops/fls64.h>
256
257#ifdef __KERNEL__
258
259#include <asm-generic/bitops/sched.h>
260#include <asm-generic/bitops/find.h>
261#include <asm-generic/bitops/ffs.h>
262#include <asm-generic/bitops/hweight.h>
263#include <asm-generic/bitops/lock.h>
264
265#endif /* __KERNEL__ */
266
267#ifdef __KERNEL__
268
269#include <asm-generic/bitops/ext2-non-atomic.h>
270#include <asm-generic/bitops/ext2-atomic.h>
271#include <asm-generic/bitops/minix.h>
272
273#endif /* __KERNEL__ */
274
275#endif /* _ASM_M32R_BITOPS_H */
diff --git a/arch/m32r/include/asm/bug.h b/arch/m32r/include/asm/bug.h
new file mode 100644
index 000000000000..4cc0462c15b8
--- /dev/null
+++ b/arch/m32r/include/asm/bug.h
@@ -0,0 +1,4 @@
1#ifndef _M32R_BUG_H
2#define _M32R_BUG_H
3#include <asm-generic/bug.h>
4#endif
diff --git a/arch/m32r/include/asm/bugs.h b/arch/m32r/include/asm/bugs.h
new file mode 100644
index 000000000000..f77214eff136
--- /dev/null
+++ b/arch/m32r/include/asm/bugs.h
@@ -0,0 +1,19 @@
1#ifndef _ASM_M32R_BUGS_H
2#define _ASM_M32R_BUGS_H
3
4/*
5 * This is included by init/main.c to check for architecture-dependent bugs.
6 *
7 * Needs:
8 * void check_bugs(void);
9 */
10#include <asm/processor.h>
11
12static void __init check_bugs(void)
13{
14 extern unsigned long loops_per_jiffy;
15
16 current_cpu_data.loops_per_jiffy = loops_per_jiffy;
17}
18
19#endif /* _ASM_M32R_BUGS_H */
diff --git a/arch/m32r/include/asm/byteorder.h b/arch/m32r/include/asm/byteorder.h
new file mode 100644
index 000000000000..21855d8b028b
--- /dev/null
+++ b/arch/m32r/include/asm/byteorder.h
@@ -0,0 +1,10 @@
1#ifndef _ASM_M32R_BYTEORDER_H
2#define _ASM_M32R_BYTEORDER_H
3
4#if defined(__LITTLE_ENDIAN__)
5# include <linux/byteorder/little_endian.h>
6#else
7# include <linux/byteorder/big_endian.h>
8#endif
9
10#endif /* _ASM_M32R_BYTEORDER_H */
diff --git a/arch/m32r/include/asm/cache.h b/arch/m32r/include/asm/cache.h
new file mode 100644
index 000000000000..40b3ee98193d
--- /dev/null
+++ b/arch/m32r/include/asm/cache.h
@@ -0,0 +1,8 @@
1#ifndef _ASM_M32R_CACHE_H
2#define _ASM_M32R_CACHE_H
3
4/* L1 cache line size */
5#define L1_CACHE_SHIFT 4
6#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
7
8#endif /* _ASM_M32R_CACHE_H */
diff --git a/arch/m32r/include/asm/cachectl.h b/arch/m32r/include/asm/cachectl.h
new file mode 100644
index 000000000000..2aab8f6fff41
--- /dev/null
+++ b/arch/m32r/include/asm/cachectl.h
@@ -0,0 +1,26 @@
1/*
2 * cachectl.h -- defines for M32R cache control system calls
3 *
4 * Copyright (C) 2003 by Kazuhiro Inaoka
5 */
6#ifndef __ASM_M32R_CACHECTL
7#define __ASM_M32R_CACHECTL
8
9/*
10 * Options for cacheflush system call
11 *
12 * cacheflush() is currently fluch_cache_all().
13 */
14#define ICACHE (1<<0) /* flush instruction cache */
15#define DCACHE (1<<1) /* writeback and flush data cache */
16#define BCACHE (ICACHE|DCACHE) /* flush both caches */
17
18/*
19 * Caching modes for the cachectl(2) call
20 *
21 * cachectl(2) is currently not supported and returns ENOSYS.
22 */
23#define CACHEABLE 0 /* make pages cacheable */
24#define UNCACHEABLE 1 /* make pages uncacheable */
25
26#endif /* __ASM_M32R_CACHECTL */
diff --git a/arch/m32r/include/asm/cacheflush.h b/arch/m32r/include/asm/cacheflush.h
new file mode 100644
index 000000000000..78587c958146
--- /dev/null
+++ b/arch/m32r/include/asm/cacheflush.h
@@ -0,0 +1,69 @@
1#ifndef _ASM_M32R_CACHEFLUSH_H
2#define _ASM_M32R_CACHEFLUSH_H
3
4#include <linux/mm.h>
5
6extern void _flush_cache_all(void);
7extern void _flush_cache_copyback_all(void);
8
9#if defined(CONFIG_CHIP_M32700) || defined(CONFIG_CHIP_OPSP) || defined(CONFIG_CHIP_M32104)
10#define flush_cache_all() do { } while (0)
11#define flush_cache_mm(mm) do { } while (0)
12#define flush_cache_dup_mm(mm) do { } while (0)
13#define flush_cache_range(vma, start, end) do { } while (0)
14#define flush_cache_page(vma, vmaddr, pfn) do { } while (0)
15#define flush_dcache_page(page) do { } while (0)
16#define flush_dcache_mmap_lock(mapping) do { } while (0)
17#define flush_dcache_mmap_unlock(mapping) do { } while (0)
18#ifndef CONFIG_SMP
19#define flush_icache_range(start, end) _flush_cache_copyback_all()
20#define flush_icache_page(vma,pg) _flush_cache_copyback_all()
21#define flush_icache_user_range(vma,pg,adr,len) _flush_cache_copyback_all()
22#define flush_cache_sigtramp(addr) _flush_cache_copyback_all()
23#else /* CONFIG_SMP */
24extern void smp_flush_cache_all(void);
25#define flush_icache_range(start, end) smp_flush_cache_all()
26#define flush_icache_page(vma,pg) smp_flush_cache_all()
27#define flush_icache_user_range(vma,pg,adr,len) smp_flush_cache_all()
28#define flush_cache_sigtramp(addr) _flush_cache_copyback_all()
29#endif /* CONFIG_SMP */
30#elif defined(CONFIG_CHIP_M32102)
31#define flush_cache_all() do { } while (0)
32#define flush_cache_mm(mm) do { } while (0)
33#define flush_cache_dup_mm(mm) do { } while (0)
34#define flush_cache_range(vma, start, end) do { } while (0)
35#define flush_cache_page(vma, vmaddr, pfn) do { } while (0)
36#define flush_dcache_page(page) do { } while (0)
37#define flush_dcache_mmap_lock(mapping) do { } while (0)
38#define flush_dcache_mmap_unlock(mapping) do { } while (0)
39#define flush_icache_range(start, end) _flush_cache_all()
40#define flush_icache_page(vma,pg) _flush_cache_all()
41#define flush_icache_user_range(vma,pg,adr,len) _flush_cache_all()
42#define flush_cache_sigtramp(addr) _flush_cache_all()
43#else
44#define flush_cache_all() do { } while (0)
45#define flush_cache_mm(mm) do { } while (0)
46#define flush_cache_dup_mm(mm) do { } while (0)
47#define flush_cache_range(vma, start, end) do { } while (0)
48#define flush_cache_page(vma, vmaddr, pfn) do { } while (0)
49#define flush_dcache_page(page) do { } while (0)
50#define flush_dcache_mmap_lock(mapping) do { } while (0)
51#define flush_dcache_mmap_unlock(mapping) do { } while (0)
52#define flush_icache_range(start, end) do { } while (0)
53#define flush_icache_page(vma,pg) do { } while (0)
54#define flush_icache_user_range(vma,pg,adr,len) do { } while (0)
55#define flush_cache_sigtramp(addr) do { } while (0)
56#endif /* CONFIG_CHIP_* */
57
58#define flush_cache_vmap(start, end) do { } while (0)
59#define flush_cache_vunmap(start, end) do { } while (0)
60
61#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
62do { \
63 memcpy(dst, src, len); \
64 flush_icache_user_range(vma, page, vaddr, len); \
65} while (0)
66#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
67 memcpy(dst, src, len)
68
69#endif /* _ASM_M32R_CACHEFLUSH_H */
diff --git a/arch/m32r/include/asm/checksum.h b/arch/m32r/include/asm/checksum.h
new file mode 100644
index 000000000000..a7a7c4f44abe
--- /dev/null
+++ b/arch/m32r/include/asm/checksum.h
@@ -0,0 +1,204 @@
1#ifdef __KERNEL__
2#ifndef _ASM_M32R_CHECKSUM_H
3#define _ASM_M32R_CHECKSUM_H
4
5/*
6 * include/asm-m32r/checksum.h
7 *
8 * IP/TCP/UDP checksum routines
9 *
10 * This file is subject to the terms and conditions of the GNU General Public
11 * License. See the file "COPYING" in the main directory of this archive
12 * for more details.
13 *
14 * Some code taken from mips and parisc architecture.
15 *
16 * Copyright (C) 2001, 2002 Hiroyuki Kondo, Hirokazu Takata
17 * Copyright (C) 2004 Hirokazu Takata <takata at linux-m32r.org>
18 */
19
20#include <linux/in6.h>
21
22/*
23 * computes the checksum of a memory block at buff, length len,
24 * and adds in "sum" (32-bit)
25 *
26 * returns a 32-bit number suitable for feeding into itself
27 * or csum_tcpudp_magic
28 *
29 * this function must be called with even lengths, except
30 * for the last fragment, which may be odd
31 *
32 * it's best to have buff aligned on a 32-bit boundary
33 */
34asmlinkage __wsum csum_partial(const void *buff, int len, __wsum sum);
35
36/*
37 * The same as csum_partial, but copies from src while it checksums.
38 *
39 * Here even more important to align src and dst on a 32-bit (or even
40 * better 64-bit) boundary
41 */
42extern __wsum csum_partial_copy_nocheck(const void *src, void *dst,
43 int len, __wsum sum);
44
45/*
46 * This is a new version of the above that records errors it finds in *errp,
47 * but continues and zeros thre rest of the buffer.
48 */
49extern __wsum csum_partial_copy_from_user(const void __user *src, void *dst,
50 int len, __wsum sum,
51 int *err_ptr);
52
53/*
54 * Fold a partial checksum
55 */
56
57static inline __sum16 csum_fold(__wsum sum)
58{
59 unsigned long tmpreg;
60 __asm__(
61 " sll3 %1, %0, #16 \n"
62 " cmp %0, %0 \n"
63 " addx %0, %1 \n"
64 " ldi %1, #0 \n"
65 " srli %0, #16 \n"
66 " addx %0, %1 \n"
67 " xor3 %0, %0, #0x0000ffff \n"
68 : "=r" (sum), "=&r" (tmpreg)
69 : "0" (sum)
70 : "cbit"
71 );
72 return (__force __sum16)sum;
73}
74
75/*
76 * This is a version of ip_compute_csum() optimized for IP headers,
77 * which always checksum on 4 octet boundaries.
78 */
79static inline __sum16 ip_fast_csum(const void *iph, unsigned int ihl)
80{
81 unsigned long tmpreg0, tmpreg1;
82 __wsum sum;
83
84 __asm__ __volatile__(
85 " ld %0, @%1+ \n"
86 " addi %2, #-4 \n"
87 "# bgez %2, 2f \n"
88 " cmp %0, %0 \n"
89 " ld %3, @%1+ \n"
90 " ld %4, @%1+ \n"
91 " addx %0, %3 \n"
92 " ld %3, @%1+ \n"
93 " addx %0, %4 \n"
94 " addx %0, %3 \n"
95 " .fillinsn\n"
96 "1: \n"
97 " ld %4, @%1+ \n"
98 " addi %2, #-1 \n"
99 " addx %0, %4 \n"
100 " bgtz %2, 1b \n"
101 "\n"
102 " ldi %3, #0 \n"
103 " addx %0, %3 \n"
104 " .fillinsn\n"
105 "2: \n"
106 /* Since the input registers which are loaded with iph and ihl
107 are modified, we must also specify them as outputs, or gcc
108 will assume they contain their original values. */
109 : "=&r" (sum), "=r" (iph), "=r" (ihl), "=&r" (tmpreg0), "=&r" (tmpreg1)
110 : "1" (iph), "2" (ihl)
111 : "cbit", "memory");
112
113 return csum_fold(sum);
114}
115
116static inline __wsum csum_tcpudp_nofold(__be32 saddr, __be32 daddr,
117 unsigned short len,
118 unsigned short proto,
119 __wsum sum)
120{
121#if defined(__LITTLE_ENDIAN)
122 unsigned long len_proto = (proto + len) << 8;
123#else
124 unsigned long len_proto = proto + len;
125#endif
126 unsigned long tmpreg;
127
128 __asm__(
129 " cmp %0, %0 \n"
130 " addx %0, %2 \n"
131 " addx %0, %3 \n"
132 " addx %0, %4 \n"
133 " ldi %1, #0 \n"
134 " addx %0, %1 \n"
135 : "=r" (sum), "=&r" (tmpreg)
136 : "r" (daddr), "r" (saddr), "r" (len_proto), "0" (sum)
137 : "cbit"
138 );
139
140 return sum;
141}
142
143/*
144 * computes the checksum of the TCP/UDP pseudo-header
145 * returns a 16-bit checksum, already complemented
146 */
147static inline __sum16 csum_tcpudp_magic(__be32 saddr, __be32 daddr,
148 unsigned short len,
149 unsigned short proto,
150 __wsum sum)
151{
152 return csum_fold(csum_tcpudp_nofold(saddr,daddr,len,proto,sum));
153}
154
155/*
156 * this routine is used for miscellaneous IP-like checksums, mainly
157 * in icmp.c
158 */
159
160static inline __sum16 ip_compute_csum(const void *buff, int len)
161{
162 return csum_fold (csum_partial(buff, len, 0));
163}
164
165#define _HAVE_ARCH_IPV6_CSUM
166static inline __sum16 csum_ipv6_magic(const struct in6_addr *saddr,
167 const struct in6_addr *daddr,
168 __u32 len, unsigned short proto,
169 __wsum sum)
170{
171 unsigned long tmpreg0, tmpreg1, tmpreg2, tmpreg3;
172 __asm__(
173 " ld %1, @(%5) \n"
174 " ld %2, @(4,%5) \n"
175 " ld %3, @(8,%5) \n"
176 " ld %4, @(12,%5) \n"
177 " add %0, %1 \n"
178 " addx %0, %2 \n"
179 " addx %0, %3 \n"
180 " addx %0, %4 \n"
181 " ld %1, @(%6) \n"
182 " ld %2, @(4,%6) \n"
183 " ld %3, @(8,%6) \n"
184 " ld %4, @(12,%6) \n"
185 " addx %0, %1 \n"
186 " addx %0, %2 \n"
187 " addx %0, %3 \n"
188 " addx %0, %4 \n"
189 " addx %0, %7 \n"
190 " addx %0, %8 \n"
191 " ldi %1, #0 \n"
192 " addx %0, %1 \n"
193 : "=&r" (sum), "=&r" (tmpreg0), "=&r" (tmpreg1),
194 "=&r" (tmpreg2), "=&r" (tmpreg3)
195 : "r" (saddr), "r" (daddr),
196 "r" (htonl(len)), "r" (htonl(proto)), "0" (sum)
197 : "cbit"
198 );
199
200 return csum_fold(sum);
201}
202
203#endif /* _ASM_M32R_CHECKSUM_H */
204#endif /* __KERNEL__ */
diff --git a/arch/m32r/include/asm/cputime.h b/arch/m32r/include/asm/cputime.h
new file mode 100644
index 000000000000..0a47550df2b7
--- /dev/null
+++ b/arch/m32r/include/asm/cputime.h
@@ -0,0 +1,6 @@
1#ifndef __M32R_CPUTIME_H
2#define __M32R_CPUTIME_H
3
4#include <asm-generic/cputime.h>
5
6#endif /* __M32R_CPUTIME_H */
diff --git a/arch/m32r/include/asm/current.h b/arch/m32r/include/asm/current.h
new file mode 100644
index 000000000000..7859d864f2c2
--- /dev/null
+++ b/arch/m32r/include/asm/current.h
@@ -0,0 +1,15 @@
1#ifndef _ASM_M32R_CURRENT_H
2#define _ASM_M32R_CURRENT_H
3
4#include <linux/thread_info.h>
5
6struct task_struct;
7
8static __inline__ struct task_struct *get_current(void)
9{
10 return current_thread_info()->task;
11}
12
13#define current (get_current())
14
15#endif /* _ASM_M32R_CURRENT_H */
diff --git a/arch/m32r/include/asm/delay.h b/arch/m32r/include/asm/delay.h
new file mode 100644
index 000000000000..9dd9e999ea69
--- /dev/null
+++ b/arch/m32r/include/asm/delay.h
@@ -0,0 +1,26 @@
1#ifndef _ASM_M32R_DELAY_H
2#define _ASM_M32R_DELAY_H
3
4/*
5 * Copyright (C) 1993 Linus Torvalds
6 *
7 * Delay routines calling functions in arch/m32r/lib/delay.c
8 */
9
10extern void __bad_udelay(void);
11extern void __bad_ndelay(void);
12
13extern void __udelay(unsigned long usecs);
14extern void __ndelay(unsigned long nsecs);
15extern void __const_udelay(unsigned long xloops);
16extern void __delay(unsigned long loops);
17
18#define udelay(n) (__builtin_constant_p(n) ? \
19 ((n) > 20000 ? __bad_udelay() : __const_udelay((n) * 0x10c7ul)) : \
20 __udelay(n))
21
22#define ndelay(n) (__builtin_constant_p(n) ? \
23 ((n) > 20000 ? __bad_ndelay() : __const_udelay((n) * 5ul)) : \
24 __ndelay(n))
25
26#endif /* _ASM_M32R_DELAY_H */
diff --git a/arch/m32r/include/asm/device.h b/arch/m32r/include/asm/device.h
new file mode 100644
index 000000000000..d8f9872b0e2d
--- /dev/null
+++ b/arch/m32r/include/asm/device.h
@@ -0,0 +1,7 @@
1/*
2 * Arch specific extensions to struct device
3 *
4 * This file is released under the GPLv2
5 */
6#include <asm-generic/device.h>
7
diff --git a/arch/m32r/include/asm/div64.h b/arch/m32r/include/asm/div64.h
new file mode 100644
index 000000000000..6cd978cefb28
--- /dev/null
+++ b/arch/m32r/include/asm/div64.h
@@ -0,0 +1 @@
#include <asm-generic/div64.h>
diff --git a/arch/m32r/include/asm/dma.h b/arch/m32r/include/asm/dma.h
new file mode 100644
index 000000000000..52f6a22dd232
--- /dev/null
+++ b/arch/m32r/include/asm/dma.h
@@ -0,0 +1,12 @@
1#ifndef _ASM_M32R_DMA_H
2#define _ASM_M32R_DMA_H
3
4#include <asm/io.h>
5
6/*
7 * The maximum address that we can perform a DMA transfer
8 * to on this platform
9 */
10#define MAX_DMA_ADDRESS (PAGE_OFFSET+0x20000000)
11
12#endif /* _ASM_M32R_DMA_H */
diff --git a/arch/m32r/include/asm/elf.h b/arch/m32r/include/asm/elf.h
new file mode 100644
index 000000000000..0cc34c94bf2b
--- /dev/null
+++ b/arch/m32r/include/asm/elf.h
@@ -0,0 +1,134 @@
1#ifndef _ASM_M32R__ELF_H
2#define _ASM_M32R__ELF_H
3
4/*
5 * ELF-specific definitions.
6 *
7 * Copyright (C) 1999-2004, Renesas Technology Corp.
8 * Hirokazu Takata <takata at linux-m32r.org>
9 */
10
11#include <asm/ptrace.h>
12#include <asm/user.h>
13#include <asm/page.h>
14
15/* M32R relocation types */
16#define R_M32R_NONE 0
17#define R_M32R_16 1
18#define R_M32R_32 2
19#define R_M32R_24 3
20#define R_M32R_10_PCREL 4
21#define R_M32R_18_PCREL 5
22#define R_M32R_26_PCREL 6
23#define R_M32R_HI16_ULO 7
24#define R_M32R_HI16_SLO 8
25#define R_M32R_LO16 9
26#define R_M32R_SDA16 10
27#define R_M32R_GNU_VTINHERIT 11
28#define R_M32R_GNU_VTENTRY 12
29
30#define R_M32R_16_RELA 33
31#define R_M32R_32_RELA 34
32#define R_M32R_24_RELA 35
33#define R_M32R_10_PCREL_RELA 36
34#define R_M32R_18_PCREL_RELA 37
35#define R_M32R_26_PCREL_RELA 38
36#define R_M32R_HI16_ULO_RELA 39
37#define R_M32R_HI16_SLO_RELA 40
38#define R_M32R_LO16_RELA 41
39#define R_M32R_SDA16_RELA 42
40#define R_M32R_RELA_GNU_VTINHERIT 43
41#define R_M32R_RELA_GNU_VTENTRY 44
42
43#define R_M32R_GOT24 48
44#define R_M32R_26_PLTREL 49
45#define R_M32R_COPY 50
46#define R_M32R_GLOB_DAT 51
47#define R_M32R_JMP_SLOT 52
48#define R_M32R_RELATIVE 53
49#define R_M32R_GOTOFF 54
50#define R_M32R_GOTPC24 55
51#define R_M32R_GOT16_HI_ULO 56
52#define R_M32R_GOT16_HI_SLO 57
53#define R_M32R_GOT16_LO 58
54#define R_M32R_GOTPC_HI_ULO 59
55#define R_M32R_GOTPC_HI_SLO 60
56#define R_M32R_GOTPC_LO 61
57#define R_M32R_GOTOFF_HI_ULO 62
58#define R_M32R_GOTOFF_HI_SLO 63
59#define R_M32R_GOTOFF_LO 64
60
61#define R_M32R_NUM 256
62
63/*
64 * ELF register definitions..
65 */
66#define ELF_NGREG (sizeof (struct pt_regs) / sizeof(elf_greg_t))
67
68typedef unsigned long elf_greg_t;
69typedef elf_greg_t elf_gregset_t[ELF_NGREG];
70
71/* We have no FP mumumu. */
72typedef double elf_fpreg_t;
73typedef elf_fpreg_t elf_fpregset_t;
74
75/*
76 * This is used to ensure we don't load something for the wrong architecture.
77 */
78#define elf_check_arch(x) \
79 (((x)->e_machine == EM_M32R) || ((x)->e_machine == EM_CYGNUS_M32R))
80
81/*
82 * These are used to set parameters in the core dumps.
83 */
84#define ELF_CLASS ELFCLASS32
85#if defined(__LITTLE_ENDIAN)
86#define ELF_DATA ELFDATA2LSB
87#elif defined(__BIG_ENDIAN)
88#define ELF_DATA ELFDATA2MSB
89#else
90#error no endian defined
91#endif
92#define ELF_ARCH EM_M32R
93
94/* r0 is set by ld.so to a pointer to a function which might be
95 * registered using 'atexit'. This provides a mean for the dynamic
96 * linker to call DT_FINI functions for shared libraries that have
97 * been loaded before the code runs.
98 *
99 * So that we can use the same startup file with static executables,
100 * we start programs with a value of 0 to indicate that there is no
101 * such function.
102 */
103#define ELF_PLAT_INIT(_r, load_addr) (_r)->r0 = 0
104
105#define USE_ELF_CORE_DUMP
106#define ELF_EXEC_PAGESIZE PAGE_SIZE
107
108/*
109 * This is the location that an ET_DYN program is loaded if exec'ed.
110 * Typical use of this is to invoke "./ld.so someprog" to test out a
111 * new version of the loader. We need to make sure that it is out of
112 * the way of the program that it will "exec", and that there is
113 * sufficient room for the brk.
114 */
115#define ELF_ET_DYN_BASE (TASK_SIZE / 3 * 2)
116
117/* regs is struct pt_regs, pr_reg is elf_gregset_t (which is
118 now struct_user_regs, they are different) */
119
120#define ELF_CORE_COPY_REGS(pr_reg, regs) \
121 memcpy((char *)pr_reg, (char *)regs, sizeof (struct pt_regs));
122
123/* This yields a mask that user programs can use to figure out what
124 instruction set this CPU supports. */
125#define ELF_HWCAP (0)
126
127/* This yields a string that ld.so will use to load implementation
128 specific libraries for optimization. This is more specific in
129 intent than poking at uname or /proc/cpuinfo. */
130#define ELF_PLATFORM (NULL)
131
132#define SET_PERSONALITY(ex) set_personality(PER_LINUX)
133
134#endif /* _ASM_M32R__ELF_H */
diff --git a/arch/m32r/include/asm/emergency-restart.h b/arch/m32r/include/asm/emergency-restart.h
new file mode 100644
index 000000000000..108d8c48e42e
--- /dev/null
+++ b/arch/m32r/include/asm/emergency-restart.h
@@ -0,0 +1,6 @@
1#ifndef _ASM_EMERGENCY_RESTART_H
2#define _ASM_EMERGENCY_RESTART_H
3
4#include <asm-generic/emergency-restart.h>
5
6#endif /* _ASM_EMERGENCY_RESTART_H */
diff --git a/arch/m32r/include/asm/errno.h b/arch/m32r/include/asm/errno.h
new file mode 100644
index 000000000000..777149262aad
--- /dev/null
+++ b/arch/m32r/include/asm/errno.h
@@ -0,0 +1,6 @@
1#ifndef _ASM_M32R_ERRNO_H
2#define _ASM_M32R_ERRNO_H
3
4#include <asm-generic/errno.h>
5
6#endif /* _ASM_M32R_ERRNO_H */
diff --git a/arch/m32r/include/asm/fb.h b/arch/m32r/include/asm/fb.h
new file mode 100644
index 000000000000..d92e99cd8c8a
--- /dev/null
+++ b/arch/m32r/include/asm/fb.h
@@ -0,0 +1,19 @@
1#ifndef _ASM_FB_H_
2#define _ASM_FB_H_
3
4#include <linux/fb.h>
5#include <linux/fs.h>
6#include <asm/page.h>
7
8static inline void fb_pgprotect(struct file *file, struct vm_area_struct *vma,
9 unsigned long off)
10{
11 vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
12}
13
14static inline int fb_is_primary_device(struct fb_info *info)
15{
16 return 0;
17}
18
19#endif /* _ASM_FB_H_ */
diff --git a/arch/m32r/include/asm/fcntl.h b/arch/m32r/include/asm/fcntl.h
new file mode 100644
index 000000000000..46ab12db5739
--- /dev/null
+++ b/arch/m32r/include/asm/fcntl.h
@@ -0,0 +1 @@
#include <asm-generic/fcntl.h>
diff --git a/arch/m32r/include/asm/flat.h b/arch/m32r/include/asm/flat.h
new file mode 100644
index 000000000000..d851cf0c4aa5
--- /dev/null
+++ b/arch/m32r/include/asm/flat.h
@@ -0,0 +1,146 @@
1/*
2 * include/asm-m32r/flat.h
3 *
4 * uClinux flat-format executables
5 *
6 * Copyright (C) 2004 Kazuhiro Inaoka
7 *
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive for
10 * more details.
11 */
12#ifndef __ASM_M32R_FLAT_H
13#define __ASM_M32R_FLAT_H
14
15#define flat_stack_align(sp) (*sp += (*sp & 3 ? (4 - (*sp & 3)): 0))
16#define flat_argvp_envp_on_stack() 0
17#define flat_old_ram_flag(flags) (flags)
18#define flat_set_persistent(relval, p) 0
19#define flat_reloc_valid(reloc, size) \
20 (((reloc) - textlen_for_m32r_lo16_data) <= (size))
21#define flat_get_addr_from_rp(rp, relval, flags, persistent) \
22 m32r_flat_get_addr_from_rp(rp, relval, (text_len) )
23
24#define flat_put_addr_at_rp(rp, addr, relval) \
25 m32r_flat_put_addr_at_rp(rp, addr, relval)
26
27/* Convert a relocation entry into an address. */
28static inline unsigned long
29flat_get_relocate_addr (unsigned long relval)
30{
31 return relval & 0x00ffffff; /* Mask out top 8-bits */
32}
33
34#define flat_m32r_get_reloc_type(relval) ((relval) >> 24)
35
36#define M32R_SETH_OPCODE 0xd0c00000 /* SETH instruction code */
37
38#define FLAT_M32R_32 0x00 /* 32bits reloc */
39#define FLAT_M32R_24 0x01 /* unsigned 24bits reloc */
40#define FLAT_M32R_16 0x02 /* 16bits reloc */
41#define FLAT_M32R_LO16 0x03 /* signed low 16bits reloc (low()) */
42#define FLAT_M32R_LO16_DATA 0x04 /* signed low 16bits reloc (low())
43 for a symbol in .data section */
44 /* High 16bits of an address used
45 when the lower 16bbits are treated
46 as unsigned.
47 To create SETH instruction only.
48 0x1X: X means a number of register.
49 0x10 - 0x3F are reserved. */
50#define FLAT_M32R_HI16_ULO 0x10 /* reloc for SETH Rn,#high(imm16) */
51 /* High 16bits of an address used
52 when the lower 16bbits are treated
53 as signed.
54 To create SETH instruction only.
55 0x2X: X means a number of register.
56 0x20 - 0x4F are reserved. */
57#define FLAT_M32R_HI16_SLO 0x20 /* reloc for SETH Rn,#shigh(imm16) */
58
59static unsigned long textlen_for_m32r_lo16_data = 0;
60
61static inline unsigned long m32r_flat_get_addr_from_rp (unsigned long *rp,
62 unsigned long relval,
63 unsigned long textlen)
64{
65 unsigned int reloc = flat_m32r_get_reloc_type (relval);
66 textlen_for_m32r_lo16_data = 0;
67 if (reloc & 0xf0) {
68 unsigned long addr = htonl(*rp);
69 switch (reloc & 0xf0)
70 {
71 case FLAT_M32R_HI16_ULO:
72 case FLAT_M32R_HI16_SLO:
73 if (addr == 0) {
74 /* put "seth Rn,#0x0" instead of 0 (addr). */
75 *rp = (M32R_SETH_OPCODE | ((reloc & 0x0f)<<24));
76 }
77 return addr;
78 default:
79 break;
80 }
81 } else {
82 switch (reloc)
83 {
84 case FLAT_M32R_LO16:
85 return htonl(*rp) & 0xFFFF;
86 case FLAT_M32R_LO16_DATA:
87 /* FIXME: The return value will decrease by textlen
88 at m32r_flat_put_addr_at_rp () */
89 textlen_for_m32r_lo16_data = textlen;
90 return (htonl(*rp) & 0xFFFF) + textlen;
91 case FLAT_M32R_16:
92 return htons(*(unsigned short *)rp) & 0xFFFF;
93 case FLAT_M32R_24:
94 return htonl(*rp) & 0xFFFFFF;
95 case FLAT_M32R_32:
96 return htonl(*rp);
97 default:
98 break;
99 }
100 }
101 return ~0; /* bogus value */
102}
103
104static inline void m32r_flat_put_addr_at_rp (unsigned long *rp,
105 unsigned long addr,
106 unsigned long relval)
107{
108 unsigned int reloc = flat_m32r_get_reloc_type (relval);
109 if (reloc & 0xf0) {
110 unsigned long Rn = reloc & 0x0f; /* get a number of register */
111 Rn <<= 24; /* 0x0R000000 */
112 reloc &= 0xf0;
113 switch (reloc)
114 {
115 case FLAT_M32R_HI16_ULO: /* To create SETH Rn,#high(imm16) */
116 *rp = (M32R_SETH_OPCODE | Rn
117 | ((addr >> 16) & 0xFFFF));
118 break;
119 case FLAT_M32R_HI16_SLO: /* To create SETH Rn,#shigh(imm16) */
120 *rp = (M32R_SETH_OPCODE | Rn
121 | (((addr >> 16) + ((addr & 0x8000) ? 1 : 0))
122 & 0xFFFF));
123 break;
124 }
125 } else {
126 switch (reloc) {
127 case FLAT_M32R_LO16_DATA:
128 addr -= textlen_for_m32r_lo16_data;
129 textlen_for_m32r_lo16_data = 0;
130 case FLAT_M32R_LO16:
131 *rp = (htonl(*rp) & 0xFFFF0000) | (addr & 0xFFFF);
132 break;
133 case FLAT_M32R_16:
134 *(unsigned short *)rp = addr & 0xFFFF;
135 break;
136 case FLAT_M32R_24:
137 *rp = (htonl(*rp) & 0xFF000000) | (addr & 0xFFFFFF);
138 break;
139 case FLAT_M32R_32:
140 *rp = addr;
141 break;
142 }
143 }
144}
145
146#endif /* __ASM_M32R_FLAT_H */
diff --git a/arch/m32r/include/asm/ftrace.h b/arch/m32r/include/asm/ftrace.h
new file mode 100644
index 000000000000..40a8c178f10d
--- /dev/null
+++ b/arch/m32r/include/asm/ftrace.h
@@ -0,0 +1 @@
/* empty */
diff --git a/arch/m32r/include/asm/futex.h b/arch/m32r/include/asm/futex.h
new file mode 100644
index 000000000000..6a332a9f099c
--- /dev/null
+++ b/arch/m32r/include/asm/futex.h
@@ -0,0 +1,6 @@
1#ifndef _ASM_FUTEX_H
2#define _ASM_FUTEX_H
3
4#include <asm-generic/futex.h>
5
6#endif
diff --git a/arch/m32r/include/asm/hardirq.h b/arch/m32r/include/asm/hardirq.h
new file mode 100644
index 000000000000..cb8aa762f235
--- /dev/null
+++ b/arch/m32r/include/asm/hardirq.h
@@ -0,0 +1,36 @@
1#ifdef __KERNEL__
2#ifndef __ASM_HARDIRQ_H
3#define __ASM_HARDIRQ_H
4
5#include <linux/threads.h>
6#include <linux/irq.h>
7
8typedef struct {
9 unsigned int __softirq_pending;
10} ____cacheline_aligned irq_cpustat_t;
11
12#include <linux/irq_cpustat.h> /* Standard mappings for irq_cpustat_t above */
13
14#if NR_IRQS > 256
15#define HARDIRQ_BITS 9
16#else
17#define HARDIRQ_BITS 8
18#endif
19
20/*
21 * The hardirq mask has to be large enough to have
22 * space for potentially all IRQ sources in the system
23 * nesting on a single CPU:
24 */
25#if (1 << HARDIRQ_BITS) < NR_IRQS
26# error HARDIRQ_BITS is too low!
27#endif
28
29static inline void ack_bad_irq(int irq)
30{
31 printk(KERN_CRIT "unexpected IRQ trap at vector %02x\n", irq);
32 BUG();
33}
34
35#endif /* __ASM_HARDIRQ_H */
36#endif /* __KERNEL__ */
diff --git a/arch/m32r/include/asm/hw_irq.h b/arch/m32r/include/asm/hw_irq.h
new file mode 100644
index 000000000000..7138537cda03
--- /dev/null
+++ b/arch/m32r/include/asm/hw_irq.h
@@ -0,0 +1,4 @@
1#ifndef _ASM_M32R_HW_IRQ_H
2#define _ASM_M32R_HW_IRQ_H
3
4#endif /* _ASM_M32R_HW_IRQ_H */
diff --git a/arch/m32r/include/asm/io.h b/arch/m32r/include/asm/io.h
new file mode 100644
index 000000000000..d06933bd6318
--- /dev/null
+++ b/arch/m32r/include/asm/io.h
@@ -0,0 +1,200 @@
1#ifndef _ASM_M32R_IO_H
2#define _ASM_M32R_IO_H
3
4#include <linux/string.h>
5#include <linux/compiler.h>
6#include <asm/page.h> /* __va */
7
8#ifdef __KERNEL__
9
10#define IO_SPACE_LIMIT 0xFFFFFFFF
11
12/**
13 * virt_to_phys - map virtual addresses to physical
14 * @address: address to remap
15 *
16 * The returned physical address is the physical (CPU) mapping for
17 * the memory address given. It is only valid to use this function on
18 * addresses directly mapped or allocated via kmalloc.
19 *
20 * This function does not give bus mappings for DMA transfers. In
21 * almost all conceivable cases a device driver should not be using
22 * this function
23 */
24
25static inline unsigned long virt_to_phys(volatile void * address)
26{
27 return __pa(address);
28}
29
30/**
31 * phys_to_virt - map physical address to virtual
32 * @address: address to remap
33 *
34 * The returned virtual address is a current CPU mapping for
35 * the memory address given. It is only valid to use this function on
36 * addresses that have a kernel mapping
37 *
38 * This function does not handle bus mappings for DMA transfers. In
39 * almost all conceivable cases a device driver should not be using
40 * this function
41 */
42
43static inline void *phys_to_virt(unsigned long address)
44{
45 return __va(address);
46}
47
48extern void __iomem *
49__ioremap(unsigned long offset, unsigned long size, unsigned long flags);
50
51/**
52 * ioremap - map bus memory into CPU space
53 * @offset: bus address of the memory
54 * @size: size of the resource to map
55 *
56 * ioremap performs a platform specific sequence of operations to
57 * make bus memory CPU accessible via the readb/readw/readl/writeb/
58 * writew/writel functions and the other mmio helpers. The returned
59 * address is not guaranteed to be usable directly as a virtual
60 * address.
61 */
62
63static inline void __iomem *ioremap(unsigned long offset, unsigned long size)
64{
65 return __ioremap(offset, size, 0);
66}
67
68extern void iounmap(volatile void __iomem *addr);
69#define ioremap_nocache(off,size) ioremap(off,size)
70
71/*
72 * IO bus memory addresses are also 1:1 with the physical address
73 */
74#define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT)
75#define page_to_bus page_to_phys
76#define virt_to_bus virt_to_phys
77
78extern unsigned char _inb(unsigned long);
79extern unsigned short _inw(unsigned long);
80extern unsigned long _inl(unsigned long);
81extern unsigned char _inb_p(unsigned long);
82extern unsigned short _inw_p(unsigned long);
83extern unsigned long _inl_p(unsigned long);
84extern void _outb(unsigned char, unsigned long);
85extern void _outw(unsigned short, unsigned long);
86extern void _outl(unsigned long, unsigned long);
87extern void _outb_p(unsigned char, unsigned long);
88extern void _outw_p(unsigned short, unsigned long);
89extern void _outl_p(unsigned long, unsigned long);
90extern void _insb(unsigned int, void *, unsigned long);
91extern void _insw(unsigned int, void *, unsigned long);
92extern void _insl(unsigned int, void *, unsigned long);
93extern void _outsb(unsigned int, const void *, unsigned long);
94extern void _outsw(unsigned int, const void *, unsigned long);
95extern void _outsl(unsigned int, const void *, unsigned long);
96
97static inline unsigned char _readb(unsigned long addr)
98{
99 return *(volatile unsigned char __force *)addr;
100}
101
102static inline unsigned short _readw(unsigned long addr)
103{
104 return *(volatile unsigned short __force *)addr;
105}
106
107static inline unsigned long _readl(unsigned long addr)
108{
109 return *(volatile unsigned long __force *)addr;
110}
111
112static inline void _writeb(unsigned char b, unsigned long addr)
113{
114 *(volatile unsigned char __force *)addr = b;
115}
116
117static inline void _writew(unsigned short w, unsigned long addr)
118{
119 *(volatile unsigned short __force *)addr = w;
120}
121
122static inline void _writel(unsigned long l, unsigned long addr)
123{
124 *(volatile unsigned long __force *)addr = l;
125}
126
127#define inb _inb
128#define inw _inw
129#define inl _inl
130#define outb _outb
131#define outw _outw
132#define outl _outl
133
134#define inb_p _inb_p
135#define inw_p _inw_p
136#define inl_p _inl_p
137#define outb_p _outb_p
138#define outw_p _outw_p
139#define outl_p _outl_p
140
141#define insb _insb
142#define insw _insw
143#define insl _insl
144#define outsb _outsb
145#define outsw _outsw
146#define outsl _outsl
147
148#define readb(addr) _readb((unsigned long)(addr))
149#define readw(addr) _readw((unsigned long)(addr))
150#define readl(addr) _readl((unsigned long)(addr))
151#define __raw_readb readb
152#define __raw_readw readw
153#define __raw_readl readl
154#define readb_relaxed readb
155#define readw_relaxed readw
156#define readl_relaxed readl
157
158#define writeb(val, addr) _writeb((val), (unsigned long)(addr))
159#define writew(val, addr) _writew((val), (unsigned long)(addr))
160#define writel(val, addr) _writel((val), (unsigned long)(addr))
161#define __raw_writeb writeb
162#define __raw_writew writew
163#define __raw_writel writel
164
165#define mmiowb()
166
167#define flush_write_buffers() do { } while (0) /* M32R_FIXME */
168
169static inline void
170memset_io(volatile void __iomem *addr, unsigned char val, int count)
171{
172 memset((void __force *) addr, val, count);
173}
174
175static inline void
176memcpy_fromio(void *dst, volatile void __iomem *src, int count)
177{
178 memcpy(dst, (void __force *) src, count);
179}
180
181static inline void
182memcpy_toio(volatile void __iomem *dst, const void *src, int count)
183{
184 memcpy((void __force *) dst, src, count);
185}
186
187/*
188 * Convert a physical pointer to a virtual kernel pointer for /dev/mem
189 * access
190 */
191#define xlate_dev_mem_ptr(p) __va(p)
192
193/*
194 * Convert a virtual cached pointer to an uncached pointer
195 */
196#define xlate_dev_kmem_ptr(p) p
197
198#endif /* __KERNEL__ */
199
200#endif /* _ASM_M32R_IO_H */
diff --git a/arch/m32r/include/asm/ioctl.h b/arch/m32r/include/asm/ioctl.h
new file mode 100644
index 000000000000..b279fe06dfe5
--- /dev/null
+++ b/arch/m32r/include/asm/ioctl.h
@@ -0,0 +1 @@
#include <asm-generic/ioctl.h>
diff --git a/arch/m32r/include/asm/ioctls.h b/arch/m32r/include/asm/ioctls.h
new file mode 100644
index 000000000000..b9f54bb5d7cf
--- /dev/null
+++ b/arch/m32r/include/asm/ioctls.h
@@ -0,0 +1,87 @@
1#ifndef __ARCH_M32R_IOCTLS_H__
2#define __ARCH_M32R_IOCTLS_H__
3
4#include <asm/ioctl.h>
5
6/* 0x54 is just a magic number to make these relatively unique ('T') */
7
8#define TCGETS 0x5401
9#define TCSETS 0x5402 /* Clashes with SNDCTL_TMR_START sound ioctl */
10#define TCSETSW 0x5403
11#define TCSETSF 0x5404
12#define TCGETA 0x5405
13#define TCSETA 0x5406
14#define TCSETAW 0x5407
15#define TCSETAF 0x5408
16#define TCSBRK 0x5409
17#define TCXONC 0x540A
18#define TCFLSH 0x540B
19#define TIOCEXCL 0x540C
20#define TIOCNXCL 0x540D
21#define TIOCSCTTY 0x540E
22#define TIOCGPGRP 0x540F
23#define TIOCSPGRP 0x5410
24#define TIOCOUTQ 0x5411
25#define TIOCSTI 0x5412
26#define TIOCGWINSZ 0x5413
27#define TIOCSWINSZ 0x5414
28#define TIOCMGET 0x5415
29#define TIOCMBIS 0x5416
30#define TIOCMBIC 0x5417
31#define TIOCMSET 0x5418
32#define TIOCGSOFTCAR 0x5419
33#define TIOCSSOFTCAR 0x541A
34#define FIONREAD 0x541B
35#define TIOCINQ FIONREAD
36#define TIOCLINUX 0x541C
37#define TIOCCONS 0x541D
38#define TIOCGSERIAL 0x541E
39#define TIOCSSERIAL 0x541F
40#define TIOCPKT 0x5420
41#define FIONBIO 0x5421
42#define TIOCNOTTY 0x5422
43#define TIOCSETD 0x5423
44#define TIOCGETD 0x5424
45#define TCSBRKP 0x5425 /* Needed for POSIX tcsendbreak() */
46/* #define TIOCTTYGSTRUCT 0x5426 - Former debugging-only ioctl */
47#define TIOCSBRK 0x5427 /* BSD compatibility */
48#define TIOCCBRK 0x5428 /* BSD compatibility */
49#define TIOCGSID 0x5429 /* Return the session ID of FD */
50#define TCGETS2 _IOR('T',0x2A, struct termios2)
51#define TCSETS2 _IOW('T',0x2B, struct termios2)
52#define TCSETSW2 _IOW('T',0x2C, struct termios2)
53#define TCSETSF2 _IOW('T',0x2D, struct termios2)
54#define TIOCGPTN _IOR('T',0x30, unsigned int) /* Get Pty Number (of pty-mux device) */
55#define TIOCSPTLCK _IOW('T',0x31, int) /* Lock/unlock Pty */
56
57#define FIONCLEX 0x5450
58#define FIOCLEX 0x5451
59#define FIOASYNC 0x5452
60#define TIOCSERCONFIG 0x5453
61#define TIOCSERGWILD 0x5454
62#define TIOCSERSWILD 0x5455
63#define TIOCGLCKTRMIOS 0x5456
64#define TIOCSLCKTRMIOS 0x5457
65#define TIOCSERGSTRUCT 0x5458 /* For debugging only */
66#define TIOCSERGETLSR 0x5459 /* Get line status register */
67#define TIOCSERGETMULTI 0x545A /* Get multiport config */
68#define TIOCSERSETMULTI 0x545B /* Set multiport config */
69
70#define TIOCMIWAIT 0x545C /* wait for a change on serial input line(s) */
71#define TIOCGICOUNT 0x545D /* read serial port inline interrupt counts */
72#define TIOCGHAYESESP 0x545E /* Get Hayes ESP configuration */
73#define TIOCSHAYESESP 0x545F /* Set Hayes ESP configuration */
74#define FIOQSIZE 0x5460
75
76/* Used for packet mode */
77#define TIOCPKT_DATA 0
78#define TIOCPKT_FLUSHREAD 1
79#define TIOCPKT_FLUSHWRITE 2
80#define TIOCPKT_STOP 4
81#define TIOCPKT_START 8
82#define TIOCPKT_NOSTOP 16
83#define TIOCPKT_DOSTOP 32
84
85#define TIOCSER_TEMT 0x01 /* Transmitter physically empty */
86
87#endif /* __ARCH_M32R_IOCTLS_H__ */
diff --git a/arch/m32r/include/asm/ipcbuf.h b/arch/m32r/include/asm/ipcbuf.h
new file mode 100644
index 000000000000..8d2d7c8ffdb0
--- /dev/null
+++ b/arch/m32r/include/asm/ipcbuf.h
@@ -0,0 +1,29 @@
1#ifndef _ASM_M32R_IPCBUF_H
2#define _ASM_M32R_IPCBUF_H
3
4/*
5 * The ipc64_perm structure for m32r architecture.
6 * Note extra padding because this structure is passed back and forth
7 * between kernel and user space.
8 *
9 * Pad space is left for:
10 * - 32-bit mode_t and seq
11 * - 2 miscellaneous 32-bit values
12 */
13
14struct ipc64_perm
15{
16 __kernel_key_t key;
17 __kernel_uid32_t uid;
18 __kernel_gid32_t gid;
19 __kernel_uid32_t cuid;
20 __kernel_gid32_t cgid;
21 __kernel_mode_t mode;
22 unsigned short __pad1;
23 unsigned short seq;
24 unsigned short __pad2;
25 unsigned long __unused1;
26 unsigned long __unused2;
27};
28
29#endif /* _ASM_M32R_IPCBUF_H */
diff --git a/arch/m32r/include/asm/irq.h b/arch/m32r/include/asm/irq.h
new file mode 100644
index 000000000000..242028b4d86a
--- /dev/null
+++ b/arch/m32r/include/asm/irq.h
@@ -0,0 +1,90 @@
1#ifdef __KERNEL__
2#ifndef _ASM_M32R_IRQ_H
3#define _ASM_M32R_IRQ_H
4
5
6#if defined(CONFIG_PLAT_USRV)
7/*
8 * IRQ definitions for M32700UT
9 * M32700 Chip: 64 interrupts
10 * ICU of M32700UT-on-board PLD: 32 interrupts cascaded to INT1# chip pin
11 */
12#define M32700UT_NUM_CPU_IRQ (64)
13#define M32700UT_NUM_PLD_IRQ (32)
14#define M32700UT_IRQ_BASE 0
15#define M32700UT_CPU_IRQ_BASE M32700UT_IRQ_BASE
16#define M32700UT_PLD_IRQ_BASE (M32700UT_CPU_IRQ_BASE + M32700UT_NUM_CPU_IRQ)
17
18#define NR_IRQS (M32700UT_NUM_CPU_IRQ + M32700UT_NUM_PLD_IRQ)
19#elif defined(CONFIG_PLAT_M32700UT)
20/*
21 * IRQ definitions for M32700UT(Rev.C) + M32R-LAN
22 * M32700 Chip: 64 interrupts
23 * ICU of M32700UT-on-board PLD: 32 interrupts cascaded to INT1# chip pin
24 * ICU of M32R-LCD-on-board PLD: 32 interrupts cascaded to INT2# chip pin
25 * ICU of M32R-LAN-on-board PLD: 32 interrupts cascaded to INT0# chip pin
26 */
27#define M32700UT_NUM_CPU_IRQ (64)
28#define M32700UT_NUM_PLD_IRQ (32)
29#define M32700UT_NUM_LCD_PLD_IRQ (32)
30#define M32700UT_NUM_LAN_PLD_IRQ (32)
31#define M32700UT_IRQ_BASE 0
32#define M32700UT_CPU_IRQ_BASE (M32700UT_IRQ_BASE)
33#define M32700UT_PLD_IRQ_BASE \
34 (M32700UT_CPU_IRQ_BASE + M32700UT_NUM_CPU_IRQ)
35#define M32700UT_LCD_PLD_IRQ_BASE \
36 (M32700UT_PLD_IRQ_BASE + M32700UT_NUM_PLD_IRQ)
37#define M32700UT_LAN_PLD_IRQ_BASE \
38 (M32700UT_LCD_PLD_IRQ_BASE + M32700UT_NUM_LCD_PLD_IRQ)
39
40#define NR_IRQS \
41 (M32700UT_NUM_CPU_IRQ + M32700UT_NUM_PLD_IRQ \
42 + M32700UT_NUM_LCD_PLD_IRQ + M32700UT_NUM_LAN_PLD_IRQ)
43#elif defined(CONFIG_PLAT_OPSPUT)
44/*
45 * IRQ definitions for OPSPUT + M32R-LAN
46 * OPSP Chip: 64 interrupts
47 * ICU of OPSPUT-on-board PLD: 32 interrupts cascaded to INT1# chip pin
48 * ICU of M32R-LCD-on-board PLD: 32 interrupts cascaded to INT2# chip pin
49 * ICU of M32R-LAN-on-board PLD: 32 interrupts cascaded to INT0# chip pin
50 */
51#define OPSPUT_NUM_CPU_IRQ (64)
52#define OPSPUT_NUM_PLD_IRQ (32)
53#define OPSPUT_NUM_LCD_PLD_IRQ (32)
54#define OPSPUT_NUM_LAN_PLD_IRQ (32)
55#define OPSPUT_IRQ_BASE 0
56#define OPSPUT_CPU_IRQ_BASE (OPSPUT_IRQ_BASE)
57#define OPSPUT_PLD_IRQ_BASE \
58 (OPSPUT_CPU_IRQ_BASE + OPSPUT_NUM_CPU_IRQ)
59#define OPSPUT_LCD_PLD_IRQ_BASE \
60 (OPSPUT_PLD_IRQ_BASE + OPSPUT_NUM_PLD_IRQ)
61#define OPSPUT_LAN_PLD_IRQ_BASE \
62 (OPSPUT_LCD_PLD_IRQ_BASE + OPSPUT_NUM_LCD_PLD_IRQ)
63
64#define NR_IRQS \
65 (OPSPUT_NUM_CPU_IRQ + OPSPUT_NUM_PLD_IRQ \
66 + OPSPUT_NUM_LCD_PLD_IRQ + OPSPUT_NUM_LAN_PLD_IRQ)
67
68#elif defined(CONFIG_PLAT_M32104UT)
69/*
70 * IRQ definitions for M32104UT
71 * M32104 Chip: 64 interrupts
72 * ICU of M32104UT-on-board PLD: 32 interrupts cascaded to INT1# chip pin
73 */
74#define M32104UT_NUM_CPU_IRQ (64)
75#define M32104UT_NUM_PLD_IRQ (32)
76#define M32104UT_IRQ_BASE 0
77#define M32104UT_CPU_IRQ_BASE M32104UT_IRQ_BASE
78#define M32104UT_PLD_IRQ_BASE (M32104UT_CPU_IRQ_BASE + M32104UT_NUM_CPU_IRQ)
79
80#define NR_IRQS \
81 (M32104UT_NUM_CPU_IRQ + M32104UT_NUM_PLD_IRQ)
82
83#else
84#define NR_IRQS 64
85#endif
86
87#define irq_canonicalize(irq) (irq)
88
89#endif /* _ASM_M32R_IRQ_H */
90#endif /* __KERNEL__ */
diff --git a/arch/m32r/include/asm/irq_regs.h b/arch/m32r/include/asm/irq_regs.h
new file mode 100644
index 000000000000..3dd9c0b70270
--- /dev/null
+++ b/arch/m32r/include/asm/irq_regs.h
@@ -0,0 +1 @@
#include <asm-generic/irq_regs.h>
diff --git a/arch/m32r/include/asm/kdebug.h b/arch/m32r/include/asm/kdebug.h
new file mode 100644
index 000000000000..6ece1b037665
--- /dev/null
+++ b/arch/m32r/include/asm/kdebug.h
@@ -0,0 +1 @@
#include <asm-generic/kdebug.h>
diff --git a/arch/m32r/include/asm/kmap_types.h b/arch/m32r/include/asm/kmap_types.h
new file mode 100644
index 000000000000..fa94dc6410ea
--- /dev/null
+++ b/arch/m32r/include/asm/kmap_types.h
@@ -0,0 +1,29 @@
1#ifndef __M32R_KMAP_TYPES_H
2#define __M32R_KMAP_TYPES_H
3
4#ifdef CONFIG_DEBUG_HIGHMEM
5# define D(n) __KM_FENCE_##n ,
6#else
7# define D(n)
8#endif
9
10enum km_type {
11D(0) KM_BOUNCE_READ,
12D(1) KM_SKB_SUNRPC_DATA,
13D(2) KM_SKB_DATA_SOFTIRQ,
14D(3) KM_USER0,
15D(4) KM_USER1,
16D(5) KM_BIO_SRC_IRQ,
17D(6) KM_BIO_DST_IRQ,
18D(7) KM_PTE0,
19D(8) KM_PTE1,
20D(9) KM_IRQ0,
21D(10) KM_IRQ1,
22D(11) KM_SOFTIRQ0,
23D(12) KM_SOFTIRQ1,
24D(13) KM_TYPE_NR
25};
26
27#undef D
28
29#endif /* __M32R_KMAP_TYPES_H */
diff --git a/arch/m32r/include/asm/linkage.h b/arch/m32r/include/asm/linkage.h
new file mode 100644
index 000000000000..a9fb151cf648
--- /dev/null
+++ b/arch/m32r/include/asm/linkage.h
@@ -0,0 +1,7 @@
1#ifndef __ASM_LINKAGE_H
2#define __ASM_LINKAGE_H
3
4#define __ALIGN .balign 4
5#define __ALIGN_STR ".balign 4"
6
7#endif /* __ASM_LINKAGE_H */
diff --git a/arch/m32r/include/asm/local.h b/arch/m32r/include/asm/local.h
new file mode 100644
index 000000000000..22256d138630
--- /dev/null
+++ b/arch/m32r/include/asm/local.h
@@ -0,0 +1,366 @@
1#ifndef __M32R_LOCAL_H
2#define __M32R_LOCAL_H
3
4/*
5 * linux/include/asm-m32r/local.h
6 *
7 * M32R version:
8 * Copyright (C) 2001, 2002 Hitoshi Yamamoto
9 * Copyright (C) 2004 Hirokazu Takata <takata at linux-m32r.org>
10 * Copyright (C) 2007 Mathieu Desnoyers <mathieu.desnoyers@polymtl.ca>
11 */
12
13#include <linux/percpu.h>
14#include <asm/assembler.h>
15#include <asm/system.h>
16#include <asm/local.h>
17
18/*
19 * Atomic operations that C can't guarantee us. Useful for
20 * resource counting etc..
21 */
22
23/*
24 * Make sure gcc doesn't try to be clever and move things around
25 * on us. We need to use _exactly_ the address the user gave us,
26 * not some alias that contains the same information.
27 */
28typedef struct { volatile int counter; } local_t;
29
30#define LOCAL_INIT(i) { (i) }
31
32/**
33 * local_read - read local variable
34 * @l: pointer of type local_t
35 *
36 * Atomically reads the value of @l.
37 */
38#define local_read(l) ((l)->counter)
39
40/**
41 * local_set - set local variable
42 * @l: pointer of type local_t
43 * @i: required value
44 *
45 * Atomically sets the value of @l to @i.
46 */
47#define local_set(l, i) (((l)->counter) = (i))
48
49/**
50 * local_add_return - add long to local variable and return it
51 * @i: long value to add
52 * @l: pointer of type local_t
53 *
54 * Atomically adds @i to @l and return (@i + @l).
55 */
56static inline long local_add_return(long i, local_t *l)
57{
58 unsigned long flags;
59 long result;
60
61 local_irq_save(flags);
62 __asm__ __volatile__ (
63 "# local_add_return \n\t"
64 DCACHE_CLEAR("%0", "r4", "%1")
65 "ld %0, @%1; \n\t"
66 "add %0, %2; \n\t"
67 "st %0, @%1; \n\t"
68 : "=&r" (result)
69 : "r" (&l->counter), "r" (i)
70 : "memory"
71#ifdef CONFIG_CHIP_M32700_TS1
72 , "r4"
73#endif /* CONFIG_CHIP_M32700_TS1 */
74 );
75 local_irq_restore(flags);
76
77 return result;
78}
79
80/**
81 * local_sub_return - subtract long from local variable and return it
82 * @i: long value to subtract
83 * @l: pointer of type local_t
84 *
85 * Atomically subtracts @i from @l and return (@l - @i).
86 */
87static inline long local_sub_return(long i, local_t *l)
88{
89 unsigned long flags;
90 long result;
91
92 local_irq_save(flags);
93 __asm__ __volatile__ (
94 "# local_sub_return \n\t"
95 DCACHE_CLEAR("%0", "r4", "%1")
96 "ld %0, @%1; \n\t"
97 "sub %0, %2; \n\t"
98 "st %0, @%1; \n\t"
99 : "=&r" (result)
100 : "r" (&l->counter), "r" (i)
101 : "memory"
102#ifdef CONFIG_CHIP_M32700_TS1
103 , "r4"
104#endif /* CONFIG_CHIP_M32700_TS1 */
105 );
106 local_irq_restore(flags);
107
108 return result;
109}
110
111/**
112 * local_add - add long to local variable
113 * @i: long value to add
114 * @l: pointer of type local_t
115 *
116 * Atomically adds @i to @l.
117 */
118#define local_add(i, l) ((void) local_add_return((i), (l)))
119
120/**
121 * local_sub - subtract the local variable
122 * @i: long value to subtract
123 * @l: pointer of type local_t
124 *
125 * Atomically subtracts @i from @l.
126 */
127#define local_sub(i, l) ((void) local_sub_return((i), (l)))
128
129/**
130 * local_sub_and_test - subtract value from variable and test result
131 * @i: integer value to subtract
132 * @l: pointer of type local_t
133 *
134 * Atomically subtracts @i from @l and returns
135 * true if the result is zero, or false for all
136 * other cases.
137 */
138#define local_sub_and_test(i, l) (local_sub_return((i), (l)) == 0)
139
140/**
141 * local_inc_return - increment local variable and return it
142 * @l: pointer of type local_t
143 *
144 * Atomically increments @l by 1 and returns the result.
145 */
146static inline long local_inc_return(local_t *l)
147{
148 unsigned long flags;
149 long result;
150
151 local_irq_save(flags);
152 __asm__ __volatile__ (
153 "# local_inc_return \n\t"
154 DCACHE_CLEAR("%0", "r4", "%1")
155 "ld %0, @%1; \n\t"
156 "addi %0, #1; \n\t"
157 "st %0, @%1; \n\t"
158 : "=&r" (result)
159 : "r" (&l->counter)
160 : "memory"
161#ifdef CONFIG_CHIP_M32700_TS1
162 , "r4"
163#endif /* CONFIG_CHIP_M32700_TS1 */
164 );
165 local_irq_restore(flags);
166
167 return result;
168}
169
170/**
171 * local_dec_return - decrement local variable and return it
172 * @l: pointer of type local_t
173 *
174 * Atomically decrements @l by 1 and returns the result.
175 */
176static inline long local_dec_return(local_t *l)
177{
178 unsigned long flags;
179 long result;
180
181 local_irq_save(flags);
182 __asm__ __volatile__ (
183 "# local_dec_return \n\t"
184 DCACHE_CLEAR("%0", "r4", "%1")
185 "ld %0, @%1; \n\t"
186 "addi %0, #-1; \n\t"
187 "st %0, @%1; \n\t"
188 : "=&r" (result)
189 : "r" (&l->counter)
190 : "memory"
191#ifdef CONFIG_CHIP_M32700_TS1
192 , "r4"
193#endif /* CONFIG_CHIP_M32700_TS1 */
194 );
195 local_irq_restore(flags);
196
197 return result;
198}
199
200/**
201 * local_inc - increment local variable
202 * @l: pointer of type local_t
203 *
204 * Atomically increments @l by 1.
205 */
206#define local_inc(l) ((void)local_inc_return(l))
207
208/**
209 * local_dec - decrement local variable
210 * @l: pointer of type local_t
211 *
212 * Atomically decrements @l by 1.
213 */
214#define local_dec(l) ((void)local_dec_return(l))
215
216/**
217 * local_inc_and_test - increment and test
218 * @l: pointer of type local_t
219 *
220 * Atomically increments @l by 1
221 * and returns true if the result is zero, or false for all
222 * other cases.
223 */
224#define local_inc_and_test(l) (local_inc_return(l) == 0)
225
226/**
227 * local_dec_and_test - decrement and test
228 * @l: pointer of type local_t
229 *
230 * Atomically decrements @l by 1 and
231 * returns true if the result is 0, or false for all
232 * other cases.
233 */
234#define local_dec_and_test(l) (local_dec_return(l) == 0)
235
236/**
237 * local_add_negative - add and test if negative
238 * @l: pointer of type local_t
239 * @i: integer value to add
240 *
241 * Atomically adds @i to @l and returns true
242 * if the result is negative, or false when
243 * result is greater than or equal to zero.
244 */
245#define local_add_negative(i, l) (local_add_return((i), (l)) < 0)
246
247#define local_cmpxchg(l, o, n) (cmpxchg_local(&((l)->counter), (o), (n)))
248#define local_xchg(v, new) (xchg_local(&((l)->counter), new))
249
250/**
251 * local_add_unless - add unless the number is a given value
252 * @l: pointer of type local_t
253 * @a: the amount to add to l...
254 * @u: ...unless l is equal to u.
255 *
256 * Atomically adds @a to @l, so long as it was not @u.
257 * Returns non-zero if @l was not @u, and zero otherwise.
258 */
259static inline int local_add_unless(local_t *l, long a, long u)
260{
261 long c, old;
262 c = local_read(l);
263 for (;;) {
264 if (unlikely(c == (u)))
265 break;
266 old = local_cmpxchg((l), c, c + (a));
267 if (likely(old == c))
268 break;
269 c = old;
270 }
271 return c != (u);
272}
273
274#define local_inc_not_zero(l) local_add_unless((l), 1, 0)
275
276static inline void local_clear_mask(unsigned long mask, local_t *addr)
277{
278 unsigned long flags;
279 unsigned long tmp;
280
281 local_irq_save(flags);
282 __asm__ __volatile__ (
283 "# local_clear_mask \n\t"
284 DCACHE_CLEAR("%0", "r5", "%1")
285 "ld %0, @%1; \n\t"
286 "and %0, %2; \n\t"
287 "st %0, @%1; \n\t"
288 : "=&r" (tmp)
289 : "r" (addr), "r" (~mask)
290 : "memory"
291#ifdef CONFIG_CHIP_M32700_TS1
292 , "r5"
293#endif /* CONFIG_CHIP_M32700_TS1 */
294 );
295 local_irq_restore(flags);
296}
297
298static inline void local_set_mask(unsigned long mask, local_t *addr)
299{
300 unsigned long flags;
301 unsigned long tmp;
302
303 local_irq_save(flags);
304 __asm__ __volatile__ (
305 "# local_set_mask \n\t"
306 DCACHE_CLEAR("%0", "r5", "%1")
307 "ld %0, @%1; \n\t"
308 "or %0, %2; \n\t"
309 "st %0, @%1; \n\t"
310 : "=&r" (tmp)
311 : "r" (addr), "r" (mask)
312 : "memory"
313#ifdef CONFIG_CHIP_M32700_TS1
314 , "r5"
315#endif /* CONFIG_CHIP_M32700_TS1 */
316 );
317 local_irq_restore(flags);
318}
319
320/* Atomic operations are already serializing on m32r */
321#define smp_mb__before_local_dec() barrier()
322#define smp_mb__after_local_dec() barrier()
323#define smp_mb__before_local_inc() barrier()
324#define smp_mb__after_local_inc() barrier()
325
326/* Use these for per-cpu local_t variables: on some archs they are
327 * much more efficient than these naive implementations. Note they take
328 * a variable, not an address.
329 */
330
331#define __local_inc(l) ((l)->a.counter++)
332#define __local_dec(l) ((l)->a.counter++)
333#define __local_add(i, l) ((l)->a.counter += (i))
334#define __local_sub(i, l) ((l)->a.counter -= (i))
335
336/* Use these for per-cpu local_t variables: on some archs they are
337 * much more efficient than these naive implementations. Note they take
338 * a variable, not an address.
339 */
340
341/* Need to disable preemption for the cpu local counters otherwise we could
342 still access a variable of a previous CPU in a non local way. */
343#define cpu_local_wrap_v(l) \
344 ({ local_t res__; \
345 preempt_disable(); \
346 res__ = (l); \
347 preempt_enable(); \
348 res__; })
349#define cpu_local_wrap(l) \
350 ({ preempt_disable(); \
351 l; \
352 preempt_enable(); }) \
353
354#define cpu_local_read(l) cpu_local_wrap_v(local_read(&__get_cpu_var(l)))
355#define cpu_local_set(l, i) cpu_local_wrap(local_set(&__get_cpu_var(l), (i)))
356#define cpu_local_inc(l) cpu_local_wrap(local_inc(&__get_cpu_var(l)))
357#define cpu_local_dec(l) cpu_local_wrap(local_dec(&__get_cpu_var(l)))
358#define cpu_local_add(i, l) cpu_local_wrap(local_add((i), &__get_cpu_var(l)))
359#define cpu_local_sub(i, l) cpu_local_wrap(local_sub((i), &__get_cpu_var(l)))
360
361#define __cpu_local_inc(l) cpu_local_inc(l)
362#define __cpu_local_dec(l) cpu_local_dec(l)
363#define __cpu_local_add(i, l) cpu_local_add((i), (l))
364#define __cpu_local_sub(i, l) cpu_local_sub((i), (l))
365
366#endif /* __M32R_LOCAL_H */
diff --git a/arch/m32r/include/asm/m32102.h b/arch/m32r/include/asm/m32102.h
new file mode 100644
index 000000000000..52807f8db166
--- /dev/null
+++ b/arch/m32r/include/asm/m32102.h
@@ -0,0 +1,314 @@
1#ifndef _M32102_H_
2#define _M32102_H_
3
4/*
5 * Renesas M32R 32102 group
6 *
7 * Copyright (c) 2001 Hitoshi Yamamoto
8 * Copyright (c) 2003, 2004 Renesas Technology Corp.
9 */
10
11/*======================================================================*
12 * Special Function Register
13 *======================================================================*/
14#if !defined(CONFIG_CHIP_M32104)
15#define M32R_SFR_OFFSET (0x00E00000) /* 0x00E00000-0x00EFFFFF 1[MB] */
16#else
17#define M32R_SFR_OFFSET (0x00700000) /* 0x00700000-0x007FFFFF 1[MB] */
18#endif
19
20/*
21 * Clock and Power Management registers.
22 */
23#define M32R_CPM_OFFSET (0x000F4000+M32R_SFR_OFFSET)
24
25#define M32R_CPM_CPUCLKCR_PORTL (0x00+M32R_CPM_OFFSET)
26#define M32R_CPM_CLKMOD_PORTL (0x04+M32R_CPM_OFFSET)
27#define M32R_CPM_PLLCR_PORTL (0x08+M32R_CPM_OFFSET)
28
29/*
30 * DMA Controller registers.
31 */
32#define M32R_DMA_OFFSET (0x000F8000+M32R_SFR_OFFSET)
33
34#define M32R_DMAEN_PORTL (0x000+M32R_DMA_OFFSET)
35#define M32R_DMAISTS_PORTL (0x004+M32R_DMA_OFFSET)
36#define M32R_DMAEDET_PORTL (0x008+M32R_DMA_OFFSET)
37#define M32R_DMAASTS_PORTL (0x00c+M32R_DMA_OFFSET)
38
39#define M32R_DMA0CR0_PORTL (0x100+M32R_DMA_OFFSET)
40#define M32R_DMA0CR1_PORTL (0x104+M32R_DMA_OFFSET)
41#define M32R_DMA0CSA_PORTL (0x108+M32R_DMA_OFFSET)
42#define M32R_DMA0RSA_PORTL (0x10c+M32R_DMA_OFFSET)
43#define M32R_DMA0CDA_PORTL (0x110+M32R_DMA_OFFSET)
44#define M32R_DMA0RDA_PORTL (0x114+M32R_DMA_OFFSET)
45#define M32R_DMA0CBCUT_PORTL (0x118+M32R_DMA_OFFSET)
46#define M32R_DMA0RBCUT_PORTL (0x11c+M32R_DMA_OFFSET)
47
48#define M32R_DMA1CR0_PORTL (0x200+M32R_DMA_OFFSET)
49#define M32R_DMA1CR1_PORTL (0x204+M32R_DMA_OFFSET)
50#define M32R_DMA1CSA_PORTL (0x208+M32R_DMA_OFFSET)
51#define M32R_DMA1RSA_PORTL (0x20c+M32R_DMA_OFFSET)
52#define M32R_DMA1CDA_PORTL (0x210+M32R_DMA_OFFSET)
53#define M32R_DMA1RDA_PORTL (0x214+M32R_DMA_OFFSET)
54#define M32R_DMA1CBCUT_PORTL (0x218+M32R_DMA_OFFSET)
55#define M32R_DMA1RBCUT_PORTL (0x21c+M32R_DMA_OFFSET)
56
57/*
58 * Multi Function Timer registers.
59 */
60#define M32R_MFT_OFFSET (0x000FC000+M32R_SFR_OFFSET)
61
62#define M32R_MFTCR_PORTL (0x000+M32R_MFT_OFFSET) /* MFT control */
63#define M32R_MFTRPR_PORTL (0x004+M32R_MFT_OFFSET) /* MFT real port */
64
65#define M32R_MFT0_OFFSET (0x100+M32R_MFT_OFFSET)
66#define M32R_MFT0MOD_PORTL (0x00+M32R_MFT0_OFFSET) /* MFT0 mode */
67#define M32R_MFT0BOS_PORTL (0x04+M32R_MFT0_OFFSET) /* MFT0 b-port output status */
68#define M32R_MFT0CUT_PORTL (0x08+M32R_MFT0_OFFSET) /* MFT0 count */
69#define M32R_MFT0RLD_PORTL (0x0C+M32R_MFT0_OFFSET) /* MFT0 reload */
70#define M32R_MFT0CMPRLD_PORTL (0x10+M32R_MFT0_OFFSET) /* MFT0 compare reload */
71
72#define M32R_MFT1_OFFSET (0x200+M32R_MFT_OFFSET)
73#define M32R_MFT1MOD_PORTL (0x00+M32R_MFT1_OFFSET) /* MFT1 mode */
74#define M32R_MFT1BOS_PORTL (0x04+M32R_MFT1_OFFSET) /* MFT1 b-port output status */
75#define M32R_MFT1CUT_PORTL (0x08+M32R_MFT1_OFFSET) /* MFT1 count */
76#define M32R_MFT1RLD_PORTL (0x0C+M32R_MFT1_OFFSET) /* MFT1 reload */
77#define M32R_MFT1CMPRLD_PORTL (0x10+M32R_MFT1_OFFSET) /* MFT1 compare reload */
78
79#define M32R_MFT2_OFFSET (0x300+M32R_MFT_OFFSET)
80#define M32R_MFT2MOD_PORTL (0x00+M32R_MFT2_OFFSET) /* MFT2 mode */
81#define M32R_MFT2BOS_PORTL (0x04+M32R_MFT2_OFFSET) /* MFT2 b-port output status */
82#define M32R_MFT2CUT_PORTL (0x08+M32R_MFT2_OFFSET) /* MFT2 count */
83#define M32R_MFT2RLD_PORTL (0x0C+M32R_MFT2_OFFSET) /* MFT2 reload */
84#define M32R_MFT2CMPRLD_PORTL (0x10+M32R_MFT2_OFFSET) /* MFT2 compare reload */
85
86#define M32R_MFT3_OFFSET (0x400+M32R_MFT_OFFSET)
87#define M32R_MFT3MOD_PORTL (0x00+M32R_MFT3_OFFSET) /* MFT3 mode */
88#define M32R_MFT3BOS_PORTL (0x04+M32R_MFT3_OFFSET) /* MFT3 b-port output status */
89#define M32R_MFT3CUT_PORTL (0x08+M32R_MFT3_OFFSET) /* MFT3 count */
90#define M32R_MFT3RLD_PORTL (0x0C+M32R_MFT3_OFFSET) /* MFT3 reload */
91#define M32R_MFT3CMPRLD_PORTL (0x10+M32R_MFT3_OFFSET) /* MFT3 compare reload */
92
93#define M32R_MFT4_OFFSET (0x500+M32R_MFT_OFFSET)
94#define M32R_MFT4MOD_PORTL (0x00+M32R_MFT4_OFFSET) /* MFT4 mode */
95#define M32R_MFT4BOS_PORTL (0x04+M32R_MFT4_OFFSET) /* MFT4 b-port output status */
96#define M32R_MFT4CUT_PORTL (0x08+M32R_MFT4_OFFSET) /* MFT4 count */
97#define M32R_MFT4RLD_PORTL (0x0C+M32R_MFT4_OFFSET) /* MFT4 reload */
98#define M32R_MFT4CMPRLD_PORTL (0x10+M32R_MFT4_OFFSET) /* MFT4 compare reload */
99
100#define M32R_MFT5_OFFSET (0x600+M32R_MFT_OFFSET)
101#define M32R_MFT5MOD_PORTL (0x00+M32R_MFT5_OFFSET) /* MFT4 mode */
102#define M32R_MFT5BOS_PORTL (0x04+M32R_MFT5_OFFSET) /* MFT4 b-port output status */
103#define M32R_MFT5CUT_PORTL (0x08+M32R_MFT5_OFFSET) /* MFT4 count */
104#define M32R_MFT5RLD_PORTL (0x0C+M32R_MFT5_OFFSET) /* MFT4 reload */
105#define M32R_MFT5CMPRLD_PORTL (0x10+M32R_MFT5_OFFSET) /* MFT4 compare reload */
106
107#if (defined(CONFIG_CHIP_M32700) && !defined(CONFIG_PLAT_MAPPI2)) \
108 || defined(CONFIG_CHIP_M32104)
109#define M32R_MFTCR_MFT0MSK (1UL<<31) /* b0 */
110#define M32R_MFTCR_MFT1MSK (1UL<<30) /* b1 */
111#define M32R_MFTCR_MFT2MSK (1UL<<29) /* b2 */
112#define M32R_MFTCR_MFT3MSK (1UL<<28) /* b3 */
113#define M32R_MFTCR_MFT4MSK (1UL<<27) /* b4 */
114#define M32R_MFTCR_MFT5MSK (1UL<<26) /* b5 */
115#define M32R_MFTCR_MFT0EN (1UL<<23) /* b8 */
116#define M32R_MFTCR_MFT1EN (1UL<<22) /* b9 */
117#define M32R_MFTCR_MFT2EN (1UL<<21) /* b10 */
118#define M32R_MFTCR_MFT3EN (1UL<<20) /* b11 */
119#define M32R_MFTCR_MFT4EN (1UL<<19) /* b12 */
120#define M32R_MFTCR_MFT5EN (1UL<<18) /* b13 */
121#else
122#define M32R_MFTCR_MFT0MSK (1UL<<15) /* b16 */
123#define M32R_MFTCR_MFT1MSK (1UL<<14) /* b17 */
124#define M32R_MFTCR_MFT2MSK (1UL<<13) /* b18 */
125#define M32R_MFTCR_MFT3MSK (1UL<<12) /* b19 */
126#define M32R_MFTCR_MFT4MSK (1UL<<11) /* b20 */
127#define M32R_MFTCR_MFT5MSK (1UL<<10) /* b21 */
128#define M32R_MFTCR_MFT0EN (1UL<<7) /* b24 */
129#define M32R_MFTCR_MFT1EN (1UL<<6) /* b25 */
130#define M32R_MFTCR_MFT2EN (1UL<<5) /* b26 */
131#define M32R_MFTCR_MFT3EN (1UL<<4) /* b27 */
132#define M32R_MFTCR_MFT4EN (1UL<<3) /* b28 */
133#define M32R_MFTCR_MFT5EN (1UL<<2) /* b29 */
134#endif
135
136#define M32R_MFTMOD_CC_MASK (1UL<<15) /* b16 */
137#define M32R_MFTMOD_TCCR (1UL<<13) /* b18 */
138#define M32R_MFTMOD_GTSEL000 (0UL<<8) /* b21-23 : 000 */
139#define M32R_MFTMOD_GTSEL001 (1UL<<8) /* b21-23 : 001 */
140#define M32R_MFTMOD_GTSEL010 (2UL<<8) /* b21-23 : 010 */
141#define M32R_MFTMOD_GTSEL011 (3UL<<8) /* b21-23 : 011 */
142#define M32R_MFTMOD_GTSEL110 (6UL<<8) /* b21-23 : 110 */
143#define M32R_MFTMOD_GTSEL111 (7UL<<8) /* b21-23 : 111 */
144#define M32R_MFTMOD_CMSEL (1UL<<3) /* b28 */
145#define M32R_MFTMOD_CSSEL000 (0UL<<0) /* b29-b31 : 000 */
146#define M32R_MFTMOD_CSSEL001 (1UL<<0) /* b29-b31 : 001 */
147#define M32R_MFTMOD_CSSEL010 (2UL<<0) /* b29-b31 : 010 */
148#define M32R_MFTMOD_CSSEL011 (3UL<<0) /* b29-b31 : 011 */
149#define M32R_MFTMOD_CSSEL100 (4UL<<0) /* b29-b31 : 100 */
150#define M32R_MFTMOD_CSSEL110 (6UL<<0) /* b29-b31 : 110 */
151
152/*
153 * Serial I/O registers.
154 */
155#define M32R_SIO_OFFSET (0x000FD000+M32R_SFR_OFFSET)
156
157#define M32R_SIO0_CR_PORTL (0x000+M32R_SIO_OFFSET)
158#define M32R_SIO0_MOD0_PORTL (0x004+M32R_SIO_OFFSET)
159#define M32R_SIO0_MOD1_PORTL (0x008+M32R_SIO_OFFSET)
160#define M32R_SIO0_STS_PORTL (0x00C+M32R_SIO_OFFSET)
161#define M32R_SIO0_TRCR_PORTL (0x010+M32R_SIO_OFFSET)
162#define M32R_SIO0_BAUR_PORTL (0x014+M32R_SIO_OFFSET)
163#define M32R_SIO0_RBAUR_PORTL (0x018+M32R_SIO_OFFSET)
164#define M32R_SIO0_TXB_PORTL (0x01C+M32R_SIO_OFFSET)
165#define M32R_SIO0_RXB_PORTL (0x020+M32R_SIO_OFFSET)
166
167/*
168 * Interrupt Control Unit registers.
169 */
170#define M32R_ICU_OFFSET (0x000FF000+M32R_SFR_OFFSET)
171#define M32R_ICU_ISTS_PORTL (0x004+M32R_ICU_OFFSET)
172#define M32R_ICU_IREQ0_PORTL (0x008+M32R_ICU_OFFSET)
173#define M32R_ICU_IREQ1_PORTL (0x00C+M32R_ICU_OFFSET)
174#define M32R_ICU_SBICR_PORTL (0x018+M32R_ICU_OFFSET)
175#define M32R_ICU_IMASK_PORTL (0x01C+M32R_ICU_OFFSET)
176#define M32R_ICU_CR1_PORTL (0x200+M32R_ICU_OFFSET) /* INT0 */
177#define M32R_ICU_CR2_PORTL (0x204+M32R_ICU_OFFSET) /* INT1 */
178#define M32R_ICU_CR3_PORTL (0x208+M32R_ICU_OFFSET) /* INT2 */
179#define M32R_ICU_CR4_PORTL (0x20C+M32R_ICU_OFFSET) /* INT3 */
180#define M32R_ICU_CR5_PORTL (0x210+M32R_ICU_OFFSET) /* INT4 */
181#define M32R_ICU_CR6_PORTL (0x214+M32R_ICU_OFFSET) /* INT5 */
182#define M32R_ICU_CR7_PORTL (0x218+M32R_ICU_OFFSET) /* INT6 */
183#define M32R_ICU_CR8_PORTL (0x219+M32R_ICU_OFFSET) /* INT7 */
184#define M32R_ICU_CR16_PORTL (0x23C+M32R_ICU_OFFSET) /* MFT0 */
185#define M32R_ICU_CR17_PORTL (0x240+M32R_ICU_OFFSET) /* MFT1 */
186#define M32R_ICU_CR18_PORTL (0x244+M32R_ICU_OFFSET) /* MFT2 */
187#define M32R_ICU_CR19_PORTL (0x248+M32R_ICU_OFFSET) /* MFT3 */
188#define M32R_ICU_CR20_PORTL (0x24C+M32R_ICU_OFFSET) /* MFT4 */
189#define M32R_ICU_CR21_PORTL (0x250+M32R_ICU_OFFSET) /* MFT5 */
190#define M32R_ICU_CR32_PORTL (0x27C+M32R_ICU_OFFSET) /* DMA0 */
191#define M32R_ICU_CR33_PORTL (0x280+M32R_ICU_OFFSET) /* DMA1 */
192#define M32R_ICU_CR48_PORTL (0x2BC+M32R_ICU_OFFSET) /* SIO0 */
193#define M32R_ICU_CR49_PORTL (0x2C0+M32R_ICU_OFFSET) /* SIO0 */
194#define M32R_ICU_CR50_PORTL (0x2C4+M32R_ICU_OFFSET) /* SIO1 */
195#define M32R_ICU_CR51_PORTL (0x2C8+M32R_ICU_OFFSET) /* SIO1 */
196#define M32R_ICU_CR52_PORTL (0x2CC+M32R_ICU_OFFSET) /* SIO2 */
197#define M32R_ICU_CR53_PORTL (0x2D0+M32R_ICU_OFFSET) /* SIO2 */
198#define M32R_ICU_CR54_PORTL (0x2D4+M32R_ICU_OFFSET) /* SIO3 */
199#define M32R_ICU_CR55_PORTL (0x2D8+M32R_ICU_OFFSET) /* SIO3 */
200#define M32R_ICU_CR56_PORTL (0x2DC+M32R_ICU_OFFSET) /* SIO4 */
201#define M32R_ICU_CR57_PORTL (0x2E0+M32R_ICU_OFFSET) /* SIO4 */
202
203#ifdef CONFIG_SMP
204#define M32R_ICU_IPICR0_PORTL (0x2dc+M32R_ICU_OFFSET) /* IPI0 */
205#define M32R_ICU_IPICR1_PORTL (0x2e0+M32R_ICU_OFFSET) /* IPI1 */
206#define M32R_ICU_IPICR2_PORTL (0x2e4+M32R_ICU_OFFSET) /* IPI2 */
207#define M32R_ICU_IPICR3_PORTL (0x2e8+M32R_ICU_OFFSET) /* IPI3 */
208#define M32R_ICU_IPICR4_PORTL (0x2ec+M32R_ICU_OFFSET) /* IPI4 */
209#define M32R_ICU_IPICR5_PORTL (0x2f0+M32R_ICU_OFFSET) /* IPI5 */
210#define M32R_ICU_IPICR6_PORTL (0x2f4+M32R_ICU_OFFSET) /* IPI6 */
211#define M32R_ICU_IPICR7_PORTL (0x2f8+M32R_ICU_OFFSET) /* IPI7 */
212#endif /* CONFIG_SMP */
213
214#define M32R_ICUIMASK_IMSK0 (0UL<<16) /* b13-b15: Disable interrupt */
215#define M32R_ICUIMASK_IMSK1 (1UL<<16) /* b13-b15: Enable level 0 interrupt */
216#define M32R_ICUIMASK_IMSK2 (2UL<<16) /* b13-b15: Enable level 0,1 interrupt */
217#define M32R_ICUIMASK_IMSK3 (3UL<<16) /* b13-b15: Enable level 0-2 interrupt */
218#define M32R_ICUIMASK_IMSK4 (4UL<<16) /* b13-b15: Enable level 0-3 interrupt */
219#define M32R_ICUIMASK_IMSK5 (5UL<<16) /* b13-b15: Enable level 0-4 interrupt */
220#define M32R_ICUIMASK_IMSK6 (6UL<<16) /* b13-b15: Enable level 0-5 interrupt */
221#define M32R_ICUIMASK_IMSK7 (7UL<<16) /* b13-b15: Enable level 0-6 interrupt */
222
223#define M32R_ICUCR_IEN (1UL<<12) /* b19: Interrupt enable */
224#define M32R_ICUCR_IRQ (1UL<<8) /* b23: Interrupt request */
225#define M32R_ICUCR_ISMOD00 (0UL<<4) /* b26-b27: Interrupt sense mode Edge HtoL */
226#define M32R_ICUCR_ISMOD01 (1UL<<4) /* b26-b27: Interrupt sense mode Level L */
227#define M32R_ICUCR_ISMOD10 (2UL<<4) /* b26-b27: Interrupt sense mode Edge LtoH*/
228#define M32R_ICUCR_ISMOD11 (3UL<<4) /* b26-b27: Interrupt sense mode Level H */
229#define M32R_ICUCR_ILEVEL0 (0UL<<0) /* b29-b31: Interrupt priority level 0 */
230#define M32R_ICUCR_ILEVEL1 (1UL<<0) /* b29-b31: Interrupt priority level 1 */
231#define M32R_ICUCR_ILEVEL2 (2UL<<0) /* b29-b31: Interrupt priority level 2 */
232#define M32R_ICUCR_ILEVEL3 (3UL<<0) /* b29-b31: Interrupt priority level 3 */
233#define M32R_ICUCR_ILEVEL4 (4UL<<0) /* b29-b31: Interrupt priority level 4 */
234#define M32R_ICUCR_ILEVEL5 (5UL<<0) /* b29-b31: Interrupt priority level 5 */
235#define M32R_ICUCR_ILEVEL6 (6UL<<0) /* b29-b31: Interrupt priority level 6 */
236#define M32R_ICUCR_ILEVEL7 (7UL<<0) /* b29-b31: Disable interrupt */
237
238#define M32R_IRQ_INT0 (1) /* INT0 */
239#define M32R_IRQ_INT1 (2) /* INT1 */
240#define M32R_IRQ_INT2 (3) /* INT2 */
241#define M32R_IRQ_INT3 (4) /* INT3 */
242#define M32R_IRQ_INT4 (5) /* INT4 */
243#define M32R_IRQ_INT5 (6) /* INT5 */
244#define M32R_IRQ_INT6 (7) /* INT6 */
245#define M32R_IRQ_MFT0 (16) /* MFT0 */
246#define M32R_IRQ_MFT1 (17) /* MFT1 */
247#define M32R_IRQ_MFT2 (18) /* MFT2 */
248#define M32R_IRQ_MFT3 (19) /* MFT3 */
249#ifdef CONFIG_CHIP_M32104
250#define M32R_IRQ_MFTX0 (24) /* MFTX0 */
251#define M32R_IRQ_MFTX1 (25) /* MFTX1 */
252#define M32R_IRQ_DMA0 (32) /* DMA0 */
253#define M32R_IRQ_DMA1 (33) /* DMA1 */
254#define M32R_IRQ_DMA2 (34) /* DMA2 */
255#define M32R_IRQ_DMA3 (35) /* DMA3 */
256#define M32R_IRQ_SIO0_R (40) /* SIO0 send */
257#define M32R_IRQ_SIO0_S (41) /* SIO0 receive */
258#define M32R_IRQ_SIO1_R (42) /* SIO1 send */
259#define M32R_IRQ_SIO1_S (43) /* SIO1 receive */
260#define M32R_IRQ_SIO2_R (44) /* SIO2 send */
261#define M32R_IRQ_SIO2_S (45) /* SIO2 receive */
262#define M32R_IRQ_SIO3_R (46) /* SIO3 send */
263#define M32R_IRQ_SIO3_S (47) /* SIO3 receive */
264#define M32R_IRQ_ADC (56) /* ADC */
265#define M32R_IRQ_PC (57) /* PC */
266#else /* ! M32104 */
267#define M32R_IRQ_DMA0 (32) /* DMA0 */
268#define M32R_IRQ_DMA1 (33) /* DMA1 */
269#define M32R_IRQ_SIO0_R (48) /* SIO0 send */
270#define M32R_IRQ_SIO0_S (49) /* SIO0 receive */
271#define M32R_IRQ_SIO1_R (50) /* SIO1 send */
272#define M32R_IRQ_SIO1_S (51) /* SIO1 receive */
273#define M32R_IRQ_SIO2_R (52) /* SIO2 send */
274#define M32R_IRQ_SIO2_S (53) /* SIO2 receive */
275#define M32R_IRQ_SIO3_R (54) /* SIO3 send */
276#define M32R_IRQ_SIO3_S (55) /* SIO3 receive */
277#define M32R_IRQ_SIO4_R (56) /* SIO4 send */
278#define M32R_IRQ_SIO4_S (57) /* SIO4 receive */
279#endif /* ! M32104 */
280
281#ifdef CONFIG_SMP
282#define M32R_IRQ_IPI0 (56)
283#define M32R_IRQ_IPI1 (57)
284#define M32R_IRQ_IPI2 (58)
285#define M32R_IRQ_IPI3 (59)
286#define M32R_IRQ_IPI4 (60)
287#define M32R_IRQ_IPI5 (61)
288#define M32R_IRQ_IPI6 (62)
289#define M32R_IRQ_IPI7 (63)
290#define M32R_CPUID_PORTL (0xffffffe0)
291
292#define M32R_FPGA_TOP (0x000F0000+M32R_SFR_OFFSET)
293
294#define M32R_FPGA_NUM_OF_CPUS_PORTL (0x00+M32R_FPGA_TOP)
295#define M32R_FPGA_CPU_NAME0_PORTL (0x10+M32R_FPGA_TOP)
296#define M32R_FPGA_CPU_NAME1_PORTL (0x14+M32R_FPGA_TOP)
297#define M32R_FPGA_CPU_NAME2_PORTL (0x18+M32R_FPGA_TOP)
298#define M32R_FPGA_CPU_NAME3_PORTL (0x1c+M32R_FPGA_TOP)
299#define M32R_FPGA_MODEL_ID0_PORTL (0x20+M32R_FPGA_TOP)
300#define M32R_FPGA_MODEL_ID1_PORTL (0x24+M32R_FPGA_TOP)
301#define M32R_FPGA_MODEL_ID2_PORTL (0x28+M32R_FPGA_TOP)
302#define M32R_FPGA_MODEL_ID3_PORTL (0x2c+M32R_FPGA_TOP)
303#define M32R_FPGA_VERSION0_PORTL (0x30+M32R_FPGA_TOP)
304#define M32R_FPGA_VERSION1_PORTL (0x34+M32R_FPGA_TOP)
305
306#endif /* CONFIG_SMP */
307
308#ifndef __ASSEMBLY__
309typedef struct {
310 unsigned long icucr; /* ICU Control Register */
311} icu_data_t;
312#endif
313
314#endif /* _M32102_H_ */
diff --git a/arch/m32r/include/asm/m32104ut/m32104ut_pld.h b/arch/m32r/include/asm/m32104ut/m32104ut_pld.h
new file mode 100644
index 000000000000..2dc89d68b6d9
--- /dev/null
+++ b/arch/m32r/include/asm/m32104ut/m32104ut_pld.h
@@ -0,0 +1,161 @@
1#ifndef _M32104UT_M32104UT_PLD_H
2#define _M32104UT_M32104UT_PLD_H
3
4/*
5 * include/asm-m32r/m32104ut/m32104ut_pld.h
6 *
7 * Definitions for Programable Logic Device(PLD) on M32104UT board.
8 * Based on m32700ut_pld.h
9 *
10 * Copyright (c) 2002 Takeo Takahashi
11 * Copyright (c) 2005 Naoto Sugai
12 *
13 * This file is subject to the terms and conditions of the GNU General
14 * Public License. See the file "COPYING" in the main directory of
15 * this archive for more details.
16 */
17
18#if defined(CONFIG_PLAT_M32104UT)
19#define PLD_PLAT_BASE 0x02c00000
20#else
21#error "no platform configuration"
22#endif
23
24#ifndef __ASSEMBLY__
25/*
26 * C functions use non-cache address.
27 */
28#define PLD_BASE (PLD_PLAT_BASE /* + NONCACHE_OFFSET */)
29#define __reg8 (volatile unsigned char *)
30#define __reg16 (volatile unsigned short *)
31#define __reg32 (volatile unsigned int *)
32#else
33#define PLD_BASE (PLD_PLAT_BASE + NONCACHE_OFFSET)
34#define __reg8
35#define __reg16
36#define __reg32
37#endif /* __ASSEMBLY__ */
38
39/* CFC */
40#define PLD_CFRSTCR __reg16(PLD_BASE + 0x0000)
41#define PLD_CFSTS __reg16(PLD_BASE + 0x0002)
42#define PLD_CFIMASK __reg16(PLD_BASE + 0x0004)
43#define PLD_CFBUFCR __reg16(PLD_BASE + 0x0006)
44
45/* MMC */
46#define PLD_MMCCR __reg16(PLD_BASE + 0x4000)
47#define PLD_MMCMOD __reg16(PLD_BASE + 0x4002)
48#define PLD_MMCSTS __reg16(PLD_BASE + 0x4006)
49#define PLD_MMCBAUR __reg16(PLD_BASE + 0x400a)
50#define PLD_MMCCMDBCUT __reg16(PLD_BASE + 0x400c)
51#define PLD_MMCCDTBCUT __reg16(PLD_BASE + 0x400e)
52#define PLD_MMCDET __reg16(PLD_BASE + 0x4010)
53#define PLD_MMCWP __reg16(PLD_BASE + 0x4012)
54#define PLD_MMCWDATA __reg16(PLD_BASE + 0x5000)
55#define PLD_MMCRDATA __reg16(PLD_BASE + 0x6000)
56#define PLD_MMCCMDDATA __reg16(PLD_BASE + 0x7000)
57#define PLD_MMCRSPDATA __reg16(PLD_BASE + 0x7006)
58
59/* ICU
60 * ICUISTS: status register
61 * ICUIREQ0: request register
62 * ICUIREQ1: request register
63 * ICUCR3: control register for CFIREQ# interrupt
64 * ICUCR4: control register for CFC Card insert interrupt
65 * ICUCR5: control register for CFC Card eject interrupt
66 * ICUCR6: control register for external interrupt
67 * ICUCR11: control register for MMC Card insert/eject interrupt
68 * ICUCR13: control register for SC error interrupt
69 * ICUCR14: control register for SC receive interrupt
70 * ICUCR15: control register for SC send interrupt
71 */
72
73#define PLD_IRQ_INT0 (M32104UT_PLD_IRQ_BASE + 0) /* None */
74#define PLD_IRQ_CFIREQ (M32104UT_PLD_IRQ_BASE + 3) /* CF IREQ */
75#define PLD_IRQ_CFC_INSERT (M32104UT_PLD_IRQ_BASE + 4) /* CF Insert */
76#define PLD_IRQ_CFC_EJECT (M32104UT_PLD_IRQ_BASE + 5) /* CF Eject */
77#define PLD_IRQ_EXINT (M32104UT_PLD_IRQ_BASE + 6) /* EXINT */
78#define PLD_IRQ_MMCCARD (M32104UT_PLD_IRQ_BASE + 11) /* MMC Insert/Eject */
79#define PLD_IRQ_SC_ERROR (M32104UT_PLD_IRQ_BASE + 13) /* SC error */
80#define PLD_IRQ_SC_RCV (M32104UT_PLD_IRQ_BASE + 14) /* SC receive */
81#define PLD_IRQ_SC_SND (M32104UT_PLD_IRQ_BASE + 15) /* SC send */
82
83#define PLD_ICUISTS __reg16(PLD_BASE + 0x8002)
84#define PLD_ICUISTS_VECB_MASK (0xf000)
85#define PLD_ICUISTS_VECB(x) ((x) & PLD_ICUISTS_VECB_MASK)
86#define PLD_ICUISTS_ISN_MASK (0x07c0)
87#define PLD_ICUISTS_ISN(x) ((x) & PLD_ICUISTS_ISN_MASK)
88#define PLD_ICUCR3 __reg16(PLD_BASE + 0x8104)
89#define PLD_ICUCR4 __reg16(PLD_BASE + 0x8106)
90#define PLD_ICUCR5 __reg16(PLD_BASE + 0x8108)
91#define PLD_ICUCR6 __reg16(PLD_BASE + 0x810a)
92#define PLD_ICUCR11 __reg16(PLD_BASE + 0x8114)
93#define PLD_ICUCR13 __reg16(PLD_BASE + 0x8118)
94#define PLD_ICUCR14 __reg16(PLD_BASE + 0x811a)
95#define PLD_ICUCR15 __reg16(PLD_BASE + 0x811c)
96#define PLD_ICUCR_IEN (0x1000)
97#define PLD_ICUCR_IREQ (0x0100)
98#define PLD_ICUCR_ISMOD00 (0x0000) /* Low edge */
99#define PLD_ICUCR_ISMOD01 (0x0010) /* Low level */
100#define PLD_ICUCR_ISMOD02 (0x0020) /* High edge */
101#define PLD_ICUCR_ISMOD03 (0x0030) /* High level */
102#define PLD_ICUCR_ILEVEL0 (0x0000)
103#define PLD_ICUCR_ILEVEL1 (0x0001)
104#define PLD_ICUCR_ILEVEL2 (0x0002)
105#define PLD_ICUCR_ILEVEL3 (0x0003)
106#define PLD_ICUCR_ILEVEL4 (0x0004)
107#define PLD_ICUCR_ILEVEL5 (0x0005)
108#define PLD_ICUCR_ILEVEL6 (0x0006)
109#define PLD_ICUCR_ILEVEL7 (0x0007)
110
111/* Power Control of MMC and CF */
112#define PLD_CPCR __reg16(PLD_BASE + 0x14000)
113#define PLD_CPCR_CDP 0x0001
114
115/* LED Control
116 *
117 * 1: DIP swich side
118 * 2: Reset switch side
119 */
120#define PLD_IOLEDCR __reg16(PLD_BASE + 0x14002)
121#define PLD_IOLED_1_ON 0x001
122#define PLD_IOLED_1_OFF 0x000
123#define PLD_IOLED_2_ON 0x002
124#define PLD_IOLED_2_OFF 0x000
125
126/* DIP Switch
127 * 0: Write-protect of Flash Memory (0:protected, 1:non-protected)
128 * 1: -
129 * 2: -
130 * 3: -
131 */
132#define PLD_IOSWSTS __reg16(PLD_BASE + 0x14004)
133#define PLD_IOSWSTS_IOSW2 0x0200
134#define PLD_IOSWSTS_IOSW1 0x0100
135#define PLD_IOSWSTS_IOWP0 0x0001
136
137/* CRC */
138#define PLD_CRC7DATA __reg16(PLD_BASE + 0x18000)
139#define PLD_CRC7INDATA __reg16(PLD_BASE + 0x18002)
140#define PLD_CRC16DATA __reg16(PLD_BASE + 0x18004)
141#define PLD_CRC16INDATA __reg16(PLD_BASE + 0x18006)
142#define PLD_CRC16ADATA __reg16(PLD_BASE + 0x18008)
143#define PLD_CRC16AINDATA __reg16(PLD_BASE + 0x1800a)
144
145/* RTC */
146#define PLD_RTCCR __reg16(PLD_BASE + 0x1c000)
147#define PLD_RTCBAUR __reg16(PLD_BASE + 0x1c002)
148#define PLD_RTCWRDATA __reg16(PLD_BASE + 0x1c004)
149#define PLD_RTCRDDATA __reg16(PLD_BASE + 0x1c006)
150#define PLD_RTCRSTODT __reg16(PLD_BASE + 0x1c008)
151
152/* SIM Card */
153#define PLD_SCCR __reg16(PLD_BASE + 0x38000)
154#define PLD_SCMOD __reg16(PLD_BASE + 0x38004)
155#define PLD_SCSTS __reg16(PLD_BASE + 0x38006)
156#define PLD_SCINTCR __reg16(PLD_BASE + 0x38008)
157#define PLD_SCBAUR __reg16(PLD_BASE + 0x3800a)
158#define PLD_SCTXB __reg16(PLD_BASE + 0x3800c)
159#define PLD_SCRXB __reg16(PLD_BASE + 0x3800e)
160
161#endif /* _M32104UT_M32104UT_PLD_H */
diff --git a/arch/m32r/include/asm/m32700ut/m32700ut_lan.h b/arch/m32r/include/asm/m32700ut/m32700ut_lan.h
new file mode 100644
index 000000000000..aae810a4fb2c
--- /dev/null
+++ b/arch/m32r/include/asm/m32700ut/m32700ut_lan.h
@@ -0,0 +1,103 @@
1#ifndef _M32700UT_M32700UT_LAN_H
2#define _M32700UT_M32700UT_LAN_H
3
4/*
5 * include/asm-m32r/m32700ut/m32700ut_lan.h
6 *
7 * M32700UT-LAN board
8 *
9 * Copyright (c) 2002 Takeo Takahashi
10 *
11 * This file is subject to the terms and conditions of the GNU General
12 * Public License. See the file "COPYING" in the main directory of
13 * this archive for more details.
14 */
15
16#ifndef __ASSEMBLY__
17/*
18 * C functions use non-cache address.
19 */
20#define M32700UT_LAN_BASE (0x10000000 /* + NONCACHE_OFFSET */)
21#else
22#define M32700UT_LAN_BASE (0x10000000 + NONCACHE_OFFSET)
23#endif /* __ASSEMBLY__ */
24
25/* ICU
26 * ICUISTS: status register
27 * ICUIREQ0: request register
28 * ICUIREQ1: request register
29 * ICUCR3: control register for CFIREQ# interrupt
30 * ICUCR4: control register for CFC Card insert interrupt
31 * ICUCR5: control register for CFC Card eject interrupt
32 * ICUCR6: control register for external interrupt
33 * ICUCR11: control register for MMC Card insert/eject interrupt
34 * ICUCR13: control register for SC error interrupt
35 * ICUCR14: control register for SC receive interrupt
36 * ICUCR15: control register for SC send interrupt
37 * ICUCR16: control register for SIO0 receive interrupt
38 * ICUCR17: control register for SIO0 send interrupt
39 */
40#define M32700UT_LAN_IRQ_LAN (M32700UT_LAN_PLD_IRQ_BASE + 1) /* LAN */
41#define M32700UT_LAN_IRQ_I2C (M32700UT_LAN_PLD_IRQ_BASE + 3) /* I2C */
42
43#define M32700UT_LAN_ICUISTS __reg16(M32700UT_LAN_BASE + 0xc0002)
44#define M32700UT_LAN_ICUISTS_VECB_MASK (0xf000)
45#define M32700UT_LAN_VECB(x) ((x) & M32700UT_LAN_ICUISTS_VECB_MASK)
46#define M32700UT_LAN_ICUISTS_ISN_MASK (0x07c0)
47#define M32700UT_LAN_ICUISTS_ISN(x) ((x) & M32700UT_LAN_ICUISTS_ISN_MASK)
48#define M32700UT_LAN_ICUIREQ0 __reg16(M32700UT_LAN_BASE + 0xc0004)
49#define M32700UT_LAN_ICUCR1 __reg16(M32700UT_LAN_BASE + 0xc0010)
50#define M32700UT_LAN_ICUCR3 __reg16(M32700UT_LAN_BASE + 0xc0014)
51
52/*
53 * AR register on PLD
54 */
55#define ARVCR0 __reg32(M32700UT_LAN_BASE + 0x40000)
56#define ARVCR0_VDS 0x00080000
57#define ARVCR0_RST 0x00010000
58#define ARVCR1 __reg32(M32700UT_LAN_BASE + 0x40004)
59#define ARVCR1_QVGA 0x02000000
60#define ARVCR1_NORMAL 0x01000000
61#define ARVCR1_HIEN 0x00010000
62#define ARVHCOUNT __reg32(M32700UT_LAN_BASE + 0x40008)
63#define ARDATA __reg32(M32700UT_LAN_BASE + 0x40010)
64#define ARINTSEL __reg32(M32700UT_LAN_BASE + 0x40014)
65#define ARINTSEL_INT3 0x10000000 /* CPU INT3 */
66#define ARDATA32 __reg32(M32700UT_LAN_BASE + 0x04040010) // Block 5
67/*
68#define ARINTSEL_SEL2 0x00002000
69#define ARINTSEL_SEL3 0x00001000
70#define ARINTSEL_SEL6 0x00000200
71#define ARINTSEL_SEL7 0x00000100
72#define ARINTSEL_SEL9 0x00000040
73#define ARINTSEL_SEL10 0x00000020
74#define ARINTSEL_SEL11 0x00000010
75#define ARINTSEL_SEL12 0x00000008
76*/
77
78/*
79 * I2C register on PLD
80 */
81#define PLDI2CCR __reg32(M32700UT_LAN_BASE + 0x40040)
82#define PLDI2CCR_ES0 0x00000001 /* enable I2C interface */
83#define PLDI2CMOD __reg32(M32700UT_LAN_BASE + 0x40044)
84#define PLDI2CMOD_ACKCLK 0x00000200
85#define PLDI2CMOD_DTWD 0x00000100
86#define PLDI2CMOD_10BT 0x00000004
87#define PLDI2CMOD_ATM_NORMAL 0x00000000
88#define PLDI2CMOD_ATM_AUTO 0x00000003
89#define PLDI2CACK __reg32(M32700UT_LAN_BASE + 0x40048)
90#define PLDI2CACK_ACK 0x00000001
91#define PLDI2CFREQ __reg32(M32700UT_LAN_BASE + 0x4004c)
92#define PLDI2CCND __reg32(M32700UT_LAN_BASE + 0x40050)
93#define PLDI2CCND_START 0x00000001
94#define PLDI2CCND_STOP 0x00000002
95#define PLDI2CSTEN __reg32(M32700UT_LAN_BASE + 0x40054)
96#define PLDI2CSTEN_STEN 0x00000001
97#define PLDI2CDATA __reg32(M32700UT_LAN_BASE + 0x40060)
98#define PLDI2CSTS __reg32(M32700UT_LAN_BASE + 0x40064)
99#define PLDI2CSTS_TRX 0x00000020
100#define PLDI2CSTS_BB 0x00000010
101#define PLDI2CSTS_NOACK 0x00000001 /* 0:ack, 1:noack */
102
103#endif /* _M32700UT_M32700UT_LAN_H */
diff --git a/arch/m32r/include/asm/m32700ut/m32700ut_lcd.h b/arch/m32r/include/asm/m32700ut/m32700ut_lcd.h
new file mode 100644
index 000000000000..4c2489079788
--- /dev/null
+++ b/arch/m32r/include/asm/m32700ut/m32700ut_lcd.h
@@ -0,0 +1,55 @@
1#ifndef _M32700UT_M32700UT_LCD_H
2#define _M32700UT_M32700UT_LCD_H
3
4/*
5 * include/asm-m32r/m32700ut/m32700ut_lcd.h
6 *
7 * M32700UT-LCD board
8 *
9 * Copyright (c) 2002 Takeo Takahashi
10 *
11 * This file is subject to the terms and conditions of the GNU General
12 * Public License. See the file "COPYING" in the main directory of
13 * this archive for more details.
14 */
15
16#ifndef __ASSEMBLY__
17/*
18 * C functions use non-cache address.
19 */
20#define M32700UT_LCD_BASE (0x10000000 /* + NONCACHE_OFFSET */)
21#else
22#define M32700UT_LCD_BASE (0x10000000 + NONCACHE_OFFSET)
23#endif /* __ASSEMBLY__ */
24
25/*
26 * ICU
27 */
28#define M32700UT_LCD_IRQ_BAT_INT (M32700UT_LCD_PLD_IRQ_BASE + 1)
29#define M32700UT_LCD_IRQ_USB_INT1 (M32700UT_LCD_PLD_IRQ_BASE + 2)
30#define M32700UT_LCD_IRQ_AUDT0 (M32700UT_LCD_PLD_IRQ_BASE + 3)
31#define M32700UT_LCD_IRQ_AUDT2 (M32700UT_LCD_PLD_IRQ_BASE + 4)
32#define M32700UT_LCD_IRQ_BATSIO_RCV (M32700UT_LCD_PLD_IRQ_BASE + 16)
33#define M32700UT_LCD_IRQ_BATSIO_SND (M32700UT_LCD_PLD_IRQ_BASE + 17)
34#define M32700UT_LCD_IRQ_ASNDSIO_RCV (M32700UT_LCD_PLD_IRQ_BASE + 18)
35#define M32700UT_LCD_IRQ_ASNDSIO_SND (M32700UT_LCD_PLD_IRQ_BASE + 19)
36#define M32700UT_LCD_IRQ_ACNLSIO_SND (M32700UT_LCD_PLD_IRQ_BASE + 21)
37
38#define M32700UT_LCD_ICUISTS __reg16(M32700UT_LCD_BASE + 0x300002)
39#define M32700UT_LCD_ICUISTS_VECB_MASK (0xf000)
40#define M32700UT_LCD_VECB(x) ((x) & M32700UT_LCD_ICUISTS_VECB_MASK)
41#define M32700UT_LCD_ICUISTS_ISN_MASK (0x07c0)
42#define M32700UT_LCD_ICUISTS_ISN(x) ((x) & M32700UT_LCD_ICUISTS_ISN_MASK)
43#define M32700UT_LCD_ICUIREQ0 __reg16(M32700UT_LCD_BASE + 0x300004)
44#define M32700UT_LCD_ICUIREQ1 __reg16(M32700UT_LCD_BASE + 0x300006)
45#define M32700UT_LCD_ICUCR1 __reg16(M32700UT_LCD_BASE + 0x300020)
46#define M32700UT_LCD_ICUCR2 __reg16(M32700UT_LCD_BASE + 0x300022)
47#define M32700UT_LCD_ICUCR3 __reg16(M32700UT_LCD_BASE + 0x300024)
48#define M32700UT_LCD_ICUCR4 __reg16(M32700UT_LCD_BASE + 0x300026)
49#define M32700UT_LCD_ICUCR16 __reg16(M32700UT_LCD_BASE + 0x300030)
50#define M32700UT_LCD_ICUCR17 __reg16(M32700UT_LCD_BASE + 0x300032)
51#define M32700UT_LCD_ICUCR18 __reg16(M32700UT_LCD_BASE + 0x300034)
52#define M32700UT_LCD_ICUCR19 __reg16(M32700UT_LCD_BASE + 0x300036)
53#define M32700UT_LCD_ICUCR21 __reg16(M32700UT_LCD_BASE + 0x30003a)
54
55#endif /* _M32700UT_M32700UT_LCD_H */
diff --git a/arch/m32r/include/asm/m32700ut/m32700ut_pld.h b/arch/m32r/include/asm/m32700ut/m32700ut_pld.h
new file mode 100644
index 000000000000..57623beb44cb
--- /dev/null
+++ b/arch/m32r/include/asm/m32700ut/m32700ut_pld.h
@@ -0,0 +1,259 @@
1#ifndef _M32700UT_M32700UT_PLD_H
2#define _M32700UT_M32700UT_PLD_H
3
4/*
5 * include/asm-m32r/m32700ut/m32700ut_pld.h
6 *
7 * Definitions for Programable Logic Device(PLD) on M32700UT board.
8 *
9 * Copyright (c) 2002 Takeo Takahashi
10 *
11 * This file is subject to the terms and conditions of the GNU General
12 * Public License. See the file "COPYING" in the main directory of
13 * this archive for more details.
14 */
15
16#if defined(CONFIG_PLAT_M32700UT) || defined(CONFIG_PLAT_USRV)
17#define PLD_PLAT_BASE 0x04c00000
18#else
19#error "no platform configuration"
20#endif
21
22#ifndef __ASSEMBLY__
23/*
24 * C functions use non-cache address.
25 */
26#define PLD_BASE (PLD_PLAT_BASE /* + NONCACHE_OFFSET */)
27#define __reg8 (volatile unsigned char *)
28#define __reg16 (volatile unsigned short *)
29#define __reg32 (volatile unsigned int *)
30#else
31#define PLD_BASE (PLD_PLAT_BASE + NONCACHE_OFFSET)
32#define __reg8
33#define __reg16
34#define __reg32
35#endif /* __ASSEMBLY__ */
36
37/* CFC */
38#define PLD_CFRSTCR __reg16(PLD_BASE + 0x0000)
39#define PLD_CFSTS __reg16(PLD_BASE + 0x0002)
40#define PLD_CFIMASK __reg16(PLD_BASE + 0x0004)
41#define PLD_CFBUFCR __reg16(PLD_BASE + 0x0006)
42#define PLD_CFVENCR __reg16(PLD_BASE + 0x0008)
43#define PLD_CFCR0 __reg16(PLD_BASE + 0x000a)
44#define PLD_CFCR1 __reg16(PLD_BASE + 0x000c)
45#define PLD_IDERSTCR __reg16(PLD_BASE + 0x0010)
46
47/* MMC */
48#define PLD_MMCCR __reg16(PLD_BASE + 0x4000)
49#define PLD_MMCMOD __reg16(PLD_BASE + 0x4002)
50#define PLD_MMCSTS __reg16(PLD_BASE + 0x4006)
51#define PLD_MMCBAUR __reg16(PLD_BASE + 0x400a)
52#define PLD_MMCCMDBCUT __reg16(PLD_BASE + 0x400c)
53#define PLD_MMCCDTBCUT __reg16(PLD_BASE + 0x400e)
54#define PLD_MMCDET __reg16(PLD_BASE + 0x4010)
55#define PLD_MMCWP __reg16(PLD_BASE + 0x4012)
56#define PLD_MMCWDATA __reg16(PLD_BASE + 0x5000)
57#define PLD_MMCRDATA __reg16(PLD_BASE + 0x6000)
58#define PLD_MMCCMDDATA __reg16(PLD_BASE + 0x7000)
59#define PLD_MMCRSPDATA __reg16(PLD_BASE + 0x7006)
60
61/* ICU
62 * ICUISTS: status register
63 * ICUIREQ0: request register
64 * ICUIREQ1: request register
65 * ICUCR3: control register for CFIREQ# interrupt
66 * ICUCR4: control register for CFC Card insert interrupt
67 * ICUCR5: control register for CFC Card eject interrupt
68 * ICUCR6: control register for external interrupt
69 * ICUCR11: control register for MMC Card insert/eject interrupt
70 * ICUCR13: control register for SC error interrupt
71 * ICUCR14: control register for SC receive interrupt
72 * ICUCR15: control register for SC send interrupt
73 * ICUCR16: control register for SIO0 receive interrupt
74 * ICUCR17: control register for SIO0 send interrupt
75 */
76#if !defined(CONFIG_PLAT_USRV)
77#define PLD_IRQ_INT0 (M32700UT_PLD_IRQ_BASE + 0) /* None */
78#define PLD_IRQ_INT1 (M32700UT_PLD_IRQ_BASE + 1) /* reserved */
79#define PLD_IRQ_INT2 (M32700UT_PLD_IRQ_BASE + 2) /* reserved */
80#define PLD_IRQ_CFIREQ (M32700UT_PLD_IRQ_BASE + 3) /* CF IREQ */
81#define PLD_IRQ_CFC_INSERT (M32700UT_PLD_IRQ_BASE + 4) /* CF Insert */
82#define PLD_IRQ_CFC_EJECT (M32700UT_PLD_IRQ_BASE + 5) /* CF Eject */
83#define PLD_IRQ_EXINT (M32700UT_PLD_IRQ_BASE + 6) /* EXINT */
84#define PLD_IRQ_INT7 (M32700UT_PLD_IRQ_BASE + 7) /* reserved */
85#define PLD_IRQ_INT8 (M32700UT_PLD_IRQ_BASE + 8) /* reserved */
86#define PLD_IRQ_INT9 (M32700UT_PLD_IRQ_BASE + 9) /* reserved */
87#define PLD_IRQ_INT10 (M32700UT_PLD_IRQ_BASE + 10) /* reserved */
88#define PLD_IRQ_MMCCARD (M32700UT_PLD_IRQ_BASE + 11) /* MMC Insert/Eject */
89#define PLD_IRQ_INT12 (M32700UT_PLD_IRQ_BASE + 12) /* reserved */
90#define PLD_IRQ_SC_ERROR (M32700UT_PLD_IRQ_BASE + 13) /* SC error */
91#define PLD_IRQ_SC_RCV (M32700UT_PLD_IRQ_BASE + 14) /* SC receive */
92#define PLD_IRQ_SC_SND (M32700UT_PLD_IRQ_BASE + 15) /* SC send */
93#define PLD_IRQ_SIO0_RCV (M32700UT_PLD_IRQ_BASE + 16) /* SIO receive */
94#define PLD_IRQ_SIO0_SND (M32700UT_PLD_IRQ_BASE + 17) /* SIO send */
95#define PLD_IRQ_INT18 (M32700UT_PLD_IRQ_BASE + 18) /* reserved */
96#define PLD_IRQ_INT19 (M32700UT_PLD_IRQ_BASE + 19) /* reserved */
97#define PLD_IRQ_INT20 (M32700UT_PLD_IRQ_BASE + 20) /* reserved */
98#define PLD_IRQ_INT21 (M32700UT_PLD_IRQ_BASE + 21) /* reserved */
99#define PLD_IRQ_INT22 (M32700UT_PLD_IRQ_BASE + 22) /* reserved */
100#define PLD_IRQ_INT23 (M32700UT_PLD_IRQ_BASE + 23) /* reserved */
101#define PLD_IRQ_INT24 (M32700UT_PLD_IRQ_BASE + 24) /* reserved */
102#define PLD_IRQ_INT25 (M32700UT_PLD_IRQ_BASE + 25) /* reserved */
103#define PLD_IRQ_INT26 (M32700UT_PLD_IRQ_BASE + 26) /* reserved */
104#define PLD_IRQ_INT27 (M32700UT_PLD_IRQ_BASE + 27) /* reserved */
105#define PLD_IRQ_INT28 (M32700UT_PLD_IRQ_BASE + 28) /* reserved */
106#define PLD_IRQ_INT29 (M32700UT_PLD_IRQ_BASE + 29) /* reserved */
107#define PLD_IRQ_INT30 (M32700UT_PLD_IRQ_BASE + 30) /* reserved */
108#define PLD_IRQ_INT31 (M32700UT_PLD_IRQ_BASE + 31) /* reserved */
109
110#else /* CONFIG_PLAT_USRV */
111
112#define PLD_IRQ_INT0 (M32700UT_PLD_IRQ_BASE + 0) /* None */
113#define PLD_IRQ_INT1 (M32700UT_PLD_IRQ_BASE + 1) /* reserved */
114#define PLD_IRQ_INT2 (M32700UT_PLD_IRQ_BASE + 2) /* reserved */
115#define PLD_IRQ_CF0 (M32700UT_PLD_IRQ_BASE + 3) /* CF0# */
116#define PLD_IRQ_CF1 (M32700UT_PLD_IRQ_BASE + 4) /* CF1# */
117#define PLD_IRQ_CF2 (M32700UT_PLD_IRQ_BASE + 5) /* CF2# */
118#define PLD_IRQ_CF3 (M32700UT_PLD_IRQ_BASE + 6) /* CF3# */
119#define PLD_IRQ_CF4 (M32700UT_PLD_IRQ_BASE + 7) /* CF4# */
120#define PLD_IRQ_INT8 (M32700UT_PLD_IRQ_BASE + 8) /* reserved */
121#define PLD_IRQ_INT9 (M32700UT_PLD_IRQ_BASE + 9) /* reserved */
122#define PLD_IRQ_INT10 (M32700UT_PLD_IRQ_BASE + 10) /* reserved */
123#define PLD_IRQ_INT11 (M32700UT_PLD_IRQ_BASE + 11) /* reserved */
124#define PLD_IRQ_UART0 (M32700UT_PLD_IRQ_BASE + 12) /* UARTIRQ0 */
125#define PLD_IRQ_UART1 (M32700UT_PLD_IRQ_BASE + 13) /* UARTIRQ1 */
126#define PLD_IRQ_INT14 (M32700UT_PLD_IRQ_BASE + 14) /* reserved */
127#define PLD_IRQ_INT15 (M32700UT_PLD_IRQ_BASE + 15) /* reserved */
128#define PLD_IRQ_SNDINT (M32700UT_PLD_IRQ_BASE + 16) /* SNDINT# */
129#define PLD_IRQ_INT17 (M32700UT_PLD_IRQ_BASE + 17) /* reserved */
130#define PLD_IRQ_INT18 (M32700UT_PLD_IRQ_BASE + 18) /* reserved */
131#define PLD_IRQ_INT19 (M32700UT_PLD_IRQ_BASE + 19) /* reserved */
132#define PLD_IRQ_INT20 (M32700UT_PLD_IRQ_BASE + 20) /* reserved */
133#define PLD_IRQ_INT21 (M32700UT_PLD_IRQ_BASE + 21) /* reserved */
134#define PLD_IRQ_INT22 (M32700UT_PLD_IRQ_BASE + 22) /* reserved */
135#define PLD_IRQ_INT23 (M32700UT_PLD_IRQ_BASE + 23) /* reserved */
136#define PLD_IRQ_INT24 (M32700UT_PLD_IRQ_BASE + 24) /* reserved */
137#define PLD_IRQ_INT25 (M32700UT_PLD_IRQ_BASE + 25) /* reserved */
138#define PLD_IRQ_INT26 (M32700UT_PLD_IRQ_BASE + 26) /* reserved */
139#define PLD_IRQ_INT27 (M32700UT_PLD_IRQ_BASE + 27) /* reserved */
140#define PLD_IRQ_INT28 (M32700UT_PLD_IRQ_BASE + 28) /* reserved */
141#define PLD_IRQ_INT29 (M32700UT_PLD_IRQ_BASE + 29) /* reserved */
142#define PLD_IRQ_INT30 (M32700UT_PLD_IRQ_BASE + 30) /* reserved */
143
144#endif /* CONFIG_PLAT_USRV */
145
146#define PLD_ICUISTS __reg16(PLD_BASE + 0x8002)
147#define PLD_ICUISTS_VECB_MASK (0xf000)
148#define PLD_ICUISTS_VECB(x) ((x) & PLD_ICUISTS_VECB_MASK)
149#define PLD_ICUISTS_ISN_MASK (0x07c0)
150#define PLD_ICUISTS_ISN(x) ((x) & PLD_ICUISTS_ISN_MASK)
151#define PLD_ICUIREQ0 __reg16(PLD_BASE + 0x8004)
152#define PLD_ICUIREQ1 __reg16(PLD_BASE + 0x8006)
153#define PLD_ICUCR1 __reg16(PLD_BASE + 0x8100)
154#define PLD_ICUCR2 __reg16(PLD_BASE + 0x8102)
155#define PLD_ICUCR3 __reg16(PLD_BASE + 0x8104)
156#define PLD_ICUCR4 __reg16(PLD_BASE + 0x8106)
157#define PLD_ICUCR5 __reg16(PLD_BASE + 0x8108)
158#define PLD_ICUCR6 __reg16(PLD_BASE + 0x810a)
159#define PLD_ICUCR7 __reg16(PLD_BASE + 0x810c)
160#define PLD_ICUCR8 __reg16(PLD_BASE + 0x810e)
161#define PLD_ICUCR9 __reg16(PLD_BASE + 0x8110)
162#define PLD_ICUCR10 __reg16(PLD_BASE + 0x8112)
163#define PLD_ICUCR11 __reg16(PLD_BASE + 0x8114)
164#define PLD_ICUCR12 __reg16(PLD_BASE + 0x8116)
165#define PLD_ICUCR13 __reg16(PLD_BASE + 0x8118)
166#define PLD_ICUCR14 __reg16(PLD_BASE + 0x811a)
167#define PLD_ICUCR15 __reg16(PLD_BASE + 0x811c)
168#define PLD_ICUCR16 __reg16(PLD_BASE + 0x811e)
169#define PLD_ICUCR17 __reg16(PLD_BASE + 0x8120)
170#define PLD_ICUCR_IEN (0x1000)
171#define PLD_ICUCR_IREQ (0x0100)
172#define PLD_ICUCR_ISMOD00 (0x0000) /* Low edge */
173#define PLD_ICUCR_ISMOD01 (0x0010) /* Low level */
174#define PLD_ICUCR_ISMOD02 (0x0020) /* High edge */
175#define PLD_ICUCR_ISMOD03 (0x0030) /* High level */
176#define PLD_ICUCR_ILEVEL0 (0x0000)
177#define PLD_ICUCR_ILEVEL1 (0x0001)
178#define PLD_ICUCR_ILEVEL2 (0x0002)
179#define PLD_ICUCR_ILEVEL3 (0x0003)
180#define PLD_ICUCR_ILEVEL4 (0x0004)
181#define PLD_ICUCR_ILEVEL5 (0x0005)
182#define PLD_ICUCR_ILEVEL6 (0x0006)
183#define PLD_ICUCR_ILEVEL7 (0x0007)
184
185/* Power Control of MMC and CF */
186#define PLD_CPCR __reg16(PLD_BASE + 0x14000)
187#define PLD_CPCR_CF 0x0001
188#define PLD_CPCR_MMC 0x0002
189
190/* LED Control
191 *
192 * 1: DIP swich side
193 * 2: Reset switch side
194 */
195#define PLD_IOLEDCR __reg16(PLD_BASE + 0x14002)
196#define PLD_IOLED_1_ON 0x001
197#define PLD_IOLED_1_OFF 0x000
198#define PLD_IOLED_2_ON 0x002
199#define PLD_IOLED_2_OFF 0x000
200
201/* DIP Switch
202 * 0: Write-protect of Flash Memory (0:protected, 1:non-protected)
203 * 1: -
204 * 2: -
205 * 3: -
206 */
207#define PLD_IOSWSTS __reg16(PLD_BASE + 0x14004)
208#define PLD_IOSWSTS_IOSW2 0x0200
209#define PLD_IOSWSTS_IOSW1 0x0100
210#define PLD_IOSWSTS_IOWP0 0x0001
211
212/* CRC */
213#define PLD_CRC7DATA __reg16(PLD_BASE + 0x18000)
214#define PLD_CRC7INDATA __reg16(PLD_BASE + 0x18002)
215#define PLD_CRC16DATA __reg16(PLD_BASE + 0x18004)
216#define PLD_CRC16INDATA __reg16(PLD_BASE + 0x18006)
217#define PLD_CRC16ADATA __reg16(PLD_BASE + 0x18008)
218#define PLD_CRC16AINDATA __reg16(PLD_BASE + 0x1800a)
219
220/* RTC */
221#define PLD_RTCCR __reg16(PLD_BASE + 0x1c000)
222#define PLD_RTCBAUR __reg16(PLD_BASE + 0x1c002)
223#define PLD_RTCWRDATA __reg16(PLD_BASE + 0x1c004)
224#define PLD_RTCRDDATA __reg16(PLD_BASE + 0x1c006)
225#define PLD_RTCRSTODT __reg16(PLD_BASE + 0x1c008)
226
227/* SIO0 */
228#define PLD_ESIO0CR __reg16(PLD_BASE + 0x20000)
229#define PLD_ESIO0CR_TXEN 0x0001
230#define PLD_ESIO0CR_RXEN 0x0002
231#define PLD_ESIO0MOD0 __reg16(PLD_BASE + 0x20002)
232#define PLD_ESIO0MOD0_CTSS 0x0040
233#define PLD_ESIO0MOD0_RTSS 0x0080
234#define PLD_ESIO0MOD1 __reg16(PLD_BASE + 0x20004)
235#define PLD_ESIO0MOD1_LMFS 0x0010
236#define PLD_ESIO0STS __reg16(PLD_BASE + 0x20006)
237#define PLD_ESIO0STS_TEMP 0x0001
238#define PLD_ESIO0STS_TXCP 0x0002
239#define PLD_ESIO0STS_RXCP 0x0004
240#define PLD_ESIO0STS_TXSC 0x0100
241#define PLD_ESIO0STS_RXSC 0x0200
242#define PLD_ESIO0STS_TXREADY (PLD_ESIO0STS_TXCP | PLD_ESIO0STS_TEMP)
243#define PLD_ESIO0INTCR __reg16(PLD_BASE + 0x20008)
244#define PLD_ESIO0INTCR_TXIEN 0x0002
245#define PLD_ESIO0INTCR_RXCEN 0x0004
246#define PLD_ESIO0BAUR __reg16(PLD_BASE + 0x2000a)
247#define PLD_ESIO0TXB __reg16(PLD_BASE + 0x2000c)
248#define PLD_ESIO0RXB __reg16(PLD_BASE + 0x2000e)
249
250/* SIM Card */
251#define PLD_SCCR __reg16(PLD_BASE + 0x38000)
252#define PLD_SCMOD __reg16(PLD_BASE + 0x38004)
253#define PLD_SCSTS __reg16(PLD_BASE + 0x38006)
254#define PLD_SCINTCR __reg16(PLD_BASE + 0x38008)
255#define PLD_SCBAUR __reg16(PLD_BASE + 0x3800a)
256#define PLD_SCTXB __reg16(PLD_BASE + 0x3800c)
257#define PLD_SCRXB __reg16(PLD_BASE + 0x3800e)
258
259#endif /* _M32700UT_M32700UT_PLD.H */
diff --git a/arch/m32r/include/asm/m32r.h b/arch/m32r/include/asm/m32r.h
new file mode 100644
index 000000000000..214b44b40757
--- /dev/null
+++ b/arch/m32r/include/asm/m32r.h
@@ -0,0 +1,160 @@
1#ifndef _ASM_M32R_M32R_H_
2#define _ASM_M32R_M32R_H_
3
4/*
5 * Renesas M32R processor
6 *
7 * Copyright (C) 2003, 2004 Renesas Technology Corp.
8 */
9
10
11/* Chip type */
12#if defined(CONFIG_CHIP_XNUX_MP) || defined(CONFIG_CHIP_XNUX2_MP)
13#include <asm/m32r_mp_fpga.h>
14#elif defined(CONFIG_CHIP_VDEC2) || defined(CONFIG_CHIP_XNUX2) \
15 || defined(CONFIG_CHIP_M32700) || defined(CONFIG_CHIP_M32102) \
16 || defined(CONFIG_CHIP_OPSP) || defined(CONFIG_CHIP_M32104)
17#include <asm/m32102.h>
18#endif
19
20/* Platform type */
21#if defined(CONFIG_PLAT_M32700UT)
22#include <asm/m32700ut/m32700ut_pld.h>
23#include <asm/m32700ut/m32700ut_lan.h>
24#include <asm/m32700ut/m32700ut_lcd.h>
25/* for ei_handler:linux/arch/m32r/kernel/entry.S */
26#define M32R_INT1ICU_ISTS PLD_ICUISTS
27#define M32R_INT1ICU_IRQ_BASE M32700UT_PLD_IRQ_BASE
28#define M32R_INT0ICU_ISTS M32700UT_LAN_ICUISTS
29#define M32R_INT0ICU_IRQ_BASE M32700UT_LAN_PLD_IRQ_BASE
30#define M32R_INT2ICU_ISTS M32700UT_LCD_ICUISTS
31#define M32R_INT2ICU_IRQ_BASE M32700UT_LCD_PLD_IRQ_BASE
32#endif /* CONFIG_PLAT_M32700UT */
33
34#if defined(CONFIG_PLAT_OPSPUT)
35#include <asm/opsput/opsput_pld.h>
36#include <asm/opsput/opsput_lan.h>
37#include <asm/opsput/opsput_lcd.h>
38/* for ei_handler:linux/arch/m32r/kernel/entry.S */
39#define M32R_INT1ICU_ISTS PLD_ICUISTS
40#define M32R_INT1ICU_IRQ_BASE OPSPUT_PLD_IRQ_BASE
41#define M32R_INT0ICU_ISTS OPSPUT_LAN_ICUISTS
42#define M32R_INT0ICU_IRQ_BASE OPSPUT_LAN_PLD_IRQ_BASE
43#define M32R_INT2ICU_ISTS OPSPUT_LCD_ICUISTS
44#define M32R_INT2ICU_IRQ_BASE OPSPUT_LCD_PLD_IRQ_BASE
45#endif /* CONFIG_PLAT_OPSPUT */
46
47#if defined(CONFIG_PLAT_MAPPI2)
48#include <asm/mappi2/mappi2_pld.h>
49#endif /* CONFIG_PLAT_MAPPI2 */
50
51#if defined(CONFIG_PLAT_MAPPI3)
52#include <asm/mappi3/mappi3_pld.h>
53#endif /* CONFIG_PLAT_MAPPI3 */
54
55#if defined(CONFIG_PLAT_USRV)
56#include <asm/m32700ut/m32700ut_pld.h>
57/* for ei_handler:linux/arch/m32r/kernel/entry.S */
58#define M32R_INT1ICU_ISTS PLD_ICUISTS
59#define M32R_INT1ICU_IRQ_BASE M32700UT_PLD_IRQ_BASE
60#endif
61
62#if defined(CONFIG_PLAT_M32104UT)
63#include <asm/m32104ut/m32104ut_pld.h>
64/* for ei_handler:linux/arch/m32r/kernel/entry.S */
65#define M32R_INT1ICU_ISTS PLD_ICUISTS
66#define M32R_INT1ICU_IRQ_BASE M32104UT_PLD_IRQ_BASE
67#endif /* CONFIG_PLAT_M32104 */
68
69/*
70 * M32R Register
71 */
72
73/*
74 * MMU Register
75 */
76
77#define MMU_REG_BASE (0xffff0000)
78#define ITLB_BASE (0xfe000000)
79#define DTLB_BASE (0xfe000800)
80
81#define NR_TLB_ENTRIES CONFIG_TLB_ENTRIES
82
83#define MATM MMU_REG_BASE /* MMU Address Translation Mode
84 Register */
85#define MPSZ (0x04 + MMU_REG_BASE) /* MMU Page Size Designation Register */
86#define MASID (0x08 + MMU_REG_BASE) /* MMU Address Space ID Register */
87#define MESTS (0x0c + MMU_REG_BASE) /* MMU Exception Status Register */
88#define MDEVA (0x10 + MMU_REG_BASE) /* MMU Operand Exception Virtual
89 Address Register */
90#define MDEVP (0x14 + MMU_REG_BASE) /* MMU Operand Exception Virtual Page
91 Number Register */
92#define MPTB (0x18 + MMU_REG_BASE) /* MMU Page Table Base Register */
93#define MSVA (0x20 + MMU_REG_BASE) /* MMU Search Virtual Address
94 Register */
95#define MTOP (0x24 + MMU_REG_BASE) /* MMU TLB Operation Register */
96#define MIDXI (0x28 + MMU_REG_BASE) /* MMU Index Register for
97 Instruciton */
98#define MIDXD (0x2c + MMU_REG_BASE) /* MMU Index Register for Operand */
99
100#define MATM_offset (MATM - MMU_REG_BASE)
101#define MPSZ_offset (MPSZ - MMU_REG_BASE)
102#define MASID_offset (MASID - MMU_REG_BASE)
103#define MESTS_offset (MESTS - MMU_REG_BASE)
104#define MDEVA_offset (MDEVA - MMU_REG_BASE)
105#define MDEVP_offset (MDEVP - MMU_REG_BASE)
106#define MPTB_offset (MPTB - MMU_REG_BASE)
107#define MSVA_offset (MSVA - MMU_REG_BASE)
108#define MTOP_offset (MTOP - MMU_REG_BASE)
109#define MIDXI_offset (MIDXI - MMU_REG_BASE)
110#define MIDXD_offset (MIDXD - MMU_REG_BASE)
111
112#define MESTS_IT (1 << 0) /* Instruction TLB miss */
113#define MESTS_IA (1 << 1) /* Instruction Access Exception */
114#define MESTS_DT (1 << 4) /* Operand TLB miss */
115#define MESTS_DA (1 << 5) /* Operand Access Exception */
116#define MESTS_DRW (1 << 6) /* Operand Write Exception Flag */
117
118/*
119 * PSW (Processor Status Word)
120 */
121
122/* PSW bit */
123#define M32R_PSW_BIT_SM (7) /* Stack Mode */
124#define M32R_PSW_BIT_IE (6) /* Interrupt Enable */
125#define M32R_PSW_BIT_PM (3) /* Processor Mode [0:Supervisor,1:User] */
126#define M32R_PSW_BIT_C (0) /* Condition */
127#define M32R_PSW_BIT_BSM (7+8) /* Backup Stack Mode */
128#define M32R_PSW_BIT_BIE (6+8) /* Backup Interrupt Enable */
129#define M32R_PSW_BIT_BPM (3+8) /* Backup Processor Mode */
130#define M32R_PSW_BIT_BC (0+8) /* Backup Condition */
131
132/* PSW bit map */
133#define M32R_PSW_SM (1UL<< M32R_PSW_BIT_SM) /* Stack Mode */
134#define M32R_PSW_IE (1UL<< M32R_PSW_BIT_IE) /* Interrupt Enable */
135#define M32R_PSW_PM (1UL<< M32R_PSW_BIT_PM) /* Processor Mode */
136#define M32R_PSW_C (1UL<< M32R_PSW_BIT_C) /* Condition */
137#define M32R_PSW_BSM (1UL<< M32R_PSW_BIT_BSM) /* Backup Stack Mode */
138#define M32R_PSW_BIE (1UL<< M32R_PSW_BIT_BIE) /* Backup Interrupt Enable */
139#define M32R_PSW_BPM (1UL<< M32R_PSW_BIT_BPM) /* Backup Processor Mode */
140#define M32R_PSW_BC (1UL<< M32R_PSW_BIT_BC) /* Backup Condition */
141
142/*
143 * Direct address to SFR
144 */
145
146#include <asm/page.h>
147#ifdef CONFIG_MMU
148#define NONCACHE_OFFSET (__PAGE_OFFSET + 0x20000000)
149#else
150#define NONCACHE_OFFSET __PAGE_OFFSET
151#endif /* CONFIG_MMU */
152
153#define M32R_ICU_ISTS_ADDR M32R_ICU_ISTS_PORTL+NONCACHE_OFFSET
154#define M32R_ICU_IPICR_ADDR M32R_ICU_IPICR0_PORTL+NONCACHE_OFFSET
155#define M32R_ICU_IMASK_ADDR M32R_ICU_IMASK_PORTL+NONCACHE_OFFSET
156#define M32R_FPGA_CPU_NAME_ADDR M32R_FPGA_CPU_NAME0_PORTL+NONCACHE_OFFSET
157#define M32R_FPGA_MODEL_ID_ADDR M32R_FPGA_MODEL_ID0_PORTL+NONCACHE_OFFSET
158#define M32R_FPGA_VERSION_ADDR M32R_FPGA_VERSION0_PORTL+NONCACHE_OFFSET
159
160#endif /* _ASM_M32R_M32R_H_ */
diff --git a/arch/m32r/include/asm/m32r_mp_fpga.h b/arch/m32r/include/asm/m32r_mp_fpga.h
new file mode 100644
index 000000000000..976d2b995919
--- /dev/null
+++ b/arch/m32r/include/asm/m32r_mp_fpga.h
@@ -0,0 +1,313 @@
1#ifndef _ASM_M32R_M32R_MP_FPGA_
2#define _ASM_M32R_M32R_MP_FPGA_
3
4/*
5 * Renesas M32R-MP-FPGA
6 *
7 * Copyright (c) 2002 Hitoshi Yamamoto
8 * Copyright (c) 2003, 2004 Renesas Technology Corp.
9 */
10
11/*
12 * ========================================================
13 * M32R-MP-FPGA Memory Map
14 * ========================================================
15 * 0x00000000 : Block#0 : 64[MB]
16 * 0x03E00000 : SFR
17 * 0x03E00000 : reserved
18 * 0x03EF0000 : FPGA
19 * 0x03EF1000 : reserved
20 * 0x03EF4000 : CKM
21 * 0x03EF4000 : BSELC
22 * 0x03EF5000 : reserved
23 * 0x03EFC000 : MFT
24 * 0x03EFD000 : SIO
25 * 0x03EFE000 : reserved
26 * 0x03EFF000 : ICU
27 * 0x03F00000 : Internal SRAM 64[KB]
28 * 0x03F10000 : reserved
29 * --------------------------------------------------------
30 * 0x04000000 : Block#1 : 64[MB]
31 * 0x04000000 : Debug board SRAM 4[MB]
32 * 0x04400000 : reserved
33 * --------------------------------------------------------
34 * 0x08000000 : Block#2 : 64[MB]
35 * --------------------------------------------------------
36 * 0x0C000000 : Block#3 : 64[MB]
37 * --------------------------------------------------------
38 * 0x10000000 : Block#4 : 64[MB]
39 * --------------------------------------------------------
40 * 0x14000000 : Block#5 : 64[MB]
41 * --------------------------------------------------------
42 * 0x18000000 : Block#6 : 64[MB]
43 * --------------------------------------------------------
44 * 0x1C000000 : Block#7 : 64[MB]
45 * --------------------------------------------------------
46 * 0xFE000000 : TLB
47 * 0xFE000000 : ITLB
48 * 0xFE000080 : reserved
49 * 0xFE000800 : DTLB
50 * 0xFE000880 : reserved
51 * --------------------------------------------------------
52 * 0xFF000000 : System area
53 * 0xFFFF0000 : MMU
54 * 0xFFFF0030 : reserved
55 * 0xFFFF8000 : Debug function
56 * 0xFFFFA000 : reserved
57 * 0xFFFFC000 : CPU control
58 * 0xFFFFFFFF
59 * ========================================================
60 */
61
62/*======================================================================*
63 * Special Function Register
64 *======================================================================*/
65#define M32R_SFR_OFFSET (0x00E00000) /* 0x03E00000-0x03EFFFFF 1[MB] */
66
67/*
68 * FPGA registers.
69 */
70#define M32R_FPGA_TOP (0x000F0000+M32R_SFR_OFFSET)
71
72#define M32R_FPGA_NUM_OF_CPUS_PORTL (0x00+M32R_FPGA_TOP)
73#define M32R_FPGA_CPU_NAME0_PORTL (0x10+M32R_FPGA_TOP)
74#define M32R_FPGA_CPU_NAME1_PORTL (0x14+M32R_FPGA_TOP)
75#define M32R_FPGA_CPU_NAME2_PORTL (0x18+M32R_FPGA_TOP)
76#define M32R_FPGA_CPU_NAME3_PORTL (0x1C+M32R_FPGA_TOP)
77#define M32R_FPGA_MODEL_ID0_PORTL (0x20+M32R_FPGA_TOP)
78#define M32R_FPGA_MODEL_ID1_PORTL (0x24+M32R_FPGA_TOP)
79#define M32R_FPGA_MODEL_ID2_PORTL (0x28+M32R_FPGA_TOP)
80#define M32R_FPGA_MODEL_ID3_PORTL (0x2C+M32R_FPGA_TOP)
81#define M32R_FPGA_VERSION0_PORTL (0x30+M32R_FPGA_TOP)
82#define M32R_FPGA_VERSION1_PORTL (0x34+M32R_FPGA_TOP)
83
84/*
85 * Clock and Power Manager registers.
86 */
87#define M32R_CPM_OFFSET (0x000F4000+M32R_SFR_OFFSET)
88
89#define M32R_CPM_CPUCLKCR_PORTL (0x00+M32R_CPM_OFFSET)
90#define M32R_CPM_CLKMOD_PORTL (0x04+M32R_CPM_OFFSET)
91#define M32R_CPM_PLLCR_PORTL (0x08+M32R_CPM_OFFSET)
92
93/*
94 * Block SELect Controller registers.
95 */
96#define M32R_BSELC_OFFSET (0x000F5000+M32R_SFR_OFFSET)
97
98#define M32R_BSEL0_CR0_PORTL (0x000+M32R_BSELC_OFFSET)
99#define M32R_BSEL0_CR1_PORTL (0x004+M32R_BSELC_OFFSET)
100#define M32R_BSEL1_CR0_PORTL (0x100+M32R_BSELC_OFFSET)
101#define M32R_BSEL1_CR1_PORTL (0x104+M32R_BSELC_OFFSET)
102#define M32R_BSEL2_CR0_PORTL (0x200+M32R_BSELC_OFFSET)
103#define M32R_BSEL2_CR1_PORTL (0x204+M32R_BSELC_OFFSET)
104#define M32R_BSEL3_CR0_PORTL (0x300+M32R_BSELC_OFFSET)
105#define M32R_BSEL3_CR1_PORTL (0x304+M32R_BSELC_OFFSET)
106#define M32R_BSEL4_CR0_PORTL (0x400+M32R_BSELC_OFFSET)
107#define M32R_BSEL4_CR1_PORTL (0x404+M32R_BSELC_OFFSET)
108#define M32R_BSEL5_CR0_PORTL (0x500+M32R_BSELC_OFFSET)
109#define M32R_BSEL5_CR1_PORTL (0x504+M32R_BSELC_OFFSET)
110#define M32R_BSEL6_CR0_PORTL (0x600+M32R_BSELC_OFFSET)
111#define M32R_BSEL6_CR1_PORTL (0x604+M32R_BSELC_OFFSET)
112#define M32R_BSEL7_CR0_PORTL (0x700+M32R_BSELC_OFFSET)
113#define M32R_BSEL7_CR1_PORTL (0x704+M32R_BSELC_OFFSET)
114
115/*
116 * Multi Function Timer registers.
117 */
118#define M32R_MFT_OFFSET (0x000FC000+M32R_SFR_OFFSET)
119
120#define M32R_MFTCR_PORTL (0x000+M32R_MFT_OFFSET) /* MFT control */
121#define M32R_MFTRPR_PORTL (0x004+M32R_MFT_OFFSET) /* MFT real port */
122
123#define M32R_MFT0_OFFSET (0x100+M32R_MFT_OFFSET)
124#define M32R_MFT0MOD_PORTL (0x00+M32R_MFT0_OFFSET) /* MFT0 mode */
125#define M32R_MFT0BOS_PORTL (0x04+M32R_MFT0_OFFSET) /* MFT0 b-port output status */
126#define M32R_MFT0CUT_PORTL (0x08+M32R_MFT0_OFFSET) /* MFT0 count */
127#define M32R_MFT0RLD_PORTL (0x0C+M32R_MFT0_OFFSET) /* MFT0 reload */
128#define M32R_MFT0CMPRLD_PORTL (0x10+M32R_MFT0_OFFSET) /* MFT0 compare reload */
129
130#define M32R_MFT1_OFFSET (0x200+M32R_MFT_OFFSET)
131#define M32R_MFT1MOD_PORTL (0x00+M32R_MFT1_OFFSET) /* MFT1 mode */
132#define M32R_MFT1BOS_PORTL (0x04+M32R_MFT1_OFFSET) /* MFT1 b-port output status */
133#define M32R_MFT1CUT_PORTL (0x08+M32R_MFT1_OFFSET) /* MFT1 count */
134#define M32R_MFT1RLD_PORTL (0x0C+M32R_MFT1_OFFSET) /* MFT1 reload */
135#define M32R_MFT1CMPRLD_PORTL (0x10+M32R_MFT1_OFFSET) /* MFT1 compare reload */
136
137#define M32R_MFT2_OFFSET (0x300+M32R_MFT_OFFSET)
138#define M32R_MFT2MOD_PORTL (0x00+M32R_MFT2_OFFSET) /* MFT2 mode */
139#define M32R_MFT2BOS_PORTL (0x04+M32R_MFT2_OFFSET) /* MFT2 b-port output status */
140#define M32R_MFT2CUT_PORTL (0x08+M32R_MFT2_OFFSET) /* MFT2 count */
141#define M32R_MFT2RLD_PORTL (0x0C+M32R_MFT2_OFFSET) /* MFT2 reload */
142#define M32R_MFT2CMPRLD_PORTL (0x10+M32R_MFT2_OFFSET) /* MFT2 compare reload */
143
144#define M32R_MFT3_OFFSET (0x400+M32R_MFT_OFFSET)
145#define M32R_MFT3MOD_PORTL (0x00+M32R_MFT3_OFFSET) /* MFT3 mode */
146#define M32R_MFT3BOS_PORTL (0x04+M32R_MFT3_OFFSET) /* MFT3 b-port output status */
147#define M32R_MFT3CUT_PORTL (0x08+M32R_MFT3_OFFSET) /* MFT3 count */
148#define M32R_MFT3RLD_PORTL (0x0C+M32R_MFT3_OFFSET) /* MFT3 reload */
149#define M32R_MFT3CMPRLD_PORTL (0x10+M32R_MFT3_OFFSET) /* MFT3 compare reload */
150
151#define M32R_MFT4_OFFSET (0x500+M32R_MFT_OFFSET)
152#define M32R_MFT4MOD_PORTL (0x00+M32R_MFT4_OFFSET) /* MFT4 mode */
153#define M32R_MFT4BOS_PORTL (0x04+M32R_MFT4_OFFSET) /* MFT4 b-port output status */
154#define M32R_MFT4CUT_PORTL (0x08+M32R_MFT4_OFFSET) /* MFT4 count */
155#define M32R_MFT4RLD_PORTL (0x0C+M32R_MFT4_OFFSET) /* MFT4 reload */
156#define M32R_MFT4CMPRLD_PORTL (0x10+M32R_MFT4_OFFSET) /* MFT4 compare reload */
157
158#define M32R_MFT5_OFFSET (0x600+M32R_MFT_OFFSET)
159#define M32R_MFT5MOD_PORTL (0x00+M32R_MFT5_OFFSET) /* MFT4 mode */
160#define M32R_MFT5BOS_PORTL (0x04+M32R_MFT5_OFFSET) /* MFT4 b-port output status */
161#define M32R_MFT5CUT_PORTL (0x08+M32R_MFT5_OFFSET) /* MFT4 count */
162#define M32R_MFT5RLD_PORTL (0x0C+M32R_MFT5_OFFSET) /* MFT4 reload */
163#define M32R_MFT5CMPRLD_PORTL (0x10+M32R_MFT5_OFFSET) /* MFT4 compare reload */
164
165#define M32R_MFTCR_MFT0MSK (1UL<<15) /* b16 */
166#define M32R_MFTCR_MFT1MSK (1UL<<14) /* b17 */
167#define M32R_MFTCR_MFT2MSK (1UL<<13) /* b18 */
168#define M32R_MFTCR_MFT3MSK (1UL<<12) /* b19 */
169#define M32R_MFTCR_MFT4MSK (1UL<<11) /* b20 */
170#define M32R_MFTCR_MFT5MSK (1UL<<10) /* b21 */
171#define M32R_MFTCR_MFT0EN (1UL<<7) /* b24 */
172#define M32R_MFTCR_MFT1EN (1UL<<6) /* b25 */
173#define M32R_MFTCR_MFT2EN (1UL<<5) /* b26 */
174#define M32R_MFTCR_MFT3EN (1UL<<4) /* b27 */
175#define M32R_MFTCR_MFT4EN (1UL<<3) /* b28 */
176#define M32R_MFTCR_MFT5EN (1UL<<2) /* b29 */
177
178#define M32R_MFTMOD_CC_MASK (1UL<<15) /* b16 */
179#define M32R_MFTMOD_TCCR (1UL<<13) /* b18 */
180#define M32R_MFTMOD_GTSEL000 (0UL<<8) /* b21-23 : 000 */
181#define M32R_MFTMOD_GTSEL001 (1UL<<8) /* b21-23 : 001 */
182#define M32R_MFTMOD_GTSEL010 (2UL<<8) /* b21-23 : 010 */
183#define M32R_MFTMOD_GTSEL011 (3UL<<8) /* b21-23 : 011 */
184#define M32R_MFTMOD_GTSEL110 (6UL<<8) /* b21-23 : 110 */
185#define M32R_MFTMOD_GTSEL111 (7UL<<8) /* b21-23 : 111 */
186#define M32R_MFTMOD_CMSEL (1UL<<3) /* b28 */
187#define M32R_MFTMOD_CSSEL000 (0UL<<0) /* b29-b31 : 000 */
188#define M32R_MFTMOD_CSSEL001 (1UL<<0) /* b29-b31 : 001 */
189#define M32R_MFTMOD_CSSEL010 (2UL<<0) /* b29-b31 : 010 */
190#define M32R_MFTMOD_CSSEL011 (3UL<<0) /* b29-b31 : 011 */
191#define M32R_MFTMOD_CSSEL100 (4UL<<0) /* b29-b31 : 100 */
192#define M32R_MFTMOD_CSSEL110 (6UL<<0) /* b29-b31 : 110 */
193
194/*
195 * Serial I/O registers.
196 */
197#define M32R_SIO_OFFSET (0x000FD000+M32R_SFR_OFFSET)
198
199#define M32R_SIO0_CR_PORTL (0x000+M32R_SIO_OFFSET)
200#define M32R_SIO0_MOD0_PORTL (0x004+M32R_SIO_OFFSET)
201#define M32R_SIO0_MOD1_PORTL (0x008+M32R_SIO_OFFSET)
202#define M32R_SIO0_STS_PORTL (0x00C+M32R_SIO_OFFSET)
203#define M32R_SIO0_TRCR_PORTL (0x010+M32R_SIO_OFFSET)
204#define M32R_SIO0_BAUR_PORTL (0x014+M32R_SIO_OFFSET)
205#define M32R_SIO0_RBAUR_PORTL (0x018+M32R_SIO_OFFSET)
206#define M32R_SIO0_TXB_PORTL (0x01C+M32R_SIO_OFFSET)
207#define M32R_SIO0_RXB_PORTL (0x020+M32R_SIO_OFFSET)
208
209/*
210 * Interrupt Control Unit registers.
211 */
212#define M32R_ICU_OFFSET (0x000FF000+M32R_SFR_OFFSET)
213
214#define M32R_ICU_ISTS_PORTL (0x004+M32R_ICU_OFFSET)
215#define M32R_ICU_IREQ0_PORTL (0x008+M32R_ICU_OFFSET)
216#define M32R_ICU_IREQ1_PORTL (0x00C+M32R_ICU_OFFSET)
217#define M32R_ICU_SBICR_PORTL (0x018+M32R_ICU_OFFSET)
218#define M32R_ICU_IMASK_PORTL (0x01C+M32R_ICU_OFFSET)
219#define M32R_ICU_CR1_PORTL (0x200+M32R_ICU_OFFSET) /* INT0 */
220#define M32R_ICU_CR2_PORTL (0x204+M32R_ICU_OFFSET) /* INT1 */
221#define M32R_ICU_CR3_PORTL (0x208+M32R_ICU_OFFSET) /* INT2 */
222#define M32R_ICU_CR4_PORTL (0x20C+M32R_ICU_OFFSET) /* INT3 */
223#define M32R_ICU_CR5_PORTL (0x210+M32R_ICU_OFFSET) /* INT4 */
224#define M32R_ICU_CR6_PORTL (0x214+M32R_ICU_OFFSET) /* INT5 */
225#define M32R_ICU_CR7_PORTL (0x218+M32R_ICU_OFFSET) /* INT6 */
226#define M32R_ICU_CR8_PORTL (0x218+M32R_ICU_OFFSET) /* INT7 */
227#define M32R_ICU_CR32_PORTL (0x27C+M32R_ICU_OFFSET) /* SIO0 RX */
228#define M32R_ICU_CR33_PORTL (0x280+M32R_ICU_OFFSET) /* SIO0 TX */
229#define M32R_ICU_CR40_PORTL (0x29C+M32R_ICU_OFFSET) /* DMAC0 */
230#define M32R_ICU_CR41_PORTL (0x2A0+M32R_ICU_OFFSET) /* DMAC1 */
231#define M32R_ICU_CR48_PORTL (0x2BC+M32R_ICU_OFFSET) /* MFT0 */
232#define M32R_ICU_CR49_PORTL (0x2C0+M32R_ICU_OFFSET) /* MFT1 */
233#define M32R_ICU_CR50_PORTL (0x2C4+M32R_ICU_OFFSET) /* MFT2 */
234#define M32R_ICU_CR51_PORTL (0x2C8+M32R_ICU_OFFSET) /* MFT3 */
235#define M32R_ICU_CR52_PORTL (0x2CC+M32R_ICU_OFFSET) /* MFT4 */
236#define M32R_ICU_CR53_PORTL (0x2D0+M32R_ICU_OFFSET) /* MFT5 */
237#define M32R_ICU_IPICR0_PORTL (0x2DC+M32R_ICU_OFFSET) /* IPI0 */
238#define M32R_ICU_IPICR1_PORTL (0x2E0+M32R_ICU_OFFSET) /* IPI1 */
239#define M32R_ICU_IPICR2_PORTL (0x2E4+M32R_ICU_OFFSET) /* IPI2 */
240#define M32R_ICU_IPICR3_PORTL (0x2E8+M32R_ICU_OFFSET) /* IPI3 */
241#define M32R_ICU_IPICR4_PORTL (0x2EC+M32R_ICU_OFFSET) /* IPI4 */
242#define M32R_ICU_IPICR5_PORTL (0x2F0+M32R_ICU_OFFSET) /* IPI5 */
243#define M32R_ICU_IPICR6_PORTL (0x2F4+M32R_ICU_OFFSET) /* IPI6 */
244#define M32R_ICU_IPICR7_PORTL (0x2FC+M32R_ICU_OFFSET) /* IPI7 */
245
246#define M32R_ICUISTS_VECB(val) ((val>>28) & 0xF)
247#define M32R_ICUISTS_ISN(val) ((val>>22) & 0x3F)
248#define M32R_ICUISTS_PIML(val) ((val>>16) & 0x7)
249
250#define M32R_ICUIMASK_IMSK0 (0UL<<16) /* b13-b15: Disable interrupt */
251#define M32R_ICUIMASK_IMSK1 (1UL<<16) /* b13-b15: Enable level 0 interrupt */
252#define M32R_ICUIMASK_IMSK2 (2UL<<16) /* b13-b15: Enable level 0,1 interrupt */
253#define M32R_ICUIMASK_IMSK3 (3UL<<16) /* b13-b15: Enable level 0-2 interrupt */
254#define M32R_ICUIMASK_IMSK4 (4UL<<16) /* b13-b15: Enable level 0-3 interrupt */
255#define M32R_ICUIMASK_IMSK5 (5UL<<16) /* b13-b15: Enable level 0-4 interrupt */
256#define M32R_ICUIMASK_IMSK6 (6UL<<16) /* b13-b15: Enable level 0-5 interrupt */
257#define M32R_ICUIMASK_IMSK7 (7UL<<16) /* b13-b15: Enable level 0-6 interrupt */
258
259#define M32R_ICUCR_IEN (1UL<<12) /* b19: Interrupt enable */
260#define M32R_ICUCR_IRQ (1UL<<8) /* b23: Interrupt request */
261#define M32R_ICUCR_ISMOD00 (0UL<<4) /* b26-b27: Interrupt sense mode Edge HtoL */
262#define M32R_ICUCR_ISMOD01 (1UL<<4) /* b26-b27: Interrupt sense mode Level L */
263#define M32R_ICUCR_ISMOD10 (2UL<<4) /* b26-b27: Interrupt sense mode Edge LtoH*/
264#define M32R_ICUCR_ISMOD11 (3UL<<4) /* b26-b27: Interrupt sense mode Level H */
265#define M32R_ICUCR_ILEVEL0 (0UL<<0) /* b29-b31: Interrupt priority level 0 */
266#define M32R_ICUCR_ILEVEL1 (1UL<<0) /* b29-b31: Interrupt priority level 1 */
267#define M32R_ICUCR_ILEVEL2 (2UL<<0) /* b29-b31: Interrupt priority level 2 */
268#define M32R_ICUCR_ILEVEL3 (3UL<<0) /* b29-b31: Interrupt priority level 3 */
269#define M32R_ICUCR_ILEVEL4 (4UL<<0) /* b29-b31: Interrupt priority level 4 */
270#define M32R_ICUCR_ILEVEL5 (5UL<<0) /* b29-b31: Interrupt priority level 5 */
271#define M32R_ICUCR_ILEVEL6 (6UL<<0) /* b29-b31: Interrupt priority level 6 */
272#define M32R_ICUCR_ILEVEL7 (7UL<<0) /* b29-b31: Disable interrupt */
273#define M32R_ICUCR_ILEVEL_MASK (7UL)
274
275#define M32R_IRQ_INT0 (1) /* INT0 */
276#define M32R_IRQ_INT1 (2) /* INT1 */
277#define M32R_IRQ_INT2 (3) /* INT2 */
278#define M32R_IRQ_INT3 (4) /* INT3 */
279#define M32R_IRQ_INT4 (5) /* INT4 */
280#define M32R_IRQ_INT5 (6) /* INT5 */
281#define M32R_IRQ_INT6 (7) /* INT6 */
282#define M32R_IRQ_INT7 (8) /* INT7 */
283#define M32R_IRQ_MFT0 (16) /* MFT0 */
284#define M32R_IRQ_MFT1 (17) /* MFT1 */
285#define M32R_IRQ_MFT2 (18) /* MFT2 */
286#define M32R_IRQ_MFT3 (19) /* MFT3 */
287#define M32R_IRQ_MFT4 (20) /* MFT4 */
288#define M32R_IRQ_MFT5 (21) /* MFT5 */
289#define M32R_IRQ_DMAC0 (32) /* DMAC0 */
290#define M32R_IRQ_DMAC1 (33) /* DMAC1 */
291#define M32R_IRQ_SIO0_R (48) /* SIO0 receive */
292#define M32R_IRQ_SIO0_S (49) /* SIO0 send */
293#define M32R_IRQ_SIO1_R (50) /* SIO1 send */
294#define M32R_IRQ_SIO1_S (51) /* SIO1 receive */
295#define M32R_IRQ_IPI0 (56) /* IPI0 */
296#define M32R_IRQ_IPI1 (57) /* IPI1 */
297#define M32R_IRQ_IPI2 (58) /* IPI2 */
298#define M32R_IRQ_IPI3 (59) /* IPI3 */
299#define M32R_IRQ_IPI4 (60) /* IPI4 */
300#define M32R_IRQ_IPI5 (61) /* IPI5 */
301#define M32R_IRQ_IPI6 (62) /* IPI6 */
302#define M32R_IRQ_IPI7 (63) /* IPI7 */
303
304/*======================================================================*
305 * CPU
306 *======================================================================*/
307
308#define M32R_CPUID_PORTL (0xFFFFFFE0)
309#define M32R_MCICAR_PORTL (0xFFFFFFF0)
310#define M32R_MCDCAR_PORTL (0xFFFFFFF4)
311#define M32R_MCCR_PORTL (0xFFFFFFFC)
312
313#endif /* _ASM_M32R_M32R_MP_FPGA_ */
diff --git a/arch/m32r/include/asm/mappi2/mappi2_pld.h b/arch/m32r/include/asm/mappi2/mappi2_pld.h
new file mode 100644
index 000000000000..2624c9db7255
--- /dev/null
+++ b/arch/m32r/include/asm/mappi2/mappi2_pld.h
@@ -0,0 +1,150 @@
1#ifndef _MAPPI2_PLD_H
2#define _MAPPI2_PLD_H
3
4/*
5 * include/asm-m32r/mappi2/mappi2_pld.h
6 *
7 * Definitions for Extended IO Logic on MAPPI2 board.
8 * based on m32700ut_pld.h
9 *
10 * This file is subject to the terms and conditions of the GNU General
11 * Public License. See the file "COPYING" in the main directory of
12 * this archive for more details.
13 */
14
15#ifndef __ASSEMBLY__
16/* FIXME:
17 * Some C functions use non-cache address, so can't define non-cache address.
18 */
19#define PLD_BASE (0x10c00000 /* + NONCACHE_OFFSET */)
20#define __reg8 (volatile unsigned char *)
21#define __reg16 (volatile unsigned short *)
22#define __reg32 (volatile unsigned int *)
23#else
24#define PLD_BASE (0x10c00000 + NONCACHE_OFFSET)
25#define __reg8
26#define __reg16
27#define __reg32
28#endif /* __ASSEMBLY__ */
29
30/* CFC */
31#define PLD_CFRSTCR __reg16(PLD_BASE + 0x0000)
32#define PLD_CFSTS __reg16(PLD_BASE + 0x0002)
33#define PLD_CFIMASK __reg16(PLD_BASE + 0x0004)
34#define PLD_CFBUFCR __reg16(PLD_BASE + 0x0006)
35#define PLD_CFCR0 __reg16(PLD_BASE + 0x000a)
36#define PLD_CFCR1 __reg16(PLD_BASE + 0x000c)
37
38/* MMC */
39#define PLD_MMCCR __reg16(PLD_BASE + 0x4000)
40#define PLD_MMCMOD __reg16(PLD_BASE + 0x4002)
41#define PLD_MMCSTS __reg16(PLD_BASE + 0x4006)
42#define PLD_MMCBAUR __reg16(PLD_BASE + 0x400a)
43#define PLD_MMCCMDBCUT __reg16(PLD_BASE + 0x400c)
44#define PLD_MMCCDTBCUT __reg16(PLD_BASE + 0x400e)
45#define PLD_MMCDET __reg16(PLD_BASE + 0x4010)
46#define PLD_MMCWP __reg16(PLD_BASE + 0x4012)
47#define PLD_MMCWDATA __reg16(PLD_BASE + 0x5000)
48#define PLD_MMCRDATA __reg16(PLD_BASE + 0x6000)
49#define PLD_MMCCMDDATA __reg16(PLD_BASE + 0x7000)
50#define PLD_MMCRSPDATA __reg16(PLD_BASE + 0x7006)
51
52/* Power Control of MMC and CF */
53#define PLD_CPCR __reg16(PLD_BASE + 0x14000)
54
55
56/*==== ICU ====*/
57#define M32R_IRQ_PC104 (5) /* INT4(PC/104) */
58#define M32R_IRQ_I2C (28) /* I2C-BUS */
59#if 1
60#define PLD_IRQ_CFIREQ (40) /* CFC Card Interrupt */
61#define PLD_IRQ_CFC_INSERT (41) /* CFC Card Insert */
62#define PLD_IRQ_CFC_EJECT (42) /* CFC Card Eject */
63#define PLD_IRQ_MMCCARD (43) /* MMC Card Insert */
64#define PLD_IRQ_MMCIRQ (44) /* MMC Transfer Done */
65#else
66#define PLD_IRQ_CFIREQ (34) /* CFC Card Interrupt */
67#define PLD_IRQ_CFC_INSERT (35) /* CFC Card Insert */
68#define PLD_IRQ_CFC_EJECT (36) /* CFC Card Eject */
69#define PLD_IRQ_MMCCARD (37) /* MMC Card Insert */
70#define PLD_IRQ_MMCIRQ (38) /* MMC Transfer Done */
71#endif
72
73
74#if 0
75/* LED Control
76 *
77 * 1: DIP swich side
78 * 2: Reset switch side
79 */
80#define PLD_IOLEDCR __reg16(PLD_BASE + 0x14002)
81#define PLD_IOLED_1_ON 0x001
82#define PLD_IOLED_1_OFF 0x000
83#define PLD_IOLED_2_ON 0x002
84#define PLD_IOLED_2_OFF 0x000
85
86/* DIP Switch
87 * 0: Write-protect of Flash Memory (0:protected, 1:non-protected)
88 * 1: -
89 * 2: -
90 * 3: -
91 */
92#define PLD_IOSWSTS __reg16(PLD_BASE + 0x14004)
93#define PLD_IOSWSTS_IOSW2 0x0200
94#define PLD_IOSWSTS_IOSW1 0x0100
95#define PLD_IOSWSTS_IOWP0 0x0001
96
97#endif
98
99/* CRC */
100#define PLD_CRC7DATA __reg16(PLD_BASE + 0x18000)
101#define PLD_CRC7INDATA __reg16(PLD_BASE + 0x18002)
102#define PLD_CRC16DATA __reg16(PLD_BASE + 0x18004)
103#define PLD_CRC16INDATA __reg16(PLD_BASE + 0x18006)
104#define PLD_CRC16ADATA __reg16(PLD_BASE + 0x18008)
105#define PLD_CRC16AINDATA __reg16(PLD_BASE + 0x1800a)
106
107
108#if 0
109/* RTC */
110#define PLD_RTCCR __reg16(PLD_BASE + 0x1c000)
111#define PLD_RTCBAUR __reg16(PLD_BASE + 0x1c002)
112#define PLD_RTCWRDATA __reg16(PLD_BASE + 0x1c004)
113#define PLD_RTCRDDATA __reg16(PLD_BASE + 0x1c006)
114#define PLD_RTCRSTODT __reg16(PLD_BASE + 0x1c008)
115
116/* SIO0 */
117#define PLD_ESIO0CR __reg16(PLD_BASE + 0x20000)
118#define PLD_ESIO0CR_TXEN 0x0001
119#define PLD_ESIO0CR_RXEN 0x0002
120#define PLD_ESIO0MOD0 __reg16(PLD_BASE + 0x20002)
121#define PLD_ESIO0MOD0_CTSS 0x0040
122#define PLD_ESIO0MOD0_RTSS 0x0080
123#define PLD_ESIO0MOD1 __reg16(PLD_BASE + 0x20004)
124#define PLD_ESIO0MOD1_LMFS 0x0010
125#define PLD_ESIO0STS __reg16(PLD_BASE + 0x20006)
126#define PLD_ESIO0STS_TEMP 0x0001
127#define PLD_ESIO0STS_TXCP 0x0002
128#define PLD_ESIO0STS_RXCP 0x0004
129#define PLD_ESIO0STS_TXSC 0x0100
130#define PLD_ESIO0STS_RXSC 0x0200
131#define PLD_ESIO0STS_TXREADY (PLD_ESIO0STS_TXCP | PLD_ESIO0STS_TEMP)
132#define PLD_ESIO0INTCR __reg16(PLD_BASE + 0x20008)
133#define PLD_ESIO0INTCR_TXIEN 0x0002
134#define PLD_ESIO0INTCR_RXCEN 0x0004
135#define PLD_ESIO0BAUR __reg16(PLD_BASE + 0x2000a)
136#define PLD_ESIO0TXB __reg16(PLD_BASE + 0x2000c)
137#define PLD_ESIO0RXB __reg16(PLD_BASE + 0x2000e)
138
139/* SIM Card */
140#define PLD_SCCR __reg16(PLD_BASE + 0x38000)
141#define PLD_SCMOD __reg16(PLD_BASE + 0x38004)
142#define PLD_SCSTS __reg16(PLD_BASE + 0x38006)
143#define PLD_SCINTCR __reg16(PLD_BASE + 0x38008)
144#define PLD_SCBAUR __reg16(PLD_BASE + 0x3800a)
145#define PLD_SCTXB __reg16(PLD_BASE + 0x3800c)
146#define PLD_SCRXB __reg16(PLD_BASE + 0x3800e)
147
148#endif
149
150#endif /* _MAPPI2_PLD.H */
diff --git a/arch/m32r/include/asm/mappi3/mappi3_pld.h b/arch/m32r/include/asm/mappi3/mappi3_pld.h
new file mode 100644
index 000000000000..451c40ee70af
--- /dev/null
+++ b/arch/m32r/include/asm/mappi3/mappi3_pld.h
@@ -0,0 +1,142 @@
1#ifndef _MAPPI3_PLD_H
2#define _MAPPI3_PLD_H
3
4/*
5 * include/asm-m32r/mappi3/mappi3_pld.h
6 *
7 * Definitions for Extended IO Logic on MAPPI3 board.
8 * based on m32700ut_pld.h
9 *
10 * This file is subject to the terms and conditions of the GNU General
11 * Public License. See the file "COPYING" in the main directory of
12 * this archive for more details.
13 */
14
15#ifndef __ASSEMBLY__
16/* FIXME:
17 * Some C functions use non-cache address, so can't define non-cache address.
18 */
19#define PLD_BASE (0x1c000000 /* + NONCACHE_OFFSET */)
20#define __reg8 (volatile unsigned char *)
21#define __reg16 (volatile unsigned short *)
22#define __reg32 (volatile unsigned int *)
23#else
24#define PLD_BASE (0x1c000000 + NONCACHE_OFFSET)
25#define __reg8
26#define __reg16
27#define __reg32
28#endif /* __ASSEMBLY__ */
29
30/* CFC */
31#define PLD_CFRSTCR __reg16(PLD_BASE + 0x0000)
32#define PLD_CFSTS __reg16(PLD_BASE + 0x0002)
33#define PLD_CFIMASK __reg16(PLD_BASE + 0x0004)
34#define PLD_CFBUFCR __reg16(PLD_BASE + 0x0006)
35#define PLD_CFCR0 __reg16(PLD_BASE + 0x000a)
36#define PLD_CFCR1 __reg16(PLD_BASE + 0x000c)
37
38/* MMC */
39#define PLD_MMCCR __reg16(PLD_BASE + 0x4000)
40#define PLD_MMCMOD __reg16(PLD_BASE + 0x4002)
41#define PLD_MMCSTS __reg16(PLD_BASE + 0x4006)
42#define PLD_MMCBAUR __reg16(PLD_BASE + 0x400a)
43#define PLD_MMCCMDBCUT __reg16(PLD_BASE + 0x400c)
44#define PLD_MMCCDTBCUT __reg16(PLD_BASE + 0x400e)
45#define PLD_MMCDET __reg16(PLD_BASE + 0x4010)
46#define PLD_MMCWP __reg16(PLD_BASE + 0x4012)
47#define PLD_MMCWDATA __reg16(PLD_BASE + 0x5000)
48#define PLD_MMCRDATA __reg16(PLD_BASE + 0x6000)
49#define PLD_MMCCMDDATA __reg16(PLD_BASE + 0x7000)
50#define PLD_MMCRSPDATA __reg16(PLD_BASE + 0x7006)
51
52/* Power Control of MMC and CF */
53#define PLD_CPCR __reg16(PLD_BASE + 0x14000)
54
55/* ICU */
56#define M32R_IRQ_PC104 (5) /* INT4(PC/104) */
57#define M32R_IRQ_I2C (28) /* I2C-BUS */
58#define PLD_IRQ_CFIREQ (6) /* INT5 CFC Card Interrupt */
59#define PLD_IRQ_CFC_INSERT (7) /* INT6 CFC Card Insert & Eject */
60#define PLD_IRQ_IDEIREQ (8) /* INT7 IDE Interrupt */
61#define PLD_IRQ_MMCCARD (43) /* MMC Card Insert */
62#define PLD_IRQ_MMCIRQ (44) /* MMC Transfer Done */
63
64#if 0
65/* LED Control
66 *
67 * 1: DIP swich side
68 * 2: Reset switch side
69 */
70#define PLD_IOLEDCR __reg16(PLD_BASE + 0x14002)
71#define PLD_IOLED_1_ON 0x001
72#define PLD_IOLED_1_OFF 0x000
73#define PLD_IOLED_2_ON 0x002
74#define PLD_IOLED_2_OFF 0x000
75
76/* DIP Switch
77 * 0: Write-protect of Flash Memory (0:protected, 1:non-protected)
78 * 1: -
79 * 2: -
80 * 3: -
81 */
82#define PLD_IOSWSTS __reg16(PLD_BASE + 0x14004)
83#define PLD_IOSWSTS_IOSW2 0x0200
84#define PLD_IOSWSTS_IOSW1 0x0100
85#define PLD_IOSWSTS_IOWP0 0x0001
86
87#endif
88
89/* CRC */
90#define PLD_CRC7DATA __reg16(PLD_BASE + 0x18000)
91#define PLD_CRC7INDATA __reg16(PLD_BASE + 0x18002)
92#define PLD_CRC16DATA __reg16(PLD_BASE + 0x18004)
93#define PLD_CRC16INDATA __reg16(PLD_BASE + 0x18006)
94#define PLD_CRC16ADATA __reg16(PLD_BASE + 0x18008)
95#define PLD_CRC16AINDATA __reg16(PLD_BASE + 0x1800a)
96
97#if 0
98/* RTC */
99#define PLD_RTCCR __reg16(PLD_BASE + 0x1c000)
100#define PLD_RTCBAUR __reg16(PLD_BASE + 0x1c002)
101#define PLD_RTCWRDATA __reg16(PLD_BASE + 0x1c004)
102#define PLD_RTCRDDATA __reg16(PLD_BASE + 0x1c006)
103#define PLD_RTCRSTODT __reg16(PLD_BASE + 0x1c008)
104
105/* SIO0 */
106#define PLD_ESIO0CR __reg16(PLD_BASE + 0x20000)
107#define PLD_ESIO0CR_TXEN 0x0001
108#define PLD_ESIO0CR_RXEN 0x0002
109#define PLD_ESIO0MOD0 __reg16(PLD_BASE + 0x20002)
110#define PLD_ESIO0MOD0_CTSS 0x0040
111#define PLD_ESIO0MOD0_RTSS 0x0080
112#define PLD_ESIO0MOD1 __reg16(PLD_BASE + 0x20004)
113#define PLD_ESIO0MOD1_LMFS 0x0010
114#define PLD_ESIO0STS __reg16(PLD_BASE + 0x20006)
115#define PLD_ESIO0STS_TEMP 0x0001
116#define PLD_ESIO0STS_TXCP 0x0002
117#define PLD_ESIO0STS_RXCP 0x0004
118#define PLD_ESIO0STS_TXSC 0x0100
119#define PLD_ESIO0STS_RXSC 0x0200
120#define PLD_ESIO0STS_TXREADY (PLD_ESIO0STS_TXCP | PLD_ESIO0STS_TEMP)
121#define PLD_ESIO0INTCR __reg16(PLD_BASE + 0x20008)
122#define PLD_ESIO0INTCR_TXIEN 0x0002
123#define PLD_ESIO0INTCR_RXCEN 0x0004
124#define PLD_ESIO0BAUR __reg16(PLD_BASE + 0x2000a)
125#define PLD_ESIO0TXB __reg16(PLD_BASE + 0x2000c)
126#define PLD_ESIO0RXB __reg16(PLD_BASE + 0x2000e)
127
128/* SIM Card */
129#define PLD_SCCR __reg16(PLD_BASE + 0x38000)
130#define PLD_SCMOD __reg16(PLD_BASE + 0x38004)
131#define PLD_SCSTS __reg16(PLD_BASE + 0x38006)
132#define PLD_SCINTCR __reg16(PLD_BASE + 0x38008)
133#define PLD_SCBAUR __reg16(PLD_BASE + 0x3800a)
134#define PLD_SCTXB __reg16(PLD_BASE + 0x3800c)
135#define PLD_SCRXB __reg16(PLD_BASE + 0x3800e)
136
137#endif
138
139/* Reset Control */
140#define PLD_REBOOT __reg16(PLD_BASE + 0x38000)
141
142#endif /* _MAPPI3_PLD.H */
diff --git a/arch/m32r/include/asm/mc146818rtc.h b/arch/m32r/include/asm/mc146818rtc.h
new file mode 100644
index 000000000000..aa1b7bf84f51
--- /dev/null
+++ b/arch/m32r/include/asm/mc146818rtc.h
@@ -0,0 +1,29 @@
1/*
2 * Machine dependent access functions for RTC registers.
3 */
4#ifndef _ASM_MC146818RTC_H
5#define _ASM_MC146818RTC_H
6
7#include <asm/io.h>
8
9#ifndef RTC_PORT
10#define RTC_PORT(x) ((x))
11#define RTC_ALWAYS_BCD 1 /* RTC operates in binary mode */
12#endif
13
14/*
15 * The yet supported machines all access the RTC index register via
16 * an ISA port access but the way to access the date register differs ...
17 */
18#define CMOS_READ(addr) ({ \
19outb_p((addr),RTC_PORT(0)); \
20inb_p(RTC_PORT(1)); \
21})
22#define CMOS_WRITE(val, addr) ({ \
23outb_p((addr),RTC_PORT(0)); \
24outb_p((val),RTC_PORT(1)); \
25})
26
27#define RTC_IRQ 8
28
29#endif /* _ASM_MC146818RTC_H */
diff --git a/arch/m32r/include/asm/mman.h b/arch/m32r/include/asm/mman.h
new file mode 100644
index 000000000000..516a8973b130
--- /dev/null
+++ b/arch/m32r/include/asm/mman.h
@@ -0,0 +1,17 @@
1#ifndef __M32R_MMAN_H__
2#define __M32R_MMAN_H__
3
4#include <asm-generic/mman.h>
5
6#define MAP_GROWSDOWN 0x0100 /* stack-like segment */
7#define MAP_DENYWRITE 0x0800 /* ETXTBSY */
8#define MAP_EXECUTABLE 0x1000 /* mark it as an executable */
9#define MAP_LOCKED 0x2000 /* pages are locked */
10#define MAP_NORESERVE 0x4000 /* don't check for reservations */
11#define MAP_POPULATE 0x8000 /* populate (prefault) pagetables */
12#define MAP_NONBLOCK 0x10000 /* do not block on IO */
13
14#define MCL_CURRENT 1 /* lock all current mappings */
15#define MCL_FUTURE 2 /* lock all future mappings */
16
17#endif /* __M32R_MMAN_H__ */
diff --git a/arch/m32r/include/asm/mmu.h b/arch/m32r/include/asm/mmu.h
new file mode 100644
index 000000000000..150cb92bb666
--- /dev/null
+++ b/arch/m32r/include/asm/mmu.h
@@ -0,0 +1,21 @@
1#ifndef _ASM_M32R_MMU_H
2#define _ASM_M32R_MMU_H
3
4#if !defined(CONFIG_MMU)
5
6typedef struct {
7 unsigned long end_brk;
8} mm_context_t;
9
10#else /* CONFIG_MMU */
11
12/* Default "unsigned long" context */
13#ifndef CONFIG_SMP
14typedef unsigned long mm_context_t;
15#else
16typedef unsigned long mm_context_t[NR_CPUS];
17#endif
18
19#endif /* CONFIG_MMU */
20
21#endif /* _ASM_M32R_MMU_H */
diff --git a/arch/m32r/include/asm/mmu_context.h b/arch/m32r/include/asm/mmu_context.h
new file mode 100644
index 000000000000..91909e5dd9d0
--- /dev/null
+++ b/arch/m32r/include/asm/mmu_context.h
@@ -0,0 +1,164 @@
1#ifndef _ASM_M32R_MMU_CONTEXT_H
2#define _ASM_M32R_MMU_CONTEXT_H
3#ifdef __KERNEL__
4
5#include <asm/m32r.h>
6
7#define MMU_CONTEXT_ASID_MASK (0x000000FF)
8#define MMU_CONTEXT_VERSION_MASK (0xFFFFFF00)
9#define MMU_CONTEXT_FIRST_VERSION (0x00000100)
10#define NO_CONTEXT (0x00000000)
11
12#ifndef __ASSEMBLY__
13
14#include <asm/atomic.h>
15#include <asm/pgalloc.h>
16#include <asm/mmu.h>
17#include <asm/tlbflush.h>
18#include <asm-generic/mm_hooks.h>
19
20/*
21 * Cache of MMU context last used.
22 */
23#ifndef CONFIG_SMP
24extern unsigned long mmu_context_cache_dat;
25#define mmu_context_cache mmu_context_cache_dat
26#define mm_context(mm) mm->context
27#else /* not CONFIG_SMP */
28extern unsigned long mmu_context_cache_dat[];
29#define mmu_context_cache mmu_context_cache_dat[smp_processor_id()]
30#define mm_context(mm) mm->context[smp_processor_id()]
31#endif /* not CONFIG_SMP */
32
33#define set_tlb_tag(entry, tag) (*entry = (tag & PAGE_MASK)|get_asid())
34#define set_tlb_data(entry, data) (*entry = (data | _PAGE_PRESENT))
35
36#ifdef CONFIG_MMU
37#define enter_lazy_tlb(mm, tsk) do { } while (0)
38
39static inline void get_new_mmu_context(struct mm_struct *mm)
40{
41 unsigned long mc = ++mmu_context_cache;
42
43 if (!(mc & MMU_CONTEXT_ASID_MASK)) {
44 /* We exhaust ASID of this version.
45 Flush all TLB and start new cycle. */
46 local_flush_tlb_all();
47 /* Fix version if needed.
48 Note that we avoid version #0 to distingush NO_CONTEXT. */
49 if (!mc)
50 mmu_context_cache = mc = MMU_CONTEXT_FIRST_VERSION;
51 }
52 mm_context(mm) = mc;
53}
54
55/*
56 * Get MMU context if needed.
57 */
58static inline void get_mmu_context(struct mm_struct *mm)
59{
60 if (mm) {
61 unsigned long mc = mmu_context_cache;
62
63 /* Check if we have old version of context.
64 If it's old, we need to get new context with new version. */
65 if ((mm_context(mm) ^ mc) & MMU_CONTEXT_VERSION_MASK)
66 get_new_mmu_context(mm);
67 }
68}
69
70/*
71 * Initialize the context related info for a new mm_struct
72 * instance.
73 */
74static inline int init_new_context(struct task_struct *tsk,
75 struct mm_struct *mm)
76{
77#ifndef CONFIG_SMP
78 mm->context = NO_CONTEXT;
79#else /* CONFIG_SMP */
80 int num_cpus = num_online_cpus();
81 int i;
82
83 for (i = 0 ; i < num_cpus ; i++)
84 mm->context[i] = NO_CONTEXT;
85#endif /* CONFIG_SMP */
86
87 return 0;
88}
89
90/*
91 * Destroy context related info for an mm_struct that is about
92 * to be put to rest.
93 */
94#define destroy_context(mm) do { } while (0)
95
96static inline void set_asid(unsigned long asid)
97{
98 *(volatile unsigned long *)MASID = (asid & MMU_CONTEXT_ASID_MASK);
99}
100
101static inline unsigned long get_asid(void)
102{
103 unsigned long asid;
104
105 asid = *(volatile long *)MASID;
106 asid &= MMU_CONTEXT_ASID_MASK;
107
108 return asid;
109}
110
111/*
112 * After we have set current->mm to a new value, this activates
113 * the context for the new mm so we see the new mappings.
114 */
115static inline void activate_context(struct mm_struct *mm)
116{
117 get_mmu_context(mm);
118 set_asid(mm_context(mm) & MMU_CONTEXT_ASID_MASK);
119}
120
121static inline void switch_mm(struct mm_struct *prev,
122 struct mm_struct *next, struct task_struct *tsk)
123{
124#ifdef CONFIG_SMP
125 int cpu = smp_processor_id();
126#endif /* CONFIG_SMP */
127
128 if (prev != next) {
129#ifdef CONFIG_SMP
130 cpu_set(cpu, next->cpu_vm_mask);
131#endif /* CONFIG_SMP */
132 /* Set MPTB = next->pgd */
133 *(volatile unsigned long *)MPTB = (unsigned long)next->pgd;
134 activate_context(next);
135 }
136#ifdef CONFIG_SMP
137 else
138 if (!cpu_test_and_set(cpu, next->cpu_vm_mask))
139 activate_context(next);
140#endif /* CONFIG_SMP */
141}
142
143#define deactivate_mm(tsk, mm) do { } while (0)
144
145#define activate_mm(prev, next) \
146 switch_mm((prev), (next), NULL)
147
148#else /* not CONFIG_MMU */
149#define get_mmu_context(mm) do { } while (0)
150#define init_new_context(tsk,mm) (0)
151#define destroy_context(mm) do { } while (0)
152#define set_asid(asid) do { } while (0)
153#define get_asid() (0)
154#define activate_context(mm) do { } while (0)
155#define switch_mm(prev,next,tsk) do { } while (0)
156#define deactivate_mm(mm,tsk) do { } while (0)
157#define activate_mm(prev,next) do { } while (0)
158#define enter_lazy_tlb(mm,tsk) do { } while (0)
159#endif /* not CONFIG_MMU */
160
161#endif /* not __ASSEMBLY__ */
162
163#endif /* __KERNEL__ */
164#endif /* _ASM_M32R_MMU_CONTEXT_H */
diff --git a/arch/m32r/include/asm/mmzone.h b/arch/m32r/include/asm/mmzone.h
new file mode 100644
index 000000000000..9f3b5accda88
--- /dev/null
+++ b/arch/m32r/include/asm/mmzone.h
@@ -0,0 +1,59 @@
1/*
2 * Written by Pat Gaughen (gone@us.ibm.com) Mar 2002
3 *
4 */
5
6#ifndef _ASM_MMZONE_H_
7#define _ASM_MMZONE_H_
8
9#include <asm/smp.h>
10
11#ifdef CONFIG_DISCONTIGMEM
12
13extern struct pglist_data *node_data[];
14#define NODE_DATA(nid) (node_data[nid])
15
16#define node_localnr(pfn, nid) ((pfn) - NODE_DATA(nid)->node_start_pfn)
17#define node_start_pfn(nid) (NODE_DATA(nid)->node_start_pfn)
18#define node_end_pfn(nid) \
19({ \
20 pg_data_t *__pgdat = NODE_DATA(nid); \
21 __pgdat->node_start_pfn + __pgdat->node_spanned_pages - 1; \
22})
23
24#define pmd_page(pmd) (pfn_to_page(pmd_val(pmd) >> PAGE_SHIFT))
25/*
26 * pfn_valid should be made as fast as possible, and the current definition
27 * is valid for machines that are NUMA, but still contiguous, which is what
28 * is currently supported. A more generalised, but slower definition would
29 * be something like this - mbligh:
30 * ( pfn_to_pgdat(pfn) && ((pfn) < node_end_pfn(pfn_to_nid(pfn))) )
31 */
32#if 1 /* M32R_FIXME */
33#define pfn_valid(pfn) (1)
34#else
35#define pfn_valid(pfn) ((pfn) < num_physpages)
36#endif
37
38/*
39 * generic node memory support, the following assumptions apply:
40 */
41
42static __inline__ int pfn_to_nid(unsigned long pfn)
43{
44 int node;
45
46 for (node = 0 ; node < MAX_NUMNODES ; node++)
47 if (pfn >= node_start_pfn(node) && pfn <= node_end_pfn(node))
48 break;
49
50 return node;
51}
52
53static __inline__ struct pglist_data *pfn_to_pgdat(unsigned long pfn)
54{
55 return(NODE_DATA(pfn_to_nid(pfn)));
56}
57
58#endif /* CONFIG_DISCONTIGMEM */
59#endif /* _ASM_MMZONE_H_ */
diff --git a/arch/m32r/include/asm/module.h b/arch/m32r/include/asm/module.h
new file mode 100644
index 000000000000..eb73ee011215
--- /dev/null
+++ b/arch/m32r/include/asm/module.h
@@ -0,0 +1,10 @@
1#ifndef _ASM_M32R_MODULE_H
2#define _ASM_M32R_MODULE_H
3
4struct mod_arch_specific { };
5
6#define Elf_Shdr Elf32_Shdr
7#define Elf_Sym Elf32_Sym
8#define Elf_Ehdr Elf32_Ehdr
9
10#endif /* _ASM_M32R_MODULE_H */
diff --git a/arch/m32r/include/asm/msgbuf.h b/arch/m32r/include/asm/msgbuf.h
new file mode 100644
index 000000000000..0d5a877b813e
--- /dev/null
+++ b/arch/m32r/include/asm/msgbuf.h
@@ -0,0 +1,31 @@
1#ifndef _ASM_M32R_MSGBUF_H
2#define _ASM_M32R_MSGBUF_H
3
4/*
5 * The msqid64_ds structure for m32r architecture.
6 * Note extra padding because this structure is passed back and forth
7 * between kernel and user space.
8 *
9 * Pad space is left for:
10 * - 64-bit time_t to solve y2038 problem
11 * - 2 miscellaneous 32-bit values
12 */
13
14struct msqid64_ds {
15 struct ipc64_perm msg_perm;
16 __kernel_time_t msg_stime; /* last msgsnd time */
17 unsigned long __unused1;
18 __kernel_time_t msg_rtime; /* last msgrcv time */
19 unsigned long __unused2;
20 __kernel_time_t msg_ctime; /* last change time */
21 unsigned long __unused3;
22 unsigned long msg_cbytes; /* current number of bytes on queue */
23 unsigned long msg_qnum; /* number of messages in queue */
24 unsigned long msg_qbytes; /* max number of bytes on queue */
25 __kernel_pid_t msg_lspid; /* pid of last msgsnd */
26 __kernel_pid_t msg_lrpid; /* last receive pid */
27 unsigned long __unused4;
28 unsigned long __unused5;
29};
30
31#endif /* _ASM_M32R_MSGBUF_H */
diff --git a/arch/m32r/include/asm/mutex.h b/arch/m32r/include/asm/mutex.h
new file mode 100644
index 000000000000..458c1f7fbc18
--- /dev/null
+++ b/arch/m32r/include/asm/mutex.h
@@ -0,0 +1,9 @@
1/*
2 * Pull in the generic implementation for the mutex fastpath.
3 *
4 * TODO: implement optimized primitives instead, or leave the generic
5 * implementation in place, or pick the atomic_xchg() based generic
6 * implementation. (see asm-generic/mutex-xchg.h for details)
7 */
8
9#include <asm-generic/mutex-dec.h>
diff --git a/arch/m32r/include/asm/opsput/opsput_lan.h b/arch/m32r/include/asm/opsput/opsput_lan.h
new file mode 100644
index 000000000000..a5f18dd1ab20
--- /dev/null
+++ b/arch/m32r/include/asm/opsput/opsput_lan.h
@@ -0,0 +1,52 @@
1#ifndef _OPSPUT_OPSPUT_LAN_H
2#define _OPSPUT_OPSPUT_LAN_H
3
4/*
5 * include/asm-m32r/opsput/opsput_lan.h
6 *
7 * OPSPUT-LAN board
8 *
9 * Copyright (c) 2002-2004 Takeo Takahashi, Mamoru Sakugawa
10 *
11 * This file is subject to the terms and conditions of the GNU General
12 * Public License. See the file "COPYING" in the main directory of
13 * this archive for more details.
14 */
15
16#ifndef __ASSEMBLY__
17/*
18 * C functions use non-cache address.
19 */
20#define OPSPUT_LAN_BASE (0x10000000 /* + NONCACHE_OFFSET */)
21#else
22#define OPSPUT_LAN_BASE (0x10000000 + NONCACHE_OFFSET)
23#endif /* __ASSEMBLY__ */
24
25/* ICU
26 * ICUISTS: status register
27 * ICUIREQ0: request register
28 * ICUIREQ1: request register
29 * ICUCR3: control register for CFIREQ# interrupt
30 * ICUCR4: control register for CFC Card insert interrupt
31 * ICUCR5: control register for CFC Card eject interrupt
32 * ICUCR6: control register for external interrupt
33 * ICUCR11: control register for MMC Card insert/eject interrupt
34 * ICUCR13: control register for SC error interrupt
35 * ICUCR14: control register for SC receive interrupt
36 * ICUCR15: control register for SC send interrupt
37 * ICUCR16: control register for SIO0 receive interrupt
38 * ICUCR17: control register for SIO0 send interrupt
39 */
40#define OPSPUT_LAN_IRQ_LAN (OPSPUT_LAN_PLD_IRQ_BASE + 1) /* LAN */
41#define OPSPUT_LAN_IRQ_I2C (OPSPUT_LAN_PLD_IRQ_BASE + 3) /* I2C */
42
43#define OPSPUT_LAN_ICUISTS __reg16(OPSPUT_LAN_BASE + 0xc0002)
44#define OPSPUT_LAN_ICUISTS_VECB_MASK (0xf000)
45#define OPSPUT_LAN_VECB(x) ((x) & OPSPUT_LAN_ICUISTS_VECB_MASK)
46#define OPSPUT_LAN_ICUISTS_ISN_MASK (0x07c0)
47#define OPSPUT_LAN_ICUISTS_ISN(x) ((x) & OPSPUT_LAN_ICUISTS_ISN_MASK)
48#define OPSPUT_LAN_ICUIREQ0 __reg16(OPSPUT_LAN_BASE + 0xc0004)
49#define OPSPUT_LAN_ICUCR1 __reg16(OPSPUT_LAN_BASE + 0xc0010)
50#define OPSPUT_LAN_ICUCR3 __reg16(OPSPUT_LAN_BASE + 0xc0014)
51
52#endif /* _OPSPUT_OPSPUT_LAN_H */
diff --git a/arch/m32r/include/asm/opsput/opsput_lcd.h b/arch/m32r/include/asm/opsput/opsput_lcd.h
new file mode 100644
index 000000000000..369c9f0832a6
--- /dev/null
+++ b/arch/m32r/include/asm/opsput/opsput_lcd.h
@@ -0,0 +1,55 @@
1#ifndef _OPSPUT_OPSPUT_LCD_H
2#define _OPSPUT_OPSPUT_LCD_H
3
4/*
5 * include/asm-m32r/opsput/opsput_lcd.h
6 *
7 * OPSPUT-LCD board
8 *
9 * Copyright (c) 2002 Takeo Takahashi
10 *
11 * This file is subject to the terms and conditions of the GNU General
12 * Public License. See the file "COPYING" in the main directory of
13 * this archive for more details.
14 */
15
16#ifndef __ASSEMBLY__
17/*
18 * C functions use non-cache address.
19 */
20#define OPSPUT_LCD_BASE (0x10000000 /* + NONCACHE_OFFSET */)
21#else
22#define OPSPUT_LCD_BASE (0x10000000 + NONCACHE_OFFSET)
23#endif /* __ASSEMBLY__ */
24
25/*
26 * ICU
27 */
28#define OPSPUT_LCD_IRQ_BAT_INT (OPSPUT_LCD_PLD_IRQ_BASE + 1)
29#define OPSPUT_LCD_IRQ_USB_INT1 (OPSPUT_LCD_PLD_IRQ_BASE + 2)
30#define OPSPUT_LCD_IRQ_AUDT0 (OPSPUT_LCD_PLD_IRQ_BASE + 3)
31#define OPSPUT_LCD_IRQ_AUDT2 (OPSPUT_LCD_PLD_IRQ_BASE + 4)
32#define OPSPUT_LCD_IRQ_BATSIO_RCV (OPSPUT_LCD_PLD_IRQ_BASE + 16)
33#define OPSPUT_LCD_IRQ_BATSIO_SND (OPSPUT_LCD_PLD_IRQ_BASE + 17)
34#define OPSPUT_LCD_IRQ_ASNDSIO_RCV (OPSPUT_LCD_PLD_IRQ_BASE + 18)
35#define OPSPUT_LCD_IRQ_ASNDSIO_SND (OPSPUT_LCD_PLD_IRQ_BASE + 19)
36#define OPSPUT_LCD_IRQ_ACNLSIO_SND (OPSPUT_LCD_PLD_IRQ_BASE + 21)
37
38#define OPSPUT_LCD_ICUISTS __reg16(OPSPUT_LCD_BASE + 0x300002)
39#define OPSPUT_LCD_ICUISTS_VECB_MASK (0xf000)
40#define OPSPUT_LCD_VECB(x) ((x) & OPSPUT_LCD_ICUISTS_VECB_MASK)
41#define OPSPUT_LCD_ICUISTS_ISN_MASK (0x07c0)
42#define OPSPUT_LCD_ICUISTS_ISN(x) ((x) & OPSPUT_LCD_ICUISTS_ISN_MASK)
43#define OPSPUT_LCD_ICUIREQ0 __reg16(OPSPUT_LCD_BASE + 0x300004)
44#define OPSPUT_LCD_ICUIREQ1 __reg16(OPSPUT_LCD_BASE + 0x300006)
45#define OPSPUT_LCD_ICUCR1 __reg16(OPSPUT_LCD_BASE + 0x300020)
46#define OPSPUT_LCD_ICUCR2 __reg16(OPSPUT_LCD_BASE + 0x300022)
47#define OPSPUT_LCD_ICUCR3 __reg16(OPSPUT_LCD_BASE + 0x300024)
48#define OPSPUT_LCD_ICUCR4 __reg16(OPSPUT_LCD_BASE + 0x300026)
49#define OPSPUT_LCD_ICUCR16 __reg16(OPSPUT_LCD_BASE + 0x300030)
50#define OPSPUT_LCD_ICUCR17 __reg16(OPSPUT_LCD_BASE + 0x300032)
51#define OPSPUT_LCD_ICUCR18 __reg16(OPSPUT_LCD_BASE + 0x300034)
52#define OPSPUT_LCD_ICUCR19 __reg16(OPSPUT_LCD_BASE + 0x300036)
53#define OPSPUT_LCD_ICUCR21 __reg16(OPSPUT_LCD_BASE + 0x30003a)
54
55#endif /* _OPSPUT_OPSPUT_LCD_H */
diff --git a/arch/m32r/include/asm/opsput/opsput_pld.h b/arch/m32r/include/asm/opsput/opsput_pld.h
new file mode 100644
index 000000000000..3f11ea1aac2d
--- /dev/null
+++ b/arch/m32r/include/asm/opsput/opsput_pld.h
@@ -0,0 +1,255 @@
1#ifndef _OPSPUT_OPSPUT_PLD_H
2#define _OPSPUT_OPSPUT_PLD_H
3
4/*
5 * include/asm-m32r/opsput/opsput_pld.h
6 *
7 * Definitions for Programable Logic Device(PLD) on OPSPUT board.
8 *
9 * Copyright (c) 2002 Takeo Takahashi
10 *
11 * This file is subject to the terms and conditions of the GNU General
12 * Public License. See the file "COPYING" in the main directory of
13 * this archive for more details.
14 */
15
16#define PLD_PLAT_BASE 0x1cc00000
17
18#ifndef __ASSEMBLY__
19/*
20 * C functions use non-cache address.
21 */
22#define PLD_BASE (PLD_PLAT_BASE /* + NONCACHE_OFFSET */)
23#define __reg8 (volatile unsigned char *)
24#define __reg16 (volatile unsigned short *)
25#define __reg32 (volatile unsigned int *)
26#else
27#define PLD_BASE (PLD_PLAT_BASE + NONCACHE_OFFSET)
28#define __reg8
29#define __reg16
30#define __reg32
31#endif /* __ASSEMBLY__ */
32
33/* CFC */
34#define PLD_CFRSTCR __reg16(PLD_BASE + 0x0000)
35#define PLD_CFSTS __reg16(PLD_BASE + 0x0002)
36#define PLD_CFIMASK __reg16(PLD_BASE + 0x0004)
37#define PLD_CFBUFCR __reg16(PLD_BASE + 0x0006)
38#define PLD_CFVENCR __reg16(PLD_BASE + 0x0008)
39#define PLD_CFCR0 __reg16(PLD_BASE + 0x000a)
40#define PLD_CFCR1 __reg16(PLD_BASE + 0x000c)
41#define PLD_IDERSTCR __reg16(PLD_BASE + 0x0010)
42
43/* MMC */
44#define PLD_MMCCR __reg16(PLD_BASE + 0x4000)
45#define PLD_MMCMOD __reg16(PLD_BASE + 0x4002)
46#define PLD_MMCSTS __reg16(PLD_BASE + 0x4006)
47#define PLD_MMCBAUR __reg16(PLD_BASE + 0x400a)
48#define PLD_MMCCMDBCUT __reg16(PLD_BASE + 0x400c)
49#define PLD_MMCCDTBCUT __reg16(PLD_BASE + 0x400e)
50#define PLD_MMCDET __reg16(PLD_BASE + 0x4010)
51#define PLD_MMCWP __reg16(PLD_BASE + 0x4012)
52#define PLD_MMCWDATA __reg16(PLD_BASE + 0x5000)
53#define PLD_MMCRDATA __reg16(PLD_BASE + 0x6000)
54#define PLD_MMCCMDDATA __reg16(PLD_BASE + 0x7000)
55#define PLD_MMCRSPDATA __reg16(PLD_BASE + 0x7006)
56
57/* ICU
58 * ICUISTS: status register
59 * ICUIREQ0: request register
60 * ICUIREQ1: request register
61 * ICUCR3: control register for CFIREQ# interrupt
62 * ICUCR4: control register for CFC Card insert interrupt
63 * ICUCR5: control register for CFC Card eject interrupt
64 * ICUCR6: control register for external interrupt
65 * ICUCR11: control register for MMC Card insert/eject interrupt
66 * ICUCR13: control register for SC error interrupt
67 * ICUCR14: control register for SC receive interrupt
68 * ICUCR15: control register for SC send interrupt
69 * ICUCR16: control register for SIO0 receive interrupt
70 * ICUCR17: control register for SIO0 send interrupt
71 */
72#if !defined(CONFIG_PLAT_USRV)
73#define PLD_IRQ_INT0 (OPSPUT_PLD_IRQ_BASE + 0) /* None */
74#define PLD_IRQ_INT1 (OPSPUT_PLD_IRQ_BASE + 1) /* reserved */
75#define PLD_IRQ_INT2 (OPSPUT_PLD_IRQ_BASE + 2) /* reserved */
76#define PLD_IRQ_CFIREQ (OPSPUT_PLD_IRQ_BASE + 3) /* CF IREQ */
77#define PLD_IRQ_CFC_INSERT (OPSPUT_PLD_IRQ_BASE + 4) /* CF Insert */
78#define PLD_IRQ_CFC_EJECT (OPSPUT_PLD_IRQ_BASE + 5) /* CF Eject */
79#define PLD_IRQ_EXINT (OPSPUT_PLD_IRQ_BASE + 6) /* EXINT */
80#define PLD_IRQ_INT7 (OPSPUT_PLD_IRQ_BASE + 7) /* reserved */
81#define PLD_IRQ_INT8 (OPSPUT_PLD_IRQ_BASE + 8) /* reserved */
82#define PLD_IRQ_INT9 (OPSPUT_PLD_IRQ_BASE + 9) /* reserved */
83#define PLD_IRQ_INT10 (OPSPUT_PLD_IRQ_BASE + 10) /* reserved */
84#define PLD_IRQ_MMCCARD (OPSPUT_PLD_IRQ_BASE + 11) /* MMC Insert/Eject */
85#define PLD_IRQ_INT12 (OPSPUT_PLD_IRQ_BASE + 12) /* reserved */
86#define PLD_IRQ_SC_ERROR (OPSPUT_PLD_IRQ_BASE + 13) /* SC error */
87#define PLD_IRQ_SC_RCV (OPSPUT_PLD_IRQ_BASE + 14) /* SC receive */
88#define PLD_IRQ_SC_SND (OPSPUT_PLD_IRQ_BASE + 15) /* SC send */
89#define PLD_IRQ_SIO0_RCV (OPSPUT_PLD_IRQ_BASE + 16) /* SIO receive */
90#define PLD_IRQ_SIO0_SND (OPSPUT_PLD_IRQ_BASE + 17) /* SIO send */
91#define PLD_IRQ_INT18 (OPSPUT_PLD_IRQ_BASE + 18) /* reserved */
92#define PLD_IRQ_INT19 (OPSPUT_PLD_IRQ_BASE + 19) /* reserved */
93#define PLD_IRQ_INT20 (OPSPUT_PLD_IRQ_BASE + 20) /* reserved */
94#define PLD_IRQ_INT21 (OPSPUT_PLD_IRQ_BASE + 21) /* reserved */
95#define PLD_IRQ_INT22 (OPSPUT_PLD_IRQ_BASE + 22) /* reserved */
96#define PLD_IRQ_INT23 (OPSPUT_PLD_IRQ_BASE + 23) /* reserved */
97#define PLD_IRQ_INT24 (OPSPUT_PLD_IRQ_BASE + 24) /* reserved */
98#define PLD_IRQ_INT25 (OPSPUT_PLD_IRQ_BASE + 25) /* reserved */
99#define PLD_IRQ_INT26 (OPSPUT_PLD_IRQ_BASE + 26) /* reserved */
100#define PLD_IRQ_INT27 (OPSPUT_PLD_IRQ_BASE + 27) /* reserved */
101#define PLD_IRQ_INT28 (OPSPUT_PLD_IRQ_BASE + 28) /* reserved */
102#define PLD_IRQ_INT29 (OPSPUT_PLD_IRQ_BASE + 29) /* reserved */
103#define PLD_IRQ_INT30 (OPSPUT_PLD_IRQ_BASE + 30) /* reserved */
104#define PLD_IRQ_INT31 (OPSPUT_PLD_IRQ_BASE + 31) /* reserved */
105
106#else /* CONFIG_PLAT_USRV */
107
108#define PLD_IRQ_INT0 (OPSPUT_PLD_IRQ_BASE + 0) /* None */
109#define PLD_IRQ_INT1 (OPSPUT_PLD_IRQ_BASE + 1) /* reserved */
110#define PLD_IRQ_INT2 (OPSPUT_PLD_IRQ_BASE + 2) /* reserved */
111#define PLD_IRQ_CF0 (OPSPUT_PLD_IRQ_BASE + 3) /* CF0# */
112#define PLD_IRQ_CF1 (OPSPUT_PLD_IRQ_BASE + 4) /* CF1# */
113#define PLD_IRQ_CF2 (OPSPUT_PLD_IRQ_BASE + 5) /* CF2# */
114#define PLD_IRQ_CF3 (OPSPUT_PLD_IRQ_BASE + 6) /* CF3# */
115#define PLD_IRQ_CF4 (OPSPUT_PLD_IRQ_BASE + 7) /* CF4# */
116#define PLD_IRQ_INT8 (OPSPUT_PLD_IRQ_BASE + 8) /* reserved */
117#define PLD_IRQ_INT9 (OPSPUT_PLD_IRQ_BASE + 9) /* reserved */
118#define PLD_IRQ_INT10 (OPSPUT_PLD_IRQ_BASE + 10) /* reserved */
119#define PLD_IRQ_INT11 (OPSPUT_PLD_IRQ_BASE + 11) /* reserved */
120#define PLD_IRQ_UART0 (OPSPUT_PLD_IRQ_BASE + 12) /* UARTIRQ0 */
121#define PLD_IRQ_UART1 (OPSPUT_PLD_IRQ_BASE + 13) /* UARTIRQ1 */
122#define PLD_IRQ_INT14 (OPSPUT_PLD_IRQ_BASE + 14) /* reserved */
123#define PLD_IRQ_INT15 (OPSPUT_PLD_IRQ_BASE + 15) /* reserved */
124#define PLD_IRQ_SNDINT (OPSPUT_PLD_IRQ_BASE + 16) /* SNDINT# */
125#define PLD_IRQ_INT17 (OPSPUT_PLD_IRQ_BASE + 17) /* reserved */
126#define PLD_IRQ_INT18 (OPSPUT_PLD_IRQ_BASE + 18) /* reserved */
127#define PLD_IRQ_INT19 (OPSPUT_PLD_IRQ_BASE + 19) /* reserved */
128#define PLD_IRQ_INT20 (OPSPUT_PLD_IRQ_BASE + 20) /* reserved */
129#define PLD_IRQ_INT21 (OPSPUT_PLD_IRQ_BASE + 21) /* reserved */
130#define PLD_IRQ_INT22 (OPSPUT_PLD_IRQ_BASE + 22) /* reserved */
131#define PLD_IRQ_INT23 (OPSPUT_PLD_IRQ_BASE + 23) /* reserved */
132#define PLD_IRQ_INT24 (OPSPUT_PLD_IRQ_BASE + 24) /* reserved */
133#define PLD_IRQ_INT25 (OPSPUT_PLD_IRQ_BASE + 25) /* reserved */
134#define PLD_IRQ_INT26 (OPSPUT_PLD_IRQ_BASE + 26) /* reserved */
135#define PLD_IRQ_INT27 (OPSPUT_PLD_IRQ_BASE + 27) /* reserved */
136#define PLD_IRQ_INT28 (OPSPUT_PLD_IRQ_BASE + 28) /* reserved */
137#define PLD_IRQ_INT29 (OPSPUT_PLD_IRQ_BASE + 29) /* reserved */
138#define PLD_IRQ_INT30 (OPSPUT_PLD_IRQ_BASE + 30) /* reserved */
139
140#endif /* CONFIG_PLAT_USRV */
141
142#define PLD_ICUISTS __reg16(PLD_BASE + 0x8002)
143#define PLD_ICUISTS_VECB_MASK (0xf000)
144#define PLD_ICUISTS_VECB(x) ((x) & PLD_ICUISTS_VECB_MASK)
145#define PLD_ICUISTS_ISN_MASK (0x07c0)
146#define PLD_ICUISTS_ISN(x) ((x) & PLD_ICUISTS_ISN_MASK)
147#define PLD_ICUIREQ0 __reg16(PLD_BASE + 0x8004)
148#define PLD_ICUIREQ1 __reg16(PLD_BASE + 0x8006)
149#define PLD_ICUCR1 __reg16(PLD_BASE + 0x8100)
150#define PLD_ICUCR2 __reg16(PLD_BASE + 0x8102)
151#define PLD_ICUCR3 __reg16(PLD_BASE + 0x8104)
152#define PLD_ICUCR4 __reg16(PLD_BASE + 0x8106)
153#define PLD_ICUCR5 __reg16(PLD_BASE + 0x8108)
154#define PLD_ICUCR6 __reg16(PLD_BASE + 0x810a)
155#define PLD_ICUCR7 __reg16(PLD_BASE + 0x810c)
156#define PLD_ICUCR8 __reg16(PLD_BASE + 0x810e)
157#define PLD_ICUCR9 __reg16(PLD_BASE + 0x8110)
158#define PLD_ICUCR10 __reg16(PLD_BASE + 0x8112)
159#define PLD_ICUCR11 __reg16(PLD_BASE + 0x8114)
160#define PLD_ICUCR12 __reg16(PLD_BASE + 0x8116)
161#define PLD_ICUCR13 __reg16(PLD_BASE + 0x8118)
162#define PLD_ICUCR14 __reg16(PLD_BASE + 0x811a)
163#define PLD_ICUCR15 __reg16(PLD_BASE + 0x811c)
164#define PLD_ICUCR16 __reg16(PLD_BASE + 0x811e)
165#define PLD_ICUCR17 __reg16(PLD_BASE + 0x8120)
166#define PLD_ICUCR_IEN (0x1000)
167#define PLD_ICUCR_IREQ (0x0100)
168#define PLD_ICUCR_ISMOD00 (0x0000) /* Low edge */
169#define PLD_ICUCR_ISMOD01 (0x0010) /* Low level */
170#define PLD_ICUCR_ISMOD02 (0x0020) /* High edge */
171#define PLD_ICUCR_ISMOD03 (0x0030) /* High level */
172#define PLD_ICUCR_ILEVEL0 (0x0000)
173#define PLD_ICUCR_ILEVEL1 (0x0001)
174#define PLD_ICUCR_ILEVEL2 (0x0002)
175#define PLD_ICUCR_ILEVEL3 (0x0003)
176#define PLD_ICUCR_ILEVEL4 (0x0004)
177#define PLD_ICUCR_ILEVEL5 (0x0005)
178#define PLD_ICUCR_ILEVEL6 (0x0006)
179#define PLD_ICUCR_ILEVEL7 (0x0007)
180
181/* Power Control of MMC and CF */
182#define PLD_CPCR __reg16(PLD_BASE + 0x14000)
183#define PLD_CPCR_CF 0x0001
184#define PLD_CPCR_MMC 0x0002
185
186/* LED Control
187 *
188 * 1: DIP swich side
189 * 2: Reset switch side
190 */
191#define PLD_IOLEDCR __reg16(PLD_BASE + 0x14002)
192#define PLD_IOLED_1_ON 0x001
193#define PLD_IOLED_1_OFF 0x000
194#define PLD_IOLED_2_ON 0x002
195#define PLD_IOLED_2_OFF 0x000
196
197/* DIP Switch
198 * 0: Write-protect of Flash Memory (0:protected, 1:non-protected)
199 * 1: -
200 * 2: -
201 * 3: -
202 */
203#define PLD_IOSWSTS __reg16(PLD_BASE + 0x14004)
204#define PLD_IOSWSTS_IOSW2 0x0200
205#define PLD_IOSWSTS_IOSW1 0x0100
206#define PLD_IOSWSTS_IOWP0 0x0001
207
208/* CRC */
209#define PLD_CRC7DATA __reg16(PLD_BASE + 0x18000)
210#define PLD_CRC7INDATA __reg16(PLD_BASE + 0x18002)
211#define PLD_CRC16DATA __reg16(PLD_BASE + 0x18004)
212#define PLD_CRC16INDATA __reg16(PLD_BASE + 0x18006)
213#define PLD_CRC16ADATA __reg16(PLD_BASE + 0x18008)
214#define PLD_CRC16AINDATA __reg16(PLD_BASE + 0x1800a)
215
216/* RTC */
217#define PLD_RTCCR __reg16(PLD_BASE + 0x1c000)
218#define PLD_RTCBAUR __reg16(PLD_BASE + 0x1c002)
219#define PLD_RTCWRDATA __reg16(PLD_BASE + 0x1c004)
220#define PLD_RTCRDDATA __reg16(PLD_BASE + 0x1c006)
221#define PLD_RTCRSTODT __reg16(PLD_BASE + 0x1c008)
222
223/* SIO0 */
224#define PLD_ESIO0CR __reg16(PLD_BASE + 0x20000)
225#define PLD_ESIO0CR_TXEN 0x0001
226#define PLD_ESIO0CR_RXEN 0x0002
227#define PLD_ESIO0MOD0 __reg16(PLD_BASE + 0x20002)
228#define PLD_ESIO0MOD0_CTSS 0x0040
229#define PLD_ESIO0MOD0_RTSS 0x0080
230#define PLD_ESIO0MOD1 __reg16(PLD_BASE + 0x20004)
231#define PLD_ESIO0MOD1_LMFS 0x0010
232#define PLD_ESIO0STS __reg16(PLD_BASE + 0x20006)
233#define PLD_ESIO0STS_TEMP 0x0001
234#define PLD_ESIO0STS_TXCP 0x0002
235#define PLD_ESIO0STS_RXCP 0x0004
236#define PLD_ESIO0STS_TXSC 0x0100
237#define PLD_ESIO0STS_RXSC 0x0200
238#define PLD_ESIO0STS_TXREADY (PLD_ESIO0STS_TXCP | PLD_ESIO0STS_TEMP)
239#define PLD_ESIO0INTCR __reg16(PLD_BASE + 0x20008)
240#define PLD_ESIO0INTCR_TXIEN 0x0002
241#define PLD_ESIO0INTCR_RXCEN 0x0004
242#define PLD_ESIO0BAUR __reg16(PLD_BASE + 0x2000a)
243#define PLD_ESIO0TXB __reg16(PLD_BASE + 0x2000c)
244#define PLD_ESIO0RXB __reg16(PLD_BASE + 0x2000e)
245
246/* SIM Card */
247#define PLD_SCCR __reg16(PLD_BASE + 0x38000)
248#define PLD_SCMOD __reg16(PLD_BASE + 0x38004)
249#define PLD_SCSTS __reg16(PLD_BASE + 0x38006)
250#define PLD_SCINTCR __reg16(PLD_BASE + 0x38008)
251#define PLD_SCBAUR __reg16(PLD_BASE + 0x3800a)
252#define PLD_SCTXB __reg16(PLD_BASE + 0x3800c)
253#define PLD_SCRXB __reg16(PLD_BASE + 0x3800e)
254
255#endif /* _OPSPUT_OPSPUT_PLD.H */
diff --git a/arch/m32r/include/asm/page.h b/arch/m32r/include/asm/page.h
new file mode 100644
index 000000000000..c9333089fe11
--- /dev/null
+++ b/arch/m32r/include/asm/page.h
@@ -0,0 +1,87 @@
1#ifndef _ASM_M32R_PAGE_H
2#define _ASM_M32R_PAGE_H
3
4/* PAGE_SHIFT determines the page size */
5#define PAGE_SHIFT 12
6#define PAGE_SIZE (1UL << PAGE_SHIFT)
7#define PAGE_MASK (~(PAGE_SIZE-1))
8
9#ifndef __ASSEMBLY__
10
11extern void clear_page(void *to);
12extern void copy_page(void *to, void *from);
13
14#define clear_user_page(page, vaddr, pg) clear_page(page)
15#define copy_user_page(to, from, vaddr, pg) copy_page(to, from)
16
17#define __alloc_zeroed_user_highpage(movableflags, vma, vaddr) \
18 alloc_page_vma(GFP_HIGHUSER | __GFP_ZERO | movableflags, vma, vaddr)
19#define __HAVE_ARCH_ALLOC_ZEROED_USER_HIGHPAGE
20
21/*
22 * These are used to make use of C type-checking..
23 */
24typedef struct { unsigned long pte; } pte_t;
25typedef struct { unsigned long pmd; } pmd_t;
26typedef struct { unsigned long pgd; } pgd_t;
27#define pte_val(x) ((x).pte)
28#define PTE_MASK PAGE_MASK
29
30typedef struct { unsigned long pgprot; } pgprot_t;
31typedef struct page *pgtable_t;
32
33#define pmd_val(x) ((x).pmd)
34#define pgd_val(x) ((x).pgd)
35#define pgprot_val(x) ((x).pgprot)
36
37#define __pte(x) ((pte_t) { (x) } )
38#define __pmd(x) ((pmd_t) { (x) } )
39#define __pgd(x) ((pgd_t) { (x) } )
40#define __pgprot(x) ((pgprot_t) { (x) } )
41
42#endif /* !__ASSEMBLY__ */
43
44/*
45 * This handles the memory map.. We could make this a config
46 * option, but too many people screw it up, and too few need
47 * it.
48 *
49 * A __PAGE_OFFSET of 0xC0000000 means that the kernel has
50 * a virtual address space of one gigabyte, which limits the
51 * amount of physical memory you can use to about 950MB.
52 *
53 * If you want more physical memory than this then see the CONFIG_HIGHMEM4G
54 * and CONFIG_HIGHMEM64G options in the kernel configuration.
55 */
56
57#define __MEMORY_START CONFIG_MEMORY_START
58#define __MEMORY_SIZE CONFIG_MEMORY_SIZE
59
60#ifdef CONFIG_MMU
61#define __PAGE_OFFSET (0x80000000)
62#else
63#define __PAGE_OFFSET (0x00000000)
64#endif
65
66#define PAGE_OFFSET ((unsigned long)__PAGE_OFFSET)
67#define __pa(x) ((unsigned long)(x) - PAGE_OFFSET)
68#define __va(x) ((void *)((unsigned long)(x) + PAGE_OFFSET))
69
70#ifndef CONFIG_DISCONTIGMEM
71#define PFN_BASE (CONFIG_MEMORY_START >> PAGE_SHIFT)
72#define ARCH_PFN_OFFSET PFN_BASE
73#define pfn_valid(pfn) (((pfn) - PFN_BASE) < max_mapnr)
74#endif /* !CONFIG_DISCONTIGMEM */
75
76#define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT)
77#define virt_addr_valid(kaddr) pfn_valid(__pa(kaddr) >> PAGE_SHIFT)
78
79#define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \
80 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC )
81
82#define devmem_is_allowed(x) 1
83
84#include <asm-generic/memory_model.h>
85#include <asm-generic/page.h>
86
87#endif /* _ASM_M32R_PAGE_H */
diff --git a/arch/m32r/include/asm/param.h b/arch/m32r/include/asm/param.h
new file mode 100644
index 000000000000..94c770196048
--- /dev/null
+++ b/arch/m32r/include/asm/param.h
@@ -0,0 +1,23 @@
1#ifndef _ASM_M32R_PARAM_H
2#define _ASM_M32R_PARAM_H
3
4#ifdef __KERNEL__
5# define HZ CONFIG_HZ /* Internal kernel timer frequency */
6# define USER_HZ 100 /* .. some user interfaces are in "ticks" */
7# define CLOCKS_PER_SEC (USER_HZ) /* like times() */
8#endif
9
10#ifndef HZ
11#define HZ 100
12#endif
13
14#define EXEC_PAGESIZE 4096
15
16#ifndef NOGROUP
17#define NOGROUP (-1)
18#endif
19
20#define MAXHOSTNAMELEN 64 /* max length of hostname */
21
22#endif /* _ASM_M32R_PARAM_H */
23
diff --git a/arch/m32r/include/asm/pci.h b/arch/m32r/include/asm/pci.h
new file mode 100644
index 000000000000..fe785d167db6
--- /dev/null
+++ b/arch/m32r/include/asm/pci.h
@@ -0,0 +1,8 @@
1#ifndef _ASM_M32R_PCI_H
2#define _ASM_M32R_PCI_H
3
4#include <asm-generic/pci.h>
5
6#define PCI_DMA_BUS_IS_PHYS (1)
7
8#endif /* _ASM_M32R_PCI_H */
diff --git a/arch/m32r/include/asm/percpu.h b/arch/m32r/include/asm/percpu.h
new file mode 100644
index 000000000000..e3169301fe66
--- /dev/null
+++ b/arch/m32r/include/asm/percpu.h
@@ -0,0 +1,6 @@
1#ifndef __ARCH_M32R_PERCPU__
2#define __ARCH_M32R_PERCPU__
3
4#include <asm-generic/percpu.h>
5
6#endif /* __ARCH_M32R_PERCPU__ */
diff --git a/arch/m32r/include/asm/pgalloc.h b/arch/m32r/include/asm/pgalloc.h
new file mode 100644
index 000000000000..f11a2b909cdb
--- /dev/null
+++ b/arch/m32r/include/asm/pgalloc.h
@@ -0,0 +1,76 @@
1#ifndef _ASM_M32R_PGALLOC_H
2#define _ASM_M32R_PGALLOC_H
3
4#include <linux/mm.h>
5
6#include <asm/io.h>
7
8#define pmd_populate_kernel(mm, pmd, pte) \
9 set_pmd(pmd, __pmd(_PAGE_TABLE + __pa(pte)))
10
11static __inline__ void pmd_populate(struct mm_struct *mm, pmd_t *pmd,
12 pgtable_t pte)
13{
14 set_pmd(pmd, __pmd(_PAGE_TABLE + page_to_phys(pte)));
15}
16#define pmd_pgtable(pmd) pmd_page(pmd)
17
18/*
19 * Allocate and free page tables.
20 */
21static __inline__ pgd_t *pgd_alloc(struct mm_struct *mm)
22{
23 pgd_t *pgd = (pgd_t *)__get_free_page(GFP_KERNEL|__GFP_ZERO);
24
25 return pgd;
26}
27
28static inline void pgd_free(struct mm_struct *mm, pgd_t *pgd)
29{
30 free_page((unsigned long)pgd);
31}
32
33static __inline__ pte_t *pte_alloc_one_kernel(struct mm_struct *mm,
34 unsigned long address)
35{
36 pte_t *pte = (pte_t *)__get_free_page(GFP_KERNEL|__GFP_ZERO);
37
38 return pte;
39}
40
41static __inline__ pgtable_t pte_alloc_one(struct mm_struct *mm,
42 unsigned long address)
43{
44 struct page *pte = alloc_page(GFP_KERNEL|__GFP_ZERO);
45
46 pgtable_page_ctor(pte);
47 return pte;
48}
49
50static inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte)
51{
52 free_page((unsigned long)pte);
53}
54
55static inline void pte_free(struct mm_struct *mm, pgtable_t pte)
56{
57 pgtable_page_dtor(pte);
58 __free_page(pte);
59}
60
61#define __pte_free_tlb(tlb, pte) pte_free((tlb)->mm, (pte))
62
63/*
64 * allocating and freeing a pmd is trivial: the 1-entry pmd is
65 * inside the pgd, so has no extra memory associated with it.
66 * (In the PAE case we free the pmds as part of the pgd.)
67 */
68
69#define pmd_alloc_one(mm, addr) ({ BUG(); ((pmd_t *)2); })
70#define pmd_free(mm, x) do { } while (0)
71#define __pmd_free_tlb(tlb, x) do { } while (0)
72#define pgd_populate(mm, pmd, pte) BUG()
73
74#define check_pgt_cache() do { } while (0)
75
76#endif /* _ASM_M32R_PGALLOC_H */
diff --git a/arch/m32r/include/asm/pgtable-2level.h b/arch/m32r/include/asm/pgtable-2level.h
new file mode 100644
index 000000000000..bca3475f9595
--- /dev/null
+++ b/arch/m32r/include/asm/pgtable-2level.h
@@ -0,0 +1,78 @@
1#ifndef _ASM_M32R_PGTABLE_2LEVEL_H
2#define _ASM_M32R_PGTABLE_2LEVEL_H
3#ifdef __KERNEL__
4
5/*
6 * traditional M32R two-level paging structure:
7 */
8
9#define PGDIR_SHIFT 22
10#define PTRS_PER_PGD 1024
11
12/*
13 * the M32R is two-level, so we don't really have any
14 * PMD directory physically.
15 */
16#define PMD_SHIFT 22
17#define PTRS_PER_PMD 1
18
19#define PTRS_PER_PTE 1024
20
21#define pte_ERROR(e) \
22 printk("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e))
23#define pmd_ERROR(e) \
24 printk("%s:%d: bad pmd %08lx.\n", __FILE__, __LINE__, pmd_val(e))
25#define pgd_ERROR(e) \
26 printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e))
27
28/*
29 * The "pgd_xxx()" functions here are trivial for a folded two-level
30 * setup: the pgd is never bad, and a pmd always exists (as it's folded
31 * into the pgd entry)
32 */
33static inline int pgd_none(pgd_t pgd) { return 0; }
34static inline int pgd_bad(pgd_t pgd) { return 0; }
35static inline int pgd_present(pgd_t pgd) { return 1; }
36#define pgd_clear(xp) do { } while (0)
37
38/*
39 * Certain architectures need to do special things when PTEs
40 * within a page table are directly modified. Thus, the following
41 * hook is made available.
42 */
43#define set_pte(pteptr, pteval) (*(pteptr) = pteval)
44#define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval)
45
46/*
47 * (pmds are folded into pgds so this doesnt get actually called,
48 * but the define is needed for a generic inline function.)
49 */
50#define set_pmd(pmdptr, pmdval) (*(pmdptr) = pmdval)
51#define set_pgd(pgdptr, pgdval) (*(pgdptr) = pgdval)
52
53#define pgd_page_vaddr(pgd) \
54((unsigned long) __va(pgd_val(pgd) & PAGE_MASK))
55
56#ifndef CONFIG_DISCONTIGMEM
57#define pgd_page(pgd) (mem_map + ((pgd_val(pgd) >> PAGE_SHIFT) - PFN_BASE))
58#endif /* !CONFIG_DISCONTIGMEM */
59
60static inline pmd_t *pmd_offset(pgd_t * dir, unsigned long address)
61{
62 return (pmd_t *) dir;
63}
64
65#define ptep_get_and_clear(mm,addr,xp) __pte(xchg(&(xp)->pte, 0))
66#define pte_same(a, b) (pte_val(a) == pte_val(b))
67#define pte_page(x) pfn_to_page(pte_pfn(x))
68#define pte_none(x) (!pte_val(x))
69#define pte_pfn(x) (pte_val(x) >> PAGE_SHIFT)
70#define pfn_pte(pfn, prot) __pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot))
71#define pfn_pmd(pfn, prot) __pmd(((pfn) << PAGE_SHIFT) | pgprot_val(prot))
72
73#define PTE_FILE_MAX_BITS 29
74#define pte_to_pgoff(pte) (((pte_val(pte) >> 2) & 0x7f) | (((pte_val(pte) >> 10)) << 7))
75#define pgoff_to_pte(off) ((pte_t) { (((off) & 0x7f) << 2) | (((off) >> 7) << 10) | _PAGE_FILE })
76
77#endif /* __KERNEL__ */
78#endif /* _ASM_M32R_PGTABLE_2LEVEL_H */
diff --git a/arch/m32r/include/asm/pgtable.h b/arch/m32r/include/asm/pgtable.h
new file mode 100644
index 000000000000..e6359c566b50
--- /dev/null
+++ b/arch/m32r/include/asm/pgtable.h
@@ -0,0 +1,363 @@
1#ifndef _ASM_M32R_PGTABLE_H
2#define _ASM_M32R_PGTABLE_H
3
4#include <asm-generic/4level-fixup.h>
5
6#ifdef __KERNEL__
7/*
8 * The Linux memory management assumes a three-level page table setup. On
9 * the M32R, we use that, but "fold" the mid level into the top-level page
10 * table, so that we physically have the same two-level page table as the
11 * M32R mmu expects.
12 *
13 * This file contains the functions and defines necessary to modify and use
14 * the M32R page table tree.
15 */
16
17/* CAUTION!: If you change macro definitions in this file, you might have to
18 * change arch/m32r/mmu.S manually.
19 */
20
21#ifndef __ASSEMBLY__
22
23#include <linux/threads.h>
24#include <linux/bitops.h>
25#include <asm/processor.h>
26#include <asm/addrspace.h>
27#include <asm/page.h>
28
29struct mm_struct;
30struct vm_area_struct;
31
32extern pgd_t swapper_pg_dir[1024];
33extern void paging_init(void);
34
35/*
36 * ZERO_PAGE is a global shared page that is always zero: used
37 * for zero-mapped memory areas etc..
38 */
39extern unsigned long empty_zero_page[1024];
40#define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
41
42#endif /* !__ASSEMBLY__ */
43
44#ifndef __ASSEMBLY__
45#include <asm/pgtable-2level.h>
46#endif
47
48#define pgtable_cache_init() do { } while (0)
49
50#define PMD_SIZE (1UL << PMD_SHIFT)
51#define PMD_MASK (~(PMD_SIZE - 1))
52#define PGDIR_SIZE (1UL << PGDIR_SHIFT)
53#define PGDIR_MASK (~(PGDIR_SIZE - 1))
54
55#define USER_PTRS_PER_PGD (TASK_SIZE / PGDIR_SIZE)
56#define FIRST_USER_ADDRESS 0
57
58#ifndef __ASSEMBLY__
59/* Just any arbitrary offset to the start of the vmalloc VM area: the
60 * current 8MB value just means that there will be a 8MB "hole" after the
61 * physical memory until the kernel virtual memory starts. That means that
62 * any out-of-bounds memory accesses will hopefully be caught.
63 * The vmalloc() routines leaves a hole of 4kB between each vmalloced
64 * area for the same reason. ;)
65 */
66#define VMALLOC_START KSEG2
67#define VMALLOC_END KSEG3
68
69/*
70 * M32R TLB format
71 *
72 * [0] [1:19] [20:23] [24:31]
73 * +-----------------------+----+-------------+
74 * | VPN |0000| ASID |
75 * +-----------------------+----+-------------+
76 * +-+---------------------+----+-+---+-+-+-+-+
77 * |0 PPN |0000|N|AC |L|G|V| |
78 * +-+---------------------+----+-+---+-+-+-+-+
79 * RWX
80 */
81
82#define _PAGE_BIT_DIRTY 0 /* software: page changed */
83#define _PAGE_BIT_FILE 0 /* when !present: nonlinear file
84 mapping */
85#define _PAGE_BIT_PRESENT 1 /* Valid: page is valid */
86#define _PAGE_BIT_GLOBAL 2 /* Global */
87#define _PAGE_BIT_LARGE 3 /* Large */
88#define _PAGE_BIT_EXEC 4 /* Execute */
89#define _PAGE_BIT_WRITE 5 /* Write */
90#define _PAGE_BIT_READ 6 /* Read */
91#define _PAGE_BIT_NONCACHABLE 7 /* Non cachable */
92#define _PAGE_BIT_ACCESSED 8 /* software: page referenced */
93#define _PAGE_BIT_PROTNONE 9 /* software: if not present */
94
95#define _PAGE_DIRTY (1UL << _PAGE_BIT_DIRTY)
96#define _PAGE_FILE (1UL << _PAGE_BIT_FILE)
97#define _PAGE_PRESENT (1UL << _PAGE_BIT_PRESENT)
98#define _PAGE_GLOBAL (1UL << _PAGE_BIT_GLOBAL)
99#define _PAGE_LARGE (1UL << _PAGE_BIT_LARGE)
100#define _PAGE_EXEC (1UL << _PAGE_BIT_EXEC)
101#define _PAGE_WRITE (1UL << _PAGE_BIT_WRITE)
102#define _PAGE_READ (1UL << _PAGE_BIT_READ)
103#define _PAGE_NONCACHABLE (1UL << _PAGE_BIT_NONCACHABLE)
104#define _PAGE_ACCESSED (1UL << _PAGE_BIT_ACCESSED)
105#define _PAGE_PROTNONE (1UL << _PAGE_BIT_PROTNONE)
106
107#define _PAGE_TABLE \
108 ( _PAGE_PRESENT | _PAGE_WRITE | _PAGE_READ | _PAGE_ACCESSED \
109 | _PAGE_DIRTY )
110#define _KERNPG_TABLE \
111 ( _PAGE_PRESENT | _PAGE_WRITE | _PAGE_READ | _PAGE_ACCESSED \
112 | _PAGE_DIRTY )
113#define _PAGE_CHG_MASK \
114 ( PTE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY )
115
116#ifdef CONFIG_MMU
117#define PAGE_NONE \
118 __pgprot(_PAGE_PROTNONE | _PAGE_ACCESSED)
119#define PAGE_SHARED \
120 __pgprot(_PAGE_PRESENT | _PAGE_WRITE | _PAGE_READ | _PAGE_ACCESSED)
121#define PAGE_SHARED_EXEC \
122 __pgprot(_PAGE_PRESENT | _PAGE_EXEC | _PAGE_WRITE | _PAGE_READ \
123 | _PAGE_ACCESSED)
124#define PAGE_COPY \
125 __pgprot(_PAGE_PRESENT | _PAGE_READ | _PAGE_ACCESSED)
126#define PAGE_COPY_EXEC \
127 __pgprot(_PAGE_PRESENT | _PAGE_EXEC | _PAGE_READ | _PAGE_ACCESSED)
128#define PAGE_READONLY \
129 __pgprot(_PAGE_PRESENT | _PAGE_READ | _PAGE_ACCESSED)
130#define PAGE_READONLY_EXEC \
131 __pgprot(_PAGE_PRESENT | _PAGE_EXEC | _PAGE_READ | _PAGE_ACCESSED)
132
133#define __PAGE_KERNEL \
134 ( _PAGE_PRESENT | _PAGE_EXEC | _PAGE_WRITE | _PAGE_READ | _PAGE_DIRTY \
135 | _PAGE_ACCESSED )
136#define __PAGE_KERNEL_RO ( __PAGE_KERNEL & ~_PAGE_WRITE )
137#define __PAGE_KERNEL_NOCACHE ( __PAGE_KERNEL | _PAGE_NONCACHABLE)
138
139#define MAKE_GLOBAL(x) __pgprot((x) | _PAGE_GLOBAL)
140
141#define PAGE_KERNEL MAKE_GLOBAL(__PAGE_KERNEL)
142#define PAGE_KERNEL_RO MAKE_GLOBAL(__PAGE_KERNEL_RO)
143#define PAGE_KERNEL_NOCACHE MAKE_GLOBAL(__PAGE_KERNEL_NOCACHE)
144
145#else
146#define PAGE_NONE __pgprot(0)
147#define PAGE_SHARED __pgprot(0)
148#define PAGE_SHARED_EXEC __pgprot(0)
149#define PAGE_COPY __pgprot(0)
150#define PAGE_COPY_EXEC __pgprot(0)
151#define PAGE_READONLY __pgprot(0)
152#define PAGE_READONLY_EXEC __pgprot(0)
153
154#define PAGE_KERNEL __pgprot(0)
155#define PAGE_KERNEL_RO __pgprot(0)
156#define PAGE_KERNEL_NOCACHE __pgprot(0)
157#endif /* CONFIG_MMU */
158
159 /* xwr */
160#define __P000 PAGE_NONE
161#define __P001 PAGE_READONLY
162#define __P010 PAGE_COPY
163#define __P011 PAGE_COPY
164#define __P100 PAGE_READONLY_EXEC
165#define __P101 PAGE_READONLY_EXEC
166#define __P110 PAGE_COPY_EXEC
167#define __P111 PAGE_COPY_EXEC
168
169#define __S000 PAGE_NONE
170#define __S001 PAGE_READONLY
171#define __S010 PAGE_SHARED
172#define __S011 PAGE_SHARED
173#define __S100 PAGE_READONLY_EXEC
174#define __S101 PAGE_READONLY_EXEC
175#define __S110 PAGE_SHARED_EXEC
176#define __S111 PAGE_SHARED_EXEC
177
178/* page table for 0-4MB for everybody */
179
180#define pte_present(x) (pte_val(x) & (_PAGE_PRESENT | _PAGE_PROTNONE))
181#define pte_clear(mm,addr,xp) do { set_pte_at(mm, addr, xp, __pte(0)); } while (0)
182
183#define pmd_none(x) (!pmd_val(x))
184#define pmd_present(x) (pmd_val(x) & _PAGE_PRESENT)
185#define pmd_clear(xp) do { set_pmd(xp, __pmd(0)); } while (0)
186#define pmd_bad(x) ((pmd_val(x) & ~PAGE_MASK) != _KERNPG_TABLE)
187
188#define pages_to_mb(x) ((x) >> (20 - PAGE_SHIFT))
189
190/*
191 * The following only work if pte_present() is true.
192 * Undefined behaviour if not..
193 */
194static inline int pte_dirty(pte_t pte)
195{
196 return pte_val(pte) & _PAGE_DIRTY;
197}
198
199static inline int pte_young(pte_t pte)
200{
201 return pte_val(pte) & _PAGE_ACCESSED;
202}
203
204static inline int pte_write(pte_t pte)
205{
206 return pte_val(pte) & _PAGE_WRITE;
207}
208
209/*
210 * The following only works if pte_present() is not true.
211 */
212static inline int pte_file(pte_t pte)
213{
214 return pte_val(pte) & _PAGE_FILE;
215}
216
217static inline int pte_special(pte_t pte)
218{
219 return 0;
220}
221
222static inline pte_t pte_mkclean(pte_t pte)
223{
224 pte_val(pte) &= ~_PAGE_DIRTY;
225 return pte;
226}
227
228static inline pte_t pte_mkold(pte_t pte)
229{
230 pte_val(pte) &= ~_PAGE_ACCESSED;
231 return pte;
232}
233
234static inline pte_t pte_wrprotect(pte_t pte)
235{
236 pte_val(pte) &= ~_PAGE_WRITE;
237 return pte;
238}
239
240static inline pte_t pte_mkdirty(pte_t pte)
241{
242 pte_val(pte) |= _PAGE_DIRTY;
243 return pte;
244}
245
246static inline pte_t pte_mkyoung(pte_t pte)
247{
248 pte_val(pte) |= _PAGE_ACCESSED;
249 return pte;
250}
251
252static inline pte_t pte_mkwrite(pte_t pte)
253{
254 pte_val(pte) |= _PAGE_WRITE;
255 return pte;
256}
257
258static inline pte_t pte_mkspecial(pte_t pte)
259{
260 return pte;
261}
262
263static inline int ptep_test_and_clear_young(struct vm_area_struct *vma, unsigned long addr, pte_t *ptep)
264{
265 return test_and_clear_bit(_PAGE_BIT_ACCESSED, ptep);
266}
267
268static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
269{
270 clear_bit(_PAGE_BIT_WRITE, ptep);
271}
272
273/*
274 * Macro and implementation to make a page protection as uncachable.
275 */
276static inline pgprot_t pgprot_noncached(pgprot_t _prot)
277{
278 unsigned long prot = pgprot_val(_prot);
279
280 prot |= _PAGE_NONCACHABLE;
281 return __pgprot(prot);
282}
283
284#define pgprot_writecombine(prot) pgprot_noncached(prot)
285
286/*
287 * Conversion functions: convert a page and protection to a page entry,
288 * and a page entry and page directory to the page they refer to.
289 */
290#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), pgprot)
291
292static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
293{
294 set_pte(&pte, __pte((pte_val(pte) & _PAGE_CHG_MASK) \
295 | pgprot_val(newprot)));
296
297 return pte;
298}
299
300/*
301 * Conversion functions: convert a page and protection to a page entry,
302 * and a page entry and page directory to the page they refer to.
303 */
304
305static inline void pmd_set(pmd_t * pmdp, pte_t * ptep)
306{
307 pmd_val(*pmdp) = (((unsigned long) ptep) & PAGE_MASK);
308}
309
310#define pmd_page_vaddr(pmd) \
311 ((unsigned long) __va(pmd_val(pmd) & PAGE_MASK))
312
313#ifndef CONFIG_DISCONTIGMEM
314#define pmd_page(pmd) (mem_map + ((pmd_val(pmd) >> PAGE_SHIFT) - PFN_BASE))
315#endif /* !CONFIG_DISCONTIGMEM */
316
317/* to find an entry in a page-table-directory. */
318#define pgd_index(address) \
319 (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1))
320
321#define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address))
322
323/* to find an entry in a kernel page-table-directory */
324#define pgd_offset_k(address) pgd_offset(&init_mm, address)
325
326#define pmd_index(address) \
327 (((address) >> PMD_SHIFT) & (PTRS_PER_PMD - 1))
328
329#define pte_index(address) \
330 (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
331#define pte_offset_kernel(dir, address) \
332 ((pte_t *)pmd_page_vaddr(*(dir)) + pte_index(address))
333#define pte_offset_map(dir, address) \
334 ((pte_t *)page_address(pmd_page(*(dir))) + pte_index(address))
335#define pte_offset_map_nested(dir, address) pte_offset_map(dir, address)
336#define pte_unmap(pte) do { } while (0)
337#define pte_unmap_nested(pte) do { } while (0)
338
339/* Encode and de-code a swap entry */
340#define __swp_type(x) (((x).val >> 2) & 0x1f)
341#define __swp_offset(x) ((x).val >> 10)
342#define __swp_entry(type, offset) \
343 ((swp_entry_t) { ((type) << 2) | ((offset) << 10) })
344#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
345#define __swp_entry_to_pte(x) ((pte_t) { (x).val })
346
347#endif /* !__ASSEMBLY__ */
348
349/* Needs to be defined here and not in linux/mm.h, as it is arch dependent */
350#define kern_addr_valid(addr) (1)
351
352#define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
353 remap_pfn_range(vma, vaddr, pfn, size, prot)
354
355#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
356#define __HAVE_ARCH_PTEP_GET_AND_CLEAR
357#define __HAVE_ARCH_PTEP_SET_WRPROTECT
358#define __HAVE_ARCH_PTE_SAME
359#include <asm-generic/pgtable.h>
360
361#endif /* __KERNEL__ */
362
363#endif /* _ASM_M32R_PGTABLE_H */
diff --git a/arch/m32r/include/asm/poll.h b/arch/m32r/include/asm/poll.h
new file mode 100644
index 000000000000..c98509d3149e
--- /dev/null
+++ b/arch/m32r/include/asm/poll.h
@@ -0,0 +1 @@
#include <asm-generic/poll.h>
diff --git a/arch/m32r/include/asm/posix_types.h b/arch/m32r/include/asm/posix_types.h
new file mode 100644
index 000000000000..b309c5858637
--- /dev/null
+++ b/arch/m32r/include/asm/posix_types.h
@@ -0,0 +1,118 @@
1#ifndef _ASM_M32R_POSIX_TYPES_H
2#define _ASM_M32R_POSIX_TYPES_H
3
4/*
5 * This file is generally used by user-level software, so you need to
6 * be a little careful about namespace pollution etc. Also, we cannot
7 * assume GCC is being used.
8 */
9
10typedef unsigned long __kernel_ino_t;
11typedef unsigned short __kernel_mode_t;
12typedef unsigned short __kernel_nlink_t;
13typedef long __kernel_off_t;
14typedef int __kernel_pid_t;
15typedef unsigned short __kernel_ipc_pid_t;
16typedef unsigned short __kernel_uid_t;
17typedef unsigned short __kernel_gid_t;
18typedef unsigned int __kernel_size_t;
19typedef int __kernel_ssize_t;
20typedef int __kernel_ptrdiff_t;
21typedef long __kernel_time_t;
22typedef long __kernel_suseconds_t;
23typedef long __kernel_clock_t;
24typedef int __kernel_timer_t;
25typedef int __kernel_clockid_t;
26typedef int __kernel_daddr_t;
27typedef char * __kernel_caddr_t;
28typedef unsigned short __kernel_uid16_t;
29typedef unsigned short __kernel_gid16_t;
30typedef unsigned int __kernel_uid32_t;
31typedef unsigned int __kernel_gid32_t;
32
33typedef unsigned short __kernel_old_uid_t;
34typedef unsigned short __kernel_old_gid_t;
35typedef unsigned short __kernel_old_dev_t;
36
37#ifdef __GNUC__
38typedef long long __kernel_loff_t;
39#endif
40
41typedef struct {
42 int val[2];
43} __kernel_fsid_t;
44
45#if defined(__KERNEL__)
46
47#undef __FD_SET
48static __inline__ void __FD_SET(unsigned long __fd, __kernel_fd_set *__fdsetp)
49{
50 unsigned long __tmp = __fd / __NFDBITS;
51 unsigned long __rem = __fd % __NFDBITS;
52 __fdsetp->fds_bits[__tmp] |= (1UL<<__rem);
53}
54
55#undef __FD_CLR
56static __inline__ void __FD_CLR(unsigned long __fd, __kernel_fd_set *__fdsetp)
57{
58 unsigned long __tmp = __fd / __NFDBITS;
59 unsigned long __rem = __fd % __NFDBITS;
60 __fdsetp->fds_bits[__tmp] &= ~(1UL<<__rem);
61}
62
63
64#undef __FD_ISSET
65static __inline__ int __FD_ISSET(unsigned long __fd, const __kernel_fd_set *__p)
66{
67 unsigned long __tmp = __fd / __NFDBITS;
68 unsigned long __rem = __fd % __NFDBITS;
69 return (__p->fds_bits[__tmp] & (1UL<<__rem)) != 0;
70}
71
72/*
73 * This will unroll the loop for the normal constant case (8 ints,
74 * for a 256-bit fd_set)
75 */
76#undef __FD_ZERO
77static __inline__ void __FD_ZERO(__kernel_fd_set *__p)
78{
79 unsigned long *__tmp = __p->fds_bits;
80 int __i;
81
82 if (__builtin_constant_p(__FDSET_LONGS)) {
83 switch (__FDSET_LONGS) {
84 case 16:
85 __tmp[ 0] = 0; __tmp[ 1] = 0;
86 __tmp[ 2] = 0; __tmp[ 3] = 0;
87 __tmp[ 4] = 0; __tmp[ 5] = 0;
88 __tmp[ 6] = 0; __tmp[ 7] = 0;
89 __tmp[ 8] = 0; __tmp[ 9] = 0;
90 __tmp[10] = 0; __tmp[11] = 0;
91 __tmp[12] = 0; __tmp[13] = 0;
92 __tmp[14] = 0; __tmp[15] = 0;
93 return;
94
95 case 8:
96 __tmp[ 0] = 0; __tmp[ 1] = 0;
97 __tmp[ 2] = 0; __tmp[ 3] = 0;
98 __tmp[ 4] = 0; __tmp[ 5] = 0;
99 __tmp[ 6] = 0; __tmp[ 7] = 0;
100 return;
101
102 case 4:
103 __tmp[ 0] = 0; __tmp[ 1] = 0;
104 __tmp[ 2] = 0; __tmp[ 3] = 0;
105 return;
106 }
107 }
108 __i = __FDSET_LONGS;
109 while (__i) {
110 __i--;
111 *__tmp = 0;
112 __tmp++;
113 }
114}
115
116#endif /* defined(__KERNEL__) */
117
118#endif /* _ASM_M32R_POSIX_TYPES_H */
diff --git a/arch/m32r/include/asm/processor.h b/arch/m32r/include/asm/processor.h
new file mode 100644
index 000000000000..1a997fc148a2
--- /dev/null
+++ b/arch/m32r/include/asm/processor.h
@@ -0,0 +1,147 @@
1#ifndef _ASM_M32R_PROCESSOR_H
2#define _ASM_M32R_PROCESSOR_H
3
4/*
5 * include/asm-m32r/processor.h
6 *
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file "COPYING" in the main directory of this archive
9 * for more details.
10 *
11 * Copyright (C) 1994 Linus Torvalds
12 * Copyright (C) 2001 Hiroyuki Kondo, Hirokazu Takata, and Hitoshi Yamamoto
13 * Copyright (C) 2004 Hirokazu Takata <takata at linux-m32r.org>
14 */
15
16#include <linux/kernel.h>
17#include <asm/cache.h>
18#include <asm/ptrace.h> /* pt_regs */
19
20/*
21 * Default implementation of macro that returns current
22 * instruction pointer ("program counter").
23 */
24#define current_text_addr() ({ __label__ _l; _l: &&_l; })
25
26/*
27 * CPU type and hardware bug flags. Kept separately for each CPU.
28 * Members of this structure are referenced in head.S, so think twice
29 * before touching them. [mj]
30 */
31
32struct cpuinfo_m32r {
33 unsigned long pgtable_cache_sz;
34 unsigned long cpu_clock;
35 unsigned long bus_clock;
36 unsigned long timer_divide;
37 unsigned long loops_per_jiffy;
38};
39
40/*
41 * capabilities of CPUs
42 */
43
44extern struct cpuinfo_m32r boot_cpu_data;
45
46#ifdef CONFIG_SMP
47extern struct cpuinfo_m32r cpu_data[];
48#define current_cpu_data cpu_data[smp_processor_id()]
49#else
50#define cpu_data (&boot_cpu_data)
51#define current_cpu_data boot_cpu_data
52#endif
53
54/*
55 * User space process size: 2GB (default).
56 */
57#ifdef CONFIG_MMU
58#define TASK_SIZE (0x80000000UL)
59#else
60#define TASK_SIZE (0x00400000UL)
61#endif
62
63#ifdef __KERNEL__
64#define STACK_TOP TASK_SIZE
65#define STACK_TOP_MAX STACK_TOP
66#endif
67
68/* This decides where the kernel will search for a free chunk of vm
69 * space during mmap's.
70 */
71#define TASK_UNMAPPED_BASE PAGE_ALIGN(TASK_SIZE / 3)
72
73typedef struct {
74 unsigned long seg;
75} mm_segment_t;
76
77#define MAX_TRAPS 10
78
79struct debug_trap {
80 int nr_trap;
81 unsigned long addr[MAX_TRAPS];
82 unsigned long insn[MAX_TRAPS];
83};
84
85struct thread_struct {
86 unsigned long address;
87 unsigned long trap_no; /* Trap number */
88 unsigned long error_code; /* Error code of trap */
89 unsigned long lr; /* saved pc */
90 unsigned long sp; /* user stack pointer */
91 struct debug_trap debug_trap;
92};
93
94#define INIT_SP (sizeof(init_stack) + (unsigned long) &init_stack)
95
96#define INIT_THREAD { \
97 .sp = INIT_SP, \
98}
99
100/*
101 * Do necessary setup to start up a newly executed thread.
102 */
103
104/* User process Backup PSW */
105#define USERPS_BPSW (M32R_PSW_BSM|M32R_PSW_BIE|M32R_PSW_BPM)
106
107#define start_thread(regs, new_pc, new_spu) \
108 do { \
109 set_fs(USER_DS); \
110 regs->psw = (regs->psw | USERPS_BPSW) & 0x0000FFFFUL; \
111 regs->bpc = new_pc; \
112 regs->spu = new_spu; \
113 } while (0)
114
115/* Forward declaration, a strange C thing */
116struct task_struct;
117struct mm_struct;
118
119/* Free all resources held by a thread. */
120extern void release_thread(struct task_struct *);
121
122#define prepare_to_copy(tsk) do { } while (0)
123
124/*
125 * create a kernel thread without removing it from tasklists
126 */
127extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);
128
129/* Copy and release all segment info associated with a VM */
130extern void copy_segments(struct task_struct *p, struct mm_struct * mm);
131extern void release_segments(struct mm_struct * mm);
132
133extern unsigned long thread_saved_pc(struct task_struct *);
134
135/* Copy and release all segment info associated with a VM */
136#define copy_segments(p, mm) do { } while (0)
137#define release_segments(mm) do { } while (0)
138
139unsigned long get_wchan(struct task_struct *p);
140#define KSTK_EIP(tsk) ((tsk)->thread.lr)
141#define KSTK_ESP(tsk) ((tsk)->thread.sp)
142
143#define THREAD_SIZE (2*PAGE_SIZE)
144
145#define cpu_relax() barrier()
146
147#endif /* _ASM_M32R_PROCESSOR_H */
diff --git a/arch/m32r/include/asm/ptrace.h b/arch/m32r/include/asm/ptrace.h
new file mode 100644
index 000000000000..a0755b982028
--- /dev/null
+++ b/arch/m32r/include/asm/ptrace.h
@@ -0,0 +1,148 @@
1#ifndef _ASM_M32R_PTRACE_H
2#define _ASM_M32R_PTRACE_H
3
4/*
5 * linux/include/asm-m32r/ptrace.h
6 *
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file "COPYING" in the main directory of this archive
9 * for more details.
10 *
11 * M32R version:
12 * Copyright (C) 2001-2002, 2004 Hirokazu Takata <takata at linux-m32r.org>
13 */
14
15/* 0 - 13 are integer registers (general purpose registers). */
16#define PT_R4 0
17#define PT_R5 1
18#define PT_R6 2
19#define PT_REGS 3
20#define PT_R0 4
21#define PT_R1 5
22#define PT_R2 6
23#define PT_R3 7
24#define PT_R7 8
25#define PT_R8 9
26#define PT_R9 10
27#define PT_R10 11
28#define PT_R11 12
29#define PT_R12 13
30#define PT_SYSCNR 14
31#define PT_R13 PT_FP
32#define PT_R14 PT_LR
33#define PT_R15 PT_SP
34
35/* processor status and miscellaneous context registers. */
36#define PT_ACC0H 15
37#define PT_ACC0L 16
38#define PT_ACC1H 17 /* ISA_DSP_LEVEL2 only */
39#define PT_ACC1L 18 /* ISA_DSP_LEVEL2 only */
40#define PT_PSW 19
41#define PT_BPC 20
42#define PT_BBPSW 21
43#define PT_BBPC 22
44#define PT_SPU 23
45#define PT_FP 24
46#define PT_LR 25
47#define PT_SPI 26
48#define PT_ORIGR0 27
49
50/* virtual pt_reg entry for gdb */
51#define PT_PC 30
52#define PT_CBR 31
53#define PT_EVB 32
54
55
56/* Control registers. */
57#define SPR_CR0 PT_PSW
58#define SPR_CR1 PT_CBR /* read only */
59#define SPR_CR2 PT_SPI
60#define SPR_CR3 PT_SPU
61#define SPR_CR4
62#define SPR_CR5 PT_EVB /* part of M32R/E, M32R/I core only */
63#define SPR_CR6 PT_BPC
64#define SPR_CR7
65#define SPR_CR8 PT_BBPSW
66#define SPR_CR9
67#define SPR_CR10
68#define SPR_CR11
69#define SPR_CR12
70#define SPR_CR13 PT_WR
71#define SPR_CR14 PT_BBPC
72#define SPR_CR15
73
74/* this struct defines the way the registers are stored on the
75 stack during a system call. */
76struct pt_regs {
77 /* Saved main processor registers. */
78 unsigned long r4;
79 unsigned long r5;
80 unsigned long r6;
81 struct pt_regs *pt_regs;
82 unsigned long r0;
83 unsigned long r1;
84 unsigned long r2;
85 unsigned long r3;
86 unsigned long r7;
87 unsigned long r8;
88 unsigned long r9;
89 unsigned long r10;
90 unsigned long r11;
91 unsigned long r12;
92 long syscall_nr;
93
94 /* Saved main processor status and miscellaneous context registers. */
95 unsigned long acc0h;
96 unsigned long acc0l;
97 unsigned long acc1h; /* ISA_DSP_LEVEL2 only */
98 unsigned long acc1l; /* ISA_DSP_LEVEL2 only */
99 unsigned long psw;
100 unsigned long bpc; /* saved PC for TRAP syscalls */
101 unsigned long bbpsw;
102 unsigned long bbpc;
103 unsigned long spu; /* saved user stack */
104 unsigned long fp;
105 unsigned long lr; /* saved PC for JL syscalls */
106 unsigned long spi; /* saved kernel stack */
107 unsigned long orig_r0;
108};
109
110/* Arbitrarily choose the same ptrace numbers as used by the Sparc code. */
111#define PTRACE_GETREGS 12
112#define PTRACE_SETREGS 13
113
114#define PTRACE_OLDSETOPTIONS 21
115
116/* options set using PTRACE_SETOPTIONS */
117#define PTRACE_O_TRACESYSGOOD 0x00000001
118
119#ifdef __KERNEL__
120
121#include <asm/m32r.h> /* M32R_PSW_BSM, M32R_PSW_BPM */
122
123struct task_struct;
124extern void init_debug_traps(struct task_struct *);
125#define arch_ptrace_attach(child) \
126 init_debug_traps(child)
127
128#if defined(CONFIG_ISA_M32R2) || defined(CONFIG_CHIP_VDEC2)
129#define user_mode(regs) ((M32R_PSW_BPM & (regs)->psw) != 0)
130#elif defined(CONFIG_ISA_M32R)
131#define user_mode(regs) ((M32R_PSW_BSM & (regs)->psw) != 0)
132#else
133#error unknown isa configuration
134#endif
135
136#define instruction_pointer(regs) ((regs)->bpc)
137#define profile_pc(regs) instruction_pointer(regs)
138
139extern void show_regs(struct pt_regs *);
140
141extern void withdraw_debug_trap(struct pt_regs *regs);
142
143#define task_pt_regs(task) \
144 ((struct pt_regs *)(task_stack_page(task) + THREAD_SIZE) - 1)
145
146#endif /* __KERNEL */
147
148#endif /* _ASM_M32R_PTRACE_H */
diff --git a/arch/m32r/include/asm/resource.h b/arch/m32r/include/asm/resource.h
new file mode 100644
index 000000000000..b1ce766e37a0
--- /dev/null
+++ b/arch/m32r/include/asm/resource.h
@@ -0,0 +1,6 @@
1#ifndef _ASM_M32R_RESOURCE_H
2#define _ASM_M32R_RESOURCE_H
3
4#include <asm-generic/resource.h>
5
6#endif /* _ASM_M32R_RESOURCE_H */
diff --git a/arch/m32r/include/asm/rtc.h b/arch/m32r/include/asm/rtc.h
new file mode 100644
index 000000000000..0340633f3f4d
--- /dev/null
+++ b/arch/m32r/include/asm/rtc.h
@@ -0,0 +1,65 @@
1#ifndef __RTC_H__
2#define __RTC_H__
3
4 /* Dallas DS1302 clock/calendar register numbers. */
5# define RTC_SECONDS 0
6# define RTC_MINUTES 1
7# define RTC_HOURS 2
8# define RTC_DAY_OF_MONTH 3
9# define RTC_MONTH 4
10# define RTC_WEEKDAY 5
11# define RTC_YEAR 6
12# define RTC_CONTROL 7
13
14 /* Bits in CONTROL register. */
15# define RTC_CONTROL_WRITEPROTECT 0x80
16# define RTC_TRICKLECHARGER 8
17
18 /* Bits in TRICKLECHARGER register TCS TCS TCS TCS DS DS RS RS. */
19# define RTC_TCR_PATTERN 0xA0 /* 1010xxxx */
20# define RTC_TCR_1DIOD 0x04 /* xxxx01xx */
21# define RTC_TCR_2DIOD 0x08 /* xxxx10xx */
22# define RTC_TCR_DISABLED 0x00 /* xxxxxx00 Disabled */
23# define RTC_TCR_2KOHM 0x01 /* xxxxxx01 2KOhm */
24# define RTC_TCR_4KOHM 0x02 /* xxxxxx10 4kOhm */
25# define RTC_TCR_8KOHM 0x03 /* xxxxxx11 8kOhm */
26
27#ifdef CONFIG_DS1302
28extern unsigned char ds1302_readreg(int reg);
29extern void ds1302_writereg(int reg, unsigned char val);
30extern int ds1302_init(void);
31# define CMOS_READ(x) ds1302_readreg(x)
32# define CMOS_WRITE(val,reg) ds1302_writereg(reg,val)
33# define RTC_INIT() ds1302_init()
34#else
35 /* No RTC configured so we shouldn't try to access any. */
36# define CMOS_READ(x) 42
37# define CMOS_WRITE(x,y)
38# define RTC_INIT() (-1)
39#endif
40
41/*
42 * The struct used to pass data via the following ioctl. Similar to the
43 * struct tm in <time.h>, but it needs to be here so that the kernel
44 * source is self contained, allowing cross-compiles, etc. etc.
45 */
46struct rtc_time {
47 int tm_sec;
48 int tm_min;
49 int tm_hour;
50 int tm_mday;
51 int tm_mon;
52 int tm_year;
53 int tm_wday;
54 int tm_yday;
55 int tm_isdst;
56};
57
58/* ioctl() calls that are permitted to the /dev/rtc interface. */
59#define RTC_MAGIC 'p'
60#define RTC_RD_TIME _IOR(RTC_MAGIC, 0x09, struct rtc_time) /* Read RTC time. */
61#define RTC_SET_TIME _IOW(RTC_MAGIC, 0x0a, struct rtc_time) /* Set RTC time. */
62#define RTC_SET_CHARGE _IOW(RTC_MAGIC, 0x0b, int)
63#define RTC_MAX_IOCTL 0x0b
64
65#endif /* __RTC_H__ */
diff --git a/arch/m32r/include/asm/s1d13806.h b/arch/m32r/include/asm/s1d13806.h
new file mode 100644
index 000000000000..248d36a82d79
--- /dev/null
+++ b/arch/m32r/include/asm/s1d13806.h
@@ -0,0 +1,199 @@
1//----------------------------------------------------------------------------
2//
3// File generated by S1D13806CFG.EXE
4//
5// Copyright (c) 2000,2001 Epson Research and Development, Inc.
6// All rights reserved.
7//
8//----------------------------------------------------------------------------
9
10// Panel: (active) 640x480 77Hz STN Single 8-bit (PCLK=CLKI=25.175MHz)
11// Memory: Embedded SDRAM (MCLK=CLKI3=50.000MHz) (BUSCLK=33.333MHz)
12
13#define SWIVEL_VIEW 0 /* 0:none, 1:90 not completed */
14
15static struct s1d13xxxfb_regval s1d13xxxfb_initregs[] = {
16
17 {0x0001,0x00}, // Miscellaneous Register
18 {0x01FC,0x00}, // Display Mode Register
19#if defined(CONFIG_PLAT_MAPPI)
20 {0x0004,0x00}, // General IO Pins Configuration Register 0
21 {0x0005,0x00}, // General IO Pins Configuration Register 1
22 {0x0008,0x00}, // General IO Pins Control Register 0
23 {0x0009,0x00}, // General IO Pins Control Register 1
24 {0x0010,0x00}, // Memory Clock Configuration Register
25 {0x0014,0x00}, // LCD Pixel Clock Configuration Register
26 {0x0018,0x00}, // CRT/TV Pixel Clock Configuration Register
27 {0x001C,0x00}, // MediaPlug Clock Configuration Register
28/*
29 * .. 10MHz: 0x00
30 * .. 30MHz: 0x01
31 * 30MHz ..: 0x02
32 */
33 {0x001E,0x02}, // CPU To Memory Wait State Select Register
34 {0x0021,0x02}, // DRAM Refresh Rate Register
35 {0x002A,0x11}, // DRAM Timings Control Register 0
36 {0x002B,0x13}, // DRAM Timings Control Register 1
37 {0x0020,0x80}, // Memory Configuration Register
38 {0x0030,0x25}, // Panel Type Register
39 {0x0031,0x00}, // MOD Rate Register
40 {0x0032,0x4F}, // LCD Horizontal Display Width Register
41 {0x0034,0x12}, // LCD Horizontal Non-Display Period Register
42 {0x0035,0x01}, // TFT FPLINE Start Position Register
43 {0x0036,0x0B}, // TFT FPLINE Pulse Width Register
44 {0x0038,0xDF}, // LCD Vertical Display Height Register 0
45 {0x0039,0x01}, // LCD Vertical Display Height Register 1
46 {0x003A,0x2C}, // LCD Vertical Non-Display Period Register
47 {0x003B,0x0A}, // TFT FPFRAME Start Position Register
48 {0x003C,0x01}, // TFT FPFRAME Pulse Width Register
49
50 {0x0041,0x00}, // LCD Miscellaneous Register
51 {0x0042,0x00}, // LCD Display Start Address Register 0
52 {0x0043,0x00}, // LCD Display Start Address Register 1
53 {0x0044,0x00}, // LCD Display Start Address Register 2
54
55#elif defined(CONFIG_PLAT_M32700UT) || defined(CONFIG_PLAT_OPSPUT) || defined(CONFIG_PLAT_MAPPI3)
56 {0x0004,0x07}, // GPIO[0:7] direction
57 {0x0005,0x00}, // GPIO[8:12] direction
58 {0x0008,0x00}, // GPIO[0:7] data
59 {0x0009,0x00}, // GPIO[8:12] data
60 {0x0008,0x04}, // LCD panel Vcc on
61 {0x0008,0x05}, // LCD panel reset
62 {0x0010,0x01}, // Memory Clock Configuration Register
63 {0x0014,0x30}, // LCD Pixel Clock Configuration Register (CLKI 22MHz/4)
64 {0x0018,0x00}, // CRT/TV Pixel Clock Configuration Register
65 {0x001C,0x00}, // MediaPlug Clock Configuration Register(10MHz)
66 {0x001E,0x00}, // CPU To Memory Wait State Select Register
67 {0x0020,0x80}, // Memory Configuration Register
68 {0x0021,0x03}, // DRAM Refresh Rate Register
69 {0x002A,0x00}, // DRAM Timings Control Register 0
70 {0x002B,0x01}, // DRAM Timings Control Register 1
71 {0x0030,0x25}, // Panel Type Register
72 {0x0031,0x00}, // MOD Rate Register
73 {0x0032,0x1d}, // LCD Horizontal Display Width Register
74 {0x0034,0x05}, // LCD Horizontal Non-Display Period Register
75 {0x0035,0x01}, // TFT FPLINE Start Position Register
76 {0x0036,0x01}, // TFT FPLINE Pulse Width Register
77 {0x0038,0x3F}, // LCD Vertical Display Height Register 0
78 {0x0039,0x01}, // LCD Vertical Display Height Register 1
79 {0x003A,0x0b}, // LCD Vertical Non-Display Period Register
80 {0x003B,0x07}, // TFT FPFRAME Start Position Register
81 {0x003C,0x02}, // TFT FPFRAME Pulse Width Register
82
83 {0x0041,0x00}, // LCD Miscellaneous Register
84#if (SWIVEL_VIEW == 0)
85 {0x0042,0x00}, // LCD Display Start Address Register 0
86 {0x0043,0x00}, // LCD Display Start Address Register 1
87 {0x0044,0x00}, // LCD Display Start Address Register 2
88
89#elif (SWIVEL_VIEW == 1)
90 // 1024 - W(320) = 0x2C0
91 {0x0042,0xC0}, // LCD Display Start Address Register 0
92 {0x0043,0x02}, // LCD Display Start Address Register 1
93 {0x0044,0x00}, // LCD Display Start Address Register 2
94 // 1024
95 {0x0046,0x00}, // LCD Memory Address Offset Register 0
96 {0x0047,0x02}, // LCD Memory Address Offset Register 1
97#else
98#error unsupported SWIVEL_VIEW mode
99#endif
100#else
101#error no platform configuration
102#endif /* CONFIG_PLAT_XXX */
103
104 {0x0048,0x00}, // LCD Pixel Panning Register
105 {0x004A,0x00}, // LCD Display FIFO High Threshold Control Register
106 {0x004B,0x00}, // LCD Display FIFO Low Threshold Control Register
107 {0x0050,0x4F}, // CRT/TV Horizontal Display Width Register
108 {0x0052,0x13}, // CRT/TV Horizontal Non-Display Period Register
109 {0x0053,0x01}, // CRT/TV HRTC Start Position Register
110 {0x0054,0x0B}, // CRT/TV HRTC Pulse Width Register
111 {0x0056,0xDF}, // CRT/TV Vertical Display Height Register 0
112 {0x0057,0x01}, // CRT/TV Vertical Display Height Register 1
113 {0x0058,0x2B}, // CRT/TV Vertical Non-Display Period Register
114 {0x0059,0x09}, // CRT/TV VRTC Start Position Register
115 {0x005A,0x01}, // CRT/TV VRTC Pulse Width Register
116 {0x005B,0x10}, // TV Output Control Register
117
118 {0x0062,0x00}, // CRT/TV Display Start Address Register 0
119 {0x0063,0x00}, // CRT/TV Display Start Address Register 1
120 {0x0064,0x00}, // CRT/TV Display Start Address Register 2
121
122 {0x0068,0x00}, // CRT/TV Pixel Panning Register
123 {0x006A,0x00}, // CRT/TV Display FIFO High Threshold Control Register
124 {0x006B,0x00}, // CRT/TV Display FIFO Low Threshold Control Register
125 {0x0070,0x00}, // LCD Ink/Cursor Control Register
126 {0x0071,0x01}, // LCD Ink/Cursor Start Address Register
127 {0x0072,0x00}, // LCD Cursor X Position Register 0
128 {0x0073,0x00}, // LCD Cursor X Position Register 1
129 {0x0074,0x00}, // LCD Cursor Y Position Register 0
130 {0x0075,0x00}, // LCD Cursor Y Position Register 1
131 {0x0076,0x00}, // LCD Ink/Cursor Blue Color 0 Register
132 {0x0077,0x00}, // LCD Ink/Cursor Green Color 0 Register
133 {0x0078,0x00}, // LCD Ink/Cursor Red Color 0 Register
134 {0x007A,0x1F}, // LCD Ink/Cursor Blue Color 1 Register
135 {0x007B,0x3F}, // LCD Ink/Cursor Green Color 1 Register
136 {0x007C,0x1F}, // LCD Ink/Cursor Red Color 1 Register
137 {0x007E,0x00}, // LCD Ink/Cursor FIFO Threshold Register
138 {0x0080,0x00}, // CRT/TV Ink/Cursor Control Register
139 {0x0081,0x01}, // CRT/TV Ink/Cursor Start Address Register
140 {0x0082,0x00}, // CRT/TV Cursor X Position Register 0
141 {0x0083,0x00}, // CRT/TV Cursor X Position Register 1
142 {0x0084,0x00}, // CRT/TV Cursor Y Position Register 0
143 {0x0085,0x00}, // CRT/TV Cursor Y Position Register 1
144 {0x0086,0x00}, // CRT/TV Ink/Cursor Blue Color 0 Register
145 {0x0087,0x00}, // CRT/TV Ink/Cursor Green Color 0 Register
146 {0x0088,0x00}, // CRT/TV Ink/Cursor Red Color 0 Register
147 {0x008A,0x1F}, // CRT/TV Ink/Cursor Blue Color 1 Register
148 {0x008B,0x3F}, // CRT/TV Ink/Cursor Green Color 1 Register
149 {0x008C,0x1F}, // CRT/TV Ink/Cursor Red Color 1 Register
150 {0x008E,0x00}, // CRT/TV Ink/Cursor FIFO Threshold Register
151 {0x0100,0x00}, // BitBlt Control Register 0
152 {0x0101,0x00}, // BitBlt Control Register 1
153 {0x0102,0x00}, // BitBlt ROP Code/Color Expansion Register
154 {0x0103,0x00}, // BitBlt Operation Register
155 {0x0104,0x00}, // BitBlt Source Start Address Register 0
156 {0x0105,0x00}, // BitBlt Source Start Address Register 1
157 {0x0106,0x00}, // BitBlt Source Start Address Register 2
158 {0x0108,0x00}, // BitBlt Destination Start Address Register 0
159 {0x0109,0x00}, // BitBlt Destination Start Address Register 1
160 {0x010A,0x00}, // BitBlt Destination Start Address Register 2
161 {0x010C,0x00}, // BitBlt Memory Address Offset Register 0
162 {0x010D,0x00}, // BitBlt Memory Address Offset Register 1
163 {0x0110,0x00}, // BitBlt Width Register 0
164 {0x0111,0x00}, // BitBlt Width Register 1
165 {0x0112,0x00}, // BitBlt Height Register 0
166 {0x0113,0x00}, // BitBlt Height Register 1
167 {0x0114,0x00}, // BitBlt Background Color Register 0
168 {0x0115,0x00}, // BitBlt Background Color Register 1
169 {0x0118,0x00}, // BitBlt Foreground Color Register 0
170 {0x0119,0x00}, // BitBlt Foreground Color Register 1
171 {0x01E0,0x00}, // Look-Up Table Mode Register
172 {0x01E2,0x00}, // Look-Up Table Address Register
173 {0x01F0,0x10}, // Power Save Configuration Register
174 {0x01F1,0x00}, // Power Save Status Register
175 {0x01F4,0x00}, // CPU-to-Memory Access Watchdog Timer Register
176#if (SWIVEL_VIEW == 0)
177 {0x01FC,0x01}, // Display Mode Register(0x01:LCD, 0x02:CRT, 0x03:LCD&CRT)
178#elif (SWIVEL_VIEW == 1)
179 {0x01FC,0x41}, // Display Mode Register(0x01:LCD, 0x02:CRT, 0x03:LCD&CRT)
180#else
181#error unsupported SWIVEL_VIEW mode
182#endif /* SWIVEL_VIEW */
183
184#if defined(CONFIG_PLAT_M32700UT) || defined(CONFIG_PLAT_OPSPUT) || defined(CONFIG_PLAT_MAPPI3)
185 {0x0008,0x07}, // LCD panel Vdd & Vg on
186#endif
187
188 {0x0040,0x05}, // LCD Display Mode Register (2:4bpp,3:8bpp,5:16bpp)
189#if defined(CONFIG_PLAT_MAPPI)
190 {0x0046,0x80}, // LCD Memory Address Offset Register 0
191 {0x0047,0x02}, // LCD Memory Address Offset Register 1
192#elif defined(CONFIG_PLAT_M32700UT) || defined(CONFIG_PLAT_OPSPUT) || defined(CONFIG_PLAT_MAPPI3)
193 {0x0046,0xf0}, // LCD Memory Address Offset Register 0
194 {0x0047,0x00}, // LCD Memory Address Offset Register 1
195#endif
196 {0x0060,0x05}, // CRT/TV Display Mode Register (2:4bpp,3:8bpp,5:16bpp)
197 {0x0066,0x80}, // CRT/TV Memory Address Offset Register 0 // takeo
198 {0x0067,0x02}, // CRT/TV Memory Address Offset Register 1
199};
diff --git a/arch/m32r/include/asm/scatterlist.h b/arch/m32r/include/asm/scatterlist.h
new file mode 100644
index 000000000000..1ed372c73d0b
--- /dev/null
+++ b/arch/m32r/include/asm/scatterlist.h
@@ -0,0 +1,21 @@
1#ifndef _ASM_M32R_SCATTERLIST_H
2#define _ASM_M32R_SCATTERLIST_H
3
4#include <asm/types.h>
5
6struct scatterlist {
7#ifdef CONFIG_DEBUG_SG
8 unsigned long sg_magic;
9#endif
10 char * address; /* Location data is to be transferred to, NULL for
11 * highmem page */
12 unsigned long page_link;
13 unsigned int offset;/* for highmem, page offset */
14
15 dma_addr_t dma_address;
16 unsigned int length;
17};
18
19#define ISA_DMA_THRESHOLD (0x1fffffff)
20
21#endif /* _ASM_M32R_SCATTERLIST_H */
diff --git a/arch/m32r/include/asm/sections.h b/arch/m32r/include/asm/sections.h
new file mode 100644
index 000000000000..5e5d21c4908a
--- /dev/null
+++ b/arch/m32r/include/asm/sections.h
@@ -0,0 +1,7 @@
1#ifndef _M32R_SECTIONS_H
2#define _M32R_SECTIONS_H
3
4/* nothing to see, move along */
5#include <asm-generic/sections.h>
6
7#endif /* _M32R_SECTIONS_H */
diff --git a/arch/m32r/include/asm/segment.h b/arch/m32r/include/asm/segment.h
new file mode 100644
index 000000000000..42b11aeb3249
--- /dev/null
+++ b/arch/m32r/include/asm/segment.h
@@ -0,0 +1,10 @@
1#ifndef _ASM_M32R_SEGMENT_H
2#define _ASM_M32R_SEGMENT_H
3
4#define __KERNEL_CS 0x10
5#define __KERNEL_DS 0x18
6
7#define __USER_CS 0x23
8#define __USER_DS 0x2B
9
10#endif /* _ASM_M32R_SEGMENT_H */
diff --git a/arch/m32r/include/asm/sembuf.h b/arch/m32r/include/asm/sembuf.h
new file mode 100644
index 000000000000..c9873d6890e2
--- /dev/null
+++ b/arch/m32r/include/asm/sembuf.h
@@ -0,0 +1,25 @@
1#ifndef _ASM_M32R_SEMBUF_H
2#define _ASM_M32R_SEMBUF_H
3
4/*
5 * The semid64_ds structure for m32r architecture.
6 * Note extra padding because this structure is passed back and forth
7 * between kernel and user space.
8 *
9 * Pad space is left for:
10 * - 64-bit time_t to solve y2038 problem
11 * - 2 miscellaneous 32-bit values
12 */
13
14struct semid64_ds {
15 struct ipc64_perm sem_perm; /* permissions .. see ipc.h */
16 __kernel_time_t sem_otime; /* last semop time */
17 unsigned long __unused1;
18 __kernel_time_t sem_ctime; /* last change time */
19 unsigned long __unused2;
20 unsigned long sem_nsems; /* no. of semaphores in array */
21 unsigned long __unused3;
22 unsigned long __unused4;
23};
24
25#endif /* _ASM_M32R_SEMBUF_H */
diff --git a/arch/m32r/include/asm/serial.h b/arch/m32r/include/asm/serial.h
new file mode 100644
index 000000000000..5ac244c72f15
--- /dev/null
+++ b/arch/m32r/include/asm/serial.h
@@ -0,0 +1,9 @@
1#ifndef _ASM_M32R_SERIAL_H
2#define _ASM_M32R_SERIAL_H
3
4/* include/asm-m32r/serial.h */
5
6
7#define BASE_BAUD 115200
8
9#endif /* _ASM_M32R_SERIAL_H */
diff --git a/arch/m32r/include/asm/setup.h b/arch/m32r/include/asm/setup.h
new file mode 100644
index 000000000000..c637ab992394
--- /dev/null
+++ b/arch/m32r/include/asm/setup.h
@@ -0,0 +1,38 @@
1#ifndef _ASM_M32R_SETUP_H
2#define _ASM_M32R_SETUP_H
3
4/*
5 * This is set up by the setup-routine at boot-time
6 */
7
8#define COMMAND_LINE_SIZE 512
9
10#ifdef __KERNEL__
11
12#define PARAM ((unsigned char *)empty_zero_page)
13
14#define MOUNT_ROOT_RDONLY (*(unsigned long *) (PARAM+0x000))
15#define RAMDISK_FLAGS (*(unsigned long *) (PARAM+0x004))
16#define ORIG_ROOT_DEV (*(unsigned long *) (PARAM+0x008))
17#define LOADER_TYPE (*(unsigned long *) (PARAM+0x00c))
18#define INITRD_START (*(unsigned long *) (PARAM+0x010))
19#define INITRD_SIZE (*(unsigned long *) (PARAM+0x014))
20
21#define M32R_CPUCLK (*(unsigned long *) (PARAM+0x018))
22#define M32R_BUSCLK (*(unsigned long *) (PARAM+0x01c))
23#define M32R_TIMER_DIVIDE (*(unsigned long *) (PARAM+0x020))
24
25#define COMMAND_LINE ((char *) (PARAM+0x100))
26
27#define SCREEN_INFO (*(struct screen_info *) (PARAM+0x200))
28
29#define RAMDISK_IMAGE_START_MASK (0x07FF)
30#define RAMDISK_PROMPT_FLAG (0x8000)
31#define RAMDISK_LOAD_FLAG (0x4000)
32
33extern unsigned long memory_start;
34extern unsigned long memory_end;
35
36#endif /* __KERNEL__ */
37
38#endif /* _ASM_M32R_SETUP_H */
diff --git a/arch/m32r/include/asm/shmbuf.h b/arch/m32r/include/asm/shmbuf.h
new file mode 100644
index 000000000000..b0cdf0aa7d65
--- /dev/null
+++ b/arch/m32r/include/asm/shmbuf.h
@@ -0,0 +1,42 @@
1#ifndef _ASM_M32R_SHMBUF_H
2#define _ASM_M32R_SHMBUF_H
3
4/*
5 * The shmid64_ds structure for M32R architecture.
6 * Note extra padding because this structure is passed back and forth
7 * between kernel and user space.
8 *
9 * Pad space is left for:
10 * - 64-bit time_t to solve y2038 problem
11 * - 2 miscellaneous 32-bit values
12 */
13
14struct shmid64_ds {
15 struct ipc64_perm shm_perm; /* operation perms */
16 size_t shm_segsz; /* size of segment (bytes) */
17 __kernel_time_t shm_atime; /* last attach time */
18 unsigned long __unused1;
19 __kernel_time_t shm_dtime; /* last detach time */
20 unsigned long __unused2;
21 __kernel_time_t shm_ctime; /* last change time */
22 unsigned long __unused3;
23 __kernel_pid_t shm_cpid; /* pid of creator */
24 __kernel_pid_t shm_lpid; /* pid of last operator */
25 unsigned long shm_nattch; /* no. of current attaches */
26 unsigned long __unused4;
27 unsigned long __unused5;
28};
29
30struct shminfo64 {
31 unsigned long shmmax;
32 unsigned long shmmin;
33 unsigned long shmmni;
34 unsigned long shmseg;
35 unsigned long shmall;
36 unsigned long __unused1;
37 unsigned long __unused2;
38 unsigned long __unused3;
39 unsigned long __unused4;
40};
41
42#endif /* _ASM_M32R_SHMBUF_H */
diff --git a/arch/m32r/include/asm/shmparam.h b/arch/m32r/include/asm/shmparam.h
new file mode 100644
index 000000000000..35986d81a528
--- /dev/null
+++ b/arch/m32r/include/asm/shmparam.h
@@ -0,0 +1,6 @@
1#ifndef _ASM_M32R_SHMPARAM_H
2#define _ASM_M32R_SHMPARAM_H
3
4#define SHMLBA PAGE_SIZE /* attach addr a multiple of this */
5
6#endif /* _ASM_M32R_SHMPARAM_H */
diff --git a/arch/m32r/include/asm/sigcontext.h b/arch/m32r/include/asm/sigcontext.h
new file mode 100644
index 000000000000..da4a9c36d09b
--- /dev/null
+++ b/arch/m32r/include/asm/sigcontext.h
@@ -0,0 +1,39 @@
1#ifndef _ASM_M32R_SIGCONTEXT_H
2#define _ASM_M32R_SIGCONTEXT_H
3
4struct sigcontext {
5 /* CPU registers */
6 /* Saved main processor registers. */
7 unsigned long sc_r4;
8 unsigned long sc_r5;
9 unsigned long sc_r6;
10 struct pt_regs *sc_pt_regs;
11 unsigned long sc_r0;
12 unsigned long sc_r1;
13 unsigned long sc_r2;
14 unsigned long sc_r3;
15 unsigned long sc_r7;
16 unsigned long sc_r8;
17 unsigned long sc_r9;
18 unsigned long sc_r10;
19 unsigned long sc_r11;
20 unsigned long sc_r12;
21
22 /* Saved main processor status and miscellaneous context registers. */
23 unsigned long sc_acc0h;
24 unsigned long sc_acc0l;
25 unsigned long sc_acc1h; /* ISA_DSP_LEVEL2 only */
26 unsigned long sc_acc1l; /* ISA_DSP_LEVEL2 only */
27 unsigned long sc_psw;
28 unsigned long sc_bpc; /* saved PC for TRAP syscalls */
29 unsigned long sc_bbpsw;
30 unsigned long sc_bbpc;
31 unsigned long sc_spu; /* saved user stack */
32 unsigned long sc_fp;
33 unsigned long sc_lr; /* saved PC for JL syscalls */
34 unsigned long sc_spi; /* saved kernel stack */
35
36 unsigned long oldmask;
37};
38
39#endif /* _ASM_M32R_SIGCONTEXT_H */
diff --git a/arch/m32r/include/asm/siginfo.h b/arch/m32r/include/asm/siginfo.h
new file mode 100644
index 000000000000..7d9cd9ebfd0e
--- /dev/null
+++ b/arch/m32r/include/asm/siginfo.h
@@ -0,0 +1,6 @@
1#ifndef _M32R_SIGINFO_H
2#define _M32R_SIGINFO_H
3
4#include <asm-generic/siginfo.h>
5
6#endif /* _M32R_SIGINFO_H */
diff --git a/arch/m32r/include/asm/signal.h b/arch/m32r/include/asm/signal.h
new file mode 100644
index 000000000000..1a607066bc64
--- /dev/null
+++ b/arch/m32r/include/asm/signal.h
@@ -0,0 +1,166 @@
1#ifndef _ASM_M32R_SIGNAL_H
2#define _ASM_M32R_SIGNAL_H
3
4#include <linux/types.h>
5#include <linux/time.h>
6#include <linux/compiler.h>
7
8/* Avoid too many header ordering problems. */
9struct siginfo;
10
11#ifdef __KERNEL__
12/* Most things should be clean enough to redefine this at will, if care
13 is taken to make libc match. */
14
15#define _NSIG 64
16#define _NSIG_BPW 32
17#define _NSIG_WORDS (_NSIG / _NSIG_BPW)
18
19typedef unsigned long old_sigset_t; /* at least 32 bits */
20
21typedef struct {
22 unsigned long sig[_NSIG_WORDS];
23} sigset_t;
24
25#else
26/* Here we must cater to libcs that poke about in kernel headers. */
27
28#define NSIG 32
29typedef unsigned long sigset_t;
30
31#endif /* __KERNEL__ */
32
33#define SIGHUP 1
34#define SIGINT 2
35#define SIGQUIT 3
36#define SIGILL 4
37#define SIGTRAP 5
38#define SIGABRT 6
39#define SIGIOT 6
40#define SIGBUS 7
41#define SIGFPE 8
42#define SIGKILL 9
43#define SIGUSR1 10
44#define SIGSEGV 11
45#define SIGUSR2 12
46#define SIGPIPE 13
47#define SIGALRM 14
48#define SIGTERM 15
49#define SIGSTKFLT 16
50#define SIGCHLD 17
51#define SIGCONT 18
52#define SIGSTOP 19
53#define SIGTSTP 20
54#define SIGTTIN 21
55#define SIGTTOU 22
56#define SIGURG 23
57#define SIGXCPU 24
58#define SIGXFSZ 25
59#define SIGVTALRM 26
60#define SIGPROF 27
61#define SIGWINCH 28
62#define SIGIO 29
63#define SIGPOLL SIGIO
64/*
65#define SIGLOST 29
66*/
67#define SIGPWR 30
68#define SIGSYS 31
69#define SIGUNUSED 31
70
71/* These should not be considered constants from userland. */
72#define SIGRTMIN 32
73#define SIGRTMAX _NSIG
74
75/*
76 * SA_FLAGS values:
77 *
78 * SA_ONSTACK indicates that a registered stack_t will be used.
79 * SA_RESTART flag to get restarting signals (which were the default long ago)
80 * SA_NOCLDSTOP flag to turn off SIGCHLD when children stop.
81 * SA_RESETHAND clears the handler when the signal is delivered.
82 * SA_NOCLDWAIT flag on SIGCHLD to inhibit zombies.
83 * SA_NODEFER prevents the current signal from being masked in the handler.
84 *
85 * SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single
86 * Unix names RESETHAND and NODEFER respectively.
87 */
88#define SA_NOCLDSTOP 0x00000001u
89#define SA_NOCLDWAIT 0x00000002u
90#define SA_SIGINFO 0x00000004u
91#define SA_ONSTACK 0x08000000u
92#define SA_RESTART 0x10000000u
93#define SA_NODEFER 0x40000000u
94#define SA_RESETHAND 0x80000000u
95
96#define SA_NOMASK SA_NODEFER
97#define SA_ONESHOT SA_RESETHAND
98
99#define SA_RESTORER 0x04000000
100
101/*
102 * sigaltstack controls
103 */
104#define SS_ONSTACK 1
105#define SS_DISABLE 2
106
107#define MINSIGSTKSZ 2048
108#define SIGSTKSZ 8192
109
110#include <asm-generic/signal.h>
111
112#ifdef __KERNEL__
113struct old_sigaction {
114 __sighandler_t sa_handler;
115 old_sigset_t sa_mask;
116 unsigned long sa_flags;
117 __sigrestore_t sa_restorer;
118};
119
120struct sigaction {
121 __sighandler_t sa_handler;
122 unsigned long sa_flags;
123 __sigrestore_t sa_restorer;
124 sigset_t sa_mask; /* mask last for extensibility */
125};
126
127struct k_sigaction {
128 struct sigaction sa;
129};
130#else
131/* Here we must cater to libcs that poke about in kernel headers. */
132
133struct sigaction {
134 union {
135 __sighandler_t _sa_handler;
136 void (*_sa_sigaction)(int, struct siginfo *, void *);
137 } _u;
138 sigset_t sa_mask;
139 unsigned long sa_flags;
140 void (*sa_restorer)(void);
141};
142
143#define sa_handler _u._sa_handler
144#define sa_sigaction _u._sa_sigaction
145
146#endif /* __KERNEL__ */
147
148typedef struct sigaltstack {
149 void __user *ss_sp;
150 int ss_flags;
151 size_t ss_size;
152} stack_t;
153
154#ifdef __KERNEL__
155#include <asm/sigcontext.h>
156
157#undef __HAVE_ARCH_SIG_BITOPS
158
159struct pt_regs;
160extern int do_signal(struct pt_regs *regs, sigset_t *oldset);
161
162#define ptrace_signal_deliver(regs, cookie) do { } while (0)
163
164#endif /* __KERNEL__ */
165
166#endif /* _ASM_M32R_SIGNAL_H */
diff --git a/arch/m32r/include/asm/smp.h b/arch/m32r/include/asm/smp.h
new file mode 100644
index 000000000000..b96a6d2ffbc3
--- /dev/null
+++ b/arch/m32r/include/asm/smp.h
@@ -0,0 +1,119 @@
1#ifndef _ASM_M32R_SMP_H
2#define _ASM_M32R_SMP_H
3
4#ifdef CONFIG_SMP
5#ifndef __ASSEMBLY__
6
7#include <linux/cpumask.h>
8#include <linux/spinlock.h>
9#include <linux/threads.h>
10#include <asm/m32r.h>
11
12#define PHYSID_ARRAY_SIZE 1
13
14struct physid_mask
15{
16 unsigned long mask[PHYSID_ARRAY_SIZE];
17};
18
19typedef struct physid_mask physid_mask_t;
20
21#define physid_set(physid, map) set_bit(physid, (map).mask)
22#define physid_clear(physid, map) clear_bit(physid, (map).mask)
23#define physid_isset(physid, map) test_bit(physid, (map).mask)
24#define physid_test_and_set(physid, map) test_and_set_bit(physid, (map).mask)
25
26#define physids_and(dst, src1, src2) bitmap_and((dst).mask, (src1).mask, (src2).mask, MAX_APICS)
27#define physids_or(dst, src1, src2) bitmap_or((dst).mask, (src1).mask, (src2).mask, MAX_APICS)
28#define physids_clear(map) bitmap_zero((map).mask, MAX_APICS)
29#define physids_complement(dst, src) bitmap_complement((dst).mask,(src).mask, MAX_APICS)
30#define physids_empty(map) bitmap_empty((map).mask, MAX_APICS)
31#define physids_equal(map1, map2) bitmap_equal((map1).mask, (map2).mask, MAX_APICS)
32#define physids_weight(map) bitmap_weight((map).mask, MAX_APICS)
33#define physids_shift_right(d, s, n) bitmap_shift_right((d).mask, (s).mask, n, MAX_APICS)
34#define physids_shift_left(d, s, n) bitmap_shift_left((d).mask, (s).mask, n, MAX_APICS)
35#define physids_coerce(map) ((map).mask[0])
36
37#define physids_promote(physids) \
38 ({ \
39 physid_mask_t __physid_mask = PHYSID_MASK_NONE; \
40 __physid_mask.mask[0] = physids; \
41 __physid_mask; \
42 })
43
44#define physid_mask_of_physid(physid) \
45 ({ \
46 physid_mask_t __physid_mask = PHYSID_MASK_NONE; \
47 physid_set(physid, __physid_mask); \
48 __physid_mask; \
49 })
50
51#define PHYSID_MASK_ALL { {[0 ... PHYSID_ARRAY_SIZE-1] = ~0UL} }
52#define PHYSID_MASK_NONE { {[0 ... PHYSID_ARRAY_SIZE-1] = 0UL} }
53
54extern physid_mask_t phys_cpu_present_map;
55
56/*
57 * Some lowlevel functions might want to know about
58 * the real CPU ID <-> CPU # mapping.
59 */
60extern volatile int cpu_2_physid[NR_CPUS];
61#define cpu_to_physid(cpu_id) cpu_2_physid[cpu_id]
62
63#define raw_smp_processor_id() (current_thread_info()->cpu)
64
65extern cpumask_t cpu_callout_map;
66
67static __inline__ int hard_smp_processor_id(void)
68{
69 return (int)*(volatile long *)M32R_CPUID_PORTL;
70}
71
72static __inline__ int cpu_logical_map(int cpu)
73{
74 return cpu;
75}
76
77static __inline__ int cpu_number_map(int cpu)
78{
79 return cpu;
80}
81
82static __inline__ unsigned int num_booting_cpus(void)
83{
84 return cpus_weight(cpu_callout_map);
85}
86
87extern void smp_send_timer(void);
88extern unsigned long send_IPI_mask_phys(cpumask_t, int, int);
89
90extern void arch_send_call_function_single_ipi(int cpu);
91extern void arch_send_call_function_ipi(cpumask_t mask);
92
93#endif /* not __ASSEMBLY__ */
94
95#define NO_PROC_ID (0xff) /* No processor magic marker */
96
97#define PROC_CHANGE_PENALTY (15) /* Schedule penalty */
98
99/*
100 * M32R-mp IPI
101 */
102#define RESCHEDULE_IPI (M32R_IRQ_IPI0-M32R_IRQ_IPI0)
103#define INVALIDATE_TLB_IPI (M32R_IRQ_IPI1-M32R_IRQ_IPI0)
104#define CALL_FUNCTION_IPI (M32R_IRQ_IPI2-M32R_IRQ_IPI0)
105#define LOCAL_TIMER_IPI (M32R_IRQ_IPI3-M32R_IRQ_IPI0)
106#define INVALIDATE_CACHE_IPI (M32R_IRQ_IPI4-M32R_IRQ_IPI0)
107#define CPU_BOOT_IPI (M32R_IRQ_IPI5-M32R_IRQ_IPI0)
108#define CALL_FUNC_SINGLE_IPI (M32R_IRQ_IPI6-M32R_IRQ_IPI0)
109
110#define IPI_SHIFT (0)
111#define NR_IPIS (8)
112
113#else /* CONFIG_SMP */
114
115#define hard_smp_processor_id() 0
116
117#endif /* CONFIG_SMP */
118
119#endif /* _ASM_M32R_SMP_H */
diff --git a/arch/m32r/include/asm/socket.h b/arch/m32r/include/asm/socket.h
new file mode 100644
index 000000000000..be7ed589af5c
--- /dev/null
+++ b/arch/m32r/include/asm/socket.h
@@ -0,0 +1,60 @@
1#ifndef _ASM_M32R_SOCKET_H
2#define _ASM_M32R_SOCKET_H
3
4#include <asm/sockios.h>
5
6/* For setsockoptions(2) */
7#define SOL_SOCKET 1
8
9#define SO_DEBUG 1
10#define SO_REUSEADDR 2
11#define SO_TYPE 3
12#define SO_ERROR 4
13#define SO_DONTROUTE 5
14#define SO_BROADCAST 6
15#define SO_SNDBUF 7
16#define SO_RCVBUF 8
17#define SO_SNDBUFFORCE 32
18#define SO_RCVBUFFORCE 33
19#define SO_KEEPALIVE 9
20#define SO_OOBINLINE 10
21#define SO_NO_CHECK 11
22#define SO_PRIORITY 12
23#define SO_LINGER 13
24#define SO_BSDCOMPAT 14
25/* To add :#define SO_REUSEPORT 15 */
26#define SO_PASSCRED 16
27#define SO_PEERCRED 17
28#define SO_RCVLOWAT 18
29#define SO_SNDLOWAT 19
30#define SO_RCVTIMEO 20
31#define SO_SNDTIMEO 21
32
33/* Security levels - as per NRL IPv6 - don't actually do anything */
34#define SO_SECURITY_AUTHENTICATION 22
35#define SO_SECURITY_ENCRYPTION_TRANSPORT 23
36#define SO_SECURITY_ENCRYPTION_NETWORK 24
37
38#define SO_BINDTODEVICE 25
39
40/* Socket filtering */
41#define SO_ATTACH_FILTER 26
42#define SO_DETACH_FILTER 27
43
44#define SO_PEERNAME 28
45#define SO_TIMESTAMP 29
46#define SCM_TIMESTAMP SO_TIMESTAMP
47
48#define SO_ACCEPTCONN 30
49
50#define SO_PEERSEC 31
51#define SO_PASSSEC 34
52#define SO_TIMESTAMPNS 35
53#define SCM_TIMESTAMPNS SO_TIMESTAMPNS
54
55#define SO_MARK 36
56
57#define SO_TIMESTAMPING 37
58#define SCM_TIMESTAMPING SO_TIMESTAMPING
59
60#endif /* _ASM_M32R_SOCKET_H */
diff --git a/arch/m32r/include/asm/sockios.h b/arch/m32r/include/asm/sockios.h
new file mode 100644
index 000000000000..6c1fb9b43bdb
--- /dev/null
+++ b/arch/m32r/include/asm/sockios.h
@@ -0,0 +1,13 @@
1#ifndef _ASM_M32R_SOCKIOS_H
2#define _ASM_M32R_SOCKIOS_H
3
4/* Socket-level I/O control calls. */
5#define FIOSETOWN 0x8901
6#define SIOCSPGRP 0x8902
7#define FIOGETOWN 0x8903
8#define SIOCGPGRP 0x8904
9#define SIOCATMARK 0x8905
10#define SIOCGSTAMP 0x8906 /* Get stamp (timeval) */
11#define SIOCGSTAMPNS 0x8907 /* Get stamp (timespec) */
12
13#endif /* _ASM_M32R_SOCKIOS_H */
diff --git a/arch/m32r/include/asm/spinlock.h b/arch/m32r/include/asm/spinlock.h
new file mode 100644
index 000000000000..dded923883b2
--- /dev/null
+++ b/arch/m32r/include/asm/spinlock.h
@@ -0,0 +1,326 @@
1#ifndef _ASM_M32R_SPINLOCK_H
2#define _ASM_M32R_SPINLOCK_H
3
4/*
5 * linux/include/asm-m32r/spinlock.h
6 *
7 * M32R version:
8 * Copyright (C) 2001, 2002 Hitoshi Yamamoto
9 * Copyright (C) 2004 Hirokazu Takata <takata at linux-m32r.org>
10 */
11
12#include <linux/compiler.h>
13#include <asm/atomic.h>
14#include <asm/page.h>
15
16/*
17 * Your basic SMP spinlocks, allowing only a single CPU anywhere
18 *
19 * (the type definitions are in asm/spinlock_types.h)
20 *
21 * Simple spin lock operations. There are two variants, one clears IRQ's
22 * on the local processor, one does not.
23 *
24 * We make no fairness assumptions. They have a cost.
25 */
26
27#define __raw_spin_is_locked(x) (*(volatile int *)(&(x)->slock) <= 0)
28#define __raw_spin_lock_flags(lock, flags) __raw_spin_lock(lock)
29#define __raw_spin_unlock_wait(x) \
30 do { cpu_relax(); } while (__raw_spin_is_locked(x))
31
32/**
33 * __raw_spin_trylock - Try spin lock and return a result
34 * @lock: Pointer to the lock variable
35 *
36 * __raw_spin_trylock() tries to get the lock and returns a result.
37 * On the m32r, the result value is 1 (= Success) or 0 (= Failure).
38 */
39static inline int __raw_spin_trylock(raw_spinlock_t *lock)
40{
41 int oldval;
42 unsigned long tmp1, tmp2;
43
44 /*
45 * lock->slock : =1 : unlock
46 * : <=0 : lock
47 * {
48 * oldval = lock->slock; <--+ need atomic operation
49 * lock->slock = 0; <--+
50 * }
51 */
52 __asm__ __volatile__ (
53 "# __raw_spin_trylock \n\t"
54 "ldi %1, #0; \n\t"
55 "mvfc %2, psw; \n\t"
56 "clrpsw #0x40 -> nop; \n\t"
57 DCACHE_CLEAR("%0", "r6", "%3")
58 "lock %0, @%3; \n\t"
59 "unlock %1, @%3; \n\t"
60 "mvtc %2, psw; \n\t"
61 : "=&r" (oldval), "=&r" (tmp1), "=&r" (tmp2)
62 : "r" (&lock->slock)
63 : "memory"
64#ifdef CONFIG_CHIP_M32700_TS1
65 , "r6"
66#endif /* CONFIG_CHIP_M32700_TS1 */
67 );
68
69 return (oldval > 0);
70}
71
72static inline void __raw_spin_lock(raw_spinlock_t *lock)
73{
74 unsigned long tmp0, tmp1;
75
76 /*
77 * lock->slock : =1 : unlock
78 * : <=0 : lock
79 *
80 * for ( ; ; ) {
81 * lock->slock -= 1; <-- need atomic operation
82 * if (lock->slock == 0) break;
83 * for ( ; lock->slock <= 0 ; );
84 * }
85 */
86 __asm__ __volatile__ (
87 "# __raw_spin_lock \n\t"
88 ".fillinsn \n"
89 "1: \n\t"
90 "mvfc %1, psw; \n\t"
91 "clrpsw #0x40 -> nop; \n\t"
92 DCACHE_CLEAR("%0", "r6", "%2")
93 "lock %0, @%2; \n\t"
94 "addi %0, #-1; \n\t"
95 "unlock %0, @%2; \n\t"
96 "mvtc %1, psw; \n\t"
97 "bltz %0, 2f; \n\t"
98 LOCK_SECTION_START(".balign 4 \n\t")
99 ".fillinsn \n"
100 "2: \n\t"
101 "ld %0, @%2; \n\t"
102 "bgtz %0, 1b; \n\t"
103 "bra 2b; \n\t"
104 LOCK_SECTION_END
105 : "=&r" (tmp0), "=&r" (tmp1)
106 : "r" (&lock->slock)
107 : "memory"
108#ifdef CONFIG_CHIP_M32700_TS1
109 , "r6"
110#endif /* CONFIG_CHIP_M32700_TS1 */
111 );
112}
113
114static inline void __raw_spin_unlock(raw_spinlock_t *lock)
115{
116 mb();
117 lock->slock = 1;
118}
119
120/*
121 * Read-write spinlocks, allowing multiple readers
122 * but only one writer.
123 *
124 * NOTE! it is quite common to have readers in interrupts
125 * but no interrupt writers. For those circumstances we
126 * can "mix" irq-safe locks - any writer needs to get a
127 * irq-safe write-lock, but readers can get non-irqsafe
128 * read-locks.
129 *
130 * On x86, we implement read-write locks as a 32-bit counter
131 * with the high bit (sign) being the "contended" bit.
132 *
133 * The inline assembly is non-obvious. Think about it.
134 *
135 * Changed to use the same technique as rw semaphores. See
136 * semaphore.h for details. -ben
137 */
138
139/**
140 * read_can_lock - would read_trylock() succeed?
141 * @lock: the rwlock in question.
142 */
143#define __raw_read_can_lock(x) ((int)(x)->lock > 0)
144
145/**
146 * write_can_lock - would write_trylock() succeed?
147 * @lock: the rwlock in question.
148 */
149#define __raw_write_can_lock(x) ((x)->lock == RW_LOCK_BIAS)
150
151static inline void __raw_read_lock(raw_rwlock_t *rw)
152{
153 unsigned long tmp0, tmp1;
154
155 /*
156 * rw->lock : >0 : unlock
157 * : <=0 : lock
158 *
159 * for ( ; ; ) {
160 * rw->lock -= 1; <-- need atomic operation
161 * if (rw->lock >= 0) break;
162 * rw->lock += 1; <-- need atomic operation
163 * for ( ; rw->lock <= 0 ; );
164 * }
165 */
166 __asm__ __volatile__ (
167 "# read_lock \n\t"
168 ".fillinsn \n"
169 "1: \n\t"
170 "mvfc %1, psw; \n\t"
171 "clrpsw #0x40 -> nop; \n\t"
172 DCACHE_CLEAR("%0", "r6", "%2")
173 "lock %0, @%2; \n\t"
174 "addi %0, #-1; \n\t"
175 "unlock %0, @%2; \n\t"
176 "mvtc %1, psw; \n\t"
177 "bltz %0, 2f; \n\t"
178 LOCK_SECTION_START(".balign 4 \n\t")
179 ".fillinsn \n"
180 "2: \n\t"
181 "clrpsw #0x40 -> nop; \n\t"
182 DCACHE_CLEAR("%0", "r6", "%2")
183 "lock %0, @%2; \n\t"
184 "addi %0, #1; \n\t"
185 "unlock %0, @%2; \n\t"
186 "mvtc %1, psw; \n\t"
187 ".fillinsn \n"
188 "3: \n\t"
189 "ld %0, @%2; \n\t"
190 "bgtz %0, 1b; \n\t"
191 "bra 3b; \n\t"
192 LOCK_SECTION_END
193 : "=&r" (tmp0), "=&r" (tmp1)
194 : "r" (&rw->lock)
195 : "memory"
196#ifdef CONFIG_CHIP_M32700_TS1
197 , "r6"
198#endif /* CONFIG_CHIP_M32700_TS1 */
199 );
200}
201
202static inline void __raw_write_lock(raw_rwlock_t *rw)
203{
204 unsigned long tmp0, tmp1, tmp2;
205
206 /*
207 * rw->lock : =RW_LOCK_BIAS_STR : unlock
208 * : !=RW_LOCK_BIAS_STR : lock
209 *
210 * for ( ; ; ) {
211 * rw->lock -= RW_LOCK_BIAS_STR; <-- need atomic operation
212 * if (rw->lock == 0) break;
213 * rw->lock += RW_LOCK_BIAS_STR; <-- need atomic operation
214 * for ( ; rw->lock != RW_LOCK_BIAS_STR ; ) ;
215 * }
216 */
217 __asm__ __volatile__ (
218 "# write_lock \n\t"
219 "seth %1, #high(" RW_LOCK_BIAS_STR "); \n\t"
220 "or3 %1, %1, #low(" RW_LOCK_BIAS_STR "); \n\t"
221 ".fillinsn \n"
222 "1: \n\t"
223 "mvfc %2, psw; \n\t"
224 "clrpsw #0x40 -> nop; \n\t"
225 DCACHE_CLEAR("%0", "r7", "%3")
226 "lock %0, @%3; \n\t"
227 "sub %0, %1; \n\t"
228 "unlock %0, @%3; \n\t"
229 "mvtc %2, psw; \n\t"
230 "bnez %0, 2f; \n\t"
231 LOCK_SECTION_START(".balign 4 \n\t")
232 ".fillinsn \n"
233 "2: \n\t"
234 "clrpsw #0x40 -> nop; \n\t"
235 DCACHE_CLEAR("%0", "r7", "%3")
236 "lock %0, @%3; \n\t"
237 "add %0, %1; \n\t"
238 "unlock %0, @%3; \n\t"
239 "mvtc %2, psw; \n\t"
240 ".fillinsn \n"
241 "3: \n\t"
242 "ld %0, @%3; \n\t"
243 "beq %0, %1, 1b; \n\t"
244 "bra 3b; \n\t"
245 LOCK_SECTION_END
246 : "=&r" (tmp0), "=&r" (tmp1), "=&r" (tmp2)
247 : "r" (&rw->lock)
248 : "memory"
249#ifdef CONFIG_CHIP_M32700_TS1
250 , "r7"
251#endif /* CONFIG_CHIP_M32700_TS1 */
252 );
253}
254
255static inline void __raw_read_unlock(raw_rwlock_t *rw)
256{
257 unsigned long tmp0, tmp1;
258
259 __asm__ __volatile__ (
260 "# read_unlock \n\t"
261 "mvfc %1, psw; \n\t"
262 "clrpsw #0x40 -> nop; \n\t"
263 DCACHE_CLEAR("%0", "r6", "%2")
264 "lock %0, @%2; \n\t"
265 "addi %0, #1; \n\t"
266 "unlock %0, @%2; \n\t"
267 "mvtc %1, psw; \n\t"
268 : "=&r" (tmp0), "=&r" (tmp1)
269 : "r" (&rw->lock)
270 : "memory"
271#ifdef CONFIG_CHIP_M32700_TS1
272 , "r6"
273#endif /* CONFIG_CHIP_M32700_TS1 */
274 );
275}
276
277static inline void __raw_write_unlock(raw_rwlock_t *rw)
278{
279 unsigned long tmp0, tmp1, tmp2;
280
281 __asm__ __volatile__ (
282 "# write_unlock \n\t"
283 "seth %1, #high(" RW_LOCK_BIAS_STR "); \n\t"
284 "or3 %1, %1, #low(" RW_LOCK_BIAS_STR "); \n\t"
285 "mvfc %2, psw; \n\t"
286 "clrpsw #0x40 -> nop; \n\t"
287 DCACHE_CLEAR("%0", "r7", "%3")
288 "lock %0, @%3; \n\t"
289 "add %0, %1; \n\t"
290 "unlock %0, @%3; \n\t"
291 "mvtc %2, psw; \n\t"
292 : "=&r" (tmp0), "=&r" (tmp1), "=&r" (tmp2)
293 : "r" (&rw->lock)
294 : "memory"
295#ifdef CONFIG_CHIP_M32700_TS1
296 , "r7"
297#endif /* CONFIG_CHIP_M32700_TS1 */
298 );
299}
300
301static inline int __raw_read_trylock(raw_rwlock_t *lock)
302{
303 atomic_t *count = (atomic_t*)lock;
304 if (atomic_dec_return(count) >= 0)
305 return 1;
306 atomic_inc(count);
307 return 0;
308}
309
310static inline int __raw_write_trylock(raw_rwlock_t *lock)
311{
312 atomic_t *count = (atomic_t *)lock;
313 if (atomic_sub_and_test(RW_LOCK_BIAS, count))
314 return 1;
315 atomic_add(RW_LOCK_BIAS, count);
316 return 0;
317}
318
319#define __raw_read_lock_flags(lock, flags) __raw_read_lock(lock)
320#define __raw_write_lock_flags(lock, flags) __raw_write_lock(lock)
321
322#define _raw_spin_relax(lock) cpu_relax()
323#define _raw_read_relax(lock) cpu_relax()
324#define _raw_write_relax(lock) cpu_relax()
325
326#endif /* _ASM_M32R_SPINLOCK_H */
diff --git a/arch/m32r/include/asm/spinlock_types.h b/arch/m32r/include/asm/spinlock_types.h
new file mode 100644
index 000000000000..83f52105c0e4
--- /dev/null
+++ b/arch/m32r/include/asm/spinlock_types.h
@@ -0,0 +1,23 @@
1#ifndef _ASM_M32R_SPINLOCK_TYPES_H
2#define _ASM_M32R_SPINLOCK_TYPES_H
3
4#ifndef __LINUX_SPINLOCK_TYPES_H
5# error "please don't include this file directly"
6#endif
7
8typedef struct {
9 volatile int slock;
10} raw_spinlock_t;
11
12#define __RAW_SPIN_LOCK_UNLOCKED { 1 }
13
14typedef struct {
15 volatile int lock;
16} raw_rwlock_t;
17
18#define RW_LOCK_BIAS 0x01000000
19#define RW_LOCK_BIAS_STR "0x01000000"
20
21#define __RAW_RW_LOCK_UNLOCKED { RW_LOCK_BIAS }
22
23#endif /* _ASM_M32R_SPINLOCK_TYPES_H */
diff --git a/arch/m32r/include/asm/stat.h b/arch/m32r/include/asm/stat.h
new file mode 100644
index 000000000000..da4518f82d6d
--- /dev/null
+++ b/arch/m32r/include/asm/stat.h
@@ -0,0 +1,87 @@
1#ifndef _ASM_M32R_STAT_H
2#define _ASM_M32R_STAT_H
3
4#include <asm/byteorder.h>
5
6struct __old_kernel_stat {
7 unsigned short st_dev;
8 unsigned short st_ino;
9 unsigned short st_mode;
10 unsigned short st_nlink;
11 unsigned short st_uid;
12 unsigned short st_gid;
13 unsigned short st_rdev;
14 unsigned long st_size;
15 unsigned long st_atime;
16 unsigned long st_mtime;
17 unsigned long st_ctime;
18};
19
20#define STAT_HAVE_NSEC 1
21
22struct stat {
23 unsigned short st_dev;
24 unsigned short __pad1;
25 unsigned long st_ino;
26 unsigned short st_mode;
27 unsigned short st_nlink;
28 unsigned short st_uid;
29 unsigned short st_gid;
30 unsigned short st_rdev;
31 unsigned short __pad2;
32 unsigned long st_size;
33 unsigned long st_blksize;
34 unsigned long st_blocks;
35 unsigned long st_atime;
36 unsigned long st_atime_nsec;
37 unsigned long st_mtime;
38 unsigned long st_mtime_nsec;
39 unsigned long st_ctime;
40 unsigned long st_ctime_nsec;
41 unsigned long __unused4;
42 unsigned long __unused5;
43};
44
45/* This matches struct stat64 in glibc2.1, hence the absolutely
46 * insane amounts of padding around dev_t's.
47 */
48struct stat64 {
49 unsigned long long st_dev;
50 unsigned char __pad0[4];
51#define STAT64_HAS_BROKEN_ST_INO
52 unsigned long __st_ino;
53
54 unsigned int st_mode;
55 unsigned int st_nlink;
56
57 unsigned long st_uid;
58 unsigned long st_gid;
59
60 unsigned long long st_rdev;
61 unsigned char __pad3[4];
62
63 long long st_size;
64 unsigned long st_blksize;
65
66#if defined(__BIG_ENDIAN)
67 unsigned long __pad4; /* future possible st_blocks high bits */
68 unsigned long st_blocks; /* Number 512-byte blocks allocated. */
69#elif defined(__LITTLE_ENDIAN)
70 unsigned long st_blocks; /* Number 512-byte blocks allocated. */
71 unsigned long __pad4; /* future possible st_blocks high bits */
72#else
73#error no endian defined
74#endif
75 unsigned long st_atime;
76 unsigned long st_atime_nsec;
77
78 unsigned long st_mtime;
79 unsigned long st_mtime_nsec;
80
81 unsigned long st_ctime;
82 unsigned long st_ctime_nsec;
83
84 unsigned long long st_ino;
85};
86
87#endif /* _ASM_M32R_STAT_H */
diff --git a/arch/m32r/include/asm/statfs.h b/arch/m32r/include/asm/statfs.h
new file mode 100644
index 000000000000..6eb4c6007e6b
--- /dev/null
+++ b/arch/m32r/include/asm/statfs.h
@@ -0,0 +1,6 @@
1#ifndef _ASM_M32R_STATFS_H
2#define _ASM_M32R_STATFS_H
3
4#include <asm-generic/statfs.h>
5
6#endif /* _ASM_M32R_STATFS_H */
diff --git a/arch/m32r/include/asm/string.h b/arch/m32r/include/asm/string.h
new file mode 100644
index 000000000000..e61e2b0bfc1f
--- /dev/null
+++ b/arch/m32r/include/asm/string.h
@@ -0,0 +1,13 @@
1#ifndef _ASM_M32R_STRING_H
2#define _ASM_M32R_STRING_H
3
4#define __HAVE_ARCH_STRLEN
5extern size_t strlen(const char * s);
6
7#define __HAVE_ARCH_MEMCPY
8extern void *memcpy(void *__to, __const__ void *__from, size_t __n);
9
10#define __HAVE_ARCH_MEMSET
11extern void *memset(void *__s, int __c, size_t __count);
12
13#endif /* _ASM_M32R_STRING_H */
diff --git a/arch/m32r/include/asm/swab.h b/arch/m32r/include/asm/swab.h
new file mode 100644
index 000000000000..54dab001d6d1
--- /dev/null
+++ b/arch/m32r/include/asm/swab.h
@@ -0,0 +1,10 @@
1#ifndef _ASM_M32R_SWAB_H
2#define _ASM_M32R_SWAB_H
3
4#include <linux/types.h>
5
6#if !defined(__STRICT_ANSI__) || defined(__KERNEL__)
7# define __SWAB_64_THRU_32__
8#endif
9
10#endif /* _ASM_M32R_SWAB_H */
diff --git a/arch/m32r/include/asm/syscall.h b/arch/m32r/include/asm/syscall.h
new file mode 100644
index 000000000000..25f316f2b78d
--- /dev/null
+++ b/arch/m32r/include/asm/syscall.h
@@ -0,0 +1,8 @@
1#ifndef _ASM_M32R_SYSCALL_H
2#define _ASM_M32R_SYSCALL_H
3
4/* Definitions for the system call vector. */
5#define SYSCALL_VECTOR "2"
6#define SYSCALL_VECTOR_ADDRESS "0xa0"
7
8#endif /* _ASM_M32R_SYSCALL_H */
diff --git a/arch/m32r/include/asm/system.h b/arch/m32r/include/asm/system.h
new file mode 100644
index 000000000000..c980f5ba8de7
--- /dev/null
+++ b/arch/m32r/include/asm/system.h
@@ -0,0 +1,431 @@
1#ifndef _ASM_M32R_SYSTEM_H
2#define _ASM_M32R_SYSTEM_H
3
4/*
5 * This file is subject to the terms and conditions of the GNU General Public
6 * License. See the file "COPYING" in the main directory of this archive
7 * for more details.
8 *
9 * Copyright (C) 2001 Hiroyuki Kondo, Hirokazu Takata, and Hitoshi Yamamoto
10 * Copyright (C) 2004, 2006 Hirokazu Takata <takata at linux-m32r.org>
11 */
12
13#include <linux/compiler.h>
14#include <asm/assembler.h>
15
16#ifdef __KERNEL__
17
18/*
19 * switch_to(prev, next) should switch from task `prev' to `next'
20 * `prev' will never be the same as `next'.
21 *
22 * `next' and `prev' should be struct task_struct, but it isn't always defined
23 */
24
25#if defined(CONFIG_FRAME_POINTER) || \
26 !defined(CONFIG_SCHED_OMIT_FRAME_POINTER)
27#define M32R_PUSH_FP " push fp\n"
28#define M32R_POP_FP " pop fp\n"
29#else
30#define M32R_PUSH_FP ""
31#define M32R_POP_FP ""
32#endif
33
34#define switch_to(prev, next, last) do { \
35 __asm__ __volatile__ ( \
36 " seth lr, #high(1f) \n" \
37 " or3 lr, lr, #low(1f) \n" \
38 " st lr, @%4 ; store old LR \n" \
39 " ld lr, @%5 ; load new LR \n" \
40 M32R_PUSH_FP \
41 " st sp, @%2 ; store old SP \n" \
42 " ld sp, @%3 ; load new SP \n" \
43 " push %1 ; store `prev' on new stack \n" \
44 " jmp lr \n" \
45 " .fillinsn \n" \
46 "1: \n" \
47 " pop %0 ; restore `__last' from new stack \n" \
48 M32R_POP_FP \
49 : "=r" (last) \
50 : "0" (prev), \
51 "r" (&(prev->thread.sp)), "r" (&(next->thread.sp)), \
52 "r" (&(prev->thread.lr)), "r" (&(next->thread.lr)) \
53 : "memory", "lr" \
54 ); \
55} while(0)
56
57/* Interrupt Control */
58#if !defined(CONFIG_CHIP_M32102) && !defined(CONFIG_CHIP_M32104)
59#define local_irq_enable() \
60 __asm__ __volatile__ ("setpsw #0x40 -> nop": : :"memory")
61#define local_irq_disable() \
62 __asm__ __volatile__ ("clrpsw #0x40 -> nop": : :"memory")
63#else /* CONFIG_CHIP_M32102 || CONFIG_CHIP_M32104 */
64static inline void local_irq_enable(void)
65{
66 unsigned long tmpreg;
67 __asm__ __volatile__(
68 "mvfc %0, psw; \n\t"
69 "or3 %0, %0, #0x0040; \n\t"
70 "mvtc %0, psw; \n\t"
71 : "=&r" (tmpreg) : : "cbit", "memory");
72}
73
74static inline void local_irq_disable(void)
75{
76 unsigned long tmpreg0, tmpreg1;
77 __asm__ __volatile__(
78 "ld24 %0, #0 ; Use 32-bit insn. \n\t"
79 "mvfc %1, psw ; No interrupt can be accepted here. \n\t"
80 "mvtc %0, psw \n\t"
81 "and3 %0, %1, #0xffbf \n\t"
82 "mvtc %0, psw \n\t"
83 : "=&r" (tmpreg0), "=&r" (tmpreg1) : : "cbit", "memory");
84}
85#endif /* CONFIG_CHIP_M32102 || CONFIG_CHIP_M32104 */
86
87#define local_save_flags(x) \
88 __asm__ __volatile__("mvfc %0,psw" : "=r"(x) : /* no input */)
89
90#define local_irq_restore(x) \
91 __asm__ __volatile__("mvtc %0,psw" : /* no outputs */ \
92 : "r" (x) : "cbit", "memory")
93
94#if !(defined(CONFIG_CHIP_M32102) || defined(CONFIG_CHIP_M32104))
95#define local_irq_save(x) \
96 __asm__ __volatile__( \
97 "mvfc %0, psw; \n\t" \
98 "clrpsw #0x40 -> nop; \n\t" \
99 : "=r" (x) : /* no input */ : "memory")
100#else /* CONFIG_CHIP_M32102 || CONFIG_CHIP_M32104 */
101#define local_irq_save(x) \
102 ({ \
103 unsigned long tmpreg; \
104 __asm__ __volatile__( \
105 "ld24 %1, #0 \n\t" \
106 "mvfc %0, psw \n\t" \
107 "mvtc %1, psw \n\t" \
108 "and3 %1, %0, #0xffbf \n\t" \
109 "mvtc %1, psw \n\t" \
110 : "=r" (x), "=&r" (tmpreg) \
111 : : "cbit", "memory"); \
112 })
113#endif /* CONFIG_CHIP_M32102 || CONFIG_CHIP_M32104 */
114
115#define irqs_disabled() \
116 ({ \
117 unsigned long flags; \
118 local_save_flags(flags); \
119 !(flags & 0x40); \
120 })
121
122#define nop() __asm__ __volatile__ ("nop" : : )
123
124#define xchg(ptr, x) \
125 ((__typeof__(*(ptr)))__xchg((unsigned long)(x), (ptr), sizeof(*(ptr))))
126#define xchg_local(ptr, x) \
127 ((__typeof__(*(ptr)))__xchg_local((unsigned long)(x), (ptr), \
128 sizeof(*(ptr))))
129
130extern void __xchg_called_with_bad_pointer(void);
131
132#ifdef CONFIG_CHIP_M32700_TS1
133#define DCACHE_CLEAR(reg0, reg1, addr) \
134 "seth "reg1", #high(dcache_dummy); \n\t" \
135 "or3 "reg1", "reg1", #low(dcache_dummy); \n\t" \
136 "lock "reg0", @"reg1"; \n\t" \
137 "add3 "reg0", "addr", #0x1000; \n\t" \
138 "ld "reg0", @"reg0"; \n\t" \
139 "add3 "reg0", "addr", #0x2000; \n\t" \
140 "ld "reg0", @"reg0"; \n\t" \
141 "unlock "reg0", @"reg1"; \n\t"
142 /* FIXME: This workaround code cannot handle kernel modules
143 * correctly under SMP environment.
144 */
145#else /* CONFIG_CHIP_M32700_TS1 */
146#define DCACHE_CLEAR(reg0, reg1, addr)
147#endif /* CONFIG_CHIP_M32700_TS1 */
148
149static __always_inline unsigned long
150__xchg(unsigned long x, volatile void *ptr, int size)
151{
152 unsigned long flags;
153 unsigned long tmp = 0;
154
155 local_irq_save(flags);
156
157 switch (size) {
158#ifndef CONFIG_SMP
159 case 1:
160 __asm__ __volatile__ (
161 "ldb %0, @%2 \n\t"
162 "stb %1, @%2 \n\t"
163 : "=&r" (tmp) : "r" (x), "r" (ptr) : "memory");
164 break;
165 case 2:
166 __asm__ __volatile__ (
167 "ldh %0, @%2 \n\t"
168 "sth %1, @%2 \n\t"
169 : "=&r" (tmp) : "r" (x), "r" (ptr) : "memory");
170 break;
171 case 4:
172 __asm__ __volatile__ (
173 "ld %0, @%2 \n\t"
174 "st %1, @%2 \n\t"
175 : "=&r" (tmp) : "r" (x), "r" (ptr) : "memory");
176 break;
177#else /* CONFIG_SMP */
178 case 4:
179 __asm__ __volatile__ (
180 DCACHE_CLEAR("%0", "r4", "%2")
181 "lock %0, @%2; \n\t"
182 "unlock %1, @%2; \n\t"
183 : "=&r" (tmp) : "r" (x), "r" (ptr)
184 : "memory"
185#ifdef CONFIG_CHIP_M32700_TS1
186 , "r4"
187#endif /* CONFIG_CHIP_M32700_TS1 */
188 );
189 break;
190#endif /* CONFIG_SMP */
191 default:
192 __xchg_called_with_bad_pointer();
193 }
194
195 local_irq_restore(flags);
196
197 return (tmp);
198}
199
200static __always_inline unsigned long
201__xchg_local(unsigned long x, volatile void *ptr, int size)
202{
203 unsigned long flags;
204 unsigned long tmp = 0;
205
206 local_irq_save(flags);
207
208 switch (size) {
209 case 1:
210 __asm__ __volatile__ (
211 "ldb %0, @%2 \n\t"
212 "stb %1, @%2 \n\t"
213 : "=&r" (tmp) : "r" (x), "r" (ptr) : "memory");
214 break;
215 case 2:
216 __asm__ __volatile__ (
217 "ldh %0, @%2 \n\t"
218 "sth %1, @%2 \n\t"
219 : "=&r" (tmp) : "r" (x), "r" (ptr) : "memory");
220 break;
221 case 4:
222 __asm__ __volatile__ (
223 "ld %0, @%2 \n\t"
224 "st %1, @%2 \n\t"
225 : "=&r" (tmp) : "r" (x), "r" (ptr) : "memory");
226 break;
227 default:
228 __xchg_called_with_bad_pointer();
229 }
230
231 local_irq_restore(flags);
232
233 return (tmp);
234}
235
236#define __HAVE_ARCH_CMPXCHG 1
237
238static inline unsigned long
239__cmpxchg_u32(volatile unsigned int *p, unsigned int old, unsigned int new)
240{
241 unsigned long flags;
242 unsigned int retval;
243
244 local_irq_save(flags);
245 __asm__ __volatile__ (
246 DCACHE_CLEAR("%0", "r4", "%1")
247 M32R_LOCK" %0, @%1; \n"
248 " bne %0, %2, 1f; \n"
249 M32R_UNLOCK" %3, @%1; \n"
250 " bra 2f; \n"
251 " .fillinsn \n"
252 "1:"
253 M32R_UNLOCK" %0, @%1; \n"
254 " .fillinsn \n"
255 "2:"
256 : "=&r" (retval)
257 : "r" (p), "r" (old), "r" (new)
258 : "cbit", "memory"
259#ifdef CONFIG_CHIP_M32700_TS1
260 , "r4"
261#endif /* CONFIG_CHIP_M32700_TS1 */
262 );
263 local_irq_restore(flags);
264
265 return retval;
266}
267
268static inline unsigned long
269__cmpxchg_local_u32(volatile unsigned int *p, unsigned int old,
270 unsigned int new)
271{
272 unsigned long flags;
273 unsigned int retval;
274
275 local_irq_save(flags);
276 __asm__ __volatile__ (
277 DCACHE_CLEAR("%0", "r4", "%1")
278 "ld %0, @%1; \n"
279 " bne %0, %2, 1f; \n"
280 "st %3, @%1; \n"
281 " bra 2f; \n"
282 " .fillinsn \n"
283 "1:"
284 "st %0, @%1; \n"
285 " .fillinsn \n"
286 "2:"
287 : "=&r" (retval)
288 : "r" (p), "r" (old), "r" (new)
289 : "cbit", "memory"
290#ifdef CONFIG_CHIP_M32700_TS1
291 , "r4"
292#endif /* CONFIG_CHIP_M32700_TS1 */
293 );
294 local_irq_restore(flags);
295
296 return retval;
297}
298
299/* This function doesn't exist, so you'll get a linker error
300 if something tries to do an invalid cmpxchg(). */
301extern void __cmpxchg_called_with_bad_pointer(void);
302
303static inline unsigned long
304__cmpxchg(volatile void *ptr, unsigned long old, unsigned long new, int size)
305{
306 switch (size) {
307 case 4:
308 return __cmpxchg_u32(ptr, old, new);
309#if 0 /* we don't have __cmpxchg_u64 */
310 case 8:
311 return __cmpxchg_u64(ptr, old, new);
312#endif /* 0 */
313 }
314 __cmpxchg_called_with_bad_pointer();
315 return old;
316}
317
318#define cmpxchg(ptr, o, n) \
319 ((__typeof__(*(ptr))) __cmpxchg((ptr), (unsigned long)(o), \
320 (unsigned long)(n), sizeof(*(ptr))))
321
322#include <asm-generic/cmpxchg-local.h>
323
324static inline unsigned long __cmpxchg_local(volatile void *ptr,
325 unsigned long old,
326 unsigned long new, int size)
327{
328 switch (size) {
329 case 4:
330 return __cmpxchg_local_u32(ptr, old, new);
331 default:
332 return __cmpxchg_local_generic(ptr, old, new, size);
333 }
334
335 return old;
336}
337
338/*
339 * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make
340 * them available.
341 */
342#define cmpxchg_local(ptr, o, n) \
343 ((__typeof__(*(ptr)))__cmpxchg_local((ptr), (unsigned long)(o), \
344 (unsigned long)(n), sizeof(*(ptr))))
345#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
346
347#endif /* __KERNEL__ */
348
349/*
350 * Memory barrier.
351 *
352 * mb() prevents loads and stores being reordered across this point.
353 * rmb() prevents loads being reordered across this point.
354 * wmb() prevents stores being reordered across this point.
355 */
356#define mb() barrier()
357#define rmb() mb()
358#define wmb() mb()
359
360/**
361 * read_barrier_depends - Flush all pending reads that subsequents reads
362 * depend on.
363 *
364 * No data-dependent reads from memory-like regions are ever reordered
365 * over this barrier. All reads preceding this primitive are guaranteed
366 * to access memory (but not necessarily other CPUs' caches) before any
367 * reads following this primitive that depend on the data return by
368 * any of the preceding reads. This primitive is much lighter weight than
369 * rmb() on most CPUs, and is never heavier weight than is
370 * rmb().
371 *
372 * These ordering constraints are respected by both the local CPU
373 * and the compiler.
374 *
375 * Ordering is not guaranteed by anything other than these primitives,
376 * not even by data dependencies. See the documentation for
377 * memory_barrier() for examples and URLs to more information.
378 *
379 * For example, the following code would force ordering (the initial
380 * value of "a" is zero, "b" is one, and "p" is "&a"):
381 *
382 * <programlisting>
383 * CPU 0 CPU 1
384 *
385 * b = 2;
386 * memory_barrier();
387 * p = &b; q = p;
388 * read_barrier_depends();
389 * d = *q;
390 * </programlisting>
391 *
392 *
393 * because the read of "*q" depends on the read of "p" and these
394 * two reads are separated by a read_barrier_depends(). However,
395 * the following code, with the same initial values for "a" and "b":
396 *
397 * <programlisting>
398 * CPU 0 CPU 1
399 *
400 * a = 2;
401 * memory_barrier();
402 * b = 3; y = b;
403 * read_barrier_depends();
404 * x = a;
405 * </programlisting>
406 *
407 * does not enforce ordering, since there is no data dependency between
408 * the read of "a" and the read of "b". Therefore, on some CPUs, such
409 * as Alpha, "y" could be set to 3 and "x" to 0. Use rmb()
410 * in cases like this where there are no data dependencies.
411 **/
412
413#define read_barrier_depends() do { } while (0)
414
415#ifdef CONFIG_SMP
416#define smp_mb() mb()
417#define smp_rmb() rmb()
418#define smp_wmb() wmb()
419#define smp_read_barrier_depends() read_barrier_depends()
420#define set_mb(var, value) do { (void) xchg(&var, value); } while (0)
421#else
422#define smp_mb() barrier()
423#define smp_rmb() barrier()
424#define smp_wmb() barrier()
425#define smp_read_barrier_depends() do { } while (0)
426#define set_mb(var, value) do { var = value; barrier(); } while (0)
427#endif
428
429#define arch_align_stack(x) (x)
430
431#endif /* _ASM_M32R_SYSTEM_H */
diff --git a/arch/m32r/include/asm/termbits.h b/arch/m32r/include/asm/termbits.h
new file mode 100644
index 000000000000..bc104008b55b
--- /dev/null
+++ b/arch/m32r/include/asm/termbits.h
@@ -0,0 +1,199 @@
1#ifndef _ASM_M32R_TERMBITS_H
2#define _ASM_M32R_TERMBITS_H
3
4#include <linux/posix_types.h>
5
6typedef unsigned char cc_t;
7typedef unsigned int speed_t;
8typedef unsigned int tcflag_t;
9
10#define NCCS 19
11struct termios {
12 tcflag_t c_iflag; /* input mode flags */
13 tcflag_t c_oflag; /* output mode flags */
14 tcflag_t c_cflag; /* control mode flags */
15 tcflag_t c_lflag; /* local mode flags */
16 cc_t c_line; /* line discipline */
17 cc_t c_cc[NCCS]; /* control characters */
18};
19
20struct termios2 {
21 tcflag_t c_iflag; /* input mode flags */
22 tcflag_t c_oflag; /* output mode flags */
23 tcflag_t c_cflag; /* control mode flags */
24 tcflag_t c_lflag; /* local mode flags */
25 cc_t c_line; /* line discipline */
26 cc_t c_cc[NCCS]; /* control characters */
27 speed_t c_ispeed; /* input speed */
28 speed_t c_ospeed; /* output speed */
29};
30
31struct ktermios {
32 tcflag_t c_iflag; /* input mode flags */
33 tcflag_t c_oflag; /* output mode flags */
34 tcflag_t c_cflag; /* control mode flags */
35 tcflag_t c_lflag; /* local mode flags */
36 cc_t c_line; /* line discipline */
37 cc_t c_cc[NCCS]; /* control characters */
38 speed_t c_ispeed; /* input speed */
39 speed_t c_ospeed; /* output speed */
40};
41
42/* c_cc characters */
43#define VINTR 0
44#define VQUIT 1
45#define VERASE 2
46#define VKILL 3
47#define VEOF 4
48#define VTIME 5
49#define VMIN 6
50#define VSWTC 7
51#define VSTART 8
52#define VSTOP 9
53#define VSUSP 10
54#define VEOL 11
55#define VREPRINT 12
56#define VDISCARD 13
57#define VWERASE 14
58#define VLNEXT 15
59#define VEOL2 16
60
61/* c_iflag bits */
62#define IGNBRK 0000001
63#define BRKINT 0000002
64#define IGNPAR 0000004
65#define PARMRK 0000010
66#define INPCK 0000020
67#define ISTRIP 0000040
68#define INLCR 0000100
69#define IGNCR 0000200
70#define ICRNL 0000400
71#define IUCLC 0001000
72#define IXON 0002000
73#define IXANY 0004000
74#define IXOFF 0010000
75#define IMAXBEL 0020000
76#define IUTF8 0040000
77
78/* c_oflag bits */
79#define OPOST 0000001
80#define OLCUC 0000002
81#define ONLCR 0000004
82#define OCRNL 0000010
83#define ONOCR 0000020
84#define ONLRET 0000040
85#define OFILL 0000100
86#define OFDEL 0000200
87#define NLDLY 0000400
88#define NL0 0000000
89#define NL1 0000400
90#define CRDLY 0003000
91#define CR0 0000000
92#define CR1 0001000
93#define CR2 0002000
94#define CR3 0003000
95#define TABDLY 0014000
96#define TAB0 0000000
97#define TAB1 0004000
98#define TAB2 0010000
99#define TAB3 0014000
100#define XTABS 0014000
101#define BSDLY 0020000
102#define BS0 0000000
103#define BS1 0020000
104#define VTDLY 0040000
105#define VT0 0000000
106#define VT1 0040000
107#define FFDLY 0100000
108#define FF0 0000000
109#define FF1 0100000
110
111/* c_cflag bit meaning */
112#define CBAUD 0010017
113#define B0 0000000 /* hang up */
114#define B50 0000001
115#define B75 0000002
116#define B110 0000003
117#define B134 0000004
118#define B150 0000005
119#define B200 0000006
120#define B300 0000007
121#define B600 0000010
122#define B1200 0000011
123#define B1800 0000012
124#define B2400 0000013
125#define B4800 0000014
126#define B9600 0000015
127#define B19200 0000016
128#define B38400 0000017
129#define EXTA B19200
130#define EXTB B38400
131#define CSIZE 0000060
132#define CS5 0000000
133#define CS6 0000020
134#define CS7 0000040
135#define CS8 0000060
136#define CSTOPB 0000100
137#define CREAD 0000200
138#define PARENB 0000400
139#define PARODD 0001000
140#define HUPCL 0002000
141#define CLOCAL 0004000
142#define CBAUDEX 0010000
143#define BOTHER 0010000
144#define B57600 0010001
145#define B115200 0010002
146#define B230400 0010003
147#define B460800 0010004
148#define B500000 0010005
149#define B576000 0010006
150#define B921600 0010007
151#define B1000000 0010010
152#define B1152000 0010011
153#define B1500000 0010012
154#define B2000000 0010013
155#define B2500000 0010014
156#define B3000000 0010015
157#define B3500000 0010016
158#define B4000000 0010017
159#define CIBAUD 002003600000 /** input baud rate */
160#define CTVB 004000000000 /* VisioBraille Terminal flow control */
161#define CMSPAR 010000000000 /* mark or space (stick) parity */
162#define CRTSCTS 020000000000 /* flow control */
163
164#define IBSHIFT 16 /* Shift from CBAUD to CIBAUD */
165
166/* c_lflag bits */
167#define ISIG 0000001
168#define ICANON 0000002
169#define XCASE 0000004
170#define ECHO 0000010
171#define ECHOE 0000020
172#define ECHOK 0000040
173#define ECHONL 0000100
174#define NOFLSH 0000200
175#define TOSTOP 0000400
176#define ECHOCTL 0001000
177#define ECHOPRT 0002000
178#define ECHOKE 0004000
179#define FLUSHO 0010000
180#define PENDIN 0040000
181#define IEXTEN 0100000
182
183/* tcflow() and TCXONC use these */
184#define TCOOFF 0
185#define TCOON 1
186#define TCIOFF 2
187#define TCION 3
188
189/* tcflush() and TCFLSH use these */
190#define TCIFLUSH 0
191#define TCOFLUSH 1
192#define TCIOFLUSH 2
193
194/* tcsetattr uses these */
195#define TCSANOW 0
196#define TCSADRAIN 1
197#define TCSAFLUSH 2
198
199#endif /* _ASM_M32R_TERMBITS_H */
diff --git a/arch/m32r/include/asm/termios.h b/arch/m32r/include/asm/termios.h
new file mode 100644
index 000000000000..93ce79fd342a
--- /dev/null
+++ b/arch/m32r/include/asm/termios.h
@@ -0,0 +1,91 @@
1#ifndef _M32R_TERMIOS_H
2#define _M32R_TERMIOS_H
3
4#include <asm/termbits.h>
5#include <asm/ioctls.h>
6
7struct winsize {
8 unsigned short ws_row;
9 unsigned short ws_col;
10 unsigned short ws_xpixel;
11 unsigned short ws_ypixel;
12};
13
14#define NCC 8
15struct termio {
16 unsigned short c_iflag; /* input mode flags */
17 unsigned short c_oflag; /* output mode flags */
18 unsigned short c_cflag; /* control mode flags */
19 unsigned short c_lflag; /* local mode flags */
20 unsigned char c_line; /* line discipline */
21 unsigned char c_cc[NCC]; /* control characters */
22};
23
24/* modem lines */
25#define TIOCM_LE 0x001
26#define TIOCM_DTR 0x002
27#define TIOCM_RTS 0x004
28#define TIOCM_ST 0x008
29#define TIOCM_SR 0x010
30#define TIOCM_CTS 0x020
31#define TIOCM_CAR 0x040
32#define TIOCM_RNG 0x080
33#define TIOCM_DSR 0x100
34#define TIOCM_CD TIOCM_CAR
35#define TIOCM_RI TIOCM_RNG
36#define TIOCM_OUT1 0x2000
37#define TIOCM_OUT2 0x4000
38#define TIOCM_LOOP 0x8000
39
40/* ioctl (fd, TIOCSERGETLSR, &result) where result may be as below */
41
42#ifdef __KERNEL__
43#include <linux/module.h>
44
45/* intr=^C quit=^\ erase=del kill=^U
46 eof=^D vtime=\0 vmin=\1 sxtc=\0
47 start=^Q stop=^S susp=^Z eol=\0
48 reprint=^R discard=^U werase=^W lnext=^V
49 eol2=\0
50*/
51#define INIT_C_CC "\003\034\177\025\004\0\1\0\021\023\032\0\022\017\027\026\0"
52
53/*
54 * Translate a "termio" structure into a "termios". Ugh.
55 */
56#define SET_LOW_TERMIOS_BITS(termios, termio, x) { \
57 unsigned short __tmp; \
58 get_user(__tmp,&(termio)->x); \
59 *(unsigned short *) &(termios)->x = __tmp; \
60}
61
62#define user_termio_to_kernel_termios(termios, termio) \
63({ \
64 SET_LOW_TERMIOS_BITS(termios, termio, c_iflag); \
65 SET_LOW_TERMIOS_BITS(termios, termio, c_oflag); \
66 SET_LOW_TERMIOS_BITS(termios, termio, c_cflag); \
67 SET_LOW_TERMIOS_BITS(termios, termio, c_lflag); \
68 copy_from_user((termios)->c_cc, (termio)->c_cc, NCC); \
69})
70
71/*
72 * Translate a "termios" structure into a "termio". Ugh.
73 */
74#define kernel_termios_to_user_termio(termio, termios) \
75({ \
76 put_user((termios)->c_iflag, &(termio)->c_iflag); \
77 put_user((termios)->c_oflag, &(termio)->c_oflag); \
78 put_user((termios)->c_cflag, &(termio)->c_cflag); \
79 put_user((termios)->c_lflag, &(termio)->c_lflag); \
80 put_user((termios)->c_line, &(termio)->c_line); \
81 copy_to_user((termio)->c_cc, (termios)->c_cc, NCC); \
82})
83
84#define user_termios_to_kernel_termios(k, u) copy_from_user(k, u, sizeof(struct termios2))
85#define kernel_termios_to_user_termios(u, k) copy_to_user(u, k, sizeof(struct termios2))
86#define user_termios_to_kernel_termios_1(k, u) copy_from_user(k, u, sizeof(struct termios))
87#define kernel_termios_to_user_termios_1(u, k) copy_to_user(u, k, sizeof(struct termios))
88
89#endif /* __KERNEL__ */
90
91#endif /* _M32R_TERMIOS_H */
diff --git a/arch/m32r/include/asm/thread_info.h b/arch/m32r/include/asm/thread_info.h
new file mode 100644
index 000000000000..8589d462df27
--- /dev/null
+++ b/arch/m32r/include/asm/thread_info.h
@@ -0,0 +1,184 @@
1#ifndef _ASM_M32R_THREAD_INFO_H
2#define _ASM_M32R_THREAD_INFO_H
3
4/* thread_info.h: m32r low-level thread information
5 *
6 * Copyright (C) 2002 David Howells (dhowells@redhat.com)
7 * - Incorporating suggestions made by Linus Torvalds and Dave Miller
8 * Copyright (C) 2004 Hirokazu Takata <takata at linux-m32r.org>
9 */
10
11#ifdef __KERNEL__
12
13#ifndef __ASSEMBLY__
14#include <asm/processor.h>
15#endif
16
17/*
18 * low level task data that entry.S needs immediate access to
19 * - this struct should fit entirely inside of one cache line
20 * - this struct shares the supervisor stack pages
21 * - if the contents of this structure are changed, the assembly constants must also be changed
22 */
23#ifndef __ASSEMBLY__
24
25struct thread_info {
26 struct task_struct *task; /* main task structure */
27 struct exec_domain *exec_domain; /* execution domain */
28 unsigned long flags; /* low level flags */
29 unsigned long status; /* thread-synchronous flags */
30 __u32 cpu; /* current CPU */
31 int preempt_count; /* 0 => preemptable, <0 => BUG */
32
33 mm_segment_t addr_limit; /* thread address space:
34 0-0xBFFFFFFF for user-thread
35 0-0xFFFFFFFF for kernel-thread
36 */
37 struct restart_block restart_block;
38
39 __u8 supervisor_stack[0];
40};
41
42#else /* !__ASSEMBLY__ */
43
44/* offsets into the thread_info struct for assembly code access */
45#define TI_TASK 0x00000000
46#define TI_EXEC_DOMAIN 0x00000004
47#define TI_FLAGS 0x00000008
48#define TI_STATUS 0x0000000C
49#define TI_CPU 0x00000010
50#define TI_PRE_COUNT 0x00000014
51#define TI_ADDR_LIMIT 0x00000018
52#define TI_RESTART_BLOCK 0x000001C
53
54#endif
55
56#define PREEMPT_ACTIVE 0x10000000
57
58/*
59 * macros/functions for gaining access to the thread information structure
60 *
61 * preempt_count needs to be 1 initially, until the scheduler is functional.
62 */
63#ifndef __ASSEMBLY__
64
65#define INIT_THREAD_INFO(tsk) \
66{ \
67 .task = &tsk, \
68 .exec_domain = &default_exec_domain, \
69 .flags = 0, \
70 .cpu = 0, \
71 .preempt_count = 1, \
72 .addr_limit = KERNEL_DS, \
73 .restart_block = { \
74 .fn = do_no_restart_syscall, \
75 }, \
76}
77
78#define init_thread_info (init_thread_union.thread_info)
79#define init_stack (init_thread_union.stack)
80
81#define THREAD_SIZE (2*PAGE_SIZE)
82
83/* how to get the thread information struct from C */
84static inline struct thread_info *current_thread_info(void)
85{
86 struct thread_info *ti;
87
88 __asm__ __volatile__ (
89 "ldi %0, #%1 \n\t"
90 "and %0, sp \n\t"
91 : "=r" (ti) : "i" (~(THREAD_SIZE - 1))
92 );
93
94 return ti;
95}
96
97#define __HAVE_ARCH_THREAD_INFO_ALLOCATOR
98
99/* thread information allocation */
100#ifdef CONFIG_DEBUG_STACK_USAGE
101#define alloc_thread_info(tsk) \
102 ({ \
103 struct thread_info *ret; \
104 \
105 ret = kzalloc(THREAD_SIZE, GFP_KERNEL); \
106 \
107 ret; \
108 })
109#else
110#define alloc_thread_info(tsk) kmalloc(THREAD_SIZE, GFP_KERNEL)
111#endif
112
113#define free_thread_info(info) kfree(info)
114
115#define TI_FLAG_FAULT_CODE_SHIFT 28
116
117static inline void set_thread_fault_code(unsigned int val)
118{
119 struct thread_info *ti = current_thread_info();
120 ti->flags = (ti->flags & (~0 >> (32 - TI_FLAG_FAULT_CODE_SHIFT)))
121 | (val << TI_FLAG_FAULT_CODE_SHIFT);
122}
123
124static inline unsigned int get_thread_fault_code(void)
125{
126 struct thread_info *ti = current_thread_info();
127 return ti->flags >> TI_FLAG_FAULT_CODE_SHIFT;
128}
129
130#else /* !__ASSEMBLY__ */
131
132#define THREAD_SIZE 8192
133
134/* how to get the thread information struct from ASM */
135#define GET_THREAD_INFO(reg) GET_THREAD_INFO reg
136 .macro GET_THREAD_INFO reg
137 ldi \reg, #-THREAD_SIZE
138 and \reg, sp
139 .endm
140
141#endif
142
143/*
144 * thread information flags
145 * - these are process state flags that various assembly files may need to access
146 * - pending work-to-be-done flags are in LSW
147 * - other flags in MSW
148 */
149#define TIF_SYSCALL_TRACE 0 /* syscall trace active */
150#define TIF_SIGPENDING 1 /* signal pending */
151#define TIF_NEED_RESCHED 2 /* rescheduling necessary */
152#define TIF_SINGLESTEP 3 /* restore singlestep on return to user mode */
153#define TIF_IRET 4 /* return with iret */
154#define TIF_RESTORE_SIGMASK 8 /* restore signal mask in do_signal() */
155#define TIF_USEDFPU 16 /* FPU was used by this task this quantum (SMP) */
156#define TIF_POLLING_NRFLAG 17 /* true if poll_idle() is polling TIF_NEED_RESCHED */
157#define TIF_MEMDIE 18 /* OOM killer killed process */
158#define TIF_FREEZE 19 /* is freezing for suspend */
159
160#define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE)
161#define _TIF_SIGPENDING (1<<TIF_SIGPENDING)
162#define _TIF_NEED_RESCHED (1<<TIF_NEED_RESCHED)
163#define _TIF_SINGLESTEP (1<<TIF_SINGLESTEP)
164#define _TIF_IRET (1<<TIF_IRET)
165#define _TIF_RESTORE_SIGMASK (1<<TIF_RESTORE_SIGMASK)
166#define _TIF_USEDFPU (1<<TIF_USEDFPU)
167#define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG)
168#define _TIF_FREEZE (1<<TIF_FREEZE)
169
170#define _TIF_WORK_MASK 0x0000FFFE /* work to do on interrupt/exception return */
171#define _TIF_ALLWORK_MASK 0x0000FFFF /* work to do on any return to u-space */
172
173/*
174 * Thread-synchronous status.
175 *
176 * This is different from the flags in that nobody else
177 * ever touches our thread-synchronous status, so we don't
178 * have to worry about atomic accesses.
179 */
180#define TS_USEDFPU 0x0001 /* FPU was used by this task this quantum (SMP) */
181
182#endif /* __KERNEL__ */
183
184#endif /* _ASM_M32R_THREAD_INFO_H */
diff --git a/arch/m32r/include/asm/timex.h b/arch/m32r/include/asm/timex.h
new file mode 100644
index 000000000000..bb9fe4feb12d
--- /dev/null
+++ b/arch/m32r/include/asm/timex.h
@@ -0,0 +1,27 @@
1#ifndef _ASM_M32R_TIMEX_H
2#define _ASM_M32R_TIMEX_H
3
4/*
5 * linux/include/asm-m32r/timex.h
6 *
7 * m32r architecture timex specifications
8 */
9
10#define CLOCK_TICK_RATE (CONFIG_BUS_CLOCK / CONFIG_TIMER_DIVIDE)
11#define CLOCK_TICK_FACTOR 20 /* Factor of both 1000000 and CLOCK_TICK_RATE */
12
13#ifdef __KERNEL__
14/*
15 * Standard way to access the cycle counter.
16 * Currently only used on SMP.
17 */
18
19typedef unsigned long long cycles_t;
20
21static __inline__ cycles_t get_cycles (void)
22{
23 return 0;
24}
25#endif /* __KERNEL__ */
26
27#endif /* _ASM_M32R_TIMEX_H */
diff --git a/arch/m32r/include/asm/tlb.h b/arch/m32r/include/asm/tlb.h
new file mode 100644
index 000000000000..c7ebd8d48f3b
--- /dev/null
+++ b/arch/m32r/include/asm/tlb.h
@@ -0,0 +1,20 @@
1#ifndef _M32R_TLB_H
2#define _M32R_TLB_H
3
4/*
5 * x86 doesn't need any special per-pte or
6 * per-vma handling..
7 */
8#define tlb_start_vma(tlb, vma) do { } while (0)
9#define tlb_end_vma(tlb, vma) do { } while (0)
10#define __tlb_remove_tlb_entry(tlb, pte, address) do { } while (0)
11
12/*
13 * .. because we flush the whole mm when it
14 * fills up.
15 */
16#define tlb_flush(tlb) flush_tlb_mm((tlb)->mm)
17
18#include <asm-generic/tlb.h>
19
20#endif /* _M32R_TLB_H */
diff --git a/arch/m32r/include/asm/tlbflush.h b/arch/m32r/include/asm/tlbflush.h
new file mode 100644
index 000000000000..0ef95307784e
--- /dev/null
+++ b/arch/m32r/include/asm/tlbflush.h
@@ -0,0 +1,97 @@
1#ifndef _ASM_M32R_TLBFLUSH_H
2#define _ASM_M32R_TLBFLUSH_H
3
4#include <asm/m32r.h>
5
6/*
7 * TLB flushing:
8 *
9 * - flush_tlb() flushes the current mm struct TLBs
10 * - flush_tlb_all() flushes all processes TLBs
11 * - flush_tlb_mm(mm) flushes the specified mm context TLB's
12 * - flush_tlb_page(vma, vmaddr) flushes one page
13 * - flush_tlb_range(vma, start, end) flushes a range of pages
14 * - flush_tlb_kernel_range(start, end) flushes a range of kernel pages
15 */
16
17extern void local_flush_tlb_all(void);
18extern void local_flush_tlb_mm(struct mm_struct *);
19extern void local_flush_tlb_page(struct vm_area_struct *, unsigned long);
20extern void local_flush_tlb_range(struct vm_area_struct *, unsigned long,
21 unsigned long);
22
23#ifndef CONFIG_SMP
24#ifdef CONFIG_MMU
25#define flush_tlb_all() local_flush_tlb_all()
26#define flush_tlb_mm(mm) local_flush_tlb_mm(mm)
27#define flush_tlb_page(vma, page) local_flush_tlb_page(vma, page)
28#define flush_tlb_range(vma, start, end) \
29 local_flush_tlb_range(vma, start, end)
30#define flush_tlb_kernel_range(start, end) local_flush_tlb_all()
31#else /* CONFIG_MMU */
32#define flush_tlb_all() do { } while (0)
33#define flush_tlb_mm(mm) do { } while (0)
34#define flush_tlb_page(vma, vmaddr) do { } while (0)
35#define flush_tlb_range(vma, start, end) do { } while (0)
36#endif /* CONFIG_MMU */
37#else /* CONFIG_SMP */
38extern void smp_flush_tlb_all(void);
39extern void smp_flush_tlb_mm(struct mm_struct *);
40extern void smp_flush_tlb_page(struct vm_area_struct *, unsigned long);
41extern void smp_flush_tlb_range(struct vm_area_struct *, unsigned long,
42 unsigned long);
43
44#define flush_tlb_all() smp_flush_tlb_all()
45#define flush_tlb_mm(mm) smp_flush_tlb_mm(mm)
46#define flush_tlb_page(vma, page) smp_flush_tlb_page(vma, page)
47#define flush_tlb_range(vma, start, end) \
48 smp_flush_tlb_range(vma, start, end)
49#define flush_tlb_kernel_range(start, end) smp_flush_tlb_all()
50#endif /* CONFIG_SMP */
51
52static __inline__ void __flush_tlb_page(unsigned long page)
53{
54 unsigned int tmpreg0, tmpreg1, tmpreg2;
55
56 __asm__ __volatile__ (
57 "seth %0, #high(%4) \n\t"
58 "st %3, @(%5, %0) \n\t"
59 "ldi %1, #1 \n\t"
60 "st %1, @(%6, %0) \n\t"
61 "add3 %1, %0, %7 \n\t"
62 ".fillinsn \n"
63 "1: \n\t"
64 "ld %2, @(%6, %0) \n\t"
65 "bnez %2, 1b \n\t"
66 "ld %0, @%1+ \n\t"
67 "ld %1, @%1 \n\t"
68 "st %2, @+%0 \n\t"
69 "st %2, @+%1 \n\t"
70 : "=&r" (tmpreg0), "=&r" (tmpreg1), "=&r" (tmpreg2)
71 : "r" (page), "i" (MMU_REG_BASE), "i" (MSVA_offset),
72 "i" (MTOP_offset), "i" (MIDXI_offset)
73 : "memory"
74 );
75}
76
77static __inline__ void __flush_tlb_all(void)
78{
79 unsigned int tmpreg0, tmpreg1;
80
81 __asm__ __volatile__ (
82 "seth %0, #high(%2) \n\t"
83 "or3 %0, %0, #low(%2) \n\t"
84 "ldi %1, #0xc \n\t"
85 "st %1, @%0 \n\t"
86 ".fillinsn \n"
87 "1: \n\t"
88 "ld %1, @%0 \n\t"
89 "bnez %1, 1b \n\t"
90 : "=&r" (tmpreg0), "=&r" (tmpreg1)
91 : "i" (MTOP) : "memory"
92 );
93}
94
95extern void update_mmu_cache(struct vm_area_struct *, unsigned long, pte_t);
96
97#endif /* _ASM_M32R_TLBFLUSH_H */
diff --git a/arch/m32r/include/asm/topology.h b/arch/m32r/include/asm/topology.h
new file mode 100644
index 000000000000..d607eb32bd7e
--- /dev/null
+++ b/arch/m32r/include/asm/topology.h
@@ -0,0 +1,6 @@
1#ifndef _ASM_M32R_TOPOLOGY_H
2#define _ASM_M32R_TOPOLOGY_H
3
4#include <asm-generic/topology.h>
5
6#endif /* _ASM_M32R_TOPOLOGY_H */
diff --git a/arch/m32r/include/asm/types.h b/arch/m32r/include/asm/types.h
new file mode 100644
index 000000000000..bc9f7fff0ac3
--- /dev/null
+++ b/arch/m32r/include/asm/types.h
@@ -0,0 +1,30 @@
1#ifndef _ASM_M32R_TYPES_H
2#define _ASM_M32R_TYPES_H
3
4#include <asm-generic/int-ll64.h>
5
6#ifndef __ASSEMBLY__
7
8typedef unsigned short umode_t;
9
10#endif /* __ASSEMBLY__ */
11
12/*
13 * These aren't exported outside the kernel to avoid name space clashes
14 */
15#ifdef __KERNEL__
16
17#define BITS_PER_LONG 32
18
19#ifndef __ASSEMBLY__
20
21/* DMA addresses are 32-bits wide. */
22
23typedef u32 dma_addr_t;
24typedef u64 dma64_addr_t;
25
26#endif /* __ASSEMBLY__ */
27
28#endif /* __KERNEL__ */
29
30#endif /* _ASM_M32R_TYPES_H */
diff --git a/arch/m32r/include/asm/uaccess.h b/arch/m32r/include/asm/uaccess.h
new file mode 100644
index 000000000000..1c7047bea200
--- /dev/null
+++ b/arch/m32r/include/asm/uaccess.h
@@ -0,0 +1,693 @@
1#ifndef _ASM_M32R_UACCESS_H
2#define _ASM_M32R_UACCESS_H
3
4/*
5 * linux/include/asm-m32r/uaccess.h
6 *
7 * M32R version.
8 * Copyright (C) 2004, 2006 Hirokazu Takata <takata at linux-m32r.org>
9 */
10
11/*
12 * User space memory access functions
13 */
14#include <linux/errno.h>
15#include <linux/thread_info.h>
16#include <asm/page.h>
17#include <asm/setup.h>
18
19#define VERIFY_READ 0
20#define VERIFY_WRITE 1
21
22/*
23 * The fs value determines whether argument validity checking should be
24 * performed or not. If get_fs() == USER_DS, checking is performed, with
25 * get_fs() == KERNEL_DS, checking is bypassed.
26 *
27 * For historical reasons, these macros are grossly misnamed.
28 */
29
30#define MAKE_MM_SEG(s) ((mm_segment_t) { (s) })
31
32#ifdef CONFIG_MMU
33
34#define KERNEL_DS MAKE_MM_SEG(0xFFFFFFFF)
35#define USER_DS MAKE_MM_SEG(PAGE_OFFSET)
36#define get_ds() (KERNEL_DS)
37#define get_fs() (current_thread_info()->addr_limit)
38#define set_fs(x) (current_thread_info()->addr_limit = (x))
39
40#else /* not CONFIG_MMU */
41
42#define KERNEL_DS MAKE_MM_SEG(0xFFFFFFFF)
43#define USER_DS MAKE_MM_SEG(0xFFFFFFFF)
44#define get_ds() (KERNEL_DS)
45
46static inline mm_segment_t get_fs(void)
47{
48 return USER_DS;
49}
50
51static inline void set_fs(mm_segment_t s)
52{
53}
54
55#endif /* not CONFIG_MMU */
56
57#define segment_eq(a,b) ((a).seg == (b).seg)
58
59#define __addr_ok(addr) \
60 ((unsigned long)(addr) < (current_thread_info()->addr_limit.seg))
61
62/*
63 * Test whether a block of memory is a valid user space address.
64 * Returns 0 if the range is valid, nonzero otherwise.
65 *
66 * This is equivalent to the following test:
67 * (u33)addr + (u33)size >= (u33)current->addr_limit.seg
68 *
69 * This needs 33-bit arithmetic. We have a carry...
70 */
71#define __range_ok(addr,size) ({ \
72 unsigned long flag, roksum; \
73 __chk_user_ptr(addr); \
74 asm ( \
75 " cmpu %1, %1 ; clear cbit\n" \
76 " addx %1, %3 ; set cbit if overflow\n" \
77 " subx %0, %0\n" \
78 " cmpu %4, %1\n" \
79 " subx %0, %5\n" \
80 : "=&r" (flag), "=r" (roksum) \
81 : "1" (addr), "r" ((int)(size)), \
82 "r" (current_thread_info()->addr_limit.seg), "r" (0) \
83 : "cbit" ); \
84 flag; })
85
86/**
87 * access_ok: - Checks if a user space pointer is valid
88 * @type: Type of access: %VERIFY_READ or %VERIFY_WRITE. Note that
89 * %VERIFY_WRITE is a superset of %VERIFY_READ - if it is safe
90 * to write to a block, it is always safe to read from it.
91 * @addr: User space pointer to start of block to check
92 * @size: Size of block to check
93 *
94 * Context: User context only. This function may sleep.
95 *
96 * Checks if a pointer to a block of memory in user space is valid.
97 *
98 * Returns true (nonzero) if the memory block may be valid, false (zero)
99 * if it is definitely invalid.
100 *
101 * Note that, depending on architecture, this function probably just
102 * checks that the pointer is in the user space range - after calling
103 * this function, memory access functions may still return -EFAULT.
104 */
105#ifdef CONFIG_MMU
106#define access_ok(type,addr,size) (likely(__range_ok(addr,size) == 0))
107#else
108static inline int access_ok(int type, const void *addr, unsigned long size)
109{
110 unsigned long val = (unsigned long)addr;
111
112 return ((val >= memory_start) && ((val + size) < memory_end));
113}
114#endif /* CONFIG_MMU */
115
116/*
117 * The exception table consists of pairs of addresses: the first is the
118 * address of an instruction that is allowed to fault, and the second is
119 * the address at which the program should continue. No registers are
120 * modified, so it is entirely up to the continuation code to figure out
121 * what to do.
122 *
123 * All the routines below use bits of fixup code that are out of line
124 * with the main instruction path. This means when everything is well,
125 * we don't even have to jump over them. Further, they do not intrude
126 * on our cache or tlb entries.
127 */
128
129struct exception_table_entry
130{
131 unsigned long insn, fixup;
132};
133
134extern int fixup_exception(struct pt_regs *regs);
135
136/*
137 * These are the main single-value transfer routines. They automatically
138 * use the right size if we just have the right pointer type.
139 *
140 * This gets kind of ugly. We want to return _two_ values in "get_user()"
141 * and yet we don't want to do any pointers, because that is too much
142 * of a performance impact. Thus we have a few rather ugly macros here,
143 * and hide all the uglyness from the user.
144 *
145 * The "__xxx" versions of the user access functions are versions that
146 * do not verify the address space, that must have been done previously
147 * with a separate "access_ok()" call (this is used when we do multiple
148 * accesses to the same area of user memory).
149 */
150
151/* Careful: we have to cast the result to the type of the pointer for sign
152 reasons */
153/**
154 * get_user: - Get a simple variable from user space.
155 * @x: Variable to store result.
156 * @ptr: Source address, in user space.
157 *
158 * Context: User context only. This function may sleep.
159 *
160 * This macro copies a single simple variable from user space to kernel
161 * space. It supports simple types like char and int, but not larger
162 * data types like structures or arrays.
163 *
164 * @ptr must have pointer-to-simple-variable type, and the result of
165 * dereferencing @ptr must be assignable to @x without a cast.
166 *
167 * Returns zero on success, or -EFAULT on error.
168 * On error, the variable @x is set to zero.
169 */
170#define get_user(x,ptr) \
171 __get_user_check((x),(ptr),sizeof(*(ptr)))
172
173/**
174 * put_user: - Write a simple value into user space.
175 * @x: Value to copy to user space.
176 * @ptr: Destination address, in user space.
177 *
178 * Context: User context only. This function may sleep.
179 *
180 * This macro copies a single simple value from kernel space to user
181 * space. It supports simple types like char and int, but not larger
182 * data types like structures or arrays.
183 *
184 * @ptr must have pointer-to-simple-variable type, and @x must be assignable
185 * to the result of dereferencing @ptr.
186 *
187 * Returns zero on success, or -EFAULT on error.
188 */
189#define put_user(x,ptr) \
190 __put_user_check((__typeof__(*(ptr)))(x),(ptr),sizeof(*(ptr)))
191
192/**
193 * __get_user: - Get a simple variable from user space, with less checking.
194 * @x: Variable to store result.
195 * @ptr: Source address, in user space.
196 *
197 * Context: User context only. This function may sleep.
198 *
199 * This macro copies a single simple variable from user space to kernel
200 * space. It supports simple types like char and int, but not larger
201 * data types like structures or arrays.
202 *
203 * @ptr must have pointer-to-simple-variable type, and the result of
204 * dereferencing @ptr must be assignable to @x without a cast.
205 *
206 * Caller must check the pointer with access_ok() before calling this
207 * function.
208 *
209 * Returns zero on success, or -EFAULT on error.
210 * On error, the variable @x is set to zero.
211 */
212#define __get_user(x,ptr) \
213 __get_user_nocheck((x),(ptr),sizeof(*(ptr)))
214
215#define __get_user_nocheck(x,ptr,size) \
216({ \
217 long __gu_err = 0; \
218 unsigned long __gu_val; \
219 might_sleep(); \
220 __get_user_size(__gu_val,(ptr),(size),__gu_err); \
221 (x) = (__typeof__(*(ptr)))__gu_val; \
222 __gu_err; \
223})
224
225#define __get_user_check(x,ptr,size) \
226({ \
227 long __gu_err = -EFAULT; \
228 unsigned long __gu_val = 0; \
229 const __typeof__(*(ptr)) __user *__gu_addr = (ptr); \
230 might_sleep(); \
231 if (access_ok(VERIFY_READ,__gu_addr,size)) \
232 __get_user_size(__gu_val,__gu_addr,(size),__gu_err); \
233 (x) = (__typeof__(*(ptr)))__gu_val; \
234 __gu_err; \
235})
236
237extern long __get_user_bad(void);
238
239#define __get_user_size(x,ptr,size,retval) \
240do { \
241 retval = 0; \
242 __chk_user_ptr(ptr); \
243 switch (size) { \
244 case 1: __get_user_asm(x,ptr,retval,"ub"); break; \
245 case 2: __get_user_asm(x,ptr,retval,"uh"); break; \
246 case 4: __get_user_asm(x,ptr,retval,""); break; \
247 default: (x) = __get_user_bad(); \
248 } \
249} while (0)
250
251#define __get_user_asm(x, addr, err, itype) \
252 __asm__ __volatile__( \
253 " .fillinsn\n" \
254 "1: ld"itype" %1,@%2\n" \
255 " .fillinsn\n" \
256 "2:\n" \
257 ".section .fixup,\"ax\"\n" \
258 " .balign 4\n" \
259 "3: ldi %0,%3\n" \
260 " seth r14,#high(2b)\n" \
261 " or3 r14,r14,#low(2b)\n" \
262 " jmp r14\n" \
263 ".previous\n" \
264 ".section __ex_table,\"a\"\n" \
265 " .balign 4\n" \
266 " .long 1b,3b\n" \
267 ".previous" \
268 : "=&r" (err), "=&r" (x) \
269 : "r" (addr), "i" (-EFAULT), "0" (err) \
270 : "r14", "memory")
271
272/**
273 * __put_user: - Write a simple value into user space, with less checking.
274 * @x: Value to copy to user space.
275 * @ptr: Destination address, in user space.
276 *
277 * Context: User context only. This function may sleep.
278 *
279 * This macro copies a single simple value from kernel space to user
280 * space. It supports simple types like char and int, but not larger
281 * data types like structures or arrays.
282 *
283 * @ptr must have pointer-to-simple-variable type, and @x must be assignable
284 * to the result of dereferencing @ptr.
285 *
286 * Caller must check the pointer with access_ok() before calling this
287 * function.
288 *
289 * Returns zero on success, or -EFAULT on error.
290 */
291#define __put_user(x,ptr) \
292 __put_user_nocheck((__typeof__(*(ptr)))(x),(ptr),sizeof(*(ptr)))
293
294
295#define __put_user_nocheck(x,ptr,size) \
296({ \
297 long __pu_err; \
298 might_sleep(); \
299 __put_user_size((x),(ptr),(size),__pu_err); \
300 __pu_err; \
301})
302
303
304#define __put_user_check(x,ptr,size) \
305({ \
306 long __pu_err = -EFAULT; \
307 __typeof__(*(ptr)) __user *__pu_addr = (ptr); \
308 might_sleep(); \
309 if (access_ok(VERIFY_WRITE,__pu_addr,size)) \
310 __put_user_size((x),__pu_addr,(size),__pu_err); \
311 __pu_err; \
312})
313
314#if defined(__LITTLE_ENDIAN__)
315#define __put_user_u64(x, addr, err) \
316 __asm__ __volatile__( \
317 " .fillinsn\n" \
318 "1: st %L1,@%2\n" \
319 " .fillinsn\n" \
320 "2: st %H1,@(4,%2)\n" \
321 " .fillinsn\n" \
322 "3:\n" \
323 ".section .fixup,\"ax\"\n" \
324 " .balign 4\n" \
325 "4: ldi %0,%3\n" \
326 " seth r14,#high(3b)\n" \
327 " or3 r14,r14,#low(3b)\n" \
328 " jmp r14\n" \
329 ".previous\n" \
330 ".section __ex_table,\"a\"\n" \
331 " .balign 4\n" \
332 " .long 1b,4b\n" \
333 " .long 2b,4b\n" \
334 ".previous" \
335 : "=&r" (err) \
336 : "r" (x), "r" (addr), "i" (-EFAULT), "0" (err) \
337 : "r14", "memory")
338
339#elif defined(__BIG_ENDIAN__)
340#define __put_user_u64(x, addr, err) \
341 __asm__ __volatile__( \
342 " .fillinsn\n" \
343 "1: st %H1,@%2\n" \
344 " .fillinsn\n" \
345 "2: st %L1,@(4,%2)\n" \
346 " .fillinsn\n" \
347 "3:\n" \
348 ".section .fixup,\"ax\"\n" \
349 " .balign 4\n" \
350 "4: ldi %0,%3\n" \
351 " seth r14,#high(3b)\n" \
352 " or3 r14,r14,#low(3b)\n" \
353 " jmp r14\n" \
354 ".previous\n" \
355 ".section __ex_table,\"a\"\n" \
356 " .balign 4\n" \
357 " .long 1b,4b\n" \
358 " .long 2b,4b\n" \
359 ".previous" \
360 : "=&r" (err) \
361 : "r" (x), "r" (addr), "i" (-EFAULT), "0" (err) \
362 : "r14", "memory")
363#else
364#error no endian defined
365#endif
366
367extern void __put_user_bad(void);
368
369#define __put_user_size(x,ptr,size,retval) \
370do { \
371 retval = 0; \
372 __chk_user_ptr(ptr); \
373 switch (size) { \
374 case 1: __put_user_asm(x,ptr,retval,"b"); break; \
375 case 2: __put_user_asm(x,ptr,retval,"h"); break; \
376 case 4: __put_user_asm(x,ptr,retval,""); break; \
377 case 8: __put_user_u64((__typeof__(*ptr))(x),ptr,retval); break;\
378 default: __put_user_bad(); \
379 } \
380} while (0)
381
382struct __large_struct { unsigned long buf[100]; };
383#define __m(x) (*(struct __large_struct *)(x))
384
385/*
386 * Tell gcc we read from memory instead of writing: this is because
387 * we do not write to any memory gcc knows about, so there are no
388 * aliasing issues.
389 */
390#define __put_user_asm(x, addr, err, itype) \
391 __asm__ __volatile__( \
392 " .fillinsn\n" \
393 "1: st"itype" %1,@%2\n" \
394 " .fillinsn\n" \
395 "2:\n" \
396 ".section .fixup,\"ax\"\n" \
397 " .balign 4\n" \
398 "3: ldi %0,%3\n" \
399 " seth r14,#high(2b)\n" \
400 " or3 r14,r14,#low(2b)\n" \
401 " jmp r14\n" \
402 ".previous\n" \
403 ".section __ex_table,\"a\"\n" \
404 " .balign 4\n" \
405 " .long 1b,3b\n" \
406 ".previous" \
407 : "=&r" (err) \
408 : "r" (x), "r" (addr), "i" (-EFAULT), "0" (err) \
409 : "r14", "memory")
410
411/*
412 * Here we special-case 1, 2 and 4-byte copy_*_user invocations. On a fault
413 * we return the initial request size (1, 2 or 4), as copy_*_user should do.
414 * If a store crosses a page boundary and gets a fault, the m32r will not write
415 * anything, so this is accurate.
416 */
417
418/*
419 * Copy To/From Userspace
420 */
421
422/* Generic arbitrary sized copy. */
423/* Return the number of bytes NOT copied. */
424#define __copy_user(to,from,size) \
425do { \
426 unsigned long __dst, __src, __c; \
427 __asm__ __volatile__ ( \
428 " mv r14, %0\n" \
429 " or r14, %1\n" \
430 " beq %0, %1, 9f\n" \
431 " beqz %2, 9f\n" \
432 " and3 r14, r14, #3\n" \
433 " bnez r14, 2f\n" \
434 " and3 %2, %2, #3\n" \
435 " beqz %3, 2f\n" \
436 " addi %0, #-4 ; word_copy \n" \
437 " .fillinsn\n" \
438 "0: ld r14, @%1+\n" \
439 " addi %3, #-1\n" \
440 " .fillinsn\n" \
441 "1: st r14, @+%0\n" \
442 " bnez %3, 0b\n" \
443 " beqz %2, 9f\n" \
444 " addi %0, #4\n" \
445 " .fillinsn\n" \
446 "2: ldb r14, @%1 ; byte_copy \n" \
447 " .fillinsn\n" \
448 "3: stb r14, @%0\n" \
449 " addi %1, #1\n" \
450 " addi %2, #-1\n" \
451 " addi %0, #1\n" \
452 " bnez %2, 2b\n" \
453 " .fillinsn\n" \
454 "9:\n" \
455 ".section .fixup,\"ax\"\n" \
456 " .balign 4\n" \
457 "5: addi %3, #1\n" \
458 " addi %1, #-4\n" \
459 " .fillinsn\n" \
460 "6: slli %3, #2\n" \
461 " add %2, %3\n" \
462 " addi %0, #4\n" \
463 " .fillinsn\n" \
464 "7: seth r14, #high(9b)\n" \
465 " or3 r14, r14, #low(9b)\n" \
466 " jmp r14\n" \
467 ".previous\n" \
468 ".section __ex_table,\"a\"\n" \
469 " .balign 4\n" \
470 " .long 0b,6b\n" \
471 " .long 1b,5b\n" \
472 " .long 2b,9b\n" \
473 " .long 3b,9b\n" \
474 ".previous\n" \
475 : "=&r" (__dst), "=&r" (__src), "=&r" (size), \
476 "=&r" (__c) \
477 : "0" (to), "1" (from), "2" (size), "3" (size / 4) \
478 : "r14", "memory"); \
479} while (0)
480
481#define __copy_user_zeroing(to,from,size) \
482do { \
483 unsigned long __dst, __src, __c; \
484 __asm__ __volatile__ ( \
485 " mv r14, %0\n" \
486 " or r14, %1\n" \
487 " beq %0, %1, 9f\n" \
488 " beqz %2, 9f\n" \
489 " and3 r14, r14, #3\n" \
490 " bnez r14, 2f\n" \
491 " and3 %2, %2, #3\n" \
492 " beqz %3, 2f\n" \
493 " addi %0, #-4 ; word_copy \n" \
494 " .fillinsn\n" \
495 "0: ld r14, @%1+\n" \
496 " addi %3, #-1\n" \
497 " .fillinsn\n" \
498 "1: st r14, @+%0\n" \
499 " bnez %3, 0b\n" \
500 " beqz %2, 9f\n" \
501 " addi %0, #4\n" \
502 " .fillinsn\n" \
503 "2: ldb r14, @%1 ; byte_copy \n" \
504 " .fillinsn\n" \
505 "3: stb r14, @%0\n" \
506 " addi %1, #1\n" \
507 " addi %2, #-1\n" \
508 " addi %0, #1\n" \
509 " bnez %2, 2b\n" \
510 " .fillinsn\n" \
511 "9:\n" \
512 ".section .fixup,\"ax\"\n" \
513 " .balign 4\n" \
514 "5: addi %3, #1\n" \
515 " addi %1, #-4\n" \
516 " .fillinsn\n" \
517 "6: slli %3, #2\n" \
518 " add %2, %3\n" \
519 " addi %0, #4\n" \
520 " .fillinsn\n" \
521 "7: ldi r14, #0 ; store zero \n" \
522 " .fillinsn\n" \
523 "8: addi %2, #-1\n" \
524 " stb r14, @%0 ; ACE? \n" \
525 " addi %0, #1\n" \
526 " bnez %2, 8b\n" \
527 " seth r14, #high(9b)\n" \
528 " or3 r14, r14, #low(9b)\n" \
529 " jmp r14\n" \
530 ".previous\n" \
531 ".section __ex_table,\"a\"\n" \
532 " .balign 4\n" \
533 " .long 0b,6b\n" \
534 " .long 1b,5b\n" \
535 " .long 2b,7b\n" \
536 " .long 3b,7b\n" \
537 ".previous\n" \
538 : "=&r" (__dst), "=&r" (__src), "=&r" (size), \
539 "=&r" (__c) \
540 : "0" (to), "1" (from), "2" (size), "3" (size / 4) \
541 : "r14", "memory"); \
542} while (0)
543
544
545/* We let the __ versions of copy_from/to_user inline, because they're often
546 * used in fast paths and have only a small space overhead.
547 */
548static inline unsigned long __generic_copy_from_user_nocheck(void *to,
549 const void __user *from, unsigned long n)
550{
551 __copy_user_zeroing(to,from,n);
552 return n;
553}
554
555static inline unsigned long __generic_copy_to_user_nocheck(void __user *to,
556 const void *from, unsigned long n)
557{
558 __copy_user(to,from,n);
559 return n;
560}
561
562unsigned long __generic_copy_to_user(void __user *, const void *, unsigned long);
563unsigned long __generic_copy_from_user(void *, const void __user *, unsigned long);
564
565/**
566 * __copy_to_user: - Copy a block of data into user space, with less checking.
567 * @to: Destination address, in user space.
568 * @from: Source address, in kernel space.
569 * @n: Number of bytes to copy.
570 *
571 * Context: User context only. This function may sleep.
572 *
573 * Copy data from kernel space to user space. Caller must check
574 * the specified block with access_ok() before calling this function.
575 *
576 * Returns number of bytes that could not be copied.
577 * On success, this will be zero.
578 */
579#define __copy_to_user(to,from,n) \
580 __generic_copy_to_user_nocheck((to),(from),(n))
581
582#define __copy_to_user_inatomic __copy_to_user
583#define __copy_from_user_inatomic __copy_from_user
584
585/**
586 * copy_to_user: - Copy a block of data into user space.
587 * @to: Destination address, in user space.
588 * @from: Source address, in kernel space.
589 * @n: Number of bytes to copy.
590 *
591 * Context: User context only. This function may sleep.
592 *
593 * Copy data from kernel space to user space.
594 *
595 * Returns number of bytes that could not be copied.
596 * On success, this will be zero.
597 */
598#define copy_to_user(to,from,n) \
599({ \
600 might_sleep(); \
601 __generic_copy_to_user((to),(from),(n)); \
602})
603
604/**
605 * __copy_from_user: - Copy a block of data from user space, with less checking. * @to: Destination address, in kernel space.
606 * @from: Source address, in user space.
607 * @n: Number of bytes to copy.
608 *
609 * Context: User context only. This function may sleep.
610 *
611 * Copy data from user space to kernel space. Caller must check
612 * the specified block with access_ok() before calling this function.
613 *
614 * Returns number of bytes that could not be copied.
615 * On success, this will be zero.
616 *
617 * If some data could not be copied, this function will pad the copied
618 * data to the requested size using zero bytes.
619 */
620#define __copy_from_user(to,from,n) \
621 __generic_copy_from_user_nocheck((to),(from),(n))
622
623/**
624 * copy_from_user: - Copy a block of data from user space.
625 * @to: Destination address, in kernel space.
626 * @from: Source address, in user space.
627 * @n: Number of bytes to copy.
628 *
629 * Context: User context only. This function may sleep.
630 *
631 * Copy data from user space to kernel space.
632 *
633 * Returns number of bytes that could not be copied.
634 * On success, this will be zero.
635 *
636 * If some data could not be copied, this function will pad the copied
637 * data to the requested size using zero bytes.
638 */
639#define copy_from_user(to,from,n) \
640({ \
641 might_sleep(); \
642 __generic_copy_from_user((to),(from),(n)); \
643})
644
645long __must_check strncpy_from_user(char *dst, const char __user *src,
646 long count);
647long __must_check __strncpy_from_user(char *dst,
648 const char __user *src, long count);
649
650/**
651 * __clear_user: - Zero a block of memory in user space, with less checking.
652 * @to: Destination address, in user space.
653 * @n: Number of bytes to zero.
654 *
655 * Zero a block of memory in user space. Caller must check
656 * the specified block with access_ok() before calling this function.
657 *
658 * Returns number of bytes that could not be cleared.
659 * On success, this will be zero.
660 */
661unsigned long __clear_user(void __user *mem, unsigned long len);
662
663/**
664 * clear_user: - Zero a block of memory in user space.
665 * @to: Destination address, in user space.
666 * @n: Number of bytes to zero.
667 *
668 * Zero a block of memory in user space. Caller must check
669 * the specified block with access_ok() before calling this function.
670 *
671 * Returns number of bytes that could not be cleared.
672 * On success, this will be zero.
673 */
674unsigned long clear_user(void __user *mem, unsigned long len);
675
676/**
677 * strlen_user: - Get the size of a string in user space.
678 * @str: The string to measure.
679 *
680 * Context: User context only. This function may sleep.
681 *
682 * Get the size of a NUL-terminated string in user space.
683 *
684 * Returns the size of the string INCLUDING the terminating NUL.
685 * On exception, returns 0.
686 *
687 * If there is a limit on the length of a valid string, you may wish to
688 * consider using strnlen_user() instead.
689 */
690#define strlen_user(str) strnlen_user(str, ~0UL >> 1)
691long strnlen_user(const char __user *str, long n);
692
693#endif /* _ASM_M32R_UACCESS_H */
diff --git a/arch/m32r/include/asm/ucontext.h b/arch/m32r/include/asm/ucontext.h
new file mode 100644
index 000000000000..09324741eec3
--- /dev/null
+++ b/arch/m32r/include/asm/ucontext.h
@@ -0,0 +1,12 @@
1#ifndef _ASM_M32R_UCONTEXT_H
2#define _ASM_M32R_UCONTEXT_H
3
4struct ucontext {
5 unsigned long uc_flags;
6 struct ucontext *uc_link;
7 stack_t uc_stack;
8 struct sigcontext uc_mcontext;
9 sigset_t uc_sigmask; /* mask last for extensibility */
10};
11
12#endif /* _ASM_M32R_UCONTEXT_H */
diff --git a/arch/m32r/include/asm/unaligned.h b/arch/m32r/include/asm/unaligned.h
new file mode 100644
index 000000000000..377eb20d1ec6
--- /dev/null
+++ b/arch/m32r/include/asm/unaligned.h
@@ -0,0 +1,18 @@
1#ifndef _ASM_M32R_UNALIGNED_H
2#define _ASM_M32R_UNALIGNED_H
3
4#if defined(__LITTLE_ENDIAN__)
5# include <linux/unaligned/le_memmove.h>
6# include <linux/unaligned/be_byteshift.h>
7# include <linux/unaligned/generic.h>
8# define get_unaligned __get_unaligned_le
9# define put_unaligned __put_unaligned_le
10#else
11# include <linux/unaligned/be_memmove.h>
12# include <linux/unaligned/le_byteshift.h>
13# include <linux/unaligned/generic.h>
14# define get_unaligned __get_unaligned_be
15# define put_unaligned __put_unaligned_be
16#endif
17
18#endif /* _ASM_M32R_UNALIGNED_H */
diff --git a/arch/m32r/include/asm/unistd.h b/arch/m32r/include/asm/unistd.h
new file mode 100644
index 000000000000..cf701c933249
--- /dev/null
+++ b/arch/m32r/include/asm/unistd.h
@@ -0,0 +1,389 @@
1#ifndef _ASM_M32R_UNISTD_H
2#define _ASM_M32R_UNISTD_H
3
4/*
5 * This file contains the system call numbers.
6 */
7
8#define __NR_restart_syscall 0
9#define __NR_exit 1
10#define __NR_fork 2
11#define __NR_read 3
12#define __NR_write 4
13#define __NR_open 5
14#define __NR_close 6
15#define __NR_waitpid 7
16#define __NR_creat 8
17#define __NR_link 9
18#define __NR_unlink 10
19#define __NR_execve 11
20#define __NR_chdir 12
21#define __NR_time 13
22#define __NR_mknod 14
23#define __NR_chmod 15
24/* 16 is unused */
25/* 17 is unused */
26/* 18 is unused */
27#define __NR_lseek 19
28#define __NR_getpid 20
29#define __NR_mount 21
30#define __NR_umount 22
31/* 23 is unused */
32/* 24 is unused */
33#define __NR_stime 25
34#define __NR_ptrace 26
35#define __NR_alarm 27
36/* 28 is unused */
37#define __NR_pause 29
38#define __NR_utime 30
39/* 31 is unused */
40#define __NR_cachectl 32 /* old #define __NR_gtty 32*/
41#define __NR_access 33
42/* 34 is unused */
43/* 35 is unused */
44#define __NR_sync 36
45#define __NR_kill 37
46#define __NR_rename 38
47#define __NR_mkdir 39
48#define __NR_rmdir 40
49#define __NR_dup 41
50#define __NR_pipe 42
51#define __NR_times 43
52/* 44 is unused */
53#define __NR_brk 45
54/* 46 is unused */
55/* 47 is unused (getgid16) */
56/* 48 is unused */
57/* 49 is unused */
58/* 50 is unused */
59#define __NR_acct 51
60#define __NR_umount2 52
61/* 53 is unused */
62#define __NR_ioctl 54
63/* 55 is unused (fcntl) */
64/* 56 is unused */
65#define __NR_setpgid 57
66/* 58 is unused */
67/* 59 is unused */
68#define __NR_umask 60
69#define __NR_chroot 61
70#define __NR_ustat 62
71#define __NR_dup2 63
72#define __NR_getppid 64
73#define __NR_getpgrp 65
74#define __NR_setsid 66
75/* 67 is unused */
76/* 68 is unused*/
77/* 69 is unused*/
78/* 70 is unused */
79/* 71 is unused */
80/* 72 is unused */
81/* 73 is unused */
82#define __NR_sethostname 74
83#define __NR_setrlimit 75
84/* 76 is unused (old getrlimit) */
85#define __NR_getrusage 77
86#define __NR_gettimeofday 78
87#define __NR_settimeofday 79
88/* 80 is unused */
89/* 81 is unused */
90/* 82 is unused */
91#define __NR_symlink 83
92/* 84 is unused */
93#define __NR_readlink 85
94#define __NR_uselib 86
95#define __NR_swapon 87
96#define __NR_reboot 88
97/* 89 is unused */
98/* 90 is unused */
99#define __NR_munmap 91
100#define __NR_truncate 92
101#define __NR_ftruncate 93
102#define __NR_fchmod 94
103/* 95 is unused */
104#define __NR_getpriority 96
105#define __NR_setpriority 97
106/* 98 is unused */
107#define __NR_statfs 99
108#define __NR_fstatfs 100
109/* 101 is unused */
110#define __NR_socketcall 102
111#define __NR_syslog 103
112#define __NR_setitimer 104
113#define __NR_getitimer 105
114#define __NR_stat 106
115#define __NR_lstat 107
116#define __NR_fstat 108
117/* 109 is unused */
118/* 110 is unused */
119#define __NR_vhangup 111
120/* 112 is unused */
121/* 113 is unused */
122#define __NR_wait4 114
123#define __NR_swapoff 115
124#define __NR_sysinfo 116
125#define __NR_ipc 117
126#define __NR_fsync 118
127/* 119 is unused */
128#define __NR_clone 120
129#define __NR_setdomainname 121
130#define __NR_uname 122
131/* 123 is unused */
132#define __NR_adjtimex 124
133#define __NR_mprotect 125
134/* 126 is unused */
135/* 127 is unused */
136#define __NR_init_module 128
137#define __NR_delete_module 129
138/* 130 is unused */
139#define __NR_quotactl 131
140#define __NR_getpgid 132
141#define __NR_fchdir 133
142#define __NR_bdflush 134
143#define __NR_sysfs 135
144#define __NR_personality 136
145/* 137 is unused */
146/* 138 is unused */
147/* 139 is unused */
148#define __NR__llseek 140
149#define __NR_getdents 141
150#define __NR__newselect 142
151#define __NR_flock 143
152#define __NR_msync 144
153#define __NR_readv 145
154#define __NR_writev 146
155#define __NR_getsid 147
156#define __NR_fdatasync 148
157#define __NR__sysctl 149
158#define __NR_mlock 150
159#define __NR_munlock 151
160#define __NR_mlockall 152
161#define __NR_munlockall 153
162#define __NR_sched_setparam 154
163#define __NR_sched_getparam 155
164#define __NR_sched_setscheduler 156
165#define __NR_sched_getscheduler 157
166#define __NR_sched_yield 158
167#define __NR_sched_get_priority_max 159
168#define __NR_sched_get_priority_min 160
169#define __NR_sched_rr_get_interval 161
170#define __NR_nanosleep 162
171#define __NR_mremap 163
172/* 164 is unused */
173/* 165 is unused */
174#define __NR_tas 166
175/* 167 is unused */
176#define __NR_poll 168
177#define __NR_nfsservctl 169
178/* 170 is unused */
179/* 171 is unused */
180#define __NR_prctl 172
181#define __NR_rt_sigreturn 173
182#define __NR_rt_sigaction 174
183#define __NR_rt_sigprocmask 175
184#define __NR_rt_sigpending 176
185#define __NR_rt_sigtimedwait 177
186#define __NR_rt_sigqueueinfo 178
187#define __NR_rt_sigsuspend 179
188#define __NR_pread64 180
189#define __NR_pwrite64 181
190/* 182 is unused */
191#define __NR_getcwd 183
192#define __NR_capget 184
193#define __NR_capset 185
194#define __NR_sigaltstack 186
195#define __NR_sendfile 187
196/* 188 is unused */
197/* 189 is unused */
198#define __NR_vfork 190
199#define __NR_ugetrlimit 191 /* SuS compliant getrlimit */
200#define __NR_mmap2 192
201#define __NR_truncate64 193
202#define __NR_ftruncate64 194
203#define __NR_stat64 195
204#define __NR_lstat64 196
205#define __NR_fstat64 197
206#define __NR_lchown32 198
207#define __NR_getuid32 199
208#define __NR_getgid32 200
209#define __NR_geteuid32 201
210#define __NR_getegid32 202
211#define __NR_setreuid32 203
212#define __NR_setregid32 204
213#define __NR_getgroups32 205
214#define __NR_setgroups32 206
215#define __NR_fchown32 207
216#define __NR_setresuid32 208
217#define __NR_getresuid32 209
218#define __NR_setresgid32 210
219#define __NR_getresgid32 211
220#define __NR_chown32 212
221#define __NR_setuid32 213
222#define __NR_setgid32 214
223#define __NR_setfsuid32 215
224#define __NR_setfsgid32 216
225#define __NR_pivot_root 217
226#define __NR_mincore 218
227#define __NR_madvise 219
228#define __NR_getdents64 220
229#define __NR_fcntl64 221
230/* 222 is unused */
231/* 223 is unused */
232#define __NR_gettid 224
233#define __NR_readahead 225
234#define __NR_setxattr 226
235#define __NR_lsetxattr 227
236#define __NR_fsetxattr 228
237#define __NR_getxattr 229
238#define __NR_lgetxattr 230
239#define __NR_fgetxattr 231
240#define __NR_listxattr 232
241#define __NR_llistxattr 233
242#define __NR_flistxattr 234
243#define __NR_removexattr 235
244#define __NR_lremovexattr 236
245#define __NR_fremovexattr 237
246#define __NR_tkill 238
247#define __NR_sendfile64 239
248#define __NR_futex 240
249#define __NR_sched_setaffinity 241
250#define __NR_sched_getaffinity 242
251#define __NR_set_thread_area 243
252#define __NR_get_thread_area 244
253#define __NR_io_setup 245
254#define __NR_io_destroy 246
255#define __NR_io_getevents 247
256#define __NR_io_submit 248
257#define __NR_io_cancel 249
258#define __NR_fadvise64 250
259/* 251 is unused */
260#define __NR_exit_group 252
261#define __NR_lookup_dcookie 253
262#define __NR_epoll_create 254
263#define __NR_epoll_ctl 255
264#define __NR_epoll_wait 256
265#define __NR_remap_file_pages 257
266#define __NR_set_tid_address 258
267#define __NR_timer_create 259
268#define __NR_timer_settime (__NR_timer_create+1)
269#define __NR_timer_gettime (__NR_timer_create+2)
270#define __NR_timer_getoverrun (__NR_timer_create+3)
271#define __NR_timer_delete (__NR_timer_create+4)
272#define __NR_clock_settime (__NR_timer_create+5)
273#define __NR_clock_gettime (__NR_timer_create+6)
274#define __NR_clock_getres (__NR_timer_create+7)
275#define __NR_clock_nanosleep (__NR_timer_create+8)
276#define __NR_statfs64 268
277#define __NR_fstatfs64 269
278#define __NR_tgkill 270
279#define __NR_utimes 271
280#define __NR_fadvise64_64 272
281#define __NR_vserver 273
282#define __NR_mbind 274
283#define __NR_get_mempolicy 275
284#define __NR_set_mempolicy 276
285#define __NR_mq_open 277
286#define __NR_mq_unlink (__NR_mq_open+1)
287#define __NR_mq_timedsend (__NR_mq_open+2)
288#define __NR_mq_timedreceive (__NR_mq_open+3)
289#define __NR_mq_notify (__NR_mq_open+4)
290#define __NR_mq_getsetattr (__NR_mq_open+5)
291#define __NR_kexec_load 283
292#define __NR_waitid 284
293/* 285 is unused */
294#define __NR_add_key 286
295#define __NR_request_key 287
296#define __NR_keyctl 288
297#define __NR_ioprio_set 289
298#define __NR_ioprio_get 290
299#define __NR_inotify_init 291
300#define __NR_inotify_add_watch 292
301#define __NR_inotify_rm_watch 293
302#define __NR_migrate_pages 294
303#define __NR_openat 295
304#define __NR_mkdirat 296
305#define __NR_mknodat 297
306#define __NR_fchownat 298
307#define __NR_futimesat 299
308#define __NR_fstatat64 300
309#define __NR_unlinkat 301
310#define __NR_renameat 302
311#define __NR_linkat 303
312#define __NR_symlinkat 304
313#define __NR_readlinkat 305
314#define __NR_fchmodat 306
315#define __NR_faccessat 307
316#define __NR_pselect6 308
317#define __NR_ppoll 309
318#define __NR_unshare 310
319#define __NR_set_robust_list 311
320#define __NR_get_robust_list 312
321#define __NR_splice 313
322#define __NR_sync_file_range 314
323#define __NR_tee 315
324#define __NR_vmsplice 316
325#define __NR_move_pages 317
326#define __NR_getcpu 318
327#define __NR_epoll_pwait 319
328#define __NR_utimensat 320
329#define __NR_signalfd 321
330/* #define __NR_timerfd 322 removed */
331#define __NR_eventfd 323
332#define __NR_fallocate 324
333
334#ifdef __KERNEL__
335
336#define NR_syscalls 325
337
338#define __ARCH_WANT_IPC_PARSE_VERSION
339#define __ARCH_WANT_STAT64
340#define __ARCH_WANT_SYS_ALARM
341#define __ARCH_WANT_SYS_GETHOSTNAME
342#define __ARCH_WANT_SYS_PAUSE
343#define __ARCH_WANT_SYS_TIME
344#define __ARCH_WANT_SYS_UTIME
345#define __ARCH_WANT_SYS_WAITPID
346#define __ARCH_WANT_SYS_SOCKETCALL
347#define __ARCH_WANT_SYS_FADVISE64
348#define __ARCH_WANT_SYS_GETPGRP
349#define __ARCH_WANT_SYS_LLSEEK
350#define __ARCH_WANT_SYS_OLD_GETRLIMIT /*will be unused*/
351#define __ARCH_WANT_SYS_OLDUMOUNT
352#define __ARCH_WANT_SYS_RT_SIGACTION
353
354#define __IGNORE_lchown
355#define __IGNORE_setuid
356#define __IGNORE_getuid
357#define __IGNORE_setgid
358#define __IGNORE_getgid
359#define __IGNORE_geteuid
360#define __IGNORE_getegid
361#define __IGNORE_fcntl
362#define __IGNORE_setreuid
363#define __IGNORE_setregid
364#define __IGNORE_getrlimit
365#define __IGNORE_getgroups
366#define __IGNORE_setgroups
367#define __IGNORE_select
368#define __IGNORE_mmap
369#define __IGNORE_fchown
370#define __IGNORE_setfsuid
371#define __IGNORE_setfsgid
372#define __IGNORE_setresuid
373#define __IGNORE_getresuid
374#define __IGNORE_setresgid
375#define __IGNORE_getresgid
376#define __IGNORE_chown
377
378/*
379 * "Conditional" syscalls
380 *
381 * What we want is __attribute__((weak,alias("sys_ni_syscall"))),
382 * but it doesn't work on all toolchains, so we just do it by hand
383 */
384#ifndef cond_syscall
385#define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall")
386#endif
387
388#endif /* __KERNEL__ */
389#endif /* _ASM_M32R_UNISTD_H */
diff --git a/arch/m32r/include/asm/user.h b/arch/m32r/include/asm/user.h
new file mode 100644
index 000000000000..03b3c11c2aff
--- /dev/null
+++ b/arch/m32r/include/asm/user.h
@@ -0,0 +1,52 @@
1#ifndef _ASM_M32R_USER_H
2#define _ASM_M32R_USER_H
3
4#include <linux/types.h>
5#include <asm/ptrace.h>
6#include <asm/page.h>
7
8/*
9 * Core file format: The core file is written in such a way that gdb
10 * can understand it and provide useful information to the user (under
11 * linux we use the `trad-core' bfd).
12 *
13 * The actual file contents are as follows:
14 * UPAGE: 1 page consisting of a user struct that tells gdb
15 * what is present in the file. Directly after this is a
16 * copy of the task_struct, which is currently not used by gdb,
17 * but it may come in handy at some point. All of the registers
18 * are stored as part of the upage. The upage should always be
19 * only one page.
20 * DATA: The data area is stored. We use current->end_text to
21 * current->brk to pick up all of the user variables, plus any memory
22 * that may have been sbrk'ed. No attempt is made to determine if a
23 * page is demand-zero or if a page is totally unused, we just cover
24 * the entire range. All of the addresses are rounded in such a way
25 * that an integral number of pages is written.
26 * STACK: We need the stack information in order to get a meaningful
27 * backtrace. We need to write the data from usp to
28 * current->start_stack, so we round each of these off in order to be
29 * able to write an integer number of pages.
30 */
31
32struct user {
33 struct pt_regs regs; /* entire machine state */
34 size_t u_tsize; /* text size (pages) */
35 size_t u_dsize; /* data size (pages) */
36 size_t u_ssize; /* stack size (pages) */
37 unsigned long start_code; /* text starting address */
38 unsigned long start_data; /* data starting address */
39 unsigned long start_stack; /* stack starting address */
40 long int signal; /* signal causing core dump */
41 unsigned long u_ar0; /* help gdb find registers */
42 unsigned long magic; /* identifies a core file */
43 char u_comm[32]; /* user command name */
44};
45
46#define NBPG PAGE_SIZE
47#define UPAGES 1
48#define HOST_TEXT_START_ADDR (u.start_code)
49#define HOST_DATA_START_ADDR (u.start_data)
50#define HOST_STACK_END_ADDR (u.start_stack + u.u_ssize * NBPG)
51
52#endif /* _ASM_M32R_USER_H */
diff --git a/arch/m32r/include/asm/vga.h b/arch/m32r/include/asm/vga.h
new file mode 100644
index 000000000000..a1b63061c06f
--- /dev/null
+++ b/arch/m32r/include/asm/vga.h
@@ -0,0 +1,20 @@
1#ifndef _ASM_M32R_VGA_H
2#define _ASM_M32R_VGA_H
3
4/*
5 * Access to VGA videoram
6 *
7 * (c) 1998 Martin Mares <mj@ucw.cz>
8 */
9
10/*
11 * On the PC, we can just recalculate addresses and then
12 * access the videoram directly without any black magic.
13 */
14
15#define VGA_MAP_MEM(x,s) (unsigned long)phys_to_virt(x)
16
17#define vga_readb(x) (*(x))
18#define vga_writeb(x,y) (*(y) = (x))
19
20#endif /* _ASM_M32R_VGA_H */
diff --git a/arch/m32r/include/asm/xor.h b/arch/m32r/include/asm/xor.h
new file mode 100644
index 000000000000..6d525259df3e
--- /dev/null
+++ b/arch/m32r/include/asm/xor.h
@@ -0,0 +1,6 @@
1#ifndef _ASM_M32R_XOR_H
2#define _ASM_M32R_XOR_H
3
4#include <asm-generic/xor.h>
5
6#endif /* _ASM_M32R_XOR_H */
diff --git a/arch/mn10300/include/asm/bug.h b/arch/mn10300/include/asm/bug.h
index 4fcf3384e259..aa6a38886391 100644
--- a/arch/mn10300/include/asm/bug.h
+++ b/arch/mn10300/include/asm/bug.h
@@ -11,10 +11,12 @@
11#ifndef _ASM_BUG_H 11#ifndef _ASM_BUG_H
12#define _ASM_BUG_H 12#define _ASM_BUG_H
13 13
14#ifdef CONFIG_BUG
15
14/* 16/*
15 * Tell the user there is some problem. 17 * Tell the user there is some problem.
16 */ 18 */
17#define _debug_bug_trap() \ 19#define BUG() \
18do { \ 20do { \
19 asm volatile( \ 21 asm volatile( \
20 " syscall 15 \n" \ 22 " syscall 15 \n" \
@@ -25,11 +27,11 @@ do { \
25 : \ 27 : \
26 : "i"(__FILE__), "i"(__LINE__) \ 28 : "i"(__FILE__), "i"(__LINE__) \
27 ); \ 29 ); \
28} while (0) 30} while (1)
29
30#define BUG() _debug_bug_trap()
31 31
32#define HAVE_ARCH_BUG 32#define HAVE_ARCH_BUG
33#endif /* CONFIG_BUG */
34
33#include <asm-generic/bug.h> 35#include <asm-generic/bug.h>
34 36
35#endif /* _ASM_BUG_H */ 37#endif /* _ASM_BUG_H */
diff --git a/arch/mn10300/include/asm/unistd.h b/arch/mn10300/include/asm/unistd.h
index 543a4f98695d..fef5b434dadc 100644
--- a/arch/mn10300/include/asm/unistd.h
+++ b/arch/mn10300/include/asm/unistd.h
@@ -344,6 +344,8 @@
344#define __NR_dup3 331 344#define __NR_dup3 331
345#define __NR_pipe2 332 345#define __NR_pipe2 332
346#define __NR_inotify_init1 333 346#define __NR_inotify_init1 333
347#define __NR_preadv 334
348#define __NR_pwritev 335
347 349
348#ifdef __KERNEL__ 350#ifdef __KERNEL__
349 351
diff --git a/arch/mn10300/kernel/entry.S b/arch/mn10300/kernel/entry.S
index 34ab5a293153..3dc3e462f92a 100644
--- a/arch/mn10300/kernel/entry.S
+++ b/arch/mn10300/kernel/entry.S
@@ -723,6 +723,8 @@ ENTRY(sys_call_table)
723 .long sys_dup3 723 .long sys_dup3
724 .long sys_pipe2 724 .long sys_pipe2
725 .long sys_inotify_init1 725 .long sys_inotify_init1
726 .long sys_preadv
727 .long sys_pwritev /* 335 */
726 728
727 729
728nr_syscalls=(.-sys_call_table)/4 730nr_syscalls=(.-sys_call_table)/4
diff --git a/arch/mn10300/kernel/setup.c b/arch/mn10300/kernel/setup.c
index 71414e19fd16..79890edfd67a 100644
--- a/arch/mn10300/kernel/setup.c
+++ b/arch/mn10300/kernel/setup.c
@@ -136,10 +136,6 @@ void __init setup_arch(char **cmdline_p)
136 data_resource.start = virt_to_bus(&_etext); 136 data_resource.start = virt_to_bus(&_etext);
137 data_resource.end = virt_to_bus(&_edata)-1; 137 data_resource.end = virt_to_bus(&_edata)-1;
138 138
139#define PFN_UP(x) (((x) + PAGE_SIZE-1) >> PAGE_SHIFT)
140#define PFN_DOWN(x) ((x) >> PAGE_SHIFT)
141#define PFN_PHYS(x) ((x) << PAGE_SHIFT)
142
143 start_pfn = (CONFIG_KERNEL_RAM_BASE_ADDRESS >> PAGE_SHIFT); 139 start_pfn = (CONFIG_KERNEL_RAM_BASE_ADDRESS >> PAGE_SHIFT);
144 kstart_pfn = PFN_UP(__pa(&_text)); 140 kstart_pfn = PFN_UP(__pa(&_text));
145 free_pfn = PFN_UP(__pa(&_end)); 141 free_pfn = PFN_UP(__pa(&_end));
diff --git a/arch/s390/appldata/appldata_base.c b/arch/s390/appldata/appldata_base.c
index 27b70d8a359c..aeb3cff95f63 100644
--- a/arch/s390/appldata/appldata_base.c
+++ b/arch/s390/appldata/appldata_base.c
@@ -176,7 +176,7 @@ static void __appldata_mod_vtimer_wrap(void *p) {
176 struct vtimer_list *timer; 176 struct vtimer_list *timer;
177 u64 expires; 177 u64 expires;
178 } *args = p; 178 } *args = p;
179 mod_virt_timer(args->timer, args->expires); 179 mod_virt_timer_periodic(args->timer, args->expires);
180} 180}
181 181
182#define APPLDATA_ADD_TIMER 0 182#define APPLDATA_ADD_TIMER 0
diff --git a/arch/s390/include/asm/cpuid.h b/arch/s390/include/asm/cpuid.h
new file mode 100644
index 000000000000..07836a2e5222
--- /dev/null
+++ b/arch/s390/include/asm/cpuid.h
@@ -0,0 +1,25 @@
1/*
2 * Copyright IBM Corp. 2000,2009
3 * Author(s): Hartmut Penner <hp@de.ibm.com>,
4 * Martin Schwidefsky <schwidefsky@de.ibm.com>
5 * Christian Ehrhardt <ehrhardt@de.ibm.com>
6 */
7
8#ifndef _ASM_S390_CPUID_H_
9#define _ASM_S390_CPUID_H_
10
11/*
12 * CPU type and hardware bug flags. Kept separately for each CPU.
13 * Members of this structure are referenced in head.S, so think twice
14 * before touching them. [mj]
15 */
16
17typedef struct
18{
19 unsigned int version : 8;
20 unsigned int ident : 24;
21 unsigned int machine : 16;
22 unsigned int unused : 16;
23} __attribute__ ((packed)) cpuid_t;
24
25#endif /* _ASM_S390_CPUID_H_ */
diff --git a/arch/s390/include/asm/kvm_host.h b/arch/s390/include/asm/kvm_host.h
index c6e674f5fca9..54ea39f96ecd 100644
--- a/arch/s390/include/asm/kvm_host.h
+++ b/arch/s390/include/asm/kvm_host.h
@@ -15,6 +15,7 @@
15#define ASM_KVM_HOST_H 15#define ASM_KVM_HOST_H
16#include <linux/kvm_host.h> 16#include <linux/kvm_host.h>
17#include <asm/debug.h> 17#include <asm/debug.h>
18#include <asm/cpuid.h>
18 19
19#define KVM_MAX_VCPUS 64 20#define KVM_MAX_VCPUS 64
20#define KVM_MEMORY_SLOTS 32 21#define KVM_MEMORY_SLOTS 32
diff --git a/arch/s390/include/asm/lowcore.h b/arch/s390/include/asm/lowcore.h
index b349f1c7fdfa..3aeca492b147 100644
--- a/arch/s390/include/asm/lowcore.h
+++ b/arch/s390/include/asm/lowcore.h
@@ -66,6 +66,7 @@
66#define __LC_USER_EXEC_ASCE 0x02ac 66#define __LC_USER_EXEC_ASCE 0x02ac
67#define __LC_CPUID 0x02b0 67#define __LC_CPUID 0x02b0
68#define __LC_INT_CLOCK 0x02c8 68#define __LC_INT_CLOCK 0x02c8
69#define __LC_MACHINE_FLAGS 0x02d8
69#define __LC_IRB 0x0300 70#define __LC_IRB 0x0300
70#define __LC_PFAULT_INTPARM 0x0080 71#define __LC_PFAULT_INTPARM 0x0080
71#define __LC_CPU_TIMER_SAVE_AREA 0x00d8 72#define __LC_CPU_TIMER_SAVE_AREA 0x00d8
@@ -110,6 +111,7 @@
110#define __LC_CPUID 0x0320 111#define __LC_CPUID 0x0320
111#define __LC_INT_CLOCK 0x0340 112#define __LC_INT_CLOCK 0x0340
112#define __LC_VDSO_PER_CPU 0x0350 113#define __LC_VDSO_PER_CPU 0x0350
114#define __LC_MACHINE_FLAGS 0x0358
113#define __LC_IRB 0x0380 115#define __LC_IRB 0x0380
114#define __LC_PASTE 0x03c0 116#define __LC_PASTE 0x03c0
115#define __LC_PFAULT_INTPARM 0x11b8 117#define __LC_PFAULT_INTPARM 0x11b8
@@ -127,9 +129,9 @@
127 129
128#ifndef __ASSEMBLY__ 130#ifndef __ASSEMBLY__
129 131
130#include <asm/processor.h> 132#include <asm/cpuid.h>
133#include <asm/ptrace.h>
131#include <linux/types.h> 134#include <linux/types.h>
132#include <asm/sigp.h>
133 135
134void restart_int_handler(void); 136void restart_int_handler(void);
135void ext_int_handler(void); 137void ext_int_handler(void);
@@ -277,7 +279,8 @@ struct _lowcore
277 __u32 ext_call_fast; /* 0x02c4 */ 279 __u32 ext_call_fast; /* 0x02c4 */
278 __u64 int_clock; /* 0x02c8 */ 280 __u64 int_clock; /* 0x02c8 */
279 __u64 clock_comparator; /* 0x02d0 */ 281 __u64 clock_comparator; /* 0x02d0 */
280 __u8 pad_0x02d8[0x0300-0x02d8]; /* 0x02d8 */ 282 __u32 machine_flags; /* 0x02d8 */
283 __u8 pad_0x02dc[0x0300-0x02dc]; /* 0x02dc */
281 284
282 /* Interrupt response block */ 285 /* Interrupt response block */
283 __u8 irb[64]; /* 0x0300 */ 286 __u8 irb[64]; /* 0x0300 */
@@ -381,7 +384,8 @@ struct _lowcore
381 __u64 int_clock; /* 0x0340 */ 384 __u64 int_clock; /* 0x0340 */
382 __u64 clock_comparator; /* 0x0348 */ 385 __u64 clock_comparator; /* 0x0348 */
383 __u64 vdso_per_cpu_data; /* 0x0350 */ 386 __u64 vdso_per_cpu_data; /* 0x0350 */
384 __u8 pad_0x0358[0x0380-0x0358]; /* 0x0358 */ 387 __u64 machine_flags; /* 0x0358 */
388 __u8 pad_0x0360[0x0380-0x0360]; /* 0x0360 */
385 389
386 /* Interrupt response block. */ 390 /* Interrupt response block. */
387 __u8 irb[64]; /* 0x0380 */ 391 __u8 irb[64]; /* 0x0380 */
diff --git a/arch/s390/include/asm/processor.h b/arch/s390/include/asm/processor.h
index 61862b3ac794..c139fa7b8e89 100644
--- a/arch/s390/include/asm/processor.h
+++ b/arch/s390/include/asm/processor.h
@@ -14,7 +14,10 @@
14#define __ASM_S390_PROCESSOR_H 14#define __ASM_S390_PROCESSOR_H
15 15
16#include <linux/linkage.h> 16#include <linux/linkage.h>
17#include <asm/cpuid.h>
18#include <asm/page.h>
17#include <asm/ptrace.h> 19#include <asm/ptrace.h>
20#include <asm/setup.h>
18 21
19#ifdef __KERNEL__ 22#ifdef __KERNEL__
20/* 23/*
@@ -23,20 +26,6 @@
23 */ 26 */
24#define current_text_addr() ({ void *pc; asm("basr %0,0" : "=a" (pc)); pc; }) 27#define current_text_addr() ({ void *pc; asm("basr %0,0" : "=a" (pc)); pc; })
25 28
26/*
27 * CPU type and hardware bug flags. Kept separately for each CPU.
28 * Members of this structure are referenced in head.S, so think twice
29 * before touching them. [mj]
30 */
31
32typedef struct
33{
34 unsigned int version : 8;
35 unsigned int ident : 24;
36 unsigned int machine : 16;
37 unsigned int unused : 16;
38} __attribute__ ((packed)) cpuid_t;
39
40static inline void get_cpu_id(cpuid_t *ptr) 29static inline void get_cpu_id(cpuid_t *ptr)
41{ 30{
42 asm volatile("stidp 0(%1)" : "=m" (*ptr) : "a" (ptr)); 31 asm volatile("stidp 0(%1)" : "=m" (*ptr) : "a" (ptr));
diff --git a/arch/s390/include/asm/ptrace.h b/arch/s390/include/asm/ptrace.h
index f1b051630c50..539263fc9ab9 100644
--- a/arch/s390/include/asm/ptrace.h
+++ b/arch/s390/include/asm/ptrace.h
@@ -313,8 +313,6 @@ typedef struct
313 313
314 314
315#ifdef __KERNEL__ 315#ifdef __KERNEL__
316#include <asm/setup.h>
317#include <asm/page.h>
318 316
319/* 317/*
320 * The pt_regs struct defines the way the registers are stored on 318 * The pt_regs struct defines the way the registers are stored on
diff --git a/arch/s390/include/asm/setup.h b/arch/s390/include/asm/setup.h
index e8bd6ac22c99..38b0fc221ed7 100644
--- a/arch/s390/include/asm/setup.h
+++ b/arch/s390/include/asm/setup.h
@@ -14,6 +14,7 @@
14 14
15#ifdef __KERNEL__ 15#ifdef __KERNEL__
16 16
17#include <asm/lowcore.h>
17#include <asm/types.h> 18#include <asm/types.h>
18 19
19#define PARMAREA 0x10400 20#define PARMAREA 0x10400
@@ -63,7 +64,6 @@ extern unsigned int s390_noexec;
63/* 64/*
64 * Machine features detected in head.S 65 * Machine features detected in head.S
65 */ 66 */
66extern unsigned long machine_flags;
67 67
68#define MACHINE_FLAG_VM (1UL << 0) 68#define MACHINE_FLAG_VM (1UL << 0)
69#define MACHINE_FLAG_IEEE (1UL << 1) 69#define MACHINE_FLAG_IEEE (1UL << 1)
@@ -77,28 +77,28 @@ extern unsigned long machine_flags;
77#define MACHINE_FLAG_HPAGE (1UL << 10) 77#define MACHINE_FLAG_HPAGE (1UL << 10)
78#define MACHINE_FLAG_PFMF (1UL << 11) 78#define MACHINE_FLAG_PFMF (1UL << 11)
79 79
80#define MACHINE_IS_VM (machine_flags & MACHINE_FLAG_VM) 80#define MACHINE_IS_VM (S390_lowcore.machine_flags & MACHINE_FLAG_VM)
81#define MACHINE_IS_KVM (machine_flags & MACHINE_FLAG_KVM) 81#define MACHINE_IS_KVM (S390_lowcore.machine_flags & MACHINE_FLAG_KVM)
82#define MACHINE_HAS_DIAG9C (machine_flags & MACHINE_FLAG_DIAG9C) 82#define MACHINE_HAS_DIAG9C (S390_lowcore.machine_flags & MACHINE_FLAG_DIAG9C)
83 83
84#ifndef __s390x__ 84#ifndef __s390x__
85#define MACHINE_HAS_IEEE (machine_flags & MACHINE_FLAG_IEEE) 85#define MACHINE_HAS_IEEE (S390_lowcore.machine_flags & MACHINE_FLAG_IEEE)
86#define MACHINE_HAS_CSP (machine_flags & MACHINE_FLAG_CSP) 86#define MACHINE_HAS_CSP (S390_lowcore.machine_flags & MACHINE_FLAG_CSP)
87#define MACHINE_HAS_IDTE (0) 87#define MACHINE_HAS_IDTE (0)
88#define MACHINE_HAS_DIAG44 (1) 88#define MACHINE_HAS_DIAG44 (1)
89#define MACHINE_HAS_MVPG (machine_flags & MACHINE_FLAG_MVPG) 89#define MACHINE_HAS_MVPG (S390_lowcore.machine_flags & MACHINE_FLAG_MVPG)
90#define MACHINE_HAS_MVCOS (0) 90#define MACHINE_HAS_MVCOS (0)
91#define MACHINE_HAS_HPAGE (0) 91#define MACHINE_HAS_HPAGE (0)
92#define MACHINE_HAS_PFMF (0) 92#define MACHINE_HAS_PFMF (0)
93#else /* __s390x__ */ 93#else /* __s390x__ */
94#define MACHINE_HAS_IEEE (1) 94#define MACHINE_HAS_IEEE (1)
95#define MACHINE_HAS_CSP (1) 95#define MACHINE_HAS_CSP (1)
96#define MACHINE_HAS_IDTE (machine_flags & MACHINE_FLAG_IDTE) 96#define MACHINE_HAS_IDTE (S390_lowcore.machine_flags & MACHINE_FLAG_IDTE)
97#define MACHINE_HAS_DIAG44 (machine_flags & MACHINE_FLAG_DIAG44) 97#define MACHINE_HAS_DIAG44 (S390_lowcore.machine_flags & MACHINE_FLAG_DIAG44)
98#define MACHINE_HAS_MVPG (1) 98#define MACHINE_HAS_MVPG (1)
99#define MACHINE_HAS_MVCOS (machine_flags & MACHINE_FLAG_MVCOS) 99#define MACHINE_HAS_MVCOS (S390_lowcore.machine_flags & MACHINE_FLAG_MVCOS)
100#define MACHINE_HAS_HPAGE (machine_flags & MACHINE_FLAG_HPAGE) 100#define MACHINE_HAS_HPAGE (S390_lowcore.machine_flags & MACHINE_FLAG_HPAGE)
101#define MACHINE_HAS_PFMF (machine_flags & MACHINE_FLAG_PFMF) 101#define MACHINE_HAS_PFMF (S390_lowcore.machine_flags & MACHINE_FLAG_PFMF)
102#endif /* __s390x__ */ 102#endif /* __s390x__ */
103 103
104#define ZFCPDUMP_HSA_SIZE (32UL<<20) 104#define ZFCPDUMP_HSA_SIZE (32UL<<20)
diff --git a/arch/s390/include/asm/thread_info.h b/arch/s390/include/asm/thread_info.h
index c544aa524535..461f2abd2e6f 100644
--- a/arch/s390/include/asm/thread_info.h
+++ b/arch/s390/include/asm/thread_info.h
@@ -31,8 +31,9 @@
31#define ASYNC_SIZE (PAGE_SIZE << ASYNC_ORDER) 31#define ASYNC_SIZE (PAGE_SIZE << ASYNC_ORDER)
32 32
33#ifndef __ASSEMBLY__ 33#ifndef __ASSEMBLY__
34#include <asm/processor.h>
35#include <asm/lowcore.h> 34#include <asm/lowcore.h>
35#include <asm/page.h>
36#include <asm/processor.h>
36 37
37/* 38/*
38 * low level task data that entry.S needs immediate access to 39 * low level task data that entry.S needs immediate access to
diff --git a/arch/s390/include/asm/timer.h b/arch/s390/include/asm/timer.h
index e4bcab739c19..814243cafdfe 100644
--- a/arch/s390/include/asm/timer.h
+++ b/arch/s390/include/asm/timer.h
@@ -41,6 +41,7 @@ extern void init_virt_timer(struct vtimer_list *timer);
41extern void add_virt_timer(void *new); 41extern void add_virt_timer(void *new);
42extern void add_virt_timer_periodic(void *new); 42extern void add_virt_timer_periodic(void *new);
43extern int mod_virt_timer(struct vtimer_list *timer, __u64 expires); 43extern int mod_virt_timer(struct vtimer_list *timer, __u64 expires);
44extern int mod_virt_timer_periodic(struct vtimer_list *timer, __u64 expires);
44extern int del_virt_timer(struct vtimer_list *timer); 45extern int del_virt_timer(struct vtimer_list *timer);
45 46
46extern void init_cpu_vtimer(void); 47extern void init_cpu_vtimer(void);
diff --git a/arch/s390/include/asm/timex.h b/arch/s390/include/asm/timex.h
index d744c3d62de5..cc21e3e20fd7 100644
--- a/arch/s390/include/asm/timex.h
+++ b/arch/s390/include/asm/timex.h
@@ -11,6 +11,9 @@
11#ifndef _ASM_S390_TIMEX_H 11#ifndef _ASM_S390_TIMEX_H
12#define _ASM_S390_TIMEX_H 12#define _ASM_S390_TIMEX_H
13 13
14/* The value of the TOD clock for 1.1.1970. */
15#define TOD_UNIX_EPOCH 0x7d91048bca000000ULL
16
14/* Inline functions for clock register access. */ 17/* Inline functions for clock register access. */
15static inline int set_clock(__u64 time) 18static inline int set_clock(__u64 time)
16{ 19{
@@ -85,4 +88,6 @@ int get_sync_clock(unsigned long long *clock);
85void init_cpu_timer(void); 88void init_cpu_timer(void);
86unsigned long long monotonic_clock(void); 89unsigned long long monotonic_clock(void);
87 90
91extern u64 sched_clock_base_cc;
92
88#endif 93#endif
diff --git a/arch/s390/include/asm/unistd.h b/arch/s390/include/asm/unistd.h
index c8ad350d1444..f0f19e6ace6c 100644
--- a/arch/s390/include/asm/unistd.h
+++ b/arch/s390/include/asm/unistd.h
@@ -265,7 +265,9 @@
265#define __NR_pipe2 325 265#define __NR_pipe2 325
266#define __NR_dup3 326 266#define __NR_dup3 326
267#define __NR_epoll_create1 327 267#define __NR_epoll_create1 327
268#define NR_syscalls 328 268#define __NR_preadv 328
269#define __NR_pwritev 329
270#define NR_syscalls 330
269 271
270/* 272/*
271 * There are some system calls that are not present on 64 bit, some 273 * There are some system calls that are not present on 64 bit, some
diff --git a/arch/s390/kernel/asm-offsets.c b/arch/s390/kernel/asm-offsets.c
index 67a60016babb..fa9905ce7d0b 100644
--- a/arch/s390/kernel/asm-offsets.c
+++ b/arch/s390/kernel/asm-offsets.c
@@ -27,6 +27,8 @@ int main(void)
27 DEFINE(__TI_flags, offsetof(struct thread_info, flags)); 27 DEFINE(__TI_flags, offsetof(struct thread_info, flags));
28 DEFINE(__TI_cpu, offsetof(struct thread_info, cpu)); 28 DEFINE(__TI_cpu, offsetof(struct thread_info, cpu));
29 DEFINE(__TI_precount, offsetof(struct thread_info, preempt_count)); 29 DEFINE(__TI_precount, offsetof(struct thread_info, preempt_count));
30 DEFINE(__TI_user_timer, offsetof(struct thread_info, user_timer));
31 DEFINE(__TI_system_timer, offsetof(struct thread_info, system_timer));
30 BLANK(); 32 BLANK();
31 DEFINE(__PT_ARGS, offsetof(struct pt_regs, args)); 33 DEFINE(__PT_ARGS, offsetof(struct pt_regs, args));
32 DEFINE(__PT_PSW, offsetof(struct pt_regs, psw)); 34 DEFINE(__PT_PSW, offsetof(struct pt_regs, psw));
diff --git a/arch/s390/kernel/compat_wrapper.S b/arch/s390/kernel/compat_wrapper.S
index 87cf5a79a351..fb38af6316bb 100644
--- a/arch/s390/kernel/compat_wrapper.S
+++ b/arch/s390/kernel/compat_wrapper.S
@@ -1805,3 +1805,21 @@ compat_sys_keyctl_wrapper:
1805 llgfr %r5,%r5 # u32 1805 llgfr %r5,%r5 # u32
1806 llgfr %r6,%r6 # u32 1806 llgfr %r6,%r6 # u32
1807 jg compat_sys_keyctl # branch to system call 1807 jg compat_sys_keyctl # branch to system call
1808
1809 .globl compat_sys_preadv_wrapper
1810compat_sys_preadv_wrapper:
1811 llgfr %r2,%r2 # unsigned long
1812 llgtr %r3,%r3 # compat_iovec *
1813 llgfr %r4,%r4 # unsigned long
1814 llgfr %r5,%r5 # u32
1815 llgfr %r6,%r6 # u32
1816 jg compat_sys_preadv # branch to system call
1817
1818 .globl compat_sys_pwritev_wrapper
1819compat_sys_pwritev_wrapper:
1820 llgfr %r2,%r2 # unsigned long
1821 llgtr %r3,%r3 # compat_iovec *
1822 llgfr %r4,%r4 # unsigned long
1823 llgfr %r5,%r5 # u32
1824 llgfr %r6,%r6 # u32
1825 jg compat_sys_pwritev # branch to system call
diff --git a/arch/s390/kernel/early.c b/arch/s390/kernel/early.c
index 4d221c81c849..cf09948faad6 100644
--- a/arch/s390/kernel/early.c
+++ b/arch/s390/kernel/early.c
@@ -34,8 +34,25 @@
34 34
35char kernel_nss_name[NSS_NAME_SIZE + 1]; 35char kernel_nss_name[NSS_NAME_SIZE + 1];
36 36
37static unsigned long machine_flags;
38
37static void __init setup_boot_command_line(void); 39static void __init setup_boot_command_line(void);
38 40
41/*
42 * Get the TOD clock running.
43 */
44static void __init reset_tod_clock(void)
45{
46 u64 time;
47
48 if (store_clock(&time) == 0)
49 return;
50 /* TOD clock not running. Set the clock to Unix Epoch. */
51 if (set_clock(TOD_UNIX_EPOCH) != 0 || store_clock(&time) != 0)
52 disabled_wait(0);
53
54 sched_clock_base_cc = TOD_UNIX_EPOCH;
55}
39 56
40#ifdef CONFIG_SHARED_KERNEL 57#ifdef CONFIG_SHARED_KERNEL
41int __init savesys_ipl_nss(char *cmd, const int cmdlen); 58int __init savesys_ipl_nss(char *cmd, const int cmdlen);
@@ -370,6 +387,7 @@ static void __init setup_boot_command_line(void)
370 */ 387 */
371void __init startup_init(void) 388void __init startup_init(void)
372{ 389{
390 reset_tod_clock();
373 ipl_save_parameters(); 391 ipl_save_parameters();
374 rescue_initrd(); 392 rescue_initrd();
375 clear_bss_section(); 393 clear_bss_section();
@@ -391,5 +409,6 @@ void __init startup_init(void)
391 setup_hpage(); 409 setup_hpage();
392 sclp_facilities_detect(); 410 sclp_facilities_detect();
393 detect_memory_layout(memory_chunk); 411 detect_memory_layout(memory_chunk);
412 S390_lowcore.machine_flags = machine_flags;
394 lockdep_on(); 413 lockdep_on();
395} 414}
diff --git a/arch/s390/kernel/entry.S b/arch/s390/kernel/entry.S
index 1268aa2991bf..f3e275934213 100644
--- a/arch/s390/kernel/entry.S
+++ b/arch/s390/kernel/entry.S
@@ -837,16 +837,29 @@ mcck_return:
837 __CPUINIT 837 __CPUINIT
838 .globl restart_int_handler 838 .globl restart_int_handler
839restart_int_handler: 839restart_int_handler:
840 basr %r1,0
841restart_base:
842 spt restart_vtime-restart_base(%r1)
843 stck __LC_LAST_UPDATE_CLOCK
844 mvc __LC_LAST_UPDATE_TIMER(8),restart_vtime-restart_base(%r1)
845 mvc __LC_EXIT_TIMER(8),restart_vtime-restart_base(%r1)
840 l %r15,__LC_SAVE_AREA+60 # load ksp 846 l %r15,__LC_SAVE_AREA+60 # load ksp
841 lctl %c0,%c15,__LC_CREGS_SAVE_AREA # get new ctl regs 847 lctl %c0,%c15,__LC_CREGS_SAVE_AREA # get new ctl regs
842 lam %a0,%a15,__LC_AREGS_SAVE_AREA 848 lam %a0,%a15,__LC_AREGS_SAVE_AREA
843 lm %r6,%r15,__SF_GPRS(%r15) # load registers from clone 849 lm %r6,%r15,__SF_GPRS(%r15) # load registers from clone
850 l %r1,__LC_THREAD_INFO
851 mvc __LC_USER_TIMER(8),__TI_user_timer(%r1)
852 mvc __LC_SYSTEM_TIMER(8),__TI_system_timer(%r1)
853 xc __LC_STEAL_TIMER(8),__LC_STEAL_TIMER
844 stosm __SF_EMPTY(%r15),0x04 # now we can turn dat on 854 stosm __SF_EMPTY(%r15),0x04 # now we can turn dat on
845 basr %r14,0 855 basr %r14,0
846 l %r14,restart_addr-.(%r14) 856 l %r14,restart_addr-.(%r14)
847 br %r14 # branch to start_secondary 857 br %r14 # branch to start_secondary
848restart_addr: 858restart_addr:
849 .long start_secondary 859 .long start_secondary
860 .align 8
861restart_vtime:
862 .long 0x7fffffff,0xffffffff
850 .previous 863 .previous
851#else 864#else
852/* 865/*
diff --git a/arch/s390/kernel/entry64.S b/arch/s390/kernel/entry64.S
index c6fbde13971a..84a105838e03 100644
--- a/arch/s390/kernel/entry64.S
+++ b/arch/s390/kernel/entry64.S
@@ -831,14 +831,27 @@ mcck_return:
831 __CPUINIT 831 __CPUINIT
832 .globl restart_int_handler 832 .globl restart_int_handler
833restart_int_handler: 833restart_int_handler:
834 basr %r1,0
835restart_base:
836 spt restart_vtime-restart_base(%r1)
837 stck __LC_LAST_UPDATE_CLOCK
838 mvc __LC_LAST_UPDATE_TIMER(8),restart_vtime-restart_base(%r1)
839 mvc __LC_EXIT_TIMER(8),restart_vtime-restart_base(%r1)
834 lg %r15,__LC_SAVE_AREA+120 # load ksp 840 lg %r15,__LC_SAVE_AREA+120 # load ksp
835 lghi %r10,__LC_CREGS_SAVE_AREA 841 lghi %r10,__LC_CREGS_SAVE_AREA
836 lctlg %c0,%c15,0(%r10) # get new ctl regs 842 lctlg %c0,%c15,0(%r10) # get new ctl regs
837 lghi %r10,__LC_AREGS_SAVE_AREA 843 lghi %r10,__LC_AREGS_SAVE_AREA
838 lam %a0,%a15,0(%r10) 844 lam %a0,%a15,0(%r10)
839 lmg %r6,%r15,__SF_GPRS(%r15) # load registers from clone 845 lmg %r6,%r15,__SF_GPRS(%r15) # load registers from clone
846 lg %r1,__LC_THREAD_INFO
847 mvc __LC_USER_TIMER(8),__TI_user_timer(%r1)
848 mvc __LC_SYSTEM_TIMER(8),__TI_system_timer(%r1)
849 xc __LC_STEAL_TIMER(8),__LC_STEAL_TIMER
840 stosm __SF_EMPTY(%r15),0x04 # now we can turn dat on 850 stosm __SF_EMPTY(%r15),0x04 # now we can turn dat on
841 jg start_secondary 851 jg start_secondary
852 .align 8
853restart_vtime:
854 .long 0x7fffffff,0xffffffff
842 .previous 855 .previous
843#else 856#else
844/* 857/*
diff --git a/arch/s390/kernel/head.S b/arch/s390/kernel/head.S
index 1046c2c9f8d1..bba14494ee00 100644
--- a/arch/s390/kernel/head.S
+++ b/arch/s390/kernel/head.S
@@ -471,7 +471,12 @@ startup:basr %r13,0 # get base
471.LPG0: 471.LPG0:
472 xc 0x200(256),0x200 # partially clear lowcore 472 xc 0x200(256),0x200 # partially clear lowcore
473 xc 0x300(256),0x300 473 xc 0x300(256),0x300
474 474 l %r1,5f-.LPG0(%r13)
475 stck 0(%r1)
476 spt 6f-.LPG0(%r13)
477 mvc __LC_LAST_UPDATE_CLOCK(8),0(%r1)
478 mvc __LC_LAST_UPDATE_TIMER(8),6f-.LPG0(%r13)
479 mvc __LC_EXIT_TIMER(8),5f-.LPG0(%r13)
475#ifndef CONFIG_MARCH_G5 480#ifndef CONFIG_MARCH_G5
476 # check processor version against MARCH_{G5,Z900,Z990,Z9_109,Z10} 481 # check processor version against MARCH_{G5,Z900,Z990,Z9_109,Z10}
477 stidp __LC_CPUID # store cpuid 482 stidp __LC_CPUID # store cpuid
@@ -496,9 +501,13 @@ startup:basr %r13,0 # get base
496 brct %r0,0b 501 brct %r0,0b
497#endif 502#endif
498 503
499 l %r13,0f-.LPG0(%r13) 504 l %r13,4f-.LPG0(%r13)
500 b 0(%r13) 505 b 0(%r13)
5010: .long startup_continue 506 .align 4
5074: .long startup_continue
5085: .long sched_clock_base_cc
509 .align 8
5106: .long 0x7fffffff,0xffffffff
502 511
503# 512#
504# params at 10400 (setup.h) 513# params at 10400 (setup.h)
diff --git a/arch/s390/kernel/nmi.c b/arch/s390/kernel/nmi.c
index 4bfdc421d7e9..28cf196ba775 100644
--- a/arch/s390/kernel/nmi.c
+++ b/arch/s390/kernel/nmi.c
@@ -10,6 +10,7 @@
10 10
11#include <linux/init.h> 11#include <linux/init.h>
12#include <linux/errno.h> 12#include <linux/errno.h>
13#include <linux/hardirq.h>
13#include <linux/time.h> 14#include <linux/time.h>
14#include <linux/module.h> 15#include <linux/module.h>
15#include <asm/lowcore.h> 16#include <asm/lowcore.h>
@@ -253,7 +254,7 @@ void notrace s390_do_machine_check(struct pt_regs *regs)
253 struct mci *mci; 254 struct mci *mci;
254 int umode; 255 int umode;
255 256
256 lockdep_off(); 257 nmi_enter();
257 s390_idle_check(); 258 s390_idle_check();
258 259
259 mci = (struct mci *) &S390_lowcore.mcck_interruption_code; 260 mci = (struct mci *) &S390_lowcore.mcck_interruption_code;
@@ -363,7 +364,7 @@ void notrace s390_do_machine_check(struct pt_regs *regs)
363 mcck->warning = 1; 364 mcck->warning = 1;
364 set_thread_flag(TIF_MCCK_PENDING); 365 set_thread_flag(TIF_MCCK_PENDING);
365 } 366 }
366 lockdep_on(); 367 nmi_exit();
367} 368}
368 369
369static int __init machine_check_init(void) 370static int __init machine_check_init(void)
diff --git a/arch/s390/kernel/setup.c b/arch/s390/kernel/setup.c
index 06201b93cbbf..7402b6a39ead 100644
--- a/arch/s390/kernel/setup.c
+++ b/arch/s390/kernel/setup.c
@@ -82,9 +82,6 @@ EXPORT_SYMBOL(console_devno);
82unsigned int console_irq = -1; 82unsigned int console_irq = -1;
83EXPORT_SYMBOL(console_irq); 83EXPORT_SYMBOL(console_irq);
84 84
85unsigned long machine_flags;
86EXPORT_SYMBOL(machine_flags);
87
88unsigned long elf_hwcap = 0; 85unsigned long elf_hwcap = 0;
89char elf_platform[ELF_PLATFORM_SIZE]; 86char elf_platform[ELF_PLATFORM_SIZE];
90 87
@@ -426,6 +423,7 @@ setup_lowcore(void)
426 __alloc_bootmem(PAGE_SIZE, PAGE_SIZE, 0) + PAGE_SIZE; 423 __alloc_bootmem(PAGE_SIZE, PAGE_SIZE, 0) + PAGE_SIZE;
427 lc->current_task = (unsigned long) init_thread_union.thread_info.task; 424 lc->current_task = (unsigned long) init_thread_union.thread_info.task;
428 lc->thread_info = (unsigned long) &init_thread_union; 425 lc->thread_info = (unsigned long) &init_thread_union;
426 lc->machine_flags = S390_lowcore.machine_flags;
429#ifndef CONFIG_64BIT 427#ifndef CONFIG_64BIT
430 if (MACHINE_HAS_IEEE) { 428 if (MACHINE_HAS_IEEE) {
431 lc->extended_save_area_addr = (__u32) 429 lc->extended_save_area_addr = (__u32)
@@ -436,6 +434,14 @@ setup_lowcore(void)
436#else 434#else
437 lc->vdso_per_cpu_data = (unsigned long) &lc->paste[0]; 435 lc->vdso_per_cpu_data = (unsigned long) &lc->paste[0];
438#endif 436#endif
437 lc->sync_enter_timer = S390_lowcore.sync_enter_timer;
438 lc->async_enter_timer = S390_lowcore.async_enter_timer;
439 lc->exit_timer = S390_lowcore.exit_timer;
440 lc->user_timer = S390_lowcore.user_timer;
441 lc->system_timer = S390_lowcore.system_timer;
442 lc->steal_timer = S390_lowcore.steal_timer;
443 lc->last_update_timer = S390_lowcore.last_update_timer;
444 lc->last_update_clock = S390_lowcore.last_update_clock;
439 set_prefix((u32)(unsigned long) lc); 445 set_prefix((u32)(unsigned long) lc);
440 lowcore_ptr[0] = lc; 446 lowcore_ptr[0] = lc;
441} 447}
diff --git a/arch/s390/kernel/smp.c b/arch/s390/kernel/smp.c
index 006ed5016eb4..a985a3ba4401 100644
--- a/arch/s390/kernel/smp.c
+++ b/arch/s390/kernel/smp.c
@@ -571,6 +571,7 @@ int __cpuinit __cpu_up(unsigned int cpu)
571 cpu_lowcore->current_task = (unsigned long) idle; 571 cpu_lowcore->current_task = (unsigned long) idle;
572 cpu_lowcore->cpu_nr = cpu; 572 cpu_lowcore->cpu_nr = cpu;
573 cpu_lowcore->kernel_asce = S390_lowcore.kernel_asce; 573 cpu_lowcore->kernel_asce = S390_lowcore.kernel_asce;
574 cpu_lowcore->machine_flags = S390_lowcore.machine_flags;
574 eieio(); 575 eieio();
575 576
576 while (signal_processor(cpu, sigp_restart) == sigp_busy) 577 while (signal_processor(cpu, sigp_restart) == sigp_busy)
@@ -590,7 +591,8 @@ static int __init setup_possible_cpus(char *s)
590 int pcpus, cpu; 591 int pcpus, cpu;
591 592
592 pcpus = simple_strtoul(s, NULL, 0); 593 pcpus = simple_strtoul(s, NULL, 0);
593 for (cpu = 0; cpu < pcpus && cpu < nr_cpu_ids; cpu++) 594 init_cpu_possible(cpumask_of(0));
595 for (cpu = 1; cpu < pcpus && cpu < nr_cpu_ids; cpu++)
594 set_cpu_possible(cpu, true); 596 set_cpu_possible(cpu, true);
595 return 0; 597 return 0;
596} 598}
diff --git a/arch/s390/kernel/syscalls.S b/arch/s390/kernel/syscalls.S
index fe5b25a988ab..2c7739fe70b1 100644
--- a/arch/s390/kernel/syscalls.S
+++ b/arch/s390/kernel/syscalls.S
@@ -336,3 +336,5 @@ SYSCALL(sys_inotify_init1,sys_inotify_init1,sys_inotify_init1_wrapper)
336SYSCALL(sys_pipe2,sys_pipe2,sys_pipe2_wrapper) /* 325 */ 336SYSCALL(sys_pipe2,sys_pipe2,sys_pipe2_wrapper) /* 325 */
337SYSCALL(sys_dup3,sys_dup3,sys_dup3_wrapper) 337SYSCALL(sys_dup3,sys_dup3,sys_dup3_wrapper)
338SYSCALL(sys_epoll_create1,sys_epoll_create1,sys_epoll_create1_wrapper) 338SYSCALL(sys_epoll_create1,sys_epoll_create1,sys_epoll_create1_wrapper)
339SYSCALL(sys_preadv,sys_preadv,compat_sys_preadv_wrapper)
340SYSCALL(sys_pwritev,sys_pwritev,compat_sys_pwritev_wrapper)
diff --git a/arch/s390/kernel/time.c b/arch/s390/kernel/time.c
index f72d41068dc2..6ded50dfa75a 100644
--- a/arch/s390/kernel/time.c
+++ b/arch/s390/kernel/time.c
@@ -52,9 +52,6 @@
52#define USECS_PER_JIFFY ((unsigned long) 1000000/HZ) 52#define USECS_PER_JIFFY ((unsigned long) 1000000/HZ)
53#define CLK_TICKS_PER_JIFFY ((unsigned long) USECS_PER_JIFFY << 12) 53#define CLK_TICKS_PER_JIFFY ((unsigned long) USECS_PER_JIFFY << 12)
54 54
55/* The value of the TOD clock for 1.1.1970. */
56#define TOD_UNIX_EPOCH 0x7d91048bca000000ULL
57
58/* 55/*
59 * Create a small time difference between the timer interrupts 56 * Create a small time difference between the timer interrupts
60 * on the different cpus to avoid lock contention. 57 * on the different cpus to avoid lock contention.
@@ -63,9 +60,10 @@
63 60
64#define TICK_SIZE tick 61#define TICK_SIZE tick
65 62
63u64 sched_clock_base_cc = -1; /* Force to data section. */
64
66static ext_int_info_t ext_int_info_cc; 65static ext_int_info_t ext_int_info_cc;
67static ext_int_info_t ext_int_etr_cc; 66static ext_int_info_t ext_int_etr_cc;
68static u64 sched_clock_base_cc;
69 67
70static DEFINE_PER_CPU(struct clock_event_device, comparators); 68static DEFINE_PER_CPU(struct clock_event_device, comparators);
71 69
@@ -195,22 +193,12 @@ static void timing_alert_interrupt(__u16 code)
195static void etr_reset(void); 193static void etr_reset(void);
196static void stp_reset(void); 194static void stp_reset(void);
197 195
198/* 196unsigned long read_persistent_clock(void)
199 * Get the TOD clock running.
200 */
201static u64 __init reset_tod_clock(void)
202{ 197{
203 u64 time; 198 struct timespec ts;
204
205 etr_reset();
206 stp_reset();
207 if (store_clock(&time) == 0)
208 return time;
209 /* TOD clock not running. Set the clock to Unix Epoch. */
210 if (set_clock(TOD_UNIX_EPOCH) != 0 || store_clock(&time) != 0)
211 panic("TOD clock not operational.");
212 199
213 return TOD_UNIX_EPOCH; 200 tod_to_timeval(get_clock() - TOD_UNIX_EPOCH, &ts);
201 return ts.tv_sec;
214} 202}
215 203
216static cycle_t read_tod_clock(void) 204static cycle_t read_tod_clock(void)
@@ -265,12 +253,13 @@ void update_vsyscall_tz(void)
265 */ 253 */
266void __init time_init(void) 254void __init time_init(void)
267{ 255{
268 sched_clock_base_cc = reset_tod_clock(); 256 struct timespec ts;
257 unsigned long flags;
258 cycle_t now;
269 259
270 /* set xtime */ 260 /* Reset time synchronization interfaces. */
271 tod_to_timeval(sched_clock_base_cc - TOD_UNIX_EPOCH, &xtime); 261 etr_reset();
272 set_normalized_timespec(&wall_to_monotonic, 262 stp_reset();
273 -xtime.tv_sec, -xtime.tv_nsec);
274 263
275 /* request the clock comparator external interrupt */ 264 /* request the clock comparator external interrupt */
276 if (register_early_external_interrupt(0x1004, 265 if (register_early_external_interrupt(0x1004,
@@ -278,17 +267,38 @@ void __init time_init(void)
278 &ext_int_info_cc) != 0) 267 &ext_int_info_cc) != 0)
279 panic("Couldn't request external interrupt 0x1004"); 268 panic("Couldn't request external interrupt 0x1004");
280 269
281 if (clocksource_register(&clocksource_tod) != 0)
282 panic("Could not register TOD clock source");
283
284 /* request the timing alert external interrupt */ 270 /* request the timing alert external interrupt */
285 if (register_early_external_interrupt(0x1406, 271 if (register_early_external_interrupt(0x1406,
286 timing_alert_interrupt, 272 timing_alert_interrupt,
287 &ext_int_etr_cc) != 0) 273 &ext_int_etr_cc) != 0)
288 panic("Couldn't request external interrupt 0x1406"); 274 panic("Couldn't request external interrupt 0x1406");
289 275
276 if (clocksource_register(&clocksource_tod) != 0)
277 panic("Could not register TOD clock source");
278
279 /*
280 * The TOD clock is an accurate clock. The xtime should be
281 * initialized in a way that the difference between TOD and
282 * xtime is reasonably small. Too bad that timekeeping_init
283 * sets xtime.tv_nsec to zero. In addition the clock source
284 * change from the jiffies clock source to the TOD clock
285 * source add another error of up to 1/HZ second. The same
286 * function sets wall_to_monotonic to a value that is too
287 * small for /proc/uptime to be accurate.
288 * Reset xtime and wall_to_monotonic to sane values.
289 */
290 write_seqlock_irqsave(&xtime_lock, flags);
291 now = get_clock();
292 tod_to_timeval(now - TOD_UNIX_EPOCH, &xtime);
293 clocksource_tod.cycle_last = now;
294 clocksource_tod.raw_time = xtime;
295 tod_to_timeval(sched_clock_base_cc - TOD_UNIX_EPOCH, &ts);
296 set_normalized_timespec(&wall_to_monotonic, -ts.tv_sec, -ts.tv_nsec);
297 write_sequnlock_irqrestore(&xtime_lock, flags);
298
290 /* Enable TOD clock interrupts on the boot cpu. */ 299 /* Enable TOD clock interrupts on the boot cpu. */
291 init_cpu_timer(); 300 init_cpu_timer();
301
292 /* Enable cpu timer interrupts on the boot cpu. */ 302 /* Enable cpu timer interrupts on the boot cpu. */
293 vtime_init(); 303 vtime_init();
294} 304}
@@ -1423,6 +1433,7 @@ static void *stp_page;
1423static void stp_work_fn(struct work_struct *work); 1433static void stp_work_fn(struct work_struct *work);
1424static DEFINE_MUTEX(stp_work_mutex); 1434static DEFINE_MUTEX(stp_work_mutex);
1425static DECLARE_WORK(stp_work, stp_work_fn); 1435static DECLARE_WORK(stp_work, stp_work_fn);
1436static struct timer_list stp_timer;
1426 1437
1427static int __init early_parse_stp(char *p) 1438static int __init early_parse_stp(char *p)
1428{ 1439{
@@ -1454,10 +1465,16 @@ static void __init stp_reset(void)
1454 } 1465 }
1455} 1466}
1456 1467
1468static void stp_timeout(unsigned long dummy)
1469{
1470 queue_work(time_sync_wq, &stp_work);
1471}
1472
1457static int __init stp_init(void) 1473static int __init stp_init(void)
1458{ 1474{
1459 if (!test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags)) 1475 if (!test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
1460 return 0; 1476 return 0;
1477 setup_timer(&stp_timer, stp_timeout, 0UL);
1461 time_init_wq(); 1478 time_init_wq();
1462 if (!stp_online) 1479 if (!stp_online)
1463 return 0; 1480 return 0;
@@ -1565,6 +1582,7 @@ static void stp_work_fn(struct work_struct *work)
1565 1582
1566 if (!stp_online) { 1583 if (!stp_online) {
1567 chsc_sstpc(stp_page, STP_OP_CTRL, 0x0000); 1584 chsc_sstpc(stp_page, STP_OP_CTRL, 0x0000);
1585 del_timer_sync(&stp_timer);
1568 goto out_unlock; 1586 goto out_unlock;
1569 } 1587 }
1570 1588
@@ -1586,6 +1604,13 @@ static void stp_work_fn(struct work_struct *work)
1586 stop_machine(stp_sync_clock, &stp_sync, &cpu_online_map); 1604 stop_machine(stp_sync_clock, &stp_sync, &cpu_online_map);
1587 put_online_cpus(); 1605 put_online_cpus();
1588 1606
1607 if (!check_sync_clock())
1608 /*
1609 * There is a usable clock but the synchonization failed.
1610 * Retry after a second.
1611 */
1612 mod_timer(&stp_timer, jiffies + HZ);
1613
1589out_unlock: 1614out_unlock:
1590 mutex_unlock(&stp_work_mutex); 1615 mutex_unlock(&stp_work_mutex);
1591} 1616}
diff --git a/arch/s390/kernel/vtime.c b/arch/s390/kernel/vtime.c
index ecf0304e61c1..38ea92ff04f9 100644
--- a/arch/s390/kernel/vtime.c
+++ b/arch/s390/kernel/vtime.c
@@ -134,6 +134,8 @@ void vtime_start_cpu(void)
134 /* Account time spent with enabled wait psw loaded as idle time. */ 134 /* Account time spent with enabled wait psw loaded as idle time. */
135 idle_time = S390_lowcore.int_clock - idle->idle_enter; 135 idle_time = S390_lowcore.int_clock - idle->idle_enter;
136 account_idle_time(idle_time); 136 account_idle_time(idle_time);
137 S390_lowcore.steal_timer +=
138 idle->idle_enter - S390_lowcore.last_update_clock;
137 S390_lowcore.last_update_clock = S390_lowcore.int_clock; 139 S390_lowcore.last_update_clock = S390_lowcore.int_clock;
138 140
139 /* Account system time spent going idle. */ 141 /* Account system time spent going idle. */
@@ -425,17 +427,7 @@ void add_virt_timer_periodic(void *new)
425} 427}
426EXPORT_SYMBOL(add_virt_timer_periodic); 428EXPORT_SYMBOL(add_virt_timer_periodic);
427 429
428/* 430int __mod_vtimer(struct vtimer_list *timer, __u64 expires, int periodic)
429 * If we change a pending timer the function must be called on the CPU
430 * where the timer is running on, e.g. by smp_call_function_single()
431 *
432 * The original mod_timer adds the timer if it is not pending. For
433 * compatibility we do the same. The timer will be added on the current
434 * CPU as a oneshot timer.
435 *
436 * returns whether it has modified a pending timer (1) or not (0)
437 */
438int mod_virt_timer(struct vtimer_list *timer, __u64 expires)
439{ 431{
440 struct vtimer_queue *vq; 432 struct vtimer_queue *vq;
441 unsigned long flags; 433 unsigned long flags;
@@ -444,39 +436,35 @@ int mod_virt_timer(struct vtimer_list *timer, __u64 expires)
444 BUG_ON(!timer->function); 436 BUG_ON(!timer->function);
445 BUG_ON(!expires || expires > VTIMER_MAX_SLICE); 437 BUG_ON(!expires || expires > VTIMER_MAX_SLICE);
446 438
447 /*
448 * This is a common optimization triggered by the
449 * networking code - if the timer is re-modified
450 * to be the same thing then just return:
451 */
452 if (timer->expires == expires && vtimer_pending(timer)) 439 if (timer->expires == expires && vtimer_pending(timer))
453 return 1; 440 return 1;
454 441
455 cpu = get_cpu(); 442 cpu = get_cpu();
456 vq = &per_cpu(virt_cpu_timer, cpu); 443 vq = &per_cpu(virt_cpu_timer, cpu);
457 444
458 /* check if we run on the right CPU */
459 BUG_ON(timer->cpu != cpu);
460
461 /* disable interrupts before test if timer is pending */ 445 /* disable interrupts before test if timer is pending */
462 spin_lock_irqsave(&vq->lock, flags); 446 spin_lock_irqsave(&vq->lock, flags);
463 447
464 /* if timer isn't pending add it on the current CPU */ 448 /* if timer isn't pending add it on the current CPU */
465 if (!vtimer_pending(timer)) { 449 if (!vtimer_pending(timer)) {
466 spin_unlock_irqrestore(&vq->lock, flags); 450 spin_unlock_irqrestore(&vq->lock, flags);
467 /* we do not activate an interval timer with mod_virt_timer */ 451
468 timer->interval = 0; 452 if (periodic)
453 timer->interval = expires;
454 else
455 timer->interval = 0;
469 timer->expires = expires; 456 timer->expires = expires;
470 timer->cpu = cpu; 457 timer->cpu = cpu;
471 internal_add_vtimer(timer); 458 internal_add_vtimer(timer);
472 return 0; 459 return 0;
473 } 460 }
474 461
462 /* check if we run on the right CPU */
463 BUG_ON(timer->cpu != cpu);
464
475 list_del_init(&timer->entry); 465 list_del_init(&timer->entry);
476 timer->expires = expires; 466 timer->expires = expires;
477 467 if (periodic)
478 /* also change the interval if we have an interval timer */
479 if (timer->interval)
480 timer->interval = expires; 468 timer->interval = expires;
481 469
482 /* the timer can't expire anymore so we can release the lock */ 470 /* the timer can't expire anymore so we can release the lock */
@@ -484,9 +472,32 @@ int mod_virt_timer(struct vtimer_list *timer, __u64 expires)
484 internal_add_vtimer(timer); 472 internal_add_vtimer(timer);
485 return 1; 473 return 1;
486} 474}
475
476/*
477 * If we change a pending timer the function must be called on the CPU
478 * where the timer is running on.
479 *
480 * returns whether it has modified a pending timer (1) or not (0)
481 */
482int mod_virt_timer(struct vtimer_list *timer, __u64 expires)
483{
484 return __mod_vtimer(timer, expires, 0);
485}
487EXPORT_SYMBOL(mod_virt_timer); 486EXPORT_SYMBOL(mod_virt_timer);
488 487
489/* 488/*
489 * If we change a pending timer the function must be called on the CPU
490 * where the timer is running on.
491 *
492 * returns whether it has modified a pending timer (1) or not (0)
493 */
494int mod_virt_timer_periodic(struct vtimer_list *timer, __u64 expires)
495{
496 return __mod_vtimer(timer, expires, 1);
497}
498EXPORT_SYMBOL(mod_virt_timer_periodic);
499
500/*
490 * delete a virtual timer 501 * delete a virtual timer
491 * 502 *
492 * returns whether the deleted timer was pending (1) or not (0) 503 * returns whether the deleted timer was pending (1) or not (0)
@@ -516,16 +527,8 @@ EXPORT_SYMBOL(del_virt_timer);
516 */ 527 */
517void init_cpu_vtimer(void) 528void init_cpu_vtimer(void)
518{ 529{
519 struct thread_info *ti = current_thread_info();
520 struct vtimer_queue *vq; 530 struct vtimer_queue *vq;
521 531
522 S390_lowcore.user_timer = ti->user_timer;
523 S390_lowcore.system_timer = ti->system_timer;
524
525 /* kick the virtual timer */
526 asm volatile ("STCK %0" : "=m" (S390_lowcore.last_update_clock));
527 asm volatile ("STPT %0" : "=m" (S390_lowcore.last_update_timer));
528
529 /* initialize per cpu vtimer structure */ 532 /* initialize per cpu vtimer structure */
530 vq = &__get_cpu_var(virt_cpu_timer); 533 vq = &__get_cpu_var(virt_cpu_timer);
531 INIT_LIST_HEAD(&vq->list); 534 INIT_LIST_HEAD(&vq->list);
diff --git a/arch/sh/kernel/sys_sh.c b/arch/sh/kernel/sys_sh.c
index 58dfc02c7af1..e3a7e36639ef 100644
--- a/arch/sh/kernel/sys_sh.c
+++ b/arch/sh/kernel/sys_sh.c
@@ -63,6 +63,15 @@ asmlinkage long sys_mmap2(unsigned long addr, unsigned long len,
63 unsigned long prot, unsigned long flags, 63 unsigned long prot, unsigned long flags,
64 unsigned long fd, unsigned long pgoff) 64 unsigned long fd, unsigned long pgoff)
65{ 65{
66 /*
67 * The shift for mmap2 is constant, regardless of PAGE_SIZE
68 * setting.
69 */
70 if (pgoff & ((1 << (PAGE_SHIFT - 12)) - 1))
71 return -EINVAL;
72
73 pgoff >>= PAGE_SHIFT - 12;
74
66 return do_mmap2(addr, len, prot, flags, fd, pgoff); 75 return do_mmap2(addr, len, prot, flags, fd, pgoff);
67} 76}
68 77
diff --git a/arch/sparc/include/asm/atomic_32.h b/arch/sparc/include/asm/atomic_32.h
index ce465975a6a5..bb91b1248cd1 100644
--- a/arch/sparc/include/asm/atomic_32.h
+++ b/arch/sparc/include/asm/atomic_32.h
@@ -15,6 +15,8 @@
15 15
16#ifdef __KERNEL__ 16#ifdef __KERNEL__
17 17
18#include <asm/system.h>
19
18#define ATOMIC_INIT(i) { (i) } 20#define ATOMIC_INIT(i) { (i) }
19 21
20extern int __atomic_add_return(int, atomic_t *); 22extern int __atomic_add_return(int, atomic_t *);
diff --git a/arch/sparc/kernel/ldc.c b/arch/sparc/kernel/ldc.c
index 6ce5d2598a09..adf5f273868a 100644
--- a/arch/sparc/kernel/ldc.c
+++ b/arch/sparc/kernel/ldc.c
@@ -1183,8 +1183,7 @@ out_free_txq:
1183 free_queue(lp->tx_num_entries, lp->tx_base); 1183 free_queue(lp->tx_num_entries, lp->tx_base);
1184 1184
1185out_free_mssbuf: 1185out_free_mssbuf:
1186 if (mssbuf) 1186 kfree(mssbuf);
1187 kfree(mssbuf);
1188 1187
1189out_free_iommu: 1188out_free_iommu:
1190 ldc_iommu_release(lp); 1189 ldc_iommu_release(lp);
@@ -1217,8 +1216,7 @@ void ldc_free(struct ldc_channel *lp)
1217 1216
1218 hlist_del(&lp->list); 1217 hlist_del(&lp->list);
1219 1218
1220 if (lp->mssbuf) 1219 kfree(lp->mssbuf);
1221 kfree(lp->mssbuf);
1222 1220
1223 ldc_iommu_release(lp); 1221 ldc_iommu_release(lp);
1224 1222
diff --git a/arch/sparc/kernel/smp_64.c b/arch/sparc/kernel/smp_64.c
index 708e12a26b05..f7642e5a94db 100644
--- a/arch/sparc/kernel/smp_64.c
+++ b/arch/sparc/kernel/smp_64.c
@@ -118,9 +118,9 @@ void __cpuinit smp_callin(void)
118 while (!cpu_isset(cpuid, smp_commenced_mask)) 118 while (!cpu_isset(cpuid, smp_commenced_mask))
119 rmb(); 119 rmb();
120 120
121 ipi_call_lock(); 121 ipi_call_lock_irq();
122 cpu_set(cpuid, cpu_online_map); 122 cpu_set(cpuid, cpu_online_map);
123 ipi_call_unlock(); 123 ipi_call_unlock_irq();
124 124
125 /* idle thread is expected to have preempt disabled */ 125 /* idle thread is expected to have preempt disabled */
126 preempt_disable(); 126 preempt_disable();
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index bc25b9f5e4cd..c9086e6307a5 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -353,6 +353,7 @@ config X86_UV
353 bool "SGI Ultraviolet" 353 bool "SGI Ultraviolet"
354 depends on X86_64 354 depends on X86_64
355 depends on X86_EXTENDED_PLATFORM 355 depends on X86_EXTENDED_PLATFORM
356 depends on NUMA
356 select X86_X2APIC 357 select X86_X2APIC
357 ---help--- 358 ---help---
358 This option is needed in order to support SGI Ultraviolet systems. 359 This option is needed in order to support SGI Ultraviolet systems.
diff --git a/arch/x86/Kconfig.cpu b/arch/x86/Kconfig.cpu
index 924e156a85ab..8130334329c0 100644
--- a/arch/x86/Kconfig.cpu
+++ b/arch/x86/Kconfig.cpu
@@ -506,6 +506,7 @@ config X86_PTRACE_BTS
506 bool "Branch Trace Store" 506 bool "Branch Trace Store"
507 default y 507 default y
508 depends on X86_DEBUGCTLMSR 508 depends on X86_DEBUGCTLMSR
509 depends on BROKEN
509 ---help--- 510 ---help---
510 This adds a ptrace interface to the hardware's branch trace store. 511 This adds a ptrace interface to the hardware's branch trace store.
511 512
diff --git a/arch/x86/include/asm/pat.h b/arch/x86/include/asm/pat.h
index 2cd07b9422f4..7af14e512f97 100644
--- a/arch/x86/include/asm/pat.h
+++ b/arch/x86/include/asm/pat.h
@@ -18,9 +18,5 @@ extern int free_memtype(u64 start, u64 end);
18 18
19extern int kernel_map_sync_memtype(u64 base, unsigned long size, 19extern int kernel_map_sync_memtype(u64 base, unsigned long size,
20 unsigned long flag); 20 unsigned long flag);
21extern void map_devmem(unsigned long pfn, unsigned long size,
22 struct pgprot vma_prot);
23extern void unmap_devmem(unsigned long pfn, unsigned long size,
24 struct pgprot vma_prot);
25 21
26#endif /* _ASM_X86_PAT_H */ 22#endif /* _ASM_X86_PAT_H */
diff --git a/arch/x86/include/asm/uv/uv_mmrs.h b/arch/x86/include/asm/uv/uv_mmrs.h
index db68ac8a5ac2..2cae46c7c8a2 100644
--- a/arch/x86/include/asm/uv/uv_mmrs.h
+++ b/arch/x86/include/asm/uv/uv_mmrs.h
@@ -17,6 +17,11 @@
17/* ========================================================================= */ 17/* ========================================================================= */
18/* UVH_BAU_DATA_CONFIG */ 18/* UVH_BAU_DATA_CONFIG */
19/* ========================================================================= */ 19/* ========================================================================= */
20#define UVH_LB_BAU_MISC_CONTROL 0x320170UL
21#define UV_ENABLE_INTD_SOFT_ACK_MODE_SHIFT 15
22#define UV_INTD_SOFT_ACK_TIMEOUT_PERIOD_SHIFT 16
23#define UV_INTD_SOFT_ACK_TIMEOUT_PERIOD 0x000000000bUL
24/* 1011 timebase 7 (168millisec) * 3 ticks -> 500ms */
20#define UVH_BAU_DATA_CONFIG 0x61680UL 25#define UVH_BAU_DATA_CONFIG 0x61680UL
21#define UVH_BAU_DATA_CONFIG_32 0x0438 26#define UVH_BAU_DATA_CONFIG_32 0x0438
22 27
diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c b/arch/x86/kernel/apic/x2apic_uv_x.c
index 1248318436e8..de1a50af807b 100644
--- a/arch/x86/kernel/apic/x2apic_uv_x.c
+++ b/arch/x86/kernel/apic/x2apic_uv_x.c
@@ -549,7 +549,8 @@ void __init uv_system_init(void)
549 unsigned long gnode_upper, lowmem_redir_base, lowmem_redir_size; 549 unsigned long gnode_upper, lowmem_redir_base, lowmem_redir_size;
550 int bytes, nid, cpu, lcpu, pnode, blade, i, j, m_val, n_val; 550 int bytes, nid, cpu, lcpu, pnode, blade, i, j, m_val, n_val;
551 int max_pnode = 0; 551 int max_pnode = 0;
552 unsigned long mmr_base, present; 552 unsigned long mmr_base, present, paddr;
553 unsigned short pnode_mask;
553 554
554 map_low_mmrs(); 555 map_low_mmrs();
555 556
@@ -592,6 +593,7 @@ void __init uv_system_init(void)
592 } 593 }
593 } 594 }
594 595
596 pnode_mask = (1 << n_val) - 1;
595 node_id.v = uv_read_local_mmr(UVH_NODE_ID); 597 node_id.v = uv_read_local_mmr(UVH_NODE_ID);
596 gnode_upper = (((unsigned long)node_id.s.node_id) & 598 gnode_upper = (((unsigned long)node_id.s.node_id) &
597 ~((1 << n_val) - 1)) << m_val; 599 ~((1 << n_val) - 1)) << m_val;
@@ -615,7 +617,7 @@ void __init uv_system_init(void)
615 uv_cpu_hub_info(cpu)->numa_blade_id = blade; 617 uv_cpu_hub_info(cpu)->numa_blade_id = blade;
616 uv_cpu_hub_info(cpu)->blade_processor_id = lcpu; 618 uv_cpu_hub_info(cpu)->blade_processor_id = lcpu;
617 uv_cpu_hub_info(cpu)->pnode = pnode; 619 uv_cpu_hub_info(cpu)->pnode = pnode;
618 uv_cpu_hub_info(cpu)->pnode_mask = (1 << n_val) - 1; 620 uv_cpu_hub_info(cpu)->pnode_mask = pnode_mask;
619 uv_cpu_hub_info(cpu)->gpa_mask = (1 << (m_val + n_val)) - 1; 621 uv_cpu_hub_info(cpu)->gpa_mask = (1 << (m_val + n_val)) - 1;
620 uv_cpu_hub_info(cpu)->gnode_upper = gnode_upper; 622 uv_cpu_hub_info(cpu)->gnode_upper = gnode_upper;
621 uv_cpu_hub_info(cpu)->global_mmr_base = mmr_base; 623 uv_cpu_hub_info(cpu)->global_mmr_base = mmr_base;
@@ -631,6 +633,16 @@ void __init uv_system_init(void)
631 lcpu, blade); 633 lcpu, blade);
632 } 634 }
633 635
636 /* Add blade/pnode info for nodes without cpus */
637 for_each_online_node(nid) {
638 if (uv_node_to_blade[nid] >= 0)
639 continue;
640 paddr = node_start_pfn(nid) << PAGE_SHIFT;
641 pnode = (paddr >> m_val) & pnode_mask;
642 blade = boot_pnode_to_blade(pnode);
643 uv_node_to_blade[nid] = blade;
644 }
645
634 map_gru_high(max_pnode); 646 map_gru_high(max_pnode);
635 map_mmr_high(max_pnode); 647 map_mmr_high(max_pnode);
636 map_config_high(max_pnode); 648 map_config_high(max_pnode);
diff --git a/arch/x86/kernel/bios_uv.c b/arch/x86/kernel/bios_uv.c
index f63882728d91..63a88e1f987d 100644
--- a/arch/x86/kernel/bios_uv.c
+++ b/arch/x86/kernel/bios_uv.c
@@ -182,7 +182,8 @@ void uv_bios_init(void)
182 memcpy(&uv_systab, tab, sizeof(struct uv_systab)); 182 memcpy(&uv_systab, tab, sizeof(struct uv_systab));
183 iounmap(tab); 183 iounmap(tab);
184 184
185 printk(KERN_INFO "EFI UV System Table Revision %d\n", tab->revision); 185 printk(KERN_INFO "EFI UV System Table Revision %d\n",
186 uv_systab.revision);
186} 187}
187#else /* !CONFIG_EFI */ 188#else /* !CONFIG_EFI */
188 189
diff --git a/arch/x86/kernel/microcode_core.c b/arch/x86/kernel/microcode_core.c
index 2e0eb4140951..98c470c069d1 100644
--- a/arch/x86/kernel/microcode_core.c
+++ b/arch/x86/kernel/microcode_core.c
@@ -380,8 +380,6 @@ static int mc_sysdev_add(struct sys_device *sys_dev)
380 return err; 380 return err;
381 381
382 err = microcode_init_cpu(cpu); 382 err = microcode_init_cpu(cpu);
383 if (err)
384 sysfs_remove_group(&sys_dev->kobj, &mc_attr_group);
385 383
386 return err; 384 return err;
387} 385}
diff --git a/arch/x86/kernel/pci-swiotlb.c b/arch/x86/kernel/pci-swiotlb.c
index 34f12e9996ed..221a3853e268 100644
--- a/arch/x86/kernel/pci-swiotlb.c
+++ b/arch/x86/kernel/pci-swiotlb.c
@@ -50,7 +50,7 @@ static void *x86_swiotlb_alloc_coherent(struct device *hwdev, size_t size,
50 return swiotlb_alloc_coherent(hwdev, size, dma_handle, flags); 50 return swiotlb_alloc_coherent(hwdev, size, dma_handle, flags);
51} 51}
52 52
53struct dma_map_ops swiotlb_dma_ops = { 53static struct dma_map_ops swiotlb_dma_ops = {
54 .mapping_error = swiotlb_dma_mapping_error, 54 .mapping_error = swiotlb_dma_mapping_error,
55 .alloc_coherent = x86_swiotlb_alloc_coherent, 55 .alloc_coherent = x86_swiotlb_alloc_coherent,
56 .free_coherent = swiotlb_free_coherent, 56 .free_coherent = swiotlb_free_coherent,
diff --git a/arch/x86/kernel/tlb_uv.c b/arch/x86/kernel/tlb_uv.c
index deb5ebb32c3b..ed0c33761e6d 100644
--- a/arch/x86/kernel/tlb_uv.c
+++ b/arch/x86/kernel/tlb_uv.c
@@ -25,6 +25,8 @@ static int uv_bau_retry_limit __read_mostly;
25 25
26/* position of pnode (which is nasid>>1): */ 26/* position of pnode (which is nasid>>1): */
27static int uv_nshift __read_mostly; 27static int uv_nshift __read_mostly;
28/* base pnode in this partition */
29static int uv_partition_base_pnode __read_mostly;
28 30
29static unsigned long uv_mmask __read_mostly; 31static unsigned long uv_mmask __read_mostly;
30 32
@@ -32,6 +34,34 @@ static DEFINE_PER_CPU(struct ptc_stats, ptcstats);
32static DEFINE_PER_CPU(struct bau_control, bau_control); 34static DEFINE_PER_CPU(struct bau_control, bau_control);
33 35
34/* 36/*
37 * Determine the first node on a blade.
38 */
39static int __init blade_to_first_node(int blade)
40{
41 int node, b;
42
43 for_each_online_node(node) {
44 b = uv_node_to_blade_id(node);
45 if (blade == b)
46 return node;
47 }
48 return -1; /* shouldn't happen */
49}
50
51/*
52 * Determine the apicid of the first cpu on a blade.
53 */
54static int __init blade_to_first_apicid(int blade)
55{
56 int cpu;
57
58 for_each_present_cpu(cpu)
59 if (blade == uv_cpu_to_blade_id(cpu))
60 return per_cpu(x86_cpu_to_apicid, cpu);
61 return -1;
62}
63
64/*
35 * Free a software acknowledge hardware resource by clearing its Pending 65 * Free a software acknowledge hardware resource by clearing its Pending
36 * bit. This will return a reply to the sender. 66 * bit. This will return a reply to the sender.
37 * If the message has timed out, a reply has already been sent by the 67 * If the message has timed out, a reply has already been sent by the
@@ -67,7 +97,7 @@ static void uv_bau_process_message(struct bau_payload_queue_entry *msg,
67 msp = __get_cpu_var(bau_control).msg_statuses + msg_slot; 97 msp = __get_cpu_var(bau_control).msg_statuses + msg_slot;
68 cpu = uv_blade_processor_id(); 98 cpu = uv_blade_processor_id();
69 msg->number_of_cpus = 99 msg->number_of_cpus =
70 uv_blade_nr_online_cpus(uv_node_to_blade_id(numa_node_id())); 100 uv_blade_nr_online_cpus(uv_node_to_blade_id(numa_node_id()));
71 this_cpu_mask = 1UL << cpu; 101 this_cpu_mask = 1UL << cpu;
72 if (msp->seen_by.bits & this_cpu_mask) 102 if (msp->seen_by.bits & this_cpu_mask)
73 return; 103 return;
@@ -215,14 +245,14 @@ static int uv_wait_completion(struct bau_desc *bau_desc,
215 * Returns @flush_mask if some remote flushing remains to be done. The 245 * Returns @flush_mask if some remote flushing remains to be done. The
216 * mask will have some bits still set. 246 * mask will have some bits still set.
217 */ 247 */
218const struct cpumask *uv_flush_send_and_wait(int cpu, int this_blade, 248const struct cpumask *uv_flush_send_and_wait(int cpu, int this_pnode,
219 struct bau_desc *bau_desc, 249 struct bau_desc *bau_desc,
220 struct cpumask *flush_mask) 250 struct cpumask *flush_mask)
221{ 251{
222 int completion_status = 0; 252 int completion_status = 0;
223 int right_shift; 253 int right_shift;
224 int tries = 0; 254 int tries = 0;
225 int blade; 255 int pnode;
226 int bit; 256 int bit;
227 unsigned long mmr_offset; 257 unsigned long mmr_offset;
228 unsigned long index; 258 unsigned long index;
@@ -265,8 +295,8 @@ const struct cpumask *uv_flush_send_and_wait(int cpu, int this_blade,
265 * use the IPI method of shootdown on them. 295 * use the IPI method of shootdown on them.
266 */ 296 */
267 for_each_cpu(bit, flush_mask) { 297 for_each_cpu(bit, flush_mask) {
268 blade = uv_cpu_to_blade_id(bit); 298 pnode = uv_cpu_to_pnode(bit);
269 if (blade == this_blade) 299 if (pnode == this_pnode)
270 continue; 300 continue;
271 cpumask_clear_cpu(bit, flush_mask); 301 cpumask_clear_cpu(bit, flush_mask);
272 } 302 }
@@ -309,16 +339,16 @@ const struct cpumask *uv_flush_tlb_others(const struct cpumask *cpumask,
309 struct cpumask *flush_mask = __get_cpu_var(uv_flush_tlb_mask); 339 struct cpumask *flush_mask = __get_cpu_var(uv_flush_tlb_mask);
310 int i; 340 int i;
311 int bit; 341 int bit;
312 int blade; 342 int pnode;
313 int uv_cpu; 343 int uv_cpu;
314 int this_blade; 344 int this_pnode;
315 int locals = 0; 345 int locals = 0;
316 struct bau_desc *bau_desc; 346 struct bau_desc *bau_desc;
317 347
318 cpumask_andnot(flush_mask, cpumask, cpumask_of(cpu)); 348 cpumask_andnot(flush_mask, cpumask, cpumask_of(cpu));
319 349
320 uv_cpu = uv_blade_processor_id(); 350 uv_cpu = uv_blade_processor_id();
321 this_blade = uv_numa_blade_id(); 351 this_pnode = uv_hub_info->pnode;
322 bau_desc = __get_cpu_var(bau_control).descriptor_base; 352 bau_desc = __get_cpu_var(bau_control).descriptor_base;
323 bau_desc += UV_ITEMS_PER_DESCRIPTOR * uv_cpu; 353 bau_desc += UV_ITEMS_PER_DESCRIPTOR * uv_cpu;
324 354
@@ -326,13 +356,14 @@ const struct cpumask *uv_flush_tlb_others(const struct cpumask *cpumask,
326 356
327 i = 0; 357 i = 0;
328 for_each_cpu(bit, flush_mask) { 358 for_each_cpu(bit, flush_mask) {
329 blade = uv_cpu_to_blade_id(bit); 359 pnode = uv_cpu_to_pnode(bit);
330 BUG_ON(blade > (UV_DISTRIBUTION_SIZE - 1)); 360 BUG_ON(pnode > (UV_DISTRIBUTION_SIZE - 1));
331 if (blade == this_blade) { 361 if (pnode == this_pnode) {
332 locals++; 362 locals++;
333 continue; 363 continue;
334 } 364 }
335 bau_node_set(blade, &bau_desc->distribution); 365 bau_node_set(pnode - uv_partition_base_pnode,
366 &bau_desc->distribution);
336 i++; 367 i++;
337 } 368 }
338 if (i == 0) { 369 if (i == 0) {
@@ -350,7 +381,7 @@ const struct cpumask *uv_flush_tlb_others(const struct cpumask *cpumask,
350 bau_desc->payload.address = va; 381 bau_desc->payload.address = va;
351 bau_desc->payload.sending_cpu = cpu; 382 bau_desc->payload.sending_cpu = cpu;
352 383
353 return uv_flush_send_and_wait(uv_cpu, this_blade, bau_desc, flush_mask); 384 return uv_flush_send_and_wait(uv_cpu, this_pnode, bau_desc, flush_mask);
354} 385}
355 386
356/* 387/*
@@ -418,24 +449,58 @@ void uv_bau_message_interrupt(struct pt_regs *regs)
418 set_irq_regs(old_regs); 449 set_irq_regs(old_regs);
419} 450}
420 451
452/*
453 * uv_enable_timeouts
454 *
455 * Each target blade (i.e. blades that have cpu's) needs to have
456 * shootdown message timeouts enabled. The timeout does not cause
457 * an interrupt, but causes an error message to be returned to
458 * the sender.
459 */
421static void uv_enable_timeouts(void) 460static void uv_enable_timeouts(void)
422{ 461{
423 int i;
424 int blade; 462 int blade;
425 int last_blade; 463 int nblades;
426 int pnode; 464 int pnode;
427 int cur_cpu = 0; 465 unsigned long mmr_image;
428 unsigned long apicid;
429 466
430 last_blade = -1; 467 nblades = uv_num_possible_blades();
431 for_each_online_node(i) { 468
432 blade = uv_node_to_blade_id(i); 469 for (blade = 0; blade < nblades; blade++) {
433 if (blade == last_blade) 470 if (!uv_blade_nr_possible_cpus(blade))
434 continue; 471 continue;
435 last_blade = blade; 472
436 apicid = per_cpu(x86_cpu_to_apicid, cur_cpu);
437 pnode = uv_blade_to_pnode(blade); 473 pnode = uv_blade_to_pnode(blade);
438 cur_cpu += uv_blade_nr_possible_cpus(i); 474 mmr_image =
475 uv_read_global_mmr64(pnode, UVH_LB_BAU_MISC_CONTROL);
476 /*
477 * Set the timeout period and then lock it in, in three
478 * steps; captures and locks in the period.
479 *
480 * To program the period, the SOFT_ACK_MODE must be off.
481 */
482 mmr_image &= ~((unsigned long)1 <<
483 UV_ENABLE_INTD_SOFT_ACK_MODE_SHIFT);
484 uv_write_global_mmr64
485 (pnode, UVH_LB_BAU_MISC_CONTROL, mmr_image);
486 /*
487 * Set the 4-bit period.
488 */
489 mmr_image &= ~((unsigned long)0xf <<
490 UV_INTD_SOFT_ACK_TIMEOUT_PERIOD_SHIFT);
491 mmr_image |= (UV_INTD_SOFT_ACK_TIMEOUT_PERIOD <<
492 UV_INTD_SOFT_ACK_TIMEOUT_PERIOD_SHIFT);
493 uv_write_global_mmr64
494 (pnode, UVH_LB_BAU_MISC_CONTROL, mmr_image);
495 /*
496 * Subsequent reversals of the timebase bit (3) cause an
497 * immediate timeout of one or all INTD resources as
498 * indicated in bits 2:0 (7 causes all of them to timeout).
499 */
500 mmr_image |= ((unsigned long)1 <<
501 UV_ENABLE_INTD_SOFT_ACK_MODE_SHIFT);
502 uv_write_global_mmr64
503 (pnode, UVH_LB_BAU_MISC_CONTROL, mmr_image);
439 } 504 }
440} 505}
441 506
@@ -482,8 +547,7 @@ static int uv_ptc_seq_show(struct seq_file *file, void *data)
482 stat->requestee, stat->onetlb, stat->alltlb, 547 stat->requestee, stat->onetlb, stat->alltlb,
483 stat->s_retry, stat->d_retry, stat->ptc_i); 548 stat->s_retry, stat->d_retry, stat->ptc_i);
484 seq_printf(file, "%lx %ld %ld %ld %ld %ld %ld\n", 549 seq_printf(file, "%lx %ld %ld %ld %ld %ld %ld\n",
485 uv_read_global_mmr64(uv_blade_to_pnode 550 uv_read_global_mmr64(uv_cpu_to_pnode(cpu),
486 (uv_cpu_to_blade_id(cpu)),
487 UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE), 551 UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE),
488 stat->sflush, stat->dflush, 552 stat->sflush, stat->dflush,
489 stat->retriesok, stat->nomsg, 553 stat->retriesok, stat->nomsg,
@@ -617,16 +681,18 @@ static struct bau_control * __init uv_table_bases_init(int blade, int node)
617 * finish the initialization of the per-blade control structures 681 * finish the initialization of the per-blade control structures
618 */ 682 */
619static void __init 683static void __init
620uv_table_bases_finish(int blade, int node, int cur_cpu, 684uv_table_bases_finish(int blade,
621 struct bau_control *bau_tablesp, 685 struct bau_control *bau_tablesp,
622 struct bau_desc *adp) 686 struct bau_desc *adp)
623{ 687{
624 struct bau_control *bcp; 688 struct bau_control *bcp;
625 int i; 689 int cpu;
626 690
627 for (i = cur_cpu; i < cur_cpu + uv_blade_nr_possible_cpus(blade); i++) { 691 for_each_present_cpu(cpu) {
628 bcp = (struct bau_control *)&per_cpu(bau_control, i); 692 if (blade != uv_cpu_to_blade_id(cpu))
693 continue;
629 694
695 bcp = (struct bau_control *)&per_cpu(bau_control, cpu);
630 bcp->bau_msg_head = bau_tablesp->va_queue_first; 696 bcp->bau_msg_head = bau_tablesp->va_queue_first;
631 bcp->va_queue_first = bau_tablesp->va_queue_first; 697 bcp->va_queue_first = bau_tablesp->va_queue_first;
632 bcp->va_queue_last = bau_tablesp->va_queue_last; 698 bcp->va_queue_last = bau_tablesp->va_queue_last;
@@ -649,11 +715,10 @@ uv_activation_descriptor_init(int node, int pnode)
649 struct bau_desc *adp; 715 struct bau_desc *adp;
650 struct bau_desc *ad2; 716 struct bau_desc *ad2;
651 717
652 adp = (struct bau_desc *) 718 adp = (struct bau_desc *)kmalloc_node(16384, GFP_KERNEL, node);
653 kmalloc_node(16384, GFP_KERNEL, node);
654 BUG_ON(!adp); 719 BUG_ON(!adp);
655 720
656 pa = __pa((unsigned long)adp); 721 pa = uv_gpa(adp); /* need the real nasid*/
657 n = pa >> uv_nshift; 722 n = pa >> uv_nshift;
658 m = pa & uv_mmask; 723 m = pa & uv_mmask;
659 724
@@ -667,8 +732,12 @@ uv_activation_descriptor_init(int node, int pnode)
667 for (i = 0, ad2 = adp; i < UV_ACTIVATION_DESCRIPTOR_SIZE; i++, ad2++) { 732 for (i = 0, ad2 = adp; i < UV_ACTIVATION_DESCRIPTOR_SIZE; i++, ad2++) {
668 memset(ad2, 0, sizeof(struct bau_desc)); 733 memset(ad2, 0, sizeof(struct bau_desc));
669 ad2->header.sw_ack_flag = 1; 734 ad2->header.sw_ack_flag = 1;
670 ad2->header.base_dest_nodeid = 735 /*
671 uv_blade_to_pnode(uv_cpu_to_blade_id(0)); 736 * base_dest_nodeid is the first node in the partition, so
737 * the bit map will indicate partition-relative node numbers.
738 * note that base_dest_nodeid is actually a nasid.
739 */
740 ad2->header.base_dest_nodeid = uv_partition_base_pnode << 1;
672 ad2->header.command = UV_NET_ENDPOINT_INTD; 741 ad2->header.command = UV_NET_ENDPOINT_INTD;
673 ad2->header.int_both = 1; 742 ad2->header.int_both = 1;
674 /* 743 /*
@@ -686,6 +755,8 @@ static struct bau_payload_queue_entry * __init
686uv_payload_queue_init(int node, int pnode, struct bau_control *bau_tablesp) 755uv_payload_queue_init(int node, int pnode, struct bau_control *bau_tablesp)
687{ 756{
688 struct bau_payload_queue_entry *pqp; 757 struct bau_payload_queue_entry *pqp;
758 unsigned long pa;
759 int pn;
689 char *cp; 760 char *cp;
690 761
691 pqp = (struct bau_payload_queue_entry *) kmalloc_node( 762 pqp = (struct bau_payload_queue_entry *) kmalloc_node(
@@ -696,10 +767,14 @@ uv_payload_queue_init(int node, int pnode, struct bau_control *bau_tablesp)
696 cp = (char *)pqp + 31; 767 cp = (char *)pqp + 31;
697 pqp = (struct bau_payload_queue_entry *)(((unsigned long)cp >> 5) << 5); 768 pqp = (struct bau_payload_queue_entry *)(((unsigned long)cp >> 5) << 5);
698 bau_tablesp->va_queue_first = pqp; 769 bau_tablesp->va_queue_first = pqp;
770 /*
771 * need the pnode of where the memory was really allocated
772 */
773 pa = uv_gpa(pqp);
774 pn = pa >> uv_nshift;
699 uv_write_global_mmr64(pnode, 775 uv_write_global_mmr64(pnode,
700 UVH_LB_BAU_INTD_PAYLOAD_QUEUE_FIRST, 776 UVH_LB_BAU_INTD_PAYLOAD_QUEUE_FIRST,
701 ((unsigned long)pnode << 777 ((unsigned long)pn << UV_PAYLOADQ_PNODE_SHIFT) |
702 UV_PAYLOADQ_PNODE_SHIFT) |
703 uv_physnodeaddr(pqp)); 778 uv_physnodeaddr(pqp));
704 uv_write_global_mmr64(pnode, UVH_LB_BAU_INTD_PAYLOAD_QUEUE_TAIL, 779 uv_write_global_mmr64(pnode, UVH_LB_BAU_INTD_PAYLOAD_QUEUE_TAIL,
705 uv_physnodeaddr(pqp)); 780 uv_physnodeaddr(pqp));
@@ -715,8 +790,9 @@ uv_payload_queue_init(int node, int pnode, struct bau_control *bau_tablesp)
715/* 790/*
716 * Initialization of each UV blade's structures 791 * Initialization of each UV blade's structures
717 */ 792 */
718static int __init uv_init_blade(int blade, int node, int cur_cpu) 793static int __init uv_init_blade(int blade)
719{ 794{
795 int node;
720 int pnode; 796 int pnode;
721 unsigned long pa; 797 unsigned long pa;
722 unsigned long apicid; 798 unsigned long apicid;
@@ -724,16 +800,17 @@ static int __init uv_init_blade(int blade, int node, int cur_cpu)
724 struct bau_payload_queue_entry *pqp; 800 struct bau_payload_queue_entry *pqp;
725 struct bau_control *bau_tablesp; 801 struct bau_control *bau_tablesp;
726 802
803 node = blade_to_first_node(blade);
727 bau_tablesp = uv_table_bases_init(blade, node); 804 bau_tablesp = uv_table_bases_init(blade, node);
728 pnode = uv_blade_to_pnode(blade); 805 pnode = uv_blade_to_pnode(blade);
729 adp = uv_activation_descriptor_init(node, pnode); 806 adp = uv_activation_descriptor_init(node, pnode);
730 pqp = uv_payload_queue_init(node, pnode, bau_tablesp); 807 pqp = uv_payload_queue_init(node, pnode, bau_tablesp);
731 uv_table_bases_finish(blade, node, cur_cpu, bau_tablesp, adp); 808 uv_table_bases_finish(blade, bau_tablesp, adp);
732 /* 809 /*
733 * the below initialization can't be in firmware because the 810 * the below initialization can't be in firmware because the
734 * messaging IRQ will be determined by the OS 811 * messaging IRQ will be determined by the OS
735 */ 812 */
736 apicid = per_cpu(x86_cpu_to_apicid, cur_cpu); 813 apicid = blade_to_first_apicid(blade);
737 pa = uv_read_global_mmr64(pnode, UVH_BAU_DATA_CONFIG); 814 pa = uv_read_global_mmr64(pnode, UVH_BAU_DATA_CONFIG);
738 if ((pa & 0xff) != UV_BAU_MESSAGE) { 815 if ((pa & 0xff) != UV_BAU_MESSAGE) {
739 uv_write_global_mmr64(pnode, UVH_BAU_DATA_CONFIG, 816 uv_write_global_mmr64(pnode, UVH_BAU_DATA_CONFIG,
@@ -748,9 +825,7 @@ static int __init uv_init_blade(int blade, int node, int cur_cpu)
748static int __init uv_bau_init(void) 825static int __init uv_bau_init(void)
749{ 826{
750 int blade; 827 int blade;
751 int node;
752 int nblades; 828 int nblades;
753 int last_blade;
754 int cur_cpu; 829 int cur_cpu;
755 830
756 if (!is_uv_system()) 831 if (!is_uv_system())
@@ -763,29 +838,21 @@ static int __init uv_bau_init(void)
763 uv_bau_retry_limit = 1; 838 uv_bau_retry_limit = 1;
764 uv_nshift = uv_hub_info->n_val; 839 uv_nshift = uv_hub_info->n_val;
765 uv_mmask = (1UL << uv_hub_info->n_val) - 1; 840 uv_mmask = (1UL << uv_hub_info->n_val) - 1;
766 nblades = 0; 841 nblades = uv_num_possible_blades();
767 last_blade = -1; 842
768 cur_cpu = 0;
769 for_each_online_node(node) {
770 blade = uv_node_to_blade_id(node);
771 if (blade == last_blade)
772 continue;
773 last_blade = blade;
774 nblades++;
775 }
776 uv_bau_table_bases = (struct bau_control **) 843 uv_bau_table_bases = (struct bau_control **)
777 kmalloc(nblades * sizeof(struct bau_control *), GFP_KERNEL); 844 kmalloc(nblades * sizeof(struct bau_control *), GFP_KERNEL);
778 BUG_ON(!uv_bau_table_bases); 845 BUG_ON(!uv_bau_table_bases);
779 846
780 last_blade = -1; 847 uv_partition_base_pnode = 0x7fffffff;
781 for_each_online_node(node) { 848 for (blade = 0; blade < nblades; blade++)
782 blade = uv_node_to_blade_id(node); 849 if (uv_blade_nr_possible_cpus(blade) &&
783 if (blade == last_blade) 850 (uv_blade_to_pnode(blade) < uv_partition_base_pnode))
784 continue; 851 uv_partition_base_pnode = uv_blade_to_pnode(blade);
785 last_blade = blade; 852 for (blade = 0; blade < nblades; blade++)
786 uv_init_blade(blade, node, cur_cpu); 853 if (uv_blade_nr_possible_cpus(blade))
787 cur_cpu += uv_blade_nr_possible_cpus(blade); 854 uv_init_blade(blade);
788 } 855
789 alloc_intr_gate(UV_BAU_MESSAGE, uv_bau_message_intr1); 856 alloc_intr_gate(UV_BAU_MESSAGE, uv_bau_message_intr1);
790 uv_enable_timeouts(); 857 uv_enable_timeouts();
791 858
diff --git a/arch/x86/kernel/uv_sysfs.c b/arch/x86/kernel/uv_sysfs.c
index 67f9b9dbf800..36afb98675a4 100644
--- a/arch/x86/kernel/uv_sysfs.c
+++ b/arch/x86/kernel/uv_sysfs.c
@@ -21,6 +21,7 @@
21 21
22#include <linux/sysdev.h> 22#include <linux/sysdev.h>
23#include <asm/uv/bios.h> 23#include <asm/uv/bios.h>
24#include <asm/uv/uv.h>
24 25
25struct kobject *sgi_uv_kobj; 26struct kobject *sgi_uv_kobj;
26 27
@@ -47,6 +48,9 @@ static int __init sgi_uv_sysfs_init(void)
47{ 48{
48 unsigned long ret; 49 unsigned long ret;
49 50
51 if (!is_uv_system())
52 return -ENODEV;
53
50 if (!sgi_uv_kobj) 54 if (!sgi_uv_kobj)
51 sgi_uv_kobj = kobject_create_and_add("sgi_uv", firmware_kobj); 55 sgi_uv_kobj = kobject_create_and_add("sgi_uv", firmware_kobj);
52 if (!sgi_uv_kobj) { 56 if (!sgi_uv_kobj) {
diff --git a/arch/x86/mm/ioremap.c b/arch/x86/mm/ioremap.c
index 09daebfdb11c..8a450930834f 100644
--- a/arch/x86/mm/ioremap.c
+++ b/arch/x86/mm/ioremap.c
@@ -280,15 +280,16 @@ static void __iomem *__ioremap_caller(resource_size_t phys_addr,
280 return NULL; 280 return NULL;
281 area->phys_addr = phys_addr; 281 area->phys_addr = phys_addr;
282 vaddr = (unsigned long) area->addr; 282 vaddr = (unsigned long) area->addr;
283 if (ioremap_page_range(vaddr, vaddr + size, phys_addr, prot)) { 283
284 if (kernel_map_sync_memtype(phys_addr, size, prot_val)) {
284 free_memtype(phys_addr, phys_addr + size); 285 free_memtype(phys_addr, phys_addr + size);
285 free_vm_area(area); 286 free_vm_area(area);
286 return NULL; 287 return NULL;
287 } 288 }
288 289
289 if (ioremap_change_attr(vaddr, size, prot_val) < 0) { 290 if (ioremap_page_range(vaddr, vaddr + size, phys_addr, prot)) {
290 free_memtype(phys_addr, phys_addr + size); 291 free_memtype(phys_addr, phys_addr + size);
291 vunmap(area->addr); 292 free_vm_area(area);
292 return NULL; 293 return NULL;
293 } 294 }
294 295
@@ -374,7 +375,8 @@ static void __iomem *ioremap_default(resource_size_t phys_addr,
374 * - UC_MINUS for non-WB-able memory with no other conflicting mappings 375 * - UC_MINUS for non-WB-able memory with no other conflicting mappings
375 * - Inherit from confliting mappings otherwise 376 * - Inherit from confliting mappings otherwise
376 */ 377 */
377 err = reserve_memtype(phys_addr, phys_addr + size, -1, &flags); 378 err = reserve_memtype(phys_addr, phys_addr + size,
379 _PAGE_CACHE_WB, &flags);
378 if (err < 0) 380 if (err < 0)
379 return NULL; 381 return NULL;
380 382
diff --git a/arch/x86/mm/pageattr.c b/arch/x86/mm/pageattr.c
index d71e1b636ce6..797f9f107cb6 100644
--- a/arch/x86/mm/pageattr.c
+++ b/arch/x86/mm/pageattr.c
@@ -945,71 +945,94 @@ int _set_memory_uc(unsigned long addr, int numpages)
945 945
946int set_memory_uc(unsigned long addr, int numpages) 946int set_memory_uc(unsigned long addr, int numpages)
947{ 947{
948 int ret;
949
948 /* 950 /*
949 * for now UC MINUS. see comments in ioremap_nocache() 951 * for now UC MINUS. see comments in ioremap_nocache()
950 */ 952 */
951 if (reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE, 953 ret = reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE,
952 _PAGE_CACHE_UC_MINUS, NULL)) 954 _PAGE_CACHE_UC_MINUS, NULL);
953 return -EINVAL; 955 if (ret)
956 goto out_err;
957
958 ret = _set_memory_uc(addr, numpages);
959 if (ret)
960 goto out_free;
954 961
955 return _set_memory_uc(addr, numpages); 962 return 0;
963
964out_free:
965 free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
966out_err:
967 return ret;
956} 968}
957EXPORT_SYMBOL(set_memory_uc); 969EXPORT_SYMBOL(set_memory_uc);
958 970
959int set_memory_array_uc(unsigned long *addr, int addrinarray) 971int set_memory_array_uc(unsigned long *addr, int addrinarray)
960{ 972{
961 unsigned long start; 973 int i, j;
962 unsigned long end; 974 int ret;
963 int i; 975
964 /* 976 /*
965 * for now UC MINUS. see comments in ioremap_nocache() 977 * for now UC MINUS. see comments in ioremap_nocache()
966 */ 978 */
967 for (i = 0; i < addrinarray; i++) { 979 for (i = 0; i < addrinarray; i++) {
968 start = __pa(addr[i]); 980 ret = reserve_memtype(__pa(addr[i]), __pa(addr[i]) + PAGE_SIZE,
969 for (end = start + PAGE_SIZE; i < addrinarray - 1; end += PAGE_SIZE) { 981 _PAGE_CACHE_UC_MINUS, NULL);
970 if (end != __pa(addr[i + 1])) 982 if (ret)
971 break; 983 goto out_free;
972 i++;
973 }
974 if (reserve_memtype(start, end, _PAGE_CACHE_UC_MINUS, NULL))
975 goto out;
976 } 984 }
977 985
978 return change_page_attr_set(addr, addrinarray, 986 ret = change_page_attr_set(addr, addrinarray,
979 __pgprot(_PAGE_CACHE_UC_MINUS), 1); 987 __pgprot(_PAGE_CACHE_UC_MINUS), 1);
980out: 988 if (ret)
981 for (i = 0; i < addrinarray; i++) { 989 goto out_free;
982 unsigned long tmp = __pa(addr[i]); 990
983 991 return 0;
984 if (tmp == start) 992
985 break; 993out_free:
986 for (end = tmp + PAGE_SIZE; i < addrinarray - 1; end += PAGE_SIZE) { 994 for (j = 0; j < i; j++)
987 if (end != __pa(addr[i + 1])) 995 free_memtype(__pa(addr[j]), __pa(addr[j]) + PAGE_SIZE);
988 break; 996
989 i++; 997 return ret;
990 }
991 free_memtype(tmp, end);
992 }
993 return -EINVAL;
994} 998}
995EXPORT_SYMBOL(set_memory_array_uc); 999EXPORT_SYMBOL(set_memory_array_uc);
996 1000
997int _set_memory_wc(unsigned long addr, int numpages) 1001int _set_memory_wc(unsigned long addr, int numpages)
998{ 1002{
999 return change_page_attr_set(&addr, numpages, 1003 int ret;
1004 ret = change_page_attr_set(&addr, numpages,
1005 __pgprot(_PAGE_CACHE_UC_MINUS), 0);
1006
1007 if (!ret) {
1008 ret = change_page_attr_set(&addr, numpages,
1000 __pgprot(_PAGE_CACHE_WC), 0); 1009 __pgprot(_PAGE_CACHE_WC), 0);
1010 }
1011 return ret;
1001} 1012}
1002 1013
1003int set_memory_wc(unsigned long addr, int numpages) 1014int set_memory_wc(unsigned long addr, int numpages)
1004{ 1015{
1016 int ret;
1017
1005 if (!pat_enabled) 1018 if (!pat_enabled)
1006 return set_memory_uc(addr, numpages); 1019 return set_memory_uc(addr, numpages);
1007 1020
1008 if (reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE, 1021 ret = reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE,
1009 _PAGE_CACHE_WC, NULL)) 1022 _PAGE_CACHE_WC, NULL);
1010 return -EINVAL; 1023 if (ret)
1024 goto out_err;
1025
1026 ret = _set_memory_wc(addr, numpages);
1027 if (ret)
1028 goto out_free;
1029
1030 return 0;
1011 1031
1012 return _set_memory_wc(addr, numpages); 1032out_free:
1033 free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
1034out_err:
1035 return ret;
1013} 1036}
1014EXPORT_SYMBOL(set_memory_wc); 1037EXPORT_SYMBOL(set_memory_wc);
1015 1038
@@ -1021,29 +1044,31 @@ int _set_memory_wb(unsigned long addr, int numpages)
1021 1044
1022int set_memory_wb(unsigned long addr, int numpages) 1045int set_memory_wb(unsigned long addr, int numpages)
1023{ 1046{
1024 free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE); 1047 int ret;
1048
1049 ret = _set_memory_wb(addr, numpages);
1050 if (ret)
1051 return ret;
1025 1052
1026 return _set_memory_wb(addr, numpages); 1053 free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
1054 return 0;
1027} 1055}
1028EXPORT_SYMBOL(set_memory_wb); 1056EXPORT_SYMBOL(set_memory_wb);
1029 1057
1030int set_memory_array_wb(unsigned long *addr, int addrinarray) 1058int set_memory_array_wb(unsigned long *addr, int addrinarray)
1031{ 1059{
1032 int i; 1060 int i;
1061 int ret;
1033 1062
1034 for (i = 0; i < addrinarray; i++) { 1063 ret = change_page_attr_clear(addr, addrinarray,
1035 unsigned long start = __pa(addr[i]);
1036 unsigned long end;
1037
1038 for (end = start + PAGE_SIZE; i < addrinarray - 1; end += PAGE_SIZE) {
1039 if (end != __pa(addr[i + 1]))
1040 break;
1041 i++;
1042 }
1043 free_memtype(start, end);
1044 }
1045 return change_page_attr_clear(addr, addrinarray,
1046 __pgprot(_PAGE_CACHE_MASK), 1); 1064 __pgprot(_PAGE_CACHE_MASK), 1);
1065 if (ret)
1066 return ret;
1067
1068 for (i = 0; i < addrinarray; i++)
1069 free_memtype(__pa(addr[i]), __pa(addr[i]) + PAGE_SIZE);
1070
1071 return 0;
1047} 1072}
1048EXPORT_SYMBOL(set_memory_array_wb); 1073EXPORT_SYMBOL(set_memory_array_wb);
1049 1074
@@ -1136,6 +1161,8 @@ int set_pages_array_wb(struct page **pages, int addrinarray)
1136 1161
1137 retval = cpa_clear_pages_array(pages, addrinarray, 1162 retval = cpa_clear_pages_array(pages, addrinarray,
1138 __pgprot(_PAGE_CACHE_MASK)); 1163 __pgprot(_PAGE_CACHE_MASK));
1164 if (retval)
1165 return retval;
1139 1166
1140 for (i = 0; i < addrinarray; i++) { 1167 for (i = 0; i < addrinarray; i++) {
1141 start = (unsigned long)page_address(pages[i]); 1168 start = (unsigned long)page_address(pages[i]);
@@ -1143,7 +1170,7 @@ int set_pages_array_wb(struct page **pages, int addrinarray)
1143 free_memtype(start, end); 1170 free_memtype(start, end);
1144 } 1171 }
1145 1172
1146 return retval; 1173 return 0;
1147} 1174}
1148EXPORT_SYMBOL(set_pages_array_wb); 1175EXPORT_SYMBOL(set_pages_array_wb);
1149 1176
diff --git a/arch/x86/mm/pat.c b/arch/x86/mm/pat.c
index c009a241d562..e6718bb28065 100644
--- a/arch/x86/mm/pat.c
+++ b/arch/x86/mm/pat.c
@@ -182,10 +182,10 @@ static unsigned long pat_x_mtrr_type(u64 start, u64 end, unsigned long req_type)
182 u8 mtrr_type; 182 u8 mtrr_type;
183 183
184 mtrr_type = mtrr_type_lookup(start, end); 184 mtrr_type = mtrr_type_lookup(start, end);
185 if (mtrr_type == MTRR_TYPE_UNCACHABLE) 185 if (mtrr_type != MTRR_TYPE_WRBACK)
186 return _PAGE_CACHE_UC; 186 return _PAGE_CACHE_UC_MINUS;
187 if (mtrr_type == MTRR_TYPE_WRCOMB) 187
188 return _PAGE_CACHE_WC; 188 return _PAGE_CACHE_WB;
189 } 189 }
190 190
191 return req_type; 191 return req_type;
@@ -352,23 +352,13 @@ int reserve_memtype(u64 start, u64 end, unsigned long req_type,
352 return 0; 352 return 0;
353 } 353 }
354 354
355 if (req_type == -1) { 355 /*
356 /* 356 * Call mtrr_lookup to get the type hint. This is an
357 * Call mtrr_lookup to get the type hint. This is an 357 * optimization for /dev/mem mmap'ers into WB memory (BIOS
358 * optimization for /dev/mem mmap'ers into WB memory (BIOS 358 * tools and ACPI tools). Use WB request for WB memory and use
359 * tools and ACPI tools). Use WB request for WB memory and use 359 * UC_MINUS otherwise.
360 * UC_MINUS otherwise. 360 */
361 */ 361 actual_type = pat_x_mtrr_type(start, end, req_type & _PAGE_CACHE_MASK);
362 u8 mtrr_type = mtrr_type_lookup(start, end);
363
364 if (mtrr_type == MTRR_TYPE_WRBACK)
365 actual_type = _PAGE_CACHE_WB;
366 else
367 actual_type = _PAGE_CACHE_UC_MINUS;
368 } else {
369 actual_type = pat_x_mtrr_type(start, end,
370 req_type & _PAGE_CACHE_MASK);
371 }
372 362
373 if (new_type) 363 if (new_type)
374 *new_type = actual_type; 364 *new_type = actual_type;
@@ -546,9 +536,7 @@ static inline int range_is_allowed(unsigned long pfn, unsigned long size)
546int phys_mem_access_prot_allowed(struct file *file, unsigned long pfn, 536int phys_mem_access_prot_allowed(struct file *file, unsigned long pfn,
547 unsigned long size, pgprot_t *vma_prot) 537 unsigned long size, pgprot_t *vma_prot)
548{ 538{
549 u64 offset = ((u64) pfn) << PAGE_SHIFT; 539 unsigned long flags = _PAGE_CACHE_WB;
550 unsigned long flags = -1;
551 int retval;
552 540
553 if (!range_is_allowed(pfn, size)) 541 if (!range_is_allowed(pfn, size))
554 return 0; 542 return 0;
@@ -576,64 +564,11 @@ int phys_mem_access_prot_allowed(struct file *file, unsigned long pfn,
576 } 564 }
577#endif 565#endif
578 566
579 /*
580 * With O_SYNC, we can only take UC_MINUS mapping. Fail if we cannot.
581 *
582 * Without O_SYNC, we want to get
583 * - WB for WB-able memory and no other conflicting mappings
584 * - UC_MINUS for non-WB-able memory with no other conflicting mappings
585 * - Inherit from confliting mappings otherwise
586 */
587 if (flags != -1) {
588 retval = reserve_memtype(offset, offset + size, flags, NULL);
589 } else {
590 retval = reserve_memtype(offset, offset + size, -1, &flags);
591 }
592
593 if (retval < 0)
594 return 0;
595
596 if (((pfn < max_low_pfn_mapped) ||
597 (pfn >= (1UL<<(32 - PAGE_SHIFT)) && pfn < max_pfn_mapped)) &&
598 ioremap_change_attr((unsigned long)__va(offset), size, flags) < 0) {
599 free_memtype(offset, offset + size);
600 printk(KERN_INFO
601 "%s:%d /dev/mem ioremap_change_attr failed %s for %Lx-%Lx\n",
602 current->comm, current->pid,
603 cattr_name(flags),
604 offset, (unsigned long long)(offset + size));
605 return 0;
606 }
607
608 *vma_prot = __pgprot((pgprot_val(*vma_prot) & ~_PAGE_CACHE_MASK) | 567 *vma_prot = __pgprot((pgprot_val(*vma_prot) & ~_PAGE_CACHE_MASK) |
609 flags); 568 flags);
610 return 1; 569 return 1;
611} 570}
612 571
613void map_devmem(unsigned long pfn, unsigned long size, pgprot_t vma_prot)
614{
615 unsigned long want_flags = (pgprot_val(vma_prot) & _PAGE_CACHE_MASK);
616 u64 addr = (u64)pfn << PAGE_SHIFT;
617 unsigned long flags;
618
619 reserve_memtype(addr, addr + size, want_flags, &flags);
620 if (flags != want_flags) {
621 printk(KERN_INFO
622 "%s:%d /dev/mem expected mapping type %s for %Lx-%Lx, got %s\n",
623 current->comm, current->pid,
624 cattr_name(want_flags),
625 addr, (unsigned long long)(addr + size),
626 cattr_name(flags));
627 }
628}
629
630void unmap_devmem(unsigned long pfn, unsigned long size, pgprot_t vma_prot)
631{
632 u64 addr = (u64)pfn << PAGE_SHIFT;
633
634 free_memtype(addr, addr + size);
635}
636
637/* 572/*
638 * Change the memory type for the physial address range in kernel identity 573 * Change the memory type for the physial address range in kernel identity
639 * mapping space if that range is a part of identity map. 574 * mapping space if that range is a part of identity map.
@@ -671,8 +606,8 @@ static int reserve_pfn_range(u64 paddr, unsigned long size, pgprot_t *vma_prot,
671{ 606{
672 int is_ram = 0; 607 int is_ram = 0;
673 int ret; 608 int ret;
674 unsigned long flags;
675 unsigned long want_flags = (pgprot_val(*vma_prot) & _PAGE_CACHE_MASK); 609 unsigned long want_flags = (pgprot_val(*vma_prot) & _PAGE_CACHE_MASK);
610 unsigned long flags = want_flags;
676 611
677 is_ram = pat_pagerange_is_ram(paddr, paddr + size); 612 is_ram = pat_pagerange_is_ram(paddr, paddr + size);
678 613
@@ -734,29 +669,28 @@ static void free_pfn_range(u64 paddr, unsigned long size)
734 * 669 *
735 * If the vma has a linear pfn mapping for the entire range, we get the prot 670 * If the vma has a linear pfn mapping for the entire range, we get the prot
736 * from pte and reserve the entire vma range with single reserve_pfn_range call. 671 * from pte and reserve the entire vma range with single reserve_pfn_range call.
737 * Otherwise, we reserve the entire vma range, my ging through the PTEs page
738 * by page to get physical address and protection.
739 */ 672 */
740int track_pfn_vma_copy(struct vm_area_struct *vma) 673int track_pfn_vma_copy(struct vm_area_struct *vma)
741{ 674{
742 int retval = 0;
743 unsigned long i, j;
744 resource_size_t paddr; 675 resource_size_t paddr;
745 unsigned long prot; 676 unsigned long prot;
746 unsigned long vma_start = vma->vm_start; 677 unsigned long vma_size = vma->vm_end - vma->vm_start;
747 unsigned long vma_end = vma->vm_end;
748 unsigned long vma_size = vma_end - vma_start;
749 pgprot_t pgprot; 678 pgprot_t pgprot;
750 679
751 if (!pat_enabled) 680 if (!pat_enabled)
752 return 0; 681 return 0;
753 682
683 /*
684 * For now, only handle remap_pfn_range() vmas where
685 * is_linear_pfn_mapping() == TRUE. Handling of
686 * vm_insert_pfn() is TBD.
687 */
754 if (is_linear_pfn_mapping(vma)) { 688 if (is_linear_pfn_mapping(vma)) {
755 /* 689 /*
756 * reserve the whole chunk covered by vma. We need the 690 * reserve the whole chunk covered by vma. We need the
757 * starting address and protection from pte. 691 * starting address and protection from pte.
758 */ 692 */
759 if (follow_phys(vma, vma_start, 0, &prot, &paddr)) { 693 if (follow_phys(vma, vma->vm_start, 0, &prot, &paddr)) {
760 WARN_ON_ONCE(1); 694 WARN_ON_ONCE(1);
761 return -EINVAL; 695 return -EINVAL;
762 } 696 }
@@ -764,28 +698,7 @@ int track_pfn_vma_copy(struct vm_area_struct *vma)
764 return reserve_pfn_range(paddr, vma_size, &pgprot, 1); 698 return reserve_pfn_range(paddr, vma_size, &pgprot, 1);
765 } 699 }
766 700
767 /* reserve entire vma page by page, using pfn and prot from pte */
768 for (i = 0; i < vma_size; i += PAGE_SIZE) {
769 if (follow_phys(vma, vma_start + i, 0, &prot, &paddr))
770 continue;
771
772 pgprot = __pgprot(prot);
773 retval = reserve_pfn_range(paddr, PAGE_SIZE, &pgprot, 1);
774 if (retval)
775 goto cleanup_ret;
776 }
777 return 0; 701 return 0;
778
779cleanup_ret:
780 /* Reserve error: Cleanup partial reservation and return error */
781 for (j = 0; j < i; j += PAGE_SIZE) {
782 if (follow_phys(vma, vma_start + j, 0, &prot, &paddr))
783 continue;
784
785 free_pfn_range(paddr, PAGE_SIZE);
786 }
787
788 return retval;
789} 702}
790 703
791/* 704/*
@@ -795,50 +708,28 @@ cleanup_ret:
795 * prot is passed in as a parameter for the new mapping. If the vma has a 708 * prot is passed in as a parameter for the new mapping. If the vma has a
796 * linear pfn mapping for the entire range reserve the entire vma range with 709 * linear pfn mapping for the entire range reserve the entire vma range with
797 * single reserve_pfn_range call. 710 * single reserve_pfn_range call.
798 * Otherwise, we look t the pfn and size and reserve only the specified range
799 * page by page.
800 *
801 * Note that this function can be called with caller trying to map only a
802 * subrange/page inside the vma.
803 */ 711 */
804int track_pfn_vma_new(struct vm_area_struct *vma, pgprot_t *prot, 712int track_pfn_vma_new(struct vm_area_struct *vma, pgprot_t *prot,
805 unsigned long pfn, unsigned long size) 713 unsigned long pfn, unsigned long size)
806{ 714{
807 int retval = 0;
808 unsigned long i, j;
809 resource_size_t base_paddr;
810 resource_size_t paddr; 715 resource_size_t paddr;
811 unsigned long vma_start = vma->vm_start; 716 unsigned long vma_size = vma->vm_end - vma->vm_start;
812 unsigned long vma_end = vma->vm_end;
813 unsigned long vma_size = vma_end - vma_start;
814 717
815 if (!pat_enabled) 718 if (!pat_enabled)
816 return 0; 719 return 0;
817 720
721 /*
722 * For now, only handle remap_pfn_range() vmas where
723 * is_linear_pfn_mapping() == TRUE. Handling of
724 * vm_insert_pfn() is TBD.
725 */
818 if (is_linear_pfn_mapping(vma)) { 726 if (is_linear_pfn_mapping(vma)) {
819 /* reserve the whole chunk starting from vm_pgoff */ 727 /* reserve the whole chunk starting from vm_pgoff */
820 paddr = (resource_size_t)vma->vm_pgoff << PAGE_SHIFT; 728 paddr = (resource_size_t)vma->vm_pgoff << PAGE_SHIFT;
821 return reserve_pfn_range(paddr, vma_size, prot, 0); 729 return reserve_pfn_range(paddr, vma_size, prot, 0);
822 } 730 }
823 731
824 /* reserve page by page using pfn and size */
825 base_paddr = (resource_size_t)pfn << PAGE_SHIFT;
826 for (i = 0; i < size; i += PAGE_SIZE) {
827 paddr = base_paddr + i;
828 retval = reserve_pfn_range(paddr, PAGE_SIZE, prot, 0);
829 if (retval)
830 goto cleanup_ret;
831 }
832 return 0; 732 return 0;
833
834cleanup_ret:
835 /* Reserve error: Cleanup partial reservation and return error */
836 for (j = 0; j < i; j += PAGE_SIZE) {
837 paddr = base_paddr + j;
838 free_pfn_range(paddr, PAGE_SIZE);
839 }
840
841 return retval;
842} 733}
843 734
844/* 735/*
@@ -849,39 +740,23 @@ cleanup_ret:
849void untrack_pfn_vma(struct vm_area_struct *vma, unsigned long pfn, 740void untrack_pfn_vma(struct vm_area_struct *vma, unsigned long pfn,
850 unsigned long size) 741 unsigned long size)
851{ 742{
852 unsigned long i;
853 resource_size_t paddr; 743 resource_size_t paddr;
854 unsigned long prot; 744 unsigned long vma_size = vma->vm_end - vma->vm_start;
855 unsigned long vma_start = vma->vm_start;
856 unsigned long vma_end = vma->vm_end;
857 unsigned long vma_size = vma_end - vma_start;
858 745
859 if (!pat_enabled) 746 if (!pat_enabled)
860 return; 747 return;
861 748
749 /*
750 * For now, only handle remap_pfn_range() vmas where
751 * is_linear_pfn_mapping() == TRUE. Handling of
752 * vm_insert_pfn() is TBD.
753 */
862 if (is_linear_pfn_mapping(vma)) { 754 if (is_linear_pfn_mapping(vma)) {
863 /* free the whole chunk starting from vm_pgoff */ 755 /* free the whole chunk starting from vm_pgoff */
864 paddr = (resource_size_t)vma->vm_pgoff << PAGE_SHIFT; 756 paddr = (resource_size_t)vma->vm_pgoff << PAGE_SHIFT;
865 free_pfn_range(paddr, vma_size); 757 free_pfn_range(paddr, vma_size);
866 return; 758 return;
867 } 759 }
868
869 if (size != 0 && size != vma_size) {
870 /* free page by page, using pfn and size */
871 paddr = (resource_size_t)pfn << PAGE_SHIFT;
872 for (i = 0; i < size; i += PAGE_SIZE) {
873 paddr = paddr + i;
874 free_pfn_range(paddr, PAGE_SIZE);
875 }
876 } else {
877 /* free entire vma, page by page, using the pfn from pte */
878 for (i = 0; i < vma_size; i += PAGE_SIZE) {
879 if (follow_phys(vma, vma_start + i, 0, &prot, &paddr))
880 continue;
881
882 free_pfn_range(paddr, PAGE_SIZE);
883 }
884 }
885} 760}
886 761
887pgprot_t pgprot_writecombine(pgprot_t prot) 762pgprot_t pgprot_writecombine(pgprot_t prot)
generated by cgit v1.2.2 (git 2.25.0) at 2024-09-22 03:32:59 -0400