Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6 into sh/for-2.6.31

author: Paul Mundt <lethal@linux-sh.org> 2009-07-06 22:55:05 -0400
committer: Paul Mundt <lethal@linux-sh.org> 2009-07-06 22:55:05 -0400
commit: 2b5c0c72ea404d6b554a8284031dd78748314b9e (patch)
tree: 468b7f3d8db0abe6a09ee221dce1de5de2bb8d12 /arch
parent: 2dbc8a23cc2e677422f6dea991aca4e3d31ab65f (diff)
parent: dc53fffc105f68cb08ca872acd51550e89aa2e67 (diff)
171 files changed, 4066 insertions, 2490 deletions
diff --git a/arch/ia64/pci/pci.c b/arch/ia64/pci/pci.c
index 729298f4b234..7de76dd352fe 100644
--- a/arch/ia64/pci/pci.c
+++ b/arch/ia64/pci/pci.c
@@ -537,7 +537,7 @@ pcibios_align_resource (void *data, struct resource *res,
 /*
 * PCI BIOS setup, always defaults to SAL interface
 */
-char * __devinit
+char * __init
 pcibios_setup (char *str)
 {
        return str;
diff --git a/arch/microblaze/Kconfig b/arch/microblaze/Kconfig
index b50b845fdd50..2db722d80d4d 100644
--- a/arch/microblaze/Kconfig
+++ b/arch/microblaze/Kconfig
@@ -53,6 +53,9 @@ config GENERIC_HARDIRQS_NO__DO_IRQ
 config GENERIC_GPIO
        def_bool y
+config GENERIC_CSUM
+        def_bool y
 config PCI
        def_bool n
diff --git a/arch/microblaze/include/asm/atomic.h b/arch/microblaze/include/asm/atomic.h
index 0de612ad7cb2..6d2e1d418be7 100644
--- a/arch/microblaze/include/asm/atomic.h
+++ b/arch/microblaze/include/asm/atomic.h
@@ -1,95 +1,7 @@
-/*
- * Copyright (C) 2006 Atmark Techno, Inc.
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- */
 #ifndef _ASM_MICROBLAZE_ATOMIC_H
 #define _ASM_MICROBLAZE_ATOMIC_H
-#include <linux/types.h>
+#include <asm-generic/atomic.h>
-#include <linux/compiler.h> /* likely */
-#include <asm/system.h> /* local_irq_XXX and friends */
-#define ATOMIC_INIT(i)          { (i) }
-#define atomic_read(v)          ((v)->counter)
-#define atomic_set(v, i)        (((v)->counter) = (i))
-#define atomic_inc(v)           (atomic_add_return(1, (v)))
-#define atomic_dec(v)           (atomic_sub_return(1, (v)))
-#define atomic_add(i, v)        (atomic_add_return(i, (v)))
-#define atomic_sub(i, v)        (atomic_sub_return(i, (v)))
-#define atomic_inc_return(v)    (atomic_add_return(1, (v)))
-#define atomic_dec_return(v)    (atomic_sub_return(1, (v)))
-#define atomic_inc_and_test(v)  (atomic_add_return(1, (v)) == 0)
-#define atomic_dec_and_test(v)  (atomic_sub_return(1, (v)) == 0)
-#define atomic_inc_not_zero(v)  (atomic_add_unless((v), 1, 0))
-#define atomic_sub_and_test(i, v) (atomic_sub_return((i), (v)) == 0)
-static inline int atomic_cmpxchg(atomic_t *v, int old, int new)
-{
-        int ret;
-        unsigned long flags;
-        local_irq_save(flags);
-        ret = v->counter;
-        if (likely(ret == old))
-                v->counter = new;
-        local_irq_restore(flags);
-        return ret;
-}
-static inline int atomic_add_unless(atomic_t *v, int a, int u)
-{
-        int c, old;
-        c = atomic_read(v);
-        while (c != u && (old = atomic_cmpxchg((v), c, c + a)) != c)
-                c = old;
-        return c != u;
-}
-static inline void atomic_clear_mask(unsigned long mask, unsigned long *addr)
-{
-        unsigned long flags;
-        local_irq_save(flags);
-        *addr &= ~mask;
-        local_irq_restore(flags);
-}
-/**
- * atomic_add_return - add and return
- * @i: integer value to add
- * @v: pointer of type atomic_t
- *
- * Atomically adds @i to @v and returns @i + @v
- */
-static inline int atomic_add_return(int i, atomic_t *v)
-{
-        unsigned long flags;
-        int val;
-        local_irq_save(flags);
-        val = v->counter;
-        v->counter = val += i;
-        local_irq_restore(flags);
-        return val;
-}
-static inline int atomic_sub_return(int i, atomic_t *v)
-{
-        return atomic_add_return(-i, v);
-}
 /*
 * Atomically test *v and decrement if it is greater than 0.
@@ -109,15 +21,4 @@ static inline int atomic_dec_if_positive(atomic_t *v)
        return res;
 }
-#define atomic_add_negative(a, v)       (atomic_add_return((a), (v)) < 0)
-#define atomic_xchg(v, new) (xchg(&((v)->counter), new))
-/* Atomic operations are already serializing */
-#define smp_mb__before_atomic_dec()     barrier()
-#define smp_mb__after_atomic_dec()      barrier()
-#define smp_mb__before_atomic_inc()     barrier()
-#define smp_mb__after_atomic_inc()      barrier()
-#include <asm-generic/atomic-long.h>
 #endif /* _ASM_MICROBLAZE_ATOMIC_H */
diff --git a/arch/microblaze/include/asm/bitops.h b/arch/microblaze/include/asm/bitops.h
index d6df1fd4e1e8..a72468f15c8b 100644
--- a/arch/microblaze/include/asm/bitops.h
+++ b/arch/microblaze/include/asm/bitops.h
@@ -1,27 +1 @@
-/*
- * Copyright (C) 2006 Atmark Techno, Inc.
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-#ifndef _ASM_MICROBLAZE_BITOPS_H
-#define _ASM_MICROBLAZE_BITOPS_H
-/*
- * Copyright 1992, Linus Torvalds.
- */
-#include <asm/byteorder.h> /* swab32 */
-#include <asm/system.h> /* save_flags */
-/*
- * clear_bit() doesn't provide any barrier for the compiler.
- */
-#define smp_mb__before_clear_bit()      barrier()
-#define smp_mb__after_clear_bit()       barrier()
 #include <asm-generic/bitops.h>
-#include <asm-generic/bitops/__fls.h>
-#endif /* _ASM_MICROBLAZE_BITOPS_H */
diff --git a/arch/microblaze/include/asm/bug.h b/arch/microblaze/include/asm/bug.h
index 8eb2cdde11d7..b12fd89e42e9 100644
--- a/arch/microblaze/include/asm/bug.h
+++ b/arch/microblaze/include/asm/bug.h
@@ -1,15 +1 @@
-/*
- * Copyright (C) 2006 Atmark Techno, Inc.
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-#ifndef _ASM_MICROBLAZE_BUG_H
-#define _ASM_MICROBLAZE_BUG_H
-#include <linux/kernel.h>
 #include <asm-generic/bug.h>
-#endif /* _ASM_MICROBLAZE_BUG_H */
diff --git a/arch/microblaze/include/asm/bugs.h b/arch/microblaze/include/asm/bugs.h
index f2c6593653fb..61791e1ad9f5 100644
--- a/arch/microblaze/include/asm/bugs.h
+++ b/arch/microblaze/include/asm/bugs.h
@@ -1,17 +1 @@
-/*
+#include <asm-generic/bugs.h>
- * Copyright (C) 2006 Atmark Techno, Inc.
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-#ifndef _ASM_MICROBLAZE_BUGS_H
-#define _ASM_MICROBLAZE_BUGS_H
-static inline void check_bugs(void)
-{
-        /* nothing to do */
-}
-#endif /* _ASM_MICROBLAZE_BUGS_H */
diff --git a/arch/microblaze/include/asm/checksum.h b/arch/microblaze/include/asm/checksum.h
index 97ea46b5cf80..128bf03b54b7 100644
--- a/arch/microblaze/include/asm/checksum.h
+++ b/arch/microblaze/include/asm/checksum.h
@@ -10,12 +10,11 @@
 #ifndef _ASM_MICROBLAZE_CHECKSUM_H
 #define _ASM_MICROBLAZE_CHECKSUM_H
-#include <linux/in6.h>
 /*
 * computes the checksum of the TCP/UDP pseudo-header
 * returns a 16-bit checksum, already complemented
 */
+#define csum_tcpudp_nofold      csum_tcpudp_nofold
 static inline __wsum
 csum_tcpudp_nofold(__be32 saddr, __be32 daddr, unsigned short len,
                   unsigned short proto, __wsum sum)
@@ -30,71 +29,6 @@ csum_tcpudp_nofold(__be32 saddr, __be32 daddr, unsigned short len,
        return sum;
 }
-/*
+#include <asm-generic/checksum.h>
- * computes the checksum of a memory block at buff, length len,
- * and adds in "sum" (32-bit)
- *
- * returns a 32-bit number suitable for feeding into itself
- * or csum_tcpudp_magic
- *
- * this function must be called with even lengths, except
- * for the last fragment, which may be odd
- *
- * it's best to have buff aligned on a 32-bit boundary
- */
-extern __wsum csum_partial(const void *buff, int len, __wsum sum);
-/*
- * the same as csum_partial, but copies from src while it
- * checksums
- *
- * here even more important to align src and dst on a 32-bit (or even
- * better 64-bit) boundary
- */
-extern __wsum csum_partial_copy(const void *src, void *dst, int len,
-                                                                __wsum sum);
-/*
- * the same as csum_partial_copy, but copies from user space.
- *
- * here even more important to align src and dst on a 32-bit (or even
- * better 64-bit) boundary
- */
-extern __wsum csum_partial_copy_from_user(const void __user *src, void *dst,
-                                        int len, __wsum sum, int *csum_err);
-#define csum_partial_copy_nocheck(src, dst, len, sum)   \
-        csum_partial_copy((src), (dst), (len), (sum))
-/*
- *      This is a version of ip_compute_csum() optimized for IP headers,
- *      which always checksum on 4 octet boundaries.
- *
- */
-extern __sum16 ip_fast_csum(const void *iph, unsigned int ihl);
-/*
- *      Fold a partial checksum
- */
-static inline __sum16 csum_fold(__wsum csum)
-{
-        u32 sum = (__force u32)csum;
-        sum = (sum & 0xffff) + (sum >> 16);
-        sum = (sum & 0xffff) + (sum >> 16);
-        return (__force __sum16)~sum;
-}
-static inline __sum16
-csum_tcpudp_magic(__be32 saddr, __be32 daddr, unsigned short len,
-                  unsigned short proto, __wsum sum)
-{
-        return csum_fold(csum_tcpudp_nofold(saddr, daddr, len, proto, sum));
-}
-/*
- * this routine is used for miscellaneous IP-like checksums, mainly
- * in icmp.c
- */
-extern __sum16 ip_compute_csum(const void *buff, int len);
 #endif /* _ASM_MICROBLAZE_CHECKSUM_H */
diff --git a/arch/microblaze/include/asm/fb.h b/arch/microblaze/include/asm/fb.h
new file mode 100644
index 000000000000..3a4988e8df45
--- /dev/null
+++ b/arch/microblaze/include/asm/fb.h
@@ -0,0 +1 @@
+#include <asm-generic/fb.h>
diff --git a/arch/microblaze/include/asm/hardirq.h b/arch/microblaze/include/asm/hardirq.h
index 0f2d6b013e11..41e1e1aa36ac 100644
--- a/arch/microblaze/include/asm/hardirq.h
+++ b/arch/microblaze/include/asm/hardirq.h
@@ -9,21 +9,11 @@
 #ifndef _ASM_MICROBLAZE_HARDIRQ_H
 #define _ASM_MICROBLAZE_HARDIRQ_H
-#include <linux/cache.h>
-#include <linux/irq.h>
-#include <asm/irq.h>
-#include <asm/current.h>
-#include <linux/ptrace.h>
 /* should be defined in each interrupt controller driver */
 extern unsigned int get_irq(struct pt_regs *regs);
-typedef struct {
+#define ack_bad_irq ack_bad_irq
-        unsigned int __softirq_pending;
-} ____cacheline_aligned irq_cpustat_t;
 void ack_bad_irq(unsigned int irq);
+#include <asm-generic/hardirq.h>
-#include <linux/irq_cpustat.h> /* Standard mappings for irq_cpustat_t above */
 #endif /* _ASM_MICROBLAZE_HARDIRQ_H */
diff --git a/arch/microblaze/include/asm/ioctls.h b/arch/microblaze/include/asm/ioctls.h
index 03582b249204..ec34c760665e 100644
--- a/arch/microblaze/include/asm/ioctls.h
+++ b/arch/microblaze/include/asm/ioctls.h
@@ -1,91 +1 @@
-/*
+#include <asm-generic/ioctls.h>
- * Copyright (C) 2006 Atmark Techno, Inc.
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-#ifndef _ASM_MICROBLAZE_IOCTLS_H
-#define _ASM_MICROBLAZE_IOCTLS_H
-#include <linux/ioctl.h>
-/* 0x54 is just a magic number to make these relatively unique ('T') */
-#define TCGETS          0x5401
-#define TCSETS          0x5402
-#define TCSETSW         0x5403
-#define TCSETSF         0x5404
-#define TCGETA          0x5405
-#define TCSETA          0x5406
-#define TCSETAW         0x5407
-#define TCSETAF         0x5408
-#define TCSBRK          0x5409
-#define TCXONC          0x540A
-#define TCFLSH          0x540B
-#define TIOCEXCL        0x540C
-#define TIOCNXCL        0x540D
-#define TIOCSCTTY       0x540E
-#define TIOCGPGRP       0x540F
-#define TIOCSPGRP       0x5410
-#define TIOCOUTQ        0x5411
-#define TIOCSTI         0x5412
-#define TIOCGWINSZ      0x5413
-#define TIOCSWINSZ      0x5414
-#define TIOCMGET        0x5415
-#define TIOCMBIS        0x5416
-#define TIOCMBIC        0x5417
-#define TIOCMSET        0x5418
-#define TIOCGSOFTCAR    0x5419
-#define TIOCSSOFTCAR    0x541A
-#define FIONREAD        0x541B
-#define TIOCINQ         FIONREAD
-#define TIOCLINUX       0x541C
-#define TIOCCONS        0x541D
-#define TIOCGSERIAL     0x541E
-#define TIOCSSERIAL     0x541F
-#define TIOCPKT         0x5420
-#define FIONBIO         0x5421
-#define TIOCNOTTY       0x5422
-#define TIOCSETD        0x5423
-#define TIOCGETD        0x5424
-#define TCSBRKP         0x5425 /* Needed for POSIX tcsendbreak() */
-#define TIOCTTYGSTRUCT  0x5426 /* For debugging only */
-#define TIOCSBRK        0x5427 /* BSD compatibility */
-#define TIOCCBRK        0x5428 /* BSD compatibility */
-#define TIOCGSID        0x5429 /* Return the session ID of FD */
-/* Get Pty Number (of pty-mux device) */
-#define TIOCGPTN        _IOR('T', 0x30, unsigned int)
-#define TIOCSPTLCK      _IOW('T', 0x31, int) /* Lock/unlock Pty */
-#define FIONCLEX        0x5450 /* these numbers need to be adjusted. */
-#define FIOCLEX         0x5451
-#define FIOASYNC        0x5452
-#define TIOCSERCONFIG   0x5453
-#define TIOCSERGWILD    0x5454
-#define TIOCSERSWILD    0x5455
-#define TIOCGLCKTRMIOS  0x5456
-#define TIOCSLCKTRMIOS  0x5457
-#define TIOCSERGSTRUCT  0x5458 /* For debugging only */
-#define TIOCSERGETLSR   0x5459 /* Get line status register */
-#define TIOCSERGETMULTI 0x545A /* Get multiport config */
-#define TIOCSERSETMULTI 0x545B /* Set multiport config */
-#define TIOCMIWAIT      0x545C /* wait for a change on serial input line(s) */
-#define TIOCGICOUNT     0x545D /* read serial port inline interrupt counts */
-#define FIOQSIZE        0x545E
-/* Used for packet mode */
-#define TIOCPKT_DATA            0
-#define TIOCPKT_FLUSHREAD       1
-#define TIOCPKT_FLUSHWRITE      2
-#define TIOCPKT_STOP            4
-#define TIOCPKT_START           8
-#define TIOCPKT_NOSTOP          16
-#define TIOCPKT_DOSTOP          32
-#define TIOCSER_TEMT    0x01 /* Transmitter physically empty */
-#endif /* _ASM_MICROBLAZE_IOCTLS_H */
diff --git a/arch/microblaze/include/asm/ipcbuf.h b/arch/microblaze/include/asm/ipcbuf.h
index b056fa420654..84c7e51cb6d0 100644
--- a/arch/microblaze/include/asm/ipcbuf.h
+++ b/arch/microblaze/include/asm/ipcbuf.h
@@ -1,36 +1 @@
-/*
+#include <asm-generic/ipcbuf.h>
- * Copyright (C) 2006 Atmark Techno, Inc.
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-#ifndef _ASM_MICROBLAZE_IPCBUF_H
-#define _ASM_MICROBLAZE_IPCBUF_H
-/*
- * The user_ipc_perm structure for microblaze architecture.
- * Note extra padding because this structure is passed back and forth
- * between kernel and user space.
- *
- * Pad space is left for:
- * - 32-bit mode_t and seq
- * - 2 miscellaneous 32-bit values
- */
-struct ipc64_perm {
-        __kernel_key_t          key;
-        __kernel_uid32_t        uid;
-        __kernel_gid32_t        gid;
-        __kernel_uid32_t        cuid;
-        __kernel_gid32_t        cgid;
-        __kernel_mode_t         mode;
-        unsigned short          __pad1;
-        unsigned short          seq;
-        unsigned short          __pad2;
-        unsigned long           __unused1;
-        unsigned long           __unused2;
-};
-#endif /* _ASM_MICROBLAZE_IPCBUF_H */
diff --git a/arch/microblaze/include/asm/irq.h b/arch/microblaze/include/asm/irq.h
index db515deaa720..90f050535ebe 100644
--- a/arch/microblaze/include/asm/irq.h
+++ b/arch/microblaze/include/asm/irq.h
@@ -10,6 +10,7 @@
 #define _ASM_MICROBLAZE_IRQ_H
 #define NR_IRQS 32
+#include <asm-generic/irq.h>
 #include <linux/interrupt.h>
@@ -17,11 +18,6 @@ extern unsigned int nr_irq;
 #define NO_IRQ (-1)
-static inline int irq_canonicalize(int irq)
-{
-        return irq;
-}
 struct pt_regs;
 extern void do_IRQ(struct pt_regs *regs);
diff --git a/arch/microblaze/include/asm/mman.h b/arch/microblaze/include/asm/mman.h
index 4914b1329445..8eebf89f5ab1 100644
--- a/arch/microblaze/include/asm/mman.h
+++ b/arch/microblaze/include/asm/mman.h
@@ -1,25 +1 @@
-/*
- * Copyright (C) 2006 Atmark Techno, Inc.
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-#ifndef _ASM_MICROBLAZE_MMAN_H
-#define _ASM_MICROBLAZE_MMAN_H
 #include <asm-generic/mman.h>
-#define MAP_GROWSDOWN   0x0100 /* stack-like segment */
-#define MAP_DENYWRITE   0x0800 /* ETXTBSY */
-#define MAP_EXECUTABLE  0x1000 /* mark it as an executable */
-#define MAP_LOCKED      0x2000 /* pages are locked */
-#define MAP_NORESERVE   0x4000 /* don't check for reservations */
-#define MAP_POPULATE    0x8000 /* populate (prefault) pagetables */
-#define MAP_NONBLOCK    0x10000 /* do not block on IO */
-#define MCL_CURRENT     1 /* lock all current mappings */
-#define MCL_FUTURE      2 /* lock all future mappings */
-#endif /* _ASM_MICROBLAZE_MMAN_H */
diff --git a/arch/microblaze/include/asm/mmu.h b/arch/microblaze/include/asm/mmu.h
index 66cad6a99d77..8d6a654ceffb 100644
--- a/arch/microblaze/include/asm/mmu.h
+++ b/arch/microblaze/include/asm/mmu.h
@@ -12,12 +12,7 @@
 #define _ASM_MICROBLAZE_MMU_H
 # ifndef CONFIG_MMU
-#  ifndef __ASSEMBLY__
+#  include <asm-generic/mmu.h>
-typedef struct {
-        struct vm_list_struct   *vmlist;
-        unsigned long           end_brk;
-} mm_context_t;
-#  endif /* __ASSEMBLY__ */
 # else /* CONFIG_MMU */
 #  ifdef __KERNEL__
 #   ifndef __ASSEMBLY__
diff --git a/arch/microblaze/include/asm/mmu_context.h b/arch/microblaze/include/asm/mmu_context.h
index 385fed16bbfb..24eab1674d3e 100644
--- a/arch/microblaze/include/asm/mmu_context.h
+++ b/arch/microblaze/include/asm/mmu_context.h
@@ -1,5 +1,5 @@
 #ifdef CONFIG_MMU
 # include "mmu_context_mm.h"
 #else
-# include "mmu_context_no.h"
+# include <asm-generic/mmu_context.h>
 #endif
diff --git a/arch/microblaze/include/asm/mmu_context_no.h b/arch/microblaze/include/asm/mmu_context_no.h
deleted file mode 100644
index ba5567190154..000000000000
--- a/arch/microblaze/include/asm/mmu_context_no.h
+++ /dev/null
@@ -1,23 +0,0 @@
-/*
- * Copyright (C) 2008-2009 Michal Simek <monstr@monstr.eu>
- * Copyright (C) 2008-2009 PetaLogix
- * Copyright (C) 2006 Atmark Techno, Inc.
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-#ifndef _ASM_MICROBLAZE_MMU_CONTEXT_H
-#define _ASM_MICROBLAZE_MMU_CONTEXT_H
-# define init_new_context(tsk, mm)              ({ 0; })
-# define enter_lazy_tlb(mm, tsk)                do {} while (0)
-# define change_mm_context(old, ctx, _pml4)     do {} while (0)
-# define destroy_context(mm)                    do {} while (0)
-# define deactivate_mm(tsk, mm)                 do {} while (0)
-# define switch_mm(prev, next, tsk)             do {} while (0)
-# define activate_mm(prev, next)                do {} while (0)
-#endif /* _ASM_MICROBLAZE_MMU_CONTEXT_H */
diff --git a/arch/microblaze/include/asm/module.h b/arch/microblaze/include/asm/module.h
index 914565a90315..7be1347fce42 100644
--- a/arch/microblaze/include/asm/module.h
+++ b/arch/microblaze/include/asm/module.h
@@ -9,6 +9,8 @@
 #ifndef _ASM_MICROBLAZE_MODULE_H
 #define _ASM_MICROBLAZE_MODULE_H
+#include <asm-generic/module.h>
 /* Microblaze Relocations */
 #define R_MICROBLAZE_NONE 0
 #define R_MICROBLAZE_32 1
@@ -24,14 +26,6 @@
 /* Keep this the last entry. */
 #define R_MICROBLAZE_NUM 11
-struct mod_arch_specific {
-        int foo;
-};
-#define Elf_Shdr        Elf32_Shdr
-#define Elf_Sym         Elf32_Sym
-#define Elf_Ehdr        Elf32_Ehdr
 typedef struct { volatile int counter; } module_t;
 #endif /* _ASM_MICROBLAZE_MODULE_H */
diff --git a/arch/microblaze/include/asm/msgbuf.h b/arch/microblaze/include/asm/msgbuf.h
index 09dd97097211..809134c644a6 100644
--- a/arch/microblaze/include/asm/msgbuf.h
+++ b/arch/microblaze/include/asm/msgbuf.h
@@ -1,31 +1 @@
-#ifndef _ASM_MICROBLAZE_MSGBUF_H
+#include <asm-generic/msgbuf.h>
-#define _ASM_MICROBLAZE_MSGBUF_H
-/*
- * The msqid64_ds structure for microblaze architecture.
- * Note extra padding because this structure is passed back and forth
- * between kernel and user space.
- *
- * Pad space is left for:
- * - 64-bit time_t to solve y2038 problem
- * - 2 miscellaneous 32-bit values
- */
-struct msqid64_ds {
-        struct ipc64_perm msg_perm;
-        __kernel_time_t msg_stime; /* last msgsnd time */
-        unsigned long __unused1;
-        __kernel_time_t msg_rtime; /* last msgrcv time */
-        unsigned long __unused2;
-        __kernel_time_t msg_ctime; /* last change time */
-        unsigned long __unused3;
-        unsigned long msg_cbytes; /* current number of bytes on queue */
-        unsigned long msg_qnum; /* number of messages in queue */
-        unsigned long msg_qbytes; /* max number of bytes on queue */
-        __kernel_pid_t msg_lspid; /* pid of last msgsnd */
-        __kernel_pid_t msg_lrpid; /* last receive pid */
-        unsigned long __unused4;
-        unsigned long __unused5;
-};
-#endif /* _ASM_MICROBLAZE_MSGBUF_H */
diff --git a/arch/microblaze/include/asm/param.h b/arch/microblaze/include/asm/param.h
index 8c538a49616d..965d45427975 100644
--- a/arch/microblaze/include/asm/param.h
+++ b/arch/microblaze/include/asm/param.h
@@ -1,30 +1 @@
-/*
+#include <asm-generic/param.h>
- * Copyright (C) 2006 Atmark Techno, Inc.
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-#ifndef _ASM_MICROBLAZE_PARAM_H
-#define _ASM_MICROBLAZE_PARAM_H
-#ifdef __KERNEL__
-#define HZ              CONFIG_HZ       /* internal kernel timer frequency */
-#define USER_HZ         100             /* for user interfaces in "ticks" */
-#define CLOCKS_PER_SEC  (USER_HZ)       /* frequency at which times() counts */
-#endif /* __KERNEL__ */
-#ifndef HZ
-#define HZ 100
-#endif
-#define EXEC_PAGESIZE   4096
-#ifndef NOGROUP
-#define NOGROUP         (-1)
-#endif
-#define MAXHOSTNAMELEN  64      /* max length of hostname */
-#endif /* _ASM_MICROBLAZE_PARAM_H */
diff --git a/arch/microblaze/include/asm/parport.h b/arch/microblaze/include/asm/parport.h
new file mode 100644
index 000000000000..cf252af64590
--- /dev/null
+++ b/arch/microblaze/include/asm/parport.h
@@ -0,0 +1 @@
+#include <asm-generic/parport.h>
diff --git a/arch/microblaze/include/asm/pci.h b/arch/microblaze/include/asm/pci.h
index ca03794cf3f0..9f0df5faf2c8 100644
--- a/arch/microblaze/include/asm/pci.h
+++ b/arch/microblaze/include/asm/pci.h
@@ -1 +1 @@
-#include <linux/io.h>
+#include <asm-generic/pci.h>
diff --git a/arch/microblaze/include/asm/posix_types.h b/arch/microblaze/include/asm/posix_types.h
index 8c758b231f37..0e15039673e3 100644
--- a/arch/microblaze/include/asm/posix_types.h
+++ b/arch/microblaze/include/asm/posix_types.h
@@ -1,73 +1,9 @@
-/*
- * Copyright (C) 2006 Atmark Techno, Inc.
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- */
 #ifndef _ASM_MICROBLAZE_POSIX_TYPES_H
 #define _ASM_MICROBLAZE_POSIX_TYPES_H
-/*
- * This file is generally used by user-level software, so you need to
- * be a little careful about namespace pollution etc. Also, we cannot
- * assume GCC is being used.
- */
-typedef unsigned long   __kernel_ino_t;
 typedef unsigned short  __kernel_mode_t;
-typedef unsigned int    __kernel_nlink_t;
+#define __kernel_mode_t __kernel_mode_t
-typedef long            __kernel_off_t;
-typedef int             __kernel_pid_t;
-typedef unsigned int    __kernel_ipc_pid_t;
-typedef unsigned int    __kernel_uid_t;
-typedef unsigned int    __kernel_gid_t;
-typedef unsigned long   __kernel_size_t;
-typedef long            __kernel_ssize_t;
-typedef int             __kernel_ptrdiff_t;
-typedef long            __kernel_time_t;
-typedef long            __kernel_suseconds_t;
-typedef long            __kernel_clock_t;
-typedef int             __kernel_timer_t;
-typedef int             __kernel_clockid_t;
-typedef int             __kernel_daddr_t;
-typedef char            *__kernel_caddr_t;
-typedef unsigned short  __kernel_uid16_t;
-typedef unsigned short  __kernel_gid16_t;
-typedef unsigned int    __kernel_uid32_t;
-typedef unsigned int    __kernel_gid32_t;
-typedef unsigned int    __kernel_old_uid_t;
-typedef unsigned int    __kernel_old_gid_t;
-typedef unsigned int    __kernel_old_dev_t;
-#ifdef __GNUC__
-typedef long long       __kernel_loff_t;
-#endif
-typedef struct {
-#if defined(__KERNEL__) || defined(__USE_ALL)
-        int     val[2];
-#else /* !defined(__KERNEL__) && !defined(__USE_ALL) */
-        int     __val[2];
-#endif /* !defined(__KERNEL__) && !defined(__USE_ALL) */
-} __kernel_fsid_t;
-#if defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2)
-#undef  __FD_SET
-#define __FD_SET(d, set)        ((set)->fds_bits[__FDELT(d)] |= __FDMASK(d))
-#undef  __FD_CLR
-#define __FD_CLR(d, set)        ((set)->fds_bits[__FDELT(d)] &= ~__FDMASK(d))
-#undef  __FD_ISSET
-#define __FD_ISSET(d, set)      (!!((set)->fds_bits[__FDELT(d)] & __FDMASK(d)))
-#undef  __FD_ZERO
-#define __FD_ZERO(fdsetp) (memset(fdsetp, 0, sizeof(*(fd_set *)fdsetp)))
-#endif /* defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2) */
+#include <asm-generic/posix_types.h>
 #endif /* _ASM_MICROBLAZE_POSIX_TYPES_H */
diff --git a/arch/microblaze/include/asm/scatterlist.h b/arch/microblaze/include/asm/scatterlist.h
index 08ff1d049b42..35d786fe93ae 100644
--- a/arch/microblaze/include/asm/scatterlist.h
+++ b/arch/microblaze/include/asm/scatterlist.h
@@ -1,28 +1 @@
-/*
+#include <asm-generic/scatterlist.h>
- * Copyright (C) 2008 Michal Simek <monstr@monstr.eu>
- * Copyright (C) 2006 Atmark Techno, Inc.
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-#ifndef _ASM_MICROBLAZE_SCATTERLIST_H
-#define _ASM_MICROBLAZE_SCATTERLIST_H
-struct scatterlist {
-#ifdef CONFIG_DEBUG_SG
-        unsigned long   sg_magic;
-#endif
-        unsigned long   page_link;
-        dma_addr_t      dma_address;
-        unsigned int    offset;
-        unsigned int    length;
-};
-#define sg_dma_address(sg)      ((sg)->dma_address)
-#define sg_dma_len(sg)          ((sg)->length)
-#define ISA_DMA_THRESHOLD (~0UL)
-#endif /* _ASM_MICROBLAZE_SCATTERLIST_H */
diff --git a/arch/microblaze/include/asm/sembuf.h b/arch/microblaze/include/asm/sembuf.h
index b804ed71a57e..7673b83cfef7 100644
--- a/arch/microblaze/include/asm/sembuf.h
+++ b/arch/microblaze/include/asm/sembuf.h
@@ -1,34 +1 @@
-/*
+#include <asm-generic/sembuf.h>
- * Copyright (C) 2006 Atmark Techno, Inc.
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-#ifndef _ASM_MICROBLAZE_SEMBUF_H
-#define _ASM_MICROBLAZE_SEMBUF_H
-/*
- * The semid64_ds structure for microblaze architecture.
- * Note extra padding because this structure is passed back and forth
- * between kernel and user space.
- *
- * Pad space is left for:
- * - 64-bit time_t to solve y2038 problem
- * - 2 miscellaneous 32-bit values
- */
-struct semid64_ds {
-        struct ipc64_perm sem_perm; /* permissions .. see ipc.h */
-        __kernel_time_t sem_otime; /* last semop time */
-        unsigned long   __unused1;
-        __kernel_time_t sem_ctime; /* last change time */
-        unsigned long   __unused2;
-        unsigned long   sem_nsems; /* no. of semaphores in array */
-        unsigned long   __unused3;
-        unsigned long   __unused4;
-};
-#endif /* _ASM_MICROBLAZE_SEMBUF_H */
diff --git a/arch/microblaze/include/asm/serial.h b/arch/microblaze/include/asm/serial.h
index 39bfc8ce6af5..a0cb0caff152 100644
--- a/arch/microblaze/include/asm/serial.h
+++ b/arch/microblaze/include/asm/serial.h
@@ -1,14 +1 @@
-/*
+#include <asm-generic/serial.h>
- * Copyright (C) 2009 Michal Simek <monstr@monstr.eu>
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-#ifndef _ASM_MICROBLAZE_SERIAL_H
-#define _ASM_MICROBLAZE_SERIAL_H
-# define BASE_BAUD (1843200 / 16)
-#endif /* _ASM_MICROBLAZE_SERIAL_H */
diff --git a/arch/microblaze/include/asm/shmbuf.h b/arch/microblaze/include/asm/shmbuf.h
index f829c5843618..83c05fc2de38 100644
--- a/arch/microblaze/include/asm/shmbuf.h
+++ b/arch/microblaze/include/asm/shmbuf.h
@@ -1,42 +1 @@
-#ifndef _ASM_MICROBLAZE_SHMBUF_H
+#include <asm-generic/shmbuf.h>
-#define _ASM_MICROBLAZE_SHMBUF_H
-/*
- * The shmid64_ds structure for microblaze architecture.
- * Note extra padding because this structure is passed back and forth
- * between kernel and user space.
- *
- * Pad space is left for:
- * - 64-bit time_t to solve y2038 problem
- * - 2 miscellaneous 32-bit values
- */
-struct shmid64_ds {
-        struct ipc64_perm       shm_perm; /* operation perms */
-        size_t                  shm_segsz; /* size of segment (bytes) */
-        __kernel_time_t         shm_atime; /* last attach time */
-        unsigned long           __unused1;
-        __kernel_time_t         shm_dtime; /* last detach time */
-        unsigned long           __unused2;
-        __kernel_time_t         shm_ctime; /* last change time */
-        unsigned long           __unused3;
-        __kernel_pid_t          shm_cpid; /* pid of creator */
-        __kernel_pid_t          shm_lpid; /* pid of last operator */
-        unsigned long           shm_nattch; /* no. of current attaches */
-        unsigned long           __unused4;
-        unsigned long           __unused5;
-};
-struct shminfo64 {
-        unsigned long   shmmax;
-        unsigned long   shmmin;
-        unsigned long   shmmni;
-        unsigned long   shmseg;
-        unsigned long   shmall;
-        unsigned long   __unused1;
-        unsigned long   __unused2;
-        unsigned long   __unused3;
-        unsigned long   __unused4;
-};
-#endif /* _ASM_MICROBLAZE_SHMBUF_H */
diff --git a/arch/microblaze/include/asm/shmparam.h b/arch/microblaze/include/asm/shmparam.h
index 9f5fc2b3b6a3..93f30deb95d0 100644
--- a/arch/microblaze/include/asm/shmparam.h
+++ b/arch/microblaze/include/asm/shmparam.h
@@ -1,6 +1 @@
-#ifndef _ASM_MICROBLAZE_SHMPARAM_H
+#include <asm-generic/shmparam.h>
-#define _ASM_MICROBLAZE_SHMPARAM_H
-#define SHMLBA  PAGE_SIZE /* attach addr a multiple of this */
-#endif /* _ASM_MICROBLAZE_SHMPARAM_H */
diff --git a/arch/microblaze/include/asm/siginfo.h b/arch/microblaze/include/asm/siginfo.h
index f162911a8f50..0815d29d82e5 100644
--- a/arch/microblaze/include/asm/siginfo.h
+++ b/arch/microblaze/include/asm/siginfo.h
@@ -1,15 +1 @@
-/*
- * Copyright (C) 2006 Atmark Techno, Inc.
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-#ifndef _ASM_MICROBLAZE_SIGINFO_H
-#define _ASM_MICROBLAZE_SIGINFO_H
-#include <linux/types.h>
 #include <asm-generic/siginfo.h>
-#endif /* _ASM_MICROBLAZE_SIGINFO_H */
diff --git a/arch/microblaze/include/asm/signal.h b/arch/microblaze/include/asm/signal.h
index 46bc2267d949..7b1573ce19de 100644
--- a/arch/microblaze/include/asm/signal.h
+++ b/arch/microblaze/include/asm/signal.h
@@ -1,165 +1 @@
-/*
+#include <asm-generic/signal.h>
- * Copyright (C) 2006 Atmark Techno, Inc.
- *      Yasushi SHOJI <yashi@atmark-techno.com>
- *      Tetsuya OHKAWA <tetsuya@atmark-techno.com>
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-#ifndef _ASM_MICROBLAZE_SIGNAL_H
-#define _ASM_MICROBLAZE_SIGNAL_H
-#define SIGHUP          1
-#define SIGINT          2
-#define SIGQUIT         3
-#define SIGILL          4
-#define SIGTRAP         5
-#define SIGABRT         6
-#define SIGIOT          6
-#define SIGBUS          7
-#define SIGFPE          8
-#define SIGKILL         9
-#define SIGUSR1         10
-#define SIGSEGV         11
-#define SIGUSR2         12
-#define SIGPIPE         13
-#define SIGALRM         14
-#define SIGTERM         15
-#define SIGSTKFLT       16
-#define SIGCHLD         17
-#define SIGCONT         18
-#define SIGSTOP         19
-#define SIGTSTP         20
-#define SIGTTIN         21
-#define SIGTTOU         22
-#define SIGURG          23
-#define SIGXCPU         24
-#define SIGXFSZ         25
-#define SIGVTALRM       26
-#define SIGPROF         27
-#define SIGWINCH        28
-#define SIGIO           29
-#define SIGPOLL         SIGIO
-/*
-#define SIGLOST         29
-*/
-#define SIGPWR          30
-#define SIGSYS          31
-#define SIGUNUSED       31
-/* These should not be considered constants from userland. */
-#define SIGRTMIN        32
-#define SIGRTMAX        _NSIG
-/*
- * SA_FLAGS values:
- *
- * SA_ONSTACK indicates that a registered stack_t will be used.
- * SA_RESTART flag to get restarting signals (which were the default long ago)
- * SA_NOCLDSTOP flag to turn off SIGCHLD when children stop.
- * SA_RESETHAND clears the handler when the signal is delivered.
- * SA_NOCLDWAIT flag on SIGCHLD to inhibit zombies.
- * SA_NODEFER prevents the current signal from being masked in the handler.
- *
- * SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single
- * Unix names RESETHAND and NODEFER respectively.
- */
-#define SA_NOCLDSTOP    0x00000001
-#define SA_NOCLDWAIT    0x00000002
-#define SA_SIGINFO      0x00000004
-#define SA_ONSTACK      0x08000000
-#define SA_RESTART      0x10000000
-#define SA_NODEFER      0x40000000
-#define SA_RESETHAND    0x80000000
-#define SA_NOMASK       SA_NODEFER
-#define SA_ONESHOT      SA_RESETHAND
-#define SA_RESTORER     0x04000000
-/*
- * sigaltstack controls
- */
-#define SS_ONSTACK      1
-#define SS_DISABLE      2
-#define MINSIGSTKSZ     2048
-#define SIGSTKSZ        8192
-# ifndef __ASSEMBLY__
-# include <linux/types.h>
-# include <asm-generic/signal-defs.h>
-/* Avoid too many header ordering problems. */
-struct siginfo;
-#  ifdef __KERNEL__
-/*
- * Most things should be clean enough to redefine this at will, if care
- * is taken to make libc match.
- */
-#  define _NSIG         64
-#  define _NSIG_BPW     32
-#  define _NSIG_WORDS   (_NSIG / _NSIG_BPW)
-typedef unsigned long old_sigset_t; /* at least 32 bits */
-typedef struct {
-        unsigned long sig[_NSIG_WORDS];
-} sigset_t;
-struct old_sigaction {
-        __sighandler_t sa_handler;
-        old_sigset_t sa_mask;
-        unsigned long sa_flags;
-        void (*sa_restorer)(void);
-};
-struct sigaction {
-        __sighandler_t sa_handler;
-        unsigned long sa_flags;
-        void (*sa_restorer)(void);
-        sigset_t sa_mask; /* mask last for extensibility */
-};
-struct k_sigaction {
-        struct sigaction sa;
-};
-#  include <asm/sigcontext.h>
-#  undef __HAVE_ARCH_SIG_BITOPS
-#  define ptrace_signal_deliver(regs, cookie) do { } while (0)
-#  else /* !__KERNEL__ */
-/* Here we must cater to libcs that poke about in kernel headers. */
-#  define NSIG          32
-typedef unsigned long sigset_t;
-struct sigaction {
-        union {
-        __sighandler_t _sa_handler;
-        void (*_sa_sigaction)(int, struct siginfo *, void *);
-        } _u;
-        sigset_t sa_mask;
-        unsigned long sa_flags;
-        void (*sa_restorer)(void);
-};
-#  define sa_handler    _u._sa_handler
-#  define sa_sigaction  _u._sa_sigaction
-#  endif /* __KERNEL__ */
-typedef struct sigaltstack {
-        void *ss_sp;
-        int ss_flags;
-        size_t ss_size;
-} stack_t;
-# endif /* __ASSEMBLY__ */
-#endif /* _ASM_MICROBLAZE_SIGNAL_H */
diff --git a/arch/microblaze/include/asm/socket.h b/arch/microblaze/include/asm/socket.h
index 825936860314..6b71384b9d8b 100644
--- a/arch/microblaze/include/asm/socket.h
+++ b/arch/microblaze/include/asm/socket.h
@@ -1,69 +1 @@
-/*
+#include <asm-generic/socket.h>
- * Copyright (C) 2006 Atmark Techno, Inc.
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-#ifndef _ASM_MICROBLAZE_SOCKET_H
-#define _ASM_MICROBLAZE_SOCKET_H
-#include <asm/sockios.h>
-/* For setsockoptions(2) */
-#define SOL_SOCKET      1
-#define SO_DEBUG        1
-#define SO_REUSEADDR    2
-#define SO_TYPE         3
-#define SO_ERROR        4
-#define SO_DONTROUTE    5
-#define SO_BROADCAST    6
-#define SO_SNDBUF       7
-#define SO_RCVBUF       8
-#define SO_SNDBUFFORCE  32
-#define SO_RCVBUFFORCE  33
-#define SO_KEEPALIVE    9
-#define SO_OOBINLINE    10
-#define SO_NO_CHECK     11
-#define SO_PRIORITY     12
-#define SO_LINGER       13
-#define SO_BSDCOMPAT    14
-/* To add :#define SO_REUSEPORT 15 */
-#define SO_PASSCRED     16
-#define SO_PEERCRED     17
-#define SO_RCVLOWAT     18
-#define SO_SNDLOWAT     19
-#define SO_RCVTIMEO     20
-#define SO_SNDTIMEO     21
-/* Security levels - as per NRL IPv6 - don't actually do anything */
-#define SO_SECURITY_AUTHENTICATION              22
-#define SO_SECURITY_ENCRYPTION_TRANSPORT        23
-#define SO_SECURITY_ENCRYPTION_NETWORK          24
-#define SO_BINDTODEVICE 25
-/* Socket filtering */
-#define SO_ATTACH_FILTER        26
-#define SO_DETACH_FILTER        27
-#define SO_PEERNAME             28
-#define SO_TIMESTAMP            29
-#define SCM_TIMESTAMP           SO_TIMESTAMP
-#define SO_ACCEPTCONN           30
-#define SO_PEERSEC              31
-#define SO_PASSSEC              34
-#define SO_TIMESTAMPNS          35
-#define SCM_TIMESTAMPNS         SO_TIMESTAMPNS
-#define SO_MARK                 36
-#define SO_TIMESTAMPING         37
-#define SCM_TIMESTAMPING        SO_TIMESTAMPING
-#endif /* _ASM_MICROBLAZE_SOCKET_H */
diff --git a/arch/microblaze/include/asm/sockios.h b/arch/microblaze/include/asm/sockios.h
index 9fff57a701e1..def6d4746ee7 100644
--- a/arch/microblaze/include/asm/sockios.h
+++ b/arch/microblaze/include/asm/sockios.h
@@ -1,23 +1 @@
-/*
+#include <asm-generic/sockios.h>
- * Copyright (C) 2006 Atmark Techno, Inc.
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-#ifndef _ASM_MICROBLAZE_SOCKIOS_H
-#define _ASM_MICROBLAZE_SOCKIOS_H
-#include <linux/ioctl.h>
-/* Socket-level I/O control calls. */
-#define FIOSETOWN       0x8901
-#define SIOCSPGRP       0x8902
-#define FIOGETOWN       0x8903
-#define SIOCGPGRP       0x8904
-#define SIOCATMARK      0x8905
-#define SIOCGSTAMP      0x8906          /* Get stamp (timeval) */
-#define SIOCGSTAMPNS    0x8907          /* Get stamp (timespec) */
-#endif /* _ASM_MICROBLAZE_SOCKIOS_H */
diff --git a/arch/microblaze/include/asm/stat.h b/arch/microblaze/include/asm/stat.h
index a15f77520bfd..3dc90fa92c70 100644
--- a/arch/microblaze/include/asm/stat.h
+++ b/arch/microblaze/include/asm/stat.h
@@ -1,68 +1 @@
-/*
+#include <asm-generic/stat.h>
- * Microblaze stat structure
- *
- * Copyright (C) 2001,02,03 NEC Electronics Corporation
- * Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org>
- *
- * This file is subject to the terms and conditions of the GNU General
- * Public License. See the file COPYING in the main directory of this
- * archive for more details.
- *
- * Written by Miles Bader <miles@gnu.org>
- */
-#ifndef _ASM_MICROBLAZE_STAT_H
-#define _ASM_MICROBLAZE_STAT_H
-#include <linux/posix_types.h>
-#define STAT_HAVE_NSEC 1
-struct stat {
-        unsigned long   st_dev;
-        unsigned long   st_ino;
-        unsigned int    st_mode;
-        unsigned int    st_nlink;
-        unsigned int    st_uid;
-        unsigned int    st_gid;
-        unsigned long   st_rdev;
-        unsigned long   __pad1;
-        long            st_size;
-        int             st_blksize;
-        int             __pad2;
-        long            st_blocks;
-        int             st_atime;
-        unsigned int    st_atime_nsec;
-        int             st_mtime;
-        unsigned int    st_mtime_nsec;
-        int             st_ctime;
-        unsigned int    st_ctime_nsec;
-        unsigned long   __unused4;
-        unsigned long   __unused5;
-};
-struct stat64 {
-        unsigned long long      st_dev;         /* Device.  */
-        unsigned long long      st_ino;         /* File serial number.  */
-        unsigned int            st_mode;        /* File mode.  */
-        unsigned int            st_nlink;       /* Link count.  */
-        unsigned int            st_uid;         /* User ID of the file's owner.  */
-        unsigned int            st_gid;         /* Group ID of the file's group. */
-        unsigned long long      st_rdev;        /* Device number, if device.  */
-        unsigned long long      __pad1;
-        long long               st_size;        /* Size of file, in bytes.  */
-        int                     st_blksize;     /* Optimal block size for I/O.  */
-        int                     __pad2;
-        long long               st_blocks;      /* Number 512-byte blocks allocated. */
-        int                     st_atime;       /* Time of last access.  */
-        unsigned int            st_atime_nsec;
-        int                     st_mtime;       /* Time of last modification.  */
-        unsigned int            st_mtime_nsec;
-        int                     st_ctime;       /* Time of last status change.  */
-        unsigned int            st_ctime_nsec;
-        unsigned int            __unused4;
-        unsigned int            __unused5;
-};
-#endif /* _ASM_MICROBLAZE_STAT_H */
diff --git a/arch/microblaze/include/asm/swab.h b/arch/microblaze/include/asm/swab.h
index b375d7b65ad7..7847e563ab66 100644
--- a/arch/microblaze/include/asm/swab.h
+++ b/arch/microblaze/include/asm/swab.h
@@ -1,8 +1 @@
-#ifndef _ASM_MICROBLAZE_SWAB_H
+#include <asm-generic/swab.h>
-#define _ASM_MICROBLAZE_SWAB_H
-#if defined(__GNUC__) && !defined(__STRICT_ANSI__) || defined(__KERNEL__)
-#define __SWAB_64_THRU_32__
-#endif
-#endif /* _ASM_MICROBLAZE_SWAB_H */
diff --git a/arch/microblaze/include/asm/syscalls.h b/arch/microblaze/include/asm/syscalls.h
index ddea9eb31f8d..720761cc741f 100644
--- a/arch/microblaze/include/asm/syscalls.h
+++ b/arch/microblaze/include/asm/syscalls.h
@@ -1,48 +1,8 @@
 #ifndef __ASM_MICROBLAZE_SYSCALLS_H
-#define __ASM_MICROBLAZE_SYSCALLS_H
-#ifdef __KERNEL__
-#include <linux/compiler.h>
+asmlinkage long sys_clone(int flags, unsigned long stack, struct pt_regs *regs);
-#include <linux/linkage.h>
+#define sys_clone sys_clone
-#include <linux/types.h>
-#include <linux/signal.h>
-/* FIXME will be removed */
+#include <asm-generic/syscalls.h>
-asmlinkage int sys_ipc(uint call, int first, int second,
-                                int third, void *ptr, long fifth);
-struct pt_regs;
-asmlinkage int sys_vfork(struct pt_regs *regs);
-asmlinkage int sys_clone(int flags, unsigned long stack, struct pt_regs *regs);
-asmlinkage int sys_execve(char __user *filenamei, char __user *__user *argv,
-                        char __user *__user *envp, struct pt_regs *regs);
-asmlinkage unsigned long sys_mmap2(unsigned long addr, size_t len,
-                        unsigned long prot, unsigned long flags,
-                        unsigned long fd, unsigned long pgoff);
-asmlinkage unsigned long sys_mmap(unsigned long addr, size_t len,
-                        unsigned long prot, unsigned long flags,
-                        unsigned long fd, off_t offset);
-/* from signal.c */
-asmlinkage int sys_sigsuspend(old_sigset_t mask, struct pt_regs *regs);
-asmlinkage int sys_rt_sigsuspend(sigset_t __user *unewset, size_t sigsetsize,
-                struct pt_regs *regs);
-asmlinkage int sys_sigaction(int sig, const struct old_sigaction *act,
-                struct old_sigaction *oact);
-asmlinkage long sys_rt_sigaction(int sig, const struct sigaction __user *act,
-                struct sigaction __user *oact, size_t sigsetsize);
-asmlinkage int sys_sigaltstack(const stack_t __user *uss, stack_t __user *uoss,
-                struct pt_regs *regs);
-asmlinkage int sys_sigreturn(struct pt_regs *regs);
-asmlinkage int sys_rt_sigreturn(struct pt_regs *regs);
-#endif /* __KERNEL__ */
 #endif /* __ASM_MICROBLAZE_SYSCALLS_H */
diff --git a/arch/microblaze/include/asm/system.h b/arch/microblaze/include/asm/system.h
index c4e308850b5d..b1ed61590660 100644
--- a/arch/microblaze/include/asm/system.h
+++ b/arch/microblaze/include/asm/system.h
@@ -13,6 +13,9 @@
 #include <asm/setup.h>
 #include <asm/irqflags.h>
+#include <asm-generic/cmpxchg.h>
+#include <asm-generic/cmpxchg-local.h>
 struct task_struct;
 struct thread_info;
diff --git a/arch/microblaze/include/asm/termbits.h b/arch/microblaze/include/asm/termbits.h
index a1b64bc4724a..3935b106de79 100644
--- a/arch/microblaze/include/asm/termbits.h
+++ b/arch/microblaze/include/asm/termbits.h
@@ -1,203 +1 @@
-/*
+#include <asm-generic/termbits.h>
- * Copyright (C) 2006 Atmark Techno, Inc.
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-#ifndef _ASM_MICROBLAZE_TERMBITS_H
-#define _ASM_MICROBLAZE_TERMBITS_H
-#include <linux/posix_types.h>
-typedef unsigned char   cc_t;
-typedef unsigned int    speed_t;
-typedef unsigned int    tcflag_t;
-#define NCCS 19
-struct termios {
-        tcflag_t c_iflag; /* input mode flags */
-        tcflag_t c_oflag; /* output mode flags */
-        tcflag_t c_cflag; /* control mode flags */
-        tcflag_t c_lflag; /* local mode flags */
-        cc_t c_line; /* line discipline */
-        cc_t c_cc[NCCS]; /* control characters */
-};
-struct ktermios {
-        tcflag_t c_iflag; /* input mode flags */
-        tcflag_t c_oflag; /* output mode flags */
-        tcflag_t c_cflag; /* control mode flags */
-        tcflag_t c_lflag; /* local mode flags */
-        cc_t c_line; /* line discipline */
-        cc_t c_cc[NCCS]; /* control characters */
-        speed_t c_ispeed; /* input speed */
-        speed_t c_ospeed; /* output speed */
-};
-/* c_cc characters */
-#define VINTR 0
-#define VQUIT 1
-#define VERASE 2
-#define VKILL 3
-#define VEOF 4
-#define VTIME 5
-#define VMIN 6
-#define VSWTC 7
-#define VSTART 8
-#define VSTOP 9
-#define VSUSP 10
-#define VEOL 11
-#define VREPRINT 12
-#define VDISCARD 13
-#define VWERASE 14
-#define VLNEXT 15
-#define VEOL2 16
-/* c_iflag bits */
-#define IGNBRK  0000001
-#define BRKINT  0000002
-#define IGNPAR  0000004
-#define PARMRK  0000010
-#define INPCK   0000020
-#define ISTRIP  0000040
-#define INLCR   0000100
-#define IGNCR   0000200
-#define ICRNL   0000400
-#define IUCLC   0001000
-#define IXON    0002000
-#define IXANY   0004000
-#define IXOFF   0010000
-#define IMAXBEL 0020000
-#define IUTF8   0040000
-/* c_oflag bits */
-#define OPOST   0000001
-#define OLCUC   0000002
-#define ONLCR   0000004
-#define OCRNL   0000010
-#define ONOCR   0000020
-#define ONLRET  0000040
-#define OFILL   0000100
-#define OFDEL   0000200
-#define NLDLY   0000400
-#define NL0     0000000
-#define NL1     0000400
-#define CRDLY   0003000
-#define CR0     0000000
-#define CR1     0001000
-#define CR2     0002000
-#define CR3     0003000
-#define TABDLY  0014000
-#define TAB0    0000000
-#define TAB1    0004000
-#define TAB2    0010000
-#define TAB3    0014000
-#define XTABS   0014000
-#define BSDLY   0020000
-#define BS0     0000000
-#define BS1     0020000
-#define VTDLY   0040000
-#define VT0     0000000
-#define VT1     0040000
-#define FFDLY   0100000
-#define FF0     0000000
-#define FF1     0100000
-/* c_cflag bit meaning */
-#define CBAUD   0010017
-#define B0      0000000 /* hang up */
-#define B50     0000001
-#define B75     0000002
-#define B110    0000003
-#define B134    0000004
-#define B150    0000005
-#define B200    0000006
-#define B300    0000007
-#define B600    0000010
-#define B1200   0000011
-#define B1800   0000012
-#define B2400   0000013
-#define B4800   0000014
-#define B9600   0000015
-#define B19200  0000016
-#define B38400  0000017
-#define EXTA B19200
-#define EXTB B38400
-#define CSIZE   0000060
-#define CS5     0000000
-#define CS6     0000020
-#define CS7     0000040
-#define CS8     0000060
-#define CSTOPB  0000100
-#define CREAD   0000200
-#define PARENB  0000400
-#define PARODD  0001000
-#define HUPCL   0002000
-#define CLOCAL  0004000
-#define CBAUDEX 0010000
-#define B57600  0010001
-#define B115200 0010002
-#define B230400 0010003
-#define B460800 0010004
-#define B500000 0010005
-#define B576000 0010006
-#define B921600 0010007
-#define BOTHER          0010000
-#define B1000000        0010010
-#define B1152000        0010011
-#define B1500000        0010012
-#define B2000000        0010013
-#define B2500000        0010014
-#define B3000000        0010015
-#define B3500000        0010016
-#define B4000000        0010017
-#define CIBAUD          002003600000 /* input baud rate (not used) */
-#define CMSPAR          010000000000 /* mark or space (stick) parity */
-#define CRTSCTS         020000000000 /* flow control */
-#define IBSHIFT 16              /* Shift from CBAUD to CIBAUD */
-/* c_lflag bits */
-#define ISIG    0000001
-#define ICANON  0000002
-#define XCASE   0000004
-#define ECHO    0000010
-#define ECHOE   0000020
-#define ECHOK   0000040
-#define ECHONL  0000100
-#define NOFLSH  0000200
-#define TOSTOP  0000400
-#define ECHOCTL 0001000
-#define ECHOPRT 0002000
-#define ECHOKE  0004000
-#define FLUSHO  0010000
-#define PENDIN  0040000
-#define IEXTEN  0100000
-/* tcflow() and TCXONC use these */
-#define TCOOFF          0
-#define TCOON           1
-#define TCIOFF          2
-#define TCION           3
-/* tcflush() and TCFLSH use these */
-#define TCIFLUSH        0
-#define TCOFLUSH        1
-#define TCIOFLUSH       2
-/* tcsetattr uses these */
-#define TCSANOW         0
-#define TCSADRAIN       1
-#define TCSAFLUSH       2
-#endif /* _ASM_MICROBLAZE_TERMBITS_H */
diff --git a/arch/microblaze/include/asm/termios.h b/arch/microblaze/include/asm/termios.h
index 47a46d1fbe26..280d78a9d966 100644
--- a/arch/microblaze/include/asm/termios.h
+++ b/arch/microblaze/include/asm/termios.h
@@ -1,88 +1 @@
-/*
+#include <asm-generic/termios.h>
- * Copyright (C) 2006 Atmark Techno, Inc.
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-#ifndef _ASM_MICROBLAZE_TERMIOS_H
-#define _ASM_MICROBLAZE_TERMIOS_H
-#include <linux/string.h>
-#include <asm/termbits.h>
-#include <asm/ioctls.h>
-struct winsize {
-        unsigned short ws_row;
-        unsigned short ws_col;
-        unsigned short ws_xpixel;
-        unsigned short ws_ypixel;
-};
-#define NCC 8
-struct termio {
-        unsigned short c_iflag; /* input mode flags */
-        unsigned short c_oflag; /* output mode flags */
-        unsigned short c_cflag; /* control mode flags */
-        unsigned short c_lflag; /* local mode flags */
-        unsigned char c_line; /* line discipline */
-        unsigned char c_cc[NCC]; /* control characters */
-};
-#ifdef __KERNEL__
-/*      intr=^C         quit=^|         erase=del       kill=^U
-        eof=^D          vtime=\0        vmin=\1         sxtc=\0
-        start=^Q        stop=^S         susp=^Z         eol=\0
-        reprint=^R      discard=^U      werase=^W       lnext=^V
-        eol2=\0
-*/
-#define INIT_C_CC "\003\034\177\025\004\0\1\0\021\023\032\0\022\017\027\026\0"
-#endif
-/* Modem lines */
-#define TIOCM_LE        0x001
-#define TIOCM_DTR       0x002
-#define TIOCM_RTS       0x004
-#define TIOCM_ST        0x008
-#define TIOCM_SR        0x010
-#define TIOCM_CTS       0x020
-#define TIOCM_CAR       0x040
-#define TIOCM_RNG       0x080
-#define TIOCM_DSR       0x100
-#define TIOCM_CD        TIOCM_CAR
-#define TIOCM_RI        TIOCM_RNG
-#define TIOCM_OUT1      0x2000
-#define TIOCM_OUT2      0x4000
-#define TIOCM_LOOP      0x8000
-/* ioctl (fd, TIOCSERGETLSR, &result) where result may be as below */
-/* Line disciplines */
-#define N_TTY           0
-#define N_SLIP          1
-#define N_MOUSE         2
-#define N_PPP           3
-#define N_STRIP         4
-#define N_AX25          5
-#define N_X25           6 /* X.25 async */
-#define N_6PACK         7
-#define N_MASC          8 /* Reserved for Mobitex module <kaz@cafe.net> */
-#define N_R3964         9 /* Reserved for Simatic R3964 module */
-#define N_PROFIBUS_FDL  10 /* Reserved for Profibus <Dave@mvhi.com> */
-#define N_IRDA          11 /* Linux IR - http://irda.sourceforge.net/ */
-#define N_SMSBLOCK      12 /* SMS block mode - for talking to GSM data cards
-                                about SMS messages */
-#define N_HDLC          13 /* synchronous HDLC */
-#define N_SYNC_PPP      14
-#define N_HCI           15 /* Bluetooth HCI UART */
-#ifdef __KERNEL__
-#include <asm-generic/termios-base.h>
-#endif  /* __KERNEL__ */
-#endif /* _ASM_MICROBLAZE_TERMIOS_H */
diff --git a/arch/microblaze/include/asm/timex.h b/arch/microblaze/include/asm/timex.h
index 678525dc6d0b..befcf3de5532 100644
--- a/arch/microblaze/include/asm/timex.h
+++ b/arch/microblaze/include/asm/timex.h
@@ -9,10 +9,8 @@
 #ifndef _ASM_MICROBLAZE_TIMEX_H
 #define _ASM_MICROBLAZE_TIMEX_H
-#define CLOCK_TICK_RATE 1000 /* Timer input freq. */
+#include <asm-generic/timex.h>
-typedef unsigned long cycles_t;
-#define get_cycles()    (0)
+#define CLOCK_TICK_RATE 1000 /* Timer input freq. */
 #endif /* _ASM_TIMEX_H */
diff --git a/arch/microblaze/include/asm/types.h b/arch/microblaze/include/asm/types.h
index bebc018318f5..b9e79bc580dd 100644
--- a/arch/microblaze/include/asm/types.h
+++ b/arch/microblaze/include/asm/types.h
@@ -1,38 +1 @@
-/*
+#include <asm-generic/types.h>
- * Copyright (C) Atmark Techno, Inc.
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-#ifndef _ASM_MICROBLAZE_TYPES_H
-#define _ASM_MICROBLAZE_TYPES_H
-/*
- * This file is never included by application software unless
- * explicitly requested (e.g., via linux/types.h) in which case the
- * application is Linux specific so (user-) name space pollution is
- * not a major issue.  However, for interoperability, libraries still
- * need to be careful to avoid a name clashes.
- */
-#include <asm-generic/int-ll64.h>
-# ifndef __ASSEMBLY__
-typedef unsigned short umode_t;
-/*
- * These aren't exported outside the kernel to avoid name space clashes
- */
-#  ifdef __KERNEL__
-#  define BITS_PER_LONG 32
-/* Dma addresses are 32-bits wide. */
-typedef u32 dma_addr_t;
-#  endif/* __KERNEL__ */
-# endif /* __ASSEMBLY__ */
-#endif /* _ASM_MICROBLAZE_TYPES_H */
diff --git a/arch/microblaze/include/asm/ucontext.h b/arch/microblaze/include/asm/ucontext.h
index 11f6bb3ae3a4..9bc07b9f30fb 100644
--- a/arch/microblaze/include/asm/ucontext.h
+++ b/arch/microblaze/include/asm/ucontext.h
@@ -1,22 +1 @@
-/*
+#include <asm-generic/ucontext.h>
- * Copyright (C) 2006 Atmark Techno, Inc.
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-#ifndef _ASM_MICROBLAZE_UCONTEXT_H
-#define _ASM_MICROBLAZE_UCONTEXT_H
-#include <asm/sigcontext.h>
-struct ucontext {
-        unsigned long           uc_flags;
-        struct ucontext         *uc_link;
-        stack_t                 uc_stack;
-        struct sigcontext       uc_mcontext;
-        sigset_t                uc_sigmask; /* mask last for extensibility */
-};
-#endif /* _ASM_MICROBLAZE_UCONTEXT_H */
diff --git a/arch/microblaze/include/asm/unistd.h b/arch/microblaze/include/asm/unistd.h
index b5e2f5fa5c53..0b852327c0e7 100644
--- a/arch/microblaze/include/asm/unistd.h
+++ b/arch/microblaze/include/asm/unistd.h
@@ -380,8 +380,10 @@
 #define __NR_accept04           362 /* new */
 #define __NR_preadv             363 /* new */
 #define __NR_pwritev            364 /* new */
+#define __NR_rt_tgsigqueueinfo  365 /* new */
+#define __NR_perf_counter_open  366 /* new */
-#define __NR_syscalls           365
+#define __NR_syscalls           367
 #ifdef __KERNEL__
 #ifndef __ASSEMBLY__
@@ -408,7 +410,7 @@
 #define __ARCH_WANT_SYS_SIGPENDING
 #define __ARCH_WANT_SYS_SIGPROCMASK
 #define __ARCH_WANT_SYS_RT_SIGACTION
-/* #define __ARCH_WANT_SYS_RT_SIGSUSPEND */
+#define __ARCH_WANT_SYS_RT_SIGSUSPEND
 /*
 * "Conditional" syscalls
diff --git a/arch/microblaze/include/asm/vga.h b/arch/microblaze/include/asm/vga.h
index 8b137891791f..89d82fd8fcf1 100644
--- a/arch/microblaze/include/asm/vga.h
+++ b/arch/microblaze/include/asm/vga.h
@@ -1 +1 @@
+#include <asm-generic/vga.h>
diff --git a/arch/microblaze/kernel/entry-nommu.S b/arch/microblaze/kernel/entry-nommu.S
index 1fce6b803f54..9083d85376a4 100644
--- a/arch/microblaze/kernel/entry-nommu.S
+++ b/arch/microblaze/kernel/entry-nommu.S
@@ -551,30 +551,22 @@ no_work_pending:
        rtid    r14, 0
        nop
-sys_vfork_wrapper:
+sys_vfork:
-        brid    sys_vfork
+        brid    microblaze_vfork
        addk    r5, r1, r0
-sys_clone_wrapper:
+sys_clone:
-        brid    sys_clone
+        brid    microblaze_clone
        addk    r7, r1, r0
-sys_execve_wrapper:
+sys_execve:
-        brid    sys_execve
+        brid    microblaze_execve
        addk    r8, r1, r0
-sys_sigreturn_wrapper:
-        brid    sys_sigreturn
-        addk    r5, r1, r0
 sys_rt_sigreturn_wrapper:
        brid    sys_rt_sigreturn
        addk    r5, r1, r0
-sys_sigsuspend_wrapper:
-        brid    sys_rt_sigsuspend
-        addk    r6, r1, r0
 sys_rt_sigsuspend_wrapper:
        brid    sys_rt_sigsuspend
        addk    r7, r1, r0
diff --git a/arch/microblaze/kernel/entry.S b/arch/microblaze/kernel/entry.S
index 91a0e7b185dd..c7353e79f4a2 100644
--- a/arch/microblaze/kernel/entry.S
+++ b/arch/microblaze/kernel/entry.S
@@ -429,12 +429,11 @@ C_ENTRY(ret_from_fork):
        brid    ret_from_trap;  /* Do normal trap return */
        nop;
-C_ENTRY(sys_vfork_wrapper):
+C_ENTRY(sys_vfork):
+        brid    microblaze_vfork        /* Do real work (tail-call) */
        la      r5, r1, PTO
-        brid    sys_vfork       /* Do real work (tail-call) */
-        nop
-C_ENTRY(sys_clone_wrapper):
+C_ENTRY(sys_clone):
        bnei    r6, 1f;                 /* See if child SP arg (arg 1) is 0. */
        lwi     r6, r1, PTO+PT_R1;      /* If so, use paret's stack ptr */
 1:      la      r7, r1, PTO;                    /* Arg 2: parent context */
@@ -444,20 +443,9 @@ C_ENTRY(sys_clone_wrapper):
        brid    do_fork         /* Do real work (tail-call) */
        nop;
-C_ENTRY(sys_execve_wrapper):
+C_ENTRY(sys_execve):
        la      r8, r1, PTO;            /* add user context as 4th arg */
-        brid    sys_execve;     /* Do real work (tail-call).*/
+        brid    microblaze_execve;      /* Do real work (tail-call).*/
-        nop;
-C_ENTRY(sys_sigsuspend_wrapper):
-        swi     r3, r1, PTO+PT_R3; /* restore saved r3, r4 registers */
-        swi     r4, r1, PTO+PT_R4;
-        la      r6, r1, PTO;            /* add user context as 2nd arg */
-        bralid  r15, sys_sigsuspend; /* Do real work.*/
-        nop;
-        lwi     r3, r1, PTO+PT_R3; /* restore saved r3, r4 registers */
-        lwi     r4, r1, PTO+PT_R4;
-        bri ret_from_trap /* fall through will not work here due to align */
        nop;
 C_ENTRY(sys_rt_sigsuspend_wrapper):
@@ -471,18 +459,6 @@ C_ENTRY(sys_rt_sigsuspend_wrapper):
        bri ret_from_trap /* fall through will not work here due to align */
        nop;
-C_ENTRY(sys_sigreturn_wrapper):
-        swi     r3, r1, PTO+PT_R3; /* restore saved r3, r4 registers */
-        swi     r4, r1, PTO+PT_R4;
-        la      r5, r1, PTO;            /* add user context as 1st arg */
-        brlid   r15, sys_sigreturn;     /* Do real work.*/
-        nop;
-        lwi     r3, r1, PTO+PT_R3; /* restore saved r3, r4 registers */
-        lwi     r4, r1, PTO+PT_R4;
-        bri ret_from_trap /* fall through will not work here due to align */
-        nop;
 C_ENTRY(sys_rt_sigreturn_wrapper):
        swi     r3, r1, PTO+PT_R3; /* restore saved r3, r4 registers */
        swi     r4, r1, PTO+PT_R4;
diff --git a/arch/microblaze/kernel/signal.c b/arch/microblaze/kernel/signal.c
index 4c0e6521b114..493819c25fba 100644
--- a/arch/microblaze/kernel/signal.c
+++ b/arch/microblaze/kernel/signal.c
@@ -45,91 +45,8 @@
 asmlinkage int do_signal(struct pt_regs *regs, sigset_t *oldset, int in_sycall);
-/*
- * Atomically swap in the new signal mask, and wait for a signal.
- */
-asmlinkage int
-sys_sigsuspend(old_sigset_t mask, struct pt_regs *regs)
-{
-        sigset_t saveset;
-        mask &= _BLOCKABLE;
-        spin_lock_irq(&current->sighand->siglock);
-        saveset = current->blocked;
-        siginitset(&current->blocked, mask);
-        recalc_sigpending();
-        spin_unlock_irq(&current->sighand->siglock);
-        regs->r3 = -EINTR;
-        while (1) {
-                current->state = TASK_INTERRUPTIBLE;
-                schedule();
-                if (do_signal(regs, &saveset, 1))
-                        return -EINTR;
-        }
-}
-asmlinkage int
-sys_rt_sigsuspend(sigset_t __user *unewset, size_t sigsetsize,
-                struct pt_regs *regs)
-{
-        sigset_t saveset, newset;
-        /* XXX: Don't preclude handling different sized sigset_t's. */
-        if (sigsetsize != sizeof(sigset_t))
-                return -EINVAL;
-        if (copy_from_user(&newset, unewset, sizeof(newset)))
-                return -EFAULT;
-        sigdelsetmask(&newset, ~_BLOCKABLE);
-        spin_lock_irq(&current->sighand->siglock);
-        saveset = current->blocked;
-        current->blocked = newset;
-        recalc_sigpending();
-        spin_unlock_irq(&current->sighand->siglock);
-        regs->r3 = -EINTR;
-        while (1) {
-                current->state = TASK_INTERRUPTIBLE;
-                schedule();
-                if (do_signal(regs, &saveset, 1))
-                        return -EINTR;
-        }
-}
-asmlinkage int
-sys_sigaction(int sig, const struct old_sigaction *act,
-                struct old_sigaction *oact)
-{
-        struct k_sigaction new_ka, old_ka;
-        int ret;
-        if (act) {
-                old_sigset_t mask;
-                if (!access_ok(VERIFY_READ, act, sizeof(*act)) ||
-                        __get_user(new_ka.sa.sa_handler, &act->sa_handler) ||
-                        __get_user(new_ka.sa.sa_restorer, &act->sa_restorer))
-                        return -EFAULT;
-                __get_user(new_ka.sa.sa_flags, &act->sa_flags);
-                __get_user(mask, &act->sa_mask);
-                siginitset(&new_ka.sa.sa_mask, mask);
-        }
-        ret = do_sigaction(sig, act ? &new_ka : NULL, oact ? &old_ka : NULL);
+asmlinkage long
-        if (!ret && oact) {
-                if (!access_ok(VERIFY_WRITE, oact, sizeof(*oact)) ||
-                        __put_user(old_ka.sa.sa_handler, &oact->sa_handler) ||
-                        __put_user(old_ka.sa.sa_restorer, &oact->sa_restorer))
-                        return -EFAULT;
-                __put_user(old_ka.sa.sa_flags, &oact->sa_flags);
-                __put_user(old_ka.sa.sa_mask.sig[0], &oact->sa_mask);
-        }
-        return ret;
-}
-asmlinkage int
 sys_sigaltstack(const stack_t __user *uss, stack_t __user *uoss,
                struct pt_regs *regs)
 {
@@ -139,7 +56,6 @@ sys_sigaltstack(const stack_t __user *uss, stack_t __user *uoss,
 /*
 * Do a signal return; undo the signal stack.
 */
 struct sigframe {
        struct sigcontext sc;
        unsigned long extramask[_NSIG_WORDS-1];
@@ -176,40 +92,7 @@ static int restore_sigcontext(struct pt_regs *regs,
        return err;
 }
-asmlinkage int sys_sigreturn(struct pt_regs *regs)
+asmlinkage long sys_rt_sigreturn(struct pt_regs *regs)
-{
-        struct sigframe *frame =
-                        (struct sigframe *)(regs->r1 + STATE_SAVE_ARG_SPACE);
-        sigset_t set;
-        int rval;
-        if (!access_ok(VERIFY_READ, frame, sizeof(*frame)))
-                goto badframe;
-        if (__get_user(set.sig[0], &frame->sc.oldmask)
-                || (_NSIG_WORDS > 1
-                && __copy_from_user(&set.sig[1], &frame->extramask,
-                                        sizeof(frame->extramask))))
-                goto badframe;
-        sigdelsetmask(&set, ~_BLOCKABLE);
-        spin_lock_irq(&current->sighand->siglock);
-        current->blocked = set;
-        recalc_sigpending();
-        spin_unlock_irq(&current->sighand->siglock);
-        if (restore_sigcontext(regs, &frame->sc, &rval))
-                goto badframe;
-        return rval;
-badframe:
-        force_sig(SIGSEGV, current);
-        return 0;
-}
-asmlinkage int sys_rt_sigreturn(struct pt_regs *regs)
 {
        struct rt_sigframe __user *frame =
                (struct rt_sigframe __user *)(regs->r1 + STATE_SAVE_ARG_SPACE);
@@ -324,21 +207,17 @@ static void setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
        /* Set up to return from userspace. If provided, use a stub
         already in userspace. */
        /* minus 8 is offset to cater for "rtsd r15,8" */
-        if (ka->sa.sa_flags & SA_RESTORER) {
+        /* addi r12, r0, __NR_sigreturn */
-                regs->r15 = ((unsigned long)ka->sa.sa_restorer)-8;
+        err |= __put_user(0x31800000 | __NR_rt_sigreturn ,
-        } else {
+                        frame->tramp + 0);
-                /* addi r12, r0, __NR_sigreturn */
+        /* brki r14, 0x8 */
-                err |= __put_user(0x31800000 | __NR_rt_sigreturn ,
+        err |= __put_user(0xb9cc0008, frame->tramp + 1);
-                                frame->tramp + 0);
-                /* brki r14, 0x8 */
+        /* Return from sighandler will jump to the tramp.
-                err |= __put_user(0xb9cc0008, frame->tramp + 1);
+         Negative 8 offset because return is rtsd r15, 8 */
+        regs->r15 = ((unsigned long)frame->tramp)-8;
-                /* Return from sighandler will jump to the tramp.
-                 Negative 8 offset because return is rtsd r15, 8 */
+        __invalidate_cache_sigtramp((unsigned long)frame->tramp);
-                regs->r15 = ((unsigned long)frame->tramp)-8;
-                __invalidate_cache_sigtramp((unsigned long)frame->tramp);
-        }
        if (err)
                goto give_sigsegv;
@@ -405,7 +284,7 @@ do_restart:
 * OK, we're invoking a handler
 */
-static void
+static int
 handle_signal(unsigned long sig, struct k_sigaction *ka,
                siginfo_t *info, sigset_t *oldset, struct pt_regs *regs)
 {
@@ -426,6 +305,7 @@ handle_signal(unsigned long sig, struct k_sigaction *ka,
                recalc_sigpending();
                spin_unlock_irq(&current->sighand->siglock);
        }
+        return 1;
 }
 /*
@@ -456,7 +336,9 @@ int do_signal(struct pt_regs *regs, sigset_t *oldset, int in_syscall)
        if (kernel_mode(regs))
                return 1;
-        if (!oldset)
+        if (current_thread_info()->status & TS_RESTORE_SIGMASK)
+                oldset = &current->saved_sigmask;
+        else
                oldset = &current->blocked;
        signr = get_signal_to_deliver(&info, &ka, regs, NULL);
@@ -464,13 +346,31 @@ int do_signal(struct pt_regs *regs, sigset_t *oldset, int in_syscall)
                /* Whee! Actually deliver the signal. */
                if (in_syscall)
                        handle_restart(regs, &ka, 1);
-                handle_signal(signr, &ka, &info, oldset, regs);
+                if (handle_signal(signr, &ka, &info, oldset, regs)) {
+                        /*
+                         * A signal was successfully delivered; the saved
+                         * sigmask will have been stored in the signal frame,
+                         * and will be restored by sigreturn, so we can simply
+                         * clear the TS_RESTORE_SIGMASK flag.
+                         */
+                        current_thread_info()->status &=
+                            ~TS_RESTORE_SIGMASK;
+                }
                return 1;
        }
        if (in_syscall)
                handle_restart(regs, NULL, 0);
+        /*
+         * If there's no signal to deliver, we just put the saved sigmask
+         * back.
+         */
+        if (current_thread_info()->status & TS_RESTORE_SIGMASK) {
+                current_thread_info()->status &= ~TS_RESTORE_SIGMASK;
+                sigprocmask(SIG_SETMASK, &current->saved_sigmask, NULL);
+        }
        /* Did we come from a system call? */
        return 0;
 }
diff --git a/arch/microblaze/kernel/sys_microblaze.c b/arch/microblaze/kernel/sys_microblaze.c
index 31905ff590b7..8c9ebac5da10 100644
--- a/arch/microblaze/kernel/sys_microblaze.c
+++ b/arch/microblaze/kernel/sys_microblaze.c
@@ -39,7 +39,7 @@
 *
 * This is really horribly ugly. This will be remove with new toolchain.
 */
-asmlinkage int
+asmlinkage long
 sys_ipc(uint call, int first, int second, int third, void *ptr, long fifth)
 {
        int version, ret;
@@ -134,20 +134,20 @@ sys_ipc(uint call, int first, int second, int third, void *ptr, long fifth)
        return ret;
 }
-asmlinkage int sys_vfork(struct pt_regs *regs)
+asmlinkage long microblaze_vfork(struct pt_regs *regs)
 {
        return do_fork(CLONE_VFORK | CLONE_VM | SIGCHLD, regs->r1,
                                                regs, 0, NULL, NULL);
 }
-asmlinkage int sys_clone(int flags, unsigned long stack, struct pt_regs *regs)
+asmlinkage long microblaze_clone(int flags, unsigned long stack, struct pt_regs *regs)
 {
        if (!stack)
                stack = regs->r1;
        return do_fork(flags, stack, regs, 0, NULL, NULL);
 }
-asmlinkage int sys_execve(char __user *filenamei, char __user *__user *argv,
+asmlinkage long microblaze_execve(char __user *filenamei, char __user *__user *argv,
                        char __user *__user *envp, struct pt_regs *regs)
 {
        int error;
@@ -163,8 +163,8 @@ out:
        return error;
 }
-asmlinkage unsigned long
+asmlinkage long
-sys_mmap2(unsigned long addr, size_t len,
+sys_mmap2(unsigned long addr, unsigned long len,
        unsigned long prot, unsigned long flags,
        unsigned long fd, unsigned long pgoff)
 {
@@ -189,18 +189,18 @@ out:
        return ret;
 }
-asmlinkage unsigned long sys_mmap(unsigned long addr, size_t len,
+asmlinkage long sys_mmap(unsigned long addr, unsigned long len,
                        unsigned long prot, unsigned long flags,
-                        unsigned long fd, off_t offset)
+                        unsigned long fd, off_t pgoff)
 {
        int err = -EINVAL;
-        if (offset & ~PAGE_MASK) {
+        if (pgoff & ~PAGE_MASK) {
                printk(KERN_INFO "no pagemask in mmap\r\n");
                goto out;
        }
-        err = sys_mmap2(addr, len, prot, flags, fd, offset >> PAGE_SHIFT);
+        err = sys_mmap2(addr, len, prot, flags, fd, pgoff >> PAGE_SHIFT);
 out:
        return err;
 }
diff --git a/arch/microblaze/kernel/syscall_table.S b/arch/microblaze/kernel/syscall_table.S
index 376d1789f7c0..31b32a6c5f4e 100644
--- a/arch/microblaze/kernel/syscall_table.S
+++ b/arch/microblaze/kernel/syscall_table.S
@@ -15,7 +15,7 @@ ENTRY(sys_call_table)
        .long sys_creat
        .long sys_link
        .long sys_unlink                /* 10 */
-        .long sys_execve_wrapper
+        .long sys_execve
        .long sys_chdir
        .long sys_time
        .long sys_mknod
@@ -71,12 +71,12 @@ ENTRY(sys_call_table)
        .long sys_getppid
        .long sys_getpgrp               /* 65 */
        .long sys_setsid
-        .long sys_sigaction
+        .long sys_ni_syscall            /* sys_sigaction */
        .long sys_sgetmask
        .long sys_ssetmask
        .long sys_setreuid              /* 70 */
        .long sys_setregid
-        .long sys_sigsuspend_wrapper
+        .long sys_ni_syscall            /* sys_sigsuspend_wrapper */
        .long sys_sigpending
        .long sys_sethostname
        .long sys_setrlimit             /* 75 */
@@ -123,8 +123,8 @@ ENTRY(sys_call_table)
        .long sys_sysinfo
        .long sys_ipc
        .long sys_fsync
-        .long sys_sigreturn_wrapper
+        .long sys_ni_syscall            /* sys_sigreturn_wrapper */
-        .long sys_clone_wrapper         /* 120 */
+        .long sys_clone         /* 120 */
        .long sys_setdomainname
        .long sys_newuname
        .long sys_ni_syscall            /* modify_ldt */
@@ -194,7 +194,7 @@ ENTRY(sys_call_table)
        .long sys_sendfile
        .long sys_ni_syscall            /* reserved for streams1 */
        .long sys_ni_syscall            /* reserved for streams2 */
-        .long sys_vfork_wrapper         /* 190 */
+        .long sys_vfork         /* 190 */
        .long sys_getrlimit
        .long sys_mmap2                 /* mmap2 */
        .long sys_truncate64
@@ -369,3 +369,5 @@ ENTRY(sys_call_table)
        .long sys_ni_syscall
        .long sys_ni_syscall
        .long sys_ni_syscall
+        .long sys_rt_tgsigqueueinfo     /* 365 */
+        .long sys_perf_counter_open
diff --git a/arch/microblaze/lib/Makefile b/arch/microblaze/lib/Makefile
index 71c8cb6c9e43..b579db068c06 100644
--- a/arch/microblaze/lib/Makefile
+++ b/arch/microblaze/lib/Makefile
@@ -2,7 +2,7 @@
 # Makefile
 #
-lib-y :=  memset.o checksum.o
+lib-y :=  memset.o
 ifeq ($(CONFIG_OPT_LIB_ASM),y)
 lib-y += fastcopy.o
diff --git a/arch/microblaze/lib/checksum.c b/arch/microblaze/lib/checksum.c
deleted file mode 100644
index f08e74591418..000000000000
--- a/arch/microblaze/lib/checksum.c
+++ /dev/null
@@ -1,172 +0,0 @@
-/*
- *
- * INET         An implementation of the TCP/IP protocol suite for the LINUX
- *              operating system.  INET is implemented using the  BSD Socket
- *              interface as the means of communication with the user level.
- *
- *              IP/TCP/UDP checksumming routines
- *
- * Authors:     Jorge Cwik, <jorge@laser.satlink.net>
- *              Arnt Gulbrandsen, <agulbra@nvg.unit.no>
- *              Tom May, <ftom@netcom.com>
- *              Andreas Schwab, <schwab@issan.informatik.uni-dortmund.de>
- *              Lots of code moved from tcp.c and ip.c; see those files
- *              for more names.
- *
- * 03/02/96     Jes Sorensen, Andreas Schwab, Roman Hodek:
- *              Fixed some nasty bugs, causing some horrible crashes.
- *              A: At some points, the sum (%0) was used as
- *              length-counter instead of the length counter
- *              (%1). Thanks to Roman Hodek for pointing this out.
- *              B: GCC seems to mess up if one uses too many
- *              data-registers to hold input values and one tries to
- *              specify d0 and d1 as scratch registers. Letting gcc
- *              choose these registers itself solves the problem.
- *
- *              This program is free software; you can redistribute it and/or
- *              modify it under the terms of the GNU General Public License
- *              as published by the Free Software Foundation; either version
- *              2 of the License, or (at your option) any later version.
- */
-/* Revised by Kenneth Albanowski for m68knommu. Basic problem: unaligned access
- kills, so most of the assembly has to go. */
-#include <linux/module.h>
-#include <net/checksum.h>
-#include <asm/byteorder.h>
-static inline unsigned short from32to16(unsigned long x)
-{
-        /* add up 16-bit and 16-bit for 16+c bit */
-        x = (x & 0xffff) + (x >> 16);
-        /* add up carry.. */
-        x = (x & 0xffff) + (x >> 16);
-        return x;
-}
-static unsigned int do_csum(const unsigned char *buff, int len)
-{
-        int odd, count;
-        unsigned long result = 0;
-        if (len <= 0)
-                goto out;
-        odd = 1 & (unsigned long) buff;
-        if (odd) {
-                result = *buff;
-                len--;
-                buff++;
-        }
-        count = len >> 1;               /* nr of 16-bit words.. */
-        if (count) {
-                if (2 & (unsigned long) buff) {
-                        result += *(unsigned short *) buff;
-                        count--;
-                        len -= 2;
-                        buff += 2;
-                }
-                count >>= 1;            /* nr of 32-bit words.. */
-                if (count) {
-                        unsigned long carry = 0;
-                        do {
-                                unsigned long w = *(unsigned long *) buff;
-                                count--;
-                                buff += 4;
-                                result += carry;
-                                result += w;
-                                carry = (w > result);
-                        } while (count);
-                        result += carry;
-                        result = (result & 0xffff) + (result >> 16);
-                }
-                if (len & 2) {
-                        result += *(unsigned short *) buff;
-                        buff += 2;
-                }
-        }
-        if (len & 1)
-                result += (*buff << 8);
-        result = from32to16(result);
-        if (odd)
-                result = ((result >> 8) & 0xff) | ((result & 0xff) << 8);
-out:
-        return result;
-}
-/*
- *      This is a version of ip_compute_csum() optimized for IP headers,
- *      which always checksum on 4 octet boundaries.
- */
-__sum16 ip_fast_csum(const void *iph, unsigned int ihl)
-{
-        return (__force __sum16)~do_csum(iph, ihl*4);
-}
-EXPORT_SYMBOL(ip_fast_csum);
-/*
- * computes the checksum of a memory block at buff, length len,
- * and adds in "sum" (32-bit)
- *
- * returns a 32-bit number suitable for feeding into itself
- * or csum_tcpudp_magic
- *
- * this function must be called with even lengths, except
- * for the last fragment, which may be odd
- *
- * it's best to have buff aligned on a 32-bit boundary
- */
-__wsum csum_partial(const void *buff, int len, __wsum wsum)
-{
-        unsigned int sum = (__force unsigned int)wsum;
-        unsigned int result = do_csum(buff, len);
-        /* add in old sum, and carry.. */
-        result += sum;
-        if (sum > result)
-                result += 1;
-        return (__force __wsum)result;
-}
-EXPORT_SYMBOL(csum_partial);
-/*
- * this routine is used for miscellaneous IP-like checksums, mainly
- * in icmp.c
- */
-__sum16 ip_compute_csum(const void *buff, int len)
-{
-        return (__force __sum16)~do_csum(buff, len);
-}
-EXPORT_SYMBOL(ip_compute_csum);
-/*
- * copy from fs while checksumming, otherwise like csum_partial
- */
-__wsum
-csum_partial_copy_from_user(const void __user *src, void *dst, int len,
-                                                __wsum sum, int *csum_err)
-{
-        int missing;
-        missing = __copy_from_user(dst, src, len);
-        if (missing) {
-                memset(dst + len - missing, 0, missing);
-                *csum_err = -EFAULT;
-        } else
-                *csum_err = 0;
-        return csum_partial(dst, len, sum);
-}
-EXPORT_SYMBOL(csum_partial_copy_from_user);
-/*
- * copy from ds while checksumming, otherwise like csum_partial
- */
-__wsum
-csum_partial_copy(const void *src, void *dst, int len, __wsum sum)
-{
-        memcpy(dst, src, len);
-        return csum_partial(dst, len, sum);
-}
-EXPORT_SYMBOL(csum_partial_copy);
diff --git a/arch/microblaze/mm/init.c b/arch/microblaze/mm/init.c
index b5a701cd71e0..8d92c4efe9a4 100644
--- a/arch/microblaze/mm/init.c
+++ b/arch/microblaze/mm/init.c
@@ -80,15 +80,15 @@ void __init setup_memory(void)
                        memory_size = memory_end - memory_start;
                        PAGE_OFFSET = memory_start;
                        printk(KERN_INFO "%s: Main mem: 0x%x-0x%x, "
-                                "size 0x%08x\n", __func__, memory_start,
+                                "size 0x%08x\n", __func__, (u32) memory_start,
-                                                memory_end, memory_size);
+                                        (u32) memory_end, (u32) memory_size);
                        break;
                }
        }
        if (!memory_start || !memory_end) {
                panic("%s: Missing memory setting 0x%08x-0x%08x\n",
-                        __func__, memory_start, memory_end);
+                        __func__, (u32) memory_start, (u32) memory_end);
        }
        /* reservation of region where is the kernel */
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 8c4be1f301cf..3ca0fe1a9123 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -22,6 +22,26 @@ choice
 config MACH_ALCHEMY
        bool "Alchemy processor based machines"
+config AR7
+        bool "Texas Instruments AR7"
+        select BOOT_ELF32
+        select DMA_NONCOHERENT
+        select CEVT_R4K
+        select CSRC_R4K
+        select IRQ_CPU
+        select NO_EXCEPT_FILL
+        select SWAP_IO_SPACE
+        select SYS_HAS_CPU_MIPS32_R1
+        select SYS_HAS_EARLY_PRINTK
+        select SYS_SUPPORTS_32BIT_KERNEL
+        select SYS_SUPPORTS_LITTLE_ENDIAN
+        select GENERIC_GPIO
+        select GCD
+        select VLYNQ
+        help
+          Support for the Texas Instruments AR7 System-on-a-Chip
+          family: TNETD7100, 7200 and 7300.
 config BASLER_EXCITE
        bool "Basler eXcite smart camera"
        select CEVT_R4K
@@ -209,7 +229,7 @@ config MIPS_MALTA
        select SYS_SUPPORTS_64BIT_KERNEL
        select SYS_SUPPORTS_BIG_ENDIAN
        select SYS_SUPPORTS_LITTLE_ENDIAN
-        select SYS_SUPPORTS_MIPS_CMP if BROKEN  # because SYNC_R4K is broken
+        select SYS_SUPPORTS_MIPS_CMP
        select SYS_SUPPORTS_MULTITHREADING
        select SYS_SUPPORTS_SMARTMIPS
        help
@@ -247,6 +267,7 @@ config MACH_VR41XX
        select CEVT_R4K
        select CSRC_R4K
        select SYS_HAS_CPU_VR41XX
+        select ARCH_REQUIRE_GPIOLIB
 config NXP_STB220
        bool "NXP STB220 board"
@@ -1635,7 +1656,7 @@ config MIPS_APSP_KSPD
 config MIPS_CMP
        bool "MIPS CMP framework support"
        depends on SYS_SUPPORTS_MIPS_CMP
-        select SYNC_R4K if BROKEN
+        select SYNC_R4K
        select SYS_SUPPORTS_SMP
        select SYS_SUPPORTS_SCHED_SMT if SMP
        select WEAK_ORDERING
@@ -2147,11 +2168,11 @@ menu "Power management options"
 config ARCH_HIBERNATION_POSSIBLE
        def_bool y
-        depends on SYS_SUPPORTS_HOTPLUG_CPU
+        depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
 config ARCH_SUSPEND_POSSIBLE
        def_bool y
-        depends on SYS_SUPPORTS_HOTPLUG_CPU
+        depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
 source "kernel/power/Kconfig"
diff --git a/arch/mips/Makefile b/arch/mips/Makefile
index 807572a6a4d2..861da514a468 100644
--- a/arch/mips/Makefile
+++ b/arch/mips/Makefile
@@ -173,6 +173,13 @@ libs-y				+= arch/mips/fw/lib/
 #
 #
+# Texas Instruments AR7
+#
+core-$(CONFIG_AR7)              += arch/mips/ar7/
+cflags-$(CONFIG_AR7)            += -I$(srctree)/arch/mips/include/asm/mach-ar7
+load-$(CONFIG_AR7)              += 0xffffffff94100000
+#
 # Acer PICA 61, Mips Magnum 4000 and Olivetti M700.
 #
 core-$(CONFIG_MACH_JAZZ)        += arch/mips/jazz/
diff --git a/arch/mips/ar7/Makefile b/arch/mips/ar7/Makefile
new file mode 100644
index 000000000000..7435e44b3964
--- /dev/null
+++ b/arch/mips/ar7/Makefile
@@ -0,0 +1,10 @@
+obj-y := \
+        prom.o \
+        setup.o \
+        memory.o \
+        irq.o \
+        time.o \
+        platform.o \
+        gpio.o \
+        clock.o
diff --git a/arch/mips/ar7/clock.c b/arch/mips/ar7/clock.c
new file mode 100644
index 000000000000..27dc6663f2fa
--- /dev/null
+++ b/arch/mips/ar7/clock.c
@@ -0,0 +1,440 @@
+/*
+ * Copyright (C) 2007 Felix Fietkau <nbd@openwrt.org>
+ * Copyright (C) 2007 Eugene Konev <ejka@openwrt.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/types.h>
+#include <linux/module.h>
+#include <linux/delay.h>
+#include <linux/gcd.h>
+#include <linux/io.h>
+#include <asm/addrspace.h>
+#include <asm/mach-ar7/ar7.h>
+#define BOOT_PLL_SOURCE_MASK    0x3
+#define CPU_PLL_SOURCE_SHIFT    16
+#define BUS_PLL_SOURCE_SHIFT    14
+#define USB_PLL_SOURCE_SHIFT    18
+#define DSP_PLL_SOURCE_SHIFT    22
+#define BOOT_PLL_SOURCE_AFE     0
+#define BOOT_PLL_SOURCE_BUS     0
+#define BOOT_PLL_SOURCE_REF     1
+#define BOOT_PLL_SOURCE_XTAL    2
+#define BOOT_PLL_SOURCE_CPU     3
+#define BOOT_PLL_BYPASS         0x00000020
+#define BOOT_PLL_ASYNC_MODE     0x02000000
+#define BOOT_PLL_2TO1_MODE      0x00008000
+#define TNETD7200_CLOCK_ID_CPU  0
+#define TNETD7200_CLOCK_ID_DSP  1
+#define TNETD7200_CLOCK_ID_USB  2
+#define TNETD7200_DEF_CPU_CLK   211000000
+#define TNETD7200_DEF_DSP_CLK   125000000
+#define TNETD7200_DEF_USB_CLK   48000000
+struct tnetd7300_clock {
+        u32 ctrl;
+#define PREDIV_MASK     0x001f0000
+#define PREDIV_SHIFT    16
+#define POSTDIV_MASK    0x0000001f
+        u32 unused1[3];
+        u32 pll;
+#define MUL_MASK        0x0000f000
+#define MUL_SHIFT       12
+#define PLL_MODE_MASK   0x00000001
+#define PLL_NDIV        0x00000800
+#define PLL_DIV         0x00000002
+#define PLL_STATUS      0x00000001
+        u32 unused2[3];
+};
+struct tnetd7300_clocks {
+        struct tnetd7300_clock bus;
+        struct tnetd7300_clock cpu;
+        struct tnetd7300_clock usb;
+        struct tnetd7300_clock dsp;
+};
+struct tnetd7200_clock {
+        u32 ctrl;
+        u32 unused1[3];
+#define DIVISOR_ENABLE_MASK 0x00008000
+        u32 mul;
+        u32 prediv;
+        u32 postdiv;
+        u32 postdiv2;
+        u32 unused2[6];
+        u32 cmd;
+        u32 status;
+        u32 cmden;
+        u32 padding[15];
+};
+struct tnetd7200_clocks {
+        struct tnetd7200_clock cpu;
+        struct tnetd7200_clock dsp;
+        struct tnetd7200_clock usb;
+};
+int ar7_cpu_clock = 150000000;
+EXPORT_SYMBOL(ar7_cpu_clock);
+int ar7_bus_clock = 125000000;
+EXPORT_SYMBOL(ar7_bus_clock);
+int ar7_dsp_clock;
+EXPORT_SYMBOL(ar7_dsp_clock);
+static void approximate(int base, int target, int *prediv,
+                        int *postdiv, int *mul)
+{
+        int i, j, k, freq, res = target;
+        for (i = 1; i <= 16; i++)
+                for (j = 1; j <= 32; j++)
+                        for (k = 1; k <= 32; k++) {
+                                freq = abs(base / j * i / k - target);
+                                if (freq < res) {
+                                        res = freq;
+                                        *mul = i;
+                                        *prediv = j;
+                                        *postdiv = k;
+                                }
+                        }
+}
+static void calculate(int base, int target, int *prediv, int *postdiv,
+        int *mul)
+{
+        int tmp_gcd, tmp_base, tmp_freq;
+        for (*prediv = 1; *prediv <= 32; (*prediv)++) {
+                tmp_base = base / *prediv;
+                tmp_gcd = gcd(target, tmp_base);
+                *mul = target / tmp_gcd;
+                *postdiv = tmp_base / tmp_gcd;
+                if ((*mul < 1) || (*mul >= 16))
+                        continue;
+                if ((*postdiv > 0) & (*postdiv <= 32))
+                        break;
+        }
+        if (base / *prediv * *mul / *postdiv != target) {
+                approximate(base, target, prediv, postdiv, mul);
+                tmp_freq = base / *prediv * *mul / *postdiv;
+                printk(KERN_WARNING
+                       "Adjusted requested frequency %d to %d\n",
+                       target, tmp_freq);
+        }
+        printk(KERN_DEBUG "Clocks: prediv: %d, postdiv: %d, mul: %d\n",
+               *prediv, *postdiv, *mul);
+}
+static int tnetd7300_dsp_clock(void)
+{
+        u32 didr1, didr2;
+        u8 rev = ar7_chip_rev();
+        didr1 = readl((void *)KSEG1ADDR(AR7_REGS_GPIO + 0x18));
+        didr2 = readl((void *)KSEG1ADDR(AR7_REGS_GPIO + 0x1c));
+        if (didr2 & (1 << 23))
+                return 0;
+        if ((rev >= 0x23) && (rev != 0x57))
+                return 250000000;
+        if ((((didr2 & 0x1fff) << 10) | ((didr1 & 0xffc00000) >> 22))
+            > 4208000)
+                return 250000000;
+        return 0;
+}
+static int tnetd7300_get_clock(u32 shift, struct tnetd7300_clock *clock,
+        u32 *bootcr, u32 bus_clock)
+{
+        int product;
+        int base_clock = AR7_REF_CLOCK;
+        u32 ctrl = readl(&clock->ctrl);
+        u32 pll = readl(&clock->pll);
+        int prediv = ((ctrl & PREDIV_MASK) >> PREDIV_SHIFT) + 1;
+        int postdiv = (ctrl & POSTDIV_MASK) + 1;
+        int divisor = prediv * postdiv;
+        int mul = ((pll & MUL_MASK) >> MUL_SHIFT) + 1;
+        switch ((*bootcr & (BOOT_PLL_SOURCE_MASK << shift)) >> shift) {
+        case BOOT_PLL_SOURCE_BUS:
+                base_clock = bus_clock;
+                break;
+        case BOOT_PLL_SOURCE_REF:
+                base_clock = AR7_REF_CLOCK;
+                break;
+        case BOOT_PLL_SOURCE_XTAL:
+                base_clock = AR7_XTAL_CLOCK;
+                break;
+        case BOOT_PLL_SOURCE_CPU:
+                base_clock = ar7_cpu_clock;
+                break;
+        }
+        if (*bootcr & BOOT_PLL_BYPASS)
+                return base_clock / divisor;
+        if ((pll & PLL_MODE_MASK) == 0)
+                return (base_clock >> (mul / 16 + 1)) / divisor;
+        if ((pll & (PLL_NDIV | PLL_DIV)) == (PLL_NDIV | PLL_DIV)) {
+                product = (mul & 1) ?
+                        (base_clock * mul) >> 1 :
+                        (base_clock * (mul - 1)) >> 2;
+                return product / divisor;
+        }
+        if (mul == 16)
+                return base_clock / divisor;
+        return base_clock * mul / divisor;
+}
+static void tnetd7300_set_clock(u32 shift, struct tnetd7300_clock *clock,
+        u32 *bootcr, u32 frequency)
+{
+        int prediv, postdiv, mul;
+        int base_clock = ar7_bus_clock;
+        switch ((*bootcr & (BOOT_PLL_SOURCE_MASK << shift)) >> shift) {
+        case BOOT_PLL_SOURCE_BUS:
+                base_clock = ar7_bus_clock;
+                break;
+        case BOOT_PLL_SOURCE_REF:
+                base_clock = AR7_REF_CLOCK;
+                break;
+        case BOOT_PLL_SOURCE_XTAL:
+                base_clock = AR7_XTAL_CLOCK;
+                break;
+        case BOOT_PLL_SOURCE_CPU:
+                base_clock = ar7_cpu_clock;
+                break;
+        }
+        calculate(base_clock, frequency, &prediv, &postdiv, &mul);
+        writel(((prediv - 1) << PREDIV_SHIFT) | (postdiv - 1), &clock->ctrl);
+        msleep(1);
+        writel(4, &clock->pll);
+        while (readl(&clock->pll) & PLL_STATUS)
+                ;
+        writel(((mul - 1) << MUL_SHIFT) | (0xff << 3) | 0x0e, &clock->pll);
+        msleep(75);
+}
+static void __init tnetd7300_init_clocks(void)
+{
+        u32 *bootcr = (u32 *)ioremap_nocache(AR7_REGS_DCL, 4);
+        struct tnetd7300_clocks *clocks =
+                                        ioremap_nocache(UR8_REGS_CLOCKS,
+                                        sizeof(struct tnetd7300_clocks));
+        ar7_bus_clock = tnetd7300_get_clock(BUS_PLL_SOURCE_SHIFT,
+                &clocks->bus, bootcr, AR7_AFE_CLOCK);
+        if (*bootcr & BOOT_PLL_ASYNC_MODE)
+                ar7_cpu_clock = tnetd7300_get_clock(CPU_PLL_SOURCE_SHIFT,
+                        &clocks->cpu, bootcr, AR7_AFE_CLOCK);
+        else
+                ar7_cpu_clock = ar7_bus_clock;
+        if (ar7_dsp_clock == 250000000)
+                tnetd7300_set_clock(DSP_PLL_SOURCE_SHIFT, &clocks->dsp,
+                        bootcr, ar7_dsp_clock);
+        iounmap(clocks);
+        iounmap(bootcr);
+}
+static int tnetd7200_get_clock(int base, struct tnetd7200_clock *clock,
+        u32 *bootcr, u32 bus_clock)
+{
+        int divisor = ((readl(&clock->prediv) & 0x1f) + 1) *
+                ((readl(&clock->postdiv) & 0x1f) + 1);
+        if (*bootcr & BOOT_PLL_BYPASS)
+                return base / divisor;
+        return base * ((readl(&clock->mul) & 0xf) + 1) / divisor;
+}
+static void tnetd7200_set_clock(int base, struct tnetd7200_clock *clock,
+        int prediv, int postdiv, int postdiv2, int mul, u32 frequency)
+{
+        printk(KERN_INFO
+                "Clocks: base = %d, frequency = %u, prediv = %d, "
+                "postdiv = %d, postdiv2 = %d, mul = %d\n",
+                base, frequency, prediv, postdiv, postdiv2, mul);
+        writel(0, &clock->ctrl);
+        writel(DIVISOR_ENABLE_MASK | ((prediv - 1) & 0x1F), &clock->prediv);
+        writel((mul - 1) & 0xF, &clock->mul);
+        while (readl(&clock->status) & 0x1)
+                ; /* nop */
+        writel(DIVISOR_ENABLE_MASK | ((postdiv - 1) & 0x1F), &clock->postdiv);
+        writel(readl(&clock->cmden) | 1, &clock->cmden);
+        writel(readl(&clock->cmd) | 1, &clock->cmd);
+        while (readl(&clock->status) & 0x1)
+                ; /* nop */
+        writel(DIVISOR_ENABLE_MASK | ((postdiv2 - 1) & 0x1F), &clock->postdiv2);
+        writel(readl(&clock->cmden) | 1, &clock->cmden);
+        writel(readl(&clock->cmd) | 1, &clock->cmd);
+        while (readl(&clock->status) & 0x1)
+                ; /* nop */
+        writel(readl(&clock->ctrl) | 1, &clock->ctrl);
+}
+static int tnetd7200_get_clock_base(int clock_id, u32 *bootcr)
+{
+        if (*bootcr & BOOT_PLL_ASYNC_MODE)
+                /* Async */
+                switch (clock_id) {
+                case TNETD7200_CLOCK_ID_DSP:
+                        return AR7_REF_CLOCK;
+                default:
+                        return AR7_AFE_CLOCK;
+                }
+        else
+                /* Sync */
+                if (*bootcr & BOOT_PLL_2TO1_MODE)
+                        /* 2:1 */
+                        switch (clock_id) {
+                        case TNETD7200_CLOCK_ID_DSP:
+                                return AR7_REF_CLOCK;
+                        default:
+                                return AR7_AFE_CLOCK;
+                        }
+                else
+                        /* 1:1 */
+                        return AR7_REF_CLOCK;
+}
+static void __init tnetd7200_init_clocks(void)
+{
+        u32 *bootcr = (u32 *)ioremap_nocache(AR7_REGS_DCL, 4);
+        struct tnetd7200_clocks *clocks =
+                                        ioremap_nocache(AR7_REGS_CLOCKS,
+                                        sizeof(struct tnetd7200_clocks));
+        int cpu_base, cpu_mul, cpu_prediv, cpu_postdiv;
+        int dsp_base, dsp_mul, dsp_prediv, dsp_postdiv;
+        int usb_base, usb_mul, usb_prediv, usb_postdiv;
+        cpu_base = tnetd7200_get_clock_base(TNETD7200_CLOCK_ID_CPU, bootcr);
+        dsp_base = tnetd7200_get_clock_base(TNETD7200_CLOCK_ID_DSP, bootcr);
+        if (*bootcr & BOOT_PLL_ASYNC_MODE) {
+                printk(KERN_INFO "Clocks: Async mode\n");
+                printk(KERN_INFO "Clocks: Setting DSP clock\n");
+                calculate(dsp_base, TNETD7200_DEF_DSP_CLK,
+                        &dsp_prediv, &dsp_postdiv, &dsp_mul);
+                ar7_bus_clock =
+                        ((dsp_base / dsp_prediv) * dsp_mul) / dsp_postdiv;
+                tnetd7200_set_clock(dsp_base, &clocks->dsp,
+                        dsp_prediv, dsp_postdiv * 2, dsp_postdiv, dsp_mul * 2,
+                        ar7_bus_clock);
+                printk(KERN_INFO "Clocks: Setting CPU clock\n");
+                calculate(cpu_base, TNETD7200_DEF_CPU_CLK, &cpu_prediv,
+                        &cpu_postdiv, &cpu_mul);
+                ar7_cpu_clock =
+                        ((cpu_base / cpu_prediv) * cpu_mul) / cpu_postdiv;
+                tnetd7200_set_clock(cpu_base, &clocks->cpu,
+                        cpu_prediv, cpu_postdiv, -1, cpu_mul,
+                        ar7_cpu_clock);
+        } else
+                if (*bootcr & BOOT_PLL_2TO1_MODE) {
+                        printk(KERN_INFO "Clocks: Sync 2:1 mode\n");
+                        printk(KERN_INFO "Clocks: Setting CPU clock\n");
+                        calculate(cpu_base, TNETD7200_DEF_CPU_CLK, &cpu_prediv,
+                                &cpu_postdiv, &cpu_mul);
+                        ar7_cpu_clock = ((cpu_base / cpu_prediv) * cpu_mul)
+                                                                / cpu_postdiv;
+                        tnetd7200_set_clock(cpu_base, &clocks->cpu,
+                                cpu_prediv, cpu_postdiv, -1, cpu_mul,
+                                ar7_cpu_clock);
+                        printk(KERN_INFO "Clocks: Setting DSP clock\n");
+                        calculate(dsp_base, TNETD7200_DEF_DSP_CLK, &dsp_prediv,
+                                &dsp_postdiv, &dsp_mul);
+                        ar7_bus_clock = ar7_cpu_clock / 2;
+                        tnetd7200_set_clock(dsp_base, &clocks->dsp,
+                                dsp_prediv, dsp_postdiv * 2, dsp_postdiv,
+                                dsp_mul * 2, ar7_bus_clock);
+                } else {
+                        printk(KERN_INFO "Clocks: Sync 1:1 mode\n");
+                        printk(KERN_INFO "Clocks: Setting DSP clock\n");
+                        calculate(dsp_base, TNETD7200_DEF_DSP_CLK, &dsp_prediv,
+                                &dsp_postdiv, &dsp_mul);
+                        ar7_bus_clock = ((dsp_base / dsp_prediv) * dsp_mul)
+                                                                / dsp_postdiv;
+                        tnetd7200_set_clock(dsp_base, &clocks->dsp,
+                                dsp_prediv, dsp_postdiv * 2, dsp_postdiv,
+                                dsp_mul * 2, ar7_bus_clock);
+                        ar7_cpu_clock = ar7_bus_clock;
+                }
+        printk(KERN_INFO "Clocks: Setting USB clock\n");
+        usb_base = ar7_bus_clock;
+        calculate(usb_base, TNETD7200_DEF_USB_CLK, &usb_prediv,
+                &usb_postdiv, &usb_mul);
+        tnetd7200_set_clock(usb_base, &clocks->usb,
+                usb_prediv, usb_postdiv, -1, usb_mul,
+                TNETD7200_DEF_USB_CLK);
+        ar7_dsp_clock = ar7_cpu_clock;
+        iounmap(clocks);
+        iounmap(bootcr);
+}
+int __init ar7_init_clocks(void)
+{
+        switch (ar7_chip_id()) {
+        case AR7_CHIP_7100:
+        case AR7_CHIP_7200:
+                tnetd7200_init_clocks();
+                break;
+        case AR7_CHIP_7300:
+                ar7_dsp_clock = tnetd7300_dsp_clock();
+                tnetd7300_init_clocks();
+                break;
+        default:
+                break;
+        }
+        return 0;
+}
+arch_initcall(ar7_init_clocks);
diff --git a/arch/mips/ar7/gpio.c b/arch/mips/ar7/gpio.c
new file mode 100644
index 000000000000..74e14a3dbf4a
--- /dev/null
+++ b/arch/mips/ar7/gpio.c
@@ -0,0 +1,48 @@
+/*
+ * Copyright (C) 2007 Felix Fietkau <nbd@openwrt.org>
+ * Copyright (C) 2007 Eugene Konev <ejka@openwrt.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+#include <linux/module.h>
+#include <asm/mach-ar7/gpio.h>
+static const char *ar7_gpio_list[AR7_GPIO_MAX];
+int gpio_request(unsigned gpio, const char *label)
+{
+        if (gpio >= AR7_GPIO_MAX)
+                return -EINVAL;
+        if (ar7_gpio_list[gpio])
+                return -EBUSY;
+        if (label)
+                ar7_gpio_list[gpio] = label;
+        else
+                ar7_gpio_list[gpio] = "busy";
+        return 0;
+}
+EXPORT_SYMBOL(gpio_request);
+void gpio_free(unsigned gpio)
+{
+        BUG_ON(!ar7_gpio_list[gpio]);
+        ar7_gpio_list[gpio] = NULL;
+}
+EXPORT_SYMBOL(gpio_free);
diff --git a/arch/mips/ar7/irq.c b/arch/mips/ar7/irq.c
new file mode 100644
index 000000000000..c781556c44e4
--- /dev/null
+++ b/arch/mips/ar7/irq.c
@@ -0,0 +1,176 @@
+/*
+ * Copyright (C) 2006,2007 Felix Fietkau <nbd@openwrt.org>
+ * Copyright (C) 2006,2007 Eugene Konev <ejka@openwrt.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+#include <linux/interrupt.h>
+#include <linux/io.h>
+#include <asm/irq_cpu.h>
+#include <asm/mipsregs.h>
+#include <asm/mach-ar7/ar7.h>
+#define EXCEPT_OFFSET   0x80
+#define PACE_OFFSET     0xA0
+#define CHNLS_OFFSET    0x200
+#define REG_OFFSET(irq, reg)    ((irq) / 32 * 0x4 + reg * 0x10)
+#define SEC_REG_OFFSET(reg)     (EXCEPT_OFFSET + reg * 0x8)
+#define SEC_SR_OFFSET           (SEC_REG_OFFSET(0))     /* 0x80 */
+#define CR_OFFSET(irq)          (REG_OFFSET(irq, 1))    /* 0x10 */
+#define SEC_CR_OFFSET           (SEC_REG_OFFSET(1))     /* 0x88 */
+#define ESR_OFFSET(irq)         (REG_OFFSET(irq, 2))    /* 0x20 */
+#define SEC_ESR_OFFSET          (SEC_REG_OFFSET(2))     /* 0x90 */
+#define ECR_OFFSET(irq)         (REG_OFFSET(irq, 3))    /* 0x30 */
+#define SEC_ECR_OFFSET          (SEC_REG_OFFSET(3))     /* 0x98 */
+#define PIR_OFFSET              (0x40)
+#define MSR_OFFSET              (0x44)
+#define PM_OFFSET(irq)          (REG_OFFSET(irq, 5))    /* 0x50 */
+#define TM_OFFSET(irq)          (REG_OFFSET(irq, 6))    /* 0x60 */
+#define REG(addr) ((u32 *)(KSEG1ADDR(AR7_REGS_IRQ) + addr))
+#define CHNL_OFFSET(chnl) (CHNLS_OFFSET + (chnl * 4))
+static int ar7_irq_base;
+static void ar7_unmask_irq(unsigned int irq)
+{
+        writel(1 << ((irq - ar7_irq_base) % 32),
+               REG(ESR_OFFSET(irq - ar7_irq_base)));
+}
+static void ar7_mask_irq(unsigned int irq)
+{
+        writel(1 << ((irq - ar7_irq_base) % 32),
+               REG(ECR_OFFSET(irq - ar7_irq_base)));
+}
+static void ar7_ack_irq(unsigned int irq)
+{
+        writel(1 << ((irq - ar7_irq_base) % 32),
+               REG(CR_OFFSET(irq - ar7_irq_base)));
+}
+static void ar7_unmask_sec_irq(unsigned int irq)
+{
+        writel(1 << (irq - ar7_irq_base - 40), REG(SEC_ESR_OFFSET));
+}
+static void ar7_mask_sec_irq(unsigned int irq)
+{
+        writel(1 << (irq - ar7_irq_base - 40), REG(SEC_ECR_OFFSET));
+}
+static void ar7_ack_sec_irq(unsigned int irq)
+{
+        writel(1 << (irq - ar7_irq_base - 40), REG(SEC_CR_OFFSET));
+}
+static struct irq_chip ar7_irq_type = {
+        .name = "AR7",
+        .unmask = ar7_unmask_irq,
+        .mask = ar7_mask_irq,
+        .ack = ar7_ack_irq
+};
+static struct irq_chip ar7_sec_irq_type = {
+        .name = "AR7",
+        .unmask = ar7_unmask_sec_irq,
+        .mask = ar7_mask_sec_irq,
+        .ack = ar7_ack_sec_irq,
+};
+static struct irqaction ar7_cascade_action = {
+        .handler = no_action,
+        .name = "AR7 cascade interrupt"
+};
+static void __init ar7_irq_init(int base)
+{
+        int i;
+        /*
+         * Disable interrupts and clear pending
+         */
+        writel(0xffffffff, REG(ECR_OFFSET(0)));
+        writel(0xff, REG(ECR_OFFSET(32)));
+        writel(0xffffffff, REG(SEC_ECR_OFFSET));
+        writel(0xffffffff, REG(CR_OFFSET(0)));
+        writel(0xff, REG(CR_OFFSET(32)));
+        writel(0xffffffff, REG(SEC_CR_OFFSET));
+        ar7_irq_base = base;
+        for (i = 0; i < 40; i++) {
+                writel(i, REG(CHNL_OFFSET(i)));
+                /* Primary IRQ's */
+                set_irq_chip_and_handler(base + i, &ar7_irq_type,
+                                         handle_level_irq);
+                /* Secondary IRQ's */
+                if (i < 32)
+                        set_irq_chip_and_handler(base + i + 40,
+                                                 &ar7_sec_irq_type,
+                                                 handle_level_irq);
+        }
+        setup_irq(2, &ar7_cascade_action);
+        setup_irq(ar7_irq_base, &ar7_cascade_action);
+        set_c0_status(IE_IRQ0);
+}
+void __init arch_init_irq(void)
+{
+        mips_cpu_irq_init();
+        ar7_irq_init(8);
+}
+static void ar7_cascade(void)
+{
+        u32 status;
+        int i, irq;
+        /* Primary IRQ's */
+        irq = readl(REG(PIR_OFFSET)) & 0x3f;
+        if (irq) {
+                do_IRQ(ar7_irq_base + irq);
+                return;
+        }
+        /* Secondary IRQ's are cascaded through primary '0' */
+        writel(1, REG(CR_OFFSET(irq)));
+        status = readl(REG(SEC_SR_OFFSET));
+        for (i = 0; i < 32; i++) {
+                if (status & 1) {
+                        do_IRQ(ar7_irq_base + i + 40);
+                        return;
+                }
+                status >>= 1;
+        }
+        spurious_interrupt();
+}
+asmlinkage void plat_irq_dispatch(void)
+{
+        unsigned int pending = read_c0_status() & read_c0_cause() & ST0_IM;
+        if (pending & STATUSF_IP7)              /* cpu timer */
+                do_IRQ(7);
+        else if (pending & STATUSF_IP2)         /* int0 hardware line */
+                ar7_cascade();
+        else
+                spurious_interrupt();
+}
diff --git a/arch/mips/ar7/memory.c b/arch/mips/ar7/memory.c
new file mode 100644
index 000000000000..46fed44825a6
--- /dev/null
+++ b/arch/mips/ar7/memory.c
@@ -0,0 +1,72 @@
+/*
+ * Copyright (C) 2007 Felix Fietkau <nbd@openwrt.org>
+ * Copyright (C) 2007 Eugene Konev <ejka@openwrt.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+#include <linux/bootmem.h>
+#include <linux/init.h>
+#include <linux/mm.h>
+#include <linux/module.h>
+#include <linux/pfn.h>
+#include <linux/proc_fs.h>
+#include <linux/string.h>
+#include <linux/swap.h>
+#include <asm/bootinfo.h>
+#include <asm/page.h>
+#include <asm/sections.h>
+#include <asm/mach-ar7/ar7.h>
+#include <asm/mips-boards/prom.h>
+static int __init memsize(void)
+{
+        u32 size = (64 << 20);
+        u32 *addr = (u32 *)KSEG1ADDR(AR7_SDRAM_BASE + size - 4);
+        u32 *kernel_end = (u32 *)KSEG1ADDR(CPHYSADDR((u32)&_end));
+        u32 *tmpaddr = addr;
+        while (tmpaddr > kernel_end) {
+                *tmpaddr = (u32)tmpaddr;
+                size >>= 1;
+                tmpaddr -= size >> 2;
+        }
+        do {
+                tmpaddr += size >> 2;
+                if (*tmpaddr != (u32)tmpaddr)
+                        break;
+                size <<= 1;
+        } while (size < (64 << 20));
+        writel(tmpaddr, &addr);
+        return size;
+}
+void __init prom_meminit(void)
+{
+        unsigned long pages;
+        pages = memsize() >> PAGE_SHIFT;
+        add_memory_region(PHYS_OFFSET, pages << PAGE_SHIFT,
+                          BOOT_MEM_RAM);
+}
+void __init prom_free_prom_memory(void)
+{
+        /* Nothing to free */
+}
diff --git a/arch/mips/ar7/platform.c b/arch/mips/ar7/platform.c
new file mode 100644
index 000000000000..542244961780
--- /dev/null
+++ b/arch/mips/ar7/platform.c
@@ -0,0 +1,555 @@
+/*
+ * Copyright (C) 2006,2007 Felix Fietkau <nbd@openwrt.org>
+ * Copyright (C) 2006,2007 Eugene Konev <ejka@openwrt.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+#include <linux/init.h>
+#include <linux/types.h>
+#include <linux/module.h>
+#include <linux/delay.h>
+#include <linux/dma-mapping.h>
+#include <linux/platform_device.h>
+#include <linux/mtd/physmap.h>
+#include <linux/serial.h>
+#include <linux/serial_8250.h>
+#include <linux/ioport.h>
+#include <linux/io.h>
+#include <linux/version.h>
+#include <linux/vlynq.h>
+#include <linux/leds.h>
+#include <linux/string.h>
+#include <linux/etherdevice.h>
+#include <asm/addrspace.h>
+#include <asm/mach-ar7/ar7.h>
+#include <asm/mach-ar7/gpio.h>
+#include <asm/mach-ar7/prom.h>
+struct plat_vlynq_data {
+        struct plat_vlynq_ops ops;
+        int gpio_bit;
+        int reset_bit;
+};
+static int vlynq_on(struct vlynq_device *dev)
+{
+        int result;
+        struct plat_vlynq_data *pdata = dev->dev.platform_data;
+        result = gpio_request(pdata->gpio_bit, "vlynq");
+        if (result)
+                goto out;
+        ar7_device_reset(pdata->reset_bit);
+        result = ar7_gpio_disable(pdata->gpio_bit);
+        if (result)
+                goto out_enabled;
+        result = ar7_gpio_enable(pdata->gpio_bit);
+        if (result)
+                goto out_enabled;
+        result = gpio_direction_output(pdata->gpio_bit, 0);
+        if (result)
+                goto out_gpio_enabled;
+        msleep(50);
+        gpio_set_value(pdata->gpio_bit, 1);
+        msleep(50);
+        return 0;
+out_gpio_enabled:
+        ar7_gpio_disable(pdata->gpio_bit);
+out_enabled:
+        ar7_device_disable(pdata->reset_bit);
+        gpio_free(pdata->gpio_bit);
+out:
+        return result;
+}
+static void vlynq_off(struct vlynq_device *dev)
+{
+        struct plat_vlynq_data *pdata = dev->dev.platform_data;
+        ar7_gpio_disable(pdata->gpio_bit);
+        gpio_free(pdata->gpio_bit);
+        ar7_device_disable(pdata->reset_bit);
+}
+static struct resource physmap_flash_resource = {
+        .name = "mem",
+        .flags = IORESOURCE_MEM,
+        .start = 0x10000000,
+        .end = 0x107fffff,
+};
+static struct resource cpmac_low_res[] = {
+        {
+                .name = "regs",
+                .flags = IORESOURCE_MEM,
+                .start = AR7_REGS_MAC0,
+                .end = AR7_REGS_MAC0 + 0x7ff,
+        },
+        {
+                .name = "irq",
+                .flags = IORESOURCE_IRQ,
+                .start = 27,
+                .end = 27,
+        },
+};
+static struct resource cpmac_high_res[] = {
+        {
+                .name = "regs",
+                .flags = IORESOURCE_MEM,
+                .start = AR7_REGS_MAC1,
+                .end = AR7_REGS_MAC1 + 0x7ff,
+        },
+        {
+                .name = "irq",
+                .flags = IORESOURCE_IRQ,
+                .start = 41,
+                .end = 41,
+        },
+};
+static struct resource vlynq_low_res[] = {
+        {
+                .name = "regs",
+                .flags = IORESOURCE_MEM,
+                .start = AR7_REGS_VLYNQ0,
+                .end = AR7_REGS_VLYNQ0 + 0xff,
+        },
+        {
+                .name = "irq",
+                .flags = IORESOURCE_IRQ,
+                .start = 29,
+                .end = 29,
+        },
+        {
+                .name = "mem",
+                .flags = IORESOURCE_MEM,
+                .start = 0x04000000,
+                .end = 0x04ffffff,
+        },
+        {
+                .name = "devirq",
+                .flags = IORESOURCE_IRQ,
+                .start = 80,
+                .end = 111,
+        },
+};
+static struct resource vlynq_high_res[] = {
+        {
+                .name = "regs",
+                .flags = IORESOURCE_MEM,
+                .start = AR7_REGS_VLYNQ1,
+                .end = AR7_REGS_VLYNQ1 + 0xff,
+        },
+        {
+                .name = "irq",
+                .flags = IORESOURCE_IRQ,
+                .start = 33,
+                .end = 33,
+        },
+        {
+                .name = "mem",
+                .flags = IORESOURCE_MEM,
+                .start = 0x0c000000,
+                .end = 0x0cffffff,
+        },
+        {
+                .name = "devirq",
+                .flags = IORESOURCE_IRQ,
+                .start = 112,
+                .end = 143,
+        },
+};
+static struct resource usb_res[] = {
+        {
+                .name = "regs",
+                .flags = IORESOURCE_MEM,
+                .start = AR7_REGS_USB,
+                .end = AR7_REGS_USB + 0xff,
+        },
+        {
+                .name = "irq",
+                .flags = IORESOURCE_IRQ,
+                .start = 32,
+                .end = 32,
+        },
+        {
+                .name = "mem",
+                .flags = IORESOURCE_MEM,
+                .start = 0x03400000,
+                .end = 0x034001fff,
+        },
+};
+static struct physmap_flash_data physmap_flash_data = {
+        .width = 2,
+};
+static struct plat_cpmac_data cpmac_low_data = {
+        .reset_bit = 17,
+        .power_bit = 20,
+        .phy_mask = 0x80000000,
+};
+static struct plat_cpmac_data cpmac_high_data = {
+        .reset_bit = 21,
+        .power_bit = 22,
+        .phy_mask = 0x7fffffff,
+};
+static struct plat_vlynq_data vlynq_low_data = {
+        .ops.on = vlynq_on,
+        .ops.off = vlynq_off,
+        .reset_bit = 20,
+        .gpio_bit = 18,
+};
+static struct plat_vlynq_data vlynq_high_data = {
+        .ops.on = vlynq_on,
+        .ops.off = vlynq_off,
+        .reset_bit = 16,
+        .gpio_bit = 19,
+};
+static struct platform_device physmap_flash = {
+        .id = 0,
+        .name = "physmap-flash",
+        .dev.platform_data = &physmap_flash_data,
+        .resource = &physmap_flash_resource,
+        .num_resources = 1,
+};
+static u64 cpmac_dma_mask = DMA_32BIT_MASK;
+static struct platform_device cpmac_low = {
+        .id = 0,
+        .name = "cpmac",
+        .dev = {
+                .dma_mask = &cpmac_dma_mask,
+                .coherent_dma_mask = DMA_32BIT_MASK,
+                .platform_data = &cpmac_low_data,
+        },
+        .resource = cpmac_low_res,
+        .num_resources = ARRAY_SIZE(cpmac_low_res),
+};
+static struct platform_device cpmac_high = {
+        .id = 1,
+        .name = "cpmac",
+        .dev = {
+                .dma_mask = &cpmac_dma_mask,
+                .coherent_dma_mask = DMA_32BIT_MASK,
+                .platform_data = &cpmac_high_data,
+        },
+        .resource = cpmac_high_res,
+        .num_resources = ARRAY_SIZE(cpmac_high_res),
+};
+static struct platform_device vlynq_low = {
+        .id = 0,
+        .name = "vlynq",
+        .dev.platform_data = &vlynq_low_data,
+        .resource = vlynq_low_res,
+        .num_resources = ARRAY_SIZE(vlynq_low_res),
+};
+static struct platform_device vlynq_high = {
+        .id = 1,
+        .name = "vlynq",
+        .dev.platform_data = &vlynq_high_data,
+        .resource = vlynq_high_res,
+        .num_resources = ARRAY_SIZE(vlynq_high_res),
+};
+static struct gpio_led default_leds[] = {
+        {
+                .name = "status",
+                .gpio = 8,
+                .active_low = 1,
+        },
+};
+static struct gpio_led dsl502t_leds[] = {
+        {
+                .name = "status",
+                .gpio = 9,
+                .active_low = 1,
+        },
+        {
+                .name = "ethernet",
+                .gpio = 7,
+                .active_low = 1,
+        },
+        {
+                .name = "usb",
+                .gpio = 12,
+                .active_low = 1,
+        },
+};
+static struct gpio_led dg834g_leds[] = {
+        {
+                .name = "ppp",
+                .gpio = 6,
+                .active_low = 1,
+        },
+        {
+                .name = "status",
+                .gpio = 7,
+                .active_low = 1,
+        },
+        {
+                .name = "adsl",
+                .gpio = 8,
+                .active_low = 1,
+        },
+        {
+                .name = "wifi",
+                .gpio = 12,
+                .active_low = 1,
+        },
+        {
+                .name = "power",
+                .gpio = 14,
+                .active_low = 1,
+                .default_trigger = "default-on",
+        },
+};
+static struct gpio_led fb_sl_leds[] = {
+        {
+                .name = "1",
+                .gpio = 7,
+        },
+        {
+                .name = "2",
+                .gpio = 13,
+                .active_low = 1,
+        },
+        {
+                .name = "3",
+                .gpio = 10,
+                .active_low = 1,
+        },
+        {
+                .name = "4",
+                .gpio = 12,
+                .active_low = 1,
+        },
+        {
+                .name = "5",
+                .gpio = 9,
+                .active_low = 1,
+        },
+};
+static struct gpio_led fb_fon_leds[] = {
+        {
+                .name = "1",
+                .gpio = 8,
+        },
+        {
+                .name = "2",
+                .gpio = 3,
+                .active_low = 1,
+        },
+        {
+                .name = "3",
+                .gpio = 5,
+        },
+        {
+                .name = "4",
+                .gpio = 4,
+                .active_low = 1,
+        },
+        {
+                .name = "5",
+                .gpio = 11,
+                .active_low = 1,
+        },
+};
+static struct gpio_led_platform_data ar7_led_data;
+static struct platform_device ar7_gpio_leds = {
+        .name = "leds-gpio",
+        .id = -1,
+        .dev = {
+                .platform_data = &ar7_led_data,
+        }
+};
+static struct platform_device ar7_udc = {
+        .id = -1,
+        .name = "ar7_udc",
+        .resource = usb_res,
+        .num_resources = ARRAY_SIZE(usb_res),
+};
+static inline unsigned char char2hex(char h)
+{
+        switch (h) {
+        case '0': case '1': case '2': case '3': case '4':
+        case '5': case '6': case '7': case '8': case '9':
+                return h - '0';
+        case 'A': case 'B': case 'C': case 'D': case 'E': case 'F':
+                return h - 'A' + 10;
+        case 'a': case 'b': case 'c': case 'd': case 'e': case 'f':
+                return h - 'a' + 10;
+        default:
+                return 0;
+        }
+}
+static void cpmac_get_mac(int instance, unsigned char *dev_addr)
+{
+        int i;
+        char name[5], default_mac[ETH_ALEN], *mac;
+        mac = NULL;
+        sprintf(name, "mac%c", 'a' + instance);
+        mac = prom_getenv(name);
+        if (!mac) {
+                sprintf(name, "mac%c", 'a');
+                mac = prom_getenv(name);
+        }
+        if (!mac) {
+                random_ether_addr(default_mac);
+                mac = default_mac;
+        }
+        for (i = 0; i < 6; i++)
+                dev_addr[i] = (char2hex(mac[i * 3]) << 4) +
+                        char2hex(mac[i * 3 + 1]);
+}
+static void __init detect_leds(void)
+{
+        char *prid, *usb_prod;
+        /* Default LEDs */
+        ar7_led_data.num_leds = ARRAY_SIZE(default_leds);
+        ar7_led_data.leds = default_leds;
+        /* FIXME: the whole thing is unreliable */
+        prid = prom_getenv("ProductID");
+        usb_prod = prom_getenv("usb_prod");
+        /* If we can't get the product id from PROM, use the default LEDs */
+        if (!prid)
+                return;
+        if (strstr(prid, "Fritz_Box_FON")) {
+                ar7_led_data.num_leds = ARRAY_SIZE(fb_fon_leds);
+                ar7_led_data.leds = fb_fon_leds;
+        } else if (strstr(prid, "Fritz_Box_")) {
+                ar7_led_data.num_leds = ARRAY_SIZE(fb_sl_leds);
+                ar7_led_data.leds = fb_sl_leds;
+        } else if ((!strcmp(prid, "AR7RD") || !strcmp(prid, "AR7DB"))
+                && usb_prod != NULL && strstr(usb_prod, "DSL-502T")) {
+                ar7_led_data.num_leds = ARRAY_SIZE(dsl502t_leds);
+                ar7_led_data.leds = dsl502t_leds;
+        } else if (strstr(prid, "DG834")) {
+                ar7_led_data.num_leds = ARRAY_SIZE(dg834g_leds);
+                ar7_led_data.leds = dg834g_leds;
+        }
+}
+static int __init ar7_register_devices(void)
+{
+        int res;
+        static struct uart_port uart_port[2];
+        memset(uart_port, 0, sizeof(struct uart_port) * 2);
+        uart_port[0].type = PORT_16550A;
+        uart_port[0].line = 0;
+        uart_port[0].irq = AR7_IRQ_UART0;
+        uart_port[0].uartclk = ar7_bus_freq() / 2;
+        uart_port[0].iotype = UPIO_MEM32;
+        uart_port[0].mapbase = AR7_REGS_UART0;
+        uart_port[0].membase = ioremap(uart_port[0].mapbase, 256);
+        uart_port[0].regshift = 2;
+        res = early_serial_setup(&uart_port[0]);
+        if (res)
+                return res;
+        /* Only TNETD73xx have a second serial port */
+        if (ar7_has_second_uart()) {
+                uart_port[1].type = PORT_16550A;
+                uart_port[1].line = 1;
+                uart_port[1].irq = AR7_IRQ_UART1;
+                uart_port[1].uartclk = ar7_bus_freq() / 2;
+                uart_port[1].iotype = UPIO_MEM32;
+                uart_port[1].mapbase = UR8_REGS_UART1;
+                uart_port[1].membase = ioremap(uart_port[1].mapbase, 256);
+                uart_port[1].regshift = 2;
+                res = early_serial_setup(&uart_port[1]);
+                if (res)
+                        return res;
+        }
+        res = platform_device_register(&physmap_flash);
+        if (res)
+                return res;
+        ar7_device_disable(vlynq_low_data.reset_bit);
+        res = platform_device_register(&vlynq_low);
+        if (res)
+                return res;
+        if (ar7_has_high_vlynq()) {
+                ar7_device_disable(vlynq_high_data.reset_bit);
+                res = platform_device_register(&vlynq_high);
+                if (res)
+                        return res;
+        }
+        if (ar7_has_high_cpmac()) {
+                cpmac_get_mac(1, cpmac_high_data.dev_addr);
+                res = platform_device_register(&cpmac_high);
+                if (res)
+                        return res;
+        } else {
+                cpmac_low_data.phy_mask = 0xffffffff;
+        }
+        cpmac_get_mac(0, cpmac_low_data.dev_addr);
+        res = platform_device_register(&cpmac_low);
+        if (res)
+                return res;
+        detect_leds();
+        res = platform_device_register(&ar7_gpio_leds);
+        if (res)
+                return res;
+        res = platform_device_register(&ar7_udc);
+        return res;
+}
+arch_initcall(ar7_register_devices);
diff --git a/arch/mips/ar7/prom.c b/arch/mips/ar7/prom.c
new file mode 100644
index 000000000000..a320bceb2f9d
--- /dev/null
+++ b/arch/mips/ar7/prom.c
@@ -0,0 +1,297 @@
+/*
+ * Carsten Langgaard, carstenl@mips.com
+ * Copyright (C) 1999,2000 MIPS Technologies, Inc.  All rights reserved.
+ *
+ *  This program is free software; you can distribute it and/or modify it
+ *  under the terms of the GNU General Public License (Version 2) as
+ *  published by the Free Software Foundation.
+ *
+ *  This program is distributed in the hope it will be useful, but WITHOUT
+ *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+ *  for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
+ *
+ * Putting things on the screen/serial line using YAMONs facilities.
+ */
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/serial_reg.h>
+#include <linux/spinlock.h>
+#include <linux/module.h>
+#include <linux/string.h>
+#include <linux/io.h>
+#include <asm/bootinfo.h>
+#include <asm/mach-ar7/ar7.h>
+#include <asm/mach-ar7/prom.h>
+#define MAX_ENTRY 80
+struct env_var {
+        char *name;
+        char *value;
+};
+static struct env_var adam2_env[MAX_ENTRY];
+char *prom_getenv(const char *name)
+{
+        int i;
+        for (i = 0; (i < MAX_ENTRY) && adam2_env[i].name; i++)
+                if (!strcmp(name, adam2_env[i].name))
+                        return adam2_env[i].value;
+        return NULL;
+}
+EXPORT_SYMBOL(prom_getenv);
+char * __init prom_getcmdline(void)
+{
+        return &(arcs_cmdline[0]);
+}
+static void  __init ar7_init_cmdline(int argc, char *argv[])
+{
+        char *cp;
+        int actr;
+        actr = 1; /* Always ignore argv[0] */
+        cp = &(arcs_cmdline[0]);
+        while (actr < argc) {
+                strcpy(cp, argv[actr]);
+                cp += strlen(argv[actr]);
+                *cp++ = ' ';
+                actr++;
+        }
+        if (cp != &(arcs_cmdline[0])) {
+                /* get rid of trailing space */
+                --cp;
+                *cp = '\0';
+        }
+}
+struct psbl_rec {
+        u32 psbl_size;
+        u32 env_base;
+        u32 env_size;
+        u32 ffs_base;
+        u32 ffs_size;
+};
+static __initdata char psp_env_version[] = "TIENV0.8";
+struct psp_env_chunk {
+        u8 num;
+        u8 ctrl;
+        u16 csum;
+        u8 len;
+        char data[11];
+} __attribute__ ((packed));
+struct psp_var_map_entry {
+        u8 num;
+        char *value;
+};
+static struct psp_var_map_entry psp_var_map[] = {
+        { 1, "cpufrequency" },
+        { 2, "memsize" },
+        { 3, "flashsize" },
+        { 4, "modetty0" },
+        { 5, "modetty1" },
+        { 8, "maca" },
+        { 9, "macb" },
+        { 28, "sysfrequency" },
+        { 38, "mipsfrequency" },
+};
+/*
+Well-known variable (num is looked up in table above for matching variable name)
+Example: cpufrequency=211968000
+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+---
+| 01 |CTRL|CHECKSUM | 01 | _2 | _1 | _1 | _9 | _6 | _8 | _0 | _0 | _0 | \0 | FF
+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+---
+Name=Value pair in a single chunk
+Example: NAME=VALUE
+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+---
+| 00 |CTRL|CHECKSUM | 01 | _N | _A | _M | _E | _0 | _V | _A | _L | _U | _E | \0
+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+---
+Name=Value pair in 2 chunks (len is the number of chunks)
+Example: bootloaderVersion=1.3.7.15
+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+---
+| 00 |CTRL|CHECKSUM | 02 | _b | _o | _o | _t | _l | _o | _a | _d | _e | _r | _V
+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+---
+| _e | _r | _s | _i | _o | _n | \0 | _1 | _. | _3 | _. | _7 | _. | _1 | _5 | \0
+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+---
+Data is padded with 0xFF
+*/
+#define PSP_ENV_SIZE  4096
+static char psp_env_data[PSP_ENV_SIZE] = { 0, };
+static char * __init lookup_psp_var_map(u8 num)
+{
+        int i;
+        for (i = 0; i < sizeof(psp_var_map); i++)
+                if (psp_var_map[i].num == num)
+                        return psp_var_map[i].value;
+        return NULL;
+}
+static void __init add_adam2_var(char *name, char *value)
+{
+        int i;
+        for (i = 0; i < MAX_ENTRY; i++) {
+                if (!adam2_env[i].name) {
+                        adam2_env[i].name = name;
+                        adam2_env[i].value = value;
+                        return;
+                } else if (!strcmp(adam2_env[i].name, name)) {
+                        adam2_env[i].value = value;
+                        return;
+                }
+        }
+}
+static int __init parse_psp_env(void *psp_env_base)
+{
+        int i, n;
+        char *name, *value;
+        struct psp_env_chunk *chunks = (struct psp_env_chunk *)psp_env_data;
+        memcpy_fromio(chunks, psp_env_base, PSP_ENV_SIZE);
+        i = 1;
+        n = PSP_ENV_SIZE / sizeof(struct psp_env_chunk);
+        while (i < n) {
+                if ((chunks[i].num == 0xff) || ((i + chunks[i].len) > n))
+                        break;
+                value = chunks[i].data;
+                if (chunks[i].num) {
+                        name = lookup_psp_var_map(chunks[i].num);
+                } else {
+                        name = value;
+                        value += strlen(name) + 1;
+                }
+                if (name)
+                        add_adam2_var(name, value);
+                i += chunks[i].len;
+        }
+        return 0;
+}
+static void __init ar7_init_env(struct env_var *env)
+{
+        int i;
+        struct psbl_rec *psbl = (struct psbl_rec *)(KSEG1ADDR(0x14000300));
+        void *psp_env = (void *)KSEG1ADDR(psbl->env_base);
+        if (strcmp(psp_env, psp_env_version) == 0) {
+                parse_psp_env(psp_env);
+        } else {
+                for (i = 0; i < MAX_ENTRY; i++, env++)
+                        if (env->name)
+                                add_adam2_var(env->name, env->value);
+        }
+}
+static void __init console_config(void)
+{
+#ifdef CONFIG_SERIAL_8250_CONSOLE
+        char console_string[40];
+        int baud = 0;
+        char parity = '\0', bits = '\0', flow = '\0';
+        char *s, *p;
+        if (strstr(prom_getcmdline(), "console="))
+                return;
+#ifdef CONFIG_KGDB
+        if (!strstr(prom_getcmdline(), "nokgdb")) {
+                strcat(prom_getcmdline(), " console=kgdb");
+                kgdb_enabled = 1;
+                return;
+        }
+#endif
+        s = prom_getenv("modetty0");
+        if (s) {
+                baud = simple_strtoul(s, &p, 10);
+                s = p;
+                if (*s == ',')
+                        s++;
+                if (*s)
+                        parity = *s++;
+                if (*s == ',')
+                        s++;
+                if (*s)
+                        bits = *s++;
+                if (*s == ',')
+                        s++;
+                if (*s == 'h')
+                        flow = 'r';
+        }
+        if (baud == 0)
+                baud = 38400;
+        if (parity != 'n' && parity != 'o' && parity != 'e')
+                parity = 'n';
+        if (bits != '7' && bits != '8')
+                bits = '8';
+        if (flow == 'r')
+                sprintf(console_string, " console=ttyS0,%d%c%c%c", baud,
+                        parity, bits, flow);
+        else
+                sprintf(console_string, " console=ttyS0,%d%c%c", baud, parity,
+                        bits);
+        strcat(prom_getcmdline(), console_string);
+#endif
+}
+void __init prom_init(void)
+{
+        ar7_init_cmdline(fw_arg0, (char **)fw_arg1);
+        ar7_init_env((struct env_var *)fw_arg2);
+        console_config();
+}
+#define PORT(offset) (KSEG1ADDR(AR7_REGS_UART0 + (offset * 4)))
+static inline unsigned int serial_in(int offset)
+{
+        return readl((void *)PORT(offset));
+}
+static inline void serial_out(int offset, int value)
+{
+        writel(value, (void *)PORT(offset));
+}
+char prom_getchar(void)
+{
+        while (!(serial_in(UART_LSR) & UART_LSR_DR))
+                ;
+        return serial_in(UART_RX);
+}
+int prom_putchar(char c)
+{
+        while ((serial_in(UART_LSR) & UART_LSR_TEMT) == 0)
+                ;
+        serial_out(UART_TX, c);
+        return 1;
+}
diff --git a/arch/mips/ar7/setup.c b/arch/mips/ar7/setup.c
new file mode 100644
index 000000000000..6ebb5f16d967
--- /dev/null
+++ b/arch/mips/ar7/setup.c
@@ -0,0 +1,94 @@
+/*
+ * Carsten Langgaard, carstenl@mips.com
+ * Copyright (C) 2000 MIPS Technologies, Inc.  All rights reserved.
+ *
+ *  This program is free software; you can distribute it and/or modify it
+ *  under the terms of the GNU General Public License (Version 2) as
+ *  published by the Free Software Foundation.
+ *
+ *  This program is distributed in the hope it will be useful, but WITHOUT
+ *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+ *  for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
+ */
+#include <linux/version.h>
+#include <linux/init.h>
+#include <linux/ioport.h>
+#include <linux/pm.h>
+#include <linux/time.h>
+#include <asm/reboot.h>
+#include <asm/mach-ar7/ar7.h>
+#include <asm/mach-ar7/prom.h>
+static void ar7_machine_restart(char *command)
+{
+        u32 *softres_reg = ioremap(AR7_REGS_RESET +
+                                          AR7_RESET_SOFTWARE, 1);
+        writel(1, softres_reg);
+}
+static void ar7_machine_halt(void)
+{
+        while (1)
+                ;
+}
+static void ar7_machine_power_off(void)
+{
+        u32 *power_reg = (u32 *)ioremap(AR7_REGS_POWER, 1);
+        u32 power_state = readl(power_reg) | (3 << 30);
+        writel(power_state, power_reg);
+        ar7_machine_halt();
+}
+const char *get_system_type(void)
+{
+        u16 chip_id = ar7_chip_id();
+        switch (chip_id) {
+        case AR7_CHIP_7300:
+                return "TI AR7 (TNETD7300)";
+        case AR7_CHIP_7100:
+                return "TI AR7 (TNETD7100)";
+        case AR7_CHIP_7200:
+                return "TI AR7 (TNETD7200)";
+        default:
+                return "TI AR7 (Unknown)";
+        }
+}
+static int __init ar7_init_console(void)
+{
+        return 0;
+}
+console_initcall(ar7_init_console);
+/*
+ * Initializes basic routines and structures pointers, memory size (as
+ * given by the bios and saves the command line.
+ */
+void __init plat_mem_setup(void)
+{
+        unsigned long io_base;
+        _machine_restart = ar7_machine_restart;
+        _machine_halt = ar7_machine_halt;
+        pm_power_off = ar7_machine_power_off;
+        panic_timeout = 3;
+        io_base = (unsigned long)ioremap(AR7_REGS_BASE, 0x10000);
+        if (!io_base)
+                panic("Can't remap IO base!\n");
+        set_io_port_base(io_base);
+        prom_meminit();
+        printk(KERN_INFO "%s, ID: 0x%04x, Revision: 0x%02x\n",
+                                        get_system_type(),
+                ar7_chip_id(), ar7_chip_rev());
+}
diff --git a/arch/mips/ar7/time.c b/arch/mips/ar7/time.c
new file mode 100644
index 000000000000..a1fba894daa2
--- /dev/null
+++ b/arch/mips/ar7/time.c
@@ -0,0 +1,30 @@
+/*
+ * Carsten Langgaard, carstenl@mips.com
+ * Copyright (C) 1999,2000 MIPS Technologies, Inc.  All rights reserved.
+ *
+ *  This program is free software; you can distribute it and/or modify it
+ *  under the terms of the GNU General Public License (Version 2) as
+ *  published by the Free Software Foundation.
+ *
+ *  This program is distributed in the hope it will be useful, but WITHOUT
+ *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+ *  for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
+ *
+ * Setting up the clock on the MIPS boards.
+ */
+#include <linux/init.h>
+#include <linux/time.h>
+#include <asm/time.h>
+#include <asm/mach-ar7/ar7.h>
+void __init plat_time_init(void)
+{
+        mips_hpt_frequency = ar7_cpu_freq() / 2;
+}
diff --git a/arch/mips/cavium-octeon/Makefile b/arch/mips/cavium-octeon/Makefile
index 7c0528b0e34c..d6903c3f3d51 100644
--- a/arch/mips/cavium-octeon/Makefile
+++ b/arch/mips/cavium-octeon/Makefile
@@ -14,9 +14,5 @@ obj-y += dma-octeon.o flash_setup.o
 obj-y += octeon-memcpy.o
 obj-$(CONFIG_SMP)                     += smp.o
-obj-$(CONFIG_PCI)                     += pci-common.o
-obj-$(CONFIG_PCI)                     += pci.o
-obj-$(CONFIG_PCI)                     += pcie.o
-obj-$(CONFIG_PCI_MSI)                 += msi.o
 EXTRA_CFLAGS += -Werror
diff --git a/arch/mips/cavium-octeon/dma-octeon.c b/arch/mips/cavium-octeon/dma-octeon.c
index 627c162a6159..4b92bfc662db 100644
--- a/arch/mips/cavium-octeon/dma-octeon.c
+++ b/arch/mips/cavium-octeon/dma-octeon.c
@@ -29,7 +29,7 @@
 #include <dma-coherence.h>
 #ifdef CONFIG_PCI
-#include "pci-common.h"
+#include <asm/octeon/pci-octeon.h>
 #endif
 #define BAR2_PCI_ADDRESS 0x8000000000ul
diff --git a/arch/mips/cavium-octeon/pci-common.c b/arch/mips/cavium-octeon/pci-common.c
deleted file mode 100644
index cd029f88da7f..000000000000
--- a/arch/mips/cavium-octeon/pci-common.c
+++ /dev/null
@@ -1,137 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 2005-2007 Cavium Networks
- */
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/pci.h>
-#include <linux/interrupt.h>
-#include <linux/time.h>
-#include <linux/delay.h>
-#include "pci-common.h"
-typeof(pcibios_map_irq) *octeon_pcibios_map_irq;
-enum octeon_dma_bar_type octeon_dma_bar_type = OCTEON_DMA_BAR_TYPE_INVALID;
-/**
- * Map a PCI device to the appropriate interrupt line
- *
- * @param dev    The Linux PCI device structure for the device to map
- * @param slot   The slot number for this device on __BUS 0__. Linux
- *               enumerates through all the bridges and figures out the
- *               slot on Bus 0 where this device eventually hooks to.
- * @param pin    The PCI interrupt pin read from the device, then swizzled
- *               as it goes through each bridge.
- * @return Interrupt number for the device
- */
-int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
-{
-        if (octeon_pcibios_map_irq)
-                return octeon_pcibios_map_irq(dev, slot, pin);
-        else
-                panic("octeon_pcibios_map_irq doesn't point to a "
-                      "pcibios_map_irq() function");
-}
-/**
- * Called to perform platform specific PCI setup
- *
- * @param dev
- * @return
- */
-int pcibios_plat_dev_init(struct pci_dev *dev)
-{
-        uint16_t config;
-        uint32_t dconfig;
-        int pos;
-        /*
-         * Force the Cache line setting to 64 bytes. The standard
-         * Linux bus scan doesn't seem to set it. Octeon really has
-         * 128 byte lines, but Intel bridges get really upset if you
-         * try and set values above 64 bytes. Value is specified in
-         * 32bit words.
-         */
-        pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, 64 / 4);
-        /* Set latency timers for all devices */
-        pci_write_config_byte(dev, PCI_LATENCY_TIMER, 48);
-        /* Enable reporting System errors and parity errors on all devices */
-        /* Enable parity checking and error reporting */
-        pci_read_config_word(dev, PCI_COMMAND, &config);
-        config |= PCI_COMMAND_PARITY | PCI_COMMAND_SERR;
-        pci_write_config_word(dev, PCI_COMMAND, config);
-        if (dev->subordinate) {
-                /* Set latency timers on sub bridges */
-                pci_write_config_byte(dev, PCI_SEC_LATENCY_TIMER, 48);
-                /* More bridge error detection */
-                pci_read_config_word(dev, PCI_BRIDGE_CONTROL, &config);
-                config |= PCI_BRIDGE_CTL_PARITY | PCI_BRIDGE_CTL_SERR;
-                pci_write_config_word(dev, PCI_BRIDGE_CONTROL, config);
-        }
-        /* Enable the PCIe normal error reporting */
-        pos = pci_find_capability(dev, PCI_CAP_ID_EXP);
-        if (pos) {
-                /* Update Device Control */
-                pci_read_config_word(dev, pos + PCI_EXP_DEVCTL, &config);
-                /* Correctable Error Reporting */
-                config |= PCI_EXP_DEVCTL_CERE;
-                /* Non-Fatal Error Reporting */
-                config |= PCI_EXP_DEVCTL_NFERE;
-                /* Fatal Error Reporting */
-                config |= PCI_EXP_DEVCTL_FERE;
-                /* Unsupported Request */
-                config |= PCI_EXP_DEVCTL_URRE;
-                pci_write_config_word(dev, pos + PCI_EXP_DEVCTL, config);
-        }
-        /* Find the Advanced Error Reporting capability */
-        pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR);
-        if (pos) {
-                /* Clear Uncorrectable Error Status */
-                pci_read_config_dword(dev, pos + PCI_ERR_UNCOR_STATUS,
-                                      &dconfig);
-                pci_write_config_dword(dev, pos + PCI_ERR_UNCOR_STATUS,
-                                       dconfig);
-                /* Enable reporting of all uncorrectable errors */
-                /* Uncorrectable Error Mask - turned on bits disable errors */
-                pci_write_config_dword(dev, pos + PCI_ERR_UNCOR_MASK, 0);
-                /*
-                 * Leave severity at HW default. This only controls if
-                 * errors are reported as uncorrectable or
-                 * correctable, not if the error is reported.
-                 */
-                /* PCI_ERR_UNCOR_SEVER - Uncorrectable Error Severity */
-                /* Clear Correctable Error Status */
-                pci_read_config_dword(dev, pos + PCI_ERR_COR_STATUS, &dconfig);
-                pci_write_config_dword(dev, pos + PCI_ERR_COR_STATUS, dconfig);
-                /* Enable reporting of all correctable errors */
-                /* Correctable Error Mask - turned on bits disable errors */
-                pci_write_config_dword(dev, pos + PCI_ERR_COR_MASK, 0);
-                /* Advanced Error Capabilities */
-                pci_read_config_dword(dev, pos + PCI_ERR_CAP, &dconfig);
-                /* ECRC Generation Enable */
-                if (config & PCI_ERR_CAP_ECRC_GENC)
-                        config |= PCI_ERR_CAP_ECRC_GENE;
-                /* ECRC Check Enable */
-                if (config & PCI_ERR_CAP_ECRC_CHKC)
-                        config |= PCI_ERR_CAP_ECRC_CHKE;
-                pci_write_config_dword(dev, pos + PCI_ERR_CAP, dconfig);
-                /* PCI_ERR_HEADER_LOG - Header Log Register (16 bytes) */
-                /* Report all errors to the root complex */
-                pci_write_config_dword(dev, pos + PCI_ERR_ROOT_COMMAND,
-                                       PCI_ERR_ROOT_CMD_COR_EN |
-                                       PCI_ERR_ROOT_CMD_NONFATAL_EN |
-                                       PCI_ERR_ROOT_CMD_FATAL_EN);
-                /* Clear the Root status register */
-                pci_read_config_dword(dev, pos + PCI_ERR_ROOT_STATUS, &dconfig);
-                pci_write_config_dword(dev, pos + PCI_ERR_ROOT_STATUS, dconfig);
-        }
-        return 0;
-}
diff --git a/arch/mips/cobalt/buttons.c b/arch/mips/cobalt/buttons.c
index 9e143989c7b8..4eaec8b46e0c 100644
--- a/arch/mips/cobalt/buttons.c
+++ b/arch/mips/cobalt/buttons.c
@@ -1,7 +1,7 @@
 /*
 *  Cobalt buttons platform device.
 *
- *  Copyright (C) 2007  Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
+ *  Copyright (C) 2007  Yoichi Yuasa <yuasa@linux-mips.org>
 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License as published by
diff --git a/arch/mips/cobalt/lcd.c b/arch/mips/cobalt/lcd.c
index 0720e4fae311..0f1cd90f37ed 100644
--- a/arch/mips/cobalt/lcd.c
+++ b/arch/mips/cobalt/lcd.c
@@ -1,7 +1,7 @@
 /*
 *  Registration of Cobalt LCD platform device.
 *
- *  Copyright (C) 2008  Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
+ *  Copyright (C) 2008  Yoichi Yuasa <yuasa@linux-mips.org>
 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License as published by
diff --git a/arch/mips/cobalt/led.c b/arch/mips/cobalt/led.c
index 1c6ebd468b07..d3ce6fa1dc74 100644
--- a/arch/mips/cobalt/led.c
+++ b/arch/mips/cobalt/led.c
@@ -1,7 +1,7 @@
 /*
 *  Registration of Cobalt LED platform device.
 *
- *  Copyright (C) 2007  Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
+ *  Copyright (C) 2007  Yoichi Yuasa <yuasa@linux-mips.org>
 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License as published by
diff --git a/arch/mips/cobalt/mtd.c b/arch/mips/cobalt/mtd.c
index 2b088ef3839a..691d620b6766 100644
--- a/arch/mips/cobalt/mtd.c
+++ b/arch/mips/cobalt/mtd.c
@@ -1,7 +1,7 @@
 /*
 *  Registration of Cobalt MTD device.
 *
- *  Copyright (C) 2006  Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
+ *  Copyright (C) 2006  Yoichi Yuasa <yuasa@linux-mips.org>
 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License as published by
diff --git a/arch/mips/cobalt/rtc.c b/arch/mips/cobalt/rtc.c
index e70794b8bcba..3ab39898b4e4 100644
--- a/arch/mips/cobalt/rtc.c
+++ b/arch/mips/cobalt/rtc.c
@@ -1,7 +1,7 @@
 /*
 *  Registration of Cobalt RTC platform device.
 *
- *  Copyright (C) 2007  Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
+ *  Copyright (C) 2007  Yoichi Yuasa <yuasa@linux-mips.org>
 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License as published by
diff --git a/arch/mips/cobalt/serial.c b/arch/mips/cobalt/serial.c
index 53b8d0d6da90..7cb51f57275e 100644
--- a/arch/mips/cobalt/serial.c
+++ b/arch/mips/cobalt/serial.c
@@ -1,7 +1,7 @@
 /*
 *  Registration of Cobalt UART platform device.
 *
- *  Copyright (C) 2007  Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
+ *  Copyright (C) 2007  Yoichi Yuasa <yuasa@linux-mips.org>
 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License as published by
diff --git a/arch/mips/cobalt/time.c b/arch/mips/cobalt/time.c
index 4a570e7145fe..0162f9edc693 100644
--- a/arch/mips/cobalt/time.c
+++ b/arch/mips/cobalt/time.c
@@ -1,7 +1,7 @@
 /*
 *  Cobalt time initialization.
 *
- *  Copyright (C) 2007  Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
+ *  Copyright (C) 2007  Yoichi Yuasa <yuasa@linux-mips.org>
 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License as published by
diff --git a/arch/mips/configs/ar7_defconfig b/arch/mips/configs/ar7_defconfig
new file mode 100644
index 000000000000..dad5b6769d74
--- /dev/null
+++ b/arch/mips/configs/ar7_defconfig
@@ -0,0 +1,1182 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.30
+# Wed Jun 24 14:08:59 2009
+#
+CONFIG_MIPS=y
+#
+# Machine selection
+#
+# CONFIG_MACH_ALCHEMY is not set
+CONFIG_AR7=y
+# CONFIG_BASLER_EXCITE is not set
+# CONFIG_BCM47XX is not set
+# CONFIG_MIPS_COBALT is not set
+# CONFIG_MACH_DECSTATION is not set
+# CONFIG_MACH_JAZZ is not set
+# CONFIG_LASAT is not set
+# CONFIG_LEMOTE_FULONG is not set
+# CONFIG_MIPS_MALTA is not set
+# CONFIG_MIPS_SIM is not set
+# CONFIG_NEC_MARKEINS is not set
+# CONFIG_MACH_VR41XX is not set
+# CONFIG_NXP_STB220 is not set
+# CONFIG_NXP_STB225 is not set
+# CONFIG_PNX8550_JBS is not set
+# CONFIG_PNX8550_STB810 is not set
+# CONFIG_PMC_MSP is not set
+# CONFIG_PMC_YOSEMITE is not set
+# CONFIG_SGI_IP22 is not set
+# CONFIG_SGI_IP27 is not set
+# CONFIG_SGI_IP28 is not set
+# CONFIG_SGI_IP32 is not set
+# CONFIG_SIBYTE_CRHINE is not set
+# CONFIG_SIBYTE_CARMEL is not set
+# CONFIG_SIBYTE_CRHONE is not set
+# CONFIG_SIBYTE_RHONE is not set
+# CONFIG_SIBYTE_SWARM is not set
+# CONFIG_SIBYTE_LITTLESUR is not set
+# CONFIG_SIBYTE_SENTOSA is not set
+# CONFIG_SIBYTE_BIGSUR is not set
+# CONFIG_SNI_RM is not set
+# CONFIG_MACH_TX39XX is not set
+# CONFIG_MACH_TX49XX is not set
+# CONFIG_MIKROTIK_RB532 is not set
+# CONFIG_WR_PPMC is not set
+# CONFIG_CAVIUM_OCTEON_SIMULATOR is not set
+# CONFIG_CAVIUM_OCTEON_REFERENCE_BOARD is not set
+# CONFIG_ALCHEMY_GPIO_INDIRECT is not set
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+# CONFIG_ARCH_HAS_ILOG2_U32 is not set
+# CONFIG_ARCH_HAS_ILOG2_U64 is not set
+CONFIG_ARCH_SUPPORTS_OPROFILE=y
+CONFIG_GENERIC_FIND_NEXT_BIT=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_CMOS_UPDATE=y
+CONFIG_SCHED_OMIT_FRAME_POINTER=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
+CONFIG_CEVT_R4K_LIB=y
+CONFIG_CEVT_R4K=y
+CONFIG_CSRC_R4K_LIB=y
+CONFIG_CSRC_R4K=y
+CONFIG_DMA_NONCOHERENT=y
+CONFIG_DMA_NEED_PCI_MAP_STATE=y
+CONFIG_EARLY_PRINTK=y
+CONFIG_SYS_HAS_EARLY_PRINTK=y
+# CONFIG_HOTPLUG_CPU is not set
+# CONFIG_NO_IOPORT is not set
+CONFIG_GENERIC_GPIO=y
+# CONFIG_CPU_BIG_ENDIAN is not set
+CONFIG_CPU_LITTLE_ENDIAN=y
+CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
+CONFIG_IRQ_CPU=y
+CONFIG_NO_EXCEPT_FILL=y
+CONFIG_SWAP_IO_SPACE=y
+CONFIG_BOOT_ELF32=y
+CONFIG_MIPS_L1_CACHE_SHIFT=5
+#
+# CPU selection
+#
+# CONFIG_CPU_LOONGSON2 is not set
+CONFIG_CPU_MIPS32_R1=y
+# CONFIG_CPU_MIPS32_R2 is not set
+# CONFIG_CPU_MIPS64_R1 is not set
+# CONFIG_CPU_MIPS64_R2 is not set
+# CONFIG_CPU_R3000 is not set
+# CONFIG_CPU_TX39XX is not set
+# CONFIG_CPU_VR41XX is not set
+# CONFIG_CPU_R4300 is not set
+# CONFIG_CPU_R4X00 is not set
+# CONFIG_CPU_TX49XX is not set
+# CONFIG_CPU_R5000 is not set
+# CONFIG_CPU_R5432 is not set
+# CONFIG_CPU_R5500 is not set
+# CONFIG_CPU_R6000 is not set
+# CONFIG_CPU_NEVADA is not set
+# CONFIG_CPU_R8000 is not set
+# CONFIG_CPU_R10000 is not set
+# CONFIG_CPU_RM7000 is not set
+# CONFIG_CPU_RM9000 is not set
+# CONFIG_CPU_SB1 is not set
+# CONFIG_CPU_CAVIUM_OCTEON is not set
+CONFIG_SYS_HAS_CPU_MIPS32_R1=y
+CONFIG_CPU_MIPS32=y
+CONFIG_CPU_MIPSR1=y
+CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
+CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
+CONFIG_HARDWARE_WATCHPOINTS=y
+#
+# Kernel type
+#
+CONFIG_32BIT=y
+# CONFIG_64BIT is not set
+CONFIG_PAGE_SIZE_4KB=y
+# CONFIG_PAGE_SIZE_8KB is not set
+# CONFIG_PAGE_SIZE_16KB is not set
+# CONFIG_PAGE_SIZE_32KB is not set
+# CONFIG_PAGE_SIZE_64KB is not set
+CONFIG_CPU_HAS_PREFETCH=y
+CONFIG_MIPS_MT_DISABLED=y
+# CONFIG_MIPS_MT_SMP is not set
+# CONFIG_MIPS_MT_SMTC is not set
+CONFIG_CPU_HAS_LLSC=y
+CONFIG_CPU_HAS_SYNC=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_CPU_SUPPORTS_HIGHMEM=y
+CONFIG_ARCH_FLATMEM_ENABLE=y
+CONFIG_ARCH_POPULATES_NODE_MAP=y
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=0
+CONFIG_VIRT_TO_BUS=y
+CONFIG_HAVE_MLOCK=y
+CONFIG_HAVE_MLOCKED_PAGE_BIT=y
+CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
+CONFIG_TICK_ONESHOT=y
+# CONFIG_NO_HZ is not set
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+# CONFIG_HZ_48 is not set
+CONFIG_HZ_100=y
+# CONFIG_HZ_128 is not set
+# CONFIG_HZ_250 is not set
+# CONFIG_HZ_256 is not set
+# CONFIG_HZ_1000 is not set
+# CONFIG_HZ_1024 is not set
+CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
+CONFIG_HZ=100
+CONFIG_PREEMPT_NONE=y
+# CONFIG_PREEMPT_VOLUNTARY is not set
+# CONFIG_PREEMPT is not set
+CONFIG_KEXEC=y
+# CONFIG_SECCOMP is not set
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+# CONFIG_LOCALVERSION_AUTO is not set
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+# CONFIG_POSIX_MQUEUE is not set
+CONFIG_BSD_PROCESS_ACCT=y
+# CONFIG_BSD_PROCESS_ACCT_V3 is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_AUDIT is not set
+#
+# RCU Subsystem
+#
+CONFIG_CLASSIC_RCU=y
+# CONFIG_TREE_RCU is not set
+# CONFIG_PREEMPT_RCU is not set
+# CONFIG_TREE_RCU_TRACE is not set
+# CONFIG_PREEMPT_RCU_TRACE is not set
+# CONFIG_IKCONFIG is not set
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_GROUP_SCHED is not set
+# CONFIG_CGROUPS is not set
+CONFIG_SYSFS_DEPRECATED=y
+CONFIG_SYSFS_DEPRECATED_V2=y
+CONFIG_RELAY=y
+# CONFIG_NAMESPACES is not set
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_RD_GZIP=y
+# CONFIG_RD_BZIP2 is not set
+CONFIG_RD_LZMA=y
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
+CONFIG_EMBEDDED=y
+CONFIG_SYSCTL_SYSCALL=y
+# CONFIG_KALLSYMS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+# CONFIG_ELF_CORE is not set
+# CONFIG_PCSPKR_PLATFORM is not set
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_AIO=y
+#
+# Performance Counters
+#
+# CONFIG_VM_EVENT_COUNTERS is not set
+CONFIG_STRIP_ASM_SYMS=y
+# CONFIG_COMPAT_BRK is not set
+CONFIG_SLAB=y
+# CONFIG_SLUB is not set
+# CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+# CONFIG_MARKERS is not set
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_SLOW_WORK is not set
+# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_BLOCK=y
+# CONFIG_LBD is not set
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+# CONFIG_IOSCHED_AS is not set
+CONFIG_IOSCHED_DEADLINE=y
+# CONFIG_IOSCHED_CFQ is not set
+# CONFIG_DEFAULT_AS is not set
+CONFIG_DEFAULT_DEADLINE=y
+# CONFIG_DEFAULT_CFQ is not set
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="deadline"
+CONFIG_PROBE_INITRD_HEADER=y
+# CONFIG_FREEZER is not set
+#
+# Bus options (PCI, PCMCIA, EISA, ISA, TC)
+#
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+CONFIG_MMU=y
+# CONFIG_PCCARD is not set
+#
+# Executable file formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_HAVE_AOUT is not set
+# CONFIG_BINFMT_MISC is not set
+CONFIG_TRAD_SIGNALS=y
+#
+# Power management options
+#
+CONFIG_ARCH_HIBERNATION_POSSIBLE=y
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+# CONFIG_PM is not set
+CONFIG_NET=y
+#
+# Networking options
+#
+CONFIG_PACKET=y
+CONFIG_PACKET_MMAP=y
+CONFIG_UNIX=y
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+CONFIG_IP_ADVANCED_ROUTER=y
+CONFIG_ASK_IP_FIB_HASH=y
+# CONFIG_IP_FIB_TRIE is not set
+CONFIG_IP_FIB_HASH=y
+CONFIG_IP_MULTIPLE_TABLES=y
+CONFIG_IP_ROUTE_MULTIPATH=y
+CONFIG_IP_ROUTE_VERBOSE=y
+# CONFIG_IP_PNP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+CONFIG_IP_MROUTE=y
+# CONFIG_IP_PIMSM_V1 is not set
+# CONFIG_IP_PIMSM_V2 is not set
+CONFIG_ARPD=y
+CONFIG_SYN_COOKIES=y
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+# CONFIG_INET_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+# CONFIG_INET_LRO is not set
+# CONFIG_INET_DIAG is not set
+CONFIG_TCP_CONG_ADVANCED=y
+# CONFIG_TCP_CONG_BIC is not set
+# CONFIG_TCP_CONG_CUBIC is not set
+CONFIG_TCP_CONG_WESTWOOD=y
+# CONFIG_TCP_CONG_HTCP is not set
+# CONFIG_TCP_CONG_HSTCP is not set
+# CONFIG_TCP_CONG_HYBLA is not set
+# CONFIG_TCP_CONG_VEGAS is not set
+# CONFIG_TCP_CONG_SCALABLE is not set
+# CONFIG_TCP_CONG_LP is not set
+# CONFIG_TCP_CONG_VENO is not set
+# CONFIG_TCP_CONG_YEAH is not set
+# CONFIG_TCP_CONG_ILLINOIS is not set
+# CONFIG_DEFAULT_BIC is not set
+# CONFIG_DEFAULT_CUBIC is not set
+# CONFIG_DEFAULT_HTCP is not set
+# CONFIG_DEFAULT_VEGAS is not set
+CONFIG_DEFAULT_WESTWOOD=y
+# CONFIG_DEFAULT_RENO is not set
+CONFIG_DEFAULT_TCP_CONG="westwood"
+# CONFIG_TCP_MD5SIG is not set
+# CONFIG_IPV6 is not set
+# CONFIG_NETWORK_SECMARK is not set
+CONFIG_NETFILTER=y
+# CONFIG_NETFILTER_DEBUG is not set
+CONFIG_NETFILTER_ADVANCED=y
+# CONFIG_BRIDGE_NETFILTER is not set
+#
+# Core Netfilter Configuration
+#
+# CONFIG_NETFILTER_NETLINK_QUEUE is not set
+# CONFIG_NETFILTER_NETLINK_LOG is not set
+CONFIG_NF_CONNTRACK=m
+# CONFIG_NF_CT_ACCT is not set
+CONFIG_NF_CONNTRACK_MARK=y
+# CONFIG_NF_CONNTRACK_EVENTS is not set
+# CONFIG_NF_CT_PROTO_DCCP is not set
+# CONFIG_NF_CT_PROTO_SCTP is not set
+# CONFIG_NF_CT_PROTO_UDPLITE is not set
+# CONFIG_NF_CONNTRACK_AMANDA is not set
+CONFIG_NF_CONNTRACK_FTP=m
+# CONFIG_NF_CONNTRACK_H323 is not set
+CONFIG_NF_CONNTRACK_IRC=m
+# CONFIG_NF_CONNTRACK_NETBIOS_NS is not set
+# CONFIG_NF_CONNTRACK_PPTP is not set
+# CONFIG_NF_CONNTRACK_SANE is not set
+# CONFIG_NF_CONNTRACK_SIP is not set
+CONFIG_NF_CONNTRACK_TFTP=m
+# CONFIG_NF_CT_NETLINK is not set
+# CONFIG_NETFILTER_TPROXY is not set
+CONFIG_NETFILTER_XTABLES=m
+# CONFIG_NETFILTER_XT_TARGET_CLASSIFY is not set
+# CONFIG_NETFILTER_XT_TARGET_CONNMARK is not set
+# CONFIG_NETFILTER_XT_TARGET_DSCP is not set
+# CONFIG_NETFILTER_XT_TARGET_HL is not set
+# CONFIG_NETFILTER_XT_TARGET_LED is not set
+# CONFIG_NETFILTER_XT_TARGET_MARK is not set
+# CONFIG_NETFILTER_XT_TARGET_NFLOG is not set
+# CONFIG_NETFILTER_XT_TARGET_NFQUEUE is not set
+CONFIG_NETFILTER_XT_TARGET_NOTRACK=m
+# CONFIG_NETFILTER_XT_TARGET_RATEEST is not set
+# CONFIG_NETFILTER_XT_TARGET_TRACE is not set
+CONFIG_NETFILTER_XT_TARGET_TCPMSS=m
+# CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set
+# CONFIG_NETFILTER_XT_MATCH_CLUSTER is not set
+# CONFIG_NETFILTER_XT_MATCH_COMMENT is not set
+# CONFIG_NETFILTER_XT_MATCH_CONNBYTES is not set
+# CONFIG_NETFILTER_XT_MATCH_CONNLIMIT is not set
+# CONFIG_NETFILTER_XT_MATCH_CONNMARK is not set
+# CONFIG_NETFILTER_XT_MATCH_CONNTRACK is not set
+# CONFIG_NETFILTER_XT_MATCH_DCCP is not set
+# CONFIG_NETFILTER_XT_MATCH_DSCP is not set
+# CONFIG_NETFILTER_XT_MATCH_ESP is not set
+# CONFIG_NETFILTER_XT_MATCH_HASHLIMIT is not set
+# CONFIG_NETFILTER_XT_MATCH_HELPER is not set
+# CONFIG_NETFILTER_XT_MATCH_HL is not set
+# CONFIG_NETFILTER_XT_MATCH_IPRANGE is not set
+# CONFIG_NETFILTER_XT_MATCH_LENGTH is not set
+CONFIG_NETFILTER_XT_MATCH_LIMIT=m
+CONFIG_NETFILTER_XT_MATCH_MAC=m
+# CONFIG_NETFILTER_XT_MATCH_MARK is not set
+CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m
+# CONFIG_NETFILTER_XT_MATCH_OWNER is not set
+# CONFIG_NETFILTER_XT_MATCH_PKTTYPE is not set
+# CONFIG_NETFILTER_XT_MATCH_QUOTA is not set
+# CONFIG_NETFILTER_XT_MATCH_RATEEST is not set
+# CONFIG_NETFILTER_XT_MATCH_REALM is not set
+# CONFIG_NETFILTER_XT_MATCH_RECENT is not set
+# CONFIG_NETFILTER_XT_MATCH_SCTP is not set
+CONFIG_NETFILTER_XT_MATCH_STATE=m
+# CONFIG_NETFILTER_XT_MATCH_STATISTIC is not set
+# CONFIG_NETFILTER_XT_MATCH_STRING is not set
+# CONFIG_NETFILTER_XT_MATCH_TCPMSS is not set
+# CONFIG_NETFILTER_XT_MATCH_TIME is not set
+# CONFIG_NETFILTER_XT_MATCH_U32 is not set
+# CONFIG_IP_VS is not set
+#
+# IP: Netfilter Configuration
+#
+CONFIG_NF_DEFRAG_IPV4=m
+CONFIG_NF_CONNTRACK_IPV4=m
+CONFIG_NF_CONNTRACK_PROC_COMPAT=y
+# CONFIG_IP_NF_QUEUE is not set
+CONFIG_IP_NF_IPTABLES=m
+# CONFIG_IP_NF_MATCH_ADDRTYPE is not set
+# CONFIG_IP_NF_MATCH_AH is not set
+# CONFIG_IP_NF_MATCH_ECN is not set
+# CONFIG_IP_NF_MATCH_TTL is not set
+CONFIG_IP_NF_FILTER=m
+CONFIG_IP_NF_TARGET_REJECT=m
+CONFIG_IP_NF_TARGET_LOG=m
+# CONFIG_IP_NF_TARGET_ULOG is not set
+CONFIG_NF_NAT=m
+CONFIG_NF_NAT_NEEDED=y
+CONFIG_IP_NF_TARGET_MASQUERADE=m
+# CONFIG_IP_NF_TARGET_NETMAP is not set
+# CONFIG_IP_NF_TARGET_REDIRECT is not set
+# CONFIG_NF_NAT_SNMP_BASIC is not set
+CONFIG_NF_NAT_FTP=m
+CONFIG_NF_NAT_IRC=m
+CONFIG_NF_NAT_TFTP=m
+# CONFIG_NF_NAT_AMANDA is not set
+# CONFIG_NF_NAT_PPTP is not set
+# CONFIG_NF_NAT_H323 is not set
+# CONFIG_NF_NAT_SIP is not set
+CONFIG_IP_NF_MANGLE=m
+# CONFIG_IP_NF_TARGET_CLUSTERIP is not set
+# CONFIG_IP_NF_TARGET_ECN is not set
+# CONFIG_IP_NF_TARGET_TTL is not set
+CONFIG_IP_NF_RAW=m
+# CONFIG_IP_NF_ARPTABLES is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_TIPC is not set
+CONFIG_ATM=m
+# CONFIG_ATM_CLIP is not set
+# CONFIG_ATM_LANE is not set
+CONFIG_ATM_BR2684=m
+CONFIG_ATM_BR2684_IPFILTER=y
+CONFIG_STP=y
+CONFIG_BRIDGE=y
+# CONFIG_NET_DSA is not set
+CONFIG_VLAN_8021Q=y
+# CONFIG_VLAN_8021Q_GVRP is not set
+# CONFIG_DECNET is not set
+CONFIG_LLC=y
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_PHONET is not set
+# CONFIG_IEEE802154 is not set
+CONFIG_NET_SCHED=y
+#
+# Queueing/Scheduling
+#
+# CONFIG_NET_SCH_CBQ is not set
+# CONFIG_NET_SCH_HTB is not set
+# CONFIG_NET_SCH_HFSC is not set
+# CONFIG_NET_SCH_ATM is not set
+# CONFIG_NET_SCH_PRIO is not set
+# CONFIG_NET_SCH_MULTIQ is not set
+# CONFIG_NET_SCH_RED is not set
+# CONFIG_NET_SCH_SFQ is not set
+# CONFIG_NET_SCH_TEQL is not set
+# CONFIG_NET_SCH_TBF is not set
+# CONFIG_NET_SCH_GRED is not set
+# CONFIG_NET_SCH_DSMARK is not set
+# CONFIG_NET_SCH_NETEM is not set
+# CONFIG_NET_SCH_DRR is not set
+# CONFIG_NET_SCH_INGRESS is not set
+#
+# Classification
+#
+# CONFIG_NET_CLS_BASIC is not set
+# CONFIG_NET_CLS_TCINDEX is not set
+# CONFIG_NET_CLS_ROUTE4 is not set
+# CONFIG_NET_CLS_FW is not set
+# CONFIG_NET_CLS_U32 is not set
+# CONFIG_NET_CLS_RSVP is not set
+# CONFIG_NET_CLS_RSVP6 is not set
+# CONFIG_NET_CLS_FLOW is not set
+# CONFIG_NET_EMATCH is not set
+CONFIG_NET_CLS_ACT=y
+CONFIG_NET_ACT_POLICE=y
+# CONFIG_NET_ACT_GACT is not set
+# CONFIG_NET_ACT_MIRRED is not set
+# CONFIG_NET_ACT_IPT is not set
+# CONFIG_NET_ACT_NAT is not set
+# CONFIG_NET_ACT_PEDIT is not set
+# CONFIG_NET_ACT_SIMP is not set
+# CONFIG_NET_ACT_SKBEDIT is not set
+CONFIG_NET_SCH_FIFO=y
+# CONFIG_DCB is not set
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+CONFIG_HAMRADIO=y
+#
+# Packet Radio protocols
+#
+# CONFIG_AX25 is not set
+# CONFIG_CAN is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_AF_RXRPC is not set
+CONFIG_FIB_RULES=y
+CONFIG_WIRELESS=y
+CONFIG_CFG80211=m
+# CONFIG_CFG80211_REG_DEBUG is not set
+# CONFIG_CFG80211_DEBUGFS is not set
+# CONFIG_WIRELESS_OLD_REGULATORY is not set
+CONFIG_WIRELESS_EXT=y
+CONFIG_WIRELESS_EXT_SYSFS=y
+# CONFIG_LIB80211 is not set
+CONFIG_MAC80211=m
+CONFIG_MAC80211_DEFAULT_PS=y
+CONFIG_MAC80211_DEFAULT_PS_VALUE=1
+#
+# Rate control algorithm selection
+#
+CONFIG_MAC80211_RC_PID=y
+CONFIG_MAC80211_RC_MINSTREL=y
+CONFIG_MAC80211_RC_DEFAULT_PID=y
+# CONFIG_MAC80211_RC_DEFAULT_MINSTREL is not set
+CONFIG_MAC80211_RC_DEFAULT="pid"
+# CONFIG_MAC80211_MESH is not set
+# CONFIG_MAC80211_LEDS is not set
+# CONFIG_MAC80211_DEBUGFS is not set
+# CONFIG_MAC80211_DEBUG_MENU is not set
+# CONFIG_WIMAX is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+#
+# Device Drivers
+#
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+CONFIG_FW_LOADER=y
+# CONFIG_FIRMWARE_IN_KERNEL is not set
+CONFIG_EXTRA_FIRMWARE=""
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_CONNECTOR is not set
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_CONCAT is not set
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_TESTS is not set
+# CONFIG_MTD_REDBOOT_PARTS is not set
+# CONFIG_MTD_CMDLINE_PARTS is not set
+# CONFIG_MTD_AR7_PARTS is not set
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_MTD_OOPS is not set
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=y
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_GEN_PROBE=y
+# CONFIG_MTD_CFI_ADV_OPTIONS is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+CONFIG_MTD_CFI_INTELEXT=y
+CONFIG_MTD_CFI_AMDSTD=y
+CONFIG_MTD_CFI_STAA=y
+CONFIG_MTD_CFI_UTIL=y
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+#
+# Mapping drivers for chip access
+#
+CONFIG_MTD_COMPLEX_MAPPINGS=y
+CONFIG_MTD_PHYSMAP=y
+# CONFIG_MTD_PHYSMAP_COMPAT is not set
+# CONFIG_MTD_PLATRAM is not set
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+# CONFIG_MTD_NAND is not set
+# CONFIG_MTD_ONENAND is not set
+#
+# LPDDR flash memory drivers
+#
+# CONFIG_MTD_LPDDR is not set
+#
+# UBI - Unsorted block images
+#
+# CONFIG_MTD_UBI is not set
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_COW_COMMON is not set
+# CONFIG_BLK_DEV_LOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_RAM is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+# CONFIG_BLK_DEV_HD is not set
+CONFIG_MISC_DEVICES=y
+# CONFIG_ENCLOSURE_SERVICES is not set
+# CONFIG_C2PORT is not set
+#
+# EEPROM support
+#
+# CONFIG_EEPROM_93CX6 is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+# CONFIG_SCSI is not set
+# CONFIG_SCSI_DMA is not set
+# CONFIG_SCSI_NETLINK is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+CONFIG_NETDEVICES=y
+# CONFIG_IFB is not set
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_VETH is not set
+CONFIG_PHYLIB=y
+#
+# MII PHY device drivers
+#
+# CONFIG_MARVELL_PHY is not set
+# CONFIG_DAVICOM_PHY is not set
+# CONFIG_QSEMI_PHY is not set
+# CONFIG_LXT_PHY is not set
+# CONFIG_CICADA_PHY is not set
+# CONFIG_VITESSE_PHY is not set
+# CONFIG_SMSC_PHY is not set
+# CONFIG_BROADCOM_PHY is not set
+# CONFIG_ICPLUS_PHY is not set
+# CONFIG_REALTEK_PHY is not set
+# CONFIG_NATIONAL_PHY is not set
+# CONFIG_STE10XP is not set
+# CONFIG_LSI_ET1011C_PHY is not set
+CONFIG_FIXED_PHY=y
+# CONFIG_MDIO_BITBANG is not set
+CONFIG_NET_ETHERNET=y
+CONFIG_MII=y
+# CONFIG_AX88796 is not set
+# CONFIG_SMC91X is not set
+# CONFIG_DM9000 is not set
+# CONFIG_ETHOC is not set
+# CONFIG_DNET is not set
+# CONFIG_IBM_NEW_EMAC_ZMII is not set
+# CONFIG_IBM_NEW_EMAC_RGMII is not set
+# CONFIG_IBM_NEW_EMAC_TAH is not set
+# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
+# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
+# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
+# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
+# CONFIG_B44 is not set
+# CONFIG_KS8842 is not set
+CONFIG_CPMAC=y
+# CONFIG_NETDEV_1000 is not set
+# CONFIG_NETDEV_10000 is not set
+#
+# Wireless LAN
+#
+# CONFIG_WLAN_PRE80211 is not set
+CONFIG_WLAN_80211=y
+# CONFIG_LIBERTAS is not set
+# CONFIG_LIBERTAS_THINFIRM is not set
+# CONFIG_MAC80211_HWSIM is not set
+# CONFIG_P54_COMMON is not set
+# CONFIG_HOSTAP is not set
+# CONFIG_B43 is not set
+# CONFIG_B43LEGACY is not set
+# CONFIG_RT2X00 is not set
+#
+# Enable WiMAX (Networking options) to see the WiMAX drivers
+#
+# CONFIG_WAN is not set
+CONFIG_ATM_DRIVERS=y
+# CONFIG_ATM_DUMMY is not set
+# CONFIG_ATM_TCP is not set
+CONFIG_PPP=m
+CONFIG_PPP_MULTILINK=y
+CONFIG_PPP_FILTER=y
+CONFIG_PPP_ASYNC=m
+# CONFIG_PPP_SYNC_TTY is not set
+# CONFIG_PPP_DEFLATE is not set
+# CONFIG_PPP_BSDCOMP is not set
+# CONFIG_PPP_MPPE is not set
+CONFIG_PPPOE=m
+CONFIG_PPPOATM=m
+# CONFIG_PPPOL2TP is not set
+# CONFIG_SLIP is not set
+CONFIG_SLHC=m
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_ISDN is not set
+# CONFIG_PHONE is not set
+#
+# Input device support
+#
+# CONFIG_INPUT is not set
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+#
+# Character devices
+#
+# CONFIG_VT is not set
+# CONFIG_DEVKMEM is not set
+# CONFIG_SERIAL_NONSTANDARD is not set
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_NR_UARTS=2
+CONFIG_SERIAL_8250_RUNTIME_UARTS=2
+# CONFIG_SERIAL_8250_EXTENDED is not set
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
+# CONFIG_LEGACY_PTYS is not set
+# CONFIG_IPMI_HANDLER is not set
+CONFIG_HW_RANDOM=y
+# CONFIG_HW_RANDOM_TIMERIOMEM is not set
+# CONFIG_R3964 is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+# CONFIG_I2C is not set
+# CONFIG_SPI is not set
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+# CONFIG_THERMAL is not set
+# CONFIG_THERMAL_HWMON is not set
+CONFIG_WATCHDOG=y
+# CONFIG_WATCHDOG_NOWAYOUT is not set
+#
+# Watchdog Device Drivers
+#
+# CONFIG_SOFT_WATCHDOG is not set
+CONFIG_AR7_WDT=y
+CONFIG_SSB_POSSIBLE=y
+#
+# Sonics Silicon Backplane
+#
+CONFIG_SSB=y
+# CONFIG_SSB_SILENT is not set
+# CONFIG_SSB_DEBUG is not set
+CONFIG_SSB_SERIAL=y
+CONFIG_SSB_DRIVER_MIPS=y
+CONFIG_SSB_EMBEDDED=y
+CONFIG_SSB_DRIVER_EXTIF=y
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_CORE is not set
+# CONFIG_MFD_SM501 is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_REGULATOR is not set
+# CONFIG_MEDIA_SUPPORT is not set
+#
+# Graphics support
+#
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+# CONFIG_FB is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+# CONFIG_SOUND is not set
+# CONFIG_USB_SUPPORT is not set
+# CONFIG_MMC is not set
+# CONFIG_MEMSTICK is not set
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
+#
+# LED drivers
+#
+# CONFIG_LEDS_GPIO is not set
+#
+# LED Triggers
+#
+CONFIG_LEDS_TRIGGERS=y
+CONFIG_LEDS_TRIGGER_TIMER=y
+CONFIG_LEDS_TRIGGER_HEARTBEAT=y
+# CONFIG_LEDS_TRIGGER_BACKLIGHT is not set
+CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
+#
+# iptables trigger is under Netfilter config (LED target)
+#
+# CONFIG_ACCESSIBILITY is not set
+CONFIG_RTC_LIB=y
+# CONFIG_RTC_CLASS is not set
+# CONFIG_DMADEVICES is not set
+# CONFIG_AUXDISPLAY is not set
+# CONFIG_UIO is not set
+#
+# TI VLYNQ
+#
+CONFIG_VLYNQ=y
+# CONFIG_STAGING is not set
+#
+# File systems
+#
+# CONFIG_EXT2_FS is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_EXT4_FS is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_BTRFS_FS is not set
+CONFIG_FILE_LOCKING=y
+CONFIG_FSNOTIFY=y
+# CONFIG_DNOTIFY is not set
+# CONFIG_INOTIFY is not set
+CONFIG_INOTIFY_USER=y
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+#
+# Caches
+#
+# CONFIG_FSCACHE is not set
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_MSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
+# CONFIG_NTFS_FS is not set
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+CONFIG_PROC_SYSCTL=y
+# CONFIG_PROC_PAGE_MONITOR is not set
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
+# CONFIG_HUGETLB_PAGE is not set
+# CONFIG_CONFIGFS_FS is not set
+CONFIG_MISC_FILESYSTEMS=y
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+CONFIG_JFFS2_FS=y
+CONFIG_JFFS2_FS_DEBUG=0
+CONFIG_JFFS2_FS_WRITEBUFFER=y
+# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
+CONFIG_JFFS2_SUMMARY=y
+# CONFIG_JFFS2_FS_XATTR is not set
+CONFIG_JFFS2_COMPRESSION_OPTIONS=y
+CONFIG_JFFS2_ZLIB=y
+# CONFIG_JFFS2_LZO is not set
+CONFIG_JFFS2_RTIME=y
+# CONFIG_JFFS2_RUBIN is not set
+# CONFIG_JFFS2_CMODE_NONE is not set
+CONFIG_JFFS2_CMODE_PRIORITY=y
+# CONFIG_JFFS2_CMODE_SIZE is not set
+# CONFIG_JFFS2_CMODE_FAVOURLZO is not set
+# CONFIG_CRAMFS is not set
+CONFIG_SQUASHFS=y
+# CONFIG_SQUASHFS_EMBEDDED is not set
+CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3
+# CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_OMFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+# CONFIG_NILFS2_FS is not set
+CONFIG_NETWORK_FILESYSTEMS=y
+# CONFIG_NFS_FS is not set
+# CONFIG_NFSD is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+#
+# Partition Types
+#
+CONFIG_PARTITION_ADVANCED=y
+# CONFIG_ACORN_PARTITION is not set
+# CONFIG_OSF_PARTITION is not set
+# CONFIG_AMIGA_PARTITION is not set
+# CONFIG_ATARI_PARTITION is not set
+# CONFIG_MAC_PARTITION is not set
+CONFIG_MSDOS_PARTITION=y
+CONFIG_BSD_DISKLABEL=y
+# CONFIG_MINIX_SUBPARTITION is not set
+# CONFIG_SOLARIS_X86_PARTITION is not set
+# CONFIG_UNIXWARE_DISKLABEL is not set
+# CONFIG_LDM_PARTITION is not set
+# CONFIG_SGI_PARTITION is not set
+# CONFIG_ULTRIX_PARTITION is not set
+# CONFIG_SUN_PARTITION is not set
+# CONFIG_KARMA_PARTITION is not set
+# CONFIG_EFI_PARTITION is not set
+# CONFIG_SYSV68_PARTITION is not set
+# CONFIG_NLS is not set
+# CONFIG_DLM is not set
+#
+# Kernel hacking
+#
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+# CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_WARN_DEPRECATED=y
+# CONFIG_ENABLE_MUST_CHECK is not set
+CONFIG_FRAME_WARN=1024
+# CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+CONFIG_DEBUG_FS=y
+# CONFIG_HEADERS_CHECK is not set
+# CONFIG_DEBUG_KERNEL is not set
+# CONFIG_DEBUG_MEMORY_INIT is not set
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
+CONFIG_SYSCTL_SYSCALL_CHECK=y
+CONFIG_TRACING_SUPPORT=y
+# CONFIG_FTRACE is not set
+# CONFIG_DYNAMIC_DEBUG is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+CONFIG_CMDLINE="rootfstype=squashfs,jffs2"
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITYFS is not set
+# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+CONFIG_CRYPTO=y
+#
+# Crypto core or helper
+#
+# CONFIG_CRYPTO_FIPS is not set
+CONFIG_CRYPTO_ALGAPI=m
+CONFIG_CRYPTO_ALGAPI2=m
+CONFIG_CRYPTO_AEAD2=m
+CONFIG_CRYPTO_BLKCIPHER=m
+CONFIG_CRYPTO_BLKCIPHER2=m
+CONFIG_CRYPTO_HASH2=m
+CONFIG_CRYPTO_RNG2=m
+CONFIG_CRYPTO_PCOMP=m
+CONFIG_CRYPTO_MANAGER=m
+CONFIG_CRYPTO_MANAGER2=m
+# CONFIG_CRYPTO_GF128MUL is not set
+# CONFIG_CRYPTO_NULL is not set
+CONFIG_CRYPTO_WORKQUEUE=m
+# CONFIG_CRYPTO_CRYPTD is not set
+# CONFIG_CRYPTO_AUTHENC is not set
+# CONFIG_CRYPTO_TEST is not set
+#
+# Authenticated Encryption with Associated Data
+#
+# CONFIG_CRYPTO_CCM is not set
+# CONFIG_CRYPTO_GCM is not set
+# CONFIG_CRYPTO_SEQIV is not set
+#
+# Block modes
+#
+# CONFIG_CRYPTO_CBC is not set
+# CONFIG_CRYPTO_CTR is not set
+# CONFIG_CRYPTO_CTS is not set
+CONFIG_CRYPTO_ECB=m
+# CONFIG_CRYPTO_LRW is not set
+# CONFIG_CRYPTO_PCBC is not set
+# CONFIG_CRYPTO_XTS is not set
+#
+# Hash modes
+#
+# CONFIG_CRYPTO_HMAC is not set
+# CONFIG_CRYPTO_XCBC is not set
+#
+# Digest
+#
+# CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_MD4 is not set
+# CONFIG_CRYPTO_MD5 is not set
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_RMD128 is not set
+# CONFIG_CRYPTO_RMD160 is not set
+# CONFIG_CRYPTO_RMD256 is not set
+# CONFIG_CRYPTO_RMD320 is not set
+# CONFIG_CRYPTO_SHA1 is not set
+# CONFIG_CRYPTO_SHA256 is not set
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_WP512 is not set
+#
+# Ciphers
+#
+CONFIG_CRYPTO_AES=m
+# CONFIG_CRYPTO_ANUBIS is not set
+CONFIG_CRYPTO_ARC4=m
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_CAMELLIA is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+# CONFIG_CRYPTO_DES is not set
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_SALSA20 is not set
+# CONFIG_CRYPTO_SEED is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_TEA is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+#
+# Compression
+#
+# CONFIG_CRYPTO_DEFLATE is not set
+# CONFIG_CRYPTO_ZLIB is not set
+# CONFIG_CRYPTO_LZO is not set
+#
+# Random Number Generation
+#
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
+# CONFIG_CRYPTO_HW is not set
+# CONFIG_BINARY_PRINTF is not set
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+CONFIG_GENERIC_FIND_LAST_BIT=y
+CONFIG_CRC_CCITT=m
+# CONFIG_CRC16 is not set
+# CONFIG_CRC_T10DIF is not set
+# CONFIG_CRC_ITU_T is not set
+CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
+CONFIG_DECOMPRESS_GZIP=y
+CONFIG_DECOMPRESS_LZMA=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
+CONFIG_NLATTR=y
diff --git a/arch/mips/gt64120/wrppmc/serial.c b/arch/mips/gt64120/wrppmc/serial.c
index 5ec1c2ffd3a5..6f9d0858f596 100644
--- a/arch/mips/gt64120/wrppmc/serial.c
+++ b/arch/mips/gt64120/wrppmc/serial.c
@@ -1,7 +1,7 @@
 /*
 *  Registration of WRPPMC UART platform device.
 *
- *  Copyright (C) 2007  Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
+ *  Copyright (C) 2007  Yoichi Yuasa <yuasa@linux-mips.org>
 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License as published by
diff --git a/arch/mips/include/asm/amon.h b/arch/mips/include/asm/amon.h
new file mode 100644
index 000000000000..c3dc1a68dd8d
--- /dev/null
+++ b/arch/mips/include/asm/amon.h
@@ -0,0 +1,7 @@
+/*
+ * Amon support
+ */
+int amon_cpu_avail(int);
+void amon_cpu_start(int, unsigned long, unsigned long,
+                    unsigned long, unsigned long);
diff --git a/arch/mips/include/asm/ds1287.h b/arch/mips/include/asm/ds1287.h
index ba1702e86931..3af0b8fb3b8c 100644
--- a/arch/mips/include/asm/ds1287.h
+++ b/arch/mips/include/asm/ds1287.h
@@ -1,7 +1,7 @@
 /*
 *  DS1287 timer functions.
 *
- *  Copyright (C) 2008  Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
+ *  Copyright (C) 2008  Yoichi Yuasa <yuasa@linux-mips.org>
 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License as published by
diff --git a/arch/mips/include/asm/elf.h b/arch/mips/include/asm/elf.h
index d58f128aa747..7990694cda22 100644
--- a/arch/mips/include/asm/elf.h
+++ b/arch/mips/include/asm/elf.h
@@ -316,9 +316,13 @@ extern void elf_dump_regs(elf_greg_t *, struct pt_regs *regs);
 extern int dump_task_regs(struct task_struct *, elf_gregset_t *);
 extern int dump_task_fpu(struct task_struct *, elf_fpregset_t *);
+#ifndef ELF_CORE_COPY_REGS
 #define ELF_CORE_COPY_REGS(elf_regs, regs)                      \
        elf_dump_regs((elf_greg_t *)&(elf_regs), regs);
+#endif
+#ifndef ELF_CORE_COPY_TASK_REGS
 #define ELF_CORE_COPY_TASK_REGS(tsk, elf_regs) dump_task_regs(tsk, elf_regs)
+#endif
 #define ELF_CORE_COPY_FPREGS(tsk, elf_fpregs)                   \
        dump_task_fpu(tsk, elf_fpregs)
diff --git a/arch/mips/include/asm/gcmpregs.h b/arch/mips/include/asm/gcmpregs.h
index d74a8a4ca861..36fd969d64d6 100644
--- a/arch/mips/include/asm/gcmpregs.h
+++ b/arch/mips/include/asm/gcmpregs.h
@@ -114,4 +114,6 @@
 #define GCMP_CCB_DINTGROUP_OFS          0x0030          /* DINT Group Participate */
 #define GCMP_CCB_DBGGROUP_OFS           0x0100          /* DebugBreak Group */
+extern int __init gcmp_probe(unsigned long, unsigned long);
 #endif /* _ASM_GCMPREGS_H */
diff --git a/arch/mips/include/asm/gic.h b/arch/mips/include/asm/gic.h
index 954807d9d66a..10292e37c1f7 100644
--- a/arch/mips/include/asm/gic.h
+++ b/arch/mips/include/asm/gic.h
@@ -20,7 +20,11 @@
 #define GIC_TRIG_EDGE                   1
 #define GIC_TRIG_LEVEL                  0
+#if CONFIG_SMP
+#define GIC_NUM_INTRS                   (24 + NR_CPUS * 2)
+#else
 #define GIC_NUM_INTRS                   32
+#endif
 #define MSK(n) ((1 << (n)) - 1)
 #define REG32(addr)             (*(volatile unsigned int *) (addr))
@@ -483,5 +487,7 @@ extern void gic_init(unsigned long gic_base_addr,
 extern unsigned int gic_get_int(void);
 extern void gic_send_ipi(unsigned int intr);
+extern unsigned int plat_ipi_call_int_xlate(unsigned int);
+extern unsigned int plat_ipi_resched_int_xlate(unsigned int);
 #endif /* _ASM_GICREGS_H */
diff --git a/arch/mips/include/asm/irq_gt641xx.h b/arch/mips/include/asm/irq_gt641xx.h
index f9a7c3ac2e66..250a2407b599 100644
--- a/arch/mips/include/asm/irq_gt641xx.h
+++ b/arch/mips/include/asm/irq_gt641xx.h
@@ -1,7 +1,7 @@
 /*
 *  Galileo/Marvell GT641xx IRQ definitions.
 *
- *  Copyright (C) 2007  Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
+ *  Copyright (C) 2007  Yoichi Yuasa <yuasa@linux-mips.org>
 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License as published by
diff --git a/arch/mips/include/asm/mach-ar7/ar7.h b/arch/mips/include/asm/mach-ar7/ar7.h
new file mode 100644
index 000000000000..de71694614de
--- /dev/null
+++ b/arch/mips/include/asm/mach-ar7/ar7.h
@@ -0,0 +1,178 @@
+/*
+ * Copyright (C) 2006,2007 Felix Fietkau <nbd@openwrt.org>
+ * Copyright (C) 2006,2007 Eugene Konev <ejka@openwrt.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+#ifndef __AR7_H__
+#define __AR7_H__
+#include <linux/delay.h>
+#include <linux/io.h>
+#include <linux/errno.h>
+#include <asm/addrspace.h>
+#define AR7_SDRAM_BASE  0x14000000
+#define AR7_REGS_BASE   0x08610000
+#define AR7_REGS_MAC0   (AR7_REGS_BASE + 0x0000)
+#define AR7_REGS_GPIO   (AR7_REGS_BASE + 0x0900)
+/* 0x08610A00 - 0x08610BFF (512 bytes, 128 bytes / clock) */
+#define AR7_REGS_POWER  (AR7_REGS_BASE + 0x0a00)
+#define AR7_REGS_CLOCKS (AR7_REGS_POWER + 0x80)
+#define UR8_REGS_CLOCKS (AR7_REGS_POWER + 0x20)
+#define AR7_REGS_UART0  (AR7_REGS_BASE + 0x0e00)
+#define AR7_REGS_USB    (AR7_REGS_BASE + 0x1200)
+#define AR7_REGS_RESET  (AR7_REGS_BASE + 0x1600)
+#define AR7_REGS_VLYNQ0 (AR7_REGS_BASE + 0x1800)
+#define AR7_REGS_DCL    (AR7_REGS_BASE + 0x1a00)
+#define AR7_REGS_VLYNQ1 (AR7_REGS_BASE + 0x1c00)
+#define AR7_REGS_MDIO   (AR7_REGS_BASE + 0x1e00)
+#define AR7_REGS_IRQ    (AR7_REGS_BASE + 0x2400)
+#define AR7_REGS_MAC1   (AR7_REGS_BASE + 0x2800)
+#define AR7_REGS_WDT    (AR7_REGS_BASE + 0x1f00)
+#define UR8_REGS_WDT    (AR7_REGS_BASE + 0x0b00)
+#define UR8_REGS_UART1  (AR7_REGS_BASE + 0x0f00)
+#define AR7_RESET_PEREPHERIAL   0x0
+#define AR7_RESET_SOFTWARE      0x4
+#define AR7_RESET_STATUS        0x8
+#define AR7_RESET_BIT_CPMAC_LO  17
+#define AR7_RESET_BIT_CPMAC_HI  21
+#define AR7_RESET_BIT_MDIO      22
+#define AR7_RESET_BIT_EPHY      26
+/* GPIO control registers */
+#define AR7_GPIO_INPUT  0x0
+#define AR7_GPIO_OUTPUT 0x4
+#define AR7_GPIO_DIR    0x8
+#define AR7_GPIO_ENABLE 0xc
+#define AR7_CHIP_7100   0x18
+#define AR7_CHIP_7200   0x2b
+#define AR7_CHIP_7300   0x05
+/* Interrupts */
+#define AR7_IRQ_UART0   15
+#define AR7_IRQ_UART1   16
+/* Clocks */
+#define AR7_AFE_CLOCK   35328000
+#define AR7_REF_CLOCK   25000000
+#define AR7_XTAL_CLOCK  24000000
+struct plat_cpmac_data {
+        int reset_bit;
+        int power_bit;
+        u32 phy_mask;
+        char dev_addr[6];
+};
+struct plat_dsl_data {
+        int reset_bit_dsl;
+        int reset_bit_sar;
+};
+extern int ar7_cpu_clock, ar7_bus_clock, ar7_dsp_clock;
+static inline u16 ar7_chip_id(void)
+{
+        return readl((void *)KSEG1ADDR(AR7_REGS_GPIO + 0x14)) & 0xffff;
+}
+static inline u8 ar7_chip_rev(void)
+{
+        return (readl((void *)KSEG1ADDR(AR7_REGS_GPIO + 0x14)) >> 16) & 0xff;
+}
+static inline int ar7_cpu_freq(void)
+{
+        return ar7_cpu_clock;
+}
+static inline int ar7_bus_freq(void)
+{
+        return ar7_bus_clock;
+}
+static inline int ar7_vbus_freq(void)
+{
+        return ar7_bus_clock / 2;
+}
+#define ar7_cpmac_freq ar7_vbus_freq
+static inline int ar7_dsp_freq(void)
+{
+        return ar7_dsp_clock;
+}
+static inline int ar7_has_high_cpmac(void)
+{
+        u16 chip_id = ar7_chip_id();
+        switch (chip_id) {
+        case AR7_CHIP_7100:
+        case AR7_CHIP_7200:
+                return 0;
+        case AR7_CHIP_7300:
+                return 1;
+        default:
+                return -ENXIO;
+        }
+}
+#define ar7_has_high_vlynq ar7_has_high_cpmac
+#define ar7_has_second_uart ar7_has_high_cpmac
+static inline void ar7_device_enable(u32 bit)
+{
+        void *reset_reg =
+                (void *)KSEG1ADDR(AR7_REGS_RESET + AR7_RESET_PEREPHERIAL);
+        writel(readl(reset_reg) | (1 << bit), reset_reg);
+        msleep(20);
+}
+static inline void ar7_device_disable(u32 bit)
+{
+        void *reset_reg =
+                (void *)KSEG1ADDR(AR7_REGS_RESET + AR7_RESET_PEREPHERIAL);
+        writel(readl(reset_reg) & ~(1 << bit), reset_reg);
+        msleep(20);
+}
+static inline void ar7_device_reset(u32 bit)
+{
+        ar7_device_disable(bit);
+        ar7_device_enable(bit);
+}
+static inline void ar7_device_on(u32 bit)
+{
+        void *power_reg = (void *)KSEG1ADDR(AR7_REGS_POWER);
+        writel(readl(power_reg) | (1 << bit), power_reg);
+        msleep(20);
+}
+static inline void ar7_device_off(u32 bit)
+{
+        void *power_reg = (void *)KSEG1ADDR(AR7_REGS_POWER);
+        writel(readl(power_reg) & ~(1 << bit), power_reg);
+        msleep(20);
+}
+#endif /* __AR7_H__ */
diff --git a/arch/mips/include/asm/mach-ar7/gpio.h b/arch/mips/include/asm/mach-ar7/gpio.h
new file mode 100644
index 000000000000..cbe9c4f126df
--- /dev/null
+++ b/arch/mips/include/asm/mach-ar7/gpio.h
@@ -0,0 +1,110 @@
+/*
+ * Copyright (C) 2007 Florian Fainelli <florian@openwrt.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+#ifndef __AR7_GPIO_H__
+#define __AR7_GPIO_H__
+#include <asm/mach-ar7/ar7.h>
+#define AR7_GPIO_MAX 32
+extern int gpio_request(unsigned gpio, const char *label);
+extern void gpio_free(unsigned gpio);
+/* Common GPIO layer */
+static inline int gpio_get_value(unsigned gpio)
+{
+        void __iomem *gpio_in =
+                (void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + AR7_GPIO_INPUT);
+        return readl(gpio_in) & (1 << gpio);
+}
+static inline void gpio_set_value(unsigned gpio, int value)
+{
+        void __iomem *gpio_out =
+                (void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + AR7_GPIO_OUTPUT);
+        unsigned tmp;
+        tmp = readl(gpio_out) & ~(1 << gpio);
+        if (value)
+                tmp |= 1 << gpio;
+        writel(tmp, gpio_out);
+}
+static inline int gpio_direction_input(unsigned gpio)
+{
+        void __iomem *gpio_dir =
+                (void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + AR7_GPIO_DIR);
+        if (gpio >= AR7_GPIO_MAX)
+                return -EINVAL;
+        writel(readl(gpio_dir) | (1 << gpio), gpio_dir);
+        return 0;
+}
+static inline int gpio_direction_output(unsigned gpio, int value)
+{
+        void __iomem *gpio_dir =
+                (void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + AR7_GPIO_DIR);
+        if (gpio >= AR7_GPIO_MAX)
+                return -EINVAL;
+        gpio_set_value(gpio, value);
+        writel(readl(gpio_dir) & ~(1 << gpio), gpio_dir);
+        return 0;
+}
+static inline int gpio_to_irq(unsigned gpio)
+{
+        return -EINVAL;
+}
+static inline int irq_to_gpio(unsigned irq)
+{
+        return -EINVAL;
+}
+/* Board specific GPIO functions */
+static inline int ar7_gpio_enable(unsigned gpio)
+{
+        void __iomem *gpio_en =
+                (void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + AR7_GPIO_ENABLE);
+        writel(readl(gpio_en) | (1 << gpio), gpio_en);
+        return 0;
+}
+static inline int ar7_gpio_disable(unsigned gpio)
+{
+        void __iomem *gpio_en =
+                (void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + AR7_GPIO_ENABLE);
+        writel(readl(gpio_en) & ~(1 << gpio), gpio_en);
+        return 0;
+}
+#include <asm-generic/gpio.h>
+#endif
diff --git a/arch/mips/include/asm/mach-ar7/irq.h b/arch/mips/include/asm/mach-ar7/irq.h
new file mode 100644
index 000000000000..39e9757e3d93
--- /dev/null
+++ b/arch/mips/include/asm/mach-ar7/irq.h
@@ -0,0 +1,16 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Shamelessly copied from asm-mips/mach-emma2rh/
+ * Copyright (C) 2003 by Ralf Baechle
+ */
+#ifndef __ASM_AR7_IRQ_H
+#define __ASM_AR7_IRQ_H
+#define NR_IRQS 256
+#include_next <irq.h>
+#endif /* __ASM_AR7_IRQ_H */
diff --git a/arch/mips/include/asm/mach-ar7/prom.h b/arch/mips/include/asm/mach-ar7/prom.h
new file mode 100644
index 000000000000..088f61fe85ea
--- /dev/null
+++ b/arch/mips/include/asm/mach-ar7/prom.h
@@ -0,0 +1,25 @@
+/*
+ * Copyright (C) 2006, 2007 Florian Fainelli <florian@openwrt.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+#ifndef __PROM_H__
+#define __PROM_H__
+extern char *prom_getenv(const char *name);
+extern void prom_meminit(void);
+#endif /* __PROM_H__ */
diff --git a/arch/mips/include/asm/mach-ar7/spaces.h b/arch/mips/include/asm/mach-ar7/spaces.h
new file mode 100644
index 000000000000..ac28f273449c
--- /dev/null
+++ b/arch/mips/include/asm/mach-ar7/spaces.h
@@ -0,0 +1,22 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1994 - 1999, 2000, 03, 04 Ralf Baechle
+ * Copyright (C) 2000, 2002  Maciej W. Rozycki
+ * Copyright (C) 1990, 1999, 2000 Silicon Graphics, Inc.
+ */
+#ifndef _ASM_AR7_SPACES_H
+#define _ASM_AR7_SPACES_H
+/*
+ * This handles the memory map.
+ * We handle pages at KSEG0 for kernels with 32 bit address space.
+ */
+#define PAGE_OFFSET             0x94000000UL
+#define PHYS_OFFSET             0x14000000UL
+#include <asm/mach-generic/spaces.h>
+#endif /* __ASM_AR7_SPACES_H */
diff --git a/arch/mips/include/asm/mach-ar7/war.h b/arch/mips/include/asm/mach-ar7/war.h
new file mode 100644
index 000000000000..f4862b563080
--- /dev/null
+++ b/arch/mips/include/asm/mach-ar7/war.h
@@ -0,0 +1,25 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org>
+ */
+#ifndef __ASM_MIPS_MACH_AR7_WAR_H
+#define __ASM_MIPS_MACH_AR7_WAR_H
+#define R4600_V1_INDEX_ICACHEOP_WAR     0
+#define R4600_V1_HIT_CACHEOP_WAR        0
+#define R4600_V2_HIT_CACHEOP_WAR        0
+#define R5432_CP0_INTERRUPT_WAR         0
+#define BCM1250_M3_WAR                  0
+#define SIBYTE_1956_WAR                 0
+#define MIPS4K_ICACHE_REFILL_WAR        0
+#define MIPS_CACHE_SYNC_WAR             0
+#define TX49XX_ICACHE_INDEX_INV_WAR     0
+#define RM9000_CDEX_SMP_WAR             0
+#define ICACHE_REFILLS_WORKAROUND_WAR   0
+#define R10000_LLSC_WAR                 0
+#define MIPS34K_MISSED_ITLB_WAR         0
+#endif /* __ASM_MIPS_MACH_AR7_WAR_H */
diff --git a/arch/mips/include/asm/mach-cobalt/irq.h b/arch/mips/include/asm/mach-cobalt/irq.h
index 57c8c9ac5851..9da9acf5dcba 100644
--- a/arch/mips/include/asm/mach-cobalt/irq.h
+++ b/arch/mips/include/asm/mach-cobalt/irq.h
@@ -8,7 +8,7 @@
 * Copyright (C) 1997 Cobalt Microserver
 * Copyright (C) 1997, 2003 Ralf Baechle
 * Copyright (C) 2001-2003 Liam Davies (ldavies@agile.tv)
- * Copyright (C) 2007 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
+ * Copyright (C) 2007 Yoichi Yuasa <yuasa@linux-mips.org>
 */
 #ifndef _ASM_COBALT_IRQ_H
 #define _ASM_COBALT_IRQ_H
diff --git a/arch/mips/include/asm/mach-cobalt/mach-gt64120.h b/arch/mips/include/asm/mach-cobalt/mach-gt64120.h
index ae9c5523c7ef..f8afec3f2943 100644
--- a/arch/mips/include/asm/mach-cobalt/mach-gt64120.h
+++ b/arch/mips/include/asm/mach-cobalt/mach-gt64120.h
@@ -1,5 +1,5 @@
 /*
- *  Copyright (C) 2006  Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
+ *  Copyright (C) 2006  Yoichi Yuasa <yuasa@linux-mips.org>
 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License as published by
diff --git a/arch/mips/cavium-octeon/pci-common.h b/arch/mips/include/asm/octeon/pci-octeon.h
index 74ae79991e45..6ac5d3e3398e 100644
--- a/arch/mips/cavium-octeon/pci-common.h
+++ b/arch/mips/include/asm/octeon/pci-octeon.h
@@ -3,23 +3,29 @@
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 *
- * Copyright (C) 2005-2007 Cavium Networks
+ * Copyright (C) 2005-2009 Cavium Networks
 */
-#ifndef __OCTEON_PCI_COMMON_H__
-#define __OCTEON_PCI_COMMON_H__
+#ifndef __PCI_OCTEON_H__
+#define __PCI_OCTEON_H__
 #include <linux/pci.h>
 /* Some PCI cards require delays when accessing config space. */
 #define PCI_CONFIG_SPACE_DELAY 10000
-/* pcibios_map_irq() is defined inside pci-common.c. All it does is call the
+/*
-   Octeon specific version pointed to by this variable. This function needs to
+ * pcibios_map_irq() is defined inside pci-octeon.c. All it does is
-   change for PCI or PCIe based hosts */
+ * call the Octeon specific version pointed to by this variable. This
-extern typeof(pcibios_map_irq) *octeon_pcibios_map_irq;
+ * function needs to change for PCI or PCIe based hosts.
+ */
+extern int (*octeon_pcibios_map_irq)(const struct pci_dev *dev,
+                                     u8 slot, u8 pin);
-/* The following defines are only used when octeon_dma_bar_type =
+/*
-   OCTEON_DMA_BAR_TYPE_BIG */
+ * The following defines are used when octeon_dma_bar_type =
+ * OCTEON_DMA_BAR_TYPE_BIG
+ */
 #define OCTEON_PCI_BAR1_HOLE_BITS 5
 #define OCTEON_PCI_BAR1_HOLE_SIZE (1ul<<(OCTEON_PCI_BAR1_HOLE_BITS+3))
@@ -30,9 +36,9 @@ enum octeon_dma_bar_type {
        OCTEON_DMA_BAR_TYPE_PCIE
 };
-/**
+/*
- * This is a variable to tell the DMA mapping system in dma-octeon.c
+ * This tells the DMA mapping system in dma-octeon.c how to map PCI
- * how to map PCI DMA addresses.
+ * DMA addresses.
 */
 extern enum octeon_dma_bar_type octeon_dma_bar_type;
diff --git a/arch/mips/include/asm/page.h b/arch/mips/include/asm/page.h
index dc0eaa731281..96a14a426a7c 100644
--- a/arch/mips/include/asm/page.h
+++ b/arch/mips/include/asm/page.h
@@ -165,7 +165,14 @@ typedef struct { unsigned long pgprot; } pgprot_t;
 #ifdef CONFIG_FLATMEM
-#define pfn_valid(pfn)          ((pfn) >= ARCH_PFN_OFFSET && (pfn) < max_mapnr)
+#define pfn_valid(pfn)                                                  \
+({                                                                      \
+        unsigned long __pfn = (pfn);                                    \
+        /* avoid <linux/bootmem.h> include hell */                      \
+        extern unsigned long min_low_pfn;                               \
+                                                                        \
+        __pfn >= min_low_pfn && __pfn < max_mapnr;                      \
+})
 #elif defined(CONFIG_SPARSEMEM)
diff --git a/arch/mips/include/asm/reg.h b/arch/mips/include/asm/reg.h
index 634b55d7e7f6..910e71a12466 100644
--- a/arch/mips/include/asm/reg.h
+++ b/arch/mips/include/asm/reg.h
@@ -69,7 +69,7 @@
 #endif
-#ifdef CONFIG_64BIT
+#if defined(CONFIG_64BIT) && !defined(WANT_COMPAT_REG_H)
 #define EF_R0                    0
 #define EF_R1                    1
diff --git a/arch/mips/include/asm/swab.h b/arch/mips/include/asm/swab.h
index 99993c0d6c12..97c2f81b4b43 100644
--- a/arch/mips/include/asm/swab.h
+++ b/arch/mips/include/asm/swab.h
@@ -38,7 +38,11 @@ static inline __attribute_const__ __u32 __arch_swab32(__u32 x)
 }
 #define __arch_swab32 __arch_swab32
-#ifdef CONFIG_CPU_MIPS64_R2
+/*
+ * Having already checked for CONFIG_CPU_MIPSR2, enable the
+ * optimized version for 64-bit kernel on r2 CPUs.
+ */
+#ifdef CONFIG_64BIT
 static inline __attribute_const__ __u64 __arch_swab64(__u64 x)
 {
        __asm__(
@@ -50,6 +54,6 @@ static inline __attribute_const__ __u64 __arch_swab64(__u64 x)
        return x;
 }
 #define __arch_swab64 __arch_swab64
-#endif /* CONFIG_CPU_MIPS64_R2 */
+#endif /* CONFIG_64BIT */
 #endif /* CONFIG_CPU_MIPSR2 */
 #endif /* _ASM_SWAB_H */
diff --git a/arch/mips/include/asm/unistd.h b/arch/mips/include/asm/unistd.h
index 40005010827c..b70c49fdda26 100644
--- a/arch/mips/include/asm/unistd.h
+++ b/arch/mips/include/asm/unistd.h
@@ -352,16 +352,18 @@
 #define __NR_inotify_init1              (__NR_Linux + 329)
 #define __NR_preadv                     (__NR_Linux + 330)
 #define __NR_pwritev                    (__NR_Linux + 331)
+#define __NR_rt_tgsigqueueinfo          (__NR_Linux + 332)
+#define __NR_perf_counter_open          (__NR_Linux + 333)
 /*
 * Offset of the last Linux o32 flavoured syscall
 */
-#define __NR_Linux_syscalls             331
+#define __NR_Linux_syscalls             333
 #endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */
 #define __NR_O32_Linux                  4000
-#define __NR_O32_Linux_syscalls         331
+#define __NR_O32_Linux_syscalls         333
 #if _MIPS_SIM == _MIPS_SIM_ABI64
@@ -660,16 +662,18 @@
 #define __NR_inotify_init1              (__NR_Linux + 288)
 #define __NR_preadv                     (__NR_Linux + 289)
 #define __NR_pwritev                    (__NR_Linux + 290)
+#define __NR_rt_tgsigqueueinfo          (__NR_Linux + 291)
+#define __NR_perf_counter_open          (__NR_Linux + 292)
 /*
 * Offset of the last Linux 64-bit flavoured syscall
 */
-#define __NR_Linux_syscalls             290
+#define __NR_Linux_syscalls             292
 #endif /* _MIPS_SIM == _MIPS_SIM_ABI64 */
 #define __NR_64_Linux                   5000
-#define __NR_64_Linux_syscalls          290
+#define __NR_64_Linux_syscalls          292
 #if _MIPS_SIM == _MIPS_SIM_NABI32
@@ -972,16 +976,18 @@
 #define __NR_inotify_init1              (__NR_Linux + 292)
 #define __NR_preadv                     (__NR_Linux + 293)
 #define __NR_pwritev                    (__NR_Linux + 294)
+#define __NR_rt_tgsigqueueinfo          (__NR_Linux + 295)
+#define __NR_perf_counter_open          (__NR_Linux + 296)
 /*
 * Offset of the last N32 flavoured syscall
 */
-#define __NR_Linux_syscalls             294
+#define __NR_Linux_syscalls             296
 #endif /* _MIPS_SIM == _MIPS_SIM_NABI32 */
 #define __NR_N32_Linux                  6000
-#define __NR_N32_Linux_syscalls         294
+#define __NR_N32_Linux_syscalls         296
 #ifdef __KERNEL__
diff --git a/arch/mips/include/asm/vr41xx/capcella.h b/arch/mips/include/asm/vr41xx/capcella.h
index e0ee05a3dfcc..fcc6569414fa 100644
--- a/arch/mips/include/asm/vr41xx/capcella.h
+++ b/arch/mips/include/asm/vr41xx/capcella.h
@@ -1,7 +1,7 @@
 /*
 *  capcella.h, Include file for ZAO Networks Capcella.
 *
- *  Copyright (C) 2002-2004  Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
+ *  Copyright (C) 2002-2004  Yoichi Yuasa <yuasa@linux-mips.org>
 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License as published by
diff --git a/arch/mips/include/asm/vr41xx/giu.h b/arch/mips/include/asm/vr41xx/giu.h
index 0bcdd3a5c256..6a90bc1d916b 100644
--- a/arch/mips/include/asm/vr41xx/giu.h
+++ b/arch/mips/include/asm/vr41xx/giu.h
@@ -1,7 +1,7 @@
 /*
 *  Include file for NEC VR4100 series General-purpose I/O Unit.
 *
- *  Copyright (C) 2005  Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
+ *  Copyright (C) 2005-2009  Yoichi Yuasa <yuasa@linux-mips.org>
 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License as published by
@@ -41,7 +41,8 @@ typedef enum {
        IRQ_SIGNAL_HOLD,
 } irq_signal_t;
-extern void vr41xx_set_irq_trigger(unsigned int pin, irq_trigger_t trigger, irq_signal_t signal);
+extern void vr41xx_set_irq_trigger(unsigned int pin, irq_trigger_t trigger,
+                                   irq_signal_t signal);
 typedef enum {
        IRQ_LEVEL_LOW,
@@ -51,23 +52,6 @@ typedef enum {
 extern void vr41xx_set_irq_level(unsigned int pin, irq_level_t level);
 typedef enum {
-        GPIO_DATA_LOW,
-        GPIO_DATA_HIGH,
-        GPIO_DATA_INVAL,
-} gpio_data_t;
-extern gpio_data_t vr41xx_gpio_get_pin(unsigned int pin);
-extern int vr41xx_gpio_set_pin(unsigned int pin, gpio_data_t data);
-typedef enum {
-        GPIO_INPUT,
-        GPIO_OUTPUT,
-        GPIO_OUTPUT_DISABLE,
-} gpio_direction_t;
-extern int vr41xx_gpio_set_direction(unsigned int pin, gpio_direction_t dir);
-typedef enum {
        GPIO_PULL_DOWN,
        GPIO_PULL_UP,
        GPIO_PULL_DISABLE,
diff --git a/arch/mips/include/asm/vr41xx/irq.h b/arch/mips/include/asm/vr41xx/irq.h
index d315dfbc08f2..b07f7321751d 100644
--- a/arch/mips/include/asm/vr41xx/irq.h
+++ b/arch/mips/include/asm/vr41xx/irq.h
@@ -7,7 +7,7 @@
 * Copyright (C) 2001, 2002 Paul Mundt
 * Copyright (C) 2002 MontaVista Software, Inc.
 * Copyright (C) 2002 TimeSys Corp.
- * Copyright (C) 2003-2006 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
+ * Copyright (C) 2003-2006 Yoichi Yuasa <yuasa@linux-mips.org>
 *
 * This program is free software; you can redistribute it and/or modify it
 * under the terms of the GNU General Public License as published by the
diff --git a/arch/mips/include/asm/vr41xx/mpc30x.h b/arch/mips/include/asm/vr41xx/mpc30x.h
index 1d67df843dc3..130d09d8c8cb 100644
--- a/arch/mips/include/asm/vr41xx/mpc30x.h
+++ b/arch/mips/include/asm/vr41xx/mpc30x.h
@@ -1,7 +1,7 @@
 /*
 *  mpc30x.h, Include file for Victor MP-C303/304.
 *
- *  Copyright (C) 2002-2004  Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
+ *  Copyright (C) 2002-2004  Yoichi Yuasa <yuasa@linux-mips.org>
 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License as published by
diff --git a/arch/mips/include/asm/vr41xx/pci.h b/arch/mips/include/asm/vr41xx/pci.h
index 6fc01ce19777..c231a3d6cfd8 100644
--- a/arch/mips/include/asm/vr41xx/pci.h
+++ b/arch/mips/include/asm/vr41xx/pci.h
@@ -1,7 +1,7 @@
 /*
 *  Include file for NEC VR4100 series PCI Control Unit.
 *
- *  Copyright (C) 2004-2005  Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
+ *  Copyright (C) 2004-2005  Yoichi Yuasa <yuasa@linux-mips.org>
 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License as published by
diff --git a/arch/mips/include/asm/vr41xx/siu.h b/arch/mips/include/asm/vr41xx/siu.h
index da9f6e373409..ca806bc4ddc8 100644
--- a/arch/mips/include/asm/vr41xx/siu.h
+++ b/arch/mips/include/asm/vr41xx/siu.h
@@ -1,7 +1,7 @@
 /*
 *  Include file for NEC VR4100 series Serial Interface Unit.
 *
- *  Copyright (C) 2005-2008  Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
+ *  Copyright (C) 2005-2008  Yoichi Yuasa <yuasa@linux-mips.org>
 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License as published by
diff --git a/arch/mips/include/asm/vr41xx/tb0219.h b/arch/mips/include/asm/vr41xx/tb0219.h
index dc981b4be0a4..c78e8243b447 100644
--- a/arch/mips/include/asm/vr41xx/tb0219.h
+++ b/arch/mips/include/asm/vr41xx/tb0219.h
@@ -1,7 +1,7 @@
 /*
 *  tb0219.h, Include file for TANBAC TB0219.
 *
- *  Copyright (C) 2002-2004  Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
+ *  Copyright (C) 2002-2004  Yoichi Yuasa <yuasa@linux-mips.org>
 *
 *  Modified for TANBAC TB0219:
 *  Copyright (C) 2003 Megasolution Inc.  <matsu@megasolution.jp>
diff --git a/arch/mips/include/asm/vr41xx/tb0226.h b/arch/mips/include/asm/vr41xx/tb0226.h
index de527dcfa5f3..36f5f798e416 100644
--- a/arch/mips/include/asm/vr41xx/tb0226.h
+++ b/arch/mips/include/asm/vr41xx/tb0226.h
@@ -1,7 +1,7 @@
 /*
 *  tb0226.h, Include file for TANBAC TB0226.
 *
- *  Copyright (C) 2002-2004  Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
+ *  Copyright (C) 2002-2004  Yoichi Yuasa <yuasa@linux-mips.org>
 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License as published by
diff --git a/arch/mips/include/asm/vr41xx/vr41xx.h b/arch/mips/include/asm/vr41xx/vr41xx.h
index 22be64971cc6..7b96a43b72ba 100644
--- a/arch/mips/include/asm/vr41xx/vr41xx.h
+++ b/arch/mips/include/asm/vr41xx/vr41xx.h
@@ -7,7 +7,7 @@
 * Copyright (C) 2001, 2002 Paul Mundt
 * Copyright (C) 2002 MontaVista Software, Inc.
 * Copyright (C) 2002 TimeSys Corp.
- * Copyright (C) 2003-2008 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
+ * Copyright (C) 2003-2008 Yoichi Yuasa <yuasa@linux-mips.org>
 *
 * This program is free software; you can redistribute it and/or modify it
 * under the terms of the GNU General Public License as published by the
diff --git a/arch/mips/kernel/binfmt_elfo32.c b/arch/mips/kernel/binfmt_elfo32.c
index e1333d7319e2..ff448233dab5 100644
--- a/arch/mips/kernel/binfmt_elfo32.c
+++ b/arch/mips/kernel/binfmt_elfo32.c
@@ -53,6 +53,23 @@ typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];
 #define ELF_ET_DYN_BASE         (TASK32_SIZE / 3 * 2)
 #include <asm/processor.h>
+/*
+ * When this file is selected, we are definitely running a 64bit kernel.
+ * So using the right regs define in asm/reg.h
+ */
+#define WANT_COMPAT_REG_H
+/* These MUST be defined before elf.h gets included */
+extern void elf32_core_copy_regs(elf_gregset_t grp, struct pt_regs *regs);
+#define ELF_CORE_COPY_REGS(_dest, _regs) elf32_core_copy_regs(_dest, _regs);
+#define ELF_CORE_COPY_TASK_REGS(_tsk, _dest)                            \
+({                                                                      \
+        int __res = 1;                                                  \
+        elf32_core_copy_regs(*(_dest), task_pt_regs(_tsk));             \
+        __res;                                                          \
+})
 #include <linux/module.h>
 #include <linux/elfcore.h>
 #include <linux/compat.h>
@@ -110,9 +127,6 @@ jiffies_to_compat_timeval(unsigned long jiffies, struct compat_timeval *value)
        value->tv_usec = rem / NSEC_PER_USEC;
 }
-#undef ELF_CORE_COPY_REGS
-#define ELF_CORE_COPY_REGS(_dest, _regs) elf32_core_copy_regs(_dest, _regs);
 void elf32_core_copy_regs(elf_gregset_t grp, struct pt_regs *regs)
 {
        int i;
diff --git a/arch/mips/kernel/cevt-ds1287.c b/arch/mips/kernel/cevt-ds1287.c
index 1ada45ea0700..6996da4d74a2 100644
--- a/arch/mips/kernel/cevt-ds1287.c
+++ b/arch/mips/kernel/cevt-ds1287.c
@@ -1,7 +1,7 @@
 /*
 *  DS1287 clockevent driver
 *
- *  Copyright (C) 2008  Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
+ *  Copyright (C) 2008  Yoichi Yuasa <yuasa@linux-mips.org>
 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License as published by
diff --git a/arch/mips/kernel/cevt-gt641xx.c b/arch/mips/kernel/cevt-gt641xx.c
index e9b787feedcb..92351e00ae0e 100644
--- a/arch/mips/kernel/cevt-gt641xx.c
+++ b/arch/mips/kernel/cevt-gt641xx.c
@@ -1,7 +1,7 @@
 /*
 *  GT641xx clockevent routines.
 *
- *  Copyright (C) 2007  Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
+ *  Copyright (C) 2007  Yoichi Yuasa <yuasa@linux-mips.org>
 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License as published by
diff --git a/arch/mips/kernel/csrc-ioasic.c b/arch/mips/kernel/csrc-ioasic.c
index b551f48d3a07..23da108506b0 100644
--- a/arch/mips/kernel/csrc-ioasic.c
+++ b/arch/mips/kernel/csrc-ioasic.c
@@ -1,7 +1,7 @@
 /*
 *  DEC I/O ASIC's counter clocksource
 *
- *  Copyright (C) 2008  Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
+ *  Copyright (C) 2008  Yoichi Yuasa <yuasa@linux-mips.org>
 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License as published by
diff --git a/arch/mips/kernel/irq-gic.c b/arch/mips/kernel/irq-gic.c
index 39000f103f2c..d2072cd38592 100644
--- a/arch/mips/kernel/irq-gic.c
+++ b/arch/mips/kernel/irq-gic.c
@@ -107,9 +107,7 @@ static unsigned int gic_irq_startup(unsigned int irq)
 {
        pr_debug("CPU%d: %s: irq%d\n", smp_processor_id(), __func__, irq);
        irq -= _irqbase;
-        /* FIXME: this is wrong for !GICISWORDLITTLEENDIAN */
+        GIC_SET_INTR_MASK(irq, 1);
-        GICWRITE(GIC_REG_ADDR(SHARED, (GIC_SH_SMASK_31_0_OFS + (irq / 32))),
-                 1 << (irq % 32));
        return 0;
 }
@@ -120,8 +118,7 @@ static void gic_irq_ack(unsigned int irq)
 #endif
        pr_debug("CPU%d: %s: irq%d\n", smp_processor_id(), __func__, irq);
        irq -= _irqbase;
-        GICWRITE(GIC_REG_ADDR(SHARED, (GIC_SH_RMASK_31_0_OFS + (irq / 32))),
+        GIC_CLR_INTR_MASK(irq, 1);
-                 1 << (irq % 32));
        if (_intrmap[irq].trigtype == GIC_TRIG_EDGE) {
                if (!gic_wedgeb2bok)
@@ -138,18 +135,14 @@ static void gic_mask_irq(unsigned int irq)
 {
        pr_debug("CPU%d: %s: irq%d\n", smp_processor_id(), __func__, irq);
        irq -= _irqbase;
-        /* FIXME: this is wrong for !GICISWORDLITTLEENDIAN */
+        GIC_CLR_INTR_MASK(irq, 1);
-        GICWRITE(GIC_REG_ADDR(SHARED, (GIC_SH_RMASK_31_0_OFS + (irq / 32))),
-                 1 << (irq % 32));
 }
 static void gic_unmask_irq(unsigned int irq)
 {
        pr_debug("CPU%d: %s: irq%d\n", smp_processor_id(), __func__, irq);
        irq -= _irqbase;
-        /* FIXME: this is wrong for !GICISWORDLITTLEENDIAN */
+        GIC_SET_INTR_MASK(irq, 1);
-        GICWRITE(GIC_REG_ADDR(SHARED, (GIC_SH_SMASK_31_0_OFS + (irq / 32))),
-                 1 << (irq % 32));
 }
 #ifdef CONFIG_SMP
@@ -254,6 +247,10 @@ static void __init gic_basic_init(void)
                if (cpu == X)
                        continue;
+                if (cpu == 0 && i != 0 && _intrmap[i].intrnum == 0 &&
+                                        _intrmap[i].ipiflag == 0)
+                        continue;
                setup_intr(_intrmap[i].intrnum,
                                _intrmap[i].cpunum,
                                _intrmap[i].pin,
diff --git a/arch/mips/kernel/irq-gt641xx.c b/arch/mips/kernel/irq-gt641xx.c
index 1b81b131f43c..ebcc5f7ad9c2 100644
--- a/arch/mips/kernel/irq-gt641xx.c
+++ b/arch/mips/kernel/irq-gt641xx.c
@@ -1,7 +1,7 @@
 /*
 *  GT641xx IRQ routines.
 *
- *  Copyright (C) 2007  Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
+ *  Copyright (C) 2007  Yoichi Yuasa <yuasa@linux-mips.org>
 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License as published by
diff --git a/arch/mips/kernel/scall32-o32.S b/arch/mips/kernel/scall32-o32.S
index 0b31b9bda048..20a86e08fd58 100644
--- a/arch/mips/kernel/scall32-o32.S
+++ b/arch/mips/kernel/scall32-o32.S
@@ -652,6 +652,8 @@ einval:	li	v0, -ENOSYS
        sys     sys_inotify_init1       1
        sys     sys_preadv              6       /* 4330 */
        sys     sys_pwritev             6
+        sys     sys_rt_tgsigqueueinfo   4
+        sys     sys_perf_counter_open   5
        .endm
        /* We pre-compute the number of _instruction_ bytes needed to
diff --git a/arch/mips/kernel/scall64-64.S b/arch/mips/kernel/scall64-64.S
index c647fd6e722f..b046130d4c5d 100644
--- a/arch/mips/kernel/scall64-64.S
+++ b/arch/mips/kernel/scall64-64.S
@@ -489,4 +489,6 @@ sys_call_table:
        PTR     sys_inotify_init1
        PTR     sys_preadv
        PTR     sys_pwritev                     /* 5390 */
+        PTR     sys_rt_tgsigqueueinfo
+        PTR     sys_perf_counter_open
        .size   sys_call_table,.-sys_call_table
diff --git a/arch/mips/kernel/scall64-n32.S b/arch/mips/kernel/scall64-n32.S
index 93cc672f4522..15874f9812cc 100644
--- a/arch/mips/kernel/scall64-n32.S
+++ b/arch/mips/kernel/scall64-n32.S
@@ -415,4 +415,6 @@ EXPORT(sysn32_call_table)
        PTR     sys_inotify_init1
        PTR     sys_preadv
        PTR     sys_pwritev
+        PTR     compat_sys_rt_tgsigqueueinfo    /* 5295 */
+        PTR     sys_perf_counter_open
        .size   sysn32_call_table,.-sysn32_call_table
diff --git a/arch/mips/kernel/scall64-o32.S b/arch/mips/kernel/scall64-o32.S
index a5598b2339dd..781e0f1e9533 100644
--- a/arch/mips/kernel/scall64-o32.S
+++ b/arch/mips/kernel/scall64-o32.S
@@ -535,4 +535,6 @@ sys_call_table:
        PTR     sys_inotify_init1
        PTR     compat_sys_preadv               /* 4330 */
        PTR     compat_sys_pwritev
+        PTR     compat_sys_rt_tgsigqueueinfo
+        PTR     sys_perf_counter_open
        .size   sys_call_table,.-sys_call_table
diff --git a/arch/mips/kernel/smp-cmp.c b/arch/mips/kernel/smp-cmp.c
index 653be061b9ec..ad0ff5dc4d59 100644
--- a/arch/mips/kernel/smp-cmp.c
+++ b/arch/mips/kernel/smp-cmp.c
@@ -37,80 +37,24 @@
 #include <asm/mipsregs.h>
 #include <asm/mipsmtregs.h>
 #include <asm/mips_mt.h>
+#include <asm/amon.h>
-/*
+#include <asm/gic.h>
- * Crude manipulation of the CPU masks to control which
- * which CPU's are brought online during initialisation
- *
- * Beware... this needs to be called after CPU discovery
- * but before CPU bringup
- */
-static int __init allowcpus(char *str)
-{
-        cpumask_t cpu_allow_map;
-        char buf[256];
-        int len;
-        cpus_clear(cpu_allow_map);
-        if (cpulist_parse(str, &cpu_allow_map) == 0) {
-                cpu_set(0, cpu_allow_map);
-                cpus_and(cpu_possible_map, cpu_possible_map, cpu_allow_map);
-                len = cpulist_scnprintf(buf, sizeof(buf)-1, &cpu_possible_map);
-                buf[len] = '\0';
-                pr_debug("Allowable CPUs: %s\n", buf);
-                return 1;
-        } else
-                return 0;
-}
-__setup("allowcpus=", allowcpus);
 static void ipi_call_function(unsigned int cpu)
 {
-        unsigned int action = 0;
        pr_debug("CPU%d: %s cpu %d status %08x\n",
                 smp_processor_id(), __func__, cpu, read_c0_status());
-        switch (cpu) {
+        gic_send_ipi(plat_ipi_call_int_xlate(cpu));
-        case 0:
-                action = GIC_IPI_EXT_INTR_CALLFNC_VPE0;
-                break;
-        case 1:
-                action = GIC_IPI_EXT_INTR_CALLFNC_VPE1;
-                break;
-        case 2:
-                action = GIC_IPI_EXT_INTR_CALLFNC_VPE2;
-                break;
-        case 3:
-                action = GIC_IPI_EXT_INTR_CALLFNC_VPE3;
-                break;
-        }
-        gic_send_ipi(action);
 }
 static void ipi_resched(unsigned int cpu)
 {
-        unsigned int action = 0;
        pr_debug("CPU%d: %s cpu %d status %08x\n",
                 smp_processor_id(), __func__, cpu, read_c0_status());
-        switch (cpu) {
+        gic_send_ipi(plat_ipi_resched_int_xlate(cpu));
-        case 0:
-                action = GIC_IPI_EXT_INTR_RESCHED_VPE0;
-                break;
-        case 1:
-                action = GIC_IPI_EXT_INTR_RESCHED_VPE1;
-                break;
-        case 2:
-                action = GIC_IPI_EXT_INTR_RESCHED_VPE2;
-                break;
-        case 3:
-                action = GIC_IPI_EXT_INTR_RESCHED_VPE3;
-                break;
-        }
-        gic_send_ipi(action);
 }
 /*
@@ -206,7 +150,7 @@ static void cmp_boot_secondary(int cpu, struct task_struct *idle)
                           (unsigned long)(gp + sizeof(struct thread_info)));
 #endif
-        amon_cpu_start(cpu, pc, sp, gp, a0);
+        amon_cpu_start(cpu, pc, sp, (unsigned long)gp, a0);
 }
 /*
diff --git a/arch/mips/kernel/sync-r4k.c b/arch/mips/kernel/sync-r4k.c
index 9021108eb9c1..05dd170a83f7 100644
--- a/arch/mips/kernel/sync-r4k.c
+++ b/arch/mips/kernel/sync-r4k.c
@@ -1,7 +1,7 @@
 /*
 * Count register synchronisation.
 *
- * All CPUs will have their count registers synchronised to the CPU0 expirelo
+ * All CPUs will have their count registers synchronised to the CPU0 next time
 * value. This can cause a small timewarp for CPU0. All other CPU's should
 * not have done anything significant (but they may have had interrupts
 * enabled briefly - prom_smp_finish() should not be responsible for enabling
@@ -13,21 +13,22 @@
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/irqflags.h>
-#include <linux/r4k-timer.h>
+#include <linux/cpumask.h>
+#include <asm/r4k-timer.h>
 #include <asm/atomic.h>
 #include <asm/barrier.h>
-#include <asm/cpumask.h>
 #include <asm/mipsregs.h>
-static atomic_t __initdata count_start_flag = ATOMIC_INIT(0);
+static atomic_t __cpuinitdata count_start_flag = ATOMIC_INIT(0);
-static atomic_t __initdata count_count_start = ATOMIC_INIT(0);
+static atomic_t __cpuinitdata count_count_start = ATOMIC_INIT(0);
-static atomic_t __initdata count_count_stop = ATOMIC_INIT(0);
+static atomic_t __cpuinitdata count_count_stop = ATOMIC_INIT(0);
+static atomic_t __cpuinitdata count_reference = ATOMIC_INIT(0);
 #define COUNTON 100
 #define NR_LOOPS 5
-void __init synchronise_count_master(void)
+void __cpuinit synchronise_count_master(void)
 {
        int i;
        unsigned long flags;
@@ -42,19 +43,20 @@ void __init synchronise_count_master(void)
        return;
 #endif
-        pr_info("Checking COUNT synchronization across %u CPUs: ",
+        printk(KERN_INFO "Synchronize counters across %u CPUs: ",
-                num_online_cpus());
+               num_online_cpus());
        local_irq_save(flags);
        /*
         * Notify the slaves that it's time to start
         */
+        atomic_set(&count_reference, read_c0_count());
        atomic_set(&count_start_flag, 1);
        smp_wmb();
-        /* Count will be initialised to expirelo for all CPU's */
+        /* Count will be initialised to current timer for all CPU's */
-        initcount = expirelo;
+        initcount = read_c0_count();
        /*
         * We loop a few times to get a primed instruction cache,
@@ -106,7 +108,7 @@ void __init synchronise_count_master(void)
        printk("done.\n");
 }
-void __init synchronise_count_slave(void)
+void __cpuinit synchronise_count_slave(void)
 {
        int i;
        unsigned long flags;
@@ -131,8 +133,8 @@ void __init synchronise_count_slave(void)
        while (!atomic_read(&count_start_flag))
                mb();
-        /* Count will be initialised to expirelo for all CPU's */
+        /* Count will be initialised to next expire for all CPU's */
-        initcount = expirelo;
+        initcount = atomic_read(&count_reference);
        ncpus = num_online_cpus();
        for (i = 0; i < NR_LOOPS; i++) {
@@ -156,4 +158,3 @@ void __init synchronise_count_slave(void)
        local_irq_restore(flags);
 }
 #undef NR_LOOPS
-#endif
diff --git a/arch/mips/kernel/vpe.c b/arch/mips/kernel/vpe.c
index 3ca5f42e819d..07b9ec2c6e3d 100644
--- a/arch/mips/kernel/vpe.c
+++ b/arch/mips/kernel/vpe.c
@@ -1387,7 +1387,7 @@ static ssize_t store_ntcs(struct device *dev, struct device_attribute *attr,
        return len;
 out_einval:
-        return -EINVAL;;
+        return -EINVAL;
 }
 static struct device_attribute vpe_class_attributes[] = {
diff --git a/arch/mips/mti-malta/malta-init.c b/arch/mips/mti-malta/malta-init.c
index 475038a141a6..27c807b67fea 100644
--- a/arch/mips/mti-malta/malta-init.c
+++ b/arch/mips/mti-malta/malta-init.c
@@ -30,6 +30,7 @@
 #include <asm/cacheflush.h>
 #include <asm/traps.h>
+#include <asm/gcmpregs.h>
 #include <asm/mips-boards/prom.h>
 #include <asm/mips-boards/generic.h>
 #include <asm/mips-boards/bonito64.h>
@@ -192,6 +193,8 @@ extern struct plat_smp_ops msmtc_smp_ops;
 void __init prom_init(void)
 {
+        int result;
        prom_argc = fw_arg0;
        _prom_argv = (int *) fw_arg1;
        _prom_envp = (int *) fw_arg2;
@@ -358,12 +361,21 @@ void __init prom_init(void)
 #ifdef CONFIG_SERIAL_8250_CONSOLE
        console_config();
 #endif
+        /* Early detection of CMP support */
+        result = gcmp_probe(GCMP_BASE_ADDR, GCMP_ADDRSPACE_SZ);
 #ifdef CONFIG_MIPS_CMP
-        register_smp_ops(&cmp_smp_ops);
+        if (result)
+                register_smp_ops(&cmp_smp_ops);
 #endif
 #ifdef CONFIG_MIPS_MT_SMP
+#ifdef CONFIG_MIPS_CMP
+        if (!result)
+                register_smp_ops(&vsmp_smp_ops);
+#else
        register_smp_ops(&vsmp_smp_ops);
 #endif
+#endif
 #ifdef CONFIG_MIPS_MT_SMTC
        register_smp_ops(&msmtc_smp_ops);
 #endif
diff --git a/arch/mips/mti-malta/malta-int.c b/arch/mips/mti-malta/malta-int.c
index b4eaf137e4a7..a8756f82c31b 100644
--- a/arch/mips/mti-malta/malta-int.c
+++ b/arch/mips/mti-malta/malta-int.c
@@ -331,6 +331,21 @@ static struct irqaction irq_call = {
        .flags          = IRQF_DISABLED|IRQF_PERCPU,
        .name           = "IPI_call"
 };
+static int gic_resched_int_base;
+static int gic_call_int_base;
+#define GIC_RESCHED_INT(cpu) (gic_resched_int_base+(cpu))
+#define GIC_CALL_INT(cpu) (gic_call_int_base+(cpu))
+unsigned int plat_ipi_call_int_xlate(unsigned int cpu)
+{
+        return GIC_CALL_INT(cpu);
+}
+unsigned int plat_ipi_resched_int_xlate(unsigned int cpu)
+{
+        return GIC_RESCHED_INT(cpu);
+}
 #endif /* CONFIG_MIPS_MT_SMP */
 static struct irqaction i8259irq = {
@@ -370,7 +385,7 @@ static int __initdata msc_nr_eicirqs = ARRAY_SIZE(msc_eicirqmap);
 * Interrupts and CPUs/Core Interrupts. The nature of the External
 * Interrupts is also defined here - polarity/trigger.
 */
-static struct gic_intr_map gic_intr_map[] = {
+static struct gic_intr_map gic_intr_map[GIC_NUM_INTRS] = {
        { GIC_EXT_INTR(0),      X,      X,              X,              X,              0 },
        { GIC_EXT_INTR(1),      X,      X,              X,              X,              0 },
        { GIC_EXT_INTR(2),      X,      X,              X,              X,              0 },
@@ -387,21 +402,14 @@ static struct gic_intr_map gic_intr_map[] = {
        { GIC_EXT_INTR(13),     0,      GIC_MAP_TO_NMI_MSK,     GIC_POL_POS, GIC_TRIG_LEVEL,    0 },
        { GIC_EXT_INTR(14),     0,      GIC_MAP_TO_NMI_MSK,     GIC_POL_POS, GIC_TRIG_LEVEL,    0 },
        { GIC_EXT_INTR(15),     X,      X,              X,              X,              0 },
-        { GIC_EXT_INTR(16),     0,      GIC_CPU_INT1,   GIC_POL_POS, GIC_TRIG_EDGE,     1 },
+/* This is the end of the general interrupts now we do IPI ones */
-        { GIC_EXT_INTR(17),     0,      GIC_CPU_INT2,   GIC_POL_POS, GIC_TRIG_EDGE,     1 },
-        { GIC_EXT_INTR(18),     1,      GIC_CPU_INT1,   GIC_POL_POS, GIC_TRIG_EDGE,     1 },
-        { GIC_EXT_INTR(19),     1,      GIC_CPU_INT2,   GIC_POL_POS, GIC_TRIG_EDGE,     1 },
-        { GIC_EXT_INTR(20),     2,      GIC_CPU_INT1,   GIC_POL_POS, GIC_TRIG_EDGE,     1 },
-        { GIC_EXT_INTR(21),     2,      GIC_CPU_INT2,   GIC_POL_POS, GIC_TRIG_EDGE,     1 },
-        { GIC_EXT_INTR(22),     3,      GIC_CPU_INT1,   GIC_POL_POS, GIC_TRIG_EDGE,     1 },
-        { GIC_EXT_INTR(23),     3,      GIC_CPU_INT2,   GIC_POL_POS, GIC_TRIG_EDGE,     1 },
 };
 #endif
 /*
 * GCMP needs to be detected before any SMP initialisation
 */
-static int __init gcmp_probe(unsigned long addr, unsigned long size)
+int __init gcmp_probe(unsigned long addr, unsigned long size)
 {
        if (gcmp_present >= 0)
                return gcmp_present;
@@ -416,28 +424,36 @@ static int __init gcmp_probe(unsigned long addr, unsigned long size)
 }
 #if defined(CONFIG_MIPS_MT_SMP)
+static void __init fill_ipi_map1(int baseintr, int cpu, int cpupin)
+{
+        int intr = baseintr + cpu;
+        gic_intr_map[intr].intrnum = GIC_EXT_INTR(intr);
+        gic_intr_map[intr].cpunum = cpu;
+        gic_intr_map[intr].pin = cpupin;
+        gic_intr_map[intr].polarity = GIC_POL_POS;
+        gic_intr_map[intr].trigtype = GIC_TRIG_EDGE;
+        gic_intr_map[intr].ipiflag = 1;
+        ipi_map[cpu] |= (1 << (cpupin + 2));
+}
 static void __init fill_ipi_map(void)
 {
-        int i;
+        int cpu;
-        for (i = 0; i < ARRAY_SIZE(gic_intr_map); i++) {
+        for (cpu = 0; cpu < NR_CPUS; cpu++) {
-                if (gic_intr_map[i].ipiflag && (gic_intr_map[i].cpunum != X))
+                fill_ipi_map1(gic_resched_int_base, cpu, GIC_CPU_INT1);
-                        ipi_map[gic_intr_map[i].cpunum] |=
+                fill_ipi_map1(gic_call_int_base, cpu, GIC_CPU_INT2);
-                                (1 << (gic_intr_map[i].pin + 2));
        }
 }
 #endif
 void __init arch_init_irq(void)
 {
-        int gic_present, gcmp_present;
        init_i8259_irqs();
        if (!cpu_has_veic)
                mips_cpu_irq_init();
-        gcmp_present = gcmp_probe(GCMP_BASE_ADDR, GCMP_ADDRSPACE_SZ);
        if (gcmp_present)  {
                GCMPGCB(GICBA) = GIC_BASE_ADDR | GCMP_GCB_GICBA_EN_MSK;
                gic_present = 1;
@@ -514,24 +530,10 @@ void __init arch_init_irq(void)
        if (gic_present) {
                /* FIXME */
                int i;
-                struct {
-                        unsigned int resched;
+                gic_call_int_base = GIC_NUM_INTRS - NR_CPUS;
-                        unsigned int call;
+                gic_resched_int_base = gic_call_int_base - NR_CPUS;
-                } ipiirq[] = {
-                        {
-                                .resched = GIC_IPI_EXT_INTR_RESCHED_VPE0,
-                                .call =  GIC_IPI_EXT_INTR_CALLFNC_VPE0},
-                        {
-                                .resched = GIC_IPI_EXT_INTR_RESCHED_VPE1,
-                                .call =  GIC_IPI_EXT_INTR_CALLFNC_VPE1
-                        }, {
-                                .resched = GIC_IPI_EXT_INTR_RESCHED_VPE2,
-                                .call =  GIC_IPI_EXT_INTR_CALLFNC_VPE2
-                        }, {
-                                .resched = GIC_IPI_EXT_INTR_RESCHED_VPE3,
-                                .call =  GIC_IPI_EXT_INTR_CALLFNC_VPE3
-                        }
-                };
                fill_ipi_map();
                gic_init(GIC_BASE_ADDR, GIC_ADDRSPACE_SZ, gic_intr_map, ARRAY_SIZE(gic_intr_map), MIPS_GIC_IRQ_BASE);
                if (!gcmp_present) {
@@ -553,12 +555,15 @@ void __init arch_init_irq(void)
                printk("CPU%d: status register now %08x\n", smp_processor_id(), read_c0_status());
                write_c0_status(0x1100dc00);
                printk("CPU%d: status register frc %08x\n", smp_processor_id(), read_c0_status());
-                for (i = 0; i < ARRAY_SIZE(ipiirq); i++) {
+                for (i = 0; i < NR_CPUS; i++) {
-                        setup_irq(MIPS_GIC_IRQ_BASE + ipiirq[i].resched, &irq_resched);
+                        setup_irq(MIPS_GIC_IRQ_BASE +
-                        setup_irq(MIPS_GIC_IRQ_BASE + ipiirq[i].call, &irq_call);
+                                        GIC_RESCHED_INT(i), &irq_resched);
+                        setup_irq(MIPS_GIC_IRQ_BASE +
-                        set_irq_handler(MIPS_GIC_IRQ_BASE + ipiirq[i].resched, handle_percpu_irq);
+                                        GIC_CALL_INT(i), &irq_call);
-                        set_irq_handler(MIPS_GIC_IRQ_BASE + ipiirq[i].call, handle_percpu_irq);
+                        set_irq_handler(MIPS_GIC_IRQ_BASE +
+                                        GIC_RESCHED_INT(i), handle_percpu_irq);
+                        set_irq_handler(MIPS_GIC_IRQ_BASE +
+                                        GIC_CALL_INT(i), handle_percpu_irq);
                }
        } else {
                /* set up ipi interrupts */
diff --git a/arch/mips/mti-malta/malta-reset.c b/arch/mips/mti-malta/malta-reset.c
index 42dee4da37ba..f48d60e84290 100644
--- a/arch/mips/mti-malta/malta-reset.c
+++ b/arch/mips/mti-malta/malta-reset.c
@@ -28,9 +28,6 @@
 #include <asm/reboot.h>
 #include <asm/mips-boards/generic.h>
-static void mips_machine_restart(char *command);
-static void mips_machine_halt(void);
 static void mips_machine_restart(char *command)
 {
        unsigned int __iomem *softres_reg =
diff --git a/arch/mips/pci/Makefile b/arch/mips/pci/Makefile
index e8a97f59e066..63d8a297c58d 100644
--- a/arch/mips/pci/Makefile
+++ b/arch/mips/pci/Makefile
@@ -52,3 +52,8 @@ obj-$(CONFIG_VICTOR_MPC30X)	+= fixup-mpc30x.o
 obj-$(CONFIG_ZAO_CAPCELLA)      += fixup-capcella.o
 obj-$(CONFIG_WR_PPMC)           += fixup-wrppmc.o
 obj-$(CONFIG_MIKROTIK_RB532)    += pci-rc32434.o ops-rc32434.o fixup-rc32434.o
+obj-$(CONFIG_CPU_CAVIUM_OCTEON) += pci-octeon.o pcie-octeon.o
+ifdef CONFIG_PCI_MSI
+obj-$(CONFIG_CPU_CAVIUM_OCTEON) += msi-octeon.o
+endif
diff --git a/arch/mips/pci/fixup-capcella.c b/arch/mips/pci/fixup-capcella.c
index 1416bca6d1a3..1c02f5737367 100644
--- a/arch/mips/pci/fixup-capcella.c
+++ b/arch/mips/pci/fixup-capcella.c
@@ -1,7 +1,7 @@
 /*
 *  fixup-cappcela.c, The ZAO Networks Capcella specific PCI fixups.
 *
- *  Copyright (C) 2002,2004  Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
+ *  Copyright (C) 2002,2004  Yoichi Yuasa <yuasa@linux-mips.org>
 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License as published by
diff --git a/arch/mips/pci/fixup-mpc30x.c b/arch/mips/pci/fixup-mpc30x.c
index 591159625722..e08f49cb6875 100644
--- a/arch/mips/pci/fixup-mpc30x.c
+++ b/arch/mips/pci/fixup-mpc30x.c
@@ -1,7 +1,7 @@
 /*
 *  fixup-mpc30x.c, The Victor MP-C303/304 specific PCI fixups.
 *
- *  Copyright (C) 2002,2004  Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
+ *  Copyright (C) 2002,2004  Yoichi Yuasa <yuasa@linux-mips.org>
 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License as published by
diff --git a/arch/mips/pci/fixup-tb0219.c b/arch/mips/pci/fixup-tb0219.c
index ed87733f6796..8084b17d4406 100644
--- a/arch/mips/pci/fixup-tb0219.c
+++ b/arch/mips/pci/fixup-tb0219.c
@@ -2,7 +2,7 @@
 *  fixup-tb0219.c, The TANBAC TB0219 specific PCI fixups.
 *
 *  Copyright (C) 2003  Megasolution Inc. <matsu@megasolution.jp>
- *  Copyright (C) 2004-2005  Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
+ *  Copyright (C) 2004-2005  Yoichi Yuasa <yuasa@linux-mips.org>
 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License as published by
diff --git a/arch/mips/pci/fixup-tb0226.c b/arch/mips/pci/fixup-tb0226.c
index e3eedf4bf9bd..4196ccf3ea3d 100644
--- a/arch/mips/pci/fixup-tb0226.c
+++ b/arch/mips/pci/fixup-tb0226.c
@@ -1,7 +1,7 @@
 /*
 *  fixup-tb0226.c, The TANBAC TB0226 specific PCI fixups.
 *
- *  Copyright (C) 2002-2005  Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
+ *  Copyright (C) 2002-2005  Yoichi Yuasa <yuasa@linux-mips.org>
 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License as published by
diff --git a/arch/mips/pci/fixup-tb0287.c b/arch/mips/pci/fixup-tb0287.c
index 267ab3dc3d42..2fe29db43725 100644
--- a/arch/mips/pci/fixup-tb0287.c
+++ b/arch/mips/pci/fixup-tb0287.c
@@ -1,7 +1,7 @@
 /*
 *  fixup-tb0287.c, The TANBAC TB0287 specific PCI fixups.
 *
- *  Copyright (C) 2005  Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
+ *  Copyright (C) 2005  Yoichi Yuasa <yuasa@linux-mips.org>
 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License as published by
diff --git a/arch/mips/cavium-octeon/msi.c b/arch/mips/pci/msi-octeon.c
index 964b03b75a8f..03742e647657 100644
--- a/arch/mips/cavium-octeon/msi.c
+++ b/arch/mips/pci/msi-octeon.c
@@ -3,7 +3,7 @@
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 *
- * Copyright (C) 2005-2007 Cavium Networks
+ * Copyright (C) 2005-2009 Cavium Networks
 */
 #include <linux/kernel.h>
 #include <linux/init.h>
@@ -16,8 +16,7 @@
 #include <asm/octeon/cvmx-pci-defs.h>
 #include <asm/octeon/cvmx-npei-defs.h>
 #include <asm/octeon/cvmx-pexp-defs.h>
+#include <asm/octeon/pci-octeon.h>
-#include "pci-common.h"
 /*
 * Each bit in msi_free_irq_bitmask represents a MSI interrupt that is
@@ -47,8 +46,8 @@ static DEFINE_SPINLOCK(msi_free_irq_bitmask_lock);
 * programming the MSI control bits [6:4] before calling
 * pci_enable_msi().
 *
- * @param dev    Device requesting MSI interrupts
+ * @dev:    Device requesting MSI interrupts
- * @param desc   MSI descriptor
+ * @desc:   MSI descriptor
 *
 * Returns 0 on success.
 */
@@ -213,14 +212,9 @@ void arch_teardown_msi_irq(unsigned int irq)
 }
-/**
+/*
 * Called by the interrupt handling code when an MSI interrupt
 * occurs.
- *
- * @param cpl
- * @param dev_id
- *
- * @return
 */
 static irqreturn_t octeon_msi_interrupt(int cpl, void *dev_id)
 {
@@ -256,31 +250,37 @@ static irqreturn_t octeon_msi_interrupt(int cpl, void *dev_id)
 }
-/**
+/*
 * Initializes the MSI interrupt handling code
- *
- * @return
 */
 int octeon_msi_initialize(void)
 {
-        int r;
        if (octeon_has_feature(OCTEON_FEATURE_PCIE)) {
-                r = request_irq(OCTEON_IRQ_PCI_MSI0, octeon_msi_interrupt,
+                if (request_irq(OCTEON_IRQ_PCI_MSI0, octeon_msi_interrupt,
                                IRQF_SHARED,
-                                "MSI[0:63]", octeon_msi_interrupt);
+                                "MSI[0:63]", octeon_msi_interrupt))
+                        panic("request_irq(OCTEON_IRQ_PCI_MSI0) failed");
        } else if (octeon_is_pci_host()) {
-                r = request_irq(OCTEON_IRQ_PCI_MSI0, octeon_msi_interrupt,
+                if (request_irq(OCTEON_IRQ_PCI_MSI0, octeon_msi_interrupt,
                                IRQF_SHARED,
-                                "MSI[0:15]", octeon_msi_interrupt);
+                                "MSI[0:15]", octeon_msi_interrupt))
-                r += request_irq(OCTEON_IRQ_PCI_MSI1, octeon_msi_interrupt,
+                        panic("request_irq(OCTEON_IRQ_PCI_MSI0) failed");
-                                 IRQF_SHARED,
-                                 "MSI[16:31]", octeon_msi_interrupt);
+                if (request_irq(OCTEON_IRQ_PCI_MSI1, octeon_msi_interrupt,
-                r += request_irq(OCTEON_IRQ_PCI_MSI2, octeon_msi_interrupt,
+                                IRQF_SHARED,
-                                 IRQF_SHARED,
+                                "MSI[16:31]", octeon_msi_interrupt))
-                                 "MSI[32:47]", octeon_msi_interrupt);
+                        panic("request_irq(OCTEON_IRQ_PCI_MSI1) failed");
-                r += request_irq(OCTEON_IRQ_PCI_MSI3, octeon_msi_interrupt,
-                                 IRQF_SHARED,
+                if (request_irq(OCTEON_IRQ_PCI_MSI2, octeon_msi_interrupt,
-                                 "MSI[48:63]", octeon_msi_interrupt);
+                                IRQF_SHARED,
+                                "MSI[32:47]", octeon_msi_interrupt))
+                        panic("request_irq(OCTEON_IRQ_PCI_MSI2) failed");
+                if (request_irq(OCTEON_IRQ_PCI_MSI3, octeon_msi_interrupt,
+                                IRQF_SHARED,
+                                "MSI[48:63]", octeon_msi_interrupt))
+                        panic("request_irq(OCTEON_IRQ_PCI_MSI3) failed");
        }
        return 0;
 }
diff --git a/arch/mips/pci/ops-vr41xx.c b/arch/mips/pci/ops-vr41xx.c
index 900c6b32576c..28962a7c6606 100644
--- a/arch/mips/pci/ops-vr41xx.c
+++ b/arch/mips/pci/ops-vr41xx.c
@@ -2,8 +2,8 @@
 *  ops-vr41xx.c, PCI configuration routines for the PCIU of NEC VR4100 series.
 *
 *  Copyright (C) 2001-2003 MontaVista Software Inc.
- *    Author: Yoichi Yuasa <yyuasa@mvista.com or source@mvista.com>
+ *    Author: Yoichi Yuasa <source@mvista.com>
- *  Copyright (C) 2004-2005  Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
+ *  Copyright (C) 2004-2005  Yoichi Yuasa <yuasa@linux-mips.org>
 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License as published by
@@ -21,7 +21,7 @@
 */
 /*
 * Changes:
- *  MontaVista Software Inc. <yyuasa@mvista.com> or <source@mvista.com>
+ *  MontaVista Software Inc. <source@mvista.com>
 *  - New creation, NEC VR4122 and VR4131 are supported.
 */
 #include <linux/pci.h>
diff --git a/arch/mips/cavium-octeon/pci.c b/arch/mips/pci/pci-octeon.c
index 67c0ff5e92f1..9cb0c807f564 100644
--- a/arch/mips/cavium-octeon/pci.c
+++ b/arch/mips/pci/pci-octeon.c
@@ -3,7 +3,7 @@
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 *
- * Copyright (C) 2005-2007 Cavium Networks
+ * Copyright (C) 2005-2009 Cavium Networks
 */
 #include <linux/kernel.h>
 #include <linux/init.h>
@@ -17,8 +17,7 @@
 #include <asm/octeon/octeon.h>
 #include <asm/octeon/cvmx-npi-defs.h>
 #include <asm/octeon/cvmx-pci-defs.h>
+#include <asm/octeon/pci-octeon.h>
-#include "pci-common.h"
 #define USE_OCTEON_INTERNAL_ARBITER
@@ -54,6 +53,126 @@ union octeon_pci_address {
        } s;
 };
+int __initdata (*octeon_pcibios_map_irq)(const struct pci_dev *dev,
+                                         u8 slot, u8 pin);
+enum octeon_dma_bar_type octeon_dma_bar_type = OCTEON_DMA_BAR_TYPE_INVALID;
+/**
+ * Map a PCI device to the appropriate interrupt line
+ *
+ * @dev:    The Linux PCI device structure for the device to map
+ * @slot:   The slot number for this device on __BUS 0__. Linux
+ *               enumerates through all the bridges and figures out the
+ *               slot on Bus 0 where this device eventually hooks to.
+ * @pin:    The PCI interrupt pin read from the device, then swizzled
+ *               as it goes through each bridge.
+ * Returns Interrupt number for the device
+ */
+int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
+{
+        if (octeon_pcibios_map_irq)
+                return octeon_pcibios_map_irq(dev, slot, pin);
+        else
+                panic("octeon_pcibios_map_irq not set.");
+}
+/*
+ * Called to perform platform specific PCI setup
+ */
+int pcibios_plat_dev_init(struct pci_dev *dev)
+{
+        uint16_t config;
+        uint32_t dconfig;
+        int pos;
+        /*
+         * Force the Cache line setting to 64 bytes. The standard
+         * Linux bus scan doesn't seem to set it. Octeon really has
+         * 128 byte lines, but Intel bridges get really upset if you
+         * try and set values above 64 bytes. Value is specified in
+         * 32bit words.
+         */
+        pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, 64 / 4);
+        /* Set latency timers for all devices */
+        pci_write_config_byte(dev, PCI_LATENCY_TIMER, 48);
+        /* Enable reporting System errors and parity errors on all devices */
+        /* Enable parity checking and error reporting */
+        pci_read_config_word(dev, PCI_COMMAND, &config);
+        config |= PCI_COMMAND_PARITY | PCI_COMMAND_SERR;
+        pci_write_config_word(dev, PCI_COMMAND, config);
+        if (dev->subordinate) {
+                /* Set latency timers on sub bridges */
+                pci_write_config_byte(dev, PCI_SEC_LATENCY_TIMER, 48);
+                /* More bridge error detection */
+                pci_read_config_word(dev, PCI_BRIDGE_CONTROL, &config);
+                config |= PCI_BRIDGE_CTL_PARITY | PCI_BRIDGE_CTL_SERR;
+                pci_write_config_word(dev, PCI_BRIDGE_CONTROL, config);
+        }
+        /* Enable the PCIe normal error reporting */
+        pos = pci_find_capability(dev, PCI_CAP_ID_EXP);
+        if (pos) {
+                /* Update Device Control */
+                pci_read_config_word(dev, pos + PCI_EXP_DEVCTL, &config);
+                /* Correctable Error Reporting */
+                config |= PCI_EXP_DEVCTL_CERE;
+                /* Non-Fatal Error Reporting */
+                config |= PCI_EXP_DEVCTL_NFERE;
+                /* Fatal Error Reporting */
+                config |= PCI_EXP_DEVCTL_FERE;
+                /* Unsupported Request */
+                config |= PCI_EXP_DEVCTL_URRE;
+                pci_write_config_word(dev, pos + PCI_EXP_DEVCTL, config);
+        }
+        /* Find the Advanced Error Reporting capability */
+        pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR);
+        if (pos) {
+                /* Clear Uncorrectable Error Status */
+                pci_read_config_dword(dev, pos + PCI_ERR_UNCOR_STATUS,
+                                      &dconfig);
+                pci_write_config_dword(dev, pos + PCI_ERR_UNCOR_STATUS,
+                                       dconfig);
+                /* Enable reporting of all uncorrectable errors */
+                /* Uncorrectable Error Mask - turned on bits disable errors */
+                pci_write_config_dword(dev, pos + PCI_ERR_UNCOR_MASK, 0);
+                /*
+                 * Leave severity at HW default. This only controls if
+                 * errors are reported as uncorrectable or
+                 * correctable, not if the error is reported.
+                 */
+                /* PCI_ERR_UNCOR_SEVER - Uncorrectable Error Severity */
+                /* Clear Correctable Error Status */
+                pci_read_config_dword(dev, pos + PCI_ERR_COR_STATUS, &dconfig);
+                pci_write_config_dword(dev, pos + PCI_ERR_COR_STATUS, dconfig);
+                /* Enable reporting of all correctable errors */
+                /* Correctable Error Mask - turned on bits disable errors */
+                pci_write_config_dword(dev, pos + PCI_ERR_COR_MASK, 0);
+                /* Advanced Error Capabilities */
+                pci_read_config_dword(dev, pos + PCI_ERR_CAP, &dconfig);
+                /* ECRC Generation Enable */
+                if (config & PCI_ERR_CAP_ECRC_GENC)
+                        config |= PCI_ERR_CAP_ECRC_GENE;
+                /* ECRC Check Enable */
+                if (config & PCI_ERR_CAP_ECRC_CHKC)
+                        config |= PCI_ERR_CAP_ECRC_CHKE;
+                pci_write_config_dword(dev, pos + PCI_ERR_CAP, dconfig);
+                /* PCI_ERR_HEADER_LOG - Header Log Register (16 bytes) */
+                /* Report all errors to the root complex */
+                pci_write_config_dword(dev, pos + PCI_ERR_ROOT_COMMAND,
+                                       PCI_ERR_ROOT_CMD_COR_EN |
+                                       PCI_ERR_ROOT_CMD_NONFATAL_EN |
+                                       PCI_ERR_ROOT_CMD_FATAL_EN);
+                /* Clear the Root status register */
+                pci_read_config_dword(dev, pos + PCI_ERR_ROOT_STATUS, &dconfig);
+                pci_write_config_dword(dev, pos + PCI_ERR_ROOT_STATUS, dconfig);
+        }
+        return 0;
+}
 /**
 * Return the mapping of PCI device number to IRQ line. Each
 * character in the return string represents the interrupt
@@ -136,9 +255,8 @@ int __init octeon_pci_pcibios_map_irq(const struct pci_dev *dev,
 }
-/**
+/*
 * Read a value from configuration space
- *
 */
 static int octeon_read_config(struct pci_bus *bus, unsigned int devfn,
                              int reg, int size, u32 *val)
@@ -174,15 +292,8 @@ static int octeon_read_config(struct pci_bus *bus, unsigned int devfn,
 }
-/**
+/*
 * Write a value to PCI configuration space
- *
- * @bus:
- * @devfn:
- * @reg:
- * @size:
- * @val:
- * Returns
 */
 static int octeon_write_config(struct pci_bus *bus, unsigned int devfn,
                               int reg, int size, u32 val)
@@ -251,10 +362,8 @@ static struct pci_controller octeon_pci_controller = {
 };
-/**
+/*
 * Low level initialize the Octeon PCI controller
- *
- * Returns
 */
 static void octeon_pci_initialize(void)
 {
@@ -398,7 +507,7 @@ static void octeon_pci_initialize(void)
                pci_int_arb_cfg.s.en = 1;       /* Internal arbiter enable */
                cvmx_write_csr(CVMX_NPI_PCI_INT_ARB_CFG, pci_int_arb_cfg.u64);
        }
-#endif                          /* USE_OCTEON_INTERNAL_ARBITER */
+#endif  /* USE_OCTEON_INTERNAL_ARBITER */
        /*
         * Preferrably written to 1 to set MLTD. [RDSATI,TRTAE,
@@ -457,10 +566,8 @@ static void octeon_pci_initialize(void)
 }
-/**
+/*
 * Initialize the Octeon PCI controller
- *
- * Returns
 */
 static int __init octeon_pci_setup(void)
 {
diff --git a/arch/mips/pci/pci-vr41xx.c b/arch/mips/pci/pci-vr41xx.c
index d1e049b55f34..56525711f8b7 100644
--- a/arch/mips/pci/pci-vr41xx.c
+++ b/arch/mips/pci/pci-vr41xx.c
@@ -2,8 +2,8 @@
 *  pci-vr41xx.c, PCI Control Unit routines for the NEC VR4100 series.
 *
 *  Copyright (C) 2001-2003 MontaVista Software Inc.
- *    Author: Yoichi Yuasa <yyuasa@mvista.com or source@mvista.com>
+ *    Author: Yoichi Yuasa <source@mvista.com>
- *  Copyright (C) 2004-2008  Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
+ *  Copyright (C) 2004-2008  Yoichi Yuasa <yuasa@linux-mips.org>
 *  Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org)
 *
 *  This program is free software; you can redistribute it and/or modify
@@ -22,7 +22,7 @@
 */
 /*
 * Changes:
- *  MontaVista Software Inc. <yyuasa@mvista.com> or <source@mvista.com>
+ *  MontaVista Software Inc. <source@mvista.com>
 *  - New creation, NEC VR4122 and VR4131 are supported.
 */
 #include <linux/init.h>
diff --git a/arch/mips/pci/pci-vr41xx.h b/arch/mips/pci/pci-vr41xx.h
index 8a35e32b8376..6b1ae2eb1c06 100644
--- a/arch/mips/pci/pci-vr41xx.h
+++ b/arch/mips/pci/pci-vr41xx.h
@@ -2,8 +2,8 @@
 *  pci-vr41xx.h, Include file for PCI Control Unit of the NEC VR4100 series.
 *
 *  Copyright (C) 2002  MontaVista Software Inc.
- *    Author: Yoichi Yuasa <yyuasa@mvista.com or source@mvista.com>
+ *    Author: Yoichi Yuasa <source@mvista.com>
- *  Copyright (C) 2004-2005  Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
+ *  Copyright (C) 2004-2005  Yoichi Yuasa <yuasa@linux-mips.org>
 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License as published by
diff --git a/arch/mips/cavium-octeon/pcie.c b/arch/mips/pci/pcie-octeon.c
index 49d14081b3b5..75262247f3e4 100644
--- a/arch/mips/cavium-octeon/pcie.c
+++ b/arch/mips/pci/pcie-octeon.c
@@ -18,8 +18,7 @@
 #include <asm/octeon/cvmx-pescx-defs.h>
 #include <asm/octeon/cvmx-pexp-defs.h>
 #include <asm/octeon/cvmx-helper-errata.h>
+#include <asm/octeon/pci-octeon.h>
-#include "pci-common.h"
 union cvmx_pcie_address {
        uint64_t u64;
@@ -976,13 +975,13 @@ static int cvmx_pcie_rc_initialize(int pcie_port)
 /**
 * Map a PCI device to the appropriate interrupt line
 *
- * @param dev    The Linux PCI device structure for the device to map
+ * @dev:    The Linux PCI device structure for the device to map
- * @param slot   The slot number for this device on __BUS 0__. Linux
+ * @slot:   The slot number for this device on __BUS 0__. Linux
 *               enumerates through all the bridges and figures out the
 *               slot on Bus 0 where this device eventually hooks to.
- * @param pin    The PCI interrupt pin read from the device, then swizzled
+ * @pin:    The PCI interrupt pin read from the device, then swizzled
 *               as it goes through each bridge.
- * @return Interrupt number for the device
+ * Returns Interrupt number for the device
 */
 int __init octeon_pcie_pcibios_map_irq(const struct pci_dev *dev,
                                       u8 slot, u8 pin)
@@ -1025,12 +1024,12 @@ int __init octeon_pcie_pcibios_map_irq(const struct pci_dev *dev,
 /**
 * Read a value from configuration space
 *
- * @param bus
+ * @bus:
- * @param devfn
+ * @devfn:
- * @param reg
+ * @reg:
- * @param size
+ * @size:
- * @param val
+ * @val:
- * @return
+ * Returns
 */
 static inline int octeon_pcie_read_config(int pcie_port, struct pci_bus *bus,
                                          unsigned int devfn, int reg, int size,
@@ -1156,12 +1155,12 @@ static int octeon_pcie1_read_config(struct pci_bus *bus, unsigned int devfn,
 /**
 * Write a value to PCI configuration space
 *
- * @param bus
+ * @bus:
- * @param devfn
+ * @devfn:
- * @param reg
+ * @reg:
- * @param size
+ * @size:
- * @param val
+ * @val:
- * @return
+ * Returns
 */
 static inline int octeon_pcie_write_config(int pcie_port, struct pci_bus *bus,
                                           unsigned int devfn, int reg,
@@ -1254,7 +1253,7 @@ static struct pci_controller octeon_pcie1_controller = {
 /**
 * Initialize the Octeon PCIe controllers
 *
- * @return
+ * Returns
 */
 static int __init octeon_pcie_setup(void)
 {
diff --git a/arch/mips/vr41xx/casio-e55/setup.c b/arch/mips/vr41xx/casio-e55/setup.c
index 6d9bab890587..719f4a5b9844 100644
--- a/arch/mips/vr41xx/casio-e55/setup.c
+++ b/arch/mips/vr41xx/casio-e55/setup.c
@@ -1,7 +1,7 @@
 /*
 *  setup.c, Setup for the CASIO CASSIOPEIA E-11/15/55/65.
 *
- *  Copyright (C) 2002-2006  Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
+ *  Copyright (C) 2002-2006  Yoichi Yuasa <yuasa@linux-mips.org>
 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License as published by
diff --git a/arch/mips/vr41xx/common/bcu.c b/arch/mips/vr41xx/common/bcu.c
index d77c330a0d59..6346c59c9f9d 100644
--- a/arch/mips/vr41xx/common/bcu.c
+++ b/arch/mips/vr41xx/common/bcu.c
@@ -2,8 +2,8 @@
 *  bcu.c, Bus Control Unit routines for the NEC VR4100 series.
 *
 *  Copyright (C) 2002  MontaVista Software Inc.
- *    Author: Yoichi Yuasa <yyuasa@mvista.com, or source@mvista.com>
+ *    Author: Yoichi Yuasa <source@mvista.com>
- *  Copyright (C) 2003-2005  Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
+ *  Copyright (C) 2003-2005  Yoichi Yuasa <yuasa@linux-mips.org>
 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License as published by
@@ -21,11 +21,11 @@
 */
 /*
 * Changes:
- *  MontaVista Software Inc. <yyuasa@mvista.com> or <source@mvista.com>
+ *  MontaVista Software Inc. <source@mvista.com>
 *  - New creation, NEC VR4122 and VR4131 are supported.
 *  - Added support for NEC VR4111 and VR4121.
 *
- *  Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
+ *  Yoichi Yuasa <yuasa@linux-mips.org>
 *  - Added support for NEC VR4133.
 */
 #include <linux/kernel.h>
diff --git a/arch/mips/vr41xx/common/cmu.c b/arch/mips/vr41xx/common/cmu.c
index ad0e8e3409d9..8ba7d04a5ec5 100644
--- a/arch/mips/vr41xx/common/cmu.c
+++ b/arch/mips/vr41xx/common/cmu.c
@@ -2,8 +2,8 @@
 *  cmu.c, Clock Mask Unit routines for the NEC VR4100 series.
 *
 *  Copyright (C) 2001-2002  MontaVista Software Inc.
- *    Author: Yoichi Yuasa <yyuasa@mvista.com or source@mvista.com>
+ *    Author: Yoichi Yuasa <source@mvista.com>
- *  Copuright (C) 2003-2005  Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
+ *  Copuright (C) 2003-2005  Yoichi Yuasa <yuasa@linux-mips.org>
 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License as published by
@@ -21,11 +21,11 @@
 */
 /*
 * Changes:
- *  MontaVista Software Inc. <yyuasa@mvista.com> or <source@mvista.com>
+ *  MontaVista Software Inc. <source@mvista.com>
 *  - New creation, NEC VR4122 and VR4131 are supported.
 *  - Added support for NEC VR4111 and VR4121.
 *
- *  Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
+ *  Yoichi Yuasa <yuasa@linux-mips.org>
 *  - Added support for NEC VR4133.
 */
 #include <linux/init.h>
diff --git a/arch/mips/vr41xx/common/giu.c b/arch/mips/vr41xx/common/giu.c
index 2b272f1496fe..22cc6f2100a1 100644
--- a/arch/mips/vr41xx/common/giu.c
+++ b/arch/mips/vr41xx/common/giu.c
@@ -1,7 +1,7 @@
 /*
 *  NEC VR4100 series GIU platform device.
 *
- *  Copyright (C) 2007  Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
+ *  Copyright (C) 2007  Yoichi Yuasa <yuasa@linux-mips.org>
 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License as published by
diff --git a/arch/mips/vr41xx/common/icu.c b/arch/mips/vr41xx/common/icu.c
index 3f23d9fda662..6d39e222b170 100644
--- a/arch/mips/vr41xx/common/icu.c
+++ b/arch/mips/vr41xx/common/icu.c
@@ -2,8 +2,8 @@
 *  icu.c, Interrupt Control Unit routines for the NEC VR4100 series.
 *
 *  Copyright (C) 2001-2002  MontaVista Software Inc.
- *    Author: Yoichi Yuasa <yyuasa@mvista.com or source@mvista.com>
+ *    Author: Yoichi Yuasa <source@mvista.com>
- *  Copyright (C) 2003-2006  Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
+ *  Copyright (C) 2003-2006  Yoichi Yuasa <yuasa@linux-mips.org>
 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License as published by
@@ -21,11 +21,11 @@
 */
 /*
 * Changes:
- *  MontaVista Software Inc. <yyuasa@mvista.com> or <source@mvista.com>
+ *  MontaVista Software Inc. <source@mvista.com>
 *  - New creation, NEC VR4122 and VR4131 are supported.
 *  - Added support for NEC VR4111 and VR4121.
 *
- *  Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
+ *  Yoichi Yuasa <yuasa@linux-mips.org>
 *  - Coped with INTASSIGN of NEC VR4133.
 */
 #include <linux/errno.h>
diff --git a/arch/mips/vr41xx/common/init.c b/arch/mips/vr41xx/common/init.c
index c64995342ba8..1386e6f081c8 100644
--- a/arch/mips/vr41xx/common/init.c
+++ b/arch/mips/vr41xx/common/init.c
@@ -1,7 +1,7 @@
 /*
 *  init.c, Common initialization routines for NEC VR4100 series.
 *
- *  Copyright (C) 2003-2008  Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
+ *  Copyright (C) 2003-2008  Yoichi Yuasa <yuasa@linux-mips.org>
 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License as published by
diff --git a/arch/mips/vr41xx/common/irq.c b/arch/mips/vr41xx/common/irq.c
index 9cc389109b19..bef06872f012 100644
--- a/arch/mips/vr41xx/common/irq.c
+++ b/arch/mips/vr41xx/common/irq.c
@@ -1,7 +1,7 @@
 /*
 *  Interrupt handing routines for NEC VR4100 series.
 *
- *  Copyright (C) 2005-2007  Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
+ *  Copyright (C) 2005-2007  Yoichi Yuasa <yuasa@linux-mips.org>
 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License as published by
diff --git a/arch/mips/vr41xx/common/pmu.c b/arch/mips/vr41xx/common/pmu.c
index 028aaf75eb21..692b4e85b7fc 100644
--- a/arch/mips/vr41xx/common/pmu.c
+++ b/arch/mips/vr41xx/common/pmu.c
@@ -1,7 +1,7 @@
 /*
 *  pmu.c, Power Management Unit routines for NEC VR4100 series.
 *
- *  Copyright (C) 2003-2007  Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
+ *  Copyright (C) 2003-2007  Yoichi Yuasa <yuasa@linux-mips.org>
 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License as published by
diff --git a/arch/mips/vr41xx/common/rtc.c b/arch/mips/vr41xx/common/rtc.c
index 9f26c14edcac..ebc5dcf0ed8e 100644
--- a/arch/mips/vr41xx/common/rtc.c
+++ b/arch/mips/vr41xx/common/rtc.c
@@ -1,7 +1,7 @@
 /*
 *  NEC VR4100 series RTC platform device.
 *
- *  Copyright (C) 2007  Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
+ *  Copyright (C) 2007  Yoichi Yuasa <yuasa@linux-mips.org>
 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License as published by
diff --git a/arch/mips/vr41xx/common/siu.c b/arch/mips/vr41xx/common/siu.c
index 654dee6208be..54eae56108fb 100644
--- a/arch/mips/vr41xx/common/siu.c
+++ b/arch/mips/vr41xx/common/siu.c
@@ -1,7 +1,7 @@
 /*
 *  NEC VR4100 series SIU platform device.
 *
- *  Copyright (C) 2007-2008  Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
+ *  Copyright (C) 2007-2008  Yoichi Yuasa <yuasa@linux-mips.org>
 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License as published by
diff --git a/arch/mips/vr41xx/common/type.c b/arch/mips/vr41xx/common/type.c
index e0c1ac5e988e..ff841422b638 100644
--- a/arch/mips/vr41xx/common/type.c
+++ b/arch/mips/vr41xx/common/type.c
@@ -1,7 +1,7 @@
 /*
 *  type.c, System type for NEC VR4100 series.
 *
- *  Copyright (C) 2005  Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
+ *  Copyright (C) 2005  Yoichi Yuasa <yuasa@linux-mips.org>
 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License as published by
diff --git a/arch/mips/vr41xx/ibm-workpad/setup.c b/arch/mips/vr41xx/ibm-workpad/setup.c
index 9eef297eca1a..3982f378a3e6 100644
--- a/arch/mips/vr41xx/ibm-workpad/setup.c
+++ b/arch/mips/vr41xx/ibm-workpad/setup.c
@@ -1,7 +1,7 @@
 /*
 *  setup.c, Setup for the IBM WorkPad z50.
 *
- *  Copyright (C) 2002-2006  Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
+ *  Copyright (C) 2002-2006  Yoichi Yuasa <yuasa@linux-mips.org>
 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License as published by
diff --git a/arch/mn10300/include/asm/pci.h b/arch/mn10300/include/asm/pci.h
index e58b9a46e1b1..35d2ed6396f6 100644
--- a/arch/mn10300/include/asm/pci.h
+++ b/arch/mn10300/include/asm/pci.h
@@ -70,10 +70,6 @@ struct pci_dev;
 */
 #define PCI_DMA_BUS_IS_PHYS     (1)
-/* This is always fine. */
-#define pci_dac_dma_supported(pci_dev, mask)    (0)
 /* Return the index of the PCI controller for device. */
 static inline int pci_controller_num(struct pci_dev *dev)
 {
diff --git a/arch/mn10300/kernel/vmlinux.lds.S b/arch/mn10300/kernel/vmlinux.lds.S
index bcebcefb4ad7..c96ba3da95ac 100644
--- a/arch/mn10300/kernel/vmlinux.lds.S
+++ b/arch/mn10300/kernel/vmlinux.lds.S
@@ -61,7 +61,7 @@ SECTIONS
        _edata = .;             /* End of data section */
  }
-  .data.init_task : { INIT_TASK(THREAD_SIZE); }
+  .data.init_task : { INIT_TASK_DATA(THREAD_SIZE); }
  /* might get freed after init */
  . = ALIGN(PAGE_SIZE);
diff --git a/arch/parisc/Kconfig b/arch/parisc/Kconfig
index 9038f39d9d73..06f8d5b5b0f9 100644
--- a/arch/parisc/Kconfig
+++ b/arch/parisc/Kconfig
@@ -16,6 +16,8 @@ config PARISC
        select RTC_DRV_GENERIC
        select INIT_ALL_POSSIBLE
        select BUG
+        select HAVE_PERF_COUNTERS
+        select GENERIC_ATOMIC64 if !64BIT
        help
          The PA-RISC microprocessor is designed by Hewlett-Packard and used
          in many of their workstations & servers (HP9000 700 and 800 series,
diff --git a/arch/parisc/include/asm/atomic.h b/arch/parisc/include/asm/atomic.h
index 7eeaff944360..8bc9e96699b2 100644
--- a/arch/parisc/include/asm/atomic.h
+++ b/arch/parisc/include/asm/atomic.h
@@ -222,13 +222,13 @@ static __inline__ int atomic_add_unless(atomic_t *v, int a, int u)
 #define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
-#define atomic_add(i,v) ((void)(__atomic_add_return( ((int)(i)),(v))))
+#define atomic_add(i,v) ((void)(__atomic_add_return( (i),(v))))
-#define atomic_sub(i,v) ((void)(__atomic_add_return(-((int)(i)),(v))))
+#define atomic_sub(i,v) ((void)(__atomic_add_return(-(i),(v))))
 #define atomic_inc(v)   ((void)(__atomic_add_return(   1,(v))))
 #define atomic_dec(v)   ((void)(__atomic_add_return(  -1,(v))))
-#define atomic_add_return(i,v)  (__atomic_add_return( ((int)(i)),(v)))
+#define atomic_add_return(i,v)  (__atomic_add_return( (i),(v)))
-#define atomic_sub_return(i,v)  (__atomic_add_return(-((int)(i)),(v)))
+#define atomic_sub_return(i,v)  (__atomic_add_return(-(i),(v)))
 #define atomic_inc_return(v)    (__atomic_add_return(   1,(v)))
 #define atomic_dec_return(v)    (__atomic_add_return(  -1,(v)))
@@ -336,7 +336,11 @@ static __inline__ int atomic64_add_unless(atomic64_t *v, long a, long u)
 #define atomic64_inc_not_zero(v) atomic64_add_unless((v), 1, 0)
-#endif /* CONFIG_64BIT */
+#else /* CONFIG_64BIT */
+#include <asm-generic/atomic64.h>
+#endif /* !CONFIG_64BIT */
 #include <asm-generic/atomic-long.h>
diff --git a/arch/parisc/include/asm/dma.h b/arch/parisc/include/asm/dma.h
index 31ad0f05af3d..f7a18f968703 100644
--- a/arch/parisc/include/asm/dma.h
+++ b/arch/parisc/include/asm/dma.h
@@ -1,5 +1,4 @@
-/* $Id: dma.h,v 1.2 1999/04/27 00:46:18 deller Exp $
+/* asm/dma.h: Defines for using and allocating dma channels.
- * linux/include/asm/dma.h: Defines for using and allocating dma channels.
 * Written by Hennus Bergman, 1992.
 * High DMA channel support & info by Hannu Savolainen
 * and John Boyd, Nov. 1992.
diff --git a/arch/parisc/include/asm/perf_counter.h b/arch/parisc/include/asm/perf_counter.h
new file mode 100644
index 000000000000..dc9e829f7013
--- /dev/null
+++ b/arch/parisc/include/asm/perf_counter.h
@@ -0,0 +1,7 @@
+#ifndef __ASM_PARISC_PERF_COUNTER_H
+#define __ASM_PARISC_PERF_COUNTER_H
+/* parisc only supports software counters through this interface. */
+static inline void set_perf_counter_pending(void) { }
+#endif /* __ASM_PARISC_PERF_COUNTER_H */
diff --git a/arch/parisc/include/asm/processor.h b/arch/parisc/include/asm/processor.h
index 9d64df8754ba..9ce66e9d1c2b 100644
--- a/arch/parisc/include/asm/processor.h
+++ b/arch/parisc/include/asm/processor.h
@@ -18,6 +18,7 @@
 #include <asm/types.h>
 #include <asm/system.h>
 #include <asm/percpu.h>
 #endif /* __ASSEMBLY__ */
 #define KERNEL_STACK_SIZE       (4*PAGE_SIZE)
@@ -127,6 +128,8 @@ struct thread_struct {
        unsigned long  flags;
 }; 
+#define task_pt_regs(tsk) ((struct pt_regs *)&((tsk)->thread.regs))
 /* Thread struct flags. */
 #define PARISC_UAC_NOPRINT      (1UL << 0)      /* see prctl and unaligned.c */
 #define PARISC_UAC_SIGBUS       (1UL << 1)
diff --git a/arch/parisc/include/asm/system.h b/arch/parisc/include/asm/system.h
index ee80c920b464..d91357bca5b4 100644
--- a/arch/parisc/include/asm/system.h
+++ b/arch/parisc/include/asm/system.h
@@ -168,8 +168,8 @@ static inline void set_eiem(unsigned long val)
 /* LDCW, the only atomic read-write operation PA-RISC has. *sigh*.  */
 #define __ldcw(a) ({                                            \
        unsigned __ret;                                         \
-        __asm__ __volatile__(__LDCW " 0(%1),%0"                 \
+        __asm__ __volatile__(__LDCW " 0(%2),%0"                 \
-                : "=r" (__ret) : "r" (a));                      \
+                : "=r" (__ret), "+m" (*(a)) : "r" (a));         \
        __ret;                                                  \
 })
diff --git a/arch/parisc/include/asm/tlbflush.h b/arch/parisc/include/asm/tlbflush.h
index 1f6fd4fc05b9..8f1a8100bf2d 100644
--- a/arch/parisc/include/asm/tlbflush.h
+++ b/arch/parisc/include/asm/tlbflush.h
@@ -12,14 +12,12 @@
 * N class systems, only one PxTLB inter processor broadcast can be
 * active at any one time on the Merced bus.  This tlb purge
 * synchronisation is fairly lightweight and harmless so we activate
- * it on all SMP systems not just the N class.  We also need to have
+ * it on all systems not just the N class.
- * preemption disabled on uniprocessor machines, and spin_lock does that
- * nicely.
 */
 extern spinlock_t pa_tlb_lock;
-#define purge_tlb_start(x) spin_lock(&pa_tlb_lock)
+#define purge_tlb_start(flags)  spin_lock_irqsave(&pa_tlb_lock, flags)
-#define purge_tlb_end(x) spin_unlock(&pa_tlb_lock)
+#define purge_tlb_end(flags)    spin_unlock_irqrestore(&pa_tlb_lock, flags)
 extern void flush_tlb_all(void);
 extern void flush_tlb_all_local(void *);
@@ -63,14 +61,16 @@ static inline void flush_tlb_mm(struct mm_struct *mm)
 static inline void flush_tlb_page(struct vm_area_struct *vma,
        unsigned long addr)
 {
+        unsigned long flags;
        /* For one page, it's not worth testing the split_tlb variable */
        mb();
        mtsp(vma->vm_mm->context,1);
-        purge_tlb_start();
+        purge_tlb_start(flags);
        pdtlb(addr);
        pitlb(addr);
-        purge_tlb_end();
+        purge_tlb_end(flags);
 }
 void __flush_tlb_range(unsigned long sid,
diff --git a/arch/parisc/include/asm/unistd.h b/arch/parisc/include/asm/unistd.h
index ef26b009dc5d..f3d3b8b012c4 100644
--- a/arch/parisc/include/asm/unistd.h
+++ b/arch/parisc/include/asm/unistd.h
@@ -807,8 +807,12 @@
 #define __NR_dup3               (__NR_Linux + 312)
 #define __NR_pipe2              (__NR_Linux + 313)
 #define __NR_inotify_init1      (__NR_Linux + 314)
+#define __NR_preadv             (__NR_Linux + 315)
+#define __NR_pwritev            (__NR_Linux + 316)
+#define __NR_rt_tgsigqueueinfo  (__NR_Linux + 317)
+#define __NR_perf_counter_open  (__NR_Linux + 318)
-#define __NR_Linux_syscalls     (__NR_inotify_init1 + 1)
+#define __NR_Linux_syscalls     (__NR_perf_counter_open + 1)
 #define __IGNORE_select         /* newselect */
diff --git a/arch/parisc/kernel/cache.c b/arch/parisc/kernel/cache.c
index 837530ea32e7..b6ed34de14e1 100644
--- a/arch/parisc/kernel/cache.c
+++ b/arch/parisc/kernel/cache.c
@@ -1,5 +1,4 @@
-/* $Id: cache.c,v 1.4 2000/01/25 00:11:38 prumpf Exp $
+/*
- *
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
@@ -398,12 +397,13 @@ EXPORT_SYMBOL(flush_kernel_icache_range_asm);
 void clear_user_page_asm(void *page, unsigned long vaddr)
 {
+        unsigned long flags;
        /* This function is implemented in assembly in pacache.S */
        extern void __clear_user_page_asm(void *page, unsigned long vaddr);
-        purge_tlb_start();
+        purge_tlb_start(flags);
        __clear_user_page_asm(page, vaddr);
-        purge_tlb_end();
+        purge_tlb_end(flags);
 }
 #define FLUSH_THRESHOLD 0x80000 /* 0.5MB */
@@ -444,20 +444,24 @@ extern void clear_user_page_asm(void *page, unsigned long vaddr);
 void clear_user_page(void *page, unsigned long vaddr, struct page *pg)
 {
+        unsigned long flags;
        purge_kernel_dcache_page((unsigned long)page);
-        purge_tlb_start();
+        purge_tlb_start(flags);
        pdtlb_kernel(page);
-        purge_tlb_end();
+        purge_tlb_end(flags);
        clear_user_page_asm(page, vaddr);
 }
 EXPORT_SYMBOL(clear_user_page);
 void flush_kernel_dcache_page_addr(void *addr)
 {
+        unsigned long flags;
        flush_kernel_dcache_page_asm(addr);
-        purge_tlb_start();
+        purge_tlb_start(flags);
        pdtlb_kernel(addr);
-        purge_tlb_end();
+        purge_tlb_end(flags);
 }
 EXPORT_SYMBOL(flush_kernel_dcache_page_addr);
@@ -490,8 +494,10 @@ void __flush_tlb_range(unsigned long sid, unsigned long start,
        if (npages >= 512)  /* 2MB of space: arbitrary, should be tuned */
                flush_tlb_all();
        else {
+                unsigned long flags;
                mtsp(sid, 1);
-                purge_tlb_start();
+                purge_tlb_start(flags);
                if (split_tlb) {
                        while (npages--) {
                                pdtlb(start);
@@ -504,7 +510,7 @@ void __flush_tlb_range(unsigned long sid, unsigned long start,
                                start += PAGE_SIZE;
                        }
                }
-                purge_tlb_end();
+                purge_tlb_end(flags);
        }
 }
diff --git a/arch/parisc/kernel/inventory.c b/arch/parisc/kernel/inventory.c
index bd1f7f1ff74e..d228d8237879 100644
--- a/arch/parisc/kernel/inventory.c
+++ b/arch/parisc/kernel/inventory.c
@@ -170,23 +170,27 @@ static void __init pagezero_memconfig(void)
 static int __init 
 pat_query_module(ulong pcell_loc, ulong mod_index)
 {
-        pdc_pat_cell_mod_maddr_block_t pa_pdc_cell;
+        pdc_pat_cell_mod_maddr_block_t *pa_pdc_cell;
        unsigned long bytecnt;
        unsigned long temp;     /* 64-bit scratch value */
        long status;            /* PDC return value status */
        struct parisc_device *dev;
+        pa_pdc_cell = kmalloc(sizeof (*pa_pdc_cell), GFP_KERNEL);
+        if (!pa_pdc_cell)
+                panic("couldn't allocate memory for PDC_PAT_CELL!");
        /* return cell module (PA or Processor view) */
        status = pdc_pat_cell_module(&bytecnt, pcell_loc, mod_index,
-                                     PA_VIEW, &pa_pdc_cell);
+                                     PA_VIEW, pa_pdc_cell);
        if (status != PDC_OK) {
                /* no more cell modules or error */
                return status;
        }
-        temp = pa_pdc_cell.cba;
+        temp = pa_pdc_cell->cba;
-        dev = alloc_pa_dev(PAT_GET_CBA(temp), &pa_pdc_cell.mod_path);
+        dev = alloc_pa_dev(PAT_GET_CBA(temp), &(pa_pdc_cell->mod_path));
        if (!dev) {
                return PDC_OK;
        }
@@ -203,8 +207,8 @@ pat_query_module(ulong pcell_loc, ulong mod_index)
        /* save generic info returned from the call */
        /* REVISIT: who is the consumer of this? not sure yet... */
-        dev->mod_info = pa_pdc_cell.mod_info;   /* pass to PAT_GET_ENTITY() */
+        dev->mod_info = pa_pdc_cell->mod_info;  /* pass to PAT_GET_ENTITY() */
-        dev->pmod_loc = pa_pdc_cell.mod_location;
+        dev->pmod_loc = pa_pdc_cell->mod_location;
        register_parisc_device(dev);    /* advertise device */
@@ -216,14 +220,14 @@ pat_query_module(ulong pcell_loc, ulong mod_index)
        case PAT_ENTITY_PROC:
                printk(KERN_DEBUG "PAT_ENTITY_PROC: id_eid 0x%lx\n",
-                        pa_pdc_cell.mod[0]);
+                        pa_pdc_cell->mod[0]);
                break;
        case PAT_ENTITY_MEM:
                printk(KERN_DEBUG 
                        "PAT_ENTITY_MEM: amount 0x%lx min_gni_base 0x%lx min_gni_len 0x%lx\n",
-                        pa_pdc_cell.mod[0], pa_pdc_cell.mod[1], 
+                        pa_pdc_cell->mod[0], pa_pdc_cell->mod[1],
-                        pa_pdc_cell.mod[2]);
+                        pa_pdc_cell->mod[2]);
                break;
        case PAT_ENTITY_CA:
                printk(KERN_DEBUG "PAT_ENTITY_CA: %ld\n", pcell_loc);
@@ -243,23 +247,26 @@ pat_query_module(ulong pcell_loc, ulong mod_index)
 print_ranges:
                pdc_pat_cell_module(&bytecnt, pcell_loc, mod_index,
                                    IO_VIEW, &io_pdc_cell);
-                printk(KERN_DEBUG "ranges %ld\n", pa_pdc_cell.mod[1]);
+                printk(KERN_DEBUG "ranges %ld\n", pa_pdc_cell->mod[1]);
-                for (i = 0; i < pa_pdc_cell.mod[1]; i++) {
+                for (i = 0; i < pa_pdc_cell->mod[1]; i++) {
                        printk(KERN_DEBUG 
                                "  PA_VIEW %ld: 0x%016lx 0x%016lx 0x%016lx\n", 
-                                i, pa_pdc_cell.mod[2 + i * 3],  /* type */
+                                i, pa_pdc_cell->mod[2 + i * 3], /* type */
-                                pa_pdc_cell.mod[3 + i * 3],     /* start */
+                                pa_pdc_cell->mod[3 + i * 3],    /* start */
-                                pa_pdc_cell.mod[4 + i * 3]);    /* finish (ie end) */
+                                pa_pdc_cell->mod[4 + i * 3]);   /* finish (ie end) */
                        printk(KERN_DEBUG 
                                "  IO_VIEW %ld: 0x%016lx 0x%016lx 0x%016lx\n", 
-                                i, io_pdc_cell.mod[2 + i * 3],  /* type */
+                                i, io_pdc_cell->mod[2 + i * 3], /* type */
-                                io_pdc_cell.mod[3 + i * 3],     /* start */
+                                io_pdc_cell->mod[3 + i * 3],    /* start */
-                                io_pdc_cell.mod[4 + i * 3]);    /* finish (ie end) */
+                                io_pdc_cell->mod[4 + i * 3]);   /* finish (ie end) */
                }
                printk(KERN_DEBUG "\n");
                break;
        }
 #endif /* DEBUG_PAT */
+        kfree(pa_pdc_cell);
        return PDC_OK;
 }
diff --git a/arch/parisc/kernel/irq.c b/arch/parisc/kernel/irq.c
index 8007f1e65729..330f536a9324 100644
--- a/arch/parisc/kernel/irq.c
+++ b/arch/parisc/kernel/irq.c
@@ -120,7 +120,7 @@ int cpu_check_affinity(unsigned int irq, const struct cpumask *dest)
        if (CHECK_IRQ_PER_CPU(irq)) {
                /* Bad linux design decision.  The mask has already
                 * been set; we must reset it */
-                cpumask_setall(&irq_desc[irq].affinity);
+                cpumask_setall(irq_desc[irq].affinity);
                return -EINVAL;
        }
@@ -138,13 +138,13 @@ static int cpu_set_affinity_irq(unsigned int irq, const struct cpumask *dest)
        if (cpu_dest < 0)
                return -1;
-        cpumask_copy(&irq_desc[irq].affinity, dest);
+        cpumask_copy(irq_desc[irq].affinity, dest);
        return 0;
 }
 #endif
-static struct hw_interrupt_type cpu_interrupt_type = {
+static struct irq_chip cpu_interrupt_type = {
        .typename       = "CPU",
        .startup        = cpu_startup_irq,
        .shutdown       = cpu_disable_irq,
@@ -299,7 +299,7 @@ int txn_alloc_irq(unsigned int bits_wide)
 unsigned long txn_affinity_addr(unsigned int irq, int cpu)
 {
 #ifdef CONFIG_SMP
-        cpumask_copy(&irq_desc[irq].affinity, cpumask_of(cpu));
+        cpumask_copy(irq_desc[irq].affinity, cpumask_of(cpu));
 #endif
        return per_cpu(cpu_data, cpu).txn_addr;
@@ -356,7 +356,7 @@ void do_cpu_irq_mask(struct pt_regs *regs)
        irq = eirr_to_irq(eirr_val);
 #ifdef CONFIG_SMP
-        cpumask_copy(&dest, &irq_desc[irq].affinity);
+        cpumask_copy(&dest, irq_desc[irq].affinity);
        if (CHECK_IRQ_PER_CPU(irq_desc[irq].status) &&
            !cpu_isset(smp_processor_id(), dest)) {
                int cpu = first_cpu(dest);
diff --git a/arch/parisc/kernel/pci-dma.c b/arch/parisc/kernel/pci-dma.c
index 7d927eac932b..c07f618ff7da 100644
--- a/arch/parisc/kernel/pci-dma.c
+++ b/arch/parisc/kernel/pci-dma.c
@@ -90,12 +90,14 @@ static inline int map_pte_uncached(pte_t * pte,
        if (end > PMD_SIZE)
                end = PMD_SIZE;
        do {
+                unsigned long flags;
                if (!pte_none(*pte))
                        printk(KERN_ERR "map_pte_uncached: page already exists\n");
                set_pte(pte, __mk_pte(*paddr_ptr, PAGE_KERNEL_UNC));
-                purge_tlb_start();
+                purge_tlb_start(flags);
                pdtlb_kernel(orig_vaddr);
-                purge_tlb_end();
+                purge_tlb_end(flags);
                vaddr += PAGE_SIZE;
                orig_vaddr += PAGE_SIZE;
                (*paddr_ptr) += PAGE_SIZE;
@@ -168,11 +170,13 @@ static inline void unmap_uncached_pte(pmd_t * pmd, unsigned long vaddr,
        if (end > PMD_SIZE)
                end = PMD_SIZE;
        do {
+                unsigned long flags;
                pte_t page = *pte;
                pte_clear(&init_mm, vaddr, pte);
-                purge_tlb_start();
+                purge_tlb_start(flags);
                pdtlb_kernel(orig_vaddr);
-                purge_tlb_end();
+                purge_tlb_end(flags);
                vaddr += PAGE_SIZE;
                orig_vaddr += PAGE_SIZE;
                pte++;
diff --git a/arch/parisc/kernel/pci.c b/arch/parisc/kernel/pci.c
index 6936386c9861..f7064abc3bb6 100644
--- a/arch/parisc/kernel/pci.c
+++ b/arch/parisc/kernel/pci.c
@@ -1,5 +1,4 @@
-/* $Id: pci.c,v 1.6 2000/01/29 00:12:05 grundler Exp $
+/*
- *
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
diff --git a/arch/parisc/kernel/processor.c b/arch/parisc/kernel/processor.c
index e09d0f7fb6b0..c8fb61ed32f4 100644
--- a/arch/parisc/kernel/processor.c
+++ b/arch/parisc/kernel/processor.c
@@ -1,5 +1,4 @@
-/*    $Id: processor.c,v 1.1 2002/07/20 16:27:06 rhirst Exp $
+/*
- *
 *    Initial setup-routines for HP 9000 based hardware.
 *
 *    Copyright (C) 1991, 1992, 1995  Linus Torvalds
@@ -121,22 +120,28 @@ static int __cpuinit processor_probe(struct parisc_device *dev)
        if (is_pdc_pat()) {
                ulong status;
                unsigned long bytecnt;
-                pdc_pat_cell_mod_maddr_block_t pa_pdc_cell;
+                pdc_pat_cell_mod_maddr_block_t *pa_pdc_cell;
 #undef USE_PAT_CPUID
 #ifdef USE_PAT_CPUID
                struct pdc_pat_cpu_num cpu_info;
 #endif
+                pa_pdc_cell = kmalloc(sizeof (*pa_pdc_cell), GFP_KERNEL);
+                if (!pa_pdc_cell)
+                        panic("couldn't allocate memory for PDC_PAT_CELL!");
                status = pdc_pat_cell_module(&bytecnt, dev->pcell_loc,
-                        dev->mod_index, PA_VIEW, &pa_pdc_cell);
+                        dev->mod_index, PA_VIEW, pa_pdc_cell);
                BUG_ON(PDC_OK != status);
                /* verify it's the same as what do_pat_inventory() found */
-                BUG_ON(dev->mod_info != pa_pdc_cell.mod_info);
+                BUG_ON(dev->mod_info != pa_pdc_cell->mod_info);
-                BUG_ON(dev->pmod_loc != pa_pdc_cell.mod_location);
+                BUG_ON(dev->pmod_loc != pa_pdc_cell->mod_location);
+                txn_addr = pa_pdc_cell->mod[0];   /* id_eid for IO sapic */
-                txn_addr = pa_pdc_cell.mod[0];   /* id_eid for IO sapic */
+                kfree(pa_pdc_cell);
 #ifdef USE_PAT_CPUID
 /* We need contiguous numbers for cpuid. Firmware's notion
diff --git a/arch/parisc/kernel/setup.c b/arch/parisc/kernel/setup.c
index 82131ca8e05c..cb71f3dac995 100644
--- a/arch/parisc/kernel/setup.c
+++ b/arch/parisc/kernel/setup.c
@@ -1,5 +1,4 @@
-/*    $Id: setup.c,v 1.8 2000/02/02 04:42:38 prumpf Exp $
+/*
- *
 *    Initial setup-routines for HP 9000 based hardware.
 *
 *    Copyright (C) 1991, 1992, 1995  Linus Torvalds
diff --git a/arch/parisc/kernel/sys_parisc32.c b/arch/parisc/kernel/sys_parisc32.c
index 1adb40c81669..92a0acaa0d12 100644
--- a/arch/parisc/kernel/sys_parisc32.c
+++ b/arch/parisc/kernel/sys_parisc32.c
@@ -174,68 +174,6 @@ asmlinkage long sys32_sched_rr_get_interval(pid_t pid,
        return ret;
 }
-/*** copied from mips64 ***/
-/*
- * Ooo, nasty.  We need here to frob 32-bit unsigned longs to
- * 64-bit unsigned longs.
- */
-static inline int
-get_fd_set32(unsigned long n, u32 *ufdset, unsigned long *fdset)
-{
-        n = (n + 8*sizeof(u32) - 1) / (8*sizeof(u32));
-        if (ufdset) {
-                unsigned long odd;
-                if (!access_ok(VERIFY_WRITE, ufdset, n*sizeof(u32)))
-                        return -EFAULT;
-                odd = n & 1UL;
-                n &= ~1UL;
-                while (n) {
-                        unsigned long h, l;
-                        __get_user(l, ufdset);
-                        __get_user(h, ufdset+1);
-                        ufdset += 2;
-                        *fdset++ = h << 32 | l;
-                        n -= 2;
-                }
-                if (odd)
-                        __get_user(*fdset, ufdset);
-        } else {
-                /* Tricky, must clear full unsigned long in the
-                 * kernel fdset at the end, this makes sure that
-                 * actually happens.
-                 */
-                memset(fdset, 0, ((n + 1) & ~1)*sizeof(u32));
-        }
-        return 0;
-}
-static inline void
-set_fd_set32(unsigned long n, u32 *ufdset, unsigned long *fdset)
-{
-        unsigned long odd;
-        n = (n + 8*sizeof(u32) - 1) / (8*sizeof(u32));
-        if (!ufdset)
-                return;
-        odd = n & 1UL;
-        n &= ~1UL;
-        while (n) {
-                unsigned long h, l;
-                l = *fdset++;
-                h = l >> 32;
-                __put_user(l, ufdset);
-                __put_user(h, ufdset+1);
-                ufdset += 2;
-                n -= 2;
-        }
-        if (odd)
-                __put_user(*fdset, ufdset);
-}
 struct msgbuf32 {
    int mtype;
    char mtext[1];
diff --git a/arch/parisc/kernel/syscall_table.S b/arch/parisc/kernel/syscall_table.S
index 03b9a01bc16c..cf145eb026b3 100644
--- a/arch/parisc/kernel/syscall_table.S
+++ b/arch/parisc/kernel/syscall_table.S
@@ -413,6 +413,10 @@
        ENTRY_SAME(dup3)
        ENTRY_SAME(pipe2)
        ENTRY_SAME(inotify_init1)
+        ENTRY_COMP(preadv)              /* 315 */
+        ENTRY_COMP(pwritev)
+        ENTRY_COMP(rt_tgsigqueueinfo)
+        ENTRY_SAME(perf_counter_open)
        /* Nothing yet */
diff --git a/arch/parisc/kernel/time.c b/arch/parisc/kernel/time.c
index d4dd05674c62..a79c6f9e7e2c 100644
--- a/arch/parisc/kernel/time.c
+++ b/arch/parisc/kernel/time.c
@@ -56,9 +56,9 @@ static unsigned long clocktick __read_mostly;	/* timer cycles per tick */
 */
 irqreturn_t __irq_entry timer_interrupt(int irq, void *dev_id)
 {
-        unsigned long now;
+        unsigned long now, now2;
        unsigned long next_tick;
-        unsigned long cycles_elapsed, ticks_elapsed;
+        unsigned long cycles_elapsed, ticks_elapsed = 1;
        unsigned long cycles_remainder;
        unsigned int cpu = smp_processor_id();
        struct cpuinfo_parisc *cpuinfo = &per_cpu(cpu_data, cpu);
@@ -71,44 +71,24 @@ irqreturn_t __irq_entry timer_interrupt(int irq, void *dev_id)
        /* Initialize next_tick to the expected tick time. */
        next_tick = cpuinfo->it_value;
-        /* Get current interval timer.
+        /* Get current cycle counter (Control Register 16). */
-         * CR16 reads as 64 bits in CPU wide mode.
-         * CR16 reads as 32 bits in CPU narrow mode.
-         */
        now = mfctl(16);
        cycles_elapsed = now - next_tick;
-        if ((cycles_elapsed >> 5) < cpt) {
+        if ((cycles_elapsed >> 6) < cpt) {
                /* use "cheap" math (add/subtract) instead
                 * of the more expensive div/mul method
                 */
                cycles_remainder = cycles_elapsed;
-                ticks_elapsed = 1;
                while (cycles_remainder > cpt) {
                        cycles_remainder -= cpt;
                        ticks_elapsed++;
                }
        } else {
+                /* TODO: Reduce this to one fdiv op */
                cycles_remainder = cycles_elapsed % cpt;
-                ticks_elapsed = 1 + cycles_elapsed / cpt;
+                ticks_elapsed += cycles_elapsed / cpt;
-        }
-        /* Can we differentiate between "early CR16" (aka Scenario 1) and
-         * "long delay" (aka Scenario 3)? I don't think so.
-         *
-         * We expected timer_interrupt to be delivered at least a few hundred
-         * cycles after the IT fires. But it's arbitrary how much time passes
-         * before we call it "late". I've picked one second.
-         */
-        if (unlikely(ticks_elapsed > HZ)) {
-                /* Scenario 3: very long delay?  bad in any case */
-                printk (KERN_CRIT "timer_interrupt(CPU %d): delayed!"
-                        " cycles %lX rem %lX "
-                        " next/now %lX/%lX\n",
-                        cpu,
-                        cycles_elapsed, cycles_remainder,
-                        next_tick, now );
        }
        /* convert from "division remainder" to "remainder of clock tick" */
@@ -122,18 +102,56 @@ irqreturn_t __irq_entry timer_interrupt(int irq, void *dev_id)
        cpuinfo->it_value = next_tick;
-        /* Skip one clocktick on purpose if we are likely to miss next_tick.
+        /* Program the IT when to deliver the next interrupt.
-         * We want to avoid the new next_tick being less than CR16.
+         * Only bottom 32-bits of next_tick are writable in CR16!
-         * If that happened, itimer wouldn't fire until CR16 wrapped.
-         * We'll catch the tick we missed on the tick after that.
         */
-        if (!(cycles_remainder >> 13))
-                next_tick += cpt;
-        /* Program the IT when to deliver the next interrupt. */
-        /* Only bottom 32-bits of next_tick are written to cr16.  */
        mtctl(next_tick, 16);
+        /* Skip one clocktick on purpose if we missed next_tick.
+         * The new CR16 must be "later" than current CR16 otherwise
+         * itimer would not fire until CR16 wrapped - e.g 4 seconds
+         * later on a 1Ghz processor. We'll account for the missed
+         * tick on the next timer interrupt.
+         *
+         * "next_tick - now" will always give the difference regardless
+         * if one or the other wrapped. If "now" is "bigger" we'll end up
+         * with a very large unsigned number.
+         */
+        now2 = mfctl(16);
+        if (next_tick - now2 > cpt)
+                mtctl(next_tick+cpt, 16);
+#if 1
+/*
+ * GGG: DEBUG code for how many cycles programming CR16 used.
+ */
+        if (unlikely(now2 - now > 0x3000))      /* 12K cycles */
+                printk (KERN_CRIT "timer_interrupt(CPU %d): SLOW! 0x%lx cycles!"
+                        " cyc %lX rem %lX "
+                        " next/now %lX/%lX\n",
+                        cpu, now2 - now, cycles_elapsed, cycles_remainder,
+                        next_tick, now );
+#endif
+        /* Can we differentiate between "early CR16" (aka Scenario 1) and
+         * "long delay" (aka Scenario 3)? I don't think so.
+         *
+         * Timer_interrupt will be delivered at least a few hundred cycles
+         * after the IT fires. But it's arbitrary how much time passes
+         * before we call it "late". I've picked one second.
+         *
+         * It's important NO printk's are between reading CR16 and
+         * setting up the next value. May introduce huge variance.
+         */
+        if (unlikely(ticks_elapsed > HZ)) {
+                /* Scenario 3: very long delay?  bad in any case */
+                printk (KERN_CRIT "timer_interrupt(CPU %d): delayed!"
+                        " cycles %lX rem %lX "
+                        " next/now %lX/%lX\n",
+                        cpu,
+                        cycles_elapsed, cycles_remainder,
+                        next_tick, now );
+        }
        /* Done mucking with unreliable delivery of interrupts.
         * Go do system house keeping.
@@ -173,7 +191,7 @@ EXPORT_SYMBOL(profile_pc);
 /* clock source code */
-static cycle_t read_cr16(void)
+static cycle_t read_cr16(struct clocksource *cs)
 {
        return get_cycles();
 }
diff --git a/arch/parisc/lib/checksum.c b/arch/parisc/lib/checksum.c
index 462696d30d3b..ae66d31f9ecf 100644
--- a/arch/parisc/lib/checksum.c
+++ b/arch/parisc/lib/checksum.c
@@ -13,8 +13,6 @@
 *              modify it under the terms of the GNU General Public License
 *              as published by the Free Software Foundation; either version
 *              2 of the License, or (at your option) any later version.
- *
- * $Id: checksum.c,v 1.3 1997/12/01 17:57:34 ralf Exp $
 */
 #include <linux/module.h>
 #include <linux/types.h>
diff --git a/arch/parisc/lib/memcpy.c b/arch/parisc/lib/memcpy.c
index bbda909c866e..abf41f4632a9 100644
--- a/arch/parisc/lib/memcpy.c
+++ b/arch/parisc/lib/memcpy.c
@@ -405,7 +405,7 @@ byte_copy:
 unaligned_copy:
        /* possibly we are aligned on a word, but not on a double... */
-        if (likely(t1 & (sizeof(unsigned int)-1)) == 0) {
+        if (likely((t1 & (sizeof(unsigned int)-1)) == 0)) {
                t2 = src & (sizeof(unsigned int) - 1);
                if (unlikely(t2 != 0)) {
diff --git a/arch/parisc/math-emu/decode_exc.c b/arch/parisc/math-emu/decode_exc.c
index 66c8a9f6a27e..3ca1c6149218 100644
--- a/arch/parisc/math-emu/decode_exc.c
+++ b/arch/parisc/math-emu/decode_exc.c
@@ -40,7 +40,7 @@
 * END_DESC
 */
+#include <linux/kernel.h>
 #include "float.h"
 #include "sgl_float.h"
 #include "dbl_float.h"
diff --git a/arch/parisc/mm/fault.c b/arch/parisc/mm/fault.c
index bfb6dd6ab380..c6afbfc95770 100644
--- a/arch/parisc/mm/fault.c
+++ b/arch/parisc/mm/fault.c
@@ -1,5 +1,4 @@
-/* $Id: fault.c,v 1.5 2000/01/26 16:20:29 jsm Exp $
+/*
- *
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
diff --git a/arch/parisc/mm/init.c b/arch/parisc/mm/init.c
index 4356ceb1e366..b0831d9e35cb 100644
--- a/arch/parisc/mm/init.c
+++ b/arch/parisc/mm/init.c
@@ -370,34 +370,22 @@ static void __init setup_bootmem(void)
 void free_initmem(void)
 {
-        unsigned long addr, init_begin, init_end;
+        unsigned long addr;
+        unsigned long init_begin = (unsigned long)__init_begin;
-        printk(KERN_INFO "Freeing unused kernel memory: ");
+        unsigned long init_end = (unsigned long)__init_end;
 #ifdef CONFIG_DEBUG_KERNEL
        /* Attempt to catch anyone trying to execute code here
         * by filling the page with BRK insns.
-         * 
-         * If we disable interrupts for all CPUs, then IPI stops working.
-         * Kinda breaks the global cache flushing.
         */
-        local_irq_disable();
+        memset((void *)init_begin, 0x00, init_end - init_begin);
+        flush_icache_range(init_begin, init_end);
-        memset(__init_begin, 0x00,
-                (unsigned long)__init_end - (unsigned long)__init_begin);
-        flush_data_cache();
-        asm volatile("sync" : : );
-        flush_icache_range((unsigned long)__init_begin, (unsigned long)__init_end);
-        asm volatile("sync" : : );
-        local_irq_enable();
 #endif
        
        /* align __init_begin and __init_end to page size,
           ignoring linker script where we might have tried to save RAM */
-        init_begin = PAGE_ALIGN((unsigned long)(__init_begin));
+        init_begin = PAGE_ALIGN(init_begin);
-        init_end   = PAGE_ALIGN((unsigned long)(__init_end));
+        init_end = PAGE_ALIGN(init_end);
        for (addr = init_begin; addr < init_end; addr += PAGE_SIZE) {
                ClearPageReserved(virt_to_page(addr));
                init_page_count(virt_to_page(addr));
@@ -409,7 +397,8 @@ void free_initmem(void)
        /* set up a new led state on systems shipped LED State panel */
        pdc_chassis_send_status(PDC_CHASSIS_DIRECT_BCOMPLETE);
        
-        printk("%luk freed\n", (init_end - init_begin) >> 10);
+        printk(KERN_INFO "Freeing unused kernel memory: %luk freed\n",
+                (init_end - init_begin) >> 10);
 }
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index d1430ef6b4f9..738bdc6b0f8b 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -1913,25 +1913,26 @@ config DMAR_DEFAULT_ON
          recommended you say N here while the DMAR code remains
          experimental.
-config DMAR_GFX_WA
+config DMAR_BROKEN_GFX_WA
-        def_bool y
+        def_bool n
-        prompt "Support for Graphics workaround"
+        prompt "Workaround broken graphics drivers (going away soon)"
        depends on DMAR
        ---help---
          Current Graphics drivers tend to use physical address
          for DMA and avoid using DMA APIs. Setting this config
          option permits the IOMMU driver to set a unity map for
          all the OS-visible memory. Hence the driver can continue
-          to use physical addresses for DMA.
+          to use physical addresses for DMA, at least until this
+          option is removed in the 2.6.32 kernel.
 config DMAR_FLOPPY_WA
        def_bool y
        depends on DMAR
        ---help---
-          Floppy disk drivers are know to bypass DMA API calls
+          Floppy disk drivers are known to bypass DMA API calls
          thereby failing to work when IOMMU is enabled. This
          workaround will setup a 1:1 mapping for the first
-          16M to make floppy (an ISA device) work.
+          16MiB to make floppy (an ISA device) work.
 config INTR_REMAP
        bool "Support for Interrupt Remapping (EXPERIMENTAL)"
diff --git a/arch/x86/kernel/Makefile b/arch/x86/kernel/Makefile
index 6c327b852e23..430d5b24af7b 100644
--- a/arch/x86/kernel/Makefile
+++ b/arch/x86/kernel/Makefile
@@ -26,6 +26,8 @@ CFLAGS_tsc.o		:= $(nostackp)
 CFLAGS_paravirt.o       := $(nostackp)
 GCOV_PROFILE_vsyscall_64.o      := n
 GCOV_PROFILE_hpet.o             := n
+GCOV_PROFILE_tsc.o              := n
+GCOV_PROFILE_paravirt.o         := n
 obj-y                   := process_$(BITS).o signal.o entry_$(BITS).o
 obj-y                   += traps.o irq.o irq_$(BITS).o dumpstack_$(BITS).o
diff --git a/arch/x86/kernel/pci-dma.c b/arch/x86/kernel/pci-dma.c
index 47630479b067..1a041bcf506b 100644
--- a/arch/x86/kernel/pci-dma.c
+++ b/arch/x86/kernel/pci-dma.c
@@ -211,11 +211,11 @@ static __init int iommu_setup(char *p)
 #ifdef CONFIG_SWIOTLB
                if (!strncmp(p, "soft", 4))
                        swiotlb = 1;
+#endif
                if (!strncmp(p, "pt", 2)) {
                        iommu_pass_through = 1;
                        return 1;
                }
-#endif
                gart_parse_options(p);
diff --git a/arch/x86/pci/acpi.c b/arch/x86/pci/acpi.c
index b26626dc517c..1014eb4bfc37 100644
--- a/arch/x86/pci/acpi.c
+++ b/arch/x86/pci/acpi.c
@@ -68,6 +68,10 @@ setup_resource(struct acpi_resource *acpi_res, void *data)
        unsigned long flags;
        struct resource *root;
        int max_root_bus_resources = PCI_BUS_NUM_RESOURCES;
+        u64 start, end;
+        if (bus_has_transparent_bridge(info->bus))
+                max_root_bus_resources -= 3;
        status = resource_to_addr(acpi_res, &addr);
        if (!ACPI_SUCCESS(status))
@@ -84,25 +88,24 @@ setup_resource(struct acpi_resource *acpi_res, void *data)
        } else
                return AE_OK;
-        res = &info->res[info->res_num];
+        start = addr.minimum + addr.translation_offset;
-        res->name = info->name;
+        end = start + addr.address_length - 1;
-        res->flags = flags;
-        res->start = addr.minimum + addr.translation_offset;
-        res->end = res->start + addr.address_length - 1;
-        res->child = NULL;
-        if (bus_has_transparent_bridge(info->bus))
-                max_root_bus_resources -= 3;
        if (info->res_num >= max_root_bus_resources) {
                printk(KERN_WARNING "PCI: Failed to allocate 0x%lx-0x%lx "
                        "from %s for %s due to _CRS returning more than "
-                        "%d resource descriptors\n", (unsigned long) res->start,
+                        "%d resource descriptors\n", (unsigned long) start,
-                        (unsigned long) res->end, root->name, info->name,
+                        (unsigned long) end, root->name, info->name,
                        max_root_bus_resources);
-                info->res_num++;
                return AE_OK;
        }
+        res = &info->res[info->res_num];
+        res->name = info->name;
+        res->flags = flags;
+        res->start = start;
+        res->end = end;
+        res->child = NULL;
        if (insert_resource(root, res)) {
                printk(KERN_ERR "PCI: Failed to allocate 0x%lx-0x%lx "
                        "from %s for %s\n", (unsigned long) res->start,
@@ -115,23 +118,6 @@ setup_resource(struct acpi_resource *acpi_res, void *data)
 }
 static void
-adjust_transparent_bridge_resources(struct pci_bus *bus)
-{
-        struct pci_dev *dev;
-        list_for_each_entry(dev, &bus->devices, bus_list) {
-                int i;
-                u16 class = dev->class >> 8;
-                if (class == PCI_CLASS_BRIDGE_PCI && dev->transparent) {
-                        for(i = 3; i < PCI_BUS_NUM_RESOURCES; i++)
-                                dev->subordinate->resource[i] =
-                                                dev->bus->resource[i - 3];
-                }
-        }
-}
-static void
 get_current_resources(struct acpi_device *device, int busnum,
                        int domain, struct pci_bus *bus)
 {
@@ -158,8 +144,6 @@ get_current_resources(struct acpi_device *device, int busnum,
        info.res_num = 0;
        acpi_walk_resources(device->handle, METHOD_NAME__CRS, setup_resource,
                                &info);
-        if (info.res_num)
-                adjust_transparent_bridge_resources(bus);
        return;
@@ -222,8 +206,15 @@ struct pci_bus * __devinit pci_acpi_scan_root(struct acpi_device *device, int do
                 */
                memcpy(bus->sysdata, sd, sizeof(*sd));
                kfree(sd);
-        } else
+        } else {
-                bus = pci_scan_bus_parented(NULL, busnum, &pci_root_ops, sd);
+                bus = pci_create_bus(NULL, busnum, &pci_root_ops, sd);
+                if (bus) {
+                        if (pci_probe & PCI_USE__CRS)
+                                get_current_resources(device, busnum, domain,
+                                                        bus);
+                        bus->subordinate = pci_scan_child_bus(bus);
+                }
+        }
        if (!bus)
                kfree(sd);
@@ -238,8 +229,6 @@ struct pci_bus * __devinit pci_acpi_scan_root(struct acpi_device *device, int do
 #endif
        }
-        if (bus && (pci_probe & PCI_USE__CRS))
-                get_current_resources(device, busnum, domain, bus);
        return bus;
 }
diff --git a/arch/x86/pci/amd_bus.c b/arch/x86/pci/amd_bus.c
index f893d6a6e803..3ffa10df20b9 100644
--- a/arch/x86/pci/amd_bus.c
+++ b/arch/x86/pci/amd_bus.c
@@ -100,8 +100,9 @@ void x86_pci_root_bus_res_quirks(struct pci_bus *b)
        int j;
        struct pci_root_info *info;
-        /* don't go for it if _CRS is used */
+        /* don't go for it if _CRS is used already */
-        if (pci_probe & PCI_USE__CRS)
+        if (b->resource[0] != &ioport_resource ||
+            b->resource[1] != &iomem_resource)
                return;
        /* if only one root bus, don't need to anything */
@@ -116,6 +117,9 @@ void x86_pci_root_bus_res_quirks(struct pci_bus *b)
        if (i == pci_root_num)
                return;
+        printk(KERN_DEBUG "PCI: peer root bus %02x res updated from pci conf\n",
+                        b->number);
        info = &pci_root_info[i];
        for (j = 0; j < info->res_num; j++) {
                struct resource *res;
author	Paul Mundt <lethal@linux-sh.org>	2009-07-06 22:55:05 -0400
committer	Paul Mundt <lethal@linux-sh.org>	2009-07-06 22:55:05 -0400
commit	2b5c0c72ea404d6b554a8284031dd78748314b9e (patch)
tree	468b7f3d8db0abe6a09ee221dce1de5de2bb8d12 /arch
parent	2dbc8a23cc2e677422f6dea991aca4e3d31ab65f (diff)
parent	dc53fffc105f68cb08ca872acd51550e89aa2e67 (diff)