diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2009-06-15 12:32:52 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2009-06-15 12:32:52 -0400 |
commit | 0fa213310cd8fa7a51071cdcf130e26fa56e9549 (patch) | |
tree | 2a7e5cc33c8938ec82604a99c3797a3132fd91ec /arch | |
parent | d3bf80bff13597004b5724ee4549cd68eb0badf0 (diff) | |
parent | bc47ab0241c7c86da4f5e5f82fbca7d45387c18d (diff) |
Merge branch 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc
* 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc: (103 commits)
powerpc: Fix bug in move of altivec code to vector.S
powerpc: Add support for swiotlb on 32-bit
powerpc/spufs: Remove unused error path
powerpc: Fix warning when printing a resource_size_t
powerpc/xmon: Remove unused variable in xmon.c
powerpc/pseries: Fix warnings when printing resource_size_t
powerpc: Shield code specific to 64-bit server processors
powerpc: Separate PACA fields for server CPUs
powerpc: Split exception handling out of head_64.S
powerpc: Introduce CONFIG_PPC_BOOK3S
powerpc: Move VMX and VSX asm code to vector.S
powerpc: Set init_bootmem_done on NUMA platforms as well
powerpc/mm: Fix a AB->BA deadlock scenario with nohash MMU context lock
powerpc/mm: Fix some SMP issues with MMU context handling
powerpc: Add PTRACE_SINGLEBLOCK support
fbdev: Add PLB support and cleanup DCR in xilinxfb driver.
powerpc/virtex: Add ml510 reference design device tree
powerpc/virtex: Add Xilinx ML510 reference design support
powerpc/virtex: refactor intc driver and add support for i8259 cascading
powerpc/virtex: Add support for Xilinx PCI host bridge
...
Diffstat (limited to 'arch')
177 files changed, 5861 insertions, 2198 deletions
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig index cdc9a6ff4be8..93a61898b259 100644 --- a/arch/powerpc/Kconfig +++ b/arch/powerpc/Kconfig | |||
@@ -42,6 +42,10 @@ config GENERIC_HARDIRQS | |||
42 | bool | 42 | bool |
43 | default y | 43 | default y |
44 | 44 | ||
45 | config GENERIC_HARDIRQS_NO__DO_IRQ | ||
46 | bool | ||
47 | default y | ||
48 | |||
45 | config HAVE_SETUP_PER_CPU_AREA | 49 | config HAVE_SETUP_PER_CPU_AREA |
46 | def_bool PPC64 | 50 | def_bool PPC64 |
47 | 51 | ||
@@ -296,9 +300,19 @@ config IOMMU_VMERGE | |||
296 | config IOMMU_HELPER | 300 | config IOMMU_HELPER |
297 | def_bool PPC64 | 301 | def_bool PPC64 |
298 | 302 | ||
303 | config SWIOTLB | ||
304 | bool "SWIOTLB support" | ||
305 | default n | ||
306 | select IOMMU_HELPER | ||
307 | ---help--- | ||
308 | Support for IO bounce buffering for systems without an IOMMU. | ||
309 | This allows us to DMA to the full physical address space on | ||
310 | platforms where the size of a physical address is larger | ||
311 | than the bus address. Not all platforms support this. | ||
312 | |||
299 | config PPC_NEED_DMA_SYNC_OPS | 313 | config PPC_NEED_DMA_SYNC_OPS |
300 | def_bool y | 314 | def_bool y |
301 | depends on NOT_COHERENT_CACHE | 315 | depends on (NOT_COHERENT_CACHE || SWIOTLB) |
302 | 316 | ||
303 | config HOTPLUG_CPU | 317 | config HOTPLUG_CPU |
304 | bool "Support for enabling/disabling CPUs" | 318 | bool "Support for enabling/disabling CPUs" |
diff --git a/arch/powerpc/Kconfig.debug b/arch/powerpc/Kconfig.debug index a1098e23221f..d79a902d155a 100644 --- a/arch/powerpc/Kconfig.debug +++ b/arch/powerpc/Kconfig.debug | |||
@@ -41,6 +41,19 @@ config HCALL_STATS | |||
41 | This option will add a small amount of overhead to all hypervisor | 41 | This option will add a small amount of overhead to all hypervisor |
42 | calls. | 42 | calls. |
43 | 43 | ||
44 | config PPC_EMULATED_STATS | ||
45 | bool "Emulated instructions tracking" | ||
46 | depends on DEBUG_FS | ||
47 | help | ||
48 | Adds code to keep track of the number of instructions that are | ||
49 | emulated by the in-kernel emulator. Counters for the various classes | ||
50 | of emulated instructions are available under | ||
51 | powerpc/emulated_instructions/ in the root of the debugfs file | ||
52 | system. Optionally (controlled by | ||
53 | powerpc/emulated_instructions/do_warn in debugfs), rate-limited | ||
54 | warnings can be printed to the console when instructions are | ||
55 | emulated. | ||
56 | |||
44 | config CODE_PATCHING_SELFTEST | 57 | config CODE_PATCHING_SELFTEST |
45 | bool "Run self-tests of the code-patching code." | 58 | bool "Run self-tests of the code-patching code." |
46 | depends on DEBUG_KERNEL | 59 | depends on DEBUG_KERNEL |
diff --git a/arch/powerpc/Makefile b/arch/powerpc/Makefile index 551fc58c05cf..bc35f4e2b81c 100644 --- a/arch/powerpc/Makefile +++ b/arch/powerpc/Makefile | |||
@@ -142,6 +142,7 @@ head-$(CONFIG_FSL_BOOKE) := arch/powerpc/kernel/head_fsl_booke.o | |||
142 | 142 | ||
143 | head-$(CONFIG_PPC64) += arch/powerpc/kernel/entry_64.o | 143 | head-$(CONFIG_PPC64) += arch/powerpc/kernel/entry_64.o |
144 | head-$(CONFIG_PPC_FPU) += arch/powerpc/kernel/fpu.o | 144 | head-$(CONFIG_PPC_FPU) += arch/powerpc/kernel/fpu.o |
145 | head-$(CONFIG_ALTIVEC) += arch/powerpc/kernel/vector.o | ||
145 | 146 | ||
146 | core-y += arch/powerpc/kernel/ \ | 147 | core-y += arch/powerpc/kernel/ \ |
147 | arch/powerpc/mm/ \ | 148 | arch/powerpc/mm/ \ |
diff --git a/arch/powerpc/boot/dts/gef_ppc9a.dts b/arch/powerpc/boot/dts/gef_ppc9a.dts index 53a7a6255909..910944edd886 100644 --- a/arch/powerpc/boot/dts/gef_ppc9a.dts +++ b/arch/powerpc/boot/dts/gef_ppc9a.dts | |||
@@ -164,9 +164,21 @@ | |||
164 | device_type = "soc"; | 164 | device_type = "soc"; |
165 | compatible = "fsl,mpc8641-soc", "simple-bus"; | 165 | compatible = "fsl,mpc8641-soc", "simple-bus"; |
166 | ranges = <0x0 0xfef00000 0x00100000>; | 166 | ranges = <0x0 0xfef00000 0x00100000>; |
167 | reg = <0xfef00000 0x100000>; // CCSRBAR 1M | ||
168 | bus-frequency = <33333333>; | 167 | bus-frequency = <33333333>; |
169 | 168 | ||
169 | mcm-law@0 { | ||
170 | compatible = "fsl,mcm-law"; | ||
171 | reg = <0x0 0x1000>; | ||
172 | fsl,num-laws = <10>; | ||
173 | }; | ||
174 | |||
175 | mcm@1000 { | ||
176 | compatible = "fsl,mpc8641-mcm", "fsl,mcm"; | ||
177 | reg = <0x1000 0x1000>; | ||
178 | interrupts = <17 2>; | ||
179 | interrupt-parent = <&mpic>; | ||
180 | }; | ||
181 | |||
170 | i2c1: i2c@3000 { | 182 | i2c1: i2c@3000 { |
171 | #address-cells = <1>; | 183 | #address-cells = <1>; |
172 | #size-cells = <0>; | 184 | #size-cells = <0>; |
diff --git a/arch/powerpc/boot/dts/gef_sbc310.dts b/arch/powerpc/boot/dts/gef_sbc310.dts index 1569117e5ddc..0f4c9ec2c3a6 100644 --- a/arch/powerpc/boot/dts/gef_sbc310.dts +++ b/arch/powerpc/boot/dts/gef_sbc310.dts | |||
@@ -163,9 +163,21 @@ | |||
163 | device_type = "soc"; | 163 | device_type = "soc"; |
164 | compatible = "simple-bus"; | 164 | compatible = "simple-bus"; |
165 | ranges = <0x0 0xfef00000 0x00100000>; | 165 | ranges = <0x0 0xfef00000 0x00100000>; |
166 | reg = <0xfef00000 0x100000>; // CCSRBAR 1M | ||
167 | bus-frequency = <33333333>; | 166 | bus-frequency = <33333333>; |
168 | 167 | ||
168 | mcm-law@0 { | ||
169 | compatible = "fsl,mcm-law"; | ||
170 | reg = <0x0 0x1000>; | ||
171 | fsl,num-laws = <10>; | ||
172 | }; | ||
173 | |||
174 | mcm@1000 { | ||
175 | compatible = "fsl,mpc8641-mcm", "fsl,mcm"; | ||
176 | reg = <0x1000 0x1000>; | ||
177 | interrupts = <17 2>; | ||
178 | interrupt-parent = <&mpic>; | ||
179 | }; | ||
180 | |||
169 | i2c1: i2c@3000 { | 181 | i2c1: i2c@3000 { |
170 | #address-cells = <1>; | 182 | #address-cells = <1>; |
171 | #size-cells = <0>; | 183 | #size-cells = <0>; |
diff --git a/arch/powerpc/boot/dts/gef_sbc610.dts b/arch/powerpc/boot/dts/gef_sbc610.dts index 6582dbd36da7..217f8aa66725 100644 --- a/arch/powerpc/boot/dts/gef_sbc610.dts +++ b/arch/powerpc/boot/dts/gef_sbc610.dts | |||
@@ -128,9 +128,21 @@ | |||
128 | device_type = "soc"; | 128 | device_type = "soc"; |
129 | compatible = "simple-bus"; | 129 | compatible = "simple-bus"; |
130 | ranges = <0x0 0xfef00000 0x00100000>; | 130 | ranges = <0x0 0xfef00000 0x00100000>; |
131 | reg = <0xfef00000 0x100000>; // CCSRBAR 1M | ||
132 | bus-frequency = <33333333>; | 131 | bus-frequency = <33333333>; |
133 | 132 | ||
133 | mcm-law@0 { | ||
134 | compatible = "fsl,mcm-law"; | ||
135 | reg = <0x0 0x1000>; | ||
136 | fsl,num-laws = <10>; | ||
137 | }; | ||
138 | |||
139 | mcm@1000 { | ||
140 | compatible = "fsl,mpc8641-mcm", "fsl,mcm"; | ||
141 | reg = <0x1000 0x1000>; | ||
142 | interrupts = <17 2>; | ||
143 | interrupt-parent = <&mpic>; | ||
144 | }; | ||
145 | |||
134 | i2c1: i2c@3000 { | 146 | i2c1: i2c@3000 { |
135 | #address-cells = <1>; | 147 | #address-cells = <1>; |
136 | #size-cells = <0>; | 148 | #size-cells = <0>; |
diff --git a/arch/powerpc/boot/dts/ksi8560.dts b/arch/powerpc/boot/dts/ksi8560.dts index c9cfd374bffb..bdb7fc0fa332 100644 --- a/arch/powerpc/boot/dts/ksi8560.dts +++ b/arch/powerpc/boot/dts/ksi8560.dts | |||
@@ -56,6 +56,19 @@ | |||
56 | ranges = <0x00000000 0xfdf00000 0x00100000>; | 56 | ranges = <0x00000000 0xfdf00000 0x00100000>; |
57 | bus-frequency = <0>; /* Fixed by bootwrapper */ | 57 | bus-frequency = <0>; /* Fixed by bootwrapper */ |
58 | 58 | ||
59 | ecm-law@0 { | ||
60 | compatible = "fsl,ecm-law"; | ||
61 | reg = <0x0 0x1000>; | ||
62 | fsl,num-laws = <8>; | ||
63 | }; | ||
64 | |||
65 | ecm@1000 { | ||
66 | compatible = "fsl,mpc8560-ecm", "fsl,ecm"; | ||
67 | reg = <0x1000 0x1000>; | ||
68 | interrupts = <17 2>; | ||
69 | interrupt-parent = <&mpic>; | ||
70 | }; | ||
71 | |||
59 | memory-controller@2000 { | 72 | memory-controller@2000 { |
60 | compatible = "fsl,mpc8540-memory-controller"; | 73 | compatible = "fsl,mpc8540-memory-controller"; |
61 | reg = <0x2000 0x1000>; | 74 | reg = <0x2000 0x1000>; |
diff --git a/arch/powerpc/boot/dts/mpc832x_mds.dts b/arch/powerpc/boot/dts/mpc832x_mds.dts index 57c595bf1071..436c9c671dd9 100644 --- a/arch/powerpc/boot/dts/mpc832x_mds.dts +++ b/arch/powerpc/boot/dts/mpc832x_mds.dts | |||
@@ -249,6 +249,8 @@ | |||
249 | reg = <0xe0100000 0x480>; | 249 | reg = <0xe0100000 0x480>; |
250 | brg-frequency = <0>; | 250 | brg-frequency = <0>; |
251 | bus-frequency = <198000000>; | 251 | bus-frequency = <198000000>; |
252 | fsl,qe-num-riscs = <1>; | ||
253 | fsl,qe-num-snums = <28>; | ||
252 | 254 | ||
253 | muram@10000 { | 255 | muram@10000 { |
254 | #address-cells = <1>; | 256 | #address-cells = <1>; |
@@ -369,7 +371,6 @@ | |||
369 | }; | 371 | }; |
370 | 372 | ||
371 | pci0: pci@e0008500 { | 373 | pci0: pci@e0008500 { |
372 | cell-index = <1>; | ||
373 | interrupt-map-mask = <0xf800 0x0 0x0 0x7>; | 374 | interrupt-map-mask = <0xf800 0x0 0x0 0x7>; |
374 | interrupt-map = < | 375 | interrupt-map = < |
375 | /* IDSEL 0x11 AD17 */ | 376 | /* IDSEL 0x11 AD17 */ |
diff --git a/arch/powerpc/boot/dts/mpc832x_rdb.dts b/arch/powerpc/boot/dts/mpc832x_rdb.dts index 4319bd70a580..9a0952f74b81 100644 --- a/arch/powerpc/boot/dts/mpc832x_rdb.dts +++ b/arch/powerpc/boot/dts/mpc832x_rdb.dts | |||
@@ -221,6 +221,8 @@ | |||
221 | reg = <0xe0100000 0x480>; | 221 | reg = <0xe0100000 0x480>; |
222 | brg-frequency = <0>; | 222 | brg-frequency = <0>; |
223 | bus-frequency = <198000000>; | 223 | bus-frequency = <198000000>; |
224 | fsl,qe-num-riscs = <1>; | ||
225 | fsl,qe-num-snums = <28>; | ||
224 | 226 | ||
225 | muram@10000 { | 227 | muram@10000 { |
226 | #address-cells = <1>; | 228 | #address-cells = <1>; |
@@ -327,7 +329,6 @@ | |||
327 | }; | 329 | }; |
328 | 330 | ||
329 | pci0: pci@e0008500 { | 331 | pci0: pci@e0008500 { |
330 | cell-index = <1>; | ||
331 | interrupt-map-mask = <0xf800 0x0 0x0 0x7>; | 332 | interrupt-map-mask = <0xf800 0x0 0x0 0x7>; |
332 | interrupt-map = < | 333 | interrupt-map = < |
333 | /* IDSEL 0x10 AD16 (USB) */ | 334 | /* IDSEL 0x10 AD16 (USB) */ |
diff --git a/arch/powerpc/boot/dts/mpc8349emitx.dts b/arch/powerpc/boot/dts/mpc8349emitx.dts index 1ae38f0ddef8..e3eeaeda9187 100644 --- a/arch/powerpc/boot/dts/mpc8349emitx.dts +++ b/arch/powerpc/boot/dts/mpc8349emitx.dts | |||
@@ -278,7 +278,6 @@ | |||
278 | }; | 278 | }; |
279 | 279 | ||
280 | pci0: pci@e0008500 { | 280 | pci0: pci@e0008500 { |
281 | cell-index = <1>; | ||
282 | interrupt-map-mask = <0xf800 0x0 0x0 0x7>; | 281 | interrupt-map-mask = <0xf800 0x0 0x0 0x7>; |
283 | interrupt-map = < | 282 | interrupt-map = < |
284 | /* IDSEL 0x10 - SATA */ | 283 | /* IDSEL 0x10 - SATA */ |
@@ -301,7 +300,6 @@ | |||
301 | }; | 300 | }; |
302 | 301 | ||
303 | pci1: pci@e0008600 { | 302 | pci1: pci@e0008600 { |
304 | cell-index = <2>; | ||
305 | interrupt-map-mask = <0xf800 0x0 0x0 0x7>; | 303 | interrupt-map-mask = <0xf800 0x0 0x0 0x7>; |
306 | interrupt-map = < | 304 | interrupt-map = < |
307 | /* IDSEL 0x0E - MiniPCI Slot */ | 305 | /* IDSEL 0x0E - MiniPCI Slot */ |
diff --git a/arch/powerpc/boot/dts/mpc8349emitxgp.dts b/arch/powerpc/boot/dts/mpc8349emitxgp.dts index 662abe1fb804..eb732115f016 100644 --- a/arch/powerpc/boot/dts/mpc8349emitxgp.dts +++ b/arch/powerpc/boot/dts/mpc8349emitxgp.dts | |||
@@ -227,7 +227,6 @@ | |||
227 | }; | 227 | }; |
228 | 228 | ||
229 | pci0: pci@e0008600 { | 229 | pci0: pci@e0008600 { |
230 | cell-index = <2>; | ||
231 | interrupt-map-mask = <0xf800 0x0 0x0 0x7>; | 230 | interrupt-map-mask = <0xf800 0x0 0x0 0x7>; |
232 | interrupt-map = < | 231 | interrupt-map = < |
233 | /* IDSEL 0x0F - PCI Slot */ | 232 | /* IDSEL 0x0F - PCI Slot */ |
diff --git a/arch/powerpc/boot/dts/mpc834x_mds.dts b/arch/powerpc/boot/dts/mpc834x_mds.dts index d9f0a2325fa4..a2553a6f9009 100644 --- a/arch/powerpc/boot/dts/mpc834x_mds.dts +++ b/arch/powerpc/boot/dts/mpc834x_mds.dts | |||
@@ -286,7 +286,6 @@ | |||
286 | }; | 286 | }; |
287 | 287 | ||
288 | pci0: pci@e0008500 { | 288 | pci0: pci@e0008500 { |
289 | cell-index = <1>; | ||
290 | interrupt-map-mask = <0xf800 0x0 0x0 0x7>; | 289 | interrupt-map-mask = <0xf800 0x0 0x0 0x7>; |
291 | interrupt-map = < | 290 | interrupt-map = < |
292 | 291 | ||
@@ -348,7 +347,6 @@ | |||
348 | }; | 347 | }; |
349 | 348 | ||
350 | pci1: pci@e0008600 { | 349 | pci1: pci@e0008600 { |
351 | cell-index = <2>; | ||
352 | interrupt-map-mask = <0xf800 0x0 0x0 0x7>; | 350 | interrupt-map-mask = <0xf800 0x0 0x0 0x7>; |
353 | interrupt-map = < | 351 | interrupt-map = < |
354 | 352 | ||
diff --git a/arch/powerpc/boot/dts/mpc836x_mds.dts b/arch/powerpc/boot/dts/mpc836x_mds.dts index 6e34f170fa62..39ff4c829caf 100644 --- a/arch/powerpc/boot/dts/mpc836x_mds.dts +++ b/arch/powerpc/boot/dts/mpc836x_mds.dts | |||
@@ -289,6 +289,8 @@ | |||
289 | reg = <0xe0100000 0x480>; | 289 | reg = <0xe0100000 0x480>; |
290 | brg-frequency = <0>; | 290 | brg-frequency = <0>; |
291 | bus-frequency = <396000000>; | 291 | bus-frequency = <396000000>; |
292 | fsl,qe-num-riscs = <2>; | ||
293 | fsl,qe-num-snums = <28>; | ||
292 | 294 | ||
293 | muram@10000 { | 295 | muram@10000 { |
294 | #address-cells = <1>; | 296 | #address-cells = <1>; |
@@ -410,7 +412,6 @@ | |||
410 | }; | 412 | }; |
411 | 413 | ||
412 | pci0: pci@e0008500 { | 414 | pci0: pci@e0008500 { |
413 | cell-index = <1>; | ||
414 | interrupt-map-mask = <0xf800 0x0 0x0 0x7>; | 415 | interrupt-map-mask = <0xf800 0x0 0x0 0x7>; |
415 | interrupt-map = < | 416 | interrupt-map = < |
416 | 417 | ||
diff --git a/arch/powerpc/boot/dts/mpc836x_rdk.dts b/arch/powerpc/boot/dts/mpc836x_rdk.dts index 37b789510d68..6315d6fcc58a 100644 --- a/arch/powerpc/boot/dts/mpc836x_rdk.dts +++ b/arch/powerpc/boot/dts/mpc836x_rdk.dts | |||
@@ -198,6 +198,8 @@ | |||
198 | clock-frequency = <0>; | 198 | clock-frequency = <0>; |
199 | bus-frequency = <0>; | 199 | bus-frequency = <0>; |
200 | brg-frequency = <0>; | 200 | brg-frequency = <0>; |
201 | fsl,qe-num-riscs = <2>; | ||
202 | fsl,qe-num-snums = <28>; | ||
201 | 203 | ||
202 | muram@10000 { | 204 | muram@10000 { |
203 | #address-cells = <1>; | 205 | #address-cells = <1>; |
diff --git a/arch/powerpc/boot/dts/mpc8377_mds.dts b/arch/powerpc/boot/dts/mpc8377_mds.dts index 963708017e6c..67bb372c9451 100644 --- a/arch/powerpc/boot/dts/mpc8377_mds.dts +++ b/arch/powerpc/boot/dts/mpc8377_mds.dts | |||
@@ -383,7 +383,6 @@ | |||
383 | }; | 383 | }; |
384 | 384 | ||
385 | pci0: pci@e0008500 { | 385 | pci0: pci@e0008500 { |
386 | cell-index = <0>; | ||
387 | interrupt-map-mask = <0xf800 0x0 0x0 0x7>; | 386 | interrupt-map-mask = <0xf800 0x0 0x0 0x7>; |
388 | interrupt-map = < | 387 | interrupt-map = < |
389 | 388 | ||
diff --git a/arch/powerpc/boot/dts/mpc8378_mds.dts b/arch/powerpc/boot/dts/mpc8378_mds.dts index 651ff2f9db2d..a955a577db81 100644 --- a/arch/powerpc/boot/dts/mpc8378_mds.dts +++ b/arch/powerpc/boot/dts/mpc8378_mds.dts | |||
@@ -367,7 +367,6 @@ | |||
367 | }; | 367 | }; |
368 | 368 | ||
369 | pci0: pci@e0008500 { | 369 | pci0: pci@e0008500 { |
370 | cell-index = <0>; | ||
371 | interrupt-map-mask = <0xf800 0x0 0x0 0x7>; | 370 | interrupt-map-mask = <0xf800 0x0 0x0 0x7>; |
372 | interrupt-map = < | 371 | interrupt-map = < |
373 | 372 | ||
diff --git a/arch/powerpc/boot/dts/mpc8379_mds.dts b/arch/powerpc/boot/dts/mpc8379_mds.dts index d6f208b8297a..d266ddbfc28d 100644 --- a/arch/powerpc/boot/dts/mpc8379_mds.dts +++ b/arch/powerpc/boot/dts/mpc8379_mds.dts | |||
@@ -397,7 +397,6 @@ | |||
397 | }; | 397 | }; |
398 | 398 | ||
399 | pci0: pci@e0008500 { | 399 | pci0: pci@e0008500 { |
400 | cell-index = <0>; | ||
401 | interrupt-map-mask = <0xf800 0x0 0x0 0x7>; | 400 | interrupt-map-mask = <0xf800 0x0 0x0 0x7>; |
402 | interrupt-map = < | 401 | interrupt-map = < |
403 | 402 | ||
diff --git a/arch/powerpc/boot/dts/mpc8536ds.dts b/arch/powerpc/boot/dts/mpc8536ds.dts index b31c5041350b..e781ad2f1f8a 100644 --- a/arch/powerpc/boot/dts/mpc8536ds.dts +++ b/arch/powerpc/boot/dts/mpc8536ds.dts | |||
@@ -51,9 +51,21 @@ | |||
51 | device_type = "soc"; | 51 | device_type = "soc"; |
52 | compatible = "simple-bus"; | 52 | compatible = "simple-bus"; |
53 | ranges = <0x0 0xffe00000 0x100000>; | 53 | ranges = <0x0 0xffe00000 0x100000>; |
54 | reg = <0xffe00000 0x1000>; | ||
55 | bus-frequency = <0>; // Filled out by uboot. | 54 | bus-frequency = <0>; // Filled out by uboot. |
56 | 55 | ||
56 | ecm-law@0 { | ||
57 | compatible = "fsl,ecm-law"; | ||
58 | reg = <0x0 0x1000>; | ||
59 | fsl,num-laws = <12>; | ||
60 | }; | ||
61 | |||
62 | ecm@1000 { | ||
63 | compatible = "fsl,mpc8536-ecm", "fsl,ecm"; | ||
64 | reg = <0x1000 0x1000>; | ||
65 | interrupts = <17 2>; | ||
66 | interrupt-parent = <&mpic>; | ||
67 | }; | ||
68 | |||
57 | memory-controller@2000 { | 69 | memory-controller@2000 { |
58 | compatible = "fsl,mpc8536-memory-controller"; | 70 | compatible = "fsl,mpc8536-memory-controller"; |
59 | reg = <0x2000 0x1000>; | 71 | reg = <0x2000 0x1000>; |
@@ -321,7 +333,6 @@ | |||
321 | }; | 333 | }; |
322 | 334 | ||
323 | pci0: pci@ffe08000 { | 335 | pci0: pci@ffe08000 { |
324 | cell-index = <0>; | ||
325 | compatible = "fsl,mpc8540-pci"; | 336 | compatible = "fsl,mpc8540-pci"; |
326 | device_type = "pci"; | 337 | device_type = "pci"; |
327 | interrupt-map-mask = <0xf800 0x0 0x0 0x7>; | 338 | interrupt-map-mask = <0xf800 0x0 0x0 0x7>; |
@@ -346,7 +357,6 @@ | |||
346 | }; | 357 | }; |
347 | 358 | ||
348 | pci1: pcie@ffe09000 { | 359 | pci1: pcie@ffe09000 { |
349 | cell-index = <1>; | ||
350 | compatible = "fsl,mpc8548-pcie"; | 360 | compatible = "fsl,mpc8548-pcie"; |
351 | device_type = "pci"; | 361 | device_type = "pci"; |
352 | #interrupt-cells = <1>; | 362 | #interrupt-cells = <1>; |
@@ -383,7 +393,6 @@ | |||
383 | }; | 393 | }; |
384 | 394 | ||
385 | pci2: pcie@ffe0a000 { | 395 | pci2: pcie@ffe0a000 { |
386 | cell-index = <2>; | ||
387 | compatible = "fsl,mpc8548-pcie"; | 396 | compatible = "fsl,mpc8548-pcie"; |
388 | device_type = "pci"; | 397 | device_type = "pci"; |
389 | #interrupt-cells = <1>; | 398 | #interrupt-cells = <1>; |
@@ -420,7 +429,6 @@ | |||
420 | }; | 429 | }; |
421 | 430 | ||
422 | pci3: pcie@ffe0b000 { | 431 | pci3: pcie@ffe0b000 { |
423 | cell-index = <3>; | ||
424 | compatible = "fsl,mpc8548-pcie"; | 432 | compatible = "fsl,mpc8548-pcie"; |
425 | device_type = "pci"; | 433 | device_type = "pci"; |
426 | #interrupt-cells = <1>; | 434 | #interrupt-cells = <1>; |
diff --git a/arch/powerpc/boot/dts/mpc8540ads.dts b/arch/powerpc/boot/dts/mpc8540ads.dts index ddd67be10b03..9dc292962a9a 100644 --- a/arch/powerpc/boot/dts/mpc8540ads.dts +++ b/arch/powerpc/boot/dts/mpc8540ads.dts | |||
@@ -55,9 +55,21 @@ | |||
55 | device_type = "soc"; | 55 | device_type = "soc"; |
56 | compatible = "simple-bus"; | 56 | compatible = "simple-bus"; |
57 | ranges = <0x0 0xe0000000 0x100000>; | 57 | ranges = <0x0 0xe0000000 0x100000>; |
58 | reg = <0xe0000000 0x100000>; // CCSRBAR 1M | ||
59 | bus-frequency = <0>; | 58 | bus-frequency = <0>; |
60 | 59 | ||
60 | ecm-law@0 { | ||
61 | compatible = "fsl,ecm-law"; | ||
62 | reg = <0x0 0x1000>; | ||
63 | fsl,num-laws = <8>; | ||
64 | }; | ||
65 | |||
66 | ecm@1000 { | ||
67 | compatible = "fsl,mpc8540-ecm", "fsl,ecm"; | ||
68 | reg = <0x1000 0x1000>; | ||
69 | interrupts = <17 2>; | ||
70 | interrupt-parent = <&mpic>; | ||
71 | }; | ||
72 | |||
61 | memory-controller@2000 { | 73 | memory-controller@2000 { |
62 | compatible = "fsl,8540-memory-controller"; | 74 | compatible = "fsl,8540-memory-controller"; |
63 | reg = <0x2000 0x1000>; | 75 | reg = <0x2000 0x1000>; |
@@ -258,7 +270,6 @@ | |||
258 | }; | 270 | }; |
259 | 271 | ||
260 | pci0: pci@e0008000 { | 272 | pci0: pci@e0008000 { |
261 | cell-index = <0>; | ||
262 | interrupt-map-mask = <0xf800 0x0 0x0 0x7>; | 273 | interrupt-map-mask = <0xf800 0x0 0x0 0x7>; |
263 | interrupt-map = < | 274 | interrupt-map = < |
264 | 275 | ||
diff --git a/arch/powerpc/boot/dts/mpc8541cds.dts b/arch/powerpc/boot/dts/mpc8541cds.dts index e45097f44fbd..9a3ad311aedf 100644 --- a/arch/powerpc/boot/dts/mpc8541cds.dts +++ b/arch/powerpc/boot/dts/mpc8541cds.dts | |||
@@ -55,9 +55,21 @@ | |||
55 | device_type = "soc"; | 55 | device_type = "soc"; |
56 | compatible = "simple-bus"; | 56 | compatible = "simple-bus"; |
57 | ranges = <0x0 0xe0000000 0x100000>; | 57 | ranges = <0x0 0xe0000000 0x100000>; |
58 | reg = <0xe0000000 0x1000>; // CCSRBAR 1M | ||
59 | bus-frequency = <0>; | 58 | bus-frequency = <0>; |
60 | 59 | ||
60 | ecm-law@0 { | ||
61 | compatible = "fsl,ecm-law"; | ||
62 | reg = <0x0 0x1000>; | ||
63 | fsl,num-laws = <8>; | ||
64 | }; | ||
65 | |||
66 | ecm@1000 { | ||
67 | compatible = "fsl,mpc8541-ecm", "fsl,ecm"; | ||
68 | reg = <0x1000 0x1000>; | ||
69 | interrupts = <17 2>; | ||
70 | interrupt-parent = <&mpic>; | ||
71 | }; | ||
72 | |||
61 | memory-controller@2000 { | 73 | memory-controller@2000 { |
62 | compatible = "fsl,8541-memory-controller"; | 74 | compatible = "fsl,8541-memory-controller"; |
63 | reg = <0x2000 0x1000>; | 75 | reg = <0x2000 0x1000>; |
@@ -272,7 +284,6 @@ | |||
272 | }; | 284 | }; |
273 | 285 | ||
274 | pci0: pci@e0008000 { | 286 | pci0: pci@e0008000 { |
275 | cell-index = <0>; | ||
276 | interrupt-map-mask = <0x1f800 0x0 0x0 0x7>; | 287 | interrupt-map-mask = <0x1f800 0x0 0x0 0x7>; |
277 | interrupt-map = < | 288 | interrupt-map = < |
278 | 289 | ||
@@ -344,7 +355,6 @@ | |||
344 | }; | 355 | }; |
345 | 356 | ||
346 | pci1: pci@e0009000 { | 357 | pci1: pci@e0009000 { |
347 | cell-index = <1>; | ||
348 | interrupt-map-mask = <0xf800 0x0 0x0 0x7>; | 358 | interrupt-map-mask = <0xf800 0x0 0x0 0x7>; |
349 | interrupt-map = < | 359 | interrupt-map = < |
350 | 360 | ||
diff --git a/arch/powerpc/boot/dts/mpc8544ds.dts b/arch/powerpc/boot/dts/mpc8544ds.dts index 7c6932be0197..98e94b465662 100644 --- a/arch/powerpc/boot/dts/mpc8544ds.dts +++ b/arch/powerpc/boot/dts/mpc8544ds.dts | |||
@@ -57,9 +57,21 @@ | |||
57 | compatible = "simple-bus"; | 57 | compatible = "simple-bus"; |
58 | 58 | ||
59 | ranges = <0x0 0xe0000000 0x100000>; | 59 | ranges = <0x0 0xe0000000 0x100000>; |
60 | reg = <0xe0000000 0x1000>; // CCSRBAR 1M | ||
61 | bus-frequency = <0>; // Filled out by uboot. | 60 | bus-frequency = <0>; // Filled out by uboot. |
62 | 61 | ||
62 | ecm-law@0 { | ||
63 | compatible = "fsl,ecm-law"; | ||
64 | reg = <0x0 0x1000>; | ||
65 | fsl,num-laws = <10>; | ||
66 | }; | ||
67 | |||
68 | ecm@1000 { | ||
69 | compatible = "fsl,mpc8544-ecm", "fsl,ecm"; | ||
70 | reg = <0x1000 0x1000>; | ||
71 | interrupts = <17 2>; | ||
72 | interrupt-parent = <&mpic>; | ||
73 | }; | ||
74 | |||
63 | memory-controller@2000 { | 75 | memory-controller@2000 { |
64 | compatible = "fsl,8544-memory-controller"; | 76 | compatible = "fsl,8544-memory-controller"; |
65 | reg = <0x2000 0x1000>; | 77 | reg = <0x2000 0x1000>; |
@@ -274,7 +286,6 @@ | |||
274 | }; | 286 | }; |
275 | 287 | ||
276 | pci0: pci@e0008000 { | 288 | pci0: pci@e0008000 { |
277 | cell-index = <0>; | ||
278 | compatible = "fsl,mpc8540-pci"; | 289 | compatible = "fsl,mpc8540-pci"; |
279 | device_type = "pci"; | 290 | device_type = "pci"; |
280 | interrupt-map-mask = <0xf800 0x0 0x0 0x7>; | 291 | interrupt-map-mask = <0xf800 0x0 0x0 0x7>; |
@@ -306,7 +317,6 @@ | |||
306 | }; | 317 | }; |
307 | 318 | ||
308 | pci1: pcie@e0009000 { | 319 | pci1: pcie@e0009000 { |
309 | cell-index = <1>; | ||
310 | compatible = "fsl,mpc8548-pcie"; | 320 | compatible = "fsl,mpc8548-pcie"; |
311 | device_type = "pci"; | 321 | device_type = "pci"; |
312 | #interrupt-cells = <1>; | 322 | #interrupt-cells = <1>; |
@@ -343,7 +353,6 @@ | |||
343 | }; | 353 | }; |
344 | 354 | ||
345 | pci2: pcie@e000a000 { | 355 | pci2: pcie@e000a000 { |
346 | cell-index = <2>; | ||
347 | compatible = "fsl,mpc8548-pcie"; | 356 | compatible = "fsl,mpc8548-pcie"; |
348 | device_type = "pci"; | 357 | device_type = "pci"; |
349 | #interrupt-cells = <1>; | 358 | #interrupt-cells = <1>; |
@@ -380,7 +389,6 @@ | |||
380 | }; | 389 | }; |
381 | 390 | ||
382 | pci3: pcie@e000b000 { | 391 | pci3: pcie@e000b000 { |
383 | cell-index = <3>; | ||
384 | compatible = "fsl,mpc8548-pcie"; | 392 | compatible = "fsl,mpc8548-pcie"; |
385 | device_type = "pci"; | 393 | device_type = "pci"; |
386 | #interrupt-cells = <1>; | 394 | #interrupt-cells = <1>; |
diff --git a/arch/powerpc/boot/dts/mpc8548cds.dts b/arch/powerpc/boot/dts/mpc8548cds.dts index 804e90353293..475be1433fe1 100644 --- a/arch/powerpc/boot/dts/mpc8548cds.dts +++ b/arch/powerpc/boot/dts/mpc8548cds.dts | |||
@@ -60,9 +60,21 @@ | |||
60 | device_type = "soc"; | 60 | device_type = "soc"; |
61 | compatible = "simple-bus"; | 61 | compatible = "simple-bus"; |
62 | ranges = <0x0 0xe0000000 0x100000>; | 62 | ranges = <0x0 0xe0000000 0x100000>; |
63 | reg = <0xe0000000 0x1000>; // CCSRBAR | ||
64 | bus-frequency = <0>; | 63 | bus-frequency = <0>; |
65 | 64 | ||
65 | ecm-law@0 { | ||
66 | compatible = "fsl,ecm-law"; | ||
67 | reg = <0x0 0x1000>; | ||
68 | fsl,num-laws = <10>; | ||
69 | }; | ||
70 | |||
71 | ecm@1000 { | ||
72 | compatible = "fsl,mpc8548-ecm", "fsl,ecm"; | ||
73 | reg = <0x1000 0x1000>; | ||
74 | interrupts = <17 2>; | ||
75 | interrupt-parent = <&mpic>; | ||
76 | }; | ||
77 | |||
66 | memory-controller@2000 { | 78 | memory-controller@2000 { |
67 | compatible = "fsl,8548-memory-controller"; | 79 | compatible = "fsl,8548-memory-controller"; |
68 | reg = <0x2000 0x1000>; | 80 | reg = <0x2000 0x1000>; |
@@ -328,7 +340,6 @@ | |||
328 | }; | 340 | }; |
329 | 341 | ||
330 | pci0: pci@e0008000 { | 342 | pci0: pci@e0008000 { |
331 | cell-index = <0>; | ||
332 | interrupt-map-mask = <0xf800 0x0 0x0 0x7>; | 343 | interrupt-map-mask = <0xf800 0x0 0x0 0x7>; |
333 | interrupt-map = < | 344 | interrupt-map = < |
334 | /* IDSEL 0x4 (PCIX Slot 2) */ | 345 | /* IDSEL 0x4 (PCIX Slot 2) */ |
@@ -478,7 +489,6 @@ | |||
478 | }; | 489 | }; |
479 | 490 | ||
480 | pci1: pci@e0009000 { | 491 | pci1: pci@e0009000 { |
481 | cell-index = <1>; | ||
482 | interrupt-map-mask = <0xf800 0x0 0x0 0x7>; | 492 | interrupt-map-mask = <0xf800 0x0 0x0 0x7>; |
483 | interrupt-map = < | 493 | interrupt-map = < |
484 | 494 | ||
@@ -503,7 +513,6 @@ | |||
503 | }; | 513 | }; |
504 | 514 | ||
505 | pci2: pcie@e000a000 { | 515 | pci2: pcie@e000a000 { |
506 | cell-index = <2>; | ||
507 | interrupt-map-mask = <0xf800 0x0 0x0 0x7>; | 516 | interrupt-map-mask = <0xf800 0x0 0x0 0x7>; |
508 | interrupt-map = < | 517 | interrupt-map = < |
509 | 518 | ||
diff --git a/arch/powerpc/boot/dts/mpc8555cds.dts b/arch/powerpc/boot/dts/mpc8555cds.dts index 9484f0729b10..065b2f093de2 100644 --- a/arch/powerpc/boot/dts/mpc8555cds.dts +++ b/arch/powerpc/boot/dts/mpc8555cds.dts | |||
@@ -55,9 +55,21 @@ | |||
55 | device_type = "soc"; | 55 | device_type = "soc"; |
56 | compatible = "simple-bus"; | 56 | compatible = "simple-bus"; |
57 | ranges = <0x0 0xe0000000 0x100000>; | 57 | ranges = <0x0 0xe0000000 0x100000>; |
58 | reg = <0xe0000000 0x1000>; // CCSRBAR 1M | ||
59 | bus-frequency = <0>; | 58 | bus-frequency = <0>; |
60 | 59 | ||
60 | ecm-law@0 { | ||
61 | compatible = "fsl,ecm-law"; | ||
62 | reg = <0x0 0x1000>; | ||
63 | fsl,num-laws = <8>; | ||
64 | }; | ||
65 | |||
66 | ecm@1000 { | ||
67 | compatible = "fsl,mpc8555-ecm", "fsl,ecm"; | ||
68 | reg = <0x1000 0x1000>; | ||
69 | interrupts = <17 2>; | ||
70 | interrupt-parent = <&mpic>; | ||
71 | }; | ||
72 | |||
61 | memory-controller@2000 { | 73 | memory-controller@2000 { |
62 | compatible = "fsl,8555-memory-controller"; | 74 | compatible = "fsl,8555-memory-controller"; |
63 | reg = <0x2000 0x1000>; | 75 | reg = <0x2000 0x1000>; |
@@ -272,7 +284,6 @@ | |||
272 | }; | 284 | }; |
273 | 285 | ||
274 | pci0: pci@e0008000 { | 286 | pci0: pci@e0008000 { |
275 | cell-index = <0>; | ||
276 | interrupt-map-mask = <0x1f800 0x0 0x0 0x7>; | 287 | interrupt-map-mask = <0x1f800 0x0 0x0 0x7>; |
277 | interrupt-map = < | 288 | interrupt-map = < |
278 | 289 | ||
@@ -344,7 +355,6 @@ | |||
344 | }; | 355 | }; |
345 | 356 | ||
346 | pci1: pci@e0009000 { | 357 | pci1: pci@e0009000 { |
347 | cell-index = <1>; | ||
348 | interrupt-map-mask = <0xf800 0x0 0x0 0x7>; | 358 | interrupt-map-mask = <0xf800 0x0 0x0 0x7>; |
349 | interrupt-map = < | 359 | interrupt-map = < |
350 | 360 | ||
diff --git a/arch/powerpc/boot/dts/mpc8560ads.dts b/arch/powerpc/boot/dts/mpc8560ads.dts index cc2acf87d02f..a5bb1ec70a5a 100644 --- a/arch/powerpc/boot/dts/mpc8560ads.dts +++ b/arch/powerpc/boot/dts/mpc8560ads.dts | |||
@@ -55,9 +55,21 @@ | |||
55 | device_type = "soc"; | 55 | device_type = "soc"; |
56 | compatible = "simple-bus"; | 56 | compatible = "simple-bus"; |
57 | ranges = <0x0 0xe0000000 0x100000>; | 57 | ranges = <0x0 0xe0000000 0x100000>; |
58 | reg = <0xe0000000 0x200>; | ||
59 | bus-frequency = <330000000>; | 58 | bus-frequency = <330000000>; |
60 | 59 | ||
60 | ecm-law@0 { | ||
61 | compatible = "fsl,ecm-law"; | ||
62 | reg = <0x0 0x1000>; | ||
63 | fsl,num-laws = <8>; | ||
64 | }; | ||
65 | |||
66 | ecm@1000 { | ||
67 | compatible = "fsl,mpc8560-ecm", "fsl,ecm"; | ||
68 | reg = <0x1000 0x1000>; | ||
69 | interrupts = <17 2>; | ||
70 | interrupt-parent = <&mpic>; | ||
71 | }; | ||
72 | |||
61 | memory-controller@2000 { | 73 | memory-controller@2000 { |
62 | compatible = "fsl,8540-memory-controller"; | 74 | compatible = "fsl,8540-memory-controller"; |
63 | reg = <0x2000 0x1000>; | 75 | reg = <0x2000 0x1000>; |
@@ -291,7 +303,6 @@ | |||
291 | }; | 303 | }; |
292 | 304 | ||
293 | pci0: pci@e0008000 { | 305 | pci0: pci@e0008000 { |
294 | cell-index = <0>; | ||
295 | #interrupt-cells = <1>; | 306 | #interrupt-cells = <1>; |
296 | #size-cells = <2>; | 307 | #size-cells = <2>; |
297 | #address-cells = <3>; | 308 | #address-cells = <3>; |
diff --git a/arch/powerpc/boot/dts/mpc8568mds.dts b/arch/powerpc/boot/dts/mpc8568mds.dts index 9d52e3b25047..00c2bbda7013 100644 --- a/arch/powerpc/boot/dts/mpc8568mds.dts +++ b/arch/powerpc/boot/dts/mpc8568mds.dts | |||
@@ -26,6 +26,7 @@ | |||
26 | serial1 = &serial1; | 26 | serial1 = &serial1; |
27 | pci0 = &pci0; | 27 | pci0 = &pci0; |
28 | pci1 = &pci1; | 28 | pci1 = &pci1; |
29 | rapidio0 = &rio0; | ||
29 | }; | 30 | }; |
30 | 31 | ||
31 | cpus { | 32 | cpus { |
@@ -62,9 +63,21 @@ | |||
62 | device_type = "soc"; | 63 | device_type = "soc"; |
63 | compatible = "simple-bus"; | 64 | compatible = "simple-bus"; |
64 | ranges = <0x0 0xe0000000 0x100000>; | 65 | ranges = <0x0 0xe0000000 0x100000>; |
65 | reg = <0xe0000000 0x1000>; | ||
66 | bus-frequency = <0>; | 66 | bus-frequency = <0>; |
67 | 67 | ||
68 | ecm-law@0 { | ||
69 | compatible = "fsl,ecm-law"; | ||
70 | reg = <0x0 0x1000>; | ||
71 | fsl,num-laws = <10>; | ||
72 | }; | ||
73 | |||
74 | ecm@1000 { | ||
75 | compatible = "fsl,mpc8568-ecm", "fsl,ecm"; | ||
76 | reg = <0x1000 0x1000>; | ||
77 | interrupts = <17 2>; | ||
78 | interrupt-parent = <&mpic>; | ||
79 | }; | ||
80 | |||
68 | memory-controller@2000 { | 81 | memory-controller@2000 { |
69 | compatible = "fsl,8568-memory-controller"; | 82 | compatible = "fsl,8568-memory-controller"; |
70 | reg = <0x2000 0x1000>; | 83 | reg = <0x2000 0x1000>; |
@@ -275,6 +288,22 @@ | |||
275 | device_type = "open-pic"; | 288 | device_type = "open-pic"; |
276 | }; | 289 | }; |
277 | 290 | ||
291 | msi@41600 { | ||
292 | compatible = "fsl,mpc8568-msi", "fsl,mpic-msi"; | ||
293 | reg = <0x41600 0x80>; | ||
294 | msi-available-ranges = <0 0x100>; | ||
295 | interrupts = < | ||
296 | 0xe0 0 | ||
297 | 0xe1 0 | ||
298 | 0xe2 0 | ||
299 | 0xe3 0 | ||
300 | 0xe4 0 | ||
301 | 0xe5 0 | ||
302 | 0xe6 0 | ||
303 | 0xe7 0>; | ||
304 | interrupt-parent = <&mpic>; | ||
305 | }; | ||
306 | |||
278 | par_io@e0100 { | 307 | par_io@e0100 { |
279 | reg = <0xe0100 0x100>; | 308 | reg = <0xe0100 0x100>; |
280 | device_type = "par_io"; | 309 | device_type = "par_io"; |
@@ -349,6 +378,8 @@ | |||
349 | reg = <0xe0080000 0x480>; | 378 | reg = <0xe0080000 0x480>; |
350 | brg-frequency = <0>; | 379 | brg-frequency = <0>; |
351 | bus-frequency = <396000000>; | 380 | bus-frequency = <396000000>; |
381 | fsl,qe-num-riscs = <2>; | ||
382 | fsl,qe-num-snums = <28>; | ||
352 | 383 | ||
353 | muram@10000 { | 384 | muram@10000 { |
354 | #address-cells = <1>; | 385 | #address-cells = <1>; |
@@ -459,7 +490,6 @@ | |||
459 | }; | 490 | }; |
460 | 491 | ||
461 | pci0: pci@e0008000 { | 492 | pci0: pci@e0008000 { |
462 | cell-index = <0>; | ||
463 | interrupt-map-mask = <0xf800 0x0 0x0 0x7>; | 493 | interrupt-map-mask = <0xf800 0x0 0x0 0x7>; |
464 | interrupt-map = < | 494 | interrupt-map = < |
465 | /* IDSEL 0x12 AD18 */ | 495 | /* IDSEL 0x12 AD18 */ |
@@ -490,7 +520,6 @@ | |||
490 | 520 | ||
491 | /* PCI Express */ | 521 | /* PCI Express */ |
492 | pci1: pcie@e000a000 { | 522 | pci1: pcie@e000a000 { |
493 | cell-index = <2>; | ||
494 | interrupt-map-mask = <0xf800 0x0 0x0 0x7>; | 523 | interrupt-map-mask = <0xf800 0x0 0x0 0x7>; |
495 | interrupt-map = < | 524 | interrupt-map = < |
496 | 525 | ||
@@ -526,4 +555,20 @@ | |||
526 | 0x0 0x800000>; | 555 | 0x0 0x800000>; |
527 | }; | 556 | }; |
528 | }; | 557 | }; |
558 | |||
559 | rio0: rapidio@e00c00000 { | ||
560 | #address-cells = <2>; | ||
561 | #size-cells = <2>; | ||
562 | compatible = "fsl,mpc8568-rapidio", "fsl,rapidio-delta"; | ||
563 | reg = <0xe00c0000 0x20000>; | ||
564 | ranges = <0x0 0x0 0xc0000000 0x0 0x20000000>; | ||
565 | interrupts = <48 2 /* error */ | ||
566 | 49 2 /* bell_outb */ | ||
567 | 50 2 /* bell_inb */ | ||
568 | 53 2 /* msg1_tx */ | ||
569 | 54 2 /* msg1_rx */ | ||
570 | 55 2 /* msg2_tx */ | ||
571 | 56 2 /* msg2_rx */>; | ||
572 | interrupt-parent = <&mpic>; | ||
573 | }; | ||
529 | }; | 574 | }; |
diff --git a/arch/powerpc/boot/dts/mpc8569mds.dts b/arch/powerpc/boot/dts/mpc8569mds.dts new file mode 100644 index 000000000000..39c2927503cf --- /dev/null +++ b/arch/powerpc/boot/dts/mpc8569mds.dts | |||
@@ -0,0 +1,583 @@ | |||
1 | /* | ||
2 | * MPC8569E MDS Device Tree Source | ||
3 | * | ||
4 | * Copyright (C) 2009 Freescale Semiconductor Inc. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify it | ||
7 | * under the terms of the GNU General Public License as published by the | ||
8 | * Free Software Foundation; either version 2 of the License, or (at your | ||
9 | * option) any later version. | ||
10 | */ | ||
11 | |||
12 | /dts-v1/; | ||
13 | |||
14 | / { | ||
15 | model = "MPC8569EMDS"; | ||
16 | compatible = "fsl,MPC8569EMDS"; | ||
17 | #address-cells = <1>; | ||
18 | #size-cells = <1>; | ||
19 | |||
20 | aliases { | ||
21 | serial0 = &serial0; | ||
22 | serial1 = &serial1; | ||
23 | ethernet0 = &enet0; | ||
24 | ethernet1 = &enet1; | ||
25 | ethernet2 = &enet2; | ||
26 | ethernet3 = &enet3; | ||
27 | pci1 = &pci1; | ||
28 | rapidio0 = &rio0; | ||
29 | }; | ||
30 | |||
31 | cpus { | ||
32 | #address-cells = <1>; | ||
33 | #size-cells = <0>; | ||
34 | |||
35 | PowerPC,8569@0 { | ||
36 | device_type = "cpu"; | ||
37 | reg = <0x0>; | ||
38 | d-cache-line-size = <32>; // 32 bytes | ||
39 | i-cache-line-size = <32>; // 32 bytes | ||
40 | d-cache-size = <0x8000>; // L1, 32K | ||
41 | i-cache-size = <0x8000>; // L1, 32K | ||
42 | timebase-frequency = <0>; | ||
43 | bus-frequency = <0>; | ||
44 | clock-frequency = <0>; | ||
45 | next-level-cache = <&L2>; | ||
46 | }; | ||
47 | }; | ||
48 | |||
49 | memory { | ||
50 | device_type = "memory"; | ||
51 | }; | ||
52 | |||
53 | localbus@e0005000 { | ||
54 | #address-cells = <2>; | ||
55 | #size-cells = <1>; | ||
56 | compatible = "fsl,mpc8569-elbc", "fsl,elbc", "simple-bus"; | ||
57 | reg = <0xe0005000 0x1000>; | ||
58 | interrupts = <19 2>; | ||
59 | interrupt-parent = <&mpic>; | ||
60 | |||
61 | ranges = <0x0 0x0 0xfe000000 0x02000000 | ||
62 | 0x1 0x0 0xf8000000 0x00008000 | ||
63 | 0x2 0x0 0xf0000000 0x04000000 | ||
64 | 0x3 0x0 0xfc000000 0x00008000 | ||
65 | 0x4 0x0 0xf8008000 0x00008000 | ||
66 | 0x5 0x0 0xf8010000 0x00008000>; | ||
67 | |||
68 | nor@0,0 { | ||
69 | #address-cells = <1>; | ||
70 | #size-cells = <1>; | ||
71 | compatible = "cfi-flash"; | ||
72 | reg = <0x0 0x0 0x02000000>; | ||
73 | bank-width = <2>; | ||
74 | device-width = <1>; | ||
75 | }; | ||
76 | |||
77 | bcsr@1,0 { | ||
78 | compatible = "fsl,mpc8569mds-bcsr"; | ||
79 | reg = <1 0 0x8000>; | ||
80 | }; | ||
81 | |||
82 | nand@3,0 { | ||
83 | compatible = "fsl,mpc8569-fcm-nand", | ||
84 | "fsl,elbc-fcm-nand"; | ||
85 | reg = <3 0 0x8000>; | ||
86 | }; | ||
87 | |||
88 | pib@4,0 { | ||
89 | compatible = "fsl,mpc8569mds-pib"; | ||
90 | reg = <4 0 0x8000>; | ||
91 | }; | ||
92 | |||
93 | pib@5,0 { | ||
94 | compatible = "fsl,mpc8569mds-pib"; | ||
95 | reg = <5 0 0x8000>; | ||
96 | }; | ||
97 | }; | ||
98 | |||
99 | soc@e0000000 { | ||
100 | #address-cells = <1>; | ||
101 | #size-cells = <1>; | ||
102 | device_type = "soc"; | ||
103 | compatible = "fsl,mpc8569-immr", "simple-bus"; | ||
104 | ranges = <0x0 0xe0000000 0x100000>; | ||
105 | bus-frequency = <0>; | ||
106 | |||
107 | ecm-law@0 { | ||
108 | compatible = "fsl,ecm-law"; | ||
109 | reg = <0x0 0x1000>; | ||
110 | fsl,num-laws = <10>; | ||
111 | }; | ||
112 | |||
113 | ecm@1000 { | ||
114 | compatible = "fsl,mpc8569-ecm", "fsl,ecm"; | ||
115 | reg = <0x1000 0x1000>; | ||
116 | interrupts = <17 2>; | ||
117 | interrupt-parent = <&mpic>; | ||
118 | }; | ||
119 | |||
120 | memory-controller@2000 { | ||
121 | compatible = "fsl,mpc8569-memory-controller"; | ||
122 | reg = <0x2000 0x1000>; | ||
123 | interrupt-parent = <&mpic>; | ||
124 | interrupts = <18 2>; | ||
125 | }; | ||
126 | |||
127 | i2c@3000 { | ||
128 | #address-cells = <1>; | ||
129 | #size-cells = <0>; | ||
130 | cell-index = <0>; | ||
131 | compatible = "fsl-i2c"; | ||
132 | reg = <0x3000 0x100>; | ||
133 | interrupts = <43 2>; | ||
134 | interrupt-parent = <&mpic>; | ||
135 | dfsrr; | ||
136 | |||
137 | rtc@68 { | ||
138 | compatible = "dallas,ds1374"; | ||
139 | reg = <0x68>; | ||
140 | }; | ||
141 | }; | ||
142 | |||
143 | i2c@3100 { | ||
144 | #address-cells = <1>; | ||
145 | #size-cells = <0>; | ||
146 | cell-index = <1>; | ||
147 | compatible = "fsl-i2c"; | ||
148 | reg = <0x3100 0x100>; | ||
149 | interrupts = <43 2>; | ||
150 | interrupt-parent = <&mpic>; | ||
151 | dfsrr; | ||
152 | }; | ||
153 | |||
154 | serial0: serial@4500 { | ||
155 | cell-index = <0>; | ||
156 | device_type = "serial"; | ||
157 | compatible = "ns16550"; | ||
158 | reg = <0x4500 0x100>; | ||
159 | clock-frequency = <0>; | ||
160 | interrupts = <42 2>; | ||
161 | interrupt-parent = <&mpic>; | ||
162 | }; | ||
163 | |||
164 | serial1: serial@4600 { | ||
165 | cell-index = <1>; | ||
166 | device_type = "serial"; | ||
167 | compatible = "ns16550"; | ||
168 | reg = <0x4600 0x100>; | ||
169 | clock-frequency = <0>; | ||
170 | interrupts = <42 2>; | ||
171 | interrupt-parent = <&mpic>; | ||
172 | }; | ||
173 | |||
174 | L2: l2-cache-controller@20000 { | ||
175 | compatible = "fsl,mpc8569-l2-cache-controller"; | ||
176 | reg = <0x20000 0x1000>; | ||
177 | cache-line-size = <32>; // 32 bytes | ||
178 | cache-size = <0x80000>; // L2, 512K | ||
179 | interrupt-parent = <&mpic>; | ||
180 | interrupts = <16 2>; | ||
181 | }; | ||
182 | |||
183 | dma@21300 { | ||
184 | #address-cells = <1>; | ||
185 | #size-cells = <1>; | ||
186 | compatible = "fsl,mpc8569-dma", "fsl,eloplus-dma"; | ||
187 | reg = <0x21300 0x4>; | ||
188 | ranges = <0x0 0x21100 0x200>; | ||
189 | cell-index = <0>; | ||
190 | dma-channel@0 { | ||
191 | compatible = "fsl,mpc8569-dma-channel", | ||
192 | "fsl,eloplus-dma-channel"; | ||
193 | reg = <0x0 0x80>; | ||
194 | cell-index = <0>; | ||
195 | interrupt-parent = <&mpic>; | ||
196 | interrupts = <20 2>; | ||
197 | }; | ||
198 | dma-channel@80 { | ||
199 | compatible = "fsl,mpc8569-dma-channel", | ||
200 | "fsl,eloplus-dma-channel"; | ||
201 | reg = <0x80 0x80>; | ||
202 | cell-index = <1>; | ||
203 | interrupt-parent = <&mpic>; | ||
204 | interrupts = <21 2>; | ||
205 | }; | ||
206 | dma-channel@100 { | ||
207 | compatible = "fsl,mpc8569-dma-channel", | ||
208 | "fsl,eloplus-dma-channel"; | ||
209 | reg = <0x100 0x80>; | ||
210 | cell-index = <2>; | ||
211 | interrupt-parent = <&mpic>; | ||
212 | interrupts = <22 2>; | ||
213 | }; | ||
214 | dma-channel@180 { | ||
215 | compatible = "fsl,mpc8569-dma-channel", | ||
216 | "fsl,eloplus-dma-channel"; | ||
217 | reg = <0x180 0x80>; | ||
218 | cell-index = <3>; | ||
219 | interrupt-parent = <&mpic>; | ||
220 | interrupts = <23 2>; | ||
221 | }; | ||
222 | }; | ||
223 | |||
224 | sdhci@2e000 { | ||
225 | compatible = "fsl,mpc8569-esdhc", "fsl,esdhc"; | ||
226 | reg = <0x2e000 0x1000>; | ||
227 | interrupts = <72 0x8>; | ||
228 | interrupt-parent = <&mpic>; | ||
229 | /* Filled in by U-Boot */ | ||
230 | clock-frequency = <0>; | ||
231 | status = "disabled"; | ||
232 | }; | ||
233 | |||
234 | crypto@30000 { | ||
235 | compatible = "fsl,sec3.1", "fsl,sec3.0", "fsl,sec2.4", | ||
236 | "fsl,sec2.2", "fsl,sec2.1", "fsl,sec2.0"; | ||
237 | reg = <0x30000 0x10000>; | ||
238 | interrupts = <45 2 58 2>; | ||
239 | interrupt-parent = <&mpic>; | ||
240 | fsl,num-channels = <4>; | ||
241 | fsl,channel-fifo-len = <24>; | ||
242 | fsl,exec-units-mask = <0xbfe>; | ||
243 | fsl,descriptor-types-mask = <0x3ab0ebf>; | ||
244 | }; | ||
245 | |||
246 | mpic: pic@40000 { | ||
247 | interrupt-controller; | ||
248 | #address-cells = <0>; | ||
249 | #interrupt-cells = <2>; | ||
250 | reg = <0x40000 0x40000>; | ||
251 | compatible = "chrp,open-pic"; | ||
252 | device_type = "open-pic"; | ||
253 | }; | ||
254 | |||
255 | msi@41600 { | ||
256 | compatible = "fsl,mpc8568-msi", "fsl,mpic-msi"; | ||
257 | reg = <0x41600 0x80>; | ||
258 | msi-available-ranges = <0 0x100>; | ||
259 | interrupts = < | ||
260 | 0xe0 0 | ||
261 | 0xe1 0 | ||
262 | 0xe2 0 | ||
263 | 0xe3 0 | ||
264 | 0xe4 0 | ||
265 | 0xe5 0 | ||
266 | 0xe6 0 | ||
267 | 0xe7 0>; | ||
268 | interrupt-parent = <&mpic>; | ||
269 | }; | ||
270 | |||
271 | global-utilities@e0000 { | ||
272 | compatible = "fsl,mpc8569-guts"; | ||
273 | reg = <0xe0000 0x1000>; | ||
274 | fsl,has-rstcr; | ||
275 | }; | ||
276 | |||
277 | par_io@e0100 { | ||
278 | #address-cells = <1>; | ||
279 | #size-cells = <1>; | ||
280 | reg = <0xe0100 0x100>; | ||
281 | ranges = <0x0 0xe0100 0x100>; | ||
282 | device_type = "par_io"; | ||
283 | num-ports = <7>; | ||
284 | |||
285 | qe_pio_e: gpio-controller@80 { | ||
286 | #gpio-cells = <2>; | ||
287 | compatible = "fsl,mpc8569-qe-pario-bank", | ||
288 | "fsl,mpc8323-qe-pario-bank"; | ||
289 | reg = <0x80 0x18>; | ||
290 | gpio-controller; | ||
291 | }; | ||
292 | |||
293 | pio1: ucc_pin@01 { | ||
294 | pio-map = < | ||
295 | /* port pin dir open_drain assignment has_irq */ | ||
296 | 0x2 0x1f 0x1 0x0 0x1 0x0 /* QE_MUX_MDC */ | ||
297 | 0x2 0x1e 0x3 0x0 0x2 0x0 /* QE_MUX_MDIO */ | ||
298 | 0x2 0x0b 0x2 0x0 0x1 0x0 /* CLK12*/ | ||
299 | 0x0 0x0 0x1 0x0 0x3 0x0 /* ENET1_TXD0_SER1_TXD0 */ | ||
300 | 0x0 0x1 0x1 0x0 0x3 0x0 /* ENET1_TXD1_SER1_TXD1 */ | ||
301 | 0x0 0x2 0x1 0x0 0x1 0x0 /* ENET1_TXD2_SER1_TXD2 */ | ||
302 | 0x0 0x3 0x1 0x0 0x2 0x0 /* ENET1_TXD3_SER1_TXD3 */ | ||
303 | 0x0 0x6 0x2 0x0 0x3 0x0 /* ENET1_RXD0_SER1_RXD0 */ | ||
304 | 0x0 0x7 0x2 0x0 0x1 0x0 /* ENET1_RXD1_SER1_RXD1 */ | ||
305 | 0x0 0x8 0x2 0x0 0x2 0x0 /* ENET1_RXD2_SER1_RXD2 */ | ||
306 | 0x0 0x9 0x2 0x0 0x2 0x0 /* ENET1_RXD3_SER1_RXD3 */ | ||
307 | 0x0 0x4 0x1 0x0 0x2 0x0 /* ENET1_TX_EN_SER1_RTS_B */ | ||
308 | 0x0 0xc 0x2 0x0 0x3 0x0 /* ENET1_RX_DV_SER1_CTS_B */ | ||
309 | 0x2 0x8 0x2 0x0 0x1 0x0 /* ENET1_GRXCLK */ | ||
310 | 0x2 0x14 0x1 0x0 0x2 0x0>; /* ENET1_GTXCLK */ | ||
311 | }; | ||
312 | |||
313 | pio2: ucc_pin@02 { | ||
314 | pio-map = < | ||
315 | /* port pin dir open_drain assignment has_irq */ | ||
316 | 0x2 0x1f 0x1 0x0 0x1 0x0 /* QE_MUX_MDC */ | ||
317 | 0x2 0x1e 0x3 0x0 0x2 0x0 /* QE_MUX_MDIO */ | ||
318 | 0x2 0x10 0x2 0x0 0x3 0x0 /* CLK17 */ | ||
319 | 0x0 0xe 0x1 0x0 0x2 0x0 /* ENET2_TXD0_SER2_TXD0 */ | ||
320 | 0x0 0xf 0x1 0x0 0x2 0x0 /* ENET2_TXD1_SER2_TXD1 */ | ||
321 | 0x0 0x10 0x1 0x0 0x1 0x0 /* ENET2_TXD2_SER2_TXD2 */ | ||
322 | 0x0 0x11 0x1 0x0 0x1 0x0 /* ENET2_TXD3_SER2_TXD3 */ | ||
323 | 0x0 0x14 0x2 0x0 0x2 0x0 /* ENET2_RXD0_SER2_RXD0 */ | ||
324 | 0x0 0x15 0x2 0x0 0x1 0x0 /* ENET2_RXD1_SER2_RXD1 */ | ||
325 | 0x0 0x16 0x2 0x0 0x1 0x0 /* ENET2_RXD2_SER2_RXD2 */ | ||
326 | 0x0 0x17 0x2 0x0 0x1 0x0 /* ENET2_RXD3_SER2_RXD3 */ | ||
327 | 0x0 0x12 0x1 0x0 0x2 0x0 /* ENET2_TX_EN_SER2_RTS_B */ | ||
328 | 0x0 0x1a 0x2 0x0 0x3 0x0 /* ENET2_RX_DV_SER2_CTS_B */ | ||
329 | 0x2 0x3 0x2 0x0 0x1 0x0 /* ENET2_GRXCLK */ | ||
330 | 0x2 0x2 0x1 0x0 0x2 0x0>; /* ENET2_GTXCLK */ | ||
331 | }; | ||
332 | |||
333 | pio3: ucc_pin@03 { | ||
334 | pio-map = < | ||
335 | /* port pin dir open_drain assignment has_irq */ | ||
336 | 0x2 0x1f 0x1 0x0 0x1 0x0 /* QE_MUX_MDC */ | ||
337 | 0x2 0x1e 0x3 0x0 0x2 0x0 /* QE_MUX_MDIO */ | ||
338 | 0x2 0x0b 0x2 0x0 0x1 0x0 /* CLK12*/ | ||
339 | 0x0 0x1d 0x1 0x0 0x2 0x0 /* ENET3_TXD0_SER3_TXD0 */ | ||
340 | 0x0 0x1e 0x1 0x0 0x3 0x0 /* ENET3_TXD1_SER3_TXD1 */ | ||
341 | 0x0 0x1f 0x1 0x0 0x2 0x0 /* ENET3_TXD2_SER3_TXD2 */ | ||
342 | 0x1 0x0 0x1 0x0 0x3 0x0 /* ENET3_TXD3_SER3_TXD3 */ | ||
343 | 0x1 0x3 0x2 0x0 0x3 0x0 /* ENET3_RXD0_SER3_RXD0 */ | ||
344 | 0x1 0x4 0x2 0x0 0x1 0x0 /* ENET3_RXD1_SER3_RXD1 */ | ||
345 | 0x1 0x5 0x2 0x0 0x2 0x0 /* ENET3_RXD2_SER3_RXD2 */ | ||
346 | 0x1 0x6 0x2 0x0 0x3 0x0 /* ENET3_RXD3_SER3_RXD3 */ | ||
347 | 0x1 0x1 0x1 0x0 0x1 0x0 /* ENET3_TX_EN_SER3_RTS_B */ | ||
348 | 0x1 0x9 0x2 0x0 0x3 0x0 /* ENET3_RX_DV_SER3_CTS_B */ | ||
349 | 0x2 0x9 0x2 0x0 0x2 0x0 /* ENET3_GRXCLK */ | ||
350 | 0x2 0x19 0x1 0x0 0x2 0x0>; /* ENET3_GTXCLK */ | ||
351 | }; | ||
352 | |||
353 | pio4: ucc_pin@04 { | ||
354 | pio-map = < | ||
355 | /* port pin dir open_drain assignment has_irq */ | ||
356 | 0x2 0x1f 0x1 0x0 0x1 0x0 /* QE_MUX_MDC */ | ||
357 | 0x2 0x1e 0x3 0x0 0x2 0x0 /* QE_MUX_MDIO */ | ||
358 | 0x2 0x10 0x2 0x0 0x3 0x0 /* CLK17 */ | ||
359 | 0x1 0xc 0x1 0x0 0x2 0x0 /* ENET4_TXD0_SER4_TXD0 */ | ||
360 | 0x1 0xd 0x1 0x0 0x2 0x0 /* ENET4_TXD1_SER4_TXD1 */ | ||
361 | 0x1 0xe 0x1 0x0 0x1 0x0 /* ENET4_TXD2_SER4_TXD2 */ | ||
362 | 0x1 0xf 0x1 0x0 0x2 0x0 /* ENET4_TXD3_SER4_TXD3 */ | ||
363 | 0x1 0x12 0x2 0x0 0x2 0x0 /* ENET4_RXD0_SER4_RXD0 */ | ||
364 | 0x1 0x13 0x2 0x0 0x1 0x0 /* ENET4_RXD1_SER4_RXD1 */ | ||
365 | 0x1 0x14 0x2 0x0 0x1 0x0 /* ENET4_RXD2_SER4_RXD2 */ | ||
366 | 0x1 0x15 0x2 0x0 0x2 0x0 /* ENET4_RXD3_SER4_RXD3 */ | ||
367 | 0x1 0x10 0x1 0x0 0x2 0x0 /* ENET4_TX_EN_SER4_RTS_B */ | ||
368 | 0x1 0x18 0x2 0x0 0x3 0x0 /* ENET4_RX_DV_SER4_CTS_B */ | ||
369 | 0x2 0x11 0x2 0x0 0x2 0x0 /* ENET4_GRXCLK */ | ||
370 | 0x2 0x18 0x1 0x0 0x2 0x0>; /* ENET4_GTXCLK */ | ||
371 | }; | ||
372 | }; | ||
373 | }; | ||
374 | |||
375 | qe@e0080000 { | ||
376 | #address-cells = <1>; | ||
377 | #size-cells = <1>; | ||
378 | device_type = "qe"; | ||
379 | compatible = "fsl,qe"; | ||
380 | ranges = <0x0 0xe0080000 0x40000>; | ||
381 | reg = <0xe0080000 0x480>; | ||
382 | brg-frequency = <0>; | ||
383 | bus-frequency = <0>; | ||
384 | fsl,qe-num-riscs = <4>; | ||
385 | fsl,qe-num-snums = <46>; | ||
386 | |||
387 | qeic: interrupt-controller@80 { | ||
388 | interrupt-controller; | ||
389 | compatible = "fsl,qe-ic"; | ||
390 | #address-cells = <0>; | ||
391 | #interrupt-cells = <1>; | ||
392 | reg = <0x80 0x80>; | ||
393 | interrupts = <46 2 46 2>; //high:30 low:30 | ||
394 | interrupt-parent = <&mpic>; | ||
395 | }; | ||
396 | |||
397 | spi@4c0 { | ||
398 | #address-cells = <1>; | ||
399 | #size-cells = <0>; | ||
400 | compatible = "fsl,mpc8569-qe-spi", "fsl,spi"; | ||
401 | reg = <0x4c0 0x40>; | ||
402 | cell-index = <0>; | ||
403 | interrupts = <2>; | ||
404 | interrupt-parent = <&qeic>; | ||
405 | gpios = <&qe_pio_e 30 0>; | ||
406 | mode = "cpu-qe"; | ||
407 | |||
408 | serial-flash@0 { | ||
409 | compatible = "stm,m25p40"; | ||
410 | reg = <0>; | ||
411 | spi-max-frequency = <25000000>; | ||
412 | }; | ||
413 | }; | ||
414 | |||
415 | spi@500 { | ||
416 | cell-index = <1>; | ||
417 | compatible = "fsl,spi"; | ||
418 | reg = <0x500 0x40>; | ||
419 | interrupts = <1>; | ||
420 | interrupt-parent = <&qeic>; | ||
421 | mode = "cpu"; | ||
422 | }; | ||
423 | |||
424 | enet0: ucc@2000 { | ||
425 | device_type = "network"; | ||
426 | compatible = "ucc_geth"; | ||
427 | cell-index = <1>; | ||
428 | reg = <0x2000 0x200>; | ||
429 | interrupts = <32>; | ||
430 | interrupt-parent = <&qeic>; | ||
431 | local-mac-address = [ 00 00 00 00 00 00 ]; | ||
432 | rx-clock-name = "none"; | ||
433 | tx-clock-name = "clk12"; | ||
434 | pio-handle = <&pio1>; | ||
435 | phy-handle = <&qe_phy0>; | ||
436 | phy-connection-type = "rgmii-id"; | ||
437 | }; | ||
438 | |||
439 | mdio@2120 { | ||
440 | #address-cells = <1>; | ||
441 | #size-cells = <0>; | ||
442 | reg = <0x2120 0x18>; | ||
443 | compatible = "fsl,ucc-mdio"; | ||
444 | |||
445 | qe_phy0: ethernet-phy@07 { | ||
446 | interrupt-parent = <&mpic>; | ||
447 | interrupts = <1 1>; | ||
448 | reg = <0x7>; | ||
449 | device_type = "ethernet-phy"; | ||
450 | }; | ||
451 | qe_phy1: ethernet-phy@01 { | ||
452 | interrupt-parent = <&mpic>; | ||
453 | interrupts = <2 1>; | ||
454 | reg = <0x1>; | ||
455 | device_type = "ethernet-phy"; | ||
456 | }; | ||
457 | qe_phy2: ethernet-phy@02 { | ||
458 | interrupt-parent = <&mpic>; | ||
459 | interrupts = <3 1>; | ||
460 | reg = <0x2>; | ||
461 | device_type = "ethernet-phy"; | ||
462 | }; | ||
463 | qe_phy3: ethernet-phy@03 { | ||
464 | interrupt-parent = <&mpic>; | ||
465 | interrupts = <4 1>; | ||
466 | reg = <0x3>; | ||
467 | device_type = "ethernet-phy"; | ||
468 | }; | ||
469 | }; | ||
470 | |||
471 | enet2: ucc@2200 { | ||
472 | device_type = "network"; | ||
473 | compatible = "ucc_geth"; | ||
474 | cell-index = <3>; | ||
475 | reg = <0x2200 0x200>; | ||
476 | interrupts = <34>; | ||
477 | interrupt-parent = <&qeic>; | ||
478 | local-mac-address = [ 00 00 00 00 00 00 ]; | ||
479 | rx-clock-name = "none"; | ||
480 | tx-clock-name = "clk12"; | ||
481 | pio-handle = <&pio3>; | ||
482 | phy-handle = <&qe_phy2>; | ||
483 | phy-connection-type = "rgmii-id"; | ||
484 | }; | ||
485 | |||
486 | enet1: ucc@3000 { | ||
487 | device_type = "network"; | ||
488 | compatible = "ucc_geth"; | ||
489 | cell-index = <2>; | ||
490 | reg = <0x3000 0x200>; | ||
491 | interrupts = <33>; | ||
492 | interrupt-parent = <&qeic>; | ||
493 | local-mac-address = [ 00 00 00 00 00 00 ]; | ||
494 | rx-clock-name = "none"; | ||
495 | tx-clock-name = "clk17"; | ||
496 | pio-handle = <&pio2>; | ||
497 | phy-handle = <&qe_phy1>; | ||
498 | phy-connection-type = "rgmii-id"; | ||
499 | }; | ||
500 | |||
501 | enet3: ucc@3200 { | ||
502 | device_type = "network"; | ||
503 | compatible = "ucc_geth"; | ||
504 | cell-index = <4>; | ||
505 | reg = <0x3200 0x200>; | ||
506 | interrupts = <35>; | ||
507 | interrupt-parent = <&qeic>; | ||
508 | local-mac-address = [ 00 00 00 00 00 00 ]; | ||
509 | rx-clock-name = "none"; | ||
510 | tx-clock-name = "clk17"; | ||
511 | pio-handle = <&pio4>; | ||
512 | phy-handle = <&qe_phy3>; | ||
513 | phy-connection-type = "rgmii-id"; | ||
514 | }; | ||
515 | |||
516 | muram@10000 { | ||
517 | #address-cells = <1>; | ||
518 | #size-cells = <1>; | ||
519 | compatible = "fsl,qe-muram", "fsl,cpm-muram"; | ||
520 | ranges = <0x0 0x10000 0x20000>; | ||
521 | |||
522 | data-only@0 { | ||
523 | compatible = "fsl,qe-muram-data", | ||
524 | "fsl,cpm-muram-data"; | ||
525 | reg = <0x0 0x20000>; | ||
526 | }; | ||
527 | }; | ||
528 | |||
529 | }; | ||
530 | |||
531 | /* PCI Express */ | ||
532 | pci1: pcie@e000a000 { | ||
533 | compatible = "fsl,mpc8548-pcie"; | ||
534 | device_type = "pci"; | ||
535 | #interrupt-cells = <1>; | ||
536 | #size-cells = <2>; | ||
537 | #address-cells = <3>; | ||
538 | reg = <0xe000a000 0x1000>; | ||
539 | interrupt-map-mask = <0xf800 0x0 0x0 0x7>; | ||
540 | interrupt-map = < | ||
541 | /* IDSEL 0x0 (PEX) */ | ||
542 | 00000 0x0 0x0 0x1 &mpic 0x0 0x1 | ||
543 | 00000 0x0 0x0 0x2 &mpic 0x1 0x1 | ||
544 | 00000 0x0 0x0 0x3 &mpic 0x2 0x1 | ||
545 | 00000 0x0 0x0 0x4 &mpic 0x3 0x1>; | ||
546 | |||
547 | interrupt-parent = <&mpic>; | ||
548 | interrupts = <26 2>; | ||
549 | bus-range = <0 255>; | ||
550 | ranges = <0x2000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000 | ||
551 | 0x1000000 0x0 0x00000000 0xe2800000 0x0 0x00800000>; | ||
552 | clock-frequency = <33333333>; | ||
553 | pcie@0 { | ||
554 | reg = <0x0 0x0 0x0 0x0 0x0>; | ||
555 | #size-cells = <2>; | ||
556 | #address-cells = <3>; | ||
557 | device_type = "pci"; | ||
558 | ranges = <0x2000000 0x0 0xa0000000 | ||
559 | 0x2000000 0x0 0xa0000000 | ||
560 | 0x0 0x10000000 | ||
561 | |||
562 | 0x1000000 0x0 0x0 | ||
563 | 0x1000000 0x0 0x0 | ||
564 | 0x0 0x800000>; | ||
565 | }; | ||
566 | }; | ||
567 | |||
568 | rio0: rapidio@e00c00000 { | ||
569 | #address-cells = <2>; | ||
570 | #size-cells = <2>; | ||
571 | compatible = "fsl,mpc8569-rapidio", "fsl,rapidio-delta"; | ||
572 | reg = <0xe00c0000 0x20000>; | ||
573 | ranges = <0x0 0x0 0xc0000000 0x0 0x20000000>; | ||
574 | interrupts = <48 2 /* error */ | ||
575 | 49 2 /* bell_outb */ | ||
576 | 50 2 /* bell_inb */ | ||
577 | 53 2 /* msg1_tx */ | ||
578 | 54 2 /* msg1_rx */ | ||
579 | 55 2 /* msg2_tx */ | ||
580 | 56 2 /* msg2_rx */>; | ||
581 | interrupt-parent = <&mpic>; | ||
582 | }; | ||
583 | }; | ||
diff --git a/arch/powerpc/boot/dts/mpc8572ds.dts b/arch/powerpc/boot/dts/mpc8572ds.dts index 6e79a4169088..cafc1285c140 100644 --- a/arch/powerpc/boot/dts/mpc8572ds.dts +++ b/arch/powerpc/boot/dts/mpc8572ds.dts | |||
@@ -182,9 +182,21 @@ | |||
182 | device_type = "soc"; | 182 | device_type = "soc"; |
183 | compatible = "simple-bus"; | 183 | compatible = "simple-bus"; |
184 | ranges = <0x0 0 0xffe00000 0x100000>; | 184 | ranges = <0x0 0 0xffe00000 0x100000>; |
185 | reg = <0 0xffe00000 0 0x1000>; // CCSRBAR & soc regs, remove once parse code for immrbase fixed | ||
186 | bus-frequency = <0>; // Filled out by uboot. | 185 | bus-frequency = <0>; // Filled out by uboot. |
187 | 186 | ||
187 | ecm-law@0 { | ||
188 | compatible = "fsl,ecm-law"; | ||
189 | reg = <0x0 0x1000>; | ||
190 | fsl,num-laws = <12>; | ||
191 | }; | ||
192 | |||
193 | ecm@1000 { | ||
194 | compatible = "fsl,mpc8572-ecm", "fsl,ecm"; | ||
195 | reg = <0x1000 0x1000>; | ||
196 | interrupts = <17 2>; | ||
197 | interrupt-parent = <&mpic>; | ||
198 | }; | ||
199 | |||
188 | memory-controller@2000 { | 200 | memory-controller@2000 { |
189 | compatible = "fsl,mpc8572-memory-controller"; | 201 | compatible = "fsl,mpc8572-memory-controller"; |
190 | reg = <0x2000 0x1000>; | 202 | reg = <0x2000 0x1000>; |
@@ -514,7 +526,6 @@ | |||
514 | }; | 526 | }; |
515 | 527 | ||
516 | pci0: pcie@ffe08000 { | 528 | pci0: pcie@ffe08000 { |
517 | cell-index = <0>; | ||
518 | compatible = "fsl,mpc8548-pcie"; | 529 | compatible = "fsl,mpc8548-pcie"; |
519 | device_type = "pci"; | 530 | device_type = "pci"; |
520 | #interrupt-cells = <1>; | 531 | #interrupt-cells = <1>; |
@@ -724,7 +735,6 @@ | |||
724 | }; | 735 | }; |
725 | 736 | ||
726 | pci1: pcie@ffe09000 { | 737 | pci1: pcie@ffe09000 { |
727 | cell-index = <1>; | ||
728 | compatible = "fsl,mpc8548-pcie"; | 738 | compatible = "fsl,mpc8548-pcie"; |
729 | device_type = "pci"; | 739 | device_type = "pci"; |
730 | #interrupt-cells = <1>; | 740 | #interrupt-cells = <1>; |
@@ -761,7 +771,6 @@ | |||
761 | }; | 771 | }; |
762 | 772 | ||
763 | pci2: pcie@ffe0a000 { | 773 | pci2: pcie@ffe0a000 { |
764 | cell-index = <2>; | ||
765 | compatible = "fsl,mpc8548-pcie"; | 774 | compatible = "fsl,mpc8548-pcie"; |
766 | device_type = "pci"; | 775 | device_type = "pci"; |
767 | #interrupt-cells = <1>; | 776 | #interrupt-cells = <1>; |
diff --git a/arch/powerpc/boot/dts/mpc8572ds_36b.dts b/arch/powerpc/boot/dts/mpc8572ds_36b.dts index dbd81a764742..f6365db3b97d 100644 --- a/arch/powerpc/boot/dts/mpc8572ds_36b.dts +++ b/arch/powerpc/boot/dts/mpc8572ds_36b.dts | |||
@@ -182,9 +182,21 @@ | |||
182 | device_type = "soc"; | 182 | device_type = "soc"; |
183 | compatible = "simple-bus"; | 183 | compatible = "simple-bus"; |
184 | ranges = <0x0 0xf 0xffe00000 0x100000>; | 184 | ranges = <0x0 0xf 0xffe00000 0x100000>; |
185 | reg = <0xf 0xffe00000 0 0x1000>; // CCSRBAR & soc regs, remove once parse code for immrbase fixed | ||
186 | bus-frequency = <0>; // Filled out by uboot. | 185 | bus-frequency = <0>; // Filled out by uboot. |
187 | 186 | ||
187 | ecm-law@0 { | ||
188 | compatible = "fsl,ecm-law"; | ||
189 | reg = <0x0 0x1000>; | ||
190 | fsl,num-laws = <12>; | ||
191 | }; | ||
192 | |||
193 | ecm@1000 { | ||
194 | compatible = "fsl,mpc8572-ecm", "fsl,ecm"; | ||
195 | reg = <0x1000 0x1000>; | ||
196 | interrupts = <17 2>; | ||
197 | interrupt-parent = <&mpic>; | ||
198 | }; | ||
199 | |||
188 | memory-controller@2000 { | 200 | memory-controller@2000 { |
189 | compatible = "fsl,mpc8572-memory-controller"; | 201 | compatible = "fsl,mpc8572-memory-controller"; |
190 | reg = <0x2000 0x1000>; | 202 | reg = <0x2000 0x1000>; |
@@ -514,7 +526,6 @@ | |||
514 | }; | 526 | }; |
515 | 527 | ||
516 | pci0: pcie@fffe08000 { | 528 | pci0: pcie@fffe08000 { |
517 | cell-index = <0>; | ||
518 | compatible = "fsl,mpc8548-pcie"; | 529 | compatible = "fsl,mpc8548-pcie"; |
519 | device_type = "pci"; | 530 | device_type = "pci"; |
520 | #interrupt-cells = <1>; | 531 | #interrupt-cells = <1>; |
@@ -522,7 +533,7 @@ | |||
522 | #address-cells = <3>; | 533 | #address-cells = <3>; |
523 | reg = <0xf 0xffe08000 0 0x1000>; | 534 | reg = <0xf 0xffe08000 0 0x1000>; |
524 | bus-range = <0 255>; | 535 | bus-range = <0 255>; |
525 | ranges = <0x2000000 0x0 0xc0000000 0xc 0x00000000 0x0 0x20000000 | 536 | ranges = <0x2000000 0x0 0xe0000000 0xc 0x00000000 0x0 0x20000000 |
526 | 0x1000000 0x0 0x00000000 0xf 0xffc00000 0x0 0x00010000>; | 537 | 0x1000000 0x0 0x00000000 0xf 0xffc00000 0x0 0x00010000>; |
527 | clock-frequency = <33333333>; | 538 | clock-frequency = <33333333>; |
528 | interrupt-parent = <&mpic>; | 539 | interrupt-parent = <&mpic>; |
@@ -649,8 +660,8 @@ | |||
649 | #size-cells = <2>; | 660 | #size-cells = <2>; |
650 | #address-cells = <3>; | 661 | #address-cells = <3>; |
651 | device_type = "pci"; | 662 | device_type = "pci"; |
652 | ranges = <0x2000000 0x0 0xc0000000 | 663 | ranges = <0x2000000 0x0 0xe0000000 |
653 | 0x2000000 0x0 0xc0000000 | 664 | 0x2000000 0x0 0xe0000000 |
654 | 0x0 0x20000000 | 665 | 0x0 0x20000000 |
655 | 666 | ||
656 | 0x1000000 0x0 0x0 | 667 | 0x1000000 0x0 0x0 |
@@ -660,8 +671,8 @@ | |||
660 | reg = <0x0 0x0 0x0 0x0 0x0>; | 671 | reg = <0x0 0x0 0x0 0x0 0x0>; |
661 | #size-cells = <2>; | 672 | #size-cells = <2>; |
662 | #address-cells = <3>; | 673 | #address-cells = <3>; |
663 | ranges = <0x2000000 0x0 0xc0000000 | 674 | ranges = <0x2000000 0x0 0xe0000000 |
664 | 0x2000000 0x0 0xc0000000 | 675 | 0x2000000 0x0 0xe0000000 |
665 | 0x0 0x20000000 | 676 | 0x0 0x20000000 |
666 | 677 | ||
667 | 0x1000000 0x0 0x0 | 678 | 0x1000000 0x0 0x0 |
@@ -724,7 +735,6 @@ | |||
724 | }; | 735 | }; |
725 | 736 | ||
726 | pci1: pcie@fffe09000 { | 737 | pci1: pcie@fffe09000 { |
727 | cell-index = <1>; | ||
728 | compatible = "fsl,mpc8548-pcie"; | 738 | compatible = "fsl,mpc8548-pcie"; |
729 | device_type = "pci"; | 739 | device_type = "pci"; |
730 | #interrupt-cells = <1>; | 740 | #interrupt-cells = <1>; |
@@ -732,7 +742,7 @@ | |||
732 | #address-cells = <3>; | 742 | #address-cells = <3>; |
733 | reg = <0xf 0xffe09000 0 0x1000>; | 743 | reg = <0xf 0xffe09000 0 0x1000>; |
734 | bus-range = <0 255>; | 744 | bus-range = <0 255>; |
735 | ranges = <0x2000000 0x0 0xc0000000 0xc 0x20000000 0x0 0x20000000 | 745 | ranges = <0x2000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000 |
736 | 0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x00010000>; | 746 | 0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x00010000>; |
737 | clock-frequency = <33333333>; | 747 | clock-frequency = <33333333>; |
738 | interrupt-parent = <&mpic>; | 748 | interrupt-parent = <&mpic>; |
@@ -750,8 +760,8 @@ | |||
750 | #size-cells = <2>; | 760 | #size-cells = <2>; |
751 | #address-cells = <3>; | 761 | #address-cells = <3>; |
752 | device_type = "pci"; | 762 | device_type = "pci"; |
753 | ranges = <0x2000000 0x0 0xc0000000 | 763 | ranges = <0x2000000 0x0 0xe0000000 |
754 | 0x2000000 0x0 0xc0000000 | 764 | 0x2000000 0x0 0xe0000000 |
755 | 0x0 0x20000000 | 765 | 0x0 0x20000000 |
756 | 766 | ||
757 | 0x1000000 0x0 0x0 | 767 | 0x1000000 0x0 0x0 |
@@ -761,7 +771,6 @@ | |||
761 | }; | 771 | }; |
762 | 772 | ||
763 | pci2: pcie@fffe0a000 { | 773 | pci2: pcie@fffe0a000 { |
764 | cell-index = <2>; | ||
765 | compatible = "fsl,mpc8548-pcie"; | 774 | compatible = "fsl,mpc8548-pcie"; |
766 | device_type = "pci"; | 775 | device_type = "pci"; |
767 | #interrupt-cells = <1>; | 776 | #interrupt-cells = <1>; |
@@ -769,7 +778,7 @@ | |||
769 | #address-cells = <3>; | 778 | #address-cells = <3>; |
770 | reg = <0xf 0xffe0a000 0 0x1000>; | 779 | reg = <0xf 0xffe0a000 0 0x1000>; |
771 | bus-range = <0 255>; | 780 | bus-range = <0 255>; |
772 | ranges = <0x2000000 0x0 0xc0000000 0xc 0x40000000 0x0 0x20000000 | 781 | ranges = <0x2000000 0x0 0xe0000000 0xc 0x40000000 0x0 0x20000000 |
773 | 0x1000000 0x0 0x00000000 0xf 0xffc20000 0x0 0x00010000>; | 782 | 0x1000000 0x0 0x00000000 0xf 0xffc20000 0x0 0x00010000>; |
774 | clock-frequency = <33333333>; | 783 | clock-frequency = <33333333>; |
775 | interrupt-parent = <&mpic>; | 784 | interrupt-parent = <&mpic>; |
@@ -787,8 +796,8 @@ | |||
787 | #size-cells = <2>; | 796 | #size-cells = <2>; |
788 | #address-cells = <3>; | 797 | #address-cells = <3>; |
789 | device_type = "pci"; | 798 | device_type = "pci"; |
790 | ranges = <0x2000000 0x0 0xc0000000 | 799 | ranges = <0x2000000 0x0 0xe0000000 |
791 | 0x2000000 0x0 0xc0000000 | 800 | 0x2000000 0x0 0xe0000000 |
792 | 0x0 0x20000000 | 801 | 0x0 0x20000000 |
793 | 802 | ||
794 | 0x1000000 0x0 0x0 | 803 | 0x1000000 0x0 0x0 |
diff --git a/arch/powerpc/boot/dts/mpc8572ds_camp_core0.dts b/arch/powerpc/boot/dts/mpc8572ds_camp_core0.dts index 2bc0c7189653..5bd1011fde96 100644 --- a/arch/powerpc/boot/dts/mpc8572ds_camp_core0.dts +++ b/arch/powerpc/boot/dts/mpc8572ds_camp_core0.dts | |||
@@ -59,9 +59,21 @@ | |||
59 | device_type = "soc"; | 59 | device_type = "soc"; |
60 | compatible = "simple-bus"; | 60 | compatible = "simple-bus"; |
61 | ranges = <0x0 0xffe00000 0x100000>; | 61 | ranges = <0x0 0xffe00000 0x100000>; |
62 | reg = <0xffe00000 0x1000>; // CCSRBAR & soc regs, remove once parse code for immrbase fixed | ||
63 | bus-frequency = <0>; // Filled out by uboot. | 62 | bus-frequency = <0>; // Filled out by uboot. |
64 | 63 | ||
64 | ecm-law@0 { | ||
65 | compatible = "fsl,ecm-law"; | ||
66 | reg = <0x0 0x1000>; | ||
67 | fsl,num-laws = <12>; | ||
68 | }; | ||
69 | |||
70 | ecm@1000 { | ||
71 | compatible = "fsl,mpc8572-ecm", "fsl,ecm"; | ||
72 | reg = <0x1000 0x1000>; | ||
73 | interrupts = <17 2>; | ||
74 | interrupt-parent = <&mpic>; | ||
75 | }; | ||
76 | |||
65 | memory-controller@2000 { | 77 | memory-controller@2000 { |
66 | compatible = "fsl,mpc8572-memory-controller"; | 78 | compatible = "fsl,mpc8572-memory-controller"; |
67 | reg = <0x2000 0x1000>; | 79 | reg = <0x2000 0x1000>; |
@@ -238,7 +250,6 @@ | |||
238 | }; | 250 | }; |
239 | 251 | ||
240 | pci0: pcie@ffe08000 { | 252 | pci0: pcie@ffe08000 { |
241 | cell-index = <0>; | ||
242 | compatible = "fsl,mpc8548-pcie"; | 253 | compatible = "fsl,mpc8548-pcie"; |
243 | device_type = "pci"; | 254 | device_type = "pci"; |
244 | #interrupt-cells = <1>; | 255 | #interrupt-cells = <1>; |
@@ -448,7 +459,6 @@ | |||
448 | }; | 459 | }; |
449 | 460 | ||
450 | pci1: pcie@ffe09000 { | 461 | pci1: pcie@ffe09000 { |
451 | cell-index = <1>; | ||
452 | compatible = "fsl,mpc8548-pcie"; | 462 | compatible = "fsl,mpc8548-pcie"; |
453 | device_type = "pci"; | 463 | device_type = "pci"; |
454 | #interrupt-cells = <1>; | 464 | #interrupt-cells = <1>; |
diff --git a/arch/powerpc/boot/dts/mpc8572ds_camp_core1.dts b/arch/powerpc/boot/dts/mpc8572ds_camp_core1.dts index 159cb3a875f0..0efc3456e297 100644 --- a/arch/powerpc/boot/dts/mpc8572ds_camp_core1.dts +++ b/arch/powerpc/boot/dts/mpc8572ds_camp_core1.dts | |||
@@ -58,7 +58,6 @@ | |||
58 | device_type = "soc"; | 58 | device_type = "soc"; |
59 | compatible = "simple-bus"; | 59 | compatible = "simple-bus"; |
60 | ranges = <0x0 0xffe00000 0x100000>; | 60 | ranges = <0x0 0xffe00000 0x100000>; |
61 | reg = <0xffe00000 0x1000>; // CCSRBAR & soc regs, remove once parse code for immrbase fixed | ||
62 | bus-frequency = <0>; // Filled out by uboot. | 61 | bus-frequency = <0>; // Filled out by uboot. |
63 | 62 | ||
64 | L2: l2-cache-controller@20000 { | 63 | L2: l2-cache-controller@20000 { |
@@ -196,7 +195,6 @@ | |||
196 | }; | 195 | }; |
197 | 196 | ||
198 | pci2: pcie@ffe0a000 { | 197 | pci2: pcie@ffe0a000 { |
199 | cell-index = <2>; | ||
200 | compatible = "fsl,mpc8548-pcie"; | 198 | compatible = "fsl,mpc8548-pcie"; |
201 | device_type = "pci"; | 199 | device_type = "pci"; |
202 | #interrupt-cells = <1>; | 200 | #interrupt-cells = <1>; |
diff --git a/arch/powerpc/boot/dts/mpc8610_hpcd.dts b/arch/powerpc/boot/dts/mpc8610_hpcd.dts index 1bd3ebe11437..cfc2c60d1f5f 100644 --- a/arch/powerpc/boot/dts/mpc8610_hpcd.dts +++ b/arch/powerpc/boot/dts/mpc8610_hpcd.dts | |||
@@ -112,9 +112,21 @@ | |||
112 | device_type = "soc"; | 112 | device_type = "soc"; |
113 | compatible = "fsl,mpc8610-immr", "simple-bus"; | 113 | compatible = "fsl,mpc8610-immr", "simple-bus"; |
114 | ranges = <0x0 0xe0000000 0x00100000>; | 114 | ranges = <0x0 0xe0000000 0x00100000>; |
115 | reg = <0xe0000000 0x1000>; | ||
116 | bus-frequency = <0>; | 115 | bus-frequency = <0>; |
117 | 116 | ||
117 | mcm-law@0 { | ||
118 | compatible = "fsl,mcm-law"; | ||
119 | reg = <0x0 0x1000>; | ||
120 | fsl,num-laws = <10>; | ||
121 | }; | ||
122 | |||
123 | mcm@1000 { | ||
124 | compatible = "fsl,mpc8610-mcm", "fsl,mcm"; | ||
125 | reg = <0x1000 0x1000>; | ||
126 | interrupts = <17 2>; | ||
127 | interrupt-parent = <&mpic>; | ||
128 | }; | ||
129 | |||
118 | i2c@3000 { | 130 | i2c@3000 { |
119 | #address-cells = <1>; | 131 | #address-cells = <1>; |
120 | #size-cells = <0>; | 132 | #size-cells = <0>; |
@@ -316,7 +328,6 @@ | |||
316 | }; | 328 | }; |
317 | 329 | ||
318 | pci0: pci@e0008000 { | 330 | pci0: pci@e0008000 { |
319 | cell-index = <0>; | ||
320 | compatible = "fsl,mpc8610-pci"; | 331 | compatible = "fsl,mpc8610-pci"; |
321 | device_type = "pci"; | 332 | device_type = "pci"; |
322 | #interrupt-cells = <1>; | 333 | #interrupt-cells = <1>; |
@@ -346,7 +357,6 @@ | |||
346 | }; | 357 | }; |
347 | 358 | ||
348 | pci1: pcie@e000a000 { | 359 | pci1: pcie@e000a000 { |
349 | cell-index = <1>; | ||
350 | compatible = "fsl,mpc8641-pcie"; | 360 | compatible = "fsl,mpc8641-pcie"; |
351 | device_type = "pci"; | 361 | device_type = "pci"; |
352 | #interrupt-cells = <1>; | 362 | #interrupt-cells = <1>; |
diff --git a/arch/powerpc/boot/dts/mpc8641_hpcn.dts b/arch/powerpc/boot/dts/mpc8641_hpcn.dts index d72beb192460..848320e4d3c4 100644 --- a/arch/powerpc/boot/dts/mpc8641_hpcn.dts +++ b/arch/powerpc/boot/dts/mpc8641_hpcn.dts | |||
@@ -114,9 +114,21 @@ | |||
114 | device_type = "soc"; | 114 | device_type = "soc"; |
115 | compatible = "simple-bus"; | 115 | compatible = "simple-bus"; |
116 | ranges = <0x00000000 0xffe00000 0x00100000>; | 116 | ranges = <0x00000000 0xffe00000 0x00100000>; |
117 | reg = <0xffe00000 0x00001000>; // CCSRBAR | ||
118 | bus-frequency = <0>; | 117 | bus-frequency = <0>; |
119 | 118 | ||
119 | mcm-law@0 { | ||
120 | compatible = "fsl,mcm-law"; | ||
121 | reg = <0x0 0x1000>; | ||
122 | fsl,num-laws = <10>; | ||
123 | }; | ||
124 | |||
125 | mcm@1000 { | ||
126 | compatible = "fsl,mpc8641-mcm", "fsl,mcm"; | ||
127 | reg = <0x1000 0x1000>; | ||
128 | interrupts = <17 2>; | ||
129 | interrupt-parent = <&mpic>; | ||
130 | }; | ||
131 | |||
120 | i2c@3000 { | 132 | i2c@3000 { |
121 | #address-cells = <1>; | 133 | #address-cells = <1>; |
122 | #size-cells = <0>; | 134 | #size-cells = <0>; |
@@ -357,7 +369,6 @@ | |||
357 | }; | 369 | }; |
358 | 370 | ||
359 | pci0: pcie@ffe08000 { | 371 | pci0: pcie@ffe08000 { |
360 | cell-index = <0>; | ||
361 | compatible = "fsl,mpc8641-pcie"; | 372 | compatible = "fsl,mpc8641-pcie"; |
362 | device_type = "pci"; | 373 | device_type = "pci"; |
363 | #interrupt-cells = <1>; | 374 | #interrupt-cells = <1>; |
@@ -566,7 +577,6 @@ | |||
566 | }; | 577 | }; |
567 | 578 | ||
568 | pci1: pcie@ffe09000 { | 579 | pci1: pcie@ffe09000 { |
569 | cell-index = <1>; | ||
570 | compatible = "fsl,mpc8641-pcie"; | 580 | compatible = "fsl,mpc8641-pcie"; |
571 | device_type = "pci"; | 581 | device_type = "pci"; |
572 | #interrupt-cells = <1>; | 582 | #interrupt-cells = <1>; |
diff --git a/arch/powerpc/boot/dts/mpc8641_hpcn_36b.dts b/arch/powerpc/boot/dts/mpc8641_hpcn_36b.dts new file mode 100644 index 000000000000..8be8e701e1d3 --- /dev/null +++ b/arch/powerpc/boot/dts/mpc8641_hpcn_36b.dts | |||
@@ -0,0 +1,609 @@ | |||
1 | /* | ||
2 | * MPC8641 HPCN Device Tree Source | ||
3 | * | ||
4 | * Copyright 2008-2009 Freescale Semiconductor Inc. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify it | ||
7 | * under the terms of the GNU General Public License as published by the | ||
8 | * Free Software Foundation; either version 2 of the License, or (at your | ||
9 | * option) any later version. | ||
10 | */ | ||
11 | |||
12 | /dts-v1/; | ||
13 | |||
14 | / { | ||
15 | model = "MPC8641HPCN"; | ||
16 | compatible = "fsl,mpc8641hpcn"; | ||
17 | #address-cells = <2>; | ||
18 | #size-cells = <2>; | ||
19 | |||
20 | aliases { | ||
21 | ethernet0 = &enet0; | ||
22 | ethernet1 = &enet1; | ||
23 | ethernet2 = &enet2; | ||
24 | ethernet3 = &enet3; | ||
25 | serial0 = &serial0; | ||
26 | serial1 = &serial1; | ||
27 | pci0 = &pci0; | ||
28 | pci1 = &pci1; | ||
29 | }; | ||
30 | |||
31 | cpus { | ||
32 | #address-cells = <1>; | ||
33 | #size-cells = <0>; | ||
34 | |||
35 | PowerPC,8641@0 { | ||
36 | device_type = "cpu"; | ||
37 | reg = <0>; | ||
38 | d-cache-line-size = <32>; // 32 bytes | ||
39 | i-cache-line-size = <32>; // 32 bytes | ||
40 | d-cache-size = <32768>; // L1, 32K | ||
41 | i-cache-size = <32768>; // L1, 32K | ||
42 | timebase-frequency = <0>; // 33 MHz, from uboot | ||
43 | bus-frequency = <0>; // From uboot | ||
44 | clock-frequency = <0>; // From uboot | ||
45 | }; | ||
46 | PowerPC,8641@1 { | ||
47 | device_type = "cpu"; | ||
48 | reg = <1>; | ||
49 | d-cache-line-size = <32>; // 32 bytes | ||
50 | i-cache-line-size = <32>; // 32 bytes | ||
51 | d-cache-size = <32768>; // L1, 32K | ||
52 | i-cache-size = <32768>; // L1, 32K | ||
53 | timebase-frequency = <0>; // 33 MHz, from uboot | ||
54 | bus-frequency = <0>; // From uboot | ||
55 | clock-frequency = <0>; // From uboot | ||
56 | }; | ||
57 | }; | ||
58 | |||
59 | memory { | ||
60 | device_type = "memory"; | ||
61 | reg = <0x0 0x00000000 0x0 0x40000000>; // 1G at 0x0 | ||
62 | }; | ||
63 | |||
64 | localbus@fffe05000 { | ||
65 | #address-cells = <2>; | ||
66 | #size-cells = <1>; | ||
67 | compatible = "fsl,mpc8641-localbus", "simple-bus"; | ||
68 | reg = <0x0f 0xffe05000 0x0 0x1000>; | ||
69 | interrupts = <19 2>; | ||
70 | interrupt-parent = <&mpic>; | ||
71 | |||
72 | ranges = <0 0 0xf 0xef800000 0x00800000 | ||
73 | 2 0 0xf 0xffdf8000 0x00008000 | ||
74 | 3 0 0xf 0xffdf0000 0x00008000>; | ||
75 | |||
76 | flash@0,0 { | ||
77 | compatible = "cfi-flash"; | ||
78 | reg = <0 0 0x00800000>; | ||
79 | bank-width = <2>; | ||
80 | device-width = <2>; | ||
81 | #address-cells = <1>; | ||
82 | #size-cells = <1>; | ||
83 | partition@0 { | ||
84 | label = "kernel"; | ||
85 | reg = <0x00000000 0x00300000>; | ||
86 | }; | ||
87 | partition@300000 { | ||
88 | label = "firmware b"; | ||
89 | reg = <0x00300000 0x00100000>; | ||
90 | read-only; | ||
91 | }; | ||
92 | partition@400000 { | ||
93 | label = "fs"; | ||
94 | reg = <0x00400000 0x00300000>; | ||
95 | }; | ||
96 | partition@700000 { | ||
97 | label = "firmware a"; | ||
98 | reg = <0x00700000 0x00100000>; | ||
99 | read-only; | ||
100 | }; | ||
101 | }; | ||
102 | }; | ||
103 | |||
104 | soc8641@fffe00000 { | ||
105 | #address-cells = <1>; | ||
106 | #size-cells = <1>; | ||
107 | device_type = "soc"; | ||
108 | compatible = "simple-bus"; | ||
109 | ranges = <0x00000000 0x0f 0xffe00000 0x00100000>; | ||
110 | bus-frequency = <0>; | ||
111 | |||
112 | mcm-law@0 { | ||
113 | compatible = "fsl,mcm-law"; | ||
114 | reg = <0x0 0x1000>; | ||
115 | fsl,num-laws = <10>; | ||
116 | }; | ||
117 | |||
118 | mcm@1000 { | ||
119 | compatible = "fsl,mpc8641-mcm", "fsl,mcm"; | ||
120 | reg = <0x1000 0x1000>; | ||
121 | interrupts = <17 2>; | ||
122 | interrupt-parent = <&mpic>; | ||
123 | }; | ||
124 | |||
125 | i2c@3000 { | ||
126 | #address-cells = <1>; | ||
127 | #size-cells = <0>; | ||
128 | cell-index = <0>; | ||
129 | compatible = "fsl-i2c"; | ||
130 | reg = <0x3000 0x100>; | ||
131 | interrupts = <43 2>; | ||
132 | interrupt-parent = <&mpic>; | ||
133 | dfsrr; | ||
134 | }; | ||
135 | |||
136 | i2c@3100 { | ||
137 | #address-cells = <1>; | ||
138 | #size-cells = <0>; | ||
139 | cell-index = <1>; | ||
140 | compatible = "fsl-i2c"; | ||
141 | reg = <0x3100 0x100>; | ||
142 | interrupts = <43 2>; | ||
143 | interrupt-parent = <&mpic>; | ||
144 | dfsrr; | ||
145 | }; | ||
146 | |||
147 | dma@21300 { | ||
148 | #address-cells = <1>; | ||
149 | #size-cells = <1>; | ||
150 | compatible = "fsl,mpc8641-dma", "fsl,eloplus-dma"; | ||
151 | reg = <0x21300 0x4>; | ||
152 | ranges = <0x0 0x21100 0x200>; | ||
153 | cell-index = <0>; | ||
154 | dma-channel@0 { | ||
155 | compatible = "fsl,mpc8641-dma-channel", | ||
156 | "fsl,eloplus-dma-channel"; | ||
157 | reg = <0x0 0x80>; | ||
158 | cell-index = <0>; | ||
159 | interrupt-parent = <&mpic>; | ||
160 | interrupts = <20 2>; | ||
161 | }; | ||
162 | dma-channel@80 { | ||
163 | compatible = "fsl,mpc8641-dma-channel", | ||
164 | "fsl,eloplus-dma-channel"; | ||
165 | reg = <0x80 0x80>; | ||
166 | cell-index = <1>; | ||
167 | interrupt-parent = <&mpic>; | ||
168 | interrupts = <21 2>; | ||
169 | }; | ||
170 | dma-channel@100 { | ||
171 | compatible = "fsl,mpc8641-dma-channel", | ||
172 | "fsl,eloplus-dma-channel"; | ||
173 | reg = <0x100 0x80>; | ||
174 | cell-index = <2>; | ||
175 | interrupt-parent = <&mpic>; | ||
176 | interrupts = <22 2>; | ||
177 | }; | ||
178 | dma-channel@180 { | ||
179 | compatible = "fsl,mpc8641-dma-channel", | ||
180 | "fsl,eloplus-dma-channel"; | ||
181 | reg = <0x180 0x80>; | ||
182 | cell-index = <3>; | ||
183 | interrupt-parent = <&mpic>; | ||
184 | interrupts = <23 2>; | ||
185 | }; | ||
186 | }; | ||
187 | |||
188 | enet0: ethernet@24000 { | ||
189 | #address-cells = <1>; | ||
190 | #size-cells = <1>; | ||
191 | cell-index = <0>; | ||
192 | device_type = "network"; | ||
193 | model = "TSEC"; | ||
194 | compatible = "gianfar"; | ||
195 | reg = <0x24000 0x1000>; | ||
196 | ranges = <0x0 0x24000 0x1000>; | ||
197 | local-mac-address = [ 00 00 00 00 00 00 ]; | ||
198 | interrupts = <29 2 30 2 34 2>; | ||
199 | interrupt-parent = <&mpic>; | ||
200 | tbi-handle = <&tbi0>; | ||
201 | phy-handle = <&phy0>; | ||
202 | phy-connection-type = "rgmii-id"; | ||
203 | |||
204 | mdio@520 { | ||
205 | #address-cells = <1>; | ||
206 | #size-cells = <0>; | ||
207 | compatible = "fsl,gianfar-mdio"; | ||
208 | reg = <0x520 0x20>; | ||
209 | |||
210 | phy0: ethernet-phy@0 { | ||
211 | interrupt-parent = <&mpic>; | ||
212 | interrupts = <10 1>; | ||
213 | reg = <0>; | ||
214 | device_type = "ethernet-phy"; | ||
215 | }; | ||
216 | phy1: ethernet-phy@1 { | ||
217 | interrupt-parent = <&mpic>; | ||
218 | interrupts = <10 1>; | ||
219 | reg = <1>; | ||
220 | device_type = "ethernet-phy"; | ||
221 | }; | ||
222 | phy2: ethernet-phy@2 { | ||
223 | interrupt-parent = <&mpic>; | ||
224 | interrupts = <10 1>; | ||
225 | reg = <2>; | ||
226 | device_type = "ethernet-phy"; | ||
227 | }; | ||
228 | phy3: ethernet-phy@3 { | ||
229 | interrupt-parent = <&mpic>; | ||
230 | interrupts = <10 1>; | ||
231 | reg = <3>; | ||
232 | device_type = "ethernet-phy"; | ||
233 | }; | ||
234 | tbi0: tbi-phy@11 { | ||
235 | reg = <0x11>; | ||
236 | device_type = "tbi-phy"; | ||
237 | }; | ||
238 | }; | ||
239 | }; | ||
240 | |||
241 | enet1: ethernet@25000 { | ||
242 | #address-cells = <1>; | ||
243 | #size-cells = <1>; | ||
244 | cell-index = <1>; | ||
245 | device_type = "network"; | ||
246 | model = "TSEC"; | ||
247 | compatible = "gianfar"; | ||
248 | reg = <0x25000 0x1000>; | ||
249 | ranges = <0x0 0x25000 0x1000>; | ||
250 | local-mac-address = [ 00 00 00 00 00 00 ]; | ||
251 | interrupts = <35 2 36 2 40 2>; | ||
252 | interrupt-parent = <&mpic>; | ||
253 | tbi-handle = <&tbi1>; | ||
254 | phy-handle = <&phy1>; | ||
255 | phy-connection-type = "rgmii-id"; | ||
256 | |||
257 | mdio@520 { | ||
258 | #address-cells = <1>; | ||
259 | #size-cells = <0>; | ||
260 | compatible = "fsl,gianfar-tbi"; | ||
261 | reg = <0x520 0x20>; | ||
262 | |||
263 | tbi1: tbi-phy@11 { | ||
264 | reg = <0x11>; | ||
265 | device_type = "tbi-phy"; | ||
266 | }; | ||
267 | }; | ||
268 | }; | ||
269 | |||
270 | enet2: ethernet@26000 { | ||
271 | #address-cells = <1>; | ||
272 | #size-cells = <1>; | ||
273 | cell-index = <2>; | ||
274 | device_type = "network"; | ||
275 | model = "TSEC"; | ||
276 | compatible = "gianfar"; | ||
277 | reg = <0x26000 0x1000>; | ||
278 | ranges = <0x0 0x26000 0x1000>; | ||
279 | local-mac-address = [ 00 00 00 00 00 00 ]; | ||
280 | interrupts = <31 2 32 2 33 2>; | ||
281 | interrupt-parent = <&mpic>; | ||
282 | tbi-handle = <&tbi2>; | ||
283 | phy-handle = <&phy2>; | ||
284 | phy-connection-type = "rgmii-id"; | ||
285 | |||
286 | mdio@520 { | ||
287 | #address-cells = <1>; | ||
288 | #size-cells = <0>; | ||
289 | compatible = "fsl,gianfar-tbi"; | ||
290 | reg = <0x520 0x20>; | ||
291 | |||
292 | tbi2: tbi-phy@11 { | ||
293 | reg = <0x11>; | ||
294 | device_type = "tbi-phy"; | ||
295 | }; | ||
296 | }; | ||
297 | }; | ||
298 | |||
299 | enet3: ethernet@27000 { | ||
300 | #address-cells = <1>; | ||
301 | #size-cells = <1>; | ||
302 | cell-index = <3>; | ||
303 | device_type = "network"; | ||
304 | model = "TSEC"; | ||
305 | compatible = "gianfar"; | ||
306 | reg = <0x27000 0x1000>; | ||
307 | ranges = <0x0 0x27000 0x1000>; | ||
308 | local-mac-address = [ 00 00 00 00 00 00 ]; | ||
309 | interrupts = <37 2 38 2 39 2>; | ||
310 | interrupt-parent = <&mpic>; | ||
311 | tbi-handle = <&tbi3>; | ||
312 | phy-handle = <&phy3>; | ||
313 | phy-connection-type = "rgmii-id"; | ||
314 | |||
315 | mdio@520 { | ||
316 | #address-cells = <1>; | ||
317 | #size-cells = <0>; | ||
318 | compatible = "fsl,gianfar-tbi"; | ||
319 | reg = <0x520 0x20>; | ||
320 | |||
321 | tbi3: tbi-phy@11 { | ||
322 | reg = <0x11>; | ||
323 | device_type = "tbi-phy"; | ||
324 | }; | ||
325 | }; | ||
326 | }; | ||
327 | |||
328 | serial0: serial@4500 { | ||
329 | cell-index = <0>; | ||
330 | device_type = "serial"; | ||
331 | compatible = "ns16550"; | ||
332 | reg = <0x4500 0x100>; | ||
333 | clock-frequency = <0>; | ||
334 | interrupts = <42 2>; | ||
335 | interrupt-parent = <&mpic>; | ||
336 | }; | ||
337 | |||
338 | serial1: serial@4600 { | ||
339 | cell-index = <1>; | ||
340 | device_type = "serial"; | ||
341 | compatible = "ns16550"; | ||
342 | reg = <0x4600 0x100>; | ||
343 | clock-frequency = <0>; | ||
344 | interrupts = <28 2>; | ||
345 | interrupt-parent = <&mpic>; | ||
346 | }; | ||
347 | |||
348 | mpic: pic@40000 { | ||
349 | interrupt-controller; | ||
350 | #address-cells = <0>; | ||
351 | #interrupt-cells = <2>; | ||
352 | reg = <0x40000 0x40000>; | ||
353 | compatible = "chrp,open-pic"; | ||
354 | device_type = "open-pic"; | ||
355 | }; | ||
356 | |||
357 | global-utilities@e0000 { | ||
358 | compatible = "fsl,mpc8641-guts"; | ||
359 | reg = <0xe0000 0x1000>; | ||
360 | fsl,has-rstcr; | ||
361 | }; | ||
362 | }; | ||
363 | |||
364 | pci0: pcie@fffe08000 { | ||
365 | cell-index = <0>; | ||
366 | compatible = "fsl,mpc8641-pcie"; | ||
367 | device_type = "pci"; | ||
368 | #interrupt-cells = <1>; | ||
369 | #size-cells = <2>; | ||
370 | #address-cells = <3>; | ||
371 | reg = <0x0f 0xffe08000 0x0 0x1000>; | ||
372 | bus-range = <0x0 0xff>; | ||
373 | ranges = <0x02000000 0x0 0xe0000000 0x0c 0x00000000 0x0 0x20000000 | ||
374 | 0x01000000 0x0 0x00000000 0x0f 0xffc00000 0x0 0x00010000>; | ||
375 | clock-frequency = <33333333>; | ||
376 | interrupt-parent = <&mpic>; | ||
377 | interrupts = <24 2>; | ||
378 | interrupt-map-mask = <0xff00 0 0 7>; | ||
379 | interrupt-map = < | ||
380 | /* IDSEL 0x11 func 0 - PCI slot 1 */ | ||
381 | 0x8800 0 0 1 &mpic 2 1 | ||
382 | 0x8800 0 0 2 &mpic 3 1 | ||
383 | 0x8800 0 0 3 &mpic 4 1 | ||
384 | 0x8800 0 0 4 &mpic 1 1 | ||
385 | |||
386 | /* IDSEL 0x11 func 1 - PCI slot 1 */ | ||
387 | 0x8900 0 0 1 &mpic 2 1 | ||
388 | 0x8900 0 0 2 &mpic 3 1 | ||
389 | 0x8900 0 0 3 &mpic 4 1 | ||
390 | 0x8900 0 0 4 &mpic 1 1 | ||
391 | |||
392 | /* IDSEL 0x11 func 2 - PCI slot 1 */ | ||
393 | 0x8a00 0 0 1 &mpic 2 1 | ||
394 | 0x8a00 0 0 2 &mpic 3 1 | ||
395 | 0x8a00 0 0 3 &mpic 4 1 | ||
396 | 0x8a00 0 0 4 &mpic 1 1 | ||
397 | |||
398 | /* IDSEL 0x11 func 3 - PCI slot 1 */ | ||
399 | 0x8b00 0 0 1 &mpic 2 1 | ||
400 | 0x8b00 0 0 2 &mpic 3 1 | ||
401 | 0x8b00 0 0 3 &mpic 4 1 | ||
402 | 0x8b00 0 0 4 &mpic 1 1 | ||
403 | |||
404 | /* IDSEL 0x11 func 4 - PCI slot 1 */ | ||
405 | 0x8c00 0 0 1 &mpic 2 1 | ||
406 | 0x8c00 0 0 2 &mpic 3 1 | ||
407 | 0x8c00 0 0 3 &mpic 4 1 | ||
408 | 0x8c00 0 0 4 &mpic 1 1 | ||
409 | |||
410 | /* IDSEL 0x11 func 5 - PCI slot 1 */ | ||
411 | 0x8d00 0 0 1 &mpic 2 1 | ||
412 | 0x8d00 0 0 2 &mpic 3 1 | ||
413 | 0x8d00 0 0 3 &mpic 4 1 | ||
414 | 0x8d00 0 0 4 &mpic 1 1 | ||
415 | |||
416 | /* IDSEL 0x11 func 6 - PCI slot 1 */ | ||
417 | 0x8e00 0 0 1 &mpic 2 1 | ||
418 | 0x8e00 0 0 2 &mpic 3 1 | ||
419 | 0x8e00 0 0 3 &mpic 4 1 | ||
420 | 0x8e00 0 0 4 &mpic 1 1 | ||
421 | |||
422 | /* IDSEL 0x11 func 7 - PCI slot 1 */ | ||
423 | 0x8f00 0 0 1 &mpic 2 1 | ||
424 | 0x8f00 0 0 2 &mpic 3 1 | ||
425 | 0x8f00 0 0 3 &mpic 4 1 | ||
426 | 0x8f00 0 0 4 &mpic 1 1 | ||
427 | |||
428 | /* IDSEL 0x12 func 0 - PCI slot 2 */ | ||
429 | 0x9000 0 0 1 &mpic 3 1 | ||
430 | 0x9000 0 0 2 &mpic 4 1 | ||
431 | 0x9000 0 0 3 &mpic 1 1 | ||
432 | 0x9000 0 0 4 &mpic 2 1 | ||
433 | |||
434 | /* IDSEL 0x12 func 1 - PCI slot 2 */ | ||
435 | 0x9100 0 0 1 &mpic 3 1 | ||
436 | 0x9100 0 0 2 &mpic 4 1 | ||
437 | 0x9100 0 0 3 &mpic 1 1 | ||
438 | 0x9100 0 0 4 &mpic 2 1 | ||
439 | |||
440 | /* IDSEL 0x12 func 2 - PCI slot 2 */ | ||
441 | 0x9200 0 0 1 &mpic 3 1 | ||
442 | 0x9200 0 0 2 &mpic 4 1 | ||
443 | 0x9200 0 0 3 &mpic 1 1 | ||
444 | 0x9200 0 0 4 &mpic 2 1 | ||
445 | |||
446 | /* IDSEL 0x12 func 3 - PCI slot 2 */ | ||
447 | 0x9300 0 0 1 &mpic 3 1 | ||
448 | 0x9300 0 0 2 &mpic 4 1 | ||
449 | 0x9300 0 0 3 &mpic 1 1 | ||
450 | 0x9300 0 0 4 &mpic 2 1 | ||
451 | |||
452 | /* IDSEL 0x12 func 4 - PCI slot 2 */ | ||
453 | 0x9400 0 0 1 &mpic 3 1 | ||
454 | 0x9400 0 0 2 &mpic 4 1 | ||
455 | 0x9400 0 0 3 &mpic 1 1 | ||
456 | 0x9400 0 0 4 &mpic 2 1 | ||
457 | |||
458 | /* IDSEL 0x12 func 5 - PCI slot 2 */ | ||
459 | 0x9500 0 0 1 &mpic 3 1 | ||
460 | 0x9500 0 0 2 &mpic 4 1 | ||
461 | 0x9500 0 0 3 &mpic 1 1 | ||
462 | 0x9500 0 0 4 &mpic 2 1 | ||
463 | |||
464 | /* IDSEL 0x12 func 6 - PCI slot 2 */ | ||
465 | 0x9600 0 0 1 &mpic 3 1 | ||
466 | 0x9600 0 0 2 &mpic 4 1 | ||
467 | 0x9600 0 0 3 &mpic 1 1 | ||
468 | 0x9600 0 0 4 &mpic 2 1 | ||
469 | |||
470 | /* IDSEL 0x12 func 7 - PCI slot 2 */ | ||
471 | 0x9700 0 0 1 &mpic 3 1 | ||
472 | 0x9700 0 0 2 &mpic 4 1 | ||
473 | 0x9700 0 0 3 &mpic 1 1 | ||
474 | 0x9700 0 0 4 &mpic 2 1 | ||
475 | |||
476 | // IDSEL 0x1c USB | ||
477 | 0xe000 0 0 1 &i8259 12 2 | ||
478 | 0xe100 0 0 2 &i8259 9 2 | ||
479 | 0xe200 0 0 3 &i8259 10 2 | ||
480 | 0xe300 0 0 4 &i8259 11 2 | ||
481 | |||
482 | // IDSEL 0x1d Audio | ||
483 | 0xe800 0 0 1 &i8259 6 2 | ||
484 | |||
485 | // IDSEL 0x1e Legacy | ||
486 | 0xf000 0 0 1 &i8259 7 2 | ||
487 | 0xf100 0 0 1 &i8259 7 2 | ||
488 | |||
489 | // IDSEL 0x1f IDE/SATA | ||
490 | 0xf800 0 0 1 &i8259 14 2 | ||
491 | 0xf900 0 0 1 &i8259 5 2 | ||
492 | >; | ||
493 | |||
494 | pcie@0 { | ||
495 | reg = <0 0 0 0 0>; | ||
496 | #size-cells = <2>; | ||
497 | #address-cells = <3>; | ||
498 | device_type = "pci"; | ||
499 | ranges = <0x02000000 0x0 0xe0000000 | ||
500 | 0x02000000 0x0 0xe0000000 | ||
501 | 0x0 0x20000000 | ||
502 | |||
503 | 0x01000000 0x0 0x00000000 | ||
504 | 0x01000000 0x0 0x00000000 | ||
505 | 0x0 0x00010000>; | ||
506 | uli1575@0 { | ||
507 | reg = <0 0 0 0 0>; | ||
508 | #size-cells = <2>; | ||
509 | #address-cells = <3>; | ||
510 | ranges = <0x02000000 0x0 0xe0000000 | ||
511 | 0x02000000 0x0 0xe0000000 | ||
512 | 0x0 0x20000000 | ||
513 | 0x01000000 0x0 0x00000000 | ||
514 | 0x01000000 0x0 0x00000000 | ||
515 | 0x0 0x00010000>; | ||
516 | isa@1e { | ||
517 | device_type = "isa"; | ||
518 | #interrupt-cells = <2>; | ||
519 | #size-cells = <1>; | ||
520 | #address-cells = <2>; | ||
521 | reg = <0xf000 0 0 0 0>; | ||
522 | ranges = <1 0 0x01000000 0 0 | ||
523 | 0x00001000>; | ||
524 | interrupt-parent = <&i8259>; | ||
525 | |||
526 | i8259: interrupt-controller@20 { | ||
527 | reg = <1 0x20 2 | ||
528 | 1 0xa0 2 | ||
529 | 1 0x4d0 2>; | ||
530 | interrupt-controller; | ||
531 | device_type = "interrupt-controller"; | ||
532 | #address-cells = <0>; | ||
533 | #interrupt-cells = <2>; | ||
534 | compatible = "chrp,iic"; | ||
535 | interrupts = <9 2>; | ||
536 | interrupt-parent = <&mpic>; | ||
537 | }; | ||
538 | |||
539 | i8042@60 { | ||
540 | #size-cells = <0>; | ||
541 | #address-cells = <1>; | ||
542 | reg = <1 0x60 1 1 0x64 1>; | ||
543 | interrupts = <1 3 12 3>; | ||
544 | interrupt-parent = | ||
545 | <&i8259>; | ||
546 | |||
547 | keyboard@0 { | ||
548 | reg = <0>; | ||
549 | compatible = "pnpPNP,303"; | ||
550 | }; | ||
551 | |||
552 | mouse@1 { | ||
553 | reg = <1>; | ||
554 | compatible = "pnpPNP,f03"; | ||
555 | }; | ||
556 | }; | ||
557 | |||
558 | rtc@70 { | ||
559 | compatible = | ||
560 | "pnpPNP,b00"; | ||
561 | reg = <1 0x70 2>; | ||
562 | }; | ||
563 | |||
564 | gpio@400 { | ||
565 | reg = <1 0x400 0x80>; | ||
566 | }; | ||
567 | }; | ||
568 | }; | ||
569 | }; | ||
570 | |||
571 | }; | ||
572 | |||
573 | pci1: pcie@fffe09000 { | ||
574 | cell-index = <1>; | ||
575 | compatible = "fsl,mpc8641-pcie"; | ||
576 | device_type = "pci"; | ||
577 | #interrupt-cells = <1>; | ||
578 | #size-cells = <2>; | ||
579 | #address-cells = <3>; | ||
580 | reg = <0x0f 0xffe09000 0x0 0x1000>; | ||
581 | bus-range = <0x0 0xff>; | ||
582 | ranges = <0x02000000 0x0 0xe0000000 0x0c 0x20000000 0x0 0x20000000 | ||
583 | 0x01000000 0x0 0x00000000 0x0f 0xffc10000 0x0 0x00010000>; | ||
584 | clock-frequency = <33333333>; | ||
585 | interrupt-parent = <&mpic>; | ||
586 | interrupts = <25 2>; | ||
587 | interrupt-map-mask = <0xf800 0 0 7>; | ||
588 | interrupt-map = < | ||
589 | /* IDSEL 0x0 */ | ||
590 | 0x0000 0 0 1 &mpic 4 1 | ||
591 | 0x0000 0 0 2 &mpic 5 1 | ||
592 | 0x0000 0 0 3 &mpic 6 1 | ||
593 | 0x0000 0 0 4 &mpic 7 1 | ||
594 | >; | ||
595 | pcie@0 { | ||
596 | reg = <0 0 0 0 0>; | ||
597 | #size-cells = <2>; | ||
598 | #address-cells = <3>; | ||
599 | device_type = "pci"; | ||
600 | ranges = <0x02000000 0x0 0xe0000000 | ||
601 | 0x02000000 0x0 0xe0000000 | ||
602 | 0x0 0x20000000 | ||
603 | |||
604 | 0x01000000 0x0 0x00000000 | ||
605 | 0x01000000 0x0 0x00000000 | ||
606 | 0x0 0x00010000>; | ||
607 | }; | ||
608 | }; | ||
609 | }; | ||
diff --git a/arch/powerpc/boot/dts/p2020ds.dts b/arch/powerpc/boot/dts/p2020ds.dts new file mode 100644 index 000000000000..11019142813c --- /dev/null +++ b/arch/powerpc/boot/dts/p2020ds.dts | |||
@@ -0,0 +1,704 @@ | |||
1 | /* | ||
2 | * P2020 DS Device Tree Source | ||
3 | * | ||
4 | * Copyright 2009 Freescale Semiconductor Inc. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify it | ||
7 | * under the terms of the GNU General Public License as published by the | ||
8 | * Free Software Foundation; either version 2 of the License, or (at your | ||
9 | * option) any later version. | ||
10 | */ | ||
11 | |||
12 | /dts-v1/; | ||
13 | / { | ||
14 | model = "fsl,P2020"; | ||
15 | compatible = "fsl,P2020DS"; | ||
16 | #address-cells = <2>; | ||
17 | #size-cells = <2>; | ||
18 | |||
19 | aliases { | ||
20 | ethernet0 = &enet0; | ||
21 | ethernet1 = &enet1; | ||
22 | ethernet2 = &enet2; | ||
23 | serial0 = &serial0; | ||
24 | serial1 = &serial1; | ||
25 | pci0 = &pci0; | ||
26 | pci1 = &pci1; | ||
27 | pci2 = &pci2; | ||
28 | }; | ||
29 | |||
30 | cpus { | ||
31 | #address-cells = <1>; | ||
32 | #size-cells = <0>; | ||
33 | |||
34 | PowerPC,P2020@0 { | ||
35 | device_type = "cpu"; | ||
36 | reg = <0x0>; | ||
37 | next-level-cache = <&L2>; | ||
38 | }; | ||
39 | |||
40 | PowerPC,P2020@1 { | ||
41 | device_type = "cpu"; | ||
42 | reg = <0x1>; | ||
43 | next-level-cache = <&L2>; | ||
44 | }; | ||
45 | }; | ||
46 | |||
47 | memory { | ||
48 | device_type = "memory"; | ||
49 | }; | ||
50 | |||
51 | localbus@ffe05000 { | ||
52 | #address-cells = <2>; | ||
53 | #size-cells = <1>; | ||
54 | compatible = "fsl,elbc", "simple-bus"; | ||
55 | reg = <0 0xffe05000 0 0x1000>; | ||
56 | interrupts = <19 2>; | ||
57 | interrupt-parent = <&mpic>; | ||
58 | |||
59 | ranges = <0x0 0x0 0x0 0xe8000000 0x08000000 | ||
60 | 0x1 0x0 0x0 0xe0000000 0x08000000 | ||
61 | 0x2 0x0 0x0 0xffa00000 0x00040000 | ||
62 | 0x3 0x0 0x0 0xffdf0000 0x00008000 | ||
63 | 0x4 0x0 0x0 0xffa40000 0x00040000 | ||
64 | 0x5 0x0 0x0 0xffa80000 0x00040000 | ||
65 | 0x6 0x0 0x0 0xffac0000 0x00040000>; | ||
66 | |||
67 | nor@0,0 { | ||
68 | #address-cells = <1>; | ||
69 | #size-cells = <1>; | ||
70 | compatible = "cfi-flash"; | ||
71 | reg = <0x0 0x0 0x8000000>; | ||
72 | bank-width = <2>; | ||
73 | device-width = <1>; | ||
74 | |||
75 | ramdisk@0 { | ||
76 | reg = <0x0 0x03000000>; | ||
77 | read-only; | ||
78 | }; | ||
79 | |||
80 | diagnostic@3000000 { | ||
81 | reg = <0x03000000 0x00e00000>; | ||
82 | read-only; | ||
83 | }; | ||
84 | |||
85 | dink@3e00000 { | ||
86 | reg = <0x03e00000 0x00200000>; | ||
87 | read-only; | ||
88 | }; | ||
89 | |||
90 | kernel@4000000 { | ||
91 | reg = <0x04000000 0x00400000>; | ||
92 | read-only; | ||
93 | }; | ||
94 | |||
95 | jffs2@4400000 { | ||
96 | reg = <0x04400000 0x03b00000>; | ||
97 | }; | ||
98 | |||
99 | dtb@7f00000 { | ||
100 | reg = <0x07f00000 0x00080000>; | ||
101 | read-only; | ||
102 | }; | ||
103 | |||
104 | u-boot@7f80000 { | ||
105 | reg = <0x07f80000 0x00080000>; | ||
106 | read-only; | ||
107 | }; | ||
108 | }; | ||
109 | |||
110 | nand@2,0 { | ||
111 | #address-cells = <1>; | ||
112 | #size-cells = <1>; | ||
113 | compatible = "fsl,elbc-fcm-nand"; | ||
114 | reg = <0x2 0x0 0x40000>; | ||
115 | |||
116 | u-boot@0 { | ||
117 | reg = <0x0 0x02000000>; | ||
118 | read-only; | ||
119 | }; | ||
120 | |||
121 | jffs2@2000000 { | ||
122 | reg = <0x02000000 0x10000000>; | ||
123 | }; | ||
124 | |||
125 | ramdisk@12000000 { | ||
126 | reg = <0x12000000 0x08000000>; | ||
127 | read-only; | ||
128 | }; | ||
129 | |||
130 | kernel@1a000000 { | ||
131 | reg = <0x1a000000 0x04000000>; | ||
132 | }; | ||
133 | |||
134 | dtb@1e000000 { | ||
135 | reg = <0x1e000000 0x01000000>; | ||
136 | read-only; | ||
137 | }; | ||
138 | |||
139 | empty@1f000000 { | ||
140 | reg = <0x1f000000 0x21000000>; | ||
141 | }; | ||
142 | }; | ||
143 | |||
144 | nand@4,0 { | ||
145 | compatible = "fsl,elbc-fcm-nand"; | ||
146 | reg = <0x4 0x0 0x40000>; | ||
147 | }; | ||
148 | |||
149 | nand@5,0 { | ||
150 | compatible = "fsl,elbc-fcm-nand"; | ||
151 | reg = <0x5 0x0 0x40000>; | ||
152 | }; | ||
153 | |||
154 | nand@6,0 { | ||
155 | compatible = "fsl,elbc-fcm-nand"; | ||
156 | reg = <0x6 0x0 0x40000>; | ||
157 | }; | ||
158 | }; | ||
159 | |||
160 | soc@ffe00000 { | ||
161 | #address-cells = <1>; | ||
162 | #size-cells = <1>; | ||
163 | device_type = "soc"; | ||
164 | compatible = "fsl,p2020-immr", "simple-bus"; | ||
165 | ranges = <0x0 0 0xffe00000 0x100000>; | ||
166 | bus-frequency = <0>; // Filled out by uboot. | ||
167 | |||
168 | ecm-law@0 { | ||
169 | compatible = "fsl,ecm-law"; | ||
170 | reg = <0x0 0x1000>; | ||
171 | fsl,num-laws = <12>; | ||
172 | }; | ||
173 | |||
174 | ecm@1000 { | ||
175 | compatible = "fsl,p2020-ecm", "fsl,ecm"; | ||
176 | reg = <0x1000 0x1000>; | ||
177 | interrupts = <17 2>; | ||
178 | interrupt-parent = <&mpic>; | ||
179 | }; | ||
180 | |||
181 | memory-controller@2000 { | ||
182 | compatible = "fsl,p2020-memory-controller"; | ||
183 | reg = <0x2000 0x1000>; | ||
184 | interrupt-parent = <&mpic>; | ||
185 | interrupts = <18 2>; | ||
186 | }; | ||
187 | |||
188 | i2c@3000 { | ||
189 | #address-cells = <1>; | ||
190 | #size-cells = <0>; | ||
191 | cell-index = <0>; | ||
192 | compatible = "fsl-i2c"; | ||
193 | reg = <0x3000 0x100>; | ||
194 | interrupts = <43 2>; | ||
195 | interrupt-parent = <&mpic>; | ||
196 | dfsrr; | ||
197 | }; | ||
198 | |||
199 | i2c@3100 { | ||
200 | #address-cells = <1>; | ||
201 | #size-cells = <0>; | ||
202 | cell-index = <1>; | ||
203 | compatible = "fsl-i2c"; | ||
204 | reg = <0x3100 0x100>; | ||
205 | interrupts = <43 2>; | ||
206 | interrupt-parent = <&mpic>; | ||
207 | dfsrr; | ||
208 | }; | ||
209 | |||
210 | serial0: serial@4500 { | ||
211 | cell-index = <0>; | ||
212 | device_type = "serial"; | ||
213 | compatible = "ns16550"; | ||
214 | reg = <0x4500 0x100>; | ||
215 | clock-frequency = <0>; | ||
216 | interrupts = <42 2>; | ||
217 | interrupt-parent = <&mpic>; | ||
218 | }; | ||
219 | |||
220 | serial1: serial@4600 { | ||
221 | cell-index = <1>; | ||
222 | device_type = "serial"; | ||
223 | compatible = "ns16550"; | ||
224 | reg = <0x4600 0x100>; | ||
225 | clock-frequency = <0>; | ||
226 | interrupts = <42 2>; | ||
227 | interrupt-parent = <&mpic>; | ||
228 | }; | ||
229 | |||
230 | spi@7000 { | ||
231 | compatible = "fsl,espi"; | ||
232 | reg = <0x7000 0x1000>; | ||
233 | interrupts = <59 0x2>; | ||
234 | interrupt-parent = <&mpic>; | ||
235 | }; | ||
236 | |||
237 | dma@c300 { | ||
238 | #address-cells = <1>; | ||
239 | #size-cells = <1>; | ||
240 | compatible = "fsl,eloplus-dma"; | ||
241 | reg = <0xc300 0x4>; | ||
242 | ranges = <0x0 0xc100 0x200>; | ||
243 | cell-index = <1>; | ||
244 | dma-channel@0 { | ||
245 | compatible = "fsl,eloplus-dma-channel"; | ||
246 | reg = <0x0 0x80>; | ||
247 | cell-index = <0>; | ||
248 | interrupt-parent = <&mpic>; | ||
249 | interrupts = <76 2>; | ||
250 | }; | ||
251 | dma-channel@80 { | ||
252 | compatible = "fsl,eloplus-dma-channel"; | ||
253 | reg = <0x80 0x80>; | ||
254 | cell-index = <1>; | ||
255 | interrupt-parent = <&mpic>; | ||
256 | interrupts = <77 2>; | ||
257 | }; | ||
258 | dma-channel@100 { | ||
259 | compatible = "fsl,eloplus-dma-channel"; | ||
260 | reg = <0x100 0x80>; | ||
261 | cell-index = <2>; | ||
262 | interrupt-parent = <&mpic>; | ||
263 | interrupts = <78 2>; | ||
264 | }; | ||
265 | dma-channel@180 { | ||
266 | compatible = "fsl,eloplus-dma-channel"; | ||
267 | reg = <0x180 0x80>; | ||
268 | cell-index = <3>; | ||
269 | interrupt-parent = <&mpic>; | ||
270 | interrupts = <79 2>; | ||
271 | }; | ||
272 | }; | ||
273 | |||
274 | gpio: gpio-controller@f000 { | ||
275 | #gpio-cells = <2>; | ||
276 | compatible = "fsl,mpc8572-gpio"; | ||
277 | reg = <0xf000 0x100>; | ||
278 | interrupts = <47 0x2>; | ||
279 | interrupt-parent = <&mpic>; | ||
280 | gpio-controller; | ||
281 | }; | ||
282 | |||
283 | L2: l2-cache-controller@20000 { | ||
284 | compatible = "fsl,p2020-l2-cache-controller"; | ||
285 | reg = <0x20000 0x1000>; | ||
286 | cache-line-size = <32>; // 32 bytes | ||
287 | cache-size = <0x80000>; // L2, 512k | ||
288 | interrupt-parent = <&mpic>; | ||
289 | interrupts = <16 2>; | ||
290 | }; | ||
291 | |||
292 | dma@21300 { | ||
293 | #address-cells = <1>; | ||
294 | #size-cells = <1>; | ||
295 | compatible = "fsl,eloplus-dma"; | ||
296 | reg = <0x21300 0x4>; | ||
297 | ranges = <0x0 0x21100 0x200>; | ||
298 | cell-index = <0>; | ||
299 | dma-channel@0 { | ||
300 | compatible = "fsl,eloplus-dma-channel"; | ||
301 | reg = <0x0 0x80>; | ||
302 | cell-index = <0>; | ||
303 | interrupt-parent = <&mpic>; | ||
304 | interrupts = <20 2>; | ||
305 | }; | ||
306 | dma-channel@80 { | ||
307 | compatible = "fsl,eloplus-dma-channel"; | ||
308 | reg = <0x80 0x80>; | ||
309 | cell-index = <1>; | ||
310 | interrupt-parent = <&mpic>; | ||
311 | interrupts = <21 2>; | ||
312 | }; | ||
313 | dma-channel@100 { | ||
314 | compatible = "fsl,eloplus-dma-channel"; | ||
315 | reg = <0x100 0x80>; | ||
316 | cell-index = <2>; | ||
317 | interrupt-parent = <&mpic>; | ||
318 | interrupts = <22 2>; | ||
319 | }; | ||
320 | dma-channel@180 { | ||
321 | compatible = "fsl,eloplus-dma-channel"; | ||
322 | reg = <0x180 0x80>; | ||
323 | cell-index = <3>; | ||
324 | interrupt-parent = <&mpic>; | ||
325 | interrupts = <23 2>; | ||
326 | }; | ||
327 | }; | ||
328 | |||
329 | usb@22000 { | ||
330 | #address-cells = <1>; | ||
331 | #size-cells = <0>; | ||
332 | compatible = "fsl-usb2-dr"; | ||
333 | reg = <0x22000 0x1000>; | ||
334 | interrupt-parent = <&mpic>; | ||
335 | interrupts = <28 0x2>; | ||
336 | phy_type = "ulpi"; | ||
337 | }; | ||
338 | |||
339 | enet0: ethernet@24000 { | ||
340 | #address-cells = <1>; | ||
341 | #size-cells = <1>; | ||
342 | cell-index = <0>; | ||
343 | device_type = "network"; | ||
344 | model = "eTSEC"; | ||
345 | compatible = "gianfar"; | ||
346 | reg = <0x24000 0x1000>; | ||
347 | ranges = <0x0 0x24000 0x1000>; | ||
348 | local-mac-address = [ 00 00 00 00 00 00 ]; | ||
349 | interrupts = <29 2 30 2 34 2>; | ||
350 | interrupt-parent = <&mpic>; | ||
351 | tbi-handle = <&tbi0>; | ||
352 | phy-handle = <&phy0>; | ||
353 | phy-connection-type = "rgmii-id"; | ||
354 | |||
355 | mdio@520 { | ||
356 | #address-cells = <1>; | ||
357 | #size-cells = <0>; | ||
358 | compatible = "fsl,gianfar-mdio"; | ||
359 | reg = <0x520 0x20>; | ||
360 | |||
361 | phy0: ethernet-phy@0 { | ||
362 | interrupt-parent = <&mpic>; | ||
363 | interrupts = <3 1>; | ||
364 | reg = <0x0>; | ||
365 | }; | ||
366 | phy1: ethernet-phy@1 { | ||
367 | interrupt-parent = <&mpic>; | ||
368 | interrupts = <3 1>; | ||
369 | reg = <0x1>; | ||
370 | }; | ||
371 | phy2: ethernet-phy@2 { | ||
372 | interrupt-parent = <&mpic>; | ||
373 | interrupts = <3 1>; | ||
374 | reg = <0x2>; | ||
375 | }; | ||
376 | tbi0: tbi-phy@11 { | ||
377 | reg = <0x11>; | ||
378 | device_type = "tbi-phy"; | ||
379 | }; | ||
380 | }; | ||
381 | }; | ||
382 | |||
383 | enet1: ethernet@25000 { | ||
384 | #address-cells = <1>; | ||
385 | #size-cells = <1>; | ||
386 | cell-index = <1>; | ||
387 | device_type = "network"; | ||
388 | model = "eTSEC"; | ||
389 | compatible = "gianfar"; | ||
390 | reg = <0x25000 0x1000>; | ||
391 | ranges = <0x0 0x25000 0x1000>; | ||
392 | local-mac-address = [ 00 00 00 00 00 00 ]; | ||
393 | interrupts = <35 2 36 2 40 2>; | ||
394 | interrupt-parent = <&mpic>; | ||
395 | tbi-handle = <&tbi1>; | ||
396 | phy-handle = <&phy1>; | ||
397 | phy-connection-type = "rgmii-id"; | ||
398 | |||
399 | mdio@520 { | ||
400 | #address-cells = <1>; | ||
401 | #size-cells = <0>; | ||
402 | compatible = "fsl,gianfar-tbi"; | ||
403 | reg = <0x520 0x20>; | ||
404 | |||
405 | tbi1: tbi-phy@11 { | ||
406 | reg = <0x11>; | ||
407 | device_type = "tbi-phy"; | ||
408 | }; | ||
409 | }; | ||
410 | }; | ||
411 | |||
412 | enet2: ethernet@26000 { | ||
413 | #address-cells = <1>; | ||
414 | #size-cells = <1>; | ||
415 | cell-index = <2>; | ||
416 | device_type = "network"; | ||
417 | model = "eTSEC"; | ||
418 | compatible = "gianfar"; | ||
419 | reg = <0x26000 0x1000>; | ||
420 | ranges = <0x0 0x26000 0x1000>; | ||
421 | local-mac-address = [ 00 00 00 00 00 00 ]; | ||
422 | interrupts = <31 2 32 2 33 2>; | ||
423 | interrupt-parent = <&mpic>; | ||
424 | tbi-handle = <&tbi2>; | ||
425 | phy-handle = <&phy2>; | ||
426 | phy-connection-type = "rgmii-id"; | ||
427 | |||
428 | mdio@520 { | ||
429 | #address-cells = <1>; | ||
430 | #size-cells = <0>; | ||
431 | compatible = "fsl,gianfar-tbi"; | ||
432 | reg = <0x520 0x20>; | ||
433 | |||
434 | tbi2: tbi-phy@11 { | ||
435 | reg = <0x11>; | ||
436 | device_type = "tbi-phy"; | ||
437 | }; | ||
438 | }; | ||
439 | }; | ||
440 | |||
441 | sdhci@2e000 { | ||
442 | compatible = "fsl,p2020-esdhc", "fsl,esdhc"; | ||
443 | reg = <0x2e000 0x1000>; | ||
444 | interrupts = <72 0x2>; | ||
445 | interrupt-parent = <&mpic>; | ||
446 | /* Filled in by U-Boot */ | ||
447 | clock-frequency = <0>; | ||
448 | }; | ||
449 | |||
450 | crypto@30000 { | ||
451 | compatible = "fsl,sec3.1", "fsl,sec3.0", "fsl,sec2.4", | ||
452 | "fsl,sec2.2", "fsl,sec2.1", "fsl,sec2.0"; | ||
453 | reg = <0x30000 0x10000>; | ||
454 | interrupts = <45 2 58 2>; | ||
455 | interrupt-parent = <&mpic>; | ||
456 | fsl,num-channels = <4>; | ||
457 | fsl,channel-fifo-len = <24>; | ||
458 | fsl,exec-units-mask = <0xbfe>; | ||
459 | fsl,descriptor-types-mask = <0x3ab0ebf>; | ||
460 | }; | ||
461 | |||
462 | mpic: pic@40000 { | ||
463 | interrupt-controller; | ||
464 | #address-cells = <0>; | ||
465 | #interrupt-cells = <2>; | ||
466 | reg = <0x40000 0x40000>; | ||
467 | compatible = "chrp,open-pic"; | ||
468 | device_type = "open-pic"; | ||
469 | }; | ||
470 | |||
471 | msi@41600 { | ||
472 | compatible = "fsl,mpic-msi"; | ||
473 | reg = <0x41600 0x80>; | ||
474 | msi-available-ranges = <0 0x100>; | ||
475 | interrupts = < | ||
476 | 0xe0 0 | ||
477 | 0xe1 0 | ||
478 | 0xe2 0 | ||
479 | 0xe3 0 | ||
480 | 0xe4 0 | ||
481 | 0xe5 0 | ||
482 | 0xe6 0 | ||
483 | 0xe7 0>; | ||
484 | interrupt-parent = <&mpic>; | ||
485 | }; | ||
486 | |||
487 | global-utilities@e0000 { //global utilities block | ||
488 | compatible = "fsl,p2020-guts"; | ||
489 | reg = <0xe0000 0x1000>; | ||
490 | fsl,has-rstcr; | ||
491 | }; | ||
492 | }; | ||
493 | |||
494 | pci0: pcie@ffe08000 { | ||
495 | compatible = "fsl,mpc8548-pcie"; | ||
496 | device_type = "pci"; | ||
497 | #interrupt-cells = <1>; | ||
498 | #size-cells = <2>; | ||
499 | #address-cells = <3>; | ||
500 | reg = <0 0xffe08000 0 0x1000>; | ||
501 | bus-range = <0 255>; | ||
502 | ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000 | ||
503 | 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>; | ||
504 | clock-frequency = <33333333>; | ||
505 | interrupt-parent = <&mpic>; | ||
506 | interrupts = <24 2>; | ||
507 | interrupt-map-mask = <0xf800 0x0 0x0 0x7>; | ||
508 | interrupt-map = < | ||
509 | /* IDSEL 0x0 */ | ||
510 | 0000 0x0 0x0 0x1 &mpic 0x8 0x1 | ||
511 | 0000 0x0 0x0 0x2 &mpic 0x9 0x1 | ||
512 | 0000 0x0 0x0 0x3 &mpic 0xa 0x1 | ||
513 | 0000 0x0 0x0 0x4 &mpic 0xb 0x1 | ||
514 | >; | ||
515 | pcie@0 { | ||
516 | reg = <0x0 0x0 0x0 0x0 0x0>; | ||
517 | #size-cells = <2>; | ||
518 | #address-cells = <3>; | ||
519 | device_type = "pci"; | ||
520 | ranges = <0x2000000 0x0 0x80000000 | ||
521 | 0x2000000 0x0 0x80000000 | ||
522 | 0x0 0x20000000 | ||
523 | |||
524 | 0x1000000 0x0 0x0 | ||
525 | 0x1000000 0x0 0x0 | ||
526 | 0x0 0x10000>; | ||
527 | }; | ||
528 | }; | ||
529 | |||
530 | pci1: pcie@ffe09000 { | ||
531 | compatible = "fsl,mpc8548-pcie"; | ||
532 | device_type = "pci"; | ||
533 | #interrupt-cells = <1>; | ||
534 | #size-cells = <2>; | ||
535 | #address-cells = <3>; | ||
536 | reg = <0 0xffe09000 0 0x1000>; | ||
537 | bus-range = <0 255>; | ||
538 | ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000 | ||
539 | 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>; | ||
540 | clock-frequency = <33333333>; | ||
541 | interrupt-parent = <&mpic>; | ||
542 | interrupts = <25 2>; | ||
543 | interrupt-map-mask = <0xff00 0x0 0x0 0x7>; | ||
544 | interrupt-map = < | ||
545 | |||
546 | // IDSEL 0x11 func 0 - PCI slot 1 | ||
547 | 0x8800 0x0 0x0 0x1 &i8259 0x9 0x2 | ||
548 | 0x8800 0x0 0x0 0x2 &i8259 0xa 0x2 | ||
549 | |||
550 | // IDSEL 0x11 func 1 - PCI slot 1 | ||
551 | 0x8900 0x0 0x0 0x1 &i8259 0x9 0x2 | ||
552 | 0x8900 0x0 0x0 0x2 &i8259 0xa 0x2 | ||
553 | |||
554 | // IDSEL 0x11 func 2 - PCI slot 1 | ||
555 | 0x8a00 0x0 0x0 0x1 &i8259 0x9 0x2 | ||
556 | 0x8a00 0x0 0x0 0x2 &i8259 0xa 0x2 | ||
557 | |||
558 | // IDSEL 0x11 func 3 - PCI slot 1 | ||
559 | 0x8b00 0x0 0x0 0x1 &i8259 0x9 0x2 | ||
560 | 0x8b00 0x0 0x0 0x2 &i8259 0xa 0x2 | ||
561 | |||
562 | // IDSEL 0x11 func 4 - PCI slot 1 | ||
563 | 0x8c00 0x0 0x0 0x1 &i8259 0x9 0x2 | ||
564 | 0x8c00 0x0 0x0 0x2 &i8259 0xa 0x2 | ||
565 | |||
566 | // IDSEL 0x11 func 5 - PCI slot 1 | ||
567 | 0x8d00 0x0 0x0 0x1 &i8259 0x9 0x2 | ||
568 | 0x8d00 0x0 0x0 0x2 &i8259 0xa 0x2 | ||
569 | |||
570 | // IDSEL 0x11 func 6 - PCI slot 1 | ||
571 | 0x8e00 0x0 0x0 0x1 &i8259 0x9 0x2 | ||
572 | 0x8e00 0x0 0x0 0x2 &i8259 0xa 0x2 | ||
573 | |||
574 | // IDSEL 0x11 func 7 - PCI slot 1 | ||
575 | 0x8f00 0x0 0x0 0x1 &i8259 0x9 0x2 | ||
576 | 0x8f00 0x0 0x0 0x2 &i8259 0xa 0x2 | ||
577 | |||
578 | // IDSEL 0x1d Audio | ||
579 | 0xe800 0x0 0x0 0x1 &i8259 0x6 0x2 | ||
580 | |||
581 | // IDSEL 0x1e Legacy | ||
582 | 0xf000 0x0 0x0 0x1 &i8259 0x7 0x2 | ||
583 | 0xf100 0x0 0x0 0x1 &i8259 0x7 0x2 | ||
584 | |||
585 | // IDSEL 0x1f IDE/SATA | ||
586 | 0xf800 0x0 0x0 0x1 &i8259 0xe 0x2 | ||
587 | 0xf900 0x0 0x0 0x1 &i8259 0x5 0x2 | ||
588 | >; | ||
589 | |||
590 | pcie@0 { | ||
591 | reg = <0x0 0x0 0x0 0x0 0x0>; | ||
592 | #size-cells = <2>; | ||
593 | #address-cells = <3>; | ||
594 | device_type = "pci"; | ||
595 | ranges = <0x2000000 0x0 0xa0000000 | ||
596 | 0x2000000 0x0 0xa0000000 | ||
597 | 0x0 0x20000000 | ||
598 | |||
599 | 0x1000000 0x0 0x0 | ||
600 | 0x1000000 0x0 0x0 | ||
601 | 0x0 0x10000>; | ||
602 | uli1575@0 { | ||
603 | reg = <0x0 0x0 0x0 0x0 0x0>; | ||
604 | #size-cells = <2>; | ||
605 | #address-cells = <3>; | ||
606 | ranges = <0x2000000 0x0 0xa0000000 | ||
607 | 0x2000000 0x0 0xa0000000 | ||
608 | 0x0 0x20000000 | ||
609 | |||
610 | 0x1000000 0x0 0x0 | ||
611 | 0x1000000 0x0 0x0 | ||
612 | 0x0 0x10000>; | ||
613 | isa@1e { | ||
614 | device_type = "isa"; | ||
615 | #interrupt-cells = <2>; | ||
616 | #size-cells = <1>; | ||
617 | #address-cells = <2>; | ||
618 | reg = <0xf000 0x0 0x0 0x0 0x0>; | ||
619 | ranges = <0x1 0x0 0x1000000 0x0 0x0 | ||
620 | 0x1000>; | ||
621 | interrupt-parent = <&i8259>; | ||
622 | |||
623 | i8259: interrupt-controller@20 { | ||
624 | reg = <0x1 0x20 0x2 | ||
625 | 0x1 0xa0 0x2 | ||
626 | 0x1 0x4d0 0x2>; | ||
627 | interrupt-controller; | ||
628 | device_type = "interrupt-controller"; | ||
629 | #address-cells = <0>; | ||
630 | #interrupt-cells = <2>; | ||
631 | compatible = "chrp,iic"; | ||
632 | interrupts = <4 1>; | ||
633 | interrupt-parent = <&mpic>; | ||
634 | }; | ||
635 | |||
636 | i8042@60 { | ||
637 | #size-cells = <0>; | ||
638 | #address-cells = <1>; | ||
639 | reg = <0x1 0x60 0x1 0x1 0x64 0x1>; | ||
640 | interrupts = <1 3 12 3>; | ||
641 | interrupt-parent = | ||
642 | <&i8259>; | ||
643 | |||
644 | keyboard@0 { | ||
645 | reg = <0x0>; | ||
646 | compatible = "pnpPNP,303"; | ||
647 | }; | ||
648 | |||
649 | mouse@1 { | ||
650 | reg = <0x1>; | ||
651 | compatible = "pnpPNP,f03"; | ||
652 | }; | ||
653 | }; | ||
654 | |||
655 | rtc@70 { | ||
656 | compatible = "pnpPNP,b00"; | ||
657 | reg = <0x1 0x70 0x2>; | ||
658 | }; | ||
659 | |||
660 | gpio@400 { | ||
661 | reg = <0x1 0x400 0x80>; | ||
662 | }; | ||
663 | }; | ||
664 | }; | ||
665 | }; | ||
666 | |||
667 | }; | ||
668 | |||
669 | pci2: pcie@ffe0a000 { | ||
670 | compatible = "fsl,mpc8548-pcie"; | ||
671 | device_type = "pci"; | ||
672 | #interrupt-cells = <1>; | ||
673 | #size-cells = <2>; | ||
674 | #address-cells = <3>; | ||
675 | reg = <0 0xffe0a000 0 0x1000>; | ||
676 | bus-range = <0 255>; | ||
677 | ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x20000000 | ||
678 | 0x1000000 0x0 0x00000000 0 0xffc20000 0x0 0x10000>; | ||
679 | clock-frequency = <33333333>; | ||
680 | interrupt-parent = <&mpic>; | ||
681 | interrupts = <26 2>; | ||
682 | interrupt-map-mask = <0xf800 0x0 0x0 0x7>; | ||
683 | interrupt-map = < | ||
684 | /* IDSEL 0x0 */ | ||
685 | 0000 0x0 0x0 0x1 &mpic 0x0 0x1 | ||
686 | 0000 0x0 0x0 0x2 &mpic 0x1 0x1 | ||
687 | 0000 0x0 0x0 0x3 &mpic 0x2 0x1 | ||
688 | 0000 0x0 0x0 0x4 &mpic 0x3 0x1 | ||
689 | >; | ||
690 | pcie@0 { | ||
691 | reg = <0x0 0x0 0x0 0x0 0x0>; | ||
692 | #size-cells = <2>; | ||
693 | #address-cells = <3>; | ||
694 | device_type = "pci"; | ||
695 | ranges = <0x2000000 0x0 0xc0000000 | ||
696 | 0x2000000 0x0 0xc0000000 | ||
697 | 0x0 0x20000000 | ||
698 | |||
699 | 0x1000000 0x0 0x0 | ||
700 | 0x1000000 0x0 0x0 | ||
701 | 0x0 0x10000>; | ||
702 | }; | ||
703 | }; | ||
704 | }; | ||
diff --git a/arch/powerpc/boot/dts/sbc8349.dts b/arch/powerpc/boot/dts/sbc8349.dts index a36dbbc48694..5fb6f6684b0e 100644 --- a/arch/powerpc/boot/dts/sbc8349.dts +++ b/arch/powerpc/boot/dts/sbc8349.dts | |||
@@ -278,7 +278,6 @@ | |||
278 | }; | 278 | }; |
279 | 279 | ||
280 | pci0: pci@e0008500 { | 280 | pci0: pci@e0008500 { |
281 | cell-index = <1>; | ||
282 | interrupt-map-mask = <0xf800 0x0 0x0 0x7>; | 281 | interrupt-map-mask = <0xf800 0x0 0x0 0x7>; |
283 | interrupt-map = < | 282 | interrupt-map = < |
284 | 283 | ||
diff --git a/arch/powerpc/boot/dts/sbc8548.dts b/arch/powerpc/boot/dts/sbc8548.dts index b1f1416ac998..9eefe00ed253 100644 --- a/arch/powerpc/boot/dts/sbc8548.dts +++ b/arch/powerpc/boot/dts/sbc8548.dts | |||
@@ -151,10 +151,22 @@ | |||
151 | #size-cells = <1>; | 151 | #size-cells = <1>; |
152 | device_type = "soc"; | 152 | device_type = "soc"; |
153 | ranges = <0x00000000 0xe0000000 0x00100000>; | 153 | ranges = <0x00000000 0xe0000000 0x00100000>; |
154 | reg = <0xe0000000 0x00001000>; // CCSRBAR | ||
155 | bus-frequency = <0>; | 154 | bus-frequency = <0>; |
156 | compatible = "simple-bus"; | 155 | compatible = "simple-bus"; |
157 | 156 | ||
157 | ecm-law@0 { | ||
158 | compatible = "fsl,ecm-law"; | ||
159 | reg = <0x0 0x1000>; | ||
160 | fsl,num-laws = <10>; | ||
161 | }; | ||
162 | |||
163 | ecm@1000 { | ||
164 | compatible = "fsl,mpc8548-ecm", "fsl,ecm"; | ||
165 | reg = <0x1000 0x1000>; | ||
166 | interrupts = <17 2>; | ||
167 | interrupt-parent = <&mpic>; | ||
168 | }; | ||
169 | |||
158 | memory-controller@2000 { | 170 | memory-controller@2000 { |
159 | compatible = "fsl,mpc8548-memory-controller"; | 171 | compatible = "fsl,mpc8548-memory-controller"; |
160 | reg = <0x2000 0x1000>; | 172 | reg = <0x2000 0x1000>; |
@@ -350,7 +362,6 @@ | |||
350 | }; | 362 | }; |
351 | 363 | ||
352 | pci0: pci@e0008000 { | 364 | pci0: pci@e0008000 { |
353 | cell-index = <0>; | ||
354 | interrupt-map-mask = <0xf800 0x0 0x0 0x7>; | 365 | interrupt-map-mask = <0xf800 0x0 0x0 0x7>; |
355 | interrupt-map = < | 366 | interrupt-map = < |
356 | /* IDSEL 0x01 (PCI-X slot) @66MHz */ | 367 | /* IDSEL 0x01 (PCI-X slot) @66MHz */ |
@@ -380,7 +391,6 @@ | |||
380 | }; | 391 | }; |
381 | 392 | ||
382 | pci2: pcie@e000a000 { | 393 | pci2: pcie@e000a000 { |
383 | cell-index = <2>; | ||
384 | interrupt-map-mask = <0xf800 0x0 0x0 0x7>; | 394 | interrupt-map-mask = <0xf800 0x0 0x0 0x7>; |
385 | interrupt-map = < | 395 | interrupt-map = < |
386 | 396 | ||
diff --git a/arch/powerpc/boot/dts/sbc8560.dts b/arch/powerpc/boot/dts/sbc8560.dts index c4564b81e473..239d57a55cf4 100644 --- a/arch/powerpc/boot/dts/sbc8560.dts +++ b/arch/powerpc/boot/dts/sbc8560.dts | |||
@@ -57,9 +57,21 @@ | |||
57 | #size-cells = <1>; | 57 | #size-cells = <1>; |
58 | device_type = "soc"; | 58 | device_type = "soc"; |
59 | ranges = <0x0 0xff700000 0x00100000>; | 59 | ranges = <0x0 0xff700000 0x00100000>; |
60 | reg = <0xff700000 0x00100000>; | ||
61 | clock-frequency = <0>; | 60 | clock-frequency = <0>; |
62 | 61 | ||
62 | ecm-law@0 { | ||
63 | compatible = "fsl,ecm-law"; | ||
64 | reg = <0x0 0x1000>; | ||
65 | fsl,num-laws = <8>; | ||
66 | }; | ||
67 | |||
68 | ecm@1000 { | ||
69 | compatible = "fsl,mpc8560-ecm", "fsl,ecm"; | ||
70 | reg = <0x1000 0x1000>; | ||
71 | interrupts = <17 2>; | ||
72 | interrupt-parent = <&mpic>; | ||
73 | }; | ||
74 | |||
63 | memory-controller@2000 { | 75 | memory-controller@2000 { |
64 | compatible = "fsl,mpc8560-memory-controller"; | 76 | compatible = "fsl,mpc8560-memory-controller"; |
65 | reg = <0x2000 0x1000>; | 77 | reg = <0x2000 0x1000>; |
@@ -296,7 +308,6 @@ | |||
296 | }; | 308 | }; |
297 | 309 | ||
298 | pci0: pci@ff708000 { | 310 | pci0: pci@ff708000 { |
299 | cell-index = <0>; | ||
300 | #interrupt-cells = <1>; | 311 | #interrupt-cells = <1>; |
301 | #size-cells = <2>; | 312 | #size-cells = <2>; |
302 | #address-cells = <3>; | 313 | #address-cells = <3>; |
diff --git a/arch/powerpc/boot/dts/sbc8641d.dts b/arch/powerpc/boot/dts/sbc8641d.dts index e3e914e78caa..ee5538feb455 100644 --- a/arch/powerpc/boot/dts/sbc8641d.dts +++ b/arch/powerpc/boot/dts/sbc8641d.dts | |||
@@ -126,9 +126,21 @@ | |||
126 | device_type = "soc"; | 126 | device_type = "soc"; |
127 | compatible = "simple-bus"; | 127 | compatible = "simple-bus"; |
128 | ranges = <0x00000000 0xf8000000 0x00100000>; | 128 | ranges = <0x00000000 0xf8000000 0x00100000>; |
129 | reg = <0xf8000000 0x00001000>; // CCSRBAR | ||
130 | bus-frequency = <0>; | 129 | bus-frequency = <0>; |
131 | 130 | ||
131 | mcm-law@0 { | ||
132 | compatible = "fsl,mcm-law"; | ||
133 | reg = <0x0 0x1000>; | ||
134 | fsl,num-laws = <10>; | ||
135 | }; | ||
136 | |||
137 | mcm@1000 { | ||
138 | compatible = "fsl,mpc8641-mcm", "fsl,mcm"; | ||
139 | reg = <0x1000 0x1000>; | ||
140 | interrupts = <17 2>; | ||
141 | interrupt-parent = <&mpic>; | ||
142 | }; | ||
143 | |||
132 | i2c@3000 { | 144 | i2c@3000 { |
133 | #address-cells = <1>; | 145 | #address-cells = <1>; |
134 | #size-cells = <0>; | 146 | #size-cells = <0>; |
@@ -371,7 +383,6 @@ | |||
371 | }; | 383 | }; |
372 | 384 | ||
373 | pci0: pcie@f8008000 { | 385 | pci0: pcie@f8008000 { |
374 | cell-index = <0>; | ||
375 | compatible = "fsl,mpc8641-pcie"; | 386 | compatible = "fsl,mpc8641-pcie"; |
376 | device_type = "pci"; | 387 | device_type = "pci"; |
377 | #interrupt-cells = <1>; | 388 | #interrupt-cells = <1>; |
@@ -410,7 +421,6 @@ | |||
410 | }; | 421 | }; |
411 | 422 | ||
412 | pci1: pcie@f8009000 { | 423 | pci1: pcie@f8009000 { |
413 | cell-index = <1>; | ||
414 | compatible = "fsl,mpc8641-pcie"; | 424 | compatible = "fsl,mpc8641-pcie"; |
415 | device_type = "pci"; | 425 | device_type = "pci"; |
416 | #interrupt-cells = <1>; | 426 | #interrupt-cells = <1>; |
diff --git a/arch/powerpc/boot/dts/sequoia.dts b/arch/powerpc/boot/dts/sequoia.dts index 43cc68bd3192..739dd0da2416 100644 --- a/arch/powerpc/boot/dts/sequoia.dts +++ b/arch/powerpc/boot/dts/sequoia.dts | |||
@@ -199,6 +199,28 @@ | |||
199 | }; | 199 | }; |
200 | }; | 200 | }; |
201 | 201 | ||
202 | ndfc@3,0 { | ||
203 | compatible = "ibm,ndfc"; | ||
204 | reg = <0x00000003 0x00000000 0x00002000>; | ||
205 | ccr = <0x00001000>; | ||
206 | bank-settings = <0x80002222>; | ||
207 | #address-cells = <1>; | ||
208 | #size-cells = <1>; | ||
209 | |||
210 | nand { | ||
211 | #address-cells = <1>; | ||
212 | #size-cells = <1>; | ||
213 | |||
214 | partition@0 { | ||
215 | label = "u-boot"; | ||
216 | reg = <0x00000000 0x00084000>; | ||
217 | }; | ||
218 | partition@84000 { | ||
219 | label = "user"; | ||
220 | reg = <0x00000000 0x01f7c000>; | ||
221 | }; | ||
222 | }; | ||
223 | }; | ||
202 | }; | 224 | }; |
203 | 225 | ||
204 | UART0: serial@ef600300 { | 226 | UART0: serial@ef600300 { |
diff --git a/arch/powerpc/boot/dts/socrates.dts b/arch/powerpc/boot/dts/socrates.dts index 7a6ae75a1e57..feb4ef6bd144 100644 --- a/arch/powerpc/boot/dts/socrates.dts +++ b/arch/powerpc/boot/dts/socrates.dts | |||
@@ -55,10 +55,22 @@ | |||
55 | device_type = "soc"; | 55 | device_type = "soc"; |
56 | 56 | ||
57 | ranges = <0x00000000 0xe0000000 0x00100000>; | 57 | ranges = <0x00000000 0xe0000000 0x00100000>; |
58 | reg = <0xe0000000 0x00001000>; // CCSRBAR 1M | ||
59 | bus-frequency = <0>; // Filled in by U-Boot | 58 | bus-frequency = <0>; // Filled in by U-Boot |
60 | compatible = "fsl,mpc8544-immr", "simple-bus"; | 59 | compatible = "fsl,mpc8544-immr", "simple-bus"; |
61 | 60 | ||
61 | ecm-law@0 { | ||
62 | compatible = "fsl,ecm-law"; | ||
63 | reg = <0x0 0x1000>; | ||
64 | fsl,num-laws = <10>; | ||
65 | }; | ||
66 | |||
67 | ecm@1000 { | ||
68 | compatible = "fsl,mpc8544-ecm", "fsl,ecm"; | ||
69 | reg = <0x1000 0x1000>; | ||
70 | interrupts = <17 2>; | ||
71 | interrupt-parent = <&mpic>; | ||
72 | }; | ||
73 | |||
62 | memory-controller@2000 { | 74 | memory-controller@2000 { |
63 | compatible = "fsl,mpc8544-memory-controller"; | 75 | compatible = "fsl,mpc8544-memory-controller"; |
64 | reg = <0x2000 0x1000>; | 76 | reg = <0x2000 0x1000>; |
@@ -314,7 +326,6 @@ | |||
314 | }; | 326 | }; |
315 | 327 | ||
316 | pci0: pci@e0008000 { | 328 | pci0: pci@e0008000 { |
317 | cell-index = <0>; | ||
318 | #interrupt-cells = <1>; | 329 | #interrupt-cells = <1>; |
319 | #size-cells = <2>; | 330 | #size-cells = <2>; |
320 | #address-cells = <3>; | 331 | #address-cells = <3>; |
diff --git a/arch/powerpc/boot/dts/stx_gp3_8560.dts b/arch/powerpc/boot/dts/stx_gp3_8560.dts index ea6b15152de3..b670d03fbcd9 100644 --- a/arch/powerpc/boot/dts/stx_gp3_8560.dts +++ b/arch/powerpc/boot/dts/stx_gp3_8560.dts | |||
@@ -52,10 +52,22 @@ | |||
52 | #size-cells = <1>; | 52 | #size-cells = <1>; |
53 | device_type = "soc"; | 53 | device_type = "soc"; |
54 | ranges = <0 0xfdf00000 0x100000>; | 54 | ranges = <0 0xfdf00000 0x100000>; |
55 | reg = <0xfdf00000 0x1000>; | ||
56 | bus-frequency = <0>; | 55 | bus-frequency = <0>; |
57 | compatible = "fsl,mpc8560-immr", "simple-bus"; | 56 | compatible = "fsl,mpc8560-immr", "simple-bus"; |
58 | 57 | ||
58 | ecm-law@0 { | ||
59 | compatible = "fsl,ecm-law"; | ||
60 | reg = <0x0 0x1000>; | ||
61 | fsl,num-laws = <8>; | ||
62 | }; | ||
63 | |||
64 | ecm@1000 { | ||
65 | compatible = "fsl,mpc8560-ecm", "fsl,ecm"; | ||
66 | reg = <0x1000 0x1000>; | ||
67 | interrupts = <17 2>; | ||
68 | interrupt-parent = <&mpic>; | ||
69 | }; | ||
70 | |||
59 | memory-controller@2000 { | 71 | memory-controller@2000 { |
60 | compatible = "fsl,mpc8540-memory-controller"; | 72 | compatible = "fsl,mpc8540-memory-controller"; |
61 | reg = <0x2000 0x1000>; | 73 | reg = <0x2000 0x1000>; |
@@ -251,7 +263,6 @@ | |||
251 | }; | 263 | }; |
252 | 264 | ||
253 | pci0: pci@fdf08000 { | 265 | pci0: pci@fdf08000 { |
254 | cell-index = <0>; | ||
255 | interrupt-map-mask = <0xf800 0x0 0x0 0x7>; | 266 | interrupt-map-mask = <0xf800 0x0 0x0 0x7>; |
256 | interrupt-map = < | 267 | interrupt-map = < |
257 | 268 | ||
diff --git a/arch/powerpc/boot/dts/tqm8540.dts b/arch/powerpc/boot/dts/tqm8540.dts index b6f1fc6eb960..71347537b83e 100644 --- a/arch/powerpc/boot/dts/tqm8540.dts +++ b/arch/powerpc/boot/dts/tqm8540.dts | |||
@@ -54,10 +54,22 @@ | |||
54 | #size-cells = <1>; | 54 | #size-cells = <1>; |
55 | device_type = "soc"; | 55 | device_type = "soc"; |
56 | ranges = <0x0 0xe0000000 0x100000>; | 56 | ranges = <0x0 0xe0000000 0x100000>; |
57 | reg = <0xe0000000 0x200>; | ||
58 | bus-frequency = <0>; | 57 | bus-frequency = <0>; |
59 | compatible = "fsl,mpc8540-immr", "simple-bus"; | 58 | compatible = "fsl,mpc8540-immr", "simple-bus"; |
60 | 59 | ||
60 | ecm-law@0 { | ||
61 | compatible = "fsl,ecm-law"; | ||
62 | reg = <0x0 0x1000>; | ||
63 | fsl,num-laws = <8>; | ||
64 | }; | ||
65 | |||
66 | ecm@1000 { | ||
67 | compatible = "fsl,mpc8540-ecm", "fsl,ecm"; | ||
68 | reg = <0x1000 0x1000>; | ||
69 | interrupts = <17 2>; | ||
70 | interrupt-parent = <&mpic>; | ||
71 | }; | ||
72 | |||
61 | memory-controller@2000 { | 73 | memory-controller@2000 { |
62 | compatible = "fsl,mpc8540-memory-controller"; | 74 | compatible = "fsl,mpc8540-memory-controller"; |
63 | reg = <0x2000 0x1000>; | 75 | reg = <0x2000 0x1000>; |
@@ -266,7 +278,6 @@ | |||
266 | }; | 278 | }; |
267 | 279 | ||
268 | pci0: pci@e0008000 { | 280 | pci0: pci@e0008000 { |
269 | cell-index = <0>; | ||
270 | #interrupt-cells = <1>; | 281 | #interrupt-cells = <1>; |
271 | #size-cells = <2>; | 282 | #size-cells = <2>; |
272 | #address-cells = <3>; | 283 | #address-cells = <3>; |
diff --git a/arch/powerpc/boot/dts/tqm8541.dts b/arch/powerpc/boot/dts/tqm8541.dts index fa6a3d54a8a5..b30f63753d41 100644 --- a/arch/powerpc/boot/dts/tqm8541.dts +++ b/arch/powerpc/boot/dts/tqm8541.dts | |||
@@ -53,10 +53,22 @@ | |||
53 | #size-cells = <1>; | 53 | #size-cells = <1>; |
54 | device_type = "soc"; | 54 | device_type = "soc"; |
55 | ranges = <0x0 0xe0000000 0x100000>; | 55 | ranges = <0x0 0xe0000000 0x100000>; |
56 | reg = <0xe0000000 0x200>; | ||
57 | bus-frequency = <0>; | 56 | bus-frequency = <0>; |
58 | compatible = "fsl,mpc8541-immr", "simple-bus"; | 57 | compatible = "fsl,mpc8541-immr", "simple-bus"; |
59 | 58 | ||
59 | ecm-law@0 { | ||
60 | compatible = "fsl,ecm-law"; | ||
61 | reg = <0x0 0x1000>; | ||
62 | fsl,num-laws = <8>; | ||
63 | }; | ||
64 | |||
65 | ecm@1000 { | ||
66 | compatible = "fsl,mpc8541-ecm", "fsl,ecm"; | ||
67 | reg = <0x1000 0x1000>; | ||
68 | interrupts = <17 2>; | ||
69 | interrupt-parent = <&mpic>; | ||
70 | }; | ||
71 | |||
60 | memory-controller@2000 { | 72 | memory-controller@2000 { |
61 | compatible = "fsl,mpc8540-memory-controller"; | 73 | compatible = "fsl,mpc8540-memory-controller"; |
62 | reg = <0x2000 0x1000>; | 74 | reg = <0x2000 0x1000>; |
@@ -288,7 +300,6 @@ | |||
288 | }; | 300 | }; |
289 | 301 | ||
290 | pci0: pci@e0008000 { | 302 | pci0: pci@e0008000 { |
291 | cell-index = <0>; | ||
292 | #interrupt-cells = <1>; | 303 | #interrupt-cells = <1>; |
293 | #size-cells = <2>; | 304 | #size-cells = <2>; |
294 | #address-cells = <3>; | 305 | #address-cells = <3>; |
diff --git a/arch/powerpc/boot/dts/tqm8548-bigflash.dts b/arch/powerpc/boot/dts/tqm8548-bigflash.dts index 00f7ed7a2455..61f25e15fd66 100644 --- a/arch/powerpc/boot/dts/tqm8548-bigflash.dts +++ b/arch/powerpc/boot/dts/tqm8548-bigflash.dts | |||
@@ -55,10 +55,22 @@ | |||
55 | #size-cells = <1>; | 55 | #size-cells = <1>; |
56 | device_type = "soc"; | 56 | device_type = "soc"; |
57 | ranges = <0x0 0xa0000000 0x100000>; | 57 | ranges = <0x0 0xa0000000 0x100000>; |
58 | reg = <0xa0000000 0x1000>; // CCSRBAR | ||
59 | bus-frequency = <0>; | 58 | bus-frequency = <0>; |
60 | compatible = "fsl,mpc8548-immr", "simple-bus"; | 59 | compatible = "fsl,mpc8548-immr", "simple-bus"; |
61 | 60 | ||
61 | ecm-law@0 { | ||
62 | compatible = "fsl,ecm-law"; | ||
63 | reg = <0x0 0x1000>; | ||
64 | fsl,num-laws = <10>; | ||
65 | }; | ||
66 | |||
67 | ecm@1000 { | ||
68 | compatible = "fsl,mpc8548-ecm", "fsl,ecm"; | ||
69 | reg = <0x1000 0x1000>; | ||
70 | interrupts = <17 2>; | ||
71 | interrupt-parent = <&mpic>; | ||
72 | }; | ||
73 | |||
62 | memory-controller@2000 { | 74 | memory-controller@2000 { |
63 | compatible = "fsl,mpc8548-memory-controller"; | 75 | compatible = "fsl,mpc8548-memory-controller"; |
64 | reg = <0x2000 0x1000>; | 76 | reg = <0x2000 0x1000>; |
@@ -419,7 +431,6 @@ | |||
419 | }; | 431 | }; |
420 | 432 | ||
421 | pci0: pci@a0008000 { | 433 | pci0: pci@a0008000 { |
422 | cell-index = <0>; | ||
423 | #interrupt-cells = <1>; | 434 | #interrupt-cells = <1>; |
424 | #size-cells = <2>; | 435 | #size-cells = <2>; |
425 | #address-cells = <3>; | 436 | #address-cells = <3>; |
@@ -441,7 +452,6 @@ | |||
441 | }; | 452 | }; |
442 | 453 | ||
443 | pci1: pcie@a000a000 { | 454 | pci1: pcie@a000a000 { |
444 | cell-index = <2>; | ||
445 | interrupt-map-mask = <0xf800 0x0 0x0 0x7>; | 455 | interrupt-map-mask = <0xf800 0x0 0x0 0x7>; |
446 | interrupt-map = < | 456 | interrupt-map = < |
447 | /* IDSEL 0x0 (PEX) */ | 457 | /* IDSEL 0x0 (PEX) */ |
diff --git a/arch/powerpc/boot/dts/tqm8548.dts b/arch/powerpc/boot/dts/tqm8548.dts index 673e4a778ac8..025759c7c955 100644 --- a/arch/powerpc/boot/dts/tqm8548.dts +++ b/arch/powerpc/boot/dts/tqm8548.dts | |||
@@ -55,10 +55,22 @@ | |||
55 | #size-cells = <1>; | 55 | #size-cells = <1>; |
56 | device_type = "soc"; | 56 | device_type = "soc"; |
57 | ranges = <0x0 0xe0000000 0x100000>; | 57 | ranges = <0x0 0xe0000000 0x100000>; |
58 | reg = <0xe0000000 0x1000>; // CCSRBAR | ||
59 | bus-frequency = <0>; | 58 | bus-frequency = <0>; |
60 | compatible = "fsl,mpc8548-immr", "simple-bus"; | 59 | compatible = "fsl,mpc8548-immr", "simple-bus"; |
61 | 60 | ||
61 | ecm-law@0 { | ||
62 | compatible = "fsl,ecm-law"; | ||
63 | reg = <0x0 0x1000>; | ||
64 | fsl,num-laws = <10>; | ||
65 | }; | ||
66 | |||
67 | ecm@1000 { | ||
68 | compatible = "fsl,mpc8548-ecm", "fsl,ecm"; | ||
69 | reg = <0x1000 0x1000>; | ||
70 | interrupts = <17 2>; | ||
71 | interrupt-parent = <&mpic>; | ||
72 | }; | ||
73 | |||
62 | memory-controller@2000 { | 74 | memory-controller@2000 { |
63 | compatible = "fsl,mpc8548-memory-controller"; | 75 | compatible = "fsl,mpc8548-memory-controller"; |
64 | reg = <0x2000 0x1000>; | 76 | reg = <0x2000 0x1000>; |
@@ -419,7 +431,6 @@ | |||
419 | }; | 431 | }; |
420 | 432 | ||
421 | pci0: pci@e0008000 { | 433 | pci0: pci@e0008000 { |
422 | cell-index = <0>; | ||
423 | #interrupt-cells = <1>; | 434 | #interrupt-cells = <1>; |
424 | #size-cells = <2>; | 435 | #size-cells = <2>; |
425 | #address-cells = <3>; | 436 | #address-cells = <3>; |
@@ -441,7 +452,6 @@ | |||
441 | }; | 452 | }; |
442 | 453 | ||
443 | pci1: pcie@e000a000 { | 454 | pci1: pcie@e000a000 { |
444 | cell-index = <2>; | ||
445 | interrupt-map-mask = <0xf800 0x0 0x0 0x7>; | 455 | interrupt-map-mask = <0xf800 0x0 0x0 0x7>; |
446 | interrupt-map = < | 456 | interrupt-map = < |
447 | /* IDSEL 0x0 (PEX) */ | 457 | /* IDSEL 0x0 (PEX) */ |
diff --git a/arch/powerpc/boot/dts/tqm8555.dts b/arch/powerpc/boot/dts/tqm8555.dts index 6a99f1eef7ad..95e287381836 100644 --- a/arch/powerpc/boot/dts/tqm8555.dts +++ b/arch/powerpc/boot/dts/tqm8555.dts | |||
@@ -53,10 +53,22 @@ | |||
53 | #size-cells = <1>; | 53 | #size-cells = <1>; |
54 | device_type = "soc"; | 54 | device_type = "soc"; |
55 | ranges = <0x0 0xe0000000 0x100000>; | 55 | ranges = <0x0 0xe0000000 0x100000>; |
56 | reg = <0xe0000000 0x200>; | ||
57 | bus-frequency = <0>; | 56 | bus-frequency = <0>; |
58 | compatible = "fsl,mpc8555-immr", "simple-bus"; | 57 | compatible = "fsl,mpc8555-immr", "simple-bus"; |
59 | 58 | ||
59 | ecm-law@0 { | ||
60 | compatible = "fsl,ecm-law"; | ||
61 | reg = <0x0 0x1000>; | ||
62 | fsl,num-laws = <8>; | ||
63 | }; | ||
64 | |||
65 | ecm@1000 { | ||
66 | compatible = "fsl,mpc8555-ecm", "fsl,ecm"; | ||
67 | reg = <0x1000 0x1000>; | ||
68 | interrupts = <17 2>; | ||
69 | interrupt-parent = <&mpic>; | ||
70 | }; | ||
71 | |||
60 | memory-controller@2000 { | 72 | memory-controller@2000 { |
61 | compatible = "fsl,mpc8540-memory-controller"; | 73 | compatible = "fsl,mpc8540-memory-controller"; |
62 | reg = <0x2000 0x1000>; | 74 | reg = <0x2000 0x1000>; |
@@ -288,7 +300,6 @@ | |||
288 | }; | 300 | }; |
289 | 301 | ||
290 | pci0: pci@e0008000 { | 302 | pci0: pci@e0008000 { |
291 | cell-index = <0>; | ||
292 | #interrupt-cells = <1>; | 303 | #interrupt-cells = <1>; |
293 | #size-cells = <2>; | 304 | #size-cells = <2>; |
294 | #address-cells = <3>; | 305 | #address-cells = <3>; |
diff --git a/arch/powerpc/boot/dts/tqm8560.dts b/arch/powerpc/boot/dts/tqm8560.dts index b6c2d71defd3..ff70580a8f4c 100644 --- a/arch/powerpc/boot/dts/tqm8560.dts +++ b/arch/powerpc/boot/dts/tqm8560.dts | |||
@@ -55,10 +55,22 @@ | |||
55 | #size-cells = <1>; | 55 | #size-cells = <1>; |
56 | device_type = "soc"; | 56 | device_type = "soc"; |
57 | ranges = <0x0 0xe0000000 0x100000>; | 57 | ranges = <0x0 0xe0000000 0x100000>; |
58 | reg = <0xe0000000 0x200>; | ||
59 | bus-frequency = <0>; | 58 | bus-frequency = <0>; |
60 | compatible = "fsl,mpc8560-immr", "simple-bus"; | 59 | compatible = "fsl,mpc8560-immr", "simple-bus"; |
61 | 60 | ||
61 | ecm-law@0 { | ||
62 | compatible = "fsl,ecm-law"; | ||
63 | reg = <0x0 0x1000>; | ||
64 | fsl,num-laws = <8>; | ||
65 | }; | ||
66 | |||
67 | ecm@1000 { | ||
68 | compatible = "fsl,mpc8560-ecm", "fsl,ecm"; | ||
69 | reg = <0x1000 0x1000>; | ||
70 | interrupts = <17 2>; | ||
71 | interrupt-parent = <&mpic>; | ||
72 | }; | ||
73 | |||
62 | memory-controller@2000 { | 74 | memory-controller@2000 { |
63 | compatible = "fsl,mpc8540-memory-controller"; | 75 | compatible = "fsl,mpc8540-memory-controller"; |
64 | reg = <0x2000 0x1000>; | 76 | reg = <0x2000 0x1000>; |
@@ -359,7 +371,6 @@ | |||
359 | }; | 371 | }; |
360 | 372 | ||
361 | pci0: pci@e0008000 { | 373 | pci0: pci@e0008000 { |
362 | cell-index = <0>; | ||
363 | #interrupt-cells = <1>; | 374 | #interrupt-cells = <1>; |
364 | #size-cells = <2>; | 375 | #size-cells = <2>; |
365 | #address-cells = <3>; | 376 | #address-cells = <3>; |
diff --git a/arch/powerpc/boot/dts/virtex440-ml510.dts b/arch/powerpc/boot/dts/virtex440-ml510.dts new file mode 100644 index 000000000000..81a8dc2c6365 --- /dev/null +++ b/arch/powerpc/boot/dts/virtex440-ml510.dts | |||
@@ -0,0 +1,465 @@ | |||
1 | /* | ||
2 | * Xilinx ML510 Reference Design support | ||
3 | * | ||
4 | * This DTS file was created for the ml510_bsb1_pcores_ppc440 reference design. | ||
5 | * The reference design contains a bug which prevent PCI DMA from working | ||
6 | * properly. A description of the bug is given in the plbv46_pci section. It | ||
7 | * needs to be fixed by the user until Xilinx updates their reference design. | ||
8 | * | ||
9 | * Copyright 2009, Roderick Colenbrander | ||
10 | */ | ||
11 | |||
12 | /dts-v1/; | ||
13 | / { | ||
14 | #address-cells = <1>; | ||
15 | #size-cells = <1>; | ||
16 | compatible = "xlnx,ml510-ref-design", "xlnx,virtex440"; | ||
17 | dcr-parent = <&ppc440_0>; | ||
18 | DDR2_SDRAM_DIMM0: memory@0 { | ||
19 | device_type = "memory"; | ||
20 | reg = < 0x0 0x20000000 >; | ||
21 | } ; | ||
22 | alias { | ||
23 | ethernet0 = &Hard_Ethernet_MAC; | ||
24 | serial0 = &RS232_Uart_1; | ||
25 | } ; | ||
26 | chosen { | ||
27 | bootargs = "console=ttyS0 root=/dev/ram"; | ||
28 | linux,stdout-path = "/plb@0/serial@83e00000"; | ||
29 | } ; | ||
30 | cpus { | ||
31 | #address-cells = <1>; | ||
32 | #cpus = <0x1>; | ||
33 | #size-cells = <0>; | ||
34 | ppc440_0: cpu@0 { | ||
35 | #address-cells = <1>; | ||
36 | #size-cells = <1>; | ||
37 | clock-frequency = <300000000>; | ||
38 | compatible = "PowerPC,440", "ibm,ppc440"; | ||
39 | d-cache-line-size = <0x20>; | ||
40 | d-cache-size = <0x8000>; | ||
41 | dcr-access-method = "native"; | ||
42 | dcr-controller ; | ||
43 | device_type = "cpu"; | ||
44 | i-cache-line-size = <0x20>; | ||
45 | i-cache-size = <0x8000>; | ||
46 | model = "PowerPC,440"; | ||
47 | reg = <0>; | ||
48 | timebase-frequency = <300000000>; | ||
49 | xlnx,apu-control = <0x2000>; | ||
50 | xlnx,apu-udi-0 = <0x0>; | ||
51 | xlnx,apu-udi-1 = <0x0>; | ||
52 | xlnx,apu-udi-10 = <0x0>; | ||
53 | xlnx,apu-udi-11 = <0x0>; | ||
54 | xlnx,apu-udi-12 = <0x0>; | ||
55 | xlnx,apu-udi-13 = <0x0>; | ||
56 | xlnx,apu-udi-14 = <0x0>; | ||
57 | xlnx,apu-udi-15 = <0x0>; | ||
58 | xlnx,apu-udi-2 = <0x0>; | ||
59 | xlnx,apu-udi-3 = <0x0>; | ||
60 | xlnx,apu-udi-4 = <0x0>; | ||
61 | xlnx,apu-udi-5 = <0x0>; | ||
62 | xlnx,apu-udi-6 = <0x0>; | ||
63 | xlnx,apu-udi-7 = <0x0>; | ||
64 | xlnx,apu-udi-8 = <0x0>; | ||
65 | xlnx,apu-udi-9 = <0x0>; | ||
66 | xlnx,dcr-autolock-enable = <0x1>; | ||
67 | xlnx,dcu-rd-ld-cache-plb-prio = <0x0>; | ||
68 | xlnx,dcu-rd-noncache-plb-prio = <0x0>; | ||
69 | xlnx,dcu-rd-touch-plb-prio = <0x0>; | ||
70 | xlnx,dcu-rd-urgent-plb-prio = <0x0>; | ||
71 | xlnx,dcu-wr-flush-plb-prio = <0x0>; | ||
72 | xlnx,dcu-wr-store-plb-prio = <0x0>; | ||
73 | xlnx,dcu-wr-urgent-plb-prio = <0x0>; | ||
74 | xlnx,dma0-control = <0x0>; | ||
75 | xlnx,dma0-plb-prio = <0x0>; | ||
76 | xlnx,dma0-rxchannelctrl = <0x1010000>; | ||
77 | xlnx,dma0-rxirqtimer = <0x3ff>; | ||
78 | xlnx,dma0-txchannelctrl = <0x1010000>; | ||
79 | xlnx,dma0-txirqtimer = <0x3ff>; | ||
80 | xlnx,dma1-control = <0x0>; | ||
81 | xlnx,dma1-plb-prio = <0x0>; | ||
82 | xlnx,dma1-rxchannelctrl = <0x1010000>; | ||
83 | xlnx,dma1-rxirqtimer = <0x3ff>; | ||
84 | xlnx,dma1-txchannelctrl = <0x1010000>; | ||
85 | xlnx,dma1-txirqtimer = <0x3ff>; | ||
86 | xlnx,dma2-control = <0x0>; | ||
87 | xlnx,dma2-plb-prio = <0x0>; | ||
88 | xlnx,dma2-rxchannelctrl = <0x1010000>; | ||
89 | xlnx,dma2-rxirqtimer = <0x3ff>; | ||
90 | xlnx,dma2-txchannelctrl = <0x1010000>; | ||
91 | xlnx,dma2-txirqtimer = <0x3ff>; | ||
92 | xlnx,dma3-control = <0x0>; | ||
93 | xlnx,dma3-plb-prio = <0x0>; | ||
94 | xlnx,dma3-rxchannelctrl = <0x1010000>; | ||
95 | xlnx,dma3-rxirqtimer = <0x3ff>; | ||
96 | xlnx,dma3-txchannelctrl = <0x1010000>; | ||
97 | xlnx,dma3-txirqtimer = <0x3ff>; | ||
98 | xlnx,endian-reset = <0x0>; | ||
99 | xlnx,generate-plb-timespecs = <0x1>; | ||
100 | xlnx,icu-rd-fetch-plb-prio = <0x0>; | ||
101 | xlnx,icu-rd-spec-plb-prio = <0x0>; | ||
102 | xlnx,icu-rd-touch-plb-prio = <0x0>; | ||
103 | xlnx,interconnect-imask = <0xffffffff>; | ||
104 | xlnx,mplb-allow-lock-xfer = <0x1>; | ||
105 | xlnx,mplb-arb-mode = <0x0>; | ||
106 | xlnx,mplb-awidth = <0x20>; | ||
107 | xlnx,mplb-counter = <0x500>; | ||
108 | xlnx,mplb-dwidth = <0x80>; | ||
109 | xlnx,mplb-max-burst = <0x8>; | ||
110 | xlnx,mplb-native-dwidth = <0x80>; | ||
111 | xlnx,mplb-p2p = <0x0>; | ||
112 | xlnx,mplb-prio-dcur = <0x2>; | ||
113 | xlnx,mplb-prio-dcuw = <0x3>; | ||
114 | xlnx,mplb-prio-icu = <0x4>; | ||
115 | xlnx,mplb-prio-splb0 = <0x1>; | ||
116 | xlnx,mplb-prio-splb1 = <0x0>; | ||
117 | xlnx,mplb-read-pipe-enable = <0x1>; | ||
118 | xlnx,mplb-sync-tattribute = <0x0>; | ||
119 | xlnx,mplb-wdog-enable = <0x1>; | ||
120 | xlnx,mplb-write-pipe-enable = <0x1>; | ||
121 | xlnx,mplb-write-post-enable = <0x1>; | ||
122 | xlnx,num-dma = <0x0>; | ||
123 | xlnx,pir = <0xf>; | ||
124 | xlnx,ppc440mc-addr-base = <0x0>; | ||
125 | xlnx,ppc440mc-addr-high = <0x1fffffff>; | ||
126 | xlnx,ppc440mc-arb-mode = <0x0>; | ||
127 | xlnx,ppc440mc-bank-conflict-mask = <0x1800000>; | ||
128 | xlnx,ppc440mc-control = <0xf810008f>; | ||
129 | xlnx,ppc440mc-max-burst = <0x8>; | ||
130 | xlnx,ppc440mc-prio-dcur = <0x2>; | ||
131 | xlnx,ppc440mc-prio-dcuw = <0x3>; | ||
132 | xlnx,ppc440mc-prio-icu = <0x4>; | ||
133 | xlnx,ppc440mc-prio-splb0 = <0x1>; | ||
134 | xlnx,ppc440mc-prio-splb1 = <0x0>; | ||
135 | xlnx,ppc440mc-row-conflict-mask = <0x7ffe00>; | ||
136 | xlnx,ppcdm-asyncmode = <0x0>; | ||
137 | xlnx,ppcds-asyncmode = <0x0>; | ||
138 | xlnx,user-reset = <0x0>; | ||
139 | } ; | ||
140 | } ; | ||
141 | plb_v46_0: plb@0 { | ||
142 | #address-cells = <1>; | ||
143 | #size-cells = <1>; | ||
144 | compatible = "xlnx,plb-v46-1.03.a", "simple-bus"; | ||
145 | ranges ; | ||
146 | FLASH: flash@fc000000 { | ||
147 | bank-width = <2>; | ||
148 | compatible = "xlnx,xps-mch-emc-2.00.a", "cfi-flash"; | ||
149 | reg = < 0xfc000000 0x2000000 >; | ||
150 | xlnx,family = "virtex5"; | ||
151 | xlnx,include-datawidth-matching-0 = <0x1>; | ||
152 | xlnx,include-datawidth-matching-1 = <0x0>; | ||
153 | xlnx,include-datawidth-matching-2 = <0x0>; | ||
154 | xlnx,include-datawidth-matching-3 = <0x0>; | ||
155 | xlnx,include-negedge-ioregs = <0x0>; | ||
156 | xlnx,include-plb-ipif = <0x1>; | ||
157 | xlnx,include-wrbuf = <0x1>; | ||
158 | xlnx,max-mem-width = <0x10>; | ||
159 | xlnx,mch-native-dwidth = <0x20>; | ||
160 | xlnx,mch-plb-clk-period-ps = <0x2710>; | ||
161 | xlnx,mch-splb-awidth = <0x20>; | ||
162 | xlnx,mch0-accessbuf-depth = <0x10>; | ||
163 | xlnx,mch0-protocol = <0x0>; | ||
164 | xlnx,mch0-rddatabuf-depth = <0x10>; | ||
165 | xlnx,mch1-accessbuf-depth = <0x10>; | ||
166 | xlnx,mch1-protocol = <0x0>; | ||
167 | xlnx,mch1-rddatabuf-depth = <0x10>; | ||
168 | xlnx,mch2-accessbuf-depth = <0x10>; | ||
169 | xlnx,mch2-protocol = <0x0>; | ||
170 | xlnx,mch2-rddatabuf-depth = <0x10>; | ||
171 | xlnx,mch3-accessbuf-depth = <0x10>; | ||
172 | xlnx,mch3-protocol = <0x0>; | ||
173 | xlnx,mch3-rddatabuf-depth = <0x10>; | ||
174 | xlnx,mem0-width = <0x10>; | ||
175 | xlnx,mem1-width = <0x20>; | ||
176 | xlnx,mem2-width = <0x20>; | ||
177 | xlnx,mem3-width = <0x20>; | ||
178 | xlnx,num-banks-mem = <0x1>; | ||
179 | xlnx,num-channels = <0x2>; | ||
180 | xlnx,priority-mode = <0x0>; | ||
181 | xlnx,synch-mem-0 = <0x0>; | ||
182 | xlnx,synch-mem-1 = <0x0>; | ||
183 | xlnx,synch-mem-2 = <0x0>; | ||
184 | xlnx,synch-mem-3 = <0x0>; | ||
185 | xlnx,synch-pipedelay-0 = <0x2>; | ||
186 | xlnx,synch-pipedelay-1 = <0x2>; | ||
187 | xlnx,synch-pipedelay-2 = <0x2>; | ||
188 | xlnx,synch-pipedelay-3 = <0x2>; | ||
189 | xlnx,tavdv-ps-mem-0 = <0x1adb0>; | ||
190 | xlnx,tavdv-ps-mem-1 = <0x3a98>; | ||
191 | xlnx,tavdv-ps-mem-2 = <0x3a98>; | ||
192 | xlnx,tavdv-ps-mem-3 = <0x3a98>; | ||
193 | xlnx,tcedv-ps-mem-0 = <0x1adb0>; | ||
194 | xlnx,tcedv-ps-mem-1 = <0x3a98>; | ||
195 | xlnx,tcedv-ps-mem-2 = <0x3a98>; | ||
196 | xlnx,tcedv-ps-mem-3 = <0x3a98>; | ||
197 | xlnx,thzce-ps-mem-0 = <0x88b8>; | ||
198 | xlnx,thzce-ps-mem-1 = <0x1b58>; | ||
199 | xlnx,thzce-ps-mem-2 = <0x1b58>; | ||
200 | xlnx,thzce-ps-mem-3 = <0x1b58>; | ||
201 | xlnx,thzoe-ps-mem-0 = <0x1b58>; | ||
202 | xlnx,thzoe-ps-mem-1 = <0x1b58>; | ||
203 | xlnx,thzoe-ps-mem-2 = <0x1b58>; | ||
204 | xlnx,thzoe-ps-mem-3 = <0x1b58>; | ||
205 | xlnx,tlzwe-ps-mem-0 = <0x88b8>; | ||
206 | xlnx,tlzwe-ps-mem-1 = <0x0>; | ||
207 | xlnx,tlzwe-ps-mem-2 = <0x0>; | ||
208 | xlnx,tlzwe-ps-mem-3 = <0x0>; | ||
209 | xlnx,twc-ps-mem-0 = <0x1adb0>; | ||
210 | xlnx,twc-ps-mem-1 = <0x3a98>; | ||
211 | xlnx,twc-ps-mem-2 = <0x3a98>; | ||
212 | xlnx,twc-ps-mem-3 = <0x3a98>; | ||
213 | xlnx,twp-ps-mem-0 = <0x11170>; | ||
214 | xlnx,twp-ps-mem-1 = <0x2ee0>; | ||
215 | xlnx,twp-ps-mem-2 = <0x2ee0>; | ||
216 | xlnx,twp-ps-mem-3 = <0x2ee0>; | ||
217 | xlnx,xcl0-linesize = <0x4>; | ||
218 | xlnx,xcl0-writexfer = <0x1>; | ||
219 | xlnx,xcl1-linesize = <0x4>; | ||
220 | xlnx,xcl1-writexfer = <0x1>; | ||
221 | xlnx,xcl2-linesize = <0x4>; | ||
222 | xlnx,xcl2-writexfer = <0x1>; | ||
223 | xlnx,xcl3-linesize = <0x4>; | ||
224 | xlnx,xcl3-writexfer = <0x1>; | ||
225 | } ; | ||
226 | Hard_Ethernet_MAC: xps-ll-temac@81c00000 { | ||
227 | #address-cells = <1>; | ||
228 | #size-cells = <1>; | ||
229 | compatible = "xlnx,compound"; | ||
230 | ethernet@81c00000 { | ||
231 | compatible = "xlnx,xps-ll-temac-1.01.b"; | ||
232 | device_type = "network"; | ||
233 | interrupt-parent = <&xps_intc_0>; | ||
234 | interrupts = < 8 2 >; | ||
235 | llink-connected = <&Hard_Ethernet_MAC_fifo>; | ||
236 | local-mac-address = [ 02 00 00 00 00 00 ]; | ||
237 | reg = < 0x81c00000 0x40 >; | ||
238 | xlnx,bus2core-clk-ratio = <0x1>; | ||
239 | xlnx,phy-type = <0x3>; | ||
240 | xlnx,phyaddr = <0x1>; | ||
241 | xlnx,rxcsum = <0x0>; | ||
242 | xlnx,rxfifo = <0x8000>; | ||
243 | xlnx,temac-type = <0x0>; | ||
244 | xlnx,txcsum = <0x0>; | ||
245 | xlnx,txfifo = <0x8000>; | ||
246 | } ; | ||
247 | } ; | ||
248 | Hard_Ethernet_MAC_fifo: xps-ll-fifo@81a00000 { | ||
249 | compatible = "xlnx,xps-ll-fifo-1.01.a"; | ||
250 | interrupt-parent = <&xps_intc_0>; | ||
251 | interrupts = < 6 2 >; | ||
252 | reg = < 0x81a00000 0x10000 >; | ||
253 | xlnx,family = "virtex5"; | ||
254 | } ; | ||
255 | IIC_EEPROM: i2c@81600000 { | ||
256 | compatible = "xlnx,xps-iic-2.00.a"; | ||
257 | interrupt-parent = <&xps_intc_0>; | ||
258 | interrupts = < 9 2 >; | ||
259 | reg = < 0x81600000 0x10000 >; | ||
260 | xlnx,clk-freq = <0x5f5e100>; | ||
261 | xlnx,family = "virtex5"; | ||
262 | xlnx,gpo-width = <0x1>; | ||
263 | xlnx,iic-freq = <0x186a0>; | ||
264 | xlnx,scl-inertial-delay = <0x5>; | ||
265 | xlnx,sda-inertial-delay = <0x5>; | ||
266 | xlnx,ten-bit-adr = <0x0>; | ||
267 | } ; | ||
268 | LCD_OPTIONAL: gpio@81420000 { | ||
269 | compatible = "xlnx,xps-gpio-1.00.a"; | ||
270 | reg = < 0x81420000 0x10000 >; | ||
271 | xlnx,all-inputs = <0x0>; | ||
272 | xlnx,all-inputs-2 = <0x0>; | ||
273 | xlnx,dout-default = <0x0>; | ||
274 | xlnx,dout-default-2 = <0x0>; | ||
275 | xlnx,family = "virtex5"; | ||
276 | xlnx,gpio-width = <0xb>; | ||
277 | xlnx,interrupt-present = <0x0>; | ||
278 | xlnx,is-bidir = <0x1>; | ||
279 | xlnx,is-bidir-2 = <0x1>; | ||
280 | xlnx,is-dual = <0x0>; | ||
281 | xlnx,tri-default = <0xffffffff>; | ||
282 | xlnx,tri-default-2 = <0xffffffff>; | ||
283 | } ; | ||
284 | LEDs_4Bit: gpio@81400000 { | ||
285 | compatible = "xlnx,xps-gpio-1.00.a"; | ||
286 | reg = < 0x81400000 0x10000 >; | ||
287 | xlnx,all-inputs = <0x0>; | ||
288 | xlnx,all-inputs-2 = <0x0>; | ||
289 | xlnx,dout-default = <0x0>; | ||
290 | xlnx,dout-default-2 = <0x0>; | ||
291 | xlnx,family = "virtex5"; | ||
292 | xlnx,gpio-width = <0x4>; | ||
293 | xlnx,interrupt-present = <0x0>; | ||
294 | xlnx,is-bidir = <0x1>; | ||
295 | xlnx,is-bidir-2 = <0x1>; | ||
296 | xlnx,is-dual = <0x0>; | ||
297 | xlnx,tri-default = <0xffffffff>; | ||
298 | xlnx,tri-default-2 = <0xffffffff>; | ||
299 | } ; | ||
300 | RS232_Uart_1: serial@83e00000 { | ||
301 | clock-frequency = <100000000>; | ||
302 | compatible = "xlnx,xps-uart16550-2.00.b", "ns16550"; | ||
303 | current-speed = <9600>; | ||
304 | device_type = "serial"; | ||
305 | interrupt-parent = <&xps_intc_0>; | ||
306 | interrupts = < 11 2 >; | ||
307 | reg = < 0x83e00000 0x10000 >; | ||
308 | reg-offset = <0x1003>; | ||
309 | reg-shift = <2>; | ||
310 | xlnx,family = "virtex5"; | ||
311 | xlnx,has-external-rclk = <0x0>; | ||
312 | xlnx,has-external-xin = <0x0>; | ||
313 | xlnx,is-a-16550 = <0x1>; | ||
314 | } ; | ||
315 | SPI_EEPROM: xps-spi@feff8000 { | ||
316 | compatible = "xlnx,xps-spi-2.00.b"; | ||
317 | interrupt-parent = <&xps_intc_0>; | ||
318 | interrupts = < 10 2 >; | ||
319 | reg = < 0xfeff8000 0x80 >; | ||
320 | xlnx,family = "virtex5"; | ||
321 | xlnx,fifo-exist = <0x1>; | ||
322 | xlnx,num-ss-bits = <0x1>; | ||
323 | xlnx,num-transfer-bits = <0x8>; | ||
324 | xlnx,sck-ratio = <0x80>; | ||
325 | } ; | ||
326 | SysACE_CompactFlash: sysace@83600000 { | ||
327 | compatible = "xlnx,xps-sysace-1.00.a"; | ||
328 | interrupt-parent = <&xps_intc_0>; | ||
329 | interrupts = < 7 2 >; | ||
330 | reg = < 0x83600000 0x10000 >; | ||
331 | xlnx,family = "virtex5"; | ||
332 | xlnx,mem-width = <0x10>; | ||
333 | } ; | ||
334 | plbv46_pci_0: plbv46-pci@85e00000 { | ||
335 | #size-cells = <2>; | ||
336 | #address-cells = <3>; | ||
337 | compatible = "xlnx,plbv46-pci-1.03.a"; | ||
338 | device_type = "pci"; | ||
339 | reg = < 0x85e00000 0x10000 >; | ||
340 | |||
341 | /* | ||
342 | * The default ML510 BSB has C_IPIFBAR2PCIBAR_0 set to | ||
343 | * 0 which means that a read/write to the memory mapped | ||
344 | * i/o region (which starts at 0xa0000000) for pci | ||
345 | * bar 0 on the plb side translates to 0. | ||
346 | * It is important to set this value to 0xa0000000, so | ||
347 | * that inbound and outbound pci transactions work | ||
348 | * properly including DMA. | ||
349 | */ | ||
350 | ranges = <0x02000000 0 0xa0000000 0xa0000000 0 0x20000000 | ||
351 | 0x01000000 0 0x00000000 0xf0000000 0 0x00010000>; | ||
352 | |||
353 | #interrupt-cells = <1>; | ||
354 | interrupt-parent = <&xps_intc_0>; | ||
355 | interrupt-map-mask = <0xff00 0x0 0x0 0x7>; | ||
356 | interrupt-map = < | ||
357 | /* IRQ mapping for pci slots and ALI M1533 | ||
358 | * periperhals. In total there are 5 interrupt | ||
359 | * lines connected to a xps_intc controller. | ||
360 | * Four of them are PCI IRQ A, B, C, D and | ||
361 | * which correspond to respectively xpx_intc | ||
362 | * 5, 4, 3 and 2. The fifth interrupt line is | ||
363 | * connected to the south bridge and this one | ||
364 | * uses irq 1 and is active high instead of | ||
365 | * active low. | ||
366 | * | ||
367 | * The M1533 contains various peripherals | ||
368 | * including AC97 audio, a modem, USB, IDE and | ||
369 | * some power management stuff. The modem | ||
370 | * isn't connected on the ML510 and the power | ||
371 | * management core also isn't used. | ||
372 | */ | ||
373 | |||
374 | /* IDSEL 0x16 / dev=6, bus=0 / PCI slot 3 */ | ||
375 | 0x3000 0 0 1 &xps_intc_0 3 2 | ||
376 | 0x3000 0 0 2 &xps_intc_0 2 2 | ||
377 | 0x3000 0 0 3 &xps_intc_0 5 2 | ||
378 | 0x3000 0 0 4 &xps_intc_0 4 2 | ||
379 | |||
380 | /* IDSEL 0x13 / dev=3, bus=1 / PCI slot 4 */ | ||
381 | /* | ||
382 | 0x11800 0 0 1 &xps_intc_0 5 0 2 | ||
383 | 0x11800 0 0 2 &xps_intc_0 4 0 2 | ||
384 | 0x11800 0 0 3 &xps_intc_0 3 0 2 | ||
385 | 0x11800 0 0 4 &xps_intc_0 2 0 2 | ||
386 | */ | ||
387 | |||
388 | /* According to the datasheet + schematic | ||
389 | * ABCD [FPGA] of slot 5 is mapped to DABC. | ||
390 | * Testing showed that at least A maps to B, | ||
391 | * the mapping of the other pins is a guess | ||
392 | * and for that reason the lines have been | ||
393 | * commented out. | ||
394 | */ | ||
395 | /* IDSEL 0x15 / dev=5, bus=0 / PCI slot 5 */ | ||
396 | 0x2800 0 0 1 &xps_intc_0 4 2 | ||
397 | /* | ||
398 | 0x2800 0 0 2 &xps_intc_0 3 2 | ||
399 | 0x2800 0 0 3 &xps_intc_0 2 2 | ||
400 | 0x2800 0 0 4 &xps_intc_0 5 2 | ||
401 | */ | ||
402 | |||
403 | /* IDSEL 0x12 / dev=2, bus=1 / PCI slot 6 */ | ||
404 | /* | ||
405 | 0x11000 0 0 1 &xps_intc_0 4 0 2 | ||
406 | 0x11000 0 0 2 &xps_intc_0 3 0 2 | ||
407 | 0x11000 0 0 3 &xps_intc_0 2 0 2 | ||
408 | 0x11000 0 0 4 &xps_intc_0 5 0 2 | ||
409 | */ | ||
410 | |||
411 | /* IDSEL 0x11 / dev=1, bus=0 / AC97 audio */ | ||
412 | 0x0800 0 0 1 &i8259 7 2 | ||
413 | |||
414 | /* IDSEL 0x1b / dev=11, bus=0 / IDE */ | ||
415 | 0x5800 0 0 1 &i8259 14 2 | ||
416 | |||
417 | /* IDSEL 0x1f / dev 15, bus=0 / 2x USB 1.1 */ | ||
418 | 0x7800 0 0 1 &i8259 7 2 | ||
419 | >; | ||
420 | ali_m1533 { | ||
421 | #size-cells = <1>; | ||
422 | #address-cells = <2>; | ||
423 | i8259: interrupt-controller@20 { | ||
424 | reg = <1 0x20 2 | ||
425 | 1 0xa0 2 | ||
426 | 1 0x4d0 2>; | ||
427 | interrupt-controller; | ||
428 | device_type = "interrupt-controller"; | ||
429 | #address-cells = <0>; | ||
430 | #interrupt-cells = <2>; | ||
431 | compatible = "chrp,iic"; | ||
432 | |||
433 | /* south bridge irq is active high */ | ||
434 | interrupts = <1 3>; | ||
435 | interrupt-parent = <&xps_intc_0>; | ||
436 | }; | ||
437 | }; | ||
438 | } ; | ||
439 | xps_bram_if_cntlr_1: xps-bram-if-cntlr@ffff0000 { | ||
440 | compatible = "xlnx,xps-bram-if-cntlr-1.00.a"; | ||
441 | reg = < 0xffff0000 0x10000 >; | ||
442 | xlnx,family = "virtex5"; | ||
443 | } ; | ||
444 | xps_intc_0: interrupt-controller@81800000 { | ||
445 | #interrupt-cells = <0x2>; | ||
446 | compatible = "xlnx,xps-intc-1.00.a"; | ||
447 | interrupt-controller ; | ||
448 | reg = < 0x81800000 0x10000 >; | ||
449 | xlnx,num-intr-inputs = <0xc>; | ||
450 | } ; | ||
451 | xps_tft_0: tft@86e00000 { | ||
452 | compatible = "xlnx,xps-tft-1.00.a"; | ||
453 | reg = < 0x86e00000 0x10000 >; | ||
454 | xlnx,dcr-splb-slave-if = <0x1>; | ||
455 | xlnx,default-tft-base-addr = <0x0>; | ||
456 | xlnx,family = "virtex5"; | ||
457 | xlnx,i2c-slave-addr = <0x76>; | ||
458 | xlnx,mplb-awidth = <0x20>; | ||
459 | xlnx,mplb-dwidth = <0x80>; | ||
460 | xlnx,mplb-native-dwidth = <0x40>; | ||
461 | xlnx,mplb-smallest-slave = <0x20>; | ||
462 | xlnx,tft-interface = <0x1>; | ||
463 | } ; | ||
464 | } ; | ||
465 | } ; | ||
diff --git a/arch/powerpc/boot/dts/warp.dts b/arch/powerpc/boot/dts/warp.dts index 7e183ff9a317..01bfb56bbe80 100644 --- a/arch/powerpc/boot/dts/warp.dts +++ b/arch/powerpc/boot/dts/warp.dts | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * Device Tree Source for PIKA Warp | 2 | * Device Tree Source for PIKA Warp |
3 | * | 3 | * |
4 | * Copyright (c) 2008 PIKA Technologies | 4 | * Copyright (c) 2008-2009 PIKA Technologies |
5 | * Sean MacLennan <smaclennan@pikatech.com> | 5 | * Sean MacLennan <smaclennan@pikatech.com> |
6 | * | 6 | * |
7 | * This file is licensed under the terms of the GNU General Public | 7 | * This file is licensed under the terms of the GNU General Public |
@@ -158,7 +158,7 @@ | |||
158 | 158 | ||
159 | partition@0 { | 159 | partition@0 { |
160 | label = "splash"; | 160 | label = "splash"; |
161 | reg = <0x00000000 0x00020000>; | 161 | reg = <0x00000000 0x00010000>; |
162 | }; | 162 | }; |
163 | partition@300000 { | 163 | partition@300000 { |
164 | label = "fpga"; | 164 | label = "fpga"; |
@@ -244,28 +244,27 @@ | |||
244 | }; | 244 | }; |
245 | 245 | ||
246 | GPIO0: gpio@ef600b00 { | 246 | GPIO0: gpio@ef600b00 { |
247 | compatible = "ibm,gpio-440ep"; | 247 | compatible = "ibm,ppc4xx-gpio"; |
248 | reg = <0xef600b00 0x00000048>; | 248 | reg = <0xef600b00 0x00000048>; |
249 | #gpio-cells = <2>; | 249 | #gpio-cells = <2>; |
250 | gpio-controller; | 250 | gpio-controller; |
251 | }; | 251 | }; |
252 | 252 | ||
253 | GPIO1: gpio@ef600c00 { | 253 | GPIO1: gpio@ef600c00 { |
254 | compatible = "ibm,gpio-440ep"; | 254 | compatible = "ibm,ppc4xx-gpio"; |
255 | reg = <0xef600c00 0x00000048>; | 255 | reg = <0xef600c00 0x00000048>; |
256 | #gpio-cells = <2>; | 256 | #gpio-cells = <2>; |
257 | gpio-controller; | 257 | gpio-controller; |
258 | }; | ||
258 | 259 | ||
259 | led@31 { | 260 | power-leds { |
260 | compatible = "linux,gpio-led"; | 261 | compatible = "gpio-leds"; |
261 | linux,name = ":green:"; | 262 | green { |
262 | gpios = <&GPIO1 31 0>; | 263 | gpios = <&GPIO1 0 0>; |
263 | }; | 264 | default-state = "on"; |
264 | 265 | }; | |
265 | led@30 { | 266 | red { |
266 | compatible = "linux,gpio-led"; | 267 | gpios = <&GPIO1 1 0>; |
267 | linux,name = ":red:"; | ||
268 | gpios = <&GPIO1 30 0>; | ||
269 | }; | 268 | }; |
270 | }; | 269 | }; |
271 | 270 | ||
diff --git a/arch/powerpc/configs/40x/acadia_defconfig b/arch/powerpc/configs/40x/acadia_defconfig index a32ec8d323a0..173a5bb77ca1 100644 --- a/arch/powerpc/configs/40x/acadia_defconfig +++ b/arch/powerpc/configs/40x/acadia_defconfig | |||
@@ -252,7 +252,7 @@ CONFIG_PCI_SYSCALL=y | |||
252 | # CONFIG_PCIEPORTBUS is not set | 252 | # CONFIG_PCIEPORTBUS is not set |
253 | CONFIG_ARCH_SUPPORTS_MSI=y | 253 | CONFIG_ARCH_SUPPORTS_MSI=y |
254 | # CONFIG_PCI_MSI is not set | 254 | # CONFIG_PCI_MSI is not set |
255 | CONFIG_PCI_LEGACY=y | 255 | # CONFIG_PCI_LEGACY is not set |
256 | # CONFIG_PCI_DEBUG is not set | 256 | # CONFIG_PCI_DEBUG is not set |
257 | # CONFIG_PCI_STUB is not set | 257 | # CONFIG_PCI_STUB is not set |
258 | # CONFIG_PCCARD is not set | 258 | # CONFIG_PCCARD is not set |
diff --git a/arch/powerpc/configs/40x/ep405_defconfig b/arch/powerpc/configs/40x/ep405_defconfig index 4e9d85f39da0..e9b8495cde0c 100644 --- a/arch/powerpc/configs/40x/ep405_defconfig +++ b/arch/powerpc/configs/40x/ep405_defconfig | |||
@@ -254,7 +254,7 @@ CONFIG_PCI_SYSCALL=y | |||
254 | # CONFIG_PCIEPORTBUS is not set | 254 | # CONFIG_PCIEPORTBUS is not set |
255 | CONFIG_ARCH_SUPPORTS_MSI=y | 255 | CONFIG_ARCH_SUPPORTS_MSI=y |
256 | # CONFIG_PCI_MSI is not set | 256 | # CONFIG_PCI_MSI is not set |
257 | CONFIG_PCI_LEGACY=y | 257 | # CONFIG_PCI_LEGACY is not set |
258 | # CONFIG_PCI_DEBUG is not set | 258 | # CONFIG_PCI_DEBUG is not set |
259 | # CONFIG_PCI_STUB is not set | 259 | # CONFIG_PCI_STUB is not set |
260 | # CONFIG_PCCARD is not set | 260 | # CONFIG_PCCARD is not set |
diff --git a/arch/powerpc/configs/40x/kilauea_defconfig b/arch/powerpc/configs/40x/kilauea_defconfig index 9917a09bad3a..865725effe93 100644 --- a/arch/powerpc/configs/40x/kilauea_defconfig +++ b/arch/powerpc/configs/40x/kilauea_defconfig | |||
@@ -1,7 +1,7 @@ | |||
1 | # | 1 | # |
2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
3 | # Linux kernel version: 2.6.29-rc2 | 3 | # Linux kernel version: 2.6.30-rc7 |
4 | # Tue Jan 20 08:17:52 2009 | 4 | # Wed Jun 3 10:18:16 2009 |
5 | # | 5 | # |
6 | # CONFIG_PPC64 is not set | 6 | # CONFIG_PPC64 is not set |
7 | 7 | ||
@@ -27,6 +27,7 @@ CONFIG_GENERIC_TIME=y | |||
27 | CONFIG_GENERIC_TIME_VSYSCALL=y | 27 | CONFIG_GENERIC_TIME_VSYSCALL=y |
28 | CONFIG_GENERIC_CLOCKEVENTS=y | 28 | CONFIG_GENERIC_CLOCKEVENTS=y |
29 | CONFIG_GENERIC_HARDIRQS=y | 29 | CONFIG_GENERIC_HARDIRQS=y |
30 | CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y | ||
30 | # CONFIG_HAVE_SETUP_PER_CPU_AREA is not set | 31 | # CONFIG_HAVE_SETUP_PER_CPU_AREA is not set |
31 | CONFIG_IRQ_PER_CPU=y | 32 | CONFIG_IRQ_PER_CPU=y |
32 | CONFIG_STACKTRACE_SUPPORT=y | 33 | CONFIG_STACKTRACE_SUPPORT=y |
@@ -49,10 +50,12 @@ CONFIG_PPC_UDBG_16550=y | |||
49 | # CONFIG_GENERIC_TBSYNC is not set | 50 | # CONFIG_GENERIC_TBSYNC is not set |
50 | CONFIG_AUDIT_ARCH=y | 51 | CONFIG_AUDIT_ARCH=y |
51 | CONFIG_GENERIC_BUG=y | 52 | CONFIG_GENERIC_BUG=y |
53 | CONFIG_DTC=y | ||
52 | # CONFIG_DEFAULT_UIMAGE is not set | 54 | # CONFIG_DEFAULT_UIMAGE is not set |
53 | CONFIG_PPC_DCR_NATIVE=y | 55 | CONFIG_PPC_DCR_NATIVE=y |
54 | # CONFIG_PPC_DCR_MMIO is not set | 56 | # CONFIG_PPC_DCR_MMIO is not set |
55 | CONFIG_PPC_DCR=y | 57 | CONFIG_PPC_DCR=y |
58 | CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y | ||
56 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | 59 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" |
57 | 60 | ||
58 | # | 61 | # |
@@ -67,9 +70,19 @@ CONFIG_SWAP=y | |||
67 | CONFIG_SYSVIPC=y | 70 | CONFIG_SYSVIPC=y |
68 | CONFIG_SYSVIPC_SYSCTL=y | 71 | CONFIG_SYSVIPC_SYSCTL=y |
69 | CONFIG_POSIX_MQUEUE=y | 72 | CONFIG_POSIX_MQUEUE=y |
73 | CONFIG_POSIX_MQUEUE_SYSCTL=y | ||
70 | # CONFIG_BSD_PROCESS_ACCT is not set | 74 | # CONFIG_BSD_PROCESS_ACCT is not set |
71 | # CONFIG_TASKSTATS is not set | 75 | # CONFIG_TASKSTATS is not set |
72 | # CONFIG_AUDIT is not set | 76 | # CONFIG_AUDIT is not set |
77 | |||
78 | # | ||
79 | # RCU Subsystem | ||
80 | # | ||
81 | CONFIG_CLASSIC_RCU=y | ||
82 | # CONFIG_TREE_RCU is not set | ||
83 | # CONFIG_PREEMPT_RCU is not set | ||
84 | # CONFIG_TREE_RCU_TRACE is not set | ||
85 | # CONFIG_PREEMPT_RCU_TRACE is not set | ||
73 | # CONFIG_IKCONFIG is not set | 86 | # CONFIG_IKCONFIG is not set |
74 | CONFIG_LOG_BUF_SHIFT=14 | 87 | CONFIG_LOG_BUF_SHIFT=14 |
75 | CONFIG_GROUP_SCHED=y | 88 | CONFIG_GROUP_SCHED=y |
@@ -84,22 +97,24 @@ CONFIG_SYSFS_DEPRECATED_V2=y | |||
84 | # CONFIG_NAMESPACES is not set | 97 | # CONFIG_NAMESPACES is not set |
85 | CONFIG_BLK_DEV_INITRD=y | 98 | CONFIG_BLK_DEV_INITRD=y |
86 | CONFIG_INITRAMFS_SOURCE="" | 99 | CONFIG_INITRAMFS_SOURCE="" |
100 | CONFIG_RD_GZIP=y | ||
101 | # CONFIG_RD_BZIP2 is not set | ||
102 | # CONFIG_RD_LZMA is not set | ||
87 | # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set | 103 | # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set |
88 | CONFIG_SYSCTL=y | 104 | CONFIG_SYSCTL=y |
105 | CONFIG_ANON_INODES=y | ||
89 | CONFIG_EMBEDDED=y | 106 | CONFIG_EMBEDDED=y |
90 | CONFIG_SYSCTL_SYSCALL=y | 107 | CONFIG_SYSCTL_SYSCALL=y |
91 | CONFIG_KALLSYMS=y | 108 | CONFIG_KALLSYMS=y |
92 | CONFIG_KALLSYMS_ALL=y | 109 | CONFIG_KALLSYMS_ALL=y |
93 | CONFIG_KALLSYMS_STRIP_GENERATED=y | ||
94 | CONFIG_KALLSYMS_EXTRA_PASS=y | 110 | CONFIG_KALLSYMS_EXTRA_PASS=y |
111 | # CONFIG_STRIP_ASM_SYMS is not set | ||
95 | CONFIG_HOTPLUG=y | 112 | CONFIG_HOTPLUG=y |
96 | CONFIG_PRINTK=y | 113 | CONFIG_PRINTK=y |
97 | CONFIG_BUG=y | 114 | CONFIG_BUG=y |
98 | CONFIG_ELF_CORE=y | 115 | CONFIG_ELF_CORE=y |
99 | CONFIG_COMPAT_BRK=y | ||
100 | CONFIG_BASE_FULL=y | 116 | CONFIG_BASE_FULL=y |
101 | CONFIG_FUTEX=y | 117 | CONFIG_FUTEX=y |
102 | CONFIG_ANON_INODES=y | ||
103 | CONFIG_EPOLL=y | 118 | CONFIG_EPOLL=y |
104 | CONFIG_SIGNALFD=y | 119 | CONFIG_SIGNALFD=y |
105 | CONFIG_TIMERFD=y | 120 | CONFIG_TIMERFD=y |
@@ -109,10 +124,12 @@ CONFIG_AIO=y | |||
109 | CONFIG_VM_EVENT_COUNTERS=y | 124 | CONFIG_VM_EVENT_COUNTERS=y |
110 | CONFIG_PCI_QUIRKS=y | 125 | CONFIG_PCI_QUIRKS=y |
111 | CONFIG_SLUB_DEBUG=y | 126 | CONFIG_SLUB_DEBUG=y |
127 | CONFIG_COMPAT_BRK=y | ||
112 | # CONFIG_SLAB is not set | 128 | # CONFIG_SLAB is not set |
113 | CONFIG_SLUB=y | 129 | CONFIG_SLUB=y |
114 | # CONFIG_SLOB is not set | 130 | # CONFIG_SLOB is not set |
115 | # CONFIG_PROFILING is not set | 131 | # CONFIG_PROFILING is not set |
132 | # CONFIG_MARKERS is not set | ||
116 | CONFIG_HAVE_OPROFILE=y | 133 | CONFIG_HAVE_OPROFILE=y |
117 | # CONFIG_KPROBES is not set | 134 | # CONFIG_KPROBES is not set |
118 | CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y | 135 | CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y |
@@ -120,6 +137,7 @@ CONFIG_HAVE_IOREMAP_PROT=y | |||
120 | CONFIG_HAVE_KPROBES=y | 137 | CONFIG_HAVE_KPROBES=y |
121 | CONFIG_HAVE_KRETPROBES=y | 138 | CONFIG_HAVE_KRETPROBES=y |
122 | CONFIG_HAVE_ARCH_TRACEHOOK=y | 139 | CONFIG_HAVE_ARCH_TRACEHOOK=y |
140 | # CONFIG_SLOW_WORK is not set | ||
123 | # CONFIG_HAVE_GENERIC_DMA_COHERENT is not set | 141 | # CONFIG_HAVE_GENERIC_DMA_COHERENT is not set |
124 | CONFIG_SLABINFO=y | 142 | CONFIG_SLABINFO=y |
125 | CONFIG_RT_MUTEXES=y | 143 | CONFIG_RT_MUTEXES=y |
@@ -132,7 +150,6 @@ CONFIG_MODULE_UNLOAD=y | |||
132 | # CONFIG_MODULE_SRCVERSION_ALL is not set | 150 | # CONFIG_MODULE_SRCVERSION_ALL is not set |
133 | CONFIG_BLOCK=y | 151 | CONFIG_BLOCK=y |
134 | CONFIG_LBD=y | 152 | CONFIG_LBD=y |
135 | # CONFIG_BLK_DEV_IO_TRACE is not set | ||
136 | # CONFIG_BLK_DEV_BSG is not set | 153 | # CONFIG_BLK_DEV_BSG is not set |
137 | # CONFIG_BLK_DEV_INTEGRITY is not set | 154 | # CONFIG_BLK_DEV_INTEGRITY is not set |
138 | 155 | ||
@@ -148,11 +165,6 @@ CONFIG_DEFAULT_AS=y | |||
148 | # CONFIG_DEFAULT_CFQ is not set | 165 | # CONFIG_DEFAULT_CFQ is not set |
149 | # CONFIG_DEFAULT_NOOP is not set | 166 | # CONFIG_DEFAULT_NOOP is not set |
150 | CONFIG_DEFAULT_IOSCHED="anticipatory" | 167 | CONFIG_DEFAULT_IOSCHED="anticipatory" |
151 | CONFIG_CLASSIC_RCU=y | ||
152 | # CONFIG_TREE_RCU is not set | ||
153 | # CONFIG_PREEMPT_RCU is not set | ||
154 | # CONFIG_TREE_RCU_TRACE is not set | ||
155 | # CONFIG_PREEMPT_RCU_TRACE is not set | ||
156 | # CONFIG_FREEZER is not set | 168 | # CONFIG_FREEZER is not set |
157 | CONFIG_PPC4xx_PCI_EXPRESS=y | 169 | CONFIG_PPC4xx_PCI_EXPRESS=y |
158 | 170 | ||
@@ -170,7 +182,7 @@ CONFIG_KILAUEA=y | |||
170 | # CONFIG_MAKALU is not set | 182 | # CONFIG_MAKALU is not set |
171 | # CONFIG_WALNUT is not set | 183 | # CONFIG_WALNUT is not set |
172 | # CONFIG_XILINX_VIRTEX_GENERIC_BOARD is not set | 184 | # CONFIG_XILINX_VIRTEX_GENERIC_BOARD is not set |
173 | # CONFIG_PPC40x_SIMPLE is not set | 185 | CONFIG_PPC40x_SIMPLE=y |
174 | CONFIG_405EX=y | 186 | CONFIG_405EX=y |
175 | # CONFIG_IPIC is not set | 187 | # CONFIG_IPIC is not set |
176 | # CONFIG_MPIC is not set | 188 | # CONFIG_MPIC is not set |
@@ -228,9 +240,12 @@ CONFIG_ZONE_DMA_FLAG=1 | |||
228 | CONFIG_BOUNCE=y | 240 | CONFIG_BOUNCE=y |
229 | CONFIG_VIRT_TO_BUS=y | 241 | CONFIG_VIRT_TO_BUS=y |
230 | CONFIG_UNEVICTABLE_LRU=y | 242 | CONFIG_UNEVICTABLE_LRU=y |
243 | CONFIG_HAVE_MLOCK=y | ||
244 | CONFIG_HAVE_MLOCKED_PAGE_BIT=y | ||
231 | CONFIG_PPC_4K_PAGES=y | 245 | CONFIG_PPC_4K_PAGES=y |
232 | # CONFIG_PPC_16K_PAGES is not set | 246 | # CONFIG_PPC_16K_PAGES is not set |
233 | # CONFIG_PPC_64K_PAGES is not set | 247 | # CONFIG_PPC_64K_PAGES is not set |
248 | # CONFIG_PPC_256K_PAGES is not set | ||
234 | CONFIG_FORCE_MAX_ZONEORDER=11 | 249 | CONFIG_FORCE_MAX_ZONEORDER=11 |
235 | CONFIG_PROC_DEVICETREE=y | 250 | CONFIG_PROC_DEVICETREE=y |
236 | # CONFIG_CMDLINE_BOOL is not set | 251 | # CONFIG_CMDLINE_BOOL is not set |
@@ -252,9 +267,10 @@ CONFIG_PCI_SYSCALL=y | |||
252 | # CONFIG_PCIEPORTBUS is not set | 267 | # CONFIG_PCIEPORTBUS is not set |
253 | CONFIG_ARCH_SUPPORTS_MSI=y | 268 | CONFIG_ARCH_SUPPORTS_MSI=y |
254 | # CONFIG_PCI_MSI is not set | 269 | # CONFIG_PCI_MSI is not set |
255 | CONFIG_PCI_LEGACY=y | 270 | # CONFIG_PCI_LEGACY is not set |
256 | # CONFIG_PCI_DEBUG is not set | 271 | # CONFIG_PCI_DEBUG is not set |
257 | # CONFIG_PCI_STUB is not set | 272 | # CONFIG_PCI_STUB is not set |
273 | # CONFIG_PCI_IOV is not set | ||
258 | # CONFIG_PCCARD is not set | 274 | # CONFIG_PCCARD is not set |
259 | # CONFIG_HOTPLUG_PCI is not set | 275 | # CONFIG_HOTPLUG_PCI is not set |
260 | # CONFIG_HAS_RAPIDIO is not set | 276 | # CONFIG_HAS_RAPIDIO is not set |
@@ -272,14 +288,12 @@ CONFIG_PAGE_OFFSET=0xc0000000 | |||
272 | CONFIG_KERNEL_START=0xc0000000 | 288 | CONFIG_KERNEL_START=0xc0000000 |
273 | CONFIG_PHYSICAL_START=0x00000000 | 289 | CONFIG_PHYSICAL_START=0x00000000 |
274 | CONFIG_TASK_SIZE=0xc0000000 | 290 | CONFIG_TASK_SIZE=0xc0000000 |
275 | CONFIG_CONSISTENT_START=0xff100000 | ||
276 | CONFIG_CONSISTENT_SIZE=0x00200000 | 291 | CONFIG_CONSISTENT_SIZE=0x00200000 |
277 | CONFIG_NET=y | 292 | CONFIG_NET=y |
278 | 293 | ||
279 | # | 294 | # |
280 | # Networking options | 295 | # Networking options |
281 | # | 296 | # |
282 | CONFIG_COMPAT_NET_DEV_OPS=y | ||
283 | CONFIG_PACKET=y | 297 | CONFIG_PACKET=y |
284 | # CONFIG_PACKET_MMAP is not set | 298 | # CONFIG_PACKET_MMAP is not set |
285 | CONFIG_UNIX=y | 299 | CONFIG_UNIX=y |
@@ -329,6 +343,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic" | |||
329 | # CONFIG_LAPB is not set | 343 | # CONFIG_LAPB is not set |
330 | # CONFIG_ECONET is not set | 344 | # CONFIG_ECONET is not set |
331 | # CONFIG_WAN_ROUTER is not set | 345 | # CONFIG_WAN_ROUTER is not set |
346 | # CONFIG_PHONET is not set | ||
332 | # CONFIG_NET_SCHED is not set | 347 | # CONFIG_NET_SCHED is not set |
333 | # CONFIG_DCB is not set | 348 | # CONFIG_DCB is not set |
334 | 349 | ||
@@ -341,7 +356,6 @@ CONFIG_DEFAULT_TCP_CONG="cubic" | |||
341 | # CONFIG_IRDA is not set | 356 | # CONFIG_IRDA is not set |
342 | # CONFIG_BT is not set | 357 | # CONFIG_BT is not set |
343 | # CONFIG_AF_RXRPC is not set | 358 | # CONFIG_AF_RXRPC is not set |
344 | # CONFIG_PHONET is not set | ||
345 | # CONFIG_WIRELESS is not set | 359 | # CONFIG_WIRELESS is not set |
346 | # CONFIG_WIMAX is not set | 360 | # CONFIG_WIMAX is not set |
347 | # CONFIG_RFKILL is not set | 361 | # CONFIG_RFKILL is not set |
@@ -445,7 +459,6 @@ CONFIG_MTD_PHYSMAP_OF=y | |||
445 | # LPDDR flash memory drivers | 459 | # LPDDR flash memory drivers |
446 | # | 460 | # |
447 | # CONFIG_MTD_LPDDR is not set | 461 | # CONFIG_MTD_LPDDR is not set |
448 | # CONFIG_MTD_QINFO_PROBE is not set | ||
449 | 462 | ||
450 | # | 463 | # |
451 | # UBI - Unsorted block images | 464 | # UBI - Unsorted block images |
@@ -498,6 +511,7 @@ CONFIG_HAVE_IDE=y | |||
498 | # CONFIG_I2O is not set | 511 | # CONFIG_I2O is not set |
499 | # CONFIG_MACINTOSH_DRIVERS is not set | 512 | # CONFIG_MACINTOSH_DRIVERS is not set |
500 | CONFIG_NETDEVICES=y | 513 | CONFIG_NETDEVICES=y |
514 | CONFIG_COMPAT_NET_DEV_OPS=y | ||
501 | # CONFIG_DUMMY is not set | 515 | # CONFIG_DUMMY is not set |
502 | # CONFIG_BONDING is not set | 516 | # CONFIG_BONDING is not set |
503 | # CONFIG_MACVLAN is not set | 517 | # CONFIG_MACVLAN is not set |
@@ -512,6 +526,8 @@ CONFIG_NET_ETHERNET=y | |||
512 | # CONFIG_SUNGEM is not set | 526 | # CONFIG_SUNGEM is not set |
513 | # CONFIG_CASSINI is not set | 527 | # CONFIG_CASSINI is not set |
514 | # CONFIG_NET_VENDOR_3COM is not set | 528 | # CONFIG_NET_VENDOR_3COM is not set |
529 | # CONFIG_ETHOC is not set | ||
530 | # CONFIG_DNET is not set | ||
515 | # CONFIG_NET_TULIP is not set | 531 | # CONFIG_NET_TULIP is not set |
516 | # CONFIG_HP100 is not set | 532 | # CONFIG_HP100 is not set |
517 | CONFIG_IBM_NEW_EMAC=y | 533 | CONFIG_IBM_NEW_EMAC=y |
@@ -540,7 +556,6 @@ CONFIG_IBM_NEW_EMAC_EMAC4=y | |||
540 | # | 556 | # |
541 | # CONFIG_WLAN_PRE80211 is not set | 557 | # CONFIG_WLAN_PRE80211 is not set |
542 | # CONFIG_WLAN_80211 is not set | 558 | # CONFIG_WLAN_80211 is not set |
543 | # CONFIG_IWLWIFI_LEDS is not set | ||
544 | 559 | ||
545 | # | 560 | # |
546 | # Enable WiMAX (Networking options) to see the WiMAX drivers | 561 | # Enable WiMAX (Networking options) to see the WiMAX drivers |
@@ -678,6 +693,7 @@ CONFIG_SSB_POSSIBLE=y | |||
678 | # CONFIG_EDAC is not set | 693 | # CONFIG_EDAC is not set |
679 | # CONFIG_RTC_CLASS is not set | 694 | # CONFIG_RTC_CLASS is not set |
680 | # CONFIG_DMADEVICES is not set | 695 | # CONFIG_DMADEVICES is not set |
696 | # CONFIG_AUXDISPLAY is not set | ||
681 | # CONFIG_UIO is not set | 697 | # CONFIG_UIO is not set |
682 | # CONFIG_STAGING is not set | 698 | # CONFIG_STAGING is not set |
683 | 699 | ||
@@ -706,6 +722,11 @@ CONFIG_INOTIFY_USER=y | |||
706 | # CONFIG_FUSE_FS is not set | 722 | # CONFIG_FUSE_FS is not set |
707 | 723 | ||
708 | # | 724 | # |
725 | # Caches | ||
726 | # | ||
727 | # CONFIG_FSCACHE is not set | ||
728 | |||
729 | # | ||
709 | # CD-ROM/DVD Filesystems | 730 | # CD-ROM/DVD Filesystems |
710 | # | 731 | # |
711 | # CONFIG_ISO9660_FS is not set | 732 | # CONFIG_ISO9660_FS is not set |
@@ -749,6 +770,7 @@ CONFIG_CRAMFS=y | |||
749 | # CONFIG_ROMFS_FS is not set | 770 | # CONFIG_ROMFS_FS is not set |
750 | # CONFIG_SYSV_FS is not set | 771 | # CONFIG_SYSV_FS is not set |
751 | # CONFIG_UFS_FS is not set | 772 | # CONFIG_UFS_FS is not set |
773 | # CONFIG_NILFS2_FS is not set | ||
752 | CONFIG_NETWORK_FILESYSTEMS=y | 774 | CONFIG_NETWORK_FILESYSTEMS=y |
753 | CONFIG_NFS_FS=y | 775 | CONFIG_NFS_FS=y |
754 | CONFIG_NFS_V3=y | 776 | CONFIG_NFS_V3=y |
@@ -760,7 +782,6 @@ CONFIG_LOCKD=y | |||
760 | CONFIG_LOCKD_V4=y | 782 | CONFIG_LOCKD_V4=y |
761 | CONFIG_NFS_COMMON=y | 783 | CONFIG_NFS_COMMON=y |
762 | CONFIG_SUNRPC=y | 784 | CONFIG_SUNRPC=y |
763 | # CONFIG_SUNRPC_REGISTER_V4 is not set | ||
764 | # CONFIG_RPCSEC_GSS_KRB5 is not set | 785 | # CONFIG_RPCSEC_GSS_KRB5 is not set |
765 | # CONFIG_RPCSEC_GSS_SPKM3 is not set | 786 | # CONFIG_RPCSEC_GSS_SPKM3 is not set |
766 | # CONFIG_SMB_FS is not set | 787 | # CONFIG_SMB_FS is not set |
@@ -776,6 +797,7 @@ CONFIG_SUNRPC=y | |||
776 | CONFIG_MSDOS_PARTITION=y | 797 | CONFIG_MSDOS_PARTITION=y |
777 | # CONFIG_NLS is not set | 798 | # CONFIG_NLS is not set |
778 | # CONFIG_DLM is not set | 799 | # CONFIG_DLM is not set |
800 | # CONFIG_BINARY_PRINTF is not set | ||
779 | 801 | ||
780 | # | 802 | # |
781 | # Library routines | 803 | # Library routines |
@@ -790,11 +812,12 @@ CONFIG_CRC32=y | |||
790 | # CONFIG_CRC7 is not set | 812 | # CONFIG_CRC7 is not set |
791 | # CONFIG_LIBCRC32C is not set | 813 | # CONFIG_LIBCRC32C is not set |
792 | CONFIG_ZLIB_INFLATE=y | 814 | CONFIG_ZLIB_INFLATE=y |
793 | CONFIG_PLIST=y | 815 | CONFIG_DECOMPRESS_GZIP=y |
794 | CONFIG_HAS_IOMEM=y | 816 | CONFIG_HAS_IOMEM=y |
795 | CONFIG_HAS_IOPORT=y | 817 | CONFIG_HAS_IOPORT=y |
796 | CONFIG_HAS_DMA=y | 818 | CONFIG_HAS_DMA=y |
797 | CONFIG_HAVE_LMB=y | 819 | CONFIG_HAVE_LMB=y |
820 | CONFIG_NLATTR=y | ||
798 | 821 | ||
799 | # | 822 | # |
800 | # Kernel hacking | 823 | # Kernel hacking |
@@ -812,6 +835,9 @@ CONFIG_DEBUG_KERNEL=y | |||
812 | CONFIG_DETECT_SOFTLOCKUP=y | 835 | CONFIG_DETECT_SOFTLOCKUP=y |
813 | # CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set | 836 | # CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set |
814 | CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 | 837 | CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 |
838 | CONFIG_DETECT_HUNG_TASK=y | ||
839 | # CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set | ||
840 | CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0 | ||
815 | CONFIG_SCHED_DEBUG=y | 841 | CONFIG_SCHED_DEBUG=y |
816 | # CONFIG_SCHEDSTATS is not set | 842 | # CONFIG_SCHEDSTATS is not set |
817 | # CONFIG_TIMER_STATS is not set | 843 | # CONFIG_TIMER_STATS is not set |
@@ -841,9 +867,12 @@ CONFIG_DEBUG_BUGVERBOSE=y | |||
841 | # CONFIG_FAULT_INJECTION is not set | 867 | # CONFIG_FAULT_INJECTION is not set |
842 | # CONFIG_LATENCYTOP is not set | 868 | # CONFIG_LATENCYTOP is not set |
843 | CONFIG_SYSCTL_SYSCALL_CHECK=y | 869 | CONFIG_SYSCTL_SYSCALL_CHECK=y |
870 | # CONFIG_DEBUG_PAGEALLOC is not set | ||
844 | CONFIG_HAVE_FUNCTION_TRACER=y | 871 | CONFIG_HAVE_FUNCTION_TRACER=y |
872 | CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y | ||
845 | CONFIG_HAVE_DYNAMIC_FTRACE=y | 873 | CONFIG_HAVE_DYNAMIC_FTRACE=y |
846 | CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y | 874 | CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y |
875 | CONFIG_TRACING_SUPPORT=y | ||
847 | 876 | ||
848 | # | 877 | # |
849 | # Tracers | 878 | # Tracers |
@@ -851,17 +880,21 @@ CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y | |||
851 | # CONFIG_FUNCTION_TRACER is not set | 880 | # CONFIG_FUNCTION_TRACER is not set |
852 | # CONFIG_SCHED_TRACER is not set | 881 | # CONFIG_SCHED_TRACER is not set |
853 | # CONFIG_CONTEXT_SWITCH_TRACER is not set | 882 | # CONFIG_CONTEXT_SWITCH_TRACER is not set |
883 | # CONFIG_EVENT_TRACER is not set | ||
854 | # CONFIG_BOOT_TRACER is not set | 884 | # CONFIG_BOOT_TRACER is not set |
855 | # CONFIG_TRACE_BRANCH_PROFILING is not set | 885 | # CONFIG_TRACE_BRANCH_PROFILING is not set |
856 | # CONFIG_STACK_TRACER is not set | 886 | # CONFIG_STACK_TRACER is not set |
857 | # CONFIG_DYNAMIC_PRINTK_DEBUG is not set | 887 | # CONFIG_KMEMTRACE is not set |
888 | # CONFIG_WORKQUEUE_TRACER is not set | ||
889 | # CONFIG_BLK_DEV_IO_TRACE is not set | ||
890 | # CONFIG_DYNAMIC_DEBUG is not set | ||
858 | # CONFIG_SAMPLES is not set | 891 | # CONFIG_SAMPLES is not set |
859 | CONFIG_HAVE_ARCH_KGDB=y | 892 | CONFIG_HAVE_ARCH_KGDB=y |
860 | # CONFIG_KGDB is not set | 893 | # CONFIG_KGDB is not set |
861 | CONFIG_PRINT_STACK_DEPTH=64 | 894 | CONFIG_PRINT_STACK_DEPTH=64 |
862 | # CONFIG_DEBUG_STACKOVERFLOW is not set | 895 | # CONFIG_DEBUG_STACKOVERFLOW is not set |
863 | # CONFIG_DEBUG_STACK_USAGE is not set | 896 | # CONFIG_DEBUG_STACK_USAGE is not set |
864 | # CONFIG_DEBUG_PAGEALLOC is not set | 897 | # CONFIG_PPC_EMULATED_STATS is not set |
865 | # CONFIG_CODE_PATCHING_SELFTEST is not set | 898 | # CONFIG_CODE_PATCHING_SELFTEST is not set |
866 | # CONFIG_FTR_FIXUP_SELFTEST is not set | 899 | # CONFIG_FTR_FIXUP_SELFTEST is not set |
867 | # CONFIG_MSI_BITMAP_SELFTEST is not set | 900 | # CONFIG_MSI_BITMAP_SELFTEST is not set |
@@ -892,10 +925,12 @@ CONFIG_CRYPTO_BLKCIPHER2=y | |||
892 | CONFIG_CRYPTO_HASH=y | 925 | CONFIG_CRYPTO_HASH=y |
893 | CONFIG_CRYPTO_HASH2=y | 926 | CONFIG_CRYPTO_HASH2=y |
894 | CONFIG_CRYPTO_RNG2=y | 927 | CONFIG_CRYPTO_RNG2=y |
928 | CONFIG_CRYPTO_PCOMP=y | ||
895 | CONFIG_CRYPTO_MANAGER=y | 929 | CONFIG_CRYPTO_MANAGER=y |
896 | CONFIG_CRYPTO_MANAGER2=y | 930 | CONFIG_CRYPTO_MANAGER2=y |
897 | # CONFIG_CRYPTO_GF128MUL is not set | 931 | # CONFIG_CRYPTO_GF128MUL is not set |
898 | # CONFIG_CRYPTO_NULL is not set | 932 | # CONFIG_CRYPTO_NULL is not set |
933 | CONFIG_CRYPTO_WORKQUEUE=y | ||
899 | # CONFIG_CRYPTO_CRYPTD is not set | 934 | # CONFIG_CRYPTO_CRYPTD is not set |
900 | # CONFIG_CRYPTO_AUTHENC is not set | 935 | # CONFIG_CRYPTO_AUTHENC is not set |
901 | # CONFIG_CRYPTO_TEST is not set | 936 | # CONFIG_CRYPTO_TEST is not set |
@@ -964,6 +999,7 @@ CONFIG_CRYPTO_DES=y | |||
964 | # Compression | 999 | # Compression |
965 | # | 1000 | # |
966 | # CONFIG_CRYPTO_DEFLATE is not set | 1001 | # CONFIG_CRYPTO_DEFLATE is not set |
1002 | # CONFIG_CRYPTO_ZLIB is not set | ||
967 | # CONFIG_CRYPTO_LZO is not set | 1003 | # CONFIG_CRYPTO_LZO is not set |
968 | 1004 | ||
969 | # | 1005 | # |
@@ -972,5 +1008,6 @@ CONFIG_CRYPTO_DES=y | |||
972 | # CONFIG_CRYPTO_ANSI_CPRNG is not set | 1008 | # CONFIG_CRYPTO_ANSI_CPRNG is not set |
973 | CONFIG_CRYPTO_HW=y | 1009 | CONFIG_CRYPTO_HW=y |
974 | # CONFIG_CRYPTO_DEV_HIFN_795X is not set | 1010 | # CONFIG_CRYPTO_DEV_HIFN_795X is not set |
1011 | # CONFIG_CRYPTO_DEV_PPC4XX is not set | ||
975 | # CONFIG_PPC_CLOCK is not set | 1012 | # CONFIG_PPC_CLOCK is not set |
976 | # CONFIG_VIRTUALIZATION is not set | 1013 | # CONFIG_VIRTUALIZATION is not set |
diff --git a/arch/powerpc/configs/40x/makalu_defconfig b/arch/powerpc/configs/40x/makalu_defconfig index 58bf2ac2e0dd..146747547873 100644 --- a/arch/powerpc/configs/40x/makalu_defconfig +++ b/arch/powerpc/configs/40x/makalu_defconfig | |||
@@ -1,7 +1,7 @@ | |||
1 | # | 1 | # |
2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
3 | # Linux kernel version: 2.6.29-rc2 | 3 | # Linux kernel version: 2.6.30-rc7 |
4 | # Tue Jan 20 08:17:53 2009 | 4 | # Wed Jun 3 09:11:02 2009 |
5 | # | 5 | # |
6 | # CONFIG_PPC64 is not set | 6 | # CONFIG_PPC64 is not set |
7 | 7 | ||
@@ -27,6 +27,7 @@ CONFIG_GENERIC_TIME=y | |||
27 | CONFIG_GENERIC_TIME_VSYSCALL=y | 27 | CONFIG_GENERIC_TIME_VSYSCALL=y |
28 | CONFIG_GENERIC_CLOCKEVENTS=y | 28 | CONFIG_GENERIC_CLOCKEVENTS=y |
29 | CONFIG_GENERIC_HARDIRQS=y | 29 | CONFIG_GENERIC_HARDIRQS=y |
30 | CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y | ||
30 | # CONFIG_HAVE_SETUP_PER_CPU_AREA is not set | 31 | # CONFIG_HAVE_SETUP_PER_CPU_AREA is not set |
31 | CONFIG_IRQ_PER_CPU=y | 32 | CONFIG_IRQ_PER_CPU=y |
32 | CONFIG_STACKTRACE_SUPPORT=y | 33 | CONFIG_STACKTRACE_SUPPORT=y |
@@ -49,10 +50,12 @@ CONFIG_PPC_UDBG_16550=y | |||
49 | # CONFIG_GENERIC_TBSYNC is not set | 50 | # CONFIG_GENERIC_TBSYNC is not set |
50 | CONFIG_AUDIT_ARCH=y | 51 | CONFIG_AUDIT_ARCH=y |
51 | CONFIG_GENERIC_BUG=y | 52 | CONFIG_GENERIC_BUG=y |
53 | CONFIG_DTC=y | ||
52 | # CONFIG_DEFAULT_UIMAGE is not set | 54 | # CONFIG_DEFAULT_UIMAGE is not set |
53 | CONFIG_PPC_DCR_NATIVE=y | 55 | CONFIG_PPC_DCR_NATIVE=y |
54 | # CONFIG_PPC_DCR_MMIO is not set | 56 | # CONFIG_PPC_DCR_MMIO is not set |
55 | CONFIG_PPC_DCR=y | 57 | CONFIG_PPC_DCR=y |
58 | CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y | ||
56 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | 59 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" |
57 | 60 | ||
58 | # | 61 | # |
@@ -67,9 +70,19 @@ CONFIG_SWAP=y | |||
67 | CONFIG_SYSVIPC=y | 70 | CONFIG_SYSVIPC=y |
68 | CONFIG_SYSVIPC_SYSCTL=y | 71 | CONFIG_SYSVIPC_SYSCTL=y |
69 | CONFIG_POSIX_MQUEUE=y | 72 | CONFIG_POSIX_MQUEUE=y |
73 | CONFIG_POSIX_MQUEUE_SYSCTL=y | ||
70 | # CONFIG_BSD_PROCESS_ACCT is not set | 74 | # CONFIG_BSD_PROCESS_ACCT is not set |
71 | # CONFIG_TASKSTATS is not set | 75 | # CONFIG_TASKSTATS is not set |
72 | # CONFIG_AUDIT is not set | 76 | # CONFIG_AUDIT is not set |
77 | |||
78 | # | ||
79 | # RCU Subsystem | ||
80 | # | ||
81 | CONFIG_CLASSIC_RCU=y | ||
82 | # CONFIG_TREE_RCU is not set | ||
83 | # CONFIG_PREEMPT_RCU is not set | ||
84 | # CONFIG_TREE_RCU_TRACE is not set | ||
85 | # CONFIG_PREEMPT_RCU_TRACE is not set | ||
73 | # CONFIG_IKCONFIG is not set | 86 | # CONFIG_IKCONFIG is not set |
74 | CONFIG_LOG_BUF_SHIFT=14 | 87 | CONFIG_LOG_BUF_SHIFT=14 |
75 | CONFIG_GROUP_SCHED=y | 88 | CONFIG_GROUP_SCHED=y |
@@ -84,22 +97,24 @@ CONFIG_SYSFS_DEPRECATED_V2=y | |||
84 | # CONFIG_NAMESPACES is not set | 97 | # CONFIG_NAMESPACES is not set |
85 | CONFIG_BLK_DEV_INITRD=y | 98 | CONFIG_BLK_DEV_INITRD=y |
86 | CONFIG_INITRAMFS_SOURCE="" | 99 | CONFIG_INITRAMFS_SOURCE="" |
100 | CONFIG_RD_GZIP=y | ||
101 | # CONFIG_RD_BZIP2 is not set | ||
102 | # CONFIG_RD_LZMA is not set | ||
87 | # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set | 103 | # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set |
88 | CONFIG_SYSCTL=y | 104 | CONFIG_SYSCTL=y |
105 | CONFIG_ANON_INODES=y | ||
89 | CONFIG_EMBEDDED=y | 106 | CONFIG_EMBEDDED=y |
90 | CONFIG_SYSCTL_SYSCALL=y | 107 | CONFIG_SYSCTL_SYSCALL=y |
91 | CONFIG_KALLSYMS=y | 108 | CONFIG_KALLSYMS=y |
92 | CONFIG_KALLSYMS_ALL=y | 109 | CONFIG_KALLSYMS_ALL=y |
93 | CONFIG_KALLSYMS_STRIP_GENERATED=y | ||
94 | CONFIG_KALLSYMS_EXTRA_PASS=y | 110 | CONFIG_KALLSYMS_EXTRA_PASS=y |
111 | # CONFIG_STRIP_ASM_SYMS is not set | ||
95 | CONFIG_HOTPLUG=y | 112 | CONFIG_HOTPLUG=y |
96 | CONFIG_PRINTK=y | 113 | CONFIG_PRINTK=y |
97 | CONFIG_BUG=y | 114 | CONFIG_BUG=y |
98 | CONFIG_ELF_CORE=y | 115 | CONFIG_ELF_CORE=y |
99 | CONFIG_COMPAT_BRK=y | ||
100 | CONFIG_BASE_FULL=y | 116 | CONFIG_BASE_FULL=y |
101 | CONFIG_FUTEX=y | 117 | CONFIG_FUTEX=y |
102 | CONFIG_ANON_INODES=y | ||
103 | CONFIG_EPOLL=y | 118 | CONFIG_EPOLL=y |
104 | CONFIG_SIGNALFD=y | 119 | CONFIG_SIGNALFD=y |
105 | CONFIG_TIMERFD=y | 120 | CONFIG_TIMERFD=y |
@@ -109,10 +124,12 @@ CONFIG_AIO=y | |||
109 | CONFIG_VM_EVENT_COUNTERS=y | 124 | CONFIG_VM_EVENT_COUNTERS=y |
110 | CONFIG_PCI_QUIRKS=y | 125 | CONFIG_PCI_QUIRKS=y |
111 | CONFIG_SLUB_DEBUG=y | 126 | CONFIG_SLUB_DEBUG=y |
127 | CONFIG_COMPAT_BRK=y | ||
112 | # CONFIG_SLAB is not set | 128 | # CONFIG_SLAB is not set |
113 | CONFIG_SLUB=y | 129 | CONFIG_SLUB=y |
114 | # CONFIG_SLOB is not set | 130 | # CONFIG_SLOB is not set |
115 | # CONFIG_PROFILING is not set | 131 | # CONFIG_PROFILING is not set |
132 | # CONFIG_MARKERS is not set | ||
116 | CONFIG_HAVE_OPROFILE=y | 133 | CONFIG_HAVE_OPROFILE=y |
117 | # CONFIG_KPROBES is not set | 134 | # CONFIG_KPROBES is not set |
118 | CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y | 135 | CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y |
@@ -120,6 +137,7 @@ CONFIG_HAVE_IOREMAP_PROT=y | |||
120 | CONFIG_HAVE_KPROBES=y | 137 | CONFIG_HAVE_KPROBES=y |
121 | CONFIG_HAVE_KRETPROBES=y | 138 | CONFIG_HAVE_KRETPROBES=y |
122 | CONFIG_HAVE_ARCH_TRACEHOOK=y | 139 | CONFIG_HAVE_ARCH_TRACEHOOK=y |
140 | # CONFIG_SLOW_WORK is not set | ||
123 | # CONFIG_HAVE_GENERIC_DMA_COHERENT is not set | 141 | # CONFIG_HAVE_GENERIC_DMA_COHERENT is not set |
124 | CONFIG_SLABINFO=y | 142 | CONFIG_SLABINFO=y |
125 | CONFIG_RT_MUTEXES=y | 143 | CONFIG_RT_MUTEXES=y |
@@ -132,7 +150,6 @@ CONFIG_MODULE_UNLOAD=y | |||
132 | # CONFIG_MODULE_SRCVERSION_ALL is not set | 150 | # CONFIG_MODULE_SRCVERSION_ALL is not set |
133 | CONFIG_BLOCK=y | 151 | CONFIG_BLOCK=y |
134 | CONFIG_LBD=y | 152 | CONFIG_LBD=y |
135 | # CONFIG_BLK_DEV_IO_TRACE is not set | ||
136 | # CONFIG_BLK_DEV_BSG is not set | 153 | # CONFIG_BLK_DEV_BSG is not set |
137 | # CONFIG_BLK_DEV_INTEGRITY is not set | 154 | # CONFIG_BLK_DEV_INTEGRITY is not set |
138 | 155 | ||
@@ -148,11 +165,6 @@ CONFIG_DEFAULT_AS=y | |||
148 | # CONFIG_DEFAULT_CFQ is not set | 165 | # CONFIG_DEFAULT_CFQ is not set |
149 | # CONFIG_DEFAULT_NOOP is not set | 166 | # CONFIG_DEFAULT_NOOP is not set |
150 | CONFIG_DEFAULT_IOSCHED="anticipatory" | 167 | CONFIG_DEFAULT_IOSCHED="anticipatory" |
151 | CONFIG_CLASSIC_RCU=y | ||
152 | # CONFIG_TREE_RCU is not set | ||
153 | # CONFIG_PREEMPT_RCU is not set | ||
154 | # CONFIG_TREE_RCU_TRACE is not set | ||
155 | # CONFIG_PREEMPT_RCU_TRACE is not set | ||
156 | # CONFIG_FREEZER is not set | 168 | # CONFIG_FREEZER is not set |
157 | CONFIG_PPC4xx_PCI_EXPRESS=y | 169 | CONFIG_PPC4xx_PCI_EXPRESS=y |
158 | 170 | ||
@@ -170,7 +182,7 @@ CONFIG_PPC4xx_PCI_EXPRESS=y | |||
170 | CONFIG_MAKALU=y | 182 | CONFIG_MAKALU=y |
171 | # CONFIG_WALNUT is not set | 183 | # CONFIG_WALNUT is not set |
172 | # CONFIG_XILINX_VIRTEX_GENERIC_BOARD is not set | 184 | # CONFIG_XILINX_VIRTEX_GENERIC_BOARD is not set |
173 | # CONFIG_PPC40x_SIMPLE is not set | 185 | CONFIG_PPC40x_SIMPLE=y |
174 | CONFIG_405EX=y | 186 | CONFIG_405EX=y |
175 | # CONFIG_IPIC is not set | 187 | # CONFIG_IPIC is not set |
176 | # CONFIG_MPIC is not set | 188 | # CONFIG_MPIC is not set |
@@ -228,9 +240,12 @@ CONFIG_ZONE_DMA_FLAG=1 | |||
228 | CONFIG_BOUNCE=y | 240 | CONFIG_BOUNCE=y |
229 | CONFIG_VIRT_TO_BUS=y | 241 | CONFIG_VIRT_TO_BUS=y |
230 | CONFIG_UNEVICTABLE_LRU=y | 242 | CONFIG_UNEVICTABLE_LRU=y |
243 | CONFIG_HAVE_MLOCK=y | ||
244 | CONFIG_HAVE_MLOCKED_PAGE_BIT=y | ||
231 | CONFIG_PPC_4K_PAGES=y | 245 | CONFIG_PPC_4K_PAGES=y |
232 | # CONFIG_PPC_16K_PAGES is not set | 246 | # CONFIG_PPC_16K_PAGES is not set |
233 | # CONFIG_PPC_64K_PAGES is not set | 247 | # CONFIG_PPC_64K_PAGES is not set |
248 | # CONFIG_PPC_256K_PAGES is not set | ||
234 | CONFIG_FORCE_MAX_ZONEORDER=11 | 249 | CONFIG_FORCE_MAX_ZONEORDER=11 |
235 | CONFIG_PROC_DEVICETREE=y | 250 | CONFIG_PROC_DEVICETREE=y |
236 | # CONFIG_CMDLINE_BOOL is not set | 251 | # CONFIG_CMDLINE_BOOL is not set |
@@ -252,9 +267,10 @@ CONFIG_PCI_SYSCALL=y | |||
252 | # CONFIG_PCIEPORTBUS is not set | 267 | # CONFIG_PCIEPORTBUS is not set |
253 | CONFIG_ARCH_SUPPORTS_MSI=y | 268 | CONFIG_ARCH_SUPPORTS_MSI=y |
254 | # CONFIG_PCI_MSI is not set | 269 | # CONFIG_PCI_MSI is not set |
255 | CONFIG_PCI_LEGACY=y | 270 | # CONFIG_PCI_LEGACY is not set |
256 | # CONFIG_PCI_DEBUG is not set | 271 | # CONFIG_PCI_DEBUG is not set |
257 | # CONFIG_PCI_STUB is not set | 272 | # CONFIG_PCI_STUB is not set |
273 | # CONFIG_PCI_IOV is not set | ||
258 | # CONFIG_PCCARD is not set | 274 | # CONFIG_PCCARD is not set |
259 | # CONFIG_HOTPLUG_PCI is not set | 275 | # CONFIG_HOTPLUG_PCI is not set |
260 | # CONFIG_HAS_RAPIDIO is not set | 276 | # CONFIG_HAS_RAPIDIO is not set |
@@ -272,14 +288,12 @@ CONFIG_PAGE_OFFSET=0xc0000000 | |||
272 | CONFIG_KERNEL_START=0xc0000000 | 288 | CONFIG_KERNEL_START=0xc0000000 |
273 | CONFIG_PHYSICAL_START=0x00000000 | 289 | CONFIG_PHYSICAL_START=0x00000000 |
274 | CONFIG_TASK_SIZE=0xc0000000 | 290 | CONFIG_TASK_SIZE=0xc0000000 |
275 | CONFIG_CONSISTENT_START=0xff100000 | ||
276 | CONFIG_CONSISTENT_SIZE=0x00200000 | 291 | CONFIG_CONSISTENT_SIZE=0x00200000 |
277 | CONFIG_NET=y | 292 | CONFIG_NET=y |
278 | 293 | ||
279 | # | 294 | # |
280 | # Networking options | 295 | # Networking options |
281 | # | 296 | # |
282 | CONFIG_COMPAT_NET_DEV_OPS=y | ||
283 | CONFIG_PACKET=y | 297 | CONFIG_PACKET=y |
284 | # CONFIG_PACKET_MMAP is not set | 298 | # CONFIG_PACKET_MMAP is not set |
285 | CONFIG_UNIX=y | 299 | CONFIG_UNIX=y |
@@ -329,6 +343,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic" | |||
329 | # CONFIG_LAPB is not set | 343 | # CONFIG_LAPB is not set |
330 | # CONFIG_ECONET is not set | 344 | # CONFIG_ECONET is not set |
331 | # CONFIG_WAN_ROUTER is not set | 345 | # CONFIG_WAN_ROUTER is not set |
346 | # CONFIG_PHONET is not set | ||
332 | # CONFIG_NET_SCHED is not set | 347 | # CONFIG_NET_SCHED is not set |
333 | # CONFIG_DCB is not set | 348 | # CONFIG_DCB is not set |
334 | 349 | ||
@@ -341,7 +356,6 @@ CONFIG_DEFAULT_TCP_CONG="cubic" | |||
341 | # CONFIG_IRDA is not set | 356 | # CONFIG_IRDA is not set |
342 | # CONFIG_BT is not set | 357 | # CONFIG_BT is not set |
343 | # CONFIG_AF_RXRPC is not set | 358 | # CONFIG_AF_RXRPC is not set |
344 | # CONFIG_PHONET is not set | ||
345 | # CONFIG_WIRELESS is not set | 359 | # CONFIG_WIRELESS is not set |
346 | # CONFIG_WIMAX is not set | 360 | # CONFIG_WIMAX is not set |
347 | # CONFIG_RFKILL is not set | 361 | # CONFIG_RFKILL is not set |
@@ -445,7 +459,6 @@ CONFIG_MTD_PHYSMAP_OF=y | |||
445 | # LPDDR flash memory drivers | 459 | # LPDDR flash memory drivers |
446 | # | 460 | # |
447 | # CONFIG_MTD_LPDDR is not set | 461 | # CONFIG_MTD_LPDDR is not set |
448 | # CONFIG_MTD_QINFO_PROBE is not set | ||
449 | 462 | ||
450 | # | 463 | # |
451 | # UBI - Unsorted block images | 464 | # UBI - Unsorted block images |
@@ -498,6 +511,7 @@ CONFIG_HAVE_IDE=y | |||
498 | # CONFIG_I2O is not set | 511 | # CONFIG_I2O is not set |
499 | # CONFIG_MACINTOSH_DRIVERS is not set | 512 | # CONFIG_MACINTOSH_DRIVERS is not set |
500 | CONFIG_NETDEVICES=y | 513 | CONFIG_NETDEVICES=y |
514 | CONFIG_COMPAT_NET_DEV_OPS=y | ||
501 | # CONFIG_DUMMY is not set | 515 | # CONFIG_DUMMY is not set |
502 | # CONFIG_BONDING is not set | 516 | # CONFIG_BONDING is not set |
503 | # CONFIG_MACVLAN is not set | 517 | # CONFIG_MACVLAN is not set |
@@ -512,6 +526,8 @@ CONFIG_NET_ETHERNET=y | |||
512 | # CONFIG_SUNGEM is not set | 526 | # CONFIG_SUNGEM is not set |
513 | # CONFIG_CASSINI is not set | 527 | # CONFIG_CASSINI is not set |
514 | # CONFIG_NET_VENDOR_3COM is not set | 528 | # CONFIG_NET_VENDOR_3COM is not set |
529 | # CONFIG_ETHOC is not set | ||
530 | # CONFIG_DNET is not set | ||
515 | # CONFIG_NET_TULIP is not set | 531 | # CONFIG_NET_TULIP is not set |
516 | # CONFIG_HP100 is not set | 532 | # CONFIG_HP100 is not set |
517 | CONFIG_IBM_NEW_EMAC=y | 533 | CONFIG_IBM_NEW_EMAC=y |
@@ -540,7 +556,6 @@ CONFIG_IBM_NEW_EMAC_EMAC4=y | |||
540 | # | 556 | # |
541 | # CONFIG_WLAN_PRE80211 is not set | 557 | # CONFIG_WLAN_PRE80211 is not set |
542 | # CONFIG_WLAN_80211 is not set | 558 | # CONFIG_WLAN_80211 is not set |
543 | # CONFIG_IWLWIFI_LEDS is not set | ||
544 | 559 | ||
545 | # | 560 | # |
546 | # Enable WiMAX (Networking options) to see the WiMAX drivers | 561 | # Enable WiMAX (Networking options) to see the WiMAX drivers |
@@ -678,6 +693,7 @@ CONFIG_SSB_POSSIBLE=y | |||
678 | # CONFIG_EDAC is not set | 693 | # CONFIG_EDAC is not set |
679 | # CONFIG_RTC_CLASS is not set | 694 | # CONFIG_RTC_CLASS is not set |
680 | # CONFIG_DMADEVICES is not set | 695 | # CONFIG_DMADEVICES is not set |
696 | # CONFIG_AUXDISPLAY is not set | ||
681 | # CONFIG_UIO is not set | 697 | # CONFIG_UIO is not set |
682 | # CONFIG_STAGING is not set | 698 | # CONFIG_STAGING is not set |
683 | 699 | ||
@@ -706,6 +722,11 @@ CONFIG_INOTIFY_USER=y | |||
706 | # CONFIG_FUSE_FS is not set | 722 | # CONFIG_FUSE_FS is not set |
707 | 723 | ||
708 | # | 724 | # |
725 | # Caches | ||
726 | # | ||
727 | # CONFIG_FSCACHE is not set | ||
728 | |||
729 | # | ||
709 | # CD-ROM/DVD Filesystems | 730 | # CD-ROM/DVD Filesystems |
710 | # | 731 | # |
711 | # CONFIG_ISO9660_FS is not set | 732 | # CONFIG_ISO9660_FS is not set |
@@ -749,6 +770,7 @@ CONFIG_CRAMFS=y | |||
749 | # CONFIG_ROMFS_FS is not set | 770 | # CONFIG_ROMFS_FS is not set |
750 | # CONFIG_SYSV_FS is not set | 771 | # CONFIG_SYSV_FS is not set |
751 | # CONFIG_UFS_FS is not set | 772 | # CONFIG_UFS_FS is not set |
773 | # CONFIG_NILFS2_FS is not set | ||
752 | CONFIG_NETWORK_FILESYSTEMS=y | 774 | CONFIG_NETWORK_FILESYSTEMS=y |
753 | CONFIG_NFS_FS=y | 775 | CONFIG_NFS_FS=y |
754 | CONFIG_NFS_V3=y | 776 | CONFIG_NFS_V3=y |
@@ -760,7 +782,6 @@ CONFIG_LOCKD=y | |||
760 | CONFIG_LOCKD_V4=y | 782 | CONFIG_LOCKD_V4=y |
761 | CONFIG_NFS_COMMON=y | 783 | CONFIG_NFS_COMMON=y |
762 | CONFIG_SUNRPC=y | 784 | CONFIG_SUNRPC=y |
763 | # CONFIG_SUNRPC_REGISTER_V4 is not set | ||
764 | # CONFIG_RPCSEC_GSS_KRB5 is not set | 785 | # CONFIG_RPCSEC_GSS_KRB5 is not set |
765 | # CONFIG_RPCSEC_GSS_SPKM3 is not set | 786 | # CONFIG_RPCSEC_GSS_SPKM3 is not set |
766 | # CONFIG_SMB_FS is not set | 787 | # CONFIG_SMB_FS is not set |
@@ -776,6 +797,7 @@ CONFIG_SUNRPC=y | |||
776 | CONFIG_MSDOS_PARTITION=y | 797 | CONFIG_MSDOS_PARTITION=y |
777 | # CONFIG_NLS is not set | 798 | # CONFIG_NLS is not set |
778 | # CONFIG_DLM is not set | 799 | # CONFIG_DLM is not set |
800 | # CONFIG_BINARY_PRINTF is not set | ||
779 | 801 | ||
780 | # | 802 | # |
781 | # Library routines | 803 | # Library routines |
@@ -790,11 +812,12 @@ CONFIG_CRC32=y | |||
790 | # CONFIG_CRC7 is not set | 812 | # CONFIG_CRC7 is not set |
791 | # CONFIG_LIBCRC32C is not set | 813 | # CONFIG_LIBCRC32C is not set |
792 | CONFIG_ZLIB_INFLATE=y | 814 | CONFIG_ZLIB_INFLATE=y |
793 | CONFIG_PLIST=y | 815 | CONFIG_DECOMPRESS_GZIP=y |
794 | CONFIG_HAS_IOMEM=y | 816 | CONFIG_HAS_IOMEM=y |
795 | CONFIG_HAS_IOPORT=y | 817 | CONFIG_HAS_IOPORT=y |
796 | CONFIG_HAS_DMA=y | 818 | CONFIG_HAS_DMA=y |
797 | CONFIG_HAVE_LMB=y | 819 | CONFIG_HAVE_LMB=y |
820 | CONFIG_NLATTR=y | ||
798 | 821 | ||
799 | # | 822 | # |
800 | # Kernel hacking | 823 | # Kernel hacking |
@@ -812,6 +835,9 @@ CONFIG_DEBUG_KERNEL=y | |||
812 | CONFIG_DETECT_SOFTLOCKUP=y | 835 | CONFIG_DETECT_SOFTLOCKUP=y |
813 | # CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set | 836 | # CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set |
814 | CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 | 837 | CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 |
838 | CONFIG_DETECT_HUNG_TASK=y | ||
839 | # CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set | ||
840 | CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0 | ||
815 | CONFIG_SCHED_DEBUG=y | 841 | CONFIG_SCHED_DEBUG=y |
816 | # CONFIG_SCHEDSTATS is not set | 842 | # CONFIG_SCHEDSTATS is not set |
817 | # CONFIG_TIMER_STATS is not set | 843 | # CONFIG_TIMER_STATS is not set |
@@ -841,9 +867,12 @@ CONFIG_DEBUG_BUGVERBOSE=y | |||
841 | # CONFIG_FAULT_INJECTION is not set | 867 | # CONFIG_FAULT_INJECTION is not set |
842 | # CONFIG_LATENCYTOP is not set | 868 | # CONFIG_LATENCYTOP is not set |
843 | CONFIG_SYSCTL_SYSCALL_CHECK=y | 869 | CONFIG_SYSCTL_SYSCALL_CHECK=y |
870 | # CONFIG_DEBUG_PAGEALLOC is not set | ||
844 | CONFIG_HAVE_FUNCTION_TRACER=y | 871 | CONFIG_HAVE_FUNCTION_TRACER=y |
872 | CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y | ||
845 | CONFIG_HAVE_DYNAMIC_FTRACE=y | 873 | CONFIG_HAVE_DYNAMIC_FTRACE=y |
846 | CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y | 874 | CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y |
875 | CONFIG_TRACING_SUPPORT=y | ||
847 | 876 | ||
848 | # | 877 | # |
849 | # Tracers | 878 | # Tracers |
@@ -851,17 +880,21 @@ CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y | |||
851 | # CONFIG_FUNCTION_TRACER is not set | 880 | # CONFIG_FUNCTION_TRACER is not set |
852 | # CONFIG_SCHED_TRACER is not set | 881 | # CONFIG_SCHED_TRACER is not set |
853 | # CONFIG_CONTEXT_SWITCH_TRACER is not set | 882 | # CONFIG_CONTEXT_SWITCH_TRACER is not set |
883 | # CONFIG_EVENT_TRACER is not set | ||
854 | # CONFIG_BOOT_TRACER is not set | 884 | # CONFIG_BOOT_TRACER is not set |
855 | # CONFIG_TRACE_BRANCH_PROFILING is not set | 885 | # CONFIG_TRACE_BRANCH_PROFILING is not set |
856 | # CONFIG_STACK_TRACER is not set | 886 | # CONFIG_STACK_TRACER is not set |
857 | # CONFIG_DYNAMIC_PRINTK_DEBUG is not set | 887 | # CONFIG_KMEMTRACE is not set |
888 | # CONFIG_WORKQUEUE_TRACER is not set | ||
889 | # CONFIG_BLK_DEV_IO_TRACE is not set | ||
890 | # CONFIG_DYNAMIC_DEBUG is not set | ||
858 | # CONFIG_SAMPLES is not set | 891 | # CONFIG_SAMPLES is not set |
859 | CONFIG_HAVE_ARCH_KGDB=y | 892 | CONFIG_HAVE_ARCH_KGDB=y |
860 | # CONFIG_KGDB is not set | 893 | # CONFIG_KGDB is not set |
861 | CONFIG_PRINT_STACK_DEPTH=64 | 894 | CONFIG_PRINT_STACK_DEPTH=64 |
862 | # CONFIG_DEBUG_STACKOVERFLOW is not set | 895 | # CONFIG_DEBUG_STACKOVERFLOW is not set |
863 | # CONFIG_DEBUG_STACK_USAGE is not set | 896 | # CONFIG_DEBUG_STACK_USAGE is not set |
864 | # CONFIG_DEBUG_PAGEALLOC is not set | 897 | # CONFIG_PPC_EMULATED_STATS is not set |
865 | # CONFIG_CODE_PATCHING_SELFTEST is not set | 898 | # CONFIG_CODE_PATCHING_SELFTEST is not set |
866 | # CONFIG_FTR_FIXUP_SELFTEST is not set | 899 | # CONFIG_FTR_FIXUP_SELFTEST is not set |
867 | # CONFIG_MSI_BITMAP_SELFTEST is not set | 900 | # CONFIG_MSI_BITMAP_SELFTEST is not set |
@@ -892,10 +925,12 @@ CONFIG_CRYPTO_BLKCIPHER2=y | |||
892 | CONFIG_CRYPTO_HASH=y | 925 | CONFIG_CRYPTO_HASH=y |
893 | CONFIG_CRYPTO_HASH2=y | 926 | CONFIG_CRYPTO_HASH2=y |
894 | CONFIG_CRYPTO_RNG2=y | 927 | CONFIG_CRYPTO_RNG2=y |
928 | CONFIG_CRYPTO_PCOMP=y | ||
895 | CONFIG_CRYPTO_MANAGER=y | 929 | CONFIG_CRYPTO_MANAGER=y |
896 | CONFIG_CRYPTO_MANAGER2=y | 930 | CONFIG_CRYPTO_MANAGER2=y |
897 | # CONFIG_CRYPTO_GF128MUL is not set | 931 | # CONFIG_CRYPTO_GF128MUL is not set |
898 | # CONFIG_CRYPTO_NULL is not set | 932 | # CONFIG_CRYPTO_NULL is not set |
933 | CONFIG_CRYPTO_WORKQUEUE=y | ||
899 | # CONFIG_CRYPTO_CRYPTD is not set | 934 | # CONFIG_CRYPTO_CRYPTD is not set |
900 | # CONFIG_CRYPTO_AUTHENC is not set | 935 | # CONFIG_CRYPTO_AUTHENC is not set |
901 | # CONFIG_CRYPTO_TEST is not set | 936 | # CONFIG_CRYPTO_TEST is not set |
@@ -964,6 +999,7 @@ CONFIG_CRYPTO_DES=y | |||
964 | # Compression | 999 | # Compression |
965 | # | 1000 | # |
966 | # CONFIG_CRYPTO_DEFLATE is not set | 1001 | # CONFIG_CRYPTO_DEFLATE is not set |
1002 | # CONFIG_CRYPTO_ZLIB is not set | ||
967 | # CONFIG_CRYPTO_LZO is not set | 1003 | # CONFIG_CRYPTO_LZO is not set |
968 | 1004 | ||
969 | # | 1005 | # |
@@ -972,5 +1008,6 @@ CONFIG_CRYPTO_DES=y | |||
972 | # CONFIG_CRYPTO_ANSI_CPRNG is not set | 1008 | # CONFIG_CRYPTO_ANSI_CPRNG is not set |
973 | CONFIG_CRYPTO_HW=y | 1009 | CONFIG_CRYPTO_HW=y |
974 | # CONFIG_CRYPTO_DEV_HIFN_795X is not set | 1010 | # CONFIG_CRYPTO_DEV_HIFN_795X is not set |
1011 | # CONFIG_CRYPTO_DEV_PPC4XX is not set | ||
975 | # CONFIG_PPC_CLOCK is not set | 1012 | # CONFIG_PPC_CLOCK is not set |
976 | # CONFIG_VIRTUALIZATION is not set | 1013 | # CONFIG_VIRTUALIZATION is not set |
diff --git a/arch/powerpc/configs/40x/virtex_defconfig b/arch/powerpc/configs/40x/virtex_defconfig index f5698f962e58..416e79ac0711 100644 --- a/arch/powerpc/configs/40x/virtex_defconfig +++ b/arch/powerpc/configs/40x/virtex_defconfig | |||
@@ -258,7 +258,7 @@ CONFIG_PCI_SYSCALL=y | |||
258 | # CONFIG_PCIEPORTBUS is not set | 258 | # CONFIG_PCIEPORTBUS is not set |
259 | CONFIG_ARCH_SUPPORTS_MSI=y | 259 | CONFIG_ARCH_SUPPORTS_MSI=y |
260 | # CONFIG_PCI_MSI is not set | 260 | # CONFIG_PCI_MSI is not set |
261 | CONFIG_PCI_LEGACY=y | 261 | # CONFIG_PCI_LEGACY is not set |
262 | # CONFIG_PCI_DEBUG is not set | 262 | # CONFIG_PCI_DEBUG is not set |
263 | # CONFIG_PCI_STUB is not set | 263 | # CONFIG_PCI_STUB is not set |
264 | # CONFIG_PCCARD is not set | 264 | # CONFIG_PCCARD is not set |
diff --git a/arch/powerpc/configs/44x/arches_defconfig b/arch/powerpc/configs/44x/arches_defconfig index 1d72b0ac3f25..f7fd32c09424 100644 --- a/arch/powerpc/configs/44x/arches_defconfig +++ b/arch/powerpc/configs/44x/arches_defconfig | |||
@@ -258,7 +258,7 @@ CONFIG_PCI_SYSCALL=y | |||
258 | # CONFIG_PCIEPORTBUS is not set | 258 | # CONFIG_PCIEPORTBUS is not set |
259 | CONFIG_ARCH_SUPPORTS_MSI=y | 259 | CONFIG_ARCH_SUPPORTS_MSI=y |
260 | # CONFIG_PCI_MSI is not set | 260 | # CONFIG_PCI_MSI is not set |
261 | CONFIG_PCI_LEGACY=y | 261 | # CONFIG_PCI_LEGACY is not set |
262 | # CONFIG_PCI_DEBUG is not set | 262 | # CONFIG_PCI_DEBUG is not set |
263 | # CONFIG_PCI_STUB is not set | 263 | # CONFIG_PCI_STUB is not set |
264 | # CONFIG_PCCARD is not set | 264 | # CONFIG_PCCARD is not set |
diff --git a/arch/powerpc/configs/44x/bamboo_defconfig b/arch/powerpc/configs/44x/bamboo_defconfig index 959bdc43a491..e57f1e4c1795 100644 --- a/arch/powerpc/configs/44x/bamboo_defconfig +++ b/arch/powerpc/configs/44x/bamboo_defconfig | |||
@@ -262,7 +262,7 @@ CONFIG_PCI_SYSCALL=y | |||
262 | # CONFIG_PCIEPORTBUS is not set | 262 | # CONFIG_PCIEPORTBUS is not set |
263 | CONFIG_ARCH_SUPPORTS_MSI=y | 263 | CONFIG_ARCH_SUPPORTS_MSI=y |
264 | # CONFIG_PCI_MSI is not set | 264 | # CONFIG_PCI_MSI is not set |
265 | CONFIG_PCI_LEGACY=y | 265 | # CONFIG_PCI_LEGACY is not set |
266 | # CONFIG_PCI_DEBUG is not set | 266 | # CONFIG_PCI_DEBUG is not set |
267 | # CONFIG_PCI_STUB is not set | 267 | # CONFIG_PCI_STUB is not set |
268 | # CONFIG_PCCARD is not set | 268 | # CONFIG_PCCARD is not set |
diff --git a/arch/powerpc/configs/44x/canyonlands_defconfig b/arch/powerpc/configs/44x/canyonlands_defconfig index f9a08ee49b96..5e85412eb9fa 100644 --- a/arch/powerpc/configs/44x/canyonlands_defconfig +++ b/arch/powerpc/configs/44x/canyonlands_defconfig | |||
@@ -262,7 +262,7 @@ CONFIG_PCI_SYSCALL=y | |||
262 | # CONFIG_PCIEPORTBUS is not set | 262 | # CONFIG_PCIEPORTBUS is not set |
263 | CONFIG_ARCH_SUPPORTS_MSI=y | 263 | CONFIG_ARCH_SUPPORTS_MSI=y |
264 | # CONFIG_PCI_MSI is not set | 264 | # CONFIG_PCI_MSI is not set |
265 | CONFIG_PCI_LEGACY=y | 265 | # CONFIG_PCI_LEGACY is not set |
266 | # CONFIG_PCI_DEBUG is not set | 266 | # CONFIG_PCI_DEBUG is not set |
267 | # CONFIG_PCI_STUB is not set | 267 | # CONFIG_PCI_STUB is not set |
268 | # CONFIG_PCCARD is not set | 268 | # CONFIG_PCCARD is not set |
@@ -716,7 +716,7 @@ CONFIG_SSB_POSSIBLE=y | |||
716 | # | 716 | # |
717 | # Multimedia drivers | 717 | # Multimedia drivers |
718 | # | 718 | # |
719 | CONFIG_DAB=y | 719 | # CONFIG_DAB is not set |
720 | # CONFIG_USB_DABUSB is not set | 720 | # CONFIG_USB_DABUSB is not set |
721 | 721 | ||
722 | # | 722 | # |
@@ -725,7 +725,7 @@ CONFIG_DAB=y | |||
725 | # CONFIG_AGP is not set | 725 | # CONFIG_AGP is not set |
726 | # CONFIG_DRM is not set | 726 | # CONFIG_DRM is not set |
727 | # CONFIG_VGASTATE is not set | 727 | # CONFIG_VGASTATE is not set |
728 | CONFIG_VIDEO_OUTPUT_CONTROL=m | 728 | # CONFIG_VIDEO_OUTPUT_CONTROL is not set |
729 | # CONFIG_FB is not set | 729 | # CONFIG_FB is not set |
730 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set | 730 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set |
731 | 731 | ||
diff --git a/arch/powerpc/configs/44x/ebony_defconfig b/arch/powerpc/configs/44x/ebony_defconfig index be64aa644d15..b652f7dcab5a 100644 --- a/arch/powerpc/configs/44x/ebony_defconfig +++ b/arch/powerpc/configs/44x/ebony_defconfig | |||
@@ -261,7 +261,7 @@ CONFIG_PCI_SYSCALL=y | |||
261 | # CONFIG_PCIEPORTBUS is not set | 261 | # CONFIG_PCIEPORTBUS is not set |
262 | CONFIG_ARCH_SUPPORTS_MSI=y | 262 | CONFIG_ARCH_SUPPORTS_MSI=y |
263 | # CONFIG_PCI_MSI is not set | 263 | # CONFIG_PCI_MSI is not set |
264 | CONFIG_PCI_LEGACY=y | 264 | # CONFIG_PCI_LEGACY is not set |
265 | # CONFIG_PCI_DEBUG is not set | 265 | # CONFIG_PCI_DEBUG is not set |
266 | # CONFIG_PCI_STUB is not set | 266 | # CONFIG_PCI_STUB is not set |
267 | # CONFIG_PCCARD is not set | 267 | # CONFIG_PCCARD is not set |
diff --git a/arch/powerpc/configs/44x/katmai_defconfig b/arch/powerpc/configs/44x/katmai_defconfig index f67250b24ec5..c23a4ef13e45 100644 --- a/arch/powerpc/configs/44x/katmai_defconfig +++ b/arch/powerpc/configs/44x/katmai_defconfig | |||
@@ -256,7 +256,7 @@ CONFIG_PCI_SYSCALL=y | |||
256 | # CONFIG_PCIEPORTBUS is not set | 256 | # CONFIG_PCIEPORTBUS is not set |
257 | CONFIG_ARCH_SUPPORTS_MSI=y | 257 | CONFIG_ARCH_SUPPORTS_MSI=y |
258 | # CONFIG_PCI_MSI is not set | 258 | # CONFIG_PCI_MSI is not set |
259 | CONFIG_PCI_LEGACY=y | 259 | # CONFIG_PCI_LEGACY is not set |
260 | # CONFIG_PCI_DEBUG is not set | 260 | # CONFIG_PCI_DEBUG is not set |
261 | # CONFIG_PCI_STUB is not set | 261 | # CONFIG_PCI_STUB is not set |
262 | # CONFIG_PCCARD is not set | 262 | # CONFIG_PCCARD is not set |
diff --git a/arch/powerpc/configs/44x/rainier_defconfig b/arch/powerpc/configs/44x/rainier_defconfig index 9348c12bd7a6..b25fad1343dc 100644 --- a/arch/powerpc/configs/44x/rainier_defconfig +++ b/arch/powerpc/configs/44x/rainier_defconfig | |||
@@ -260,7 +260,7 @@ CONFIG_PCI_SYSCALL=y | |||
260 | # CONFIG_PCIEPORTBUS is not set | 260 | # CONFIG_PCIEPORTBUS is not set |
261 | CONFIG_ARCH_SUPPORTS_MSI=y | 261 | CONFIG_ARCH_SUPPORTS_MSI=y |
262 | # CONFIG_PCI_MSI is not set | 262 | # CONFIG_PCI_MSI is not set |
263 | CONFIG_PCI_LEGACY=y | 263 | # CONFIG_PCI_LEGACY is not set |
264 | # CONFIG_PCI_DEBUG is not set | 264 | # CONFIG_PCI_DEBUG is not set |
265 | # CONFIG_PCI_STUB is not set | 265 | # CONFIG_PCI_STUB is not set |
266 | # CONFIG_PCCARD is not set | 266 | # CONFIG_PCCARD is not set |
diff --git a/arch/powerpc/configs/44x/redwood_defconfig b/arch/powerpc/configs/44x/redwood_defconfig index e665433762ba..ed31d4f17b5a 100644 --- a/arch/powerpc/configs/44x/redwood_defconfig +++ b/arch/powerpc/configs/44x/redwood_defconfig | |||
@@ -265,7 +265,7 @@ CONFIG_PCIEAER=y | |||
265 | # CONFIG_PCIEASPM is not set | 265 | # CONFIG_PCIEASPM is not set |
266 | CONFIG_ARCH_SUPPORTS_MSI=y | 266 | CONFIG_ARCH_SUPPORTS_MSI=y |
267 | # CONFIG_PCI_MSI is not set | 267 | # CONFIG_PCI_MSI is not set |
268 | CONFIG_PCI_LEGACY=y | 268 | # CONFIG_PCI_LEGACY is not set |
269 | # CONFIG_PCI_DEBUG is not set | 269 | # CONFIG_PCI_DEBUG is not set |
270 | # CONFIG_PCI_STUB is not set | 270 | # CONFIG_PCI_STUB is not set |
271 | # CONFIG_PCCARD is not set | 271 | # CONFIG_PCCARD is not set |
diff --git a/arch/powerpc/configs/44x/sam440ep_defconfig b/arch/powerpc/configs/44x/sam440ep_defconfig index 70d5c3fa3283..e14e89a5e06b 100644 --- a/arch/powerpc/configs/44x/sam440ep_defconfig +++ b/arch/powerpc/configs/44x/sam440ep_defconfig | |||
@@ -262,7 +262,7 @@ CONFIG_PCI_SYSCALL=y | |||
262 | # CONFIG_PCIEPORTBUS is not set | 262 | # CONFIG_PCIEPORTBUS is not set |
263 | CONFIG_ARCH_SUPPORTS_MSI=y | 263 | CONFIG_ARCH_SUPPORTS_MSI=y |
264 | # CONFIG_PCI_MSI is not set | 264 | # CONFIG_PCI_MSI is not set |
265 | CONFIG_PCI_LEGACY=y | 265 | # CONFIG_PCI_LEGACY is not set |
266 | # CONFIG_PCI_STUB is not set | 266 | # CONFIG_PCI_STUB is not set |
267 | # CONFIG_PCCARD is not set | 267 | # CONFIG_PCCARD is not set |
268 | # CONFIG_HOTPLUG_PCI is not set | 268 | # CONFIG_HOTPLUG_PCI is not set |
diff --git a/arch/powerpc/configs/44x/sequoia_defconfig b/arch/powerpc/configs/44x/sequoia_defconfig index a921fe3c3711..6400aae04dda 100644 --- a/arch/powerpc/configs/44x/sequoia_defconfig +++ b/arch/powerpc/configs/44x/sequoia_defconfig | |||
@@ -1,7 +1,7 @@ | |||
1 | # | 1 | # |
2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
3 | # Linux kernel version: 2.6.29-rc2 | 3 | # Linux kernel version: 2.6.29 |
4 | # Tue Jan 20 08:22:45 2009 | 4 | # Tue Apr 7 17:04:52 2009 |
5 | # | 5 | # |
6 | # CONFIG_PPC64 is not set | 6 | # CONFIG_PPC64 is not set |
7 | 7 | ||
@@ -57,6 +57,7 @@ CONFIG_GENERIC_BUG=y | |||
57 | CONFIG_PPC_DCR_NATIVE=y | 57 | CONFIG_PPC_DCR_NATIVE=y |
58 | # CONFIG_PPC_DCR_MMIO is not set | 58 | # CONFIG_PPC_DCR_MMIO is not set |
59 | CONFIG_PPC_DCR=y | 59 | CONFIG_PPC_DCR=y |
60 | CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y | ||
60 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | 61 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" |
61 | 62 | ||
62 | # | 63 | # |
@@ -74,6 +75,15 @@ CONFIG_POSIX_MQUEUE=y | |||
74 | # CONFIG_BSD_PROCESS_ACCT is not set | 75 | # CONFIG_BSD_PROCESS_ACCT is not set |
75 | # CONFIG_TASKSTATS is not set | 76 | # CONFIG_TASKSTATS is not set |
76 | # CONFIG_AUDIT is not set | 77 | # CONFIG_AUDIT is not set |
78 | |||
79 | # | ||
80 | # RCU Subsystem | ||
81 | # | ||
82 | CONFIG_CLASSIC_RCU=y | ||
83 | # CONFIG_TREE_RCU is not set | ||
84 | # CONFIG_PREEMPT_RCU is not set | ||
85 | # CONFIG_TREE_RCU_TRACE is not set | ||
86 | # CONFIG_PREEMPT_RCU_TRACE is not set | ||
77 | # CONFIG_IKCONFIG is not set | 87 | # CONFIG_IKCONFIG is not set |
78 | CONFIG_LOG_BUF_SHIFT=14 | 88 | CONFIG_LOG_BUF_SHIFT=14 |
79 | CONFIG_GROUP_SCHED=y | 89 | CONFIG_GROUP_SCHED=y |
@@ -88,8 +98,12 @@ CONFIG_SYSFS_DEPRECATED_V2=y | |||
88 | # CONFIG_NAMESPACES is not set | 98 | # CONFIG_NAMESPACES is not set |
89 | CONFIG_BLK_DEV_INITRD=y | 99 | CONFIG_BLK_DEV_INITRD=y |
90 | CONFIG_INITRAMFS_SOURCE="" | 100 | CONFIG_INITRAMFS_SOURCE="" |
101 | CONFIG_RD_GZIP=y | ||
102 | # CONFIG_RD_BZIP2 is not set | ||
103 | # CONFIG_RD_LZMA is not set | ||
91 | # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set | 104 | # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set |
92 | CONFIG_SYSCTL=y | 105 | CONFIG_SYSCTL=y |
106 | CONFIG_ANON_INODES=y | ||
93 | CONFIG_EMBEDDED=y | 107 | CONFIG_EMBEDDED=y |
94 | CONFIG_SYSCTL_SYSCALL=y | 108 | CONFIG_SYSCTL_SYSCALL=y |
95 | CONFIG_KALLSYMS=y | 109 | CONFIG_KALLSYMS=y |
@@ -99,10 +113,8 @@ CONFIG_HOTPLUG=y | |||
99 | CONFIG_PRINTK=y | 113 | CONFIG_PRINTK=y |
100 | CONFIG_BUG=y | 114 | CONFIG_BUG=y |
101 | CONFIG_ELF_CORE=y | 115 | CONFIG_ELF_CORE=y |
102 | CONFIG_COMPAT_BRK=y | ||
103 | CONFIG_BASE_FULL=y | 116 | CONFIG_BASE_FULL=y |
104 | CONFIG_FUTEX=y | 117 | CONFIG_FUTEX=y |
105 | CONFIG_ANON_INODES=y | ||
106 | CONFIG_EPOLL=y | 118 | CONFIG_EPOLL=y |
107 | CONFIG_SIGNALFD=y | 119 | CONFIG_SIGNALFD=y |
108 | CONFIG_TIMERFD=y | 120 | CONFIG_TIMERFD=y |
@@ -112,10 +124,12 @@ CONFIG_AIO=y | |||
112 | CONFIG_VM_EVENT_COUNTERS=y | 124 | CONFIG_VM_EVENT_COUNTERS=y |
113 | CONFIG_PCI_QUIRKS=y | 125 | CONFIG_PCI_QUIRKS=y |
114 | CONFIG_SLUB_DEBUG=y | 126 | CONFIG_SLUB_DEBUG=y |
127 | CONFIG_COMPAT_BRK=y | ||
115 | # CONFIG_SLAB is not set | 128 | # CONFIG_SLAB is not set |
116 | CONFIG_SLUB=y | 129 | CONFIG_SLUB=y |
117 | # CONFIG_SLOB is not set | 130 | # CONFIG_SLOB is not set |
118 | # CONFIG_PROFILING is not set | 131 | # CONFIG_PROFILING is not set |
132 | # CONFIG_MARKERS is not set | ||
119 | CONFIG_HAVE_OPROFILE=y | 133 | CONFIG_HAVE_OPROFILE=y |
120 | # CONFIG_KPROBES is not set | 134 | # CONFIG_KPROBES is not set |
121 | CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y | 135 | CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y |
@@ -123,6 +137,7 @@ CONFIG_HAVE_IOREMAP_PROT=y | |||
123 | CONFIG_HAVE_KPROBES=y | 137 | CONFIG_HAVE_KPROBES=y |
124 | CONFIG_HAVE_KRETPROBES=y | 138 | CONFIG_HAVE_KRETPROBES=y |
125 | CONFIG_HAVE_ARCH_TRACEHOOK=y | 139 | CONFIG_HAVE_ARCH_TRACEHOOK=y |
140 | # CONFIG_SLOW_WORK is not set | ||
126 | # CONFIG_HAVE_GENERIC_DMA_COHERENT is not set | 141 | # CONFIG_HAVE_GENERIC_DMA_COHERENT is not set |
127 | CONFIG_SLABINFO=y | 142 | CONFIG_SLABINFO=y |
128 | CONFIG_RT_MUTEXES=y | 143 | CONFIG_RT_MUTEXES=y |
@@ -135,7 +150,6 @@ CONFIG_MODULE_UNLOAD=y | |||
135 | # CONFIG_MODULE_SRCVERSION_ALL is not set | 150 | # CONFIG_MODULE_SRCVERSION_ALL is not set |
136 | CONFIG_BLOCK=y | 151 | CONFIG_BLOCK=y |
137 | CONFIG_LBD=y | 152 | CONFIG_LBD=y |
138 | # CONFIG_BLK_DEV_IO_TRACE is not set | ||
139 | # CONFIG_BLK_DEV_BSG is not set | 153 | # CONFIG_BLK_DEV_BSG is not set |
140 | # CONFIG_BLK_DEV_INTEGRITY is not set | 154 | # CONFIG_BLK_DEV_INTEGRITY is not set |
141 | 155 | ||
@@ -151,11 +165,6 @@ CONFIG_DEFAULT_AS=y | |||
151 | # CONFIG_DEFAULT_CFQ is not set | 165 | # CONFIG_DEFAULT_CFQ is not set |
152 | # CONFIG_DEFAULT_NOOP is not set | 166 | # CONFIG_DEFAULT_NOOP is not set |
153 | CONFIG_DEFAULT_IOSCHED="anticipatory" | 167 | CONFIG_DEFAULT_IOSCHED="anticipatory" |
154 | CONFIG_CLASSIC_RCU=y | ||
155 | # CONFIG_TREE_RCU is not set | ||
156 | # CONFIG_PREEMPT_RCU is not set | ||
157 | # CONFIG_TREE_RCU_TRACE is not set | ||
158 | # CONFIG_PREEMPT_RCU_TRACE is not set | ||
159 | # CONFIG_FREEZER is not set | 168 | # CONFIG_FREEZER is not set |
160 | # CONFIG_PPC4xx_PCI_EXPRESS is not set | 169 | # CONFIG_PPC4xx_PCI_EXPRESS is not set |
161 | 170 | ||
@@ -176,6 +185,7 @@ CONFIG_SEQUOIA=y | |||
176 | # CONFIG_ARCHES is not set | 185 | # CONFIG_ARCHES is not set |
177 | # CONFIG_CANYONLANDS is not set | 186 | # CONFIG_CANYONLANDS is not set |
178 | # CONFIG_GLACIER is not set | 187 | # CONFIG_GLACIER is not set |
188 | # CONFIG_REDWOOD is not set | ||
179 | # CONFIG_YOSEMITE is not set | 189 | # CONFIG_YOSEMITE is not set |
180 | # CONFIG_XILINX_VIRTEX440_GENERIC_BOARD is not set | 190 | # CONFIG_XILINX_VIRTEX440_GENERIC_BOARD is not set |
181 | CONFIG_PPC44x_SIMPLE=y | 191 | CONFIG_PPC44x_SIMPLE=y |
@@ -238,9 +248,13 @@ CONFIG_ZONE_DMA_FLAG=1 | |||
238 | CONFIG_BOUNCE=y | 248 | CONFIG_BOUNCE=y |
239 | CONFIG_VIRT_TO_BUS=y | 249 | CONFIG_VIRT_TO_BUS=y |
240 | CONFIG_UNEVICTABLE_LRU=y | 250 | CONFIG_UNEVICTABLE_LRU=y |
251 | CONFIG_HAVE_MLOCK=y | ||
252 | CONFIG_HAVE_MLOCKED_PAGE_BIT=y | ||
253 | CONFIG_STDBINUTILS=y | ||
241 | CONFIG_PPC_4K_PAGES=y | 254 | CONFIG_PPC_4K_PAGES=y |
242 | # CONFIG_PPC_16K_PAGES is not set | 255 | # CONFIG_PPC_16K_PAGES is not set |
243 | # CONFIG_PPC_64K_PAGES is not set | 256 | # CONFIG_PPC_64K_PAGES is not set |
257 | # CONFIG_PPC_256K_PAGES is not set | ||
244 | CONFIG_FORCE_MAX_ZONEORDER=11 | 258 | CONFIG_FORCE_MAX_ZONEORDER=11 |
245 | CONFIG_PROC_DEVICETREE=y | 259 | CONFIG_PROC_DEVICETREE=y |
246 | CONFIG_CMDLINE_BOOL=y | 260 | CONFIG_CMDLINE_BOOL=y |
@@ -262,9 +276,10 @@ CONFIG_PCI_SYSCALL=y | |||
262 | # CONFIG_PCIEPORTBUS is not set | 276 | # CONFIG_PCIEPORTBUS is not set |
263 | CONFIG_ARCH_SUPPORTS_MSI=y | 277 | CONFIG_ARCH_SUPPORTS_MSI=y |
264 | # CONFIG_PCI_MSI is not set | 278 | # CONFIG_PCI_MSI is not set |
265 | CONFIG_PCI_LEGACY=y | 279 | # CONFIG_PCI_LEGACY is not set |
266 | # CONFIG_PCI_DEBUG is not set | 280 | # CONFIG_PCI_DEBUG is not set |
267 | # CONFIG_PCI_STUB is not set | 281 | # CONFIG_PCI_STUB is not set |
282 | # CONFIG_PCI_IOV is not set | ||
268 | # CONFIG_PCCARD is not set | 283 | # CONFIG_PCCARD is not set |
269 | # CONFIG_HOTPLUG_PCI is not set | 284 | # CONFIG_HOTPLUG_PCI is not set |
270 | # CONFIG_HAS_RAPIDIO is not set | 285 | # CONFIG_HAS_RAPIDIO is not set |
@@ -278,18 +293,16 @@ CONFIG_PCI_LEGACY=y | |||
278 | # Default settings for advanced configuration options are used | 293 | # Default settings for advanced configuration options are used |
279 | # | 294 | # |
280 | CONFIG_LOWMEM_SIZE=0x30000000 | 295 | CONFIG_LOWMEM_SIZE=0x30000000 |
296 | CONFIG_LOWMEM_CAM_NUM=3 | ||
281 | CONFIG_PAGE_OFFSET=0xc0000000 | 297 | CONFIG_PAGE_OFFSET=0xc0000000 |
282 | CONFIG_KERNEL_START=0xc0000000 | 298 | CONFIG_KERNEL_START=0xc0000000 |
283 | CONFIG_PHYSICAL_START=0x00000000 | 299 | CONFIG_PHYSICAL_START=0x00000000 |
284 | CONFIG_TASK_SIZE=0xc0000000 | 300 | CONFIG_TASK_SIZE=0xc0000000 |
285 | CONFIG_CONSISTENT_START=0xff100000 | ||
286 | CONFIG_CONSISTENT_SIZE=0x00200000 | ||
287 | CONFIG_NET=y | 301 | CONFIG_NET=y |
288 | 302 | ||
289 | # | 303 | # |
290 | # Networking options | 304 | # Networking options |
291 | # | 305 | # |
292 | CONFIG_COMPAT_NET_DEV_OPS=y | ||
293 | CONFIG_PACKET=y | 306 | CONFIG_PACKET=y |
294 | # CONFIG_PACKET_MMAP is not set | 307 | # CONFIG_PACKET_MMAP is not set |
295 | CONFIG_UNIX=y | 308 | CONFIG_UNIX=y |
@@ -339,6 +352,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic" | |||
339 | # CONFIG_LAPB is not set | 352 | # CONFIG_LAPB is not set |
340 | # CONFIG_ECONET is not set | 353 | # CONFIG_ECONET is not set |
341 | # CONFIG_WAN_ROUTER is not set | 354 | # CONFIG_WAN_ROUTER is not set |
355 | # CONFIG_PHONET is not set | ||
342 | # CONFIG_NET_SCHED is not set | 356 | # CONFIG_NET_SCHED is not set |
343 | # CONFIG_DCB is not set | 357 | # CONFIG_DCB is not set |
344 | 358 | ||
@@ -351,7 +365,6 @@ CONFIG_DEFAULT_TCP_CONG="cubic" | |||
351 | # CONFIG_IRDA is not set | 365 | # CONFIG_IRDA is not set |
352 | # CONFIG_BT is not set | 366 | # CONFIG_BT is not set |
353 | # CONFIG_AF_RXRPC is not set | 367 | # CONFIG_AF_RXRPC is not set |
354 | # CONFIG_PHONET is not set | ||
355 | # CONFIG_WIRELESS is not set | 368 | # CONFIG_WIRELESS is not set |
356 | # CONFIG_WIMAX is not set | 369 | # CONFIG_WIMAX is not set |
357 | # CONFIG_RFKILL is not set | 370 | # CONFIG_RFKILL is not set |
@@ -448,14 +461,23 @@ CONFIG_MTD_PHYSMAP_OF=y | |||
448 | # CONFIG_MTD_DOC2000 is not set | 461 | # CONFIG_MTD_DOC2000 is not set |
449 | # CONFIG_MTD_DOC2001 is not set | 462 | # CONFIG_MTD_DOC2001 is not set |
450 | # CONFIG_MTD_DOC2001PLUS is not set | 463 | # CONFIG_MTD_DOC2001PLUS is not set |
451 | # CONFIG_MTD_NAND is not set | 464 | CONFIG_MTD_NAND=y |
465 | # CONFIG_MTD_NAND_VERIFY_WRITE is not set | ||
466 | CONFIG_MTD_NAND_ECC_SMC=y | ||
467 | # CONFIG_MTD_NAND_MUSEUM_IDS is not set | ||
468 | CONFIG_MTD_NAND_IDS=y | ||
469 | CONFIG_MTD_NAND_NDFC=y | ||
470 | # CONFIG_MTD_NAND_DISKONCHIP is not set | ||
471 | # CONFIG_MTD_NAND_CAFE is not set | ||
472 | # CONFIG_MTD_NAND_NANDSIM is not set | ||
473 | # CONFIG_MTD_NAND_PLATFORM is not set | ||
474 | # CONFIG_MTD_NAND_FSL_ELBC is not set | ||
452 | # CONFIG_MTD_ONENAND is not set | 475 | # CONFIG_MTD_ONENAND is not set |
453 | 476 | ||
454 | # | 477 | # |
455 | # LPDDR flash memory drivers | 478 | # LPDDR flash memory drivers |
456 | # | 479 | # |
457 | # CONFIG_MTD_LPDDR is not set | 480 | # CONFIG_MTD_LPDDR is not set |
458 | # CONFIG_MTD_QINFO_PROBE is not set | ||
459 | 481 | ||
460 | # | 482 | # |
461 | # UBI - Unsorted block images | 483 | # UBI - Unsorted block images |
@@ -483,12 +505,16 @@ CONFIG_BLK_DEV_RAM_SIZE=35000 | |||
483 | # CONFIG_BLK_DEV_HD is not set | 505 | # CONFIG_BLK_DEV_HD is not set |
484 | CONFIG_MISC_DEVICES=y | 506 | CONFIG_MISC_DEVICES=y |
485 | # CONFIG_PHANTOM is not set | 507 | # CONFIG_PHANTOM is not set |
486 | # CONFIG_EEPROM_93CX6 is not set | ||
487 | # CONFIG_SGI_IOC4 is not set | 508 | # CONFIG_SGI_IOC4 is not set |
488 | # CONFIG_TIFM_CORE is not set | 509 | # CONFIG_TIFM_CORE is not set |
489 | # CONFIG_ENCLOSURE_SERVICES is not set | 510 | # CONFIG_ENCLOSURE_SERVICES is not set |
490 | # CONFIG_HP_ILO is not set | 511 | # CONFIG_HP_ILO is not set |
491 | # CONFIG_C2PORT is not set | 512 | # CONFIG_C2PORT is not set |
513 | |||
514 | # | ||
515 | # EEPROM support | ||
516 | # | ||
517 | # CONFIG_EEPROM_93CX6 is not set | ||
492 | CONFIG_HAVE_IDE=y | 518 | CONFIG_HAVE_IDE=y |
493 | # CONFIG_IDE is not set | 519 | # CONFIG_IDE is not set |
494 | 520 | ||
@@ -515,6 +541,7 @@ CONFIG_HAVE_IDE=y | |||
515 | # CONFIG_I2O is not set | 541 | # CONFIG_I2O is not set |
516 | # CONFIG_MACINTOSH_DRIVERS is not set | 542 | # CONFIG_MACINTOSH_DRIVERS is not set |
517 | CONFIG_NETDEVICES=y | 543 | CONFIG_NETDEVICES=y |
544 | CONFIG_COMPAT_NET_DEV_OPS=y | ||
518 | # CONFIG_DUMMY is not set | 545 | # CONFIG_DUMMY is not set |
519 | # CONFIG_BONDING is not set | 546 | # CONFIG_BONDING is not set |
520 | # CONFIG_MACVLAN is not set | 547 | # CONFIG_MACVLAN is not set |
@@ -529,6 +556,8 @@ CONFIG_NET_ETHERNET=y | |||
529 | # CONFIG_SUNGEM is not set | 556 | # CONFIG_SUNGEM is not set |
530 | # CONFIG_CASSINI is not set | 557 | # CONFIG_CASSINI is not set |
531 | # CONFIG_NET_VENDOR_3COM is not set | 558 | # CONFIG_NET_VENDOR_3COM is not set |
559 | # CONFIG_ETHOC is not set | ||
560 | # CONFIG_DNET is not set | ||
532 | # CONFIG_NET_TULIP is not set | 561 | # CONFIG_NET_TULIP is not set |
533 | # CONFIG_HP100 is not set | 562 | # CONFIG_HP100 is not set |
534 | CONFIG_IBM_NEW_EMAC=y | 563 | CONFIG_IBM_NEW_EMAC=y |
@@ -568,6 +597,7 @@ CONFIG_NETDEV_1000=y | |||
568 | # CONFIG_QLA3XXX is not set | 597 | # CONFIG_QLA3XXX is not set |
569 | # CONFIG_ATL1 is not set | 598 | # CONFIG_ATL1 is not set |
570 | # CONFIG_ATL1E is not set | 599 | # CONFIG_ATL1E is not set |
600 | # CONFIG_ATL1C is not set | ||
571 | # CONFIG_JME is not set | 601 | # CONFIG_JME is not set |
572 | CONFIG_NETDEV_10000=y | 602 | CONFIG_NETDEV_10000=y |
573 | # CONFIG_CHELSIO_T1 is not set | 603 | # CONFIG_CHELSIO_T1 is not set |
@@ -577,6 +607,7 @@ CONFIG_CHELSIO_T3_DEPENDS=y | |||
577 | # CONFIG_IXGBE is not set | 607 | # CONFIG_IXGBE is not set |
578 | # CONFIG_IXGB is not set | 608 | # CONFIG_IXGB is not set |
579 | # CONFIG_S2IO is not set | 609 | # CONFIG_S2IO is not set |
610 | # CONFIG_VXGE is not set | ||
580 | # CONFIG_MYRI10GE is not set | 611 | # CONFIG_MYRI10GE is not set |
581 | # CONFIG_NETXEN_NIC is not set | 612 | # CONFIG_NETXEN_NIC is not set |
582 | # CONFIG_NIU is not set | 613 | # CONFIG_NIU is not set |
@@ -586,6 +617,7 @@ CONFIG_CHELSIO_T3_DEPENDS=y | |||
586 | # CONFIG_BNX2X is not set | 617 | # CONFIG_BNX2X is not set |
587 | # CONFIG_QLGE is not set | 618 | # CONFIG_QLGE is not set |
588 | # CONFIG_SFC is not set | 619 | # CONFIG_SFC is not set |
620 | # CONFIG_BE2NET is not set | ||
589 | # CONFIG_TR is not set | 621 | # CONFIG_TR is not set |
590 | 622 | ||
591 | # | 623 | # |
@@ -593,7 +625,6 @@ CONFIG_CHELSIO_T3_DEPENDS=y | |||
593 | # | 625 | # |
594 | # CONFIG_WLAN_PRE80211 is not set | 626 | # CONFIG_WLAN_PRE80211 is not set |
595 | # CONFIG_WLAN_80211 is not set | 627 | # CONFIG_WLAN_80211 is not set |
596 | # CONFIG_IWLWIFI_LEDS is not set | ||
597 | 628 | ||
598 | # | 629 | # |
599 | # Enable WiMAX (Networking options) to see the WiMAX drivers | 630 | # Enable WiMAX (Networking options) to see the WiMAX drivers |
@@ -734,7 +765,7 @@ CONFIG_USB_ARCH_HAS_EHCI=y | |||
734 | # | 765 | # |
735 | 766 | ||
736 | # | 767 | # |
737 | # NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed; | 768 | # NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may |
738 | # | 769 | # |
739 | # CONFIG_USB_GADGET is not set | 770 | # CONFIG_USB_GADGET is not set |
740 | 771 | ||
@@ -750,6 +781,7 @@ CONFIG_USB_ARCH_HAS_EHCI=y | |||
750 | # CONFIG_EDAC is not set | 781 | # CONFIG_EDAC is not set |
751 | # CONFIG_RTC_CLASS is not set | 782 | # CONFIG_RTC_CLASS is not set |
752 | # CONFIG_DMADEVICES is not set | 783 | # CONFIG_DMADEVICES is not set |
784 | # CONFIG_AUXDISPLAY is not set | ||
753 | # CONFIG_UIO is not set | 785 | # CONFIG_UIO is not set |
754 | # CONFIG_STAGING is not set | 786 | # CONFIG_STAGING is not set |
755 | 787 | ||
@@ -778,6 +810,11 @@ CONFIG_INOTIFY_USER=y | |||
778 | # CONFIG_FUSE_FS is not set | 810 | # CONFIG_FUSE_FS is not set |
779 | 811 | ||
780 | # | 812 | # |
813 | # Caches | ||
814 | # | ||
815 | # CONFIG_FSCACHE is not set | ||
816 | |||
817 | # | ||
781 | # CD-ROM/DVD Filesystems | 818 | # CD-ROM/DVD Filesystems |
782 | # | 819 | # |
783 | # CONFIG_ISO9660_FS is not set | 820 | # CONFIG_ISO9660_FS is not set |
@@ -842,7 +879,6 @@ CONFIG_LOCKD=y | |||
842 | CONFIG_LOCKD_V4=y | 879 | CONFIG_LOCKD_V4=y |
843 | CONFIG_NFS_COMMON=y | 880 | CONFIG_NFS_COMMON=y |
844 | CONFIG_SUNRPC=y | 881 | CONFIG_SUNRPC=y |
845 | # CONFIG_SUNRPC_REGISTER_V4 is not set | ||
846 | # CONFIG_RPCSEC_GSS_KRB5 is not set | 882 | # CONFIG_RPCSEC_GSS_KRB5 is not set |
847 | # CONFIG_RPCSEC_GSS_SPKM3 is not set | 883 | # CONFIG_RPCSEC_GSS_SPKM3 is not set |
848 | # CONFIG_SMB_FS is not set | 884 | # CONFIG_SMB_FS is not set |
@@ -858,6 +894,7 @@ CONFIG_SUNRPC=y | |||
858 | CONFIG_MSDOS_PARTITION=y | 894 | CONFIG_MSDOS_PARTITION=y |
859 | # CONFIG_NLS is not set | 895 | # CONFIG_NLS is not set |
860 | # CONFIG_DLM is not set | 896 | # CONFIG_DLM is not set |
897 | # CONFIG_BINARY_PRINTF is not set | ||
861 | 898 | ||
862 | # | 899 | # |
863 | # Library routines | 900 | # Library routines |
@@ -873,11 +910,12 @@ CONFIG_CRC32=y | |||
873 | # CONFIG_LIBCRC32C is not set | 910 | # CONFIG_LIBCRC32C is not set |
874 | CONFIG_ZLIB_INFLATE=y | 911 | CONFIG_ZLIB_INFLATE=y |
875 | CONFIG_ZLIB_DEFLATE=y | 912 | CONFIG_ZLIB_DEFLATE=y |
876 | CONFIG_PLIST=y | 913 | CONFIG_DECOMPRESS_GZIP=y |
877 | CONFIG_HAS_IOMEM=y | 914 | CONFIG_HAS_IOMEM=y |
878 | CONFIG_HAS_IOPORT=y | 915 | CONFIG_HAS_IOPORT=y |
879 | CONFIG_HAS_DMA=y | 916 | CONFIG_HAS_DMA=y |
880 | CONFIG_HAVE_LMB=y | 917 | CONFIG_HAVE_LMB=y |
918 | CONFIG_NLATTR=y | ||
881 | 919 | ||
882 | # | 920 | # |
883 | # Kernel hacking | 921 | # Kernel hacking |
@@ -924,9 +962,12 @@ CONFIG_SCHED_DEBUG=y | |||
924 | # CONFIG_FAULT_INJECTION is not set | 962 | # CONFIG_FAULT_INJECTION is not set |
925 | # CONFIG_LATENCYTOP is not set | 963 | # CONFIG_LATENCYTOP is not set |
926 | CONFIG_SYSCTL_SYSCALL_CHECK=y | 964 | CONFIG_SYSCTL_SYSCALL_CHECK=y |
965 | # CONFIG_DEBUG_PAGEALLOC is not set | ||
927 | CONFIG_HAVE_FUNCTION_TRACER=y | 966 | CONFIG_HAVE_FUNCTION_TRACER=y |
967 | CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y | ||
928 | CONFIG_HAVE_DYNAMIC_FTRACE=y | 968 | CONFIG_HAVE_DYNAMIC_FTRACE=y |
929 | CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y | 969 | CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y |
970 | CONFIG_TRACING_SUPPORT=y | ||
930 | 971 | ||
931 | # | 972 | # |
932 | # Tracers | 973 | # Tracers |
@@ -934,17 +975,20 @@ CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y | |||
934 | # CONFIG_FUNCTION_TRACER is not set | 975 | # CONFIG_FUNCTION_TRACER is not set |
935 | # CONFIG_SCHED_TRACER is not set | 976 | # CONFIG_SCHED_TRACER is not set |
936 | # CONFIG_CONTEXT_SWITCH_TRACER is not set | 977 | # CONFIG_CONTEXT_SWITCH_TRACER is not set |
978 | # CONFIG_EVENT_TRACER is not set | ||
937 | # CONFIG_BOOT_TRACER is not set | 979 | # CONFIG_BOOT_TRACER is not set |
938 | # CONFIG_TRACE_BRANCH_PROFILING is not set | 980 | # CONFIG_TRACE_BRANCH_PROFILING is not set |
939 | # CONFIG_STACK_TRACER is not set | 981 | # CONFIG_STACK_TRACER is not set |
940 | # CONFIG_DYNAMIC_PRINTK_DEBUG is not set | 982 | # CONFIG_KMEMTRACE is not set |
983 | # CONFIG_WORKQUEUE_TRACER is not set | ||
984 | # CONFIG_BLK_DEV_IO_TRACE is not set | ||
985 | # CONFIG_DYNAMIC_DEBUG is not set | ||
941 | # CONFIG_SAMPLES is not set | 986 | # CONFIG_SAMPLES is not set |
942 | CONFIG_HAVE_ARCH_KGDB=y | 987 | CONFIG_HAVE_ARCH_KGDB=y |
943 | # CONFIG_KGDB is not set | 988 | # CONFIG_KGDB is not set |
944 | CONFIG_PRINT_STACK_DEPTH=64 | 989 | CONFIG_PRINT_STACK_DEPTH=64 |
945 | # CONFIG_DEBUG_STACKOVERFLOW is not set | 990 | # CONFIG_DEBUG_STACKOVERFLOW is not set |
946 | # CONFIG_DEBUG_STACK_USAGE is not set | 991 | # CONFIG_DEBUG_STACK_USAGE is not set |
947 | # CONFIG_DEBUG_PAGEALLOC is not set | ||
948 | # CONFIG_CODE_PATCHING_SELFTEST is not set | 992 | # CONFIG_CODE_PATCHING_SELFTEST is not set |
949 | # CONFIG_FTR_FIXUP_SELFTEST is not set | 993 | # CONFIG_FTR_FIXUP_SELFTEST is not set |
950 | # CONFIG_MSI_BITMAP_SELFTEST is not set | 994 | # CONFIG_MSI_BITMAP_SELFTEST is not set |
@@ -952,20 +996,7 @@ CONFIG_PRINT_STACK_DEPTH=64 | |||
952 | # CONFIG_IRQSTACKS is not set | 996 | # CONFIG_IRQSTACKS is not set |
953 | # CONFIG_VIRQ_DEBUG is not set | 997 | # CONFIG_VIRQ_DEBUG is not set |
954 | # CONFIG_BDI_SWITCH is not set | 998 | # CONFIG_BDI_SWITCH is not set |
955 | CONFIG_PPC_EARLY_DEBUG=y | 999 | # CONFIG_PPC_EARLY_DEBUG is not set |
956 | # CONFIG_PPC_EARLY_DEBUG_LPAR is not set | ||
957 | # CONFIG_PPC_EARLY_DEBUG_G5 is not set | ||
958 | # CONFIG_PPC_EARLY_DEBUG_RTAS_PANEL is not set | ||
959 | # CONFIG_PPC_EARLY_DEBUG_RTAS_CONSOLE is not set | ||
960 | # CONFIG_PPC_EARLY_DEBUG_MAPLE is not set | ||
961 | # CONFIG_PPC_EARLY_DEBUG_ISERIES is not set | ||
962 | # CONFIG_PPC_EARLY_DEBUG_PAS_REALMODE is not set | ||
963 | # CONFIG_PPC_EARLY_DEBUG_BEAT is not set | ||
964 | CONFIG_PPC_EARLY_DEBUG_44x=y | ||
965 | # CONFIG_PPC_EARLY_DEBUG_40x is not set | ||
966 | # CONFIG_PPC_EARLY_DEBUG_CPM is not set | ||
967 | CONFIG_PPC_EARLY_DEBUG_44x_PHYSLOW=0xef600300 | ||
968 | CONFIG_PPC_EARLY_DEBUG_44x_PHYSHIGH=0x1 | ||
969 | 1000 | ||
970 | # | 1001 | # |
971 | # Security options | 1002 | # Security options |
@@ -988,10 +1019,12 @@ CONFIG_CRYPTO_BLKCIPHER2=y | |||
988 | CONFIG_CRYPTO_HASH=y | 1019 | CONFIG_CRYPTO_HASH=y |
989 | CONFIG_CRYPTO_HASH2=y | 1020 | CONFIG_CRYPTO_HASH2=y |
990 | CONFIG_CRYPTO_RNG2=y | 1021 | CONFIG_CRYPTO_RNG2=y |
1022 | CONFIG_CRYPTO_PCOMP=y | ||
991 | CONFIG_CRYPTO_MANAGER=y | 1023 | CONFIG_CRYPTO_MANAGER=y |
992 | CONFIG_CRYPTO_MANAGER2=y | 1024 | CONFIG_CRYPTO_MANAGER2=y |
993 | # CONFIG_CRYPTO_GF128MUL is not set | 1025 | # CONFIG_CRYPTO_GF128MUL is not set |
994 | # CONFIG_CRYPTO_NULL is not set | 1026 | # CONFIG_CRYPTO_NULL is not set |
1027 | CONFIG_CRYPTO_WORKQUEUE=y | ||
995 | # CONFIG_CRYPTO_CRYPTD is not set | 1028 | # CONFIG_CRYPTO_CRYPTD is not set |
996 | # CONFIG_CRYPTO_AUTHENC is not set | 1029 | # CONFIG_CRYPTO_AUTHENC is not set |
997 | # CONFIG_CRYPTO_TEST is not set | 1030 | # CONFIG_CRYPTO_TEST is not set |
@@ -1060,6 +1093,7 @@ CONFIG_CRYPTO_DES=y | |||
1060 | # Compression | 1093 | # Compression |
1061 | # | 1094 | # |
1062 | # CONFIG_CRYPTO_DEFLATE is not set | 1095 | # CONFIG_CRYPTO_DEFLATE is not set |
1096 | # CONFIG_CRYPTO_ZLIB is not set | ||
1063 | # CONFIG_CRYPTO_LZO is not set | 1097 | # CONFIG_CRYPTO_LZO is not set |
1064 | 1098 | ||
1065 | # | 1099 | # |
@@ -1068,5 +1102,6 @@ CONFIG_CRYPTO_DES=y | |||
1068 | # CONFIG_CRYPTO_ANSI_CPRNG is not set | 1102 | # CONFIG_CRYPTO_ANSI_CPRNG is not set |
1069 | CONFIG_CRYPTO_HW=y | 1103 | CONFIG_CRYPTO_HW=y |
1070 | # CONFIG_CRYPTO_DEV_HIFN_795X is not set | 1104 | # CONFIG_CRYPTO_DEV_HIFN_795X is not set |
1105 | # CONFIG_CRYPTO_DEV_PPC4XX is not set | ||
1071 | # CONFIG_PPC_CLOCK is not set | 1106 | # CONFIG_PPC_CLOCK is not set |
1072 | # CONFIG_VIRTUALIZATION is not set | 1107 | # CONFIG_VIRTUALIZATION is not set |
diff --git a/arch/powerpc/configs/44x/taishan_defconfig b/arch/powerpc/configs/44x/taishan_defconfig index 826700872d26..ef32cc4f82eb 100644 --- a/arch/powerpc/configs/44x/taishan_defconfig +++ b/arch/powerpc/configs/44x/taishan_defconfig | |||
@@ -260,7 +260,7 @@ CONFIG_PCI_SYSCALL=y | |||
260 | # CONFIG_PCIEPORTBUS is not set | 260 | # CONFIG_PCIEPORTBUS is not set |
261 | CONFIG_ARCH_SUPPORTS_MSI=y | 261 | CONFIG_ARCH_SUPPORTS_MSI=y |
262 | # CONFIG_PCI_MSI is not set | 262 | # CONFIG_PCI_MSI is not set |
263 | CONFIG_PCI_LEGACY=y | 263 | # CONFIG_PCI_LEGACY is not set |
264 | # CONFIG_PCI_DEBUG is not set | 264 | # CONFIG_PCI_DEBUG is not set |
265 | # CONFIG_PCI_STUB is not set | 265 | # CONFIG_PCI_STUB is not set |
266 | # CONFIG_PCCARD is not set | 266 | # CONFIG_PCCARD is not set |
diff --git a/arch/powerpc/configs/44x/virtex5_defconfig b/arch/powerpc/configs/44x/virtex5_defconfig index 1bf0a63614b1..2518b8568c70 100644 --- a/arch/powerpc/configs/44x/virtex5_defconfig +++ b/arch/powerpc/configs/44x/virtex5_defconfig | |||
@@ -263,7 +263,7 @@ CONFIG_PCI_SYSCALL=y | |||
263 | # CONFIG_PCIEPORTBUS is not set | 263 | # CONFIG_PCIEPORTBUS is not set |
264 | CONFIG_ARCH_SUPPORTS_MSI=y | 264 | CONFIG_ARCH_SUPPORTS_MSI=y |
265 | # CONFIG_PCI_MSI is not set | 265 | # CONFIG_PCI_MSI is not set |
266 | CONFIG_PCI_LEGACY=y | 266 | # CONFIG_PCI_LEGACY is not set |
267 | # CONFIG_PCI_DEBUG is not set | 267 | # CONFIG_PCI_DEBUG is not set |
268 | # CONFIG_PCI_STUB is not set | 268 | # CONFIG_PCI_STUB is not set |
269 | # CONFIG_PCCARD is not set | 269 | # CONFIG_PCCARD is not set |
diff --git a/arch/powerpc/include/asm/cpm2.h b/arch/powerpc/include/asm/cpm2.h index 0f5e8ff59a85..990ff191da8b 100644 --- a/arch/powerpc/include/asm/cpm2.h +++ b/arch/powerpc/include/asm/cpm2.h | |||
@@ -14,10 +14,6 @@ | |||
14 | #include <asm/cpm.h> | 14 | #include <asm/cpm.h> |
15 | #include <sysdev/fsl_soc.h> | 15 | #include <sysdev/fsl_soc.h> |
16 | 16 | ||
17 | #ifdef CONFIG_PPC_85xx | ||
18 | #define CPM_MAP_ADDR (get_immrbase() + 0x80000) | ||
19 | #endif | ||
20 | |||
21 | /* CPM Command register. | 17 | /* CPM Command register. |
22 | */ | 18 | */ |
23 | #define CPM_CR_RST ((uint)0x80000000) | 19 | #define CPM_CR_RST ((uint)0x80000000) |
diff --git a/arch/powerpc/include/asm/dma-mapping.h b/arch/powerpc/include/asm/dma-mapping.h index cb448d68452c..3d9e887c3c0c 100644 --- a/arch/powerpc/include/asm/dma-mapping.h +++ b/arch/powerpc/include/asm/dma-mapping.h | |||
@@ -15,9 +15,18 @@ | |||
15 | #include <linux/scatterlist.h> | 15 | #include <linux/scatterlist.h> |
16 | #include <linux/dma-attrs.h> | 16 | #include <linux/dma-attrs.h> |
17 | #include <asm/io.h> | 17 | #include <asm/io.h> |
18 | #include <asm/swiotlb.h> | ||
18 | 19 | ||
19 | #define DMA_ERROR_CODE (~(dma_addr_t)0x0) | 20 | #define DMA_ERROR_CODE (~(dma_addr_t)0x0) |
20 | 21 | ||
22 | /* Some dma direct funcs must be visible for use in other dma_ops */ | ||
23 | extern void *dma_direct_alloc_coherent(struct device *dev, size_t size, | ||
24 | dma_addr_t *dma_handle, gfp_t flag); | ||
25 | extern void dma_direct_free_coherent(struct device *dev, size_t size, | ||
26 | void *vaddr, dma_addr_t dma_handle); | ||
27 | |||
28 | extern unsigned long get_dma_direct_offset(struct device *dev); | ||
29 | |||
21 | #ifdef CONFIG_NOT_COHERENT_CACHE | 30 | #ifdef CONFIG_NOT_COHERENT_CACHE |
22 | /* | 31 | /* |
23 | * DMA-consistent mapping functions for PowerPCs that don't support | 32 | * DMA-consistent mapping functions for PowerPCs that don't support |
@@ -78,6 +87,8 @@ struct dma_mapping_ops { | |||
78 | dma_addr_t dma_address, size_t size, | 87 | dma_addr_t dma_address, size_t size, |
79 | enum dma_data_direction direction, | 88 | enum dma_data_direction direction, |
80 | struct dma_attrs *attrs); | 89 | struct dma_attrs *attrs); |
90 | int (*addr_needs_map)(struct device *dev, dma_addr_t addr, | ||
91 | size_t size); | ||
81 | #ifdef CONFIG_PPC_NEED_DMA_SYNC_OPS | 92 | #ifdef CONFIG_PPC_NEED_DMA_SYNC_OPS |
82 | void (*sync_single_range_for_cpu)(struct device *hwdev, | 93 | void (*sync_single_range_for_cpu)(struct device *hwdev, |
83 | dma_addr_t dma_handle, unsigned long offset, | 94 | dma_addr_t dma_handle, unsigned long offset, |
diff --git a/arch/powerpc/include/asm/elf.h b/arch/powerpc/include/asm/elf.h index d6b4a12cdeff..014a624f4c8e 100644 --- a/arch/powerpc/include/asm/elf.h +++ b/arch/powerpc/include/asm/elf.h | |||
@@ -256,11 +256,11 @@ do { \ | |||
256 | * even if we have an executable stack. | 256 | * even if we have an executable stack. |
257 | */ | 257 | */ |
258 | # define elf_read_implies_exec(ex, exec_stk) (test_thread_flag(TIF_32BIT) ? \ | 258 | # define elf_read_implies_exec(ex, exec_stk) (test_thread_flag(TIF_32BIT) ? \ |
259 | (exec_stk != EXSTACK_DISABLE_X) : 0) | 259 | (exec_stk == EXSTACK_DEFAULT) : 0) |
260 | #else | 260 | #else |
261 | # define SET_PERSONALITY(ex) \ | 261 | # define SET_PERSONALITY(ex) \ |
262 | set_personality(PER_LINUX | (current->personality & (~PER_MASK))) | 262 | set_personality(PER_LINUX | (current->personality & (~PER_MASK))) |
263 | # define elf_read_implies_exec(ex, exec_stk) (exec_stk != EXSTACK_DISABLE_X) | 263 | # define elf_read_implies_exec(ex, exec_stk) (exec_stk == EXSTACK_DEFAULT) |
264 | #endif /* __powerpc64__ */ | 264 | #endif /* __powerpc64__ */ |
265 | 265 | ||
266 | extern int dcache_bsize; | 266 | extern int dcache_bsize; |
diff --git a/arch/powerpc/include/asm/emulated_ops.h b/arch/powerpc/include/asm/emulated_ops.h new file mode 100644 index 000000000000..9154e8526732 --- /dev/null +++ b/arch/powerpc/include/asm/emulated_ops.h | |||
@@ -0,0 +1,73 @@ | |||
1 | /* | ||
2 | * Copyright 2007 Sony Corporation | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License as published by | ||
6 | * the Free Software Foundation; version 2 of the License. | ||
7 | * | ||
8 | * This program is distributed in the hope that it will be useful, | ||
9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
11 | * GNU General Public License for more details. | ||
12 | * | ||
13 | * You should have received a copy of the GNU General Public License | ||
14 | * along with this program. | ||
15 | * If not, see <http://www.gnu.org/licenses/>. | ||
16 | */ | ||
17 | |||
18 | #ifndef _ASM_POWERPC_EMULATED_OPS_H | ||
19 | #define _ASM_POWERPC_EMULATED_OPS_H | ||
20 | |||
21 | #include <asm/atomic.h> | ||
22 | |||
23 | |||
24 | #ifdef CONFIG_PPC_EMULATED_STATS | ||
25 | |||
26 | struct ppc_emulated_entry { | ||
27 | const char *name; | ||
28 | atomic_t val; | ||
29 | }; | ||
30 | |||
31 | extern struct ppc_emulated { | ||
32 | #ifdef CONFIG_ALTIVEC | ||
33 | struct ppc_emulated_entry altivec; | ||
34 | #endif | ||
35 | struct ppc_emulated_entry dcba; | ||
36 | struct ppc_emulated_entry dcbz; | ||
37 | struct ppc_emulated_entry fp_pair; | ||
38 | struct ppc_emulated_entry isel; | ||
39 | struct ppc_emulated_entry mcrxr; | ||
40 | struct ppc_emulated_entry mfpvr; | ||
41 | struct ppc_emulated_entry multiple; | ||
42 | struct ppc_emulated_entry popcntb; | ||
43 | struct ppc_emulated_entry spe; | ||
44 | struct ppc_emulated_entry string; | ||
45 | struct ppc_emulated_entry unaligned; | ||
46 | #ifdef CONFIG_MATH_EMULATION | ||
47 | struct ppc_emulated_entry math; | ||
48 | #elif defined(CONFIG_8XX_MINIMAL_FPEMU) | ||
49 | struct ppc_emulated_entry 8xx; | ||
50 | #endif | ||
51 | #ifdef CONFIG_VSX | ||
52 | struct ppc_emulated_entry vsx; | ||
53 | #endif | ||
54 | } ppc_emulated; | ||
55 | |||
56 | extern u32 ppc_warn_emulated; | ||
57 | |||
58 | extern void ppc_warn_emulated_print(const char *type); | ||
59 | |||
60 | #define PPC_WARN_EMULATED(type) \ | ||
61 | do { \ | ||
62 | atomic_inc(&ppc_emulated.type.val); \ | ||
63 | if (ppc_warn_emulated) \ | ||
64 | ppc_warn_emulated_print(ppc_emulated.type.name); \ | ||
65 | } while (0) | ||
66 | |||
67 | #else /* !CONFIG_PPC_EMULATED_STATS */ | ||
68 | |||
69 | #define PPC_WARN_EMULATED(type) do { } while (0) | ||
70 | |||
71 | #endif /* !CONFIG_PPC_EMULATED_STATS */ | ||
72 | |||
73 | #endif /* _ASM_POWERPC_EMULATED_OPS_H */ | ||
diff --git a/arch/powerpc/include/asm/feature-fixups.h b/arch/powerpc/include/asm/feature-fixups.h index e4094a5cb05b..cbd4dfa4bce2 100644 --- a/arch/powerpc/include/asm/feature-fixups.h +++ b/arch/powerpc/include/asm/feature-fixups.h | |||
@@ -8,8 +8,6 @@ | |||
8 | * 2 of the License, or (at your option) any later version. | 8 | * 2 of the License, or (at your option) any later version. |
9 | */ | 9 | */ |
10 | 10 | ||
11 | #ifdef __ASSEMBLY__ | ||
12 | |||
13 | /* | 11 | /* |
14 | * Feature section common macros | 12 | * Feature section common macros |
15 | * | 13 | * |
@@ -23,10 +21,12 @@ | |||
23 | /* 64 bits kernel, 32 bits code (ie. vdso32) */ | 21 | /* 64 bits kernel, 32 bits code (ie. vdso32) */ |
24 | #define FTR_ENTRY_LONG .llong | 22 | #define FTR_ENTRY_LONG .llong |
25 | #define FTR_ENTRY_OFFSET .long 0xffffffff; .long | 23 | #define FTR_ENTRY_OFFSET .long 0xffffffff; .long |
24 | #elif defined(CONFIG_PPC64) | ||
25 | #define FTR_ENTRY_LONG .llong | ||
26 | #define FTR_ENTRY_OFFSET .llong | ||
26 | #else | 27 | #else |
27 | /* 64 bit kernel 64 bit code, or 32 bit kernel 32 bit code */ | 28 | #define FTR_ENTRY_LONG .long |
28 | #define FTR_ENTRY_LONG PPC_LONG | 29 | #define FTR_ENTRY_OFFSET .long |
29 | #define FTR_ENTRY_OFFSET PPC_LONG | ||
30 | #endif | 30 | #endif |
31 | 31 | ||
32 | #define START_FTR_SECTION(label) label##1: | 32 | #define START_FTR_SECTION(label) label##1: |
@@ -141,6 +141,21 @@ label##5: \ | |||
141 | #define ALT_FW_FTR_SECTION_END_IFCLR(msk) \ | 141 | #define ALT_FW_FTR_SECTION_END_IFCLR(msk) \ |
142 | ALT_FW_FTR_SECTION_END_NESTED_IFCLR(msk, 97) | 142 | ALT_FW_FTR_SECTION_END_NESTED_IFCLR(msk, 97) |
143 | 143 | ||
144 | #ifndef __ASSEMBLY__ | ||
145 | |||
146 | #define ASM_MMU_FTR_IF(section_if, section_else, msk, val) \ | ||
147 | stringify_in_c(BEGIN_MMU_FTR_SECTION) \ | ||
148 | section_if "; " \ | ||
149 | stringify_in_c(MMU_FTR_SECTION_ELSE) \ | ||
150 | section_else "; " \ | ||
151 | stringify_in_c(ALT_MMU_FTR_SECTION_END((msk), (val))) | ||
152 | |||
153 | #define ASM_MMU_FTR_IFSET(section_if, section_else, msk) \ | ||
154 | ASM_MMU_FTR_IF(section_if, section_else, (msk), (msk)) | ||
155 | |||
156 | #define ASM_MMU_FTR_IFCLR(section_if, section_else, msk) \ | ||
157 | ASM_MMU_FTR_IF(section_if, section_else, (msk), 0) | ||
158 | |||
144 | #endif /* __ASSEMBLY__ */ | 159 | #endif /* __ASSEMBLY__ */ |
145 | 160 | ||
146 | /* LWSYNC feature sections */ | 161 | /* LWSYNC feature sections */ |
diff --git a/arch/powerpc/include/asm/lppaca.h b/arch/powerpc/include/asm/lppaca.h index d2a65e8ca6ae..f78f65c38f05 100644 --- a/arch/powerpc/include/asm/lppaca.h +++ b/arch/powerpc/include/asm/lppaca.h | |||
@@ -20,6 +20,11 @@ | |||
20 | #define _ASM_POWERPC_LPPACA_H | 20 | #define _ASM_POWERPC_LPPACA_H |
21 | #ifdef __KERNEL__ | 21 | #ifdef __KERNEL__ |
22 | 22 | ||
23 | /* These definitions relate to hypervisors that only exist when using | ||
24 | * a server type processor | ||
25 | */ | ||
26 | #ifdef CONFIG_PPC_BOOK3S | ||
27 | |||
23 | //============================================================================= | 28 | //============================================================================= |
24 | // | 29 | // |
25 | // This control block contains the data that is shared between the | 30 | // This control block contains the data that is shared between the |
@@ -158,5 +163,6 @@ struct slb_shadow { | |||
158 | 163 | ||
159 | extern struct slb_shadow slb_shadow[]; | 164 | extern struct slb_shadow slb_shadow[]; |
160 | 165 | ||
166 | #endif /* CONFIG_PPC_BOOK3S */ | ||
161 | #endif /* __KERNEL__ */ | 167 | #endif /* __KERNEL__ */ |
162 | #endif /* _ASM_POWERPC_LPPACA_H */ | 168 | #endif /* _ASM_POWERPC_LPPACA_H */ |
diff --git a/arch/powerpc/include/asm/machdep.h b/arch/powerpc/include/asm/machdep.h index 0efdb1dfdc5f..11d1fc3a8962 100644 --- a/arch/powerpc/include/asm/machdep.h +++ b/arch/powerpc/include/asm/machdep.h | |||
@@ -110,6 +110,10 @@ struct machdep_calls { | |||
110 | void (*show_percpuinfo)(struct seq_file *m, int i); | 110 | void (*show_percpuinfo)(struct seq_file *m, int i); |
111 | 111 | ||
112 | void (*init_IRQ)(void); | 112 | void (*init_IRQ)(void); |
113 | |||
114 | /* Return an irq, or NO_IRQ to indicate there are none pending. | ||
115 | * If for some reason there is no irq, but the interrupt | ||
116 | * shouldn't be counted as spurious, return NO_IRQ_IGNORE. */ | ||
113 | unsigned int (*get_irq)(void); | 117 | unsigned int (*get_irq)(void); |
114 | #ifdef CONFIG_KEXEC | 118 | #ifdef CONFIG_KEXEC |
115 | void (*kexec_cpu_down)(int crash_shutdown, int secondary); | 119 | void (*kexec_cpu_down)(int crash_shutdown, int secondary); |
diff --git a/arch/powerpc/include/asm/mmu.h b/arch/powerpc/include/asm/mmu.h index cbf154387091..fb57ded592f9 100644 --- a/arch/powerpc/include/asm/mmu.h +++ b/arch/powerpc/include/asm/mmu.h | |||
@@ -52,6 +52,11 @@ | |||
52 | */ | 52 | */ |
53 | #define MMU_FTR_NEED_DTLB_SW_LRU ASM_CONST(0x00200000) | 53 | #define MMU_FTR_NEED_DTLB_SW_LRU ASM_CONST(0x00200000) |
54 | 54 | ||
55 | /* This indicates that the processor uses the ISA 2.06 server tlbie | ||
56 | * mnemonics | ||
57 | */ | ||
58 | #define MMU_FTR_TLBIE_206 ASM_CONST(0x00400000) | ||
59 | |||
55 | #ifndef __ASSEMBLY__ | 60 | #ifndef __ASSEMBLY__ |
56 | #include <asm/cputable.h> | 61 | #include <asm/cputable.h> |
57 | 62 | ||
@@ -69,10 +74,10 @@ extern void early_init_mmu_secondary(void); | |||
69 | #endif /* !__ASSEMBLY__ */ | 74 | #endif /* !__ASSEMBLY__ */ |
70 | 75 | ||
71 | 76 | ||
72 | #ifdef CONFIG_PPC64 | 77 | #if defined(CONFIG_PPC_STD_MMU_64) |
73 | /* 64-bit classic hash table MMU */ | 78 | /* 64-bit classic hash table MMU */ |
74 | # include <asm/mmu-hash64.h> | 79 | # include <asm/mmu-hash64.h> |
75 | #elif defined(CONFIG_PPC_STD_MMU) | 80 | #elif defined(CONFIG_PPC_STD_MMU_32) |
76 | /* 32-bit classic hash table MMU */ | 81 | /* 32-bit classic hash table MMU */ |
77 | # include <asm/mmu-hash32.h> | 82 | # include <asm/mmu-hash32.h> |
78 | #elif defined(CONFIG_40x) | 83 | #elif defined(CONFIG_40x) |
diff --git a/arch/powerpc/include/asm/mpc86xx.h b/arch/powerpc/include/asm/mpc86xx.h deleted file mode 100644 index 15f650f987e7..000000000000 --- a/arch/powerpc/include/asm/mpc86xx.h +++ /dev/null | |||
@@ -1,33 +0,0 @@ | |||
1 | /* | ||
2 | * MPC86xx definitions | ||
3 | * | ||
4 | * Author: Jeff Brown | ||
5 | * | ||
6 | * Copyright 2004 Freescale Semiconductor, Inc | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify it | ||
9 | * under the terms of the GNU General Public License as published by the | ||
10 | * Free Software Foundation; either version 2 of the License, or (at your | ||
11 | * option) any later version. | ||
12 | */ | ||
13 | |||
14 | #ifdef __KERNEL__ | ||
15 | #ifndef __ASM_POWERPC_MPC86xx_H__ | ||
16 | #define __ASM_POWERPC_MPC86xx_H__ | ||
17 | |||
18 | #include <asm/mmu.h> | ||
19 | |||
20 | #ifdef CONFIG_PPC_86xx | ||
21 | |||
22 | #define CPU0_BOOT_RELEASE 0x01000000 | ||
23 | #define CPU1_BOOT_RELEASE 0x02000000 | ||
24 | #define CPU_ALL_RELEASED (CPU0_BOOT_RELEASE | CPU1_BOOT_RELEASE) | ||
25 | #define MCM_PORT_CONFIG_OFFSET 0x1010 | ||
26 | |||
27 | /* Offset from CCSRBAR */ | ||
28 | #define MPC86xx_MCM_OFFSET (0x00000) | ||
29 | #define MPC86xx_MCM_SIZE (0x02000) | ||
30 | |||
31 | #endif /* CONFIG_PPC_86xx */ | ||
32 | #endif /* __ASM_POWERPC_MPC86xx_H__ */ | ||
33 | #endif /* __KERNEL__ */ | ||
diff --git a/arch/powerpc/include/asm/paca.h b/arch/powerpc/include/asm/paca.h index 6ef055723019..c8a3cbfe02ff 100644 --- a/arch/powerpc/include/asm/paca.h +++ b/arch/powerpc/include/asm/paca.h | |||
@@ -43,6 +43,7 @@ struct task_struct; | |||
43 | * processor. | 43 | * processor. |
44 | */ | 44 | */ |
45 | struct paca_struct { | 45 | struct paca_struct { |
46 | #ifdef CONFIG_PPC_BOOK3S | ||
46 | /* | 47 | /* |
47 | * Because hw_cpu_id, unlike other paca fields, is accessed | 48 | * Because hw_cpu_id, unlike other paca fields, is accessed |
48 | * routinely from other CPUs (from the IRQ code), we stick to | 49 | * routinely from other CPUs (from the IRQ code), we stick to |
@@ -51,7 +52,7 @@ struct paca_struct { | |||
51 | */ | 52 | */ |
52 | 53 | ||
53 | struct lppaca *lppaca_ptr; /* Pointer to LpPaca for PLIC */ | 54 | struct lppaca *lppaca_ptr; /* Pointer to LpPaca for PLIC */ |
54 | 55 | #endif /* CONFIG_PPC_BOOK3S */ | |
55 | /* | 56 | /* |
56 | * MAGIC: the spinlock functions in arch/powerpc/lib/locks.c | 57 | * MAGIC: the spinlock functions in arch/powerpc/lib/locks.c |
57 | * load lock_token and paca_index with a single lwz | 58 | * load lock_token and paca_index with a single lwz |
@@ -64,13 +65,16 @@ struct paca_struct { | |||
64 | u64 kernel_toc; /* Kernel TOC address */ | 65 | u64 kernel_toc; /* Kernel TOC address */ |
65 | u64 kernelbase; /* Base address of kernel */ | 66 | u64 kernelbase; /* Base address of kernel */ |
66 | u64 kernel_msr; /* MSR while running in kernel */ | 67 | u64 kernel_msr; /* MSR while running in kernel */ |
68 | #ifdef CONFIG_PPC_STD_MMU_64 | ||
67 | u64 stab_real; /* Absolute address of segment table */ | 69 | u64 stab_real; /* Absolute address of segment table */ |
68 | u64 stab_addr; /* Virtual address of segment table */ | 70 | u64 stab_addr; /* Virtual address of segment table */ |
71 | #endif /* CONFIG_PPC_STD_MMU_64 */ | ||
69 | void *emergency_sp; /* pointer to emergency stack */ | 72 | void *emergency_sp; /* pointer to emergency stack */ |
70 | u64 data_offset; /* per cpu data offset */ | 73 | u64 data_offset; /* per cpu data offset */ |
71 | s16 hw_cpu_id; /* Physical processor number */ | 74 | s16 hw_cpu_id; /* Physical processor number */ |
72 | u8 cpu_start; /* At startup, processor spins until */ | 75 | u8 cpu_start; /* At startup, processor spins until */ |
73 | /* this becomes non-zero. */ | 76 | /* this becomes non-zero. */ |
77 | #ifdef CONFIG_PPC_STD_MMU_64 | ||
74 | struct slb_shadow *slb_shadow_ptr; | 78 | struct slb_shadow *slb_shadow_ptr; |
75 | 79 | ||
76 | /* | 80 | /* |
@@ -81,11 +85,13 @@ struct paca_struct { | |||
81 | u64 exmc[10]; /* used for machine checks */ | 85 | u64 exmc[10]; /* used for machine checks */ |
82 | u64 exslb[10]; /* used for SLB/segment table misses | 86 | u64 exslb[10]; /* used for SLB/segment table misses |
83 | * on the linear mapping */ | 87 | * on the linear mapping */ |
84 | 88 | /* SLB related definitions */ | |
85 | mm_context_t context; | ||
86 | u16 vmalloc_sllp; | 89 | u16 vmalloc_sllp; |
87 | u16 slb_cache_ptr; | 90 | u16 slb_cache_ptr; |
88 | u16 slb_cache[SLB_CACHE_ENTRIES]; | 91 | u16 slb_cache[SLB_CACHE_ENTRIES]; |
92 | #endif /* CONFIG_PPC_STD_MMU_64 */ | ||
93 | |||
94 | mm_context_t context; | ||
89 | 95 | ||
90 | /* | 96 | /* |
91 | * then miscellaneous read-write fields | 97 | * then miscellaneous read-write fields |
diff --git a/arch/powerpc/include/asm/page.h b/arch/powerpc/include/asm/page.h index 32cbf16f10ea..4940662ee87e 100644 --- a/arch/powerpc/include/asm/page.h +++ b/arch/powerpc/include/asm/page.h | |||
@@ -231,6 +231,11 @@ extern void copy_user_page(void *to, void *from, unsigned long vaddr, | |||
231 | struct page *p); | 231 | struct page *p); |
232 | extern int page_is_ram(unsigned long pfn); | 232 | extern int page_is_ram(unsigned long pfn); |
233 | 233 | ||
234 | #ifdef CONFIG_PPC_SMLPAR | ||
235 | void arch_free_page(struct page *page, int order); | ||
236 | #define HAVE_ARCH_FREE_PAGE | ||
237 | #endif | ||
238 | |||
234 | struct vm_area_struct; | 239 | struct vm_area_struct; |
235 | 240 | ||
236 | typedef struct page *pgtable_t; | 241 | typedef struct page *pgtable_t; |
diff --git a/arch/powerpc/include/asm/pci-bridge.h b/arch/powerpc/include/asm/pci-bridge.h index 84007afabdb5..4c61fa0b8d75 100644 --- a/arch/powerpc/include/asm/pci-bridge.h +++ b/arch/powerpc/include/asm/pci-bridge.h | |||
@@ -86,17 +86,12 @@ struct pci_controller { | |||
86 | void *io_base_alloc; | 86 | void *io_base_alloc; |
87 | #endif | 87 | #endif |
88 | resource_size_t io_base_phys; | 88 | resource_size_t io_base_phys; |
89 | #ifndef CONFIG_PPC64 | ||
90 | resource_size_t pci_io_size; | 89 | resource_size_t pci_io_size; |
91 | #endif | ||
92 | 90 | ||
93 | /* Some machines (PReP) have a non 1:1 mapping of | 91 | /* Some machines (PReP) have a non 1:1 mapping of |
94 | * the PCI memory space in the CPU bus space | 92 | * the PCI memory space in the CPU bus space |
95 | */ | 93 | */ |
96 | resource_size_t pci_mem_offset; | 94 | resource_size_t pci_mem_offset; |
97 | #ifdef CONFIG_PPC64 | ||
98 | unsigned long pci_io_size; | ||
99 | #endif | ||
100 | 95 | ||
101 | /* Some machines have a special region to forward the ISA | 96 | /* Some machines have a special region to forward the ISA |
102 | * "memory" cycles such as VGA memory regions. Left to 0 | 97 | * "memory" cycles such as VGA memory regions. Left to 0 |
@@ -140,10 +135,12 @@ struct pci_controller { | |||
140 | struct resource io_resource; | 135 | struct resource io_resource; |
141 | struct resource mem_resources[3]; | 136 | struct resource mem_resources[3]; |
142 | int global_number; /* PCI domain number */ | 137 | int global_number; /* PCI domain number */ |
138 | |||
139 | resource_size_t dma_window_base_cur; | ||
140 | resource_size_t dma_window_size; | ||
141 | |||
143 | #ifdef CONFIG_PPC64 | 142 | #ifdef CONFIG_PPC64 |
144 | unsigned long buid; | 143 | unsigned long buid; |
145 | unsigned long dma_window_base_cur; | ||
146 | unsigned long dma_window_size; | ||
147 | 144 | ||
148 | void *private_data; | 145 | void *private_data; |
149 | #endif /* CONFIG_PPC64 */ | 146 | #endif /* CONFIG_PPC64 */ |
@@ -185,7 +182,6 @@ extern int early_find_capability(struct pci_controller *hose, int bus, | |||
185 | extern void setup_indirect_pci(struct pci_controller* hose, | 182 | extern void setup_indirect_pci(struct pci_controller* hose, |
186 | resource_size_t cfg_addr, | 183 | resource_size_t cfg_addr, |
187 | resource_size_t cfg_data, u32 flags); | 184 | resource_size_t cfg_data, u32 flags); |
188 | extern void setup_grackle(struct pci_controller *hose); | ||
189 | #else /* CONFIG_PPC64 */ | 185 | #else /* CONFIG_PPC64 */ |
190 | 186 | ||
191 | /* | 187 | /* |
@@ -221,6 +217,7 @@ struct pci_dn { | |||
221 | #define PCI_DN(dn) ((struct pci_dn *) (dn)->data) | 217 | #define PCI_DN(dn) ((struct pci_dn *) (dn)->data) |
222 | 218 | ||
223 | extern struct device_node *fetch_dev_dn(struct pci_dev *dev); | 219 | extern struct device_node *fetch_dev_dn(struct pci_dev *dev); |
220 | extern void * update_dn_pci_info(struct device_node *dn, void *data); | ||
224 | 221 | ||
225 | /* Get a device_node from a pci_dev. This code must be fast except | 222 | /* Get a device_node from a pci_dev. This code must be fast except |
226 | * in the case where the sysdata is incorrect and needs to be fixed | 223 | * in the case where the sysdata is incorrect and needs to be fixed |
diff --git a/arch/powerpc/include/asm/pgtable-ppc64.h b/arch/powerpc/include/asm/pgtable-ppc64.h index c40db05f21e0..8cd083c61503 100644 --- a/arch/powerpc/include/asm/pgtable-ppc64.h +++ b/arch/powerpc/include/asm/pgtable-ppc64.h | |||
@@ -31,9 +31,11 @@ | |||
31 | #error TASK_SIZE_USER64 exceeds pagetable range | 31 | #error TASK_SIZE_USER64 exceeds pagetable range |
32 | #endif | 32 | #endif |
33 | 33 | ||
34 | #ifdef CONFIG_PPC_STD_MMU_64 | ||
34 | #if TASK_SIZE_USER64 > (1UL << (USER_ESID_BITS + SID_SHIFT)) | 35 | #if TASK_SIZE_USER64 > (1UL << (USER_ESID_BITS + SID_SHIFT)) |
35 | #error TASK_SIZE_USER64 exceeds user VSID range | 36 | #error TASK_SIZE_USER64 exceeds user VSID range |
36 | #endif | 37 | #endif |
38 | #endif | ||
37 | 39 | ||
38 | /* | 40 | /* |
39 | * Define the address range of the vmalloc VM area. | 41 | * Define the address range of the vmalloc VM area. |
@@ -199,8 +201,11 @@ static inline unsigned long pte_update(struct mm_struct *mm, | |||
199 | if (!huge) | 201 | if (!huge) |
200 | assert_pte_locked(mm, addr); | 202 | assert_pte_locked(mm, addr); |
201 | 203 | ||
204 | #ifdef CONFIG_PPC_STD_MMU_64 | ||
202 | if (old & _PAGE_HASHPTE) | 205 | if (old & _PAGE_HASHPTE) |
203 | hpte_need_flush(mm, addr, ptep, old, huge); | 206 | hpte_need_flush(mm, addr, ptep, old, huge); |
207 | #endif | ||
208 | |||
204 | return old; | 209 | return old; |
205 | } | 210 | } |
206 | 211 | ||
diff --git a/arch/powerpc/include/asm/ppc-opcode.h b/arch/powerpc/include/asm/ppc-opcode.h index 640ccbbc0977..b74f16d45cb4 100644 --- a/arch/powerpc/include/asm/ppc-opcode.h +++ b/arch/powerpc/include/asm/ppc-opcode.h | |||
@@ -25,6 +25,7 @@ | |||
25 | #define PPC_INST_LSWI 0x7c0004aa | 25 | #define PPC_INST_LSWI 0x7c0004aa |
26 | #define PPC_INST_LSWX 0x7c00042a | 26 | #define PPC_INST_LSWX 0x7c00042a |
27 | #define PPC_INST_LWSYNC 0x7c2004ac | 27 | #define PPC_INST_LWSYNC 0x7c2004ac |
28 | #define PPC_INST_LXVD2X 0x7c000698 | ||
28 | #define PPC_INST_MCRXR 0x7c000400 | 29 | #define PPC_INST_MCRXR 0x7c000400 |
29 | #define PPC_INST_MCRXR_MASK 0xfc0007fe | 30 | #define PPC_INST_MCRXR_MASK 0xfc0007fe |
30 | #define PPC_INST_MFSPR_PVR 0x7c1f42a6 | 31 | #define PPC_INST_MFSPR_PVR 0x7c1f42a6 |
@@ -43,14 +44,18 @@ | |||
43 | 44 | ||
44 | #define PPC_INST_STSWI 0x7c0005aa | 45 | #define PPC_INST_STSWI 0x7c0005aa |
45 | #define PPC_INST_STSWX 0x7c00052a | 46 | #define PPC_INST_STSWX 0x7c00052a |
47 | #define PPC_INST_STXVD2X 0x7c000798 | ||
48 | #define PPC_INST_TLBIE 0x7c000264 | ||
46 | #define PPC_INST_TLBILX 0x7c000024 | 49 | #define PPC_INST_TLBILX 0x7c000024 |
47 | #define PPC_INST_WAIT 0x7c00007c | 50 | #define PPC_INST_WAIT 0x7c00007c |
48 | 51 | ||
49 | /* macros to insert fields into opcodes */ | 52 | /* macros to insert fields into opcodes */ |
50 | #define __PPC_RA(a) ((a & 0x1f) << 16) | 53 | #define __PPC_RA(a) (((a) & 0x1f) << 16) |
51 | #define __PPC_RB(b) ((b & 0x1f) << 11) | 54 | #define __PPC_RB(b) (((b) & 0x1f) << 11) |
52 | #define __PPC_T_TLB(t) ((t & 0x3) << 21) | 55 | #define __PPC_RS(s) (((s) & 0x1f) << 21) |
53 | #define __PPC_WC(w) ((w & 0x3) << 21) | 56 | #define __PPC_XS(s) ((((s) & 0x1f) << 21) | (((s) & 0x20) >> 5)) |
57 | #define __PPC_T_TLB(t) (((t) & 0x3) << 21) | ||
58 | #define __PPC_WC(w) (((w) & 0x3) << 21) | ||
54 | 59 | ||
55 | /* Deal with instructions that older assemblers aren't aware of */ | 60 | /* Deal with instructions that older assemblers aren't aware of */ |
56 | #define PPC_DCBAL(a, b) stringify_in_c(.long PPC_INST_DCBAL | \ | 61 | #define PPC_DCBAL(a, b) stringify_in_c(.long PPC_INST_DCBAL | \ |
@@ -69,5 +74,17 @@ | |||
69 | #define PPC_TLBILX_VA(a, b) PPC_TLBILX(3, a, b) | 74 | #define PPC_TLBILX_VA(a, b) PPC_TLBILX(3, a, b) |
70 | #define PPC_WAIT(w) stringify_in_c(.long PPC_INST_WAIT | \ | 75 | #define PPC_WAIT(w) stringify_in_c(.long PPC_INST_WAIT | \ |
71 | __PPC_WC(w)) | 76 | __PPC_WC(w)) |
77 | #define PPC_TLBIE(lp,a) stringify_in_c(.long PPC_INST_TLBIE | \ | ||
78 | __PPC_RB(a) | __PPC_RS(lp)) | ||
79 | |||
80 | /* | ||
81 | * Define what the VSX XX1 form instructions will look like, then add | ||
82 | * the 128 bit load store instructions based on that. | ||
83 | */ | ||
84 | #define VSX_XX1(s, a, b) (__PPC_XS(s) | __PPC_RA(a) | __PPC_RB(b)) | ||
85 | #define STXVD2X(s, a, b) stringify_in_c(.long PPC_INST_STXVD2X | \ | ||
86 | VSX_XX1((s), (a), (b))) | ||
87 | #define LXVD2X(s, a, b) stringify_in_c(.long PPC_INST_LXVD2X | \ | ||
88 | VSX_XX1((s), (a), (b))) | ||
72 | 89 | ||
73 | #endif /* _ASM_POWERPC_PPC_OPCODE_H */ | 90 | #endif /* _ASM_POWERPC_PPC_OPCODE_H */ |
diff --git a/arch/powerpc/include/asm/ppc_asm.h b/arch/powerpc/include/asm/ppc_asm.h index 384d90c9c272..f9729529c20d 100644 --- a/arch/powerpc/include/asm/ppc_asm.h +++ b/arch/powerpc/include/asm/ppc_asm.h | |||
@@ -76,16 +76,6 @@ END_FTR_SECTION_IFCLR(CPU_FTR_PURR); \ | |||
76 | REST_10GPRS(22, base) | 76 | REST_10GPRS(22, base) |
77 | #endif | 77 | #endif |
78 | 78 | ||
79 | /* | ||
80 | * Define what the VSX XX1 form instructions will look like, then add | ||
81 | * the 128 bit load store instructions based on that. | ||
82 | */ | ||
83 | #define VSX_XX1(xs, ra, rb) (((xs) & 0x1f) << 21 | ((ra) << 16) | \ | ||
84 | ((rb) << 11) | (((xs) >> 5))) | ||
85 | |||
86 | #define STXVD2X(xs, ra, rb) .long (0x7c000798 | VSX_XX1((xs), (ra), (rb))) | ||
87 | #define LXVD2X(xs, ra, rb) .long (0x7c000698 | VSX_XX1((xs), (ra), (rb))) | ||
88 | |||
89 | #define SAVE_2GPRS(n, base) SAVE_GPR(n, base); SAVE_GPR(n+1, base) | 79 | #define SAVE_2GPRS(n, base) SAVE_GPR(n, base); SAVE_GPR(n+1, base) |
90 | #define SAVE_4GPRS(n, base) SAVE_2GPRS(n, base); SAVE_2GPRS(n+2, base) | 80 | #define SAVE_4GPRS(n, base) SAVE_2GPRS(n, base); SAVE_2GPRS(n+2, base) |
91 | #define SAVE_8GPRS(n, base) SAVE_4GPRS(n, base); SAVE_4GPRS(n+4, base) | 81 | #define SAVE_8GPRS(n, base) SAVE_4GPRS(n, base); SAVE_4GPRS(n+4, base) |
diff --git a/arch/powerpc/include/asm/ptrace.h b/arch/powerpc/include/asm/ptrace.h index c9c678fb2538..8c341490cfc5 100644 --- a/arch/powerpc/include/asm/ptrace.h +++ b/arch/powerpc/include/asm/ptrace.h | |||
@@ -135,7 +135,9 @@ do { \ | |||
135 | * These are defined as per linux/ptrace.h, which see. | 135 | * These are defined as per linux/ptrace.h, which see. |
136 | */ | 136 | */ |
137 | #define arch_has_single_step() (1) | 137 | #define arch_has_single_step() (1) |
138 | #define arch_has_block_step() (!cpu_has_feature(CPU_FTR_601)) | ||
138 | extern void user_enable_single_step(struct task_struct *); | 139 | extern void user_enable_single_step(struct task_struct *); |
140 | extern void user_enable_block_step(struct task_struct *); | ||
139 | extern void user_disable_single_step(struct task_struct *); | 141 | extern void user_disable_single_step(struct task_struct *); |
140 | 142 | ||
141 | #endif /* __ASSEMBLY__ */ | 143 | #endif /* __ASSEMBLY__ */ |
@@ -288,4 +290,6 @@ extern void user_disable_single_step(struct task_struct *); | |||
288 | #define PPC_PTRACE_PEEKUSR_3264 0x91 | 290 | #define PPC_PTRACE_PEEKUSR_3264 0x91 |
289 | #define PPC_PTRACE_POKEUSR_3264 0x90 | 291 | #define PPC_PTRACE_POKEUSR_3264 0x90 |
290 | 292 | ||
293 | #define PTRACE_SINGLEBLOCK 0x100 /* resume execution until next branch */ | ||
294 | |||
291 | #endif /* _ASM_POWERPC_PTRACE_H */ | 295 | #endif /* _ASM_POWERPC_PTRACE_H */ |
diff --git a/arch/powerpc/include/asm/qe.h b/arch/powerpc/include/asm/qe.h index 2701753d9937..e0faf332c9c9 100644 --- a/arch/powerpc/include/asm/qe.h +++ b/arch/powerpc/include/asm/qe.h | |||
@@ -22,7 +22,7 @@ | |||
22 | #include <asm/cpm.h> | 22 | #include <asm/cpm.h> |
23 | #include <asm/immap_qe.h> | 23 | #include <asm/immap_qe.h> |
24 | 24 | ||
25 | #define QE_NUM_OF_SNUM 28 | 25 | #define QE_NUM_OF_SNUM 256 /* There are 256 serial number in QE */ |
26 | #define QE_NUM_OF_BRGS 16 | 26 | #define QE_NUM_OF_BRGS 16 |
27 | #define QE_NUM_OF_PORTS 1024 | 27 | #define QE_NUM_OF_PORTS 1024 |
28 | 28 | ||
@@ -152,6 +152,9 @@ unsigned int qe_get_brg_clk(void); | |||
152 | int qe_setbrg(enum qe_clock brg, unsigned int rate, unsigned int multiplier); | 152 | int qe_setbrg(enum qe_clock brg, unsigned int rate, unsigned int multiplier); |
153 | int qe_get_snum(void); | 153 | int qe_get_snum(void); |
154 | void qe_put_snum(u8 snum); | 154 | void qe_put_snum(u8 snum); |
155 | unsigned int qe_get_num_of_risc(void); | ||
156 | unsigned int qe_get_num_of_snums(void); | ||
157 | |||
155 | /* we actually use cpm_muram implementation, define this for convenience */ | 158 | /* we actually use cpm_muram implementation, define this for convenience */ |
156 | #define qe_muram_init cpm_muram_init | 159 | #define qe_muram_init cpm_muram_init |
157 | #define qe_muram_alloc cpm_muram_alloc | 160 | #define qe_muram_alloc cpm_muram_alloc |
@@ -231,12 +234,16 @@ struct qe_bd { | |||
231 | #define QE_ALIGNMENT_OF_PRAM 64 | 234 | #define QE_ALIGNMENT_OF_PRAM 64 |
232 | 235 | ||
233 | /* RISC allocation */ | 236 | /* RISC allocation */ |
234 | enum qe_risc_allocation { | 237 | #define QE_RISC_ALLOCATION_RISC1 0x1 /* RISC 1 */ |
235 | QE_RISC_ALLOCATION_RISC1 = 1, /* RISC 1 */ | 238 | #define QE_RISC_ALLOCATION_RISC2 0x2 /* RISC 2 */ |
236 | QE_RISC_ALLOCATION_RISC2 = 2, /* RISC 2 */ | 239 | #define QE_RISC_ALLOCATION_RISC3 0x4 /* RISC 3 */ |
237 | QE_RISC_ALLOCATION_RISC1_AND_RISC2 = 3 /* Dynamically choose | 240 | #define QE_RISC_ALLOCATION_RISC4 0x8 /* RISC 4 */ |
238 | RISC 1 or RISC 2 */ | 241 | #define QE_RISC_ALLOCATION_RISC1_AND_RISC2 (QE_RISC_ALLOCATION_RISC1 | \ |
239 | }; | 242 | QE_RISC_ALLOCATION_RISC2) |
243 | #define QE_RISC_ALLOCATION_FOUR_RISCS (QE_RISC_ALLOCATION_RISC1 | \ | ||
244 | QE_RISC_ALLOCATION_RISC2 | \ | ||
245 | QE_RISC_ALLOCATION_RISC3 | \ | ||
246 | QE_RISC_ALLOCATION_RISC4) | ||
240 | 247 | ||
241 | /* QE extended filtering Table Lookup Key Size */ | 248 | /* QE extended filtering Table Lookup Key Size */ |
242 | enum qe_fltr_tbl_lookup_key_size { | 249 | enum qe_fltr_tbl_lookup_key_size { |
diff --git a/arch/powerpc/include/asm/scatterlist.h b/arch/powerpc/include/asm/scatterlist.h index fcf7d55afe45..912bf597870f 100644 --- a/arch/powerpc/include/asm/scatterlist.h +++ b/arch/powerpc/include/asm/scatterlist.h | |||
@@ -21,7 +21,7 @@ struct scatterlist { | |||
21 | unsigned int offset; | 21 | unsigned int offset; |
22 | unsigned int length; | 22 | unsigned int length; |
23 | 23 | ||
24 | /* For TCE support */ | 24 | /* For TCE or SWIOTLB support */ |
25 | dma_addr_t dma_address; | 25 | dma_addr_t dma_address; |
26 | u32 dma_length; | 26 | u32 dma_length; |
27 | }; | 27 | }; |
@@ -34,11 +34,7 @@ struct scatterlist { | |||
34 | * is 0. | 34 | * is 0. |
35 | */ | 35 | */ |
36 | #define sg_dma_address(sg) ((sg)->dma_address) | 36 | #define sg_dma_address(sg) ((sg)->dma_address) |
37 | #ifdef __powerpc64__ | ||
38 | #define sg_dma_len(sg) ((sg)->dma_length) | 37 | #define sg_dma_len(sg) ((sg)->dma_length) |
39 | #else | ||
40 | #define sg_dma_len(sg) ((sg)->length) | ||
41 | #endif | ||
42 | 38 | ||
43 | #ifdef __powerpc64__ | 39 | #ifdef __powerpc64__ |
44 | #define ISA_DMA_THRESHOLD (~0UL) | 40 | #define ISA_DMA_THRESHOLD (~0UL) |
diff --git a/arch/powerpc/include/asm/swiotlb.h b/arch/powerpc/include/asm/swiotlb.h new file mode 100644 index 000000000000..30891d6e2bc1 --- /dev/null +++ b/arch/powerpc/include/asm/swiotlb.h | |||
@@ -0,0 +1,27 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2009 Becky Bruce, Freescale Semiconductor | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify it | ||
5 | * under the terms of the GNU General Public License as published by the | ||
6 | * Free Software Foundation; either version 2 of the License, or (at your | ||
7 | * option) any later version. | ||
8 | * | ||
9 | */ | ||
10 | |||
11 | #ifndef __ASM_SWIOTLB_H | ||
12 | #define __ASM_SWIOTLB_H | ||
13 | |||
14 | #include <linux/swiotlb.h> | ||
15 | |||
16 | extern struct dma_mapping_ops swiotlb_dma_ops; | ||
17 | extern struct dma_mapping_ops swiotlb_pci_dma_ops; | ||
18 | |||
19 | int swiotlb_arch_address_needs_mapping(struct device *, dma_addr_t, | ||
20 | size_t size); | ||
21 | |||
22 | static inline void dma_mark_clean(void *addr, size_t size) {} | ||
23 | |||
24 | extern unsigned int ppc_swiotlb_enable; | ||
25 | int __init swiotlb_setup_bus_notifier(void); | ||
26 | |||
27 | #endif /* __ASM_SWIOTLB_H */ | ||
diff --git a/arch/powerpc/include/asm/system.h b/arch/powerpc/include/asm/system.h index 2b2420a49884..bb8e006a47c6 100644 --- a/arch/powerpc/include/asm/system.h +++ b/arch/powerpc/include/asm/system.h | |||
@@ -211,7 +211,7 @@ extern struct task_struct *_switch(struct thread_struct *prev, | |||
211 | 211 | ||
212 | extern unsigned int rtas_data; | 212 | extern unsigned int rtas_data; |
213 | extern int mem_init_done; /* set on boot once kmalloc can be called */ | 213 | extern int mem_init_done; /* set on boot once kmalloc can be called */ |
214 | extern int init_bootmem_done; /* set on !NUMA once bootmem is available */ | 214 | extern int init_bootmem_done; /* set once bootmem is available */ |
215 | extern phys_addr_t memory_limit; | 215 | extern phys_addr_t memory_limit; |
216 | extern unsigned long klimit; | 216 | extern unsigned long klimit; |
217 | 217 | ||
diff --git a/arch/powerpc/include/asm/xilinx_pci.h b/arch/powerpc/include/asm/xilinx_pci.h new file mode 100644 index 000000000000..7a8275caf6af --- /dev/null +++ b/arch/powerpc/include/asm/xilinx_pci.h | |||
@@ -0,0 +1,21 @@ | |||
1 | /* | ||
2 | * Xilinx pci external definitions | ||
3 | * | ||
4 | * Copyright 2009 Roderick Colenbrander | ||
5 | * Copyright 2009 Secret Lab Technologies Ltd. | ||
6 | * | ||
7 | * This file is licensed under the terms of the GNU General Public License | ||
8 | * version 2. This program is licensed "as is" without any warranty of any | ||
9 | * kind, whether express or implied. | ||
10 | */ | ||
11 | |||
12 | #ifndef INCLUDE_XILINX_PCI | ||
13 | #define INCLUDE_XILINX_PCI | ||
14 | |||
15 | #ifdef CONFIG_XILINX_PCI | ||
16 | extern void __init xilinx_pci_init(void); | ||
17 | #else | ||
18 | static inline void __init xilinx_pci_init(void) { return; } | ||
19 | #endif | ||
20 | |||
21 | #endif /* INCLUDE_XILINX_PCI */ | ||
diff --git a/arch/powerpc/kernel/Makefile b/arch/powerpc/kernel/Makefile index a2c683403c2b..a7def5f90cad 100644 --- a/arch/powerpc/kernel/Makefile +++ b/arch/powerpc/kernel/Makefile | |||
@@ -36,7 +36,7 @@ obj-$(CONFIG_PPC64) += setup_64.o sys_ppc32.o \ | |||
36 | firmware.o nvram_64.o | 36 | firmware.o nvram_64.o |
37 | obj64-$(CONFIG_RELOCATABLE) += reloc_64.o | 37 | obj64-$(CONFIG_RELOCATABLE) += reloc_64.o |
38 | obj-$(CONFIG_PPC64) += vdso64/ | 38 | obj-$(CONFIG_PPC64) += vdso64/ |
39 | obj-$(CONFIG_ALTIVEC) += vecemu.o vector.o | 39 | obj-$(CONFIG_ALTIVEC) += vecemu.o |
40 | obj-$(CONFIG_PPC_970_NAP) += idle_power4.o | 40 | obj-$(CONFIG_PPC_970_NAP) += idle_power4.o |
41 | obj-$(CONFIG_PPC_OF) += of_device.o of_platform.o prom_parse.o | 41 | obj-$(CONFIG_PPC_OF) += of_device.o of_platform.o prom_parse.o |
42 | obj-$(CONFIG_PPC_CLOCK) += clock.o | 42 | obj-$(CONFIG_PPC_CLOCK) += clock.o |
@@ -82,6 +82,7 @@ obj-$(CONFIG_SMP) += smp.o | |||
82 | obj-$(CONFIG_KPROBES) += kprobes.o | 82 | obj-$(CONFIG_KPROBES) += kprobes.o |
83 | obj-$(CONFIG_PPC_UDBG_16550) += legacy_serial.o udbg_16550.o | 83 | obj-$(CONFIG_PPC_UDBG_16550) += legacy_serial.o udbg_16550.o |
84 | obj-$(CONFIG_STACKTRACE) += stacktrace.o | 84 | obj-$(CONFIG_STACKTRACE) += stacktrace.o |
85 | obj-$(CONFIG_SWIOTLB) += dma-swiotlb.o | ||
85 | 86 | ||
86 | pci64-$(CONFIG_PPC64) += pci_dn.o isa-bridge.o | 87 | pci64-$(CONFIG_PPC64) += pci_dn.o isa-bridge.o |
87 | obj-$(CONFIG_PCI) += pci_$(CONFIG_WORD_SIZE).o $(pci64-y) \ | 88 | obj-$(CONFIG_PCI) += pci_$(CONFIG_WORD_SIZE).o $(pci64-y) \ |
@@ -111,6 +112,7 @@ obj-y += ppc_save_regs.o | |||
111 | endif | 112 | endif |
112 | 113 | ||
113 | extra-$(CONFIG_PPC_FPU) += fpu.o | 114 | extra-$(CONFIG_PPC_FPU) += fpu.o |
115 | extra-$(CONFIG_ALTIVEC) += vector.o | ||
114 | extra-$(CONFIG_PPC64) += entry_64.o | 116 | extra-$(CONFIG_PPC64) += entry_64.o |
115 | 117 | ||
116 | extra-y += systbl_chk.i | 118 | extra-y += systbl_chk.i |
diff --git a/arch/powerpc/kernel/align.c b/arch/powerpc/kernel/align.c index 5ffcfaa77d6a..a5b632e52fae 100644 --- a/arch/powerpc/kernel/align.c +++ b/arch/powerpc/kernel/align.c | |||
@@ -24,6 +24,7 @@ | |||
24 | #include <asm/system.h> | 24 | #include <asm/system.h> |
25 | #include <asm/cache.h> | 25 | #include <asm/cache.h> |
26 | #include <asm/cputable.h> | 26 | #include <asm/cputable.h> |
27 | #include <asm/emulated_ops.h> | ||
27 | 28 | ||
28 | struct aligninfo { | 29 | struct aligninfo { |
29 | unsigned char len; | 30 | unsigned char len; |
@@ -730,8 +731,10 @@ int fix_alignment(struct pt_regs *regs) | |||
730 | areg = dsisr & 0x1f; /* register to update */ | 731 | areg = dsisr & 0x1f; /* register to update */ |
731 | 732 | ||
732 | #ifdef CONFIG_SPE | 733 | #ifdef CONFIG_SPE |
733 | if ((instr >> 26) == 0x4) | 734 | if ((instr >> 26) == 0x4) { |
735 | PPC_WARN_EMULATED(spe); | ||
734 | return emulate_spe(regs, reg, instr); | 736 | return emulate_spe(regs, reg, instr); |
737 | } | ||
735 | #endif | 738 | #endif |
736 | 739 | ||
737 | instr = (dsisr >> 10) & 0x7f; | 740 | instr = (dsisr >> 10) & 0x7f; |
@@ -783,23 +786,28 @@ int fix_alignment(struct pt_regs *regs) | |||
783 | flags |= SPLT; | 786 | flags |= SPLT; |
784 | nb = 8; | 787 | nb = 8; |
785 | } | 788 | } |
789 | PPC_WARN_EMULATED(vsx); | ||
786 | return emulate_vsx(addr, reg, areg, regs, flags, nb); | 790 | return emulate_vsx(addr, reg, areg, regs, flags, nb); |
787 | } | 791 | } |
788 | #endif | 792 | #endif |
789 | /* A size of 0 indicates an instruction we don't support, with | 793 | /* A size of 0 indicates an instruction we don't support, with |
790 | * the exception of DCBZ which is handled as a special case here | 794 | * the exception of DCBZ which is handled as a special case here |
791 | */ | 795 | */ |
792 | if (instr == DCBZ) | 796 | if (instr == DCBZ) { |
797 | PPC_WARN_EMULATED(dcbz); | ||
793 | return emulate_dcbz(regs, addr); | 798 | return emulate_dcbz(regs, addr); |
799 | } | ||
794 | if (unlikely(nb == 0)) | 800 | if (unlikely(nb == 0)) |
795 | return 0; | 801 | return 0; |
796 | 802 | ||
797 | /* Load/Store Multiple instructions are handled in their own | 803 | /* Load/Store Multiple instructions are handled in their own |
798 | * function | 804 | * function |
799 | */ | 805 | */ |
800 | if (flags & M) | 806 | if (flags & M) { |
807 | PPC_WARN_EMULATED(multiple); | ||
801 | return emulate_multiple(regs, addr, reg, nb, | 808 | return emulate_multiple(regs, addr, reg, nb, |
802 | flags, instr, swiz); | 809 | flags, instr, swiz); |
810 | } | ||
803 | 811 | ||
804 | /* Verify the address of the operand */ | 812 | /* Verify the address of the operand */ |
805 | if (unlikely(user_mode(regs) && | 813 | if (unlikely(user_mode(regs) && |
@@ -816,8 +824,12 @@ int fix_alignment(struct pt_regs *regs) | |||
816 | } | 824 | } |
817 | 825 | ||
818 | /* Special case for 16-byte FP loads and stores */ | 826 | /* Special case for 16-byte FP loads and stores */ |
819 | if (nb == 16) | 827 | if (nb == 16) { |
828 | PPC_WARN_EMULATED(fp_pair); | ||
820 | return emulate_fp_pair(addr, reg, flags); | 829 | return emulate_fp_pair(addr, reg, flags); |
830 | } | ||
831 | |||
832 | PPC_WARN_EMULATED(unaligned); | ||
821 | 833 | ||
822 | /* If we are loading, get the data from user space, else | 834 | /* If we are loading, get the data from user space, else |
823 | * get it from register values | 835 | * get it from register values |
diff --git a/arch/powerpc/kernel/asm-offsets.c b/arch/powerpc/kernel/asm-offsets.c index e981d1ce1914..561b64652311 100644 --- a/arch/powerpc/kernel/asm-offsets.c +++ b/arch/powerpc/kernel/asm-offsets.c | |||
@@ -122,8 +122,6 @@ int main(void) | |||
122 | DEFINE(PACAKSAVE, offsetof(struct paca_struct, kstack)); | 122 | DEFINE(PACAKSAVE, offsetof(struct paca_struct, kstack)); |
123 | DEFINE(PACACURRENT, offsetof(struct paca_struct, __current)); | 123 | DEFINE(PACACURRENT, offsetof(struct paca_struct, __current)); |
124 | DEFINE(PACASAVEDMSR, offsetof(struct paca_struct, saved_msr)); | 124 | DEFINE(PACASAVEDMSR, offsetof(struct paca_struct, saved_msr)); |
125 | DEFINE(PACASTABREAL, offsetof(struct paca_struct, stab_real)); | ||
126 | DEFINE(PACASTABVIRT, offsetof(struct paca_struct, stab_addr)); | ||
127 | DEFINE(PACASTABRR, offsetof(struct paca_struct, stab_rr)); | 125 | DEFINE(PACASTABRR, offsetof(struct paca_struct, stab_rr)); |
128 | DEFINE(PACAR1, offsetof(struct paca_struct, saved_r1)); | 126 | DEFINE(PACAR1, offsetof(struct paca_struct, saved_r1)); |
129 | DEFINE(PACATOC, offsetof(struct paca_struct, kernel_toc)); | 127 | DEFINE(PACATOC, offsetof(struct paca_struct, kernel_toc)); |
@@ -132,35 +130,30 @@ int main(void) | |||
132 | DEFINE(PACASOFTIRQEN, offsetof(struct paca_struct, soft_enabled)); | 130 | DEFINE(PACASOFTIRQEN, offsetof(struct paca_struct, soft_enabled)); |
133 | DEFINE(PACAHARDIRQEN, offsetof(struct paca_struct, hard_enabled)); | 131 | DEFINE(PACAHARDIRQEN, offsetof(struct paca_struct, hard_enabled)); |
134 | DEFINE(PACAPERFPEND, offsetof(struct paca_struct, perf_counter_pending)); | 132 | DEFINE(PACAPERFPEND, offsetof(struct paca_struct, perf_counter_pending)); |
135 | DEFINE(PACASLBCACHE, offsetof(struct paca_struct, slb_cache)); | ||
136 | DEFINE(PACASLBCACHEPTR, offsetof(struct paca_struct, slb_cache_ptr)); | ||
137 | DEFINE(PACACONTEXTID, offsetof(struct paca_struct, context.id)); | 133 | DEFINE(PACACONTEXTID, offsetof(struct paca_struct, context.id)); |
138 | DEFINE(PACAVMALLOCSLLP, offsetof(struct paca_struct, vmalloc_sllp)); | ||
139 | #ifdef CONFIG_PPC_MM_SLICES | 134 | #ifdef CONFIG_PPC_MM_SLICES |
140 | DEFINE(PACALOWSLICESPSIZE, offsetof(struct paca_struct, | 135 | DEFINE(PACALOWSLICESPSIZE, offsetof(struct paca_struct, |
141 | context.low_slices_psize)); | 136 | context.low_slices_psize)); |
142 | DEFINE(PACAHIGHSLICEPSIZE, offsetof(struct paca_struct, | 137 | DEFINE(PACAHIGHSLICEPSIZE, offsetof(struct paca_struct, |
143 | context.high_slices_psize)); | 138 | context.high_slices_psize)); |
144 | DEFINE(MMUPSIZEDEFSIZE, sizeof(struct mmu_psize_def)); | 139 | DEFINE(MMUPSIZEDEFSIZE, sizeof(struct mmu_psize_def)); |
140 | #endif /* CONFIG_PPC_MM_SLICES */ | ||
141 | #ifdef CONFIG_PPC_STD_MMU_64 | ||
142 | DEFINE(PACASTABREAL, offsetof(struct paca_struct, stab_real)); | ||
143 | DEFINE(PACASTABVIRT, offsetof(struct paca_struct, stab_addr)); | ||
144 | DEFINE(PACASLBCACHE, offsetof(struct paca_struct, slb_cache)); | ||
145 | DEFINE(PACASLBCACHEPTR, offsetof(struct paca_struct, slb_cache_ptr)); | ||
146 | DEFINE(PACAVMALLOCSLLP, offsetof(struct paca_struct, vmalloc_sllp)); | ||
147 | #ifdef CONFIG_PPC_MM_SLICES | ||
145 | DEFINE(MMUPSIZESLLP, offsetof(struct mmu_psize_def, sllp)); | 148 | DEFINE(MMUPSIZESLLP, offsetof(struct mmu_psize_def, sllp)); |
146 | #else | 149 | #else |
147 | DEFINE(PACACONTEXTSLLP, offsetof(struct paca_struct, context.sllp)); | 150 | DEFINE(PACACONTEXTSLLP, offsetof(struct paca_struct, context.sllp)); |
148 | |||
149 | #endif /* CONFIG_PPC_MM_SLICES */ | 151 | #endif /* CONFIG_PPC_MM_SLICES */ |
150 | DEFINE(PACA_EXGEN, offsetof(struct paca_struct, exgen)); | 152 | DEFINE(PACA_EXGEN, offsetof(struct paca_struct, exgen)); |
151 | DEFINE(PACA_EXMC, offsetof(struct paca_struct, exmc)); | 153 | DEFINE(PACA_EXMC, offsetof(struct paca_struct, exmc)); |
152 | DEFINE(PACA_EXSLB, offsetof(struct paca_struct, exslb)); | 154 | DEFINE(PACA_EXSLB, offsetof(struct paca_struct, exslb)); |
153 | DEFINE(PACAEMERGSP, offsetof(struct paca_struct, emergency_sp)); | ||
154 | DEFINE(PACALPPACAPTR, offsetof(struct paca_struct, lppaca_ptr)); | 155 | DEFINE(PACALPPACAPTR, offsetof(struct paca_struct, lppaca_ptr)); |
155 | DEFINE(PACAHWCPUID, offsetof(struct paca_struct, hw_cpu_id)); | ||
156 | DEFINE(PACA_STARTPURR, offsetof(struct paca_struct, startpurr)); | ||
157 | DEFINE(PACA_STARTSPURR, offsetof(struct paca_struct, startspurr)); | ||
158 | DEFINE(PACA_USER_TIME, offsetof(struct paca_struct, user_time)); | ||
159 | DEFINE(PACA_SYSTEM_TIME, offsetof(struct paca_struct, system_time)); | ||
160 | DEFINE(PACA_SLBSHADOWPTR, offsetof(struct paca_struct, slb_shadow_ptr)); | 156 | DEFINE(PACA_SLBSHADOWPTR, offsetof(struct paca_struct, slb_shadow_ptr)); |
161 | DEFINE(PACA_DATA_OFFSET, offsetof(struct paca_struct, data_offset)); | ||
162 | DEFINE(PACA_TRAP_SAVE, offsetof(struct paca_struct, trap_save)); | ||
163 | |||
164 | DEFINE(SLBSHADOW_STACKVSID, | 157 | DEFINE(SLBSHADOW_STACKVSID, |
165 | offsetof(struct slb_shadow, save_area[SLB_NUM_BOLTED - 1].vsid)); | 158 | offsetof(struct slb_shadow, save_area[SLB_NUM_BOLTED - 1].vsid)); |
166 | DEFINE(SLBSHADOW_STACKESID, | 159 | DEFINE(SLBSHADOW_STACKESID, |
@@ -170,6 +163,15 @@ int main(void) | |||
170 | DEFINE(LPPACAANYINT, offsetof(struct lppaca, int_dword.any_int)); | 163 | DEFINE(LPPACAANYINT, offsetof(struct lppaca, int_dword.any_int)); |
171 | DEFINE(LPPACADECRINT, offsetof(struct lppaca, int_dword.fields.decr_int)); | 164 | DEFINE(LPPACADECRINT, offsetof(struct lppaca, int_dword.fields.decr_int)); |
172 | DEFINE(SLBSHADOW_SAVEAREA, offsetof(struct slb_shadow, save_area)); | 165 | DEFINE(SLBSHADOW_SAVEAREA, offsetof(struct slb_shadow, save_area)); |
166 | #endif /* CONFIG_PPC_STD_MMU_64 */ | ||
167 | DEFINE(PACAEMERGSP, offsetof(struct paca_struct, emergency_sp)); | ||
168 | DEFINE(PACAHWCPUID, offsetof(struct paca_struct, hw_cpu_id)); | ||
169 | DEFINE(PACA_STARTPURR, offsetof(struct paca_struct, startpurr)); | ||
170 | DEFINE(PACA_STARTSPURR, offsetof(struct paca_struct, startspurr)); | ||
171 | DEFINE(PACA_USER_TIME, offsetof(struct paca_struct, user_time)); | ||
172 | DEFINE(PACA_SYSTEM_TIME, offsetof(struct paca_struct, system_time)); | ||
173 | DEFINE(PACA_DATA_OFFSET, offsetof(struct paca_struct, data_offset)); | ||
174 | DEFINE(PACA_TRAP_SAVE, offsetof(struct paca_struct, trap_save)); | ||
173 | #endif /* CONFIG_PPC64 */ | 175 | #endif /* CONFIG_PPC64 */ |
174 | 176 | ||
175 | /* RTAS */ | 177 | /* RTAS */ |
diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c index 3e33fb933d99..4a24a2fc4574 100644 --- a/arch/powerpc/kernel/cputable.c +++ b/arch/powerpc/kernel/cputable.c | |||
@@ -427,7 +427,8 @@ static struct cpu_spec __initdata cpu_specs[] = { | |||
427 | .cpu_name = "POWER7 (architected)", | 427 | .cpu_name = "POWER7 (architected)", |
428 | .cpu_features = CPU_FTRS_POWER7, | 428 | .cpu_features = CPU_FTRS_POWER7, |
429 | .cpu_user_features = COMMON_USER_POWER7, | 429 | .cpu_user_features = COMMON_USER_POWER7, |
430 | .mmu_features = MMU_FTR_HPTE_TABLE, | 430 | .mmu_features = MMU_FTR_HPTE_TABLE | |
431 | MMU_FTR_TLBIE_206, | ||
431 | .icache_bsize = 128, | 432 | .icache_bsize = 128, |
432 | .dcache_bsize = 128, | 433 | .dcache_bsize = 128, |
433 | .machine_check = machine_check_generic, | 434 | .machine_check = machine_check_generic, |
@@ -441,7 +442,8 @@ static struct cpu_spec __initdata cpu_specs[] = { | |||
441 | .cpu_name = "POWER7 (raw)", | 442 | .cpu_name = "POWER7 (raw)", |
442 | .cpu_features = CPU_FTRS_POWER7, | 443 | .cpu_features = CPU_FTRS_POWER7, |
443 | .cpu_user_features = COMMON_USER_POWER7, | 444 | .cpu_user_features = COMMON_USER_POWER7, |
444 | .mmu_features = MMU_FTR_HPTE_TABLE, | 445 | .mmu_features = MMU_FTR_HPTE_TABLE | |
446 | MMU_FTR_TLBIE_206, | ||
445 | .icache_bsize = 128, | 447 | .icache_bsize = 128, |
446 | .dcache_bsize = 128, | 448 | .dcache_bsize = 128, |
447 | .num_pmcs = 6, | 449 | .num_pmcs = 6, |
diff --git a/arch/powerpc/kernel/dma-swiotlb.c b/arch/powerpc/kernel/dma-swiotlb.c new file mode 100644 index 000000000000..68ccf11e4f19 --- /dev/null +++ b/arch/powerpc/kernel/dma-swiotlb.c | |||
@@ -0,0 +1,163 @@ | |||
1 | /* | ||
2 | * Contains routines needed to support swiotlb for ppc. | ||
3 | * | ||
4 | * Copyright (C) 2009 Becky Bruce, Freescale Semiconductor | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify it | ||
7 | * under the terms of the GNU General Public License as published by the | ||
8 | * Free Software Foundation; either version 2 of the License, or (at your | ||
9 | * option) any later version. | ||
10 | * | ||
11 | */ | ||
12 | |||
13 | #include <linux/dma-mapping.h> | ||
14 | #include <linux/pfn.h> | ||
15 | #include <linux/of_platform.h> | ||
16 | #include <linux/platform_device.h> | ||
17 | #include <linux/pci.h> | ||
18 | |||
19 | #include <asm/machdep.h> | ||
20 | #include <asm/swiotlb.h> | ||
21 | #include <asm/dma.h> | ||
22 | #include <asm/abs_addr.h> | ||
23 | |||
24 | int swiotlb __read_mostly; | ||
25 | unsigned int ppc_swiotlb_enable; | ||
26 | |||
27 | void *swiotlb_bus_to_virt(struct device *hwdev, dma_addr_t addr) | ||
28 | { | ||
29 | unsigned long pfn = PFN_DOWN(swiotlb_bus_to_phys(hwdev, addr)); | ||
30 | void *pageaddr = page_address(pfn_to_page(pfn)); | ||
31 | |||
32 | if (pageaddr != NULL) | ||
33 | return pageaddr + (addr % PAGE_SIZE); | ||
34 | return NULL; | ||
35 | } | ||
36 | |||
37 | dma_addr_t swiotlb_phys_to_bus(struct device *hwdev, phys_addr_t paddr) | ||
38 | { | ||
39 | return paddr + get_dma_direct_offset(hwdev); | ||
40 | } | ||
41 | |||
42 | phys_addr_t swiotlb_bus_to_phys(struct device *hwdev, dma_addr_t baddr) | ||
43 | |||
44 | { | ||
45 | return baddr - get_dma_direct_offset(hwdev); | ||
46 | } | ||
47 | |||
48 | /* | ||
49 | * Determine if an address needs bounce buffering via swiotlb. | ||
50 | * Going forward I expect the swiotlb code to generalize on using | ||
51 | * a dma_ops->addr_needs_map, and this function will move from here to the | ||
52 | * generic swiotlb code. | ||
53 | */ | ||
54 | int | ||
55 | swiotlb_arch_address_needs_mapping(struct device *hwdev, dma_addr_t addr, | ||
56 | size_t size) | ||
57 | { | ||
58 | struct dma_mapping_ops *dma_ops = get_dma_ops(hwdev); | ||
59 | |||
60 | BUG_ON(!dma_ops); | ||
61 | return dma_ops->addr_needs_map(hwdev, addr, size); | ||
62 | } | ||
63 | |||
64 | /* | ||
65 | * Determine if an address is reachable by a pci device, or if we must bounce. | ||
66 | */ | ||
67 | static int | ||
68 | swiotlb_pci_addr_needs_map(struct device *hwdev, dma_addr_t addr, size_t size) | ||
69 | { | ||
70 | u64 mask = dma_get_mask(hwdev); | ||
71 | dma_addr_t max; | ||
72 | struct pci_controller *hose; | ||
73 | struct pci_dev *pdev = to_pci_dev(hwdev); | ||
74 | |||
75 | hose = pci_bus_to_host(pdev->bus); | ||
76 | max = hose->dma_window_base_cur + hose->dma_window_size; | ||
77 | |||
78 | /* check that we're within mapped pci window space */ | ||
79 | if ((addr + size > max) | (addr < hose->dma_window_base_cur)) | ||
80 | return 1; | ||
81 | |||
82 | return !is_buffer_dma_capable(mask, addr, size); | ||
83 | } | ||
84 | |||
85 | static int | ||
86 | swiotlb_addr_needs_map(struct device *hwdev, dma_addr_t addr, size_t size) | ||
87 | { | ||
88 | return !is_buffer_dma_capable(dma_get_mask(hwdev), addr, size); | ||
89 | } | ||
90 | |||
91 | |||
92 | /* | ||
93 | * At the moment, all platforms that use this code only require | ||
94 | * swiotlb to be used if we're operating on HIGHMEM. Since | ||
95 | * we don't ever call anything other than map_sg, unmap_sg, | ||
96 | * map_page, and unmap_page on highmem, use normal dma_ops | ||
97 | * for everything else. | ||
98 | */ | ||
99 | struct dma_mapping_ops swiotlb_dma_ops = { | ||
100 | .alloc_coherent = dma_direct_alloc_coherent, | ||
101 | .free_coherent = dma_direct_free_coherent, | ||
102 | .map_sg = swiotlb_map_sg_attrs, | ||
103 | .unmap_sg = swiotlb_unmap_sg_attrs, | ||
104 | .dma_supported = swiotlb_dma_supported, | ||
105 | .map_page = swiotlb_map_page, | ||
106 | .unmap_page = swiotlb_unmap_page, | ||
107 | .addr_needs_map = swiotlb_addr_needs_map, | ||
108 | .sync_single_range_for_cpu = swiotlb_sync_single_range_for_cpu, | ||
109 | .sync_single_range_for_device = swiotlb_sync_single_range_for_device, | ||
110 | .sync_sg_for_cpu = swiotlb_sync_sg_for_cpu, | ||
111 | .sync_sg_for_device = swiotlb_sync_sg_for_device | ||
112 | }; | ||
113 | |||
114 | struct dma_mapping_ops swiotlb_pci_dma_ops = { | ||
115 | .alloc_coherent = dma_direct_alloc_coherent, | ||
116 | .free_coherent = dma_direct_free_coherent, | ||
117 | .map_sg = swiotlb_map_sg_attrs, | ||
118 | .unmap_sg = swiotlb_unmap_sg_attrs, | ||
119 | .dma_supported = swiotlb_dma_supported, | ||
120 | .map_page = swiotlb_map_page, | ||
121 | .unmap_page = swiotlb_unmap_page, | ||
122 | .addr_needs_map = swiotlb_pci_addr_needs_map, | ||
123 | .sync_single_range_for_cpu = swiotlb_sync_single_range_for_cpu, | ||
124 | .sync_single_range_for_device = swiotlb_sync_single_range_for_device, | ||
125 | .sync_sg_for_cpu = swiotlb_sync_sg_for_cpu, | ||
126 | .sync_sg_for_device = swiotlb_sync_sg_for_device | ||
127 | }; | ||
128 | |||
129 | static int ppc_swiotlb_bus_notify(struct notifier_block *nb, | ||
130 | unsigned long action, void *data) | ||
131 | { | ||
132 | struct device *dev = data; | ||
133 | |||
134 | /* We are only intereted in device addition */ | ||
135 | if (action != BUS_NOTIFY_ADD_DEVICE) | ||
136 | return 0; | ||
137 | |||
138 | /* May need to bounce if the device can't address all of DRAM */ | ||
139 | if (dma_get_mask(dev) < lmb_end_of_DRAM()) | ||
140 | set_dma_ops(dev, &swiotlb_dma_ops); | ||
141 | |||
142 | return NOTIFY_DONE; | ||
143 | } | ||
144 | |||
145 | static struct notifier_block ppc_swiotlb_plat_bus_notifier = { | ||
146 | .notifier_call = ppc_swiotlb_bus_notify, | ||
147 | .priority = 0, | ||
148 | }; | ||
149 | |||
150 | static struct notifier_block ppc_swiotlb_of_bus_notifier = { | ||
151 | .notifier_call = ppc_swiotlb_bus_notify, | ||
152 | .priority = 0, | ||
153 | }; | ||
154 | |||
155 | int __init swiotlb_setup_bus_notifier(void) | ||
156 | { | ||
157 | bus_register_notifier(&platform_bus_type, | ||
158 | &ppc_swiotlb_plat_bus_notifier); | ||
159 | bus_register_notifier(&of_platform_bus_type, | ||
160 | &ppc_swiotlb_of_bus_notifier); | ||
161 | |||
162 | return 0; | ||
163 | } | ||
diff --git a/arch/powerpc/kernel/dma.c b/arch/powerpc/kernel/dma.c index 6b02793dc75b..20a60d661ba8 100644 --- a/arch/powerpc/kernel/dma.c +++ b/arch/powerpc/kernel/dma.c | |||
@@ -19,7 +19,7 @@ | |||
19 | * default the offset is PCI_DRAM_OFFSET. | 19 | * default the offset is PCI_DRAM_OFFSET. |
20 | */ | 20 | */ |
21 | 21 | ||
22 | static unsigned long get_dma_direct_offset(struct device *dev) | 22 | unsigned long get_dma_direct_offset(struct device *dev) |
23 | { | 23 | { |
24 | if (dev) | 24 | if (dev) |
25 | return (unsigned long)dev->archdata.dma_data; | 25 | return (unsigned long)dev->archdata.dma_data; |
diff --git a/arch/powerpc/kernel/exceptions-64s.S b/arch/powerpc/kernel/exceptions-64s.S new file mode 100644 index 000000000000..eb898112e577 --- /dev/null +++ b/arch/powerpc/kernel/exceptions-64s.S | |||
@@ -0,0 +1,978 @@ | |||
1 | /* | ||
2 | * This file contains the 64-bit "server" PowerPC variant | ||
3 | * of the low level exception handling including exception | ||
4 | * vectors, exception return, part of the slb and stab | ||
5 | * handling and other fixed offset specific things. | ||
6 | * | ||
7 | * This file is meant to be #included from head_64.S due to | ||
8 | * position dependant assembly. | ||
9 | * | ||
10 | * Most of this originates from head_64.S and thus has the same | ||
11 | * copyright history. | ||
12 | * | ||
13 | */ | ||
14 | |||
15 | /* | ||
16 | * We layout physical memory as follows: | ||
17 | * 0x0000 - 0x00ff : Secondary processor spin code | ||
18 | * 0x0100 - 0x2fff : pSeries Interrupt prologs | ||
19 | * 0x3000 - 0x5fff : interrupt support, iSeries and common interrupt prologs | ||
20 | * 0x6000 - 0x6fff : Initial (CPU0) segment table | ||
21 | * 0x7000 - 0x7fff : FWNMI data area | ||
22 | * 0x8000 - : Early init and support code | ||
23 | */ | ||
24 | |||
25 | |||
26 | /* | ||
27 | * SPRG Usage | ||
28 | * | ||
29 | * Register Definition | ||
30 | * | ||
31 | * SPRG0 reserved for hypervisor | ||
32 | * SPRG1 temp - used to save gpr | ||
33 | * SPRG2 temp - used to save gpr | ||
34 | * SPRG3 virt addr of paca | ||
35 | */ | ||
36 | |||
37 | /* | ||
38 | * This is the start of the interrupt handlers for pSeries | ||
39 | * This code runs with relocation off. | ||
40 | * Code from here to __end_interrupts gets copied down to real | ||
41 | * address 0x100 when we are running a relocatable kernel. | ||
42 | * Therefore any relative branches in this section must only | ||
43 | * branch to labels in this section. | ||
44 | */ | ||
45 | . = 0x100 | ||
46 | .globl __start_interrupts | ||
47 | __start_interrupts: | ||
48 | |||
49 | STD_EXCEPTION_PSERIES(0x100, system_reset) | ||
50 | |||
51 | . = 0x200 | ||
52 | _machine_check_pSeries: | ||
53 | HMT_MEDIUM | ||
54 | mtspr SPRN_SPRG1,r13 /* save r13 */ | ||
55 | EXCEPTION_PROLOG_PSERIES(PACA_EXMC, machine_check_common) | ||
56 | |||
57 | . = 0x300 | ||
58 | .globl data_access_pSeries | ||
59 | data_access_pSeries: | ||
60 | HMT_MEDIUM | ||
61 | mtspr SPRN_SPRG1,r13 | ||
62 | BEGIN_FTR_SECTION | ||
63 | mtspr SPRN_SPRG2,r12 | ||
64 | mfspr r13,SPRN_DAR | ||
65 | mfspr r12,SPRN_DSISR | ||
66 | srdi r13,r13,60 | ||
67 | rlwimi r13,r12,16,0x20 | ||
68 | mfcr r12 | ||
69 | cmpwi r13,0x2c | ||
70 | beq do_stab_bolted_pSeries | ||
71 | mtcrf 0x80,r12 | ||
72 | mfspr r12,SPRN_SPRG2 | ||
73 | END_FTR_SECTION_IFCLR(CPU_FTR_SLB) | ||
74 | EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, data_access_common) | ||
75 | |||
76 | . = 0x380 | ||
77 | .globl data_access_slb_pSeries | ||
78 | data_access_slb_pSeries: | ||
79 | HMT_MEDIUM | ||
80 | mtspr SPRN_SPRG1,r13 | ||
81 | mfspr r13,SPRN_SPRG3 /* get paca address into r13 */ | ||
82 | std r3,PACA_EXSLB+EX_R3(r13) | ||
83 | mfspr r3,SPRN_DAR | ||
84 | std r9,PACA_EXSLB+EX_R9(r13) /* save r9 - r12 */ | ||
85 | mfcr r9 | ||
86 | #ifdef __DISABLED__ | ||
87 | /* Keep that around for when we re-implement dynamic VSIDs */ | ||
88 | cmpdi r3,0 | ||
89 | bge slb_miss_user_pseries | ||
90 | #endif /* __DISABLED__ */ | ||
91 | std r10,PACA_EXSLB+EX_R10(r13) | ||
92 | std r11,PACA_EXSLB+EX_R11(r13) | ||
93 | std r12,PACA_EXSLB+EX_R12(r13) | ||
94 | mfspr r10,SPRN_SPRG1 | ||
95 | std r10,PACA_EXSLB+EX_R13(r13) | ||
96 | mfspr r12,SPRN_SRR1 /* and SRR1 */ | ||
97 | #ifndef CONFIG_RELOCATABLE | ||
98 | b .slb_miss_realmode | ||
99 | #else | ||
100 | /* | ||
101 | * We can't just use a direct branch to .slb_miss_realmode | ||
102 | * because the distance from here to there depends on where | ||
103 | * the kernel ends up being put. | ||
104 | */ | ||
105 | mfctr r11 | ||
106 | ld r10,PACAKBASE(r13) | ||
107 | LOAD_HANDLER(r10, .slb_miss_realmode) | ||
108 | mtctr r10 | ||
109 | bctr | ||
110 | #endif | ||
111 | |||
112 | STD_EXCEPTION_PSERIES(0x400, instruction_access) | ||
113 | |||
114 | . = 0x480 | ||
115 | .globl instruction_access_slb_pSeries | ||
116 | instruction_access_slb_pSeries: | ||
117 | HMT_MEDIUM | ||
118 | mtspr SPRN_SPRG1,r13 | ||
119 | mfspr r13,SPRN_SPRG3 /* get paca address into r13 */ | ||
120 | std r3,PACA_EXSLB+EX_R3(r13) | ||
121 | mfspr r3,SPRN_SRR0 /* SRR0 is faulting address */ | ||
122 | std r9,PACA_EXSLB+EX_R9(r13) /* save r9 - r12 */ | ||
123 | mfcr r9 | ||
124 | #ifdef __DISABLED__ | ||
125 | /* Keep that around for when we re-implement dynamic VSIDs */ | ||
126 | cmpdi r3,0 | ||
127 | bge slb_miss_user_pseries | ||
128 | #endif /* __DISABLED__ */ | ||
129 | std r10,PACA_EXSLB+EX_R10(r13) | ||
130 | std r11,PACA_EXSLB+EX_R11(r13) | ||
131 | std r12,PACA_EXSLB+EX_R12(r13) | ||
132 | mfspr r10,SPRN_SPRG1 | ||
133 | std r10,PACA_EXSLB+EX_R13(r13) | ||
134 | mfspr r12,SPRN_SRR1 /* and SRR1 */ | ||
135 | #ifndef CONFIG_RELOCATABLE | ||
136 | b .slb_miss_realmode | ||
137 | #else | ||
138 | mfctr r11 | ||
139 | ld r10,PACAKBASE(r13) | ||
140 | LOAD_HANDLER(r10, .slb_miss_realmode) | ||
141 | mtctr r10 | ||
142 | bctr | ||
143 | #endif | ||
144 | |||
145 | MASKABLE_EXCEPTION_PSERIES(0x500, hardware_interrupt) | ||
146 | STD_EXCEPTION_PSERIES(0x600, alignment) | ||
147 | STD_EXCEPTION_PSERIES(0x700, program_check) | ||
148 | STD_EXCEPTION_PSERIES(0x800, fp_unavailable) | ||
149 | MASKABLE_EXCEPTION_PSERIES(0x900, decrementer) | ||
150 | STD_EXCEPTION_PSERIES(0xa00, trap_0a) | ||
151 | STD_EXCEPTION_PSERIES(0xb00, trap_0b) | ||
152 | |||
153 | . = 0xc00 | ||
154 | .globl system_call_pSeries | ||
155 | system_call_pSeries: | ||
156 | HMT_MEDIUM | ||
157 | BEGIN_FTR_SECTION | ||
158 | cmpdi r0,0x1ebe | ||
159 | beq- 1f | ||
160 | END_FTR_SECTION_IFSET(CPU_FTR_REAL_LE) | ||
161 | mr r9,r13 | ||
162 | mfspr r13,SPRN_SPRG3 | ||
163 | mfspr r11,SPRN_SRR0 | ||
164 | ld r12,PACAKBASE(r13) | ||
165 | ld r10,PACAKMSR(r13) | ||
166 | LOAD_HANDLER(r12, system_call_entry) | ||
167 | mtspr SPRN_SRR0,r12 | ||
168 | mfspr r12,SPRN_SRR1 | ||
169 | mtspr SPRN_SRR1,r10 | ||
170 | rfid | ||
171 | b . /* prevent speculative execution */ | ||
172 | |||
173 | /* Fast LE/BE switch system call */ | ||
174 | 1: mfspr r12,SPRN_SRR1 | ||
175 | xori r12,r12,MSR_LE | ||
176 | mtspr SPRN_SRR1,r12 | ||
177 | rfid /* return to userspace */ | ||
178 | b . | ||
179 | |||
180 | STD_EXCEPTION_PSERIES(0xd00, single_step) | ||
181 | STD_EXCEPTION_PSERIES(0xe00, trap_0e) | ||
182 | |||
183 | /* We need to deal with the Altivec unavailable exception | ||
184 | * here which is at 0xf20, thus in the middle of the | ||
185 | * prolog code of the PerformanceMonitor one. A little | ||
186 | * trickery is thus necessary | ||
187 | */ | ||
188 | . = 0xf00 | ||
189 | b performance_monitor_pSeries | ||
190 | |||
191 | . = 0xf20 | ||
192 | b altivec_unavailable_pSeries | ||
193 | |||
194 | . = 0xf40 | ||
195 | b vsx_unavailable_pSeries | ||
196 | |||
197 | #ifdef CONFIG_CBE_RAS | ||
198 | HSTD_EXCEPTION_PSERIES(0x1200, cbe_system_error) | ||
199 | #endif /* CONFIG_CBE_RAS */ | ||
200 | STD_EXCEPTION_PSERIES(0x1300, instruction_breakpoint) | ||
201 | #ifdef CONFIG_CBE_RAS | ||
202 | HSTD_EXCEPTION_PSERIES(0x1600, cbe_maintenance) | ||
203 | #endif /* CONFIG_CBE_RAS */ | ||
204 | STD_EXCEPTION_PSERIES(0x1700, altivec_assist) | ||
205 | #ifdef CONFIG_CBE_RAS | ||
206 | HSTD_EXCEPTION_PSERIES(0x1800, cbe_thermal) | ||
207 | #endif /* CONFIG_CBE_RAS */ | ||
208 | |||
209 | . = 0x3000 | ||
210 | |||
211 | /*** pSeries interrupt support ***/ | ||
212 | |||
213 | /* moved from 0xf00 */ | ||
214 | STD_EXCEPTION_PSERIES(., performance_monitor) | ||
215 | STD_EXCEPTION_PSERIES(., altivec_unavailable) | ||
216 | STD_EXCEPTION_PSERIES(., vsx_unavailable) | ||
217 | |||
218 | /* | ||
219 | * An interrupt came in while soft-disabled; clear EE in SRR1, | ||
220 | * clear paca->hard_enabled and return. | ||
221 | */ | ||
222 | masked_interrupt: | ||
223 | stb r10,PACAHARDIRQEN(r13) | ||
224 | mtcrf 0x80,r9 | ||
225 | ld r9,PACA_EXGEN+EX_R9(r13) | ||
226 | mfspr r10,SPRN_SRR1 | ||
227 | rldicl r10,r10,48,1 /* clear MSR_EE */ | ||
228 | rotldi r10,r10,16 | ||
229 | mtspr SPRN_SRR1,r10 | ||
230 | ld r10,PACA_EXGEN+EX_R10(r13) | ||
231 | mfspr r13,SPRN_SPRG1 | ||
232 | rfid | ||
233 | b . | ||
234 | |||
235 | .align 7 | ||
236 | do_stab_bolted_pSeries: | ||
237 | mtcrf 0x80,r12 | ||
238 | mfspr r12,SPRN_SPRG2 | ||
239 | EXCEPTION_PROLOG_PSERIES(PACA_EXSLB, .do_stab_bolted) | ||
240 | |||
241 | #ifdef CONFIG_PPC_PSERIES | ||
242 | /* | ||
243 | * Vectors for the FWNMI option. Share common code. | ||
244 | */ | ||
245 | .globl system_reset_fwnmi | ||
246 | .align 7 | ||
247 | system_reset_fwnmi: | ||
248 | HMT_MEDIUM | ||
249 | mtspr SPRN_SPRG1,r13 /* save r13 */ | ||
250 | EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, system_reset_common) | ||
251 | |||
252 | .globl machine_check_fwnmi | ||
253 | .align 7 | ||
254 | machine_check_fwnmi: | ||
255 | HMT_MEDIUM | ||
256 | mtspr SPRN_SPRG1,r13 /* save r13 */ | ||
257 | EXCEPTION_PROLOG_PSERIES(PACA_EXMC, machine_check_common) | ||
258 | |||
259 | #endif /* CONFIG_PPC_PSERIES */ | ||
260 | |||
261 | #ifdef __DISABLED__ | ||
262 | /* | ||
263 | * This is used for when the SLB miss handler has to go virtual, | ||
264 | * which doesn't happen for now anymore but will once we re-implement | ||
265 | * dynamic VSIDs for shared page tables | ||
266 | */ | ||
267 | slb_miss_user_pseries: | ||
268 | std r10,PACA_EXGEN+EX_R10(r13) | ||
269 | std r11,PACA_EXGEN+EX_R11(r13) | ||
270 | std r12,PACA_EXGEN+EX_R12(r13) | ||
271 | mfspr r10,SPRG1 | ||
272 | ld r11,PACA_EXSLB+EX_R9(r13) | ||
273 | ld r12,PACA_EXSLB+EX_R3(r13) | ||
274 | std r10,PACA_EXGEN+EX_R13(r13) | ||
275 | std r11,PACA_EXGEN+EX_R9(r13) | ||
276 | std r12,PACA_EXGEN+EX_R3(r13) | ||
277 | clrrdi r12,r13,32 | ||
278 | mfmsr r10 | ||
279 | mfspr r11,SRR0 /* save SRR0 */ | ||
280 | ori r12,r12,slb_miss_user_common@l /* virt addr of handler */ | ||
281 | ori r10,r10,MSR_IR|MSR_DR|MSR_RI | ||
282 | mtspr SRR0,r12 | ||
283 | mfspr r12,SRR1 /* and SRR1 */ | ||
284 | mtspr SRR1,r10 | ||
285 | rfid | ||
286 | b . /* prevent spec. execution */ | ||
287 | #endif /* __DISABLED__ */ | ||
288 | |||
289 | .align 7 | ||
290 | .globl __end_interrupts | ||
291 | __end_interrupts: | ||
292 | |||
293 | /* | ||
294 | * Code from here down to __end_handlers is invoked from the | ||
295 | * exception prologs above. Because the prologs assemble the | ||
296 | * addresses of these handlers using the LOAD_HANDLER macro, | ||
297 | * which uses an addi instruction, these handlers must be in | ||
298 | * the first 32k of the kernel image. | ||
299 | */ | ||
300 | |||
301 | /*** Common interrupt handlers ***/ | ||
302 | |||
303 | STD_EXCEPTION_COMMON(0x100, system_reset, .system_reset_exception) | ||
304 | |||
305 | /* | ||
306 | * Machine check is different because we use a different | ||
307 | * save area: PACA_EXMC instead of PACA_EXGEN. | ||
308 | */ | ||
309 | .align 7 | ||
310 | .globl machine_check_common | ||
311 | machine_check_common: | ||
312 | EXCEPTION_PROLOG_COMMON(0x200, PACA_EXMC) | ||
313 | FINISH_NAP | ||
314 | DISABLE_INTS | ||
315 | bl .save_nvgprs | ||
316 | addi r3,r1,STACK_FRAME_OVERHEAD | ||
317 | bl .machine_check_exception | ||
318 | b .ret_from_except | ||
319 | |||
320 | STD_EXCEPTION_COMMON_LITE(0x900, decrementer, .timer_interrupt) | ||
321 | STD_EXCEPTION_COMMON(0xa00, trap_0a, .unknown_exception) | ||
322 | STD_EXCEPTION_COMMON(0xb00, trap_0b, .unknown_exception) | ||
323 | STD_EXCEPTION_COMMON(0xd00, single_step, .single_step_exception) | ||
324 | STD_EXCEPTION_COMMON(0xe00, trap_0e, .unknown_exception) | ||
325 | STD_EXCEPTION_COMMON_IDLE(0xf00, performance_monitor, .performance_monitor_exception) | ||
326 | STD_EXCEPTION_COMMON(0x1300, instruction_breakpoint, .instruction_breakpoint_exception) | ||
327 | #ifdef CONFIG_ALTIVEC | ||
328 | STD_EXCEPTION_COMMON(0x1700, altivec_assist, .altivec_assist_exception) | ||
329 | #else | ||
330 | STD_EXCEPTION_COMMON(0x1700, altivec_assist, .unknown_exception) | ||
331 | #endif | ||
332 | #ifdef CONFIG_CBE_RAS | ||
333 | STD_EXCEPTION_COMMON(0x1200, cbe_system_error, .cbe_system_error_exception) | ||
334 | STD_EXCEPTION_COMMON(0x1600, cbe_maintenance, .cbe_maintenance_exception) | ||
335 | STD_EXCEPTION_COMMON(0x1800, cbe_thermal, .cbe_thermal_exception) | ||
336 | #endif /* CONFIG_CBE_RAS */ | ||
337 | |||
338 | .align 7 | ||
339 | system_call_entry: | ||
340 | b system_call_common | ||
341 | |||
342 | /* | ||
343 | * Here we have detected that the kernel stack pointer is bad. | ||
344 | * R9 contains the saved CR, r13 points to the paca, | ||
345 | * r10 contains the (bad) kernel stack pointer, | ||
346 | * r11 and r12 contain the saved SRR0 and SRR1. | ||
347 | * We switch to using an emergency stack, save the registers there, | ||
348 | * and call kernel_bad_stack(), which panics. | ||
349 | */ | ||
350 | bad_stack: | ||
351 | ld r1,PACAEMERGSP(r13) | ||
352 | subi r1,r1,64+INT_FRAME_SIZE | ||
353 | std r9,_CCR(r1) | ||
354 | std r10,GPR1(r1) | ||
355 | std r11,_NIP(r1) | ||
356 | std r12,_MSR(r1) | ||
357 | mfspr r11,SPRN_DAR | ||
358 | mfspr r12,SPRN_DSISR | ||
359 | std r11,_DAR(r1) | ||
360 | std r12,_DSISR(r1) | ||
361 | mflr r10 | ||
362 | mfctr r11 | ||
363 | mfxer r12 | ||
364 | std r10,_LINK(r1) | ||
365 | std r11,_CTR(r1) | ||
366 | std r12,_XER(r1) | ||
367 | SAVE_GPR(0,r1) | ||
368 | SAVE_GPR(2,r1) | ||
369 | SAVE_4GPRS(3,r1) | ||
370 | SAVE_2GPRS(7,r1) | ||
371 | SAVE_10GPRS(12,r1) | ||
372 | SAVE_10GPRS(22,r1) | ||
373 | lhz r12,PACA_TRAP_SAVE(r13) | ||
374 | std r12,_TRAP(r1) | ||
375 | addi r11,r1,INT_FRAME_SIZE | ||
376 | std r11,0(r1) | ||
377 | li r12,0 | ||
378 | std r12,0(r11) | ||
379 | ld r2,PACATOC(r13) | ||
380 | 1: addi r3,r1,STACK_FRAME_OVERHEAD | ||
381 | bl .kernel_bad_stack | ||
382 | b 1b | ||
383 | |||
384 | /* | ||
385 | * Here r13 points to the paca, r9 contains the saved CR, | ||
386 | * SRR0 and SRR1 are saved in r11 and r12, | ||
387 | * r9 - r13 are saved in paca->exgen. | ||
388 | */ | ||
389 | .align 7 | ||
390 | .globl data_access_common | ||
391 | data_access_common: | ||
392 | mfspr r10,SPRN_DAR | ||
393 | std r10,PACA_EXGEN+EX_DAR(r13) | ||
394 | mfspr r10,SPRN_DSISR | ||
395 | stw r10,PACA_EXGEN+EX_DSISR(r13) | ||
396 | EXCEPTION_PROLOG_COMMON(0x300, PACA_EXGEN) | ||
397 | ld r3,PACA_EXGEN+EX_DAR(r13) | ||
398 | lwz r4,PACA_EXGEN+EX_DSISR(r13) | ||
399 | li r5,0x300 | ||
400 | b .do_hash_page /* Try to handle as hpte fault */ | ||
401 | |||
402 | .align 7 | ||
403 | .globl instruction_access_common | ||
404 | instruction_access_common: | ||
405 | EXCEPTION_PROLOG_COMMON(0x400, PACA_EXGEN) | ||
406 | ld r3,_NIP(r1) | ||
407 | andis. r4,r12,0x5820 | ||
408 | li r5,0x400 | ||
409 | b .do_hash_page /* Try to handle as hpte fault */ | ||
410 | |||
411 | /* | ||
412 | * Here is the common SLB miss user that is used when going to virtual | ||
413 | * mode for SLB misses, that is currently not used | ||
414 | */ | ||
415 | #ifdef __DISABLED__ | ||
416 | .align 7 | ||
417 | .globl slb_miss_user_common | ||
418 | slb_miss_user_common: | ||
419 | mflr r10 | ||
420 | std r3,PACA_EXGEN+EX_DAR(r13) | ||
421 | stw r9,PACA_EXGEN+EX_CCR(r13) | ||
422 | std r10,PACA_EXGEN+EX_LR(r13) | ||
423 | std r11,PACA_EXGEN+EX_SRR0(r13) | ||
424 | bl .slb_allocate_user | ||
425 | |||
426 | ld r10,PACA_EXGEN+EX_LR(r13) | ||
427 | ld r3,PACA_EXGEN+EX_R3(r13) | ||
428 | lwz r9,PACA_EXGEN+EX_CCR(r13) | ||
429 | ld r11,PACA_EXGEN+EX_SRR0(r13) | ||
430 | mtlr r10 | ||
431 | beq- slb_miss_fault | ||
432 | |||
433 | andi. r10,r12,MSR_RI /* check for unrecoverable exception */ | ||
434 | beq- unrecov_user_slb | ||
435 | mfmsr r10 | ||
436 | |||
437 | .machine push | ||
438 | .machine "power4" | ||
439 | mtcrf 0x80,r9 | ||
440 | .machine pop | ||
441 | |||
442 | clrrdi r10,r10,2 /* clear RI before setting SRR0/1 */ | ||
443 | mtmsrd r10,1 | ||
444 | |||
445 | mtspr SRR0,r11 | ||
446 | mtspr SRR1,r12 | ||
447 | |||
448 | ld r9,PACA_EXGEN+EX_R9(r13) | ||
449 | ld r10,PACA_EXGEN+EX_R10(r13) | ||
450 | ld r11,PACA_EXGEN+EX_R11(r13) | ||
451 | ld r12,PACA_EXGEN+EX_R12(r13) | ||
452 | ld r13,PACA_EXGEN+EX_R13(r13) | ||
453 | rfid | ||
454 | b . | ||
455 | |||
456 | slb_miss_fault: | ||
457 | EXCEPTION_PROLOG_COMMON(0x380, PACA_EXGEN) | ||
458 | ld r4,PACA_EXGEN+EX_DAR(r13) | ||
459 | li r5,0 | ||
460 | std r4,_DAR(r1) | ||
461 | std r5,_DSISR(r1) | ||
462 | b handle_page_fault | ||
463 | |||
464 | unrecov_user_slb: | ||
465 | EXCEPTION_PROLOG_COMMON(0x4200, PACA_EXGEN) | ||
466 | DISABLE_INTS | ||
467 | bl .save_nvgprs | ||
468 | 1: addi r3,r1,STACK_FRAME_OVERHEAD | ||
469 | bl .unrecoverable_exception | ||
470 | b 1b | ||
471 | |||
472 | #endif /* __DISABLED__ */ | ||
473 | |||
474 | |||
475 | /* | ||
476 | * r13 points to the PACA, r9 contains the saved CR, | ||
477 | * r12 contain the saved SRR1, SRR0 is still ready for return | ||
478 | * r3 has the faulting address | ||
479 | * r9 - r13 are saved in paca->exslb. | ||
480 | * r3 is saved in paca->slb_r3 | ||
481 | * We assume we aren't going to take any exceptions during this procedure. | ||
482 | */ | ||
483 | _GLOBAL(slb_miss_realmode) | ||
484 | mflr r10 | ||
485 | #ifdef CONFIG_RELOCATABLE | ||
486 | mtctr r11 | ||
487 | #endif | ||
488 | |||
489 | stw r9,PACA_EXSLB+EX_CCR(r13) /* save CR in exc. frame */ | ||
490 | std r10,PACA_EXSLB+EX_LR(r13) /* save LR */ | ||
491 | |||
492 | bl .slb_allocate_realmode | ||
493 | |||
494 | /* All done -- return from exception. */ | ||
495 | |||
496 | ld r10,PACA_EXSLB+EX_LR(r13) | ||
497 | ld r3,PACA_EXSLB+EX_R3(r13) | ||
498 | lwz r9,PACA_EXSLB+EX_CCR(r13) /* get saved CR */ | ||
499 | #ifdef CONFIG_PPC_ISERIES | ||
500 | BEGIN_FW_FTR_SECTION | ||
501 | ld r11,PACALPPACAPTR(r13) | ||
502 | ld r11,LPPACASRR0(r11) /* get SRR0 value */ | ||
503 | END_FW_FTR_SECTION_IFSET(FW_FEATURE_ISERIES) | ||
504 | #endif /* CONFIG_PPC_ISERIES */ | ||
505 | |||
506 | mtlr r10 | ||
507 | |||
508 | andi. r10,r12,MSR_RI /* check for unrecoverable exception */ | ||
509 | beq- 2f | ||
510 | |||
511 | .machine push | ||
512 | .machine "power4" | ||
513 | mtcrf 0x80,r9 | ||
514 | mtcrf 0x01,r9 /* slb_allocate uses cr0 and cr7 */ | ||
515 | .machine pop | ||
516 | |||
517 | #ifdef CONFIG_PPC_ISERIES | ||
518 | BEGIN_FW_FTR_SECTION | ||
519 | mtspr SPRN_SRR0,r11 | ||
520 | mtspr SPRN_SRR1,r12 | ||
521 | END_FW_FTR_SECTION_IFSET(FW_FEATURE_ISERIES) | ||
522 | #endif /* CONFIG_PPC_ISERIES */ | ||
523 | ld r9,PACA_EXSLB+EX_R9(r13) | ||
524 | ld r10,PACA_EXSLB+EX_R10(r13) | ||
525 | ld r11,PACA_EXSLB+EX_R11(r13) | ||
526 | ld r12,PACA_EXSLB+EX_R12(r13) | ||
527 | ld r13,PACA_EXSLB+EX_R13(r13) | ||
528 | rfid | ||
529 | b . /* prevent speculative execution */ | ||
530 | |||
531 | 2: | ||
532 | #ifdef CONFIG_PPC_ISERIES | ||
533 | BEGIN_FW_FTR_SECTION | ||
534 | b unrecov_slb | ||
535 | END_FW_FTR_SECTION_IFSET(FW_FEATURE_ISERIES) | ||
536 | #endif /* CONFIG_PPC_ISERIES */ | ||
537 | mfspr r11,SPRN_SRR0 | ||
538 | ld r10,PACAKBASE(r13) | ||
539 | LOAD_HANDLER(r10,unrecov_slb) | ||
540 | mtspr SPRN_SRR0,r10 | ||
541 | ld r10,PACAKMSR(r13) | ||
542 | mtspr SPRN_SRR1,r10 | ||
543 | rfid | ||
544 | b . | ||
545 | |||
546 | unrecov_slb: | ||
547 | EXCEPTION_PROLOG_COMMON(0x4100, PACA_EXSLB) | ||
548 | DISABLE_INTS | ||
549 | bl .save_nvgprs | ||
550 | 1: addi r3,r1,STACK_FRAME_OVERHEAD | ||
551 | bl .unrecoverable_exception | ||
552 | b 1b | ||
553 | |||
554 | .align 7 | ||
555 | .globl hardware_interrupt_common | ||
556 | .globl hardware_interrupt_entry | ||
557 | hardware_interrupt_common: | ||
558 | EXCEPTION_PROLOG_COMMON(0x500, PACA_EXGEN) | ||
559 | FINISH_NAP | ||
560 | hardware_interrupt_entry: | ||
561 | DISABLE_INTS | ||
562 | BEGIN_FTR_SECTION | ||
563 | bl .ppc64_runlatch_on | ||
564 | END_FTR_SECTION_IFSET(CPU_FTR_CTRL) | ||
565 | addi r3,r1,STACK_FRAME_OVERHEAD | ||
566 | bl .do_IRQ | ||
567 | b .ret_from_except_lite | ||
568 | |||
569 | #ifdef CONFIG_PPC_970_NAP | ||
570 | power4_fixup_nap: | ||
571 | andc r9,r9,r10 | ||
572 | std r9,TI_LOCAL_FLAGS(r11) | ||
573 | ld r10,_LINK(r1) /* make idle task do the */ | ||
574 | std r10,_NIP(r1) /* equivalent of a blr */ | ||
575 | blr | ||
576 | #endif | ||
577 | |||
578 | .align 7 | ||
579 | .globl alignment_common | ||
580 | alignment_common: | ||
581 | mfspr r10,SPRN_DAR | ||
582 | std r10,PACA_EXGEN+EX_DAR(r13) | ||
583 | mfspr r10,SPRN_DSISR | ||
584 | stw r10,PACA_EXGEN+EX_DSISR(r13) | ||
585 | EXCEPTION_PROLOG_COMMON(0x600, PACA_EXGEN) | ||
586 | ld r3,PACA_EXGEN+EX_DAR(r13) | ||
587 | lwz r4,PACA_EXGEN+EX_DSISR(r13) | ||
588 | std r3,_DAR(r1) | ||
589 | std r4,_DSISR(r1) | ||
590 | bl .save_nvgprs | ||
591 | addi r3,r1,STACK_FRAME_OVERHEAD | ||
592 | ENABLE_INTS | ||
593 | bl .alignment_exception | ||
594 | b .ret_from_except | ||
595 | |||
596 | .align 7 | ||
597 | .globl program_check_common | ||
598 | program_check_common: | ||
599 | EXCEPTION_PROLOG_COMMON(0x700, PACA_EXGEN) | ||
600 | bl .save_nvgprs | ||
601 | addi r3,r1,STACK_FRAME_OVERHEAD | ||
602 | ENABLE_INTS | ||
603 | bl .program_check_exception | ||
604 | b .ret_from_except | ||
605 | |||
606 | .align 7 | ||
607 | .globl fp_unavailable_common | ||
608 | fp_unavailable_common: | ||
609 | EXCEPTION_PROLOG_COMMON(0x800, PACA_EXGEN) | ||
610 | bne 1f /* if from user, just load it up */ | ||
611 | bl .save_nvgprs | ||
612 | addi r3,r1,STACK_FRAME_OVERHEAD | ||
613 | ENABLE_INTS | ||
614 | bl .kernel_fp_unavailable_exception | ||
615 | BUG_OPCODE | ||
616 | 1: bl .load_up_fpu | ||
617 | b fast_exception_return | ||
618 | |||
619 | .align 7 | ||
620 | .globl altivec_unavailable_common | ||
621 | altivec_unavailable_common: | ||
622 | EXCEPTION_PROLOG_COMMON(0xf20, PACA_EXGEN) | ||
623 | #ifdef CONFIG_ALTIVEC | ||
624 | BEGIN_FTR_SECTION | ||
625 | beq 1f | ||
626 | bl .load_up_altivec | ||
627 | b fast_exception_return | ||
628 | 1: | ||
629 | END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC) | ||
630 | #endif | ||
631 | bl .save_nvgprs | ||
632 | addi r3,r1,STACK_FRAME_OVERHEAD | ||
633 | ENABLE_INTS | ||
634 | bl .altivec_unavailable_exception | ||
635 | b .ret_from_except | ||
636 | |||
637 | .align 7 | ||
638 | .globl vsx_unavailable_common | ||
639 | vsx_unavailable_common: | ||
640 | EXCEPTION_PROLOG_COMMON(0xf40, PACA_EXGEN) | ||
641 | #ifdef CONFIG_VSX | ||
642 | BEGIN_FTR_SECTION | ||
643 | bne .load_up_vsx | ||
644 | 1: | ||
645 | END_FTR_SECTION_IFSET(CPU_FTR_VSX) | ||
646 | #endif | ||
647 | bl .save_nvgprs | ||
648 | addi r3,r1,STACK_FRAME_OVERHEAD | ||
649 | ENABLE_INTS | ||
650 | bl .vsx_unavailable_exception | ||
651 | b .ret_from_except | ||
652 | |||
653 | .align 7 | ||
654 | .globl __end_handlers | ||
655 | __end_handlers: | ||
656 | |||
657 | /* | ||
658 | * Return from an exception with minimal checks. | ||
659 | * The caller is assumed to have done EXCEPTION_PROLOG_COMMON. | ||
660 | * If interrupts have been enabled, or anything has been | ||
661 | * done that might have changed the scheduling status of | ||
662 | * any task or sent any task a signal, you should use | ||
663 | * ret_from_except or ret_from_except_lite instead of this. | ||
664 | */ | ||
665 | fast_exc_return_irq: /* restores irq state too */ | ||
666 | ld r3,SOFTE(r1) | ||
667 | TRACE_AND_RESTORE_IRQ(r3); | ||
668 | ld r12,_MSR(r1) | ||
669 | rldicl r4,r12,49,63 /* get MSR_EE to LSB */ | ||
670 | stb r4,PACAHARDIRQEN(r13) /* restore paca->hard_enabled */ | ||
671 | b 1f | ||
672 | |||
673 | .globl fast_exception_return | ||
674 | fast_exception_return: | ||
675 | ld r12,_MSR(r1) | ||
676 | 1: ld r11,_NIP(r1) | ||
677 | andi. r3,r12,MSR_RI /* check if RI is set */ | ||
678 | beq- unrecov_fer | ||
679 | |||
680 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING | ||
681 | andi. r3,r12,MSR_PR | ||
682 | beq 2f | ||
683 | ACCOUNT_CPU_USER_EXIT(r3, r4) | ||
684 | 2: | ||
685 | #endif | ||
686 | |||
687 | ld r3,_CCR(r1) | ||
688 | ld r4,_LINK(r1) | ||
689 | ld r5,_CTR(r1) | ||
690 | ld r6,_XER(r1) | ||
691 | mtcr r3 | ||
692 | mtlr r4 | ||
693 | mtctr r5 | ||
694 | mtxer r6 | ||
695 | REST_GPR(0, r1) | ||
696 | REST_8GPRS(2, r1) | ||
697 | |||
698 | mfmsr r10 | ||
699 | rldicl r10,r10,48,1 /* clear EE */ | ||
700 | rldicr r10,r10,16,61 /* clear RI (LE is 0 already) */ | ||
701 | mtmsrd r10,1 | ||
702 | |||
703 | mtspr SPRN_SRR1,r12 | ||
704 | mtspr SPRN_SRR0,r11 | ||
705 | REST_4GPRS(10, r1) | ||
706 | ld r1,GPR1(r1) | ||
707 | rfid | ||
708 | b . /* prevent speculative execution */ | ||
709 | |||
710 | unrecov_fer: | ||
711 | bl .save_nvgprs | ||
712 | 1: addi r3,r1,STACK_FRAME_OVERHEAD | ||
713 | bl .unrecoverable_exception | ||
714 | b 1b | ||
715 | |||
716 | |||
717 | /* | ||
718 | * Hash table stuff | ||
719 | */ | ||
720 | .align 7 | ||
721 | _STATIC(do_hash_page) | ||
722 | std r3,_DAR(r1) | ||
723 | std r4,_DSISR(r1) | ||
724 | |||
725 | andis. r0,r4,0xa450 /* weird error? */ | ||
726 | bne- handle_page_fault /* if not, try to insert a HPTE */ | ||
727 | BEGIN_FTR_SECTION | ||
728 | andis. r0,r4,0x0020 /* Is it a segment table fault? */ | ||
729 | bne- do_ste_alloc /* If so handle it */ | ||
730 | END_FTR_SECTION_IFCLR(CPU_FTR_SLB) | ||
731 | |||
732 | /* | ||
733 | * On iSeries, we soft-disable interrupts here, then | ||
734 | * hard-enable interrupts so that the hash_page code can spin on | ||
735 | * the hash_table_lock without problems on a shared processor. | ||
736 | */ | ||
737 | DISABLE_INTS | ||
738 | |||
739 | /* | ||
740 | * Currently, trace_hardirqs_off() will be called by DISABLE_INTS | ||
741 | * and will clobber volatile registers when irq tracing is enabled | ||
742 | * so we need to reload them. It may be possible to be smarter here | ||
743 | * and move the irq tracing elsewhere but let's keep it simple for | ||
744 | * now | ||
745 | */ | ||
746 | #ifdef CONFIG_TRACE_IRQFLAGS | ||
747 | ld r3,_DAR(r1) | ||
748 | ld r4,_DSISR(r1) | ||
749 | ld r5,_TRAP(r1) | ||
750 | ld r12,_MSR(r1) | ||
751 | clrrdi r5,r5,4 | ||
752 | #endif /* CONFIG_TRACE_IRQFLAGS */ | ||
753 | /* | ||
754 | * We need to set the _PAGE_USER bit if MSR_PR is set or if we are | ||
755 | * accessing a userspace segment (even from the kernel). We assume | ||
756 | * kernel addresses always have the high bit set. | ||
757 | */ | ||
758 | rlwinm r4,r4,32-25+9,31-9,31-9 /* DSISR_STORE -> _PAGE_RW */ | ||
759 | rotldi r0,r3,15 /* Move high bit into MSR_PR posn */ | ||
760 | orc r0,r12,r0 /* MSR_PR | ~high_bit */ | ||
761 | rlwimi r4,r0,32-13,30,30 /* becomes _PAGE_USER access bit */ | ||
762 | ori r4,r4,1 /* add _PAGE_PRESENT */ | ||
763 | rlwimi r4,r5,22+2,31-2,31-2 /* Set _PAGE_EXEC if trap is 0x400 */ | ||
764 | |||
765 | /* | ||
766 | * r3 contains the faulting address | ||
767 | * r4 contains the required access permissions | ||
768 | * r5 contains the trap number | ||
769 | * | ||
770 | * at return r3 = 0 for success | ||
771 | */ | ||
772 | bl .hash_page /* build HPTE if possible */ | ||
773 | cmpdi r3,0 /* see if hash_page succeeded */ | ||
774 | |||
775 | BEGIN_FW_FTR_SECTION | ||
776 | /* | ||
777 | * If we had interrupts soft-enabled at the point where the | ||
778 | * DSI/ISI occurred, and an interrupt came in during hash_page, | ||
779 | * handle it now. | ||
780 | * We jump to ret_from_except_lite rather than fast_exception_return | ||
781 | * because ret_from_except_lite will check for and handle pending | ||
782 | * interrupts if necessary. | ||
783 | */ | ||
784 | beq 13f | ||
785 | END_FW_FTR_SECTION_IFSET(FW_FEATURE_ISERIES) | ||
786 | |||
787 | BEGIN_FW_FTR_SECTION | ||
788 | /* | ||
789 | * Here we have interrupts hard-disabled, so it is sufficient | ||
790 | * to restore paca->{soft,hard}_enable and get out. | ||
791 | */ | ||
792 | beq fast_exc_return_irq /* Return from exception on success */ | ||
793 | END_FW_FTR_SECTION_IFCLR(FW_FEATURE_ISERIES) | ||
794 | |||
795 | /* For a hash failure, we don't bother re-enabling interrupts */ | ||
796 | ble- 12f | ||
797 | |||
798 | /* | ||
799 | * hash_page couldn't handle it, set soft interrupt enable back | ||
800 | * to what it was before the trap. Note that .raw_local_irq_restore | ||
801 | * handles any interrupts pending at this point. | ||
802 | */ | ||
803 | ld r3,SOFTE(r1) | ||
804 | TRACE_AND_RESTORE_IRQ_PARTIAL(r3, 11f) | ||
805 | bl .raw_local_irq_restore | ||
806 | b 11f | ||
807 | |||
808 | /* Here we have a page fault that hash_page can't handle. */ | ||
809 | handle_page_fault: | ||
810 | ENABLE_INTS | ||
811 | 11: ld r4,_DAR(r1) | ||
812 | ld r5,_DSISR(r1) | ||
813 | addi r3,r1,STACK_FRAME_OVERHEAD | ||
814 | bl .do_page_fault | ||
815 | cmpdi r3,0 | ||
816 | beq+ 13f | ||
817 | bl .save_nvgprs | ||
818 | mr r5,r3 | ||
819 | addi r3,r1,STACK_FRAME_OVERHEAD | ||
820 | lwz r4,_DAR(r1) | ||
821 | bl .bad_page_fault | ||
822 | b .ret_from_except | ||
823 | |||
824 | 13: b .ret_from_except_lite | ||
825 | |||
826 | /* We have a page fault that hash_page could handle but HV refused | ||
827 | * the PTE insertion | ||
828 | */ | ||
829 | 12: bl .save_nvgprs | ||
830 | mr r5,r3 | ||
831 | addi r3,r1,STACK_FRAME_OVERHEAD | ||
832 | ld r4,_DAR(r1) | ||
833 | bl .low_hash_fault | ||
834 | b .ret_from_except | ||
835 | |||
836 | /* here we have a segment miss */ | ||
837 | do_ste_alloc: | ||
838 | bl .ste_allocate /* try to insert stab entry */ | ||
839 | cmpdi r3,0 | ||
840 | bne- handle_page_fault | ||
841 | b fast_exception_return | ||
842 | |||
843 | /* | ||
844 | * r13 points to the PACA, r9 contains the saved CR, | ||
845 | * r11 and r12 contain the saved SRR0 and SRR1. | ||
846 | * r9 - r13 are saved in paca->exslb. | ||
847 | * We assume we aren't going to take any exceptions during this procedure. | ||
848 | * We assume (DAR >> 60) == 0xc. | ||
849 | */ | ||
850 | .align 7 | ||
851 | _GLOBAL(do_stab_bolted) | ||
852 | stw r9,PACA_EXSLB+EX_CCR(r13) /* save CR in exc. frame */ | ||
853 | std r11,PACA_EXSLB+EX_SRR0(r13) /* save SRR0 in exc. frame */ | ||
854 | |||
855 | /* Hash to the primary group */ | ||
856 | ld r10,PACASTABVIRT(r13) | ||
857 | mfspr r11,SPRN_DAR | ||
858 | srdi r11,r11,28 | ||
859 | rldimi r10,r11,7,52 /* r10 = first ste of the group */ | ||
860 | |||
861 | /* Calculate VSID */ | ||
862 | /* This is a kernel address, so protovsid = ESID */ | ||
863 | ASM_VSID_SCRAMBLE(r11, r9, 256M) | ||
864 | rldic r9,r11,12,16 /* r9 = vsid << 12 */ | ||
865 | |||
866 | /* Search the primary group for a free entry */ | ||
867 | 1: ld r11,0(r10) /* Test valid bit of the current ste */ | ||
868 | andi. r11,r11,0x80 | ||
869 | beq 2f | ||
870 | addi r10,r10,16 | ||
871 | andi. r11,r10,0x70 | ||
872 | bne 1b | ||
873 | |||
874 | /* Stick for only searching the primary group for now. */ | ||
875 | /* At least for now, we use a very simple random castout scheme */ | ||
876 | /* Use the TB as a random number ; OR in 1 to avoid entry 0 */ | ||
877 | mftb r11 | ||
878 | rldic r11,r11,4,57 /* r11 = (r11 << 4) & 0x70 */ | ||
879 | ori r11,r11,0x10 | ||
880 | |||
881 | /* r10 currently points to an ste one past the group of interest */ | ||
882 | /* make it point to the randomly selected entry */ | ||
883 | subi r10,r10,128 | ||
884 | or r10,r10,r11 /* r10 is the entry to invalidate */ | ||
885 | |||
886 | isync /* mark the entry invalid */ | ||
887 | ld r11,0(r10) | ||
888 | rldicl r11,r11,56,1 /* clear the valid bit */ | ||
889 | rotldi r11,r11,8 | ||
890 | std r11,0(r10) | ||
891 | sync | ||
892 | |||
893 | clrrdi r11,r11,28 /* Get the esid part of the ste */ | ||
894 | slbie r11 | ||
895 | |||
896 | 2: std r9,8(r10) /* Store the vsid part of the ste */ | ||
897 | eieio | ||
898 | |||
899 | mfspr r11,SPRN_DAR /* Get the new esid */ | ||
900 | clrrdi r11,r11,28 /* Permits a full 32b of ESID */ | ||
901 | ori r11,r11,0x90 /* Turn on valid and kp */ | ||
902 | std r11,0(r10) /* Put new entry back into the stab */ | ||
903 | |||
904 | sync | ||
905 | |||
906 | /* All done -- return from exception. */ | ||
907 | lwz r9,PACA_EXSLB+EX_CCR(r13) /* get saved CR */ | ||
908 | ld r11,PACA_EXSLB+EX_SRR0(r13) /* get saved SRR0 */ | ||
909 | |||
910 | andi. r10,r12,MSR_RI | ||
911 | beq- unrecov_slb | ||
912 | |||
913 | mtcrf 0x80,r9 /* restore CR */ | ||
914 | |||
915 | mfmsr r10 | ||
916 | clrrdi r10,r10,2 | ||
917 | mtmsrd r10,1 | ||
918 | |||
919 | mtspr SPRN_SRR0,r11 | ||
920 | mtspr SPRN_SRR1,r12 | ||
921 | ld r9,PACA_EXSLB+EX_R9(r13) | ||
922 | ld r10,PACA_EXSLB+EX_R10(r13) | ||
923 | ld r11,PACA_EXSLB+EX_R11(r13) | ||
924 | ld r12,PACA_EXSLB+EX_R12(r13) | ||
925 | ld r13,PACA_EXSLB+EX_R13(r13) | ||
926 | rfid | ||
927 | b . /* prevent speculative execution */ | ||
928 | |||
929 | /* | ||
930 | * Space for CPU0's segment table. | ||
931 | * | ||
932 | * On iSeries, the hypervisor must fill in at least one entry before | ||
933 | * we get control (with relocate on). The address is given to the hv | ||
934 | * as a page number (see xLparMap below), so this must be at a | ||
935 | * fixed address (the linker can't compute (u64)&initial_stab >> | ||
936 | * PAGE_SHIFT). | ||
937 | */ | ||
938 | . = STAB0_OFFSET /* 0x6000 */ | ||
939 | .globl initial_stab | ||
940 | initial_stab: | ||
941 | .space 4096 | ||
942 | |||
943 | #ifdef CONFIG_PPC_PSERIES | ||
944 | /* | ||
945 | * Data area reserved for FWNMI option. | ||
946 | * This address (0x7000) is fixed by the RPA. | ||
947 | */ | ||
948 | .= 0x7000 | ||
949 | .globl fwnmi_data_area | ||
950 | fwnmi_data_area: | ||
951 | #endif /* CONFIG_PPC_PSERIES */ | ||
952 | |||
953 | /* iSeries does not use the FWNMI stuff, so it is safe to put | ||
954 | * this here, even if we later allow kernels that will boot on | ||
955 | * both pSeries and iSeries */ | ||
956 | #ifdef CONFIG_PPC_ISERIES | ||
957 | . = LPARMAP_PHYS | ||
958 | .globl xLparMap | ||
959 | xLparMap: | ||
960 | .quad HvEsidsToMap /* xNumberEsids */ | ||
961 | .quad HvRangesToMap /* xNumberRanges */ | ||
962 | .quad STAB0_PAGE /* xSegmentTableOffs */ | ||
963 | .zero 40 /* xRsvd */ | ||
964 | /* xEsids (HvEsidsToMap entries of 2 quads) */ | ||
965 | .quad PAGE_OFFSET_ESID /* xKernelEsid */ | ||
966 | .quad PAGE_OFFSET_VSID /* xKernelVsid */ | ||
967 | .quad VMALLOC_START_ESID /* xKernelEsid */ | ||
968 | .quad VMALLOC_START_VSID /* xKernelVsid */ | ||
969 | /* xRanges (HvRangesToMap entries of 3 quads) */ | ||
970 | .quad HvPagesToMap /* xPages */ | ||
971 | .quad 0 /* xOffset */ | ||
972 | .quad PAGE_OFFSET_VSID << (SID_SHIFT - HW_PAGE_SHIFT) /* xVPN */ | ||
973 | |||
974 | #endif /* CONFIG_PPC_ISERIES */ | ||
975 | |||
976 | #ifdef CONFIG_PPC_PSERIES | ||
977 | . = 0x8000 | ||
978 | #endif /* CONFIG_PPC_PSERIES */ | ||
diff --git a/arch/powerpc/kernel/ftrace.c b/arch/powerpc/kernel/ftrace.c index 2d182f119d1d..1b12696cca06 100644 --- a/arch/powerpc/kernel/ftrace.c +++ b/arch/powerpc/kernel/ftrace.c | |||
@@ -23,25 +23,14 @@ | |||
23 | #include <asm/code-patching.h> | 23 | #include <asm/code-patching.h> |
24 | #include <asm/ftrace.h> | 24 | #include <asm/ftrace.h> |
25 | 25 | ||
26 | #ifdef CONFIG_PPC32 | ||
27 | # define GET_ADDR(addr) addr | ||
28 | #else | ||
29 | /* PowerPC64's functions are data that points to the functions */ | ||
30 | # define GET_ADDR(addr) (*(unsigned long *)addr) | ||
31 | #endif | ||
32 | 26 | ||
33 | #ifdef CONFIG_DYNAMIC_FTRACE | 27 | #ifdef CONFIG_DYNAMIC_FTRACE |
34 | static unsigned int ftrace_nop_replace(void) | ||
35 | { | ||
36 | return PPC_INST_NOP; | ||
37 | } | ||
38 | |||
39 | static unsigned int | 28 | static unsigned int |
40 | ftrace_call_replace(unsigned long ip, unsigned long addr, int link) | 29 | ftrace_call_replace(unsigned long ip, unsigned long addr, int link) |
41 | { | 30 | { |
42 | unsigned int op; | 31 | unsigned int op; |
43 | 32 | ||
44 | addr = GET_ADDR(addr); | 33 | addr = ppc_function_entry((void *)addr); |
45 | 34 | ||
46 | /* if (link) set op to 'bl' else 'b' */ | 35 | /* if (link) set op to 'bl' else 'b' */ |
47 | op = create_branch((unsigned int *)ip, addr, link ? 1 : 0); | 36 | op = create_branch((unsigned int *)ip, addr, link ? 1 : 0); |
@@ -49,14 +38,6 @@ ftrace_call_replace(unsigned long ip, unsigned long addr, int link) | |||
49 | return op; | 38 | return op; |
50 | } | 39 | } |
51 | 40 | ||
52 | #ifdef CONFIG_PPC64 | ||
53 | # define _ASM_ALIGN " .align 3 " | ||
54 | # define _ASM_PTR " .llong " | ||
55 | #else | ||
56 | # define _ASM_ALIGN " .align 2 " | ||
57 | # define _ASM_PTR " .long " | ||
58 | #endif | ||
59 | |||
60 | static int | 41 | static int |
61 | ftrace_modify_code(unsigned long ip, unsigned int old, unsigned int new) | 42 | ftrace_modify_code(unsigned long ip, unsigned int old, unsigned int new) |
62 | { | 43 | { |
@@ -197,7 +178,7 @@ __ftrace_make_nop(struct module *mod, | |||
197 | ptr = ((unsigned long)jmp[0] << 32) + jmp[1]; | 178 | ptr = ((unsigned long)jmp[0] << 32) + jmp[1]; |
198 | 179 | ||
199 | /* This should match what was called */ | 180 | /* This should match what was called */ |
200 | if (ptr != GET_ADDR(addr)) { | 181 | if (ptr != ppc_function_entry((void *)addr)) { |
201 | printk(KERN_ERR "addr does not match %lx\n", ptr); | 182 | printk(KERN_ERR "addr does not match %lx\n", ptr); |
202 | return -EINVAL; | 183 | return -EINVAL; |
203 | } | 184 | } |
@@ -328,7 +309,7 @@ int ftrace_make_nop(struct module *mod, | |||
328 | if (test_24bit_addr(ip, addr)) { | 309 | if (test_24bit_addr(ip, addr)) { |
329 | /* within range */ | 310 | /* within range */ |
330 | old = ftrace_call_replace(ip, addr, 1); | 311 | old = ftrace_call_replace(ip, addr, 1); |
331 | new = ftrace_nop_replace(); | 312 | new = PPC_INST_NOP; |
332 | return ftrace_modify_code(ip, old, new); | 313 | return ftrace_modify_code(ip, old, new); |
333 | } | 314 | } |
334 | 315 | ||
@@ -466,7 +447,7 @@ int ftrace_make_call(struct dyn_ftrace *rec, unsigned long addr) | |||
466 | */ | 447 | */ |
467 | if (test_24bit_addr(ip, addr)) { | 448 | if (test_24bit_addr(ip, addr)) { |
468 | /* within range */ | 449 | /* within range */ |
469 | old = ftrace_nop_replace(); | 450 | old = PPC_INST_NOP; |
470 | new = ftrace_call_replace(ip, addr, 1); | 451 | new = ftrace_call_replace(ip, addr, 1); |
471 | return ftrace_modify_code(ip, old, new); | 452 | return ftrace_modify_code(ip, old, new); |
472 | } | 453 | } |
@@ -570,7 +551,7 @@ void prepare_ftrace_return(unsigned long *parent, unsigned long self_addr) | |||
570 | return_hooker = (unsigned long)&mod_return_to_handler; | 551 | return_hooker = (unsigned long)&mod_return_to_handler; |
571 | #endif | 552 | #endif |
572 | 553 | ||
573 | return_hooker = GET_ADDR(return_hooker); | 554 | return_hooker = ppc_function_entry((void *)return_hooker); |
574 | 555 | ||
575 | /* | 556 | /* |
576 | * Protect against fault, even if it shouldn't | 557 | * Protect against fault, even if it shouldn't |
diff --git a/arch/powerpc/kernel/head_32.S b/arch/powerpc/kernel/head_32.S index c01467f952d3..48469463f89e 100644 --- a/arch/powerpc/kernel/head_32.S +++ b/arch/powerpc/kernel/head_32.S | |||
@@ -733,9 +733,11 @@ END_MMU_FTR_SECTION_IFSET(MMU_FTR_NEED_DTLB_SW_LRU) | |||
733 | AltiVecUnavailable: | 733 | AltiVecUnavailable: |
734 | EXCEPTION_PROLOG | 734 | EXCEPTION_PROLOG |
735 | #ifdef CONFIG_ALTIVEC | 735 | #ifdef CONFIG_ALTIVEC |
736 | bne load_up_altivec /* if from user, just load it up */ | 736 | beq 1f |
737 | bl load_up_altivec /* if from user, just load it up */ | ||
738 | b fast_exception_return | ||
737 | #endif /* CONFIG_ALTIVEC */ | 739 | #endif /* CONFIG_ALTIVEC */ |
738 | addi r3,r1,STACK_FRAME_OVERHEAD | 740 | 1: addi r3,r1,STACK_FRAME_OVERHEAD |
739 | EXC_XFER_EE_LITE(0xf20, altivec_unavailable_exception) | 741 | EXC_XFER_EE_LITE(0xf20, altivec_unavailable_exception) |
740 | 742 | ||
741 | PerformanceMonitor: | 743 | PerformanceMonitor: |
@@ -743,101 +745,6 @@ PerformanceMonitor: | |||
743 | addi r3,r1,STACK_FRAME_OVERHEAD | 745 | addi r3,r1,STACK_FRAME_OVERHEAD |
744 | EXC_XFER_STD(0xf00, performance_monitor_exception) | 746 | EXC_XFER_STD(0xf00, performance_monitor_exception) |
745 | 747 | ||
746 | #ifdef CONFIG_ALTIVEC | ||
747 | /* Note that the AltiVec support is closely modeled after the FP | ||
748 | * support. Changes to one are likely to be applicable to the | ||
749 | * other! */ | ||
750 | load_up_altivec: | ||
751 | /* | ||
752 | * Disable AltiVec for the task which had AltiVec previously, | ||
753 | * and save its AltiVec registers in its thread_struct. | ||
754 | * Enables AltiVec for use in the kernel on return. | ||
755 | * On SMP we know the AltiVec units are free, since we give it up every | ||
756 | * switch. -- Kumar | ||
757 | */ | ||
758 | mfmsr r5 | ||
759 | oris r5,r5,MSR_VEC@h | ||
760 | MTMSRD(r5) /* enable use of AltiVec now */ | ||
761 | isync | ||
762 | /* | ||
763 | * For SMP, we don't do lazy AltiVec switching because it just gets too | ||
764 | * horrendously complex, especially when a task switches from one CPU | ||
765 | * to another. Instead we call giveup_altivec in switch_to. | ||
766 | */ | ||
767 | #ifndef CONFIG_SMP | ||
768 | tophys(r6,0) | ||
769 | addis r3,r6,last_task_used_altivec@ha | ||
770 | lwz r4,last_task_used_altivec@l(r3) | ||
771 | cmpwi 0,r4,0 | ||
772 | beq 1f | ||
773 | add r4,r4,r6 | ||
774 | addi r4,r4,THREAD /* want THREAD of last_task_used_altivec */ | ||
775 | SAVE_32VRS(0,r10,r4) | ||
776 | mfvscr vr0 | ||
777 | li r10,THREAD_VSCR | ||
778 | stvx vr0,r10,r4 | ||
779 | lwz r5,PT_REGS(r4) | ||
780 | add r5,r5,r6 | ||
781 | lwz r4,_MSR-STACK_FRAME_OVERHEAD(r5) | ||
782 | lis r10,MSR_VEC@h | ||
783 | andc r4,r4,r10 /* disable altivec for previous task */ | ||
784 | stw r4,_MSR-STACK_FRAME_OVERHEAD(r5) | ||
785 | 1: | ||
786 | #endif /* CONFIG_SMP */ | ||
787 | /* enable use of AltiVec after return */ | ||
788 | oris r9,r9,MSR_VEC@h | ||
789 | mfspr r5,SPRN_SPRG3 /* current task's THREAD (phys) */ | ||
790 | li r4,1 | ||
791 | li r10,THREAD_VSCR | ||
792 | stw r4,THREAD_USED_VR(r5) | ||
793 | lvx vr0,r10,r5 | ||
794 | mtvscr vr0 | ||
795 | REST_32VRS(0,r10,r5) | ||
796 | #ifndef CONFIG_SMP | ||
797 | subi r4,r5,THREAD | ||
798 | sub r4,r4,r6 | ||
799 | stw r4,last_task_used_altivec@l(r3) | ||
800 | #endif /* CONFIG_SMP */ | ||
801 | /* restore registers and return */ | ||
802 | /* we haven't used ctr or xer or lr */ | ||
803 | b fast_exception_return | ||
804 | |||
805 | /* | ||
806 | * giveup_altivec(tsk) | ||
807 | * Disable AltiVec for the task given as the argument, | ||
808 | * and save the AltiVec registers in its thread_struct. | ||
809 | * Enables AltiVec for use in the kernel on return. | ||
810 | */ | ||
811 | |||
812 | .globl giveup_altivec | ||
813 | giveup_altivec: | ||
814 | mfmsr r5 | ||
815 | oris r5,r5,MSR_VEC@h | ||
816 | SYNC | ||
817 | MTMSRD(r5) /* enable use of AltiVec now */ | ||
818 | isync | ||
819 | cmpwi 0,r3,0 | ||
820 | beqlr- /* if no previous owner, done */ | ||
821 | addi r3,r3,THREAD /* want THREAD of task */ | ||
822 | lwz r5,PT_REGS(r3) | ||
823 | cmpwi 0,r5,0 | ||
824 | SAVE_32VRS(0, r4, r3) | ||
825 | mfvscr vr0 | ||
826 | li r4,THREAD_VSCR | ||
827 | stvx vr0,r4,r3 | ||
828 | beq 1f | ||
829 | lwz r4,_MSR-STACK_FRAME_OVERHEAD(r5) | ||
830 | lis r3,MSR_VEC@h | ||
831 | andc r4,r4,r3 /* disable AltiVec for previous task */ | ||
832 | stw r4,_MSR-STACK_FRAME_OVERHEAD(r5) | ||
833 | 1: | ||
834 | #ifndef CONFIG_SMP | ||
835 | li r5,0 | ||
836 | lis r4,last_task_used_altivec@ha | ||
837 | stw r5,last_task_used_altivec@l(r4) | ||
838 | #endif /* CONFIG_SMP */ | ||
839 | blr | ||
840 | #endif /* CONFIG_ALTIVEC */ | ||
841 | 748 | ||
842 | /* | 749 | /* |
843 | * This code is jumped to from the startup code to copy | 750 | * This code is jumped to from the startup code to copy |
diff --git a/arch/powerpc/kernel/head_64.S b/arch/powerpc/kernel/head_64.S index 50ef505b8fb6..012505ebd9f9 100644 --- a/arch/powerpc/kernel/head_64.S +++ b/arch/powerpc/kernel/head_64.S | |||
@@ -12,8 +12,9 @@ | |||
12 | * Adapted for 64bit PowerPC by Dave Engebretsen, Peter Bergner, and | 12 | * Adapted for 64bit PowerPC by Dave Engebretsen, Peter Bergner, and |
13 | * Mike Corrigan {engebret|bergner|mikejc}@us.ibm.com | 13 | * Mike Corrigan {engebret|bergner|mikejc}@us.ibm.com |
14 | * | 14 | * |
15 | * This file contains the low-level support and setup for the | 15 | * This file contains the entry point for the 64-bit kernel along |
16 | * PowerPC-64 platform, including trap and interrupt dispatch. | 16 | * with some early initialization code common to all 64-bit powerpc |
17 | * variants. | ||
17 | * | 18 | * |
18 | * This program is free software; you can redistribute it and/or | 19 | * This program is free software; you can redistribute it and/or |
19 | * modify it under the terms of the GNU General Public License | 20 | * modify it under the terms of the GNU General Public License |
@@ -38,36 +39,25 @@ | |||
38 | #include <asm/exception.h> | 39 | #include <asm/exception.h> |
39 | #include <asm/irqflags.h> | 40 | #include <asm/irqflags.h> |
40 | 41 | ||
41 | /* | 42 | /* The physical memory is layed out such that the secondary processor |
42 | * We layout physical memory as follows: | 43 | * spin code sits at 0x0000...0x00ff. On server, the vectors follow |
43 | * 0x0000 - 0x00ff : Secondary processor spin code | 44 | * using the layout described in exceptions-64s.S |
44 | * 0x0100 - 0x2fff : pSeries Interrupt prologs | ||
45 | * 0x3000 - 0x5fff : interrupt support, iSeries and common interrupt prologs | ||
46 | * 0x6000 - 0x6fff : Initial (CPU0) segment table | ||
47 | * 0x7000 - 0x7fff : FWNMI data area | ||
48 | * 0x8000 - : Early init and support code | ||
49 | */ | ||
50 | |||
51 | /* | ||
52 | * SPRG Usage | ||
53 | * | ||
54 | * Register Definition | ||
55 | * | ||
56 | * SPRG0 reserved for hypervisor | ||
57 | * SPRG1 temp - used to save gpr | ||
58 | * SPRG2 temp - used to save gpr | ||
59 | * SPRG3 virt addr of paca | ||
60 | */ | 45 | */ |
61 | 46 | ||
62 | /* | 47 | /* |
63 | * Entering into this code we make the following assumptions: | 48 | * Entering into this code we make the following assumptions: |
64 | * For pSeries: | 49 | * |
50 | * For pSeries or server processors: | ||
65 | * 1. The MMU is off & open firmware is running in real mode. | 51 | * 1. The MMU is off & open firmware is running in real mode. |
66 | * 2. The kernel is entered at __start | 52 | * 2. The kernel is entered at __start |
67 | * | 53 | * |
68 | * For iSeries: | 54 | * For iSeries: |
69 | * 1. The MMU is on (as it always is for iSeries) | 55 | * 1. The MMU is on (as it always is for iSeries) |
70 | * 2. The kernel is entered at system_reset_iSeries | 56 | * 2. The kernel is entered at system_reset_iSeries |
57 | * | ||
58 | * For Book3E processors: | ||
59 | * 1. The MMU is on running in AS0 in a state defined in ePAPR | ||
60 | * 2. The kernel is entered at __start | ||
71 | */ | 61 | */ |
72 | 62 | ||
73 | .text | 63 | .text |
@@ -166,1065 +156,14 @@ exception_marker: | |||
166 | .text | 156 | .text |
167 | 157 | ||
168 | /* | 158 | /* |
169 | * This is the start of the interrupt handlers for pSeries | 159 | * On server, we include the exception vectors code here as it |
170 | * This code runs with relocation off. | 160 | * relies on absolute addressing which is only possible within |
171 | * Code from here to __end_interrupts gets copied down to real | 161 | * this compilation unit |
172 | * address 0x100 when we are running a relocatable kernel. | ||
173 | * Therefore any relative branches in this section must only | ||
174 | * branch to labels in this section. | ||
175 | */ | ||
176 | . = 0x100 | ||
177 | .globl __start_interrupts | ||
178 | __start_interrupts: | ||
179 | |||
180 | STD_EXCEPTION_PSERIES(0x100, system_reset) | ||
181 | |||
182 | . = 0x200 | ||
183 | _machine_check_pSeries: | ||
184 | HMT_MEDIUM | ||
185 | mtspr SPRN_SPRG1,r13 /* save r13 */ | ||
186 | EXCEPTION_PROLOG_PSERIES(PACA_EXMC, machine_check_common) | ||
187 | |||
188 | . = 0x300 | ||
189 | .globl data_access_pSeries | ||
190 | data_access_pSeries: | ||
191 | HMT_MEDIUM | ||
192 | mtspr SPRN_SPRG1,r13 | ||
193 | BEGIN_FTR_SECTION | ||
194 | mtspr SPRN_SPRG2,r12 | ||
195 | mfspr r13,SPRN_DAR | ||
196 | mfspr r12,SPRN_DSISR | ||
197 | srdi r13,r13,60 | ||
198 | rlwimi r13,r12,16,0x20 | ||
199 | mfcr r12 | ||
200 | cmpwi r13,0x2c | ||
201 | beq do_stab_bolted_pSeries | ||
202 | mtcrf 0x80,r12 | ||
203 | mfspr r12,SPRN_SPRG2 | ||
204 | END_FTR_SECTION_IFCLR(CPU_FTR_SLB) | ||
205 | EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, data_access_common) | ||
206 | |||
207 | . = 0x380 | ||
208 | .globl data_access_slb_pSeries | ||
209 | data_access_slb_pSeries: | ||
210 | HMT_MEDIUM | ||
211 | mtspr SPRN_SPRG1,r13 | ||
212 | mfspr r13,SPRN_SPRG3 /* get paca address into r13 */ | ||
213 | std r3,PACA_EXSLB+EX_R3(r13) | ||
214 | mfspr r3,SPRN_DAR | ||
215 | std r9,PACA_EXSLB+EX_R9(r13) /* save r9 - r12 */ | ||
216 | mfcr r9 | ||
217 | #ifdef __DISABLED__ | ||
218 | /* Keep that around for when we re-implement dynamic VSIDs */ | ||
219 | cmpdi r3,0 | ||
220 | bge slb_miss_user_pseries | ||
221 | #endif /* __DISABLED__ */ | ||
222 | std r10,PACA_EXSLB+EX_R10(r13) | ||
223 | std r11,PACA_EXSLB+EX_R11(r13) | ||
224 | std r12,PACA_EXSLB+EX_R12(r13) | ||
225 | mfspr r10,SPRN_SPRG1 | ||
226 | std r10,PACA_EXSLB+EX_R13(r13) | ||
227 | mfspr r12,SPRN_SRR1 /* and SRR1 */ | ||
228 | #ifndef CONFIG_RELOCATABLE | ||
229 | b .slb_miss_realmode | ||
230 | #else | ||
231 | /* | ||
232 | * We can't just use a direct branch to .slb_miss_realmode | ||
233 | * because the distance from here to there depends on where | ||
234 | * the kernel ends up being put. | ||
235 | */ | ||
236 | mfctr r11 | ||
237 | ld r10,PACAKBASE(r13) | ||
238 | LOAD_HANDLER(r10, .slb_miss_realmode) | ||
239 | mtctr r10 | ||
240 | bctr | ||
241 | #endif | ||
242 | |||
243 | STD_EXCEPTION_PSERIES(0x400, instruction_access) | ||
244 | |||
245 | . = 0x480 | ||
246 | .globl instruction_access_slb_pSeries | ||
247 | instruction_access_slb_pSeries: | ||
248 | HMT_MEDIUM | ||
249 | mtspr SPRN_SPRG1,r13 | ||
250 | mfspr r13,SPRN_SPRG3 /* get paca address into r13 */ | ||
251 | std r3,PACA_EXSLB+EX_R3(r13) | ||
252 | mfspr r3,SPRN_SRR0 /* SRR0 is faulting address */ | ||
253 | std r9,PACA_EXSLB+EX_R9(r13) /* save r9 - r12 */ | ||
254 | mfcr r9 | ||
255 | #ifdef __DISABLED__ | ||
256 | /* Keep that around for when we re-implement dynamic VSIDs */ | ||
257 | cmpdi r3,0 | ||
258 | bge slb_miss_user_pseries | ||
259 | #endif /* __DISABLED__ */ | ||
260 | std r10,PACA_EXSLB+EX_R10(r13) | ||
261 | std r11,PACA_EXSLB+EX_R11(r13) | ||
262 | std r12,PACA_EXSLB+EX_R12(r13) | ||
263 | mfspr r10,SPRN_SPRG1 | ||
264 | std r10,PACA_EXSLB+EX_R13(r13) | ||
265 | mfspr r12,SPRN_SRR1 /* and SRR1 */ | ||
266 | #ifndef CONFIG_RELOCATABLE | ||
267 | b .slb_miss_realmode | ||
268 | #else | ||
269 | mfctr r11 | ||
270 | ld r10,PACAKBASE(r13) | ||
271 | LOAD_HANDLER(r10, .slb_miss_realmode) | ||
272 | mtctr r10 | ||
273 | bctr | ||
274 | #endif | ||
275 | |||
276 | MASKABLE_EXCEPTION_PSERIES(0x500, hardware_interrupt) | ||
277 | STD_EXCEPTION_PSERIES(0x600, alignment) | ||
278 | STD_EXCEPTION_PSERIES(0x700, program_check) | ||
279 | STD_EXCEPTION_PSERIES(0x800, fp_unavailable) | ||
280 | MASKABLE_EXCEPTION_PSERIES(0x900, decrementer) | ||
281 | STD_EXCEPTION_PSERIES(0xa00, trap_0a) | ||
282 | STD_EXCEPTION_PSERIES(0xb00, trap_0b) | ||
283 | |||
284 | . = 0xc00 | ||
285 | .globl system_call_pSeries | ||
286 | system_call_pSeries: | ||
287 | HMT_MEDIUM | ||
288 | BEGIN_FTR_SECTION | ||
289 | cmpdi r0,0x1ebe | ||
290 | beq- 1f | ||
291 | END_FTR_SECTION_IFSET(CPU_FTR_REAL_LE) | ||
292 | mr r9,r13 | ||
293 | mfspr r13,SPRN_SPRG3 | ||
294 | mfspr r11,SPRN_SRR0 | ||
295 | ld r12,PACAKBASE(r13) | ||
296 | ld r10,PACAKMSR(r13) | ||
297 | LOAD_HANDLER(r12, system_call_entry) | ||
298 | mtspr SPRN_SRR0,r12 | ||
299 | mfspr r12,SPRN_SRR1 | ||
300 | mtspr SPRN_SRR1,r10 | ||
301 | rfid | ||
302 | b . /* prevent speculative execution */ | ||
303 | |||
304 | /* Fast LE/BE switch system call */ | ||
305 | 1: mfspr r12,SPRN_SRR1 | ||
306 | xori r12,r12,MSR_LE | ||
307 | mtspr SPRN_SRR1,r12 | ||
308 | rfid /* return to userspace */ | ||
309 | b . | ||
310 | |||
311 | STD_EXCEPTION_PSERIES(0xd00, single_step) | ||
312 | STD_EXCEPTION_PSERIES(0xe00, trap_0e) | ||
313 | |||
314 | /* We need to deal with the Altivec unavailable exception | ||
315 | * here which is at 0xf20, thus in the middle of the | ||
316 | * prolog code of the PerformanceMonitor one. A little | ||
317 | * trickery is thus necessary | ||
318 | */ | ||
319 | . = 0xf00 | ||
320 | b performance_monitor_pSeries | ||
321 | |||
322 | . = 0xf20 | ||
323 | b altivec_unavailable_pSeries | ||
324 | |||
325 | . = 0xf40 | ||
326 | b vsx_unavailable_pSeries | ||
327 | |||
328 | #ifdef CONFIG_CBE_RAS | ||
329 | HSTD_EXCEPTION_PSERIES(0x1200, cbe_system_error) | ||
330 | #endif /* CONFIG_CBE_RAS */ | ||
331 | STD_EXCEPTION_PSERIES(0x1300, instruction_breakpoint) | ||
332 | #ifdef CONFIG_CBE_RAS | ||
333 | HSTD_EXCEPTION_PSERIES(0x1600, cbe_maintenance) | ||
334 | #endif /* CONFIG_CBE_RAS */ | ||
335 | STD_EXCEPTION_PSERIES(0x1700, altivec_assist) | ||
336 | #ifdef CONFIG_CBE_RAS | ||
337 | HSTD_EXCEPTION_PSERIES(0x1800, cbe_thermal) | ||
338 | #endif /* CONFIG_CBE_RAS */ | ||
339 | |||
340 | . = 0x3000 | ||
341 | |||
342 | /*** pSeries interrupt support ***/ | ||
343 | |||
344 | /* moved from 0xf00 */ | ||
345 | STD_EXCEPTION_PSERIES(., performance_monitor) | ||
346 | STD_EXCEPTION_PSERIES(., altivec_unavailable) | ||
347 | STD_EXCEPTION_PSERIES(., vsx_unavailable) | ||
348 | |||
349 | /* | ||
350 | * An interrupt came in while soft-disabled; clear EE in SRR1, | ||
351 | * clear paca->hard_enabled and return. | ||
352 | */ | ||
353 | masked_interrupt: | ||
354 | stb r10,PACAHARDIRQEN(r13) | ||
355 | mtcrf 0x80,r9 | ||
356 | ld r9,PACA_EXGEN+EX_R9(r13) | ||
357 | mfspr r10,SPRN_SRR1 | ||
358 | rldicl r10,r10,48,1 /* clear MSR_EE */ | ||
359 | rotldi r10,r10,16 | ||
360 | mtspr SPRN_SRR1,r10 | ||
361 | ld r10,PACA_EXGEN+EX_R10(r13) | ||
362 | mfspr r13,SPRN_SPRG1 | ||
363 | rfid | ||
364 | b . | ||
365 | |||
366 | .align 7 | ||
367 | do_stab_bolted_pSeries: | ||
368 | mtcrf 0x80,r12 | ||
369 | mfspr r12,SPRN_SPRG2 | ||
370 | EXCEPTION_PROLOG_PSERIES(PACA_EXSLB, .do_stab_bolted) | ||
371 | |||
372 | #ifdef CONFIG_PPC_PSERIES | ||
373 | /* | ||
374 | * Vectors for the FWNMI option. Share common code. | ||
375 | */ | ||
376 | .globl system_reset_fwnmi | ||
377 | .align 7 | ||
378 | system_reset_fwnmi: | ||
379 | HMT_MEDIUM | ||
380 | mtspr SPRN_SPRG1,r13 /* save r13 */ | ||
381 | EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, system_reset_common) | ||
382 | |||
383 | .globl machine_check_fwnmi | ||
384 | .align 7 | ||
385 | machine_check_fwnmi: | ||
386 | HMT_MEDIUM | ||
387 | mtspr SPRN_SPRG1,r13 /* save r13 */ | ||
388 | EXCEPTION_PROLOG_PSERIES(PACA_EXMC, machine_check_common) | ||
389 | |||
390 | #endif /* CONFIG_PPC_PSERIES */ | ||
391 | |||
392 | #ifdef __DISABLED__ | ||
393 | /* | ||
394 | * This is used for when the SLB miss handler has to go virtual, | ||
395 | * which doesn't happen for now anymore but will once we re-implement | ||
396 | * dynamic VSIDs for shared page tables | ||
397 | */ | ||
398 | slb_miss_user_pseries: | ||
399 | std r10,PACA_EXGEN+EX_R10(r13) | ||
400 | std r11,PACA_EXGEN+EX_R11(r13) | ||
401 | std r12,PACA_EXGEN+EX_R12(r13) | ||
402 | mfspr r10,SPRG1 | ||
403 | ld r11,PACA_EXSLB+EX_R9(r13) | ||
404 | ld r12,PACA_EXSLB+EX_R3(r13) | ||
405 | std r10,PACA_EXGEN+EX_R13(r13) | ||
406 | std r11,PACA_EXGEN+EX_R9(r13) | ||
407 | std r12,PACA_EXGEN+EX_R3(r13) | ||
408 | clrrdi r12,r13,32 | ||
409 | mfmsr r10 | ||
410 | mfspr r11,SRR0 /* save SRR0 */ | ||
411 | ori r12,r12,slb_miss_user_common@l /* virt addr of handler */ | ||
412 | ori r10,r10,MSR_IR|MSR_DR|MSR_RI | ||
413 | mtspr SRR0,r12 | ||
414 | mfspr r12,SRR1 /* and SRR1 */ | ||
415 | mtspr SRR1,r10 | ||
416 | rfid | ||
417 | b . /* prevent spec. execution */ | ||
418 | #endif /* __DISABLED__ */ | ||
419 | |||
420 | .align 7 | ||
421 | .globl __end_interrupts | ||
422 | __end_interrupts: | ||
423 | |||
424 | /* | ||
425 | * Code from here down to __end_handlers is invoked from the | ||
426 | * exception prologs above. Because the prologs assemble the | ||
427 | * addresses of these handlers using the LOAD_HANDLER macro, | ||
428 | * which uses an addi instruction, these handlers must be in | ||
429 | * the first 32k of the kernel image. | ||
430 | */ | ||
431 | |||
432 | /*** Common interrupt handlers ***/ | ||
433 | |||
434 | STD_EXCEPTION_COMMON(0x100, system_reset, .system_reset_exception) | ||
435 | |||
436 | /* | ||
437 | * Machine check is different because we use a different | ||
438 | * save area: PACA_EXMC instead of PACA_EXGEN. | ||
439 | */ | ||
440 | .align 7 | ||
441 | .globl machine_check_common | ||
442 | machine_check_common: | ||
443 | EXCEPTION_PROLOG_COMMON(0x200, PACA_EXMC) | ||
444 | FINISH_NAP | ||
445 | DISABLE_INTS | ||
446 | bl .save_nvgprs | ||
447 | addi r3,r1,STACK_FRAME_OVERHEAD | ||
448 | bl .machine_check_exception | ||
449 | b .ret_from_except | ||
450 | |||
451 | STD_EXCEPTION_COMMON_LITE(0x900, decrementer, .timer_interrupt) | ||
452 | STD_EXCEPTION_COMMON(0xa00, trap_0a, .unknown_exception) | ||
453 | STD_EXCEPTION_COMMON(0xb00, trap_0b, .unknown_exception) | ||
454 | STD_EXCEPTION_COMMON(0xd00, single_step, .single_step_exception) | ||
455 | STD_EXCEPTION_COMMON(0xe00, trap_0e, .unknown_exception) | ||
456 | STD_EXCEPTION_COMMON_IDLE(0xf00, performance_monitor, .performance_monitor_exception) | ||
457 | STD_EXCEPTION_COMMON(0x1300, instruction_breakpoint, .instruction_breakpoint_exception) | ||
458 | #ifdef CONFIG_ALTIVEC | ||
459 | STD_EXCEPTION_COMMON(0x1700, altivec_assist, .altivec_assist_exception) | ||
460 | #else | ||
461 | STD_EXCEPTION_COMMON(0x1700, altivec_assist, .unknown_exception) | ||
462 | #endif | ||
463 | #ifdef CONFIG_CBE_RAS | ||
464 | STD_EXCEPTION_COMMON(0x1200, cbe_system_error, .cbe_system_error_exception) | ||
465 | STD_EXCEPTION_COMMON(0x1600, cbe_maintenance, .cbe_maintenance_exception) | ||
466 | STD_EXCEPTION_COMMON(0x1800, cbe_thermal, .cbe_thermal_exception) | ||
467 | #endif /* CONFIG_CBE_RAS */ | ||
468 | |||
469 | .align 7 | ||
470 | system_call_entry: | ||
471 | b system_call_common | ||
472 | |||
473 | /* | ||
474 | * Here we have detected that the kernel stack pointer is bad. | ||
475 | * R9 contains the saved CR, r13 points to the paca, | ||
476 | * r10 contains the (bad) kernel stack pointer, | ||
477 | * r11 and r12 contain the saved SRR0 and SRR1. | ||
478 | * We switch to using an emergency stack, save the registers there, | ||
479 | * and call kernel_bad_stack(), which panics. | ||
480 | */ | ||
481 | bad_stack: | ||
482 | ld r1,PACAEMERGSP(r13) | ||
483 | subi r1,r1,64+INT_FRAME_SIZE | ||
484 | std r9,_CCR(r1) | ||
485 | std r10,GPR1(r1) | ||
486 | std r11,_NIP(r1) | ||
487 | std r12,_MSR(r1) | ||
488 | mfspr r11,SPRN_DAR | ||
489 | mfspr r12,SPRN_DSISR | ||
490 | std r11,_DAR(r1) | ||
491 | std r12,_DSISR(r1) | ||
492 | mflr r10 | ||
493 | mfctr r11 | ||
494 | mfxer r12 | ||
495 | std r10,_LINK(r1) | ||
496 | std r11,_CTR(r1) | ||
497 | std r12,_XER(r1) | ||
498 | SAVE_GPR(0,r1) | ||
499 | SAVE_GPR(2,r1) | ||
500 | SAVE_4GPRS(3,r1) | ||
501 | SAVE_2GPRS(7,r1) | ||
502 | SAVE_10GPRS(12,r1) | ||
503 | SAVE_10GPRS(22,r1) | ||
504 | lhz r12,PACA_TRAP_SAVE(r13) | ||
505 | std r12,_TRAP(r1) | ||
506 | addi r11,r1,INT_FRAME_SIZE | ||
507 | std r11,0(r1) | ||
508 | li r12,0 | ||
509 | std r12,0(r11) | ||
510 | ld r2,PACATOC(r13) | ||
511 | 1: addi r3,r1,STACK_FRAME_OVERHEAD | ||
512 | bl .kernel_bad_stack | ||
513 | b 1b | ||
514 | |||
515 | /* | ||
516 | * Here r13 points to the paca, r9 contains the saved CR, | ||
517 | * SRR0 and SRR1 are saved in r11 and r12, | ||
518 | * r9 - r13 are saved in paca->exgen. | ||
519 | */ | ||
520 | .align 7 | ||
521 | .globl data_access_common | ||
522 | data_access_common: | ||
523 | mfspr r10,SPRN_DAR | ||
524 | std r10,PACA_EXGEN+EX_DAR(r13) | ||
525 | mfspr r10,SPRN_DSISR | ||
526 | stw r10,PACA_EXGEN+EX_DSISR(r13) | ||
527 | EXCEPTION_PROLOG_COMMON(0x300, PACA_EXGEN) | ||
528 | ld r3,PACA_EXGEN+EX_DAR(r13) | ||
529 | lwz r4,PACA_EXGEN+EX_DSISR(r13) | ||
530 | li r5,0x300 | ||
531 | b .do_hash_page /* Try to handle as hpte fault */ | ||
532 | |||
533 | .align 7 | ||
534 | .globl instruction_access_common | ||
535 | instruction_access_common: | ||
536 | EXCEPTION_PROLOG_COMMON(0x400, PACA_EXGEN) | ||
537 | ld r3,_NIP(r1) | ||
538 | andis. r4,r12,0x5820 | ||
539 | li r5,0x400 | ||
540 | b .do_hash_page /* Try to handle as hpte fault */ | ||
541 | |||
542 | /* | ||
543 | * Here is the common SLB miss user that is used when going to virtual | ||
544 | * mode for SLB misses, that is currently not used | ||
545 | */ | ||
546 | #ifdef __DISABLED__ | ||
547 | .align 7 | ||
548 | .globl slb_miss_user_common | ||
549 | slb_miss_user_common: | ||
550 | mflr r10 | ||
551 | std r3,PACA_EXGEN+EX_DAR(r13) | ||
552 | stw r9,PACA_EXGEN+EX_CCR(r13) | ||
553 | std r10,PACA_EXGEN+EX_LR(r13) | ||
554 | std r11,PACA_EXGEN+EX_SRR0(r13) | ||
555 | bl .slb_allocate_user | ||
556 | |||
557 | ld r10,PACA_EXGEN+EX_LR(r13) | ||
558 | ld r3,PACA_EXGEN+EX_R3(r13) | ||
559 | lwz r9,PACA_EXGEN+EX_CCR(r13) | ||
560 | ld r11,PACA_EXGEN+EX_SRR0(r13) | ||
561 | mtlr r10 | ||
562 | beq- slb_miss_fault | ||
563 | |||
564 | andi. r10,r12,MSR_RI /* check for unrecoverable exception */ | ||
565 | beq- unrecov_user_slb | ||
566 | mfmsr r10 | ||
567 | |||
568 | .machine push | ||
569 | .machine "power4" | ||
570 | mtcrf 0x80,r9 | ||
571 | .machine pop | ||
572 | |||
573 | clrrdi r10,r10,2 /* clear RI before setting SRR0/1 */ | ||
574 | mtmsrd r10,1 | ||
575 | |||
576 | mtspr SRR0,r11 | ||
577 | mtspr SRR1,r12 | ||
578 | |||
579 | ld r9,PACA_EXGEN+EX_R9(r13) | ||
580 | ld r10,PACA_EXGEN+EX_R10(r13) | ||
581 | ld r11,PACA_EXGEN+EX_R11(r13) | ||
582 | ld r12,PACA_EXGEN+EX_R12(r13) | ||
583 | ld r13,PACA_EXGEN+EX_R13(r13) | ||
584 | rfid | ||
585 | b . | ||
586 | |||
587 | slb_miss_fault: | ||
588 | EXCEPTION_PROLOG_COMMON(0x380, PACA_EXGEN) | ||
589 | ld r4,PACA_EXGEN+EX_DAR(r13) | ||
590 | li r5,0 | ||
591 | std r4,_DAR(r1) | ||
592 | std r5,_DSISR(r1) | ||
593 | b handle_page_fault | ||
594 | |||
595 | unrecov_user_slb: | ||
596 | EXCEPTION_PROLOG_COMMON(0x4200, PACA_EXGEN) | ||
597 | DISABLE_INTS | ||
598 | bl .save_nvgprs | ||
599 | 1: addi r3,r1,STACK_FRAME_OVERHEAD | ||
600 | bl .unrecoverable_exception | ||
601 | b 1b | ||
602 | |||
603 | #endif /* __DISABLED__ */ | ||
604 | |||
605 | |||
606 | /* | ||
607 | * r13 points to the PACA, r9 contains the saved CR, | ||
608 | * r12 contain the saved SRR1, SRR0 is still ready for return | ||
609 | * r3 has the faulting address | ||
610 | * r9 - r13 are saved in paca->exslb. | ||
611 | * r3 is saved in paca->slb_r3 | ||
612 | * We assume we aren't going to take any exceptions during this procedure. | ||
613 | */ | ||
614 | _GLOBAL(slb_miss_realmode) | ||
615 | mflr r10 | ||
616 | #ifdef CONFIG_RELOCATABLE | ||
617 | mtctr r11 | ||
618 | #endif | ||
619 | |||
620 | stw r9,PACA_EXSLB+EX_CCR(r13) /* save CR in exc. frame */ | ||
621 | std r10,PACA_EXSLB+EX_LR(r13) /* save LR */ | ||
622 | |||
623 | bl .slb_allocate_realmode | ||
624 | |||
625 | /* All done -- return from exception. */ | ||
626 | |||
627 | ld r10,PACA_EXSLB+EX_LR(r13) | ||
628 | ld r3,PACA_EXSLB+EX_R3(r13) | ||
629 | lwz r9,PACA_EXSLB+EX_CCR(r13) /* get saved CR */ | ||
630 | #ifdef CONFIG_PPC_ISERIES | ||
631 | BEGIN_FW_FTR_SECTION | ||
632 | ld r11,PACALPPACAPTR(r13) | ||
633 | ld r11,LPPACASRR0(r11) /* get SRR0 value */ | ||
634 | END_FW_FTR_SECTION_IFSET(FW_FEATURE_ISERIES) | ||
635 | #endif /* CONFIG_PPC_ISERIES */ | ||
636 | |||
637 | mtlr r10 | ||
638 | |||
639 | andi. r10,r12,MSR_RI /* check for unrecoverable exception */ | ||
640 | beq- 2f | ||
641 | |||
642 | .machine push | ||
643 | .machine "power4" | ||
644 | mtcrf 0x80,r9 | ||
645 | mtcrf 0x01,r9 /* slb_allocate uses cr0 and cr7 */ | ||
646 | .machine pop | ||
647 | |||
648 | #ifdef CONFIG_PPC_ISERIES | ||
649 | BEGIN_FW_FTR_SECTION | ||
650 | mtspr SPRN_SRR0,r11 | ||
651 | mtspr SPRN_SRR1,r12 | ||
652 | END_FW_FTR_SECTION_IFSET(FW_FEATURE_ISERIES) | ||
653 | #endif /* CONFIG_PPC_ISERIES */ | ||
654 | ld r9,PACA_EXSLB+EX_R9(r13) | ||
655 | ld r10,PACA_EXSLB+EX_R10(r13) | ||
656 | ld r11,PACA_EXSLB+EX_R11(r13) | ||
657 | ld r12,PACA_EXSLB+EX_R12(r13) | ||
658 | ld r13,PACA_EXSLB+EX_R13(r13) | ||
659 | rfid | ||
660 | b . /* prevent speculative execution */ | ||
661 | |||
662 | 2: | ||
663 | #ifdef CONFIG_PPC_ISERIES | ||
664 | BEGIN_FW_FTR_SECTION | ||
665 | b unrecov_slb | ||
666 | END_FW_FTR_SECTION_IFSET(FW_FEATURE_ISERIES) | ||
667 | #endif /* CONFIG_PPC_ISERIES */ | ||
668 | mfspr r11,SPRN_SRR0 | ||
669 | ld r10,PACAKBASE(r13) | ||
670 | LOAD_HANDLER(r10,unrecov_slb) | ||
671 | mtspr SPRN_SRR0,r10 | ||
672 | ld r10,PACAKMSR(r13) | ||
673 | mtspr SPRN_SRR1,r10 | ||
674 | rfid | ||
675 | b . | ||
676 | |||
677 | unrecov_slb: | ||
678 | EXCEPTION_PROLOG_COMMON(0x4100, PACA_EXSLB) | ||
679 | DISABLE_INTS | ||
680 | bl .save_nvgprs | ||
681 | 1: addi r3,r1,STACK_FRAME_OVERHEAD | ||
682 | bl .unrecoverable_exception | ||
683 | b 1b | ||
684 | |||
685 | .align 7 | ||
686 | .globl hardware_interrupt_common | ||
687 | .globl hardware_interrupt_entry | ||
688 | hardware_interrupt_common: | ||
689 | EXCEPTION_PROLOG_COMMON(0x500, PACA_EXGEN) | ||
690 | FINISH_NAP | ||
691 | hardware_interrupt_entry: | ||
692 | DISABLE_INTS | ||
693 | BEGIN_FTR_SECTION | ||
694 | bl .ppc64_runlatch_on | ||
695 | END_FTR_SECTION_IFSET(CPU_FTR_CTRL) | ||
696 | addi r3,r1,STACK_FRAME_OVERHEAD | ||
697 | bl .do_IRQ | ||
698 | b .ret_from_except_lite | ||
699 | |||
700 | #ifdef CONFIG_PPC_970_NAP | ||
701 | power4_fixup_nap: | ||
702 | andc r9,r9,r10 | ||
703 | std r9,TI_LOCAL_FLAGS(r11) | ||
704 | ld r10,_LINK(r1) /* make idle task do the */ | ||
705 | std r10,_NIP(r1) /* equivalent of a blr */ | ||
706 | blr | ||
707 | #endif | ||
708 | |||
709 | .align 7 | ||
710 | .globl alignment_common | ||
711 | alignment_common: | ||
712 | mfspr r10,SPRN_DAR | ||
713 | std r10,PACA_EXGEN+EX_DAR(r13) | ||
714 | mfspr r10,SPRN_DSISR | ||
715 | stw r10,PACA_EXGEN+EX_DSISR(r13) | ||
716 | EXCEPTION_PROLOG_COMMON(0x600, PACA_EXGEN) | ||
717 | ld r3,PACA_EXGEN+EX_DAR(r13) | ||
718 | lwz r4,PACA_EXGEN+EX_DSISR(r13) | ||
719 | std r3,_DAR(r1) | ||
720 | std r4,_DSISR(r1) | ||
721 | bl .save_nvgprs | ||
722 | addi r3,r1,STACK_FRAME_OVERHEAD | ||
723 | ENABLE_INTS | ||
724 | bl .alignment_exception | ||
725 | b .ret_from_except | ||
726 | |||
727 | .align 7 | ||
728 | .globl program_check_common | ||
729 | program_check_common: | ||
730 | EXCEPTION_PROLOG_COMMON(0x700, PACA_EXGEN) | ||
731 | bl .save_nvgprs | ||
732 | addi r3,r1,STACK_FRAME_OVERHEAD | ||
733 | ENABLE_INTS | ||
734 | bl .program_check_exception | ||
735 | b .ret_from_except | ||
736 | |||
737 | .align 7 | ||
738 | .globl fp_unavailable_common | ||
739 | fp_unavailable_common: | ||
740 | EXCEPTION_PROLOG_COMMON(0x800, PACA_EXGEN) | ||
741 | bne 1f /* if from user, just load it up */ | ||
742 | bl .save_nvgprs | ||
743 | addi r3,r1,STACK_FRAME_OVERHEAD | ||
744 | ENABLE_INTS | ||
745 | bl .kernel_fp_unavailable_exception | ||
746 | BUG_OPCODE | ||
747 | 1: bl .load_up_fpu | ||
748 | b fast_exception_return | ||
749 | |||
750 | .align 7 | ||
751 | .globl altivec_unavailable_common | ||
752 | altivec_unavailable_common: | ||
753 | EXCEPTION_PROLOG_COMMON(0xf20, PACA_EXGEN) | ||
754 | #ifdef CONFIG_ALTIVEC | ||
755 | BEGIN_FTR_SECTION | ||
756 | beq 1f | ||
757 | bl .load_up_altivec | ||
758 | b fast_exception_return | ||
759 | 1: | ||
760 | END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC) | ||
761 | #endif | ||
762 | bl .save_nvgprs | ||
763 | addi r3,r1,STACK_FRAME_OVERHEAD | ||
764 | ENABLE_INTS | ||
765 | bl .altivec_unavailable_exception | ||
766 | b .ret_from_except | ||
767 | |||
768 | .align 7 | ||
769 | .globl vsx_unavailable_common | ||
770 | vsx_unavailable_common: | ||
771 | EXCEPTION_PROLOG_COMMON(0xf40, PACA_EXGEN) | ||
772 | #ifdef CONFIG_VSX | ||
773 | BEGIN_FTR_SECTION | ||
774 | bne .load_up_vsx | ||
775 | 1: | ||
776 | END_FTR_SECTION_IFSET(CPU_FTR_VSX) | ||
777 | #endif | ||
778 | bl .save_nvgprs | ||
779 | addi r3,r1,STACK_FRAME_OVERHEAD | ||
780 | ENABLE_INTS | ||
781 | bl .vsx_unavailable_exception | ||
782 | b .ret_from_except | ||
783 | |||
784 | .align 7 | ||
785 | .globl __end_handlers | ||
786 | __end_handlers: | ||
787 | |||
788 | /* | ||
789 | * Return from an exception with minimal checks. | ||
790 | * The caller is assumed to have done EXCEPTION_PROLOG_COMMON. | ||
791 | * If interrupts have been enabled, or anything has been | ||
792 | * done that might have changed the scheduling status of | ||
793 | * any task or sent any task a signal, you should use | ||
794 | * ret_from_except or ret_from_except_lite instead of this. | ||
795 | */ | 162 | */ |
796 | fast_exc_return_irq: /* restores irq state too */ | 163 | #ifdef CONFIG_PPC_BOOK3S |
797 | ld r3,SOFTE(r1) | 164 | #include "exceptions-64s.S" |
798 | TRACE_AND_RESTORE_IRQ(r3); | ||
799 | ld r12,_MSR(r1) | ||
800 | rldicl r4,r12,49,63 /* get MSR_EE to LSB */ | ||
801 | stb r4,PACAHARDIRQEN(r13) /* restore paca->hard_enabled */ | ||
802 | b 1f | ||
803 | |||
804 | .globl fast_exception_return | ||
805 | fast_exception_return: | ||
806 | ld r12,_MSR(r1) | ||
807 | 1: ld r11,_NIP(r1) | ||
808 | andi. r3,r12,MSR_RI /* check if RI is set */ | ||
809 | beq- unrecov_fer | ||
810 | |||
811 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING | ||
812 | andi. r3,r12,MSR_PR | ||
813 | beq 2f | ||
814 | ACCOUNT_CPU_USER_EXIT(r3, r4) | ||
815 | 2: | ||
816 | #endif | 165 | #endif |
817 | 166 | ||
818 | ld r3,_CCR(r1) | ||
819 | ld r4,_LINK(r1) | ||
820 | ld r5,_CTR(r1) | ||
821 | ld r6,_XER(r1) | ||
822 | mtcr r3 | ||
823 | mtlr r4 | ||
824 | mtctr r5 | ||
825 | mtxer r6 | ||
826 | REST_GPR(0, r1) | ||
827 | REST_8GPRS(2, r1) | ||
828 | |||
829 | mfmsr r10 | ||
830 | rldicl r10,r10,48,1 /* clear EE */ | ||
831 | rldicr r10,r10,16,61 /* clear RI (LE is 0 already) */ | ||
832 | mtmsrd r10,1 | ||
833 | |||
834 | mtspr SPRN_SRR1,r12 | ||
835 | mtspr SPRN_SRR0,r11 | ||
836 | REST_4GPRS(10, r1) | ||
837 | ld r1,GPR1(r1) | ||
838 | rfid | ||
839 | b . /* prevent speculative execution */ | ||
840 | |||
841 | unrecov_fer: | ||
842 | bl .save_nvgprs | ||
843 | 1: addi r3,r1,STACK_FRAME_OVERHEAD | ||
844 | bl .unrecoverable_exception | ||
845 | b 1b | ||
846 | |||
847 | #ifdef CONFIG_ALTIVEC | ||
848 | /* | ||
849 | * load_up_altivec(unused, unused, tsk) | ||
850 | * Disable VMX for the task which had it previously, | ||
851 | * and save its vector registers in its thread_struct. | ||
852 | * Enables the VMX for use in the kernel on return. | ||
853 | * On SMP we know the VMX is free, since we give it up every | ||
854 | * switch (ie, no lazy save of the vector registers). | ||
855 | * On entry: r13 == 'current' && last_task_used_altivec != 'current' | ||
856 | */ | ||
857 | _STATIC(load_up_altivec) | ||
858 | mfmsr r5 /* grab the current MSR */ | ||
859 | oris r5,r5,MSR_VEC@h | ||
860 | mtmsrd r5 /* enable use of VMX now */ | ||
861 | isync | ||
862 | |||
863 | /* | ||
864 | * For SMP, we don't do lazy VMX switching because it just gets too | ||
865 | * horrendously complex, especially when a task switches from one CPU | ||
866 | * to another. Instead we call giveup_altvec in switch_to. | ||
867 | * VRSAVE isn't dealt with here, that is done in the normal context | ||
868 | * switch code. Note that we could rely on vrsave value to eventually | ||
869 | * avoid saving all of the VREGs here... | ||
870 | */ | ||
871 | #ifndef CONFIG_SMP | ||
872 | ld r3,last_task_used_altivec@got(r2) | ||
873 | ld r4,0(r3) | ||
874 | cmpdi 0,r4,0 | ||
875 | beq 1f | ||
876 | /* Save VMX state to last_task_used_altivec's THREAD struct */ | ||
877 | addi r4,r4,THREAD | ||
878 | SAVE_32VRS(0,r5,r4) | ||
879 | mfvscr vr0 | ||
880 | li r10,THREAD_VSCR | ||
881 | stvx vr0,r10,r4 | ||
882 | /* Disable VMX for last_task_used_altivec */ | ||
883 | ld r5,PT_REGS(r4) | ||
884 | ld r4,_MSR-STACK_FRAME_OVERHEAD(r5) | ||
885 | lis r6,MSR_VEC@h | ||
886 | andc r4,r4,r6 | ||
887 | std r4,_MSR-STACK_FRAME_OVERHEAD(r5) | ||
888 | 1: | ||
889 | #endif /* CONFIG_SMP */ | ||
890 | /* Hack: if we get an altivec unavailable trap with VRSAVE | ||
891 | * set to all zeros, we assume this is a broken application | ||
892 | * that fails to set it properly, and thus we switch it to | ||
893 | * all 1's | ||
894 | */ | ||
895 | mfspr r4,SPRN_VRSAVE | ||
896 | cmpdi 0,r4,0 | ||
897 | bne+ 1f | ||
898 | li r4,-1 | ||
899 | mtspr SPRN_VRSAVE,r4 | ||
900 | 1: | ||
901 | /* enable use of VMX after return */ | ||
902 | ld r4,PACACURRENT(r13) | ||
903 | addi r5,r4,THREAD /* Get THREAD */ | ||
904 | oris r12,r12,MSR_VEC@h | ||
905 | std r12,_MSR(r1) | ||
906 | li r4,1 | ||
907 | li r10,THREAD_VSCR | ||
908 | stw r4,THREAD_USED_VR(r5) | ||
909 | lvx vr0,r10,r5 | ||
910 | mtvscr vr0 | ||
911 | REST_32VRS(0,r4,r5) | ||
912 | #ifndef CONFIG_SMP | ||
913 | /* Update last_task_used_math to 'current' */ | ||
914 | subi r4,r5,THREAD /* Back to 'current' */ | ||
915 | std r4,0(r3) | ||
916 | #endif /* CONFIG_SMP */ | ||
917 | /* restore registers and return */ | ||
918 | blr | ||
919 | #endif /* CONFIG_ALTIVEC */ | ||
920 | |||
921 | #ifdef CONFIG_VSX | ||
922 | /* | ||
923 | * load_up_vsx(unused, unused, tsk) | ||
924 | * Disable VSX for the task which had it previously, | ||
925 | * and save its vector registers in its thread_struct. | ||
926 | * Reuse the fp and vsx saves, but first check to see if they have | ||
927 | * been saved already. | ||
928 | * On entry: r13 == 'current' && last_task_used_vsx != 'current' | ||
929 | */ | ||
930 | _STATIC(load_up_vsx) | ||
931 | /* Load FP and VSX registers if they haven't been done yet */ | ||
932 | andi. r5,r12,MSR_FP | ||
933 | beql+ load_up_fpu /* skip if already loaded */ | ||
934 | andis. r5,r12,MSR_VEC@h | ||
935 | beql+ load_up_altivec /* skip if already loaded */ | ||
936 | |||
937 | #ifndef CONFIG_SMP | ||
938 | ld r3,last_task_used_vsx@got(r2) | ||
939 | ld r4,0(r3) | ||
940 | cmpdi 0,r4,0 | ||
941 | beq 1f | ||
942 | /* Disable VSX for last_task_used_vsx */ | ||
943 | addi r4,r4,THREAD | ||
944 | ld r5,PT_REGS(r4) | ||
945 | ld r4,_MSR-STACK_FRAME_OVERHEAD(r5) | ||
946 | lis r6,MSR_VSX@h | ||
947 | andc r6,r4,r6 | ||
948 | std r6,_MSR-STACK_FRAME_OVERHEAD(r5) | ||
949 | 1: | ||
950 | #endif /* CONFIG_SMP */ | ||
951 | ld r4,PACACURRENT(r13) | ||
952 | addi r4,r4,THREAD /* Get THREAD */ | ||
953 | li r6,1 | ||
954 | stw r6,THREAD_USED_VSR(r4) /* ... also set thread used vsr */ | ||
955 | /* enable use of VSX after return */ | ||
956 | oris r12,r12,MSR_VSX@h | ||
957 | std r12,_MSR(r1) | ||
958 | #ifndef CONFIG_SMP | ||
959 | /* Update last_task_used_math to 'current' */ | ||
960 | ld r4,PACACURRENT(r13) | ||
961 | std r4,0(r3) | ||
962 | #endif /* CONFIG_SMP */ | ||
963 | b fast_exception_return | ||
964 | #endif /* CONFIG_VSX */ | ||
965 | |||
966 | /* | ||
967 | * Hash table stuff | ||
968 | */ | ||
969 | .align 7 | ||
970 | _STATIC(do_hash_page) | ||
971 | std r3,_DAR(r1) | ||
972 | std r4,_DSISR(r1) | ||
973 | |||
974 | andis. r0,r4,0xa450 /* weird error? */ | ||
975 | bne- handle_page_fault /* if not, try to insert a HPTE */ | ||
976 | BEGIN_FTR_SECTION | ||
977 | andis. r0,r4,0x0020 /* Is it a segment table fault? */ | ||
978 | bne- do_ste_alloc /* If so handle it */ | ||
979 | END_FTR_SECTION_IFCLR(CPU_FTR_SLB) | ||
980 | |||
981 | /* | ||
982 | * On iSeries, we soft-disable interrupts here, then | ||
983 | * hard-enable interrupts so that the hash_page code can spin on | ||
984 | * the hash_table_lock without problems on a shared processor. | ||
985 | */ | ||
986 | DISABLE_INTS | ||
987 | |||
988 | /* | ||
989 | * Currently, trace_hardirqs_off() will be called by DISABLE_INTS | ||
990 | * and will clobber volatile registers when irq tracing is enabled | ||
991 | * so we need to reload them. It may be possible to be smarter here | ||
992 | * and move the irq tracing elsewhere but let's keep it simple for | ||
993 | * now | ||
994 | */ | ||
995 | #ifdef CONFIG_TRACE_IRQFLAGS | ||
996 | ld r3,_DAR(r1) | ||
997 | ld r4,_DSISR(r1) | ||
998 | ld r5,_TRAP(r1) | ||
999 | ld r12,_MSR(r1) | ||
1000 | clrrdi r5,r5,4 | ||
1001 | #endif /* CONFIG_TRACE_IRQFLAGS */ | ||
1002 | /* | ||
1003 | * We need to set the _PAGE_USER bit if MSR_PR is set or if we are | ||
1004 | * accessing a userspace segment (even from the kernel). We assume | ||
1005 | * kernel addresses always have the high bit set. | ||
1006 | */ | ||
1007 | rlwinm r4,r4,32-25+9,31-9,31-9 /* DSISR_STORE -> _PAGE_RW */ | ||
1008 | rotldi r0,r3,15 /* Move high bit into MSR_PR posn */ | ||
1009 | orc r0,r12,r0 /* MSR_PR | ~high_bit */ | ||
1010 | rlwimi r4,r0,32-13,30,30 /* becomes _PAGE_USER access bit */ | ||
1011 | ori r4,r4,1 /* add _PAGE_PRESENT */ | ||
1012 | rlwimi r4,r5,22+2,31-2,31-2 /* Set _PAGE_EXEC if trap is 0x400 */ | ||
1013 | |||
1014 | /* | ||
1015 | * r3 contains the faulting address | ||
1016 | * r4 contains the required access permissions | ||
1017 | * r5 contains the trap number | ||
1018 | * | ||
1019 | * at return r3 = 0 for success | ||
1020 | */ | ||
1021 | bl .hash_page /* build HPTE if possible */ | ||
1022 | cmpdi r3,0 /* see if hash_page succeeded */ | ||
1023 | |||
1024 | BEGIN_FW_FTR_SECTION | ||
1025 | /* | ||
1026 | * If we had interrupts soft-enabled at the point where the | ||
1027 | * DSI/ISI occurred, and an interrupt came in during hash_page, | ||
1028 | * handle it now. | ||
1029 | * We jump to ret_from_except_lite rather than fast_exception_return | ||
1030 | * because ret_from_except_lite will check for and handle pending | ||
1031 | * interrupts if necessary. | ||
1032 | */ | ||
1033 | beq 13f | ||
1034 | END_FW_FTR_SECTION_IFSET(FW_FEATURE_ISERIES) | ||
1035 | |||
1036 | BEGIN_FW_FTR_SECTION | ||
1037 | /* | ||
1038 | * Here we have interrupts hard-disabled, so it is sufficient | ||
1039 | * to restore paca->{soft,hard}_enable and get out. | ||
1040 | */ | ||
1041 | beq fast_exc_return_irq /* Return from exception on success */ | ||
1042 | END_FW_FTR_SECTION_IFCLR(FW_FEATURE_ISERIES) | ||
1043 | |||
1044 | /* For a hash failure, we don't bother re-enabling interrupts */ | ||
1045 | ble- 12f | ||
1046 | |||
1047 | /* | ||
1048 | * hash_page couldn't handle it, set soft interrupt enable back | ||
1049 | * to what it was before the trap. Note that .raw_local_irq_restore | ||
1050 | * handles any interrupts pending at this point. | ||
1051 | */ | ||
1052 | ld r3,SOFTE(r1) | ||
1053 | TRACE_AND_RESTORE_IRQ_PARTIAL(r3, 11f) | ||
1054 | bl .raw_local_irq_restore | ||
1055 | b 11f | ||
1056 | |||
1057 | /* Here we have a page fault that hash_page can't handle. */ | ||
1058 | handle_page_fault: | ||
1059 | ENABLE_INTS | ||
1060 | 11: ld r4,_DAR(r1) | ||
1061 | ld r5,_DSISR(r1) | ||
1062 | addi r3,r1,STACK_FRAME_OVERHEAD | ||
1063 | bl .do_page_fault | ||
1064 | cmpdi r3,0 | ||
1065 | beq+ 13f | ||
1066 | bl .save_nvgprs | ||
1067 | mr r5,r3 | ||
1068 | addi r3,r1,STACK_FRAME_OVERHEAD | ||
1069 | lwz r4,_DAR(r1) | ||
1070 | bl .bad_page_fault | ||
1071 | b .ret_from_except | ||
1072 | |||
1073 | 13: b .ret_from_except_lite | ||
1074 | |||
1075 | /* We have a page fault that hash_page could handle but HV refused | ||
1076 | * the PTE insertion | ||
1077 | */ | ||
1078 | 12: bl .save_nvgprs | ||
1079 | mr r5,r3 | ||
1080 | addi r3,r1,STACK_FRAME_OVERHEAD | ||
1081 | ld r4,_DAR(r1) | ||
1082 | bl .low_hash_fault | ||
1083 | b .ret_from_except | ||
1084 | |||
1085 | /* here we have a segment miss */ | ||
1086 | do_ste_alloc: | ||
1087 | bl .ste_allocate /* try to insert stab entry */ | ||
1088 | cmpdi r3,0 | ||
1089 | bne- handle_page_fault | ||
1090 | b fast_exception_return | ||
1091 | |||
1092 | /* | ||
1093 | * r13 points to the PACA, r9 contains the saved CR, | ||
1094 | * r11 and r12 contain the saved SRR0 and SRR1. | ||
1095 | * r9 - r13 are saved in paca->exslb. | ||
1096 | * We assume we aren't going to take any exceptions during this procedure. | ||
1097 | * We assume (DAR >> 60) == 0xc. | ||
1098 | */ | ||
1099 | .align 7 | ||
1100 | _GLOBAL(do_stab_bolted) | ||
1101 | stw r9,PACA_EXSLB+EX_CCR(r13) /* save CR in exc. frame */ | ||
1102 | std r11,PACA_EXSLB+EX_SRR0(r13) /* save SRR0 in exc. frame */ | ||
1103 | |||
1104 | /* Hash to the primary group */ | ||
1105 | ld r10,PACASTABVIRT(r13) | ||
1106 | mfspr r11,SPRN_DAR | ||
1107 | srdi r11,r11,28 | ||
1108 | rldimi r10,r11,7,52 /* r10 = first ste of the group */ | ||
1109 | |||
1110 | /* Calculate VSID */ | ||
1111 | /* This is a kernel address, so protovsid = ESID */ | ||
1112 | ASM_VSID_SCRAMBLE(r11, r9, 256M) | ||
1113 | rldic r9,r11,12,16 /* r9 = vsid << 12 */ | ||
1114 | |||
1115 | /* Search the primary group for a free entry */ | ||
1116 | 1: ld r11,0(r10) /* Test valid bit of the current ste */ | ||
1117 | andi. r11,r11,0x80 | ||
1118 | beq 2f | ||
1119 | addi r10,r10,16 | ||
1120 | andi. r11,r10,0x70 | ||
1121 | bne 1b | ||
1122 | |||
1123 | /* Stick for only searching the primary group for now. */ | ||
1124 | /* At least for now, we use a very simple random castout scheme */ | ||
1125 | /* Use the TB as a random number ; OR in 1 to avoid entry 0 */ | ||
1126 | mftb r11 | ||
1127 | rldic r11,r11,4,57 /* r11 = (r11 << 4) & 0x70 */ | ||
1128 | ori r11,r11,0x10 | ||
1129 | |||
1130 | /* r10 currently points to an ste one past the group of interest */ | ||
1131 | /* make it point to the randomly selected entry */ | ||
1132 | subi r10,r10,128 | ||
1133 | or r10,r10,r11 /* r10 is the entry to invalidate */ | ||
1134 | |||
1135 | isync /* mark the entry invalid */ | ||
1136 | ld r11,0(r10) | ||
1137 | rldicl r11,r11,56,1 /* clear the valid bit */ | ||
1138 | rotldi r11,r11,8 | ||
1139 | std r11,0(r10) | ||
1140 | sync | ||
1141 | |||
1142 | clrrdi r11,r11,28 /* Get the esid part of the ste */ | ||
1143 | slbie r11 | ||
1144 | |||
1145 | 2: std r9,8(r10) /* Store the vsid part of the ste */ | ||
1146 | eieio | ||
1147 | |||
1148 | mfspr r11,SPRN_DAR /* Get the new esid */ | ||
1149 | clrrdi r11,r11,28 /* Permits a full 32b of ESID */ | ||
1150 | ori r11,r11,0x90 /* Turn on valid and kp */ | ||
1151 | std r11,0(r10) /* Put new entry back into the stab */ | ||
1152 | |||
1153 | sync | ||
1154 | |||
1155 | /* All done -- return from exception. */ | ||
1156 | lwz r9,PACA_EXSLB+EX_CCR(r13) /* get saved CR */ | ||
1157 | ld r11,PACA_EXSLB+EX_SRR0(r13) /* get saved SRR0 */ | ||
1158 | |||
1159 | andi. r10,r12,MSR_RI | ||
1160 | beq- unrecov_slb | ||
1161 | |||
1162 | mtcrf 0x80,r9 /* restore CR */ | ||
1163 | |||
1164 | mfmsr r10 | ||
1165 | clrrdi r10,r10,2 | ||
1166 | mtmsrd r10,1 | ||
1167 | |||
1168 | mtspr SPRN_SRR0,r11 | ||
1169 | mtspr SPRN_SRR1,r12 | ||
1170 | ld r9,PACA_EXSLB+EX_R9(r13) | ||
1171 | ld r10,PACA_EXSLB+EX_R10(r13) | ||
1172 | ld r11,PACA_EXSLB+EX_R11(r13) | ||
1173 | ld r12,PACA_EXSLB+EX_R12(r13) | ||
1174 | ld r13,PACA_EXSLB+EX_R13(r13) | ||
1175 | rfid | ||
1176 | b . /* prevent speculative execution */ | ||
1177 | |||
1178 | /* | ||
1179 | * Space for CPU0's segment table. | ||
1180 | * | ||
1181 | * On iSeries, the hypervisor must fill in at least one entry before | ||
1182 | * we get control (with relocate on). The address is given to the hv | ||
1183 | * as a page number (see xLparMap below), so this must be at a | ||
1184 | * fixed address (the linker can't compute (u64)&initial_stab >> | ||
1185 | * PAGE_SHIFT). | ||
1186 | */ | ||
1187 | . = STAB0_OFFSET /* 0x6000 */ | ||
1188 | .globl initial_stab | ||
1189 | initial_stab: | ||
1190 | .space 4096 | ||
1191 | |||
1192 | #ifdef CONFIG_PPC_PSERIES | ||
1193 | /* | ||
1194 | * Data area reserved for FWNMI option. | ||
1195 | * This address (0x7000) is fixed by the RPA. | ||
1196 | */ | ||
1197 | .= 0x7000 | ||
1198 | .globl fwnmi_data_area | ||
1199 | fwnmi_data_area: | ||
1200 | #endif /* CONFIG_PPC_PSERIES */ | ||
1201 | |||
1202 | /* iSeries does not use the FWNMI stuff, so it is safe to put | ||
1203 | * this here, even if we later allow kernels that will boot on | ||
1204 | * both pSeries and iSeries */ | ||
1205 | #ifdef CONFIG_PPC_ISERIES | ||
1206 | . = LPARMAP_PHYS | ||
1207 | .globl xLparMap | ||
1208 | xLparMap: | ||
1209 | .quad HvEsidsToMap /* xNumberEsids */ | ||
1210 | .quad HvRangesToMap /* xNumberRanges */ | ||
1211 | .quad STAB0_PAGE /* xSegmentTableOffs */ | ||
1212 | .zero 40 /* xRsvd */ | ||
1213 | /* xEsids (HvEsidsToMap entries of 2 quads) */ | ||
1214 | .quad PAGE_OFFSET_ESID /* xKernelEsid */ | ||
1215 | .quad PAGE_OFFSET_VSID /* xKernelVsid */ | ||
1216 | .quad VMALLOC_START_ESID /* xKernelEsid */ | ||
1217 | .quad VMALLOC_START_VSID /* xKernelVsid */ | ||
1218 | /* xRanges (HvRangesToMap entries of 3 quads) */ | ||
1219 | .quad HvPagesToMap /* xPages */ | ||
1220 | .quad 0 /* xOffset */ | ||
1221 | .quad PAGE_OFFSET_VSID << (SID_SHIFT - HW_PAGE_SHIFT) /* xVPN */ | ||
1222 | |||
1223 | #endif /* CONFIG_PPC_ISERIES */ | ||
1224 | |||
1225 | #ifdef CONFIG_PPC_PSERIES | ||
1226 | . = 0x8000 | ||
1227 | #endif /* CONFIG_PPC_PSERIES */ | ||
1228 | 167 | ||
1229 | /* | 168 | /* |
1230 | * On pSeries and most other platforms, secondary processors spin | 169 | * On pSeries and most other platforms, secondary processors spin |
diff --git a/arch/powerpc/kernel/head_booke.h b/arch/powerpc/kernel/head_booke.h index 95f39f1e68d4..5f9febc8d143 100644 --- a/arch/powerpc/kernel/head_booke.h +++ b/arch/powerpc/kernel/head_booke.h | |||
@@ -256,7 +256,7 @@ label: | |||
256 | * off DE in the DSRR1 value and clearing the debug status. \ | 256 | * off DE in the DSRR1 value and clearing the debug status. \ |
257 | */ \ | 257 | */ \ |
258 | mfspr r10,SPRN_DBSR; /* check single-step/branch taken */ \ | 258 | mfspr r10,SPRN_DBSR; /* check single-step/branch taken */ \ |
259 | andis. r10,r10,DBSR_IC@h; \ | 259 | andis. r10,r10,(DBSR_IC|DBSR_BT)@h; \ |
260 | beq+ 2f; \ | 260 | beq+ 2f; \ |
261 | \ | 261 | \ |
262 | lis r10,KERNELBASE@h; /* check if exception in vectors */ \ | 262 | lis r10,KERNELBASE@h; /* check if exception in vectors */ \ |
@@ -271,7 +271,7 @@ label: | |||
271 | \ | 271 | \ |
272 | /* here it looks like we got an inappropriate debug exception. */ \ | 272 | /* here it looks like we got an inappropriate debug exception. */ \ |
273 | 1: rlwinm r9,r9,0,~MSR_DE; /* clear DE in the CDRR1 value */ \ | 273 | 1: rlwinm r9,r9,0,~MSR_DE; /* clear DE in the CDRR1 value */ \ |
274 | lis r10,DBSR_IC@h; /* clear the IC event */ \ | 274 | lis r10,(DBSR_IC|DBSR_BT)@h; /* clear the IC event */ \ |
275 | mtspr SPRN_DBSR,r10; \ | 275 | mtspr SPRN_DBSR,r10; \ |
276 | /* restore state and get out */ \ | 276 | /* restore state and get out */ \ |
277 | lwz r10,_CCR(r11); \ | 277 | lwz r10,_CCR(r11); \ |
@@ -309,7 +309,7 @@ label: | |||
309 | * off DE in the CSRR1 value and clearing the debug status. \ | 309 | * off DE in the CSRR1 value and clearing the debug status. \ |
310 | */ \ | 310 | */ \ |
311 | mfspr r10,SPRN_DBSR; /* check single-step/branch taken */ \ | 311 | mfspr r10,SPRN_DBSR; /* check single-step/branch taken */ \ |
312 | andis. r10,r10,DBSR_IC@h; \ | 312 | andis. r10,r10,(DBSR_IC|DBSR_BT)@h; \ |
313 | beq+ 2f; \ | 313 | beq+ 2f; \ |
314 | \ | 314 | \ |
315 | lis r10,KERNELBASE@h; /* check if exception in vectors */ \ | 315 | lis r10,KERNELBASE@h; /* check if exception in vectors */ \ |
@@ -317,14 +317,14 @@ label: | |||
317 | cmplw r12,r10; \ | 317 | cmplw r12,r10; \ |
318 | blt+ 2f; /* addr below exception vectors */ \ | 318 | blt+ 2f; /* addr below exception vectors */ \ |
319 | \ | 319 | \ |
320 | lis r10,DebugCrit@h; \ | 320 | lis r10,DebugCrit@h; \ |
321 | ori r10,r10,DebugCrit@l; \ | 321 | ori r10,r10,DebugCrit@l; \ |
322 | cmplw r12,r10; \ | 322 | cmplw r12,r10; \ |
323 | bgt+ 2f; /* addr above exception vectors */ \ | 323 | bgt+ 2f; /* addr above exception vectors */ \ |
324 | \ | 324 | \ |
325 | /* here it looks like we got an inappropriate debug exception. */ \ | 325 | /* here it looks like we got an inappropriate debug exception. */ \ |
326 | 1: rlwinm r9,r9,0,~MSR_DE; /* clear DE in the CSRR1 value */ \ | 326 | 1: rlwinm r9,r9,0,~MSR_DE; /* clear DE in the CSRR1 value */ \ |
327 | lis r10,DBSR_IC@h; /* clear the IC event */ \ | 327 | lis r10,(DBSR_IC|DBSR_BT)@h; /* clear the IC event */ \ |
328 | mtspr SPRN_DBSR,r10; \ | 328 | mtspr SPRN_DBSR,r10; \ |
329 | /* restore state and get out */ \ | 329 | /* restore state and get out */ \ |
330 | lwz r10,_CCR(r11); \ | 330 | lwz r10,_CCR(r11); \ |
diff --git a/arch/powerpc/kernel/irq.c b/arch/powerpc/kernel/irq.c index 844d3f882a15..f7f376ea7b17 100644 --- a/arch/powerpc/kernel/irq.c +++ b/arch/powerpc/kernel/irq.c | |||
@@ -118,6 +118,7 @@ notrace void raw_local_irq_restore(unsigned long en) | |||
118 | if (!en) | 118 | if (!en) |
119 | return; | 119 | return; |
120 | 120 | ||
121 | #ifdef CONFIG_PPC_STD_MMU_64 | ||
121 | if (firmware_has_feature(FW_FEATURE_ISERIES)) { | 122 | if (firmware_has_feature(FW_FEATURE_ISERIES)) { |
122 | /* | 123 | /* |
123 | * Do we need to disable preemption here? Not really: in the | 124 | * Do we need to disable preemption here? Not really: in the |
@@ -135,6 +136,7 @@ notrace void raw_local_irq_restore(unsigned long en) | |||
135 | if (local_paca->lppaca_ptr->int_dword.any_int) | 136 | if (local_paca->lppaca_ptr->int_dword.any_int) |
136 | iseries_handle_interrupts(); | 137 | iseries_handle_interrupts(); |
137 | } | 138 | } |
139 | #endif /* CONFIG_PPC_STD_MMU_64 */ | ||
138 | 140 | ||
139 | if (test_perf_counter_pending()) { | 141 | if (test_perf_counter_pending()) { |
140 | clear_perf_counter_pending(); | 142 | clear_perf_counter_pending(); |
@@ -254,77 +256,84 @@ void fixup_irqs(cpumask_t map) | |||
254 | } | 256 | } |
255 | #endif | 257 | #endif |
256 | 258 | ||
257 | void do_IRQ(struct pt_regs *regs) | ||
258 | { | ||
259 | struct pt_regs *old_regs = set_irq_regs(regs); | ||
260 | unsigned int irq; | ||
261 | #ifdef CONFIG_IRQSTACKS | 259 | #ifdef CONFIG_IRQSTACKS |
260 | static inline void handle_one_irq(unsigned int irq) | ||
261 | { | ||
262 | struct thread_info *curtp, *irqtp; | 262 | struct thread_info *curtp, *irqtp; |
263 | #endif | 263 | unsigned long saved_sp_limit; |
264 | struct irq_desc *desc; | ||
264 | 265 | ||
265 | irq_enter(); | 266 | /* Switch to the irq stack to handle this */ |
267 | curtp = current_thread_info(); | ||
268 | irqtp = hardirq_ctx[smp_processor_id()]; | ||
269 | |||
270 | if (curtp == irqtp) { | ||
271 | /* We're already on the irq stack, just handle it */ | ||
272 | generic_handle_irq(irq); | ||
273 | return; | ||
274 | } | ||
275 | |||
276 | desc = irq_desc + irq; | ||
277 | saved_sp_limit = current->thread.ksp_limit; | ||
278 | |||
279 | irqtp->task = curtp->task; | ||
280 | irqtp->flags = 0; | ||
281 | |||
282 | /* Copy the softirq bits in preempt_count so that the | ||
283 | * softirq checks work in the hardirq context. */ | ||
284 | irqtp->preempt_count = (irqtp->preempt_count & ~SOFTIRQ_MASK) | | ||
285 | (curtp->preempt_count & SOFTIRQ_MASK); | ||
286 | |||
287 | current->thread.ksp_limit = (unsigned long)irqtp + | ||
288 | _ALIGN_UP(sizeof(struct thread_info), 16); | ||
289 | |||
290 | call_handle_irq(irq, desc, irqtp, desc->handle_irq); | ||
291 | current->thread.ksp_limit = saved_sp_limit; | ||
292 | irqtp->task = NULL; | ||
293 | |||
294 | /* Set any flag that may have been set on the | ||
295 | * alternate stack | ||
296 | */ | ||
297 | if (irqtp->flags) | ||
298 | set_bits(irqtp->flags, &curtp->flags); | ||
299 | } | ||
300 | #else | ||
301 | static inline void handle_one_irq(unsigned int irq) | ||
302 | { | ||
303 | generic_handle_irq(irq); | ||
304 | } | ||
305 | #endif | ||
266 | 306 | ||
307 | static inline void check_stack_overflow(void) | ||
308 | { | ||
267 | #ifdef CONFIG_DEBUG_STACKOVERFLOW | 309 | #ifdef CONFIG_DEBUG_STACKOVERFLOW |
268 | /* Debugging check for stack overflow: is there less than 2KB free? */ | 310 | long sp; |
269 | { | ||
270 | long sp; | ||
271 | 311 | ||
272 | sp = __get_SP() & (THREAD_SIZE-1); | 312 | sp = __get_SP() & (THREAD_SIZE-1); |
273 | 313 | ||
274 | if (unlikely(sp < (sizeof(struct thread_info) + 2048))) { | 314 | /* check for stack overflow: is there less than 2KB free? */ |
275 | printk("do_IRQ: stack overflow: %ld\n", | 315 | if (unlikely(sp < (sizeof(struct thread_info) + 2048))) { |
276 | sp - sizeof(struct thread_info)); | 316 | printk("do_IRQ: stack overflow: %ld\n", |
277 | dump_stack(); | 317 | sp - sizeof(struct thread_info)); |
278 | } | 318 | dump_stack(); |
279 | } | 319 | } |
280 | #endif | 320 | #endif |
321 | } | ||
281 | 322 | ||
282 | /* | 323 | void do_IRQ(struct pt_regs *regs) |
283 | * Every platform is required to implement ppc_md.get_irq. | 324 | { |
284 | * This function will either return an irq number or NO_IRQ to | 325 | struct pt_regs *old_regs = set_irq_regs(regs); |
285 | * indicate there are no more pending. | 326 | unsigned int irq; |
286 | * The value NO_IRQ_IGNORE is for buggy hardware and means that this | ||
287 | * IRQ has already been handled. -- Tom | ||
288 | */ | ||
289 | irq = ppc_md.get_irq(); | ||
290 | 327 | ||
291 | if (irq != NO_IRQ && irq != NO_IRQ_IGNORE) { | 328 | irq_enter(); |
292 | #ifdef CONFIG_IRQSTACKS | ||
293 | /* Switch to the irq stack to handle this */ | ||
294 | curtp = current_thread_info(); | ||
295 | irqtp = hardirq_ctx[smp_processor_id()]; | ||
296 | if (curtp != irqtp) { | ||
297 | struct irq_desc *desc = irq_desc + irq; | ||
298 | void *handler = desc->handle_irq; | ||
299 | unsigned long saved_sp_limit = current->thread.ksp_limit; | ||
300 | if (handler == NULL) | ||
301 | handler = &__do_IRQ; | ||
302 | irqtp->task = curtp->task; | ||
303 | irqtp->flags = 0; | ||
304 | |||
305 | /* Copy the softirq bits in preempt_count so that the | ||
306 | * softirq checks work in the hardirq context. | ||
307 | */ | ||
308 | irqtp->preempt_count = | ||
309 | (irqtp->preempt_count & ~SOFTIRQ_MASK) | | ||
310 | (curtp->preempt_count & SOFTIRQ_MASK); | ||
311 | 329 | ||
312 | current->thread.ksp_limit = (unsigned long)irqtp + | 330 | check_stack_overflow(); |
313 | _ALIGN_UP(sizeof(struct thread_info), 16); | ||
314 | call_handle_irq(irq, desc, irqtp, handler); | ||
315 | current->thread.ksp_limit = saved_sp_limit; | ||
316 | irqtp->task = NULL; | ||
317 | 331 | ||
332 | irq = ppc_md.get_irq(); | ||
318 | 333 | ||
319 | /* Set any flag that may have been set on the | 334 | if (irq != NO_IRQ && irq != NO_IRQ_IGNORE) |
320 | * alternate stack | 335 | handle_one_irq(irq); |
321 | */ | 336 | else if (irq != NO_IRQ_IGNORE) |
322 | if (irqtp->flags) | ||
323 | set_bits(irqtp->flags, &curtp->flags); | ||
324 | } else | ||
325 | #endif | ||
326 | generic_handle_irq(irq); | ||
327 | } else if (irq != NO_IRQ_IGNORE) | ||
328 | /* That's not SMP safe ... but who cares ? */ | 337 | /* That's not SMP safe ... but who cares ? */ |
329 | ppc_spurious_interrupts++; | 338 | ppc_spurious_interrupts++; |
330 | 339 | ||
diff --git a/arch/powerpc/kernel/lparcfg.c b/arch/powerpc/kernel/lparcfg.c index 78b3f7840ade..2419cc706ff1 100644 --- a/arch/powerpc/kernel/lparcfg.c +++ b/arch/powerpc/kernel/lparcfg.c | |||
@@ -169,6 +169,9 @@ struct hvcall_ppp_data { | |||
169 | u8 unallocated_weight; | 169 | u8 unallocated_weight; |
170 | u16 active_procs_in_pool; | 170 | u16 active_procs_in_pool; |
171 | u16 active_system_procs; | 171 | u16 active_system_procs; |
172 | u16 phys_platform_procs; | ||
173 | u32 max_proc_cap_avail; | ||
174 | u32 entitled_proc_cap_avail; | ||
172 | }; | 175 | }; |
173 | 176 | ||
174 | /* | 177 | /* |
@@ -190,13 +193,18 @@ struct hvcall_ppp_data { | |||
190 | * XX - Unallocated Variable Processor Capacity Weight. | 193 | * XX - Unallocated Variable Processor Capacity Weight. |
191 | * XXXX - Active processors in Physical Processor Pool. | 194 | * XXXX - Active processors in Physical Processor Pool. |
192 | * XXXX - Processors active on platform. | 195 | * XXXX - Processors active on platform. |
196 | * R8 (QQQQRRRRRRSSSSSS). if ibm,partition-performance-parameters-level >= 1 | ||
197 | * XXXX - Physical platform procs allocated to virtualization. | ||
198 | * XXXXXX - Max procs capacity % available to the partitions pool. | ||
199 | * XXXXXX - Entitled procs capacity % available to the | ||
200 | * partitions pool. | ||
193 | */ | 201 | */ |
194 | static unsigned int h_get_ppp(struct hvcall_ppp_data *ppp_data) | 202 | static unsigned int h_get_ppp(struct hvcall_ppp_data *ppp_data) |
195 | { | 203 | { |
196 | unsigned long rc; | 204 | unsigned long rc; |
197 | unsigned long retbuf[PLPAR_HCALL_BUFSIZE]; | 205 | unsigned long retbuf[PLPAR_HCALL9_BUFSIZE]; |
198 | 206 | ||
199 | rc = plpar_hcall(H_GET_PPP, retbuf); | 207 | rc = plpar_hcall9(H_GET_PPP, retbuf); |
200 | 208 | ||
201 | ppp_data->entitlement = retbuf[0]; | 209 | ppp_data->entitlement = retbuf[0]; |
202 | ppp_data->unallocated_entitlement = retbuf[1]; | 210 | ppp_data->unallocated_entitlement = retbuf[1]; |
@@ -210,6 +218,10 @@ static unsigned int h_get_ppp(struct hvcall_ppp_data *ppp_data) | |||
210 | ppp_data->active_procs_in_pool = (retbuf[3] >> 2 * 8) & 0xffff; | 218 | ppp_data->active_procs_in_pool = (retbuf[3] >> 2 * 8) & 0xffff; |
211 | ppp_data->active_system_procs = retbuf[3] & 0xffff; | 219 | ppp_data->active_system_procs = retbuf[3] & 0xffff; |
212 | 220 | ||
221 | ppp_data->phys_platform_procs = retbuf[4] >> 6 * 8; | ||
222 | ppp_data->max_proc_cap_avail = (retbuf[4] >> 3 * 8) & 0xffffff; | ||
223 | ppp_data->entitled_proc_cap_avail = retbuf[4] & 0xffffff; | ||
224 | |||
213 | return rc; | 225 | return rc; |
214 | } | 226 | } |
215 | 227 | ||
@@ -234,6 +246,8 @@ static unsigned h_pic(unsigned long *pool_idle_time, | |||
234 | static void parse_ppp_data(struct seq_file *m) | 246 | static void parse_ppp_data(struct seq_file *m) |
235 | { | 247 | { |
236 | struct hvcall_ppp_data ppp_data; | 248 | struct hvcall_ppp_data ppp_data; |
249 | struct device_node *root; | ||
250 | const int *perf_level; | ||
237 | int rc; | 251 | int rc; |
238 | 252 | ||
239 | rc = h_get_ppp(&ppp_data); | 253 | rc = h_get_ppp(&ppp_data); |
@@ -267,6 +281,28 @@ static void parse_ppp_data(struct seq_file *m) | |||
267 | seq_printf(m, "capped=%d\n", ppp_data.capped); | 281 | seq_printf(m, "capped=%d\n", ppp_data.capped); |
268 | seq_printf(m, "unallocated_capacity=%lld\n", | 282 | seq_printf(m, "unallocated_capacity=%lld\n", |
269 | ppp_data.unallocated_entitlement); | 283 | ppp_data.unallocated_entitlement); |
284 | |||
285 | /* The last bits of information returned from h_get_ppp are only | ||
286 | * valid if the ibm,partition-performance-parameters-level | ||
287 | * property is >= 1. | ||
288 | */ | ||
289 | root = of_find_node_by_path("/"); | ||
290 | if (root) { | ||
291 | perf_level = of_get_property(root, | ||
292 | "ibm,partition-performance-parameters-level", | ||
293 | NULL); | ||
294 | if (perf_level && (*perf_level >= 1)) { | ||
295 | seq_printf(m, | ||
296 | "physical_procs_allocated_to_virtualization=%d\n", | ||
297 | ppp_data.phys_platform_procs); | ||
298 | seq_printf(m, "max_proc_capacity_available=%d\n", | ||
299 | ppp_data.max_proc_cap_avail); | ||
300 | seq_printf(m, "entitled_proc_capacity_available=%d\n", | ||
301 | ppp_data.entitled_proc_cap_avail); | ||
302 | } | ||
303 | |||
304 | of_node_put(root); | ||
305 | } | ||
270 | } | 306 | } |
271 | 307 | ||
272 | /** | 308 | /** |
diff --git a/arch/powerpc/kernel/misc_64.S b/arch/powerpc/kernel/misc_64.S index b9530b2395a2..a5cf9c1356a6 100644 --- a/arch/powerpc/kernel/misc_64.S +++ b/arch/powerpc/kernel/misc_64.S | |||
@@ -457,98 +457,6 @@ _GLOBAL(disable_kernel_fp) | |||
457 | isync | 457 | isync |
458 | blr | 458 | blr |
459 | 459 | ||
460 | #ifdef CONFIG_ALTIVEC | ||
461 | |||
462 | #if 0 /* this has no callers for now */ | ||
463 | /* | ||
464 | * disable_kernel_altivec() | ||
465 | * Disable the VMX. | ||
466 | */ | ||
467 | _GLOBAL(disable_kernel_altivec) | ||
468 | mfmsr r3 | ||
469 | rldicl r0,r3,(63-MSR_VEC_LG),1 | ||
470 | rldicl r3,r0,(MSR_VEC_LG+1),0 | ||
471 | mtmsrd r3 /* disable use of VMX now */ | ||
472 | isync | ||
473 | blr | ||
474 | #endif /* 0 */ | ||
475 | |||
476 | /* | ||
477 | * giveup_altivec(tsk) | ||
478 | * Disable VMX for the task given as the argument, | ||
479 | * and save the vector registers in its thread_struct. | ||
480 | * Enables the VMX for use in the kernel on return. | ||
481 | */ | ||
482 | _GLOBAL(giveup_altivec) | ||
483 | mfmsr r5 | ||
484 | oris r5,r5,MSR_VEC@h | ||
485 | mtmsrd r5 /* enable use of VMX now */ | ||
486 | isync | ||
487 | cmpdi 0,r3,0 | ||
488 | beqlr- /* if no previous owner, done */ | ||
489 | addi r3,r3,THREAD /* want THREAD of task */ | ||
490 | ld r5,PT_REGS(r3) | ||
491 | cmpdi 0,r5,0 | ||
492 | SAVE_32VRS(0,r4,r3) | ||
493 | mfvscr vr0 | ||
494 | li r4,THREAD_VSCR | ||
495 | stvx vr0,r4,r3 | ||
496 | beq 1f | ||
497 | ld r4,_MSR-STACK_FRAME_OVERHEAD(r5) | ||
498 | #ifdef CONFIG_VSX | ||
499 | BEGIN_FTR_SECTION | ||
500 | lis r3,(MSR_VEC|MSR_VSX)@h | ||
501 | FTR_SECTION_ELSE | ||
502 | lis r3,MSR_VEC@h | ||
503 | ALT_FTR_SECTION_END_IFSET(CPU_FTR_VSX) | ||
504 | #else | ||
505 | lis r3,MSR_VEC@h | ||
506 | #endif | ||
507 | andc r4,r4,r3 /* disable FP for previous task */ | ||
508 | std r4,_MSR-STACK_FRAME_OVERHEAD(r5) | ||
509 | 1: | ||
510 | #ifndef CONFIG_SMP | ||
511 | li r5,0 | ||
512 | ld r4,last_task_used_altivec@got(r2) | ||
513 | std r5,0(r4) | ||
514 | #endif /* CONFIG_SMP */ | ||
515 | blr | ||
516 | |||
517 | #endif /* CONFIG_ALTIVEC */ | ||
518 | |||
519 | #ifdef CONFIG_VSX | ||
520 | /* | ||
521 | * __giveup_vsx(tsk) | ||
522 | * Disable VSX for the task given as the argument. | ||
523 | * Does NOT save vsx registers. | ||
524 | * Enables the VSX for use in the kernel on return. | ||
525 | */ | ||
526 | _GLOBAL(__giveup_vsx) | ||
527 | mfmsr r5 | ||
528 | oris r5,r5,MSR_VSX@h | ||
529 | mtmsrd r5 /* enable use of VSX now */ | ||
530 | isync | ||
531 | |||
532 | cmpdi 0,r3,0 | ||
533 | beqlr- /* if no previous owner, done */ | ||
534 | addi r3,r3,THREAD /* want THREAD of task */ | ||
535 | ld r5,PT_REGS(r3) | ||
536 | cmpdi 0,r5,0 | ||
537 | beq 1f | ||
538 | ld r4,_MSR-STACK_FRAME_OVERHEAD(r5) | ||
539 | lis r3,MSR_VSX@h | ||
540 | andc r4,r4,r3 /* disable VSX for previous task */ | ||
541 | std r4,_MSR-STACK_FRAME_OVERHEAD(r5) | ||
542 | 1: | ||
543 | #ifndef CONFIG_SMP | ||
544 | li r5,0 | ||
545 | ld r4,last_task_used_vsx@got(r2) | ||
546 | std r5,0(r4) | ||
547 | #endif /* CONFIG_SMP */ | ||
548 | blr | ||
549 | |||
550 | #endif /* CONFIG_VSX */ | ||
551 | |||
552 | /* kexec_wait(phys_cpu) | 460 | /* kexec_wait(phys_cpu) |
553 | * | 461 | * |
554 | * wait for the flag to change, indicating this kernel is going away but | 462 | * wait for the flag to change, indicating this kernel is going away but |
diff --git a/arch/powerpc/kernel/paca.c b/arch/powerpc/kernel/paca.c index c744b327bcab..e9962c7f8a09 100644 --- a/arch/powerpc/kernel/paca.c +++ b/arch/powerpc/kernel/paca.c | |||
@@ -18,6 +18,8 @@ | |||
18 | * field correctly */ | 18 | * field correctly */ |
19 | extern unsigned long __toc_start; | 19 | extern unsigned long __toc_start; |
20 | 20 | ||
21 | #ifdef CONFIG_PPC_BOOK3S | ||
22 | |||
21 | /* | 23 | /* |
22 | * The structure which the hypervisor knows about - this structure | 24 | * The structure which the hypervisor knows about - this structure |
23 | * should not cross a page boundary. The vpa_init/register_vpa call | 25 | * should not cross a page boundary. The vpa_init/register_vpa call |
@@ -41,6 +43,10 @@ struct lppaca lppaca[] = { | |||
41 | }, | 43 | }, |
42 | }; | 44 | }; |
43 | 45 | ||
46 | #endif /* CONFIG_PPC_BOOK3S */ | ||
47 | |||
48 | #ifdef CONFIG_PPC_STD_MMU_64 | ||
49 | |||
44 | /* | 50 | /* |
45 | * 3 persistent SLBs are registered here. The buffer will be zero | 51 | * 3 persistent SLBs are registered here. The buffer will be zero |
46 | * initially, hence will all be invaild until we actually write them. | 52 | * initially, hence will all be invaild until we actually write them. |
@@ -52,6 +58,8 @@ struct slb_shadow slb_shadow[] __cacheline_aligned = { | |||
52 | }, | 58 | }, |
53 | }; | 59 | }; |
54 | 60 | ||
61 | #endif /* CONFIG_PPC_STD_MMU_64 */ | ||
62 | |||
55 | /* The Paca is an array with one entry per processor. Each contains an | 63 | /* The Paca is an array with one entry per processor. Each contains an |
56 | * lppaca, which contains the information shared between the | 64 | * lppaca, which contains the information shared between the |
57 | * hypervisor and Linux. | 65 | * hypervisor and Linux. |
@@ -77,15 +85,19 @@ void __init initialise_pacas(void) | |||
77 | for (cpu = 0; cpu < NR_CPUS; cpu++) { | 85 | for (cpu = 0; cpu < NR_CPUS; cpu++) { |
78 | struct paca_struct *new_paca = &paca[cpu]; | 86 | struct paca_struct *new_paca = &paca[cpu]; |
79 | 87 | ||
88 | #ifdef CONFIG_PPC_BOOK3S | ||
80 | new_paca->lppaca_ptr = &lppaca[cpu]; | 89 | new_paca->lppaca_ptr = &lppaca[cpu]; |
90 | #endif | ||
81 | new_paca->lock_token = 0x8000; | 91 | new_paca->lock_token = 0x8000; |
82 | new_paca->paca_index = cpu; | 92 | new_paca->paca_index = cpu; |
83 | new_paca->kernel_toc = kernel_toc; | 93 | new_paca->kernel_toc = kernel_toc; |
84 | new_paca->kernelbase = (unsigned long) _stext; | 94 | new_paca->kernelbase = (unsigned long) _stext; |
85 | new_paca->kernel_msr = MSR_KERNEL; | 95 | new_paca->kernel_msr = MSR_KERNEL; |
86 | new_paca->hw_cpu_id = 0xffff; | 96 | new_paca->hw_cpu_id = 0xffff; |
87 | new_paca->slb_shadow_ptr = &slb_shadow[cpu]; | ||
88 | new_paca->__current = &init_task; | 97 | new_paca->__current = &init_task; |
98 | #ifdef CONFIG_PPC_STD_MMU_64 | ||
99 | new_paca->slb_shadow_ptr = &slb_shadow[cpu]; | ||
100 | #endif /* CONFIG_PPC_STD_MMU_64 */ | ||
89 | 101 | ||
90 | } | 102 | } |
91 | } | 103 | } |
diff --git a/arch/powerpc/kernel/pci-common.c b/arch/powerpc/kernel/pci-common.c index 4fee63cb53ff..5a56e97c5ac0 100644 --- a/arch/powerpc/kernel/pci-common.c +++ b/arch/powerpc/kernel/pci-common.c | |||
@@ -1505,7 +1505,7 @@ void __init pcibios_resource_survey(void) | |||
1505 | * rest of the code later, for now, keep it as-is as our main | 1505 | * rest of the code later, for now, keep it as-is as our main |
1506 | * resource allocation function doesn't deal with sub-trees yet. | 1506 | * resource allocation function doesn't deal with sub-trees yet. |
1507 | */ | 1507 | */ |
1508 | void __devinit pcibios_claim_one_bus(struct pci_bus *bus) | 1508 | void pcibios_claim_one_bus(struct pci_bus *bus) |
1509 | { | 1509 | { |
1510 | struct pci_dev *dev; | 1510 | struct pci_dev *dev; |
1511 | struct pci_bus *child_bus; | 1511 | struct pci_bus *child_bus; |
@@ -1533,7 +1533,6 @@ void __devinit pcibios_claim_one_bus(struct pci_bus *bus) | |||
1533 | list_for_each_entry(child_bus, &bus->children, node) | 1533 | list_for_each_entry(child_bus, &bus->children, node) |
1534 | pcibios_claim_one_bus(child_bus); | 1534 | pcibios_claim_one_bus(child_bus); |
1535 | } | 1535 | } |
1536 | EXPORT_SYMBOL_GPL(pcibios_claim_one_bus); | ||
1537 | 1536 | ||
1538 | 1537 | ||
1539 | /* pcibios_finish_adding_to_bus | 1538 | /* pcibios_finish_adding_to_bus |
diff --git a/arch/powerpc/kernel/pci_32.c b/arch/powerpc/kernel/pci_32.c index d473634e39e3..3ae1c666ff92 100644 --- a/arch/powerpc/kernel/pci_32.c +++ b/arch/powerpc/kernel/pci_32.c | |||
@@ -33,7 +33,6 @@ int pcibios_assign_bus_offset = 1; | |||
33 | 33 | ||
34 | void pcibios_make_OF_bus_map(void); | 34 | void pcibios_make_OF_bus_map(void); |
35 | 35 | ||
36 | static void fixup_broken_pcnet32(struct pci_dev* dev); | ||
37 | static void fixup_cpc710_pci64(struct pci_dev* dev); | 36 | static void fixup_cpc710_pci64(struct pci_dev* dev); |
38 | #ifdef CONFIG_PPC_OF | 37 | #ifdef CONFIG_PPC_OF |
39 | static u8* pci_to_OF_bus_map; | 38 | static u8* pci_to_OF_bus_map; |
@@ -72,16 +71,6 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_MOTOROLA, PCI_ANY_ID, fixup_hide_host_res | |||
72 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_FREESCALE, PCI_ANY_ID, fixup_hide_host_resource_fsl); | 71 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_FREESCALE, PCI_ANY_ID, fixup_hide_host_resource_fsl); |
73 | 72 | ||
74 | static void | 73 | static void |
75 | fixup_broken_pcnet32(struct pci_dev* dev) | ||
76 | { | ||
77 | if ((dev->class>>8 == PCI_CLASS_NETWORK_ETHERNET)) { | ||
78 | dev->vendor = PCI_VENDOR_ID_AMD; | ||
79 | pci_write_config_word(dev, PCI_VENDOR_ID, PCI_VENDOR_ID_AMD); | ||
80 | } | ||
81 | } | ||
82 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_TRIDENT, PCI_ANY_ID, fixup_broken_pcnet32); | ||
83 | |||
84 | static void | ||
85 | fixup_cpc710_pci64(struct pci_dev* dev) | 74 | fixup_cpc710_pci64(struct pci_dev* dev) |
86 | { | 75 | { |
87 | /* Hide the PCI64 BARs from the kernel as their content doesn't | 76 | /* Hide the PCI64 BARs from the kernel as their content doesn't |
@@ -447,14 +436,6 @@ static int __init pcibios_init(void) | |||
447 | 436 | ||
448 | subsys_initcall(pcibios_init); | 437 | subsys_initcall(pcibios_init); |
449 | 438 | ||
450 | /* the next one is stolen from the alpha port... */ | ||
451 | void __init | ||
452 | pcibios_update_irq(struct pci_dev *dev, int irq) | ||
453 | { | ||
454 | pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq); | ||
455 | /* XXX FIXME - update OF device tree node interrupt property */ | ||
456 | } | ||
457 | |||
458 | static struct pci_controller* | 439 | static struct pci_controller* |
459 | pci_bus_to_hose(int bus) | 440 | pci_bus_to_hose(int bus) |
460 | { | 441 | { |
diff --git a/arch/powerpc/kernel/pci_64.c b/arch/powerpc/kernel/pci_64.c index 96edb6f8babb..9e8902fa14c7 100644 --- a/arch/powerpc/kernel/pci_64.c +++ b/arch/powerpc/kernel/pci_64.c | |||
@@ -43,16 +43,6 @@ unsigned long pci_probe_only = 1; | |||
43 | unsigned long pci_io_base = ISA_IO_BASE; | 43 | unsigned long pci_io_base = ISA_IO_BASE; |
44 | EXPORT_SYMBOL(pci_io_base); | 44 | EXPORT_SYMBOL(pci_io_base); |
45 | 45 | ||
46 | static void fixup_broken_pcnet32(struct pci_dev* dev) | ||
47 | { | ||
48 | if ((dev->class>>8 == PCI_CLASS_NETWORK_ETHERNET)) { | ||
49 | dev->vendor = PCI_VENDOR_ID_AMD; | ||
50 | pci_write_config_word(dev, PCI_VENDOR_ID, PCI_VENDOR_ID_AMD); | ||
51 | } | ||
52 | } | ||
53 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_TRIDENT, PCI_ANY_ID, fixup_broken_pcnet32); | ||
54 | |||
55 | |||
56 | static u32 get_int_prop(struct device_node *np, const char *name, u32 def) | 46 | static u32 get_int_prop(struct device_node *np, const char *name, u32 def) |
57 | { | 47 | { |
58 | const u32 *prop; | 48 | const u32 *prop; |
@@ -430,6 +420,9 @@ int pcibios_unmap_io_space(struct pci_bus *bus) | |||
430 | * so flushing the hash table is the only sane way to make sure | 420 | * so flushing the hash table is the only sane way to make sure |
431 | * that no hash entries are covering that removed bridge area | 421 | * that no hash entries are covering that removed bridge area |
432 | * while still allowing other busses overlapping those pages | 422 | * while still allowing other busses overlapping those pages |
423 | * | ||
424 | * Note: If we ever support P2P hotplug on Book3E, we'll have | ||
425 | * to do an appropriate TLB flush here too | ||
433 | */ | 426 | */ |
434 | if (bus->self) { | 427 | if (bus->self) { |
435 | struct resource *res = bus->resource[0]; | 428 | struct resource *res = bus->resource[0]; |
@@ -437,8 +430,10 @@ int pcibios_unmap_io_space(struct pci_bus *bus) | |||
437 | pr_debug("IO unmapping for PCI-PCI bridge %s\n", | 430 | pr_debug("IO unmapping for PCI-PCI bridge %s\n", |
438 | pci_name(bus->self)); | 431 | pci_name(bus->self)); |
439 | 432 | ||
433 | #ifdef CONFIG_PPC_STD_MMU_64 | ||
440 | __flush_hash_table_range(&init_mm, res->start + _IO_BASE, | 434 | __flush_hash_table_range(&init_mm, res->start + _IO_BASE, |
441 | res->end + _IO_BASE + 1); | 435 | res->end + _IO_BASE + 1); |
436 | #endif | ||
442 | return 0; | 437 | return 0; |
443 | } | 438 | } |
444 | 439 | ||
@@ -511,7 +506,7 @@ int __devinit pcibios_map_io_space(struct pci_bus *bus) | |||
511 | pr_debug("IO mapping for PHB %s\n", hose->dn->full_name); | 506 | pr_debug("IO mapping for PHB %s\n", hose->dn->full_name); |
512 | pr_debug(" phys=0x%016llx, virt=0x%p (alloc=0x%p)\n", | 507 | pr_debug(" phys=0x%016llx, virt=0x%p (alloc=0x%p)\n", |
513 | hose->io_base_phys, hose->io_base_virt, hose->io_base_alloc); | 508 | hose->io_base_phys, hose->io_base_virt, hose->io_base_alloc); |
514 | pr_debug(" size=0x%016lx (alloc=0x%016lx)\n", | 509 | pr_debug(" size=0x%016llx (alloc=0x%016lx)\n", |
515 | hose->pci_io_size, size_page); | 510 | hose->pci_io_size, size_page); |
516 | 511 | ||
517 | /* Establish the mapping */ | 512 | /* Establish the mapping */ |
diff --git a/arch/powerpc/kernel/pci_dn.c b/arch/powerpc/kernel/pci_dn.c index 1c67de52e3ce..d5e36e5dc7c2 100644 --- a/arch/powerpc/kernel/pci_dn.c +++ b/arch/powerpc/kernel/pci_dn.c | |||
@@ -27,7 +27,6 @@ | |||
27 | #include <asm/io.h> | 27 | #include <asm/io.h> |
28 | #include <asm/prom.h> | 28 | #include <asm/prom.h> |
29 | #include <asm/pci-bridge.h> | 29 | #include <asm/pci-bridge.h> |
30 | #include <asm/pSeries_reconfig.h> | ||
31 | #include <asm/ppc-pci.h> | 30 | #include <asm/ppc-pci.h> |
32 | #include <asm/firmware.h> | 31 | #include <asm/firmware.h> |
33 | 32 | ||
@@ -35,7 +34,7 @@ | |||
35 | * Traverse_func that inits the PCI fields of the device node. | 34 | * Traverse_func that inits the PCI fields of the device node. |
36 | * NOTE: this *must* be done before read/write config to the device. | 35 | * NOTE: this *must* be done before read/write config to the device. |
37 | */ | 36 | */ |
38 | static void * __devinit update_dn_pci_info(struct device_node *dn, void *data) | 37 | void * __devinit update_dn_pci_info(struct device_node *dn, void *data) |
39 | { | 38 | { |
40 | struct pci_controller *phb = data; | 39 | struct pci_controller *phb = data; |
41 | const int *type = | 40 | const int *type = |
@@ -184,29 +183,6 @@ struct device_node *fetch_dev_dn(struct pci_dev *dev) | |||
184 | } | 183 | } |
185 | EXPORT_SYMBOL(fetch_dev_dn); | 184 | EXPORT_SYMBOL(fetch_dev_dn); |
186 | 185 | ||
187 | static int pci_dn_reconfig_notifier(struct notifier_block *nb, unsigned long action, void *node) | ||
188 | { | ||
189 | struct device_node *np = node; | ||
190 | struct pci_dn *pci = NULL; | ||
191 | int err = NOTIFY_OK; | ||
192 | |||
193 | switch (action) { | ||
194 | case PSERIES_RECONFIG_ADD: | ||
195 | pci = np->parent->data; | ||
196 | if (pci) | ||
197 | update_dn_pci_info(np, pci->phb); | ||
198 | break; | ||
199 | default: | ||
200 | err = NOTIFY_DONE; | ||
201 | break; | ||
202 | } | ||
203 | return err; | ||
204 | } | ||
205 | |||
206 | static struct notifier_block pci_dn_reconfig_nb = { | ||
207 | .notifier_call = pci_dn_reconfig_notifier, | ||
208 | }; | ||
209 | |||
210 | /** | 186 | /** |
211 | * pci_devs_phb_init - Initialize phbs and pci devs under them. | 187 | * pci_devs_phb_init - Initialize phbs and pci devs under them. |
212 | * | 188 | * |
@@ -223,6 +199,4 @@ void __init pci_devs_phb_init(void) | |||
223 | /* This must be done first so the device nodes have valid pci info! */ | 199 | /* This must be done first so the device nodes have valid pci info! */ |
224 | list_for_each_entry_safe(phb, tmp, &hose_list, list_node) | 200 | list_for_each_entry_safe(phb, tmp, &hose_list, list_node) |
225 | pci_devs_phb_init_dynamic(phb); | 201 | pci_devs_phb_init_dynamic(phb); |
226 | |||
227 | pSeries_reconfig_notifier_register(&pci_dn_reconfig_nb); | ||
228 | } | 202 | } |
diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c index 7b44a33f03c2..3e7135bbe40f 100644 --- a/arch/powerpc/kernel/process.c +++ b/arch/powerpc/kernel/process.c | |||
@@ -650,7 +650,7 @@ int copy_thread(unsigned long clone_flags, unsigned long usp, | |||
650 | p->thread.ksp_limit = (unsigned long)task_stack_page(p) + | 650 | p->thread.ksp_limit = (unsigned long)task_stack_page(p) + |
651 | _ALIGN_UP(sizeof(struct thread_info), 16); | 651 | _ALIGN_UP(sizeof(struct thread_info), 16); |
652 | 652 | ||
653 | #ifdef CONFIG_PPC64 | 653 | #ifdef CONFIG_PPC_STD_MMU_64 |
654 | if (cpu_has_feature(CPU_FTR_SLB)) { | 654 | if (cpu_has_feature(CPU_FTR_SLB)) { |
655 | unsigned long sp_vsid; | 655 | unsigned long sp_vsid; |
656 | unsigned long llp = mmu_psize_defs[mmu_linear_psize].sllp; | 656 | unsigned long llp = mmu_psize_defs[mmu_linear_psize].sllp; |
diff --git a/arch/powerpc/kernel/prom.c b/arch/powerpc/kernel/prom.c index ce01ff2474da..d4405b95bfaa 100644 --- a/arch/powerpc/kernel/prom.c +++ b/arch/powerpc/kernel/prom.c | |||
@@ -585,7 +585,7 @@ static void __init check_cpu_pa_features(unsigned long node) | |||
585 | ibm_pa_features, ARRAY_SIZE(ibm_pa_features)); | 585 | ibm_pa_features, ARRAY_SIZE(ibm_pa_features)); |
586 | } | 586 | } |
587 | 587 | ||
588 | #ifdef CONFIG_PPC64 | 588 | #ifdef CONFIG_PPC_STD_MMU_64 |
589 | static void __init check_cpu_slb_size(unsigned long node) | 589 | static void __init check_cpu_slb_size(unsigned long node) |
590 | { | 590 | { |
591 | u32 *slb_size_ptr; | 591 | u32 *slb_size_ptr; |
diff --git a/arch/powerpc/kernel/ptrace.c b/arch/powerpc/kernel/ptrace.c index 3635be61f899..9fa2c7dcd05a 100644 --- a/arch/powerpc/kernel/ptrace.c +++ b/arch/powerpc/kernel/ptrace.c | |||
@@ -704,15 +704,34 @@ void user_enable_single_step(struct task_struct *task) | |||
704 | 704 | ||
705 | if (regs != NULL) { | 705 | if (regs != NULL) { |
706 | #if defined(CONFIG_40x) || defined(CONFIG_BOOKE) | 706 | #if defined(CONFIG_40x) || defined(CONFIG_BOOKE) |
707 | task->thread.dbcr0 &= ~DBCR0_BT; | ||
707 | task->thread.dbcr0 |= DBCR0_IDM | DBCR0_IC; | 708 | task->thread.dbcr0 |= DBCR0_IDM | DBCR0_IC; |
708 | regs->msr |= MSR_DE; | 709 | regs->msr |= MSR_DE; |
709 | #else | 710 | #else |
711 | regs->msr &= ~MSR_BE; | ||
710 | regs->msr |= MSR_SE; | 712 | regs->msr |= MSR_SE; |
711 | #endif | 713 | #endif |
712 | } | 714 | } |
713 | set_tsk_thread_flag(task, TIF_SINGLESTEP); | 715 | set_tsk_thread_flag(task, TIF_SINGLESTEP); |
714 | } | 716 | } |
715 | 717 | ||
718 | void user_enable_block_step(struct task_struct *task) | ||
719 | { | ||
720 | struct pt_regs *regs = task->thread.regs; | ||
721 | |||
722 | if (regs != NULL) { | ||
723 | #if defined(CONFIG_40x) || defined(CONFIG_BOOKE) | ||
724 | task->thread.dbcr0 &= ~DBCR0_IC; | ||
725 | task->thread.dbcr0 = DBCR0_IDM | DBCR0_BT; | ||
726 | regs->msr |= MSR_DE; | ||
727 | #else | ||
728 | regs->msr &= ~MSR_SE; | ||
729 | regs->msr |= MSR_BE; | ||
730 | #endif | ||
731 | } | ||
732 | set_tsk_thread_flag(task, TIF_SINGLESTEP); | ||
733 | } | ||
734 | |||
716 | void user_disable_single_step(struct task_struct *task) | 735 | void user_disable_single_step(struct task_struct *task) |
717 | { | 736 | { |
718 | struct pt_regs *regs = task->thread.regs; | 737 | struct pt_regs *regs = task->thread.regs; |
@@ -726,10 +745,10 @@ void user_disable_single_step(struct task_struct *task) | |||
726 | 745 | ||
727 | if (regs != NULL) { | 746 | if (regs != NULL) { |
728 | #if defined(CONFIG_40x) || defined(CONFIG_BOOKE) | 747 | #if defined(CONFIG_40x) || defined(CONFIG_BOOKE) |
729 | task->thread.dbcr0 &= ~(DBCR0_IC | DBCR0_IDM); | 748 | task->thread.dbcr0 &= ~(DBCR0_IC | DBCR0_BT | DBCR0_IDM); |
730 | regs->msr &= ~MSR_DE; | 749 | regs->msr &= ~MSR_DE; |
731 | #else | 750 | #else |
732 | regs->msr &= ~MSR_SE; | 751 | regs->msr &= ~(MSR_SE | MSR_BE); |
733 | #endif | 752 | #endif |
734 | } | 753 | } |
735 | clear_tsk_thread_flag(task, TIF_SINGLESTEP); | 754 | clear_tsk_thread_flag(task, TIF_SINGLESTEP); |
diff --git a/arch/powerpc/kernel/rtas_pci.c b/arch/powerpc/kernel/rtas_pci.c index 8869001ab5d7..54e66da8f743 100644 --- a/arch/powerpc/kernel/rtas_pci.c +++ b/arch/powerpc/kernel/rtas_pci.c | |||
@@ -93,10 +93,7 @@ static int rtas_pci_read_config(struct pci_bus *bus, | |||
93 | { | 93 | { |
94 | struct device_node *busdn, *dn; | 94 | struct device_node *busdn, *dn; |
95 | 95 | ||
96 | if (bus->self) | 96 | busdn = pci_bus_to_OF_node(bus); |
97 | busdn = pci_device_to_OF_node(bus->self); | ||
98 | else | ||
99 | busdn = bus->sysdata; /* must be a phb */ | ||
100 | 97 | ||
101 | /* Search only direct children of the bus */ | 98 | /* Search only direct children of the bus */ |
102 | for (dn = busdn->child; dn; dn = dn->sibling) { | 99 | for (dn = busdn->child; dn; dn = dn->sibling) { |
@@ -140,10 +137,7 @@ static int rtas_pci_write_config(struct pci_bus *bus, | |||
140 | { | 137 | { |
141 | struct device_node *busdn, *dn; | 138 | struct device_node *busdn, *dn; |
142 | 139 | ||
143 | if (bus->self) | 140 | busdn = pci_bus_to_OF_node(bus); |
144 | busdn = pci_device_to_OF_node(bus->self); | ||
145 | else | ||
146 | busdn = bus->sysdata; /* must be a phb */ | ||
147 | 141 | ||
148 | /* Search only direct children of the bus */ | 142 | /* Search only direct children of the bus */ |
149 | for (dn = busdn->child; dn; dn = dn->sibling) { | 143 | for (dn = busdn->child; dn; dn = dn->sibling) { |
diff --git a/arch/powerpc/kernel/setup_32.c b/arch/powerpc/kernel/setup_32.c index 9e1ca745d8f0..1d154248cf40 100644 --- a/arch/powerpc/kernel/setup_32.c +++ b/arch/powerpc/kernel/setup_32.c | |||
@@ -39,6 +39,7 @@ | |||
39 | #include <asm/serial.h> | 39 | #include <asm/serial.h> |
40 | #include <asm/udbg.h> | 40 | #include <asm/udbg.h> |
41 | #include <asm/mmu_context.h> | 41 | #include <asm/mmu_context.h> |
42 | #include <asm/swiotlb.h> | ||
42 | 43 | ||
43 | #include "setup.h" | 44 | #include "setup.h" |
44 | 45 | ||
@@ -332,6 +333,11 @@ void __init setup_arch(char **cmdline_p) | |||
332 | ppc_md.setup_arch(); | 333 | ppc_md.setup_arch(); |
333 | if ( ppc_md.progress ) ppc_md.progress("arch: exit", 0x3eab); | 334 | if ( ppc_md.progress ) ppc_md.progress("arch: exit", 0x3eab); |
334 | 335 | ||
336 | #ifdef CONFIG_SWIOTLB | ||
337 | if (ppc_swiotlb_enable) | ||
338 | swiotlb_init(); | ||
339 | #endif | ||
340 | |||
335 | paging_init(); | 341 | paging_init(); |
336 | 342 | ||
337 | /* Initialize the MMU context management stuff */ | 343 | /* Initialize the MMU context management stuff */ |
diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c index c410c606955d..f46548e66045 100644 --- a/arch/powerpc/kernel/setup_64.c +++ b/arch/powerpc/kernel/setup_64.c | |||
@@ -61,6 +61,7 @@ | |||
61 | #include <asm/xmon.h> | 61 | #include <asm/xmon.h> |
62 | #include <asm/udbg.h> | 62 | #include <asm/udbg.h> |
63 | #include <asm/kexec.h> | 63 | #include <asm/kexec.h> |
64 | #include <asm/swiotlb.h> | ||
64 | 65 | ||
65 | #include "setup.h" | 66 | #include "setup.h" |
66 | 67 | ||
@@ -417,9 +418,11 @@ void __init setup_system(void) | |||
417 | if (ppc64_caches.iline_size != 0x80) | 418 | if (ppc64_caches.iline_size != 0x80) |
418 | printk("ppc64_caches.icache_line_size = 0x%x\n", | 419 | printk("ppc64_caches.icache_line_size = 0x%x\n", |
419 | ppc64_caches.iline_size); | 420 | ppc64_caches.iline_size); |
421 | #ifdef CONFIG_PPC_STD_MMU_64 | ||
420 | if (htab_address) | 422 | if (htab_address) |
421 | printk("htab_address = 0x%p\n", htab_address); | 423 | printk("htab_address = 0x%p\n", htab_address); |
422 | printk("htab_hash_mask = 0x%lx\n", htab_hash_mask); | 424 | printk("htab_hash_mask = 0x%lx\n", htab_hash_mask); |
425 | #endif /* CONFIG_PPC_STD_MMU_64 */ | ||
423 | if (PHYSICAL_START > 0) | 426 | if (PHYSICAL_START > 0) |
424 | printk("physical_start = 0x%lx\n", | 427 | printk("physical_start = 0x%lx\n", |
425 | PHYSICAL_START); | 428 | PHYSICAL_START); |
@@ -511,8 +514,9 @@ void __init setup_arch(char **cmdline_p) | |||
511 | irqstack_early_init(); | 514 | irqstack_early_init(); |
512 | emergency_stack_init(); | 515 | emergency_stack_init(); |
513 | 516 | ||
517 | #ifdef CONFIG_PPC_STD_MMU_64 | ||
514 | stabs_alloc(); | 518 | stabs_alloc(); |
515 | 519 | #endif | |
516 | /* set up the bootmem stuff with available memory */ | 520 | /* set up the bootmem stuff with available memory */ |
517 | do_init_bootmem(); | 521 | do_init_bootmem(); |
518 | sparse_init(); | 522 | sparse_init(); |
@@ -524,6 +528,11 @@ void __init setup_arch(char **cmdline_p) | |||
524 | if (ppc_md.setup_arch) | 528 | if (ppc_md.setup_arch) |
525 | ppc_md.setup_arch(); | 529 | ppc_md.setup_arch(); |
526 | 530 | ||
531 | #ifdef CONFIG_SWIOTLB | ||
532 | if (ppc_swiotlb_enable) | ||
533 | swiotlb_init(); | ||
534 | #endif | ||
535 | |||
527 | paging_init(); | 536 | paging_init(); |
528 | ppc64_boot_msg(0x15, "Setup Done"); | 537 | ppc64_boot_msg(0x15, "Setup Done"); |
529 | } | 538 | } |
diff --git a/arch/powerpc/kernel/time.c b/arch/powerpc/kernel/time.c index 48571ac56fb7..bee1443da763 100644 --- a/arch/powerpc/kernel/time.c +++ b/arch/powerpc/kernel/time.c | |||
@@ -109,7 +109,7 @@ static void decrementer_set_mode(enum clock_event_mode mode, | |||
109 | static struct clock_event_device decrementer_clockevent = { | 109 | static struct clock_event_device decrementer_clockevent = { |
110 | .name = "decrementer", | 110 | .name = "decrementer", |
111 | .rating = 200, | 111 | .rating = 200, |
112 | .shift = 16, | 112 | .shift = 0, /* To be filled in */ |
113 | .mult = 0, /* To be filled in */ | 113 | .mult = 0, /* To be filled in */ |
114 | .irq = 0, | 114 | .irq = 0, |
115 | .set_next_event = decrementer_set_next_event, | 115 | .set_next_event = decrementer_set_next_event, |
@@ -843,6 +843,22 @@ static void decrementer_set_mode(enum clock_event_mode mode, | |||
843 | decrementer_set_next_event(DECREMENTER_MAX, dev); | 843 | decrementer_set_next_event(DECREMENTER_MAX, dev); |
844 | } | 844 | } |
845 | 845 | ||
846 | static void __init setup_clockevent_multiplier(unsigned long hz) | ||
847 | { | ||
848 | u64 mult, shift = 32; | ||
849 | |||
850 | while (1) { | ||
851 | mult = div_sc(hz, NSEC_PER_SEC, shift); | ||
852 | if (mult && (mult >> 32UL) == 0UL) | ||
853 | break; | ||
854 | |||
855 | shift--; | ||
856 | } | ||
857 | |||
858 | decrementer_clockevent.shift = shift; | ||
859 | decrementer_clockevent.mult = mult; | ||
860 | } | ||
861 | |||
846 | static void register_decrementer_clockevent(int cpu) | 862 | static void register_decrementer_clockevent(int cpu) |
847 | { | 863 | { |
848 | struct clock_event_device *dec = &per_cpu(decrementers, cpu).event; | 864 | struct clock_event_device *dec = &per_cpu(decrementers, cpu).event; |
@@ -860,8 +876,7 @@ static void __init init_decrementer_clockevent(void) | |||
860 | { | 876 | { |
861 | int cpu = smp_processor_id(); | 877 | int cpu = smp_processor_id(); |
862 | 878 | ||
863 | decrementer_clockevent.mult = div_sc(ppc_tb_freq, NSEC_PER_SEC, | 879 | setup_clockevent_multiplier(ppc_tb_freq); |
864 | decrementer_clockevent.shift); | ||
865 | decrementer_clockevent.max_delta_ns = | 880 | decrementer_clockevent.max_delta_ns = |
866 | clockevent_delta2ns(DECREMENTER_MAX, &decrementer_clockevent); | 881 | clockevent_delta2ns(DECREMENTER_MAX, &decrementer_clockevent); |
867 | decrementer_clockevent.min_delta_ns = | 882 | decrementer_clockevent.min_delta_ns = |
diff --git a/arch/powerpc/kernel/traps.c b/arch/powerpc/kernel/traps.c index 678fbff0d206..6f0ae1a9bfae 100644 --- a/arch/powerpc/kernel/traps.c +++ b/arch/powerpc/kernel/traps.c | |||
@@ -33,7 +33,9 @@ | |||
33 | #include <linux/backlight.h> | 33 | #include <linux/backlight.h> |
34 | #include <linux/bug.h> | 34 | #include <linux/bug.h> |
35 | #include <linux/kdebug.h> | 35 | #include <linux/kdebug.h> |
36 | #include <linux/debugfs.h> | ||
36 | 37 | ||
38 | #include <asm/emulated_ops.h> | ||
37 | #include <asm/pgtable.h> | 39 | #include <asm/pgtable.h> |
38 | #include <asm/uaccess.h> | 40 | #include <asm/uaccess.h> |
39 | #include <asm/system.h> | 41 | #include <asm/system.h> |
@@ -757,36 +759,44 @@ static int emulate_instruction(struct pt_regs *regs) | |||
757 | 759 | ||
758 | /* Emulate the mfspr rD, PVR. */ | 760 | /* Emulate the mfspr rD, PVR. */ |
759 | if ((instword & PPC_INST_MFSPR_PVR_MASK) == PPC_INST_MFSPR_PVR) { | 761 | if ((instword & PPC_INST_MFSPR_PVR_MASK) == PPC_INST_MFSPR_PVR) { |
762 | PPC_WARN_EMULATED(mfpvr); | ||
760 | rd = (instword >> 21) & 0x1f; | 763 | rd = (instword >> 21) & 0x1f; |
761 | regs->gpr[rd] = mfspr(SPRN_PVR); | 764 | regs->gpr[rd] = mfspr(SPRN_PVR); |
762 | return 0; | 765 | return 0; |
763 | } | 766 | } |
764 | 767 | ||
765 | /* Emulating the dcba insn is just a no-op. */ | 768 | /* Emulating the dcba insn is just a no-op. */ |
766 | if ((instword & PPC_INST_DCBA_MASK) == PPC_INST_DCBA) | 769 | if ((instword & PPC_INST_DCBA_MASK) == PPC_INST_DCBA) { |
770 | PPC_WARN_EMULATED(dcba); | ||
767 | return 0; | 771 | return 0; |
772 | } | ||
768 | 773 | ||
769 | /* Emulate the mcrxr insn. */ | 774 | /* Emulate the mcrxr insn. */ |
770 | if ((instword & PPC_INST_MCRXR_MASK) == PPC_INST_MCRXR) { | 775 | if ((instword & PPC_INST_MCRXR_MASK) == PPC_INST_MCRXR) { |
771 | int shift = (instword >> 21) & 0x1c; | 776 | int shift = (instword >> 21) & 0x1c; |
772 | unsigned long msk = 0xf0000000UL >> shift; | 777 | unsigned long msk = 0xf0000000UL >> shift; |
773 | 778 | ||
779 | PPC_WARN_EMULATED(mcrxr); | ||
774 | regs->ccr = (regs->ccr & ~msk) | ((regs->xer >> shift) & msk); | 780 | regs->ccr = (regs->ccr & ~msk) | ((regs->xer >> shift) & msk); |
775 | regs->xer &= ~0xf0000000UL; | 781 | regs->xer &= ~0xf0000000UL; |
776 | return 0; | 782 | return 0; |
777 | } | 783 | } |
778 | 784 | ||
779 | /* Emulate load/store string insn. */ | 785 | /* Emulate load/store string insn. */ |
780 | if ((instword & PPC_INST_STRING_GEN_MASK) == PPC_INST_STRING) | 786 | if ((instword & PPC_INST_STRING_GEN_MASK) == PPC_INST_STRING) { |
787 | PPC_WARN_EMULATED(string); | ||
781 | return emulate_string_inst(regs, instword); | 788 | return emulate_string_inst(regs, instword); |
789 | } | ||
782 | 790 | ||
783 | /* Emulate the popcntb (Population Count Bytes) instruction. */ | 791 | /* Emulate the popcntb (Population Count Bytes) instruction. */ |
784 | if ((instword & PPC_INST_POPCNTB_MASK) == PPC_INST_POPCNTB) { | 792 | if ((instword & PPC_INST_POPCNTB_MASK) == PPC_INST_POPCNTB) { |
793 | PPC_WARN_EMULATED(popcntb); | ||
785 | return emulate_popcntb_inst(regs, instword); | 794 | return emulate_popcntb_inst(regs, instword); |
786 | } | 795 | } |
787 | 796 | ||
788 | /* Emulate isel (Integer Select) instruction */ | 797 | /* Emulate isel (Integer Select) instruction */ |
789 | if ((instword & PPC_INST_ISEL_MASK) == PPC_INST_ISEL) { | 798 | if ((instword & PPC_INST_ISEL_MASK) == PPC_INST_ISEL) { |
799 | PPC_WARN_EMULATED(isel); | ||
790 | return emulate_isel(regs, instword); | 800 | return emulate_isel(regs, instword); |
791 | } | 801 | } |
792 | 802 | ||
@@ -984,6 +994,8 @@ void SoftwareEmulation(struct pt_regs *regs) | |||
984 | 994 | ||
985 | #ifdef CONFIG_MATH_EMULATION | 995 | #ifdef CONFIG_MATH_EMULATION |
986 | errcode = do_mathemu(regs); | 996 | errcode = do_mathemu(regs); |
997 | if (errcode >= 0) | ||
998 | PPC_WARN_EMULATED(math); | ||
987 | 999 | ||
988 | switch (errcode) { | 1000 | switch (errcode) { |
989 | case 0: | 1001 | case 0: |
@@ -1005,6 +1017,9 @@ void SoftwareEmulation(struct pt_regs *regs) | |||
1005 | 1017 | ||
1006 | #elif defined(CONFIG_8XX_MINIMAL_FPEMU) | 1018 | #elif defined(CONFIG_8XX_MINIMAL_FPEMU) |
1007 | errcode = Soft_emulate_8xx(regs); | 1019 | errcode = Soft_emulate_8xx(regs); |
1020 | if (errcode >= 0) | ||
1021 | PPC_WARN_EMULATED(8xx); | ||
1022 | |||
1008 | switch (errcode) { | 1023 | switch (errcode) { |
1009 | case 0: | 1024 | case 0: |
1010 | emulate_single_step(regs); | 1025 | emulate_single_step(regs); |
@@ -1026,7 +1041,34 @@ void SoftwareEmulation(struct pt_regs *regs) | |||
1026 | 1041 | ||
1027 | void __kprobes DebugException(struct pt_regs *regs, unsigned long debug_status) | 1042 | void __kprobes DebugException(struct pt_regs *regs, unsigned long debug_status) |
1028 | { | 1043 | { |
1029 | if (debug_status & DBSR_IC) { /* instruction completion */ | 1044 | /* Hack alert: On BookE, Branch Taken stops on the branch itself, while |
1045 | * on server, it stops on the target of the branch. In order to simulate | ||
1046 | * the server behaviour, we thus restart right away with a single step | ||
1047 | * instead of stopping here when hitting a BT | ||
1048 | */ | ||
1049 | if (debug_status & DBSR_BT) { | ||
1050 | regs->msr &= ~MSR_DE; | ||
1051 | |||
1052 | /* Disable BT */ | ||
1053 | mtspr(SPRN_DBCR0, mfspr(SPRN_DBCR0) & ~DBCR0_BT); | ||
1054 | /* Clear the BT event */ | ||
1055 | mtspr(SPRN_DBSR, DBSR_BT); | ||
1056 | |||
1057 | /* Do the single step trick only when coming from userspace */ | ||
1058 | if (user_mode(regs)) { | ||
1059 | current->thread.dbcr0 &= ~DBCR0_BT; | ||
1060 | current->thread.dbcr0 |= DBCR0_IDM | DBCR0_IC; | ||
1061 | regs->msr |= MSR_DE; | ||
1062 | return; | ||
1063 | } | ||
1064 | |||
1065 | if (notify_die(DIE_SSTEP, "block_step", regs, 5, | ||
1066 | 5, SIGTRAP) == NOTIFY_STOP) { | ||
1067 | return; | ||
1068 | } | ||
1069 | if (debugger_sstep(regs)) | ||
1070 | return; | ||
1071 | } else if (debug_status & DBSR_IC) { /* Instruction complete */ | ||
1030 | regs->msr &= ~MSR_DE; | 1072 | regs->msr &= ~MSR_DE; |
1031 | 1073 | ||
1032 | /* Disable instruction completion */ | 1074 | /* Disable instruction completion */ |
@@ -1042,9 +1084,8 @@ void __kprobes DebugException(struct pt_regs *regs, unsigned long debug_status) | |||
1042 | if (debugger_sstep(regs)) | 1084 | if (debugger_sstep(regs)) |
1043 | return; | 1085 | return; |
1044 | 1086 | ||
1045 | if (user_mode(regs)) { | 1087 | if (user_mode(regs)) |
1046 | current->thread.dbcr0 &= ~DBCR0_IC; | 1088 | current->thread.dbcr0 &= ~(DBCR0_IC); |
1047 | } | ||
1048 | 1089 | ||
1049 | _exception(SIGTRAP, regs, TRAP_TRACE, regs->nip); | 1090 | _exception(SIGTRAP, regs, TRAP_TRACE, regs->nip); |
1050 | } else if (debug_status & (DBSR_DAC1R | DBSR_DAC1W)) { | 1091 | } else if (debug_status & (DBSR_DAC1R | DBSR_DAC1W)) { |
@@ -1088,6 +1129,7 @@ void altivec_assist_exception(struct pt_regs *regs) | |||
1088 | 1129 | ||
1089 | flush_altivec_to_thread(current); | 1130 | flush_altivec_to_thread(current); |
1090 | 1131 | ||
1132 | PPC_WARN_EMULATED(altivec); | ||
1091 | err = emulate_altivec(regs); | 1133 | err = emulate_altivec(regs); |
1092 | if (err == 0) { | 1134 | if (err == 0) { |
1093 | regs->nip += 4; /* skip emulated instruction */ | 1135 | regs->nip += 4; /* skip emulated instruction */ |
@@ -1286,3 +1328,79 @@ void kernel_bad_stack(struct pt_regs *regs) | |||
1286 | void __init trap_init(void) | 1328 | void __init trap_init(void) |
1287 | { | 1329 | { |
1288 | } | 1330 | } |
1331 | |||
1332 | |||
1333 | #ifdef CONFIG_PPC_EMULATED_STATS | ||
1334 | |||
1335 | #define WARN_EMULATED_SETUP(type) .type = { .name = #type } | ||
1336 | |||
1337 | struct ppc_emulated ppc_emulated = { | ||
1338 | #ifdef CONFIG_ALTIVEC | ||
1339 | WARN_EMULATED_SETUP(altivec), | ||
1340 | #endif | ||
1341 | WARN_EMULATED_SETUP(dcba), | ||
1342 | WARN_EMULATED_SETUP(dcbz), | ||
1343 | WARN_EMULATED_SETUP(fp_pair), | ||
1344 | WARN_EMULATED_SETUP(isel), | ||
1345 | WARN_EMULATED_SETUP(mcrxr), | ||
1346 | WARN_EMULATED_SETUP(mfpvr), | ||
1347 | WARN_EMULATED_SETUP(multiple), | ||
1348 | WARN_EMULATED_SETUP(popcntb), | ||
1349 | WARN_EMULATED_SETUP(spe), | ||
1350 | WARN_EMULATED_SETUP(string), | ||
1351 | WARN_EMULATED_SETUP(unaligned), | ||
1352 | #ifdef CONFIG_MATH_EMULATION | ||
1353 | WARN_EMULATED_SETUP(math), | ||
1354 | #elif defined(CONFIG_8XX_MINIMAL_FPEMU) | ||
1355 | WARN_EMULATED_SETUP(8xx), | ||
1356 | #endif | ||
1357 | #ifdef CONFIG_VSX | ||
1358 | WARN_EMULATED_SETUP(vsx), | ||
1359 | #endif | ||
1360 | }; | ||
1361 | |||
1362 | u32 ppc_warn_emulated; | ||
1363 | |||
1364 | void ppc_warn_emulated_print(const char *type) | ||
1365 | { | ||
1366 | if (printk_ratelimit()) | ||
1367 | pr_warning("%s used emulated %s instruction\n", current->comm, | ||
1368 | type); | ||
1369 | } | ||
1370 | |||
1371 | static int __init ppc_warn_emulated_init(void) | ||
1372 | { | ||
1373 | struct dentry *dir, *d; | ||
1374 | unsigned int i; | ||
1375 | struct ppc_emulated_entry *entries = (void *)&ppc_emulated; | ||
1376 | |||
1377 | if (!powerpc_debugfs_root) | ||
1378 | return -ENODEV; | ||
1379 | |||
1380 | dir = debugfs_create_dir("emulated_instructions", | ||
1381 | powerpc_debugfs_root); | ||
1382 | if (!dir) | ||
1383 | return -ENOMEM; | ||
1384 | |||
1385 | d = debugfs_create_u32("do_warn", S_IRUGO | S_IWUSR, dir, | ||
1386 | &ppc_warn_emulated); | ||
1387 | if (!d) | ||
1388 | goto fail; | ||
1389 | |||
1390 | for (i = 0; i < sizeof(ppc_emulated)/sizeof(*entries); i++) { | ||
1391 | d = debugfs_create_u32(entries[i].name, S_IRUGO | S_IWUSR, dir, | ||
1392 | (u32 *)&entries[i].val.counter); | ||
1393 | if (!d) | ||
1394 | goto fail; | ||
1395 | } | ||
1396 | |||
1397 | return 0; | ||
1398 | |||
1399 | fail: | ||
1400 | debugfs_remove_recursive(dir); | ||
1401 | return -ENOMEM; | ||
1402 | } | ||
1403 | |||
1404 | device_initcall(ppc_warn_emulated_init); | ||
1405 | |||
1406 | #endif /* CONFIG_PPC_EMULATED_STATS */ | ||
diff --git a/arch/powerpc/kernel/vector.S b/arch/powerpc/kernel/vector.S index 49ac3d6e1399..ef36cbbc5882 100644 --- a/arch/powerpc/kernel/vector.S +++ b/arch/powerpc/kernel/vector.S | |||
@@ -1,5 +1,215 @@ | |||
1 | #include <asm/processor.h> | ||
1 | #include <asm/ppc_asm.h> | 2 | #include <asm/ppc_asm.h> |
2 | #include <asm/reg.h> | 3 | #include <asm/reg.h> |
4 | #include <asm/asm-offsets.h> | ||
5 | #include <asm/cputable.h> | ||
6 | #include <asm/thread_info.h> | ||
7 | #include <asm/page.h> | ||
8 | |||
9 | /* | ||
10 | * load_up_altivec(unused, unused, tsk) | ||
11 | * Disable VMX for the task which had it previously, | ||
12 | * and save its vector registers in its thread_struct. | ||
13 | * Enables the VMX for use in the kernel on return. | ||
14 | * On SMP we know the VMX is free, since we give it up every | ||
15 | * switch (ie, no lazy save of the vector registers). | ||
16 | */ | ||
17 | _GLOBAL(load_up_altivec) | ||
18 | mfmsr r5 /* grab the current MSR */ | ||
19 | oris r5,r5,MSR_VEC@h | ||
20 | MTMSRD(r5) /* enable use of AltiVec now */ | ||
21 | isync | ||
22 | |||
23 | /* | ||
24 | * For SMP, we don't do lazy VMX switching because it just gets too | ||
25 | * horrendously complex, especially when a task switches from one CPU | ||
26 | * to another. Instead we call giveup_altvec in switch_to. | ||
27 | * VRSAVE isn't dealt with here, that is done in the normal context | ||
28 | * switch code. Note that we could rely on vrsave value to eventually | ||
29 | * avoid saving all of the VREGs here... | ||
30 | */ | ||
31 | #ifndef CONFIG_SMP | ||
32 | LOAD_REG_ADDRBASE(r3, last_task_used_altivec) | ||
33 | toreal(r3) | ||
34 | PPC_LL r4,ADDROFF(last_task_used_altivec)(r3) | ||
35 | PPC_LCMPI 0,r4,0 | ||
36 | beq 1f | ||
37 | |||
38 | /* Save VMX state to last_task_used_altivec's THREAD struct */ | ||
39 | toreal(r4) | ||
40 | addi r4,r4,THREAD | ||
41 | SAVE_32VRS(0,r5,r4) | ||
42 | mfvscr vr0 | ||
43 | li r10,THREAD_VSCR | ||
44 | stvx vr0,r10,r4 | ||
45 | /* Disable VMX for last_task_used_altivec */ | ||
46 | PPC_LL r5,PT_REGS(r4) | ||
47 | toreal(r5) | ||
48 | PPC_LL r4,_MSR-STACK_FRAME_OVERHEAD(r5) | ||
49 | lis r10,MSR_VEC@h | ||
50 | andc r4,r4,r10 | ||
51 | PPC_STL r4,_MSR-STACK_FRAME_OVERHEAD(r5) | ||
52 | 1: | ||
53 | #endif /* CONFIG_SMP */ | ||
54 | |||
55 | /* Hack: if we get an altivec unavailable trap with VRSAVE | ||
56 | * set to all zeros, we assume this is a broken application | ||
57 | * that fails to set it properly, and thus we switch it to | ||
58 | * all 1's | ||
59 | */ | ||
60 | mfspr r4,SPRN_VRSAVE | ||
61 | cmpdi 0,r4,0 | ||
62 | bne+ 1f | ||
63 | li r4,-1 | ||
64 | mtspr SPRN_VRSAVE,r4 | ||
65 | 1: | ||
66 | /* enable use of VMX after return */ | ||
67 | #ifdef CONFIG_PPC32 | ||
68 | mfspr r5,SPRN_SPRG3 /* current task's THREAD (phys) */ | ||
69 | oris r9,r9,MSR_VEC@h | ||
70 | #else | ||
71 | ld r4,PACACURRENT(r13) | ||
72 | addi r5,r4,THREAD /* Get THREAD */ | ||
73 | oris r12,r12,MSR_VEC@h | ||
74 | std r12,_MSR(r1) | ||
75 | #endif | ||
76 | li r4,1 | ||
77 | li r10,THREAD_VSCR | ||
78 | stw r4,THREAD_USED_VR(r5) | ||
79 | lvx vr0,r10,r5 | ||
80 | mtvscr vr0 | ||
81 | REST_32VRS(0,r4,r5) | ||
82 | #ifndef CONFIG_SMP | ||
83 | /* Update last_task_used_math to 'current' */ | ||
84 | subi r4,r5,THREAD /* Back to 'current' */ | ||
85 | fromreal(r4) | ||
86 | PPC_STL r4,ADDROFF(last_task_used_math)(r3) | ||
87 | #endif /* CONFIG_SMP */ | ||
88 | /* restore registers and return */ | ||
89 | blr | ||
90 | |||
91 | /* | ||
92 | * giveup_altivec(tsk) | ||
93 | * Disable VMX for the task given as the argument, | ||
94 | * and save the vector registers in its thread_struct. | ||
95 | * Enables the VMX for use in the kernel on return. | ||
96 | */ | ||
97 | _GLOBAL(giveup_altivec) | ||
98 | mfmsr r5 | ||
99 | oris r5,r5,MSR_VEC@h | ||
100 | SYNC | ||
101 | MTMSRD(r5) /* enable use of VMX now */ | ||
102 | isync | ||
103 | PPC_LCMPI 0,r3,0 | ||
104 | beqlr- /* if no previous owner, done */ | ||
105 | addi r3,r3,THREAD /* want THREAD of task */ | ||
106 | PPC_LL r5,PT_REGS(r3) | ||
107 | PPC_LCMPI 0,r5,0 | ||
108 | SAVE_32VRS(0,r4,r3) | ||
109 | mfvscr vr0 | ||
110 | li r4,THREAD_VSCR | ||
111 | stvx vr0,r4,r3 | ||
112 | beq 1f | ||
113 | PPC_LL r4,_MSR-STACK_FRAME_OVERHEAD(r5) | ||
114 | #ifdef CONFIG_VSX | ||
115 | BEGIN_FTR_SECTION | ||
116 | lis r3,(MSR_VEC|MSR_VSX)@h | ||
117 | FTR_SECTION_ELSE | ||
118 | lis r3,MSR_VEC@h | ||
119 | ALT_FTR_SECTION_END_IFSET(CPU_FTR_VSX) | ||
120 | #else | ||
121 | lis r3,MSR_VEC@h | ||
122 | #endif | ||
123 | andc r4,r4,r3 /* disable FP for previous task */ | ||
124 | PPC_STL r4,_MSR-STACK_FRAME_OVERHEAD(r5) | ||
125 | 1: | ||
126 | #ifndef CONFIG_SMP | ||
127 | li r5,0 | ||
128 | LOAD_REG_ADDRBASE(r4,last_task_used_altivec) | ||
129 | PPC_STL r5,ADDROFF(last_task_used_altivec)(r4) | ||
130 | #endif /* CONFIG_SMP */ | ||
131 | blr | ||
132 | |||
133 | #ifdef CONFIG_VSX | ||
134 | |||
135 | #ifdef CONFIG_PPC32 | ||
136 | #error This asm code isn't ready for 32-bit kernels | ||
137 | #endif | ||
138 | |||
139 | /* | ||
140 | * load_up_vsx(unused, unused, tsk) | ||
141 | * Disable VSX for the task which had it previously, | ||
142 | * and save its vector registers in its thread_struct. | ||
143 | * Reuse the fp and vsx saves, but first check to see if they have | ||
144 | * been saved already. | ||
145 | */ | ||
146 | _GLOBAL(load_up_vsx) | ||
147 | /* Load FP and VSX registers if they haven't been done yet */ | ||
148 | andi. r5,r12,MSR_FP | ||
149 | beql+ load_up_fpu /* skip if already loaded */ | ||
150 | andis. r5,r12,MSR_VEC@h | ||
151 | beql+ load_up_altivec /* skip if already loaded */ | ||
152 | |||
153 | #ifndef CONFIG_SMP | ||
154 | ld r3,last_task_used_vsx@got(r2) | ||
155 | ld r4,0(r3) | ||
156 | cmpdi 0,r4,0 | ||
157 | beq 1f | ||
158 | /* Disable VSX for last_task_used_vsx */ | ||
159 | addi r4,r4,THREAD | ||
160 | ld r5,PT_REGS(r4) | ||
161 | ld r4,_MSR-STACK_FRAME_OVERHEAD(r5) | ||
162 | lis r6,MSR_VSX@h | ||
163 | andc r6,r4,r6 | ||
164 | std r6,_MSR-STACK_FRAME_OVERHEAD(r5) | ||
165 | 1: | ||
166 | #endif /* CONFIG_SMP */ | ||
167 | ld r4,PACACURRENT(r13) | ||
168 | addi r4,r4,THREAD /* Get THREAD */ | ||
169 | li r6,1 | ||
170 | stw r6,THREAD_USED_VSR(r4) /* ... also set thread used vsr */ | ||
171 | /* enable use of VSX after return */ | ||
172 | oris r12,r12,MSR_VSX@h | ||
173 | std r12,_MSR(r1) | ||
174 | #ifndef CONFIG_SMP | ||
175 | /* Update last_task_used_math to 'current' */ | ||
176 | ld r4,PACACURRENT(r13) | ||
177 | std r4,0(r3) | ||
178 | #endif /* CONFIG_SMP */ | ||
179 | b fast_exception_return | ||
180 | |||
181 | /* | ||
182 | * __giveup_vsx(tsk) | ||
183 | * Disable VSX for the task given as the argument. | ||
184 | * Does NOT save vsx registers. | ||
185 | * Enables the VSX for use in the kernel on return. | ||
186 | */ | ||
187 | _GLOBAL(__giveup_vsx) | ||
188 | mfmsr r5 | ||
189 | oris r5,r5,MSR_VSX@h | ||
190 | mtmsrd r5 /* enable use of VSX now */ | ||
191 | isync | ||
192 | |||
193 | cmpdi 0,r3,0 | ||
194 | beqlr- /* if no previous owner, done */ | ||
195 | addi r3,r3,THREAD /* want THREAD of task */ | ||
196 | ld r5,PT_REGS(r3) | ||
197 | cmpdi 0,r5,0 | ||
198 | beq 1f | ||
199 | ld r4,_MSR-STACK_FRAME_OVERHEAD(r5) | ||
200 | lis r3,MSR_VSX@h | ||
201 | andc r4,r4,r3 /* disable VSX for previous task */ | ||
202 | std r4,_MSR-STACK_FRAME_OVERHEAD(r5) | ||
203 | 1: | ||
204 | #ifndef CONFIG_SMP | ||
205 | li r5,0 | ||
206 | ld r4,last_task_used_vsx@got(r2) | ||
207 | std r5,0(r4) | ||
208 | #endif /* CONFIG_SMP */ | ||
209 | blr | ||
210 | |||
211 | #endif /* CONFIG_VSX */ | ||
212 | |||
3 | 213 | ||
4 | /* | 214 | /* |
5 | * The routines below are in assembler so we can closely control the | 215 | * The routines below are in assembler so we can closely control the |
diff --git a/arch/powerpc/mm/Makefile b/arch/powerpc/mm/Makefile index b746f4ca4209..c4bcf072cb3c 100644 --- a/arch/powerpc/mm/Makefile +++ b/arch/powerpc/mm/Makefile | |||
@@ -11,10 +11,11 @@ obj-y := fault.o mem.o pgtable.o gup.o \ | |||
11 | pgtable_$(CONFIG_WORD_SIZE).o | 11 | pgtable_$(CONFIG_WORD_SIZE).o |
12 | obj-$(CONFIG_PPC_MMU_NOHASH) += mmu_context_nohash.o tlb_nohash.o \ | 12 | obj-$(CONFIG_PPC_MMU_NOHASH) += mmu_context_nohash.o tlb_nohash.o \ |
13 | tlb_nohash_low.o | 13 | tlb_nohash_low.o |
14 | hash-$(CONFIG_PPC_NATIVE) := hash_native_64.o | 14 | obj-$(CONFIG_PPC64) += mmap_64.o |
15 | obj-$(CONFIG_PPC64) += hash_utils_64.o \ | 15 | hash64-$(CONFIG_PPC_NATIVE) := hash_native_64.o |
16 | obj-$(CONFIG_PPC_STD_MMU_64) += hash_utils_64.o \ | ||
16 | slb_low.o slb.o stab.o \ | 17 | slb_low.o slb.o stab.o \ |
17 | mmap_64.o $(hash-y) | 18 | mmap_64.o $(hash64-y) |
18 | obj-$(CONFIG_PPC_STD_MMU_32) += ppc_mmu_32.o | 19 | obj-$(CONFIG_PPC_STD_MMU_32) += ppc_mmu_32.o |
19 | obj-$(CONFIG_PPC_STD_MMU) += hash_low_$(CONFIG_WORD_SIZE).o \ | 20 | obj-$(CONFIG_PPC_STD_MMU) += hash_low_$(CONFIG_WORD_SIZE).o \ |
20 | tlb_hash$(CONFIG_WORD_SIZE).o \ | 21 | tlb_hash$(CONFIG_WORD_SIZE).o \ |
diff --git a/arch/powerpc/mm/hash_native_64.c b/arch/powerpc/mm/hash_native_64.c index 34e5c0b219b9..056d23a1b105 100644 --- a/arch/powerpc/mm/hash_native_64.c +++ b/arch/powerpc/mm/hash_native_64.c | |||
@@ -27,6 +27,7 @@ | |||
27 | #include <asm/cputable.h> | 27 | #include <asm/cputable.h> |
28 | #include <asm/udbg.h> | 28 | #include <asm/udbg.h> |
29 | #include <asm/kexec.h> | 29 | #include <asm/kexec.h> |
30 | #include <asm/ppc-opcode.h> | ||
30 | 31 | ||
31 | #ifdef DEBUG_LOW | 32 | #ifdef DEBUG_LOW |
32 | #define DBG_LOW(fmt...) udbg_printf(fmt) | 33 | #define DBG_LOW(fmt...) udbg_printf(fmt) |
@@ -49,14 +50,21 @@ static inline void __tlbie(unsigned long va, int psize, int ssize) | |||
49 | case MMU_PAGE_4K: | 50 | case MMU_PAGE_4K: |
50 | va &= ~0xffful; | 51 | va &= ~0xffful; |
51 | va |= ssize << 8; | 52 | va |= ssize << 8; |
52 | asm volatile("tlbie %0,0" : : "r" (va) : "memory"); | 53 | asm volatile(ASM_MMU_FTR_IFCLR("tlbie %0,0", PPC_TLBIE(%1,%0), |
54 | %2) | ||
55 | : : "r" (va), "r"(0), "i" (MMU_FTR_TLBIE_206) | ||
56 | : "memory"); | ||
53 | break; | 57 | break; |
54 | default: | 58 | default: |
55 | penc = mmu_psize_defs[psize].penc; | 59 | penc = mmu_psize_defs[psize].penc; |
56 | va &= ~((1ul << mmu_psize_defs[psize].shift) - 1); | 60 | va &= ~((1ul << mmu_psize_defs[psize].shift) - 1); |
57 | va |= penc << 12; | 61 | va |= penc << 12; |
58 | va |= ssize << 8; | 62 | va |= ssize << 8; |
59 | asm volatile("tlbie %0,1" : : "r" (va) : "memory"); | 63 | va |= 1; /* L */ |
64 | asm volatile(ASM_MMU_FTR_IFCLR("tlbie %0,1", PPC_TLBIE(%1,%0), | ||
65 | %2) | ||
66 | : : "r" (va), "r"(0), "i" (MMU_FTR_TLBIE_206) | ||
67 | : "memory"); | ||
60 | break; | 68 | break; |
61 | } | 69 | } |
62 | } | 70 | } |
@@ -80,6 +88,7 @@ static inline void __tlbiel(unsigned long va, int psize, int ssize) | |||
80 | va &= ~((1ul << mmu_psize_defs[psize].shift) - 1); | 88 | va &= ~((1ul << mmu_psize_defs[psize].shift) - 1); |
81 | va |= penc << 12; | 89 | va |= penc << 12; |
82 | va |= ssize << 8; | 90 | va |= ssize << 8; |
91 | va |= 1; /* L */ | ||
83 | asm volatile(".long 0x7c000224 | (%0 << 11) | (1 << 21)" | 92 | asm volatile(".long 0x7c000224 | (%0 << 11) | (1 << 21)" |
84 | : : "r"(va) : "memory"); | 93 | : : "r"(va) : "memory"); |
85 | break; | 94 | break; |
diff --git a/arch/powerpc/mm/init_64.c b/arch/powerpc/mm/init_64.c index 3e6a6543f53a..68a821add28d 100644 --- a/arch/powerpc/mm/init_64.c +++ b/arch/powerpc/mm/init_64.c | |||
@@ -66,6 +66,7 @@ | |||
66 | 66 | ||
67 | #include "mmu_decl.h" | 67 | #include "mmu_decl.h" |
68 | 68 | ||
69 | #ifdef CONFIG_PPC_STD_MMU_64 | ||
69 | #if PGTABLE_RANGE > USER_VSID_RANGE | 70 | #if PGTABLE_RANGE > USER_VSID_RANGE |
70 | #warning Limited user VSID range means pagetable space is wasted | 71 | #warning Limited user VSID range means pagetable space is wasted |
71 | #endif | 72 | #endif |
@@ -73,6 +74,7 @@ | |||
73 | #if (TASK_SIZE_USER64 < PGTABLE_RANGE) && (TASK_SIZE_USER64 < USER_VSID_RANGE) | 74 | #if (TASK_SIZE_USER64 < PGTABLE_RANGE) && (TASK_SIZE_USER64 < USER_VSID_RANGE) |
74 | #warning TASK_SIZE is smaller than it needs to be. | 75 | #warning TASK_SIZE is smaller than it needs to be. |
75 | #endif | 76 | #endif |
77 | #endif /* CONFIG_PPC_STD_MMU_64 */ | ||
76 | 78 | ||
77 | phys_addr_t memstart_addr = ~0; | 79 | phys_addr_t memstart_addr = ~0; |
78 | phys_addr_t kernstart_addr; | 80 | phys_addr_t kernstart_addr; |
diff --git a/arch/powerpc/mm/mmu_context_nohash.c b/arch/powerpc/mm/mmu_context_nohash.c index 030d0005b4d2..8343986809c0 100644 --- a/arch/powerpc/mm/mmu_context_nohash.c +++ b/arch/powerpc/mm/mmu_context_nohash.c | |||
@@ -46,7 +46,7 @@ static unsigned int next_context, nr_free_contexts; | |||
46 | static unsigned long *context_map; | 46 | static unsigned long *context_map; |
47 | static unsigned long *stale_map[NR_CPUS]; | 47 | static unsigned long *stale_map[NR_CPUS]; |
48 | static struct mm_struct **context_mm; | 48 | static struct mm_struct **context_mm; |
49 | static spinlock_t context_lock = SPIN_LOCK_UNLOCKED; | 49 | static DEFINE_SPINLOCK(context_lock); |
50 | 50 | ||
51 | #define CTX_MAP_SIZE \ | 51 | #define CTX_MAP_SIZE \ |
52 | (sizeof(unsigned long) * (last_context / BITS_PER_LONG + 1)) | 52 | (sizeof(unsigned long) * (last_context / BITS_PER_LONG + 1)) |
@@ -73,7 +73,6 @@ static unsigned int steal_context_smp(unsigned int id) | |||
73 | struct mm_struct *mm; | 73 | struct mm_struct *mm; |
74 | unsigned int cpu, max; | 74 | unsigned int cpu, max; |
75 | 75 | ||
76 | again: | ||
77 | max = last_context - first_context; | 76 | max = last_context - first_context; |
78 | 77 | ||
79 | /* Attempt to free next_context first and then loop until we manage */ | 78 | /* Attempt to free next_context first and then loop until we manage */ |
@@ -108,7 +107,9 @@ static unsigned int steal_context_smp(unsigned int id) | |||
108 | spin_unlock(&context_lock); | 107 | spin_unlock(&context_lock); |
109 | cpu_relax(); | 108 | cpu_relax(); |
110 | spin_lock(&context_lock); | 109 | spin_lock(&context_lock); |
111 | goto again; | 110 | |
111 | /* This will cause the caller to try again */ | ||
112 | return MMU_NO_CONTEXT; | ||
112 | } | 113 | } |
113 | #endif /* CONFIG_SMP */ | 114 | #endif /* CONFIG_SMP */ |
114 | 115 | ||
@@ -194,6 +195,8 @@ void switch_mmu_context(struct mm_struct *prev, struct mm_struct *next) | |||
194 | WARN_ON(prev->context.active < 1); | 195 | WARN_ON(prev->context.active < 1); |
195 | prev->context.active--; | 196 | prev->context.active--; |
196 | } | 197 | } |
198 | |||
199 | again: | ||
197 | #endif /* CONFIG_SMP */ | 200 | #endif /* CONFIG_SMP */ |
198 | 201 | ||
199 | /* If we already have a valid assigned context, skip all that */ | 202 | /* If we already have a valid assigned context, skip all that */ |
@@ -212,7 +215,8 @@ void switch_mmu_context(struct mm_struct *prev, struct mm_struct *next) | |||
212 | #ifdef CONFIG_SMP | 215 | #ifdef CONFIG_SMP |
213 | if (num_online_cpus() > 1) { | 216 | if (num_online_cpus() > 1) { |
214 | id = steal_context_smp(id); | 217 | id = steal_context_smp(id); |
215 | goto stolen; | 218 | if (id == MMU_NO_CONTEXT) |
219 | goto again; | ||
216 | } | 220 | } |
217 | #endif /* CONFIG_SMP */ | 221 | #endif /* CONFIG_SMP */ |
218 | id = steal_context_up(id); | 222 | id = steal_context_up(id); |
@@ -272,6 +276,7 @@ int init_new_context(struct task_struct *t, struct mm_struct *mm) | |||
272 | */ | 276 | */ |
273 | void destroy_context(struct mm_struct *mm) | 277 | void destroy_context(struct mm_struct *mm) |
274 | { | 278 | { |
279 | unsigned long flags; | ||
275 | unsigned int id; | 280 | unsigned int id; |
276 | 281 | ||
277 | if (mm->context.id == MMU_NO_CONTEXT) | 282 | if (mm->context.id == MMU_NO_CONTEXT) |
@@ -279,18 +284,18 @@ void destroy_context(struct mm_struct *mm) | |||
279 | 284 | ||
280 | WARN_ON(mm->context.active != 0); | 285 | WARN_ON(mm->context.active != 0); |
281 | 286 | ||
282 | spin_lock(&context_lock); | 287 | spin_lock_irqsave(&context_lock, flags); |
283 | id = mm->context.id; | 288 | id = mm->context.id; |
284 | if (id != MMU_NO_CONTEXT) { | 289 | if (id != MMU_NO_CONTEXT) { |
285 | __clear_bit(id, context_map); | 290 | __clear_bit(id, context_map); |
286 | mm->context.id = MMU_NO_CONTEXT; | 291 | mm->context.id = MMU_NO_CONTEXT; |
287 | #ifdef DEBUG_MAP_CONSISTENCY | 292 | #ifdef DEBUG_MAP_CONSISTENCY |
288 | mm->context.active = 0; | 293 | mm->context.active = 0; |
289 | context_mm[id] = NULL; | ||
290 | #endif | 294 | #endif |
295 | context_mm[id] = NULL; | ||
291 | nr_free_contexts++; | 296 | nr_free_contexts++; |
292 | } | 297 | } |
293 | spin_unlock(&context_lock); | 298 | spin_unlock_irqrestore(&context_lock, flags); |
294 | } | 299 | } |
295 | 300 | ||
296 | #ifdef CONFIG_SMP | 301 | #ifdef CONFIG_SMP |
diff --git a/arch/powerpc/mm/numa.c b/arch/powerpc/mm/numa.c index 9047145095aa..b037d95eeadc 100644 --- a/arch/powerpc/mm/numa.c +++ b/arch/powerpc/mm/numa.c | |||
@@ -981,6 +981,8 @@ void __init do_init_bootmem(void) | |||
981 | mark_reserved_regions_for_nid(nid); | 981 | mark_reserved_regions_for_nid(nid); |
982 | sparse_memory_present_with_active_regions(nid); | 982 | sparse_memory_present_with_active_regions(nid); |
983 | } | 983 | } |
984 | |||
985 | init_bootmem_done = 1; | ||
984 | } | 986 | } |
985 | 987 | ||
986 | void __init paging_init(void) | 988 | void __init paging_init(void) |
diff --git a/arch/powerpc/oprofile/op_model_fsl_emb.c b/arch/powerpc/oprofile/op_model_fsl_emb.c index 91596f6ba1f4..62312abffa28 100644 --- a/arch/powerpc/oprofile/op_model_fsl_emb.c +++ b/arch/powerpc/oprofile/op_model_fsl_emb.c | |||
@@ -228,20 +228,6 @@ static void pmc_stop_ctrs(void) | |||
228 | mtpmr(PMRN_PMGC0, pmgc0); | 228 | mtpmr(PMRN_PMGC0, pmgc0); |
229 | } | 229 | } |
230 | 230 | ||
231 | static void dump_pmcs(void) | ||
232 | { | ||
233 | printk("pmgc0: %x\n", mfpmr(PMRN_PMGC0)); | ||
234 | printk("pmc\t\tpmlca\t\tpmlcb\n"); | ||
235 | printk("%8x\t%8x\t%8x\n", mfpmr(PMRN_PMC0), | ||
236 | mfpmr(PMRN_PMLCA0), mfpmr(PMRN_PMLCB0)); | ||
237 | printk("%8x\t%8x\t%8x\n", mfpmr(PMRN_PMC1), | ||
238 | mfpmr(PMRN_PMLCA1), mfpmr(PMRN_PMLCB1)); | ||
239 | printk("%8x\t%8x\t%8x\n", mfpmr(PMRN_PMC2), | ||
240 | mfpmr(PMRN_PMLCA2), mfpmr(PMRN_PMLCB2)); | ||
241 | printk("%8x\t%8x\t%8x\n", mfpmr(PMRN_PMC3), | ||
242 | mfpmr(PMRN_PMLCA3), mfpmr(PMRN_PMLCB3)); | ||
243 | } | ||
244 | |||
245 | static int fsl_emb_cpu_setup(struct op_counter_config *ctr) | 231 | static int fsl_emb_cpu_setup(struct op_counter_config *ctr) |
246 | { | 232 | { |
247 | int i; | 233 | int i; |
diff --git a/arch/powerpc/platforms/40x/Kconfig b/arch/powerpc/platforms/40x/Kconfig index f39c953d5353..a6e43cb6f825 100644 --- a/arch/powerpc/platforms/40x/Kconfig +++ b/arch/powerpc/platforms/40x/Kconfig | |||
@@ -45,6 +45,7 @@ config KILAUEA | |||
45 | depends on 40x | 45 | depends on 40x |
46 | default n | 46 | default n |
47 | select 405EX | 47 | select 405EX |
48 | select PPC40x_SIMPLE | ||
48 | select PPC4xx_PCI_EXPRESS | 49 | select PPC4xx_PCI_EXPRESS |
49 | help | 50 | help |
50 | This option enables support for the AMCC PPC405EX evaluation board. | 51 | This option enables support for the AMCC PPC405EX evaluation board. |
@@ -56,6 +57,7 @@ config MAKALU | |||
56 | select 405EX | 57 | select 405EX |
57 | select PCI | 58 | select PCI |
58 | select PPC4xx_PCI_EXPRESS | 59 | select PPC4xx_PCI_EXPRESS |
60 | select PPC40x_SIMPLE | ||
59 | help | 61 | help |
60 | This option enables support for the AMCC PPC405EX board. | 62 | This option enables support for the AMCC PPC405EX board. |
61 | 63 | ||
diff --git a/arch/powerpc/platforms/40x/Makefile b/arch/powerpc/platforms/40x/Makefile index 9bab76a652a6..56e89004c468 100644 --- a/arch/powerpc/platforms/40x/Makefile +++ b/arch/powerpc/platforms/40x/Makefile | |||
@@ -1,6 +1,4 @@ | |||
1 | obj-$(CONFIG_KILAUEA) += kilauea.o | ||
2 | obj-$(CONFIG_HCU4) += hcu4.o | 1 | obj-$(CONFIG_HCU4) += hcu4.o |
3 | obj-$(CONFIG_MAKALU) += makalu.o | ||
4 | obj-$(CONFIG_WALNUT) += walnut.o | 2 | obj-$(CONFIG_WALNUT) += walnut.o |
5 | obj-$(CONFIG_XILINX_VIRTEX_GENERIC_BOARD) += virtex.o | 3 | obj-$(CONFIG_XILINX_VIRTEX_GENERIC_BOARD) += virtex.o |
6 | obj-$(CONFIG_EP405) += ep405.o | 4 | obj-$(CONFIG_EP405) += ep405.o |
diff --git a/arch/powerpc/platforms/40x/kilauea.c b/arch/powerpc/platforms/40x/kilauea.c deleted file mode 100644 index fd7d934dac8b..000000000000 --- a/arch/powerpc/platforms/40x/kilauea.c +++ /dev/null | |||
@@ -1,60 +0,0 @@ | |||
1 | /* | ||
2 | * Kilauea board specific routines | ||
3 | * | ||
4 | * Copyright 2007-2008 DENX Software Engineering, Stefan Roese <sr@denx.de> | ||
5 | * | ||
6 | * Based on the Walnut code by | ||
7 | * Josh Boyer <jwboyer@linux.vnet.ibm.com> | ||
8 | * Copyright 2007 IBM Corporation | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify it | ||
11 | * under the terms of the GNU General Public License as published by the | ||
12 | * Free Software Foundation; either version 2 of the License, or (at your | ||
13 | * option) any later version. | ||
14 | */ | ||
15 | #include <linux/init.h> | ||
16 | #include <linux/of_platform.h> | ||
17 | #include <asm/machdep.h> | ||
18 | #include <asm/prom.h> | ||
19 | #include <asm/udbg.h> | ||
20 | #include <asm/time.h> | ||
21 | #include <asm/uic.h> | ||
22 | #include <asm/pci-bridge.h> | ||
23 | #include <asm/ppc4xx.h> | ||
24 | |||
25 | static __initdata struct of_device_id kilauea_of_bus[] = { | ||
26 | { .compatible = "ibm,plb4", }, | ||
27 | { .compatible = "ibm,opb", }, | ||
28 | { .compatible = "ibm,ebc", }, | ||
29 | {}, | ||
30 | }; | ||
31 | |||
32 | static int __init kilauea_device_probe(void) | ||
33 | { | ||
34 | of_platform_bus_probe(NULL, kilauea_of_bus, NULL); | ||
35 | |||
36 | return 0; | ||
37 | } | ||
38 | machine_device_initcall(kilauea, kilauea_device_probe); | ||
39 | |||
40 | static int __init kilauea_probe(void) | ||
41 | { | ||
42 | unsigned long root = of_get_flat_dt_root(); | ||
43 | |||
44 | if (!of_flat_dt_is_compatible(root, "amcc,kilauea")) | ||
45 | return 0; | ||
46 | |||
47 | ppc_pci_set_flags(PPC_PCI_REASSIGN_ALL_RSRC); | ||
48 | |||
49 | return 1; | ||
50 | } | ||
51 | |||
52 | define_machine(kilauea) { | ||
53 | .name = "Kilauea", | ||
54 | .probe = kilauea_probe, | ||
55 | .progress = udbg_progress, | ||
56 | .init_IRQ = uic_init_tree, | ||
57 | .get_irq = uic_get_irq, | ||
58 | .restart = ppc4xx_reset_system, | ||
59 | .calibrate_decr = generic_calibrate_decr, | ||
60 | }; | ||
diff --git a/arch/powerpc/platforms/40x/makalu.c b/arch/powerpc/platforms/40x/makalu.c deleted file mode 100644 index a6a1d6017b71..000000000000 --- a/arch/powerpc/platforms/40x/makalu.c +++ /dev/null | |||
@@ -1,60 +0,0 @@ | |||
1 | /* | ||
2 | * Makalu board specific routines | ||
3 | * | ||
4 | * Copyright 2007 DENX Software Engineering, Stefan Roese <sr@denx.de> | ||
5 | * | ||
6 | * Based on the Walnut code by | ||
7 | * Josh Boyer <jwboyer@linux.vnet.ibm.com> | ||
8 | * Copyright 2007 IBM Corporation | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify it | ||
11 | * under the terms of the GNU General Public License as published by the | ||
12 | * Free Software Foundation; either version 2 of the License, or (at your | ||
13 | * option) any later version. | ||
14 | */ | ||
15 | #include <linux/init.h> | ||
16 | #include <linux/of_platform.h> | ||
17 | #include <asm/machdep.h> | ||
18 | #include <asm/prom.h> | ||
19 | #include <asm/udbg.h> | ||
20 | #include <asm/time.h> | ||
21 | #include <asm/uic.h> | ||
22 | #include <asm/pci-bridge.h> | ||
23 | #include <asm/ppc4xx.h> | ||
24 | |||
25 | static __initdata struct of_device_id makalu_of_bus[] = { | ||
26 | { .compatible = "ibm,plb4", }, | ||
27 | { .compatible = "ibm,opb", }, | ||
28 | { .compatible = "ibm,ebc", }, | ||
29 | {}, | ||
30 | }; | ||
31 | |||
32 | static int __init makalu_device_probe(void) | ||
33 | { | ||
34 | of_platform_bus_probe(NULL, makalu_of_bus, NULL); | ||
35 | |||
36 | return 0; | ||
37 | } | ||
38 | machine_device_initcall(makalu, makalu_device_probe); | ||
39 | |||
40 | static int __init makalu_probe(void) | ||
41 | { | ||
42 | unsigned long root = of_get_flat_dt_root(); | ||
43 | |||
44 | if (!of_flat_dt_is_compatible(root, "amcc,makalu")) | ||
45 | return 0; | ||
46 | |||
47 | ppc_pci_flags = PPC_PCI_REASSIGN_ALL_RSRC; | ||
48 | |||
49 | return 1; | ||
50 | } | ||
51 | |||
52 | define_machine(makalu) { | ||
53 | .name = "Makalu", | ||
54 | .probe = makalu_probe, | ||
55 | .progress = udbg_progress, | ||
56 | .init_IRQ = uic_init_tree, | ||
57 | .get_irq = uic_get_irq, | ||
58 | .restart = ppc4xx_reset_system, | ||
59 | .calibrate_decr = generic_calibrate_decr, | ||
60 | }; | ||
diff --git a/arch/powerpc/platforms/40x/ppc40x_simple.c b/arch/powerpc/platforms/40x/ppc40x_simple.c index f40ac9b8f99f..5fd5a5974001 100644 --- a/arch/powerpc/platforms/40x/ppc40x_simple.c +++ b/arch/powerpc/platforms/40x/ppc40x_simple.c | |||
@@ -51,7 +51,10 @@ machine_device_initcall(ppc40x_simple, ppc40x_device_probe); | |||
51 | * board.c file for it rather than adding it to this list. | 51 | * board.c file for it rather than adding it to this list. |
52 | */ | 52 | */ |
53 | static char *board[] __initdata = { | 53 | static char *board[] __initdata = { |
54 | "amcc,acadia" | 54 | "amcc,acadia", |
55 | "amcc,haleakala", | ||
56 | "amcc,kilauea", | ||
57 | "amcc,makalu" | ||
55 | }; | 58 | }; |
56 | 59 | ||
57 | static int __init ppc40x_probe(void) | 60 | static int __init ppc40x_probe(void) |
diff --git a/arch/powerpc/platforms/40x/virtex.c b/arch/powerpc/platforms/40x/virtex.c index fc7fb001276c..d0fc6866b00c 100644 --- a/arch/powerpc/platforms/40x/virtex.c +++ b/arch/powerpc/platforms/40x/virtex.c | |||
@@ -14,6 +14,7 @@ | |||
14 | #include <asm/prom.h> | 14 | #include <asm/prom.h> |
15 | #include <asm/time.h> | 15 | #include <asm/time.h> |
16 | #include <asm/xilinx_intc.h> | 16 | #include <asm/xilinx_intc.h> |
17 | #include <asm/xilinx_pci.h> | ||
17 | #include <asm/ppc4xx.h> | 18 | #include <asm/ppc4xx.h> |
18 | 19 | ||
19 | static struct of_device_id xilinx_of_bus_ids[] __initdata = { | 20 | static struct of_device_id xilinx_of_bus_ids[] __initdata = { |
@@ -47,6 +48,7 @@ static int __init virtex_probe(void) | |||
47 | define_machine(virtex) { | 48 | define_machine(virtex) { |
48 | .name = "Xilinx Virtex", | 49 | .name = "Xilinx Virtex", |
49 | .probe = virtex_probe, | 50 | .probe = virtex_probe, |
51 | .setup_arch = xilinx_pci_init, | ||
50 | .init_IRQ = xilinx_intc_init_tree, | 52 | .init_IRQ = xilinx_intc_init_tree, |
51 | .get_irq = xilinx_intc_get_irq, | 53 | .get_irq = xilinx_intc_get_irq, |
52 | .restart = ppc4xx_reset_system, | 54 | .restart = ppc4xx_reset_system, |
diff --git a/arch/powerpc/platforms/44x/Kconfig b/arch/powerpc/platforms/44x/Kconfig index 0d83a6a0397d..90e3192611a4 100644 --- a/arch/powerpc/platforms/44x/Kconfig +++ b/arch/powerpc/platforms/44x/Kconfig | |||
@@ -156,7 +156,7 @@ config YOSEMITE | |||
156 | # This option enables support for the IBM PPC440GX evaluation board. | 156 | # This option enables support for the IBM PPC440GX evaluation board. |
157 | 157 | ||
158 | config XILINX_VIRTEX440_GENERIC_BOARD | 158 | config XILINX_VIRTEX440_GENERIC_BOARD |
159 | bool "Generic Xilinx Virtex 440 board" | 159 | bool "Generic Xilinx Virtex 5 FXT board support" |
160 | depends on 44x | 160 | depends on 44x |
161 | default n | 161 | default n |
162 | select XILINX_VIRTEX_5_FXT | 162 | select XILINX_VIRTEX_5_FXT |
@@ -171,6 +171,17 @@ config XILINX_VIRTEX440_GENERIC_BOARD | |||
171 | Most Virtex 5 designs should use this unless it needs to do some | 171 | Most Virtex 5 designs should use this unless it needs to do some |
172 | special configuration at board probe time. | 172 | special configuration at board probe time. |
173 | 173 | ||
174 | config XILINX_ML510 | ||
175 | bool "Xilinx ML510 extra support" | ||
176 | depends on XILINX_VIRTEX440_GENERIC_BOARD | ||
177 | select PPC_PCI_CHOICE | ||
178 | select XILINX_PCI if PCI | ||
179 | select PPC_INDIRECT_PCI if PCI | ||
180 | select PPC_I8259 if PCI | ||
181 | help | ||
182 | This option enables extra support for features on the Xilinx ML510 | ||
183 | board. The ML510 has a PCI bus with ALI south bridge. | ||
184 | |||
174 | config PPC44x_SIMPLE | 185 | config PPC44x_SIMPLE |
175 | bool "Simple PowerPC 44x board support" | 186 | bool "Simple PowerPC 44x board support" |
176 | depends on 44x | 187 | depends on 44x |
diff --git a/arch/powerpc/platforms/44x/Makefile b/arch/powerpc/platforms/44x/Makefile index 01f51daace13..ee6185aeaa3b 100644 --- a/arch/powerpc/platforms/44x/Makefile +++ b/arch/powerpc/platforms/44x/Makefile | |||
@@ -4,3 +4,4 @@ obj-$(CONFIG_EBONY) += ebony.o | |||
4 | obj-$(CONFIG_SAM440EP) += sam440ep.o | 4 | obj-$(CONFIG_SAM440EP) += sam440ep.o |
5 | obj-$(CONFIG_WARP) += warp.o | 5 | obj-$(CONFIG_WARP) += warp.o |
6 | obj-$(CONFIG_XILINX_VIRTEX_5_FXT) += virtex.o | 6 | obj-$(CONFIG_XILINX_VIRTEX_5_FXT) += virtex.o |
7 | obj-$(CONFIG_XILINX_ML510) += virtex_ml510.o | ||
diff --git a/arch/powerpc/platforms/44x/virtex.c b/arch/powerpc/platforms/44x/virtex.c index 68637faf70ae..cf96ccaa760c 100644 --- a/arch/powerpc/platforms/44x/virtex.c +++ b/arch/powerpc/platforms/44x/virtex.c | |||
@@ -16,6 +16,7 @@ | |||
16 | #include <asm/prom.h> | 16 | #include <asm/prom.h> |
17 | #include <asm/time.h> | 17 | #include <asm/time.h> |
18 | #include <asm/xilinx_intc.h> | 18 | #include <asm/xilinx_intc.h> |
19 | #include <asm/xilinx_pci.h> | ||
19 | #include <asm/reg.h> | 20 | #include <asm/reg.h> |
20 | #include <asm/ppc4xx.h> | 21 | #include <asm/ppc4xx.h> |
21 | #include "44x.h" | 22 | #include "44x.h" |
@@ -53,6 +54,7 @@ static int __init virtex_probe(void) | |||
53 | define_machine(virtex) { | 54 | define_machine(virtex) { |
54 | .name = "Xilinx Virtex440", | 55 | .name = "Xilinx Virtex440", |
55 | .probe = virtex_probe, | 56 | .probe = virtex_probe, |
57 | .setup_arch = xilinx_pci_init, | ||
56 | .init_IRQ = xilinx_intc_init_tree, | 58 | .init_IRQ = xilinx_intc_init_tree, |
57 | .get_irq = xilinx_intc_get_irq, | 59 | .get_irq = xilinx_intc_get_irq, |
58 | .calibrate_decr = generic_calibrate_decr, | 60 | .calibrate_decr = generic_calibrate_decr, |
diff --git a/arch/powerpc/platforms/44x/virtex_ml510.c b/arch/powerpc/platforms/44x/virtex_ml510.c new file mode 100644 index 000000000000..ba4a6e388a46 --- /dev/null +++ b/arch/powerpc/platforms/44x/virtex_ml510.c | |||
@@ -0,0 +1,29 @@ | |||
1 | #include <asm/i8259.h> | ||
2 | #include <linux/pci.h> | ||
3 | #include "44x.h" | ||
4 | |||
5 | /** | ||
6 | * ml510_ail_quirk | ||
7 | */ | ||
8 | static void __devinit ml510_ali_quirk(struct pci_dev *dev) | ||
9 | { | ||
10 | /* Enable the IDE controller */ | ||
11 | pci_write_config_byte(dev, 0x58, 0x4c); | ||
12 | /* Assign irq 14 to the primary ide channel */ | ||
13 | pci_write_config_byte(dev, 0x44, 0x0d); | ||
14 | /* Assign irq 15 to the secondary ide channel */ | ||
15 | pci_write_config_byte(dev, 0x75, 0x0f); | ||
16 | /* Set the ide controller in native mode */ | ||
17 | pci_write_config_byte(dev, 0x09, 0xff); | ||
18 | |||
19 | /* INTB = disabled, INTA = disabled */ | ||
20 | pci_write_config_byte(dev, 0x48, 0x00); | ||
21 | /* INTD = disabled, INTC = disabled */ | ||
22 | pci_write_config_byte(dev, 0x4a, 0x00); | ||
23 | /* Audio = INT7, Modem = disabled. */ | ||
24 | pci_write_config_byte(dev, 0x4b, 0x60); | ||
25 | /* USB = INT7 */ | ||
26 | pci_write_config_byte(dev, 0x74, 0x06); | ||
27 | } | ||
28 | DECLARE_PCI_FIXUP_EARLY(0x10b9, 0x1533, ml510_ali_quirk); | ||
29 | |||
diff --git a/arch/powerpc/platforms/44x/warp.c b/arch/powerpc/platforms/44x/warp.c index 960edf89be51..c5118802a281 100644 --- a/arch/powerpc/platforms/44x/warp.c +++ b/arch/powerpc/platforms/44x/warp.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * PIKA Warp(tm) board specific routines | 2 | * PIKA Warp(tm) board specific routines |
3 | * | 3 | * |
4 | * Copyright (c) 2008 PIKA Technologies | 4 | * Copyright (c) 2008-2009 PIKA Technologies |
5 | * Sean MacLennan <smaclennan@pikatech.com> | 5 | * Sean MacLennan <smaclennan@pikatech.com> |
6 | * | 6 | * |
7 | * This program is free software; you can redistribute it and/or modify it | 7 | * This program is free software; you can redistribute it and/or modify it |
@@ -15,6 +15,7 @@ | |||
15 | #include <linux/i2c.h> | 15 | #include <linux/i2c.h> |
16 | #include <linux/interrupt.h> | 16 | #include <linux/interrupt.h> |
17 | #include <linux/delay.h> | 17 | #include <linux/delay.h> |
18 | #include <linux/of_gpio.h> | ||
18 | 19 | ||
19 | #include <asm/machdep.h> | 20 | #include <asm/machdep.h> |
20 | #include <asm/prom.h> | 21 | #include <asm/prom.h> |
@@ -23,6 +24,7 @@ | |||
23 | #include <asm/uic.h> | 24 | #include <asm/uic.h> |
24 | #include <asm/ppc4xx.h> | 25 | #include <asm/ppc4xx.h> |
25 | 26 | ||
27 | |||
26 | static __initdata struct of_device_id warp_of_bus[] = { | 28 | static __initdata struct of_device_id warp_of_bus[] = { |
27 | { .compatible = "ibm,plb4", }, | 29 | { .compatible = "ibm,plb4", }, |
28 | { .compatible = "ibm,opb", }, | 30 | { .compatible = "ibm,opb", }, |
@@ -55,6 +57,8 @@ define_machine(warp) { | |||
55 | }; | 57 | }; |
56 | 58 | ||
57 | 59 | ||
60 | static u32 post_info; | ||
61 | |||
58 | /* I am not sure this is the best place for this... */ | 62 | /* I am not sure this is the best place for this... */ |
59 | static int __init warp_post_info(void) | 63 | static int __init warp_post_info(void) |
60 | { | 64 | { |
@@ -77,21 +81,21 @@ static int __init warp_post_info(void) | |||
77 | 81 | ||
78 | iounmap(fpga); | 82 | iounmap(fpga); |
79 | 83 | ||
80 | if (post1 || post2) | 84 | if (post1 || post2) { |
81 | printk(KERN_INFO "Warp POST %08x %08x\n", post1, post2); | 85 | printk(KERN_INFO "Warp POST %08x %08x\n", post1, post2); |
82 | else | 86 | post_info = 1; |
87 | } else | ||
83 | printk(KERN_INFO "Warp POST OK\n"); | 88 | printk(KERN_INFO "Warp POST OK\n"); |
84 | 89 | ||
85 | return 0; | 90 | return 0; |
86 | } | 91 | } |
87 | machine_late_initcall(warp, warp_post_info); | ||
88 | 92 | ||
89 | 93 | ||
90 | #ifdef CONFIG_SENSORS_AD7414 | 94 | #ifdef CONFIG_SENSORS_AD7414 |
91 | 95 | ||
92 | static LIST_HEAD(dtm_shutdown_list); | 96 | static LIST_HEAD(dtm_shutdown_list); |
93 | static void __iomem *dtm_fpga; | 97 | static void __iomem *dtm_fpga; |
94 | static void __iomem *gpio_base; | 98 | static unsigned green_led, red_led; |
95 | 99 | ||
96 | 100 | ||
97 | struct dtm_shutdown { | 101 | struct dtm_shutdown { |
@@ -134,14 +138,17 @@ int pika_dtm_unregister_shutdown(void (*func)(void *arg), void *arg) | |||
134 | static irqreturn_t temp_isr(int irq, void *context) | 138 | static irqreturn_t temp_isr(int irq, void *context) |
135 | { | 139 | { |
136 | struct dtm_shutdown *shutdown; | 140 | struct dtm_shutdown *shutdown; |
141 | int value = 1; | ||
137 | 142 | ||
138 | local_irq_disable(); | 143 | local_irq_disable(); |
139 | 144 | ||
145 | gpio_set_value(green_led, 0); | ||
146 | |||
140 | /* Run through the shutdown list. */ | 147 | /* Run through the shutdown list. */ |
141 | list_for_each_entry(shutdown, &dtm_shutdown_list, list) | 148 | list_for_each_entry(shutdown, &dtm_shutdown_list, list) |
142 | shutdown->func(shutdown->arg); | 149 | shutdown->func(shutdown->arg); |
143 | 150 | ||
144 | printk(KERN_EMERG "\n\nCritical Temperature Shutdown\n"); | 151 | printk(KERN_EMERG "\n\nCritical Temperature Shutdown\n\n"); |
145 | 152 | ||
146 | while (1) { | 153 | while (1) { |
147 | if (dtm_fpga) { | 154 | if (dtm_fpga) { |
@@ -149,52 +156,34 @@ static irqreturn_t temp_isr(int irq, void *context) | |||
149 | out_be32(dtm_fpga + 0x14, reset); | 156 | out_be32(dtm_fpga + 0x14, reset); |
150 | } | 157 | } |
151 | 158 | ||
152 | if (gpio_base) { | 159 | gpio_set_value(red_led, value); |
153 | unsigned leds = in_be32(gpio_base); | 160 | value ^= 1; |
154 | |||
155 | /* green off, red toggle */ | ||
156 | leds &= ~0x80000000; | ||
157 | leds ^= 0x40000000; | ||
158 | |||
159 | out_be32(gpio_base, leds); | ||
160 | } | ||
161 | |||
162 | mdelay(500); | 161 | mdelay(500); |
163 | } | 162 | } |
164 | } | 163 | } |
165 | 164 | ||
166 | static int pika_setup_leds(void) | 165 | static int pika_setup_leds(void) |
167 | { | 166 | { |
168 | struct device_node *np; | 167 | struct device_node *np, *child; |
169 | const u32 *gpios; | ||
170 | int len; | ||
171 | 168 | ||
172 | np = of_find_compatible_node(NULL, NULL, "linux,gpio-led"); | 169 | np = of_find_compatible_node(NULL, NULL, "gpio-leds"); |
173 | if (!np) { | 170 | if (!np) { |
174 | printk(KERN_ERR __FILE__ ": Unable to find gpio-led\n"); | 171 | printk(KERN_ERR __FILE__ ": Unable to find leds\n"); |
175 | return -ENOENT; | ||
176 | } | ||
177 | |||
178 | gpios = of_get_property(np, "gpios", &len); | ||
179 | of_node_put(np); | ||
180 | if (!gpios || len < 4) { | ||
181 | printk(KERN_ERR __FILE__ | ||
182 | ": Unable to get gpios property (%d)\n", len); | ||
183 | return -ENOENT; | 172 | return -ENOENT; |
184 | } | 173 | } |
185 | 174 | ||
186 | np = of_find_node_by_phandle(gpios[0]); | 175 | for_each_child_of_node(np, child) |
187 | if (!np) { | 176 | if (strcmp(child->name, "green") == 0) { |
188 | printk(KERN_ERR __FILE__ ": Unable to find gpio\n"); | 177 | green_led = of_get_gpio(child, 0); |
189 | return -ENOENT; | 178 | /* Turn back on the green LED */ |
190 | } | 179 | gpio_set_value(green_led, 1); |
180 | } else if (strcmp(child->name, "red") == 0) { | ||
181 | red_led = of_get_gpio(child, 0); | ||
182 | /* Set based on post */ | ||
183 | gpio_set_value(red_led, post_info); | ||
184 | } | ||
191 | 185 | ||
192 | gpio_base = of_iomap(np, 0); | ||
193 | of_node_put(np); | 186 | of_node_put(np); |
194 | if (!gpio_base) { | ||
195 | printk(KERN_ERR __FILE__ ": Unable to map gpio"); | ||
196 | return -ENOMEM; | ||
197 | } | ||
198 | 187 | ||
199 | return 0; | 188 | return 0; |
200 | } | 189 | } |
@@ -270,10 +259,10 @@ static int pika_dtm_thread(void __iomem *fpga) | |||
270 | } | 259 | } |
271 | 260 | ||
272 | found_it: | 261 | found_it: |
273 | i2c_put_adapter(adap); | ||
274 | |||
275 | pika_setup_critical_temp(client); | 262 | pika_setup_critical_temp(client); |
276 | 263 | ||
264 | i2c_put_adapter(adap); | ||
265 | |||
277 | printk(KERN_INFO "PIKA DTM thread running.\n"); | 266 | printk(KERN_INFO "PIKA DTM thread running.\n"); |
278 | 267 | ||
279 | while (!kthread_should_stop()) { | 268 | while (!kthread_should_stop()) { |
@@ -311,6 +300,9 @@ static int __init pika_dtm_start(void) | |||
311 | if (dtm_fpga == NULL) | 300 | if (dtm_fpga == NULL) |
312 | return -ENOENT; | 301 | return -ENOENT; |
313 | 302 | ||
303 | /* Must get post info before thread starts. */ | ||
304 | warp_post_info(); | ||
305 | |||
314 | dtm_thread = kthread_run(pika_dtm_thread, dtm_fpga, "pika-dtm"); | 306 | dtm_thread = kthread_run(pika_dtm_thread, dtm_fpga, "pika-dtm"); |
315 | if (IS_ERR(dtm_thread)) { | 307 | if (IS_ERR(dtm_thread)) { |
316 | iounmap(dtm_fpga); | 308 | iounmap(dtm_fpga); |
@@ -333,6 +325,8 @@ int pika_dtm_unregister_shutdown(void (*func)(void *arg), void *arg) | |||
333 | return 0; | 325 | return 0; |
334 | } | 326 | } |
335 | 327 | ||
328 | machine_late_initcall(warp, warp_post_info); | ||
329 | |||
336 | #endif | 330 | #endif |
337 | 331 | ||
338 | EXPORT_SYMBOL(pika_dtm_register_shutdown); | 332 | EXPORT_SYMBOL(pika_dtm_register_shutdown); |
diff --git a/arch/powerpc/platforms/52xx/efika.c b/arch/powerpc/platforms/52xx/efika.c index a2068faef6ea..bcc69e1f77c1 100644 --- a/arch/powerpc/platforms/52xx/efika.c +++ b/arch/powerpc/platforms/52xx/efika.c | |||
@@ -34,7 +34,7 @@ | |||
34 | static int rtas_read_config(struct pci_bus *bus, unsigned int devfn, int offset, | 34 | static int rtas_read_config(struct pci_bus *bus, unsigned int devfn, int offset, |
35 | int len, u32 * val) | 35 | int len, u32 * val) |
36 | { | 36 | { |
37 | struct pci_controller *hose = bus->sysdata; | 37 | struct pci_controller *hose = pci_bus_to_host(bus); |
38 | unsigned long addr = (offset & 0xff) | ((devfn & 0xff) << 8) | 38 | unsigned long addr = (offset & 0xff) | ((devfn & 0xff) << 8) |
39 | | (((bus->number - hose->first_busno) & 0xff) << 16) | 39 | | (((bus->number - hose->first_busno) & 0xff) << 16) |
40 | | (hose->global_number << 24); | 40 | | (hose->global_number << 24); |
@@ -49,7 +49,7 @@ static int rtas_read_config(struct pci_bus *bus, unsigned int devfn, int offset, | |||
49 | static int rtas_write_config(struct pci_bus *bus, unsigned int devfn, | 49 | static int rtas_write_config(struct pci_bus *bus, unsigned int devfn, |
50 | int offset, int len, u32 val) | 50 | int offset, int len, u32 val) |
51 | { | 51 | { |
52 | struct pci_controller *hose = bus->sysdata; | 52 | struct pci_controller *hose = pci_bus_to_host(bus); |
53 | unsigned long addr = (offset & 0xff) | ((devfn & 0xff) << 8) | 53 | unsigned long addr = (offset & 0xff) | ((devfn & 0xff) << 8) |
54 | | (((bus->number - hose->first_busno) & 0xff) << 16) | 54 | | (((bus->number - hose->first_busno) & 0xff) << 16) |
55 | | (hose->global_number << 24); | 55 | | (hose->global_number << 24); |
diff --git a/arch/powerpc/platforms/52xx/mpc52xx_pci.c b/arch/powerpc/platforms/52xx/mpc52xx_pci.c index 87ff522f28b5..dd43114e9684 100644 --- a/arch/powerpc/platforms/52xx/mpc52xx_pci.c +++ b/arch/powerpc/platforms/52xx/mpc52xx_pci.c | |||
@@ -107,7 +107,7 @@ static int | |||
107 | mpc52xx_pci_read_config(struct pci_bus *bus, unsigned int devfn, | 107 | mpc52xx_pci_read_config(struct pci_bus *bus, unsigned int devfn, |
108 | int offset, int len, u32 *val) | 108 | int offset, int len, u32 *val) |
109 | { | 109 | { |
110 | struct pci_controller *hose = bus->sysdata; | 110 | struct pci_controller *hose = pci_bus_to_host(bus); |
111 | u32 value; | 111 | u32 value; |
112 | 112 | ||
113 | if (ppc_md.pci_exclude_device) | 113 | if (ppc_md.pci_exclude_device) |
@@ -164,7 +164,7 @@ static int | |||
164 | mpc52xx_pci_write_config(struct pci_bus *bus, unsigned int devfn, | 164 | mpc52xx_pci_write_config(struct pci_bus *bus, unsigned int devfn, |
165 | int offset, int len, u32 val) | 165 | int offset, int len, u32 val) |
166 | { | 166 | { |
167 | struct pci_controller *hose = bus->sysdata; | 167 | struct pci_controller *hose = pci_bus_to_host(bus); |
168 | u32 value, mask; | 168 | u32 value, mask; |
169 | 169 | ||
170 | if (ppc_md.pci_exclude_device) | 170 | if (ppc_md.pci_exclude_device) |
diff --git a/arch/powerpc/platforms/82xx/pq2ads.h b/arch/powerpc/platforms/82xx/pq2ads.h index 984db42cc8e7..6cf0f97486e2 100644 --- a/arch/powerpc/platforms/82xx/pq2ads.h +++ b/arch/powerpc/platforms/82xx/pq2ads.h | |||
@@ -24,10 +24,6 @@ | |||
24 | 24 | ||
25 | #include <linux/seq_file.h> | 25 | #include <linux/seq_file.h> |
26 | 26 | ||
27 | /* Backword-compatibility stuff for the drivers */ | ||
28 | #define CPM_MAP_ADDR ((uint)0xf0000000) | ||
29 | #define CPM_IRQ_OFFSET 0 | ||
30 | |||
31 | /* The ADS8260 has 16, 32-bit wide control/status registers, accessed | 27 | /* The ADS8260 has 16, 32-bit wide control/status registers, accessed |
32 | * only on word boundaries. | 28 | * only on word boundaries. |
33 | * Not all are used (yet), or are interesting to us (yet). | 29 | * Not all are used (yet), or are interesting to us (yet). |
@@ -44,14 +40,5 @@ | |||
44 | #define BCSR3_FETHIEN2 ((uint)0x10000000) /* 0 == enable*/ | 40 | #define BCSR3_FETHIEN2 ((uint)0x10000000) /* 0 == enable*/ |
45 | #define BCSR3_FETH2_RST ((uint)0x80000000) /* 0 == reset */ | 41 | #define BCSR3_FETH2_RST ((uint)0x80000000) /* 0 == reset */ |
46 | 42 | ||
47 | /* cpm serial driver works with constants below */ | ||
48 | |||
49 | #define SIU_INT_SMC1 ((uint)0x04+CPM_IRQ_OFFSET) | ||
50 | #define SIU_INT_SMC2 ((uint)0x05+CPM_IRQ_OFFSET) | ||
51 | #define SIU_INT_SCC1 ((uint)0x28+CPM_IRQ_OFFSET) | ||
52 | #define SIU_INT_SCC2 ((uint)0x29+CPM_IRQ_OFFSET) | ||
53 | #define SIU_INT_SCC3 ((uint)0x2a+CPM_IRQ_OFFSET) | ||
54 | #define SIU_INT_SCC4 ((uint)0x2b+CPM_IRQ_OFFSET) | ||
55 | |||
56 | #endif /* __MACH_ADS8260_DEFS */ | 43 | #endif /* __MACH_ADS8260_DEFS */ |
57 | #endif /* __KERNEL__ */ | 44 | #endif /* __KERNEL__ */ |
diff --git a/arch/powerpc/platforms/85xx/Kconfig b/arch/powerpc/platforms/85xx/Kconfig index 7f066adc068c..43d385cedcd7 100644 --- a/arch/powerpc/platforms/85xx/Kconfig +++ b/arch/powerpc/platforms/85xx/Kconfig | |||
@@ -34,6 +34,7 @@ config MPC85xx_MDS | |||
34 | bool "Freescale MPC85xx MDS" | 34 | bool "Freescale MPC85xx MDS" |
35 | select DEFAULT_UIMAGE | 35 | select DEFAULT_UIMAGE |
36 | select PHYLIB | 36 | select PHYLIB |
37 | select HAS_RAPIDIO | ||
37 | help | 38 | help |
38 | This option enables support for the MPC85xx MDS board | 39 | This option enables support for the MPC85xx MDS board |
39 | 40 | ||
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_ds.c b/arch/powerpc/platforms/85xx/mpc85xx_ds.c index de66de7a9ca2..53d5851a6c97 100644 --- a/arch/powerpc/platforms/85xx/mpc85xx_ds.c +++ b/arch/powerpc/platforms/85xx/mpc85xx_ds.c | |||
@@ -163,7 +163,8 @@ static void __init mpc85xx_ds_setup_arch(void) | |||
163 | #ifdef CONFIG_PCI | 163 | #ifdef CONFIG_PCI |
164 | for_each_node_by_type(np, "pci") { | 164 | for_each_node_by_type(np, "pci") { |
165 | if (of_device_is_compatible(np, "fsl,mpc8540-pci") || | 165 | if (of_device_is_compatible(np, "fsl,mpc8540-pci") || |
166 | of_device_is_compatible(np, "fsl,mpc8548-pcie")) { | 166 | of_device_is_compatible(np, "fsl,mpc8548-pcie") || |
167 | of_device_is_compatible(np, "fsl,p2020-pcie")) { | ||
167 | struct resource rsrc; | 168 | struct resource rsrc; |
168 | of_address_to_resource(np, 0, &rsrc); | 169 | of_address_to_resource(np, 0, &rsrc); |
169 | if ((rsrc.start & 0xfffff) == primary_phb_addr) | 170 | if ((rsrc.start & 0xfffff) == primary_phb_addr) |
@@ -195,9 +196,9 @@ static int __init mpc8544_ds_probe(void) | |||
195 | primary_phb_addr = 0xb000; | 196 | primary_phb_addr = 0xb000; |
196 | #endif | 197 | #endif |
197 | return 1; | 198 | return 1; |
198 | } else { | ||
199 | return 0; | ||
200 | } | 199 | } |
200 | |||
201 | return 0; | ||
201 | } | 202 | } |
202 | 203 | ||
203 | static struct of_device_id __initdata mpc85xxds_ids[] = { | 204 | static struct of_device_id __initdata mpc85xxds_ids[] = { |
@@ -214,6 +215,7 @@ static int __init mpc85xxds_publish_devices(void) | |||
214 | } | 215 | } |
215 | machine_device_initcall(mpc8544_ds, mpc85xxds_publish_devices); | 216 | machine_device_initcall(mpc8544_ds, mpc85xxds_publish_devices); |
216 | machine_device_initcall(mpc8572_ds, mpc85xxds_publish_devices); | 217 | machine_device_initcall(mpc8572_ds, mpc85xxds_publish_devices); |
218 | machine_device_initcall(p2020_ds, mpc85xxds_publish_devices); | ||
217 | 219 | ||
218 | /* | 220 | /* |
219 | * Called very early, device-tree isn't unflattened | 221 | * Called very early, device-tree isn't unflattened |
@@ -227,9 +229,26 @@ static int __init mpc8572_ds_probe(void) | |||
227 | primary_phb_addr = 0x8000; | 229 | primary_phb_addr = 0x8000; |
228 | #endif | 230 | #endif |
229 | return 1; | 231 | return 1; |
230 | } else { | ||
231 | return 0; | ||
232 | } | 232 | } |
233 | |||
234 | return 0; | ||
235 | } | ||
236 | |||
237 | /* | ||
238 | * Called very early, device-tree isn't unflattened | ||
239 | */ | ||
240 | static int __init p2020_ds_probe(void) | ||
241 | { | ||
242 | unsigned long root = of_get_flat_dt_root(); | ||
243 | |||
244 | if (of_flat_dt_is_compatible(root, "fsl,P2020DS")) { | ||
245 | #ifdef CONFIG_PCI | ||
246 | primary_phb_addr = 0x9000; | ||
247 | #endif | ||
248 | return 1; | ||
249 | } | ||
250 | |||
251 | return 0; | ||
233 | } | 252 | } |
234 | 253 | ||
235 | define_machine(mpc8544_ds) { | 254 | define_machine(mpc8544_ds) { |
@@ -259,3 +278,17 @@ define_machine(mpc8572_ds) { | |||
259 | .calibrate_decr = generic_calibrate_decr, | 278 | .calibrate_decr = generic_calibrate_decr, |
260 | .progress = udbg_progress, | 279 | .progress = udbg_progress, |
261 | }; | 280 | }; |
281 | |||
282 | define_machine(p2020_ds) { | ||
283 | .name = "P2020 DS", | ||
284 | .probe = p2020_ds_probe, | ||
285 | .setup_arch = mpc85xx_ds_setup_arch, | ||
286 | .init_IRQ = mpc85xx_ds_pic_init, | ||
287 | #ifdef CONFIG_PCI | ||
288 | .pcibios_fixup_bus = fsl_pcibios_fixup_bus, | ||
289 | #endif | ||
290 | .get_irq = mpic_get_irq, | ||
291 | .restart = fsl_rstcr_restart, | ||
292 | .calibrate_decr = generic_calibrate_decr, | ||
293 | .progress = udbg_progress, | ||
294 | }; | ||
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_mds.c b/arch/powerpc/platforms/85xx/mpc85xx_mds.c index 7dd029034aec..b2c0a4319973 100644 --- a/arch/powerpc/platforms/85xx/mpc85xx_mds.c +++ b/arch/powerpc/platforms/85xx/mpc85xx_mds.c | |||
@@ -206,23 +206,24 @@ static void __init mpc85xx_mds_setup_arch(void) | |||
206 | } | 206 | } |
207 | 207 | ||
208 | if (bcsr_regs) { | 208 | if (bcsr_regs) { |
209 | if (machine_is(mpc8568_mds)) { | ||
209 | #define BCSR_UCC1_GETH_EN (0x1 << 7) | 210 | #define BCSR_UCC1_GETH_EN (0x1 << 7) |
210 | #define BCSR_UCC2_GETH_EN (0x1 << 7) | 211 | #define BCSR_UCC2_GETH_EN (0x1 << 7) |
211 | #define BCSR_UCC1_MODE_MSK (0x3 << 4) | 212 | #define BCSR_UCC1_MODE_MSK (0x3 << 4) |
212 | #define BCSR_UCC2_MODE_MSK (0x3 << 0) | 213 | #define BCSR_UCC2_MODE_MSK (0x3 << 0) |
213 | 214 | ||
214 | /* Turn off UCC1 & UCC2 */ | 215 | /* Turn off UCC1 & UCC2 */ |
215 | clrbits8(&bcsr_regs[8], BCSR_UCC1_GETH_EN); | 216 | clrbits8(&bcsr_regs[8], BCSR_UCC1_GETH_EN); |
216 | clrbits8(&bcsr_regs[9], BCSR_UCC2_GETH_EN); | 217 | clrbits8(&bcsr_regs[9], BCSR_UCC2_GETH_EN); |
217 | 218 | ||
218 | /* Mode is RGMII, all bits clear */ | 219 | /* Mode is RGMII, all bits clear */ |
219 | clrbits8(&bcsr_regs[11], BCSR_UCC1_MODE_MSK | | 220 | clrbits8(&bcsr_regs[11], BCSR_UCC1_MODE_MSK | |
220 | BCSR_UCC2_MODE_MSK); | 221 | BCSR_UCC2_MODE_MSK); |
221 | |||
222 | /* Turn UCC1 & UCC2 on */ | ||
223 | setbits8(&bcsr_regs[8], BCSR_UCC1_GETH_EN); | ||
224 | setbits8(&bcsr_regs[9], BCSR_UCC2_GETH_EN); | ||
225 | 222 | ||
223 | /* Turn UCC1 & UCC2 on */ | ||
224 | setbits8(&bcsr_regs[8], BCSR_UCC1_GETH_EN); | ||
225 | setbits8(&bcsr_regs[9], BCSR_UCC2_GETH_EN); | ||
226 | } | ||
226 | iounmap(bcsr_regs); | 227 | iounmap(bcsr_regs); |
227 | } | 228 | } |
228 | #endif /* CONFIG_QUICC_ENGINE */ | 229 | #endif /* CONFIG_QUICC_ENGINE */ |
@@ -257,7 +258,8 @@ static int __init board_fixups(void) | |||
257 | 258 | ||
258 | return 0; | 259 | return 0; |
259 | } | 260 | } |
260 | machine_arch_initcall(mpc85xx_mds, board_fixups); | 261 | machine_arch_initcall(mpc8568_mds, board_fixups); |
262 | machine_arch_initcall(mpc8569_mds, board_fixups); | ||
261 | 263 | ||
262 | static struct of_device_id mpc85xx_ids[] = { | 264 | static struct of_device_id mpc85xx_ids[] = { |
263 | { .type = "soc", }, | 265 | { .type = "soc", }, |
@@ -276,7 +278,8 @@ static int __init mpc85xx_publish_devices(void) | |||
276 | 278 | ||
277 | return 0; | 279 | return 0; |
278 | } | 280 | } |
279 | machine_device_initcall(mpc85xx_mds, mpc85xx_publish_devices); | 281 | machine_device_initcall(mpc8568_mds, mpc85xx_publish_devices); |
282 | machine_device_initcall(mpc8569_mds, mpc85xx_publish_devices); | ||
280 | 283 | ||
281 | static void __init mpc85xx_mds_pic_init(void) | 284 | static void __init mpc85xx_mds_pic_init(void) |
282 | { | 285 | { |
@@ -321,8 +324,8 @@ static int __init mpc85xx_mds_probe(void) | |||
321 | return of_flat_dt_is_compatible(root, "MPC85xxMDS"); | 324 | return of_flat_dt_is_compatible(root, "MPC85xxMDS"); |
322 | } | 325 | } |
323 | 326 | ||
324 | define_machine(mpc85xx_mds) { | 327 | define_machine(mpc8568_mds) { |
325 | .name = "MPC85xx MDS", | 328 | .name = "MPC8568 MDS", |
326 | .probe = mpc85xx_mds_probe, | 329 | .probe = mpc85xx_mds_probe, |
327 | .setup_arch = mpc85xx_mds_setup_arch, | 330 | .setup_arch = mpc85xx_mds_setup_arch, |
328 | .init_IRQ = mpc85xx_mds_pic_init, | 331 | .init_IRQ = mpc85xx_mds_pic_init, |
@@ -334,3 +337,24 @@ define_machine(mpc85xx_mds) { | |||
334 | .pcibios_fixup_bus = fsl_pcibios_fixup_bus, | 337 | .pcibios_fixup_bus = fsl_pcibios_fixup_bus, |
335 | #endif | 338 | #endif |
336 | }; | 339 | }; |
340 | |||
341 | static int __init mpc8569_mds_probe(void) | ||
342 | { | ||
343 | unsigned long root = of_get_flat_dt_root(); | ||
344 | |||
345 | return of_flat_dt_is_compatible(root, "fsl,MPC8569EMDS"); | ||
346 | } | ||
347 | |||
348 | define_machine(mpc8569_mds) { | ||
349 | .name = "MPC8569 MDS", | ||
350 | .probe = mpc8569_mds_probe, | ||
351 | .setup_arch = mpc85xx_mds_setup_arch, | ||
352 | .init_IRQ = mpc85xx_mds_pic_init, | ||
353 | .get_irq = mpic_get_irq, | ||
354 | .restart = fsl_rstcr_restart, | ||
355 | .calibrate_decr = generic_calibrate_decr, | ||
356 | .progress = udbg_progress, | ||
357 | #ifdef CONFIG_PCI | ||
358 | .pcibios_fixup_bus = fsl_pcibios_fixup_bus, | ||
359 | #endif | ||
360 | }; | ||
diff --git a/arch/powerpc/platforms/86xx/gef_ppc9a.c b/arch/powerpc/platforms/86xx/gef_ppc9a.c index d79104669cdc..2efa052975e6 100644 --- a/arch/powerpc/platforms/86xx/gef_ppc9a.c +++ b/arch/powerpc/platforms/86xx/gef_ppc9a.c | |||
@@ -28,7 +28,6 @@ | |||
28 | #include <asm/time.h> | 28 | #include <asm/time.h> |
29 | #include <asm/machdep.h> | 29 | #include <asm/machdep.h> |
30 | #include <asm/pci-bridge.h> | 30 | #include <asm/pci-bridge.h> |
31 | #include <asm/mpc86xx.h> | ||
32 | #include <asm/prom.h> | 31 | #include <asm/prom.h> |
33 | #include <mm/mmu_decl.h> | 32 | #include <mm/mmu_decl.h> |
34 | #include <asm/udbg.h> | 33 | #include <asm/udbg.h> |
diff --git a/arch/powerpc/platforms/86xx/gef_sbc310.c b/arch/powerpc/platforms/86xx/gef_sbc310.c index af14f852d747..90754e752bd8 100644 --- a/arch/powerpc/platforms/86xx/gef_sbc310.c +++ b/arch/powerpc/platforms/86xx/gef_sbc310.c | |||
@@ -28,7 +28,6 @@ | |||
28 | #include <asm/time.h> | 28 | #include <asm/time.h> |
29 | #include <asm/machdep.h> | 29 | #include <asm/machdep.h> |
30 | #include <asm/pci-bridge.h> | 30 | #include <asm/pci-bridge.h> |
31 | #include <asm/mpc86xx.h> | ||
32 | #include <asm/prom.h> | 31 | #include <asm/prom.h> |
33 | #include <mm/mmu_decl.h> | 32 | #include <mm/mmu_decl.h> |
34 | #include <asm/udbg.h> | 33 | #include <asm/udbg.h> |
diff --git a/arch/powerpc/platforms/86xx/gef_sbc610.c b/arch/powerpc/platforms/86xx/gef_sbc610.c index ea2360639652..72b31a6010a0 100644 --- a/arch/powerpc/platforms/86xx/gef_sbc610.c +++ b/arch/powerpc/platforms/86xx/gef_sbc610.c | |||
@@ -28,7 +28,6 @@ | |||
28 | #include <asm/time.h> | 28 | #include <asm/time.h> |
29 | #include <asm/machdep.h> | 29 | #include <asm/machdep.h> |
30 | #include <asm/pci-bridge.h> | 30 | #include <asm/pci-bridge.h> |
31 | #include <asm/mpc86xx.h> | ||
32 | #include <asm/prom.h> | 31 | #include <asm/prom.h> |
33 | #include <mm/mmu_decl.h> | 32 | #include <mm/mmu_decl.h> |
34 | #include <asm/udbg.h> | 33 | #include <asm/udbg.h> |
diff --git a/arch/powerpc/platforms/86xx/mpc8610_hpcd.c b/arch/powerpc/platforms/86xx/mpc8610_hpcd.c index 3f49a6f893a3..51eec0cd5519 100644 --- a/arch/powerpc/platforms/86xx/mpc8610_hpcd.c +++ b/arch/powerpc/platforms/86xx/mpc8610_hpcd.c | |||
@@ -28,7 +28,6 @@ | |||
28 | #include <asm/time.h> | 28 | #include <asm/time.h> |
29 | #include <asm/machdep.h> | 29 | #include <asm/machdep.h> |
30 | #include <asm/pci-bridge.h> | 30 | #include <asm/pci-bridge.h> |
31 | #include <asm/mpc86xx.h> | ||
32 | #include <asm/prom.h> | 31 | #include <asm/prom.h> |
33 | #include <mm/mmu_decl.h> | 32 | #include <mm/mmu_decl.h> |
34 | #include <asm/udbg.h> | 33 | #include <asm/udbg.h> |
diff --git a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c index c4ec49b5f7f8..7e9e83c04a8a 100644 --- a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c +++ b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c | |||
@@ -24,7 +24,6 @@ | |||
24 | #include <asm/time.h> | 24 | #include <asm/time.h> |
25 | #include <asm/machdep.h> | 25 | #include <asm/machdep.h> |
26 | #include <asm/pci-bridge.h> | 26 | #include <asm/pci-bridge.h> |
27 | #include <asm/mpc86xx.h> | ||
28 | #include <asm/prom.h> | 27 | #include <asm/prom.h> |
29 | #include <mm/mmu_decl.h> | 28 | #include <mm/mmu_decl.h> |
30 | #include <asm/udbg.h> | 29 | #include <asm/udbg.h> |
diff --git a/arch/powerpc/platforms/86xx/mpc86xx_smp.c b/arch/powerpc/platforms/86xx/mpc86xx_smp.c index 014e26cda08d..d84bbb508ee7 100644 --- a/arch/powerpc/platforms/86xx/mpc86xx_smp.c +++ b/arch/powerpc/platforms/86xx/mpc86xx_smp.c | |||
@@ -20,7 +20,6 @@ | |||
20 | #include <asm/pgtable.h> | 20 | #include <asm/pgtable.h> |
21 | #include <asm/pci-bridge.h> | 21 | #include <asm/pci-bridge.h> |
22 | #include <asm/mpic.h> | 22 | #include <asm/mpic.h> |
23 | #include <asm/mpc86xx.h> | ||
24 | #include <asm/cacheflush.h> | 23 | #include <asm/cacheflush.h> |
25 | 24 | ||
26 | #include <sysdev/fsl_soc.h> | 25 | #include <sysdev/fsl_soc.h> |
@@ -30,6 +29,11 @@ | |||
30 | extern void __secondary_start_mpc86xx(void); | 29 | extern void __secondary_start_mpc86xx(void); |
31 | extern unsigned long __secondary_hold_acknowledge; | 30 | extern unsigned long __secondary_hold_acknowledge; |
32 | 31 | ||
32 | #define MCM_PORT_CONFIG_OFFSET 0x10 | ||
33 | |||
34 | /* Offset from CCSRBAR */ | ||
35 | #define MPC86xx_MCM_OFFSET (0x1000) | ||
36 | #define MPC86xx_MCM_SIZE (0x1000) | ||
33 | 37 | ||
34 | static void __init | 38 | static void __init |
35 | smp_86xx_release_core(int nr) | 39 | smp_86xx_release_core(int nr) |
@@ -48,6 +52,8 @@ smp_86xx_release_core(int nr) | |||
48 | pcr = in_be32(mcm_vaddr + (MCM_PORT_CONFIG_OFFSET >> 2)); | 52 | pcr = in_be32(mcm_vaddr + (MCM_PORT_CONFIG_OFFSET >> 2)); |
49 | pcr |= 1 << (nr + 24); | 53 | pcr |= 1 << (nr + 24); |
50 | out_be32(mcm_vaddr + (MCM_PORT_CONFIG_OFFSET >> 2), pcr); | 54 | out_be32(mcm_vaddr + (MCM_PORT_CONFIG_OFFSET >> 2), pcr); |
55 | |||
56 | iounmap(mcm_vaddr); | ||
51 | } | 57 | } |
52 | 58 | ||
53 | 59 | ||
diff --git a/arch/powerpc/platforms/86xx/sbc8641d.c b/arch/powerpc/platforms/86xx/sbc8641d.c index 2886a36fc085..51c8f331b671 100644 --- a/arch/powerpc/platforms/86xx/sbc8641d.c +++ b/arch/powerpc/platforms/86xx/sbc8641d.c | |||
@@ -25,7 +25,6 @@ | |||
25 | #include <asm/time.h> | 25 | #include <asm/time.h> |
26 | #include <asm/machdep.h> | 26 | #include <asm/machdep.h> |
27 | #include <asm/pci-bridge.h> | 27 | #include <asm/pci-bridge.h> |
28 | #include <asm/mpc86xx.h> | ||
29 | #include <asm/prom.h> | 28 | #include <asm/prom.h> |
30 | #include <mm/mmu_decl.h> | 29 | #include <mm/mmu_decl.h> |
31 | #include <asm/udbg.h> | 30 | #include <asm/udbg.h> |
diff --git a/arch/powerpc/platforms/8xx/mpc885ads.h b/arch/powerpc/platforms/8xx/mpc885ads.h index a5076668bad6..19412f76fa3b 100644 --- a/arch/powerpc/platforms/8xx/mpc885ads.h +++ b/arch/powerpc/platforms/8xx/mpc885ads.h | |||
@@ -17,10 +17,6 @@ | |||
17 | 17 | ||
18 | #include <sysdev/fsl_soc.h> | 18 | #include <sysdev/fsl_soc.h> |
19 | 19 | ||
20 | #define MPC8xx_CPM_OFFSET (0x9c0) | ||
21 | #define CPM_MAP_ADDR (get_immrbase() + MPC8xx_CPM_OFFSET) | ||
22 | #define CPM_IRQ_OFFSET 16 // for compability with cpm_uart driver | ||
23 | |||
24 | /* Bits of interest in the BCSRs. | 20 | /* Bits of interest in the BCSRs. |
25 | */ | 21 | */ |
26 | #define BCSR1_ETHEN ((uint)0x20000000) | 22 | #define BCSR1_ETHEN ((uint)0x20000000) |
diff --git a/arch/powerpc/platforms/Kconfig b/arch/powerpc/platforms/Kconfig index e3e87078d03f..04a8061045c4 100644 --- a/arch/powerpc/platforms/Kconfig +++ b/arch/powerpc/platforms/Kconfig | |||
@@ -329,4 +329,8 @@ config MCU_MPC8349EMITX | |||
329 | also register MCU GPIOs with the generic GPIO API, so you'll able | 329 | also register MCU GPIOs with the generic GPIO API, so you'll able |
330 | to use MCU pins as GPIOs. | 330 | to use MCU pins as GPIOs. |
331 | 331 | ||
332 | config XILINX_PCI | ||
333 | bool "Xilinx PCI host bridge support" | ||
334 | depends on PCI && XILINX_VIRTEX | ||
335 | |||
332 | endmenu | 336 | endmenu |
diff --git a/arch/powerpc/platforms/Kconfig.cputype b/arch/powerpc/platforms/Kconfig.cputype index 732ee93a8e98..cca6b4fc719a 100644 --- a/arch/powerpc/platforms/Kconfig.cputype +++ b/arch/powerpc/platforms/Kconfig.cputype | |||
@@ -10,7 +10,6 @@ menu "Processor support" | |||
10 | choice | 10 | choice |
11 | prompt "Processor Type" | 11 | prompt "Processor Type" |
12 | depends on PPC32 | 12 | depends on PPC32 |
13 | default 6xx | ||
14 | help | 13 | help |
15 | There are five families of 32 bit PowerPC chips supported. | 14 | There are five families of 32 bit PowerPC chips supported. |
16 | The most common ones are the desktop and server CPUs (601, 603, | 15 | The most common ones are the desktop and server CPUs (601, 603, |
@@ -22,7 +21,7 @@ choice | |||
22 | 21 | ||
23 | If unsure, select 52xx/6xx/7xx/74xx/82xx/83xx/86xx. | 22 | If unsure, select 52xx/6xx/7xx/74xx/82xx/83xx/86xx. |
24 | 23 | ||
25 | config 6xx | 24 | config PPC_BOOK3S |
26 | bool "512x/52xx/6xx/7xx/74xx/82xx/83xx/86xx" | 25 | bool "512x/52xx/6xx/7xx/74xx/82xx/83xx/86xx" |
27 | select PPC_FPU | 26 | select PPC_FPU |
28 | 27 | ||
@@ -58,13 +57,11 @@ config E200 | |||
58 | 57 | ||
59 | endchoice | 58 | endchoice |
60 | 59 | ||
61 | # Until we have a choice of exclusive CPU types on 64-bit, we always | ||
62 | # use PPC_BOOK3S. On 32-bit, this is equivalent to 6xx which is | ||
63 | # "classic" MMU | ||
64 | |||
65 | config PPC_BOOK3S | 60 | config PPC_BOOK3S |
66 | def_bool y | 61 | default y |
67 | depends on PPC64 || 6xx | 62 | depends on PPC64 |
63 | select PPC_FPU | ||
64 | |||
68 | 65 | ||
69 | config POWER4_ONLY | 66 | config POWER4_ONLY |
70 | bool "Optimize for POWER4" | 67 | bool "Optimize for POWER4" |
@@ -75,6 +72,10 @@ config POWER4_ONLY | |||
75 | The resulting binary will not work on POWER3 or RS64 processors | 72 | The resulting binary will not work on POWER3 or RS64 processors |
76 | when compiled with binutils 2.15 or later. | 73 | when compiled with binutils 2.15 or later. |
77 | 74 | ||
75 | config 6xx | ||
76 | def_bool y | ||
77 | depends on PPC32 && PPC_BOOK3S | ||
78 | |||
78 | config POWER3 | 79 | config POWER3 |
79 | bool | 80 | bool |
80 | depends on PPC64 && PPC_BOOK3S | 81 | depends on PPC64 && PPC_BOOK3S |
@@ -203,9 +204,8 @@ config SPE | |||
203 | If in doubt, say Y here. | 204 | If in doubt, say Y here. |
204 | 205 | ||
205 | config PPC_STD_MMU | 206 | config PPC_STD_MMU |
206 | bool | 207 | def_bool y |
207 | depends on 6xx || PPC64 | 208 | depends on PPC_BOOK3S |
208 | default y | ||
209 | 209 | ||
210 | config PPC_STD_MMU_32 | 210 | config PPC_STD_MMU_32 |
211 | def_bool y | 211 | def_bool y |
@@ -263,8 +263,8 @@ config SMP | |||
263 | If you don't know what to do here, say N. | 263 | If you don't know what to do here, say N. |
264 | 264 | ||
265 | config NR_CPUS | 265 | config NR_CPUS |
266 | int "Maximum number of CPUs (2-1024)" | 266 | int "Maximum number of CPUs (2-8192)" |
267 | range 2 1024 | 267 | range 2 8192 |
268 | depends on SMP | 268 | depends on SMP |
269 | default "32" if PPC64 | 269 | default "32" if PPC64 |
270 | default "4" | 270 | default "4" |
diff --git a/arch/powerpc/platforms/cell/celleb_pci.c b/arch/powerpc/platforms/cell/celleb_pci.c index f39a3b2a1667..00eaaa71630f 100644 --- a/arch/powerpc/platforms/cell/celleb_pci.c +++ b/arch/powerpc/platforms/cell/celleb_pci.c | |||
@@ -162,8 +162,7 @@ static int celleb_fake_pci_read_config(struct pci_bus *bus, | |||
162 | unsigned int devfn, int where, int size, u32 *val) | 162 | unsigned int devfn, int where, int size, u32 *val) |
163 | { | 163 | { |
164 | char *config; | 164 | char *config; |
165 | struct device_node *node; | 165 | struct pci_controller *hose = pci_bus_to_host(bus); |
166 | struct pci_controller *hose; | ||
167 | unsigned int devno = devfn >> 3; | 166 | unsigned int devno = devfn >> 3; |
168 | unsigned int fn = devfn & 0x7; | 167 | unsigned int fn = devfn & 0x7; |
169 | 168 | ||
@@ -171,8 +170,6 @@ static int celleb_fake_pci_read_config(struct pci_bus *bus, | |||
171 | BUG_ON(where % size); | 170 | BUG_ON(where % size); |
172 | 171 | ||
173 | pr_debug(" fake read: bus=0x%x, ", bus->number); | 172 | pr_debug(" fake read: bus=0x%x, ", bus->number); |
174 | node = (struct device_node *)bus->sysdata; | ||
175 | hose = pci_find_hose_for_OF_device(node); | ||
176 | config = get_fake_config_start(hose, devno, fn); | 173 | config = get_fake_config_start(hose, devno, fn); |
177 | 174 | ||
178 | pr_debug("devno=0x%x, where=0x%x, size=0x%x, ", devno, where, size); | 175 | pr_debug("devno=0x%x, where=0x%x, size=0x%x, ", devno, where, size); |
@@ -192,8 +189,7 @@ static int celleb_fake_pci_write_config(struct pci_bus *bus, | |||
192 | unsigned int devfn, int where, int size, u32 val) | 189 | unsigned int devfn, int where, int size, u32 val) |
193 | { | 190 | { |
194 | char *config; | 191 | char *config; |
195 | struct device_node *node; | 192 | struct pci_controller *hose = pci_bus_to_host(bus); |
196 | struct pci_controller *hose; | ||
197 | struct celleb_pci_resource *res; | 193 | struct celleb_pci_resource *res; |
198 | unsigned int devno = devfn >> 3; | 194 | unsigned int devno = devfn >> 3; |
199 | unsigned int fn = devfn & 0x7; | 195 | unsigned int fn = devfn & 0x7; |
@@ -201,8 +197,6 @@ static int celleb_fake_pci_write_config(struct pci_bus *bus, | |||
201 | /* allignment check */ | 197 | /* allignment check */ |
202 | BUG_ON(where % size); | 198 | BUG_ON(where % size); |
203 | 199 | ||
204 | node = (struct device_node *)bus->sysdata; | ||
205 | hose = pci_find_hose_for_OF_device(node); | ||
206 | config = get_fake_config_start(hose, devno, fn); | 200 | config = get_fake_config_start(hose, devno, fn); |
207 | 201 | ||
208 | if (!config) | 202 | if (!config) |
diff --git a/arch/powerpc/platforms/cell/celleb_scc_epci.c b/arch/powerpc/platforms/cell/celleb_scc_epci.c index 48ec88a38a12..05b0db3ef638 100644 --- a/arch/powerpc/platforms/cell/celleb_scc_epci.c +++ b/arch/powerpc/platforms/cell/celleb_scc_epci.c | |||
@@ -134,15 +134,11 @@ static int celleb_epci_read_config(struct pci_bus *bus, | |||
134 | { | 134 | { |
135 | PCI_IO_ADDR epci_base; | 135 | PCI_IO_ADDR epci_base; |
136 | PCI_IO_ADDR addr; | 136 | PCI_IO_ADDR addr; |
137 | struct device_node *node; | 137 | struct pci_controller *hose = pci_bus_to_host(bus); |
138 | struct pci_controller *hose; | ||
139 | 138 | ||
140 | /* allignment check */ | 139 | /* allignment check */ |
141 | BUG_ON(where % size); | 140 | BUG_ON(where % size); |
142 | 141 | ||
143 | node = (struct device_node *)bus->sysdata; | ||
144 | hose = pci_find_hose_for_OF_device(node); | ||
145 | |||
146 | if (!celleb_epci_get_epci_cfg(hose)) | 142 | if (!celleb_epci_get_epci_cfg(hose)) |
147 | return PCIBIOS_DEVICE_NOT_FOUND; | 143 | return PCIBIOS_DEVICE_NOT_FOUND; |
148 | 144 | ||
@@ -198,16 +194,11 @@ static int celleb_epci_write_config(struct pci_bus *bus, | |||
198 | { | 194 | { |
199 | PCI_IO_ADDR epci_base; | 195 | PCI_IO_ADDR epci_base; |
200 | PCI_IO_ADDR addr; | 196 | PCI_IO_ADDR addr; |
201 | struct device_node *node; | 197 | struct pci_controller *hose = pci_bus_to_host(bus); |
202 | struct pci_controller *hose; | ||
203 | 198 | ||
204 | /* allignment check */ | 199 | /* allignment check */ |
205 | BUG_ON(where % size); | 200 | BUG_ON(where % size); |
206 | 201 | ||
207 | node = (struct device_node *)bus->sysdata; | ||
208 | hose = pci_find_hose_for_OF_device(node); | ||
209 | |||
210 | |||
211 | if (!celleb_epci_get_epci_cfg(hose)) | 202 | if (!celleb_epci_get_epci_cfg(hose)) |
212 | return PCIBIOS_DEVICE_NOT_FOUND; | 203 | return PCIBIOS_DEVICE_NOT_FOUND; |
213 | 204 | ||
diff --git a/arch/powerpc/platforms/cell/celleb_scc_pciex.c b/arch/powerpc/platforms/cell/celleb_scc_pciex.c index 3e7e0f1568ef..7fca09f990ba 100644 --- a/arch/powerpc/platforms/cell/celleb_scc_pciex.c +++ b/arch/powerpc/platforms/cell/celleb_scc_pciex.c | |||
@@ -366,11 +366,7 @@ static void config_write_pciex_rc(unsigned int __iomem *base, uint32_t where, | |||
366 | static int scc_pciex_read_config(struct pci_bus *bus, unsigned int devfn, | 366 | static int scc_pciex_read_config(struct pci_bus *bus, unsigned int devfn, |
367 | int where, int size, unsigned int *val) | 367 | int where, int size, unsigned int *val) |
368 | { | 368 | { |
369 | struct device_node *dn; | 369 | struct pci_controller *phb = pci_bus_to_host(bus); |
370 | struct pci_controller *phb; | ||
371 | |||
372 | dn = bus->sysdata; | ||
373 | phb = pci_find_hose_for_OF_device(dn); | ||
374 | 370 | ||
375 | if (bus->number == phb->first_busno && PCI_SLOT(devfn) != 1) { | 371 | if (bus->number == phb->first_busno && PCI_SLOT(devfn) != 1) { |
376 | *val = ~0; | 372 | *val = ~0; |
@@ -389,11 +385,7 @@ static int scc_pciex_read_config(struct pci_bus *bus, unsigned int devfn, | |||
389 | static int scc_pciex_write_config(struct pci_bus *bus, unsigned int devfn, | 385 | static int scc_pciex_write_config(struct pci_bus *bus, unsigned int devfn, |
390 | int where, int size, unsigned int val) | 386 | int where, int size, unsigned int val) |
391 | { | 387 | { |
392 | struct device_node *dn; | 388 | struct pci_controller *phb = pci_bus_to_host(bus); |
393 | struct pci_controller *phb; | ||
394 | |||
395 | dn = bus->sysdata; | ||
396 | phb = pci_find_hose_for_OF_device(dn); | ||
397 | 389 | ||
398 | if (bus->number == phb->first_busno && PCI_SLOT(devfn) != 1) | 390 | if (bus->number == phb->first_busno && PCI_SLOT(devfn) != 1) |
399 | return PCIBIOS_DEVICE_NOT_FOUND; | 391 | return PCIBIOS_DEVICE_NOT_FOUND; |
diff --git a/arch/powerpc/platforms/cell/spufs/inode.c b/arch/powerpc/platforms/cell/spufs/inode.c index 706eb5c7e2ee..24b30b6909c4 100644 --- a/arch/powerpc/platforms/cell/spufs/inode.c +++ b/arch/powerpc/platforms/cell/spufs/inode.c | |||
@@ -631,10 +631,6 @@ long spufs_create(struct nameidata *nd, unsigned int flags, mode_t mode, | |||
631 | if (IS_ERR(dentry)) | 631 | if (IS_ERR(dentry)) |
632 | goto out_dir; | 632 | goto out_dir; |
633 | 633 | ||
634 | ret = -EEXIST; | ||
635 | if (dentry->d_inode) | ||
636 | goto out_dput; | ||
637 | |||
638 | mode &= ~current_umask(); | 634 | mode &= ~current_umask(); |
639 | 635 | ||
640 | if (flags & SPU_CREATE_GANG) | 636 | if (flags & SPU_CREATE_GANG) |
@@ -648,8 +644,6 @@ long spufs_create(struct nameidata *nd, unsigned int flags, mode_t mode, | |||
648 | fsnotify_mkdir(nd->path.dentry->d_inode, dentry); | 644 | fsnotify_mkdir(nd->path.dentry->d_inode, dentry); |
649 | return ret; | 645 | return ret; |
650 | 646 | ||
651 | out_dput: | ||
652 | dput(dentry); | ||
653 | out_dir: | 647 | out_dir: |
654 | mutex_unlock(&nd->path.dentry->d_inode->i_mutex); | 648 | mutex_unlock(&nd->path.dentry->d_inode->i_mutex); |
655 | out: | 649 | out: |
diff --git a/arch/powerpc/platforms/chrp/pci.c b/arch/powerpc/platforms/chrp/pci.c index f6b0c519d5a2..8f67a394b2d0 100644 --- a/arch/powerpc/platforms/chrp/pci.c +++ b/arch/powerpc/platforms/chrp/pci.c | |||
@@ -34,7 +34,7 @@ int gg2_read_config(struct pci_bus *bus, unsigned int devfn, int off, | |||
34 | int len, u32 *val) | 34 | int len, u32 *val) |
35 | { | 35 | { |
36 | volatile void __iomem *cfg_data; | 36 | volatile void __iomem *cfg_data; |
37 | struct pci_controller *hose = bus->sysdata; | 37 | struct pci_controller *hose = pci_bus_to_host(bus); |
38 | 38 | ||
39 | if (bus->number > 7) | 39 | if (bus->number > 7) |
40 | return PCIBIOS_DEVICE_NOT_FOUND; | 40 | return PCIBIOS_DEVICE_NOT_FOUND; |
@@ -61,7 +61,7 @@ int gg2_write_config(struct pci_bus *bus, unsigned int devfn, int off, | |||
61 | int len, u32 val) | 61 | int len, u32 val) |
62 | { | 62 | { |
63 | volatile void __iomem *cfg_data; | 63 | volatile void __iomem *cfg_data; |
64 | struct pci_controller *hose = bus->sysdata; | 64 | struct pci_controller *hose = pci_bus_to_host(bus); |
65 | 65 | ||
66 | if (bus->number > 7) | 66 | if (bus->number > 7) |
67 | return PCIBIOS_DEVICE_NOT_FOUND; | 67 | return PCIBIOS_DEVICE_NOT_FOUND; |
@@ -96,7 +96,7 @@ static struct pci_ops gg2_pci_ops = | |||
96 | int rtas_read_config(struct pci_bus *bus, unsigned int devfn, int offset, | 96 | int rtas_read_config(struct pci_bus *bus, unsigned int devfn, int offset, |
97 | int len, u32 *val) | 97 | int len, u32 *val) |
98 | { | 98 | { |
99 | struct pci_controller *hose = bus->sysdata; | 99 | struct pci_controller *hose = pci_bus_to_host(bus); |
100 | unsigned long addr = (offset & 0xff) | ((devfn & 0xff) << 8) | 100 | unsigned long addr = (offset & 0xff) | ((devfn & 0xff) << 8) |
101 | | (((bus->number - hose->first_busno) & 0xff) << 16) | 101 | | (((bus->number - hose->first_busno) & 0xff) << 16) |
102 | | (hose->global_number << 24); | 102 | | (hose->global_number << 24); |
@@ -111,7 +111,7 @@ int rtas_read_config(struct pci_bus *bus, unsigned int devfn, int offset, | |||
111 | int rtas_write_config(struct pci_bus *bus, unsigned int devfn, int offset, | 111 | int rtas_write_config(struct pci_bus *bus, unsigned int devfn, int offset, |
112 | int len, u32 val) | 112 | int len, u32 val) |
113 | { | 113 | { |
114 | struct pci_controller *hose = bus->sysdata; | 114 | struct pci_controller *hose = pci_bus_to_host(bus); |
115 | unsigned long addr = (offset & 0xff) | ((devfn & 0xff) << 8) | 115 | unsigned long addr = (offset & 0xff) | ((devfn & 0xff) << 8) |
116 | | (((bus->number - hose->first_busno) & 0xff) << 16) | 116 | | (((bus->number - hose->first_busno) & 0xff) << 16) |
117 | | (hose->global_number << 24); | 117 | | (hose->global_number << 24); |
diff --git a/arch/powerpc/platforms/fsl_uli1575.c b/arch/powerpc/platforms/fsl_uli1575.c index 65a35f38e062..fd23a1d4b39d 100644 --- a/arch/powerpc/platforms/fsl_uli1575.c +++ b/arch/powerpc/platforms/fsl_uli1575.c | |||
@@ -51,13 +51,20 @@ u8 uli_pirq_to_irq[8] = { | |||
51 | ULI_8259_NONE, /* PIRQH */ | 51 | ULI_8259_NONE, /* PIRQH */ |
52 | }; | 52 | }; |
53 | 53 | ||
54 | static inline bool is_quirk_valid(void) | ||
55 | { | ||
56 | return (machine_is(mpc86xx_hpcn) || | ||
57 | machine_is(mpc8544_ds) || | ||
58 | machine_is(p2020_ds) || | ||
59 | machine_is(mpc8572_ds)); | ||
60 | } | ||
61 | |||
54 | /* Bridge */ | 62 | /* Bridge */ |
55 | static void __devinit early_uli5249(struct pci_dev *dev) | 63 | static void __devinit early_uli5249(struct pci_dev *dev) |
56 | { | 64 | { |
57 | unsigned char temp; | 65 | unsigned char temp; |
58 | 66 | ||
59 | if (!machine_is(mpc86xx_hpcn) && !machine_is(mpc8544_ds) && | 67 | if (!is_quirk_valid()) |
60 | !machine_is(mpc8572_ds)) | ||
61 | return; | 68 | return; |
62 | 69 | ||
63 | pci_write_config_word(dev, PCI_COMMAND, PCI_COMMAND_IO | | 70 | pci_write_config_word(dev, PCI_COMMAND, PCI_COMMAND_IO | |
@@ -80,8 +87,7 @@ static void __devinit quirk_uli1575(struct pci_dev *dev) | |||
80 | { | 87 | { |
81 | int i; | 88 | int i; |
82 | 89 | ||
83 | if (!machine_is(mpc86xx_hpcn) && !machine_is(mpc8544_ds) && | 90 | if (!is_quirk_valid()) |
84 | !machine_is(mpc8572_ds)) | ||
85 | return; | 91 | return; |
86 | 92 | ||
87 | /* | 93 | /* |
@@ -149,8 +155,7 @@ static void __devinit quirk_final_uli1575(struct pci_dev *dev) | |||
149 | * IRQ 14: Edge | 155 | * IRQ 14: Edge |
150 | * IRQ 15: Edge | 156 | * IRQ 15: Edge |
151 | */ | 157 | */ |
152 | if (!machine_is(mpc86xx_hpcn) && !machine_is(mpc8544_ds) && | 158 | if (!is_quirk_valid()) |
153 | !machine_is(mpc8572_ds)) | ||
154 | return; | 159 | return; |
155 | 160 | ||
156 | outb(0xfa, 0x4d0); | 161 | outb(0xfa, 0x4d0); |
@@ -176,8 +181,7 @@ static void __devinit quirk_uli5288(struct pci_dev *dev) | |||
176 | unsigned char c; | 181 | unsigned char c; |
177 | unsigned int d; | 182 | unsigned int d; |
178 | 183 | ||
179 | if (!machine_is(mpc86xx_hpcn) && !machine_is(mpc8544_ds) && | 184 | if (!is_quirk_valid()) |
180 | !machine_is(mpc8572_ds)) | ||
181 | return; | 185 | return; |
182 | 186 | ||
183 | /* read/write lock */ | 187 | /* read/write lock */ |
@@ -201,8 +205,7 @@ static void __devinit quirk_uli5229(struct pci_dev *dev) | |||
201 | { | 205 | { |
202 | unsigned short temp; | 206 | unsigned short temp; |
203 | 207 | ||
204 | if (!machine_is(mpc86xx_hpcn) && !machine_is(mpc8544_ds) && | 208 | if (!is_quirk_valid()) |
205 | !machine_is(mpc8572_ds)) | ||
206 | return; | 209 | return; |
207 | 210 | ||
208 | pci_write_config_word(dev, PCI_COMMAND, PCI_COMMAND_INTX_DISABLE | | 211 | pci_write_config_word(dev, PCI_COMMAND, PCI_COMMAND_INTX_DISABLE | |
@@ -270,7 +273,6 @@ static void __devinit hpcd_quirk_uli1575(struct pci_dev *dev) | |||
270 | static void __devinit hpcd_quirk_uli5288(struct pci_dev *dev) | 273 | static void __devinit hpcd_quirk_uli5288(struct pci_dev *dev) |
271 | { | 274 | { |
272 | unsigned char c; | 275 | unsigned char c; |
273 | unsigned short temp; | ||
274 | 276 | ||
275 | if (!machine_is(mpc86xx_hpcd)) | 277 | if (!machine_is(mpc86xx_hpcd)) |
276 | return; | 278 | return; |
diff --git a/arch/powerpc/platforms/iseries/iommu.c b/arch/powerpc/platforms/iseries/iommu.c index 40219823d9b0..6c1e1011959e 100644 --- a/arch/powerpc/platforms/iseries/iommu.c +++ b/arch/powerpc/platforms/iseries/iommu.c | |||
@@ -177,7 +177,7 @@ static struct iommu_table *iommu_table_find(struct iommu_table * tbl) | |||
177 | static void pci_dma_dev_setup_iseries(struct pci_dev *pdev) | 177 | static void pci_dma_dev_setup_iseries(struct pci_dev *pdev) |
178 | { | 178 | { |
179 | struct iommu_table *tbl; | 179 | struct iommu_table *tbl; |
180 | struct device_node *dn = pdev->sysdata; | 180 | struct device_node *dn = pci_device_to_OF_node(pdev); |
181 | struct pci_dn *pdn = PCI_DN(dn); | 181 | struct pci_dn *pdn = PCI_DN(dn); |
182 | const u32 *lsn = of_get_property(dn, "linux,logical-slot-number", NULL); | 182 | const u32 *lsn = of_get_property(dn, "linux,logical-slot-number", NULL); |
183 | 183 | ||
diff --git a/arch/powerpc/platforms/iseries/pci.c b/arch/powerpc/platforms/iseries/pci.c index 21cddc30220b..175aac8ca7e5 100644 --- a/arch/powerpc/platforms/iseries/pci.c +++ b/arch/powerpc/platforms/iseries/pci.c | |||
@@ -318,6 +318,7 @@ static void __init iomm_table_allocate_entry(struct pci_dev *dev, int bar_num) | |||
318 | { | 318 | { |
319 | struct resource *bar_res = &dev->resource[bar_num]; | 319 | struct resource *bar_res = &dev->resource[bar_num]; |
320 | long bar_size = pci_resource_len(dev, bar_num); | 320 | long bar_size = pci_resource_len(dev, bar_num); |
321 | struct device_node *dn = pci_device_to_OF_node(dev); | ||
321 | 322 | ||
322 | /* | 323 | /* |
323 | * No space to allocate, quick exit, skip Allocation. | 324 | * No space to allocate, quick exit, skip Allocation. |
@@ -335,9 +336,9 @@ static void __init iomm_table_allocate_entry(struct pci_dev *dev, int bar_num) | |||
335 | * Allocate the number of table entries needed for BAR. | 336 | * Allocate the number of table entries needed for BAR. |
336 | */ | 337 | */ |
337 | while (bar_size > 0 ) { | 338 | while (bar_size > 0 ) { |
338 | iomm_table[current_iomm_table_entry] = dev->sysdata; | 339 | iomm_table[current_iomm_table_entry] = dn; |
339 | ds_addr_table[current_iomm_table_entry] = | 340 | ds_addr_table[current_iomm_table_entry] = |
340 | iseries_ds_addr(dev->sysdata) | (bar_num << 24); | 341 | iseries_ds_addr(dn) | (bar_num << 24); |
341 | bar_size -= IOMM_TABLE_ENTRY_SIZE; | 342 | bar_size -= IOMM_TABLE_ENTRY_SIZE; |
342 | ++current_iomm_table_entry; | 343 | ++current_iomm_table_entry; |
343 | } | 344 | } |
@@ -410,7 +411,7 @@ void __init iSeries_pcibios_fixup_resources(struct pci_dev *pdev) | |||
410 | struct device_node *node; | 411 | struct device_node *node; |
411 | int i; | 412 | int i; |
412 | 413 | ||
413 | node = find_device_node(bus, pdev->devfn); | 414 | node = pci_device_to_OF_node(pdev); |
414 | pr_debug("PCI: iSeries %s, pdev %p, node %p\n", | 415 | pr_debug("PCI: iSeries %s, pdev %p, node %p\n", |
415 | pci_name(pdev), pdev, node); | 416 | pci_name(pdev), pdev, node); |
416 | if (!node) { | 417 | if (!node) { |
@@ -441,7 +442,6 @@ void __init iSeries_pcibios_fixup_resources(struct pci_dev *pdev) | |||
441 | } | 442 | } |
442 | } | 443 | } |
443 | 444 | ||
444 | pdev->sysdata = node; | ||
445 | allocate_device_bars(pdev); | 445 | allocate_device_bars(pdev); |
446 | iseries_device_information(pdev, bus, *sub_bus); | 446 | iseries_device_information(pdev, bus, *sub_bus); |
447 | } | 447 | } |
diff --git a/arch/powerpc/platforms/powermac/pic.c b/arch/powerpc/platforms/powermac/pic.c index 7039d8f1d3ba..dce736349107 100644 --- a/arch/powerpc/platforms/powermac/pic.c +++ b/arch/powerpc/platforms/powermac/pic.c | |||
@@ -221,7 +221,7 @@ static irqreturn_t gatwick_action(int cpl, void *dev_id) | |||
221 | continue; | 221 | continue; |
222 | irq += __ilog2(bits); | 222 | irq += __ilog2(bits); |
223 | spin_unlock_irqrestore(&pmac_pic_lock, flags); | 223 | spin_unlock_irqrestore(&pmac_pic_lock, flags); |
224 | __do_IRQ(irq); | 224 | generic_handle_irq(irq); |
225 | spin_lock_irqsave(&pmac_pic_lock, flags); | 225 | spin_lock_irqsave(&pmac_pic_lock, flags); |
226 | rc = IRQ_HANDLED; | 226 | rc = IRQ_HANDLED; |
227 | } | 227 | } |
diff --git a/arch/powerpc/platforms/powermac/setup.c b/arch/powerpc/platforms/powermac/setup.c index 45936c9ed0ec..86f69a4eb49b 100644 --- a/arch/powerpc/platforms/powermac/setup.c +++ b/arch/powerpc/platforms/powermac/setup.c | |||
@@ -655,7 +655,7 @@ static int __init pmac_probe(void) | |||
655 | /* Move that to pci.c */ | 655 | /* Move that to pci.c */ |
656 | static int pmac_pci_probe_mode(struct pci_bus *bus) | 656 | static int pmac_pci_probe_mode(struct pci_bus *bus) |
657 | { | 657 | { |
658 | struct device_node *node = bus->sysdata; | 658 | struct device_node *node = pci_bus_to_OF_node(bus); |
659 | 659 | ||
660 | /* We need to use normal PCI probing for the AGP bus, | 660 | /* We need to use normal PCI probing for the AGP bus, |
661 | * since the device for the AGP bridge isn't in the tree. | 661 | * since the device for the AGP bridge isn't in the tree. |
diff --git a/arch/powerpc/platforms/ps3/smp.c b/arch/powerpc/platforms/ps3/smp.c index a0927a3bacb7..f6e04bcc70ef 100644 --- a/arch/powerpc/platforms/ps3/smp.c +++ b/arch/powerpc/platforms/ps3/smp.c | |||
@@ -32,12 +32,6 @@ | |||
32 | #define DBG pr_debug | 32 | #define DBG pr_debug |
33 | #endif | 33 | #endif |
34 | 34 | ||
35 | static irqreturn_t ipi_function_handler(int irq, void *msg) | ||
36 | { | ||
37 | smp_message_recv((int)(long)msg); | ||
38 | return IRQ_HANDLED; | ||
39 | } | ||
40 | |||
41 | /** | 35 | /** |
42 | * ps3_ipi_virqs - a per cpu array of virqs for ipi use | 36 | * ps3_ipi_virqs - a per cpu array of virqs for ipi use |
43 | */ | 37 | */ |
@@ -45,13 +39,6 @@ static irqreturn_t ipi_function_handler(int irq, void *msg) | |||
45 | #define MSG_COUNT 4 | 39 | #define MSG_COUNT 4 |
46 | static DEFINE_PER_CPU(unsigned int, ps3_ipi_virqs[MSG_COUNT]); | 40 | static DEFINE_PER_CPU(unsigned int, ps3_ipi_virqs[MSG_COUNT]); |
47 | 41 | ||
48 | static const char *names[MSG_COUNT] = { | ||
49 | "ipi call", | ||
50 | "ipi reschedule", | ||
51 | "ipi migrate", | ||
52 | "ipi debug brk" | ||
53 | }; | ||
54 | |||
55 | static void do_message_pass(int target, int msg) | 42 | static void do_message_pass(int target, int msg) |
56 | { | 43 | { |
57 | int result; | 44 | int result; |
@@ -119,8 +106,7 @@ static void __init ps3_smp_setup_cpu(int cpu) | |||
119 | DBG("%s:%d: (%d, %d) => virq %u\n", | 106 | DBG("%s:%d: (%d, %d) => virq %u\n", |
120 | __func__, __LINE__, cpu, i, virqs[i]); | 107 | __func__, __LINE__, cpu, i, virqs[i]); |
121 | 108 | ||
122 | result = request_irq(virqs[i], ipi_function_handler, | 109 | result = smp_request_message_ipi(virqs[i], i); |
123 | IRQF_DISABLED, names[i], (void*)(long)i); | ||
124 | 110 | ||
125 | if (result) | 111 | if (result) |
126 | virqs[i] = NO_IRQ; | 112 | virqs[i] = NO_IRQ; |
diff --git a/arch/powerpc/platforms/pseries/iommu.c b/arch/powerpc/platforms/pseries/iommu.c index 3ee01b4f4257..661c8e02bcba 100644 --- a/arch/powerpc/platforms/pseries/iommu.c +++ b/arch/powerpc/platforms/pseries/iommu.c | |||
@@ -388,7 +388,7 @@ static void pci_dma_bus_setup_pSeries(struct pci_bus *bus) | |||
388 | 388 | ||
389 | while (pci->phb->dma_window_size * children > 0x80000000ul) | 389 | while (pci->phb->dma_window_size * children > 0x80000000ul) |
390 | pci->phb->dma_window_size >>= 1; | 390 | pci->phb->dma_window_size >>= 1; |
391 | pr_debug("No ISA/IDE, window size is 0x%lx\n", | 391 | pr_debug("No ISA/IDE, window size is 0x%llx\n", |
392 | pci->phb->dma_window_size); | 392 | pci->phb->dma_window_size); |
393 | pci->phb->dma_window_base_cur = 0; | 393 | pci->phb->dma_window_base_cur = 0; |
394 | 394 | ||
@@ -414,7 +414,7 @@ static void pci_dma_bus_setup_pSeries(struct pci_bus *bus) | |||
414 | while (pci->phb->dma_window_size * children > 0x70000000ul) | 414 | while (pci->phb->dma_window_size * children > 0x70000000ul) |
415 | pci->phb->dma_window_size >>= 1; | 415 | pci->phb->dma_window_size >>= 1; |
416 | 416 | ||
417 | pr_debug("ISA/IDE, window size is 0x%lx\n", pci->phb->dma_window_size); | 417 | pr_debug("ISA/IDE, window size is 0x%llx\n", pci->phb->dma_window_size); |
418 | } | 418 | } |
419 | 419 | ||
420 | 420 | ||
diff --git a/arch/powerpc/platforms/pseries/lpar.c b/arch/powerpc/platforms/pseries/lpar.c index 52a80e5840e8..e3139fa5e556 100644 --- a/arch/powerpc/platforms/pseries/lpar.c +++ b/arch/powerpc/platforms/pseries/lpar.c | |||
@@ -609,3 +609,55 @@ void __init hpte_init_lpar(void) | |||
609 | ppc_md.flush_hash_range = pSeries_lpar_flush_hash_range; | 609 | ppc_md.flush_hash_range = pSeries_lpar_flush_hash_range; |
610 | ppc_md.hpte_clear_all = pSeries_lpar_hptab_clear; | 610 | ppc_md.hpte_clear_all = pSeries_lpar_hptab_clear; |
611 | } | 611 | } |
612 | |||
613 | #ifdef CONFIG_PPC_SMLPAR | ||
614 | #define CMO_FREE_HINT_DEFAULT 1 | ||
615 | static int cmo_free_hint_flag = CMO_FREE_HINT_DEFAULT; | ||
616 | |||
617 | static int __init cmo_free_hint(char *str) | ||
618 | { | ||
619 | char *parm; | ||
620 | parm = strstrip(str); | ||
621 | |||
622 | if (strcasecmp(parm, "no") == 0 || strcasecmp(parm, "off") == 0) { | ||
623 | printk(KERN_INFO "cmo_free_hint: CMO free page hinting is not active.\n"); | ||
624 | cmo_free_hint_flag = 0; | ||
625 | return 1; | ||
626 | } | ||
627 | |||
628 | cmo_free_hint_flag = 1; | ||
629 | printk(KERN_INFO "cmo_free_hint: CMO free page hinting is active.\n"); | ||
630 | |||
631 | if (strcasecmp(parm, "yes") == 0 || strcasecmp(parm, "on") == 0) | ||
632 | return 1; | ||
633 | |||
634 | return 0; | ||
635 | } | ||
636 | |||
637 | __setup("cmo_free_hint=", cmo_free_hint); | ||
638 | |||
639 | static void pSeries_set_page_state(struct page *page, int order, | ||
640 | unsigned long state) | ||
641 | { | ||
642 | int i, j; | ||
643 | unsigned long cmo_page_sz, addr; | ||
644 | |||
645 | cmo_page_sz = cmo_get_page_size(); | ||
646 | addr = __pa((unsigned long)page_address(page)); | ||
647 | |||
648 | for (i = 0; i < (1 << order); i++, addr += PAGE_SIZE) { | ||
649 | for (j = 0; j < PAGE_SIZE; j += cmo_page_sz) | ||
650 | plpar_hcall_norets(H_PAGE_INIT, state, addr + j, 0); | ||
651 | } | ||
652 | } | ||
653 | |||
654 | void arch_free_page(struct page *page, int order) | ||
655 | { | ||
656 | if (!cmo_free_hint_flag || !firmware_has_feature(FW_FEATURE_CMO)) | ||
657 | return; | ||
658 | |||
659 | pSeries_set_page_state(page, order, H_PAGE_SET_UNUSED); | ||
660 | } | ||
661 | EXPORT_SYMBOL(arch_free_page); | ||
662 | |||
663 | #endif | ||
diff --git a/arch/powerpc/platforms/pseries/rtasd.c b/arch/powerpc/platforms/pseries/rtasd.c index afad9f5ac0ac..b3cbac855924 100644 --- a/arch/powerpc/platforms/pseries/rtasd.c +++ b/arch/powerpc/platforms/pseries/rtasd.c | |||
@@ -19,7 +19,7 @@ | |||
19 | #include <linux/vmalloc.h> | 19 | #include <linux/vmalloc.h> |
20 | #include <linux/spinlock.h> | 20 | #include <linux/spinlock.h> |
21 | #include <linux/cpu.h> | 21 | #include <linux/cpu.h> |
22 | #include <linux/delay.h> | 22 | #include <linux/workqueue.h> |
23 | 23 | ||
24 | #include <asm/uaccess.h> | 24 | #include <asm/uaccess.h> |
25 | #include <asm/io.h> | 25 | #include <asm/io.h> |
@@ -387,36 +387,51 @@ static void do_event_scan(void) | |||
387 | } while(error == 0); | 387 | } while(error == 0); |
388 | } | 388 | } |
389 | 389 | ||
390 | static void do_event_scan_all_cpus(long delay) | 390 | static void rtas_event_scan(struct work_struct *w); |
391 | DECLARE_DELAYED_WORK(event_scan_work, rtas_event_scan); | ||
392 | |||
393 | /* | ||
394 | * Delay should be at least one second since some machines have problems if | ||
395 | * we call event-scan too quickly. | ||
396 | */ | ||
397 | static unsigned long event_scan_delay = 1*HZ; | ||
398 | static int first_pass = 1; | ||
399 | |||
400 | static void rtas_event_scan(struct work_struct *w) | ||
391 | { | 401 | { |
392 | int cpu; | 402 | unsigned int cpu; |
403 | |||
404 | do_event_scan(); | ||
393 | 405 | ||
394 | get_online_cpus(); | 406 | get_online_cpus(); |
395 | cpu = first_cpu(cpu_online_map); | 407 | |
396 | for (;;) { | 408 | cpu = next_cpu(smp_processor_id(), cpu_online_map); |
397 | set_cpus_allowed(current, cpumask_of_cpu(cpu)); | 409 | if (cpu == NR_CPUS) { |
398 | do_event_scan(); | 410 | cpu = first_cpu(cpu_online_map); |
399 | set_cpus_allowed(current, CPU_MASK_ALL); | 411 | |
400 | 412 | if (first_pass) { | |
401 | /* Drop hotplug lock, and sleep for the specified delay */ | 413 | first_pass = 0; |
402 | put_online_cpus(); | 414 | event_scan_delay = 30*HZ/rtas_event_scan_rate; |
403 | msleep_interruptible(delay); | 415 | |
404 | get_online_cpus(); | 416 | if (surveillance_timeout != -1) { |
405 | 417 | pr_debug("rtasd: enabling surveillance\n"); | |
406 | cpu = next_cpu(cpu, cpu_online_map); | 418 | enable_surveillance(surveillance_timeout); |
407 | if (cpu == NR_CPUS) | 419 | pr_debug("rtasd: surveillance enabled\n"); |
408 | break; | 420 | } |
421 | } | ||
409 | } | 422 | } |
423 | |||
424 | schedule_delayed_work_on(cpu, &event_scan_work, | ||
425 | __round_jiffies_relative(event_scan_delay, cpu)); | ||
426 | |||
410 | put_online_cpus(); | 427 | put_online_cpus(); |
411 | } | 428 | } |
412 | 429 | ||
413 | static int rtasd(void *unused) | 430 | static void start_event_scan(void) |
414 | { | 431 | { |
415 | unsigned int err_type; | 432 | unsigned int err_type; |
416 | int rc; | 433 | int rc; |
417 | 434 | ||
418 | daemonize("rtasd"); | ||
419 | |||
420 | printk(KERN_DEBUG "RTAS daemon started\n"); | 435 | printk(KERN_DEBUG "RTAS daemon started\n"); |
421 | pr_debug("rtasd: will sleep for %d milliseconds\n", | 436 | pr_debug("rtasd: will sleep for %d milliseconds\n", |
422 | (30000 / rtas_event_scan_rate)); | 437 | (30000 / rtas_event_scan_rate)); |
@@ -434,22 +449,8 @@ static int rtasd(void *unused) | |||
434 | } | 449 | } |
435 | } | 450 | } |
436 | 451 | ||
437 | /* First pass. */ | 452 | schedule_delayed_work_on(first_cpu(cpu_online_map), &event_scan_work, |
438 | do_event_scan_all_cpus(1000); | 453 | event_scan_delay); |
439 | |||
440 | if (surveillance_timeout != -1) { | ||
441 | pr_debug("rtasd: enabling surveillance\n"); | ||
442 | enable_surveillance(surveillance_timeout); | ||
443 | pr_debug("rtasd: surveillance enabled\n"); | ||
444 | } | ||
445 | |||
446 | /* Delay should be at least one second since some | ||
447 | * machines have problems if we call event-scan too | ||
448 | * quickly. */ | ||
449 | for (;;) | ||
450 | do_event_scan_all_cpus(30000/rtas_event_scan_rate); | ||
451 | |||
452 | return -EINVAL; | ||
453 | } | 454 | } |
454 | 455 | ||
455 | static int __init rtas_init(void) | 456 | static int __init rtas_init(void) |
@@ -487,8 +488,7 @@ static int __init rtas_init(void) | |||
487 | if (!entry) | 488 | if (!entry) |
488 | printk(KERN_ERR "Failed to create error_log proc entry\n"); | 489 | printk(KERN_ERR "Failed to create error_log proc entry\n"); |
489 | 490 | ||
490 | if (kernel_thread(rtasd, NULL, CLONE_FS) < 0) | 491 | start_event_scan(); |
491 | printk(KERN_ERR "Failed to start RTAS daemon\n"); | ||
492 | 492 | ||
493 | return 0; | 493 | return 0; |
494 | } | 494 | } |
diff --git a/arch/powerpc/platforms/pseries/setup.c b/arch/powerpc/platforms/pseries/setup.c index ec341707e41b..8d75ea21296f 100644 --- a/arch/powerpc/platforms/pseries/setup.c +++ b/arch/powerpc/platforms/pseries/setup.c | |||
@@ -63,6 +63,7 @@ | |||
63 | #include <asm/smp.h> | 63 | #include <asm/smp.h> |
64 | #include <asm/firmware.h> | 64 | #include <asm/firmware.h> |
65 | #include <asm/eeh.h> | 65 | #include <asm/eeh.h> |
66 | #include <asm/pSeries_reconfig.h> | ||
66 | 67 | ||
67 | #include "plpar_wrappers.h" | 68 | #include "plpar_wrappers.h" |
68 | #include "pseries.h" | 69 | #include "pseries.h" |
@@ -254,6 +255,29 @@ static void __init pseries_discover_pic(void) | |||
254 | " interrupt-controller\n"); | 255 | " interrupt-controller\n"); |
255 | } | 256 | } |
256 | 257 | ||
258 | static int pci_dn_reconfig_notifier(struct notifier_block *nb, unsigned long action, void *node) | ||
259 | { | ||
260 | struct device_node *np = node; | ||
261 | struct pci_dn *pci = NULL; | ||
262 | int err = NOTIFY_OK; | ||
263 | |||
264 | switch (action) { | ||
265 | case PSERIES_RECONFIG_ADD: | ||
266 | pci = np->parent->data; | ||
267 | if (pci) | ||
268 | update_dn_pci_info(np, pci->phb); | ||
269 | break; | ||
270 | default: | ||
271 | err = NOTIFY_DONE; | ||
272 | break; | ||
273 | } | ||
274 | return err; | ||
275 | } | ||
276 | |||
277 | static struct notifier_block pci_dn_reconfig_nb = { | ||
278 | .notifier_call = pci_dn_reconfig_notifier, | ||
279 | }; | ||
280 | |||
257 | static void __init pSeries_setup_arch(void) | 281 | static void __init pSeries_setup_arch(void) |
258 | { | 282 | { |
259 | /* Discover PIC type and setup ppc_md accordingly */ | 283 | /* Discover PIC type and setup ppc_md accordingly */ |
@@ -271,6 +295,7 @@ static void __init pSeries_setup_arch(void) | |||
271 | /* Find and initialize PCI host bridges */ | 295 | /* Find and initialize PCI host bridges */ |
272 | init_pci_config_tokens(); | 296 | init_pci_config_tokens(); |
273 | find_and_init_phbs(); | 297 | find_and_init_phbs(); |
298 | pSeries_reconfig_notifier_register(&pci_dn_reconfig_nb); | ||
274 | eeh_init(); | 299 | eeh_init(); |
275 | 300 | ||
276 | pSeries_nvram_init(); | 301 | pSeries_nvram_init(); |
diff --git a/arch/powerpc/sysdev/Makefile b/arch/powerpc/sysdev/Makefile index b33b28a6fe12..2d1c87dd5d14 100644 --- a/arch/powerpc/sysdev/Makefile +++ b/arch/powerpc/sysdev/Makefile | |||
@@ -34,6 +34,7 @@ obj-$(CONFIG_IPIC) += ipic.o | |||
34 | obj-$(CONFIG_4xx) += uic.o | 34 | obj-$(CONFIG_4xx) += uic.o |
35 | obj-$(CONFIG_4xx_SOC) += ppc4xx_soc.o | 35 | obj-$(CONFIG_4xx_SOC) += ppc4xx_soc.o |
36 | obj-$(CONFIG_XILINX_VIRTEX) += xilinx_intc.o | 36 | obj-$(CONFIG_XILINX_VIRTEX) += xilinx_intc.o |
37 | obj-$(CONFIG_XILINX_PCI) += xilinx_pci.o | ||
37 | obj-$(CONFIG_OF_RTC) += of_rtc.o | 38 | obj-$(CONFIG_OF_RTC) += of_rtc.o |
38 | ifeq ($(CONFIG_PCI),y) | 39 | ifeq ($(CONFIG_PCI),y) |
39 | obj-$(CONFIG_4xx) += ppc4xx_pci.o | 40 | obj-$(CONFIG_4xx) += ppc4xx_pci.o |
diff --git a/arch/powerpc/sysdev/cpm2.c b/arch/powerpc/sysdev/cpm2.c index fd969f0e3121..eb5927212fab 100644 --- a/arch/powerpc/sysdev/cpm2.c +++ b/arch/powerpc/sysdev/cpm2.c | |||
@@ -61,7 +61,7 @@ EXPORT_SYMBOL(cpm2_immr); | |||
61 | void __init cpm2_reset(void) | 61 | void __init cpm2_reset(void) |
62 | { | 62 | { |
63 | #ifdef CONFIG_PPC_85xx | 63 | #ifdef CONFIG_PPC_85xx |
64 | cpm2_immr = ioremap(CPM_MAP_ADDR, CPM_MAP_SIZE); | 64 | cpm2_immr = ioremap(get_immrbase() + 0x80000, CPM_MAP_SIZE); |
65 | #else | 65 | #else |
66 | cpm2_immr = ioremap(get_immrbase(), CPM_MAP_SIZE); | 66 | cpm2_immr = ioremap(get_immrbase(), CPM_MAP_SIZE); |
67 | #endif | 67 | #endif |
diff --git a/arch/powerpc/sysdev/fsl_msi.c b/arch/powerpc/sysdev/fsl_msi.c index f25ce818d40a..da38a1ff97bb 100644 --- a/arch/powerpc/sysdev/fsl_msi.c +++ b/arch/powerpc/sysdev/fsl_msi.c | |||
@@ -113,8 +113,13 @@ static void fsl_compose_msi_msg(struct pci_dev *pdev, int hwirq, | |||
113 | struct msi_msg *msg) | 113 | struct msi_msg *msg) |
114 | { | 114 | { |
115 | struct fsl_msi *msi_data = fsl_msi; | 115 | struct fsl_msi *msi_data = fsl_msi; |
116 | struct pci_controller *hose = pci_bus_to_host(pdev->bus); | ||
117 | u32 base = 0; | ||
116 | 118 | ||
117 | msg->address_lo = msi_data->msi_addr_lo; | 119 | pci_bus_read_config_dword(hose->bus, |
120 | PCI_DEVFN(0, 0), PCI_BASE_ADDRESS_0, &base); | ||
121 | |||
122 | msg->address_lo = msi_data->msi_addr_lo + base; | ||
118 | msg->address_hi = msi_data->msi_addr_hi; | 123 | msg->address_hi = msi_data->msi_addr_hi; |
119 | msg->data = hwirq; | 124 | msg->data = hwirq; |
120 | 125 | ||
@@ -271,7 +276,7 @@ static int __devinit fsl_of_msi_probe(struct of_device *dev, | |||
271 | msi->irqhost->host_data = msi; | 276 | msi->irqhost->host_data = msi; |
272 | 277 | ||
273 | msi->msi_addr_hi = 0x0; | 278 | msi->msi_addr_hi = 0x0; |
274 | msi->msi_addr_lo = res.start + features->msiir_offset; | 279 | msi->msi_addr_lo = features->msiir_offset + (res.start & 0xfffff); |
275 | 280 | ||
276 | rc = fsl_msi_init_allocator(msi); | 281 | rc = fsl_msi_init_allocator(msi); |
277 | if (rc) { | 282 | if (rc) { |
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c index 78021d8afc53..ae88b1448018 100644 --- a/arch/powerpc/sysdev/fsl_pci.c +++ b/arch/powerpc/sysdev/fsl_pci.c | |||
@@ -23,6 +23,8 @@ | |||
23 | #include <linux/string.h> | 23 | #include <linux/string.h> |
24 | #include <linux/init.h> | 24 | #include <linux/init.h> |
25 | #include <linux/bootmem.h> | 25 | #include <linux/bootmem.h> |
26 | #include <linux/lmb.h> | ||
27 | #include <linux/log2.h> | ||
26 | 28 | ||
27 | #include <asm/io.h> | 29 | #include <asm/io.h> |
28 | #include <asm/prom.h> | 30 | #include <asm/prom.h> |
@@ -96,7 +98,13 @@ static void __init setup_pci_atmu(struct pci_controller *hose, | |||
96 | struct resource *rsrc) | 98 | struct resource *rsrc) |
97 | { | 99 | { |
98 | struct ccsr_pci __iomem *pci; | 100 | struct ccsr_pci __iomem *pci; |
99 | int i, j, n; | 101 | int i, j, n, mem_log, win_idx = 2; |
102 | u64 mem, sz, paddr_hi = 0; | ||
103 | u64 paddr_lo = ULLONG_MAX; | ||
104 | u32 pcicsrbar = 0, pcicsrbar_sz; | ||
105 | u32 piwar = PIWAR_EN | PIWAR_PF | PIWAR_TGI_LOCAL | | ||
106 | PIWAR_READ_SNOOP | PIWAR_WRITE_SNOOP; | ||
107 | char *name = hose->dn->full_name; | ||
100 | 108 | ||
101 | pr_debug("PCI memory map start 0x%016llx, size 0x%016llx\n", | 109 | pr_debug("PCI memory map start 0x%016llx, size 0x%016llx\n", |
102 | (u64)rsrc->start, (u64)rsrc->end - (u64)rsrc->start + 1); | 110 | (u64)rsrc->start, (u64)rsrc->end - (u64)rsrc->start + 1); |
@@ -117,6 +125,9 @@ static void __init setup_pci_atmu(struct pci_controller *hose, | |||
117 | if (!(hose->mem_resources[i].flags & IORESOURCE_MEM)) | 125 | if (!(hose->mem_resources[i].flags & IORESOURCE_MEM)) |
118 | continue; | 126 | continue; |
119 | 127 | ||
128 | paddr_lo = min(paddr_lo, (u64)hose->mem_resources[i].start); | ||
129 | paddr_hi = max(paddr_hi, (u64)hose->mem_resources[i].end); | ||
130 | |||
120 | n = setup_one_atmu(pci, j, &hose->mem_resources[i], | 131 | n = setup_one_atmu(pci, j, &hose->mem_resources[i], |
121 | hose->pci_mem_offset); | 132 | hose->pci_mem_offset); |
122 | 133 | ||
@@ -147,10 +158,105 @@ static void __init setup_pci_atmu(struct pci_controller *hose, | |||
147 | } | 158 | } |
148 | } | 159 | } |
149 | 160 | ||
150 | /* Setup 2G inbound Memory Window @ 1 */ | 161 | /* convert to pci address space */ |
151 | out_be32(&pci->piw[2].pitar, 0x00000000); | 162 | paddr_hi -= hose->pci_mem_offset; |
152 | out_be32(&pci->piw[2].piwbar,0x00000000); | 163 | paddr_lo -= hose->pci_mem_offset; |
153 | out_be32(&pci->piw[2].piwar, PIWAR_2G); | 164 | |
165 | if (paddr_hi == paddr_lo) { | ||
166 | pr_err("%s: No outbound window space\n", name); | ||
167 | return ; | ||
168 | } | ||
169 | |||
170 | if (paddr_lo == 0) { | ||
171 | pr_err("%s: No space for inbound window\n", name); | ||
172 | return ; | ||
173 | } | ||
174 | |||
175 | /* setup PCSRBAR/PEXCSRBAR */ | ||
176 | early_write_config_dword(hose, 0, 0, PCI_BASE_ADDRESS_0, 0xffffffff); | ||
177 | early_read_config_dword(hose, 0, 0, PCI_BASE_ADDRESS_0, &pcicsrbar_sz); | ||
178 | pcicsrbar_sz = ~pcicsrbar_sz + 1; | ||
179 | |||
180 | if (paddr_hi < (0x100000000ull - pcicsrbar_sz) || | ||
181 | (paddr_lo > 0x100000000ull)) | ||
182 | pcicsrbar = 0x100000000ull - pcicsrbar_sz; | ||
183 | else | ||
184 | pcicsrbar = (paddr_lo - pcicsrbar_sz) & -pcicsrbar_sz; | ||
185 | early_write_config_dword(hose, 0, 0, PCI_BASE_ADDRESS_0, pcicsrbar); | ||
186 | |||
187 | paddr_lo = min(paddr_lo, (u64)pcicsrbar); | ||
188 | |||
189 | pr_info("%s: PCICSRBAR @ 0x%x\n", name, pcicsrbar); | ||
190 | |||
191 | /* Setup inbound mem window */ | ||
192 | mem = lmb_end_of_DRAM(); | ||
193 | sz = min(mem, paddr_lo); | ||
194 | mem_log = __ilog2_u64(sz); | ||
195 | |||
196 | /* PCIe can overmap inbound & outbound since RX & TX are separated */ | ||
197 | if (early_find_capability(hose, 0, 0, PCI_CAP_ID_EXP)) { | ||
198 | /* Size window to exact size if power-of-two or one size up */ | ||
199 | if ((1ull << mem_log) != mem) { | ||
200 | if ((1ull << mem_log) > mem) | ||
201 | pr_info("%s: Setting PCI inbound window " | ||
202 | "greater than memory size\n", name); | ||
203 | mem_log++; | ||
204 | } | ||
205 | |||
206 | piwar |= (mem_log - 1); | ||
207 | |||
208 | /* Setup inbound memory window */ | ||
209 | out_be32(&pci->piw[win_idx].pitar, 0x00000000); | ||
210 | out_be32(&pci->piw[win_idx].piwbar, 0x00000000); | ||
211 | out_be32(&pci->piw[win_idx].piwar, piwar); | ||
212 | win_idx--; | ||
213 | |||
214 | hose->dma_window_base_cur = 0x00000000; | ||
215 | hose->dma_window_size = (resource_size_t)sz; | ||
216 | } else { | ||
217 | u64 paddr = 0; | ||
218 | |||
219 | /* Setup inbound memory window */ | ||
220 | out_be32(&pci->piw[win_idx].pitar, paddr >> 12); | ||
221 | out_be32(&pci->piw[win_idx].piwbar, paddr >> 12); | ||
222 | out_be32(&pci->piw[win_idx].piwar, (piwar | (mem_log - 1))); | ||
223 | win_idx--; | ||
224 | |||
225 | paddr += 1ull << mem_log; | ||
226 | sz -= 1ull << mem_log; | ||
227 | |||
228 | if (sz) { | ||
229 | mem_log = __ilog2_u64(sz); | ||
230 | piwar |= (mem_log - 1); | ||
231 | |||
232 | out_be32(&pci->piw[win_idx].pitar, paddr >> 12); | ||
233 | out_be32(&pci->piw[win_idx].piwbar, paddr >> 12); | ||
234 | out_be32(&pci->piw[win_idx].piwar, piwar); | ||
235 | win_idx--; | ||
236 | |||
237 | paddr += 1ull << mem_log; | ||
238 | } | ||
239 | |||
240 | hose->dma_window_base_cur = 0x00000000; | ||
241 | hose->dma_window_size = (resource_size_t)paddr; | ||
242 | } | ||
243 | |||
244 | if (hose->dma_window_size < mem) { | ||
245 | #ifndef CONFIG_SWIOTLB | ||
246 | pr_err("%s: ERROR: Memory size exceeds PCI ATMU ability to " | ||
247 | "map - enable CONFIG_SWIOTLB to avoid dma errors.\n", | ||
248 | name); | ||
249 | #endif | ||
250 | /* adjusting outbound windows could reclaim space in mem map */ | ||
251 | if (paddr_hi < 0xffffffffull) | ||
252 | pr_warning("%s: WARNING: Outbound window cfg leaves " | ||
253 | "gaps in memory map. Adjusting the memory map " | ||
254 | "could reduce unnecessary bounce buffering.\n", | ||
255 | name); | ||
256 | |||
257 | pr_info("%s: DMA window size is 0x%llx\n", name, | ||
258 | (u64)hose->dma_window_size); | ||
259 | } | ||
154 | 260 | ||
155 | iounmap(pci); | 261 | iounmap(pci); |
156 | } | 262 | } |
@@ -176,19 +282,9 @@ static void __init setup_pci_cmd(struct pci_controller *hose) | |||
176 | } | 282 | } |
177 | } | 283 | } |
178 | 284 | ||
179 | static void __init setup_pci_pcsrbar(struct pci_controller *hose) | ||
180 | { | ||
181 | #ifdef CONFIG_PCI_MSI | ||
182 | phys_addr_t immr_base; | ||
183 | |||
184 | immr_base = get_immrbase(); | ||
185 | early_write_config_dword(hose, 0, 0, PCI_BASE_ADDRESS_0, immr_base); | ||
186 | #endif | ||
187 | } | ||
188 | |||
189 | void fsl_pcibios_fixup_bus(struct pci_bus *bus) | 285 | void fsl_pcibios_fixup_bus(struct pci_bus *bus) |
190 | { | 286 | { |
191 | struct pci_controller *hose = (struct pci_controller *) bus->sysdata; | 287 | struct pci_controller *hose = pci_bus_to_host(bus); |
192 | int i; | 288 | int i; |
193 | 289 | ||
194 | if ((bus->parent == hose->bus) && | 290 | if ((bus->parent == hose->bus) && |
@@ -269,8 +365,6 @@ int __init fsl_add_bridge(struct device_node *dev, int is_primary) | |||
269 | /* Setup PEX window registers */ | 365 | /* Setup PEX window registers */ |
270 | setup_pci_atmu(hose, &rsrc); | 366 | setup_pci_atmu(hose, &rsrc); |
271 | 367 | ||
272 | /* Setup PEXCSRBAR */ | ||
273 | setup_pci_pcsrbar(hose); | ||
274 | return 0; | 368 | return 0; |
275 | } | 369 | } |
276 | 370 | ||
@@ -281,6 +375,8 @@ DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8543, quirk_fsl_pcie_header); | |||
281 | DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8547E, quirk_fsl_pcie_header); | 375 | DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8547E, quirk_fsl_pcie_header); |
282 | DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8545E, quirk_fsl_pcie_header); | 376 | DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8545E, quirk_fsl_pcie_header); |
283 | DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8545, quirk_fsl_pcie_header); | 377 | DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8545, quirk_fsl_pcie_header); |
378 | DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8569E, quirk_fsl_pcie_header); | ||
379 | DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8569, quirk_fsl_pcie_header); | ||
284 | DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8568E, quirk_fsl_pcie_header); | 380 | DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8568E, quirk_fsl_pcie_header); |
285 | DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8568, quirk_fsl_pcie_header); | 381 | DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8568, quirk_fsl_pcie_header); |
286 | DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8567E, quirk_fsl_pcie_header); | 382 | DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8567E, quirk_fsl_pcie_header); |
@@ -296,6 +392,8 @@ DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8536, quirk_fsl_pcie_header); | |||
296 | DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8641, quirk_fsl_pcie_header); | 392 | DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8641, quirk_fsl_pcie_header); |
297 | DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8641D, quirk_fsl_pcie_header); | 393 | DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8641D, quirk_fsl_pcie_header); |
298 | DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8610, quirk_fsl_pcie_header); | 394 | DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8610, quirk_fsl_pcie_header); |
395 | DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_P2020E, quirk_fsl_pcie_header); | ||
396 | DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_P2020, quirk_fsl_pcie_header); | ||
299 | #endif /* CONFIG_PPC_85xx || CONFIG_PPC_86xx */ | 397 | #endif /* CONFIG_PPC_85xx || CONFIG_PPC_86xx */ |
300 | 398 | ||
301 | #if defined(CONFIG_PPC_83xx) || defined(CONFIG_PPC_MPC512x) | 399 | #if defined(CONFIG_PPC_83xx) || defined(CONFIG_PPC_MPC512x) |
@@ -324,7 +422,7 @@ struct mpc83xx_pcie_priv { | |||
324 | 422 | ||
325 | static int mpc83xx_pcie_exclude_device(struct pci_bus *bus, unsigned int devfn) | 423 | static int mpc83xx_pcie_exclude_device(struct pci_bus *bus, unsigned int devfn) |
326 | { | 424 | { |
327 | struct pci_controller *hose = bus->sysdata; | 425 | struct pci_controller *hose = pci_bus_to_host(bus); |
328 | 426 | ||
329 | if (hose->indirect_type & PPC_INDIRECT_TYPE_NO_PCIE_LINK) | 427 | if (hose->indirect_type & PPC_INDIRECT_TYPE_NO_PCIE_LINK) |
330 | return PCIBIOS_DEVICE_NOT_FOUND; | 428 | return PCIBIOS_DEVICE_NOT_FOUND; |
@@ -350,7 +448,7 @@ static int mpc83xx_pcie_exclude_device(struct pci_bus *bus, unsigned int devfn) | |||
350 | static void __iomem *mpc83xx_pcie_remap_cfg(struct pci_bus *bus, | 448 | static void __iomem *mpc83xx_pcie_remap_cfg(struct pci_bus *bus, |
351 | unsigned int devfn, int offset) | 449 | unsigned int devfn, int offset) |
352 | { | 450 | { |
353 | struct pci_controller *hose = bus->sysdata; | 451 | struct pci_controller *hose = pci_bus_to_host(bus); |
354 | struct mpc83xx_pcie_priv *pcie = hose->dn->data; | 452 | struct mpc83xx_pcie_priv *pcie = hose->dn->data; |
355 | u8 bus_no = bus->number - hose->first_busno; | 453 | u8 bus_no = bus->number - hose->first_busno; |
356 | u32 dev_base = bus_no << 24 | devfn << 16; | 454 | u32 dev_base = bus_no << 24 | devfn << 16; |
diff --git a/arch/powerpc/sysdev/fsl_pci.h b/arch/powerpc/sysdev/fsl_pci.h index 13f30c2a61e7..a9d8bbebed80 100644 --- a/arch/powerpc/sysdev/fsl_pci.h +++ b/arch/powerpc/sysdev/fsl_pci.h | |||
@@ -16,7 +16,11 @@ | |||
16 | 16 | ||
17 | #define PCIE_LTSSM 0x0404 /* PCIE Link Training and Status */ | 17 | #define PCIE_LTSSM 0x0404 /* PCIE Link Training and Status */ |
18 | #define PCIE_LTSSM_L0 0x16 /* L0 state */ | 18 | #define PCIE_LTSSM_L0 0x16 /* L0 state */ |
19 | #define PIWAR_2G 0xa0f5501e /* Enable, Prefetch, Local Mem, Snoop R/W, 2G */ | 19 | #define PIWAR_EN 0x80000000 /* Enable */ |
20 | #define PIWAR_PF 0x20000000 /* prefetch */ | ||
21 | #define PIWAR_TGI_LOCAL 0x00f00000 /* target - local memory */ | ||
22 | #define PIWAR_READ_SNOOP 0x00050000 | ||
23 | #define PIWAR_WRITE_SNOOP 0x00005000 | ||
20 | 24 | ||
21 | /* PCI/PCI Express outbound window reg */ | 25 | /* PCI/PCI Express outbound window reg */ |
22 | struct pci_outbound_window_regs { | 26 | struct pci_outbound_window_regs { |
diff --git a/arch/powerpc/sysdev/fsl_rio.c b/arch/powerpc/sysdev/fsl_rio.c index abdb124e1e2f..39db9d1155d2 100644 --- a/arch/powerpc/sysdev/fsl_rio.c +++ b/arch/powerpc/sysdev/fsl_rio.c | |||
@@ -1026,8 +1026,7 @@ int fsl_rio_setup(struct of_device *dev) | |||
1026 | return -EFAULT; | 1026 | return -EFAULT; |
1027 | } | 1027 | } |
1028 | dev_info(&dev->dev, "Of-device full name %s\n", dev->node->full_name); | 1028 | dev_info(&dev->dev, "Of-device full name %s\n", dev->node->full_name); |
1029 | dev_info(&dev->dev, "Regs start 0x%08x size 0x%08x\n", regs.start, | 1029 | dev_info(&dev->dev, "Regs: %pR\n", ®s); |
1030 | regs.end - regs.start + 1); | ||
1031 | 1030 | ||
1032 | dt_range = of_get_property(dev->node, "ranges", &rlen); | 1031 | dt_range = of_get_property(dev->node, "ranges", &rlen); |
1033 | if (!dt_range) { | 1032 | if (!dt_range) { |
@@ -1077,8 +1076,9 @@ int fsl_rio_setup(struct of_device *dev) | |||
1077 | 1076 | ||
1078 | INIT_LIST_HEAD(&port->dbells); | 1077 | INIT_LIST_HEAD(&port->dbells); |
1079 | port->iores.start = law_start; | 1078 | port->iores.start = law_start; |
1080 | port->iores.end = law_start + law_size; | 1079 | port->iores.end = law_start + law_size - 1; |
1081 | port->iores.flags = IORESOURCE_MEM; | 1080 | port->iores.flags = IORESOURCE_MEM; |
1081 | port->iores.name = "rio_io_win"; | ||
1082 | 1082 | ||
1083 | priv->bellirq = irq_of_parse_and_map(dev->node, 2); | 1083 | priv->bellirq = irq_of_parse_and_map(dev->node, 2); |
1084 | priv->txirq = irq_of_parse_and_map(dev->node, 3); | 1084 | priv->txirq = irq_of_parse_and_map(dev->node, 3); |
@@ -1156,14 +1156,15 @@ int fsl_rio_setup(struct of_device *dev) | |||
1156 | out_be32((priv->regs_win + RIO_ISR_AACR), RIO_ISR_AACR_AA); | 1156 | out_be32((priv->regs_win + RIO_ISR_AACR), RIO_ISR_AACR_AA); |
1157 | 1157 | ||
1158 | /* Configure maintenance transaction window */ | 1158 | /* Configure maintenance transaction window */ |
1159 | out_be32(&priv->maint_atmu_regs->rowbar, 0x000c0000); | 1159 | out_be32(&priv->maint_atmu_regs->rowbar, law_start >> 12); |
1160 | out_be32(&priv->maint_atmu_regs->rowar, 0x80077015); | 1160 | out_be32(&priv->maint_atmu_regs->rowar, 0x80077015); /* 4M */ |
1161 | 1161 | ||
1162 | priv->maint_win = ioremap(law_start, RIO_MAINT_WIN_SIZE); | 1162 | priv->maint_win = ioremap(law_start, RIO_MAINT_WIN_SIZE); |
1163 | 1163 | ||
1164 | /* Configure outbound doorbell window */ | 1164 | /* Configure outbound doorbell window */ |
1165 | out_be32(&priv->dbell_atmu_regs->rowbar, 0x000c0400); | 1165 | out_be32(&priv->dbell_atmu_regs->rowbar, |
1166 | out_be32(&priv->dbell_atmu_regs->rowar, 0x8004200b); | 1166 | (law_start + RIO_MAINT_WIN_SIZE) >> 12); |
1167 | out_be32(&priv->dbell_atmu_regs->rowar, 0x8004200b); /* 4k */ | ||
1167 | fsl_rio_doorbell_init(port); | 1168 | fsl_rio_doorbell_init(port); |
1168 | 1169 | ||
1169 | return 0; | 1170 | return 0; |
diff --git a/arch/powerpc/sysdev/fsl_soc.c b/arch/powerpc/sysdev/fsl_soc.c index 5c64ccd402e2..95dbc643c4fc 100644 --- a/arch/powerpc/sysdev/fsl_soc.c +++ b/arch/powerpc/sysdev/fsl_soc.c | |||
@@ -379,16 +379,10 @@ static int __init setup_rstcr(void) | |||
379 | struct device_node *np; | 379 | struct device_node *np; |
380 | np = of_find_node_by_name(NULL, "global-utilities"); | 380 | np = of_find_node_by_name(NULL, "global-utilities"); |
381 | if ((np && of_get_property(np, "fsl,has-rstcr", NULL))) { | 381 | if ((np && of_get_property(np, "fsl,has-rstcr", NULL))) { |
382 | const u32 *prop = of_get_property(np, "reg", NULL); | 382 | rstcr = of_iomap(np, 0) + 0xb0; |
383 | if (prop) { | 383 | if (!rstcr) |
384 | /* map reset control register | 384 | printk (KERN_EMERG "Error: reset control register " |
385 | * 0xE00B0 is offset of reset control register | 385 | "not mapped!\n"); |
386 | */ | ||
387 | rstcr = ioremap(get_immrbase() + *prop + 0xB0, 0xff); | ||
388 | if (!rstcr) | ||
389 | printk (KERN_EMERG "Error: reset control " | ||
390 | "register not mapped!\n"); | ||
391 | } | ||
392 | } else | 386 | } else |
393 | printk (KERN_INFO "rstcr compatible register does not exist!\n"); | 387 | printk (KERN_INFO "rstcr compatible register does not exist!\n"); |
394 | if (np) | 388 | if (np) |
diff --git a/arch/powerpc/sysdev/indirect_pci.c b/arch/powerpc/sysdev/indirect_pci.c index 7fd49c97501a..7ed809676642 100644 --- a/arch/powerpc/sysdev/indirect_pci.c +++ b/arch/powerpc/sysdev/indirect_pci.c | |||
@@ -24,7 +24,7 @@ static int | |||
24 | indirect_read_config(struct pci_bus *bus, unsigned int devfn, int offset, | 24 | indirect_read_config(struct pci_bus *bus, unsigned int devfn, int offset, |
25 | int len, u32 *val) | 25 | int len, u32 *val) |
26 | { | 26 | { |
27 | struct pci_controller *hose = bus->sysdata; | 27 | struct pci_controller *hose = pci_bus_to_host(bus); |
28 | volatile void __iomem *cfg_data; | 28 | volatile void __iomem *cfg_data; |
29 | u8 cfg_type = 0; | 29 | u8 cfg_type = 0; |
30 | u32 bus_no, reg; | 30 | u32 bus_no, reg; |
@@ -82,7 +82,7 @@ static int | |||
82 | indirect_write_config(struct pci_bus *bus, unsigned int devfn, int offset, | 82 | indirect_write_config(struct pci_bus *bus, unsigned int devfn, int offset, |
83 | int len, u32 val) | 83 | int len, u32 val) |
84 | { | 84 | { |
85 | struct pci_controller *hose = bus->sysdata; | 85 | struct pci_controller *hose = pci_bus_to_host(bus); |
86 | volatile void __iomem *cfg_data; | 86 | volatile void __iomem *cfg_data; |
87 | u8 cfg_type = 0; | 87 | u8 cfg_type = 0; |
88 | u32 bus_no, reg; | 88 | u32 bus_no, reg; |
diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c index 352d8c3ef526..9c3af5045495 100644 --- a/arch/powerpc/sysdev/mpic.c +++ b/arch/powerpc/sysdev/mpic.c | |||
@@ -613,23 +613,23 @@ static int irq_choose_cpu(unsigned int virt_irq) | |||
613 | #define mpic_irq_to_hw(virq) ((unsigned int)irq_map[virq].hwirq) | 613 | #define mpic_irq_to_hw(virq) ((unsigned int)irq_map[virq].hwirq) |
614 | 614 | ||
615 | /* Find an mpic associated with a given linux interrupt */ | 615 | /* Find an mpic associated with a given linux interrupt */ |
616 | static struct mpic *mpic_find(unsigned int irq, unsigned int *is_ipi) | 616 | static struct mpic *mpic_find(unsigned int irq) |
617 | { | 617 | { |
618 | unsigned int src = mpic_irq_to_hw(irq); | ||
619 | struct mpic *mpic; | ||
620 | |||
621 | if (irq < NUM_ISA_INTERRUPTS) | 618 | if (irq < NUM_ISA_INTERRUPTS) |
622 | return NULL; | 619 | return NULL; |
623 | 620 | ||
624 | mpic = irq_desc[irq].chip_data; | 621 | return irq_desc[irq].chip_data; |
622 | } | ||
625 | 623 | ||
626 | if (is_ipi) | 624 | /* Determine if the linux irq is an IPI */ |
627 | *is_ipi = (src >= mpic->ipi_vecs[0] && | 625 | static unsigned int mpic_is_ipi(struct mpic *mpic, unsigned int irq) |
628 | src <= mpic->ipi_vecs[3]); | 626 | { |
627 | unsigned int src = mpic_irq_to_hw(irq); | ||
629 | 628 | ||
630 | return mpic; | 629 | return (src >= mpic->ipi_vecs[0] && src <= mpic->ipi_vecs[3]); |
631 | } | 630 | } |
632 | 631 | ||
632 | |||
633 | /* Convert a cpu mask from logical to physical cpu numbers. */ | 633 | /* Convert a cpu mask from logical to physical cpu numbers. */ |
634 | static inline u32 mpic_physmask(u32 cpumask) | 634 | static inline u32 mpic_physmask(u32 cpumask) |
635 | { | 635 | { |
@@ -1383,8 +1383,7 @@ void __init mpic_set_serial_int(struct mpic *mpic, int enable) | |||
1383 | 1383 | ||
1384 | void mpic_irq_set_priority(unsigned int irq, unsigned int pri) | 1384 | void mpic_irq_set_priority(unsigned int irq, unsigned int pri) |
1385 | { | 1385 | { |
1386 | unsigned int is_ipi; | 1386 | struct mpic *mpic = mpic_find(irq); |
1387 | struct mpic *mpic = mpic_find(irq, &is_ipi); | ||
1388 | unsigned int src = mpic_irq_to_hw(irq); | 1387 | unsigned int src = mpic_irq_to_hw(irq); |
1389 | unsigned long flags; | 1388 | unsigned long flags; |
1390 | u32 reg; | 1389 | u32 reg; |
@@ -1393,7 +1392,7 @@ void mpic_irq_set_priority(unsigned int irq, unsigned int pri) | |||
1393 | return; | 1392 | return; |
1394 | 1393 | ||
1395 | spin_lock_irqsave(&mpic_lock, flags); | 1394 | spin_lock_irqsave(&mpic_lock, flags); |
1396 | if (is_ipi) { | 1395 | if (mpic_is_ipi(mpic, irq)) { |
1397 | reg = mpic_ipi_read(src - mpic->ipi_vecs[0]) & | 1396 | reg = mpic_ipi_read(src - mpic->ipi_vecs[0]) & |
1398 | ~MPIC_VECPRI_PRIORITY_MASK; | 1397 | ~MPIC_VECPRI_PRIORITY_MASK; |
1399 | mpic_ipi_write(src - mpic->ipi_vecs[0], | 1398 | mpic_ipi_write(src - mpic->ipi_vecs[0], |
diff --git a/arch/powerpc/sysdev/ppc4xx_pci.c b/arch/powerpc/sysdev/ppc4xx_pci.c index 6a2d473c345a..daefc93ddffe 100644 --- a/arch/powerpc/sysdev/ppc4xx_pci.c +++ b/arch/powerpc/sysdev/ppc4xx_pci.c | |||
@@ -1295,7 +1295,7 @@ static void __iomem *ppc4xx_pciex_get_config_base(struct ppc4xx_pciex_port *port | |||
1295 | static int ppc4xx_pciex_read_config(struct pci_bus *bus, unsigned int devfn, | 1295 | static int ppc4xx_pciex_read_config(struct pci_bus *bus, unsigned int devfn, |
1296 | int offset, int len, u32 *val) | 1296 | int offset, int len, u32 *val) |
1297 | { | 1297 | { |
1298 | struct pci_controller *hose = (struct pci_controller *) bus->sysdata; | 1298 | struct pci_controller *hose = pci_bus_to_host(bus); |
1299 | struct ppc4xx_pciex_port *port = | 1299 | struct ppc4xx_pciex_port *port = |
1300 | &ppc4xx_pciex_ports[hose->indirect_type]; | 1300 | &ppc4xx_pciex_ports[hose->indirect_type]; |
1301 | void __iomem *addr; | 1301 | void __iomem *addr; |
@@ -1352,7 +1352,7 @@ static int ppc4xx_pciex_read_config(struct pci_bus *bus, unsigned int devfn, | |||
1352 | static int ppc4xx_pciex_write_config(struct pci_bus *bus, unsigned int devfn, | 1352 | static int ppc4xx_pciex_write_config(struct pci_bus *bus, unsigned int devfn, |
1353 | int offset, int len, u32 val) | 1353 | int offset, int len, u32 val) |
1354 | { | 1354 | { |
1355 | struct pci_controller *hose = (struct pci_controller *) bus->sysdata; | 1355 | struct pci_controller *hose = pci_bus_to_host(bus); |
1356 | struct ppc4xx_pciex_port *port = | 1356 | struct ppc4xx_pciex_port *port = |
1357 | &ppc4xx_pciex_ports[hose->indirect_type]; | 1357 | &ppc4xx_pciex_ports[hose->indirect_type]; |
1358 | void __iomem *addr; | 1358 | void __iomem *addr; |
diff --git a/arch/powerpc/sysdev/qe_lib/qe.c b/arch/powerpc/sysdev/qe_lib/qe.c index 01bce3784b0a..b28b0e512d67 100644 --- a/arch/powerpc/sysdev/qe_lib/qe.c +++ b/arch/powerpc/sysdev/qe_lib/qe.c | |||
@@ -61,6 +61,7 @@ struct qe_immap __iomem *qe_immr; | |||
61 | EXPORT_SYMBOL(qe_immr); | 61 | EXPORT_SYMBOL(qe_immr); |
62 | 62 | ||
63 | static struct qe_snum snums[QE_NUM_OF_SNUM]; /* Dynamically allocated SNUMs */ | 63 | static struct qe_snum snums[QE_NUM_OF_SNUM]; /* Dynamically allocated SNUMs */ |
64 | static unsigned int qe_num_of_snum; | ||
64 | 65 | ||
65 | static phys_addr_t qebase = -1; | 66 | static phys_addr_t qebase = -1; |
66 | 67 | ||
@@ -264,10 +265,14 @@ static void qe_snums_init(void) | |||
264 | 0x04, 0x05, 0x0C, 0x0D, 0x14, 0x15, 0x1C, 0x1D, | 265 | 0x04, 0x05, 0x0C, 0x0D, 0x14, 0x15, 0x1C, 0x1D, |
265 | 0x24, 0x25, 0x2C, 0x2D, 0x34, 0x35, 0x88, 0x89, | 266 | 0x24, 0x25, 0x2C, 0x2D, 0x34, 0x35, 0x88, 0x89, |
266 | 0x98, 0x99, 0xA8, 0xA9, 0xB8, 0xB9, 0xC8, 0xC9, | 267 | 0x98, 0x99, 0xA8, 0xA9, 0xB8, 0xB9, 0xC8, 0xC9, |
267 | 0xD8, 0xD9, 0xE8, 0xE9, | 268 | 0xD8, 0xD9, 0xE8, 0xE9, 0x08, 0x09, 0x18, 0x19, |
269 | 0x28, 0x29, 0x38, 0x39, 0x48, 0x49, 0x58, 0x59, | ||
270 | 0x68, 0x69, 0x78, 0x79, 0x80, 0x81, | ||
268 | }; | 271 | }; |
269 | 272 | ||
270 | for (i = 0; i < QE_NUM_OF_SNUM; i++) { | 273 | qe_num_of_snum = qe_get_num_of_snums(); |
274 | |||
275 | for (i = 0; i < qe_num_of_snum; i++) { | ||
271 | snums[i].num = snum_init[i]; | 276 | snums[i].num = snum_init[i]; |
272 | snums[i].state = QE_SNUM_STATE_FREE; | 277 | snums[i].state = QE_SNUM_STATE_FREE; |
273 | } | 278 | } |
@@ -280,7 +285,7 @@ int qe_get_snum(void) | |||
280 | int i; | 285 | int i; |
281 | 286 | ||
282 | spin_lock_irqsave(&qe_lock, flags); | 287 | spin_lock_irqsave(&qe_lock, flags); |
283 | for (i = 0; i < QE_NUM_OF_SNUM; i++) { | 288 | for (i = 0; i < qe_num_of_snum; i++) { |
284 | if (snums[i].state == QE_SNUM_STATE_FREE) { | 289 | if (snums[i].state == QE_SNUM_STATE_FREE) { |
285 | snums[i].state = QE_SNUM_STATE_USED; | 290 | snums[i].state = QE_SNUM_STATE_USED; |
286 | snum = snums[i].num; | 291 | snum = snums[i].num; |
@@ -297,7 +302,7 @@ void qe_put_snum(u8 snum) | |||
297 | { | 302 | { |
298 | int i; | 303 | int i; |
299 | 304 | ||
300 | for (i = 0; i < QE_NUM_OF_SNUM; i++) { | 305 | for (i = 0; i < qe_num_of_snum; i++) { |
301 | if (snums[i].num == snum) { | 306 | if (snums[i].num == snum) { |
302 | snums[i].state = QE_SNUM_STATE_FREE; | 307 | snums[i].state = QE_SNUM_STATE_FREE; |
303 | break; | 308 | break; |
@@ -575,3 +580,65 @@ struct qe_firmware_info *qe_get_firmware_info(void) | |||
575 | } | 580 | } |
576 | EXPORT_SYMBOL(qe_get_firmware_info); | 581 | EXPORT_SYMBOL(qe_get_firmware_info); |
577 | 582 | ||
583 | unsigned int qe_get_num_of_risc(void) | ||
584 | { | ||
585 | struct device_node *qe; | ||
586 | int size; | ||
587 | unsigned int num_of_risc = 0; | ||
588 | const u32 *prop; | ||
589 | |||
590 | qe = of_find_compatible_node(NULL, NULL, "fsl,qe"); | ||
591 | if (!qe) { | ||
592 | /* Older devices trees did not have an "fsl,qe" | ||
593 | * compatible property, so we need to look for | ||
594 | * the QE node by name. | ||
595 | */ | ||
596 | qe = of_find_node_by_type(NULL, "qe"); | ||
597 | if (!qe) | ||
598 | return num_of_risc; | ||
599 | } | ||
600 | |||
601 | prop = of_get_property(qe, "fsl,qe-num-riscs", &size); | ||
602 | if (prop && size == sizeof(*prop)) | ||
603 | num_of_risc = *prop; | ||
604 | |||
605 | of_node_put(qe); | ||
606 | |||
607 | return num_of_risc; | ||
608 | } | ||
609 | EXPORT_SYMBOL(qe_get_num_of_risc); | ||
610 | |||
611 | unsigned int qe_get_num_of_snums(void) | ||
612 | { | ||
613 | struct device_node *qe; | ||
614 | int size; | ||
615 | unsigned int num_of_snums; | ||
616 | const u32 *prop; | ||
617 | |||
618 | num_of_snums = 28; /* The default number of snum for threads is 28 */ | ||
619 | qe = of_find_compatible_node(NULL, NULL, "fsl,qe"); | ||
620 | if (!qe) { | ||
621 | /* Older devices trees did not have an "fsl,qe" | ||
622 | * compatible property, so we need to look for | ||
623 | * the QE node by name. | ||
624 | */ | ||
625 | qe = of_find_node_by_type(NULL, "qe"); | ||
626 | if (!qe) | ||
627 | return num_of_snums; | ||
628 | } | ||
629 | |||
630 | prop = of_get_property(qe, "fsl,qe-num-snums", &size); | ||
631 | if (prop && size == sizeof(*prop)) { | ||
632 | num_of_snums = *prop; | ||
633 | if ((num_of_snums < 28) || (num_of_snums > QE_NUM_OF_SNUM)) { | ||
634 | /* No QE ever has fewer than 28 SNUMs */ | ||
635 | pr_err("QE: number of snum is invalid\n"); | ||
636 | return -EINVAL; | ||
637 | } | ||
638 | } | ||
639 | |||
640 | of_node_put(qe); | ||
641 | |||
642 | return num_of_snums; | ||
643 | } | ||
644 | EXPORT_SYMBOL(qe_get_num_of_snums); | ||
diff --git a/arch/powerpc/sysdev/tsi108_pci.c b/arch/powerpc/sysdev/tsi108_pci.c index 24e1f5a197ae..cf244a419e96 100644 --- a/arch/powerpc/sysdev/tsi108_pci.c +++ b/arch/powerpc/sysdev/tsi108_pci.c | |||
@@ -63,7 +63,7 @@ tsi108_direct_write_config(struct pci_bus *bus, unsigned int devfunc, | |||
63 | int offset, int len, u32 val) | 63 | int offset, int len, u32 val) |
64 | { | 64 | { |
65 | volatile unsigned char *cfg_addr; | 65 | volatile unsigned char *cfg_addr; |
66 | struct pci_controller *hose = bus->sysdata; | 66 | struct pci_controller *hose = pci_bus_to_host(bus); |
67 | 67 | ||
68 | if (ppc_md.pci_exclude_device) | 68 | if (ppc_md.pci_exclude_device) |
69 | if (ppc_md.pci_exclude_device(hose, bus->number, devfunc)) | 69 | if (ppc_md.pci_exclude_device(hose, bus->number, devfunc)) |
@@ -149,7 +149,7 @@ tsi108_direct_read_config(struct pci_bus *bus, unsigned int devfn, int offset, | |||
149 | int len, u32 * val) | 149 | int len, u32 * val) |
150 | { | 150 | { |
151 | volatile unsigned char *cfg_addr; | 151 | volatile unsigned char *cfg_addr; |
152 | struct pci_controller *hose = bus->sysdata; | 152 | struct pci_controller *hose = pci_bus_to_host(bus); |
153 | u32 temp; | 153 | u32 temp; |
154 | 154 | ||
155 | if (ppc_md.pci_exclude_device) | 155 | if (ppc_md.pci_exclude_device) |
diff --git a/arch/powerpc/sysdev/xilinx_intc.c b/arch/powerpc/sysdev/xilinx_intc.c index c658b413c9b4..3ee1fd37bbfc 100644 --- a/arch/powerpc/sysdev/xilinx_intc.c +++ b/arch/powerpc/sysdev/xilinx_intc.c | |||
@@ -25,6 +25,7 @@ | |||
25 | #include <linux/of.h> | 25 | #include <linux/of.h> |
26 | #include <asm/io.h> | 26 | #include <asm/io.h> |
27 | #include <asm/processor.h> | 27 | #include <asm/processor.h> |
28 | #include <asm/i8259.h> | ||
28 | #include <asm/irq.h> | 29 | #include <asm/irq.h> |
29 | 30 | ||
30 | /* | 31 | /* |
@@ -191,20 +192,14 @@ struct irq_host * __init | |||
191 | xilinx_intc_init(struct device_node *np) | 192 | xilinx_intc_init(struct device_node *np) |
192 | { | 193 | { |
193 | struct irq_host * irq; | 194 | struct irq_host * irq; |
194 | struct resource res; | ||
195 | void * regs; | 195 | void * regs; |
196 | int rc; | ||
197 | 196 | ||
198 | /* Find and map the intc registers */ | 197 | /* Find and map the intc registers */ |
199 | rc = of_address_to_resource(np, 0, &res); | 198 | regs = of_iomap(np, 0); |
200 | if (rc) { | 199 | if (!regs) { |
201 | printk(KERN_ERR __FILE__ ": of_address_to_resource() failed\n"); | 200 | pr_err("xilinx_intc: could not map registers\n"); |
202 | return NULL; | 201 | return NULL; |
203 | } | 202 | } |
204 | regs = ioremap(res.start, 32); | ||
205 | |||
206 | printk(KERN_INFO "Xilinx intc at 0x%08llx mapped to 0x%p\n", | ||
207 | (unsigned long long) res.start, regs); | ||
208 | 203 | ||
209 | /* Setup interrupt controller */ | 204 | /* Setup interrupt controller */ |
210 | out_be32(regs + XINTC_IER, 0); /* disable all irqs */ | 205 | out_be32(regs + XINTC_IER, 0); /* disable all irqs */ |
@@ -217,6 +212,7 @@ xilinx_intc_init(struct device_node *np) | |||
217 | if (!irq) | 212 | if (!irq) |
218 | panic(__FILE__ ": Cannot allocate IRQ host\n"); | 213 | panic(__FILE__ ": Cannot allocate IRQ host\n"); |
219 | irq->host_data = regs; | 214 | irq->host_data = regs; |
215 | |||
220 | return irq; | 216 | return irq; |
221 | } | 217 | } |
222 | 218 | ||
@@ -227,23 +223,70 @@ int xilinx_intc_get_irq(void) | |||
227 | return irq_linear_revmap(master_irqhost, in_be32(regs + XINTC_IVR)); | 223 | return irq_linear_revmap(master_irqhost, in_be32(regs + XINTC_IVR)); |
228 | } | 224 | } |
229 | 225 | ||
226 | #if defined(CONFIG_PPC_I8259) | ||
227 | /* | ||
228 | * Support code for cascading to 8259 interrupt controllers | ||
229 | */ | ||
230 | static void xilinx_i8259_cascade(unsigned int irq, struct irq_desc *desc) | ||
231 | { | ||
232 | unsigned int cascade_irq = i8259_irq(); | ||
233 | if (cascade_irq) | ||
234 | generic_handle_irq(cascade_irq); | ||
235 | |||
236 | /* Let xilinx_intc end the interrupt */ | ||
237 | desc->chip->ack(irq); | ||
238 | desc->chip->unmask(irq); | ||
239 | } | ||
240 | |||
241 | static void __init xilinx_i8259_setup_cascade(void) | ||
242 | { | ||
243 | struct device_node *cascade_node; | ||
244 | int cascade_irq; | ||
245 | |||
246 | /* Initialize i8259 controller */ | ||
247 | cascade_node = of_find_compatible_node(NULL, NULL, "chrp,iic"); | ||
248 | if (!cascade_node) | ||
249 | return; | ||
250 | |||
251 | cascade_irq = irq_of_parse_and_map(cascade_node, 0); | ||
252 | if (!cascade_irq) { | ||
253 | pr_err("virtex_ml510: Failed to map cascade interrupt\n"); | ||
254 | goto out; | ||
255 | } | ||
256 | |||
257 | i8259_init(cascade_node, 0); | ||
258 | set_irq_chained_handler(cascade_irq, xilinx_i8259_cascade); | ||
259 | |||
260 | /* Program irq 7 (usb/audio), 14/15 (ide) to level sensitive */ | ||
261 | /* This looks like a dirty hack to me --gcl */ | ||
262 | outb(0xc0, 0x4d0); | ||
263 | outb(0xc0, 0x4d1); | ||
264 | |||
265 | out: | ||
266 | of_node_put(cascade_node); | ||
267 | } | ||
268 | #else | ||
269 | static inline void xilinx_i8259_setup_cascade(void) { return; } | ||
270 | #endif /* defined(CONFIG_PPC_I8259) */ | ||
271 | |||
272 | static struct of_device_id xilinx_intc_match[] __initconst = { | ||
273 | { .compatible = "xlnx,opb-intc-1.00.c", }, | ||
274 | { .compatible = "xlnx,xps-intc-1.00.a", }, | ||
275 | {} | ||
276 | }; | ||
277 | |||
278 | /* | ||
279 | * Initialize master Xilinx interrupt controller | ||
280 | */ | ||
230 | void __init xilinx_intc_init_tree(void) | 281 | void __init xilinx_intc_init_tree(void) |
231 | { | 282 | { |
232 | struct device_node *np; | 283 | struct device_node *np; |
233 | 284 | ||
234 | /* find top level interrupt controller */ | 285 | /* find top level interrupt controller */ |
235 | for_each_compatible_node(np, NULL, "xlnx,opb-intc-1.00.c") { | 286 | for_each_matching_node(np, xilinx_intc_match) { |
236 | if (!of_get_property(np, "interrupts", NULL)) | 287 | if (!of_get_property(np, "interrupts", NULL)) |
237 | break; | 288 | break; |
238 | } | 289 | } |
239 | if (!np) { | ||
240 | for_each_compatible_node(np, NULL, "xlnx,xps-intc-1.00.a") { | ||
241 | if (!of_get_property(np, "interrupts", NULL)) | ||
242 | break; | ||
243 | } | ||
244 | } | ||
245 | |||
246 | /* xilinx interrupt controller needs to be top level */ | ||
247 | BUG_ON(!np); | 290 | BUG_ON(!np); |
248 | 291 | ||
249 | master_irqhost = xilinx_intc_init(np); | 292 | master_irqhost = xilinx_intc_init(np); |
@@ -251,4 +294,6 @@ void __init xilinx_intc_init_tree(void) | |||
251 | 294 | ||
252 | irq_set_default_host(master_irqhost); | 295 | irq_set_default_host(master_irqhost); |
253 | of_node_put(np); | 296 | of_node_put(np); |
297 | |||
298 | xilinx_i8259_setup_cascade(); | ||
254 | } | 299 | } |
diff --git a/arch/powerpc/sysdev/xilinx_pci.c b/arch/powerpc/sysdev/xilinx_pci.c new file mode 100644 index 000000000000..1453b0eed220 --- /dev/null +++ b/arch/powerpc/sysdev/xilinx_pci.c | |||
@@ -0,0 +1,132 @@ | |||
1 | /* | ||
2 | * PCI support for Xilinx plbv46_pci soft-core which can be used on | ||
3 | * Xilinx Virtex ML410 / ML510 boards. | ||
4 | * | ||
5 | * Copyright 2009 Roderick Colenbrander | ||
6 | * Copyright 2009 Secret Lab Technologies Ltd. | ||
7 | * | ||
8 | * The pci bridge fixup code was copied from ppc4xx_pci.c and was written | ||
9 | * by Benjamin Herrenschmidt. | ||
10 | * Copyright 2007 Ben. Herrenschmidt <benh@kernel.crashing.org>, IBM Corp. | ||
11 | * | ||
12 | * This file is licensed under the terms of the GNU General Public License | ||
13 | * version 2. This program is licensed "as is" without any warranty of any | ||
14 | * kind, whether express or implied. | ||
15 | */ | ||
16 | |||
17 | #include <linux/ioport.h> | ||
18 | #include <linux/of.h> | ||
19 | #include <linux/pci.h> | ||
20 | #include <mm/mmu_decl.h> | ||
21 | #include <asm/io.h> | ||
22 | #include <asm/xilinx_pci.h> | ||
23 | |||
24 | #define XPLB_PCI_ADDR 0x10c | ||
25 | #define XPLB_PCI_DATA 0x110 | ||
26 | #define XPLB_PCI_BUS 0x114 | ||
27 | |||
28 | #define PCI_HOST_ENABLE_CMD PCI_COMMAND_SERR | PCI_COMMAND_PARITY | PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY | ||
29 | |||
30 | static struct of_device_id xilinx_pci_match[] = { | ||
31 | { .compatible = "xlnx,plbv46-pci-1.03.a", }, | ||
32 | {} | ||
33 | }; | ||
34 | |||
35 | /** | ||
36 | * xilinx_pci_fixup_bridge - Block Xilinx PHB configuration. | ||
37 | */ | ||
38 | static void xilinx_pci_fixup_bridge(struct pci_dev *dev) | ||
39 | { | ||
40 | struct pci_controller *hose; | ||
41 | int i; | ||
42 | |||
43 | if (dev->devfn || dev->bus->self) | ||
44 | return; | ||
45 | |||
46 | hose = pci_bus_to_host(dev->bus); | ||
47 | if (!hose) | ||
48 | return; | ||
49 | |||
50 | if (!of_match_node(xilinx_pci_match, hose->dn)) | ||
51 | return; | ||
52 | |||
53 | /* Hide the PCI host BARs from the kernel as their content doesn't | ||
54 | * fit well in the resource management | ||
55 | */ | ||
56 | for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) { | ||
57 | dev->resource[i].start = 0; | ||
58 | dev->resource[i].end = 0; | ||
59 | dev->resource[i].flags = 0; | ||
60 | } | ||
61 | |||
62 | dev_info(&dev->dev, "Hiding Xilinx plb-pci host bridge resources %s\n", | ||
63 | pci_name(dev)); | ||
64 | } | ||
65 | DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, xilinx_pci_fixup_bridge); | ||
66 | |||
67 | /** | ||
68 | * xilinx_pci_exclude_device - Don't do config access for non-root bus | ||
69 | * | ||
70 | * This is a hack. Config access to any bus other than bus 0 does not | ||
71 | * currently work on the ML510 so we prevent it here. | ||
72 | */ | ||
73 | static int | ||
74 | xilinx_pci_exclude_device(struct pci_controller *hose, u_char bus, u8 devfn) | ||
75 | { | ||
76 | return (bus != 0); | ||
77 | } | ||
78 | |||
79 | /** | ||
80 | * xilinx_pci_init - Find and register a Xilinx PCI host bridge | ||
81 | */ | ||
82 | void __init xilinx_pci_init(void) | ||
83 | { | ||
84 | struct pci_controller *hose; | ||
85 | struct resource r; | ||
86 | void __iomem *pci_reg; | ||
87 | struct device_node *pci_node; | ||
88 | |||
89 | pci_node = of_find_matching_node(NULL, xilinx_pci_match); | ||
90 | if(!pci_node) | ||
91 | return; | ||
92 | |||
93 | if (of_address_to_resource(pci_node, 0, &r)) { | ||
94 | pr_err("xilinx-pci: cannot resolve base address\n"); | ||
95 | return; | ||
96 | } | ||
97 | |||
98 | hose = pcibios_alloc_controller(pci_node); | ||
99 | if (!hose) { | ||
100 | pr_err("xilinx-pci: pcibios_alloc_controller() failed\n"); | ||
101 | return; | ||
102 | } | ||
103 | |||
104 | /* Setup config space */ | ||
105 | setup_indirect_pci(hose, r.start + XPLB_PCI_ADDR, | ||
106 | r.start + XPLB_PCI_DATA, | ||
107 | PPC_INDIRECT_TYPE_SET_CFG_TYPE); | ||
108 | |||
109 | /* According to the xilinx plbv46_pci documentation the soft-core starts | ||
110 | * a self-init when the bus master enable bit is set. Without this bit | ||
111 | * set the pci bus can't be scanned. | ||
112 | */ | ||
113 | early_write_config_word(hose, 0, 0, PCI_COMMAND, PCI_HOST_ENABLE_CMD); | ||
114 | |||
115 | /* Set the max latency timer to 255 */ | ||
116 | early_write_config_byte(hose, 0, 0, PCI_LATENCY_TIMER, 0xff); | ||
117 | |||
118 | /* Set the max bus number to 255 */ | ||
119 | pci_reg = of_iomap(pci_node, 0); | ||
120 | out_8(pci_reg + XPLB_PCI_BUS, 0xff); | ||
121 | iounmap(pci_reg); | ||
122 | |||
123 | /* Nothing past the root bridge is working right now. By default | ||
124 | * exclude config access to anything except bus 0 */ | ||
125 | if (!ppc_md.pci_exclude_device) | ||
126 | ppc_md.pci_exclude_device = xilinx_pci_exclude_device; | ||
127 | |||
128 | /* Register the host bridge with the linux kernel! */ | ||
129 | pci_process_bridge_OF_ranges(hose, pci_node, 1); | ||
130 | |||
131 | pr_info("xilinx-pci: Registered PCI host bridge\n"); | ||
132 | } | ||
diff --git a/arch/powerpc/xmon/xmon.c b/arch/powerpc/xmon/xmon.c index 8dfad7d9a004..e1f33a81e5e1 100644 --- a/arch/powerpc/xmon/xmon.c +++ b/arch/powerpc/xmon/xmon.c | |||
@@ -110,6 +110,7 @@ static int bsesc(void); | |||
110 | static void dump(void); | 110 | static void dump(void); |
111 | static void prdump(unsigned long, long); | 111 | static void prdump(unsigned long, long); |
112 | static int ppc_inst_dump(unsigned long, long, int); | 112 | static int ppc_inst_dump(unsigned long, long, int); |
113 | static void dump_log_buf(void); | ||
113 | static void backtrace(struct pt_regs *); | 114 | static void backtrace(struct pt_regs *); |
114 | static void excprint(struct pt_regs *); | 115 | static void excprint(struct pt_regs *); |
115 | static void prregs(struct pt_regs *); | 116 | static void prregs(struct pt_regs *); |
@@ -197,6 +198,7 @@ Commands:\n\ | |||
197 | di dump instructions\n\ | 198 | di dump instructions\n\ |
198 | df dump float values\n\ | 199 | df dump float values\n\ |
199 | dd dump double values\n\ | 200 | dd dump double values\n\ |
201 | dl dump the kernel log buffer\n\ | ||
200 | dr dump stream of raw bytes\n\ | 202 | dr dump stream of raw bytes\n\ |
201 | e print exception information\n\ | 203 | e print exception information\n\ |
202 | f flush cache\n\ | 204 | f flush cache\n\ |
@@ -2009,6 +2011,8 @@ dump(void) | |||
2009 | nidump = MAX_DUMP; | 2011 | nidump = MAX_DUMP; |
2010 | adrs += ppc_inst_dump(adrs, nidump, 1); | 2012 | adrs += ppc_inst_dump(adrs, nidump, 1); |
2011 | last_cmd = "di\n"; | 2013 | last_cmd = "di\n"; |
2014 | } else if (c == 'l') { | ||
2015 | dump_log_buf(); | ||
2012 | } else if (c == 'r') { | 2016 | } else if (c == 'r') { |
2013 | scanhex(&ndump); | 2017 | scanhex(&ndump); |
2014 | if (ndump == 0) | 2018 | if (ndump == 0) |
@@ -2122,6 +2126,49 @@ print_address(unsigned long addr) | |||
2122 | xmon_print_symbol(addr, "\t# ", ""); | 2126 | xmon_print_symbol(addr, "\t# ", ""); |
2123 | } | 2127 | } |
2124 | 2128 | ||
2129 | void | ||
2130 | dump_log_buf(void) | ||
2131 | { | ||
2132 | const unsigned long size = 128; | ||
2133 | unsigned long end, addr; | ||
2134 | unsigned char buf[size + 1]; | ||
2135 | |||
2136 | addr = 0; | ||
2137 | buf[size] = '\0'; | ||
2138 | |||
2139 | if (setjmp(bus_error_jmp) != 0) { | ||
2140 | printf("Unable to lookup symbol __log_buf!\n"); | ||
2141 | return; | ||
2142 | } | ||
2143 | |||
2144 | catch_memory_errors = 1; | ||
2145 | sync(); | ||
2146 | addr = kallsyms_lookup_name("__log_buf"); | ||
2147 | |||
2148 | if (! addr) | ||
2149 | printf("Symbol __log_buf not found!\n"); | ||
2150 | else { | ||
2151 | end = addr + (1 << CONFIG_LOG_BUF_SHIFT); | ||
2152 | while (addr < end) { | ||
2153 | if (! mread(addr, buf, size)) { | ||
2154 | printf("Can't read memory at address 0x%lx\n", addr); | ||
2155 | break; | ||
2156 | } | ||
2157 | |||
2158 | printf("%s", buf); | ||
2159 | |||
2160 | if (strlen(buf) < size) | ||
2161 | break; | ||
2162 | |||
2163 | addr += size; | ||
2164 | } | ||
2165 | } | ||
2166 | |||
2167 | sync(); | ||
2168 | /* wait a little while to see if we get a machine check */ | ||
2169 | __delay(200); | ||
2170 | catch_memory_errors = 0; | ||
2171 | } | ||
2125 | 2172 | ||
2126 | /* | 2173 | /* |
2127 | * Memory operations - move, set, print differences | 2174 | * Memory operations - move, set, print differences |