aboutsummaryrefslogtreecommitdiffstats
path: root/arch
diff options
context:
space:
mode:
authorDavid Howells <dhowells@redhat.com>2012-03-28 13:30:03 -0400
committerDavid Howells <dhowells@redhat.com>2012-03-28 13:30:03 -0400
commitf9aa7e1882f3ceec919b30f64a2ce6e66a2571b1 (patch)
treed9b1e03d15102703722e39883ac719be52615e1a /arch
parent8978bfd2288adaa24d39fa15f57eb9e24ffeca12 (diff)
Disintegrate asm/system.h for Xtensa
Disintegrate asm/system.h for Xtensa. Signed-off-by: David Howells <dhowells@redhat.com> cc: Chris Zankel <chris@zankel.net>
Diffstat (limited to 'arch')
-rw-r--r--arch/xtensa/include/asm/atomic.h2
-rw-r--r--arch/xtensa/include/asm/barrier.h29
-rw-r--r--arch/xtensa/include/asm/bitops.h1
-rw-r--r--arch/xtensa/include/asm/cmpxchg.h131
-rw-r--r--arch/xtensa/include/asm/exec.h14
-rw-r--r--arch/xtensa/include/asm/setup.h2
-rw-r--r--arch/xtensa/include/asm/switch_to.h22
-rw-r--r--arch/xtensa/include/asm/system.h189
-rw-r--r--arch/xtensa/include/asm/uaccess.h2
-rw-r--r--arch/xtensa/kernel/process.c1
-rw-r--r--arch/xtensa/kernel/ptrace.c1
-rw-r--r--arch/xtensa/kernel/setup.c1
-rw-r--r--arch/xtensa/kernel/traps.c19
-rw-r--r--arch/xtensa/mm/fault.c1
-rw-r--r--arch/xtensa/mm/tlb.c1
15 files changed, 225 insertions, 191 deletions
diff --git a/arch/xtensa/include/asm/atomic.h b/arch/xtensa/include/asm/atomic.h
index 23592eff67ad..b40989308775 100644
--- a/arch/xtensa/include/asm/atomic.h
+++ b/arch/xtensa/include/asm/atomic.h
@@ -18,7 +18,7 @@
18 18
19#ifdef __KERNEL__ 19#ifdef __KERNEL__
20#include <asm/processor.h> 20#include <asm/processor.h>
21#include <asm/system.h> 21#include <asm/cmpxchg.h>
22 22
23#define ATOMIC_INIT(i) { (i) } 23#define ATOMIC_INIT(i) { (i) }
24 24
diff --git a/arch/xtensa/include/asm/barrier.h b/arch/xtensa/include/asm/barrier.h
new file mode 100644
index 000000000000..55707a8009d3
--- /dev/null
+++ b/arch/xtensa/include/asm/barrier.h
@@ -0,0 +1,29 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2001 - 2005 Tensilica Inc.
7 */
8
9#ifndef _XTENSA_SYSTEM_H
10#define _XTENSA_SYSTEM_H
11
12#define smp_read_barrier_depends() do { } while(0)
13#define read_barrier_depends() do { } while(0)
14
15#define mb() barrier()
16#define rmb() mb()
17#define wmb() mb()
18
19#ifdef CONFIG_SMP
20#error smp_* not defined
21#else
22#define smp_mb() barrier()
23#define smp_rmb() barrier()
24#define smp_wmb() barrier()
25#endif
26
27#define set_mb(var, value) do { var = value; mb(); } while (0)
28
29#endif /* _XTENSA_SYSTEM_H */
diff --git a/arch/xtensa/include/asm/bitops.h b/arch/xtensa/include/asm/bitops.h
index 40aa7fe77f66..5270197ddd36 100644
--- a/arch/xtensa/include/asm/bitops.h
+++ b/arch/xtensa/include/asm/bitops.h
@@ -21,7 +21,6 @@
21 21
22#include <asm/processor.h> 22#include <asm/processor.h>
23#include <asm/byteorder.h> 23#include <asm/byteorder.h>
24#include <asm/system.h>
25 24
26#ifdef CONFIG_SMP 25#ifdef CONFIG_SMP
27# error SMP not supported on this architecture 26# error SMP not supported on this architecture
diff --git a/arch/xtensa/include/asm/cmpxchg.h b/arch/xtensa/include/asm/cmpxchg.h
new file mode 100644
index 000000000000..e32149063d83
--- /dev/null
+++ b/arch/xtensa/include/asm/cmpxchg.h
@@ -0,0 +1,131 @@
1/*
2 * Atomic xchg and cmpxchg operations.
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (C) 2001 - 2005 Tensilica Inc.
9 */
10
11#ifndef _XTENSA_CMPXCHG_H
12#define _XTENSA_CMPXCHG_H
13
14#ifndef __ASSEMBLY__
15
16#include <linux/stringify.h>
17
18/*
19 * cmpxchg
20 */
21
22static inline unsigned long
23__cmpxchg_u32(volatile int *p, int old, int new)
24{
25 __asm__ __volatile__("rsil a15, "__stringify(LOCKLEVEL)"\n\t"
26 "l32i %0, %1, 0 \n\t"
27 "bne %0, %2, 1f \n\t"
28 "s32i %3, %1, 0 \n\t"
29 "1: \n\t"
30 "wsr a15, "__stringify(PS)" \n\t"
31 "rsync \n\t"
32 : "=&a" (old)
33 : "a" (p), "a" (old), "r" (new)
34 : "a15", "memory");
35 return old;
36}
37/* This function doesn't exist, so you'll get a linker error
38 * if something tries to do an invalid cmpxchg(). */
39
40extern void __cmpxchg_called_with_bad_pointer(void);
41
42static __inline__ unsigned long
43__cmpxchg(volatile void *ptr, unsigned long old, unsigned long new, int size)
44{
45 switch (size) {
46 case 4: return __cmpxchg_u32(ptr, old, new);
47 default: __cmpxchg_called_with_bad_pointer();
48 return old;
49 }
50}
51
52#define cmpxchg(ptr,o,n) \
53 ({ __typeof__(*(ptr)) _o_ = (o); \
54 __typeof__(*(ptr)) _n_ = (n); \
55 (__typeof__(*(ptr))) __cmpxchg((ptr), (unsigned long)_o_, \
56 (unsigned long)_n_, sizeof (*(ptr))); \
57 })
58
59#include <asm-generic/cmpxchg-local.h>
60
61static inline unsigned long __cmpxchg_local(volatile void *ptr,
62 unsigned long old,
63 unsigned long new, int size)
64{
65 switch (size) {
66 case 4:
67 return __cmpxchg_u32(ptr, old, new);
68 default:
69 return __cmpxchg_local_generic(ptr, old, new, size);
70 }
71
72 return old;
73}
74
75/*
76 * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make
77 * them available.
78 */
79#define cmpxchg_local(ptr, o, n) \
80 ((__typeof__(*(ptr)))__cmpxchg_local_generic((ptr), (unsigned long)(o),\
81 (unsigned long)(n), sizeof(*(ptr))))
82#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
83
84/*
85 * xchg_u32
86 *
87 * Note that a15 is used here because the register allocation
88 * done by the compiler is not guaranteed and a window overflow
89 * may not occur between the rsil and wsr instructions. By using
90 * a15 in the rsil, the machine is guaranteed to be in a state
91 * where no register reference will cause an overflow.
92 */
93
94static inline unsigned long xchg_u32(volatile int * m, unsigned long val)
95{
96 unsigned long tmp;
97 __asm__ __volatile__("rsil a15, "__stringify(LOCKLEVEL)"\n\t"
98 "l32i %0, %1, 0 \n\t"
99 "s32i %2, %1, 0 \n\t"
100 "wsr a15, "__stringify(PS)" \n\t"
101 "rsync \n\t"
102 : "=&a" (tmp)
103 : "a" (m), "a" (val)
104 : "a15", "memory");
105 return tmp;
106}
107
108#define xchg(ptr,x) ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr))))
109
110/*
111 * This only works if the compiler isn't horribly bad at optimizing.
112 * gcc-2.5.8 reportedly can't handle this, but I define that one to
113 * be dead anyway.
114 */
115
116extern void __xchg_called_with_bad_pointer(void);
117
118static __inline__ unsigned long
119__xchg(unsigned long x, volatile void * ptr, int size)
120{
121 switch (size) {
122 case 4:
123 return xchg_u32(ptr, x);
124 }
125 __xchg_called_with_bad_pointer();
126 return x;
127}
128
129#endif /* __ASSEMBLY__ */
130
131#endif /* _XTENSA_CMPXCHG_H */
diff --git a/arch/xtensa/include/asm/exec.h b/arch/xtensa/include/asm/exec.h
new file mode 100644
index 000000000000..af949e28cb32
--- /dev/null
+++ b/arch/xtensa/include/asm/exec.h
@@ -0,0 +1,14 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2001 - 2005 Tensilica Inc.
7 */
8
9#ifndef _XTENSA_EXEC_H
10#define _XTENSA_EXEC_H
11
12#define arch_align_stack(x) (x)
13
14#endif /* _XTENSA_EXEC_H */
diff --git a/arch/xtensa/include/asm/setup.h b/arch/xtensa/include/asm/setup.h
index e3636520d8cc..9fa8ad979361 100644
--- a/arch/xtensa/include/asm/setup.h
+++ b/arch/xtensa/include/asm/setup.h
@@ -13,4 +13,6 @@
13 13
14#define COMMAND_LINE_SIZE 256 14#define COMMAND_LINE_SIZE 256
15 15
16extern void set_except_vector(int n, void *addr);
17
16#endif 18#endif
diff --git a/arch/xtensa/include/asm/switch_to.h b/arch/xtensa/include/asm/switch_to.h
new file mode 100644
index 000000000000..6b73bf0eb1ff
--- /dev/null
+++ b/arch/xtensa/include/asm/switch_to.h
@@ -0,0 +1,22 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2001 - 2005 Tensilica Inc.
7 */
8
9#ifndef _XTENSA_SWITCH_TO_H
10#define _XTENSA_SWITCH_TO_H
11
12/* * switch_to(n) should switch tasks to task nr n, first
13 * checking that n isn't the current task, in which case it does nothing.
14 */
15extern void *_switch_to(void *last, void *next);
16
17#define switch_to(prev,next,last) \
18do { \
19 (last) = _switch_to(prev, next); \
20} while(0)
21
22#endif /* _XTENSA_SWITCH_TO_H */
diff --git a/arch/xtensa/include/asm/system.h b/arch/xtensa/include/asm/system.h
index 1e7e09ab6cd7..a7f40578587c 100644
--- a/arch/xtensa/include/asm/system.h
+++ b/arch/xtensa/include/asm/system.h
@@ -1,184 +1,5 @@
1/* 1/* FILE TO BE DELETED. DO NOT ADD STUFF HERE! */
2 * include/asm-xtensa/system.h 2#include <asm/barrier.h>
3 * 3#include <asm/cmpxchg.h>
4 * This file is subject to the terms and conditions of the GNU General Public 4#include <asm/exec.h>
5 * License. See the file "COPYING" in the main directory of this archive 5#include <asm/switch_to.h>
6 * for more details.
7 *
8 * Copyright (C) 2001 - 2005 Tensilica Inc.
9 */
10
11#ifndef _XTENSA_SYSTEM_H
12#define _XTENSA_SYSTEM_H
13
14#include <linux/stringify.h>
15#include <linux/irqflags.h>
16
17#include <asm/processor.h>
18
19#define smp_read_barrier_depends() do { } while(0)
20#define read_barrier_depends() do { } while(0)
21
22#define mb() barrier()
23#define rmb() mb()
24#define wmb() mb()
25
26#ifdef CONFIG_SMP
27#error smp_* not defined
28#else
29#define smp_mb() barrier()
30#define smp_rmb() barrier()
31#define smp_wmb() barrier()
32#endif
33
34#define set_mb(var, value) do { var = value; mb(); } while (0)
35
36#if !defined (__ASSEMBLY__)
37
38/* * switch_to(n) should switch tasks to task nr n, first
39 * checking that n isn't the current task, in which case it does nothing.
40 */
41extern void *_switch_to(void *last, void *next);
42
43#endif /* __ASSEMBLY__ */
44
45#define switch_to(prev,next,last) \
46do { \
47 (last) = _switch_to(prev, next); \
48} while(0)
49
50/*
51 * cmpxchg
52 */
53
54static inline unsigned long
55__cmpxchg_u32(volatile int *p, int old, int new)
56{
57 __asm__ __volatile__("rsil a15, "__stringify(LOCKLEVEL)"\n\t"
58 "l32i %0, %1, 0 \n\t"
59 "bne %0, %2, 1f \n\t"
60 "s32i %3, %1, 0 \n\t"
61 "1: \n\t"
62 "wsr a15, "__stringify(PS)" \n\t"
63 "rsync \n\t"
64 : "=&a" (old)
65 : "a" (p), "a" (old), "r" (new)
66 : "a15", "memory");
67 return old;
68}
69/* This function doesn't exist, so you'll get a linker error
70 * if something tries to do an invalid cmpxchg(). */
71
72extern void __cmpxchg_called_with_bad_pointer(void);
73
74static __inline__ unsigned long
75__cmpxchg(volatile void *ptr, unsigned long old, unsigned long new, int size)
76{
77 switch (size) {
78 case 4: return __cmpxchg_u32(ptr, old, new);
79 default: __cmpxchg_called_with_bad_pointer();
80 return old;
81 }
82}
83
84#define cmpxchg(ptr,o,n) \
85 ({ __typeof__(*(ptr)) _o_ = (o); \
86 __typeof__(*(ptr)) _n_ = (n); \
87 (__typeof__(*(ptr))) __cmpxchg((ptr), (unsigned long)_o_, \
88 (unsigned long)_n_, sizeof (*(ptr))); \
89 })
90
91#include <asm-generic/cmpxchg-local.h>
92
93static inline unsigned long __cmpxchg_local(volatile void *ptr,
94 unsigned long old,
95 unsigned long new, int size)
96{
97 switch (size) {
98 case 4:
99 return __cmpxchg_u32(ptr, old, new);
100 default:
101 return __cmpxchg_local_generic(ptr, old, new, size);
102 }
103
104 return old;
105}
106
107/*
108 * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make
109 * them available.
110 */
111#define cmpxchg_local(ptr, o, n) \
112 ((__typeof__(*(ptr)))__cmpxchg_local_generic((ptr), (unsigned long)(o),\
113 (unsigned long)(n), sizeof(*(ptr))))
114#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
115
116/*
117 * xchg_u32
118 *
119 * Note that a15 is used here because the register allocation
120 * done by the compiler is not guaranteed and a window overflow
121 * may not occur between the rsil and wsr instructions. By using
122 * a15 in the rsil, the machine is guaranteed to be in a state
123 * where no register reference will cause an overflow.
124 */
125
126static inline unsigned long xchg_u32(volatile int * m, unsigned long val)
127{
128 unsigned long tmp;
129 __asm__ __volatile__("rsil a15, "__stringify(LOCKLEVEL)"\n\t"
130 "l32i %0, %1, 0 \n\t"
131 "s32i %2, %1, 0 \n\t"
132 "wsr a15, "__stringify(PS)" \n\t"
133 "rsync \n\t"
134 : "=&a" (tmp)
135 : "a" (m), "a" (val)
136 : "a15", "memory");
137 return tmp;
138}
139
140#define xchg(ptr,x) ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr))))
141
142/*
143 * This only works if the compiler isn't horribly bad at optimizing.
144 * gcc-2.5.8 reportedly can't handle this, but I define that one to
145 * be dead anyway.
146 */
147
148extern void __xchg_called_with_bad_pointer(void);
149
150static __inline__ unsigned long
151__xchg(unsigned long x, volatile void * ptr, int size)
152{
153 switch (size) {
154 case 4:
155 return xchg_u32(ptr, x);
156 }
157 __xchg_called_with_bad_pointer();
158 return x;
159}
160
161extern void set_except_vector(int n, void *addr);
162
163static inline void spill_registers(void)
164{
165 unsigned int a0, ps;
166
167 __asm__ __volatile__ (
168 "movi a14," __stringify (PS_EXCM_BIT) " | 1\n\t"
169 "mov a12, a0\n\t"
170 "rsr a13," __stringify(SAR) "\n\t"
171 "xsr a14," __stringify(PS) "\n\t"
172 "movi a0, _spill_registers\n\t"
173 "rsync\n\t"
174 "callx0 a0\n\t"
175 "mov a0, a12\n\t"
176 "wsr a13," __stringify(SAR) "\n\t"
177 "wsr a14," __stringify(PS) "\n\t"
178 :: "a" (&a0), "a" (&ps)
179 : "a2", "a3", "a4", "a7", "a11", "a12", "a13", "a14", "a15", "memory");
180}
181
182#define arch_align_stack(x) (x)
183
184#endif /* _XTENSA_SYSTEM_H */
diff --git a/arch/xtensa/include/asm/uaccess.h b/arch/xtensa/include/asm/uaccess.h
index 3fa526fd3c99..6e4bb3b791ab 100644
--- a/arch/xtensa/include/asm/uaccess.h
+++ b/arch/xtensa/include/asm/uaccess.h
@@ -17,7 +17,9 @@
17#define _XTENSA_UACCESS_H 17#define _XTENSA_UACCESS_H
18 18
19#include <linux/errno.h> 19#include <linux/errno.h>
20#ifndef __ASSEMBLY__
20#include <linux/prefetch.h> 21#include <linux/prefetch.h>
22#endif
21#include <asm/types.h> 23#include <asm/types.h>
22 24
23#define VERIFY_READ 0 25#define VERIFY_READ 0
diff --git a/arch/xtensa/kernel/process.c b/arch/xtensa/kernel/process.c
index 2c9004770c4e..6a2d6edf8f72 100644
--- a/arch/xtensa/kernel/process.c
+++ b/arch/xtensa/kernel/process.c
@@ -34,7 +34,6 @@
34 34
35#include <asm/pgtable.h> 35#include <asm/pgtable.h>
36#include <asm/uaccess.h> 36#include <asm/uaccess.h>
37#include <asm/system.h>
38#include <asm/io.h> 37#include <asm/io.h>
39#include <asm/processor.h> 38#include <asm/processor.h>
40#include <asm/platform.h> 39#include <asm/platform.h>
diff --git a/arch/xtensa/kernel/ptrace.c b/arch/xtensa/kernel/ptrace.c
index 2dff698ab02e..33eea4c16f12 100644
--- a/arch/xtensa/kernel/ptrace.c
+++ b/arch/xtensa/kernel/ptrace.c
@@ -24,7 +24,6 @@
24 24
25#include <asm/pgtable.h> 25#include <asm/pgtable.h>
26#include <asm/page.h> 26#include <asm/page.h>
27#include <asm/system.h>
28#include <asm/uaccess.h> 27#include <asm/uaccess.h>
29#include <asm/ptrace.h> 28#include <asm/ptrace.h>
30#include <asm/elf.h> 29#include <asm/elf.h>
diff --git a/arch/xtensa/kernel/setup.c b/arch/xtensa/kernel/setup.c
index 1e5a034fe011..17e746f7be60 100644
--- a/arch/xtensa/kernel/setup.c
+++ b/arch/xtensa/kernel/setup.c
@@ -34,7 +34,6 @@
34# include <linux/seq_file.h> 34# include <linux/seq_file.h>
35#endif 35#endif
36 36
37#include <asm/system.h>
38#include <asm/bootparam.h> 37#include <asm/bootparam.h>
39#include <asm/pgtable.h> 38#include <asm/pgtable.h>
40#include <asm/processor.h> 39#include <asm/processor.h>
diff --git a/arch/xtensa/kernel/traps.c b/arch/xtensa/kernel/traps.c
index e64efac3b9db..bc1e14cf9369 100644
--- a/arch/xtensa/kernel/traps.c
+++ b/arch/xtensa/kernel/traps.c
@@ -381,6 +381,25 @@ static __always_inline unsigned long *stack_pointer(struct task_struct *task)
381 return sp; 381 return sp;
382} 382}
383 383
384static inline void spill_registers(void)
385{
386 unsigned int a0, ps;
387
388 __asm__ __volatile__ (
389 "movi a14," __stringify (PS_EXCM_BIT) " | 1\n\t"
390 "mov a12, a0\n\t"
391 "rsr a13," __stringify(SAR) "\n\t"
392 "xsr a14," __stringify(PS) "\n\t"
393 "movi a0, _spill_registers\n\t"
394 "rsync\n\t"
395 "callx0 a0\n\t"
396 "mov a0, a12\n\t"
397 "wsr a13," __stringify(SAR) "\n\t"
398 "wsr a14," __stringify(PS) "\n\t"
399 :: "a" (&a0), "a" (&ps)
400 : "a2", "a3", "a4", "a7", "a11", "a12", "a13", "a14", "a15", "memory");
401}
402
384void show_trace(struct task_struct *task, unsigned long *sp) 403void show_trace(struct task_struct *task, unsigned long *sp)
385{ 404{
386 unsigned long a0, a1, pc; 405 unsigned long a0, a1, pc;
diff --git a/arch/xtensa/mm/fault.c b/arch/xtensa/mm/fault.c
index e367e3026436..b17885a0b508 100644
--- a/arch/xtensa/mm/fault.c
+++ b/arch/xtensa/mm/fault.c
@@ -19,7 +19,6 @@
19#include <asm/cacheflush.h> 19#include <asm/cacheflush.h>
20#include <asm/hardirq.h> 20#include <asm/hardirq.h>
21#include <asm/uaccess.h> 21#include <asm/uaccess.h>
22#include <asm/system.h>
23#include <asm/pgalloc.h> 22#include <asm/pgalloc.h>
24 23
25unsigned long asid_cache = ASID_USER_FIRST; 24unsigned long asid_cache = ASID_USER_FIRST;
diff --git a/arch/xtensa/mm/tlb.c b/arch/xtensa/mm/tlb.c
index 239461d8ea88..e2700b21395b 100644
--- a/arch/xtensa/mm/tlb.c
+++ b/arch/xtensa/mm/tlb.c
@@ -18,7 +18,6 @@
18#include <asm/processor.h> 18#include <asm/processor.h>
19#include <asm/mmu_context.h> 19#include <asm/mmu_context.h>
20#include <asm/tlbflush.h> 20#include <asm/tlbflush.h>
21#include <asm/system.h>
22#include <asm/cacheflush.h> 21#include <asm/cacheflush.h>
23 22
24 23
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-16 12:13:48 -0500