diff options
author | Huacai Chen <chenhc@lemote.com> | 2014-06-25 23:41:26 -0400 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2014-07-30 15:45:39 -0400 |
commit | bda4584cd943d7bb6cf677a8d694700c1984cf3e (patch) | |
tree | 892cd5d6ad7a03cf2a111f51de9921b2f8c8cf3b /arch | |
parent | 0f3f506b275517250ee0169ec075d5382967f5f6 (diff) |
MIPS: Support CPU topology files in sysfs
This patch is prepared for Loongson's NUMA support, it offer meaningful
sysfs files such as physical_package_id, core_id, core_siblings and
thread_siblings in /sys/devices/system/cpu/cpu?/topology.
Signed-off-by: Huacai Chen <chenhc@lemote.com>
Reviewed-by: Andreas Herrmann <andreas.herrmann@caviumnetworks.com>
Cc: John Crispin <john@phrozen.org>
Cc: Steven J. Hill <Steven.Hill@imgtec.com>
Cc: Aurelien Jarno <aurelien@aurel32.net>
Cc: linux-mips@linux-mips.org
Cc: Fuxin Zhang <zhangfx@lemote.com>
Cc: Zhangjin Wu <wuzhangjin@gmail.com>
Patchwork: https://patchwork.linux-mips.org/patch/7184/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/mips/include/asm/cpu-info.h | 1 | ||||
-rw-r--r-- | arch/mips/include/asm/smp.h | 6 | ||||
-rw-r--r-- | arch/mips/kernel/proc.c | 1 | ||||
-rw-r--r-- | arch/mips/kernel/smp.c | 26 |
4 files changed, 33 insertions, 1 deletions
diff --git a/arch/mips/include/asm/cpu-info.h b/arch/mips/include/asm/cpu-info.h index a28e3de473d2..6690d7af0a03 100644 --- a/arch/mips/include/asm/cpu-info.h +++ b/arch/mips/include/asm/cpu-info.h | |||
@@ -61,6 +61,7 @@ struct cpuinfo_mips { | |||
61 | struct cache_desc scache; /* Secondary cache */ | 61 | struct cache_desc scache; /* Secondary cache */ |
62 | struct cache_desc tcache; /* Tertiary/split secondary cache */ | 62 | struct cache_desc tcache; /* Tertiary/split secondary cache */ |
63 | int srsets; /* Shadow register sets */ | 63 | int srsets; /* Shadow register sets */ |
64 | int package;/* physical package number */ | ||
64 | int core; /* physical core number */ | 65 | int core; /* physical core number */ |
65 | #ifdef CONFIG_64BIT | 66 | #ifdef CONFIG_64BIT |
66 | int vmbits; /* Virtual memory size in bits */ | 67 | int vmbits; /* Virtual memory size in bits */ |
diff --git a/arch/mips/include/asm/smp.h b/arch/mips/include/asm/smp.h index b037334fca22..1e0f20a9cdda 100644 --- a/arch/mips/include/asm/smp.h +++ b/arch/mips/include/asm/smp.h | |||
@@ -22,6 +22,7 @@ | |||
22 | 22 | ||
23 | extern int smp_num_siblings; | 23 | extern int smp_num_siblings; |
24 | extern cpumask_t cpu_sibling_map[]; | 24 | extern cpumask_t cpu_sibling_map[]; |
25 | extern cpumask_t cpu_core_map[]; | ||
25 | 26 | ||
26 | #define raw_smp_processor_id() (current_thread_info()->cpu) | 27 | #define raw_smp_processor_id() (current_thread_info()->cpu) |
27 | 28 | ||
@@ -36,6 +37,11 @@ extern int __cpu_logical_map[NR_CPUS]; | |||
36 | 37 | ||
37 | #define NO_PROC_ID (-1) | 38 | #define NO_PROC_ID (-1) |
38 | 39 | ||
40 | #define topology_physical_package_id(cpu) (cpu_data[cpu].package) | ||
41 | #define topology_core_id(cpu) (cpu_data[cpu].core) | ||
42 | #define topology_core_cpumask(cpu) (&cpu_core_map[cpu]) | ||
43 | #define topology_thread_cpumask(cpu) (&cpu_sibling_map[cpu]) | ||
44 | |||
39 | #define SMP_RESCHEDULE_YOURSELF 0x1 /* XXX braindead */ | 45 | #define SMP_RESCHEDULE_YOURSELF 0x1 /* XXX braindead */ |
40 | #define SMP_CALL_FUNCTION 0x2 | 46 | #define SMP_CALL_FUNCTION 0x2 |
41 | /* Octeon - Tell another core to flush its icache */ | 47 | /* Octeon - Tell another core to flush its icache */ |
diff --git a/arch/mips/kernel/proc.c b/arch/mips/kernel/proc.c index 037a44d962f3..62c4439a147b 100644 --- a/arch/mips/kernel/proc.c +++ b/arch/mips/kernel/proc.c | |||
@@ -123,6 +123,7 @@ static int show_cpuinfo(struct seq_file *m, void *v) | |||
123 | cpu_data[n].srsets); | 123 | cpu_data[n].srsets); |
124 | seq_printf(m, "kscratch registers\t: %d\n", | 124 | seq_printf(m, "kscratch registers\t: %d\n", |
125 | hweight8(cpu_data[n].kscratch_mask)); | 125 | hweight8(cpu_data[n].kscratch_mask)); |
126 | seq_printf(m, "package\t\t\t: %d\n", cpu_data[n].package); | ||
126 | seq_printf(m, "core\t\t\t: %d\n", cpu_data[n].core); | 127 | seq_printf(m, "core\t\t\t: %d\n", cpu_data[n].core); |
127 | 128 | ||
128 | sprintf(fmt, "VCE%%c exceptions\t\t: %s\n", | 129 | sprintf(fmt, "VCE%%c exceptions\t\t: %s\n", |
diff --git a/arch/mips/kernel/smp.c b/arch/mips/kernel/smp.c index 9bad52ede903..c94c4e92e17d 100644 --- a/arch/mips/kernel/smp.c +++ b/arch/mips/kernel/smp.c | |||
@@ -59,9 +59,16 @@ EXPORT_SYMBOL(smp_num_siblings); | |||
59 | cpumask_t cpu_sibling_map[NR_CPUS] __read_mostly; | 59 | cpumask_t cpu_sibling_map[NR_CPUS] __read_mostly; |
60 | EXPORT_SYMBOL(cpu_sibling_map); | 60 | EXPORT_SYMBOL(cpu_sibling_map); |
61 | 61 | ||
62 | /* representing the core map of multi-core chips of each logical CPU */ | ||
63 | cpumask_t cpu_core_map[NR_CPUS] __read_mostly; | ||
64 | EXPORT_SYMBOL(cpu_core_map); | ||
65 | |||
62 | /* representing cpus for which sibling maps can be computed */ | 66 | /* representing cpus for which sibling maps can be computed */ |
63 | static cpumask_t cpu_sibling_setup_map; | 67 | static cpumask_t cpu_sibling_setup_map; |
64 | 68 | ||
69 | /* representing cpus for which core maps can be computed */ | ||
70 | static cpumask_t cpu_core_setup_map; | ||
71 | |||
65 | cpumask_t cpu_coherent_mask; | 72 | cpumask_t cpu_coherent_mask; |
66 | 73 | ||
67 | static inline void set_cpu_sibling_map(int cpu) | 74 | static inline void set_cpu_sibling_map(int cpu) |
@@ -72,7 +79,8 @@ static inline void set_cpu_sibling_map(int cpu) | |||
72 | 79 | ||
73 | if (smp_num_siblings > 1) { | 80 | if (smp_num_siblings > 1) { |
74 | for_each_cpu_mask(i, cpu_sibling_setup_map) { | 81 | for_each_cpu_mask(i, cpu_sibling_setup_map) { |
75 | if (cpu_data[cpu].core == cpu_data[i].core) { | 82 | if (cpu_data[cpu].package == cpu_data[i].package && |
83 | cpu_data[cpu].core == cpu_data[i].core) { | ||
76 | cpu_set(i, cpu_sibling_map[cpu]); | 84 | cpu_set(i, cpu_sibling_map[cpu]); |
77 | cpu_set(cpu, cpu_sibling_map[i]); | 85 | cpu_set(cpu, cpu_sibling_map[i]); |
78 | } | 86 | } |
@@ -81,6 +89,20 @@ static inline void set_cpu_sibling_map(int cpu) | |||
81 | cpu_set(cpu, cpu_sibling_map[cpu]); | 89 | cpu_set(cpu, cpu_sibling_map[cpu]); |
82 | } | 90 | } |
83 | 91 | ||
92 | static inline void set_cpu_core_map(int cpu) | ||
93 | { | ||
94 | int i; | ||
95 | |||
96 | cpu_set(cpu, cpu_core_setup_map); | ||
97 | |||
98 | for_each_cpu_mask(i, cpu_core_setup_map) { | ||
99 | if (cpu_data[cpu].package == cpu_data[i].package) { | ||
100 | cpu_set(i, cpu_core_map[cpu]); | ||
101 | cpu_set(cpu, cpu_core_map[i]); | ||
102 | } | ||
103 | } | ||
104 | } | ||
105 | |||
84 | struct plat_smp_ops *mp_ops; | 106 | struct plat_smp_ops *mp_ops; |
85 | EXPORT_SYMBOL(mp_ops); | 107 | EXPORT_SYMBOL(mp_ops); |
86 | 108 | ||
@@ -122,6 +144,7 @@ asmlinkage void start_secondary(void) | |||
122 | set_cpu_online(cpu, true); | 144 | set_cpu_online(cpu, true); |
123 | 145 | ||
124 | set_cpu_sibling_map(cpu); | 146 | set_cpu_sibling_map(cpu); |
147 | set_cpu_core_map(cpu); | ||
125 | 148 | ||
126 | cpu_set(cpu, cpu_callin_map); | 149 | cpu_set(cpu, cpu_callin_map); |
127 | 150 | ||
@@ -175,6 +198,7 @@ void __init smp_prepare_cpus(unsigned int max_cpus) | |||
175 | current_thread_info()->cpu = 0; | 198 | current_thread_info()->cpu = 0; |
176 | mp_ops->prepare_cpus(max_cpus); | 199 | mp_ops->prepare_cpus(max_cpus); |
177 | set_cpu_sibling_map(0); | 200 | set_cpu_sibling_map(0); |
201 | set_cpu_core_map(0); | ||
178 | #ifndef CONFIG_HOTPLUG_CPU | 202 | #ifndef CONFIG_HOTPLUG_CPU |
179 | init_cpu_present(cpu_possible_mask); | 203 | init_cpu_present(cpu_possible_mask); |
180 | #endif | 204 | #endif |