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authorJosh Boyer <jdub@us.ibm.com>2006-09-07 14:27:58 -0400
committerPaul Mackerras <paulus@samba.org>2006-09-13 04:39:52 -0400
commitb7e89214aadf82fa5eaff28f50f2078fa6ae773c (patch)
tree877bfd9e81dcdb68a2a66080ee562fc4796b0975 /arch
parent477bcae4c289a60f2303fbd4a3a875dcca647cf8 (diff)
[POWERPC] PPC 4xx: Enable XMON on PPC 4xx boards
The following patch allows XMON to run on the 4xx platform. Tested on Walnut, Ebony, and Nova (440GX based) eval boards. 440EP, 440SP, and 440SPE boards should work as well. Patch is against 2.6.18-rc6. Signed-off-by: Josh Boyer <jdub@us.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/ppc/xmon/start.c28
-rw-r--r--arch/ppc/xmon/xmon.c26
2 files changed, 38 insertions, 16 deletions
diff --git a/arch/ppc/xmon/start.c b/arch/ppc/xmon/start.c
index f7e92986952a..d74a883e5bde 100644
--- a/arch/ppc/xmon/start.c
+++ b/arch/ppc/xmon/start.c
@@ -15,6 +15,7 @@
15#include <asm/processor.h> 15#include <asm/processor.h>
16#include <asm/delay.h> 16#include <asm/delay.h>
17#include <asm/btext.h> 17#include <asm/btext.h>
18#include <asm/ibm4xx.h>
18 19
19static volatile unsigned char *sccc, *sccd; 20static volatile unsigned char *sccc, *sccd;
20unsigned int TXRDY, RXRDY, DLAB; 21unsigned int TXRDY, RXRDY, DLAB;
@@ -57,23 +58,30 @@ static struct sysrq_key_op sysrq_xmon_op =
57void 58void
58xmon_map_scc(void) 59xmon_map_scc(void)
59{ 60{
60#ifdef CONFIG_PPC_PREP 61#if defined(CONFIG_GEMINI)
61 volatile unsigned char *base;
62
63#elif defined(CONFIG_GEMINI)
64 /* should already be mapped by the kernel boot */ 62 /* should already be mapped by the kernel boot */
65 sccc = (volatile unsigned char *) 0xffeffb0d;
66 sccd = (volatile unsigned char *) 0xffeffb08; 63 sccd = (volatile unsigned char *) 0xffeffb08;
67 TXRDY = 0x20;
68 RXRDY = 1;
69 DLAB = 0x80;
70#elif defined(CONFIG_405GP) 64#elif defined(CONFIG_405GP)
71 sccc = (volatile unsigned char *)0xef600305;
72 sccd = (volatile unsigned char *)0xef600300; 65 sccd = (volatile unsigned char *)0xef600300;
66#elif defined(CONFIG_440EP)
67 sccd = (volatile unsigned char *) ioremap(PPC440EP_UART0_ADDR, 8);
68#elif defined(CONFIG_440SP)
69 sccd = (volatile unsigned char *) ioremap64(PPC440SP_UART0_ADDR, 8);
70#elif defined(CONFIG_440SPE)
71 sccd = (volatile unsigned char *) ioremap64(PPC440SPE_UART0_ADDR, 8);
72#elif defined(CONFIG_44x)
73 /* This is the default for 44x platforms. Any boards that have a
74 different UART address need to be put in cases before this or the
75 port will be mapped incorrectly */
76 sccd = (volatile unsigned char *) ioremap64(PPC440GP_UART0_ADDR, 8);
77#endif /* platform */
78
79#ifndef CONFIG_PPC_PREP
80 sccc = sccd + 5;
73 TXRDY = 0x20; 81 TXRDY = 0x20;
74 RXRDY = 1; 82 RXRDY = 1;
75 DLAB = 0x80; 83 DLAB = 0x80;
76#endif /* platform */ 84#endif
77 85
78 register_sysrq_key('x', &sysrq_xmon_op); 86 register_sysrq_key('x', &sysrq_xmon_op);
79} 87}
diff --git a/arch/ppc/xmon/xmon.c b/arch/ppc/xmon/xmon.c
index 37d234f93394..25d032b2aec7 100644
--- a/arch/ppc/xmon/xmon.c
+++ b/arch/ppc/xmon/xmon.c
@@ -153,6 +153,12 @@ static int xmon_trace[NR_CPUS];
153#define SSTEP 1 /* stepping because of 's' command */ 153#define SSTEP 1 /* stepping because of 's' command */
154#define BRSTEP 2 /* stepping over breakpoint */ 154#define BRSTEP 2 /* stepping over breakpoint */
155 155
156#ifdef CONFIG_4xx
157#define MSR_SSTEP_ENABLE 0x200
158#else
159#define MSR_SSTEP_ENABLE 0x400
160#endif
161
156static struct pt_regs *xmon_regs[NR_CPUS]; 162static struct pt_regs *xmon_regs[NR_CPUS];
157 163
158extern inline void sync(void) 164extern inline void sync(void)
@@ -211,6 +217,14 @@ static void get_tb(unsigned *p)
211 p[1] = lo; 217 p[1] = lo;
212} 218}
213 219
220static inline void xmon_enable_sstep(struct pt_regs *regs)
221{
222 regs->msr |= MSR_SSTEP_ENABLE;
223#ifdef CONFIG_4xx
224 mtspr(SPRN_DBCR0, mfspr(SPRN_DBCR0) | DBCR0_IC | DBCR0_IDM);
225#endif
226}
227
214int xmon(struct pt_regs *excp) 228int xmon(struct pt_regs *excp)
215{ 229{
216 struct pt_regs regs; 230 struct pt_regs regs;
@@ -254,10 +268,10 @@ int xmon(struct pt_regs *excp)
254 cmd = cmds(excp); 268 cmd = cmds(excp);
255 if (cmd == 's') { 269 if (cmd == 's') {
256 xmon_trace[smp_processor_id()] = SSTEP; 270 xmon_trace[smp_processor_id()] = SSTEP;
257 excp->msr |= 0x400; 271 xmon_enable_sstep(excp);
258 } else if (at_breakpoint(excp->nip)) { 272 } else if (at_breakpoint(excp->nip)) {
259 xmon_trace[smp_processor_id()] = BRSTEP; 273 xmon_trace[smp_processor_id()] = BRSTEP;
260 excp->msr |= 0x400; 274 xmon_enable_sstep(excp);
261 } else { 275 } else {
262 xmon_trace[smp_processor_id()] = 0; 276 xmon_trace[smp_processor_id()] = 0;
263 insert_bpts(); 277 insert_bpts();
@@ -298,7 +312,7 @@ xmon_bpt(struct pt_regs *regs)
298 remove_bpts(); 312 remove_bpts();
299 excprint(regs); 313 excprint(regs);
300 xmon_trace[smp_processor_id()] = BRSTEP; 314 xmon_trace[smp_processor_id()] = BRSTEP;
301 regs->msr |= 0x400; 315 xmon_enable_sstep(regs);
302 } else { 316 } else {
303 xmon(regs); 317 xmon(regs);
304 } 318 }
@@ -385,7 +399,7 @@ insert_bpts(void)
385 } 399 }
386 store_inst((void *) bp->address); 400 store_inst((void *) bp->address);
387 } 401 }
388#if !defined(CONFIG_8xx) 402#if ! (defined(CONFIG_8xx) || defined(CONFIG_4xx))
389 if (dabr.enabled) 403 if (dabr.enabled)
390 set_dabr(dabr.address); 404 set_dabr(dabr.address);
391 if (iabr.enabled) 405 if (iabr.enabled)
@@ -400,7 +414,7 @@ remove_bpts(void)
400 struct bpt *bp; 414 struct bpt *bp;
401 unsigned instr; 415 unsigned instr;
402 416
403#if !defined(CONFIG_8xx) 417#if ! (defined(CONFIG_8xx) || defined(CONFIG_4xx))
404 set_dabr(0); 418 set_dabr(0);
405 set_iabr(0); 419 set_iabr(0);
406#endif 420#endif
@@ -677,7 +691,7 @@ bpt_cmds(void)
677 691
678 cmd = inchar(); 692 cmd = inchar();
679 switch (cmd) { 693 switch (cmd) {
680#if !defined(CONFIG_8xx) 694#if ! (defined(CONFIG_8xx) || defined(CONFIG_4xx))
681 case 'd': 695 case 'd':
682 mode = 7; 696 mode = 7;
683 cmd = inchar(); 697 cmd = inchar();