Merge branch 'next/cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc

* 'next/cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc: (133 commits)
  ARM: EXYNOS4: Change devname for FIMD clkdev
  ARM: S3C64XX: Cleanup mach/regs-fb.h from mach-s3c64xx
  ARM: S5PV210: Cleanup mach/regs-fb.h from mach-s5pv210
  ARM: S5PC100: Cleanup mach/regs-fb.h from mach-s5pc100
  ARM: S3C24XX: Use generic s3c_set_platdata for devices
  ARM: S3C64XX: Use generic s3c_set_platdata for OneNAND
  ARM: SAMSUNG: Use generic s3c_set_platdata for NAND
  ARM: SAMSUNG: Use generic s3c_set_platdata for USB OHCI
  ARM: SAMSUNG: Use generic s3c_set_platdata for HWMON
  ARM: SAMSUNG: Use generic s3c_set_platdata for FB
  ARM: SAMSUNG: Use generic s3c_set_platdata for TS
  ARM: S3C64XX: Add PWM backlight support on SMDK6410
  ARM: S5P64X0: Add PWM backlight support on SMDK6450
  ARM: S5P64X0: Add PWM backlight support on SMDK6440
  ARM: S5PC100: Add PWM backlight support on SMDKC100
  ARM: S5PV210: Add PWM backlight support on SMDKV210
  ARM: EXYNOS4: Add PWM backlight support on SMDKC210
  ARM: EXYNOS4: Add PWM backlight support on SMDKV310
  ARM: SAMSUNG: Create a common infrastructure for PWM backlight support
  clocksource: convert 32-bit down counting clocksource on S5PV210/S5P64X0
  ...

Fix up trivial conflict in arch/arm/mach-imx/mach-scb9328.c

219 files changed, 4681 insertions, 8099 deletions

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 83a7aa2ca57a..ebaa380fde29 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -686,6 +686,7 @@ config ARCH_S3C2410
         select GENERIC_GPIO
         select ARCH_HAS_CPUFREQ
         select HAVE_CLK
+        select CLKDEV_LOOKUP
         select ARCH_USES_GETTIMEOFFSET
         select HAVE_S3C2410_I2C if I2C
         help
@@ -703,6 +704,7 @@ config ARCH_S3C64XX
         select CPU_V6
         select ARM_VIC
         select HAVE_CLK
+        select CLKDEV_LOOKUP
         select NO_IOPORT
         select ARCH_USES_GETTIMEOFFSET
         select ARCH_HAS_CPUFREQ
@@ -727,6 +729,8 @@ config ARCH_S5P64X0
         select CPU_V6
         select GENERIC_GPIO
         select HAVE_CLK
+        select CLKDEV_LOOKUP
+        select CLKSRC_MMIO
         select HAVE_S3C2410_WATCHDOG if WATCHDOG
         select GENERIC_CLOCKEVENTS
         select HAVE_SCHED_CLOCK
@@ -740,6 +744,7 @@ config ARCH_S5PC100
         bool "Samsung S5PC100"
         select GENERIC_GPIO
         select HAVE_CLK
+        select CLKDEV_LOOKUP
         select CPU_V7
         select ARM_L1_CACHE_SHIFT_6
         select ARCH_USES_GETTIMEOFFSET
@@ -755,6 +760,8 @@ config ARCH_S5PV210
         select ARCH_SPARSEMEM_ENABLE
         select GENERIC_GPIO
         select HAVE_CLK
+        select CLKDEV_LOOKUP
+        select CLKSRC_MMIO
         select ARM_L1_CACHE_SHIFT_6
         select ARCH_HAS_CPUFREQ
         select GENERIC_CLOCKEVENTS
@@ -771,6 +778,7 @@ config ARCH_EXYNOS4
         select ARCH_SPARSEMEM_ENABLE
         select GENERIC_GPIO
         select HAVE_CLK
+        select CLKDEV_LOOKUP
         select ARCH_HAS_CPUFREQ
         select GENERIC_CLOCKEVENTS
         select HAVE_S3C_RTC if RTC_CLASS
@@ -856,6 +864,7 @@ config ARCH_OMAP
         select HAVE_CLK
         select ARCH_REQUIRE_GPIOLIB
         select ARCH_HAS_CPUFREQ
+        select CLKSRC_MMIO
         select GENERIC_CLOCKEVENTS
         select HAVE_SCHED_CLOCK
         select ARCH_HAS_HOLES_MEMORYMODEL
diff --git a/arch/arm/configs/cm_x300_defconfig b/arch/arm/configs/cm_x300_defconfig
index 921e56a7572c..f4b767256f95 100644
--- a/arch/arm/configs/cm_x300_defconfig
+++ b/arch/arm/configs/cm_x300_defconfig
@@ -5,7 +5,6 @@ CONFIG_SYSVIPC=y
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=18
-CONFIG_SYSFS_DEPRECATED_V2=y
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
 CONFIG_MODULES=y
@@ -13,6 +12,7 @@ CONFIG_MODULE_UNLOAD=y
 CONFIG_MODULE_FORCE_UNLOAD=y
 # CONFIG_BLK_DEV_BSG is not set
 CONFIG_ARCH_PXA=y
+CONFIG_GPIO_PCA953X=y
 CONFIG_MACH_CM_X300=y
 CONFIG_NO_HZ=y
 CONFIG_AEABI=y
@@ -23,7 +23,6 @@ CONFIG_CMDLINE="root=/dev/mtdblock5 rootfstype=ubifs console=ttyS2,38400"
 CONFIG_CPU_FREQ=y
 CONFIG_CPU_FREQ_GOV_USERSPACE=y
 CONFIG_FPE_NWFPE=y
-CONFIG_PM=y
 CONFIG_APM_EMULATION=y
 CONFIG_NET=y
 CONFIG_PACKET=y
@@ -40,8 +39,8 @@ CONFIG_IP_PNP_RARP=y
 # CONFIG_INET_DIAG is not set
 # CONFIG_IPV6 is not set
 CONFIG_BT=m
-CONFIG_BT_L2CAP=m
-CONFIG_BT_SCO=m
+CONFIG_BT_L2CAP=y
+CONFIG_BT_SCO=y
 CONFIG_BT_RFCOMM=m
 CONFIG_BT_RFCOMM_TTY=y
 CONFIG_BT_BNEP=m
@@ -60,7 +59,6 @@ CONFIG_MTD_NAND_PXA3xx=y
 CONFIG_MTD_UBI=y
 CONFIG_BLK_DEV_LOOP=y
 CONFIG_BLK_DEV_RAM=y
-# CONFIG_MISC_DEVICES is not set
 CONFIG_SCSI=y
 CONFIG_BLK_DEV_SD=y
 CONFIG_NETDEVICES=y
@@ -81,16 +79,15 @@ CONFIG_TOUCHSCREEN_WM97XX=m
 # CONFIG_TOUCHSCREEN_WM9705 is not set
 # CONFIG_TOUCHSCREEN_WM9713 is not set
 # CONFIG_SERIO is not set
+# CONFIG_LEGACY_PTYS is not set
 CONFIG_SERIAL_PXA=y
 CONFIG_SERIAL_PXA_CONSOLE=y
-# CONFIG_LEGACY_PTYS is not set
 # CONFIG_HW_RANDOM is not set
 CONFIG_I2C=y
 CONFIG_I2C_PXA=y
 CONFIG_SPI=y
 CONFIG_SPI_GPIO=y
 CONFIG_GPIO_SYSFS=y
-CONFIG_GPIO_PCA953X=y
 # CONFIG_HWMON is not set
 CONFIG_PMIC_DA903X=y
 CONFIG_REGULATOR=y
@@ -102,7 +99,6 @@ CONFIG_LCD_CLASS_DEVICE=y
 CONFIG_LCD_TDO24M=y
 # CONFIG_BACKLIGHT_GENERIC is not set
 CONFIG_BACKLIGHT_DA903X=m
-# CONFIG_VGA_CONSOLE is not set
 CONFIG_FRAMEBUFFER_CONSOLE=y
 CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
 CONFIG_FONTS=y
@@ -131,7 +127,6 @@ CONFIG_HID_GREENASIA=y
 CONFIG_HID_SMARTJOYPLUS=y
 CONFIG_HID_TOPSEED=y
 CONFIG_HID_THRUSTMASTER=y
-CONFIG_HID_WACOM=m
 CONFIG_HID_ZEROPLUS=y
 CONFIG_USB=y
 CONFIG_USB_DEVICEFS=y
@@ -152,7 +147,6 @@ CONFIG_RTC_DRV_PXA=y
 CONFIG_EXT2_FS=y
 CONFIG_EXT3_FS=y
 # CONFIG_EXT3_FS_XATTR is not set
-CONFIG_INOTIFY=y
 CONFIG_MSDOS_FS=m
 CONFIG_VFAT_FS=m
 CONFIG_TMPFS=y
@@ -164,7 +158,6 @@ CONFIG_NFS_V3=y
 CONFIG_NFS_V3_ACL=y
 CONFIG_NFS_V4=y
 CONFIG_ROOT_NFS=y
-CONFIG_SMB_FS=m
 CONFIG_CIFS=m
 CONFIG_CIFS_WEAK_PW_HASH=y
 CONFIG_PARTITION_ADVANCED=y
@@ -172,9 +165,7 @@ CONFIG_NLS_CODEPAGE_437=m
 CONFIG_NLS_ISO8859_1=m
 CONFIG_DEBUG_FS=y
 CONFIG_DEBUG_KERNEL=y
-# CONFIG_DETECT_SOFTLOCKUP is not set
 # CONFIG_SCHED_DEBUG is not set
-# CONFIG_RCU_CPU_STALL_DETECTOR is not set
 CONFIG_SYSCTL_SYSCALL_CHECK=y
 # CONFIG_FTRACE is not set
 CONFIG_DEBUG_USER=y
@@ -182,7 +173,6 @@ CONFIG_DEBUG_LL=y
 CONFIG_CRYPTO_ECB=m
 CONFIG_CRYPTO_MICHAEL_MIC=m
 CONFIG_CRYPTO_AES=m
-CONFIG_CRYPTO_ARC4=m
 # CONFIG_CRYPTO_ANSI_CPRNG is not set
 # CONFIG_CRYPTO_HW is not set
 CONFIG_CRC_T10DIF=y
diff --git a/arch/arm/include/asm/hardware/scoop.h b/arch/arm/include/asm/hardware/scoop.h
index ebb3ceaa8fac..58cdf5d84122 100644
--- a/arch/arm/include/asm/hardware/scoop.h
+++ b/arch/arm/include/asm/hardware/scoop.h
@@ -61,7 +61,6 @@ struct scoop_pcmcia_dev {
 struct scoop_pcmcia_config {
         struct scoop_pcmcia_dev *devs;
         int num_devs;
-        void (*pcmcia_init)(void);
         void (*power_ctrl)(struct device *scoop, unsigned short cpr, int nr);
 };
 
diff --git a/arch/arm/mach-davinci/board-dm646x-evm.c b/arch/arm/mach-davinci/board-dm646x-evm.c
index 6d03643b9bd1..993a3146fd35 100644
--- a/arch/arm/mach-davinci/board-dm646x-evm.c
+++ b/arch/arm/mach-davinci/board-dm646x-evm.c
@@ -719,9 +719,15 @@ static void __init cdce_clk_init(void)
         }
 }
 
+#define DM6467T_EVM_REF_FREQ            33000000
+
 static void __init davinci_map_io(void)
 {
         dm646x_init();
+
+        if (machine_is_davinci_dm6467tevm())
+                davinci_set_refclk_rate(DM6467T_EVM_REF_FREQ);
+
         cdce_clk_init();
 }
 
@@ -785,17 +791,6 @@ static __init void evm_init(void)
         soc_info->emac_pdata->phy_id = DM646X_EVM_PHY_ID;
 }
 
-#define DM646X_EVM_REF_FREQ             27000000
-#define DM6467T_EVM_REF_FREQ            33000000
-
-void __init dm646x_board_setup_refclk(struct clk *clk)
-{
-        if (machine_is_davinci_dm6467tevm())
-                clk->rate = DM6467T_EVM_REF_FREQ;
-        else
-                clk->rate = DM646X_EVM_REF_FREQ;
-}
-
 MACHINE_START(DAVINCI_DM6467_EVM, "DaVinci DM646x EVM")
         .boot_params  = (0x80000100),
         .map_io       = davinci_map_io,
diff --git a/arch/arm/mach-davinci/clock.c b/arch/arm/mach-davinci/clock.c
index e4e3af179f02..ae653194b645 100644
--- a/arch/arm/mach-davinci/clock.c
+++ b/arch/arm/mach-davinci/clock.c
@@ -368,6 +368,12 @@ static unsigned long clk_leafclk_recalc(struct clk *clk)
         return clk->parent->rate;
 }
 
+int davinci_simple_set_rate(struct clk *clk, unsigned long rate)
+{
+        clk->rate = rate;
+        return 0;
+}
+
 static unsigned long clk_pllclk_recalc(struct clk *clk)
 {
         u32 ctrl, mult = 1, prediv = 1, postdiv = 1;
@@ -506,6 +512,38 @@ int davinci_set_pllrate(struct pll_data *pll, unsigned int prediv,
 }
 EXPORT_SYMBOL(davinci_set_pllrate);
 
+/**
+ * davinci_set_refclk_rate() - Set the reference clock rate
+ * @rate:       The new rate.
+ *
+ * Sets the reference clock rate to a given value. This will most likely
+ * result in the entire clock tree getting updated.
+ *
+ * This is used to support boards which use a reference clock different
+ * than that used by default in <soc>.c file. The reference clock rate
+ * should be updated early in the boot process; ideally soon after the
+ * clock tree has been initialized once with the default reference clock
+ * rate (davinci_common_init()).
+ *
+ * Returns 0 on success, error otherwise.
+ */
+int davinci_set_refclk_rate(unsigned long rate)
+{
+        struct clk *refclk;
+
+        refclk = clk_get(NULL, "ref");
+        if (IS_ERR(refclk)) {
+                pr_err("%s: failed to get reference clock.\n", __func__);
+                return PTR_ERR(refclk);
+        }
+
+        clk_set_rate(refclk, rate);
+
+        clk_put(refclk);
+
+        return 0;
+}
+
 int __init davinci_clk_init(struct clk_lookup *clocks)
   {
         struct clk_lookup *c;
diff --git a/arch/arm/mach-davinci/clock.h b/arch/arm/mach-davinci/clock.h
index 0dd22031ec62..50b2482e0ba2 100644
--- a/arch/arm/mach-davinci/clock.h
+++ b/arch/arm/mach-davinci/clock.h
@@ -123,6 +123,8 @@ int davinci_clk_init(struct clk_lookup *clocks);
 int davinci_set_pllrate(struct pll_data *pll, unsigned int prediv,
                                 unsigned int mult, unsigned int postdiv);
 int davinci_set_sysclk_rate(struct clk *clk, unsigned long rate);
+int davinci_set_refclk_rate(unsigned long rate);
+int davinci_simple_set_rate(struct clk *clk, unsigned long rate);
 
 extern struct platform_device davinci_wdt_device;
 extern void davinci_watchdog_reset(struct platform_device *);
diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c
index e00d61e2efbe..1802e711a2b8 100644
--- a/arch/arm/mach-davinci/dm646x.c
+++ b/arch/arm/mach-davinci/dm646x.c
@@ -43,6 +43,7 @@
 /*
  * Device specific clocks
  */
+#define DM646X_REF_FREQ         27000000
 #define DM646X_AUX_FREQ         24000000
 
 static struct pll_data pll1_data = {
@@ -57,6 +58,8 @@ static struct pll_data pll2_data = {
 
 static struct clk ref_clk = {
         .name = "ref_clk",
+        .rate = DM646X_REF_FREQ,
+        .set_rate = davinci_simple_set_rate,
 };
 
 static struct clk aux_clkin = {
@@ -902,7 +905,6 @@ int __init dm646x_init_edma(struct edma_rsv_info *rsv)
 
 void __init dm646x_init(void)
 {
-        dm646x_board_setup_refclk(&ref_clk);
         davinci_common_init(&davinci_soc_info_dm646x);
 }
 
diff --git a/arch/arm/mach-davinci/include/mach/dm646x.h b/arch/arm/mach-davinci/include/mach/dm646x.h
index 7a27f3f13913..2a00fe5ac253 100644
--- a/arch/arm/mach-davinci/include/mach/dm646x.h
+++ b/arch/arm/mach-davinci/include/mach/dm646x.h
@@ -15,7 +15,6 @@
 #include <mach/asp.h>
 #include <linux/i2c.h>
 #include <linux/videodev2.h>
-#include <linux/clk.h>
 #include <linux/davinci_emac.h>
 
 #define DM646X_EMAC_BASE                (0x01C80000)
@@ -31,7 +30,6 @@
 void __init dm646x_init(void);
 void __init dm646x_init_mcasp0(struct snd_platform_data *pdata);
 void __init dm646x_init_mcasp1(struct snd_platform_data *pdata);
-void __init dm646x_board_setup_refclk(struct clk *clk);
 int __init dm646x_init_edma(struct edma_rsv_info *rsv);
 
 void dm646x_video_init(void);
diff --git a/arch/arm/mach-davinci/include/mach/psc.h b/arch/arm/mach-davinci/include/mach/psc.h
index a47e6f29206e..1110fdd77ba4 100644
--- a/arch/arm/mach-davinci/include/mach/psc.h
+++ b/arch/arm/mach-davinci/include/mach/psc.h
@@ -30,47 +30,47 @@
 #define DAVINCI_PWR_SLEEP_CNTRL_BASE    0x01C41000
 
 /* Power and Sleep Controller (PSC) Domains */
-#define DAVINCI_GPSC_ARMDOMAIN      0
-#define DAVINCI_GPSC_DSPDOMAIN      1
+#define DAVINCI_GPSC_ARMDOMAIN          0
+#define DAVINCI_GPSC_DSPDOMAIN          1
 
-#define DAVINCI_LPSC_VPSSMSTR       0
-#define DAVINCI_LPSC_VPSSSLV        1
-#define DAVINCI_LPSC_TPCC           2
-#define DAVINCI_LPSC_TPTC0          3
-#define DAVINCI_LPSC_TPTC1          4
-#define DAVINCI_LPSC_EMAC           5
-#define DAVINCI_LPSC_EMAC_WRAPPER   6
-#define DAVINCI_LPSC_USB            9
-#define DAVINCI_LPSC_ATA            10
-#define DAVINCI_LPSC_VLYNQ          11
-#define DAVINCI_LPSC_UHPI           12
-#define DAVINCI_LPSC_DDR_EMIF       13
-#define DAVINCI_LPSC_AEMIF          14
-#define DAVINCI_LPSC_MMC_SD         15
-#define DAVINCI_LPSC_McBSP          17
-#define DAVINCI_LPSC_I2C            18
-#define DAVINCI_LPSC_UART0          19
-#define DAVINCI_LPSC_UART1          20
-#define DAVINCI_LPSC_UART2          21
-#define DAVINCI_LPSC_SPI            22
-#define DAVINCI_LPSC_PWM0           23
-#define DAVINCI_LPSC_PWM1           24
-#define DAVINCI_LPSC_PWM2           25
-#define DAVINCI_LPSC_GPIO           26
-#define DAVINCI_LPSC_TIMER0         27
-#define DAVINCI_LPSC_TIMER1         28
-#define DAVINCI_LPSC_TIMER2         29
-#define DAVINCI_LPSC_SYSTEM_SUBSYS  30
-#define DAVINCI_LPSC_ARM            31
-#define DAVINCI_LPSC_SCR2           32
-#define DAVINCI_LPSC_SCR3           33
-#define DAVINCI_LPSC_SCR4           34
-#define DAVINCI_LPSC_CROSSBAR       35
-#define DAVINCI_LPSC_CFG27          36
-#define DAVINCI_LPSC_CFG3           37
-#define DAVINCI_LPSC_CFG5           38
-#define DAVINCI_LPSC_GEM            39
-#define DAVINCI_LPSC_IMCOP          40
+#define DAVINCI_LPSC_VPSSMSTR           0
+#define DAVINCI_LPSC_VPSSSLV            1
+#define DAVINCI_LPSC_TPCC               2
+#define DAVINCI_LPSC_TPTC0              3
+#define DAVINCI_LPSC_TPTC1              4
+#define DAVINCI_LPSC_EMAC               5
+#define DAVINCI_LPSC_EMAC_WRAPPER       6
+#define DAVINCI_LPSC_USB                9
+#define DAVINCI_LPSC_ATA                10
+#define DAVINCI_LPSC_VLYNQ              11
+#define DAVINCI_LPSC_UHPI               12
+#define DAVINCI_LPSC_DDR_EMIF           13
+#define DAVINCI_LPSC_AEMIF              14
+#define DAVINCI_LPSC_MMC_SD             15
+#define DAVINCI_LPSC_McBSP              17
+#define DAVINCI_LPSC_I2C                18
+#define DAVINCI_LPSC_UART0              19
+#define DAVINCI_LPSC_UART1              20
+#define DAVINCI_LPSC_UART2              21
+#define DAVINCI_LPSC_SPI                22
+#define DAVINCI_LPSC_PWM0               23
+#define DAVINCI_LPSC_PWM1               24
+#define DAVINCI_LPSC_PWM2               25
+#define DAVINCI_LPSC_GPIO               26
+#define DAVINCI_LPSC_TIMER0             27
+#define DAVINCI_LPSC_TIMER1             28
+#define DAVINCI_LPSC_TIMER2             29
+#define DAVINCI_LPSC_SYSTEM_SUBSYS      30
+#define DAVINCI_LPSC_ARM                31
+#define DAVINCI_LPSC_SCR2               32
+#define DAVINCI_LPSC_SCR3               33
+#define DAVINCI_LPSC_SCR4               34
+#define DAVINCI_LPSC_CROSSBAR           35
+#define DAVINCI_LPSC_CFG27              36
+#define DAVINCI_LPSC_CFG3               37
+#define DAVINCI_LPSC_CFG5               38
+#define DAVINCI_LPSC_GEM                39
+#define DAVINCI_LPSC_IMCOP              40
 
 #define DM355_LPSC_TIMER3               5
 #define DM355_LPSC_SPI1                 6
@@ -102,39 +102,39 @@
 /*
  * LPSC Assignments
  */
-#define DM646X_LPSC_ARM            0
-#define DM646X_LPSC_C64X_CPU       1
-#define DM646X_LPSC_HDVICP0        2
-#define DM646X_LPSC_HDVICP1        3
-#define DM646X_LPSC_TPCC           4
-#define DM646X_LPSC_TPTC0          5
-#define DM646X_LPSC_TPTC1          6
-#define DM646X_LPSC_TPTC2          7
-#define DM646X_LPSC_TPTC3          8
-#define DM646X_LPSC_PCI            13
-#define DM646X_LPSC_EMAC           14
-#define DM646X_LPSC_VDCE           15
-#define DM646X_LPSC_VPSSMSTR       16
-#define DM646X_LPSC_VPSSSLV        17
-#define DM646X_LPSC_TSIF0          18
-#define DM646X_LPSC_TSIF1          19
-#define DM646X_LPSC_DDR_EMIF       20
-#define DM646X_LPSC_AEMIF          21
-#define DM646X_LPSC_McASP0         22
-#define DM646X_LPSC_McASP1         23
-#define DM646X_LPSC_CRGEN0         24
-#define DM646X_LPSC_CRGEN1         25
-#define DM646X_LPSC_UART0          26
-#define DM646X_LPSC_UART1          27
-#define DM646X_LPSC_UART2          28
-#define DM646X_LPSC_PWM0           29
-#define DM646X_LPSC_PWM1           30
-#define DM646X_LPSC_I2C            31
-#define DM646X_LPSC_SPI            32
-#define DM646X_LPSC_GPIO           33
-#define DM646X_LPSC_TIMER0         34
-#define DM646X_LPSC_TIMER1         35
-#define DM646X_LPSC_ARM_INTC       45
+#define DM646X_LPSC_ARM         0
+#define DM646X_LPSC_C64X_CPU    1
+#define DM646X_LPSC_HDVICP0     2
+#define DM646X_LPSC_HDVICP1     3
+#define DM646X_LPSC_TPCC        4
+#define DM646X_LPSC_TPTC0       5
+#define DM646X_LPSC_TPTC1       6
+#define DM646X_LPSC_TPTC2       7
+#define DM646X_LPSC_TPTC3       8
+#define DM646X_LPSC_PCI         13
+#define DM646X_LPSC_EMAC        14
+#define DM646X_LPSC_VDCE        15
+#define DM646X_LPSC_VPSSMSTR    16
+#define DM646X_LPSC_VPSSSLV     17
+#define DM646X_LPSC_TSIF0       18
+#define DM646X_LPSC_TSIF1       19
+#define DM646X_LPSC_DDR_EMIF    20
+#define DM646X_LPSC_AEMIF       21
+#define DM646X_LPSC_McASP0      22
+#define DM646X_LPSC_McASP1      23
+#define DM646X_LPSC_CRGEN0      24
+#define DM646X_LPSC_CRGEN1      25
+#define DM646X_LPSC_UART0       26
+#define DM646X_LPSC_UART1       27
+#define DM646X_LPSC_UART2       28
+#define DM646X_LPSC_PWM0        29
+#define DM646X_LPSC_PWM1        30
+#define DM646X_LPSC_I2C         31
+#define DM646X_LPSC_SPI         32
+#define DM646X_LPSC_GPIO        33
+#define DM646X_LPSC_TIMER0      34
+#define DM646X_LPSC_TIMER1      35
+#define DM646X_LPSC_ARM_INTC    45
 
 /* PSC0 defines */
 #define DA8XX_LPSC0_TPCC                0
@@ -243,7 +243,7 @@
 #define PSC_STATE_DISABLE       2
 #define PSC_STATE_ENABLE        3
 
-#define MDSTAT_STATE_MASK 0x1f
+#define MDSTAT_STATE_MASK       0x1f
 
 #ifndef __ASSEMBLER__
 
diff --git a/arch/arm/mach-exynos4/Kconfig b/arch/arm/mach-exynos4/Kconfig
index 1435fc31c4b2..ae433a052df6 100644
--- a/arch/arm/mach-exynos4/Kconfig
+++ b/arch/arm/mach-exynos4/Kconfig
@@ -110,6 +110,8 @@ config MACH_SMDKC210
         select S3C_DEV_HSMMC1
         select S3C_DEV_HSMMC2
         select S3C_DEV_HSMMC3
+        select SAMSUNG_DEV_PWM
+        select SAMSUNG_DEV_BACKLIGHT
         select EXYNOS4_DEV_PD
         select EXYNOS4_DEV_SYSMMU
         select EXYNOS4_SETUP_I2C1
@@ -127,8 +129,10 @@ config MACH_SMDKV310
         select S3C_DEV_HSMMC1
         select S3C_DEV_HSMMC2
         select S3C_DEV_HSMMC3
+        select SAMSUNG_DEV_BACKLIGHT
         select SAMSUNG_DEV_KEYPAD
         select EXYNOS4_DEV_PD
+        select SAMSUNG_DEV_PWM
         select EXYNOS4_DEV_SYSMMU
         select EXYNOS4_SETUP_I2C1
         select EXYNOS4_SETUP_KEYPAD
diff --git a/arch/arm/mach-exynos4/clock.c b/arch/arm/mach-exynos4/clock.c
index 871f9d508fde..66494f28bbef 100644
--- a/arch/arm/mach-exynos4/clock.c
+++ b/arch/arm/mach-exynos4/clock.c
@@ -27,24 +27,20 @@
 
 static struct clk clk_sclk_hdmi27m = {
         .name           = "sclk_hdmi27m",
-        .id             = -1,
         .rate           = 27000000,
 };
 
 static struct clk clk_sclk_hdmiphy = {
         .name           = "sclk_hdmiphy",
-        .id             = -1,
 };
 
 static struct clk clk_sclk_usbphy0 = {
         .name           = "sclk_usbphy0",
-        .id             = -1,
         .rate           = 27000000,
 };
 
 static struct clk clk_sclk_usbphy1 = {
         .name           = "sclk_usbphy1",
-        .id             = -1,
 };
 
 static int exynos4_clksrc_mask_top_ctrl(struct clk *clk, int enable)
@@ -132,7 +128,6 @@ static int exynos4_clk_ip_perir_ctrl(struct clk *clk, int enable)
 static struct clksrc_clk clk_mout_apll = {
         .clk    = {
                 .name           = "mout_apll",
-                .id             = -1,
         },
         .sources        = &clk_src_apll,
         .reg_src        = { .reg = S5P_CLKSRC_CPU, .shift = 0, .size = 1 },
@@ -141,7 +136,6 @@ static struct clksrc_clk clk_mout_apll = {
 static struct clksrc_clk clk_sclk_apll = {
         .clk    = {
                 .name           = "sclk_apll",
-                .id             = -1,
                 .parent         = &clk_mout_apll.clk,
         },
         .reg_div        = { .reg = S5P_CLKDIV_CPU, .shift = 24, .size = 3 },
@@ -150,7 +144,6 @@ static struct clksrc_clk clk_sclk_apll = {
 static struct clksrc_clk clk_mout_epll = {
         .clk    = {
                 .name           = "mout_epll",
-                .id             = -1,
         },
         .sources        = &clk_src_epll,
         .reg_src        = { .reg = S5P_CLKSRC_TOP0, .shift = 4, .size = 1 },
@@ -159,7 +152,6 @@ static struct clksrc_clk clk_mout_epll = {
 static struct clksrc_clk clk_mout_mpll = {
         .clk = {
                 .name           = "mout_mpll",
-                .id             = -1,
         },
         .sources        = &clk_src_mpll,
         .reg_src        = { .reg = S5P_CLKSRC_CPU, .shift = 8, .size = 1 },
@@ -178,7 +170,6 @@ static struct clksrc_sources clkset_moutcore = {
 static struct clksrc_clk clk_moutcore = {
         .clk    = {
                 .name           = "moutcore",
-                .id             = -1,
         },
         .sources        = &clkset_moutcore,
         .reg_src        = { .reg = S5P_CLKSRC_CPU, .shift = 16, .size = 1 },
@@ -187,7 +178,6 @@ static struct clksrc_clk clk_moutcore = {
 static struct clksrc_clk clk_coreclk = {
         .clk    = {
                 .name           = "core_clk",
-                .id             = -1,
                 .parent         = &clk_moutcore.clk,
         },
         .reg_div        = { .reg = S5P_CLKDIV_CPU, .shift = 0, .size = 3 },
@@ -196,7 +186,6 @@ static struct clksrc_clk clk_coreclk = {
 static struct clksrc_clk clk_armclk = {
         .clk    = {
                 .name           = "armclk",
-                .id             = -1,
                 .parent         = &clk_coreclk.clk,
         },
 };
@@ -204,7 +193,6 @@ static struct clksrc_clk clk_armclk = {
 static struct clksrc_clk clk_aclk_corem0 = {
         .clk    = {
                 .name           = "aclk_corem0",
-                .id             = -1,
                 .parent         = &clk_coreclk.clk,
         },
         .reg_div        = { .reg = S5P_CLKDIV_CPU, .shift = 4, .size = 3 },
@@ -213,7 +201,6 @@ static struct clksrc_clk clk_aclk_corem0 = {
 static struct clksrc_clk clk_aclk_cores = {
         .clk    = {
                 .name           = "aclk_cores",
-                .id             = -1,
                 .parent         = &clk_coreclk.clk,
         },
         .reg_div        = { .reg = S5P_CLKDIV_CPU, .shift = 4, .size = 3 },
@@ -222,7 +209,6 @@ static struct clksrc_clk clk_aclk_cores = {
 static struct clksrc_clk clk_aclk_corem1 = {
         .clk    = {
                 .name           = "aclk_corem1",
-                .id             = -1,
                 .parent         = &clk_coreclk.clk,
         },
         .reg_div        = { .reg = S5P_CLKDIV_CPU, .shift = 8, .size = 3 },
@@ -231,7 +217,6 @@ static struct clksrc_clk clk_aclk_corem1 = {
 static struct clksrc_clk clk_periphclk = {
         .clk    = {
                 .name           = "periphclk",
-                .id             = -1,
                 .parent         = &clk_coreclk.clk,
         },
         .reg_div        = { .reg = S5P_CLKDIV_CPU, .shift = 12, .size = 3 },
@@ -252,7 +237,6 @@ static struct clksrc_sources clkset_mout_corebus = {
 static struct clksrc_clk clk_mout_corebus = {
         .clk    = {
                 .name           = "mout_corebus",
-                .id             = -1,
         },
         .sources        = &clkset_mout_corebus,
         .reg_src        = { .reg = S5P_CLKSRC_DMC, .shift = 4, .size = 1 },
@@ -261,7 +245,6 @@ static struct clksrc_clk clk_mout_corebus = {
 static struct clksrc_clk clk_sclk_dmc = {
         .clk    = {
                 .name           = "sclk_dmc",
-                .id             = -1,
                 .parent         = &clk_mout_corebus.clk,
         },
         .reg_div        = { .reg = S5P_CLKDIV_DMC0, .shift = 12, .size = 3 },
@@ -270,7 +253,6 @@ static struct clksrc_clk clk_sclk_dmc = {
 static struct clksrc_clk clk_aclk_cored = {
         .clk    = {
                 .name           = "aclk_cored",
-                .id             = -1,
                 .parent         = &clk_sclk_dmc.clk,
         },
         .reg_div        = { .reg = S5P_CLKDIV_DMC0, .shift = 16, .size = 3 },
@@ -279,7 +261,6 @@ static struct clksrc_clk clk_aclk_cored = {
 static struct clksrc_clk clk_aclk_corep = {
         .clk    = {
                 .name           = "aclk_corep",
-                .id             = -1,
                 .parent         = &clk_aclk_cored.clk,
         },
         .reg_div        = { .reg = S5P_CLKDIV_DMC0, .shift = 20, .size = 3 },
@@ -288,7 +269,6 @@ static struct clksrc_clk clk_aclk_corep = {
 static struct clksrc_clk clk_aclk_acp = {
         .clk    = {
                 .name           = "aclk_acp",
-                .id             = -1,
                 .parent         = &clk_mout_corebus.clk,
         },
         .reg_div        = { .reg = S5P_CLKDIV_DMC0, .shift = 0, .size = 3 },
@@ -297,7 +277,6 @@ static struct clksrc_clk clk_aclk_acp = {
 static struct clksrc_clk clk_pclk_acp = {
         .clk    = {
                 .name           = "pclk_acp",
-                .id             = -1,
                 .parent         = &clk_aclk_acp.clk,
         },
         .reg_div        = { .reg = S5P_CLKDIV_DMC0, .shift = 4, .size = 3 },
@@ -318,7 +297,6 @@ static struct clksrc_sources clkset_aclk = {
 static struct clksrc_clk clk_aclk_200 = {
         .clk    = {
                 .name           = "aclk_200",
-                .id             = -1,
         },
         .sources        = &clkset_aclk,
         .reg_src        = { .reg = S5P_CLKSRC_TOP0, .shift = 12, .size = 1 },
@@ -328,7 +306,6 @@ static struct clksrc_clk clk_aclk_200 = {
 static struct clksrc_clk clk_aclk_100 = {
         .clk    = {
                 .name           = "aclk_100",
-                .id             = -1,
         },
         .sources        = &clkset_aclk,
         .reg_src        = { .reg = S5P_CLKSRC_TOP0, .shift = 16, .size = 1 },
@@ -338,7 +315,6 @@ static struct clksrc_clk clk_aclk_100 = {
 static struct clksrc_clk clk_aclk_160 = {
         .clk    = {
                 .name           = "aclk_160",
-                .id             = -1,
         },
         .sources        = &clkset_aclk,
         .reg_src        = { .reg = S5P_CLKSRC_TOP0, .shift = 20, .size = 1 },
@@ -348,7 +324,6 @@ static struct clksrc_clk clk_aclk_160 = {
 static struct clksrc_clk clk_aclk_133 = {
         .clk    = {
                 .name           = "aclk_133",
-                .id             = -1,
         },
         .sources        = &clkset_aclk,
         .reg_src        = { .reg = S5P_CLKSRC_TOP0, .shift = 24, .size = 1 },
@@ -368,7 +343,6 @@ static struct clksrc_sources clkset_vpllsrc = {
 static struct clksrc_clk clk_vpllsrc = {
         .clk    = {
                 .name           = "vpll_src",
-                .id             = -1,
                 .enable         = exynos4_clksrc_mask_top_ctrl,
                 .ctrlbit        = (1 << 0),
         },
@@ -389,7 +363,6 @@ static struct clksrc_sources clkset_sclk_vpll = {
 static struct clksrc_clk clk_sclk_vpll = {
         .clk    = {
                 .name           = "sclk_vpll",
-                .id             = -1,
         },
         .sources        = &clkset_sclk_vpll,
         .reg_src        = { .reg = S5P_CLKSRC_TOP0, .shift = 8, .size = 1 },
@@ -398,161 +371,151 @@ static struct clksrc_clk clk_sclk_vpll = {
 static struct clk init_clocks_off[] = {
         {
                 .name           = "timers",
-                .id             = -1,
                 .parent         = &clk_aclk_100.clk,
                 .enable         = exynos4_clk_ip_peril_ctrl,
                 .ctrlbit        = (1<<24),
         }, {
                 .name           = "csis",
-                .id             = 0,
+                .devname        = "s5p-mipi-csis.0",
                 .enable         = exynos4_clk_ip_cam_ctrl,
                 .ctrlbit        = (1 << 4),
         }, {
                 .name           = "csis",
-                .id             = 1,
+                .devname        = "s5p-mipi-csis.1",
                 .enable         = exynos4_clk_ip_cam_ctrl,
                 .ctrlbit        = (1 << 5),
         }, {
                 .name           = "fimc",
-                .id             = 0,
+                .devname        = "exynos4-fimc.0",
                 .enable         = exynos4_clk_ip_cam_ctrl,
                 .ctrlbit        = (1 << 0),
         }, {
                 .name           = "fimc",
-                .id             = 1,
+                .devname        = "exynos4-fimc.1",
                 .enable         = exynos4_clk_ip_cam_ctrl,
                 .ctrlbit        = (1 << 1),
         }, {
                 .name           = "fimc",
-                .id             = 2,
+                .devname        = "exynos4-fimc.2",
                 .enable         = exynos4_clk_ip_cam_ctrl,
                 .ctrlbit        = (1 << 2),
         }, {
                 .name           = "fimc",
-                .id             = 3,
+                .devname        = "exynos4-fimc.3",
                 .enable         = exynos4_clk_ip_cam_ctrl,
                 .ctrlbit        = (1 << 3),
         }, {
                 .name           = "fimd",
-                .id             = 0,
+                .devname        = "exynos4-fb.0",
                 .enable         = exynos4_clk_ip_lcd0_ctrl,
                 .ctrlbit        = (1 << 0),
         }, {
                 .name           = "fimd",
-                .id             = 1,
+                .devname        = "exynos4-fb.1",
                 .enable         = exynos4_clk_ip_lcd1_ctrl,
                 .ctrlbit        = (1 << 0),
         }, {
                 .name           = "sataphy",
-                .id             = -1,
                 .parent         = &clk_aclk_133.clk,
                 .enable         = exynos4_clk_ip_fsys_ctrl,
                 .ctrlbit        = (1 << 3),
         }, {
                 .name           = "hsmmc",
-                .id             = 0,
+                .devname        = "s3c-sdhci.0",
                 .parent         = &clk_aclk_133.clk,
                 .enable         = exynos4_clk_ip_fsys_ctrl,
                 .ctrlbit        = (1 << 5),
         }, {
                 .name           = "hsmmc",
-                .id             = 1,
+                .devname        = "s3c-sdhci.1",
                 .parent         = &clk_aclk_133.clk,
                 .enable         = exynos4_clk_ip_fsys_ctrl,
                 .ctrlbit        = (1 << 6),
         }, {
                 .name           = "hsmmc",
-                .id             = 2,
+                .devname        = "s3c-sdhci.2",
                 .parent         = &clk_aclk_133.clk,
                 .enable         = exynos4_clk_ip_fsys_ctrl,
                 .ctrlbit        = (1 << 7),
         }, {
                 .name           = "hsmmc",
-                .id             = 3,
+                .devname        = "s3c-sdhci.3",
                 .parent         = &clk_aclk_133.clk,
                 .enable         = exynos4_clk_ip_fsys_ctrl,
                 .ctrlbit        = (1 << 8),
         }, {
-                .name           = "hsmmc",
-                .id             = 4,
+                .name           = "dwmmc",
                 .parent         = &clk_aclk_133.clk,
                 .enable         = exynos4_clk_ip_fsys_ctrl,
                 .ctrlbit        = (1 << 9),
         }, {
                 .name           = "sata",
-                .id             = -1,
                 .parent         = &clk_aclk_133.clk,
                 .enable         = exynos4_clk_ip_fsys_ctrl,
                 .ctrlbit        = (1 << 10),
         }, {
                 .name           = "pdma",
-                .id             = 0,
+                .devname        = "s3c-pl330.0",
                 .enable         = exynos4_clk_ip_fsys_ctrl,
                 .ctrlbit        = (1 << 0),
         }, {
                 .name           = "pdma",
-                .id             = 1,
+                .devname        = "s3c-pl330.1",
                 .enable         = exynos4_clk_ip_fsys_ctrl,
                 .ctrlbit        = (1 << 1),
         }, {
                 .name           = "adc",
-                .id             = -1,
                 .enable         = exynos4_clk_ip_peril_ctrl,
                 .ctrlbit        = (1 << 15),
         }, {
                 .name           = "keypad",
-                .id             = -1,
                 .enable         = exynos4_clk_ip_perir_ctrl,
                 .ctrlbit        = (1 << 16),
         }, {
                 .name           = "rtc",
-                .id             = -1,
                 .enable         = exynos4_clk_ip_perir_ctrl,
                 .ctrlbit        = (1 << 15),
         }, {
                 .name           = "watchdog",
-                .id             = -1,
                 .parent         = &clk_aclk_100.clk,
                 .enable         = exynos4_clk_ip_perir_ctrl,
                 .ctrlbit        = (1 << 14),
         }, {
                 .name           = "usbhost",
-                .id             = -1,
                 .enable         = exynos4_clk_ip_fsys_ctrl ,
                 .ctrlbit        = (1 << 12),
         }, {
                 .name           = "otg",
-                .id             = -1,
                 .enable         = exynos4_clk_ip_fsys_ctrl,
                 .ctrlbit        = (1 << 13),
         }, {
                 .name           = "spi",
-                .id             = 0,
+                .devname        = "s3c64xx-spi.0",
                 .enable         = exynos4_clk_ip_peril_ctrl,
                 .ctrlbit        = (1 << 16),
         }, {
                 .name           = "spi",
-                .id             = 1,
+                .devname        = "s3c64xx-spi.1",
                 .enable         = exynos4_clk_ip_peril_ctrl,
                 .ctrlbit        = (1 << 17),
         }, {
                 .name           = "spi",
-                .id             = 2,
+                .devname        = "s3c64xx-spi.2",
                 .enable         = exynos4_clk_ip_peril_ctrl,
                 .ctrlbit        = (1 << 18),
         }, {
                 .name           = "iis",
-                .id             = 0,
+                .devname        = "samsung-i2s.0",
                 .enable         = exynos4_clk_ip_peril_ctrl,
                 .ctrlbit        = (1 << 19),
         }, {
                 .name           = "iis",
-                .id             = 1,
+                .devname        = "samsung-i2s.1",
                 .enable         = exynos4_clk_ip_peril_ctrl,
                 .ctrlbit        = (1 << 20),
         }, {
                 .name           = "iis",
-                .id             = 2,
+                .devname        = "samsung-i2s.2",
                 .enable         = exynos4_clk_ip_peril_ctrl,
                 .ctrlbit        = (1 << 21),
         }, {
@@ -562,125 +525,110 @@ static struct clk init_clocks_off[] = {
                 .ctrlbit        = (1 << 27),
         }, {
                 .name           = "fimg2d",
-                .id             = -1,
                 .enable         = exynos4_clk_ip_image_ctrl,
                 .ctrlbit        = (1 << 0),
         }, {
                 .name           = "i2c",
-                .id             = 0,
+                .devname        = "s3c2440-i2c.0",
                 .parent         = &clk_aclk_100.clk,
                 .enable         = exynos4_clk_ip_peril_ctrl,
                 .ctrlbit        = (1 << 6),
         }, {
                 .name           = "i2c",
-                .id             = 1,
+                .devname        = "s3c2440-i2c.1",
                 .parent         = &clk_aclk_100.clk,
                 .enable         = exynos4_clk_ip_peril_ctrl,
                 .ctrlbit        = (1 << 7),
         }, {
                 .name           = "i2c",
-                .id             = 2,
+                .devname        = "s3c2440-i2c.2",
                 .parent         = &clk_aclk_100.clk,
                 .enable         = exynos4_clk_ip_peril_ctrl,
                 .ctrlbit        = (1 << 8),
         }, {
                 .name           = "i2c",
-                .id             = 3,
+                .devname        = "s3c2440-i2c.3",
                 .parent         = &clk_aclk_100.clk,
                 .enable         = exynos4_clk_ip_peril_ctrl,
                 .ctrlbit        = (1 << 9),
         }, {
                 .name           = "i2c",
-                .id             = 4,
+                .devname        = "s3c2440-i2c.4",
                 .parent         = &clk_aclk_100.clk,
                 .enable         = exynos4_clk_ip_peril_ctrl,
                 .ctrlbit        = (1 << 10),
         }, {
                 .name           = "i2c",
-                .id             = 5,
+                .devname        = "s3c2440-i2c.5",
                 .parent         = &clk_aclk_100.clk,
                 .enable         = exynos4_clk_ip_peril_ctrl,
                 .ctrlbit        = (1 << 11),
         }, {
                 .name           = "i2c",
-                .id             = 6,
+                .devname        = "s3c2440-i2c.6",
                 .parent         = &clk_aclk_100.clk,
                 .enable         = exynos4_clk_ip_peril_ctrl,
                 .ctrlbit        = (1 << 12),
         }, {
                 .name           = "i2c",
-                .id             = 7,
+                .devname        = "s3c2440-i2c.7",
                 .parent         = &clk_aclk_100.clk,
                 .enable         = exynos4_clk_ip_peril_ctrl,
                 .ctrlbit        = (1 << 13),
         }, {
                 .name           = "SYSMMU_MDMA",
-                .id             = -1,
                 .enable         = exynos4_clk_ip_image_ctrl,
                 .ctrlbit        = (1 << 5),
         }, {
                 .name           = "SYSMMU_FIMC0",
-                .id             = -1,
                 .enable         = exynos4_clk_ip_cam_ctrl,
                 .ctrlbit        = (1 << 7),
         }, {
                 .name           = "SYSMMU_FIMC1",
-                .id             = -1,
                 .enable         = exynos4_clk_ip_cam_ctrl,
                 .ctrlbit        = (1 << 8),
         }, {
                 .name           = "SYSMMU_FIMC2",
-                .id             = -1,
                 .enable         = exynos4_clk_ip_cam_ctrl,
                 .ctrlbit        = (1 << 9),
         }, {
                 .name           = "SYSMMU_FIMC3",
-                .id             = -1,
                 .enable         = exynos4_clk_ip_cam_ctrl,
                 .ctrlbit        = (1 << 10),
         }, {
                 .name           = "SYSMMU_JPEG",
-                .id             = -1,
                 .enable         = exynos4_clk_ip_cam_ctrl,
                 .ctrlbit        = (1 << 11),
         }, {
                 .name           = "SYSMMU_FIMD0",
-                .id             = -1,
                 .enable         = exynos4_clk_ip_lcd0_ctrl,
                 .ctrlbit        = (1 << 4),
         }, {
                 .name           = "SYSMMU_FIMD1",
-                .id             = -1,
                 .enable         = exynos4_clk_ip_lcd1_ctrl,
                 .ctrlbit        = (1 << 4),
         }, {
                 .name           = "SYSMMU_PCIe",
-                .id             = -1,
                 .enable         = exynos4_clk_ip_fsys_ctrl,
                 .ctrlbit        = (1 << 18),
         }, {
                 .name           = "SYSMMU_G2D",
-                .id             = -1,
                 .enable         = exynos4_clk_ip_image_ctrl,
                 .ctrlbit        = (1 << 3),
         }, {
                 .name           = "SYSMMU_ROTATOR",
-                .id             = -1,
                 .enable         = exynos4_clk_ip_image_ctrl,
                 .ctrlbit        = (1 << 4),
         }, {
                 .name           = "SYSMMU_TV",
-                .id             = -1,
                 .enable         = exynos4_clk_ip_tv_ctrl,
                 .ctrlbit        = (1 << 4),
         }, {
                 .name           = "SYSMMU_MFC_L",
-                .id             = -1,
                 .enable         = exynos4_clk_ip_mfc_ctrl,
                 .ctrlbit        = (1 << 1),
         }, {
                 .name           = "SYSMMU_MFC_R",
-                .id             = -1,
                 .enable         = exynos4_clk_ip_mfc_ctrl,
                 .ctrlbit        = (1 << 2),
         }
@@ -689,32 +637,32 @@ static struct clk init_clocks_off[] = {
 static struct clk init_clocks[] = {
         {
                 .name           = "uart",
-                .id             = 0,
+                .devname        = "s5pv210-uart.0",
                 .enable         = exynos4_clk_ip_peril_ctrl,
                 .ctrlbit        = (1 << 0),
         }, {
                 .name           = "uart",
-                .id             = 1,
+                .devname        = "s5pv210-uart.1",
                 .enable         = exynos4_clk_ip_peril_ctrl,
                 .ctrlbit        = (1 << 1),
         }, {
                 .name           = "uart",
-                .id             = 2,
+                .devname        = "s5pv210-uart.2",
                 .enable         = exynos4_clk_ip_peril_ctrl,
                 .ctrlbit        = (1 << 2),
         }, {
                 .name           = "uart",
-                .id             = 3,
+                .devname        = "s5pv210-uart.3",
                 .enable         = exynos4_clk_ip_peril_ctrl,
                 .ctrlbit        = (1 << 3),
         }, {
                 .name           = "uart",
-                .id             = 4,
+                .devname        = "s5pv210-uart.4",
                 .enable         = exynos4_clk_ip_peril_ctrl,
                 .ctrlbit        = (1 << 4),
         }, {
                 .name           = "uart",
-                .id             = 5,
+                .devname        = "s5pv210-uart.5",
                 .enable         = exynos4_clk_ip_peril_ctrl,
                 .ctrlbit        = (1 << 5),
         }
@@ -750,7 +698,6 @@ static struct clksrc_sources clkset_mout_g2d0 = {
 static struct clksrc_clk clk_mout_g2d0 = {
         .clk    = {
                 .name           = "mout_g2d0",
-                .id             = -1,
         },
         .sources        = &clkset_mout_g2d0,
         .reg_src        = { .reg = S5P_CLKSRC_IMAGE, .shift = 0, .size = 1 },
@@ -769,7 +716,6 @@ static struct clksrc_sources clkset_mout_g2d1 = {
 static struct clksrc_clk clk_mout_g2d1 = {
         .clk    = {
                 .name           = "mout_g2d1",
-                .id             = -1,
         },
         .sources        = &clkset_mout_g2d1,
         .reg_src        = { .reg = S5P_CLKSRC_IMAGE, .shift = 4, .size = 1 },
@@ -788,7 +734,6 @@ static struct clksrc_sources clkset_mout_g2d = {
 static struct clksrc_clk clk_dout_mmc0 = {
         .clk            = {
                 .name           = "dout_mmc0",
-                .id             = -1,
         },
         .sources = &clkset_group,
         .reg_src = { .reg = S5P_CLKSRC_FSYS, .shift = 0, .size = 4 },
@@ -798,7 +743,6 @@ static struct clksrc_clk clk_dout_mmc0 = {
 static struct clksrc_clk clk_dout_mmc1 = {
         .clk            = {
                 .name           = "dout_mmc1",
-                .id             = -1,
         },
         .sources = &clkset_group,
         .reg_src = { .reg = S5P_CLKSRC_FSYS, .shift = 4, .size = 4 },
@@ -808,7 +752,6 @@ static struct clksrc_clk clk_dout_mmc1 = {
 static struct clksrc_clk clk_dout_mmc2 = {
         .clk            = {
                 .name           = "dout_mmc2",
-                .id             = -1,
         },
         .sources = &clkset_group,
         .reg_src = { .reg = S5P_CLKSRC_FSYS, .shift = 8, .size = 4 },
@@ -818,7 +761,6 @@ static struct clksrc_clk clk_dout_mmc2 = {
 static struct clksrc_clk clk_dout_mmc3 = {
         .clk            = {
                 .name           = "dout_mmc3",
-                .id             = -1,
         },
         .sources = &clkset_group,
         .reg_src = { .reg = S5P_CLKSRC_FSYS, .shift = 12, .size = 4 },
@@ -828,7 +770,6 @@ static struct clksrc_clk clk_dout_mmc3 = {
 static struct clksrc_clk clk_dout_mmc4 = {
         .clk            = {
                 .name           = "dout_mmc4",
-                .id             = -1,
         },
         .sources = &clkset_group,
         .reg_src = { .reg = S5P_CLKSRC_FSYS, .shift = 16, .size = 4 },
@@ -839,7 +780,7 @@ static struct clksrc_clk clksrcs[] = {
         {
                 .clk    = {
                         .name           = "uclk1",
-                        .id             = 0,
+                        .devname        = "s5pv210-uart.0",
                         .enable         = exynos4_clksrc_mask_peril0_ctrl,
                         .ctrlbit        = (1 << 0),
                 },
@@ -849,7 +790,7 @@ static struct clksrc_clk clksrcs[] = {
         }, {
                 .clk            = {
                         .name           = "uclk1",
-                        .id             = 1,
+                        .devname        = "s5pv210-uart.1",
                         .enable         = exynos4_clksrc_mask_peril0_ctrl,
                         .ctrlbit        = (1 << 4),
                 },
@@ -859,7 +800,7 @@ static struct clksrc_clk clksrcs[] = {
         }, {
                 .clk            = {
                         .name           = "uclk1",
-                        .id             = 2,
+                        .devname        = "s5pv210-uart.2",
                         .enable         = exynos4_clksrc_mask_peril0_ctrl,
                         .ctrlbit        = (1 << 8),
                 },
@@ -869,7 +810,7 @@ static struct clksrc_clk clksrcs[] = {
         }, {
                 .clk            = {
                         .name           = "uclk1",
-                        .id             = 3,
+                        .devname        = "s5pv210-uart.3",
                         .enable         = exynos4_clksrc_mask_peril0_ctrl,
                         .ctrlbit        = (1 << 12),
                 },
@@ -879,7 +820,6 @@ static struct clksrc_clk clksrcs[] = {
         }, {
                 .clk            = {
                         .name           = "sclk_pwm",
-                        .id             = -1,
                         .enable         = exynos4_clksrc_mask_peril0_ctrl,
                         .ctrlbit        = (1 << 24),
                 },
@@ -889,7 +829,7 @@ static struct clksrc_clk clksrcs[] = {
         }, {
                 .clk            = {
                         .name           = "sclk_csis",
-                        .id             = 0,
+                        .devname        = "s5p-mipi-csis.0",
                         .enable         = exynos4_clksrc_mask_cam_ctrl,
                         .ctrlbit        = (1 << 24),
                 },
@@ -899,7 +839,7 @@ static struct clksrc_clk clksrcs[] = {
         }, {
                 .clk            = {
                         .name           = "sclk_csis",
-                        .id             = 1,
+                        .devname        = "s5p-mipi-csis.1",
                         .enable         = exynos4_clksrc_mask_cam_ctrl,
                         .ctrlbit        = (1 << 28),
                 },
@@ -909,7 +849,7 @@ static struct clksrc_clk clksrcs[] = {
         }, {
                 .clk            = {
                         .name           = "sclk_cam",
-                        .id             = 0,
+                        .devname        = "exynos4-fimc.0",
                         .enable         = exynos4_clksrc_mask_cam_ctrl,
                         .ctrlbit        = (1 << 16),
                 },
@@ -919,7 +859,7 @@ static struct clksrc_clk clksrcs[] = {
         }, {
                 .clk            = {
                         .name           = "sclk_cam",
-                        .id             = 1,
+                        .devname        = "exynos4-fimc.1",
                         .enable         = exynos4_clksrc_mask_cam_ctrl,
                         .ctrlbit        = (1 << 20),
                 },
@@ -929,7 +869,7 @@ static struct clksrc_clk clksrcs[] = {
         }, {
                 .clk            = {
                         .name           = "sclk_fimc",
-                        .id             = 0,
+                        .devname        = "exynos4-fimc.0",
                         .enable         = exynos4_clksrc_mask_cam_ctrl,
                         .ctrlbit        = (1 << 0),
                 },
@@ -939,7 +879,7 @@ static struct clksrc_clk clksrcs[] = {
         }, {
                 .clk            = {
                         .name           = "sclk_fimc",
-                        .id             = 1,
+                        .devname        = "exynos4-fimc.1",
                         .enable         = exynos4_clksrc_mask_cam_ctrl,
                         .ctrlbit        = (1 << 4),
                 },
@@ -949,7 +889,7 @@ static struct clksrc_clk clksrcs[] = {
         }, {
                 .clk            = {
                         .name           = "sclk_fimc",
-                        .id             = 2,
+                        .devname        = "exynos4-fimc.2",
                         .enable         = exynos4_clksrc_mask_cam_ctrl,
                         .ctrlbit        = (1 << 8),
                 },
@@ -959,7 +899,7 @@ static struct clksrc_clk clksrcs[] = {
         }, {
                 .clk            = {
                         .name           = "sclk_fimc",
-                        .id             = 3,
+                        .devname        = "exynos4-fimc.3",
                         .enable         = exynos4_clksrc_mask_cam_ctrl,
                         .ctrlbit        = (1 << 12),
                 },
@@ -969,7 +909,7 @@ static struct clksrc_clk clksrcs[] = {
         }, {
                 .clk            = {
                         .name           = "sclk_fimd",
-                        .id             = 0,
+                        .devname        = "exynos4-fb.0",
                         .enable         = exynos4_clksrc_mask_lcd0_ctrl,
                         .ctrlbit        = (1 << 0),
                 },
@@ -979,7 +919,7 @@ static struct clksrc_clk clksrcs[] = {
         }, {
                 .clk            = {
                         .name           = "sclk_fimd",
-                        .id             = 1,
+                        .devname        = "exynos4-fb.1",
                         .enable         = exynos4_clksrc_mask_lcd1_ctrl,
                         .ctrlbit        = (1 << 0),
                 },
@@ -989,7 +929,6 @@ static struct clksrc_clk clksrcs[] = {
         }, {
                 .clk            = {
                         .name           = "sclk_sata",
-                        .id             = -1,
                         .enable         = exynos4_clksrc_mask_fsys_ctrl,
                         .ctrlbit        = (1 << 24),
                 },
@@ -999,7 +938,7 @@ static struct clksrc_clk clksrcs[] = {
         }, {
                 .clk            = {
                         .name           = "sclk_spi",
-                        .id             = 0,
+                        .devname        = "s3c64xx-spi.0",
                         .enable         = exynos4_clksrc_mask_peril1_ctrl,
                         .ctrlbit        = (1 << 16),
                 },
@@ -1009,7 +948,7 @@ static struct clksrc_clk clksrcs[] = {
         }, {
                 .clk            = {
                         .name           = "sclk_spi",
-                        .id             = 1,
+                        .devname        = "s3c64xx-spi.1",
                         .enable         = exynos4_clksrc_mask_peril1_ctrl,
                         .ctrlbit        = (1 << 20),
                 },
@@ -1019,7 +958,7 @@ static struct clksrc_clk clksrcs[] = {
         }, {
                 .clk            = {
                         .name           = "sclk_spi",
-                        .id             = 2,
+                        .devname        = "s3c64xx-spi.2",
                         .enable         = exynos4_clksrc_mask_peril1_ctrl,
                         .ctrlbit        = (1 << 24),
                 },
@@ -1029,7 +968,6 @@ static struct clksrc_clk clksrcs[] = {
         }, {
                 .clk            = {
                         .name           = "sclk_fimg2d",
-                        .id             = -1,
                 },
                 .sources = &clkset_mout_g2d,
                 .reg_src = { .reg = S5P_CLKSRC_IMAGE, .shift = 8, .size = 1 },
@@ -1037,7 +975,7 @@ static struct clksrc_clk clksrcs[] = {
         }, {
                 .clk            = {
                         .name           = "sclk_mmc",
-                        .id             = 0,
+                        .devname        = "s3c-sdhci.0",
                         .parent         = &clk_dout_mmc0.clk,
                         .enable         = exynos4_clksrc_mask_fsys_ctrl,
                         .ctrlbit        = (1 << 0),
@@ -1046,7 +984,7 @@ static struct clksrc_clk clksrcs[] = {
         }, {
                 .clk            = {
                         .name           = "sclk_mmc",
-                        .id             = 1,
+                        .devname        = "s3c-sdhci.1",
                         .parent         = &clk_dout_mmc1.clk,
                         .enable         = exynos4_clksrc_mask_fsys_ctrl,
                         .ctrlbit        = (1 << 4),
@@ -1055,7 +993,7 @@ static struct clksrc_clk clksrcs[] = {
         }, {
                 .clk            = {
                         .name           = "sclk_mmc",
-                        .id             = 2,
+                        .devname        = "s3c-sdhci.2",
                         .parent         = &clk_dout_mmc2.clk,
                         .enable         = exynos4_clksrc_mask_fsys_ctrl,
                         .ctrlbit        = (1 << 8),
@@ -1064,7 +1002,7 @@ static struct clksrc_clk clksrcs[] = {
         }, {
                 .clk            = {
                         .name           = "sclk_mmc",
-                        .id             = 3,
+                        .devname        = "s3c-sdhci.3",
                         .parent         = &clk_dout_mmc3.clk,
                         .enable         = exynos4_clksrc_mask_fsys_ctrl,
                         .ctrlbit        = (1 << 12),
@@ -1072,8 +1010,7 @@ static struct clksrc_clk clksrcs[] = {
                 .reg_div = { .reg = S5P_CLKDIV_FSYS2, .shift = 24, .size = 8 },
         }, {
                 .clk            = {
-                        .name           = "sclk_mmc",
-                        .id             = 4,
+                        .name           = "sclk_dwmmc",
                         .parent         = &clk_dout_mmc4.clk,
                         .enable         = exynos4_clksrc_mask_fsys_ctrl,
                         .ctrlbit        = (1 << 16),
diff --git a/arch/arm/mach-exynos4/include/mach/clkdev.h b/arch/arm/mach-exynos4/include/mach/clkdev.h
new file mode 100644
index 000000000000..7dffa83d23ff
--- /dev/null
+++ b/arch/arm/mach-exynos4/include/mach/clkdev.h
@@ -0,0 +1,7 @@
+#ifndef __MACH_CLKDEV_H__
+#define __MACH_CLKDEV_H__
+
+#define __clk_get(clk) ({ 1; })
+#define __clk_put(clk) do {} while (0)
+
+#endif
diff --git a/arch/arm/mach-exynos4/mach-smdkc210.c b/arch/arm/mach-exynos4/mach-smdkc210.c
index e645f7a955f0..f606ea75bf43 100644
--- a/arch/arm/mach-exynos4/mach-smdkc210.c
+++ b/arch/arm/mach-exynos4/mach-smdkc210.c
@@ -15,6 +15,7 @@
 #include <linux/smsc911x.h>
 #include <linux/io.h>
 #include <linux/i2c.h>
+#include <linux/pwm_backlight.h>
 
 #include <asm/mach/arch.h>
 #include <asm/mach-types.h>
@@ -27,6 +28,8 @@
 #include <plat/sdhci.h>
 #include <plat/iic.h>
 #include <plat/pd.h>
+#include <plat/gpio-cfg.h>
+#include <plat/backlight.h>
 
 #include <mach/map.h>
 
@@ -191,6 +194,17 @@ static void __init smdkc210_smsc911x_init(void)
                      (0x1 << S5P_SROM_BCX__TACS__SHIFT), S5P_SROM_BC1);
 }
 
+/* LCD Backlight data */
+static struct samsung_bl_gpio_info smdkc210_bl_gpio_info = {
+        .no = EXYNOS4_GPD0(1),
+        .func = S3C_GPIO_SFN(2),
+};
+
+static struct platform_pwm_backlight_data smdkc210_bl_data = {
+        .pwm_id = 1,
+        .pwm_period_ns  = 1000,
+};
+
 static void __init smdkc210_map_io(void)
 {
         s5p_init_io(NULL, 0, S5P_VA_CHIPID);
@@ -210,6 +224,8 @@ static void __init smdkc210_machine_init(void)
         s3c_sdhci2_set_platdata(&smdkc210_hsmmc2_pdata);
         s3c_sdhci3_set_platdata(&smdkc210_hsmmc3_pdata);
 
+        samsung_bl_set(&smdkc210_bl_gpio_info, &smdkc210_bl_data);
+
         platform_add_devices(smdkc210_devices, ARRAY_SIZE(smdkc210_devices));
 }
 
diff --git a/arch/arm/mach-exynos4/mach-smdkv310.c b/arch/arm/mach-exynos4/mach-smdkv310.c
index edd814110da8..df1107828abd 100644
--- a/arch/arm/mach-exynos4/mach-smdkv310.c
+++ b/arch/arm/mach-exynos4/mach-smdkv310.c
@@ -16,6 +16,7 @@
 #include <linux/io.h>
 #include <linux/i2c.h>
 #include <linux/input.h>
+#include <linux/pwm_backlight.h>
 
 #include <asm/mach/arch.h>
 #include <asm/mach-types.h>
@@ -29,6 +30,8 @@
 #include <plat/sdhci.h>
 #include <plat/iic.h>
 #include <plat/pd.h>
+#include <plat/gpio-cfg.h>
+#include <plat/backlight.h>
 
 #include <mach/map.h>
 
@@ -209,6 +212,17 @@ static void __init smdkv310_smsc911x_init(void)
                      (0x1 << S5P_SROM_BCX__TACS__SHIFT), S5P_SROM_BC1);
 }
 
+/* LCD Backlight data */
+static struct samsung_bl_gpio_info smdkv310_bl_gpio_info = {
+        .no = EXYNOS4_GPD0(1),
+        .func = S3C_GPIO_SFN(2),
+};
+
+static struct platform_pwm_backlight_data smdkv310_bl_data = {
+        .pwm_id = 1,
+        .pwm_period_ns  = 1000,
+};
+
 static void __init smdkv310_map_io(void)
 {
         s5p_init_io(NULL, 0, S5P_VA_CHIPID);
@@ -230,6 +244,8 @@ static void __init smdkv310_machine_init(void)
 
         samsung_keypad_set_platdata(&smdkv310_keypad_data);
 
+        samsung_bl_set(&smdkv310_bl_gpio_info, &smdkv310_bl_data);
+
         platform_add_devices(smdkv310_devices, ARRAY_SIZE(smdkv310_devices));
 }
 
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index 59c97a331136..e8dd22fa7d61 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -167,6 +167,7 @@ config MACH_EUKREA_MBIMXSD25_BASEBOARD
         bool "Eukrea MBIMXSD development board"
         select IMX_HAVE_PLATFORM_GPIO_KEYS
         select IMX_HAVE_PLATFORM_IMX_SSI
+        select LEDS_GPIO_REGISTER
         help
           This adds board specific devices that can be found on Eukrea's
           MBIMXSD evaluation board.
@@ -265,6 +266,7 @@ config MACH_EUKREA_MBIMX27_BASEBOARD
         select IMX_HAVE_PLATFORM_IMX_UART
         select IMX_HAVE_PLATFORM_MXC_MMC
         select IMX_HAVE_PLATFORM_SPI_IMX
+        select LEDS_GPIO_REGISTER
         help
           This adds board specific devices that can be found on Eukrea's
           MBIMX27 evaluation board.
@@ -403,6 +405,7 @@ config MACH_MX31LITE
         select IMX_HAVE_PLATFORM_MXC_NAND
         select IMX_HAVE_PLATFORM_MXC_RTC
         select IMX_HAVE_PLATFORM_SPI_IMX
+        select LEDS_GPIO_REGISTER
         help
           Include support for MX31 LITEKIT platform. This includes specific
           configurations for the board and its peripherals.
@@ -471,6 +474,7 @@ config MACH_MX31MOBOARD
         select IMX_HAVE_PLATFORM_MXC_EHCI
         select IMX_HAVE_PLATFORM_MXC_MMC
         select IMX_HAVE_PLATFORM_SPI_IMX
+        select LEDS_GPIO_REGISTER
         select MXC_ULPI if USB_ULPI
         help
           Include support for mx31moboard platform. This includes specific
@@ -577,6 +581,7 @@ config MACH_EUKREA_MBIMXSD35_BASEBOARD
         select IMX_HAVE_PLATFORM_GPIO_KEYS
         select IMX_HAVE_PLATFORM_IMX_SSI
         select IMX_HAVE_PLATFORM_IPU_CORE
+        select LEDS_GPIO_REGISTER
         help
           This adds board specific devices that can be found on Eukrea's
           MBIMXSD evaluation board.
diff --git a/arch/arm/mach-imx/dma-v1.c b/arch/arm/mach-imx/dma-v1.c
index f8aa5be0eb15..42afc29a7da8 100644
--- a/arch/arm/mach-imx/dma-v1.c
+++ b/arch/arm/mach-imx/dma-v1.c
@@ -476,7 +476,6 @@ void imx_dma_enable(int channel)
         imx_dmav1_writel(imx_dmav1_readl(DMA_CCR(channel)) | CCR_CEN |
                 CCR_ACRPT, DMA_CCR(channel));
 
-#ifdef CONFIG_ARCH_MX2
         if ((cpu_is_mx21() || cpu_is_mx27()) &&
                         imxdma->sg && imx_dma_hw_chain(imxdma)) {
                 imxdma->sg = sg_next(imxdma->sg);
@@ -488,7 +487,6 @@ void imx_dma_enable(int channel)
                                 DMA_CCR(channel));
                 }
         }
-#endif
         imxdma->in_use = 1;
 
         local_irq_restore(flags);
@@ -519,7 +517,6 @@ void imx_dma_disable(int channel)
 }
 EXPORT_SYMBOL(imx_dma_disable);
 
-#ifdef CONFIG_ARCH_MX2
 static void imx_dma_watchdog(unsigned long chno)
 {
         struct imx_dma_channel *imxdma = &imx_dma_channels[chno];
@@ -531,7 +528,6 @@ static void imx_dma_watchdog(unsigned long chno)
         if (imxdma->err_handler)
                 imxdma->err_handler(chno, imxdma->data, IMX_DMA_ERR_TIMEOUT);
 }
-#endif
 
 static irqreturn_t dma_err_handler(int irq, void *dev_id)
 {
@@ -655,10 +651,8 @@ static irqreturn_t dma_irq_handler(int irq, void *dev_id)
 {
         int i, disr;
 
-#ifdef CONFIG_ARCH_MX2
         if (cpu_is_mx21() || cpu_is_mx27())
                 dma_err_handler(irq, dev_id);
-#endif
 
         disr = imx_dmav1_readl(DMA_DISR);
 
@@ -704,7 +698,6 @@ int imx_dma_request(int channel, const char *name)
         imxdma->name = name;
         local_irq_restore(flags); /* request_irq() can block */
 
-#ifdef CONFIG_ARCH_MX2
         if (cpu_is_mx21() || cpu_is_mx27()) {
                 ret = request_irq(MX2x_INT_DMACH0 + channel,
                                 dma_irq_handler, 0, "DMA", NULL);
@@ -718,7 +711,6 @@ int imx_dma_request(int channel, const char *name)
                 imxdma->watchdog.function = &imx_dma_watchdog;
                 imxdma->watchdog.data = channel;
         }
-#endif
 
         return ret;
 }
@@ -745,10 +737,8 @@ void imx_dma_free(int channel)
         imx_dma_disable(channel);
         imxdma->name = NULL;
 
-#ifdef CONFIG_ARCH_MX2
         if (cpu_is_mx21() || cpu_is_mx27())
                 free_irq(MX2x_INT_DMACH0 + channel, NULL);
-#endif
 
         local_irq_restore(flags);
 }
@@ -804,21 +794,13 @@ static int __init imx_dma_init(void)
         int ret = 0;
         int i;
 
-#ifdef CONFIG_ARCH_MX1
         if (cpu_is_mx1())
                 imx_dmav1_baseaddr = MX1_IO_ADDRESS(MX1_DMA_BASE_ADDR);
-        else
-#endif
-#ifdef CONFIG_MACH_MX21
-        if (cpu_is_mx21())
+        else if (cpu_is_mx21())
                 imx_dmav1_baseaddr = MX21_IO_ADDRESS(MX21_DMA_BASE_ADDR);
-        else
-#endif
-#ifdef CONFIG_MACH_MX27
-        if (cpu_is_mx27())
+        else if (cpu_is_mx27())
                 imx_dmav1_baseaddr = MX27_IO_ADDRESS(MX27_DMA_BASE_ADDR);
         else
-#endif
                 return 0;
 
         dma_clk = clk_get(NULL, "dma");
@@ -829,7 +811,6 @@ static int __init imx_dma_init(void)
         /* reset DMA module */
         imx_dmav1_writel(DCR_DRST, DMA_DCR);
 
-#ifdef CONFIG_ARCH_MX1
         if (cpu_is_mx1()) {
                 ret = request_irq(MX1_DMA_INT, dma_irq_handler, 0, "DMA", NULL);
                 if (ret) {
@@ -844,7 +825,7 @@ static int __init imx_dma_init(void)
                         return ret;
                 }
         }
-#endif
+
         /* enable DMA module */
         imx_dmav1_writel(DCR_DEN, DMA_DCR);
 
diff --git a/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c b/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c
index 5911281da5f5..5db3e1463af7 100644
--- a/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c
+++ b/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c
@@ -112,7 +112,7 @@ eukrea_mbimx27_keymap_data __initconst = {
         .keymap_size    = ARRAY_SIZE(eukrea_mbimx27_keymap),
 };
 
-static struct gpio_led gpio_leds[] = {
+static const struct gpio_led eukrea_mbimx27_gpio_leds[] __initconst = {
         {
                 .name                   = "led1",
                 .default_trigger        = "heartbeat",
@@ -127,17 +127,10 @@ static struct gpio_led gpio_leds[] = {
         },
 };
 
-static struct gpio_led_platform_data gpio_led_info = {
-        .leds           = gpio_leds,
-        .num_leds       = ARRAY_SIZE(gpio_leds),
-};
-
-static struct platform_device leds_gpio = {
-        .name   = "leds-gpio",
-        .id     = -1,
-        .dev    = {
-                .platform_data  = &gpio_led_info,
-        },
+static const struct gpio_led_platform_data
+                eukrea_mbimx27_gpio_led_info __initconst = {
+        .leds           = eukrea_mbimx27_gpio_leds,
+        .num_leds       = ARRAY_SIZE(eukrea_mbimx27_gpio_leds),
 };
 
 static struct imx_fb_videomode eukrea_mbimx27_modes[] = {
@@ -293,10 +286,6 @@ static struct i2c_board_info eukrea_mbimx27_i2c_devices[] = {
         },
 };
 
-static struct platform_device *platform_devices[] __initdata = {
-        &leds_gpio,
-};
-
 static const struct imxmmc_platform_data sdhc_pdata __initconst = {
         .dat3_card_detect = 1,
 };
@@ -377,5 +366,5 @@ void __init eukrea_mbimx27_baseboard_init(void)
 
         imx27_add_imx_keypad(&eukrea_mbimx27_keymap_data);
 
-        platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
+        gpio_led_register_device(-1, &eukrea_mbimx27_gpio_led_info);
 }
diff --git a/arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c b/arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c
index f9ef04acdab1..01ebcb31e482 100644
--- a/arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c
+++ b/arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c
@@ -173,7 +173,7 @@ static struct platform_device eukrea_mbimxsd_lcd_powerdev = {
         .dev.platform_data      = &eukrea_mbimxsd_lcd_power_data,
 };
 
-static struct gpio_led eukrea_mbimxsd_leds[] = {
+static const struct gpio_led eukrea_mbimxsd_leds[] __initconst = {
         {
                 .name                   = "led1",
                 .default_trigger        = "heartbeat",
@@ -182,19 +182,12 @@ static struct gpio_led eukrea_mbimxsd_leds[] = {
         },
 };
 
-static struct gpio_led_platform_data eukrea_mbimxsd_led_info = {
+static const struct gpio_led_platform_data
+                eukrea_mbimxsd_led_info __initconst = {
         .leds           = eukrea_mbimxsd_leds,
         .num_leds       = ARRAY_SIZE(eukrea_mbimxsd_leds),
 };
 
-static struct platform_device eukrea_mbimxsd_leds_gpio = {
-        .name   = "leds-gpio",
-        .id     = -1,
-        .dev    = {
-                .platform_data  = &eukrea_mbimxsd_led_info,
-        },
-};
-
 static struct gpio_keys_button eukrea_mbimxsd_gpio_buttons[] = {
         {
                 .gpio           = GPIO_SWITCH1,
@@ -212,7 +205,6 @@ static const struct gpio_keys_platform_data
 };
 
 static struct platform_device *platform_devices[] __initdata = {
-        &eukrea_mbimxsd_leds_gpio,
         &eukrea_mbimxsd_lcd_powerdev,
 };
 
@@ -287,5 +279,6 @@ void __init eukrea_mbimxsd25_baseboard_init(void)
                                 ARRAY_SIZE(eukrea_mbimxsd_i2c_devices));
 
         platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
+        gpio_led_register_device(-1, &eukrea_mbimxsd_led_info);
         imx_add_gpio_keys(&eukrea_mbimxsd_button_data);
 }
diff --git a/arch/arm/mach-imx/eukrea_mbimxsd35-baseboard.c b/arch/arm/mach-imx/eukrea_mbimxsd35-baseboard.c
index 4909ea05855a..558eb526ba56 100644
--- a/arch/arm/mach-imx/eukrea_mbimxsd35-baseboard.c
+++ b/arch/arm/mach-imx/eukrea_mbimxsd35-baseboard.c
@@ -193,19 +193,12 @@ static struct gpio_led eukrea_mbimxsd_leds[] = {
         },
 };
 
-static struct gpio_led_platform_data eukrea_mbimxsd_led_info = {
+static const struct gpio_led_platform_data
+                eukrea_mbimxsd_led_info __initconst = {
         .leds           = eukrea_mbimxsd_leds,
         .num_leds       = ARRAY_SIZE(eukrea_mbimxsd_leds),
 };
 
-static struct platform_device eukrea_mbimxsd_leds_gpio = {
-        .name   = "leds-gpio",
-        .id     = -1,
-        .dev    = {
-                .platform_data  = &eukrea_mbimxsd_led_info,
-        },
-};
-
 static struct gpio_keys_button eukrea_mbimxsd_gpio_buttons[] = {
         {
                 .gpio           = GPIO_SWITCH1,
@@ -223,7 +216,6 @@ static const struct gpio_keys_platform_data
 };
 
 static struct platform_device *platform_devices[] __initdata = {
-        &eukrea_mbimxsd_leds_gpio,
         &eukrea_mbimxsd_lcd_powerdev,
 };
 
@@ -299,5 +291,6 @@ void __init eukrea_mbimxsd35_baseboard_init(void)
                                 ARRAY_SIZE(eukrea_mbimxsd_i2c_devices));
 
         platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
+        gpio_led_register_device(-1, &eukrea_mbimxsd_led_info);
         imx_add_gpio_keys(&eukrea_mbimxsd_button_data);
 }
diff --git a/arch/arm/mach-imx/mach-apf9328.c b/arch/arm/mach-imx/mach-apf9328.c
index 59d2a3b137d9..a404c89485ca 100644
--- a/arch/arm/mach-imx/mach-apf9328.c
+++ b/arch/arm/mach-imx/mach-apf9328.c
@@ -99,11 +99,6 @@ static struct platform_device dm9000x_device = {
         }
 };
 
-/* --- SERIAL RESSOURCE --- */
-static const struct imxuart_platform_data uart0_pdata __initconst = {
-        .flags = 0,
-};
-
 static const struct imxuart_platform_data uart1_pdata __initconst = {
         .flags = IMXUART_HAVE_RTSCTS,
 };
@@ -121,7 +116,7 @@ static void __init apf9328_init(void)
                         ARRAY_SIZE(apf9328_pins),
                         "APF9328");
 
-        imx1_add_imx_uart0(&uart0_pdata);
+        imx1_add_imx_uart0(NULL);
         imx1_add_imx_uart1(&uart1_pdata);
 
         platform_add_devices(devices, ARRAY_SIZE(devices));
diff --git a/arch/arm/mach-imx/mach-imx27_visstrim_m10.c b/arch/arm/mach-imx/mach-imx27_visstrim_m10.c
index c6269d60ddbc..6707de0ab716 100644
--- a/arch/arm/mach-imx/mach-imx27_visstrim_m10.c
+++ b/arch/arm/mach-imx/mach-imx27_visstrim_m10.c
@@ -34,7 +34,7 @@
 #include <asm/mach/arch.h>
 #include <asm/mach/time.h>
 #include <mach/common.h>
-#include <mach/iomux.h>
+#include <mach/iomux-mx27.h>
 
 #include "devices-imx27.h"
 
diff --git a/arch/arm/mach-imx/mach-mx27_3ds.c b/arch/arm/mach-imx/mach-mx27_3ds.c
index eb663102376f..b31d4129e10e 100644
--- a/arch/arm/mach-imx/mach-mx27_3ds.c
+++ b/arch/arm/mach-imx/mach-mx27_3ds.c
@@ -47,6 +47,7 @@
 #define SPI2_SS0                IMX_GPIO_NR(4, 21)
 #define EXPIO_PARENT_INT        gpio_to_irq(IMX_GPIO_NR(3, 28))
 #define PMIC_INT                IMX_GPIO_NR(3, 14)
+#define SD1_CD                  IMX_GPIO_NR(2, 26)
 
 static const int mx27pdk_pins[] __initconst = {
         /* UART1 */
@@ -135,13 +136,13 @@ static const struct matrix_keymap_data mx27_3ds_keymap_data __initconst = {
 static int mx27_3ds_sdhc1_init(struct device *dev, irq_handler_t detect_irq,
                                 void *data)
 {
-        return request_irq(IRQ_GPIOB(26), detect_irq, IRQF_TRIGGER_FALLING |
-                        IRQF_TRIGGER_RISING, "sdhc1-card-detect", data);
+        return request_irq(gpio_to_irq(SD1_CD), detect_irq,
+        IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING, "sdhc1-card-detect", data);
 }
 
 static void mx27_3ds_sdhc1_exit(struct device *dev, void *data)
 {
-        free_irq(IRQ_GPIOB(26), data);
+        free_irq(gpio_to_irq(SD1_CD), data);
 }
 
 static const struct imxmmc_platform_data sdhc1_pdata __initconst = {
@@ -261,11 +262,11 @@ static struct mc13xxx_platform_data mc13783_pdata = {
 };
 
 /* SPI */
-static int spi2_internal_chipselect[] = {SPI2_SS0};
+static int spi2_chipselect[] = {SPI2_SS0};
 
 static const struct spi_imx_master spi2_pdata __initconst = {
-        .chipselect     = spi2_internal_chipselect,
-        .num_chipselect = ARRAY_SIZE(spi2_internal_chipselect),
+        .chipselect     = spi2_chipselect,
+        .num_chipselect = ARRAY_SIZE(spi2_chipselect),
 };
 
 static struct spi_board_info mx27_3ds_spi_devs[] __initdata = {
@@ -275,7 +276,7 @@ static struct spi_board_info mx27_3ds_spi_devs[] __initdata = {
                 .bus_num        = 1,
                 .chip_select    = 0, /* SS0 */
                 .platform_data  = &mc13783_pdata,
-                .irq = IRQ_GPIOC(14),
+                .irq = gpio_to_irq(PMIC_INT),
                 .mode = SPI_CS_HIGH,
         },
 };
diff --git a/arch/arm/mach-imx/mach-mx31moboard.c b/arch/arm/mach-imx/mach-mx31moboard.c
index a52fd36e2b52..b358383120e7 100644
--- a/arch/arm/mach-imx/mach-mx31moboard.c
+++ b/arch/arm/mach-imx/mach-mx31moboard.c
@@ -425,7 +425,7 @@ static int __init moboard_usbh2_init(void)
         return 0;
 }
 
-static struct gpio_led mx31moboard_leds[] = {
+static const struct gpio_led mx31moboard_leds[] __initconst = {
         {
                 .name   = "coreboard-led-0:red:running",
                 .default_trigger = "heartbeat",
@@ -442,26 +442,17 @@ static struct gpio_led mx31moboard_leds[] = {
         },
 };
 
-static struct gpio_led_platform_data mx31moboard_led_pdata = {
+static const struct gpio_led_platform_data mx31moboard_led_pdata __initconst = {
         .num_leds       = ARRAY_SIZE(mx31moboard_leds),
         .leds           = mx31moboard_leds,
 };
 
-static struct platform_device mx31moboard_leds_device = {
-        .name   = "leds-gpio",
-        .id     = -1,
-        .dev    = {
-                .platform_data = &mx31moboard_led_pdata,
-        },
-};
-
 static const struct ipu_platform_data mx3_ipu_data __initconst = {
         .irq_base = MXC_IPU_IRQ_START,
 };
 
 static struct platform_device *devices[] __initdata = {
         &mx31moboard_flash,
-        &mx31moboard_leds_device,
 };
 
 static struct mx3_camera_pdata camera_pdata __initdata = {
@@ -513,6 +504,7 @@ static void __init mx31moboard_init(void)
                 "moboard");
 
         platform_add_devices(devices, ARRAY_SIZE(devices));
+        gpio_led_register_device(-1, &mx31moboard_led_pdata);
 
         imx31_add_imx_uart0(&uart0_pdata);
         imx31_add_imx_uart4(&uart4_pdata);
diff --git a/arch/arm/mach-imx/mach-mx35_3ds.c b/arch/arm/mach-imx/mach-mx35_3ds.c
index 48b3c6fd5cf0..b3b9bd8ac2a3 100644
--- a/arch/arm/mach-imx/mach-mx35_3ds.c
+++ b/arch/arm/mach-imx/mach-mx35_3ds.c
@@ -43,7 +43,7 @@
 
 #include "devices-imx35.h"
 
-#define EXPIO_PARENT_INT        (MXC_INTERNAL_IRQS + GPIO_PORTA + 1)
+#define EXPIO_PARENT_INT        gpio_to_irq(IMX_GPIO_NR(1, 1))
 
 static const struct imxuart_platform_data uart_pdata __initconst = {
         .flags = IMXUART_HAVE_RTSCTS,
diff --git a/arch/arm/mach-imx/mach-scb9328.c b/arch/arm/mach-imx/mach-scb9328.c
index 82805260e19c..db2d60470e15 100644
--- a/arch/arm/mach-imx/mach-scb9328.c
+++ b/arch/arm/mach-imx/mach-scb9328.c
@@ -101,21 +101,7 @@ static const int mxc_uart1_pins[] = {
         PC12_PF_UART1_RXD,
 };
 
-static int uart1_mxc_init(struct platform_device *pdev)
-{
-        return mxc_gpio_setup_multiple_pins(mxc_uart1_pins,
-                        ARRAY_SIZE(mxc_uart1_pins), "UART1");
-}
-
-static void uart1_mxc_exit(struct platform_device *pdev)
-{
-        mxc_gpio_release_multiple_pins(mxc_uart1_pins,
-                        ARRAY_SIZE(mxc_uart1_pins));
-}
-
 static const struct imxuart_platform_data uart_pdata __initconst = {
-        .init = uart1_mxc_init,
-        .exit = uart1_mxc_exit,
         .flags = IMXUART_HAVE_RTSCTS,
 };
 
@@ -131,6 +117,9 @@ static void __init scb9328_init(void)
 {
         imx1_soc_init();
 
+        mxc_gpio_setup_multiple_pins(mxc_uart1_pins,
+                        ARRAY_SIZE(mxc_uart1_pins), "UART1");
+
         imx1_add_imx_uart0(&uart_pdata);
 
         printk(KERN_INFO"Scb9328: Adding devices\n");
diff --git a/arch/arm/mach-imx/mx31lite-db.c b/arch/arm/mach-imx/mx31lite-db.c
index 5aa053edc17c..bf0fb87946ba 100644
--- a/arch/arm/mach-imx/mx31lite-db.c
+++ b/arch/arm/mach-imx/mx31lite-db.c
@@ -161,7 +161,7 @@ static const struct spi_imx_master spi0_pdata __initconst = {
 
 /* GPIO LEDs */
 
-static struct gpio_led litekit_leds[] = {
+static const struct gpio_led litekit_leds[] __initconst = {
         {
                 .name           = "GPIO0",
                 .gpio           = IOMUX_TO_GPIO(MX31_PIN_COMPARE),
@@ -176,19 +176,12 @@ static struct gpio_led litekit_leds[] = {
         }
 };
 
-static struct gpio_led_platform_data litekit_led_platform_data = {
+static const struct gpio_led_platform_data
+                litekit_led_platform_data __initconst = {
         .leds           = litekit_leds,
         .num_leds       = ARRAY_SIZE(litekit_leds),
 };
 
-static struct platform_device litekit_led_device = {
-        .name   = "leds-gpio",
-        .id     = -1,
-        .dev    = {
-                .platform_data = &litekit_led_platform_data,
-        },
-};
-
 void __init mx31lite_db_init(void)
 {
         mxc_iomux_setup_multiple_pins(litekit_db_board_pins,
@@ -197,7 +190,7 @@ void __init mx31lite_db_init(void)
         imx31_add_imx_uart0(&uart_pdata);
         imx31_add_mxc_mmc(0, &mmc_pdata);
         imx31_add_spi_imx0(&spi0_pdata);
-        platform_device_register(&litekit_led_device);
+        gpio_led_register_device(-1, &litekit_led_platform_data);
         imx31_add_imx2_wdt(NULL);
         imx31_add_mxc_rtc(NULL);
 }
diff --git a/arch/arm/mach-integrator/include/mach/bits.h b/arch/arm/mach-integrator/include/mach/bits.h
deleted file mode 100644
index 09b024e0496a..000000000000
--- a/arch/arm/mach-integrator/include/mach/bits.h
+++ /dev/null
@@ -1,61 +0,0 @@
-/*
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-/* DO NOT EDIT!! - this file automatically generated
- *                 from .s file by awk -f s2h.awk
- */
-/*  Bit field definitions
- *  Copyright (C) ARM Limited 1998. All rights reserved.
- */
-
-#ifndef __bits_h
-#define __bits_h                        1
-
-#define BIT0                            0x00000001
-#define BIT1                            0x00000002
-#define BIT2                            0x00000004
-#define BIT3                            0x00000008
-#define BIT4                            0x00000010
-#define BIT5                            0x00000020
-#define BIT6                            0x00000040
-#define BIT7                            0x00000080
-#define BIT8                            0x00000100
-#define BIT9                            0x00000200
-#define BIT10                           0x00000400
-#define BIT11                           0x00000800
-#define BIT12                           0x00001000
-#define BIT13                           0x00002000
-#define BIT14                           0x00004000
-#define BIT15                           0x00008000
-#define BIT16                           0x00010000
-#define BIT17                           0x00020000
-#define BIT18                           0x00040000
-#define BIT19                           0x00080000
-#define BIT20                           0x00100000
-#define BIT21                           0x00200000
-#define BIT22                           0x00400000
-#define BIT23                           0x00800000
-#define BIT24                           0x01000000
-#define BIT25                           0x02000000
-#define BIT26                           0x04000000
-#define BIT27                           0x08000000
-#define BIT28                           0x10000000
-#define BIT29                           0x20000000
-#define BIT30                           0x40000000
-#define BIT31                           0x80000000
-
-#endif
-
-/*         END */
diff --git a/arch/arm/mach-mx5/Kconfig b/arch/arm/mach-mx5/Kconfig
index 799fbc40e53c..f25e9d7bf0f5 100644
--- a/arch/arm/mach-mx5/Kconfig
+++ b/arch/arm/mach-mx5/Kconfig
@@ -109,6 +109,7 @@ config MACH_EUKREA_MBIMX51_BASEBOARD
         bool
         select IMX_HAVE_PLATFORM_IMX_KEYPAD
         select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
+        select LEDS_GPIO_REGISTER
         help
           This adds board specific devices that can be found on Eukrea's
           MBIMX51 evaluation board.
@@ -135,6 +136,7 @@ config MACH_EUKREA_MBIMXSD51_BASEBOARD
         prompt "Eukrea MBIMXSD development board"
         bool
         select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
+        select LEDS_GPIO_REGISTER
         help
           This adds board specific devices that can be found on Eukrea's
           MBIMXSD evaluation board.
@@ -151,6 +153,7 @@ config MX51_EFIKA_COMMON
 
 config MACH_MX51_EFIKAMX
         bool "Support MX51 Genesi Efika MX nettop"
+        select LEDS_GPIO_REGISTER
         select MX51_EFIKA_COMMON
         help
           Include support for Genesi Efika MX nettop. This includes specific
@@ -158,6 +161,7 @@ config MACH_MX51_EFIKAMX
 
 config MACH_MX51_EFIKASB
         bool "Support MX51 Genesi Efika Smartbook"
+        select LEDS_GPIO_REGISTER
         select MX51_EFIKA_COMMON
         help
           Include support for Genesi Efika Smartbook. This includes specific
diff --git a/arch/arm/mach-mx5/board-cpuimx51.c b/arch/arm/mach-mx5/board-cpuimx51.c
index add0d42de7af..7c893fa70266 100644
--- a/arch/arm/mach-mx5/board-cpuimx51.c
+++ b/arch/arm/mach-mx5/board-cpuimx51.c
@@ -43,10 +43,6 @@
 #define CPUIMX51_QUARTB_GPIO    IMX_GPIO_NR(3, 25)
 #define CPUIMX51_QUARTC_GPIO    IMX_GPIO_NR(3, 26)
 #define CPUIMX51_QUARTD_GPIO    IMX_GPIO_NR(3, 27)
-#define CPUIMX51_QUARTA_IRQ     (MXC_INTERNAL_IRQS + CPUIMX51_QUARTA_GPIO)
-#define CPUIMX51_QUARTB_IRQ     (MXC_INTERNAL_IRQS + CPUIMX51_QUARTB_GPIO)
-#define CPUIMX51_QUARTC_IRQ     (MXC_INTERNAL_IRQS + CPUIMX51_QUARTC_GPIO)
-#define CPUIMX51_QUARTD_IRQ     (MXC_INTERNAL_IRQS + CPUIMX51_QUARTD_GPIO)
 #define CPUIMX51_QUART_XTAL     14745600
 #define CPUIMX51_QUART_REGSHIFT 17
 
@@ -61,7 +57,7 @@
 static struct plat_serial8250_port serial_platform_data[] = {
         {
                 .mapbase = (unsigned long)(MX51_CS1_BASE_ADDR + 0x400000),
-                .irq = CPUIMX51_QUARTA_IRQ,
+                .irq = gpio_to_irq(CPUIMX51_QUARTA_GPIO),
                 .irqflags = IRQF_TRIGGER_HIGH,
                 .uartclk = CPUIMX51_QUART_XTAL,
                 .regshift = CPUIMX51_QUART_REGSHIFT,
@@ -69,7 +65,7 @@ static struct plat_serial8250_port serial_platform_data[] = {
                 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
         }, {
                 .mapbase = (unsigned long)(MX51_CS1_BASE_ADDR + 0x800000),
-                .irq = CPUIMX51_QUARTB_IRQ,
+                .irq = gpio_to_irq(CPUIMX51_QUARTB_GPIO),
                 .irqflags = IRQF_TRIGGER_HIGH,
                 .uartclk = CPUIMX51_QUART_XTAL,
                 .regshift = CPUIMX51_QUART_REGSHIFT,
@@ -77,7 +73,7 @@ static struct plat_serial8250_port serial_platform_data[] = {
                 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
         }, {
                 .mapbase = (unsigned long)(MX51_CS1_BASE_ADDR + 0x1000000),
-                .irq = CPUIMX51_QUARTC_IRQ,
+                .irq = gpio_to_irq(CPUIMX51_QUARTC_GPIO),
                 .irqflags = IRQF_TRIGGER_HIGH,
                 .uartclk = CPUIMX51_QUART_XTAL,
                 .regshift = CPUIMX51_QUART_REGSHIFT,
@@ -85,7 +81,7 @@ static struct plat_serial8250_port serial_platform_data[] = {
                 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
         }, {
                 .mapbase = (unsigned long)(MX51_CS1_BASE_ADDR + 0x2000000),
-                .irq = CPUIMX51_QUARTD_IRQ,
+                .irq = irq_to_gpio(CPUIMX51_QUARTD_GPIO),
                 .irqflags = IRQF_TRIGGER_HIGH,
                 .uartclk = CPUIMX51_QUART_XTAL,
                 .regshift = CPUIMX51_QUART_REGSHIFT,
diff --git a/arch/arm/mach-mx5/board-mx51_3ds.c b/arch/arm/mach-mx5/board-mx51_3ds.c
index 3112d15feebc..07a38154da21 100644
--- a/arch/arm/mach-mx5/board-mx51_3ds.c
+++ b/arch/arm/mach-mx5/board-mx51_3ds.c
@@ -13,6 +13,7 @@
 #include <linux/irq.h>
 #include <linux/platform_device.h>
 #include <linux/spi/spi.h>
+#include <linux/gpio.h>
 
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
@@ -26,7 +27,7 @@
 #include "devices-imx51.h"
 #include "devices.h"
 
-#define EXPIO_PARENT_INT        (MXC_INTERNAL_IRQS + GPIO_PORTA + 6)
+#define EXPIO_PARENT_INT        gpio_to_irq(IMX_GPIO_NR(1, 6))
 #define MX51_3DS_ECSPI2_CS      (GPIO_PORTC + 28)
 
 static iomux_v3_cfg_t mx51_3ds_pads[] = {
diff --git a/arch/arm/mach-mx5/board-mx51_babbage.c b/arch/arm/mach-mx5/board-mx51_babbage.c
index 6021dd00ec75..e54e4bf61cfd 100644
--- a/arch/arm/mach-mx5/board-mx51_babbage.c
+++ b/arch/arm/mach-mx5/board-mx51_babbage.c
@@ -36,7 +36,7 @@
 
 #define BABBAGE_USB_HUB_RESET   IMX_GPIO_NR(1, 7)
 #define BABBAGE_USBH1_STP       IMX_GPIO_NR(1, 27)
-#define BABBAGE_PHY_RESET       IMX_GPIO_NR(2, 5)
+#define BABBAGE_USB_PHY_RESET   IMX_GPIO_NR(2, 5)
 #define BABBAGE_FEC_PHY_RESET   IMX_GPIO_NR(2, 14)
 #define BABBAGE_POWER_KEY       IMX_GPIO_NR(2, 21)
 #define BABBAGE_ECSPI1_CS0      IMX_GPIO_NR(4, 24)
@@ -110,6 +110,9 @@ static iomux_v3_cfg_t mx51babbage_pads[] = {
         /* USB HUB reset line*/
         MX51_PAD_GPIO1_7__GPIO1_7,
 
+        /* USB PHY reset line */
+        MX51_PAD_EIM_D21__GPIO2_5,
+
         /* FEC */
         MX51_PAD_EIM_EB2__FEC_MDIO,
         MX51_PAD_EIM_EB3__FEC_RDATA1,
@@ -169,34 +172,31 @@ static struct imxi2c_platform_data babbage_hsi2c_data = {
         .bitrate = 400000,
 };
 
+static struct gpio mx51_babbage_usbh1_gpios[] = {
+        { BABBAGE_USBH1_STP, GPIOF_OUT_INIT_LOW, "usbh1_stp" },
+        { BABBAGE_USB_PHY_RESET, GPIOF_OUT_INIT_LOW, "usbh1_phy_reset" },
+};
+
 static int gpio_usbh1_active(void)
 {
         iomux_v3_cfg_t usbh1stp_gpio = MX51_PAD_USBH1_STP__GPIO1_27;
-        iomux_v3_cfg_t phyreset_gpio = MX51_PAD_EIM_D21__GPIO2_5;
         int ret;
 
         /* Set USBH1_STP to GPIO and toggle it */
         mxc_iomux_v3_setup_pad(usbh1stp_gpio);
-        ret = gpio_request(BABBAGE_USBH1_STP, "usbh1_stp");
+        ret = gpio_request_array(mx51_babbage_usbh1_gpios,
+                                        ARRAY_SIZE(mx51_babbage_usbh1_gpios));
 
         if (ret) {
-                pr_debug("failed to get MX51_PAD_USBH1_STP__GPIO_1_27: %d\n", ret);
+                pr_debug("failed to get USBH1 pins: %d\n", ret);
                 return ret;
         }
-        gpio_direction_output(BABBAGE_USBH1_STP, 0);
-        gpio_set_value(BABBAGE_USBH1_STP, 1);
-        msleep(100);
-        gpio_free(BABBAGE_USBH1_STP);
-
-        /* De-assert USB PHY RESETB */
-        mxc_iomux_v3_setup_pad(phyreset_gpio);
-        ret = gpio_request(BABBAGE_PHY_RESET, "phy_reset");
 
-        if (ret) {
-                pr_debug("failed to get MX51_PAD_EIM_D21__GPIO_2_5: %d\n", ret);
-                return ret;
-        }
-        gpio_direction_output(BABBAGE_PHY_RESET, 1);
+        msleep(100);
+        gpio_set_value(BABBAGE_USBH1_STP, 1);
+        gpio_set_value(BABBAGE_USB_PHY_RESET, 1);
+        gpio_free_array(mx51_babbage_usbh1_gpios,
+                                        ARRAY_SIZE(mx51_babbage_usbh1_gpios));
         return 0;
 }
 
diff --git a/arch/arm/mach-mx5/board-mx51_efikamx.c b/arch/arm/mach-mx5/board-mx51_efikamx.c
index 3be603b9075a..f70700dc0ec1 100644
--- a/arch/arm/mach-mx5/board-mx51_efikamx.c
+++ b/arch/arm/mach-mx5/board-mx51_efikamx.c
@@ -139,7 +139,7 @@ static void __init mx51_efikamx_board_id(void)
         }
 }
 
-static struct gpio_led mx51_efikamx_leds[] = {
+static struct gpio_led mx51_efikamx_leds[] __initdata = {
         {
                 .name = "efikamx:green",
                 .default_trigger = "default-on",
@@ -157,19 +157,12 @@ static struct gpio_led mx51_efikamx_leds[] = {
         },
 };
 
-static struct gpio_led_platform_data mx51_efikamx_leds_data = {
+static const struct gpio_led_platform_data
+                mx51_efikamx_leds_data __initconst = {
         .leds = mx51_efikamx_leds,
         .num_leds = ARRAY_SIZE(mx51_efikamx_leds),
 };
 
-static struct platform_device mx51_efikamx_leds_device = {
-        .name = "leds-gpio",
-        .id = -1,
-        .dev = {
-                .platform_data = &mx51_efikamx_leds_data,
-        },
-};
-
 static struct gpio_keys_button mx51_efikamx_powerkey[] = {
         {
                 .code = KEY_POWER,
@@ -250,7 +243,7 @@ static void __init mx51_efikamx_init(void)
                 mx51_efikamx_leds[2].default_trigger = "mmc1";
         }
 
-        platform_device_register(&mx51_efikamx_leds_device);
+        gpio_led_register_device(-1, &mx51_efikamx_leds_data);
         imx_add_gpio_keys(&mx51_efikamx_powerkey_data);
 
         if (system_rev == 0x11) {
diff --git a/arch/arm/mach-mx5/board-mx51_efikasb.c b/arch/arm/mach-mx5/board-mx51_efikasb.c
index 4b2e522de0f8..2e4d9d32a87c 100644
--- a/arch/arm/mach-mx5/board-mx51_efikasb.c
+++ b/arch/arm/mach-mx5/board-mx51_efikasb.c
@@ -132,7 +132,7 @@ static void __init mx51_efikasb_usb(void)
                 mxc_register_device(&mxc_usbh2_device, &usbh2_config);
 }
 
-static struct gpio_led mx51_efikasb_leds[] = {
+static const struct gpio_led mx51_efikasb_leds[] __initconst = {
         {
                 .name = "efikasb:green",
                 .default_trigger = "default-on",
@@ -146,19 +146,12 @@ static struct gpio_led mx51_efikasb_leds[] = {
         },
 };
 
-static struct gpio_led_platform_data mx51_efikasb_leds_data = {
+static const struct gpio_led_platform_data
+                mx51_efikasb_leds_data __initconst = {
         .leds = mx51_efikasb_leds,
         .num_leds = ARRAY_SIZE(mx51_efikasb_leds),
 };
 
-static struct platform_device mx51_efikasb_leds_device = {
-        .name = "leds-gpio",
-        .id = -1,
-        .dev = {
-                .platform_data = &mx51_efikasb_leds_data,
-        },
-};
-
 static struct gpio_keys_button mx51_efikasb_keys[] = {
         {
                 .code = KEY_POWER,
@@ -258,9 +251,8 @@ static void __init efikasb_board_init(void)
         mx51_efikasb_usb();
         imx51_add_sdhci_esdhc_imx(1, NULL);
 
-        platform_device_register(&mx51_efikasb_leds_device);
+        gpio_led_register_device(-1, &mx51_efikasb_leds_data);
         imx_add_gpio_keys(&mx51_efikasb_keys_data);
-
 }
 
 static void __init mx51_efikasb_timer_init(void)
diff --git a/arch/arm/mach-mx5/eukrea_mbimx51-baseboard.c b/arch/arm/mach-mx5/eukrea_mbimx51-baseboard.c
index 97292d20f1f3..bbf4564bd050 100644
--- a/arch/arm/mach-mx5/eukrea_mbimx51-baseboard.c
+++ b/arch/arm/mach-mx5/eukrea_mbimx51-baseboard.c
@@ -31,13 +31,12 @@
 #include "devices.h"
 
 #define MBIMX51_TSC2007_GPIO    IMX_GPIO_NR(3, 30)
-#define MBIMX51_TSC2007_IRQ     (MXC_INTERNAL_IRQS + MBIMX51_TSC2007_GPIO)
 #define MBIMX51_LED0            IMX_GPIO_NR(3, 5)
 #define MBIMX51_LED1            IMX_GPIO_NR(3, 6)
 #define MBIMX51_LED2            IMX_GPIO_NR(3, 7)
 #define MBIMX51_LED3            IMX_GPIO_NR(3, 8)
 
-static struct gpio_led mbimx51_leds[] = {
+static const struct gpio_led mbimx51_leds[] __initconst = {
         {
                 .name                   = "led0",
                 .default_trigger        = "heartbeat",
@@ -64,23 +63,11 @@ static struct gpio_led mbimx51_leds[] = {
         },
 };
 
-static struct gpio_led_platform_data mbimx51_leds_info = {
+static const struct gpio_led_platform_data mbimx51_leds_info __initconst = {
         .leds           = mbimx51_leds,
         .num_leds       = ARRAY_SIZE(mbimx51_leds),
 };
 
-static struct platform_device mbimx51_leds_gpio = {
-        .name   = "leds-gpio",
-        .id     = -1,
-        .dev    = {
-                .platform_data  = &mbimx51_leds_info,
-        },
-};
-
-static struct platform_device *devices[] __initdata = {
-        &mbimx51_leds_gpio,
-};
-
 static iomux_v3_cfg_t mbimx51_pads[] = {
         /* UART2 */
         MX51_PAD_UART2_RXD__UART2_RXD,
@@ -173,7 +160,7 @@ struct tsc2007_platform_data tsc2007_data = {
 static struct i2c_board_info mbimx51_i2c_devices[] = {
         {
                 I2C_BOARD_INFO("tsc2007", 0x49),
-                .irq  = MBIMX51_TSC2007_IRQ,
+                .irq  = gpio_to_irq(MBIMX51_TSC2007_GPIO),
                 .platform_data = &tsc2007_data,
         }, {
                 I2C_BOARD_INFO("tlv320aic23", 0x1a),
@@ -204,13 +191,14 @@ void __init eukrea_mbimx51_baseboard_init(void)
         gpio_direction_output(MBIMX51_LED3, 1);
         gpio_free(MBIMX51_LED3);
 
-        platform_add_devices(devices, ARRAY_SIZE(devices));
+        gpio_led_register_device(-1, &mbimx51_leds_info);
 
         imx51_add_imx_keypad(&mbimx51_map_data);
 
         gpio_request(MBIMX51_TSC2007_GPIO, "tsc2007_irq");
         gpio_direction_input(MBIMX51_TSC2007_GPIO);
-        irq_set_irq_type(MBIMX51_TSC2007_IRQ, IRQF_TRIGGER_FALLING);
+        irq_set_irq_type(gpio_to_irq(MBIMX51_TSC2007_GPIO),
+                                        IRQF_TRIGGER_FALLING);
         i2c_register_board_info(1, mbimx51_i2c_devices,
                                 ARRAY_SIZE(mbimx51_i2c_devices));
 
diff --git a/arch/arm/mach-mx5/eukrea_mbimxsd-baseboard.c b/arch/arm/mach-mx5/eukrea_mbimxsd-baseboard.c
index 31c871ec46a6..261923997643 100644
--- a/arch/arm/mach-mx5/eukrea_mbimxsd-baseboard.c
+++ b/arch/arm/mach-mx5/eukrea_mbimxsd-baseboard.c
@@ -74,7 +74,7 @@ static iomux_v3_cfg_t eukrea_mbimxsd_pads[] = {
 #define GPIO_LED1       IMX_GPIO_NR(3, 30)
 #define GPIO_SWITCH1    IMX_GPIO_NR(3, 31)
 
-static struct gpio_led eukrea_mbimxsd_leds[] = {
+static const struct gpio_led eukrea_mbimxsd_leds[] __initconst = {
         {
                 .name                   = "led1",
                 .default_trigger        = "heartbeat",
@@ -83,19 +83,12 @@ static struct gpio_led eukrea_mbimxsd_leds[] = {
         },
 };
 
-static struct gpio_led_platform_data eukrea_mbimxsd_led_info = {
+static const struct gpio_led_platform_data
+                eukrea_mbimxsd_led_info __initconst = {
         .leds           = eukrea_mbimxsd_leds,
         .num_leds       = ARRAY_SIZE(eukrea_mbimxsd_leds),
 };
 
-static struct platform_device eukrea_mbimxsd_leds_gpio = {
-        .name   = "leds-gpio",
-        .id     = -1,
-        .dev    = {
-                .platform_data  = &eukrea_mbimxsd_led_info,
-        },
-};
-
 static struct gpio_keys_button eukrea_mbimxsd_gpio_buttons[] = {
         {
                 .gpio           = GPIO_SWITCH1,
@@ -112,10 +105,6 @@ static const struct gpio_keys_platform_data
         .nbuttons       = ARRAY_SIZE(eukrea_mbimxsd_gpio_buttons),
 };
 
-static struct platform_device *platform_devices[] __initdata = {
-        &eukrea_mbimxsd_leds_gpio,
-};
-
 static const struct imxuart_platform_data uart_pdata __initconst = {
         .flags = IMXUART_HAVE_RTSCTS,
 };
@@ -154,6 +143,6 @@ void __init eukrea_mbimxsd51_baseboard_init(void)
         i2c_register_board_info(0, eukrea_mbimxsd_i2c_devices,
                                 ARRAY_SIZE(eukrea_mbimxsd_i2c_devices));
 
-        platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
+        gpio_led_register_device(-1, &eukrea_mbimxsd_led_info);
         imx_add_gpio_keys(&eukrea_mbimxsd_button_data);
 }
diff --git a/arch/arm/mach-mxs/Kconfig b/arch/arm/mach-mxs/Kconfig
index f114960622e0..162b0b0bc356 100644
--- a/arch/arm/mach-mxs/Kconfig
+++ b/arch/arm/mach-mxs/Kconfig
@@ -55,6 +55,7 @@ config MACH_MX28EVK
 config MODULE_TX28
         bool
         select SOC_IMX28
+        select LEDS_GPIO_REGISTER
         select MXS_HAVE_AMBA_DUART
         select MXS_HAVE_PLATFORM_AUART
         select MXS_HAVE_PLATFORM_FEC
diff --git a/arch/arm/mach-mxs/mach-tx28.c b/arch/arm/mach-mxs/mach-tx28.c
index 068e540efbb6..6766a12cca7f 100644
--- a/arch/arm/mach-mxs/mach-tx28.c
+++ b/arch/arm/mach-mxs/mach-tx28.c
@@ -109,7 +109,7 @@ static const iomux_cfg_t tx28_stk5v3_pads[] __initconst = {
                 (MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
 };
 
-static struct gpio_led tx28_stk5v3_leds[] = {
+static const struct gpio_led tx28_stk5v3_leds[] __initconst = {
         {
                 .name = "GPIO-LED",
                 .default_trigger = "heartbeat",
@@ -151,8 +151,7 @@ static void __init tx28_stk5v3_init(void)
         /* spi via ssp will be added when available */
         spi_register_board_info(tx28_spi_board_info,
                         ARRAY_SIZE(tx28_spi_board_info));
-        mxs_add_platform_device("leds-gpio", 0, NULL, 0,
-                        &tx28_stk5v3_led_data, sizeof(tx28_stk5v3_led_data));
+        gpio_led_register_device(0, &tx28_stk5v3_led_data);
         mx28_add_mxs_i2c(0);
         i2c_register_board_info(0, tx28_stk5v3_i2c_boardinfo,
                         ARRAY_SIZE(tx28_stk5v3_i2c_boardinfo));
diff --git a/arch/arm/mach-omap1/board-ams-delta.c b/arch/arm/mach-omap1/board-ams-delta.c
index f49ce85d2448..312ea6b0409d 100644
--- a/arch/arm/mach-omap1/board-ams-delta.c
+++ b/arch/arm/mach-omap1/board-ams-delta.c
@@ -138,7 +138,7 @@ void ams_delta_latch2_write(u16 mask, u16 value)
 static void __init ams_delta_init_irq(void)
 {
         omap1_init_common_hw();
-        omap_init_irq();
+        omap1_init_irq();
 }
 
 static struct map_desc ams_delta_io_desc[] __initdata = {
@@ -391,7 +391,7 @@ MACHINE_START(AMS_DELTA, "Amstrad E3 (Delta)")
         .reserve        = omap_reserve,
         .init_irq       = ams_delta_init_irq,
         .init_machine   = ams_delta_init,
-        .timer          = &omap_timer,
+        .timer          = &omap1_timer,
 MACHINE_END
 
 EXPORT_SYMBOL(ams_delta_latch1_write);
diff --git a/arch/arm/mach-omap1/board-fsample.c b/arch/arm/mach-omap1/board-fsample.c
index 87f173d93557..a6b1bea50371 100644
--- a/arch/arm/mach-omap1/board-fsample.c
+++ b/arch/arm/mach-omap1/board-fsample.c
@@ -329,7 +329,7 @@ static void __init omap_fsample_init(void)
 static void __init omap_fsample_init_irq(void)
 {
         omap1_init_common_hw();
-        omap_init_irq();
+        omap1_init_irq();
 }
 
 /* Only FPGA needs to be mapped here. All others are done with ioremap */
@@ -394,5 +394,5 @@ MACHINE_START(OMAP_FSAMPLE, "OMAP730 F-Sample")
         .reserve        = omap_reserve,
         .init_irq       = omap_fsample_init_irq,
         .init_machine   = omap_fsample_init,
-        .timer          = &omap_timer,
+        .timer          = &omap1_timer,
 MACHINE_END
diff --git a/arch/arm/mach-omap1/board-generic.c b/arch/arm/mach-omap1/board-generic.c
index 23f4ab9e2651..04fc356c40fa 100644
--- a/arch/arm/mach-omap1/board-generic.c
+++ b/arch/arm/mach-omap1/board-generic.c
@@ -31,7 +31,7 @@
 static void __init omap_generic_init_irq(void)
 {
         omap1_init_common_hw();
-        omap_init_irq();
+        omap1_init_irq();
 }
 
 /* assume no Mini-AB port */
@@ -99,5 +99,5 @@ MACHINE_START(OMAP_GENERIC, "Generic OMAP1510/1610/1710")
         .reserve        = omap_reserve,
         .init_irq       = omap_generic_init_irq,
         .init_machine   = omap_generic_init,
-        .timer          = &omap_timer,
+        .timer          = &omap1_timer,
 MACHINE_END
diff --git a/arch/arm/mach-omap1/board-h2.c b/arch/arm/mach-omap1/board-h2.c
index ba3bd09c4754..cb7fb1aa3dca 100644
--- a/arch/arm/mach-omap1/board-h2.c
+++ b/arch/arm/mach-omap1/board-h2.c
@@ -376,7 +376,7 @@ static struct i2c_board_info __initdata h2_i2c_board_info[] = {
 static void __init h2_init_irq(void)
 {
         omap1_init_common_hw();
-        omap_init_irq();
+        omap1_init_irq();
 }
 
 static struct omap_usb_config h2_usb_config __initdata = {
@@ -466,5 +466,5 @@ MACHINE_START(OMAP_H2, "TI-H2")
         .reserve        = omap_reserve,
         .init_irq       = h2_init_irq,
         .init_machine   = h2_init,
-        .timer          = &omap_timer,
+        .timer          = &omap1_timer,
 MACHINE_END
diff --git a/arch/arm/mach-omap1/board-h3.c b/arch/arm/mach-omap1/board-h3.c
index ac48677672ee..31f34875ffad 100644
--- a/arch/arm/mach-omap1/board-h3.c
+++ b/arch/arm/mach-omap1/board-h3.c
@@ -439,7 +439,7 @@ static void __init h3_init(void)
 static void __init h3_init_irq(void)
 {
         omap1_init_common_hw();
-        omap_init_irq();
+        omap1_init_irq();
 }
 
 static void __init h3_map_io(void)
@@ -454,5 +454,5 @@ MACHINE_START(OMAP_H3, "TI OMAP1710 H3 board")
         .reserve        = omap_reserve,
         .init_irq       = h3_init_irq,
         .init_machine   = h3_init,
-        .timer          = &omap_timer,
+        .timer          = &omap1_timer,
 MACHINE_END
diff --git a/arch/arm/mach-omap1/board-htcherald.c b/arch/arm/mach-omap1/board-htcherald.c
index ba05a51f9408..36e06ea7ec65 100644
--- a/arch/arm/mach-omap1/board-htcherald.c
+++ b/arch/arm/mach-omap1/board-htcherald.c
@@ -605,7 +605,7 @@ static void __init htcherald_init_irq(void)
 {
         printk(KERN_INFO "htcherald_init_irq.\n");
         omap1_init_common_hw();
-        omap_init_irq();
+        omap1_init_irq();
 }
 
 MACHINE_START(HERALD, "HTC Herald")
@@ -616,5 +616,5 @@ MACHINE_START(HERALD, "HTC Herald")
         .reserve        = omap_reserve,
         .init_irq       = htcherald_init_irq,
         .init_machine   = htcherald_init,
-        .timer          = &omap_timer,
+        .timer          = &omap1_timer,
 MACHINE_END
diff --git a/arch/arm/mach-omap1/board-innovator.c b/arch/arm/mach-omap1/board-innovator.c
index 2d9b8cbd7a14..0b1ba462d388 100644
--- a/arch/arm/mach-omap1/board-innovator.c
+++ b/arch/arm/mach-omap1/board-innovator.c
@@ -292,7 +292,7 @@ static void __init innovator_init_smc91x(void)
 static void __init innovator_init_irq(void)
 {
         omap1_init_common_hw();
-        omap_init_irq();
+        omap1_init_irq();
 }
 
 #ifdef CONFIG_ARCH_OMAP15XX
@@ -464,5 +464,5 @@ MACHINE_START(OMAP_INNOVATOR, "TI-Innovator")
         .reserve        = omap_reserve,
         .init_irq       = innovator_init_irq,
         .init_machine   = innovator_init,
-        .timer          = &omap_timer,
+        .timer          = &omap1_timer,
 MACHINE_END
diff --git a/arch/arm/mach-omap1/board-nokia770.c b/arch/arm/mach-omap1/board-nokia770.c
index cfd084926146..5469ce247ffe 100644
--- a/arch/arm/mach-omap1/board-nokia770.c
+++ b/arch/arm/mach-omap1/board-nokia770.c
@@ -51,7 +51,7 @@ static void __init omap_nokia770_init_irq(void)
         omap_writew((omap_readw(0xfffb5004) & ~2), 0xfffb5004);
 
         omap1_init_common_hw();
-        omap_init_irq();
+        omap1_init_irq();
 }
 
 static const unsigned int nokia770_keymap[] = {
@@ -269,5 +269,5 @@ MACHINE_START(NOKIA770, "Nokia 770")
         .reserve        = omap_reserve,
         .init_irq       = omap_nokia770_init_irq,
         .init_machine   = omap_nokia770_init,
-        .timer          = &omap_timer,
+        .timer          = &omap1_timer,
 MACHINE_END
diff --git a/arch/arm/mach-omap1/board-osk.c b/arch/arm/mach-omap1/board-osk.c
index e68dfde1918e..b08a21380772 100644
--- a/arch/arm/mach-omap1/board-osk.c
+++ b/arch/arm/mach-omap1/board-osk.c
@@ -282,7 +282,7 @@ static void __init osk_init_cf(void)
 static void __init osk_init_irq(void)
 {
         omap1_init_common_hw();
-        omap_init_irq();
+        omap1_init_irq();
 }
 
 static struct omap_usb_config osk_usb_config __initdata = {
@@ -588,5 +588,5 @@ MACHINE_START(OMAP_OSK, "TI-OSK")
         .reserve        = omap_reserve,
         .init_irq       = osk_init_irq,
         .init_machine   = osk_init,
-        .timer          = &omap_timer,
+        .timer          = &omap1_timer,
 MACHINE_END
diff --git a/arch/arm/mach-omap1/board-palmte.c b/arch/arm/mach-omap1/board-palmte.c
index c9d38f47845f..459cb6bfed55 100644
--- a/arch/arm/mach-omap1/board-palmte.c
+++ b/arch/arm/mach-omap1/board-palmte.c
@@ -62,7 +62,7 @@
 static void __init omap_palmte_init_irq(void)
 {
         omap1_init_common_hw();
-        omap_init_irq();
+        omap1_init_irq();
 }
 
 static const unsigned int palmte_keymap[] = {
@@ -280,5 +280,5 @@ MACHINE_START(OMAP_PALMTE, "OMAP310 based Palm Tungsten E")
         .reserve        = omap_reserve,
         .init_irq       = omap_palmte_init_irq,
         .init_machine   = omap_palmte_init,
-        .timer          = &omap_timer,
+        .timer          = &omap1_timer,
 MACHINE_END
diff --git a/arch/arm/mach-omap1/board-palmtt.c b/arch/arm/mach-omap1/board-palmtt.c
index f04f2d36e7d3..b214f45f646c 100644
--- a/arch/arm/mach-omap1/board-palmtt.c
+++ b/arch/arm/mach-omap1/board-palmtt.c
@@ -266,7 +266,7 @@ static struct spi_board_info __initdata palmtt_boardinfo[] = {
 static void __init omap_palmtt_init_irq(void)
 {
         omap1_init_common_hw();
-        omap_init_irq();
+        omap1_init_irq();
 }
 
 static struct omap_usb_config palmtt_usb_config __initdata = {
@@ -326,5 +326,5 @@ MACHINE_START(OMAP_PALMTT, "OMAP1510 based Palm Tungsten|T")
         .reserve        = omap_reserve,
         .init_irq       = omap_palmtt_init_irq,
         .init_machine   = omap_palmtt_init,
-        .timer          = &omap_timer,
+        .timer          = &omap1_timer,
 MACHINE_END
diff --git a/arch/arm/mach-omap1/board-palmz71.c b/arch/arm/mach-omap1/board-palmz71.c
index 45f01d2c3a7a..9b0ea48d35fd 100644
--- a/arch/arm/mach-omap1/board-palmz71.c
+++ b/arch/arm/mach-omap1/board-palmz71.c
@@ -61,7 +61,7 @@ static void __init
 omap_palmz71_init_irq(void)
 {
         omap1_init_common_hw();
-        omap_init_irq();
+        omap1_init_irq();
 }
 
 static const unsigned int palmz71_keymap[] = {
@@ -346,5 +346,5 @@ MACHINE_START(OMAP_PALMZ71, "OMAP310 based Palm Zire71")
         .reserve        = omap_reserve,
         .init_irq       = omap_palmz71_init_irq,
         .init_machine   = omap_palmz71_init,
-        .timer          = &omap_timer,
+        .timer          = &omap1_timer,
 MACHINE_END
diff --git a/arch/arm/mach-omap1/board-perseus2.c b/arch/arm/mach-omap1/board-perseus2.c
index 3c8ee8489458..67acd4142639 100644
--- a/arch/arm/mach-omap1/board-perseus2.c
+++ b/arch/arm/mach-omap1/board-perseus2.c
@@ -297,7 +297,7 @@ static void __init omap_perseus2_init(void)
 static void __init omap_perseus2_init_irq(void)
 {
         omap1_init_common_hw();
-        omap_init_irq();
+        omap1_init_irq();
 }
 /* Only FPGA needs to be mapped here. All others are done with ioremap */
 static struct map_desc omap_perseus2_io_desc[] __initdata = {
@@ -355,5 +355,5 @@ MACHINE_START(OMAP_PERSEUS2, "OMAP730 Perseus2")
         .reserve        = omap_reserve,
         .init_irq       = omap_perseus2_init_irq,
         .init_machine   = omap_perseus2_init,
-        .timer          = &omap_timer,
+        .timer          = &omap1_timer,
 MACHINE_END
diff --git a/arch/arm/mach-omap1/board-sx1.c b/arch/arm/mach-omap1/board-sx1.c
index 0ad781db4e66..9c3b7c52d9cf 100644
--- a/arch/arm/mach-omap1/board-sx1.c
+++ b/arch/arm/mach-omap1/board-sx1.c
@@ -411,7 +411,7 @@ static void __init omap_sx1_init(void)
 static void __init omap_sx1_init_irq(void)
 {
         omap1_init_common_hw();
-        omap_init_irq();
+        omap1_init_irq();
 }
 /*----------------------------------------*/
 
@@ -426,5 +426,5 @@ MACHINE_START(SX1, "OMAP310 based Siemens SX1")
         .reserve        = omap_reserve,
         .init_irq       = omap_sx1_init_irq,
         .init_machine   = omap_sx1_init,
-        .timer          = &omap_timer,
+        .timer          = &omap1_timer,
 MACHINE_END
diff --git a/arch/arm/mach-omap1/board-voiceblue.c b/arch/arm/mach-omap1/board-voiceblue.c
index 65d24204937a..036edc0ee9b6 100644
--- a/arch/arm/mach-omap1/board-voiceblue.c
+++ b/arch/arm/mach-omap1/board-voiceblue.c
@@ -162,7 +162,7 @@ static struct omap_board_config_kernel voiceblue_config[] = {
 static void __init voiceblue_init_irq(void)
 {
         omap1_init_common_hw();
-        omap_init_irq();
+        omap1_init_irq();
 }
 
 static void __init voiceblue_map_io(void)
@@ -306,5 +306,5 @@ MACHINE_START(VOICEBLUE, "VoiceBlue OMAP5910")
         .reserve        = omap_reserve,
         .init_irq       = voiceblue_init_irq,
         .init_machine   = voiceblue_init,
-        .timer          = &omap_timer,
+        .timer          = &omap1_timer,
 MACHINE_END
diff --git a/arch/arm/mach-omap1/irq.c b/arch/arm/mach-omap1/irq.c
index 5d3da7a63af3..e2b9c901ab67 100644
--- a/arch/arm/mach-omap1/irq.c
+++ b/arch/arm/mach-omap1/irq.c
@@ -175,7 +175,7 @@ static struct irq_chip omap_irq_chip = {
         .irq_set_wake   = omap_wake_irq,
 };
 
-void __init omap_init_irq(void)
+void __init omap1_init_irq(void)
 {
         int i, j;
 
diff --git a/arch/arm/mach-omap1/mcbsp.c b/arch/arm/mach-omap1/mcbsp.c
index d9af9811dedd..ab7395d84bc8 100644
--- a/arch/arm/mach-omap1/mcbsp.c
+++ b/arch/arm/mach-omap1/mcbsp.c
@@ -38,7 +38,7 @@ static void omap1_mcbsp_request(unsigned int id)
          * On 1510, 1610 and 1710, McBSP1 and McBSP3
          * are DSP public peripherals.
          */
-        if (id == OMAP_MCBSP1 || id == OMAP_MCBSP3) {
+        if (id == 0 || id == 2) {
                 if (dsp_use++ == 0) {
                         api_clk = clk_get(NULL, "api_ck");
                         dsp_clk = clk_get(NULL, "dsp_ck");
@@ -59,7 +59,7 @@ static void omap1_mcbsp_request(unsigned int id)
 
 static void omap1_mcbsp_free(unsigned int id)
 {
-        if (id == OMAP_MCBSP1 || id == OMAP_MCBSP3) {
+        if (id == 0 || id == 2) {
                 if (--dsp_use == 0) {
                         if (!IS_ERR(api_clk)) {
                                 clk_disable(api_clk);
diff --git a/arch/arm/mach-omap1/time.c b/arch/arm/mach-omap1/time.c
index 03e1e1062ad4..a1837771e031 100644
--- a/arch/arm/mach-omap1/time.c
+++ b/arch/arm/mach-omap1/time.c
@@ -297,7 +297,7 @@ static inline int omap_32k_timer_usable(void)
  * Timer initialization
  * ---------------------------------------------------------------------------
  */
-static void __init omap_timer_init(void)
+static void __init omap1_timer_init(void)
 {
         if (omap_32k_timer_usable()) {
                 preferred_sched_clock_init(1);
@@ -307,6 +307,6 @@ static void __init omap_timer_init(void)
         }
 }
 
-struct sys_timer omap_timer = {
-        .init           = omap_timer_init,
+struct sys_timer omap1_timer = {
+        .init           = omap1_timer_init,
 };
diff --git a/arch/arm/mach-omap1/timer32k.c b/arch/arm/mach-omap1/timer32k.c
index 13d7b8f145bd..96604a50c4fe 100644
--- a/arch/arm/mach-omap1/timer32k.c
+++ b/arch/arm/mach-omap1/timer32k.c
@@ -183,10 +183,6 @@ static __init void omap_init_32k_timer(void)
 bool __init omap_32k_timer_init(void)
 {
         omap_init_clocksource_32k();
-
-#ifdef CONFIG_OMAP_DM_TIMER
-        omap_dm_timer_init();
-#endif
         omap_init_32k_timer();
 
         return true;
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index b14807794401..f34336560437 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -3,7 +3,7 @@
 #
 
 # Common support
-obj-y := id.o io.o control.o mux.o devices.o serial.o gpmc.o timer-gp.o pm.o \
+obj-y := id.o io.o control.o mux.o devices.o serial.o gpmc.o timer.o pm.o \
          common.o gpio.o dma.o wd_timer.o
 
 omap-2-3-common                         = irq.o sdrc.o
@@ -145,9 +145,19 @@ obj-$(CONFIG_SOC_OMAP2420)		+= opp2420_data.o
 obj-$(CONFIG_SOC_OMAP2430)              += opp2430_data.o
 
 # hwmod data
-obj-$(CONFIG_SOC_OMAP2420)              += omap_hwmod_2420_data.o
-obj-$(CONFIG_SOC_OMAP2430)              += omap_hwmod_2430_data.o
-obj-$(CONFIG_ARCH_OMAP3)                += omap_hwmod_3xxx_data.o
+obj-$(CONFIG_SOC_OMAP2420)              += omap_hwmod_2xxx_ipblock_data.o \
+                                           omap_hwmod_2xxx_3xxx_ipblock_data.o \
+                                           omap_hwmod_2xxx_interconnect_data.o \
+                                           omap_hwmod_2xxx_3xxx_interconnect_data.o \
+                                           omap_hwmod_2420_data.o
+obj-$(CONFIG_SOC_OMAP2430)              += omap_hwmod_2xxx_ipblock_data.o \
+                                           omap_hwmod_2xxx_3xxx_ipblock_data.o \
+                                           omap_hwmod_2xxx_interconnect_data.o \
+                                           omap_hwmod_2xxx_3xxx_interconnect_data.o \
+                                           omap_hwmod_2430_data.o
+obj-$(CONFIG_ARCH_OMAP3)                += omap_hwmod_2xxx_3xxx_ipblock_data.o \
+                                           omap_hwmod_2xxx_3xxx_interconnect_data.o \
+                                           omap_hwmod_3xxx_data.o
 obj-$(CONFIG_ARCH_OMAP4)                += omap_hwmod_44xx_data.o
 
 # EMU peripherals
@@ -269,4 +279,4 @@ obj-$(CONFIG_ARCH_OMAP4)		+= hwspinlock.o
 disp-$(CONFIG_OMAP2_DSS)                := display.o
 obj-y                                   += $(disp-m) $(disp-y)
 
-obj-y                                   += common-board-devices.o
+obj-y                                   += common-board-devices.o twl-common.o
diff --git a/arch/arm/mach-omap2/board-2430sdp.c b/arch/arm/mach-omap2/board-2430sdp.c
index 5de6eac0a725..2028464cf5b9 100644
--- a/arch/arm/mach-omap2/board-2430sdp.c
+++ b/arch/arm/mach-omap2/board-2430sdp.c
@@ -260,7 +260,7 @@ MACHINE_START(OMAP_2430SDP, "OMAP2430 sdp2430 board")
         .reserve        = omap_reserve,
         .map_io         = omap_2430sdp_map_io,
         .init_early     = omap_2430sdp_init_early,
-        .init_irq       = omap_init_irq,
+        .init_irq       = omap2_init_irq,
         .init_machine   = omap_2430sdp_init,
-        .timer          = &omap_timer,
+        .timer          = &omap2_timer,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach-omap2/board-3430sdp.c
index 5dac974be625..bd600cfb7f80 100644
--- a/arch/arm/mach-omap2/board-3430sdp.c
+++ b/arch/arm/mach-omap2/board-3430sdp.c
@@ -231,22 +231,6 @@ static void __init omap_3430sdp_init_early(void)
         omap2_init_common_devices(hyb18m512160af6_sdrc_params, NULL);
 }
 
-static int sdp3430_batt_table[] = {
-/* 0 C*/
-30800, 29500, 28300, 27100,
-26000, 24900, 23900, 22900, 22000, 21100, 20300, 19400, 18700, 17900,
-17200, 16500, 15900, 15300, 14700, 14100, 13600, 13100, 12600, 12100,
-11600, 11200, 10800, 10400, 10000, 9630,   9280,   8950,   8620,   8310,
-8020,   7730,   7460,   7200,   6950,   6710,   6470,   6250,   6040,   5830,
-5640,   5450,   5260,   5090,   4920,   4760,   4600,   4450,   4310,   4170,
-4040,   3910,   3790,   3670,   3550
-};
-
-static struct twl4030_bci_platform_data sdp3430_bci_data = {
-        .battery_tmp_tbl        = sdp3430_batt_table,
-        .tblsize                = ARRAY_SIZE(sdp3430_batt_table),
-};
-
 static struct omap2_hsmmc_info mmc[] = {
         {
                 .mmc            = 1,
@@ -292,14 +276,6 @@ static struct twl4030_gpio_platform_data sdp3430_gpio_data = {
         .setup          = sdp3430_twl_gpio_setup,
 };
 
-static struct twl4030_usb_data sdp3430_usb_data = {
-        .usb_mode       = T2_USB_MODE_ULPI,
-};
-
-static struct twl4030_madc_platform_data sdp3430_madc_data = {
-        .irq_line       = 1,
-};
-
 /* regulator consumer mappings */
 
 /* ads7846 on SPI */
@@ -307,16 +283,6 @@ static struct regulator_consumer_supply sdp3430_vaux3_supplies[] = {
         REGULATOR_SUPPLY("vcc", "spi1.0"),
 };
 
-static struct regulator_consumer_supply sdp3430_vdda_dac_supplies[] = {
-        REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"),
-};
-
-/* VPLL2 for digital video outputs */
-static struct regulator_consumer_supply sdp3430_vpll2_supplies[] = {
-        REGULATOR_SUPPLY("vdds_dsi", "omapdss"),
-        REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"),
-};
-
 static struct regulator_consumer_supply sdp3430_vmmc1_supplies[] = {
         REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
 };
@@ -433,54 +399,10 @@ static struct regulator_init_data sdp3430_vsim = {
         .consumer_supplies      = sdp3430_vsim_supplies,
 };
 
-/* VDAC for DSS driving S-Video */
-static struct regulator_init_data sdp3430_vdac = {
-        .constraints = {
-                .min_uV                 = 1800000,
-                .max_uV                 = 1800000,
-                .apply_uV               = true,
-                .valid_modes_mask       = REGULATOR_MODE_NORMAL
-                                        | REGULATOR_MODE_STANDBY,
-                .valid_ops_mask         = REGULATOR_CHANGE_MODE
-                                        | REGULATOR_CHANGE_STATUS,
-        },
-        .num_consumer_supplies  = ARRAY_SIZE(sdp3430_vdda_dac_supplies),
-        .consumer_supplies      = sdp3430_vdda_dac_supplies,
-};
-
-static struct regulator_init_data sdp3430_vpll2 = {
-        .constraints = {
-                .name                   = "VDVI",
-                .min_uV                 = 1800000,
-                .max_uV                 = 1800000,
-                .apply_uV               = true,
-                .valid_modes_mask       = REGULATOR_MODE_NORMAL
-                                        | REGULATOR_MODE_STANDBY,
-                .valid_ops_mask         = REGULATOR_CHANGE_MODE
-                                        | REGULATOR_CHANGE_STATUS,
-        },
-        .num_consumer_supplies  = ARRAY_SIZE(sdp3430_vpll2_supplies),
-        .consumer_supplies      = sdp3430_vpll2_supplies,
-};
-
-static struct twl4030_codec_audio_data sdp3430_audio;
-
-static struct twl4030_codec_data sdp3430_codec = {
-        .audio_mclk = 26000000,
-        .audio = &sdp3430_audio,
-};
-
 static struct twl4030_platform_data sdp3430_twldata = {
-        .irq_base       = TWL4030_IRQ_BASE,
-        .irq_end        = TWL4030_IRQ_END,
-
         /* platform_data for children goes here */
-        .bci            = &sdp3430_bci_data,
         .gpio           = &sdp3430_gpio_data,
-        .madc           = &sdp3430_madc_data,
         .keypad         = &sdp3430_kp_data,
-        .usb            = &sdp3430_usb_data,
-        .codec          = &sdp3430_codec,
 
         .vaux1          = &sdp3430_vaux1,
         .vaux2          = &sdp3430_vaux2,
@@ -489,14 +411,21 @@ static struct twl4030_platform_data sdp3430_twldata = {
         .vmmc1          = &sdp3430_vmmc1,
         .vmmc2          = &sdp3430_vmmc2,
         .vsim           = &sdp3430_vsim,
-        .vdac           = &sdp3430_vdac,
-        .vpll2          = &sdp3430_vpll2,
 };
 
 static int __init omap3430_i2c_init(void)
 {
         /* i2c1 for PMIC only */
+        omap3_pmic_get_config(&sdp3430_twldata,
+                        TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_BCI |
+                        TWL_COMMON_PDATA_MADC | TWL_COMMON_PDATA_AUDIO,
+                        TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2);
+        sdp3430_twldata.vdac->constraints.apply_uV = true;
+        sdp3430_twldata.vpll2->constraints.apply_uV = true;
+        sdp3430_twldata.vpll2->constraints.name = "VDVI";
+
         omap3_pmic_init("twl4030", &sdp3430_twldata);
+
         /* i2c2 on camera connector (for sensor control) and optional isp1301 */
         omap_register_i2c_bus(2, 400, NULL, 0);
         /* i2c3 on display connector (for DVI, tfp410) */
@@ -804,7 +733,7 @@ MACHINE_START(OMAP_3430SDP, "OMAP3430 3430SDP board")
         .reserve        = omap_reserve,
         .map_io         = omap3_map_io,
         .init_early     = omap_3430sdp_init_early,
-        .init_irq       = omap_init_irq,
+        .init_irq       = omap3_init_irq,
         .init_machine   = omap_3430sdp_init,
-        .timer          = &omap_timer,
+        .timer          = &omap3_timer,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-3630sdp.c b/arch/arm/mach-omap2/board-3630sdp.c
index a5933cc15caa..e4f37b57a0c4 100644
--- a/arch/arm/mach-omap2/board-3630sdp.c
+++ b/arch/arm/mach-omap2/board-3630sdp.c
@@ -219,7 +219,7 @@ MACHINE_START(OMAP_3630SDP, "OMAP 3630SDP board")
         .reserve        = omap_reserve,
         .map_io         = omap3_map_io,
         .init_early     = omap_sdp_init_early,
-        .init_irq       = omap_init_irq,
+        .init_irq       = omap3_init_irq,
         .init_machine   = omap_sdp_init,
-        .timer          = &omap_timer,
+        .timer          = &omap3_timer,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c
index 63de2d396e2d..933b25bb10de 100644
--- a/arch/arm/mach-omap2/board-4430sdp.c
+++ b/arch/arm/mach-omap2/board-4430sdp.c
@@ -40,7 +40,6 @@
 
 #include "mux.h"
 #include "hsmmc.h"
-#include "timer-gp.h"
 #include "control.h"
 #include "common-board-devices.h"
 
@@ -295,9 +294,6 @@ static void __init omap_4430sdp_init_early(void)
 {
         omap2_init_common_infrastructure();
         omap2_init_common_devices(NULL, NULL);
-#ifdef CONFIG_OMAP_32K_TIMER
-        omap2_gp_clockevent_set_gptimer(1);
-#endif
 }
 
 static struct omap_musb_board_data musb_board_data = {
@@ -306,14 +302,6 @@ static struct omap_musb_board_data musb_board_data = {
         .power                  = 100,
 };
 
-static struct twl4030_usb_data omap4_usbphy_data = {
-        .phy_init       = omap4430_phy_init,
-        .phy_exit       = omap4430_phy_exit,
-        .phy_power      = omap4430_phy_power,
-        .phy_set_clock  = omap4430_phy_set_clk,
-        .phy_suspend    = omap4430_phy_suspend,
-};
-
 static struct omap2_hsmmc_info mmc[] = {
         {
                 .mmc            = 2,
@@ -333,16 +321,7 @@ static struct omap2_hsmmc_info mmc[] = {
 };
 
 static struct regulator_consumer_supply sdp4430_vaux_supply[] = {
-        {
-                .supply = "vmmc",
-                .dev_name = "omap_hsmmc.1",
-        },
-};
-static struct regulator_consumer_supply sdp4430_vmmc_supply[] = {
-        {
-                .supply = "vmmc",
-                .dev_name = "omap_hsmmc.0",
-        },
+        REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"),
 };
 
 static int omap4_twl6030_hsmmc_late_init(struct device *dev)
@@ -399,65 +378,10 @@ static struct regulator_init_data sdp4430_vaux1 = {
                                         | REGULATOR_CHANGE_MODE
                                         | REGULATOR_CHANGE_STATUS,
         },
-        .num_consumer_supplies  = 1,
+        .num_consumer_supplies  = ARRAY_SIZE(sdp4430_vaux_supply),
         .consumer_supplies      = sdp4430_vaux_supply,
 };
 
-static struct regulator_init_data sdp4430_vaux2 = {
-        .constraints = {
-                .min_uV                 = 1200000,
-                .max_uV                 = 2800000,
-                .apply_uV               = true,
-                .valid_modes_mask       = REGULATOR_MODE_NORMAL
-                                        | REGULATOR_MODE_STANDBY,
-                .valid_ops_mask  = REGULATOR_CHANGE_VOLTAGE
-                                        | REGULATOR_CHANGE_MODE
-                                        | REGULATOR_CHANGE_STATUS,
-        },
-};
-
-static struct regulator_init_data sdp4430_vaux3 = {
-        .constraints = {
-                .min_uV                 = 1000000,
-                .max_uV                 = 3000000,
-                .apply_uV               = true,
-                .valid_modes_mask       = REGULATOR_MODE_NORMAL
-                                        | REGULATOR_MODE_STANDBY,
-                .valid_ops_mask  = REGULATOR_CHANGE_VOLTAGE
-                                        | REGULATOR_CHANGE_MODE
-                                        | REGULATOR_CHANGE_STATUS,
-        },
-};
-
-/* VMMC1 for MMC1 card */
-static struct regulator_init_data sdp4430_vmmc = {
-        .constraints = {
-                .min_uV                 = 1200000,
-                .max_uV                 = 3000000,
-                .apply_uV               = true,
-                .valid_modes_mask       = REGULATOR_MODE_NORMAL
-                                        | REGULATOR_MODE_STANDBY,
-                .valid_ops_mask  = REGULATOR_CHANGE_VOLTAGE
-                                        | REGULATOR_CHANGE_MODE
-                                        | REGULATOR_CHANGE_STATUS,
-        },
-        .num_consumer_supplies  = 1,
-        .consumer_supplies      = sdp4430_vmmc_supply,
-};
-
-static struct regulator_init_data sdp4430_vpp = {
-        .constraints = {
-                .min_uV                 = 1800000,
-                .max_uV                 = 2500000,
-                .apply_uV               = true,
-                .valid_modes_mask       = REGULATOR_MODE_NORMAL
-                                        | REGULATOR_MODE_STANDBY,
-                .valid_ops_mask  = REGULATOR_CHANGE_VOLTAGE
-                                        | REGULATOR_CHANGE_MODE
-                                        | REGULATOR_CHANGE_STATUS,
-        },
-};
-
 static struct regulator_init_data sdp4430_vusim = {
         .constraints = {
                 .min_uV                 = 1200000,
@@ -471,74 +395,10 @@ static struct regulator_init_data sdp4430_vusim = {
         },
 };
 
-static struct regulator_init_data sdp4430_vana = {
-        .constraints = {
-                .min_uV                 = 2100000,
-                .max_uV                 = 2100000,
-                .valid_modes_mask       = REGULATOR_MODE_NORMAL
-                                        | REGULATOR_MODE_STANDBY,
-                .valid_ops_mask  = REGULATOR_CHANGE_MODE
-                                        | REGULATOR_CHANGE_STATUS,
-        },
-};
-
-static struct regulator_init_data sdp4430_vcxio = {
-        .constraints = {
-                .min_uV                 = 1800000,
-                .max_uV                 = 1800000,
-                .valid_modes_mask       = REGULATOR_MODE_NORMAL
-                                        | REGULATOR_MODE_STANDBY,
-                .valid_ops_mask  = REGULATOR_CHANGE_MODE
-                                        | REGULATOR_CHANGE_STATUS,
-        },
-};
-
-static struct regulator_init_data sdp4430_vdac = {
-        .constraints = {
-                .min_uV                 = 1800000,
-                .max_uV                 = 1800000,
-                .valid_modes_mask       = REGULATOR_MODE_NORMAL
-                                        | REGULATOR_MODE_STANDBY,
-                .valid_ops_mask  = REGULATOR_CHANGE_MODE
-                                        | REGULATOR_CHANGE_STATUS,
-        },
-};
-
-static struct regulator_init_data sdp4430_vusb = {
-        .constraints = {
-                .min_uV                 = 3300000,
-                .max_uV                 = 3300000,
-                .apply_uV               = true,
-                .valid_modes_mask       = REGULATOR_MODE_NORMAL
-                                        | REGULATOR_MODE_STANDBY,
-                .valid_ops_mask  =      REGULATOR_CHANGE_MODE
-                                        | REGULATOR_CHANGE_STATUS,
-        },
-};
-
-static struct regulator_init_data sdp4430_clk32kg = {
-        .constraints = {
-                .valid_ops_mask         = REGULATOR_CHANGE_STATUS,
-        },
-};
-
 static struct twl4030_platform_data sdp4430_twldata = {
-        .irq_base       = TWL6030_IRQ_BASE,
-        .irq_end        = TWL6030_IRQ_END,
-
         /* Regulators */
-        .vmmc           = &sdp4430_vmmc,
-        .vpp            = &sdp4430_vpp,
         .vusim          = &sdp4430_vusim,
-        .vana           = &sdp4430_vana,
-        .vcxio          = &sdp4430_vcxio,
-        .vdac           = &sdp4430_vdac,
-        .vusb           = &sdp4430_vusb,
         .vaux1          = &sdp4430_vaux1,
-        .vaux2          = &sdp4430_vaux2,
-        .vaux3          = &sdp4430_vaux3,
-        .clk32kg        = &sdp4430_clk32kg,
-        .usb            = &omap4_usbphy_data
 };
 
 static struct i2c_board_info __initdata sdp4430_i2c_3_boardinfo[] = {
@@ -556,6 +416,16 @@ static struct i2c_board_info __initdata sdp4430_i2c_4_boardinfo[] = {
 };
 static int __init omap4_i2c_init(void)
 {
+        omap4_pmic_get_config(&sdp4430_twldata, TWL_COMMON_PDATA_USB,
+                        TWL_COMMON_REGULATOR_VDAC |
+                        TWL_COMMON_REGULATOR_VAUX2 |
+                        TWL_COMMON_REGULATOR_VAUX3 |
+                        TWL_COMMON_REGULATOR_VMMC |
+                        TWL_COMMON_REGULATOR_VPP |
+                        TWL_COMMON_REGULATOR_VANA |
+                        TWL_COMMON_REGULATOR_VCXIO |
+                        TWL_COMMON_REGULATOR_VUSB |
+                        TWL_COMMON_REGULATOR_CLK32KG);
         omap4_pmic_init("twl6030", &sdp4430_twldata);
         omap_register_i2c_bus(2, 400, NULL, 0);
         omap_register_i2c_bus(3, 400, sdp4430_i2c_3_boardinfo,
@@ -773,5 +643,5 @@ MACHINE_START(OMAP_4430SDP, "OMAP4430 4430SDP board")
         .init_early     = omap_4430sdp_init_early,
         .init_irq       = gic_init_irq,
         .init_machine   = omap_4430sdp_init,
-        .timer          = &omap_timer,
+        .timer          = &omap4_timer,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-am3517crane.c b/arch/arm/mach-omap2/board-am3517crane.c
index 5e438a77cd72..5f2b55ff04ff 100644
--- a/arch/arm/mach-omap2/board-am3517crane.c
+++ b/arch/arm/mach-omap2/board-am3517crane.c
@@ -104,7 +104,7 @@ MACHINE_START(CRANEBOARD, "AM3517/05 CRANEBOARD")
         .reserve        = omap_reserve,
         .map_io         = omap3_map_io,
         .init_early     = am3517_crane_init_early,
-        .init_irq       = omap_init_irq,
+        .init_irq       = omap3_init_irq,
         .init_machine   = am3517_crane_init,
-        .timer          = &omap_timer,
+        .timer          = &omap3_timer,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-am3517evm.c b/arch/arm/mach-omap2/board-am3517evm.c
index 63af4171c043..f3006c304150 100644
--- a/arch/arm/mach-omap2/board-am3517evm.c
+++ b/arch/arm/mach-omap2/board-am3517evm.c
@@ -494,7 +494,7 @@ MACHINE_START(OMAP3517EVM, "OMAP3517/AM3517 EVM")
         .reserve        = omap_reserve,
         .map_io         = omap3_map_io,
         .init_early     = am3517_evm_init_early,
-        .init_irq       = omap_init_irq,
+        .init_irq       = omap3_init_irq,
         .init_machine   = am3517_evm_init,
-        .timer          = &omap_timer,
+        .timer          = &omap3_timer,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-apollon.c b/arch/arm/mach-omap2/board-apollon.c
index b124bdfb4239..70211703ff9f 100644
--- a/arch/arm/mach-omap2/board-apollon.c
+++ b/arch/arm/mach-omap2/board-apollon.c
@@ -354,7 +354,7 @@ MACHINE_START(OMAP_APOLLON, "OMAP24xx Apollon")
         .reserve        = omap_reserve,
         .map_io         = omap_apollon_map_io,
         .init_early     = omap_apollon_init_early,
-        .init_irq       = omap_init_irq,
+        .init_irq       = omap2_init_irq,
         .init_machine   = omap_apollon_init,
-        .timer          = &omap_timer,
+        .timer          = &omap2_timer,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach-omap2/board-cm-t35.c
index 77456dec93ea..35891d49c631 100644
--- a/arch/arm/mach-omap2/board-cm-t35.c
+++ b/arch/arm/mach-omap2/board-cm-t35.c
@@ -162,9 +162,7 @@ static struct mtd_partition cm_t35_nand_partitions[] = {
 static struct omap_nand_platform_data cm_t35_nand_data = {
         .parts                  = cm_t35_nand_partitions,
         .nr_parts               = ARRAY_SIZE(cm_t35_nand_partitions),
-        .dma_channel            = -1,   /* disable DMA in OMAP NAND driver */
         .cs                     = 0,
-
 };
 
 static void __init cm_t35_init_nand(void)
@@ -337,19 +335,17 @@ static void __init cm_t35_init_display(void)
         }
 }
 
-static struct regulator_consumer_supply cm_t35_vmmc1_supply = {
-        .supply                 = "vmmc",
+static struct regulator_consumer_supply cm_t35_vmmc1_supply[] = {
+        REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
 };
 
-static struct regulator_consumer_supply cm_t35_vsim_supply = {
-        .supply                 = "vmmc_aux",
+static struct regulator_consumer_supply cm_t35_vsim_supply[] = {
+        REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"),
 };
 
-static struct regulator_consumer_supply cm_t35_vdac_supply =
-        REGULATOR_SUPPLY("vdda_dac", "omapdss_venc");
-
-static struct regulator_consumer_supply cm_t35_vdvi_supply =
-        REGULATOR_SUPPLY("vdvi", "omapdss");
+static struct regulator_consumer_supply cm_t35_vdvi_supply[] = {
+        REGULATOR_SUPPLY("vdvi", "omapdss"),
+};
 
 /* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */
 static struct regulator_init_data cm_t35_vmmc1 = {
@@ -362,8 +358,8 @@ static struct regulator_init_data cm_t35_vmmc1 = {
                                         | REGULATOR_CHANGE_MODE
                                         | REGULATOR_CHANGE_STATUS,
         },
-        .num_consumer_supplies  = 1,
-        .consumer_supplies      = &cm_t35_vmmc1_supply,
+        .num_consumer_supplies  = ARRAY_SIZE(cm_t35_vmmc1_supply),
+        .consumer_supplies      = cm_t35_vmmc1_supply,
 };
 
 /* VSIM for MMC1 pins DAT4..DAT7 (2 mA, plus card == max 50 mA) */
@@ -377,41 +373,8 @@ static struct regulator_init_data cm_t35_vsim = {
                                         | REGULATOR_CHANGE_MODE
                                         | REGULATOR_CHANGE_STATUS,
         },
-        .num_consumer_supplies  = 1,
-        .consumer_supplies      = &cm_t35_vsim_supply,
-};
-
-/* VDAC for DSS driving S-Video (8 mA unloaded, max 65 mA) */
-static struct regulator_init_data cm_t35_vdac = {
-        .constraints = {
-                .min_uV                 = 1800000,
-                .max_uV                 = 1800000,
-                .valid_modes_mask       = REGULATOR_MODE_NORMAL
-                                        | REGULATOR_MODE_STANDBY,
-                .valid_ops_mask         = REGULATOR_CHANGE_MODE
-                                        | REGULATOR_CHANGE_STATUS,
-        },
-        .num_consumer_supplies  = 1,
-        .consumer_supplies      = &cm_t35_vdac_supply,
-};
-
-/* VPLL2 for digital video outputs */
-static struct regulator_init_data cm_t35_vpll2 = {
-        .constraints = {
-                .name                   = "VDVI",
-                .min_uV                 = 1800000,
-                .max_uV                 = 1800000,
-                .valid_modes_mask       = REGULATOR_MODE_NORMAL
-                                        | REGULATOR_MODE_STANDBY,
-                .valid_ops_mask         = REGULATOR_CHANGE_MODE
-                                        | REGULATOR_CHANGE_STATUS,
-        },
-        .num_consumer_supplies  = 1,
-        .consumer_supplies      = &cm_t35_vdvi_supply,
-};
-
-static struct twl4030_usb_data cm_t35_usb_data = {
-        .usb_mode       = T2_USB_MODE_ULPI,
+        .num_consumer_supplies  = ARRAY_SIZE(cm_t35_vsim_supply),
+        .consumer_supplies      = cm_t35_vsim_supply,
 };
 
 static uint32_t cm_t35_keymap[] = {
@@ -481,10 +444,6 @@ static int cm_t35_twl_gpio_setup(struct device *dev, unsigned gpio,
         mmc[0].gpio_cd = gpio + 0;
         omap2_hsmmc_init(mmc);
 
-        /* link regulators to MMC adapters */
-        cm_t35_vmmc1_supply.dev = mmc[0].dev;
-        cm_t35_vsim_supply.dev = mmc[0].dev;
-
         return 0;
 }
 
@@ -496,21 +455,23 @@ static struct twl4030_gpio_platform_data cm_t35_gpio_data = {
 };
 
 static struct twl4030_platform_data cm_t35_twldata = {
-        .irq_base       = TWL4030_IRQ_BASE,
-        .irq_end        = TWL4030_IRQ_END,
-
         /* platform_data for children goes here */
         .keypad         = &cm_t35_kp_data,
-        .usb            = &cm_t35_usb_data,
         .gpio           = &cm_t35_gpio_data,
         .vmmc1          = &cm_t35_vmmc1,
         .vsim           = &cm_t35_vsim,
-        .vdac           = &cm_t35_vdac,
-        .vpll2          = &cm_t35_vpll2,
 };
 
 static void __init cm_t35_init_i2c(void)
 {
+        omap3_pmic_get_config(&cm_t35_twldata, TWL_COMMON_PDATA_USB,
+                        TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2);
+
+        cm_t35_twldata.vpll2->constraints.name = "VDVI";
+        cm_t35_twldata.vpll2->num_consumer_supplies =
+                                                ARRAY_SIZE(cm_t35_vdvi_supply);
+        cm_t35_twldata.vpll2->consumer_supplies = cm_t35_vdvi_supply;
+
         omap3_pmic_init("tps65930", &cm_t35_twldata);
 }
 
@@ -646,7 +607,7 @@ MACHINE_START(CM_T35, "Compulab CM-T35")
         .reserve        = omap_reserve,
         .map_io         = omap3_map_io,
         .init_early     = cm_t35_init_early,
-        .init_irq       = omap_init_irq,
+        .init_irq       = omap3_init_irq,
         .init_machine   = cm_t35_init,
-        .timer          = &omap_timer,
+        .timer          = &omap3_timer,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-cm-t3517.c b/arch/arm/mach-omap2/board-cm-t3517.c
index c3a9fd35034a..05c72f4c1b57 100644
--- a/arch/arm/mach-omap2/board-cm-t3517.c
+++ b/arch/arm/mach-omap2/board-cm-t3517.c
@@ -236,7 +236,6 @@ static struct mtd_partition cm_t3517_nand_partitions[] = {
 static struct omap_nand_platform_data cm_t3517_nand_data = {
         .parts                  = cm_t3517_nand_partitions,
         .nr_parts               = ARRAY_SIZE(cm_t3517_nand_partitions),
-        .dma_channel            = -1,   /* disable DMA in OMAP NAND driver */
         .cs                     = 0,
 };
 
@@ -304,7 +303,7 @@ MACHINE_START(CM_T3517, "Compulab CM-T3517")
         .reserve        = omap_reserve,
         .map_io         = omap3_map_io,
         .init_early     = cm_t3517_init_early,
-        .init_irq       = omap_init_irq,
+        .init_irq       = omap3_init_irq,
         .init_machine   = cm_t3517_init,
-        .timer          = &omap_timer,
+        .timer          = &omap3_timer,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-devkit8000.c b/arch/arm/mach-omap2/board-devkit8000.c
index 34956ec83296..b6002ec31c6a 100644
--- a/arch/arm/mach-omap2/board-devkit8000.c
+++ b/arch/arm/mach-omap2/board-devkit8000.c
@@ -58,7 +58,6 @@
 
 #include "mux.h"
 #include "hsmmc.h"
-#include "timer-gp.h"
 #include "common-board-devices.h"
 
 #define OMAP_DM9000_GPIO_IRQ    25
@@ -130,13 +129,14 @@ static void devkit8000_panel_disable_dvi(struct omap_dss_device *dssdev)
                 gpio_set_value_cansleep(dssdev->reset_gpio, 0);
 }
 
-static struct regulator_consumer_supply devkit8000_vmmc1_supply =
-        REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0");
-
+static struct regulator_consumer_supply devkit8000_vmmc1_supply[] = {
+        REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
+};
 
 /* ads7846 on SPI */
-static struct regulator_consumer_supply devkit8000_vio_supply =
-        REGULATOR_SUPPLY("vcc", "spi2.0");
+static struct regulator_consumer_supply devkit8000_vio_supply[] = {
+        REGULATOR_SUPPLY("vcc", "spi2.0"),
+};
 
 static struct panel_generic_dpi_data lcd_panel = {
         .name                   = "generic",
@@ -186,9 +186,6 @@ static struct omap_dss_board_info devkit8000_dss_data = {
         .default_device = &devkit8000_lcd_device,
 };
 
-static struct regulator_consumer_supply devkit8000_vdda_dac_supply =
-        REGULATOR_SUPPLY("vdda_dac", "omapdss_venc");
-
 static uint32_t board_keymap[] = {
         KEY(0, 0, KEY_1),
         KEY(1, 0, KEY_2),
@@ -284,22 +281,8 @@ static struct regulator_init_data devkit8000_vmmc1 = {
                                         | REGULATOR_CHANGE_MODE
                                         | REGULATOR_CHANGE_STATUS,
         },
-        .num_consumer_supplies  = 1,
-        .consumer_supplies      = &devkit8000_vmmc1_supply,
-};
-
-/* VDAC for DSS driving S-Video (8 mA unloaded, max 65 mA) */
-static struct regulator_init_data devkit8000_vdac = {
-        .constraints = {
-                .min_uV                 = 1800000,
-                .max_uV                 = 1800000,
-                .valid_modes_mask       = REGULATOR_MODE_NORMAL
-                                        | REGULATOR_MODE_STANDBY,
-                .valid_ops_mask         = REGULATOR_CHANGE_MODE
-                                        | REGULATOR_CHANGE_STATUS,
-        },
-        .num_consumer_supplies  = 1,
-        .consumer_supplies      = &devkit8000_vdda_dac_supply,
+        .num_consumer_supplies  = ARRAY_SIZE(devkit8000_vmmc1_supply),
+        .consumer_supplies      = devkit8000_vmmc1_supply,
 };
 
 /* VPLL1 for digital video outputs */
@@ -327,31 +310,14 @@ static struct regulator_init_data devkit8000_vio = {
                 .valid_ops_mask         = REGULATOR_CHANGE_MODE
                         | REGULATOR_CHANGE_STATUS,
         },
-        .num_consumer_supplies  = 1,
-        .consumer_supplies      = &devkit8000_vio_supply,
-};
-
-static struct twl4030_usb_data devkit8000_usb_data = {
-        .usb_mode       = T2_USB_MODE_ULPI,
-};
-
-static struct twl4030_codec_audio_data devkit8000_audio_data;
-
-static struct twl4030_codec_data devkit8000_codec_data = {
-        .audio_mclk = 26000000,
-        .audio = &devkit8000_audio_data,
+        .num_consumer_supplies  = ARRAY_SIZE(devkit8000_vio_supply),
+        .consumer_supplies      = devkit8000_vio_supply,
 };
 
 static struct twl4030_platform_data devkit8000_twldata = {
-        .irq_base       = TWL4030_IRQ_BASE,
-        .irq_end        = TWL4030_IRQ_END,
-
         /* platform_data for children goes here */
-        .usb            = &devkit8000_usb_data,
         .gpio           = &devkit8000_gpio_data,
-        .codec          = &devkit8000_codec_data,
         .vmmc1          = &devkit8000_vmmc1,
-        .vdac           = &devkit8000_vdac,
         .vpll1          = &devkit8000_vpll1,
         .vio            = &devkit8000_vio,
         .keypad         = &devkit8000_kp_data,
@@ -359,6 +325,9 @@ static struct twl4030_platform_data devkit8000_twldata = {
 
 static int __init devkit8000_i2c_init(void)
 {
+        omap3_pmic_get_config(&devkit8000_twldata,
+                          TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_AUDIO,
+                          TWL_COMMON_REGULATOR_VDAC);
         omap3_pmic_init("tps65930", &devkit8000_twldata);
         /* Bus 3 is attached to the DVI port where devices like the pico DLP
          * projector don't work reliably with 400kHz */
@@ -438,10 +407,7 @@ static void __init devkit8000_init_early(void)
 
 static void __init devkit8000_init_irq(void)
 {
-        omap_init_irq();
-#ifdef CONFIG_OMAP_32K_TIMER
-        omap2_gp_clockevent_set_gptimer(12);
-#endif
+        omap3_init_irq();
 }
 
 #define OMAP_DM9000_BASE        0x2c000000
@@ -707,5 +673,5 @@ MACHINE_START(DEVKIT8000, "OMAP3 Devkit8000")
         .init_early     = devkit8000_init_early,
         .init_irq       = devkit8000_init_irq,
         .init_machine   = devkit8000_init,
-        .timer          = &omap_timer,
+        .timer          = &omap3_secure_timer,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-flash.c b/arch/arm/mach-omap2/board-flash.c
index 729892fdcf2e..aa1b0cbe19d2 100644
--- a/arch/arm/mach-omap2/board-flash.c
+++ b/arch/arm/mach-omap2/board-flash.c
@@ -132,11 +132,7 @@ static struct gpmc_timings nand_timings = {
 };
 
 static struct omap_nand_platform_data board_nand_data = {
-        .nand_setup     = NULL,
         .gpmc_t         = &nand_timings,
-        .dma_channel    = -1,           /* disable DMA in OMAP NAND driver */
-        .dev_ready      = NULL,
-        .devsize        = 0,    /* '0' for 8-bit, '1' for 16-bit device */
 };
 
 void
diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c
index 73e3c31e8508..54db41a84a9b 100644
--- a/arch/arm/mach-omap2/board-generic.c
+++ b/arch/arm/mach-omap2/board-generic.c
@@ -70,7 +70,7 @@ MACHINE_START(OMAP_GENERIC, "Generic OMAP24xx")
         .reserve        = omap_reserve,
         .map_io         = omap_generic_map_io,
         .init_early     = omap_generic_init_early,
-        .init_irq       = omap_init_irq,
+        .init_irq       = omap2_init_irq,
         .init_machine   = omap_generic_init,
-        .timer          = &omap_timer,
+        .timer          = &omap2_timer,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-h4.c b/arch/arm/mach-omap2/board-h4.c
index bac7933b8cbb..45de2b319ec9 100644
--- a/arch/arm/mach-omap2/board-h4.c
+++ b/arch/arm/mach-omap2/board-h4.c
@@ -298,7 +298,7 @@ static void __init omap_h4_init_early(void)
 
 static void __init omap_h4_init_irq(void)
 {
-        omap_init_irq();
+        omap2_init_irq();
 }
 
 static struct at24_platform_data m24c01 = {
@@ -388,5 +388,5 @@ MACHINE_START(OMAP_H4, "OMAP2420 H4 board")
         .init_early     = omap_h4_init_early,
         .init_irq       = omap_h4_init_irq,
         .init_machine   = omap_h4_init,
-        .timer          = &omap_timer,
+        .timer          = &omap2_timer,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-igep0020.c b/arch/arm/mach-omap2/board-igep0020.c
index 0c1bfca3f731..35be778caf1b 100644
--- a/arch/arm/mach-omap2/board-igep0020.c
+++ b/arch/arm/mach-omap2/board-igep0020.c
@@ -222,8 +222,9 @@ static inline void __init igep2_init_smsc911x(void)
 static inline void __init igep2_init_smsc911x(void) { }
 #endif
 
-static struct regulator_consumer_supply igep_vmmc1_supply =
-        REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0");
+static struct regulator_consumer_supply igep_vmmc1_supply[] = {
+        REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
+};
 
 /* VMMC1 for OMAP VDD_MMC1 (i/o) and MMC1 card */
 static struct regulator_init_data igep_vmmc1 = {
@@ -236,12 +237,13 @@ static struct regulator_init_data igep_vmmc1 = {
                                         | REGULATOR_CHANGE_MODE
                                         | REGULATOR_CHANGE_STATUS,
         },
-        .num_consumer_supplies  = 1,
-        .consumer_supplies      = &igep_vmmc1_supply,
+        .num_consumer_supplies  = ARRAY_SIZE(igep_vmmc1_supply),
+        .consumer_supplies      = igep_vmmc1_supply,
 };
 
-static struct regulator_consumer_supply igep_vio_supply =
-        REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.1");
+static struct regulator_consumer_supply igep_vio_supply[] = {
+        REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.1"),
+};
 
 static struct regulator_init_data igep_vio = {
         .constraints = {
@@ -254,20 +256,21 @@ static struct regulator_init_data igep_vio = {
                                         | REGULATOR_CHANGE_MODE
                                         | REGULATOR_CHANGE_STATUS,
         },
-        .num_consumer_supplies  = 1,
-        .consumer_supplies      = &igep_vio_supply,
+        .num_consumer_supplies  = ARRAY_SIZE(igep_vio_supply),
+        .consumer_supplies      = igep_vio_supply,
 };
 
-static struct regulator_consumer_supply igep_vmmc2_supply =
-        REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1");
+static struct regulator_consumer_supply igep_vmmc2_supply[] = {
+        REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"),
+};
 
 static struct regulator_init_data igep_vmmc2 = {
         .constraints            = {
                 .valid_modes_mask       = REGULATOR_MODE_NORMAL,
                 .always_on              = 1,
         },
-        .num_consumer_supplies  = 1,
-        .consumer_supplies      = &igep_vmmc2_supply,
+        .num_consumer_supplies  = ARRAY_SIZE(igep_vmmc2_supply),
+        .consumer_supplies      = igep_vmmc2_supply,
 };
 
 static struct fixed_voltage_config igep_vwlan = {
@@ -440,10 +443,6 @@ static struct twl4030_gpio_platform_data igep_twl4030_gpio_pdata = {
         .setup          = igep_twl_gpio_setup,
 };
 
-static struct twl4030_usb_data igep_usb_data = {
-        .usb_mode       = T2_USB_MODE_ULPI,
-};
-
 static int igep2_enable_dvi(struct omap_dss_device *dssdev)
 {
         gpio_direction_output(IGEP2_GPIO_DVI_PUP, 1);
@@ -480,26 +479,6 @@ static struct omap_dss_board_info igep2_dss_data = {
         .default_device = &igep2_dvi_device,
 };
 
-static struct regulator_consumer_supply igep2_vpll2_supplies[] = {
-        REGULATOR_SUPPLY("vdds_dsi", "omapdss"),
-        REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"),
-};
-
-static struct regulator_init_data igep2_vpll2 = {
-        .constraints = {
-                .name                   = "VDVI",
-                .min_uV                 = 1800000,
-                .max_uV                 = 1800000,
-                .apply_uV               = true,
-                .valid_modes_mask       = REGULATOR_MODE_NORMAL
-                                        | REGULATOR_MODE_STANDBY,
-                .valid_ops_mask         = REGULATOR_CHANGE_MODE
-                                        | REGULATOR_CHANGE_STATUS,
-        },
-        .num_consumer_supplies  = ARRAY_SIZE(igep2_vpll2_supplies),
-        .consumer_supplies      = igep2_vpll2_supplies,
-};
-
 static void __init igep2_display_init(void)
 {
         int err = gpio_request_one(IGEP2_GPIO_DVI_PUP, GPIOF_OUT_INIT_HIGH,
@@ -519,13 +498,6 @@ static void __init igep_init_early(void)
                                   m65kxxxxam_sdrc_params);
 }
 
-static struct twl4030_codec_audio_data igep2_audio_data;
-
-static struct twl4030_codec_data igep2_codec_data = {
-        .audio_mclk = 26000000,
-        .audio = &igep2_audio_data,
-};
-
 static int igep2_keymap[] = {
         KEY(0, 0, KEY_LEFT),
         KEY(0, 1, KEY_RIGHT),
@@ -558,11 +530,7 @@ static struct twl4030_keypad_data igep2_keypad_pdata = {
 };
 
 static struct twl4030_platform_data igep_twldata = {
-        .irq_base       = TWL4030_IRQ_BASE,
-        .irq_end        = TWL4030_IRQ_END,
-
         /* platform_data for children goes here */
-        .usb            = &igep_usb_data,
         .gpio           = &igep_twl4030_gpio_pdata,
         .vmmc1          = &igep_vmmc1,
         .vio            = &igep_vio,
@@ -578,6 +546,8 @@ static void __init igep_i2c_init(void)
 {
         int ret;
 
+        omap3_pmic_get_config(&igep_twldata, TWL_COMMON_PDATA_USB, 0);
+
         if (machine_is_igep0020()) {
                 /*
                  * Bus 3 is attached to the DVI port where devices like the
@@ -588,9 +558,12 @@ static void __init igep_i2c_init(void)
                 if (ret)
                         pr_warning("IGEP2: Could not register I2C3 bus (%d)\n", ret);
 
-                igep_twldata.codec      = &igep2_codec_data;
                 igep_twldata.keypad     = &igep2_keypad_pdata;
-                igep_twldata.vpll2      = &igep2_vpll2;
+                /* Get common pmic data */
+                omap3_pmic_get_config(&igep_twldata, TWL_COMMON_PDATA_AUDIO,
+                                      TWL_COMMON_REGULATOR_VPLL2);
+                igep_twldata.vpll2->constraints.apply_uV = true;
+                igep_twldata.vpll2->constraints.name = "VDVI";
         }
 
         omap3_pmic_init("twl4030", &igep_twldata);
@@ -703,9 +676,9 @@ MACHINE_START(IGEP0020, "IGEP v2 board")
         .reserve        = omap_reserve,
         .map_io         = omap3_map_io,
         .init_early     = igep_init_early,
-        .init_irq       = omap_init_irq,
+        .init_irq       = omap3_init_irq,
         .init_machine   = igep_init,
-        .timer          = &omap_timer,
+        .timer          = &omap3_timer,
 MACHINE_END
 
 MACHINE_START(IGEP0030, "IGEP OMAP3 module")
@@ -713,7 +686,7 @@ MACHINE_START(IGEP0030, "IGEP OMAP3 module")
         .reserve        = omap_reserve,
         .map_io         = omap3_map_io,
         .init_early     = igep_init_early,
-        .init_irq       = omap_init_irq,
+        .init_irq       = omap3_init_irq,
         .init_machine   = igep_init,
-        .timer          = &omap_timer,
+        .timer          = &omap3_timer,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c
index f7d6038075f0..218764c9377e 100644
--- a/arch/arm/mach-omap2/board-ldp.c
+++ b/arch/arm/mach-omap2/board-ldp.c
@@ -199,22 +199,14 @@ static void __init omap_ldp_init_early(void)
         omap2_init_common_devices(NULL, NULL);
 }
 
-static struct twl4030_usb_data ldp_usb_data = {
-        .usb_mode       = T2_USB_MODE_ULPI,
-};
-
 static struct twl4030_gpio_platform_data ldp_gpio_data = {
         .gpio_base      = OMAP_MAX_GPIO_LINES,
         .irq_base       = TWL4030_GPIO_IRQ_BASE,
         .irq_end        = TWL4030_GPIO_IRQ_END,
 };
 
-static struct twl4030_madc_platform_data ldp_madc_data = {
-        .irq_line       = 1,
-};
-
-static struct regulator_consumer_supply ldp_vmmc1_supply = {
-        .supply                 = "vmmc",
+static struct regulator_consumer_supply ldp_vmmc1_supply[] = {
+        REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
 };
 
 /* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */
@@ -228,8 +220,8 @@ static struct regulator_init_data ldp_vmmc1 = {
                                         | REGULATOR_CHANGE_MODE
                                         | REGULATOR_CHANGE_STATUS,
         },
-        .num_consumer_supplies  = 1,
-        .consumer_supplies      = &ldp_vmmc1_supply,
+        .num_consumer_supplies  = ARRAY_SIZE(ldp_vmmc1_supply),
+        .consumer_supplies      = ldp_vmmc1_supply,
 };
 
 /* ads7846 on SPI */
@@ -253,12 +245,7 @@ static struct regulator_init_data ldp_vaux1 = {
 };
 
 static struct twl4030_platform_data ldp_twldata = {
-        .irq_base       = TWL4030_IRQ_BASE,
-        .irq_end        = TWL4030_IRQ_END,
-
         /* platform_data for children goes here */
-        .madc           = &ldp_madc_data,
-        .usb            = &ldp_usb_data,
         .vmmc1          = &ldp_vmmc1,
         .vaux1          = &ldp_vaux1,
         .gpio           = &ldp_gpio_data,
@@ -267,6 +254,8 @@ static struct twl4030_platform_data ldp_twldata = {
 
 static int __init omap_i2c_init(void)
 {
+        omap3_pmic_get_config(&ldp_twldata,
+                          TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_MADC, 0);
         omap3_pmic_init("twl4030", &ldp_twldata);
         omap_register_i2c_bus(2, 400, NULL, 0);
         omap_register_i2c_bus(3, 400, NULL, 0);
@@ -341,8 +330,6 @@ static void __init omap_ldp_init(void)
                 ARRAY_SIZE(ldp_nand_partitions), ZOOM_NAND_CS, 0);
 
         omap2_hsmmc_init(mmc);
-        /* link regulators to MMC adapters */
-        ldp_vmmc1_supply.dev = mmc[0].dev;
 }
 
 MACHINE_START(OMAP_LDP, "OMAP LDP board")
@@ -350,7 +337,7 @@ MACHINE_START(OMAP_LDP, "OMAP LDP board")
         .reserve        = omap_reserve,
         .map_io         = omap3_map_io,
         .init_early     = omap_ldp_init_early,
-        .init_irq       = omap_init_irq,
+        .init_irq       = omap3_init_irq,
         .init_machine   = omap_ldp_init,
-        .timer          = &omap_timer,
+        .timer          = &omap3_timer,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-n8x0.c b/arch/arm/mach-omap2/board-n8x0.c
index 8d74318ed495..e11f0c5d608a 100644
--- a/arch/arm/mach-omap2/board-n8x0.c
+++ b/arch/arm/mach-omap2/board-n8x0.c
@@ -699,9 +699,9 @@ MACHINE_START(NOKIA_N800, "Nokia N800")
         .reserve        = omap_reserve,
         .map_io         = n8x0_map_io,
         .init_early     = n8x0_init_early,
-        .init_irq       = omap_init_irq,
+        .init_irq       = omap2_init_irq,
         .init_machine   = n8x0_init_machine,
-        .timer          = &omap_timer,
+        .timer          = &omap2_timer,
 MACHINE_END
 
 MACHINE_START(NOKIA_N810, "Nokia N810")
@@ -709,9 +709,9 @@ MACHINE_START(NOKIA_N810, "Nokia N810")
         .reserve        = omap_reserve,
         .map_io         = n8x0_map_io,
         .init_early     = n8x0_init_early,
-        .init_irq       = omap_init_irq,
+        .init_irq       = omap2_init_irq,
         .init_machine   = n8x0_init_machine,
-        .timer          = &omap_timer,
+        .timer          = &omap2_timer,
 MACHINE_END
 
 MACHINE_START(NOKIA_N810_WIMAX, "Nokia N810 WiMAX")
@@ -719,7 +719,7 @@ MACHINE_START(NOKIA_N810_WIMAX, "Nokia N810 WiMAX")
         .reserve        = omap_reserve,
         .map_io         = n8x0_map_io,
         .init_early     = n8x0_init_early,
-        .init_irq       = omap_init_irq,
+        .init_irq       = omap2_init_irq,
         .init_machine   = n8x0_init_machine,
-        .timer          = &omap_timer,
+        .timer          = &omap2_timer,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c
index 7f21d24bd437..34f841112768 100644
--- a/arch/arm/mach-omap2/board-omap3beagle.c
+++ b/arch/arm/mach-omap2/board-omap3beagle.c
@@ -50,7 +50,6 @@
 
 #include "mux.h"
 #include "hsmmc.h"
-#include "timer-gp.h"
 #include "pm.h"
 #include "common-board-devices.h"
 
@@ -210,14 +209,6 @@ static struct omap_dss_board_info beagle_dss_data = {
         .default_device = &beagle_dvi_device,
 };
 
-static struct regulator_consumer_supply beagle_vdac_supply =
-        REGULATOR_SUPPLY("vdda_dac", "omapdss_venc");
-
-static struct regulator_consumer_supply beagle_vdvi_supplies[] = {
-        REGULATOR_SUPPLY("vdds_dsi", "omapdss"),
-        REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"),
-};
-
 static void __init beagle_display_init(void)
 {
         int r;
@@ -239,12 +230,12 @@ static struct omap2_hsmmc_info mmc[] = {
         {}      /* Terminator */
 };
 
-static struct regulator_consumer_supply beagle_vmmc1_supply = {
-        .supply                 = "vmmc",
+static struct regulator_consumer_supply beagle_vmmc1_supply[] = {
+        REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
 };
 
-static struct regulator_consumer_supply beagle_vsim_supply = {
-        .supply                 = "vmmc_aux",
+static struct regulator_consumer_supply beagle_vsim_supply[] = {
+        REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"),
 };
 
 static struct gpio_led gpio_leds[];
@@ -267,10 +258,6 @@ static int beagle_twl_gpio_setup(struct device *dev,
         mmc[0].gpio_cd = gpio + 0;
         omap2_hsmmc_init(mmc);
 
-        /* link regulators to MMC adapters */
-        beagle_vmmc1_supply.dev = mmc[0].dev;
-        beagle_vsim_supply.dev = mmc[0].dev;
-
         /*
          * TWL4030_GPIO_MAX + 0 == ledA, EHCI nEN_USB_PWR (out, XM active
          * high / others active low)
@@ -336,8 +323,8 @@ static struct regulator_init_data beagle_vmmc1 = {
                                         | REGULATOR_CHANGE_MODE
                                         | REGULATOR_CHANGE_STATUS,
         },
-        .num_consumer_supplies  = 1,
-        .consumer_supplies      = &beagle_vmmc1_supply,
+        .num_consumer_supplies  = ARRAY_SIZE(beagle_vmmc1_supply),
+        .consumer_supplies      = beagle_vmmc1_supply,
 };
 
 /* VSIM for MMC1 pins DAT4..DAT7 (2 mA, plus card == max 50 mA) */
@@ -351,62 +338,15 @@ static struct regulator_init_data beagle_vsim = {
                                         | REGULATOR_CHANGE_MODE
                                         | REGULATOR_CHANGE_STATUS,
         },
-        .num_consumer_supplies  = 1,
-        .consumer_supplies      = &beagle_vsim_supply,
-};
-
-/* VDAC for DSS driving S-Video (8 mA unloaded, max 65 mA) */
-static struct regulator_init_data beagle_vdac = {
-        .constraints = {
-                .min_uV                 = 1800000,
-                .max_uV                 = 1800000,
-                .valid_modes_mask       = REGULATOR_MODE_NORMAL
-                                        | REGULATOR_MODE_STANDBY,
-                .valid_ops_mask         = REGULATOR_CHANGE_MODE
-                                        | REGULATOR_CHANGE_STATUS,
-        },
-        .num_consumer_supplies  = 1,
-        .consumer_supplies      = &beagle_vdac_supply,
-};
-
-/* VPLL2 for digital video outputs */
-static struct regulator_init_data beagle_vpll2 = {
-        .constraints = {
-                .name                   = "VDVI",
-                .min_uV                 = 1800000,
-                .max_uV                 = 1800000,
-                .valid_modes_mask       = REGULATOR_MODE_NORMAL
-                                        | REGULATOR_MODE_STANDBY,
-                .valid_ops_mask         = REGULATOR_CHANGE_MODE
-                                        | REGULATOR_CHANGE_STATUS,
-        },
-        .num_consumer_supplies  = ARRAY_SIZE(beagle_vdvi_supplies),
-        .consumer_supplies      = beagle_vdvi_supplies,
-};
-
-static struct twl4030_usb_data beagle_usb_data = {
-        .usb_mode       = T2_USB_MODE_ULPI,
-};
-
-static struct twl4030_codec_audio_data beagle_audio_data;
-
-static struct twl4030_codec_data beagle_codec_data = {
-        .audio_mclk = 26000000,
-        .audio = &beagle_audio_data,
+        .num_consumer_supplies  = ARRAY_SIZE(beagle_vsim_supply),
+        .consumer_supplies      = beagle_vsim_supply,
 };
 
 static struct twl4030_platform_data beagle_twldata = {
-        .irq_base       = TWL4030_IRQ_BASE,
-        .irq_end        = TWL4030_IRQ_END,
-
         /* platform_data for children goes here */
-        .usb            = &beagle_usb_data,
         .gpio           = &beagle_gpio_data,
-        .codec          = &beagle_codec_data,
         .vmmc1          = &beagle_vmmc1,
         .vsim           = &beagle_vsim,
-        .vdac           = &beagle_vdac,
-        .vpll2          = &beagle_vpll2,
 };
 
 static struct i2c_board_info __initdata beagle_i2c_eeprom[] = {
@@ -417,6 +357,12 @@ static struct i2c_board_info __initdata beagle_i2c_eeprom[] = {
 
 static int __init omap3_beagle_i2c_init(void)
 {
+        omap3_pmic_get_config(&beagle_twldata,
+                        TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_AUDIO,
+                        TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2);
+
+        beagle_twldata.vpll2->constraints.name = "VDVI";
+
         omap3_pmic_init("twl4030", &beagle_twldata);
         /* Bus 3 is attached to the DVI port where devices like the pico DLP
          * projector don't work reliably with 400kHz */
@@ -486,10 +432,7 @@ static void __init omap3_beagle_init_early(void)
 
 static void __init omap3_beagle_init_irq(void)
 {
-        omap_init_irq();
-#ifdef CONFIG_OMAP_32K_TIMER
-        omap2_gp_clockevent_set_gptimer(12);
-#endif
+        omap3_init_irq();
 }
 
 static struct platform_device *omap3_beagle_devices[] __initdata = {
@@ -599,5 +542,5 @@ MACHINE_START(OMAP3_BEAGLE, "OMAP3 Beagle Board")
         .init_early     = omap3_beagle_init_early,
         .init_irq       = omap3_beagle_init_irq,
         .init_machine   = omap3_beagle_init,
-        .timer          = &omap_timer,
+        .timer          = &omap3_secure_timer,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c
index b4d43464a303..c452b3f3331a 100644
--- a/arch/arm/mach-omap2/board-omap3evm.c
+++ b/arch/arm/mach-omap2/board-omap3evm.c
@@ -273,12 +273,12 @@ static struct omap_dss_board_info omap3_evm_dss_data = {
         .default_device = &omap3_evm_lcd_device,
 };
 
-static struct regulator_consumer_supply omap3evm_vmmc1_supply = {
-        .supply                 = "vmmc",
+static struct regulator_consumer_supply omap3evm_vmmc1_supply[] = {
+        REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
 };
 
-static struct regulator_consumer_supply omap3evm_vsim_supply = {
-        .supply                 = "vmmc_aux",
+static struct regulator_consumer_supply omap3evm_vsim_supply[] = {
+        REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"),
 };
 
 /* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */
@@ -292,8 +292,8 @@ static struct regulator_init_data omap3evm_vmmc1 = {
                                         | REGULATOR_CHANGE_MODE
                                         | REGULATOR_CHANGE_STATUS,
         },
-        .num_consumer_supplies  = 1,
-        .consumer_supplies      = &omap3evm_vmmc1_supply,
+        .num_consumer_supplies  = ARRAY_SIZE(omap3evm_vmmc1_supply),
+        .consumer_supplies      = omap3evm_vmmc1_supply,
 };
 
 /* VSIM for MMC1 pins DAT4..DAT7 (2 mA, plus card == max 50 mA) */
@@ -307,8 +307,8 @@ static struct regulator_init_data omap3evm_vsim = {
                                         | REGULATOR_CHANGE_MODE
                                         | REGULATOR_CHANGE_STATUS,
         },
-        .num_consumer_supplies  = 1,
-        .consumer_supplies      = &omap3evm_vsim_supply,
+        .num_consumer_supplies  = ARRAY_SIZE(omap3evm_vsim_supply),
+        .consumer_supplies      = omap3evm_vsim_supply,
 };
 
 static struct omap2_hsmmc_info mmc[] = {
@@ -365,10 +365,6 @@ static int omap3evm_twl_gpio_setup(struct device *dev,
         mmc[0].gpio_cd = gpio + 0;
         omap2_hsmmc_init(mmc);
 
-        /* link regulators to MMC adapters */
-        omap3evm_vmmc1_supply.dev = mmc[0].dev;
-        omap3evm_vsim_supply.dev = mmc[0].dev;
-
         /*
          * Most GPIOs are for USB OTG.  Some are mostly sent to
          * the P2 connector; notably LEDA for the LCD backlight.
@@ -400,10 +396,6 @@ static struct twl4030_gpio_platform_data omap3evm_gpio_data = {
         .setup          = omap3evm_twl_gpio_setup,
 };
 
-static struct twl4030_usb_data omap3evm_usb_data = {
-        .usb_mode       = T2_USB_MODE_ULPI,
-};
-
 static uint32_t board_keymap[] = {
         KEY(0, 0, KEY_LEFT),
         KEY(0, 1, KEY_DOWN),
@@ -438,58 +430,10 @@ static struct twl4030_keypad_data omap3evm_kp_data = {
         .rep            = 1,
 };
 
-static struct twl4030_madc_platform_data omap3evm_madc_data = {
-        .irq_line       = 1,
-};
-
-static struct twl4030_codec_audio_data omap3evm_audio_data;
-
-static struct twl4030_codec_data omap3evm_codec_data = {
-        .audio_mclk = 26000000,
-        .audio = &omap3evm_audio_data,
-};
-
-static struct regulator_consumer_supply omap3_evm_vdda_dac_supply =
-        REGULATOR_SUPPLY("vdda_dac", "omapdss_venc");
-
-/* VDAC for DSS driving S-Video */
-static struct regulator_init_data omap3_evm_vdac = {
-        .constraints = {
-                .min_uV                 = 1800000,
-                .max_uV                 = 1800000,
-                .apply_uV               = true,
-                .valid_modes_mask       = REGULATOR_MODE_NORMAL
-                                        | REGULATOR_MODE_STANDBY,
-                .valid_ops_mask         = REGULATOR_CHANGE_MODE
-                                        | REGULATOR_CHANGE_STATUS,
-        },
-        .num_consumer_supplies  = 1,
-        .consumer_supplies      = &omap3_evm_vdda_dac_supply,
-};
-
-/* VPLL2 for digital video outputs */
-static struct regulator_consumer_supply omap3_evm_vpll2_supplies[] = {
-        REGULATOR_SUPPLY("vdds_dsi", "omapdss"),
-        REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"),
-};
-
-static struct regulator_init_data omap3_evm_vpll2 = {
-        .constraints = {
-                .min_uV                 = 1800000,
-                .max_uV                 = 1800000,
-                .apply_uV               = true,
-                .valid_modes_mask       = REGULATOR_MODE_NORMAL
-                                        | REGULATOR_MODE_STANDBY,
-                .valid_ops_mask         = REGULATOR_CHANGE_MODE
-                                        | REGULATOR_CHANGE_STATUS,
-        },
-        .num_consumer_supplies  = ARRAY_SIZE(omap3_evm_vpll2_supplies),
-        .consumer_supplies      = omap3_evm_vpll2_supplies,
-};
-
 /* ads7846 on SPI */
-static struct regulator_consumer_supply omap3evm_vio_supply =
-        REGULATOR_SUPPLY("vcc", "spi1.0");
+static struct regulator_consumer_supply omap3evm_vio_supply[] = {
+        REGULATOR_SUPPLY("vcc", "spi1.0"),
+};
 
 /* VIO for ads7846 */
 static struct regulator_init_data omap3evm_vio = {
@@ -502,8 +446,8 @@ static struct regulator_init_data omap3evm_vio = {
                 .valid_ops_mask         = REGULATOR_CHANGE_MODE
                                         | REGULATOR_CHANGE_STATUS,
         },
-        .num_consumer_supplies  = 1,
-        .consumer_supplies      = &omap3evm_vio_supply,
+        .num_consumer_supplies  = ARRAY_SIZE(omap3evm_vio_supply),
+        .consumer_supplies      = omap3evm_vio_supply,
 };
 
 #ifdef CONFIG_WL12XX_PLATFORM_DATA
@@ -511,16 +455,17 @@ static struct regulator_init_data omap3evm_vio = {
 #define OMAP3EVM_WLAN_PMENA_GPIO        (150)
 #define OMAP3EVM_WLAN_IRQ_GPIO          (149)
 
-static struct regulator_consumer_supply omap3evm_vmmc2_supply =
-        REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1");
+static struct regulator_consumer_supply omap3evm_vmmc2_supply[] = {
+        REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"),
+};
 
 /* VMMC2 for driving the WL12xx module */
 static struct regulator_init_data omap3evm_vmmc2 = {
         .constraints = {
                 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
         },
-        .num_consumer_supplies  = 1,
-        .consumer_supplies = &omap3evm_vmmc2_supply,
+        .num_consumer_supplies  = ARRAY_SIZE(omap3evm_vmmc2_supply),
+        .consumer_supplies      = omap3evm_vmmc2_supply,
 };
 
 static struct fixed_voltage_config omap3evm_vwlan = {
@@ -548,17 +493,9 @@ struct wl12xx_platform_data omap3evm_wlan_data __initdata = {
 #endif
 
 static struct twl4030_platform_data omap3evm_twldata = {
-        .irq_base       = TWL4030_IRQ_BASE,
-        .irq_end        = TWL4030_IRQ_END,
-
         /* platform_data for children goes here */
         .keypad         = &omap3evm_kp_data,
-        .madc           = &omap3evm_madc_data,
-        .usb            = &omap3evm_usb_data,
         .gpio           = &omap3evm_gpio_data,
-        .codec          = &omap3evm_codec_data,
-        .vdac           = &omap3_evm_vdac,
-        .vpll2          = &omap3_evm_vpll2,
         .vio            = &omap3evm_vio,
         .vmmc1          = &omap3evm_vmmc1,
         .vsim           = &omap3evm_vsim,
@@ -566,6 +503,14 @@ static struct twl4030_platform_data omap3evm_twldata = {
 
 static int __init omap3_evm_i2c_init(void)
 {
+        omap3_pmic_get_config(&omap3evm_twldata,
+                        TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_MADC |
+                        TWL_COMMON_PDATA_AUDIO,
+                        TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2);
+
+        omap3evm_twldata.vdac->constraints.apply_uV = true;
+        omap3evm_twldata.vpll2->constraints.apply_uV = true;
+
         omap3_pmic_init("twl4030", &omap3evm_twldata);
         omap_register_i2c_bus(2, 400, NULL, 0);
         omap_register_i2c_bus(3, 400, NULL, 0);
@@ -740,7 +685,7 @@ MACHINE_START(OMAP3EVM, "OMAP3 EVM")
         .reserve        = omap_reserve,
         .map_io         = omap3_map_io,
         .init_early     = omap3_evm_init_early,
-        .init_irq       = omap_init_irq,
+        .init_irq       = omap3_init_irq,
         .init_machine   = omap3_evm_init,
-        .timer          = &omap_timer,
+        .timer          = &omap3_timer,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-omap3logic.c b/arch/arm/mach-omap2/board-omap3logic.c
index 60d9be49dbab..703aeb5b8fd4 100644
--- a/arch/arm/mach-omap2/board-omap3logic.c
+++ b/arch/arm/mach-omap2/board-omap3logic.c
@@ -35,7 +35,6 @@
 
 #include "mux.h"
 #include "hsmmc.h"
-#include "timer-gp.h"
 #include "control.h"
 #include "common-board-devices.h"
 
@@ -55,8 +54,8 @@
 #define OMAP3_TORPEDO_MMC_GPIO_CD               127
 #define OMAP3_TORPEDO_SMSC911X_GPIO_IRQ         129
 
-static struct regulator_consumer_supply omap3logic_vmmc1_supply = {
-        .supply                 = "vmmc",
+static struct regulator_consumer_supply omap3logic_vmmc1_supply[] = {
+        REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
 };
 
 /* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */
@@ -71,8 +70,8 @@ static struct regulator_init_data omap3logic_vmmc1 = {
                                         | REGULATOR_CHANGE_MODE
                                         | REGULATOR_CHANGE_STATUS,
         },
-        .num_consumer_supplies  = 1,
-        .consumer_supplies      = &omap3logic_vmmc1_supply,
+        .num_consumer_supplies  = ARRAY_SIZE(omap3logic_vmmc1_supply),
+        .consumer_supplies      = omap3logic_vmmc1_supply,
 };
 
 static struct twl4030_gpio_platform_data omap3logic_gpio_data = {
@@ -130,8 +129,6 @@ static void __init board_mmc_init(void)
         }
 
         omap2_hsmmc_init(board_mmc_info);
-        /* link regulators to MMC adapters */
-        omap3logic_vmmc1_supply.dev = board_mmc_info[0].dev;
 }
 
 static struct omap_smsc911x_platform_data __initdata board_smsc911x_data = {
@@ -215,16 +212,16 @@ MACHINE_START(OMAP3_TORPEDO, "Logic OMAP3 Torpedo board")
         .boot_params    = 0x80000100,
         .map_io         = omap3_map_io,
         .init_early     = omap3logic_init_early,
-        .init_irq       = omap_init_irq,
+        .init_irq       = omap3_init_irq,
         .init_machine   = omap3logic_init,
-        .timer          = &omap_timer,
+        .timer          = &omap3_timer,
 MACHINE_END
 
 MACHINE_START(OMAP3530_LV_SOM, "OMAP Logic 3530 LV SOM board")
         .boot_params    = 0x80000100,
         .map_io         = omap3_map_io,
         .init_early     = omap3logic_init_early,
-        .init_irq       = omap_init_irq,
+        .init_irq       = omap3_init_irq,
         .init_machine   = omap3logic_init,
-        .timer          = &omap_timer,
+        .timer          = &omap3_timer,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-omap3pandora.c b/arch/arm/mach-omap2/board-omap3pandora.c
index 23f71d40883e..080d7bd6795e 100644
--- a/arch/arm/mach-omap2/board-omap3pandora.c
+++ b/arch/arm/mach-omap2/board-omap3pandora.c
@@ -320,17 +320,17 @@ static struct twl4030_gpio_platform_data omap3pandora_gpio_data = {
         .setup          = omap3pandora_twl_gpio_setup,
 };
 
-static struct regulator_consumer_supply pandora_vmmc1_supply =
-        REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0");
-
-static struct regulator_consumer_supply pandora_vmmc2_supply =
-        REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1");
+static struct regulator_consumer_supply pandora_vmmc1_supply[] = {
+        REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
+};
 
-static struct regulator_consumer_supply pandora_vmmc3_supply =
-        REGULATOR_SUPPLY("vmmc", "omap_hsmmc.2");
+static struct regulator_consumer_supply pandora_vmmc2_supply[] = {
+        REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1")
+};
 
-static struct regulator_consumer_supply pandora_vdda_dac_supply =
-        REGULATOR_SUPPLY("vdda_dac", "omapdss_venc");
+static struct regulator_consumer_supply pandora_vmmc3_supply[] = {
+        REGULATOR_SUPPLY("vmmc", "omap_hsmmc.2"),
+};
 
 static struct regulator_consumer_supply pandora_vdds_supplies[] = {
         REGULATOR_SUPPLY("vdds_sdi", "omapdss"),
@@ -338,11 +338,13 @@ static struct regulator_consumer_supply pandora_vdds_supplies[] = {
         REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"),
 };
 
-static struct regulator_consumer_supply pandora_vcc_lcd_supply =
-        REGULATOR_SUPPLY("vcc", "display0");
+static struct regulator_consumer_supply pandora_vcc_lcd_supply[] = {
+        REGULATOR_SUPPLY("vcc", "display0"),
+};
 
-static struct regulator_consumer_supply pandora_usb_phy_supply =
-        REGULATOR_SUPPLY("hsusb0", "ehci-omap.0");
+static struct regulator_consumer_supply pandora_usb_phy_supply[] = {
+        REGULATOR_SUPPLY("hsusb0", "ehci-omap.0"),
+};
 
 /* ads7846 on SPI and 2 nub controllers on I2C */
 static struct regulator_consumer_supply pandora_vaux4_supplies[] = {
@@ -351,8 +353,9 @@ static struct regulator_consumer_supply pandora_vaux4_supplies[] = {
         REGULATOR_SUPPLY("vcc", "3-0067"),
 };
 
-static struct regulator_consumer_supply pandora_adac_supply =
-        REGULATOR_SUPPLY("vcc", "soc-audio");
+static struct regulator_consumer_supply pandora_adac_supply[] = {
+        REGULATOR_SUPPLY("vcc", "soc-audio"),
+};
 
 /* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */
 static struct regulator_init_data pandora_vmmc1 = {
@@ -365,8 +368,8 @@ static struct regulator_init_data pandora_vmmc1 = {
                                         | REGULATOR_CHANGE_MODE
                                         | REGULATOR_CHANGE_STATUS,
         },
-        .num_consumer_supplies  = 1,
-        .consumer_supplies      = &pandora_vmmc1_supply,
+        .num_consumer_supplies  = ARRAY_SIZE(pandora_vmmc1_supply),
+        .consumer_supplies      = pandora_vmmc1_supply,
 };
 
 /* VMMC2 for MMC2 pins CMD, CLK, DAT0..DAT3 (max 100 mA) */
@@ -380,38 +383,8 @@ static struct regulator_init_data pandora_vmmc2 = {
                                         | REGULATOR_CHANGE_MODE
                                         | REGULATOR_CHANGE_STATUS,
         },
-        .num_consumer_supplies  = 1,
-        .consumer_supplies      = &pandora_vmmc2_supply,
-};
-
-/* VDAC for DSS driving S-Video */
-static struct regulator_init_data pandora_vdac = {
-        .constraints = {
-                .min_uV                 = 1800000,
-                .max_uV                 = 1800000,
-                .apply_uV               = true,
-                .valid_modes_mask       = REGULATOR_MODE_NORMAL
-                                        | REGULATOR_MODE_STANDBY,
-                .valid_ops_mask         = REGULATOR_CHANGE_MODE
-                                        | REGULATOR_CHANGE_STATUS,
-        },
-        .num_consumer_supplies  = 1,
-        .consumer_supplies      = &pandora_vdda_dac_supply,
-};
-
-/* VPLL2 for digital video outputs */
-static struct regulator_init_data pandora_vpll2 = {
-        .constraints = {
-                .min_uV                 = 1800000,
-                .max_uV                 = 1800000,
-                .apply_uV               = true,
-                .valid_modes_mask       = REGULATOR_MODE_NORMAL
-                                        | REGULATOR_MODE_STANDBY,
-                .valid_ops_mask         = REGULATOR_CHANGE_MODE
-                                        | REGULATOR_CHANGE_STATUS,
-        },
-        .num_consumer_supplies  = ARRAY_SIZE(pandora_vdds_supplies),
-        .consumer_supplies      = pandora_vdds_supplies,
+        .num_consumer_supplies  = ARRAY_SIZE(pandora_vmmc2_supply),
+        .consumer_supplies      = pandora_vmmc2_supply,
 };
 
 /* VAUX1 for LCD */
@@ -425,8 +398,8 @@ static struct regulator_init_data pandora_vaux1 = {
                 .valid_ops_mask         = REGULATOR_CHANGE_MODE
                                         | REGULATOR_CHANGE_STATUS,
         },
-        .num_consumer_supplies  = 1,
-        .consumer_supplies      = &pandora_vcc_lcd_supply,
+        .num_consumer_supplies  = ARRAY_SIZE(pandora_vcc_lcd_supply),
+        .consumer_supplies      = pandora_vcc_lcd_supply,
 };
 
 /* VAUX2 for USB host PHY */
@@ -440,8 +413,8 @@ static struct regulator_init_data pandora_vaux2 = {
                 .valid_ops_mask         = REGULATOR_CHANGE_MODE
                                         | REGULATOR_CHANGE_STATUS,
         },
-        .num_consumer_supplies  = 1,
-        .consumer_supplies      = &pandora_usb_phy_supply,
+        .num_consumer_supplies  = ARRAY_SIZE(pandora_usb_phy_supply),
+        .consumer_supplies      = pandora_usb_phy_supply,
 };
 
 /* VAUX4 for ads7846 and nubs */
@@ -470,8 +443,8 @@ static struct regulator_init_data pandora_vsim = {
                 .valid_ops_mask         = REGULATOR_CHANGE_MODE
                                         | REGULATOR_CHANGE_STATUS,
         },
-        .num_consumer_supplies  = 1,
-        .consumer_supplies      = &pandora_adac_supply,
+        .num_consumer_supplies  = ARRAY_SIZE(pandora_adac_supply),
+        .consumer_supplies      = pandora_adac_supply,
 };
 
 /* Fixed regulator internal to Wifi module */
@@ -479,8 +452,8 @@ static struct regulator_init_data pandora_vmmc3 = {
         .constraints = {
                 .valid_ops_mask         = REGULATOR_CHANGE_STATUS,
         },
-        .num_consumer_supplies  = 1,
-        .consumer_supplies      = &pandora_vmmc3_supply,
+        .num_consumer_supplies  = ARRAY_SIZE(pandora_vmmc3_supply),
+        .consumer_supplies      = pandora_vmmc3_supply,
 };
 
 static struct fixed_voltage_config pandora_vwlan = {
@@ -501,29 +474,12 @@ static struct platform_device pandora_vwlan_device = {
         },
 };
 
-static struct twl4030_usb_data omap3pandora_usb_data = {
-        .usb_mode       = T2_USB_MODE_ULPI,
-};
-
-static struct twl4030_codec_audio_data omap3pandora_audio_data;
-
-static struct twl4030_codec_data omap3pandora_codec_data = {
-        .audio_mclk = 26000000,
-        .audio = &omap3pandora_audio_data,
-};
-
 static struct twl4030_bci_platform_data pandora_bci_data;
 
 static struct twl4030_platform_data omap3pandora_twldata = {
-        .irq_base       = TWL4030_IRQ_BASE,
-        .irq_end        = TWL4030_IRQ_END,
         .gpio           = &omap3pandora_gpio_data,
-        .usb            = &omap3pandora_usb_data,
-        .codec          = &omap3pandora_codec_data,
         .vmmc1          = &pandora_vmmc1,
         .vmmc2          = &pandora_vmmc2,
-        .vdac           = &pandora_vdac,
-        .vpll2          = &pandora_vpll2,
         .vaux1          = &pandora_vaux1,
         .vaux2          = &pandora_vaux2,
         .vaux4          = &pandora_vaux4,
@@ -541,6 +497,17 @@ static struct i2c_board_info __initdata omap3pandora_i2c3_boardinfo[] = {
 
 static int __init omap3pandora_i2c_init(void)
 {
+        omap3_pmic_get_config(&omap3pandora_twldata,
+                        TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_AUDIO,
+                        TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2);
+
+        omap3pandora_twldata.vdac->constraints.apply_uV = true;
+
+        omap3pandora_twldata.vpll2->constraints.apply_uV = true;
+        omap3pandora_twldata.vpll2->num_consumer_supplies =
+                                        ARRAY_SIZE(pandora_vdds_supplies);
+        omap3pandora_twldata.vpll2->consumer_supplies = pandora_vdds_supplies;
+
         omap3_pmic_init("tps65950", &omap3pandora_twldata);
         /* i2c2 pins are not connected */
         omap_register_i2c_bus(3, 100, omap3pandora_i2c3_boardinfo,
@@ -643,7 +610,7 @@ MACHINE_START(OMAP3_PANDORA, "Pandora Handheld Console")
         .reserve        = omap_reserve,
         .map_io         = omap3_map_io,
         .init_early     = omap3pandora_init_early,
-        .init_irq       = omap_init_irq,
+        .init_irq       = omap3_init_irq,
         .init_machine   = omap3pandora_init,
-        .timer          = &omap_timer,
+        .timer          = &omap3_timer,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-omap3stalker.c b/arch/arm/mach-omap2/board-omap3stalker.c
index 0c108a212ea2..8e104980ea26 100644
--- a/arch/arm/mach-omap2/board-omap3stalker.c
+++ b/arch/arm/mach-omap2/board-omap3stalker.c
@@ -52,7 +52,6 @@
 #include "sdram-micron-mt46h32m32lf-6.h"
 #include "mux.h"
 #include "hsmmc.h"
-#include "timer-gp.h"
 #include "common-board-devices.h"
 
 #if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
@@ -206,12 +205,12 @@ static struct omap_dss_board_info omap3_stalker_dss_data = {
         .default_device = &omap3_stalker_dvi_device,
 };
 
-static struct regulator_consumer_supply omap3stalker_vmmc1_supply = {
-        .supply         = "vmmc",
+static struct regulator_consumer_supply omap3stalker_vmmc1_supply[] = {
+        REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
 };
 
-static struct regulator_consumer_supply omap3stalker_vsim_supply = {
-        .supply         = "vmmc_aux",
+static struct regulator_consumer_supply omap3stalker_vsim_supply[] = {
+        REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"),
 };
 
 /* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */
@@ -224,8 +223,8 @@ static struct regulator_init_data omap3stalker_vmmc1 = {
                 .valid_ops_mask         = REGULATOR_CHANGE_VOLTAGE
                 | REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS,
         },
-        .num_consumer_supplies  = 1,
-        .consumer_supplies      = &omap3stalker_vmmc1_supply,
+        .num_consumer_supplies  = ARRAY_SIZE(omap3stalker_vmmc1_supply),
+        .consumer_supplies      = omap3stalker_vmmc1_supply,
 };
 
 /* VSIM for MMC1 pins DAT4..DAT7 (2 mA, plus card == max 50 mA) */
@@ -238,8 +237,8 @@ static struct regulator_init_data omap3stalker_vsim = {
                 .valid_ops_mask         = REGULATOR_CHANGE_VOLTAGE
                 | REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS,
         },
-        .num_consumer_supplies  = 1,
-        .consumer_supplies      = &omap3stalker_vsim_supply,
+        .num_consumer_supplies  = ARRAY_SIZE(omap3stalker_vsim_supply),
+        .consumer_supplies      = omap3stalker_vsim_supply,
 };
 
 static struct omap2_hsmmc_info mmc[] = {
@@ -321,10 +320,6 @@ omap3stalker_twl_gpio_setup(struct device *dev,
         mmc[0].gpio_cd = gpio + 0;
         omap2_hsmmc_init(mmc);
 
-        /* link regulators to MMC adapters */
-        omap3stalker_vmmc1_supply.dev = mmc[0].dev;
-        omap3stalker_vsim_supply.dev = mmc[0].dev;
-
         /*
          * Most GPIOs are for USB OTG.  Some are mostly sent to
          * the P2 connector; notably LEDA for the LCD backlight.
@@ -354,10 +349,6 @@ static struct twl4030_gpio_platform_data omap3stalker_gpio_data = {
         .setup          = omap3stalker_twl_gpio_setup,
 };
 
-static struct twl4030_usb_data omap3stalker_usb_data = {
-        .usb_mode       = T2_USB_MODE_ULPI,
-};
-
 static uint32_t board_keymap[] = {
         KEY(0, 0, KEY_LEFT),
         KEY(0, 1, KEY_DOWN),
@@ -392,68 +383,10 @@ static struct twl4030_keypad_data omap3stalker_kp_data = {
         .rep            = 1,
 };
 
-static struct twl4030_madc_platform_data omap3stalker_madc_data = {
-        .irq_line       = 1,
-};
-
-static struct twl4030_codec_audio_data omap3stalker_audio_data;
-
-static struct twl4030_codec_data omap3stalker_codec_data = {
-        .audio_mclk     = 26000000,
-        .audio          = &omap3stalker_audio_data,
-};
-
-static struct regulator_consumer_supply omap3_stalker_vdda_dac_supply =
-        REGULATOR_SUPPLY("vdda_dac", "omapdss_venc");
-
-/* VDAC for DSS driving S-Video */
-static struct regulator_init_data omap3_stalker_vdac = {
-        .constraints            = {
-                .min_uV                 = 1800000,
-                .max_uV                 = 1800000,
-                .apply_uV               = true,
-                .valid_modes_mask       = REGULATOR_MODE_NORMAL
-                | REGULATOR_MODE_STANDBY,
-                .valid_ops_mask         = REGULATOR_CHANGE_MODE
-                | REGULATOR_CHANGE_STATUS,
-        },
-        .num_consumer_supplies  = 1,
-        .consumer_supplies      = &omap3_stalker_vdda_dac_supply,
-};
-
-/* VPLL2 for digital video outputs */
-static struct regulator_consumer_supply omap3_stalker_vpll2_supplies[] = {
-        REGULATOR_SUPPLY("vdds_dsi", "omapdss"),
-        REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"),
-};
-
-static struct regulator_init_data omap3_stalker_vpll2 = {
-        .constraints            = {
-                .name                   = "VDVI",
-                .min_uV                 = 1800000,
-                .max_uV                 = 1800000,
-                .apply_uV = true,
-                .valid_modes_mask       = REGULATOR_MODE_NORMAL
-                | REGULATOR_MODE_STANDBY,
-                .valid_ops_mask         = REGULATOR_CHANGE_MODE
-                | REGULATOR_CHANGE_STATUS,
-        },
-        .num_consumer_supplies  = ARRAY_SIZE(omap3_stalker_vpll2_supplies),
-        .consumer_supplies      = omap3_stalker_vpll2_supplies,
-};
-
 static struct twl4030_platform_data omap3stalker_twldata = {
-        .irq_base       = TWL4030_IRQ_BASE,
-        .irq_end        = TWL4030_IRQ_END,
-
         /* platform_data for children goes here */
         .keypad         = &omap3stalker_kp_data,
-        .madc           = &omap3stalker_madc_data,
-        .usb            = &omap3stalker_usb_data,
         .gpio           = &omap3stalker_gpio_data,
-        .codec          = &omap3stalker_codec_data,
-        .vdac           = &omap3_stalker_vdac,
-        .vpll2          = &omap3_stalker_vpll2,
         .vmmc1          = &omap3stalker_vmmc1,
         .vsim           = &omap3stalker_vsim,
 };
@@ -474,6 +407,15 @@ static struct i2c_board_info __initdata omap3stalker_i2c_boardinfo3[] = {
 
 static int __init omap3_stalker_i2c_init(void)
 {
+        omap3_pmic_get_config(&omap3stalker_twldata,
+                        TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_MADC |
+                        TWL_COMMON_PDATA_AUDIO,
+                        TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2);
+
+        omap3stalker_twldata.vdac->constraints.apply_uV = true;
+        omap3stalker_twldata.vpll2->constraints.apply_uV = true;
+        omap3stalker_twldata.vpll2->constraints.name = "VDVI";
+
         omap3_pmic_init("twl4030", &omap3stalker_twldata);
         omap_register_i2c_bus(2, 400, NULL, 0);
         omap_register_i2c_bus(3, 400, omap3stalker_i2c_boardinfo3,
@@ -494,10 +436,7 @@ static void __init omap3_stalker_init_early(void)
 
 static void __init omap3_stalker_init_irq(void)
 {
-        omap_init_irq();
-#ifdef CONFIG_OMAP_32K_TIMER
-        omap2_gp_clockevent_set_gptimer(12);
-#endif
+        omap3_init_irq();
 }
 
 static struct platform_device *omap3_stalker_devices[] __initdata = {
@@ -560,5 +499,5 @@ MACHINE_START(SBC3530, "OMAP3 STALKER")
         .init_early             = omap3_stalker_init_early,
         .init_irq               = omap3_stalker_init_irq,
         .init_machine           = omap3_stalker_init,
-        .timer                  = &omap_timer,
+        .timer                  = &omap3_secure_timer,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-omap3touchbook.c b/arch/arm/mach-omap2/board-omap3touchbook.c
index 5f649faf7377..852ea0464057 100644
--- a/arch/arm/mach-omap2/board-omap3touchbook.c
+++ b/arch/arm/mach-omap2/board-omap3touchbook.c
@@ -51,7 +51,6 @@
 
 #include "mux.h"
 #include "hsmmc.h"
-#include "timer-gp.h"
 #include "common-board-devices.h"
 
 #include <asm/setup.h>
@@ -114,12 +113,12 @@ static struct omap_lcd_config omap3_touchbook_lcd_config __initdata = {
         .ctrl_name      = "internal",
 };
 
-static struct regulator_consumer_supply touchbook_vmmc1_supply = {
-        .supply                 = "vmmc",
+static struct regulator_consumer_supply touchbook_vmmc1_supply[] = {
+        REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
 };
 
-static struct regulator_consumer_supply touchbook_vsim_supply = {
-        .supply                 = "vmmc_aux",
+static struct regulator_consumer_supply touchbook_vsim_supply[] = {
+        REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"),
 };
 
 static struct gpio_led gpio_leds[];
@@ -137,10 +136,6 @@ static int touchbook_twl_gpio_setup(struct device *dev,
         mmc[0].gpio_cd = gpio + 0;
         omap2_hsmmc_init(mmc);
 
-        /* link regulators to MMC adapters */
-        touchbook_vmmc1_supply.dev = mmc[0].dev;
-        touchbook_vsim_supply.dev = mmc[0].dev;
-
         /* REVISIT: need ehci-omap hooks for external VBUS
          * power switch and overcurrent detect
          */
@@ -167,14 +162,18 @@ static struct twl4030_gpio_platform_data touchbook_gpio_data = {
         .setup          = touchbook_twl_gpio_setup,
 };
 
-static struct regulator_consumer_supply touchbook_vdac_supply = {
+static struct regulator_consumer_supply touchbook_vdac_supply[] = {
+{
         .supply         = "vdac",
         .dev            = &omap3_touchbook_lcd_device.dev,
+},
 };
 
-static struct regulator_consumer_supply touchbook_vdvi_supply = {
+static struct regulator_consumer_supply touchbook_vdvi_supply[] = {
+{
         .supply         = "vdvi",
         .dev            = &omap3_touchbook_lcd_device.dev,
+},
 };
 
 /* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */
@@ -188,8 +187,8 @@ static struct regulator_init_data touchbook_vmmc1 = {
                                         | REGULATOR_CHANGE_MODE
                                         | REGULATOR_CHANGE_STATUS,
         },
-        .num_consumer_supplies  = 1,
-        .consumer_supplies      = &touchbook_vmmc1_supply,
+        .num_consumer_supplies  = ARRAY_SIZE(touchbook_vmmc1_supply),
+        .consumer_supplies      = touchbook_vmmc1_supply,
 };
 
 /* VSIM for MMC1 pins DAT4..DAT7 (2 mA, plus card == max 50 mA) */
@@ -203,62 +202,15 @@ static struct regulator_init_data touchbook_vsim = {
                                         | REGULATOR_CHANGE_MODE
                                         | REGULATOR_CHANGE_STATUS,
         },
-        .num_consumer_supplies  = 1,
-        .consumer_supplies      = &touchbook_vsim_supply,
-};
-
-/* VDAC for DSS driving S-Video (8 mA unloaded, max 65 mA) */
-static struct regulator_init_data touchbook_vdac = {
-        .constraints = {
-                .min_uV                 = 1800000,
-                .max_uV                 = 1800000,
-                .valid_modes_mask       = REGULATOR_MODE_NORMAL
-                                        | REGULATOR_MODE_STANDBY,
-                .valid_ops_mask         = REGULATOR_CHANGE_MODE
-                                        | REGULATOR_CHANGE_STATUS,
-        },
-        .num_consumer_supplies  = 1,
-        .consumer_supplies      = &touchbook_vdac_supply,
-};
-
-/* VPLL2 for digital video outputs */
-static struct regulator_init_data touchbook_vpll2 = {
-        .constraints = {
-                .name                   = "VDVI",
-                .min_uV                 = 1800000,
-                .max_uV                 = 1800000,
-                .valid_modes_mask       = REGULATOR_MODE_NORMAL
-                                        | REGULATOR_MODE_STANDBY,
-                .valid_ops_mask         = REGULATOR_CHANGE_MODE
-                                        | REGULATOR_CHANGE_STATUS,
-        },
-        .num_consumer_supplies  = 1,
-        .consumer_supplies      = &touchbook_vdvi_supply,
-};
-
-static struct twl4030_usb_data touchbook_usb_data = {
-        .usb_mode       = T2_USB_MODE_ULPI,
-};
-
-static struct twl4030_codec_audio_data touchbook_audio_data;
-
-static struct twl4030_codec_data touchbook_codec_data = {
-        .audio_mclk = 26000000,
-        .audio = &touchbook_audio_data,
+        .num_consumer_supplies  = ARRAY_SIZE(touchbook_vsim_supply),
+        .consumer_supplies      = touchbook_vsim_supply,
 };
 
 static struct twl4030_platform_data touchbook_twldata = {
-        .irq_base       = TWL4030_IRQ_BASE,
-        .irq_end        = TWL4030_IRQ_END,
-
         /* platform_data for children goes here */
-        .usb            = &touchbook_usb_data,
         .gpio           = &touchbook_gpio_data,
-        .codec          = &touchbook_codec_data,
         .vmmc1          = &touchbook_vmmc1,
         .vsim           = &touchbook_vsim,
-        .vdac           = &touchbook_vdac,
-        .vpll2          = &touchbook_vpll2,
 };
 
 static struct i2c_board_info __initdata touchBook_i2c_boardinfo[] = {
@@ -270,8 +222,20 @@ static struct i2c_board_info __initdata touchBook_i2c_boardinfo[] = {
 static int __init omap3_touchbook_i2c_init(void)
 {
         /* Standard TouchBook bus */
-        omap3_pmic_init("twl4030", &touchbook_twldata);
+        omap3_pmic_get_config(&touchbook_twldata,
+                        TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_AUDIO,
+                        TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2);
+
+        touchbook_twldata.vdac->num_consumer_supplies =
+                                        ARRAY_SIZE(touchbook_vdac_supply);
+        touchbook_twldata.vdac->consumer_supplies = touchbook_vdac_supply;
 
+        touchbook_twldata.vpll2->constraints.name = "VDVI";
+        touchbook_twldata.vpll2->num_consumer_supplies =
+                                        ARRAY_SIZE(touchbook_vdvi_supply);
+        touchbook_twldata.vpll2->consumer_supplies = touchbook_vdvi_supply;
+
+        omap3_pmic_init("twl4030", &touchbook_twldata);
         /* Additional TouchBook bus */
         omap_register_i2c_bus(3, 100, touchBook_i2c_boardinfo,
                         ARRAY_SIZE(touchBook_i2c_boardinfo));
@@ -371,10 +335,7 @@ static void __init omap3_touchbook_init_early(void)
 
 static void __init omap3_touchbook_init_irq(void)
 {
-        omap_init_irq();
-#ifdef CONFIG_OMAP_32K_TIMER
-        omap2_gp_clockevent_set_gptimer(12);
-#endif
+        omap3_init_irq();
 }
 
 static struct platform_device *omap3_touchbook_devices[] __initdata = {
@@ -449,5 +410,5 @@ MACHINE_START(TOUCHBOOK, "OMAP3 touchbook Board")
         .init_early     = omap3_touchbook_init_early,
         .init_irq       = omap3_touchbook_init_irq,
         .init_machine   = omap3_touchbook_init,
-        .timer          = &omap_timer,
+        .timer          = &omap3_secure_timer,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-omap4panda.c b/arch/arm/mach-omap2/board-omap4panda.c
index 0cfe2005cb50..9aaa96057666 100644
--- a/arch/arm/mach-omap2/board-omap4panda.c
+++ b/arch/arm/mach-omap2/board-omap4panda.c
@@ -41,7 +41,6 @@
 #include <plat/usb.h>
 #include <plat/mmc.h>
 #include <video/omap-panel-generic-dpi.h>
-#include "timer-gp.h"
 
 #include "hsmmc.h"
 #include "control.h"
@@ -155,14 +154,6 @@ static struct omap_musb_board_data musb_board_data = {
         .power                  = 100,
 };
 
-static struct twl4030_usb_data omap4_usbphy_data = {
-        .phy_init       = omap4430_phy_init,
-        .phy_exit       = omap4430_phy_exit,
-        .phy_power      = omap4430_phy_power,
-        .phy_set_clock  = omap4430_phy_set_clk,
-        .phy_suspend    = omap4430_phy_suspend,
-};
-
 static struct omap2_hsmmc_info mmc[] = {
         {
                 .mmc            = 1,
@@ -182,24 +173,16 @@ static struct omap2_hsmmc_info mmc[] = {
         {}      /* Terminator */
 };
 
-static struct regulator_consumer_supply omap4_panda_vmmc_supply[] = {
-        {
-                .supply = "vmmc",
-                .dev_name = "omap_hsmmc.0",
-        },
-};
-
-static struct regulator_consumer_supply omap4_panda_vmmc5_supply = {
-        .supply = "vmmc",
-        .dev_name = "omap_hsmmc.4",
+static struct regulator_consumer_supply omap4_panda_vmmc5_supply[] = {
+        REGULATOR_SUPPLY("vmmc", "omap_hsmmc.4"),
 };
 
 static struct regulator_init_data panda_vmmc5 = {
         .constraints = {
                 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
         },
-        .num_consumer_supplies = 1,
-        .consumer_supplies = &omap4_panda_vmmc5_supply,
+        .num_consumer_supplies = ARRAY_SIZE(omap4_panda_vmmc5_supply),
+        .consumer_supplies = omap4_panda_vmmc5_supply,
 };
 
 static struct fixed_voltage_config panda_vwlan = {
@@ -274,128 +257,8 @@ static int __init omap4_twl6030_hsmmc_init(struct omap2_hsmmc_info *controllers)
         return 0;
 }
 
-static struct regulator_init_data omap4_panda_vaux2 = {
-        .constraints = {
-                .min_uV                 = 1200000,
-                .max_uV                 = 2800000,
-                .apply_uV               = true,
-                .valid_modes_mask       = REGULATOR_MODE_NORMAL
-                                        | REGULATOR_MODE_STANDBY,
-                .valid_ops_mask  = REGULATOR_CHANGE_VOLTAGE
-                                        | REGULATOR_CHANGE_MODE
-                                        | REGULATOR_CHANGE_STATUS,
-        },
-};
-
-static struct regulator_init_data omap4_panda_vaux3 = {
-        .constraints = {
-                .min_uV                 = 1000000,
-                .max_uV                 = 3000000,
-                .apply_uV               = true,
-                .valid_modes_mask       = REGULATOR_MODE_NORMAL
-                                        | REGULATOR_MODE_STANDBY,
-                .valid_ops_mask  = REGULATOR_CHANGE_VOLTAGE
-                                        | REGULATOR_CHANGE_MODE
-                                        | REGULATOR_CHANGE_STATUS,
-        },
-};
-
-/* VMMC1 for MMC1 card */
-static struct regulator_init_data omap4_panda_vmmc = {
-        .constraints = {
-                .min_uV                 = 1200000,
-                .max_uV                 = 3000000,
-                .apply_uV               = true,
-                .valid_modes_mask       = REGULATOR_MODE_NORMAL
-                                        | REGULATOR_MODE_STANDBY,
-                .valid_ops_mask  = REGULATOR_CHANGE_VOLTAGE
-                                        | REGULATOR_CHANGE_MODE
-                                        | REGULATOR_CHANGE_STATUS,
-        },
-        .num_consumer_supplies  = 1,
-        .consumer_supplies      = omap4_panda_vmmc_supply,
-};
-
-static struct regulator_init_data omap4_panda_vpp = {
-        .constraints = {
-                .min_uV                 = 1800000,
-                .max_uV                 = 2500000,
-                .apply_uV               = true,
-                .valid_modes_mask       = REGULATOR_MODE_NORMAL
-                                        | REGULATOR_MODE_STANDBY,
-                .valid_ops_mask  = REGULATOR_CHANGE_VOLTAGE
-                                        | REGULATOR_CHANGE_MODE
-                                        | REGULATOR_CHANGE_STATUS,
-        },
-};
-
-static struct regulator_init_data omap4_panda_vana = {
-        .constraints = {
-                .min_uV                 = 2100000,
-                .max_uV                 = 2100000,
-                .valid_modes_mask       = REGULATOR_MODE_NORMAL
-                                        | REGULATOR_MODE_STANDBY,
-                .valid_ops_mask  = REGULATOR_CHANGE_MODE
-                                        | REGULATOR_CHANGE_STATUS,
-        },
-};
-
-static struct regulator_init_data omap4_panda_vcxio = {
-        .constraints = {
-                .min_uV                 = 1800000,
-                .max_uV                 = 1800000,
-                .valid_modes_mask       = REGULATOR_MODE_NORMAL
-                                        | REGULATOR_MODE_STANDBY,
-                .valid_ops_mask  = REGULATOR_CHANGE_MODE
-                                        | REGULATOR_CHANGE_STATUS,
-        },
-};
-
-static struct regulator_init_data omap4_panda_vdac = {
-        .constraints = {
-                .min_uV                 = 1800000,
-                .max_uV                 = 1800000,
-                .valid_modes_mask       = REGULATOR_MODE_NORMAL
-                                        | REGULATOR_MODE_STANDBY,
-                .valid_ops_mask  = REGULATOR_CHANGE_MODE
-                                        | REGULATOR_CHANGE_STATUS,
-        },
-};
-
-static struct regulator_init_data omap4_panda_vusb = {
-        .constraints = {
-                .min_uV                 = 3300000,
-                .max_uV                 = 3300000,
-                .apply_uV               = true,
-                .valid_modes_mask       = REGULATOR_MODE_NORMAL
-                                        | REGULATOR_MODE_STANDBY,
-                .valid_ops_mask  =      REGULATOR_CHANGE_MODE
-                                        | REGULATOR_CHANGE_STATUS,
-        },
-};
-
-static struct regulator_init_data omap4_panda_clk32kg = {
-        .constraints = {
-                .valid_ops_mask         = REGULATOR_CHANGE_STATUS,
-        },
-};
-
-static struct twl4030_platform_data omap4_panda_twldata = {
-        .irq_base       = TWL6030_IRQ_BASE,
-        .irq_end        = TWL6030_IRQ_END,
-
-        /* Regulators */
-        .vmmc           = &omap4_panda_vmmc,
-        .vpp            = &omap4_panda_vpp,
-        .vana           = &omap4_panda_vana,
-        .vcxio          = &omap4_panda_vcxio,
-        .vdac           = &omap4_panda_vdac,
-        .vusb           = &omap4_panda_vusb,
-        .vaux2          = &omap4_panda_vaux2,
-        .vaux3          = &omap4_panda_vaux3,
-        .clk32kg        = &omap4_panda_clk32kg,
-        .usb            = &omap4_usbphy_data,
-};
+/* Panda board uses the common PMIC configuration */
+static struct twl4030_platform_data omap4_panda_twldata;
 
 /*
  * Display monitor features are burnt in their EEPROM as EDID data. The EEPROM
@@ -409,6 +272,16 @@ static struct i2c_board_info __initdata panda_i2c_eeprom[] = {
 
 static int __init omap4_panda_i2c_init(void)
 {
+        omap4_pmic_get_config(&omap4_panda_twldata, TWL_COMMON_PDATA_USB,
+                        TWL_COMMON_REGULATOR_VDAC |
+                        TWL_COMMON_REGULATOR_VAUX2 |
+                        TWL_COMMON_REGULATOR_VAUX3 |
+                        TWL_COMMON_REGULATOR_VMMC |
+                        TWL_COMMON_REGULATOR_VPP |
+                        TWL_COMMON_REGULATOR_VANA |
+                        TWL_COMMON_REGULATOR_VCXIO |
+                        TWL_COMMON_REGULATOR_VUSB |
+                        TWL_COMMON_REGULATOR_CLK32KG);
         omap4_pmic_init("twl6030", &omap4_panda_twldata);
         omap_register_i2c_bus(2, 400, NULL, 0);
         /*
@@ -716,5 +589,5 @@ MACHINE_START(OMAP4_PANDA, "OMAP4 Panda board")
         .init_early     = omap4_panda_init_early,
         .init_irq       = gic_init_irq,
         .init_machine   = omap4_panda_init,
-        .timer          = &omap_timer,
+        .timer          = &omap4_timer,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c
index 175e1ab2b04d..f1f18d03d24c 100644
--- a/arch/arm/mach-omap2/board-overo.c
+++ b/arch/arm/mach-omap2/board-overo.c
@@ -74,15 +74,16 @@
         defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
 
 /* fixed regulator for ads7846 */
-static struct regulator_consumer_supply ads7846_supply =
-        REGULATOR_SUPPLY("vcc", "spi1.0");
+static struct regulator_consumer_supply ads7846_supply[] = {
+        REGULATOR_SUPPLY("vcc", "spi1.0"),
+};
 
 static struct regulator_init_data vads7846_regulator = {
         .constraints = {
                 .valid_ops_mask         = REGULATOR_CHANGE_STATUS,
         },
-        .num_consumer_supplies  = 1,
-        .consumer_supplies      = &ads7846_supply,
+        .num_consumer_supplies  = ARRAY_SIZE(ads7846_supply),
+        .consumer_supplies      = ads7846_supply,
 };
 
 static struct fixed_voltage_config vads7846 = {
@@ -264,14 +265,6 @@ static struct omap_dss_board_info overo_dss_data = {
         .default_device = &overo_dvi_device,
 };
 
-static struct regulator_consumer_supply overo_vdda_dac_supply =
-        REGULATOR_SUPPLY("vdda_dac", "omapdss_venc");
-
-static struct regulator_consumer_supply overo_vdds_dsi_supply[] = {
-        REGULATOR_SUPPLY("vdds_dsi", "omapdss"),
-        REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"),
-};
-
 static struct mtd_partition overo_nand_partitions[] = {
         {
                 .name           = "xloader",
@@ -319,8 +312,8 @@ static struct omap2_hsmmc_info mmc[] = {
         {}      /* Terminator */
 };
 
-static struct regulator_consumer_supply overo_vmmc1_supply = {
-        .supply                 = "vmmc",
+static struct regulator_consumer_supply overo_vmmc1_supply[] = {
+        REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
 };
 
 #if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
@@ -415,8 +408,6 @@ static int overo_twl_gpio_setup(struct device *dev,
 {
         omap2_hsmmc_init(mmc);
 
-        overo_vmmc1_supply.dev = mmc[0].dev;
-
 #if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
         /* TWL4030_GPIO_MAX + 1 == ledB, PMU_STAT (out, active low LED) */
         gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1;
@@ -433,10 +424,6 @@ static struct twl4030_gpio_platform_data overo_gpio_data = {
         .setup          = overo_twl_gpio_setup,
 };
 
-static struct twl4030_usb_data overo_usb_data = {
-        .usb_mode       = T2_USB_MODE_ULPI,
-};
-
 static struct regulator_init_data overo_vmmc1 = {
         .constraints = {
                 .min_uV                 = 1850000,
@@ -447,59 +434,23 @@ static struct regulator_init_data overo_vmmc1 = {
                                         | REGULATOR_CHANGE_MODE
                                         | REGULATOR_CHANGE_STATUS,
         },
-        .num_consumer_supplies  = 1,
-        .consumer_supplies      = &overo_vmmc1_supply,
-};
-
-/* VDAC for DSS driving S-Video (8 mA unloaded, max 65 mA) */
-static struct regulator_init_data overo_vdac = {
-        .constraints = {
-                .min_uV                 = 1800000,
-                .max_uV                 = 1800000,
-                .valid_modes_mask       = REGULATOR_MODE_NORMAL
-                                        | REGULATOR_MODE_STANDBY,
-                .valid_ops_mask         = REGULATOR_CHANGE_MODE
-                                        | REGULATOR_CHANGE_STATUS,
-        },
-        .num_consumer_supplies  = 1,
-        .consumer_supplies      = &overo_vdda_dac_supply,
-};
-
-/* VPLL2 for digital video outputs */
-static struct regulator_init_data overo_vpll2 = {
-        .constraints = {
-                .name                   = "VDVI",
-                .min_uV                 = 1800000,
-                .max_uV                 = 1800000,
-                .valid_modes_mask       = REGULATOR_MODE_NORMAL
-                                        | REGULATOR_MODE_STANDBY,
-                .valid_ops_mask         = REGULATOR_CHANGE_MODE
-                                        | REGULATOR_CHANGE_STATUS,
-        },
-        .num_consumer_supplies  = ARRAY_SIZE(overo_vdds_dsi_supply),
-        .consumer_supplies      = overo_vdds_dsi_supply,
-};
-
-static struct twl4030_codec_audio_data overo_audio_data;
-
-static struct twl4030_codec_data overo_codec_data = {
-        .audio_mclk = 26000000,
-        .audio = &overo_audio_data,
+        .num_consumer_supplies  = ARRAY_SIZE(overo_vmmc1_supply),
+        .consumer_supplies      = overo_vmmc1_supply,
 };
 
 static struct twl4030_platform_data overo_twldata = {
-        .irq_base       = TWL4030_IRQ_BASE,
-        .irq_end        = TWL4030_IRQ_END,
         .gpio           = &overo_gpio_data,
-        .usb            = &overo_usb_data,
-        .codec          = &overo_codec_data,
         .vmmc1          = &overo_vmmc1,
-        .vdac           = &overo_vdac,
-        .vpll2          = &overo_vpll2,
 };
 
 static int __init overo_i2c_init(void)
 {
+        omap3_pmic_get_config(&overo_twldata,
+                        TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_AUDIO,
+                        TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2);
+
+        overo_twldata.vpll2->constraints.name = "VDVI";
+
         omap3_pmic_init("tps65950", &overo_twldata);
         /* i2c2 pins are used for gpio */
         omap_register_i2c_bus(3, 400, NULL, 0);
@@ -615,7 +566,7 @@ MACHINE_START(OVERO, "Gumstix Overo")
         .reserve        = omap_reserve,
         .map_io         = omap3_map_io,
         .init_early     = overo_init_early,
-        .init_irq       = omap_init_irq,
+        .init_irq       = omap3_init_irq,
         .init_machine   = overo_init,
-        .timer          = &omap_timer,
+        .timer          = &omap3_timer,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-rm680.c b/arch/arm/mach-omap2/board-rm680.c
index 42d10b12da3c..7dfed24ee12e 100644
--- a/arch/arm/mach-omap2/board-rm680.c
+++ b/arch/arm/mach-omap2/board-rm680.c
@@ -79,20 +79,14 @@ static struct twl4030_gpio_platform_data rm680_gpio_data = {
         .pulldowns              = BIT(1) | BIT(2) | BIT(8) | BIT(15),
 };
 
-static struct twl4030_usb_data rm680_usb_data = {
-        .usb_mode               = T2_USB_MODE_ULPI,
-};
-
 static struct twl4030_platform_data rm680_twl_data = {
-        .irq_base               = TWL4030_IRQ_BASE,
-        .irq_end                = TWL4030_IRQ_END,
         .gpio                   = &rm680_gpio_data,
-        .usb                    = &rm680_usb_data,
         /* add rest of the children here */
 };
 
 static void __init rm680_i2c_init(void)
 {
+        omap3_pmic_get_config(&rm680_twl_data, TWL_COMMON_PDATA_USB, 0);
         omap_pmic_init(1, 2900, "twl5031", INT_34XX_SYS_NIRQ, &rm680_twl_data);
         omap_register_i2c_bus(2, 400, NULL, 0);
         omap_register_i2c_bus(3, 400, NULL, 0);
@@ -163,7 +157,7 @@ MACHINE_START(NOKIA_RM680, "Nokia RM-680 board")
         .reserve        = omap_reserve,
         .map_io         = rm680_map_io,
         .init_early     = rm680_init_early,
-        .init_irq       = omap_init_irq,
+        .init_irq       = omap3_init_irq,
         .init_machine   = rm680_init,
-        .timer          = &omap_timer,
+        .timer          = &omap3_timer,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-rx51-peripherals.c b/arch/arm/mach-omap2/board-rx51-peripherals.c
index 88bd6f7705f0..bdb24db36004 100644
--- a/arch/arm/mach-omap2/board-rx51-peripherals.c
+++ b/arch/arm/mach-omap2/board-rx51-peripherals.c
@@ -288,10 +288,6 @@ static struct twl4030_keypad_data rx51_kp_data = {
         .rep            = 1,
 };
 
-static struct twl4030_madc_platform_data rx51_madc_data = {
-        .irq_line               = 1,
-};
-
 /* Enable input logic and pull all lines up when eMMC is on. */
 static struct omap_board_mux rx51_mmc2_on_mux[] = {
         OMAP3_MUX(SDMMC2_CMD, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
@@ -358,14 +354,17 @@ static struct omap2_hsmmc_info mmc[] __initdata = {
         {}      /* Terminator */
 };
 
-static struct regulator_consumer_supply rx51_vmmc1_supply =
-        REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0");
+static struct regulator_consumer_supply rx51_vmmc1_supply[] = {
+        REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
+};
 
-static struct regulator_consumer_supply rx51_vaux3_supply =
-        REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1");
+static struct regulator_consumer_supply rx51_vaux3_supply[] = {
+        REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"),
+};
 
-static struct regulator_consumer_supply rx51_vsim_supply =
-        REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.1");
+static struct regulator_consumer_supply rx51_vsim_supply[] = {
+        REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.1"),
+};
 
 static struct regulator_consumer_supply rx51_vmmc2_supplies[] = {
         /* tlv320aic3x analog supplies */
@@ -395,10 +394,6 @@ static struct regulator_consumer_supply rx51_vaux1_consumers[] = {
         REGULATOR_SUPPLY("vdd", "2-0063"),
 };
 
-static struct regulator_consumer_supply rx51_vdac_supply[] = {
-        REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"),
-};
-
 static struct regulator_init_data rx51_vaux1 = {
         .constraints = {
                 .name                   = "V28",
@@ -452,8 +447,8 @@ static struct regulator_init_data rx51_vaux3_mmc = {
                                         | REGULATOR_CHANGE_MODE
                                         | REGULATOR_CHANGE_STATUS,
         },
-        .num_consumer_supplies  = 1,
-        .consumer_supplies      = &rx51_vaux3_supply,
+        .num_consumer_supplies  = ARRAY_SIZE(rx51_vaux3_supply),
+        .consumer_supplies      = rx51_vaux3_supply,
 };
 
 static struct regulator_init_data rx51_vaux4 = {
@@ -479,8 +474,8 @@ static struct regulator_init_data rx51_vmmc1 = {
                                         | REGULATOR_CHANGE_MODE
                                         | REGULATOR_CHANGE_STATUS,
         },
-        .num_consumer_supplies  = 1,
-        .consumer_supplies      = &rx51_vmmc1_supply,
+        .num_consumer_supplies  = ARRAY_SIZE(rx51_vmmc1_supply),
+        .consumer_supplies      = rx51_vmmc1_supply,
 };
 
 static struct regulator_init_data rx51_vmmc2 = {
@@ -511,23 +506,8 @@ static struct regulator_init_data rx51_vsim = {
                 .valid_ops_mask         = REGULATOR_CHANGE_MODE
                                         | REGULATOR_CHANGE_STATUS,
         },
-        .num_consumer_supplies  = 1,
-        .consumer_supplies      = &rx51_vsim_supply,
-};
-
-static struct regulator_init_data rx51_vdac = {
-        .constraints = {
-                .name                   = "VDAC",
-                .min_uV                 = 1800000,
-                .max_uV                 = 1800000,
-                .apply_uV               = true,
-                .valid_modes_mask       = REGULATOR_MODE_NORMAL
-                                        | REGULATOR_MODE_STANDBY,
-                .valid_ops_mask         = REGULATOR_CHANGE_MODE
-                                        | REGULATOR_CHANGE_STATUS,
-        },
-        .num_consumer_supplies  = 1,
-        .consumer_supplies      = rx51_vdac_supply,
+        .num_consumer_supplies  = ARRAY_SIZE(rx51_vsim_supply),
+        .consumer_supplies      = rx51_vsim_supply,
 };
 
 static struct regulator_init_data rx51_vio = {
@@ -600,10 +580,6 @@ static struct twl4030_gpio_platform_data rx51_gpio_data = {
         .setup                  = rx51_twlgpio_setup,
 };
 
-static struct twl4030_usb_data rx51_usb_data = {
-        .usb_mode               = T2_USB_MODE_ULPI,
-};
-
 static struct twl4030_ins sleep_on_seq[] __initdata = {
 /*
  * Turn off everything
@@ -775,14 +751,9 @@ struct twl4030_codec_data rx51_codec_data __initdata = {
 };
 
 static struct twl4030_platform_data rx51_twldata __initdata = {
-        .irq_base               = TWL4030_IRQ_BASE,
-        .irq_end                = TWL4030_IRQ_END,
-
         /* platform_data for children goes here */
         .gpio                   = &rx51_gpio_data,
         .keypad                 = &rx51_kp_data,
-        .madc                   = &rx51_madc_data,
-        .usb                    = &rx51_usb_data,
         .power                  = &rx51_t2scripts_data,
         .codec                  = &rx51_codec_data,
 
@@ -791,7 +762,6 @@ static struct twl4030_platform_data rx51_twldata __initdata = {
         .vaux4                  = &rx51_vaux4,
         .vmmc1                  = &rx51_vmmc1,
         .vsim                   = &rx51_vsim,
-        .vdac                   = &rx51_vdac,
         .vio                    = &rx51_vio,
 };
 
@@ -847,6 +817,13 @@ static int __init rx51_i2c_init(void)
                 rx51_twldata.vaux3 = &rx51_vaux3_cam;
         }
         rx51_twldata.vmmc2 = &rx51_vmmc2;
+        omap3_pmic_get_config(&rx51_twldata,
+                        TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_MADC,
+                        TWL_COMMON_REGULATOR_VDAC);
+
+        rx51_twldata.vdac->constraints.apply_uV = true;
+        rx51_twldata.vdac->constraints.name = "VDAC";
+
         omap_pmic_init(1, 2200, "twl5030", INT_34XX_SYS_NIRQ, &rx51_twldata);
         omap_register_i2c_bus(2, 100, rx51_peripherals_i2c_board_info_2,
                               ARRAY_SIZE(rx51_peripherals_i2c_board_info_2));
diff --git a/arch/arm/mach-omap2/board-rx51.c b/arch/arm/mach-omap2/board-rx51.c
index fec4cac8fa0a..5ea142f9bc97 100644
--- a/arch/arm/mach-omap2/board-rx51.c
+++ b/arch/arm/mach-omap2/board-rx51.c
@@ -160,7 +160,7 @@ MACHINE_START(NOKIA_RX51, "Nokia RX-51 board")
         .reserve        = rx51_reserve,
         .map_io         = rx51_map_io,
         .init_early     = rx51_init_early,
-        .init_irq       = omap_init_irq,
+        .init_irq       = omap3_init_irq,
         .init_machine   = rx51_init,
-        .timer          = &omap_timer,
+        .timer          = &omap3_timer,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-ti8168evm.c b/arch/arm/mach-omap2/board-ti8168evm.c
index 09fa7bfff8d6..a85d5b0b11da 100644
--- a/arch/arm/mach-omap2/board-ti8168evm.c
+++ b/arch/arm/mach-omap2/board-ti8168evm.c
@@ -33,11 +33,6 @@ static void __init ti8168_init_early(void)
         omap2_init_common_devices(NULL, NULL);
 }
 
-static void __init ti8168_evm_init_irq(void)
-{
-        omap_init_irq();
-}
-
 static void __init ti8168_evm_init(void)
 {
         omap_serial_init();
@@ -56,7 +51,7 @@ MACHINE_START(TI8168EVM, "ti8168evm")
         .boot_params    = 0x80000100,
         .map_io         = ti8168_evm_map_io,
         .init_early     = ti8168_init_early,
-        .init_irq       = ti8168_evm_init_irq,
-        .timer          = &omap_timer,
+        .init_irq       = ti816x_init_irq,
+        .timer          = &omap3_timer,
         .init_machine   = ti8168_evm_init,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-zoom-peripherals.c b/arch/arm/mach-omap2/board-zoom-peripherals.c
index 118c6f53c5eb..13a644233667 100644
--- a/arch/arm/mach-omap2/board-zoom-peripherals.c
+++ b/arch/arm/mach-omap2/board-zoom-peripherals.c
@@ -105,21 +105,20 @@ static struct twl4030_keypad_data zoom_kp_twl4030_data = {
         .rep            = 1,
 };
 
-static struct regulator_consumer_supply zoom_vmmc1_supply = {
-        .supply         = "vmmc",
+static struct regulator_consumer_supply zoom_vmmc1_supply[] = {
+        REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
 };
 
-static struct regulator_consumer_supply zoom_vsim_supply = {
-        .supply         = "vmmc_aux",
+static struct regulator_consumer_supply zoom_vsim_supply[] = {
+        REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"),
 };
 
-static struct regulator_consumer_supply zoom_vmmc2_supply = {
-        .supply         = "vmmc",
+static struct regulator_consumer_supply zoom_vmmc2_supply[] = {
+        REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"),
 };
 
-static struct regulator_consumer_supply zoom_vmmc3_supply = {
-        .supply         = "vmmc",
-        .dev_name       = "omap_hsmmc.2",
+static struct regulator_consumer_supply zoom_vmmc3_supply[] = {
+        REGULATOR_SUPPLY("vmmc", "omap_hsmmc.2"),
 };
 
 /* VMMC1 for OMAP VDD_MMC1 (i/o) and MMC1 card */
@@ -133,8 +132,8 @@ static struct regulator_init_data zoom_vmmc1 = {
                                         | REGULATOR_CHANGE_MODE
                                         | REGULATOR_CHANGE_STATUS,
         },
-        .num_consumer_supplies  = 1,
-        .consumer_supplies      = &zoom_vmmc1_supply,
+        .num_consumer_supplies  = ARRAY_SIZE(zoom_vmmc1_supply),
+        .consumer_supplies      = zoom_vmmc1_supply,
 };
 
 /* VMMC2 for MMC2 card */
@@ -148,8 +147,8 @@ static struct regulator_init_data zoom_vmmc2 = {
                 .valid_ops_mask         = REGULATOR_CHANGE_MODE
                                         | REGULATOR_CHANGE_STATUS,
         },
-        .num_consumer_supplies  = 1,
-        .consumer_supplies      = &zoom_vmmc2_supply,
+        .num_consumer_supplies  = ARRAY_SIZE(zoom_vmmc2_supply),
+        .consumer_supplies      = zoom_vmmc2_supply,
 };
 
 /* VSIM for OMAP VDD_MMC1A (i/o for DAT4..DAT7) */
@@ -163,16 +162,16 @@ static struct regulator_init_data zoom_vsim = {
                                         | REGULATOR_CHANGE_MODE
                                         | REGULATOR_CHANGE_STATUS,
         },
-        .num_consumer_supplies  = 1,
-        .consumer_supplies      = &zoom_vsim_supply,
+        .num_consumer_supplies  = ARRAY_SIZE(zoom_vsim_supply),
+        .consumer_supplies      = zoom_vsim_supply,
 };
 
 static struct regulator_init_data zoom_vmmc3 = {
         .constraints = {
                 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
         },
-        .num_consumer_supplies  = 1,
-        .consumer_supplies = &zoom_vmmc3_supply,
+        .num_consumer_supplies  = ARRAY_SIZE(zoom_vmmc3_supply),
+        .consumer_supplies      = zoom_vmmc3_supply,
 };
 
 static struct fixed_voltage_config zoom_vwlan = {
@@ -227,40 +226,6 @@ static struct omap2_hsmmc_info mmc[] = {
         {}      /* Terminator */
 };
 
-static struct regulator_consumer_supply zoom_vpll2_supplies[] = {
-        REGULATOR_SUPPLY("vdds_dsi", "omapdss"),
-        REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"),
-};
-
-static struct regulator_consumer_supply zoom_vdda_dac_supply =
-        REGULATOR_SUPPLY("vdda_dac", "omapdss_venc");
-
-static struct regulator_init_data zoom_vpll2 = {
-        .constraints = {
-                .min_uV                 = 1800000,
-                .max_uV                 = 1800000,
-                .valid_modes_mask       = REGULATOR_MODE_NORMAL
-                                        | REGULATOR_MODE_STANDBY,
-                .valid_ops_mask         = REGULATOR_CHANGE_MODE
-                                        | REGULATOR_CHANGE_STATUS,
-        },
-        .num_consumer_supplies          = ARRAY_SIZE(zoom_vpll2_supplies),
-        .consumer_supplies              = zoom_vpll2_supplies,
-};
-
-static struct regulator_init_data zoom_vdac = {
-        .constraints = {
-                .min_uV                 = 1800000,
-                .max_uV                 = 1800000,
-                .valid_modes_mask       = REGULATOR_MODE_NORMAL
-                                        | REGULATOR_MODE_STANDBY,
-                .valid_ops_mask         = REGULATOR_CHANGE_MODE
-                                        | REGULATOR_CHANGE_STATUS,
-        },
-        .num_consumer_supplies          = 1,
-        .consumer_supplies              = &zoom_vdda_dac_supply,
-};
-
 static int zoom_twl_gpio_setup(struct device *dev,
                 unsigned gpio, unsigned ngpio)
 {
@@ -270,13 +235,6 @@ static int zoom_twl_gpio_setup(struct device *dev,
         mmc[0].gpio_cd = gpio + 0;
         omap2_hsmmc_init(mmc);
 
-        /* link regulators to MMC adapters ... we "know" the
-         * regulators will be set up only *after* we return.
-        */
-        zoom_vmmc1_supply.dev = mmc[0].dev;
-        zoom_vsim_supply.dev = mmc[0].dev;
-        zoom_vmmc2_supply.dev = mmc[1].dev;
-
         ret = gpio_request_one(LCD_PANEL_ENABLE_GPIO, GPIOF_OUT_INIT_LOW,
                                "lcd enable");
         if (ret)
@@ -292,26 +250,6 @@ static void zoom2_set_hs_extmute(int mute)
         gpio_set_value(ZOOM2_HEADSET_EXTMUTE_GPIO, mute);
 }
 
-static int zoom_batt_table[] = {
-/* 0 C*/
-30800, 29500, 28300, 27100,
-26000, 24900, 23900, 22900, 22000, 21100, 20300, 19400, 18700, 17900,
-17200, 16500, 15900, 15300, 14700, 14100, 13600, 13100, 12600, 12100,
-11600, 11200, 10800, 10400, 10000, 9630,  9280,  8950,  8620,  8310,
-8020,  7730,  7460,  7200,  6950,  6710,  6470,  6250,  6040,  5830,
-5640,  5450,  5260,  5090,  4920,  4760,  4600,  4450,  4310,  4170,
-4040,  3910,  3790,  3670,  3550
-};
-
-static struct twl4030_bci_platform_data zoom_bci_data = {
-        .battery_tmp_tbl        = zoom_batt_table,
-        .tblsize                = ARRAY_SIZE(zoom_batt_table),
-};
-
-static struct twl4030_usb_data zoom_usb_data = {
-        .usb_mode       = T2_USB_MODE_ULPI,
-};
-
 static struct twl4030_gpio_platform_data zoom_gpio_data = {
         .gpio_base      = OMAP_MAX_GPIO_LINES,
         .irq_base       = TWL4030_GPIO_IRQ_BASE,
@@ -319,41 +257,29 @@ static struct twl4030_gpio_platform_data zoom_gpio_data = {
         .setup          = zoom_twl_gpio_setup,
 };
 
-static struct twl4030_madc_platform_data zoom_madc_data = {
-        .irq_line       = 1,
-};
-
-static struct twl4030_codec_audio_data zoom_audio_data;
-
-static struct twl4030_codec_data zoom_codec_data = {
-        .audio_mclk = 26000000,
-        .audio = &zoom_audio_data,
-};
-
 static struct twl4030_platform_data zoom_twldata = {
-        .irq_base       = TWL4030_IRQ_BASE,
-        .irq_end        = TWL4030_IRQ_END,
-
         /* platform_data for children goes here */
-        .bci            = &zoom_bci_data,
-        .madc           = &zoom_madc_data,
-        .usb            = &zoom_usb_data,
         .gpio           = &zoom_gpio_data,
         .keypad         = &zoom_kp_twl4030_data,
-        .codec          = &zoom_codec_data,
         .vmmc1          = &zoom_vmmc1,
         .vmmc2          = &zoom_vmmc2,
         .vsim           = &zoom_vsim,
-        .vpll2          = &zoom_vpll2,
-        .vdac           = &zoom_vdac,
 };
 
 static int __init omap_i2c_init(void)
 {
+        omap3_pmic_get_config(&zoom_twldata,
+                        TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_BCI |
+                        TWL_COMMON_PDATA_MADC | TWL_COMMON_PDATA_AUDIO,
+                        TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2);
+
         if (machine_is_omap_zoom2()) {
-                zoom_audio_data.ramp_delay_value = 3;   /* 161 ms */
-                zoom_audio_data.hs_extmute = 1;
-                zoom_audio_data.set_hs_extmute = zoom2_set_hs_extmute;
+                struct twl4030_codec_audio_data *audio_data;
+                audio_data = zoom_twldata.codec->audio;
+
+                audio_data->ramp_delay_value = 3;       /* 161 ms */
+                audio_data->hs_extmute = 1;
+                audio_data->set_hs_extmute = zoom2_set_hs_extmute;
         }
         omap_pmic_init(1, 2400, "twl5030", INT_34XX_SYS_NIRQ, &zoom_twldata);
         omap_register_i2c_bus(2, 400, NULL, 0);
diff --git a/arch/arm/mach-omap2/board-zoom.c b/arch/arm/mach-omap2/board-zoom.c
index 4b133d75c935..8a98c3c303fc 100644
--- a/arch/arm/mach-omap2/board-zoom.c
+++ b/arch/arm/mach-omap2/board-zoom.c
@@ -137,9 +137,9 @@ MACHINE_START(OMAP_ZOOM2, "OMAP Zoom2 board")
         .reserve        = omap_reserve,
         .map_io         = omap3_map_io,
         .init_early     = omap_zoom_init_early,
-        .init_irq       = omap_init_irq,
+        .init_irq       = omap3_init_irq,
         .init_machine   = omap_zoom_init,
-        .timer          = &omap_timer,
+        .timer          = &omap3_timer,
 MACHINE_END
 
 MACHINE_START(OMAP_ZOOM3, "OMAP Zoom3 board")
@@ -147,7 +147,7 @@ MACHINE_START(OMAP_ZOOM3, "OMAP Zoom3 board")
         .reserve        = omap_reserve,
         .map_io         = omap3_map_io,
         .init_early     = omap_zoom_init_early,
-        .init_irq       = omap_init_irq,
+        .init_irq       = omap3_init_irq,
         .init_machine   = omap_zoom_init,
-        .timer          = &omap_timer,
+        .timer          = &omap3_timer,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/clock44xx.h b/arch/arm/mach-omap2/clock44xx.h
index 6be1095936db..7ceb870e7ab8 100644
--- a/arch/arm/mach-omap2/clock44xx.h
+++ b/arch/arm/mach-omap2/clock44xx.h
@@ -8,13 +8,6 @@
 #ifndef __ARCH_ARM_MACH_OMAP2_CLOCK44XX_H
 #define __ARCH_ARM_MACH_OMAP2_CLOCK44XX_H
 
-/*
- * XXX Missing values for the OMAP4 DPLL_USB
- * XXX Missing min_multiplier values for all OMAP4 DPLLs
- */
-#define OMAP4430_MAX_DPLL_MULT  2047
-#define OMAP4430_MAX_DPLL_DIV   128
-
 int omap4xxx_clk_init(void);
 
 #endif
diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c
index 8c965671b4d4..044df38f65ce 100644
--- a/arch/arm/mach-omap2/clock44xx_data.c
+++ b/arch/arm/mach-omap2/clock44xx_data.c
@@ -53,9 +53,9 @@ static struct clk extalt_clkin_ck = {
 static struct clk pad_clks_ck = {
         .name           = "pad_clks_ck",
         .rate           = 12000000,
-        .ops            = &clkops_omap2_dflt,
-        .enable_reg     = OMAP4430_CM_CLKSEL_ABE,
-        .enable_bit     = OMAP4430_PAD_CLKS_GATE_SHIFT,
+        .ops            = &clkops_omap2_dflt,
+        .enable_reg     = OMAP4430_CM_CLKSEL_ABE,
+        .enable_bit     = OMAP4430_PAD_CLKS_GATE_SHIFT,
 };
 
 static struct clk pad_slimbus_core_clks_ck = {
@@ -73,9 +73,9 @@ static struct clk secure_32k_clk_src_ck = {
 static struct clk slimbus_clk = {
         .name           = "slimbus_clk",
         .rate           = 12000000,
-        .ops            = &clkops_omap2_dflt,
-        .enable_reg     = OMAP4430_CM_CLKSEL_ABE,
-        .enable_bit     = OMAP4430_SLIMBUS_CLK_GATE_SHIFT,
+        .ops            = &clkops_omap2_dflt,
+        .enable_reg     = OMAP4430_CM_CLKSEL_ABE,
+        .enable_bit     = OMAP4430_SLIMBUS_CLK_GATE_SHIFT,
 };
 
 static struct clk sys_32k_ck = {
@@ -258,8 +258,8 @@ static struct dpll_data dpll_abe_dd = {
         .enable_mask    = OMAP4430_DPLL_EN_MASK,
         .autoidle_mask  = OMAP4430_AUTO_DPLL_MODE_MASK,
         .idlest_mask    = OMAP4430_ST_DPLL_CLK_MASK,
-        .max_multiplier = OMAP4430_MAX_DPLL_MULT,
-        .max_divider    = OMAP4430_MAX_DPLL_DIV,
+        .max_multiplier = 2047,
+        .max_divider    = 128,
         .min_divider    = 1,
 };
 
@@ -278,10 +278,10 @@ static struct clk dpll_abe_ck = {
 static struct clk dpll_abe_x2_ck = {
         .name           = "dpll_abe_x2_ck",
         .parent         = &dpll_abe_ck,
+        .clksel_reg     = OMAP4430_CM_DIV_M2_DPLL_ABE,
         .flags          = CLOCK_CLKOUTX2,
         .ops            = &clkops_omap4_dpllmx_ops,
         .recalc         = &omap3_clkoutx2_recalc,
-        .clksel_reg     = OMAP4430_CM_DIV_M2_DPLL_ABE,
 };
 
 static const struct clksel_rate div31_1to31_rates[] = {
@@ -434,8 +434,8 @@ static struct dpll_data dpll_core_dd = {
         .enable_mask    = OMAP4430_DPLL_EN_MASK,
         .autoidle_mask  = OMAP4430_AUTO_DPLL_MODE_MASK,
         .idlest_mask    = OMAP4430_ST_DPLL_CLK_MASK,
-        .max_multiplier = OMAP4430_MAX_DPLL_MULT,
-        .max_divider    = OMAP4430_MAX_DPLL_DIV,
+        .max_multiplier = 2047,
+        .max_divider    = 128,
         .min_divider    = 1,
 };
 
@@ -622,11 +622,11 @@ static struct clk dpll_core_m3x2_ck = {
         .clksel_reg     = OMAP4430_CM_DIV_M3_DPLL_CORE,
         .clksel_mask    = OMAP4430_DPLL_CLKOUTHIF_DIV_MASK,
         .ops            = &clkops_omap2_dflt,
-        .enable_reg     = OMAP4430_CM_DIV_M3_DPLL_CORE,
-        .enable_bit     = OMAP4430_DPLL_CLKOUTHIF_GATE_CTRL_SHIFT,
         .recalc         = &omap2_clksel_recalc,
         .round_rate     = &omap2_clksel_round_rate,
         .set_rate       = &omap2_clksel_set_rate,
+        .enable_reg     = OMAP4430_CM_DIV_M3_DPLL_CORE,
+        .enable_bit     = OMAP4430_DPLL_CLKOUTHIF_GATE_CTRL_SHIFT,
 };
 
 static struct clk dpll_core_m7x2_ck = {
@@ -672,8 +672,8 @@ static struct dpll_data dpll_iva_dd = {
         .enable_mask    = OMAP4430_DPLL_EN_MASK,
         .autoidle_mask  = OMAP4430_AUTO_DPLL_MODE_MASK,
         .idlest_mask    = OMAP4430_ST_DPLL_CLK_MASK,
-        .max_multiplier = OMAP4430_MAX_DPLL_MULT,
-        .max_divider    = OMAP4430_MAX_DPLL_DIV,
+        .max_multiplier = 2047,
+        .max_divider    = 128,
         .min_divider    = 1,
 };
 
@@ -740,8 +740,8 @@ static struct dpll_data dpll_mpu_dd = {
         .enable_mask    = OMAP4430_DPLL_EN_MASK,
         .autoidle_mask  = OMAP4430_AUTO_DPLL_MODE_MASK,
         .idlest_mask    = OMAP4430_ST_DPLL_CLK_MASK,
-        .max_multiplier = OMAP4430_MAX_DPLL_MULT,
-        .max_divider    = OMAP4430_MAX_DPLL_DIV,
+        .max_multiplier = 2047,
+        .max_divider    = 128,
         .min_divider    = 1,
 };
 
@@ -813,8 +813,8 @@ static struct dpll_data dpll_per_dd = {
         .enable_mask    = OMAP4430_DPLL_EN_MASK,
         .autoidle_mask  = OMAP4430_AUTO_DPLL_MODE_MASK,
         .idlest_mask    = OMAP4430_ST_DPLL_CLK_MASK,
-        .max_multiplier = OMAP4430_MAX_DPLL_MULT,
-        .max_divider    = OMAP4430_MAX_DPLL_DIV,
+        .max_multiplier = 2047,
+        .max_divider    = 128,
         .min_divider    = 1,
 };
 
@@ -850,10 +850,10 @@ static struct clk dpll_per_m2_ck = {
 static struct clk dpll_per_x2_ck = {
         .name           = "dpll_per_x2_ck",
         .parent         = &dpll_per_ck,
+        .clksel_reg     = OMAP4430_CM_DIV_M2_DPLL_PER,
         .flags          = CLOCK_CLKOUTX2,
         .ops            = &clkops_omap4_dpllmx_ops,
         .recalc         = &omap3_clkoutx2_recalc,
-        .clksel_reg     = OMAP4430_CM_DIV_M2_DPLL_PER,
 };
 
 static const struct clksel dpll_per_m2x2_div[] = {
@@ -880,11 +880,11 @@ static struct clk dpll_per_m3x2_ck = {
         .clksel_reg     = OMAP4430_CM_DIV_M3_DPLL_PER,
         .clksel_mask    = OMAP4430_DPLL_CLKOUTHIF_DIV_MASK,
         .ops            = &clkops_omap2_dflt,
-        .enable_reg     = OMAP4430_CM_DIV_M3_DPLL_PER,
-        .enable_bit     = OMAP4430_DPLL_CLKOUTHIF_GATE_CTRL_SHIFT,
         .recalc         = &omap2_clksel_recalc,
         .round_rate     = &omap2_clksel_round_rate,
         .set_rate       = &omap2_clksel_set_rate,
+        .enable_reg     = OMAP4430_CM_DIV_M3_DPLL_PER,
+        .enable_bit     = OMAP4430_DPLL_CLKOUTHIF_GATE_CTRL_SHIFT,
 };
 
 static struct clk dpll_per_m4x2_ck = {
@@ -935,63 +935,6 @@ static struct clk dpll_per_m7x2_ck = {
         .set_rate       = &omap2_clksel_set_rate,
 };
 
-/* DPLL_UNIPRO */
-static struct dpll_data dpll_unipro_dd = {
-        .mult_div1_reg  = OMAP4430_CM_CLKSEL_DPLL_UNIPRO,
-        .clk_bypass     = &sys_clkin_ck,
-        .clk_ref        = &sys_clkin_ck,
-        .control_reg    = OMAP4430_CM_CLKMODE_DPLL_UNIPRO,
-        .modes          = (1 << DPLL_LOW_POWER_BYPASS) | (1 << DPLL_LOCKED),
-        .autoidle_reg   = OMAP4430_CM_AUTOIDLE_DPLL_UNIPRO,
-        .idlest_reg     = OMAP4430_CM_IDLEST_DPLL_UNIPRO,
-        .mult_mask      = OMAP4430_DPLL_MULT_MASK,
-        .div1_mask      = OMAP4430_DPLL_DIV_MASK,
-        .enable_mask    = OMAP4430_DPLL_EN_MASK,
-        .autoidle_mask  = OMAP4430_AUTO_DPLL_MODE_MASK,
-        .idlest_mask    = OMAP4430_ST_DPLL_CLK_MASK,
-        .sddiv_mask     = OMAP4430_DPLL_SD_DIV_MASK,
-        .max_multiplier = OMAP4430_MAX_DPLL_MULT,
-        .max_divider    = OMAP4430_MAX_DPLL_DIV,
-        .min_divider    = 1,
-};
-
-
-static struct clk dpll_unipro_ck = {
-        .name           = "dpll_unipro_ck",
-        .parent         = &sys_clkin_ck,
-        .dpll_data      = &dpll_unipro_dd,
-        .init           = &omap2_init_dpll_parent,
-        .ops            = &clkops_omap3_noncore_dpll_ops,
-        .recalc         = &omap3_dpll_recalc,
-        .round_rate     = &omap2_dpll_round_rate,
-        .set_rate       = &omap3_noncore_dpll_set_rate,
-};
-
-static struct clk dpll_unipro_x2_ck = {
-        .name           = "dpll_unipro_x2_ck",
-        .parent         = &dpll_unipro_ck,
-        .flags          = CLOCK_CLKOUTX2,
-        .ops            = &clkops_null,
-        .recalc         = &omap3_clkoutx2_recalc,
-};
-
-static const struct clksel dpll_unipro_m2x2_div[] = {
-        { .parent = &dpll_unipro_x2_ck, .rates = div31_1to31_rates },
-        { .parent = NULL },
-};
-
-static struct clk dpll_unipro_m2x2_ck = {
-        .name           = "dpll_unipro_m2x2_ck",
-        .parent         = &dpll_unipro_x2_ck,
-        .clksel         = dpll_unipro_m2x2_div,
-        .clksel_reg     = OMAP4430_CM_DIV_M2_DPLL_UNIPRO,
-        .clksel_mask    = OMAP4430_DPLL_CLKOUT_DIV_MASK,
-        .ops            = &clkops_omap4_dpllmx_ops,
-        .recalc         = &omap2_clksel_recalc,
-        .round_rate     = &omap2_clksel_round_rate,
-        .set_rate       = &omap2_clksel_set_rate,
-};
-
 static struct clk usb_hs_clk_div_ck = {
         .name           = "usb_hs_clk_div_ck",
         .parent         = &dpll_abe_m3x2_ck,
@@ -1015,8 +958,9 @@ static struct dpll_data dpll_usb_dd = {
         .enable_mask    = OMAP4430_DPLL_EN_MASK,
         .autoidle_mask  = OMAP4430_AUTO_DPLL_MODE_MASK,
         .idlest_mask    = OMAP4430_ST_DPLL_CLK_MASK,
-        .max_multiplier = OMAP4430_MAX_DPLL_MULT,
-        .max_divider    = OMAP4430_MAX_DPLL_DIV,
+        .sddiv_mask     = OMAP4430_DPLL_SD_DIV_MASK,
+        .max_multiplier = 4095,
+        .max_divider    = 256,
         .min_divider    = 1,
 };
 
@@ -1035,8 +979,8 @@ static struct clk dpll_usb_ck = {
 static struct clk dpll_usb_clkdcoldo_ck = {
         .name           = "dpll_usb_clkdcoldo_ck",
         .parent         = &dpll_usb_ck,
-        .ops            = &clkops_omap4_dpllmx_ops,
         .clksel_reg     = OMAP4430_CM_CLKDCOLDO_DPLL_USB,
+        .ops            = &clkops_omap4_dpllmx_ops,
         .recalc         = &followparent_recalc,
 };
 
@@ -1169,19 +1113,6 @@ static struct clk func_96m_fclk = {
         .set_rate       = &omap2_clksel_set_rate,
 };
 
-static const struct clksel hsmmc6_fclk_sel[] = {
-        { .parent = &func_64m_fclk, .rates = div_1_0_rates },
-        { .parent = &func_96m_fclk, .rates = div_1_1_rates },
-        { .parent = NULL },
-};
-
-static struct clk hsmmc6_fclk = {
-        .name           = "hsmmc6_fclk",
-        .parent         = &func_64m_fclk,
-        .ops            = &clkops_null,
-        .recalc         = &followparent_recalc,
-};
-
 static const struct clksel_rate div2_1to8_rates[] = {
         { .div = 1, .val = 0, .flags = RATE_IN_4430 },
         { .div = 8, .val = 1, .flags = RATE_IN_4430 },
@@ -1264,6 +1195,21 @@ static struct clk l4_wkup_clk_mux_ck = {
         .recalc         = &omap2_clksel_recalc,
 };
 
+static struct clk ocp_abe_iclk = {
+        .name           = "ocp_abe_iclk",
+        .parent         = &aess_fclk,
+        .ops            = &clkops_null,
+        .recalc         = &followparent_recalc,
+};
+
+static struct clk per_abe_24m_fclk = {
+        .name           = "per_abe_24m_fclk",
+        .parent         = &dpll_abe_m2_ck,
+        .ops            = &clkops_null,
+        .fixed_div      = 4,
+        .recalc         = &omap_fixed_divisor_recalc,
+};
+
 static const struct clksel per_abe_nc_fclk_div[] = {
         { .parent = &dpll_abe_m2_ck, .rates = div2_1to2_rates },
         { .parent = NULL },
@@ -1281,41 +1227,6 @@ static struct clk per_abe_nc_fclk = {
         .set_rate       = &omap2_clksel_set_rate,
 };
 
-static const struct clksel mcasp2_fclk_sel[] = {
-        { .parent = &func_96m_fclk, .rates = div_1_0_rates },
-        { .parent = &per_abe_nc_fclk, .rates = div_1_1_rates },
-        { .parent = NULL },
-};
-
-static struct clk mcasp2_fclk = {
-        .name           = "mcasp2_fclk",
-        .parent         = &func_96m_fclk,
-        .ops            = &clkops_null,
-        .recalc         = &followparent_recalc,
-};
-
-static struct clk mcasp3_fclk = {
-        .name           = "mcasp3_fclk",
-        .parent         = &func_96m_fclk,
-        .ops            = &clkops_null,
-        .recalc         = &followparent_recalc,
-};
-
-static struct clk ocp_abe_iclk = {
-        .name           = "ocp_abe_iclk",
-        .parent         = &aess_fclk,
-        .ops            = &clkops_null,
-        .recalc         = &followparent_recalc,
-};
-
-static struct clk per_abe_24m_fclk = {
-        .name           = "per_abe_24m_fclk",
-        .parent         = &dpll_abe_m2_ck,
-        .ops            = &clkops_null,
-        .fixed_div      = 4,
-        .recalc         = &omap_fixed_divisor_recalc,
-};
-
 static const struct clksel pmd_stm_clock_mux_sel[] = {
         { .parent = &sys_clkin_ck, .rates = div_1_0_rates },
         { .parent = &dpll_core_m6x2_ck, .rates = div_1_1_rates },
@@ -1846,8 +1757,8 @@ static struct clk l3_instr_ick = {
         .ops            = &clkops_omap2_dflt,
         .enable_reg     = OMAP4430_CM_L3INSTR_L3_INSTR_CLKCTRL,
         .enable_bit     = OMAP4430_MODULEMODE_HWCTRL,
-        .clkdm_name     = "l3_instr_clkdm",
         .flags          = ENABLE_ON_INIT,
+        .clkdm_name     = "l3_instr_clkdm",
         .parent         = &l3_div_ck,
         .recalc         = &followparent_recalc,
 };
@@ -1857,8 +1768,8 @@ static struct clk l3_main_3_ick = {
         .ops            = &clkops_omap2_dflt,
         .enable_reg     = OMAP4430_CM_L3INSTR_L3_3_CLKCTRL,
         .enable_bit     = OMAP4430_MODULEMODE_HWCTRL,
-        .clkdm_name     = "l3_instr_clkdm",
         .flags          = ENABLE_ON_INIT,
+        .clkdm_name     = "l3_instr_clkdm",
         .parent         = &l3_div_ck,
         .recalc         = &followparent_recalc,
 };
@@ -1995,10 +1906,16 @@ static struct clk mcbsp3_fck = {
         .clkdm_name     = "abe_clkdm",
 };
 
+static const struct clksel mcbsp4_sync_mux_sel[] = {
+        { .parent = &func_96m_fclk, .rates = div_1_0_rates },
+        { .parent = &per_abe_nc_fclk, .rates = div_1_1_rates },
+        { .parent = NULL },
+};
+
 static struct clk mcbsp4_sync_mux_ck = {
         .name           = "mcbsp4_sync_mux_ck",
         .parent         = &func_96m_fclk,
-        .clksel         = mcasp2_fclk_sel,
+        .clksel         = mcbsp4_sync_mux_sel,
         .init           = &omap2_init_clksel_parent,
         .clksel_reg     = OMAP4430_CM_L4PER_MCBSP4_CLKCTRL,
         .clksel_mask    = OMAP4430_CLKSEL_INTERNAL_SOURCE_MASK,
@@ -2077,11 +1994,17 @@ static struct clk mcspi4_fck = {
         .recalc         = &followparent_recalc,
 };
 
+static const struct clksel hsmmc1_fclk_sel[] = {
+        { .parent = &func_64m_fclk, .rates = div_1_0_rates },
+        { .parent = &func_96m_fclk, .rates = div_1_1_rates },
+        { .parent = NULL },
+};
+
 /* Merged hsmmc1_fclk into mmc1 */
 static struct clk mmc1_fck = {
         .name           = "mmc1_fck",
         .parent         = &func_64m_fclk,
-        .clksel         = hsmmc6_fclk_sel,
+        .clksel         = hsmmc1_fclk_sel,
         .init           = &omap2_init_clksel_parent,
         .clksel_reg     = OMAP4430_CM_L3INIT_MMC1_CLKCTRL,
         .clksel_mask    = OMAP4430_CLKSEL_MASK,
@@ -2096,7 +2019,7 @@ static struct clk mmc1_fck = {
 static struct clk mmc2_fck = {
         .name           = "mmc2_fck",
         .parent         = &func_64m_fclk,
-        .clksel         = hsmmc6_fclk_sel,
+        .clksel         = hsmmc1_fclk_sel,
         .init           = &omap2_init_clksel_parent,
         .clksel_reg     = OMAP4430_CM_L3INIT_MMC2_CLKCTRL,
         .clksel_mask    = OMAP4430_CLKSEL_MASK,
@@ -2162,8 +2085,8 @@ static struct clk ocp_wp_noc_ick = {
         .ops            = &clkops_omap2_dflt,
         .enable_reg     = OMAP4430_CM_L3INSTR_OCP_WP1_CLKCTRL,
         .enable_bit     = OMAP4430_MODULEMODE_HWCTRL,
-        .clkdm_name     = "l3_instr_clkdm",
         .flags          = ENABLE_ON_INIT,
+        .clkdm_name     = "l3_instr_clkdm",
         .parent         = &l3_div_ck,
         .recalc         = &followparent_recalc,
 };
@@ -2895,6 +2818,7 @@ static struct clk auxclk2_ck = {
         .enable_reg     = OMAP4_SCRM_AUXCLK2,
         .enable_bit     = OMAP4_ENABLE_SHIFT,
 };
+
 static struct clk auxclk3_ck = {
         .name           = "auxclk3_ck",
         .parent         = &sys_clkin_ck,
@@ -3077,9 +3001,6 @@ static struct omap_clk omap44xx_clks[] = {
         CLK(NULL,       "dpll_per_m5x2_ck",             &dpll_per_m5x2_ck,      CK_443X),
         CLK(NULL,       "dpll_per_m6x2_ck",             &dpll_per_m6x2_ck,      CK_443X),
         CLK(NULL,       "dpll_per_m7x2_ck",             &dpll_per_m7x2_ck,      CK_443X),
-        CLK(NULL,       "dpll_unipro_ck",               &dpll_unipro_ck,        CK_443X),
-        CLK(NULL,       "dpll_unipro_x2_ck",            &dpll_unipro_x2_ck,     CK_443X),
-        CLK(NULL,       "dpll_unipro_m2x2_ck",          &dpll_unipro_m2x2_ck,   CK_443X),
         CLK(NULL,       "usb_hs_clk_div_ck",            &usb_hs_clk_div_ck,     CK_443X),
         CLK(NULL,       "dpll_usb_ck",                  &dpll_usb_ck,   CK_443X),
         CLK(NULL,       "dpll_usb_clkdcoldo_ck",        &dpll_usb_clkdcoldo_ck, CK_443X),
@@ -3092,17 +3013,14 @@ static struct omap_clk omap44xx_clks[] = {
         CLK(NULL,       "func_48mc_fclk",               &func_48mc_fclk,        CK_443X),
         CLK(NULL,       "func_64m_fclk",                &func_64m_fclk, CK_443X),
         CLK(NULL,       "func_96m_fclk",                &func_96m_fclk, CK_443X),
-        CLK(NULL,       "hsmmc6_fclk",                  &hsmmc6_fclk,   CK_443X),
         CLK(NULL,       "init_60m_fclk",                &init_60m_fclk, CK_443X),
         CLK(NULL,       "l3_div_ck",                    &l3_div_ck,     CK_443X),
         CLK(NULL,       "l4_div_ck",                    &l4_div_ck,     CK_443X),
         CLK(NULL,       "lp_clk_div_ck",                &lp_clk_div_ck, CK_443X),
         CLK(NULL,       "l4_wkup_clk_mux_ck",           &l4_wkup_clk_mux_ck,    CK_443X),
-        CLK(NULL,       "per_abe_nc_fclk",              &per_abe_nc_fclk,       CK_443X),
-        CLK(NULL,       "mcasp2_fclk",                  &mcasp2_fclk,   CK_443X),
-        CLK(NULL,       "mcasp3_fclk",                  &mcasp3_fclk,   CK_443X),
         CLK(NULL,       "ocp_abe_iclk",                 &ocp_abe_iclk,  CK_443X),
         CLK(NULL,       "per_abe_24m_fclk",             &per_abe_24m_fclk,      CK_443X),
+        CLK(NULL,       "per_abe_nc_fclk",              &per_abe_nc_fclk,       CK_443X),
         CLK(NULL,       "pmd_stm_clock_mux_ck",         &pmd_stm_clock_mux_ck,  CK_443X),
         CLK(NULL,       "pmd_trace_clk_mux_ck",         &pmd_trace_clk_mux_ck,  CK_443X),
         CLK(NULL,       "syc_clk_div_ck",               &syc_clk_div_ck,        CK_443X),
@@ -3204,7 +3122,6 @@ static struct omap_clk omap44xx_clks[] = {
         CLK(NULL,       "uart2_fck",                    &uart2_fck,     CK_443X),
         CLK(NULL,       "uart3_fck",                    &uart3_fck,     CK_443X),
         CLK(NULL,       "uart4_fck",                    &uart4_fck,     CK_443X),
-        CLK(NULL,       "usb_host_fs_fck",              &usb_host_fs_fck,       CK_443X),
         CLK("usbhs-omap.0",     "fs_fck",               &usb_host_fs_fck,       CK_443X),
         CLK(NULL,       "utmi_p1_gfclk",                &utmi_p1_gfclk, CK_443X),
         CLK(NULL,       "usb_host_hs_utmi_p1_clk",      &usb_host_hs_utmi_p1_clk,       CK_443X),
@@ -3216,9 +3133,7 @@ static struct omap_clk omap44xx_clks[] = {
         CLK(NULL,       "usb_host_hs_hsic60m_p2_clk",   &usb_host_hs_hsic60m_p2_clk,    CK_443X),
         CLK(NULL,       "usb_host_hs_hsic480m_p2_clk",  &usb_host_hs_hsic480m_p2_clk,   CK_443X),
         CLK(NULL,       "usb_host_hs_func48mclk",       &usb_host_hs_func48mclk,        CK_443X),
-        CLK(NULL,       "usb_host_hs_fck",              &usb_host_hs_fck,       CK_443X),
         CLK("usbhs-omap.0",     "hs_fck",               &usb_host_hs_fck,       CK_443X),
-        CLK("usbhs-omap.0",     "usbhost_ick",          &dummy_ck,              CK_443X),
         CLK(NULL,       "otg_60m_gfclk",                &otg_60m_gfclk, CK_443X),
         CLK(NULL,       "usb_otg_hs_xclk",              &usb_otg_hs_xclk,       CK_443X),
         CLK("musb-omap2430",    "ick",                          &usb_otg_hs_ick,        CK_443X),
@@ -3226,17 +3141,26 @@ static struct omap_clk omap44xx_clks[] = {
         CLK(NULL,       "usb_tll_hs_usb_ch2_clk",       &usb_tll_hs_usb_ch2_clk,        CK_443X),
         CLK(NULL,       "usb_tll_hs_usb_ch0_clk",       &usb_tll_hs_usb_ch0_clk,        CK_443X),
         CLK(NULL,       "usb_tll_hs_usb_ch1_clk",       &usb_tll_hs_usb_ch1_clk,        CK_443X),
-        CLK(NULL,       "usb_tll_hs_ick",               &usb_tll_hs_ick,        CK_443X),
         CLK("usbhs-omap.0",     "usbtll_ick",           &usb_tll_hs_ick,        CK_443X),
-        CLK("usbhs-omap.0",     "usbtll_fck",           &dummy_ck,      CK_443X),
         CLK(NULL,       "usim_ck",                      &usim_ck,       CK_443X),
         CLK(NULL,       "usim_fclk",                    &usim_fclk,     CK_443X),
         CLK(NULL,       "usim_fck",                     &usim_fck,      CK_443X),
         CLK("omap_wdt", "fck",                          &wd_timer2_fck, CK_443X),
-        CLK(NULL,       "mailboxes_ick",                &dummy_ck,      CK_443X),
         CLK(NULL,       "wd_timer3_fck",                &wd_timer3_fck, CK_443X),
         CLK(NULL,       "stm_clk_div_ck",               &stm_clk_div_ck,        CK_443X),
         CLK(NULL,       "trace_clk_div_ck",             &trace_clk_div_ck,      CK_443X),
+        CLK(NULL,       "auxclk0_ck",                   &auxclk0_ck,    CK_443X),
+        CLK(NULL,       "auxclk1_ck",                   &auxclk1_ck,    CK_443X),
+        CLK(NULL,       "auxclk2_ck",                   &auxclk2_ck,    CK_443X),
+        CLK(NULL,       "auxclk3_ck",                   &auxclk3_ck,    CK_443X),
+        CLK(NULL,       "auxclk4_ck",                   &auxclk4_ck,    CK_443X),
+        CLK(NULL,       "auxclk5_ck",                   &auxclk5_ck,    CK_443X),
+        CLK(NULL,       "auxclkreq0_ck",                &auxclkreq0_ck, CK_443X),
+        CLK(NULL,       "auxclkreq1_ck",                &auxclkreq1_ck, CK_443X),
+        CLK(NULL,       "auxclkreq2_ck",                &auxclkreq2_ck, CK_443X),
+        CLK(NULL,       "auxclkreq3_ck",                &auxclkreq3_ck, CK_443X),
+        CLK(NULL,       "auxclkreq4_ck",                &auxclkreq4_ck, CK_443X),
+        CLK(NULL,       "auxclkreq5_ck",                &auxclkreq5_ck, CK_443X),
         CLK(NULL,       "gpmc_ck",                      &dummy_ck,      CK_443X),
         CLK(NULL,       "gpt1_ick",                     &dummy_ck,      CK_443X),
         CLK(NULL,       "gpt2_ick",                     &dummy_ck,      CK_443X),
@@ -3253,6 +3177,7 @@ static struct omap_clk omap44xx_clks[] = {
         CLK("omap_i2c.2",       "ick",                          &dummy_ck,      CK_443X),
         CLK("omap_i2c.3",       "ick",                          &dummy_ck,      CK_443X),
         CLK("omap_i2c.4",       "ick",                          &dummy_ck,      CK_443X),
+        CLK(NULL,       "mailboxes_ick",                &dummy_ck,      CK_443X),
         CLK("omap_hsmmc.0",     "ick",                          &dummy_ck,      CK_443X),
         CLK("omap_hsmmc.1",     "ick",                          &dummy_ck,      CK_443X),
         CLK("omap_hsmmc.2",     "ick",                          &dummy_ck,      CK_443X),
@@ -3270,19 +3195,9 @@ static struct omap_clk omap44xx_clks[] = {
         CLK(NULL,       "uart2_ick",                    &dummy_ck,      CK_443X),
         CLK(NULL,       "uart3_ick",                    &dummy_ck,      CK_443X),
         CLK(NULL,       "uart4_ick",                    &dummy_ck,      CK_443X),
+        CLK("usbhs-omap.0",     "usbhost_ick",          &dummy_ck,              CK_443X),
+        CLK("usbhs-omap.0",     "usbtll_fck",           &dummy_ck,      CK_443X),
         CLK("omap_wdt", "ick",                          &dummy_ck,      CK_443X),
-        CLK(NULL,       "auxclk0_ck",                   &auxclk0_ck,    CK_443X),
-        CLK(NULL,       "auxclk1_ck",                   &auxclk1_ck,    CK_443X),
-        CLK(NULL,       "auxclk2_ck",                   &auxclk2_ck,    CK_443X),
-        CLK(NULL,       "auxclk3_ck",                   &auxclk3_ck,    CK_443X),
-        CLK(NULL,       "auxclk4_ck",                   &auxclk4_ck,    CK_443X),
-        CLK(NULL,       "auxclk5_ck",                   &auxclk5_ck,    CK_443X),
-        CLK(NULL,       "auxclkreq0_ck",                &auxclkreq0_ck, CK_443X),
-        CLK(NULL,       "auxclkreq1_ck",                &auxclkreq1_ck, CK_443X),
-        CLK(NULL,       "auxclkreq2_ck",                &auxclkreq2_ck, CK_443X),
-        CLK(NULL,       "auxclkreq3_ck",                &auxclkreq3_ck, CK_443X),
-        CLK(NULL,       "auxclkreq4_ck",                &auxclkreq4_ck, CK_443X),
-        CLK(NULL,       "auxclkreq5_ck",                &auxclkreq5_ck, CK_443X),
 };
 
 int __init omap4xxx_clk_init(void)
diff --git a/arch/arm/mach-omap2/clockdomains44xx_data.c b/arch/arm/mach-omap2/clockdomains44xx_data.c
index a607ec196e8b..66090f2676ce 100644
--- a/arch/arm/mach-omap2/clockdomains44xx_data.c
+++ b/arch/arm/mach-omap2/clockdomains44xx_data.c
@@ -1,11 +1,12 @@
 /*
  * OMAP4 Clock domains framework
  *
- * Copyright (C) 2009 Texas Instruments, Inc.
- * Copyright (C) 2009 Nokia Corporation
+ * Copyright (C) 2009-2011 Texas Instruments, Inc.
+ * Copyright (C) 2009-2011 Nokia Corporation
  *
  * Abhijit Pagare (abhijitpagare@ti.com)
  * Benoit Cousson (b-cousson@ti.com)
+ * Paul Walmsley (paul@pwsan.com)
  *
  * This file is automatically generated from the OMAP hardware databases.
  * We respectfully ask that any modifications to this file be coordinated
@@ -32,7 +33,7 @@
 
 /* Static Dependencies for OMAP4 Clock Domains */
 
-static struct clkdm_dep ducati_wkup_sleep_deps[] = {
+static struct clkdm_dep d2d_wkup_sleep_deps[] = {
         {
                 .clkdm_name      = "abe_clkdm",
                 .omap_chip       = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
@@ -50,103 +51,103 @@ static struct clkdm_dep ducati_wkup_sleep_deps[] = {
                 .omap_chip       = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
         },
         {
-                .clkdm_name      = "l3_dss_clkdm",
+                .clkdm_name      = "l3_emif_clkdm",
                 .omap_chip       = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
         },
         {
-                .clkdm_name      = "l3_emif_clkdm",
+                .clkdm_name      = "l3_init_clkdm",
                 .omap_chip       = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
         },
         {
-                .clkdm_name      = "l3_gfx_clkdm",
+                .clkdm_name      = "l4_cfg_clkdm",
                 .omap_chip       = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
         },
         {
-                .clkdm_name      = "l3_init_clkdm",
+                .clkdm_name      = "l4_per_clkdm",
                 .omap_chip       = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
         },
+        { NULL },
+};
+
+static struct clkdm_dep ducati_wkup_sleep_deps[] = {
         {
-                .clkdm_name      = "l4_cfg_clkdm",
+                .clkdm_name      = "abe_clkdm",
                 .omap_chip       = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
         },
         {
-                .clkdm_name      = "l4_per_clkdm",
+                .clkdm_name      = "ivahd_clkdm",
                 .omap_chip       = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
         },
         {
-                .clkdm_name      = "l4_secure_clkdm",
+                .clkdm_name      = "l3_1_clkdm",
                 .omap_chip       = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
         },
         {
-                .clkdm_name      = "l4_wkup_clkdm",
+                .clkdm_name      = "l3_2_clkdm",
                 .omap_chip       = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
         },
         {
-                .clkdm_name      = "tesla_clkdm",
+                .clkdm_name      = "l3_dss_clkdm",
                 .omap_chip       = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
         },
-        { NULL },
-};
-
-static struct clkdm_dep iss_wkup_sleep_deps[] = {
         {
-                .clkdm_name      = "ivahd_clkdm",
+                .clkdm_name      = "l3_emif_clkdm",
                 .omap_chip       = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
         },
         {
-                .clkdm_name      = "l3_1_clkdm",
+                .clkdm_name      = "l3_gfx_clkdm",
                 .omap_chip       = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
         },
         {
-                .clkdm_name      = "l3_emif_clkdm",
+                .clkdm_name      = "l3_init_clkdm",
                 .omap_chip       = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
         },
-        { NULL },
-};
-
-static struct clkdm_dep ivahd_wkup_sleep_deps[] = {
         {
-                .clkdm_name      = "l3_1_clkdm",
+                .clkdm_name      = "l4_cfg_clkdm",
                 .omap_chip       = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
         },
         {
-                .clkdm_name      = "l3_emif_clkdm",
+                .clkdm_name      = "l4_per_clkdm",
                 .omap_chip       = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
         },
-        { NULL },
-};
-
-static struct clkdm_dep l3_d2d_wkup_sleep_deps[] = {
         {
-                .clkdm_name      = "abe_clkdm",
+                .clkdm_name      = "l4_secure_clkdm",
                 .omap_chip       = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
         },
         {
-                .clkdm_name      = "ivahd_clkdm",
+                .clkdm_name      = "l4_wkup_clkdm",
                 .omap_chip       = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
         },
         {
-                .clkdm_name      = "l3_1_clkdm",
+                .clkdm_name      = "tesla_clkdm",
                 .omap_chip       = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
         },
+        { NULL },
+};
+
+static struct clkdm_dep iss_wkup_sleep_deps[] = {
         {
-                .clkdm_name      = "l3_2_clkdm",
+                .clkdm_name      = "ivahd_clkdm",
                 .omap_chip       = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
         },
         {
-                .clkdm_name      = "l3_emif_clkdm",
+                .clkdm_name      = "l3_1_clkdm",
                 .omap_chip       = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
         },
         {
-                .clkdm_name      = "l3_init_clkdm",
+                .clkdm_name      = "l3_emif_clkdm",
                 .omap_chip       = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
         },
+        { NULL },
+};
+
+static struct clkdm_dep ivahd_wkup_sleep_deps[] = {
         {
-                .clkdm_name      = "l4_cfg_clkdm",
+                .clkdm_name      = "l3_1_clkdm",
                 .omap_chip       = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
         },
         {
-                .clkdm_name      = "l4_per_clkdm",
+                .clkdm_name      = "l3_emif_clkdm",
                 .omap_chip       = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
         },
         { NULL },
@@ -280,7 +281,7 @@ static struct clkdm_dep l4_secure_wkup_sleep_deps[] = {
         { NULL },
 };
 
-static struct clkdm_dep mpuss_wkup_sleep_deps[] = {
+static struct clkdm_dep mpu_wkup_sleep_deps[] = {
         {
                 .clkdm_name      = "abe_clkdm",
                 .omap_chip       = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
@@ -497,14 +498,14 @@ static struct clockdomain l3_init_44xx_clkdm = {
         .omap_chip        = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
-static struct clockdomain mpuss_44xx_clkdm = {
-        .name             = "mpuss_clkdm",
-        .pwrdm            = { .name = "mpu_pwrdm" },
-        .prcm_partition   = OMAP4430_CM1_PARTITION,
-        .cm_inst          = OMAP4430_CM1_MPU_INST,
-        .clkdm_offs       = OMAP4430_CM1_MPU_MPU_CDOFFS,
-        .wkdep_srcs       = mpuss_wkup_sleep_deps,
-        .sleepdep_srcs    = mpuss_wkup_sleep_deps,
+static struct clockdomain d2d_44xx_clkdm = {
+        .name             = "d2d_clkdm",
+        .pwrdm            = { .name = "core_pwrdm" },
+        .prcm_partition   = OMAP4430_CM2_PARTITION,
+        .cm_inst          = OMAP4430_CM2_CORE_INST,
+        .clkdm_offs       = OMAP4430_CM2_CORE_D2D_CDOFFS,
+        .wkdep_srcs       = d2d_wkup_sleep_deps,
+        .sleepdep_srcs    = d2d_wkup_sleep_deps,
         .flags            = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP,
         .omap_chip        = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
@@ -563,6 +564,18 @@ static struct clockdomain ducati_44xx_clkdm = {
         .omap_chip        = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
+static struct clockdomain mpu_44xx_clkdm = {
+        .name             = "mpu_clkdm",
+        .pwrdm            = { .name = "mpu_pwrdm" },
+        .prcm_partition   = OMAP4430_CM1_PARTITION,
+        .cm_inst          = OMAP4430_CM1_MPU_INST,
+        .clkdm_offs       = OMAP4430_CM1_MPU_MPU_CDOFFS,
+        .wkdep_srcs       = mpu_wkup_sleep_deps,
+        .sleepdep_srcs    = mpu_wkup_sleep_deps,
+        .flags            = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP,
+        .omap_chip        = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
+};
+
 static struct clockdomain l3_2_44xx_clkdm = {
         .name             = "l3_2_clkdm",
         .pwrdm            = { .name = "core_pwrdm" },
@@ -585,18 +598,6 @@ static struct clockdomain l3_1_44xx_clkdm = {
         .omap_chip        = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
-static struct clockdomain l3_d2d_44xx_clkdm = {
-        .name             = "l3_d2d_clkdm",
-        .pwrdm            = { .name = "core_pwrdm" },
-        .prcm_partition   = OMAP4430_CM2_PARTITION,
-        .cm_inst          = OMAP4430_CM2_CORE_INST,
-        .clkdm_offs       = OMAP4430_CM2_CORE_D2D_CDOFFS,
-        .wkdep_srcs       = l3_d2d_wkup_sleep_deps,
-        .sleepdep_srcs    = l3_d2d_wkup_sleep_deps,
-        .flags            = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP,
-        .omap_chip        = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
-};
-
 static struct clockdomain iss_44xx_clkdm = {
         .name             = "iss_clkdm",
         .pwrdm            = { .name = "cam_pwrdm" },
@@ -655,6 +656,7 @@ static struct clockdomain l3_dma_44xx_clkdm = {
         .omap_chip        = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
+/* As clockdomains are added or removed above, this list must also be changed */
 static struct clockdomain *clockdomains_omap44xx[] __initdata = {
         &l4_cefuse_44xx_clkdm,
         &l4_cfg_44xx_clkdm,
@@ -666,21 +668,21 @@ static struct clockdomain *clockdomains_omap44xx[] __initdata = {
         &abe_44xx_clkdm,
         &l3_instr_44xx_clkdm,
         &l3_init_44xx_clkdm,
-        &mpuss_44xx_clkdm,
+        &d2d_44xx_clkdm,
         &mpu0_44xx_clkdm,
         &mpu1_44xx_clkdm,
         &l3_emif_44xx_clkdm,
         &l4_ao_44xx_clkdm,
         &ducati_44xx_clkdm,
+        &mpu_44xx_clkdm,
         &l3_2_44xx_clkdm,
         &l3_1_44xx_clkdm,
-        &l3_d2d_44xx_clkdm,
         &iss_44xx_clkdm,
         &l3_dss_44xx_clkdm,
         &l4_wkup_44xx_clkdm,
         &emu_sys_44xx_clkdm,
         &l3_dma_44xx_clkdm,
-        NULL,
+        NULL
 };
 
 void __init omap44xx_clockdomains_init(void)
diff --git a/arch/arm/mach-omap2/cm-regbits-44xx.h b/arch/arm/mach-omap2/cm-regbits-44xx.h
index 9d47a05b17b4..0e77945d26ec 100644
--- a/arch/arm/mach-omap2/cm-regbits-44xx.h
+++ b/arch/arm/mach-omap2/cm-regbits-44xx.h
@@ -22,22 +22,18 @@
 #ifndef __ARCH_ARM_MACH_OMAP2_CM_REGBITS_44XX_H
 #define __ARCH_ARM_MACH_OMAP2_CM_REGBITS_44XX_H
 
-/*
- * Used by CM_L3_1_DYNAMICDEP, CM_L3_1_DYNAMICDEP_RESTORE, CM_MPU_DYNAMICDEP,
- * CM_TESLA_DYNAMICDEP
- */
+/* Used by CM_L3_1_DYNAMICDEP, CM_MPU_DYNAMICDEP, CM_TESLA_DYNAMICDEP */
 #define OMAP4430_ABE_DYNDEP_SHIFT                               3
 #define OMAP4430_ABE_DYNDEP_MASK                                (1 << 3)
 
 /*
- * Used by CM_D2D_STATICDEP, CM_D2D_STATICDEP_RESTORE, CM_DUCATI_STATICDEP,
- * CM_L3INIT_STATICDEP, CM_MPU_STATICDEP, CM_SDMA_STATICDEP,
- * CM_SDMA_STATICDEP_RESTORE, CM_TESLA_STATICDEP
+ * Used by CM_D2D_STATICDEP, CM_DUCATI_STATICDEP, CM_L3INIT_STATICDEP,
+ * CM_MPU_STATICDEP, CM_SDMA_STATICDEP, CM_TESLA_STATICDEP
  */
 #define OMAP4430_ABE_STATDEP_SHIFT                              3
 #define OMAP4430_ABE_STATDEP_MASK                               (1 << 3)
 
-/* Used by CM_L4CFG_DYNAMICDEP, CM_L4CFG_DYNAMICDEP_RESTORE */
+/* Used by CM_L4CFG_DYNAMICDEP */
 #define OMAP4430_ALWONCORE_DYNDEP_SHIFT                         16
 #define OMAP4430_ALWONCORE_DYNDEP_MASK                          (1 << 16)
 
@@ -47,14 +43,13 @@
 
 /*
  * Used by CM_AUTOIDLE_DPLL_ABE, CM_AUTOIDLE_DPLL_CORE,
- * CM_AUTOIDLE_DPLL_CORE_RESTORE, CM_AUTOIDLE_DPLL_DDRPHY,
- * CM_AUTOIDLE_DPLL_IVA, CM_AUTOIDLE_DPLL_MPU, CM_AUTOIDLE_DPLL_PER,
- * CM_AUTOIDLE_DPLL_UNIPRO, CM_AUTOIDLE_DPLL_USB
+ * CM_AUTOIDLE_DPLL_DDRPHY, CM_AUTOIDLE_DPLL_IVA, CM_AUTOIDLE_DPLL_MPU,
+ * CM_AUTOIDLE_DPLL_PER, CM_AUTOIDLE_DPLL_UNIPRO, CM_AUTOIDLE_DPLL_USB
  */
 #define OMAP4430_AUTO_DPLL_MODE_SHIFT                           0
 #define OMAP4430_AUTO_DPLL_MODE_MASK                            (0x7 << 0)
 
-/* Used by CM_L4CFG_DYNAMICDEP, CM_L4CFG_DYNAMICDEP_RESTORE */
+/* Used by CM_L4CFG_DYNAMICDEP */
 #define OMAP4430_CEFUSE_DYNDEP_SHIFT                            17
 #define OMAP4430_CEFUSE_DYNDEP_MASK                             (1 << 17)
 
@@ -82,15 +77,15 @@
 #define OMAP4430_CLKACTIVITY_ABE_X2_CLK_SHIFT                   8
 #define OMAP4430_CLKACTIVITY_ABE_X2_CLK_MASK                    (1 << 8)
 
-/* Used by CM_MEMIF_CLKSTCTRL, CM_MEMIF_CLKSTCTRL_RESTORE */
+/* Used by CM_MEMIF_CLKSTCTRL */
 #define OMAP4430_CLKACTIVITY_ASYNC_DLL_CLK_SHIFT                11
 #define OMAP4430_CLKACTIVITY_ASYNC_DLL_CLK_MASK                 (1 << 11)
 
-/* Used by CM_MEMIF_CLKSTCTRL, CM_MEMIF_CLKSTCTRL_RESTORE */
+/* Used by CM_MEMIF_CLKSTCTRL */
 #define OMAP4430_CLKACTIVITY_ASYNC_PHY1_CLK_SHIFT               12
 #define OMAP4430_CLKACTIVITY_ASYNC_PHY1_CLK_MASK                (1 << 12)
 
-/* Used by CM_MEMIF_CLKSTCTRL, CM_MEMIF_CLKSTCTRL_RESTORE */
+/* Used by CM_MEMIF_CLKSTCTRL */
 #define OMAP4430_CLKACTIVITY_ASYNC_PHY2_CLK_SHIFT               13
 #define OMAP4430_CLKACTIVITY_ASYNC_PHY2_CLK_MASK                (1 << 13)
 
@@ -110,31 +105,31 @@
 #define OMAP4430_CLKACTIVITY_CUST_EFUSE_SYS_CLK_SHIFT           9
 #define OMAP4430_CLKACTIVITY_CUST_EFUSE_SYS_CLK_MASK            (1 << 9)
 
-/* Used by CM_MEMIF_CLKSTCTRL, CM_MEMIF_CLKSTCTRL_RESTORE */
+/* Used by CM_MEMIF_CLKSTCTRL */
 #define OMAP4430_CLKACTIVITY_DLL_CLK_SHIFT                      9
 #define OMAP4430_CLKACTIVITY_DLL_CLK_MASK                       (1 << 9)
 
-/* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */
+/* Used by CM_L4PER_CLKSTCTRL */
 #define OMAP4430_CLKACTIVITY_DMT10_GFCLK_SHIFT                  9
 #define OMAP4430_CLKACTIVITY_DMT10_GFCLK_MASK                   (1 << 9)
 
-/* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */
+/* Used by CM_L4PER_CLKSTCTRL */
 #define OMAP4430_CLKACTIVITY_DMT11_GFCLK_SHIFT                  10
 #define OMAP4430_CLKACTIVITY_DMT11_GFCLK_MASK                   (1 << 10)
 
-/* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */
+/* Used by CM_L4PER_CLKSTCTRL */
 #define OMAP4430_CLKACTIVITY_DMT2_GFCLK_SHIFT                   11
 #define OMAP4430_CLKACTIVITY_DMT2_GFCLK_MASK                    (1 << 11)
 
-/* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */
+/* Used by CM_L4PER_CLKSTCTRL */
 #define OMAP4430_CLKACTIVITY_DMT3_GFCLK_SHIFT                   12
 #define OMAP4430_CLKACTIVITY_DMT3_GFCLK_MASK                    (1 << 12)
 
-/* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */
+/* Used by CM_L4PER_CLKSTCTRL */
 #define OMAP4430_CLKACTIVITY_DMT4_GFCLK_SHIFT                   13
 #define OMAP4430_CLKACTIVITY_DMT4_GFCLK_MASK                    (1 << 13)
 
-/* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */
+/* Used by CM_L4PER_CLKSTCTRL */
 #define OMAP4430_CLKACTIVITY_DMT9_GFCLK_SHIFT                   14
 #define OMAP4430_CLKACTIVITY_DMT9_GFCLK_MASK                    (1 << 14)
 
@@ -158,7 +153,7 @@
 #define OMAP4430_CLKACTIVITY_FDIF_GFCLK_SHIFT                   10
 #define OMAP4430_CLKACTIVITY_FDIF_GFCLK_MASK                    (1 << 10)
 
-/* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */
+/* Used by CM_L4PER_CLKSTCTRL */
 #define OMAP4430_CLKACTIVITY_FUNC_12M_GFCLK_SHIFT               15
 #define OMAP4430_CLKACTIVITY_FUNC_12M_GFCLK_MASK                (1 << 15)
 
@@ -170,55 +165,55 @@
 #define OMAP4430_CLKACTIVITY_HDMI_PHY_48MHZ_GFCLK_SHIFT         11
 #define OMAP4430_CLKACTIVITY_HDMI_PHY_48MHZ_GFCLK_MASK          (1 << 11)
 
-/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */
+/* Used by CM_L3INIT_CLKSTCTRL */
 #define OMAP4430_CLKACTIVITY_HSIC_P1_480M_GFCLK_SHIFT           20
 #define OMAP4430_CLKACTIVITY_HSIC_P1_480M_GFCLK_MASK            (1 << 20)
 
-/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */
+/* Used by CM_L3INIT_CLKSTCTRL */
 #define OMAP4430_CLKACTIVITY_HSIC_P1_GFCLK_SHIFT                26
 #define OMAP4430_CLKACTIVITY_HSIC_P1_GFCLK_MASK                 (1 << 26)
 
-/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */
+/* Used by CM_L3INIT_CLKSTCTRL */
 #define OMAP4430_CLKACTIVITY_HSIC_P2_480M_GFCLK_SHIFT           21
 #define OMAP4430_CLKACTIVITY_HSIC_P2_480M_GFCLK_MASK            (1 << 21)
 
-/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */
+/* Used by CM_L3INIT_CLKSTCTRL */
 #define OMAP4430_CLKACTIVITY_HSIC_P2_GFCLK_SHIFT                27
 #define OMAP4430_CLKACTIVITY_HSIC_P2_GFCLK_MASK                 (1 << 27)
 
-/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */
+/* Used by CM_L3INIT_CLKSTCTRL */
 #define OMAP4430_CLKACTIVITY_INIT_48MC_GFCLK_SHIFT              13
 #define OMAP4430_CLKACTIVITY_INIT_48MC_GFCLK_MASK               (1 << 13)
 
-/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */
+/* Used by CM_L3INIT_CLKSTCTRL */
 #define OMAP4430_CLKACTIVITY_INIT_48M_GFCLK_SHIFT               12
 #define OMAP4430_CLKACTIVITY_INIT_48M_GFCLK_MASK                (1 << 12)
 
-/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */
+/* Used by CM_L3INIT_CLKSTCTRL */
 #define OMAP4430_CLKACTIVITY_INIT_60M_P1_GFCLK_SHIFT            28
 #define OMAP4430_CLKACTIVITY_INIT_60M_P1_GFCLK_MASK             (1 << 28)
 
-/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */
+/* Used by CM_L3INIT_CLKSTCTRL */
 #define OMAP4430_CLKACTIVITY_INIT_60M_P2_GFCLK_SHIFT            29
 #define OMAP4430_CLKACTIVITY_INIT_60M_P2_GFCLK_MASK             (1 << 29)
 
-/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */
+/* Used by CM_L3INIT_CLKSTCTRL */
 #define OMAP4430_CLKACTIVITY_INIT_96M_GFCLK_SHIFT               11
 #define OMAP4430_CLKACTIVITY_INIT_96M_GFCLK_MASK                (1 << 11)
 
-/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */
+/* Used by CM_L3INIT_CLKSTCTRL */
 #define OMAP4430_CLKACTIVITY_INIT_HSI_GFCLK_SHIFT               16
 #define OMAP4430_CLKACTIVITY_INIT_HSI_GFCLK_MASK                (1 << 16)
 
-/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */
+/* Used by CM_L3INIT_CLKSTCTRL */
 #define OMAP4430_CLKACTIVITY_INIT_HSMMC1_GFCLK_SHIFT            17
 #define OMAP4430_CLKACTIVITY_INIT_HSMMC1_GFCLK_MASK             (1 << 17)
 
-/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */
+/* Used by CM_L3INIT_CLKSTCTRL */
 #define OMAP4430_CLKACTIVITY_INIT_HSMMC2_GFCLK_SHIFT            18
 #define OMAP4430_CLKACTIVITY_INIT_HSMMC2_GFCLK_MASK             (1 << 18)
 
-/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */
+/* Used by CM_L3INIT_CLKSTCTRL */
 #define OMAP4430_CLKACTIVITY_INIT_HSMMC6_GFCLK_SHIFT            19
 #define OMAP4430_CLKACTIVITY_INIT_HSMMC6_GFCLK_MASK             (1 << 19)
 
@@ -234,11 +229,11 @@
 #define OMAP4430_CLKACTIVITY_L3X2_D2D_GICLK_SHIFT               10
 #define OMAP4430_CLKACTIVITY_L3X2_D2D_GICLK_MASK                (1 << 10)
 
-/* Used by CM_L3_1_CLKSTCTRL, CM_L3_1_CLKSTCTRL_RESTORE */
+/* Used by CM_L3_1_CLKSTCTRL */
 #define OMAP4430_CLKACTIVITY_L3_1_GICLK_SHIFT                   8
 #define OMAP4430_CLKACTIVITY_L3_1_GICLK_MASK                    (1 << 8)
 
-/* Used by CM_L3_2_CLKSTCTRL, CM_L3_2_CLKSTCTRL_RESTORE */
+/* Used by CM_L3_2_CLKSTCTRL */
 #define OMAP4430_CLKACTIVITY_L3_2_GICLK_SHIFT                   8
 #define OMAP4430_CLKACTIVITY_L3_2_GICLK_MASK                    (1 << 8)
 
@@ -254,7 +249,7 @@
 #define OMAP4430_CLKACTIVITY_L3_DSS_GICLK_SHIFT                 8
 #define OMAP4430_CLKACTIVITY_L3_DSS_GICLK_MASK                  (1 << 8)
 
-/* Used by CM_MEMIF_CLKSTCTRL, CM_MEMIF_CLKSTCTRL_RESTORE */
+/* Used by CM_MEMIF_CLKSTCTRL */
 #define OMAP4430_CLKACTIVITY_L3_EMIF_GICLK_SHIFT                8
 #define OMAP4430_CLKACTIVITY_L3_EMIF_GICLK_MASK                 (1 << 8)
 
@@ -262,7 +257,7 @@
 #define OMAP4430_CLKACTIVITY_L3_GFX_GICLK_SHIFT                 8
 #define OMAP4430_CLKACTIVITY_L3_GFX_GICLK_MASK                  (1 << 8)
 
-/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */
+/* Used by CM_L3INIT_CLKSTCTRL */
 #define OMAP4430_CLKACTIVITY_L3_INIT_GICLK_SHIFT                8
 #define OMAP4430_CLKACTIVITY_L3_INIT_GICLK_MASK                 (1 << 8)
 
@@ -282,7 +277,7 @@
 #define OMAP4430_CLKACTIVITY_L4_CEFUSE_GICLK_SHIFT              8
 #define OMAP4430_CLKACTIVITY_L4_CEFUSE_GICLK_MASK               (1 << 8)
 
-/* Used by CM_L4CFG_CLKSTCTRL, CM_L4CFG_CLKSTCTRL_RESTORE */
+/* Used by CM_L4CFG_CLKSTCTRL */
 #define OMAP4430_CLKACTIVITY_L4_CFG_GICLK_SHIFT                 8
 #define OMAP4430_CLKACTIVITY_L4_CFG_GICLK_MASK                  (1 << 8)
 
@@ -290,11 +285,11 @@
 #define OMAP4430_CLKACTIVITY_L4_D2D_GICLK_SHIFT                 9
 #define OMAP4430_CLKACTIVITY_L4_D2D_GICLK_MASK                  (1 << 9)
 
-/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */
+/* Used by CM_L3INIT_CLKSTCTRL */
 #define OMAP4430_CLKACTIVITY_L4_INIT_GICLK_SHIFT                9
 #define OMAP4430_CLKACTIVITY_L4_INIT_GICLK_MASK                 (1 << 9)
 
-/* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */
+/* Used by CM_L4PER_CLKSTCTRL */
 #define OMAP4430_CLKACTIVITY_L4_PER_GICLK_SHIFT                 8
 #define OMAP4430_CLKACTIVITY_L4_PER_GICLK_MASK                  (1 << 8)
 
@@ -306,7 +301,7 @@
 #define OMAP4430_CLKACTIVITY_L4_WKUP_GICLK_SHIFT                12
 #define OMAP4430_CLKACTIVITY_L4_WKUP_GICLK_MASK                 (1 << 12)
 
-/* Used by CM_MPU_CLKSTCTRL, CM_MPU_CLKSTCTRL_RESTORE */
+/* Used by CM_MPU_CLKSTCTRL */
 #define OMAP4430_CLKACTIVITY_MPU_DPLL_CLK_SHIFT                 8
 #define OMAP4430_CLKACTIVITY_MPU_DPLL_CLK_MASK                  (1 << 8)
 
@@ -314,43 +309,43 @@
 #define OMAP4430_CLKACTIVITY_OCP_ABE_GICLK_SHIFT                9
 #define OMAP4430_CLKACTIVITY_OCP_ABE_GICLK_MASK                 (1 << 9)
 
-/* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */
+/* Used by CM_L4PER_CLKSTCTRL */
 #define OMAP4430_CLKACTIVITY_PER_24MC_GFCLK_SHIFT               16
 #define OMAP4430_CLKACTIVITY_PER_24MC_GFCLK_MASK                (1 << 16)
 
-/* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */
+/* Used by CM_L4PER_CLKSTCTRL */
 #define OMAP4430_CLKACTIVITY_PER_32K_GFCLK_SHIFT                17
 #define OMAP4430_CLKACTIVITY_PER_32K_GFCLK_MASK                 (1 << 17)
 
-/* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */
+/* Used by CM_L4PER_CLKSTCTRL */
 #define OMAP4430_CLKACTIVITY_PER_48M_GFCLK_SHIFT                18
 #define OMAP4430_CLKACTIVITY_PER_48M_GFCLK_MASK                 (1 << 18)
 
-/* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */
+/* Used by CM_L4PER_CLKSTCTRL */
 #define OMAP4430_CLKACTIVITY_PER_96M_GFCLK_SHIFT                19
 #define OMAP4430_CLKACTIVITY_PER_96M_GFCLK_MASK                 (1 << 19)
 
-/* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */
+/* Used by CM_L4PER_CLKSTCTRL */
 #define OMAP4430_CLKACTIVITY_PER_ABE_24M_GFCLK_SHIFT            25
 #define OMAP4430_CLKACTIVITY_PER_ABE_24M_GFCLK_MASK             (1 << 25)
 
-/* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */
+/* Used by CM_L4PER_CLKSTCTRL */
 #define OMAP4430_CLKACTIVITY_PER_MCASP2_GFCLK_SHIFT             20
 #define OMAP4430_CLKACTIVITY_PER_MCASP2_GFCLK_MASK              (1 << 20)
 
-/* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */
+/* Used by CM_L4PER_CLKSTCTRL */
 #define OMAP4430_CLKACTIVITY_PER_MCASP3_GFCLK_SHIFT             21
 #define OMAP4430_CLKACTIVITY_PER_MCASP3_GFCLK_MASK              (1 << 21)
 
-/* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */
+/* Used by CM_L4PER_CLKSTCTRL */
 #define OMAP4430_CLKACTIVITY_PER_MCBSP4_GFCLK_SHIFT             22
 #define OMAP4430_CLKACTIVITY_PER_MCBSP4_GFCLK_MASK              (1 << 22)
 
-/* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */
+/* Used by CM_L4PER_CLKSTCTRL */
 #define OMAP4430_CLKACTIVITY_PER_SYS_GFCLK_SHIFT                24
 #define OMAP4430_CLKACTIVITY_PER_SYS_GFCLK_MASK                 (1 << 24)
 
-/* Used by CM_MEMIF_CLKSTCTRL, CM_MEMIF_CLKSTCTRL_RESTORE */
+/* Used by CM_MEMIF_CLKSTCTRL */
 #define OMAP4430_CLKACTIVITY_PHY_ROOT_CLK_SHIFT                 10
 #define OMAP4430_CLKACTIVITY_PHY_ROOT_CLK_MASK                  (1 << 10)
 
@@ -378,27 +373,27 @@
 #define OMAP4430_CLKACTIVITY_TESLA_ROOT_CLK_SHIFT               8
 #define OMAP4430_CLKACTIVITY_TESLA_ROOT_CLK_MASK                (1 << 8)
 
-/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */
+/* Used by CM_L3INIT_CLKSTCTRL */
 #define OMAP4430_CLKACTIVITY_TLL_CH0_GFCLK_SHIFT                22
 #define OMAP4430_CLKACTIVITY_TLL_CH0_GFCLK_MASK                 (1 << 22)
 
-/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */
+/* Used by CM_L3INIT_CLKSTCTRL */
 #define OMAP4430_CLKACTIVITY_TLL_CH1_GFCLK_SHIFT                23
 #define OMAP4430_CLKACTIVITY_TLL_CH1_GFCLK_MASK                 (1 << 23)
 
-/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */
+/* Used by CM_L3INIT_CLKSTCTRL */
 #define OMAP4430_CLKACTIVITY_TLL_CH2_GFCLK_SHIFT                24
 #define OMAP4430_CLKACTIVITY_TLL_CH2_GFCLK_MASK                 (1 << 24)
 
-/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */
+/* Used by CM_L3INIT_CLKSTCTRL */
 #define OMAP4430_CLKACTIVITY_UNIPRO_DPLL_CLK_SHIFT              10
 #define OMAP4430_CLKACTIVITY_UNIPRO_DPLL_CLK_MASK               (1 << 10)
 
-/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */
+/* Used by CM_L3INIT_CLKSTCTRL */
 #define OMAP4430_CLKACTIVITY_USB_DPLL_CLK_SHIFT                 14
 #define OMAP4430_CLKACTIVITY_USB_DPLL_CLK_MASK                  (1 << 14)
 
-/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */
+/* Used by CM_L3INIT_CLKSTCTRL */
 #define OMAP4430_CLKACTIVITY_USB_DPLL_HS_CLK_SHIFT              15
 #define OMAP4430_CLKACTIVITY_USB_DPLL_HS_CLK_MASK               (1 << 15)
 
@@ -406,11 +401,11 @@
 #define OMAP4430_CLKACTIVITY_USIM_GFCLK_SHIFT                   10
 #define OMAP4430_CLKACTIVITY_USIM_GFCLK_MASK                    (1 << 10)
 
-/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */
+/* Used by CM_L3INIT_CLKSTCTRL */
 #define OMAP4430_CLKACTIVITY_UTMI_P3_GFCLK_SHIFT                30
 #define OMAP4430_CLKACTIVITY_UTMI_P3_GFCLK_MASK                 (1 << 30)
 
-/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */
+/* Used by CM_L3INIT_CLKSTCTRL */
 #define OMAP4430_CLKACTIVITY_UTMI_ROOT_GFCLK_SHIFT              25
 #define OMAP4430_CLKACTIVITY_UTMI_ROOT_GFCLK_MASK               (1 << 25)
 
@@ -432,7 +427,7 @@
 
 /*
  * Renamed from CLKSEL Used by CM_ABE_DSS_SYS_CLKSEL, CM_ABE_PLL_REF_CLKSEL,
- * CM_L4_WKUP_CLKSEL, CM_CLKSEL_DUCATI_ISS_ROOT, CM_CLKSEL_USB_60MHZ
+ * CM_CLKSEL_DUCATI_ISS_ROOT, CM_CLKSEL_USB_60MHZ, CM_L4_WKUP_CLKSEL
  */
 #define OMAP4430_CLKSEL_0_0_SHIFT                               0
 #define OMAP4430_CLKSEL_0_0_MASK                                (1 << 0)
@@ -453,14 +448,11 @@
 #define OMAP4430_CLKSEL_AESS_FCLK_SHIFT                         24
 #define OMAP4430_CLKSEL_AESS_FCLK_MASK                          (1 << 24)
 
-/* Used by CM_CLKSEL_CORE, CM_CLKSEL_CORE_RESTORE */
+/* Used by CM_CLKSEL_CORE */
 #define OMAP4430_CLKSEL_CORE_SHIFT                              0
 #define OMAP4430_CLKSEL_CORE_MASK                               (1 << 0)
 
-/*
- * Renamed from CLKSEL_CORE Used by CM_SHADOW_FREQ_CONFIG2_RESTORE,
- * CM_SHADOW_FREQ_CONFIG2
- */
+/* Renamed from CLKSEL_CORE Used by CM_SHADOW_FREQ_CONFIG2 */
 #define OMAP4430_CLKSEL_CORE_1_1_SHIFT                          1
 #define OMAP4430_CLKSEL_CORE_1_1_MASK                           (1 << 1)
 
@@ -484,18 +476,15 @@
 #define OMAP4430_CLKSEL_INTERNAL_SOURCE_CM1_ABE_DMIC_SHIFT      26
 #define OMAP4430_CLKSEL_INTERNAL_SOURCE_CM1_ABE_DMIC_MASK       (0x3 << 26)
 
-/* Used by CM_CLKSEL_CORE, CM_CLKSEL_CORE_RESTORE */
+/* Used by CM_CLKSEL_CORE */
 #define OMAP4430_CLKSEL_L3_SHIFT                                4
 #define OMAP4430_CLKSEL_L3_MASK                                 (1 << 4)
 
-/*
- * Renamed from CLKSEL_L3 Used by CM_SHADOW_FREQ_CONFIG2_RESTORE,
- * CM_SHADOW_FREQ_CONFIG2
- */
+/* Renamed from CLKSEL_L3 Used by CM_SHADOW_FREQ_CONFIG2 */
 #define OMAP4430_CLKSEL_L3_SHADOW_SHIFT                         2
 #define OMAP4430_CLKSEL_L3_SHADOW_MASK                          (1 << 2)
 
-/* Used by CM_CLKSEL_CORE, CM_CLKSEL_CORE_RESTORE */
+/* Used by CM_CLKSEL_CORE */
 #define OMAP4430_CLKSEL_L4_SHIFT                                8
 #define OMAP4430_CLKSEL_L4_MASK                                 (1 << 8)
 
@@ -526,11 +515,11 @@
 #define OMAP4430_CLKSEL_SOURCE_24_24_SHIFT                      24
 #define OMAP4430_CLKSEL_SOURCE_24_24_MASK                       (1 << 24)
 
-/* Used by CM_L3INIT_USB_HOST_CLKCTRL, CM_L3INIT_USB_HOST_CLKCTRL_RESTORE */
+/* Used by CM_L3INIT_USB_HOST_CLKCTRL */
 #define OMAP4430_CLKSEL_UTMI_P1_SHIFT                           24
 #define OMAP4430_CLKSEL_UTMI_P1_MASK                            (1 << 24)
 
-/* Used by CM_L3INIT_USB_HOST_CLKCTRL, CM_L3INIT_USB_HOST_CLKCTRL_RESTORE */
+/* Used by CM_L3INIT_USB_HOST_CLKCTRL */
 #define OMAP4430_CLKSEL_UTMI_P2_SHIFT                           25
 #define OMAP4430_CLKSEL_UTMI_P2_MASK                            (1 << 25)
 
@@ -538,13 +527,10 @@
  * Used by CM1_ABE_CLKSTCTRL, CM_ALWON_CLKSTCTRL, CM_CAM_CLKSTCTRL,
  * CM_CEFUSE_CLKSTCTRL, CM_D2D_CLKSTCTRL, CM_DSS_CLKSTCTRL,
  * CM_DUCATI_CLKSTCTRL, CM_EMU_CLKSTCTRL, CM_GFX_CLKSTCTRL, CM_IVAHD_CLKSTCTRL,
- * CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE, CM_L3INSTR_CLKSTCTRL,
- * CM_L3_1_CLKSTCTRL, CM_L3_1_CLKSTCTRL_RESTORE, CM_L3_2_CLKSTCTRL,
- * CM_L3_2_CLKSTCTRL_RESTORE, CM_L4CFG_CLKSTCTRL, CM_L4CFG_CLKSTCTRL_RESTORE,
- * CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE, CM_L4SEC_CLKSTCTRL,
- * CM_MEMIF_CLKSTCTRL, CM_MEMIF_CLKSTCTRL_RESTORE, CM_MPU_CLKSTCTRL,
- * CM_MPU_CLKSTCTRL_RESTORE, CM_SDMA_CLKSTCTRL, CM_TESLA_CLKSTCTRL,
- * CM_WKUP_CLKSTCTRL
+ * CM_L3INIT_CLKSTCTRL, CM_L3INSTR_CLKSTCTRL, CM_L3_1_CLKSTCTRL,
+ * CM_L3_2_CLKSTCTRL, CM_L4CFG_CLKSTCTRL, CM_L4PER_CLKSTCTRL,
+ * CM_L4SEC_CLKSTCTRL, CM_MEMIF_CLKSTCTRL, CM_MPU_CLKSTCTRL, CM_SDMA_CLKSTCTRL,
+ * CM_TESLA_CLKSTCTRL, CM_WKUP_CLKSTCTRL
  */
 #define OMAP4430_CLKTRCTRL_SHIFT                                0
 #define OMAP4430_CLKTRCTRL_MASK                                 (0x3 << 0)
@@ -561,10 +547,7 @@
 #define OMAP4430_CUSTOM_SHIFT                                   6
 #define OMAP4430_CUSTOM_MASK                                    (0x3 << 6)
 
-/*
- * Used by CM_L3_2_DYNAMICDEP, CM_L3_2_DYNAMICDEP_RESTORE, CM_L4CFG_DYNAMICDEP,
- * CM_L4CFG_DYNAMICDEP_RESTORE
- */
+/* Used by CM_L3_2_DYNAMICDEP, CM_L4CFG_DYNAMICDEP */
 #define OMAP4430_D2D_DYNDEP_SHIFT                               18
 #define OMAP4430_D2D_DYNDEP_MASK                                (1 << 18)
 
@@ -574,31 +557,29 @@
 
 /*
  * Used by CM_SSC_DELTAMSTEP_DPLL_ABE, CM_SSC_DELTAMSTEP_DPLL_CORE,
- * CM_SSC_DELTAMSTEP_DPLL_CORE_RESTORE, CM_SSC_DELTAMSTEP_DPLL_DDRPHY,
- * CM_SSC_DELTAMSTEP_DPLL_IVA, CM_SSC_DELTAMSTEP_DPLL_MPU,
- * CM_SSC_DELTAMSTEP_DPLL_PER, CM_SSC_DELTAMSTEP_DPLL_UNIPRO,
- * CM_SSC_DELTAMSTEP_DPLL_USB
+ * CM_SSC_DELTAMSTEP_DPLL_DDRPHY, CM_SSC_DELTAMSTEP_DPLL_IVA,
+ * CM_SSC_DELTAMSTEP_DPLL_MPU, CM_SSC_DELTAMSTEP_DPLL_PER,
+ * CM_SSC_DELTAMSTEP_DPLL_UNIPRO, CM_SSC_DELTAMSTEP_DPLL_USB
  */
 #define OMAP4430_DELTAMSTEP_SHIFT                               0
 #define OMAP4430_DELTAMSTEP_MASK                                (0xfffff << 0)
 
-/* Used by CM_SHADOW_FREQ_CONFIG1, CM_SHADOW_FREQ_CONFIG1_RESTORE */
-#define OMAP4430_DLL_OVERRIDE_SHIFT                             2
-#define OMAP4430_DLL_OVERRIDE_MASK                              (1 << 2)
+/* Used by CM_DLL_CTRL */
+#define OMAP4430_DLL_OVERRIDE_SHIFT                             0
+#define OMAP4430_DLL_OVERRIDE_MASK                              (1 << 0)
 
-/* Renamed from DLL_OVERRIDE Used by CM_DLL_CTRL */
-#define OMAP4430_DLL_OVERRIDE_0_0_SHIFT                         0
-#define OMAP4430_DLL_OVERRIDE_0_0_MASK                          (1 << 0)
+/* Renamed from DLL_OVERRIDE Used by CM_SHADOW_FREQ_CONFIG1 */
+#define OMAP4430_DLL_OVERRIDE_2_2_SHIFT                         2
+#define OMAP4430_DLL_OVERRIDE_2_2_MASK                          (1 << 2)
 
-/* Used by CM_SHADOW_FREQ_CONFIG1, CM_SHADOW_FREQ_CONFIG1_RESTORE */
+/* Used by CM_SHADOW_FREQ_CONFIG1 */
 #define OMAP4430_DLL_RESET_SHIFT                                3
 #define OMAP4430_DLL_RESET_MASK                                 (1 << 3)
 
 /*
- * Used by CM_CLKSEL_DPLL_ABE, CM_CLKSEL_DPLL_CORE,
- * CM_CLKSEL_DPLL_CORE_RESTORE, CM_CLKSEL_DPLL_DDRPHY, CM_CLKSEL_DPLL_IVA,
- * CM_CLKSEL_DPLL_MPU, CM_CLKSEL_DPLL_PER, CM_CLKSEL_DPLL_UNIPRO,
- * CM_CLKSEL_DPLL_USB
+ * Used by CM_CLKSEL_DPLL_ABE, CM_CLKSEL_DPLL_CORE, CM_CLKSEL_DPLL_DDRPHY,
+ * CM_CLKSEL_DPLL_IVA, CM_CLKSEL_DPLL_MPU, CM_CLKSEL_DPLL_PER,
+ * CM_CLKSEL_DPLL_UNIPRO, CM_CLKSEL_DPLL_USB
  */
 #define OMAP4430_DPLL_BYP_CLKSEL_SHIFT                          23
 #define OMAP4430_DPLL_BYP_CLKSEL_MASK                           (1 << 23)
@@ -607,28 +588,19 @@
 #define OMAP4430_DPLL_CLKDCOLDO_GATE_CTRL_SHIFT                 8
 #define OMAP4430_DPLL_CLKDCOLDO_GATE_CTRL_MASK                  (1 << 8)
 
-/* Used by CM_CLKSEL_DPLL_CORE, CM_CLKSEL_DPLL_CORE_RESTORE */
+/* Used by CM_CLKSEL_DPLL_CORE */
 #define OMAP4430_DPLL_CLKOUTHIF_CLKSEL_SHIFT                    20
 #define OMAP4430_DPLL_CLKOUTHIF_CLKSEL_MASK                     (1 << 20)
 
-/*
- * Used by CM_DIV_M3_DPLL_ABE, CM_DIV_M3_DPLL_CORE,
- * CM_DIV_M3_DPLL_CORE_RESTORE, CM_DIV_M3_DPLL_PER
- */
+/* Used by CM_DIV_M3_DPLL_ABE, CM_DIV_M3_DPLL_CORE, CM_DIV_M3_DPLL_PER */
 #define OMAP4430_DPLL_CLKOUTHIF_DIV_SHIFT                       0
 #define OMAP4430_DPLL_CLKOUTHIF_DIV_MASK                        (0x1f << 0)
 
-/*
- * Used by CM_DIV_M3_DPLL_ABE, CM_DIV_M3_DPLL_CORE,
- * CM_DIV_M3_DPLL_CORE_RESTORE, CM_DIV_M3_DPLL_PER
- */
+/* Used by CM_DIV_M3_DPLL_ABE, CM_DIV_M3_DPLL_CORE, CM_DIV_M3_DPLL_PER */
 #define OMAP4430_DPLL_CLKOUTHIF_DIVCHACK_SHIFT                  5
 #define OMAP4430_DPLL_CLKOUTHIF_DIVCHACK_MASK                   (1 << 5)
 
-/*
- * Used by CM_DIV_M3_DPLL_ABE, CM_DIV_M3_DPLL_CORE,
- * CM_DIV_M3_DPLL_CORE_RESTORE, CM_DIV_M3_DPLL_PER
- */
+/* Used by CM_DIV_M3_DPLL_ABE, CM_DIV_M3_DPLL_CORE, CM_DIV_M3_DPLL_PER */
 #define OMAP4430_DPLL_CLKOUTHIF_GATE_CTRL_SHIFT                 8
 #define OMAP4430_DPLL_CLKOUTHIF_GATE_CTRL_MASK                  (1 << 8)
 
@@ -637,9 +609,8 @@
 #define OMAP4430_DPLL_CLKOUTX2_GATE_CTRL_MASK                   (1 << 10)
 
 /*
- * Used by CM_DIV_M2_DPLL_ABE, CM_DIV_M2_DPLL_CORE,
- * CM_DIV_M2_DPLL_CORE_RESTORE, CM_DIV_M2_DPLL_DDRPHY, CM_DIV_M2_DPLL_MPU,
- * CM_DIV_M2_DPLL_PER, CM_DIV_M2_DPLL_UNIPRO
+ * Used by CM_DIV_M2_DPLL_ABE, CM_DIV_M2_DPLL_CORE, CM_DIV_M2_DPLL_DDRPHY,
+ * CM_DIV_M2_DPLL_MPU, CM_DIV_M2_DPLL_PER, CM_DIV_M2_DPLL_UNIPRO
  */
 #define OMAP4430_DPLL_CLKOUT_DIV_SHIFT                          0
 #define OMAP4430_DPLL_CLKOUT_DIV_MASK                           (0x1f << 0)
@@ -649,9 +620,8 @@
 #define OMAP4430_DPLL_CLKOUT_DIV_0_6_MASK                       (0x7f << 0)
 
 /*
- * Used by CM_DIV_M2_DPLL_ABE, CM_DIV_M2_DPLL_CORE,
- * CM_DIV_M2_DPLL_CORE_RESTORE, CM_DIV_M2_DPLL_DDRPHY, CM_DIV_M2_DPLL_MPU,
- * CM_DIV_M2_DPLL_PER, CM_DIV_M2_DPLL_UNIPRO
+ * Used by CM_DIV_M2_DPLL_ABE, CM_DIV_M2_DPLL_CORE, CM_DIV_M2_DPLL_DDRPHY,
+ * CM_DIV_M2_DPLL_MPU, CM_DIV_M2_DPLL_PER, CM_DIV_M2_DPLL_UNIPRO
  */
 #define OMAP4430_DPLL_CLKOUT_DIVCHACK_SHIFT                     5
 #define OMAP4430_DPLL_CLKOUT_DIVCHACK_MASK                      (1 << 5)
@@ -661,29 +631,28 @@
 #define OMAP4430_DPLL_CLKOUT_DIVCHACK_M2_USB_MASK               (1 << 7)
 
 /*
- * Used by CM_DIV_M2_DPLL_ABE, CM_DIV_M2_DPLL_CORE,
- * CM_DIV_M2_DPLL_CORE_RESTORE, CM_DIV_M2_DPLL_DDRPHY, CM_DIV_M2_DPLL_MPU,
- * CM_DIV_M2_DPLL_PER, CM_DIV_M2_DPLL_USB
+ * Used by CM_DIV_M2_DPLL_ABE, CM_DIV_M2_DPLL_CORE, CM_DIV_M2_DPLL_DDRPHY,
+ * CM_DIV_M2_DPLL_MPU, CM_DIV_M2_DPLL_PER, CM_DIV_M2_DPLL_USB
  */
 #define OMAP4430_DPLL_CLKOUT_GATE_CTRL_SHIFT                    8
 #define OMAP4430_DPLL_CLKOUT_GATE_CTRL_MASK                     (1 << 8)
 
-/* Used by CM_SHADOW_FREQ_CONFIG1, CM_SHADOW_FREQ_CONFIG1_RESTORE */
+/* Used by CM_SHADOW_FREQ_CONFIG1 */
 #define OMAP4430_DPLL_CORE_DPLL_EN_SHIFT                        8
 #define OMAP4430_DPLL_CORE_DPLL_EN_MASK                         (0x7 << 8)
 
-/* Used by CM_SHADOW_FREQ_CONFIG1, CM_SHADOW_FREQ_CONFIG1_RESTORE */
+/* Used by CM_SHADOW_FREQ_CONFIG1 */
 #define OMAP4430_DPLL_CORE_M2_DIV_SHIFT                         11
 #define OMAP4430_DPLL_CORE_M2_DIV_MASK                          (0x1f << 11)
 
-/* Used by CM_SHADOW_FREQ_CONFIG2, CM_SHADOW_FREQ_CONFIG2_RESTORE */
+/* Used by CM_SHADOW_FREQ_CONFIG2 */
 #define OMAP4430_DPLL_CORE_M5_DIV_SHIFT                         3
 #define OMAP4430_DPLL_CORE_M5_DIV_MASK                          (0x1f << 3)
 
 /*
- * Used by CM_CLKSEL_DPLL_ABE, CM_CLKSEL_DPLL_CORE,
- * CM_CLKSEL_DPLL_CORE_RESTORE, CM_CLKSEL_DPLL_DDRPHY, CM_CLKSEL_DPLL_IVA,
- * CM_CLKSEL_DPLL_MPU, CM_CLKSEL_DPLL_PER, CM_CLKSEL_DPLL_UNIPRO
+ * Used by CM_CLKSEL_DPLL_ABE, CM_CLKSEL_DPLL_CORE, CM_CLKSEL_DPLL_DDRPHY,
+ * CM_CLKSEL_DPLL_IVA, CM_CLKSEL_DPLL_MPU, CM_CLKSEL_DPLL_PER,
+ * CM_CLKSEL_DPLL_UNIPRO
  */
 #define OMAP4430_DPLL_DIV_SHIFT                                 0
 #define OMAP4430_DPLL_DIV_MASK                                  (0x7f << 0)
@@ -693,9 +662,8 @@
 #define OMAP4430_DPLL_DIV_0_7_MASK                              (0xff << 0)
 
 /*
- * Used by CM_CLKMODE_DPLL_ABE, CM_CLKMODE_DPLL_CORE,
- * CM_CLKMODE_DPLL_CORE_RESTORE, CM_CLKMODE_DPLL_DDRPHY, CM_CLKMODE_DPLL_IVA,
- * CM_CLKMODE_DPLL_MPU, CM_CLKMODE_DPLL_PER
+ * Used by CM_CLKMODE_DPLL_ABE, CM_CLKMODE_DPLL_CORE, CM_CLKMODE_DPLL_DDRPHY,
+ * CM_CLKMODE_DPLL_IVA, CM_CLKMODE_DPLL_MPU, CM_CLKMODE_DPLL_PER
  */
 #define OMAP4430_DPLL_DRIFTGUARD_EN_SHIFT                       8
 #define OMAP4430_DPLL_DRIFTGUARD_EN_MASK                        (1 << 8)
@@ -705,26 +673,25 @@
 #define OMAP4430_DPLL_DRIFTGUARD_EN_3_3_MASK                    (1 << 3)
 
 /*
- * Used by CM_CLKMODE_DPLL_ABE, CM_CLKMODE_DPLL_CORE,
- * CM_CLKMODE_DPLL_CORE_RESTORE, CM_CLKMODE_DPLL_DDRPHY, CM_CLKMODE_DPLL_IVA,
- * CM_CLKMODE_DPLL_MPU, CM_CLKMODE_DPLL_PER, CM_CLKMODE_DPLL_UNIPRO,
- * CM_CLKMODE_DPLL_USB
+ * Used by CM_CLKMODE_DPLL_ABE, CM_CLKMODE_DPLL_CORE, CM_CLKMODE_DPLL_DDRPHY,
+ * CM_CLKMODE_DPLL_IVA, CM_CLKMODE_DPLL_MPU, CM_CLKMODE_DPLL_PER,
+ * CM_CLKMODE_DPLL_UNIPRO, CM_CLKMODE_DPLL_USB
  */
 #define OMAP4430_DPLL_EN_SHIFT                                  0
 #define OMAP4430_DPLL_EN_MASK                                   (0x7 << 0)
 
 /*
- * Used by CM_CLKMODE_DPLL_ABE, CM_CLKMODE_DPLL_CORE,
- * CM_CLKMODE_DPLL_CORE_RESTORE, CM_CLKMODE_DPLL_DDRPHY, CM_CLKMODE_DPLL_IVA,
- * CM_CLKMODE_DPLL_MPU, CM_CLKMODE_DPLL_PER, CM_CLKMODE_DPLL_UNIPRO
+ * Used by CM_CLKMODE_DPLL_ABE, CM_CLKMODE_DPLL_CORE, CM_CLKMODE_DPLL_DDRPHY,
+ * CM_CLKMODE_DPLL_IVA, CM_CLKMODE_DPLL_MPU, CM_CLKMODE_DPLL_PER,
+ * CM_CLKMODE_DPLL_UNIPRO
  */
 #define OMAP4430_DPLL_LPMODE_EN_SHIFT                           10
 #define OMAP4430_DPLL_LPMODE_EN_MASK                            (1 << 10)
 
 /*
- * Used by CM_CLKSEL_DPLL_ABE, CM_CLKSEL_DPLL_CORE,
- * CM_CLKSEL_DPLL_CORE_RESTORE, CM_CLKSEL_DPLL_DDRPHY, CM_CLKSEL_DPLL_IVA,
- * CM_CLKSEL_DPLL_MPU, CM_CLKSEL_DPLL_PER, CM_CLKSEL_DPLL_UNIPRO
+ * Used by CM_CLKSEL_DPLL_ABE, CM_CLKSEL_DPLL_CORE, CM_CLKSEL_DPLL_DDRPHY,
+ * CM_CLKSEL_DPLL_IVA, CM_CLKSEL_DPLL_MPU, CM_CLKSEL_DPLL_PER,
+ * CM_CLKSEL_DPLL_UNIPRO
  */
 #define OMAP4430_DPLL_MULT_SHIFT                                8
 #define OMAP4430_DPLL_MULT_MASK                                 (0x7ff << 8)
@@ -734,9 +701,9 @@
 #define OMAP4430_DPLL_MULT_USB_MASK                             (0xfff << 8)
 
 /*
- * Used by CM_CLKMODE_DPLL_ABE, CM_CLKMODE_DPLL_CORE,
- * CM_CLKMODE_DPLL_CORE_RESTORE, CM_CLKMODE_DPLL_DDRPHY, CM_CLKMODE_DPLL_IVA,
- * CM_CLKMODE_DPLL_MPU, CM_CLKMODE_DPLL_PER, CM_CLKMODE_DPLL_UNIPRO
+ * Used by CM_CLKMODE_DPLL_ABE, CM_CLKMODE_DPLL_CORE, CM_CLKMODE_DPLL_DDRPHY,
+ * CM_CLKMODE_DPLL_IVA, CM_CLKMODE_DPLL_MPU, CM_CLKMODE_DPLL_PER,
+ * CM_CLKMODE_DPLL_UNIPRO
  */
 #define OMAP4430_DPLL_REGM4XEN_SHIFT                            11
 #define OMAP4430_DPLL_REGM4XEN_MASK                             (1 << 11)
@@ -746,55 +713,46 @@
 #define OMAP4430_DPLL_SD_DIV_MASK                               (0xff << 24)
 
 /*
- * Used by CM_CLKMODE_DPLL_ABE, CM_CLKMODE_DPLL_CORE,
- * CM_CLKMODE_DPLL_CORE_RESTORE, CM_CLKMODE_DPLL_DDRPHY, CM_CLKMODE_DPLL_IVA,
- * CM_CLKMODE_DPLL_MPU, CM_CLKMODE_DPLL_PER, CM_CLKMODE_DPLL_UNIPRO,
- * CM_CLKMODE_DPLL_USB
+ * Used by CM_CLKMODE_DPLL_ABE, CM_CLKMODE_DPLL_CORE, CM_CLKMODE_DPLL_DDRPHY,
+ * CM_CLKMODE_DPLL_IVA, CM_CLKMODE_DPLL_MPU, CM_CLKMODE_DPLL_PER,
+ * CM_CLKMODE_DPLL_UNIPRO, CM_CLKMODE_DPLL_USB
  */
 #define OMAP4430_DPLL_SSC_ACK_SHIFT                             13
 #define OMAP4430_DPLL_SSC_ACK_MASK                              (1 << 13)
 
 /*
- * Used by CM_CLKMODE_DPLL_ABE, CM_CLKMODE_DPLL_CORE,
- * CM_CLKMODE_DPLL_CORE_RESTORE, CM_CLKMODE_DPLL_DDRPHY, CM_CLKMODE_DPLL_IVA,
- * CM_CLKMODE_DPLL_MPU, CM_CLKMODE_DPLL_PER, CM_CLKMODE_DPLL_UNIPRO,
- * CM_CLKMODE_DPLL_USB
+ * Used by CM_CLKMODE_DPLL_ABE, CM_CLKMODE_DPLL_CORE, CM_CLKMODE_DPLL_DDRPHY,
+ * CM_CLKMODE_DPLL_IVA, CM_CLKMODE_DPLL_MPU, CM_CLKMODE_DPLL_PER,
+ * CM_CLKMODE_DPLL_UNIPRO, CM_CLKMODE_DPLL_USB
  */
 #define OMAP4430_DPLL_SSC_DOWNSPREAD_SHIFT                      14
 #define OMAP4430_DPLL_SSC_DOWNSPREAD_MASK                       (1 << 14)
 
 /*
- * Used by CM_CLKMODE_DPLL_ABE, CM_CLKMODE_DPLL_CORE,
- * CM_CLKMODE_DPLL_CORE_RESTORE, CM_CLKMODE_DPLL_DDRPHY, CM_CLKMODE_DPLL_IVA,
- * CM_CLKMODE_DPLL_MPU, CM_CLKMODE_DPLL_PER, CM_CLKMODE_DPLL_UNIPRO,
- * CM_CLKMODE_DPLL_USB
+ * Used by CM_CLKMODE_DPLL_ABE, CM_CLKMODE_DPLL_CORE, CM_CLKMODE_DPLL_DDRPHY,
+ * CM_CLKMODE_DPLL_IVA, CM_CLKMODE_DPLL_MPU, CM_CLKMODE_DPLL_PER,
+ * CM_CLKMODE_DPLL_UNIPRO, CM_CLKMODE_DPLL_USB
  */
 #define OMAP4430_DPLL_SSC_EN_SHIFT                              12
 #define OMAP4430_DPLL_SSC_EN_MASK                               (1 << 12)
 
-/*
- * Used by CM_L3_2_DYNAMICDEP, CM_L3_2_DYNAMICDEP_RESTORE, CM_L4CFG_DYNAMICDEP,
- * CM_L4CFG_DYNAMICDEP_RESTORE, CM_L4PER_DYNAMICDEP, CM_L4PER_DYNAMICDEP_RESTORE
- */
+/* Used by CM_L3_2_DYNAMICDEP, CM_L4CFG_DYNAMICDEP, CM_L4PER_DYNAMICDEP */
 #define OMAP4430_DSS_DYNDEP_SHIFT                               8
 #define OMAP4430_DSS_DYNDEP_MASK                                (1 << 8)
 
-/*
- * Used by CM_DUCATI_STATICDEP, CM_MPU_STATICDEP, CM_SDMA_STATICDEP,
- * CM_SDMA_STATICDEP_RESTORE
- */
+/* Used by CM_DUCATI_STATICDEP, CM_MPU_STATICDEP, CM_SDMA_STATICDEP */
 #define OMAP4430_DSS_STATDEP_SHIFT                              8
 #define OMAP4430_DSS_STATDEP_MASK                               (1 << 8)
 
-/* Used by CM_L3_2_DYNAMICDEP, CM_L3_2_DYNAMICDEP_RESTORE */
+/* Used by CM_L3_2_DYNAMICDEP */
 #define OMAP4430_DUCATI_DYNDEP_SHIFT                            0
 #define OMAP4430_DUCATI_DYNDEP_MASK                             (1 << 0)
 
-/* Used by CM_MPU_STATICDEP, CM_SDMA_STATICDEP, CM_SDMA_STATICDEP_RESTORE */
+/* Used by CM_MPU_STATICDEP, CM_SDMA_STATICDEP */
 #define OMAP4430_DUCATI_STATDEP_SHIFT                           0
 #define OMAP4430_DUCATI_STATDEP_MASK                            (1 << 0)
 
-/* Used by CM_SHADOW_FREQ_CONFIG1, CM_SHADOW_FREQ_CONFIG1_RESTORE */
+/* Used by CM_SHADOW_FREQ_CONFIG1 */
 #define OMAP4430_FREQ_UPDATE_SHIFT                              0
 #define OMAP4430_FREQ_UPDATE_MASK                               (1 << 0)
 
@@ -802,7 +760,7 @@
 #define OMAP4430_FUNC_SHIFT                                     16
 #define OMAP4430_FUNC_MASK                                      (0xfff << 16)
 
-/* Used by CM_L3_2_DYNAMICDEP, CM_L3_2_DYNAMICDEP_RESTORE */
+/* Used by CM_L3_2_DYNAMICDEP */
 #define OMAP4430_GFX_DYNDEP_SHIFT                               10
 #define OMAP4430_GFX_DYNDEP_MASK                                (1 << 10)
 
@@ -810,119 +768,95 @@
 #define OMAP4430_GFX_STATDEP_SHIFT                              10
 #define OMAP4430_GFX_STATDEP_MASK                               (1 << 10)
 
-/* Used by CM_SHADOW_FREQ_CONFIG2, CM_SHADOW_FREQ_CONFIG2_RESTORE */
+/* Used by CM_SHADOW_FREQ_CONFIG2 */
 #define OMAP4430_GPMC_FREQ_UPDATE_SHIFT                         0
 #define OMAP4430_GPMC_FREQ_UPDATE_MASK                          (1 << 0)
 
 /*
- * Used by CM_DIV_M4_DPLL_CORE, CM_DIV_M4_DPLL_CORE_RESTORE,
- * CM_DIV_M4_DPLL_DDRPHY, CM_DIV_M4_DPLL_IVA, CM_DIV_M4_DPLL_PER
+ * Used by CM_DIV_M4_DPLL_CORE, CM_DIV_M4_DPLL_DDRPHY, CM_DIV_M4_DPLL_IVA,
+ * CM_DIV_M4_DPLL_PER
  */
 #define OMAP4430_HSDIVIDER_CLKOUT1_DIV_SHIFT                    0
 #define OMAP4430_HSDIVIDER_CLKOUT1_DIV_MASK                     (0x1f << 0)
 
 /*
- * Used by CM_DIV_M4_DPLL_CORE, CM_DIV_M4_DPLL_CORE_RESTORE,
- * CM_DIV_M4_DPLL_DDRPHY, CM_DIV_M4_DPLL_IVA, CM_DIV_M4_DPLL_PER
+ * Used by CM_DIV_M4_DPLL_CORE, CM_DIV_M4_DPLL_DDRPHY, CM_DIV_M4_DPLL_IVA,
+ * CM_DIV_M4_DPLL_PER
  */
 #define OMAP4430_HSDIVIDER_CLKOUT1_DIVCHACK_SHIFT               5
 #define OMAP4430_HSDIVIDER_CLKOUT1_DIVCHACK_MASK                (1 << 5)
 
 /*
- * Used by CM_DIV_M4_DPLL_CORE, CM_DIV_M4_DPLL_CORE_RESTORE,
- * CM_DIV_M4_DPLL_DDRPHY, CM_DIV_M4_DPLL_IVA, CM_DIV_M4_DPLL_PER
+ * Used by CM_DIV_M4_DPLL_CORE, CM_DIV_M4_DPLL_DDRPHY, CM_DIV_M4_DPLL_IVA,
+ * CM_DIV_M4_DPLL_PER
  */
 #define OMAP4430_HSDIVIDER_CLKOUT1_GATE_CTRL_SHIFT              8
 #define OMAP4430_HSDIVIDER_CLKOUT1_GATE_CTRL_MASK               (1 << 8)
 
 /*
- * Used by CM_DIV_M4_DPLL_CORE, CM_DIV_M4_DPLL_CORE_RESTORE,
- * CM_DIV_M4_DPLL_DDRPHY, CM_DIV_M4_DPLL_IVA, CM_DIV_M4_DPLL_PER
+ * Used by CM_DIV_M4_DPLL_CORE, CM_DIV_M4_DPLL_DDRPHY, CM_DIV_M4_DPLL_IVA,
+ * CM_DIV_M4_DPLL_PER
  */
 #define OMAP4430_HSDIVIDER_CLKOUT1_PWDN_SHIFT                   12
 #define OMAP4430_HSDIVIDER_CLKOUT1_PWDN_MASK                    (1 << 12)
 
 /*
- * Used by CM_DIV_M5_DPLL_CORE, CM_DIV_M5_DPLL_CORE_RESTORE,
- * CM_DIV_M5_DPLL_DDRPHY, CM_DIV_M5_DPLL_IVA, CM_DIV_M5_DPLL_PER
+ * Used by CM_DIV_M5_DPLL_CORE, CM_DIV_M5_DPLL_DDRPHY, CM_DIV_M5_DPLL_IVA,
+ * CM_DIV_M5_DPLL_PER
  */
 #define OMAP4430_HSDIVIDER_CLKOUT2_DIV_SHIFT                    0
 #define OMAP4430_HSDIVIDER_CLKOUT2_DIV_MASK                     (0x1f << 0)
 
 /*
- * Used by CM_DIV_M5_DPLL_CORE, CM_DIV_M5_DPLL_CORE_RESTORE,
- * CM_DIV_M5_DPLL_DDRPHY, CM_DIV_M5_DPLL_IVA, CM_DIV_M5_DPLL_PER
+ * Used by CM_DIV_M5_DPLL_CORE, CM_DIV_M5_DPLL_DDRPHY, CM_DIV_M5_DPLL_IVA,
+ * CM_DIV_M5_DPLL_PER
  */
 #define OMAP4430_HSDIVIDER_CLKOUT2_DIVCHACK_SHIFT               5
 #define OMAP4430_HSDIVIDER_CLKOUT2_DIVCHACK_MASK                (1 << 5)
 
 /*
- * Used by CM_DIV_M5_DPLL_CORE, CM_DIV_M5_DPLL_CORE_RESTORE,
- * CM_DIV_M5_DPLL_DDRPHY, CM_DIV_M5_DPLL_IVA, CM_DIV_M5_DPLL_PER
+ * Used by CM_DIV_M5_DPLL_CORE, CM_DIV_M5_DPLL_DDRPHY, CM_DIV_M5_DPLL_IVA,
+ * CM_DIV_M5_DPLL_PER
  */
 #define OMAP4430_HSDIVIDER_CLKOUT2_GATE_CTRL_SHIFT              8
 #define OMAP4430_HSDIVIDER_CLKOUT2_GATE_CTRL_MASK               (1 << 8)
 
 /*
- * Used by CM_DIV_M5_DPLL_CORE, CM_DIV_M5_DPLL_CORE_RESTORE,
- * CM_DIV_M5_DPLL_DDRPHY, CM_DIV_M5_DPLL_IVA, CM_DIV_M5_DPLL_PER
+ * Used by CM_DIV_M5_DPLL_CORE, CM_DIV_M5_DPLL_DDRPHY, CM_DIV_M5_DPLL_IVA,
+ * CM_DIV_M5_DPLL_PER
  */
 #define OMAP4430_HSDIVIDER_CLKOUT2_PWDN_SHIFT                   12
 #define OMAP4430_HSDIVIDER_CLKOUT2_PWDN_MASK                    (1 << 12)
 
-/*
- * Used by CM_DIV_M6_DPLL_CORE, CM_DIV_M6_DPLL_CORE_RESTORE,
- * CM_DIV_M6_DPLL_DDRPHY, CM_DIV_M6_DPLL_PER
- */
+/* Used by CM_DIV_M6_DPLL_CORE, CM_DIV_M6_DPLL_DDRPHY, CM_DIV_M6_DPLL_PER */
 #define OMAP4430_HSDIVIDER_CLKOUT3_DIV_SHIFT                    0
 #define OMAP4430_HSDIVIDER_CLKOUT3_DIV_MASK                     (0x1f << 0)
 
-/*
- * Used by CM_DIV_M6_DPLL_CORE, CM_DIV_M6_DPLL_CORE_RESTORE,
- * CM_DIV_M6_DPLL_DDRPHY, CM_DIV_M6_DPLL_PER
- */
+/* Used by CM_DIV_M6_DPLL_CORE, CM_DIV_M6_DPLL_DDRPHY, CM_DIV_M6_DPLL_PER */
 #define OMAP4430_HSDIVIDER_CLKOUT3_DIVCHACK_SHIFT               5
 #define OMAP4430_HSDIVIDER_CLKOUT3_DIVCHACK_MASK                (1 << 5)
 
-/*
- * Used by CM_DIV_M6_DPLL_CORE, CM_DIV_M6_DPLL_CORE_RESTORE,
- * CM_DIV_M6_DPLL_DDRPHY, CM_DIV_M6_DPLL_PER
- */
+/* Used by CM_DIV_M6_DPLL_CORE, CM_DIV_M6_DPLL_DDRPHY, CM_DIV_M6_DPLL_PER */
 #define OMAP4430_HSDIVIDER_CLKOUT3_GATE_CTRL_SHIFT              8
 #define OMAP4430_HSDIVIDER_CLKOUT3_GATE_CTRL_MASK               (1 << 8)
 
-/*
- * Used by CM_DIV_M6_DPLL_CORE, CM_DIV_M6_DPLL_CORE_RESTORE,
- * CM_DIV_M6_DPLL_DDRPHY, CM_DIV_M6_DPLL_PER
- */
+/* Used by CM_DIV_M6_DPLL_CORE, CM_DIV_M6_DPLL_DDRPHY, CM_DIV_M6_DPLL_PER */
 #define OMAP4430_HSDIVIDER_CLKOUT3_PWDN_SHIFT                   12
 #define OMAP4430_HSDIVIDER_CLKOUT3_PWDN_MASK                    (1 << 12)
 
-/*
- * Used by CM_DIV_M7_DPLL_CORE, CM_DIV_M7_DPLL_CORE_RESTORE,
- * CM_DIV_M7_DPLL_PER
- */
+/* Used by CM_DIV_M7_DPLL_CORE, CM_DIV_M7_DPLL_PER */
 #define OMAP4430_HSDIVIDER_CLKOUT4_DIV_SHIFT                    0
 #define OMAP4430_HSDIVIDER_CLKOUT4_DIV_MASK                     (0x1f << 0)
 
-/*
- * Used by CM_DIV_M7_DPLL_CORE, CM_DIV_M7_DPLL_CORE_RESTORE,
- * CM_DIV_M7_DPLL_PER
- */
+/* Used by CM_DIV_M7_DPLL_CORE, CM_DIV_M7_DPLL_PER */
 #define OMAP4430_HSDIVIDER_CLKOUT4_DIVCHACK_SHIFT               5
 #define OMAP4430_HSDIVIDER_CLKOUT4_DIVCHACK_MASK                (1 << 5)
 
-/*
- * Used by CM_DIV_M7_DPLL_CORE, CM_DIV_M7_DPLL_CORE_RESTORE,
- * CM_DIV_M7_DPLL_PER
- */
+/* Used by CM_DIV_M7_DPLL_CORE, CM_DIV_M7_DPLL_PER */
 #define OMAP4430_HSDIVIDER_CLKOUT4_GATE_CTRL_SHIFT              8
 #define OMAP4430_HSDIVIDER_CLKOUT4_GATE_CTRL_MASK               (1 << 8)
 
-/*
- * Used by CM_DIV_M7_DPLL_CORE, CM_DIV_M7_DPLL_CORE_RESTORE,
- * CM_DIV_M7_DPLL_PER
- */
+/* Used by CM_DIV_M7_DPLL_CORE, CM_DIV_M7_DPLL_PER */
 #define OMAP4430_HSDIVIDER_CLKOUT4_PWDN_SHIFT                   12
 #define OMAP4430_HSDIVIDER_CLKOUT4_PWDN_MASK                    (1 << 12)
 
@@ -934,8 +868,7 @@
  * CM1_ABE_TIMER8_CLKCTRL, CM1_ABE_WDT3_CLKCTRL, CM_ALWON_MDMINTC_CLKCTRL,
  * CM_ALWON_SR_CORE_CLKCTRL, CM_ALWON_SR_IVA_CLKCTRL, CM_ALWON_SR_MPU_CLKCTRL,
  * CM_CAM_FDIF_CLKCTRL, CM_CAM_ISS_CLKCTRL, CM_CEFUSE_CEFUSE_CLKCTRL,
- * CM_CM1_PROFILING_CLKCTRL, CM_CM1_PROFILING_CLKCTRL_RESTORE,
- * CM_CM2_PROFILING_CLKCTRL, CM_CM2_PROFILING_CLKCTRL_RESTORE,
+ * CM_CM1_PROFILING_CLKCTRL, CM_CM2_PROFILING_CLKCTRL,
  * CM_D2D_MODEM_ICR_CLKCTRL, CM_D2D_SAD2D_CLKCTRL, CM_D2D_SAD2D_FW_CLKCTRL,
  * CM_DSS_DEISS_CLKCTRL, CM_DSS_DSS_CLKCTRL, CM_DUCATI_DUCATI_CLKCTRL,
  * CM_EMU_DEBUGSS_CLKCTRL, CM_GFX_GFX_CLKCTRL, CM_IVAHD_IVAHD_CLKCTRL,
@@ -944,30 +877,24 @@
  * CM_L3INIT_MMC6_CLKCTRL, CM_L3INIT_P1500_CLKCTRL, CM_L3INIT_PCIESS_CLKCTRL,
  * CM_L3INIT_SATA_CLKCTRL, CM_L3INIT_TPPSS_CLKCTRL, CM_L3INIT_UNIPRO1_CLKCTRL,
  * CM_L3INIT_USBPHYOCP2SCP_CLKCTRL, CM_L3INIT_USB_HOST_CLKCTRL,
- * CM_L3INIT_USB_HOST_CLKCTRL_RESTORE, CM_L3INIT_USB_HOST_FS_CLKCTRL,
- * CM_L3INIT_USB_OTG_CLKCTRL, CM_L3INIT_USB_TLL_CLKCTRL,
- * CM_L3INIT_USB_TLL_CLKCTRL_RESTORE, CM_L3INIT_XHPI_CLKCTRL,
- * CM_L3INSTR_L3_3_CLKCTRL, CM_L3INSTR_L3_3_CLKCTRL_RESTORE,
- * CM_L3INSTR_L3_INSTR_CLKCTRL, CM_L3INSTR_L3_INSTR_CLKCTRL_RESTORE,
- * CM_L3INSTR_OCP_WP1_CLKCTRL, CM_L3INSTR_OCP_WP1_CLKCTRL_RESTORE,
+ * CM_L3INIT_USB_HOST_FS_CLKCTRL, CM_L3INIT_USB_OTG_CLKCTRL,
+ * CM_L3INIT_USB_TLL_CLKCTRL, CM_L3INIT_XHPI_CLKCTRL, CM_L3INSTR_L3_3_CLKCTRL,
+ * CM_L3INSTR_L3_INSTR_CLKCTRL, CM_L3INSTR_OCP_WP1_CLKCTRL,
  * CM_L3_1_L3_1_CLKCTRL, CM_L3_2_GPMC_CLKCTRL, CM_L3_2_L3_2_CLKCTRL,
  * CM_L3_2_OCMC_RAM_CLKCTRL, CM_L4CFG_HW_SEM_CLKCTRL, CM_L4CFG_L4_CFG_CLKCTRL,
  * CM_L4CFG_MAILBOX_CLKCTRL, CM_L4CFG_SAR_ROM_CLKCTRL, CM_L4PER_ADC_CLKCTRL,
  * CM_L4PER_DMTIMER10_CLKCTRL, CM_L4PER_DMTIMER11_CLKCTRL,
  * CM_L4PER_DMTIMER2_CLKCTRL, CM_L4PER_DMTIMER3_CLKCTRL,
  * CM_L4PER_DMTIMER4_CLKCTRL, CM_L4PER_DMTIMER9_CLKCTRL, CM_L4PER_ELM_CLKCTRL,
- * CM_L4PER_GPIO2_CLKCTRL, CM_L4PER_GPIO2_CLKCTRL_RESTORE,
- * CM_L4PER_GPIO3_CLKCTRL, CM_L4PER_GPIO3_CLKCTRL_RESTORE,
- * CM_L4PER_GPIO4_CLKCTRL, CM_L4PER_GPIO4_CLKCTRL_RESTORE,
- * CM_L4PER_GPIO5_CLKCTRL, CM_L4PER_GPIO5_CLKCTRL_RESTORE,
- * CM_L4PER_GPIO6_CLKCTRL, CM_L4PER_GPIO6_CLKCTRL_RESTORE,
- * CM_L4PER_HDQ1W_CLKCTRL, CM_L4PER_HECC1_CLKCTRL, CM_L4PER_HECC2_CLKCTRL,
- * CM_L4PER_I2C1_CLKCTRL, CM_L4PER_I2C2_CLKCTRL, CM_L4PER_I2C3_CLKCTRL,
- * CM_L4PER_I2C4_CLKCTRL, CM_L4PER_I2C5_CLKCTRL, CM_L4PER_L4PER_CLKCTRL,
- * CM_L4PER_MCASP2_CLKCTRL, CM_L4PER_MCASP3_CLKCTRL, CM_L4PER_MCBSP4_CLKCTRL,
- * CM_L4PER_MCSPI1_CLKCTRL, CM_L4PER_MCSPI2_CLKCTRL, CM_L4PER_MCSPI3_CLKCTRL,
- * CM_L4PER_MCSPI4_CLKCTRL, CM_L4PER_MGATE_CLKCTRL, CM_L4PER_MMCSD3_CLKCTRL,
- * CM_L4PER_MMCSD4_CLKCTRL, CM_L4PER_MMCSD5_CLKCTRL, CM_L4PER_MSPROHG_CLKCTRL,
+ * CM_L4PER_GPIO2_CLKCTRL, CM_L4PER_GPIO3_CLKCTRL, CM_L4PER_GPIO4_CLKCTRL,
+ * CM_L4PER_GPIO5_CLKCTRL, CM_L4PER_GPIO6_CLKCTRL, CM_L4PER_HDQ1W_CLKCTRL,
+ * CM_L4PER_HECC1_CLKCTRL, CM_L4PER_HECC2_CLKCTRL, CM_L4PER_I2C1_CLKCTRL,
+ * CM_L4PER_I2C2_CLKCTRL, CM_L4PER_I2C3_CLKCTRL, CM_L4PER_I2C4_CLKCTRL,
+ * CM_L4PER_I2C5_CLKCTRL, CM_L4PER_L4PER_CLKCTRL, CM_L4PER_MCASP2_CLKCTRL,
+ * CM_L4PER_MCASP3_CLKCTRL, CM_L4PER_MCBSP4_CLKCTRL, CM_L4PER_MCSPI1_CLKCTRL,
+ * CM_L4PER_MCSPI2_CLKCTRL, CM_L4PER_MCSPI3_CLKCTRL, CM_L4PER_MCSPI4_CLKCTRL,
+ * CM_L4PER_MGATE_CLKCTRL, CM_L4PER_MMCSD3_CLKCTRL, CM_L4PER_MMCSD4_CLKCTRL,
+ * CM_L4PER_MMCSD5_CLKCTRL, CM_L4PER_MSPROHG_CLKCTRL,
  * CM_L4PER_SLIMBUS2_CLKCTRL, CM_L4PER_UART1_CLKCTRL, CM_L4PER_UART2_CLKCTRL,
  * CM_L4PER_UART3_CLKCTRL, CM_L4PER_UART4_CLKCTRL, CM_L4SEC_AES1_CLKCTRL,
  * CM_L4SEC_AES2_CLKCTRL, CM_L4SEC_CRYPTODMA_CLKCTRL, CM_L4SEC_DES3DES_CLKCTRL,
@@ -983,166 +910,148 @@
 #define OMAP4430_IDLEST_SHIFT                                   16
 #define OMAP4430_IDLEST_MASK                                    (0x3 << 16)
 
-/*
- * Used by CM_DUCATI_DYNAMICDEP, CM_L3_2_DYNAMICDEP,
- * CM_L3_2_DYNAMICDEP_RESTORE, CM_L4CFG_DYNAMICDEP, CM_L4CFG_DYNAMICDEP_RESTORE
- */
+/* Used by CM_DUCATI_DYNAMICDEP, CM_L3_2_DYNAMICDEP, CM_L4CFG_DYNAMICDEP */
 #define OMAP4430_ISS_DYNDEP_SHIFT                               9
 #define OMAP4430_ISS_DYNDEP_MASK                                (1 << 9)
 
 /*
  * Used by CM_DUCATI_STATICDEP, CM_MPU_STATICDEP, CM_SDMA_STATICDEP,
- * CM_SDMA_STATICDEP_RESTORE, CM_TESLA_STATICDEP
+ * CM_TESLA_STATICDEP
  */
 #define OMAP4430_ISS_STATDEP_SHIFT                              9
 #define OMAP4430_ISS_STATDEP_MASK                               (1 << 9)
 
-/* Used by CM_L3_2_DYNAMICDEP, CM_L3_2_DYNAMICDEP_RESTORE, CM_TESLA_DYNAMICDEP */
+/* Used by CM_L3_2_DYNAMICDEP, CM_TESLA_DYNAMICDEP */
 #define OMAP4430_IVAHD_DYNDEP_SHIFT                             2
 #define OMAP4430_IVAHD_DYNDEP_MASK                              (1 << 2)
 
 /*
- * Used by CM_CAM_STATICDEP, CM_D2D_STATICDEP, CM_D2D_STATICDEP_RESTORE,
- * CM_DSS_STATICDEP, CM_DUCATI_STATICDEP, CM_GFX_STATICDEP,
- * CM_L3INIT_STATICDEP, CM_MPU_STATICDEP, CM_SDMA_STATICDEP,
- * CM_SDMA_STATICDEP_RESTORE, CM_TESLA_STATICDEP
+ * Used by CM_CAM_STATICDEP, CM_D2D_STATICDEP, CM_DSS_STATICDEP,
+ * CM_DUCATI_STATICDEP, CM_GFX_STATICDEP, CM_L3INIT_STATICDEP,
+ * CM_MPU_STATICDEP, CM_SDMA_STATICDEP, CM_TESLA_STATICDEP
  */
 #define OMAP4430_IVAHD_STATDEP_SHIFT                            2
 #define OMAP4430_IVAHD_STATDEP_MASK                             (1 << 2)
 
-/*
- * Used by CM_L3_2_DYNAMICDEP, CM_L3_2_DYNAMICDEP_RESTORE, CM_L4CFG_DYNAMICDEP,
- * CM_L4CFG_DYNAMICDEP_RESTORE, CM_L4PER_DYNAMICDEP, CM_L4PER_DYNAMICDEP_RESTORE
- */
+/* Used by CM_L3_2_DYNAMICDEP, CM_L4CFG_DYNAMICDEP, CM_L4PER_DYNAMICDEP */
 #define OMAP4430_L3INIT_DYNDEP_SHIFT                            7
 #define OMAP4430_L3INIT_DYNDEP_MASK                             (1 << 7)
 
 /*
- * Used by CM_D2D_STATICDEP, CM_D2D_STATICDEP_RESTORE, CM_DUCATI_STATICDEP,
- * CM_MPU_STATICDEP, CM_SDMA_STATICDEP, CM_SDMA_STATICDEP_RESTORE,
- * CM_TESLA_STATICDEP
+ * Used by CM_D2D_STATICDEP, CM_DUCATI_STATICDEP, CM_MPU_STATICDEP,
+ * CM_SDMA_STATICDEP, CM_TESLA_STATICDEP
  */
 #define OMAP4430_L3INIT_STATDEP_SHIFT                           7
 #define OMAP4430_L3INIT_STATDEP_MASK                            (1 << 7)
 
 /*
  * Used by CM_DSS_DYNAMICDEP, CM_L3INIT_DYNAMICDEP, CM_L3_2_DYNAMICDEP,
- * CM_L3_2_DYNAMICDEP_RESTORE, CM_L4CFG_DYNAMICDEP,
- * CM_L4CFG_DYNAMICDEP_RESTORE, CM_MPU_DYNAMICDEP, CM_TESLA_DYNAMICDEP
+ * CM_L4CFG_DYNAMICDEP, CM_MPU_DYNAMICDEP, CM_TESLA_DYNAMICDEP
  */
 #define OMAP4430_L3_1_DYNDEP_SHIFT                              5
 #define OMAP4430_L3_1_DYNDEP_MASK                               (1 << 5)
 
 /*
- * Used by CM_CAM_STATICDEP, CM_D2D_STATICDEP, CM_D2D_STATICDEP_RESTORE,
- * CM_DSS_STATICDEP, CM_DUCATI_STATICDEP, CM_GFX_STATICDEP, CM_IVAHD_STATICDEP,
+ * Used by CM_CAM_STATICDEP, CM_D2D_STATICDEP, CM_DSS_STATICDEP,
+ * CM_DUCATI_STATICDEP, CM_GFX_STATICDEP, CM_IVAHD_STATICDEP,
  * CM_L3INIT_STATICDEP, CM_L4SEC_STATICDEP, CM_MPU_STATICDEP,
- * CM_SDMA_STATICDEP, CM_SDMA_STATICDEP_RESTORE, CM_TESLA_STATICDEP
+ * CM_SDMA_STATICDEP, CM_TESLA_STATICDEP
  */
 #define OMAP4430_L3_1_STATDEP_SHIFT                             5
 #define OMAP4430_L3_1_STATDEP_MASK                              (1 << 5)
 
 /*
- * Used by CM_CAM_DYNAMICDEP, CM_D2D_DYNAMICDEP, CM_D2D_DYNAMICDEP_RESTORE,
- * CM_DUCATI_DYNAMICDEP, CM_EMU_DYNAMICDEP, CM_GFX_DYNAMICDEP,
- * CM_IVAHD_DYNAMICDEP, CM_L3INIT_DYNAMICDEP, CM_L3_1_DYNAMICDEP,
- * CM_L3_1_DYNAMICDEP_RESTORE, CM_L4CFG_DYNAMICDEP,
- * CM_L4CFG_DYNAMICDEP_RESTORE, CM_L4SEC_DYNAMICDEP, CM_SDMA_DYNAMICDEP
+ * Used by CM_CAM_DYNAMICDEP, CM_D2D_DYNAMICDEP, CM_DUCATI_DYNAMICDEP,
+ * CM_EMU_DYNAMICDEP, CM_GFX_DYNAMICDEP, CM_IVAHD_DYNAMICDEP,
+ * CM_L3INIT_DYNAMICDEP, CM_L3_1_DYNAMICDEP, CM_L4CFG_DYNAMICDEP,
+ * CM_L4SEC_DYNAMICDEP, CM_SDMA_DYNAMICDEP
  */
 #define OMAP4430_L3_2_DYNDEP_SHIFT                              6
 #define OMAP4430_L3_2_DYNDEP_MASK                               (1 << 6)
 
 /*
- * Used by CM_CAM_STATICDEP, CM_D2D_STATICDEP, CM_D2D_STATICDEP_RESTORE,
- * CM_DSS_STATICDEP, CM_DUCATI_STATICDEP, CM_GFX_STATICDEP, CM_IVAHD_STATICDEP,
+ * Used by CM_CAM_STATICDEP, CM_D2D_STATICDEP, CM_DSS_STATICDEP,
+ * CM_DUCATI_STATICDEP, CM_GFX_STATICDEP, CM_IVAHD_STATICDEP,
  * CM_L3INIT_STATICDEP, CM_L4SEC_STATICDEP, CM_MPU_STATICDEP,
- * CM_SDMA_STATICDEP, CM_SDMA_STATICDEP_RESTORE, CM_TESLA_STATICDEP
+ * CM_SDMA_STATICDEP, CM_TESLA_STATICDEP
  */
 #define OMAP4430_L3_2_STATDEP_SHIFT                             6
 #define OMAP4430_L3_2_STATDEP_MASK                              (1 << 6)
 
-/* Used by CM_L3_1_DYNAMICDEP, CM_L3_1_DYNAMICDEP_RESTORE */
+/* Used by CM_L3_1_DYNAMICDEP */
 #define OMAP4430_L4CFG_DYNDEP_SHIFT                             12
 #define OMAP4430_L4CFG_DYNDEP_MASK                              (1 << 12)
 
 /*
- * Used by CM_D2D_STATICDEP, CM_D2D_STATICDEP_RESTORE, CM_DUCATI_STATICDEP,
- * CM_L3INIT_STATICDEP, CM_MPU_STATICDEP, CM_SDMA_STATICDEP,
- * CM_SDMA_STATICDEP_RESTORE, CM_TESLA_STATICDEP
+ * Used by CM_D2D_STATICDEP, CM_DUCATI_STATICDEP, CM_L3INIT_STATICDEP,
+ * CM_MPU_STATICDEP, CM_SDMA_STATICDEP, CM_TESLA_STATICDEP
  */
 #define OMAP4430_L4CFG_STATDEP_SHIFT                            12
 #define OMAP4430_L4CFG_STATDEP_MASK                             (1 << 12)
 
-/* Used by CM_L3_2_DYNAMICDEP, CM_L3_2_DYNAMICDEP_RESTORE */
+/* Used by CM_L3_2_DYNAMICDEP */
 #define OMAP4430_L4PER_DYNDEP_SHIFT                             13
 #define OMAP4430_L4PER_DYNDEP_MASK                              (1 << 13)
 
 /*
- * Used by CM_D2D_STATICDEP, CM_D2D_STATICDEP_RESTORE, CM_DUCATI_STATICDEP,
- * CM_L3INIT_STATICDEP, CM_L4SEC_STATICDEP, CM_MPU_STATICDEP,
- * CM_SDMA_STATICDEP, CM_SDMA_STATICDEP_RESTORE, CM_TESLA_STATICDEP
+ * Used by CM_D2D_STATICDEP, CM_DUCATI_STATICDEP, CM_L3INIT_STATICDEP,
+ * CM_L4SEC_STATICDEP, CM_MPU_STATICDEP, CM_SDMA_STATICDEP, CM_TESLA_STATICDEP
  */
 #define OMAP4430_L4PER_STATDEP_SHIFT                            13
 #define OMAP4430_L4PER_STATDEP_MASK                             (1 << 13)
 
-/*
- * Used by CM_L3_2_DYNAMICDEP, CM_L3_2_DYNAMICDEP_RESTORE, CM_L4PER_DYNAMICDEP,
- * CM_L4PER_DYNAMICDEP_RESTORE
- */
+/* Used by CM_L3_2_DYNAMICDEP, CM_L4PER_DYNAMICDEP */
 #define OMAP4430_L4SEC_DYNDEP_SHIFT                             14
 #define OMAP4430_L4SEC_DYNDEP_MASK                              (1 << 14)
 
 /*
  * Used by CM_DUCATI_STATICDEP, CM_L3INIT_STATICDEP, CM_MPU_STATICDEP,
- * CM_SDMA_STATICDEP, CM_SDMA_STATICDEP_RESTORE
+ * CM_SDMA_STATICDEP
  */
 #define OMAP4430_L4SEC_STATDEP_SHIFT                            14
 #define OMAP4430_L4SEC_STATDEP_MASK                             (1 << 14)
 
-/* Used by CM_L4CFG_DYNAMICDEP, CM_L4CFG_DYNAMICDEP_RESTORE */
+/* Used by CM_L4CFG_DYNAMICDEP */
 #define OMAP4430_L4WKUP_DYNDEP_SHIFT                            15
 #define OMAP4430_L4WKUP_DYNDEP_MASK                             (1 << 15)
 
 /*
  * Used by CM_DUCATI_STATICDEP, CM_L3INIT_STATICDEP, CM_MPU_STATICDEP,
- * CM_SDMA_STATICDEP, CM_SDMA_STATICDEP_RESTORE, CM_TESLA_STATICDEP
+ * CM_SDMA_STATICDEP, CM_TESLA_STATICDEP
  */
 #define OMAP4430_L4WKUP_STATDEP_SHIFT                           15
 #define OMAP4430_L4WKUP_STATDEP_MASK                            (1 << 15)
 
 /*
- * Used by CM_D2D_DYNAMICDEP, CM_D2D_DYNAMICDEP_RESTORE, CM_L3_1_DYNAMICDEP,
- * CM_L3_1_DYNAMICDEP_RESTORE, CM_L4CFG_DYNAMICDEP,
- * CM_L4CFG_DYNAMICDEP_RESTORE, CM_MPU_DYNAMICDEP
+ * Used by CM_D2D_DYNAMICDEP, CM_L3_1_DYNAMICDEP, CM_L4CFG_DYNAMICDEP,
+ * CM_MPU_DYNAMICDEP
  */
 #define OMAP4430_MEMIF_DYNDEP_SHIFT                             4
 #define OMAP4430_MEMIF_DYNDEP_MASK                              (1 << 4)
 
 /*
- * Used by CM_CAM_STATICDEP, CM_D2D_STATICDEP, CM_D2D_STATICDEP_RESTORE,
- * CM_DSS_STATICDEP, CM_DUCATI_STATICDEP, CM_GFX_STATICDEP, CM_IVAHD_STATICDEP,
+ * Used by CM_CAM_STATICDEP, CM_D2D_STATICDEP, CM_DSS_STATICDEP,
+ * CM_DUCATI_STATICDEP, CM_GFX_STATICDEP, CM_IVAHD_STATICDEP,
  * CM_L3INIT_STATICDEP, CM_L4SEC_STATICDEP, CM_MPU_STATICDEP,
- * CM_SDMA_STATICDEP, CM_SDMA_STATICDEP_RESTORE, CM_TESLA_STATICDEP
+ * CM_SDMA_STATICDEP, CM_TESLA_STATICDEP
  */
 #define OMAP4430_MEMIF_STATDEP_SHIFT                            4
 #define OMAP4430_MEMIF_STATDEP_MASK                             (1 << 4)
 
 /*
  * Used by CM_SSC_MODFREQDIV_DPLL_ABE, CM_SSC_MODFREQDIV_DPLL_CORE,
- * CM_SSC_MODFREQDIV_DPLL_CORE_RESTORE, CM_SSC_MODFREQDIV_DPLL_DDRPHY,
- * CM_SSC_MODFREQDIV_DPLL_IVA, CM_SSC_MODFREQDIV_DPLL_MPU,
- * CM_SSC_MODFREQDIV_DPLL_PER, CM_SSC_MODFREQDIV_DPLL_UNIPRO,
- * CM_SSC_MODFREQDIV_DPLL_USB
+ * CM_SSC_MODFREQDIV_DPLL_DDRPHY, CM_SSC_MODFREQDIV_DPLL_IVA,
+ * CM_SSC_MODFREQDIV_DPLL_MPU, CM_SSC_MODFREQDIV_DPLL_PER,
+ * CM_SSC_MODFREQDIV_DPLL_UNIPRO, CM_SSC_MODFREQDIV_DPLL_USB
  */
 #define OMAP4430_MODFREQDIV_EXPONENT_SHIFT                      8
 #define OMAP4430_MODFREQDIV_EXPONENT_MASK                       (0x7 << 8)
 
 /*
  * Used by CM_SSC_MODFREQDIV_DPLL_ABE, CM_SSC_MODFREQDIV_DPLL_CORE,
- * CM_SSC_MODFREQDIV_DPLL_CORE_RESTORE, CM_SSC_MODFREQDIV_DPLL_DDRPHY,
- * CM_SSC_MODFREQDIV_DPLL_IVA, CM_SSC_MODFREQDIV_DPLL_MPU,
- * CM_SSC_MODFREQDIV_DPLL_PER, CM_SSC_MODFREQDIV_DPLL_UNIPRO,
- * CM_SSC_MODFREQDIV_DPLL_USB
+ * CM_SSC_MODFREQDIV_DPLL_DDRPHY, CM_SSC_MODFREQDIV_DPLL_IVA,
+ * CM_SSC_MODFREQDIV_DPLL_MPU, CM_SSC_MODFREQDIV_DPLL_PER,
+ * CM_SSC_MODFREQDIV_DPLL_UNIPRO, CM_SSC_MODFREQDIV_DPLL_USB
  */
 #define OMAP4430_MODFREQDIV_MANTISSA_SHIFT                      0
 #define OMAP4430_MODFREQDIV_MANTISSA_MASK                       (0x7f << 0)
@@ -1155,8 +1064,7 @@
  * CM1_ABE_TIMER8_CLKCTRL, CM1_ABE_WDT3_CLKCTRL, CM_ALWON_MDMINTC_CLKCTRL,
  * CM_ALWON_SR_CORE_CLKCTRL, CM_ALWON_SR_IVA_CLKCTRL, CM_ALWON_SR_MPU_CLKCTRL,
  * CM_CAM_FDIF_CLKCTRL, CM_CAM_ISS_CLKCTRL, CM_CEFUSE_CEFUSE_CLKCTRL,
- * CM_CM1_PROFILING_CLKCTRL, CM_CM1_PROFILING_CLKCTRL_RESTORE,
- * CM_CM2_PROFILING_CLKCTRL, CM_CM2_PROFILING_CLKCTRL_RESTORE,
+ * CM_CM1_PROFILING_CLKCTRL, CM_CM2_PROFILING_CLKCTRL,
  * CM_D2D_MODEM_ICR_CLKCTRL, CM_D2D_SAD2D_CLKCTRL, CM_D2D_SAD2D_FW_CLKCTRL,
  * CM_DSS_DEISS_CLKCTRL, CM_DSS_DSS_CLKCTRL, CM_DUCATI_DUCATI_CLKCTRL,
  * CM_EMU_DEBUGSS_CLKCTRL, CM_GFX_GFX_CLKCTRL, CM_IVAHD_IVAHD_CLKCTRL,
@@ -1165,30 +1073,24 @@
  * CM_L3INIT_MMC6_CLKCTRL, CM_L3INIT_P1500_CLKCTRL, CM_L3INIT_PCIESS_CLKCTRL,
  * CM_L3INIT_SATA_CLKCTRL, CM_L3INIT_TPPSS_CLKCTRL, CM_L3INIT_UNIPRO1_CLKCTRL,
  * CM_L3INIT_USBPHYOCP2SCP_CLKCTRL, CM_L3INIT_USB_HOST_CLKCTRL,
- * CM_L3INIT_USB_HOST_CLKCTRL_RESTORE, CM_L3INIT_USB_HOST_FS_CLKCTRL,
- * CM_L3INIT_USB_OTG_CLKCTRL, CM_L3INIT_USB_TLL_CLKCTRL,
- * CM_L3INIT_USB_TLL_CLKCTRL_RESTORE, CM_L3INIT_XHPI_CLKCTRL,
- * CM_L3INSTR_L3_3_CLKCTRL, CM_L3INSTR_L3_3_CLKCTRL_RESTORE,
- * CM_L3INSTR_L3_INSTR_CLKCTRL, CM_L3INSTR_L3_INSTR_CLKCTRL_RESTORE,
- * CM_L3INSTR_OCP_WP1_CLKCTRL, CM_L3INSTR_OCP_WP1_CLKCTRL_RESTORE,
+ * CM_L3INIT_USB_HOST_FS_CLKCTRL, CM_L3INIT_USB_OTG_CLKCTRL,
+ * CM_L3INIT_USB_TLL_CLKCTRL, CM_L3INIT_XHPI_CLKCTRL, CM_L3INSTR_L3_3_CLKCTRL,
+ * CM_L3INSTR_L3_INSTR_CLKCTRL, CM_L3INSTR_OCP_WP1_CLKCTRL,
  * CM_L3_1_L3_1_CLKCTRL, CM_L3_2_GPMC_CLKCTRL, CM_L3_2_L3_2_CLKCTRL,
  * CM_L3_2_OCMC_RAM_CLKCTRL, CM_L4CFG_HW_SEM_CLKCTRL, CM_L4CFG_L4_CFG_CLKCTRL,
  * CM_L4CFG_MAILBOX_CLKCTRL, CM_L4CFG_SAR_ROM_CLKCTRL, CM_L4PER_ADC_CLKCTRL,
  * CM_L4PER_DMTIMER10_CLKCTRL, CM_L4PER_DMTIMER11_CLKCTRL,
  * CM_L4PER_DMTIMER2_CLKCTRL, CM_L4PER_DMTIMER3_CLKCTRL,
  * CM_L4PER_DMTIMER4_CLKCTRL, CM_L4PER_DMTIMER9_CLKCTRL, CM_L4PER_ELM_CLKCTRL,
- * CM_L4PER_GPIO2_CLKCTRL, CM_L4PER_GPIO2_CLKCTRL_RESTORE,
- * CM_L4PER_GPIO3_CLKCTRL, CM_L4PER_GPIO3_CLKCTRL_RESTORE,
- * CM_L4PER_GPIO4_CLKCTRL, CM_L4PER_GPIO4_CLKCTRL_RESTORE,
- * CM_L4PER_GPIO5_CLKCTRL, CM_L4PER_GPIO5_CLKCTRL_RESTORE,
- * CM_L4PER_GPIO6_CLKCTRL, CM_L4PER_GPIO6_CLKCTRL_RESTORE,
- * CM_L4PER_HDQ1W_CLKCTRL, CM_L4PER_HECC1_CLKCTRL, CM_L4PER_HECC2_CLKCTRL,
- * CM_L4PER_I2C1_CLKCTRL, CM_L4PER_I2C2_CLKCTRL, CM_L4PER_I2C3_CLKCTRL,
- * CM_L4PER_I2C4_CLKCTRL, CM_L4PER_I2C5_CLKCTRL, CM_L4PER_L4PER_CLKCTRL,
- * CM_L4PER_MCASP2_CLKCTRL, CM_L4PER_MCASP3_CLKCTRL, CM_L4PER_MCBSP4_CLKCTRL,
- * CM_L4PER_MCSPI1_CLKCTRL, CM_L4PER_MCSPI2_CLKCTRL, CM_L4PER_MCSPI3_CLKCTRL,
- * CM_L4PER_MCSPI4_CLKCTRL, CM_L4PER_MGATE_CLKCTRL, CM_L4PER_MMCSD3_CLKCTRL,
- * CM_L4PER_MMCSD4_CLKCTRL, CM_L4PER_MMCSD5_CLKCTRL, CM_L4PER_MSPROHG_CLKCTRL,
+ * CM_L4PER_GPIO2_CLKCTRL, CM_L4PER_GPIO3_CLKCTRL, CM_L4PER_GPIO4_CLKCTRL,
+ * CM_L4PER_GPIO5_CLKCTRL, CM_L4PER_GPIO6_CLKCTRL, CM_L4PER_HDQ1W_CLKCTRL,
+ * CM_L4PER_HECC1_CLKCTRL, CM_L4PER_HECC2_CLKCTRL, CM_L4PER_I2C1_CLKCTRL,
+ * CM_L4PER_I2C2_CLKCTRL, CM_L4PER_I2C3_CLKCTRL, CM_L4PER_I2C4_CLKCTRL,
+ * CM_L4PER_I2C5_CLKCTRL, CM_L4PER_L4PER_CLKCTRL, CM_L4PER_MCASP2_CLKCTRL,
+ * CM_L4PER_MCASP3_CLKCTRL, CM_L4PER_MCBSP4_CLKCTRL, CM_L4PER_MCSPI1_CLKCTRL,
+ * CM_L4PER_MCSPI2_CLKCTRL, CM_L4PER_MCSPI3_CLKCTRL, CM_L4PER_MCSPI4_CLKCTRL,
+ * CM_L4PER_MGATE_CLKCTRL, CM_L4PER_MMCSD3_CLKCTRL, CM_L4PER_MMCSD4_CLKCTRL,
+ * CM_L4PER_MMCSD5_CLKCTRL, CM_L4PER_MSPROHG_CLKCTRL,
  * CM_L4PER_SLIMBUS2_CLKCTRL, CM_L4PER_UART1_CLKCTRL, CM_L4PER_UART2_CLKCTRL,
  * CM_L4PER_UART3_CLKCTRL, CM_L4PER_UART4_CLKCTRL, CM_L4SEC_AES1_CLKCTRL,
  * CM_L4SEC_AES2_CLKCTRL, CM_L4SEC_CRYPTODMA_CLKCTRL, CM_L4SEC_DES3DES_CLKCTRL,
@@ -1221,11 +1123,9 @@
 #define OMAP4430_OPTFCLKEN_CTRLCLK_MASK                         (1 << 8)
 
 /*
- * Used by CM_L4PER_GPIO2_CLKCTRL, CM_L4PER_GPIO2_CLKCTRL_RESTORE,
- * CM_L4PER_GPIO3_CLKCTRL, CM_L4PER_GPIO3_CLKCTRL_RESTORE,
- * CM_L4PER_GPIO4_CLKCTRL, CM_L4PER_GPIO4_CLKCTRL_RESTORE,
- * CM_L4PER_GPIO5_CLKCTRL, CM_L4PER_GPIO5_CLKCTRL_RESTORE,
- * CM_L4PER_GPIO6_CLKCTRL, CM_L4PER_GPIO6_CLKCTRL_RESTORE, CM_WKUP_GPIO1_CLKCTRL
+ * Used by CM_L4PER_GPIO2_CLKCTRL, CM_L4PER_GPIO3_CLKCTRL,
+ * CM_L4PER_GPIO4_CLKCTRL, CM_L4PER_GPIO5_CLKCTRL, CM_L4PER_GPIO6_CLKCTRL,
+ * CM_WKUP_GPIO1_CLKCTRL
  */
 #define OMAP4430_OPTFCLKEN_DBCLK_SHIFT                          8
 #define OMAP4430_OPTFCLKEN_DBCLK_MASK                           (1 << 8)
@@ -1254,23 +1154,23 @@
 #define OMAP4430_OPTFCLKEN_FCLK2_SHIFT                          10
 #define OMAP4430_OPTFCLKEN_FCLK2_MASK                           (1 << 10)
 
-/* Used by CM_L3INIT_USB_HOST_CLKCTRL, CM_L3INIT_USB_HOST_CLKCTRL_RESTORE */
+/* Used by CM_L3INIT_USB_HOST_CLKCTRL */
 #define OMAP4430_OPTFCLKEN_FUNC48MCLK_SHIFT                     15
 #define OMAP4430_OPTFCLKEN_FUNC48MCLK_MASK                      (1 << 15)
 
-/* Used by CM_L3INIT_USB_HOST_CLKCTRL, CM_L3INIT_USB_HOST_CLKCTRL_RESTORE */
+/* Used by CM_L3INIT_USB_HOST_CLKCTRL */
 #define OMAP4430_OPTFCLKEN_HSIC480M_P1_CLK_SHIFT                13
 #define OMAP4430_OPTFCLKEN_HSIC480M_P1_CLK_MASK                 (1 << 13)
 
-/* Used by CM_L3INIT_USB_HOST_CLKCTRL, CM_L3INIT_USB_HOST_CLKCTRL_RESTORE */
+/* Used by CM_L3INIT_USB_HOST_CLKCTRL */
 #define OMAP4430_OPTFCLKEN_HSIC480M_P2_CLK_SHIFT                14
 #define OMAP4430_OPTFCLKEN_HSIC480M_P2_CLK_MASK                 (1 << 14)
 
-/* Used by CM_L3INIT_USB_HOST_CLKCTRL, CM_L3INIT_USB_HOST_CLKCTRL_RESTORE */
+/* Used by CM_L3INIT_USB_HOST_CLKCTRL */
 #define OMAP4430_OPTFCLKEN_HSIC60M_P1_CLK_SHIFT                 11
 #define OMAP4430_OPTFCLKEN_HSIC60M_P1_CLK_MASK                  (1 << 11)
 
-/* Used by CM_L3INIT_USB_HOST_CLKCTRL, CM_L3INIT_USB_HOST_CLKCTRL_RESTORE */
+/* Used by CM_L3INIT_USB_HOST_CLKCTRL */
 #define OMAP4430_OPTFCLKEN_HSIC60M_P2_CLK_SHIFT                 12
 #define OMAP4430_OPTFCLKEN_HSIC60M_P2_CLK_MASK                  (1 << 12)
 
@@ -1306,27 +1206,27 @@
 #define OMAP4430_OPTFCLKEN_TXPHYCLK_SHIFT                       8
 #define OMAP4430_OPTFCLKEN_TXPHYCLK_MASK                        (1 << 8)
 
-/* Used by CM_L3INIT_USB_TLL_CLKCTRL, CM_L3INIT_USB_TLL_CLKCTRL_RESTORE */
+/* Used by CM_L3INIT_USB_TLL_CLKCTRL */
 #define OMAP4430_OPTFCLKEN_USB_CH0_CLK_SHIFT                    8
 #define OMAP4430_OPTFCLKEN_USB_CH0_CLK_MASK                     (1 << 8)
 
-/* Used by CM_L3INIT_USB_TLL_CLKCTRL, CM_L3INIT_USB_TLL_CLKCTRL_RESTORE */
+/* Used by CM_L3INIT_USB_TLL_CLKCTRL */
 #define OMAP4430_OPTFCLKEN_USB_CH1_CLK_SHIFT                    9
 #define OMAP4430_OPTFCLKEN_USB_CH1_CLK_MASK                     (1 << 9)
 
-/* Used by CM_L3INIT_USB_TLL_CLKCTRL, CM_L3INIT_USB_TLL_CLKCTRL_RESTORE */
+/* Used by CM_L3INIT_USB_TLL_CLKCTRL */
 #define OMAP4430_OPTFCLKEN_USB_CH2_CLK_SHIFT                    10
 #define OMAP4430_OPTFCLKEN_USB_CH2_CLK_MASK                     (1 << 10)
 
-/* Used by CM_L3INIT_USB_HOST_CLKCTRL, CM_L3INIT_USB_HOST_CLKCTRL_RESTORE */
+/* Used by CM_L3INIT_USB_HOST_CLKCTRL */
 #define OMAP4430_OPTFCLKEN_UTMI_P1_CLK_SHIFT                    8
 #define OMAP4430_OPTFCLKEN_UTMI_P1_CLK_MASK                     (1 << 8)
 
-/* Used by CM_L3INIT_USB_HOST_CLKCTRL, CM_L3INIT_USB_HOST_CLKCTRL_RESTORE */
+/* Used by CM_L3INIT_USB_HOST_CLKCTRL */
 #define OMAP4430_OPTFCLKEN_UTMI_P2_CLK_SHIFT                    9
 #define OMAP4430_OPTFCLKEN_UTMI_P2_CLK_MASK                     (1 << 9)
 
-/* Used by CM_L3INIT_USB_HOST_CLKCTRL, CM_L3INIT_USB_HOST_CLKCTRL_RESTORE */
+/* Used by CM_L3INIT_USB_HOST_CLKCTRL */
 #define OMAP4430_OPTFCLKEN_UTMI_P3_CLK_SHIFT                    10
 #define OMAP4430_OPTFCLKEN_UTMI_P3_CLK_MASK                     (1 << 10)
 
@@ -1374,7 +1274,7 @@
 #define OMAP4430_PMD_TRACE_MUX_CTRL_SHIFT                       22
 #define OMAP4430_PMD_TRACE_MUX_CTRL_MASK                        (0x3 << 22)
 
-/* Used by CM_DYN_DEP_PRESCAL, CM_DYN_DEP_PRESCAL_RESTORE */
+/* Used by CM_DYN_DEP_PRESCAL */
 #define OMAP4430_PRESCAL_SHIFT                                  0
 #define OMAP4430_PRESCAL_MASK                                   (0x3f << 0)
 
@@ -1382,10 +1282,7 @@
 #define OMAP4430_R_RTL_SHIFT                                    11
 #define OMAP4430_R_RTL_MASK                                     (0x1f << 11)
 
-/*
- * Used by CM_L3INIT_USB_HOST_CLKCTRL, CM_L3INIT_USB_HOST_CLKCTRL_RESTORE,
- * CM_L3INIT_USB_TLL_CLKCTRL, CM_L3INIT_USB_TLL_CLKCTRL_RESTORE
- */
+/* Used by CM_L3INIT_USB_HOST_CLKCTRL, CM_L3INIT_USB_TLL_CLKCTRL */
 #define OMAP4430_SAR_MODE_SHIFT                                 4
 #define OMAP4430_SAR_MODE_MASK                                  (1 << 4)
 
@@ -1397,7 +1294,7 @@
 #define OMAP4430_SCHEME_SHIFT                                   30
 #define OMAP4430_SCHEME_MASK                                    (0x3 << 30)
 
-/* Used by CM_L4CFG_DYNAMICDEP, CM_L4CFG_DYNAMICDEP_RESTORE */
+/* Used by CM_L4CFG_DYNAMICDEP */
 #define OMAP4430_SDMA_DYNDEP_SHIFT                              11
 #define OMAP4430_SDMA_DYNDEP_MASK                               (1 << 11)
 
@@ -1417,10 +1314,10 @@
  * CM_L3INIT_HSI_CLKCTRL, CM_L3INIT_MMC1_CLKCTRL, CM_L3INIT_MMC2_CLKCTRL,
  * CM_L3INIT_MMC6_CLKCTRL, CM_L3INIT_P1500_CLKCTRL, CM_L3INIT_PCIESS_CLKCTRL,
  * CM_L3INIT_SATA_CLKCTRL, CM_L3INIT_TPPSS_CLKCTRL, CM_L3INIT_UNIPRO1_CLKCTRL,
- * CM_L3INIT_USB_HOST_CLKCTRL, CM_L3INIT_USB_HOST_CLKCTRL_RESTORE,
- * CM_L3INIT_USB_HOST_FS_CLKCTRL, CM_L3INIT_USB_OTG_CLKCTRL,
- * CM_L3INIT_XHPI_CLKCTRL, CM_L4SEC_CRYPTODMA_CLKCTRL, CM_MPU_MPU_CLKCTRL,
- * CM_SDMA_SDMA_CLKCTRL, CM_TESLA_TESLA_CLKCTRL
+ * CM_L3INIT_USB_HOST_CLKCTRL, CM_L3INIT_USB_HOST_FS_CLKCTRL,
+ * CM_L3INIT_USB_OTG_CLKCTRL, CM_L3INIT_XHPI_CLKCTRL,
+ * CM_L4SEC_CRYPTODMA_CLKCTRL, CM_MPU_MPU_CLKCTRL, CM_SDMA_SDMA_CLKCTRL,
+ * CM_TESLA_TESLA_CLKCTRL
  */
 #define OMAP4430_STBYST_SHIFT                                   18
 #define OMAP4430_STBYST_MASK                                    (1 << 18)
@@ -1438,17 +1335,13 @@
 #define OMAP4430_ST_DPLL_CLKDCOLDO_MASK                         (1 << 9)
 
 /*
- * Used by CM_DIV_M2_DPLL_ABE, CM_DIV_M2_DPLL_CORE,
- * CM_DIV_M2_DPLL_CORE_RESTORE, CM_DIV_M2_DPLL_DDRPHY, CM_DIV_M2_DPLL_MPU,
- * CM_DIV_M2_DPLL_PER, CM_DIV_M2_DPLL_USB
+ * Used by CM_DIV_M2_DPLL_ABE, CM_DIV_M2_DPLL_CORE, CM_DIV_M2_DPLL_DDRPHY,
+ * CM_DIV_M2_DPLL_MPU, CM_DIV_M2_DPLL_PER, CM_DIV_M2_DPLL_USB
  */
 #define OMAP4430_ST_DPLL_CLKOUT_SHIFT                           9
 #define OMAP4430_ST_DPLL_CLKOUT_MASK                            (1 << 9)
 
-/*
- * Used by CM_DIV_M3_DPLL_ABE, CM_DIV_M3_DPLL_CORE,
- * CM_DIV_M3_DPLL_CORE_RESTORE, CM_DIV_M3_DPLL_PER
- */
+/* Used by CM_DIV_M3_DPLL_ABE, CM_DIV_M3_DPLL_CORE, CM_DIV_M3_DPLL_PER */
 #define OMAP4430_ST_DPLL_CLKOUTHIF_SHIFT                        9
 #define OMAP4430_ST_DPLL_CLKOUTHIF_MASK                         (1 << 9)
 
@@ -1457,30 +1350,24 @@
 #define OMAP4430_ST_DPLL_CLKOUTX2_MASK                          (1 << 11)
 
 /*
- * Used by CM_DIV_M4_DPLL_CORE, CM_DIV_M4_DPLL_CORE_RESTORE,
- * CM_DIV_M4_DPLL_DDRPHY, CM_DIV_M4_DPLL_IVA, CM_DIV_M4_DPLL_PER
+ * Used by CM_DIV_M4_DPLL_CORE, CM_DIV_M4_DPLL_DDRPHY, CM_DIV_M4_DPLL_IVA,
+ * CM_DIV_M4_DPLL_PER
  */
 #define OMAP4430_ST_HSDIVIDER_CLKOUT1_SHIFT                     9
 #define OMAP4430_ST_HSDIVIDER_CLKOUT1_MASK                      (1 << 9)
 
 /*
- * Used by CM_DIV_M5_DPLL_CORE, CM_DIV_M5_DPLL_CORE_RESTORE,
- * CM_DIV_M5_DPLL_DDRPHY, CM_DIV_M5_DPLL_IVA, CM_DIV_M5_DPLL_PER
+ * Used by CM_DIV_M5_DPLL_CORE, CM_DIV_M5_DPLL_DDRPHY, CM_DIV_M5_DPLL_IVA,
+ * CM_DIV_M5_DPLL_PER
  */
 #define OMAP4430_ST_HSDIVIDER_CLKOUT2_SHIFT                     9
 #define OMAP4430_ST_HSDIVIDER_CLKOUT2_MASK                      (1 << 9)
 
-/*
- * Used by CM_DIV_M6_DPLL_CORE, CM_DIV_M6_DPLL_CORE_RESTORE,
- * CM_DIV_M6_DPLL_DDRPHY, CM_DIV_M6_DPLL_PER
- */
+/* Used by CM_DIV_M6_DPLL_CORE, CM_DIV_M6_DPLL_DDRPHY, CM_DIV_M6_DPLL_PER */
 #define OMAP4430_ST_HSDIVIDER_CLKOUT3_SHIFT                     9
 #define OMAP4430_ST_HSDIVIDER_CLKOUT3_MASK                      (1 << 9)
 
-/*
- * Used by CM_DIV_M7_DPLL_CORE, CM_DIV_M7_DPLL_CORE_RESTORE,
- * CM_DIV_M7_DPLL_PER
- */
+/* Used by CM_DIV_M7_DPLL_CORE, CM_DIV_M7_DPLL_PER */
 #define OMAP4430_ST_HSDIVIDER_CLKOUT4_SHIFT                     9
 #define OMAP4430_ST_HSDIVIDER_CLKOUT4_MASK                      (1 << 9)
 
@@ -1496,7 +1383,7 @@
 #define OMAP4430_SYS_CLKSEL_SHIFT                               0
 #define OMAP4430_SYS_CLKSEL_MASK                                (0x7 << 0)
 
-/* Used by CM_L4CFG_DYNAMICDEP, CM_L4CFG_DYNAMICDEP_RESTORE */
+/* Used by CM_L4CFG_DYNAMICDEP */
 #define OMAP4430_TESLA_DYNDEP_SHIFT                             1
 #define OMAP4430_TESLA_DYNDEP_MASK                              (1 << 1)
 
@@ -1505,11 +1392,9 @@
 #define OMAP4430_TESLA_STATDEP_MASK                             (1 << 1)
 
 /*
- * Used by CM_D2D_DYNAMICDEP, CM_D2D_DYNAMICDEP_RESTORE, CM_DUCATI_DYNAMICDEP,
- * CM_EMU_DYNAMICDEP, CM_L3_1_DYNAMICDEP, CM_L3_1_DYNAMICDEP_RESTORE,
- * CM_L3_2_DYNAMICDEP, CM_L3_2_DYNAMICDEP_RESTORE, CM_L4CFG_DYNAMICDEP,
- * CM_L4CFG_DYNAMICDEP_RESTORE, CM_L4PER_DYNAMICDEP,
- * CM_L4PER_DYNAMICDEP_RESTORE, CM_MPU_DYNAMICDEP, CM_TESLA_DYNAMICDEP
+ * Used by CM_D2D_DYNAMICDEP, CM_DUCATI_DYNAMICDEP, CM_EMU_DYNAMICDEP,
+ * CM_L3_1_DYNAMICDEP, CM_L3_2_DYNAMICDEP, CM_L4CFG_DYNAMICDEP,
+ * CM_L4PER_DYNAMICDEP, CM_MPU_DYNAMICDEP, CM_TESLA_DYNAMICDEP
  */
 #define OMAP4430_WINDOWSIZE_SHIFT                               24
 #define OMAP4430_WINDOWSIZE_MASK                                (0xf << 24)
diff --git a/arch/arm/mach-omap2/cm1_44xx.h b/arch/arm/mach-omap2/cm1_44xx.h
index e2d7a56b2ad6..1bc00dc4876c 100644
--- a/arch/arm/mach-omap2/cm1_44xx.h
+++ b/arch/arm/mach-omap2/cm1_44xx.h
@@ -1,7 +1,7 @@
 /*
  * OMAP44xx CM1 instance offset macros
  *
- * Copyright (C) 2009-2010 Texas Instruments, Inc.
+ * Copyright (C) 2009-2011 Texas Instruments, Inc.
  * Copyright (C) 2009-2010 Nokia Corporation
  *
  * Paul Walmsley (paul@pwsan.com)
@@ -41,9 +41,9 @@
 #define OMAP4430_CM1_INSTR_INST         0x0f00
 
 /* CM1 clockdomain register offsets (from instance start) */
-#define OMAP4430_CM1_ABE_ABE_CDOFFS             0x0000
-#define OMAP4430_CM1_MPU_MPU_CDOFFS             0x0000
-#define OMAP4430_CM1_TESLA_TESLA_CDOFFS         0x0000
+#define OMAP4430_CM1_MPU_MPU_CDOFFS     0x0000
+#define OMAP4430_CM1_TESLA_TESLA_CDOFFS 0x0000
+#define OMAP4430_CM1_ABE_ABE_CDOFFS     0x0000
 
 /* CM1 */
 
@@ -82,8 +82,8 @@
 #define OMAP4430_CM_DIV_M7_DPLL_CORE                    OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x0044)
 #define OMAP4_CM_SSC_DELTAMSTEP_DPLL_CORE_OFFSET        0x0048
 #define OMAP4430_CM_SSC_DELTAMSTEP_DPLL_CORE            OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x0048)
-#define OMAP4_CM_SSC_INSTFREQDIV_DPLL_CORE_OFFSET       0x004c
-#define OMAP4430_CM_SSC_INSTFREQDIV_DPLL_CORE           OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x004c)
+#define OMAP4_CM_SSC_MODFREQDIV_DPLL_CORE_OFFSET        0x004c
+#define OMAP4430_CM_SSC_MODFREQDIV_DPLL_CORE            OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x004c)
 #define OMAP4_CM_EMU_OVERRIDE_DPLL_CORE_OFFSET          0x0050
 #define OMAP4430_CM_EMU_OVERRIDE_DPLL_CORE              OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x0050)
 #define OMAP4_CM_CLKMODE_DPLL_MPU_OFFSET                0x0060
@@ -98,8 +98,8 @@
 #define OMAP4430_CM_DIV_M2_DPLL_MPU                     OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x0070)
 #define OMAP4_CM_SSC_DELTAMSTEP_DPLL_MPU_OFFSET         0x0088
 #define OMAP4430_CM_SSC_DELTAMSTEP_DPLL_MPU             OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x0088)
-#define OMAP4_CM_SSC_INSTFREQDIV_DPLL_MPU_OFFSET                0x008c
-#define OMAP4430_CM_SSC_INSTFREQDIV_DPLL_MPU            OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x008c)
+#define OMAP4_CM_SSC_MODFREQDIV_DPLL_MPU_OFFSET         0x008c
+#define OMAP4430_CM_SSC_MODFREQDIV_DPLL_MPU             OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x008c)
 #define OMAP4_CM_BYPCLK_DPLL_MPU_OFFSET                 0x009c
 #define OMAP4430_CM_BYPCLK_DPLL_MPU                     OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x009c)
 #define OMAP4_CM_CLKMODE_DPLL_IVA_OFFSET                0x00a0
@@ -116,8 +116,8 @@
 #define OMAP4430_CM_DIV_M5_DPLL_IVA                     OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x00bc)
 #define OMAP4_CM_SSC_DELTAMSTEP_DPLL_IVA_OFFSET         0x00c8
 #define OMAP4430_CM_SSC_DELTAMSTEP_DPLL_IVA             OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x00c8)
-#define OMAP4_CM_SSC_INSTFREQDIV_DPLL_IVA_OFFSET                0x00cc
-#define OMAP4430_CM_SSC_INSTFREQDIV_DPLL_IVA            OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x00cc)
+#define OMAP4_CM_SSC_MODFREQDIV_DPLL_IVA_OFFSET         0x00cc
+#define OMAP4430_CM_SSC_MODFREQDIV_DPLL_IVA             OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x00cc)
 #define OMAP4_CM_BYPCLK_DPLL_IVA_OFFSET                 0x00dc
 #define OMAP4430_CM_BYPCLK_DPLL_IVA                     OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x00dc)
 #define OMAP4_CM_CLKMODE_DPLL_ABE_OFFSET                0x00e0
@@ -134,8 +134,8 @@
 #define OMAP4430_CM_DIV_M3_DPLL_ABE                     OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x00f4)
 #define OMAP4_CM_SSC_DELTAMSTEP_DPLL_ABE_OFFSET         0x0108
 #define OMAP4430_CM_SSC_DELTAMSTEP_DPLL_ABE             OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x0108)
-#define OMAP4_CM_SSC_INSTFREQDIV_DPLL_ABE_OFFSET                0x010c
-#define OMAP4430_CM_SSC_INSTFREQDIV_DPLL_ABE            OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x010c)
+#define OMAP4_CM_SSC_MODFREQDIV_DPLL_ABE_OFFSET         0x010c
+#define OMAP4430_CM_SSC_MODFREQDIV_DPLL_ABE             OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x010c)
 #define OMAP4_CM_CLKMODE_DPLL_DDRPHY_OFFSET             0x0120
 #define OMAP4430_CM_CLKMODE_DPLL_DDRPHY                 OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x0120)
 #define OMAP4_CM_IDLEST_DPLL_DDRPHY_OFFSET              0x0124
@@ -154,8 +154,8 @@
 #define OMAP4430_CM_DIV_M6_DPLL_DDRPHY                  OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x0140)
 #define OMAP4_CM_SSC_DELTAMSTEP_DPLL_DDRPHY_OFFSET      0x0148
 #define OMAP4430_CM_SSC_DELTAMSTEP_DPLL_DDRPHY          OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x0148)
-#define OMAP4_CM_SSC_INSTFREQDIV_DPLL_DDRPHY_OFFSET     0x014c
-#define OMAP4430_CM_SSC_INSTFREQDIV_DPLL_DDRPHY         OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x014c)
+#define OMAP4_CM_SSC_MODFREQDIV_DPLL_DDRPHY_OFFSET      0x014c
+#define OMAP4430_CM_SSC_MODFREQDIV_DPLL_DDRPHY          OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x014c)
 #define OMAP4_CM_SHADOW_FREQ_CONFIG1_OFFSET             0x0160
 #define OMAP4430_CM_SHADOW_FREQ_CONFIG1                 OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x0160)
 #define OMAP4_CM_SHADOW_FREQ_CONFIG2_OFFSET             0x0164
@@ -217,42 +217,6 @@
 #define OMAP4_CM1_ABE_WDT3_CLKCTRL_OFFSET               0x0088
 #define OMAP4430_CM1_ABE_WDT3_CLKCTRL                   OMAP44XX_CM1_REGADDR(OMAP4430_CM1_ABE_INST, 0x0088)
 
-/* CM1.RESTORE_CM1 register offsets */
-#define OMAP4_CM_CLKSEL_CORE_RESTORE_OFFSET             0x0000
-#define OMAP4430_CM_CLKSEL_CORE_RESTORE                 OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x0000)
-#define OMAP4_CM_DIV_M2_DPLL_CORE_RESTORE_OFFSET        0x0004
-#define OMAP4430_CM_DIV_M2_DPLL_CORE_RESTORE            OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x0004)
-#define OMAP4_CM_DIV_M3_DPLL_CORE_RESTORE_OFFSET        0x0008
-#define OMAP4430_CM_DIV_M3_DPLL_CORE_RESTORE            OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x0008)
-#define OMAP4_CM_DIV_M4_DPLL_CORE_RESTORE_OFFSET        0x000c
-#define OMAP4430_CM_DIV_M4_DPLL_CORE_RESTORE            OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x000c)
-#define OMAP4_CM_DIV_M5_DPLL_CORE_RESTORE_OFFSET        0x0010
-#define OMAP4430_CM_DIV_M5_DPLL_CORE_RESTORE            OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x0010)
-#define OMAP4_CM_DIV_M6_DPLL_CORE_RESTORE_OFFSET        0x0014
-#define OMAP4430_CM_DIV_M6_DPLL_CORE_RESTORE            OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x0014)
-#define OMAP4_CM_DIV_M7_DPLL_CORE_RESTORE_OFFSET        0x0018
-#define OMAP4430_CM_DIV_M7_DPLL_CORE_RESTORE            OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x0018)
-#define OMAP4_CM_CLKSEL_DPLL_CORE_RESTORE_OFFSET        0x001c
-#define OMAP4430_CM_CLKSEL_DPLL_CORE_RESTORE            OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x001c)
-#define OMAP4_CM_SSC_DELTAMSTEP_DPLL_CORE_RESTORE_OFFSET        0x0020
-#define OMAP4430_CM_SSC_DELTAMSTEP_DPLL_CORE_RESTORE    OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x0020)
-#define OMAP4_CM_SSC_INSTFREQDIV_DPLL_CORE_RESTORE_OFFSET       0x0024
-#define OMAP4430_CM_SSC_INSTFREQDIV_DPLL_CORE_RESTORE   OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x0024)
-#define OMAP4_CM_CLKMODE_DPLL_CORE_RESTORE_OFFSET       0x0028
-#define OMAP4430_CM_CLKMODE_DPLL_CORE_RESTORE           OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x0028)
-#define OMAP4_CM_SHADOW_FREQ_CONFIG2_RESTORE_OFFSET     0x002c
-#define OMAP4430_CM_SHADOW_FREQ_CONFIG2_RESTORE         OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x002c)
-#define OMAP4_CM_SHADOW_FREQ_CONFIG1_RESTORE_OFFSET     0x0030
-#define OMAP4430_CM_SHADOW_FREQ_CONFIG1_RESTORE         OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x0030)
-#define OMAP4_CM_AUTOIDLE_DPLL_CORE_RESTORE_OFFSET      0x0034
-#define OMAP4430_CM_AUTOIDLE_DPLL_CORE_RESTORE          OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x0034)
-#define OMAP4_CM_MPU_CLKSTCTRL_RESTORE_OFFSET           0x0038
-#define OMAP4430_CM_MPU_CLKSTCTRL_RESTORE               OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x0038)
-#define OMAP4_CM_CM1_PROFILING_CLKCTRL_RESTORE_OFFSET   0x003c
-#define OMAP4430_CM_CM1_PROFILING_CLKCTRL_RESTORE       OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x003c)
-#define OMAP4_CM_DYN_DEP_PRESCAL_RESTORE_OFFSET         0x0040
-#define OMAP4430_CM_DYN_DEP_PRESCAL_RESTORE             OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x0040)
-
 /* Function prototypes */
 extern u32 omap4_cm1_read_inst_reg(s16 inst, u16 idx);
 extern void omap4_cm1_write_inst_reg(u32 val, s16 inst, u16 idx);
diff --git a/arch/arm/mach-omap2/cm2_44xx.h b/arch/arm/mach-omap2/cm2_44xx.h
index aa4745044065..b9de72da1a8e 100644
--- a/arch/arm/mach-omap2/cm2_44xx.h
+++ b/arch/arm/mach-omap2/cm2_44xx.h
@@ -1,7 +1,7 @@
 /*
  * OMAP44xx CM2 instance offset macros
  *
- * Copyright (C) 2009-2010 Texas Instruments, Inc.
+ * Copyright (C) 2009-2011 Texas Instruments, Inc.
  * Copyright (C) 2009-2010 Nokia Corporation
  *
  * Paul Walmsley (paul@pwsan.com)
@@ -40,9 +40,9 @@
 #define OMAP4430_CM2_CAM_INST           0x1000
 #define OMAP4430_CM2_DSS_INST           0x1100
 #define OMAP4430_CM2_GFX_INST           0x1200
-#define OMAP4430_CM2_L3INIT_INST                0x1300
+#define OMAP4430_CM2_L3INIT_INST        0x1300
 #define OMAP4430_CM2_L4PER_INST         0x1400
-#define OMAP4430_CM2_CEFUSE_INST                0x1600
+#define OMAP4430_CM2_CEFUSE_INST        0x1600
 #define OMAP4430_CM2_RESTORE_INST       0x1e00
 #define OMAP4430_CM2_INSTR_INST         0x1f00
 
@@ -65,7 +65,6 @@
 #define OMAP4430_CM2_L4PER_L4SEC_CDOFFS         0x0180
 #define OMAP4430_CM2_CEFUSE_CEFUSE_CDOFFS       0x0000
 
-
 /* CM2 */
 
 /* CM2.OCP_SOCKET_CM2 register offsets */
@@ -121,8 +120,8 @@
 #define OMAP4430_CM_DIV_M7_DPLL_PER                     OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0064)
 #define OMAP4_CM_SSC_DELTAMSTEP_DPLL_PER_OFFSET         0x0068
 #define OMAP4430_CM_SSC_DELTAMSTEP_DPLL_PER             OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0068)
-#define OMAP4_CM_SSC_INSTFREQDIV_DPLL_PER_OFFSET                0x006c
-#define OMAP4430_CM_SSC_INSTFREQDIV_DPLL_PER            OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x006c)
+#define OMAP4_CM_SSC_MODFREQDIV_DPLL_PER_OFFSET         0x006c
+#define OMAP4430_CM_SSC_MODFREQDIV_DPLL_PER             OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x006c)
 #define OMAP4_CM_CLKMODE_DPLL_USB_OFFSET                0x0080
 #define OMAP4430_CM_CLKMODE_DPLL_USB                    OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0080)
 #define OMAP4_CM_IDLEST_DPLL_USB_OFFSET                 0x0084
@@ -135,8 +134,8 @@
 #define OMAP4430_CM_DIV_M2_DPLL_USB                     OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0090)
 #define OMAP4_CM_SSC_DELTAMSTEP_DPLL_USB_OFFSET         0x00a8
 #define OMAP4430_CM_SSC_DELTAMSTEP_DPLL_USB             OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00a8)
-#define OMAP4_CM_SSC_INSTFREQDIV_DPLL_USB_OFFSET                0x00ac
-#define OMAP4430_CM_SSC_INSTFREQDIV_DPLL_USB            OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00ac)
+#define OMAP4_CM_SSC_MODFREQDIV_DPLL_USB_OFFSET         0x00ac
+#define OMAP4430_CM_SSC_MODFREQDIV_DPLL_USB             OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00ac)
 #define OMAP4_CM_CLKDCOLDO_DPLL_USB_OFFSET              0x00b4
 #define OMAP4430_CM_CLKDCOLDO_DPLL_USB                  OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00b4)
 #define OMAP4_CM_CLKMODE_DPLL_UNIPRO_OFFSET             0x00c0
@@ -151,8 +150,8 @@
 #define OMAP4430_CM_DIV_M2_DPLL_UNIPRO                  OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00d0)
 #define OMAP4_CM_SSC_DELTAMSTEP_DPLL_UNIPRO_OFFSET      0x00e8
 #define OMAP4430_CM_SSC_DELTAMSTEP_DPLL_UNIPRO          OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00e8)
-#define OMAP4_CM_SSC_INSTFREQDIV_DPLL_UNIPRO_OFFSET     0x00ec
-#define OMAP4430_CM_SSC_INSTFREQDIV_DPLL_UNIPRO         OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00ec)
+#define OMAP4_CM_SSC_MODFREQDIV_DPLL_UNIPRO_OFFSET      0x00ec
+#define OMAP4430_CM_SSC_MODFREQDIV_DPLL_UNIPRO          OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00ec)
 
 /* CM2.ALWAYS_ON_CM2 register offsets */
 #define OMAP4_CM_ALWON_CLKSTCTRL_OFFSET                 0x0000
@@ -227,8 +226,8 @@
 #define OMAP4430_CM_D2D_DYNAMICDEP                      OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0508)
 #define OMAP4_CM_D2D_SAD2D_CLKCTRL_OFFSET               0x0520
 #define OMAP4430_CM_D2D_SAD2D_CLKCTRL                   OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0520)
-#define OMAP4_CM_D2D_INSTEM_ICR_CLKCTRL_OFFSET          0x0528
-#define OMAP4430_CM_D2D_INSTEM_ICR_CLKCTRL              OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0528)
+#define OMAP4_CM_D2D_MODEM_ICR_CLKCTRL_OFFSET           0x0528
+#define OMAP4430_CM_D2D_MODEM_ICR_CLKCTRL               OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0528)
 #define OMAP4_CM_D2D_SAD2D_FW_CLKCTRL_OFFSET            0x0530
 #define OMAP4430_CM_D2D_SAD2D_FW_CLKCTRL                OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0530)
 #define OMAP4_CM_L4CFG_CLKSTCTRL_OFFSET                 0x0600
@@ -450,56 +449,6 @@
 #define OMAP4_CM_CEFUSE_CEFUSE_CLKCTRL_OFFSET           0x0020
 #define OMAP4430_CM_CEFUSE_CEFUSE_CLKCTRL               OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CEFUSE_INST, 0x0020)
 
-/* CM2.RESTORE_CM2 register offsets */
-#define OMAP4_CM_L3_1_CLKSTCTRL_RESTORE_OFFSET          0x0000
-#define OMAP4430_CM_L3_1_CLKSTCTRL_RESTORE              OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0000)
-#define OMAP4_CM_L3_2_CLKSTCTRL_RESTORE_OFFSET          0x0004
-#define OMAP4430_CM_L3_2_CLKSTCTRL_RESTORE              OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0004)
-#define OMAP4_CM_L4CFG_CLKSTCTRL_RESTORE_OFFSET         0x0008
-#define OMAP4430_CM_L4CFG_CLKSTCTRL_RESTORE             OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0008)
-#define OMAP4_CM_MEMIF_CLKSTCTRL_RESTORE_OFFSET         0x000c
-#define OMAP4430_CM_MEMIF_CLKSTCTRL_RESTORE             OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x000c)
-#define OMAP4_CM_L4PER_CLKSTCTRL_RESTORE_OFFSET         0x0010
-#define OMAP4430_CM_L4PER_CLKSTCTRL_RESTORE             OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0010)
-#define OMAP4_CM_L3INIT_CLKSTCTRL_RESTORE_OFFSET        0x0014
-#define OMAP4430_CM_L3INIT_CLKSTCTRL_RESTORE            OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0014)
-#define OMAP4_CM_L3INSTR_L3_3_CLKCTRL_RESTORE_OFFSET    0x0018
-#define OMAP4430_CM_L3INSTR_L3_3_CLKCTRL_RESTORE        OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0018)
-#define OMAP4_CM_L3INSTR_L3_INSTR_CLKCTRL_RESTORE_OFFSET        0x001c
-#define OMAP4430_CM_L3INSTR_L3_INSTR_CLKCTRL_RESTORE    OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x001c)
-#define OMAP4_CM_L3INSTR_OCP_WP1_CLKCTRL_RESTORE_OFFSET 0x0020
-#define OMAP4430_CM_L3INSTR_OCP_WP1_CLKCTRL_RESTORE     OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0020)
-#define OMAP4_CM_CM2_PROFILING_CLKCTRL_RESTORE_OFFSET   0x0024
-#define OMAP4430_CM_CM2_PROFILING_CLKCTRL_RESTORE       OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0024)
-#define OMAP4_CM_D2D_STATICDEP_RESTORE_OFFSET           0x0028
-#define OMAP4430_CM_D2D_STATICDEP_RESTORE               OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0028)
-#define OMAP4_CM_L3_1_DYNAMICDEP_RESTORE_OFFSET         0x002c
-#define OMAP4430_CM_L3_1_DYNAMICDEP_RESTORE             OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x002c)
-#define OMAP4_CM_L3_2_DYNAMICDEP_RESTORE_OFFSET         0x0030
-#define OMAP4430_CM_L3_2_DYNAMICDEP_RESTORE             OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0030)
-#define OMAP4_CM_D2D_DYNAMICDEP_RESTORE_OFFSET          0x0034
-#define OMAP4430_CM_D2D_DYNAMICDEP_RESTORE              OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0034)
-#define OMAP4_CM_L4CFG_DYNAMICDEP_RESTORE_OFFSET        0x0038
-#define OMAP4430_CM_L4CFG_DYNAMICDEP_RESTORE            OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0038)
-#define OMAP4_CM_L4PER_DYNAMICDEP_RESTORE_OFFSET        0x003c
-#define OMAP4430_CM_L4PER_DYNAMICDEP_RESTORE            OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x003c)
-#define OMAP4_CM_L4PER_GPIO2_CLKCTRL_RESTORE_OFFSET     0x0040
-#define OMAP4430_CM_L4PER_GPIO2_CLKCTRL_RESTORE         OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0040)
-#define OMAP4_CM_L4PER_GPIO3_CLKCTRL_RESTORE_OFFSET     0x0044
-#define OMAP4430_CM_L4PER_GPIO3_CLKCTRL_RESTORE         OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0044)
-#define OMAP4_CM_L4PER_GPIO4_CLKCTRL_RESTORE_OFFSET     0x0048
-#define OMAP4430_CM_L4PER_GPIO4_CLKCTRL_RESTORE         OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0048)
-#define OMAP4_CM_L4PER_GPIO5_CLKCTRL_RESTORE_OFFSET     0x004c
-#define OMAP4430_CM_L4PER_GPIO5_CLKCTRL_RESTORE         OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x004c)
-#define OMAP4_CM_L4PER_GPIO6_CLKCTRL_RESTORE_OFFSET     0x0050
-#define OMAP4430_CM_L4PER_GPIO6_CLKCTRL_RESTORE         OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0050)
-#define OMAP4_CM_L3INIT_USB_HOST_CLKCTRL_RESTORE_OFFSET 0x0054
-#define OMAP4430_CM_L3INIT_USB_HOST_CLKCTRL_RESTORE     OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0054)
-#define OMAP4_CM_L3INIT_USB_TLL_CLKCTRL_RESTORE_OFFSET  0x0058
-#define OMAP4430_CM_L3INIT_USB_TLL_CLKCTRL_RESTORE      OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0058)
-#define OMAP4_CM_SDMA_STATICDEP_RESTORE_OFFSET          0x005c
-#define OMAP4430_CM_SDMA_STATICDEP_RESTORE              OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x005c)
-
 /* Function prototypes */
 extern u32 omap4_cm2_read_inst_reg(s16 inst, u16 idx);
 extern void omap4_cm2_write_inst_reg(u32 val, s16 inst, u16 idx);
diff --git a/arch/arm/mach-omap2/common-board-devices.c b/arch/arm/mach-omap2/common-board-devices.c
index 94ccf464677b..bcb0c5817167 100644
--- a/arch/arm/mach-omap2/common-board-devices.c
+++ b/arch/arm/mach-omap2/common-board-devices.c
@@ -20,36 +20,15 @@
  *
  */
 
-#include <linux/i2c.h>
-#include <linux/i2c/twl.h>
-
 #include <linux/gpio.h>
 #include <linux/spi/spi.h>
 #include <linux/spi/ads7846.h>
 
-#include <plat/i2c.h>
 #include <plat/mcspi.h>
 #include <plat/nand.h>
 
 #include "common-board-devices.h"
 
-static struct i2c_board_info __initdata pmic_i2c_board_info = {
-        .addr           = 0x48,
-        .flags          = I2C_CLIENT_WAKE,
-};
-
-void __init omap_pmic_init(int bus, u32 clkrate,
-                           const char *pmic_type, int pmic_irq,
-                           struct twl4030_platform_data *pmic_data)
-{
-        strncpy(pmic_i2c_board_info.type, pmic_type,
-                sizeof(pmic_i2c_board_info.type));
-        pmic_i2c_board_info.irq = pmic_irq;
-        pmic_i2c_board_info.platform_data = pmic_data;
-
-        omap_register_i2c_bus(bus, clkrate, &pmic_i2c_board_info, 1);
-}
-
 #if defined(CONFIG_TOUCHSCREEN_ADS7846) || \
         defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
 static struct omap2_mcspi_device_config ads7846_mcspi_config = {
@@ -115,9 +94,7 @@ void __init omap_ads7846_init(int bus_num, int gpio_pendown, int gpio_debounce,
 #endif
 
 #if defined(CONFIG_MTD_NAND_OMAP2) || defined(CONFIG_MTD_NAND_OMAP2_MODULE)
-static struct omap_nand_platform_data nand_data = {
-        .dma_channel    = -1,           /* disable DMA in OMAP NAND driver */
-};
+static struct omap_nand_platform_data nand_data;
 
 void __init omap_nand_flash_init(int options, struct mtd_partition *parts,
                                  int nr_parts)
@@ -148,7 +125,7 @@ void __init omap_nand_flash_init(int options, struct mtd_partition *parts,
                 nand_data.cs = nandcs;
                 nand_data.parts = parts;
                 nand_data.nr_parts = nr_parts;
-                nand_data.options = options;
+                nand_data.devsize = options;
 
                 printk(KERN_INFO "Registering NAND on CS%d\n", nandcs);
                 if (gpmc_nand_init(&nand_data) < 0)
diff --git a/arch/arm/mach-omap2/common-board-devices.h b/arch/arm/mach-omap2/common-board-devices.h
index 679719051df5..a0b4a42836ab 100644
--- a/arch/arm/mach-omap2/common-board-devices.h
+++ b/arch/arm/mach-omap2/common-board-devices.h
@@ -1,33 +1,11 @@
 #ifndef __OMAP_COMMON_BOARD_DEVICES__
 #define __OMAP_COMMON_BOARD_DEVICES__
 
+#include "twl-common.h"
+
 #define NAND_BLOCK_SIZE SZ_128K
 
-struct twl4030_platform_data;
 struct mtd_partition;
-
-void omap_pmic_init(int bus, u32 clkrate, const char *pmic_type, int pmic_irq,
-                    struct twl4030_platform_data *pmic_data);
-
-static inline void omap2_pmic_init(const char *pmic_type,
-                                   struct twl4030_platform_data *pmic_data)
-{
-        omap_pmic_init(2, 2600, pmic_type, INT_24XX_SYS_NIRQ, pmic_data);
-}
-
-static inline void omap3_pmic_init(const char *pmic_type,
-                                   struct twl4030_platform_data *pmic_data)
-{
-        omap_pmic_init(1, 2600, pmic_type, INT_34XX_SYS_NIRQ, pmic_data);
-}
-
-static inline void omap4_pmic_init(const char *pmic_type,
-                                   struct twl4030_platform_data *pmic_data)
-{
-        /* Phoenix Audio IC needs I2C1 to start with 400 KHz or less */
-        omap_pmic_init(1, 400, pmic_type, OMAP44XX_IRQ_SYS_1N, pmic_data);
-}
-
 struct ads7846_platform_data;
 
 void omap_ads7846_init(int bus_num, int gpio_pendown, int gpio_debounce,
diff --git a/arch/arm/mach-omap2/gpmc-nand.c b/arch/arm/mach-omap2/gpmc-nand.c
index c1791d08ae56..8ad210bda9a9 100644
--- a/arch/arm/mach-omap2/gpmc-nand.c
+++ b/arch/arm/mach-omap2/gpmc-nand.c
@@ -20,8 +20,6 @@
 #include <plat/board.h>
 #include <plat/gpmc.h>
 
-static struct omap_nand_platform_data *gpmc_nand_data;
-
 static struct resource gpmc_nand_resource = {
         .flags          = IORESOURCE_MEM,
 };
@@ -33,7 +31,7 @@ static struct platform_device gpmc_nand_device = {
         .resource       = &gpmc_nand_resource,
 };
 
-static int omap2_nand_gpmc_retime(void)
+static int omap2_nand_gpmc_retime(struct omap_nand_platform_data *gpmc_nand_data)
 {
         struct gpmc_timings t;
         int err;
@@ -83,13 +81,11 @@ static int omap2_nand_gpmc_retime(void)
         return 0;
 }
 
-int __init gpmc_nand_init(struct omap_nand_platform_data *_nand_data)
+int __init gpmc_nand_init(struct omap_nand_platform_data *gpmc_nand_data)
 {
         int err = 0;
         struct device *dev = &gpmc_nand_device.dev;
 
-        gpmc_nand_data = _nand_data;
-        gpmc_nand_data->nand_setup = omap2_nand_gpmc_retime;
         gpmc_nand_device.dev.platform_data = gpmc_nand_data;
 
         err = gpmc_cs_request(gpmc_nand_data->cs, NAND_IO_SIZE,
@@ -100,7 +96,7 @@ int __init gpmc_nand_init(struct omap_nand_platform_data *_nand_data)
         }
 
          /* Set timings in GPMC */
-        err = omap2_nand_gpmc_retime();
+        err = omap2_nand_gpmc_retime(gpmc_nand_data);
         if (err < 0) {
                 dev_err(dev, "Unable to set gpmc timings: %d\n", err);
                 return err;
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index 441e79d043a7..2ce1ce6fb4db 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -333,23 +333,9 @@ static int _set_hwmod_postsetup_state(struct omap_hwmod *oh, void *data)
         return omap_hwmod_set_postsetup_state(oh, *(u8 *)data);
 }
 
+/* See irq.c, omap4-common.c and entry-macro.S */
 void __iomem *omap_irq_base;
 
-/*
- * Initialize asm_irq_base for entry-macro.S
- */
-static inline void omap_irq_base_init(void)
-{
-        if (cpu_is_omap24xx())
-                omap_irq_base = OMAP2_L4_IO_ADDRESS(OMAP24XX_IC_BASE);
-        else if (cpu_is_omap34xx())
-                omap_irq_base = OMAP2_L4_IO_ADDRESS(OMAP34XX_IC_BASE);
-        else if (cpu_is_omap44xx())
-                omap_irq_base = OMAP2_L4_IO_ADDRESS(OMAP44XX_GIC_CPU_BASE);
-        else
-                pr_err("Could not initialize omap_irq_base\n");
-}
-
 void __init omap2_init_common_infrastructure(void)
 {
         u8 postsetup_state;
@@ -422,7 +408,6 @@ void __init omap2_init_common_devices(struct omap_sdrc_params *sdrc_cs0,
                 _omap2_init_reprogram_sdrc();
         }
 
-        omap_irq_base_init();
 }
 
 /*
diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c
index 3af2b7a1045e..3a12f7586a4c 100644
--- a/arch/arm/mach-omap2/irq.c
+++ b/arch/arm/mach-omap2/irq.c
@@ -141,25 +141,20 @@ omap_alloc_gc(void __iomem *base, unsigned int irq_start, unsigned int num)
                                 IRQ_NOREQUEST | IRQ_NOPROBE, 0);
 }
 
-void __init omap_init_irq(void)
+static void __init omap_init_irq(u32 base, int nr_irqs)
 {
         unsigned long nr_of_irqs = 0;
         unsigned int nr_banks = 0;
         int i, j;
 
+        omap_irq_base = ioremap(base, SZ_4K);
+        if (WARN_ON(!omap_irq_base))
+                return;
+
         for (i = 0; i < ARRAY_SIZE(irq_banks); i++) {
-                unsigned long base = 0;
                 struct omap_irq_bank *bank = irq_banks + i;
 
-                if (cpu_is_omap24xx())
-                        base = OMAP24XX_IC_BASE;
-                else if (cpu_is_omap34xx())
-                        base = OMAP34XX_IC_BASE;
-
-                BUG_ON(!base);
-
-                if (cpu_is_ti816x())
-                        bank->nr_irqs = 128;
+                bank->nr_irqs = nr_irqs;
 
                 /* Static mapping, never released */
                 bank->base_reg = ioremap(base, SZ_4K);
@@ -181,6 +176,21 @@ void __init omap_init_irq(void)
                nr_of_irqs, nr_banks, nr_banks > 1 ? "s" : "");
 }
 
+void __init omap2_init_irq(void)
+{
+        omap_init_irq(OMAP24XX_IC_BASE, 96);
+}
+
+void __init omap3_init_irq(void)
+{
+        omap_init_irq(OMAP34XX_IC_BASE, 96);
+}
+
+void __init ti816x_init_irq(void)
+{
+        omap_init_irq(OMAP34XX_IC_BASE, 128);
+}
+
 #ifdef CONFIG_ARCH_OMAP3
 static struct omap3_intc_regs intc_context[ARRAY_SIZE(irq_banks)];
 
diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c
index 9ef8c29dd817..35ac3e5f6e94 100644
--- a/arch/arm/mach-omap2/omap4-common.c
+++ b/arch/arm/mach-omap2/omap4-common.c
@@ -19,6 +19,8 @@
 #include <asm/hardware/gic.h>
 #include <asm/hardware/cache-l2x0.h>
 
+#include <plat/irqs.h>
+
 #include <mach/hardware.h>
 #include <mach/omap4-common.h>
 
@@ -31,17 +33,15 @@ void __iomem *gic_dist_base_addr;
 
 void __init gic_init_irq(void)
 {
-        void __iomem *gic_cpu_base;
-
         /* Static mapping, never released */
         gic_dist_base_addr = ioremap(OMAP44XX_GIC_DIST_BASE, SZ_4K);
         BUG_ON(!gic_dist_base_addr);
 
         /* Static mapping, never released */
-        gic_cpu_base = ioremap(OMAP44XX_GIC_CPU_BASE, SZ_512);
-        BUG_ON(!gic_cpu_base);
+        omap_irq_base = ioremap(OMAP44XX_GIC_CPU_BASE, SZ_512);
+        BUG_ON(!omap_irq_base);
 
-        gic_init(0, 29, gic_dist_base_addr, gic_cpu_base);
+        gic_init(0, 29, gic_dist_base_addr, omap_irq_base);
 }
 
 #ifdef CONFIG_CACHE_L2X0
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 293fa6cd50e1..7d242c9e2a2c 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -2,6 +2,7 @@
  * omap_hwmod implementation for OMAP2/3/4
  *
  * Copyright (C) 2009-2011 Nokia Corporation
+ * Copyright (C) 2011 Texas Instruments, Inc.
  *
  * Paul Walmsley, Benoît Cousson, Kevin Hilman
  *
@@ -387,11 +388,10 @@ static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle,
  */
 static int _enable_wakeup(struct omap_hwmod *oh, u32 *v)
 {
-        u32 wakeup_mask;
-
         if (!oh->class->sysc ||
             !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
-              (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)))
+              (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
+              (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
                 return -EINVAL;
 
         if (!oh->class->sysc->sysc_fields) {
@@ -399,12 +399,13 @@ static int _enable_wakeup(struct omap_hwmod *oh, u32 *v)
                 return -EINVAL;
         }
 
-        wakeup_mask = (0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
-
-        *v |= wakeup_mask;
+        if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
+                *v |= 0x1 << oh->class->sysc->sysc_fields->enwkup_shift;
 
         if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
                 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
+        if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
+                _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
 
         /* XXX test pwrdm_get_wken for this hwmod's subsystem */
 
@@ -422,11 +423,10 @@ static int _enable_wakeup(struct omap_hwmod *oh, u32 *v)
  */
 static int _disable_wakeup(struct omap_hwmod *oh, u32 *v)
 {
-        u32 wakeup_mask;
-
         if (!oh->class->sysc ||
             !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
-              (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)))
+              (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
+              (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
                 return -EINVAL;
 
         if (!oh->class->sysc->sysc_fields) {
@@ -434,12 +434,13 @@ static int _disable_wakeup(struct omap_hwmod *oh, u32 *v)
                 return -EINVAL;
         }
 
-        wakeup_mask = (0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
-
-        *v &= ~wakeup_mask;
+        if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
+                *v &= ~(0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
 
         if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
                 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v);
+        if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
+                _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
 
         /* XXX test pwrdm_get_wken for this hwmod's subsystem */
 
@@ -678,6 +679,75 @@ static void _disable_optional_clocks(struct omap_hwmod *oh)
 }
 
 /**
+ * _count_mpu_irqs - count the number of MPU IRQ lines associated with @oh
+ * @oh: struct omap_hwmod *oh
+ *
+ * Count and return the number of MPU IRQs associated with the hwmod
+ * @oh.  Used to allocate struct resource data.  Returns 0 if @oh is
+ * NULL.
+ */
+static int _count_mpu_irqs(struct omap_hwmod *oh)
+{
+        struct omap_hwmod_irq_info *ohii;
+        int i = 0;
+
+        if (!oh || !oh->mpu_irqs)
+                return 0;
+
+        do {
+                ohii = &oh->mpu_irqs[i++];
+        } while (ohii->irq != -1);
+
+        return i;
+}
+
+/**
+ * _count_sdma_reqs - count the number of SDMA request lines associated with @oh
+ * @oh: struct omap_hwmod *oh
+ *
+ * Count and return the number of SDMA request lines associated with
+ * the hwmod @oh.  Used to allocate struct resource data.  Returns 0
+ * if @oh is NULL.
+ */
+static int _count_sdma_reqs(struct omap_hwmod *oh)
+{
+        struct omap_hwmod_dma_info *ohdi;
+        int i = 0;
+
+        if (!oh || !oh->sdma_reqs)
+                return 0;
+
+        do {
+                ohdi = &oh->sdma_reqs[i++];
+        } while (ohdi->dma_req != -1);
+
+        return i;
+}
+
+/**
+ * _count_ocp_if_addr_spaces - count the number of address space entries for @oh
+ * @oh: struct omap_hwmod *oh
+ *
+ * Count and return the number of address space ranges associated with
+ * the hwmod @oh.  Used to allocate struct resource data.  Returns 0
+ * if @oh is NULL.
+ */
+static int _count_ocp_if_addr_spaces(struct omap_hwmod_ocp_if *os)
+{
+        struct omap_hwmod_addr_space *mem;
+        int i = 0;
+
+        if (!os || !os->addr)
+                return 0;
+
+        do {
+                mem = &os->addr[i++];
+        } while (mem->pa_start != mem->pa_end);
+
+        return i;
+}
+
+/**
  * _find_mpu_port_index - find hwmod OCP slave port ID intended for MPU use
  * @oh: struct omap_hwmod *
  *
@@ -722,8 +792,7 @@ static void __iomem * __init _find_mpu_rt_base(struct omap_hwmod *oh, u8 index)
 {
         struct omap_hwmod_ocp_if *os;
         struct omap_hwmod_addr_space *mem;
-        int i;
-        int found = 0;
+        int i = 0, found = 0;
         void __iomem *va_start;
 
         if (!oh || oh->slaves_cnt == 0)
@@ -731,12 +800,14 @@ static void __iomem * __init _find_mpu_rt_base(struct omap_hwmod *oh, u8 index)
 
         os = oh->slaves[index];
 
-        for (i = 0, mem = os->addr; i < os->addr_cnt; i++, mem++) {
-                if (mem->flags & ADDR_TYPE_RT) {
+        if (!os->addr)
+                return NULL;
+
+        do {
+                mem = &os->addr[i++];
+                if (mem->flags & ADDR_TYPE_RT)
                         found = 1;
-                        break;
-                }
-        }
+        } while (!found && mem->pa_start != mem->pa_end);
 
         if (found) {
                 va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start);
@@ -781,8 +852,16 @@ static void _enable_sysc(struct omap_hwmod *oh)
         }
 
         if (sf & SYSC_HAS_MIDLEMODE) {
-                idlemode = (oh->flags & HWMOD_SWSUP_MSTANDBY) ?
-                        HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
+                if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
+                        idlemode = HWMOD_IDLEMODE_NO;
+                } else {
+                        if (sf & SYSC_HAS_ENAWAKEUP)
+                                _enable_wakeup(oh, &v);
+                        if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
+                                idlemode = HWMOD_IDLEMODE_SMART_WKUP;
+                        else
+                                idlemode = HWMOD_IDLEMODE_SMART;
+                }
                 _set_master_standbymode(oh, idlemode, &v);
         }
 
@@ -840,8 +919,16 @@ static void _idle_sysc(struct omap_hwmod *oh)
         }
 
         if (sf & SYSC_HAS_MIDLEMODE) {
-                idlemode = (oh->flags & HWMOD_SWSUP_MSTANDBY) ?
-                        HWMOD_IDLEMODE_FORCE : HWMOD_IDLEMODE_SMART;
+                if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
+                        idlemode = HWMOD_IDLEMODE_FORCE;
+                } else {
+                        if (sf & SYSC_HAS_ENAWAKEUP)
+                                _enable_wakeup(oh, &v);
+                        if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
+                                idlemode = HWMOD_IDLEMODE_SMART_WKUP;
+                        else
+                                idlemode = HWMOD_IDLEMODE_SMART;
+                }
                 _set_master_standbymode(oh, idlemode, &v);
         }
 
@@ -928,6 +1015,8 @@ static int _init_clocks(struct omap_hwmod *oh, void *data)
 
         if (!ret)
                 oh->_state = _HWMOD_STATE_CLKS_INITED;
+        else
+                pr_warning("omap_hwmod: %s: cannot _init_clocks\n", oh->name);
 
         return ret;
 }
@@ -1224,6 +1313,8 @@ static int _enable(struct omap_hwmod *oh)
 {
         int r;
 
+        pr_debug("omap_hwmod: %s: enabling\n", oh->name);
+
         if (oh->_state != _HWMOD_STATE_INITIALIZED &&
             oh->_state != _HWMOD_STATE_IDLE &&
             oh->_state != _HWMOD_STATE_DISABLED) {
@@ -1232,17 +1323,6 @@ static int _enable(struct omap_hwmod *oh)
                 return -EINVAL;
         }
 
-        pr_debug("omap_hwmod: %s: enabling\n", oh->name);
-
-        /*
-         * If an IP contains only one HW reset line, then de-assert it in order
-         * to allow to enable the clocks. Otherwise the PRCM will return
-         * Intransition status, and the init will failed.
-         */
-        if ((oh->_state == _HWMOD_STATE_INITIALIZED ||
-             oh->_state == _HWMOD_STATE_DISABLED) && oh->rst_lines_cnt == 1)
-                _deassert_hardreset(oh, oh->rst_lines[0].name);
-
         /* Mux pins for device runtime if populated */
         if (oh->mux && (!oh->mux->enabled ||
                         ((oh->_state == _HWMOD_STATE_IDLE) &&
@@ -1252,20 +1332,31 @@ static int _enable(struct omap_hwmod *oh)
         _add_initiator_dep(oh, mpu_oh);
         _enable_clocks(oh);
 
-        r = _wait_target_ready(oh);
-        if (!r) {
-                oh->_state = _HWMOD_STATE_ENABLED;
+        /*
+         * If an IP contains only one HW reset line, then de-assert it in order
+         * to allow the module state transition. Otherwise the PRCM will return
+         * Intransition status, and the init will failed.
+         */
+        if ((oh->_state == _HWMOD_STATE_INITIALIZED ||
+             oh->_state == _HWMOD_STATE_DISABLED) && oh->rst_lines_cnt == 1)
+                _deassert_hardreset(oh, oh->rst_lines[0].name);
 
-                /* Access the sysconfig only if the target is ready */
-                if (oh->class->sysc) {
-                        if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED))
-                                _update_sysc_cache(oh);
-                        _enable_sysc(oh);
-                }
-        } else {
-                _disable_clocks(oh);
+        r = _wait_target_ready(oh);
+        if (r) {
                 pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n",
                          oh->name, r);
+                _disable_clocks(oh);
+
+                return r;
+        }
+
+        oh->_state = _HWMOD_STATE_ENABLED;
+
+        /* Access the sysconfig only if the target is ready */
+        if (oh->class->sysc) {
+                if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED))
+                        _update_sysc_cache(oh);
+                _enable_sysc(oh);
         }
 
         return r;
@@ -1281,14 +1372,14 @@ static int _enable(struct omap_hwmod *oh)
  */
 static int _idle(struct omap_hwmod *oh)
 {
+        pr_debug("omap_hwmod: %s: idling\n", oh->name);
+
         if (oh->_state != _HWMOD_STATE_ENABLED) {
                 WARN(1, "omap_hwmod: %s: idle state can only be entered from "
                      "enabled state\n", oh->name);
                 return -EINVAL;
         }
 
-        pr_debug("omap_hwmod: %s: idling\n", oh->name);
-
         if (oh->class->sysc)
                 _idle_sysc(oh);
         _del_initiator_dep(oh, mpu_oh);
@@ -1374,15 +1465,11 @@ static int _shutdown(struct omap_hwmod *oh)
                 }
         }
 
-        if (oh->class->sysc)
+        if (oh->class->sysc) {
+                if (oh->_state == _HWMOD_STATE_IDLE)
+                        _enable(oh);
                 _shutdown_sysc(oh);
-
-        /*
-         * If an IP contains only one HW reset line, then assert it
-         * before disabling the clocks and shutting down the IP.
-         */
-        if (oh->rst_lines_cnt == 1)
-                _assert_hardreset(oh, oh->rst_lines[0].name);
+        }
 
         /* clocks and deps are already disabled in idle */
         if (oh->_state == _HWMOD_STATE_ENABLED) {
@@ -1392,6 +1479,13 @@ static int _shutdown(struct omap_hwmod *oh)
         }
         /* XXX Should this code also force-disable the optional clocks? */
 
+        /*
+         * If an IP contains only one HW reset line, then assert it
+         * after disabling the clocks and before shutting down the IP.
+         */
+        if (oh->rst_lines_cnt == 1)
+                _assert_hardreset(oh, oh->rst_lines[0].name);
+
         /* Mux pins to safe mode or use populated off mode values */
         if (oh->mux)
                 omap_hwmod_mux(oh->mux, _HWMOD_STATE_DISABLED);
@@ -1685,9 +1779,6 @@ static int __init _populate_mpu_rt_base(struct omap_hwmod *oh, void *data)
                 return 0;
 
         oh->_mpu_rt_va = _find_mpu_rt_base(oh, oh->_mpu_port_index);
-        if (!oh->_mpu_rt_va)
-                pr_warning("omap_hwmod: %s found no _mpu_rt_va for %s\n",
-                                __func__, oh->name);
 
         return 0;
 }
@@ -1939,10 +2030,10 @@ int omap_hwmod_count_resources(struct omap_hwmod *oh)
 {
         int ret, i;
 
-        ret = oh->mpu_irqs_cnt + oh->sdma_reqs_cnt;
+        ret = _count_mpu_irqs(oh) + _count_sdma_reqs(oh);
 
         for (i = 0; i < oh->slaves_cnt; i++)
-                ret += oh->slaves[i]->addr_cnt;
+                ret += _count_ocp_if_addr_spaces(oh->slaves[i]);
 
         return ret;
 }
@@ -1959,12 +2050,13 @@ int omap_hwmod_count_resources(struct omap_hwmod *oh)
  */
 int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res)
 {
-        int i, j;
+        int i, j, mpu_irqs_cnt, sdma_reqs_cnt;
         int r = 0;
 
         /* For each IRQ, DMA, memory area, fill in array.*/
 
-        for (i = 0; i < oh->mpu_irqs_cnt; i++) {
+        mpu_irqs_cnt = _count_mpu_irqs(oh);
+        for (i = 0; i < mpu_irqs_cnt; i++) {
                 (res + r)->name = (oh->mpu_irqs + i)->name;
                 (res + r)->start = (oh->mpu_irqs + i)->irq;
                 (res + r)->end = (oh->mpu_irqs + i)->irq;
@@ -1972,7 +2064,8 @@ int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res)
                 r++;
         }
 
-        for (i = 0; i < oh->sdma_reqs_cnt; i++) {
+        sdma_reqs_cnt = _count_sdma_reqs(oh);
+        for (i = 0; i < sdma_reqs_cnt; i++) {
                 (res + r)->name = (oh->sdma_reqs + i)->name;
                 (res + r)->start = (oh->sdma_reqs + i)->dma_req;
                 (res + r)->end = (oh->sdma_reqs + i)->dma_req;
@@ -1982,10 +2075,12 @@ int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res)
 
         for (i = 0; i < oh->slaves_cnt; i++) {
                 struct omap_hwmod_ocp_if *os;
+                int addr_cnt;
 
                 os = oh->slaves[i];
+                addr_cnt = _count_ocp_if_addr_spaces(os);
 
-                for (j = 0; j < os->addr_cnt; j++) {
+                for (j = 0; j < addr_cnt; j++) {
                         (res + r)->name = (os->addr + j)->name;
                         (res + r)->start = (os->addr + j)->pa_start;
                         (res + r)->end = (os->addr + j)->pa_end;
diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
index c4d0ae87d62a..f3901abf2c28 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
@@ -1,7 +1,7 @@
 /*
  * omap_hwmod_2420_data.c - hardware modules present on the OMAP2420 chips
  *
- * Copyright (C) 2009-2010 Nokia Corporation
+ * Copyright (C) 2009-2011 Nokia Corporation
  * Paul Walmsley
  *
  * This program is free software; you can redistribute it and/or modify
@@ -114,38 +114,20 @@ static struct omap_hwmod omap2420_mcbsp1_hwmod;
 static struct omap_hwmod omap2420_mcbsp2_hwmod;
 
 /* l4 core -> mcspi1 interface */
-static struct omap_hwmod_addr_space omap2420_mcspi1_addr_space[] = {
-        {
-                .pa_start       = 0x48098000,
-                .pa_end         = 0x480980ff,
-                .flags          = ADDR_TYPE_RT,
-        },
-};
-
 static struct omap_hwmod_ocp_if omap2420_l4_core__mcspi1 = {
         .master         = &omap2420_l4_core_hwmod,
         .slave          = &omap2420_mcspi1_hwmod,
         .clk            = "mcspi1_ick",
-        .addr           = omap2420_mcspi1_addr_space,
-        .addr_cnt       = ARRAY_SIZE(omap2420_mcspi1_addr_space),
+        .addr           = omap2_mcspi1_addr_space,
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
 /* l4 core -> mcspi2 interface */
-static struct omap_hwmod_addr_space omap2420_mcspi2_addr_space[] = {
-        {
-                .pa_start       = 0x4809a000,
-                .pa_end         = 0x4809a0ff,
-                .flags          = ADDR_TYPE_RT,
-        },
-};
-
 static struct omap_hwmod_ocp_if omap2420_l4_core__mcspi2 = {
         .master         = &omap2420_l4_core_hwmod,
         .slave          = &omap2420_mcspi2_hwmod,
         .clk            = "mcspi2_ick",
-        .addr           = omap2420_mcspi2_addr_space,
-        .addr_cnt       = ARRAY_SIZE(omap2420_mcspi2_addr_space),
+        .addr           = omap2_mcspi2_addr_space,
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -157,95 +139,47 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__l4_wkup = {
 };
 
 /* L4 CORE -> UART1 interface */
-static struct omap_hwmod_addr_space omap2420_uart1_addr_space[] = {
-        {
-                .pa_start       = OMAP2_UART1_BASE,
-                .pa_end         = OMAP2_UART1_BASE + SZ_8K - 1,
-                .flags          = ADDR_MAP_ON_INIT | ADDR_TYPE_RT,
-        },
-};
-
 static struct omap_hwmod_ocp_if omap2_l4_core__uart1 = {
         .master         = &omap2420_l4_core_hwmod,
         .slave          = &omap2420_uart1_hwmod,
         .clk            = "uart1_ick",
-        .addr           = omap2420_uart1_addr_space,
-        .addr_cnt       = ARRAY_SIZE(omap2420_uart1_addr_space),
+        .addr           = omap2xxx_uart1_addr_space,
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
 /* L4 CORE -> UART2 interface */
-static struct omap_hwmod_addr_space omap2420_uart2_addr_space[] = {
-        {
-                .pa_start       = OMAP2_UART2_BASE,
-                .pa_end         = OMAP2_UART2_BASE + SZ_1K - 1,
-                .flags          = ADDR_MAP_ON_INIT | ADDR_TYPE_RT,
-        },
-};
-
 static struct omap_hwmod_ocp_if omap2_l4_core__uart2 = {
         .master         = &omap2420_l4_core_hwmod,
         .slave          = &omap2420_uart2_hwmod,
         .clk            = "uart2_ick",
-        .addr           = omap2420_uart2_addr_space,
-        .addr_cnt       = ARRAY_SIZE(omap2420_uart2_addr_space),
+        .addr           = omap2xxx_uart2_addr_space,
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
 /* L4 PER -> UART3 interface */
-static struct omap_hwmod_addr_space omap2420_uart3_addr_space[] = {
-        {
-                .pa_start       = OMAP2_UART3_BASE,
-                .pa_end         = OMAP2_UART3_BASE + SZ_1K - 1,
-                .flags          = ADDR_MAP_ON_INIT | ADDR_TYPE_RT,
-        },
-};
-
 static struct omap_hwmod_ocp_if omap2_l4_core__uart3 = {
         .master         = &omap2420_l4_core_hwmod,
         .slave          = &omap2420_uart3_hwmod,
         .clk            = "uart3_ick",
-        .addr           = omap2420_uart3_addr_space,
-        .addr_cnt       = ARRAY_SIZE(omap2420_uart3_addr_space),
+        .addr           = omap2xxx_uart3_addr_space,
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
-/* I2C IP block address space length (in bytes) */
-#define OMAP2_I2C_AS_LEN                128
-
 /* L4 CORE -> I2C1 interface */
-static struct omap_hwmod_addr_space omap2420_i2c1_addr_space[] = {
-        {
-                .pa_start       = 0x48070000,
-                .pa_end         = 0x48070000 + OMAP2_I2C_AS_LEN - 1,
-                .flags          = ADDR_TYPE_RT,
-        },
-};
-
 static struct omap_hwmod_ocp_if omap2420_l4_core__i2c1 = {
         .master         = &omap2420_l4_core_hwmod,
         .slave          = &omap2420_i2c1_hwmod,
         .clk            = "i2c1_ick",
-        .addr           = omap2420_i2c1_addr_space,
-        .addr_cnt       = ARRAY_SIZE(omap2420_i2c1_addr_space),
+        .addr           = omap2_i2c1_addr_space,
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
 /* L4 CORE -> I2C2 interface */
-static struct omap_hwmod_addr_space omap2420_i2c2_addr_space[] = {
-        {
-                .pa_start       = 0x48072000,
-                .pa_end         = 0x48072000 + OMAP2_I2C_AS_LEN - 1,
-                .flags          = ADDR_TYPE_RT,
-        },
-};
-
 static struct omap_hwmod_ocp_if omap2420_l4_core__i2c2 = {
         .master         = &omap2420_l4_core_hwmod,
         .slave          = &omap2420_i2c2_hwmod,
         .clk            = "i2c2_ick",
-        .addr           = omap2420_i2c2_addr_space,
-        .addr_cnt       = ARRAY_SIZE(omap2420_i2c2_addr_space),
+        .addr           = omap2_i2c2_addr_space,
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -340,29 +274,8 @@ static struct omap_hwmod omap2420_iva_hwmod = {
         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2420)
 };
 
-/* Timer Common */
-static struct omap_hwmod_class_sysconfig omap2420_timer_sysc = {
-        .rev_offs       = 0x0000,
-        .sysc_offs      = 0x0010,
-        .syss_offs      = 0x0014,
-        .sysc_flags     = (SYSC_HAS_SIDLEMODE | SYSC_HAS_CLOCKACTIVITY |
-                           SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET |
-                           SYSC_HAS_AUTOIDLE),
-        .idlemodes      = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
-        .sysc_fields    = &omap_hwmod_sysc_type1,
-};
-
-static struct omap_hwmod_class omap2420_timer_hwmod_class = {
-        .name = "timer",
-        .sysc = &omap2420_timer_sysc,
-        .rev = OMAP_TIMER_IP_VERSION_1,
-};
-
 /* timer1 */
 static struct omap_hwmod omap2420_timer1_hwmod;
-static struct omap_hwmod_irq_info omap2420_timer1_mpu_irqs[] = {
-        { .irq = 37, },
-};
 
 static struct omap_hwmod_addr_space omap2420_timer1_addrs[] = {
         {
@@ -370,6 +283,7 @@ static struct omap_hwmod_addr_space omap2420_timer1_addrs[] = {
                 .pa_end         = 0x48028000 + SZ_1K - 1,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* l4_wkup -> timer1 */
@@ -378,7 +292,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_wkup__timer1 = {
         .slave          = &omap2420_timer1_hwmod,
         .clk            = "gpt1_ick",
         .addr           = omap2420_timer1_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap2420_timer1_addrs),
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -390,8 +303,7 @@ static struct omap_hwmod_ocp_if *omap2420_timer1_slaves[] = {
 /* timer1 hwmod */
 static struct omap_hwmod omap2420_timer1_hwmod = {
         .name           = "timer1",
-        .mpu_irqs       = omap2420_timer1_mpu_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap2420_timer1_mpu_irqs),
+        .mpu_irqs       = omap2_timer1_mpu_irqs,
         .main_clk       = "gpt1_fck",
         .prcm           = {
                 .omap2 = {
@@ -404,31 +316,19 @@ static struct omap_hwmod omap2420_timer1_hwmod = {
         },
         .slaves         = omap2420_timer1_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2420_timer1_slaves),
-        .class          = &omap2420_timer_hwmod_class,
+        .class          = &omap2xxx_timer_hwmod_class,
         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2420)
 };
 
 /* timer2 */
 static struct omap_hwmod omap2420_timer2_hwmod;
-static struct omap_hwmod_irq_info omap2420_timer2_mpu_irqs[] = {
-        { .irq = 38, },
-};
-
-static struct omap_hwmod_addr_space omap2420_timer2_addrs[] = {
-        {
-                .pa_start       = 0x4802a000,
-                .pa_end         = 0x4802a000 + SZ_1K - 1,
-                .flags          = ADDR_TYPE_RT
-        },
-};
 
 /* l4_core -> timer2 */
 static struct omap_hwmod_ocp_if omap2420_l4_core__timer2 = {
         .master         = &omap2420_l4_core_hwmod,
         .slave          = &omap2420_timer2_hwmod,
         .clk            = "gpt2_ick",
-        .addr           = omap2420_timer2_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap2420_timer2_addrs),
+        .addr           = omap2xxx_timer2_addrs,
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -440,8 +340,7 @@ static struct omap_hwmod_ocp_if *omap2420_timer2_slaves[] = {
 /* timer2 hwmod */
 static struct omap_hwmod omap2420_timer2_hwmod = {
         .name           = "timer2",
-        .mpu_irqs       = omap2420_timer2_mpu_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap2420_timer2_mpu_irqs),
+        .mpu_irqs       = omap2_timer2_mpu_irqs,
         .main_clk       = "gpt2_fck",
         .prcm           = {
                 .omap2 = {
@@ -454,31 +353,19 @@ static struct omap_hwmod omap2420_timer2_hwmod = {
         },
         .slaves         = omap2420_timer2_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2420_timer2_slaves),
-        .class          = &omap2420_timer_hwmod_class,
+        .class          = &omap2xxx_timer_hwmod_class,
         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2420)
 };
 
 /* timer3 */
 static struct omap_hwmod omap2420_timer3_hwmod;
-static struct omap_hwmod_irq_info omap2420_timer3_mpu_irqs[] = {
-        { .irq = 39, },
-};
-
-static struct omap_hwmod_addr_space omap2420_timer3_addrs[] = {
-        {
-                .pa_start       = 0x48078000,
-                .pa_end         = 0x48078000 + SZ_1K - 1,
-                .flags          = ADDR_TYPE_RT
-        },
-};
 
 /* l4_core -> timer3 */
 static struct omap_hwmod_ocp_if omap2420_l4_core__timer3 = {
         .master         = &omap2420_l4_core_hwmod,
         .slave          = &omap2420_timer3_hwmod,
         .clk            = "gpt3_ick",
-        .addr           = omap2420_timer3_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap2420_timer3_addrs),
+        .addr           = omap2xxx_timer3_addrs,
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -490,8 +377,7 @@ static struct omap_hwmod_ocp_if *omap2420_timer3_slaves[] = {
 /* timer3 hwmod */
 static struct omap_hwmod omap2420_timer3_hwmod = {
         .name           = "timer3",
-        .mpu_irqs       = omap2420_timer3_mpu_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap2420_timer3_mpu_irqs),
+        .mpu_irqs       = omap2_timer3_mpu_irqs,
         .main_clk       = "gpt3_fck",
         .prcm           = {
                 .omap2 = {
@@ -504,31 +390,19 @@ static struct omap_hwmod omap2420_timer3_hwmod = {
         },
         .slaves         = omap2420_timer3_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2420_timer3_slaves),
-        .class          = &omap2420_timer_hwmod_class,
+        .class          = &omap2xxx_timer_hwmod_class,
         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2420)
 };
 
 /* timer4 */
 static struct omap_hwmod omap2420_timer4_hwmod;
-static struct omap_hwmod_irq_info omap2420_timer4_mpu_irqs[] = {
-        { .irq = 40, },
-};
-
-static struct omap_hwmod_addr_space omap2420_timer4_addrs[] = {
-        {
-                .pa_start       = 0x4807a000,
-                .pa_end         = 0x4807a000 + SZ_1K - 1,
-                .flags          = ADDR_TYPE_RT
-        },
-};
 
 /* l4_core -> timer4 */
 static struct omap_hwmod_ocp_if omap2420_l4_core__timer4 = {
         .master         = &omap2420_l4_core_hwmod,
         .slave          = &omap2420_timer4_hwmod,
         .clk            = "gpt4_ick",
-        .addr           = omap2420_timer4_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap2420_timer4_addrs),
+        .addr           = omap2xxx_timer4_addrs,
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -540,8 +414,7 @@ static struct omap_hwmod_ocp_if *omap2420_timer4_slaves[] = {
 /* timer4 hwmod */
 static struct omap_hwmod omap2420_timer4_hwmod = {
         .name           = "timer4",
-        .mpu_irqs       = omap2420_timer4_mpu_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap2420_timer4_mpu_irqs),
+        .mpu_irqs       = omap2_timer4_mpu_irqs,
         .main_clk       = "gpt4_fck",
         .prcm           = {
                 .omap2 = {
@@ -554,31 +427,19 @@ static struct omap_hwmod omap2420_timer4_hwmod = {
         },
         .slaves         = omap2420_timer4_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2420_timer4_slaves),
-        .class          = &omap2420_timer_hwmod_class,
+        .class          = &omap2xxx_timer_hwmod_class,
         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2420)
 };
 
 /* timer5 */
 static struct omap_hwmod omap2420_timer5_hwmod;
-static struct omap_hwmod_irq_info omap2420_timer5_mpu_irqs[] = {
-        { .irq = 41, },
-};
-
-static struct omap_hwmod_addr_space omap2420_timer5_addrs[] = {
-        {
-                .pa_start       = 0x4807c000,
-                .pa_end         = 0x4807c000 + SZ_1K - 1,
-                .flags          = ADDR_TYPE_RT
-        },
-};
 
 /* l4_core -> timer5 */
 static struct omap_hwmod_ocp_if omap2420_l4_core__timer5 = {
         .master         = &omap2420_l4_core_hwmod,
         .slave          = &omap2420_timer5_hwmod,
         .clk            = "gpt5_ick",
-        .addr           = omap2420_timer5_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap2420_timer5_addrs),
+        .addr           = omap2xxx_timer5_addrs,
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -590,8 +451,7 @@ static struct omap_hwmod_ocp_if *omap2420_timer5_slaves[] = {
 /* timer5 hwmod */
 static struct omap_hwmod omap2420_timer5_hwmod = {
         .name           = "timer5",
-        .mpu_irqs       = omap2420_timer5_mpu_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap2420_timer5_mpu_irqs),
+        .mpu_irqs       = omap2_timer5_mpu_irqs,
         .main_clk       = "gpt5_fck",
         .prcm           = {
                 .omap2 = {
@@ -604,32 +464,20 @@ static struct omap_hwmod omap2420_timer5_hwmod = {
         },
         .slaves         = omap2420_timer5_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2420_timer5_slaves),
-        .class          = &omap2420_timer_hwmod_class,
+        .class          = &omap2xxx_timer_hwmod_class,
         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2420)
 };
 
 
 /* timer6 */
 static struct omap_hwmod omap2420_timer6_hwmod;
-static struct omap_hwmod_irq_info omap2420_timer6_mpu_irqs[] = {
-        { .irq = 42, },
-};
-
-static struct omap_hwmod_addr_space omap2420_timer6_addrs[] = {
-        {
-                .pa_start       = 0x4807e000,
-                .pa_end         = 0x4807e000 + SZ_1K - 1,
-                .flags          = ADDR_TYPE_RT
-        },
-};
 
 /* l4_core -> timer6 */
 static struct omap_hwmod_ocp_if omap2420_l4_core__timer6 = {
         .master         = &omap2420_l4_core_hwmod,
         .slave          = &omap2420_timer6_hwmod,
         .clk            = "gpt6_ick",
-        .addr           = omap2420_timer6_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap2420_timer6_addrs),
+        .addr           = omap2xxx_timer6_addrs,
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -641,8 +489,7 @@ static struct omap_hwmod_ocp_if *omap2420_timer6_slaves[] = {
 /* timer6 hwmod */
 static struct omap_hwmod omap2420_timer6_hwmod = {
         .name           = "timer6",
-        .mpu_irqs       = omap2420_timer6_mpu_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap2420_timer6_mpu_irqs),
+        .mpu_irqs       = omap2_timer6_mpu_irqs,
         .main_clk       = "gpt6_fck",
         .prcm           = {
                 .omap2 = {
@@ -655,31 +502,19 @@ static struct omap_hwmod omap2420_timer6_hwmod = {
         },
         .slaves         = omap2420_timer6_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2420_timer6_slaves),
-        .class          = &omap2420_timer_hwmod_class,
+        .class          = &omap2xxx_timer_hwmod_class,
         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2420)
 };
 
 /* timer7 */
 static struct omap_hwmod omap2420_timer7_hwmod;
-static struct omap_hwmod_irq_info omap2420_timer7_mpu_irqs[] = {
-        { .irq = 43, },
-};
-
-static struct omap_hwmod_addr_space omap2420_timer7_addrs[] = {
-        {
-                .pa_start       = 0x48080000,
-                .pa_end         = 0x48080000 + SZ_1K - 1,
-                .flags          = ADDR_TYPE_RT
-        },
-};
 
 /* l4_core -> timer7 */
 static struct omap_hwmod_ocp_if omap2420_l4_core__timer7 = {
         .master         = &omap2420_l4_core_hwmod,
         .slave          = &omap2420_timer7_hwmod,
         .clk            = "gpt7_ick",
-        .addr           = omap2420_timer7_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap2420_timer7_addrs),
+        .addr           = omap2xxx_timer7_addrs,
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -691,8 +526,7 @@ static struct omap_hwmod_ocp_if *omap2420_timer7_slaves[] = {
 /* timer7 hwmod */
 static struct omap_hwmod omap2420_timer7_hwmod = {
         .name           = "timer7",
-        .mpu_irqs       = omap2420_timer7_mpu_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap2420_timer7_mpu_irqs),
+        .mpu_irqs       = omap2_timer7_mpu_irqs,
         .main_clk       = "gpt7_fck",
         .prcm           = {
                 .omap2 = {
@@ -705,31 +539,19 @@ static struct omap_hwmod omap2420_timer7_hwmod = {
         },
         .slaves         = omap2420_timer7_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2420_timer7_slaves),
-        .class          = &omap2420_timer_hwmod_class,
+        .class          = &omap2xxx_timer_hwmod_class,
         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2420)
 };
 
 /* timer8 */
 static struct omap_hwmod omap2420_timer8_hwmod;
-static struct omap_hwmod_irq_info omap2420_timer8_mpu_irqs[] = {
-        { .irq = 44, },
-};
-
-static struct omap_hwmod_addr_space omap2420_timer8_addrs[] = {
-        {
-                .pa_start       = 0x48082000,
-                .pa_end         = 0x48082000 + SZ_1K - 1,
-                .flags          = ADDR_TYPE_RT
-        },
-};
 
 /* l4_core -> timer8 */
 static struct omap_hwmod_ocp_if omap2420_l4_core__timer8 = {
         .master         = &omap2420_l4_core_hwmod,
         .slave          = &omap2420_timer8_hwmod,
         .clk            = "gpt8_ick",
-        .addr           = omap2420_timer8_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap2420_timer8_addrs),
+        .addr           = omap2xxx_timer8_addrs,
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -741,8 +563,7 @@ static struct omap_hwmod_ocp_if *omap2420_timer8_slaves[] = {
 /* timer8 hwmod */
 static struct omap_hwmod omap2420_timer8_hwmod = {
         .name           = "timer8",
-        .mpu_irqs       = omap2420_timer8_mpu_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap2420_timer8_mpu_irqs),
+        .mpu_irqs       = omap2_timer8_mpu_irqs,
         .main_clk       = "gpt8_fck",
         .prcm           = {
                 .omap2 = {
@@ -755,31 +576,19 @@ static struct omap_hwmod omap2420_timer8_hwmod = {
         },
         .slaves         = omap2420_timer8_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2420_timer8_slaves),
-        .class          = &omap2420_timer_hwmod_class,
+        .class          = &omap2xxx_timer_hwmod_class,
         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2420)
 };
 
 /* timer9 */
 static struct omap_hwmod omap2420_timer9_hwmod;
-static struct omap_hwmod_irq_info omap2420_timer9_mpu_irqs[] = {
-        { .irq = 45, },
-};
-
-static struct omap_hwmod_addr_space omap2420_timer9_addrs[] = {
-        {
-                .pa_start       = 0x48084000,
-                .pa_end         = 0x48084000 + SZ_1K - 1,
-                .flags          = ADDR_TYPE_RT
-        },
-};
 
 /* l4_core -> timer9 */
 static struct omap_hwmod_ocp_if omap2420_l4_core__timer9 = {
         .master         = &omap2420_l4_core_hwmod,
         .slave          = &omap2420_timer9_hwmod,
         .clk            = "gpt9_ick",
-        .addr           = omap2420_timer9_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap2420_timer9_addrs),
+        .addr           = omap2xxx_timer9_addrs,
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -791,8 +600,7 @@ static struct omap_hwmod_ocp_if *omap2420_timer9_slaves[] = {
 /* timer9 hwmod */
 static struct omap_hwmod omap2420_timer9_hwmod = {
         .name           = "timer9",
-        .mpu_irqs       = omap2420_timer9_mpu_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap2420_timer9_mpu_irqs),
+        .mpu_irqs       = omap2_timer9_mpu_irqs,
         .main_clk       = "gpt9_fck",
         .prcm           = {
                 .omap2 = {
@@ -805,31 +613,19 @@ static struct omap_hwmod omap2420_timer9_hwmod = {
         },
         .slaves         = omap2420_timer9_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2420_timer9_slaves),
-        .class          = &omap2420_timer_hwmod_class,
+        .class          = &omap2xxx_timer_hwmod_class,
         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2420)
 };
 
 /* timer10 */
 static struct omap_hwmod omap2420_timer10_hwmod;
-static struct omap_hwmod_irq_info omap2420_timer10_mpu_irqs[] = {
-        { .irq = 46, },
-};
-
-static struct omap_hwmod_addr_space omap2420_timer10_addrs[] = {
-        {
-                .pa_start       = 0x48086000,
-                .pa_end         = 0x48086000 + SZ_1K - 1,
-                .flags          = ADDR_TYPE_RT
-        },
-};
 
 /* l4_core -> timer10 */
 static struct omap_hwmod_ocp_if omap2420_l4_core__timer10 = {
         .master         = &omap2420_l4_core_hwmod,
         .slave          = &omap2420_timer10_hwmod,
         .clk            = "gpt10_ick",
-        .addr           = omap2420_timer10_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap2420_timer10_addrs),
+        .addr           = omap2_timer10_addrs,
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -841,8 +637,7 @@ static struct omap_hwmod_ocp_if *omap2420_timer10_slaves[] = {
 /* timer10 hwmod */
 static struct omap_hwmod omap2420_timer10_hwmod = {
         .name           = "timer10",
-        .mpu_irqs       = omap2420_timer10_mpu_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap2420_timer10_mpu_irqs),
+        .mpu_irqs       = omap2_timer10_mpu_irqs,
         .main_clk       = "gpt10_fck",
         .prcm           = {
                 .omap2 = {
@@ -855,31 +650,19 @@ static struct omap_hwmod omap2420_timer10_hwmod = {
         },
         .slaves         = omap2420_timer10_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2420_timer10_slaves),
-        .class          = &omap2420_timer_hwmod_class,
+        .class          = &omap2xxx_timer_hwmod_class,
         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2420)
 };
 
 /* timer11 */
 static struct omap_hwmod omap2420_timer11_hwmod;
-static struct omap_hwmod_irq_info omap2420_timer11_mpu_irqs[] = {
-        { .irq = 47, },
-};
-
-static struct omap_hwmod_addr_space omap2420_timer11_addrs[] = {
-        {
-                .pa_start       = 0x48088000,
-                .pa_end         = 0x48088000 + SZ_1K - 1,
-                .flags          = ADDR_TYPE_RT
-        },
-};
 
 /* l4_core -> timer11 */
 static struct omap_hwmod_ocp_if omap2420_l4_core__timer11 = {
         .master         = &omap2420_l4_core_hwmod,
         .slave          = &omap2420_timer11_hwmod,
         .clk            = "gpt11_ick",
-        .addr           = omap2420_timer11_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap2420_timer11_addrs),
+        .addr           = omap2_timer11_addrs,
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -891,8 +674,7 @@ static struct omap_hwmod_ocp_if *omap2420_timer11_slaves[] = {
 /* timer11 hwmod */
 static struct omap_hwmod omap2420_timer11_hwmod = {
         .name           = "timer11",
-        .mpu_irqs       = omap2420_timer11_mpu_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap2420_timer11_mpu_irqs),
+        .mpu_irqs       = omap2_timer11_mpu_irqs,
         .main_clk       = "gpt11_fck",
         .prcm           = {
                 .omap2 = {
@@ -905,31 +687,19 @@ static struct omap_hwmod omap2420_timer11_hwmod = {
         },
         .slaves         = omap2420_timer11_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2420_timer11_slaves),
-        .class          = &omap2420_timer_hwmod_class,
+        .class          = &omap2xxx_timer_hwmod_class,
         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2420)
 };
 
 /* timer12 */
 static struct omap_hwmod omap2420_timer12_hwmod;
-static struct omap_hwmod_irq_info omap2420_timer12_mpu_irqs[] = {
-        { .irq = 48, },
-};
-
-static struct omap_hwmod_addr_space omap2420_timer12_addrs[] = {
-        {
-                .pa_start       = 0x4808a000,
-                .pa_end         = 0x4808a000 + SZ_1K - 1,
-                .flags          = ADDR_TYPE_RT
-        },
-};
 
 /* l4_core -> timer12 */
 static struct omap_hwmod_ocp_if omap2420_l4_core__timer12 = {
         .master         = &omap2420_l4_core_hwmod,
         .slave          = &omap2420_timer12_hwmod,
         .clk            = "gpt12_ick",
-        .addr           = omap2420_timer12_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap2420_timer12_addrs),
+        .addr           = omap2xxx_timer12_addrs,
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -941,8 +711,7 @@ static struct omap_hwmod_ocp_if *omap2420_timer12_slaves[] = {
 /* timer12 hwmod */
 static struct omap_hwmod omap2420_timer12_hwmod = {
         .name           = "timer12",
-        .mpu_irqs       = omap2420_timer12_mpu_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap2420_timer12_mpu_irqs),
+        .mpu_irqs       = omap2xxx_timer12_mpu_irqs,
         .main_clk       = "gpt12_fck",
         .prcm           = {
                 .omap2 = {
@@ -955,7 +724,7 @@ static struct omap_hwmod omap2420_timer12_hwmod = {
         },
         .slaves         = omap2420_timer12_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2420_timer12_slaves),
-        .class          = &omap2420_timer_hwmod_class,
+        .class          = &omap2xxx_timer_hwmod_class,
         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2420)
 };
 
@@ -966,6 +735,7 @@ static struct omap_hwmod_addr_space omap2420_wd_timer2_addrs[] = {
                 .pa_end         = 0x4802207f,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 static struct omap_hwmod_ocp_if omap2420_l4_wkup__wd_timer2 = {
@@ -973,31 +743,9 @@ static struct omap_hwmod_ocp_if omap2420_l4_wkup__wd_timer2 = {
         .slave          = &omap2420_wd_timer2_hwmod,
         .clk            = "mpu_wdt_ick",
         .addr           = omap2420_wd_timer2_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap2420_wd_timer2_addrs),
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
-/*
- * 'wd_timer' class
- * 32-bit watchdog upward counter that generates a pulse on the reset pin on
- * overflow condition
- */
-
-static struct omap_hwmod_class_sysconfig omap2420_wd_timer_sysc = {
-        .rev_offs       = 0x0000,
-        .sysc_offs      = 0x0010,
-        .syss_offs      = 0x0014,
-        .sysc_flags     = (SYSC_HAS_EMUFREE | SYSC_HAS_SOFTRESET |
-                           SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS),
-        .sysc_fields    = &omap_hwmod_sysc_type1,
-};
-
-static struct omap_hwmod_class omap2420_wd_timer_hwmod_class = {
-        .name           = "wd_timer",
-        .sysc           = &omap2420_wd_timer_sysc,
-        .pre_shutdown   = &omap2_wd_timer_disable
-};
-
 /* wd_timer2 */
 static struct omap_hwmod_ocp_if *omap2420_wd_timer2_slaves[] = {
         &omap2420_l4_wkup__wd_timer2,
@@ -1005,7 +753,7 @@ static struct omap_hwmod_ocp_if *omap2420_wd_timer2_slaves[] = {
 
 static struct omap_hwmod omap2420_wd_timer2_hwmod = {
         .name           = "wd_timer2",
-        .class          = &omap2420_wd_timer_hwmod_class,
+        .class          = &omap2xxx_wd_timer_hwmod_class,
         .main_clk       = "mpu_wdt_fck",
         .prcm           = {
                 .omap2 = {
@@ -1021,45 +769,16 @@ static struct omap_hwmod omap2420_wd_timer2_hwmod = {
         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
 };
 
-/* UART */
-
-static struct omap_hwmod_class_sysconfig uart_sysc = {
-        .rev_offs       = 0x50,
-        .sysc_offs      = 0x54,
-        .syss_offs      = 0x58,
-        .sysc_flags     = (SYSC_HAS_SIDLEMODE |
-                           SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET |
-                           SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS),
-        .idlemodes      = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
-        .sysc_fields    = &omap_hwmod_sysc_type1,
-};
-
-static struct omap_hwmod_class uart_class = {
-        .name = "uart",
-        .sysc = &uart_sysc,
-};
-
 /* UART1 */
 
-static struct omap_hwmod_irq_info uart1_mpu_irqs[] = {
-        { .irq = INT_24XX_UART1_IRQ, },
-};
-
-static struct omap_hwmod_dma_info uart1_sdma_reqs[] = {
-        { .name = "rx", .dma_req = OMAP24XX_DMA_UART1_RX, },
-        { .name = "tx", .dma_req = OMAP24XX_DMA_UART1_TX, },
-};
-
 static struct omap_hwmod_ocp_if *omap2420_uart1_slaves[] = {
         &omap2_l4_core__uart1,
 };
 
 static struct omap_hwmod omap2420_uart1_hwmod = {
         .name           = "uart1",
-        .mpu_irqs       = uart1_mpu_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(uart1_mpu_irqs),
-        .sdma_reqs      = uart1_sdma_reqs,
-        .sdma_reqs_cnt  = ARRAY_SIZE(uart1_sdma_reqs),
+        .mpu_irqs       = omap2_uart1_mpu_irqs,
+        .sdma_reqs      = omap2_uart1_sdma_reqs,
         .main_clk       = "uart1_fck",
         .prcm           = {
                 .omap2 = {
@@ -1072,31 +791,20 @@ static struct omap_hwmod omap2420_uart1_hwmod = {
         },
         .slaves         = omap2420_uart1_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2420_uart1_slaves),
-        .class          = &uart_class,
+        .class          = &omap2_uart_class,
         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
 };
 
 /* UART2 */
 
-static struct omap_hwmod_irq_info uart2_mpu_irqs[] = {
-        { .irq = INT_24XX_UART2_IRQ, },
-};
-
-static struct omap_hwmod_dma_info uart2_sdma_reqs[] = {
-        { .name = "rx", .dma_req = OMAP24XX_DMA_UART2_RX, },
-        { .name = "tx", .dma_req = OMAP24XX_DMA_UART2_TX, },
-};
-
 static struct omap_hwmod_ocp_if *omap2420_uart2_slaves[] = {
         &omap2_l4_core__uart2,
 };
 
 static struct omap_hwmod omap2420_uart2_hwmod = {
         .name           = "uart2",
-        .mpu_irqs       = uart2_mpu_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(uart2_mpu_irqs),
-        .sdma_reqs      = uart2_sdma_reqs,
-        .sdma_reqs_cnt  = ARRAY_SIZE(uart2_sdma_reqs),
+        .mpu_irqs       = omap2_uart2_mpu_irqs,
+        .sdma_reqs      = omap2_uart2_sdma_reqs,
         .main_clk       = "uart2_fck",
         .prcm           = {
                 .omap2 = {
@@ -1109,31 +817,20 @@ static struct omap_hwmod omap2420_uart2_hwmod = {
         },
         .slaves         = omap2420_uart2_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2420_uart2_slaves),
-        .class          = &uart_class,
+        .class          = &omap2_uart_class,
         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
 };
 
 /* UART3 */
 
-static struct omap_hwmod_irq_info uart3_mpu_irqs[] = {
-        { .irq = INT_24XX_UART3_IRQ, },
-};
-
-static struct omap_hwmod_dma_info uart3_sdma_reqs[] = {
-        { .name = "rx", .dma_req = OMAP24XX_DMA_UART3_RX, },
-        { .name = "tx", .dma_req = OMAP24XX_DMA_UART3_TX, },
-};
-
 static struct omap_hwmod_ocp_if *omap2420_uart3_slaves[] = {
         &omap2_l4_core__uart3,
 };
 
 static struct omap_hwmod omap2420_uart3_hwmod = {
         .name           = "uart3",
-        .mpu_irqs       = uart3_mpu_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(uart3_mpu_irqs),
-        .sdma_reqs      = uart3_sdma_reqs,
-        .sdma_reqs_cnt  = ARRAY_SIZE(uart3_sdma_reqs),
+        .mpu_irqs       = omap2_uart3_mpu_irqs,
+        .sdma_reqs      = omap2_uart3_sdma_reqs,
         .main_clk       = "uart3_fck",
         .prcm           = {
                 .omap2 = {
@@ -1146,53 +843,22 @@ static struct omap_hwmod omap2420_uart3_hwmod = {
         },
         .slaves         = omap2420_uart3_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2420_uart3_slaves),
-        .class          = &uart_class,
+        .class          = &omap2_uart_class,
         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
 };
 
-/*
- * 'dss' class
- * display sub-system
- */
-
-static struct omap_hwmod_class_sysconfig omap2420_dss_sysc = {
-        .rev_offs       = 0x0000,
-        .sysc_offs      = 0x0010,
-        .syss_offs      = 0x0014,
-        .sysc_flags     = (SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE),
-        .sysc_fields    = &omap_hwmod_sysc_type1,
-};
-
-static struct omap_hwmod_class omap2420_dss_hwmod_class = {
-        .name = "dss",
-        .sysc = &omap2420_dss_sysc,
-};
-
-static struct omap_hwmod_dma_info omap2420_dss_sdma_chs[] = {
-        { .name = "dispc", .dma_req = 5 },
-};
-
 /* dss */
 /* dss master ports */
 static struct omap_hwmod_ocp_if *omap2420_dss_masters[] = {
         &omap2420_dss__l3,
 };
 
-static struct omap_hwmod_addr_space omap2420_dss_addrs[] = {
-        {
-                .pa_start       = 0x48050000,
-                .pa_end         = 0x480503FF,
-                .flags          = ADDR_TYPE_RT
-        },
-};
-
 /* l4_core -> dss */
 static struct omap_hwmod_ocp_if omap2420_l4_core__dss = {
         .master         = &omap2420_l4_core_hwmod,
         .slave          = &omap2420_dss_core_hwmod,
         .clk            = "dss_ick",
-        .addr           = omap2420_dss_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap2420_dss_addrs),
+        .addr           = omap2_dss_addrs,
         .fw = {
                 .omap2 = {
                         .l4_fw_region  = OMAP2420_L4_CORE_FW_DSS_CORE_REGION,
@@ -1214,10 +880,9 @@ static struct omap_hwmod_opt_clk dss_opt_clks[] = {
 
 static struct omap_hwmod omap2420_dss_core_hwmod = {
         .name           = "dss_core",
-        .class          = &omap2420_dss_hwmod_class,
+        .class          = &omap2_dss_hwmod_class,
         .main_clk       = "dss1_fck", /* instead of dss_fck */
-        .sdma_reqs      = omap2420_dss_sdma_chs,
-        .sdma_reqs_cnt  = ARRAY_SIZE(omap2420_dss_sdma_chs),
+        .sdma_reqs      = omap2xxx_dss_sdma_chs,
         .prcm           = {
                 .omap2 = {
                         .prcm_reg_id = 1,
@@ -1237,46 +902,12 @@ static struct omap_hwmod omap2420_dss_core_hwmod = {
         .flags          = HWMOD_NO_IDLEST,
 };
 
-/*
- * 'dispc' class
- * display controller
- */
-
-static struct omap_hwmod_class_sysconfig omap2420_dispc_sysc = {
-        .rev_offs       = 0x0000,
-        .sysc_offs      = 0x0010,
-        .syss_offs      = 0x0014,
-        .sysc_flags     = (SYSC_HAS_SIDLEMODE | SYSC_HAS_MIDLEMODE |
-                           SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE),
-        .idlemodes      = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
-                           MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART),
-        .sysc_fields    = &omap_hwmod_sysc_type1,
-};
-
-static struct omap_hwmod_class omap2420_dispc_hwmod_class = {
-        .name = "dispc",
-        .sysc = &omap2420_dispc_sysc,
-};
-
-static struct omap_hwmod_irq_info omap2420_dispc_irqs[] = {
-        { .irq = 25 },
-};
-
-static struct omap_hwmod_addr_space omap2420_dss_dispc_addrs[] = {
-        {
-                .pa_start       = 0x48050400,
-                .pa_end         = 0x480507FF,
-                .flags          = ADDR_TYPE_RT
-        },
-};
-
 /* l4_core -> dss_dispc */
 static struct omap_hwmod_ocp_if omap2420_l4_core__dss_dispc = {
         .master         = &omap2420_l4_core_hwmod,
         .slave          = &omap2420_dss_dispc_hwmod,
         .clk            = "dss_ick",
-        .addr           = omap2420_dss_dispc_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap2420_dss_dispc_addrs),
+        .addr           = omap2_dss_dispc_addrs,
         .fw = {
                 .omap2 = {
                         .l4_fw_region  = OMAP2420_L4_CORE_FW_DSS_DISPC_REGION,
@@ -1293,9 +924,8 @@ static struct omap_hwmod_ocp_if *omap2420_dss_dispc_slaves[] = {
 
 static struct omap_hwmod omap2420_dss_dispc_hwmod = {
         .name           = "dss_dispc",
-        .class          = &omap2420_dispc_hwmod_class,
-        .mpu_irqs       = omap2420_dispc_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap2420_dispc_irqs),
+        .class          = &omap2_dispc_hwmod_class,
+        .mpu_irqs       = omap2_dispc_irqs,
         .main_clk       = "dss1_fck",
         .prcm           = {
                 .omap2 = {
@@ -1312,41 +942,12 @@ static struct omap_hwmod omap2420_dss_dispc_hwmod = {
         .flags          = HWMOD_NO_IDLEST,
 };
 
-/*
- * 'rfbi' class
- * remote frame buffer interface
- */
-
-static struct omap_hwmod_class_sysconfig omap2420_rfbi_sysc = {
-        .rev_offs       = 0x0000,
-        .sysc_offs      = 0x0010,
-        .syss_offs      = 0x0014,
-        .sysc_flags     = (SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET |
-                           SYSC_HAS_AUTOIDLE),
-        .idlemodes      = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
-        .sysc_fields    = &omap_hwmod_sysc_type1,
-};
-
-static struct omap_hwmod_class omap2420_rfbi_hwmod_class = {
-        .name = "rfbi",
-        .sysc = &omap2420_rfbi_sysc,
-};
-
-static struct omap_hwmod_addr_space omap2420_dss_rfbi_addrs[] = {
-        {
-                .pa_start       = 0x48050800,
-                .pa_end         = 0x48050BFF,
-                .flags          = ADDR_TYPE_RT
-        },
-};
-
 /* l4_core -> dss_rfbi */
 static struct omap_hwmod_ocp_if omap2420_l4_core__dss_rfbi = {
         .master         = &omap2420_l4_core_hwmod,
         .slave          = &omap2420_dss_rfbi_hwmod,
         .clk            = "dss_ick",
-        .addr           = omap2420_dss_rfbi_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap2420_dss_rfbi_addrs),
+        .addr           = omap2_dss_rfbi_addrs,
         .fw = {
                 .omap2 = {
                         .l4_fw_region  = OMAP2420_L4_CORE_FW_DSS_CORE_REGION,
@@ -1363,7 +964,7 @@ static struct omap_hwmod_ocp_if *omap2420_dss_rfbi_slaves[] = {
 
 static struct omap_hwmod omap2420_dss_rfbi_hwmod = {
         .name           = "dss_rfbi",
-        .class          = &omap2420_rfbi_hwmod_class,
+        .class          = &omap2_rfbi_hwmod_class,
         .main_clk       = "dss1_fck",
         .prcm           = {
                 .omap2 = {
@@ -1378,31 +979,12 @@ static struct omap_hwmod omap2420_dss_rfbi_hwmod = {
         .flags          = HWMOD_NO_IDLEST,
 };
 
-/*
- * 'venc' class
- * video encoder
- */
-
-static struct omap_hwmod_class omap2420_venc_hwmod_class = {
-        .name = "venc",
-};
-
-/* dss_venc */
-static struct omap_hwmod_addr_space omap2420_dss_venc_addrs[] = {
-        {
-                .pa_start       = 0x48050C00,
-                .pa_end         = 0x48050FFF,
-                .flags          = ADDR_TYPE_RT
-        },
-};
-
 /* l4_core -> dss_venc */
 static struct omap_hwmod_ocp_if omap2420_l4_core__dss_venc = {
         .master         = &omap2420_l4_core_hwmod,
         .slave          = &omap2420_dss_venc_hwmod,
         .clk            = "dss_54m_fck",
-        .addr           = omap2420_dss_venc_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap2420_dss_venc_addrs),
+        .addr           = omap2_dss_venc_addrs,
         .fw = {
                 .omap2 = {
                         .l4_fw_region  = OMAP2420_L4_CORE_FW_DSS_VENC_REGION,
@@ -1420,7 +1002,7 @@ static struct omap_hwmod_ocp_if *omap2420_dss_venc_slaves[] = {
 
 static struct omap_hwmod omap2420_dss_venc_hwmod = {
         .name           = "dss_venc",
-        .class          = &omap2420_venc_hwmod_class,
+        .class          = &omap2_venc_hwmod_class,
         .main_clk       = "dss1_fck",
         .prcm           = {
                 .omap2 = {
@@ -1453,25 +1035,14 @@ static struct omap_i2c_dev_attr i2c_dev_attr;
 
 /* I2C1 */
 
-static struct omap_hwmod_irq_info i2c1_mpu_irqs[] = {
-        { .irq = INT_24XX_I2C1_IRQ, },
-};
-
-static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = {
-        { .name = "tx", .dma_req = OMAP24XX_DMA_I2C1_TX },
-        { .name = "rx", .dma_req = OMAP24XX_DMA_I2C1_RX },
-};
-
 static struct omap_hwmod_ocp_if *omap2420_i2c1_slaves[] = {
         &omap2420_l4_core__i2c1,
 };
 
 static struct omap_hwmod omap2420_i2c1_hwmod = {
         .name           = "i2c1",
-        .mpu_irqs       = i2c1_mpu_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(i2c1_mpu_irqs),
-        .sdma_reqs      = i2c1_sdma_reqs,
-        .sdma_reqs_cnt  = ARRAY_SIZE(i2c1_sdma_reqs),
+        .mpu_irqs       = omap2_i2c1_mpu_irqs,
+        .sdma_reqs      = omap2_i2c1_sdma_reqs,
         .main_clk       = "i2c1_fck",
         .prcm           = {
                 .omap2 = {
@@ -1492,25 +1063,14 @@ static struct omap_hwmod omap2420_i2c1_hwmod = {
 
 /* I2C2 */
 
-static struct omap_hwmod_irq_info i2c2_mpu_irqs[] = {
-        { .irq = INT_24XX_I2C2_IRQ, },
-};
-
-static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = {
-        { .name = "tx", .dma_req = OMAP24XX_DMA_I2C2_TX },
-        { .name = "rx", .dma_req = OMAP24XX_DMA_I2C2_RX },
-};
-
 static struct omap_hwmod_ocp_if *omap2420_i2c2_slaves[] = {
         &omap2420_l4_core__i2c2,
 };
 
 static struct omap_hwmod omap2420_i2c2_hwmod = {
         .name           = "i2c2",
-        .mpu_irqs       = i2c2_mpu_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(i2c2_mpu_irqs),
-        .sdma_reqs      = i2c2_sdma_reqs,
-        .sdma_reqs_cnt  = ARRAY_SIZE(i2c2_sdma_reqs),
+        .mpu_irqs       = omap2_i2c2_mpu_irqs,
+        .sdma_reqs      = omap2_i2c2_sdma_reqs,
         .main_clk       = "i2c2_fck",
         .prcm           = {
                 .omap2 = {
@@ -1536,6 +1096,7 @@ static struct omap_hwmod_addr_space omap2420_gpio1_addr_space[] = {
                 .pa_end         = 0x480181ff,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 static struct omap_hwmod_ocp_if omap2420_l4_wkup__gpio1 = {
@@ -1543,7 +1104,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_wkup__gpio1 = {
         .slave          = &omap2420_gpio1_hwmod,
         .clk            = "gpios_ick",
         .addr           = omap2420_gpio1_addr_space,
-        .addr_cnt       = ARRAY_SIZE(omap2420_gpio1_addr_space),
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -1554,6 +1114,7 @@ static struct omap_hwmod_addr_space omap2420_gpio2_addr_space[] = {
                 .pa_end         = 0x4801a1ff,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 static struct omap_hwmod_ocp_if omap2420_l4_wkup__gpio2 = {
@@ -1561,7 +1122,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_wkup__gpio2 = {
         .slave          = &omap2420_gpio2_hwmod,
         .clk            = "gpios_ick",
         .addr           = omap2420_gpio2_addr_space,
-        .addr_cnt       = ARRAY_SIZE(omap2420_gpio2_addr_space),
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -1572,6 +1132,7 @@ static struct omap_hwmod_addr_space omap2420_gpio3_addr_space[] = {
                 .pa_end         = 0x4801c1ff,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 static struct omap_hwmod_ocp_if omap2420_l4_wkup__gpio3 = {
@@ -1579,7 +1140,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_wkup__gpio3 = {
         .slave          = &omap2420_gpio3_hwmod,
         .clk            = "gpios_ick",
         .addr           = omap2420_gpio3_addr_space,
-        .addr_cnt       = ARRAY_SIZE(omap2420_gpio3_addr_space),
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -1590,6 +1150,7 @@ static struct omap_hwmod_addr_space omap2420_gpio4_addr_space[] = {
                 .pa_end         = 0x4801e1ff,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 static struct omap_hwmod_ocp_if omap2420_l4_wkup__gpio4 = {
@@ -1597,7 +1158,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_wkup__gpio4 = {
         .slave          = &omap2420_gpio4_hwmod,
         .clk            = "gpios_ick",
         .addr           = omap2420_gpio4_addr_space,
-        .addr_cnt       = ARRAY_SIZE(omap2420_gpio4_addr_space),
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -1607,32 +1167,7 @@ static struct omap_gpio_dev_attr gpio_dev_attr = {
         .dbck_flag = false,
 };
 
-static struct omap_hwmod_class_sysconfig omap242x_gpio_sysc = {
-        .rev_offs       = 0x0000,
-        .sysc_offs      = 0x0010,
-        .syss_offs      = 0x0014,
-        .sysc_flags     = (SYSC_HAS_ENAWAKEUP | SYSC_HAS_SIDLEMODE |
-                           SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE |
-                           SYSS_HAS_RESET_STATUS),
-        .idlemodes      = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
-        .sysc_fields    = &omap_hwmod_sysc_type1,
-};
-
-/*
- * 'gpio' class
- * general purpose io module
- */
-static struct omap_hwmod_class omap242x_gpio_hwmod_class = {
-        .name = "gpio",
-        .sysc = &omap242x_gpio_sysc,
-        .rev = 0,
-};
-
 /* gpio1 */
-static struct omap_hwmod_irq_info omap242x_gpio1_irqs[] = {
-        { .irq = 29 }, /* INT_24XX_GPIO_BANK1 */
-};
-
 static struct omap_hwmod_ocp_if *omap2420_gpio1_slaves[] = {
         &omap2420_l4_wkup__gpio1,
 };
@@ -1640,8 +1175,7 @@ static struct omap_hwmod_ocp_if *omap2420_gpio1_slaves[] = {
 static struct omap_hwmod omap2420_gpio1_hwmod = {
         .name           = "gpio1",
         .flags          = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
-        .mpu_irqs       = omap242x_gpio1_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap242x_gpio1_irqs),
+        .mpu_irqs       = omap2_gpio1_irqs,
         .main_clk       = "gpios_fck",
         .prcm           = {
                 .omap2 = {
@@ -1654,16 +1188,12 @@ static struct omap_hwmod omap2420_gpio1_hwmod = {
         },
         .slaves         = omap2420_gpio1_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2420_gpio1_slaves),
-        .class          = &omap242x_gpio_hwmod_class,
+        .class          = &omap2xxx_gpio_hwmod_class,
         .dev_attr       = &gpio_dev_attr,
         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
 };
 
 /* gpio2 */
-static struct omap_hwmod_irq_info omap242x_gpio2_irqs[] = {
-        { .irq = 30 }, /* INT_24XX_GPIO_BANK2 */
-};
-
 static struct omap_hwmod_ocp_if *omap2420_gpio2_slaves[] = {
         &omap2420_l4_wkup__gpio2,
 };
@@ -1671,8 +1201,7 @@ static struct omap_hwmod_ocp_if *omap2420_gpio2_slaves[] = {
 static struct omap_hwmod omap2420_gpio2_hwmod = {
         .name           = "gpio2",
         .flags          = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
-        .mpu_irqs       = omap242x_gpio2_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap242x_gpio2_irqs),
+        .mpu_irqs       = omap2_gpio2_irqs,
         .main_clk       = "gpios_fck",
         .prcm           = {
                 .omap2 = {
@@ -1685,16 +1214,12 @@ static struct omap_hwmod omap2420_gpio2_hwmod = {
         },
         .slaves         = omap2420_gpio2_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2420_gpio2_slaves),
-        .class          = &omap242x_gpio_hwmod_class,
+        .class          = &omap2xxx_gpio_hwmod_class,
         .dev_attr       = &gpio_dev_attr,
         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
 };
 
 /* gpio3 */
-static struct omap_hwmod_irq_info omap242x_gpio3_irqs[] = {
-        { .irq = 31 }, /* INT_24XX_GPIO_BANK3 */
-};
-
 static struct omap_hwmod_ocp_if *omap2420_gpio3_slaves[] = {
         &omap2420_l4_wkup__gpio3,
 };
@@ -1702,8 +1227,7 @@ static struct omap_hwmod_ocp_if *omap2420_gpio3_slaves[] = {
 static struct omap_hwmod omap2420_gpio3_hwmod = {
         .name           = "gpio3",
         .flags          = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
-        .mpu_irqs       = omap242x_gpio3_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap242x_gpio3_irqs),
+        .mpu_irqs       = omap2_gpio3_irqs,
         .main_clk       = "gpios_fck",
         .prcm           = {
                 .omap2 = {
@@ -1716,16 +1240,12 @@ static struct omap_hwmod omap2420_gpio3_hwmod = {
         },
         .slaves         = omap2420_gpio3_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2420_gpio3_slaves),
-        .class          = &omap242x_gpio_hwmod_class,
+        .class          = &omap2xxx_gpio_hwmod_class,
         .dev_attr       = &gpio_dev_attr,
         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
 };
 
 /* gpio4 */
-static struct omap_hwmod_irq_info omap242x_gpio4_irqs[] = {
-        { .irq = 32 }, /* INT_24XX_GPIO_BANK4 */
-};
-
 static struct omap_hwmod_ocp_if *omap2420_gpio4_slaves[] = {
         &omap2420_l4_wkup__gpio4,
 };
@@ -1733,8 +1253,7 @@ static struct omap_hwmod_ocp_if *omap2420_gpio4_slaves[] = {
 static struct omap_hwmod omap2420_gpio4_hwmod = {
         .name           = "gpio4",
         .flags          = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
-        .mpu_irqs       = omap242x_gpio4_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap242x_gpio4_irqs),
+        .mpu_irqs       = omap2_gpio4_irqs,
         .main_clk       = "gpios_fck",
         .prcm           = {
                 .omap2 = {
@@ -1747,28 +1266,11 @@ static struct omap_hwmod omap2420_gpio4_hwmod = {
         },
         .slaves         = omap2420_gpio4_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2420_gpio4_slaves),
-        .class          = &omap242x_gpio_hwmod_class,
+        .class          = &omap2xxx_gpio_hwmod_class,
         .dev_attr       = &gpio_dev_attr,
         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
 };
 
-/* system dma */
-static struct omap_hwmod_class_sysconfig omap2420_dma_sysc = {
-        .rev_offs       = 0x0000,
-        .sysc_offs      = 0x002c,
-        .syss_offs      = 0x0028,
-        .sysc_flags     = (SYSC_HAS_SOFTRESET | SYSC_HAS_MIDLEMODE |
-                           SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_EMUFREE |
-                           SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS),
-        .idlemodes      = (MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART),
-        .sysc_fields    = &omap_hwmod_sysc_type1,
-};
-
-static struct omap_hwmod_class omap2420_dma_hwmod_class = {
-        .name = "dma",
-        .sysc = &omap2420_dma_sysc,
-};
-
 /* dma attributes */
 static struct omap_dma_dev_attr dma_dev_attr = {
         .dev_caps  = RESERVE_CHANNEL | DMA_LINKED_LCH | GLOBAL_PRIORITY |
@@ -1776,21 +1278,6 @@ static struct omap_dma_dev_attr dma_dev_attr = {
         .lch_count = 32,
 };
 
-static struct omap_hwmod_irq_info omap2420_dma_system_irqs[] = {
-        { .name = "0", .irq = 12 }, /* INT_24XX_SDMA_IRQ0 */
-        { .name = "1", .irq = 13 }, /* INT_24XX_SDMA_IRQ1 */
-        { .name = "2", .irq = 14 }, /* INT_24XX_SDMA_IRQ2 */
-        { .name = "3", .irq = 15 }, /* INT_24XX_SDMA_IRQ3 */
-};
-
-static struct omap_hwmod_addr_space omap2420_dma_system_addrs[] = {
-        {
-                .pa_start       = 0x48056000,
-                .pa_end         = 0x48056fff,
-                .flags          = ADDR_TYPE_RT
-        },
-};
-
 /* dma_system -> L3 */
 static struct omap_hwmod_ocp_if omap2420_dma_system__l3 = {
         .master         = &omap2420_dma_system_hwmod,
@@ -1809,8 +1296,7 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__dma_system = {
         .master         = &omap2420_l4_core_hwmod,
         .slave          = &omap2420_dma_system_hwmod,
         .clk            = "sdma_ick",
-        .addr           = omap2420_dma_system_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap2420_dma_system_addrs),
+        .addr           = omap2_dma_system_addrs,
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -1821,9 +1307,8 @@ static struct omap_hwmod_ocp_if *omap2420_dma_system_slaves[] = {
 
 static struct omap_hwmod omap2420_dma_system_hwmod = {
         .name           = "dma",
-        .class          = &omap2420_dma_hwmod_class,
-        .mpu_irqs       = omap2420_dma_system_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap2420_dma_system_irqs),
+        .class          = &omap2xxx_dma_hwmod_class,
+        .mpu_irqs       = omap2_dma_system_irqs,
         .main_clk       = "core_l3_ck",
         .slaves         = omap2420_dma_system_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2420_dma_system_slaves),
@@ -1834,48 +1319,19 @@ static struct omap_hwmod omap2420_dma_system_hwmod = {
         .flags          = HWMOD_NO_IDLEST,
 };
 
-/*
- * 'mailbox' class
- * mailbox module allowing communication between the on-chip processors
- * using a queued mailbox-interrupt mechanism.
- */
-
-static struct omap_hwmod_class_sysconfig omap2420_mailbox_sysc = {
-        .rev_offs       = 0x000,
-        .sysc_offs      = 0x010,
-        .syss_offs      = 0x014,
-        .sysc_flags     = (SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_SIDLEMODE |
-                           SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE),
-        .idlemodes      = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
-        .sysc_fields    = &omap_hwmod_sysc_type1,
-};
-
-static struct omap_hwmod_class omap2420_mailbox_hwmod_class = {
-        .name = "mailbox",
-        .sysc = &omap2420_mailbox_sysc,
-};
-
 /* mailbox */
 static struct omap_hwmod omap2420_mailbox_hwmod;
 static struct omap_hwmod_irq_info omap2420_mailbox_irqs[] = {
         { .name = "dsp", .irq = 26 },
         { .name = "iva", .irq = 34 },
-};
-
-static struct omap_hwmod_addr_space omap2420_mailbox_addrs[] = {
-        {
-                .pa_start       = 0x48094000,
-                .pa_end         = 0x480941ff,
-                .flags          = ADDR_TYPE_RT,
-        },
+        { .irq = -1 }
 };
 
 /* l4_core -> mailbox */
 static struct omap_hwmod_ocp_if omap2420_l4_core__mailbox = {
         .master         = &omap2420_l4_core_hwmod,
         .slave          = &omap2420_mailbox_hwmod,
-        .addr           = omap2420_mailbox_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap2420_mailbox_addrs),
+        .addr           = omap2_mailbox_addrs,
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -1886,9 +1342,8 @@ static struct omap_hwmod_ocp_if *omap2420_mailbox_slaves[] = {
 
 static struct omap_hwmod omap2420_mailbox_hwmod = {
         .name           = "mailbox",
-        .class          = &omap2420_mailbox_hwmod_class,
+        .class          = &omap2xxx_mailbox_hwmod_class,
         .mpu_irqs       = omap2420_mailbox_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap2420_mailbox_irqs),
         .main_clk       = "mailboxes_ick",
         .prcm           = {
                 .omap2 = {
@@ -1904,45 +1359,7 @@ static struct omap_hwmod omap2420_mailbox_hwmod = {
         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
 };
 
-/*
- * 'mcspi' class
- * multichannel serial port interface (mcspi) / master/slave synchronous serial
- * bus
- */
-
-static struct omap_hwmod_class_sysconfig omap2420_mcspi_sysc = {
-        .rev_offs       = 0x0000,
-        .sysc_offs      = 0x0010,
-        .syss_offs      = 0x0014,
-        .sysc_flags     = (SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_SIDLEMODE |
-                                SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET |
-                                SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS),
-        .idlemodes      = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
-        .sysc_fields    = &omap_hwmod_sysc_type1,
-};
-
-static struct omap_hwmod_class omap2420_mcspi_class = {
-        .name = "mcspi",
-        .sysc = &omap2420_mcspi_sysc,
-        .rev = OMAP2_MCSPI_REV,
-};
-
 /* mcspi1 */
-static struct omap_hwmod_irq_info omap2420_mcspi1_mpu_irqs[] = {
-        { .irq = 65 },
-};
-
-static struct omap_hwmod_dma_info omap2420_mcspi1_sdma_reqs[] = {
-        { .name = "tx0", .dma_req = 35 }, /* DMA_SPI1_TX0 */
-        { .name = "rx0", .dma_req = 36 }, /* DMA_SPI1_RX0 */
-        { .name = "tx1", .dma_req = 37 }, /* DMA_SPI1_TX1 */
-        { .name = "rx1", .dma_req = 38 }, /* DMA_SPI1_RX1 */
-        { .name = "tx2", .dma_req = 39 }, /* DMA_SPI1_TX2 */
-        { .name = "rx2", .dma_req = 40 }, /* DMA_SPI1_RX2 */
-        { .name = "tx3", .dma_req = 41 }, /* DMA_SPI1_TX3 */
-        { .name = "rx3", .dma_req = 42 }, /* DMA_SPI1_RX3 */
-};
-
 static struct omap_hwmod_ocp_if *omap2420_mcspi1_slaves[] = {
         &omap2420_l4_core__mcspi1,
 };
@@ -1953,10 +1370,8 @@ static struct omap2_mcspi_dev_attr omap_mcspi1_dev_attr = {
 
 static struct omap_hwmod omap2420_mcspi1_hwmod = {
         .name           = "mcspi1_hwmod",
-        .mpu_irqs       = omap2420_mcspi1_mpu_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap2420_mcspi1_mpu_irqs),
-        .sdma_reqs      = omap2420_mcspi1_sdma_reqs,
-        .sdma_reqs_cnt  = ARRAY_SIZE(omap2420_mcspi1_sdma_reqs),
+        .mpu_irqs       = omap2_mcspi1_mpu_irqs,
+        .sdma_reqs      = omap2_mcspi1_sdma_reqs,
         .main_clk       = "mcspi1_fck",
         .prcm           = {
                 .omap2 = {
@@ -1969,23 +1384,12 @@ static struct omap_hwmod omap2420_mcspi1_hwmod = {
         },
         .slaves         = omap2420_mcspi1_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2420_mcspi1_slaves),
-        .class          = &omap2420_mcspi_class,
-        .dev_attr       = &omap_mcspi1_dev_attr,
+        .class          = &omap2xxx_mcspi_class,
+        .dev_attr       = &omap_mcspi1_dev_attr,
         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
 };
 
 /* mcspi2 */
-static struct omap_hwmod_irq_info omap2420_mcspi2_mpu_irqs[] = {
-        { .irq = 66 },
-};
-
-static struct omap_hwmod_dma_info omap2420_mcspi2_sdma_reqs[] = {
-        { .name = "tx0", .dma_req = 43 }, /* DMA_SPI2_TX0 */
-        { .name = "rx0", .dma_req = 44 }, /* DMA_SPI2_RX0 */
-        { .name = "tx1", .dma_req = 45 }, /* DMA_SPI2_TX1 */
-        { .name = "rx1", .dma_req = 46 }, /* DMA_SPI2_RX1 */
-};
-
 static struct omap_hwmod_ocp_if *omap2420_mcspi2_slaves[] = {
         &omap2420_l4_core__mcspi2,
 };
@@ -1996,10 +1400,8 @@ static struct omap2_mcspi_dev_attr omap_mcspi2_dev_attr = {
 
 static struct omap_hwmod omap2420_mcspi2_hwmod = {
         .name           = "mcspi2_hwmod",
-        .mpu_irqs       = omap2420_mcspi2_mpu_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap2420_mcspi2_mpu_irqs),
-        .sdma_reqs      = omap2420_mcspi2_sdma_reqs,
-        .sdma_reqs_cnt  = ARRAY_SIZE(omap2420_mcspi2_sdma_reqs),
+        .mpu_irqs       = omap2_mcspi2_mpu_irqs,
+        .sdma_reqs      = omap2_mcspi2_sdma_reqs,
         .main_clk       = "mcspi2_fck",
         .prcm           = {
                 .omap2 = {
@@ -2012,8 +1414,8 @@ static struct omap_hwmod omap2420_mcspi2_hwmod = {
         },
         .slaves         = omap2420_mcspi2_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2420_mcspi2_slaves),
-        .class          = &omap2420_mcspi_class,
-        .dev_attr       = &omap_mcspi2_dev_attr,
+        .class          = &omap2xxx_mcspi_class,
+        .dev_attr       = &omap_mcspi2_dev_attr,
         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
 };
 
@@ -2030,20 +1432,7 @@ static struct omap_hwmod_class omap2420_mcbsp_hwmod_class = {
 static struct omap_hwmod_irq_info omap2420_mcbsp1_irqs[] = {
         { .name = "tx", .irq = 59 },
         { .name = "rx", .irq = 60 },
-};
-
-static struct omap_hwmod_dma_info omap2420_mcbsp1_sdma_chs[] = {
-        { .name = "rx", .dma_req = 32 },
-        { .name = "tx", .dma_req = 31 },
-};
-
-static struct omap_hwmod_addr_space omap2420_mcbsp1_addrs[] = {
-        {
-                .name           = "mpu",
-                .pa_start       = 0x48074000,
-                .pa_end         = 0x480740ff,
-                .flags          = ADDR_TYPE_RT
-        },
+        { .irq = -1 }
 };
 
 /* l4_core -> mcbsp1 */
@@ -2051,8 +1440,7 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__mcbsp1 = {
         .master         = &omap2420_l4_core_hwmod,
         .slave          = &omap2420_mcbsp1_hwmod,
         .clk            = "mcbsp1_ick",
-        .addr           = omap2420_mcbsp1_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap2420_mcbsp1_addrs),
+        .addr           = omap2_mcbsp1_addrs,
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -2065,9 +1453,7 @@ static struct omap_hwmod omap2420_mcbsp1_hwmod = {
         .name           = "mcbsp1",
         .class          = &omap2420_mcbsp_hwmod_class,
         .mpu_irqs       = omap2420_mcbsp1_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap2420_mcbsp1_irqs),
-        .sdma_reqs      = omap2420_mcbsp1_sdma_chs,
-        .sdma_reqs_cnt  = ARRAY_SIZE(omap2420_mcbsp1_sdma_chs),
+        .sdma_reqs      = omap2_mcbsp1_sdma_reqs,
         .main_clk       = "mcbsp1_fck",
         .prcm           = {
                 .omap2 = {
@@ -2087,20 +1473,7 @@ static struct omap_hwmod omap2420_mcbsp1_hwmod = {
 static struct omap_hwmod_irq_info omap2420_mcbsp2_irqs[] = {
         { .name = "tx", .irq = 62 },
         { .name = "rx", .irq = 63 },
-};
-
-static struct omap_hwmod_dma_info omap2420_mcbsp2_sdma_chs[] = {
-        { .name = "rx", .dma_req = 34 },
-        { .name = "tx", .dma_req = 33 },
-};
-
-static struct omap_hwmod_addr_space omap2420_mcbsp2_addrs[] = {
-        {
-                .name           = "mpu",
-                .pa_start       = 0x48076000,
-                .pa_end         = 0x480760ff,
-                .flags          = ADDR_TYPE_RT
-        },
+        { .irq = -1 }
 };
 
 /* l4_core -> mcbsp2 */
@@ -2108,8 +1481,7 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__mcbsp2 = {
         .master         = &omap2420_l4_core_hwmod,
         .slave          = &omap2420_mcbsp2_hwmod,
         .clk            = "mcbsp2_ick",
-        .addr           = omap2420_mcbsp2_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap2420_mcbsp2_addrs),
+        .addr           = omap2xxx_mcbsp2_addrs,
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -2122,9 +1494,7 @@ static struct omap_hwmod omap2420_mcbsp2_hwmod = {
         .name           = "mcbsp2",
         .class          = &omap2420_mcbsp_hwmod_class,
         .mpu_irqs       = omap2420_mcbsp2_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap2420_mcbsp2_irqs),
-        .sdma_reqs      = omap2420_mcbsp2_sdma_chs,
-        .sdma_reqs_cnt  = ARRAY_SIZE(omap2420_mcbsp2_sdma_chs),
+        .sdma_reqs      = omap2_mcbsp2_sdma_reqs,
         .main_clk       = "mcbsp2_fck",
         .prcm           = {
                 .omap2 = {
diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
index 9682dd519f8d..2a52f025bd06 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
@@ -1,7 +1,7 @@
 /*
  * omap_hwmod_2430_data.c - hardware modules present on the OMAP2430 chips
  *
- * Copyright (C) 2009-2010 Nokia Corporation
+ * Copyright (C) 2009-2011 Nokia Corporation
  * Paul Walmsley
  *
  * This program is free software; you can redistribute it and/or modify
@@ -131,42 +131,21 @@ static struct omap_hwmod_ocp_if omap2430_usbhsotg__l3 = {
         .user           = OCP_USER_MPU,
 };
 
-/* I2C IP block address space length (in bytes) */
-#define OMAP2_I2C_AS_LEN                128
-
 /* L4 CORE -> I2C1 interface */
-static struct omap_hwmod_addr_space omap2430_i2c1_addr_space[] = {
-        {
-                .pa_start       = 0x48070000,
-                .pa_end         = 0x48070000 + OMAP2_I2C_AS_LEN - 1,
-                .flags          = ADDR_TYPE_RT,
-        },
-};
-
 static struct omap_hwmod_ocp_if omap2430_l4_core__i2c1 = {
         .master         = &omap2430_l4_core_hwmod,
         .slave          = &omap2430_i2c1_hwmod,
         .clk            = "i2c1_ick",
-        .addr           = omap2430_i2c1_addr_space,
-        .addr_cnt       = ARRAY_SIZE(omap2430_i2c1_addr_space),
+        .addr           = omap2_i2c1_addr_space,
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
 /* L4 CORE -> I2C2 interface */
-static struct omap_hwmod_addr_space omap2430_i2c2_addr_space[] = {
-        {
-                .pa_start       = 0x48072000,
-                .pa_end         = 0x48072000 + OMAP2_I2C_AS_LEN - 1,
-                .flags          = ADDR_TYPE_RT,
-        },
-};
-
 static struct omap_hwmod_ocp_if omap2430_l4_core__i2c2 = {
         .master         = &omap2430_l4_core_hwmod,
         .slave          = &omap2430_i2c2_hwmod,
         .clk            = "i2c2_ick",
-        .addr           = omap2430_i2c2_addr_space,
-        .addr_cnt       = ARRAY_SIZE(omap2430_i2c2_addr_space),
+        .addr           = omap2_i2c2_addr_space,
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -178,56 +157,29 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__l4_wkup = {
 };
 
 /* L4 CORE -> UART1 interface */
-static struct omap_hwmod_addr_space omap2430_uart1_addr_space[] = {
-        {
-                .pa_start       = OMAP2_UART1_BASE,
-                .pa_end         = OMAP2_UART1_BASE + SZ_8K - 1,
-                .flags          = ADDR_MAP_ON_INIT | ADDR_TYPE_RT,
-        },
-};
-
 static struct omap_hwmod_ocp_if omap2_l4_core__uart1 = {
         .master         = &omap2430_l4_core_hwmod,
         .slave          = &omap2430_uart1_hwmod,
         .clk            = "uart1_ick",
-        .addr           = omap2430_uart1_addr_space,
-        .addr_cnt       = ARRAY_SIZE(omap2430_uart1_addr_space),
+        .addr           = omap2xxx_uart1_addr_space,
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
 /* L4 CORE -> UART2 interface */
-static struct omap_hwmod_addr_space omap2430_uart2_addr_space[] = {
-        {
-                .pa_start       = OMAP2_UART2_BASE,
-                .pa_end         = OMAP2_UART2_BASE + SZ_1K - 1,
-                .flags          = ADDR_MAP_ON_INIT | ADDR_TYPE_RT,
-        },
-};
-
 static struct omap_hwmod_ocp_if omap2_l4_core__uart2 = {
         .master         = &omap2430_l4_core_hwmod,
         .slave          = &omap2430_uart2_hwmod,
         .clk            = "uart2_ick",
-        .addr           = omap2430_uart2_addr_space,
-        .addr_cnt       = ARRAY_SIZE(omap2430_uart2_addr_space),
+        .addr           = omap2xxx_uart2_addr_space,
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
 /* L4 PER -> UART3 interface */
-static struct omap_hwmod_addr_space omap2430_uart3_addr_space[] = {
-        {
-                .pa_start       = OMAP2_UART3_BASE,
-                .pa_end         = OMAP2_UART3_BASE + SZ_1K - 1,
-                .flags          = ADDR_MAP_ON_INIT | ADDR_TYPE_RT,
-        },
-};
-
 static struct omap_hwmod_ocp_if omap2_l4_core__uart3 = {
         .master         = &omap2430_l4_core_hwmod,
         .slave          = &omap2430_uart3_hwmod,
         .clk            = "uart3_ick",
-        .addr           = omap2430_uart3_addr_space,
-        .addr_cnt       = ARRAY_SIZE(omap2430_uart3_addr_space),
+        .addr           = omap2xxx_uart3_addr_space,
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -248,7 +200,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__usbhsotg = {
         .slave          = &omap2430_usbhsotg_hwmod,
         .clk            = "usb_l4_ick",
         .addr           = omap2430_usbhsotg_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap2430_usbhsotg_addrs),
         .user           = OCP_USER_MPU,
 };
 
@@ -261,38 +212,20 @@ static struct omap_hwmod_ocp_if *omap2430_usbhsotg_slaves[] = {
 };
 
 /* L4 CORE -> MMC1 interface */
-static struct omap_hwmod_addr_space omap2430_mmc1_addr_space[] = {
-        {
-                .pa_start       = 0x4809c000,
-                .pa_end         = 0x4809c1ff,
-                .flags          = ADDR_TYPE_RT,
-        },
-};
-
 static struct omap_hwmod_ocp_if omap2430_l4_core__mmc1 = {
         .master         = &omap2430_l4_core_hwmod,
         .slave          = &omap2430_mmc1_hwmod,
         .clk            = "mmchs1_ick",
         .addr           = omap2430_mmc1_addr_space,
-        .addr_cnt       = ARRAY_SIZE(omap2430_mmc1_addr_space),
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
 /* L4 CORE -> MMC2 interface */
-static struct omap_hwmod_addr_space omap2430_mmc2_addr_space[] = {
-        {
-                .pa_start       = 0x480b4000,
-                .pa_end         = 0x480b41ff,
-                .flags          = ADDR_TYPE_RT,
-        },
-};
-
 static struct omap_hwmod_ocp_if omap2430_l4_core__mmc2 = {
         .master         = &omap2430_l4_core_hwmod,
         .slave          = &omap2430_mmc2_hwmod,
-        .addr           = omap2430_mmc2_addr_space,
         .clk            = "mmchs2_ick",
-        .addr_cnt       = ARRAY_SIZE(omap2430_mmc2_addr_space),
+        .addr           = omap2430_mmc2_addr_space,
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -333,56 +266,29 @@ static struct omap_hwmod_ocp_if *omap2430_l4_wkup_masters[] = {
 };
 
 /* l4 core -> mcspi1 interface */
-static struct omap_hwmod_addr_space omap2430_mcspi1_addr_space[] = {
-        {
-                .pa_start       = 0x48098000,
-                .pa_end         = 0x480980ff,
-                .flags          = ADDR_TYPE_RT,
-        },
-};
-
 static struct omap_hwmod_ocp_if omap2430_l4_core__mcspi1 = {
         .master         = &omap2430_l4_core_hwmod,
         .slave          = &omap2430_mcspi1_hwmod,
         .clk            = "mcspi1_ick",
-        .addr           = omap2430_mcspi1_addr_space,
-        .addr_cnt       = ARRAY_SIZE(omap2430_mcspi1_addr_space),
+        .addr           = omap2_mcspi1_addr_space,
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
 /* l4 core -> mcspi2 interface */
-static struct omap_hwmod_addr_space omap2430_mcspi2_addr_space[] = {
-        {
-                .pa_start       = 0x4809a000,
-                .pa_end         = 0x4809a0ff,
-                .flags          = ADDR_TYPE_RT,
-        },
-};
-
 static struct omap_hwmod_ocp_if omap2430_l4_core__mcspi2 = {
         .master         = &omap2430_l4_core_hwmod,
         .slave          = &omap2430_mcspi2_hwmod,
         .clk            = "mcspi2_ick",
-        .addr           = omap2430_mcspi2_addr_space,
-        .addr_cnt       = ARRAY_SIZE(omap2430_mcspi2_addr_space),
+        .addr           = omap2_mcspi2_addr_space,
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
 /* l4 core -> mcspi3 interface */
-static struct omap_hwmod_addr_space omap2430_mcspi3_addr_space[] = {
-        {
-                .pa_start       = 0x480b8000,
-                .pa_end         = 0x480b80ff,
-                .flags          = ADDR_TYPE_RT,
-        },
-};
-
 static struct omap_hwmod_ocp_if omap2430_l4_core__mcspi3 = {
         .master         = &omap2430_l4_core_hwmod,
         .slave          = &omap2430_mcspi3_hwmod,
         .clk            = "mcspi3_ick",
         .addr           = omap2430_mcspi3_addr_space,
-        .addr_cnt       = ARRAY_SIZE(omap2430_mcspi3_addr_space),
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -441,29 +347,8 @@ static struct omap_hwmod omap2430_iva_hwmod = {
         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2430)
 };
 
-/* Timer Common */
-static struct omap_hwmod_class_sysconfig omap2430_timer_sysc = {
-        .rev_offs       = 0x0000,
-        .sysc_offs      = 0x0010,
-        .syss_offs      = 0x0014,
-        .sysc_flags     = (SYSC_HAS_SIDLEMODE | SYSC_HAS_CLOCKACTIVITY |
-                           SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET |
-                           SYSC_HAS_AUTOIDLE),
-        .idlemodes      = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
-        .sysc_fields    = &omap_hwmod_sysc_type1,
-};
-
-static struct omap_hwmod_class omap2430_timer_hwmod_class = {
-        .name = "timer",
-        .sysc = &omap2430_timer_sysc,
-        .rev = OMAP_TIMER_IP_VERSION_1,
-};
-
 /* timer1 */
 static struct omap_hwmod omap2430_timer1_hwmod;
-static struct omap_hwmod_irq_info omap2430_timer1_mpu_irqs[] = {
-        { .irq = 37, },
-};
 
 static struct omap_hwmod_addr_space omap2430_timer1_addrs[] = {
         {
@@ -471,6 +356,7 @@ static struct omap_hwmod_addr_space omap2430_timer1_addrs[] = {
                 .pa_end         = 0x49018000 + SZ_1K - 1,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* l4_wkup -> timer1 */
@@ -479,7 +365,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_wkup__timer1 = {
         .slave          = &omap2430_timer1_hwmod,
         .clk            = "gpt1_ick",
         .addr           = omap2430_timer1_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap2430_timer1_addrs),
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -491,8 +376,7 @@ static struct omap_hwmod_ocp_if *omap2430_timer1_slaves[] = {
 /* timer1 hwmod */
 static struct omap_hwmod omap2430_timer1_hwmod = {
         .name           = "timer1",
-        .mpu_irqs       = omap2430_timer1_mpu_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap2430_timer1_mpu_irqs),
+        .mpu_irqs       = omap2_timer1_mpu_irqs,
         .main_clk       = "gpt1_fck",
         .prcm           = {
                 .omap2 = {
@@ -505,31 +389,19 @@ static struct omap_hwmod omap2430_timer1_hwmod = {
         },
         .slaves         = omap2430_timer1_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2430_timer1_slaves),
-        .class          = &omap2430_timer_hwmod_class,
+        .class          = &omap2xxx_timer_hwmod_class,
         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2430)
 };
 
 /* timer2 */
 static struct omap_hwmod omap2430_timer2_hwmod;
-static struct omap_hwmod_irq_info omap2430_timer2_mpu_irqs[] = {
-        { .irq = 38, },
-};
-
-static struct omap_hwmod_addr_space omap2430_timer2_addrs[] = {
-        {
-                .pa_start       = 0x4802a000,
-                .pa_end         = 0x4802a000 + SZ_1K - 1,
-                .flags          = ADDR_TYPE_RT
-        },
-};
 
 /* l4_core -> timer2 */
 static struct omap_hwmod_ocp_if omap2430_l4_core__timer2 = {
         .master         = &omap2430_l4_core_hwmod,
         .slave          = &omap2430_timer2_hwmod,
         .clk            = "gpt2_ick",
-        .addr           = omap2430_timer2_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap2430_timer2_addrs),
+        .addr           = omap2xxx_timer2_addrs,
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -541,8 +413,7 @@ static struct omap_hwmod_ocp_if *omap2430_timer2_slaves[] = {
 /* timer2 hwmod */
 static struct omap_hwmod omap2430_timer2_hwmod = {
         .name           = "timer2",
-        .mpu_irqs       = omap2430_timer2_mpu_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap2430_timer2_mpu_irqs),
+        .mpu_irqs       = omap2_timer2_mpu_irqs,
         .main_clk       = "gpt2_fck",
         .prcm           = {
                 .omap2 = {
@@ -555,31 +426,19 @@ static struct omap_hwmod omap2430_timer2_hwmod = {
         },
         .slaves         = omap2430_timer2_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2430_timer2_slaves),
-        .class          = &omap2430_timer_hwmod_class,
+        .class          = &omap2xxx_timer_hwmod_class,
         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2430)
 };
 
 /* timer3 */
 static struct omap_hwmod omap2430_timer3_hwmod;
-static struct omap_hwmod_irq_info omap2430_timer3_mpu_irqs[] = {
-        { .irq = 39, },
-};
-
-static struct omap_hwmod_addr_space omap2430_timer3_addrs[] = {
-        {
-                .pa_start       = 0x48078000,
-                .pa_end         = 0x48078000 + SZ_1K - 1,
-                .flags          = ADDR_TYPE_RT
-        },
-};
 
 /* l4_core -> timer3 */
 static struct omap_hwmod_ocp_if omap2430_l4_core__timer3 = {
         .master         = &omap2430_l4_core_hwmod,
         .slave          = &omap2430_timer3_hwmod,
         .clk            = "gpt3_ick",
-        .addr           = omap2430_timer3_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap2430_timer3_addrs),
+        .addr           = omap2xxx_timer3_addrs,
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -591,8 +450,7 @@ static struct omap_hwmod_ocp_if *omap2430_timer3_slaves[] = {
 /* timer3 hwmod */
 static struct omap_hwmod omap2430_timer3_hwmod = {
         .name           = "timer3",
-        .mpu_irqs       = omap2430_timer3_mpu_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap2430_timer3_mpu_irqs),
+        .mpu_irqs       = omap2_timer3_mpu_irqs,
         .main_clk       = "gpt3_fck",
         .prcm           = {
                 .omap2 = {
@@ -605,31 +463,19 @@ static struct omap_hwmod omap2430_timer3_hwmod = {
         },
         .slaves         = omap2430_timer3_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2430_timer3_slaves),
-        .class          = &omap2430_timer_hwmod_class,
+        .class          = &omap2xxx_timer_hwmod_class,
         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2430)
 };
 
 /* timer4 */
 static struct omap_hwmod omap2430_timer4_hwmod;
-static struct omap_hwmod_irq_info omap2430_timer4_mpu_irqs[] = {
-        { .irq = 40, },
-};
-
-static struct omap_hwmod_addr_space omap2430_timer4_addrs[] = {
-        {
-                .pa_start       = 0x4807a000,
-                .pa_end         = 0x4807a000 + SZ_1K - 1,
-                .flags          = ADDR_TYPE_RT
-        },
-};
 
 /* l4_core -> timer4 */
 static struct omap_hwmod_ocp_if omap2430_l4_core__timer4 = {
         .master         = &omap2430_l4_core_hwmod,
         .slave          = &omap2430_timer4_hwmod,
         .clk            = "gpt4_ick",
-        .addr           = omap2430_timer4_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap2430_timer4_addrs),
+        .addr           = omap2xxx_timer4_addrs,
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -641,8 +487,7 @@ static struct omap_hwmod_ocp_if *omap2430_timer4_slaves[] = {
 /* timer4 hwmod */
 static struct omap_hwmod omap2430_timer4_hwmod = {
         .name           = "timer4",
-        .mpu_irqs       = omap2430_timer4_mpu_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap2430_timer4_mpu_irqs),
+        .mpu_irqs       = omap2_timer4_mpu_irqs,
         .main_clk       = "gpt4_fck",
         .prcm           = {
                 .omap2 = {
@@ -655,31 +500,19 @@ static struct omap_hwmod omap2430_timer4_hwmod = {
         },
         .slaves         = omap2430_timer4_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2430_timer4_slaves),
-        .class          = &omap2430_timer_hwmod_class,
+        .class          = &omap2xxx_timer_hwmod_class,
         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2430)
 };
 
 /* timer5 */
 static struct omap_hwmod omap2430_timer5_hwmod;
-static struct omap_hwmod_irq_info omap2430_timer5_mpu_irqs[] = {
-        { .irq = 41, },
-};
-
-static struct omap_hwmod_addr_space omap2430_timer5_addrs[] = {
-        {
-                .pa_start       = 0x4807c000,
-                .pa_end         = 0x4807c000 + SZ_1K - 1,
-                .flags          = ADDR_TYPE_RT
-        },
-};
 
 /* l4_core -> timer5 */
 static struct omap_hwmod_ocp_if omap2430_l4_core__timer5 = {
         .master         = &omap2430_l4_core_hwmod,
         .slave          = &omap2430_timer5_hwmod,
         .clk            = "gpt5_ick",
-        .addr           = omap2430_timer5_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap2430_timer5_addrs),
+        .addr           = omap2xxx_timer5_addrs,
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -691,8 +524,7 @@ static struct omap_hwmod_ocp_if *omap2430_timer5_slaves[] = {
 /* timer5 hwmod */
 static struct omap_hwmod omap2430_timer5_hwmod = {
         .name           = "timer5",
-        .mpu_irqs       = omap2430_timer5_mpu_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap2430_timer5_mpu_irqs),
+        .mpu_irqs       = omap2_timer5_mpu_irqs,
         .main_clk       = "gpt5_fck",
         .prcm           = {
                 .omap2 = {
@@ -705,31 +537,19 @@ static struct omap_hwmod omap2430_timer5_hwmod = {
         },
         .slaves         = omap2430_timer5_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2430_timer5_slaves),
-        .class          = &omap2430_timer_hwmod_class,
+        .class          = &omap2xxx_timer_hwmod_class,
         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2430)
 };
 
 /* timer6 */
 static struct omap_hwmod omap2430_timer6_hwmod;
-static struct omap_hwmod_irq_info omap2430_timer6_mpu_irqs[] = {
-        { .irq = 42, },
-};
-
-static struct omap_hwmod_addr_space omap2430_timer6_addrs[] = {
-        {
-                .pa_start       = 0x4807e000,
-                .pa_end         = 0x4807e000 + SZ_1K - 1,
-                .flags          = ADDR_TYPE_RT
-        },
-};
 
 /* l4_core -> timer6 */
 static struct omap_hwmod_ocp_if omap2430_l4_core__timer6 = {
         .master         = &omap2430_l4_core_hwmod,
         .slave          = &omap2430_timer6_hwmod,
         .clk            = "gpt6_ick",
-        .addr           = omap2430_timer6_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap2430_timer6_addrs),
+        .addr           = omap2xxx_timer6_addrs,
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -741,8 +561,7 @@ static struct omap_hwmod_ocp_if *omap2430_timer6_slaves[] = {
 /* timer6 hwmod */
 static struct omap_hwmod omap2430_timer6_hwmod = {
         .name           = "timer6",
-        .mpu_irqs       = omap2430_timer6_mpu_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap2430_timer6_mpu_irqs),
+        .mpu_irqs       = omap2_timer6_mpu_irqs,
         .main_clk       = "gpt6_fck",
         .prcm           = {
                 .omap2 = {
@@ -755,31 +574,19 @@ static struct omap_hwmod omap2430_timer6_hwmod = {
         },
         .slaves         = omap2430_timer6_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2430_timer6_slaves),
-        .class          = &omap2430_timer_hwmod_class,
+        .class          = &omap2xxx_timer_hwmod_class,
         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2430)
 };
 
 /* timer7 */
 static struct omap_hwmod omap2430_timer7_hwmod;
-static struct omap_hwmod_irq_info omap2430_timer7_mpu_irqs[] = {
-        { .irq = 43, },
-};
-
-static struct omap_hwmod_addr_space omap2430_timer7_addrs[] = {
-        {
-                .pa_start       = 0x48080000,
-                .pa_end         = 0x48080000 + SZ_1K - 1,
-                .flags          = ADDR_TYPE_RT
-        },
-};
 
 /* l4_core -> timer7 */
 static struct omap_hwmod_ocp_if omap2430_l4_core__timer7 = {
         .master         = &omap2430_l4_core_hwmod,
         .slave          = &omap2430_timer7_hwmod,
         .clk            = "gpt7_ick",
-        .addr           = omap2430_timer7_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap2430_timer7_addrs),
+        .addr           = omap2xxx_timer7_addrs,
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -791,8 +598,7 @@ static struct omap_hwmod_ocp_if *omap2430_timer7_slaves[] = {
 /* timer7 hwmod */
 static struct omap_hwmod omap2430_timer7_hwmod = {
         .name           = "timer7",
-        .mpu_irqs       = omap2430_timer7_mpu_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap2430_timer7_mpu_irqs),
+        .mpu_irqs       = omap2_timer7_mpu_irqs,
         .main_clk       = "gpt7_fck",
         .prcm           = {
                 .omap2 = {
@@ -805,31 +611,19 @@ static struct omap_hwmod omap2430_timer7_hwmod = {
         },
         .slaves         = omap2430_timer7_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2430_timer7_slaves),
-        .class          = &omap2430_timer_hwmod_class,
+        .class          = &omap2xxx_timer_hwmod_class,
         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2430)
 };
 
 /* timer8 */
 static struct omap_hwmod omap2430_timer8_hwmod;
-static struct omap_hwmod_irq_info omap2430_timer8_mpu_irqs[] = {
-        { .irq = 44, },
-};
-
-static struct omap_hwmod_addr_space omap2430_timer8_addrs[] = {
-        {
-                .pa_start       = 0x48082000,
-                .pa_end         = 0x48082000 + SZ_1K - 1,
-                .flags          = ADDR_TYPE_RT
-        },
-};
 
 /* l4_core -> timer8 */
 static struct omap_hwmod_ocp_if omap2430_l4_core__timer8 = {
         .master         = &omap2430_l4_core_hwmod,
         .slave          = &omap2430_timer8_hwmod,
         .clk            = "gpt8_ick",
-        .addr           = omap2430_timer8_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap2430_timer8_addrs),
+        .addr           = omap2xxx_timer8_addrs,
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -841,8 +635,7 @@ static struct omap_hwmod_ocp_if *omap2430_timer8_slaves[] = {
 /* timer8 hwmod */
 static struct omap_hwmod omap2430_timer8_hwmod = {
         .name           = "timer8",
-        .mpu_irqs       = omap2430_timer8_mpu_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap2430_timer8_mpu_irqs),
+        .mpu_irqs       = omap2_timer8_mpu_irqs,
         .main_clk       = "gpt8_fck",
         .prcm           = {
                 .omap2 = {
@@ -855,31 +648,19 @@ static struct omap_hwmod omap2430_timer8_hwmod = {
         },
         .slaves         = omap2430_timer8_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2430_timer8_slaves),
-        .class          = &omap2430_timer_hwmod_class,
+        .class          = &omap2xxx_timer_hwmod_class,
         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2430)
 };
 
 /* timer9 */
 static struct omap_hwmod omap2430_timer9_hwmod;
-static struct omap_hwmod_irq_info omap2430_timer9_mpu_irqs[] = {
-        { .irq = 45, },
-};
-
-static struct omap_hwmod_addr_space omap2430_timer9_addrs[] = {
-        {
-                .pa_start       = 0x48084000,
-                .pa_end         = 0x48084000 + SZ_1K - 1,
-                .flags          = ADDR_TYPE_RT
-        },
-};
 
 /* l4_core -> timer9 */
 static struct omap_hwmod_ocp_if omap2430_l4_core__timer9 = {
         .master         = &omap2430_l4_core_hwmod,
         .slave          = &omap2430_timer9_hwmod,
         .clk            = "gpt9_ick",
-        .addr           = omap2430_timer9_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap2430_timer9_addrs),
+        .addr           = omap2xxx_timer9_addrs,
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -891,8 +672,7 @@ static struct omap_hwmod_ocp_if *omap2430_timer9_slaves[] = {
 /* timer9 hwmod */
 static struct omap_hwmod omap2430_timer9_hwmod = {
         .name           = "timer9",
-        .mpu_irqs       = omap2430_timer9_mpu_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap2430_timer9_mpu_irqs),
+        .mpu_irqs       = omap2_timer9_mpu_irqs,
         .main_clk       = "gpt9_fck",
         .prcm           = {
                 .omap2 = {
@@ -905,31 +685,19 @@ static struct omap_hwmod omap2430_timer9_hwmod = {
         },
         .slaves         = omap2430_timer9_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2430_timer9_slaves),
-        .class          = &omap2430_timer_hwmod_class,
+        .class          = &omap2xxx_timer_hwmod_class,
         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2430)
 };
 
 /* timer10 */
 static struct omap_hwmod omap2430_timer10_hwmod;
-static struct omap_hwmod_irq_info omap2430_timer10_mpu_irqs[] = {
-        { .irq = 46, },
-};
-
-static struct omap_hwmod_addr_space omap2430_timer10_addrs[] = {
-        {
-                .pa_start       = 0x48086000,
-                .pa_end         = 0x48086000 + SZ_1K - 1,
-                .flags          = ADDR_TYPE_RT
-        },
-};
 
 /* l4_core -> timer10 */
 static struct omap_hwmod_ocp_if omap2430_l4_core__timer10 = {
         .master         = &omap2430_l4_core_hwmod,
         .slave          = &omap2430_timer10_hwmod,
         .clk            = "gpt10_ick",
-        .addr           = omap2430_timer10_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap2430_timer10_addrs),
+        .addr           = omap2_timer10_addrs,
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -941,8 +709,7 @@ static struct omap_hwmod_ocp_if *omap2430_timer10_slaves[] = {
 /* timer10 hwmod */
 static struct omap_hwmod omap2430_timer10_hwmod = {
         .name           = "timer10",
-        .mpu_irqs       = omap2430_timer10_mpu_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap2430_timer10_mpu_irqs),
+        .mpu_irqs       = omap2_timer10_mpu_irqs,
         .main_clk       = "gpt10_fck",
         .prcm           = {
                 .omap2 = {
@@ -955,31 +722,19 @@ static struct omap_hwmod omap2430_timer10_hwmod = {
         },
         .slaves         = omap2430_timer10_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2430_timer10_slaves),
-        .class          = &omap2430_timer_hwmod_class,
+        .class          = &omap2xxx_timer_hwmod_class,
         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2430)
 };
 
 /* timer11 */
 static struct omap_hwmod omap2430_timer11_hwmod;
-static struct omap_hwmod_irq_info omap2430_timer11_mpu_irqs[] = {
-        { .irq = 47, },
-};
-
-static struct omap_hwmod_addr_space omap2430_timer11_addrs[] = {
-        {
-                .pa_start       = 0x48088000,
-                .pa_end         = 0x48088000 + SZ_1K - 1,
-                .flags          = ADDR_TYPE_RT
-        },
-};
 
 /* l4_core -> timer11 */
 static struct omap_hwmod_ocp_if omap2430_l4_core__timer11 = {
         .master         = &omap2430_l4_core_hwmod,
         .slave          = &omap2430_timer11_hwmod,
         .clk            = "gpt11_ick",
-        .addr           = omap2430_timer11_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap2430_timer11_addrs),
+        .addr           = omap2_timer11_addrs,
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -991,8 +746,7 @@ static struct omap_hwmod_ocp_if *omap2430_timer11_slaves[] = {
 /* timer11 hwmod */
 static struct omap_hwmod omap2430_timer11_hwmod = {
         .name           = "timer11",
-        .mpu_irqs       = omap2430_timer11_mpu_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap2430_timer11_mpu_irqs),
+        .mpu_irqs       = omap2_timer11_mpu_irqs,
         .main_clk       = "gpt11_fck",
         .prcm           = {
                 .omap2 = {
@@ -1005,31 +759,19 @@ static struct omap_hwmod omap2430_timer11_hwmod = {
         },
         .slaves         = omap2430_timer11_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2430_timer11_slaves),
-        .class          = &omap2430_timer_hwmod_class,
+        .class          = &omap2xxx_timer_hwmod_class,
         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2430)
 };
 
 /* timer12 */
 static struct omap_hwmod omap2430_timer12_hwmod;
-static struct omap_hwmod_irq_info omap2430_timer12_mpu_irqs[] = {
-        { .irq = 48, },
-};
-
-static struct omap_hwmod_addr_space omap2430_timer12_addrs[] = {
-        {
-                .pa_start       = 0x4808a000,
-                .pa_end         = 0x4808a000 + SZ_1K - 1,
-                .flags          = ADDR_TYPE_RT
-        },
-};
 
 /* l4_core -> timer12 */
 static struct omap_hwmod_ocp_if omap2430_l4_core__timer12 = {
         .master         = &omap2430_l4_core_hwmod,
         .slave          = &omap2430_timer12_hwmod,
         .clk            = "gpt12_ick",
-        .addr           = omap2430_timer12_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap2430_timer12_addrs),
+        .addr           = omap2xxx_timer12_addrs,
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -1041,8 +783,7 @@ static struct omap_hwmod_ocp_if *omap2430_timer12_slaves[] = {
 /* timer12 hwmod */
 static struct omap_hwmod omap2430_timer12_hwmod = {
         .name           = "timer12",
-        .mpu_irqs       = omap2430_timer12_mpu_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap2430_timer12_mpu_irqs),
+        .mpu_irqs       = omap2xxx_timer12_mpu_irqs,
         .main_clk       = "gpt12_fck",
         .prcm           = {
                 .omap2 = {
@@ -1055,7 +796,7 @@ static struct omap_hwmod omap2430_timer12_hwmod = {
         },
         .slaves         = omap2430_timer12_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2430_timer12_slaves),
-        .class          = &omap2430_timer_hwmod_class,
+        .class          = &omap2xxx_timer_hwmod_class,
         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2430)
 };
 
@@ -1066,6 +807,7 @@ static struct omap_hwmod_addr_space omap2430_wd_timer2_addrs[] = {
                 .pa_end         = 0x4901607f,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 static struct omap_hwmod_ocp_if omap2430_l4_wkup__wd_timer2 = {
@@ -1073,31 +815,9 @@ static struct omap_hwmod_ocp_if omap2430_l4_wkup__wd_timer2 = {
         .slave          = &omap2430_wd_timer2_hwmod,
         .clk            = "mpu_wdt_ick",
         .addr           = omap2430_wd_timer2_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap2430_wd_timer2_addrs),
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
-/*
- * 'wd_timer' class
- * 32-bit watchdog upward counter that generates a pulse on the reset pin on
- * overflow condition
- */
-
-static struct omap_hwmod_class_sysconfig omap2430_wd_timer_sysc = {
-        .rev_offs       = 0x0,
-        .sysc_offs      = 0x0010,
-        .syss_offs      = 0x0014,
-        .sysc_flags     = (SYSC_HAS_EMUFREE | SYSC_HAS_SOFTRESET |
-                           SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS),
-        .sysc_fields    = &omap_hwmod_sysc_type1,
-};
-
-static struct omap_hwmod_class omap2430_wd_timer_hwmod_class = {
-        .name           = "wd_timer",
-        .sysc           = &omap2430_wd_timer_sysc,
-        .pre_shutdown   = &omap2_wd_timer_disable
-};
-
 /* wd_timer2 */
 static struct omap_hwmod_ocp_if *omap2430_wd_timer2_slaves[] = {
         &omap2430_l4_wkup__wd_timer2,
@@ -1105,7 +825,7 @@ static struct omap_hwmod_ocp_if *omap2430_wd_timer2_slaves[] = {
 
 static struct omap_hwmod omap2430_wd_timer2_hwmod = {
         .name           = "wd_timer2",
-        .class          = &omap2430_wd_timer_hwmod_class,
+        .class          = &omap2xxx_wd_timer_hwmod_class,
         .main_clk       = "mpu_wdt_fck",
         .prcm           = {
                 .omap2 = {
@@ -1121,45 +841,16 @@ static struct omap_hwmod omap2430_wd_timer2_hwmod = {
         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
 };
 
-/* UART */
-
-static struct omap_hwmod_class_sysconfig uart_sysc = {
-        .rev_offs       = 0x50,
-        .sysc_offs      = 0x54,
-        .syss_offs      = 0x58,
-        .sysc_flags     = (SYSC_HAS_SIDLEMODE |
-                           SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET |
-                           SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS),
-        .idlemodes      = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
-        .sysc_fields    = &omap_hwmod_sysc_type1,
-};
-
-static struct omap_hwmod_class uart_class = {
-        .name = "uart",
-        .sysc = &uart_sysc,
-};
-
 /* UART1 */
 
-static struct omap_hwmod_irq_info uart1_mpu_irqs[] = {
-        { .irq = INT_24XX_UART1_IRQ, },
-};
-
-static struct omap_hwmod_dma_info uart1_sdma_reqs[] = {
-        { .name = "rx", .dma_req = OMAP24XX_DMA_UART1_RX, },
-        { .name = "tx", .dma_req = OMAP24XX_DMA_UART1_TX, },
-};
-
 static struct omap_hwmod_ocp_if *omap2430_uart1_slaves[] = {
         &omap2_l4_core__uart1,
 };
 
 static struct omap_hwmod omap2430_uart1_hwmod = {
         .name           = "uart1",
-        .mpu_irqs       = uart1_mpu_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(uart1_mpu_irqs),
-        .sdma_reqs      = uart1_sdma_reqs,
-        .sdma_reqs_cnt  = ARRAY_SIZE(uart1_sdma_reqs),
+        .mpu_irqs       = omap2_uart1_mpu_irqs,
+        .sdma_reqs      = omap2_uart1_sdma_reqs,
         .main_clk       = "uart1_fck",
         .prcm           = {
                 .omap2 = {
@@ -1172,31 +863,20 @@ static struct omap_hwmod omap2430_uart1_hwmod = {
         },
         .slaves         = omap2430_uart1_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2430_uart1_slaves),
-        .class          = &uart_class,
+        .class          = &omap2_uart_class,
         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
 };
 
 /* UART2 */
 
-static struct omap_hwmod_irq_info uart2_mpu_irqs[] = {
-        { .irq = INT_24XX_UART2_IRQ, },
-};
-
-static struct omap_hwmod_dma_info uart2_sdma_reqs[] = {
-        { .name = "rx", .dma_req = OMAP24XX_DMA_UART2_RX, },
-        { .name = "tx", .dma_req = OMAP24XX_DMA_UART2_TX, },
-};
-
 static struct omap_hwmod_ocp_if *omap2430_uart2_slaves[] = {
         &omap2_l4_core__uart2,
 };
 
 static struct omap_hwmod omap2430_uart2_hwmod = {
         .name           = "uart2",
-        .mpu_irqs       = uart2_mpu_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(uart2_mpu_irqs),
-        .sdma_reqs      = uart2_sdma_reqs,
-        .sdma_reqs_cnt  = ARRAY_SIZE(uart2_sdma_reqs),
+        .mpu_irqs       = omap2_uart2_mpu_irqs,
+        .sdma_reqs      = omap2_uart2_sdma_reqs,
         .main_clk       = "uart2_fck",
         .prcm           = {
                 .omap2 = {
@@ -1209,31 +889,20 @@ static struct omap_hwmod omap2430_uart2_hwmod = {
         },
         .slaves         = omap2430_uart2_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2430_uart2_slaves),
-        .class          = &uart_class,
+        .class          = &omap2_uart_class,
         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
 };
 
 /* UART3 */
 
-static struct omap_hwmod_irq_info uart3_mpu_irqs[] = {
-        { .irq = INT_24XX_UART3_IRQ, },
-};
-
-static struct omap_hwmod_dma_info uart3_sdma_reqs[] = {
-        { .name = "rx", .dma_req = OMAP24XX_DMA_UART3_RX, },
-        { .name = "tx", .dma_req = OMAP24XX_DMA_UART3_TX, },
-};
-
 static struct omap_hwmod_ocp_if *omap2430_uart3_slaves[] = {
         &omap2_l4_core__uart3,
 };
 
 static struct omap_hwmod omap2430_uart3_hwmod = {
         .name           = "uart3",
-        .mpu_irqs       = uart3_mpu_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(uart3_mpu_irqs),
-        .sdma_reqs      = uart3_sdma_reqs,
-        .sdma_reqs_cnt  = ARRAY_SIZE(uart3_sdma_reqs),
+        .mpu_irqs       = omap2_uart3_mpu_irqs,
+        .sdma_reqs      = omap2_uart3_sdma_reqs,
         .main_clk       = "uart3_fck",
         .prcm           = {
                 .omap2 = {
@@ -1246,53 +915,22 @@ static struct omap_hwmod omap2430_uart3_hwmod = {
         },
         .slaves         = omap2430_uart3_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2430_uart3_slaves),
-        .class          = &uart_class,
+        .class          = &omap2_uart_class,
         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
 };
 
-/*
- * 'dss' class
- * display sub-system
- */
-
-static struct omap_hwmod_class_sysconfig omap2430_dss_sysc = {
-        .rev_offs       = 0x0000,
-        .sysc_offs      = 0x0010,
-        .syss_offs      = 0x0014,
-        .sysc_flags     = (SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE),
-        .sysc_fields    = &omap_hwmod_sysc_type1,
-};
-
-static struct omap_hwmod_class omap2430_dss_hwmod_class = {
-        .name = "dss",
-        .sysc = &omap2430_dss_sysc,
-};
-
-static struct omap_hwmod_dma_info omap2430_dss_sdma_chs[] = {
-        { .name = "dispc", .dma_req = 5 },
-};
-
 /* dss */
 /* dss master ports */
 static struct omap_hwmod_ocp_if *omap2430_dss_masters[] = {
         &omap2430_dss__l3,
 };
 
-static struct omap_hwmod_addr_space omap2430_dss_addrs[] = {
-        {
-                .pa_start       = 0x48050000,
-                .pa_end         = 0x480503FF,
-                .flags          = ADDR_TYPE_RT
-        },
-};
-
 /* l4_core -> dss */
 static struct omap_hwmod_ocp_if omap2430_l4_core__dss = {
         .master         = &omap2430_l4_core_hwmod,
         .slave          = &omap2430_dss_core_hwmod,
         .clk            = "dss_ick",
-        .addr           = omap2430_dss_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap2430_dss_addrs),
+        .addr           = omap2_dss_addrs,
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -1308,10 +946,9 @@ static struct omap_hwmod_opt_clk dss_opt_clks[] = {
 
 static struct omap_hwmod omap2430_dss_core_hwmod = {
         .name           = "dss_core",
-        .class          = &omap2430_dss_hwmod_class,
+        .class          = &omap2_dss_hwmod_class,
         .main_clk       = "dss1_fck", /* instead of dss_fck */
-        .sdma_reqs      = omap2430_dss_sdma_chs,
-        .sdma_reqs_cnt  = ARRAY_SIZE(omap2430_dss_sdma_chs),
+        .sdma_reqs      = omap2xxx_dss_sdma_chs,
         .prcm           = {
                 .omap2 = {
                         .prcm_reg_id = 1,
@@ -1331,46 +968,12 @@ static struct omap_hwmod omap2430_dss_core_hwmod = {
         .flags          = HWMOD_NO_IDLEST,
 };
 
-/*
- * 'dispc' class
- * display controller
- */
-
-static struct omap_hwmod_class_sysconfig omap2430_dispc_sysc = {
-        .rev_offs       = 0x0000,
-        .sysc_offs      = 0x0010,
-        .syss_offs      = 0x0014,
-        .sysc_flags     = (SYSC_HAS_SIDLEMODE | SYSC_HAS_MIDLEMODE |
-                           SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE),
-        .idlemodes      = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
-                           MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART),
-        .sysc_fields    = &omap_hwmod_sysc_type1,
-};
-
-static struct omap_hwmod_class omap2430_dispc_hwmod_class = {
-        .name = "dispc",
-        .sysc = &omap2430_dispc_sysc,
-};
-
-static struct omap_hwmod_irq_info omap2430_dispc_irqs[] = {
-        { .irq = 25 },
-};
-
-static struct omap_hwmod_addr_space omap2430_dss_dispc_addrs[] = {
-        {
-                .pa_start       = 0x48050400,
-                .pa_end         = 0x480507FF,
-                .flags          = ADDR_TYPE_RT
-        },
-};
-
 /* l4_core -> dss_dispc */
 static struct omap_hwmod_ocp_if omap2430_l4_core__dss_dispc = {
         .master         = &omap2430_l4_core_hwmod,
         .slave          = &omap2430_dss_dispc_hwmod,
         .clk            = "dss_ick",
-        .addr           = omap2430_dss_dispc_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap2430_dss_dispc_addrs),
+        .addr           = omap2_dss_dispc_addrs,
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -1381,9 +984,8 @@ static struct omap_hwmod_ocp_if *omap2430_dss_dispc_slaves[] = {
 
 static struct omap_hwmod omap2430_dss_dispc_hwmod = {
         .name           = "dss_dispc",
-        .class          = &omap2430_dispc_hwmod_class,
-        .mpu_irqs       = omap2430_dispc_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap2430_dispc_irqs),
+        .class          = &omap2_dispc_hwmod_class,
+        .mpu_irqs       = omap2_dispc_irqs,
         .main_clk       = "dss1_fck",
         .prcm           = {
                 .omap2 = {
@@ -1400,41 +1002,12 @@ static struct omap_hwmod omap2430_dss_dispc_hwmod = {
         .flags          = HWMOD_NO_IDLEST,
 };
 
-/*
- * 'rfbi' class
- * remote frame buffer interface
- */
-
-static struct omap_hwmod_class_sysconfig omap2430_rfbi_sysc = {
-        .rev_offs       = 0x0000,
-        .sysc_offs      = 0x0010,
-        .syss_offs      = 0x0014,
-        .sysc_flags     = (SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET |
-                           SYSC_HAS_AUTOIDLE),
-        .idlemodes      = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
-        .sysc_fields    = &omap_hwmod_sysc_type1,
-};
-
-static struct omap_hwmod_class omap2430_rfbi_hwmod_class = {
-        .name = "rfbi",
-        .sysc = &omap2430_rfbi_sysc,
-};
-
-static struct omap_hwmod_addr_space omap2430_dss_rfbi_addrs[] = {
-        {
-                .pa_start       = 0x48050800,
-                .pa_end         = 0x48050BFF,
-                .flags          = ADDR_TYPE_RT
-        },
-};
-
 /* l4_core -> dss_rfbi */
 static struct omap_hwmod_ocp_if omap2430_l4_core__dss_rfbi = {
         .master         = &omap2430_l4_core_hwmod,
         .slave          = &omap2430_dss_rfbi_hwmod,
         .clk            = "dss_ick",
-        .addr           = omap2430_dss_rfbi_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap2430_dss_rfbi_addrs),
+        .addr           = omap2_dss_rfbi_addrs,
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -1445,7 +1018,7 @@ static struct omap_hwmod_ocp_if *omap2430_dss_rfbi_slaves[] = {
 
 static struct omap_hwmod omap2430_dss_rfbi_hwmod = {
         .name           = "dss_rfbi",
-        .class          = &omap2430_rfbi_hwmod_class,
+        .class          = &omap2_rfbi_hwmod_class,
         .main_clk       = "dss1_fck",
         .prcm           = {
                 .omap2 = {
@@ -1460,31 +1033,12 @@ static struct omap_hwmod omap2430_dss_rfbi_hwmod = {
         .flags          = HWMOD_NO_IDLEST,
 };
 
-/*
- * 'venc' class
- * video encoder
- */
-
-static struct omap_hwmod_class omap2430_venc_hwmod_class = {
-        .name = "venc",
-};
-
-/* dss_venc */
-static struct omap_hwmod_addr_space omap2430_dss_venc_addrs[] = {
-        {
-                .pa_start       = 0x48050C00,
-                .pa_end         = 0x48050FFF,
-                .flags          = ADDR_TYPE_RT
-        },
-};
-
 /* l4_core -> dss_venc */
 static struct omap_hwmod_ocp_if omap2430_l4_core__dss_venc = {
         .master         = &omap2430_l4_core_hwmod,
         .slave          = &omap2430_dss_venc_hwmod,
         .clk            = "dss_54m_fck",
-        .addr           = omap2430_dss_venc_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap2430_dss_venc_addrs),
+        .addr           = omap2_dss_venc_addrs,
         .flags          = OCPIF_SWSUP_IDLE,
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
@@ -1496,7 +1050,7 @@ static struct omap_hwmod_ocp_if *omap2430_dss_venc_slaves[] = {
 
 static struct omap_hwmod omap2430_dss_venc_hwmod = {
         .name           = "dss_venc",
-        .class          = &omap2430_venc_hwmod_class,
+        .class          = &omap2_venc_hwmod_class,
         .main_clk       = "dss1_fck",
         .prcm           = {
                 .omap2 = {
@@ -1532,25 +1086,14 @@ static struct omap_i2c_dev_attr i2c_dev_attr = {
 
 /* I2C1 */
 
-static struct omap_hwmod_irq_info i2c1_mpu_irqs[] = {
-        { .irq = INT_24XX_I2C1_IRQ, },
-};
-
-static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = {
-        { .name = "tx", .dma_req = OMAP24XX_DMA_I2C1_TX },
-        { .name = "rx", .dma_req = OMAP24XX_DMA_I2C1_RX },
-};
-
 static struct omap_hwmod_ocp_if *omap2430_i2c1_slaves[] = {
         &omap2430_l4_core__i2c1,
 };
 
 static struct omap_hwmod omap2430_i2c1_hwmod = {
         .name           = "i2c1",
-        .mpu_irqs       = i2c1_mpu_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(i2c1_mpu_irqs),
-        .sdma_reqs      = i2c1_sdma_reqs,
-        .sdma_reqs_cnt  = ARRAY_SIZE(i2c1_sdma_reqs),
+        .mpu_irqs       = omap2_i2c1_mpu_irqs,
+        .sdma_reqs      = omap2_i2c1_sdma_reqs,
         .main_clk       = "i2chs1_fck",
         .prcm           = {
                 .omap2 = {
@@ -1578,25 +1121,14 @@ static struct omap_hwmod omap2430_i2c1_hwmod = {
 
 /* I2C2 */
 
-static struct omap_hwmod_irq_info i2c2_mpu_irqs[] = {
-        { .irq = INT_24XX_I2C2_IRQ, },
-};
-
-static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = {
-        { .name = "tx", .dma_req = OMAP24XX_DMA_I2C2_TX },
-        { .name = "rx", .dma_req = OMAP24XX_DMA_I2C2_RX },
-};
-
 static struct omap_hwmod_ocp_if *omap2430_i2c2_slaves[] = {
         &omap2430_l4_core__i2c2,
 };
 
 static struct omap_hwmod omap2430_i2c2_hwmod = {
         .name           = "i2c2",
-        .mpu_irqs       = i2c2_mpu_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(i2c2_mpu_irqs),
-        .sdma_reqs      = i2c2_sdma_reqs,
-        .sdma_reqs_cnt  = ARRAY_SIZE(i2c2_sdma_reqs),
+        .mpu_irqs       = omap2_i2c2_mpu_irqs,
+        .sdma_reqs      = omap2_i2c2_sdma_reqs,
         .main_clk       = "i2chs2_fck",
         .prcm           = {
                 .omap2 = {
@@ -1621,6 +1153,7 @@ static struct omap_hwmod_addr_space omap2430_gpio1_addr_space[] = {
                 .pa_end         = 0x4900C1ff,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 static struct omap_hwmod_ocp_if omap2430_l4_wkup__gpio1 = {
@@ -1628,7 +1161,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_wkup__gpio1 = {
         .slave          = &omap2430_gpio1_hwmod,
         .clk            = "gpios_ick",
         .addr           = omap2430_gpio1_addr_space,
-        .addr_cnt       = ARRAY_SIZE(omap2430_gpio1_addr_space),
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -1639,6 +1171,7 @@ static struct omap_hwmod_addr_space omap2430_gpio2_addr_space[] = {
                 .pa_end         = 0x4900E1ff,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 static struct omap_hwmod_ocp_if omap2430_l4_wkup__gpio2 = {
@@ -1646,7 +1179,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_wkup__gpio2 = {
         .slave          = &omap2430_gpio2_hwmod,
         .clk            = "gpios_ick",
         .addr           = omap2430_gpio2_addr_space,
-        .addr_cnt       = ARRAY_SIZE(omap2430_gpio2_addr_space),
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -1657,6 +1189,7 @@ static struct omap_hwmod_addr_space omap2430_gpio3_addr_space[] = {
                 .pa_end         = 0x490101ff,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 static struct omap_hwmod_ocp_if omap2430_l4_wkup__gpio3 = {
@@ -1664,7 +1197,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_wkup__gpio3 = {
         .slave          = &omap2430_gpio3_hwmod,
         .clk            = "gpios_ick",
         .addr           = omap2430_gpio3_addr_space,
-        .addr_cnt       = ARRAY_SIZE(omap2430_gpio3_addr_space),
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -1675,6 +1207,7 @@ static struct omap_hwmod_addr_space omap2430_gpio4_addr_space[] = {
                 .pa_end         = 0x490121ff,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 static struct omap_hwmod_ocp_if omap2430_l4_wkup__gpio4 = {
@@ -1682,7 +1215,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_wkup__gpio4 = {
         .slave          = &omap2430_gpio4_hwmod,
         .clk            = "gpios_ick",
         .addr           = omap2430_gpio4_addr_space,
-        .addr_cnt       = ARRAY_SIZE(omap2430_gpio4_addr_space),
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -1693,6 +1225,7 @@ static struct omap_hwmod_addr_space omap2430_gpio5_addr_space[] = {
                 .pa_end         = 0x480B61ff,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 static struct omap_hwmod_ocp_if omap2430_l4_core__gpio5 = {
@@ -1700,7 +1233,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__gpio5 = {
         .slave          = &omap2430_gpio5_hwmod,
         .clk            = "gpio5_ick",
         .addr           = omap2430_gpio5_addr_space,
-        .addr_cnt       = ARRAY_SIZE(omap2430_gpio5_addr_space),
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -1710,32 +1242,7 @@ static struct omap_gpio_dev_attr gpio_dev_attr = {
         .dbck_flag = false,
 };
 
-static struct omap_hwmod_class_sysconfig omap243x_gpio_sysc = {
-        .rev_offs       = 0x0000,
-        .sysc_offs      = 0x0010,
-        .syss_offs      = 0x0014,
-        .sysc_flags     = (SYSC_HAS_ENAWAKEUP | SYSC_HAS_SIDLEMODE |
-                           SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE |
-                           SYSS_HAS_RESET_STATUS),
-        .idlemodes      = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
-        .sysc_fields    = &omap_hwmod_sysc_type1,
-};
-
-/*
- * 'gpio' class
- * general purpose io module
- */
-static struct omap_hwmod_class omap243x_gpio_hwmod_class = {
-        .name = "gpio",
-        .sysc = &omap243x_gpio_sysc,
-        .rev = 0,
-};
-
 /* gpio1 */
-static struct omap_hwmod_irq_info omap243x_gpio1_irqs[] = {
-        { .irq = 29 }, /* INT_24XX_GPIO_BANK1 */
-};
-
 static struct omap_hwmod_ocp_if *omap2430_gpio1_slaves[] = {
         &omap2430_l4_wkup__gpio1,
 };
@@ -1743,8 +1250,7 @@ static struct omap_hwmod_ocp_if *omap2430_gpio1_slaves[] = {
 static struct omap_hwmod omap2430_gpio1_hwmod = {
         .name           = "gpio1",
         .flags          = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
-        .mpu_irqs       = omap243x_gpio1_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap243x_gpio1_irqs),
+        .mpu_irqs       = omap2_gpio1_irqs,
         .main_clk       = "gpios_fck",
         .prcm           = {
                 .omap2 = {
@@ -1757,16 +1263,12 @@ static struct omap_hwmod omap2430_gpio1_hwmod = {
         },
         .slaves         = omap2430_gpio1_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2430_gpio1_slaves),
-        .class          = &omap243x_gpio_hwmod_class,
+        .class          = &omap2xxx_gpio_hwmod_class,
         .dev_attr       = &gpio_dev_attr,
         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
 };
 
 /* gpio2 */
-static struct omap_hwmod_irq_info omap243x_gpio2_irqs[] = {
-        { .irq = 30 }, /* INT_24XX_GPIO_BANK2 */
-};
-
 static struct omap_hwmod_ocp_if *omap2430_gpio2_slaves[] = {
         &omap2430_l4_wkup__gpio2,
 };
@@ -1774,8 +1276,7 @@ static struct omap_hwmod_ocp_if *omap2430_gpio2_slaves[] = {
 static struct omap_hwmod omap2430_gpio2_hwmod = {
         .name           = "gpio2",
         .flags          = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
-        .mpu_irqs       = omap243x_gpio2_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap243x_gpio2_irqs),
+        .mpu_irqs       = omap2_gpio2_irqs,
         .main_clk       = "gpios_fck",
         .prcm           = {
                 .omap2 = {
@@ -1788,16 +1289,12 @@ static struct omap_hwmod omap2430_gpio2_hwmod = {
         },
         .slaves         = omap2430_gpio2_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2430_gpio2_slaves),
-        .class          = &omap243x_gpio_hwmod_class,
+        .class          = &omap2xxx_gpio_hwmod_class,
         .dev_attr       = &gpio_dev_attr,
         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
 };
 
 /* gpio3 */
-static struct omap_hwmod_irq_info omap243x_gpio3_irqs[] = {
-        { .irq = 31 }, /* INT_24XX_GPIO_BANK3 */
-};
-
 static struct omap_hwmod_ocp_if *omap2430_gpio3_slaves[] = {
         &omap2430_l4_wkup__gpio3,
 };
@@ -1805,8 +1302,7 @@ static struct omap_hwmod_ocp_if *omap2430_gpio3_slaves[] = {
 static struct omap_hwmod omap2430_gpio3_hwmod = {
         .name           = "gpio3",
         .flags          = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
-        .mpu_irqs       = omap243x_gpio3_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap243x_gpio3_irqs),
+        .mpu_irqs       = omap2_gpio3_irqs,
         .main_clk       = "gpios_fck",
         .prcm           = {
                 .omap2 = {
@@ -1819,16 +1315,12 @@ static struct omap_hwmod omap2430_gpio3_hwmod = {
         },
         .slaves         = omap2430_gpio3_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2430_gpio3_slaves),
-        .class          = &omap243x_gpio_hwmod_class,
+        .class          = &omap2xxx_gpio_hwmod_class,
         .dev_attr       = &gpio_dev_attr,
         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
 };
 
 /* gpio4 */
-static struct omap_hwmod_irq_info omap243x_gpio4_irqs[] = {
-        { .irq = 32 }, /* INT_24XX_GPIO_BANK4 */
-};
-
 static struct omap_hwmod_ocp_if *omap2430_gpio4_slaves[] = {
         &omap2430_l4_wkup__gpio4,
 };
@@ -1836,8 +1328,7 @@ static struct omap_hwmod_ocp_if *omap2430_gpio4_slaves[] = {
 static struct omap_hwmod omap2430_gpio4_hwmod = {
         .name           = "gpio4",
         .flags          = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
-        .mpu_irqs       = omap243x_gpio4_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap243x_gpio4_irqs),
+        .mpu_irqs       = omap2_gpio4_irqs,
         .main_clk       = "gpios_fck",
         .prcm           = {
                 .omap2 = {
@@ -1850,7 +1341,7 @@ static struct omap_hwmod omap2430_gpio4_hwmod = {
         },
         .slaves         = omap2430_gpio4_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2430_gpio4_slaves),
-        .class          = &omap243x_gpio_hwmod_class,
+        .class          = &omap2xxx_gpio_hwmod_class,
         .dev_attr       = &gpio_dev_attr,
         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
 };
@@ -1858,6 +1349,7 @@ static struct omap_hwmod omap2430_gpio4_hwmod = {
 /* gpio5 */
 static struct omap_hwmod_irq_info omap243x_gpio5_irqs[] = {
         { .irq = 33 }, /* INT_24XX_GPIO_BANK5 */
+        { .irq = -1 }
 };
 
 static struct omap_hwmod_ocp_if *omap2430_gpio5_slaves[] = {
@@ -1868,7 +1360,6 @@ static struct omap_hwmod omap2430_gpio5_hwmod = {
         .name           = "gpio5",
         .flags          = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
         .mpu_irqs       = omap243x_gpio5_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap243x_gpio5_irqs),
         .main_clk       = "gpio5_fck",
         .prcm           = {
                 .omap2 = {
@@ -1881,28 +1372,11 @@ static struct omap_hwmod omap2430_gpio5_hwmod = {
         },
         .slaves         = omap2430_gpio5_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2430_gpio5_slaves),
-        .class          = &omap243x_gpio_hwmod_class,
+        .class          = &omap2xxx_gpio_hwmod_class,
         .dev_attr       = &gpio_dev_attr,
         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
 };
 
-/* dma_system */
-static struct omap_hwmod_class_sysconfig omap2430_dma_sysc = {
-        .rev_offs       = 0x0000,
-        .sysc_offs      = 0x002c,
-        .syss_offs      = 0x0028,
-        .sysc_flags     = (SYSC_HAS_SOFTRESET | SYSC_HAS_MIDLEMODE |
-                           SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_EMUFREE |
-                           SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS),
-        .idlemodes      = (MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART),
-        .sysc_fields    = &omap_hwmod_sysc_type1,
-};
-
-static struct omap_hwmod_class omap2430_dma_hwmod_class = {
-        .name = "dma",
-        .sysc = &omap2430_dma_sysc,
-};
-
 /* dma attributes */
 static struct omap_dma_dev_attr dma_dev_attr = {
         .dev_caps  = RESERVE_CHANNEL | DMA_LINKED_LCH | GLOBAL_PRIORITY |
@@ -1910,21 +1384,6 @@ static struct omap_dma_dev_attr dma_dev_attr = {
         .lch_count = 32,
 };
 
-static struct omap_hwmod_irq_info omap2430_dma_system_irqs[] = {
-        { .name = "0", .irq = 12 }, /* INT_24XX_SDMA_IRQ0 */
-        { .name = "1", .irq = 13 }, /* INT_24XX_SDMA_IRQ1 */
-        { .name = "2", .irq = 14 }, /* INT_24XX_SDMA_IRQ2 */
-        { .name = "3", .irq = 15 }, /* INT_24XX_SDMA_IRQ3 */
-};
-
-static struct omap_hwmod_addr_space omap2430_dma_system_addrs[] = {
-        {
-                .pa_start       = 0x48056000,
-                .pa_end         = 0x48056fff,
-                .flags          = ADDR_TYPE_RT
-        },
-};
-
 /* dma_system -> L3 */
 static struct omap_hwmod_ocp_if omap2430_dma_system__l3 = {
         .master         = &omap2430_dma_system_hwmod,
@@ -1943,8 +1402,7 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__dma_system = {
         .master         = &omap2430_l4_core_hwmod,
         .slave          = &omap2430_dma_system_hwmod,
         .clk            = "sdma_ick",
-        .addr           = omap2430_dma_system_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap2430_dma_system_addrs),
+        .addr           = omap2_dma_system_addrs,
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -1955,9 +1413,8 @@ static struct omap_hwmod_ocp_if *omap2430_dma_system_slaves[] = {
 
 static struct omap_hwmod omap2430_dma_system_hwmod = {
         .name           = "dma",
-        .class          = &omap2430_dma_hwmod_class,
-        .mpu_irqs       = omap2430_dma_system_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap2430_dma_system_irqs),
+        .class          = &omap2xxx_dma_hwmod_class,
+        .mpu_irqs       = omap2_dma_system_irqs,
         .main_clk       = "core_l3_ck",
         .slaves         = omap2430_dma_system_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2430_dma_system_slaves),
@@ -1968,47 +1425,18 @@ static struct omap_hwmod omap2430_dma_system_hwmod = {
         .flags          = HWMOD_NO_IDLEST,
 };
 
-/*
- * 'mailbox' class
- * mailbox module allowing communication between the on-chip processors
- * using a queued mailbox-interrupt mechanism.
- */
-
-static struct omap_hwmod_class_sysconfig omap2430_mailbox_sysc = {
-        .rev_offs       = 0x000,
-        .sysc_offs      = 0x010,
-        .syss_offs      = 0x014,
-        .sysc_flags     = (SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_SIDLEMODE |
-                                SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE),
-        .idlemodes      = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
-        .sysc_fields    = &omap_hwmod_sysc_type1,
-};
-
-static struct omap_hwmod_class omap2430_mailbox_hwmod_class = {
-        .name = "mailbox",
-        .sysc = &omap2430_mailbox_sysc,
-};
-
 /* mailbox */
 static struct omap_hwmod omap2430_mailbox_hwmod;
 static struct omap_hwmod_irq_info omap2430_mailbox_irqs[] = {
         { .irq = 26 },
-};
-
-static struct omap_hwmod_addr_space omap2430_mailbox_addrs[] = {
-        {
-                .pa_start       = 0x48094000,
-                .pa_end         = 0x480941ff,
-                .flags          = ADDR_TYPE_RT,
-        },
+        { .irq = -1 }
 };
 
 /* l4_core -> mailbox */
 static struct omap_hwmod_ocp_if omap2430_l4_core__mailbox = {
         .master         = &omap2430_l4_core_hwmod,
         .slave          = &omap2430_mailbox_hwmod,
-        .addr           = omap2430_mailbox_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap2430_mailbox_addrs),
+        .addr           = omap2_mailbox_addrs,
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -2019,9 +1447,8 @@ static struct omap_hwmod_ocp_if *omap2430_mailbox_slaves[] = {
 
 static struct omap_hwmod omap2430_mailbox_hwmod = {
         .name           = "mailbox",
-        .class          = &omap2430_mailbox_hwmod_class,
+        .class          = &omap2xxx_mailbox_hwmod_class,
         .mpu_irqs       = omap2430_mailbox_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap2430_mailbox_irqs),
         .main_clk       = "mailboxes_ick",
         .prcm           = {
                 .omap2 = {
@@ -2037,45 +1464,7 @@ static struct omap_hwmod omap2430_mailbox_hwmod = {
         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
 };
 
-/*
- * 'mcspi' class
- * multichannel serial port interface (mcspi) / master/slave synchronous serial
- * bus
- */
-
-static struct omap_hwmod_class_sysconfig omap2430_mcspi_sysc = {
-        .rev_offs       = 0x0000,
-        .sysc_offs      = 0x0010,
-        .syss_offs      = 0x0014,
-        .sysc_flags     = (SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_SIDLEMODE |
-                                SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET |
-                                SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS),
-        .idlemodes      = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
-        .sysc_fields    = &omap_hwmod_sysc_type1,
-};
-
-static struct omap_hwmod_class omap2430_mcspi_class = {
-        .name = "mcspi",
-        .sysc = &omap2430_mcspi_sysc,
-        .rev = OMAP2_MCSPI_REV,
-};
-
 /* mcspi1 */
-static struct omap_hwmod_irq_info omap2430_mcspi1_mpu_irqs[] = {
-        { .irq = 65 },
-};
-
-static struct omap_hwmod_dma_info omap2430_mcspi1_sdma_reqs[] = {
-        { .name = "tx0", .dma_req = 35 }, /* DMA_SPI1_TX0 */
-        { .name = "rx0", .dma_req = 36 }, /* DMA_SPI1_RX0 */
-        { .name = "tx1", .dma_req = 37 }, /* DMA_SPI1_TX1 */
-        { .name = "rx1", .dma_req = 38 }, /* DMA_SPI1_RX1 */
-        { .name = "tx2", .dma_req = 39 }, /* DMA_SPI1_TX2 */
-        { .name = "rx2", .dma_req = 40 }, /* DMA_SPI1_RX2 */
-        { .name = "tx3", .dma_req = 41 }, /* DMA_SPI1_TX3 */
-        { .name = "rx3", .dma_req = 42 }, /* DMA_SPI1_RX3 */
-};
-
 static struct omap_hwmod_ocp_if *omap2430_mcspi1_slaves[] = {
         &omap2430_l4_core__mcspi1,
 };
@@ -2086,10 +1475,8 @@ static struct omap2_mcspi_dev_attr omap_mcspi1_dev_attr = {
 
 static struct omap_hwmod omap2430_mcspi1_hwmod = {
         .name           = "mcspi1_hwmod",
-        .mpu_irqs       = omap2430_mcspi1_mpu_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap2430_mcspi1_mpu_irqs),
-        .sdma_reqs      = omap2430_mcspi1_sdma_reqs,
-        .sdma_reqs_cnt  = ARRAY_SIZE(omap2430_mcspi1_sdma_reqs),
+        .mpu_irqs       = omap2_mcspi1_mpu_irqs,
+        .sdma_reqs      = omap2_mcspi1_sdma_reqs,
         .main_clk       = "mcspi1_fck",
         .prcm           = {
                 .omap2 = {
@@ -2102,23 +1489,12 @@ static struct omap_hwmod omap2430_mcspi1_hwmod = {
         },
         .slaves         = omap2430_mcspi1_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2430_mcspi1_slaves),
-        .class          = &omap2430_mcspi_class,
-        .dev_attr       = &omap_mcspi1_dev_attr,
+        .class          = &omap2xxx_mcspi_class,
+        .dev_attr       = &omap_mcspi1_dev_attr,
         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
 };
 
 /* mcspi2 */
-static struct omap_hwmod_irq_info omap2430_mcspi2_mpu_irqs[] = {
-        { .irq = 66 },
-};
-
-static struct omap_hwmod_dma_info omap2430_mcspi2_sdma_reqs[] = {
-        { .name = "tx0", .dma_req = 43 }, /* DMA_SPI2_TX0 */
-        { .name = "rx0", .dma_req = 44 }, /* DMA_SPI2_RX0 */
-        { .name = "tx1", .dma_req = 45 }, /* DMA_SPI2_TX1 */
-        { .name = "rx1", .dma_req = 46 }, /* DMA_SPI2_RX1 */
-};
-
 static struct omap_hwmod_ocp_if *omap2430_mcspi2_slaves[] = {
         &omap2430_l4_core__mcspi2,
 };
@@ -2129,10 +1505,8 @@ static struct omap2_mcspi_dev_attr omap_mcspi2_dev_attr = {
 
 static struct omap_hwmod omap2430_mcspi2_hwmod = {
         .name           = "mcspi2_hwmod",
-        .mpu_irqs       = omap2430_mcspi2_mpu_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap2430_mcspi2_mpu_irqs),
-        .sdma_reqs      = omap2430_mcspi2_sdma_reqs,
-        .sdma_reqs_cnt  = ARRAY_SIZE(omap2430_mcspi2_sdma_reqs),
+        .mpu_irqs       = omap2_mcspi2_mpu_irqs,
+        .sdma_reqs      = omap2_mcspi2_sdma_reqs,
         .main_clk       = "mcspi2_fck",
         .prcm           = {
                 .omap2 = {
@@ -2145,14 +1519,15 @@ static struct omap_hwmod omap2430_mcspi2_hwmod = {
         },
         .slaves         = omap2430_mcspi2_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2430_mcspi2_slaves),
-        .class          = &omap2430_mcspi_class,
-        .dev_attr       = &omap_mcspi2_dev_attr,
+        .class          = &omap2xxx_mcspi_class,
+        .dev_attr       = &omap_mcspi2_dev_attr,
         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
 };
 
 /* mcspi3 */
 static struct omap_hwmod_irq_info omap2430_mcspi3_mpu_irqs[] = {
         { .irq = 91 },
+        { .irq = -1 }
 };
 
 static struct omap_hwmod_dma_info omap2430_mcspi3_sdma_reqs[] = {
@@ -2160,6 +1535,7 @@ static struct omap_hwmod_dma_info omap2430_mcspi3_sdma_reqs[] = {
         { .name = "rx0", .dma_req = 16 }, /* DMA_SPI3_RX0 */
         { .name = "tx1", .dma_req = 23 }, /* DMA_SPI3_TX1 */
         { .name = "rx1", .dma_req = 24 }, /* DMA_SPI3_RX1 */
+        { .dma_req = -1 }
 };
 
 static struct omap_hwmod_ocp_if *omap2430_mcspi3_slaves[] = {
@@ -2173,9 +1549,7 @@ static struct omap2_mcspi_dev_attr omap_mcspi3_dev_attr = {
 static struct omap_hwmod omap2430_mcspi3_hwmod = {
         .name           = "mcspi3_hwmod",
         .mpu_irqs       = omap2430_mcspi3_mpu_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap2430_mcspi3_mpu_irqs),
         .sdma_reqs      = omap2430_mcspi3_sdma_reqs,
-        .sdma_reqs_cnt  = ARRAY_SIZE(omap2430_mcspi3_sdma_reqs),
         .main_clk       = "mcspi3_fck",
         .prcm           = {
                 .omap2 = {
@@ -2188,8 +1562,8 @@ static struct omap_hwmod omap2430_mcspi3_hwmod = {
         },
         .slaves         = omap2430_mcspi3_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2430_mcspi3_slaves),
-        .class          = &omap2430_mcspi_class,
-        .dev_attr       = &omap_mcspi3_dev_attr,
+        .class          = &omap2xxx_mcspi_class,
+        .dev_attr       = &omap_mcspi3_dev_attr,
         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
 };
 
@@ -2218,12 +1592,12 @@ static struct omap_hwmod_irq_info omap2430_usbhsotg_mpu_irqs[] = {
 
         { .name = "mc", .irq = 92 },
         { .name = "dma", .irq = 93 },
+        { .irq = -1 }
 };
 
 static struct omap_hwmod omap2430_usbhsotg_hwmod = {
         .name           = "usb_otg_hs",
         .mpu_irqs       = omap2430_usbhsotg_mpu_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap2430_usbhsotg_mpu_irqs),
         .main_clk       = "usbhs_ick",
         .prcm           = {
                 .omap2 = {
@@ -2273,20 +1647,7 @@ static struct omap_hwmod_irq_info omap2430_mcbsp1_irqs[] = {
         { .name = "rx",         .irq = 60 },
         { .name = "ovr",        .irq = 61 },
         { .name = "common",     .irq = 64 },
-};
-
-static struct omap_hwmod_dma_info omap2430_mcbsp1_sdma_chs[] = {
-        { .name = "rx", .dma_req = 32 },
-        { .name = "tx", .dma_req = 31 },
-};
-
-static struct omap_hwmod_addr_space omap2430_mcbsp1_addrs[] = {
-        {
-                .name           = "mpu",
-                .pa_start       = 0x48074000,
-                .pa_end         = 0x480740ff,
-                .flags          = ADDR_TYPE_RT
-        },
+        { .irq = -1 }
 };
 
 /* l4_core -> mcbsp1 */
@@ -2294,8 +1655,7 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp1 = {
         .master         = &omap2430_l4_core_hwmod,
         .slave          = &omap2430_mcbsp1_hwmod,
         .clk            = "mcbsp1_ick",
-        .addr           = omap2430_mcbsp1_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap2430_mcbsp1_addrs),
+        .addr           = omap2_mcbsp1_addrs,
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -2308,9 +1668,7 @@ static struct omap_hwmod omap2430_mcbsp1_hwmod = {
         .name           = "mcbsp1",
         .class          = &omap2430_mcbsp_hwmod_class,
         .mpu_irqs       = omap2430_mcbsp1_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap2430_mcbsp1_irqs),
-        .sdma_reqs      = omap2430_mcbsp1_sdma_chs,
-        .sdma_reqs_cnt  = ARRAY_SIZE(omap2430_mcbsp1_sdma_chs),
+        .sdma_reqs      = omap2_mcbsp1_sdma_reqs,
         .main_clk       = "mcbsp1_fck",
         .prcm           = {
                 .omap2 = {
@@ -2331,20 +1689,7 @@ static struct omap_hwmod_irq_info omap2430_mcbsp2_irqs[] = {
         { .name = "tx",         .irq = 62 },
         { .name = "rx",         .irq = 63 },
         { .name = "common",     .irq = 16 },
-};
-
-static struct omap_hwmod_dma_info omap2430_mcbsp2_sdma_chs[] = {
-        { .name = "rx", .dma_req = 34 },
-        { .name = "tx", .dma_req = 33 },
-};
-
-static struct omap_hwmod_addr_space omap2430_mcbsp2_addrs[] = {
-        {
-                .name           = "mpu",
-                .pa_start       = 0x48076000,
-                .pa_end         = 0x480760ff,
-                .flags          = ADDR_TYPE_RT
-        },
+        { .irq = -1 }
 };
 
 /* l4_core -> mcbsp2 */
@@ -2352,8 +1697,7 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp2 = {
         .master         = &omap2430_l4_core_hwmod,
         .slave          = &omap2430_mcbsp2_hwmod,
         .clk            = "mcbsp2_ick",
-        .addr           = omap2430_mcbsp2_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap2430_mcbsp2_addrs),
+        .addr           = omap2xxx_mcbsp2_addrs,
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -2366,9 +1710,7 @@ static struct omap_hwmod omap2430_mcbsp2_hwmod = {
         .name           = "mcbsp2",
         .class          = &omap2430_mcbsp_hwmod_class,
         .mpu_irqs       = omap2430_mcbsp2_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap2430_mcbsp2_irqs),
-        .sdma_reqs      = omap2430_mcbsp2_sdma_chs,
-        .sdma_reqs_cnt  = ARRAY_SIZE(omap2430_mcbsp2_sdma_chs),
+        .sdma_reqs      = omap2_mcbsp2_sdma_reqs,
         .main_clk       = "mcbsp2_fck",
         .prcm           = {
                 .omap2 = {
@@ -2389,11 +1731,7 @@ static struct omap_hwmod_irq_info omap2430_mcbsp3_irqs[] = {
         { .name = "tx",         .irq = 89 },
         { .name = "rx",         .irq = 90 },
         { .name = "common",     .irq = 17 },
-};
-
-static struct omap_hwmod_dma_info omap2430_mcbsp3_sdma_chs[] = {
-        { .name = "rx", .dma_req = 18 },
-        { .name = "tx", .dma_req = 17 },
+        { .irq = -1 }
 };
 
 static struct omap_hwmod_addr_space omap2430_mcbsp3_addrs[] = {
@@ -2403,6 +1741,7 @@ static struct omap_hwmod_addr_space omap2430_mcbsp3_addrs[] = {
                 .pa_end         = 0x4808C0ff,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* l4_core -> mcbsp3 */
@@ -2411,7 +1750,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp3 = {
         .slave          = &omap2430_mcbsp3_hwmod,
         .clk            = "mcbsp3_ick",
         .addr           = omap2430_mcbsp3_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap2430_mcbsp3_addrs),
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -2424,9 +1762,7 @@ static struct omap_hwmod omap2430_mcbsp3_hwmod = {
         .name           = "mcbsp3",
         .class          = &omap2430_mcbsp_hwmod_class,
         .mpu_irqs       = omap2430_mcbsp3_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap2430_mcbsp3_irqs),
-        .sdma_reqs      = omap2430_mcbsp3_sdma_chs,
-        .sdma_reqs_cnt  = ARRAY_SIZE(omap2430_mcbsp3_sdma_chs),
+        .sdma_reqs      = omap2_mcbsp3_sdma_reqs,
         .main_clk       = "mcbsp3_fck",
         .prcm           = {
                 .omap2 = {
@@ -2447,11 +1783,13 @@ static struct omap_hwmod_irq_info omap2430_mcbsp4_irqs[] = {
         { .name = "tx",         .irq = 54 },
         { .name = "rx",         .irq = 55 },
         { .name = "common",     .irq = 18 },
+        { .irq = -1 }
 };
 
 static struct omap_hwmod_dma_info omap2430_mcbsp4_sdma_chs[] = {
         { .name = "rx", .dma_req = 20 },
         { .name = "tx", .dma_req = 19 },
+        { .dma_req = -1 }
 };
 
 static struct omap_hwmod_addr_space omap2430_mcbsp4_addrs[] = {
@@ -2461,6 +1799,7 @@ static struct omap_hwmod_addr_space omap2430_mcbsp4_addrs[] = {
                 .pa_end         = 0x4808E0ff,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* l4_core -> mcbsp4 */
@@ -2469,7 +1808,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp4 = {
         .slave          = &omap2430_mcbsp4_hwmod,
         .clk            = "mcbsp4_ick",
         .addr           = omap2430_mcbsp4_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap2430_mcbsp4_addrs),
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -2482,9 +1820,7 @@ static struct omap_hwmod omap2430_mcbsp4_hwmod = {
         .name           = "mcbsp4",
         .class          = &omap2430_mcbsp_hwmod_class,
         .mpu_irqs       = omap2430_mcbsp4_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap2430_mcbsp4_irqs),
         .sdma_reqs      = omap2430_mcbsp4_sdma_chs,
-        .sdma_reqs_cnt  = ARRAY_SIZE(omap2430_mcbsp4_sdma_chs),
         .main_clk       = "mcbsp4_fck",
         .prcm           = {
                 .omap2 = {
@@ -2505,11 +1841,13 @@ static struct omap_hwmod_irq_info omap2430_mcbsp5_irqs[] = {
         { .name = "tx",         .irq = 81 },
         { .name = "rx",         .irq = 82 },
         { .name = "common",     .irq = 19 },
+        { .irq = -1 }
 };
 
 static struct omap_hwmod_dma_info omap2430_mcbsp5_sdma_chs[] = {
         { .name = "rx", .dma_req = 22 },
         { .name = "tx", .dma_req = 21 },
+        { .dma_req = -1 }
 };
 
 static struct omap_hwmod_addr_space omap2430_mcbsp5_addrs[] = {
@@ -2519,6 +1857,7 @@ static struct omap_hwmod_addr_space omap2430_mcbsp5_addrs[] = {
                 .pa_end         = 0x480960ff,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* l4_core -> mcbsp5 */
@@ -2527,7 +1866,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp5 = {
         .slave          = &omap2430_mcbsp5_hwmod,
         .clk            = "mcbsp5_ick",
         .addr           = omap2430_mcbsp5_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap2430_mcbsp5_addrs),
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -2540,9 +1878,7 @@ static struct omap_hwmod omap2430_mcbsp5_hwmod = {
         .name           = "mcbsp5",
         .class          = &omap2430_mcbsp_hwmod_class,
         .mpu_irqs       = omap2430_mcbsp5_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap2430_mcbsp5_irqs),
         .sdma_reqs      = omap2430_mcbsp5_sdma_chs,
-        .sdma_reqs_cnt  = ARRAY_SIZE(omap2430_mcbsp5_sdma_chs),
         .main_clk       = "mcbsp5_fck",
         .prcm           = {
                 .omap2 = {
@@ -2580,11 +1916,13 @@ static struct omap_hwmod_class omap2430_mmc_class = {
 
 static struct omap_hwmod_irq_info omap2430_mmc1_mpu_irqs[] = {
         { .irq = 83 },
+        { .irq = -1 }
 };
 
 static struct omap_hwmod_dma_info omap2430_mmc1_sdma_reqs[] = {
         { .name = "tx", .dma_req = 61 }, /* DMA_MMC1_TX */
         { .name = "rx", .dma_req = 62 }, /* DMA_MMC1_RX */
+        { .dma_req = -1 }
 };
 
 static struct omap_hwmod_opt_clk omap2430_mmc1_opt_clks[] = {
@@ -2603,9 +1941,7 @@ static struct omap_hwmod omap2430_mmc1_hwmod = {
         .name           = "mmc1",
         .flags          = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
         .mpu_irqs       = omap2430_mmc1_mpu_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap2430_mmc1_mpu_irqs),
         .sdma_reqs      = omap2430_mmc1_sdma_reqs,
-        .sdma_reqs_cnt  = ARRAY_SIZE(omap2430_mmc1_sdma_reqs),
         .opt_clks       = omap2430_mmc1_opt_clks,
         .opt_clks_cnt   = ARRAY_SIZE(omap2430_mmc1_opt_clks),
         .main_clk       = "mmchs1_fck",
@@ -2629,11 +1965,13 @@ static struct omap_hwmod omap2430_mmc1_hwmod = {
 
 static struct omap_hwmod_irq_info omap2430_mmc2_mpu_irqs[] = {
         { .irq = 86 },
+        { .irq = -1 }
 };
 
 static struct omap_hwmod_dma_info omap2430_mmc2_sdma_reqs[] = {
         { .name = "tx", .dma_req = 47 }, /* DMA_MMC2_TX */
         { .name = "rx", .dma_req = 48 }, /* DMA_MMC2_RX */
+        { .dma_req = -1 }
 };
 
 static struct omap_hwmod_opt_clk omap2430_mmc2_opt_clks[] = {
@@ -2648,9 +1986,7 @@ static struct omap_hwmod omap2430_mmc2_hwmod = {
         .name           = "mmc2",
         .flags          = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
         .mpu_irqs       = omap2430_mmc2_mpu_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap2430_mmc2_mpu_irqs),
         .sdma_reqs      = omap2430_mmc2_sdma_reqs,
-        .sdma_reqs_cnt  = ARRAY_SIZE(omap2430_mmc2_sdma_reqs),
         .opt_clks       = omap2430_mmc2_opt_clks,
         .opt_clks_cnt   = ARRAY_SIZE(omap2430_mmc2_opt_clks),
         .main_clk       = "mmchs2_fck",
diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_interconnect_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_interconnect_data.c
new file mode 100644
index 000000000000..04637fabadd2
--- /dev/null
+++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_interconnect_data.c
@@ -0,0 +1,173 @@
+/*
+ * omap_hwmod_2xxx_3xxx_interconnect_data.c - common interconnect data, OMAP2/3
+ *
+ * Copyright (C) 2009-2011 Nokia Corporation
+ * Paul Walmsley
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * XXX handle crossbar/shared link difference for L3?
+ * XXX these should be marked initdata for multi-OMAP kernels
+ */
+#include <asm/sizes.h>
+
+#include <plat/omap_hwmod.h>
+#include <plat/serial.h>
+
+#include "omap_hwmod_common_data.h"
+
+struct omap_hwmod_addr_space omap2430_mmc1_addr_space[] = {
+        {
+                .pa_start       = 0x4809c000,
+                .pa_end         = 0x4809c1ff,
+                .flags          = ADDR_TYPE_RT,
+        },
+        { }
+};
+
+struct omap_hwmod_addr_space omap2430_mmc2_addr_space[] = {
+        {
+                .pa_start       = 0x480b4000,
+                .pa_end         = 0x480b41ff,
+                .flags          = ADDR_TYPE_RT,
+        },
+        { }
+};
+
+struct omap_hwmod_addr_space omap2_i2c1_addr_space[] = {
+        {
+                .pa_start       = 0x48070000,
+                .pa_end         = 0x48070000 + SZ_128 - 1,
+                .flags          = ADDR_TYPE_RT,
+        },
+        { }
+};
+
+struct omap_hwmod_addr_space omap2_i2c2_addr_space[] = {
+        {
+                .pa_start       = 0x48072000,
+                .pa_end         = 0x48072000 + SZ_128 - 1,
+                .flags          = ADDR_TYPE_RT,
+        },
+        { }
+};
+
+struct omap_hwmod_addr_space omap2_dss_addrs[] = {
+        {
+                .pa_start       = 0x48050000,
+                .pa_end         = 0x48050000 + SZ_1K - 1,
+                .flags          = ADDR_TYPE_RT
+        },
+        { }
+};
+
+struct omap_hwmod_addr_space omap2_dss_dispc_addrs[] = {
+        {
+                .pa_start       = 0x48050400,
+                .pa_end         = 0x48050400 + SZ_1K - 1,
+                .flags          = ADDR_TYPE_RT
+        },
+        { }
+};
+
+struct omap_hwmod_addr_space omap2_dss_rfbi_addrs[] = {
+        {
+                .pa_start       = 0x48050800,
+                .pa_end         = 0x48050800 + SZ_1K - 1,
+                .flags          = ADDR_TYPE_RT
+        },
+        { }
+};
+
+struct omap_hwmod_addr_space omap2_dss_venc_addrs[] = {
+        {
+                .pa_start       = 0x48050C00,
+                .pa_end         = 0x48050C00 + SZ_1K - 1,
+                .flags          = ADDR_TYPE_RT
+        },
+        { }
+};
+
+struct omap_hwmod_addr_space omap2_timer10_addrs[] = {
+        {
+                .pa_start       = 0x48086000,
+                .pa_end         = 0x48086000 + SZ_1K - 1,
+                .flags          = ADDR_TYPE_RT
+        },
+        { }
+};
+
+struct omap_hwmod_addr_space omap2_timer11_addrs[] = {
+        {
+                .pa_start       = 0x48088000,
+                .pa_end         = 0x48088000 + SZ_1K - 1,
+                .flags          = ADDR_TYPE_RT
+        },
+        { }
+};
+
+struct omap_hwmod_addr_space omap2xxx_timer12_addrs[] = {
+        {
+                .pa_start       = 0x4808a000,
+                .pa_end         = 0x4808a000 + SZ_1K - 1,
+                .flags          = ADDR_TYPE_RT
+        },
+        { }
+};
+
+struct omap_hwmod_addr_space omap2_mcspi1_addr_space[] = {
+        {
+                .pa_start       = 0x48098000,
+                .pa_end         = 0x48098000 + SZ_256 - 1,
+                .flags          = ADDR_TYPE_RT,
+        },
+        { }
+};
+
+struct omap_hwmod_addr_space omap2_mcspi2_addr_space[] = {
+        {
+                .pa_start       = 0x4809a000,
+                .pa_end         = 0x4809a000 + SZ_256 - 1,
+                .flags          = ADDR_TYPE_RT,
+        },
+        { }
+};
+
+struct omap_hwmod_addr_space omap2430_mcspi3_addr_space[] = {
+        {
+                .pa_start       = 0x480b8000,
+                .pa_end         = 0x480b8000 + SZ_256 - 1,
+                .flags          = ADDR_TYPE_RT,
+        },
+        { }
+};
+
+struct omap_hwmod_addr_space omap2_dma_system_addrs[] = {
+        {
+                .pa_start       = 0x48056000,
+                .pa_end         = 0x48056000 + SZ_4K - 1,
+                .flags          = ADDR_TYPE_RT
+        },
+        { }
+};
+
+struct omap_hwmod_addr_space omap2_mailbox_addrs[] = {
+        {
+                .pa_start       = 0x48094000,
+                .pa_end         = 0x48094000 + SZ_512 - 1,
+                .flags          = ADDR_TYPE_RT,
+        },
+        { }
+};
+
+struct omap_hwmod_addr_space omap2_mcbsp1_addrs[] = {
+        {
+                .name           = "mpu",
+                .pa_start       = 0x48074000,
+                .pa_end         = 0x480740ff,
+                .flags          = ADDR_TYPE_RT
+        },
+        { }
+};
diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c
new file mode 100644
index 000000000000..c451729d289a
--- /dev/null
+++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c
@@ -0,0 +1,322 @@
+/*
+ * omap_hwmod_2xxx_3xxx_ipblock_data.c - common IP block data for OMAP2/3
+ *
+ * Copyright (C) 2011 Nokia Corporation
+ * Paul Walmsley
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <plat/omap_hwmod.h>
+#include <plat/serial.h>
+#include <plat/dma.h>
+
+#include <mach/irqs.h>
+
+#include "omap_hwmod_common_data.h"
+
+/* UART */
+
+static struct omap_hwmod_class_sysconfig omap2_uart_sysc = {
+        .rev_offs       = 0x50,
+        .sysc_offs      = 0x54,
+        .syss_offs      = 0x58,
+        .sysc_flags     = (SYSC_HAS_SIDLEMODE |
+                           SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET |
+                           SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS),
+        .idlemodes      = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
+        .sysc_fields    = &omap_hwmod_sysc_type1,
+};
+
+struct omap_hwmod_class omap2_uart_class = {
+        .name   = "uart",
+        .sysc   = &omap2_uart_sysc,
+};
+
+/*
+ * 'dss' class
+ * display sub-system
+ */
+
+static struct omap_hwmod_class_sysconfig omap2_dss_sysc = {
+        .rev_offs       = 0x0000,
+        .sysc_offs      = 0x0010,
+        .syss_offs      = 0x0014,
+        .sysc_flags     = (SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE),
+        .sysc_fields    = &omap_hwmod_sysc_type1,
+};
+
+struct omap_hwmod_class omap2_dss_hwmod_class = {
+        .name   = "dss",
+        .sysc   = &omap2_dss_sysc,
+};
+
+/*
+ * 'dispc' class
+ * display controller
+ */
+
+static struct omap_hwmod_class_sysconfig omap2_dispc_sysc = {
+        .rev_offs       = 0x0000,
+        .sysc_offs      = 0x0010,
+        .syss_offs      = 0x0014,
+        .sysc_flags     = (SYSC_HAS_SIDLEMODE | SYSC_HAS_MIDLEMODE |
+                           SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE),
+        .idlemodes      = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
+                           MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART),
+        .sysc_fields    = &omap_hwmod_sysc_type1,
+};
+
+struct omap_hwmod_class omap2_dispc_hwmod_class = {
+        .name   = "dispc",
+        .sysc   = &omap2_dispc_sysc,
+};
+
+/*
+ * 'rfbi' class
+ * remote frame buffer interface
+ */
+
+static struct omap_hwmod_class_sysconfig omap2_rfbi_sysc = {
+        .rev_offs       = 0x0000,
+        .sysc_offs      = 0x0010,
+        .syss_offs      = 0x0014,
+        .sysc_flags     = (SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET |
+                           SYSC_HAS_AUTOIDLE),
+        .idlemodes      = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
+        .sysc_fields    = &omap_hwmod_sysc_type1,
+};
+
+struct omap_hwmod_class omap2_rfbi_hwmod_class = {
+        .name   = "rfbi",
+        .sysc   = &omap2_rfbi_sysc,
+};
+
+/*
+ * 'venc' class
+ * video encoder
+ */
+
+struct omap_hwmod_class omap2_venc_hwmod_class = {
+        .name = "venc",
+};
+
+
+/* Common DMA request line data */
+struct omap_hwmod_dma_info omap2_uart1_sdma_reqs[] = {
+        { .name = "rx", .dma_req = OMAP24XX_DMA_UART1_RX, },
+        { .name = "tx", .dma_req = OMAP24XX_DMA_UART1_TX, },
+        { .dma_req = -1 }
+};
+
+struct omap_hwmod_dma_info omap2_uart2_sdma_reqs[] = {
+        { .name = "rx", .dma_req = OMAP24XX_DMA_UART2_RX, },
+        { .name = "tx", .dma_req = OMAP24XX_DMA_UART2_TX, },
+        { .dma_req = -1 }
+};
+
+struct omap_hwmod_dma_info omap2_uart3_sdma_reqs[] = {
+        { .name = "rx", .dma_req = OMAP24XX_DMA_UART3_RX, },
+        { .name = "tx", .dma_req = OMAP24XX_DMA_UART3_TX, },
+        { .dma_req = -1 }
+};
+
+struct omap_hwmod_dma_info omap2_i2c1_sdma_reqs[] = {
+        { .name = "tx", .dma_req = OMAP24XX_DMA_I2C1_TX },
+        { .name = "rx", .dma_req = OMAP24XX_DMA_I2C1_RX },
+        { .dma_req = -1 }
+};
+
+struct omap_hwmod_dma_info omap2_i2c2_sdma_reqs[] = {
+        { .name = "tx", .dma_req = OMAP24XX_DMA_I2C2_TX },
+        { .name = "rx", .dma_req = OMAP24XX_DMA_I2C2_RX },
+        { .dma_req = -1 }
+};
+
+struct omap_hwmod_dma_info omap2_mcspi1_sdma_reqs[] = {
+        { .name = "tx0", .dma_req = 35 }, /* DMA_SPI1_TX0 */
+        { .name = "rx0", .dma_req = 36 }, /* DMA_SPI1_RX0 */
+        { .name = "tx1", .dma_req = 37 }, /* DMA_SPI1_TX1 */
+        { .name = "rx1", .dma_req = 38 }, /* DMA_SPI1_RX1 */
+        { .name = "tx2", .dma_req = 39 }, /* DMA_SPI1_TX2 */
+        { .name = "rx2", .dma_req = 40 }, /* DMA_SPI1_RX2 */
+        { .name = "tx3", .dma_req = 41 }, /* DMA_SPI1_TX3 */
+        { .name = "rx3", .dma_req = 42 }, /* DMA_SPI1_RX3 */
+        { .dma_req = -1 }
+};
+
+struct omap_hwmod_dma_info omap2_mcspi2_sdma_reqs[] = {
+        { .name = "tx0", .dma_req = 43 }, /* DMA_SPI2_TX0 */
+        { .name = "rx0", .dma_req = 44 }, /* DMA_SPI2_RX0 */
+        { .name = "tx1", .dma_req = 45 }, /* DMA_SPI2_TX1 */
+        { .name = "rx1", .dma_req = 46 }, /* DMA_SPI2_RX1 */
+        { .dma_req = -1 }
+};
+
+struct omap_hwmod_dma_info omap2_mcbsp1_sdma_reqs[] = {
+        { .name = "rx", .dma_req = 32 },
+        { .name = "tx", .dma_req = 31 },
+        { .dma_req = -1 }
+};
+
+struct omap_hwmod_dma_info omap2_mcbsp2_sdma_reqs[] = {
+        { .name = "rx", .dma_req = 34 },
+        { .name = "tx", .dma_req = 33 },
+        { .dma_req = -1 }
+};
+
+struct omap_hwmod_dma_info omap2_mcbsp3_sdma_reqs[] = {
+        { .name = "rx", .dma_req = 18 },
+        { .name = "tx", .dma_req = 17 },
+        { .dma_req = -1 }
+};
+
+/* Other IP block data */
+
+
+/*
+ * omap_hwmod class data
+ */
+
+struct omap_hwmod_class l3_hwmod_class = {
+        .name = "l3"
+};
+
+struct omap_hwmod_class l4_hwmod_class = {
+        .name = "l4"
+};
+
+struct omap_hwmod_class mpu_hwmod_class = {
+        .name = "mpu"
+};
+
+struct omap_hwmod_class iva_hwmod_class = {
+        .name = "iva"
+};
+
+/* Common MPU IRQ line data */
+
+struct omap_hwmod_irq_info omap2_timer1_mpu_irqs[] = {
+        { .irq = 37, },
+        { .irq = -1 }
+};
+
+struct omap_hwmod_irq_info omap2_timer2_mpu_irqs[] = {
+        { .irq = 38, },
+        { .irq = -1 }
+};
+
+struct omap_hwmod_irq_info omap2_timer3_mpu_irqs[] = {
+        { .irq = 39, },
+        { .irq = -1 }
+};
+
+struct omap_hwmod_irq_info omap2_timer4_mpu_irqs[] = {
+        { .irq = 40, },
+        { .irq = -1 }
+};
+
+struct omap_hwmod_irq_info omap2_timer5_mpu_irqs[] = {
+        { .irq = 41, },
+        { .irq = -1 }
+};
+
+struct omap_hwmod_irq_info omap2_timer6_mpu_irqs[] = {
+        { .irq = 42, },
+        { .irq = -1 }
+};
+
+struct omap_hwmod_irq_info omap2_timer7_mpu_irqs[] = {
+        { .irq = 43, },
+        { .irq = -1 }
+};
+
+struct omap_hwmod_irq_info omap2_timer8_mpu_irqs[] = {
+        { .irq = 44, },
+        { .irq = -1 }
+};
+
+struct omap_hwmod_irq_info omap2_timer9_mpu_irqs[] = {
+        { .irq = 45, },
+        { .irq = -1 }
+};
+
+struct omap_hwmod_irq_info omap2_timer10_mpu_irqs[] = {
+        { .irq = 46, },
+        { .irq = -1 }
+};
+
+struct omap_hwmod_irq_info omap2_timer11_mpu_irqs[] = {
+        { .irq = 47, },
+        { .irq = -1 }
+};
+
+struct omap_hwmod_irq_info omap2_uart1_mpu_irqs[] = {
+        { .irq = INT_24XX_UART1_IRQ, },
+        { .irq = -1 }
+};
+
+struct omap_hwmod_irq_info omap2_uart2_mpu_irqs[] = {
+        { .irq = INT_24XX_UART2_IRQ, },
+        { .irq = -1 }
+};
+
+struct omap_hwmod_irq_info omap2_uart3_mpu_irqs[] = {
+        { .irq = INT_24XX_UART3_IRQ, },
+        { .irq = -1 }
+};
+
+struct omap_hwmod_irq_info omap2_dispc_irqs[] = {
+        { .irq = 25 },
+        { .irq = -1 }
+};
+
+struct omap_hwmod_irq_info omap2_i2c1_mpu_irqs[] = {
+        { .irq = INT_24XX_I2C1_IRQ, },
+        { .irq = -1 }
+};
+
+struct omap_hwmod_irq_info omap2_i2c2_mpu_irqs[] = {
+        { .irq = INT_24XX_I2C2_IRQ, },
+        { .irq = -1 }
+};
+
+struct omap_hwmod_irq_info omap2_gpio1_irqs[] = {
+        { .irq = 29 }, /* INT_24XX_GPIO_BANK1 */
+        { .irq = -1 }
+};
+
+struct omap_hwmod_irq_info omap2_gpio2_irqs[] = {
+        { .irq = 30 }, /* INT_24XX_GPIO_BANK2 */
+        { .irq = -1 }
+};
+
+struct omap_hwmod_irq_info omap2_gpio3_irqs[] = {
+        { .irq = 31 }, /* INT_24XX_GPIO_BANK3 */
+        { .irq = -1 }
+};
+
+struct omap_hwmod_irq_info omap2_gpio4_irqs[] = {
+        { .irq = 32 }, /* INT_24XX_GPIO_BANK4 */
+        { .irq = -1 }
+};
+
+struct omap_hwmod_irq_info omap2_dma_system_irqs[] = {
+        { .name = "0", .irq = 12 }, /* INT_24XX_SDMA_IRQ0 */
+        { .name = "1", .irq = 13 }, /* INT_24XX_SDMA_IRQ1 */
+        { .name = "2", .irq = 14 }, /* INT_24XX_SDMA_IRQ2 */
+        { .name = "3", .irq = 15 }, /* INT_24XX_SDMA_IRQ3 */
+        { .irq = -1 }
+};
+
+struct omap_hwmod_irq_info omap2_mcspi1_mpu_irqs[] = {
+        { .irq = 65 },
+        { .irq = -1 }
+};
+
+struct omap_hwmod_irq_info omap2_mcspi2_mpu_irqs[] = {
+        { .irq = 66 },
+        { .irq = -1 }
+};
+
diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c
new file mode 100644
index 000000000000..4f3547c2a49e
--- /dev/null
+++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c
@@ -0,0 +1,130 @@
+/*
+ * omap_hwmod_2xxx_interconnect_data.c - common interconnect data for OMAP2xxx
+ *
+ * Copyright (C) 2009-2011 Nokia Corporation
+ * Paul Walmsley
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * XXX handle crossbar/shared link difference for L3?
+ * XXX these should be marked initdata for multi-OMAP kernels
+ */
+#include <asm/sizes.h>
+
+#include <plat/omap_hwmod.h>
+#include <plat/serial.h>
+
+#include "omap_hwmod_common_data.h"
+
+struct omap_hwmod_addr_space omap2xxx_uart1_addr_space[] = {
+        {
+                .pa_start       = OMAP2_UART1_BASE,
+                .pa_end         = OMAP2_UART1_BASE + SZ_8K - 1,
+                .flags          = ADDR_MAP_ON_INIT | ADDR_TYPE_RT,
+        },
+        { }
+};
+
+struct omap_hwmod_addr_space omap2xxx_uart2_addr_space[] = {
+        {
+                .pa_start       = OMAP2_UART2_BASE,
+                .pa_end         = OMAP2_UART2_BASE + SZ_1K - 1,
+                .flags          = ADDR_MAP_ON_INIT | ADDR_TYPE_RT,
+        },
+        { }
+};
+
+struct omap_hwmod_addr_space omap2xxx_uart3_addr_space[] = {
+        {
+                .pa_start       = OMAP2_UART3_BASE,
+                .pa_end         = OMAP2_UART3_BASE + SZ_1K - 1,
+                .flags          = ADDR_MAP_ON_INIT | ADDR_TYPE_RT,
+        },
+        { }
+};
+
+struct omap_hwmod_addr_space omap2xxx_timer2_addrs[] = {
+        {
+                .pa_start       = 0x4802a000,
+                .pa_end         = 0x4802a000 + SZ_1K - 1,
+                .flags          = ADDR_TYPE_RT
+        },
+        { }
+};
+
+struct omap_hwmod_addr_space omap2xxx_timer3_addrs[] = {
+        {
+                .pa_start       = 0x48078000,
+                .pa_end         = 0x48078000 + SZ_1K - 1,
+                .flags          = ADDR_TYPE_RT
+        },
+        { }
+};
+
+struct omap_hwmod_addr_space omap2xxx_timer4_addrs[] = {
+        {
+                .pa_start       = 0x4807a000,
+                .pa_end         = 0x4807a000 + SZ_1K - 1,
+                .flags          = ADDR_TYPE_RT
+        },
+        { }
+};
+
+struct omap_hwmod_addr_space omap2xxx_timer5_addrs[] = {
+        {
+                .pa_start       = 0x4807c000,
+                .pa_end         = 0x4807c000 + SZ_1K - 1,
+                .flags          = ADDR_TYPE_RT
+        },
+        { }
+};
+
+struct omap_hwmod_addr_space omap2xxx_timer6_addrs[] = {
+        {
+                .pa_start       = 0x4807e000,
+                .pa_end         = 0x4807e000 + SZ_1K - 1,
+                .flags          = ADDR_TYPE_RT
+        },
+        { }
+};
+
+struct omap_hwmod_addr_space omap2xxx_timer7_addrs[] = {
+        {
+                .pa_start       = 0x48080000,
+                .pa_end         = 0x48080000 + SZ_1K - 1,
+                .flags          = ADDR_TYPE_RT
+        },
+        { }
+};
+
+struct omap_hwmod_addr_space omap2xxx_timer8_addrs[] = {
+        {
+                .pa_start       = 0x48082000,
+                .pa_end         = 0x48082000 + SZ_1K - 1,
+                .flags          = ADDR_TYPE_RT
+        },
+        { }
+};
+
+struct omap_hwmod_addr_space omap2xxx_timer9_addrs[] = {
+        {
+                .pa_start       = 0x48084000,
+                .pa_end         = 0x48084000 + SZ_1K - 1,
+                .flags          = ADDR_TYPE_RT
+        },
+        { }
+};
+
+struct omap_hwmod_addr_space omap2xxx_mcbsp2_addrs[] = {
+        {
+                .name           = "mpu",
+                .pa_start       = 0x48076000,
+                .pa_end         = 0x480760ff,
+                .flags          = ADDR_TYPE_RT
+        },
+        { }
+};
+
+
diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c
new file mode 100644
index 000000000000..177dee20faef
--- /dev/null
+++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c
@@ -0,0 +1,150 @@
+/*
+ * omap_hwmod_2xxx_ipblock_data.c - common IP block data for OMAP2xxx
+ *
+ * Copyright (C) 2011 Nokia Corporation
+ * Paul Walmsley
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <plat/omap_hwmod.h>
+#include <plat/serial.h>
+#include <plat/dma.h>
+#include <plat/dmtimer.h>
+#include <plat/mcspi.h>
+
+#include <mach/irqs.h>
+
+#include "omap_hwmod_common_data.h"
+#include "wd_timer.h"
+
+struct omap_hwmod_irq_info omap2xxx_timer12_mpu_irqs[] = {
+        { .irq = 48, },
+        { .irq = -1 }
+};
+
+struct omap_hwmod_dma_info omap2xxx_dss_sdma_chs[] = {
+        { .name = "dispc", .dma_req = 5 },
+        { .dma_req = -1 }
+};
+/* OMAP2xxx Timer Common */
+static struct omap_hwmod_class_sysconfig omap2xxx_timer_sysc = {
+        .rev_offs       = 0x0000,
+        .sysc_offs      = 0x0010,
+        .syss_offs      = 0x0014,
+        .sysc_flags     = (SYSC_HAS_SIDLEMODE | SYSC_HAS_CLOCKACTIVITY |
+                           SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET |
+                           SYSC_HAS_AUTOIDLE),
+        .idlemodes      = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
+        .sysc_fields    = &omap_hwmod_sysc_type1,
+};
+
+struct omap_hwmod_class omap2xxx_timer_hwmod_class = {
+        .name   = "timer",
+        .sysc   = &omap2xxx_timer_sysc,
+        .rev    = OMAP_TIMER_IP_VERSION_1,
+};
+
+/*
+ * 'wd_timer' class
+ * 32-bit watchdog upward counter that generates a pulse on the reset pin on
+ * overflow condition
+ */
+
+static struct omap_hwmod_class_sysconfig omap2xxx_wd_timer_sysc = {
+        .rev_offs       = 0x0000,
+        .sysc_offs      = 0x0010,
+        .syss_offs      = 0x0014,
+        .sysc_flags     = (SYSC_HAS_EMUFREE | SYSC_HAS_SOFTRESET |
+                           SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS),
+        .sysc_fields    = &omap_hwmod_sysc_type1,
+};
+
+struct omap_hwmod_class omap2xxx_wd_timer_hwmod_class = {
+        .name           = "wd_timer",
+        .sysc           = &omap2xxx_wd_timer_sysc,
+        .pre_shutdown   = &omap2_wd_timer_disable
+};
+
+/*
+ * 'gpio' class
+ * general purpose io module
+ */
+static struct omap_hwmod_class_sysconfig omap2xxx_gpio_sysc = {
+        .rev_offs       = 0x0000,
+        .sysc_offs      = 0x0010,
+        .syss_offs      = 0x0014,
+        .sysc_flags     = (SYSC_HAS_ENAWAKEUP | SYSC_HAS_SIDLEMODE |
+                           SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE |
+                           SYSS_HAS_RESET_STATUS),
+        .idlemodes      = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
+        .sysc_fields    = &omap_hwmod_sysc_type1,
+};
+
+struct omap_hwmod_class omap2xxx_gpio_hwmod_class = {
+        .name = "gpio",
+        .sysc = &omap2xxx_gpio_sysc,
+        .rev = 0,
+};
+
+/* system dma */
+static struct omap_hwmod_class_sysconfig omap2xxx_dma_sysc = {
+        .rev_offs       = 0x0000,
+        .sysc_offs      = 0x002c,
+        .syss_offs      = 0x0028,
+        .sysc_flags     = (SYSC_HAS_SOFTRESET | SYSC_HAS_MIDLEMODE |
+                           SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_EMUFREE |
+                           SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS),
+        .idlemodes      = (MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART),
+        .sysc_fields    = &omap_hwmod_sysc_type1,
+};
+
+struct omap_hwmod_class omap2xxx_dma_hwmod_class = {
+        .name   = "dma",
+        .sysc   = &omap2xxx_dma_sysc,
+};
+
+/*
+ * 'mailbox' class
+ * mailbox module allowing communication between the on-chip processors
+ * using a queued mailbox-interrupt mechanism.
+ */
+
+static struct omap_hwmod_class_sysconfig omap2xxx_mailbox_sysc = {
+        .rev_offs       = 0x000,
+        .sysc_offs      = 0x010,
+        .syss_offs      = 0x014,
+        .sysc_flags     = (SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_SIDLEMODE |
+                           SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE),
+        .idlemodes      = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
+        .sysc_fields    = &omap_hwmod_sysc_type1,
+};
+
+struct omap_hwmod_class omap2xxx_mailbox_hwmod_class = {
+        .name   = "mailbox",
+        .sysc   = &omap2xxx_mailbox_sysc,
+};
+
+/*
+ * 'mcspi' class
+ * multichannel serial port interface (mcspi) / master/slave synchronous serial
+ * bus
+ */
+
+static struct omap_hwmod_class_sysconfig omap2xxx_mcspi_sysc = {
+        .rev_offs       = 0x0000,
+        .sysc_offs      = 0x0010,
+        .syss_offs      = 0x0014,
+        .sysc_flags     = (SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_SIDLEMODE |
+                                SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET |
+                                SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS),
+        .idlemodes      = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
+        .sysc_fields    = &omap_hwmod_sysc_type1,
+};
+
+struct omap_hwmod_class omap2xxx_mcspi_class = {
+        .name   = "mcspi",
+        .sysc   = &omap2xxx_mcspi_sysc,
+        .rev    = OMAP2_MCSPI_REV,
+};
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
index 909a84de6682..1a52716e48bf 100644
--- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
@@ -1,7 +1,7 @@
 /*
  * omap_hwmod_3xxx_data.c - hardware modules present on the OMAP3xxx chips
  *
- * Copyright (C) 2009-2010 Nokia Corporation
+ * Copyright (C) 2009-2011 Nokia Corporation
  * Paul Walmsley
  *
  * This program is free software; you can redistribute it and/or modify
@@ -103,6 +103,7 @@ static struct omap_hwmod_ocp_if omap3xxx_l3_main__l4_per = {
 static struct omap_hwmod_irq_info omap3xxx_l3_main_irqs[] = {
         { .irq = INT_34XX_L3_DBG_IRQ },
         { .irq = INT_34XX_L3_APP_IRQ },
+        { .irq = -1 }
 };
 
 static struct omap_hwmod_addr_space omap3xxx_l3_main_addrs[] = {
@@ -111,6 +112,7 @@ static struct omap_hwmod_addr_space omap3xxx_l3_main_addrs[] = {
                 .pa_end         = 0x6800ffff,
                 .flags          = ADDR_TYPE_RT,
         },
+        { }
 };
 
 /* MPU -> L3 interface */
@@ -118,7 +120,6 @@ static struct omap_hwmod_ocp_if omap3xxx_mpu__l3_main = {
         .master   = &omap3xxx_mpu_hwmod,
         .slave    = &omap3xxx_l3_main_hwmod,
         .addr     = omap3xxx_l3_main_addrs,
-        .addr_cnt = ARRAY_SIZE(omap3xxx_l3_main_addrs),
         .user   = OCP_USER_MPU,
 };
 
@@ -150,8 +151,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_l3_main_masters[] = {
 static struct omap_hwmod omap3xxx_l3_main_hwmod = {
         .name           = "l3_main",
         .class          = &l3_hwmod_class,
-        .mpu_irqs       = omap3xxx_l3_main_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap3xxx_l3_main_irqs),
+        .mpu_irqs       = omap3xxx_l3_main_irqs,
         .masters        = omap3xxx_l3_main_masters,
         .masters_cnt    = ARRAY_SIZE(omap3xxx_l3_main_masters),
         .slaves         = omap3xxx_l3_main_slaves,
@@ -190,39 +190,21 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__l4_wkup = {
 };
 
 /* L4 CORE -> MMC1 interface */
-static struct omap_hwmod_addr_space omap3xxx_mmc1_addr_space[] = {
-        {
-                .pa_start       = 0x4809c000,
-                .pa_end         = 0x4809c1ff,
-                .flags          = ADDR_TYPE_RT,
-        },
-};
-
 static struct omap_hwmod_ocp_if omap3xxx_l4_core__mmc1 = {
         .master         = &omap3xxx_l4_core_hwmod,
         .slave          = &omap3xxx_mmc1_hwmod,
         .clk            = "mmchs1_ick",
-        .addr           = omap3xxx_mmc1_addr_space,
-        .addr_cnt       = ARRAY_SIZE(omap3xxx_mmc1_addr_space),
+        .addr           = omap2430_mmc1_addr_space,
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
         .flags          = OMAP_FIREWALL_L4
 };
 
 /* L4 CORE -> MMC2 interface */
-static struct omap_hwmod_addr_space omap3xxx_mmc2_addr_space[] = {
-        {
-                .pa_start       = 0x480b4000,
-                .pa_end         = 0x480b41ff,
-                .flags          = ADDR_TYPE_RT,
-        },
-};
-
 static struct omap_hwmod_ocp_if omap3xxx_l4_core__mmc2 = {
         .master         = &omap3xxx_l4_core_hwmod,
         .slave          = &omap3xxx_mmc2_hwmod,
         .clk            = "mmchs2_ick",
-        .addr           = omap3xxx_mmc2_addr_space,
-        .addr_cnt       = ARRAY_SIZE(omap3xxx_mmc2_addr_space),
+        .addr           = omap2430_mmc2_addr_space,
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
         .flags          = OMAP_FIREWALL_L4
 };
@@ -234,6 +216,7 @@ static struct omap_hwmod_addr_space omap3xxx_mmc3_addr_space[] = {
                 .pa_end         = 0x480ad1ff,
                 .flags          = ADDR_TYPE_RT,
         },
+        { }
 };
 
 static struct omap_hwmod_ocp_if omap3xxx_l4_core__mmc3 = {
@@ -241,7 +224,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__mmc3 = {
         .slave          = &omap3xxx_mmc3_hwmod,
         .clk            = "mmchs3_ick",
         .addr           = omap3xxx_mmc3_addr_space,
-        .addr_cnt       = ARRAY_SIZE(omap3xxx_mmc3_addr_space),
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
         .flags          = OMAP_FIREWALL_L4
 };
@@ -253,6 +235,7 @@ static struct omap_hwmod_addr_space omap3xxx_uart1_addr_space[] = {
                 .pa_end         = OMAP3_UART1_BASE + SZ_8K - 1,
                 .flags          = ADDR_MAP_ON_INIT | ADDR_TYPE_RT,
         },
+        { }
 };
 
 static struct omap_hwmod_ocp_if omap3_l4_core__uart1 = {
@@ -260,7 +243,6 @@ static struct omap_hwmod_ocp_if omap3_l4_core__uart1 = {
         .slave          = &omap3xxx_uart1_hwmod,
         .clk            = "uart1_ick",
         .addr           = omap3xxx_uart1_addr_space,
-        .addr_cnt       = ARRAY_SIZE(omap3xxx_uart1_addr_space),
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -271,6 +253,7 @@ static struct omap_hwmod_addr_space omap3xxx_uart2_addr_space[] = {
                 .pa_end         = OMAP3_UART2_BASE + SZ_1K - 1,
                 .flags          = ADDR_MAP_ON_INIT | ADDR_TYPE_RT,
         },
+        { }
 };
 
 static struct omap_hwmod_ocp_if omap3_l4_core__uart2 = {
@@ -278,7 +261,6 @@ static struct omap_hwmod_ocp_if omap3_l4_core__uart2 = {
         .slave          = &omap3xxx_uart2_hwmod,
         .clk            = "uart2_ick",
         .addr           = omap3xxx_uart2_addr_space,
-        .addr_cnt       = ARRAY_SIZE(omap3xxx_uart2_addr_space),
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -289,6 +271,7 @@ static struct omap_hwmod_addr_space omap3xxx_uart3_addr_space[] = {
                 .pa_end         = OMAP3_UART3_BASE + SZ_1K - 1,
                 .flags          = ADDR_MAP_ON_INIT | ADDR_TYPE_RT,
         },
+        { }
 };
 
 static struct omap_hwmod_ocp_if omap3_l4_per__uart3 = {
@@ -296,7 +279,6 @@ static struct omap_hwmod_ocp_if omap3_l4_per__uart3 = {
         .slave          = &omap3xxx_uart3_hwmod,
         .clk            = "uart3_ick",
         .addr           = omap3xxx_uart3_addr_space,
-        .addr_cnt       = ARRAY_SIZE(omap3xxx_uart3_addr_space),
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -307,6 +289,7 @@ static struct omap_hwmod_addr_space omap3xxx_uart4_addr_space[] = {
                 .pa_end         = OMAP3_UART4_BASE + SZ_1K - 1,
                 .flags          = ADDR_MAP_ON_INIT | ADDR_TYPE_RT,
         },
+        { }
 };
 
 static struct omap_hwmod_ocp_if omap3_l4_per__uart4 = {
@@ -314,28 +297,15 @@ static struct omap_hwmod_ocp_if omap3_l4_per__uart4 = {
         .slave          = &omap3xxx_uart4_hwmod,
         .clk            = "uart4_ick",
         .addr           = omap3xxx_uart4_addr_space,
-        .addr_cnt       = ARRAY_SIZE(omap3xxx_uart4_addr_space),
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
-/* I2C IP block address space length (in bytes) */
-#define OMAP2_I2C_AS_LEN                128
-
 /* L4 CORE -> I2C1 interface */
-static struct omap_hwmod_addr_space omap3xxx_i2c1_addr_space[] = {
-        {
-                .pa_start       = 0x48070000,
-                .pa_end         = 0x48070000 + OMAP2_I2C_AS_LEN - 1,
-                .flags          = ADDR_TYPE_RT,
-        },
-};
-
 static struct omap_hwmod_ocp_if omap3_l4_core__i2c1 = {
         .master         = &omap3xxx_l4_core_hwmod,
         .slave          = &omap3xxx_i2c1_hwmod,
         .clk            = "i2c1_ick",
-        .addr           = omap3xxx_i2c1_addr_space,
-        .addr_cnt       = ARRAY_SIZE(omap3xxx_i2c1_addr_space),
+        .addr           = omap2_i2c1_addr_space,
         .fw = {
                 .omap2 = {
                         .l4_fw_region  = OMAP3_L4_CORE_FW_I2C1_REGION,
@@ -347,20 +317,11 @@ static struct omap_hwmod_ocp_if omap3_l4_core__i2c1 = {
 };
 
 /* L4 CORE -> I2C2 interface */
-static struct omap_hwmod_addr_space omap3xxx_i2c2_addr_space[] = {
-        {
-                .pa_start       = 0x48072000,
-                .pa_end         = 0x48072000 + OMAP2_I2C_AS_LEN - 1,
-                .flags          = ADDR_TYPE_RT,
-        },
-};
-
 static struct omap_hwmod_ocp_if omap3_l4_core__i2c2 = {
         .master         = &omap3xxx_l4_core_hwmod,
         .slave          = &omap3xxx_i2c2_hwmod,
         .clk            = "i2c2_ick",
-        .addr           = omap3xxx_i2c2_addr_space,
-        .addr_cnt       = ARRAY_SIZE(omap3xxx_i2c2_addr_space),
+        .addr           = omap2_i2c2_addr_space,
         .fw = {
                 .omap2 = {
                         .l4_fw_region  = OMAP3_L4_CORE_FW_I2C2_REGION,
@@ -375,9 +336,10 @@ static struct omap_hwmod_ocp_if omap3_l4_core__i2c2 = {
 static struct omap_hwmod_addr_space omap3xxx_i2c3_addr_space[] = {
         {
                 .pa_start       = 0x48060000,
-                .pa_end         = 0x48060000 + OMAP2_I2C_AS_LEN - 1,
+                .pa_end         = 0x48060000 + SZ_128 - 1,
                 .flags          = ADDR_TYPE_RT,
         },
+        { }
 };
 
 static struct omap_hwmod_ocp_if omap3_l4_core__i2c3 = {
@@ -385,7 +347,6 @@ static struct omap_hwmod_ocp_if omap3_l4_core__i2c3 = {
         .slave          = &omap3xxx_i2c3_hwmod,
         .clk            = "i2c3_ick",
         .addr           = omap3xxx_i2c3_addr_space,
-        .addr_cnt       = ARRAY_SIZE(omap3xxx_i2c3_addr_space),
         .fw = {
                 .omap2 = {
                         .l4_fw_region  = OMAP3_L4_CORE_FW_I2C3_REGION,
@@ -403,6 +364,7 @@ static struct omap_hwmod_addr_space omap3_sr1_addr_space[] = {
                 .pa_end         = OMAP34XX_SR1_BASE + SZ_1K - 1,
                 .flags          = ADDR_TYPE_RT,
         },
+        { }
 };
 
 static struct omap_hwmod_ocp_if omap3_l4_core__sr1 = {
@@ -410,7 +372,6 @@ static struct omap_hwmod_ocp_if omap3_l4_core__sr1 = {
         .slave          = &omap34xx_sr1_hwmod,
         .clk            = "sr_l4_ick",
         .addr           = omap3_sr1_addr_space,
-        .addr_cnt       = ARRAY_SIZE(omap3_sr1_addr_space),
         .user           = OCP_USER_MPU,
 };
 
@@ -421,6 +382,7 @@ static struct omap_hwmod_addr_space omap3_sr2_addr_space[] = {
                 .pa_end         = OMAP34XX_SR2_BASE + SZ_1K - 1,
                 .flags          = ADDR_TYPE_RT,
         },
+        { }
 };
 
 static struct omap_hwmod_ocp_if omap3_l4_core__sr2 = {
@@ -428,7 +390,6 @@ static struct omap_hwmod_ocp_if omap3_l4_core__sr2 = {
         .slave          = &omap34xx_sr2_hwmod,
         .clk            = "sr_l4_ick",
         .addr           = omap3_sr2_addr_space,
-        .addr_cnt       = ARRAY_SIZE(omap3_sr2_addr_space),
         .user           = OCP_USER_MPU,
 };
 
@@ -442,6 +403,7 @@ static struct omap_hwmod_addr_space omap3xxx_usbhsotg_addrs[] = {
                 .pa_end         = OMAP34XX_HSUSB_OTG_BASE + SZ_4K - 1,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* l4_core -> usbhsotg  */
@@ -450,7 +412,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__usbhsotg = {
         .slave          = &omap3xxx_usbhsotg_hwmod,
         .clk            = "l4_ick",
         .addr           = omap3xxx_usbhsotg_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap3xxx_usbhsotg_addrs),
         .user           = OCP_USER_MPU,
 };
 
@@ -468,6 +429,7 @@ static struct omap_hwmod_addr_space am35xx_usbhsotg_addrs[] = {
                 .pa_end         = AM35XX_IPSS_USBOTGSS_BASE + SZ_4K - 1,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* l4_core -> usbhsotg  */
@@ -476,7 +438,6 @@ static struct omap_hwmod_ocp_if am35xx_l4_core__usbhsotg = {
         .slave          = &am35xx_usbhsotg_hwmod,
         .clk            = "l4_ick",
         .addr           = am35xx_usbhsotg_addrs,
-        .addr_cnt       = ARRAY_SIZE(am35xx_usbhsotg_addrs),
         .user           = OCP_USER_MPU,
 };
 
@@ -611,9 +572,6 @@ static struct omap_hwmod_class omap3xxx_timer_hwmod_class = {
 
 /* timer1 */
 static struct omap_hwmod omap3xxx_timer1_hwmod;
-static struct omap_hwmod_irq_info omap3xxx_timer1_mpu_irqs[] = {
-        { .irq = 37, },
-};
 
 static struct omap_hwmod_addr_space omap3xxx_timer1_addrs[] = {
         {
@@ -621,6 +579,7 @@ static struct omap_hwmod_addr_space omap3xxx_timer1_addrs[] = {
                 .pa_end         = 0x48318000 + SZ_1K - 1,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* l4_wkup -> timer1 */
@@ -629,7 +588,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_wkup__timer1 = {
         .slave          = &omap3xxx_timer1_hwmod,
         .clk            = "gpt1_ick",
         .addr           = omap3xxx_timer1_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap3xxx_timer1_addrs),
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -641,8 +599,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer1_slaves[] = {
 /* timer1 hwmod */
 static struct omap_hwmod omap3xxx_timer1_hwmod = {
         .name           = "timer1",
-        .mpu_irqs       = omap3xxx_timer1_mpu_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap3xxx_timer1_mpu_irqs),
+        .mpu_irqs       = omap2_timer1_mpu_irqs,
         .main_clk       = "gpt1_fck",
         .prcm           = {
                 .omap2 = {
@@ -661,9 +618,6 @@ static struct omap_hwmod omap3xxx_timer1_hwmod = {
 
 /* timer2 */
 static struct omap_hwmod omap3xxx_timer2_hwmod;
-static struct omap_hwmod_irq_info omap3xxx_timer2_mpu_irqs[] = {
-        { .irq = 38, },
-};
 
 static struct omap_hwmod_addr_space omap3xxx_timer2_addrs[] = {
         {
@@ -671,6 +625,7 @@ static struct omap_hwmod_addr_space omap3xxx_timer2_addrs[] = {
                 .pa_end         = 0x49032000 + SZ_1K - 1,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* l4_per -> timer2 */
@@ -679,7 +634,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_per__timer2 = {
         .slave          = &omap3xxx_timer2_hwmod,
         .clk            = "gpt2_ick",
         .addr           = omap3xxx_timer2_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap3xxx_timer2_addrs),
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -691,8 +645,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer2_slaves[] = {
 /* timer2 hwmod */
 static struct omap_hwmod omap3xxx_timer2_hwmod = {
         .name           = "timer2",
-        .mpu_irqs       = omap3xxx_timer2_mpu_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap3xxx_timer2_mpu_irqs),
+        .mpu_irqs       = omap2_timer2_mpu_irqs,
         .main_clk       = "gpt2_fck",
         .prcm           = {
                 .omap2 = {
@@ -711,9 +664,6 @@ static struct omap_hwmod omap3xxx_timer2_hwmod = {
 
 /* timer3 */
 static struct omap_hwmod omap3xxx_timer3_hwmod;
-static struct omap_hwmod_irq_info omap3xxx_timer3_mpu_irqs[] = {
-        { .irq = 39, },
-};
 
 static struct omap_hwmod_addr_space omap3xxx_timer3_addrs[] = {
         {
@@ -721,6 +671,7 @@ static struct omap_hwmod_addr_space omap3xxx_timer3_addrs[] = {
                 .pa_end         = 0x49034000 + SZ_1K - 1,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* l4_per -> timer3 */
@@ -729,7 +680,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_per__timer3 = {
         .slave          = &omap3xxx_timer3_hwmod,
         .clk            = "gpt3_ick",
         .addr           = omap3xxx_timer3_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap3xxx_timer3_addrs),
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -741,8 +691,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer3_slaves[] = {
 /* timer3 hwmod */
 static struct omap_hwmod omap3xxx_timer3_hwmod = {
         .name           = "timer3",
-        .mpu_irqs       = omap3xxx_timer3_mpu_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap3xxx_timer3_mpu_irqs),
+        .mpu_irqs       = omap2_timer3_mpu_irqs,
         .main_clk       = "gpt3_fck",
         .prcm           = {
                 .omap2 = {
@@ -761,9 +710,6 @@ static struct omap_hwmod omap3xxx_timer3_hwmod = {
 
 /* timer4 */
 static struct omap_hwmod omap3xxx_timer4_hwmod;
-static struct omap_hwmod_irq_info omap3xxx_timer4_mpu_irqs[] = {
-        { .irq = 40, },
-};
 
 static struct omap_hwmod_addr_space omap3xxx_timer4_addrs[] = {
         {
@@ -771,6 +717,7 @@ static struct omap_hwmod_addr_space omap3xxx_timer4_addrs[] = {
                 .pa_end         = 0x49036000 + SZ_1K - 1,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* l4_per -> timer4 */
@@ -779,7 +726,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_per__timer4 = {
         .slave          = &omap3xxx_timer4_hwmod,
         .clk            = "gpt4_ick",
         .addr           = omap3xxx_timer4_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap3xxx_timer4_addrs),
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -791,8 +737,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer4_slaves[] = {
 /* timer4 hwmod */
 static struct omap_hwmod omap3xxx_timer4_hwmod = {
         .name           = "timer4",
-        .mpu_irqs       = omap3xxx_timer4_mpu_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap3xxx_timer4_mpu_irqs),
+        .mpu_irqs       = omap2_timer4_mpu_irqs,
         .main_clk       = "gpt4_fck",
         .prcm           = {
                 .omap2 = {
@@ -811,9 +756,6 @@ static struct omap_hwmod omap3xxx_timer4_hwmod = {
 
 /* timer5 */
 static struct omap_hwmod omap3xxx_timer5_hwmod;
-static struct omap_hwmod_irq_info omap3xxx_timer5_mpu_irqs[] = {
-        { .irq = 41, },
-};
 
 static struct omap_hwmod_addr_space omap3xxx_timer5_addrs[] = {
         {
@@ -821,6 +763,7 @@ static struct omap_hwmod_addr_space omap3xxx_timer5_addrs[] = {
                 .pa_end         = 0x49038000 + SZ_1K - 1,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* l4_per -> timer5 */
@@ -829,7 +772,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_per__timer5 = {
         .slave          = &omap3xxx_timer5_hwmod,
         .clk            = "gpt5_ick",
         .addr           = omap3xxx_timer5_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap3xxx_timer5_addrs),
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -841,8 +783,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer5_slaves[] = {
 /* timer5 hwmod */
 static struct omap_hwmod omap3xxx_timer5_hwmod = {
         .name           = "timer5",
-        .mpu_irqs       = omap3xxx_timer5_mpu_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap3xxx_timer5_mpu_irqs),
+        .mpu_irqs       = omap2_timer5_mpu_irqs,
         .main_clk       = "gpt5_fck",
         .prcm           = {
                 .omap2 = {
@@ -861,9 +802,6 @@ static struct omap_hwmod omap3xxx_timer5_hwmod = {
 
 /* timer6 */
 static struct omap_hwmod omap3xxx_timer6_hwmod;
-static struct omap_hwmod_irq_info omap3xxx_timer6_mpu_irqs[] = {
-        { .irq = 42, },
-};
 
 static struct omap_hwmod_addr_space omap3xxx_timer6_addrs[] = {
         {
@@ -871,6 +809,7 @@ static struct omap_hwmod_addr_space omap3xxx_timer6_addrs[] = {
                 .pa_end         = 0x4903A000 + SZ_1K - 1,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* l4_per -> timer6 */
@@ -879,7 +818,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_per__timer6 = {
         .slave          = &omap3xxx_timer6_hwmod,
         .clk            = "gpt6_ick",
         .addr           = omap3xxx_timer6_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap3xxx_timer6_addrs),
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -891,8 +829,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer6_slaves[] = {
 /* timer6 hwmod */
 static struct omap_hwmod omap3xxx_timer6_hwmod = {
         .name           = "timer6",
-        .mpu_irqs       = omap3xxx_timer6_mpu_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap3xxx_timer6_mpu_irqs),
+        .mpu_irqs       = omap2_timer6_mpu_irqs,
         .main_clk       = "gpt6_fck",
         .prcm           = {
                 .omap2 = {
@@ -911,9 +848,6 @@ static struct omap_hwmod omap3xxx_timer6_hwmod = {
 
 /* timer7 */
 static struct omap_hwmod omap3xxx_timer7_hwmod;
-static struct omap_hwmod_irq_info omap3xxx_timer7_mpu_irqs[] = {
-        { .irq = 43, },
-};
 
 static struct omap_hwmod_addr_space omap3xxx_timer7_addrs[] = {
         {
@@ -921,6 +855,7 @@ static struct omap_hwmod_addr_space omap3xxx_timer7_addrs[] = {
                 .pa_end         = 0x4903C000 + SZ_1K - 1,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* l4_per -> timer7 */
@@ -929,7 +864,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_per__timer7 = {
         .slave          = &omap3xxx_timer7_hwmod,
         .clk            = "gpt7_ick",
         .addr           = omap3xxx_timer7_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap3xxx_timer7_addrs),
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -941,8 +875,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer7_slaves[] = {
 /* timer7 hwmod */
 static struct omap_hwmod omap3xxx_timer7_hwmod = {
         .name           = "timer7",
-        .mpu_irqs       = omap3xxx_timer7_mpu_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap3xxx_timer7_mpu_irqs),
+        .mpu_irqs       = omap2_timer7_mpu_irqs,
         .main_clk       = "gpt7_fck",
         .prcm           = {
                 .omap2 = {
@@ -961,9 +894,6 @@ static struct omap_hwmod omap3xxx_timer7_hwmod = {
 
 /* timer8 */
 static struct omap_hwmod omap3xxx_timer8_hwmod;
-static struct omap_hwmod_irq_info omap3xxx_timer8_mpu_irqs[] = {
-        { .irq = 44, },
-};
 
 static struct omap_hwmod_addr_space omap3xxx_timer8_addrs[] = {
         {
@@ -971,6 +901,7 @@ static struct omap_hwmod_addr_space omap3xxx_timer8_addrs[] = {
                 .pa_end         = 0x4903E000 + SZ_1K - 1,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* l4_per -> timer8 */
@@ -979,7 +910,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_per__timer8 = {
         .slave          = &omap3xxx_timer8_hwmod,
         .clk            = "gpt8_ick",
         .addr           = omap3xxx_timer8_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap3xxx_timer8_addrs),
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -991,8 +921,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer8_slaves[] = {
 /* timer8 hwmod */
 static struct omap_hwmod omap3xxx_timer8_hwmod = {
         .name           = "timer8",
-        .mpu_irqs       = omap3xxx_timer8_mpu_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap3xxx_timer8_mpu_irqs),
+        .mpu_irqs       = omap2_timer8_mpu_irqs,
         .main_clk       = "gpt8_fck",
         .prcm           = {
                 .omap2 = {
@@ -1011,9 +940,6 @@ static struct omap_hwmod omap3xxx_timer8_hwmod = {
 
 /* timer9 */
 static struct omap_hwmod omap3xxx_timer9_hwmod;
-static struct omap_hwmod_irq_info omap3xxx_timer9_mpu_irqs[] = {
-        { .irq = 45, },
-};
 
 static struct omap_hwmod_addr_space omap3xxx_timer9_addrs[] = {
         {
@@ -1021,6 +947,7 @@ static struct omap_hwmod_addr_space omap3xxx_timer9_addrs[] = {
                 .pa_end         = 0x49040000 + SZ_1K - 1,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* l4_per -> timer9 */
@@ -1029,7 +956,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_per__timer9 = {
         .slave          = &omap3xxx_timer9_hwmod,
         .clk            = "gpt9_ick",
         .addr           = omap3xxx_timer9_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap3xxx_timer9_addrs),
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -1041,8 +967,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer9_slaves[] = {
 /* timer9 hwmod */
 static struct omap_hwmod omap3xxx_timer9_hwmod = {
         .name           = "timer9",
-        .mpu_irqs       = omap3xxx_timer9_mpu_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap3xxx_timer9_mpu_irqs),
+        .mpu_irqs       = omap2_timer9_mpu_irqs,
         .main_clk       = "gpt9_fck",
         .prcm           = {
                 .omap2 = {
@@ -1061,25 +986,13 @@ static struct omap_hwmod omap3xxx_timer9_hwmod = {
 
 /* timer10 */
 static struct omap_hwmod omap3xxx_timer10_hwmod;
-static struct omap_hwmod_irq_info omap3xxx_timer10_mpu_irqs[] = {
-        { .irq = 46, },
-};
-
-static struct omap_hwmod_addr_space omap3xxx_timer10_addrs[] = {
-        {
-                .pa_start       = 0x48086000,
-                .pa_end         = 0x48086000 + SZ_1K - 1,
-                .flags          = ADDR_TYPE_RT
-        },
-};
 
 /* l4_core -> timer10 */
 static struct omap_hwmod_ocp_if omap3xxx_l4_core__timer10 = {
         .master         = &omap3xxx_l4_core_hwmod,
         .slave          = &omap3xxx_timer10_hwmod,
         .clk            = "gpt10_ick",
-        .addr           = omap3xxx_timer10_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap3xxx_timer10_addrs),
+        .addr           = omap2_timer10_addrs,
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -1091,8 +1004,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer10_slaves[] = {
 /* timer10 hwmod */
 static struct omap_hwmod omap3xxx_timer10_hwmod = {
         .name           = "timer10",
-        .mpu_irqs       = omap3xxx_timer10_mpu_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap3xxx_timer10_mpu_irqs),
+        .mpu_irqs       = omap2_timer10_mpu_irqs,
         .main_clk       = "gpt10_fck",
         .prcm           = {
                 .omap2 = {
@@ -1111,25 +1023,13 @@ static struct omap_hwmod omap3xxx_timer10_hwmod = {
 
 /* timer11 */
 static struct omap_hwmod omap3xxx_timer11_hwmod;
-static struct omap_hwmod_irq_info omap3xxx_timer11_mpu_irqs[] = {
-        { .irq = 47, },
-};
-
-static struct omap_hwmod_addr_space omap3xxx_timer11_addrs[] = {
-        {
-                .pa_start       = 0x48088000,
-                .pa_end         = 0x48088000 + SZ_1K - 1,
-                .flags          = ADDR_TYPE_RT
-        },
-};
 
 /* l4_core -> timer11 */
 static struct omap_hwmod_ocp_if omap3xxx_l4_core__timer11 = {
         .master         = &omap3xxx_l4_core_hwmod,
         .slave          = &omap3xxx_timer11_hwmod,
         .clk            = "gpt11_ick",
-        .addr           = omap3xxx_timer11_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap3xxx_timer11_addrs),
+        .addr           = omap2_timer11_addrs,
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -1141,8 +1041,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer11_slaves[] = {
 /* timer11 hwmod */
 static struct omap_hwmod omap3xxx_timer11_hwmod = {
         .name           = "timer11",
-        .mpu_irqs       = omap3xxx_timer11_mpu_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap3xxx_timer11_mpu_irqs),
+        .mpu_irqs       = omap2_timer11_mpu_irqs,
         .main_clk       = "gpt11_fck",
         .prcm           = {
                 .omap2 = {
@@ -1163,6 +1062,7 @@ static struct omap_hwmod omap3xxx_timer11_hwmod = {
 static struct omap_hwmod omap3xxx_timer12_hwmod;
 static struct omap_hwmod_irq_info omap3xxx_timer12_mpu_irqs[] = {
         { .irq = 95, },
+        { .irq = -1 }
 };
 
 static struct omap_hwmod_addr_space omap3xxx_timer12_addrs[] = {
@@ -1171,6 +1071,7 @@ static struct omap_hwmod_addr_space omap3xxx_timer12_addrs[] = {
                 .pa_end         = 0x48304000 + SZ_1K - 1,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* l4_core -> timer12 */
@@ -1179,7 +1080,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__timer12 = {
         .slave          = &omap3xxx_timer12_hwmod,
         .clk            = "gpt12_ick",
         .addr           = omap3xxx_timer12_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap3xxx_timer12_addrs),
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -1192,7 +1092,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer12_slaves[] = {
 static struct omap_hwmod omap3xxx_timer12_hwmod = {
         .name           = "timer12",
         .mpu_irqs       = omap3xxx_timer12_mpu_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap3xxx_timer12_mpu_irqs),
         .main_clk       = "gpt12_fck",
         .prcm           = {
                 .omap2 = {
@@ -1216,6 +1115,7 @@ static struct omap_hwmod_addr_space omap3xxx_wd_timer2_addrs[] = {
                 .pa_end         = 0x4831407f,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 static struct omap_hwmod_ocp_if omap3xxx_l4_wkup__wd_timer2 = {
@@ -1223,7 +1123,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_wkup__wd_timer2 = {
         .slave          = &omap3xxx_wd_timer2_hwmod,
         .clk            = "wdt2_ick",
         .addr           = omap3xxx_wd_timer2_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap3xxx_wd_timer2_addrs),
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -1291,45 +1190,16 @@ static struct omap_hwmod omap3xxx_wd_timer2_hwmod = {
         .flags          = HWMOD_SWSUP_SIDLE,
 };
 
-/* UART common */
-
-static struct omap_hwmod_class_sysconfig uart_sysc = {
-        .rev_offs       = 0x50,
-        .sysc_offs      = 0x54,
-        .syss_offs      = 0x58,
-        .sysc_flags     = (SYSC_HAS_SIDLEMODE |
-                           SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET |
-                           SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS),
-        .idlemodes      = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
-        .sysc_fields    = &omap_hwmod_sysc_type1,
-};
-
-static struct omap_hwmod_class uart_class = {
-        .name = "uart",
-        .sysc = &uart_sysc,
-};
-
 /* UART1 */
 
-static struct omap_hwmod_irq_info uart1_mpu_irqs[] = {
-        { .irq = INT_24XX_UART1_IRQ, },
-};
-
-static struct omap_hwmod_dma_info uart1_sdma_reqs[] = {
-        { .name = "tx", .dma_req = OMAP24XX_DMA_UART1_TX, },
-        { .name = "rx", .dma_req = OMAP24XX_DMA_UART1_RX, },
-};
-
 static struct omap_hwmod_ocp_if *omap3xxx_uart1_slaves[] = {
         &omap3_l4_core__uart1,
 };
 
 static struct omap_hwmod omap3xxx_uart1_hwmod = {
         .name           = "uart1",
-        .mpu_irqs       = uart1_mpu_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(uart1_mpu_irqs),
-        .sdma_reqs      = uart1_sdma_reqs,
-        .sdma_reqs_cnt  = ARRAY_SIZE(uart1_sdma_reqs),
+        .mpu_irqs       = omap2_uart1_mpu_irqs,
+        .sdma_reqs      = omap2_uart1_sdma_reqs,
         .main_clk       = "uart1_fck",
         .prcm           = {
                 .omap2 = {
@@ -1342,31 +1212,20 @@ static struct omap_hwmod omap3xxx_uart1_hwmod = {
         },
         .slaves         = omap3xxx_uart1_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap3xxx_uart1_slaves),
-        .class          = &uart_class,
+        .class          = &omap2_uart_class,
         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
 };
 
 /* UART2 */
 
-static struct omap_hwmod_irq_info uart2_mpu_irqs[] = {
-        { .irq = INT_24XX_UART2_IRQ, },
-};
-
-static struct omap_hwmod_dma_info uart2_sdma_reqs[] = {
-        { .name = "tx", .dma_req = OMAP24XX_DMA_UART2_TX, },
-        { .name = "rx", .dma_req = OMAP24XX_DMA_UART2_RX, },
-};
-
 static struct omap_hwmod_ocp_if *omap3xxx_uart2_slaves[] = {
         &omap3_l4_core__uart2,
 };
 
 static struct omap_hwmod omap3xxx_uart2_hwmod = {
         .name           = "uart2",
-        .mpu_irqs       = uart2_mpu_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(uart2_mpu_irqs),
-        .sdma_reqs      = uart2_sdma_reqs,
-        .sdma_reqs_cnt  = ARRAY_SIZE(uart2_sdma_reqs),
+        .mpu_irqs       = omap2_uart2_mpu_irqs,
+        .sdma_reqs      = omap2_uart2_sdma_reqs,
         .main_clk       = "uart2_fck",
         .prcm           = {
                 .omap2 = {
@@ -1379,31 +1238,20 @@ static struct omap_hwmod omap3xxx_uart2_hwmod = {
         },
         .slaves         = omap3xxx_uart2_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap3xxx_uart2_slaves),
-        .class          = &uart_class,
+        .class          = &omap2_uart_class,
         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
 };
 
 /* UART3 */
 
-static struct omap_hwmod_irq_info uart3_mpu_irqs[] = {
-        { .irq = INT_24XX_UART3_IRQ, },
-};
-
-static struct omap_hwmod_dma_info uart3_sdma_reqs[] = {
-        { .name = "tx", .dma_req = OMAP24XX_DMA_UART3_TX, },
-        { .name = "rx", .dma_req = OMAP24XX_DMA_UART3_RX, },
-};
-
 static struct omap_hwmod_ocp_if *omap3xxx_uart3_slaves[] = {
         &omap3_l4_per__uart3,
 };
 
 static struct omap_hwmod omap3xxx_uart3_hwmod = {
         .name           = "uart3",
-        .mpu_irqs       = uart3_mpu_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(uart3_mpu_irqs),
-        .sdma_reqs      = uart3_sdma_reqs,
-        .sdma_reqs_cnt  = ARRAY_SIZE(uart3_sdma_reqs),
+        .mpu_irqs       = omap2_uart3_mpu_irqs,
+        .sdma_reqs      = omap2_uart3_sdma_reqs,
         .main_clk       = "uart3_fck",
         .prcm           = {
                 .omap2 = {
@@ -1416,7 +1264,7 @@ static struct omap_hwmod omap3xxx_uart3_hwmod = {
         },
         .slaves         = omap3xxx_uart3_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap3xxx_uart3_slaves),
-        .class          = &uart_class,
+        .class          = &omap2_uart_class,
         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
 };
 
@@ -1424,11 +1272,13 @@ static struct omap_hwmod omap3xxx_uart3_hwmod = {
 
 static struct omap_hwmod_irq_info uart4_mpu_irqs[] = {
         { .irq = INT_36XX_UART4_IRQ, },
+        { .irq = -1 }
 };
 
 static struct omap_hwmod_dma_info uart4_sdma_reqs[] = {
         { .name = "rx", .dma_req = OMAP36XX_DMA_UART4_RX, },
         { .name = "tx", .dma_req = OMAP36XX_DMA_UART4_TX, },
+        { .dma_req = -1 }
 };
 
 static struct omap_hwmod_ocp_if *omap3xxx_uart4_slaves[] = {
@@ -1438,9 +1288,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_uart4_slaves[] = {
 static struct omap_hwmod omap3xxx_uart4_hwmod = {
         .name           = "uart4",
         .mpu_irqs       = uart4_mpu_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(uart4_mpu_irqs),
         .sdma_reqs      = uart4_sdma_reqs,
-        .sdma_reqs_cnt  = ARRAY_SIZE(uart4_sdma_reqs),
         .main_clk       = "uart4_fck",
         .prcm           = {
                 .omap2 = {
@@ -1453,7 +1301,7 @@ static struct omap_hwmod omap3xxx_uart4_hwmod = {
         },
         .slaves         = omap3xxx_uart4_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap3xxx_uart4_slaves),
-        .class          = &uart_class,
+        .class          = &omap2_uart_class,
         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3630ES1),
 };
 
@@ -1462,27 +1310,10 @@ static struct omap_hwmod_class i2c_class = {
         .sysc = &i2c_sysc,
 };
 
-/*
- * 'dss' class
- * display sub-system
- */
-
-static struct omap_hwmod_class_sysconfig omap3xxx_dss_sysc = {
-        .rev_offs       = 0x0000,
-        .sysc_offs      = 0x0010,
-        .syss_offs      = 0x0014,
-        .sysc_flags     = (SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE),
-        .sysc_fields    = &omap_hwmod_sysc_type1,
-};
-
-static struct omap_hwmod_class omap3xxx_dss_hwmod_class = {
-        .name = "dss",
-        .sysc = &omap3xxx_dss_sysc,
-};
-
 static struct omap_hwmod_dma_info omap3xxx_dss_sdma_chs[] = {
         { .name = "dispc", .dma_req = 5 },
         { .name = "dsi1", .dma_req = 74 },
+        { .dma_req = -1 }
 };
 
 /* dss */
@@ -1491,21 +1322,12 @@ static struct omap_hwmod_ocp_if *omap3xxx_dss_masters[] = {
         &omap3xxx_dss__l3,
 };
 
-static struct omap_hwmod_addr_space omap3xxx_dss_addrs[] = {
-        {
-                .pa_start       = 0x48050000,
-                .pa_end         = 0x480503FF,
-                .flags          = ADDR_TYPE_RT
-        },
-};
-
 /* l4_core -> dss */
 static struct omap_hwmod_ocp_if omap3430es1_l4_core__dss = {
         .master         = &omap3xxx_l4_core_hwmod,
         .slave          = &omap3430es1_dss_core_hwmod,
         .clk            = "dss_ick",
-        .addr           = omap3xxx_dss_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap3xxx_dss_addrs),
+        .addr           = omap2_dss_addrs,
         .fw = {
                 .omap2 = {
                         .l4_fw_region  = OMAP3ES1_L4_CORE_FW_DSS_CORE_REGION,
@@ -1520,8 +1342,7 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss = {
         .master         = &omap3xxx_l4_core_hwmod,
         .slave          = &omap3xxx_dss_core_hwmod,
         .clk            = "dss_ick",
-        .addr           = omap3xxx_dss_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap3xxx_dss_addrs),
+        .addr           = omap2_dss_addrs,
         .fw = {
                 .omap2 = {
                         .l4_fw_region  = OMAP3_L4_CORE_FW_DSS_CORE_REGION,
@@ -1549,11 +1370,9 @@ static struct omap_hwmod_opt_clk dss_opt_clks[] = {
 
 static struct omap_hwmod omap3430es1_dss_core_hwmod = {
         .name           = "dss_core",
-        .class          = &omap3xxx_dss_hwmod_class,
+        .class          = &omap2_dss_hwmod_class,
         .main_clk       = "dss1_alwon_fck", /* instead of dss_fck */
         .sdma_reqs      = omap3xxx_dss_sdma_chs,
-        .sdma_reqs_cnt  = ARRAY_SIZE(omap3xxx_dss_sdma_chs),
-
         .prcm           = {
                 .omap2 = {
                         .prcm_reg_id = 1,
@@ -1575,11 +1394,9 @@ static struct omap_hwmod omap3430es1_dss_core_hwmod = {
 
 static struct omap_hwmod omap3xxx_dss_core_hwmod = {
         .name           = "dss_core",
-        .class          = &omap3xxx_dss_hwmod_class,
+        .class          = &omap2_dss_hwmod_class,
         .main_clk       = "dss1_alwon_fck", /* instead of dss_fck */
         .sdma_reqs      = omap3xxx_dss_sdma_chs,
-        .sdma_reqs_cnt  = ARRAY_SIZE(omap3xxx_dss_sdma_chs),
-
         .prcm           = {
                 .omap2 = {
                         .prcm_reg_id = 1,
@@ -1600,47 +1417,12 @@ static struct omap_hwmod omap3xxx_dss_core_hwmod = {
                                 CHIP_IS_OMAP3630ES1 | CHIP_GE_OMAP3630ES1_1),
 };
 
-/*
- * 'dispc' class
- * display controller
- */
-
-static struct omap_hwmod_class_sysconfig omap3xxx_dispc_sysc = {
-        .rev_offs       = 0x0000,
-        .sysc_offs      = 0x0010,
-        .syss_offs      = 0x0014,
-        .sysc_flags     = (SYSC_HAS_SIDLEMODE | SYSC_HAS_CLOCKACTIVITY |
-                           SYSC_HAS_MIDLEMODE | SYSC_HAS_ENAWAKEUP |
-                           SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE),
-        .idlemodes      = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
-                           MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART),
-        .sysc_fields    = &omap_hwmod_sysc_type1,
-};
-
-static struct omap_hwmod_class omap3xxx_dispc_hwmod_class = {
-        .name = "dispc",
-        .sysc = &omap3xxx_dispc_sysc,
-};
-
-static struct omap_hwmod_irq_info omap3xxx_dispc_irqs[] = {
-        { .irq = 25 },
-};
-
-static struct omap_hwmod_addr_space omap3xxx_dss_dispc_addrs[] = {
-        {
-                .pa_start       = 0x48050400,
-                .pa_end         = 0x480507FF,
-                .flags          = ADDR_TYPE_RT
-        },
-};
-
 /* l4_core -> dss_dispc */
 static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_dispc = {
         .master         = &omap3xxx_l4_core_hwmod,
         .slave          = &omap3xxx_dss_dispc_hwmod,
         .clk            = "dss_ick",
-        .addr           = omap3xxx_dss_dispc_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap3xxx_dss_dispc_addrs),
+        .addr           = omap2_dss_dispc_addrs,
         .fw = {
                 .omap2 = {
                         .l4_fw_region  = OMAP3_L4_CORE_FW_DSS_DISPC_REGION,
@@ -1658,9 +1440,8 @@ static struct omap_hwmod_ocp_if *omap3xxx_dss_dispc_slaves[] = {
 
 static struct omap_hwmod omap3xxx_dss_dispc_hwmod = {
         .name           = "dss_dispc",
-        .class          = &omap3xxx_dispc_hwmod_class,
-        .mpu_irqs       = omap3xxx_dispc_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap3xxx_dispc_irqs),
+        .class          = &omap2_dispc_hwmod_class,
+        .mpu_irqs       = omap2_dispc_irqs,
         .main_clk       = "dss1_alwon_fck",
         .prcm           = {
                 .omap2 = {
@@ -1688,6 +1469,7 @@ static struct omap_hwmod_class omap3xxx_dsi_hwmod_class = {
 
 static struct omap_hwmod_irq_info omap3xxx_dsi1_irqs[] = {
         { .irq = 25 },
+        { .irq = -1 }
 };
 
 /* dss_dsi1 */
@@ -1697,6 +1479,7 @@ static struct omap_hwmod_addr_space omap3xxx_dss_dsi1_addrs[] = {
                 .pa_end         = 0x4804FFFF,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* l4_core -> dss_dsi1 */
@@ -1704,7 +1487,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_dsi1 = {
         .master         = &omap3xxx_l4_core_hwmod,
         .slave          = &omap3xxx_dss_dsi1_hwmod,
         .addr           = omap3xxx_dss_dsi1_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap3xxx_dss_dsi1_addrs),
         .fw = {
                 .omap2 = {
                         .l4_fw_region  = OMAP3_L4_CORE_FW_DSS_DSI_REGION,
@@ -1724,7 +1506,6 @@ static struct omap_hwmod omap3xxx_dss_dsi1_hwmod = {
         .name           = "dss_dsi1",
         .class          = &omap3xxx_dsi_hwmod_class,
         .mpu_irqs       = omap3xxx_dsi1_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap3xxx_dsi1_irqs),
         .main_clk       = "dss1_alwon_fck",
         .prcm           = {
                 .omap2 = {
@@ -1741,41 +1522,12 @@ static struct omap_hwmod omap3xxx_dss_dsi1_hwmod = {
         .flags          = HWMOD_NO_IDLEST,
 };
 
-/*
- * 'rfbi' class
- * remote frame buffer interface
- */
-
-static struct omap_hwmod_class_sysconfig omap3xxx_rfbi_sysc = {
-        .rev_offs       = 0x0000,
-        .sysc_offs      = 0x0010,
-        .syss_offs      = 0x0014,
-        .sysc_flags     = (SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET |
-                           SYSC_HAS_AUTOIDLE),
-        .idlemodes      = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
-        .sysc_fields    = &omap_hwmod_sysc_type1,
-};
-
-static struct omap_hwmod_class omap3xxx_rfbi_hwmod_class = {
-        .name = "rfbi",
-        .sysc = &omap3xxx_rfbi_sysc,
-};
-
-static struct omap_hwmod_addr_space omap3xxx_dss_rfbi_addrs[] = {
-        {
-                .pa_start       = 0x48050800,
-                .pa_end         = 0x48050BFF,
-                .flags          = ADDR_TYPE_RT
-        },
-};
-
 /* l4_core -> dss_rfbi */
 static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_rfbi = {
         .master         = &omap3xxx_l4_core_hwmod,
         .slave          = &omap3xxx_dss_rfbi_hwmod,
         .clk            = "dss_ick",
-        .addr           = omap3xxx_dss_rfbi_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap3xxx_dss_rfbi_addrs),
+        .addr           = omap2_dss_rfbi_addrs,
         .fw = {
                 .omap2 = {
                         .l4_fw_region  = OMAP3_L4_CORE_FW_DSS_RFBI_REGION,
@@ -1793,7 +1545,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_dss_rfbi_slaves[] = {
 
 static struct omap_hwmod omap3xxx_dss_rfbi_hwmod = {
         .name           = "dss_rfbi",
-        .class          = &omap3xxx_rfbi_hwmod_class,
+        .class          = &omap2_rfbi_hwmod_class,
         .main_clk       = "dss1_alwon_fck",
         .prcm           = {
                 .omap2 = {
@@ -1810,31 +1562,12 @@ static struct omap_hwmod omap3xxx_dss_rfbi_hwmod = {
         .flags          = HWMOD_NO_IDLEST,
 };
 
-/*
- * 'venc' class
- * video encoder
- */
-
-static struct omap_hwmod_class omap3xxx_venc_hwmod_class = {
-        .name = "venc",
-};
-
-/* dss_venc */
-static struct omap_hwmod_addr_space omap3xxx_dss_venc_addrs[] = {
-        {
-                .pa_start       = 0x48050C00,
-                .pa_end         = 0x48050FFF,
-                .flags          = ADDR_TYPE_RT
-        },
-};
-
 /* l4_core -> dss_venc */
 static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_venc = {
         .master         = &omap3xxx_l4_core_hwmod,
         .slave          = &omap3xxx_dss_venc_hwmod,
         .clk            = "dss_tv_fck",
-        .addr           = omap3xxx_dss_venc_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap3xxx_dss_venc_addrs),
+        .addr           = omap2_dss_venc_addrs,
         .fw = {
                 .omap2 = {
                         .l4_fw_region  = OMAP3_L4_CORE_FW_DSS_VENC_REGION,
@@ -1853,7 +1586,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_dss_venc_slaves[] = {
 
 static struct omap_hwmod omap3xxx_dss_venc_hwmod = {
         .name           = "dss_venc",
-        .class          = &omap3xxx_venc_hwmod_class,
+        .class          = &omap2_venc_hwmod_class,
         .main_clk       = "dss1_alwon_fck",
         .prcm           = {
                 .omap2 = {
@@ -1876,25 +1609,14 @@ static struct omap_i2c_dev_attr i2c1_dev_attr = {
         .fifo_depth     = 8, /* bytes */
 };
 
-static struct omap_hwmod_irq_info i2c1_mpu_irqs[] = {
-        { .irq = INT_24XX_I2C1_IRQ, },
-};
-
-static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = {
-        { .name = "tx", .dma_req = OMAP24XX_DMA_I2C1_TX },
-        { .name = "rx", .dma_req = OMAP24XX_DMA_I2C1_RX },
-};
-
 static struct omap_hwmod_ocp_if *omap3xxx_i2c1_slaves[] = {
         &omap3_l4_core__i2c1,
 };
 
 static struct omap_hwmod omap3xxx_i2c1_hwmod = {
         .name           = "i2c1",
-        .mpu_irqs       = i2c1_mpu_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(i2c1_mpu_irqs),
-        .sdma_reqs      = i2c1_sdma_reqs,
-        .sdma_reqs_cnt  = ARRAY_SIZE(i2c1_sdma_reqs),
+        .mpu_irqs       = omap2_i2c1_mpu_irqs,
+        .sdma_reqs      = omap2_i2c1_sdma_reqs,
         .main_clk       = "i2c1_fck",
         .prcm           = {
                 .omap2 = {
@@ -1918,25 +1640,14 @@ static struct omap_i2c_dev_attr i2c2_dev_attr = {
         .fifo_depth     = 8, /* bytes */
 };
 
-static struct omap_hwmod_irq_info i2c2_mpu_irqs[] = {
-        { .irq = INT_24XX_I2C2_IRQ, },
-};
-
-static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = {
-        { .name = "tx", .dma_req = OMAP24XX_DMA_I2C2_TX },
-        { .name = "rx", .dma_req = OMAP24XX_DMA_I2C2_RX },
-};
-
 static struct omap_hwmod_ocp_if *omap3xxx_i2c2_slaves[] = {
         &omap3_l4_core__i2c2,
 };
 
 static struct omap_hwmod omap3xxx_i2c2_hwmod = {
         .name           = "i2c2",
-        .mpu_irqs       = i2c2_mpu_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(i2c2_mpu_irqs),
-        .sdma_reqs      = i2c2_sdma_reqs,
-        .sdma_reqs_cnt  = ARRAY_SIZE(i2c2_sdma_reqs),
+        .mpu_irqs       = omap2_i2c2_mpu_irqs,
+        .sdma_reqs      = omap2_i2c2_sdma_reqs,
         .main_clk       = "i2c2_fck",
         .prcm           = {
                 .omap2 = {
@@ -1962,11 +1673,13 @@ static struct omap_i2c_dev_attr i2c3_dev_attr = {
 
 static struct omap_hwmod_irq_info i2c3_mpu_irqs[] = {
         { .irq = INT_34XX_I2C3_IRQ, },
+        { .irq = -1 }
 };
 
 static struct omap_hwmod_dma_info i2c3_sdma_reqs[] = {
         { .name = "tx", .dma_req = OMAP34XX_DMA_I2C3_TX },
         { .name = "rx", .dma_req = OMAP34XX_DMA_I2C3_RX },
+        { .dma_req = -1 }
 };
 
 static struct omap_hwmod_ocp_if *omap3xxx_i2c3_slaves[] = {
@@ -1976,9 +1689,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_i2c3_slaves[] = {
 static struct omap_hwmod omap3xxx_i2c3_hwmod = {
         .name           = "i2c3",
         .mpu_irqs       = i2c3_mpu_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(i2c3_mpu_irqs),
         .sdma_reqs      = i2c3_sdma_reqs,
-        .sdma_reqs_cnt  = ARRAY_SIZE(i2c3_sdma_reqs),
         .main_clk       = "i2c3_fck",
         .prcm           = {
                 .omap2 = {
@@ -2003,13 +1714,13 @@ static struct omap_hwmod_addr_space omap3xxx_gpio1_addrs[] = {
                 .pa_end         = 0x483101ff,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 static struct omap_hwmod_ocp_if omap3xxx_l4_wkup__gpio1 = {
         .master         = &omap3xxx_l4_wkup_hwmod,
         .slave          = &omap3xxx_gpio1_hwmod,
         .addr           = omap3xxx_gpio1_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap3xxx_gpio1_addrs),
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -2020,13 +1731,13 @@ static struct omap_hwmod_addr_space omap3xxx_gpio2_addrs[] = {
                 .pa_end         = 0x490501ff,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 static struct omap_hwmod_ocp_if omap3xxx_l4_per__gpio2 = {
         .master         = &omap3xxx_l4_per_hwmod,
         .slave          = &omap3xxx_gpio2_hwmod,
         .addr           = omap3xxx_gpio2_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap3xxx_gpio2_addrs),
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -2037,13 +1748,13 @@ static struct omap_hwmod_addr_space omap3xxx_gpio3_addrs[] = {
                 .pa_end         = 0x490521ff,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 static struct omap_hwmod_ocp_if omap3xxx_l4_per__gpio3 = {
         .master         = &omap3xxx_l4_per_hwmod,
         .slave          = &omap3xxx_gpio3_hwmod,
         .addr           = omap3xxx_gpio3_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap3xxx_gpio3_addrs),
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -2054,13 +1765,13 @@ static struct omap_hwmod_addr_space omap3xxx_gpio4_addrs[] = {
                 .pa_end         = 0x490541ff,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 static struct omap_hwmod_ocp_if omap3xxx_l4_per__gpio4 = {
         .master         = &omap3xxx_l4_per_hwmod,
         .slave          = &omap3xxx_gpio4_hwmod,
         .addr           = omap3xxx_gpio4_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap3xxx_gpio4_addrs),
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -2071,13 +1782,13 @@ static struct omap_hwmod_addr_space omap3xxx_gpio5_addrs[] = {
                 .pa_end         = 0x490561ff,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 static struct omap_hwmod_ocp_if omap3xxx_l4_per__gpio5 = {
         .master         = &omap3xxx_l4_per_hwmod,
         .slave          = &omap3xxx_gpio5_hwmod,
         .addr           = omap3xxx_gpio5_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap3xxx_gpio5_addrs),
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -2088,13 +1799,13 @@ static struct omap_hwmod_addr_space omap3xxx_gpio6_addrs[] = {
                 .pa_end         = 0x490581ff,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 static struct omap_hwmod_ocp_if omap3xxx_l4_per__gpio6 = {
         .master         = &omap3xxx_l4_per_hwmod,
         .slave          = &omap3xxx_gpio6_hwmod,
         .addr           = omap3xxx_gpio6_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap3xxx_gpio6_addrs),
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -2127,10 +1838,6 @@ static struct omap_gpio_dev_attr gpio_dev_attr = {
 };
 
 /* gpio1 */
-static struct omap_hwmod_irq_info omap3xxx_gpio1_irqs[] = {
-        { .irq = 29 }, /* INT_34XX_GPIO_BANK1 */
-};
-
 static struct omap_hwmod_opt_clk gpio1_opt_clks[] = {
         { .role = "dbclk", .clk = "gpio1_dbck", },
 };
@@ -2142,8 +1849,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_gpio1_slaves[] = {
 static struct omap_hwmod omap3xxx_gpio1_hwmod = {
         .name           = "gpio1",
         .flags          = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
-        .mpu_irqs       = omap3xxx_gpio1_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap3xxx_gpio1_irqs),
+        .mpu_irqs       = omap2_gpio1_irqs,
         .main_clk       = "gpio1_ick",
         .opt_clks       = gpio1_opt_clks,
         .opt_clks_cnt   = ARRAY_SIZE(gpio1_opt_clks),
@@ -2164,10 +1870,6 @@ static struct omap_hwmod omap3xxx_gpio1_hwmod = {
 };
 
 /* gpio2 */
-static struct omap_hwmod_irq_info omap3xxx_gpio2_irqs[] = {
-        { .irq = 30 }, /* INT_34XX_GPIO_BANK2 */
-};
-
 static struct omap_hwmod_opt_clk gpio2_opt_clks[] = {
         { .role = "dbclk", .clk = "gpio2_dbck", },
 };
@@ -2179,8 +1881,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_gpio2_slaves[] = {
 static struct omap_hwmod omap3xxx_gpio2_hwmod = {
         .name           = "gpio2",
         .flags          = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
-        .mpu_irqs       = omap3xxx_gpio2_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap3xxx_gpio2_irqs),
+        .mpu_irqs       = omap2_gpio2_irqs,
         .main_clk       = "gpio2_ick",
         .opt_clks       = gpio2_opt_clks,
         .opt_clks_cnt   = ARRAY_SIZE(gpio2_opt_clks),
@@ -2201,10 +1902,6 @@ static struct omap_hwmod omap3xxx_gpio2_hwmod = {
 };
 
 /* gpio3 */
-static struct omap_hwmod_irq_info omap3xxx_gpio3_irqs[] = {
-        { .irq = 31 }, /* INT_34XX_GPIO_BANK3 */
-};
-
 static struct omap_hwmod_opt_clk gpio3_opt_clks[] = {
         { .role = "dbclk", .clk = "gpio3_dbck", },
 };
@@ -2216,8 +1913,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_gpio3_slaves[] = {
 static struct omap_hwmod omap3xxx_gpio3_hwmod = {
         .name           = "gpio3",
         .flags          = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
-        .mpu_irqs       = omap3xxx_gpio3_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap3xxx_gpio3_irqs),
+        .mpu_irqs       = omap2_gpio3_irqs,
         .main_clk       = "gpio3_ick",
         .opt_clks       = gpio3_opt_clks,
         .opt_clks_cnt   = ARRAY_SIZE(gpio3_opt_clks),
@@ -2238,10 +1934,6 @@ static struct omap_hwmod omap3xxx_gpio3_hwmod = {
 };
 
 /* gpio4 */
-static struct omap_hwmod_irq_info omap3xxx_gpio4_irqs[] = {
-        { .irq = 32 }, /* INT_34XX_GPIO_BANK4 */
-};
-
 static struct omap_hwmod_opt_clk gpio4_opt_clks[] = {
         { .role = "dbclk", .clk = "gpio4_dbck", },
 };
@@ -2253,8 +1945,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_gpio4_slaves[] = {
 static struct omap_hwmod omap3xxx_gpio4_hwmod = {
         .name           = "gpio4",
         .flags          = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
-        .mpu_irqs       = omap3xxx_gpio4_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap3xxx_gpio4_irqs),
+        .mpu_irqs       = omap2_gpio4_irqs,
         .main_clk       = "gpio4_ick",
         .opt_clks       = gpio4_opt_clks,
         .opt_clks_cnt   = ARRAY_SIZE(gpio4_opt_clks),
@@ -2277,6 +1968,7 @@ static struct omap_hwmod omap3xxx_gpio4_hwmod = {
 /* gpio5 */
 static struct omap_hwmod_irq_info omap3xxx_gpio5_irqs[] = {
         { .irq = 33 }, /* INT_34XX_GPIO_BANK5 */
+        { .irq = -1 }
 };
 
 static struct omap_hwmod_opt_clk gpio5_opt_clks[] = {
@@ -2291,7 +1983,6 @@ static struct omap_hwmod omap3xxx_gpio5_hwmod = {
         .name           = "gpio5",
         .flags          = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
         .mpu_irqs       = omap3xxx_gpio5_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap3xxx_gpio5_irqs),
         .main_clk       = "gpio5_ick",
         .opt_clks       = gpio5_opt_clks,
         .opt_clks_cnt   = ARRAY_SIZE(gpio5_opt_clks),
@@ -2314,6 +2005,7 @@ static struct omap_hwmod omap3xxx_gpio5_hwmod = {
 /* gpio6 */
 static struct omap_hwmod_irq_info omap3xxx_gpio6_irqs[] = {
         { .irq = 34 }, /* INT_34XX_GPIO_BANK6 */
+        { .irq = -1 }
 };
 
 static struct omap_hwmod_opt_clk gpio6_opt_clks[] = {
@@ -2328,7 +2020,6 @@ static struct omap_hwmod omap3xxx_gpio6_hwmod = {
         .name           = "gpio6",
         .flags          = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
         .mpu_irqs       = omap3xxx_gpio6_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap3xxx_gpio6_irqs),
         .main_clk       = "gpio6_ick",
         .opt_clks       = gpio6_opt_clks,
         .opt_clks_cnt   = ARRAY_SIZE(gpio6_opt_clks),
@@ -2382,19 +2073,13 @@ static struct omap_hwmod_class omap3xxx_dma_hwmod_class = {
 };
 
 /* dma_system */
-static struct omap_hwmod_irq_info omap3xxx_dma_system_irqs[] = {
-        { .name = "0", .irq = 12 }, /* INT_24XX_SDMA_IRQ0 */
-        { .name = "1", .irq = 13 }, /* INT_24XX_SDMA_IRQ1 */
-        { .name = "2", .irq = 14 }, /* INT_24XX_SDMA_IRQ2 */
-        { .name = "3", .irq = 15 }, /* INT_24XX_SDMA_IRQ3 */
-};
-
 static struct omap_hwmod_addr_space omap3xxx_dma_system_addrs[] = {
         {
                 .pa_start       = 0x48056000,
                 .pa_end         = 0x48056fff,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* dma_system master ports */
@@ -2408,7 +2093,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__dma_system = {
         .slave          = &omap3xxx_dma_system_hwmod,
         .clk            = "core_l4_ick",
         .addr           = omap3xxx_dma_system_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap3xxx_dma_system_addrs),
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -2420,8 +2104,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_dma_system_slaves[] = {
 static struct omap_hwmod omap3xxx_dma_system_hwmod = {
         .name           = "dma",
         .class          = &omap3xxx_dma_hwmod_class,
-        .mpu_irqs       = omap3xxx_dma_system_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap3xxx_dma_system_irqs),
+        .mpu_irqs       = omap2_dma_system_irqs,
         .main_clk       = "core_l3_ick",
         .prcm = {
                 .omap2 = {
@@ -2466,11 +2149,7 @@ static struct omap_hwmod_irq_info omap3xxx_mcbsp1_irqs[] = {
         { .name = "irq", .irq = 16 },
         { .name = "tx", .irq = 59 },
         { .name = "rx", .irq = 60 },
-};
-
-static struct omap_hwmod_dma_info omap3xxx_mcbsp1_sdma_chs[] = {
-        { .name = "rx", .dma_req = 32 },
-        { .name = "tx", .dma_req = 31 },
+        { .irq = -1 }
 };
 
 static struct omap_hwmod_addr_space omap3xxx_mcbsp1_addrs[] = {
@@ -2480,6 +2159,7 @@ static struct omap_hwmod_addr_space omap3xxx_mcbsp1_addrs[] = {
                 .pa_end         = 0x480740ff,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* l4_core -> mcbsp1 */
@@ -2488,7 +2168,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__mcbsp1 = {
         .slave          = &omap3xxx_mcbsp1_hwmod,
         .clk            = "mcbsp1_ick",
         .addr           = omap3xxx_mcbsp1_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap3xxx_mcbsp1_addrs),
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -2501,9 +2180,7 @@ static struct omap_hwmod omap3xxx_mcbsp1_hwmod = {
         .name           = "mcbsp1",
         .class          = &omap3xxx_mcbsp_hwmod_class,
         .mpu_irqs       = omap3xxx_mcbsp1_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap3xxx_mcbsp1_irqs),
-        .sdma_reqs      = omap3xxx_mcbsp1_sdma_chs,
-        .sdma_reqs_cnt  = ARRAY_SIZE(omap3xxx_mcbsp1_sdma_chs),
+        .sdma_reqs      = omap2_mcbsp1_sdma_reqs,
         .main_clk       = "mcbsp1_fck",
         .prcm           = {
                 .omap2 = {
@@ -2524,11 +2201,7 @@ static struct omap_hwmod_irq_info omap3xxx_mcbsp2_irqs[] = {
         { .name = "irq", .irq = 17 },
         { .name = "tx", .irq = 62 },
         { .name = "rx", .irq = 63 },
-};
-
-static struct omap_hwmod_dma_info omap3xxx_mcbsp2_sdma_chs[] = {
-        { .name = "rx", .dma_req = 34 },
-        { .name = "tx", .dma_req = 33 },
+        { .irq = -1 }
 };
 
 static struct omap_hwmod_addr_space omap3xxx_mcbsp2_addrs[] = {
@@ -2538,6 +2211,7 @@ static struct omap_hwmod_addr_space omap3xxx_mcbsp2_addrs[] = {
                 .pa_end         = 0x490220ff,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* l4_per -> mcbsp2 */
@@ -2546,7 +2220,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_per__mcbsp2 = {
         .slave          = &omap3xxx_mcbsp2_hwmod,
         .clk            = "mcbsp2_ick",
         .addr           = omap3xxx_mcbsp2_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap3xxx_mcbsp2_addrs),
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -2563,9 +2236,7 @@ static struct omap_hwmod omap3xxx_mcbsp2_hwmod = {
         .name           = "mcbsp2",
         .class          = &omap3xxx_mcbsp_hwmod_class,
         .mpu_irqs       = omap3xxx_mcbsp2_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap3xxx_mcbsp2_irqs),
-        .sdma_reqs      = omap3xxx_mcbsp2_sdma_chs,
-        .sdma_reqs_cnt  = ARRAY_SIZE(omap3xxx_mcbsp2_sdma_chs),
+        .sdma_reqs      = omap2_mcbsp2_sdma_reqs,
         .main_clk       = "mcbsp2_fck",
         .prcm           = {
                 .omap2 = {
@@ -2587,11 +2258,7 @@ static struct omap_hwmod_irq_info omap3xxx_mcbsp3_irqs[] = {
         { .name = "irq", .irq = 22 },
         { .name = "tx", .irq = 89 },
         { .name = "rx", .irq = 90 },
-};
-
-static struct omap_hwmod_dma_info omap3xxx_mcbsp3_sdma_chs[] = {
-        { .name = "rx", .dma_req = 18 },
-        { .name = "tx", .dma_req = 17 },
+        { .irq = -1 }
 };
 
 static struct omap_hwmod_addr_space omap3xxx_mcbsp3_addrs[] = {
@@ -2601,6 +2268,7 @@ static struct omap_hwmod_addr_space omap3xxx_mcbsp3_addrs[] = {
                 .pa_end         = 0x490240ff,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* l4_per -> mcbsp3 */
@@ -2609,7 +2277,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_per__mcbsp3 = {
         .slave          = &omap3xxx_mcbsp3_hwmod,
         .clk            = "mcbsp3_ick",
         .addr           = omap3xxx_mcbsp3_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap3xxx_mcbsp3_addrs),
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -2626,9 +2293,7 @@ static struct omap_hwmod omap3xxx_mcbsp3_hwmod = {
         .name           = "mcbsp3",
         .class          = &omap3xxx_mcbsp_hwmod_class,
         .mpu_irqs       = omap3xxx_mcbsp3_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap3xxx_mcbsp3_irqs),
-        .sdma_reqs      = omap3xxx_mcbsp3_sdma_chs,
-        .sdma_reqs_cnt  = ARRAY_SIZE(omap3xxx_mcbsp3_sdma_chs),
+        .sdma_reqs      = omap2_mcbsp3_sdma_reqs,
         .main_clk       = "mcbsp3_fck",
         .prcm           = {
                 .omap2 = {
@@ -2650,11 +2315,13 @@ static struct omap_hwmod_irq_info omap3xxx_mcbsp4_irqs[] = {
         { .name = "irq", .irq = 23 },
         { .name = "tx", .irq = 54 },
         { .name = "rx", .irq = 55 },
+        { .irq = -1 }
 };
 
 static struct omap_hwmod_dma_info omap3xxx_mcbsp4_sdma_chs[] = {
         { .name = "rx", .dma_req = 20 },
         { .name = "tx", .dma_req = 19 },
+        { .dma_req = -1 }
 };
 
 static struct omap_hwmod_addr_space omap3xxx_mcbsp4_addrs[] = {
@@ -2664,6 +2331,7 @@ static struct omap_hwmod_addr_space omap3xxx_mcbsp4_addrs[] = {
                 .pa_end         = 0x490260ff,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* l4_per -> mcbsp4 */
@@ -2672,7 +2340,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_per__mcbsp4 = {
         .slave          = &omap3xxx_mcbsp4_hwmod,
         .clk            = "mcbsp4_ick",
         .addr           = omap3xxx_mcbsp4_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap3xxx_mcbsp4_addrs),
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -2685,9 +2352,7 @@ static struct omap_hwmod omap3xxx_mcbsp4_hwmod = {
         .name           = "mcbsp4",
         .class          = &omap3xxx_mcbsp_hwmod_class,
         .mpu_irqs       = omap3xxx_mcbsp4_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap3xxx_mcbsp4_irqs),
         .sdma_reqs      = omap3xxx_mcbsp4_sdma_chs,
-        .sdma_reqs_cnt  = ARRAY_SIZE(omap3xxx_mcbsp4_sdma_chs),
         .main_clk       = "mcbsp4_fck",
         .prcm           = {
                 .omap2 = {
@@ -2708,11 +2373,13 @@ static struct omap_hwmod_irq_info omap3xxx_mcbsp5_irqs[] = {
         { .name = "irq", .irq = 27 },
         { .name = "tx", .irq = 81 },
         { .name = "rx", .irq = 82 },
+        { .irq = -1 }
 };
 
 static struct omap_hwmod_dma_info omap3xxx_mcbsp5_sdma_chs[] = {
         { .name = "rx", .dma_req = 22 },
         { .name = "tx", .dma_req = 21 },
+        { .dma_req = -1 }
 };
 
 static struct omap_hwmod_addr_space omap3xxx_mcbsp5_addrs[] = {
@@ -2722,6 +2389,7 @@ static struct omap_hwmod_addr_space omap3xxx_mcbsp5_addrs[] = {
                 .pa_end         = 0x480960ff,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* l4_core -> mcbsp5 */
@@ -2730,7 +2398,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__mcbsp5 = {
         .slave          = &omap3xxx_mcbsp5_hwmod,
         .clk            = "mcbsp5_ick",
         .addr           = omap3xxx_mcbsp5_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap3xxx_mcbsp5_addrs),
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -2743,9 +2410,7 @@ static struct omap_hwmod omap3xxx_mcbsp5_hwmod = {
         .name           = "mcbsp5",
         .class          = &omap3xxx_mcbsp_hwmod_class,
         .mpu_irqs       = omap3xxx_mcbsp5_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap3xxx_mcbsp5_irqs),
         .sdma_reqs      = omap3xxx_mcbsp5_sdma_chs,
-        .sdma_reqs_cnt  = ARRAY_SIZE(omap3xxx_mcbsp5_sdma_chs),
         .main_clk       = "mcbsp5_fck",
         .prcm           = {
                 .omap2 = {
@@ -2776,6 +2441,7 @@ static struct omap_hwmod_class omap3xxx_mcbsp_sidetone_hwmod_class = {
 /* mcbsp2_sidetone */
 static struct omap_hwmod_irq_info omap3xxx_mcbsp2_sidetone_irqs[] = {
         { .name = "irq", .irq = 4 },
+        { .irq = -1 }
 };
 
 static struct omap_hwmod_addr_space omap3xxx_mcbsp2_sidetone_addrs[] = {
@@ -2785,6 +2451,7 @@ static struct omap_hwmod_addr_space omap3xxx_mcbsp2_sidetone_addrs[] = {
                 .pa_end         = 0x490280ff,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* l4_per -> mcbsp2_sidetone */
@@ -2793,7 +2460,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_per__mcbsp2_sidetone = {
         .slave          = &omap3xxx_mcbsp2_sidetone_hwmod,
         .clk            = "mcbsp2_ick",
         .addr           = omap3xxx_mcbsp2_sidetone_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap3xxx_mcbsp2_sidetone_addrs),
         .user           = OCP_USER_MPU,
 };
 
@@ -2806,7 +2472,6 @@ static struct omap_hwmod omap3xxx_mcbsp2_sidetone_hwmod = {
         .name           = "mcbsp2_sidetone",
         .class          = &omap3xxx_mcbsp_sidetone_hwmod_class,
         .mpu_irqs       = omap3xxx_mcbsp2_sidetone_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap3xxx_mcbsp2_sidetone_irqs),
         .main_clk       = "mcbsp2_fck",
         .prcm           = {
                 .omap2 = {
@@ -2825,6 +2490,7 @@ static struct omap_hwmod omap3xxx_mcbsp2_sidetone_hwmod = {
 /* mcbsp3_sidetone */
 static struct omap_hwmod_irq_info omap3xxx_mcbsp3_sidetone_irqs[] = {
         { .name = "irq", .irq = 5 },
+        { .irq = -1 }
 };
 
 static struct omap_hwmod_addr_space omap3xxx_mcbsp3_sidetone_addrs[] = {
@@ -2834,6 +2500,7 @@ static struct omap_hwmod_addr_space omap3xxx_mcbsp3_sidetone_addrs[] = {
                 .pa_end         = 0x4902A0ff,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* l4_per -> mcbsp3_sidetone */
@@ -2842,7 +2509,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_per__mcbsp3_sidetone = {
         .slave          = &omap3xxx_mcbsp3_sidetone_hwmod,
         .clk            = "mcbsp3_ick",
         .addr           = omap3xxx_mcbsp3_sidetone_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap3xxx_mcbsp3_sidetone_addrs),
         .user           = OCP_USER_MPU,
 };
 
@@ -2855,7 +2521,6 @@ static struct omap_hwmod omap3xxx_mcbsp3_sidetone_hwmod = {
         .name           = "mcbsp3_sidetone",
         .class          = &omap3xxx_mcbsp_sidetone_hwmod_class,
         .mpu_irqs       = omap3xxx_mcbsp3_sidetone_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap3xxx_mcbsp3_sidetone_irqs),
         .main_clk       = "mcbsp3_fck",
         .prcm           = {
                 .omap2 = {
@@ -3025,6 +2690,7 @@ static struct omap_hwmod_class omap3xxx_mailbox_hwmod_class = {
 static struct omap_hwmod omap3xxx_mailbox_hwmod;
 static struct omap_hwmod_irq_info omap3xxx_mailbox_irqs[] = {
         { .irq = 26 },
+        { .irq = -1 }
 };
 
 static struct omap_hwmod_addr_space omap3xxx_mailbox_addrs[] = {
@@ -3033,6 +2699,7 @@ static struct omap_hwmod_addr_space omap3xxx_mailbox_addrs[] = {
                 .pa_end         = 0x480941ff,
                 .flags          = ADDR_TYPE_RT,
         },
+        { }
 };
 
 /* l4_core -> mailbox */
@@ -3040,7 +2707,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__mailbox = {
         .master         = &omap3xxx_l4_core_hwmod,
         .slave          = &omap3xxx_mailbox_hwmod,
         .addr           = omap3xxx_mailbox_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap3xxx_mailbox_addrs),
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -3053,7 +2719,6 @@ static struct omap_hwmod omap3xxx_mailbox_hwmod = {
         .name           = "mailbox",
         .class          = &omap3xxx_mailbox_hwmod_class,
         .mpu_irqs       = omap3xxx_mailbox_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap3xxx_mailbox_irqs),
         .main_clk       = "mailboxes_ick",
         .prcm           = {
                 .omap2 = {
@@ -3070,56 +2735,29 @@ static struct omap_hwmod omap3xxx_mailbox_hwmod = {
 };
 
 /* l4 core -> mcspi1 interface */
-static struct omap_hwmod_addr_space omap34xx_mcspi1_addr_space[] = {
-        {
-                .pa_start       = 0x48098000,
-                .pa_end         = 0x480980ff,
-                .flags          = ADDR_TYPE_RT,
-        },
-};
-
 static struct omap_hwmod_ocp_if omap34xx_l4_core__mcspi1 = {
         .master         = &omap3xxx_l4_core_hwmod,
         .slave          = &omap34xx_mcspi1,
         .clk            = "mcspi1_ick",
-        .addr           = omap34xx_mcspi1_addr_space,
-        .addr_cnt       = ARRAY_SIZE(omap34xx_mcspi1_addr_space),
+        .addr           = omap2_mcspi1_addr_space,
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
 /* l4 core -> mcspi2 interface */
-static struct omap_hwmod_addr_space omap34xx_mcspi2_addr_space[] = {
-        {
-                .pa_start       = 0x4809a000,
-                .pa_end         = 0x4809a0ff,
-                .flags          = ADDR_TYPE_RT,
-        },
-};
-
 static struct omap_hwmod_ocp_if omap34xx_l4_core__mcspi2 = {
         .master         = &omap3xxx_l4_core_hwmod,
         .slave          = &omap34xx_mcspi2,
         .clk            = "mcspi2_ick",
-        .addr           = omap34xx_mcspi2_addr_space,
-        .addr_cnt       = ARRAY_SIZE(omap34xx_mcspi2_addr_space),
+        .addr           = omap2_mcspi2_addr_space,
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
 /* l4 core -> mcspi3 interface */
-static struct omap_hwmod_addr_space omap34xx_mcspi3_addr_space[] = {
-        {
-                .pa_start       = 0x480b8000,
-                .pa_end         = 0x480b80ff,
-                .flags          = ADDR_TYPE_RT,
-        },
-};
-
 static struct omap_hwmod_ocp_if omap34xx_l4_core__mcspi3 = {
         .master         = &omap3xxx_l4_core_hwmod,
         .slave          = &omap34xx_mcspi3,
         .clk            = "mcspi3_ick",
-        .addr           = omap34xx_mcspi3_addr_space,
-        .addr_cnt       = ARRAY_SIZE(omap34xx_mcspi3_addr_space),
+        .addr           = omap2430_mcspi3_addr_space,
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -3130,6 +2768,7 @@ static struct omap_hwmod_addr_space omap34xx_mcspi4_addr_space[] = {
                 .pa_end         = 0x480ba0ff,
                 .flags          = ADDR_TYPE_RT,
         },
+        { }
 };
 
 static struct omap_hwmod_ocp_if omap34xx_l4_core__mcspi4 = {
@@ -3137,7 +2776,6 @@ static struct omap_hwmod_ocp_if omap34xx_l4_core__mcspi4 = {
         .slave          = &omap34xx_mcspi4,
         .clk            = "mcspi4_ick",
         .addr           = omap34xx_mcspi4_addr_space,
-        .addr_cnt       = ARRAY_SIZE(omap34xx_mcspi4_addr_space),
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -3165,21 +2803,6 @@ static struct omap_hwmod_class omap34xx_mcspi_class = {
 };
 
 /* mcspi1 */
-static struct omap_hwmod_irq_info omap34xx_mcspi1_mpu_irqs[] = {
-        { .name = "irq", .irq = 65 },
-};
-
-static struct omap_hwmod_dma_info omap34xx_mcspi1_sdma_reqs[] = {
-        { .name = "tx0", .dma_req = 35 },
-        { .name = "rx0", .dma_req = 36 },
-        { .name = "tx1", .dma_req = 37 },
-        { .name = "rx1", .dma_req = 38 },
-        { .name = "tx2", .dma_req = 39 },
-        { .name = "rx2", .dma_req = 40 },
-        { .name = "tx3", .dma_req = 41 },
-        { .name = "rx3", .dma_req = 42 },
-};
-
 static struct omap_hwmod_ocp_if *omap34xx_mcspi1_slaves[] = {
         &omap34xx_l4_core__mcspi1,
 };
@@ -3190,10 +2813,8 @@ static struct omap2_mcspi_dev_attr omap_mcspi1_dev_attr = {
 
 static struct omap_hwmod omap34xx_mcspi1 = {
         .name           = "mcspi1",
-        .mpu_irqs       = omap34xx_mcspi1_mpu_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap34xx_mcspi1_mpu_irqs),
-        .sdma_reqs      = omap34xx_mcspi1_sdma_reqs,
-        .sdma_reqs_cnt  = ARRAY_SIZE(omap34xx_mcspi1_sdma_reqs),
+        .mpu_irqs       = omap2_mcspi1_mpu_irqs,
+        .sdma_reqs      = omap2_mcspi1_sdma_reqs,
         .main_clk       = "mcspi1_fck",
         .prcm           = {
                 .omap2 = {
@@ -3212,17 +2833,6 @@ static struct omap_hwmod omap34xx_mcspi1 = {
 };
 
 /* mcspi2 */
-static struct omap_hwmod_irq_info omap34xx_mcspi2_mpu_irqs[] = {
-        { .name = "irq", .irq = 66 },
-};
-
-static struct omap_hwmod_dma_info omap34xx_mcspi2_sdma_reqs[] = {
-        { .name = "tx0", .dma_req = 43 },
-        { .name = "rx0", .dma_req = 44 },
-        { .name = "tx1", .dma_req = 45 },
-        { .name = "rx1", .dma_req = 46 },
-};
-
 static struct omap_hwmod_ocp_if *omap34xx_mcspi2_slaves[] = {
         &omap34xx_l4_core__mcspi2,
 };
@@ -3233,10 +2843,8 @@ static struct omap2_mcspi_dev_attr omap_mcspi2_dev_attr = {
 
 static struct omap_hwmod omap34xx_mcspi2 = {
         .name           = "mcspi2",
-        .mpu_irqs       = omap34xx_mcspi2_mpu_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap34xx_mcspi2_mpu_irqs),
-        .sdma_reqs      = omap34xx_mcspi2_sdma_reqs,
-        .sdma_reqs_cnt  = ARRAY_SIZE(omap34xx_mcspi2_sdma_reqs),
+        .mpu_irqs       = omap2_mcspi2_mpu_irqs,
+        .sdma_reqs      = omap2_mcspi2_sdma_reqs,
         .main_clk       = "mcspi2_fck",
         .prcm           = {
                 .omap2 = {
@@ -3257,6 +2865,7 @@ static struct omap_hwmod omap34xx_mcspi2 = {
 /* mcspi3 */
 static struct omap_hwmod_irq_info omap34xx_mcspi3_mpu_irqs[] = {
         { .name = "irq", .irq = 91 }, /* 91 */
+        { .irq = -1 }
 };
 
 static struct omap_hwmod_dma_info omap34xx_mcspi3_sdma_reqs[] = {
@@ -3264,6 +2873,7 @@ static struct omap_hwmod_dma_info omap34xx_mcspi3_sdma_reqs[] = {
         { .name = "rx0", .dma_req = 16 },
         { .name = "tx1", .dma_req = 23 },
         { .name = "rx1", .dma_req = 24 },
+        { .dma_req = -1 }
 };
 
 static struct omap_hwmod_ocp_if *omap34xx_mcspi3_slaves[] = {
@@ -3277,9 +2887,7 @@ static struct omap2_mcspi_dev_attr omap_mcspi3_dev_attr = {
 static struct omap_hwmod omap34xx_mcspi3 = {
         .name           = "mcspi3",
         .mpu_irqs       = omap34xx_mcspi3_mpu_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap34xx_mcspi3_mpu_irqs),
         .sdma_reqs      = omap34xx_mcspi3_sdma_reqs,
-        .sdma_reqs_cnt  = ARRAY_SIZE(omap34xx_mcspi3_sdma_reqs),
         .main_clk       = "mcspi3_fck",
         .prcm           = {
                 .omap2 = {
@@ -3300,11 +2908,13 @@ static struct omap_hwmod omap34xx_mcspi3 = {
 /* SPI4 */
 static struct omap_hwmod_irq_info omap34xx_mcspi4_mpu_irqs[] = {
         { .name = "irq", .irq = INT_34XX_SPI4_IRQ }, /* 48 */
+        { .irq = -1 }
 };
 
 static struct omap_hwmod_dma_info omap34xx_mcspi4_sdma_reqs[] = {
         { .name = "tx0", .dma_req = 70 }, /* DMA_SPI4_TX0 */
         { .name = "rx0", .dma_req = 71 }, /* DMA_SPI4_RX0 */
+        { .dma_req = -1 }
 };
 
 static struct omap_hwmod_ocp_if *omap34xx_mcspi4_slaves[] = {
@@ -3318,9 +2928,7 @@ static struct omap2_mcspi_dev_attr omap_mcspi4_dev_attr = {
 static struct omap_hwmod omap34xx_mcspi4 = {
         .name           = "mcspi4",
         .mpu_irqs       = omap34xx_mcspi4_mpu_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap34xx_mcspi4_mpu_irqs),
         .sdma_reqs      = omap34xx_mcspi4_sdma_reqs,
-        .sdma_reqs_cnt  = ARRAY_SIZE(omap34xx_mcspi4_sdma_reqs),
         .main_clk       = "mcspi4_fck",
         .prcm           = {
                 .omap2 = {
@@ -3362,12 +2970,12 @@ static struct omap_hwmod_irq_info omap3xxx_usbhsotg_mpu_irqs[] = {
 
         { .name = "mc", .irq = 92 },
         { .name = "dma", .irq = 93 },
+        { .irq = -1 }
 };
 
 static struct omap_hwmod omap3xxx_usbhsotg_hwmod = {
         .name           = "usb_otg_hs",
         .mpu_irqs       = omap3xxx_usbhsotg_mpu_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap3xxx_usbhsotg_mpu_irqs),
         .main_clk       = "hsotgusb_ick",
         .prcm           = {
                 .omap2 = {
@@ -3399,6 +3007,7 @@ static struct omap_hwmod omap3xxx_usbhsotg_hwmod = {
 static struct omap_hwmod_irq_info am35xx_usbhsotg_mpu_irqs[] = {
 
         { .name = "mc", .irq = 71 },
+        { .irq = -1 }
 };
 
 static struct omap_hwmod_class am35xx_usbotg_class = {
@@ -3409,7 +3018,6 @@ static struct omap_hwmod_class am35xx_usbotg_class = {
 static struct omap_hwmod am35xx_usbhsotg_hwmod = {
         .name           = "am35x_otg_hs",
         .mpu_irqs       = am35xx_usbhsotg_mpu_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(am35xx_usbhsotg_mpu_irqs),
         .main_clk       = NULL,
         .prcm = {
                 .omap2 = {
@@ -3445,11 +3053,13 @@ static struct omap_hwmod_class omap34xx_mmc_class = {
 
 static struct omap_hwmod_irq_info omap34xx_mmc1_mpu_irqs[] = {
         { .irq = 83, },
+        { .irq = -1 }
 };
 
 static struct omap_hwmod_dma_info omap34xx_mmc1_sdma_reqs[] = {
         { .name = "tx", .dma_req = 61, },
         { .name = "rx", .dma_req = 62, },
+        { .dma_req = -1 }
 };
 
 static struct omap_hwmod_opt_clk omap34xx_mmc1_opt_clks[] = {
@@ -3467,9 +3077,7 @@ static struct omap_mmc_dev_attr mmc1_dev_attr = {
 static struct omap_hwmod omap3xxx_mmc1_hwmod = {
         .name           = "mmc1",
         .mpu_irqs       = omap34xx_mmc1_mpu_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap34xx_mmc1_mpu_irqs),
         .sdma_reqs      = omap34xx_mmc1_sdma_reqs,
-        .sdma_reqs_cnt  = ARRAY_SIZE(omap34xx_mmc1_sdma_reqs),
         .opt_clks       = omap34xx_mmc1_opt_clks,
         .opt_clks_cnt   = ARRAY_SIZE(omap34xx_mmc1_opt_clks),
         .main_clk       = "mmchs1_fck",
@@ -3493,11 +3101,13 @@ static struct omap_hwmod omap3xxx_mmc1_hwmod = {
 
 static struct omap_hwmod_irq_info omap34xx_mmc2_mpu_irqs[] = {
         { .irq = INT_24XX_MMC2_IRQ, },
+        { .irq = -1 }
 };
 
 static struct omap_hwmod_dma_info omap34xx_mmc2_sdma_reqs[] = {
         { .name = "tx", .dma_req = 47, },
         { .name = "rx", .dma_req = 48, },
+        { .dma_req = -1 }
 };
 
 static struct omap_hwmod_opt_clk omap34xx_mmc2_opt_clks[] = {
@@ -3511,9 +3121,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_mmc2_slaves[] = {
 static struct omap_hwmod omap3xxx_mmc2_hwmod = {
         .name           = "mmc2",
         .mpu_irqs       = omap34xx_mmc2_mpu_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap34xx_mmc2_mpu_irqs),
         .sdma_reqs      = omap34xx_mmc2_sdma_reqs,
-        .sdma_reqs_cnt  = ARRAY_SIZE(omap34xx_mmc2_sdma_reqs),
         .opt_clks       = omap34xx_mmc2_opt_clks,
         .opt_clks_cnt   = ARRAY_SIZE(omap34xx_mmc2_opt_clks),
         .main_clk       = "mmchs2_fck",
@@ -3536,11 +3144,13 @@ static struct omap_hwmod omap3xxx_mmc2_hwmod = {
 
 static struct omap_hwmod_irq_info omap34xx_mmc3_mpu_irqs[] = {
         { .irq = 94, },
+        { .irq = -1 }
 };
 
 static struct omap_hwmod_dma_info omap34xx_mmc3_sdma_reqs[] = {
         { .name = "tx", .dma_req = 77, },
         { .name = "rx", .dma_req = 78, },
+        { .dma_req = -1 }
 };
 
 static struct omap_hwmod_opt_clk omap34xx_mmc3_opt_clks[] = {
@@ -3554,9 +3164,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_mmc3_slaves[] = {
 static struct omap_hwmod omap3xxx_mmc3_hwmod = {
         .name           = "mmc3",
         .mpu_irqs       = omap34xx_mmc3_mpu_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap34xx_mmc3_mpu_irqs),
         .sdma_reqs      = omap34xx_mmc3_sdma_reqs,
-        .sdma_reqs_cnt  = ARRAY_SIZE(omap34xx_mmc3_sdma_reqs),
         .opt_clks       = omap34xx_mmc3_opt_clks,
         .opt_clks_cnt   = ARRAY_SIZE(omap34xx_mmc3_opt_clks),
         .main_clk       = "mmchs3_fck",
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index e1c69ffe0f69..e01143725b08 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -80,7 +80,12 @@ static struct omap_hwmod_class omap44xx_dmm_hwmod_class = {
         .name   = "dmm",
 };
 
-/* dmm interface data */
+/* dmm */
+static struct omap_hwmod_irq_info omap44xx_dmm_irqs[] = {
+        { .irq = 113 + OMAP44XX_IRQ_GIC_START },
+        { .irq = -1 }
+};
+
 /* l3_main_1 -> dmm */
 static struct omap_hwmod_ocp_if omap44xx_l3_main_1__dmm = {
         .master         = &omap44xx_l3_main_1_hwmod,
@@ -95,6 +100,7 @@ static struct omap_hwmod_addr_space omap44xx_dmm_addrs[] = {
                 .pa_end         = 0x4e0007ff,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* mpu -> dmm */
@@ -103,7 +109,6 @@ static struct omap_hwmod_ocp_if omap44xx_mpu__dmm = {
         .slave          = &omap44xx_dmm_hwmod,
         .clk            = "l3_div_ck",
         .addr           = omap44xx_dmm_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap44xx_dmm_addrs),
         .user           = OCP_USER_MPU,
 };
 
@@ -113,17 +118,12 @@ static struct omap_hwmod_ocp_if *omap44xx_dmm_slaves[] = {
         &omap44xx_mpu__dmm,
 };
 
-static struct omap_hwmod_irq_info omap44xx_dmm_irqs[] = {
-        { .irq = 113 + OMAP44XX_IRQ_GIC_START },
-};
-
 static struct omap_hwmod omap44xx_dmm_hwmod = {
         .name           = "dmm",
         .class          = &omap44xx_dmm_hwmod_class,
+        .mpu_irqs       = omap44xx_dmm_irqs,
         .slaves         = omap44xx_dmm_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap44xx_dmm_slaves),
-        .mpu_irqs       = omap44xx_dmm_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap44xx_dmm_irqs),
         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
@@ -135,7 +135,7 @@ static struct omap_hwmod_class omap44xx_emif_fw_hwmod_class = {
         .name   = "emif_fw",
 };
 
-/* emif_fw interface data */
+/* emif_fw */
 /* dmm -> emif_fw */
 static struct omap_hwmod_ocp_if omap44xx_dmm__emif_fw = {
         .master         = &omap44xx_dmm_hwmod,
@@ -150,6 +150,7 @@ static struct omap_hwmod_addr_space omap44xx_emif_fw_addrs[] = {
                 .pa_end         = 0x4a20c0ff,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* l4_cfg -> emif_fw */
@@ -158,7 +159,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__emif_fw = {
         .slave          = &omap44xx_emif_fw_hwmod,
         .clk            = "l4_div_ck",
         .addr           = omap44xx_emif_fw_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap44xx_emif_fw_addrs),
         .user           = OCP_USER_MPU,
 };
 
@@ -184,7 +184,7 @@ static struct omap_hwmod_class omap44xx_l3_hwmod_class = {
         .name   = "l3",
 };
 
-/* l3_instr interface data */
+/* l3_instr */
 /* iva -> l3_instr */
 static struct omap_hwmod_ocp_if omap44xx_iva__l3_instr = {
         .master         = &omap44xx_iva_hwmod,
@@ -215,7 +215,13 @@ static struct omap_hwmod omap44xx_l3_instr_hwmod = {
         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
-/* l3_main_1 interface data */
+/* l3_main_1 */
+static struct omap_hwmod_irq_info omap44xx_l3_main_1_irqs[] = {
+        { .name = "dbg_err", .irq = 9 + OMAP44XX_IRQ_GIC_START },
+        { .name = "app_err", .irq = 10 + OMAP44XX_IRQ_GIC_START },
+        { .irq = -1 }
+};
+
 /* dsp -> l3_main_1 */
 static struct omap_hwmod_ocp_if omap44xx_dsp__l3_main_1 = {
         .master         = &omap44xx_dsp_hwmod,
@@ -264,18 +270,13 @@ static struct omap_hwmod_ocp_if omap44xx_mmc2__l3_main_1 = {
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
-/* L3 target configuration and error log registers */
-static struct omap_hwmod_irq_info omap44xx_l3_targ_irqs[] = {
-        { .irq = 9  + OMAP44XX_IRQ_GIC_START },
-        { .irq = 10 + OMAP44XX_IRQ_GIC_START },
-};
-
 static struct omap_hwmod_addr_space omap44xx_l3_main_1_addrs[] = {
         {
                 .pa_start       = 0x44000000,
                 .pa_end         = 0x44000fff,
-                .flags          = ADDR_TYPE_RT,
+                .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* mpu -> l3_main_1 */
@@ -284,8 +285,7 @@ static struct omap_hwmod_ocp_if omap44xx_mpu__l3_main_1 = {
         .slave          = &omap44xx_l3_main_1_hwmod,
         .clk            = "l3_div_ck",
         .addr           = omap44xx_l3_main_1_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap44xx_l3_main_1_addrs),
-        .user           = OCP_USER_MPU | OCP_USER_SDMA,
+        .user           = OCP_USER_MPU,
 };
 
 /* l3_main_1 slave ports */
@@ -302,14 +302,13 @@ static struct omap_hwmod_ocp_if *omap44xx_l3_main_1_slaves[] = {
 static struct omap_hwmod omap44xx_l3_main_1_hwmod = {
         .name           = "l3_main_1",
         .class          = &omap44xx_l3_hwmod_class,
-        .mpu_irqs       = omap44xx_l3_targ_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap44xx_l3_targ_irqs),
+        .mpu_irqs       = omap44xx_l3_main_1_irqs,
         .slaves         = omap44xx_l3_main_1_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap44xx_l3_main_1_slaves),
         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
-/* l3_main_2 interface data */
+/* l3_main_2 */
 /* dma_system -> l3_main_2 */
 static struct omap_hwmod_ocp_if omap44xx_dma_system__l3_main_2 = {
         .master         = &omap44xx_dma_system_hwmod,
@@ -354,8 +353,9 @@ static struct omap_hwmod_addr_space omap44xx_l3_main_2_addrs[] = {
         {
                 .pa_start       = 0x44800000,
                 .pa_end         = 0x44801fff,
-                .flags          = ADDR_TYPE_RT,
+                .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* l3_main_1 -> l3_main_2 */
@@ -364,8 +364,7 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_1__l3_main_2 = {
         .slave          = &omap44xx_l3_main_2_hwmod,
         .clk            = "l3_div_ck",
         .addr           = omap44xx_l3_main_2_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap44xx_l3_main_2_addrs),
-        .user           = OCP_USER_MPU | OCP_USER_SDMA,
+        .user           = OCP_USER_MPU,
 };
 
 /* l4_cfg -> l3_main_2 */
@@ -404,13 +403,14 @@ static struct omap_hwmod omap44xx_l3_main_2_hwmod = {
         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
-/* l3_main_3 interface data */
+/* l3_main_3 */
 static struct omap_hwmod_addr_space omap44xx_l3_main_3_addrs[] = {
         {
                 .pa_start       = 0x45000000,
                 .pa_end         = 0x45000fff,
-                .flags          = ADDR_TYPE_RT,
+                .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* l3_main_1 -> l3_main_3 */
@@ -419,8 +419,7 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_1__l3_main_3 = {
         .slave          = &omap44xx_l3_main_3_hwmod,
         .clk            = "l3_div_ck",
         .addr           = omap44xx_l3_main_3_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap44xx_l3_main_3_addrs),
-        .user           = OCP_USER_MPU | OCP_USER_SDMA,
+        .user           = OCP_USER_MPU,
 };
 
 /* l3_main_2 -> l3_main_3 */
@@ -462,7 +461,7 @@ static struct omap_hwmod_class omap44xx_l4_hwmod_class = {
         .name   = "l4",
 };
 
-/* l4_abe interface data */
+/* l4_abe */
 /* aess -> l4_abe */
 static struct omap_hwmod_ocp_if omap44xx_aess__l4_abe = {
         .master         = &omap44xx_aess_hwmod,
@@ -511,7 +510,7 @@ static struct omap_hwmod omap44xx_l4_abe_hwmod = {
         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
-/* l4_cfg interface data */
+/* l4_cfg */
 /* l3_main_1 -> l4_cfg */
 static struct omap_hwmod_ocp_if omap44xx_l3_main_1__l4_cfg = {
         .master         = &omap44xx_l3_main_1_hwmod,
@@ -533,7 +532,7 @@ static struct omap_hwmod omap44xx_l4_cfg_hwmod = {
         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
-/* l4_per interface data */
+/* l4_per */
 /* l3_main_2 -> l4_per */
 static struct omap_hwmod_ocp_if omap44xx_l3_main_2__l4_per = {
         .master         = &omap44xx_l3_main_2_hwmod,
@@ -555,7 +554,7 @@ static struct omap_hwmod omap44xx_l4_per_hwmod = {
         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
-/* l4_wkup interface data */
+/* l4_wkup */
 /* l4_cfg -> l4_wkup */
 static struct omap_hwmod_ocp_if omap44xx_l4_cfg__l4_wkup = {
         .master         = &omap44xx_l4_cfg_hwmod,
@@ -585,7 +584,7 @@ static struct omap_hwmod_class omap44xx_mpu_bus_hwmod_class = {
         .name   = "mpu_bus",
 };
 
-/* mpu_private interface data */
+/* mpu_private */
 /* mpu -> mpu_private */
 static struct omap_hwmod_ocp_if omap44xx_mpu__mpu_private = {
         .master         = &omap44xx_mpu_hwmod,
@@ -633,7 +632,9 @@ static struct omap_hwmod omap44xx_mpu_private_hwmod = {
  *  gpmc
  *  gpu
  *  hdq1w
- *  hsi
+ *  mcasp
+ *  mpu_c0
+ *  mpu_c1
  *  ocmc_ram
  *  ocp2scp_usb_phy
  *  ocp_wp_noc
@@ -660,7 +661,8 @@ static struct omap_hwmod_class_sysconfig omap44xx_aess_sysc = {
         .sysc_offs      = 0x0010,
         .sysc_flags     = (SYSC_HAS_MIDLEMODE | SYSC_HAS_SIDLEMODE),
         .idlemodes      = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
-                           MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART),
+                           MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART |
+                           MSTANDBY_SMART_WKUP),
         .sysc_fields    = &omap_hwmod_sysc_type2,
 };
 
@@ -672,6 +674,7 @@ static struct omap_hwmod_class omap44xx_aess_hwmod_class = {
 /* aess */
 static struct omap_hwmod_irq_info omap44xx_aess_irqs[] = {
         { .irq = 99 + OMAP44XX_IRQ_GIC_START },
+        { .irq = -1 }
 };
 
 static struct omap_hwmod_dma_info omap44xx_aess_sdma_reqs[] = {
@@ -683,6 +686,7 @@ static struct omap_hwmod_dma_info omap44xx_aess_sdma_reqs[] = {
         { .name = "fifo5", .dma_req = 105 + OMAP44XX_DMA_REQ_START },
         { .name = "fifo6", .dma_req = 106 + OMAP44XX_DMA_REQ_START },
         { .name = "fifo7", .dma_req = 107 + OMAP44XX_DMA_REQ_START },
+        { .dma_req = -1 }
 };
 
 /* aess master ports */
@@ -696,6 +700,7 @@ static struct omap_hwmod_addr_space omap44xx_aess_addrs[] = {
                 .pa_end         = 0x401f13ff,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* l4_abe -> aess */
@@ -704,7 +709,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__aess = {
         .slave          = &omap44xx_aess_hwmod,
         .clk            = "ocp_abe_iclk",
         .addr           = omap44xx_aess_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap44xx_aess_addrs),
         .user           = OCP_USER_MPU,
 };
 
@@ -714,6 +718,7 @@ static struct omap_hwmod_addr_space omap44xx_aess_dma_addrs[] = {
                 .pa_end         = 0x490f13ff,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* l4_abe -> aess (dma) */
@@ -722,7 +727,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__aess_dma = {
         .slave          = &omap44xx_aess_hwmod,
         .clk            = "ocp_abe_iclk",
         .addr           = omap44xx_aess_dma_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap44xx_aess_dma_addrs),
         .user           = OCP_USER_SDMA,
 };
 
@@ -736,11 +740,9 @@ static struct omap_hwmod omap44xx_aess_hwmod = {
         .name           = "aess",
         .class          = &omap44xx_aess_hwmod_class,
         .mpu_irqs       = omap44xx_aess_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap44xx_aess_irqs),
         .sdma_reqs      = omap44xx_aess_sdma_reqs,
-        .sdma_reqs_cnt  = ARRAY_SIZE(omap44xx_aess_sdma_reqs),
         .main_clk       = "aess_fck",
-        .prcm           = {
+        .prcm = {
                 .omap4 = {
                         .clkctrl_reg = OMAP4430_CM1_ABE_AESS_CLKCTRL,
                 },
@@ -769,7 +771,7 @@ static struct omap_hwmod_opt_clk bandgap_opt_clks[] = {
 static struct omap_hwmod omap44xx_bandgap_hwmod = {
         .name           = "bandgap",
         .class          = &omap44xx_bandgap_hwmod_class,
-        .prcm           = {
+        .prcm = {
                 .omap4 = {
                         .clkctrl_reg = OMAP4430_CM_WKUP_BANDGAP_CLKCTRL,
                 },
@@ -806,6 +808,7 @@ static struct omap_hwmod_addr_space omap44xx_counter_32k_addrs[] = {
                 .pa_end         = 0x4a30401f,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* l4_wkup -> counter_32k */
@@ -814,7 +817,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_wkup__counter_32k = {
         .slave          = &omap44xx_counter_32k_hwmod,
         .clk            = "l4_wkup_clk_mux_ck",
         .addr           = omap44xx_counter_32k_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap44xx_counter_32k_addrs),
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -828,7 +830,7 @@ static struct omap_hwmod omap44xx_counter_32k_hwmod = {
         .class          = &omap44xx_counter_hwmod_class,
         .flags          = HWMOD_SWSUP_SIDLE,
         .main_clk       = "sys_32k_ck",
-        .prcm           = {
+        .prcm = {
                 .omap4 = {
                         .clkctrl_reg = OMAP4430_CM_WKUP_SYNCTIMER_CLKCTRL,
                 },
@@ -875,6 +877,7 @@ static struct omap_hwmod_irq_info omap44xx_dma_system_irqs[] = {
         { .name = "1", .irq = 13 + OMAP44XX_IRQ_GIC_START },
         { .name = "2", .irq = 14 + OMAP44XX_IRQ_GIC_START },
         { .name = "3", .irq = 15 + OMAP44XX_IRQ_GIC_START },
+        { .irq = -1 }
 };
 
 /* dma_system master ports */
@@ -888,6 +891,7 @@ static struct omap_hwmod_addr_space omap44xx_dma_system_addrs[] = {
                 .pa_end         = 0x4a056fff,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* l4_cfg -> dma_system */
@@ -896,7 +900,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__dma_system = {
         .slave          = &omap44xx_dma_system_hwmod,
         .clk            = "l4_div_ck",
         .addr           = omap44xx_dma_system_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap44xx_dma_system_addrs),
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -909,7 +912,6 @@ static struct omap_hwmod omap44xx_dma_system_hwmod = {
         .name           = "dma_system",
         .class          = &omap44xx_dma_hwmod_class,
         .mpu_irqs       = omap44xx_dma_system_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap44xx_dma_system_irqs),
         .main_clk       = "l3_div_ck",
         .prcm = {
                 .omap4 = {
@@ -948,10 +950,12 @@ static struct omap_hwmod_class omap44xx_dmic_hwmod_class = {
 static struct omap_hwmod omap44xx_dmic_hwmod;
 static struct omap_hwmod_irq_info omap44xx_dmic_irqs[] = {
         { .irq = 114 + OMAP44XX_IRQ_GIC_START },
+        { .irq = -1 }
 };
 
 static struct omap_hwmod_dma_info omap44xx_dmic_sdma_reqs[] = {
         { .dma_req = 66 + OMAP44XX_DMA_REQ_START },
+        { .dma_req = -1 }
 };
 
 static struct omap_hwmod_addr_space omap44xx_dmic_addrs[] = {
@@ -960,6 +964,7 @@ static struct omap_hwmod_addr_space omap44xx_dmic_addrs[] = {
                 .pa_end         = 0x4012e07f,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* l4_abe -> dmic */
@@ -968,7 +973,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__dmic = {
         .slave          = &omap44xx_dmic_hwmod,
         .clk            = "ocp_abe_iclk",
         .addr           = omap44xx_dmic_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap44xx_dmic_addrs),
         .user           = OCP_USER_MPU,
 };
 
@@ -978,6 +982,7 @@ static struct omap_hwmod_addr_space omap44xx_dmic_dma_addrs[] = {
                 .pa_end         = 0x4902e07f,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* l4_abe -> dmic (dma) */
@@ -986,7 +991,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__dmic_dma = {
         .slave          = &omap44xx_dmic_hwmod,
         .clk            = "ocp_abe_iclk",
         .addr           = omap44xx_dmic_dma_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap44xx_dmic_dma_addrs),
         .user           = OCP_USER_SDMA,
 };
 
@@ -1000,11 +1004,9 @@ static struct omap_hwmod omap44xx_dmic_hwmod = {
         .name           = "dmic",
         .class          = &omap44xx_dmic_hwmod_class,
         .mpu_irqs       = omap44xx_dmic_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap44xx_dmic_irqs),
         .sdma_reqs      = omap44xx_dmic_sdma_reqs,
-        .sdma_reqs_cnt  = ARRAY_SIZE(omap44xx_dmic_sdma_reqs),
         .main_clk       = "dmic_fck",
-        .prcm           = {
+        .prcm = {
                 .omap4 = {
                         .clkctrl_reg = OMAP4430_CM1_ABE_DMIC_CLKCTRL,
                 },
@@ -1026,6 +1028,7 @@ static struct omap_hwmod_class omap44xx_dsp_hwmod_class = {
 /* dsp */
 static struct omap_hwmod_irq_info omap44xx_dsp_irqs[] = {
         { .irq = 28 + OMAP44XX_IRQ_GIC_START },
+        { .irq = -1 }
 };
 
 static struct omap_hwmod_rst_info omap44xx_dsp_resets[] = {
@@ -1082,7 +1085,6 @@ static struct omap_hwmod omap44xx_dsp_hwmod = {
         .name           = "dsp",
         .class          = &omap44xx_dsp_hwmod_class,
         .mpu_irqs       = omap44xx_dsp_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap44xx_dsp_irqs),
         .rst_lines      = omap44xx_dsp_resets,
         .rst_lines_cnt  = ARRAY_SIZE(omap44xx_dsp_resets),
         .main_clk       = "dsp_fck",
@@ -1127,6 +1129,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_dma_addrs[] = {
                 .pa_end         = 0x5800007f,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* l3_main_2 -> dss */
@@ -1135,7 +1138,6 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss = {
         .slave          = &omap44xx_dss_hwmod,
         .clk            = "l3_div_ck",
         .addr           = omap44xx_dss_dma_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap44xx_dss_dma_addrs),
         .user           = OCP_USER_SDMA,
 };
 
@@ -1145,6 +1147,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_addrs[] = {
                 .pa_end         = 0x4804007f,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* l4_per -> dss */
@@ -1153,7 +1156,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__dss = {
         .slave          = &omap44xx_dss_hwmod,
         .clk            = "l4_div_ck",
         .addr           = omap44xx_dss_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap44xx_dss_addrs),
         .user           = OCP_USER_MPU,
 };
 
@@ -1215,10 +1217,12 @@ static struct omap_hwmod_class omap44xx_dispc_hwmod_class = {
 static struct omap_hwmod omap44xx_dss_dispc_hwmod;
 static struct omap_hwmod_irq_info omap44xx_dss_dispc_irqs[] = {
         { .irq = 25 + OMAP44XX_IRQ_GIC_START },
+        { .irq = -1 }
 };
 
 static struct omap_hwmod_dma_info omap44xx_dss_dispc_sdma_reqs[] = {
         { .dma_req = 5 + OMAP44XX_DMA_REQ_START },
+        { .dma_req = -1 }
 };
 
 static struct omap_hwmod_addr_space omap44xx_dss_dispc_dma_addrs[] = {
@@ -1227,6 +1231,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_dispc_dma_addrs[] = {
                 .pa_end         = 0x58001fff,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* l3_main_2 -> dss_dispc */
@@ -1235,7 +1240,6 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_dispc = {
         .slave          = &omap44xx_dss_dispc_hwmod,
         .clk            = "l3_div_ck",
         .addr           = omap44xx_dss_dispc_dma_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap44xx_dss_dispc_dma_addrs),
         .user           = OCP_USER_SDMA,
 };
 
@@ -1245,6 +1249,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_dispc_addrs[] = {
                 .pa_end         = 0x48041fff,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* l4_per -> dss_dispc */
@@ -1253,7 +1258,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__dss_dispc = {
         .slave          = &omap44xx_dss_dispc_hwmod,
         .clk            = "l4_div_ck",
         .addr           = omap44xx_dss_dispc_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap44xx_dss_dispc_addrs),
         .user           = OCP_USER_MPU,
 };
 
@@ -1267,9 +1271,7 @@ static struct omap_hwmod omap44xx_dss_dispc_hwmod = {
         .name           = "dss_dispc",
         .class          = &omap44xx_dispc_hwmod_class,
         .mpu_irqs       = omap44xx_dss_dispc_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap44xx_dss_dispc_irqs),
         .sdma_reqs      = omap44xx_dss_dispc_sdma_reqs,
-        .sdma_reqs_cnt  = ARRAY_SIZE(omap44xx_dss_dispc_sdma_reqs),
         .main_clk       = "dss_fck",
         .prcm = {
                 .omap4 = {
@@ -1306,10 +1308,12 @@ static struct omap_hwmod_class omap44xx_dsi_hwmod_class = {
 static struct omap_hwmod omap44xx_dss_dsi1_hwmod;
 static struct omap_hwmod_irq_info omap44xx_dss_dsi1_irqs[] = {
         { .irq = 53 + OMAP44XX_IRQ_GIC_START },
+        { .irq = -1 }
 };
 
 static struct omap_hwmod_dma_info omap44xx_dss_dsi1_sdma_reqs[] = {
         { .dma_req = 74 + OMAP44XX_DMA_REQ_START },
+        { .dma_req = -1 }
 };
 
 static struct omap_hwmod_addr_space omap44xx_dss_dsi1_dma_addrs[] = {
@@ -1318,6 +1322,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_dsi1_dma_addrs[] = {
                 .pa_end         = 0x580041ff,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* l3_main_2 -> dss_dsi1 */
@@ -1326,7 +1331,6 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_dsi1 = {
         .slave          = &omap44xx_dss_dsi1_hwmod,
         .clk            = "l3_div_ck",
         .addr           = omap44xx_dss_dsi1_dma_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap44xx_dss_dsi1_dma_addrs),
         .user           = OCP_USER_SDMA,
 };
 
@@ -1336,6 +1340,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_dsi1_addrs[] = {
                 .pa_end         = 0x480441ff,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* l4_per -> dss_dsi1 */
@@ -1344,7 +1349,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__dss_dsi1 = {
         .slave          = &omap44xx_dss_dsi1_hwmod,
         .clk            = "l4_div_ck",
         .addr           = omap44xx_dss_dsi1_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap44xx_dss_dsi1_addrs),
         .user           = OCP_USER_MPU,
 };
 
@@ -1358,9 +1362,7 @@ static struct omap_hwmod omap44xx_dss_dsi1_hwmod = {
         .name           = "dss_dsi1",
         .class          = &omap44xx_dsi_hwmod_class,
         .mpu_irqs       = omap44xx_dss_dsi1_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap44xx_dss_dsi1_irqs),
         .sdma_reqs      = omap44xx_dss_dsi1_sdma_reqs,
-        .sdma_reqs_cnt  = ARRAY_SIZE(omap44xx_dss_dsi1_sdma_reqs),
         .main_clk       = "dss_fck",
         .prcm = {
                 .omap4 = {
@@ -1376,10 +1378,12 @@ static struct omap_hwmod omap44xx_dss_dsi1_hwmod = {
 static struct omap_hwmod omap44xx_dss_dsi2_hwmod;
 static struct omap_hwmod_irq_info omap44xx_dss_dsi2_irqs[] = {
         { .irq = 84 + OMAP44XX_IRQ_GIC_START },
+        { .irq = -1 }
 };
 
 static struct omap_hwmod_dma_info omap44xx_dss_dsi2_sdma_reqs[] = {
         { .dma_req = 83 + OMAP44XX_DMA_REQ_START },
+        { .dma_req = -1 }
 };
 
 static struct omap_hwmod_addr_space omap44xx_dss_dsi2_dma_addrs[] = {
@@ -1388,6 +1392,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_dsi2_dma_addrs[] = {
                 .pa_end         = 0x580051ff,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* l3_main_2 -> dss_dsi2 */
@@ -1396,7 +1401,6 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_dsi2 = {
         .slave          = &omap44xx_dss_dsi2_hwmod,
         .clk            = "l3_div_ck",
         .addr           = omap44xx_dss_dsi2_dma_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap44xx_dss_dsi2_dma_addrs),
         .user           = OCP_USER_SDMA,
 };
 
@@ -1406,6 +1410,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_dsi2_addrs[] = {
                 .pa_end         = 0x480451ff,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* l4_per -> dss_dsi2 */
@@ -1414,7 +1419,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__dss_dsi2 = {
         .slave          = &omap44xx_dss_dsi2_hwmod,
         .clk            = "l4_div_ck",
         .addr           = omap44xx_dss_dsi2_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap44xx_dss_dsi2_addrs),
         .user           = OCP_USER_MPU,
 };
 
@@ -1428,9 +1432,7 @@ static struct omap_hwmod omap44xx_dss_dsi2_hwmod = {
         .name           = "dss_dsi2",
         .class          = &omap44xx_dsi_hwmod_class,
         .mpu_irqs       = omap44xx_dss_dsi2_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap44xx_dss_dsi2_irqs),
         .sdma_reqs      = omap44xx_dss_dsi2_sdma_reqs,
-        .sdma_reqs_cnt  = ARRAY_SIZE(omap44xx_dss_dsi2_sdma_reqs),
         .main_clk       = "dss_fck",
         .prcm = {
                 .omap4 = {
@@ -1466,10 +1468,12 @@ static struct omap_hwmod_class omap44xx_hdmi_hwmod_class = {
 static struct omap_hwmod omap44xx_dss_hdmi_hwmod;
 static struct omap_hwmod_irq_info omap44xx_dss_hdmi_irqs[] = {
         { .irq = 101 + OMAP44XX_IRQ_GIC_START },
+        { .irq = -1 }
 };
 
 static struct omap_hwmod_dma_info omap44xx_dss_hdmi_sdma_reqs[] = {
         { .dma_req = 75 + OMAP44XX_DMA_REQ_START },
+        { .dma_req = -1 }
 };
 
 static struct omap_hwmod_addr_space omap44xx_dss_hdmi_dma_addrs[] = {
@@ -1478,6 +1482,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_hdmi_dma_addrs[] = {
                 .pa_end         = 0x58006fff,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* l3_main_2 -> dss_hdmi */
@@ -1486,7 +1491,6 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_hdmi = {
         .slave          = &omap44xx_dss_hdmi_hwmod,
         .clk            = "l3_div_ck",
         .addr           = omap44xx_dss_hdmi_dma_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap44xx_dss_hdmi_dma_addrs),
         .user           = OCP_USER_SDMA,
 };
 
@@ -1496,6 +1500,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_hdmi_addrs[] = {
                 .pa_end         = 0x48046fff,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* l4_per -> dss_hdmi */
@@ -1504,7 +1509,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__dss_hdmi = {
         .slave          = &omap44xx_dss_hdmi_hwmod,
         .clk            = "l4_div_ck",
         .addr           = omap44xx_dss_hdmi_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap44xx_dss_hdmi_addrs),
         .user           = OCP_USER_MPU,
 };
 
@@ -1518,9 +1522,7 @@ static struct omap_hwmod omap44xx_dss_hdmi_hwmod = {
         .name           = "dss_hdmi",
         .class          = &omap44xx_hdmi_hwmod_class,
         .mpu_irqs       = omap44xx_dss_hdmi_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap44xx_dss_hdmi_irqs),
         .sdma_reqs      = omap44xx_dss_hdmi_sdma_reqs,
-        .sdma_reqs_cnt  = ARRAY_SIZE(omap44xx_dss_hdmi_sdma_reqs),
         .main_clk       = "dss_fck",
         .prcm = {
                 .omap4 = {
@@ -1556,6 +1558,7 @@ static struct omap_hwmod_class omap44xx_rfbi_hwmod_class = {
 static struct omap_hwmod omap44xx_dss_rfbi_hwmod;
 static struct omap_hwmod_dma_info omap44xx_dss_rfbi_sdma_reqs[] = {
         { .dma_req = 13 + OMAP44XX_DMA_REQ_START },
+        { .dma_req = -1 }
 };
 
 static struct omap_hwmod_addr_space omap44xx_dss_rfbi_dma_addrs[] = {
@@ -1564,6 +1567,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_rfbi_dma_addrs[] = {
                 .pa_end         = 0x580020ff,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* l3_main_2 -> dss_rfbi */
@@ -1572,7 +1576,6 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_rfbi = {
         .slave          = &omap44xx_dss_rfbi_hwmod,
         .clk            = "l3_div_ck",
         .addr           = omap44xx_dss_rfbi_dma_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap44xx_dss_rfbi_dma_addrs),
         .user           = OCP_USER_SDMA,
 };
 
@@ -1582,6 +1585,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_rfbi_addrs[] = {
                 .pa_end         = 0x480420ff,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* l4_per -> dss_rfbi */
@@ -1590,7 +1594,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__dss_rfbi = {
         .slave          = &omap44xx_dss_rfbi_hwmod,
         .clk            = "l4_div_ck",
         .addr           = omap44xx_dss_rfbi_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap44xx_dss_rfbi_addrs),
         .user           = OCP_USER_MPU,
 };
 
@@ -1604,7 +1607,6 @@ static struct omap_hwmod omap44xx_dss_rfbi_hwmod = {
         .name           = "dss_rfbi",
         .class          = &omap44xx_rfbi_hwmod_class,
         .sdma_reqs      = omap44xx_dss_rfbi_sdma_reqs,
-        .sdma_reqs_cnt  = ARRAY_SIZE(omap44xx_dss_rfbi_sdma_reqs),
         .main_clk       = "dss_fck",
         .prcm = {
                 .omap4 = {
@@ -1633,6 +1635,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_venc_dma_addrs[] = {
                 .pa_end         = 0x580030ff,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* l3_main_2 -> dss_venc */
@@ -1641,7 +1644,6 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_venc = {
         .slave          = &omap44xx_dss_venc_hwmod,
         .clk            = "l3_div_ck",
         .addr           = omap44xx_dss_venc_dma_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap44xx_dss_venc_dma_addrs),
         .user           = OCP_USER_SDMA,
 };
 
@@ -1651,6 +1653,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_venc_addrs[] = {
                 .pa_end         = 0x480430ff,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* l4_per -> dss_venc */
@@ -1659,7 +1662,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__dss_venc = {
         .slave          = &omap44xx_dss_venc_hwmod,
         .clk            = "l4_div_ck",
         .addr           = omap44xx_dss_venc_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap44xx_dss_venc_addrs),
         .user           = OCP_USER_MPU,
 };
 
@@ -1716,6 +1718,7 @@ static struct omap_gpio_dev_attr gpio_dev_attr = {
 static struct omap_hwmod omap44xx_gpio1_hwmod;
 static struct omap_hwmod_irq_info omap44xx_gpio1_irqs[] = {
         { .irq = 29 + OMAP44XX_IRQ_GIC_START },
+        { .irq = -1 }
 };
 
 static struct omap_hwmod_addr_space omap44xx_gpio1_addrs[] = {
@@ -1724,6 +1727,7 @@ static struct omap_hwmod_addr_space omap44xx_gpio1_addrs[] = {
                 .pa_end         = 0x4a3101ff,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* l4_wkup -> gpio1 */
@@ -1732,7 +1736,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_wkup__gpio1 = {
         .slave          = &omap44xx_gpio1_hwmod,
         .clk            = "l4_wkup_clk_mux_ck",
         .addr           = omap44xx_gpio1_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap44xx_gpio1_addrs),
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -1749,7 +1752,6 @@ static struct omap_hwmod omap44xx_gpio1_hwmod = {
         .name           = "gpio1",
         .class          = &omap44xx_gpio_hwmod_class,
         .mpu_irqs       = omap44xx_gpio1_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap44xx_gpio1_irqs),
         .main_clk       = "gpio1_ick",
         .prcm = {
                 .omap4 = {
@@ -1768,6 +1770,7 @@ static struct omap_hwmod omap44xx_gpio1_hwmod = {
 static struct omap_hwmod omap44xx_gpio2_hwmod;
 static struct omap_hwmod_irq_info omap44xx_gpio2_irqs[] = {
         { .irq = 30 + OMAP44XX_IRQ_GIC_START },
+        { .irq = -1 }
 };
 
 static struct omap_hwmod_addr_space omap44xx_gpio2_addrs[] = {
@@ -1776,6 +1779,7 @@ static struct omap_hwmod_addr_space omap44xx_gpio2_addrs[] = {
                 .pa_end         = 0x480551ff,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* l4_per -> gpio2 */
@@ -1784,7 +1788,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__gpio2 = {
         .slave          = &omap44xx_gpio2_hwmod,
         .clk            = "l4_div_ck",
         .addr           = omap44xx_gpio2_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap44xx_gpio2_addrs),
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -1802,7 +1805,6 @@ static struct omap_hwmod omap44xx_gpio2_hwmod = {
         .class          = &omap44xx_gpio_hwmod_class,
         .flags          = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
         .mpu_irqs       = omap44xx_gpio2_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap44xx_gpio2_irqs),
         .main_clk       = "gpio2_ick",
         .prcm = {
                 .omap4 = {
@@ -1821,6 +1823,7 @@ static struct omap_hwmod omap44xx_gpio2_hwmod = {
 static struct omap_hwmod omap44xx_gpio3_hwmod;
 static struct omap_hwmod_irq_info omap44xx_gpio3_irqs[] = {
         { .irq = 31 + OMAP44XX_IRQ_GIC_START },
+        { .irq = -1 }
 };
 
 static struct omap_hwmod_addr_space omap44xx_gpio3_addrs[] = {
@@ -1829,6 +1832,7 @@ static struct omap_hwmod_addr_space omap44xx_gpio3_addrs[] = {
                 .pa_end         = 0x480571ff,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* l4_per -> gpio3 */
@@ -1837,7 +1841,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__gpio3 = {
         .slave          = &omap44xx_gpio3_hwmod,
         .clk            = "l4_div_ck",
         .addr           = omap44xx_gpio3_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap44xx_gpio3_addrs),
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -1855,7 +1858,6 @@ static struct omap_hwmod omap44xx_gpio3_hwmod = {
         .class          = &omap44xx_gpio_hwmod_class,
         .flags          = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
         .mpu_irqs       = omap44xx_gpio3_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap44xx_gpio3_irqs),
         .main_clk       = "gpio3_ick",
         .prcm = {
                 .omap4 = {
@@ -1874,6 +1876,7 @@ static struct omap_hwmod omap44xx_gpio3_hwmod = {
 static struct omap_hwmod omap44xx_gpio4_hwmod;
 static struct omap_hwmod_irq_info omap44xx_gpio4_irqs[] = {
         { .irq = 32 + OMAP44XX_IRQ_GIC_START },
+        { .irq = -1 }
 };
 
 static struct omap_hwmod_addr_space omap44xx_gpio4_addrs[] = {
@@ -1882,6 +1885,7 @@ static struct omap_hwmod_addr_space omap44xx_gpio4_addrs[] = {
                 .pa_end         = 0x480591ff,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* l4_per -> gpio4 */
@@ -1890,7 +1894,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__gpio4 = {
         .slave          = &omap44xx_gpio4_hwmod,
         .clk            = "l4_div_ck",
         .addr           = omap44xx_gpio4_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap44xx_gpio4_addrs),
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -1908,7 +1911,6 @@ static struct omap_hwmod omap44xx_gpio4_hwmod = {
         .class          = &omap44xx_gpio_hwmod_class,
         .flags          = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
         .mpu_irqs       = omap44xx_gpio4_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap44xx_gpio4_irqs),
         .main_clk       = "gpio4_ick",
         .prcm = {
                 .omap4 = {
@@ -1927,6 +1929,7 @@ static struct omap_hwmod omap44xx_gpio4_hwmod = {
 static struct omap_hwmod omap44xx_gpio5_hwmod;
 static struct omap_hwmod_irq_info omap44xx_gpio5_irqs[] = {
         { .irq = 33 + OMAP44XX_IRQ_GIC_START },
+        { .irq = -1 }
 };
 
 static struct omap_hwmod_addr_space omap44xx_gpio5_addrs[] = {
@@ -1935,6 +1938,7 @@ static struct omap_hwmod_addr_space omap44xx_gpio5_addrs[] = {
                 .pa_end         = 0x4805b1ff,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* l4_per -> gpio5 */
@@ -1943,7 +1947,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__gpio5 = {
         .slave          = &omap44xx_gpio5_hwmod,
         .clk            = "l4_div_ck",
         .addr           = omap44xx_gpio5_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap44xx_gpio5_addrs),
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -1961,7 +1964,6 @@ static struct omap_hwmod omap44xx_gpio5_hwmod = {
         .class          = &omap44xx_gpio_hwmod_class,
         .flags          = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
         .mpu_irqs       = omap44xx_gpio5_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap44xx_gpio5_irqs),
         .main_clk       = "gpio5_ick",
         .prcm = {
                 .omap4 = {
@@ -1980,6 +1982,7 @@ static struct omap_hwmod omap44xx_gpio5_hwmod = {
 static struct omap_hwmod omap44xx_gpio6_hwmod;
 static struct omap_hwmod_irq_info omap44xx_gpio6_irqs[] = {
         { .irq = 34 + OMAP44XX_IRQ_GIC_START },
+        { .irq = -1 }
 };
 
 static struct omap_hwmod_addr_space omap44xx_gpio6_addrs[] = {
@@ -1988,6 +1991,7 @@ static struct omap_hwmod_addr_space omap44xx_gpio6_addrs[] = {
                 .pa_end         = 0x4805d1ff,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* l4_per -> gpio6 */
@@ -1996,7 +2000,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__gpio6 = {
         .slave          = &omap44xx_gpio6_hwmod,
         .clk            = "l4_div_ck",
         .addr           = omap44xx_gpio6_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap44xx_gpio6_addrs),
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -2014,7 +2017,6 @@ static struct omap_hwmod omap44xx_gpio6_hwmod = {
         .class          = &omap44xx_gpio_hwmod_class,
         .flags          = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
         .mpu_irqs       = omap44xx_gpio6_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap44xx_gpio6_irqs),
         .main_clk       = "gpio6_ick",
         .prcm = {
                 .omap4 = {
@@ -2044,7 +2046,7 @@ static struct omap_hwmod_class_sysconfig omap44xx_hsi_sysc = {
                            SYSC_HAS_SOFTRESET | SYSS_HAS_RESET_STATUS),
         .idlemodes      = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
                            SIDLE_SMART_WKUP | MSTANDBY_FORCE | MSTANDBY_NO |
-                           MSTANDBY_SMART),
+                           MSTANDBY_SMART | MSTANDBY_SMART_WKUP),
         .sysc_fields    = &omap_hwmod_sysc_type1,
 };
 
@@ -2058,6 +2060,7 @@ static struct omap_hwmod_irq_info omap44xx_hsi_irqs[] = {
         { .name = "mpu_p1", .irq = 67 + OMAP44XX_IRQ_GIC_START },
         { .name = "mpu_p2", .irq = 68 + OMAP44XX_IRQ_GIC_START },
         { .name = "mpu_dma", .irq = 71 + OMAP44XX_IRQ_GIC_START },
+        { .irq = -1 }
 };
 
 /* hsi master ports */
@@ -2071,6 +2074,7 @@ static struct omap_hwmod_addr_space omap44xx_hsi_addrs[] = {
                 .pa_end         = 0x4a05bfff,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* l4_cfg -> hsi */
@@ -2079,7 +2083,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__hsi = {
         .slave          = &omap44xx_hsi_hwmod,
         .clk            = "l4_div_ck",
         .addr           = omap44xx_hsi_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap44xx_hsi_addrs),
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -2092,9 +2095,8 @@ static struct omap_hwmod omap44xx_hsi_hwmod = {
         .name           = "hsi",
         .class          = &omap44xx_hsi_hwmod_class,
         .mpu_irqs       = omap44xx_hsi_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap44xx_hsi_irqs),
         .main_clk       = "hsi_fck",
-        .prcm           = {
+        .prcm = {
                 .omap4 = {
                         .clkctrl_reg = OMAP4430_CM_L3INIT_HSI_CLKCTRL,
                 },
@@ -2131,11 +2133,13 @@ static struct omap_hwmod_class omap44xx_i2c_hwmod_class = {
 static struct omap_hwmod omap44xx_i2c1_hwmod;
 static struct omap_hwmod_irq_info omap44xx_i2c1_irqs[] = {
         { .irq = 56 + OMAP44XX_IRQ_GIC_START },
+        { .irq = -1 }
 };
 
 static struct omap_hwmod_dma_info omap44xx_i2c1_sdma_reqs[] = {
         { .name = "tx", .dma_req = 26 + OMAP44XX_DMA_REQ_START },
         { .name = "rx", .dma_req = 27 + OMAP44XX_DMA_REQ_START },
+        { .dma_req = -1 }
 };
 
 static struct omap_hwmod_addr_space omap44xx_i2c1_addrs[] = {
@@ -2144,6 +2148,7 @@ static struct omap_hwmod_addr_space omap44xx_i2c1_addrs[] = {
                 .pa_end         = 0x480700ff,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* l4_per -> i2c1 */
@@ -2152,7 +2157,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__i2c1 = {
         .slave          = &omap44xx_i2c1_hwmod,
         .clk            = "l4_div_ck",
         .addr           = omap44xx_i2c1_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap44xx_i2c1_addrs),
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -2166,9 +2170,7 @@ static struct omap_hwmod omap44xx_i2c1_hwmod = {
         .class          = &omap44xx_i2c_hwmod_class,
         .flags          = HWMOD_INIT_NO_RESET,
         .mpu_irqs       = omap44xx_i2c1_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap44xx_i2c1_irqs),
         .sdma_reqs      = omap44xx_i2c1_sdma_reqs,
-        .sdma_reqs_cnt  = ARRAY_SIZE(omap44xx_i2c1_sdma_reqs),
         .main_clk       = "i2c1_fck",
         .prcm = {
                 .omap4 = {
@@ -2184,11 +2186,13 @@ static struct omap_hwmod omap44xx_i2c1_hwmod = {
 static struct omap_hwmod omap44xx_i2c2_hwmod;
 static struct omap_hwmod_irq_info omap44xx_i2c2_irqs[] = {
         { .irq = 57 + OMAP44XX_IRQ_GIC_START },
+        { .irq = -1 }
 };
 
 static struct omap_hwmod_dma_info omap44xx_i2c2_sdma_reqs[] = {
         { .name = "tx", .dma_req = 28 + OMAP44XX_DMA_REQ_START },
         { .name = "rx", .dma_req = 29 + OMAP44XX_DMA_REQ_START },
+        { .dma_req = -1 }
 };
 
 static struct omap_hwmod_addr_space omap44xx_i2c2_addrs[] = {
@@ -2197,6 +2201,7 @@ static struct omap_hwmod_addr_space omap44xx_i2c2_addrs[] = {
                 .pa_end         = 0x480720ff,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* l4_per -> i2c2 */
@@ -2205,7 +2210,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__i2c2 = {
         .slave          = &omap44xx_i2c2_hwmod,
         .clk            = "l4_div_ck",
         .addr           = omap44xx_i2c2_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap44xx_i2c2_addrs),
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -2219,9 +2223,7 @@ static struct omap_hwmod omap44xx_i2c2_hwmod = {
         .class          = &omap44xx_i2c_hwmod_class,
         .flags          = HWMOD_INIT_NO_RESET,
         .mpu_irqs       = omap44xx_i2c2_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap44xx_i2c2_irqs),
         .sdma_reqs      = omap44xx_i2c2_sdma_reqs,
-        .sdma_reqs_cnt  = ARRAY_SIZE(omap44xx_i2c2_sdma_reqs),
         .main_clk       = "i2c2_fck",
         .prcm = {
                 .omap4 = {
@@ -2237,11 +2239,13 @@ static struct omap_hwmod omap44xx_i2c2_hwmod = {
 static struct omap_hwmod omap44xx_i2c3_hwmod;
 static struct omap_hwmod_irq_info omap44xx_i2c3_irqs[] = {
         { .irq = 61 + OMAP44XX_IRQ_GIC_START },
+        { .irq = -1 }
 };
 
 static struct omap_hwmod_dma_info omap44xx_i2c3_sdma_reqs[] = {
         { .name = "tx", .dma_req = 24 + OMAP44XX_DMA_REQ_START },
         { .name = "rx", .dma_req = 25 + OMAP44XX_DMA_REQ_START },
+        { .dma_req = -1 }
 };
 
 static struct omap_hwmod_addr_space omap44xx_i2c3_addrs[] = {
@@ -2250,6 +2254,7 @@ static struct omap_hwmod_addr_space omap44xx_i2c3_addrs[] = {
                 .pa_end         = 0x480600ff,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* l4_per -> i2c3 */
@@ -2258,7 +2263,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__i2c3 = {
         .slave          = &omap44xx_i2c3_hwmod,
         .clk            = "l4_div_ck",
         .addr           = omap44xx_i2c3_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap44xx_i2c3_addrs),
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -2272,9 +2276,7 @@ static struct omap_hwmod omap44xx_i2c3_hwmod = {
         .class          = &omap44xx_i2c_hwmod_class,
         .flags          = HWMOD_INIT_NO_RESET,
         .mpu_irqs       = omap44xx_i2c3_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap44xx_i2c3_irqs),
         .sdma_reqs      = omap44xx_i2c3_sdma_reqs,
-        .sdma_reqs_cnt  = ARRAY_SIZE(omap44xx_i2c3_sdma_reqs),
         .main_clk       = "i2c3_fck",
         .prcm = {
                 .omap4 = {
@@ -2290,11 +2292,13 @@ static struct omap_hwmod omap44xx_i2c3_hwmod = {
 static struct omap_hwmod omap44xx_i2c4_hwmod;
 static struct omap_hwmod_irq_info omap44xx_i2c4_irqs[] = {
         { .irq = 62 + OMAP44XX_IRQ_GIC_START },
+        { .irq = -1 }
 };
 
 static struct omap_hwmod_dma_info omap44xx_i2c4_sdma_reqs[] = {
         { .name = "tx", .dma_req = 123 + OMAP44XX_DMA_REQ_START },
         { .name = "rx", .dma_req = 124 + OMAP44XX_DMA_REQ_START },
+        { .dma_req = -1 }
 };
 
 static struct omap_hwmod_addr_space omap44xx_i2c4_addrs[] = {
@@ -2303,6 +2307,7 @@ static struct omap_hwmod_addr_space omap44xx_i2c4_addrs[] = {
                 .pa_end         = 0x483500ff,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* l4_per -> i2c4 */
@@ -2311,7 +2316,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__i2c4 = {
         .slave          = &omap44xx_i2c4_hwmod,
         .clk            = "l4_div_ck",
         .addr           = omap44xx_i2c4_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap44xx_i2c4_addrs),
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -2325,9 +2329,7 @@ static struct omap_hwmod omap44xx_i2c4_hwmod = {
         .class          = &omap44xx_i2c_hwmod_class,
         .flags          = HWMOD_INIT_NO_RESET,
         .mpu_irqs       = omap44xx_i2c4_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap44xx_i2c4_irqs),
         .sdma_reqs      = omap44xx_i2c4_sdma_reqs,
-        .sdma_reqs_cnt  = ARRAY_SIZE(omap44xx_i2c4_sdma_reqs),
         .main_clk       = "i2c4_fck",
         .prcm = {
                 .omap4 = {
@@ -2351,6 +2353,7 @@ static struct omap_hwmod_class omap44xx_ipu_hwmod_class = {
 /* ipu */
 static struct omap_hwmod_irq_info omap44xx_ipu_irqs[] = {
         { .irq = 100 + OMAP44XX_IRQ_GIC_START },
+        { .irq = -1 }
 };
 
 static struct omap_hwmod_rst_info omap44xx_ipu_c0_resets[] = {
@@ -2390,7 +2393,7 @@ static struct omap_hwmod omap44xx_ipu_c0_hwmod = {
         .flags          = HWMOD_INIT_NO_RESET,
         .rst_lines      = omap44xx_ipu_c0_resets,
         .rst_lines_cnt  = ARRAY_SIZE(omap44xx_ipu_c0_resets),
-        .prcm           = {
+        .prcm = {
                 .omap4 = {
                         .rstctrl_reg = OMAP4430_RM_DUCATI_RSTCTRL,
                 },
@@ -2405,7 +2408,7 @@ static struct omap_hwmod omap44xx_ipu_c1_hwmod = {
         .flags          = HWMOD_INIT_NO_RESET,
         .rst_lines      = omap44xx_ipu_c1_resets,
         .rst_lines_cnt  = ARRAY_SIZE(omap44xx_ipu_c1_resets),
-        .prcm           = {
+        .prcm = {
                 .omap4 = {
                         .rstctrl_reg = OMAP4430_RM_DUCATI_RSTCTRL,
                 },
@@ -2417,11 +2420,10 @@ static struct omap_hwmod omap44xx_ipu_hwmod = {
         .name           = "ipu",
         .class          = &omap44xx_ipu_hwmod_class,
         .mpu_irqs       = omap44xx_ipu_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap44xx_ipu_irqs),
         .rst_lines      = omap44xx_ipu_resets,
         .rst_lines_cnt  = ARRAY_SIZE(omap44xx_ipu_resets),
         .main_clk       = "ipu_fck",
-        .prcm           = {
+        .prcm = {
                 .omap4 = {
                         .clkctrl_reg = OMAP4430_CM_DUCATI_DUCATI_CLKCTRL,
                         .rstctrl_reg = OMAP4430_RM_DUCATI_RSTCTRL,
@@ -2446,7 +2448,7 @@ static struct omap_hwmod_class_sysconfig omap44xx_iss_sysc = {
                            SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET),
         .idlemodes      = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
                            SIDLE_SMART_WKUP | MSTANDBY_FORCE | MSTANDBY_NO |
-                           MSTANDBY_SMART),
+                           MSTANDBY_SMART | MSTANDBY_SMART_WKUP),
         .sysc_fields    = &omap_hwmod_sysc_type2,
 };
 
@@ -2458,6 +2460,7 @@ static struct omap_hwmod_class omap44xx_iss_hwmod_class = {
 /* iss */
 static struct omap_hwmod_irq_info omap44xx_iss_irqs[] = {
         { .irq = 24 + OMAP44XX_IRQ_GIC_START },
+        { .irq = -1 }
 };
 
 static struct omap_hwmod_dma_info omap44xx_iss_sdma_reqs[] = {
@@ -2465,6 +2468,7 @@ static struct omap_hwmod_dma_info omap44xx_iss_sdma_reqs[] = {
         { .name = "2", .dma_req = 9 + OMAP44XX_DMA_REQ_START },
         { .name = "3", .dma_req = 11 + OMAP44XX_DMA_REQ_START },
         { .name = "4", .dma_req = 12 + OMAP44XX_DMA_REQ_START },
+        { .dma_req = -1 }
 };
 
 /* iss master ports */
@@ -2478,6 +2482,7 @@ static struct omap_hwmod_addr_space omap44xx_iss_addrs[] = {
                 .pa_end         = 0x520000ff,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* l3_main_2 -> iss */
@@ -2486,7 +2491,6 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_2__iss = {
         .slave          = &omap44xx_iss_hwmod,
         .clk            = "l3_div_ck",
         .addr           = omap44xx_iss_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap44xx_iss_addrs),
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -2503,11 +2507,9 @@ static struct omap_hwmod omap44xx_iss_hwmod = {
         .name           = "iss",
         .class          = &omap44xx_iss_hwmod_class,
         .mpu_irqs       = omap44xx_iss_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap44xx_iss_irqs),
         .sdma_reqs      = omap44xx_iss_sdma_reqs,
-        .sdma_reqs_cnt  = ARRAY_SIZE(omap44xx_iss_sdma_reqs),
         .main_clk       = "iss_fck",
-        .prcm           = {
+        .prcm = {
                 .omap4 = {
                         .clkctrl_reg = OMAP4430_CM_CAM_ISS_CLKCTRL,
                 },
@@ -2535,6 +2537,7 @@ static struct omap_hwmod_irq_info omap44xx_iva_irqs[] = {
         { .name = "sync_1", .irq = 103 + OMAP44XX_IRQ_GIC_START },
         { .name = "sync_0", .irq = 104 + OMAP44XX_IRQ_GIC_START },
         { .name = "mailbox_0", .irq = 107 + OMAP44XX_IRQ_GIC_START },
+        { .irq = -1 }
 };
 
 static struct omap_hwmod_rst_info omap44xx_iva_resets[] = {
@@ -2561,6 +2564,7 @@ static struct omap_hwmod_addr_space omap44xx_iva_addrs[] = {
                 .pa_end         = 0x5a07ffff,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* l3_main_2 -> iva */
@@ -2569,7 +2573,6 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_2__iva = {
         .slave          = &omap44xx_iva_hwmod,
         .clk            = "l3_div_ck",
         .addr           = omap44xx_iva_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap44xx_iva_addrs),
         .user           = OCP_USER_MPU,
 };
 
@@ -2613,7 +2616,6 @@ static struct omap_hwmod omap44xx_iva_hwmod = {
         .name           = "iva",
         .class          = &omap44xx_iva_hwmod_class,
         .mpu_irqs       = omap44xx_iva_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap44xx_iva_irqs),
         .rst_lines      = omap44xx_iva_resets,
         .rst_lines_cnt  = ARRAY_SIZE(omap44xx_iva_resets),
         .main_clk       = "iva_fck",
@@ -2656,6 +2658,7 @@ static struct omap_hwmod_class omap44xx_kbd_hwmod_class = {
 static struct omap_hwmod omap44xx_kbd_hwmod;
 static struct omap_hwmod_irq_info omap44xx_kbd_irqs[] = {
         { .irq = 120 + OMAP44XX_IRQ_GIC_START },
+        { .irq = -1 }
 };
 
 static struct omap_hwmod_addr_space omap44xx_kbd_addrs[] = {
@@ -2664,6 +2667,7 @@ static struct omap_hwmod_addr_space omap44xx_kbd_addrs[] = {
                 .pa_end         = 0x4a31c07f,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* l4_wkup -> kbd */
@@ -2672,7 +2676,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_wkup__kbd = {
         .slave          = &omap44xx_kbd_hwmod,
         .clk            = "l4_wkup_clk_mux_ck",
         .addr           = omap44xx_kbd_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap44xx_kbd_addrs),
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -2685,9 +2688,8 @@ static struct omap_hwmod omap44xx_kbd_hwmod = {
         .name           = "kbd",
         .class          = &omap44xx_kbd_hwmod_class,
         .mpu_irqs       = omap44xx_kbd_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap44xx_kbd_irqs),
         .main_clk       = "kbd_fck",
-        .prcm           = {
+        .prcm = {
                 .omap4 = {
                         .clkctrl_reg = OMAP4430_CM_WKUP_KEYBOARD_CLKCTRL,
                 },
@@ -2721,6 +2723,7 @@ static struct omap_hwmod_class omap44xx_mailbox_hwmod_class = {
 static struct omap_hwmod omap44xx_mailbox_hwmod;
 static struct omap_hwmod_irq_info omap44xx_mailbox_irqs[] = {
         { .irq = 26 + OMAP44XX_IRQ_GIC_START },
+        { .irq = -1 }
 };
 
 static struct omap_hwmod_addr_space omap44xx_mailbox_addrs[] = {
@@ -2729,6 +2732,7 @@ static struct omap_hwmod_addr_space omap44xx_mailbox_addrs[] = {
                 .pa_end         = 0x4a0f41ff,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* l4_cfg -> mailbox */
@@ -2737,7 +2741,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__mailbox = {
         .slave          = &omap44xx_mailbox_hwmod,
         .clk            = "l4_div_ck",
         .addr           = omap44xx_mailbox_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap44xx_mailbox_addrs),
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -2750,8 +2753,7 @@ static struct omap_hwmod omap44xx_mailbox_hwmod = {
         .name           = "mailbox",
         .class          = &omap44xx_mailbox_hwmod_class,
         .mpu_irqs       = omap44xx_mailbox_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap44xx_mailbox_irqs),
-        .prcm           = {
+        .prcm = {
                 .omap4 = {
                         .clkctrl_reg = OMAP4430_CM_L4CFG_MAILBOX_CLKCTRL,
                 },
@@ -2784,11 +2786,13 @@ static struct omap_hwmod_class omap44xx_mcbsp_hwmod_class = {
 static struct omap_hwmod omap44xx_mcbsp1_hwmod;
 static struct omap_hwmod_irq_info omap44xx_mcbsp1_irqs[] = {
         { .irq = 17 + OMAP44XX_IRQ_GIC_START },
+        { .irq = -1 }
 };
 
 static struct omap_hwmod_dma_info omap44xx_mcbsp1_sdma_reqs[] = {
         { .name = "tx", .dma_req = 32 + OMAP44XX_DMA_REQ_START },
         { .name = "rx", .dma_req = 33 + OMAP44XX_DMA_REQ_START },
+        { .dma_req = -1 }
 };
 
 static struct omap_hwmod_addr_space omap44xx_mcbsp1_addrs[] = {
@@ -2798,6 +2802,7 @@ static struct omap_hwmod_addr_space omap44xx_mcbsp1_addrs[] = {
                 .pa_end         = 0x401220ff,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* l4_abe -> mcbsp1 */
@@ -2806,7 +2811,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp1 = {
         .slave          = &omap44xx_mcbsp1_hwmod,
         .clk            = "ocp_abe_iclk",
         .addr           = omap44xx_mcbsp1_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap44xx_mcbsp1_addrs),
         .user           = OCP_USER_MPU,
 };
 
@@ -2817,6 +2821,7 @@ static struct omap_hwmod_addr_space omap44xx_mcbsp1_dma_addrs[] = {
                 .pa_end         = 0x490220ff,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* l4_abe -> mcbsp1 (dma) */
@@ -2825,7 +2830,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp1_dma = {
         .slave          = &omap44xx_mcbsp1_hwmod,
         .clk            = "ocp_abe_iclk",
         .addr           = omap44xx_mcbsp1_dma_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap44xx_mcbsp1_dma_addrs),
         .user           = OCP_USER_SDMA,
 };
 
@@ -2839,9 +2843,7 @@ static struct omap_hwmod omap44xx_mcbsp1_hwmod = {
         .name           = "mcbsp1",
         .class          = &omap44xx_mcbsp_hwmod_class,
         .mpu_irqs       = omap44xx_mcbsp1_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap44xx_mcbsp1_irqs),
         .sdma_reqs      = omap44xx_mcbsp1_sdma_reqs,
-        .sdma_reqs_cnt  = ARRAY_SIZE(omap44xx_mcbsp1_sdma_reqs),
         .main_clk       = "mcbsp1_fck",
         .prcm = {
                 .omap4 = {
@@ -2857,11 +2859,13 @@ static struct omap_hwmod omap44xx_mcbsp1_hwmod = {
 static struct omap_hwmod omap44xx_mcbsp2_hwmod;
 static struct omap_hwmod_irq_info omap44xx_mcbsp2_irqs[] = {
         { .irq = 22 + OMAP44XX_IRQ_GIC_START },
+        { .irq = -1 }
 };
 
 static struct omap_hwmod_dma_info omap44xx_mcbsp2_sdma_reqs[] = {
         { .name = "tx", .dma_req = 16 + OMAP44XX_DMA_REQ_START },
         { .name = "rx", .dma_req = 17 + OMAP44XX_DMA_REQ_START },
+        { .dma_req = -1 }
 };
 
 static struct omap_hwmod_addr_space omap44xx_mcbsp2_addrs[] = {
@@ -2871,6 +2875,7 @@ static struct omap_hwmod_addr_space omap44xx_mcbsp2_addrs[] = {
                 .pa_end         = 0x401240ff,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* l4_abe -> mcbsp2 */
@@ -2879,7 +2884,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp2 = {
         .slave          = &omap44xx_mcbsp2_hwmod,
         .clk            = "ocp_abe_iclk",
         .addr           = omap44xx_mcbsp2_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap44xx_mcbsp2_addrs),
         .user           = OCP_USER_MPU,
 };
 
@@ -2890,6 +2894,7 @@ static struct omap_hwmod_addr_space omap44xx_mcbsp2_dma_addrs[] = {
                 .pa_end         = 0x490240ff,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* l4_abe -> mcbsp2 (dma) */
@@ -2898,7 +2903,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp2_dma = {
         .slave          = &omap44xx_mcbsp2_hwmod,
         .clk            = "ocp_abe_iclk",
         .addr           = omap44xx_mcbsp2_dma_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap44xx_mcbsp2_dma_addrs),
         .user           = OCP_USER_SDMA,
 };
 
@@ -2912,9 +2916,7 @@ static struct omap_hwmod omap44xx_mcbsp2_hwmod = {
         .name           = "mcbsp2",
         .class          = &omap44xx_mcbsp_hwmod_class,
         .mpu_irqs       = omap44xx_mcbsp2_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap44xx_mcbsp2_irqs),
         .sdma_reqs      = omap44xx_mcbsp2_sdma_reqs,
-        .sdma_reqs_cnt  = ARRAY_SIZE(omap44xx_mcbsp2_sdma_reqs),
         .main_clk       = "mcbsp2_fck",
         .prcm = {
                 .omap4 = {
@@ -2930,11 +2932,13 @@ static struct omap_hwmod omap44xx_mcbsp2_hwmod = {
 static struct omap_hwmod omap44xx_mcbsp3_hwmod;
 static struct omap_hwmod_irq_info omap44xx_mcbsp3_irqs[] = {
         { .irq = 23 + OMAP44XX_IRQ_GIC_START },
+        { .irq = -1 }
 };
 
 static struct omap_hwmod_dma_info omap44xx_mcbsp3_sdma_reqs[] = {
         { .name = "tx", .dma_req = 18 + OMAP44XX_DMA_REQ_START },
         { .name = "rx", .dma_req = 19 + OMAP44XX_DMA_REQ_START },
+        { .dma_req = -1 }
 };
 
 static struct omap_hwmod_addr_space omap44xx_mcbsp3_addrs[] = {
@@ -2944,6 +2948,7 @@ static struct omap_hwmod_addr_space omap44xx_mcbsp3_addrs[] = {
                 .pa_end         = 0x401260ff,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* l4_abe -> mcbsp3 */
@@ -2952,7 +2957,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp3 = {
         .slave          = &omap44xx_mcbsp3_hwmod,
         .clk            = "ocp_abe_iclk",
         .addr           = omap44xx_mcbsp3_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap44xx_mcbsp3_addrs),
         .user           = OCP_USER_MPU,
 };
 
@@ -2963,6 +2967,7 @@ static struct omap_hwmod_addr_space omap44xx_mcbsp3_dma_addrs[] = {
                 .pa_end         = 0x490260ff,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* l4_abe -> mcbsp3 (dma) */
@@ -2971,7 +2976,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp3_dma = {
         .slave          = &omap44xx_mcbsp3_hwmod,
         .clk            = "ocp_abe_iclk",
         .addr           = omap44xx_mcbsp3_dma_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap44xx_mcbsp3_dma_addrs),
         .user           = OCP_USER_SDMA,
 };
 
@@ -2985,9 +2989,7 @@ static struct omap_hwmod omap44xx_mcbsp3_hwmod = {
         .name           = "mcbsp3",
         .class          = &omap44xx_mcbsp_hwmod_class,
         .mpu_irqs       = omap44xx_mcbsp3_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap44xx_mcbsp3_irqs),
         .sdma_reqs      = omap44xx_mcbsp3_sdma_reqs,
-        .sdma_reqs_cnt  = ARRAY_SIZE(omap44xx_mcbsp3_sdma_reqs),
         .main_clk       = "mcbsp3_fck",
         .prcm = {
                 .omap4 = {
@@ -3003,11 +3005,13 @@ static struct omap_hwmod omap44xx_mcbsp3_hwmod = {
 static struct omap_hwmod omap44xx_mcbsp4_hwmod;
 static struct omap_hwmod_irq_info omap44xx_mcbsp4_irqs[] = {
         { .irq = 16 + OMAP44XX_IRQ_GIC_START },
+        { .irq = -1 }
 };
 
 static struct omap_hwmod_dma_info omap44xx_mcbsp4_sdma_reqs[] = {
         { .name = "tx", .dma_req = 30 + OMAP44XX_DMA_REQ_START },
         { .name = "rx", .dma_req = 31 + OMAP44XX_DMA_REQ_START },
+        { .dma_req = -1 }
 };
 
 static struct omap_hwmod_addr_space omap44xx_mcbsp4_addrs[] = {
@@ -3016,6 +3020,7 @@ static struct omap_hwmod_addr_space omap44xx_mcbsp4_addrs[] = {
                 .pa_end         = 0x480960ff,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* l4_per -> mcbsp4 */
@@ -3024,7 +3029,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__mcbsp4 = {
         .slave          = &omap44xx_mcbsp4_hwmod,
         .clk            = "l4_div_ck",
         .addr           = omap44xx_mcbsp4_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap44xx_mcbsp4_addrs),
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -3037,9 +3041,7 @@ static struct omap_hwmod omap44xx_mcbsp4_hwmod = {
         .name           = "mcbsp4",
         .class          = &omap44xx_mcbsp_hwmod_class,
         .mpu_irqs       = omap44xx_mcbsp4_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap44xx_mcbsp4_irqs),
         .sdma_reqs      = omap44xx_mcbsp4_sdma_reqs,
-        .sdma_reqs_cnt  = ARRAY_SIZE(omap44xx_mcbsp4_sdma_reqs),
         .main_clk       = "mcbsp4_fck",
         .prcm = {
                 .omap4 = {
@@ -3076,11 +3078,13 @@ static struct omap_hwmod_class omap44xx_mcpdm_hwmod_class = {
 static struct omap_hwmod omap44xx_mcpdm_hwmod;
 static struct omap_hwmod_irq_info omap44xx_mcpdm_irqs[] = {
         { .irq = 112 + OMAP44XX_IRQ_GIC_START },
+        { .irq = -1 }
 };
 
 static struct omap_hwmod_dma_info omap44xx_mcpdm_sdma_reqs[] = {
         { .name = "up_link", .dma_req = 64 + OMAP44XX_DMA_REQ_START },
         { .name = "dn_link", .dma_req = 65 + OMAP44XX_DMA_REQ_START },
+        { .dma_req = -1 }
 };
 
 static struct omap_hwmod_addr_space omap44xx_mcpdm_addrs[] = {
@@ -3089,6 +3093,7 @@ static struct omap_hwmod_addr_space omap44xx_mcpdm_addrs[] = {
                 .pa_end         = 0x4013207f,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* l4_abe -> mcpdm */
@@ -3097,7 +3102,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcpdm = {
         .slave          = &omap44xx_mcpdm_hwmod,
         .clk            = "ocp_abe_iclk",
         .addr           = omap44xx_mcpdm_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap44xx_mcpdm_addrs),
         .user           = OCP_USER_MPU,
 };
 
@@ -3107,6 +3111,7 @@ static struct omap_hwmod_addr_space omap44xx_mcpdm_dma_addrs[] = {
                 .pa_end         = 0x4903207f,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* l4_abe -> mcpdm (dma) */
@@ -3115,7 +3120,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcpdm_dma = {
         .slave          = &omap44xx_mcpdm_hwmod,
         .clk            = "ocp_abe_iclk",
         .addr           = omap44xx_mcpdm_dma_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap44xx_mcpdm_dma_addrs),
         .user           = OCP_USER_SDMA,
 };
 
@@ -3129,11 +3133,9 @@ static struct omap_hwmod omap44xx_mcpdm_hwmod = {
         .name           = "mcpdm",
         .class          = &omap44xx_mcpdm_hwmod_class,
         .mpu_irqs       = omap44xx_mcpdm_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap44xx_mcpdm_irqs),
         .sdma_reqs      = omap44xx_mcpdm_sdma_reqs,
-        .sdma_reqs_cnt  = ARRAY_SIZE(omap44xx_mcpdm_sdma_reqs),
         .main_clk       = "mcpdm_fck",
-        .prcm           = {
+        .prcm = {
                 .omap4 = {
                         .clkctrl_reg = OMAP4430_CM1_ABE_PDM_CLKCTRL,
                 },
@@ -3169,6 +3171,7 @@ static struct omap_hwmod_class omap44xx_mcspi_hwmod_class = {
 static struct omap_hwmod omap44xx_mcspi1_hwmod;
 static struct omap_hwmod_irq_info omap44xx_mcspi1_irqs[] = {
         { .irq = 65 + OMAP44XX_IRQ_GIC_START },
+        { .irq = -1 }
 };
 
 static struct omap_hwmod_dma_info omap44xx_mcspi1_sdma_reqs[] = {
@@ -3180,6 +3183,7 @@ static struct omap_hwmod_dma_info omap44xx_mcspi1_sdma_reqs[] = {
         { .name = "rx2", .dma_req = 39 + OMAP44XX_DMA_REQ_START },
         { .name = "tx3", .dma_req = 40 + OMAP44XX_DMA_REQ_START },
         { .name = "rx3", .dma_req = 41 + OMAP44XX_DMA_REQ_START },
+        { .dma_req = -1 }
 };
 
 static struct omap_hwmod_addr_space omap44xx_mcspi1_addrs[] = {
@@ -3188,6 +3192,7 @@ static struct omap_hwmod_addr_space omap44xx_mcspi1_addrs[] = {
                 .pa_end         = 0x480981ff,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* l4_per -> mcspi1 */
@@ -3196,7 +3201,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__mcspi1 = {
         .slave          = &omap44xx_mcspi1_hwmod,
         .clk            = "l4_div_ck",
         .addr           = omap44xx_mcspi1_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap44xx_mcspi1_addrs),
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -3214,9 +3218,7 @@ static struct omap_hwmod omap44xx_mcspi1_hwmod = {
         .name           = "mcspi1",
         .class          = &omap44xx_mcspi_hwmod_class,
         .mpu_irqs       = omap44xx_mcspi1_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap44xx_mcspi1_irqs),
         .sdma_reqs      = omap44xx_mcspi1_sdma_reqs,
-        .sdma_reqs_cnt  = ARRAY_SIZE(omap44xx_mcspi1_sdma_reqs),
         .main_clk       = "mcspi1_fck",
         .prcm = {
                 .omap4 = {
@@ -3233,6 +3235,7 @@ static struct omap_hwmod omap44xx_mcspi1_hwmod = {
 static struct omap_hwmod omap44xx_mcspi2_hwmod;
 static struct omap_hwmod_irq_info omap44xx_mcspi2_irqs[] = {
         { .irq = 66 + OMAP44XX_IRQ_GIC_START },
+        { .irq = -1 }
 };
 
 static struct omap_hwmod_dma_info omap44xx_mcspi2_sdma_reqs[] = {
@@ -3240,6 +3243,7 @@ static struct omap_hwmod_dma_info omap44xx_mcspi2_sdma_reqs[] = {
         { .name = "rx0", .dma_req = 43 + OMAP44XX_DMA_REQ_START },
         { .name = "tx1", .dma_req = 44 + OMAP44XX_DMA_REQ_START },
         { .name = "rx1", .dma_req = 45 + OMAP44XX_DMA_REQ_START },
+        { .dma_req = -1 }
 };
 
 static struct omap_hwmod_addr_space omap44xx_mcspi2_addrs[] = {
@@ -3248,6 +3252,7 @@ static struct omap_hwmod_addr_space omap44xx_mcspi2_addrs[] = {
                 .pa_end         = 0x4809a1ff,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* l4_per -> mcspi2 */
@@ -3256,7 +3261,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__mcspi2 = {
         .slave          = &omap44xx_mcspi2_hwmod,
         .clk            = "l4_div_ck",
         .addr           = omap44xx_mcspi2_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap44xx_mcspi2_addrs),
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -3274,9 +3278,7 @@ static struct omap_hwmod omap44xx_mcspi2_hwmod = {
         .name           = "mcspi2",
         .class          = &omap44xx_mcspi_hwmod_class,
         .mpu_irqs       = omap44xx_mcspi2_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap44xx_mcspi2_irqs),
         .sdma_reqs      = omap44xx_mcspi2_sdma_reqs,
-        .sdma_reqs_cnt  = ARRAY_SIZE(omap44xx_mcspi2_sdma_reqs),
         .main_clk       = "mcspi2_fck",
         .prcm = {
                 .omap4 = {
@@ -3293,6 +3295,7 @@ static struct omap_hwmod omap44xx_mcspi2_hwmod = {
 static struct omap_hwmod omap44xx_mcspi3_hwmod;
 static struct omap_hwmod_irq_info omap44xx_mcspi3_irqs[] = {
         { .irq = 91 + OMAP44XX_IRQ_GIC_START },
+        { .irq = -1 }
 };
 
 static struct omap_hwmod_dma_info omap44xx_mcspi3_sdma_reqs[] = {
@@ -3300,6 +3303,7 @@ static struct omap_hwmod_dma_info omap44xx_mcspi3_sdma_reqs[] = {
         { .name = "rx0", .dma_req = 15 + OMAP44XX_DMA_REQ_START },
         { .name = "tx1", .dma_req = 22 + OMAP44XX_DMA_REQ_START },
         { .name = "rx1", .dma_req = 23 + OMAP44XX_DMA_REQ_START },
+        { .dma_req = -1 }
 };
 
 static struct omap_hwmod_addr_space omap44xx_mcspi3_addrs[] = {
@@ -3308,6 +3312,7 @@ static struct omap_hwmod_addr_space omap44xx_mcspi3_addrs[] = {
                 .pa_end         = 0x480b81ff,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* l4_per -> mcspi3 */
@@ -3316,7 +3321,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__mcspi3 = {
         .slave          = &omap44xx_mcspi3_hwmod,
         .clk            = "l4_div_ck",
         .addr           = omap44xx_mcspi3_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap44xx_mcspi3_addrs),
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -3334,9 +3338,7 @@ static struct omap_hwmod omap44xx_mcspi3_hwmod = {
         .name           = "mcspi3",
         .class          = &omap44xx_mcspi_hwmod_class,
         .mpu_irqs       = omap44xx_mcspi3_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap44xx_mcspi3_irqs),
         .sdma_reqs      = omap44xx_mcspi3_sdma_reqs,
-        .sdma_reqs_cnt  = ARRAY_SIZE(omap44xx_mcspi3_sdma_reqs),
         .main_clk       = "mcspi3_fck",
         .prcm = {
                 .omap4 = {
@@ -3353,11 +3355,13 @@ static struct omap_hwmod omap44xx_mcspi3_hwmod = {
 static struct omap_hwmod omap44xx_mcspi4_hwmod;
 static struct omap_hwmod_irq_info omap44xx_mcspi4_irqs[] = {
         { .irq = 48 + OMAP44XX_IRQ_GIC_START },
+        { .irq = -1 }
 };
 
 static struct omap_hwmod_dma_info omap44xx_mcspi4_sdma_reqs[] = {
         { .name = "tx0", .dma_req = 69 + OMAP44XX_DMA_REQ_START },
         { .name = "rx0", .dma_req = 70 + OMAP44XX_DMA_REQ_START },
+        { .dma_req = -1 }
 };
 
 static struct omap_hwmod_addr_space omap44xx_mcspi4_addrs[] = {
@@ -3366,6 +3370,7 @@ static struct omap_hwmod_addr_space omap44xx_mcspi4_addrs[] = {
                 .pa_end         = 0x480ba1ff,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* l4_per -> mcspi4 */
@@ -3374,7 +3379,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__mcspi4 = {
         .slave          = &omap44xx_mcspi4_hwmod,
         .clk            = "l4_div_ck",
         .addr           = omap44xx_mcspi4_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap44xx_mcspi4_addrs),
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -3392,9 +3396,7 @@ static struct omap_hwmod omap44xx_mcspi4_hwmod = {
         .name           = "mcspi4",
         .class          = &omap44xx_mcspi_hwmod_class,
         .mpu_irqs       = omap44xx_mcspi4_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap44xx_mcspi4_irqs),
         .sdma_reqs      = omap44xx_mcspi4_sdma_reqs,
-        .sdma_reqs_cnt  = ARRAY_SIZE(omap44xx_mcspi4_sdma_reqs),
         .main_clk       = "mcspi4_fck",
         .prcm = {
                 .omap4 = {
@@ -3420,7 +3422,7 @@ static struct omap_hwmod_class_sysconfig omap44xx_mmc_sysc = {
                            SYSC_HAS_SOFTRESET),
         .idlemodes      = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
                            SIDLE_SMART_WKUP | MSTANDBY_FORCE | MSTANDBY_NO |
-                           MSTANDBY_SMART),
+                           MSTANDBY_SMART | MSTANDBY_SMART_WKUP),
         .sysc_fields    = &omap_hwmod_sysc_type2,
 };
 
@@ -3430,14 +3432,15 @@ static struct omap_hwmod_class omap44xx_mmc_hwmod_class = {
 };
 
 /* mmc1 */
-
 static struct omap_hwmod_irq_info omap44xx_mmc1_irqs[] = {
         { .irq = 83 + OMAP44XX_IRQ_GIC_START },
+        { .irq = -1 }
 };
 
 static struct omap_hwmod_dma_info omap44xx_mmc1_sdma_reqs[] = {
         { .name = "tx", .dma_req = 60 + OMAP44XX_DMA_REQ_START },
         { .name = "rx", .dma_req = 61 + OMAP44XX_DMA_REQ_START },
+        { .dma_req = -1 }
 };
 
 /* mmc1 master ports */
@@ -3451,6 +3454,7 @@ static struct omap_hwmod_addr_space omap44xx_mmc1_addrs[] = {
                 .pa_end         = 0x4809c3ff,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* l4_per -> mmc1 */
@@ -3459,7 +3463,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__mmc1 = {
         .slave          = &omap44xx_mmc1_hwmod,
         .clk            = "l4_div_ck",
         .addr           = omap44xx_mmc1_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap44xx_mmc1_addrs),
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -3477,11 +3480,9 @@ static struct omap_hwmod omap44xx_mmc1_hwmod = {
         .name           = "mmc1",
         .class          = &omap44xx_mmc_hwmod_class,
         .mpu_irqs       = omap44xx_mmc1_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap44xx_mmc1_irqs),
         .sdma_reqs      = omap44xx_mmc1_sdma_reqs,
-        .sdma_reqs_cnt  = ARRAY_SIZE(omap44xx_mmc1_sdma_reqs),
         .main_clk       = "mmc1_fck",
-        .prcm           = {
+        .prcm = {
                 .omap4 = {
                         .clkctrl_reg = OMAP4430_CM_L3INIT_MMC1_CLKCTRL,
                 },
@@ -3497,11 +3498,13 @@ static struct omap_hwmod omap44xx_mmc1_hwmod = {
 /* mmc2 */
 static struct omap_hwmod_irq_info omap44xx_mmc2_irqs[] = {
         { .irq = 86 + OMAP44XX_IRQ_GIC_START },
+        { .irq = -1 }
 };
 
 static struct omap_hwmod_dma_info omap44xx_mmc2_sdma_reqs[] = {
         { .name = "tx", .dma_req = 46 + OMAP44XX_DMA_REQ_START },
         { .name = "rx", .dma_req = 47 + OMAP44XX_DMA_REQ_START },
+        { .dma_req = -1 }
 };
 
 /* mmc2 master ports */
@@ -3515,6 +3518,7 @@ static struct omap_hwmod_addr_space omap44xx_mmc2_addrs[] = {
                 .pa_end         = 0x480b43ff,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* l4_per -> mmc2 */
@@ -3523,7 +3527,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__mmc2 = {
         .slave          = &omap44xx_mmc2_hwmod,
         .clk            = "l4_div_ck",
         .addr           = omap44xx_mmc2_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap44xx_mmc2_addrs),
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -3536,11 +3539,9 @@ static struct omap_hwmod omap44xx_mmc2_hwmod = {
         .name           = "mmc2",
         .class          = &omap44xx_mmc_hwmod_class,
         .mpu_irqs       = omap44xx_mmc2_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap44xx_mmc2_irqs),
         .sdma_reqs      = omap44xx_mmc2_sdma_reqs,
-        .sdma_reqs_cnt  = ARRAY_SIZE(omap44xx_mmc2_sdma_reqs),
         .main_clk       = "mmc2_fck",
-        .prcm           = {
+        .prcm = {
                 .omap4 = {
                         .clkctrl_reg = OMAP4430_CM_L3INIT_MMC2_CLKCTRL,
                 },
@@ -3556,11 +3557,13 @@ static struct omap_hwmod omap44xx_mmc2_hwmod = {
 static struct omap_hwmod omap44xx_mmc3_hwmod;
 static struct omap_hwmod_irq_info omap44xx_mmc3_irqs[] = {
         { .irq = 94 + OMAP44XX_IRQ_GIC_START },
+        { .irq = -1 }
 };
 
 static struct omap_hwmod_dma_info omap44xx_mmc3_sdma_reqs[] = {
         { .name = "tx", .dma_req = 76 + OMAP44XX_DMA_REQ_START },
         { .name = "rx", .dma_req = 77 + OMAP44XX_DMA_REQ_START },
+        { .dma_req = -1 }
 };
 
 static struct omap_hwmod_addr_space omap44xx_mmc3_addrs[] = {
@@ -3569,6 +3572,7 @@ static struct omap_hwmod_addr_space omap44xx_mmc3_addrs[] = {
                 .pa_end         = 0x480ad3ff,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* l4_per -> mmc3 */
@@ -3577,7 +3581,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__mmc3 = {
         .slave          = &omap44xx_mmc3_hwmod,
         .clk            = "l4_div_ck",
         .addr           = omap44xx_mmc3_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap44xx_mmc3_addrs),
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -3590,11 +3593,9 @@ static struct omap_hwmod omap44xx_mmc3_hwmod = {
         .name           = "mmc3",
         .class          = &omap44xx_mmc_hwmod_class,
         .mpu_irqs       = omap44xx_mmc3_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap44xx_mmc3_irqs),
         .sdma_reqs      = omap44xx_mmc3_sdma_reqs,
-        .sdma_reqs_cnt  = ARRAY_SIZE(omap44xx_mmc3_sdma_reqs),
         .main_clk       = "mmc3_fck",
-        .prcm           = {
+        .prcm = {
                 .omap4 = {
                         .clkctrl_reg = OMAP4430_CM_L4PER_MMCSD3_CLKCTRL,
                 },
@@ -3608,11 +3609,13 @@ static struct omap_hwmod omap44xx_mmc3_hwmod = {
 static struct omap_hwmod omap44xx_mmc4_hwmod;
 static struct omap_hwmod_irq_info omap44xx_mmc4_irqs[] = {
         { .irq = 96 + OMAP44XX_IRQ_GIC_START },
+        { .irq = -1 }
 };
 
 static struct omap_hwmod_dma_info omap44xx_mmc4_sdma_reqs[] = {
         { .name = "tx", .dma_req = 56 + OMAP44XX_DMA_REQ_START },
         { .name = "rx", .dma_req = 57 + OMAP44XX_DMA_REQ_START },
+        { .dma_req = -1 }
 };
 
 static struct omap_hwmod_addr_space omap44xx_mmc4_addrs[] = {
@@ -3621,6 +3624,7 @@ static struct omap_hwmod_addr_space omap44xx_mmc4_addrs[] = {
                 .pa_end         = 0x480d13ff,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* l4_per -> mmc4 */
@@ -3629,7 +3633,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__mmc4 = {
         .slave          = &omap44xx_mmc4_hwmod,
         .clk            = "l4_div_ck",
         .addr           = omap44xx_mmc4_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap44xx_mmc4_addrs),
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -3642,11 +3645,10 @@ static struct omap_hwmod omap44xx_mmc4_hwmod = {
         .name           = "mmc4",
         .class          = &omap44xx_mmc_hwmod_class,
         .mpu_irqs       = omap44xx_mmc4_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap44xx_mmc4_irqs),
+
         .sdma_reqs      = omap44xx_mmc4_sdma_reqs,
-        .sdma_reqs_cnt  = ARRAY_SIZE(omap44xx_mmc4_sdma_reqs),
         .main_clk       = "mmc4_fck",
-        .prcm           = {
+        .prcm = {
                 .omap4 = {
                         .clkctrl_reg = OMAP4430_CM_L4PER_MMCSD4_CLKCTRL,
                 },
@@ -3660,11 +3662,13 @@ static struct omap_hwmod omap44xx_mmc4_hwmod = {
 static struct omap_hwmod omap44xx_mmc5_hwmod;
 static struct omap_hwmod_irq_info omap44xx_mmc5_irqs[] = {
         { .irq = 59 + OMAP44XX_IRQ_GIC_START },
+        { .irq = -1 }
 };
 
 static struct omap_hwmod_dma_info omap44xx_mmc5_sdma_reqs[] = {
         { .name = "tx", .dma_req = 58 + OMAP44XX_DMA_REQ_START },
         { .name = "rx", .dma_req = 59 + OMAP44XX_DMA_REQ_START },
+        { .dma_req = -1 }
 };
 
 static struct omap_hwmod_addr_space omap44xx_mmc5_addrs[] = {
@@ -3673,6 +3677,7 @@ static struct omap_hwmod_addr_space omap44xx_mmc5_addrs[] = {
                 .pa_end         = 0x480d53ff,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* l4_per -> mmc5 */
@@ -3681,7 +3686,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__mmc5 = {
         .slave          = &omap44xx_mmc5_hwmod,
         .clk            = "l4_div_ck",
         .addr           = omap44xx_mmc5_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap44xx_mmc5_addrs),
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -3694,11 +3698,9 @@ static struct omap_hwmod omap44xx_mmc5_hwmod = {
         .name           = "mmc5",
         .class          = &omap44xx_mmc_hwmod_class,
         .mpu_irqs       = omap44xx_mmc5_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap44xx_mmc5_irqs),
         .sdma_reqs      = omap44xx_mmc5_sdma_reqs,
-        .sdma_reqs_cnt  = ARRAY_SIZE(omap44xx_mmc5_sdma_reqs),
         .main_clk       = "mmc5_fck",
-        .prcm           = {
+        .prcm = {
                 .omap4 = {
                         .clkctrl_reg = OMAP4430_CM_L4PER_MMCSD5_CLKCTRL,
                 },
@@ -3722,6 +3724,7 @@ static struct omap_hwmod_irq_info omap44xx_mpu_irqs[] = {
         { .name = "pl310", .irq = 0 + OMAP44XX_IRQ_GIC_START },
         { .name = "cti0", .irq = 1 + OMAP44XX_IRQ_GIC_START },
         { .name = "cti1", .irq = 2 + OMAP44XX_IRQ_GIC_START },
+        { .irq = -1 }
 };
 
 /* mpu master ports */
@@ -3734,9 +3737,8 @@ static struct omap_hwmod_ocp_if *omap44xx_mpu_masters[] = {
 static struct omap_hwmod omap44xx_mpu_hwmod = {
         .name           = "mpu",
         .class          = &omap44xx_mpu_hwmod_class,
-        .flags          = (HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET),
+        .flags          = HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET,
         .mpu_irqs       = omap44xx_mpu_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap44xx_mpu_irqs),
         .main_clk       = "dpll_mpu_m2_ck",
         .prcm = {
                 .omap4 = {
@@ -3778,6 +3780,7 @@ static struct omap_hwmod_class omap44xx_smartreflex_hwmod_class = {
 static struct omap_hwmod omap44xx_smartreflex_core_hwmod;
 static struct omap_hwmod_irq_info omap44xx_smartreflex_core_irqs[] = {
         { .irq = 19 + OMAP44XX_IRQ_GIC_START },
+        { .irq = -1 }
 };
 
 static struct omap_hwmod_addr_space omap44xx_smartreflex_core_addrs[] = {
@@ -3786,6 +3789,7 @@ static struct omap_hwmod_addr_space omap44xx_smartreflex_core_addrs[] = {
                 .pa_end         = 0x4a0dd03f,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* l4_cfg -> smartreflex_core */
@@ -3794,7 +3798,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__smartreflex_core = {
         .slave          = &omap44xx_smartreflex_core_hwmod,
         .clk            = "l4_div_ck",
         .addr           = omap44xx_smartreflex_core_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap44xx_smartreflex_core_addrs),
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -3807,7 +3810,7 @@ static struct omap_hwmod omap44xx_smartreflex_core_hwmod = {
         .name           = "smartreflex_core",
         .class          = &omap44xx_smartreflex_hwmod_class,
         .mpu_irqs       = omap44xx_smartreflex_core_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap44xx_smartreflex_core_irqs),
+
         .main_clk       = "smartreflex_core_fck",
         .vdd_name       = "core",
         .prcm = {
@@ -3824,6 +3827,7 @@ static struct omap_hwmod omap44xx_smartreflex_core_hwmod = {
 static struct omap_hwmod omap44xx_smartreflex_iva_hwmod;
 static struct omap_hwmod_irq_info omap44xx_smartreflex_iva_irqs[] = {
         { .irq = 102 + OMAP44XX_IRQ_GIC_START },
+        { .irq = -1 }
 };
 
 static struct omap_hwmod_addr_space omap44xx_smartreflex_iva_addrs[] = {
@@ -3832,6 +3836,7 @@ static struct omap_hwmod_addr_space omap44xx_smartreflex_iva_addrs[] = {
                 .pa_end         = 0x4a0db03f,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* l4_cfg -> smartreflex_iva */
@@ -3840,7 +3845,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__smartreflex_iva = {
         .slave          = &omap44xx_smartreflex_iva_hwmod,
         .clk            = "l4_div_ck",
         .addr           = omap44xx_smartreflex_iva_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap44xx_smartreflex_iva_addrs),
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -3853,7 +3857,6 @@ static struct omap_hwmod omap44xx_smartreflex_iva_hwmod = {
         .name           = "smartreflex_iva",
         .class          = &omap44xx_smartreflex_hwmod_class,
         .mpu_irqs       = omap44xx_smartreflex_iva_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap44xx_smartreflex_iva_irqs),
         .main_clk       = "smartreflex_iva_fck",
         .vdd_name       = "iva",
         .prcm = {
@@ -3870,6 +3873,7 @@ static struct omap_hwmod omap44xx_smartreflex_iva_hwmod = {
 static struct omap_hwmod omap44xx_smartreflex_mpu_hwmod;
 static struct omap_hwmod_irq_info omap44xx_smartreflex_mpu_irqs[] = {
         { .irq = 18 + OMAP44XX_IRQ_GIC_START },
+        { .irq = -1 }
 };
 
 static struct omap_hwmod_addr_space omap44xx_smartreflex_mpu_addrs[] = {
@@ -3878,6 +3882,7 @@ static struct omap_hwmod_addr_space omap44xx_smartreflex_mpu_addrs[] = {
                 .pa_end         = 0x4a0d903f,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* l4_cfg -> smartreflex_mpu */
@@ -3886,7 +3891,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__smartreflex_mpu = {
         .slave          = &omap44xx_smartreflex_mpu_hwmod,
         .clk            = "l4_div_ck",
         .addr           = omap44xx_smartreflex_mpu_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap44xx_smartreflex_mpu_addrs),
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -3899,7 +3903,6 @@ static struct omap_hwmod omap44xx_smartreflex_mpu_hwmod = {
         .name           = "smartreflex_mpu",
         .class          = &omap44xx_smartreflex_hwmod_class,
         .mpu_irqs       = omap44xx_smartreflex_mpu_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap44xx_smartreflex_mpu_irqs),
         .main_clk       = "smartreflex_mpu_fck",
         .vdd_name       = "mpu",
         .prcm = {
@@ -3943,6 +3946,7 @@ static struct omap_hwmod_addr_space omap44xx_spinlock_addrs[] = {
                 .pa_end         = 0x4a0f6fff,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* l4_cfg -> spinlock */
@@ -3951,7 +3955,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__spinlock = {
         .slave          = &omap44xx_spinlock_hwmod,
         .clk            = "l4_div_ck",
         .addr           = omap44xx_spinlock_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap44xx_spinlock_addrs),
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -4015,6 +4018,7 @@ static struct omap_hwmod_class omap44xx_timer_hwmod_class = {
 static struct omap_hwmod omap44xx_timer1_hwmod;
 static struct omap_hwmod_irq_info omap44xx_timer1_irqs[] = {
         { .irq = 37 + OMAP44XX_IRQ_GIC_START },
+        { .irq = -1 }
 };
 
 static struct omap_hwmod_addr_space omap44xx_timer1_addrs[] = {
@@ -4023,6 +4027,7 @@ static struct omap_hwmod_addr_space omap44xx_timer1_addrs[] = {
                 .pa_end         = 0x4a31807f,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* l4_wkup -> timer1 */
@@ -4031,7 +4036,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_wkup__timer1 = {
         .slave          = &omap44xx_timer1_hwmod,
         .clk            = "l4_wkup_clk_mux_ck",
         .addr           = omap44xx_timer1_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap44xx_timer1_addrs),
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -4044,7 +4048,6 @@ static struct omap_hwmod omap44xx_timer1_hwmod = {
         .name           = "timer1",
         .class          = &omap44xx_timer_1ms_hwmod_class,
         .mpu_irqs       = omap44xx_timer1_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap44xx_timer1_irqs),
         .main_clk       = "timer1_fck",
         .prcm = {
                 .omap4 = {
@@ -4060,6 +4063,7 @@ static struct omap_hwmod omap44xx_timer1_hwmod = {
 static struct omap_hwmod omap44xx_timer2_hwmod;
 static struct omap_hwmod_irq_info omap44xx_timer2_irqs[] = {
         { .irq = 38 + OMAP44XX_IRQ_GIC_START },
+        { .irq = -1 }
 };
 
 static struct omap_hwmod_addr_space omap44xx_timer2_addrs[] = {
@@ -4068,6 +4072,7 @@ static struct omap_hwmod_addr_space omap44xx_timer2_addrs[] = {
                 .pa_end         = 0x4803207f,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* l4_per -> timer2 */
@@ -4076,7 +4081,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__timer2 = {
         .slave          = &omap44xx_timer2_hwmod,
         .clk            = "l4_div_ck",
         .addr           = omap44xx_timer2_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap44xx_timer2_addrs),
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -4089,7 +4093,6 @@ static struct omap_hwmod omap44xx_timer2_hwmod = {
         .name           = "timer2",
         .class          = &omap44xx_timer_1ms_hwmod_class,
         .mpu_irqs       = omap44xx_timer2_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap44xx_timer2_irqs),
         .main_clk       = "timer2_fck",
         .prcm = {
                 .omap4 = {
@@ -4105,6 +4108,7 @@ static struct omap_hwmod omap44xx_timer2_hwmod = {
 static struct omap_hwmod omap44xx_timer3_hwmod;
 static struct omap_hwmod_irq_info omap44xx_timer3_irqs[] = {
         { .irq = 39 + OMAP44XX_IRQ_GIC_START },
+        { .irq = -1 }
 };
 
 static struct omap_hwmod_addr_space omap44xx_timer3_addrs[] = {
@@ -4113,6 +4117,7 @@ static struct omap_hwmod_addr_space omap44xx_timer3_addrs[] = {
                 .pa_end         = 0x4803407f,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* l4_per -> timer3 */
@@ -4121,7 +4126,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__timer3 = {
         .slave          = &omap44xx_timer3_hwmod,
         .clk            = "l4_div_ck",
         .addr           = omap44xx_timer3_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap44xx_timer3_addrs),
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -4134,7 +4138,6 @@ static struct omap_hwmod omap44xx_timer3_hwmod = {
         .name           = "timer3",
         .class          = &omap44xx_timer_hwmod_class,
         .mpu_irqs       = omap44xx_timer3_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap44xx_timer3_irqs),
         .main_clk       = "timer3_fck",
         .prcm = {
                 .omap4 = {
@@ -4150,6 +4153,7 @@ static struct omap_hwmod omap44xx_timer3_hwmod = {
 static struct omap_hwmod omap44xx_timer4_hwmod;
 static struct omap_hwmod_irq_info omap44xx_timer4_irqs[] = {
         { .irq = 40 + OMAP44XX_IRQ_GIC_START },
+        { .irq = -1 }
 };
 
 static struct omap_hwmod_addr_space omap44xx_timer4_addrs[] = {
@@ -4158,6 +4162,7 @@ static struct omap_hwmod_addr_space omap44xx_timer4_addrs[] = {
                 .pa_end         = 0x4803607f,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* l4_per -> timer4 */
@@ -4166,7 +4171,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__timer4 = {
         .slave          = &omap44xx_timer4_hwmod,
         .clk            = "l4_div_ck",
         .addr           = omap44xx_timer4_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap44xx_timer4_addrs),
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -4179,7 +4183,6 @@ static struct omap_hwmod omap44xx_timer4_hwmod = {
         .name           = "timer4",
         .class          = &omap44xx_timer_hwmod_class,
         .mpu_irqs       = omap44xx_timer4_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap44xx_timer4_irqs),
         .main_clk       = "timer4_fck",
         .prcm = {
                 .omap4 = {
@@ -4195,6 +4198,7 @@ static struct omap_hwmod omap44xx_timer4_hwmod = {
 static struct omap_hwmod omap44xx_timer5_hwmod;
 static struct omap_hwmod_irq_info omap44xx_timer5_irqs[] = {
         { .irq = 41 + OMAP44XX_IRQ_GIC_START },
+        { .irq = -1 }
 };
 
 static struct omap_hwmod_addr_space omap44xx_timer5_addrs[] = {
@@ -4203,6 +4207,7 @@ static struct omap_hwmod_addr_space omap44xx_timer5_addrs[] = {
                 .pa_end         = 0x4013807f,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* l4_abe -> timer5 */
@@ -4211,7 +4216,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer5 = {
         .slave          = &omap44xx_timer5_hwmod,
         .clk            = "ocp_abe_iclk",
         .addr           = omap44xx_timer5_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap44xx_timer5_addrs),
         .user           = OCP_USER_MPU,
 };
 
@@ -4221,6 +4225,7 @@ static struct omap_hwmod_addr_space omap44xx_timer5_dma_addrs[] = {
                 .pa_end         = 0x4903807f,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* l4_abe -> timer5 (dma) */
@@ -4229,7 +4234,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer5_dma = {
         .slave          = &omap44xx_timer5_hwmod,
         .clk            = "ocp_abe_iclk",
         .addr           = omap44xx_timer5_dma_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap44xx_timer5_dma_addrs),
         .user           = OCP_USER_SDMA,
 };
 
@@ -4243,7 +4247,6 @@ static struct omap_hwmod omap44xx_timer5_hwmod = {
         .name           = "timer5",
         .class          = &omap44xx_timer_hwmod_class,
         .mpu_irqs       = omap44xx_timer5_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap44xx_timer5_irqs),
         .main_clk       = "timer5_fck",
         .prcm = {
                 .omap4 = {
@@ -4259,6 +4262,7 @@ static struct omap_hwmod omap44xx_timer5_hwmod = {
 static struct omap_hwmod omap44xx_timer6_hwmod;
 static struct omap_hwmod_irq_info omap44xx_timer6_irqs[] = {
         { .irq = 42 + OMAP44XX_IRQ_GIC_START },
+        { .irq = -1 }
 };
 
 static struct omap_hwmod_addr_space omap44xx_timer6_addrs[] = {
@@ -4267,6 +4271,7 @@ static struct omap_hwmod_addr_space omap44xx_timer6_addrs[] = {
                 .pa_end         = 0x4013a07f,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* l4_abe -> timer6 */
@@ -4275,7 +4280,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer6 = {
         .slave          = &omap44xx_timer6_hwmod,
         .clk            = "ocp_abe_iclk",
         .addr           = omap44xx_timer6_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap44xx_timer6_addrs),
         .user           = OCP_USER_MPU,
 };
 
@@ -4285,6 +4289,7 @@ static struct omap_hwmod_addr_space omap44xx_timer6_dma_addrs[] = {
                 .pa_end         = 0x4903a07f,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* l4_abe -> timer6 (dma) */
@@ -4293,7 +4298,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer6_dma = {
         .slave          = &omap44xx_timer6_hwmod,
         .clk            = "ocp_abe_iclk",
         .addr           = omap44xx_timer6_dma_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap44xx_timer6_dma_addrs),
         .user           = OCP_USER_SDMA,
 };
 
@@ -4307,7 +4311,7 @@ static struct omap_hwmod omap44xx_timer6_hwmod = {
         .name           = "timer6",
         .class          = &omap44xx_timer_hwmod_class,
         .mpu_irqs       = omap44xx_timer6_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap44xx_timer6_irqs),
+
         .main_clk       = "timer6_fck",
         .prcm = {
                 .omap4 = {
@@ -4323,6 +4327,7 @@ static struct omap_hwmod omap44xx_timer6_hwmod = {
 static struct omap_hwmod omap44xx_timer7_hwmod;
 static struct omap_hwmod_irq_info omap44xx_timer7_irqs[] = {
         { .irq = 43 + OMAP44XX_IRQ_GIC_START },
+        { .irq = -1 }
 };
 
 static struct omap_hwmod_addr_space omap44xx_timer7_addrs[] = {
@@ -4331,6 +4336,7 @@ static struct omap_hwmod_addr_space omap44xx_timer7_addrs[] = {
                 .pa_end         = 0x4013c07f,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* l4_abe -> timer7 */
@@ -4339,7 +4345,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer7 = {
         .slave          = &omap44xx_timer7_hwmod,
         .clk            = "ocp_abe_iclk",
         .addr           = omap44xx_timer7_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap44xx_timer7_addrs),
         .user           = OCP_USER_MPU,
 };
 
@@ -4349,6 +4354,7 @@ static struct omap_hwmod_addr_space omap44xx_timer7_dma_addrs[] = {
                 .pa_end         = 0x4903c07f,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* l4_abe -> timer7 (dma) */
@@ -4357,7 +4363,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer7_dma = {
         .slave          = &omap44xx_timer7_hwmod,
         .clk            = "ocp_abe_iclk",
         .addr           = omap44xx_timer7_dma_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap44xx_timer7_dma_addrs),
         .user           = OCP_USER_SDMA,
 };
 
@@ -4371,7 +4376,6 @@ static struct omap_hwmod omap44xx_timer7_hwmod = {
         .name           = "timer7",
         .class          = &omap44xx_timer_hwmod_class,
         .mpu_irqs       = omap44xx_timer7_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap44xx_timer7_irqs),
         .main_clk       = "timer7_fck",
         .prcm = {
                 .omap4 = {
@@ -4387,6 +4391,7 @@ static struct omap_hwmod omap44xx_timer7_hwmod = {
 static struct omap_hwmod omap44xx_timer8_hwmod;
 static struct omap_hwmod_irq_info omap44xx_timer8_irqs[] = {
         { .irq = 44 + OMAP44XX_IRQ_GIC_START },
+        { .irq = -1 }
 };
 
 static struct omap_hwmod_addr_space omap44xx_timer8_addrs[] = {
@@ -4395,6 +4400,7 @@ static struct omap_hwmod_addr_space omap44xx_timer8_addrs[] = {
                 .pa_end         = 0x4013e07f,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* l4_abe -> timer8 */
@@ -4403,7 +4409,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer8 = {
         .slave          = &omap44xx_timer8_hwmod,
         .clk            = "ocp_abe_iclk",
         .addr           = omap44xx_timer8_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap44xx_timer8_addrs),
         .user           = OCP_USER_MPU,
 };
 
@@ -4413,6 +4418,7 @@ static struct omap_hwmod_addr_space omap44xx_timer8_dma_addrs[] = {
                 .pa_end         = 0x4903e07f,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* l4_abe -> timer8 (dma) */
@@ -4421,7 +4427,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer8_dma = {
         .slave          = &omap44xx_timer8_hwmod,
         .clk            = "ocp_abe_iclk",
         .addr           = omap44xx_timer8_dma_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap44xx_timer8_dma_addrs),
         .user           = OCP_USER_SDMA,
 };
 
@@ -4435,7 +4440,6 @@ static struct omap_hwmod omap44xx_timer8_hwmod = {
         .name           = "timer8",
         .class          = &omap44xx_timer_hwmod_class,
         .mpu_irqs       = omap44xx_timer8_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap44xx_timer8_irqs),
         .main_clk       = "timer8_fck",
         .prcm = {
                 .omap4 = {
@@ -4451,6 +4455,7 @@ static struct omap_hwmod omap44xx_timer8_hwmod = {
 static struct omap_hwmod omap44xx_timer9_hwmod;
 static struct omap_hwmod_irq_info omap44xx_timer9_irqs[] = {
         { .irq = 45 + OMAP44XX_IRQ_GIC_START },
+        { .irq = -1 }
 };
 
 static struct omap_hwmod_addr_space omap44xx_timer9_addrs[] = {
@@ -4459,6 +4464,7 @@ static struct omap_hwmod_addr_space omap44xx_timer9_addrs[] = {
                 .pa_end         = 0x4803e07f,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* l4_per -> timer9 */
@@ -4467,7 +4473,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__timer9 = {
         .slave          = &omap44xx_timer9_hwmod,
         .clk            = "l4_div_ck",
         .addr           = omap44xx_timer9_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap44xx_timer9_addrs),
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -4480,7 +4485,6 @@ static struct omap_hwmod omap44xx_timer9_hwmod = {
         .name           = "timer9",
         .class          = &omap44xx_timer_hwmod_class,
         .mpu_irqs       = omap44xx_timer9_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap44xx_timer9_irqs),
         .main_clk       = "timer9_fck",
         .prcm = {
                 .omap4 = {
@@ -4496,6 +4500,7 @@ static struct omap_hwmod omap44xx_timer9_hwmod = {
 static struct omap_hwmod omap44xx_timer10_hwmod;
 static struct omap_hwmod_irq_info omap44xx_timer10_irqs[] = {
         { .irq = 46 + OMAP44XX_IRQ_GIC_START },
+        { .irq = -1 }
 };
 
 static struct omap_hwmod_addr_space omap44xx_timer10_addrs[] = {
@@ -4504,6 +4509,7 @@ static struct omap_hwmod_addr_space omap44xx_timer10_addrs[] = {
                 .pa_end         = 0x4808607f,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* l4_per -> timer10 */
@@ -4512,7 +4518,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__timer10 = {
         .slave          = &omap44xx_timer10_hwmod,
         .clk            = "l4_div_ck",
         .addr           = omap44xx_timer10_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap44xx_timer10_addrs),
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -4525,7 +4530,6 @@ static struct omap_hwmod omap44xx_timer10_hwmod = {
         .name           = "timer10",
         .class          = &omap44xx_timer_1ms_hwmod_class,
         .mpu_irqs       = omap44xx_timer10_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap44xx_timer10_irqs),
         .main_clk       = "timer10_fck",
         .prcm = {
                 .omap4 = {
@@ -4541,6 +4545,7 @@ static struct omap_hwmod omap44xx_timer10_hwmod = {
 static struct omap_hwmod omap44xx_timer11_hwmod;
 static struct omap_hwmod_irq_info omap44xx_timer11_irqs[] = {
         { .irq = 47 + OMAP44XX_IRQ_GIC_START },
+        { .irq = -1 }
 };
 
 static struct omap_hwmod_addr_space omap44xx_timer11_addrs[] = {
@@ -4549,6 +4554,7 @@ static struct omap_hwmod_addr_space omap44xx_timer11_addrs[] = {
                 .pa_end         = 0x4808807f,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* l4_per -> timer11 */
@@ -4557,7 +4563,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__timer11 = {
         .slave          = &omap44xx_timer11_hwmod,
         .clk            = "l4_div_ck",
         .addr           = omap44xx_timer11_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap44xx_timer11_addrs),
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -4570,7 +4575,6 @@ static struct omap_hwmod omap44xx_timer11_hwmod = {
         .name           = "timer11",
         .class          = &omap44xx_timer_hwmod_class,
         .mpu_irqs       = omap44xx_timer11_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap44xx_timer11_irqs),
         .main_clk       = "timer11_fck",
         .prcm = {
                 .omap4 = {
@@ -4608,11 +4612,13 @@ static struct omap_hwmod_class omap44xx_uart_hwmod_class = {
 static struct omap_hwmod omap44xx_uart1_hwmod;
 static struct omap_hwmod_irq_info omap44xx_uart1_irqs[] = {
         { .irq = 72 + OMAP44XX_IRQ_GIC_START },
+        { .irq = -1 }
 };
 
 static struct omap_hwmod_dma_info omap44xx_uart1_sdma_reqs[] = {
         { .name = "tx", .dma_req = 48 + OMAP44XX_DMA_REQ_START },
         { .name = "rx", .dma_req = 49 + OMAP44XX_DMA_REQ_START },
+        { .dma_req = -1 }
 };
 
 static struct omap_hwmod_addr_space omap44xx_uart1_addrs[] = {
@@ -4621,6 +4627,7 @@ static struct omap_hwmod_addr_space omap44xx_uart1_addrs[] = {
                 .pa_end         = 0x4806a0ff,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* l4_per -> uart1 */
@@ -4629,7 +4636,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__uart1 = {
         .slave          = &omap44xx_uart1_hwmod,
         .clk            = "l4_div_ck",
         .addr           = omap44xx_uart1_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap44xx_uart1_addrs),
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -4642,9 +4648,7 @@ static struct omap_hwmod omap44xx_uart1_hwmod = {
         .name           = "uart1",
         .class          = &omap44xx_uart_hwmod_class,
         .mpu_irqs       = omap44xx_uart1_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap44xx_uart1_irqs),
         .sdma_reqs      = omap44xx_uart1_sdma_reqs,
-        .sdma_reqs_cnt  = ARRAY_SIZE(omap44xx_uart1_sdma_reqs),
         .main_clk       = "uart1_fck",
         .prcm = {
                 .omap4 = {
@@ -4660,11 +4664,13 @@ static struct omap_hwmod omap44xx_uart1_hwmod = {
 static struct omap_hwmod omap44xx_uart2_hwmod;
 static struct omap_hwmod_irq_info omap44xx_uart2_irqs[] = {
         { .irq = 73 + OMAP44XX_IRQ_GIC_START },
+        { .irq = -1 }
 };
 
 static struct omap_hwmod_dma_info omap44xx_uart2_sdma_reqs[] = {
         { .name = "tx", .dma_req = 50 + OMAP44XX_DMA_REQ_START },
         { .name = "rx", .dma_req = 51 + OMAP44XX_DMA_REQ_START },
+        { .dma_req = -1 }
 };
 
 static struct omap_hwmod_addr_space omap44xx_uart2_addrs[] = {
@@ -4673,6 +4679,7 @@ static struct omap_hwmod_addr_space omap44xx_uart2_addrs[] = {
                 .pa_end         = 0x4806c0ff,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* l4_per -> uart2 */
@@ -4681,7 +4688,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__uart2 = {
         .slave          = &omap44xx_uart2_hwmod,
         .clk            = "l4_div_ck",
         .addr           = omap44xx_uart2_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap44xx_uart2_addrs),
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -4694,9 +4700,7 @@ static struct omap_hwmod omap44xx_uart2_hwmod = {
         .name           = "uart2",
         .class          = &omap44xx_uart_hwmod_class,
         .mpu_irqs       = omap44xx_uart2_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap44xx_uart2_irqs),
         .sdma_reqs      = omap44xx_uart2_sdma_reqs,
-        .sdma_reqs_cnt  = ARRAY_SIZE(omap44xx_uart2_sdma_reqs),
         .main_clk       = "uart2_fck",
         .prcm = {
                 .omap4 = {
@@ -4712,11 +4716,13 @@ static struct omap_hwmod omap44xx_uart2_hwmod = {
 static struct omap_hwmod omap44xx_uart3_hwmod;
 static struct omap_hwmod_irq_info omap44xx_uart3_irqs[] = {
         { .irq = 74 + OMAP44XX_IRQ_GIC_START },
+        { .irq = -1 }
 };
 
 static struct omap_hwmod_dma_info omap44xx_uart3_sdma_reqs[] = {
         { .name = "tx", .dma_req = 52 + OMAP44XX_DMA_REQ_START },
         { .name = "rx", .dma_req = 53 + OMAP44XX_DMA_REQ_START },
+        { .dma_req = -1 }
 };
 
 static struct omap_hwmod_addr_space omap44xx_uart3_addrs[] = {
@@ -4725,6 +4731,7 @@ static struct omap_hwmod_addr_space omap44xx_uart3_addrs[] = {
                 .pa_end         = 0x480200ff,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* l4_per -> uart3 */
@@ -4733,7 +4740,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__uart3 = {
         .slave          = &omap44xx_uart3_hwmod,
         .clk            = "l4_div_ck",
         .addr           = omap44xx_uart3_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap44xx_uart3_addrs),
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -4745,11 +4751,9 @@ static struct omap_hwmod_ocp_if *omap44xx_uart3_slaves[] = {
 static struct omap_hwmod omap44xx_uart3_hwmod = {
         .name           = "uart3",
         .class          = &omap44xx_uart_hwmod_class,
-        .flags          = (HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET),
+        .flags          = HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET,
         .mpu_irqs       = omap44xx_uart3_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap44xx_uart3_irqs),
         .sdma_reqs      = omap44xx_uart3_sdma_reqs,
-        .sdma_reqs_cnt  = ARRAY_SIZE(omap44xx_uart3_sdma_reqs),
         .main_clk       = "uart3_fck",
         .prcm = {
                 .omap4 = {
@@ -4765,11 +4769,13 @@ static struct omap_hwmod omap44xx_uart3_hwmod = {
 static struct omap_hwmod omap44xx_uart4_hwmod;
 static struct omap_hwmod_irq_info omap44xx_uart4_irqs[] = {
         { .irq = 70 + OMAP44XX_IRQ_GIC_START },
+        { .irq = -1 }
 };
 
 static struct omap_hwmod_dma_info omap44xx_uart4_sdma_reqs[] = {
         { .name = "tx", .dma_req = 54 + OMAP44XX_DMA_REQ_START },
         { .name = "rx", .dma_req = 55 + OMAP44XX_DMA_REQ_START },
+        { .dma_req = -1 }
 };
 
 static struct omap_hwmod_addr_space omap44xx_uart4_addrs[] = {
@@ -4778,6 +4784,7 @@ static struct omap_hwmod_addr_space omap44xx_uart4_addrs[] = {
                 .pa_end         = 0x4806e0ff,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* l4_per -> uart4 */
@@ -4786,7 +4793,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__uart4 = {
         .slave          = &omap44xx_uart4_hwmod,
         .clk            = "l4_div_ck",
         .addr           = omap44xx_uart4_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap44xx_uart4_addrs),
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -4799,9 +4805,7 @@ static struct omap_hwmod omap44xx_uart4_hwmod = {
         .name           = "uart4",
         .class          = &omap44xx_uart_hwmod_class,
         .mpu_irqs       = omap44xx_uart4_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap44xx_uart4_irqs),
         .sdma_reqs      = omap44xx_uart4_sdma_reqs,
-        .sdma_reqs_cnt  = ARRAY_SIZE(omap44xx_uart4_sdma_reqs),
         .main_clk       = "uart4_fck",
         .prcm = {
                 .omap4 = {
@@ -4832,14 +4836,15 @@ static struct omap_hwmod_class_sysconfig omap44xx_usb_otg_hs_sysc = {
 };
 
 static struct omap_hwmod_class omap44xx_usb_otg_hs_hwmod_class = {
-        .name = "usb_otg_hs",
-        .sysc = &omap44xx_usb_otg_hs_sysc,
+        .name   = "usb_otg_hs",
+        .sysc   = &omap44xx_usb_otg_hs_sysc,
 };
 
 /* usb_otg_hs */
 static struct omap_hwmod_irq_info omap44xx_usb_otg_hs_irqs[] = {
         { .name = "mc", .irq = 92 + OMAP44XX_IRQ_GIC_START },
         { .name = "dma", .irq = 93 + OMAP44XX_IRQ_GIC_START },
+        { .irq = -1 }
 };
 
 /* usb_otg_hs master ports */
@@ -4853,6 +4858,7 @@ static struct omap_hwmod_addr_space omap44xx_usb_otg_hs_addrs[] = {
                 .pa_end         = 0x4a0ab003,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* l4_cfg -> usb_otg_hs */
@@ -4861,7 +4867,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__usb_otg_hs = {
         .slave          = &omap44xx_usb_otg_hs_hwmod,
         .clk            = "l4_div_ck",
         .addr           = omap44xx_usb_otg_hs_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap44xx_usb_otg_hs_addrs),
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -4879,7 +4884,6 @@ static struct omap_hwmod omap44xx_usb_otg_hs_hwmod = {
         .class          = &omap44xx_usb_otg_hs_hwmod_class,
         .flags          = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY,
         .mpu_irqs       = omap44xx_usb_otg_hs_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap44xx_usb_otg_hs_irqs),
         .main_clk       = "usb_otg_hs_ick",
         .prcm = {
                 .omap4 = {
@@ -4887,7 +4891,7 @@ static struct omap_hwmod omap44xx_usb_otg_hs_hwmod = {
                 },
         },
         .opt_clks       = usb_otg_hs_opt_clks,
-        .opt_clks_cnt = ARRAY_SIZE(usb_otg_hs_opt_clks),
+        .opt_clks_cnt   = ARRAY_SIZE(usb_otg_hs_opt_clks),
         .slaves         = omap44xx_usb_otg_hs_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap44xx_usb_otg_hs_slaves),
         .masters        = omap44xx_usb_otg_hs_masters,
@@ -4922,6 +4926,7 @@ static struct omap_hwmod_class omap44xx_wd_timer_hwmod_class = {
 static struct omap_hwmod omap44xx_wd_timer2_hwmod;
 static struct omap_hwmod_irq_info omap44xx_wd_timer2_irqs[] = {
         { .irq = 80 + OMAP44XX_IRQ_GIC_START },
+        { .irq = -1 }
 };
 
 static struct omap_hwmod_addr_space omap44xx_wd_timer2_addrs[] = {
@@ -4930,6 +4935,7 @@ static struct omap_hwmod_addr_space omap44xx_wd_timer2_addrs[] = {
                 .pa_end         = 0x4a31407f,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* l4_wkup -> wd_timer2 */
@@ -4938,7 +4944,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_wkup__wd_timer2 = {
         .slave          = &omap44xx_wd_timer2_hwmod,
         .clk            = "l4_wkup_clk_mux_ck",
         .addr           = omap44xx_wd_timer2_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap44xx_wd_timer2_addrs),
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
@@ -4951,7 +4956,6 @@ static struct omap_hwmod omap44xx_wd_timer2_hwmod = {
         .name           = "wd_timer2",
         .class          = &omap44xx_wd_timer_hwmod_class,
         .mpu_irqs       = omap44xx_wd_timer2_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap44xx_wd_timer2_irqs),
         .main_clk       = "wd_timer2_fck",
         .prcm = {
                 .omap4 = {
@@ -4967,6 +4971,7 @@ static struct omap_hwmod omap44xx_wd_timer2_hwmod = {
 static struct omap_hwmod omap44xx_wd_timer3_hwmod;
 static struct omap_hwmod_irq_info omap44xx_wd_timer3_irqs[] = {
         { .irq = 36 + OMAP44XX_IRQ_GIC_START },
+        { .irq = -1 }
 };
 
 static struct omap_hwmod_addr_space omap44xx_wd_timer3_addrs[] = {
@@ -4975,6 +4980,7 @@ static struct omap_hwmod_addr_space omap44xx_wd_timer3_addrs[] = {
                 .pa_end         = 0x4013007f,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* l4_abe -> wd_timer3 */
@@ -4983,7 +4989,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__wd_timer3 = {
         .slave          = &omap44xx_wd_timer3_hwmod,
         .clk            = "ocp_abe_iclk",
         .addr           = omap44xx_wd_timer3_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap44xx_wd_timer3_addrs),
         .user           = OCP_USER_MPU,
 };
 
@@ -4993,6 +4998,7 @@ static struct omap_hwmod_addr_space omap44xx_wd_timer3_dma_addrs[] = {
                 .pa_end         = 0x4903007f,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /* l4_abe -> wd_timer3 (dma) */
@@ -5001,7 +5007,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__wd_timer3_dma = {
         .slave          = &omap44xx_wd_timer3_hwmod,
         .clk            = "ocp_abe_iclk",
         .addr           = omap44xx_wd_timer3_dma_addrs,
-        .addr_cnt       = ARRAY_SIZE(omap44xx_wd_timer3_dma_addrs),
         .user           = OCP_USER_SDMA,
 };
 
@@ -5015,7 +5020,6 @@ static struct omap_hwmod omap44xx_wd_timer3_hwmod = {
         .name           = "wd_timer3",
         .class          = &omap44xx_wd_timer_hwmod_class,
         .mpu_irqs       = omap44xx_wd_timer3_irqs,
-        .mpu_irqs_cnt   = ARRAY_SIZE(omap44xx_wd_timer3_irqs),
         .main_clk       = "wd_timer3_fck",
         .prcm = {
                 .omap4 = {
diff --git a/arch/arm/mach-omap2/omap_hwmod_common_data.c b/arch/arm/mach-omap2/omap_hwmod_common_data.c
index 08a134243ecb..de832ebc93a9 100644
--- a/arch/arm/mach-omap2/omap_hwmod_common_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_common_data.c
@@ -49,23 +49,3 @@ struct omap_hwmod_sysc_fields omap_hwmod_sysc_type2 = {
         .srst_shift     = SYSC_TYPE2_SOFTRESET_SHIFT,
 };
 
-
-/*
- * omap_hwmod class data
- */
-
-struct omap_hwmod_class l3_hwmod_class = {
-        .name = "l3"
-};
-
-struct omap_hwmod_class l4_hwmod_class = {
-        .name = "l4"
-};
-
-struct omap_hwmod_class mpu_hwmod_class = {
-        .name = "mpu"
-};
-
-struct omap_hwmod_class iva_hwmod_class = {
-        .name = "iva"
-};
diff --git a/arch/arm/mach-omap2/omap_hwmod_common_data.h b/arch/arm/mach-omap2/omap_hwmod_common_data.h
index c34e98bf1242..39a7c37f4587 100644
--- a/arch/arm/mach-omap2/omap_hwmod_common_data.h
+++ b/arch/arm/mach-omap2/omap_hwmod_common_data.h
@@ -1,10 +1,10 @@
 /*
  * omap_hwmod_common_data.h - OMAP hwmod common macros and declarations
  *
- * Copyright (C) 2010 Nokia Corporation
+ * Copyright (C) 2010-2011 Nokia Corporation
  * Paul Walmsley
  *
- * Copyright (C) 2010 Texas Instruments, Inc.
+ * Copyright (C) 2010-2011 Texas Instruments, Inc.
  * Benoît Cousson
  *
  * This program is free software; you can redistribute it and/or modify
@@ -16,10 +16,99 @@
 
 #include <plat/omap_hwmod.h>
 
+/* Common address space across OMAP2xxx */
+extern struct omap_hwmod_addr_space omap2xxx_uart1_addr_space[];
+extern struct omap_hwmod_addr_space omap2xxx_uart2_addr_space[];
+extern struct omap_hwmod_addr_space omap2xxx_uart3_addr_space[];
+extern struct omap_hwmod_addr_space omap2xxx_timer2_addrs[];
+extern struct omap_hwmod_addr_space omap2xxx_timer3_addrs[];
+extern struct omap_hwmod_addr_space omap2xxx_timer4_addrs[];
+extern struct omap_hwmod_addr_space omap2xxx_timer5_addrs[];
+extern struct omap_hwmod_addr_space omap2xxx_timer6_addrs[];
+extern struct omap_hwmod_addr_space omap2xxx_timer7_addrs[];
+extern struct omap_hwmod_addr_space omap2xxx_timer8_addrs[];
+extern struct omap_hwmod_addr_space omap2xxx_timer9_addrs[];
+extern struct omap_hwmod_addr_space omap2xxx_timer12_addrs[];
+extern struct omap_hwmod_addr_space omap2xxx_mcbsp2_addrs[];
+
+/* Common address space across OMAP2xxx/3xxx */
+extern struct omap_hwmod_addr_space omap2_i2c1_addr_space[];
+extern struct omap_hwmod_addr_space omap2_i2c2_addr_space[];
+extern struct omap_hwmod_addr_space omap2_dss_addrs[];
+extern struct omap_hwmod_addr_space omap2_dss_dispc_addrs[];
+extern struct omap_hwmod_addr_space omap2_dss_rfbi_addrs[];
+extern struct omap_hwmod_addr_space omap2_dss_venc_addrs[];
+extern struct omap_hwmod_addr_space omap2_timer10_addrs[];
+extern struct omap_hwmod_addr_space omap2_timer11_addrs[];
+extern struct omap_hwmod_addr_space omap2430_mmc1_addr_space[];
+extern struct omap_hwmod_addr_space omap2430_mmc2_addr_space[];
+extern struct omap_hwmod_addr_space omap2_mcspi1_addr_space[];
+extern struct omap_hwmod_addr_space omap2_mcspi2_addr_space[];
+extern struct omap_hwmod_addr_space omap2430_mcspi3_addr_space[];
+extern struct omap_hwmod_addr_space omap2_dma_system_addrs[];
+extern struct omap_hwmod_addr_space omap2_mailbox_addrs[];
+extern struct omap_hwmod_addr_space omap2_mcbsp1_addrs[];
+
+/* Common IP block data across OMAP2xxx */
+extern struct omap_hwmod_irq_info omap2xxx_timer12_mpu_irqs[];
+extern struct omap_hwmod_dma_info omap2xxx_dss_sdma_chs[];
+
+/* Common IP block data */
+extern struct omap_hwmod_dma_info omap2_uart1_sdma_reqs[];
+extern struct omap_hwmod_dma_info omap2_uart2_sdma_reqs[];
+extern struct omap_hwmod_dma_info omap2_uart3_sdma_reqs[];
+extern struct omap_hwmod_dma_info omap2_i2c1_sdma_reqs[];
+extern struct omap_hwmod_dma_info omap2_i2c2_sdma_reqs[];
+extern struct omap_hwmod_dma_info omap2_mcspi1_sdma_reqs[];
+extern struct omap_hwmod_dma_info omap2_mcspi2_sdma_reqs[];
+extern struct omap_hwmod_dma_info omap2_mcbsp1_sdma_reqs[];
+extern struct omap_hwmod_dma_info omap2_mcbsp2_sdma_reqs[];
+
+/* Common IP block data on OMAP2430/OMAP3 */
+extern struct omap_hwmod_dma_info omap2_mcbsp3_sdma_reqs[];
+
+/* Common IP block data across OMAP2/3 */
+extern struct omap_hwmod_irq_info omap2_timer1_mpu_irqs[];
+extern struct omap_hwmod_irq_info omap2_timer2_mpu_irqs[];
+extern struct omap_hwmod_irq_info omap2_timer3_mpu_irqs[];
+extern struct omap_hwmod_irq_info omap2_timer4_mpu_irqs[];
+extern struct omap_hwmod_irq_info omap2_timer5_mpu_irqs[];
+extern struct omap_hwmod_irq_info omap2_timer6_mpu_irqs[];
+extern struct omap_hwmod_irq_info omap2_timer7_mpu_irqs[];
+extern struct omap_hwmod_irq_info omap2_timer8_mpu_irqs[];
+extern struct omap_hwmod_irq_info omap2_timer9_mpu_irqs[];
+extern struct omap_hwmod_irq_info omap2_timer10_mpu_irqs[];
+extern struct omap_hwmod_irq_info omap2_timer11_mpu_irqs[];
+extern struct omap_hwmod_irq_info omap2_uart1_mpu_irqs[];
+extern struct omap_hwmod_irq_info omap2_uart2_mpu_irqs[];
+extern struct omap_hwmod_irq_info omap2_uart3_mpu_irqs[];
+extern struct omap_hwmod_irq_info omap2_dispc_irqs[];
+extern struct omap_hwmod_irq_info omap2_i2c1_mpu_irqs[];
+extern struct omap_hwmod_irq_info omap2_i2c2_mpu_irqs[];
+extern struct omap_hwmod_irq_info omap2_gpio1_irqs[];
+extern struct omap_hwmod_irq_info omap2_gpio2_irqs[];
+extern struct omap_hwmod_irq_info omap2_gpio3_irqs[];
+extern struct omap_hwmod_irq_info omap2_gpio4_irqs[];
+extern struct omap_hwmod_irq_info omap2_dma_system_irqs[];
+extern struct omap_hwmod_irq_info omap2_mcspi1_mpu_irqs[];
+extern struct omap_hwmod_irq_info omap2_mcspi2_mpu_irqs[];
+
 /* OMAP hwmod classes - forward declarations */
 extern struct omap_hwmod_class l3_hwmod_class;
 extern struct omap_hwmod_class l4_hwmod_class;
 extern struct omap_hwmod_class mpu_hwmod_class;
 extern struct omap_hwmod_class iva_hwmod_class;
+extern struct omap_hwmod_class omap2_uart_class;
+extern struct omap_hwmod_class omap2_dss_hwmod_class;
+extern struct omap_hwmod_class omap2_dispc_hwmod_class;
+extern struct omap_hwmod_class omap2_rfbi_hwmod_class;
+extern struct omap_hwmod_class omap2_venc_hwmod_class;
+
+extern struct omap_hwmod_class omap2xxx_timer_hwmod_class;
+extern struct omap_hwmod_class omap2xxx_wd_timer_hwmod_class;
+extern struct omap_hwmod_class omap2xxx_gpio_hwmod_class;
+extern struct omap_hwmod_class omap2xxx_dma_hwmod_class;
+extern struct omap_hwmod_class omap2xxx_mailbox_hwmod_class;
+extern struct omap_hwmod_class omap2xxx_mcspi_class;
 
 #endif
diff --git a/arch/arm/mach-omap2/pm-debug.c b/arch/arm/mach-omap2/pm-debug.c
index e01da45c0537..4411163e012d 100644
--- a/arch/arm/mach-omap2/pm-debug.c
+++ b/arch/arm/mach-omap2/pm-debug.c
@@ -38,155 +38,12 @@
 #include "prm2xxx_3xxx.h"
 #include "pm.h"
 
-int omap2_pm_debug;
 u32 enable_off_mode;
-u32 sleep_while_idle;
-u32 wakeup_timer_seconds;
-u32 wakeup_timer_milliseconds;
-
-#define DUMP_PRM_MOD_REG(mod, reg)    \
-        regs[reg_count].name = #mod "." #reg; \
-        regs[reg_count++].val = omap2_prm_read_mod_reg(mod, reg)
-#define DUMP_CM_MOD_REG(mod, reg)     \
-        regs[reg_count].name = #mod "." #reg; \
-        regs[reg_count++].val = omap2_cm_read_mod_reg(mod, reg)
-#define DUMP_PRM_REG(reg) \
-        regs[reg_count].name = #reg; \
-        regs[reg_count++].val = __raw_readl(reg)
-#define DUMP_CM_REG(reg) \
-        regs[reg_count].name = #reg; \
-        regs[reg_count++].val = __raw_readl(reg)
-#define DUMP_INTC_REG(reg, off) \
-        regs[reg_count].name = #reg; \
-        regs[reg_count++].val = \
-                         __raw_readl(OMAP2_L4_IO_ADDRESS(0x480fe000 + (off)))
-
-void omap2_pm_dump(int mode, int resume, unsigned int us)
-{
-        struct reg {
-                const char *name;
-                u32 val;
-        } regs[32];
-        int reg_count = 0, i;
-        const char *s1 = NULL, *s2 = NULL;
-
-        if (!resume) {
-#if 0
-                /* MPU */
-                DUMP_PRM_MOD_REG(OCP_MOD, OMAP2_PRM_IRQENABLE_MPU_OFFSET);
-                DUMP_CM_MOD_REG(MPU_MOD, OMAP2_CM_CLKSTCTRL);
-                DUMP_PRM_MOD_REG(MPU_MOD, OMAP2_PM_PWSTCTRL);
-                DUMP_PRM_MOD_REG(MPU_MOD, OMAP2_PM_PWSTST);
-                DUMP_PRM_MOD_REG(MPU_MOD, PM_WKDEP);
-#endif
-#if 0
-                /* INTC */
-                DUMP_INTC_REG(INTC_MIR0, 0x0084);
-                DUMP_INTC_REG(INTC_MIR1, 0x00a4);
-                DUMP_INTC_REG(INTC_MIR2, 0x00c4);
-#endif
-#if 0
-                DUMP_CM_MOD_REG(CORE_MOD, CM_FCLKEN1);
-                if (cpu_is_omap24xx()) {
-                        DUMP_CM_MOD_REG(CORE_MOD, OMAP24XX_CM_FCLKEN2);
-                        DUMP_PRM_MOD_REG(OMAP24XX_GR_MOD,
-                                        OMAP2_PRCM_CLKEMUL_CTRL_OFFSET);
-                        DUMP_PRM_MOD_REG(OMAP24XX_GR_MOD,
-                                        OMAP2_PRCM_CLKSRC_CTRL_OFFSET);
-                }
-                DUMP_CM_MOD_REG(WKUP_MOD, CM_FCLKEN);
-                DUMP_CM_MOD_REG(CORE_MOD, CM_ICLKEN1);
-                DUMP_CM_MOD_REG(CORE_MOD, CM_ICLKEN2);
-                DUMP_CM_MOD_REG(WKUP_MOD, CM_ICLKEN);
-                DUMP_CM_MOD_REG(PLL_MOD, CM_CLKEN);
-                DUMP_CM_MOD_REG(PLL_MOD, CM_AUTOIDLE);
-                DUMP_PRM_MOD_REG(CORE_MOD, OMAP2_PM_PWSTST);
-#endif
-#if 0
-                /* DSP */
-                if (cpu_is_omap24xx()) {
-                        DUMP_CM_MOD_REG(OMAP24XX_DSP_MOD, CM_FCLKEN);
-                        DUMP_CM_MOD_REG(OMAP24XX_DSP_MOD, CM_ICLKEN);
-                        DUMP_CM_MOD_REG(OMAP24XX_DSP_MOD, CM_IDLEST);
-                        DUMP_CM_MOD_REG(OMAP24XX_DSP_MOD, CM_AUTOIDLE);
-                        DUMP_CM_MOD_REG(OMAP24XX_DSP_MOD, CM_CLKSEL);
-                        DUMP_CM_MOD_REG(OMAP24XX_DSP_MOD, OMAP2_CM_CLKSTCTRL);
-                        DUMP_PRM_MOD_REG(OMAP24XX_DSP_MOD, OMAP2_RM_RSTCTRL);
-                        DUMP_PRM_MOD_REG(OMAP24XX_DSP_MOD, OMAP2_RM_RSTST);
-                        DUMP_PRM_MOD_REG(OMAP24XX_DSP_MOD, OMAP2_PM_PWSTCTRL);
-                        DUMP_PRM_MOD_REG(OMAP24XX_DSP_MOD, OMAP2_PM_PWSTST);
-                }
-#endif
-        } else {
-                DUMP_PRM_MOD_REG(CORE_MOD, PM_WKST1);
-                if (cpu_is_omap24xx())
-                        DUMP_PRM_MOD_REG(CORE_MOD, OMAP24XX_PM_WKST2);
-                DUMP_PRM_MOD_REG(WKUP_MOD, PM_WKST);
-                DUMP_PRM_MOD_REG(OCP_MOD, OMAP2_PRCM_IRQSTATUS_MPU_OFFSET);
-#if 1
-                DUMP_INTC_REG(INTC_PENDING_IRQ0, 0x0098);
-                DUMP_INTC_REG(INTC_PENDING_IRQ1, 0x00b8);
-                DUMP_INTC_REG(INTC_PENDING_IRQ2, 0x00d8);
-#endif
-        }
-
-        switch (mode) {
-        case 0:
-                s1 = "full";
-                s2 = "retention";
-                break;
-        case 1:
-                s1 = "MPU";
-                s2 = "retention";
-                break;
-        case 2:
-                s1 = "MPU";
-                s2 = "idle";
-                break;
-        }
-
-        if (!resume)
-#ifdef CONFIG_NO_HZ
-                printk(KERN_INFO
-                       "--- Going to %s %s (next timer after %u ms)\n", s1, s2,
-                       jiffies_to_msecs(get_next_timer_interrupt(jiffies) -
-                                        jiffies));
-#else
-                printk(KERN_INFO "--- Going to %s %s\n", s1, s2);
-#endif
-        else
-                printk(KERN_INFO "--- Woke up (slept for %u.%03u ms)\n",
-                        us / 1000, us % 1000);
-
-        for (i = 0; i < reg_count; i++)
-                printk(KERN_INFO "%-20s: 0x%08x\n", regs[i].name, regs[i].val);
-}
-
-void omap2_pm_wakeup_on_timer(u32 seconds, u32 milliseconds)
-{
-        u32 tick_rate, cycles;
-
-        if (!seconds && !milliseconds)
-                return;
-
-        tick_rate = clk_get_rate(omap_dm_timer_get_fclk(gptimer_wakeup));
-        cycles = tick_rate * seconds + tick_rate * milliseconds / 1000;
-        omap_dm_timer_stop(gptimer_wakeup);
-        omap_dm_timer_set_load_start(gptimer_wakeup, 0, 0xffffffff - cycles);
-
-        pr_info("PM: Resume timer in %u.%03u secs"
-                " (%d ticks at %d ticks/sec.)\n",
-                seconds, milliseconds, cycles, tick_rate);
-}
 
 #ifdef CONFIG_DEBUG_FS
 #include <linux/debugfs.h>
 #include <linux/seq_file.h>
 
-static void pm_dbg_regset_store(u32 *ptr);
-
-static struct dentry *pm_dbg_dir;
-
 static int pm_dbg_init_done;
 
 static int pm_dbg_init(void);
@@ -196,160 +53,6 @@ enum {
         DEBUG_FILE_TIMERS,
 };
 
-struct pm_module_def {
-        char name[8]; /* Name of the module */
-        short type; /* CM or PRM */
-        unsigned short offset;
-        int low; /* First register address on this module */
-        int high; /* Last register address on this module */
-};
-
-#define MOD_CM 0
-#define MOD_PRM 1
-
-static const struct pm_module_def *pm_dbg_reg_modules;
-static const struct pm_module_def omap3_pm_reg_modules[] = {
-        { "IVA2", MOD_CM, OMAP3430_IVA2_MOD, 0, 0x4c },
-        { "OCP", MOD_CM, OCP_MOD, 0, 0x10 },
-        { "MPU", MOD_CM, MPU_MOD, 4, 0x4c },
-        { "CORE", MOD_CM, CORE_MOD, 0, 0x4c },
-        { "SGX", MOD_CM, OMAP3430ES2_SGX_MOD, 0, 0x4c },
-        { "WKUP", MOD_CM, WKUP_MOD, 0, 0x40 },
-        { "CCR", MOD_CM, PLL_MOD, 0, 0x70 },
-        { "DSS", MOD_CM, OMAP3430_DSS_MOD, 0, 0x4c },
-        { "CAM", MOD_CM, OMAP3430_CAM_MOD, 0, 0x4c },
-        { "PER", MOD_CM, OMAP3430_PER_MOD, 0, 0x4c },
-        { "EMU", MOD_CM, OMAP3430_EMU_MOD, 0x40, 0x54 },
-        { "NEON", MOD_CM, OMAP3430_NEON_MOD, 0x20, 0x48 },
-        { "USB", MOD_CM, OMAP3430ES2_USBHOST_MOD, 0, 0x4c },
-
-        { "IVA2", MOD_PRM, OMAP3430_IVA2_MOD, 0x50, 0xfc },
-        { "OCP", MOD_PRM, OCP_MOD, 4, 0x1c },
-        { "MPU", MOD_PRM, MPU_MOD, 0x58, 0xe8 },
-        { "CORE", MOD_PRM, CORE_MOD, 0x58, 0xf8 },
-        { "SGX", MOD_PRM, OMAP3430ES2_SGX_MOD, 0x58, 0xe8 },
-        { "WKUP", MOD_PRM, WKUP_MOD, 0xa0, 0xb0 },
-        { "CCR", MOD_PRM, PLL_MOD, 0x40, 0x70 },
-        { "DSS", MOD_PRM, OMAP3430_DSS_MOD, 0x58, 0xe8 },
-        { "CAM", MOD_PRM, OMAP3430_CAM_MOD, 0x58, 0xe8 },
-        { "PER", MOD_PRM, OMAP3430_PER_MOD, 0x58, 0xe8 },
-        { "EMU", MOD_PRM, OMAP3430_EMU_MOD, 0x58, 0xe4 },
-        { "GLBL", MOD_PRM, OMAP3430_GR_MOD, 0x20, 0xe4 },
-        { "NEON", MOD_PRM, OMAP3430_NEON_MOD, 0x58, 0xe8 },
-        { "USB", MOD_PRM, OMAP3430ES2_USBHOST_MOD, 0x58, 0xe8 },
-        { "", 0, 0, 0, 0 },
-};
-
-#define PM_DBG_MAX_REG_SETS 4
-
-static void *pm_dbg_reg_set[PM_DBG_MAX_REG_SETS];
-
-static int pm_dbg_get_regset_size(void)
-{
-        static int regset_size;
-
-        if (regset_size == 0) {
-                int i = 0;
-
-                while (pm_dbg_reg_modules[i].name[0] != 0) {
-                        regset_size += pm_dbg_reg_modules[i].high +
-                                4 - pm_dbg_reg_modules[i].low;
-                        i++;
-                }
-        }
-        return regset_size;
-}
-
-static int pm_dbg_show_regs(struct seq_file *s, void *unused)
-{
-        int i, j;
-        unsigned long val;
-        int reg_set = (int)s->private;
-        u32 *ptr;
-        void *store = NULL;
-        int regs;
-        int linefeed;
-
-        if (reg_set == 0) {
-                store = kmalloc(pm_dbg_get_regset_size(), GFP_KERNEL);
-                ptr = store;
-                pm_dbg_regset_store(ptr);
-        } else {
-                ptr = pm_dbg_reg_set[reg_set - 1];
-        }
-
-        i = 0;
-
-        while (pm_dbg_reg_modules[i].name[0] != 0) {
-                regs = 0;
-                linefeed = 0;
-                if (pm_dbg_reg_modules[i].type == MOD_CM)
-                        seq_printf(s, "MOD: CM_%s (%08x)\n",
-                                pm_dbg_reg_modules[i].name,
-                                (u32)(OMAP3430_CM_BASE +
-                                pm_dbg_reg_modules[i].offset));
-                else
-                        seq_printf(s, "MOD: PRM_%s (%08x)\n",
-                                pm_dbg_reg_modules[i].name,
-                                (u32)(OMAP3430_PRM_BASE +
-                                pm_dbg_reg_modules[i].offset));
-
-                for (j = pm_dbg_reg_modules[i].low;
-                        j <= pm_dbg_reg_modules[i].high; j += 4) {
-                        val = *(ptr++);
-                        if (val != 0) {
-                                regs++;
-                                if (linefeed) {
-                                        seq_printf(s, "\n");
-                                        linefeed = 0;
-                                }
-                                seq_printf(s, "  %02x => %08lx", j, val);
-                                if (regs % 4 == 0)
-                                        linefeed = 1;
-                        }
-                }
-                seq_printf(s, "\n");
-                i++;
-        }
-
-        if (store != NULL)
-                kfree(store);
-
-        return 0;
-}
-
-static void pm_dbg_regset_store(u32 *ptr)
-{
-        int i, j;
-        u32 val;
-
-        i = 0;
-
-        while (pm_dbg_reg_modules[i].name[0] != 0) {
-                for (j = pm_dbg_reg_modules[i].low;
-                        j <= pm_dbg_reg_modules[i].high; j += 4) {
-                        if (pm_dbg_reg_modules[i].type == MOD_CM)
-                                val = omap2_cm_read_mod_reg(
-                                        pm_dbg_reg_modules[i].offset, j);
-                        else
-                                val = omap2_prm_read_mod_reg(
-                                        pm_dbg_reg_modules[i].offset, j);
-                        *(ptr++) = val;
-                }
-                i++;
-        }
-}
-
-int pm_dbg_regset_save(int reg_set)
-{
-        if (pm_dbg_reg_set[reg_set-1] == NULL)
-                return -EINVAL;
-
-        pm_dbg_regset_store(pm_dbg_reg_set[reg_set-1]);
-
-        return 0;
-}
-
 static const char pwrdm_state_names[][PWRDM_MAX_PWRSTS] = {
         "OFF",
         "RET",
@@ -469,11 +172,6 @@ static int pm_dbg_open(struct inode *inode, struct file *file)
         };
 }
 
-static int pm_dbg_reg_open(struct inode *inode, struct file *file)
-{
-        return single_open(file, pm_dbg_show_regs, inode->i_private);
-}
-
 static const struct file_operations debug_fops = {
         .open           = pm_dbg_open,
         .read           = seq_read,
@@ -481,40 +179,6 @@ static const struct file_operations debug_fops = {
         .release        = single_release,
 };
 
-static const struct file_operations debug_reg_fops = {
-        .open           = pm_dbg_reg_open,
-        .read           = seq_read,
-        .llseek         = seq_lseek,
-        .release        = single_release,
-};
-
-int pm_dbg_regset_init(int reg_set)
-{
-        char name[2];
-
-        if (!pm_dbg_init_done)
-                pm_dbg_init();
-
-        if (reg_set < 1 || reg_set > PM_DBG_MAX_REG_SETS ||
-                pm_dbg_reg_set[reg_set-1] != NULL)
-                return -EINVAL;
-
-        pm_dbg_reg_set[reg_set-1] =
-                kmalloc(pm_dbg_get_regset_size(), GFP_KERNEL);
-
-        if (pm_dbg_reg_set[reg_set-1] == NULL)
-                return -ENOMEM;
-
-        if (pm_dbg_dir != NULL) {
-                sprintf(name, "%d", reg_set);
-
-                (void) debugfs_create_file(name, S_IRUGO,
-                        pm_dbg_dir, (void *)reg_set, &debug_reg_fops);
-        }
-
-        return 0;
-}
-
 static int pwrdm_suspend_get(void *data, u64 *val)
 {
         int ret = -EINVAL;
@@ -576,9 +240,6 @@ static int option_set(void *data, u64 val)
 {
         u32 *option = data;
 
-        if (option == &wakeup_timer_milliseconds && val >= 1000)
-                return -EINVAL;
-
         *option = val;
 
         if (option == &enable_off_mode) {
@@ -595,22 +256,13 @@ static int option_set(void *data, u64 val)
 
 DEFINE_SIMPLE_ATTRIBUTE(pm_dbg_option_fops, option_get, option_set, "%llu\n");
 
-static int pm_dbg_init(void)
+static int __init pm_dbg_init(void)
 {
-        int i;
         struct dentry *d;
-        char name[2];
 
         if (pm_dbg_init_done)
                 return 0;
 
-        if (cpu_is_omap34xx())
-                pm_dbg_reg_modules = omap3_pm_reg_modules;
-        else {
-                printk(KERN_ERR "%s: only OMAP3 supported\n", __func__);
-                return -ENODEV;
-        }
-
         d = debugfs_create_dir("pm_debug", NULL);
         if (IS_ERR(d))
                 return PTR_ERR(d);
@@ -622,30 +274,8 @@ static int pm_dbg_init(void)
 
         pwrdm_for_each(pwrdms_setup, (void *)d);
 
-        pm_dbg_dir = debugfs_create_dir("registers", d);
-        if (IS_ERR(pm_dbg_dir))
-                return PTR_ERR(pm_dbg_dir);
-
-        (void) debugfs_create_file("current", S_IRUGO,
-                pm_dbg_dir, (void *)0, &debug_reg_fops);
-
-        for (i = 0; i < PM_DBG_MAX_REG_SETS; i++)
-                if (pm_dbg_reg_set[i] != NULL) {
-                        sprintf(name, "%d", i+1);
-                        (void) debugfs_create_file(name, S_IRUGO,
-                                pm_dbg_dir, (void *)(i+1), &debug_reg_fops);
-
-                }
-
         (void) debugfs_create_file("enable_off_mode", S_IRUGO | S_IWUSR, d,
                                    &enable_off_mode, &pm_dbg_option_fops);
-        (void) debugfs_create_file("sleep_while_idle", S_IRUGO | S_IWUSR, d,
-                                   &sleep_while_idle, &pm_dbg_option_fops);
-        (void) debugfs_create_file("wakeup_timer_seconds", S_IRUGO | S_IWUSR, d,
-                                   &wakeup_timer_seconds, &pm_dbg_option_fops);
-        (void) debugfs_create_file("wakeup_timer_milliseconds",
-                        S_IRUGO | S_IWUSR, d, &wakeup_timer_milliseconds,
-                        &pm_dbg_option_fops);
         pm_dbg_init_done = 1;
 
         return 0;
diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h
index 04ee56646126..4e166add2f35 100644
--- a/arch/arm/mach-omap2/pm.h
+++ b/arch/arm/mach-omap2/pm.h
@@ -60,32 +60,16 @@ inline void omap3_pm_init_cpuidle(struct cpuidle_params *cpuidle_board_params)
 extern int omap3_pm_get_suspend_state(struct powerdomain *pwrdm);
 extern int omap3_pm_set_suspend_state(struct powerdomain *pwrdm, int state);
 
-extern u32 wakeup_timer_seconds;
-extern u32 wakeup_timer_milliseconds;
-extern struct omap_dm_timer *gptimer_wakeup;
-
 #ifdef CONFIG_PM_DEBUG
-extern void omap2_pm_dump(int mode, int resume, unsigned int us);
-extern void omap2_pm_wakeup_on_timer(u32 seconds, u32 milliseconds);
-extern int omap2_pm_debug;
 extern u32 enable_off_mode;
-extern u32 sleep_while_idle;
 #else
-#define omap2_pm_dump(mode, resume, us)         do {} while (0);
-#define omap2_pm_wakeup_on_timer(seconds, milliseconds) do {} while (0);
-#define omap2_pm_debug                          0
 #define enable_off_mode 0
-#define sleep_while_idle 0
 #endif
 
 #if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS)
 extern void pm_dbg_update_time(struct powerdomain *pwrdm, int prev);
-extern int pm_dbg_regset_save(int reg_set);
-extern int pm_dbg_regset_init(int reg_set);
 #else
 #define pm_dbg_update_time(pwrdm, prev) do {} while (0);
-#define pm_dbg_regset_save(reg_set) do {} while (0);
-#define pm_dbg_regset_init(reg_set) do {} while (0);
 #endif /* CONFIG_PM_DEBUG */
 
 /* 24xx */
diff --git a/arch/arm/mach-omap2/pm24xx.c b/arch/arm/mach-omap2/pm24xx.c
index df3ded6fe194..bf089e743ed9 100644
--- a/arch/arm/mach-omap2/pm24xx.c
+++ b/arch/arm/mach-omap2/pm24xx.c
@@ -53,6 +53,8 @@
 #include "powerdomain.h"
 #include "clockdomain.h"
 
+static int omap2_pm_debug;
+
 #ifdef CONFIG_SUSPEND
 static suspend_state_t suspend_state = PM_SUSPEND_ON;
 static inline bool is_suspending(void)
@@ -123,7 +125,6 @@ static void omap2_enter_full_retention(void)
         omap2_gpio_prepare_for_idle(0);
 
         if (omap2_pm_debug) {
-                omap2_pm_dump(0, 0, 0);
                 getnstimeofday(&ts_preidle);
         }
 
@@ -160,7 +161,6 @@ no_sleep:
                 getnstimeofday(&ts_postidle);
                 ts_idle = timespec_sub(ts_postidle, ts_preidle);
                 tmp = timespec_to_ns(&ts_idle) * NSEC_PER_USEC;
-                omap2_pm_dump(0, 1, tmp);
         }
         omap2_gpio_resume_after_idle();
 
@@ -247,7 +247,6 @@ static void omap2_enter_mpu_retention(void)
         }
 
         if (omap2_pm_debug) {
-                omap2_pm_dump(only_idle ? 2 : 1, 0, 0);
                 getnstimeofday(&ts_preidle);
         }
 
@@ -259,7 +258,6 @@ static void omap2_enter_mpu_retention(void)
                 getnstimeofday(&ts_postidle);
                 ts_idle = timespec_sub(ts_postidle, ts_preidle);
                 tmp = timespec_to_ns(&ts_idle) * NSEC_PER_USEC;
-                omap2_pm_dump(only_idle ? 2 : 1, 1, tmp);
         }
 }
 
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index b77d82665abb..7255d9bce868 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -485,8 +485,6 @@ console_still_active:
 
 int omap3_can_sleep(void)
 {
-        if (!sleep_while_idle)
-                return 0;
         if (!omap_uart_can_sleep())
                 return 0;
         return 1;
@@ -522,10 +520,6 @@ static int omap3_pm_suspend(void)
         struct power_state *pwrst;
         int state, ret = 0;
 
-        if (wakeup_timer_seconds || wakeup_timer_milliseconds)
-                omap2_pm_wakeup_on_timer(wakeup_timer_seconds,
-                                         wakeup_timer_milliseconds);
-
         /* Read current next_pwrsts */
         list_for_each_entry(pwrst, &pwrst_list, node)
                 pwrst->saved_state = pwrdm_read_next_pwrst(pwrst->pwrdm);
diff --git a/arch/arm/mach-omap2/powerdomains44xx_data.c b/arch/arm/mach-omap2/powerdomains44xx_data.c
index c4222c7036a5..3a7e678fd5f1 100644
--- a/arch/arm/mach-omap2/powerdomains44xx_data.c
+++ b/arch/arm/mach-omap2/powerdomains44xx_data.c
@@ -53,7 +53,7 @@ static struct powerdomain core_44xx_pwrdm = {
                 [3] = PWRSTS_ON,        /* ducati_l2ram */
                 [4] = PWRSTS_ON,        /* ducati_unicache */
         },
-        .flags          = PWRDM_HAS_LOWPOWERSTATECHANGE,
+        .flags            = PWRDM_HAS_LOWPOWERSTATECHANGE,
 };
 
 /* gfx_44xx_pwrdm: 3D accelerator power domain */
@@ -70,7 +70,7 @@ static struct powerdomain gfx_44xx_pwrdm = {
         .pwrsts_mem_on  = {
                 [0] = PWRSTS_ON,        /* gfx_mem */
         },
-        .flags          = PWRDM_HAS_LOWPOWERSTATECHANGE,
+        .flags            = PWRDM_HAS_LOWPOWERSTATECHANGE,
 };
 
 /* abe_44xx_pwrdm: Audio back end power domain */
@@ -90,7 +90,7 @@ static struct powerdomain abe_44xx_pwrdm = {
                 [0] = PWRSTS_ON,        /* aessmem */
                 [1] = PWRSTS_ON,        /* periphmem */
         },
-        .flags          = PWRDM_HAS_LOWPOWERSTATECHANGE,
+        .flags            = PWRDM_HAS_LOWPOWERSTATECHANGE,
 };
 
 /* dss_44xx_pwrdm: Display subsystem power domain */
@@ -108,7 +108,7 @@ static struct powerdomain dss_44xx_pwrdm = {
         .pwrsts_mem_on  = {
                 [0] = PWRSTS_ON,        /* dss_mem */
         },
-        .flags          = PWRDM_HAS_LOWPOWERSTATECHANGE,
+        .flags            = PWRDM_HAS_LOWPOWERSTATECHANGE,
 };
 
 /* tesla_44xx_pwrdm: Tesla processor power domain */
@@ -130,7 +130,7 @@ static struct powerdomain tesla_44xx_pwrdm = {
                 [1] = PWRSTS_ON,        /* tesla_l1 */
                 [2] = PWRSTS_ON,        /* tesla_l2 */
         },
-        .flags          = PWRDM_HAS_LOWPOWERSTATECHANGE,
+        .flags            = PWRDM_HAS_LOWPOWERSTATECHANGE,
 };
 
 /* wkup_44xx_pwrdm: Wake-up power domain */
@@ -241,7 +241,7 @@ static struct powerdomain ivahd_44xx_pwrdm = {
                 [2] = PWRSTS_ON,        /* tcm1_mem */
                 [3] = PWRSTS_ON,        /* tcm2_mem */
         },
-        .flags          = PWRDM_HAS_LOWPOWERSTATECHANGE,
+        .flags            = PWRDM_HAS_LOWPOWERSTATECHANGE,
 };
 
 /* cam_44xx_pwrdm: Camera subsystem power domain */
@@ -258,7 +258,7 @@ static struct powerdomain cam_44xx_pwrdm = {
         .pwrsts_mem_on  = {
                 [0] = PWRSTS_ON,        /* cam_mem */
         },
-        .flags          = PWRDM_HAS_LOWPOWERSTATECHANGE,
+        .flags            = PWRDM_HAS_LOWPOWERSTATECHANGE,
 };
 
 /* l3init_44xx_pwrdm: L3 initators pheripherals power domain  */
@@ -276,7 +276,7 @@ static struct powerdomain l3init_44xx_pwrdm = {
         .pwrsts_mem_on  = {
                 [0] = PWRSTS_ON,        /* l3init_bank1 */
         },
-        .flags          = PWRDM_HAS_LOWPOWERSTATECHANGE,
+        .flags            = PWRDM_HAS_LOWPOWERSTATECHANGE,
 };
 
 /* l4per_44xx_pwrdm: Target peripherals power domain */
@@ -296,7 +296,7 @@ static struct powerdomain l4per_44xx_pwrdm = {
                 [0] = PWRSTS_ON,        /* nonretained_bank */
                 [1] = PWRSTS_ON,        /* retained_bank */
         },
-        .flags          = PWRDM_HAS_LOWPOWERSTATECHANGE,
+        .flags            = PWRDM_HAS_LOWPOWERSTATECHANGE,
 };
 
 /*
diff --git a/arch/arm/mach-omap2/prcm_mpu44xx.h b/arch/arm/mach-omap2/prcm_mpu44xx.h
index d22d1b43bccd..8a6e250f04b5 100644
--- a/arch/arm/mach-omap2/prcm_mpu44xx.h
+++ b/arch/arm/mach-omap2/prcm_mpu44xx.h
@@ -31,7 +31,6 @@
         OMAP2_L4_IO_ADDRESS(OMAP4430_PRCM_MPU_BASE + (inst) + (reg))
 
 /* PRCM_MPU instances */
-
 #define OMAP4430_PRCM_MPU_OCP_SOCKET_PRCM_INST  0x0000
 #define OMAP4430_PRCM_MPU_DEVICE_PRM_INST       0x0200
 #define OMAP4430_PRCM_MPU_CPU0_INST             0x0400
@@ -52,46 +51,46 @@
  */
 
 /* PRCM_MPU.OCP_SOCKET_PRCM register offsets */
-#define OMAP4_REVISION_PRCM_OFFSET                      0x0000
-#define OMAP4430_REVISION_PRCM                          OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_OCP_SOCKET_PRCM_INST, 0x0000)
+#define OMAP4_REVISION_PRCM_OFFSET              0x0000
+#define OMAP4430_REVISION_PRCM                  OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_OCP_SOCKET_PRCM_INST, 0x0000)
 
 /* PRCM_MPU.DEVICE_PRM register offsets */
-#define OMAP4_PRCM_MPU_PRM_RSTST_OFFSET                 0x0000
-#define OMAP4430_PRCM_MPU_PRM_RSTST                     OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_DEVICE_PRM_INST, 0x0000)
-#define OMAP4_PRCM_MPU_PRM_PSCON_COUNT_OFFSET           0x0004
-#define OMAP4430_PRCM_MPU_PRM_PSCON_COUNT               OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_DEVICE_PRM_INST, 0x0004)
+#define OMAP4_PRCM_MPU_PRM_RSTST_OFFSET         0x0000
+#define OMAP4430_PRCM_MPU_PRM_RSTST             OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_DEVICE_PRM_INST, 0x0000)
+#define OMAP4_PRCM_MPU_PRM_PSCON_COUNT_OFFSET   0x0004
+#define OMAP4430_PRCM_MPU_PRM_PSCON_COUNT       OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_DEVICE_PRM_INST, 0x0004)
 
 /* PRCM_MPU.CPU0 register offsets */
-#define OMAP4_PM_CPU0_PWRSTCTRL_OFFSET                  0x0000
-#define OMAP4430_PM_CPU0_PWRSTCTRL                      OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x0000)
-#define OMAP4_PM_CPU0_PWRSTST_OFFSET                    0x0004
-#define OMAP4430_PM_CPU0_PWRSTST                        OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x0004)
-#define OMAP4_RM_CPU0_CPU0_CONTEXT_OFFSET               0x0008
-#define OMAP4430_RM_CPU0_CPU0_CONTEXT                   OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x0008)
-#define OMAP4_RM_CPU0_CPU0_RSTCTRL_OFFSET               0x000c
-#define OMAP4430_RM_CPU0_CPU0_RSTCTRL                   OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x000c)
-#define OMAP4_RM_CPU0_CPU0_RSTST_OFFSET                 0x0010
-#define OMAP4430_RM_CPU0_CPU0_RSTST                     OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x0010)
-#define OMAP4_CM_CPU0_CPU0_CLKCTRL_OFFSET               0x0014
-#define OMAP4430_CM_CPU0_CPU0_CLKCTRL                   OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x0014)
-#define OMAP4_CM_CPU0_CLKSTCTRL_OFFSET                  0x0018
-#define OMAP4430_CM_CPU0_CLKSTCTRL                      OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x0018)
+#define OMAP4_PM_CPU0_PWRSTCTRL_OFFSET          0x0000
+#define OMAP4430_PM_CPU0_PWRSTCTRL              OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x0000)
+#define OMAP4_PM_CPU0_PWRSTST_OFFSET            0x0004
+#define OMAP4430_PM_CPU0_PWRSTST                OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x0004)
+#define OMAP4_RM_CPU0_CPU0_CONTEXT_OFFSET       0x0008
+#define OMAP4430_RM_CPU0_CPU0_CONTEXT           OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x0008)
+#define OMAP4_RM_CPU0_CPU0_RSTCTRL_OFFSET       0x000c
+#define OMAP4430_RM_CPU0_CPU0_RSTCTRL           OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x000c)
+#define OMAP4_RM_CPU0_CPU0_RSTST_OFFSET         0x0010
+#define OMAP4430_RM_CPU0_CPU0_RSTST             OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x0010)
+#define OMAP4_CM_CPU0_CPU0_CLKCTRL_OFFSET       0x0014
+#define OMAP4430_CM_CPU0_CPU0_CLKCTRL           OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x0014)
+#define OMAP4_CM_CPU0_CLKSTCTRL_OFFSET          0x0018
+#define OMAP4430_CM_CPU0_CLKSTCTRL              OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x0018)
 
 /* PRCM_MPU.CPU1 register offsets */
-#define OMAP4_PM_CPU1_PWRSTCTRL_OFFSET                  0x0000
-#define OMAP4430_PM_CPU1_PWRSTCTRL                      OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x0000)
-#define OMAP4_PM_CPU1_PWRSTST_OFFSET                    0x0004
-#define OMAP4430_PM_CPU1_PWRSTST                        OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x0004)
-#define OMAP4_RM_CPU1_CPU1_CONTEXT_OFFSET               0x0008
-#define OMAP4430_RM_CPU1_CPU1_CONTEXT                   OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x0008)
-#define OMAP4_RM_CPU1_CPU1_RSTCTRL_OFFSET               0x000c
-#define OMAP4430_RM_CPU1_CPU1_RSTCTRL                   OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x000c)
-#define OMAP4_RM_CPU1_CPU1_RSTST_OFFSET                 0x0010
-#define OMAP4430_RM_CPU1_CPU1_RSTST                     OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x0010)
-#define OMAP4_CM_CPU1_CPU1_CLKCTRL_OFFSET               0x0014
-#define OMAP4430_CM_CPU1_CPU1_CLKCTRL                   OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x0014)
-#define OMAP4_CM_CPU1_CLKSTCTRL_OFFSET                  0x0018
-#define OMAP4430_CM_CPU1_CLKSTCTRL                      OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x0018)
+#define OMAP4_PM_CPU1_PWRSTCTRL_OFFSET          0x0000
+#define OMAP4430_PM_CPU1_PWRSTCTRL              OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x0000)
+#define OMAP4_PM_CPU1_PWRSTST_OFFSET            0x0004
+#define OMAP4430_PM_CPU1_PWRSTST                OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x0004)
+#define OMAP4_RM_CPU1_CPU1_CONTEXT_OFFSET       0x0008
+#define OMAP4430_RM_CPU1_CPU1_CONTEXT           OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x0008)
+#define OMAP4_RM_CPU1_CPU1_RSTCTRL_OFFSET       0x000c
+#define OMAP4430_RM_CPU1_CPU1_RSTCTRL           OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x000c)
+#define OMAP4_RM_CPU1_CPU1_RSTST_OFFSET         0x0010
+#define OMAP4430_RM_CPU1_CPU1_RSTST             OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x0010)
+#define OMAP4_CM_CPU1_CPU1_CLKCTRL_OFFSET       0x0014
+#define OMAP4430_CM_CPU1_CPU1_CLKCTRL           OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x0014)
+#define OMAP4_CM_CPU1_CLKSTCTRL_OFFSET          0x0018
+#define OMAP4430_CM_CPU1_CLKSTCTRL              OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x0018)
 
 /* Function prototypes */
 # ifndef __ASSEMBLER__
diff --git a/arch/arm/mach-omap2/prm44xx.h b/arch/arm/mach-omap2/prm44xx.h
index 67a0d3feb3f6..6e53120fd6cb 100644
--- a/arch/arm/mach-omap2/prm44xx.h
+++ b/arch/arm/mach-omap2/prm44xx.h
@@ -31,7 +31,7 @@
 #define OMAP4430_PRM_BASE               0x4a306000
 
 #define OMAP44XX_PRM_REGADDR(inst, reg)                         \
-        OMAP2_L4_IO_ADDRESS(OMAP4430_PRM_BASE + (inst) + (reg))
+        OMAP2_L4_IO_ADDRESS(OMAP4430_PRM_BASE + (inst) + (reg))
 
 
 /* PRM instances */
@@ -46,30 +46,18 @@
 #define OMAP4430_PRM_CAM_INST           0x1000
 #define OMAP4430_PRM_DSS_INST           0x1100
 #define OMAP4430_PRM_GFX_INST           0x1200
-#define OMAP4430_PRM_L3INIT_INST                0x1300
+#define OMAP4430_PRM_L3INIT_INST        0x1300
 #define OMAP4430_PRM_L4PER_INST         0x1400
-#define OMAP4430_PRM_CEFUSE_INST                0x1600
+#define OMAP4430_PRM_CEFUSE_INST        0x1600
 #define OMAP4430_PRM_WKUP_INST          0x1700
 #define OMAP4430_PRM_WKUP_CM_INST       0x1800
 #define OMAP4430_PRM_EMU_INST           0x1900
-#define OMAP4430_PRM_EMU_CM_INST                0x1a00
-#define OMAP4430_PRM_DEVICE_INST                0x1b00
+#define OMAP4430_PRM_EMU_CM_INST        0x1a00
+#define OMAP4430_PRM_DEVICE_INST        0x1b00
 #define OMAP4430_PRM_INSTR_INST         0x1f00
 
 /* PRM clockdomain register offsets (from instance start) */
-#define OMAP4430_PRM_MPU_MPU_CDOFFS             0x0000
-#define OMAP4430_PRM_TESLA_TESLA_CDOFFS         0x0000
-#define OMAP4430_PRM_ABE_ABE_CDOFFS             0x0000
-#define OMAP4430_PRM_CORE_CORE_CDOFFS           0x0000
-#define OMAP4430_PRM_IVAHD_IVAHD_CDOFFS         0x0000
-#define OMAP4430_PRM_CAM_CAM_CDOFFS             0x0000
-#define OMAP4430_PRM_DSS_DSS_CDOFFS             0x0000
-#define OMAP4430_PRM_GFX_GFX_CDOFFS             0x0000
-#define OMAP4430_PRM_L3INIT_L3INIT_CDOFFS       0x0000
-#define OMAP4430_PRM_L4PER_L4PER_CDOFFS         0x0000
-#define OMAP4430_PRM_CEFUSE_CEFUSE_CDOFFS       0x0000
 #define OMAP4430_PRM_WKUP_CM_WKUP_CDOFFS        0x0000
-#define OMAP4430_PRM_EMU_EMU_CDOFFS             0x0000
 #define OMAP4430_PRM_EMU_CM_EMU_CDOFFS          0x0000
 
 /* OMAP4 specific register offsets */
@@ -247,8 +235,8 @@
 #define OMAP4430_RM_MEMIF_DLL_H_CONTEXT                 OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0464)
 #define OMAP4_RM_D2D_SAD2D_CONTEXT_OFFSET               0x0524
 #define OMAP4430_RM_D2D_SAD2D_CONTEXT                   OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0524)
-#define OMAP4_RM_D2D_INSTEM_ICR_CONTEXT_OFFSET          0x052c
-#define OMAP4430_RM_D2D_INSTEM_ICR_CONTEXT              OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x052c)
+#define OMAP4_RM_D2D_MODEM_ICR_CONTEXT_OFFSET           0x052c
+#define OMAP4430_RM_D2D_MODEM_ICR_CONTEXT               OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x052c)
 #define OMAP4_RM_D2D_SAD2D_FW_CONTEXT_OFFSET            0x0534
 #define OMAP4430_RM_D2D_SAD2D_FW_CONTEXT                OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0534)
 #define OMAP4_RM_L4CFG_L4_CFG_CONTEXT_OFFSET            0x0624
@@ -713,8 +701,8 @@
 #define OMAP4430_PRM_VC_VAL_BYPASS                      OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00a0)
 #define OMAP4_PRM_VC_CFG_CHANNEL_OFFSET                 0x00a4
 #define OMAP4430_PRM_VC_CFG_CHANNEL                     OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00a4)
-#define OMAP4_PRM_VC_CFG_I2C_INSTE_OFFSET               0x00a8
-#define OMAP4430_PRM_VC_CFG_I2C_INSTE                   OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00a8)
+#define OMAP4_PRM_VC_CFG_I2C_MODE_OFFSET                0x00a8
+#define OMAP4430_PRM_VC_CFG_I2C_MODE                    OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00a8)
 #define OMAP4_PRM_VC_CFG_I2C_CLK_OFFSET                 0x00ac
 #define OMAP4430_PRM_VC_CFG_I2C_CLK                     OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00ac)
 #define OMAP4_PRM_SRAM_COUNT_OFFSET                     0x00b0
@@ -751,8 +739,8 @@
 #define OMAP4430_PRM_PHASE2A_CNDP                       OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00ec)
 #define OMAP4_PRM_PHASE2B_CNDP_OFFSET                   0x00f0
 #define OMAP4430_PRM_PHASE2B_CNDP                       OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00f0)
-#define OMAP4_PRM_INSTEM_IF_CTRL_OFFSET                 0x00f4
-#define OMAP4430_PRM_INSTEM_IF_CTRL                     OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00f4)
+#define OMAP4_PRM_MODEM_IF_CTRL_OFFSET                  0x00f4
+#define OMAP4430_PRM_MODEM_IF_CTRL                      OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00f4)
 #define OMAP4_PRM_VC_ERRST_OFFSET                       0x00f8
 #define OMAP4430_PRM_VC_ERRST                           OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00f8)
 
diff --git a/arch/arm/mach-omap2/smartreflex.c b/arch/arm/mach-omap2/smartreflex.c
index fb7dc52394a8..2ce2fb7664bc 100644
--- a/arch/arm/mach-omap2/smartreflex.c
+++ b/arch/arm/mach-omap2/smartreflex.c
@@ -143,7 +143,7 @@ static irqreturn_t sr_interrupt(int irq, void *data)
                 sr_write_reg(sr_info, IRQSTATUS, status);
         }
 
-        if (sr_class->class_type == SR_CLASS2 && sr_class->notify)
+        if (sr_class->notify)
                 sr_class->notify(sr_info->voltdm, status);
 
         return IRQ_HANDLED;
@@ -258,9 +258,7 @@ static int sr_late_init(struct omap_sr *sr_info)
         struct resource *mem;
         int ret = 0;
 
-        if (sr_class->class_type == SR_CLASS2 &&
-                sr_class->notify_flags && sr_info->irq) {
-
+        if (sr_class->notify && sr_class->notify_flags && sr_info->irq) {
                 name = kasprintf(GFP_KERNEL, "sr_%s", sr_info->voltdm->name);
                 if (name == NULL) {
                         ret = -ENOMEM;
@@ -270,6 +268,7 @@ static int sr_late_init(struct omap_sr *sr_info)
                                 0, name, (void *)sr_info);
                 if (ret)
                         goto error;
+                disable_irq(sr_info->irq);
         }
 
         if (pdata && pdata->enable_on_init)
@@ -278,16 +277,16 @@ static int sr_late_init(struct omap_sr *sr_info)
         return ret;
 
 error:
-                iounmap(sr_info->base);
-                mem = platform_get_resource(sr_info->pdev, IORESOURCE_MEM, 0);
-                release_mem_region(mem->start, resource_size(mem));
-                list_del(&sr_info->node);
-                dev_err(&sr_info->pdev->dev, "%s: ERROR in registering"
-                        "interrupt handler. Smartreflex will"
-                        "not function as desired\n", __func__);
-                kfree(name);
-                kfree(sr_info);
-                return ret;
+        iounmap(sr_info->base);
+        mem = platform_get_resource(sr_info->pdev, IORESOURCE_MEM, 0);
+        release_mem_region(mem->start, resource_size(mem));
+        list_del(&sr_info->node);
+        dev_err(&sr_info->pdev->dev, "%s: ERROR in registering"
+                "interrupt handler. Smartreflex will"
+                "not function as desired\n", __func__);
+        kfree(name);
+        kfree(sr_info);
+        return ret;
 }
 
 static void sr_v1_disable(struct omap_sr *sr)
@@ -808,10 +807,13 @@ static int omap_sr_autocomp_store(void *data, u64 val)
                 return -EINVAL;
         }
 
-        if (!val)
-                sr_stop_vddautocomp(sr_info);
-        else
-                sr_start_vddautocomp(sr_info);
+        /* control enable/disable only if there is a delta in value */
+        if (sr_info->autocomp_active != val) {
+                if (!val)
+                        sr_stop_vddautocomp(sr_info);
+                else
+                        sr_start_vddautocomp(sr_info);
+        }
 
         return 0;
 }
diff --git a/arch/arm/mach-omap2/timer-gp.c b/arch/arm/mach-omap2/timer-gp.c
deleted file mode 100644
index 3b9cf85f4bb9..000000000000
--- a/arch/arm/mach-omap2/timer-gp.c
+++ /dev/null
@@ -1,266 +0,0 @@
-/*
- * linux/arch/arm/mach-omap2/timer-gp.c
- *
- * OMAP2 GP timer support.
- *
- * Copyright (C) 2009 Nokia Corporation
- *
- * Update to use new clocksource/clockevent layers
- * Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com>
- * Copyright (C) 2007 MontaVista Software, Inc.
- *
- * Original driver:
- * Copyright (C) 2005 Nokia Corporation
- * Author: Paul Mundt <paul.mundt@nokia.com>
- *         Juha Yrjölä <juha.yrjola@nokia.com>
- * OMAP Dual-mode timer framework support by Timo Teras
- *
- * Some parts based off of TI's 24xx code:
- *
- * Copyright (C) 2004-2009 Texas Instruments, Inc.
- *
- * Roughly modelled after the OMAP1 MPU timer code.
- * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-#include <linux/init.h>
-#include <linux/time.h>
-#include <linux/interrupt.h>
-#include <linux/err.h>
-#include <linux/clk.h>
-#include <linux/delay.h>
-#include <linux/irq.h>
-#include <linux/clocksource.h>
-#include <linux/clockchips.h>
-
-#include <asm/mach/time.h>
-#include <plat/dmtimer.h>
-#include <asm/localtimer.h>
-#include <asm/sched_clock.h>
-#include <plat/common.h>
-#include <plat/omap_hwmod.h>
-
-#include "timer-gp.h"
-
-
-/* MAX_GPTIMER_ID: number of GPTIMERs on the chip */
-#define MAX_GPTIMER_ID          12
-
-static struct omap_dm_timer *gptimer;
-static struct clock_event_device clockevent_gpt;
-static u8 __initdata gptimer_id = 1;
-static u8 __initdata inited;
-struct omap_dm_timer *gptimer_wakeup;
-
-static irqreturn_t omap2_gp_timer_interrupt(int irq, void *dev_id)
-{
-        struct omap_dm_timer *gpt = (struct omap_dm_timer *)dev_id;
-        struct clock_event_device *evt = &clockevent_gpt;
-
-        omap_dm_timer_write_status(gpt, OMAP_TIMER_INT_OVERFLOW);
-
-        evt->event_handler(evt);
-        return IRQ_HANDLED;
-}
-
-static struct irqaction omap2_gp_timer_irq = {
-        .name           = "gp timer",
-        .flags          = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
-        .handler        = omap2_gp_timer_interrupt,
-};
-
-static int omap2_gp_timer_set_next_event(unsigned long cycles,
-                                         struct clock_event_device *evt)
-{
-        omap_dm_timer_set_load_start(gptimer, 0, 0xffffffff - cycles);
-
-        return 0;
-}
-
-static void omap2_gp_timer_set_mode(enum clock_event_mode mode,
-                                    struct clock_event_device *evt)
-{
-        u32 period;
-
-        omap_dm_timer_stop(gptimer);
-
-        switch (mode) {
-        case CLOCK_EVT_MODE_PERIODIC:
-                period = clk_get_rate(omap_dm_timer_get_fclk(gptimer)) / HZ;
-                period -= 1;
-                omap_dm_timer_set_load_start(gptimer, 1, 0xffffffff - period);
-                break;
-        case CLOCK_EVT_MODE_ONESHOT:
-                break;
-        case CLOCK_EVT_MODE_UNUSED:
-        case CLOCK_EVT_MODE_SHUTDOWN:
-        case CLOCK_EVT_MODE_RESUME:
-                break;
-        }
-}
-
-static struct clock_event_device clockevent_gpt = {
-        .name           = "gp timer",
-        .features       = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
-        .shift          = 32,
-        .set_next_event = omap2_gp_timer_set_next_event,
-        .set_mode       = omap2_gp_timer_set_mode,
-};
-
-/**
- * omap2_gp_clockevent_set_gptimer - set which GPTIMER is used for clockevents
- * @id: GPTIMER to use (1..MAX_GPTIMER_ID)
- *
- * Define the GPTIMER that the system should use for the tick timer.
- * Meant to be called from board-*.c files in the event that GPTIMER1, the
- * default, is unsuitable.  Returns -EINVAL on error or 0 on success.
- */
-int __init omap2_gp_clockevent_set_gptimer(u8 id)
-{
-        if (id < 1 || id > MAX_GPTIMER_ID)
-                return -EINVAL;
-
-        BUG_ON(inited);
-
-        gptimer_id = id;
-
-        return 0;
-}
-
-static void __init omap2_gp_clockevent_init(void)
-{
-        u32 tick_rate;
-        int src;
-        char clockevent_hwmod_name[8]; /* 8 = sizeof("timerXX0") */
-
-        inited = 1;
-
-        sprintf(clockevent_hwmod_name, "timer%d", gptimer_id);
-        omap_hwmod_setup_one(clockevent_hwmod_name);
-
-        gptimer = omap_dm_timer_request_specific(gptimer_id);
-        BUG_ON(gptimer == NULL);
-        gptimer_wakeup = gptimer;
-
-#if defined(CONFIG_OMAP_32K_TIMER)
-        src = OMAP_TIMER_SRC_32_KHZ;
-#else
-        src = OMAP_TIMER_SRC_SYS_CLK;
-        WARN(gptimer_id == 12, "WARNING: GPTIMER12 can only use the "
-             "secure 32KiHz clock source\n");
-#endif
-
-        if (gptimer_id != 12)
-                WARN(IS_ERR_VALUE(omap_dm_timer_set_source(gptimer, src)),
-                     "timer-gp: omap_dm_timer_set_source() failed\n");
-
-        tick_rate = clk_get_rate(omap_dm_timer_get_fclk(gptimer));
-
-        pr_info("OMAP clockevent source: GPTIMER%d at %u Hz\n",
-                gptimer_id, tick_rate);
-
-        omap2_gp_timer_irq.dev_id = (void *)gptimer;
-        setup_irq(omap_dm_timer_get_irq(gptimer), &omap2_gp_timer_irq);
-        omap_dm_timer_set_int_enable(gptimer, OMAP_TIMER_INT_OVERFLOW);
-
-        clockevent_gpt.mult = div_sc(tick_rate, NSEC_PER_SEC,
-                                     clockevent_gpt.shift);
-        clockevent_gpt.max_delta_ns =
-                clockevent_delta2ns(0xffffffff, &clockevent_gpt);
-        clockevent_gpt.min_delta_ns =
-                clockevent_delta2ns(3, &clockevent_gpt);
-                /* Timer internal resynch latency. */
-
-        clockevent_gpt.cpumask = cpumask_of(0);
-        clockevents_register_device(&clockevent_gpt);
-}
-
-/* Clocksource code */
-
-#ifdef CONFIG_OMAP_32K_TIMER
-/* 
- * When 32k-timer is enabled, don't use GPTimer for clocksource
- * instead, just leave default clocksource which uses the 32k
- * sync counter.  See clocksource setup in plat-omap/counter_32k.c
- */
-
-static void __init omap2_gp_clocksource_init(void)
-{
-        omap_init_clocksource_32k();
-}
-
-#else
-/*
- * clocksource
- */
-static DEFINE_CLOCK_DATA(cd);
-static struct omap_dm_timer *gpt_clocksource;
-static cycle_t clocksource_read_cycles(struct clocksource *cs)
-{
-        return (cycle_t)omap_dm_timer_read_counter(gpt_clocksource);
-}
-
-static struct clocksource clocksource_gpt = {
-        .name           = "gp timer",
-        .rating         = 300,
-        .read           = clocksource_read_cycles,
-        .mask           = CLOCKSOURCE_MASK(32),
-        .flags          = CLOCK_SOURCE_IS_CONTINUOUS,
-};
-
-static void notrace dmtimer_update_sched_clock(void)
-{
-        u32 cyc;
-
-        cyc = omap_dm_timer_read_counter(gpt_clocksource);
-
-        update_sched_clock(&cd, cyc, (u32)~0);
-}
-
-/* Setup free-running counter for clocksource */
-static void __init omap2_gp_clocksource_init(void)
-{
-        static struct omap_dm_timer *gpt;
-        u32 tick_rate;
-        static char err1[] __initdata = KERN_ERR
-                "%s: failed to request dm-timer\n";
-        static char err2[] __initdata = KERN_ERR
-                "%s: can't register clocksource!\n";
-
-        gpt = omap_dm_timer_request();
-        if (!gpt)
-                printk(err1, clocksource_gpt.name);
-        gpt_clocksource = gpt;
-
-        omap_dm_timer_set_source(gpt, OMAP_TIMER_SRC_SYS_CLK);
-        tick_rate = clk_get_rate(omap_dm_timer_get_fclk(gpt));
-
-        omap_dm_timer_set_load_start(gpt, 1, 0);
-
-        init_sched_clock(&cd, dmtimer_update_sched_clock, 32, tick_rate);
-
-        if (clocksource_register_hz(&clocksource_gpt, tick_rate))
-                printk(err2, clocksource_gpt.name);
-}
-#endif
-
-static void __init omap2_gp_timer_init(void)
-{
-#ifdef CONFIG_LOCAL_TIMERS
-        if (cpu_is_omap44xx()) {
-                twd_base = ioremap(OMAP44XX_LOCAL_TWD_BASE, SZ_256);
-                BUG_ON(!twd_base);
-        }
-#endif
-        omap_dm_timer_init();
-
-        omap2_gp_clockevent_init();
-        omap2_gp_clocksource_init();
-}
-
-struct sys_timer omap_timer = {
-        .init   = omap2_gp_timer_init,
-};
diff --git a/arch/arm/mach-omap2/timer-gp.h b/arch/arm/mach-omap2/timer-gp.h
deleted file mode 100644
index 5c1072c6783b..000000000000
--- a/arch/arm/mach-omap2/timer-gp.h
+++ /dev/null
@@ -1,16 +0,0 @@
-/*
- * OMAP2/3 GPTIMER support.headers
- *
- * Copyright (C) 2009 Nokia Corporation
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-
-#ifndef __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_TIMER_GP_H
-#define __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_TIMER_GP_H
-
-extern int __init omap2_gp_clockevent_set_gptimer(u8 id);
-
-#endif
diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c
new file mode 100644
index 000000000000..e9640728239b
--- /dev/null
+++ b/arch/arm/mach-omap2/timer.c
@@ -0,0 +1,342 @@
+/*
+ * linux/arch/arm/mach-omap2/timer.c
+ *
+ * OMAP2 GP timer support.
+ *
+ * Copyright (C) 2009 Nokia Corporation
+ *
+ * Update to use new clocksource/clockevent layers
+ * Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com>
+ * Copyright (C) 2007 MontaVista Software, Inc.
+ *
+ * Original driver:
+ * Copyright (C) 2005 Nokia Corporation
+ * Author: Paul Mundt <paul.mundt@nokia.com>
+ *         Juha Yrjölä <juha.yrjola@nokia.com>
+ * OMAP Dual-mode timer framework support by Timo Teras
+ *
+ * Some parts based off of TI's 24xx code:
+ *
+ * Copyright (C) 2004-2009 Texas Instruments, Inc.
+ *
+ * Roughly modelled after the OMAP1 MPU timer code.
+ * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#include <linux/init.h>
+#include <linux/time.h>
+#include <linux/interrupt.h>
+#include <linux/err.h>
+#include <linux/clk.h>
+#include <linux/delay.h>
+#include <linux/irq.h>
+#include <linux/clocksource.h>
+#include <linux/clockchips.h>
+
+#include <asm/mach/time.h>
+#include <plat/dmtimer.h>
+#include <asm/localtimer.h>
+#include <asm/sched_clock.h>
+#include <plat/common.h>
+#include <plat/omap_hwmod.h>
+
+/* Parent clocks, eventually these will come from the clock framework */
+
+#define OMAP2_MPU_SOURCE        "sys_ck"
+#define OMAP3_MPU_SOURCE        OMAP2_MPU_SOURCE
+#define OMAP4_MPU_SOURCE        "sys_clkin_ck"
+#define OMAP2_32K_SOURCE        "func_32k_ck"
+#define OMAP3_32K_SOURCE        "omap_32k_fck"
+#define OMAP4_32K_SOURCE        "sys_32k_ck"
+
+#ifdef CONFIG_OMAP_32K_TIMER
+#define OMAP2_CLKEV_SOURCE      OMAP2_32K_SOURCE
+#define OMAP3_CLKEV_SOURCE      OMAP3_32K_SOURCE
+#define OMAP4_CLKEV_SOURCE      OMAP4_32K_SOURCE
+#define OMAP3_SECURE_TIMER      12
+#else
+#define OMAP2_CLKEV_SOURCE      OMAP2_MPU_SOURCE
+#define OMAP3_CLKEV_SOURCE      OMAP3_MPU_SOURCE
+#define OMAP4_CLKEV_SOURCE      OMAP4_MPU_SOURCE
+#define OMAP3_SECURE_TIMER      1
+#endif
+
+/* MAX_GPTIMER_ID: number of GPTIMERs on the chip */
+#define MAX_GPTIMER_ID          12
+
+u32 sys_timer_reserved;
+
+/* Clockevent code */
+
+static struct omap_dm_timer clkev;
+static struct clock_event_device clockevent_gpt;
+
+static irqreturn_t omap2_gp_timer_interrupt(int irq, void *dev_id)
+{
+        struct clock_event_device *evt = &clockevent_gpt;
+
+        __omap_dm_timer_write_status(clkev.io_base, OMAP_TIMER_INT_OVERFLOW);
+
+        evt->event_handler(evt);
+        return IRQ_HANDLED;
+}
+
+static struct irqaction omap2_gp_timer_irq = {
+        .name           = "gp timer",
+        .flags          = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
+        .handler        = omap2_gp_timer_interrupt,
+};
+
+static int omap2_gp_timer_set_next_event(unsigned long cycles,
+                                         struct clock_event_device *evt)
+{
+        __omap_dm_timer_load_start(clkev.io_base, OMAP_TIMER_CTRL_ST,
+                                                0xffffffff - cycles, 1);
+
+        return 0;
+}
+
+static void omap2_gp_timer_set_mode(enum clock_event_mode mode,
+                                    struct clock_event_device *evt)
+{
+        u32 period;
+
+        __omap_dm_timer_stop(clkev.io_base, 1, clkev.rate);
+
+        switch (mode) {
+        case CLOCK_EVT_MODE_PERIODIC:
+                period = clkev.rate / HZ;
+                period -= 1;
+                /* Looks like we need to first set the load value separately */
+                __omap_dm_timer_write(clkev.io_base, OMAP_TIMER_LOAD_REG,
+                                        0xffffffff - period, 1);
+                __omap_dm_timer_load_start(clkev.io_base,
+                                        OMAP_TIMER_CTRL_AR | OMAP_TIMER_CTRL_ST,
+                                                0xffffffff - period, 1);
+                break;
+        case CLOCK_EVT_MODE_ONESHOT:
+                break;
+        case CLOCK_EVT_MODE_UNUSED:
+        case CLOCK_EVT_MODE_SHUTDOWN:
+        case CLOCK_EVT_MODE_RESUME:
+                break;
+        }
+}
+
+static struct clock_event_device clockevent_gpt = {
+        .name           = "gp timer",
+        .features       = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
+        .shift          = 32,
+        .set_next_event = omap2_gp_timer_set_next_event,
+        .set_mode       = omap2_gp_timer_set_mode,
+};
+
+static int __init omap_dm_timer_init_one(struct omap_dm_timer *timer,
+                                                int gptimer_id,
+                                                const char *fck_source)
+{
+        char name[10]; /* 10 = sizeof("gptXX_Xck0") */
+        struct omap_hwmod *oh;
+        size_t size;
+        int res = 0;
+
+        sprintf(name, "timer%d", gptimer_id);
+        omap_hwmod_setup_one(name);
+        oh = omap_hwmod_lookup(name);
+        if (!oh)
+                return -ENODEV;
+
+        timer->irq = oh->mpu_irqs[0].irq;
+        timer->phys_base = oh->slaves[0]->addr->pa_start;
+        size = oh->slaves[0]->addr->pa_end - timer->phys_base;
+
+        /* Static mapping, never released */
+        timer->io_base = ioremap(timer->phys_base, size);
+        if (!timer->io_base)
+                return -ENXIO;
+
+        /* After the dmtimer is using hwmod these clocks won't be needed */
+        sprintf(name, "gpt%d_fck", gptimer_id);
+        timer->fclk = clk_get(NULL, name);
+        if (IS_ERR(timer->fclk))
+                return -ENODEV;
+
+        sprintf(name, "gpt%d_ick", gptimer_id);
+        timer->iclk = clk_get(NULL, name);
+        if (IS_ERR(timer->iclk)) {
+                clk_put(timer->fclk);
+                return -ENODEV;
+        }
+
+        omap_hwmod_enable(oh);
+
+        sys_timer_reserved |= (1 << (gptimer_id - 1));
+
+        if (gptimer_id != 12) {
+                struct clk *src;
+
+                src = clk_get(NULL, fck_source);
+                if (IS_ERR(src)) {
+                        res = -EINVAL;
+                } else {
+                        res = __omap_dm_timer_set_source(timer->fclk, src);
+                        if (IS_ERR_VALUE(res))
+                                pr_warning("%s: timer%i cannot set source\n",
+                                                __func__, gptimer_id);
+                        clk_put(src);
+                }
+        }
+        __omap_dm_timer_reset(timer->io_base, 1, 1);
+        timer->posted = 1;
+
+        timer->rate = clk_get_rate(timer->fclk);
+
+        timer->reserved = 1;
+
+        return res;
+}
+
+static void __init omap2_gp_clockevent_init(int gptimer_id,
+                                                const char *fck_source)
+{
+        int res;
+
+        res = omap_dm_timer_init_one(&clkev, gptimer_id, fck_source);
+        BUG_ON(res);
+
+        omap2_gp_timer_irq.dev_id = (void *)&clkev;
+        setup_irq(clkev.irq, &omap2_gp_timer_irq);
+
+        __omap_dm_timer_int_enable(clkev.io_base, OMAP_TIMER_INT_OVERFLOW);
+
+        clockevent_gpt.mult = div_sc(clkev.rate, NSEC_PER_SEC,
+                                     clockevent_gpt.shift);
+        clockevent_gpt.max_delta_ns =
+                clockevent_delta2ns(0xffffffff, &clockevent_gpt);
+        clockevent_gpt.min_delta_ns =
+                clockevent_delta2ns(3, &clockevent_gpt);
+                /* Timer internal resynch latency. */
+
+        clockevent_gpt.cpumask = cpumask_of(0);
+        clockevents_register_device(&clockevent_gpt);
+
+        pr_info("OMAP clockevent source: GPTIMER%d at %lu Hz\n",
+                gptimer_id, clkev.rate);
+}
+
+/* Clocksource code */
+
+#ifdef CONFIG_OMAP_32K_TIMER
+/*
+ * When 32k-timer is enabled, don't use GPTimer for clocksource
+ * instead, just leave default clocksource which uses the 32k
+ * sync counter.  See clocksource setup in plat-omap/counter_32k.c
+ */
+
+static void __init omap2_gp_clocksource_init(int unused, const char *dummy)
+{
+        omap_init_clocksource_32k();
+}
+
+#else
+
+static struct omap_dm_timer clksrc;
+
+/*
+ * clocksource
+ */
+static DEFINE_CLOCK_DATA(cd);
+static cycle_t clocksource_read_cycles(struct clocksource *cs)
+{
+        return (cycle_t)__omap_dm_timer_read_counter(clksrc.io_base, 1);
+}
+
+static struct clocksource clocksource_gpt = {
+        .name           = "gp timer",
+        .rating         = 300,
+        .read           = clocksource_read_cycles,
+        .mask           = CLOCKSOURCE_MASK(32),
+        .flags          = CLOCK_SOURCE_IS_CONTINUOUS,
+};
+
+static void notrace dmtimer_update_sched_clock(void)
+{
+        u32 cyc;
+
+        cyc = __omap_dm_timer_read_counter(clksrc.io_base, 1);
+
+        update_sched_clock(&cd, cyc, (u32)~0);
+}
+
+unsigned long long notrace sched_clock(void)
+{
+        u32 cyc = 0;
+
+        if (clksrc.reserved)
+                cyc = __omap_dm_timer_read_counter(clksrc.io_base, 1);
+
+        return cyc_to_sched_clock(&cd, cyc, (u32)~0);
+}
+
+/* Setup free-running counter for clocksource */
+static void __init omap2_gp_clocksource_init(int gptimer_id,
+                                                const char *fck_source)
+{
+        int res;
+
+        res = omap_dm_timer_init_one(&clksrc, gptimer_id, fck_source);
+        BUG_ON(res);
+
+        pr_info("OMAP clocksource: GPTIMER%d at %lu Hz\n",
+                gptimer_id, clksrc.rate);
+
+        __omap_dm_timer_load_start(clksrc.io_base, OMAP_TIMER_CTRL_ST, 0, 1);
+        init_sched_clock(&cd, dmtimer_update_sched_clock, 32, clksrc.rate);
+
+        if (clocksource_register_hz(&clocksource_gpt, clksrc.rate))
+                pr_err("Could not register clocksource %s\n",
+                        clocksource_gpt.name);
+}
+#endif
+
+#define OMAP_SYS_TIMER_INIT(name, clkev_nr, clkev_src,                  \
+                                clksrc_nr, clksrc_src)                  \
+static void __init omap##name##_timer_init(void)                        \
+{                                                                       \
+        omap2_gp_clockevent_init((clkev_nr), clkev_src);                \
+        omap2_gp_clocksource_init((clksrc_nr), clksrc_src);             \
+}
+
+#define OMAP_SYS_TIMER(name)                                            \
+struct sys_timer omap##name##_timer = {                                 \
+        .init   = omap##name##_timer_init,                              \
+};
+
+#ifdef CONFIG_ARCH_OMAP2
+OMAP_SYS_TIMER_INIT(2, 1, OMAP2_CLKEV_SOURCE, 2, OMAP2_MPU_SOURCE)
+OMAP_SYS_TIMER(2)
+#endif
+
+#ifdef CONFIG_ARCH_OMAP3
+OMAP_SYS_TIMER_INIT(3, 1, OMAP3_CLKEV_SOURCE, 2, OMAP3_MPU_SOURCE)
+OMAP_SYS_TIMER(3)
+OMAP_SYS_TIMER_INIT(3_secure, OMAP3_SECURE_TIMER, OMAP3_CLKEV_SOURCE,
+                        2, OMAP3_MPU_SOURCE)
+OMAP_SYS_TIMER(3_secure)
+#endif
+
+#ifdef CONFIG_ARCH_OMAP4
+static void __init omap4_timer_init(void)
+{
+#ifdef CONFIG_LOCAL_TIMERS
+        twd_base = ioremap(OMAP44XX_LOCAL_TWD_BASE, SZ_256);
+        BUG_ON(!twd_base);
+#endif
+        omap2_gp_clockevent_init(1, OMAP4_CLKEV_SOURCE);
+        omap2_gp_clocksource_init(2, OMAP4_MPU_SOURCE);
+}
+OMAP_SYS_TIMER(4)
+#endif
diff --git a/arch/arm/mach-omap2/twl-common.c b/arch/arm/mach-omap2/twl-common.c
new file mode 100644
index 000000000000..3aaa46f6cd12
--- /dev/null
+++ b/arch/arm/mach-omap2/twl-common.c
@@ -0,0 +1,304 @@
+/*
+ * twl-common.c
+ *
+ * Copyright (C) 2011 Texas Instruments, Inc..
+ * Author: Peter Ujfalusi <peter.ujfalusi@ti.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
+ * 02110-1301 USA
+ *
+ */
+
+#include <linux/i2c.h>
+#include <linux/i2c/twl.h>
+#include <linux/gpio.h>
+#include <linux/regulator/machine.h>
+#include <linux/regulator/fixed.h>
+
+#include <plat/i2c.h>
+#include <plat/usb.h>
+
+#include "twl-common.h"
+
+static struct i2c_board_info __initdata pmic_i2c_board_info = {
+        .addr           = 0x48,
+        .flags          = I2C_CLIENT_WAKE,
+};
+
+void __init omap_pmic_init(int bus, u32 clkrate,
+                           const char *pmic_type, int pmic_irq,
+                           struct twl4030_platform_data *pmic_data)
+{
+        strncpy(pmic_i2c_board_info.type, pmic_type,
+                sizeof(pmic_i2c_board_info.type));
+        pmic_i2c_board_info.irq = pmic_irq;
+        pmic_i2c_board_info.platform_data = pmic_data;
+
+        omap_register_i2c_bus(bus, clkrate, &pmic_i2c_board_info, 1);
+}
+
+static struct twl4030_usb_data omap4_usb_pdata = {
+        .phy_init       = omap4430_phy_init,
+        .phy_exit       = omap4430_phy_exit,
+        .phy_power      = omap4430_phy_power,
+        .phy_set_clock  = omap4430_phy_set_clk,
+        .phy_suspend    = omap4430_phy_suspend,
+};
+
+static struct twl4030_usb_data omap3_usb_pdata = {
+        .usb_mode       = T2_USB_MODE_ULPI,
+};
+
+static int omap3_batt_table[] = {
+/* 0 C */
+30800, 29500, 28300, 27100,
+26000, 24900, 23900, 22900, 22000, 21100, 20300, 19400, 18700, 17900,
+17200, 16500, 15900, 15300, 14700, 14100, 13600, 13100, 12600, 12100,
+11600, 11200, 10800, 10400, 10000, 9630,  9280,  8950,  8620,  8310,
+8020,  7730,  7460,  7200,  6950,  6710,  6470,  6250,  6040,  5830,
+5640,  5450,  5260,  5090,  4920,  4760,  4600,  4450,  4310,  4170,
+4040,  3910,  3790,  3670,  3550
+};
+
+static struct twl4030_bci_platform_data omap3_bci_pdata = {
+        .battery_tmp_tbl        = omap3_batt_table,
+        .tblsize                = ARRAY_SIZE(omap3_batt_table),
+};
+
+static struct twl4030_madc_platform_data omap3_madc_pdata = {
+        .irq_line       = 1,
+};
+
+static struct twl4030_codec_audio_data omap3_audio;
+
+static struct twl4030_codec_data omap3_codec_pdata = {
+        .audio_mclk = 26000000,
+        .audio = &omap3_audio,
+};
+
+static struct regulator_consumer_supply omap3_vdda_dac_supplies[] = {
+        REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"),
+};
+
+static struct regulator_init_data omap3_vdac_idata = {
+        .constraints = {
+                .min_uV                 = 1800000,
+                .max_uV                 = 1800000,
+                .valid_modes_mask       = REGULATOR_MODE_NORMAL
+                                        | REGULATOR_MODE_STANDBY,
+                .valid_ops_mask         = REGULATOR_CHANGE_MODE
+                                        | REGULATOR_CHANGE_STATUS,
+        },
+        .num_consumer_supplies  = ARRAY_SIZE(omap3_vdda_dac_supplies),
+        .consumer_supplies      = omap3_vdda_dac_supplies,
+};
+
+static struct regulator_consumer_supply omap3_vpll2_supplies[] = {
+        REGULATOR_SUPPLY("vdds_dsi", "omapdss"),
+        REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"),
+};
+
+static struct regulator_init_data omap3_vpll2_idata = {
+        .constraints = {
+                .min_uV                 = 1800000,
+                .max_uV                 = 1800000,
+                .valid_modes_mask       = REGULATOR_MODE_NORMAL
+                                        | REGULATOR_MODE_STANDBY,
+                .valid_ops_mask         = REGULATOR_CHANGE_MODE
+                                        | REGULATOR_CHANGE_STATUS,
+        },
+        .num_consumer_supplies          = ARRAY_SIZE(omap3_vpll2_supplies),
+        .consumer_supplies              = omap3_vpll2_supplies,
+};
+
+static struct regulator_init_data omap4_vdac_idata = {
+        .constraints = {
+                .min_uV                 = 1800000,
+                .max_uV                 = 1800000,
+                .valid_modes_mask       = REGULATOR_MODE_NORMAL
+                                        | REGULATOR_MODE_STANDBY,
+                .valid_ops_mask         = REGULATOR_CHANGE_MODE
+                                        | REGULATOR_CHANGE_STATUS,
+        },
+};
+
+static struct regulator_init_data omap4_vaux2_idata = {
+        .constraints = {
+                .min_uV                 = 1200000,
+                .max_uV                 = 2800000,
+                .apply_uV               = true,
+                .valid_modes_mask       = REGULATOR_MODE_NORMAL
+                                        | REGULATOR_MODE_STANDBY,
+                .valid_ops_mask         = REGULATOR_CHANGE_VOLTAGE
+                                        | REGULATOR_CHANGE_MODE
+                                        | REGULATOR_CHANGE_STATUS,
+        },
+};
+
+static struct regulator_init_data omap4_vaux3_idata = {
+        .constraints = {
+                .min_uV                 = 1000000,
+                .max_uV                 = 3000000,
+                .apply_uV               = true,
+                .valid_modes_mask       = REGULATOR_MODE_NORMAL
+                                        | REGULATOR_MODE_STANDBY,
+                .valid_ops_mask         = REGULATOR_CHANGE_VOLTAGE
+                                        | REGULATOR_CHANGE_MODE
+                                        | REGULATOR_CHANGE_STATUS,
+        },
+};
+
+static struct regulator_consumer_supply omap4_vmmc_supply[] = {
+        REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
+};
+
+/* VMMC1 for MMC1 card */
+static struct regulator_init_data omap4_vmmc_idata = {
+        .constraints = {
+                .min_uV                 = 1200000,
+                .max_uV                 = 3000000,
+                .apply_uV               = true,
+                .valid_modes_mask       = REGULATOR_MODE_NORMAL
+                                        | REGULATOR_MODE_STANDBY,
+                .valid_ops_mask         = REGULATOR_CHANGE_VOLTAGE
+                                        | REGULATOR_CHANGE_MODE
+                                        | REGULATOR_CHANGE_STATUS,
+        },
+        .num_consumer_supplies  = ARRAY_SIZE(omap4_vmmc_supply),
+        .consumer_supplies      = omap4_vmmc_supply,
+};
+
+static struct regulator_init_data omap4_vpp_idata = {
+        .constraints = {
+                .min_uV                 = 1800000,
+                .max_uV                 = 2500000,
+                .apply_uV               = true,
+                .valid_modes_mask       = REGULATOR_MODE_NORMAL
+                                        | REGULATOR_MODE_STANDBY,
+                .valid_ops_mask         = REGULATOR_CHANGE_VOLTAGE
+                                        | REGULATOR_CHANGE_MODE
+                                        | REGULATOR_CHANGE_STATUS,
+        },
+};
+
+static struct regulator_init_data omap4_vana_idata = {
+        .constraints = {
+                .min_uV                 = 2100000,
+                .max_uV                 = 2100000,
+                .valid_modes_mask       = REGULATOR_MODE_NORMAL
+                                        | REGULATOR_MODE_STANDBY,
+                .valid_ops_mask         = REGULATOR_CHANGE_MODE
+                                        | REGULATOR_CHANGE_STATUS,
+        },
+};
+
+static struct regulator_init_data omap4_vcxio_idata = {
+        .constraints = {
+                .min_uV                 = 1800000,
+                .max_uV                 = 1800000,
+                .valid_modes_mask       = REGULATOR_MODE_NORMAL
+                                        | REGULATOR_MODE_STANDBY,
+                .valid_ops_mask         = REGULATOR_CHANGE_MODE
+                                        | REGULATOR_CHANGE_STATUS,
+        },
+};
+
+static struct regulator_init_data omap4_vusb_idata = {
+        .constraints = {
+                .min_uV                 = 3300000,
+                .max_uV                 = 3300000,
+                .apply_uV               = true,
+                .valid_modes_mask       = REGULATOR_MODE_NORMAL
+                                        | REGULATOR_MODE_STANDBY,
+                .valid_ops_mask         = REGULATOR_CHANGE_MODE
+                                        | REGULATOR_CHANGE_STATUS,
+        },
+};
+
+static struct regulator_init_data omap4_clk32kg_idata = {
+        .constraints = {
+                .valid_ops_mask         = REGULATOR_CHANGE_STATUS,
+        },
+};
+
+void __init omap4_pmic_get_config(struct twl4030_platform_data *pmic_data,
+                                  u32 pdata_flags, u32 regulators_flags)
+{
+        if (!pmic_data->irq_base)
+                pmic_data->irq_base = TWL6030_IRQ_BASE;
+        if (!pmic_data->irq_end)
+                pmic_data->irq_end = TWL6030_IRQ_END;
+
+        /* Common platform data configurations */
+        if (pdata_flags & TWL_COMMON_PDATA_USB && !pmic_data->usb)
+                pmic_data->usb = &omap4_usb_pdata;
+
+        /* Common regulator configurations */
+        if (regulators_flags & TWL_COMMON_REGULATOR_VDAC && !pmic_data->vdac)
+                pmic_data->vdac = &omap4_vdac_idata;
+
+        if (regulators_flags & TWL_COMMON_REGULATOR_VAUX2 && !pmic_data->vaux2)
+                pmic_data->vaux2 = &omap4_vaux2_idata;
+
+        if (regulators_flags & TWL_COMMON_REGULATOR_VAUX3 && !pmic_data->vaux3)
+                pmic_data->vaux3 = &omap4_vaux3_idata;
+
+        if (regulators_flags & TWL_COMMON_REGULATOR_VMMC && !pmic_data->vmmc)
+                pmic_data->vmmc = &omap4_vmmc_idata;
+
+        if (regulators_flags & TWL_COMMON_REGULATOR_VPP && !pmic_data->vpp)
+                pmic_data->vpp = &omap4_vpp_idata;
+
+        if (regulators_flags & TWL_COMMON_REGULATOR_VANA && !pmic_data->vana)
+                pmic_data->vana = &omap4_vana_idata;
+
+        if (regulators_flags & TWL_COMMON_REGULATOR_VCXIO && !pmic_data->vcxio)
+                pmic_data->vcxio = &omap4_vcxio_idata;
+
+        if (regulators_flags & TWL_COMMON_REGULATOR_VUSB && !pmic_data->vusb)
+                pmic_data->vusb = &omap4_vusb_idata;
+
+        if (regulators_flags & TWL_COMMON_REGULATOR_CLK32KG &&
+            !pmic_data->clk32kg)
+                pmic_data->clk32kg = &omap4_clk32kg_idata;
+}
+
+void __init omap3_pmic_get_config(struct twl4030_platform_data *pmic_data,
+                                  u32 pdata_flags, u32 regulators_flags)
+{
+        if (!pmic_data->irq_base)
+                pmic_data->irq_base = TWL4030_IRQ_BASE;
+        if (!pmic_data->irq_end)
+                pmic_data->irq_end = TWL4030_IRQ_END;
+
+        /* Common platform data configurations */
+        if (pdata_flags & TWL_COMMON_PDATA_USB && !pmic_data->usb)
+                pmic_data->usb = &omap3_usb_pdata;
+
+        if (pdata_flags & TWL_COMMON_PDATA_BCI && !pmic_data->bci)
+                pmic_data->bci = &omap3_bci_pdata;
+
+        if (pdata_flags & TWL_COMMON_PDATA_MADC && !pmic_data->madc)
+                pmic_data->madc = &omap3_madc_pdata;
+
+        if (pdata_flags & TWL_COMMON_PDATA_AUDIO && !pmic_data->codec)
+                pmic_data->codec = &omap3_codec_pdata;
+
+        /* Common regulator configurations */
+        if (regulators_flags & TWL_COMMON_REGULATOR_VDAC && !pmic_data->vdac)
+                pmic_data->vdac = &omap3_vdac_idata;
+
+        if (regulators_flags & TWL_COMMON_REGULATOR_VPLL2 && !pmic_data->vpll2)
+                pmic_data->vpll2 = &omap3_vpll2_idata;
+}
diff --git a/arch/arm/mach-omap2/twl-common.h b/arch/arm/mach-omap2/twl-common.h
new file mode 100644
index 000000000000..5e83a5bd37fb
--- /dev/null
+++ b/arch/arm/mach-omap2/twl-common.h
@@ -0,0 +1,59 @@
+#ifndef __OMAP_PMIC_COMMON__
+#define __OMAP_PMIC_COMMON__
+
+#define TWL_COMMON_PDATA_USB            (1 << 0)
+#define TWL_COMMON_PDATA_BCI            (1 << 1)
+#define TWL_COMMON_PDATA_MADC           (1 << 2)
+#define TWL_COMMON_PDATA_AUDIO          (1 << 3)
+
+/* Common LDO regulators for TWL4030/TWL6030 */
+#define TWL_COMMON_REGULATOR_VDAC       (1 << 0)
+#define TWL_COMMON_REGULATOR_VAUX1      (1 << 1)
+#define TWL_COMMON_REGULATOR_VAUX2      (1 << 2)
+#define TWL_COMMON_REGULATOR_VAUX3      (1 << 3)
+
+/* TWL6030 LDO regulators */
+#define TWL_COMMON_REGULATOR_VMMC       (1 << 4)
+#define TWL_COMMON_REGULATOR_VPP        (1 << 5)
+#define TWL_COMMON_REGULATOR_VUSIM      (1 << 6)
+#define TWL_COMMON_REGULATOR_VANA       (1 << 7)
+#define TWL_COMMON_REGULATOR_VCXIO      (1 << 8)
+#define TWL_COMMON_REGULATOR_VUSB       (1 << 9)
+#define TWL_COMMON_REGULATOR_CLK32KG    (1 << 10)
+
+/* TWL4030 LDO regulators */
+#define TWL_COMMON_REGULATOR_VPLL1      (1 << 4)
+#define TWL_COMMON_REGULATOR_VPLL2      (1 << 5)
+
+
+struct twl4030_platform_data;
+
+void omap_pmic_init(int bus, u32 clkrate, const char *pmic_type, int pmic_irq,
+                    struct twl4030_platform_data *pmic_data);
+
+static inline void omap2_pmic_init(const char *pmic_type,
+                                   struct twl4030_platform_data *pmic_data)
+{
+        omap_pmic_init(2, 2600, pmic_type, INT_24XX_SYS_NIRQ, pmic_data);
+}
+
+static inline void omap3_pmic_init(const char *pmic_type,
+                                   struct twl4030_platform_data *pmic_data)
+{
+        omap_pmic_init(1, 2600, pmic_type, INT_34XX_SYS_NIRQ, pmic_data);
+}
+
+static inline void omap4_pmic_init(const char *pmic_type,
+                                   struct twl4030_platform_data *pmic_data)
+{
+        /* Phoenix Audio IC needs I2C1 to start with 400 KHz or less */
+        omap_pmic_init(1, 400, pmic_type, OMAP44XX_IRQ_SYS_1N, pmic_data);
+}
+
+void omap3_pmic_get_config(struct twl4030_platform_data *pmic_data,
+                           u32 pdata_flags, u32 regulators_flags);
+
+void omap4_pmic_get_config(struct twl4030_platform_data *pmic_data,
+                           u32 pdata_flags, u32 regulators_flags);
+
+#endif /* __OMAP_PMIC_COMMON__ */
diff --git a/arch/arm/mach-pxa/cm-x300.c b/arch/arm/mach-pxa/cm-x300.c
index b2248e76ec8b..b199596f9c3d 100644
--- a/arch/arm/mach-pxa/cm-x300.c
+++ b/arch/arm/mach-pxa/cm-x300.c
@@ -12,6 +12,7 @@
  * it under the terms of the GNU General Public License version 2 as
  * published by the Free Software Foundation.
  */
+#define pr_fmt(fmt) "%s: " fmt, __func__
 
 #include <linux/module.h>
 #include <linux/kernel.h>
@@ -161,10 +162,10 @@ static mfp_cfg_t cm_x3xx_mfp_cfg[] __initdata = {
         GPIO99_GPIO,                    /* Ethernet IRQ */
 
         /* RTC GPIOs */
-        GPIO95_GPIO,                    /* RTC CS */
-        GPIO96_GPIO,                    /* RTC WR */
-        GPIO97_GPIO,                    /* RTC RD */
-        GPIO98_GPIO,                    /* RTC IO */
+        GPIO95_GPIO | MFP_LPM_DRIVE_HIGH,       /* RTC CS */
+        GPIO96_GPIO | MFP_LPM_DRIVE_HIGH,       /* RTC WR */
+        GPIO97_GPIO | MFP_LPM_DRIVE_HIGH,       /* RTC RD */
+        GPIO98_GPIO,                            /* RTC IO */
 
         /* Standard I2C */
         GPIO21_I2C_SCL,
@@ -484,14 +485,13 @@ static int cm_x300_ulpi_phy_reset(void)
         int err;
 
         /* reset the PHY */
-        err = gpio_request(GPIO_ULPI_PHY_RST, "ulpi reset");
+        err = gpio_request_one(GPIO_ULPI_PHY_RST, GPIOF_OUT_INIT_LOW,
+                               "ulpi reset");
         if (err) {
-                pr_err("%s: failed to request ULPI reset GPIO: %d\n",
-                       __func__, err);
+                pr_err("failed to request ULPI reset GPIO: %d\n", err);
                 return err;
         }
 
-        gpio_direction_output(GPIO_ULPI_PHY_RST, 0);
         msleep(10);
         gpio_set_value(GPIO_ULPI_PHY_RST, 1);
         msleep(10);
@@ -510,8 +510,7 @@ static inline int cm_x300_u2d_init(struct device *dev)
                 pout_clk = clk_get(NULL, "CLK_POUT");
                 if (IS_ERR(pout_clk)) {
                         err = PTR_ERR(pout_clk);
-                        pr_err("%s: failed to get CLK_POUT: %d\n",
-                               __func__, err);
+                        pr_err("failed to get CLK_POUT: %d\n", err);
                         return err;
                 }
                 clk_enable(pout_clk);
@@ -768,39 +767,36 @@ static void __init cm_x300_init_da9030(void)
         irq_set_irq_wake(IRQ_WAKEUP0, 1);
 }
 
+/* wi2wi gpio setting for system_rev >= 130 */
+static struct gpio cm_x300_wi2wi_gpios[] __initdata = {
+        { 71, GPIOF_OUT_INIT_HIGH, "wlan en" },
+        { 70, GPIOF_OUT_INIT_HIGH, "bt reset" },
+};
+
 static void __init cm_x300_init_wi2wi(void)
 {
         int bt_reset, wlan_en;
         int err;
 
         if (system_rev < 130) {
-                wlan_en = 77;
-                bt_reset = 78;
-        } else {
-                wlan_en = 71;
-                bt_reset = 70;
+                cm_x300_wi2wi_gpios[0].gpio = 77;       /* wlan en */
+                cm_x300_wi2wi_gpios[1].gpio = 78;       /* bt reset */
         }
 
         /* Libertas and CSR reset */
-        err = gpio_request(wlan_en, "wlan en");
+        err = gpio_request_array(ARRAY_AND_SIZE(cm_x300_wi2wi_gpios));
         if (err) {
-                pr_err("CM-X300: failed to request wlan en gpio: %d\n", err);
-        } else {
-                gpio_direction_output(wlan_en, 1);
-                gpio_free(wlan_en);
+                pr_err("failed to request wifi/bt gpios: %d\n", err);
+                return;
         }
 
-        err = gpio_request(bt_reset, "bt reset");
-        if (err) {
-                pr_err("CM-X300: failed to request bt reset gpio: %d\n", err);
-        } else {
-                gpio_direction_output(bt_reset, 1);
-                udelay(10);
-                gpio_set_value(bt_reset, 0);
-                udelay(10);
-                gpio_set_value(bt_reset, 1);
-                gpio_free(bt_reset);
-        }
+        udelay(10);
+        gpio_set_value(bt_reset, 0);
+        udelay(10);
+        gpio_set_value(bt_reset, 1);
+
+        gpio_free(wlan_en);
+        gpio_free(bt_reset);
 }
 
 /* MFP */
diff --git a/arch/arm/mach-pxa/hx4700.c b/arch/arm/mach-pxa/hx4700.c
index f941a495a4a8..99960a1814e0 100644
--- a/arch/arm/mach-pxa/hx4700.c
+++ b/arch/arm/mach-pxa/hx4700.c
@@ -135,42 +135,6 @@ static unsigned long hx4700_pin_config[] __initdata = {
         GPIO66_GPIO,    /* nSDIO_IRQ */
 };
 
-#define HX4700_GPIO_IN(num, _desc) \
-        { .gpio = (num), .dir = 0, .desc = (_desc) }
-#define HX4700_GPIO_OUT(num, _init, _desc) \
-        { .gpio = (num), .dir = 1, .init = (_init), .desc = (_desc) }
-struct gpio_ress {
-        unsigned gpio : 8;
-        unsigned dir : 1;
-        unsigned init : 1;
-        char *desc;
-};
-
-static int hx4700_gpio_request(struct gpio_ress *gpios, int size)
-{
-        int i, rc = 0;
-        int gpio;
-        int dir;
-
-        for (i = 0; (!rc) && (i < size); i++) {
-                gpio = gpios[i].gpio;
-                dir = gpios[i].dir;
-                rc = gpio_request(gpio, gpios[i].desc);
-                if (rc) {
-                        pr_err("Error requesting GPIO %d(%s) : %d\n",
-                               gpio, gpios[i].desc, rc);
-                        continue;
-                }
-                if (dir)
-                        gpio_direction_output(gpio, gpios[i].init);
-                else
-                        gpio_direction_input(gpio);
-        }
-        while ((rc) && (--i >= 0))
-                gpio_free(gpios[i].gpio);
-        return rc;
-}
-
 /*
  * IRDA
  */
@@ -829,26 +793,30 @@ static struct platform_device *devices[] __initdata = {
         &pcmcia,
 };
 
-static struct gpio_ress global_gpios[] = {
-        HX4700_GPIO_IN(GPIO12_HX4700_ASIC3_IRQ, "ASIC3_IRQ"),
-        HX4700_GPIO_IN(GPIO13_HX4700_W3220_IRQ, "W3220_IRQ"),
-        HX4700_GPIO_IN(GPIO14_HX4700_nWLAN_IRQ, "WLAN_IRQ"),
-        HX4700_GPIO_OUT(GPIO59_HX4700_LCD_PC1,          1, "LCD_PC1"),
-        HX4700_GPIO_OUT(GPIO62_HX4700_LCD_nRESET,       1, "LCD_RESET"),
-        HX4700_GPIO_OUT(GPIO70_HX4700_LCD_SLIN1,        1, "LCD_SLIN1"),
-        HX4700_GPIO_OUT(GPIO84_HX4700_LCD_SQN,          1, "LCD_SQN"),
-        HX4700_GPIO_OUT(GPIO110_HX4700_LCD_LVDD_3V3_ON, 1, "LCD_LVDD"),
-        HX4700_GPIO_OUT(GPIO111_HX4700_LCD_AVDD_3V3_ON, 1, "LCD_AVDD"),
-        HX4700_GPIO_OUT(GPIO32_HX4700_RS232_ON,         1, "RS232_ON"),
-        HX4700_GPIO_OUT(GPIO71_HX4700_ASIC3_nRESET,     1, "ASIC3_nRESET"),
-        HX4700_GPIO_OUT(GPIO82_HX4700_EUART_RESET,      1, "EUART_RESET"),
-        HX4700_GPIO_OUT(GPIO105_HX4700_nIR_ON,          1, "nIR_EN"),
+static struct gpio global_gpios[] = {
+        { GPIO12_HX4700_ASIC3_IRQ, GPIOF_IN, "ASIC3_IRQ" },
+        { GPIO13_HX4700_W3220_IRQ, GPIOF_IN, "W3220_IRQ" },
+        { GPIO14_HX4700_nWLAN_IRQ, GPIOF_IN, "WLAN_IRQ" },
+        { GPIO59_HX4700_LCD_PC1,          GPIOF_OUT_INIT_HIGH, "LCD_PC1" },
+        { GPIO62_HX4700_LCD_nRESET,       GPIOF_OUT_INIT_HIGH, "LCD_RESET" },
+        { GPIO70_HX4700_LCD_SLIN1,        GPIOF_OUT_INIT_HIGH, "LCD_SLIN1" },
+        { GPIO84_HX4700_LCD_SQN,          GPIOF_OUT_INIT_HIGH, "LCD_SQN" },
+        { GPIO110_HX4700_LCD_LVDD_3V3_ON, GPIOF_OUT_INIT_HIGH, "LCD_LVDD" },
+        { GPIO111_HX4700_LCD_AVDD_3V3_ON, GPIOF_OUT_INIT_HIGH, "LCD_AVDD" },
+        { GPIO32_HX4700_RS232_ON,         GPIOF_OUT_INIT_HIGH, "RS232_ON" },
+        { GPIO71_HX4700_ASIC3_nRESET,     GPIOF_OUT_INIT_HIGH, "ASIC3_nRESET" },
+        { GPIO82_HX4700_EUART_RESET,      GPIOF_OUT_INIT_HIGH, "EUART_RESET" },
+        { GPIO105_HX4700_nIR_ON,          GPIOF_OUT_INIT_HIGH, "nIR_EN" },
 };
 
 static void __init hx4700_init(void)
 {
+        int ret;
+
         pxa2xx_mfp_config(ARRAY_AND_SIZE(hx4700_pin_config));
-        hx4700_gpio_request(ARRAY_AND_SIZE(global_gpios));
+        ret = gpio_request_array(ARRAY_AND_SIZE(global_gpios));
+        if (ret)
+                pr_err ("hx4700: Failed to request GPIOs.\n");
 
         pxa_set_ffuart_info(NULL);
         pxa_set_btuart_info(NULL);
diff --git a/arch/arm/mach-pxa/include/mach/magician.h b/arch/arm/mach-pxa/include/mach/magician.h
index 0a2efcf7947c..7cbfc5d3f9df 100644
--- a/arch/arm/mach-pxa/include/mach/magician.h
+++ b/arch/arm/mach-pxa/include/mach/magician.h
@@ -12,6 +12,7 @@
 #ifndef _MAGICIAN_H_
 #define _MAGICIAN_H_
 
+#include <linux/gpio.h>
 #include <mach/irqs.h>
 
 /*
@@ -77,7 +78,7 @@
  * CPLD EGPIOs
  */
 
-#define MAGICIAN_EGPIO_BASE                     0x80 /* GPIO_BOARD_START */
+#define MAGICIAN_EGPIO_BASE                     NR_BUILTIN_GPIO
 #define MAGICIAN_EGPIO(reg,bit) \
         (MAGICIAN_EGPIO_BASE + 8*reg + bit)
 
diff --git a/arch/arm/mach-pxa/magician.c b/arch/arm/mach-pxa/magician.c
index e1920572948a..0e42798942f7 100644
--- a/arch/arm/mach-pxa/magician.c
+++ b/arch/arm/mach-pxa/magician.c
@@ -344,22 +344,14 @@ static struct pxafb_mach_info samsung_info = {
  * Backlight
  */
 
+static struct gpio magician_bl_gpios[] = {
+        { EGPIO_MAGICIAN_BL_POWER,  GPIOF_DIR_OUT, "Backlight power" },
+        { EGPIO_MAGICIAN_BL_POWER2, GPIOF_DIR_OUT, "Backlight power 2" },
+};
+
 static int magician_backlight_init(struct device *dev)
 {
-        int ret;
-
-        ret = gpio_request(EGPIO_MAGICIAN_BL_POWER, "BL_POWER");
-        if (ret)
-                goto err;
-        ret = gpio_request(EGPIO_MAGICIAN_BL_POWER2, "BL_POWER2");
-        if (ret)
-                goto err2;
-        return 0;
-
-err2:
-        gpio_free(EGPIO_MAGICIAN_BL_POWER);
-err:
-        return ret;
+        return gpio_request_array(ARRAY_AND_SIZE(magician_bl_gpios));
 }
 
 static int magician_backlight_notify(struct device *dev, int brightness)
@@ -376,8 +368,7 @@ static int magician_backlight_notify(struct device *dev, int brightness)
 
 static void magician_backlight_exit(struct device *dev)
 {
-        gpio_free(EGPIO_MAGICIAN_BL_POWER);
-        gpio_free(EGPIO_MAGICIAN_BL_POWER2);
+        gpio_free_array(ARRAY_AND_SIZE(magician_bl_gpios));
 }
 
 static struct platform_pwm_backlight_data backlight_data = {
@@ -712,16 +703,25 @@ static struct platform_device *devices[] __initdata = {
         &leds_gpio,
 };
 
+static struct gpio magician_global_gpios[] = {
+        { GPIO13_MAGICIAN_CPLD_IRQ,   GPIOF_IN, "CPLD_IRQ" },
+        { GPIO107_MAGICIAN_DS1WM_IRQ, GPIOF_IN, "DS1WM_IRQ" },
+        { GPIO104_MAGICIAN_LCD_POWER_1, GPIOF_OUT_INIT_LOW, "LCD power 1" },
+        { GPIO105_MAGICIAN_LCD_POWER_2, GPIOF_OUT_INIT_LOW, "LCD power 2" },
+        { GPIO106_MAGICIAN_LCD_POWER_3, GPIOF_OUT_INIT_LOW, "LCD power 3" },
+        { GPIO83_MAGICIAN_nIR_EN, GPIOF_OUT_INIT_HIGH, "nIR_EN" },
+};
+
 static void __init magician_init(void)
 {
         void __iomem *cpld;
         int lcd_select;
         int err;
 
-        gpio_request(GPIO13_MAGICIAN_CPLD_IRQ, "CPLD_IRQ");
-        gpio_request(GPIO107_MAGICIAN_DS1WM_IRQ, "DS1WM_IRQ");
-
         pxa2xx_mfp_config(ARRAY_AND_SIZE(magician_pin_config));
+        err = gpio_request_array(ARRAY_AND_SIZE(magician_global_gpios));
+        if (err)
+                pr_err("magician: Failed to request GPIOs: %d\n", err);
 
         pxa_set_ffuart_info(NULL);
         pxa_set_btuart_info(NULL);
@@ -729,11 +729,7 @@ static void __init magician_init(void)
 
         platform_add_devices(ARRAY_AND_SIZE(devices));
 
-        err = gpio_request(GPIO83_MAGICIAN_nIR_EN, "nIR_EN");
-        if (!err) {
-                gpio_direction_output(GPIO83_MAGICIAN_nIR_EN, 1);
-                pxa_set_ficp_info(&magician_ficp_info);
-        }
+        pxa_set_ficp_info(&magician_ficp_info);
         pxa27x_set_i2c_power_info(NULL);
         pxa_set_i2c_info(&i2c_info);
         pxa_set_mci_info(&magician_mci_info);
@@ -747,16 +743,9 @@ static void __init magician_init(void)
                 system_rev = board_id & 0x7;
                 lcd_select = board_id & 0x8;
                 pr_info("LCD type: %s\n", lcd_select ? "Samsung" : "Toppoly");
-                if (lcd_select && (system_rev < 3)) {
-                        gpio_request(GPIO75_MAGICIAN_SAMSUNG_POWER, "SAMSUNG_POWER");
-                        gpio_direction_output(GPIO75_MAGICIAN_SAMSUNG_POWER, 0);
-                }
-                gpio_request(GPIO104_MAGICIAN_LCD_POWER_1, "LCD_POWER_1");
-                gpio_request(GPIO105_MAGICIAN_LCD_POWER_2, "LCD_POWER_2");
-                gpio_request(GPIO106_MAGICIAN_LCD_POWER_3, "LCD_POWER_3");
-                gpio_direction_output(GPIO104_MAGICIAN_LCD_POWER_1, 0);
-                gpio_direction_output(GPIO105_MAGICIAN_LCD_POWER_2, 0);
-                gpio_direction_output(GPIO106_MAGICIAN_LCD_POWER_3, 0);
+                if (lcd_select && (system_rev < 3))
+                        gpio_request_one(GPIO75_MAGICIAN_SAMSUNG_POWER,
+                                         GPIOF_OUT_INIT_LOW, "SAMSUNG_POWER");
                 pxa_set_fb_info(NULL, lcd_select ? &samsung_info : &toppoly_info);
         } else
                 pr_err("LCD detection: CPLD mapping failed\n");
diff --git a/arch/arm/mach-pxa/mioa701.c b/arch/arm/mach-pxa/mioa701.c
index e3470137c934..aa67637ae41d 100644
--- a/arch/arm/mach-pxa/mioa701.c
+++ b/arch/arm/mach-pxa/mioa701.c
@@ -177,50 +177,6 @@ static unsigned long mioa701_pin_config[] = {
         MFP_CFG_OUT(GPIO116, AF0, DRIVE_HIGH),
 };
 
-#define MIO_GPIO_IN(num, _desc) \
-        { .gpio = (num), .dir = 0, .desc = (_desc) }
-#define MIO_GPIO_OUT(num, _init, _desc) \
-        { .gpio = (num), .dir = 1, .init = (_init), .desc = (_desc) }
-struct gpio_ress {
-        unsigned gpio : 8;
-        unsigned dir : 1;
-        unsigned init : 1;
-        char *desc;
-};
-
-static int mio_gpio_request(struct gpio_ress *gpios, int size)
-{
-        int i, rc = 0;
-        int gpio;
-        int dir;
-
-        for (i = 0; (!rc) && (i < size); i++) {
-                gpio = gpios[i].gpio;
-                dir = gpios[i].dir;
-                rc = gpio_request(gpio, gpios[i].desc);
-                if (rc) {
-                        printk(KERN_ERR "Error requesting GPIO %d(%s) : %d\n",
-                               gpio, gpios[i].desc, rc);
-                        continue;
-                }
-                if (dir)
-                        gpio_direction_output(gpio, gpios[i].init);
-                else
-                        gpio_direction_input(gpio);
-        }
-        while ((rc) && (--i >= 0))
-                gpio_free(gpios[i].gpio);
-        return rc;
-}
-
-static void mio_gpio_free(struct gpio_ress *gpios, int size)
-{
-        int i;
-
-        for (i = 0; i < size; i++)
-                gpio_free(gpios[i].gpio);
-}
-
 /* LCD Screen and Backlight */
 static struct platform_pwm_backlight_data mioa701_backlight_data = {
         .pwm_id         = 0,
@@ -346,16 +302,16 @@ irqreturn_t gsm_on_irq(int irq, void *p)
         return IRQ_HANDLED;
 }
 
-struct gpio_ress gsm_gpios[] = {
-        MIO_GPIO_IN(GPIO25_GSM_MOD_ON_STATE, "GSM state"),
-        MIO_GPIO_IN(GPIO113_GSM_EVENT, "GSM event"),
+static struct gpio gsm_gpios[] = {
+        { GPIO25_GSM_MOD_ON_STATE, GPIOF_IN, "GSM state" },
+        { GPIO113_GSM_EVENT, GPIOF_IN, "GSM event" },
 };
 
 static int __init gsm_init(void)
 {
         int rc;
 
-        rc = mio_gpio_request(ARRAY_AND_SIZE(gsm_gpios));
+        rc = gpio_request_array(ARRAY_AND_SIZE(gsm_gpios));
         if (rc)
                 goto err_gpio;
         rc = request_irq(gpio_to_irq(GPIO25_GSM_MOD_ON_STATE), gsm_on_irq,
@@ -369,7 +325,7 @@ static int __init gsm_init(void)
 
 err_irq:
         printk(KERN_ERR "Mioa701: Can't request GSM_ON irq\n");
-        mio_gpio_free(ARRAY_AND_SIZE(gsm_gpios));
+        gpio_free_array(ARRAY_AND_SIZE(gsm_gpios));
 err_gpio:
         printk(KERN_ERR "Mioa701: gsm not available\n");
         return rc;
@@ -378,7 +334,7 @@ err_gpio:
 static void gsm_exit(void)
 {
         free_irq(gpio_to_irq(GPIO25_GSM_MOD_ON_STATE), NULL);
-        mio_gpio_free(ARRAY_AND_SIZE(gsm_gpios));
+        gpio_free_array(ARRAY_AND_SIZE(gsm_gpios));
 }
 
 /*
@@ -749,14 +705,16 @@ static void mioa701_restart(char c, const char *cmd)
         arm_machine_restart('s', cmd);
 }
 
-static struct gpio_ress global_gpios[] = {
-        MIO_GPIO_OUT(GPIO9_CHARGE_EN, 1, "Charger enable"),
-        MIO_GPIO_OUT(GPIO18_POWEROFF, 0, "Power Off"),
-        MIO_GPIO_OUT(GPIO87_LCD_POWER, 0, "LCD Power"),
+static struct gpio global_gpios[] = {
+        { GPIO9_CHARGE_EN, GPIOF_OUT_INIT_HIGH, "Charger enable" },
+        { GPIO18_POWEROFF, GPIOF_OUT_INIT_LOW, "Power Off" },
+        { GPIO87_LCD_POWER, GPIOF_OUT_INIT_LOW, "LCD Power" },
 };
 
 static void __init mioa701_machine_init(void)
 {
+        int rc;
+
         PSLR  = 0xff100000; /* SYSDEL=125ms, PWRDEL=125ms, PSLR_SL_ROD=1 */
         PCFR = PCFR_DC_EN | PCFR_GPR_EN | PCFR_OPDE;
         RTTR = 32768 - 1; /* Reset crazy WinCE value */
@@ -766,7 +724,9 @@ static void __init mioa701_machine_init(void)
         pxa_set_ffuart_info(NULL);
         pxa_set_btuart_info(NULL);
         pxa_set_stuart_info(NULL);
-        mio_gpio_request(ARRAY_AND_SIZE(global_gpios));
+        rc = gpio_request_array(ARRAY_AND_SIZE(global_gpios));
+        if (rc)
+                pr_err("MioA701: Failed to request GPIOs: %d", rc);
         bootstrap_init();
         pxa_set_fb_info(NULL, &mioa701_pxafb_info);
         pxa_set_mci_info(&mioa701_mci_info);
diff --git a/arch/arm/mach-pxa/saarb.c b/arch/arm/mach-pxa/saarb.c
index 9322fe527c7f..e53a3334c944 100644
--- a/arch/arm/mach-pxa/saarb.c
+++ b/arch/arm/mach-pxa/saarb.c
@@ -104,7 +104,7 @@ static void __init saarb_init(void)
 
 MACHINE_START(SAARB, "PXA955 Handheld Platform (aka SAARB)")
         .boot_params    = 0xa0000100,
-        .map_io         = pxa_map_io,
+        .map_io         = pxa3xx_map_io,
         .nr_irqs        = SAARB_NR_IRQS,
         .init_irq       = pxa95x_init_irq,
         .timer          = &pxa_timer,
diff --git a/arch/arm/mach-s3c2412/clock.c b/arch/arm/mach-s3c2412/clock.c
index 0c0505b025cb..140711db6c89 100644
--- a/arch/arm/mach-s3c2412/clock.c
+++ b/arch/arm/mach-s3c2412/clock.c
@@ -95,12 +95,10 @@ static int s3c2412_upll_enable(struct clk *clk, int enable)
 
 static struct clk clk_erefclk = {
         .name           = "erefclk",
-        .id             = -1,
 };
 
 static struct clk clk_urefclk = {
         .name           = "urefclk",
-        .id             = -1,
 };
 
 static int s3c2412_setparent_usysclk(struct clk *clk, struct clk *parent)
@@ -122,7 +120,6 @@ static int s3c2412_setparent_usysclk(struct clk *clk, struct clk *parent)
 
 static struct clk clk_usysclk = {
         .name           = "usysclk",
-        .id             = -1,
         .parent         = &clk_xtal,
         .ops            = &(struct clk_ops) {
                 .set_parent     = s3c2412_setparent_usysclk,
@@ -132,13 +129,11 @@ static struct clk clk_usysclk = {
 static struct clk clk_mrefclk = {
         .name           = "mrefclk",
         .parent         = &clk_xtal,
-        .id             = -1,
 };
 
 static struct clk clk_mdivclk = {
         .name           = "mdivclk",
         .parent         = &clk_xtal,
-        .id             = -1,
 };
 
 static int s3c2412_setparent_usbsrc(struct clk *clk, struct clk *parent)
@@ -200,7 +195,6 @@ static int s3c2412_setrate_usbsrc(struct clk *clk, unsigned long rate)
 
 static struct clk clk_usbsrc = {
         .name           = "usbsrc",
-        .id             = -1,
         .ops            = &(struct clk_ops) {
                 .get_rate       = s3c2412_getrate_usbsrc,
                 .set_rate       = s3c2412_setrate_usbsrc,
@@ -228,7 +222,6 @@ static int s3c2412_setparent_msysclk(struct clk *clk, struct clk *parent)
 
 static struct clk clk_msysclk = {
         .name           = "msysclk",
-        .id             = -1,
         .ops            = &(struct clk_ops) {
                 .set_parent     = s3c2412_setparent_msysclk,
         },
@@ -268,7 +261,6 @@ static int s3c2412_setparent_armclk(struct clk *clk, struct clk *parent)
 
 static struct clk clk_armclk = {
         .name           = "armclk",
-        .id             = -1,
         .parent         = &clk_msysclk,
         .ops            = &(struct clk_ops) {
                 .set_parent     = s3c2412_setparent_armclk,
@@ -344,7 +336,6 @@ static int s3c2412_setrate_uart(struct clk *clk, unsigned long rate)
 
 static struct clk clk_uart = {
         .name           = "uartclk",
-        .id             = -1,
         .ops            = &(struct clk_ops) {
                 .get_rate       = s3c2412_getrate_uart,
                 .set_rate       = s3c2412_setrate_uart,
@@ -397,7 +388,6 @@ static int s3c2412_setrate_i2s(struct clk *clk, unsigned long rate)
 
 static struct clk clk_i2s = {
         .name           = "i2sclk",
-        .id             = -1,
         .ops            = &(struct clk_ops) {
                 .get_rate       = s3c2412_getrate_i2s,
                 .set_rate       = s3c2412_setrate_i2s,
@@ -449,7 +439,6 @@ static int s3c2412_setrate_cam(struct clk *clk, unsigned long rate)
 
 static struct clk clk_cam = {
         .name           = "camif-upll", /* same as 2440 name */
-        .id             = -1,
         .ops            = &(struct clk_ops) {
                 .get_rate       = s3c2412_getrate_cam,
                 .set_rate       = s3c2412_setrate_cam,
@@ -463,37 +452,31 @@ static struct clk clk_cam = {
 static struct clk init_clocks_disable[] = {
         {
                 .name           = "nand",
-                .id             = -1,
                 .parent         = &clk_h,
                 .enable         = s3c2412_clkcon_enable,
                 .ctrlbit        = S3C2412_CLKCON_NAND,
         }, {
                 .name           = "sdi",
-                .id             = -1,
                 .parent         = &clk_p,
                 .enable         = s3c2412_clkcon_enable,
                 .ctrlbit        = S3C2412_CLKCON_SDI,
         }, {
                 .name           = "adc",
-                .id             = -1,
                 .parent         = &clk_p,
                 .enable         = s3c2412_clkcon_enable,
                 .ctrlbit        = S3C2412_CLKCON_ADC,
         }, {
                 .name           = "i2c",
-                .id             = -1,
                 .parent         = &clk_p,
                 .enable         = s3c2412_clkcon_enable,
                 .ctrlbit        = S3C2412_CLKCON_IIC,
         }, {
                 .name           = "iis",
-                .id             = -1,
                 .parent         = &clk_p,
                 .enable         = s3c2412_clkcon_enable,
                 .ctrlbit        = S3C2412_CLKCON_IIS,
         }, {
                 .name           = "spi",
-                .id             = -1,
                 .parent         = &clk_p,
                 .enable         = s3c2412_clkcon_enable,
                 .ctrlbit        = S3C2412_CLKCON_SPI,
@@ -503,96 +486,83 @@ static struct clk init_clocks_disable[] = {
 static struct clk init_clocks[] = {
         {
                 .name           = "dma",
-                .id             = 0,
                 .parent         = &clk_h,
                 .enable         = s3c2412_clkcon_enable,
                 .ctrlbit        = S3C2412_CLKCON_DMA0,
         }, {
                 .name           = "dma",
-                .id             = 1,
                 .parent         = &clk_h,
                 .enable         = s3c2412_clkcon_enable,
                 .ctrlbit        = S3C2412_CLKCON_DMA1,
         }, {
                 .name           = "dma",
-                .id             = 2,
                 .parent         = &clk_h,
                 .enable         = s3c2412_clkcon_enable,
                 .ctrlbit        = S3C2412_CLKCON_DMA2,
         }, {
                 .name           = "dma",
-                .id             = 3,
                 .parent         = &clk_h,
                 .enable         = s3c2412_clkcon_enable,
                 .ctrlbit        = S3C2412_CLKCON_DMA3,
         }, {
                 .name           = "lcd",
-                .id             = -1,
                 .parent         = &clk_h,
                 .enable         = s3c2412_clkcon_enable,
                 .ctrlbit        = S3C2412_CLKCON_LCDC,
         }, {
                 .name           = "gpio",
-                .id             = -1,
                 .parent         = &clk_p,
                 .enable         = s3c2412_clkcon_enable,
                 .ctrlbit        = S3C2412_CLKCON_GPIO,
         }, {
                 .name           = "usb-host",
-                .id             = -1,
                 .parent         = &clk_h,
                 .enable         = s3c2412_clkcon_enable,
                 .ctrlbit        = S3C2412_CLKCON_USBH,
         }, {
                 .name           = "usb-device",
-                .id             = -1,
                 .parent         = &clk_h,
                 .enable         = s3c2412_clkcon_enable,
                 .ctrlbit        = S3C2412_CLKCON_USBD,
         }, {
                 .name           = "timers",
-                .id             = -1,
                 .parent         = &clk_p,
                 .enable         = s3c2412_clkcon_enable,
                 .ctrlbit        = S3C2412_CLKCON_PWMT,
         }, {
                 .name           = "uart",
-                .id             = 0,
+                .devname        = "s3c2412-uart.0",
                 .parent         = &clk_p,
                 .enable         = s3c2412_clkcon_enable,
                 .ctrlbit        = S3C2412_CLKCON_UART0,
         }, {
                 .name           = "uart",
-                .id             = 1,
+                .devname        = "s3c2412-uart.1",
                 .parent         = &clk_p,
                 .enable         = s3c2412_clkcon_enable,
                 .ctrlbit        = S3C2412_CLKCON_UART1,
         }, {
                 .name           = "uart",
-                .id             = 2,
+                .devname        = "s3c2412-uart.2",
                 .parent         = &clk_p,
                 .enable         = s3c2412_clkcon_enable,
                 .ctrlbit        = S3C2412_CLKCON_UART2,
         }, {
                 .name           = "rtc",
-                .id             = -1,
                 .parent         = &clk_p,
                 .enable         = s3c2412_clkcon_enable,
                 .ctrlbit        = S3C2412_CLKCON_RTC,
         }, {
                 .name           = "watchdog",
-                .id             = -1,
                 .parent         = &clk_p,
                 .ctrlbit        = 0,
         }, {
                 .name           = "usb-bus-gadget",
-                .id             = -1,
                 .parent         = &clk_usb_bus,
                 .enable         = s3c2412_clkcon_enable,
                 .ctrlbit        = S3C2412_CLKCON_USB_DEV48,
         }, {
                 .name           = "usb-bus-host",
-                .id             = -1,
                 .parent         = &clk_usb_bus,
                 .enable         = s3c2412_clkcon_enable,
                 .ctrlbit        = S3C2412_CLKCON_USB_HOST48,
diff --git a/arch/arm/mach-s3c2416/clock.c b/arch/arm/mach-s3c2416/clock.c
index 3b02d8506e25..21a5e81f0ab5 100644
--- a/arch/arm/mach-s3c2416/clock.c
+++ b/arch/arm/mach-s3c2416/clock.c
@@ -42,7 +42,7 @@ static struct clksrc_clk hsmmc_div[] = {
         [0] = {
                 .clk = {
                         .name   = "hsmmc-div",
-                        .id     = 0,
+                        .devname        = "s3c-sdhci.0",
                         .parent = &clk_esysclk.clk,
                 },
                 .reg_div = { .reg = S3C2416_CLKDIV2, .size = 2, .shift = 6 },
@@ -50,7 +50,7 @@ static struct clksrc_clk hsmmc_div[] = {
         [1] = {
                 .clk = {
                         .name   = "hsmmc-div",
-                        .id     = 1,
+                        .devname        = "s3c-sdhci.1",
                         .parent = &clk_esysclk.clk,
                 },
                 .reg_div = { .reg = S3C2443_CLKDIV1, .size = 2, .shift = 6 },
@@ -60,8 +60,8 @@ static struct clksrc_clk hsmmc_div[] = {
 static struct clksrc_clk hsmmc_mux[] = {
         [0] = {
                 .clk    = {
-                        .id     = 0,
                         .name   = "hsmmc-if",
+                        .devname        = "s3c-sdhci.0",
                         .ctrlbit = (1 << 6),
                         .enable = s3c2443_clkcon_enable_s,
                 },
@@ -76,8 +76,8 @@ static struct clksrc_clk hsmmc_mux[] = {
         },
         [1] = {
                 .clk    = {
-                        .id     = 1,
                         .name   = "hsmmc-if",
+                        .devname        = "s3c-sdhci.1",
                         .ctrlbit = (1 << 12),
                         .enable = s3c2443_clkcon_enable_s,
                 },
@@ -94,7 +94,7 @@ static struct clksrc_clk hsmmc_mux[] = {
 
 static struct clk hsmmc0_clk = {
         .name           = "hsmmc",
-        .id             = 0,
+        .devname        = "s3c-sdhci.0",
         .parent         = &clk_h,
         .enable         = s3c2443_clkcon_enable_h,
         .ctrlbit        = S3C2416_HCLKCON_HSMMC0,
diff --git a/arch/arm/mach-s3c2440/clock.c b/arch/arm/mach-s3c2440/clock.c
index 3dc2426e2345..554e0d3ec70b 100644
--- a/arch/arm/mach-s3c2440/clock.c
+++ b/arch/arm/mach-s3c2440/clock.c
@@ -90,14 +90,12 @@ static int s3c2440_camif_upll_setrate(struct clk *clk, unsigned long rate)
 
 static struct clk s3c2440_clk_cam = {
         .name           = "camif",
-        .id             = -1,
         .enable         = s3c2410_clkcon_enable,
         .ctrlbit        = S3C2440_CLKCON_CAMERA,
 };
 
 static struct clk s3c2440_clk_cam_upll = {
         .name           = "camif-upll",
-        .id             = -1,
         .ops            = &(struct clk_ops) {
                 .set_rate       = s3c2440_camif_upll_setrate,
                 .round_rate     = s3c2440_camif_upll_round,
@@ -106,7 +104,6 @@ static struct clk s3c2440_clk_cam_upll = {
 
 static struct clk s3c2440_clk_ac97 = {
         .name           = "ac97",
-        .id             = -1,
         .enable         = s3c2410_clkcon_enable,
         .ctrlbit        = S3C2440_CLKCON_CAMERA,
 };
diff --git a/arch/arm/mach-s3c2443/clock.c b/arch/arm/mach-s3c2443/clock.c
index f4ec6d5715c8..a1a7176675b9 100644
--- a/arch/arm/mach-s3c2443/clock.c
+++ b/arch/arm/mach-s3c2443/clock.c
@@ -59,7 +59,6 @@
 
 static struct clk clk_i2s_ext = {
         .name           = "i2s-ext",
-        .id             = -1,
 };
 
 /* armdiv
@@ -139,7 +138,6 @@ static int s3c2443_armclk_setrate(struct clk *clk, unsigned long rate)
 
 static struct clk clk_armdiv = {
         .name           = "armdiv",
-        .id             = -1,
         .parent         = &clk_msysclk.clk,
         .ops            = &(struct clk_ops) {
                 .round_rate = s3c2443_armclk_roundrate,
@@ -160,7 +158,6 @@ static struct clk *clk_arm_sources[] = {
 static struct clksrc_clk clk_arm = {
         .clk    = {
                 .name           = "armclk",
-                .id             = -1,
         },
         .sources = &(struct clksrc_sources) {
                 .sources = clk_arm_sources,
@@ -177,7 +174,6 @@ static struct clksrc_clk clk_arm = {
 static struct clksrc_clk clk_hsspi = {
         .clk    = {
                 .name           = "hsspi",
-                .id             = -1,
                 .parent         = &clk_esysclk.clk,
                 .ctrlbit        = S3C2443_SCLKCON_HSSPICLK,
                 .enable         = s3c2443_clkcon_enable_s,
@@ -196,7 +192,7 @@ static struct clksrc_clk clk_hsspi = {
 static struct clksrc_clk clk_hsmmc_div = {
         .clk    = {
                 .name           = "hsmmc-div",
-                .id             = 1,
+                .devname        = "s3c-sdhci.1",
                 .parent         = &clk_esysclk.clk,
         },
         .reg_div = { .reg = S3C2443_CLKDIV1, .size = 2, .shift = 6 },
@@ -231,7 +227,7 @@ static int s3c2443_enable_hsmmc(struct clk *clk, int enable)
 
 static struct clk clk_hsmmc = {
         .name           = "hsmmc-if",
-        .id             = 1,
+        .devname        = "s3c-sdhci.1",
         .parent         = &clk_hsmmc_div.clk,
         .enable         = s3c2443_enable_hsmmc,
         .ops            = &(struct clk_ops) {
@@ -248,7 +244,6 @@ static struct clk clk_hsmmc = {
 static struct clksrc_clk clk_i2s_eplldiv = {
         .clk    = {
                 .name           = "i2s-eplldiv",
-                .id             = -1,
                 .parent         = &clk_esysclk.clk,
         },
         .reg_div = { .reg = S3C2443_CLKDIV1, .size = 4, .shift = 12, },
@@ -271,7 +266,6 @@ struct clk *clk_i2s_srclist[] = {
 static struct clksrc_clk clk_i2s = {
         .clk    = {
                 .name           = "i2s-if",
-                .id             = -1,
                 .ctrlbit        = S3C2443_SCLKCON_I2SCLK,
                 .enable         = s3c2443_clkcon_enable_s,
 
@@ -288,25 +282,23 @@ static struct clksrc_clk clk_i2s = {
 static struct clk init_clocks_off[] = {
         {
                 .name           = "sdi",
-                .id             = -1,
                 .parent         = &clk_p,
                 .enable         = s3c2443_clkcon_enable_p,
                 .ctrlbit        = S3C2443_PCLKCON_SDI,
         }, {
                 .name           = "iis",
-                .id             = -1,
                 .parent         = &clk_p,
                 .enable         = s3c2443_clkcon_enable_p,
                 .ctrlbit        = S3C2443_PCLKCON_IIS,
         }, {
                 .name           = "spi",
-                .id             = 0,
+                .devname        = "s3c2410-spi.0",
                 .parent         = &clk_p,
                 .enable         = s3c2443_clkcon_enable_p,
                 .ctrlbit        = S3C2443_PCLKCON_SPI0,
         }, {
                 .name           = "spi",
-                .id             = 1,
+                .devname        = "s3c2410-spi.1",
                 .parent         = &clk_p,
                 .enable         = s3c2443_clkcon_enable_p,
                 .ctrlbit        = S3C2443_PCLKCON_SPI1,
diff --git a/arch/arm/mach-s3c64xx/Kconfig b/arch/arm/mach-s3c64xx/Kconfig
index e4177e22557b..fdc89fc3b464 100644
--- a/arch/arm/mach-s3c64xx/Kconfig
+++ b/arch/arm/mach-s3c64xx/Kconfig
@@ -142,6 +142,7 @@ config MACH_SMDK6410
         select S3C_DEV_USB_HOST
         select S3C_DEV_USB_HSOTG
         select S3C_DEV_WDT
+        select SAMSUNG_DEV_BACKLIGHT
         select SAMSUNG_DEV_KEYPAD
         select SAMSUNG_DEV_PWM
         select HAVE_S3C2410_WATCHDOG if WATCHDOG
diff --git a/arch/arm/mach-s3c64xx/clock.c b/arch/arm/mach-s3c64xx/clock.c
index fdfc4d5e37a1..8cf39e33579e 100644
--- a/arch/arm/mach-s3c64xx/clock.c
+++ b/arch/arm/mach-s3c64xx/clock.c
@@ -39,7 +39,6 @@
 
 static struct clk clk_ext_xtal_mux = {
         .name           = "ext_xtal",
-        .id             = -1,
 };
 
 #define clk_fin_apll clk_ext_xtal_mux
@@ -51,13 +50,11 @@ static struct clk clk_ext_xtal_mux = {
 
 struct clk clk_h2 = {
         .name           = "hclk2",
-        .id             = -1,
         .rate           = 0,
 };
 
 struct clk clk_27m = {
         .name           = "clk_27m",
-        .id             = -1,
         .rate           = 27000000,
 };
 
@@ -83,14 +80,12 @@ static int clk_48m_ctrl(struct clk *clk, int enable)
 
 struct clk clk_48m = {
         .name           = "clk_48m",
-        .id             = -1,
         .rate           = 48000000,
         .enable         = clk_48m_ctrl,
 };
 
 struct clk clk_xusbxti = {
         .name           = "xusbxti",
-        .id             = -1,
         .rate           = 48000000,
 };
 
@@ -130,109 +125,101 @@ int s3c64xx_sclk_ctrl(struct clk *clk, int enable)
 static struct clk init_clocks_off[] = {
         {
                 .name           = "nand",
-                .id             = -1,
                 .parent         = &clk_h,
         }, {
                 .name           = "rtc",
-                .id             = -1,
                 .parent         = &clk_p,
                 .enable         = s3c64xx_pclk_ctrl,
                 .ctrlbit        = S3C_CLKCON_PCLK_RTC,
         }, {
                 .name           = "adc",
-                .id             = -1,
                 .parent         = &clk_p,
                 .enable         = s3c64xx_pclk_ctrl,
                 .ctrlbit        = S3C_CLKCON_PCLK_TSADC,
         }, {
                 .name           = "i2c",
-                .id             = -1,
                 .parent         = &clk_p,
                 .enable         = s3c64xx_pclk_ctrl,
                 .ctrlbit        = S3C_CLKCON_PCLK_IIC,
         }, {
                 .name           = "i2c",
-                .id             = 1,
+                .devname        = "s3c2440-i2c.1",
                 .parent         = &clk_p,
                 .enable         = s3c64xx_pclk_ctrl,
                 .ctrlbit        = S3C6410_CLKCON_PCLK_I2C1,
         }, {
                 .name           = "iis",
-                .id             = 0,
+                .devname        = "samsung-i2s.0",
                 .parent         = &clk_p,
                 .enable         = s3c64xx_pclk_ctrl,
                 .ctrlbit        = S3C_CLKCON_PCLK_IIS0,
         }, {
                 .name           = "iis",
-                .id             = 1,
+                .devname        = "samsung-i2s.1",
                 .parent         = &clk_p,
                 .enable         = s3c64xx_pclk_ctrl,
                 .ctrlbit        = S3C_CLKCON_PCLK_IIS1,
         }, {
 #ifdef CONFIG_CPU_S3C6410
                 .name           = "iis",
-                .id             = -1,  /* There's only one IISv4 port */
                 .parent         = &clk_p,
                 .enable         = s3c64xx_pclk_ctrl,
                 .ctrlbit        = S3C6410_CLKCON_PCLK_IIS2,
         }, {
 #endif
                 .name           = "keypad",
-                .id             = -1,
                 .parent         = &clk_p,
                 .enable         = s3c64xx_pclk_ctrl,
                 .ctrlbit        = S3C_CLKCON_PCLK_KEYPAD,
         }, {
                 .name           = "spi",
-                .id             = 0,
+                .devname        = "s3c64xx-spi.0",
                 .parent         = &clk_p,
                 .enable         = s3c64xx_pclk_ctrl,
                 .ctrlbit        = S3C_CLKCON_PCLK_SPI0,
         }, {
                 .name           = "spi",
-                .id             = 1,
+                .devname        = "s3c64xx-spi.1",
                 .parent         = &clk_p,
                 .enable         = s3c64xx_pclk_ctrl,
                 .ctrlbit        = S3C_CLKCON_PCLK_SPI1,
         }, {
                 .name           = "spi_48m",
-                .id             = 0,
+                .devname        = "s3c64xx-spi.0",
                 .parent         = &clk_48m,
                 .enable         = s3c64xx_sclk_ctrl,
                 .ctrlbit        = S3C_CLKCON_SCLK_SPI0_48,
         }, {
                 .name           = "spi_48m",
-                .id             = 1,
+                .devname        = "s3c64xx-spi.1",
                 .parent         = &clk_48m,
                 .enable         = s3c64xx_sclk_ctrl,
                 .ctrlbit        = S3C_CLKCON_SCLK_SPI1_48,
         }, {
                 .name           = "48m",
-                .id             = 0,
+                .devname        = "s3c-sdhci.0",
                 .parent         = &clk_48m,
                 .enable         = s3c64xx_sclk_ctrl,
                 .ctrlbit        = S3C_CLKCON_SCLK_MMC0_48,
         }, {
                 .name           = "48m",
-                .id             = 1,
+                .devname        = "s3c-sdhci.1",
                 .parent         = &clk_48m,
                 .enable         = s3c64xx_sclk_ctrl,
                 .ctrlbit        = S3C_CLKCON_SCLK_MMC1_48,
         }, {
                 .name           = "48m",
-                .id             = 2,
+                .devname        = "s3c-sdhci.2",
                 .parent         = &clk_48m,
                 .enable         = s3c64xx_sclk_ctrl,
                 .ctrlbit        = S3C_CLKCON_SCLK_MMC2_48,
         }, {
                 .name           = "dma0",
-                .id             = -1,
                 .parent         = &clk_h,
                 .enable         = s3c64xx_hclk_ctrl,
                 .ctrlbit        = S3C_CLKCON_HCLK_DMA0,
         }, {
                 .name           = "dma1",
-                .id             = -1,
                 .parent         = &clk_h,
                 .enable         = s3c64xx_hclk_ctrl,
                 .ctrlbit        = S3C_CLKCON_HCLK_DMA1,
@@ -242,89 +229,81 @@ static struct clk init_clocks_off[] = {
 static struct clk init_clocks[] = {
         {
                 .name           = "lcd",
-                .id             = -1,
                 .parent         = &clk_h,
                 .enable         = s3c64xx_hclk_ctrl,
                 .ctrlbit        = S3C_CLKCON_HCLK_LCD,
         }, {
                 .name           = "gpio",
-                .id             = -1,
                 .parent         = &clk_p,
                 .enable         = s3c64xx_pclk_ctrl,
                 .ctrlbit        = S3C_CLKCON_PCLK_GPIO,
         }, {
                 .name           = "usb-host",
-                .id             = -1,
                 .parent         = &clk_h,
                 .enable         = s3c64xx_hclk_ctrl,
                 .ctrlbit        = S3C_CLKCON_HCLK_UHOST,
         }, {
                 .name           = "hsmmc",
-                .id             = 0,
+                .devname        = "s3c-sdhci.0",
                 .parent         = &clk_h,
                 .enable         = s3c64xx_hclk_ctrl,
                 .ctrlbit        = S3C_CLKCON_HCLK_HSMMC0,
         }, {
                 .name           = "hsmmc",
-                .id             = 1,
+                .devname        = "s3c-sdhci.1",
                 .parent         = &clk_h,
                 .enable         = s3c64xx_hclk_ctrl,
                 .ctrlbit        = S3C_CLKCON_HCLK_HSMMC1,
         }, {
                 .name           = "hsmmc",
-                .id             = 2,
+                .devname        = "s3c-sdhci.2",
                 .parent         = &clk_h,
                 .enable         = s3c64xx_hclk_ctrl,
                 .ctrlbit        = S3C_CLKCON_HCLK_HSMMC2,
         }, {
                 .name           = "otg",
-                .id             = -1,
                 .parent         = &clk_h,
                 .enable         = s3c64xx_hclk_ctrl,
                 .ctrlbit        = S3C_CLKCON_HCLK_USB,
         }, {
                 .name           = "timers",
-                .id             = -1,
                 .parent         = &clk_p,
                 .enable         = s3c64xx_pclk_ctrl,
                 .ctrlbit        = S3C_CLKCON_PCLK_PWM,
         }, {
                 .name           = "uart",
-                .id             = 0,
+                .devname        = "s3c6400-uart.0",
                 .parent         = &clk_p,
                 .enable         = s3c64xx_pclk_ctrl,
                 .ctrlbit        = S3C_CLKCON_PCLK_UART0,
         }, {
                 .name           = "uart",
-                .id             = 1,
+                .devname        = "s3c6400-uart.1",
                 .parent         = &clk_p,
                 .enable         = s3c64xx_pclk_ctrl,
                 .ctrlbit        = S3C_CLKCON_PCLK_UART1,
         }, {
                 .name           = "uart",
-                .id             = 2,
+                .devname        = "s3c6400-uart.2",
                 .parent         = &clk_p,
                 .enable         = s3c64xx_pclk_ctrl,
                 .ctrlbit        = S3C_CLKCON_PCLK_UART2,
         }, {
                 .name           = "uart",
-                .id             = 3,
+                .devname        = "s3c6400-uart.3",
                 .parent         = &clk_p,
                 .enable         = s3c64xx_pclk_ctrl,
                 .ctrlbit        = S3C_CLKCON_PCLK_UART3,
         }, {
                 .name           = "watchdog",
-                .id             = -1,
                 .parent         = &clk_p,
                 .ctrlbit        = S3C_CLKCON_PCLK_WDT,
         }, {
                 .name           = "ac97",
-                .id             = -1,
                 .parent         = &clk_p,
                 .ctrlbit        = S3C_CLKCON_PCLK_AC97,
         }, {
                 .name           = "cfcon",
-                .id             = -1,
                 .parent         = &clk_h,
                 .enable         = s3c64xx_hclk_ctrl,
                 .ctrlbit        = S3C_CLKCON_HCLK_IHOST,
@@ -334,7 +313,6 @@ static struct clk init_clocks[] = {
 
 static struct clk clk_fout_apll = {
         .name           = "fout_apll",
-        .id             = -1,
 };
 
 static struct clk *clk_src_apll_list[] = {
@@ -350,7 +328,6 @@ static struct clksrc_sources clk_src_apll = {
 static struct clksrc_clk clk_mout_apll = {
         .clk    = {
                 .name           = "mout_apll",
-                .id             = -1,
         },
         .reg_src        = { .reg = S3C_CLK_SRC, .shift = 0, .size = 1  },
         .sources        = &clk_src_apll,
@@ -369,7 +346,6 @@ static struct clksrc_sources clk_src_epll = {
 static struct clksrc_clk clk_mout_epll = {
         .clk    = {
                 .name           = "mout_epll",
-                .id             = -1,
         },
         .reg_src        = { .reg = S3C_CLK_SRC, .shift = 2, .size = 1  },
         .sources        = &clk_src_epll,
@@ -388,7 +364,6 @@ static struct clksrc_sources clk_src_mpll = {
 static struct clksrc_clk clk_mout_mpll = {
         .clk = {
                 .name           = "mout_mpll",
-                .id             = -1,
         },
         .reg_src        = { .reg = S3C_CLK_SRC, .shift = 1, .size = 1  },
         .sources        = &clk_src_mpll,
@@ -446,7 +421,6 @@ static int s3c64xx_clk_arm_set_rate(struct clk *clk, unsigned long rate)
 
 static struct clk clk_arm = {
         .name           = "armclk",
-        .id             = -1,
         .parent         = &clk_mout_apll.clk,
         .ops            = &(struct clk_ops) {
                 .get_rate       = s3c64xx_clk_arm_get_rate,
@@ -473,7 +447,6 @@ static struct clk_ops clk_dout_ops = {
 
 static struct clk clk_dout_mpll = {
         .name           = "dout_mpll",
-        .id             = -1,
         .parent         = &clk_mout_mpll.clk,
         .ops            = &clk_dout_ops,
 };
@@ -540,22 +513,18 @@ static struct clksrc_sources clkset_uhost = {
 
 static struct clk clk_iis_cd0 = {
         .name           = "iis_cdclk0",
-        .id             = -1,
 };
 
 static struct clk clk_iis_cd1 = {
         .name           = "iis_cdclk1",
-        .id             = -1,
 };
 
 static struct clk clk_iisv4_cd = {
         .name           = "iis_cdclk_v4",
-        .id             = -1,
 };
 
 static struct clk clk_pcm_cd = {
         .name           = "pcm_cdclk",
-        .id             = -1,
 };
 
 static struct clk *clkset_audio0_list[] = {
@@ -610,7 +579,7 @@ static struct clksrc_clk clksrcs[] = {
         {
                 .clk    = {
                         .name           = "mmc_bus",
-                        .id             = 0,
+                        .devname        = "s3c-sdhci.0",
                         .ctrlbit        = S3C_CLKCON_SCLK_MMC0,
                         .enable         = s3c64xx_sclk_ctrl,
                 },
@@ -620,7 +589,7 @@ static struct clksrc_clk clksrcs[] = {
         }, {
                 .clk    = {
                         .name           = "mmc_bus",
-                        .id             = 1,
+                        .devname        = "s3c-sdhci.1",
                         .ctrlbit        = S3C_CLKCON_SCLK_MMC1,
                         .enable         = s3c64xx_sclk_ctrl,
                 },
@@ -630,7 +599,7 @@ static struct clksrc_clk clksrcs[] = {
         }, {
                 .clk    = {
                         .name           = "mmc_bus",
-                        .id             = 2,
+                        .devname        = "s3c-sdhci.2",
                         .ctrlbit        = S3C_CLKCON_SCLK_MMC2,
                         .enable         = s3c64xx_sclk_ctrl,
                 },
@@ -640,7 +609,6 @@ static struct clksrc_clk clksrcs[] = {
         }, {
                 .clk    = {
                         .name           = "usb-bus-host",
-                        .id             = -1,
                         .ctrlbit        = S3C_CLKCON_SCLK_UHOST,
                         .enable         = s3c64xx_sclk_ctrl,
                 },
@@ -650,7 +618,6 @@ static struct clksrc_clk clksrcs[] = {
         }, {
                 .clk    = {
                         .name           = "uclk1",
-                        .id             = -1,
                         .ctrlbit        = S3C_CLKCON_SCLK_UART,
                         .enable         = s3c64xx_sclk_ctrl,
                 },
@@ -661,7 +628,7 @@ static struct clksrc_clk clksrcs[] = {
 /* Where does UCLK0 come from? */
                 .clk    = {
                         .name           = "spi-bus",
-                        .id             = 0,
+                        .devname        = "s3c64xx-spi.0",
                         .ctrlbit        = S3C_CLKCON_SCLK_SPI0,
                         .enable         = s3c64xx_sclk_ctrl,
                 },
@@ -671,8 +638,7 @@ static struct clksrc_clk clksrcs[] = {
         }, {
                 .clk    = {
                         .name           = "spi-bus",
-                        .id             = 1,
-                        .ctrlbit        = S3C_CLKCON_SCLK_SPI1,
+                        .devname        = "s3c64xx-spi.1",
                         .enable         = s3c64xx_sclk_ctrl,
                 },
                 .reg_src        = { .reg = S3C_CLK_SRC, .shift = 16, .size = 2  },
@@ -681,7 +647,7 @@ static struct clksrc_clk clksrcs[] = {
         }, {
                 .clk    = {
                         .name           = "audio-bus",
-                        .id             = 0,
+                        .devname        = "samsung-i2s.0",
                         .ctrlbit        = S3C_CLKCON_SCLK_AUDIO0,
                         .enable         = s3c64xx_sclk_ctrl,
                 },
@@ -691,7 +657,7 @@ static struct clksrc_clk clksrcs[] = {
         }, {
                 .clk    = {
                         .name           = "audio-bus",
-                        .id             = 1,
+                        .devname        = "samsung-i2s.1",
                         .ctrlbit        = S3C_CLKCON_SCLK_AUDIO1,
                         .enable         = s3c64xx_sclk_ctrl,
                 },
@@ -701,7 +667,7 @@ static struct clksrc_clk clksrcs[] = {
         }, {
                 .clk    = {
                         .name           = "audio-bus",
-                        .id             = 2,
+                        .devname        = "samsung-i2s.2",
                         .ctrlbit        = S3C6410_CLKCON_SCLK_AUDIO2,
                         .enable         = s3c64xx_sclk_ctrl,
                 },
@@ -711,7 +677,6 @@ static struct clksrc_clk clksrcs[] = {
         }, {
                 .clk    = {
                         .name           = "irda-bus",
-                        .id             = 0,
                         .ctrlbit        = S3C_CLKCON_SCLK_IRDA,
                         .enable         = s3c64xx_sclk_ctrl,
                 },
@@ -721,7 +686,6 @@ static struct clksrc_clk clksrcs[] = {
         }, {
                 .clk    = {
                         .name           = "camera",
-                        .id             = -1,
                         .ctrlbit        = S3C_CLKCON_SCLK_CAM,
                         .enable         = s3c64xx_sclk_ctrl,
                 },
diff --git a/arch/arm/mach-s3c64xx/dev-onenand1.c b/arch/arm/mach-s3c64xx/dev-onenand1.c
index 92ffd5bac104..999f9e17a1e4 100644
--- a/arch/arm/mach-s3c64xx/dev-onenand1.c
+++ b/arch/arm/mach-s3c64xx/dev-onenand1.c
@@ -19,6 +19,8 @@
 #include <mach/irqs.h>
 #include <mach/map.h>
 
+#include <plat/devs.h>
+
 static struct resource s3c64xx_onenand1_resources[] = {
         [0] = {
                 .start  = S3C64XX_PA_ONENAND1,
@@ -46,10 +48,6 @@ struct platform_device s3c64xx_device_onenand1 = {
 
 void s3c64xx_onenand1_set_platdata(struct onenand_platform_data *pdata)
 {
-        struct onenand_platform_data *pd;
-
-        pd = kmemdup(pdata, sizeof(struct onenand_platform_data), GFP_KERNEL);
-        if (!pd)
-                printk(KERN_ERR "%s: no memory for platform data\n", __func__);
-        s3c64xx_device_onenand1.dev.platform_data = pd;
+        s3c_set_platdata(pdata, sizeof(struct onenand_platform_data),
+                         &s3c64xx_device_onenand1);
 }
diff --git a/arch/arm/mach-s3c64xx/include/mach/clkdev.h b/arch/arm/mach-s3c64xx/include/mach/clkdev.h
new file mode 100644
index 000000000000..7dffa83d23ff
--- /dev/null
+++ b/arch/arm/mach-s3c64xx/include/mach/clkdev.h
@@ -0,0 +1,7 @@
+#ifndef __MACH_CLKDEV_H__
+#define __MACH_CLKDEV_H__
+
+#define __clk_get(clk) ({ 1; })
+#define __clk_put(clk) do {} while (0)
+
+#endif
diff --git a/arch/arm/mach-s3c64xx/include/mach/regs-fb.h b/arch/arm/mach-s3c64xx/include/mach/regs-fb.h
deleted file mode 100644
index a06ee0af9a4b..000000000000
--- a/arch/arm/mach-s3c64xx/include/mach/regs-fb.h
+++ /dev/null
@@ -1,21 +0,0 @@
-/*
- * Copyright 2008 Openmoko, Inc.
- * Copyright 2008 Simtec Electronics
- * Copyright 2009 Samsung Electronics Co.
- *
- * Pawel Osciak <p.osciak@samsung.com>
- * Based on plat-s3c/include/plat/regs-fb.h by Ben Dooks <ben@simtec.co.uk>
- *
- * Framebuffer register definitions for Samsung S3C64xx.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#ifndef __ASM_ARCH_MACH_REGS_FB_H
-#define __ASM_ARCH_MACH_REGS_FB_H __FILE__
-
-#include <plat/regs-fb-v4.h>
-
-#endif /* __ASM_ARCH_MACH_REGS_FB_H */
diff --git a/arch/arm/mach-s3c64xx/mach-anw6410.c b/arch/arm/mach-s3c64xx/mach-anw6410.c
index a53cf149476e..cb8864327ac4 100644
--- a/arch/arm/mach-s3c64xx/mach-anw6410.c
+++ b/arch/arm/mach-s3c64xx/mach-anw6410.c
@@ -35,7 +35,6 @@
 #include <asm/mach/irq.h>
 
 #include <mach/hardware.h>
-#include <mach/regs-fb.h>
 #include <mach/map.h>
 
 #include <asm/irq.h>
@@ -44,6 +43,7 @@
 #include <plat/regs-serial.h>
 #include <plat/iic.h>
 #include <plat/fb.h>
+#include <plat/regs-fb-v4.h>
 
 #include <mach/s3c6410.h>
 #include <plat/clock.h>
diff --git a/arch/arm/mach-s3c64xx/mach-hmt.c b/arch/arm/mach-s3c64xx/mach-hmt.c
index b2639582caca..b3d93cc8dde0 100644
--- a/arch/arm/mach-s3c64xx/mach-hmt.c
+++ b/arch/arm/mach-s3c64xx/mach-hmt.c
@@ -27,7 +27,6 @@
 #include <asm/mach/irq.h>
 
 #include <mach/hardware.h>
-#include <mach/regs-fb.h>
 #include <mach/map.h>
 
 #include <asm/irq.h>
@@ -42,6 +41,7 @@
 #include <plat/clock.h>
 #include <plat/devs.h>
 #include <plat/cpu.h>
+#include <plat/regs-fb-v4.h>
 
 #define UCON S3C2410_UCON_DEFAULT
 #define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE)
diff --git a/arch/arm/mach-s3c64xx/mach-mini6410.c b/arch/arm/mach-s3c64xx/mach-mini6410.c
index 89f35e02e883..527f49bd1b57 100644
--- a/arch/arm/mach-s3c64xx/mach-mini6410.c
+++ b/arch/arm/mach-s3c64xx/mach-mini6410.c
@@ -29,7 +29,6 @@
 #include <asm/mach/map.h>
 
 #include <mach/map.h>
-#include <mach/regs-fb.h>
 #include <mach/regs-gpio.h>
 #include <mach/regs-modem.h>
 #include <mach/regs-srom.h>
@@ -42,6 +41,7 @@
 #include <plat/nand.h>
 #include <plat/regs-serial.h>
 #include <plat/ts.h>
+#include <plat/regs-fb-v4.h>
 
 #include <video/platform_lcd.h>
 
diff --git a/arch/arm/mach-s3c64xx/mach-ncp.c b/arch/arm/mach-s3c64xx/mach-ncp.c
index c4986498cd12..01c6857c5b63 100644
--- a/arch/arm/mach-s3c64xx/mach-ncp.c
+++ b/arch/arm/mach-s3c64xx/mach-ncp.c
@@ -30,7 +30,6 @@
 #include <asm/mach/irq.h>
 
 #include <mach/hardware.h>
-#include <mach/regs-fb.h>
 #include <mach/map.h>
 
 #include <asm/irq.h>
@@ -44,6 +43,7 @@
 #include <plat/clock.h>
 #include <plat/devs.h>
 #include <plat/cpu.h>
+#include <plat/regs-fb-v4.h>
 
 #define UCON S3C2410_UCON_DEFAULT
 #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE
diff --git a/arch/arm/mach-s3c64xx/mach-real6410.c b/arch/arm/mach-s3c64xx/mach-real6410.c
index 4957ab0a0d4a..95b04b1729e3 100644
--- a/arch/arm/mach-s3c64xx/mach-real6410.c
+++ b/arch/arm/mach-s3c64xx/mach-real6410.c
@@ -30,7 +30,6 @@
 #include <asm/mach/map.h>
 
 #include <mach/map.h>
-#include <mach/regs-fb.h>
 #include <mach/regs-gpio.h>
 #include <mach/regs-modem.h>
 #include <mach/regs-srom.h>
@@ -43,6 +42,7 @@
 #include <plat/nand.h>
 #include <plat/regs-serial.h>
 #include <plat/ts.h>
+#include <plat/regs-fb-v4.h>
 
 #include <video/platform_lcd.h>
 
diff --git a/arch/arm/mach-s3c64xx/mach-smartq5.c b/arch/arm/mach-s3c64xx/mach-smartq5.c
index 3a3e5acde523..342e8dfddf8b 100644
--- a/arch/arm/mach-s3c64xx/mach-smartq5.c
+++ b/arch/arm/mach-s3c64xx/mach-smartq5.c
@@ -21,7 +21,6 @@
 #include <asm/mach/arch.h>
 
 #include <mach/map.h>
-#include <mach/regs-fb.h>
 #include <mach/regs-gpio.h>
 #include <mach/s3c6410.h>
 
@@ -29,6 +28,7 @@
 #include <plat/devs.h>
 #include <plat/fb.h>
 #include <plat/gpio-cfg.h>
+#include <plat/regs-fb-v4.h>
 
 #include "mach-smartq.h"
 
diff --git a/arch/arm/mach-s3c64xx/mach-smartq7.c b/arch/arm/mach-s3c64xx/mach-smartq7.c
index e65375877d53..57963977da8e 100644
--- a/arch/arm/mach-s3c64xx/mach-smartq7.c
+++ b/arch/arm/mach-s3c64xx/mach-smartq7.c
@@ -21,7 +21,6 @@
 #include <asm/mach/arch.h>
 
 #include <mach/map.h>
-#include <mach/regs-fb.h>
 #include <mach/regs-gpio.h>
 #include <mach/s3c6410.h>
 
@@ -29,6 +28,7 @@
 #include <plat/devs.h>
 #include <plat/fb.h>
 #include <plat/gpio-cfg.h>
+#include <plat/regs-fb-v4.h>
 
 #include "mach-smartq.h"
 
diff --git a/arch/arm/mach-s3c64xx/mach-smdk6410.c b/arch/arm/mach-s3c64xx/mach-smdk6410.c
index 2c0353a80906..ecbea92bf83b 100644
--- a/arch/arm/mach-s3c64xx/mach-smdk6410.c
+++ b/arch/arm/mach-s3c64xx/mach-smdk6410.c
@@ -48,7 +48,6 @@
 #include <asm/mach/irq.h>
 
 #include <mach/hardware.h>
-#include <mach/regs-fb.h>
 #include <mach/map.h>
 
 #include <asm/irq.h>
@@ -71,6 +70,8 @@
 #include <plat/adc.h>
 #include <plat/ts.h>
 #include <plat/keypad.h>
+#include <plat/backlight.h>
+#include <plat/regs-fb-v4.h>
 
 #define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
 #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
@@ -209,17 +210,9 @@ static struct platform_device smdk6410_smsc911x = {
 };
 
 #ifdef CONFIG_REGULATOR
-static struct regulator_consumer_supply smdk6410_b_pwr_5v_consumers[] = {
-        {
-                /* WM8580 */
-                .supply = "PVDD",
-                .dev_name = "0-001b",
-        },
-        {
-                /* WM8580 */
-                .supply = "AVDD",
-                .dev_name = "0-001b",
-        },
+static struct regulator_consumer_supply smdk6410_b_pwr_5v_consumers[] __initdata = {
+        REGULATOR_SUPPLY("PVDD", "0-001b"),
+        REGULATOR_SUPPLY("AVDD", "0-001b"),
 };
 
 static struct regulator_init_data smdk6410_b_pwr_5v_data = {
@@ -337,16 +330,12 @@ static struct platform_device *smdk6410_devices[] __initdata = {
         &s3c_device_rtc,
         &s3c_device_ts,
         &s3c_device_wdt,
-        &s3c_device_timer[1],
-        &smdk6410_backlight_device,
 };
 
 #ifdef CONFIG_REGULATOR
 /* ARM core */
 static struct regulator_consumer_supply smdk6410_vddarm_consumers[] = {
-        {
-                .supply = "vddarm",
-        }
+        REGULATOR_SUPPLY("vddarm", NULL),
 };
 
 /* VDDARM, BUCK1 on J5 */
@@ -484,11 +473,7 @@ static struct regulator_init_data wm8350_dcdc3_data = {
 
 /* USB, EXT, PCM, ADC/DAC, USB, MMC */
 static struct regulator_consumer_supply wm8350_dcdc4_consumers[] = {
-        {
-                /* WM8580 */
-                .supply = "DVDD",
-                .dev_name = "0-001b",
-        },
+        REGULATOR_SUPPLY("DVDD", "0-001b"),
 };
 
 static struct regulator_init_data wm8350_dcdc4_data = {
@@ -599,7 +584,7 @@ static struct regulator_init_data wm1192_dcdc3 = {
 };
 
 static struct regulator_consumer_supply wm1192_ldo1_consumers[] = {
-        { .supply = "DVDD", .dev_name = "0-001b", },   /* WM8580 */
+        REGULATOR_SUPPLY("DVDD", "0-001b"),   /* WM8580 */
 };
 
 static struct regulator_init_data wm1192_ldo1 = {
@@ -679,6 +664,16 @@ static struct s3c2410_ts_mach_info s3c_ts_platform __initdata = {
         .oversampling_shift     = 2,
 };
 
+/* LCD Backlight data */
+static struct samsung_bl_gpio_info smdk6410_bl_gpio_info = {
+        .no = S3C64XX_GPF(15),
+        .func = S3C_GPIO_SFN(2),
+};
+
+static struct platform_pwm_backlight_data smdk6410_bl_data = {
+        .pwm_id = 1,
+};
+
 static void __init smdk6410_map_io(void)
 {
         u32 tmp;
@@ -740,6 +735,8 @@ static void __init smdk6410_machine_init(void)
 
         s3c_ide_set_platdata(&smdk6410_ide_pdata);
 
+        samsung_bl_set(&smdk6410_bl_gpio_info, &smdk6410_bl_data);
+
         platform_add_devices(smdk6410_devices, ARRAY_SIZE(smdk6410_devices));
 }
 
diff --git a/arch/arm/mach-s3c64xx/setup-fb-24bpp.c b/arch/arm/mach-s3c64xx/setup-fb-24bpp.c
index 8f3091182f9c..83d2afb79e9f 100644
--- a/arch/arm/mach-s3c64xx/setup-fb-24bpp.c
+++ b/arch/arm/mach-s3c64xx/setup-fb-24bpp.c
@@ -17,7 +17,6 @@
 #include <linux/fb.h>
 #include <linux/gpio.h>
 
-#include <mach/regs-fb.h>
 #include <plat/fb.h>
 #include <plat/gpio-cfg.h>
 
diff --git a/arch/arm/mach-s5p64x0/Kconfig b/arch/arm/mach-s5p64x0/Kconfig
index 017af4c4293c..65c7518dad7f 100644
--- a/arch/arm/mach-s5p64x0/Kconfig
+++ b/arch/arm/mach-s5p64x0/Kconfig
@@ -36,6 +36,7 @@ config MACH_SMDK6440
         select S3C_DEV_WDT
         select S3C64XX_DEV_SPI
         select SAMSUNG_DEV_ADC
+        select SAMSUNG_DEV_BACKLIGHT
         select SAMSUNG_DEV_PWM
         select SAMSUNG_DEV_TS
         select S5P64X0_SETUP_I2C1
@@ -50,6 +51,7 @@ config MACH_SMDK6450
         select S3C_DEV_WDT
         select S3C64XX_DEV_SPI
         select SAMSUNG_DEV_ADC
+        select SAMSUNG_DEV_BACKLIGHT
         select SAMSUNG_DEV_PWM
         select SAMSUNG_DEV_TS
         select S5P64X0_SETUP_I2C1
diff --git a/arch/arm/mach-s5p64x0/clock-s5p6440.c b/arch/arm/mach-s5p64x0/clock-s5p6440.c
index 9f12c2ebf416..0e9cd3092dd2 100644
--- a/arch/arm/mach-s5p64x0/clock-s5p6440.c
+++ b/arch/arm/mach-s5p64x0/clock-s5p6440.c
@@ -95,7 +95,6 @@ static struct clk_ops s5p6440_epll_ops = {
 static struct clksrc_clk clk_hclk = {
         .clk    = {
                 .name           = "clk_hclk",
-                .id             = -1,
                 .parent         = &clk_armclk.clk,
         },
         .reg_div        = { .reg = S5P64X0_CLK_DIV0, .shift = 8, .size = 4 },
@@ -104,7 +103,6 @@ static struct clksrc_clk clk_hclk = {
 static struct clksrc_clk clk_pclk = {
         .clk    = {
                 .name           = "clk_pclk",
-                .id             = -1,
                 .parent         = &clk_hclk.clk,
         },
         .reg_div        = { .reg = S5P64X0_CLK_DIV0, .shift = 12, .size = 4 },
@@ -112,7 +110,6 @@ static struct clksrc_clk clk_pclk = {
 static struct clksrc_clk clk_hclk_low = {
         .clk    = {
                 .name           = "clk_hclk_low",
-                .id             = -1,
         },
         .sources        = &clkset_hclk_low,
         .reg_src        = { .reg = S5P64X0_SYS_OTHERS, .shift = 6, .size = 1 },
@@ -122,7 +119,6 @@ static struct clksrc_clk clk_hclk_low = {
 static struct clksrc_clk clk_pclk_low = {
         .clk    = {
                 .name           = "clk_pclk_low",
-                .id             = -1,
                 .parent         = &clk_hclk_low.clk,
         },
         .reg_div        = { .reg = S5P64X0_CLK_DIV3, .shift = 12, .size = 4 },
@@ -136,187 +132,167 @@ static struct clksrc_clk clk_pclk_low = {
 static struct clk init_clocks_off[] = {
         {
                 .name           = "nand",
-                .id             = -1,
                 .parent         = &clk_hclk.clk,
                 .enable         = s5p64x0_mem_ctrl,
                 .ctrlbit        = (1 << 2),
         }, {
                 .name           = "post",
-                .id             = -1,
                 .parent         = &clk_hclk_low.clk,
                 .enable         = s5p64x0_hclk0_ctrl,
                 .ctrlbit        = (1 << 5)
         }, {
                 .name           = "2d",
-                .id             = -1,
                 .parent         = &clk_hclk.clk,
                 .enable         = s5p64x0_hclk0_ctrl,
                 .ctrlbit        = (1 << 8),
         }, {
                 .name           = "pdma",
-                .id             = -1,
                 .parent         = &clk_hclk_low.clk,
                 .enable         = s5p64x0_hclk0_ctrl,
                 .ctrlbit        = (1 << 12),
         }, {
                 .name           = "hsmmc",
-                .id             = 0,
+                .devname        = "s3c-sdhci.0",
                 .parent         = &clk_hclk_low.clk,
                 .enable         = s5p64x0_hclk0_ctrl,
                 .ctrlbit        = (1 << 17),
         }, {
                 .name           = "hsmmc",
-                .id             = 1,
+                .devname        = "s3c-sdhci.1",
                 .parent         = &clk_hclk_low.clk,
                 .enable         = s5p64x0_hclk0_ctrl,
                 .ctrlbit        = (1 << 18),
         }, {
                 .name           = "hsmmc",
-                .id             = 2,
+                .devname        = "s3c-sdhci.2",
                 .parent         = &clk_hclk_low.clk,
                 .enable         = s5p64x0_hclk0_ctrl,
                 .ctrlbit        = (1 << 19),
         }, {
                 .name           = "otg",
-                .id             = -1,
                 .parent         = &clk_hclk_low.clk,
                 .enable         = s5p64x0_hclk0_ctrl,
                 .ctrlbit        = (1 << 20)
         }, {
                 .name           = "irom",
-                .id             = -1,
                 .parent         = &clk_hclk.clk,
                 .enable         = s5p64x0_hclk0_ctrl,
                 .ctrlbit        = (1 << 25),
         }, {
                 .name           = "lcd",
-                .id             = -1,
                 .parent         = &clk_hclk_low.clk,
                 .enable         = s5p64x0_hclk1_ctrl,
                 .ctrlbit        = (1 << 1),
         }, {
                 .name           = "hclk_fimgvg",
-                .id             = -1,
                 .parent         = &clk_hclk.clk,
                 .enable         = s5p64x0_hclk1_ctrl,
                 .ctrlbit        = (1 << 2),
         }, {
                 .name           = "tsi",
-                .id             = -1,
                 .parent         = &clk_hclk_low.clk,
                 .enable         = s5p64x0_hclk1_ctrl,
                 .ctrlbit        = (1 << 0),
         }, {
                 .name           = "watchdog",
-                .id             = -1,
                 .parent         = &clk_pclk_low.clk,
                 .enable         = s5p64x0_pclk_ctrl,
                 .ctrlbit        = (1 << 5),
         }, {
                 .name           = "rtc",
-                .id             = -1,
                 .parent         = &clk_pclk_low.clk,
                 .enable         = s5p64x0_pclk_ctrl,
                 .ctrlbit        = (1 << 6),
         }, {
                 .name           = "timers",
-                .id             = -1,
                 .parent         = &clk_pclk_low.clk,
                 .enable         = s5p64x0_pclk_ctrl,
                 .ctrlbit        = (1 << 7),
         }, {
                 .name           = "pcm",
-                .id             = -1,
                 .parent         = &clk_pclk_low.clk,
                 .enable         = s5p64x0_pclk_ctrl,
                 .ctrlbit        = (1 << 8),
         }, {
                 .name           = "adc",
-                .id             = -1,
                 .parent         = &clk_pclk_low.clk,
                 .enable         = s5p64x0_pclk_ctrl,
                 .ctrlbit        = (1 << 12),
         }, {
                 .name           = "i2c",
-                .id             = -1,
                 .parent         = &clk_pclk_low.clk,
                 .enable         = s5p64x0_pclk_ctrl,
                 .ctrlbit        = (1 << 17),
         }, {
                 .name           = "spi",
-                .id             = 0,
+                .devname        = "s3c64xx-spi.0",
                 .parent         = &clk_pclk_low.clk,
                 .enable         = s5p64x0_pclk_ctrl,
                 .ctrlbit        = (1 << 21),
         }, {
                 .name           = "spi",
-                .id             = 1,
+                .devname        = "s3c64xx-spi.1",
                 .parent         = &clk_pclk_low.clk,
                 .enable         = s5p64x0_pclk_ctrl,
                 .ctrlbit        = (1 << 22),
         }, {
                 .name           = "gps",
-                .id             = -1,
                 .parent         = &clk_pclk_low.clk,
                 .enable         = s5p64x0_pclk_ctrl,
                 .ctrlbit        = (1 << 25),
         }, {
                 .name           = "iis",
-                .id             = 0,
+                .devname        = "samsung-i2s.0",
                 .parent         = &clk_pclk_low.clk,
                 .enable         = s5p64x0_pclk_ctrl,
                 .ctrlbit        = (1 << 26),
         }, {
                 .name           = "dsim",
-                .id             = -1,
                 .parent         = &clk_pclk_low.clk,
                 .enable         = s5p64x0_pclk_ctrl,
                 .ctrlbit        = (1 << 28),
         }, {
                 .name           = "etm",
-                .id             = -1,
                 .parent         = &clk_pclk.clk,
                 .enable         = s5p64x0_pclk_ctrl,
                 .ctrlbit        = (1 << 29),
         }, {
                 .name           = "dmc0",
-                .id             = -1,
                 .parent         = &clk_pclk.clk,
                 .enable         = s5p64x0_pclk_ctrl,
                 .ctrlbit        = (1 << 30),
         }, {
                 .name           = "pclk_fimgvg",
-                .id             = -1,
                 .parent         = &clk_pclk.clk,
                 .enable         = s5p64x0_pclk_ctrl,
                 .ctrlbit        = (1 << 31),
         }, {
                 .name           = "sclk_spi_48",
-                .id             = 0,
+                .devname        = "s3c64xx-spi.0",
                 .parent         = &clk_48m,
                 .enable         = s5p64x0_sclk_ctrl,
                 .ctrlbit        = (1 << 22),
         }, {
                 .name           = "sclk_spi_48",
-                .id             = 1,
+                .devname        = "s3c64xx-spi.1",
                 .parent         = &clk_48m,
                 .enable         = s5p64x0_sclk_ctrl,
                 .ctrlbit        = (1 << 23),
         }, {
                 .name           = "mmc_48m",
-                .id             = 0,
+                .devname        = "s3c-sdhci.0",
                 .parent         = &clk_48m,
                 .enable         = s5p64x0_sclk_ctrl,
                 .ctrlbit        = (1 << 27),
         }, {
                 .name           = "mmc_48m",
-                .id             = 1,
+                .devname        = "s3c-sdhci.1",
                 .parent         = &clk_48m,
                 .enable         = s5p64x0_sclk_ctrl,
                 .ctrlbit        = (1 << 28),
         }, {
                 .name           = "mmc_48m",
-                .id             = 2,
+                .devname        = "s3c-sdhci.2",
                 .parent         = &clk_48m,
                 .enable         = s5p64x0_sclk_ctrl,
                 .ctrlbit        = (1 << 29),
@@ -329,43 +305,40 @@ static struct clk init_clocks_off[] = {
 static struct clk init_clocks[] = {
         {
                 .name           = "intc",
-                .id             = -1,
                 .parent         = &clk_hclk.clk,
                 .enable         = s5p64x0_hclk0_ctrl,
                 .ctrlbit        = (1 << 1),
         }, {
                 .name           = "mem",
-                .id             = -1,
                 .parent         = &clk_hclk.clk,
                 .enable         = s5p64x0_hclk0_ctrl,
                 .ctrlbit        = (1 << 21),
         }, {
                 .name           = "uart",
-                .id             = 0,
+                .devname        = "s3c6400-uart.0",
                 .parent         = &clk_pclk_low.clk,
                 .enable         = s5p64x0_pclk_ctrl,
                 .ctrlbit        = (1 << 1),
         }, {
                 .name           = "uart",
-                .id             = 1,
+                .devname        = "s3c6400-uart.1",
                 .parent         = &clk_pclk_low.clk,
                 .enable         = s5p64x0_pclk_ctrl,
                 .ctrlbit        = (1 << 2),
         }, {
                 .name           = "uart",
-                .id             = 2,
+                .devname        = "s3c6400-uart.2",
                 .parent         = &clk_pclk_low.clk,
                 .enable         = s5p64x0_pclk_ctrl,
                 .ctrlbit        = (1 << 3),
         }, {
                 .name           = "uart",
-                .id             = 3,
+                .devname        = "s3c6400-uart.3",
                 .parent         = &clk_pclk_low.clk,
                 .enable         = s5p64x0_pclk_ctrl,
                 .ctrlbit        = (1 << 4),
         }, {
                 .name           = "gpio",
-                .id             = -1,
                 .parent         = &clk_pclk_low.clk,
                 .enable         = s5p64x0_pclk_ctrl,
                 .ctrlbit        = (1 << 18),
@@ -374,12 +347,10 @@ static struct clk init_clocks[] = {
 
 static struct clk clk_iis_cd_v40 = {
         .name           = "iis_cdclk_v40",
-        .id             = -1,
 };
 
 static struct clk clk_pcm_cd = {
         .name           = "pcm_cdclk",
-        .id             = -1,
 };
 
 static struct clk *clkset_group1_list[] = {
@@ -420,7 +391,7 @@ static struct clksrc_clk clksrcs[] = {
         {
                 .clk    = {
                         .name           = "sclk_mmc",
-                        .id             = 0,
+                        .devname        = "s3c-sdhci.0",
                         .ctrlbit        = (1 << 24),
                         .enable         = s5p64x0_sclk_ctrl,
                 },
@@ -430,7 +401,7 @@ static struct clksrc_clk clksrcs[] = {
         }, {
                 .clk    = {
                         .name           = "sclk_mmc",
-                        .id             = 1,
+                        .devname        = "s3c-sdhci.1",
                         .ctrlbit        = (1 << 25),
                         .enable         = s5p64x0_sclk_ctrl,
                 },
@@ -440,7 +411,7 @@ static struct clksrc_clk clksrcs[] = {
         }, {
                 .clk    = {
                         .name           = "sclk_mmc",
-                        .id             = 2,
+                        .devname        = "s3c-sdhci.2",
                         .ctrlbit        = (1 << 26),
                         .enable         = s5p64x0_sclk_ctrl,
                 },
@@ -450,7 +421,6 @@ static struct clksrc_clk clksrcs[] = {
         }, {
                 .clk    = {
                         .name           = "uclk1",
-                        .id             = -1,
                         .ctrlbit        = (1 << 5),
                         .enable         = s5p64x0_sclk_ctrl,
                 },
@@ -460,7 +430,7 @@ static struct clksrc_clk clksrcs[] = {
         }, {
                 .clk    = {
                         .name           = "sclk_spi",
-                        .id             = 0,
+                        .devname        = "s3c64xx-spi.0",
                         .ctrlbit        = (1 << 20),
                         .enable         = s5p64x0_sclk_ctrl,
                 },
@@ -470,7 +440,7 @@ static struct clksrc_clk clksrcs[] = {
         }, {
                 .clk    = {
                         .name           = "sclk_spi",
-                        .id             = 1,
+                        .devname        = "s3c64xx-spi.1",
                         .ctrlbit        = (1 << 21),
                         .enable         = s5p64x0_sclk_ctrl,
                 },
@@ -480,7 +450,6 @@ static struct clksrc_clk clksrcs[] = {
         }, {
                 .clk    = {
                         .name           = "sclk_post",
-                        .id             = -1,
                         .ctrlbit        = (1 << 10),
                         .enable         = s5p64x0_sclk_ctrl,
                 },
@@ -490,7 +459,6 @@ static struct clksrc_clk clksrcs[] = {
         }, {
                 .clk    = {
                         .name           = "sclk_dispcon",
-                        .id             = -1,
                         .ctrlbit        = (1 << 1),
                         .enable         = s5p64x0_sclk1_ctrl,
                 },
@@ -500,7 +468,6 @@ static struct clksrc_clk clksrcs[] = {
         }, {
                 .clk    = {
                         .name           = "sclk_fimgvg",
-                        .id             = -1,
                         .ctrlbit        = (1 << 2),
                         .enable         = s5p64x0_sclk1_ctrl,
                 },
@@ -510,7 +477,6 @@ static struct clksrc_clk clksrcs[] = {
         }, {
                 .clk    = {
                         .name           = "sclk_audio2",
-                        .id             = -1,
                         .ctrlbit        = (1 << 11),
                         .enable         = s5p64x0_sclk_ctrl,
                 },
diff --git a/arch/arm/mach-s5p64x0/clock-s5p6450.c b/arch/arm/mach-s5p64x0/clock-s5p6450.c
index 4eec457ddccc..d9dc16cde109 100644
--- a/arch/arm/mach-s5p64x0/clock-s5p6450.c
+++ b/arch/arm/mach-s5p64x0/clock-s5p6450.c
@@ -36,7 +36,6 @@
 static struct clksrc_clk clk_mout_dpll = {
         .clk    = {
                 .name           = "mout_dpll",
-                .id             = -1,
         },
         .sources        = &clk_src_dpll,
         .reg_src        = { .reg = S5P64X0_CLK_SRC0, .shift = 5, .size = 1 },
@@ -96,7 +95,6 @@ static struct clk_ops s5p6450_epll_ops = {
 static struct clksrc_clk clk_dout_epll = {
         .clk    = {
                 .name           = "dout_epll",
-                .id             = -1,
                 .parent         = &clk_mout_epll.clk,
         },
         .reg_div        = { .reg = S5P64X0_CLK_DIV1, .shift = 24, .size = 4 },
@@ -105,7 +103,6 @@ static struct clksrc_clk clk_dout_epll = {
 static struct clksrc_clk clk_mout_hclk_sel = {
         .clk    = {
                 .name           = "mout_hclk_sel",
-                .id             = -1,
         },
         .sources        = &clkset_hclk_low,
         .reg_src        = { .reg = S5P64X0_OTHERS, .shift = 15, .size = 1 },
@@ -124,7 +121,6 @@ static struct clksrc_sources clkset_hclk = {
 static struct clksrc_clk clk_hclk = {
         .clk    = {
                 .name           = "clk_hclk",
-                .id             = -1,
         },
         .sources        = &clkset_hclk,
         .reg_src        = { .reg = S5P64X0_OTHERS, .shift = 14, .size = 1 },
@@ -134,7 +130,6 @@ static struct clksrc_clk clk_hclk = {
 static struct clksrc_clk clk_pclk = {
         .clk    = {
                 .name           = "clk_pclk",
-                .id             = -1,
                 .parent         = &clk_hclk.clk,
         },
         .reg_div = { .reg = S5P64X0_CLK_DIV0, .shift = 12, .size = 4 },
@@ -142,7 +137,6 @@ static struct clksrc_clk clk_pclk = {
 static struct clksrc_clk clk_dout_pwm_ratio0 = {
         .clk    = {
                 .name           = "clk_dout_pwm_ratio0",
-                .id             = -1,
                 .parent         = &clk_mout_hclk_sel.clk,
         },
         .reg_div        = { .reg = S5P64X0_CLK_DIV3, .shift = 16, .size = 4 },
@@ -151,7 +145,6 @@ static struct clksrc_clk clk_dout_pwm_ratio0 = {
 static struct clksrc_clk clk_pclk_to_wdt_pwm = {
         .clk    = {
                 .name           = "clk_pclk_to_wdt_pwm",
-                .id             = -1,
                 .parent         = &clk_dout_pwm_ratio0.clk,
         },
         .reg_div        = { .reg = S5P64X0_CLK_DIV3, .shift = 20, .size = 4 },
@@ -160,7 +153,6 @@ static struct clksrc_clk clk_pclk_to_wdt_pwm = {
 static struct clksrc_clk clk_hclk_low = {
         .clk    = {
                 .name           = "clk_hclk_low",
-                .id             = -1,
         },
         .sources        = &clkset_hclk_low,
         .reg_src        = { .reg = S5P64X0_OTHERS, .shift = 6, .size = 1 },
@@ -170,7 +162,6 @@ static struct clksrc_clk clk_hclk_low = {
 static struct clksrc_clk clk_pclk_low = {
         .clk    = {
                 .name           = "clk_pclk_low",
-                .id             = -1,
                 .parent         = &clk_hclk_low.clk,
         },
         .reg_div        = { .reg = S5P64X0_CLK_DIV3, .shift = 12, .size = 4 },
@@ -184,109 +175,101 @@ static struct clksrc_clk clk_pclk_low = {
 static struct clk init_clocks_off[] = {
         {
                 .name           = "usbhost",
-                .id             = -1,
                 .parent         = &clk_hclk_low.clk,
                 .enable         = s5p64x0_hclk0_ctrl,
                 .ctrlbit        = (1 << 3),
         }, {
                 .name           = "pdma",
-                .id             = -1,
                 .parent         = &clk_hclk_low.clk,
                 .enable         = s5p64x0_hclk0_ctrl,
                 .ctrlbit        = (1 << 12),
         }, {
                 .name           = "hsmmc",
-                .id             = 0,
+                .devname        = "s3c-sdhci.0",
                 .parent         = &clk_hclk_low.clk,
                 .enable         = s5p64x0_hclk0_ctrl,
                 .ctrlbit        = (1 << 17),
         }, {
                 .name           = "hsmmc",
-                .id             = 1,
+                .devname        = "s3c-sdhci.1",
                 .parent         = &clk_hclk_low.clk,
                 .enable         = s5p64x0_hclk0_ctrl,
                 .ctrlbit        = (1 << 18),
         }, {
                 .name           = "hsmmc",
-                .id             = 2,
+                .devname        = "s3c-sdhci.2",
                 .parent         = &clk_hclk_low.clk,
                 .enable         = s5p64x0_hclk0_ctrl,
                 .ctrlbit        = (1 << 19),
         }, {
                 .name           = "usbotg",
-                .id             = -1,
                 .parent         = &clk_hclk_low.clk,
                 .enable         = s5p64x0_hclk0_ctrl,
                 .ctrlbit        = (1 << 20),
         }, {
                 .name           = "lcd",
-                .id             = -1,
                 .parent         = &clk_h,
                 .enable         = s5p64x0_hclk1_ctrl,
                 .ctrlbit        = (1 << 1),
         }, {
                 .name           = "watchdog",
-                .id             = -1,
                 .parent         = &clk_pclk_low.clk,
                 .enable         = s5p64x0_pclk_ctrl,
                 .ctrlbit        = (1 << 5),
         }, {
                 .name           = "rtc",
-                .id             = -1,
                 .parent         = &clk_pclk_low.clk,
                 .enable         = s5p64x0_pclk_ctrl,
                 .ctrlbit        = (1 << 6),
         }, {
                 .name           = "adc",
-                .id             = -1,
                 .parent         = &clk_pclk_low.clk,
                 .enable         = s5p64x0_pclk_ctrl,
                 .ctrlbit        = (1 << 12),
         }, {
                 .name           = "i2c",
-                .id             = 0,
+                .devname        = "s3c2440-i2c.0",
                 .parent         = &clk_pclk_low.clk,
                 .enable         = s5p64x0_pclk_ctrl,
                 .ctrlbit        = (1 << 17),
         }, {
                 .name           = "spi",
-                .id             = 0,
+                .devname        = "s3c64xx-spi.0",
                 .parent         = &clk_pclk_low.clk,
                 .enable         = s5p64x0_pclk_ctrl,
                 .ctrlbit        = (1 << 21),
         }, {
                 .name           = "spi",
-                .id             = 1,
+                .devname        = "s3c64xx-spi.1",
                 .parent         = &clk_pclk_low.clk,
                 .enable         = s5p64x0_pclk_ctrl,
                 .ctrlbit        = (1 << 22),
         }, {
                 .name           = "iis",
-                .id             = 0,
+                .devname        = "samsung-i2s.0",
                 .parent         = &clk_pclk_low.clk,
                 .enable         = s5p64x0_pclk_ctrl,
                 .ctrlbit        = (1 << 26),
         }, {
                 .name           = "iis",
-                .id             = 1,
+                .devname        = "samsung-i2s.1",
                 .parent         = &clk_pclk_low.clk,
                 .enable         = s5p64x0_pclk_ctrl,
                 .ctrlbit        = (1 << 15),
         }, {
                 .name           = "iis",
-                .id             = 2,
+                .devname        = "samsung-i2s.2",
                 .parent         = &clk_pclk_low.clk,
                 .enable         = s5p64x0_pclk_ctrl,
                 .ctrlbit        = (1 << 16),
         }, {
                 .name           = "i2c",
-                .id             = 1,
+                .devname        = "s3c2440-i2c.1",
                 .parent         = &clk_pclk_low.clk,
                 .enable         = s5p64x0_pclk_ctrl,
                 .ctrlbit        = (1 << 27),
         }, {
                 .name           = "dmc0",
-                .id             = -1,
                 .parent         = &clk_pclk.clk,
                 .enable         = s5p64x0_pclk_ctrl,
                 .ctrlbit        = (1 << 30),
@@ -299,49 +282,45 @@ static struct clk init_clocks_off[] = {
 static struct clk init_clocks[] = {
         {
                 .name           = "intc",
-                .id             = -1,
                 .parent         = &clk_hclk.clk,
                 .enable         = s5p64x0_hclk0_ctrl,
                 .ctrlbit        = (1 << 1),
         }, {
                 .name           = "mem",
-                .id             = -1,
                 .parent         = &clk_hclk.clk,
                 .enable         = s5p64x0_hclk0_ctrl,
                 .ctrlbit        = (1 << 21),
         }, {
                 .name           = "uart",
-                .id             = 0,
+                .devname        = "s3c6400-uart.0",
                 .parent         = &clk_pclk_low.clk,
                 .enable         = s5p64x0_pclk_ctrl,
                 .ctrlbit        = (1 << 1),
         }, {
                 .name           = "uart",
-                .id             = 1,
+                .devname        = "s3c6400-uart.1",
                 .parent         = &clk_pclk_low.clk,
                 .enable         = s5p64x0_pclk_ctrl,
                 .ctrlbit        = (1 << 2),
         }, {
                 .name           = "uart",
-                .id             = 2,
+                .devname        = "s3c6400-uart.2",
                 .parent         = &clk_pclk_low.clk,
                 .enable         = s5p64x0_pclk_ctrl,
                 .ctrlbit        = (1 << 3),
         }, {
                 .name           = "uart",
-                .id             = 3,
+                .devname        = "s3c6400-uart.3",
                 .parent         = &clk_pclk_low.clk,
                 .enable         = s5p64x0_pclk_ctrl,
                 .ctrlbit        = (1 << 4),
         }, {
                 .name           = "timers",
-                .id             = -1,
                 .parent         = &clk_pclk_to_wdt_pwm.clk,
                 .enable         = s5p64x0_pclk_ctrl,
                 .ctrlbit        = (1 << 7),
         }, {
                 .name           = "gpio",
-                .id             = -1,
                 .parent         = &clk_pclk_low.clk,
                 .enable         = s5p64x0_pclk_ctrl,
                 .ctrlbit        = (1 << 18),
@@ -421,7 +400,6 @@ static struct clksrc_sources clkset_sclk_audio0 = {
 static struct clksrc_clk clk_sclk_audio0 = {
         .clk            = {
                 .name           = "audio-bus",
-                .id             = -1,
                 .enable         = s5p64x0_sclk_ctrl,
                 .ctrlbit        = (1 << 8),
                 .parent         = &clk_dout_epll.clk,
@@ -435,7 +413,7 @@ static struct clksrc_clk clksrcs[] = {
         {
                 .clk    = {
                         .name           = "sclk_mmc",
-                        .id             = 0,
+                        .devname        = "s3c-sdhci.0",
                         .ctrlbit        = (1 << 24),
                         .enable         = s5p64x0_sclk_ctrl,
                 },
@@ -445,7 +423,7 @@ static struct clksrc_clk clksrcs[] = {
         }, {
                 .clk    = {
                         .name           = "sclk_mmc",
-                        .id             = 1,
+                        .devname        = "s3c-sdhci.1",
                         .ctrlbit        = (1 << 25),
                         .enable         = s5p64x0_sclk_ctrl,
                 },
@@ -455,7 +433,7 @@ static struct clksrc_clk clksrcs[] = {
         }, {
                 .clk    = {
                         .name           = "sclk_mmc",
-                        .id             = 2,
+                        .devname        = "s3c-sdhci.2",
                         .ctrlbit        = (1 << 26),
                         .enable         = s5p64x0_sclk_ctrl,
                 },
@@ -465,7 +443,6 @@ static struct clksrc_clk clksrcs[] = {
         }, {
                 .clk    = {
                         .name           = "uclk1",
-                        .id             = -1,
                         .ctrlbit        = (1 << 5),
                         .enable         = s5p64x0_sclk_ctrl,
                 },
@@ -475,7 +452,7 @@ static struct clksrc_clk clksrcs[] = {
         }, {
                 .clk    = {
                         .name           = "sclk_spi",
-                        .id             = 0,
+                        .devname        = "s3c64xx-spi.0",
                         .ctrlbit        = (1 << 20),
                         .enable         = s5p64x0_sclk_ctrl,
                 },
@@ -485,7 +462,7 @@ static struct clksrc_clk clksrcs[] = {
         }, {
                 .clk    = {
                         .name           = "sclk_spi",
-                        .id             = 1,
+                        .devname        = "s3c64xx-spi.1",
                         .ctrlbit        = (1 << 21),
                         .enable         = s5p64x0_sclk_ctrl,
                 },
@@ -495,7 +472,6 @@ static struct clksrc_clk clksrcs[] = {
         }, {
                 .clk    = {
                         .name           = "sclk_fimc",
-                        .id             = -1,
                         .ctrlbit        = (1 << 10),
                         .enable         = s5p64x0_sclk_ctrl,
                 },
@@ -505,7 +481,6 @@ static struct clksrc_clk clksrcs[] = {
         }, {
                 .clk    = {
                         .name           = "aclk_mali",
-                        .id             = -1,
                         .ctrlbit        = (1 << 2),
                         .enable         = s5p64x0_sclk1_ctrl,
                 },
@@ -515,7 +490,6 @@ static struct clksrc_clk clksrcs[] = {
         }, {
                 .clk    = {
                         .name           = "sclk_2d",
-                        .id             = -1,
                         .ctrlbit        = (1 << 12),
                         .enable         = s5p64x0_sclk_ctrl,
                 },
@@ -525,7 +499,6 @@ static struct clksrc_clk clksrcs[] = {
         }, {
                 .clk    = {
                         .name           = "sclk_usi",
-                        .id             = -1,
                         .ctrlbit        = (1 << 7),
                         .enable         = s5p64x0_sclk_ctrl,
                 },
@@ -535,7 +508,6 @@ static struct clksrc_clk clksrcs[] = {
         }, {
                 .clk    = {
                         .name           = "sclk_camif",
-                        .id             = -1,
                         .ctrlbit        = (1 << 6),
                         .enable         = s5p64x0_sclk_ctrl,
                 },
@@ -545,7 +517,6 @@ static struct clksrc_clk clksrcs[] = {
         }, {
                 .clk    = {
                         .name           = "sclk_dispcon",
-                        .id             = -1,
                         .ctrlbit        = (1 << 1),
                         .enable         = s5p64x0_sclk1_ctrl,
                 },
@@ -555,7 +526,6 @@ static struct clksrc_clk clksrcs[] = {
         }, {
                 .clk    = {
                         .name           = "sclk_hsmmc44",
-                        .id             = -1,
                         .ctrlbit        = (1 << 30),
                         .enable         = s5p64x0_sclk_ctrl,
                 },
diff --git a/arch/arm/mach-s5p64x0/include/mach/clkdev.h b/arch/arm/mach-s5p64x0/include/mach/clkdev.h
new file mode 100644
index 000000000000..7dffa83d23ff
--- /dev/null
+++ b/arch/arm/mach-s5p64x0/include/mach/clkdev.h
@@ -0,0 +1,7 @@
+#ifndef __MACH_CLKDEV_H__
+#define __MACH_CLKDEV_H__
+
+#define __clk_get(clk) ({ 1; })
+#define __clk_put(clk) do {} while (0)
+
+#endif
diff --git a/arch/arm/mach-s5p64x0/mach-smdk6440.c b/arch/arm/mach-s5p64x0/mach-smdk6440.c
index 2d559f10fd47..346f8dfa6f35 100644
--- a/arch/arm/mach-s5p64x0/mach-smdk6440.c
+++ b/arch/arm/mach-s5p64x0/mach-smdk6440.c
@@ -46,6 +46,7 @@
 #include <plat/adc.h>
 #include <plat/ts.h>
 #include <plat/s5p-time.h>
+#include <plat/backlight.h>
 
 #define SMDK6440_UCON_DEFAULT   (S3C2410_UCON_TXILEVEL |        \
                                 S3C2410_UCON_RXILEVEL |         \
@@ -91,45 +92,6 @@ static struct s3c2410_uartcfg smdk6440_uartcfgs[] __initdata = {
         },
 };
 
-static int smdk6440_backlight_init(struct device *dev)
-{
-        int ret;
-
-        ret = gpio_request(S5P6440_GPF(15), "Backlight");
-        if (ret) {
-                printk(KERN_ERR "failed to request GPF for PWM-OUT1\n");
-                return ret;
-        }
-
-        /* Configure GPIO pin with S5P6440_GPF15_PWM_TOUT1 */
-        s3c_gpio_cfgpin(S5P6440_GPF(15), S3C_GPIO_SFN(2));
-
-        return 0;
-}
-
-static void smdk6440_backlight_exit(struct device *dev)
-{
-        s3c_gpio_cfgpin(S5P6440_GPF(15), S3C_GPIO_OUTPUT);
-        gpio_free(S5P6440_GPF(15));
-}
-
-static struct platform_pwm_backlight_data smdk6440_backlight_data = {
-        .pwm_id         = 1,
-        .max_brightness = 255,
-        .dft_brightness = 255,
-        .pwm_period_ns  = 78770,
-        .init           = smdk6440_backlight_init,
-        .exit           = smdk6440_backlight_exit,
-};
-
-static struct platform_device smdk6440_backlight_device = {
-        .name           = "pwm-backlight",
-        .dev            = {
-                .parent         = &s3c_device_timer[1].dev,
-                .platform_data  = &smdk6440_backlight_data,
-        },
-};
-
 static struct platform_device *smdk6440_devices[] __initdata = {
         &s3c_device_adc,
         &s3c_device_rtc,
@@ -139,8 +101,6 @@ static struct platform_device *smdk6440_devices[] __initdata = {
         &s3c_device_wdt,
         &samsung_asoc_dma,
         &s5p6440_device_iis,
-        &s3c_device_timer[1],
-        &smdk6440_backlight_device,
 };
 
 static struct s3c2410_platform_i2c s5p6440_i2c0_data __initdata = {
@@ -175,6 +135,16 @@ static struct s3c2410_ts_mach_info s3c_ts_platform __initdata = {
         .oversampling_shift     = 2,
 };
 
+/* LCD Backlight data */
+static struct samsung_bl_gpio_info smdk6440_bl_gpio_info = {
+        .no = S5P6440_GPF(15),
+        .func = S3C_GPIO_SFN(2),
+};
+
+static struct platform_pwm_backlight_data smdk6440_bl_data = {
+        .pwm_id = 1,
+};
+
 static void __init smdk6440_map_io(void)
 {
         s5p_init_io(NULL, 0, S5P64X0_SYS_ID);
@@ -194,6 +164,8 @@ static void __init smdk6440_machine_init(void)
         i2c_register_board_info(1, smdk6440_i2c_devs1,
                         ARRAY_SIZE(smdk6440_i2c_devs1));
 
+        samsung_bl_set(&smdk6440_bl_gpio_info, &smdk6440_bl_data);
+
         platform_add_devices(smdk6440_devices, ARRAY_SIZE(smdk6440_devices));
 }
 
diff --git a/arch/arm/mach-s5p64x0/mach-smdk6450.c b/arch/arm/mach-s5p64x0/mach-smdk6450.c
index d19c4690ee97..33f2adf8f3fe 100644
--- a/arch/arm/mach-s5p64x0/mach-smdk6450.c
+++ b/arch/arm/mach-s5p64x0/mach-smdk6450.c
@@ -46,6 +46,7 @@
 #include <plat/adc.h>
 #include <plat/ts.h>
 #include <plat/s5p-time.h>
+#include <plat/backlight.h>
 
 #define SMDK6450_UCON_DEFAULT   (S3C2410_UCON_TXILEVEL |        \
                                 S3C2410_UCON_RXILEVEL |         \
@@ -109,45 +110,6 @@ static struct s3c2410_uartcfg smdk6450_uartcfgs[] __initdata = {
 #endif
 };
 
-static int smdk6450_backlight_init(struct device *dev)
-{
-        int ret;
-
-        ret = gpio_request(S5P6450_GPF(15), "Backlight");
-        if (ret) {
-                printk(KERN_ERR "failed to request GPF for PWM-OUT1\n");
-                return ret;
-        }
-
-        /* Configure GPIO pin with S5P6450_GPF15_PWM_TOUT1 */
-        s3c_gpio_cfgpin(S5P6450_GPF(15), S3C_GPIO_SFN(2));
-
-        return 0;
-}
-
-static void smdk6450_backlight_exit(struct device *dev)
-{
-        s3c_gpio_cfgpin(S5P6450_GPF(15), S3C_GPIO_OUTPUT);
-        gpio_free(S5P6450_GPF(15));
-}
-
-static struct platform_pwm_backlight_data smdk6450_backlight_data = {
-        .pwm_id         = 1,
-        .max_brightness = 255,
-        .dft_brightness = 255,
-        .pwm_period_ns  = 78770,
-        .init           = smdk6450_backlight_init,
-        .exit           = smdk6450_backlight_exit,
-};
-
-static struct platform_device smdk6450_backlight_device = {
-        .name           = "pwm-backlight",
-        .dev            = {
-                .parent         = &s3c_device_timer[1].dev,
-                .platform_data  = &smdk6450_backlight_data,
-        },
-};
-
 static struct platform_device *smdk6450_devices[] __initdata = {
         &s3c_device_adc,
         &s3c_device_rtc,
@@ -157,8 +119,6 @@ static struct platform_device *smdk6450_devices[] __initdata = {
         &s3c_device_wdt,
         &samsung_asoc_dma,
         &s5p6450_device_iis0,
-        &s3c_device_timer[1],
-        &smdk6450_backlight_device,
         /* s5p6450_device_spi0 will be added */
 };
 
@@ -194,6 +154,16 @@ static struct s3c2410_ts_mach_info s3c_ts_platform __initdata = {
         .oversampling_shift     = 2,
 };
 
+/* LCD Backlight data */
+static struct samsung_bl_gpio_info smdk6450_bl_gpio_info = {
+        .no = S5P6450_GPF(15),
+        .func = S3C_GPIO_SFN(2),
+};
+
+static struct platform_pwm_backlight_data smdk6450_bl_data = {
+        .pwm_id = 1,
+};
+
 static void __init smdk6450_map_io(void)
 {
         s5p_init_io(NULL, 0, S5P64X0_SYS_ID);
@@ -213,6 +183,8 @@ static void __init smdk6450_machine_init(void)
         i2c_register_board_info(1, smdk6450_i2c_devs1,
                         ARRAY_SIZE(smdk6450_i2c_devs1));
 
+        samsung_bl_set(&smdk6450_bl_gpio_info, &smdk6450_bl_data);
+
         platform_add_devices(smdk6450_devices, ARRAY_SIZE(smdk6450_devices));
 }
 
diff --git a/arch/arm/mach-s5pc100/Kconfig b/arch/arm/mach-s5pc100/Kconfig
index 608722ff4f28..e8a33c4b054c 100644
--- a/arch/arm/mach-s5pc100/Kconfig
+++ b/arch/arm/mach-s5pc100/Kconfig
@@ -56,6 +56,7 @@ config MACH_SMDKC100
         select S3C_DEV_RTC
         select S3C_DEV_WDT
         select SAMSUNG_DEV_ADC
+        select SAMSUNG_DEV_BACKLIGHT
         select SAMSUNG_DEV_IDE
         select SAMSUNG_DEV_KEYPAD
         select SAMSUNG_DEV_PWM
diff --git a/arch/arm/mach-s5pc100/clock.c b/arch/arm/mach-s5pc100/clock.c
index 0305e9b8282d..ff5cbb30de5b 100644
--- a/arch/arm/mach-s5pc100/clock.c
+++ b/arch/arm/mach-s5pc100/clock.c
@@ -31,7 +31,6 @@
 
 static struct clk s5p_clk_otgphy = {
         .name           = "otg_phy",
-        .id             = -1,
 };
 
 static struct clk *clk_src_mout_href_list[] = {
@@ -47,7 +46,6 @@ static struct clksrc_sources clk_src_mout_href = {
 static struct clksrc_clk clk_mout_href = {
         .clk = {
                 .name           = "mout_href",
-                .id             = -1,
         },
         .sources        = &clk_src_mout_href,
         .reg_src        = { .reg = S5P_CLK_SRC0, .shift = 20, .size = 1 },
@@ -66,7 +64,6 @@ static struct clksrc_sources clk_src_mout_48m = {
 static struct clksrc_clk clk_mout_48m = {
         .clk = {
                 .name           = "mout_48m",
-                .id             = -1,
         },
         .sources        = &clk_src_mout_48m,
         .reg_src        = { .reg = S5P_CLK_SRC1, .shift = 24, .size = 1 },
@@ -75,7 +72,6 @@ static struct clksrc_clk clk_mout_48m = {
 static struct clksrc_clk clk_mout_mpll = {
         .clk = {
                 .name           = "mout_mpll",
-                .id             = -1,
         },
         .sources        = &clk_src_mpll,
         .reg_src        = { .reg = S5P_CLK_SRC0, .shift = 4, .size = 1 },
@@ -85,7 +81,6 @@ static struct clksrc_clk clk_mout_mpll = {
 static struct clksrc_clk clk_mout_apll = {
         .clk    = {
                 .name           = "mout_apll",
-                .id             = -1,
         },
         .sources        = &clk_src_apll,
         .reg_src        = { .reg = S5P_CLK_SRC0, .shift = 0, .size = 1 },
@@ -94,7 +89,6 @@ static struct clksrc_clk clk_mout_apll = {
 static struct clksrc_clk clk_mout_epll = {
         .clk    = {
                 .name           = "mout_epll",
-                .id             = -1,
         },
         .sources        = &clk_src_epll,
         .reg_src        = { .reg = S5P_CLK_SRC0, .shift = 8, .size = 1 },
@@ -112,7 +106,6 @@ static struct clksrc_sources clk_src_mout_hpll = {
 static struct clksrc_clk clk_mout_hpll = {
         .clk    = {
                 .name           = "mout_hpll",
-                .id             = -1,
         },
         .sources        = &clk_src_mout_hpll,
         .reg_src        = { .reg = S5P_CLK_SRC0, .shift = 12, .size = 1 },
@@ -121,7 +114,6 @@ static struct clksrc_clk clk_mout_hpll = {
 static struct clksrc_clk clk_div_apll = {
         .clk    = {
                 .name   = "div_apll",
-                .id     = -1,
                 .parent = &clk_mout_apll.clk,
         },
         .reg_div = { .reg = S5P_CLK_DIV0, .shift = 0, .size = 1 },
@@ -130,7 +122,6 @@ static struct clksrc_clk clk_div_apll = {
 static struct clksrc_clk clk_div_arm = {
         .clk    = {
                 .name   = "div_arm",
-                .id     = -1,
                 .parent = &clk_div_apll.clk,
         },
         .reg_div = { .reg = S5P_CLK_DIV0, .shift = 4, .size = 3 },
@@ -139,7 +130,6 @@ static struct clksrc_clk clk_div_arm = {
 static struct clksrc_clk clk_div_d0_bus = {
         .clk    = {
                 .name   = "div_d0_bus",
-                .id     = -1,
                 .parent = &clk_div_arm.clk,
         },
         .reg_div = { .reg = S5P_CLK_DIV0, .shift = 8, .size = 3 },
@@ -148,7 +138,6 @@ static struct clksrc_clk clk_div_d0_bus = {
 static struct clksrc_clk clk_div_pclkd0 = {
         .clk    = {
                 .name   = "div_pclkd0",
-                .id     = -1,
                 .parent = &clk_div_d0_bus.clk,
         },
         .reg_div = { .reg = S5P_CLK_DIV0, .shift = 12, .size = 3 },
@@ -157,7 +146,6 @@ static struct clksrc_clk clk_div_pclkd0 = {
 static struct clksrc_clk clk_div_secss = {
         .clk    = {
                 .name   = "div_secss",
-                .id     = -1,
                 .parent = &clk_div_d0_bus.clk,
         },
         .reg_div = { .reg = S5P_CLK_DIV0, .shift = 16, .size = 3 },
@@ -166,7 +154,6 @@ static struct clksrc_clk clk_div_secss = {
 static struct clksrc_clk clk_div_apll2 = {
         .clk    = {
                 .name   = "div_apll2",
-                .id     = -1,
                 .parent = &clk_mout_apll.clk,
         },
         .reg_div = { .reg = S5P_CLK_DIV1, .shift = 0, .size = 3 },
@@ -185,7 +172,6 @@ struct clksrc_sources clk_src_mout_am = {
 static struct clksrc_clk clk_mout_am = {
         .clk    = {
                 .name   = "mout_am",
-                .id     = -1,
         },
         .sources = &clk_src_mout_am,
         .reg_src = { .reg = S5P_CLK_SRC0, .shift = 16, .size = 1 },
@@ -194,7 +180,6 @@ static struct clksrc_clk clk_mout_am = {
 static struct clksrc_clk clk_div_d1_bus = {
         .clk    = {
                 .name   = "div_d1_bus",
-                .id     = -1,
                 .parent = &clk_mout_am.clk,
         },
         .reg_div = { .reg = S5P_CLK_DIV1, .shift = 12, .size = 3 },
@@ -203,7 +188,6 @@ static struct clksrc_clk clk_div_d1_bus = {
 static struct clksrc_clk clk_div_mpll2 = {
         .clk    = {
                 .name   = "div_mpll2",
-                .id     = -1,
                 .parent = &clk_mout_am.clk,
         },
         .reg_div = { .reg = S5P_CLK_DIV1, .shift = 8, .size = 1 },
@@ -212,7 +196,6 @@ static struct clksrc_clk clk_div_mpll2 = {
 static struct clksrc_clk clk_div_mpll = {
         .clk    = {
                 .name   = "div_mpll",
-                .id     = -1,
                 .parent = &clk_mout_am.clk,
         },
         .reg_div = { .reg = S5P_CLK_DIV1, .shift = 4, .size = 2 },
@@ -231,7 +214,6 @@ struct clksrc_sources clk_src_mout_onenand = {
 static struct clksrc_clk clk_mout_onenand = {
         .clk    = {
                 .name   = "mout_onenand",
-                .id     = -1,
         },
         .sources = &clk_src_mout_onenand,
         .reg_src = { .reg = S5P_CLK_SRC0, .shift = 24, .size = 1 },
@@ -240,7 +222,6 @@ static struct clksrc_clk clk_mout_onenand = {
 static struct clksrc_clk clk_div_onenand = {
         .clk    = {
                 .name   = "div_onenand",
-                .id     = -1,
                 .parent = &clk_mout_onenand.clk,
         },
         .reg_div = { .reg = S5P_CLK_DIV1, .shift = 20, .size = 2 },
@@ -249,7 +230,6 @@ static struct clksrc_clk clk_div_onenand = {
 static struct clksrc_clk clk_div_pclkd1 = {
         .clk    = {
                 .name   = "div_pclkd1",
-                .id     = -1,
                 .parent = &clk_div_d1_bus.clk,
         },
         .reg_div = { .reg = S5P_CLK_DIV1, .shift = 16, .size = 3 },
@@ -258,7 +238,6 @@ static struct clksrc_clk clk_div_pclkd1 = {
 static struct clksrc_clk clk_div_cam = {
         .clk    = {
                 .name   = "div_cam",
-                .id     = -1,
                 .parent = &clk_div_mpll2.clk,
         },
         .reg_div = { .reg = S5P_CLK_DIV1, .shift = 24, .size = 5 },
@@ -267,7 +246,6 @@ static struct clksrc_clk clk_div_cam = {
 static struct clksrc_clk clk_div_hdmi = {
         .clk    = {
                 .name   = "div_hdmi",
-                .id     = -1,
                 .parent = &clk_mout_hpll.clk,
         },
         .reg_div = { .reg = S5P_CLK_DIV3, .shift = 28, .size = 4 },
@@ -399,367 +377,329 @@ static int s5pc100_sclk1_ctrl(struct clk *clk, int enable)
 static struct clk init_clocks_off[] = {
         {
                 .name           = "cssys",
-                .id             = -1,
                 .parent         = &clk_div_d0_bus.clk,
                 .enable         = s5pc100_d0_0_ctrl,
                 .ctrlbit        = (1 << 6),
         }, {
                 .name           = "secss",
-                .id             = -1,
                 .parent         = &clk_div_d0_bus.clk,
                 .enable         = s5pc100_d0_0_ctrl,
                 .ctrlbit        = (1 << 5),
         }, {
                 .name           = "g2d",
-                .id             = -1,
                 .parent         = &clk_div_d0_bus.clk,
                 .enable         = s5pc100_d0_0_ctrl,
                 .ctrlbit        = (1 << 4),
         }, {
                 .name           = "mdma",
-                .id             = -1,
                 .parent         = &clk_div_d0_bus.clk,
                 .enable         = s5pc100_d0_0_ctrl,
                 .ctrlbit        = (1 << 3),
         }, {
                 .name           = "cfcon",
-                .id             = -1,
                 .parent         = &clk_div_d0_bus.clk,
                 .enable         = s5pc100_d0_0_ctrl,
                 .ctrlbit        = (1 << 2),
         }, {
                 .name           = "nfcon",
-                .id             = -1,
                 .parent         = &clk_div_d0_bus.clk,
                 .enable         = s5pc100_d0_1_ctrl,
                 .ctrlbit        = (1 << 3),
         }, {
                 .name           = "onenandc",
-                .id             = -1,
                 .parent         = &clk_div_d0_bus.clk,
                 .enable         = s5pc100_d0_1_ctrl,
                 .ctrlbit        = (1 << 2),
         }, {
                 .name           = "sdm",
-                .id             = -1,
                 .parent         = &clk_div_d0_bus.clk,
                 .enable         = s5pc100_d0_2_ctrl,
                 .ctrlbit        = (1 << 2),
         }, {
                 .name           = "seckey",
-                .id             = -1,
                 .parent         = &clk_div_d0_bus.clk,
                 .enable         = s5pc100_d0_2_ctrl,
                 .ctrlbit        = (1 << 1),
         }, {
                 .name           = "hsmmc",
-                .id             = 2,
+                .devname        = "s3c-sdhci.2",
                 .parent         = &clk_div_d1_bus.clk,
                 .enable         = s5pc100_d1_0_ctrl,
                 .ctrlbit        = (1 << 7),
         }, {
                 .name           = "hsmmc",
-                .id             = 1,
+                .devname        = "s3c-sdhci.1",
                 .parent         = &clk_div_d1_bus.clk,
                 .enable         = s5pc100_d1_0_ctrl,
                 .ctrlbit        = (1 << 6),
         }, {
                 .name           = "hsmmc",
-                .id             = 0,
+                .devname        = "s3c-sdhci.0",
                 .parent         = &clk_div_d1_bus.clk,
                 .enable         = s5pc100_d1_0_ctrl,
                 .ctrlbit        = (1 << 5),
         }, {
                 .name           = "modemif",
-                .id             = -1,
                 .parent         = &clk_div_d1_bus.clk,
                 .enable         = s5pc100_d1_0_ctrl,
                 .ctrlbit        = (1 << 4),
         }, {
                 .name           = "otg",
-                .id             = -1,
                 .parent         = &clk_div_d1_bus.clk,
                 .enable         = s5pc100_d1_0_ctrl,
                 .ctrlbit        = (1 << 3),
         }, {
                 .name           = "usbhost",
-                .id             = -1,
                 .parent         = &clk_div_d1_bus.clk,
                 .enable         = s5pc100_d1_0_ctrl,
                 .ctrlbit        = (1 << 2),
         }, {
                 .name           = "pdma",
-                .id             = 1,
+                .devname        = "s3c-pl330.1",
                 .parent         = &clk_div_d1_bus.clk,
                 .enable         = s5pc100_d1_0_ctrl,
                 .ctrlbit        = (1 << 1),
         }, {
                 .name           = "pdma",
-                .id             = 0,
+                .devname        = "s3c-pl330.0",
                 .parent         = &clk_div_d1_bus.clk,
                 .enable         = s5pc100_d1_0_ctrl,
                 .ctrlbit        = (1 << 0),
         }, {
                 .name           = "lcd",
-                .id             = -1,
                 .parent         = &clk_div_d1_bus.clk,
                 .enable         = s5pc100_d1_1_ctrl,
                 .ctrlbit        = (1 << 0),
         }, {
                 .name           = "rotator",
-                .id             = -1,
                 .parent         = &clk_div_d1_bus.clk,
                 .enable         = s5pc100_d1_1_ctrl,
                 .ctrlbit        = (1 << 1),
         }, {
                 .name           = "fimc",
-                .id             = 0,
+                .devname        = "s5p-fimc.0",
                 .parent         = &clk_div_d1_bus.clk,
                 .enable         = s5pc100_d1_1_ctrl,
                 .ctrlbit        = (1 << 2),
         }, {
                 .name           = "fimc",
-                .id             = 1,
+                .devname        = "s5p-fimc.1",
                 .parent         = &clk_div_d1_bus.clk,
                 .enable         = s5pc100_d1_1_ctrl,
                 .ctrlbit        = (1 << 3),
         }, {
                 .name           = "fimc",
-                .id             = 2,
-                .parent         = &clk_div_d1_bus.clk,
+                .devname        = "s5p-fimc.2",
                 .enable         = s5pc100_d1_1_ctrl,
                 .ctrlbit        = (1 << 4),
         }, {
                 .name           = "jpeg",
-                .id             = -1,
                 .parent         = &clk_div_d1_bus.clk,
                 .enable         = s5pc100_d1_1_ctrl,
                 .ctrlbit        = (1 << 5),
         }, {
                 .name           = "mipi-dsim",
-                .id             = -1,
                 .parent         = &clk_div_d1_bus.clk,
                 .enable         = s5pc100_d1_1_ctrl,
                 .ctrlbit        = (1 << 6),
         }, {
                 .name           = "mipi-csis",
-                .id             = -1,
                 .parent         = &clk_div_d1_bus.clk,
                 .enable         = s5pc100_d1_1_ctrl,
                 .ctrlbit        = (1 << 7),
         }, {
                 .name           = "g3d",
-                .id             = 0,
                 .parent         = &clk_div_d1_bus.clk,
                 .enable         = s5pc100_d1_0_ctrl,
                 .ctrlbit        = (1 << 8),
         }, {
                 .name           = "tv",
-                .id             = -1,
                 .parent         = &clk_div_d1_bus.clk,
                 .enable         = s5pc100_d1_2_ctrl,
                 .ctrlbit        = (1 << 0),
         }, {
                 .name           = "vp",
-                .id             = -1,
                 .parent         = &clk_div_d1_bus.clk,
                 .enable         = s5pc100_d1_2_ctrl,
                 .ctrlbit        = (1 << 1),
         }, {
                 .name           = "mixer",
-                .id             = -1,
                 .parent         = &clk_div_d1_bus.clk,
                 .enable         = s5pc100_d1_2_ctrl,
                 .ctrlbit        = (1 << 2),
         }, {
                 .name           = "hdmi",
-                .id             = -1,
                 .parent         = &clk_div_d1_bus.clk,
                 .enable         = s5pc100_d1_2_ctrl,
                 .ctrlbit        = (1 << 3),
         }, {
                 .name           = "mfc",
-                .id             = -1,
                 .parent         = &clk_div_d1_bus.clk,
                 .enable         = s5pc100_d1_2_ctrl,
                 .ctrlbit        = (1 << 4),
         }, {
                 .name           = "apc",
-                .id             = -1,
                 .parent         = &clk_div_d1_bus.clk,
                 .enable         = s5pc100_d1_3_ctrl,
                 .ctrlbit        = (1 << 2),
         }, {
                 .name           = "iec",
-                .id             = -1,
                 .parent         = &clk_div_d1_bus.clk,
                 .enable         = s5pc100_d1_3_ctrl,
                 .ctrlbit        = (1 << 3),
         }, {
                 .name           = "systimer",
-                .id             = -1,
                 .parent         = &clk_div_d1_bus.clk,
                 .enable         = s5pc100_d1_3_ctrl,
                 .ctrlbit        = (1 << 7),
         }, {
                 .name           = "watchdog",
-                .id             = -1,
                 .parent         = &clk_div_d1_bus.clk,
                 .enable         = s5pc100_d1_3_ctrl,
                 .ctrlbit        = (1 << 8),
         }, {
                 .name           = "rtc",
-                .id             = -1,
                 .parent         = &clk_div_d1_bus.clk,
                 .enable         = s5pc100_d1_3_ctrl,
                 .ctrlbit        = (1 << 9),
         }, {
                 .name           = "i2c",
-                .id             = 0,
+                .devname        = "s3c2440-i2c.0",
                 .parent         = &clk_div_d1_bus.clk,
                 .enable         = s5pc100_d1_4_ctrl,
                 .ctrlbit        = (1 << 4),
         }, {
                 .name           = "i2c",
-                .id             = 1,
+                .devname        = "s3c2440-i2c.1",
                 .parent         = &clk_div_d1_bus.clk,
                 .enable         = s5pc100_d1_4_ctrl,
                 .ctrlbit        = (1 << 5),
         }, {
                 .name           = "spi",
-                .id             = 0,
+                .devname        = "s3c64xx-spi.0",
                 .parent         = &clk_div_d1_bus.clk,
                 .enable         = s5pc100_d1_4_ctrl,
                 .ctrlbit        = (1 << 6),
         }, {
                 .name           = "spi",
-                .id             = 1,
+                .devname        = "s3c64xx-spi.1",
                 .parent         = &clk_div_d1_bus.clk,
                 .enable         = s5pc100_d1_4_ctrl,
                 .ctrlbit        = (1 << 7),
         }, {
                 .name           = "spi",
-                .id             = 2,
+                .devname        = "s3c64xx-spi.2",
                 .parent         = &clk_div_d1_bus.clk,
                 .enable         = s5pc100_d1_4_ctrl,
                 .ctrlbit        = (1 << 8),
         }, {
                 .name           = "irda",
-                .id             = -1,
                 .parent         = &clk_div_d1_bus.clk,
                 .enable         = s5pc100_d1_4_ctrl,
                 .ctrlbit        = (1 << 9),
         }, {
                 .name           = "ccan",
-                .id             = 0,
                 .parent         = &clk_div_d1_bus.clk,
                 .enable         = s5pc100_d1_4_ctrl,
                 .ctrlbit        = (1 << 10),
         }, {
                 .name           = "ccan",
-                .id             = 1,
                 .parent         = &clk_div_d1_bus.clk,
                 .enable         = s5pc100_d1_4_ctrl,
                 .ctrlbit        = (1 << 11),
         }, {
                 .name           = "hsitx",
-                .id             = -1,
                 .parent         = &clk_div_d1_bus.clk,
                 .enable         = s5pc100_d1_4_ctrl,
                 .ctrlbit        = (1 << 12),
         }, {
                 .name           = "hsirx",
-                .id             = -1,
                 .parent         = &clk_div_d1_bus.clk,
                 .enable         = s5pc100_d1_4_ctrl,
                 .ctrlbit        = (1 << 13),
         }, {
                 .name           = "iis",
-                .id             = 0,
+                .devname        = "samsung-i2s.0",
                 .parent         = &clk_div_pclkd1.clk,
                 .enable         = s5pc100_d1_5_ctrl,
                 .ctrlbit        = (1 << 0),
         }, {
                 .name           = "iis",
-                .id             = 1,
+                .devname        = "samsung-i2s.1",
                 .parent         = &clk_div_pclkd1.clk,
                 .enable         = s5pc100_d1_5_ctrl,
                 .ctrlbit        = (1 << 1),
         }, {
                 .name           = "iis",
-                .id             = 2,
+                .devname        = "samsung-i2s.2",
                 .parent         = &clk_div_pclkd1.clk,
                 .enable         = s5pc100_d1_5_ctrl,
                 .ctrlbit        = (1 << 2),
         }, {
                 .name           = "ac97",
-                .id             = -1,
                 .parent         = &clk_div_pclkd1.clk,
                 .enable         = s5pc100_d1_5_ctrl,
                 .ctrlbit        = (1 << 3),
         }, {
                 .name           = "pcm",
-                .id             = 0,
+                .devname        = "samsung-pcm.0",
                 .parent         = &clk_div_pclkd1.clk,
                 .enable         = s5pc100_d1_5_ctrl,
                 .ctrlbit        = (1 << 4),
         }, {
                 .name           = "pcm",
-                .id             = 1,
+                .devname        = "samsung-pcm.1",
                 .parent         = &clk_div_pclkd1.clk,
                 .enable         = s5pc100_d1_5_ctrl,
                 .ctrlbit        = (1 << 5),
         }, {
                 .name           = "spdif",
-                .id             = -1,
                 .parent         = &clk_div_pclkd1.clk,
                 .enable         = s5pc100_d1_5_ctrl,
                 .ctrlbit        = (1 << 6),
         }, {
                 .name           = "adc",
-                .id             = -1,
                 .parent         = &clk_div_pclkd1.clk,
                 .enable         = s5pc100_d1_5_ctrl,
                 .ctrlbit        = (1 << 7),
         }, {
                 .name           = "keypad",
-                .id             = -1,
                 .parent         = &clk_div_pclkd1.clk,
                 .enable         = s5pc100_d1_5_ctrl,
                 .ctrlbit        = (1 << 8),
         }, {
                 .name           = "spi_48m",
-                .id             = 0,
+                .devname        = "s3c64xx-spi.0",
                 .parent         = &clk_mout_48m.clk,
                 .enable         = s5pc100_sclk0_ctrl,
                 .ctrlbit        = (1 << 7),
         }, {
                 .name           = "spi_48m",
-                .id             = 1,
+                .devname        = "s3c64xx-spi.1",
                 .parent         = &clk_mout_48m.clk,
                 .enable         = s5pc100_sclk0_ctrl,
                 .ctrlbit        = (1 << 8),
         }, {
                 .name           = "spi_48m",
-                .id             = 2,
+                .devname        = "s3c64xx-spi.2",
                 .parent         = &clk_mout_48m.clk,
                 .enable         = s5pc100_sclk0_ctrl,
                 .ctrlbit        = (1 << 9),
         }, {
                 .name           = "mmc_48m",
-                .id             = 0,
+                .devname        = "s3c-sdhci.0",
                 .parent         = &clk_mout_48m.clk,
                 .enable         = s5pc100_sclk0_ctrl,
                 .ctrlbit        = (1 << 15),
         }, {
                 .name           = "mmc_48m",
-                .id             = 1,
+                .devname        = "s3c-sdhci.1",
                 .parent         = &clk_mout_48m.clk,
                 .enable         = s5pc100_sclk0_ctrl,
                 .ctrlbit        = (1 << 16),
         }, {
                 .name           = "mmc_48m",
-                .id             = 2,
+                .devname        = "s3c-sdhci.2",
                 .parent         = &clk_mout_48m.clk,
                 .enable         = s5pc100_sclk0_ctrl,
                 .ctrlbit        = (1 << 17),
@@ -768,33 +708,27 @@ static struct clk init_clocks_off[] = {
 
 static struct clk clk_vclk54m = {
         .name           = "vclk_54m",
-        .id             = -1,
         .rate           = 54000000,
 };
 
 static struct clk clk_i2scdclk0 = {
         .name           = "i2s_cdclk0",
-        .id             = -1,
 };
 
 static struct clk clk_i2scdclk1 = {
         .name           = "i2s_cdclk1",
-        .id             = -1,
 };
 
 static struct clk clk_i2scdclk2 = {
         .name           = "i2s_cdclk2",
-        .id             = -1,
 };
 
 static struct clk clk_pcmcdclk0 = {
         .name           = "pcm_cdclk0",
-        .id             = -1,
 };
 
 static struct clk clk_pcmcdclk1 = {
         .name           = "pcm_cdclk1",
-        .id             = -1,
 };
 
 static struct clk *clk_src_group1_list[] = {
@@ -836,7 +770,7 @@ struct clksrc_sources clk_src_group3 = {
 static struct clksrc_clk clk_sclk_audio0 = {
         .clk    = {
                 .name           = "sclk_audio",
-                .id             = 0,
+                .devname        = "samsung-pcm.0",
                 .ctrlbit        = (1 << 8),
                 .enable         = s5pc100_sclk1_ctrl,
         },
@@ -862,7 +796,7 @@ struct clksrc_sources clk_src_group4 = {
 static struct clksrc_clk clk_sclk_audio1 = {
         .clk    = {
                 .name           = "sclk_audio",
-                .id             = 1,
+                .devname        = "samsung-pcm.1",
                 .ctrlbit        = (1 << 9),
                 .enable         = s5pc100_sclk1_ctrl,
         },
@@ -887,7 +821,7 @@ struct clksrc_sources clk_src_group5 = {
 static struct clksrc_clk clk_sclk_audio2 = {
         .clk    = {
                 .name           = "sclk_audio",
-                .id             = 2,
+                .devname        = "samsung-pcm.2",
                 .ctrlbit        = (1 << 10),
                 .enable         = s5pc100_sclk1_ctrl,
         },
@@ -976,48 +910,12 @@ struct clksrc_sources clk_src_sclk_spdif = {
         .nr_sources     = ARRAY_SIZE(clk_sclk_spdif_list),
 };
 
-static int s5pc100_spdif_set_rate(struct clk *clk, unsigned long rate)
-{
-        struct clk *pclk;
-        int ret;
-
-        pclk = clk_get_parent(clk);
-        if (IS_ERR(pclk))
-                return -EINVAL;
-
-        ret = pclk->ops->set_rate(pclk, rate);
-        clk_put(pclk);
-
-        return ret;
-}
-
-static unsigned long s5pc100_spdif_get_rate(struct clk *clk)
-{
-        struct clk *pclk;
-        int rate;
-
-        pclk = clk_get_parent(clk);
-        if (IS_ERR(pclk))
-                return -EINVAL;
-
-        rate = pclk->ops->get_rate(clk);
-        clk_put(pclk);
-
-        return rate;
-}
-
-static struct clk_ops s5pc100_sclk_spdif_ops = {
-        .set_rate       = s5pc100_spdif_set_rate,
-        .get_rate       = s5pc100_spdif_get_rate,
-};
-
 static struct clksrc_clk clk_sclk_spdif = {
         .clk    = {
                 .name           = "sclk_spdif",
-                .id             = -1,
                 .ctrlbit        = (1 << 11),
                 .enable         = s5pc100_sclk1_ctrl,
-                .ops            = &s5pc100_sclk_spdif_ops,
+                .ops            = &s5p_sclk_spdif_ops,
         },
         .sources = &clk_src_sclk_spdif,
         .reg_src = { .reg = S5P_CLK_SRC3, .shift = 24, .size = 2 },
@@ -1027,7 +925,7 @@ static struct clksrc_clk clksrcs[] = {
         {
                 .clk    = {
                         .name           = "sclk_spi",
-                        .id             = 0,
+                        .devname        = "s3c64xx-spi.0",
                         .ctrlbit        = (1 << 4),
                         .enable         = s5pc100_sclk0_ctrl,
 
@@ -1038,7 +936,7 @@ static struct clksrc_clk clksrcs[] = {
         }, {
                 .clk    = {
                         .name           = "sclk_spi",
-                        .id             = 1,
+                        .devname        = "s3c64xx-spi.1",
                         .ctrlbit        = (1 << 5),
                         .enable         = s5pc100_sclk0_ctrl,
 
@@ -1049,7 +947,7 @@ static struct clksrc_clk clksrcs[] = {
         }, {
                 .clk    = {
                         .name           = "sclk_spi",
-                        .id             = 2,
+                        .devname        = "s3c64xx-spi.2",
                         .ctrlbit        = (1 << 6),
                         .enable         = s5pc100_sclk0_ctrl,
 
@@ -1060,7 +958,6 @@ static struct clksrc_clk clksrcs[] = {
         }, {
                 .clk    = {
                         .name           = "uclk1",
-                        .id             = -1,
                         .ctrlbit        = (1 << 3),
                         .enable         = s5pc100_sclk0_ctrl,
 
@@ -1071,7 +968,6 @@ static struct clksrc_clk clksrcs[] = {
         }, {
                 .clk    = {
                         .name           = "sclk_mixer",
-                        .id             = -1,
                         .ctrlbit        = (1 << 6),
                         .enable         = s5pc100_sclk0_ctrl,
 
@@ -1081,7 +977,6 @@ static struct clksrc_clk clksrcs[] = {
         }, {
                 .clk    = {
                         .name           = "sclk_lcd",
-                        .id             = -1,
                         .ctrlbit        = (1 << 0),
                         .enable         = s5pc100_sclk1_ctrl,
 
@@ -1092,7 +987,7 @@ static struct clksrc_clk clksrcs[] = {
         }, {
                 .clk    = {
                         .name           = "sclk_fimc",
-                        .id             = 0,
+                        .devname        = "s5p-fimc.0",
                         .ctrlbit        = (1 << 1),
                         .enable         = s5pc100_sclk1_ctrl,
 
@@ -1103,7 +998,7 @@ static struct clksrc_clk clksrcs[] = {
         }, {
                 .clk    = {
                         .name           = "sclk_fimc",
-                        .id             = 1,
+                        .devname        = "s5p-fimc.1",
                         .ctrlbit        = (1 << 2),
                         .enable         = s5pc100_sclk1_ctrl,
 
@@ -1114,7 +1009,7 @@ static struct clksrc_clk clksrcs[] = {
         }, {
                 .clk    = {
                         .name           = "sclk_fimc",
-                        .id             = 2,
+                        .devname        = "s5p-fimc.2",
                         .ctrlbit        = (1 << 3),
                         .enable         = s5pc100_sclk1_ctrl,
 
@@ -1125,7 +1020,7 @@ static struct clksrc_clk clksrcs[] = {
         }, {
                 .clk    = {
                         .name           = "sclk_mmc",
-                        .id             = 0,
+                        .devname        = "s3c-sdhci.0",
                         .ctrlbit        = (1 << 12),
                         .enable         = s5pc100_sclk1_ctrl,
 
@@ -1136,7 +1031,7 @@ static struct clksrc_clk clksrcs[] = {
         }, {
                 .clk    = {
                         .name           = "sclk_mmc",
-                        .id             = 1,
+                        .devname        = "s3c-sdhci.1",
                         .ctrlbit        = (1 << 13),
                         .enable         = s5pc100_sclk1_ctrl,
 
@@ -1147,7 +1042,7 @@ static struct clksrc_clk clksrcs[] = {
         }, {
                 .clk    = {
                         .name           = "sclk_mmc",
-                        .id             = 2,
+                        .devname        = "s3c-sdhci.2",
                         .ctrlbit        = (1 << 14),
                         .enable         = s5pc100_sclk1_ctrl,
 
@@ -1158,7 +1053,6 @@ static struct clksrc_clk clksrcs[] = {
         }, {
                 .clk    = {
                         .name           = "sclk_irda",
-                        .id             = 2,
                         .ctrlbit        = (1 << 10),
                         .enable         = s5pc100_sclk0_ctrl,
 
@@ -1169,7 +1063,6 @@ static struct clksrc_clk clksrcs[] = {
         }, {
                 .clk    = {
                         .name           = "sclk_irda",
-                        .id             = -1,
                         .ctrlbit        = (1 << 10),
                         .enable         = s5pc100_sclk0_ctrl,
 
@@ -1180,7 +1073,6 @@ static struct clksrc_clk clksrcs[] = {
         }, {
                 .clk    = {
                         .name           = "sclk_pwi",
-                        .id             = -1,
                         .ctrlbit        = (1 << 1),
                         .enable         = s5pc100_sclk0_ctrl,
 
@@ -1191,7 +1083,6 @@ static struct clksrc_clk clksrcs[] = {
         }, {
                 .clk    = {
                         .name           = "sclk_uhost",
-                        .id             = -1,
                         .ctrlbit        = (1 << 11),
                         .enable         = s5pc100_sclk0_ctrl,
 
@@ -1291,79 +1182,70 @@ void __init_or_cpufreq s5pc100_setup_clocks(void)
 static struct clk init_clocks[] = {
         {
                 .name           = "tzic",
-                .id             = -1,
                 .parent         = &clk_div_d0_bus.clk,
                 .enable         = s5pc100_d0_0_ctrl,
                 .ctrlbit        = (1 << 1),
         }, {
                 .name           = "intc",
-                .id             = -1,
                 .parent         = &clk_div_d0_bus.clk,
                 .enable         = s5pc100_d0_0_ctrl,
                 .ctrlbit        = (1 << 0),
         }, {
                 .name           = "ebi",
-                .id             = -1,
                 .parent         = &clk_div_d0_bus.clk,
                 .enable         = s5pc100_d0_1_ctrl,
                 .ctrlbit        = (1 << 5),
         }, {
                 .name           = "intmem",
-                .id             = -1,
                 .parent         = &clk_div_d0_bus.clk,
                 .enable         = s5pc100_d0_1_ctrl,
                 .ctrlbit        = (1 << 4),
         }, {
                 .name           = "sromc",
-                .id             = -1,
                 .parent         = &clk_div_d0_bus.clk,
                 .enable         = s5pc100_d0_1_ctrl,
                 .ctrlbit        = (1 << 1),
         }, {
                 .name           = "dmc",
-                .id             = -1,
                 .parent         = &clk_div_d0_bus.clk,
                 .enable         = s5pc100_d0_1_ctrl,
                 .ctrlbit        = (1 << 0),
         }, {
                 .name           = "chipid",
-                .id             = -1,
                 .parent         = &clk_div_d0_bus.clk,
                 .enable         = s5pc100_d0_1_ctrl,
                 .ctrlbit        = (1 << 0),
         }, {
                 .name           = "gpio",
-                .id             = -1,
                 .parent         = &clk_div_d1_bus.clk,
                 .enable         = s5pc100_d1_3_ctrl,
                 .ctrlbit        = (1 << 1),
         }, {
                 .name           = "uart",
-                .id             = 0,
+                .devname        = "s3c6400-uart.0",
                 .parent         = &clk_div_d1_bus.clk,
                 .enable         = s5pc100_d1_4_ctrl,
                 .ctrlbit        = (1 << 0),
         }, {
                 .name           = "uart",
-                .id             = 1,
+                .devname        = "s3c6400-uart.1",
                 .parent         = &clk_div_d1_bus.clk,
                 .enable         = s5pc100_d1_4_ctrl,
                 .ctrlbit        = (1 << 1),
         }, {
                 .name           = "uart",
-                .id             = 2,
+                .devname        = "s3c6400-uart.2",
                 .parent         = &clk_div_d1_bus.clk,
                 .enable         = s5pc100_d1_4_ctrl,
                 .ctrlbit        = (1 << 2),
         }, {
                 .name           = "uart",
-                .id             = 3,
+                .devname        = "s3c6400-uart.3",
                 .parent         = &clk_div_d1_bus.clk,
                 .enable         = s5pc100_d1_4_ctrl,
                 .ctrlbit        = (1 << 3),
         }, {
                 .name           = "timers",
-                .id             = -1,
                 .parent         = &clk_div_d1_bus.clk,
                 .enable         = s5pc100_d1_3_ctrl,
                 .ctrlbit        = (1 << 6),
diff --git a/arch/arm/mach-s5pc100/include/mach/clkdev.h b/arch/arm/mach-s5pc100/include/mach/clkdev.h
new file mode 100644
index 000000000000..7dffa83d23ff
--- /dev/null
+++ b/arch/arm/mach-s5pc100/include/mach/clkdev.h
@@ -0,0 +1,7 @@
+#ifndef __MACH_CLKDEV_H__
+#define __MACH_CLKDEV_H__
+
+#define __clk_get(clk) ({ 1; })
+#define __clk_put(clk) do {} while (0)
+
+#endif
diff --git a/arch/arm/mach-s5pc100/include/mach/regs-fb.h b/arch/arm/mach-s5pc100/include/mach/regs-fb.h
deleted file mode 100644
index 07aa4d6054fe..000000000000
--- a/arch/arm/mach-s5pc100/include/mach/regs-fb.h
+++ /dev/null
@@ -1,105 +0,0 @@
-/* arch/arm/mach-s5pc100/include/mach/regs-fb.h
- *
- * Copyright 2009 Samsung Electronics Co.
- *   Pawel Osciak <p.osciak@samsung.com>
- *
- * Framebuffer register definitions for Samsung S5PC100.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#ifndef __ASM_ARCH_REGS_FB_H
-#define __ASM_ARCH_REGS_FB_H __FILE__
-
-#include <plat/regs-fb-v4.h>
-
-/* VP1 interface timing control */
-#define VP1CON0                                         (0x118)
-#define VP1_RATECON_EN                                  (1 << 31)
-#define VP1_CLKRATE_MASK                                (0xff)
-
-#define VP1CON1                                         (0x11c)
-#define VP1_VTREGCON_EN                                 (1 << 31)
-#define VP1_VBPD_MASK                                   (0xfff)
-#define VP1_VBPD_SHIFT                                  (16)
-
-
-#define WPALCON_H                                       (0x19c)
-#define WPALCON_L                                       (0x1a0)
-
-/* Palette control for WPAL0 and WPAL1 is the same as in S3C64xx, but
- * different for WPAL2-4
- */
-/* In WPALCON_L (aka WPALCON) */
-#define WPALCON_W1PAL_32BPP_A888                        (0x7 << 3)
-#define WPALCON_W0PAL_32BPP_A888                        (0x7 << 0)
-
-/* To set W2PAL-W4PAL consist of one bit from WPALCON_L and two from WPALCON_H,
- * e.g. W2PAL[2..0] is made of (WPALCON_H[10..9], WPALCON_L[6]).
- */
-#define WPALCON_L_WxPAL_L_MASK                          (0x1)
-#define WPALCON_L_W2PAL_L_SHIFT                         (6)
-#define WPALCON_L_W3PAL_L_SHIFT                         (7)
-#define WPALCON_L_W4PAL_L_SHIFT                         (8)
-
-#define WPALCON_L_WxPAL_H_MASK                          (0x3)
-#define WPALCON_H_W2PAL_H_SHIFT                         (9)
-#define WPALCON_H_W3PAL_H_SHIFT                         (13)
-#define WPALCON_H_W4PAL_H_SHIFT                         (17)
-
-/* Per-window alpha value registers */
-/* For window 0 8-bit alpha values are in VIDW0ALPHAx,
- * for windows 1-4 alpha values consist of two parts, the 4 low bits are
- * taken from VIDWxALPHAx and 4 high bits are from VIDOSDxC,
- * e.g. WIN1_ALPHA0_B[7..0] = (VIDOSD1C[3..0], VIDW1ALPHA0[3..0])
- */
-#define VIDWxALPHA0(_win)                               (0x200 + (_win * 8))
-#define VIDWxALPHA1(_win)                               (0x204 + (_win * 8))
-
-/* Only for window 0 in VIDW0ALPHAx. */
-#define VIDW0ALPHAx_R(_x)                               ((_x) << 16)
-#define VIDW0ALPHAx_R_MASK                              (0xff << 16)
-#define VIDW0ALPHAx_R_SHIFT                             (16)
-#define VIDW0ALPHAx_G(_x)                               ((_x) << 8)
-#define VIDW0ALPHAx_G_MASK                              (0xff << 8)
-#define VIDW0ALPHAx_G_SHIFT                             (8)
-#define VIDW0ALPHAx_B(_x)                               ((_x) << 0)
-#define VIDW0ALPHAx_B_MASK                              (0xff << 0)
-#define VIDW0ALPHAx_B_SHIFT                             (0)
-
-/* Low 4 bits of alpha0-1 for windows 1-4 */
-#define VIDW14ALPHAx_R_L(_x)                            ((_x) << 16)
-#define VIDW14ALPHAx_R_L_MASK                           (0xf << 16)
-#define VIDW14ALPHAx_R_L_SHIFT                          (16)
-#define VIDW14ALPHAx_G_L(_x)                            ((_x) << 8)
-#define VIDW14ALPHAx_G_L_MASK                           (0xf << 8)
-#define VIDW14ALPHAx_G_L_SHIFT                          (8)
-#define VIDW14ALPHAx_B_L(_x)                            ((_x) << 0)
-#define VIDW14ALPHAx_B_L_MASK                           (0xf << 0)
-#define VIDW14ALPHAx_B_L_SHIFT                          (0)
-
-
-/* Per-window blending equation control registers */
-#define BLENDEQx(_win)                                  (0x244 + ((_win) * 4))
-#define BLENDEQ1                                        (0x244)
-#define BLENDEQ2                                        (0x248)
-#define BLENDEQ3                                        (0x24c)
-#define BLENDEQ4                                        (0x250)
-
-#define BLENDEQx_Q_FUNC(_x)                             ((_x) << 18)
-#define BLENDEQx_Q_FUNC_MASK                            (0xf << 18)
-#define BLENDEQx_P_FUNC(_x)                             ((_x) << 12)
-#define BLENDEQx_P_FUNC_MASK                            (0xf << 12)
-#define BLENDEQx_B_FUNC(_x)                             ((_x) << 6)
-#define BLENDEQx_B_FUNC_MASK                            (0xf << 6)
-#define BLENDEQx_A_FUNC(_x)                             ((_x) << 0)
-#define BLENDEQx_A_FUNC_MASK                            (0xf << 0)
-
-#define BLENDCON                                        (0x260)
-#define BLENDCON_8BIT_ALPHA                             (1 << 0)
-
-
-#endif /* __ASM_ARCH_REGS_FB_H */
-
diff --git a/arch/arm/mach-s5pc100/mach-smdkc100.c b/arch/arm/mach-s5pc100/mach-smdkc100.c
index 0525cb3ef406..227d8908aab6 100644
--- a/arch/arm/mach-s5pc100/mach-smdkc100.c
+++ b/arch/arm/mach-s5pc100/mach-smdkc100.c
@@ -29,7 +29,6 @@
 #include <asm/mach/map.h>
 
 #include <mach/map.h>
-#include <mach/regs-fb.h>
 #include <mach/regs-gpio.h>
 
 #include <video/platform_lcd.h>
@@ -51,6 +50,8 @@
 #include <plat/keypad.h>
 #include <plat/ts.h>
 #include <plat/audio.h>
+#include <plat/backlight.h>
+#include <plat/regs-fb-v4.h>
 
 /* Following are default values for UCON, ULCON and UFCON UART registers */
 #define SMDKC100_UCON_DEFAULT   (S3C2410_UCON_TXILEVEL |        \
@@ -179,45 +180,6 @@ static struct samsung_keypad_platdata smdkc100_keypad_data __initdata = {
         .cols           = 8,
 };
 
-static int smdkc100_backlight_init(struct device *dev)
-{
-        int ret;
-
-        ret = gpio_request(S5PC100_GPD(0), "Backlight");
-        if (ret) {
-                printk(KERN_ERR "failed to request GPF for PWM-OUT0\n");
-                return ret;
-        }
-
-        /* Configure GPIO pin with S5PC100_GPD_TOUT_0 */
-        s3c_gpio_cfgpin(S5PC100_GPD(0), S3C_GPIO_SFN(2));
-
-        return 0;
-}
-
-static void smdkc100_backlight_exit(struct device *dev)
-{
-        s3c_gpio_cfgpin(S5PC100_GPD(0), S3C_GPIO_OUTPUT);
-        gpio_free(S5PC100_GPD(0));
-}
-
-static struct platform_pwm_backlight_data smdkc100_backlight_data = {
-        .pwm_id         = 0,
-        .max_brightness = 255,
-        .dft_brightness = 255,
-        .pwm_period_ns  = 78770,
-        .init           = smdkc100_backlight_init,
-        .exit           = smdkc100_backlight_exit,
-};
-
-static struct platform_device smdkc100_backlight_device = {
-        .name           = "pwm-backlight",
-        .dev            = {
-                .parent         = &s3c_device_timer[0].dev,
-                .platform_data  = &smdkc100_backlight_data,
-        },
-};
-
 static struct platform_device *smdkc100_devices[] __initdata = {
         &s3c_device_adc,
         &s3c_device_cfcon,
@@ -239,8 +201,6 @@ static struct platform_device *smdkc100_devices[] __initdata = {
         &s5p_device_fimc1,
         &s5p_device_fimc2,
         &s5pc100_device_spdif,
-        &s3c_device_timer[0],
-        &smdkc100_backlight_device,
 };
 
 static struct s3c2410_ts_mach_info s3c_ts_platform __initdata = {
@@ -249,6 +209,16 @@ static struct s3c2410_ts_mach_info s3c_ts_platform __initdata = {
         .oversampling_shift     = 2,
 };
 
+/* LCD Backlight data */
+static struct samsung_bl_gpio_info smdkc100_bl_gpio_info = {
+        .no = S5PC100_GPD(0),
+        .func = S3C_GPIO_SFN(2),
+};
+
+static struct platform_pwm_backlight_data smdkc100_bl_data = {
+        .pwm_id = 0,
+};
+
 static void __init smdkc100_map_io(void)
 {
         s5p_init_io(NULL, 0, S5P_VA_CHIPID);
@@ -276,6 +246,9 @@ static void __init smdkc100_machine_init(void)
         /* LCD init */
         gpio_request(S5PC100_GPH0(6), "GPH0");
         smdkc100_lcd_power_set(&smdkc100_lcd_power_data, 0);
+
+        samsung_bl_set(&smdkc100_bl_gpio_info, &smdkc100_bl_data);
+
         platform_add_devices(smdkc100_devices, ARRAY_SIZE(smdkc100_devices));
 }
 
diff --git a/arch/arm/mach-s5pc100/setup-fb-24bpp.c b/arch/arm/mach-s5pc100/setup-fb-24bpp.c
index d31c0f3fe222..8978e4cf9ed5 100644
--- a/arch/arm/mach-s5pc100/setup-fb-24bpp.c
+++ b/arch/arm/mach-s5pc100/setup-fb-24bpp.c
@@ -15,7 +15,6 @@
 #include <linux/fb.h>
 #include <linux/gpio.h>
 
-#include <mach/regs-fb.h>
 #include <mach/map.h>
 #include <plat/fb.h>
 #include <plat/gpio-cfg.h>
diff --git a/arch/arm/mach-s5pv210/Kconfig b/arch/arm/mach-s5pv210/Kconfig
index 37b5a97594a5..79bb3a0314ef 100644
--- a/arch/arm/mach-s5pv210/Kconfig
+++ b/arch/arm/mach-s5pv210/Kconfig
@@ -134,6 +134,7 @@ config MACH_SMDKV210
         select S3C_DEV_RTC
         select S3C_DEV_WDT
         select SAMSUNG_DEV_ADC
+        select SAMSUNG_DEV_BACKLIGHT
         select SAMSUNG_DEV_IDE
         select SAMSUNG_DEV_KEYPAD
         select SAMSUNG_DEV_PWM
diff --git a/arch/arm/mach-s5pv210/clock.c b/arch/arm/mach-s5pv210/clock.c
index 2d599499cefe..ae72f87eab15 100644
--- a/arch/arm/mach-s5pv210/clock.c
+++ b/arch/arm/mach-s5pv210/clock.c
@@ -36,7 +36,6 @@ static unsigned long xtal;
 static struct clksrc_clk clk_mout_apll = {
         .clk    = {
                 .name           = "mout_apll",
-                .id             = -1,
         },
         .sources        = &clk_src_apll,
         .reg_src        = { .reg = S5P_CLK_SRC0, .shift = 0, .size = 1 },
@@ -45,7 +44,6 @@ static struct clksrc_clk clk_mout_apll = {
 static struct clksrc_clk clk_mout_epll = {
         .clk    = {
                 .name           = "mout_epll",
-                .id             = -1,
         },
         .sources        = &clk_src_epll,
         .reg_src        = { .reg = S5P_CLK_SRC0, .shift = 8, .size = 1 },
@@ -54,7 +52,6 @@ static struct clksrc_clk clk_mout_epll = {
 static struct clksrc_clk clk_mout_mpll = {
         .clk = {
                 .name           = "mout_mpll",
-                .id             = -1,
         },
         .sources        = &clk_src_mpll,
         .reg_src        = { .reg = S5P_CLK_SRC0, .shift = 4, .size = 1 },
@@ -73,7 +70,6 @@ static struct clksrc_sources clkset_armclk = {
 static struct clksrc_clk clk_armclk = {
         .clk    = {
                 .name           = "armclk",
-                .id             = -1,
         },
         .sources        = &clkset_armclk,
         .reg_src        = { .reg = S5P_CLK_SRC0, .shift = 16, .size = 1 },
@@ -83,7 +79,6 @@ static struct clksrc_clk clk_armclk = {
 static struct clksrc_clk clk_hclk_msys = {
         .clk    = {
                 .name           = "hclk_msys",
-                .id             = -1,
                 .parent         = &clk_armclk.clk,
         },
         .reg_div        = { .reg = S5P_CLK_DIV0, .shift = 8, .size = 3 },
@@ -92,7 +87,6 @@ static struct clksrc_clk clk_hclk_msys = {
 static struct clksrc_clk clk_pclk_msys = {
         .clk    = {
                 .name           = "pclk_msys",
-                .id             = -1,
                 .parent         = &clk_hclk_msys.clk,
         },
         .reg_div        = { .reg = S5P_CLK_DIV0, .shift = 12, .size = 3 },
@@ -101,7 +95,6 @@ static struct clksrc_clk clk_pclk_msys = {
 static struct clksrc_clk clk_sclk_a2m = {
         .clk    = {
                 .name           = "sclk_a2m",
-                .id             = -1,
                 .parent         = &clk_mout_apll.clk,
         },
         .reg_div        = { .reg = S5P_CLK_DIV0, .shift = 4, .size = 3 },
@@ -120,7 +113,6 @@ static struct clksrc_sources clkset_hclk_sys = {
 static struct clksrc_clk clk_hclk_dsys = {
         .clk    = {
                 .name   = "hclk_dsys",
-                .id     = -1,
         },
         .sources        = &clkset_hclk_sys,
         .reg_src        = { .reg = S5P_CLK_SRC0, .shift = 20, .size = 1 },
@@ -130,7 +122,6 @@ static struct clksrc_clk clk_hclk_dsys = {
 static struct clksrc_clk clk_pclk_dsys = {
         .clk    = {
                 .name   = "pclk_dsys",
-                .id     = -1,
                 .parent = &clk_hclk_dsys.clk,
         },
         .reg_div = { .reg = S5P_CLK_DIV0, .shift = 20, .size = 3 },
@@ -139,7 +130,6 @@ static struct clksrc_clk clk_pclk_dsys = {
 static struct clksrc_clk clk_hclk_psys = {
         .clk    = {
                 .name   = "hclk_psys",
-                .id     = -1,
         },
         .sources        = &clkset_hclk_sys,
         .reg_src        = { .reg = S5P_CLK_SRC0, .shift = 24, .size = 1 },
@@ -149,7 +139,6 @@ static struct clksrc_clk clk_hclk_psys = {
 static struct clksrc_clk clk_pclk_psys = {
         .clk    = {
                 .name   = "pclk_psys",
-                .id     = -1,
                 .parent = &clk_hclk_psys.clk,
         },
         .reg_div        = { .reg = S5P_CLK_DIV0, .shift = 28, .size = 3 },
@@ -187,38 +176,31 @@ static int s5pv210_clk_mask1_ctrl(struct clk *clk, int enable)
 
 static struct clk clk_sclk_hdmi27m = {
         .name           = "sclk_hdmi27m",
-        .id             = -1,
         .rate           = 27000000,
 };
 
 static struct clk clk_sclk_hdmiphy = {
         .name           = "sclk_hdmiphy",
-        .id             = -1,
 };
 
 static struct clk clk_sclk_usbphy0 = {
         .name           = "sclk_usbphy0",
-        .id             = -1,
 };
 
 static struct clk clk_sclk_usbphy1 = {
         .name           = "sclk_usbphy1",
-        .id             = -1,
 };
 
 static struct clk clk_pcmcdclk0 = {
         .name           = "pcmcdclk",
-        .id             = -1,
 };
 
 static struct clk clk_pcmcdclk1 = {
         .name           = "pcmcdclk",
-        .id             = -1,
 };
 
 static struct clk clk_pcmcdclk2 = {
         .name           = "pcmcdclk",
-        .id             = -1,
 };
 
 static struct clk *clkset_vpllsrc_list[] = {
@@ -234,7 +216,6 @@ static struct clksrc_sources clkset_vpllsrc = {
 static struct clksrc_clk clk_vpllsrc = {
         .clk    = {
                 .name           = "vpll_src",
-                .id             = -1,
                 .enable         = s5pv210_clk_mask0_ctrl,
                 .ctrlbit        = (1 << 7),
         },
@@ -255,7 +236,6 @@ static struct clksrc_sources clkset_sclk_vpll = {
 static struct clksrc_clk clk_sclk_vpll = {
         .clk    = {
                 .name           = "sclk_vpll",
-                .id             = -1,
         },
         .sources        = &clkset_sclk_vpll,
         .reg_src        = { .reg = S5P_CLK_SRC0, .shift = 12, .size = 1 },
@@ -276,7 +256,6 @@ static struct clksrc_sources clkset_moutdmc0src = {
 static struct clksrc_clk clk_mout_dmc0 = {
         .clk    = {
                 .name           = "mout_dmc0",
-                .id             = -1,
         },
         .sources        = &clkset_moutdmc0src,
         .reg_src        = { .reg = S5P_CLK_SRC6, .shift = 24, .size = 2 },
@@ -285,7 +264,6 @@ static struct clksrc_clk clk_mout_dmc0 = {
 static struct clksrc_clk clk_sclk_dmc0 = {
         .clk    = {
                 .name           = "sclk_dmc0",
-                .id             = -1,
                 .parent         = &clk_mout_dmc0.clk,
         },
         .reg_div        = { .reg = S5P_CLK_DIV6, .shift = 28, .size = 4 },
@@ -312,181 +290,169 @@ static struct clk_ops clk_fout_apll_ops = {
 static struct clk init_clocks_off[] = {
         {
                 .name           = "pdma",
-                .id             = 0,
+                .devname        = "s3c-pl330.0",
                 .parent         = &clk_hclk_psys.clk,
                 .enable         = s5pv210_clk_ip0_ctrl,
                 .ctrlbit        = (1 << 3),
         }, {
                 .name           = "pdma",
-                .id             = 1,
+                .devname        = "s3c-pl330.1",
                 .parent         = &clk_hclk_psys.clk,
                 .enable         = s5pv210_clk_ip0_ctrl,
                 .ctrlbit        = (1 << 4),
         }, {
                 .name           = "rot",
-                .id             = -1,
                 .parent         = &clk_hclk_dsys.clk,
                 .enable         = s5pv210_clk_ip0_ctrl,
                 .ctrlbit        = (1<<29),
         }, {
                 .name           = "fimc",
-                .id             = 0,
+                .devname        = "s5pv210-fimc.0",
                 .parent         = &clk_hclk_dsys.clk,
                 .enable         = s5pv210_clk_ip0_ctrl,
                 .ctrlbit        = (1 << 24),
         }, {
                 .name           = "fimc",
-                .id             = 1,
+                .devname        = "s5pv210-fimc.1",
                 .parent         = &clk_hclk_dsys.clk,
                 .enable         = s5pv210_clk_ip0_ctrl,
                 .ctrlbit        = (1 << 25),
         }, {
                 .name           = "fimc",
-                .id             = 2,
+                .devname        = "s5pv210-fimc.2",
                 .parent         = &clk_hclk_dsys.clk,
                 .enable         = s5pv210_clk_ip0_ctrl,
                 .ctrlbit        = (1 << 26),
         }, {
                 .name           = "otg",
-                .id             = -1,
                 .parent         = &clk_hclk_psys.clk,
                 .enable         = s5pv210_clk_ip1_ctrl,
                 .ctrlbit        = (1<<16),
         }, {
                 .name           = "usb-host",
-                .id             = -1,
                 .parent         = &clk_hclk_psys.clk,
                 .enable         = s5pv210_clk_ip1_ctrl,
                 .ctrlbit        = (1<<17),
         }, {
                 .name           = "lcd",
-                .id             = -1,
                 .parent         = &clk_hclk_dsys.clk,
                 .enable         = s5pv210_clk_ip1_ctrl,
                 .ctrlbit        = (1<<0),
         }, {
                 .name           = "cfcon",
-                .id             = 0,
                 .parent         = &clk_hclk_psys.clk,
                 .enable         = s5pv210_clk_ip1_ctrl,
                 .ctrlbit        = (1<<25),
         }, {
                 .name           = "hsmmc",
-                .id             = 0,
+                .devname        = "s3c-sdhci.0",
                 .parent         = &clk_hclk_psys.clk,
                 .enable         = s5pv210_clk_ip2_ctrl,
                 .ctrlbit        = (1<<16),
         }, {
                 .name           = "hsmmc",
-                .id             = 1,
+                .devname        = "s3c-sdhci.1",
                 .parent         = &clk_hclk_psys.clk,
                 .enable         = s5pv210_clk_ip2_ctrl,
                 .ctrlbit        = (1<<17),
         }, {
                 .name           = "hsmmc",
-                .id             = 2,
+                .devname        = "s3c-sdhci.2",
                 .parent         = &clk_hclk_psys.clk,
                 .enable         = s5pv210_clk_ip2_ctrl,
                 .ctrlbit        = (1<<18),
         }, {
                 .name           = "hsmmc",
-                .id             = 3,
+                .devname        = "s3c-sdhci.3",
                 .parent         = &clk_hclk_psys.clk,
                 .enable         = s5pv210_clk_ip2_ctrl,
                 .ctrlbit        = (1<<19),
         }, {
                 .name           = "systimer",
-                .id             = -1,
                 .parent         = &clk_pclk_psys.clk,
                 .enable         = s5pv210_clk_ip3_ctrl,
                 .ctrlbit        = (1<<16),
         }, {
                 .name           = "watchdog",
-                .id             = -1,
                 .parent         = &clk_pclk_psys.clk,
                 .enable         = s5pv210_clk_ip3_ctrl,
                 .ctrlbit        = (1<<22),
         }, {
                 .name           = "rtc",
-                .id             = -1,
                 .parent         = &clk_pclk_psys.clk,
                 .enable         = s5pv210_clk_ip3_ctrl,
                 .ctrlbit        = (1<<15),
         }, {
                 .name           = "i2c",
-                .id             = 0,
+                .devname        = "s3c2440-i2c.0",
                 .parent         = &clk_pclk_psys.clk,
                 .enable         = s5pv210_clk_ip3_ctrl,
                 .ctrlbit        = (1<<7),
         }, {
                 .name           = "i2c",
-                .id             = 1,
+                .devname        = "s3c2440-i2c.1",
                 .parent         = &clk_pclk_psys.clk,
                 .enable         = s5pv210_clk_ip3_ctrl,
                 .ctrlbit        = (1 << 10),
         }, {
                 .name           = "i2c",
-                .id             = 2,
+                .devname        = "s3c2440-i2c.2",
                 .parent         = &clk_pclk_psys.clk,
                 .enable         = s5pv210_clk_ip3_ctrl,
                 .ctrlbit        = (1<<9),
         }, {
                 .name           = "spi",
-                .id             = 0,
+                .devname        = "s3c64xx-spi.0",
                 .parent         = &clk_pclk_psys.clk,
                 .enable         = s5pv210_clk_ip3_ctrl,
                 .ctrlbit        = (1<<12),
         }, {
                 .name           = "spi",
-                .id             = 1,
+                .devname        = "s3c64xx-spi.1",
                 .parent         = &clk_pclk_psys.clk,
                 .enable         = s5pv210_clk_ip3_ctrl,
                 .ctrlbit        = (1<<13),
         }, {
                 .name           = "spi",
-                .id             = 2,
+                .devname        = "s3c64xx-spi.2",
                 .parent         = &clk_pclk_psys.clk,
                 .enable         = s5pv210_clk_ip3_ctrl,
                 .ctrlbit        = (1<<14),
         }, {
                 .name           = "timers",
-                .id             = -1,
                 .parent         = &clk_pclk_psys.clk,
                 .enable         = s5pv210_clk_ip3_ctrl,
                 .ctrlbit        = (1<<23),
         }, {
                 .name           = "adc",
-                .id             = -1,
                 .parent         = &clk_pclk_psys.clk,
                 .enable         = s5pv210_clk_ip3_ctrl,
                 .ctrlbit        = (1<<24),
         }, {
                 .name           = "keypad",
-                .id             = -1,
                 .parent         = &clk_pclk_psys.clk,
                 .enable         = s5pv210_clk_ip3_ctrl,
                 .ctrlbit        = (1<<21),
         }, {
                 .name           = "iis",
-                .id             = 0,
+                .devname        = "samsung-i2s.0",
                 .parent         = &clk_p,
                 .enable         = s5pv210_clk_ip3_ctrl,
                 .ctrlbit        = (1<<4),
         }, {
                 .name           = "iis",
-                .id             = 1,
+                .devname        = "samsung-i2s.1",
                 .parent         = &clk_p,
                 .enable         = s5pv210_clk_ip3_ctrl,
                 .ctrlbit        = (1 << 5),
         }, {
                 .name           = "iis",
-                .id             = 2,
+                .devname        = "samsung-i2s.2",
                 .parent         = &clk_p,
                 .enable         = s5pv210_clk_ip3_ctrl,
                 .ctrlbit        = (1 << 6),
         }, {
                 .name           = "spdif",
-                .id             = -1,
                 .parent         = &clk_p,
                 .enable         = s5pv210_clk_ip3_ctrl,
                 .ctrlbit        = (1 << 0),
@@ -496,38 +462,36 @@ static struct clk init_clocks_off[] = {
 static struct clk init_clocks[] = {
         {
                 .name           = "hclk_imem",
-                .id             = -1,
                 .parent         = &clk_hclk_msys.clk,
                 .ctrlbit        = (1 << 5),
                 .enable         = s5pv210_clk_ip0_ctrl,
                 .ops            = &clk_hclk_imem_ops,
         }, {
                 .name           = "uart",
-                .id             = 0,
+                .devname        = "s5pv210-uart.0",
                 .parent         = &clk_pclk_psys.clk,
                 .enable         = s5pv210_clk_ip3_ctrl,
                 .ctrlbit        = (1 << 17),
         }, {
                 .name           = "uart",
-                .id             = 1,
+                .devname        = "s5pv210-uart.1",
                 .parent         = &clk_pclk_psys.clk,
                 .enable         = s5pv210_clk_ip3_ctrl,
                 .ctrlbit        = (1 << 18),
         }, {
                 .name           = "uart",
-                .id             = 2,
+                .devname        = "s5pv210-uart.2",
                 .parent         = &clk_pclk_psys.clk,
                 .enable         = s5pv210_clk_ip3_ctrl,
                 .ctrlbit        = (1 << 19),
         }, {
                 .name           = "uart",
-                .id             = 3,
+                .devname        = "s5pv210-uart.3",
                 .parent         = &clk_pclk_psys.clk,
                 .enable         = s5pv210_clk_ip3_ctrl,
                 .ctrlbit        = (1 << 20),
         }, {
                 .name           = "sromc",
-                .id             = -1,
                 .parent         = &clk_hclk_psys.clk,
                 .enable         = s5pv210_clk_ip1_ctrl,
                 .ctrlbit        = (1 << 26),
@@ -579,7 +543,6 @@ static struct clksrc_sources clkset_sclk_dac = {
 static struct clksrc_clk clk_sclk_dac = {
         .clk            = {
                 .name           = "sclk_dac",
-                .id             = -1,
                 .enable         = s5pv210_clk_mask0_ctrl,
                 .ctrlbit        = (1 << 2),
         },
@@ -590,7 +553,6 @@ static struct clksrc_clk clk_sclk_dac = {
 static struct clksrc_clk clk_sclk_pixel = {
         .clk            = {
                 .name           = "sclk_pixel",
-                .id             = -1,
                 .parent         = &clk_sclk_vpll.clk,
         },
         .reg_div        = { .reg = S5P_CLK_DIV1, .shift = 0, .size = 4},
@@ -609,7 +571,6 @@ static struct clksrc_sources clkset_sclk_hdmi = {
 static struct clksrc_clk clk_sclk_hdmi = {
         .clk            = {
                 .name           = "sclk_hdmi",
-                .id             = -1,
                 .enable         = s5pv210_clk_mask0_ctrl,
                 .ctrlbit        = (1 << 0),
         },
@@ -647,7 +608,7 @@ static struct clksrc_sources clkset_sclk_audio0 = {
 static struct clksrc_clk clk_sclk_audio0 = {
         .clk            = {
                 .name           = "sclk_audio",
-                .id             = 0,
+                .devname        = "soc-audio.0",
                 .enable         = s5pv210_clk_mask0_ctrl,
                 .ctrlbit        = (1 << 24),
         },
@@ -676,7 +637,7 @@ static struct clksrc_sources clkset_sclk_audio1 = {
 static struct clksrc_clk clk_sclk_audio1 = {
         .clk            = {
                 .name           = "sclk_audio",
-                .id             = 1,
+                .devname        = "soc-audio.1",
                 .enable         = s5pv210_clk_mask0_ctrl,
                 .ctrlbit        = (1 << 25),
         },
@@ -705,7 +666,7 @@ static struct clksrc_sources clkset_sclk_audio2 = {
 static struct clksrc_clk clk_sclk_audio2 = {
         .clk            = {
                 .name           = "sclk_audio",
-                .id             = 2,
+                .devname        = "soc-audio.2",
                 .enable         = s5pv210_clk_mask0_ctrl,
                 .ctrlbit        = (1 << 26),
         },
@@ -725,48 +686,12 @@ static struct clksrc_sources clkset_sclk_spdif = {
         .nr_sources     = ARRAY_SIZE(clkset_sclk_spdif_list),
 };
 
-static int s5pv210_spdif_set_rate(struct clk *clk, unsigned long rate)
-{
-        struct clk *pclk;
-        int ret;
-
-        pclk = clk_get_parent(clk);
-        if (IS_ERR(pclk))
-                return -EINVAL;
-
-        ret = pclk->ops->set_rate(pclk, rate);
-        clk_put(pclk);
-
-        return ret;
-}
-
-static unsigned long s5pv210_spdif_get_rate(struct clk *clk)
-{
-        struct clk *pclk;
-        int rate;
-
-        pclk = clk_get_parent(clk);
-        if (IS_ERR(pclk))
-                return -EINVAL;
-
-        rate = pclk->ops->get_rate(clk);
-        clk_put(pclk);
-
-        return rate;
-}
-
-static struct clk_ops s5pv210_sclk_spdif_ops = {
-        .set_rate       = s5pv210_spdif_set_rate,
-        .get_rate       = s5pv210_spdif_get_rate,
-};
-
 static struct clksrc_clk clk_sclk_spdif = {
         .clk            = {
                 .name           = "sclk_spdif",
-                .id             = -1,
                 .enable         = s5pv210_clk_mask0_ctrl,
                 .ctrlbit        = (1 << 27),
-                .ops            = &s5pv210_sclk_spdif_ops,
+                .ops            = &s5p_sclk_spdif_ops,
         },
         .sources = &clkset_sclk_spdif,
         .reg_src = { .reg = S5P_CLK_SRC6, .shift = 12, .size = 2 },
@@ -793,7 +718,6 @@ static struct clksrc_clk clksrcs[] = {
         {
                 .clk    = {
                         .name           = "sclk_dmc",
-                        .id             = -1,
                 },
                 .sources = &clkset_group1,
                 .reg_src = { .reg = S5P_CLK_SRC6, .shift = 24, .size = 2 },
@@ -801,7 +725,6 @@ static struct clksrc_clk clksrcs[] = {
         }, {
                 .clk    = {
                         .name           = "sclk_onenand",
-                        .id             = -1,
                 },
                 .sources = &clkset_sclk_onenand,
                 .reg_src = { .reg = S5P_CLK_SRC0, .shift = 28, .size = 1 },
@@ -809,7 +732,7 @@ static struct clksrc_clk clksrcs[] = {
         }, {
                 .clk    = {
                         .name           = "uclk1",
-                        .id             = 0,
+                        .devname        = "s5pv210-uart.0",
                         .enable         = s5pv210_clk_mask0_ctrl,
                         .ctrlbit        = (1 << 12),
                 },
@@ -819,7 +742,7 @@ static struct clksrc_clk clksrcs[] = {
         }, {
                 .clk            = {
                         .name           = "uclk1",
-                        .id             = 1,
+                        .devname        = "s5pv210-uart.1",
                         .enable         = s5pv210_clk_mask0_ctrl,
                         .ctrlbit        = (1 << 13),
                 },
@@ -829,7 +752,7 @@ static struct clksrc_clk clksrcs[] = {
         }, {
                 .clk            = {
                         .name           = "uclk1",
-                        .id             = 2,
+                        .devname        = "s5pv210-uart.2",
                         .enable         = s5pv210_clk_mask0_ctrl,
                         .ctrlbit        = (1 << 14),
                 },
@@ -839,7 +762,7 @@ static struct clksrc_clk clksrcs[] = {
         }, {
                 .clk            = {
                         .name           = "uclk1",
-                        .id             = 3,
+                        .devname        = "s5pv210-uart.3",
                         .enable         = s5pv210_clk_mask0_ctrl,
                         .ctrlbit        = (1 << 15),
                 },
@@ -849,7 +772,6 @@ static struct clksrc_clk clksrcs[] = {
         }, {
                 .clk    = {
                         .name           = "sclk_mixer",
-                        .id             = -1,
                         .enable         = s5pv210_clk_mask0_ctrl,
                         .ctrlbit        = (1 << 1),
                 },
@@ -858,7 +780,7 @@ static struct clksrc_clk clksrcs[] = {
         }, {
                 .clk    = {
                         .name           = "sclk_fimc",
-                        .id             = 0,
+                        .devname        = "s5pv210-fimc.0",
                         .enable         = s5pv210_clk_mask1_ctrl,
                         .ctrlbit        = (1 << 2),
                 },
@@ -868,7 +790,7 @@ static struct clksrc_clk clksrcs[] = {
         }, {
                 .clk    = {
                         .name           = "sclk_fimc",
-                        .id             = 1,
+                        .devname        = "s5pv210-fimc.1",
                         .enable         = s5pv210_clk_mask1_ctrl,
                         .ctrlbit        = (1 << 3),
                 },
@@ -878,7 +800,7 @@ static struct clksrc_clk clksrcs[] = {
         }, {
                 .clk    = {
                         .name           = "sclk_fimc",
-                        .id             = 2,
+                        .devname        = "s5pv210-fimc.2",
                         .enable         = s5pv210_clk_mask1_ctrl,
                         .ctrlbit        = (1 << 4),
                 },
@@ -888,7 +810,7 @@ static struct clksrc_clk clksrcs[] = {
         }, {
                 .clk            = {
                         .name           = "sclk_cam",
-                        .id             = 0,
+                        .devname        = "s5pv210-fimc.0",
                         .enable         = s5pv210_clk_mask0_ctrl,
                         .ctrlbit        = (1 << 3),
                 },
@@ -898,7 +820,7 @@ static struct clksrc_clk clksrcs[] = {
         }, {
                 .clk            = {
                         .name           = "sclk_cam",
-                        .id             = 1,
+                        .devname        = "s5pv210-fimc.1",
                         .enable         = s5pv210_clk_mask0_ctrl,
                         .ctrlbit        = (1 << 4),
                 },
@@ -908,7 +830,6 @@ static struct clksrc_clk clksrcs[] = {
         }, {
                 .clk            = {
                         .name           = "sclk_fimd",
-                        .id             = -1,
                         .enable         = s5pv210_clk_mask0_ctrl,
                         .ctrlbit        = (1 << 5),
                 },
@@ -918,7 +839,7 @@ static struct clksrc_clk clksrcs[] = {
         }, {
                 .clk            = {
                         .name           = "sclk_mmc",
-                        .id             = 0,
+                        .devname        = "s3c-sdhci.0",
                         .enable         = s5pv210_clk_mask0_ctrl,
                         .ctrlbit        = (1 << 8),
                 },
@@ -928,7 +849,7 @@ static struct clksrc_clk clksrcs[] = {
         }, {
                 .clk            = {
                         .name           = "sclk_mmc",
-                        .id             = 1,
+                        .devname        = "s3c-sdhci.1",
                         .enable         = s5pv210_clk_mask0_ctrl,
                         .ctrlbit        = (1 << 9),
                 },
@@ -938,7 +859,7 @@ static struct clksrc_clk clksrcs[] = {
         }, {
                 .clk            = {
                         .name           = "sclk_mmc",
-                        .id             = 2,
+                        .devname        = "s3c-sdhci.2",
                         .enable         = s5pv210_clk_mask0_ctrl,
                         .ctrlbit        = (1 << 10),
                 },
@@ -948,7 +869,7 @@ static struct clksrc_clk clksrcs[] = {
         }, {
                 .clk            = {
                         .name           = "sclk_mmc",
-                        .id             = 3,
+                        .devname        = "s3c-sdhci.3",
                         .enable         = s5pv210_clk_mask0_ctrl,
                         .ctrlbit        = (1 << 11),
                 },
@@ -958,7 +879,6 @@ static struct clksrc_clk clksrcs[] = {
         }, {
                 .clk            = {
                         .name           = "sclk_mfc",
-                        .id             = -1,
                         .enable         = s5pv210_clk_ip0_ctrl,
                         .ctrlbit        = (1 << 16),
                 },
@@ -968,7 +888,6 @@ static struct clksrc_clk clksrcs[] = {
         }, {
                 .clk            = {
                         .name           = "sclk_g2d",
-                        .id             = -1,
                         .enable         = s5pv210_clk_ip0_ctrl,
                         .ctrlbit        = (1 << 12),
                 },
@@ -978,7 +897,6 @@ static struct clksrc_clk clksrcs[] = {
         }, {
                 .clk            = {
                         .name           = "sclk_g3d",
-                        .id             = -1,
                         .enable         = s5pv210_clk_ip0_ctrl,
                         .ctrlbit        = (1 << 8),
                 },
@@ -988,7 +906,6 @@ static struct clksrc_clk clksrcs[] = {
         }, {
                 .clk            = {
                         .name           = "sclk_csis",
-                        .id             = -1,
                         .enable         = s5pv210_clk_mask0_ctrl,
                         .ctrlbit        = (1 << 6),
                 },
@@ -998,7 +915,7 @@ static struct clksrc_clk clksrcs[] = {
         }, {
                 .clk            = {
                         .name           = "sclk_spi",
-                        .id             = 0,
+                        .devname        = "s3c64xx-spi.0",
                         .enable         = s5pv210_clk_mask0_ctrl,
                         .ctrlbit        = (1 << 16),
                 },
@@ -1008,7 +925,7 @@ static struct clksrc_clk clksrcs[] = {
         }, {
                 .clk            = {
                         .name           = "sclk_spi",
-                        .id             = 1,
+                        .devname        = "s3c64xx-spi.1",
                         .enable         = s5pv210_clk_mask0_ctrl,
                         .ctrlbit        = (1 << 17),
                 },
@@ -1018,7 +935,6 @@ static struct clksrc_clk clksrcs[] = {
         }, {
                 .clk            = {
                         .name           = "sclk_pwi",
-                        .id             = -1,
                         .enable         = s5pv210_clk_mask0_ctrl,
                         .ctrlbit        = (1 << 29),
                 },
@@ -1028,7 +944,6 @@ static struct clksrc_clk clksrcs[] = {
         }, {
                 .clk            = {
                         .name           = "sclk_pwm",
-                        .id             = -1,
                         .enable         = s5pv210_clk_mask0_ctrl,
                         .ctrlbit        = (1 << 19),
                 },
diff --git a/arch/arm/mach-s5pv210/include/mach/clkdev.h b/arch/arm/mach-s5pv210/include/mach/clkdev.h
new file mode 100644
index 000000000000..7dffa83d23ff
--- /dev/null
+++ b/arch/arm/mach-s5pv210/include/mach/clkdev.h
@@ -0,0 +1,7 @@
+#ifndef __MACH_CLKDEV_H__
+#define __MACH_CLKDEV_H__
+
+#define __clk_get(clk) ({ 1; })
+#define __clk_put(clk) do {} while (0)
+
+#endif
diff --git a/arch/arm/mach-s5pv210/include/mach/regs-fb.h b/arch/arm/mach-s5pv210/include/mach/regs-fb.h
deleted file mode 100644
index 60d992989bdc..000000000000
--- a/arch/arm/mach-s5pv210/include/mach/regs-fb.h
+++ /dev/null
@@ -1,21 +0,0 @@
-/* 
- * Copyright 2010 Ben Dooks <ben-linux@fluff.org>
- *
- * Dummy framebuffer to allow build for the moment.
- * 
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#ifndef __ASM_ARCH_MACH_REGS_FB_H
-#define __ASM_ARCH_MACH_REGS_FB_H __FILE__
-
-#include <plat/regs-fb-v4.h>
-
-static inline unsigned int s3c_fb_pal_reg(unsigned int window, int reg)
-{
-        return 0x2400 + (window * 256 *4 ) + reg;
-}
-
-#endif /* __ASM_ARCH_MACH_REGS_FB_H */
diff --git a/arch/arm/mach-s5pv210/mach-aquila.c b/arch/arm/mach-s5pv210/mach-aquila.c
index 4e1d8ff5ae59..509627f25111 100644
--- a/arch/arm/mach-s5pv210/mach-aquila.c
+++ b/arch/arm/mach-s5pv210/mach-aquila.c
@@ -29,7 +29,6 @@
 
 #include <mach/map.h>
 #include <mach/regs-clock.h>
-#include <mach/regs-fb.h>
 
 #include <plat/gpio-cfg.h>
 #include <plat/regs-serial.h>
@@ -40,6 +39,7 @@
 #include <plat/fimc-core.h>
 #include <plat/sdhci.h>
 #include <plat/s5p-time.h>
+#include <plat/regs-fb-v4.h>
 
 /* Following are default values for UCON, ULCON and UFCON UART registers */
 #define AQUILA_UCON_DEFAULT     (S3C2410_UCON_TXILEVEL |        \
diff --git a/arch/arm/mach-s5pv210/mach-goni.c b/arch/arm/mach-s5pv210/mach-goni.c
index 31d5aa769753..e0c4d06b9db6 100644
--- a/arch/arm/mach-s5pv210/mach-goni.c
+++ b/arch/arm/mach-s5pv210/mach-goni.c
@@ -34,7 +34,6 @@
 
 #include <mach/map.h>
 #include <mach/regs-clock.h>
-#include <mach/regs-fb.h>
 
 #include <plat/gpio-cfg.h>
 #include <plat/regs-serial.h>
@@ -47,6 +46,7 @@
 #include <plat/sdhci.h>
 #include <plat/clock.h>
 #include <plat/s5p-time.h>
+#include <plat/regs-fb-v4.h>
 
 /* Following are default values for UCON, ULCON and UFCON UART registers */
 #define GONI_UCON_DEFAULT       (S3C2410_UCON_TXILEVEL |        \
diff --git a/arch/arm/mach-s5pv210/mach-smdkv210.c b/arch/arm/mach-s5pv210/mach-smdkv210.c
index c6a9e86c2d5c..ef20f922249d 100644
--- a/arch/arm/mach-s5pv210/mach-smdkv210.c
+++ b/arch/arm/mach-s5pv210/mach-smdkv210.c
@@ -29,7 +29,6 @@
 
 #include <mach/map.h>
 #include <mach/regs-clock.h>
-#include <mach/regs-fb.h>
 
 #include <plat/regs-serial.h>
 #include <plat/regs-srom.h>
@@ -45,6 +44,8 @@
 #include <plat/pm.h>
 #include <plat/fb.h>
 #include <plat/s5p-time.h>
+#include <plat/backlight.h>
+#include <plat/regs-fb-v4.h>
 
 /* Following are default values for UCON, ULCON and UFCON UART registers */
 #define SMDKV210_UCON_DEFAULT   (S3C2410_UCON_TXILEVEL |        \
@@ -210,45 +211,6 @@ static struct s3c_fb_platdata smdkv210_lcd0_pdata __initdata = {
         .setup_gpio     = s5pv210_fb_gpio_setup_24bpp,
 };
 
-static int smdkv210_backlight_init(struct device *dev)
-{
-        int ret;
-
-        ret = gpio_request(S5PV210_GPD0(3), "Backlight");
-        if (ret) {
-                printk(KERN_ERR "failed to request GPD for PWM-OUT 3\n");
-                return ret;
-        }
-
-        /* Configure GPIO pin with S5PV210_GPD_0_3_TOUT_3 */
-        s3c_gpio_cfgpin(S5PV210_GPD0(3), S3C_GPIO_SFN(2));
-
-        return 0;
-}
-
-static void smdkv210_backlight_exit(struct device *dev)
-{
-        s3c_gpio_cfgpin(S5PV210_GPD0(3), S3C_GPIO_OUTPUT);
-        gpio_free(S5PV210_GPD0(3));
-}
-
-static struct platform_pwm_backlight_data smdkv210_backlight_data = {
-        .pwm_id         = 3,
-        .max_brightness = 255,
-        .dft_brightness = 255,
-        .pwm_period_ns  = 78770,
-        .init           = smdkv210_backlight_init,
-        .exit           = smdkv210_backlight_exit,
-};
-
-static struct platform_device smdkv210_backlight_device = {
-        .name           = "pwm-backlight",
-        .dev            = {
-                .parent         = &s3c_device_timer[3].dev,
-                .platform_data  = &smdkv210_backlight_data,
-        },
-};
-
 static struct platform_device *smdkv210_devices[] __initdata = {
         &s3c_device_adc,
         &s3c_device_cfcon,
@@ -270,8 +232,6 @@ static struct platform_device *smdkv210_devices[] __initdata = {
         &samsung_device_keypad,
         &smdkv210_dm9000,
         &smdkv210_lcd_lte480wv,
-        &s3c_device_timer[3],
-        &smdkv210_backlight_device,
 };
 
 static void __init smdkv210_dm9000_init(void)
@@ -310,6 +270,16 @@ static struct s3c2410_ts_mach_info s3c_ts_platform __initdata = {
         .oversampling_shift     = 2,
 };
 
+/* LCD Backlight data */
+static struct samsung_bl_gpio_info smdkv210_bl_gpio_info = {
+        .no = S5PV210_GPD0(3),
+        .func = S3C_GPIO_SFN(2),
+};
+
+static struct platform_pwm_backlight_data smdkv210_bl_data = {
+        .pwm_id = 3,
+};
+
 static void __init smdkv210_map_io(void)
 {
         s5p_init_io(NULL, 0, S5P_VA_CHIPID);
@@ -341,6 +311,8 @@ static void __init smdkv210_machine_init(void)
 
         s3c_fb_set_platdata(&smdkv210_lcd0_pdata);
 
+        samsung_bl_set(&smdkv210_bl_gpio_info, &smdkv210_bl_data);
+
         platform_add_devices(smdkv210_devices, ARRAY_SIZE(smdkv210_devices));
 }
 
diff --git a/arch/arm/mach-s5pv210/setup-fb-24bpp.c b/arch/arm/mach-s5pv210/setup-fb-24bpp.c
index e932ebfac56d..55103c8220b3 100644
--- a/arch/arm/mach-s5pv210/setup-fb-24bpp.c
+++ b/arch/arm/mach-s5pv210/setup-fb-24bpp.c
@@ -15,7 +15,6 @@
 #include <linux/fb.h>
 #include <linux/gpio.h>
 
-#include <mach/regs-fb.h>
 #include <mach/map.h>
 #include <plat/fb.h>
 #include <mach/regs-clock.h>
diff --git a/arch/arm/plat-mxc/avic.c b/arch/arm/plat-mxc/avic.c
index 09e2bd0fcdca..55d2534ec727 100644
--- a/arch/arm/plat-mxc/avic.c
+++ b/arch/arm/plat-mxc/avic.c
@@ -46,6 +46,8 @@
 #define AVIC_FIPNDH             0x60    /* fast int pending high */
 #define AVIC_FIPNDL             0x64    /* fast int pending low */
 
+#define AVIC_NUM_IRQS 64
+
 void __iomem *avic_base;
 
 #ifdef CONFIG_MXC_IRQ_PRIOR
@@ -54,7 +56,7 @@ static int avic_irq_set_priority(unsigned char irq, unsigned char prio)
         unsigned int temp;
         unsigned int mask = 0x0F << irq % 8 * 4;
 
-        if (irq >= MXC_INTERNAL_IRQS)
+        if (irq >= AVIC_NUM_IRQS)
                 return -EINVAL;;
 
         temp = __raw_readl(avic_base + AVIC_NIPRIORITY(irq / 8));
@@ -72,14 +74,14 @@ static int avic_set_irq_fiq(unsigned int irq, unsigned int type)
 {
         unsigned int irqt;
 
-        if (irq >= MXC_INTERNAL_IRQS)
+        if (irq >= AVIC_NUM_IRQS)
                 return -EINVAL;
 
-        if (irq < MXC_INTERNAL_IRQS / 2) {
+        if (irq < AVIC_NUM_IRQS / 2) {
                 irqt = __raw_readl(avic_base + AVIC_INTTYPEL) & ~(1 << irq);
                 __raw_writel(irqt | (!!type << irq), avic_base + AVIC_INTTYPEL);
         } else {
-                irq -= MXC_INTERNAL_IRQS / 2;
+                irq -= AVIC_NUM_IRQS / 2;
                 irqt = __raw_readl(avic_base + AVIC_INTTYPEH) & ~(1 << irq);
                 __raw_writel(irqt | (!!type << irq), avic_base + AVIC_INTTYPEH);
         }
@@ -138,7 +140,7 @@ void __init mxc_init_irq(void __iomem *irqbase)
         /* all IRQ no FIQ */
         __raw_writel(0, avic_base + AVIC_INTTYPEH);
         __raw_writel(0, avic_base + AVIC_INTTYPEL);
-        for (i = 0; i < MXC_INTERNAL_IRQS; i++) {
+        for (i = 0; i < AVIC_NUM_IRQS; i++) {
                 irq_set_chip_and_handler(i, &mxc_avic_chip.base,
                                          handle_level_irq);
                 set_irq_flags(i, IRQF_VALID);
diff --git a/arch/arm/plat-mxc/include/mach/debug-macro.S b/arch/arm/plat-mxc/include/mach/debug-macro.S
index 8e8d175e5077..91fc7cdb5dc9 100644
--- a/arch/arm/plat-mxc/include/mach/debug-macro.S
+++ b/arch/arm/plat-mxc/include/mach/debug-macro.S
@@ -12,32 +12,32 @@
  */
 #include <mach/hardware.h>
 
-#ifdef CONFIG_ARCH_MX1
+#ifdef CONFIG_SOC_IMX1
 #define UART_PADDR      MX1_UART1_BASE_ADDR
 #endif
 
-#ifdef CONFIG_ARCH_MX25
+#ifdef CONFIG_SOC_IMX25
 #ifdef UART_PADDR
 #error "CONFIG_DEBUG_LL is incompatible with multiple archs"
 #endif
 #define UART_PADDR      MX25_UART1_BASE_ADDR
 #endif
 
-#ifdef CONFIG_ARCH_MX2
+#if defined(CONFIG_SOC_IMX21) || defined (CONFIG_SOC_IMX27)
 #ifdef UART_PADDR
 #error "CONFIG_DEBUG_LL is incompatible with multiple archs"
 #endif
 #define UART_PADDR      MX2x_UART1_BASE_ADDR
 #endif
 
-#ifdef CONFIG_ARCH_MX3
+#if defined(CONFIG_SOC_IMX31) || defined(CONFIG_SOC_IMX35)
 #ifdef UART_PADDR
 #error "CONFIG_DEBUG_LL is incompatible with multiple archs"
 #endif
 #define UART_PADDR      MX3x_UART1_BASE_ADDR
 #endif
 
-#ifdef CONFIG_ARCH_MX5
+#ifdef CONFIG_SOC_IMX51
 #ifdef UART_PADDR
 #error "CONFIG_DEBUG_LL is incompatible with multiple archs"
 #endif
diff --git a/arch/arm/plat-mxc/include/mach/hardware.h b/arch/arm/plat-mxc/include/mach/hardware.h
index 67d3e2bed065..a8bfd565dcad 100644
--- a/arch/arm/plat-mxc/include/mach/hardware.h
+++ b/arch/arm/plat-mxc/include/mach/hardware.h
@@ -97,35 +97,17 @@
 
 #include <mach/mxc.h>
 
-#ifdef CONFIG_ARCH_MX5
 #include <mach/mx50.h>
 #include <mach/mx51.h>
 #include <mach/mx53.h>
-#endif
-
-#ifdef CONFIG_ARCH_MX3
 #include <mach/mx3x.h>
 #include <mach/mx31.h>
 #include <mach/mx35.h>
-#endif
-
-#ifdef CONFIG_ARCH_MX2
-# include <mach/mx2x.h>
-# ifdef CONFIG_MACH_MX21
-#  include <mach/mx21.h>
-# endif
-# ifdef CONFIG_MACH_MX27
-#  include <mach/mx27.h>
-# endif
-#endif
-
-#ifdef CONFIG_ARCH_MX1
-# include <mach/mx1.h>
-#endif
-
-#ifdef CONFIG_ARCH_MX25
-# include <mach/mx25.h>
-#endif
+#include <mach/mx2x.h>
+#include <mach/mx21.h>
+#include <mach/mx27.h>
+#include <mach/mx1.h>
+#include <mach/mx25.h>
 
 #define imx_map_entry(soc, name, _type) {                               \
         .virtual = soc ## _IO_P2V(soc ## _ ## name ## _BASE_ADDR),      \
diff --git a/arch/arm/plat-mxc/include/mach/iomux-v1.h b/arch/arm/plat-mxc/include/mach/iomux-v1.h
index 253d64d686f8..6fa8a707b9a0 100644
--- a/arch/arm/plat-mxc/include/mach/iomux-v1.h
+++ b/arch/arm/plat-mxc/include/mach/iomux-v1.h
@@ -85,9 +85,6 @@
 #define GPIO_BOUT_0     (2 << GPIO_BOUT_SHIFT)
 #define GPIO_BOUT_1     (3 << GPIO_BOUT_SHIFT)
 
-/* decode irq number to use with IMR(x), ISR(x) and friends */
-#define IRQ_TO_REG(irq) ((irq - MXC_INTERNAL_IRQS) >> 5)
-
 #define IRQ_GPIOA(x)  (MXC_GPIO_IRQ_START + x)
 #define IRQ_GPIOB(x)  (IRQ_GPIOA(32) + x)
 #define IRQ_GPIOC(x)  (IRQ_GPIOB(32) + x)
diff --git a/arch/arm/plat-mxc/include/mach/iomux.h b/arch/arm/plat-mxc/include/mach/iomux.h
deleted file mode 100644
index 3d226d7e7be2..000000000000
--- a/arch/arm/plat-mxc/include/mach/iomux.h
+++ /dev/null
@@ -1,26 +0,0 @@
-/*
- * Copyright (C) 2010 Uwe Kleine-Koenig, Pengutronix
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by
- * the Free Software Foundation.
- */
-#ifndef __MACH_IOMUX_H__
-#define __MACH_IOMUX_H__
-
-/* This file will go away, please include mach/iomux-mx... directly */
-
-#ifdef CONFIG_ARCH_MX1
-#include <mach/iomux-mx1.h>
-#endif
-#ifdef CONFIG_ARCH_MX2
-#include <mach/iomux-mx2x.h>
-#ifdef CONFIG_MACH_MX21
-#include <mach/iomux-mx21.h>
-#endif
-#ifdef CONFIG_MACH_MX27
-#include <mach/iomux-mx27.h>
-#endif
-#endif
-
-#endif /* __MACH_IOMUX_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/mxc.h b/arch/arm/plat-mxc/include/mach/mxc.h
index 4ac53ce97c24..09879235a9f5 100644
--- a/arch/arm/plat-mxc/include/mach/mxc.h
+++ b/arch/arm/plat-mxc/include/mach/mxc.h
@@ -68,7 +68,7 @@
 extern unsigned int __mxc_cpu_type;
 #endif
 
-#ifdef CONFIG_ARCH_MX1
+#ifdef CONFIG_SOC_IMX1
 # ifdef mxc_cpu_type
 #  undef mxc_cpu_type
 #  define mxc_cpu_type __mxc_cpu_type
@@ -80,7 +80,7 @@ extern unsigned int __mxc_cpu_type;
 # define cpu_is_mx1()           (0)
 #endif
 
-#ifdef CONFIG_MACH_MX21
+#ifdef CONFIG_SOC_IMX21
 # ifdef mxc_cpu_type
 #  undef mxc_cpu_type
 #  define mxc_cpu_type __mxc_cpu_type
@@ -92,7 +92,7 @@ extern unsigned int __mxc_cpu_type;
 # define cpu_is_mx21()          (0)
 #endif
 
-#ifdef CONFIG_ARCH_MX25
+#ifdef CONFIG_SOC_IMX25
 # ifdef mxc_cpu_type
 #  undef mxc_cpu_type
 #  define mxc_cpu_type __mxc_cpu_type
@@ -104,7 +104,7 @@ extern unsigned int __mxc_cpu_type;
 # define cpu_is_mx25()          (0)
 #endif
 
-#ifdef CONFIG_MACH_MX27
+#ifdef CONFIG_SOC_IMX27
 # ifdef mxc_cpu_type
 #  undef mxc_cpu_type
 #  define mxc_cpu_type __mxc_cpu_type
diff --git a/arch/arm/plat-mxc/include/mach/timex.h b/arch/arm/plat-mxc/include/mach/timex.h
index d61d5c74817c..10343d1f87e1 100644
--- a/arch/arm/plat-mxc/include/mach/timex.h
+++ b/arch/arm/plat-mxc/include/mach/timex.h
@@ -16,16 +16,7 @@
 #ifndef __ASM_ARCH_MXC_TIMEX_H__
 #define __ASM_ARCH_MXC_TIMEX_H__
 
-#if defined CONFIG_ARCH_MX1
-#define CLOCK_TICK_RATE         16000000
-#elif defined CONFIG_ARCH_MX2
-#define CLOCK_TICK_RATE         13300000
-#elif defined CONFIG_ARCH_MX3
-#define CLOCK_TICK_RATE         16625000
-#elif defined CONFIG_ARCH_MX25
-#define CLOCK_TICK_RATE         16000000
-#elif defined CONFIG_ARCH_MX5
-#define CLOCK_TICK_RATE         8000000
-#endif
+/* Bogus value */
+#define CLOCK_TICK_RATE 12345678
 
 #endif                          /* __ASM_ARCH_MXC_TIMEX_H__ */
diff --git a/arch/arm/plat-mxc/pwm.c b/arch/arm/plat-mxc/pwm.c
index 7a61ef8f471a..761c3c940a68 100644
--- a/arch/arm/plat-mxc/pwm.c
+++ b/arch/arm/plat-mxc/pwm.c
@@ -214,14 +214,14 @@ static int __devinit mxc_pwm_probe(struct platform_device *pdev)
                 goto err_free_clk;
         }
 
-        r = request_mem_region(r->start, r->end - r->start + 1, pdev->name);
+        r = request_mem_region(r->start, resource_size(r), pdev->name);
         if (r == NULL) {
                 dev_err(&pdev->dev, "failed to request memory resource\n");
                 ret = -EBUSY;
                 goto err_free_clk;
         }
 
-        pwm->mmio_base = ioremap(r->start, r->end - r->start + 1);
+        pwm->mmio_base = ioremap(r->start, resource_size(r));
         if (pwm->mmio_base == NULL) {
                 dev_err(&pdev->dev, "failed to ioremap() registers\n");
                 ret = -ENODEV;
@@ -236,7 +236,7 @@ static int __devinit mxc_pwm_probe(struct platform_device *pdev)
         return 0;
 
 err_free_mem:
-        release_mem_region(r->start, r->end - r->start + 1);
+        release_mem_region(r->start, resource_size(r));
 err_free_clk:
         clk_put(pwm->clk);
 err_free:
@@ -260,7 +260,7 @@ static int __devexit mxc_pwm_remove(struct platform_device *pdev)
         iounmap(pwm->mmio_base);
 
         r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-        release_mem_region(r->start, r->end - r->start + 1);
+        release_mem_region(r->start, resource_size(r));
 
         clk_put(pwm->clk);
 
diff --git a/arch/arm/plat-mxc/tzic.c b/arch/arm/plat-mxc/tzic.c
index 57f9395f87ce..710f2e7da4ce 100644
--- a/arch/arm/plat-mxc/tzic.c
+++ b/arch/arm/plat-mxc/tzic.c
@@ -49,6 +49,8 @@
 
 void __iomem *tzic_base; /* Used as irq controller base in entry-macro.S */
 
+#define TZIC_NUM_IRQS 128
+
 #ifdef CONFIG_FIQ
 static int tzic_set_irq_fiq(unsigned int irq, unsigned int type)
 {
@@ -166,7 +168,7 @@ void __init tzic_init_irq(void __iomem *irqbase)
 
         /* all IRQ no FIQ Warning :: No selection */
 
-        for (i = 0; i < MXC_INTERNAL_IRQS; i++) {
+        for (i = 0; i < TZIC_NUM_IRQS; i++) {
                 irq_set_chip_and_handler(i, &mxc_tzic_chip.base,
                                          handle_level_irq);
                 set_irq_flags(i, IRQF_VALID);
diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig
index 49a4c75243fc..6e6735f04ee3 100644
--- a/arch/arm/plat-omap/Kconfig
+++ b/arch/arm/plat-omap/Kconfig
@@ -211,9 +211,6 @@ choice
         depends on ARCH_OMAP
         default OMAP_PM_NOOP
 
-config OMAP_PM_NONE
-        bool "No PM layer"
-
 config OMAP_PM_NOOP
         bool "No-op/debug PM layer"
 
diff --git a/arch/arm/plat-omap/counter_32k.c b/arch/arm/plat-omap/counter_32k.c
index f7fed6080190..a6cbb712da51 100644
--- a/arch/arm/plat-omap/counter_32k.c
+++ b/arch/arm/plat-omap/counter_32k.c
@@ -18,6 +18,7 @@
 #include <linux/err.h>
 #include <linux/io.h>
 #include <linux/sched.h>
+#include <linux/clocksource.h>
 
 #include <asm/sched_clock.h>
 
@@ -26,87 +27,16 @@
 
 #include <plat/clock.h>
 
-
 /*
  * 32KHz clocksource ... always available, on pretty most chips except
  * OMAP 730 and 1510.  Other timers could be used as clocksources, with
  * higher resolution in free-running counter modes (e.g. 12 MHz xtal),
  * but systems won't necessarily want to spend resources that way.
  */
+static void __iomem *timer_32k_base;
 
 #define OMAP16XX_TIMER_32K_SYNCHRONIZED         0xfffbc410
 
-#include <linux/clocksource.h>
-
-/*
- * offset_32k holds the init time counter value. It is then subtracted
- * from every counter read to achieve a counter that counts time from the
- * kernel boot (needed for sched_clock()).
- */
-static u32 offset_32k __read_mostly;
-
-#ifdef CONFIG_ARCH_OMAP16XX
-static cycle_t notrace omap16xx_32k_read(struct clocksource *cs)
-{
-        return omap_readl(OMAP16XX_TIMER_32K_SYNCHRONIZED) - offset_32k;
-}
-#else
-#define omap16xx_32k_read       NULL
-#endif
-
-#ifdef CONFIG_SOC_OMAP2420
-static cycle_t notrace omap2420_32k_read(struct clocksource *cs)
-{
-        return omap_readl(OMAP2420_32KSYNCT_BASE + 0x10) - offset_32k;
-}
-#else
-#define omap2420_32k_read       NULL
-#endif
-
-#ifdef CONFIG_SOC_OMAP2430
-static cycle_t notrace omap2430_32k_read(struct clocksource *cs)
-{
-        return omap_readl(OMAP2430_32KSYNCT_BASE + 0x10) - offset_32k;
-}
-#else
-#define omap2430_32k_read       NULL
-#endif
-
-#ifdef CONFIG_ARCH_OMAP3
-static cycle_t notrace omap34xx_32k_read(struct clocksource *cs)
-{
-        return omap_readl(OMAP3430_32KSYNCT_BASE + 0x10) - offset_32k;
-}
-#else
-#define omap34xx_32k_read       NULL
-#endif
-
-#ifdef CONFIG_ARCH_OMAP4
-static cycle_t notrace omap44xx_32k_read(struct clocksource *cs)
-{
-        return omap_readl(OMAP4430_32KSYNCT_BASE + 0x10) - offset_32k;
-}
-#else
-#define omap44xx_32k_read       NULL
-#endif
-
-/*
- * Kernel assumes that sched_clock can be called early but may not have
- * things ready yet.
- */
-static cycle_t notrace omap_32k_read_dummy(struct clocksource *cs)
-{
-        return 0;
-}
-
-static struct clocksource clocksource_32k = {
-        .name           = "32k_counter",
-        .rating         = 250,
-        .read           = omap_32k_read_dummy,
-        .mask           = CLOCKSOURCE_MASK(32),
-        .flags          = CLOCK_SOURCE_IS_CONTINUOUS,
-};
-
 /*
  * Returns current time from boot in nsecs. It's OK for this to wrap
  * around for now, as it's just a relative time stamp.
@@ -122,11 +52,11 @@ static DEFINE_CLOCK_DATA(cd);
 
 static inline unsigned long long notrace _omap_32k_sched_clock(void)
 {
-        u32 cyc = clocksource_32k.read(&clocksource_32k);
+        u32 cyc = timer_32k_base ? __raw_readl(timer_32k_base) : 0;
         return cyc_to_fixed_sched_clock(&cd, cyc, (u32)~0, SC_MULT, SC_SHIFT);
 }
 
-#ifndef CONFIG_OMAP_MPU_TIMER
+#if defined(CONFIG_OMAP_32K_TIMER) && !defined(CONFIG_OMAP_MPU_TIMER)
 unsigned long long notrace sched_clock(void)
 {
         return _omap_32k_sched_clock();
@@ -140,7 +70,7 @@ unsigned long long notrace omap_32k_sched_clock(void)
 
 static void notrace omap_update_sched_clock(void)
 {
-        u32 cyc = clocksource_32k.read(&clocksource_32k);
+        u32 cyc = timer_32k_base ? __raw_readl(timer_32k_base) : 0;
         update_sched_clock(&cd, cyc, (u32)~0);
 }
 
@@ -153,6 +83,7 @@ static void notrace omap_update_sched_clock(void)
  */
 static struct timespec persistent_ts;
 static cycles_t cycles, last_cycles;
+static unsigned int persistent_mult, persistent_shift;
 void read_persistent_clock(struct timespec *ts)
 {
         unsigned long long nsecs;
@@ -160,11 +91,10 @@ void read_persistent_clock(struct timespec *ts)
         struct timespec *tsp = &persistent_ts;
 
         last_cycles = cycles;
-        cycles = clocksource_32k.read(&clocksource_32k);
+        cycles = timer_32k_base ? __raw_readl(timer_32k_base) : 0;
         delta = cycles - last_cycles;
 
-        nsecs = clocksource_cyc2ns(delta,
-                                   clocksource_32k.mult, clocksource_32k.shift);
+        nsecs = clocksource_cyc2ns(delta, persistent_mult, persistent_shift);
 
         timespec_add_ns(tsp, nsecs);
         *ts = *tsp;
@@ -176,29 +106,46 @@ int __init omap_init_clocksource_32k(void)
                         "%s: can't register clocksource!\n";
 
         if (cpu_is_omap16xx() || cpu_class_is_omap2()) {
+                u32 pbase;
+                unsigned long size = SZ_4K;
+                void __iomem *base;
                 struct clk *sync_32k_ick;
 
-                if (cpu_is_omap16xx())
-                        clocksource_32k.read = omap16xx_32k_read;
-                else if (cpu_is_omap2420())
-                        clocksource_32k.read = omap2420_32k_read;
+                if (cpu_is_omap16xx()) {
+                        pbase = OMAP16XX_TIMER_32K_SYNCHRONIZED;
+                        size = SZ_1K;
+                } else if (cpu_is_omap2420())
+                        pbase = OMAP2420_32KSYNCT_BASE + 0x10;
                 else if (cpu_is_omap2430())
-                        clocksource_32k.read = omap2430_32k_read;
+                        pbase = OMAP2430_32KSYNCT_BASE + 0x10;
                 else if (cpu_is_omap34xx())
-                        clocksource_32k.read = omap34xx_32k_read;
+                        pbase = OMAP3430_32KSYNCT_BASE + 0x10;
                 else if (cpu_is_omap44xx())
-                        clocksource_32k.read = omap44xx_32k_read;
+                        pbase = OMAP4430_32KSYNCT_BASE + 0x10;
                 else
                         return -ENODEV;
 
+                /* For this to work we must have a static mapping in io.c for this area */
+                base = ioremap(pbase, size);
+                if (!base)
+                        return -ENODEV;
+
                 sync_32k_ick = clk_get(NULL, "omap_32ksync_ick");
                 if (!IS_ERR(sync_32k_ick))
                         clk_enable(sync_32k_ick);
 
-                offset_32k = clocksource_32k.read(&clocksource_32k);
+                timer_32k_base = base;
+
+                /*
+                 * 120000 rough estimate from the calculations in
+                 * __clocksource_updatefreq_scale.
+                 */
+                clocks_calc_mult_shift(&persistent_mult, &persistent_shift,
+                                32768, NSEC_PER_SEC, 120000);
 
-                if (clocksource_register_hz(&clocksource_32k, 32768))
-                        printk(err, clocksource_32k.name);
+                if (clocksource_mmio_init(base, "32k_counter", 32768, 250, 32,
+                                          clocksource_mmio_readl_up))
+                        printk(err, "32k_counter");
 
                 init_fixed_sched_clock(&cd, omap_update_sched_clock, 32,
                                        32768, SC_MULT, SC_SHIFT);
diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c
index ee9f6ebba29b..8dfb8186b2c2 100644
--- a/arch/arm/plat-omap/dmtimer.c
+++ b/arch/arm/plat-omap/dmtimer.c
@@ -41,127 +41,6 @@
 #include <plat/dmtimer.h>
 #include <mach/irqs.h>
 
-/* register offsets */
-#define _OMAP_TIMER_ID_OFFSET           0x00
-#define _OMAP_TIMER_OCP_CFG_OFFSET      0x10
-#define _OMAP_TIMER_SYS_STAT_OFFSET     0x14
-#define _OMAP_TIMER_STAT_OFFSET         0x18
-#define _OMAP_TIMER_INT_EN_OFFSET       0x1c
-#define _OMAP_TIMER_WAKEUP_EN_OFFSET    0x20
-#define _OMAP_TIMER_CTRL_OFFSET         0x24
-#define         OMAP_TIMER_CTRL_GPOCFG          (1 << 14)
-#define         OMAP_TIMER_CTRL_CAPTMODE        (1 << 13)
-#define         OMAP_TIMER_CTRL_PT              (1 << 12)
-#define         OMAP_TIMER_CTRL_TCM_LOWTOHIGH   (0x1 << 8)
-#define         OMAP_TIMER_CTRL_TCM_HIGHTOLOW   (0x2 << 8)
-#define         OMAP_TIMER_CTRL_TCM_BOTHEDGES   (0x3 << 8)
-#define         OMAP_TIMER_CTRL_SCPWM           (1 << 7)
-#define         OMAP_TIMER_CTRL_CE              (1 << 6) /* compare enable */
-#define         OMAP_TIMER_CTRL_PRE             (1 << 5) /* prescaler enable */
-#define         OMAP_TIMER_CTRL_PTV_SHIFT       2 /* prescaler value shift */
-#define         OMAP_TIMER_CTRL_POSTED          (1 << 2)
-#define         OMAP_TIMER_CTRL_AR              (1 << 1) /* auto-reload enable */
-#define         OMAP_TIMER_CTRL_ST              (1 << 0) /* start timer */
-#define _OMAP_TIMER_COUNTER_OFFSET      0x28
-#define _OMAP_TIMER_LOAD_OFFSET         0x2c
-#define _OMAP_TIMER_TRIGGER_OFFSET      0x30
-#define _OMAP_TIMER_WRITE_PEND_OFFSET   0x34
-#define         WP_NONE                 0       /* no write pending bit */
-#define         WP_TCLR                 (1 << 0)
-#define         WP_TCRR                 (1 << 1)
-#define         WP_TLDR                 (1 << 2)
-#define         WP_TTGR                 (1 << 3)
-#define         WP_TMAR                 (1 << 4)
-#define         WP_TPIR                 (1 << 5)
-#define         WP_TNIR                 (1 << 6)
-#define         WP_TCVR                 (1 << 7)
-#define         WP_TOCR                 (1 << 8)
-#define         WP_TOWR                 (1 << 9)
-#define _OMAP_TIMER_MATCH_OFFSET        0x38
-#define _OMAP_TIMER_CAPTURE_OFFSET      0x3c
-#define _OMAP_TIMER_IF_CTRL_OFFSET      0x40
-#define _OMAP_TIMER_CAPTURE2_OFFSET             0x44    /* TCAR2, 34xx only */
-#define _OMAP_TIMER_TICK_POS_OFFSET             0x48    /* TPIR, 34xx only */
-#define _OMAP_TIMER_TICK_NEG_OFFSET             0x4c    /* TNIR, 34xx only */
-#define _OMAP_TIMER_TICK_COUNT_OFFSET           0x50    /* TCVR, 34xx only */
-#define _OMAP_TIMER_TICK_INT_MASK_SET_OFFSET    0x54    /* TOCR, 34xx only */
-#define _OMAP_TIMER_TICK_INT_MASK_COUNT_OFFSET  0x58    /* TOWR, 34xx only */
-
-/* register offsets with the write pending bit encoded */
-#define WPSHIFT                                 16
-
-#define OMAP_TIMER_ID_REG                       (_OMAP_TIMER_ID_OFFSET \
-                                                        | (WP_NONE << WPSHIFT))
-
-#define OMAP_TIMER_OCP_CFG_REG                  (_OMAP_TIMER_OCP_CFG_OFFSET \
-                                                        | (WP_NONE << WPSHIFT))
-
-#define OMAP_TIMER_SYS_STAT_REG                 (_OMAP_TIMER_SYS_STAT_OFFSET \
-                                                        | (WP_NONE << WPSHIFT))
-
-#define OMAP_TIMER_STAT_REG                     (_OMAP_TIMER_STAT_OFFSET \
-                                                        | (WP_NONE << WPSHIFT))
-
-#define OMAP_TIMER_INT_EN_REG                   (_OMAP_TIMER_INT_EN_OFFSET \
-                                                        | (WP_NONE << WPSHIFT))
-
-#define OMAP_TIMER_WAKEUP_EN_REG                (_OMAP_TIMER_WAKEUP_EN_OFFSET \
-                                                        | (WP_NONE << WPSHIFT))
-
-#define OMAP_TIMER_CTRL_REG                     (_OMAP_TIMER_CTRL_OFFSET \
-                                                        | (WP_TCLR << WPSHIFT))
-
-#define OMAP_TIMER_COUNTER_REG                  (_OMAP_TIMER_COUNTER_OFFSET \
-                                                        | (WP_TCRR << WPSHIFT))
-
-#define OMAP_TIMER_LOAD_REG                     (_OMAP_TIMER_LOAD_OFFSET \
-                                                        | (WP_TLDR << WPSHIFT))
-
-#define OMAP_TIMER_TRIGGER_REG                  (_OMAP_TIMER_TRIGGER_OFFSET \
-                                                        | (WP_TTGR << WPSHIFT))
-
-#define OMAP_TIMER_WRITE_PEND_REG               (_OMAP_TIMER_WRITE_PEND_OFFSET \
-                                                        | (WP_NONE << WPSHIFT))
-
-#define OMAP_TIMER_MATCH_REG                    (_OMAP_TIMER_MATCH_OFFSET \
-                                                        | (WP_TMAR << WPSHIFT))
-
-#define OMAP_TIMER_CAPTURE_REG                  (_OMAP_TIMER_CAPTURE_OFFSET \
-                                                        | (WP_NONE << WPSHIFT))
-
-#define OMAP_TIMER_IF_CTRL_REG                  (_OMAP_TIMER_IF_CTRL_OFFSET \
-                                                        | (WP_NONE << WPSHIFT))
-
-#define OMAP_TIMER_CAPTURE2_REG                 (_OMAP_TIMER_CAPTURE2_OFFSET \
-                                                        | (WP_NONE << WPSHIFT))
-
-#define OMAP_TIMER_TICK_POS_REG                 (_OMAP_TIMER_TICK_POS_OFFSET \
-                                                        | (WP_TPIR << WPSHIFT))
-
-#define OMAP_TIMER_TICK_NEG_REG                 (_OMAP_TIMER_TICK_NEG_OFFSET \
-                                                        | (WP_TNIR << WPSHIFT))
-
-#define OMAP_TIMER_TICK_COUNT_REG               (_OMAP_TIMER_TICK_COUNT_OFFSET \
-                                                        | (WP_TCVR << WPSHIFT))
-
-#define OMAP_TIMER_TICK_INT_MASK_SET_REG                                \
-                (_OMAP_TIMER_TICK_INT_MASK_SET_OFFSET | (WP_TOCR << WPSHIFT))
-
-#define OMAP_TIMER_TICK_INT_MASK_COUNT_REG                              \
-                (_OMAP_TIMER_TICK_INT_MASK_COUNT_OFFSET | (WP_TOWR << WPSHIFT))
-
-struct omap_dm_timer {
-        unsigned long phys_base;
-        int irq;
-#ifdef CONFIG_ARCH_OMAP2PLUS
-        struct clk *iclk, *fclk;
-#endif
-        void __iomem *io_base;
-        unsigned reserved:1;
-        unsigned enabled:1;
-        unsigned posted:1;
-};
-
 static int dm_timer_count;
 
 #ifdef CONFIG_ARCH_OMAP1
@@ -291,11 +170,7 @@ static spinlock_t dm_timer_lock;
  */
 static inline u32 omap_dm_timer_read_reg(struct omap_dm_timer *timer, u32 reg)
 {
-        if (timer->posted)
-                while (readl(timer->io_base + (OMAP_TIMER_WRITE_PEND_REG & 0xff))
-                                & (reg >> WPSHIFT))
-                        cpu_relax();
-        return readl(timer->io_base + (reg & 0xff));
+        return __omap_dm_timer_read(timer->io_base, reg, timer->posted);
 }
 
 /*
@@ -307,11 +182,7 @@ static inline u32 omap_dm_timer_read_reg(struct omap_dm_timer *timer, u32 reg)
 static void omap_dm_timer_write_reg(struct omap_dm_timer *timer, u32 reg,
                                                 u32 value)
 {
-        if (timer->posted)
-                while (readl(timer->io_base + (OMAP_TIMER_WRITE_PEND_REG & 0xff))
-                                & (reg >> WPSHIFT))
-                        cpu_relax();
-        writel(value, timer->io_base + (reg & 0xff));
+        __omap_dm_timer_write(timer->io_base, reg, value, timer->posted);
 }
 
 static void omap_dm_timer_wait_for_reset(struct omap_dm_timer *timer)
@@ -330,7 +201,7 @@ static void omap_dm_timer_wait_for_reset(struct omap_dm_timer *timer)
 
 static void omap_dm_timer_reset(struct omap_dm_timer *timer)
 {
-        u32 l;
+        int autoidle = 0, wakeup = 0;
 
         if (!cpu_class_is_omap2() || timer != &dm_timers[0]) {
                 omap_dm_timer_write_reg(timer, OMAP_TIMER_IF_CTRL_REG, 0x06);
@@ -338,28 +209,21 @@ static void omap_dm_timer_reset(struct omap_dm_timer *timer)
         }
         omap_dm_timer_set_source(timer, OMAP_TIMER_SRC_32_KHZ);
 
-        l = omap_dm_timer_read_reg(timer, OMAP_TIMER_OCP_CFG_REG);
-        l |= 0x02 << 3;  /* Set to smart-idle mode */
-        l |= 0x2 << 8;   /* Set clock activity to perserve f-clock on idle */
-
         /* Enable autoidle on OMAP2 / OMAP3 */
         if (cpu_is_omap24xx() || cpu_is_omap34xx())
-                l |= 0x1 << 0;
+                autoidle = 1;
 
         /*
          * Enable wake-up on OMAP2 CPUs.
          */
         if (cpu_class_is_omap2())
-                l |= 1 << 2;
-        omap_dm_timer_write_reg(timer, OMAP_TIMER_OCP_CFG_REG, l);
+                wakeup = 1;
 
-        /* Match hardware reset default of posted mode */
-        omap_dm_timer_write_reg(timer, OMAP_TIMER_IF_CTRL_REG,
-                        OMAP_TIMER_CTRL_POSTED);
+        __omap_dm_timer_reset(timer->io_base, autoidle, wakeup);
         timer->posted = 1;
 }
 
-static void omap_dm_timer_prepare(struct omap_dm_timer *timer)
+void omap_dm_timer_prepare(struct omap_dm_timer *timer)
 {
         omap_dm_timer_enable(timer);
         omap_dm_timer_reset(timer);
@@ -531,25 +395,13 @@ EXPORT_SYMBOL_GPL(omap_dm_timer_start);
 
 void omap_dm_timer_stop(struct omap_dm_timer *timer)
 {
-        u32 l;
+        unsigned long rate = 0;
 
-        l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
-        if (l & OMAP_TIMER_CTRL_ST) {
-                l &= ~0x1;
-                omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l);
 #ifdef CONFIG_ARCH_OMAP2PLUS
-                /* Readback to make sure write has completed */
-                omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
-                 /*
-                  * Wait for functional clock period x 3.5 to make sure that
-                  * timer is stopped
-                  */
-                udelay(3500000 / clk_get_rate(timer->fclk) + 1);
+        rate = clk_get_rate(timer->fclk);
 #endif
-        }
-        /* Ack possibly pending interrupt */
-        omap_dm_timer_write_reg(timer, OMAP_TIMER_STAT_REG,
-                        OMAP_TIMER_INT_OVERFLOW);
+
+        __omap_dm_timer_stop(timer->io_base, timer->posted, rate);
 }
 EXPORT_SYMBOL_GPL(omap_dm_timer_stop);
 
@@ -572,22 +424,11 @@ EXPORT_SYMBOL_GPL(omap_dm_timer_set_source);
 
 int omap_dm_timer_set_source(struct omap_dm_timer *timer, int source)
 {
-        int ret = -EINVAL;
-
         if (source < 0 || source >= 3)
                 return -EINVAL;
 
-        clk_disable(timer->fclk);
-        ret = clk_set_parent(timer->fclk, dm_source_clocks[source]);
-        clk_enable(timer->fclk);
-
-        /*
-         * When the functional clock disappears, too quick writes seem
-         * to cause an abort. XXX Is this still necessary?
-         */
-        __delay(300000);
-
-        return ret;
+        return __omap_dm_timer_set_source(timer->fclk,
+                                                dm_source_clocks[source]);
 }
 EXPORT_SYMBOL_GPL(omap_dm_timer_set_source);
 
@@ -625,8 +466,7 @@ void omap_dm_timer_set_load_start(struct omap_dm_timer *timer, int autoreload,
         }
         l |= OMAP_TIMER_CTRL_ST;
 
-        omap_dm_timer_write_reg(timer, OMAP_TIMER_COUNTER_REG, load);
-        omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l);
+        __omap_dm_timer_load_start(timer->io_base, l, load, timer->posted);
 }
 EXPORT_SYMBOL_GPL(omap_dm_timer_set_load_start);
 
@@ -679,8 +519,7 @@ EXPORT_SYMBOL_GPL(omap_dm_timer_set_prescaler);
 void omap_dm_timer_set_int_enable(struct omap_dm_timer *timer,
                                   unsigned int value)
 {
-        omap_dm_timer_write_reg(timer, OMAP_TIMER_INT_EN_REG, value);
-        omap_dm_timer_write_reg(timer, OMAP_TIMER_WAKEUP_EN_REG, value);
+        __omap_dm_timer_int_enable(timer->io_base, value);
 }
 EXPORT_SYMBOL_GPL(omap_dm_timer_set_int_enable);
 
@@ -696,17 +535,13 @@ EXPORT_SYMBOL_GPL(omap_dm_timer_read_status);
 
 void omap_dm_timer_write_status(struct omap_dm_timer *timer, unsigned int value)
 {
-        omap_dm_timer_write_reg(timer, OMAP_TIMER_STAT_REG, value);
+        __omap_dm_timer_write_status(timer->io_base, value);
 }
 EXPORT_SYMBOL_GPL(omap_dm_timer_write_status);
 
 unsigned int omap_dm_timer_read_counter(struct omap_dm_timer *timer)
 {
-        unsigned int l;
-
-        l = omap_dm_timer_read_reg(timer, OMAP_TIMER_COUNTER_REG);
-
-        return l;
+        return __omap_dm_timer_read_counter(timer->io_base, timer->posted);
 }
 EXPORT_SYMBOL_GPL(omap_dm_timer_read_counter);
 
@@ -737,7 +572,7 @@ int omap_dm_timers_active(void)
 }
 EXPORT_SYMBOL_GPL(omap_dm_timers_active);
 
-int __init omap_dm_timer_init(void)
+static int __init omap_dm_timer_init(void)
 {
         struct omap_dm_timer *timer;
         int i, map_size = SZ_8K;        /* Module 4KB + L4 4KB except on omap1 */
@@ -790,8 +625,16 @@ int __init omap_dm_timer_init(void)
                         sprintf(clk_name, "gpt%d_fck", i + 1);
                         timer->fclk = clk_get(NULL, clk_name);
                 }
+
+                /* One or two timers may be set up early for sys_timer */
+                if (sys_timer_reserved & (1  << i)) {
+                        timer->reserved = 1;
+                        timer->posted = 1;
+                }
 #endif
         }
 
         return 0;
 }
+
+arch_initcall(omap_dm_timer_init);
diff --git a/arch/arm/plat-omap/include/plat/clock.h b/arch/arm/plat-omap/include/plat/clock.h
index 006e599c6613..f57e0649ab30 100644
--- a/arch/arm/plat-omap/include/plat/clock.h
+++ b/arch/arm/plat-omap/include/plat/clock.h
@@ -152,7 +152,7 @@ struct dpll_data {
         u16                     max_multiplier;
         u8                      last_rounded_n;
         u8                      min_divider;
-        u8                      max_divider;
+        u16                     max_divider;
         u8                      modes;
 #if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4)
         void __iomem            *autoidle_reg;
diff --git a/arch/arm/plat-omap/include/plat/common.h b/arch/arm/plat-omap/include/plat/common.h
index 5288130be96e..4564cc697d7f 100644
--- a/arch/arm/plat-omap/include/plat/common.h
+++ b/arch/arm/plat-omap/include/plat/common.h
@@ -34,7 +34,11 @@
 struct sys_timer;
 
 extern void omap_map_common_io(void);
-extern struct sys_timer omap_timer;
+extern struct sys_timer omap1_timer;
+extern struct sys_timer omap2_timer;
+extern struct sys_timer omap3_timer;
+extern struct sys_timer omap3_secure_timer;
+extern struct sys_timer omap4_timer;
 extern bool omap_32k_timer_init(void);
 extern int __init omap_init_clocksource_32k(void);
 extern unsigned long long notrace omap_32k_sched_clock(void);
diff --git a/arch/arm/plat-omap/include/plat/dmtimer.h b/arch/arm/plat-omap/include/plat/dmtimer.h
index d6c70d2f4030..eb5d16c60cd9 100644
--- a/arch/arm/plat-omap/include/plat/dmtimer.h
+++ b/arch/arm/plat-omap/include/plat/dmtimer.h
@@ -32,6 +32,10 @@
  * 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
+#include <linux/clk.h>
+#include <linux/delay.h>
+#include <linux/io.h>
+
 #ifndef __ASM_ARCH_DMTIMER_H
 #define __ASM_ARCH_DMTIMER_H
 
@@ -56,12 +60,8 @@
  */
 #define OMAP_TIMER_IP_VERSION_1                        0x1
 struct omap_dm_timer;
-extern struct omap_dm_timer *gptimer_wakeup;
-extern struct sys_timer omap_timer;
 struct clk;
 
-int omap_dm_timer_init(void);
-
 struct omap_dm_timer *omap_dm_timer_request(void);
 struct omap_dm_timer *omap_dm_timer_request_specific(int timer_id);
 void omap_dm_timer_free(struct omap_dm_timer *timer);
@@ -93,5 +93,248 @@ void omap_dm_timer_write_counter(struct omap_dm_timer *timer, unsigned int value
 
 int omap_dm_timers_active(void);
 
+/*
+ * Do not use the defines below, they are not needed. They should be only
+ * used by dmtimer.c and sys_timer related code.
+ */
+
+/* register offsets */
+#define _OMAP_TIMER_ID_OFFSET           0x00
+#define _OMAP_TIMER_OCP_CFG_OFFSET      0x10
+#define _OMAP_TIMER_SYS_STAT_OFFSET     0x14
+#define _OMAP_TIMER_STAT_OFFSET         0x18
+#define _OMAP_TIMER_INT_EN_OFFSET       0x1c
+#define _OMAP_TIMER_WAKEUP_EN_OFFSET    0x20
+#define _OMAP_TIMER_CTRL_OFFSET         0x24
+#define         OMAP_TIMER_CTRL_GPOCFG          (1 << 14)
+#define         OMAP_TIMER_CTRL_CAPTMODE        (1 << 13)
+#define         OMAP_TIMER_CTRL_PT              (1 << 12)
+#define         OMAP_TIMER_CTRL_TCM_LOWTOHIGH   (0x1 << 8)
+#define         OMAP_TIMER_CTRL_TCM_HIGHTOLOW   (0x2 << 8)
+#define         OMAP_TIMER_CTRL_TCM_BOTHEDGES   (0x3 << 8)
+#define         OMAP_TIMER_CTRL_SCPWM           (1 << 7)
+#define         OMAP_TIMER_CTRL_CE              (1 << 6) /* compare enable */
+#define         OMAP_TIMER_CTRL_PRE             (1 << 5) /* prescaler enable */
+#define         OMAP_TIMER_CTRL_PTV_SHIFT       2 /* prescaler value shift */
+#define         OMAP_TIMER_CTRL_POSTED          (1 << 2)
+#define         OMAP_TIMER_CTRL_AR              (1 << 1) /* auto-reload enable */
+#define         OMAP_TIMER_CTRL_ST              (1 << 0) /* start timer */
+#define _OMAP_TIMER_COUNTER_OFFSET      0x28
+#define _OMAP_TIMER_LOAD_OFFSET         0x2c
+#define _OMAP_TIMER_TRIGGER_OFFSET      0x30
+#define _OMAP_TIMER_WRITE_PEND_OFFSET   0x34
+#define         WP_NONE                 0       /* no write pending bit */
+#define         WP_TCLR                 (1 << 0)
+#define         WP_TCRR                 (1 << 1)
+#define         WP_TLDR                 (1 << 2)
+#define         WP_TTGR                 (1 << 3)
+#define         WP_TMAR                 (1 << 4)
+#define         WP_TPIR                 (1 << 5)
+#define         WP_TNIR                 (1 << 6)
+#define         WP_TCVR                 (1 << 7)
+#define         WP_TOCR                 (1 << 8)
+#define         WP_TOWR                 (1 << 9)
+#define _OMAP_TIMER_MATCH_OFFSET        0x38
+#define _OMAP_TIMER_CAPTURE_OFFSET      0x3c
+#define _OMAP_TIMER_IF_CTRL_OFFSET      0x40
+#define _OMAP_TIMER_CAPTURE2_OFFSET             0x44    /* TCAR2, 34xx only */
+#define _OMAP_TIMER_TICK_POS_OFFSET             0x48    /* TPIR, 34xx only */
+#define _OMAP_TIMER_TICK_NEG_OFFSET             0x4c    /* TNIR, 34xx only */
+#define _OMAP_TIMER_TICK_COUNT_OFFSET           0x50    /* TCVR, 34xx only */
+#define _OMAP_TIMER_TICK_INT_MASK_SET_OFFSET    0x54    /* TOCR, 34xx only */
+#define _OMAP_TIMER_TICK_INT_MASK_COUNT_OFFSET  0x58    /* TOWR, 34xx only */
+
+/* register offsets with the write pending bit encoded */
+#define WPSHIFT                                 16
+
+#define OMAP_TIMER_ID_REG                       (_OMAP_TIMER_ID_OFFSET \
+                                                        | (WP_NONE << WPSHIFT))
+
+#define OMAP_TIMER_OCP_CFG_REG                  (_OMAP_TIMER_OCP_CFG_OFFSET \
+                                                        | (WP_NONE << WPSHIFT))
+
+#define OMAP_TIMER_SYS_STAT_REG                 (_OMAP_TIMER_SYS_STAT_OFFSET \
+                                                        | (WP_NONE << WPSHIFT))
+
+#define OMAP_TIMER_STAT_REG                     (_OMAP_TIMER_STAT_OFFSET \
+                                                        | (WP_NONE << WPSHIFT))
+
+#define OMAP_TIMER_INT_EN_REG                   (_OMAP_TIMER_INT_EN_OFFSET \
+                                                        | (WP_NONE << WPSHIFT))
+
+#define OMAP_TIMER_WAKEUP_EN_REG                (_OMAP_TIMER_WAKEUP_EN_OFFSET \
+                                                        | (WP_NONE << WPSHIFT))
+
+#define OMAP_TIMER_CTRL_REG                     (_OMAP_TIMER_CTRL_OFFSET \
+                                                        | (WP_TCLR << WPSHIFT))
+
+#define OMAP_TIMER_COUNTER_REG                  (_OMAP_TIMER_COUNTER_OFFSET \
+                                                        | (WP_TCRR << WPSHIFT))
+
+#define OMAP_TIMER_LOAD_REG                     (_OMAP_TIMER_LOAD_OFFSET \
+                                                        | (WP_TLDR << WPSHIFT))
+
+#define OMAP_TIMER_TRIGGER_REG                  (_OMAP_TIMER_TRIGGER_OFFSET \
+                                                        | (WP_TTGR << WPSHIFT))
+
+#define OMAP_TIMER_WRITE_PEND_REG               (_OMAP_TIMER_WRITE_PEND_OFFSET \
+                                                        | (WP_NONE << WPSHIFT))
+
+#define OMAP_TIMER_MATCH_REG                    (_OMAP_TIMER_MATCH_OFFSET \
+                                                        | (WP_TMAR << WPSHIFT))
+
+#define OMAP_TIMER_CAPTURE_REG                  (_OMAP_TIMER_CAPTURE_OFFSET \
+                                                        | (WP_NONE << WPSHIFT))
+
+#define OMAP_TIMER_IF_CTRL_REG                  (_OMAP_TIMER_IF_CTRL_OFFSET \
+                                                        | (WP_NONE << WPSHIFT))
+
+#define OMAP_TIMER_CAPTURE2_REG                 (_OMAP_TIMER_CAPTURE2_OFFSET \
+                                                        | (WP_NONE << WPSHIFT))
+
+#define OMAP_TIMER_TICK_POS_REG                 (_OMAP_TIMER_TICK_POS_OFFSET \
+                                                        | (WP_TPIR << WPSHIFT))
+
+#define OMAP_TIMER_TICK_NEG_REG                 (_OMAP_TIMER_TICK_NEG_OFFSET \
+                                                        | (WP_TNIR << WPSHIFT))
+
+#define OMAP_TIMER_TICK_COUNT_REG               (_OMAP_TIMER_TICK_COUNT_OFFSET \
+                                                        | (WP_TCVR << WPSHIFT))
+
+#define OMAP_TIMER_TICK_INT_MASK_SET_REG                                \
+                (_OMAP_TIMER_TICK_INT_MASK_SET_OFFSET | (WP_TOCR << WPSHIFT))
+
+#define OMAP_TIMER_TICK_INT_MASK_COUNT_REG                              \
+                (_OMAP_TIMER_TICK_INT_MASK_COUNT_OFFSET | (WP_TOWR << WPSHIFT))
+
+struct omap_dm_timer {
+        unsigned long phys_base;
+        int irq;
+#ifdef CONFIG_ARCH_OMAP2PLUS
+        struct clk *iclk, *fclk;
+#endif
+        void __iomem *io_base;
+        unsigned long rate;
+        unsigned reserved:1;
+        unsigned enabled:1;
+        unsigned posted:1;
+};
+
+extern u32 sys_timer_reserved;
+void omap_dm_timer_prepare(struct omap_dm_timer *timer);
+
+static inline u32 __omap_dm_timer_read(void __iomem *base, u32 reg,
+                                                int posted)
+{
+        if (posted)
+                while (__raw_readl(base + (OMAP_TIMER_WRITE_PEND_REG & 0xff))
+                                & (reg >> WPSHIFT))
+                        cpu_relax();
+
+        return __raw_readl(base + (reg & 0xff));
+}
+
+static inline void __omap_dm_timer_write(void __iomem *base, u32 reg, u32 val,
+                                                int posted)
+{
+        if (posted)
+                while (__raw_readl(base + (OMAP_TIMER_WRITE_PEND_REG & 0xff))
+                                & (reg >> WPSHIFT))
+                        cpu_relax();
+
+        __raw_writel(val, base + (reg & 0xff));
+}
+
+/* Assumes the source clock has been set by caller */
+static inline void __omap_dm_timer_reset(void __iomem *base, int autoidle,
+                                                int wakeup)
+{
+        u32 l;
+
+        l = __omap_dm_timer_read(base, OMAP_TIMER_OCP_CFG_REG, 0);
+        l |= 0x02 << 3;  /* Set to smart-idle mode */
+        l |= 0x2 << 8;   /* Set clock activity to perserve f-clock on idle */
+
+        if (autoidle)
+                l |= 0x1 << 0;
+
+        if (wakeup)
+                l |= 1 << 2;
+
+        __omap_dm_timer_write(base, OMAP_TIMER_OCP_CFG_REG, l, 0);
+
+        /* Match hardware reset default of posted mode */
+        __omap_dm_timer_write(base, OMAP_TIMER_IF_CTRL_REG,
+                                        OMAP_TIMER_CTRL_POSTED, 0);
+}
+
+static inline int __omap_dm_timer_set_source(struct clk *timer_fck,
+                                                struct clk *parent)
+{
+        int ret;
+
+        clk_disable(timer_fck);
+        ret = clk_set_parent(timer_fck, parent);
+        clk_enable(timer_fck);
+
+        /*
+         * When the functional clock disappears, too quick writes seem
+         * to cause an abort. XXX Is this still necessary?
+         */
+        __delay(300000);
+
+        return ret;
+}
+
+static inline void __omap_dm_timer_stop(void __iomem *base, int posted,
+                                                unsigned long rate)
+{
+        u32 l;
+
+        l = __omap_dm_timer_read(base, OMAP_TIMER_CTRL_REG, posted);
+        if (l & OMAP_TIMER_CTRL_ST) {
+                l &= ~0x1;
+                __omap_dm_timer_write(base, OMAP_TIMER_CTRL_REG, l, posted);
+#ifdef CONFIG_ARCH_OMAP2PLUS
+                /* Readback to make sure write has completed */
+                __omap_dm_timer_read(base, OMAP_TIMER_CTRL_REG, posted);
+                /*
+                 * Wait for functional clock period x 3.5 to make sure that
+                 * timer is stopped
+                 */
+                udelay(3500000 / rate + 1);
+#endif
+        }
+
+        /* Ack possibly pending interrupt */
+        __omap_dm_timer_write(base, OMAP_TIMER_STAT_REG,
+                                        OMAP_TIMER_INT_OVERFLOW, 0);
+}
+
+static inline void __omap_dm_timer_load_start(void __iomem *base, u32 ctrl,
+                                                unsigned int load, int posted)
+{
+        __omap_dm_timer_write(base, OMAP_TIMER_COUNTER_REG, load, posted);
+        __omap_dm_timer_write(base, OMAP_TIMER_CTRL_REG, ctrl, posted);
+}
+
+static inline void __omap_dm_timer_int_enable(void __iomem *base,
+                                                unsigned int value)
+{
+        __omap_dm_timer_write(base, OMAP_TIMER_INT_EN_REG, value, 0);
+        __omap_dm_timer_write(base, OMAP_TIMER_WAKEUP_EN_REG, value, 0);
+}
+
+static inline unsigned int __omap_dm_timer_read_counter(void __iomem *base,
+                                                        int posted)
+{
+        return __omap_dm_timer_read(base, OMAP_TIMER_COUNTER_REG, posted);
+}
+
+static inline void __omap_dm_timer_write_status(void __iomem *base,
+                                                unsigned int value)
+{
+        __omap_dm_timer_write(base, OMAP_TIMER_STAT_REG, value, 0);
+}
 
 #endif /* __ASM_ARCH_DMTIMER_H */
diff --git a/arch/arm/plat-omap/include/plat/irqs.h b/arch/arm/plat-omap/include/plat/irqs.h
index 5a25098ea7ea..c88432005665 100644
--- a/arch/arm/plat-omap/include/plat/irqs.h
+++ b/arch/arm/plat-omap/include/plat/irqs.h
@@ -428,7 +428,11 @@
 #define INTCPS_NR_IRQS          96
 
 #ifndef __ASSEMBLY__
-extern void omap_init_irq(void);
+extern void __iomem *omap_irq_base;
+void omap1_init_irq(void);
+void omap2_init_irq(void);
+void omap3_init_irq(void);
+void ti816x_init_irq(void);
 extern int omap_irq_pending(void);
 void omap_intc_save_context(void);
 void omap_intc_restore_context(void);
diff --git a/arch/arm/plat-omap/include/plat/mcbsp.h b/arch/arm/plat-omap/include/plat/mcbsp.h
index f8f690ab2997..9882c657b2d4 100644
--- a/arch/arm/plat-omap/include/plat/mcbsp.h
+++ b/arch/arm/plat-omap/include/plat/mcbsp.h
@@ -24,7 +24,6 @@
 #ifndef __ASM_ARCH_OMAP_MCBSP_H
 #define __ASM_ARCH_OMAP_MCBSP_H
 
-#include <linux/completion.h>
 #include <linux/spinlock.h>
 
 #include <mach/hardware.h>
@@ -34,7 +33,7 @@
 #define OMAP_MCBSP_PLATFORM_DEVICE(port_nr)             \
 static struct platform_device omap_mcbsp##port_nr = {   \
         .name   = "omap-mcbsp-dai",                     \
-        .id     = OMAP_MCBSP##port_nr,                  \
+        .id     = port_nr - 1,                  \
 }
 
 #define MCBSP_CONFIG_TYPE2      0x2
@@ -333,18 +332,6 @@ struct omap_mcbsp_reg_cfg {
 };
 
 typedef enum {
-        OMAP_MCBSP1 = 0,
-        OMAP_MCBSP2,
-        OMAP_MCBSP3,
-        OMAP_MCBSP4,
-        OMAP_MCBSP5
-} omap_mcbsp_id;
-
-typedef int __bitwise omap_mcbsp_io_type_t;
-#define OMAP_MCBSP_IRQ_IO ((__force omap_mcbsp_io_type_t) 1)
-#define OMAP_MCBSP_POLL_IO ((__force omap_mcbsp_io_type_t) 2)
-
-typedef enum {
         OMAP_MCBSP_WORD_8 = 0,
         OMAP_MCBSP_WORD_12,
         OMAP_MCBSP_WORD_16,
@@ -353,38 +340,6 @@ typedef enum {
         OMAP_MCBSP_WORD_32,
 } omap_mcbsp_word_length;
 
-typedef enum {
-        OMAP_MCBSP_CLK_RISING = 0,
-        OMAP_MCBSP_CLK_FALLING,
-} omap_mcbsp_clk_polarity;
-
-typedef enum {
-        OMAP_MCBSP_FS_ACTIVE_HIGH = 0,
-        OMAP_MCBSP_FS_ACTIVE_LOW,
-} omap_mcbsp_fs_polarity;
-
-typedef enum {
-        OMAP_MCBSP_CLK_STP_MODE_NO_DELAY = 0,
-        OMAP_MCBSP_CLK_STP_MODE_DELAY,
-} omap_mcbsp_clk_stp_mode;
-
-
-/******* SPI specific mode **********/
-typedef enum {
-        OMAP_MCBSP_SPI_MASTER = 0,
-        OMAP_MCBSP_SPI_SLAVE,
-} omap_mcbsp_spi_mode;
-
-struct omap_mcbsp_spi_cfg {
-        omap_mcbsp_spi_mode             spi_mode;
-        omap_mcbsp_clk_polarity         rx_clock_polarity;
-        omap_mcbsp_clk_polarity         tx_clock_polarity;
-        omap_mcbsp_fs_polarity          fsx_polarity;
-        u8                              clk_div;
-        omap_mcbsp_clk_stp_mode         clk_stp_mode;
-        omap_mcbsp_word_length          word_length;
-};
-
 /* Platform specific configuration */
 struct omap_mcbsp_ops {
         void (*request)(unsigned int);
@@ -422,25 +377,13 @@ struct omap_mcbsp {
         void __iomem *io_base;
         u8 id;
         u8 free;
-        omap_mcbsp_word_length rx_word_length;
-        omap_mcbsp_word_length tx_word_length;
 
-        omap_mcbsp_io_type_t io_type; /* IRQ or poll */
-        /* IRQ based TX/RX */
         int rx_irq;
         int tx_irq;
 
         /* DMA stuff */
         u8 dma_rx_sync;
-        short dma_rx_lch;
         u8 dma_tx_sync;
-        short dma_tx_lch;
-
-        /* Completion queues */
-        struct completion tx_irq_completion;
-        struct completion rx_irq_completion;
-        struct completion tx_dma_completion;
-        struct completion rx_dma_completion;
 
         /* Protect the field .free, while checking if the mcbsp is in use */
         spinlock_t lock;
@@ -499,24 +442,9 @@ int omap_mcbsp_request(unsigned int id);
 void omap_mcbsp_free(unsigned int id);
 void omap_mcbsp_start(unsigned int id, int tx, int rx);
 void omap_mcbsp_stop(unsigned int id, int tx, int rx);
-void omap_mcbsp_xmit_word(unsigned int id, u32 word);
-u32 omap_mcbsp_recv_word(unsigned int id);
-
-int omap_mcbsp_xmit_buffer(unsigned int id, dma_addr_t buffer, unsigned int length);
-int omap_mcbsp_recv_buffer(unsigned int id, dma_addr_t buffer, unsigned int length);
-int omap_mcbsp_spi_master_xmit_word_poll(unsigned int id, u32 word);
-int omap_mcbsp_spi_master_recv_word_poll(unsigned int id, u32 * word);
-
 
 /* McBSP functional clock source changing function */
 extern int omap2_mcbsp_set_clks_src(u8 id, u8 fck_src_id);
-/* SPI specific API */
-void omap_mcbsp_set_spi_mode(unsigned int id, const struct omap_mcbsp_spi_cfg * spi_cfg);
-
-/* Polled read/write functions */
-int omap_mcbsp_pollread(unsigned int id, u16 * buf);
-int omap_mcbsp_pollwrite(unsigned int id, u16 buf);
-int omap_mcbsp_set_io_type(unsigned int id, omap_mcbsp_io_type_t io_type);
 
 /* McBSP signal muxing API */
 void omap2_mcbsp1_mux_clkr_src(u8 mux);
diff --git a/arch/arm/plat-omap/include/plat/nand.h b/arch/arm/plat-omap/include/plat/nand.h
index d86d1ecf0068..67fc5060183e 100644
--- a/arch/arm/plat-omap/include/plat/nand.h
+++ b/arch/arm/plat-omap/include/plat/nand.h
@@ -19,15 +19,11 @@ enum nand_io {
 };
 
 struct omap_nand_platform_data {
-        unsigned int            options;
         int                     cs;
-        int                     gpio_irq;
         struct mtd_partition    *parts;
         struct gpmc_timings     *gpmc_t;
         int                     nr_parts;
-        int                     (*nand_setup)(void);
-        int                     (*dev_ready)(struct omap_nand_platform_data *);
-        int                     dma_channel;
+        bool                    dev_ready;
         int                     gpmc_irq;
         enum nand_io            xfer_type;
         unsigned long           phys_base;
diff --git a/arch/arm/plat-omap/include/plat/omap-pm.h b/arch/arm/plat-omap/include/plat/omap-pm.h
index c0a752053039..0840df813f4f 100644
--- a/arch/arm/plat-omap/include/plat/omap-pm.h
+++ b/arch/arm/plat-omap/include/plat/omap-pm.h
@@ -40,11 +40,7 @@
  * framework starts.  The "_if_" is to avoid name collisions with the
  * PM idle-loop code.
  */
-#ifdef CONFIG_OMAP_PM_NONE
-#define omap_pm_if_early_init() 0
-#else
 int __init omap_pm_if_early_init(void);
-#endif
 
 /**
  * omap_pm_if_init - OMAP PM init code called after clock fw init
@@ -52,11 +48,7 @@ int __init omap_pm_if_early_init(void);
  * The main initialization code.  OPP tables are passed in here.  The
  * "_if_" is to avoid name collisions with the PM idle-loop code.
  */
-#ifdef CONFIG_OMAP_PM_NONE
-#define omap_pm_if_init() 0
-#else
 int __init omap_pm_if_init(void);
-#endif
 
 /**
  * omap_pm_if_exit - OMAP PM exit code
diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h
index 1adea9c62984..ce06ac6a9709 100644
--- a/arch/arm/plat-omap/include/plat/omap_hwmod.h
+++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h
@@ -77,7 +77,6 @@ extern struct omap_hwmod_sysc_fields omap_hwmod_sysc_type2;
 #define HWMOD_IDLEMODE_FORCE            (1 << 0)
 #define HWMOD_IDLEMODE_NO               (1 << 1)
 #define HWMOD_IDLEMODE_SMART            (1 << 2)
-/* Slave idle mode flag only */
 #define HWMOD_IDLEMODE_SMART_WKUP       (1 << 3)
 
 /**
@@ -98,7 +97,7 @@ struct omap_hwmod_mux_info {
 /**
  * struct omap_hwmod_irq_info - MPU IRQs used by the hwmod
  * @name: name of the IRQ channel (module local name)
- * @irq_ch: IRQ channel ID
+ * @irq: IRQ channel ID (should be non-negative except -1 = terminator)
  *
  * @name should be something short, e.g., "tx" or "rx".  It is for use
  * by platform_get_resource_byname().  It is defined locally to the
@@ -106,13 +105,13 @@ struct omap_hwmod_mux_info {
  */
 struct omap_hwmod_irq_info {
         const char      *name;
-        u16             irq;
+        s16             irq;
 };
 
 /**
  * struct omap_hwmod_dma_info - DMA channels used by the hwmod
  * @name: name of the DMA channel (module local name)
- * @dma_req: DMA request ID
+ * @dma_req: DMA request ID (should be non-negative except -1 = terminator)
  *
  * @name should be something short, e.g., "tx" or "rx".  It is for use
  * by platform_get_resource_byname().  It is defined locally to the
@@ -120,7 +119,7 @@ struct omap_hwmod_irq_info {
  */
 struct omap_hwmod_dma_info {
         const char      *name;
-        u16             dma_req;
+        s16             dma_req;
 };
 
 /**
@@ -220,7 +219,6 @@ struct omap_hwmod_addr_space {
  * @clk: interface clock: OMAP clock name
  * @_clk: pointer to the interface struct clk (filled in at runtime)
  * @fw: interface firewall data
- * @addr_cnt: ARRAY_SIZE(@addr)
  * @width: OCP data width
  * @user: initiators using this interface (see OCP_USER_* macros above)
  * @flags: OCP interface flags (see OCPIF_* macros above)
@@ -239,7 +237,6 @@ struct omap_hwmod_ocp_if {
         union {
                 struct omap_hwmod_omap2_firewall omap2;
         }                               fw;
-        u8                              addr_cnt;
         u8                              width;
         u8                              user;
         u8                              flags;
@@ -258,6 +255,7 @@ struct omap_hwmod_ocp_if {
 #define MSTANDBY_FORCE          (HWMOD_IDLEMODE_FORCE << MASTER_STANDBY_SHIFT)
 #define MSTANDBY_NO             (HWMOD_IDLEMODE_NO << MASTER_STANDBY_SHIFT)
 #define MSTANDBY_SMART          (HWMOD_IDLEMODE_SMART << MASTER_STANDBY_SHIFT)
+#define MSTANDBY_SMART_WKUP     (HWMOD_IDLEMODE_SMART_WKUP << MASTER_STANDBY_SHIFT)
 
 /* omap_hwmod_sysconfig.sysc_flags capability flags */
 #define SYSC_HAS_AUTOIDLE       (1 << 0)
@@ -468,8 +466,8 @@ struct omap_hwmod_class {
  * @name: name of the hwmod
  * @class: struct omap_hwmod_class * to the class of this hwmod
  * @od: struct omap_device currently associated with this hwmod (internal use)
- * @mpu_irqs: ptr to an array of MPU IRQs (see also mpu_irqs_cnt)
- * @sdma_reqs: ptr to an array of System DMA request IDs (see sdma_reqs_cnt)
+ * @mpu_irqs: ptr to an array of MPU IRQs
+ * @sdma_reqs: ptr to an array of System DMA request IDs
  * @prcm: PRCM data pertaining to this hwmod
  * @main_clk: main clock: OMAP clock name
  * @_clk: pointer to the main struct clk (filled in at runtime)
@@ -482,8 +480,6 @@ struct omap_hwmod_class {
  * @_sysc_cache: internal-use hwmod flags
  * @_mpu_rt_va: cached register target start address (internal use)
  * @_mpu_port_index: cached MPU register target slave ID (internal use)
- * @mpu_irqs_cnt: number of @mpu_irqs
- * @sdma_reqs_cnt: number of @sdma_reqs
  * @opt_clks_cnt: number of @opt_clks
  * @master_cnt: number of @master entries
  * @slaves_cnt: number of @slave entries
@@ -531,8 +527,6 @@ struct omap_hwmod {
         u16                             flags;
         u8                              _mpu_port_index;
         u8                              response_lat;
-        u8                              mpu_irqs_cnt;
-        u8                              sdma_reqs_cnt;
         u8                              rst_lines_cnt;
         u8                              opt_clks_cnt;
         u8                              masters_cnt;
diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c
index 5587acf0eb2c..3c1fbdc92468 100644
--- a/arch/arm/plat-omap/mcbsp.c
+++ b/arch/arm/plat-omap/mcbsp.c
@@ -16,8 +16,6 @@
 #include <linux/init.h>
 #include <linux/device.h>
 #include <linux/platform_device.h>
-#include <linux/wait.h>
-#include <linux/completion.h>
 #include <linux/interrupt.h>
 #include <linux/err.h>
 #include <linux/clk.h>
@@ -25,7 +23,6 @@
 #include <linux/io.h>
 #include <linux/slab.h>
 
-#include <plat/dma.h>
 #include <plat/mcbsp.h>
 #include <plat/omap_device.h>
 #include <linux/pm_runtime.h>
@@ -136,8 +133,6 @@ static irqreturn_t omap_mcbsp_tx_irq_handler(int irq, void *dev_id)
                         irqst_spcr2);
                 /* Writing zero to XSYNC_ERR clears the IRQ */
                 MCBSP_WRITE(mcbsp_tx, SPCR2, MCBSP_READ_CACHE(mcbsp_tx, SPCR2));
-        } else {
-                complete(&mcbsp_tx->tx_irq_completion);
         }
 
         return IRQ_HANDLED;
@@ -156,41 +151,11 @@ static irqreturn_t omap_mcbsp_rx_irq_handler(int irq, void *dev_id)
                         irqst_spcr1);
                 /* Writing zero to RSYNC_ERR clears the IRQ */
                 MCBSP_WRITE(mcbsp_rx, SPCR1, MCBSP_READ_CACHE(mcbsp_rx, SPCR1));
-        } else {
-                complete(&mcbsp_rx->rx_irq_completion);
         }
 
         return IRQ_HANDLED;
 }
 
-static void omap_mcbsp_tx_dma_callback(int lch, u16 ch_status, void *data)
-{
-        struct omap_mcbsp *mcbsp_dma_tx = data;
-
-        dev_dbg(mcbsp_dma_tx->dev, "TX DMA callback : 0x%x\n",
-                MCBSP_READ(mcbsp_dma_tx, SPCR2));
-
-        /* We can free the channels */
-        omap_free_dma(mcbsp_dma_tx->dma_tx_lch);
-        mcbsp_dma_tx->dma_tx_lch = -1;
-
-        complete(&mcbsp_dma_tx->tx_dma_completion);
-}
-
-static void omap_mcbsp_rx_dma_callback(int lch, u16 ch_status, void *data)
-{
-        struct omap_mcbsp *mcbsp_dma_rx = data;
-
-        dev_dbg(mcbsp_dma_rx->dev, "RX DMA callback : 0x%x\n",
-                MCBSP_READ(mcbsp_dma_rx, SPCR2));
-
-        /* We can free the channels */
-        omap_free_dma(mcbsp_dma_rx->dma_rx_lch);
-        mcbsp_dma_rx->dma_rx_lch = -1;
-
-        complete(&mcbsp_dma_rx->rx_dma_completion);
-}
-
 /*
  * omap_mcbsp_config simply write a config to the
  * appropriate McBSP.
@@ -758,37 +723,6 @@ static inline void omap_st_start(struct omap_mcbsp *mcbsp) {}
 static inline void omap_st_stop(struct omap_mcbsp *mcbsp) {}
 #endif
 
-/*
- * We can choose between IRQ based or polled IO.
- * This needs to be called before omap_mcbsp_request().
- */
-int omap_mcbsp_set_io_type(unsigned int id, omap_mcbsp_io_type_t io_type)
-{
-        struct omap_mcbsp *mcbsp;
-
-        if (!omap_mcbsp_check_valid_id(id)) {
-                printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
-                return -ENODEV;
-        }
-        mcbsp = id_to_mcbsp_ptr(id);
-
-        spin_lock(&mcbsp->lock);
-
-        if (!mcbsp->free) {
-                dev_err(mcbsp->dev, "McBSP%d is currently in use\n",
-                        mcbsp->id);
-                spin_unlock(&mcbsp->lock);
-                return -EINVAL;
-        }
-
-        mcbsp->io_type = io_type;
-
-        spin_unlock(&mcbsp->lock);
-
-        return 0;
-}
-EXPORT_SYMBOL(omap_mcbsp_set_io_type);
-
 int omap_mcbsp_request(unsigned int id)
 {
         struct omap_mcbsp *mcbsp;
@@ -833,29 +767,24 @@ int omap_mcbsp_request(unsigned int id)
         MCBSP_WRITE(mcbsp, SPCR1, 0);
         MCBSP_WRITE(mcbsp, SPCR2, 0);
 
-        if (mcbsp->io_type == OMAP_MCBSP_IRQ_IO) {
-                /* We need to get IRQs here */
-                init_completion(&mcbsp->tx_irq_completion);
-                err = request_irq(mcbsp->tx_irq, omap_mcbsp_tx_irq_handler,
-                                        0, "McBSP", (void *)mcbsp);
+        err = request_irq(mcbsp->tx_irq, omap_mcbsp_tx_irq_handler,
+                                0, "McBSP", (void *)mcbsp);
+        if (err != 0) {
+                dev_err(mcbsp->dev, "Unable to request TX IRQ %d "
+                                "for McBSP%d\n", mcbsp->tx_irq,
+                                mcbsp->id);
+                goto err_clk_disable;
+        }
+
+        if (mcbsp->rx_irq) {
+                err = request_irq(mcbsp->rx_irq,
+                                omap_mcbsp_rx_irq_handler,
+                                0, "McBSP", (void *)mcbsp);
                 if (err != 0) {
-                        dev_err(mcbsp->dev, "Unable to request TX IRQ %d "
-                                        "for McBSP%d\n", mcbsp->tx_irq,
+                        dev_err(mcbsp->dev, "Unable to request RX IRQ %d "
+                                        "for McBSP%d\n", mcbsp->rx_irq,
                                         mcbsp->id);
-                        goto err_clk_disable;
-                }
-
-                if (mcbsp->rx_irq) {
-                        init_completion(&mcbsp->rx_irq_completion);
-                        err = request_irq(mcbsp->rx_irq,
-                                        omap_mcbsp_rx_irq_handler,
-                                        0, "McBSP", (void *)mcbsp);
-                        if (err != 0) {
-                                dev_err(mcbsp->dev, "Unable to request RX IRQ %d "
-                                                "for McBSP%d\n", mcbsp->rx_irq,
-                                                mcbsp->id);
-                                goto err_free_irq;
-                        }
+                        goto err_free_irq;
                 }
         }
 
@@ -901,12 +830,9 @@ void omap_mcbsp_free(unsigned int id)
 
         pm_runtime_put_sync(mcbsp->dev);
 
-        if (mcbsp->io_type == OMAP_MCBSP_IRQ_IO) {
-                /* Free IRQs */
-                if (mcbsp->rx_irq)
-                        free_irq(mcbsp->rx_irq, (void *)mcbsp);
-                free_irq(mcbsp->tx_irq, (void *)mcbsp);
-        }
+        if (mcbsp->rx_irq)
+                free_irq(mcbsp->rx_irq, (void *)mcbsp);
+        free_irq(mcbsp->tx_irq, (void *)mcbsp);
 
         reg_cache = mcbsp->reg_cache;
 
@@ -943,9 +869,6 @@ void omap_mcbsp_start(unsigned int id, int tx, int rx)
         if (cpu_is_omap34xx())
                 omap_st_start(mcbsp);
 
-        mcbsp->rx_word_length = (MCBSP_READ_CACHE(mcbsp, RCR1) >> 5) & 0x7;
-        mcbsp->tx_word_length = (MCBSP_READ_CACHE(mcbsp, XCR1) >> 5) & 0x7;
-
         /* Only enable SRG, if McBSP is master */
         w = MCBSP_READ_CACHE(mcbsp, PCR0);
         if (w & (FSXM | FSRM | CLKXM | CLKRM))
@@ -1043,485 +966,6 @@ void omap_mcbsp_stop(unsigned int id, int tx, int rx)
 }
 EXPORT_SYMBOL(omap_mcbsp_stop);
 
-/* polled mcbsp i/o operations */
-int omap_mcbsp_pollwrite(unsigned int id, u16 buf)
-{
-        struct omap_mcbsp *mcbsp;
-
-        if (!omap_mcbsp_check_valid_id(id)) {
-                printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
-                return -ENODEV;
-        }
-
-        mcbsp = id_to_mcbsp_ptr(id);
-
-        MCBSP_WRITE(mcbsp, DXR1, buf);
-        /* if frame sync error - clear the error */
-        if (MCBSP_READ(mcbsp, SPCR2) & XSYNC_ERR) {
-                /* clear error */
-                MCBSP_WRITE(mcbsp, SPCR2, MCBSP_READ_CACHE(mcbsp, SPCR2));
-                /* resend */
-                return -1;
-        } else {
-                /* wait for transmit confirmation */
-                int attemps = 0;
-                while (!(MCBSP_READ(mcbsp, SPCR2) & XRDY)) {
-                        if (attemps++ > 1000) {
-                                MCBSP_WRITE(mcbsp, SPCR2,
-                                                MCBSP_READ_CACHE(mcbsp, SPCR2) &
-                                                (~XRST));
-                                udelay(10);
-                                MCBSP_WRITE(mcbsp, SPCR2,
-                                                MCBSP_READ_CACHE(mcbsp, SPCR2) |
-                                                (XRST));
-                                udelay(10);
-                                dev_err(mcbsp->dev, "Could not write to"
-                                        " McBSP%d Register\n", mcbsp->id);
-                                return -2;
-                        }
-                }
-        }
-
-        return 0;
-}
-EXPORT_SYMBOL(omap_mcbsp_pollwrite);
-
-int omap_mcbsp_pollread(unsigned int id, u16 *buf)
-{
-        struct omap_mcbsp *mcbsp;
-
-        if (!omap_mcbsp_check_valid_id(id)) {
-                printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
-                return -ENODEV;
-        }
-        mcbsp = id_to_mcbsp_ptr(id);
-
-        /* if frame sync error - clear the error */
-        if (MCBSP_READ(mcbsp, SPCR1) & RSYNC_ERR) {
-                /* clear error */
-                MCBSP_WRITE(mcbsp, SPCR1, MCBSP_READ_CACHE(mcbsp, SPCR1));
-                /* resend */
-                return -1;
-        } else {
-                /* wait for receive confirmation */
-                int attemps = 0;
-                while (!(MCBSP_READ(mcbsp, SPCR1) & RRDY)) {
-                        if (attemps++ > 1000) {
-                                MCBSP_WRITE(mcbsp, SPCR1,
-                                                MCBSP_READ_CACHE(mcbsp, SPCR1) &
-                                                (~RRST));
-                                udelay(10);
-                                MCBSP_WRITE(mcbsp, SPCR1,
-                                                MCBSP_READ_CACHE(mcbsp, SPCR1) |
-                                                (RRST));
-                                udelay(10);
-                                dev_err(mcbsp->dev, "Could not read from"
-                                        " McBSP%d Register\n", mcbsp->id);
-                                return -2;
-                        }
-                }
-        }
-        *buf = MCBSP_READ(mcbsp, DRR1);
-
-        return 0;
-}
-EXPORT_SYMBOL(omap_mcbsp_pollread);
-
-/*
- * IRQ based word transmission.
- */
-void omap_mcbsp_xmit_word(unsigned int id, u32 word)
-{
-        struct omap_mcbsp *mcbsp;
-        omap_mcbsp_word_length word_length;
-
-        if (!omap_mcbsp_check_valid_id(id)) {
-                printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
-                return;
-        }
-
-        mcbsp = id_to_mcbsp_ptr(id);
-        word_length = mcbsp->tx_word_length;
-
-        wait_for_completion(&mcbsp->tx_irq_completion);
-
-        if (word_length > OMAP_MCBSP_WORD_16)
-                MCBSP_WRITE(mcbsp, DXR2, word >> 16);
-        MCBSP_WRITE(mcbsp, DXR1, word & 0xffff);
-}
-EXPORT_SYMBOL(omap_mcbsp_xmit_word);
-
-u32 omap_mcbsp_recv_word(unsigned int id)
-{
-        struct omap_mcbsp *mcbsp;
-        u16 word_lsb, word_msb = 0;
-        omap_mcbsp_word_length word_length;
-
-        if (!omap_mcbsp_check_valid_id(id)) {
-                printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
-                return -ENODEV;
-        }
-        mcbsp = id_to_mcbsp_ptr(id);
-
-        word_length = mcbsp->rx_word_length;
-
-        wait_for_completion(&mcbsp->rx_irq_completion);
-
-        if (word_length > OMAP_MCBSP_WORD_16)
-                word_msb = MCBSP_READ(mcbsp, DRR2);
-        word_lsb = MCBSP_READ(mcbsp, DRR1);
-
-        return (word_lsb | (word_msb << 16));
-}
-EXPORT_SYMBOL(omap_mcbsp_recv_word);
-
-int omap_mcbsp_spi_master_xmit_word_poll(unsigned int id, u32 word)
-{
-        struct omap_mcbsp *mcbsp;
-        omap_mcbsp_word_length tx_word_length;
-        omap_mcbsp_word_length rx_word_length;
-        u16 spcr2, spcr1, attempts = 0, word_lsb, word_msb = 0;
-
-        if (!omap_mcbsp_check_valid_id(id)) {
-                printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
-                return -ENODEV;
-        }
-        mcbsp = id_to_mcbsp_ptr(id);
-        tx_word_length = mcbsp->tx_word_length;
-        rx_word_length = mcbsp->rx_word_length;
-
-        if (tx_word_length != rx_word_length)
-                return -EINVAL;
-
-        /* First we wait for the transmitter to be ready */
-        spcr2 = MCBSP_READ(mcbsp, SPCR2);
-        while (!(spcr2 & XRDY)) {
-                spcr2 = MCBSP_READ(mcbsp, SPCR2);
-                if (attempts++ > 1000) {
-                        /* We must reset the transmitter */
-                        MCBSP_WRITE(mcbsp, SPCR2,
-                                    MCBSP_READ_CACHE(mcbsp, SPCR2) & (~XRST));
-                        udelay(10);
-                        MCBSP_WRITE(mcbsp, SPCR2,
-                                    MCBSP_READ_CACHE(mcbsp, SPCR2) | XRST);
-                        udelay(10);
-                        dev_err(mcbsp->dev, "McBSP%d transmitter not "
-                                "ready\n", mcbsp->id);
-                        return -EAGAIN;
-                }
-        }
-
-        /* Now we can push the data */
-        if (tx_word_length > OMAP_MCBSP_WORD_16)
-                MCBSP_WRITE(mcbsp, DXR2, word >> 16);
-        MCBSP_WRITE(mcbsp, DXR1, word & 0xffff);
-
-        /* We wait for the receiver to be ready */
-        spcr1 = MCBSP_READ(mcbsp, SPCR1);
-        while (!(spcr1 & RRDY)) {
-                spcr1 = MCBSP_READ(mcbsp, SPCR1);
-                if (attempts++ > 1000) {
-                        /* We must reset the receiver */
-                        MCBSP_WRITE(mcbsp, SPCR1,
-                                    MCBSP_READ_CACHE(mcbsp, SPCR1) & (~RRST));
-                        udelay(10);
-                        MCBSP_WRITE(mcbsp, SPCR1,
-                                    MCBSP_READ_CACHE(mcbsp, SPCR1) | RRST);
-                        udelay(10);
-                        dev_err(mcbsp->dev, "McBSP%d receiver not "
-                                "ready\n", mcbsp->id);
-                        return -EAGAIN;
-                }
-        }
-
-        /* Receiver is ready, let's read the dummy data */
-        if (rx_word_length > OMAP_MCBSP_WORD_16)
-                word_msb = MCBSP_READ(mcbsp, DRR2);
-        word_lsb = MCBSP_READ(mcbsp, DRR1);
-
-        return 0;
-}
-EXPORT_SYMBOL(omap_mcbsp_spi_master_xmit_word_poll);
-
-int omap_mcbsp_spi_master_recv_word_poll(unsigned int id, u32 *word)
-{
-        struct omap_mcbsp *mcbsp;
-        u32 clock_word = 0;
-        omap_mcbsp_word_length tx_word_length;
-        omap_mcbsp_word_length rx_word_length;
-        u16 spcr2, spcr1, attempts = 0, word_lsb, word_msb = 0;
-
-        if (!omap_mcbsp_check_valid_id(id)) {
-                printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
-                return -ENODEV;
-        }
-
-        mcbsp = id_to_mcbsp_ptr(id);
-
-        tx_word_length = mcbsp->tx_word_length;
-        rx_word_length = mcbsp->rx_word_length;
-
-        if (tx_word_length != rx_word_length)
-                return -EINVAL;
-
-        /* First we wait for the transmitter to be ready */
-        spcr2 = MCBSP_READ(mcbsp, SPCR2);
-        while (!(spcr2 & XRDY)) {
-                spcr2 = MCBSP_READ(mcbsp, SPCR2);
-                if (attempts++ > 1000) {
-                        /* We must reset the transmitter */
-                        MCBSP_WRITE(mcbsp, SPCR2,
-                                    MCBSP_READ_CACHE(mcbsp, SPCR2) & (~XRST));
-                        udelay(10);
-                        MCBSP_WRITE(mcbsp, SPCR2,
-                                    MCBSP_READ_CACHE(mcbsp, SPCR2) | XRST);
-                        udelay(10);
-                        dev_err(mcbsp->dev, "McBSP%d transmitter not "
-                                "ready\n", mcbsp->id);
-                        return -EAGAIN;
-                }
-        }
-
-        /* We first need to enable the bus clock */
-        if (tx_word_length > OMAP_MCBSP_WORD_16)
-                MCBSP_WRITE(mcbsp, DXR2, clock_word >> 16);
-        MCBSP_WRITE(mcbsp, DXR1, clock_word & 0xffff);
-
-        /* We wait for the receiver to be ready */
-        spcr1 = MCBSP_READ(mcbsp, SPCR1);
-        while (!(spcr1 & RRDY)) {
-                spcr1 = MCBSP_READ(mcbsp, SPCR1);
-                if (attempts++ > 1000) {
-                        /* We must reset the receiver */
-                        MCBSP_WRITE(mcbsp, SPCR1,
-                                    MCBSP_READ_CACHE(mcbsp, SPCR1) & (~RRST));
-                        udelay(10);
-                        MCBSP_WRITE(mcbsp, SPCR1,
-                                    MCBSP_READ_CACHE(mcbsp, SPCR1) | RRST);
-                        udelay(10);
-                        dev_err(mcbsp->dev, "McBSP%d receiver not "
-                                "ready\n", mcbsp->id);
-                        return -EAGAIN;
-                }
-        }
-
-        /* Receiver is ready, there is something for us */
-        if (rx_word_length > OMAP_MCBSP_WORD_16)
-                word_msb = MCBSP_READ(mcbsp, DRR2);
-        word_lsb = MCBSP_READ(mcbsp, DRR1);
-
-        word[0] = (word_lsb | (word_msb << 16));
-
-        return 0;
-}
-EXPORT_SYMBOL(omap_mcbsp_spi_master_recv_word_poll);
-
-/*
- * Simple DMA based buffer rx/tx routines.
- * Nothing fancy, just a single buffer tx/rx through DMA.
- * The DMA resources are released once the transfer is done.
- * For anything fancier, you should use your own customized DMA
- * routines and callbacks.
- */
-int omap_mcbsp_xmit_buffer(unsigned int id, dma_addr_t buffer,
-                                unsigned int length)
-{
-        struct omap_mcbsp *mcbsp;
-        int dma_tx_ch;
-        int src_port = 0;
-        int dest_port = 0;
-        int sync_dev = 0;
-
-        if (!omap_mcbsp_check_valid_id(id)) {
-                printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
-                return -ENODEV;
-        }
-        mcbsp = id_to_mcbsp_ptr(id);
-
-        if (omap_request_dma(mcbsp->dma_tx_sync, "McBSP TX",
-                                omap_mcbsp_tx_dma_callback,
-                                mcbsp,
-                                &dma_tx_ch)) {
-                dev_err(mcbsp->dev, " Unable to request DMA channel for "
-                                "McBSP%d TX. Trying IRQ based TX\n",
-                                mcbsp->id);
-                return -EAGAIN;
-        }
-        mcbsp->dma_tx_lch = dma_tx_ch;
-
-        dev_err(mcbsp->dev, "McBSP%d TX DMA on channel %d\n", mcbsp->id,
-                dma_tx_ch);
-
-        init_completion(&mcbsp->tx_dma_completion);
-
-        if (cpu_class_is_omap1()) {
-                src_port = OMAP_DMA_PORT_TIPB;
-                dest_port = OMAP_DMA_PORT_EMIFF;
-        }
-        if (cpu_class_is_omap2())
-                sync_dev = mcbsp->dma_tx_sync;
-
-        omap_set_dma_transfer_params(mcbsp->dma_tx_lch,
-                                     OMAP_DMA_DATA_TYPE_S16,
-                                     length >> 1, 1,
-                                     OMAP_DMA_SYNC_ELEMENT,
-         sync_dev, 0);
-
-        omap_set_dma_dest_params(mcbsp->dma_tx_lch,
-                                 src_port,
-                                 OMAP_DMA_AMODE_CONSTANT,
-                                 mcbsp->phys_base + OMAP_MCBSP_REG_DXR1,
-                                 0, 0);
-
-        omap_set_dma_src_params(mcbsp->dma_tx_lch,
-                                dest_port,
-                                OMAP_DMA_AMODE_POST_INC,
-                                buffer,
-                                0, 0);
-
-        omap_start_dma(mcbsp->dma_tx_lch);
-        wait_for_completion(&mcbsp->tx_dma_completion);
-
-        return 0;
-}
-EXPORT_SYMBOL(omap_mcbsp_xmit_buffer);
-
-int omap_mcbsp_recv_buffer(unsigned int id, dma_addr_t buffer,
-                                unsigned int length)
-{
-        struct omap_mcbsp *mcbsp;
-        int dma_rx_ch;
-        int src_port = 0;
-        int dest_port = 0;
-        int sync_dev = 0;
-
-        if (!omap_mcbsp_check_valid_id(id)) {
-                printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
-                return -ENODEV;
-        }
-        mcbsp = id_to_mcbsp_ptr(id);
-
-        if (omap_request_dma(mcbsp->dma_rx_sync, "McBSP RX",
-                                omap_mcbsp_rx_dma_callback,
-                                mcbsp,
-                                &dma_rx_ch)) {
-                dev_err(mcbsp->dev, "Unable to request DMA channel for "
-                                "McBSP%d RX. Trying IRQ based RX\n",
-                                mcbsp->id);
-                return -EAGAIN;
-        }
-        mcbsp->dma_rx_lch = dma_rx_ch;
-
-        dev_err(mcbsp->dev, "McBSP%d RX DMA on channel %d\n", mcbsp->id,
-                dma_rx_ch);
-
-        init_completion(&mcbsp->rx_dma_completion);
-
-        if (cpu_class_is_omap1()) {
-                src_port = OMAP_DMA_PORT_TIPB;
-                dest_port = OMAP_DMA_PORT_EMIFF;
-        }
-        if (cpu_class_is_omap2())
-                sync_dev = mcbsp->dma_rx_sync;
-
-        omap_set_dma_transfer_params(mcbsp->dma_rx_lch,
-                                        OMAP_DMA_DATA_TYPE_S16,
-                                        length >> 1, 1,
-                                        OMAP_DMA_SYNC_ELEMENT,
-                                        sync_dev, 0);
-
-        omap_set_dma_src_params(mcbsp->dma_rx_lch,
-                                src_port,
-                                OMAP_DMA_AMODE_CONSTANT,
-                                mcbsp->phys_base + OMAP_MCBSP_REG_DRR1,
-                                0, 0);
-
-        omap_set_dma_dest_params(mcbsp->dma_rx_lch,
-                                        dest_port,
-                                        OMAP_DMA_AMODE_POST_INC,
-                                        buffer,
-                                        0, 0);
-
-        omap_start_dma(mcbsp->dma_rx_lch);
-        wait_for_completion(&mcbsp->rx_dma_completion);
-
-        return 0;
-}
-EXPORT_SYMBOL(omap_mcbsp_recv_buffer);
-
-/*
- * SPI wrapper.
- * Since SPI setup is much simpler than the generic McBSP one,
- * this wrapper just need an omap_mcbsp_spi_cfg structure as an input.
- * Once this is done, you can call omap_mcbsp_start().
- */
-void omap_mcbsp_set_spi_mode(unsigned int id,
-                                const struct omap_mcbsp_spi_cfg *spi_cfg)
-{
-        struct omap_mcbsp *mcbsp;
-        struct omap_mcbsp_reg_cfg mcbsp_cfg;
-
-        if (!omap_mcbsp_check_valid_id(id)) {
-                printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
-                return;
-        }
-        mcbsp = id_to_mcbsp_ptr(id);
-
-        memset(&mcbsp_cfg, 0, sizeof(struct omap_mcbsp_reg_cfg));
-
-        /* SPI has only one frame */
-        mcbsp_cfg.rcr1 |= (RWDLEN1(spi_cfg->word_length) | RFRLEN1(0));
-        mcbsp_cfg.xcr1 |= (XWDLEN1(spi_cfg->word_length) | XFRLEN1(0));
-
-        /* Clock stop mode */
-        if (spi_cfg->clk_stp_mode == OMAP_MCBSP_CLK_STP_MODE_NO_DELAY)
-                mcbsp_cfg.spcr1 |= (1 << 12);
-        else
-                mcbsp_cfg.spcr1 |= (3 << 11);
-
-        /* Set clock parities */
-        if (spi_cfg->rx_clock_polarity == OMAP_MCBSP_CLK_RISING)
-                mcbsp_cfg.pcr0 |= CLKRP;
-        else
-                mcbsp_cfg.pcr0 &= ~CLKRP;
-
-        if (spi_cfg->tx_clock_polarity == OMAP_MCBSP_CLK_RISING)
-                mcbsp_cfg.pcr0 &= ~CLKXP;
-        else
-                mcbsp_cfg.pcr0 |= CLKXP;
-
-        /* Set SCLKME to 0 and CLKSM to 1 */
-        mcbsp_cfg.pcr0 &= ~SCLKME;
-        mcbsp_cfg.srgr2 |= CLKSM;
-
-        /* Set FSXP */
-        if (spi_cfg->fsx_polarity == OMAP_MCBSP_FS_ACTIVE_HIGH)
-                mcbsp_cfg.pcr0 &= ~FSXP;
-        else
-                mcbsp_cfg.pcr0 |= FSXP;
-
-        if (spi_cfg->spi_mode == OMAP_MCBSP_SPI_MASTER) {
-                mcbsp_cfg.pcr0 |= CLKXM;
-                mcbsp_cfg.srgr1 |= CLKGDV(spi_cfg->clk_div - 1);
-                mcbsp_cfg.pcr0 |= FSXM;
-                mcbsp_cfg.srgr2 &= ~FSGM;
-                mcbsp_cfg.xcr2 |= XDATDLY(1);
-                mcbsp_cfg.rcr2 |= RDATDLY(1);
-        } else {
-                mcbsp_cfg.pcr0 &= ~CLKXM;
-                mcbsp_cfg.srgr1 |= CLKGDV(1);
-                mcbsp_cfg.pcr0 &= ~FSXM;
-                mcbsp_cfg.xcr2 &= ~XDATDLY(3);
-                mcbsp_cfg.rcr2 &= ~RDATDLY(3);
-        }
-
-        mcbsp_cfg.xcr2 &= ~XPHASE;
-        mcbsp_cfg.rcr2 &= ~RPHASE;
-
-        omap_mcbsp_config(id, &mcbsp_cfg);
-}
-EXPORT_SYMBOL(omap_mcbsp_set_spi_mode);
-
 #ifdef CONFIG_ARCH_OMAP3
 #define max_thres(m)                    (mcbsp->pdata->buffer_size)
 #define valid_threshold(m, val)         ((val) <= max_thres(m))
@@ -1833,8 +1277,6 @@ static int __devinit omap_mcbsp_probe(struct platform_device *pdev)
         spin_lock_init(&mcbsp->lock);
         mcbsp->id = id + 1;
         mcbsp->free = true;
-        mcbsp->dma_tx_lch = -1;
-        mcbsp->dma_rx_lch = -1;
 
         res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mpu");
         if (!res) {
@@ -1860,9 +1302,6 @@ static int __devinit omap_mcbsp_probe(struct platform_device *pdev)
         else
                 mcbsp->phys_dma_base = res->start;
 
-        /* Default I/O is IRQ based */
-        mcbsp->io_type = OMAP_MCBSP_IRQ_IO;
-
         mcbsp->tx_irq = platform_get_irq_byname(pdev, "tx");
         mcbsp->rx_irq = platform_get_irq_byname(pdev, "rx");
 
diff --git a/arch/arm/plat-omap/omap_device.c b/arch/arm/plat-omap/omap_device.c
index 2526fa312b8a..3471c650743b 100644
--- a/arch/arm/plat-omap/omap_device.c
+++ b/arch/arm/plat-omap/omap_device.c
@@ -236,11 +236,6 @@ static int _omap_device_deactivate(struct omap_device *od, u8 ignore_lat)
         return 0;
 }
 
-static inline struct omap_device *_find_by_pdev(struct platform_device *pdev)
-{
-        return container_of(pdev, struct omap_device, pdev);
-}
-
 /**
  * _add_optional_clock_clkdev - Add clkdev entry for hwmod optional clocks
  * @od: struct omap_device *od
@@ -316,7 +311,7 @@ u32 omap_device_get_context_loss_count(struct platform_device *pdev)
         struct omap_device *od;
         u32 ret = 0;
 
-        od = _find_by_pdev(pdev);
+        od = to_omap_device(pdev);
 
         if (od->hwmods_cnt)
                 ret = omap_hwmod_get_context_loss_count(od->hwmods[0]);
@@ -654,7 +649,7 @@ int omap_device_enable(struct platform_device *pdev)
         int ret;
         struct omap_device *od;
 
-        od = _find_by_pdev(pdev);
+        od = to_omap_device(pdev);
 
         if (od->_state == OMAP_DEVICE_STATE_ENABLED) {
                 WARN(1, "omap_device: %s.%d: %s() called from invalid state %d\n",
@@ -693,7 +688,7 @@ int omap_device_idle(struct platform_device *pdev)
         int ret;
         struct omap_device *od;
 
-        od = _find_by_pdev(pdev);
+        od = to_omap_device(pdev);
 
         if (od->_state != OMAP_DEVICE_STATE_ENABLED) {
                 WARN(1, "omap_device: %s.%d: %s() called from invalid state %d\n",
@@ -724,7 +719,7 @@ int omap_device_shutdown(struct platform_device *pdev)
         int ret, i;
         struct omap_device *od;
 
-        od = _find_by_pdev(pdev);
+        od = to_omap_device(pdev);
 
         if (od->_state != OMAP_DEVICE_STATE_ENABLED &&
             od->_state != OMAP_DEVICE_STATE_IDLE) {
@@ -765,7 +760,7 @@ int omap_device_align_pm_lat(struct platform_device *pdev,
         int ret = -EINVAL;
         struct omap_device *od;
 
-        od = _find_by_pdev(pdev);
+        od = to_omap_device(pdev);
 
         if (new_wakeup_lat_limit == od->dev_wakeup_lat)
                 return 0;
diff --git a/arch/arm/plat-s3c24xx/clock-dclk.c b/arch/arm/plat-s3c24xx/clock-dclk.c
index cf97caafe56b..f95d3268ae1f 100644
--- a/arch/arm/plat-s3c24xx/clock-dclk.c
+++ b/arch/arm/plat-s3c24xx/clock-dclk.c
@@ -169,7 +169,6 @@ static struct clk_ops dclk_ops = {
 
 struct clk s3c24xx_dclk0 = {
         .name           = "dclk0",
-        .id             = -1,
         .ctrlbit        = S3C2410_DCLKCON_DCLK0EN,
         .enable         = s3c24xx_dclk_enable,
         .ops            = &dclk_ops,
@@ -177,7 +176,6 @@ struct clk s3c24xx_dclk0 = {
 
 struct clk s3c24xx_dclk1 = {
         .name           = "dclk1",
-        .id             = -1,
         .ctrlbit        = S3C2410_DCLKCON_DCLK1EN,
         .enable         = s3c24xx_dclk_enable,
         .ops            = &dclk_ops,
@@ -189,12 +187,10 @@ static struct clk_ops clkout_ops = {
 
 struct clk s3c24xx_clkout0 = {
         .name           = "clkout0",
-        .id             = -1,
         .ops            = &clkout_ops,
 };
 
 struct clk s3c24xx_clkout1 = {
         .name           = "clkout1",
-        .id             = -1,
         .ops            = &clkout_ops,
 };
diff --git a/arch/arm/plat-s3c24xx/devs.c b/arch/arm/plat-s3c24xx/devs.c
index 73667994518a..a76bf2df3333 100644
--- a/arch/arm/plat-s3c24xx/devs.c
+++ b/arch/arm/plat-s3c24xx/devs.c
@@ -150,9 +150,8 @@ void __init s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info *pd)
 {
         struct s3c2410fb_mach_info *npd;
 
-        npd = kmemdup(pd, sizeof(*npd), GFP_KERNEL);
+        npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_lcd);
         if (npd) {
-                s3c_device_lcd.dev.platform_data = npd;
                 npd->displays = kmemdup(pd->displays,
                         sizeof(struct s3c2410fb_display) * npd->num_displays,
                         GFP_KERNEL);
@@ -188,12 +187,10 @@ struct platform_device s3c_device_ts = {
 };
 EXPORT_SYMBOL(s3c_device_ts);
 
-static struct s3c2410_ts_mach_info s3c2410ts_info;
-
 void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *hard_s3c2410ts_info)
 {
-        memcpy(&s3c2410ts_info, hard_s3c2410ts_info, sizeof(struct s3c2410_ts_mach_info));
-        s3c_device_ts.dev.platform_data = &s3c2410ts_info;
+        s3c_set_platdata(hard_s3c2410ts_info,
+                         sizeof(struct s3c2410_ts_mach_info), &s3c_device_ts);
 }
 
 /* USB Device (Gadget)*/
@@ -223,15 +220,7 @@ EXPORT_SYMBOL(s3c_device_usbgadget);
 
 void __init s3c24xx_udc_set_platdata(struct s3c2410_udc_mach_info *pd)
 {
-        struct s3c2410_udc_mach_info *npd;
-
-        npd = kmalloc(sizeof(*npd), GFP_KERNEL);
-        if (npd) {
-                memcpy(npd, pd, sizeof(*npd));
-                s3c_device_usbgadget.dev.platform_data = npd;
-        } else {
-                printk(KERN_ERR "no memory for udc platform data\n");
-        }
+        s3c_set_platdata(pd, sizeof(*pd), &s3c_device_usbgadget);
 }
 
 /* USB High Speed 2.0 Device (Gadget) */
@@ -263,15 +252,7 @@ struct platform_device s3c_device_usb_hsudc = {
 
 void __init s3c24xx_hsudc_set_platdata(struct s3c24xx_hsudc_platdata *pd)
 {
-        struct s3c24xx_hsudc_platdata *npd;
-
-        npd = kmalloc(sizeof(*npd), GFP_KERNEL);
-        if (npd) {
-                memcpy(npd, pd, sizeof(*npd));
-                s3c_device_usb_hsudc.dev.platform_data = npd;
-        } else {
-                printk(KERN_ERR "no memory for udc platform data\n");
-        }
+        s3c_set_platdata(pd, sizeof(*pd), &s3c_device_usb_hsudc);
 }
 
 /* IIS */
@@ -383,13 +364,8 @@ EXPORT_SYMBOL(s3c_device_sdi);
 
 void __init s3c24xx_mci_set_platdata(struct s3c24xx_mci_pdata *pdata)
 {
-        struct s3c24xx_mci_pdata *npd;
-
-        npd = kmemdup(pdata, sizeof(struct s3c24xx_mci_pdata), GFP_KERNEL);
-        if (!npd)
-                printk(KERN_ERR "%s: no memory to copy pdata", __func__);
-
-        s3c_device_sdi.dev.platform_data = npd;
+        s3c_set_platdata(pdata, sizeof(struct s3c24xx_mci_pdata),
+                         &s3c_device_sdi);
 }
 
 
diff --git a/arch/arm/plat-s3c24xx/include/mach/clkdev.h b/arch/arm/plat-s3c24xx/include/mach/clkdev.h
new file mode 100644
index 000000000000..7dffa83d23ff
--- /dev/null
+++ b/arch/arm/plat-s3c24xx/include/mach/clkdev.h
@@ -0,0 +1,7 @@
+#ifndef __MACH_CLKDEV_H__
+#define __MACH_CLKDEV_H__
+
+#define __clk_get(clk) ({ 1; })
+#define __clk_put(clk) do {} while (0)
+
+#endif
diff --git a/arch/arm/plat-s3c24xx/s3c2410-clock.c b/arch/arm/plat-s3c24xx/s3c2410-clock.c
index 9ecc5d913679..def76aa3825a 100644
--- a/arch/arm/plat-s3c24xx/s3c2410-clock.c
+++ b/arch/arm/plat-s3c24xx/s3c2410-clock.c
@@ -90,37 +90,31 @@ static int s3c2410_upll_enable(struct clk *clk, int enable)
 static struct clk init_clocks_off[] = {
         {
                 .name           = "nand",
-                .id             = -1,
                 .parent         = &clk_h,
                 .enable         = s3c2410_clkcon_enable,
                 .ctrlbit        = S3C2410_CLKCON_NAND,
         }, {
                 .name           = "sdi",
-                .id             = -1,
                 .parent         = &clk_p,
                 .enable         = s3c2410_clkcon_enable,
                 .ctrlbit        = S3C2410_CLKCON_SDI,
         }, {
                 .name           = "adc",
-                .id             = -1,
                 .parent         = &clk_p,
                 .enable         = s3c2410_clkcon_enable,
                 .ctrlbit        = S3C2410_CLKCON_ADC,
         }, {
                 .name           = "i2c",
-                .id             = -1,
                 .parent         = &clk_p,
                 .enable         = s3c2410_clkcon_enable,
                 .ctrlbit        = S3C2410_CLKCON_IIC,
         }, {
                 .name           = "iis",
-                .id             = -1,
                 .parent         = &clk_p,
                 .enable         = s3c2410_clkcon_enable,
                 .ctrlbit        = S3C2410_CLKCON_IIS,
         }, {
                 .name           = "spi",
-                .id             = -1,
                 .parent         = &clk_p,
                 .enable         = s3c2410_clkcon_enable,
                 .ctrlbit        = S3C2410_CLKCON_SPI,
@@ -130,70 +124,61 @@ static struct clk init_clocks_off[] = {
 static struct clk init_clocks[] = {
         {
                 .name           = "lcd",
-                .id             = -1,
                 .parent         = &clk_h,
                 .enable         = s3c2410_clkcon_enable,
                 .ctrlbit        = S3C2410_CLKCON_LCDC,
         }, {
                 .name           = "gpio",
-                .id             = -1,
                 .parent         = &clk_p,
                 .enable         = s3c2410_clkcon_enable,
                 .ctrlbit        = S3C2410_CLKCON_GPIO,
         }, {
                 .name           = "usb-host",
-                .id             = -1,
                 .parent         = &clk_h,
                 .enable         = s3c2410_clkcon_enable,
                 .ctrlbit        = S3C2410_CLKCON_USBH,
         }, {
                 .name           = "usb-device",
-                .id             = -1,
                 .parent         = &clk_h,
                 .enable         = s3c2410_clkcon_enable,
                 .ctrlbit        = S3C2410_CLKCON_USBD,
         }, {
                 .name           = "timers",
-                .id             = -1,
                 .parent         = &clk_p,
                 .enable         = s3c2410_clkcon_enable,
                 .ctrlbit        = S3C2410_CLKCON_PWMT,
         }, {
                 .name           = "uart",
-                .id             = 0,
+                .devname        = "s3c2410-uart.0",
                 .parent         = &clk_p,
                 .enable         = s3c2410_clkcon_enable,
                 .ctrlbit        = S3C2410_CLKCON_UART0,
         }, {
                 .name           = "uart",
-                .id             = 1,
+                .devname        = "s3c2410-uart.1",
                 .parent         = &clk_p,
                 .enable         = s3c2410_clkcon_enable,
                 .ctrlbit        = S3C2410_CLKCON_UART1,
         }, {
                 .name           = "uart",
-                .id             = 2,
+                .devname        = "s3c2410-uart.2",
                 .parent         = &clk_p,
                 .enable         = s3c2410_clkcon_enable,
                 .ctrlbit        = S3C2410_CLKCON_UART2,
         }, {
                 .name           = "rtc",
-                .id             = -1,
                 .parent         = &clk_p,
                 .enable         = s3c2410_clkcon_enable,
                 .ctrlbit        = S3C2410_CLKCON_RTC,
         }, {
                 .name           = "watchdog",
-                .id             = -1,
                 .parent         = &clk_p,
                 .ctrlbit        = 0,
         }, {
                 .name           = "usb-bus-host",
-                .id             = -1,
                 .parent         = &clk_usb_bus,
         }, {
                 .name           = "usb-bus-gadget",
-                .id             = -1,
                 .parent         = &clk_usb_bus,
         },
 };
diff --git a/arch/arm/plat-s3c24xx/s3c2443-clock.c b/arch/arm/plat-s3c24xx/s3c2443-clock.c
index 82f2d4a39291..59552c0ea5fb 100644
--- a/arch/arm/plat-s3c24xx/s3c2443-clock.c
+++ b/arch/arm/plat-s3c24xx/s3c2443-clock.c
@@ -56,7 +56,6 @@ int s3c2443_clkcon_enable_s(struct clk *clk, int enable)
 struct clk clk_mpllref = {
         .name           = "mpllref",
         .parent         = &clk_xtal,
-        .id             = -1,
 };
 
 static struct clk *clk_epllref_sources[] = {
@@ -69,7 +68,6 @@ static struct clk *clk_epllref_sources[] = {
 struct clksrc_clk clk_epllref = {
         .clk    = {
                 .name           = "epllref",
-                .id             = -1,
         },
         .sources = &(struct clksrc_sources) {
                 .sources = clk_epllref_sources,
@@ -92,7 +90,6 @@ struct clksrc_clk clk_esysclk = {
         .clk    = {
                 .name           = "esysclk",
                 .parent         = &clk_epll,
-                .id             = -1,
         },
         .sources = &(struct clksrc_sources) {
                 .sources = clk_sysclk_sources,
@@ -115,7 +112,6 @@ static unsigned long s3c2443_getrate_mdivclk(struct clk *clk)
 static struct clk clk_mdivclk = {
         .name           = "mdivclk",
         .parent         = &clk_mpllref,
-        .id             = -1,
         .ops            = &(struct clk_ops) {
                 .get_rate       = s3c2443_getrate_mdivclk,
         },
@@ -132,7 +128,6 @@ struct clksrc_clk clk_msysclk = {
         .clk    = {
                 .name           = "msysclk",
                 .parent         = &clk_xtal,
-                .id             = -1,
         },
         .sources = &(struct clksrc_sources) {
                 .sources = clk_msysclk_sources,
@@ -159,7 +154,6 @@ static unsigned long s3c2443_prediv_getrate(struct clk *clk)
 
 static struct clk clk_prediv = {
         .name           = "prediv",
-        .id             = -1,
         .parent         = &clk_msysclk.clk,
         .ops            = &(struct clk_ops) {
                 .get_rate       = s3c2443_prediv_getrate,
@@ -174,7 +168,6 @@ static struct clk clk_prediv = {
 static struct clksrc_clk clk_usb_bus_host = {
         .clk    = {
                 .name           = "usb-bus-host-parent",
-                .id             = -1,
                 .parent         = &clk_esysclk.clk,
                 .ctrlbit        = S3C2443_SCLKCON_USBHOST,
                 .enable         = s3c2443_clkcon_enable_s,
@@ -189,7 +182,6 @@ static struct clksrc_clk clksrc_clks[] = {
                 /* ART baud-rate clock sourced from esysclk via a divisor */
                 .clk    = {
                         .name           = "uartclk",
-                        .id             = -1,
                         .parent         = &clk_esysclk.clk,
                 },
                 .reg_div = { .reg = S3C2443_CLKDIV1, .size = 4, .shift = 8 },
@@ -197,7 +189,6 @@ static struct clksrc_clk clksrc_clks[] = {
                 /* camera interface bus-clock, divided down from esysclk */
                 .clk    = {
                         .name           = "camif-upll", /* same as 2440 name */
-                        .id             = -1,
                         .parent         = &clk_esysclk.clk,
                         .ctrlbit        = S3C2443_SCLKCON_CAMCLK,
                         .enable         = s3c2443_clkcon_enable_s,
@@ -206,7 +197,6 @@ static struct clksrc_clk clksrc_clks[] = {
         }, {
                 .clk    = {
                         .name           = "display-if",
-                        .id             = -1,
                         .parent         = &clk_esysclk.clk,
                         .ctrlbit        = S3C2443_SCLKCON_DISPCLK,
                         .enable         = s3c2443_clkcon_enable_s,
@@ -219,13 +209,11 @@ static struct clksrc_clk clksrc_clks[] = {
 static struct clk init_clocks_off[] = {
         {
                 .name           = "adc",
-                .id             = -1,
                 .parent         = &clk_p,
                 .enable         = s3c2443_clkcon_enable_p,
                 .ctrlbit        = S3C2443_PCLKCON_ADC,
         }, {
                 .name           = "i2c",
-                .id             = -1,
                 .parent         = &clk_p,
                 .enable         = s3c2443_clkcon_enable_p,
                 .ctrlbit        = S3C2443_PCLKCON_IIC,
@@ -235,136 +223,117 @@ static struct clk init_clocks_off[] = {
 static struct clk init_clocks[] = {
         {
                 .name           = "dma",
-                .id             = 0,
                 .parent         = &clk_h,
                 .enable         = s3c2443_clkcon_enable_h,
                 .ctrlbit        = S3C2443_HCLKCON_DMA0,
         }, {
                 .name           = "dma",
-                .id             = 1,
                 .parent         = &clk_h,
                 .enable         = s3c2443_clkcon_enable_h,
                 .ctrlbit        = S3C2443_HCLKCON_DMA1,
         }, {
                 .name           = "dma",
-                .id             = 2,
                 .parent         = &clk_h,
                 .enable         = s3c2443_clkcon_enable_h,
                 .ctrlbit        = S3C2443_HCLKCON_DMA2,
         }, {
                 .name           = "dma",
-                .id             = 3,
                 .parent         = &clk_h,
                 .enable         = s3c2443_clkcon_enable_h,
                 .ctrlbit        = S3C2443_HCLKCON_DMA3,
         }, {
                 .name           = "dma",
-                .id             = 4,
                 .parent         = &clk_h,
                 .enable         = s3c2443_clkcon_enable_h,
                 .ctrlbit        = S3C2443_HCLKCON_DMA4,
         }, {
                 .name           = "dma",
-                .id             = 5,
                 .parent         = &clk_h,
                 .enable         = s3c2443_clkcon_enable_h,
                 .ctrlbit        = S3C2443_HCLKCON_DMA5,
         }, {
                 .name           = "hsmmc",
-                .id             = 1,
                 .parent         = &clk_h,
                 .enable         = s3c2443_clkcon_enable_h,
                 .ctrlbit        = S3C2443_HCLKCON_HSMMC,
         }, {
                 .name           = "gpio",
-                .id             = -1,
                 .parent         = &clk_p,
                 .enable         = s3c2443_clkcon_enable_p,
                 .ctrlbit        = S3C2443_PCLKCON_GPIO,
         }, {
                 .name           = "usb-host",
-                .id             = -1,
                 .parent         = &clk_h,
                 .enable         = s3c2443_clkcon_enable_h,
                 .ctrlbit        = S3C2443_HCLKCON_USBH,
         }, {
                 .name           = "usb-device",
-                .id             = -1,
                 .parent         = &clk_h,
                 .enable         = s3c2443_clkcon_enable_h,
                 .ctrlbit        = S3C2443_HCLKCON_USBD,
         }, {
                 .name           = "lcd",
-                .id             = -1,
                 .parent         = &clk_h,
                 .enable         = s3c2443_clkcon_enable_h,
                 .ctrlbit        = S3C2443_HCLKCON_LCDC,
 
         }, {
                 .name           = "timers",
-                .id             = -1,
                 .parent         = &clk_p,
                 .enable         = s3c2443_clkcon_enable_p,
                 .ctrlbit        = S3C2443_PCLKCON_PWMT,
         }, {
                 .name           = "cfc",
-                .id             = -1,
                 .parent         = &clk_h,
                 .enable         = s3c2443_clkcon_enable_h,
                 .ctrlbit        = S3C2443_HCLKCON_CFC,
         }, {
                 .name           = "ssmc",
-                .id             = -1,
                 .parent         = &clk_h,
                 .enable         = s3c2443_clkcon_enable_h,
                 .ctrlbit        = S3C2443_HCLKCON_SSMC,
         }, {
                 .name           = "uart",
-                .id             = 0,
+                .devname        = "s3c2440-uart.0",
                 .parent         = &clk_p,
                 .enable         = s3c2443_clkcon_enable_p,
                 .ctrlbit        = S3C2443_PCLKCON_UART0,
         }, {
                 .name           = "uart",
-                .id             = 1,
+                .devname        = "s3c2440-uart.1",
                 .parent         = &clk_p,
                 .enable         = s3c2443_clkcon_enable_p,
                 .ctrlbit        = S3C2443_PCLKCON_UART1,
         }, {
                 .name           = "uart",
-                .id             = 2,
+                .devname        = "s3c2440-uart.2",
                 .parent         = &clk_p,
                 .enable         = s3c2443_clkcon_enable_p,
                 .ctrlbit        = S3C2443_PCLKCON_UART2,
         }, {
                 .name           = "uart",
-                .id             = 3,
+                .devname        = "s3c2440-uart.3",
                 .parent         = &clk_p,
                 .enable         = s3c2443_clkcon_enable_p,
                 .ctrlbit        = S3C2443_PCLKCON_UART3,
         }, {
                 .name           = "rtc",
-                .id             = -1,
                 .parent         = &clk_p,
                 .enable         = s3c2443_clkcon_enable_p,
                 .ctrlbit        = S3C2443_PCLKCON_RTC,
         }, {
                 .name           = "watchdog",
-                .id             = -1,
                 .parent         = &clk_p,
                 .ctrlbit        = S3C2443_PCLKCON_WDT,
         }, {
                 .name           = "ac97",
-                .id             = -1,
                 .parent         = &clk_p,
                 .ctrlbit        = S3C2443_PCLKCON_AC97,
         }, {
                 .name           = "nand",
-                .id             = -1,
                 .parent         = &clk_h,
         }, {
                 .name           = "usb-bus-host",
-                .id             = -1,
                 .parent         = &clk_usb_bus_host.clk,
         }
 };
diff --git a/arch/arm/plat-s5p/clock.c b/arch/arm/plat-s5p/clock.c
index 8d081d968c58..02af235298e2 100644
--- a/arch/arm/plat-s5p/clock.c
+++ b/arch/arm/plat-s5p/clock.c
@@ -168,6 +168,41 @@ unsigned long s5p_epll_get_rate(struct clk *clk)
         return clk->rate;
 }
 
+int s5p_spdif_set_rate(struct clk *clk, unsigned long rate)
+{
+        struct clk *pclk;
+        int ret;
+
+        pclk = clk_get_parent(clk);
+        if (IS_ERR(pclk))
+                return -EINVAL;
+
+        ret = pclk->ops->set_rate(pclk, rate);
+        clk_put(pclk);
+
+        return ret;
+}
+
+unsigned long s5p_spdif_get_rate(struct clk *clk)
+{
+        struct clk *pclk;
+        int rate;
+
+        pclk = clk_get_parent(clk);
+        if (IS_ERR(pclk))
+                return -EINVAL;
+
+        rate = pclk->ops->get_rate(clk);
+        clk_put(pclk);
+
+        return rate;
+}
+
+struct clk_ops s5p_sclk_spdif_ops = {
+        .set_rate       = s5p_spdif_set_rate,
+        .get_rate       = s5p_spdif_get_rate,
+};
+
 static struct clk *s5p_clks[] __initdata = {
         &clk_ext_xtal_mux,
         &clk_48m,
diff --git a/arch/arm/plat-s5p/include/plat/s5p-clock.h b/arch/arm/plat-s5p/include/plat/s5p-clock.h
index 2b6dcff8ab2b..769b5bdfb046 100644
--- a/arch/arm/plat-s5p/include/plat/s5p-clock.h
+++ b/arch/arm/plat-s5p/include/plat/s5p-clock.h
@@ -47,4 +47,9 @@ extern int s5p_gatectrl(void __iomem *reg, struct clk *clk, int enable);
 extern int s5p_epll_enable(struct clk *clk, int enable);
 extern unsigned long s5p_epll_get_rate(struct clk *clk);
 
+/* SPDIF clk operations common for S5PC100/V210/C110 and Exynos4 */
+extern int s5p_spdif_set_rate(struct clk *clk, unsigned long rate);
+extern unsigned long s5p_spdif_get_rate(struct clk *clk);
+
+extern struct clk_ops s5p_sclk_spdif_ops;
 #endif /* __ASM_PLAT_S5P_CLOCK_H */
diff --git a/arch/arm/plat-s5p/s5p-time.c b/arch/arm/plat-s5p/s5p-time.c
index 612934c48b0d..c833e7b57599 100644
--- a/arch/arm/plat-s5p/s5p-time.c
+++ b/arch/arm/plat-s5p/s5p-time.c
@@ -314,13 +314,6 @@ static void __iomem *s5p_timer_reg(void)
         return S3C_TIMERREG(offset);
 }
 
-static cycle_t s5p_timer_read(struct clocksource *cs)
-{
-        void __iomem *reg = s5p_timer_reg();
-
-        return (cycle_t) (reg ? ~__raw_readl(reg) : 0);
-}
-
 /*
  * Override the global weak sched_clock symbol with this
  * local implementation which uses the clocksource to get some
@@ -350,14 +343,6 @@ static void notrace s5p_update_sched_clock(void)
         update_sched_clock(&cd, ~__raw_readl(reg), (u32)~0);
 }
 
-struct clocksource time_clocksource = {
-        .name           = "s5p_clocksource_timer",
-        .rating         = 250,
-        .read           = s5p_timer_read,
-        .mask           = CLOCKSOURCE_MASK(32),
-        .flags          = CLOCK_SOURCE_IS_CONTINUOUS,
-};
-
 static void __init s5p_clocksource_init(void)
 {
         unsigned long pclk;
@@ -375,8 +360,9 @@ static void __init s5p_clocksource_init(void)
 
         init_sched_clock(&cd, s5p_update_sched_clock, 32, clock_rate);
 
-        if (clocksource_register_hz(&time_clocksource, clock_rate))
-                panic("%s: can't register clocksource\n", time_clocksource.name);
+        if (clocksource_mmio_init(s5p_timer_reg(), "s5p_clocksource_timer",
+                        clock_rate, 250, 32, clocksource_mmio_readl_down))
+                panic("s5p_clocksource_timer: can't register clocksource\n");
 }
 
 static void __init s5p_timer_resources(void)
@@ -384,6 +370,7 @@ static void __init s5p_timer_resources(void)
 
         unsigned long event_id = timer_source.event_id;
         unsigned long source_id = timer_source.source_id;
+        char devname[15];
 
         timerclk = clk_get(NULL, "timers");
         if (IS_ERR(timerclk))
@@ -391,6 +378,10 @@ static void __init s5p_timer_resources(void)
 
         clk_enable(timerclk);
 
+        sprintf(devname, "s3c24xx-pwm.%lu", event_id);
+        s3c_device_timer[event_id].id = event_id;
+        s3c_device_timer[event_id].dev.init_name = devname;
+
         tin_event = clk_get(&s3c_device_timer[event_id].dev, "pwm-tin");
         if (IS_ERR(tin_event))
                 panic("failed to get pwm-tin clock for event timer");
@@ -401,6 +392,10 @@ static void __init s5p_timer_resources(void)
 
         clk_enable(tin_event);
 
+        sprintf(devname, "s3c24xx-pwm.%lu", source_id);
+        s3c_device_timer[source_id].id = source_id;
+        s3c_device_timer[source_id].dev.init_name = devname;
+
         tin_source = clk_get(&s3c_device_timer[source_id].dev, "pwm-tin");
         if (IS_ERR(tin_source))
                 panic("failed to get pwm-tin clock for source timer");
diff --git a/arch/arm/plat-samsung/Kconfig b/arch/arm/plat-samsung/Kconfig
index 4d79519d19a4..b3e10659e4b8 100644
--- a/arch/arm/plat-samsung/Kconfig
+++ b/arch/arm/plat-samsung/Kconfig
@@ -280,6 +280,12 @@ config SAMSUNG_DEV_PWM
         help
           Compile in platform device definition for PWM Timer
 
+config SAMSUNG_DEV_BACKLIGHT
+        bool
+        depends on SAMSUNG_DEV_PWM
+        help
+          Compile in platform device definition LCD backlight with PWM Timer
+
 config S3C24XX_PWM
         bool "PWM device support"
         select HAVE_PWM
diff --git a/arch/arm/plat-samsung/Makefile b/arch/arm/plat-samsung/Makefile
index 53eb15b0a07d..853764ba8cc5 100644
--- a/arch/arm/plat-samsung/Makefile
+++ b/arch/arm/plat-samsung/Makefile
@@ -59,6 +59,7 @@ obj-$(CONFIG_SAMSUNG_DEV_IDE)	+= dev-ide.o
 obj-$(CONFIG_SAMSUNG_DEV_TS)    += dev-ts.o
 obj-$(CONFIG_SAMSUNG_DEV_KEYPAD)        += dev-keypad.o
 obj-$(CONFIG_SAMSUNG_DEV_PWM)   += dev-pwm.o
+obj-$(CONFIG_SAMSUNG_DEV_BACKLIGHT)     += dev-backlight.o
 
 # DMA support
 
diff --git a/arch/arm/plat-samsung/clock.c b/arch/arm/plat-samsung/clock.c
index 0c9f95d98561..302c42670bd1 100644
--- a/arch/arm/plat-samsung/clock.c
+++ b/arch/arm/plat-samsung/clock.c
@@ -71,74 +71,6 @@ static int clk_null_enable(struct clk *clk, int enable)
         return 0;
 }
 
-static int dev_is_s3c_uart(struct device *dev)
-{
-        struct platform_device **pdev = s3c24xx_uart_devs;
-        int i;
-        for (i = 0; i < ARRAY_SIZE(s3c24xx_uart_devs); i++, pdev++)
-                if (*pdev && dev == &(*pdev)->dev)
-                        return 1;
-        return 0;
-}
-
-/*
- * Serial drivers call get_clock() very early, before platform bus
- * has been set up, this requires a special check to let them get
- * a proper clock
- */
-
-static int dev_is_platform_device(struct device *dev)
-{
-        return dev->bus == &platform_bus_type ||
-               (dev->bus == NULL && dev_is_s3c_uart(dev));
-}
-
-/* Clock API calls */
-
-struct clk *clk_get(struct device *dev, const char *id)
-{
-        struct clk *p;
-        struct clk *clk = ERR_PTR(-ENOENT);
-        int idno;
-
-        if (dev == NULL || !dev_is_platform_device(dev))
-                idno = -1;
-        else
-                idno = to_platform_device(dev)->id;
-
-        spin_lock(&clocks_lock);
-
-        list_for_each_entry(p, &clocks, list) {
-                if (p->id == idno &&
-                    strcmp(id, p->name) == 0 &&
-                    try_module_get(p->owner)) {
-                        clk = p;
-                        break;
-                }
-        }
-
-        /* check for the case where a device was supplied, but the
-         * clock that was being searched for is not device specific */
-
-        if (IS_ERR(clk)) {
-                list_for_each_entry(p, &clocks, list) {
-                        if (p->id == -1 && strcmp(id, p->name) == 0 &&
-                            try_module_get(p->owner)) {
-                                clk = p;
-                                break;
-                        }
-                }
-        }
-
-        spin_unlock(&clocks_lock);
-        return clk;
-}
-
-void clk_put(struct clk *clk)
-{
-        module_put(clk->owner);
-}
-
 int clk_enable(struct clk *clk)
 {
         if (IS_ERR(clk) || clk == NULL)
@@ -241,8 +173,6 @@ int clk_set_parent(struct clk *clk, struct clk *parent)
         return ret;
 }
 
-EXPORT_SYMBOL(clk_get);
-EXPORT_SYMBOL(clk_put);
 EXPORT_SYMBOL(clk_enable);
 EXPORT_SYMBOL(clk_disable);
 EXPORT_SYMBOL(clk_get_rate);
@@ -265,7 +195,6 @@ struct clk_ops clk_ops_def_setrate = {
 
 struct clk clk_xtal = {
         .name           = "xtal",
-        .id             = -1,
         .rate           = 0,
         .parent         = NULL,
         .ctrlbit        = 0,
@@ -273,30 +202,25 @@ struct clk clk_xtal = {
 
 struct clk clk_ext = {
         .name           = "ext",
-        .id             = -1,
 };
 
 struct clk clk_epll = {
         .name           = "epll",
-        .id             = -1,
 };
 
 struct clk clk_mpll = {
         .name           = "mpll",
-        .id             = -1,
         .ops            = &clk_ops_def_setrate,
 };
 
 struct clk clk_upll = {
         .name           = "upll",
-        .id             = -1,
         .parent         = NULL,
         .ctrlbit        = 0,
 };
 
 struct clk clk_f = {
         .name           = "fclk",
-        .id             = -1,
         .rate           = 0,
         .parent         = &clk_mpll,
         .ctrlbit        = 0,
@@ -304,7 +228,6 @@ struct clk clk_f = {
 
 struct clk clk_h = {
         .name           = "hclk",
-        .id             = -1,
         .rate           = 0,
         .parent         = NULL,
         .ctrlbit        = 0,
@@ -313,7 +236,6 @@ struct clk clk_h = {
 
 struct clk clk_p = {
         .name           = "pclk",
-        .id             = -1,
         .rate           = 0,
         .parent         = NULL,
         .ctrlbit        = 0,
@@ -322,7 +244,6 @@ struct clk clk_p = {
 
 struct clk clk_usb_bus = {
         .name           = "usb-bus",
-        .id             = -1,
         .rate           = 0,
         .parent         = &clk_upll,
 };
@@ -330,7 +251,6 @@ struct clk clk_usb_bus = {
 
 struct clk s3c24xx_uclk = {
         .name           = "uclk",
-        .id             = -1,
 };
 
 /* initialise the clock system */
@@ -346,14 +266,11 @@ int s3c24xx_register_clock(struct clk *clk)
         if (clk->enable == NULL)
                 clk->enable = clk_null_enable;
 
-        /* add to the list of available clocks */
-
-        /* Quick check to see if this clock has already been registered. */
-        BUG_ON(clk->list.prev != clk->list.next);
-
-        spin_lock(&clocks_lock);
-        list_add(&clk->list, &clocks);
-        spin_unlock(&clocks_lock);
+        /* fill up the clk_lookup structure and register it*/
+        clk->lookup.dev_id = clk->devname;
+        clk->lookup.con_id = clk->name;
+        clk->lookup.clk = clk;
+        clkdev_add(&clk->lookup);
 
         return 0;
 }
@@ -463,10 +380,7 @@ static int clk_debugfs_register_one(struct clk *c)
         char s[255];
         char *p = s;
 
-        p += sprintf(p, "%s", c->name);
-
-        if (c->id >= 0)
-                sprintf(p, ":%d", c->id);
+        p += sprintf(p, "%s", c->devname);
 
         d = debugfs_create_dir(s, pa ? pa->dent : clk_debugfs_root);
         if (!d)
diff --git a/arch/arm/plat-samsung/dev-backlight.c b/arch/arm/plat-samsung/dev-backlight.c
new file mode 100644
index 000000000000..3cedd4c407af
--- /dev/null
+++ b/arch/arm/plat-samsung/dev-backlight.c
@@ -0,0 +1,149 @@
+/* linux/arch/arm/plat-samsung/dev-backlight.c
+ *
+ * Copyright (c) 2011 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com
+ *
+ * Common infrastructure for PWM Backlight for Samsung boards
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/gpio.h>
+#include <linux/platform_device.h>
+#include <linux/io.h>
+#include <linux/pwm_backlight.h>
+
+#include <plat/devs.h>
+#include <plat/gpio-cfg.h>
+#include <plat/backlight.h>
+
+static int samsung_bl_init(struct device *dev)
+{
+        int ret = 0;
+        struct platform_device *timer_dev =
+                        container_of(dev->parent, struct platform_device, dev);
+        struct samsung_bl_gpio_info *bl_gpio_info =
+                        timer_dev->dev.platform_data;
+
+        ret = gpio_request(bl_gpio_info->no, "Backlight");
+        if (ret) {
+                printk(KERN_ERR "failed to request GPIO for LCD Backlight\n");
+                return ret;
+        }
+
+        /* Configure GPIO pin with specific GPIO function for PWM timer */
+        s3c_gpio_cfgpin(bl_gpio_info->no, bl_gpio_info->func);
+
+        return 0;
+}
+
+static void samsung_bl_exit(struct device *dev)
+{
+        struct platform_device *timer_dev =
+                        container_of(dev->parent, struct platform_device, dev);
+        struct samsung_bl_gpio_info *bl_gpio_info =
+                        timer_dev->dev.platform_data;
+
+        s3c_gpio_cfgpin(bl_gpio_info->no, S3C_GPIO_OUTPUT);
+        gpio_free(bl_gpio_info->no);
+}
+
+/* Initialize few important fields of platform_pwm_backlight_data
+ * structure with default values. These fields can be overridden by
+ * board-specific values sent from machine file.
+ * For ease of operation, these fields are initialized with values
+ * used by most samsung boards.
+ * Users has the option of sending info about other parameters
+ * for their specific boards
+ */
+
+static struct platform_pwm_backlight_data samsung_dfl_bl_data __initdata = {
+        .max_brightness = 255,
+        .dft_brightness = 255,
+        .pwm_period_ns  = 78770,
+        .init           = samsung_bl_init,
+        .exit           = samsung_bl_exit,
+};
+
+static struct platform_device samsung_dfl_bl_device __initdata = {
+        .name           = "pwm-backlight",
+};
+
+/* samsung_bl_set - Set board specific data (if any) provided by user for
+ * PWM Backlight control and register specific PWM and backlight device.
+ * @gpio_info:  structure containing GPIO info for PWM timer
+ * @bl_data:    structure containing Backlight control data
+ */
+void samsung_bl_set(struct samsung_bl_gpio_info *gpio_info,
+        struct platform_pwm_backlight_data *bl_data)
+{
+        int ret = 0;
+        struct platform_device *samsung_bl_device;
+        struct platform_pwm_backlight_data *samsung_bl_data;
+
+        samsung_bl_device = kmemdup(&samsung_dfl_bl_device,
+                        sizeof(struct platform_device), GFP_KERNEL);
+        if (!samsung_bl_device) {
+                printk(KERN_ERR "%s: no memory for platform dev\n", __func__);
+                return;
+        }
+
+        samsung_bl_data = s3c_set_platdata(&samsung_dfl_bl_data,
+                sizeof(struct platform_pwm_backlight_data), samsung_bl_device);
+        if (!samsung_bl_data) {
+                printk(KERN_ERR "%s: no memory for platform dev\n", __func__);
+                goto err_data;
+        }
+
+        /* Copy board specific data provided by user */
+        samsung_bl_data->pwm_id = bl_data->pwm_id;
+        samsung_bl_device->dev.parent =
+                        &s3c_device_timer[samsung_bl_data->pwm_id].dev;
+
+        if (bl_data->max_brightness)
+                samsung_bl_data->max_brightness = bl_data->max_brightness;
+        if (bl_data->dft_brightness)
+                samsung_bl_data->dft_brightness = bl_data->dft_brightness;
+        if (bl_data->lth_brightness)
+                samsung_bl_data->lth_brightness = bl_data->lth_brightness;
+        if (bl_data->pwm_period_ns)
+                samsung_bl_data->pwm_period_ns = bl_data->pwm_period_ns;
+        if (bl_data->init)
+                samsung_bl_data->init = bl_data->init;
+        if (bl_data->notify)
+                samsung_bl_data->notify = bl_data->notify;
+        if (bl_data->exit)
+                samsung_bl_data->exit = bl_data->exit;
+        if (bl_data->check_fb)
+                samsung_bl_data->check_fb = bl_data->check_fb;
+
+        /* Keep the GPIO info for future use */
+        s3c_device_timer[samsung_bl_data->pwm_id].dev.platform_data = gpio_info;
+
+        /* Register the specific PWM timer dev for Backlight control */
+        ret = platform_device_register(
+                        &s3c_device_timer[samsung_bl_data->pwm_id]);
+        if (ret) {
+                printk(KERN_ERR "failed to register pwm timer for backlight: %d\n", ret);
+                goto err_plat_reg1;
+        }
+
+        /* Register the Backlight dev */
+        ret = platform_device_register(samsung_bl_device);
+        if (ret) {
+                printk(KERN_ERR "failed to register backlight device: %d\n", ret);
+                goto err_plat_reg2;
+        }
+
+        return;
+
+err_plat_reg2:
+        platform_device_unregister(&s3c_device_timer[samsung_bl_data->pwm_id]);
+err_plat_reg1:
+        kfree(samsung_bl_data);
+err_data:
+        kfree(samsung_bl_device);
+        return;
+}
diff --git a/arch/arm/plat-samsung/dev-fb.c b/arch/arm/plat-samsung/dev-fb.c
index bf60204c6297..49a1362fd25b 100644
--- a/arch/arm/plat-samsung/dev-fb.c
+++ b/arch/arm/plat-samsung/dev-fb.c
@@ -58,16 +58,6 @@ struct platform_device s3c_device_fb = {
 
 void __init s3c_fb_set_platdata(struct s3c_fb_platdata *pd)
 {
-        struct s3c_fb_platdata *npd;
-
-        if (!pd) {
-                printk(KERN_ERR "%s: no platform data\n", __func__);
-                return;
-        }
-
-        npd = kmemdup(pd, sizeof(struct s3c_fb_platdata), GFP_KERNEL);
-        if (!npd)
-                printk(KERN_ERR "%s: no memory for platform data\n", __func__);
-
-        s3c_device_fb.dev.platform_data = npd;
+        s3c_set_platdata(pd, sizeof(struct s3c_fb_platdata),
+                         &s3c_device_fb);
 }
diff --git a/arch/arm/plat-samsung/dev-hwmon.c b/arch/arm/plat-samsung/dev-hwmon.c
index b3ffb9587250..c91a79ce8f39 100644
--- a/arch/arm/plat-samsung/dev-hwmon.c
+++ b/arch/arm/plat-samsung/dev-hwmon.c
@@ -27,16 +27,6 @@ struct platform_device s3c_device_hwmon = {
 
 void __init s3c_hwmon_set_platdata(struct s3c_hwmon_pdata *pd)
 {
-        struct s3c_hwmon_pdata *npd;
-
-        if (!pd) {
-                printk(KERN_ERR "%s: no platform data\n", __func__);
-                return;
-        }
-
-        npd = kmemdup(pd, sizeof(struct s3c_hwmon_pdata), GFP_KERNEL);
-        if (!npd)
-                printk(KERN_ERR "%s: no memory for platform data\n", __func__);
-
-        s3c_device_hwmon.dev.platform_data = npd;
+        s3c_set_platdata(pd, sizeof(struct s3c_hwmon_pdata),
+                         &s3c_device_hwmon);
 }
diff --git a/arch/arm/plat-samsung/dev-i2c0.c b/arch/arm/plat-samsung/dev-i2c0.c
index 3a601c16f03c..f8251f5098bd 100644
--- a/arch/arm/plat-samsung/dev-i2c0.c
+++ b/arch/arm/plat-samsung/dev-i2c0.c
@@ -48,7 +48,7 @@ struct platform_device s3c_device_i2c0 = {
         .resource         = s3c_i2c_resource,
 };
 
-static struct s3c2410_platform_i2c default_i2c_data0 __initdata = {
+struct s3c2410_platform_i2c default_i2c_data __initdata = {
         .flags          = 0,
         .slave_addr     = 0x10,
         .frequency      = 100*1000,
@@ -60,13 +60,11 @@ void __init s3c_i2c0_set_platdata(struct s3c2410_platform_i2c *pd)
         struct s3c2410_platform_i2c *npd;
 
         if (!pd)
-                pd = &default_i2c_data0;
+                pd = &default_i2c_data;
 
-        npd = kmemdup(pd, sizeof(struct s3c2410_platform_i2c), GFP_KERNEL);
-        if (!npd)
-                printk(KERN_ERR "%s: no memory for platform data\n", __func__);
-        else if (!npd->cfg_gpio)
-                npd->cfg_gpio = s3c_i2c0_cfg_gpio;
+        npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
+                               &s3c_device_i2c0);
 
-        s3c_device_i2c0.dev.platform_data = npd;
+        if (!npd->cfg_gpio)
+                npd->cfg_gpio = s3c_i2c0_cfg_gpio;
 }
diff --git a/arch/arm/plat-samsung/dev-i2c1.c b/arch/arm/plat-samsung/dev-i2c1.c
index 858ee2a0414c..3b7c7bec1cf9 100644
--- a/arch/arm/plat-samsung/dev-i2c1.c
+++ b/arch/arm/plat-samsung/dev-i2c1.c
@@ -44,26 +44,18 @@ struct platform_device s3c_device_i2c1 = {
         .resource         = s3c_i2c_resource,
 };
 
-static struct s3c2410_platform_i2c default_i2c_data1 __initdata = {
-        .flags          = 0,
-        .bus_num        = 1,
-        .slave_addr     = 0x10,
-        .frequency      = 100*1000,
-        .sda_delay      = 100,
-};
-
 void __init s3c_i2c1_set_platdata(struct s3c2410_platform_i2c *pd)
 {
         struct s3c2410_platform_i2c *npd;
 
-        if (!pd)
-                pd = &default_i2c_data1;
+        if (!pd) {
+                pd = &default_i2c_data;
+                pd->bus_num = 1;
+        }
 
-        npd = kmemdup(pd, sizeof(struct s3c2410_platform_i2c), GFP_KERNEL);
-        if (!npd)
-                printk(KERN_ERR "%s: no memory for platform data\n", __func__);
-        else if (!npd->cfg_gpio)
-                npd->cfg_gpio = s3c_i2c1_cfg_gpio;
+        npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
+                               &s3c_device_i2c1);
 
-        s3c_device_i2c1.dev.platform_data = npd;
+        if (!npd->cfg_gpio)
+                npd->cfg_gpio = s3c_i2c1_cfg_gpio;
 }
diff --git a/arch/arm/plat-samsung/dev-i2c2.c b/arch/arm/plat-samsung/dev-i2c2.c
index ff4ba69b6830..07e9fd0b1b8b 100644
--- a/arch/arm/plat-samsung/dev-i2c2.c
+++ b/arch/arm/plat-samsung/dev-i2c2.c
@@ -45,26 +45,18 @@ struct platform_device s3c_device_i2c2 = {
         .resource         = s3c_i2c_resource,
 };
 
-static struct s3c2410_platform_i2c default_i2c_data2 __initdata = {
-        .flags          = 0,
-        .bus_num        = 2,
-        .slave_addr     = 0x10,
-        .frequency      = 100*1000,
-        .sda_delay      = 100,
-};
-
 void __init s3c_i2c2_set_platdata(struct s3c2410_platform_i2c *pd)
 {
         struct s3c2410_platform_i2c *npd;
 
-        if (!pd)
-                pd = &default_i2c_data2;
+        if (!pd) {
+                pd = &default_i2c_data;
+                pd->bus_num = 2;
+        }
 
-        npd = kmemdup(pd, sizeof(struct s3c2410_platform_i2c), GFP_KERNEL);
-        if (!npd)
-                printk(KERN_ERR "%s: no memory for platform data\n", __func__);
-        else if (!npd->cfg_gpio)
-                npd->cfg_gpio = s3c_i2c2_cfg_gpio;
+        npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
+                               &s3c_device_i2c2);
 
-        s3c_device_i2c2.dev.platform_data = npd;
+        if (!npd->cfg_gpio)
+                npd->cfg_gpio = s3c_i2c2_cfg_gpio;
 }
diff --git a/arch/arm/plat-samsung/dev-i2c3.c b/arch/arm/plat-samsung/dev-i2c3.c
index 8586a10014b7..d48efa93c6e7 100644
--- a/arch/arm/plat-samsung/dev-i2c3.c
+++ b/arch/arm/plat-samsung/dev-i2c3.c
@@ -43,26 +43,18 @@ struct platform_device s3c_device_i2c3 = {
         .resource       = s3c_i2c_resource,
 };
 
-static struct s3c2410_platform_i2c default_i2c_data3 __initdata = {
-        .flags          = 0,
-        .bus_num        = 3,
-        .slave_addr     = 0x10,
-        .frequency      = 100*1000,
-        .sda_delay      = 100,
-};
-
 void __init s3c_i2c3_set_platdata(struct s3c2410_platform_i2c *pd)
 {
         struct s3c2410_platform_i2c *npd;
 
-        if (!pd)
-                pd = &default_i2c_data3;
+        if (!pd) {
+                pd = &default_i2c_data;
+                pd->bus_num = 3;
+        }
 
-        npd = kmemdup(pd, sizeof(struct s3c2410_platform_i2c), GFP_KERNEL);
-        if (!npd)
-                printk(KERN_ERR "%s: no memory for platform data\n", __func__);
-        else if (!npd->cfg_gpio)
-                npd->cfg_gpio = s3c_i2c3_cfg_gpio;
+        npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
+                               &s3c_device_i2c3);
 
-        s3c_device_i2c3.dev.platform_data = npd;
+        if (!npd->cfg_gpio)
+                npd->cfg_gpio = s3c_i2c3_cfg_gpio;
 }
diff --git a/arch/arm/plat-samsung/dev-i2c4.c b/arch/arm/plat-samsung/dev-i2c4.c
index df2159e2daa6..07e26444efe6 100644
--- a/arch/arm/plat-samsung/dev-i2c4.c
+++ b/arch/arm/plat-samsung/dev-i2c4.c
@@ -43,26 +43,18 @@ struct platform_device s3c_device_i2c4 = {
         .resource       = s3c_i2c_resource,
 };
 
-static struct s3c2410_platform_i2c default_i2c_data4 __initdata = {
-        .flags          = 0,
-        .bus_num        = 4,
-        .slave_addr     = 0x10,
-        .frequency      = 100*1000,
-        .sda_delay      = 100,
-};
-
 void __init s3c_i2c4_set_platdata(struct s3c2410_platform_i2c *pd)
 {
         struct s3c2410_platform_i2c *npd;
 
-        if (!pd)
-                pd = &default_i2c_data4;
+        if (!pd) {
+                pd = &default_i2c_data;
+                pd->bus_num = 4;
+        }
 
-        npd = kmemdup(pd, sizeof(struct s3c2410_platform_i2c), GFP_KERNEL);
-        if (!npd)
-                printk(KERN_ERR "%s: no memory for platform data\n", __func__);
-        else if (!npd->cfg_gpio)
-                npd->cfg_gpio = s3c_i2c4_cfg_gpio;
+        npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
+                               &s3c_device_i2c4);
 
-        s3c_device_i2c4.dev.platform_data = npd;
+        if (!npd->cfg_gpio)
+                npd->cfg_gpio = s3c_i2c4_cfg_gpio;
 }
diff --git a/arch/arm/plat-samsung/dev-i2c5.c b/arch/arm/plat-samsung/dev-i2c5.c
index 0499c2c3877b..f49655784563 100644
--- a/arch/arm/plat-samsung/dev-i2c5.c
+++ b/arch/arm/plat-samsung/dev-i2c5.c
@@ -43,26 +43,18 @@ struct platform_device s3c_device_i2c5 = {
         .resource       = s3c_i2c_resource,
 };
 
-static struct s3c2410_platform_i2c default_i2c_data5 __initdata = {
-        .flags          = 0,
-        .bus_num        = 5,
-        .slave_addr     = 0x10,
-        .frequency      = 100*1000,
-        .sda_delay      = 100,
-};
-
 void __init s3c_i2c5_set_platdata(struct s3c2410_platform_i2c *pd)
 {
         struct s3c2410_platform_i2c *npd;
 
-        if (!pd)
-                pd = &default_i2c_data5;
+        if (!pd) {
+                pd = &default_i2c_data;
+                pd->bus_num = 5;
+        }
 
-        npd = kmemdup(pd, sizeof(struct s3c2410_platform_i2c), GFP_KERNEL);
-        if (!npd)
-                printk(KERN_ERR "%s: no memory for platform data\n", __func__);
-        else if (!npd->cfg_gpio)
-                npd->cfg_gpio = s3c_i2c5_cfg_gpio;
+        npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
+                               &s3c_device_i2c5);
 
-        s3c_device_i2c5.dev.platform_data = npd;
+        if (!npd->cfg_gpio)
+                npd->cfg_gpio = s3c_i2c5_cfg_gpio;
 }
diff --git a/arch/arm/plat-samsung/dev-i2c6.c b/arch/arm/plat-samsung/dev-i2c6.c
index 4083108908a8..141d799944e2 100644
--- a/arch/arm/plat-samsung/dev-i2c6.c
+++ b/arch/arm/plat-samsung/dev-i2c6.c
@@ -43,26 +43,18 @@ struct platform_device s3c_device_i2c6 = {
         .resource       = s3c_i2c_resource,
 };
 
-static struct s3c2410_platform_i2c default_i2c_data6 __initdata = {
-        .flags          = 0,
-        .bus_num        = 6,
-        .slave_addr     = 0x10,
-        .frequency      = 100*1000,
-        .sda_delay      = 100,
-};
-
 void __init s3c_i2c6_set_platdata(struct s3c2410_platform_i2c *pd)
 {
         struct s3c2410_platform_i2c *npd;
 
-        if (!pd)
-                pd = &default_i2c_data6;
+        if (!pd) {
+                pd = &default_i2c_data;
+                pd->bus_num = 6;
+        }
 
-        npd = kmemdup(pd, sizeof(struct s3c2410_platform_i2c), GFP_KERNEL);
-        if (!npd)
-                printk(KERN_ERR "%s: no memory for platform data\n", __func__);
-        else if (!npd->cfg_gpio)
-                npd->cfg_gpio = s3c_i2c6_cfg_gpio;
+        npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
+                               &s3c_device_i2c6);
 
-        s3c_device_i2c6.dev.platform_data = npd;
+        if (!npd->cfg_gpio)
+                npd->cfg_gpio = s3c_i2c6_cfg_gpio;
 }
diff --git a/arch/arm/plat-samsung/dev-i2c7.c b/arch/arm/plat-samsung/dev-i2c7.c
index 1182451d7dce..9dddcd1665b5 100644
--- a/arch/arm/plat-samsung/dev-i2c7.c
+++ b/arch/arm/plat-samsung/dev-i2c7.c
@@ -43,26 +43,18 @@ struct platform_device s3c_device_i2c7 = {
         .resource       = s3c_i2c_resource,
 };
 
-static struct s3c2410_platform_i2c default_i2c_data7 __initdata = {
-        .flags          = 0,
-        .bus_num        = 7,
-        .slave_addr     = 0x10,
-        .frequency      = 100*1000,
-        .sda_delay      = 100,
-};
-
 void __init s3c_i2c7_set_platdata(struct s3c2410_platform_i2c *pd)
 {
         struct s3c2410_platform_i2c *npd;
 
-        if (!pd)
-                pd = &default_i2c_data7;
+        if (!pd) {
+                pd = &default_i2c_data;
+                pd->bus_num = 7;
+        }
 
-        npd = kmemdup(pd, sizeof(struct s3c2410_platform_i2c), GFP_KERNEL);
-        if (!npd)
-                printk(KERN_ERR "%s: no memory for platform data\n", __func__);
-        else if (!npd->cfg_gpio)
-                npd->cfg_gpio = s3c_i2c7_cfg_gpio;
+        npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
+                               &s3c_device_i2c7);
 
-        s3c_device_i2c7.dev.platform_data = npd;
+        if (!npd->cfg_gpio)
+                npd->cfg_gpio = s3c_i2c7_cfg_gpio;
 }
diff --git a/arch/arm/plat-samsung/dev-nand.c b/arch/arm/plat-samsung/dev-nand.c
index 6927ae8fd118..b8e30ec6ac26 100644
--- a/arch/arm/plat-samsung/dev-nand.c
+++ b/arch/arm/plat-samsung/dev-nand.c
@@ -91,11 +91,10 @@ void __init s3c_nand_set_platdata(struct s3c2410_platform_nand *nand)
          * time then there is little chance the system is going to run.
          */ 
 
-        npd = kmemdup(nand, sizeof(struct s3c2410_platform_nand), GFP_KERNEL);
-        if (!npd) {
-                printk(KERN_ERR "%s: failed copying platform data\n", __func__);
+        npd = s3c_set_platdata(nand, sizeof(struct s3c2410_platform_nand),
+                                &s3c_device_nand);
+        if (!npd)
                 return;
-        }
 
         /* now see if we need to copy any of the nand set data */
 
@@ -123,6 +122,4 @@ void __init s3c_nand_set_platdata(struct s3c2410_platform_nand *nand)
                         to++;
                 }
         }
-
-        s3c_device_nand.dev.platform_data = npd;
 }
diff --git a/arch/arm/plat-samsung/dev-ts.c b/arch/arm/plat-samsung/dev-ts.c
index 3e4bd8147bf4..82543f0248ac 100644
--- a/arch/arm/plat-samsung/dev-ts.c
+++ b/arch/arm/plat-samsung/dev-ts.c
@@ -45,16 +45,6 @@ struct platform_device s3c_device_ts = {
 
 void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *pd)
 {
-        struct s3c2410_ts_mach_info *npd;
-
-        if (!pd) {
-                printk(KERN_ERR "%s: no platform data\n", __func__);
-                return;
-        }
-
-        npd = kmemdup(pd, sizeof(struct s3c2410_ts_mach_info), GFP_KERNEL);
-        if (!npd)
-                printk(KERN_ERR "%s: no memory for platform data\n", __func__);
-
-        s3c_device_ts.dev.platform_data = npd;
+        s3c_set_platdata(pd, sizeof(struct s3c2410_ts_mach_info),
+                         &s3c_device_ts);
 }
diff --git a/arch/arm/plat-samsung/dev-usb.c b/arch/arm/plat-samsung/dev-usb.c
index 0e0a3bf5c982..33fbaa967700 100644
--- a/arch/arm/plat-samsung/dev-usb.c
+++ b/arch/arm/plat-samsung/dev-usb.c
@@ -60,11 +60,6 @@ EXPORT_SYMBOL(s3c_device_ohci);
  */
 void __init s3c_ohci_set_platdata(struct s3c2410_hcd_info *info)
 {
-        struct s3c2410_hcd_info *npd;
-
-        npd = kmemdup(info, sizeof(struct s3c2410_hcd_info), GFP_KERNEL);
-        if (!npd)
-                printk(KERN_ERR "%s: no memory for platform data\n", __func__);
-
-        s3c_device_ohci.dev.platform_data = npd;
+        s3c_set_platdata(info, sizeof(struct s3c2410_hcd_info),
+                         &s3c_device_ohci);
 }
diff --git a/arch/arm/plat-samsung/include/plat/backlight.h b/arch/arm/plat-samsung/include/plat/backlight.h
new file mode 100644
index 000000000000..51d8da846a62
--- /dev/null
+++ b/arch/arm/plat-samsung/include/plat/backlight.h
@@ -0,0 +1,26 @@
+/* linux/arch/arm/plat-samsung/include/plat/backlight.h
+ *
+ * Copyright (c) 2011 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __ASM_PLAT_BACKLIGHT_H
+#define __ASM_PLAT_BACKLIGHT_H __FILE__
+
+/* samsung_bl_gpio_info - GPIO info for PWM Backlight control
+ * @no:         GPIO number for PWM timer out
+ * @func:       Special function of GPIO line for PWM timer
+ */
+struct samsung_bl_gpio_info {
+        int no;
+        int func;
+};
+
+extern void samsung_bl_set(struct samsung_bl_gpio_info *gpio_info,
+        struct platform_pwm_backlight_data *bl_data);
+
+#endif /* __ASM_PLAT_BACKLIGHT_H */
diff --git a/arch/arm/plat-samsung/include/plat/clock.h b/arch/arm/plat-samsung/include/plat/clock.h
index 983c578b8276..87d5b38a86fb 100644
--- a/arch/arm/plat-samsung/include/plat/clock.h
+++ b/arch/arm/plat-samsung/include/plat/clock.h
@@ -10,6 +10,7 @@
 */
 
 #include <linux/spinlock.h>
+#include <linux/clkdev.h>
 
 struct clk;
 
@@ -40,6 +41,7 @@ struct clk {
         struct module        *owner;
         struct clk           *parent;
         const char           *name;
+        const char              *devname;
         int                   id;
         int                   usage;
         unsigned long         rate;
@@ -47,6 +49,7 @@ struct clk {
 
         struct clk_ops          *ops;
         int                 (*enable)(struct clk *, int enable);
+        struct clk_lookup       lookup;
 #if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS)
         struct dentry           *dent;  /* For visible tree hierarchy */
 #endif
diff --git a/arch/arm/plat-samsung/include/plat/iic.h b/arch/arm/plat-samsung/include/plat/iic.h
index 1543da8f85c1..56b0059439e1 100644
--- a/arch/arm/plat-samsung/include/plat/iic.h
+++ b/arch/arm/plat-samsung/include/plat/iic.h
@@ -71,4 +71,6 @@ extern void s3c_i2c5_cfg_gpio(struct platform_device *dev);
 extern void s3c_i2c6_cfg_gpio(struct platform_device *dev);
 extern void s3c_i2c7_cfg_gpio(struct platform_device *dev);
 
+extern struct s3c2410_platform_i2c default_i2c_data;
+
 #endif /* __ASM_ARCH_IIC_H */
diff --git a/arch/arm/plat-samsung/pwm-clock.c b/arch/arm/plat-samsung/pwm-clock.c
index 46c9381e083b..f1bba88ed2f5 100644
--- a/arch/arm/plat-samsung/pwm-clock.c
+++ b/arch/arm/plat-samsung/pwm-clock.c
@@ -268,6 +268,7 @@ static struct pwm_tdiv_clk clk_timer_tdiv[] = {
         [0]     = {
                 .clk    = {
                         .name   = "pwm-tdiv",
+                        .devname        = "s3c24xx-pwm.0",
                         .ops    = &clk_tdiv_ops,
                         .parent = &clk_timer_scaler[0],
                 },
@@ -275,6 +276,7 @@ static struct pwm_tdiv_clk clk_timer_tdiv[] = {
         [1]     = {
                 .clk    = {
                         .name   = "pwm-tdiv",
+                        .devname        = "s3c24xx-pwm.1",
                         .ops    = &clk_tdiv_ops,
                         .parent = &clk_timer_scaler[0],
                 }
@@ -282,6 +284,7 @@ static struct pwm_tdiv_clk clk_timer_tdiv[] = {
         [2]     = {
                 .clk    = {
                         .name   = "pwm-tdiv",
+                        .devname        = "s3c24xx-pwm.2",
                         .ops    = &clk_tdiv_ops,
                         .parent = &clk_timer_scaler[1],
                 },
@@ -289,6 +292,7 @@ static struct pwm_tdiv_clk clk_timer_tdiv[] = {
         [3]     = {
                 .clk    = {
                         .name   = "pwm-tdiv",
+                        .devname        = "s3c24xx-pwm.3",
                         .ops    = &clk_tdiv_ops,
                         .parent = &clk_timer_scaler[1],
                 },
@@ -296,6 +300,7 @@ static struct pwm_tdiv_clk clk_timer_tdiv[] = {
         [4]     = {
                 .clk    = {
                         .name   = "pwm-tdiv",
+                        .devname        = "s3c24xx-pwm.4",
                         .ops    = &clk_tdiv_ops,
                         .parent = &clk_timer_scaler[1],
                 },
@@ -361,26 +366,31 @@ static struct clk_ops clk_tin_ops = {
 static struct clk clk_tin[] = {
         [0]     = {
                 .name   = "pwm-tin",
+                .devname        = "s3c24xx-pwm.0",
                 .id     = 0,
                 .ops    = &clk_tin_ops,
         },
         [1]     = {
                 .name   = "pwm-tin",
+                .devname        = "s3c24xx-pwm.1",
                 .id     = 1,
                 .ops    = &clk_tin_ops,
         },
         [2]     = {
                 .name   = "pwm-tin",
+                .devname        = "s3c24xx-pwm.2",
                 .id     = 2,
                 .ops    = &clk_tin_ops,
         },
         [3]     = {
                 .name   = "pwm-tin",
+                .devname        = "s3c24xx-pwm.3",
                 .id     = 3,
                 .ops    = &clk_tin_ops,
         },
         [4]     = {
                 .name   = "pwm-tin",
+                .devname        = "s3c24xx-pwm.4",
                 .id     = 4,
                 .ops    = &clk_tin_ops,
         },
diff --git a/arch/arm/plat-samsung/time.c b/arch/arm/plat-samsung/time.c
index 2231d80ad817..e3bb806bbafe 100644
--- a/arch/arm/plat-samsung/time.c
+++ b/arch/arm/plat-samsung/time.c
@@ -259,6 +259,8 @@ static void __init s3c2410_timer_resources(void)
         clk_enable(timerclk);
 
         if (!use_tclk1_12()) {
+                tmpdev.id = 4;
+                tmpdev.dev.init_name = "s3c24xx-pwm.4";
                 tin = clk_get(&tmpdev.dev, "pwm-tin");
                 if (IS_ERR(tin))
                         panic("failed to get pwm-tin clock for system timer");