diff options
author | Uwe Kleine-König <u.kleine-koenig@pengutronix.de> | 2009-12-17 05:56:43 -0500 |
---|---|---|
committer | Uwe Kleine-König <u.kleine-koenig@pengutronix.de> | 2010-01-08 10:45:20 -0500 |
commit | a9b7a2dd217bd43e122b604ec99b63e0211c38aa (patch) | |
tree | a5c46486f977c111c83356117f69b713635d99c6 /arch | |
parent | 59e2608169bf4199f9f9e08a8abe80132e9416f5 (diff) |
imx: mangle addresses after adding the offset
don't use
IO_ADDRESS($base) + $offset
but
IO_ADDRESS($base + $offset)
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Holger Schurig <hs4233@mail.mn-solutions.de>
Cc: Rabin Vincent <rabin@rab.in>
Cc: "Agustín Ferrín Pozuelo" <gatoguan-os@yahoo.com>
Cc: Javier Martin <javier.martin@vista-silicon.com>
Cc: Valentin Longchamp <valentin.longchamp@epfl.ch>
Cc: Daniel Mack <daniel@caiaq.de>
Cc: Dmitriy Taychenachev <dimichxp@gmail.com>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/mach-mx2/clock_imx21.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-mx2/clock_imx27.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-mx3/cpu.c | 2 | ||||
-rw-r--r-- | arch/arm/plat-mxc/include/mach/mxc.h | 6 |
4 files changed, 6 insertions, 6 deletions
diff --git a/arch/arm/mach-mx2/clock_imx21.c b/arch/arm/mach-mx2/clock_imx21.c index 2367b6c5f071..8974faf9cef0 100644 --- a/arch/arm/mach-mx2/clock_imx21.c +++ b/arch/arm/mach-mx2/clock_imx21.c | |||
@@ -28,7 +28,7 @@ | |||
28 | #include <asm/clkdev.h> | 28 | #include <asm/clkdev.h> |
29 | #include <asm/div64.h> | 29 | #include <asm/div64.h> |
30 | 30 | ||
31 | #define IO_ADDR_CCM(off) (MX21_IO_ADDRESS(MX21_CCM_BASE_ADDR) + (off)) | 31 | #define IO_ADDR_CCM(off) (MX21_IO_ADDRESS(MX21_CCM_BASE_ADDR + (off))) |
32 | 32 | ||
33 | /* Register offsets */ | 33 | /* Register offsets */ |
34 | #define CCM_CSCR IO_ADDR_CCM(0x0) | 34 | #define CCM_CSCR IO_ADDR_CCM(0x0) |
diff --git a/arch/arm/mach-mx2/clock_imx27.c b/arch/arm/mach-mx2/clock_imx27.c index bb9f60318fde..68bf93e6e907 100644 --- a/arch/arm/mach-mx2/clock_imx27.c +++ b/arch/arm/mach-mx2/clock_imx27.c | |||
@@ -29,7 +29,7 @@ | |||
29 | #include <mach/common.h> | 29 | #include <mach/common.h> |
30 | #include <mach/hardware.h> | 30 | #include <mach/hardware.h> |
31 | 31 | ||
32 | #define IO_ADDR_CCM(off) (MX27_IO_ADDRESS(MX27_CCM_BASE_ADDR) + (off)) | 32 | #define IO_ADDR_CCM(off) (MX27_IO_ADDRESS(MX27_CCM_BASE_ADDR + (off))) |
33 | 33 | ||
34 | /* Register offsets */ | 34 | /* Register offsets */ |
35 | #define CCM_CSCR IO_ADDR_CCM(0x0) | 35 | #define CCM_CSCR IO_ADDR_CCM(0x0) |
diff --git a/arch/arm/mach-mx3/cpu.c b/arch/arm/mach-mx3/cpu.c index db828809c675..861afe0fe3ad 100644 --- a/arch/arm/mach-mx3/cpu.c +++ b/arch/arm/mach-mx3/cpu.c | |||
@@ -41,7 +41,7 @@ void __init mx31_read_cpu_rev(void) | |||
41 | u32 i, srev; | 41 | u32 i, srev; |
42 | 42 | ||
43 | /* read SREV register from IIM module */ | 43 | /* read SREV register from IIM module */ |
44 | srev = __raw_readl(IO_ADDRESS(IIM_BASE_ADDR) + MXC_IIMSREV); | 44 | srev = __raw_readl(IO_ADDRESS(IIM_BASE_ADDR + MXC_IIMSREV)); |
45 | 45 | ||
46 | for (i = 0; i < ARRAY_SIZE(mx31_cpu_type); i++) | 46 | for (i = 0; i < ARRAY_SIZE(mx31_cpu_type); i++) |
47 | if (srev == mx31_cpu_type[i].srev) { | 47 | if (srev == mx31_cpu_type[i].srev) { |
diff --git a/arch/arm/plat-mxc/include/mach/mxc.h b/arch/arm/plat-mxc/include/mach/mxc.h index 51990536b845..2b14126f8b51 100644 --- a/arch/arm/plat-mxc/include/mach/mxc.h +++ b/arch/arm/plat-mxc/include/mach/mxc.h | |||
@@ -121,9 +121,9 @@ extern unsigned int __mxc_cpu_type; | |||
121 | #endif | 121 | #endif |
122 | 122 | ||
123 | #if defined(CONFIG_ARCH_MX3) || defined(CONFIG_ARCH_MX2) | 123 | #if defined(CONFIG_ARCH_MX3) || defined(CONFIG_ARCH_MX2) |
124 | #define CSCR_U(n) (IO_ADDRESS(WEIM_BASE_ADDR) + n * 0x10) | 124 | #define CSCR_U(n) (IO_ADDRESS(WEIM_BASE_ADDR + n * 0x10)) |
125 | #define CSCR_L(n) (IO_ADDRESS(WEIM_BASE_ADDR) + n * 0x10 + 0x4) | 125 | #define CSCR_L(n) (IO_ADDRESS(WEIM_BASE_ADDR + n * 0x10 + 0x4)) |
126 | #define CSCR_A(n) (IO_ADDRESS(WEIM_BASE_ADDR) + n * 0x10 + 0x8) | 126 | #define CSCR_A(n) (IO_ADDRESS(WEIM_BASE_ADDR + n * 0x10 + 0x8)) |
127 | #endif | 127 | #endif |
128 | 128 | ||
129 | #define cpu_is_mx3() (cpu_is_mx31() || cpu_is_mx35() || cpu_is_mxc91231()) | 129 | #define cpu_is_mx3() (cpu_is_mx31() || cpu_is_mx35() || cpu_is_mxc91231()) |