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authorJonas Gorski <jogo@openwrt.org>2014-07-12 06:49:34 -0400
committerRalf Baechle <ralf@linux-mips.org>2014-07-30 09:27:24 -0400
commita6dfde817cb45934e87d4493df0df3c12a6604e1 (patch)
treef14e01446df3d43783beb482dfb1d72ec88a8ee9 /arch
parenta221a6b2826f2b49a60ffa77bd8b0b4c56d0aced (diff)
MIPS: BCM63xx: Move bcm63xx_init_irq down
Allows up to drop the prototypes from the top. Signed-off-by: Jonas Gorski <jogo@openwrt.org> Cc: linux-mips@linux-mips.org Cc: John Crispin <blogic@openwrt.org> Cc: Maxime Bizon <mbizon@freebox.fr> Cc: Florian Fainelli <florian@openwrt.org> Cc: Kevin Cernekee <cernekee@gmail.com> Cc: Gregory Fong <gregory.0xf0@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/7315/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/mips/bcm63xx/irq.c190
1 files changed, 92 insertions, 98 deletions
diff --git a/arch/mips/bcm63xx/irq.c b/arch/mips/bcm63xx/irq.c
index a9fb564b194c..f6c933a68c75 100644
--- a/arch/mips/bcm63xx/irq.c
+++ b/arch/mips/bcm63xx/irq.c
@@ -19,13 +19,6 @@
19#include <bcm63xx_io.h> 19#include <bcm63xx_io.h>
20#include <bcm63xx_irq.h> 20#include <bcm63xx_irq.h>
21 21
22static void __dispatch_internal_32(void) __maybe_unused;
23static void __dispatch_internal_64(void) __maybe_unused;
24static void __internal_irq_mask_32(unsigned int irq) __maybe_unused;
25static void __internal_irq_mask_64(unsigned int irq) __maybe_unused;
26static void __internal_irq_unmask_32(unsigned int irq) __maybe_unused;
27static void __internal_irq_unmask_64(unsigned int irq) __maybe_unused;
28
29static u32 irq_stat_addr, irq_mask_addr; 22static u32 irq_stat_addr, irq_mask_addr;
30static void (*dispatch_internal)(void); 23static void (*dispatch_internal)(void);
31static int is_ext_irq_cascaded; 24static int is_ext_irq_cascaded;
@@ -35,97 +28,6 @@ static unsigned int ext_irq_cfg_reg1, ext_irq_cfg_reg2;
35static void (*internal_irq_mask)(unsigned int irq); 28static void (*internal_irq_mask)(unsigned int irq);
36static void (*internal_irq_unmask)(unsigned int irq); 29static void (*internal_irq_unmask)(unsigned int irq);
37 30
38static void bcm63xx_init_irq(void)
39{
40 int irq_bits;
41
42 irq_stat_addr = bcm63xx_regset_address(RSET_PERF);
43 irq_mask_addr = bcm63xx_regset_address(RSET_PERF);
44
45 switch (bcm63xx_get_cpu_id()) {
46 case BCM3368_CPU_ID:
47 irq_stat_addr += PERF_IRQSTAT_3368_REG;
48 irq_mask_addr += PERF_IRQMASK_3368_REG;
49 irq_bits = 32;
50 ext_irq_count = 4;
51 ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_3368;
52 break;
53 case BCM6328_CPU_ID:
54 irq_stat_addr += PERF_IRQSTAT_6328_REG;
55 irq_mask_addr += PERF_IRQMASK_6328_REG;
56 irq_bits = 64;
57 ext_irq_count = 4;
58 is_ext_irq_cascaded = 1;
59 ext_irq_start = BCM_6328_EXT_IRQ0 - IRQ_INTERNAL_BASE;
60 ext_irq_end = BCM_6328_EXT_IRQ3 - IRQ_INTERNAL_BASE;
61 ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6328;
62 break;
63 case BCM6338_CPU_ID:
64 irq_stat_addr += PERF_IRQSTAT_6338_REG;
65 irq_mask_addr += PERF_IRQMASK_6338_REG;
66 irq_bits = 32;
67 ext_irq_count = 4;
68 ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6338;
69 break;
70 case BCM6345_CPU_ID:
71 irq_stat_addr += PERF_IRQSTAT_6345_REG;
72 irq_mask_addr += PERF_IRQMASK_6345_REG;
73 irq_bits = 32;
74 ext_irq_count = 4;
75 ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6345;
76 break;
77 case BCM6348_CPU_ID:
78 irq_stat_addr += PERF_IRQSTAT_6348_REG;
79 irq_mask_addr += PERF_IRQMASK_6348_REG;
80 irq_bits = 32;
81 ext_irq_count = 4;
82 ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6348;
83 break;
84 case BCM6358_CPU_ID:
85 irq_stat_addr += PERF_IRQSTAT_6358_REG;
86 irq_mask_addr += PERF_IRQMASK_6358_REG;
87 irq_bits = 32;
88 ext_irq_count = 4;
89 is_ext_irq_cascaded = 1;
90 ext_irq_start = BCM_6358_EXT_IRQ0 - IRQ_INTERNAL_BASE;
91 ext_irq_end = BCM_6358_EXT_IRQ3 - IRQ_INTERNAL_BASE;
92 ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6358;
93 break;
94 case BCM6362_CPU_ID:
95 irq_stat_addr += PERF_IRQSTAT_6362_REG;
96 irq_mask_addr += PERF_IRQMASK_6362_REG;
97 irq_bits = 64;
98 ext_irq_count = 4;
99 is_ext_irq_cascaded = 1;
100 ext_irq_start = BCM_6362_EXT_IRQ0 - IRQ_INTERNAL_BASE;
101 ext_irq_end = BCM_6362_EXT_IRQ3 - IRQ_INTERNAL_BASE;
102 ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6362;
103 break;
104 case BCM6368_CPU_ID:
105 irq_stat_addr += PERF_IRQSTAT_6368_REG;
106 irq_mask_addr += PERF_IRQMASK_6368_REG;
107 irq_bits = 64;
108 ext_irq_count = 6;
109 is_ext_irq_cascaded = 1;
110 ext_irq_start = BCM_6368_EXT_IRQ0 - IRQ_INTERNAL_BASE;
111 ext_irq_end = BCM_6368_EXT_IRQ5 - IRQ_INTERNAL_BASE;
112 ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6368;
113 ext_irq_cfg_reg2 = PERF_EXTIRQ_CFG_REG2_6368;
114 break;
115 default:
116 BUG();
117 }
118
119 if (irq_bits == 32) {
120 dispatch_internal = __dispatch_internal_32;
121 internal_irq_mask = __internal_irq_mask_32;
122 internal_irq_unmask = __internal_irq_unmask_32;
123 } else {
124 dispatch_internal = __dispatch_internal_64;
125 internal_irq_mask = __internal_irq_mask_64;
126 internal_irq_unmask = __internal_irq_unmask_64;
127 }
128}
129 31
130static inline u32 get_ext_irq_perf_reg(int irq) 32static inline u32 get_ext_irq_perf_reg(int irq)
131{ 33{
@@ -451,6 +353,98 @@ static struct irqaction cpu_ext_cascade_action = {
451 .flags = IRQF_NO_THREAD, 353 .flags = IRQF_NO_THREAD,
452}; 354};
453 355
356static void bcm63xx_init_irq(void)
357{
358 int irq_bits;
359
360 irq_stat_addr = bcm63xx_regset_address(RSET_PERF);
361 irq_mask_addr = bcm63xx_regset_address(RSET_PERF);
362
363 switch (bcm63xx_get_cpu_id()) {
364 case BCM3368_CPU_ID:
365 irq_stat_addr += PERF_IRQSTAT_3368_REG;
366 irq_mask_addr += PERF_IRQMASK_3368_REG;
367 irq_bits = 32;
368 ext_irq_count = 4;
369 ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_3368;
370 break;
371 case BCM6328_CPU_ID:
372 irq_stat_addr += PERF_IRQSTAT_6328_REG;
373 irq_mask_addr += PERF_IRQMASK_6328_REG;
374 irq_bits = 64;
375 ext_irq_count = 4;
376 is_ext_irq_cascaded = 1;
377 ext_irq_start = BCM_6328_EXT_IRQ0 - IRQ_INTERNAL_BASE;
378 ext_irq_end = BCM_6328_EXT_IRQ3 - IRQ_INTERNAL_BASE;
379 ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6328;
380 break;
381 case BCM6338_CPU_ID:
382 irq_stat_addr += PERF_IRQSTAT_6338_REG;
383 irq_mask_addr += PERF_IRQMASK_6338_REG;
384 irq_bits = 32;
385 ext_irq_count = 4;
386 ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6338;
387 break;
388 case BCM6345_CPU_ID:
389 irq_stat_addr += PERF_IRQSTAT_6345_REG;
390 irq_mask_addr += PERF_IRQMASK_6345_REG;
391 irq_bits = 32;
392 ext_irq_count = 4;
393 ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6345;
394 break;
395 case BCM6348_CPU_ID:
396 irq_stat_addr += PERF_IRQSTAT_6348_REG;
397 irq_mask_addr += PERF_IRQMASK_6348_REG;
398 irq_bits = 32;
399 ext_irq_count = 4;
400 ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6348;
401 break;
402 case BCM6358_CPU_ID:
403 irq_stat_addr += PERF_IRQSTAT_6358_REG;
404 irq_mask_addr += PERF_IRQMASK_6358_REG;
405 irq_bits = 32;
406 ext_irq_count = 4;
407 is_ext_irq_cascaded = 1;
408 ext_irq_start = BCM_6358_EXT_IRQ0 - IRQ_INTERNAL_BASE;
409 ext_irq_end = BCM_6358_EXT_IRQ3 - IRQ_INTERNAL_BASE;
410 ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6358;
411 break;
412 case BCM6362_CPU_ID:
413 irq_stat_addr += PERF_IRQSTAT_6362_REG;
414 irq_mask_addr += PERF_IRQMASK_6362_REG;
415 irq_bits = 64;
416 ext_irq_count = 4;
417 is_ext_irq_cascaded = 1;
418 ext_irq_start = BCM_6362_EXT_IRQ0 - IRQ_INTERNAL_BASE;
419 ext_irq_end = BCM_6362_EXT_IRQ3 - IRQ_INTERNAL_BASE;
420 ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6362;
421 break;
422 case BCM6368_CPU_ID:
423 irq_stat_addr += PERF_IRQSTAT_6368_REG;
424 irq_mask_addr += PERF_IRQMASK_6368_REG;
425 irq_bits = 64;
426 ext_irq_count = 6;
427 is_ext_irq_cascaded = 1;
428 ext_irq_start = BCM_6368_EXT_IRQ0 - IRQ_INTERNAL_BASE;
429 ext_irq_end = BCM_6368_EXT_IRQ5 - IRQ_INTERNAL_BASE;
430 ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6368;
431 ext_irq_cfg_reg2 = PERF_EXTIRQ_CFG_REG2_6368;
432 break;
433 default:
434 BUG();
435 }
436
437 if (irq_bits == 32) {
438 dispatch_internal = __dispatch_internal_32;
439 internal_irq_mask = __internal_irq_mask_32;
440 internal_irq_unmask = __internal_irq_unmask_32;
441 } else {
442 dispatch_internal = __dispatch_internal_64;
443 internal_irq_mask = __internal_irq_mask_64;
444 internal_irq_unmask = __internal_irq_unmask_64;
445 }
446}
447
454void __init arch_init_irq(void) 448void __init arch_init_irq(void)
455{ 449{
456 int i; 450 int i;
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