Merge tag 'zynq-dt-for-3.11' of git://git.xilinx.com/linux-xlnx into next/dt

From Michal Simek:

arm: Xilinx Zynq dt changes for v3.11

The branch contains:
- DT uart handling cleanup
- Support for zc706 and zed board
- Removal of board compatible string

* tag 'zynq-dt-for-3.11' of git://git.xilinx.com/linux-xlnx:
  arm: dt: zynq: Add support for the zed platform
  arm: dt: zynq: Add support for the zc706 platform
  arm: dt: zynq: Use 'status' property for UART nodes
  arm: zynq: Remove board specific compatibility string
  clk: zynq: Remove deprecated clock code
  arm: zynq: Migrate platform to clock controller
  clk: zynq: Add clock controller driver
  clk: zynq: Factor out PLL driver

Signed-off-by: Arnd Bergmann <arnd@arndb.de>

7 files changed, 100 insertions, 56 deletions

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 4823c3121ee2..4c904a8e458a 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -216,7 +216,9 @@ dtb-$(CONFIG_ARCH_VT8500) += vt8500-bv07.dtb \
         wm8650-mid.dtb \
         wm8750-apc8750.dtb \
         wm8850-w70v2.dtb
-dtb-$(CONFIG_ARCH_ZYNQ) += zynq-zc702.dtb
+dtb-$(CONFIG_ARCH_ZYNQ) += zynq-zc702.dtb \
+        zynq-zc706.dtb \
+        zynq-zed.dtb
 
 targets += dtbs
 targets += $(dtb-y)
diff --git a/arch/arm/boot/dts/zynq-7000.dtsi b/arch/arm/boot/dts/zynq-7000.dtsi
index 14fb2e609bab..6f54a64850eb 100644
--- a/arch/arm/boot/dts/zynq-7000.dtsi
+++ b/arch/arm/boot/dts/zynq-7000.dtsi
@@ -49,16 +49,20 @@
 
                 uart0: uart@e0000000 {
                         compatible = "xlnx,xuartps";
+                        status = "disabled";
+                        clocks = <&clkc 23>, <&clkc 40>;
+                        clock-names = "ref_clk", "aper_clk";
                         reg = <0xE0000000 0x1000>;
                         interrupts = <0 27 4>;
-                        clocks = <&uart_clk 0>;
                 };
 
                 uart1: uart@e0001000 {
                         compatible = "xlnx,xuartps";
+                        status = "disabled";
+                        clocks = <&clkc 24>, <&clkc 41>;
+                        clock-names = "ref_clk", "aper_clk";
                         reg = <0xE0001000 0x1000>;
                         interrupts = <0 50 4>;
-                        clocks = <&uart_clk 1>;
                 };
 
                 slcr: slcr@f8000000 {
@@ -69,50 +73,21 @@
                                 #address-cells = <1>;
                                 #size-cells = <0>;
 
-                                ps_clk: ps_clk {
-                                        #clock-cells = <0>;
-                                        compatible = "fixed-clock";
-                                        /* clock-frequency set in board-specific file */
-                                        clock-output-names = "ps_clk";
-                                };
-                                armpll: armpll {
-                                        #clock-cells = <0>;
-                                        compatible = "xlnx,zynq-pll";
-                                        clocks = <&ps_clk>;
-                                        reg = <0x100 0x110>;
-                                        clock-output-names = "armpll";
-                                };
-                                ddrpll: ddrpll {
-                                        #clock-cells = <0>;
-                                        compatible = "xlnx,zynq-pll";
-                                        clocks = <&ps_clk>;
-                                        reg = <0x104 0x114>;
-                                        clock-output-names = "ddrpll";
-                                };
-                                iopll: iopll {
-                                        #clock-cells = <0>;
-                                        compatible = "xlnx,zynq-pll";
-                                        clocks = <&ps_clk>;
-                                        reg = <0x108 0x118>;
-                                        clock-output-names = "iopll";
-                                };
-                                uart_clk: uart_clk {
-                                        #clock-cells = <1>;
-                                        compatible = "xlnx,zynq-periph-clock";
-                                        clocks = <&iopll &armpll &ddrpll>;
-                                        reg = <0x154>;
-                                        clock-output-names = "uart0_ref_clk",
-                                                             "uart1_ref_clk";
-                                };
-                                cpu_clk: cpu_clk {
+                                clkc: clkc {
                                         #clock-cells = <1>;
-                                        compatible = "xlnx,zynq-cpu-clock";
-                                        clocks = <&iopll &armpll &ddrpll>;
-                                        reg = <0x120 0x1C4>;
-                                        clock-output-names = "cpu_6x4x",
-                                                             "cpu_3x2x",
-                                                             "cpu_2x",
-                                                             "cpu_1x";
+                                        compatible = "xlnx,ps7-clkc";
+                                        ps-clk-frequency = <33333333>;
+                                        clock-output-names = "armpll", "ddrpll", "iopll", "cpu_6or4x",
+                                                        "cpu_3or2x", "cpu_2x", "cpu_1x", "ddr2x", "ddr3x",
+                                                        "dci", "lqspi", "smc", "pcap", "gem0", "gem1",
+                                                        "fclk0", "fclk1", "fclk2", "fclk3", "can0", "can1",
+                                                        "sdio0", "sdio1", "uart0", "uart1", "spi0", "spi1",
+                                                        "dma", "usb0_aper", "usb1_aper", "gem0_aper",
+                                                        "gem1_aper", "sdio0_aper", "sdio1_aper",
+                                                        "spi0_aper", "spi1_aper", "can0_aper", "can1_aper",
+                                                        "i2c0_aper", "i2c1_aper", "uart0_aper", "uart1_aper",
+                                                        "gpio_aper", "lqspi_aper", "smc_aper", "swdt",
+                                                        "dbg_trc", "dbg_apb";
                                 };
                         };
                 };
@@ -121,9 +96,8 @@
                         interrupt-parent = <&intc>;
                         interrupts = < 0 10 4 0 11 4 0 12 4 >;
                         compatible = "cdns,ttc";
+                        clocks = <&clkc 6>;
                         reg = <0xF8001000 0x1000>;
-                        clocks = <&cpu_clk 3>;
-                        clock-names = "cpu_1x";
                         clock-ranges;
                 };
 
@@ -131,9 +105,8 @@
                         interrupt-parent = <&intc>;
                         interrupts = < 0 37 4 0 38 4 0 39 4 >;
                         compatible = "cdns,ttc";
+                        clocks = <&clkc 6>;
                         reg = <0xF8002000 0x1000>;
-                        clocks = <&cpu_clk 3>;
-                        clock-names = "cpu_1x";
                         clock-ranges;
                 };
                 scutimer: scutimer@f8f00600 {
@@ -141,7 +114,7 @@
                         interrupts = < 1 13 0x301 >;
                         compatible = "arm,cortex-a9-twd-timer";
                         reg = < 0xf8f00600 0x20 >;
-                        clocks = <&cpu_clk 1>;
+                        clocks = <&clkc 4>;
                 } ;
         };
 };
diff --git a/arch/arm/boot/dts/zynq-zc702.dts b/arch/arm/boot/dts/zynq-zc702.dts
index 86f44d5b0265..21aea99a067b 100644
--- a/arch/arm/boot/dts/zynq-zc702.dts
+++ b/arch/arm/boot/dts/zynq-zc702.dts
@@ -24,11 +24,11 @@
         };
 
         chosen {
-                bootargs = "console=ttyPS1,115200 earlyprintk";
+                bootargs = "console=ttyPS0,115200 earlyprintk";
         };
 
 };
 
-&ps_clk {
-        clock-frequency = <33333330>;
+&uart1 {
+        status = "okay";
 };
diff --git a/arch/arm/boot/dts/zynq-zc706.dts b/arch/arm/boot/dts/zynq-zc706.dts
new file mode 100644
index 000000000000..79009e0b74b9
--- /dev/null
+++ b/arch/arm/boot/dts/zynq-zc706.dts
@@ -0,0 +1,35 @@
+/*
+ *  Copyright (C) 2011 Xilinx
+ *  Copyright (C) 2012 National Instruments Corp.
+ *  Copyright (C) 2013 Xilinx
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+/dts-v1/;
+/include/ "zynq-7000.dtsi"
+
+/ {
+        model = "Zynq ZC706 Development Board";
+        compatible = "xlnx,zynq-zc706", "xlnx,zynq-7000";
+
+        memory {
+                device_type = "memory";
+                reg = <0 0x40000000>;
+        };
+
+        chosen {
+                bootargs = "console=ttyPS0,115200 earlyprintk";
+        };
+
+};
+
+&uart1 {
+        status = "okay";
+};
diff --git a/arch/arm/boot/dts/zynq-zed.dts b/arch/arm/boot/dts/zynq-zed.dts
new file mode 100644
index 000000000000..d6acf2b1cdf4
--- /dev/null
+++ b/arch/arm/boot/dts/zynq-zed.dts
@@ -0,0 +1,35 @@
+/*
+ *  Copyright (C) 2011 Xilinx
+ *  Copyright (C) 2012 National Instruments Corp.
+ *  Copyright (C) 2013 Xilinx
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+/dts-v1/;
+/include/ "zynq-7000.dtsi"
+
+/ {
+        model = "Zynq Zed Development Board";
+        compatible = "xlnx,zynq-7000";
+
+        memory {
+                device_type = "memory";
+                reg = <0 0x20000000>;
+        };
+
+        chosen {
+                bootargs = "console=ttyPS0,115200 earlyprintk";
+        };
+
+};
+
+&uart1 {
+        status = "okay";
+};
diff --git a/arch/arm/mach-zynq/common.c b/arch/arm/mach-zynq/common.c
index 5bfe7035b73d..7e3d5f400aad 100644
--- a/arch/arm/mach-zynq/common.c
+++ b/arch/arm/mach-zynq/common.c
@@ -98,7 +98,6 @@ static void zynq_system_reset(char mode, const char *cmd)
 }
 
 static const char * const zynq_dt_match[] = {
-        "xlnx,zynq-zc702",
         "xlnx,zynq-7000",
         NULL
 };
diff --git a/arch/arm/mach-zynq/slcr.c b/arch/arm/mach-zynq/slcr.c
index c70969b9c258..50d008d8f87f 100644
--- a/arch/arm/mach-zynq/slcr.c
+++ b/arch/arm/mach-zynq/slcr.c
@@ -117,7 +117,7 @@ int __init zynq_slcr_init(void)
 
         pr_info("%s mapped to %p\n", np->name, zynq_slcr_base);
 
-        xilinx_zynq_clocks_init(zynq_slcr_base);
+        zynq_clock_init(zynq_slcr_base);
 
         of_node_put(np);