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authorArnd Bergmann <arnd@arndb.de>2013-06-20 09:06:57 -0400
committerArnd Bergmann <arnd@arndb.de>2013-06-20 09:06:57 -0400
commita0639948b6fb28ebf2063b58ae6e0f4de693f6c3 (patch)
tree7ffe6f1caa94a70d56197dad151b556b36fba681 /arch
parent688c240b0bd920421fd3b9377b6ba3b731961755 (diff)
parent7bb5d75ce91ca3725256c0d502624ed697231cde (diff)
Merge tag 'davinci-for-v3.11/soc-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into next/soc
From Sekhar Nori: DaVinci SoC changes for v3.11 This pull request moves DaVinci EDMA library to arch/arm/common so it can be used by OMAP based AM335x. This is a temporary step until all drivers are converted to use the dmaengine driver in drivers/dma/edma.c. Several drivers like SPI, MMC/SD have already been converted. Some like audio are pending. The other two patches in the pull request are cleanup in nature. * tag 'davinci-for-v3.11/soc-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci: ARM: edma: remove unused transfer controller handlers ARM: davinci: move private EDMA API to arm/common ARM: davinci: remove __init atrribute from function declaration Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/Kconfig1
-rw-r--r--arch/arm/common/Kconfig3
-rw-r--r--arch/arm/common/Makefile1
-rw-r--r--arch/arm/common/edma.c (renamed from arch/arm/mach-davinci/dma.c)39
-rw-r--r--arch/arm/mach-davinci/Makefile2
-rw-r--r--arch/arm/mach-davinci/board-tnetv107x-evm.c2
-rw-r--r--arch/arm/mach-davinci/davinci.h30
-rw-r--r--arch/arm/mach-davinci/devices-tnetv107x.c2
-rw-r--r--arch/arm/mach-davinci/devices.c6
-rw-r--r--arch/arm/mach-davinci/dm355.c2
-rw-r--r--arch/arm/mach-davinci/dm365.c2
-rw-r--r--arch/arm/mach-davinci/dm644x.c2
-rw-r--r--arch/arm/mach-davinci/dm646x.c2
-rw-r--r--arch/arm/mach-davinci/include/mach/cp_intc.h4
-rw-r--r--arch/arm/mach-davinci/include/mach/da8xx.h18
-rw-r--r--arch/arm/mach-davinci/include/mach/edma.h267
-rw-r--r--arch/arm/mach-davinci/include/mach/tnetv107x.h6
17 files changed, 47 insertions, 342 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 23f6aeeaed92..102bf5798501 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -825,6 +825,7 @@ config ARCH_DAVINCI
825 select GENERIC_IRQ_CHIP 825 select GENERIC_IRQ_CHIP
826 select HAVE_IDE 826 select HAVE_IDE
827 select NEED_MACH_GPIO_H 827 select NEED_MACH_GPIO_H
828 select TI_PRIV_EDMA
828 select USE_OF 829 select USE_OF
829 select ZONE_DMA 830 select ZONE_DMA
830 help 831 help
diff --git a/arch/arm/common/Kconfig b/arch/arm/common/Kconfig
index 9353184d730d..c3a4e9ceba34 100644
--- a/arch/arm/common/Kconfig
+++ b/arch/arm/common/Kconfig
@@ -17,3 +17,6 @@ config SHARP_PARAM
17 17
18config SHARP_SCOOP 18config SHARP_SCOOP
19 bool 19 bool
20
21config TI_PRIV_EDMA
22 bool
diff --git a/arch/arm/common/Makefile b/arch/arm/common/Makefile
index 48434cbe3e89..8c60f473e976 100644
--- a/arch/arm/common/Makefile
+++ b/arch/arm/common/Makefile
@@ -16,3 +16,4 @@ obj-$(CONFIG_ARM_TIMER_SP804) += timer-sp.o
16obj-$(CONFIG_MCPM) += mcpm_head.o mcpm_entry.o mcpm_platsmp.o vlock.o 16obj-$(CONFIG_MCPM) += mcpm_head.o mcpm_entry.o mcpm_platsmp.o vlock.o
17AFLAGS_mcpm_head.o := -march=armv7-a 17AFLAGS_mcpm_head.o := -march=armv7-a
18AFLAGS_vlock.o := -march=armv7-a 18AFLAGS_vlock.o := -march=armv7-a
19obj-$(CONFIG_TI_PRIV_EDMA) += edma.o
diff --git a/arch/arm/mach-davinci/dma.c b/arch/arm/common/edma.c
index 45b7c71d9cc1..a1db6cd8cf79 100644
--- a/arch/arm/mach-davinci/dma.c
+++ b/arch/arm/common/edma.c
@@ -25,7 +25,7 @@
25#include <linux/io.h> 25#include <linux/io.h>
26#include <linux/slab.h> 26#include <linux/slab.h>
27 27
28#include <mach/edma.h> 28#include <linux/platform_data/edma.h>
29 29
30/* Offsets matching "struct edmacc_param" */ 30/* Offsets matching "struct edmacc_param" */
31#define PARM_OPT 0x00 31#define PARM_OPT 0x00
@@ -494,26 +494,6 @@ static irqreturn_t dma_ccerr_handler(int irq, void *data)
494 return IRQ_HANDLED; 494 return IRQ_HANDLED;
495} 495}
496 496
497/******************************************************************************
498 *
499 * Transfer controller error interrupt handlers
500 *
501 *****************************************************************************/
502
503#define tc_errs_handled false /* disabled as long as they're NOPs */
504
505static irqreturn_t dma_tc0err_handler(int irq, void *data)
506{
507 dev_dbg(data, "dma_tc0err_handler\n");
508 return IRQ_HANDLED;
509}
510
511static irqreturn_t dma_tc1err_handler(int irq, void *data)
512{
513 dev_dbg(data, "dma_tc1err_handler\n");
514 return IRQ_HANDLED;
515}
516
517static int reserve_contiguous_slots(int ctlr, unsigned int id, 497static int reserve_contiguous_slots(int ctlr, unsigned int id,
518 unsigned int num_slots, 498 unsigned int num_slots,
519 unsigned int start_slot) 499 unsigned int start_slot)
@@ -1541,23 +1521,6 @@ static int __init edma_probe(struct platform_device *pdev)
1541 arch_num_cc++; 1521 arch_num_cc++;
1542 } 1522 }
1543 1523
1544 if (tc_errs_handled) {
1545 status = request_irq(IRQ_TCERRINT0, dma_tc0err_handler, 0,
1546 "edma_tc0", &pdev->dev);
1547 if (status < 0) {
1548 dev_dbg(&pdev->dev, "request_irq %d failed --> %d\n",
1549 IRQ_TCERRINT0, status);
1550 return status;
1551 }
1552 status = request_irq(IRQ_TCERRINT, dma_tc1err_handler, 0,
1553 "edma_tc1", &pdev->dev);
1554 if (status < 0) {
1555 dev_dbg(&pdev->dev, "request_irq %d --> %d\n",
1556 IRQ_TCERRINT, status);
1557 return status;
1558 }
1559 }
1560
1561 return 0; 1524 return 0;
1562 1525
1563fail: 1526fail:
diff --git a/arch/arm/mach-davinci/Makefile b/arch/arm/mach-davinci/Makefile
index dd1ffccc75e9..63997a1128e6 100644
--- a/arch/arm/mach-davinci/Makefile
+++ b/arch/arm/mach-davinci/Makefile
@@ -5,7 +5,7 @@
5 5
6# Common objects 6# Common objects
7obj-y := time.o clock.o serial.o psc.o \ 7obj-y := time.o clock.o serial.o psc.o \
8 dma.o usb.o common.o sram.o aemif.o 8 usb.o common.o sram.o aemif.o
9 9
10obj-$(CONFIG_DAVINCI_MUX) += mux.o 10obj-$(CONFIG_DAVINCI_MUX) += mux.o
11 11
diff --git a/arch/arm/mach-davinci/board-tnetv107x-evm.c b/arch/arm/mach-davinci/board-tnetv107x-evm.c
index ba798370fc96..78ea395d2aca 100644
--- a/arch/arm/mach-davinci/board-tnetv107x-evm.c
+++ b/arch/arm/mach-davinci/board-tnetv107x-evm.c
@@ -26,12 +26,12 @@
26#include <linux/input.h> 26#include <linux/input.h>
27#include <linux/input/matrix_keypad.h> 27#include <linux/input/matrix_keypad.h>
28#include <linux/spi/spi.h> 28#include <linux/spi/spi.h>
29#include <linux/platform_data/edma.h>
29 30
30#include <asm/mach/arch.h> 31#include <asm/mach/arch.h>
31#include <asm/mach-types.h> 32#include <asm/mach-types.h>
32 33
33#include <mach/irqs.h> 34#include <mach/irqs.h>
34#include <mach/edma.h>
35#include <mach/mux.h> 35#include <mach/mux.h>
36#include <mach/cp_intc.h> 36#include <mach/cp_intc.h>
37#include <mach/tnetv107x.h> 37#include <mach/tnetv107x.h>
diff --git a/arch/arm/mach-davinci/davinci.h b/arch/arm/mach-davinci/davinci.h
index 1ab3df423dac..a883043d0820 100644
--- a/arch/arm/mach-davinci/davinci.h
+++ b/arch/arm/mach-davinci/davinci.h
@@ -23,9 +23,9 @@
23#include <linux/platform_device.h> 23#include <linux/platform_device.h>
24#include <linux/spi/spi.h> 24#include <linux/spi/spi.h>
25#include <linux/platform_data/davinci_asp.h> 25#include <linux/platform_data/davinci_asp.h>
26#include <linux/platform_data/edma.h>
26#include <linux/platform_data/keyscan-davinci.h> 27#include <linux/platform_data/keyscan-davinci.h>
27#include <mach/hardware.h> 28#include <mach/hardware.h>
28#include <mach/edma.h>
29 29
30#include <media/davinci/vpfe_capture.h> 30#include <media/davinci/vpfe_capture.h>
31#include <media/davinci/vpif_types.h> 31#include <media/davinci/vpif_types.h>
@@ -77,32 +77,32 @@ void davinci_map_sysmod(void);
77#define DM646X_ASYNC_EMIF_CS2_SPACE_BASE 0x42000000 77#define DM646X_ASYNC_EMIF_CS2_SPACE_BASE 0x42000000
78 78
79/* DM355 function declarations */ 79/* DM355 function declarations */
80void __init dm355_init(void); 80void dm355_init(void);
81void dm355_init_spi0(unsigned chipselect_mask, 81void dm355_init_spi0(unsigned chipselect_mask,
82 const struct spi_board_info *info, unsigned len); 82 const struct spi_board_info *info, unsigned len);
83void __init dm355_init_asp1(u32 evt_enable, struct snd_platform_data *pdata); 83void dm355_init_asp1(u32 evt_enable, struct snd_platform_data *pdata);
84int dm355_init_video(struct vpfe_config *, struct vpbe_config *); 84int dm355_init_video(struct vpfe_config *, struct vpbe_config *);
85 85
86/* DM365 function declarations */ 86/* DM365 function declarations */
87void __init dm365_init(void); 87void dm365_init(void);
88void __init dm365_init_asp(struct snd_platform_data *pdata); 88void dm365_init_asp(struct snd_platform_data *pdata);
89void __init dm365_init_vc(struct snd_platform_data *pdata); 89void dm365_init_vc(struct snd_platform_data *pdata);
90void __init dm365_init_ks(struct davinci_ks_platform_data *pdata); 90void dm365_init_ks(struct davinci_ks_platform_data *pdata);
91void __init dm365_init_rtc(void); 91void dm365_init_rtc(void);
92void dm365_init_spi0(unsigned chipselect_mask, 92void dm365_init_spi0(unsigned chipselect_mask,
93 const struct spi_board_info *info, unsigned len); 93 const struct spi_board_info *info, unsigned len);
94int dm365_init_video(struct vpfe_config *, struct vpbe_config *); 94int dm365_init_video(struct vpfe_config *, struct vpbe_config *);
95 95
96/* DM644x function declarations */ 96/* DM644x function declarations */
97void __init dm644x_init(void); 97void dm644x_init(void);
98void __init dm644x_init_asp(struct snd_platform_data *pdata); 98void dm644x_init_asp(struct snd_platform_data *pdata);
99int __init dm644x_init_video(struct vpfe_config *, struct vpbe_config *); 99int dm644x_init_video(struct vpfe_config *, struct vpbe_config *);
100 100
101/* DM646x function declarations */ 101/* DM646x function declarations */
102void __init dm646x_init(void); 102void dm646x_init(void);
103void __init dm646x_init_mcasp0(struct snd_platform_data *pdata); 103void dm646x_init_mcasp0(struct snd_platform_data *pdata);
104void __init dm646x_init_mcasp1(struct snd_platform_data *pdata); 104void dm646x_init_mcasp1(struct snd_platform_data *pdata);
105int __init dm646x_init_edma(struct edma_rsv_info *rsv); 105int dm646x_init_edma(struct edma_rsv_info *rsv);
106void dm646x_video_init(void); 106void dm646x_video_init(void);
107void dm646x_setup_vpif(struct vpif_display_config *, 107void dm646x_setup_vpif(struct vpif_display_config *,
108 struct vpif_capture_config *); 108 struct vpif_capture_config *);
diff --git a/arch/arm/mach-davinci/devices-tnetv107x.c b/arch/arm/mach-davinci/devices-tnetv107x.c
index cfb194df18ed..612a0856e9c5 100644
--- a/arch/arm/mach-davinci/devices-tnetv107x.c
+++ b/arch/arm/mach-davinci/devices-tnetv107x.c
@@ -18,10 +18,10 @@
18#include <linux/dma-mapping.h> 18#include <linux/dma-mapping.h>
19#include <linux/clk.h> 19#include <linux/clk.h>
20#include <linux/slab.h> 20#include <linux/slab.h>
21#include <linux/platform_data/edma.h>
21 22
22#include <mach/common.h> 23#include <mach/common.h>
23#include <mach/irqs.h> 24#include <mach/irqs.h>
24#include <mach/edma.h>
25#include <mach/tnetv107x.h> 25#include <mach/tnetv107x.h>
26 26
27#include "clock.h" 27#include "clock.h"
diff --git a/arch/arm/mach-davinci/devices.c b/arch/arm/mach-davinci/devices.c
index a7068a3aa9d3..90b83d00fe2b 100644
--- a/arch/arm/mach-davinci/devices.c
+++ b/arch/arm/mach-davinci/devices.c
@@ -19,9 +19,10 @@
19#include <mach/irqs.h> 19#include <mach/irqs.h>
20#include <mach/cputype.h> 20#include <mach/cputype.h>
21#include <mach/mux.h> 21#include <mach/mux.h>
22#include <mach/edma.h>
23#include <linux/platform_data/mmc-davinci.h> 22#include <linux/platform_data/mmc-davinci.h>
24#include <mach/time.h> 23#include <mach/time.h>
24#include <linux/platform_data/edma.h>
25
25 26
26#include "davinci.h" 27#include "davinci.h"
27#include "clock.h" 28#include "clock.h"
@@ -34,6 +35,9 @@
34#define DM365_MMCSD0_BASE 0x01D11000 35#define DM365_MMCSD0_BASE 0x01D11000
35#define DM365_MMCSD1_BASE 0x01D00000 36#define DM365_MMCSD1_BASE 0x01D00000
36 37
38#define DAVINCI_DMA_MMCRXEVT 26
39#define DAVINCI_DMA_MMCTXEVT 27
40
37void __iomem *davinci_sysmod_base; 41void __iomem *davinci_sysmod_base;
38 42
39void davinci_map_sysmod(void) 43void davinci_map_sysmod(void)
diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c
index a11034a358f1..526cf7d06d0e 100644
--- a/arch/arm/mach-davinci/dm355.c
+++ b/arch/arm/mach-davinci/dm355.c
@@ -19,7 +19,6 @@
19#include <asm/mach/map.h> 19#include <asm/mach/map.h>
20 20
21#include <mach/cputype.h> 21#include <mach/cputype.h>
22#include <mach/edma.h>
23#include <mach/psc.h> 22#include <mach/psc.h>
24#include <mach/mux.h> 23#include <mach/mux.h>
25#include <mach/irqs.h> 24#include <mach/irqs.h>
@@ -28,6 +27,7 @@
28#include <mach/common.h> 27#include <mach/common.h>
29#include <linux/platform_data/spi-davinci.h> 28#include <linux/platform_data/spi-davinci.h>
30#include <mach/gpio-davinci.h> 29#include <mach/gpio-davinci.h>
30#include <linux/platform_data/edma.h>
31 31
32#include "davinci.h" 32#include "davinci.h"
33#include "clock.h" 33#include "clock.h"
diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
index 40fa4fee9331..c4b741173c06 100644
--- a/arch/arm/mach-davinci/dm365.c
+++ b/arch/arm/mach-davinci/dm365.c
@@ -18,11 +18,11 @@
18#include <linux/platform_device.h> 18#include <linux/platform_device.h>
19#include <linux/dma-mapping.h> 19#include <linux/dma-mapping.h>
20#include <linux/spi/spi.h> 20#include <linux/spi/spi.h>
21#include <linux/platform_data/edma.h>
21 22
22#include <asm/mach/map.h> 23#include <asm/mach/map.h>
23 24
24#include <mach/cputype.h> 25#include <mach/cputype.h>
25#include <mach/edma.h>
26#include <mach/psc.h> 26#include <mach/psc.h>
27#include <mach/mux.h> 27#include <mach/mux.h>
28#include <mach/irqs.h> 28#include <mach/irqs.h>
diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c
index 4d37d3e2a193..dd156d58fe64 100644
--- a/arch/arm/mach-davinci/dm644x.c
+++ b/arch/arm/mach-davinci/dm644x.c
@@ -12,11 +12,11 @@
12#include <linux/clk.h> 12#include <linux/clk.h>
13#include <linux/serial_8250.h> 13#include <linux/serial_8250.h>
14#include <linux/platform_device.h> 14#include <linux/platform_device.h>
15#include <linux/platform_data/edma.h>
15 16
16#include <asm/mach/map.h> 17#include <asm/mach/map.h>
17 18
18#include <mach/cputype.h> 19#include <mach/cputype.h>
19#include <mach/edma.h>
20#include <mach/irqs.h> 20#include <mach/irqs.h>
21#include <mach/psc.h> 21#include <mach/psc.h>
22#include <mach/mux.h> 22#include <mach/mux.h>
diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c
index ac7b431c4c8e..6d52a321a8cf 100644
--- a/arch/arm/mach-davinci/dm646x.c
+++ b/arch/arm/mach-davinci/dm646x.c
@@ -13,11 +13,11 @@
13#include <linux/clk.h> 13#include <linux/clk.h>
14#include <linux/serial_8250.h> 14#include <linux/serial_8250.h>
15#include <linux/platform_device.h> 15#include <linux/platform_device.h>
16#include <linux/platform_data/edma.h>
16 17
17#include <asm/mach/map.h> 18#include <asm/mach/map.h>
18 19
19#include <mach/cputype.h> 20#include <mach/cputype.h>
20#include <mach/edma.h>
21#include <mach/irqs.h> 21#include <mach/irqs.h>
22#include <mach/psc.h> 22#include <mach/psc.h>
23#include <mach/mux.h> 23#include <mach/mux.h>
diff --git a/arch/arm/mach-davinci/include/mach/cp_intc.h b/arch/arm/mach-davinci/include/mach/cp_intc.h
index d13d8dfa2b0d..827bbe9baed4 100644
--- a/arch/arm/mach-davinci/include/mach/cp_intc.h
+++ b/arch/arm/mach-davinci/include/mach/cp_intc.h
@@ -51,7 +51,7 @@
51#define CP_INTC_HOST_PRIO_VECTOR(n) (0x1600 + (n << 2)) 51#define CP_INTC_HOST_PRIO_VECTOR(n) (0x1600 + (n << 2))
52#define CP_INTC_VECTOR_ADDR(n) (0x2000 + (n << 2)) 52#define CP_INTC_VECTOR_ADDR(n) (0x2000 + (n << 2))
53 53
54void __init cp_intc_init(void); 54void cp_intc_init(void);
55int __init cp_intc_of_init(struct device_node *, struct device_node *); 55int cp_intc_of_init(struct device_node *, struct device_node *);
56 56
57#endif /* __ASM_HARDWARE_CP_INTC_H */ 57#endif /* __ASM_HARDWARE_CP_INTC_H */
diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h
index 2e1c9eae0a58..3c797e2272f8 100644
--- a/arch/arm/mach-davinci/include/mach/da8xx.h
+++ b/arch/arm/mach-davinci/include/mach/da8xx.h
@@ -20,8 +20,8 @@
20#include <linux/videodev2.h> 20#include <linux/videodev2.h>
21 21
22#include <mach/serial.h> 22#include <mach/serial.h>
23#include <mach/edma.h>
24#include <mach/pm.h> 23#include <mach/pm.h>
24#include <linux/platform_data/edma.h>
25#include <linux/platform_data/i2c-davinci.h> 25#include <linux/platform_data/i2c-davinci.h>
26#include <linux/platform_data/mmc-davinci.h> 26#include <linux/platform_data/mmc-davinci.h>
27#include <linux/platform_data/usb-davinci.h> 27#include <linux/platform_data/usb-davinci.h>
@@ -79,8 +79,8 @@ extern unsigned int da850_max_speed;
79#define DA8XX_SHARED_RAM_BASE 0x80000000 79#define DA8XX_SHARED_RAM_BASE 0x80000000
80#define DA8XX_ARM_RAM_BASE 0xffff0000 80#define DA8XX_ARM_RAM_BASE 0xffff0000
81 81
82void __init da830_init(void); 82void da830_init(void);
83void __init da850_init(void); 83void da850_init(void);
84 84
85int da830_register_edma(struct edma_rsv_info *rsv); 85int da830_register_edma(struct edma_rsv_info *rsv);
86int da850_register_edma(struct edma_rsv_info *rsv[2]); 86int da850_register_edma(struct edma_rsv_info *rsv[2]);
@@ -94,17 +94,17 @@ int da8xx_register_uio_pruss(void);
94int da8xx_register_lcdc(struct da8xx_lcdc_platform_data *pdata); 94int da8xx_register_lcdc(struct da8xx_lcdc_platform_data *pdata);
95int da8xx_register_mmcsd0(struct davinci_mmc_config *config); 95int da8xx_register_mmcsd0(struct davinci_mmc_config *config);
96int da850_register_mmcsd1(struct davinci_mmc_config *config); 96int da850_register_mmcsd1(struct davinci_mmc_config *config);
97void __init da8xx_register_mcasp(int id, struct snd_platform_data *pdata); 97void da8xx_register_mcasp(int id, struct snd_platform_data *pdata);
98int da8xx_register_rtc(void); 98int da8xx_register_rtc(void);
99int da850_register_cpufreq(char *async_clk); 99int da850_register_cpufreq(char *async_clk);
100int da8xx_register_cpuidle(void); 100int da8xx_register_cpuidle(void);
101void __iomem * __init da8xx_get_mem_ctlr(void); 101void __iomem *da8xx_get_mem_ctlr(void);
102int da850_register_pm(struct platform_device *pdev); 102int da850_register_pm(struct platform_device *pdev);
103int __init da850_register_sata(unsigned long refclkpn); 103int da850_register_sata(unsigned long refclkpn);
104int __init da850_register_vpif(void); 104int da850_register_vpif(void);
105int __init da850_register_vpif_display 105int da850_register_vpif_display
106 (struct vpif_display_config *display_config); 106 (struct vpif_display_config *display_config);
107int __init da850_register_vpif_capture 107int da850_register_vpif_capture
108 (struct vpif_capture_config *capture_config); 108 (struct vpif_capture_config *capture_config);
109void da8xx_restart(char mode, const char *cmd); 109void da8xx_restart(char mode, const char *cmd);
110void da8xx_rproc_reserve_cma(void); 110void da8xx_rproc_reserve_cma(void);
diff --git a/arch/arm/mach-davinci/include/mach/edma.h b/arch/arm/mach-davinci/include/mach/edma.h
deleted file mode 100644
index 7e84c906ceff..000000000000
--- a/arch/arm/mach-davinci/include/mach/edma.h
+++ /dev/null
@@ -1,267 +0,0 @@
1/*
2 * TI DAVINCI dma definitions
3 *
4 * Copyright (C) 2006-2009 Texas Instruments.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 *
11 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
12 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
13 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
14 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
15 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
16 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
17 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
18 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
19 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
20 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
21 *
22 * You should have received a copy of the GNU General Public License along
23 * with this program; if not, write to the Free Software Foundation, Inc.,
24 * 675 Mass Ave, Cambridge, MA 02139, USA.
25 *
26 */
27
28/*
29 * This EDMA3 programming framework exposes two basic kinds of resource:
30 *
31 * Channel Triggers transfers, usually from a hardware event but
32 * also manually or by "chaining" from DMA completions.
33 * Each channel is coupled to a Parameter RAM (PaRAM) slot.
34 *
35 * Slot Each PaRAM slot holds a DMA transfer descriptor (PaRAM
36 * "set"), source and destination addresses, a link to a
37 * next PaRAM slot (if any), options for the transfer, and
38 * instructions for updating those addresses. There are
39 * more than twice as many slots as event channels.
40 *
41 * Each PaRAM set describes a sequence of transfers, either for one large
42 * buffer or for several discontiguous smaller buffers. An EDMA transfer
43 * is driven only from a channel, which performs the transfers specified
44 * in its PaRAM slot until there are no more transfers. When that last
45 * transfer completes, the "link" field may be used to reload the channel's
46 * PaRAM slot with a new transfer descriptor.
47 *
48 * The EDMA Channel Controller (CC) maps requests from channels into physical
49 * Transfer Controller (TC) requests when the channel triggers (by hardware
50 * or software events, or by chaining). The two physical DMA channels provided
51 * by the TCs are thus shared by many logical channels.
52 *
53 * DaVinci hardware also has a "QDMA" mechanism which is not currently
54 * supported through this interface. (DSP firmware uses it though.)
55 */
56
57#ifndef EDMA_H_
58#define EDMA_H_
59
60/* PaRAM slots are laid out like this */
61struct edmacc_param {
62 unsigned int opt;
63 unsigned int src;
64 unsigned int a_b_cnt;
65 unsigned int dst;
66 unsigned int src_dst_bidx;
67 unsigned int link_bcntrld;
68 unsigned int src_dst_cidx;
69 unsigned int ccnt;
70};
71
72#define CCINT0_INTERRUPT 16
73#define CCERRINT_INTERRUPT 17
74#define TCERRINT0_INTERRUPT 18
75#define TCERRINT1_INTERRUPT 19
76
77/* fields in edmacc_param.opt */
78#define SAM BIT(0)
79#define DAM BIT(1)
80#define SYNCDIM BIT(2)
81#define STATIC BIT(3)
82#define EDMA_FWID (0x07 << 8)
83#define TCCMODE BIT(11)
84#define EDMA_TCC(t) ((t) << 12)
85#define TCINTEN BIT(20)
86#define ITCINTEN BIT(21)
87#define TCCHEN BIT(22)
88#define ITCCHEN BIT(23)
89
90#define TRWORD (0x7<<2)
91#define PAENTRY (0x1ff<<5)
92
93/* Drivers should avoid using these symbolic names for dm644x
94 * channels, and use platform_device IORESOURCE_DMA resources
95 * instead. (Other DaVinci chips have different peripherals
96 * and thus have different DMA channel mappings.)
97 */
98#define DAVINCI_DMA_MCBSP_TX 2
99#define DAVINCI_DMA_MCBSP_RX 3
100#define DAVINCI_DMA_VPSS_HIST 4
101#define DAVINCI_DMA_VPSS_H3A 5
102#define DAVINCI_DMA_VPSS_PRVU 6
103#define DAVINCI_DMA_VPSS_RSZ 7
104#define DAVINCI_DMA_IMCOP_IMXINT 8
105#define DAVINCI_DMA_IMCOP_VLCDINT 9
106#define DAVINCI_DMA_IMCO_PASQINT 10
107#define DAVINCI_DMA_IMCOP_DSQINT 11
108#define DAVINCI_DMA_SPI_SPIX 16
109#define DAVINCI_DMA_SPI_SPIR 17
110#define DAVINCI_DMA_UART0_URXEVT0 18
111#define DAVINCI_DMA_UART0_UTXEVT0 19
112#define DAVINCI_DMA_UART1_URXEVT1 20
113#define DAVINCI_DMA_UART1_UTXEVT1 21
114#define DAVINCI_DMA_UART2_URXEVT2 22
115#define DAVINCI_DMA_UART2_UTXEVT2 23
116#define DAVINCI_DMA_MEMSTK_MSEVT 24
117#define DAVINCI_DMA_MMCRXEVT 26
118#define DAVINCI_DMA_MMCTXEVT 27
119#define DAVINCI_DMA_I2C_ICREVT 28
120#define DAVINCI_DMA_I2C_ICXEVT 29
121#define DAVINCI_DMA_GPIO_GPINT0 32
122#define DAVINCI_DMA_GPIO_GPINT1 33
123#define DAVINCI_DMA_GPIO_GPINT2 34
124#define DAVINCI_DMA_GPIO_GPINT3 35
125#define DAVINCI_DMA_GPIO_GPINT4 36
126#define DAVINCI_DMA_GPIO_GPINT5 37
127#define DAVINCI_DMA_GPIO_GPINT6 38
128#define DAVINCI_DMA_GPIO_GPINT7 39
129#define DAVINCI_DMA_GPIO_GPBNKINT0 40
130#define DAVINCI_DMA_GPIO_GPBNKINT1 41
131#define DAVINCI_DMA_GPIO_GPBNKINT2 42
132#define DAVINCI_DMA_GPIO_GPBNKINT3 43
133#define DAVINCI_DMA_GPIO_GPBNKINT4 44
134#define DAVINCI_DMA_TIMER0_TINT0 48
135#define DAVINCI_DMA_TIMER1_TINT1 49
136#define DAVINCI_DMA_TIMER2_TINT2 50
137#define DAVINCI_DMA_TIMER3_TINT3 51
138#define DAVINCI_DMA_PWM0 52
139#define DAVINCI_DMA_PWM1 53
140#define DAVINCI_DMA_PWM2 54
141
142/* DA830 specific EDMA3 information */
143#define EDMA_DA830_NUM_DMACH 32
144#define EDMA_DA830_NUM_TCC 32
145#define EDMA_DA830_NUM_PARAMENTRY 128
146#define EDMA_DA830_NUM_EVQUE 2
147#define EDMA_DA830_NUM_TC 2
148#define EDMA_DA830_CHMAP_EXIST 0
149#define EDMA_DA830_NUM_REGIONS 4
150#define DA830_DMACH2EVENT_MAP0 0x000FC03Fu
151#define DA830_DMACH2EVENT_MAP1 0x00000000u
152#define DA830_EDMA_ARM_OWN 0x30FFCCFFu
153
154/*ch_status paramater of callback function possible values*/
155#define DMA_COMPLETE 1
156#define DMA_CC_ERROR 2
157#define DMA_TC1_ERROR 3
158#define DMA_TC2_ERROR 4
159
160enum address_mode {
161 INCR = 0,
162 FIFO = 1
163};
164
165enum fifo_width {
166 W8BIT = 0,
167 W16BIT = 1,
168 W32BIT = 2,
169 W64BIT = 3,
170 W128BIT = 4,
171 W256BIT = 5
172};
173
174enum dma_event_q {
175 EVENTQ_0 = 0,
176 EVENTQ_1 = 1,
177 EVENTQ_2 = 2,
178 EVENTQ_3 = 3,
179 EVENTQ_DEFAULT = -1
180};
181
182enum sync_dimension {
183 ASYNC = 0,
184 ABSYNC = 1
185};
186
187#define EDMA_CTLR_CHAN(ctlr, chan) (((ctlr) << 16) | (chan))
188#define EDMA_CTLR(i) ((i) >> 16)
189#define EDMA_CHAN_SLOT(i) ((i) & 0xffff)
190
191#define EDMA_CHANNEL_ANY -1 /* for edma_alloc_channel() */
192#define EDMA_SLOT_ANY -1 /* for edma_alloc_slot() */
193#define EDMA_CONT_PARAMS_ANY 1001
194#define EDMA_CONT_PARAMS_FIXED_EXACT 1002
195#define EDMA_CONT_PARAMS_FIXED_NOT_EXACT 1003
196
197#define EDMA_MAX_CC 2
198
199/* alloc/free DMA channels and their dedicated parameter RAM slots */
200int edma_alloc_channel(int channel,
201 void (*callback)(unsigned channel, u16 ch_status, void *data),
202 void *data, enum dma_event_q);
203void edma_free_channel(unsigned channel);
204
205/* alloc/free parameter RAM slots */
206int edma_alloc_slot(unsigned ctlr, int slot);
207void edma_free_slot(unsigned slot);
208
209/* alloc/free a set of contiguous parameter RAM slots */
210int edma_alloc_cont_slots(unsigned ctlr, unsigned int id, int slot, int count);
211int edma_free_cont_slots(unsigned slot, int count);
212
213/* calls that operate on part of a parameter RAM slot */
214void edma_set_src(unsigned slot, dma_addr_t src_port,
215 enum address_mode mode, enum fifo_width);
216void edma_set_dest(unsigned slot, dma_addr_t dest_port,
217 enum address_mode mode, enum fifo_width);
218void edma_get_position(unsigned slot, dma_addr_t *src, dma_addr_t *dst);
219void edma_set_src_index(unsigned slot, s16 src_bidx, s16 src_cidx);
220void edma_set_dest_index(unsigned slot, s16 dest_bidx, s16 dest_cidx);
221void edma_set_transfer_params(unsigned slot, u16 acnt, u16 bcnt, u16 ccnt,
222 u16 bcnt_rld, enum sync_dimension sync_mode);
223void edma_link(unsigned from, unsigned to);
224void edma_unlink(unsigned from);
225
226/* calls that operate on an entire parameter RAM slot */
227void edma_write_slot(unsigned slot, const struct edmacc_param *params);
228void edma_read_slot(unsigned slot, struct edmacc_param *params);
229
230/* channel control operations */
231int edma_start(unsigned channel);
232void edma_stop(unsigned channel);
233void edma_clean_channel(unsigned channel);
234void edma_clear_event(unsigned channel);
235void edma_pause(unsigned channel);
236void edma_resume(unsigned channel);
237
238struct edma_rsv_info {
239
240 const s16 (*rsv_chans)[2];
241 const s16 (*rsv_slots)[2];
242};
243
244/* platform_data for EDMA driver */
245struct edma_soc_info {
246
247 /* how many dma resources of each type */
248 unsigned n_channel;
249 unsigned n_region;
250 unsigned n_slot;
251 unsigned n_tc;
252 unsigned n_cc;
253 /*
254 * Default queue is expected to be a low-priority queue.
255 * This way, long transfers on the default queue started
256 * by the codec engine will not cause audio defects.
257 */
258 enum dma_event_q default_queue;
259
260 /* Resource reservation for other cores */
261 struct edma_rsv_info *rsv;
262
263 const s8 (*queue_tc_mapping)[2];
264 const s8 (*queue_priority_mapping)[2];
265};
266
267#endif
diff --git a/arch/arm/mach-davinci/include/mach/tnetv107x.h b/arch/arm/mach-davinci/include/mach/tnetv107x.h
index 1656a02e3eda..366e975effa8 100644
--- a/arch/arm/mach-davinci/include/mach/tnetv107x.h
+++ b/arch/arm/mach-davinci/include/mach/tnetv107x.h
@@ -51,9 +51,9 @@ struct tnetv107x_device_info {
51extern struct platform_device tnetv107x_wdt_device; 51extern struct platform_device tnetv107x_wdt_device;
52extern struct platform_device tnetv107x_serial_device; 52extern struct platform_device tnetv107x_serial_device;
53 53
54extern void __init tnetv107x_init(void); 54extern void tnetv107x_init(void);
55extern void __init tnetv107x_devices_init(struct tnetv107x_device_info *); 55extern void tnetv107x_devices_init(struct tnetv107x_device_info *);
56extern void __init tnetv107x_irq_init(void); 56extern void tnetv107x_irq_init(void);
57void tnetv107x_restart(char mode, const char *cmd); 57void tnetv107x_restart(char mode, const char *cmd);
58 58
59#endif 59#endif
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