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authorTakashi Iwai <tiwai@suse.de>2013-04-18 10:24:31 -0400
committerTakashi Iwai <tiwai@suse.de>2013-04-18 10:24:31 -0400
commit8dd2b66d1a961231685a3bfe5937c85d846fbf5d (patch)
tree8117553488bf4ef09b048a4b343cf37cc16bf46d /arch
parent126825e7ea271ae8e3172e10ca1fc22c908b5385 (diff)
parent24568ea4bef5ab8106206eddf5512434421c00ed (diff)
Merge tag 'asoc-v3.10-2' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound into for-next
ASoC: More updates for v3.10 The main additional change here is Lars-Peter's DMA work plus the platform conversions which have been tested - getting this in mainline will make life easier for development after the merge window. These factor a large chunk of code out of the drivers for the platforms using dmaengine, greatly simplifying development.
Diffstat (limited to 'arch')
-rw-r--r--arch/arc/include/asm/irqflags.h12
-rw-r--r--arch/arm/boot/dts/imx28-m28evk.dts1
-rw-r--r--arch/arm/boot/dts/imx28-sps1.dts1
-rw-r--r--arch/arm/boot/dts/imx6qdl.dtsi1
-rw-r--r--arch/arm/boot/dts/kirkwood-iomega_ix2_200.dts14
-rw-r--r--arch/arm/mach-imx/clk-imx35.c2
-rw-r--r--arch/arm/mach-imx/clk-imx6q.c3
-rw-r--r--arch/arm/mach-kirkwood/board-iomega_ix2_200.c7
-rw-r--r--arch/arm/mach-mvebu/irq-armada-370-xp.c16
-rw-r--r--arch/arm/mach-s3c24xx/include/mach/irqs.h4
-rw-r--r--arch/arm/mach-s3c24xx/irq.c2
-rw-r--r--arch/c6x/include/asm/irqflags.h2
-rw-r--r--arch/ia64/kernel/palinfo.c77
-rw-r--r--arch/m68k/include/asm/gpio.h20
-rw-r--r--arch/powerpc/platforms/pseries/lpar.c8
-rw-r--r--arch/tile/include/asm/irqflags.h10
-rw-r--r--arch/x86/include/asm/paravirt.h5
-rw-r--r--arch/x86/include/asm/paravirt_types.h2
-rw-r--r--arch/x86/include/asm/tlb.h2
-rw-r--r--arch/x86/kernel/cpu/perf_event_intel_ds.c3
-rw-r--r--arch/x86/kernel/paravirt.c25
-rw-r--r--arch/x86/lguest/boot.c1
-rw-r--r--arch/x86/mm/fault.c6
-rw-r--r--arch/x86/mm/pageattr-test.c2
-rw-r--r--arch/x86/mm/pageattr.c12
-rw-r--r--arch/x86/mm/pgtable.c7
-rw-r--r--arch/x86/xen/mmu.c13
27 files changed, 133 insertions, 125 deletions
diff --git a/arch/arc/include/asm/irqflags.h b/arch/arc/include/asm/irqflags.h
index ccd84806b62f..eac071668201 100644
--- a/arch/arc/include/asm/irqflags.h
+++ b/arch/arc/include/asm/irqflags.h
@@ -39,7 +39,7 @@ static inline long arch_local_irq_save(void)
39 " flag.nz %0 \n" 39 " flag.nz %0 \n"
40 : "=r"(temp), "=r"(flags) 40 : "=r"(temp), "=r"(flags)
41 : "n"((STATUS_E1_MASK | STATUS_E2_MASK)) 41 : "n"((STATUS_E1_MASK | STATUS_E2_MASK))
42 : "cc"); 42 : "memory", "cc");
43 43
44 return flags; 44 return flags;
45} 45}
@@ -53,7 +53,8 @@ static inline void arch_local_irq_restore(unsigned long flags)
53 __asm__ __volatile__( 53 __asm__ __volatile__(
54 " flag %0 \n" 54 " flag %0 \n"
55 : 55 :
56 : "r"(flags)); 56 : "r"(flags)
57 : "memory");
57} 58}
58 59
59/* 60/*
@@ -73,7 +74,8 @@ static inline void arch_local_irq_disable(void)
73 " and %0, %0, %1 \n" 74 " and %0, %0, %1 \n"
74 " flag %0 \n" 75 " flag %0 \n"
75 : "=&r"(temp) 76 : "=&r"(temp)
76 : "n"(~(STATUS_E1_MASK | STATUS_E2_MASK))); 77 : "n"(~(STATUS_E1_MASK | STATUS_E2_MASK))
78 : "memory");
77} 79}
78 80
79/* 81/*
@@ -85,7 +87,9 @@ static inline long arch_local_save_flags(void)
85 87
86 __asm__ __volatile__( 88 __asm__ __volatile__(
87 " lr %0, [status32] \n" 89 " lr %0, [status32] \n"
88 : "=&r"(temp)); 90 : "=&r"(temp)
91 :
92 : "memory");
89 93
90 return temp; 94 return temp;
91} 95}
diff --git a/arch/arm/boot/dts/imx28-m28evk.dts b/arch/arm/boot/dts/imx28-m28evk.dts
index 6ce3d17c3a29..fd36e1cca104 100644
--- a/arch/arm/boot/dts/imx28-m28evk.dts
+++ b/arch/arm/boot/dts/imx28-m28evk.dts
@@ -152,7 +152,6 @@
152 i2c0: i2c@80058000 { 152 i2c0: i2c@80058000 {
153 pinctrl-names = "default"; 153 pinctrl-names = "default";
154 pinctrl-0 = <&i2c0_pins_a>; 154 pinctrl-0 = <&i2c0_pins_a>;
155 clock-frequency = <400000>;
156 status = "okay"; 155 status = "okay";
157 156
158 sgtl5000: codec@0a { 157 sgtl5000: codec@0a {
diff --git a/arch/arm/boot/dts/imx28-sps1.dts b/arch/arm/boot/dts/imx28-sps1.dts
index e6cde8aa7fff..6c6a5442800a 100644
--- a/arch/arm/boot/dts/imx28-sps1.dts
+++ b/arch/arm/boot/dts/imx28-sps1.dts
@@ -70,7 +70,6 @@
70 i2c0: i2c@80058000 { 70 i2c0: i2c@80058000 {
71 pinctrl-names = "default"; 71 pinctrl-names = "default";
72 pinctrl-0 = <&i2c0_pins_a>; 72 pinctrl-0 = <&i2c0_pins_a>;
73 clock-frequency = <400000>;
74 status = "okay"; 73 status = "okay";
75 74
76 rtc: rtc@51 { 75 rtc: rtc@51 {
diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi
index 06ec460b4581..281a223591ff 100644
--- a/arch/arm/boot/dts/imx6qdl.dtsi
+++ b/arch/arm/boot/dts/imx6qdl.dtsi
@@ -91,6 +91,7 @@
91 compatible = "arm,cortex-a9-twd-timer"; 91 compatible = "arm,cortex-a9-twd-timer";
92 reg = <0x00a00600 0x20>; 92 reg = <0x00a00600 0x20>;
93 interrupts = <1 13 0xf01>; 93 interrupts = <1 13 0xf01>;
94 clocks = <&clks 15>;
94 }; 95 };
95 96
96 L2: l2-cache@00a02000 { 97 L2: l2-cache@00a02000 {
diff --git a/arch/arm/boot/dts/kirkwood-iomega_ix2_200.dts b/arch/arm/boot/dts/kirkwood-iomega_ix2_200.dts
index 93c3afbef9ee..3694e94f6e99 100644
--- a/arch/arm/boot/dts/kirkwood-iomega_ix2_200.dts
+++ b/arch/arm/boot/dts/kirkwood-iomega_ix2_200.dts
@@ -96,11 +96,11 @@
96 marvell,function = "gpio"; 96 marvell,function = "gpio";
97 }; 97 };
98 pmx_led_rebuild_brt_ctrl_1: pmx-led-rebuild-brt-ctrl-1 { 98 pmx_led_rebuild_brt_ctrl_1: pmx-led-rebuild-brt-ctrl-1 {
99 marvell,pins = "mpp44"; 99 marvell,pins = "mpp46";
100 marvell,function = "gpio"; 100 marvell,function = "gpio";
101 }; 101 };
102 pmx_led_rebuild_brt_ctrl_2: pmx-led-rebuild-brt-ctrl-2 { 102 pmx_led_rebuild_brt_ctrl_2: pmx-led-rebuild-brt-ctrl-2 {
103 marvell,pins = "mpp45"; 103 marvell,pins = "mpp47";
104 marvell,function = "gpio"; 104 marvell,function = "gpio";
105 }; 105 };
106 106
@@ -157,14 +157,14 @@
157 gpios = <&gpio0 16 0>; 157 gpios = <&gpio0 16 0>;
158 linux,default-trigger = "default-on"; 158 linux,default-trigger = "default-on";
159 }; 159 };
160 health_led1 { 160 rebuild_led {
161 label = "status:white:rebuild_led";
162 gpios = <&gpio1 4 0>;
163 };
164 health_led {
161 label = "status:red:health_led"; 165 label = "status:red:health_led";
162 gpios = <&gpio1 5 0>; 166 gpios = <&gpio1 5 0>;
163 }; 167 };
164 health_led2 {
165 label = "status:white:health_led";
166 gpios = <&gpio1 4 0>;
167 };
168 backup_led { 168 backup_led {
169 label = "status:blue:backup_led"; 169 label = "status:blue:backup_led";
170 gpios = <&gpio0 15 0>; 170 gpios = <&gpio0 15 0>;
diff --git a/arch/arm/mach-imx/clk-imx35.c b/arch/arm/mach-imx/clk-imx35.c
index e13a8fa5e62c..2193c834f55c 100644
--- a/arch/arm/mach-imx/clk-imx35.c
+++ b/arch/arm/mach-imx/clk-imx35.c
@@ -257,6 +257,7 @@ int __init mx35_clocks_init(void)
257 clk_register_clkdev(clk[wdog_gate], NULL, "imx2-wdt.0"); 257 clk_register_clkdev(clk[wdog_gate], NULL, "imx2-wdt.0");
258 clk_register_clkdev(clk[nfc_div], NULL, "imx25-nand.0"); 258 clk_register_clkdev(clk[nfc_div], NULL, "imx25-nand.0");
259 clk_register_clkdev(clk[csi_gate], NULL, "mx3-camera.0"); 259 clk_register_clkdev(clk[csi_gate], NULL, "mx3-camera.0");
260 clk_register_clkdev(clk[admux_gate], "audmux", NULL);
260 261
261 clk_prepare_enable(clk[spba_gate]); 262 clk_prepare_enable(clk[spba_gate]);
262 clk_prepare_enable(clk[gpio1_gate]); 263 clk_prepare_enable(clk[gpio1_gate]);
@@ -265,6 +266,7 @@ int __init mx35_clocks_init(void)
265 clk_prepare_enable(clk[iim_gate]); 266 clk_prepare_enable(clk[iim_gate]);
266 clk_prepare_enable(clk[emi_gate]); 267 clk_prepare_enable(clk[emi_gate]);
267 clk_prepare_enable(clk[max_gate]); 268 clk_prepare_enable(clk[max_gate]);
269 clk_prepare_enable(clk[iomuxc_gate]);
268 270
269 /* 271 /*
270 * SCC is needed to boot via mmc after a watchdog reset. The clock code 272 * SCC is needed to boot via mmc after a watchdog reset. The clock code
diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c
index 2f9ff93a4e61..d38e54f5b6d7 100644
--- a/arch/arm/mach-imx/clk-imx6q.c
+++ b/arch/arm/mach-imx/clk-imx6q.c
@@ -115,7 +115,7 @@ static const char *gpu2d_core_sels[] = { "axi", "pll3_usb_otg", "pll2_pfd0_352m"
115static const char *gpu3d_core_sels[] = { "mmdc_ch0_axi", "pll3_usb_otg", "pll2_pfd1_594m", "pll2_pfd2_396m", }; 115static const char *gpu3d_core_sels[] = { "mmdc_ch0_axi", "pll3_usb_otg", "pll2_pfd1_594m", "pll2_pfd2_396m", };
116static const char *gpu3d_shader_sels[] = { "mmdc_ch0_axi", "pll3_usb_otg", "pll2_pfd1_594m", "pll2_pfd9_720m", }; 116static const char *gpu3d_shader_sels[] = { "mmdc_ch0_axi", "pll3_usb_otg", "pll2_pfd1_594m", "pll2_pfd9_720m", };
117static const char *ipu_sels[] = { "mmdc_ch0_axi", "pll2_pfd2_396m", "pll3_120m", "pll3_pfd1_540m", }; 117static const char *ipu_sels[] = { "mmdc_ch0_axi", "pll2_pfd2_396m", "pll3_120m", "pll3_pfd1_540m", };
118static const char *ldb_di_sels[] = { "pll5_video", "pll2_pfd0_352m", "pll2_pfd2_396m", "mmdc_ch1_axi", "pll3_pfd1_540m", }; 118static const char *ldb_di_sels[] = { "pll5_video", "pll2_pfd0_352m", "pll2_pfd2_396m", "mmdc_ch1_axi", "pll3_usb_otg", };
119static const char *ipu_di_pre_sels[] = { "mmdc_ch0_axi", "pll3_usb_otg", "pll5_video", "pll2_pfd0_352m", "pll2_pfd2_396m", "pll3_pfd1_540m", }; 119static const char *ipu_di_pre_sels[] = { "mmdc_ch0_axi", "pll3_usb_otg", "pll5_video", "pll2_pfd0_352m", "pll2_pfd2_396m", "pll3_pfd1_540m", };
120static const char *ipu1_di0_sels[] = { "ipu1_di0_pre", "dummy", "dummy", "ldb_di0", "ldb_di1", }; 120static const char *ipu1_di0_sels[] = { "ipu1_di0_pre", "dummy", "dummy", "ldb_di0", "ldb_di1", };
121static const char *ipu1_di1_sels[] = { "ipu1_di1_pre", "dummy", "dummy", "ldb_di0", "ldb_di1", }; 121static const char *ipu1_di1_sels[] = { "ipu1_di1_pre", "dummy", "dummy", "ldb_di0", "ldb_di1", };
@@ -443,7 +443,6 @@ int __init mx6q_clocks_init(void)
443 443
444 clk_register_clkdev(clk[gpt_ipg], "ipg", "imx-gpt.0"); 444 clk_register_clkdev(clk[gpt_ipg], "ipg", "imx-gpt.0");
445 clk_register_clkdev(clk[gpt_ipg_per], "per", "imx-gpt.0"); 445 clk_register_clkdev(clk[gpt_ipg_per], "per", "imx-gpt.0");
446 clk_register_clkdev(clk[twd], NULL, "smp_twd");
447 clk_register_clkdev(clk[cko1_sel], "cko1_sel", NULL); 446 clk_register_clkdev(clk[cko1_sel], "cko1_sel", NULL);
448 clk_register_clkdev(clk[ahb], "ahb", NULL); 447 clk_register_clkdev(clk[ahb], "ahb", NULL);
449 clk_register_clkdev(clk[cko1], "cko1", NULL); 448 clk_register_clkdev(clk[cko1], "cko1", NULL);
diff --git a/arch/arm/mach-kirkwood/board-iomega_ix2_200.c b/arch/arm/mach-kirkwood/board-iomega_ix2_200.c
index f655b2637b0e..e5f70415905a 100644
--- a/arch/arm/mach-kirkwood/board-iomega_ix2_200.c
+++ b/arch/arm/mach-kirkwood/board-iomega_ix2_200.c
@@ -20,10 +20,15 @@ static struct mv643xx_eth_platform_data iomega_ix2_200_ge00_data = {
20 .duplex = DUPLEX_FULL, 20 .duplex = DUPLEX_FULL,
21}; 21};
22 22
23static struct mv643xx_eth_platform_data iomega_ix2_200_ge01_data = {
24 .phy_addr = MV643XX_ETH_PHY_ADDR(11),
25};
26
23void __init iomega_ix2_200_init(void) 27void __init iomega_ix2_200_init(void)
24{ 28{
25 /* 29 /*
26 * Basic setup. Needs to be called early. 30 * Basic setup. Needs to be called early.
27 */ 31 */
28 kirkwood_ge01_init(&iomega_ix2_200_ge00_data); 32 kirkwood_ge00_init(&iomega_ix2_200_ge00_data);
33 kirkwood_ge01_init(&iomega_ix2_200_ge01_data);
29} 34}
diff --git a/arch/arm/mach-mvebu/irq-armada-370-xp.c b/arch/arm/mach-mvebu/irq-armada-370-xp.c
index 6a9195e10579..d5970f5a1e8d 100644
--- a/arch/arm/mach-mvebu/irq-armada-370-xp.c
+++ b/arch/arm/mach-mvebu/irq-armada-370-xp.c
@@ -61,7 +61,6 @@ static struct irq_domain *armada_370_xp_mpic_domain;
61 */ 61 */
62static void armada_370_xp_irq_mask(struct irq_data *d) 62static void armada_370_xp_irq_mask(struct irq_data *d)
63{ 63{
64#ifdef CONFIG_SMP
65 irq_hw_number_t hwirq = irqd_to_hwirq(d); 64 irq_hw_number_t hwirq = irqd_to_hwirq(d);
66 65
67 if (hwirq != ARMADA_370_XP_TIMER0_PER_CPU_IRQ) 66 if (hwirq != ARMADA_370_XP_TIMER0_PER_CPU_IRQ)
@@ -70,15 +69,10 @@ static void armada_370_xp_irq_mask(struct irq_data *d)
70 else 69 else
71 writel(hwirq, per_cpu_int_base + 70 writel(hwirq, per_cpu_int_base +
72 ARMADA_370_XP_INT_SET_MASK_OFFS); 71 ARMADA_370_XP_INT_SET_MASK_OFFS);
73#else
74 writel(irqd_to_hwirq(d),
75 per_cpu_int_base + ARMADA_370_XP_INT_SET_MASK_OFFS);
76#endif
77} 72}
78 73
79static void armada_370_xp_irq_unmask(struct irq_data *d) 74static void armada_370_xp_irq_unmask(struct irq_data *d)
80{ 75{
81#ifdef CONFIG_SMP
82 irq_hw_number_t hwirq = irqd_to_hwirq(d); 76 irq_hw_number_t hwirq = irqd_to_hwirq(d);
83 77
84 if (hwirq != ARMADA_370_XP_TIMER0_PER_CPU_IRQ) 78 if (hwirq != ARMADA_370_XP_TIMER0_PER_CPU_IRQ)
@@ -87,10 +81,6 @@ static void armada_370_xp_irq_unmask(struct irq_data *d)
87 else 81 else
88 writel(hwirq, per_cpu_int_base + 82 writel(hwirq, per_cpu_int_base +
89 ARMADA_370_XP_INT_CLEAR_MASK_OFFS); 83 ARMADA_370_XP_INT_CLEAR_MASK_OFFS);
90#else
91 writel(irqd_to_hwirq(d),
92 per_cpu_int_base + ARMADA_370_XP_INT_CLEAR_MASK_OFFS);
93#endif
94} 84}
95 85
96#ifdef CONFIG_SMP 86#ifdef CONFIG_SMP
@@ -146,7 +136,11 @@ static int armada_370_xp_mpic_irq_map(struct irq_domain *h,
146 unsigned int virq, irq_hw_number_t hw) 136 unsigned int virq, irq_hw_number_t hw)
147{ 137{
148 armada_370_xp_irq_mask(irq_get_irq_data(virq)); 138 armada_370_xp_irq_mask(irq_get_irq_data(virq));
149 writel(hw, main_int_base + ARMADA_370_XP_INT_SET_ENABLE_OFFS); 139 if (hw != ARMADA_370_XP_TIMER0_PER_CPU_IRQ)
140 writel(hw, per_cpu_int_base +
141 ARMADA_370_XP_INT_CLEAR_MASK_OFFS);
142 else
143 writel(hw, main_int_base + ARMADA_370_XP_INT_SET_ENABLE_OFFS);
150 irq_set_status_flags(virq, IRQ_LEVEL); 144 irq_set_status_flags(virq, IRQ_LEVEL);
151 145
152 if (hw == ARMADA_370_XP_TIMER0_PER_CPU_IRQ) { 146 if (hw == ARMADA_370_XP_TIMER0_PER_CPU_IRQ) {
diff --git a/arch/arm/mach-s3c24xx/include/mach/irqs.h b/arch/arm/mach-s3c24xx/include/mach/irqs.h
index b7a9f4d469e8..1e73f5fa8659 100644
--- a/arch/arm/mach-s3c24xx/include/mach/irqs.h
+++ b/arch/arm/mach-s3c24xx/include/mach/irqs.h
@@ -188,10 +188,8 @@
188 188
189#if defined(CONFIG_CPU_S3C2416) 189#if defined(CONFIG_CPU_S3C2416)
190#define NR_IRQS (IRQ_S3C2416_I2S1 + 1) 190#define NR_IRQS (IRQ_S3C2416_I2S1 + 1)
191#elif defined(CONFIG_CPU_S3C2443)
192#define NR_IRQS (IRQ_S3C2443_AC97+1)
193#else 191#else
194#define NR_IRQS (IRQ_S3C2440_AC97+1) 192#define NR_IRQS (IRQ_S3C2443_AC97 + 1)
195#endif 193#endif
196 194
197/* compatibility define. */ 195/* compatibility define. */
diff --git a/arch/arm/mach-s3c24xx/irq.c b/arch/arm/mach-s3c24xx/irq.c
index cb9f5e011e73..d8ba9bee4c7e 100644
--- a/arch/arm/mach-s3c24xx/irq.c
+++ b/arch/arm/mach-s3c24xx/irq.c
@@ -500,7 +500,7 @@ struct s3c_irq_intc *s3c24xx_init_intc(struct device_node *np,
500 base = (void *)0xfd000000; 500 base = (void *)0xfd000000;
501 501
502 intc->reg_mask = base + 0xa4; 502 intc->reg_mask = base + 0xa4;
503 intc->reg_pending = base + 0x08; 503 intc->reg_pending = base + 0xa8;
504 irq_num = 20; 504 irq_num = 20;
505 irq_start = S3C2410_IRQ(32); 505 irq_start = S3C2410_IRQ(32);
506 irq_offset = 4; 506 irq_offset = 4;
diff --git a/arch/c6x/include/asm/irqflags.h b/arch/c6x/include/asm/irqflags.h
index cf78e09e18c3..2c71d5634ec2 100644
--- a/arch/c6x/include/asm/irqflags.h
+++ b/arch/c6x/include/asm/irqflags.h
@@ -27,7 +27,7 @@ static inline unsigned long arch_local_save_flags(void)
27/* set interrupt enabled status */ 27/* set interrupt enabled status */
28static inline void arch_local_irq_restore(unsigned long flags) 28static inline void arch_local_irq_restore(unsigned long flags)
29{ 29{
30 asm volatile (" mvc .s2 %0,CSR\n" : : "b"(flags)); 30 asm volatile (" mvc .s2 %0,CSR\n" : : "b"(flags) : "memory");
31} 31}
32 32
33/* unconditionally enable interrupts */ 33/* unconditionally enable interrupts */
diff --git a/arch/ia64/kernel/palinfo.c b/arch/ia64/kernel/palinfo.c
index 77597e5ea60a..79521d5499f9 100644
--- a/arch/ia64/kernel/palinfo.c
+++ b/arch/ia64/kernel/palinfo.c
@@ -849,17 +849,6 @@ static palinfo_entry_t palinfo_entries[]={
849 849
850#define NR_PALINFO_ENTRIES (int) ARRAY_SIZE(palinfo_entries) 850#define NR_PALINFO_ENTRIES (int) ARRAY_SIZE(palinfo_entries)
851 851
852/*
853 * this array is used to keep track of the proc entries we create. This is
854 * required in the module mode when we need to remove all entries. The procfs code
855 * does not do recursion of deletion
856 *
857 * Notes:
858 * - +1 accounts for the cpuN directory entry in /proc/pal
859 */
860#define NR_PALINFO_PROC_ENTRIES (NR_CPUS*(NR_PALINFO_ENTRIES+1))
861
862static struct proc_dir_entry *palinfo_proc_entries[NR_PALINFO_PROC_ENTRIES];
863static struct proc_dir_entry *palinfo_dir; 852static struct proc_dir_entry *palinfo_dir;
864 853
865/* 854/*
@@ -971,60 +960,32 @@ palinfo_read_entry(char *page, char **start, off_t off, int count, int *eof, voi
971static void __cpuinit 960static void __cpuinit
972create_palinfo_proc_entries(unsigned int cpu) 961create_palinfo_proc_entries(unsigned int cpu)
973{ 962{
974# define CPUSTR "cpu%d"
975
976 pal_func_cpu_u_t f; 963 pal_func_cpu_u_t f;
977 struct proc_dir_entry **pdir;
978 struct proc_dir_entry *cpu_dir; 964 struct proc_dir_entry *cpu_dir;
979 int j; 965 int j;
980 char cpustr[sizeof(CPUSTR)]; 966 char cpustr[3+4+1]; /* cpu numbers are up to 4095 on itanic */
981 967 sprintf(cpustr, "cpu%d", cpu);
982
983 /*
984 * we keep track of created entries in a depth-first order for
985 * cleanup purposes. Each entry is stored into palinfo_proc_entries
986 */
987 sprintf(cpustr,CPUSTR, cpu);
988 968
989 cpu_dir = proc_mkdir(cpustr, palinfo_dir); 969 cpu_dir = proc_mkdir(cpustr, palinfo_dir);
970 if (!cpu_dir)
971 return;
990 972
991 f.req_cpu = cpu; 973 f.req_cpu = cpu;
992 974
993 /*
994 * Compute the location to store per cpu entries
995 * We dont store the top level entry in this list, but
996 * remove it finally after removing all cpu entries.
997 */
998 pdir = &palinfo_proc_entries[cpu*(NR_PALINFO_ENTRIES+1)];
999 *pdir++ = cpu_dir;
1000 for (j=0; j < NR_PALINFO_ENTRIES; j++) { 975 for (j=0; j < NR_PALINFO_ENTRIES; j++) {
1001 f.func_id = j; 976 f.func_id = j;
1002 *pdir = create_proc_read_entry( 977 create_proc_read_entry(
1003 palinfo_entries[j].name, 0, cpu_dir, 978 palinfo_entries[j].name, 0, cpu_dir,
1004 palinfo_read_entry, (void *)f.value); 979 palinfo_read_entry, (void *)f.value);
1005 pdir++;
1006 } 980 }
1007} 981}
1008 982
1009static void 983static void
1010remove_palinfo_proc_entries(unsigned int hcpu) 984remove_palinfo_proc_entries(unsigned int hcpu)
1011{ 985{
1012 int j; 986 char cpustr[3+4+1]; /* cpu numbers are up to 4095 on itanic */
1013 struct proc_dir_entry *cpu_dir, **pdir; 987 sprintf(cpustr, "cpu%d", hcpu);
1014 988 remove_proc_subtree(cpustr, palinfo_dir);
1015 pdir = &palinfo_proc_entries[hcpu*(NR_PALINFO_ENTRIES+1)];
1016 cpu_dir = *pdir;
1017 *pdir++=NULL;
1018 for (j=0; j < (NR_PALINFO_ENTRIES); j++) {
1019 if ((*pdir)) {
1020 remove_proc_entry ((*pdir)->name, cpu_dir);
1021 *pdir ++= NULL;
1022 }
1023 }
1024
1025 if (cpu_dir) {
1026 remove_proc_entry(cpu_dir->name, palinfo_dir);
1027 }
1028} 989}
1029 990
1030static int __cpuinit palinfo_cpu_callback(struct notifier_block *nfb, 991static int __cpuinit palinfo_cpu_callback(struct notifier_block *nfb,
@@ -1058,6 +1019,8 @@ palinfo_init(void)
1058 1019
1059 printk(KERN_INFO "PAL Information Facility v%s\n", PALINFO_VERSION); 1020 printk(KERN_INFO "PAL Information Facility v%s\n", PALINFO_VERSION);
1060 palinfo_dir = proc_mkdir("pal", NULL); 1021 palinfo_dir = proc_mkdir("pal", NULL);
1022 if (!palinfo_dir)
1023 return -ENOMEM;
1061 1024
1062 /* Create palinfo dirs in /proc for all online cpus */ 1025 /* Create palinfo dirs in /proc for all online cpus */
1063 for_each_online_cpu(i) { 1026 for_each_online_cpu(i) {
@@ -1073,22 +1036,8 @@ palinfo_init(void)
1073static void __exit 1036static void __exit
1074palinfo_exit(void) 1037palinfo_exit(void)
1075{ 1038{
1076 int i = 0;
1077
1078 /* remove all nodes: depth first pass. Could optimize this */
1079 for_each_online_cpu(i) {
1080 remove_palinfo_proc_entries(i);
1081 }
1082
1083 /*
1084 * Remove the top level entry finally
1085 */
1086 remove_proc_entry(palinfo_dir->name, NULL);
1087
1088 /*
1089 * Unregister from cpu notifier callbacks
1090 */
1091 unregister_hotcpu_notifier(&palinfo_cpu_notifier); 1039 unregister_hotcpu_notifier(&palinfo_cpu_notifier);
1040 remove_proc_subtree("pal", NULL);
1092} 1041}
1093 1042
1094module_init(palinfo_init); 1043module_init(palinfo_init);
diff --git a/arch/m68k/include/asm/gpio.h b/arch/m68k/include/asm/gpio.h
index 4395ffc51fdb..8cc83431805b 100644
--- a/arch/m68k/include/asm/gpio.h
+++ b/arch/m68k/include/asm/gpio.h
@@ -86,4 +86,24 @@ static inline int gpio_cansleep(unsigned gpio)
86 return gpio < MCFGPIO_PIN_MAX ? 0 : __gpio_cansleep(gpio); 86 return gpio < MCFGPIO_PIN_MAX ? 0 : __gpio_cansleep(gpio);
87} 87}
88 88
89static inline int gpio_request_one(unsigned gpio, unsigned long flags, const char *label)
90{
91 int err;
92
93 err = gpio_request(gpio, label);
94 if (err)
95 return err;
96
97 if (flags & GPIOF_DIR_IN)
98 err = gpio_direction_input(gpio);
99 else
100 err = gpio_direction_output(gpio,
101 (flags & GPIOF_INIT_HIGH) ? 1 : 0);
102
103 if (err)
104 gpio_free(gpio);
105
106 return err;
107}
108
89#endif 109#endif
diff --git a/arch/powerpc/platforms/pseries/lpar.c b/arch/powerpc/platforms/pseries/lpar.c
index 0da39fed355a..299731e9036b 100644
--- a/arch/powerpc/platforms/pseries/lpar.c
+++ b/arch/powerpc/platforms/pseries/lpar.c
@@ -186,7 +186,13 @@ static long pSeries_lpar_hpte_remove(unsigned long hpte_group)
186 (0x1UL << 4), &dummy1, &dummy2); 186 (0x1UL << 4), &dummy1, &dummy2);
187 if (lpar_rc == H_SUCCESS) 187 if (lpar_rc == H_SUCCESS)
188 return i; 188 return i;
189 BUG_ON(lpar_rc != H_NOT_FOUND); 189
190 /*
191 * The test for adjunct partition is performed before the
192 * ANDCOND test. H_RESOURCE may be returned, so we need to
193 * check for that as well.
194 */
195 BUG_ON(lpar_rc != H_NOT_FOUND && lpar_rc != H_RESOURCE);
190 196
191 slot_offset++; 197 slot_offset++;
192 slot_offset &= 0x7; 198 slot_offset &= 0x7;
diff --git a/arch/tile/include/asm/irqflags.h b/arch/tile/include/asm/irqflags.h
index 241c0bb60b12..c96f9bbb760d 100644
--- a/arch/tile/include/asm/irqflags.h
+++ b/arch/tile/include/asm/irqflags.h
@@ -40,7 +40,15 @@
40#include <asm/percpu.h> 40#include <asm/percpu.h>
41#include <arch/spr_def.h> 41#include <arch/spr_def.h>
42 42
43/* Set and clear kernel interrupt masks. */ 43/*
44 * Set and clear kernel interrupt masks.
45 *
46 * NOTE: __insn_mtspr() is a compiler builtin marked as a memory
47 * clobber. We rely on it being equivalent to a compiler barrier in
48 * this code since arch_local_irq_save() and friends must act as
49 * compiler barriers. This compiler semantic is baked into enough
50 * places that the compiler will maintain it going forward.
51 */
44#if CHIP_HAS_SPLIT_INTR_MASK() 52#if CHIP_HAS_SPLIT_INTR_MASK()
45#if INT_PERF_COUNT < 32 || INT_AUX_PERF_COUNT < 32 || INT_MEM_ERROR >= 32 53#if INT_PERF_COUNT < 32 || INT_AUX_PERF_COUNT < 32 || INT_MEM_ERROR >= 32
46# error Fix assumptions about which word various interrupts are in 54# error Fix assumptions about which word various interrupts are in
diff --git a/arch/x86/include/asm/paravirt.h b/arch/x86/include/asm/paravirt.h
index 5edd1742cfd0..7361e47db79f 100644
--- a/arch/x86/include/asm/paravirt.h
+++ b/arch/x86/include/asm/paravirt.h
@@ -703,7 +703,10 @@ static inline void arch_leave_lazy_mmu_mode(void)
703 PVOP_VCALL0(pv_mmu_ops.lazy_mode.leave); 703 PVOP_VCALL0(pv_mmu_ops.lazy_mode.leave);
704} 704}
705 705
706void arch_flush_lazy_mmu_mode(void); 706static inline void arch_flush_lazy_mmu_mode(void)
707{
708 PVOP_VCALL0(pv_mmu_ops.lazy_mode.flush);
709}
707 710
708static inline void __set_fixmap(unsigned /* enum fixed_addresses */ idx, 711static inline void __set_fixmap(unsigned /* enum fixed_addresses */ idx,
709 phys_addr_t phys, pgprot_t flags) 712 phys_addr_t phys, pgprot_t flags)
diff --git a/arch/x86/include/asm/paravirt_types.h b/arch/x86/include/asm/paravirt_types.h
index 142236ed83af..b3b0ec1dac86 100644
--- a/arch/x86/include/asm/paravirt_types.h
+++ b/arch/x86/include/asm/paravirt_types.h
@@ -91,6 +91,7 @@ struct pv_lazy_ops {
91 /* Set deferred update mode, used for batching operations. */ 91 /* Set deferred update mode, used for batching operations. */
92 void (*enter)(void); 92 void (*enter)(void);
93 void (*leave)(void); 93 void (*leave)(void);
94 void (*flush)(void);
94}; 95};
95 96
96struct pv_time_ops { 97struct pv_time_ops {
@@ -679,6 +680,7 @@ void paravirt_end_context_switch(struct task_struct *next);
679 680
680void paravirt_enter_lazy_mmu(void); 681void paravirt_enter_lazy_mmu(void);
681void paravirt_leave_lazy_mmu(void); 682void paravirt_leave_lazy_mmu(void);
683void paravirt_flush_lazy_mmu(void);
682 684
683void _paravirt_nop(void); 685void _paravirt_nop(void);
684u32 _paravirt_ident_32(u32); 686u32 _paravirt_ident_32(u32);
diff --git a/arch/x86/include/asm/tlb.h b/arch/x86/include/asm/tlb.h
index 4fef20773b8f..c7797307fc2b 100644
--- a/arch/x86/include/asm/tlb.h
+++ b/arch/x86/include/asm/tlb.h
@@ -7,7 +7,7 @@
7 7
8#define tlb_flush(tlb) \ 8#define tlb_flush(tlb) \
9{ \ 9{ \
10 if (tlb->fullmm == 0) \ 10 if (!tlb->fullmm && !tlb->need_flush_all) \
11 flush_tlb_mm_range(tlb->mm, tlb->start, tlb->end, 0UL); \ 11 flush_tlb_mm_range(tlb->mm, tlb->start, tlb->end, 0UL); \
12 else \ 12 else \
13 flush_tlb_mm_range(tlb->mm, 0UL, TLB_FLUSH_ALL, 0UL); \ 13 flush_tlb_mm_range(tlb->mm, 0UL, TLB_FLUSH_ALL, 0UL); \
diff --git a/arch/x86/kernel/cpu/perf_event_intel_ds.c b/arch/x86/kernel/cpu/perf_event_intel_ds.c
index b05a575d56f4..26830f3af0df 100644
--- a/arch/x86/kernel/cpu/perf_event_intel_ds.c
+++ b/arch/x86/kernel/cpu/perf_event_intel_ds.c
@@ -314,10 +314,11 @@ int intel_pmu_drain_bts_buffer(void)
314 if (top <= at) 314 if (top <= at)
315 return 0; 315 return 0;
316 316
317 memset(&regs, 0, sizeof(regs));
318
317 ds->bts_index = ds->bts_buffer_base; 319 ds->bts_index = ds->bts_buffer_base;
318 320
319 perf_sample_data_init(&data, 0, event->hw.last_period); 321 perf_sample_data_init(&data, 0, event->hw.last_period);
320 regs.ip = 0;
321 322
322 /* 323 /*
323 * Prepare a generic sample, i.e. fill in the invariant fields. 324 * Prepare a generic sample, i.e. fill in the invariant fields.
diff --git a/arch/x86/kernel/paravirt.c b/arch/x86/kernel/paravirt.c
index 17fff18a1031..8bfb335f74bb 100644
--- a/arch/x86/kernel/paravirt.c
+++ b/arch/x86/kernel/paravirt.c
@@ -263,6 +263,18 @@ void paravirt_leave_lazy_mmu(void)
263 leave_lazy(PARAVIRT_LAZY_MMU); 263 leave_lazy(PARAVIRT_LAZY_MMU);
264} 264}
265 265
266void paravirt_flush_lazy_mmu(void)
267{
268 preempt_disable();
269
270 if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU) {
271 arch_leave_lazy_mmu_mode();
272 arch_enter_lazy_mmu_mode();
273 }
274
275 preempt_enable();
276}
277
266void paravirt_start_context_switch(struct task_struct *prev) 278void paravirt_start_context_switch(struct task_struct *prev)
267{ 279{
268 BUG_ON(preemptible()); 280 BUG_ON(preemptible());
@@ -292,18 +304,6 @@ enum paravirt_lazy_mode paravirt_get_lazy_mode(void)
292 return this_cpu_read(paravirt_lazy_mode); 304 return this_cpu_read(paravirt_lazy_mode);
293} 305}
294 306
295void arch_flush_lazy_mmu_mode(void)
296{
297 preempt_disable();
298
299 if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU) {
300 arch_leave_lazy_mmu_mode();
301 arch_enter_lazy_mmu_mode();
302 }
303
304 preempt_enable();
305}
306
307struct pv_info pv_info = { 307struct pv_info pv_info = {
308 .name = "bare hardware", 308 .name = "bare hardware",
309 .paravirt_enabled = 0, 309 .paravirt_enabled = 0,
@@ -475,6 +475,7 @@ struct pv_mmu_ops pv_mmu_ops = {
475 .lazy_mode = { 475 .lazy_mode = {
476 .enter = paravirt_nop, 476 .enter = paravirt_nop,
477 .leave = paravirt_nop, 477 .leave = paravirt_nop,
478 .flush = paravirt_nop,
478 }, 479 },
479 480
480 .set_fixmap = native_set_fixmap, 481 .set_fixmap = native_set_fixmap,
diff --git a/arch/x86/lguest/boot.c b/arch/x86/lguest/boot.c
index 1cbd89ca5569..7114c63f047d 100644
--- a/arch/x86/lguest/boot.c
+++ b/arch/x86/lguest/boot.c
@@ -1334,6 +1334,7 @@ __init void lguest_init(void)
1334 pv_mmu_ops.read_cr3 = lguest_read_cr3; 1334 pv_mmu_ops.read_cr3 = lguest_read_cr3;
1335 pv_mmu_ops.lazy_mode.enter = paravirt_enter_lazy_mmu; 1335 pv_mmu_ops.lazy_mode.enter = paravirt_enter_lazy_mmu;
1336 pv_mmu_ops.lazy_mode.leave = lguest_leave_lazy_mmu_mode; 1336 pv_mmu_ops.lazy_mode.leave = lguest_leave_lazy_mmu_mode;
1337 pv_mmu_ops.lazy_mode.flush = paravirt_flush_lazy_mmu;
1337 pv_mmu_ops.pte_update = lguest_pte_update; 1338 pv_mmu_ops.pte_update = lguest_pte_update;
1338 pv_mmu_ops.pte_update_defer = lguest_pte_update; 1339 pv_mmu_ops.pte_update_defer = lguest_pte_update;
1339 1340
diff --git a/arch/x86/mm/fault.c b/arch/x86/mm/fault.c
index 2b97525246d4..0e883364abb5 100644
--- a/arch/x86/mm/fault.c
+++ b/arch/x86/mm/fault.c
@@ -378,10 +378,12 @@ static noinline __kprobes int vmalloc_fault(unsigned long address)
378 if (pgd_none(*pgd_ref)) 378 if (pgd_none(*pgd_ref))
379 return -1; 379 return -1;
380 380
381 if (pgd_none(*pgd)) 381 if (pgd_none(*pgd)) {
382 set_pgd(pgd, *pgd_ref); 382 set_pgd(pgd, *pgd_ref);
383 else 383 arch_flush_lazy_mmu_mode();
384 } else {
384 BUG_ON(pgd_page_vaddr(*pgd) != pgd_page_vaddr(*pgd_ref)); 385 BUG_ON(pgd_page_vaddr(*pgd) != pgd_page_vaddr(*pgd_ref));
386 }
385 387
386 /* 388 /*
387 * Below here mismatches are bugs because these lower tables 389 * Below here mismatches are bugs because these lower tables
diff --git a/arch/x86/mm/pageattr-test.c b/arch/x86/mm/pageattr-test.c
index b0086567271c..0e38951e65eb 100644
--- a/arch/x86/mm/pageattr-test.c
+++ b/arch/x86/mm/pageattr-test.c
@@ -68,7 +68,7 @@ static int print_split(struct split_state *s)
68 s->gpg++; 68 s->gpg++;
69 i += GPS/PAGE_SIZE; 69 i += GPS/PAGE_SIZE;
70 } else if (level == PG_LEVEL_2M) { 70 } else if (level == PG_LEVEL_2M) {
71 if (!(pte_val(*pte) & _PAGE_PSE)) { 71 if ((pte_val(*pte) & _PAGE_PRESENT) && !(pte_val(*pte) & _PAGE_PSE)) {
72 printk(KERN_ERR 72 printk(KERN_ERR
73 "%lx level %d but not PSE %Lx\n", 73 "%lx level %d but not PSE %Lx\n",
74 addr, level, (u64)pte_val(*pte)); 74 addr, level, (u64)pte_val(*pte));
diff --git a/arch/x86/mm/pageattr.c b/arch/x86/mm/pageattr.c
index 091934e1d0d9..fb4e73ec24d8 100644
--- a/arch/x86/mm/pageattr.c
+++ b/arch/x86/mm/pageattr.c
@@ -467,7 +467,7 @@ try_preserve_large_page(pte_t *kpte, unsigned long address,
467 * We are safe now. Check whether the new pgprot is the same: 467 * We are safe now. Check whether the new pgprot is the same:
468 */ 468 */
469 old_pte = *kpte; 469 old_pte = *kpte;
470 old_prot = new_prot = req_prot = pte_pgprot(old_pte); 470 old_prot = req_prot = pte_pgprot(old_pte);
471 471
472 pgprot_val(req_prot) &= ~pgprot_val(cpa->mask_clr); 472 pgprot_val(req_prot) &= ~pgprot_val(cpa->mask_clr);
473 pgprot_val(req_prot) |= pgprot_val(cpa->mask_set); 473 pgprot_val(req_prot) |= pgprot_val(cpa->mask_set);
@@ -478,12 +478,12 @@ try_preserve_large_page(pte_t *kpte, unsigned long address,
478 * a non present pmd. The canon_pgprot will clear _PAGE_GLOBAL 478 * a non present pmd. The canon_pgprot will clear _PAGE_GLOBAL
479 * for the ancient hardware that doesn't support it. 479 * for the ancient hardware that doesn't support it.
480 */ 480 */
481 if (pgprot_val(new_prot) & _PAGE_PRESENT) 481 if (pgprot_val(req_prot) & _PAGE_PRESENT)
482 pgprot_val(new_prot) |= _PAGE_PSE | _PAGE_GLOBAL; 482 pgprot_val(req_prot) |= _PAGE_PSE | _PAGE_GLOBAL;
483 else 483 else
484 pgprot_val(new_prot) &= ~(_PAGE_PSE | _PAGE_GLOBAL); 484 pgprot_val(req_prot) &= ~(_PAGE_PSE | _PAGE_GLOBAL);
485 485
486 new_prot = canon_pgprot(new_prot); 486 req_prot = canon_pgprot(req_prot);
487 487
488 /* 488 /*
489 * old_pte points to the large page base address. So we need 489 * old_pte points to the large page base address. So we need
@@ -1413,6 +1413,8 @@ void kernel_map_pages(struct page *page, int numpages, int enable)
1413 * but that can deadlock->flush only current cpu: 1413 * but that can deadlock->flush only current cpu:
1414 */ 1414 */
1415 __flush_tlb_all(); 1415 __flush_tlb_all();
1416
1417 arch_flush_lazy_mmu_mode();
1416} 1418}
1417 1419
1418#ifdef CONFIG_HIBERNATION 1420#ifdef CONFIG_HIBERNATION
diff --git a/arch/x86/mm/pgtable.c b/arch/x86/mm/pgtable.c
index 193350b51f90..17fda6a8b3c2 100644
--- a/arch/x86/mm/pgtable.c
+++ b/arch/x86/mm/pgtable.c
@@ -58,6 +58,13 @@ void ___pte_free_tlb(struct mmu_gather *tlb, struct page *pte)
58void ___pmd_free_tlb(struct mmu_gather *tlb, pmd_t *pmd) 58void ___pmd_free_tlb(struct mmu_gather *tlb, pmd_t *pmd)
59{ 59{
60 paravirt_release_pmd(__pa(pmd) >> PAGE_SHIFT); 60 paravirt_release_pmd(__pa(pmd) >> PAGE_SHIFT);
61 /*
62 * NOTE! For PAE, any changes to the top page-directory-pointer-table
63 * entries need a full cr3 reload to flush.
64 */
65#ifdef CONFIG_X86_PAE
66 tlb->need_flush_all = 1;
67#endif
61 tlb_remove_page(tlb, virt_to_page(pmd)); 68 tlb_remove_page(tlb, virt_to_page(pmd));
62} 69}
63 70
diff --git a/arch/x86/xen/mmu.c b/arch/x86/xen/mmu.c
index 6afbb2ca9a0a..e006c18d288a 100644
--- a/arch/x86/xen/mmu.c
+++ b/arch/x86/xen/mmu.c
@@ -1748,14 +1748,18 @@ static void *m2v(phys_addr_t maddr)
1748} 1748}
1749 1749
1750/* Set the page permissions on an identity-mapped pages */ 1750/* Set the page permissions on an identity-mapped pages */
1751static void set_page_prot(void *addr, pgprot_t prot) 1751static void set_page_prot_flags(void *addr, pgprot_t prot, unsigned long flags)
1752{ 1752{
1753 unsigned long pfn = __pa(addr) >> PAGE_SHIFT; 1753 unsigned long pfn = __pa(addr) >> PAGE_SHIFT;
1754 pte_t pte = pfn_pte(pfn, prot); 1754 pte_t pte = pfn_pte(pfn, prot);
1755 1755
1756 if (HYPERVISOR_update_va_mapping((unsigned long)addr, pte, 0)) 1756 if (HYPERVISOR_update_va_mapping((unsigned long)addr, pte, flags))
1757 BUG(); 1757 BUG();
1758} 1758}
1759static void set_page_prot(void *addr, pgprot_t prot)
1760{
1761 return set_page_prot_flags(addr, prot, UVMF_NONE);
1762}
1759#ifdef CONFIG_X86_32 1763#ifdef CONFIG_X86_32
1760static void __init xen_map_identity_early(pmd_t *pmd, unsigned long max_pfn) 1764static void __init xen_map_identity_early(pmd_t *pmd, unsigned long max_pfn)
1761{ 1765{
@@ -1839,12 +1843,12 @@ static void __init check_pt_base(unsigned long *pt_base, unsigned long *pt_end,
1839 unsigned long addr) 1843 unsigned long addr)
1840{ 1844{
1841 if (*pt_base == PFN_DOWN(__pa(addr))) { 1845 if (*pt_base == PFN_DOWN(__pa(addr))) {
1842 set_page_prot((void *)addr, PAGE_KERNEL); 1846 set_page_prot_flags((void *)addr, PAGE_KERNEL, UVMF_INVLPG);
1843 clear_page((void *)addr); 1847 clear_page((void *)addr);
1844 (*pt_base)++; 1848 (*pt_base)++;
1845 } 1849 }
1846 if (*pt_end == PFN_DOWN(__pa(addr))) { 1850 if (*pt_end == PFN_DOWN(__pa(addr))) {
1847 set_page_prot((void *)addr, PAGE_KERNEL); 1851 set_page_prot_flags((void *)addr, PAGE_KERNEL, UVMF_INVLPG);
1848 clear_page((void *)addr); 1852 clear_page((void *)addr);
1849 (*pt_end)--; 1853 (*pt_end)--;
1850 } 1854 }
@@ -2196,6 +2200,7 @@ static const struct pv_mmu_ops xen_mmu_ops __initconst = {
2196 .lazy_mode = { 2200 .lazy_mode = {
2197 .enter = paravirt_enter_lazy_mmu, 2201 .enter = paravirt_enter_lazy_mmu,
2198 .leave = xen_leave_lazy_mmu, 2202 .leave = xen_leave_lazy_mmu,
2203 .flush = paravirt_flush_lazy_mmu,
2199 }, 2204 },
2200 2205
2201 .set_fixmap = xen_set_fixmap, 2206 .set_fixmap = xen_set_fixmap,