Merge tag 'at91-fixes' of git://github.com/at91linux/linux-at91 into fixes

From Nicolas Ferre <nicolas.ferre@atmel.com>:

Two patches for Device Tree on at91sam9x5/NAND.
Two more for fixing PM suspend/resume IRQ on AIC5 and
GPIO used with pinctrl.

* tag 'at91-fixes' of git://github.com/at91linux/linux-at91:
  ARM: at91: fix infinite loop in at91_irq_suspend/resume
  ARM: at91: add gpio suspend/resume support when using pinctrl
  ARM: at91: dt: at91sam9x5: complete NAND pinctrl
  ARM: at91: dt: at91sam9x5: correct NAND pins comments

Includes an update to -rc2

Signed-off-by: Arnd Bergmann <arnd@arndb.de>

47 files changed, 316 insertions, 162 deletions

diff --git a/arch/alpha/boot/head.S b/arch/alpha/boot/head.S
index b06812bcac83..8efb26686d47 100644
--- a/arch/alpha/boot/head.S
+++ b/arch/alpha/boot/head.S
@@ -4,6 +4,7 @@
  * initial bootloader stuff..
  */
 
+#include <asm/pal.h>
 
         .set noreorder
         .globl  __start
diff --git a/arch/arm/boot/compressed/Makefile b/arch/arm/boot/compressed/Makefile
index 5cad8a6dadb0..afed28e37ea5 100644
--- a/arch/arm/boot/compressed/Makefile
+++ b/arch/arm/boot/compressed/Makefile
@@ -120,7 +120,7 @@ ORIG_CFLAGS := $(KBUILD_CFLAGS)
 KBUILD_CFLAGS = $(subst -pg, , $(ORIG_CFLAGS))
 endif
 
-ccflags-y := -fpic -fno-builtin -I$(obj)
+ccflags-y := -fpic -mno-single-pic-base -fno-builtin -I$(obj)
 asflags-y := -Wa,-march=all -DZIMAGE
 
 # Supply kernel BSS size to the decompressor via a linker symbol.
diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi
index aa98e641931f..a98c0d50fbbe 100644
--- a/arch/arm/boot/dts/at91sam9x5.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5.dtsi
@@ -238,8 +238,32 @@
                                 nand {
                                         pinctrl_nand: nand-0 {
                                                 atmel,pins =
-                                                        <3 4 0x0 0x1    /* PD5 gpio RDY pin pull_up */
-                                                         3 5 0x0 0x1>;  /* PD4 gpio enable pin pull_up */
+                                                        <3 0 0x1 0x0    /* PD0 periph A Read Enable */
+                                                         3 1 0x1 0x0    /* PD1 periph A Write Enable */
+                                                         3 2 0x1 0x0    /* PD2 periph A Address Latch Enable */
+                                                         3 3 0x1 0x0    /* PD3 periph A Command Latch Enable */
+                                                         3 4 0x0 0x1    /* PD4 gpio Chip Enable pin pull_up */
+                                                         3 5 0x0 0x1    /* PD5 gpio RDY/BUSY pin pull_up */
+                                                         3 6 0x1 0x0    /* PD6 periph A Data bit 0 */
+                                                         3 7 0x1 0x0    /* PD7 periph A Data bit 1 */
+                                                         3 8 0x1 0x0    /* PD8 periph A Data bit 2 */
+                                                         3 9 0x1 0x0    /* PD9 periph A Data bit 3 */
+                                                         3 10 0x1 0x0   /* PD10 periph A Data bit 4 */
+                                                         3 11 0x1 0x0   /* PD11 periph A Data bit 5 */
+                                                         3 12 0x1 0x0   /* PD12 periph A Data bit 6 */
+                                                         3 13 0x1 0x0>; /* PD13 periph A Data bit 7 */
+                                        };
+
+                                        pinctrl_nand_16bits: nand_16bits-0 {
+                                                atmel,pins =
+                                                        <3 14 0x1 0x0   /* PD14 periph A Data bit 8 */
+                                                         3 15 0x1 0x0   /* PD15 periph A Data bit 9 */
+                                                         3 16 0x1 0x0   /* PD16 periph A Data bit 10 */
+                                                         3 17 0x1 0x0   /* PD17 periph A Data bit 11 */
+                                                         3 18 0x1 0x0   /* PD18 periph A Data bit 12 */
+                                                         3 19 0x1 0x0   /* PD19 periph A Data bit 13 */
+                                                         3 20 0x1 0x0   /* PD20 periph A Data bit 14 */
+                                                         3 21 0x1 0x0>; /* PD21 periph A Data bit 15 */
                                         };
                                 };
 
diff --git a/arch/arm/include/asm/mmu.h b/arch/arm/include/asm/mmu.h
index 9f77e7804f3b..e3d55547e755 100644
--- a/arch/arm/include/asm/mmu.h
+++ b/arch/arm/include/asm/mmu.h
@@ -5,15 +5,15 @@
 
 typedef struct {
 #ifdef CONFIG_CPU_HAS_ASID
-        u64 id;
+        atomic64_t      id;
 #endif
-        unsigned int vmalloc_seq;
+        unsigned int    vmalloc_seq;
 } mm_context_t;
 
 #ifdef CONFIG_CPU_HAS_ASID
 #define ASID_BITS       8
 #define ASID_MASK       ((~0ULL) << ASID_BITS)
-#define ASID(mm)        ((mm)->context.id & ~ASID_MASK)
+#define ASID(mm)        ((mm)->context.id.counter & ~ASID_MASK)
 #else
 #define ASID(mm)        (0)
 #endif
@@ -26,7 +26,7 @@ typedef struct {
  *  modified for 2.6 by Hyok S. Choi <hyok.choi@samsung.com>
  */
 typedef struct {
-        unsigned long           end_brk;
+        unsigned long   end_brk;
 } mm_context_t;
 
 #endif
diff --git a/arch/arm/include/asm/mmu_context.h b/arch/arm/include/asm/mmu_context.h
index e1f644bc7cc5..863a6611323c 100644
--- a/arch/arm/include/asm/mmu_context.h
+++ b/arch/arm/include/asm/mmu_context.h
@@ -25,7 +25,7 @@ void __check_vmalloc_seq(struct mm_struct *mm);
 #ifdef CONFIG_CPU_HAS_ASID
 
 void check_and_switch_context(struct mm_struct *mm, struct task_struct *tsk);
-#define init_new_context(tsk,mm)        ({ mm->context.id = 0; })
+#define init_new_context(tsk,mm)        ({ atomic64_set(&mm->context.id, 0); 0; })
 
 #else   /* !CONFIG_CPU_HAS_ASID */
 
diff --git a/arch/arm/include/asm/tlbflush.h b/arch/arm/include/asm/tlbflush.h
index 6e924d3a77eb..4db8c8820f0d 100644
--- a/arch/arm/include/asm/tlbflush.h
+++ b/arch/arm/include/asm/tlbflush.h
@@ -34,10 +34,13 @@
 #define TLB_V6_D_ASID   (1 << 17)
 #define TLB_V6_I_ASID   (1 << 18)
 
+#define TLB_V6_BP       (1 << 19)
+
 /* Unified Inner Shareable TLB operations (ARMv7 MP extensions) */
-#define TLB_V7_UIS_PAGE (1 << 19)
-#define TLB_V7_UIS_FULL (1 << 20)
-#define TLB_V7_UIS_ASID (1 << 21)
+#define TLB_V7_UIS_PAGE (1 << 20)
+#define TLB_V7_UIS_FULL (1 << 21)
+#define TLB_V7_UIS_ASID (1 << 22)
+#define TLB_V7_UIS_BP   (1 << 23)
 
 #define TLB_BARRIER     (1 << 28)
 #define TLB_L2CLEAN_FR  (1 << 29)               /* Feroceon */
@@ -150,7 +153,8 @@
 #define v6wbi_tlb_flags (TLB_WB | TLB_DCLEAN | TLB_BARRIER | \
                          TLB_V6_I_FULL | TLB_V6_D_FULL | \
                          TLB_V6_I_PAGE | TLB_V6_D_PAGE | \
-                         TLB_V6_I_ASID | TLB_V6_D_ASID)
+                         TLB_V6_I_ASID | TLB_V6_D_ASID | \
+                         TLB_V6_BP)
 
 #ifdef CONFIG_CPU_TLB_V6
 # define v6wbi_possible_flags   v6wbi_tlb_flags
@@ -166,9 +170,11 @@
 #endif
 
 #define v7wbi_tlb_flags_smp     (TLB_WB | TLB_DCLEAN | TLB_BARRIER | \
-                         TLB_V7_UIS_FULL | TLB_V7_UIS_PAGE | TLB_V7_UIS_ASID)
+                                 TLB_V7_UIS_FULL | TLB_V7_UIS_PAGE | \
+                                 TLB_V7_UIS_ASID | TLB_V7_UIS_BP)
 #define v7wbi_tlb_flags_up      (TLB_WB | TLB_DCLEAN | TLB_BARRIER | \
-                         TLB_V6_U_FULL | TLB_V6_U_PAGE | TLB_V6_U_ASID)
+                                 TLB_V6_U_FULL | TLB_V6_U_PAGE | \
+                                 TLB_V6_U_ASID | TLB_V6_BP)
 
 #ifdef CONFIG_CPU_TLB_V7
 
@@ -430,6 +436,20 @@ static inline void local_flush_tlb_kernel_page(unsigned long kaddr)
         }
 }
 
+static inline void local_flush_bp_all(void)
+{
+        const int zero = 0;
+        const unsigned int __tlb_flag = __cpu_tlb_flags;
+
+        if (tlb_flag(TLB_V7_UIS_BP))
+                asm("mcr p15, 0, %0, c7, c1, 6" : : "r" (zero));
+        else if (tlb_flag(TLB_V6_BP))
+                asm("mcr p15, 0, %0, c7, c5, 6" : : "r" (zero));
+
+        if (tlb_flag(TLB_BARRIER))
+                isb();
+}
+
 /*
  *      flush_pmd_entry
  *
@@ -480,6 +500,7 @@ static inline void clean_pmd_entry(void *pmd)
 #define flush_tlb_kernel_page   local_flush_tlb_kernel_page
 #define flush_tlb_range         local_flush_tlb_range
 #define flush_tlb_kernel_range  local_flush_tlb_kernel_range
+#define flush_bp_all            local_flush_bp_all
 #else
 extern void flush_tlb_all(void);
 extern void flush_tlb_mm(struct mm_struct *mm);
@@ -487,6 +508,7 @@ extern void flush_tlb_page(struct vm_area_struct *vma, unsigned long uaddr);
 extern void flush_tlb_kernel_page(unsigned long kaddr);
 extern void flush_tlb_range(struct vm_area_struct *vma, unsigned long start, unsigned long end);
 extern void flush_tlb_kernel_range(unsigned long start, unsigned long end);
+extern void flush_bp_all(void);
 #endif
 
 /*
diff --git a/arch/arm/include/uapi/asm/unistd.h b/arch/arm/include/uapi/asm/unistd.h
index 4da7cde70b5d..af33b44990ed 100644
--- a/arch/arm/include/uapi/asm/unistd.h
+++ b/arch/arm/include/uapi/asm/unistd.h
@@ -404,7 +404,7 @@
 #define __NR_setns                      (__NR_SYSCALL_BASE+375)
 #define __NR_process_vm_readv           (__NR_SYSCALL_BASE+376)
 #define __NR_process_vm_writev          (__NR_SYSCALL_BASE+377)
-                                        /* 378 for kcmp */
+#define __NR_kcmp                       (__NR_SYSCALL_BASE+378)
 #define __NR_finit_module               (__NR_SYSCALL_BASE+379)
 
 /*
diff --git a/arch/arm/kernel/asm-offsets.c b/arch/arm/kernel/asm-offsets.c
index 5ce738b43508..923eec7105cf 100644
--- a/arch/arm/kernel/asm-offsets.c
+++ b/arch/arm/kernel/asm-offsets.c
@@ -110,7 +110,7 @@ int main(void)
   BLANK();
 #endif
 #ifdef CONFIG_CPU_HAS_ASID
-  DEFINE(MM_CONTEXT_ID,         offsetof(struct mm_struct, context.id));
+  DEFINE(MM_CONTEXT_ID,         offsetof(struct mm_struct, context.id.counter));
   BLANK();
 #endif
   DEFINE(VMA_VM_MM,             offsetof(struct vm_area_struct, vm_mm));
diff --git a/arch/arm/kernel/calls.S b/arch/arm/kernel/calls.S
index 0cc57611fc4f..c6ca7e376773 100644
--- a/arch/arm/kernel/calls.S
+++ b/arch/arm/kernel/calls.S
@@ -387,7 +387,7 @@
 /* 375 */       CALL(sys_setns)
                 CALL(sys_process_vm_readv)
                 CALL(sys_process_vm_writev)
-                CALL(sys_ni_syscall)    /* reserved for sys_kcmp */
+                CALL(sys_kcmp)
                 CALL(sys_finit_module)
 #ifndef syscalls_counted
 .equ syscalls_padding, ((NR_syscalls + 3) & ~3) - NR_syscalls
diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S
index 486a15ae9011..e0eb9a1cae77 100644
--- a/arch/arm/kernel/head.S
+++ b/arch/arm/kernel/head.S
@@ -184,13 +184,22 @@ __create_page_tables:
         orr     r3, r3, #3                      @ PGD block type
         mov     r6, #4                          @ PTRS_PER_PGD
         mov     r7, #1 << (55 - 32)             @ L_PGD_SWAPPER
-1:      str     r3, [r0], #4                    @ set bottom PGD entry bits
+1:
+#ifdef CONFIG_CPU_ENDIAN_BE8
         str     r7, [r0], #4                    @ set top PGD entry bits
+        str     r3, [r0], #4                    @ set bottom PGD entry bits
+#else
+        str     r3, [r0], #4                    @ set bottom PGD entry bits
+        str     r7, [r0], #4                    @ set top PGD entry bits
+#endif
         add     r3, r3, #0x1000                 @ next PMD table
         subs    r6, r6, #1
         bne     1b
 
         add     r4, r4, #0x1000                 @ point to the PMD tables
+#ifdef CONFIG_CPU_ENDIAN_BE8
+        add     r4, r4, #4                      @ we only write the bottom word
+#endif
 #endif
 
         ldr     r7, [r10, #PROCINFO_MM_MMUFLAGS] @ mm_mmuflags
@@ -258,6 +267,11 @@ __create_page_tables:
         addne   r6, r6, #1 << SECTION_SHIFT
         strne   r6, [r3]
 
+#if defined(CONFIG_LPAE) && defined(CONFIG_CPU_ENDIAN_BE8)
+        sub     r4, r4, #4                      @ Fixup page table pointer
+                                                @ for 64-bit descriptors
+#endif
+
 #ifdef CONFIG_DEBUG_LL
 #if !defined(CONFIG_DEBUG_ICEDCC) && !defined(CONFIG_DEBUG_SEMIHOSTING)
         /*
@@ -276,13 +290,17 @@ __create_page_tables:
         orr     r3, r7, r3, lsl #SECTION_SHIFT
 #ifdef CONFIG_ARM_LPAE
         mov     r7, #1 << (54 - 32)             @ XN
+#ifdef CONFIG_CPU_ENDIAN_BE8
+        str     r7, [r0], #4
+        str     r3, [r0], #4
 #else
-        orr     r3, r3, #PMD_SECT_XN
-#endif
         str     r3, [r0], #4
-#ifdef CONFIG_ARM_LPAE
         str     r7, [r0], #4
 #endif
+#else
+        orr     r3, r3, #PMD_SECT_XN
+        str     r3, [r0], #4
+#endif
 
 #else /* CONFIG_DEBUG_ICEDCC || CONFIG_DEBUG_SEMIHOSTING */
         /* we don't need any serial debugging mappings */
diff --git a/arch/arm/kernel/hw_breakpoint.c b/arch/arm/kernel/hw_breakpoint.c
index 5eae53e7a2e1..96093b75ab90 100644
--- a/arch/arm/kernel/hw_breakpoint.c
+++ b/arch/arm/kernel/hw_breakpoint.c
@@ -1023,7 +1023,7 @@ out_mdbgen:
 static int __cpuinit dbg_reset_notify(struct notifier_block *self,
                                       unsigned long action, void *cpu)
 {
-        if (action == CPU_ONLINE)
+        if ((action & ~CPU_TASKS_FROZEN) == CPU_ONLINE)
                 smp_call_function_single((int)cpu, reset_ctrl_regs, NULL, 1);
 
         return NOTIFY_OK;
diff --git a/arch/arm/kernel/perf_event.c b/arch/arm/kernel/perf_event.c
index 31e0eb353cd8..146157dfe27c 100644
--- a/arch/arm/kernel/perf_event.c
+++ b/arch/arm/kernel/perf_event.c
@@ -400,7 +400,7 @@ __hw_perf_event_init(struct perf_event *event)
         }
 
         if (event->group_leader != event) {
-                if (validate_group(event) != 0);
+                if (validate_group(event) != 0)
                         return -EINVAL;
         }
 
@@ -484,7 +484,7 @@ const struct dev_pm_ops armpmu_dev_pm_ops = {
         SET_RUNTIME_PM_OPS(armpmu_runtime_suspend, armpmu_runtime_resume, NULL)
 };
 
-static void __init armpmu_init(struct arm_pmu *armpmu)
+static void armpmu_init(struct arm_pmu *armpmu)
 {
         atomic_set(&armpmu->active_events, 0);
         mutex_init(&armpmu->reserve_mutex);
diff --git a/arch/arm/kernel/perf_event_v7.c b/arch/arm/kernel/perf_event_v7.c
index 8c79a9e70b83..039cffb053a7 100644
--- a/arch/arm/kernel/perf_event_v7.c
+++ b/arch/arm/kernel/perf_event_v7.c
@@ -774,7 +774,7 @@ static const unsigned armv7_a7_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
 /*
  * PMXEVTYPER: Event selection reg
  */
-#define ARMV7_EVTYPE_MASK       0xc00000ff      /* Mask for writable bits */
+#define ARMV7_EVTYPE_MASK       0xc80000ff      /* Mask for writable bits */
 #define ARMV7_EVTYPE_EVENT      0xff            /* Mask for EVENT bits */
 
 /*
diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c
index 1bdfd87c8e41..31644f1978d5 100644
--- a/arch/arm/kernel/smp.c
+++ b/arch/arm/kernel/smp.c
@@ -285,6 +285,7 @@ asmlinkage void __cpuinit secondary_start_kernel(void)
          * switch away from it before attempting any exclusive accesses.
          */
         cpu_switch_mm(mm->pgd, mm);
+        local_flush_bp_all();
         enter_lazy_tlb(mm, current);
         local_flush_tlb_all();
 
diff --git a/arch/arm/kernel/smp_tlb.c b/arch/arm/kernel/smp_tlb.c
index 02c5d2ce23bf..bd0300531399 100644
--- a/arch/arm/kernel/smp_tlb.c
+++ b/arch/arm/kernel/smp_tlb.c
@@ -64,6 +64,11 @@ static inline void ipi_flush_tlb_kernel_range(void *arg)
         local_flush_tlb_kernel_range(ta->ta_start, ta->ta_end);
 }
 
+static inline void ipi_flush_bp_all(void *ignored)
+{
+        local_flush_bp_all();
+}
+
 void flush_tlb_all(void)
 {
         if (tlb_ops_need_broadcast())
@@ -127,3 +132,10 @@ void flush_tlb_kernel_range(unsigned long start, unsigned long end)
                 local_flush_tlb_kernel_range(start, end);
 }
 
+void flush_bp_all(void)
+{
+        if (tlb_ops_need_broadcast())
+                on_each_cpu(ipi_flush_bp_all, NULL, 1);
+        else
+                local_flush_bp_all();
+}
diff --git a/arch/arm/kernel/smp_twd.c b/arch/arm/kernel/smp_twd.c
index c092115d903a..3f2565037480 100644
--- a/arch/arm/kernel/smp_twd.c
+++ b/arch/arm/kernel/smp_twd.c
@@ -22,6 +22,7 @@
 #include <linux/of_irq.h>
 #include <linux/of_address.h>
 
+#include <asm/smp_plat.h>
 #include <asm/smp_twd.h>
 #include <asm/localtimer.h>
 
@@ -373,6 +374,9 @@ void __init twd_local_timer_of_register(void)
         struct device_node *np;
         int err;
 
+        if (!is_smp() || !setup_max_cpus)
+                return;
+
         np = of_find_matching_node(NULL, twd_of_match);
         if (!np)
                 return;
diff --git a/arch/arm/kernel/suspend.c b/arch/arm/kernel/suspend.c
index 358bca3a995e..c59c97ea8268 100644
--- a/arch/arm/kernel/suspend.c
+++ b/arch/arm/kernel/suspend.c
@@ -68,6 +68,7 @@ int cpu_suspend(unsigned long arg, int (*fn)(unsigned long))
         ret = __cpu_suspend(arg, fn);
         if (ret == 0) {
                 cpu_switch_mm(mm->pgd, mm);
+                local_flush_bp_all();
                 local_flush_tlb_all();
         }
 
diff --git a/arch/arm/lib/memset.S b/arch/arm/lib/memset.S
index 650d5923ab83..d912e7397ecc 100644
--- a/arch/arm/lib/memset.S
+++ b/arch/arm/lib/memset.S
@@ -19,9 +19,9 @@
 1:      subs    r2, r2, #4              @ 1 do we have enough
         blt     5f                      @ 1 bytes to align with?
         cmp     r3, #2                  @ 1
-        strltb  r1, [r0], #1            @ 1
-        strleb  r1, [r0], #1            @ 1
-        strb    r1, [r0], #1            @ 1
+        strltb  r1, [ip], #1            @ 1
+        strleb  r1, [ip], #1            @ 1
+        strb    r1, [ip], #1            @ 1
         add     r2, r2, r3              @ 1 (r2 = r2 - (4 - r3))
 /*
  * The pointer is now aligned and the length is adjusted.  Try doing the
@@ -29,10 +29,14 @@
  */
 
 ENTRY(memset)
-        ands    r3, r0, #3              @ 1 unaligned?
+/*
+ * Preserve the contents of r0 for the return value.
+ */
+        mov     ip, r0
+        ands    r3, ip, #3              @ 1 unaligned?
         bne     1b                      @ 1
 /*
- * we know that the pointer in r0 is aligned to a word boundary.
+ * we know that the pointer in ip is aligned to a word boundary.
  */
         orr     r1, r1, r1, lsl #8
         orr     r1, r1, r1, lsl #16
@@ -43,29 +47,28 @@ ENTRY(memset)
 #if ! CALGN(1)+0
 
 /*
- * We need an extra register for this loop - save the return address and
- * use the LR
+ * We need 2 extra registers for this loop - use r8 and the LR
  */
-        str     lr, [sp, #-4]!
-        mov     ip, r1
+        stmfd   sp!, {r8, lr}
+        mov     r8, r1
         mov     lr, r1
 
 2:      subs    r2, r2, #64
-        stmgeia r0!, {r1, r3, ip, lr}   @ 64 bytes at a time.
-        stmgeia r0!, {r1, r3, ip, lr}
-        stmgeia r0!, {r1, r3, ip, lr}
-        stmgeia r0!, {r1, r3, ip, lr}
+        stmgeia ip!, {r1, r3, r8, lr}   @ 64 bytes at a time.
+        stmgeia ip!, {r1, r3, r8, lr}
+        stmgeia ip!, {r1, r3, r8, lr}
+        stmgeia ip!, {r1, r3, r8, lr}
         bgt     2b
-        ldmeqfd sp!, {pc}               @ Now <64 bytes to go.
+        ldmeqfd sp!, {r8, pc}           @ Now <64 bytes to go.
 /*
  * No need to correct the count; we're only testing bits from now on
  */
         tst     r2, #32
-        stmneia r0!, {r1, r3, ip, lr}
-        stmneia r0!, {r1, r3, ip, lr}
+        stmneia ip!, {r1, r3, r8, lr}
+        stmneia ip!, {r1, r3, r8, lr}
         tst     r2, #16
-        stmneia r0!, {r1, r3, ip, lr}
-        ldr     lr, [sp], #4
+        stmneia ip!, {r1, r3, r8, lr}
+        ldmfd   sp!, {r8, lr}
 
 #else
 
@@ -74,54 +77,54 @@ ENTRY(memset)
  * whole cache lines at once.
  */
 
-        stmfd   sp!, {r4-r7, lr}
+        stmfd   sp!, {r4-r8, lr}
         mov     r4, r1
         mov     r5, r1
         mov     r6, r1
         mov     r7, r1
-        mov     ip, r1
+        mov     r8, r1
         mov     lr, r1
 
         cmp     r2, #96
-        tstgt   r0, #31
+        tstgt   ip, #31
         ble     3f
 
-        and     ip, r0, #31
-        rsb     ip, ip, #32
-        sub     r2, r2, ip
-        movs    ip, ip, lsl #(32 - 4)
-        stmcsia r0!, {r4, r5, r6, r7}
-        stmmiia r0!, {r4, r5}
-        tst     ip, #(1 << 30)
-        mov     ip, r1
-        strne   r1, [r0], #4
+        and     r8, ip, #31
+        rsb     r8, r8, #32
+        sub     r2, r2, r8
+        movs    r8, r8, lsl #(32 - 4)
+        stmcsia ip!, {r4, r5, r6, r7}
+        stmmiia ip!, {r4, r5}
+        tst     r8, #(1 << 30)
+        mov     r8, r1
+        strne   r1, [ip], #4
 
 3:      subs    r2, r2, #64
-        stmgeia r0!, {r1, r3-r7, ip, lr}
-        stmgeia r0!, {r1, r3-r7, ip, lr}
+        stmgeia ip!, {r1, r3-r8, lr}
+        stmgeia ip!, {r1, r3-r8, lr}
         bgt     3b
-        ldmeqfd sp!, {r4-r7, pc}
+        ldmeqfd sp!, {r4-r8, pc}
 
         tst     r2, #32
-        stmneia r0!, {r1, r3-r7, ip, lr}
+        stmneia ip!, {r1, r3-r8, lr}
         tst     r2, #16
-        stmneia r0!, {r4-r7}
-        ldmfd   sp!, {r4-r7, lr}
+        stmneia ip!, {r4-r7}
+        ldmfd   sp!, {r4-r8, lr}
 
 #endif
 
 4:      tst     r2, #8
-        stmneia r0!, {r1, r3}
+        stmneia ip!, {r1, r3}
         tst     r2, #4
-        strne   r1, [r0], #4
+        strne   r1, [ip], #4
 /*
  * When we get here, we've got less than 4 bytes to zero.  We
  * may have an unaligned pointer as well.
  */
 5:      tst     r2, #2
-        strneb  r1, [r0], #1
-        strneb  r1, [r0], #1
+        strneb  r1, [ip], #1
+        strneb  r1, [ip], #1
         tst     r2, #1
-        strneb  r1, [r0], #1
+        strneb  r1, [ip], #1
         mov     pc, lr
 ENDPROC(memset)
diff --git a/arch/arm/mach-at91/include/mach/gpio.h b/arch/arm/mach-at91/include/mach/gpio.h
index eed465ab0dd7..5fc23771c154 100644
--- a/arch/arm/mach-at91/include/mach/gpio.h
+++ b/arch/arm/mach-at91/include/mach/gpio.h
@@ -209,6 +209,14 @@ extern int at91_get_gpio_value(unsigned pin);
 extern void at91_gpio_suspend(void);
 extern void at91_gpio_resume(void);
 
+#ifdef CONFIG_PINCTRL_AT91
+extern void at91_pinctrl_gpio_suspend(void);
+extern void at91_pinctrl_gpio_resume(void);
+#else
+static inline void at91_pinctrl_gpio_suspend(void) {}
+static inline void at91_pinctrl_gpio_resume(void) {}
+#endif
+
 #endif  /* __ASSEMBLY__ */
 
 #endif
diff --git a/arch/arm/mach-at91/irq.c b/arch/arm/mach-at91/irq.c
index 8e210262aeee..e0ca59171022 100644
--- a/arch/arm/mach-at91/irq.c
+++ b/arch/arm/mach-at91/irq.c
@@ -92,23 +92,21 @@ static int at91_aic_set_wake(struct irq_data *d, unsigned value)
 
 void at91_irq_suspend(void)
 {
-        int i = 0, bit;
+        int bit = -1;
 
         if (has_aic5()) {
                 /* disable enabled irqs */
-                while ((bit = find_next_bit(backups, n_irqs, i)) < n_irqs) {
+                while ((bit = find_next_bit(backups, n_irqs, bit + 1)) < n_irqs) {
                         at91_aic_write(AT91_AIC5_SSR,
                                        bit & AT91_AIC5_INTSEL_MSK);
                         at91_aic_write(AT91_AIC5_IDCR, 1);
-                        i = bit;
                 }
                 /* enable wakeup irqs */
-                i = 0;
-                while ((bit = find_next_bit(wakeups, n_irqs, i)) < n_irqs) {
+                bit = -1;
+                while ((bit = find_next_bit(wakeups, n_irqs, bit + 1)) < n_irqs) {
                         at91_aic_write(AT91_AIC5_SSR,
                                        bit & AT91_AIC5_INTSEL_MSK);
                         at91_aic_write(AT91_AIC5_IECR, 1);
-                        i = bit;
                 }
         } else {
                 at91_aic_write(AT91_AIC_IDCR, *backups);
@@ -118,23 +116,21 @@ void at91_irq_suspend(void)
 
 void at91_irq_resume(void)
 {
-        int i = 0, bit;
+        int bit = -1;
 
         if (has_aic5()) {
                 /* disable wakeup irqs */
-                while ((bit = find_next_bit(wakeups, n_irqs, i)) < n_irqs) {
+                while ((bit = find_next_bit(wakeups, n_irqs, bit + 1)) < n_irqs) {
                         at91_aic_write(AT91_AIC5_SSR,
                                        bit & AT91_AIC5_INTSEL_MSK);
                         at91_aic_write(AT91_AIC5_IDCR, 1);
-                        i = bit;
                 }
                 /* enable irqs disabled for suspend */
-                i = 0;
-                while ((bit = find_next_bit(backups, n_irqs, i)) < n_irqs) {
+                bit = -1;
+                while ((bit = find_next_bit(backups, n_irqs, bit + 1)) < n_irqs) {
                         at91_aic_write(AT91_AIC5_SSR,
                                        bit & AT91_AIC5_INTSEL_MSK);
                         at91_aic_write(AT91_AIC5_IECR, 1);
-                        i = bit;
                 }
         } else {
                 at91_aic_write(AT91_AIC_IDCR, *wakeups);
diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c
index adb6db888a1f..73f1f250403a 100644
--- a/arch/arm/mach-at91/pm.c
+++ b/arch/arm/mach-at91/pm.c
@@ -201,7 +201,10 @@ extern u32 at91_slow_clock_sz;
 
 static int at91_pm_enter(suspend_state_t state)
 {
-        at91_gpio_suspend();
+        if (of_have_populated_dt())
+                at91_pinctrl_gpio_suspend();
+        else
+                at91_gpio_suspend();
         at91_irq_suspend();
 
         pr_debug("AT91: PM - wake mask %08x, pm state %d\n",
@@ -286,7 +289,10 @@ static int at91_pm_enter(suspend_state_t state)
 error:
         target_state = PM_SUSPEND_ON;
         at91_irq_resume();
-        at91_gpio_resume();
+        if (of_have_populated_dt())
+                at91_pinctrl_gpio_resume();
+        else
+                at91_gpio_resume();
         return 0;
 }
 
diff --git a/arch/arm/mach-netx/generic.c b/arch/arm/mach-netx/generic.c
index 27c2cb7ab813..1504b68f4c66 100644
--- a/arch/arm/mach-netx/generic.c
+++ b/arch/arm/mach-netx/generic.c
@@ -168,7 +168,7 @@ void __init netx_init_irq(void)
 {
         int irq;
 
-        vic_init(io_p2v(NETX_PA_VIC), 0, ~0, 0);
+        vic_init(io_p2v(NETX_PA_VIC), NETX_IRQ_VIC_START, ~0, 0);
 
         for (irq = NETX_IRQ_HIF_CHAINED(0); irq <= NETX_IRQ_HIF_LAST; irq++) {
                 irq_set_chip_and_handler(irq, &netx_hif_chip,
diff --git a/arch/arm/mach-netx/include/mach/irqs.h b/arch/arm/mach-netx/include/mach/irqs.h
index 6ce914d54a30..8f74a844a775 100644
--- a/arch/arm/mach-netx/include/mach/irqs.h
+++ b/arch/arm/mach-netx/include/mach/irqs.h
@@ -17,42 +17,42 @@
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  */
 
-#define NETX_IRQ_VIC_START   0
-#define NETX_IRQ_SOFTINT     0
-#define NETX_IRQ_TIMER0      1
-#define NETX_IRQ_TIMER1      2
-#define NETX_IRQ_TIMER2      3
-#define NETX_IRQ_SYSTIME_NS  4
-#define NETX_IRQ_SYSTIME_S   5
-#define NETX_IRQ_GPIO_15     6
-#define NETX_IRQ_WATCHDOG    7
-#define NETX_IRQ_UART0       8
-#define NETX_IRQ_UART1       9
-#define NETX_IRQ_UART2      10
-#define NETX_IRQ_USB        11
-#define NETX_IRQ_SPI        12
-#define NETX_IRQ_I2C        13
-#define NETX_IRQ_LCD        14
-#define NETX_IRQ_HIF        15
-#define NETX_IRQ_GPIO_0_14  16
-#define NETX_IRQ_XPEC0      17
-#define NETX_IRQ_XPEC1      18
-#define NETX_IRQ_XPEC2      19
-#define NETX_IRQ_XPEC3      20
-#define NETX_IRQ_XPEC(no)   (17 + (no))
-#define NETX_IRQ_MSYNC0     21
-#define NETX_IRQ_MSYNC1     22
-#define NETX_IRQ_MSYNC2     23
-#define NETX_IRQ_MSYNC3     24
-#define NETX_IRQ_IRQ_PHY    25
-#define NETX_IRQ_ISO_AREA   26
+#define NETX_IRQ_VIC_START      64
+#define NETX_IRQ_SOFTINT        (NETX_IRQ_VIC_START + 0)
+#define NETX_IRQ_TIMER0         (NETX_IRQ_VIC_START + 1)
+#define NETX_IRQ_TIMER1         (NETX_IRQ_VIC_START + 2)
+#define NETX_IRQ_TIMER2         (NETX_IRQ_VIC_START + 3)
+#define NETX_IRQ_SYSTIME_NS     (NETX_IRQ_VIC_START + 4)
+#define NETX_IRQ_SYSTIME_S      (NETX_IRQ_VIC_START + 5)
+#define NETX_IRQ_GPIO_15        (NETX_IRQ_VIC_START + 6)
+#define NETX_IRQ_WATCHDOG       (NETX_IRQ_VIC_START + 7)
+#define NETX_IRQ_UART0          (NETX_IRQ_VIC_START + 8)
+#define NETX_IRQ_UART1          (NETX_IRQ_VIC_START + 9)
+#define NETX_IRQ_UART2          (NETX_IRQ_VIC_START + 10)
+#define NETX_IRQ_USB            (NETX_IRQ_VIC_START + 11)
+#define NETX_IRQ_SPI            (NETX_IRQ_VIC_START + 12)
+#define NETX_IRQ_I2C            (NETX_IRQ_VIC_START + 13)
+#define NETX_IRQ_LCD            (NETX_IRQ_VIC_START + 14)
+#define NETX_IRQ_HIF            (NETX_IRQ_VIC_START + 15)
+#define NETX_IRQ_GPIO_0_14      (NETX_IRQ_VIC_START + 16)
+#define NETX_IRQ_XPEC0          (NETX_IRQ_VIC_START + 17)
+#define NETX_IRQ_XPEC1          (NETX_IRQ_VIC_START + 18)
+#define NETX_IRQ_XPEC2          (NETX_IRQ_VIC_START + 19)
+#define NETX_IRQ_XPEC3          (NETX_IRQ_VIC_START + 20)
+#define NETX_IRQ_XPEC(no)       (NETX_IRQ_VIC_START + 17 + (no))
+#define NETX_IRQ_MSYNC0         (NETX_IRQ_VIC_START + 21)
+#define NETX_IRQ_MSYNC1         (NETX_IRQ_VIC_START + 22)
+#define NETX_IRQ_MSYNC2         (NETX_IRQ_VIC_START + 23)
+#define NETX_IRQ_MSYNC3         (NETX_IRQ_VIC_START + 24)
+#define NETX_IRQ_IRQ_PHY        (NETX_IRQ_VIC_START + 25)
+#define NETX_IRQ_ISO_AREA       (NETX_IRQ_VIC_START + 26)
 /* int 27 is reserved */
 /* int 28 is reserved */
-#define NETX_IRQ_TIMER3     29
-#define NETX_IRQ_TIMER4     30
+#define NETX_IRQ_TIMER3         (NETX_IRQ_VIC_START + 29)
+#define NETX_IRQ_TIMER4         (NETX_IRQ_VIC_START + 30)
 /* int 31 is reserved */
 
-#define NETX_IRQS 32
+#define NETX_IRQS               (NETX_IRQ_VIC_START + 32)
 
 /* for multiplexed irqs on gpio 0..14 */
 #define NETX_IRQ_GPIO(x) (NETX_IRQS + (x))
diff --git a/arch/arm/mm/context.c b/arch/arm/mm/context.c
index 7a0511191f6b..a5a4b2bc42ba 100644
--- a/arch/arm/mm/context.c
+++ b/arch/arm/mm/context.c
@@ -152,9 +152,9 @@ static int is_reserved_asid(u64 asid)
         return 0;
 }
 
-static void new_context(struct mm_struct *mm, unsigned int cpu)
+static u64 new_context(struct mm_struct *mm, unsigned int cpu)
 {
-        u64 asid = mm->context.id;
+        u64 asid = atomic64_read(&mm->context.id);
         u64 generation = atomic64_read(&asid_generation);
 
         if (asid != 0 && is_reserved_asid(asid)) {
@@ -181,13 +181,14 @@ static void new_context(struct mm_struct *mm, unsigned int cpu)
                 cpumask_clear(mm_cpumask(mm));
         }
 
-        mm->context.id = asid;
+        return asid;
 }
 
 void check_and_switch_context(struct mm_struct *mm, struct task_struct *tsk)
 {
         unsigned long flags;
         unsigned int cpu = smp_processor_id();
+        u64 asid;
 
         if (unlikely(mm->context.vmalloc_seq != init_mm.context.vmalloc_seq))
                 __check_vmalloc_seq(mm);
@@ -198,20 +199,26 @@ void check_and_switch_context(struct mm_struct *mm, struct task_struct *tsk)
          */
         cpu_set_reserved_ttbr0();
 
-        if (!((mm->context.id ^ atomic64_read(&asid_generation)) >> ASID_BITS)
-            && atomic64_xchg(&per_cpu(active_asids, cpu), mm->context.id))
+        asid = atomic64_read(&mm->context.id);
+        if (!((asid ^ atomic64_read(&asid_generation)) >> ASID_BITS)
+            && atomic64_xchg(&per_cpu(active_asids, cpu), asid))
                 goto switch_mm_fastpath;
 
         raw_spin_lock_irqsave(&cpu_asid_lock, flags);
         /* Check that our ASID belongs to the current generation. */
-        if ((mm->context.id ^ atomic64_read(&asid_generation)) >> ASID_BITS)
-                new_context(mm, cpu);
-
-        atomic64_set(&per_cpu(active_asids, cpu), mm->context.id);
-        cpumask_set_cpu(cpu, mm_cpumask(mm));
+        asid = atomic64_read(&mm->context.id);
+        if ((asid ^ atomic64_read(&asid_generation)) >> ASID_BITS) {
+                asid = new_context(mm, cpu);
+                atomic64_set(&mm->context.id, asid);
+        }
 
-        if (cpumask_test_and_clear_cpu(cpu, &tlb_flush_pending))
+        if (cpumask_test_and_clear_cpu(cpu, &tlb_flush_pending)) {
+                local_flush_bp_all();
                 local_flush_tlb_all();
+        }
+
+        atomic64_set(&per_cpu(active_asids, cpu), asid);
+        cpumask_set_cpu(cpu, mm_cpumask(mm));
         raw_spin_unlock_irqrestore(&cpu_asid_lock, flags);
 
 switch_mm_fastpath:
diff --git a/arch/arm/mm/idmap.c b/arch/arm/mm/idmap.c
index 2dffc010cc41..5ee505c937d1 100644
--- a/arch/arm/mm/idmap.c
+++ b/arch/arm/mm/idmap.c
@@ -141,6 +141,7 @@ void setup_mm_for_reboot(void)
 {
         /* Switch to the identity mapping. */
         cpu_switch_mm(idmap_pgd, &init_mm);
+        local_flush_bp_all();
 
 #ifdef CONFIG_CPU_HAS_ASID
         /*
diff --git a/arch/arm/mm/proc-v7-3level.S b/arch/arm/mm/proc-v7-3level.S
index 50bf1dafc9ea..6ffd78c0f9ab 100644
--- a/arch/arm/mm/proc-v7-3level.S
+++ b/arch/arm/mm/proc-v7-3level.S
@@ -48,7 +48,7 @@
 ENTRY(cpu_v7_switch_mm)
 #ifdef CONFIG_MMU
         mmid    r1, r1                          @ get mm->context.id
-        and     r3, r1, #0xff
+        asid    r3, r1
         mov     r3, r3, lsl #(48 - 32)          @ ASID
         mcrr    p15, 0, r0, r3, c2              @ set TTB 0
         isb
diff --git a/arch/ia64/kernel/perfmon.c b/arch/ia64/kernel/perfmon.c
index 433f5e8a2cd1..2eda28414abb 100644
--- a/arch/ia64/kernel/perfmon.c
+++ b/arch/ia64/kernel/perfmon.c
@@ -619,6 +619,7 @@ static struct file_system_type pfm_fs_type = {
         .mount    = pfmfs_mount,
         .kill_sb  = kill_anon_super,
 };
+MODULE_ALIAS_FS("pfmfs");
 
 DEFINE_PER_CPU(unsigned long, pfm_syst_info);
 DEFINE_PER_CPU(struct task_struct *, pmu_owner);
diff --git a/arch/metag/include/asm/elf.h b/arch/metag/include/asm/elf.h
index d63b9d0e57dd..d2baf6961794 100644
--- a/arch/metag/include/asm/elf.h
+++ b/arch/metag/include/asm/elf.h
@@ -100,9 +100,6 @@ typedef unsigned long elf_fpregset_t;
 
 #define ELF_PLATFORM  (NULL)
 
-#define SET_PERSONALITY(ex) \
-        set_personality(PER_LINUX | (current->personality & (~PER_MASK)))
-
 #define STACK_RND_MASK (0)
 
 #ifdef CONFIG_METAG_USER_TCM
diff --git a/arch/metag/mm/Kconfig b/arch/metag/mm/Kconfig
index cd7f2f2ad416..975f2f4e3ecf 100644
--- a/arch/metag/mm/Kconfig
+++ b/arch/metag/mm/Kconfig
@@ -40,6 +40,7 @@ endchoice
 
 config NUMA
         bool "Non Uniform Memory Access (NUMA) Support"
+        select ARCH_WANT_NUMA_VARIABLE_LOCALITY
         help
           Some Meta systems have MMU-mappable on-chip memories with
           lower latencies than main memory. This enables support for
diff --git a/arch/powerpc/crypto/sha1-powerpc-asm.S b/arch/powerpc/crypto/sha1-powerpc-asm.S
index a5f8264d2d3c..125e16520061 100644
--- a/arch/powerpc/crypto/sha1-powerpc-asm.S
+++ b/arch/powerpc/crypto/sha1-powerpc-asm.S
@@ -113,7 +113,7 @@
         STEPUP4((t)+16, fn)
 
 _GLOBAL(powerpc_sha_transform)
-        PPC_STLU r1,-STACKFRAMESIZE(r1)
+        PPC_STLU r1,-INT_FRAME_SIZE(r1)
         SAVE_8GPRS(14, r1)
         SAVE_10GPRS(22, r1)
 
@@ -175,5 +175,5 @@ _GLOBAL(powerpc_sha_transform)
 
         REST_8GPRS(14, r1)
         REST_10GPRS(22, r1)
-        addi    r1,r1,STACKFRAMESIZE
+        addi    r1,r1,INT_FRAME_SIZE
         blr
diff --git a/arch/powerpc/include/asm/bitops.h b/arch/powerpc/include/asm/bitops.h
index ef918a2328bb..08bd299c75b1 100644
--- a/arch/powerpc/include/asm/bitops.h
+++ b/arch/powerpc/include/asm/bitops.h
@@ -52,8 +52,6 @@
 #define smp_mb__before_clear_bit()      smp_mb()
 #define smp_mb__after_clear_bit()       smp_mb()
 
-#define BITOP_LE_SWIZZLE        ((BITS_PER_LONG-1) & ~0x7)
-
 /* Macro for generating the ***_bits() functions */
 #define DEFINE_BITOP(fn, op, prefix, postfix)   \
 static __inline__ void fn(unsigned long mask,   \
diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
index e66586122030..c9c67fc888c9 100644
--- a/arch/powerpc/include/asm/reg.h
+++ b/arch/powerpc/include/asm/reg.h
@@ -266,7 +266,8 @@
 #define SPRN_HSRR0      0x13A   /* Hypervisor Save/Restore 0 */
 #define SPRN_HSRR1      0x13B   /* Hypervisor Save/Restore 1 */
 #define SPRN_FSCR       0x099   /* Facility Status & Control Register */
-#define FSCR_TAR        (1<<8)  /* Enable Target Adress Register */
+#define   FSCR_TAR      (1 << (63-55)) /* Enable Target Address Register */
+#define   FSCR_DSCR     (1 << (63-61)) /* Enable Data Stream Control Register */
 #define SPRN_TAR        0x32f   /* Target Address Register */
 #define SPRN_LPCR       0x13E   /* LPAR Control Register */
 #define   LPCR_VPM0     (1ul << (63-0))
diff --git a/arch/powerpc/include/asm/systbl.h b/arch/powerpc/include/asm/systbl.h
index 535b6d8a41cc..ebbec52d21bd 100644
--- a/arch/powerpc/include/asm/systbl.h
+++ b/arch/powerpc/include/asm/systbl.h
@@ -358,3 +358,4 @@ SYSCALL_SPU(setns)
 COMPAT_SYS(process_vm_readv)
 COMPAT_SYS(process_vm_writev)
 SYSCALL(finit_module)
+SYSCALL(ni_syscall) /* sys_kcmp */
diff --git a/arch/powerpc/include/asm/unistd.h b/arch/powerpc/include/asm/unistd.h
index f25b5c45c435..1487f0f12293 100644
--- a/arch/powerpc/include/asm/unistd.h
+++ b/arch/powerpc/include/asm/unistd.h
@@ -12,7 +12,7 @@
 #include <uapi/asm/unistd.h>
 
 
-#define __NR_syscalls           354
+#define __NR_syscalls           355
 
 #define __NR__exit __NR_exit
 #define NR_syscalls     __NR_syscalls
diff --git a/arch/powerpc/include/uapi/asm/unistd.h b/arch/powerpc/include/uapi/asm/unistd.h
index 8c478c6c6b1e..74cb4d72d673 100644
--- a/arch/powerpc/include/uapi/asm/unistd.h
+++ b/arch/powerpc/include/uapi/asm/unistd.h
@@ -376,6 +376,7 @@
 #define __NR_process_vm_readv   351
 #define __NR_process_vm_writev  352
 #define __NR_finit_module       353
+#define __NR_kcmp               354
 
 
 #endif /* _UAPI_ASM_POWERPC_UNISTD_H_ */
diff --git a/arch/powerpc/kernel/cpu_setup_power.S b/arch/powerpc/kernel/cpu_setup_power.S
index d29facbf9a28..ea847abb0d0a 100644
--- a/arch/powerpc/kernel/cpu_setup_power.S
+++ b/arch/powerpc/kernel/cpu_setup_power.S
@@ -48,6 +48,7 @@ _GLOBAL(__restore_cpu_power7)
 
 _GLOBAL(__setup_cpu_power8)
         mflr    r11
+        bl      __init_FSCR
         bl      __init_hvmode_206
         mtlr    r11
         beqlr
@@ -56,13 +57,13 @@ _GLOBAL(__setup_cpu_power8)
         mfspr   r3,SPRN_LPCR
         oris    r3, r3, LPCR_AIL_3@h
         bl      __init_LPCR
-        bl      __init_FSCR
         bl      __init_TLB
         mtlr    r11
         blr
 
 _GLOBAL(__restore_cpu_power8)
         mflr    r11
+        bl      __init_FSCR
         mfmsr   r3
         rldicl. r0,r3,4,63
         beqlr
@@ -115,7 +116,7 @@ __init_LPCR:
 
 __init_FSCR:
         mfspr   r3,SPRN_FSCR
-        ori     r3,r3,FSCR_TAR
+        ori     r3,r3,FSCR_TAR|FSCR_DSCR
         mtspr   SPRN_FSCR,r3
         blr
 
diff --git a/arch/powerpc/kernel/exceptions-64s.S b/arch/powerpc/kernel/exceptions-64s.S
index a8a5361fb70c..87ef8f5ee5bc 100644
--- a/arch/powerpc/kernel/exceptions-64s.S
+++ b/arch/powerpc/kernel/exceptions-64s.S
@@ -74,13 +74,13 @@ END_FTR_SECTION_IFSET(CPU_FTR_REAL_LE)				\
         mflr    r10 ;                                           \
         ld      r12,PACAKBASE(r13) ;                            \
         LOAD_HANDLER(r12, system_call_entry_direct) ;           \
-        mtlr    r12 ;                                           \
+        mtctr   r12 ;                                           \
         mfspr   r12,SPRN_SRR1 ;                                 \
         /* Re-use of r13... No spare regs to do this */ \
         li      r13,MSR_RI ;                                    \
         mtmsrd  r13,1 ;                                         \
         GET_PACA(r13) ; /* get r13 back */                      \
-        blr ;
+        bctr ;
 #else
         /* We can branch directly */
 #define SYSCALL_PSERIES_2_DIRECT                                \
diff --git a/arch/powerpc/platforms/cell/spufs/inode.c b/arch/powerpc/platforms/cell/spufs/inode.c
index 863184b182f4..3f3bb4cdbbec 100644
--- a/arch/powerpc/platforms/cell/spufs/inode.c
+++ b/arch/powerpc/platforms/cell/spufs/inode.c
@@ -749,6 +749,7 @@ static struct file_system_type spufs_type = {
         .mount = spufs_mount,
         .kill_sb = kill_litter_super,
 };
+MODULE_ALIAS_FS("spufs");
 
 static int __init spufs_init(void)
 {
diff --git a/arch/powerpc/platforms/pseries/hvcserver.c b/arch/powerpc/platforms/pseries/hvcserver.c
index fcf4b4cbeaf3..4557e91626c4 100644
--- a/arch/powerpc/platforms/pseries/hvcserver.c
+++ b/arch/powerpc/platforms/pseries/hvcserver.c
@@ -23,6 +23,7 @@
 #include <linux/list.h>
 #include <linux/module.h>
 #include <linux/slab.h>
+#include <linux/string.h>
 
 #include <asm/hvcall.h>
 #include <asm/hvcserver.h>
@@ -188,9 +189,9 @@ int hvcs_get_partner_info(uint32_t unit_address, struct list_head *head,
                         = (unsigned int)last_p_partition_ID;
 
                 /* copy the Null-term char too */
-                strncpy(&next_partner_info->location_code[0],
+                strlcpy(&next_partner_info->location_code[0],
                         (char *)&pi_buff[2],
-                        strlen((char *)&pi_buff[2]) + 1);
+                        sizeof(next_partner_info->location_code));
 
                 list_add_tail(&(next_partner_info->node), head);
                 next_partner_info = NULL;
diff --git a/arch/s390/hypfs/inode.c b/arch/s390/hypfs/inode.c
index 8538015ed4a0..5f7d7ba2874c 100644
--- a/arch/s390/hypfs/inode.c
+++ b/arch/s390/hypfs/inode.c
@@ -456,6 +456,7 @@ static struct file_system_type hypfs_type = {
         .mount          = hypfs_mount,
         .kill_sb        = hypfs_kill_super
 };
+MODULE_ALIAS_FS("s390_hypfs");
 
 static const struct super_operations hypfs_s_ops = {
         .statfs         = simple_statfs,
diff --git a/arch/tile/include/asm/compat.h b/arch/tile/include/asm/compat.h
index 001d418a8957..78f1f2ded86c 100644
--- a/arch/tile/include/asm/compat.h
+++ b/arch/tile/include/asm/compat.h
@@ -288,6 +288,9 @@ long compat_sys_sync_file_range2(int fd, unsigned int flags,
 long compat_sys_fallocate(int fd, int mode,
                           u32 offset_lo, u32 offset_hi,
                           u32 len_lo, u32 len_hi);
+long compat_sys_llseek(unsigned int fd, unsigned int offset_high,
+                       unsigned int offset_low, loff_t __user * result,
+                       unsigned int origin);
 
 /* Assembly trampoline to avoid clobbering r0. */
 long _compat_sys_rt_sigreturn(void);
diff --git a/arch/tile/kernel/compat.c b/arch/tile/kernel/compat.c
index 7f72401b4f45..6ea4cdb3c6a0 100644
--- a/arch/tile/kernel/compat.c
+++ b/arch/tile/kernel/compat.c
@@ -32,50 +32,65 @@
  * adapt the usual convention.
  */
 
-long compat_sys_truncate64(char __user *filename, u32 dummy, u32 low, u32 high)
+COMPAT_SYSCALL_DEFINE4(truncate64, char __user *, filename, u32, dummy,
+                       u32, low, u32, high)
 {
         return sys_truncate(filename, ((loff_t)high << 32) | low);
 }
 
-long compat_sys_ftruncate64(unsigned int fd, u32 dummy, u32 low, u32 high)
+COMPAT_SYSCALL_DEFINE4(ftruncate64, unsigned int, fd, u32, dummy,
+                       u32, low, u32, high)
 {
         return sys_ftruncate(fd, ((loff_t)high << 32) | low);
 }
 
-long compat_sys_pread64(unsigned int fd, char __user *ubuf, size_t count,
-                        u32 dummy, u32 low, u32 high)
+COMPAT_SYSCALL_DEFINE6(pread64, unsigned int, fd, char __user *, ubuf,
+                       size_t, count, u32, dummy, u32, low, u32, high)
 {
         return sys_pread64(fd, ubuf, count, ((loff_t)high << 32) | low);
 }
 
-long compat_sys_pwrite64(unsigned int fd, char __user *ubuf, size_t count,
-                         u32 dummy, u32 low, u32 high)
+COMPAT_SYSCALL_DEFINE6(pwrite64, unsigned int, fd, char __user *, ubuf,
+                       size_t, count, u32, dummy, u32, low, u32, high)
 {
         return sys_pwrite64(fd, ubuf, count, ((loff_t)high << 32) | low);
 }
 
-long compat_sys_lookup_dcookie(u32 low, u32 high, char __user *buf, size_t len)
+COMPAT_SYSCALL_DEFINE4(lookup_dcookie, u32, low, u32, high,
+                       char __user *, buf, size_t, len)
 {
         return sys_lookup_dcookie(((loff_t)high << 32) | low, buf, len);
 }
 
-long compat_sys_sync_file_range2(int fd, unsigned int flags,
-                                 u32 offset_lo, u32 offset_hi,
-                                 u32 nbytes_lo, u32 nbytes_hi)
+COMPAT_SYSCALL_DEFINE6(sync_file_range2, int, fd, unsigned int, flags,
+                       u32, offset_lo, u32, offset_hi,
+                       u32, nbytes_lo, u32, nbytes_hi)
 {
         return sys_sync_file_range(fd, ((loff_t)offset_hi << 32) | offset_lo,
                                    ((loff_t)nbytes_hi << 32) | nbytes_lo,
                                    flags);
 }
 
-long compat_sys_fallocate(int fd, int mode,
-                          u32 offset_lo, u32 offset_hi,
-                          u32 len_lo, u32 len_hi)
+COMPAT_SYSCALL_DEFINE6(fallocate, int, fd, int, mode,
+                       u32, offset_lo, u32, offset_hi,
+                       u32, len_lo, u32, len_hi)
 {
         return sys_fallocate(fd, mode, ((loff_t)offset_hi << 32) | offset_lo,
                              ((loff_t)len_hi << 32) | len_lo);
 }
 
+/*
+ * Avoid bug in generic sys_llseek() that specifies offset_high and
+ * offset_low as "unsigned long", thus making it possible to pass
+ * a sign-extended high 32 bits in offset_low.
+ */
+COMPAT_SYSCALL_DEFINE5(llseek, unsigned int, fd, unsigned int, offset_high,
+                       unsigned int, offset_low, loff_t __user *, result,
+                       unsigned int, origin)
+{
+        return sys_llseek(fd, offset_high, offset_low, result, origin);
+}
+ 
 /* Provide the compat syscall number to call mapping. */
 #undef __SYSCALL
 #define __SYSCALL(nr, call) [nr] = (call),
@@ -83,6 +98,7 @@ long compat_sys_fallocate(int fd, int mode,
 /* See comments in sys.c */
 #define compat_sys_fadvise64_64 sys32_fadvise64_64
 #define compat_sys_readahead sys32_readahead
+#define sys_llseek compat_sys_llseek
 
 /* Call the assembly trampolines where necessary. */
 #define compat_sys_rt_sigreturn _compat_sys_rt_sigreturn
diff --git a/arch/x86/include/asm/bootparam_utils.h b/arch/x86/include/asm/bootparam_utils.h
index 5b5e9cb774b5..653668d140f9 100644
--- a/arch/x86/include/asm/bootparam_utils.h
+++ b/arch/x86/include/asm/bootparam_utils.h
@@ -14,13 +14,29 @@
  * analysis of kexec-tools; if other broken bootloaders initialize a
  * different set of fields we will need to figure out how to disambiguate.
  *
+ * Note: efi_info is commonly left uninitialized, but that field has a
+ * private magic, so it is better to leave it unchanged.
  */
 static void sanitize_boot_params(struct boot_params *boot_params)
 {
+        /* 
+         * IMPORTANT NOTE TO BOOTLOADER AUTHORS: do not simply clear
+         * this field.  The purpose of this field is to guarantee
+         * compliance with the x86 boot spec located in
+         * Documentation/x86/boot.txt .  That spec says that the
+         * *whole* structure should be cleared, after which only the
+         * portion defined by struct setup_header (boot_params->hdr)
+         * should be copied in.
+         *
+         * If you're having an issue because the sentinel is set, you
+         * need to change the whole structure to be cleared, not this
+         * (or any other) individual field, or you will soon have
+         * problems again.
+         */
         if (boot_params->sentinel) {
-                /*fields in boot_params are not valid, clear them */
+                /* fields in boot_params are left uninitialized, clear them */
                 memset(&boot_params->olpc_ofw_header, 0,
-                       (char *)&boot_params->alt_mem_k -
+                       (char *)&boot_params->efi_info -
                         (char *)&boot_params->olpc_ofw_header);
                 memset(&boot_params->kbd_status, 0,
                        (char *)&boot_params->hdr -
diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c
index 84d32855f65c..90d8cc930f5e 100644
--- a/arch/x86/kernel/setup.c
+++ b/arch/x86/kernel/setup.c
@@ -171,9 +171,15 @@ static struct resource bss_resource = {
 
 #ifdef CONFIG_X86_32
 /* cpu data as detected by the assembly code in head.S */
-struct cpuinfo_x86 new_cpu_data __cpuinitdata = {0, 0, 0, 0, -1, 1, 0, 0, -1};
+struct cpuinfo_x86 new_cpu_data __cpuinitdata = {
+        .wp_works_ok = -1,
+        .fdiv_bug = -1,
+};
 /* common cpu data for all cpus */
-struct cpuinfo_x86 boot_cpu_data __read_mostly = {0, 0, 0, 0, -1, 1, 0, 0, -1};
+struct cpuinfo_x86 boot_cpu_data __read_mostly = {
+        .wp_works_ok = -1,
+        .fdiv_bug = -1,
+};
 EXPORT_SYMBOL(boot_cpu_data);
 
 unsigned int def_to_bigsmp;
diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c
index a6ceaedc396a..9f190a2a00e9 100644
--- a/arch/x86/kernel/smpboot.c
+++ b/arch/x86/kernel/smpboot.c
@@ -1365,9 +1365,8 @@ static inline void mwait_play_dead(void)
         unsigned int eax, ebx, ecx, edx;
         unsigned int highest_cstate = 0;
         unsigned int highest_subcstate = 0;
-        int i;
         void *mwait_ptr;
-        struct cpuinfo_x86 *c = __this_cpu_ptr(&cpu_info);
+        int i;
 
         if (!this_cpu_has(X86_FEATURE_MWAIT))
                 return;
diff --git a/arch/x86/mm/init.c b/arch/x86/mm/init.c
index 4903a03ae876..59b7fc453277 100644
--- a/arch/x86/mm/init.c
+++ b/arch/x86/mm/init.c
@@ -410,9 +410,8 @@ void __init init_mem_mapping(void)
         /* the ISA range is always mapped regardless of memory holes */
         init_memory_mapping(0, ISA_END_ADDRESS);
 
-        /* xen has big range in reserved near end of ram, skip it at first */
-        addr = memblock_find_in_range(ISA_END_ADDRESS, end, PMD_SIZE,
-                         PAGE_SIZE);
+        /* xen has big range in reserved near end of ram, skip it at first.*/
+        addr = memblock_find_in_range(ISA_END_ADDRESS, end, PMD_SIZE, PMD_SIZE);
         real_end = addr + PMD_SIZE;
 
         /* step_size need to be small so pgt_buf from BRK could cover it */
diff --git a/arch/x86/mm/pat.c b/arch/x86/mm/pat.c
index 2610bd93c896..657438858e83 100644
--- a/arch/x86/mm/pat.c
+++ b/arch/x86/mm/pat.c
@@ -563,6 +563,13 @@ int kernel_map_sync_memtype(u64 base, unsigned long size, unsigned long flags)
         if (base > __pa(high_memory-1))
                 return 0;
 
+        /*
+         * some areas in the middle of the kernel identity range
+         * are not mapped, like the PCI space.
+         */
+        if (!page_is_ram(base >> PAGE_SHIFT))
+                return 0;
+
         id_sz = (__pa(high_memory-1) <= base + size) ?
                                 __pa(high_memory) - base :
                                 size;