diff options
author | Grant Likely <grant.likely@linaro.org> | 2013-11-01 13:50:50 -0400 |
---|---|---|
committer | Grant Likely <grant.likely@linaro.org> | 2013-11-03 18:16:35 -0500 |
commit | 78119fd1068cc068f6112a57a5f6de0e5b20245a (patch) | |
tree | 8e0726dc0a7527c0e7f571c7953e3115c7bded7f /arch | |
parent | 0976c946a610d06e907335b7a3afa6db046f8e1b (diff) |
of/irq: Fix bug in interrupt parsing refactor.
Commit 2361613206e6, "of/irq: Refactor interrupt-map parsing" introduced
a bug. The irq parsing will fail for some nodes that don't have a reg
property. It is fixed by deferring the check for reg until it is
actually needed. Also adjust the testcase data to catch the bug.
Signed-off-by: Grant Likely <grant.likely@linaro.org>
Tested-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Ming Lei <tom.leiming@gmail.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Cc: Rob Herring <rob.herring@calxeda.com>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/boot/dts/testcases/tests-interrupts.dtsi | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/arch/arm/boot/dts/testcases/tests-interrupts.dtsi b/arch/arm/boot/dts/testcases/tests-interrupts.dtsi index 560d6bf680b6..c843720bd3e5 100644 --- a/arch/arm/boot/dts/testcases/tests-interrupts.dtsi +++ b/arch/arm/boot/dts/testcases/tests-interrupts.dtsi | |||
@@ -2,7 +2,8 @@ | |||
2 | / { | 2 | / { |
3 | testcase-data { | 3 | testcase-data { |
4 | interrupts { | 4 | interrupts { |
5 | #address-cells = <0>; | 5 | #address-cells = <1>; |
6 | #size-cells = <1>; | ||
6 | test_intc0: intc0 { | 7 | test_intc0: intc0 { |
7 | interrupt-controller; | 8 | interrupt-controller; |
8 | #interrupt-cells = <1>; | 9 | #interrupt-cells = <1>; |
@@ -29,8 +30,7 @@ | |||
29 | 30 | ||
30 | test_intmap1: intmap1 { | 31 | test_intmap1: intmap1 { |
31 | #interrupt-cells = <2>; | 32 | #interrupt-cells = <2>; |
32 | #address-cells = <0>; | 33 | interrupt-map = <0x5000 1 2 &test_intc0 15>; |
33 | interrupt-map = <1 2 &test_intc0 15>; | ||
34 | }; | 34 | }; |
35 | 35 | ||
36 | interrupts0 { | 36 | interrupts0 { |
@@ -44,6 +44,7 @@ | |||
44 | }; | 44 | }; |
45 | 45 | ||
46 | interrupts-extended0 { | 46 | interrupts-extended0 { |
47 | reg = <0x5000 0x100>; | ||
47 | interrupts-extended = <&test_intc0 1>, | 48 | interrupts-extended = <&test_intc0 1>, |
48 | <&test_intc1 2 3 4>, | 49 | <&test_intc1 2 3 4>, |
49 | <&test_intc2 5 6>, | 50 | <&test_intc2 5 6>, |