diff options
author | Peter Zijlstra <a.p.zijlstra@chello.nl> | 2010-03-05 07:49:35 -0500 |
---|---|---|
committer | Ingo Molnar <mingo@elte.hu> | 2010-03-10 07:23:35 -0500 |
commit | 74846d35b24b6efd61bb88a0a750b6bb257e6e78 (patch) | |
tree | 82b2a428ce246a1ceaf390077d38a618fd6e01cb /arch | |
parent | 3c44780b220e876b01e39d4028cd6f4205fbf5d6 (diff) |
perf, x86: Clear the LBRs on init
Some CPUs have errata where the LBR is not cleared on Power-On. So always
clear the LBRs before use.
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Arnaldo Carvalho de Melo <acme@infradead.org>
Cc: paulus@samba.org
Cc: eranian@google.com
Cc: robert.richter@amd.com
Cc: fweisbec@gmail.com
LKML-Reference: <20100305154128.966563424@chello.nl>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/x86/kernel/cpu/perf_event_intel.c | 18 | ||||
-rw-r--r-- | arch/x86/kernel/cpu/perf_event_intel_lbr.c | 3 |
2 files changed, 19 insertions, 2 deletions
diff --git a/arch/x86/kernel/cpu/perf_event_intel.c b/arch/x86/kernel/cpu/perf_event_intel.c index 224c952071f9..c135ed735b22 100644 --- a/arch/x86/kernel/cpu/perf_event_intel.c +++ b/arch/x86/kernel/cpu/perf_event_intel.c | |||
@@ -767,6 +767,20 @@ static __initconst struct x86_pmu core_pmu = { | |||
767 | .event_constraints = intel_core_event_constraints, | 767 | .event_constraints = intel_core_event_constraints, |
768 | }; | 768 | }; |
769 | 769 | ||
770 | static void intel_pmu_cpu_starting(int cpu) | ||
771 | { | ||
772 | init_debug_store_on_cpu(cpu); | ||
773 | /* | ||
774 | * Deal with CPUs that don't clear their LBRs on power-up. | ||
775 | */ | ||
776 | intel_pmu_lbr_reset(); | ||
777 | } | ||
778 | |||
779 | static void intel_pmu_cpu_dying(int cpu) | ||
780 | { | ||
781 | fini_debug_store_on_cpu(cpu); | ||
782 | } | ||
783 | |||
770 | static __initconst struct x86_pmu intel_pmu = { | 784 | static __initconst struct x86_pmu intel_pmu = { |
771 | .name = "Intel", | 785 | .name = "Intel", |
772 | .handle_irq = intel_pmu_handle_irq, | 786 | .handle_irq = intel_pmu_handle_irq, |
@@ -788,8 +802,8 @@ static __initconst struct x86_pmu intel_pmu = { | |||
788 | .max_period = (1ULL << 31) - 1, | 802 | .max_period = (1ULL << 31) - 1, |
789 | .get_event_constraints = intel_get_event_constraints, | 803 | .get_event_constraints = intel_get_event_constraints, |
790 | 804 | ||
791 | .cpu_starting = init_debug_store_on_cpu, | 805 | .cpu_starting = intel_pmu_cpu_starting, |
792 | .cpu_dying = fini_debug_store_on_cpu, | 806 | .cpu_dying = intel_pmu_cpu_dying, |
793 | }; | 807 | }; |
794 | 808 | ||
795 | static void intel_clovertown_quirks(void) | 809 | static void intel_clovertown_quirks(void) |
diff --git a/arch/x86/kernel/cpu/perf_event_intel_lbr.c b/arch/x86/kernel/cpu/perf_event_intel_lbr.c index 4f3a124329c4..dcec765f8188 100644 --- a/arch/x86/kernel/cpu/perf_event_intel_lbr.c +++ b/arch/x86/kernel/cpu/perf_event_intel_lbr.c | |||
@@ -53,6 +53,9 @@ static void intel_pmu_lbr_reset_64(void) | |||
53 | 53 | ||
54 | static void intel_pmu_lbr_reset(void) | 54 | static void intel_pmu_lbr_reset(void) |
55 | { | 55 | { |
56 | if (!x86_pmu.lbr_nr) | ||
57 | return; | ||
58 | |||
56 | if (x86_pmu.intel_cap.lbr_format == LBR_FORMAT_32) | 59 | if (x86_pmu.intel_cap.lbr_format == LBR_FORMAT_32) |
57 | intel_pmu_lbr_reset_32(); | 60 | intel_pmu_lbr_reset_32(); |
58 | else | 61 | else |