gpio/omap: remove cpu_is_omapxxxx() checks from *_runtime_resume()

Add register offsets for GPIO_IRQSTATUS_RAW_0, GPIO_IRQSTATUS_RAW_0
which are present on OMAP4+ processors. Now we can distinguish
conditions applicable to OMAP4,5 and those specific to OMAP24xx
and OMAP3xxx.

Cc: Kevin Hilman <khilman@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Cousson, Benoit <b-cousson@ti.com>
Cc: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Govindraj.R <govindraj.raja@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>

2 files changed, 4 insertions, 0 deletions

diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
index 86f91a6ed4e4..a144e22969a3 100644
--- a/arch/arm/mach-omap2/gpio.c
+++ b/arch/arm/mach-omap2/gpio.c
@@ -101,6 +101,8 @@ static int __init omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
                 pdata->regs->dataout = OMAP4_GPIO_DATAOUT;
                 pdata->regs->set_dataout = OMAP4_GPIO_SETDATAOUT;
                 pdata->regs->clr_dataout = OMAP4_GPIO_CLEARDATAOUT;
+                pdata->regs->irqstatus_raw0 = OMAP4_GPIO_IRQSTATUSRAW0;
+                pdata->regs->irqstatus_raw1 = OMAP4_GPIO_IRQSTATUSRAW1;
                 pdata->regs->irqstatus = OMAP4_GPIO_IRQSTATUS0;
                 pdata->regs->irqstatus2 = OMAP4_GPIO_IRQSTATUS1;
                 pdata->regs->irqenable = OMAP4_GPIO_IRQSTATUSSET0;
diff --git a/arch/arm/plat-omap/include/plat/gpio.h b/arch/arm/plat-omap/include/plat/gpio.h
index d903e7df3fb1..50fb7cc000ea 100644
--- a/arch/arm/plat-omap/include/plat/gpio.h
+++ b/arch/arm/plat-omap/include/plat/gpio.h
@@ -172,6 +172,8 @@ struct omap_gpio_reg_offs {
         u16 clr_dataout;
         u16 irqstatus;
         u16 irqstatus2;
+        u16 irqstatus_raw0;
+        u16 irqstatus_raw1;
         u16 irqenable;
         u16 irqenable2;
         u16 set_irqenable;