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authorBen Dooks <ben-linux@fluff.org>2010-05-20 06:40:24 -0400
committerBen Dooks <ben-linux@fluff.org>2010-05-20 06:40:24 -0400
commit45c8fa878475b16467109cf6534af03b27e28d10 (patch)
treea7c66c65dbc38774dcbba0d2965b1f851fcc1578 /arch
parent84eb9ecce20acfd287ba0d623fe5e99bfab08686 (diff)
parentef2f07d31c6b890e0cc3966d4a27fa1d49b740f5 (diff)
ARM: Merge for-2635-4/spi-devs
Merge branch 'for-2635-4/spi-devs' into for-2635-4/partial2 Conflicts: arch/arm/mach-s5pc100/include/mach/map.h arch/arm/mach-s5pv210/Makefile
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-s5p6440/Makefile1
-rw-r--r--arch/arm/mach-s5p6440/dev-spi.c176
-rw-r--r--arch/arm/mach-s5p6440/include/mach/map.h3
-rw-r--r--arch/arm/mach-s5p6440/include/mach/spi-clocks.h17
-rw-r--r--arch/arm/mach-s5p6442/Makefile1
-rw-r--r--arch/arm/mach-s5p6442/dev-spi.c123
-rw-r--r--arch/arm/mach-s5p6442/include/mach/map.h2
-rw-r--r--arch/arm/mach-s5p6442/include/mach/spi-clocks.h17
-rw-r--r--arch/arm/mach-s5pc100/Makefile4
-rw-r--r--arch/arm/mach-s5pc100/dev-spi.c233
-rw-r--r--arch/arm/mach-s5pc100/include/mach/map.h10
-rw-r--r--arch/arm/mach-s5pc100/include/mach/spi-clocks.h18
-rw-r--r--arch/arm/mach-s5pv210/Makefile2
-rw-r--r--arch/arm/mach-s5pv210/dev-spi.c178
-rw-r--r--arch/arm/mach-s5pv210/include/mach/map.h4
-rw-r--r--arch/arm/mach-s5pv210/include/mach/spi-clocks.h17
-rw-r--r--arch/arm/plat-samsung/include/plat/devs.h9
-rw-r--r--arch/arm/plat-samsung/include/plat/s3c64xx-spi.h4
18 files changed, 818 insertions, 1 deletions
diff --git a/arch/arm/mach-s5p6440/Makefile b/arch/arm/mach-s5p6440/Makefile
index 44facf43d59f..be3c53aab23f 100644
--- a/arch/arm/mach-s5p6440/Makefile
+++ b/arch/arm/mach-s5p6440/Makefile
@@ -21,3 +21,4 @@ obj-$(CONFIG_MACH_SMDK6440) += mach-smdk6440.o
21 21
22# device support 22# device support
23obj-y += dev-audio.o 23obj-y += dev-audio.o
24obj-$(CONFIG_S3C64XX_DEV_SPI) += dev-spi.o
diff --git a/arch/arm/mach-s5p6440/dev-spi.c b/arch/arm/mach-s5p6440/dev-spi.c
new file mode 100644
index 000000000000..0a30280019c0
--- /dev/null
+++ b/arch/arm/mach-s5p6440/dev-spi.c
@@ -0,0 +1,176 @@
1/* linux/arch/arm/mach-s5p6440/dev-spi.c
2 *
3 * Copyright (C) 2010 Samsung Electronics Co. Ltd.
4 * Jaswinder Singh <jassi.brar@samsung.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/platform_device.h>
12#include <linux/dma-mapping.h>
13
14#include <mach/dma.h>
15#include <mach/map.h>
16#include <mach/irqs.h>
17#include <mach/gpio.h>
18#include <mach/spi-clocks.h>
19
20#include <plat/s3c64xx-spi.h>
21#include <plat/gpio-cfg.h>
22
23static char *spi_src_clks[] = {
24 [S5P6440_SPI_SRCCLK_PCLK] = "pclk",
25 [S5P6440_SPI_SRCCLK_SCLK] = "spi_epll",
26};
27
28/* SPI Controller platform_devices */
29
30/* Since we emulate multi-cs capability, we do not touch the CS.
31 * The emulated CS is toggled by board specific mechanism, as it can
32 * be either some immediate GPIO or some signal out of some other
33 * chip in between ... or some yet another way.
34 * We simply do not assume anything about CS.
35 */
36static int s5p6440_spi_cfg_gpio(struct platform_device *pdev)
37{
38 switch (pdev->id) {
39 case 0:
40 s3c_gpio_cfgpin(S5P6440_GPC(0), S3C_GPIO_SFN(2));
41 s3c_gpio_cfgpin(S5P6440_GPC(1), S3C_GPIO_SFN(2));
42 s3c_gpio_cfgpin(S5P6440_GPC(2), S3C_GPIO_SFN(2));
43 s3c_gpio_setpull(S5P6440_GPC(0), S3C_GPIO_PULL_UP);
44 s3c_gpio_setpull(S5P6440_GPC(1), S3C_GPIO_PULL_UP);
45 s3c_gpio_setpull(S5P6440_GPC(2), S3C_GPIO_PULL_UP);
46 break;
47
48 case 1:
49 s3c_gpio_cfgpin(S5P6440_GPC(4), S3C_GPIO_SFN(2));
50 s3c_gpio_cfgpin(S5P6440_GPC(5), S3C_GPIO_SFN(2));
51 s3c_gpio_cfgpin(S5P6440_GPC(6), S3C_GPIO_SFN(2));
52 s3c_gpio_setpull(S5P6440_GPC(4), S3C_GPIO_PULL_UP);
53 s3c_gpio_setpull(S5P6440_GPC(5), S3C_GPIO_PULL_UP);
54 s3c_gpio_setpull(S5P6440_GPC(6), S3C_GPIO_PULL_UP);
55 break;
56
57 default:
58 dev_err(&pdev->dev, "Invalid SPI Controller number!");
59 return -EINVAL;
60 }
61
62 return 0;
63}
64
65static struct resource s5p6440_spi0_resource[] = {
66 [0] = {
67 .start = S5P6440_PA_SPI0,
68 .end = S5P6440_PA_SPI0 + 0x100 - 1,
69 .flags = IORESOURCE_MEM,
70 },
71 [1] = {
72 .start = DMACH_SPI0_TX,
73 .end = DMACH_SPI0_TX,
74 .flags = IORESOURCE_DMA,
75 },
76 [2] = {
77 .start = DMACH_SPI0_RX,
78 .end = DMACH_SPI0_RX,
79 .flags = IORESOURCE_DMA,
80 },
81 [3] = {
82 .start = IRQ_SPI0,
83 .end = IRQ_SPI0,
84 .flags = IORESOURCE_IRQ,
85 },
86};
87
88static struct s3c64xx_spi_info s5p6440_spi0_pdata = {
89 .cfg_gpio = s5p6440_spi_cfg_gpio,
90 .fifo_lvl_mask = 0x1ff,
91 .rx_lvl_offset = 15,
92};
93
94static u64 spi_dmamask = DMA_BIT_MASK(32);
95
96struct platform_device s5p6440_device_spi0 = {
97 .name = "s3c64xx-spi",
98 .id = 0,
99 .num_resources = ARRAY_SIZE(s5p6440_spi0_resource),
100 .resource = s5p6440_spi0_resource,
101 .dev = {
102 .dma_mask = &spi_dmamask,
103 .coherent_dma_mask = DMA_BIT_MASK(32),
104 .platform_data = &s5p6440_spi0_pdata,
105 },
106};
107
108static struct resource s5p6440_spi1_resource[] = {
109 [0] = {
110 .start = S5P6440_PA_SPI1,
111 .end = S5P6440_PA_SPI1 + 0x100 - 1,
112 .flags = IORESOURCE_MEM,
113 },
114 [1] = {
115 .start = DMACH_SPI1_TX,
116 .end = DMACH_SPI1_TX,
117 .flags = IORESOURCE_DMA,
118 },
119 [2] = {
120 .start = DMACH_SPI1_RX,
121 .end = DMACH_SPI1_RX,
122 .flags = IORESOURCE_DMA,
123 },
124 [3] = {
125 .start = IRQ_SPI1,
126 .end = IRQ_SPI1,
127 .flags = IORESOURCE_IRQ,
128 },
129};
130
131static struct s3c64xx_spi_info s5p6440_spi1_pdata = {
132 .cfg_gpio = s5p6440_spi_cfg_gpio,
133 .fifo_lvl_mask = 0x7f,
134 .rx_lvl_offset = 15,
135};
136
137struct platform_device s5p6440_device_spi1 = {
138 .name = "s3c64xx-spi",
139 .id = 1,
140 .num_resources = ARRAY_SIZE(s5p6440_spi1_resource),
141 .resource = s5p6440_spi1_resource,
142 .dev = {
143 .dma_mask = &spi_dmamask,
144 .coherent_dma_mask = DMA_BIT_MASK(32),
145 .platform_data = &s5p6440_spi1_pdata,
146 },
147};
148
149void __init s5p6440_spi_set_info(int cntrlr, int src_clk_nr, int num_cs)
150{
151 struct s3c64xx_spi_info *pd;
152
153 /* Reject invalid configuration */
154 if (!num_cs || src_clk_nr < 0
155 || src_clk_nr > S5P6440_SPI_SRCCLK_SCLK) {
156 printk(KERN_ERR "%s: Invalid SPI configuration\n", __func__);
157 return;
158 }
159
160 switch (cntrlr) {
161 case 0:
162 pd = &s5p6440_spi0_pdata;
163 break;
164 case 1:
165 pd = &s5p6440_spi1_pdata;
166 break;
167 default:
168 printk(KERN_ERR "%s: Invalid SPI controller(%d)\n",
169 __func__, cntrlr);
170 return;
171 }
172
173 pd->num_cs = num_cs;
174 pd->src_clk_nr = src_clk_nr;
175 pd->src_clk_name = spi_src_clks[src_clk_nr];
176}
diff --git a/arch/arm/mach-s5p6440/include/mach/map.h b/arch/arm/mach-s5p6440/include/mach/map.h
index 13c1ee718d30..d0124f39a988 100644
--- a/arch/arm/mach-s5p6440/include/mach/map.h
+++ b/arch/arm/mach-s5p6440/include/mach/map.h
@@ -54,6 +54,9 @@
54 54
55#define S5P6440_PA_IIC0 (0xEC104000) 55#define S5P6440_PA_IIC0 (0xEC104000)
56 56
57#define S5P6440_PA_SPI0 0xEC400000
58#define S5P6440_PA_SPI1 0xEC500000
59
57#define S5P6440_PA_HSOTG (0xED100000) 60#define S5P6440_PA_HSOTG (0xED100000)
58 61
59#define S5P6440_PA_HSMMC0 (0xED800000) 62#define S5P6440_PA_HSMMC0 (0xED800000)
diff --git a/arch/arm/mach-s5p6440/include/mach/spi-clocks.h b/arch/arm/mach-s5p6440/include/mach/spi-clocks.h
new file mode 100644
index 000000000000..5fbca50d1cfb
--- /dev/null
+++ b/arch/arm/mach-s5p6440/include/mach/spi-clocks.h
@@ -0,0 +1,17 @@
1/* linux/arch/arm/mach-s5p6440/include/mach/spi-clocks.h
2 *
3 * Copyright (C) 2010 Samsung Electronics Co. Ltd.
4 * Jaswinder Singh <jassi.brar@samsung.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef __S5P6440_PLAT_SPI_CLKS_H
12#define __S5P6440_PLAT_SPI_CLKS_H __FILE__
13
14#define S5P6440_SPI_SRCCLK_PCLK 0
15#define S5P6440_SPI_SRCCLK_SCLK 1
16
17#endif /* __S5P6440_PLAT_SPI_CLKS_H */
diff --git a/arch/arm/mach-s5p6442/Makefile b/arch/arm/mach-s5p6442/Makefile
index e30a7f76aee6..90a3d8373416 100644
--- a/arch/arm/mach-s5p6442/Makefile
+++ b/arch/arm/mach-s5p6442/Makefile
@@ -21,3 +21,4 @@ obj-$(CONFIG_MACH_SMDK6442) += mach-smdk6442.o
21 21
22# device support 22# device support
23obj-y += dev-audio.o 23obj-y += dev-audio.o
24obj-$(CONFIG_S3C64XX_DEV_SPI) += dev-spi.o
diff --git a/arch/arm/mach-s5p6442/dev-spi.c b/arch/arm/mach-s5p6442/dev-spi.c
new file mode 100644
index 000000000000..30199525daca
--- /dev/null
+++ b/arch/arm/mach-s5p6442/dev-spi.c
@@ -0,0 +1,123 @@
1/* linux/arch/arm/mach-s5p6442/dev-spi.c
2 *
3 * Copyright (C) 2010 Samsung Electronics Co. Ltd.
4 * Jaswinder Singh <jassi.brar@samsung.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/platform_device.h>
12#include <linux/dma-mapping.h>
13
14#include <mach/dma.h>
15#include <mach/map.h>
16#include <mach/irqs.h>
17#include <mach/gpio.h>
18#include <mach/spi-clocks.h>
19
20#include <plat/s3c64xx-spi.h>
21#include <plat/gpio-cfg.h>
22
23static char *spi_src_clks[] = {
24 [S5P6442_SPI_SRCCLK_PCLK] = "pclk",
25 [S5P6442_SPI_SRCCLK_SCLK] = "spi_epll",
26};
27
28/* SPI Controller platform_devices */
29
30/* Since we emulate multi-cs capability, we do not touch the CS.
31 * The emulated CS is toggled by board specific mechanism, as it can
32 * be either some immediate GPIO or some signal out of some other
33 * chip in between ... or some yet another way.
34 * We simply do not assume anything about CS.
35 */
36static int s5p6442_spi_cfg_gpio(struct platform_device *pdev)
37{
38 switch (pdev->id) {
39 case 0:
40 s3c_gpio_cfgpin(S5P6442_GPB(0), S3C_GPIO_SFN(2));
41 s3c_gpio_cfgpin(S5P6442_GPB(2), S3C_GPIO_SFN(2));
42 s3c_gpio_cfgpin(S5P6442_GPB(3), S3C_GPIO_SFN(2));
43 s3c_gpio_setpull(S5P6442_GPB(0), S3C_GPIO_PULL_UP);
44 s3c_gpio_setpull(S5P6442_GPB(2), S3C_GPIO_PULL_UP);
45 s3c_gpio_setpull(S5P6442_GPB(3), S3C_GPIO_PULL_UP);
46 break;
47
48 default:
49 dev_err(&pdev->dev, "Invalid SPI Controller number!");
50 return -EINVAL;
51 }
52
53 return 0;
54}
55
56static struct resource s5p6442_spi0_resource[] = {
57 [0] = {
58 .start = S5P6442_PA_SPI,
59 .end = S5P6442_PA_SPI + 0x100 - 1,
60 .flags = IORESOURCE_MEM,
61 },
62 [1] = {
63 .start = DMACH_SPI0_TX,
64 .end = DMACH_SPI0_TX,
65 .flags = IORESOURCE_DMA,
66 },
67 [2] = {
68 .start = DMACH_SPI0_RX,
69 .end = DMACH_SPI0_RX,
70 .flags = IORESOURCE_DMA,
71 },
72 [3] = {
73 .start = IRQ_SPI0,
74 .end = IRQ_SPI0,
75 .flags = IORESOURCE_IRQ,
76 },
77};
78
79static struct s3c64xx_spi_info s5p6442_spi0_pdata = {
80 .cfg_gpio = s5p6442_spi_cfg_gpio,
81 .fifo_lvl_mask = 0x1ff,
82 .rx_lvl_offset = 15,
83};
84
85static u64 spi_dmamask = DMA_BIT_MASK(32);
86
87struct platform_device s5p6442_device_spi = {
88 .name = "s3c64xx-spi",
89 .id = 0,
90 .num_resources = ARRAY_SIZE(s5p6442_spi0_resource),
91 .resource = s5p6442_spi0_resource,
92 .dev = {
93 .dma_mask = &spi_dmamask,
94 .coherent_dma_mask = DMA_BIT_MASK(32),
95 .platform_data = &s5p6442_spi0_pdata,
96 },
97};
98
99void __init s5p6442_spi_set_info(int cntrlr, int src_clk_nr, int num_cs)
100{
101 struct s3c64xx_spi_info *pd;
102
103 /* Reject invalid configuration */
104 if (!num_cs || src_clk_nr < 0
105 || src_clk_nr > S5P6442_SPI_SRCCLK_SCLK) {
106 printk(KERN_ERR "%s: Invalid SPI configuration\n", __func__);
107 return;
108 }
109
110 switch (cntrlr) {
111 case 0:
112 pd = &s5p6442_spi0_pdata;
113 break;
114 default:
115 printk(KERN_ERR "%s: Invalid SPI controller(%d)\n",
116 __func__, cntrlr);
117 return;
118 }
119
120 pd->num_cs = num_cs;
121 pd->src_clk_nr = src_clk_nr;
122 pd->src_clk_name = spi_src_clks[src_clk_nr];
123}
diff --git a/arch/arm/mach-s5p6442/include/mach/map.h b/arch/arm/mach-s5p6442/include/mach/map.h
index 7568dc0d6be0..32ca424ef7f9 100644
--- a/arch/arm/mach-s5p6442/include/mach/map.h
+++ b/arch/arm/mach-s5p6442/include/mach/map.h
@@ -54,6 +54,8 @@
54#define S5P6442_PA_SDRAM (0x20000000) 54#define S5P6442_PA_SDRAM (0x20000000)
55#define S5P_PA_SDRAM S5P6442_PA_SDRAM 55#define S5P_PA_SDRAM S5P6442_PA_SDRAM
56 56
57#define S5P6442_PA_SPI 0xEC300000
58
57/* I2S */ 59/* I2S */
58#define S5P6442_PA_I2S0 0xC0B00000 60#define S5P6442_PA_I2S0 0xC0B00000
59#define S5P6442_PA_I2S1 0xF2200000 61#define S5P6442_PA_I2S1 0xF2200000
diff --git a/arch/arm/mach-s5p6442/include/mach/spi-clocks.h b/arch/arm/mach-s5p6442/include/mach/spi-clocks.h
new file mode 100644
index 000000000000..7fd88205a97c
--- /dev/null
+++ b/arch/arm/mach-s5p6442/include/mach/spi-clocks.h
@@ -0,0 +1,17 @@
1/* linux/arch/arm/mach-s5p6442/include/mach/spi-clocks.h
2 *
3 * Copyright (C) 2010 Samsung Electronics Co. Ltd.
4 * Jaswinder Singh <jassi.brar@samsung.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef __S5P6442_PLAT_SPI_CLKS_H
12#define __S5P6442_PLAT_SPI_CLKS_H __FILE__
13
14#define S5P6442_SPI_SRCCLK_PCLK 0
15#define S5P6442_SPI_SRCCLK_SCLK 1
16
17#endif /* __S5P6442_PLAT_SPI_CLKS_H */
diff --git a/arch/arm/mach-s5pc100/Makefile b/arch/arm/mach-s5pc100/Makefile
index 26f6f30cc7e2..e1081a9b19c8 100644
--- a/arch/arm/mach-s5pc100/Makefile
+++ b/arch/arm/mach-s5pc100/Makefile
@@ -21,6 +21,10 @@ obj-$(CONFIG_S5PC100_SETUP_I2C1) += setup-i2c1.o
21obj-$(CONFIG_S5PC100_SETUP_SDHCI) += setup-sdhci.o 21obj-$(CONFIG_S5PC100_SETUP_SDHCI) += setup-sdhci.o
22obj-$(CONFIG_S5PC100_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o 22obj-$(CONFIG_S5PC100_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o
23 23
24# device support
25obj-y += dev-audio.o
26obj-$(CONFIG_S3C64XX_DEV_SPI) += dev-spi.o
27
24# machine support 28# machine support
25 29
26obj-$(CONFIG_MACH_SMDKC100) += mach-smdkc100.o 30obj-$(CONFIG_MACH_SMDKC100) += mach-smdkc100.o
diff --git a/arch/arm/mach-s5pc100/dev-spi.c b/arch/arm/mach-s5pc100/dev-spi.c
new file mode 100644
index 000000000000..14618c346057
--- /dev/null
+++ b/arch/arm/mach-s5pc100/dev-spi.c
@@ -0,0 +1,233 @@
1/* linux/arch/arm/mach-s5pc100/dev-spi.c
2 *
3 * Copyright (C) 2010 Samsung Electronics Co. Ltd.
4 * Jaswinder Singh <jassi.brar@samsung.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/platform_device.h>
12#include <linux/dma-mapping.h>
13
14#include <mach/dma.h>
15#include <mach/map.h>
16#include <mach/gpio.h>
17#include <mach/spi-clocks.h>
18
19#include <plat/s3c64xx-spi.h>
20#include <plat/gpio-cfg.h>
21#include <plat/irqs.h>
22
23static char *spi_src_clks[] = {
24 [S5PC100_SPI_SRCCLK_PCLK] = "pclk",
25 [S5PC100_SPI_SRCCLK_48M] = "spi_48m",
26 [S5PC100_SPI_SRCCLK_SPIBUS] = "spi_bus",
27};
28
29/* SPI Controller platform_devices */
30
31/* Since we emulate multi-cs capability, we do not touch the CS.
32 * The emulated CS is toggled by board specific mechanism, as it can
33 * be either some immediate GPIO or some signal out of some other
34 * chip in between ... or some yet another way.
35 * We simply do not assume anything about CS.
36 */
37static int s5pc100_spi_cfg_gpio(struct platform_device *pdev)
38{
39 switch (pdev->id) {
40 case 0:
41 s3c_gpio_cfgpin(S5PC100_GPB(0), S3C_GPIO_SFN(2));
42 s3c_gpio_cfgpin(S5PC100_GPB(1), S3C_GPIO_SFN(2));
43 s3c_gpio_cfgpin(S5PC100_GPB(2), S3C_GPIO_SFN(2));
44 s3c_gpio_setpull(S5PC100_GPB(0), S3C_GPIO_PULL_UP);
45 s3c_gpio_setpull(S5PC100_GPB(1), S3C_GPIO_PULL_UP);
46 s3c_gpio_setpull(S5PC100_GPB(2), S3C_GPIO_PULL_UP);
47 break;
48
49 case 1:
50 s3c_gpio_cfgpin(S5PC100_GPB(4), S3C_GPIO_SFN(2));
51 s3c_gpio_cfgpin(S5PC100_GPB(5), S3C_GPIO_SFN(2));
52 s3c_gpio_cfgpin(S5PC100_GPB(6), S3C_GPIO_SFN(2));
53 s3c_gpio_setpull(S5PC100_GPB(4), S3C_GPIO_PULL_UP);
54 s3c_gpio_setpull(S5PC100_GPB(5), S3C_GPIO_PULL_UP);
55 s3c_gpio_setpull(S5PC100_GPB(6), S3C_GPIO_PULL_UP);
56 break;
57
58 case 2:
59 s3c_gpio_cfgpin(S5PC100_GPG3(0), S3C_GPIO_SFN(3));
60 s3c_gpio_cfgpin(S5PC100_GPG3(2), S3C_GPIO_SFN(3));
61 s3c_gpio_cfgpin(S5PC100_GPG3(3), S3C_GPIO_SFN(3));
62 s3c_gpio_setpull(S5PC100_GPG3(0), S3C_GPIO_PULL_UP);
63 s3c_gpio_setpull(S5PC100_GPG3(2), S3C_GPIO_PULL_UP);
64 s3c_gpio_setpull(S5PC100_GPG3(3), S3C_GPIO_PULL_UP);
65 break;
66
67 default:
68 dev_err(&pdev->dev, "Invalid SPI Controller number!");
69 return -EINVAL;
70 }
71
72 return 0;
73}
74
75static struct resource s5pc100_spi0_resource[] = {
76 [0] = {
77 .start = S5PC100_PA_SPI0,
78 .end = S5PC100_PA_SPI0 + 0x100 - 1,
79 .flags = IORESOURCE_MEM,
80 },
81 [1] = {
82 .start = DMACH_SPI0_TX,
83 .end = DMACH_SPI0_TX,
84 .flags = IORESOURCE_DMA,
85 },
86 [2] = {
87 .start = DMACH_SPI0_RX,
88 .end = DMACH_SPI0_RX,
89 .flags = IORESOURCE_DMA,
90 },
91 [3] = {
92 .start = IRQ_SPI0,
93 .end = IRQ_SPI0,
94 .flags = IORESOURCE_IRQ,
95 },
96};
97
98static struct s3c64xx_spi_info s5pc100_spi0_pdata = {
99 .cfg_gpio = s5pc100_spi_cfg_gpio,
100 .fifo_lvl_mask = 0x7f,
101 .rx_lvl_offset = 13,
102 .high_speed = 1,
103};
104
105static u64 spi_dmamask = DMA_BIT_MASK(32);
106
107struct platform_device s5pc100_device_spi0 = {
108 .name = "s3c64xx-spi",
109 .id = 0,
110 .num_resources = ARRAY_SIZE(s5pc100_spi0_resource),
111 .resource = s5pc100_spi0_resource,
112 .dev = {
113 .dma_mask = &spi_dmamask,
114 .coherent_dma_mask = DMA_BIT_MASK(32),
115 .platform_data = &s5pc100_spi0_pdata,
116 },
117};
118
119static struct resource s5pc100_spi1_resource[] = {
120 [0] = {
121 .start = S5PC100_PA_SPI1,
122 .end = S5PC100_PA_SPI1 + 0x100 - 1,
123 .flags = IORESOURCE_MEM,
124 },
125 [1] = {
126 .start = DMACH_SPI1_TX,
127 .end = DMACH_SPI1_TX,
128 .flags = IORESOURCE_DMA,
129 },
130 [2] = {
131 .start = DMACH_SPI1_RX,
132 .end = DMACH_SPI1_RX,
133 .flags = IORESOURCE_DMA,
134 },
135 [3] = {
136 .start = IRQ_SPI1,
137 .end = IRQ_SPI1,
138 .flags = IORESOURCE_IRQ,
139 },
140};
141
142static struct s3c64xx_spi_info s5pc100_spi1_pdata = {
143 .cfg_gpio = s5pc100_spi_cfg_gpio,
144 .fifo_lvl_mask = 0x7f,
145 .rx_lvl_offset = 13,
146 .high_speed = 1,
147};
148
149struct platform_device s5pc100_device_spi1 = {
150 .name = "s3c64xx-spi",
151 .id = 1,
152 .num_resources = ARRAY_SIZE(s5pc100_spi1_resource),
153 .resource = s5pc100_spi1_resource,
154 .dev = {
155 .dma_mask = &spi_dmamask,
156 .coherent_dma_mask = DMA_BIT_MASK(32),
157 .platform_data = &s5pc100_spi1_pdata,
158 },
159};
160
161static struct resource s5pc100_spi2_resource[] = {
162 [0] = {
163 .start = S5PC100_PA_SPI2,
164 .end = S5PC100_PA_SPI2 + 0x100 - 1,
165 .flags = IORESOURCE_MEM,
166 },
167 [1] = {
168 .start = DMACH_SPI2_TX,
169 .end = DMACH_SPI2_TX,
170 .flags = IORESOURCE_DMA,
171 },
172 [2] = {
173 .start = DMACH_SPI2_RX,
174 .end = DMACH_SPI2_RX,
175 .flags = IORESOURCE_DMA,
176 },
177 [3] = {
178 .start = IRQ_SPI2,
179 .end = IRQ_SPI2,
180 .flags = IORESOURCE_IRQ,
181 },
182};
183
184static struct s3c64xx_spi_info s5pc100_spi2_pdata = {
185 .cfg_gpio = s5pc100_spi_cfg_gpio,
186 .fifo_lvl_mask = 0x7f,
187 .rx_lvl_offset = 13,
188 .high_speed = 1,
189};
190
191struct platform_device s5pc100_device_spi2 = {
192 .name = "s3c64xx-spi",
193 .id = 2,
194 .num_resources = ARRAY_SIZE(s5pc100_spi2_resource),
195 .resource = s5pc100_spi2_resource,
196 .dev = {
197 .dma_mask = &spi_dmamask,
198 .coherent_dma_mask = DMA_BIT_MASK(32),
199 .platform_data = &s5pc100_spi2_pdata,
200 },
201};
202
203void __init s5pc100_spi_set_info(int cntrlr, int src_clk_nr, int num_cs)
204{
205 struct s3c64xx_spi_info *pd;
206
207 /* Reject invalid configuration */
208 if (!num_cs || src_clk_nr < 0
209 || src_clk_nr > S5PC100_SPI_SRCCLK_SPIBUS) {
210 printk(KERN_ERR "%s: Invalid SPI configuration\n", __func__);
211 return;
212 }
213
214 switch (cntrlr) {
215 case 0:
216 pd = &s5pc100_spi0_pdata;
217 break;
218 case 1:
219 pd = &s5pc100_spi1_pdata;
220 break;
221 case 2:
222 pd = &s5pc100_spi2_pdata;
223 break;
224 default:
225 printk(KERN_ERR "%s: Invalid SPI controller(%d)\n",
226 __func__, cntrlr);
227 return;
228 }
229
230 pd->num_cs = num_cs;
231 pd->src_clk_nr = src_clk_nr;
232 pd->src_clk_name = spi_src_clks[src_clk_nr];
233}
diff --git a/arch/arm/mach-s5pc100/include/mach/map.h b/arch/arm/mach-s5pc100/include/mach/map.h
index 67049e4bd2ef..88009549ab28 100644
--- a/arch/arm/mach-s5pc100/include/mach/map.h
+++ b/arch/arm/mach-s5pc100/include/mach/map.h
@@ -53,6 +53,15 @@
53#define S5PC100_PA_IIC0 (0xEC100000) 53#define S5PC100_PA_IIC0 (0xEC100000)
54#define S5PC100_PA_IIC1 (0xEC200000) 54#define S5PC100_PA_IIC1 (0xEC200000)
55 55
56/* SPI */
57#define S5PC100_PA_SPI0 0xEC300000
58#define S5PC100_PA_SPI1 0xEC400000
59#define S5PC100_PA_SPI2 0xEC500000
60
61/* USB HS OTG */
62#define S5PC100_PA_USB_HSOTG (0xED200000)
63#define S5PC100_PA_USB_HSPHY (0xED300000)
64
56#define S5PC100_PA_FB (0xEE000000) 65#define S5PC100_PA_FB (0xEE000000)
57 66
58#define S5PC100_PA_AC97 0xF2300000 67#define S5PC100_PA_AC97 0xF2300000
@@ -63,7 +72,6 @@
63 72
64/* KEYPAD */ 73/* KEYPAD */
65#define S5PC100_PA_KEYPAD (0xF3100000) 74#define S5PC100_PA_KEYPAD (0xF3100000)
66>>>>>>> for-2635-4/s5p-devs:arch/arm/mach-s5pc100/include/mach/map.h
67 75
68#define S5PC100_PA_HSMMC(x) (0xED800000 + ((x) * 0x100000)) 76#define S5PC100_PA_HSMMC(x) (0xED800000 + ((x) * 0x100000))
69 77
diff --git a/arch/arm/mach-s5pc100/include/mach/spi-clocks.h b/arch/arm/mach-s5pc100/include/mach/spi-clocks.h
new file mode 100644
index 000000000000..65e426370bb2
--- /dev/null
+++ b/arch/arm/mach-s5pc100/include/mach/spi-clocks.h
@@ -0,0 +1,18 @@
1/* linux/arch/arm/mach-s5pc100/include/mach/spi-clocks.h
2 *
3 * Copyright (C) 2010 Samsung Electronics Co. Ltd.
4 * Jaswinder Singh <jassi.brar@samsung.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef __S5PC100_PLAT_SPI_CLKS_H
12#define __S5PC100_PLAT_SPI_CLKS_H __FILE__
13
14#define S5PC100_SPI_SRCCLK_PCLK 0
15#define S5PC100_SPI_SRCCLK_48M 1
16#define S5PC100_SPI_SRCCLK_SPIBUS 2
17
18#endif /* __S5PC100_PLAT_SPI_CLKS_H */
diff --git a/arch/arm/mach-s5pv210/Makefile b/arch/arm/mach-s5pv210/Makefile
index 6c0cba8dfafa..6a6dea19dec5 100644
--- a/arch/arm/mach-s5pv210/Makefile
+++ b/arch/arm/mach-s5pv210/Makefile
@@ -25,6 +25,8 @@ obj-$(CONFIG_MACH_GONI) += mach-goni.o
25# device support 25# device support
26 26
27obj-y += dev-audio.o 27obj-y += dev-audio.o
28obj-$(CONFIG_S3C64XX_DEV_SPI) += dev-spi.o
29
28obj-$(CONFIG_S5PV210_SETUP_FB_24BPP) += setup-fb-24bpp.o 30obj-$(CONFIG_S5PV210_SETUP_FB_24BPP) += setup-fb-24bpp.o
29obj-$(CONFIG_S5PV210_SETUP_I2C1) += setup-i2c1.o 31obj-$(CONFIG_S5PV210_SETUP_I2C1) += setup-i2c1.o
30obj-$(CONFIG_S5PV210_SETUP_I2C2) += setup-i2c2.o 32obj-$(CONFIG_S5PV210_SETUP_I2C2) += setup-i2c2.o
diff --git a/arch/arm/mach-s5pv210/dev-spi.c b/arch/arm/mach-s5pv210/dev-spi.c
new file mode 100644
index 000000000000..337a62b57a0b
--- /dev/null
+++ b/arch/arm/mach-s5pv210/dev-spi.c
@@ -0,0 +1,178 @@
1/* linux/arch/arm/mach-s5pv210/dev-spi.c
2 *
3 * Copyright (C) 2010 Samsung Electronics Co. Ltd.
4 * Jaswinder Singh <jassi.brar@samsung.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/platform_device.h>
12#include <linux/dma-mapping.h>
13
14#include <mach/dma.h>
15#include <mach/map.h>
16#include <mach/irqs.h>
17#include <mach/gpio.h>
18#include <mach/spi-clocks.h>
19
20#include <plat/s3c64xx-spi.h>
21#include <plat/gpio-cfg.h>
22
23static char *spi_src_clks[] = {
24 [S5PV210_SPI_SRCCLK_PCLK] = "pclk",
25 [S5PV210_SPI_SRCCLK_SCLK] = "sclk_spi",
26};
27
28/* SPI Controller platform_devices */
29
30/* Since we emulate multi-cs capability, we do not touch the CS.
31 * The emulated CS is toggled by board specific mechanism, as it can
32 * be either some immediate GPIO or some signal out of some other
33 * chip in between ... or some yet another way.
34 * We simply do not assume anything about CS.
35 */
36static int s5pv210_spi_cfg_gpio(struct platform_device *pdev)
37{
38 switch (pdev->id) {
39 case 0:
40 s3c_gpio_cfgpin(S5PV210_GPB(0), S3C_GPIO_SFN(2));
41 s3c_gpio_cfgpin(S5PV210_GPB(1), S3C_GPIO_SFN(2));
42 s3c_gpio_cfgpin(S5PV210_GPB(2), S3C_GPIO_SFN(2));
43 s3c_gpio_setpull(S5PV210_GPB(0), S3C_GPIO_PULL_UP);
44 s3c_gpio_setpull(S5PV210_GPB(1), S3C_GPIO_PULL_UP);
45 s3c_gpio_setpull(S5PV210_GPB(2), S3C_GPIO_PULL_UP);
46 break;
47
48 case 1:
49 s3c_gpio_cfgpin(S5PV210_GPB(4), S3C_GPIO_SFN(2));
50 s3c_gpio_cfgpin(S5PV210_GPB(5), S3C_GPIO_SFN(2));
51 s3c_gpio_cfgpin(S5PV210_GPB(6), S3C_GPIO_SFN(2));
52 s3c_gpio_setpull(S5PV210_GPB(4), S3C_GPIO_PULL_UP);
53 s3c_gpio_setpull(S5PV210_GPB(5), S3C_GPIO_PULL_UP);
54 s3c_gpio_setpull(S5PV210_GPB(6), S3C_GPIO_PULL_UP);
55 break;
56
57 default:
58 dev_err(&pdev->dev, "Invalid SPI Controller number!");
59 return -EINVAL;
60 }
61
62 return 0;
63}
64
65static struct resource s5pv210_spi0_resource[] = {
66 [0] = {
67 .start = S5PV210_PA_SPI0,
68 .end = S5PV210_PA_SPI0 + 0x100 - 1,
69 .flags = IORESOURCE_MEM,
70 },
71 [1] = {
72 .start = DMACH_SPI0_TX,
73 .end = DMACH_SPI0_TX,
74 .flags = IORESOURCE_DMA,
75 },
76 [2] = {
77 .start = DMACH_SPI0_RX,
78 .end = DMACH_SPI0_RX,
79 .flags = IORESOURCE_DMA,
80 },
81 [3] = {
82 .start = IRQ_SPI0,
83 .end = IRQ_SPI0,
84 .flags = IORESOURCE_IRQ,
85 },
86};
87
88static struct s3c64xx_spi_info s5pv210_spi0_pdata = {
89 .cfg_gpio = s5pv210_spi_cfg_gpio,
90 .fifo_lvl_mask = 0x1ff,
91 .rx_lvl_offset = 15,
92 .high_speed = 1,
93};
94
95static u64 spi_dmamask = DMA_BIT_MASK(32);
96
97struct platform_device s5pv210_device_spi0 = {
98 .name = "s3c64xx-spi",
99 .id = 0,
100 .num_resources = ARRAY_SIZE(s5pv210_spi0_resource),
101 .resource = s5pv210_spi0_resource,
102 .dev = {
103 .dma_mask = &spi_dmamask,
104 .coherent_dma_mask = DMA_BIT_MASK(32),
105 .platform_data = &s5pv210_spi0_pdata,
106 },
107};
108
109static struct resource s5pv210_spi1_resource[] = {
110 [0] = {
111 .start = S5PV210_PA_SPI1,
112 .end = S5PV210_PA_SPI1 + 0x100 - 1,
113 .flags = IORESOURCE_MEM,
114 },
115 [1] = {
116 .start = DMACH_SPI1_TX,
117 .end = DMACH_SPI1_TX,
118 .flags = IORESOURCE_DMA,
119 },
120 [2] = {
121 .start = DMACH_SPI1_RX,
122 .end = DMACH_SPI1_RX,
123 .flags = IORESOURCE_DMA,
124 },
125 [3] = {
126 .start = IRQ_SPI1,
127 .end = IRQ_SPI1,
128 .flags = IORESOURCE_IRQ,
129 },
130};
131
132static struct s3c64xx_spi_info s5pv210_spi1_pdata = {
133 .cfg_gpio = s5pv210_spi_cfg_gpio,
134 .fifo_lvl_mask = 0x7f,
135 .rx_lvl_offset = 15,
136 .high_speed = 1,
137};
138
139struct platform_device s5pv210_device_spi1 = {
140 .name = "s3c64xx-spi",
141 .id = 1,
142 .num_resources = ARRAY_SIZE(s5pv210_spi1_resource),
143 .resource = s5pv210_spi1_resource,
144 .dev = {
145 .dma_mask = &spi_dmamask,
146 .coherent_dma_mask = DMA_BIT_MASK(32),
147 .platform_data = &s5pv210_spi1_pdata,
148 },
149};
150
151void __init s5pv210_spi_set_info(int cntrlr, int src_clk_nr, int num_cs)
152{
153 struct s3c64xx_spi_info *pd;
154
155 /* Reject invalid configuration */
156 if (!num_cs || src_clk_nr < 0
157 || src_clk_nr > S5PV210_SPI_SRCCLK_SCLK) {
158 printk(KERN_ERR "%s: Invalid SPI configuration\n", __func__);
159 return;
160 }
161
162 switch (cntrlr) {
163 case 0:
164 pd = &s5pv210_spi0_pdata;
165 break;
166 case 1:
167 pd = &s5pv210_spi1_pdata;
168 break;
169 default:
170 printk(KERN_ERR "%s: Invalid SPI controller(%d)\n",
171 __func__, cntrlr);
172 return;
173 }
174
175 pd->num_cs = num_cs;
176 pd->src_clk_nr = src_clk_nr;
177 pd->src_clk_name = spi_src_clks[src_clk_nr];
178}
diff --git a/arch/arm/mach-s5pv210/include/mach/map.h b/arch/arm/mach-s5pv210/include/mach/map.h
index fb5d05e91e44..6fb7bfdd232a 100644
--- a/arch/arm/mach-s5pv210/include/mach/map.h
+++ b/arch/arm/mach-s5pv210/include/mach/map.h
@@ -25,6 +25,10 @@
25#define S5PV210_PA_GPIO (0xE0200000) 25#define S5PV210_PA_GPIO (0xE0200000)
26#define S5P_PA_GPIO S5PV210_PA_GPIO 26#define S5P_PA_GPIO S5PV210_PA_GPIO
27 27
28/* SPI */
29#define S5PV210_PA_SPI0 0xE1300000
30#define S5PV210_PA_SPI1 0xE1400000
31
28#define S5PV210_PA_IIC0 (0xE1800000) 32#define S5PV210_PA_IIC0 (0xE1800000)
29#define S5PV210_PA_IIC1 (0xFAB00000) 33#define S5PV210_PA_IIC1 (0xFAB00000)
30#define S5PV210_PA_IIC2 (0xE1A00000) 34#define S5PV210_PA_IIC2 (0xE1A00000)
diff --git a/arch/arm/mach-s5pv210/include/mach/spi-clocks.h b/arch/arm/mach-s5pv210/include/mach/spi-clocks.h
new file mode 100644
index 000000000000..02acded5f73d
--- /dev/null
+++ b/arch/arm/mach-s5pv210/include/mach/spi-clocks.h
@@ -0,0 +1,17 @@
1/* linux/arch/arm/mach-s5pv210/include/mach/spi-clocks.h
2 *
3 * Copyright (C) 2010 Samsung Electronics Co. Ltd.
4 * Jaswinder Singh <jassi.brar@samsung.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef __S5PV210_PLAT_SPI_CLKS_H
12#define __S5PV210_PLAT_SPI_CLKS_H __FILE__
13
14#define S5PV210_SPI_SRCCLK_PCLK 0
15#define S5PV210_SPI_SRCCLK_SCLK 1
16
17#endif /* __S5PV210_PLAT_SPI_CLKS_H */
diff --git a/arch/arm/plat-samsung/include/plat/devs.h b/arch/arm/plat-samsung/include/plat/devs.h
index fed082a28ad9..8d516d498051 100644
--- a/arch/arm/plat-samsung/include/plat/devs.h
+++ b/arch/arm/plat-samsung/include/plat/devs.h
@@ -58,6 +58,14 @@ extern struct platform_device s3c_device_hsmmc2;
58extern struct platform_device s3c_device_spi0; 58extern struct platform_device s3c_device_spi0;
59extern struct platform_device s3c_device_spi1; 59extern struct platform_device s3c_device_spi1;
60 60
61extern struct platform_device s5pc100_device_spi0;
62extern struct platform_device s5pc100_device_spi1;
63extern struct platform_device s5pc100_device_spi2;
64extern struct platform_device s5pv210_device_spi0;
65extern struct platform_device s5pv210_device_spi1;
66extern struct platform_device s5p6440_device_spi0;
67extern struct platform_device s5p6440_device_spi1;
68
61extern struct platform_device s3c_device_hwmon; 69extern struct platform_device s3c_device_hwmon;
62 70
63extern struct platform_device s3c_device_nand; 71extern struct platform_device s3c_device_nand;
@@ -77,6 +85,7 @@ extern struct platform_device s5p6442_device_pcm0;
77extern struct platform_device s5p6442_device_pcm1; 85extern struct platform_device s5p6442_device_pcm1;
78extern struct platform_device s5p6442_device_iis0; 86extern struct platform_device s5p6442_device_iis0;
79extern struct platform_device s5p6442_device_iis1; 87extern struct platform_device s5p6442_device_iis1;
88extern struct platform_device s5p6442_device_spi;
80 89
81extern struct platform_device s5p6440_device_pcm; 90extern struct platform_device s5p6440_device_pcm;
82extern struct platform_device s5p6440_device_iis; 91extern struct platform_device s5p6440_device_iis;
diff --git a/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h b/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h
index d17724149315..e5aba8f95b79 100644
--- a/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h
+++ b/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h
@@ -63,5 +63,9 @@ struct s3c64xx_spi_info {
63 * has some chips attached to it. 63 * has some chips attached to it.
64 */ 64 */
65extern void s3c64xx_spi_set_info(int cntrlr, int src_clk_nr, int num_cs); 65extern void s3c64xx_spi_set_info(int cntrlr, int src_clk_nr, int num_cs);
66extern void s5pc100_spi_set_info(int cntrlr, int src_clk_nr, int num_cs);
67extern void s5pv210_spi_set_info(int cntrlr, int src_clk_nr, int num_cs);
68extern void s5p6440_spi_set_info(int cntrlr, int src_clk_nr, int num_cs);
69extern void s5p6442_spi_set_info(int cntrlr, int src_clk_nr, int num_cs);
66 70
67#endif /* __S3C64XX_PLAT_SPI_H */ 71#endif /* __S3C64XX_PLAT_SPI_H */
generated by cgit v1.2.2 (git 2.25.0) at 2025-09-06 18:12:12 -0400