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authorAvi Kivity <avi@redhat.com>2010-08-01 05:35:10 -0400
committerAvi Kivity <avi@redhat.com>2010-10-24 04:50:33 -0400
commit1a6440aef6d63252e6c80aff651147b5f8c737e9 (patch)
treeed2b2534e664f7f98a433f7eaaf657fadcfd8582 /arch
parent09ee57cdae3156aa3b74f378a0c57ef657c90f38 (diff)
KVM: x86 emulator: use correct type for memory address in operands
Currently we use a void pointer for memory addresses. That's wrong since these are guest virtual addresses which are not directly dereferencable by the host. Use the correct type, unsigned long. Signed-off-by: Avi Kivity <avi@redhat.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/x86/include/asm/kvm_emulate.h5
-rw-r--r--arch/x86/kvm/emulate.c117
2 files changed, 61 insertions, 61 deletions
diff --git a/arch/x86/include/asm/kvm_emulate.h b/arch/x86/include/asm/kvm_emulate.h
index cbdf76722d7d..0c835f7eb308 100644
--- a/arch/x86/include/asm/kvm_emulate.h
+++ b/arch/x86/include/asm/kvm_emulate.h
@@ -156,7 +156,10 @@ struct operand {
156 unsigned long orig_val; 156 unsigned long orig_val;
157 u64 orig_val64; 157 u64 orig_val64;
158 }; 158 };
159 unsigned long *ptr; 159 union {
160 unsigned long *reg;
161 unsigned long mem;
162 } addr;
160 union { 163 union {
161 unsigned long val; 164 unsigned long val;
162 u64 val64; 165 u64 val64;
diff --git a/arch/x86/kvm/emulate.c b/arch/x86/kvm/emulate.c
index 471f12ae29cf..5f45f66ed277 100644
--- a/arch/x86/kvm/emulate.c
+++ b/arch/x86/kvm/emulate.c
@@ -489,7 +489,7 @@ static void *decode_register(u8 modrm_reg, unsigned long *regs,
489 489
490static int read_descriptor(struct x86_emulate_ctxt *ctxt, 490static int read_descriptor(struct x86_emulate_ctxt *ctxt,
491 struct x86_emulate_ops *ops, 491 struct x86_emulate_ops *ops,
492 void *ptr, 492 ulong addr,
493 u16 *size, unsigned long *address, int op_bytes) 493 u16 *size, unsigned long *address, int op_bytes)
494{ 494{
495 int rc; 495 int rc;
@@ -497,12 +497,10 @@ static int read_descriptor(struct x86_emulate_ctxt *ctxt,
497 if (op_bytes == 2) 497 if (op_bytes == 2)
498 op_bytes = 3; 498 op_bytes = 3;
499 *address = 0; 499 *address = 0;
500 rc = ops->read_std((unsigned long)ptr, (unsigned long *)size, 2, 500 rc = ops->read_std(addr, (unsigned long *)size, 2, ctxt->vcpu, NULL);
501 ctxt->vcpu, NULL);
502 if (rc != X86EMUL_CONTINUE) 501 if (rc != X86EMUL_CONTINUE)
503 return rc; 502 return rc;
504 rc = ops->read_std((unsigned long)ptr + 2, address, op_bytes, 503 rc = ops->read_std(addr + 2, address, op_bytes, ctxt->vcpu, NULL);
505 ctxt->vcpu, NULL);
506 return rc; 504 return rc;
507} 505}
508 506
@@ -552,21 +550,21 @@ static void decode_register_operand(struct operand *op,
552 reg = (c->b & 7) | ((c->rex_prefix & 1) << 3); 550 reg = (c->b & 7) | ((c->rex_prefix & 1) << 3);
553 op->type = OP_REG; 551 op->type = OP_REG;
554 if ((c->d & ByteOp) && !inhibit_bytereg) { 552 if ((c->d & ByteOp) && !inhibit_bytereg) {
555 op->ptr = decode_register(reg, c->regs, highbyte_regs); 553 op->addr.reg = decode_register(reg, c->regs, highbyte_regs);
556 op->val = *(u8 *)op->ptr; 554 op->val = *(u8 *)op->addr.reg;
557 op->bytes = 1; 555 op->bytes = 1;
558 } else { 556 } else {
559 op->ptr = decode_register(reg, c->regs, 0); 557 op->addr.reg = decode_register(reg, c->regs, 0);
560 op->bytes = c->op_bytes; 558 op->bytes = c->op_bytes;
561 switch (op->bytes) { 559 switch (op->bytes) {
562 case 2: 560 case 2:
563 op->val = *(u16 *)op->ptr; 561 op->val = *(u16 *)op->addr.reg;
564 break; 562 break;
565 case 4: 563 case 4:
566 op->val = *(u32 *)op->ptr; 564 op->val = *(u32 *)op->addr.reg;
567 break; 565 break;
568 case 8: 566 case 8:
569 op->val = *(u64 *) op->ptr; 567 op->val = *(u64 *) op->addr.reg;
570 break; 568 break;
571 } 569 }
572 } 570 }
@@ -976,23 +974,23 @@ static inline int writeback(struct x86_emulate_ctxt *ctxt,
976 */ 974 */
977 switch (c->dst.bytes) { 975 switch (c->dst.bytes) {
978 case 1: 976 case 1:
979 *(u8 *)c->dst.ptr = (u8)c->dst.val; 977 *(u8 *)c->dst.addr.reg = (u8)c->dst.val;
980 break; 978 break;
981 case 2: 979 case 2:
982 *(u16 *)c->dst.ptr = (u16)c->dst.val; 980 *(u16 *)c->dst.addr.reg = (u16)c->dst.val;
983 break; 981 break;
984 case 4: 982 case 4:
985 *c->dst.ptr = (u32)c->dst.val; 983 *c->dst.addr.reg = (u32)c->dst.val;
986 break; /* 64b: zero-ext */ 984 break; /* 64b: zero-ext */
987 case 8: 985 case 8:
988 *c->dst.ptr = c->dst.val; 986 *c->dst.addr.reg = c->dst.val;
989 break; 987 break;
990 } 988 }
991 break; 989 break;
992 case OP_MEM: 990 case OP_MEM:
993 if (c->lock_prefix) 991 if (c->lock_prefix)
994 rc = ops->cmpxchg_emulated( 992 rc = ops->cmpxchg_emulated(
995 (unsigned long)c->dst.ptr, 993 c->dst.addr.mem,
996 &c->dst.orig_val, 994 &c->dst.orig_val,
997 &c->dst.val, 995 &c->dst.val,
998 c->dst.bytes, 996 c->dst.bytes,
@@ -1000,14 +998,13 @@ static inline int writeback(struct x86_emulate_ctxt *ctxt,
1000 ctxt->vcpu); 998 ctxt->vcpu);
1001 else 999 else
1002 rc = ops->write_emulated( 1000 rc = ops->write_emulated(
1003 (unsigned long)c->dst.ptr, 1001 c->dst.addr.mem,
1004 &c->dst.val, 1002 &c->dst.val,
1005 c->dst.bytes, 1003 c->dst.bytes,
1006 &err, 1004 &err,
1007 ctxt->vcpu); 1005 ctxt->vcpu);
1008 if (rc == X86EMUL_PROPAGATE_FAULT) 1006 if (rc == X86EMUL_PROPAGATE_FAULT)
1009 emulate_pf(ctxt, 1007 emulate_pf(ctxt, c->dst.addr.mem, err);
1010 (unsigned long)c->dst.ptr, err);
1011 if (rc != X86EMUL_CONTINUE) 1008 if (rc != X86EMUL_CONTINUE)
1012 return rc; 1009 return rc;
1013 break; 1010 break;
@@ -1029,8 +1026,8 @@ static inline void emulate_push(struct x86_emulate_ctxt *ctxt,
1029 c->dst.bytes = c->op_bytes; 1026 c->dst.bytes = c->op_bytes;
1030 c->dst.val = c->src.val; 1027 c->dst.val = c->src.val;
1031 register_address_increment(c, &c->regs[VCPU_REGS_RSP], -c->op_bytes); 1028 register_address_increment(c, &c->regs[VCPU_REGS_RSP], -c->op_bytes);
1032 c->dst.ptr = (void *) register_address(c, ss_base(ctxt, ops), 1029 c->dst.addr.mem = register_address(c, ss_base(ctxt, ops),
1033 c->regs[VCPU_REGS_RSP]); 1030 c->regs[VCPU_REGS_RSP]);
1034} 1031}
1035 1032
1036static int emulate_pop(struct x86_emulate_ctxt *ctxt, 1033static int emulate_pop(struct x86_emulate_ctxt *ctxt,
@@ -2019,7 +2016,7 @@ static void string_addr_inc(struct x86_emulate_ctxt *ctxt, unsigned long base,
2019 int df = (ctxt->eflags & EFLG_DF) ? -1 : 1; 2016 int df = (ctxt->eflags & EFLG_DF) ? -1 : 1;
2020 2017
2021 register_address_increment(c, &c->regs[reg], df * op->bytes); 2018 register_address_increment(c, &c->regs[reg], df * op->bytes);
2022 op->ptr = (unsigned long *)register_address(c, base, c->regs[reg]); 2019 op->addr.mem = register_address(c, base, c->regs[reg]);
2023} 2020}
2024 2021
2025static int em_push(struct x86_emulate_ctxt *ctxt) 2022static int em_push(struct x86_emulate_ctxt *ctxt)
@@ -2456,17 +2453,17 @@ done_prefixes:
2456 if ((c->d & ModRM) && c->modrm_mod == 3) { 2453 if ((c->d & ModRM) && c->modrm_mod == 3) {
2457 c->src.type = OP_REG; 2454 c->src.type = OP_REG;
2458 c->src.val = c->modrm_val; 2455 c->src.val = c->modrm_val;
2459 c->src.ptr = c->modrm_ptr; 2456 c->src.addr.reg = c->modrm_ptr;
2460 break; 2457 break;
2461 } 2458 }
2462 c->src.type = OP_MEM; 2459 c->src.type = OP_MEM;
2463 c->src.ptr = (unsigned long *)c->modrm_ea; 2460 c->src.addr.mem = c->modrm_ea;
2464 c->src.val = 0; 2461 c->src.val = 0;
2465 break; 2462 break;
2466 case SrcImm: 2463 case SrcImm:
2467 case SrcImmU: 2464 case SrcImmU:
2468 c->src.type = OP_IMM; 2465 c->src.type = OP_IMM;
2469 c->src.ptr = (unsigned long *)c->eip; 2466 c->src.addr.mem = c->eip;
2470 c->src.bytes = (c->d & ByteOp) ? 1 : c->op_bytes; 2467 c->src.bytes = (c->d & ByteOp) ? 1 : c->op_bytes;
2471 if (c->src.bytes == 8) 2468 if (c->src.bytes == 8)
2472 c->src.bytes = 4; 2469 c->src.bytes = 4;
@@ -2499,7 +2496,7 @@ done_prefixes:
2499 case SrcImmByte: 2496 case SrcImmByte:
2500 case SrcImmUByte: 2497 case SrcImmUByte:
2501 c->src.type = OP_IMM; 2498 c->src.type = OP_IMM;
2502 c->src.ptr = (unsigned long *)c->eip; 2499 c->src.addr.mem = c->eip;
2503 c->src.bytes = 1; 2500 c->src.bytes = 1;
2504 if ((c->d & SrcMask) == SrcImmByte) 2501 if ((c->d & SrcMask) == SrcImmByte)
2505 c->src.val = insn_fetch(s8, 1, c->eip); 2502 c->src.val = insn_fetch(s8, 1, c->eip);
@@ -2509,19 +2506,19 @@ done_prefixes:
2509 case SrcAcc: 2506 case SrcAcc:
2510 c->src.type = OP_REG; 2507 c->src.type = OP_REG;
2511 c->src.bytes = (c->d & ByteOp) ? 1 : c->op_bytes; 2508 c->src.bytes = (c->d & ByteOp) ? 1 : c->op_bytes;
2512 c->src.ptr = &c->regs[VCPU_REGS_RAX]; 2509 c->src.addr.reg = &c->regs[VCPU_REGS_RAX];
2513 switch (c->src.bytes) { 2510 switch (c->src.bytes) {
2514 case 1: 2511 case 1:
2515 c->src.val = *(u8 *)c->src.ptr; 2512 c->src.val = *(u8 *)c->src.addr.reg;
2516 break; 2513 break;
2517 case 2: 2514 case 2:
2518 c->src.val = *(u16 *)c->src.ptr; 2515 c->src.val = *(u16 *)c->src.addr.reg;
2519 break; 2516 break;
2520 case 4: 2517 case 4:
2521 c->src.val = *(u32 *)c->src.ptr; 2518 c->src.val = *(u32 *)c->src.addr.reg;
2522 break; 2519 break;
2523 case 8: 2520 case 8:
2524 c->src.val = *(u64 *)c->src.ptr; 2521 c->src.val = *(u64 *)c->src.addr.reg;
2525 break; 2522 break;
2526 } 2523 }
2527 break; 2524 break;
@@ -2532,20 +2529,20 @@ done_prefixes:
2532 case SrcSI: 2529 case SrcSI:
2533 c->src.type = OP_MEM; 2530 c->src.type = OP_MEM;
2534 c->src.bytes = (c->d & ByteOp) ? 1 : c->op_bytes; 2531 c->src.bytes = (c->d & ByteOp) ? 1 : c->op_bytes;
2535 c->src.ptr = (unsigned long *) 2532 c->src.addr.mem =
2536 register_address(c, seg_override_base(ctxt, ops, c), 2533 register_address(c, seg_override_base(ctxt, ops, c),
2537 c->regs[VCPU_REGS_RSI]); 2534 c->regs[VCPU_REGS_RSI]);
2538 c->src.val = 0; 2535 c->src.val = 0;
2539 break; 2536 break;
2540 case SrcImmFAddr: 2537 case SrcImmFAddr:
2541 c->src.type = OP_IMM; 2538 c->src.type = OP_IMM;
2542 c->src.ptr = (unsigned long *)c->eip; 2539 c->src.addr.mem = c->eip;
2543 c->src.bytes = c->op_bytes + 2; 2540 c->src.bytes = c->op_bytes + 2;
2544 insn_fetch_arr(c->src.valptr, c->src.bytes, c->eip); 2541 insn_fetch_arr(c->src.valptr, c->src.bytes, c->eip);
2545 break; 2542 break;
2546 case SrcMemFAddr: 2543 case SrcMemFAddr:
2547 c->src.type = OP_MEM; 2544 c->src.type = OP_MEM;
2548 c->src.ptr = (unsigned long *)c->modrm_ea; 2545 c->src.addr.mem = c->modrm_ea;
2549 c->src.bytes = c->op_bytes + 2; 2546 c->src.bytes = c->op_bytes + 2;
2550 break; 2547 break;
2551 } 2548 }
@@ -2563,7 +2560,7 @@ done_prefixes:
2563 break; 2560 break;
2564 case Src2ImmByte: 2561 case Src2ImmByte:
2565 c->src2.type = OP_IMM; 2562 c->src2.type = OP_IMM;
2566 c->src2.ptr = (unsigned long *)c->eip; 2563 c->src2.addr.mem = c->eip;
2567 c->src2.bytes = 1; 2564 c->src2.bytes = 1;
2568 c->src2.val = insn_fetch(u8, 1, c->eip); 2565 c->src2.val = insn_fetch(u8, 1, c->eip);
2569 break; 2566 break;
@@ -2588,11 +2585,11 @@ done_prefixes:
2588 c->dst.bytes = (c->d & ByteOp) ? 1 : c->op_bytes; 2585 c->dst.bytes = (c->d & ByteOp) ? 1 : c->op_bytes;
2589 c->dst.type = OP_REG; 2586 c->dst.type = OP_REG;
2590 c->dst.val = c->dst.orig_val = c->modrm_val; 2587 c->dst.val = c->dst.orig_val = c->modrm_val;
2591 c->dst.ptr = c->modrm_ptr; 2588 c->dst.addr.reg = c->modrm_ptr;
2592 break; 2589 break;
2593 } 2590 }
2594 c->dst.type = OP_MEM; 2591 c->dst.type = OP_MEM;
2595 c->dst.ptr = (unsigned long *)c->modrm_ea; 2592 c->dst.addr.mem = c->modrm_ea;
2596 if ((c->d & DstMask) == DstMem64) 2593 if ((c->d & DstMask) == DstMem64)
2597 c->dst.bytes = 8; 2594 c->dst.bytes = 8;
2598 else 2595 else
@@ -2601,26 +2598,26 @@ done_prefixes:
2601 if (c->d & BitOp) { 2598 if (c->d & BitOp) {
2602 unsigned long mask = ~(c->dst.bytes * 8 - 1); 2599 unsigned long mask = ~(c->dst.bytes * 8 - 1);
2603 2600
2604 c->dst.ptr = (void *)c->dst.ptr + 2601 c->dst.addr.mem = c->dst.addr.mem +
2605 (c->src.val & mask) / 8; 2602 (c->src.val & mask) / 8;
2606 } 2603 }
2607 break; 2604 break;
2608 case DstAcc: 2605 case DstAcc:
2609 c->dst.type = OP_REG; 2606 c->dst.type = OP_REG;
2610 c->dst.bytes = (c->d & ByteOp) ? 1 : c->op_bytes; 2607 c->dst.bytes = (c->d & ByteOp) ? 1 : c->op_bytes;
2611 c->dst.ptr = &c->regs[VCPU_REGS_RAX]; 2608 c->dst.addr.reg = &c->regs[VCPU_REGS_RAX];
2612 switch (c->dst.bytes) { 2609 switch (c->dst.bytes) {
2613 case 1: 2610 case 1:
2614 c->dst.val = *(u8 *)c->dst.ptr; 2611 c->dst.val = *(u8 *)c->dst.addr.reg;
2615 break; 2612 break;
2616 case 2: 2613 case 2:
2617 c->dst.val = *(u16 *)c->dst.ptr; 2614 c->dst.val = *(u16 *)c->dst.addr.reg;
2618 break; 2615 break;
2619 case 4: 2616 case 4:
2620 c->dst.val = *(u32 *)c->dst.ptr; 2617 c->dst.val = *(u32 *)c->dst.addr.reg;
2621 break; 2618 break;
2622 case 8: 2619 case 8:
2623 c->dst.val = *(u64 *)c->dst.ptr; 2620 c->dst.val = *(u64 *)c->dst.addr.reg;
2624 break; 2621 break;
2625 } 2622 }
2626 c->dst.orig_val = c->dst.val; 2623 c->dst.orig_val = c->dst.val;
@@ -2628,7 +2625,7 @@ done_prefixes:
2628 case DstDI: 2625 case DstDI:
2629 c->dst.type = OP_MEM; 2626 c->dst.type = OP_MEM;
2630 c->dst.bytes = (c->d & ByteOp) ? 1 : c->op_bytes; 2627 c->dst.bytes = (c->d & ByteOp) ? 1 : c->op_bytes;
2631 c->dst.ptr = (unsigned long *) 2628 c->dst.addr.mem =
2632 register_address(c, es_base(ctxt, ops), 2629 register_address(c, es_base(ctxt, ops),
2633 c->regs[VCPU_REGS_RDI]); 2630 c->regs[VCPU_REGS_RDI]);
2634 c->dst.val = 0; 2631 c->dst.val = 0;
@@ -2696,7 +2693,7 @@ x86_emulate_insn(struct x86_emulate_ctxt *ctxt)
2696 } 2693 }
2697 2694
2698 if (c->src.type == OP_MEM) { 2695 if (c->src.type == OP_MEM) {
2699 rc = read_emulated(ctxt, ops, (unsigned long)c->src.ptr, 2696 rc = read_emulated(ctxt, ops, c->src.addr.mem,
2700 c->src.valptr, c->src.bytes); 2697 c->src.valptr, c->src.bytes);
2701 if (rc != X86EMUL_CONTINUE) 2698 if (rc != X86EMUL_CONTINUE)
2702 goto done; 2699 goto done;
@@ -2704,7 +2701,7 @@ x86_emulate_insn(struct x86_emulate_ctxt *ctxt)
2704 } 2701 }
2705 2702
2706 if (c->src2.type == OP_MEM) { 2703 if (c->src2.type == OP_MEM) {
2707 rc = read_emulated(ctxt, ops, (unsigned long)c->src2.ptr, 2704 rc = read_emulated(ctxt, ops, c->src2.addr.mem,
2708 &c->src2.val, c->src2.bytes); 2705 &c->src2.val, c->src2.bytes);
2709 if (rc != X86EMUL_CONTINUE) 2706 if (rc != X86EMUL_CONTINUE)
2710 goto done; 2707 goto done;
@@ -2716,7 +2713,7 @@ x86_emulate_insn(struct x86_emulate_ctxt *ctxt)
2716 2713
2717 if ((c->dst.type == OP_MEM) && !(c->d & Mov)) { 2714 if ((c->dst.type == OP_MEM) && !(c->d & Mov)) {
2718 /* optimisation - avoid slow emulated read if Mov */ 2715 /* optimisation - avoid slow emulated read if Mov */
2719 rc = read_emulated(ctxt, ops, (unsigned long)c->dst.ptr, 2716 rc = read_emulated(ctxt, ops, c->dst.addr.mem,
2720 &c->dst.val, c->dst.bytes); 2717 &c->dst.val, c->dst.bytes);
2721 if (rc != X86EMUL_CONTINUE) 2718 if (rc != X86EMUL_CONTINUE)
2722 goto done; 2719 goto done;
@@ -2880,16 +2877,16 @@ special_insn:
2880 /* Write back the register source. */ 2877 /* Write back the register source. */
2881 switch (c->dst.bytes) { 2878 switch (c->dst.bytes) {
2882 case 1: 2879 case 1:
2883 *(u8 *) c->src.ptr = (u8) c->dst.val; 2880 *(u8 *) c->src.addr.reg = (u8) c->dst.val;
2884 break; 2881 break;
2885 case 2: 2882 case 2:
2886 *(u16 *) c->src.ptr = (u16) c->dst.val; 2883 *(u16 *) c->src.addr.reg = (u16) c->dst.val;
2887 break; 2884 break;
2888 case 4: 2885 case 4:
2889 *c->src.ptr = (u32) c->dst.val; 2886 *c->src.addr.reg = (u32) c->dst.val;
2890 break; /* 64b reg: zero-extend */ 2887 break; /* 64b reg: zero-extend */
2891 case 8: 2888 case 8:
2892 *c->src.ptr = c->dst.val; 2889 *c->src.addr.reg = c->dst.val;
2893 break; 2890 break;
2894 } 2891 }
2895 /* 2892 /*
@@ -2936,15 +2933,15 @@ special_insn:
2936 goto done; 2933 goto done;
2937 break; 2934 break;
2938 case 0x90: /* nop / xchg r8,rax */ 2935 case 0x90: /* nop / xchg r8,rax */
2939 if (c->dst.ptr == (unsigned long *)&c->regs[VCPU_REGS_RAX]) { 2936 if (c->dst.addr.reg == &c->regs[VCPU_REGS_RAX]) {
2940 c->dst.type = OP_NONE; /* nop */ 2937 c->dst.type = OP_NONE; /* nop */
2941 break; 2938 break;
2942 } 2939 }
2943 case 0x91 ... 0x97: /* xchg reg,rax */ 2940 case 0x91 ... 0x97: /* xchg reg,rax */
2944 c->src.type = OP_REG; 2941 c->src.type = OP_REG;
2945 c->src.bytes = c->op_bytes; 2942 c->src.bytes = c->op_bytes;
2946 c->src.ptr = (unsigned long *) &c->regs[VCPU_REGS_RAX]; 2943 c->src.addr.reg = &c->regs[VCPU_REGS_RAX];
2947 c->src.val = *(c->src.ptr); 2944 c->src.val = *(c->src.addr.reg);
2948 goto xchg; 2945 goto xchg;
2949 case 0x9c: /* pushf */ 2946 case 0x9c: /* pushf */
2950 c->src.val = (unsigned long) ctxt->eflags; 2947 c->src.val = (unsigned long) ctxt->eflags;
@@ -2952,7 +2949,7 @@ special_insn:
2952 break; 2949 break;
2953 case 0x9d: /* popf */ 2950 case 0x9d: /* popf */
2954 c->dst.type = OP_REG; 2951 c->dst.type = OP_REG;
2955 c->dst.ptr = (unsigned long *) &ctxt->eflags; 2952 c->dst.addr.reg = &ctxt->eflags;
2956 c->dst.bytes = c->op_bytes; 2953 c->dst.bytes = c->op_bytes;
2957 rc = emulate_popf(ctxt, ops, &c->dst.val, c->op_bytes); 2954 rc = emulate_popf(ctxt, ops, &c->dst.val, c->op_bytes);
2958 if (rc != X86EMUL_CONTINUE) 2955 if (rc != X86EMUL_CONTINUE)
@@ -2963,7 +2960,7 @@ special_insn:
2963 goto mov; 2960 goto mov;
2964 case 0xa6 ... 0xa7: /* cmps */ 2961 case 0xa6 ... 0xa7: /* cmps */
2965 c->dst.type = OP_NONE; /* Disable writeback. */ 2962 c->dst.type = OP_NONE; /* Disable writeback. */
2966 DPRINTF("cmps: mem1=0x%p mem2=0x%p\n", c->src.ptr, c->dst.ptr); 2963 DPRINTF("cmps: mem1=0x%p mem2=0x%p\n", c->src.addr.mem, c->dst.addr.mem);
2967 goto cmp; 2964 goto cmp;
2968 case 0xa8 ... 0xa9: /* test ax, imm */ 2965 case 0xa8 ... 0xa9: /* test ax, imm */
2969 goto test; 2966 goto test;
@@ -2982,7 +2979,7 @@ special_insn:
2982 break; 2979 break;
2983 case 0xc3: /* ret */ 2980 case 0xc3: /* ret */
2984 c->dst.type = OP_REG; 2981 c->dst.type = OP_REG;
2985 c->dst.ptr = &c->eip; 2982 c->dst.addr.reg = &c->eip;
2986 c->dst.bytes = c->op_bytes; 2983 c->dst.bytes = c->op_bytes;
2987 goto pop_instruction; 2984 goto pop_instruction;
2988 case 0xc6 ... 0xc7: /* mov (sole member of Grp11) */ 2985 case 0xc6 ... 0xc7: /* mov (sole member of Grp11) */
@@ -3184,7 +3181,7 @@ twobyte_insn:
3184 c->dst.type = OP_NONE; 3181 c->dst.type = OP_NONE;
3185 break; 3182 break;
3186 case 2: /* lgdt */ 3183 case 2: /* lgdt */
3187 rc = read_descriptor(ctxt, ops, c->src.ptr, 3184 rc = read_descriptor(ctxt, ops, c->src.addr.mem,
3188 &size, &address, c->op_bytes); 3185 &size, &address, c->op_bytes);
3189 if (rc != X86EMUL_CONTINUE) 3186 if (rc != X86EMUL_CONTINUE)
3190 goto done; 3187 goto done;
@@ -3204,7 +3201,7 @@ twobyte_insn:
3204 goto cannot_emulate; 3201 goto cannot_emulate;
3205 } 3202 }
3206 } else { 3203 } else {
3207 rc = read_descriptor(ctxt, ops, c->src.ptr, 3204 rc = read_descriptor(ctxt, ops, c->src.addr.mem,
3208 &size, &address, 3205 &size, &address,
3209 c->op_bytes); 3206 c->op_bytes);
3210 if (rc != X86EMUL_CONTINUE) 3207 if (rc != X86EMUL_CONTINUE)
@@ -3399,7 +3396,7 @@ twobyte_insn:
3399 } else { 3396 } else {
3400 /* Failure: write the value we saw to EAX. */ 3397 /* Failure: write the value we saw to EAX. */
3401 c->dst.type = OP_REG; 3398 c->dst.type = OP_REG;
3402 c->dst.ptr = (unsigned long *)&c->regs[VCPU_REGS_RAX]; 3399 c->dst.addr.reg = (unsigned long *)&c->regs[VCPU_REGS_RAX];
3403 } 3400 }
3404 break; 3401 break;
3405 case 0xb3: 3402 case 0xb3: