diff options
author | Paul Burton <paul.burton@imgtec.com> | 2014-07-09 07:48:18 -0400 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2014-07-30 14:47:39 -0400 |
commit | 064231e548d0ef90453081f424ced7b3ffffffe9 (patch) | |
tree | 40d8e21d395d879a0a518ed9222872981b401e73 /arch | |
parent | 250dc03727b9cce91bd86091f05bf2443e2be9ec (diff) |
MIPS: pm-cps: Prevent use of mips_cps_* without CPS SMP
These symbols will not be defined when CONFIG_MIPS_CPS=n, but although
the CPS_PM_POWER_GATED state will never be used in that case the
compiler doesn't have enough information to figure that out. Add checks
which evaluate to a constant false for CONFIG_MIPS_CPS=n cases in order
to help the compiler out & eliminate the symbol references.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Reviewed-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/7278/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/mips/include/asm/smp-cps.h | 12 | ||||
-rw-r--r-- | arch/mips/kernel/pm-cps.c | 8 |
2 files changed, 18 insertions, 2 deletions
diff --git a/arch/mips/include/asm/smp-cps.h b/arch/mips/include/asm/smp-cps.h index a06a08a9afc6..326c16ebd589 100644 --- a/arch/mips/include/asm/smp-cps.h +++ b/arch/mips/include/asm/smp-cps.h | |||
@@ -31,11 +31,19 @@ extern void mips_cps_core_init(void); | |||
31 | 31 | ||
32 | extern struct vpe_boot_config *mips_cps_boot_vpes(void); | 32 | extern struct vpe_boot_config *mips_cps_boot_vpes(void); |
33 | 33 | ||
34 | extern bool mips_cps_smp_in_use(void); | ||
35 | |||
36 | extern void mips_cps_pm_save(void); | 34 | extern void mips_cps_pm_save(void); |
37 | extern void mips_cps_pm_restore(void); | 35 | extern void mips_cps_pm_restore(void); |
38 | 36 | ||
37 | #ifdef CONFIG_MIPS_CPS | ||
38 | |||
39 | extern bool mips_cps_smp_in_use(void); | ||
40 | |||
41 | #else /* !CONFIG_MIPS_CPS */ | ||
42 | |||
43 | static inline bool mips_cps_smp_in_use(void) { return false; } | ||
44 | |||
45 | #endif /* !CONFIG_MIPS_CPS */ | ||
46 | |||
39 | #else /* __ASSEMBLY__ */ | 47 | #else /* __ASSEMBLY__ */ |
40 | 48 | ||
41 | .extern mips_cps_bootcfg; | 49 | .extern mips_cps_bootcfg; |
diff --git a/arch/mips/kernel/pm-cps.c b/arch/mips/kernel/pm-cps.c index c4c2069d3a20..c409a5aef8ab 100644 --- a/arch/mips/kernel/pm-cps.c +++ b/arch/mips/kernel/pm-cps.c | |||
@@ -149,6 +149,10 @@ int cps_pm_enter_state(enum cps_pm_state state) | |||
149 | 149 | ||
150 | /* Setup the VPE to run mips_cps_pm_restore when started again */ | 150 | /* Setup the VPE to run mips_cps_pm_restore when started again */ |
151 | if (config_enabled(CONFIG_CPU_PM) && state == CPS_PM_POWER_GATED) { | 151 | if (config_enabled(CONFIG_CPU_PM) && state == CPS_PM_POWER_GATED) { |
152 | /* Power gating relies upon CPS SMP */ | ||
153 | if (!mips_cps_smp_in_use()) | ||
154 | return -EINVAL; | ||
155 | |||
152 | core_cfg = &mips_cps_core_bootcfg[core]; | 156 | core_cfg = &mips_cps_core_bootcfg[core]; |
153 | vpe_cfg = &core_cfg->vpe_config[current_cpu_data.vpe_id]; | 157 | vpe_cfg = &core_cfg->vpe_config[current_cpu_data.vpe_id]; |
154 | vpe_cfg->pc = (unsigned long)mips_cps_pm_restore; | 158 | vpe_cfg->pc = (unsigned long)mips_cps_pm_restore; |
@@ -376,6 +380,10 @@ static void * __init cps_gen_entry_code(unsigned cpu, enum cps_pm_state state) | |||
376 | memset(relocs, 0, sizeof(relocs)); | 380 | memset(relocs, 0, sizeof(relocs)); |
377 | 381 | ||
378 | if (config_enabled(CONFIG_CPU_PM) && state == CPS_PM_POWER_GATED) { | 382 | if (config_enabled(CONFIG_CPU_PM) && state == CPS_PM_POWER_GATED) { |
383 | /* Power gating relies upon CPS SMP */ | ||
384 | if (!mips_cps_smp_in_use()) | ||
385 | goto out_err; | ||
386 | |||
379 | /* | 387 | /* |
380 | * Save CPU state. Note the non-standard calling convention | 388 | * Save CPU state. Note the non-standard calling convention |
381 | * with the return address placed in v0 to avoid clobbering | 389 | * with the return address placed in v0 to avoid clobbering |