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authorIsaku Yamahata <yamahata@valinux.co.jp>2008-10-16 22:17:48 -0400
committerTony Luck <tony.luck@intel.com>2008-10-17 12:54:58 -0400
commitffcc99e992aef3bb5ab4b177b6bd84954ac2e327 (patch)
treeabca43148e239d55875cf0514d76efdebdc5081c /arch
parent627308c90775399ea15f890723926d144874d782 (diff)
ia64/xen: introduce definitions necessary for ia64/xen hypercalls.
import arch/ia64/include/asm/xen/interface.h to introduce definitions necessary for ia64/xen hypercalls. They are basic structures to communicate with xen hypervisor and will be used later. Cc: Robin Holt <holt@sgi.com> Cc: Jeremy Fitzhardinge <jeremy@goop.org> Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp> Signed-off-by: Tony Luck <tony.luck@intel.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/ia64/include/asm/xen/interface.h346
1 files changed, 346 insertions, 0 deletions
diff --git a/arch/ia64/include/asm/xen/interface.h b/arch/ia64/include/asm/xen/interface.h
new file mode 100644
index 000000000000..f00fab40854d
--- /dev/null
+++ b/arch/ia64/include/asm/xen/interface.h
@@ -0,0 +1,346 @@
1/******************************************************************************
2 * arch-ia64/hypervisor-if.h
3 *
4 * Guest OS interface to IA64 Xen.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to
8 * deal in the Software without restriction, including without limitation the
9 * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
10 * sell copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 *
24 * Copyright by those who contributed. (in alphabetical order)
25 *
26 * Anthony Xu <anthony.xu@intel.com>
27 * Eddie Dong <eddie.dong@intel.com>
28 * Fred Yang <fred.yang@intel.com>
29 * Kevin Tian <kevin.tian@intel.com>
30 * Alex Williamson <alex.williamson@hp.com>
31 * Chris Wright <chrisw@sous-sol.org>
32 * Christian Limpach <Christian.Limpach@cl.cam.ac.uk>
33 * Dietmar Hahn <dietmar.hahn@fujitsu-siemens.com>
34 * Hollis Blanchard <hollisb@us.ibm.com>
35 * Isaku Yamahata <yamahata@valinux.co.jp>
36 * Jan Beulich <jbeulich@novell.com>
37 * John Levon <john.levon@sun.com>
38 * Kazuhiro Suzuki <kaz@jp.fujitsu.com>
39 * Keir Fraser <keir.fraser@citrix.com>
40 * Kouya Shimura <kouya@jp.fujitsu.com>
41 * Masaki Kanno <kanno.masaki@jp.fujitsu.com>
42 * Matt Chapman <matthewc@hp.com>
43 * Matthew Chapman <matthewc@hp.com>
44 * Samuel Thibault <samuel.thibault@eu.citrix.com>
45 * Tomonari Horikoshi <t.horikoshi@jp.fujitsu.com>
46 * Tristan Gingold <tgingold@free.fr>
47 * Tsunehisa Doi <Doi.Tsunehisa@jp.fujitsu.com>
48 * Yutaka Ezaki <yutaka.ezaki@jp.fujitsu.com>
49 * Zhang Xin <xing.z.zhang@intel.com>
50 * Zhang xiantao <xiantao.zhang@intel.com>
51 * dan.magenheimer@hp.com
52 * ian.pratt@cl.cam.ac.uk
53 * michael.fetterman@cl.cam.ac.uk
54 */
55
56#ifndef _ASM_IA64_XEN_INTERFACE_H
57#define _ASM_IA64_XEN_INTERFACE_H
58
59#define __DEFINE_GUEST_HANDLE(name, type) \
60 typedef struct { type *p; } __guest_handle_ ## name
61
62#define DEFINE_GUEST_HANDLE_STRUCT(name) \
63 __DEFINE_GUEST_HANDLE(name, struct name)
64#define DEFINE_GUEST_HANDLE(name) __DEFINE_GUEST_HANDLE(name, name)
65#define GUEST_HANDLE(name) __guest_handle_ ## name
66#define GUEST_HANDLE_64(name) GUEST_HANDLE(name)
67#define set_xen_guest_handle(hnd, val) do { (hnd).p = val; } while (0)
68
69#ifndef __ASSEMBLY__
70/* Guest handles for primitive C types. */
71__DEFINE_GUEST_HANDLE(uchar, unsigned char);
72__DEFINE_GUEST_HANDLE(uint, unsigned int);
73__DEFINE_GUEST_HANDLE(ulong, unsigned long);
74__DEFINE_GUEST_HANDLE(u64, unsigned long);
75DEFINE_GUEST_HANDLE(char);
76DEFINE_GUEST_HANDLE(int);
77DEFINE_GUEST_HANDLE(long);
78DEFINE_GUEST_HANDLE(void);
79
80typedef unsigned long xen_pfn_t;
81DEFINE_GUEST_HANDLE(xen_pfn_t);
82#define PRI_xen_pfn "lx"
83#endif
84
85/* Arch specific VIRQs definition */
86#define VIRQ_ITC VIRQ_ARCH_0 /* V. Virtual itc timer */
87#define VIRQ_MCA_CMC VIRQ_ARCH_1 /* MCA cmc interrupt */
88#define VIRQ_MCA_CPE VIRQ_ARCH_2 /* MCA cpe interrupt */
89
90/* Maximum number of virtual CPUs in multi-processor guests. */
91/* keep sizeof(struct shared_page) <= PAGE_SIZE.
92 * this is checked in arch/ia64/xen/hypervisor.c. */
93#define MAX_VIRT_CPUS 64
94
95#ifndef __ASSEMBLY__
96
97#define INVALID_MFN (~0UL)
98
99union vac {
100 unsigned long value;
101 struct {
102 int a_int:1;
103 int a_from_int_cr:1;
104 int a_to_int_cr:1;
105 int a_from_psr:1;
106 int a_from_cpuid:1;
107 int a_cover:1;
108 int a_bsw:1;
109 long reserved:57;
110 };
111};
112
113union vdc {
114 unsigned long value;
115 struct {
116 int d_vmsw:1;
117 int d_extint:1;
118 int d_ibr_dbr:1;
119 int d_pmc:1;
120 int d_to_pmd:1;
121 int d_itm:1;
122 long reserved:58;
123 };
124};
125
126struct mapped_regs {
127 union vac vac;
128 union vdc vdc;
129 unsigned long virt_env_vaddr;
130 unsigned long reserved1[29];
131 unsigned long vhpi;
132 unsigned long reserved2[95];
133 union {
134 unsigned long vgr[16];
135 unsigned long bank1_regs[16]; /* bank1 regs (r16-r31)
136 when bank0 active */
137 };
138 union {
139 unsigned long vbgr[16];
140 unsigned long bank0_regs[16]; /* bank0 regs (r16-r31)
141 when bank1 active */
142 };
143 unsigned long vnat;
144 unsigned long vbnat;
145 unsigned long vcpuid[5];
146 unsigned long reserved3[11];
147 unsigned long vpsr;
148 unsigned long vpr;
149 unsigned long reserved4[76];
150 union {
151 unsigned long vcr[128];
152 struct {
153 unsigned long dcr; /* CR0 */
154 unsigned long itm;
155 unsigned long iva;
156 unsigned long rsv1[5];
157 unsigned long pta; /* CR8 */
158 unsigned long rsv2[7];
159 unsigned long ipsr; /* CR16 */
160 unsigned long isr;
161 unsigned long rsv3;
162 unsigned long iip;
163 unsigned long ifa;
164 unsigned long itir;
165 unsigned long iipa;
166 unsigned long ifs;
167 unsigned long iim; /* CR24 */
168 unsigned long iha;
169 unsigned long rsv4[38];
170 unsigned long lid; /* CR64 */
171 unsigned long ivr;
172 unsigned long tpr;
173 unsigned long eoi;
174 unsigned long irr[4];
175 unsigned long itv; /* CR72 */
176 unsigned long pmv;
177 unsigned long cmcv;
178 unsigned long rsv5[5];
179 unsigned long lrr0; /* CR80 */
180 unsigned long lrr1;
181 unsigned long rsv6[46];
182 };
183 };
184 union {
185 unsigned long reserved5[128];
186 struct {
187 unsigned long precover_ifs;
188 unsigned long unat; /* not sure if this is needed
189 until NaT arch is done */
190 int interrupt_collection_enabled; /* virtual psr.ic */
191
192 /* virtual interrupt deliverable flag is
193 * evtchn_upcall_mask in shared info area now.
194 * interrupt_mask_addr is the address
195 * of evtchn_upcall_mask for current vcpu
196 */
197 unsigned char *interrupt_mask_addr;
198 int pending_interruption;
199 unsigned char vpsr_pp;
200 unsigned char vpsr_dfh;
201 unsigned char hpsr_dfh;
202 unsigned char hpsr_mfh;
203 unsigned long reserved5_1[4];
204 int metaphysical_mode; /* 1 = use metaphys mapping
205 0 = use virtual */
206 int banknum; /* 0 or 1, which virtual
207 register bank is active */
208 unsigned long rrs[8]; /* region registers */
209 unsigned long krs[8]; /* kernel registers */
210 unsigned long tmp[16]; /* temp registers
211 (e.g. for hyperprivops) */
212 };
213 };
214};
215
216struct arch_vcpu_info {
217 /* nothing */
218};
219
220/*
221 * This structure is used for magic page in domain pseudo physical address
222 * space and the result of XENMEM_machine_memory_map.
223 * As the XENMEM_machine_memory_map result,
224 * xen_memory_map::nr_entries indicates the size in bytes
225 * including struct xen_ia64_memmap_info. Not the number of entries.
226 */
227struct xen_ia64_memmap_info {
228 uint64_t efi_memmap_size; /* size of EFI memory map */
229 uint64_t efi_memdesc_size; /* size of an EFI memory map
230 * descriptor */
231 uint32_t efi_memdesc_version; /* memory descriptor version */
232 void *memdesc[0]; /* array of efi_memory_desc_t */
233};
234
235struct arch_shared_info {
236 /* PFN of the start_info page. */
237 unsigned long start_info_pfn;
238
239 /* Interrupt vector for event channel. */
240 int evtchn_vector;
241
242 /* PFN of memmap_info page */
243 unsigned int memmap_info_num_pages; /* currently only = 1 case is
244 supported. */
245 unsigned long memmap_info_pfn;
246
247 uint64_t pad[31];
248};
249
250struct xen_callback {
251 unsigned long ip;
252};
253typedef struct xen_callback xen_callback_t;
254
255#endif /* !__ASSEMBLY__ */
256
257/* Size of the shared_info area (this is not related to page size). */
258#define XSI_SHIFT 14
259#define XSI_SIZE (1 << XSI_SHIFT)
260/* Log size of mapped_regs area (64 KB - only 4KB is used). */
261#define XMAPPEDREGS_SHIFT 12
262#define XMAPPEDREGS_SIZE (1 << XMAPPEDREGS_SHIFT)
263/* Offset of XASI (Xen arch shared info) wrt XSI_BASE. */
264#define XMAPPEDREGS_OFS XSI_SIZE
265
266/* Hyperprivops. */
267#define HYPERPRIVOP_START 0x1
268#define HYPERPRIVOP_RFI (HYPERPRIVOP_START + 0x0)
269#define HYPERPRIVOP_RSM_DT (HYPERPRIVOP_START + 0x1)
270#define HYPERPRIVOP_SSM_DT (HYPERPRIVOP_START + 0x2)
271#define HYPERPRIVOP_COVER (HYPERPRIVOP_START + 0x3)
272#define HYPERPRIVOP_ITC_D (HYPERPRIVOP_START + 0x4)
273#define HYPERPRIVOP_ITC_I (HYPERPRIVOP_START + 0x5)
274#define HYPERPRIVOP_SSM_I (HYPERPRIVOP_START + 0x6)
275#define HYPERPRIVOP_GET_IVR (HYPERPRIVOP_START + 0x7)
276#define HYPERPRIVOP_GET_TPR (HYPERPRIVOP_START + 0x8)
277#define HYPERPRIVOP_SET_TPR (HYPERPRIVOP_START + 0x9)
278#define HYPERPRIVOP_EOI (HYPERPRIVOP_START + 0xa)
279#define HYPERPRIVOP_SET_ITM (HYPERPRIVOP_START + 0xb)
280#define HYPERPRIVOP_THASH (HYPERPRIVOP_START + 0xc)
281#define HYPERPRIVOP_PTC_GA (HYPERPRIVOP_START + 0xd)
282#define HYPERPRIVOP_ITR_D (HYPERPRIVOP_START + 0xe)
283#define HYPERPRIVOP_GET_RR (HYPERPRIVOP_START + 0xf)
284#define HYPERPRIVOP_SET_RR (HYPERPRIVOP_START + 0x10)
285#define HYPERPRIVOP_SET_KR (HYPERPRIVOP_START + 0x11)
286#define HYPERPRIVOP_FC (HYPERPRIVOP_START + 0x12)
287#define HYPERPRIVOP_GET_CPUID (HYPERPRIVOP_START + 0x13)
288#define HYPERPRIVOP_GET_PMD (HYPERPRIVOP_START + 0x14)
289#define HYPERPRIVOP_GET_EFLAG (HYPERPRIVOP_START + 0x15)
290#define HYPERPRIVOP_SET_EFLAG (HYPERPRIVOP_START + 0x16)
291#define HYPERPRIVOP_RSM_BE (HYPERPRIVOP_START + 0x17)
292#define HYPERPRIVOP_GET_PSR (HYPERPRIVOP_START + 0x18)
293#define HYPERPRIVOP_SET_RR0_TO_RR4 (HYPERPRIVOP_START + 0x19)
294#define HYPERPRIVOP_MAX (0x1a)
295
296/* Fast and light hypercalls. */
297#define __HYPERVISOR_ia64_fast_eoi __HYPERVISOR_arch_1
298
299/* Xencomm macros. */
300#define XENCOMM_INLINE_MASK 0xf800000000000000UL
301#define XENCOMM_INLINE_FLAG 0x8000000000000000UL
302
303#ifndef __ASSEMBLY__
304
305/*
306 * Optimization features.
307 * The hypervisor may do some special optimizations for guests. This hypercall
308 * can be used to switch on/of these special optimizations.
309 */
310#define __HYPERVISOR_opt_feature 0x700UL
311
312#define XEN_IA64_OPTF_OFF 0x0
313#define XEN_IA64_OPTF_ON 0x1
314
315/*
316 * If this feature is switched on, the hypervisor inserts the
317 * tlb entries without calling the guests traphandler.
318 * This is useful in guests using region 7 for identity mapping
319 * like the linux kernel does.
320 */
321#define XEN_IA64_OPTF_IDENT_MAP_REG7 1
322
323/* Identity mapping of region 4 addresses in HVM. */
324#define XEN_IA64_OPTF_IDENT_MAP_REG4 2
325
326/* Identity mapping of region 5 addresses in HVM. */
327#define XEN_IA64_OPTF_IDENT_MAP_REG5 3
328
329#define XEN_IA64_OPTF_IDENT_MAP_NOT_SET (0)
330
331struct xen_ia64_opt_feature {
332 unsigned long cmd; /* Which feature */
333 unsigned char on; /* Switch feature on/off */
334 union {
335 struct {
336 /* The page protection bit mask of the pte.
337 * This will be or'ed with the pte. */
338 unsigned long pgprot;
339 unsigned long key; /* A protection key for itir.*/
340 };
341 };
342};
343
344#endif /* __ASSEMBLY__ */
345
346#endif /* _ASM_IA64_XEN_INTERFACE_H */