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authorPaul Walmsley <paul@pwsan.com>2010-02-23 00:09:18 -0500
committerPaul Walmsley <paul@pwsan.com>2010-02-24 14:15:06 -0500
commitf71eddb1582f5c53ed4bfc365a2acce94aca88cc (patch)
tree95a8a8a350b9f7712634692e287773a20772a0da /arch
parent1a3377176b3d41e3f30483a624cdafadeeb4064f (diff)
OMAP clock: compress clock flags down to a u8
There are now only eight OMAP clock flags, so renumber the flags to fit in a u8 and shrink the size of struct clk.flags from a u32 to a u8. The intention is to save memory. Signed-off-by: Paul Walmsley <paul@pwsan.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/plat-omap/include/plat/clock.h24
1 files changed, 9 insertions, 15 deletions
diff --git a/arch/arm/plat-omap/include/plat/clock.h b/arch/arm/plat-omap/include/plat/clock.h
index 70cddc091325..474c21e40eab 100644
--- a/arch/arm/plat-omap/include/plat/clock.h
+++ b/arch/arm/plat-omap/include/plat/clock.h
@@ -125,7 +125,6 @@ struct clk {
125 struct list_head children; 125 struct list_head children;
126 struct list_head sibling; /* node for children */ 126 struct list_head sibling; /* node for children */
127 unsigned long rate; 127 unsigned long rate;
128 __u32 flags;
129 void __iomem *enable_reg; 128 void __iomem *enable_reg;
130 unsigned long (*recalc)(struct clk *); 129 unsigned long (*recalc)(struct clk *);
131 int (*set_rate)(struct clk *, unsigned long); 130 int (*set_rate)(struct clk *, unsigned long);
@@ -134,6 +133,7 @@ struct clk {
134 __u8 enable_bit; 133 __u8 enable_bit;
135 __s8 usecount; 134 __s8 usecount;
136 u8 fixed_div; 135 u8 fixed_div;
136 u8 flags;
137#ifdef CONFIG_ARCH_OMAP2PLUS 137#ifdef CONFIG_ARCH_OMAP2PLUS
138 void __iomem *clksel_reg; 138 void __iomem *clksel_reg;
139 u32 clksel_mask; 139 u32 clksel_mask;
@@ -187,20 +187,14 @@ extern void clk_exit_cpufreq_table(struct cpufreq_frequency_table **table);
187extern const struct clkops clkops_null; 187extern const struct clkops clkops_null;
188 188
189/* Clock flags */ 189/* Clock flags */
190/* bit 0 is free */ 190#define RATE_FIXED (1 << 0) /* Fixed clock rate */
191#define RATE_FIXED (1 << 1) /* Fixed clock rate */ 191#define ENABLE_REG_32BIT (1 << 1) /* Use 32-bit access */
192/* bits 2-4 are free */ 192#define CLOCK_IDLE_CONTROL (1 << 2)
193#define ENABLE_REG_32BIT (1 << 5) /* Use 32-bit access */ 193#define CLOCK_NO_IDLE_PARENT (1 << 3)
194/* bit 6 is free */ 194#define DELAYED_APP (1 << 4) /* Delay application of clock */
195#define CLOCK_IDLE_CONTROL (1 << 7) 195#define ENABLE_ON_INIT (1 << 5) /* Enable upon framework init */
196#define CLOCK_NO_IDLE_PARENT (1 << 8) 196#define INVERT_ENABLE (1 << 6) /* 0 enables, 1 disables */
197#define DELAYED_APP (1 << 9) /* Delay application of clock */ 197#define ALWAYS_ENABLED (1 << 7)
198/* bit 10 is currently free */
199#define ENABLE_ON_INIT (1 << 11) /* Enable upon framework init */
200#define INVERT_ENABLE (1 << 12) /* 0 enables, 1 disables */
201/* bit 13 is currently free */
202#define ALWAYS_ENABLED (1 << 14)
203/* bits 15-31 are currently free */
204 198
205/* Clksel_rate flags */ 199/* Clksel_rate flags */
206#define DEFAULT_RATE (1 << 0) 200#define DEFAULT_RATE (1 << 0)