diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2008-12-20 14:07:18 -0500 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2008-12-20 14:07:18 -0500 |
commit | e6a997eda9f76e83b7820b6e71406a43374b9f0f (patch) | |
tree | 4450ece27c396a57a64dfd784bd2c08ebe82193d /arch | |
parent | 9a1d1035631ad8b3edf301b273c30bdfc75de01e (diff) | |
parent | 280a9ca5d0663b185ddc4443052076c29652a328 (diff) |
Merge branch 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip
* 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
x86: fix resume (S2R) broken by Intel microcode module, on A110L
x86 gart: don't complain if no AMD GART found
AMD IOMMU: panic if completion wait loop fails
AMD IOMMU: set cmd buffer pointers to zero manually
x86: re-enable MCE on secondary CPUS after suspend/resume
AMD IOMMU: allocate rlookup_table with __GFP_ZERO
Diffstat (limited to 'arch')
-rw-r--r-- | arch/x86/kernel/amd_iommu.c | 5 | ||||
-rw-r--r-- | arch/x86/kernel/amd_iommu_init.c | 7 | ||||
-rw-r--r-- | arch/x86/kernel/cpu/mcheck/mce_64.c | 3 | ||||
-rw-r--r-- | arch/x86/kernel/microcode_core.c | 19 | ||||
-rw-r--r-- | arch/x86/kernel/microcode_intel.c | 6 | ||||
-rw-r--r-- | arch/x86/kernel/pci-gart_64.c | 4 |
6 files changed, 30 insertions, 14 deletions
diff --git a/arch/x86/kernel/amd_iommu.c b/arch/x86/kernel/amd_iommu.c index a7b6dec6fc3f..0a60d60ed036 100644 --- a/arch/x86/kernel/amd_iommu.c +++ b/arch/x86/kernel/amd_iommu.c | |||
@@ -235,8 +235,9 @@ static int iommu_completion_wait(struct amd_iommu *iommu) | |||
235 | status &= ~MMIO_STATUS_COM_WAIT_INT_MASK; | 235 | status &= ~MMIO_STATUS_COM_WAIT_INT_MASK; |
236 | writel(status, iommu->mmio_base + MMIO_STATUS_OFFSET); | 236 | writel(status, iommu->mmio_base + MMIO_STATUS_OFFSET); |
237 | 237 | ||
238 | if (unlikely((i == EXIT_LOOP_COUNT) && printk_ratelimit())) | 238 | if (unlikely(i == EXIT_LOOP_COUNT)) |
239 | printk(KERN_WARNING "AMD IOMMU: Completion wait loop failed\n"); | 239 | panic("AMD IOMMU: Completion wait loop failed\n"); |
240 | |||
240 | out: | 241 | out: |
241 | spin_unlock_irqrestore(&iommu->lock, flags); | 242 | spin_unlock_irqrestore(&iommu->lock, flags); |
242 | 243 | ||
diff --git a/arch/x86/kernel/amd_iommu_init.c b/arch/x86/kernel/amd_iommu_init.c index 30ae2701b3df..c6cc22815d35 100644 --- a/arch/x86/kernel/amd_iommu_init.c +++ b/arch/x86/kernel/amd_iommu_init.c | |||
@@ -427,6 +427,10 @@ static u8 * __init alloc_command_buffer(struct amd_iommu *iommu) | |||
427 | memcpy_toio(iommu->mmio_base + MMIO_CMD_BUF_OFFSET, | 427 | memcpy_toio(iommu->mmio_base + MMIO_CMD_BUF_OFFSET, |
428 | &entry, sizeof(entry)); | 428 | &entry, sizeof(entry)); |
429 | 429 | ||
430 | /* set head and tail to zero manually */ | ||
431 | writel(0x00, iommu->mmio_base + MMIO_CMD_HEAD_OFFSET); | ||
432 | writel(0x00, iommu->mmio_base + MMIO_CMD_TAIL_OFFSET); | ||
433 | |||
430 | iommu_feature_enable(iommu, CONTROL_CMDBUF_EN); | 434 | iommu_feature_enable(iommu, CONTROL_CMDBUF_EN); |
431 | 435 | ||
432 | return cmd_buf; | 436 | return cmd_buf; |
@@ -1074,7 +1078,8 @@ int __init amd_iommu_init(void) | |||
1074 | goto free; | 1078 | goto free; |
1075 | 1079 | ||
1076 | /* IOMMU rlookup table - find the IOMMU for a specific device */ | 1080 | /* IOMMU rlookup table - find the IOMMU for a specific device */ |
1077 | amd_iommu_rlookup_table = (void *)__get_free_pages(GFP_KERNEL, | 1081 | amd_iommu_rlookup_table = (void *)__get_free_pages( |
1082 | GFP_KERNEL | __GFP_ZERO, | ||
1078 | get_order(rlookup_table_size)); | 1083 | get_order(rlookup_table_size)); |
1079 | if (amd_iommu_rlookup_table == NULL) | 1084 | if (amd_iommu_rlookup_table == NULL) |
1080 | goto free; | 1085 | goto free; |
diff --git a/arch/x86/kernel/cpu/mcheck/mce_64.c b/arch/x86/kernel/cpu/mcheck/mce_64.c index 4b031a4ac856..1c838032fd37 100644 --- a/arch/x86/kernel/cpu/mcheck/mce_64.c +++ b/arch/x86/kernel/cpu/mcheck/mce_64.c | |||
@@ -510,12 +510,9 @@ static void __cpuinit mce_cpu_features(struct cpuinfo_x86 *c) | |||
510 | */ | 510 | */ |
511 | void __cpuinit mcheck_init(struct cpuinfo_x86 *c) | 511 | void __cpuinit mcheck_init(struct cpuinfo_x86 *c) |
512 | { | 512 | { |
513 | static cpumask_t mce_cpus = CPU_MASK_NONE; | ||
514 | |||
515 | mce_cpu_quirks(c); | 513 | mce_cpu_quirks(c); |
516 | 514 | ||
517 | if (mce_dont_init || | 515 | if (mce_dont_init || |
518 | cpu_test_and_set(smp_processor_id(), mce_cpus) || | ||
519 | !mce_available(c)) | 516 | !mce_available(c)) |
520 | return; | 517 | return; |
521 | 518 | ||
diff --git a/arch/x86/kernel/microcode_core.c b/arch/x86/kernel/microcode_core.c index 82fb2809ce32..c4b5b24e0217 100644 --- a/arch/x86/kernel/microcode_core.c +++ b/arch/x86/kernel/microcode_core.c | |||
@@ -272,13 +272,18 @@ static struct attribute_group mc_attr_group = { | |||
272 | .name = "microcode", | 272 | .name = "microcode", |
273 | }; | 273 | }; |
274 | 274 | ||
275 | static void microcode_fini_cpu(int cpu) | 275 | static void __microcode_fini_cpu(int cpu) |
276 | { | 276 | { |
277 | struct ucode_cpu_info *uci = ucode_cpu_info + cpu; | 277 | struct ucode_cpu_info *uci = ucode_cpu_info + cpu; |
278 | 278 | ||
279 | mutex_lock(µcode_mutex); | ||
280 | microcode_ops->microcode_fini_cpu(cpu); | 279 | microcode_ops->microcode_fini_cpu(cpu); |
281 | uci->valid = 0; | 280 | uci->valid = 0; |
281 | } | ||
282 | |||
283 | static void microcode_fini_cpu(int cpu) | ||
284 | { | ||
285 | mutex_lock(µcode_mutex); | ||
286 | __microcode_fini_cpu(cpu); | ||
282 | mutex_unlock(µcode_mutex); | 287 | mutex_unlock(µcode_mutex); |
283 | } | 288 | } |
284 | 289 | ||
@@ -306,12 +311,16 @@ static int microcode_resume_cpu(int cpu) | |||
306 | * to this cpu (a bit of paranoia): | 311 | * to this cpu (a bit of paranoia): |
307 | */ | 312 | */ |
308 | if (microcode_ops->collect_cpu_info(cpu, &nsig)) { | 313 | if (microcode_ops->collect_cpu_info(cpu, &nsig)) { |
309 | microcode_fini_cpu(cpu); | 314 | __microcode_fini_cpu(cpu); |
315 | printk(KERN_ERR "failed to collect_cpu_info for resuming cpu #%d\n", | ||
316 | cpu); | ||
310 | return -1; | 317 | return -1; |
311 | } | 318 | } |
312 | 319 | ||
313 | if (memcmp(&nsig, &uci->cpu_sig, sizeof(nsig))) { | 320 | if ((nsig.sig != uci->cpu_sig.sig) || (nsig.pf != uci->cpu_sig.pf)) { |
314 | microcode_fini_cpu(cpu); | 321 | __microcode_fini_cpu(cpu); |
322 | printk(KERN_ERR "cached ucode doesn't match the resuming cpu #%d\n", | ||
323 | cpu); | ||
315 | /* Should we look for a new ucode here? */ | 324 | /* Should we look for a new ucode here? */ |
316 | return 1; | 325 | return 1; |
317 | } | 326 | } |
diff --git a/arch/x86/kernel/microcode_intel.c b/arch/x86/kernel/microcode_intel.c index 622dc4a21784..a8e62792d171 100644 --- a/arch/x86/kernel/microcode_intel.c +++ b/arch/x86/kernel/microcode_intel.c | |||
@@ -155,6 +155,7 @@ static DEFINE_SPINLOCK(microcode_update_lock); | |||
155 | static int collect_cpu_info(int cpu_num, struct cpu_signature *csig) | 155 | static int collect_cpu_info(int cpu_num, struct cpu_signature *csig) |
156 | { | 156 | { |
157 | struct cpuinfo_x86 *c = &cpu_data(cpu_num); | 157 | struct cpuinfo_x86 *c = &cpu_data(cpu_num); |
158 | unsigned long flags; | ||
158 | unsigned int val[2]; | 159 | unsigned int val[2]; |
159 | 160 | ||
160 | memset(csig, 0, sizeof(*csig)); | 161 | memset(csig, 0, sizeof(*csig)); |
@@ -174,11 +175,16 @@ static int collect_cpu_info(int cpu_num, struct cpu_signature *csig) | |||
174 | csig->pf = 1 << ((val[1] >> 18) & 7); | 175 | csig->pf = 1 << ((val[1] >> 18) & 7); |
175 | } | 176 | } |
176 | 177 | ||
178 | /* serialize access to the physical write to MSR 0x79 */ | ||
179 | spin_lock_irqsave(µcode_update_lock, flags); | ||
180 | |||
177 | wrmsr(MSR_IA32_UCODE_REV, 0, 0); | 181 | wrmsr(MSR_IA32_UCODE_REV, 0, 0); |
178 | /* see notes above for revision 1.07. Apparent chip bug */ | 182 | /* see notes above for revision 1.07. Apparent chip bug */ |
179 | sync_core(); | 183 | sync_core(); |
180 | /* get the current revision from MSR 0x8B */ | 184 | /* get the current revision from MSR 0x8B */ |
181 | rdmsr(MSR_IA32_UCODE_REV, val[0], csig->rev); | 185 | rdmsr(MSR_IA32_UCODE_REV, val[0], csig->rev); |
186 | spin_unlock_irqrestore(µcode_update_lock, flags); | ||
187 | |||
182 | pr_debug("microcode: collect_cpu_info : sig=0x%x, pf=0x%x, rev=0x%x\n", | 188 | pr_debug("microcode: collect_cpu_info : sig=0x%x, pf=0x%x, rev=0x%x\n", |
183 | csig->sig, csig->pf, csig->rev); | 189 | csig->sig, csig->pf, csig->rev); |
184 | 190 | ||
diff --git a/arch/x86/kernel/pci-gart_64.c b/arch/x86/kernel/pci-gart_64.c index ba7ad83e20a8..a35eaa379ff6 100644 --- a/arch/x86/kernel/pci-gart_64.c +++ b/arch/x86/kernel/pci-gart_64.c | |||
@@ -745,10 +745,8 @@ void __init gart_iommu_init(void) | |||
745 | unsigned long scratch; | 745 | unsigned long scratch; |
746 | long i; | 746 | long i; |
747 | 747 | ||
748 | if (cache_k8_northbridges() < 0 || num_k8_northbridges == 0) { | 748 | if (cache_k8_northbridges() < 0 || num_k8_northbridges == 0) |
749 | printk(KERN_INFO "PCI-GART: No AMD GART found.\n"); | ||
750 | return; | 749 | return; |
751 | } | ||
752 | 750 | ||
753 | #ifndef CONFIG_AGP_AMD64 | 751 | #ifndef CONFIG_AGP_AMD64 |
754 | no_agp = 1; | 752 | no_agp = 1; |