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authorVenkatesh Pallipadi <venkatesh.pallipadi@intel.com>2009-04-06 21:51:29 -0400
committerLen Brown <len.brown@intel.com>2009-04-07 18:17:51 -0400
commitdb954b5898dd3ef3ef93f4144158ea8f97deb058 (patch)
tree781b62baa5aa262fca99198ba326e5e9cc44b26a /arch
parent577c9c456f0e1371cbade38eaf91ae8e8a308555 (diff)
x86 ACPI: Add support for Always Running APIC timer
Add support for Always Running APIC timer, CPUID_0x6_EAX_Bit2. This bit means the APIC timer continues to run even when CPU is in deep C-states. The advantage is that we can use LAPIC timer on these CPUs always, and there is no need for "slow to read and program" external timers (HPET/PIT) and the timer broadcast logic and related code in C-state entry and exit. Signed-off-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> Acked-by: H. Peter Anvin <hpa@zytor.com> Signed-off-by: Len Brown <len.brown@intel.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/x86/include/asm/cpufeature.h1
-rw-r--r--arch/x86/kernel/apic/apic.c6
-rw-r--r--arch/x86/kernel/cpu/addon_cpuid_features.c1
3 files changed, 8 insertions, 0 deletions
diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufeature.h
index 0beba0d1468d..bb83b1c397aa 100644
--- a/arch/x86/include/asm/cpufeature.h
+++ b/arch/x86/include/asm/cpufeature.h
@@ -154,6 +154,7 @@
154 * CPUID levels like 0x6, 0xA etc 154 * CPUID levels like 0x6, 0xA etc
155 */ 155 */
156#define X86_FEATURE_IDA (7*32+ 0) /* Intel Dynamic Acceleration */ 156#define X86_FEATURE_IDA (7*32+ 0) /* Intel Dynamic Acceleration */
157#define X86_FEATURE_ARAT (7*32+ 1) /* Always Running APIC Timer */
157 158
158/* Virtualization flags: Linux defined */ 159/* Virtualization flags: Linux defined */
159#define X86_FEATURE_TPR_SHADOW (8*32+ 0) /* Intel TPR Shadow */ 160#define X86_FEATURE_TPR_SHADOW (8*32+ 0) /* Intel TPR Shadow */
diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c
index 098ec84b8c00..f2870920f246 100644
--- a/arch/x86/kernel/apic/apic.c
+++ b/arch/x86/kernel/apic/apic.c
@@ -431,6 +431,12 @@ static void __cpuinit setup_APIC_timer(void)
431{ 431{
432 struct clock_event_device *levt = &__get_cpu_var(lapic_events); 432 struct clock_event_device *levt = &__get_cpu_var(lapic_events);
433 433
434 if (cpu_has(&current_cpu_data, X86_FEATURE_ARAT)) {
435 lapic_clockevent.features &= ~CLOCK_EVT_FEAT_C3STOP;
436 /* Make LAPIC timer preferrable over percpu HPET */
437 lapic_clockevent.rating = 150;
438 }
439
434 memcpy(levt, &lapic_clockevent, sizeof(*levt)); 440 memcpy(levt, &lapic_clockevent, sizeof(*levt));
435 levt->cpumask = cpumask_of(smp_processor_id()); 441 levt->cpumask = cpumask_of(smp_processor_id());
436 442
diff --git a/arch/x86/kernel/cpu/addon_cpuid_features.c b/arch/x86/kernel/cpu/addon_cpuid_features.c
index 8220ae69849d..c965e5212714 100644
--- a/arch/x86/kernel/cpu/addon_cpuid_features.c
+++ b/arch/x86/kernel/cpu/addon_cpuid_features.c
@@ -31,6 +31,7 @@ void __cpuinit init_scattered_cpuid_features(struct cpuinfo_x86 *c)
31 31
32 static const struct cpuid_bit __cpuinitconst cpuid_bits[] = { 32 static const struct cpuid_bit __cpuinitconst cpuid_bits[] = {
33 { X86_FEATURE_IDA, CR_EAX, 1, 0x00000006 }, 33 { X86_FEATURE_IDA, CR_EAX, 1, 0x00000006 },
34 { X86_FEATURE_ARAT, CR_EAX, 2, 0x00000006 },
34 { 0, 0, 0, 0 } 35 { 0, 0, 0, 0 }
35 }; 36 };
36 37