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authorFernando Luis VazquezCao <fernando@oss.ntt.co.jp>2007-05-02 13:27:17 -0400
committerAndi Kleen <andi@basil.nowhere.org>2007-05-02 13:27:17 -0400
commitae08e43eecd250e50ffa40c4bd62a65e005b875b (patch)
treec49dab56f332f50d9a6f43e93160ff7f524d590f /arch
parent8339e9fba33aa3205f541478c413982c0ac5a37f (diff)
[PATCH] i386: use safe_apic_wait_icr_idle - i386
The functionality provided by the new safe_apic_wait_icr_idle is being open-coded all over "kernel/smpboot.c". Use safe_apic_wait_icr_idle instead to consolidate code and ease maintenance. Signed-off-by: Fernando Luis Vazquez Cao <fernando@oss.ntt.co.jp> Signed-off-by: Andi Kleen <ak@suse.de>
Diffstat (limited to 'arch')
-rw-r--r--arch/i386/kernel/smpboot.c36
1 files changed, 8 insertions, 28 deletions
diff --git a/arch/i386/kernel/smpboot.c b/arch/i386/kernel/smpboot.c
index f14d93351a82..94dce14a1b37 100644
--- a/arch/i386/kernel/smpboot.c
+++ b/arch/i386/kernel/smpboot.c
@@ -563,8 +563,8 @@ static inline void __inquire_remote_apic(int apicid)
563static int __devinit 563static int __devinit
564wakeup_secondary_cpu(int logical_apicid, unsigned long start_eip) 564wakeup_secondary_cpu(int logical_apicid, unsigned long start_eip)
565{ 565{
566 unsigned long send_status = 0, accept_status = 0; 566 unsigned long send_status, accept_status = 0;
567 int timeout, maxlvt; 567 int maxlvt;
568 568
569 /* Target chip */ 569 /* Target chip */
570 apic_write_around(APIC_ICR2, SET_APIC_DEST_FIELD(logical_apicid)); 570 apic_write_around(APIC_ICR2, SET_APIC_DEST_FIELD(logical_apicid));
@@ -574,12 +574,7 @@ wakeup_secondary_cpu(int logical_apicid, unsigned long start_eip)
574 apic_write_around(APIC_ICR, APIC_DM_NMI | APIC_DEST_LOGICAL); 574 apic_write_around(APIC_ICR, APIC_DM_NMI | APIC_DEST_LOGICAL);
575 575
576 Dprintk("Waiting for send to finish...\n"); 576 Dprintk("Waiting for send to finish...\n");
577 timeout = 0; 577 send_status = safe_apic_wait_icr_idle();
578 do {
579 Dprintk("+");
580 udelay(100);
581 send_status = apic_read(APIC_ICR) & APIC_ICR_BUSY;
582 } while (send_status && (timeout++ < 1000));
583 578
584 /* 579 /*
585 * Give the other CPU some time to accept the IPI. 580 * Give the other CPU some time to accept the IPI.
@@ -609,8 +604,8 @@ wakeup_secondary_cpu(int logical_apicid, unsigned long start_eip)
609static int __devinit 604static int __devinit
610wakeup_secondary_cpu(int phys_apicid, unsigned long start_eip) 605wakeup_secondary_cpu(int phys_apicid, unsigned long start_eip)
611{ 606{
612 unsigned long send_status = 0, accept_status = 0; 607 unsigned long send_status, accept_status = 0;
613 int maxlvt, timeout, num_starts, j; 608 int maxlvt, num_starts, j;
614 609
615 /* 610 /*
616 * Be paranoid about clearing APIC errors. 611 * Be paranoid about clearing APIC errors.
@@ -635,12 +630,7 @@ wakeup_secondary_cpu(int phys_apicid, unsigned long start_eip)
635 | APIC_DM_INIT); 630 | APIC_DM_INIT);
636 631
637 Dprintk("Waiting for send to finish...\n"); 632 Dprintk("Waiting for send to finish...\n");
638 timeout = 0; 633 send_status = safe_apic_wait_icr_idle();
639 do {
640 Dprintk("+");
641 udelay(100);
642 send_status = apic_read(APIC_ICR) & APIC_ICR_BUSY;
643 } while (send_status && (timeout++ < 1000));
644 634
645 mdelay(10); 635 mdelay(10);
646 636
@@ -653,12 +643,7 @@ wakeup_secondary_cpu(int phys_apicid, unsigned long start_eip)
653 apic_write_around(APIC_ICR, APIC_INT_LEVELTRIG | APIC_DM_INIT); 643 apic_write_around(APIC_ICR, APIC_INT_LEVELTRIG | APIC_DM_INIT);
654 644
655 Dprintk("Waiting for send to finish...\n"); 645 Dprintk("Waiting for send to finish...\n");
656 timeout = 0; 646 send_status = safe_apic_wait_icr_idle();
657 do {
658 Dprintk("+");
659 udelay(100);
660 send_status = apic_read(APIC_ICR) & APIC_ICR_BUSY;
661 } while (send_status && (timeout++ < 1000));
662 647
663 atomic_set(&init_deasserted, 1); 648 atomic_set(&init_deasserted, 1);
664 649
@@ -714,12 +699,7 @@ wakeup_secondary_cpu(int phys_apicid, unsigned long start_eip)
714 Dprintk("Startup point 1.\n"); 699 Dprintk("Startup point 1.\n");
715 700
716 Dprintk("Waiting for send to finish...\n"); 701 Dprintk("Waiting for send to finish...\n");
717 timeout = 0; 702 send_status = safe_apic_wait_icr_idle();
718 do {
719 Dprintk("+");
720 udelay(100);
721 send_status = apic_read(APIC_ICR) & APIC_ICR_BUSY;
722 } while (send_status && (timeout++ < 1000));
723 703
724 /* 704 /*
725 * Give the other CPU some time to accept the IPI. 705 * Give the other CPU some time to accept the IPI.