diff options
author | H. Peter Anvin <hpa@zytor.com> | 2010-05-03 18:49:31 -0400 |
---|---|---|
committer | H. Peter Anvin <hpa@zytor.com> | 2010-05-03 18:49:31 -0400 |
commit | 097c1bd5673edaf2a162724636858b71f658fdd2 (patch) | |
tree | 37d1718e00eea67dbe3c03628bdd6da8041407e1 /arch | |
parent | d88d95eb1c2a72b6126a550debe0883ff723a948 (diff) |
x86, cpu: Make APERF/MPERF a normal table-driven flag
APERF/MPERF can be handled via the table like all the other scattered
CPU flags.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Cc: Thomas Renninger <trenn@suse.de>
Cc: Borislav Petkov <borislav.petkov@amd.com>
LKML-Reference: <1270065406-1814-4-git-send-email-bp@amd64.org>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/x86/kernel/cpu/addon_cpuid_features.c | 23 |
1 files changed, 8 insertions, 15 deletions
diff --git a/arch/x86/kernel/cpu/addon_cpuid_features.c b/arch/x86/kernel/cpu/addon_cpuid_features.c index fd1fc1902a47..10fa5684a662 100644 --- a/arch/x86/kernel/cpu/addon_cpuid_features.c +++ b/arch/x86/kernel/cpu/addon_cpuid_features.c | |||
@@ -30,13 +30,14 @@ void __cpuinit init_scattered_cpuid_features(struct cpuinfo_x86 *c) | |||
30 | const struct cpuid_bit *cb; | 30 | const struct cpuid_bit *cb; |
31 | 31 | ||
32 | static const struct cpuid_bit __cpuinitconst cpuid_bits[] = { | 32 | static const struct cpuid_bit __cpuinitconst cpuid_bits[] = { |
33 | { X86_FEATURE_IDA, CR_EAX, 1, 0x00000006 }, | 33 | { X86_FEATURE_IDA, CR_EAX, 1, 0x00000006 }, |
34 | { X86_FEATURE_ARAT, CR_EAX, 2, 0x00000006 }, | 34 | { X86_FEATURE_ARAT, CR_EAX, 2, 0x00000006 }, |
35 | { X86_FEATURE_CPB, CR_EDX, 9, 0x80000007 }, | 35 | { X86_FEATURE_APERFMPERF, CR_ECX, 0, 0x00000006 }, |
36 | { X86_FEATURE_NPT, CR_EDX, 0, 0x8000000a }, | 36 | { X86_FEATURE_CPB, CR_EDX, 9, 0x80000007 }, |
37 | { X86_FEATURE_LBRV, CR_EDX, 1, 0x8000000a }, | 37 | { X86_FEATURE_NPT, CR_EDX, 0, 0x8000000a }, |
38 | { X86_FEATURE_SVML, CR_EDX, 2, 0x8000000a }, | 38 | { X86_FEATURE_LBRV, CR_EDX, 1, 0x8000000a }, |
39 | { X86_FEATURE_NRIPS, CR_EDX, 3, 0x8000000a }, | 39 | { X86_FEATURE_SVML, CR_EDX, 2, 0x8000000a }, |
40 | { X86_FEATURE_NRIPS, CR_EDX, 3, 0x8000000a }, | ||
40 | { 0, 0, 0, 0 } | 41 | { 0, 0, 0, 0 } |
41 | }; | 42 | }; |
42 | 43 | ||
@@ -54,14 +55,6 @@ void __cpuinit init_scattered_cpuid_features(struct cpuinfo_x86 *c) | |||
54 | if (regs[cb->reg] & (1 << cb->bit)) | 55 | if (regs[cb->reg] & (1 << cb->bit)) |
55 | set_cpu_cap(c, cb->feature); | 56 | set_cpu_cap(c, cb->feature); |
56 | } | 57 | } |
57 | |||
58 | /* | ||
59 | * common AMD/Intel features | ||
60 | */ | ||
61 | if (c->cpuid_level >= 6) { | ||
62 | if (cpuid_ecx(6) & 0x1) | ||
63 | set_cpu_cap(c, X86_FEATURE_APERFMPERF); | ||
64 | } | ||
65 | } | 58 | } |
66 | 59 | ||
67 | /* leaf 0xb SMT level */ | 60 | /* leaf 0xb SMT level */ |