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authorGrant Likely <grant.likely@secretlab.ca>2010-10-18 11:25:09 -0400
committerGrant Likely <grant.likely@secretlab.ca>2010-10-18 11:25:09 -0400
commitdb181a8ee158fd0ccea2e2670c4f2d36af2814a0 (patch)
treed03adc3926b4aca7ee172d825b90fe965b4f01b9 /arch
parentee2007d299ad4020115b193858817e6c57e95db5 (diff)
parent9c0a788b4315b83f6138ffa15c56ccf541106e58 (diff)
Merge branch 'for-spi' of git://git.kernel.org/pub/scm/linux/kernel/git/vapier/blackfin into spi/next
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/Kconfig14
-rw-r--r--arch/arm/kernel/kprobes-decode.c7
-rw-r--r--arch/arm/mach-at91/include/mach/system.h7
-rw-r--r--arch/arm/mach-ep93xx/dma-m2p.c2
-rw-r--r--arch/arm/mach-imx/Kconfig1
-rw-r--r--arch/arm/mach-imx/mach-cpuimx27.c2
-rw-r--r--arch/arm/mach-s5p6440/cpu.c1
-rw-r--r--arch/arm/mach-s5p6442/cpu.c1
-rw-r--r--arch/arm/mach-s5pc100/cpu.c1
-rw-r--r--arch/arm/mach-s5pv210/clock.c5
-rw-r--r--arch/arm/mach-s5pv210/cpu.c1
-rw-r--r--arch/arm/mach-vexpress/ct-ca9x4.c4
-rw-r--r--arch/arm/mach-vexpress/v2m.c2
-rw-r--r--arch/arm/mm/ioremap.c8
-rw-r--r--arch/arm/mm/mmu.c4
-rw-r--r--arch/arm/mm/proc-v7.S10
-rw-r--r--arch/arm/plat-omap/iommu.c1
-rw-r--r--arch/arm/plat-samsung/adc.c1
-rw-r--r--arch/arm/plat-samsung/clock.c27
-rw-r--r--arch/blackfin/include/asm/bfin5xx_spi.h81
-rw-r--r--arch/m32r/include/asm/elf.h4
-rw-r--r--arch/m32r/kernel/.gitignore1
-rw-r--r--arch/m32r/kernel/signal.c4
-rw-r--r--arch/mips/include/asm/siginfo.h1
-rw-r--r--arch/um/drivers/hostaudio_kern.c14
-rw-r--r--arch/um/drivers/ubd_kern.c9
-rw-r--r--arch/x86/ia32/ia32_aout.c22
-rw-r--r--arch/x86/kernel/cpu/mcheck/mce_amd.c9
-rw-r--r--arch/x86/kernel/cpu/mcheck/therm_throt.c3
-rw-r--r--arch/x86/kvm/svm.c2
-rw-r--r--arch/x86/mm/srat_64.c8
31 files changed, 116 insertions, 141 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 88c97bc7a6f5..9c26ba7244fb 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1101,6 +1101,20 @@ config ARM_ERRATA_720789
1101 invalidated are not, resulting in an incoherency in the system page 1101 invalidated are not, resulting in an incoherency in the system page
1102 tables. The workaround changes the TLB flushing routines to invalidate 1102 tables. The workaround changes the TLB flushing routines to invalidate
1103 entries regardless of the ASID. 1103 entries regardless of the ASID.
1104
1105config ARM_ERRATA_743622
1106 bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
1107 depends on CPU_V7
1108 help
1109 This option enables the workaround for the 743622 Cortex-A9
1110 (r2p0..r2p2) erratum. Under very rare conditions, a faulty
1111 optimisation in the Cortex-A9 Store Buffer may lead to data
1112 corruption. This workaround sets a specific bit in the diagnostic
1113 register of the Cortex-A9 which disables the Store Buffer
1114 optimisation, preventing the defect from occurring. This has no
1115 visible impact on the overall performance or power consumption of the
1116 processor.
1117
1104endmenu 1118endmenu
1105 1119
1106source "arch/arm/common/Kconfig" 1120source "arch/arm/common/Kconfig"
diff --git a/arch/arm/kernel/kprobes-decode.c b/arch/arm/kernel/kprobes-decode.c
index 8bccbfa693ff..2c1f0050c9c4 100644
--- a/arch/arm/kernel/kprobes-decode.c
+++ b/arch/arm/kernel/kprobes-decode.c
@@ -1162,11 +1162,12 @@ space_cccc_001x(kprobe_opcode_t insn, struct arch_specific_insn *asi)
1162{ 1162{
1163 /* 1163 /*
1164 * MSR : cccc 0011 0x10 xxxx xxxx xxxx xxxx xxxx 1164 * MSR : cccc 0011 0x10 xxxx xxxx xxxx xxxx xxxx
1165 * Undef : cccc 0011 0x00 xxxx xxxx xxxx xxxx xxxx 1165 * Undef : cccc 0011 0100 xxxx xxxx xxxx xxxx xxxx
1166 * ALU op with S bit and Rd == 15 : 1166 * ALU op with S bit and Rd == 15 :
1167 * cccc 001x xxx1 xxxx 1111 xxxx xxxx xxxx 1167 * cccc 001x xxx1 xxxx 1111 xxxx xxxx xxxx
1168 */ 1168 */
1169 if ((insn & 0x0f900000) == 0x03200000 || /* MSR & Undef */ 1169 if ((insn & 0x0fb00000) == 0x03200000 || /* MSR */
1170 (insn & 0x0ff00000) == 0x03400000 || /* Undef */
1170 (insn & 0x0e10f000) == 0x0210f000) /* ALU s-bit, R15 */ 1171 (insn & 0x0e10f000) == 0x0210f000) /* ALU s-bit, R15 */
1171 return INSN_REJECTED; 1172 return INSN_REJECTED;
1172 1173
@@ -1177,7 +1178,7 @@ space_cccc_001x(kprobe_opcode_t insn, struct arch_specific_insn *asi)
1177 * *S (bit 20) updates condition codes 1178 * *S (bit 20) updates condition codes
1178 * ADC/SBC/RSC reads the C flag 1179 * ADC/SBC/RSC reads the C flag
1179 */ 1180 */
1180 insn &= 0xfff00fff; /* Rn = r0, Rd = r0 */ 1181 insn &= 0xffff0fff; /* Rd = r0 */
1181 asi->insn[0] = insn; 1182 asi->insn[0] = insn;
1182 asi->insn_handler = (insn & (1 << 20)) ? /* S-bit */ 1183 asi->insn_handler = (insn & (1 << 20)) ? /* S-bit */
1183 emulate_alu_imm_rwflags : emulate_alu_imm_rflags; 1184 emulate_alu_imm_rwflags : emulate_alu_imm_rflags;
diff --git a/arch/arm/mach-at91/include/mach/system.h b/arch/arm/mach-at91/include/mach/system.h
index c80e090b3670..ee8db152592e 100644
--- a/arch/arm/mach-at91/include/mach/system.h
+++ b/arch/arm/mach-at91/include/mach/system.h
@@ -28,17 +28,16 @@
28 28
29static inline void arch_idle(void) 29static inline void arch_idle(void)
30{ 30{
31#ifndef CONFIG_DEBUG_KERNEL
32 /* 31 /*
33 * Disable the processor clock. The processor will be automatically 32 * Disable the processor clock. The processor will be automatically
34 * re-enabled by an interrupt or by a reset. 33 * re-enabled by an interrupt or by a reset.
35 */ 34 */
36 at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK); 35 at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK);
37#else 36#ifndef CONFIG_CPU_ARM920T
38 /* 37 /*
39 * Set the processor (CP15) into 'Wait for Interrupt' mode. 38 * Set the processor (CP15) into 'Wait for Interrupt' mode.
40 * Unlike disabling the processor clock via the PMC (above) 39 * Post-RM9200 processors need this in conjunction with the above
41 * this allows the processor to be woken via JTAG. 40 * to save power when idle.
42 */ 41 */
43 cpu_do_idle(); 42 cpu_do_idle();
44#endif 43#endif
diff --git a/arch/arm/mach-ep93xx/dma-m2p.c b/arch/arm/mach-ep93xx/dma-m2p.c
index 8904ca4e2e24..a696d354b1f8 100644
--- a/arch/arm/mach-ep93xx/dma-m2p.c
+++ b/arch/arm/mach-ep93xx/dma-m2p.c
@@ -276,7 +276,7 @@ static void channel_disable(struct m2p_channel *ch)
276 v &= ~(M2P_CONTROL_STALL_IRQ_EN | M2P_CONTROL_NFB_IRQ_EN); 276 v &= ~(M2P_CONTROL_STALL_IRQ_EN | M2P_CONTROL_NFB_IRQ_EN);
277 m2p_set_control(ch, v); 277 m2p_set_control(ch, v);
278 278
279 while (m2p_channel_state(ch) == STATE_ON) 279 while (m2p_channel_state(ch) >= STATE_ON)
280 cpu_relax(); 280 cpu_relax();
281 281
282 m2p_set_control(ch, 0x0); 282 m2p_set_control(ch, 0x0);
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index c5c0369bb481..2f7e2728970d 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -122,6 +122,7 @@ config MACH_CPUIMX27
122 select IMX_HAVE_PLATFORM_IMX_I2C 122 select IMX_HAVE_PLATFORM_IMX_I2C
123 select IMX_HAVE_PLATFORM_IMX_UART 123 select IMX_HAVE_PLATFORM_IMX_UART
124 select IMX_HAVE_PLATFORM_MXC_NAND 124 select IMX_HAVE_PLATFORM_MXC_NAND
125 select MXC_ULPI if USB_ULPI
125 help 126 help
126 Include support for Eukrea CPUIMX27 platform. This includes 127 Include support for Eukrea CPUIMX27 platform. This includes
127 specific configurations for the module and its peripherals. 128 specific configurations for the module and its peripherals.
diff --git a/arch/arm/mach-imx/mach-cpuimx27.c b/arch/arm/mach-imx/mach-cpuimx27.c
index 339150ab0ea5..6830afd1d2ba 100644
--- a/arch/arm/mach-imx/mach-cpuimx27.c
+++ b/arch/arm/mach-imx/mach-cpuimx27.c
@@ -259,7 +259,7 @@ static void __init eukrea_cpuimx27_init(void)
259 i2c_register_board_info(0, eukrea_cpuimx27_i2c_devices, 259 i2c_register_board_info(0, eukrea_cpuimx27_i2c_devices,
260 ARRAY_SIZE(eukrea_cpuimx27_i2c_devices)); 260 ARRAY_SIZE(eukrea_cpuimx27_i2c_devices));
261 261
262 imx27_add_i2c_imx1(&cpuimx27_i2c1_data); 262 imx27_add_i2c_imx0(&cpuimx27_i2c1_data);
263 263
264 platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); 264 platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
265 265
diff --git a/arch/arm/mach-s5p6440/cpu.c b/arch/arm/mach-s5p6440/cpu.c
index 526f33adb31d..ec592e866054 100644
--- a/arch/arm/mach-s5p6440/cpu.c
+++ b/arch/arm/mach-s5p6440/cpu.c
@@ -19,6 +19,7 @@
19#include <linux/sysdev.h> 19#include <linux/sysdev.h>
20#include <linux/serial_core.h> 20#include <linux/serial_core.h>
21#include <linux/platform_device.h> 21#include <linux/platform_device.h>
22#include <linux/sched.h>
22 23
23#include <asm/mach/arch.h> 24#include <asm/mach/arch.h>
24#include <asm/mach/map.h> 25#include <asm/mach/map.h>
diff --git a/arch/arm/mach-s5p6442/cpu.c b/arch/arm/mach-s5p6442/cpu.c
index a48fb553fd01..70ac681af72b 100644
--- a/arch/arm/mach-s5p6442/cpu.c
+++ b/arch/arm/mach-s5p6442/cpu.c
@@ -19,6 +19,7 @@
19#include <linux/sysdev.h> 19#include <linux/sysdev.h>
20#include <linux/serial_core.h> 20#include <linux/serial_core.h>
21#include <linux/platform_device.h> 21#include <linux/platform_device.h>
22#include <linux/sched.h>
22 23
23#include <asm/mach/arch.h> 24#include <asm/mach/arch.h>
24#include <asm/mach/map.h> 25#include <asm/mach/map.h>
diff --git a/arch/arm/mach-s5pc100/cpu.c b/arch/arm/mach-s5pc100/cpu.c
index 251c92ac5b22..cd1afbce83e2 100644
--- a/arch/arm/mach-s5pc100/cpu.c
+++ b/arch/arm/mach-s5pc100/cpu.c
@@ -21,6 +21,7 @@
21#include <linux/sysdev.h> 21#include <linux/sysdev.h>
22#include <linux/serial_core.h> 22#include <linux/serial_core.h>
23#include <linux/platform_device.h> 23#include <linux/platform_device.h>
24#include <linux/sched.h>
24 25
25#include <asm/mach/arch.h> 26#include <asm/mach/arch.h>
26#include <asm/mach/map.h> 27#include <asm/mach/map.h>
diff --git a/arch/arm/mach-s5pv210/clock.c b/arch/arm/mach-s5pv210/clock.c
index cfecd70657cb..d562670e1b0b 100644
--- a/arch/arm/mach-s5pv210/clock.c
+++ b/arch/arm/mach-s5pv210/clock.c
@@ -173,11 +173,6 @@ static int s5pv210_clk_ip3_ctrl(struct clk *clk, int enable)
173 return s5p_gatectrl(S5P_CLKGATE_IP3, clk, enable); 173 return s5p_gatectrl(S5P_CLKGATE_IP3, clk, enable);
174} 174}
175 175
176static int s5pv210_clk_ip4_ctrl(struct clk *clk, int enable)
177{
178 return s5p_gatectrl(S5P_CLKGATE_IP4, clk, enable);
179}
180
181static int s5pv210_clk_mask0_ctrl(struct clk *clk, int enable) 176static int s5pv210_clk_mask0_ctrl(struct clk *clk, int enable)
182{ 177{
183 return s5p_gatectrl(S5P_CLK_SRC_MASK0, clk, enable); 178 return s5p_gatectrl(S5P_CLK_SRC_MASK0, clk, enable);
diff --git a/arch/arm/mach-s5pv210/cpu.c b/arch/arm/mach-s5pv210/cpu.c
index 77f456c91ad3..245b82b53df4 100644
--- a/arch/arm/mach-s5pv210/cpu.c
+++ b/arch/arm/mach-s5pv210/cpu.c
@@ -19,6 +19,7 @@
19#include <linux/io.h> 19#include <linux/io.h>
20#include <linux/sysdev.h> 20#include <linux/sysdev.h>
21#include <linux/platform_device.h> 21#include <linux/platform_device.h>
22#include <linux/sched.h>
22 23
23#include <asm/mach/arch.h> 24#include <asm/mach/arch.h>
24#include <asm/mach/map.h> 25#include <asm/mach/map.h>
diff --git a/arch/arm/mach-vexpress/ct-ca9x4.c b/arch/arm/mach-vexpress/ct-ca9x4.c
index efb127022d42..71fb17349520 100644
--- a/arch/arm/mach-vexpress/ct-ca9x4.c
+++ b/arch/arm/mach-vexpress/ct-ca9x4.c
@@ -68,7 +68,7 @@ static void __init ct_ca9x4_init_irq(void)
68} 68}
69 69
70#if 0 70#if 0
71static void ct_ca9x4_timer_init(void) 71static void __init ct_ca9x4_timer_init(void)
72{ 72{
73 writel(0, MMIO_P2V(CT_CA9X4_TIMER0) + TIMER_CTRL); 73 writel(0, MMIO_P2V(CT_CA9X4_TIMER0) + TIMER_CTRL);
74 writel(0, MMIO_P2V(CT_CA9X4_TIMER1) + TIMER_CTRL); 74 writel(0, MMIO_P2V(CT_CA9X4_TIMER1) + TIMER_CTRL);
@@ -222,7 +222,7 @@ static struct platform_device pmu_device = {
222 .resource = pmu_resources, 222 .resource = pmu_resources,
223}; 223};
224 224
225static void ct_ca9x4_init(void) 225static void __init ct_ca9x4_init(void)
226{ 226{
227 int i; 227 int i;
228 228
diff --git a/arch/arm/mach-vexpress/v2m.c b/arch/arm/mach-vexpress/v2m.c
index 817f0ad38a0b..7eaa232180a5 100644
--- a/arch/arm/mach-vexpress/v2m.c
+++ b/arch/arm/mach-vexpress/v2m.c
@@ -48,7 +48,7 @@ void __init v2m_map_io(struct map_desc *tile, size_t num)
48} 48}
49 49
50 50
51static void v2m_timer_init(void) 51static void __init v2m_timer_init(void)
52{ 52{
53 writel(0, MMIO_P2V(V2M_TIMER0) + TIMER_CTRL); 53 writel(0, MMIO_P2V(V2M_TIMER0) + TIMER_CTRL);
54 writel(0, MMIO_P2V(V2M_TIMER1) + TIMER_CTRL); 54 writel(0, MMIO_P2V(V2M_TIMER1) + TIMER_CTRL);
diff --git a/arch/arm/mm/ioremap.c b/arch/arm/mm/ioremap.c
index ab506272b2d3..17e7b0b57e49 100644
--- a/arch/arm/mm/ioremap.c
+++ b/arch/arm/mm/ioremap.c
@@ -204,8 +204,12 @@ void __iomem * __arm_ioremap_pfn_caller(unsigned long pfn,
204 /* 204 /*
205 * Don't allow RAM to be mapped - this causes problems with ARMv6+ 205 * Don't allow RAM to be mapped - this causes problems with ARMv6+
206 */ 206 */
207 if (WARN_ON(pfn_valid(pfn))) 207 if (pfn_valid(pfn)) {
208 return NULL; 208 printk(KERN_WARNING "BUG: Your driver calls ioremap() on system memory. This leads\n"
209 KERN_WARNING "to architecturally unpredictable behaviour on ARMv6+, and ioremap()\n"
210 KERN_WARNING "will fail in the next kernel release. Please fix your driver.\n");
211 WARN_ON(1);
212 }
209 213
210 type = get_mem_type(mtype); 214 type = get_mem_type(mtype);
211 if (!type) 215 if (!type)
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index 6a3a2d0cd6db..e8ed9dc461fe 100644
--- a/arch/arm/mm/mmu.c
+++ b/arch/arm/mm/mmu.c
@@ -248,7 +248,7 @@ static struct mem_type mem_types[] = {
248 }, 248 },
249 [MT_MEMORY] = { 249 [MT_MEMORY] = {
250 .prot_pte = L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_DIRTY | 250 .prot_pte = L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_DIRTY |
251 L_PTE_USER | L_PTE_EXEC, 251 L_PTE_WRITE | L_PTE_EXEC,
252 .prot_l1 = PMD_TYPE_TABLE, 252 .prot_l1 = PMD_TYPE_TABLE,
253 .prot_sect = PMD_TYPE_SECT | PMD_SECT_AP_WRITE, 253 .prot_sect = PMD_TYPE_SECT | PMD_SECT_AP_WRITE,
254 .domain = DOMAIN_KERNEL, 254 .domain = DOMAIN_KERNEL,
@@ -259,7 +259,7 @@ static struct mem_type mem_types[] = {
259 }, 259 },
260 [MT_MEMORY_NONCACHED] = { 260 [MT_MEMORY_NONCACHED] = {
261 .prot_pte = L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_DIRTY | 261 .prot_pte = L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_DIRTY |
262 L_PTE_USER | L_PTE_EXEC | L_PTE_MT_BUFFERABLE, 262 L_PTE_WRITE | L_PTE_EXEC | L_PTE_MT_BUFFERABLE,
263 .prot_l1 = PMD_TYPE_TABLE, 263 .prot_l1 = PMD_TYPE_TABLE,
264 .prot_sect = PMD_TYPE_SECT | PMD_SECT_AP_WRITE, 264 .prot_sect = PMD_TYPE_SECT | PMD_SECT_AP_WRITE,
265 .domain = DOMAIN_KERNEL, 265 .domain = DOMAIN_KERNEL,
diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S
index 7563ff0141bd..197f21bed5e9 100644
--- a/arch/arm/mm/proc-v7.S
+++ b/arch/arm/mm/proc-v7.S
@@ -253,6 +253,14 @@ __v7_setup:
253 orreq r10, r10, #1 << 22 @ set bit #22 253 orreq r10, r10, #1 << 22 @ set bit #22
254 mcreq p15, 0, r10, c15, c0, 1 @ write diagnostic register 254 mcreq p15, 0, r10, c15, c0, 1 @ write diagnostic register
255#endif 255#endif
256#ifdef CONFIG_ARM_ERRATA_743622
257 teq r6, #0x20 @ present in r2p0
258 teqne r6, #0x21 @ present in r2p1
259 teqne r6, #0x22 @ present in r2p2
260 mrceq p15, 0, r10, c15, c0, 1 @ read diagnostic register
261 orreq r10, r10, #1 << 6 @ set bit #6
262 mcreq p15, 0, r10, c15, c0, 1 @ write diagnostic register
263#endif
256 264
2573: mov r10, #0 2653: mov r10, #0
258#ifdef HARVARD_CACHE 266#ifdef HARVARD_CACHE
@@ -365,7 +373,7 @@ __v7_ca9mp_proc_info:
365 b __v7_ca9mp_setup 373 b __v7_ca9mp_setup
366 .long cpu_arch_name 374 .long cpu_arch_name
367 .long cpu_elf_name 375 .long cpu_elf_name
368 .long HWCAP_SWP|HWCAP_HALF|HWCAP_THUMB|HWCAP_FAST_MULT|HWCAP_EDSP 376 .long HWCAP_SWP|HWCAP_HALF|HWCAP_THUMB|HWCAP_FAST_MULT|HWCAP_EDSP|HWCAP_TLS
369 .long cpu_v7_name 377 .long cpu_v7_name
370 .long v7_processor_functions 378 .long v7_processor_functions
371 .long v7wbi_tlb_fns 379 .long v7wbi_tlb_fns
diff --git a/arch/arm/plat-omap/iommu.c b/arch/arm/plat-omap/iommu.c
index a202a2ce6e3d..6cd151b31bc5 100644
--- a/arch/arm/plat-omap/iommu.c
+++ b/arch/arm/plat-omap/iommu.c
@@ -320,6 +320,7 @@ void flush_iotlb_page(struct iommu *obj, u32 da)
320 if ((start <= da) && (da < start + bytes)) { 320 if ((start <= da) && (da < start + bytes)) {
321 dev_dbg(obj->dev, "%s: %08x<=%08x(%x)\n", 321 dev_dbg(obj->dev, "%s: %08x<=%08x(%x)\n",
322 __func__, start, da, bytes); 322 __func__, start, da, bytes);
323 iotlb_load_cr(obj, &cr);
323 iommu_write_reg(obj, 1, MMU_FLUSH_ENTRY); 324 iommu_write_reg(obj, 1, MMU_FLUSH_ENTRY);
324 } 325 }
325 } 326 }
diff --git a/arch/arm/plat-samsung/adc.c b/arch/arm/plat-samsung/adc.c
index 04d9521ddc9f..e8f2be2d67f2 100644
--- a/arch/arm/plat-samsung/adc.c
+++ b/arch/arm/plat-samsung/adc.c
@@ -435,7 +435,6 @@ static int s3c_adc_suspend(struct platform_device *pdev, pm_message_t state)
435static int s3c_adc_resume(struct platform_device *pdev) 435static int s3c_adc_resume(struct platform_device *pdev)
436{ 436{
437 struct adc_device *adc = platform_get_drvdata(pdev); 437 struct adc_device *adc = platform_get_drvdata(pdev);
438 unsigned long flags;
439 438
440 clk_enable(adc->clk); 439 clk_enable(adc->clk);
441 enable_irq(adc->irq); 440 enable_irq(adc->irq);
diff --git a/arch/arm/plat-samsung/clock.c b/arch/arm/plat-samsung/clock.c
index 90a20512d68d..e8d20b0bc50e 100644
--- a/arch/arm/plat-samsung/clock.c
+++ b/arch/arm/plat-samsung/clock.c
@@ -48,6 +48,9 @@
48#include <plat/clock.h> 48#include <plat/clock.h>
49#include <plat/cpu.h> 49#include <plat/cpu.h>
50 50
51#include <linux/serial_core.h>
52#include <plat/regs-serial.h> /* for s3c24xx_uart_devs */
53
51/* clock information */ 54/* clock information */
52 55
53static LIST_HEAD(clocks); 56static LIST_HEAD(clocks);
@@ -65,6 +68,28 @@ static int clk_null_enable(struct clk *clk, int enable)
65 return 0; 68 return 0;
66} 69}
67 70
71static int dev_is_s3c_uart(struct device *dev)
72{
73 struct platform_device **pdev = s3c24xx_uart_devs;
74 int i;
75 for (i = 0; i < ARRAY_SIZE(s3c24xx_uart_devs); i++, pdev++)
76 if (*pdev && dev == &(*pdev)->dev)
77 return 1;
78 return 0;
79}
80
81/*
82 * Serial drivers call get_clock() very early, before platform bus
83 * has been set up, this requires a special check to let them get
84 * a proper clock
85 */
86
87static int dev_is_platform_device(struct device *dev)
88{
89 return dev->bus == &platform_bus_type ||
90 (dev->bus == NULL && dev_is_s3c_uart(dev));
91}
92
68/* Clock API calls */ 93/* Clock API calls */
69 94
70struct clk *clk_get(struct device *dev, const char *id) 95struct clk *clk_get(struct device *dev, const char *id)
@@ -73,7 +98,7 @@ struct clk *clk_get(struct device *dev, const char *id)
73 struct clk *clk = ERR_PTR(-ENOENT); 98 struct clk *clk = ERR_PTR(-ENOENT);
74 int idno; 99 int idno;
75 100
76 if (dev == NULL || dev->bus != &platform_bus_type) 101 if (dev == NULL || !dev_is_platform_device(dev))
77 idno = -1; 102 idno = -1;
78 else 103 else
79 idno = to_platform_device(dev)->id; 104 idno = to_platform_device(dev)->id;
diff --git a/arch/blackfin/include/asm/bfin5xx_spi.h b/arch/blackfin/include/asm/bfin5xx_spi.h
index ed4f8c6db0cd..4223cf08ce83 100644
--- a/arch/blackfin/include/asm/bfin5xx_spi.h
+++ b/arch/blackfin/include/asm/bfin5xx_spi.h
@@ -11,26 +11,17 @@
11 11
12#define MIN_SPI_BAUD_VAL 2 12#define MIN_SPI_BAUD_VAL 2
13 13
14#define SPI_READ 0
15#define SPI_WRITE 1
16
17#define SPI_CTRL_OFF 0x0
18#define SPI_FLAG_OFF 0x4
19#define SPI_STAT_OFF 0x8
20#define SPI_TXBUFF_OFF 0xc
21#define SPI_RXBUFF_OFF 0x10
22#define SPI_BAUD_OFF 0x14
23#define SPI_SHAW_OFF 0x18
24
25
26#define BIT_CTL_ENABLE 0x4000 14#define BIT_CTL_ENABLE 0x4000
27#define BIT_CTL_OPENDRAIN 0x2000 15#define BIT_CTL_OPENDRAIN 0x2000
28#define BIT_CTL_MASTER 0x1000 16#define BIT_CTL_MASTER 0x1000
29#define BIT_CTL_POLAR 0x0800 17#define BIT_CTL_CPOL 0x0800
30#define BIT_CTL_PHASE 0x0400 18#define BIT_CTL_CPHA 0x0400
31#define BIT_CTL_BITORDER 0x0200 19#define BIT_CTL_LSBF 0x0200
32#define BIT_CTL_WORDSIZE 0x0100 20#define BIT_CTL_WORDSIZE 0x0100
33#define BIT_CTL_MISOENABLE 0x0020 21#define BIT_CTL_EMISO 0x0020
22#define BIT_CTL_PSSE 0x0010
23#define BIT_CTL_GM 0x0008
24#define BIT_CTL_SZ 0x0004
34#define BIT_CTL_RXMOD 0x0000 25#define BIT_CTL_RXMOD 0x0000
35#define BIT_CTL_TXMOD 0x0001 26#define BIT_CTL_TXMOD 0x0001
36#define BIT_CTL_TIMOD_DMA_TX 0x0003 27#define BIT_CTL_TIMOD_DMA_TX 0x0003
@@ -50,61 +41,7 @@
50#define BIT_STU_SENDOVER 0x0001 41#define BIT_STU_SENDOVER 0x0001
51#define BIT_STU_RECVFULL 0x0020 42#define BIT_STU_RECVFULL 0x0020
52 43
53#define CFG_SPI_ENABLE 1 44#define MAX_CTRL_CS 8 /* cs in spi controller */
54#define CFG_SPI_DISABLE 0
55
56#define CFG_SPI_OUTENABLE 1
57#define CFG_SPI_OUTDISABLE 0
58
59#define CFG_SPI_ACTLOW 1
60#define CFG_SPI_ACTHIGH 0
61
62#define CFG_SPI_PHASESTART 1
63#define CFG_SPI_PHASEMID 0
64
65#define CFG_SPI_MASTER 1
66#define CFG_SPI_SLAVE 0
67
68#define CFG_SPI_SENELAST 0
69#define CFG_SPI_SENDZERO 1
70
71#define CFG_SPI_RCVFLUSH 1
72#define CFG_SPI_RCVDISCARD 0
73
74#define CFG_SPI_LSBFIRST 1
75#define CFG_SPI_MSBFIRST 0
76
77#define CFG_SPI_WORDSIZE16 1
78#define CFG_SPI_WORDSIZE8 0
79
80#define CFG_SPI_MISOENABLE 1
81#define CFG_SPI_MISODISABLE 0
82
83#define CFG_SPI_READ 0x00
84#define CFG_SPI_WRITE 0x01
85#define CFG_SPI_DMAREAD 0x02
86#define CFG_SPI_DMAWRITE 0x03
87
88#define CFG_SPI_CSCLEARALL 0
89#define CFG_SPI_CHIPSEL1 1
90#define CFG_SPI_CHIPSEL2 2
91#define CFG_SPI_CHIPSEL3 3
92#define CFG_SPI_CHIPSEL4 4
93#define CFG_SPI_CHIPSEL5 5
94#define CFG_SPI_CHIPSEL6 6
95#define CFG_SPI_CHIPSEL7 7
96
97#define CFG_SPI_CS1VALUE 1
98#define CFG_SPI_CS2VALUE 2
99#define CFG_SPI_CS3VALUE 3
100#define CFG_SPI_CS4VALUE 4
101#define CFG_SPI_CS5VALUE 5
102#define CFG_SPI_CS6VALUE 6
103#define CFG_SPI_CS7VALUE 7
104
105#define CMD_SPI_SET_BAUDRATE 2
106#define CMD_SPI_GET_SYSTEMCLOCK 25
107#define CMD_SPI_SET_WRITECONTINUOUS 26
108 45
109/* device.platform_data for SSP controller devices */ 46/* device.platform_data for SSP controller devices */
110struct bfin5xx_spi_master { 47struct bfin5xx_spi_master {
@@ -120,9 +57,7 @@ struct bfin5xx_spi_chip {
120 u16 ctl_reg; 57 u16 ctl_reg;
121 u8 enable_dma; 58 u8 enable_dma;
122 u8 bits_per_word; 59 u8 bits_per_word;
123 u8 cs_change_per_word;
124 u16 cs_chg_udelay; /* Some devices require 16-bit delays */ 60 u16 cs_chg_udelay; /* Some devices require 16-bit delays */
125 u32 cs_gpio;
126 /* Value to send if no TX value is supplied, usually 0x0 or 0xFFFF */ 61 /* Value to send if no TX value is supplied, usually 0x0 or 0xFFFF */
127 u16 idle_tx_val; 62 u16 idle_tx_val;
128 u8 pio_interrupt; /* Enable spi data irq */ 63 u8 pio_interrupt; /* Enable spi data irq */
diff --git a/arch/m32r/include/asm/elf.h b/arch/m32r/include/asm/elf.h
index 2f85412ef730..b8da7d0574d2 100644
--- a/arch/m32r/include/asm/elf.h
+++ b/arch/m32r/include/asm/elf.h
@@ -82,9 +82,9 @@ typedef elf_fpreg_t elf_fpregset_t;
82 * These are used to set parameters in the core dumps. 82 * These are used to set parameters in the core dumps.
83 */ 83 */
84#define ELF_CLASS ELFCLASS32 84#define ELF_CLASS ELFCLASS32
85#if defined(__LITTLE_ENDIAN) 85#if defined(__LITTLE_ENDIAN__)
86#define ELF_DATA ELFDATA2LSB 86#define ELF_DATA ELFDATA2LSB
87#elif defined(__BIG_ENDIAN) 87#elif defined(__BIG_ENDIAN__)
88#define ELF_DATA ELFDATA2MSB 88#define ELF_DATA ELFDATA2MSB
89#else 89#else
90#error no endian defined 90#error no endian defined
diff --git a/arch/m32r/kernel/.gitignore b/arch/m32r/kernel/.gitignore
new file mode 100644
index 000000000000..c5f676c3c224
--- /dev/null
+++ b/arch/m32r/kernel/.gitignore
@@ -0,0 +1 @@
vmlinux.lds
diff --git a/arch/m32r/kernel/signal.c b/arch/m32r/kernel/signal.c
index 7bbe38645ed5..a08697f0886d 100644
--- a/arch/m32r/kernel/signal.c
+++ b/arch/m32r/kernel/signal.c
@@ -28,6 +28,8 @@
28 28
29#define DEBUG_SIG 0 29#define DEBUG_SIG 0
30 30
31#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))
32
31asmlinkage int 33asmlinkage int
32sys_sigaltstack(const stack_t __user *uss, stack_t __user *uoss, 34sys_sigaltstack(const stack_t __user *uss, stack_t __user *uoss,
33 unsigned long r2, unsigned long r3, unsigned long r4, 35 unsigned long r2, unsigned long r3, unsigned long r4,
@@ -254,7 +256,7 @@ give_sigsegv:
254static int prev_insn(struct pt_regs *regs) 256static int prev_insn(struct pt_regs *regs)
255{ 257{
256 u16 inst; 258 u16 inst;
257 if (get_user(&inst, (u16 __user *)(regs->bpc - 2))) 259 if (get_user(inst, (u16 __user *)(regs->bpc - 2)))
258 return -EFAULT; 260 return -EFAULT;
259 if ((inst & 0xfff0) == 0x10f0) /* trap ? */ 261 if ((inst & 0xfff0) == 0x10f0) /* trap ? */
260 regs->bpc -= 2; 262 regs->bpc -= 2;
diff --git a/arch/mips/include/asm/siginfo.h b/arch/mips/include/asm/siginfo.h
index 96e28f18dad1..1ca64b4d33d9 100644
--- a/arch/mips/include/asm/siginfo.h
+++ b/arch/mips/include/asm/siginfo.h
@@ -88,6 +88,7 @@ typedef struct siginfo {
88#ifdef __ARCH_SI_TRAPNO 88#ifdef __ARCH_SI_TRAPNO
89 int _trapno; /* TRAP # which caused the signal */ 89 int _trapno; /* TRAP # which caused the signal */
90#endif 90#endif
91 short _addr_lsb;
91 } _sigfault; 92 } _sigfault;
92 93
93 /* SIGPOLL, SIGXFSZ (To do ...) */ 94 /* SIGPOLL, SIGXFSZ (To do ...) */
diff --git a/arch/um/drivers/hostaudio_kern.c b/arch/um/drivers/hostaudio_kern.c
index 0c46e398cd8f..63c740a85b4c 100644
--- a/arch/um/drivers/hostaudio_kern.c
+++ b/arch/um/drivers/hostaudio_kern.c
@@ -40,6 +40,11 @@ static char *mixer = HOSTAUDIO_DEV_MIXER;
40" This is used to specify the host mixer device to the hostaudio driver.\n"\ 40" This is used to specify the host mixer device to the hostaudio driver.\n"\
41" The default is \"" HOSTAUDIO_DEV_MIXER "\".\n\n" 41" The default is \"" HOSTAUDIO_DEV_MIXER "\".\n\n"
42 42
43module_param(dsp, charp, 0644);
44MODULE_PARM_DESC(dsp, DSP_HELP);
45module_param(mixer, charp, 0644);
46MODULE_PARM_DESC(mixer, MIXER_HELP);
47
43#ifndef MODULE 48#ifndef MODULE
44static int set_dsp(char *name, int *add) 49static int set_dsp(char *name, int *add)
45{ 50{
@@ -56,15 +61,6 @@ static int set_mixer(char *name, int *add)
56} 61}
57 62
58__uml_setup("mixer=", set_mixer, "mixer=<mixer device>\n" MIXER_HELP); 63__uml_setup("mixer=", set_mixer, "mixer=<mixer device>\n" MIXER_HELP);
59
60#else /*MODULE*/
61
62module_param(dsp, charp, 0644);
63MODULE_PARM_DESC(dsp, DSP_HELP);
64
65module_param(mixer, charp, 0644);
66MODULE_PARM_DESC(mixer, MIXER_HELP);
67
68#endif 64#endif
69 65
70/* /dev/dsp file operations */ 66/* /dev/dsp file operations */
diff --git a/arch/um/drivers/ubd_kern.c b/arch/um/drivers/ubd_kern.c
index 1bcd208c459f..9734994cba1e 100644
--- a/arch/um/drivers/ubd_kern.c
+++ b/arch/um/drivers/ubd_kern.c
@@ -163,6 +163,7 @@ struct ubd {
163 struct scatterlist sg[MAX_SG]; 163 struct scatterlist sg[MAX_SG];
164 struct request *request; 164 struct request *request;
165 int start_sg, end_sg; 165 int start_sg, end_sg;
166 sector_t rq_pos;
166}; 167};
167 168
168#define DEFAULT_COW { \ 169#define DEFAULT_COW { \
@@ -187,6 +188,7 @@ struct ubd {
187 .request = NULL, \ 188 .request = NULL, \
188 .start_sg = 0, \ 189 .start_sg = 0, \
189 .end_sg = 0, \ 190 .end_sg = 0, \
191 .rq_pos = 0, \
190} 192}
191 193
192/* Protected by ubd_lock */ 194/* Protected by ubd_lock */
@@ -1228,7 +1230,6 @@ static void do_ubd_request(struct request_queue *q)
1228{ 1230{
1229 struct io_thread_req *io_req; 1231 struct io_thread_req *io_req;
1230 struct request *req; 1232 struct request *req;
1231 sector_t sector;
1232 int n; 1233 int n;
1233 1234
1234 while(1){ 1235 while(1){
@@ -1239,12 +1240,12 @@ static void do_ubd_request(struct request_queue *q)
1239 return; 1240 return;
1240 1241
1241 dev->request = req; 1242 dev->request = req;
1243 dev->rq_pos = blk_rq_pos(req);
1242 dev->start_sg = 0; 1244 dev->start_sg = 0;
1243 dev->end_sg = blk_rq_map_sg(q, req, dev->sg); 1245 dev->end_sg = blk_rq_map_sg(q, req, dev->sg);
1244 } 1246 }
1245 1247
1246 req = dev->request; 1248 req = dev->request;
1247 sector = blk_rq_pos(req);
1248 while(dev->start_sg < dev->end_sg){ 1249 while(dev->start_sg < dev->end_sg){
1249 struct scatterlist *sg = &dev->sg[dev->start_sg]; 1250 struct scatterlist *sg = &dev->sg[dev->start_sg];
1250 1251
@@ -1256,10 +1257,9 @@ static void do_ubd_request(struct request_queue *q)
1256 return; 1257 return;
1257 } 1258 }
1258 prepare_request(req, io_req, 1259 prepare_request(req, io_req,
1259 (unsigned long long)sector << 9, 1260 (unsigned long long)dev->rq_pos << 9,
1260 sg->offset, sg->length, sg_page(sg)); 1261 sg->offset, sg->length, sg_page(sg));
1261 1262
1262 sector += sg->length >> 9;
1263 n = os_write_file(thread_fd, &io_req, 1263 n = os_write_file(thread_fd, &io_req,
1264 sizeof(struct io_thread_req *)); 1264 sizeof(struct io_thread_req *));
1265 if(n != sizeof(struct io_thread_req *)){ 1265 if(n != sizeof(struct io_thread_req *)){
@@ -1272,6 +1272,7 @@ static void do_ubd_request(struct request_queue *q)
1272 return; 1272 return;
1273 } 1273 }
1274 1274
1275 dev->rq_pos += sg->length >> 9;
1275 dev->start_sg++; 1276 dev->start_sg++;
1276 } 1277 }
1277 dev->end_sg = 0; 1278 dev->end_sg = 0;
diff --git a/arch/x86/ia32/ia32_aout.c b/arch/x86/ia32/ia32_aout.c
index 0350311906ae..2d93bdbc9ac0 100644
--- a/arch/x86/ia32/ia32_aout.c
+++ b/arch/x86/ia32/ia32_aout.c
@@ -34,7 +34,7 @@
34#include <asm/ia32.h> 34#include <asm/ia32.h>
35 35
36#undef WARN_OLD 36#undef WARN_OLD
37#undef CORE_DUMP /* probably broken */ 37#undef CORE_DUMP /* definitely broken */
38 38
39static int load_aout_binary(struct linux_binprm *, struct pt_regs *regs); 39static int load_aout_binary(struct linux_binprm *, struct pt_regs *regs);
40static int load_aout_library(struct file *); 40static int load_aout_library(struct file *);
@@ -131,21 +131,15 @@ static void set_brk(unsigned long start, unsigned long end)
131 * macros to write out all the necessary info. 131 * macros to write out all the necessary info.
132 */ 132 */
133 133
134static int dump_write(struct file *file, const void *addr, int nr) 134#include <linux/coredump.h>
135{
136 return file->f_op->write(file, addr, nr, &file->f_pos) == nr;
137}
138 135
139#define DUMP_WRITE(addr, nr) \ 136#define DUMP_WRITE(addr, nr) \
140 if (!dump_write(file, (void *)(addr), (nr))) \ 137 if (!dump_write(file, (void *)(addr), (nr))) \
141 goto end_coredump; 138 goto end_coredump;
142 139
143#define DUMP_SEEK(offset) \ 140#define DUMP_SEEK(offset) \
144 if (file->f_op->llseek) { \ 141 if (!dump_seek(file, offset)) \
145 if (file->f_op->llseek(file, (offset), 0) != (offset)) \ 142 goto end_coredump;
146 goto end_coredump; \
147 } else \
148 file->f_pos = (offset)
149 143
150#define START_DATA() (u.u_tsize << PAGE_SHIFT) 144#define START_DATA() (u.u_tsize << PAGE_SHIFT)
151#define START_STACK(u) (u.start_stack) 145#define START_STACK(u) (u.start_stack)
@@ -217,12 +211,6 @@ static int aout_core_dump(long signr, struct pt_regs *regs, struct file *file,
217 dump_size = dump.u_ssize << PAGE_SHIFT; 211 dump_size = dump.u_ssize << PAGE_SHIFT;
218 DUMP_WRITE(dump_start, dump_size); 212 DUMP_WRITE(dump_start, dump_size);
219 } 213 }
220 /*
221 * Finally dump the task struct. Not be used by gdb, but
222 * could be useful
223 */
224 set_fs(KERNEL_DS);
225 DUMP_WRITE(current, sizeof(*current));
226end_coredump: 214end_coredump:
227 set_fs(fs); 215 set_fs(fs);
228 return has_dumped; 216 return has_dumped;
diff --git a/arch/x86/kernel/cpu/mcheck/mce_amd.c b/arch/x86/kernel/cpu/mcheck/mce_amd.c
index 5e975298fa81..39aaee5c1ab2 100644
--- a/arch/x86/kernel/cpu/mcheck/mce_amd.c
+++ b/arch/x86/kernel/cpu/mcheck/mce_amd.c
@@ -141,6 +141,7 @@ void mce_amd_feature_init(struct cpuinfo_x86 *c)
141 address = (low & MASK_BLKPTR_LO) >> 21; 141 address = (low & MASK_BLKPTR_LO) >> 21;
142 if (!address) 142 if (!address)
143 break; 143 break;
144
144 address += MCG_XBLK_ADDR; 145 address += MCG_XBLK_ADDR;
145 } else 146 } else
146 ++address; 147 ++address;
@@ -148,12 +149,8 @@ void mce_amd_feature_init(struct cpuinfo_x86 *c)
148 if (rdmsr_safe(address, &low, &high)) 149 if (rdmsr_safe(address, &low, &high))
149 break; 150 break;
150 151
151 if (!(high & MASK_VALID_HI)) { 152 if (!(high & MASK_VALID_HI))
152 if (block) 153 continue;
153 continue;
154 else
155 break;
156 }
157 154
158 if (!(high & MASK_CNTP_HI) || 155 if (!(high & MASK_CNTP_HI) ||
159 (high & MASK_LOCKED_HI)) 156 (high & MASK_LOCKED_HI))
diff --git a/arch/x86/kernel/cpu/mcheck/therm_throt.c b/arch/x86/kernel/cpu/mcheck/therm_throt.c
index d9368eeda309..169d8804a9f8 100644
--- a/arch/x86/kernel/cpu/mcheck/therm_throt.c
+++ b/arch/x86/kernel/cpu/mcheck/therm_throt.c
@@ -216,7 +216,7 @@ static __cpuinit int thermal_throttle_add_dev(struct sys_device *sys_dev,
216 err = sysfs_add_file_to_group(&sys_dev->kobj, 216 err = sysfs_add_file_to_group(&sys_dev->kobj,
217 &attr_core_power_limit_count.attr, 217 &attr_core_power_limit_count.attr,
218 thermal_attr_group.name); 218 thermal_attr_group.name);
219 if (cpu_has(c, X86_FEATURE_PTS)) 219 if (cpu_has(c, X86_FEATURE_PTS)) {
220 err = sysfs_add_file_to_group(&sys_dev->kobj, 220 err = sysfs_add_file_to_group(&sys_dev->kobj,
221 &attr_package_throttle_count.attr, 221 &attr_package_throttle_count.attr,
222 thermal_attr_group.name); 222 thermal_attr_group.name);
@@ -224,6 +224,7 @@ static __cpuinit int thermal_throttle_add_dev(struct sys_device *sys_dev,
224 err = sysfs_add_file_to_group(&sys_dev->kobj, 224 err = sysfs_add_file_to_group(&sys_dev->kobj,
225 &attr_package_power_limit_count.attr, 225 &attr_package_power_limit_count.attr,
226 thermal_attr_group.name); 226 thermal_attr_group.name);
227 }
227 228
228 return err; 229 return err;
229} 230}
diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c
index bc5b9b8d4a33..81ed28cb36e6 100644
--- a/arch/x86/kvm/svm.c
+++ b/arch/x86/kvm/svm.c
@@ -766,7 +766,6 @@ static void init_vmcb(struct vcpu_svm *svm)
766 766
767 control->iopm_base_pa = iopm_base; 767 control->iopm_base_pa = iopm_base;
768 control->msrpm_base_pa = __pa(svm->msrpm); 768 control->msrpm_base_pa = __pa(svm->msrpm);
769 control->tsc_offset = 0;
770 control->int_ctl = V_INTR_MASKING_MASK; 769 control->int_ctl = V_INTR_MASKING_MASK;
771 770
772 init_seg(&save->es); 771 init_seg(&save->es);
@@ -902,6 +901,7 @@ static struct kvm_vcpu *svm_create_vcpu(struct kvm *kvm, unsigned int id)
902 svm->vmcb_pa = page_to_pfn(page) << PAGE_SHIFT; 901 svm->vmcb_pa = page_to_pfn(page) << PAGE_SHIFT;
903 svm->asid_generation = 0; 902 svm->asid_generation = 0;
904 init_vmcb(svm); 903 init_vmcb(svm);
904 svm->vmcb->control.tsc_offset = 0-native_read_tsc();
905 905
906 err = fx_init(&svm->vcpu); 906 err = fx_init(&svm->vcpu);
907 if (err) 907 if (err)
diff --git a/arch/x86/mm/srat_64.c b/arch/x86/mm/srat_64.c
index f9897f7a9ef1..9c0d0d399c30 100644
--- a/arch/x86/mm/srat_64.c
+++ b/arch/x86/mm/srat_64.c
@@ -420,9 +420,11 @@ int __init acpi_scan_nodes(unsigned long start, unsigned long end)
420 return -1; 420 return -1;
421 } 421 }
422 422
423 for_each_node_mask(i, nodes_parsed) 423 for (i = 0; i < num_node_memblks; i++)
424 e820_register_active_regions(i, nodes[i].start >> PAGE_SHIFT, 424 e820_register_active_regions(memblk_nodeid[i],
425 nodes[i].end >> PAGE_SHIFT); 425 node_memblk_range[i].start >> PAGE_SHIFT,
426 node_memblk_range[i].end >> PAGE_SHIFT);
427
426 /* for out of order entries in SRAT */ 428 /* for out of order entries in SRAT */
427 sort_node_map(); 429 sort_node_map();
428 if (!nodes_cover_memory(nodes)) { 430 if (!nodes_cover_memory(nodes)) {